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Diffstat (limited to 'include/asm-arm/arch-clps711x/autcpu12.h')
-rw-r--r--include/asm-arm/arch-clps711x/autcpu12.h78
1 files changed, 78 insertions, 0 deletions
diff --git a/include/asm-arm/arch-clps711x/autcpu12.h b/include/asm-arm/arch-clps711x/autcpu12.h
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1/*
2 * AUTCPU12 specific defines
3 *
4 * (c) 2001 Thomas Gleixner, autronix automation <gleixner@autronix.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
20#ifndef __ASM_ARCH_AUTCPU12_H
21#define __ASM_ARCH_AUTCPU12_H
22
23/*
24 * The CS8900A ethernet chip has its I/O registers wired to chip select 2
25 * (nCS2). This is the mapping for it.
26 */
27#define AUTCPU12_PHYS_CS8900A CS2_PHYS_BASE /* physical */
28#define AUTCPU12_VIRT_CS8900A (0xfe000000) /* virtual */
29
30/*
31 * The flash bank is wired to chip select 0
32 */
33#define AUTCPU12_PHYS_FLASH CS0_PHYS_BASE /* physical */
34
35/* offset for device specific information structure */
36#define AUTCPU12_LCDINFO_OFFS (0x00010000)
37/*
38* Videomemory is the internal SRAM (CS 6)
39*/
40#define AUTCPU12_PHYS_VIDEO CS6_PHYS_BASE
41#define AUTCPU12_VIRT_VIDEO (0xfd000000)
42
43/*
44* All special IO's are tied to CS1
45*/
46#define AUTCPU12_PHYS_CHAR_LCD CS1_PHYS_BASE +0x00000000 /* physical */
47
48#define AUTCPU12_PHYS_NVRAM CS1_PHYS_BASE +0x02000000 /* physical */
49
50#define AUTCPU12_PHYS_CSAUX1 CS1_PHYS_BASE +0x04000000 /* physical */
51
52#define AUTCPU12_PHYS_SMC CS1_PHYS_BASE +0x06000000 /* physical */
53
54#define AUTCPU12_PHYS_CAN CS1_PHYS_BASE +0x08000000 /* physical */
55
56#define AUTCPU12_PHYS_TOUCH CS1_PHYS_BASE +0x0A000000 /* physical */
57
58#define AUTCPU12_PHYS_IO CS1_PHYS_BASE +0x0C000000 /* physical */
59
60#define AUTCPU12_PHYS_LPT CS1_PHYS_BASE +0x0E000000 /* physical */
61
62/*
63* defines for smartmedia card access
64*/
65#define AUTCPU12_SMC_RDY (1<<2)
66#define AUTCPU12_SMC_ALE (1<<3)
67#define AUTCPU12_SMC_CLE (1<<4)
68#define AUTCPU12_SMC_PORT_OFFSET PBDR
69#define AUTCPU12_SMC_SELECT_OFFSET 0x10
70/*
71* defines for lcd contrast
72*/
73#define AUTCPU12_DPOT_PORT_OFFSET PEDR
74#define AUTCPU12_DPOT_CS (1<<0)
75#define AUTCPU12_DPOT_CLK (1<<1)
76#define AUTCPU12_DPOT_UD (1<<2)
77
78#endif