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-rw-r--r--include/asm-arm/arch-cl7500/acornfb.h34
-rw-r--r--include/asm-arm/arch-cl7500/debug-macro.S31
-rw-r--r--include/asm-arm/arch-cl7500/dma.h22
-rw-r--r--include/asm-arm/arch-cl7500/entry-macro.S3
-rw-r--r--include/asm-arm/arch-cl7500/hardware.h71
-rw-r--r--include/asm-arm/arch-cl7500/io.h253
-rw-r--r--include/asm-arm/arch-cl7500/irq.h32
-rw-r--r--include/asm-arm/arch-cl7500/irqs.h66
-rw-r--r--include/asm-arm/arch-cl7500/memory.h29
-rw-r--r--include/asm-arm/arch-cl7500/param.h5
-rw-r--r--include/asm-arm/arch-cl7500/system.h23
-rw-r--r--include/asm-arm/arch-cl7500/timex.h13
-rw-r--r--include/asm-arm/arch-cl7500/uncompress.h43
-rw-r--r--include/asm-arm/arch-cl7500/vmalloc.h15
14 files changed, 640 insertions, 0 deletions
diff --git a/include/asm-arm/arch-cl7500/acornfb.h b/include/asm-arm/arch-cl7500/acornfb.h
new file mode 100644
index 000000000000..3867231a4470
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/acornfb.h
@@ -0,0 +1,34 @@
1#include <linux/config.h>
2#define acornfb_valid_pixrate(var) (var->pixclock >= 39325 && var->pixclock <= 40119)
3
4static inline void
5acornfb_vidc20_find_rates(struct vidc_timing *vidc,
6 struct fb_var_screeninfo *var)
7{
8 u_int bandwidth;
9
10 vidc->control |= VIDC20_CTRL_PIX_CK;
11
12 /* Calculate bandwidth */
13 bandwidth = var->pixclock * 8 / var->bits_per_pixel;
14
15 /* Encode bandwidth as VIDC20 setting */
16 if (bandwidth > 16667*2)
17 vidc->control |= VIDC20_CTRL_FIFO_16;
18 else if (bandwidth > 13333*2)
19 vidc->control |= VIDC20_CTRL_FIFO_20;
20 else if (bandwidth > 11111*2)
21 vidc->control |= VIDC20_CTRL_FIFO_24;
22 else
23 vidc->control |= VIDC20_CTRL_FIFO_28;
24
25 vidc->pll_ctl = 0x2020;
26}
27
28#ifdef CONFIG_CHRONTEL_7003
29#define acornfb_default_control() VIDC20_CTRL_PIX_HCLK
30#else
31#define acornfb_default_control() VIDC20_CTRL_PIX_VCLK
32#endif
33
34#define acornfb_default_econtrol() VIDC20_ECTL_DAC | VIDC20_ECTL_REG(3) | VIDC20_ECTL_ECK
diff --git a/include/asm-arm/arch-cl7500/debug-macro.S b/include/asm-arm/arch-cl7500/debug-macro.S
new file mode 100644
index 000000000000..a5d489d7955a
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/debug-macro.S
@@ -0,0 +1,31 @@
1/* linux/include/asm-arm/arch-cl7500/debug-macro.S
2 *
3 * Debugging macro include header
4 *
5 * Copyright (C) 1994-1999 Russell King
6 * Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12*/
13
14 .macro addruart,rx
15 mov \rx, #0xe0000000
16 orr \rx, \rx, #0x00010000
17 orr \rx, \rx, #0x00000be0
18 .endm
19
20 .macro senduart,rd,rx
21 strb \rd, [\rx]
22 .endm
23
24 .macro busyuart,rd,rx
25 .endm
26
27 .macro waituart,rd,rx
281001: ldrb \rd, [\rx, #0x14]
29 tst \rd, #0x20
30 beq 1001b
31 .endm
diff --git a/include/asm-arm/arch-cl7500/dma.h b/include/asm-arm/arch-cl7500/dma.h
new file mode 100644
index 000000000000..1d6a8829d327
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/dma.h
@@ -0,0 +1,22 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/dma.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd.
5 */
6
7#ifndef __ASM_ARCH_DMA_H
8#define __ASM_ARCH_DMA_H
9
10/* DMA is not yet implemented! It should be the same as acorn, copy over.. */
11
12/*
13 * This is the maximum DMA address that can be DMAd to.
14 * There should not be more than (0xd0000000 - 0xc0000000)
15 * bytes of RAM.
16 */
17#define MAX_DMA_ADDRESS 0xd0000000
18#define MAX_DMA_CHANNELS 0
19
20#define DMA_S0 0
21
22#endif /* _ASM_ARCH_DMA_H */
diff --git a/include/asm-arm/arch-cl7500/entry-macro.S b/include/asm-arm/arch-cl7500/entry-macro.S
new file mode 100644
index 000000000000..686f413f82d6
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/entry-macro.S
@@ -0,0 +1,3 @@
1
2#include <asm/hardware/entry-macro-iomd.S>
3
diff --git a/include/asm-arm/arch-cl7500/hardware.h b/include/asm-arm/arch-cl7500/hardware.h
new file mode 100644
index 000000000000..2339b764f69f
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/hardware.h
@@ -0,0 +1,71 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/hardware.h
3 *
4 * Copyright (C) 1996-1999 Russell King.
5 * Copyright (C) 1999 Nexus Electronics Ltd.
6 *
7 * This file contains the hardware definitions of the
8 * CL7500 evaluation board.
9 */
10#ifndef __ASM_ARCH_HARDWARE_H
11#define __ASM_ARCH_HARDWARE_H
12
13#include <asm/arch/memory.h>
14#include <asm/hardware/iomd.h>
15
16#ifdef __ASSEMBLY__
17#define IOMEM(x) x
18#else
19#define IOMEM(x) ((void __iomem *)(x))
20#endif
21
22/*
23 * What hardware must be present
24 */
25#define HAS_IOMD
26#define HAS_VIDC20
27
28/* Hardware addresses of major areas.
29 * *_START is the physical address
30 * *_SIZE is the size of the region
31 * *_BASE is the virtual address
32 */
33
34#define IO_START 0x03000000 /* I/O */
35#define IO_SIZE 0x01000000
36#define IO_BASE IOMEM(0xe0000000)
37
38#define ISA_START 0x0c000000 /* ISA */
39#define ISA_SIZE 0x00010000
40#define ISA_BASE 0xe1000000
41
42#define FLASH_START 0x01000000 /* XXX */
43#define FLASH_SIZE 0x01000000
44#define FLASH_BASE 0xe2000000
45
46#define LED_START 0x0302B000
47#define LED_SIZE 0x00001000
48#define LED_BASE 0xe3000000
49#define LED_ADDRESS (LED_BASE + 0xa00)
50
51/* Let's define SCREEN_START for CL7500, even though it's a lie. */
52#define SCREEN_START 0x02000000 /* VRAM */
53#define SCREEN_END 0xdfc00000
54#define SCREEN_BASE 0xdf800000
55
56#define FLUSH_BASE 0xdf000000
57
58#define VIDC_BASE (void __iomem *)0xe0400000
59#define IOMD_BASE IOMEM(0xe0200000)
60#define IOC_BASE IOMEM(0xe0200000)
61#define FLOPPYDMA_BASE IOMEM(0xe002a000)
62#define PCIO_BASE IOMEM(0xe0010000)
63
64#define FLUSH_BASE_PHYS 0x00000000 /* ROM */
65
66#define vidc_writel(val) __raw_writel(val, VIDC_BASE)
67
68/* in/out bias for the ISA slot region */
69#define ISASLOT_IO 0x80400000
70
71#endif
diff --git a/include/asm-arm/arch-cl7500/io.h b/include/asm-arm/arch-cl7500/io.h
new file mode 100644
index 000000000000..f0113bc75630
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/io.h
@@ -0,0 +1,253 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/io.h
3 * from linux/include/asm-arm/arch-rpc/io.h
4 *
5 * Copyright (C) 1997 Russell King
6 *
7 * Modifications:
8 * 06-Dec-1997 RMK Created.
9 */
10#ifndef __ASM_ARM_ARCH_IO_H
11#define __ASM_ARM_ARCH_IO_H
12
13#define IO_SPACE_LIMIT 0xffffffff
14
15/*
16 * GCC is totally crap at loading/storing data. We try to persuade it
17 * to do the right thing by using these whereever possible instead of
18 * the above.
19 */
20#define __arch_base_getb(b,o) \
21 ({ \
22 unsigned int v, r = (b); \
23 __asm__ __volatile__( \
24 "ldrb %0, [%1, %2]" \
25 : "=r" (v) \
26 : "r" (r), "Ir" (o)); \
27 v; \
28 })
29
30#define __arch_base_getl(b,o) \
31 ({ \
32 unsigned int v, r = (b); \
33 __asm__ __volatile__( \
34 "ldr %0, [%1, %2]" \
35 : "=r" (v) \
36 : "r" (r), "Ir" (o)); \
37 v; \
38 })
39
40#define __arch_base_putb(v,b,o) \
41 ({ \
42 unsigned int r = (b); \
43 __asm__ __volatile__( \
44 "strb %0, [%1, %2]" \
45 : \
46 : "r" (v), "r" (r), "Ir" (o)); \
47 })
48
49#define __arch_base_putl(v,b,o) \
50 ({ \
51 unsigned int r = (b); \
52 __asm__ __volatile__( \
53 "str %0, [%1, %2]" \
54 : \
55 : "r" (v), "r" (r), "Ir" (o)); \
56 })
57
58/*
59 * We use two different types of addressing - PC style addresses, and ARM
60 * addresses. PC style accesses the PC hardware with the normal PC IO
61 * addresses, eg 0x3f8 for serial#1. ARM addresses are 0x80000000+
62 * and are translated to the start of IO. Note that all addresses are
63 * shifted left!
64 */
65#define __PORT_PCIO(x) (!((x) & 0x80000000))
66
67/*
68 * Dynamic IO functions - let the compiler
69 * optimize the expressions
70 */
71static inline void __outb (unsigned int value, unsigned int port)
72{
73 unsigned long temp;
74 __asm__ __volatile__(
75 "tst %2, #0x80000000\n\t"
76 "mov %0, %4\n\t"
77 "addeq %0, %0, %3\n\t"
78 "strb %1, [%0, %2, lsl #2] @ outb"
79 : "=&r" (temp)
80 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
81 : "cc");
82}
83
84static inline void __outw (unsigned int value, unsigned int port)
85{
86 unsigned long temp;
87 __asm__ __volatile__(
88 "tst %2, #0x80000000\n\t"
89 "mov %0, %4\n\t"
90 "addeq %0, %0, %3\n\t"
91 "str %1, [%0, %2, lsl #2] @ outw"
92 : "=&r" (temp)
93 : "r" (value|value<<16), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
94 : "cc");
95}
96
97static inline void __outl (unsigned int value, unsigned int port)
98{
99 unsigned long temp;
100 __asm__ __volatile__(
101 "tst %2, #0x80000000\n\t"
102 "mov %0, %4\n\t"
103 "addeq %0, %0, %3\n\t"
104 "str %1, [%0, %2, lsl #2] @ outl"
105 : "=&r" (temp)
106 : "r" (value), "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE)
107 : "cc");
108}
109
110#define DECLARE_DYN_IN(sz,fnsuffix,instr) \
111static inline unsigned sz __in##fnsuffix (unsigned int port) \
112{ \
113 unsigned long temp, value; \
114 __asm__ __volatile__( \
115 "tst %2, #0x80000000\n\t" \
116 "mov %0, %4\n\t" \
117 "addeq %0, %0, %3\n\t" \
118 "ldr" instr " %1, [%0, %2, lsl #2] @ in" #fnsuffix \
119 : "=&r" (temp), "=r" (value) \
120 : "r" (port), "Ir" (PCIO_BASE - IO_BASE), "Ir" (IO_BASE) \
121 : "cc"); \
122 return (unsigned sz)value; \
123}
124
125static inline unsigned int __ioaddr (unsigned int port) \
126{ \
127 if (__PORT_PCIO(port)) \
128 return (unsigned int)(PCIO_BASE + (port << 2)); \
129 else \
130 return (unsigned int)(IO_BASE + (port << 2)); \
131}
132
133#define DECLARE_IO(sz,fnsuffix,instr) \
134 DECLARE_DYN_IN(sz,fnsuffix,instr)
135
136DECLARE_IO(char,b,"b")
137DECLARE_IO(short,w,"")
138DECLARE_IO(int,l,"")
139
140#undef DECLARE_IO
141#undef DECLARE_DYN_IN
142
143/*
144 * Constant address IO functions
145 *
146 * These have to be macros for the 'J' constraint to work -
147 * +/-4096 immediate operand.
148 */
149#define __outbc(value,port) \
150({ \
151 if (__PORT_PCIO((port))) \
152 __asm__ __volatile__( \
153 "strb %0, [%1, %2] @ outbc" \
154 : : "r" (value), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
155 else \
156 __asm__ __volatile__( \
157 "strb %0, [%1, %2] @ outbc" \
158 : : "r" (value), "r" (IO_BASE), "r" ((port) << 2)); \
159})
160
161#define __inbc(port) \
162({ \
163 unsigned char result; \
164 if (__PORT_PCIO((port))) \
165 __asm__ __volatile__( \
166 "ldrb %0, [%1, %2] @ inbc" \
167 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
168 else \
169 __asm__ __volatile__( \
170 "ldrb %0, [%1, %2] @ inbc" \
171 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
172 result; \
173})
174
175#define __outwc(value,port) \
176({ \
177 unsigned long v = value; \
178 if (__PORT_PCIO((port))) \
179 __asm__ __volatile__( \
180 "str %0, [%1, %2] @ outwc" \
181 : : "r" (v|v<<16), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
182 else \
183 __asm__ __volatile__( \
184 "str %0, [%1, %2] @ outwc" \
185 : : "r" (v|v<<16), "r" (IO_BASE), "r" ((port) << 2)); \
186})
187
188#define __inwc(port) \
189({ \
190 unsigned short result; \
191 if (__PORT_PCIO((port))) \
192 __asm__ __volatile__( \
193 "ldr %0, [%1, %2] @ inwc" \
194 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
195 else \
196 __asm__ __volatile__( \
197 "ldr %0, [%1, %2] @ inwc" \
198 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
199 result & 0xffff; \
200})
201
202#define __outlc(value,port) \
203({ \
204 unsigned long v = value; \
205 if (__PORT_PCIO((port))) \
206 __asm__ __volatile__( \
207 "str %0, [%1, %2] @ outlc" \
208 : : "r" (v), "r" (PCIO_BASE), "Jr" ((port) << 2)); \
209 else \
210 __asm__ __volatile__( \
211 "str %0, [%1, %2] @ outlc" \
212 : : "r" (v), "r" (IO_BASE), "r" ((port) << 2)); \
213})
214
215#define __inlc(port) \
216({ \
217 unsigned long result; \
218 if (__PORT_PCIO((port))) \
219 __asm__ __volatile__( \
220 "ldr %0, [%1, %2] @ inlc" \
221 : "=r" (result) : "r" (PCIO_BASE), "Jr" ((port) << 2)); \
222 else \
223 __asm__ __volatile__( \
224 "ldr %0, [%1, %2] @ inlc" \
225 : "=r" (result) : "r" (IO_BASE), "r" ((port) << 2)); \
226 result; \
227})
228
229#define __ioaddrc(port) \
230 (__PORT_PCIO((port)) ? PCIO_BASE + ((port) << 2) : IO_BASE + ((port) << 2))
231
232#define inb(p) (__builtin_constant_p((p)) ? __inbc(p) : __inb(p))
233#define inw(p) (__builtin_constant_p((p)) ? __inwc(p) : __inw(p))
234#define inl(p) (__builtin_constant_p((p)) ? __inlc(p) : __inl(p))
235#define outb(v,p) (__builtin_constant_p((p)) ? __outbc(v,p) : __outb(v,p))
236#define outw(v,p) (__builtin_constant_p((p)) ? __outwc(v,p) : __outw(v,p))
237#define outl(v,p) (__builtin_constant_p((p)) ? __outlc(v,p) : __outl(v,p))
238#define __ioaddr(p) (__builtin_constant_p((p)) ? __ioaddr(p) : __ioaddrc(p))
239/* the following macro is deprecated */
240#define ioaddr(port) __ioaddr((port))
241
242#define insb(p,d,l) __raw_readsb(__ioaddr(p),d,l)
243#define insw(p,d,l) __raw_readsw(__ioaddr(p),d,l)
244
245#define outsb(p,d,l) __raw_writesb(__ioaddr(p),d,l)
246#define outsw(p,d,l) __raw_writesw(__ioaddr(p),d,l)
247
248/*
249 * 1:1 mapping for ioremapped regions.
250 */
251#define __mem_pci(x) (x)
252
253#endif
diff --git a/include/asm-arm/arch-cl7500/irq.h b/include/asm-arm/arch-cl7500/irq.h
new file mode 100644
index 000000000000..4b286331f3f8
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/irq.h
@@ -0,0 +1,32 @@
1/*
2 * include/asm-arm/arch-cl7500/irq.h
3 *
4 * Copyright (C) 1996 Russell King
5 * Copyright (C) 1999, 2001 Nexus Electronics Ltd.
6 *
7 * Changelog:
8 * 10-10-1996 RMK Brought up to date with arch-sa110eval
9 * 22-08-1998 RMK Restructured IRQ routines
10 * 11-08-1999 PJB Created ARM7500 version, derived from RiscPC code
11 */
12
13#include <asm/hardware/iomd.h>
14#include <asm/io.h>
15
16static inline int fixup_irq(unsigned int irq)
17{
18 if (irq == IRQ_ISA) {
19 int isabits = *((volatile unsigned int *)0xe002b700);
20 if (isabits == 0) {
21 printk("Spurious ISA IRQ!\n");
22 return irq;
23 }
24 irq = IRQ_ISA_BASE;
25 while (!(isabits & 1)) {
26 irq++;
27 isabits >>= 1;
28 }
29 }
30
31 return irq;
32}
diff --git a/include/asm-arm/arch-cl7500/irqs.h b/include/asm-arm/arch-cl7500/irqs.h
new file mode 100644
index 000000000000..f20996eadf19
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/irqs.h
@@ -0,0 +1,66 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/irqs.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd
5 */
6
7#define IRQ_INT2 0
8#define IRQ_INT1 2
9#define IRQ_VSYNCPULSE 3
10#define IRQ_POWERON 4
11#define IRQ_TIMER0 5
12#define IRQ_TIMER1 6
13#define IRQ_FORCE 7
14#define IRQ_INT8 8
15#define IRQ_ISA 9
16#define IRQ_INT6 10
17#define IRQ_INT5 11
18#define IRQ_INT4 12
19#define IRQ_INT3 13
20#define IRQ_KEYBOARDTX 14
21#define IRQ_KEYBOARDRX 15
22
23#define IRQ_DMA0 16
24#define IRQ_DMA1 17
25#define IRQ_DMA2 18
26#define IRQ_DMA3 19
27#define IRQ_DMAS0 20
28#define IRQ_DMAS1 21
29
30#define IRQ_IOP0 24
31#define IRQ_IOP1 25
32#define IRQ_IOP2 26
33#define IRQ_IOP3 27
34#define IRQ_IOP4 28
35#define IRQ_IOP5 29
36#define IRQ_IOP6 30
37#define IRQ_IOP7 31
38
39#define IRQ_MOUSERX 40
40#define IRQ_MOUSETX 41
41#define IRQ_ADC 42
42#define IRQ_EVENT1 43
43#define IRQ_EVENT2 44
44
45#define IRQ_ISA_BASE 48
46#define IRQ_ISA_3 48
47#define IRQ_ISA_4 49
48#define IRQ_ISA_5 50
49#define IRQ_ISA_7 51
50#define IRQ_ISA_9 52
51#define IRQ_ISA_10 53
52#define IRQ_ISA_11 54
53#define IRQ_ISA_14 55
54
55#define FIQ_INT9 0
56#define FIQ_INT5 1
57#define FIQ_INT6 4
58#define FIQ_INT8 6
59#define FIQ_FORCE 7
60
61/*
62 * This is the offset of the FIQ "IRQ" numbers
63 */
64#define FIQ_START 64
65
66#define IRQ_TIMER IRQ_TIMER0
diff --git a/include/asm-arm/arch-cl7500/memory.h b/include/asm-arm/arch-cl7500/memory.h
new file mode 100644
index 000000000000..9776bba8e585
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/memory.h
@@ -0,0 +1,29 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/memory.h
3 *
4 * Copyright (c) 1996,1997,1998 Russell King.
5 *
6 * Changelog:
7 * 20-Oct-1996 RMK Created
8 * 31-Dec-1997 RMK Fixed definitions to reduce warnings
9 * 11-Jan-1998 RMK Uninlined to reduce hits on cache
10 * 08-Feb-1998 RMK Added __virt_to_bus and __bus_to_virt
11 * 21-Mar-1999 RMK Renamed to memory.h
12 * RMK Added TASK_SIZE and PAGE_OFFSET
13 */
14#ifndef __ASM_ARCH_MEMORY_H
15#define __ASM_ARCH_MEMORY_H
16
17/*
18 * Physical DRAM offset.
19 */
20#define PHYS_OFFSET (0x10000000UL)
21
22/*
23 * These are exactly the same on the RiscPC as the
24 * physical memory view.
25 */
26#define __virt_to_bus(x) __virt_to_phys(x)
27#define __bus_to_virt(x) __phys_to_virt(x)
28
29#endif
diff --git a/include/asm-arm/arch-cl7500/param.h b/include/asm-arm/arch-cl7500/param.h
new file mode 100644
index 000000000000..974bf69fbb1a
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/param.h
@@ -0,0 +1,5 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/param.h
3 *
4 * Copyright (C) 1999 Nexus Electronics Ltd
5 */
diff --git a/include/asm-arm/arch-cl7500/system.h b/include/asm-arm/arch-cl7500/system.h
new file mode 100644
index 000000000000..a9505d6a74d7
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/system.h
@@ -0,0 +1,23 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/system.h
3 *
4 * Copyright (c) 1999 Nexus Electronics Ltd.
5 */
6#ifndef __ASM_ARCH_SYSTEM_H
7#define __ASM_ARCH_SYSTEM_H
8
9#include <asm/hardware/iomd.h>
10#include <asm/io.h>
11
12static inline void arch_idle(void)
13{
14 iomd_writeb(0, IOMD_SUSMODE);
15}
16
17#define arch_reset(mode) \
18 do { \
19 iomd_writeb(0, IOMD_ROMCR0); \
20 cpu_reset(0); \
21 } while (0)
22
23#endif
diff --git a/include/asm-arm/arch-cl7500/timex.h b/include/asm-arm/arch-cl7500/timex.h
new file mode 100644
index 000000000000..8a4175fc0106
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/timex.h
@@ -0,0 +1,13 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/timex.h
3 *
4 * CL7500 architecture timex specifications
5 *
6 * Copyright (C) 1999 Nexus Electronics Ltd
7 */
8
9/*
10 * On the ARM7500, the clock ticks at 2MHz.
11 */
12#define CLOCK_TICK_RATE 2000000
13
diff --git a/include/asm-arm/arch-cl7500/uncompress.h b/include/asm-arm/arch-cl7500/uncompress.h
new file mode 100644
index 000000000000..68601b3e3b95
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/uncompress.h
@@ -0,0 +1,43 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/uncompress.h
3 *
4 * Copyright (C) 1999, 2000 Nexus Electronics Ltd.
5 */
6
7#define BASE 0x03010000
8#define SERBASE (BASE + (0x2f8 << 2))
9
10static __inline__ void putc(char c)
11{
12 while (!(*((volatile unsigned int *)(SERBASE + 0x14)) & 0x20));
13 *((volatile unsigned int *)(SERBASE)) = c;
14}
15
16/*
17 * This does not append a newline
18 */
19static void putstr(const char *s)
20{
21 while (*s) {
22 putc(*s);
23 if (*s == '\n')
24 putc('\r');
25 s++;
26 }
27}
28
29static __inline__ void arch_decomp_setup(void)
30{
31 int baud = 3686400 / (9600 * 32);
32
33 *((volatile unsigned int *)(SERBASE + 0xC)) = 0x80;
34 *((volatile unsigned int *)(SERBASE + 0x0)) = baud & 0xff;
35 *((volatile unsigned int *)(SERBASE + 0x4)) = (baud & 0xff00) >> 8;
36 *((volatile unsigned int *)(SERBASE + 0xC)) = 3; /* 8 bits */
37 *((volatile unsigned int *)(SERBASE + 0x10)) = 3; /* DTR, RTS */
38}
39
40/*
41 * nothing to do
42 */
43#define arch_decomp_wdog()
diff --git a/include/asm-arm/arch-cl7500/vmalloc.h b/include/asm-arm/arch-cl7500/vmalloc.h
new file mode 100644
index 000000000000..91883def4889
--- /dev/null
+++ b/include/asm-arm/arch-cl7500/vmalloc.h
@@ -0,0 +1,15 @@
1/*
2 * linux/include/asm-arm/arch-cl7500/vmalloc.h
3 */
4
5/*
6 * Just any arbitrary offset to the start of the vmalloc VM area: the
7 * current 8MB value just means that there will be a 8MB "hole" after the
8 * physical memory until the kernel virtual memory starts. That means that
9 * any out-of-bounds memory accesses will hopefully be caught.
10 * The vmalloc() routines leaves a hole of 4kB between each vmalloced
11 * area for the same reason. ;)
12 */
13#define VMALLOC_OFFSET (8*1024*1024)
14#define VMALLOC_START (((unsigned long)high_memory + VMALLOC_OFFSET) & ~(VMALLOC_OFFSET-1))
15#define VMALLOC_END (PAGE_OFFSET + 0x1c000000)
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-23 05:23:33 -0500