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Diffstat (limited to 'include/asm-arm/arch-at91rm9200/hardware.h')
-rw-r--r--include/asm-arm/arch-at91rm9200/hardware.h28
1 files changed, 6 insertions, 22 deletions
diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h
index 235d39d91107..6551b4d1ff7b 100644
--- a/include/asm-arm/arch-at91rm9200/hardware.h
+++ b/include/asm-arm/arch-at91rm9200/hardware.h
@@ -34,27 +34,14 @@
34 * Virtual to Physical Address mapping for IO devices. 34 * Virtual to Physical Address mapping for IO devices.
35 */ 35 */
36#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) 36#define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS)
37#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91_BASE_SPI) 37#define AT91_VA_BASE_SPI AT91_IO_P2V(AT91RM9200_BASE_SPI)
38#define AT91_VA_BASE_SSC2 AT91_IO_P2V(AT91_BASE_SSC2) 38#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC)
39#define AT91_VA_BASE_SSC1 AT91_IO_P2V(AT91_BASE_SSC1) 39#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91RM9200_BASE_TWI)
40#define AT91_VA_BASE_SSC0 AT91_IO_P2V(AT91_BASE_SSC0) 40#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91RM9200_BASE_MCI)
41#define AT91_VA_BASE_US3 AT91_IO_P2V(AT91_BASE_US3) 41#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91RM9200_BASE_UDP)
42#define AT91_VA_BASE_US2 AT91_IO_P2V(AT91_BASE_US2)
43#define AT91_VA_BASE_US1 AT91_IO_P2V(AT91_BASE_US1)
44#define AT91_VA_BASE_US0 AT91_IO_P2V(AT91_BASE_US0)
45#define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91_BASE_EMAC)
46#define AT91_VA_BASE_TWI AT91_IO_P2V(AT91_BASE_TWI)
47#define AT91_VA_BASE_MCI AT91_IO_P2V(AT91_BASE_MCI)
48#define AT91_VA_BASE_UDP AT91_IO_P2V(AT91_BASE_UDP)
49#define AT91_VA_BASE_TCB1 AT91_IO_P2V(AT91_BASE_TCB1)
50#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0)
51
52/* Internal SRAM */
53#define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */
54#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */
55 42
56 /* Internal SRAM is mapped below the IO devices */ 43 /* Internal SRAM is mapped below the IO devices */
57#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE) 44#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE)
58 45
59/* Serial ports */ 46/* Serial ports */
60#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ 47#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */
@@ -71,9 +58,6 @@
71/* Compact Flash */ 58/* Compact Flash */
72#define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ 59#define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */
73 60
74/* Multi-Master Memory controller */
75#define AT91_UHP_BASE 0x00300000 /* USB Host controller */
76
77/* Clocks */ 61/* Clocks */
78#define AT91_SLOW_CLOCK 32768 /* slow clock */ 62#define AT91_SLOW_CLOCK 32768 /* slow clock */
79 63