diff options
Diffstat (limited to 'include/asm-arm/arch-at91rm9200/hardware.h')
| -rw-r--r-- | include/asm-arm/arch-at91rm9200/hardware.h | 37 |
1 files changed, 15 insertions, 22 deletions
diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h index 235d39d91107..878e65f369bf 100644 --- a/include/asm-arm/arch-at91rm9200/hardware.h +++ b/include/asm-arm/arch-at91rm9200/hardware.h | |||
| @@ -34,27 +34,23 @@ | |||
| 34 | * Virtual to Physical Address mapping for IO devices. | 34 | * Virtual to Physical Address mapping for IO devices. |
| 35 | */ | 35 | */ |
| 36 | #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) | 36 | #define AT91_VA_BASE_SYS AT91_IO_P2V(AT91_BASE_SYS) |
| 37 | #define AT91_VA_BASE_SPI AT91_IO_P2V(AT91_BASE_SPI) | 37 | #define AT91_VA_BASE_SPI AT91_IO_P2V(AT91RM9200_BASE_SPI) |
| 38 | #define AT91_VA_BASE_SSC2 AT91_IO_P2V(AT91_BASE_SSC2) | 38 | #define AT91_VA_BASE_SSC2 AT91_IO_P2V(AT91RM9200_BASE_SSC2) |
| 39 | #define AT91_VA_BASE_SSC1 AT91_IO_P2V(AT91_BASE_SSC1) | 39 | #define AT91_VA_BASE_SSC1 AT91_IO_P2V(AT91RM9200_BASE_SSC1) |
| 40 | #define AT91_VA_BASE_SSC0 AT91_IO_P2V(AT91_BASE_SSC0) | 40 | #define AT91_VA_BASE_SSC0 AT91_IO_P2V(AT91RM9200_BASE_SSC0) |
| 41 | #define AT91_VA_BASE_US3 AT91_IO_P2V(AT91_BASE_US3) | 41 | #define AT91_VA_BASE_US3 AT91_IO_P2V(AT91RM9200_BASE_US3) |
| 42 | #define AT91_VA_BASE_US2 AT91_IO_P2V(AT91_BASE_US2) | 42 | #define AT91_VA_BASE_US2 AT91_IO_P2V(AT91RM9200_BASE_US2) |
| 43 | #define AT91_VA_BASE_US1 AT91_IO_P2V(AT91_BASE_US1) | 43 | #define AT91_VA_BASE_US1 AT91_IO_P2V(AT91RM9200_BASE_US1) |
| 44 | #define AT91_VA_BASE_US0 AT91_IO_P2V(AT91_BASE_US0) | 44 | #define AT91_VA_BASE_US0 AT91_IO_P2V(AT91RM9200_BASE_US0) |
| 45 | #define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91_BASE_EMAC) | 45 | #define AT91_VA_BASE_EMAC AT91_IO_P2V(AT91RM9200_BASE_EMAC) |
| 46 | #define AT91_VA_BASE_TWI AT91_IO_P2V(AT91_BASE_TWI) | 46 | #define AT91_VA_BASE_TWI AT91_IO_P2V(AT91RM9200_BASE_TWI) |
| 47 | #define AT91_VA_BASE_MCI AT91_IO_P2V(AT91_BASE_MCI) | 47 | #define AT91_VA_BASE_MCI AT91_IO_P2V(AT91RM9200_BASE_MCI) |
| 48 | #define AT91_VA_BASE_UDP AT91_IO_P2V(AT91_BASE_UDP) | 48 | #define AT91_VA_BASE_UDP AT91_IO_P2V(AT91RM9200_BASE_UDP) |
| 49 | #define AT91_VA_BASE_TCB1 AT91_IO_P2V(AT91_BASE_TCB1) | 49 | #define AT91_VA_BASE_TCB1 AT91_IO_P2V(AT91RM9200_BASE_TCB1) |
| 50 | #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0) | 50 | #define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91RM9200_BASE_TCB0) |
| 51 | |||
| 52 | /* Internal SRAM */ | ||
| 53 | #define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */ | ||
| 54 | #define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */ | ||
| 55 | 51 | ||
| 56 | /* Internal SRAM is mapped below the IO devices */ | 52 | /* Internal SRAM is mapped below the IO devices */ |
| 57 | #define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE) | 53 | #define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91RM9200_SRAM_SIZE) |
| 58 | 54 | ||
| 59 | /* Serial ports */ | 55 | /* Serial ports */ |
| 60 | #define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ | 56 | #define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ |
| @@ -71,9 +67,6 @@ | |||
| 71 | /* Compact Flash */ | 67 | /* Compact Flash */ |
| 72 | #define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ | 68 | #define AT91_CF_BASE 0x50000000 /* NCS4-NCS6: Compact Flash physical base address */ |
| 73 | 69 | ||
| 74 | /* Multi-Master Memory controller */ | ||
| 75 | #define AT91_UHP_BASE 0x00300000 /* USB Host controller */ | ||
| 76 | |||
| 77 | /* Clocks */ | 70 | /* Clocks */ |
| 78 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ | 71 | #define AT91_SLOW_CLOCK 32768 /* slow clock */ |
| 79 | 72 | ||