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Diffstat (limited to 'include/asm-arm/arch-at91rm9200/hardware.h')
-rw-r--r--include/asm-arm/arch-at91rm9200/hardware.h9
1 files changed, 6 insertions, 3 deletions
diff --git a/include/asm-arm/arch-at91rm9200/hardware.h b/include/asm-arm/arch-at91rm9200/hardware.h
index 59e6f44d3a0d..235d39d91107 100644
--- a/include/asm-arm/arch-at91rm9200/hardware.h
+++ b/include/asm-arm/arch-at91rm9200/hardware.h
@@ -50,9 +50,12 @@
50#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0) 50#define AT91_VA_BASE_TCB0 AT91_IO_P2V(AT91_BASE_TCB0)
51 51
52/* Internal SRAM */ 52/* Internal SRAM */
53#define AT91_BASE_SRAM 0x00200000 /* Internal SRAM base address */ 53#define AT91_SRAM_BASE 0x00200000 /* Internal SRAM base address */
54#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */ 54#define AT91_SRAM_SIZE 0x00004000 /* Internal SRAM SIZE (16Kb) */
55 55
56 /* Internal SRAM is mapped below the IO devices */
57#define AT91_SRAM_VIRT_BASE (AT91_IO_VIRT_BASE - AT91_SRAM_SIZE)
58
56/* Serial ports */ 59/* Serial ports */
57#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */ 60#define AT91_NR_UART 5 /* 4 USART3's and one DBGU port */
58 61
@@ -81,14 +84,14 @@ static inline unsigned int at91_sys_read(unsigned int reg_offset)
81{ 84{
82 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; 85 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
83 86
84 return readl(addr + reg_offset); 87 return __raw_readl(addr + reg_offset);
85} 88}
86 89
87static inline void at91_sys_write(unsigned int reg_offset, unsigned long value) 90static inline void at91_sys_write(unsigned int reg_offset, unsigned long value)
88{ 91{
89 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS; 92 void __iomem *addr = (void __iomem *)AT91_VA_BASE_SYS;
90 93
91 writel(value, addr + reg_offset); 94 __raw_writel(value, addr + reg_offset);
92} 95}
93#endif 96#endif
94 97