diff options
Diffstat (limited to 'include/asm-arm/arch-at91')
-rw-r--r-- | include/asm-arm/arch-at91/at91sam9260_matrix.h | 2 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/board.h | 3 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/debug-macro.S | 16 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/entry-macro.S | 10 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/gpio.h | 59 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/hardware.h | 8 | ||||
-rw-r--r-- | include/asm-arm/arch-at91/irqs.h | 4 |
7 files changed, 56 insertions, 46 deletions
diff --git a/include/asm-arm/arch-at91/at91sam9260_matrix.h b/include/asm-arm/arch-at91/at91sam9260_matrix.h index 573e97a47d22..aacb1e976422 100644 --- a/include/asm-arm/arch-at91/at91sam9260_matrix.h +++ b/include/asm-arm/arch-at91/at91sam9260_matrix.h | |||
@@ -18,7 +18,7 @@ | |||
18 | #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ | 18 | #define AT91_MATRIX_MCFG2 (AT91_MATRIX + 0x08) /* Master Configuration Register 2 */ |
19 | #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ | 19 | #define AT91_MATRIX_MCFG3 (AT91_MATRIX + 0x0C) /* Master Configuration Register 3 */ |
20 | #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ | 20 | #define AT91_MATRIX_MCFG4 (AT91_MATRIX + 0x10) /* Master Configuration Register 4 */ |
21 | #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x04) /* Master Configuration Register 5 */ | 21 | #define AT91_MATRIX_MCFG5 (AT91_MATRIX + 0x14) /* Master Configuration Register 5 */ |
22 | #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ | 22 | #define AT91_MATRIX_ULBT (7 << 0) /* Undefined Length Burst Type */ |
23 | #define AT91_MATRIX_ULBT_INFINITE (0 << 0) | 23 | #define AT91_MATRIX_ULBT_INFINITE (0 << 0) |
24 | #define AT91_MATRIX_ULBT_SINGLE (1 << 0) | 24 | #define AT91_MATRIX_ULBT_SINGLE (1 << 0) |
diff --git a/include/asm-arm/arch-at91/board.h b/include/asm-arm/arch-at91/board.h index bf1afd0081b6..7b9903c2c447 100644 --- a/include/asm-arm/arch-at91/board.h +++ b/include/asm-arm/arch-at91/board.h | |||
@@ -60,7 +60,7 @@ struct at91_mmc_data { | |||
60 | u8 wp_pin; /* (SD) writeprotect detect */ | 60 | u8 wp_pin; /* (SD) writeprotect detect */ |
61 | u8 vcc_pin; /* power switching (high == on) */ | 61 | u8 vcc_pin; /* power switching (high == on) */ |
62 | }; | 62 | }; |
63 | extern void __init at91_add_device_mmc(struct at91_mmc_data *data); | 63 | extern void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data); |
64 | 64 | ||
65 | /* Ethernet */ | 65 | /* Ethernet */ |
66 | struct at91_eth_data { | 66 | struct at91_eth_data { |
@@ -76,6 +76,7 @@ extern void __init at91_add_device_eth(struct at91_eth_data *data); | |||
76 | /* USB Host */ | 76 | /* USB Host */ |
77 | struct at91_usbh_data { | 77 | struct at91_usbh_data { |
78 | u8 ports; /* number of ports on root hub */ | 78 | u8 ports; /* number of ports on root hub */ |
79 | u8 vbus_pin[]; /* port power-control pin */ | ||
79 | }; | 80 | }; |
80 | extern void __init at91_add_device_usbh(struct at91_usbh_data *data); | 81 | extern void __init at91_add_device_usbh(struct at91_usbh_data *data); |
81 | 82 | ||
diff --git a/include/asm-arm/arch-at91/debug-macro.S b/include/asm-arm/arch-at91/debug-macro.S index 20721ef1ed1b..13e9f5e1d4ff 100644 --- a/include/asm-arm/arch-at91/debug-macro.S +++ b/include/asm-arm/arch-at91/debug-macro.S | |||
@@ -16,24 +16,24 @@ | |||
16 | 16 | ||
17 | .macro addruart,rx | 17 | .macro addruart,rx |
18 | mrc p15, 0, \rx, c1, c0 | 18 | mrc p15, 0, \rx, c1, c0 |
19 | tst \rx, #1 @ MMU enabled? | 19 | tst \rx, #1 @ MMU enabled? |
20 | ldreq \rx, =AT91_BASE_SYS @ System peripherals (phys address) | 20 | ldreq \rx, =(AT91_BASE_SYS + AT91_DBGU) @ System peripherals (phys address) |
21 | ldrne \rx, =AT91_VA_BASE_SYS @ System peripherals (virt address) | 21 | ldrne \rx, =(AT91_VA_BASE_SYS + AT91_DBGU) @ System peripherals (virt address) |
22 | .endm | 22 | .endm |
23 | 23 | ||
24 | .macro senduart,rd,rx | 24 | .macro senduart,rd,rx |
25 | strb \rd, [\rx, #AT91_DBGU_THR] @ Write to Transmitter Holding Register | 25 | strb \rd, [\rx, #(AT91_DBGU_THR - AT91_DBGU)] @ Write to Transmitter Holding Register |
26 | .endm | 26 | .endm |
27 | 27 | ||
28 | .macro waituart,rd,rx | 28 | .macro waituart,rd,rx |
29 | 1001: ldr \rd, [\rx, #AT91_DBGU_SR] @ Read Status Register | 29 | 1001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register |
30 | tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit | 30 | tst \rd, #AT91_DBGU_TXRDY @ DBGU_TXRDY = 1 when ready to transmit |
31 | beq 1001b | 31 | beq 1001b |
32 | .endm | 32 | .endm |
33 | 33 | ||
34 | .macro busyuart,rd,rx | 34 | .macro busyuart,rd,rx |
35 | 1001: ldr \rd, [\rx, #AT91_DBGU_SR] @ Read Status Register | 35 | 1001: ldr \rd, [\rx, #(AT91_DBGU_SR - AT91_DBGU)] @ Read Status Register |
36 | tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete | 36 | tst \rd, #AT91_DBGU_TXEMPTY @ DBGU_TXEMPTY = 1 when transmission complete |
37 | beq 1001b | 37 | beq 1001b |
38 | .endm | 38 | .endm |
39 | 39 | ||
diff --git a/include/asm-arm/arch-at91/entry-macro.S b/include/asm-arm/arch-at91/entry-macro.S index a6f33832a178..76c8cccf73aa 100644 --- a/include/asm-arm/arch-at91/entry-macro.S +++ b/include/asm-arm/arch-at91/entry-macro.S | |||
@@ -17,10 +17,10 @@ | |||
17 | .endm | 17 | .endm |
18 | 18 | ||
19 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 19 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
20 | ldr \base, =(AT91_VA_BASE_SYS) @ base virtual address of SYS peripherals | 20 | ldr \base, =(AT91_VA_BASE_SYS + AT91_AIC) @ base virtual address of AIC peripheral |
21 | ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) | 21 | ldr \irqnr, [\base, #(AT91_AIC_IVR - AT91_AIC)] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt) |
22 | ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number | 22 | ldr \irqstat, [\base, #(AT91_AIC_ISR - AT91_AIC)] @ read interrupt source number |
23 | teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt | 23 | teq \irqstat, #0 @ ISR is 0 when no current interrupt, or spurious interrupt |
24 | streq \tmp, [\base, #AT91_AIC_EOICR] @ not going to be handled further, then ACK it now. | 24 | streq \tmp, [\base, #(AT91_AIC_EOICR - AT91_AIC)] @ not going to be handled further, then ACK it now. |
25 | .endm | 25 | .endm |
26 | 26 | ||
diff --git a/include/asm-arm/arch-at91/gpio.h b/include/asm-arm/arch-at91/gpio.h index 6d1a5eb34704..256f9b200ab2 100644 --- a/include/asm-arm/arch-at91/gpio.h +++ b/include/asm-arm/arch-at91/gpio.h | |||
@@ -17,7 +17,7 @@ | |||
17 | 17 | ||
18 | #define PIN_BASE NR_AIC_IRQS | 18 | #define PIN_BASE NR_AIC_IRQS |
19 | 19 | ||
20 | #define MAX_GPIO_BANKS 4 | 20 | #define MAX_GPIO_BANKS 5 |
21 | 21 | ||
22 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ | 22 | /* these pin numbers double as IRQ numbers, like AT91xxx_ID_* values */ |
23 | 23 | ||
@@ -26,37 +26,31 @@ | |||
26 | #define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) | 26 | #define AT91_PIN_PA2 (PIN_BASE + 0x00 + 2) |
27 | #define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) | 27 | #define AT91_PIN_PA3 (PIN_BASE + 0x00 + 3) |
28 | #define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) | 28 | #define AT91_PIN_PA4 (PIN_BASE + 0x00 + 4) |
29 | |||
30 | #define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) | 29 | #define AT91_PIN_PA5 (PIN_BASE + 0x00 + 5) |
31 | #define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) | 30 | #define AT91_PIN_PA6 (PIN_BASE + 0x00 + 6) |
32 | #define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) | 31 | #define AT91_PIN_PA7 (PIN_BASE + 0x00 + 7) |
33 | #define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) | 32 | #define AT91_PIN_PA8 (PIN_BASE + 0x00 + 8) |
34 | #define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) | 33 | #define AT91_PIN_PA9 (PIN_BASE + 0x00 + 9) |
35 | |||
36 | #define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) | 34 | #define AT91_PIN_PA10 (PIN_BASE + 0x00 + 10) |
37 | #define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) | 35 | #define AT91_PIN_PA11 (PIN_BASE + 0x00 + 11) |
38 | #define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) | 36 | #define AT91_PIN_PA12 (PIN_BASE + 0x00 + 12) |
39 | #define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) | 37 | #define AT91_PIN_PA13 (PIN_BASE + 0x00 + 13) |
40 | #define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) | 38 | #define AT91_PIN_PA14 (PIN_BASE + 0x00 + 14) |
41 | |||
42 | #define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) | 39 | #define AT91_PIN_PA15 (PIN_BASE + 0x00 + 15) |
43 | #define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) | 40 | #define AT91_PIN_PA16 (PIN_BASE + 0x00 + 16) |
44 | #define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) | 41 | #define AT91_PIN_PA17 (PIN_BASE + 0x00 + 17) |
45 | #define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) | 42 | #define AT91_PIN_PA18 (PIN_BASE + 0x00 + 18) |
46 | #define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) | 43 | #define AT91_PIN_PA19 (PIN_BASE + 0x00 + 19) |
47 | |||
48 | #define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) | 44 | #define AT91_PIN_PA20 (PIN_BASE + 0x00 + 20) |
49 | #define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) | 45 | #define AT91_PIN_PA21 (PIN_BASE + 0x00 + 21) |
50 | #define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) | 46 | #define AT91_PIN_PA22 (PIN_BASE + 0x00 + 22) |
51 | #define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) | 47 | #define AT91_PIN_PA23 (PIN_BASE + 0x00 + 23) |
52 | #define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) | 48 | #define AT91_PIN_PA24 (PIN_BASE + 0x00 + 24) |
53 | |||
54 | #define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) | 49 | #define AT91_PIN_PA25 (PIN_BASE + 0x00 + 25) |
55 | #define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) | 50 | #define AT91_PIN_PA26 (PIN_BASE + 0x00 + 26) |
56 | #define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) | 51 | #define AT91_PIN_PA27 (PIN_BASE + 0x00 + 27) |
57 | #define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) | 52 | #define AT91_PIN_PA28 (PIN_BASE + 0x00 + 28) |
58 | #define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) | 53 | #define AT91_PIN_PA29 (PIN_BASE + 0x00 + 29) |
59 | |||
60 | #define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) | 54 | #define AT91_PIN_PA30 (PIN_BASE + 0x00 + 30) |
61 | #define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) | 55 | #define AT91_PIN_PA31 (PIN_BASE + 0x00 + 31) |
62 | 56 | ||
@@ -65,37 +59,31 @@ | |||
65 | #define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) | 59 | #define AT91_PIN_PB2 (PIN_BASE + 0x20 + 2) |
66 | #define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) | 60 | #define AT91_PIN_PB3 (PIN_BASE + 0x20 + 3) |
67 | #define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) | 61 | #define AT91_PIN_PB4 (PIN_BASE + 0x20 + 4) |
68 | |||
69 | #define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) | 62 | #define AT91_PIN_PB5 (PIN_BASE + 0x20 + 5) |
70 | #define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) | 63 | #define AT91_PIN_PB6 (PIN_BASE + 0x20 + 6) |
71 | #define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) | 64 | #define AT91_PIN_PB7 (PIN_BASE + 0x20 + 7) |
72 | #define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) | 65 | #define AT91_PIN_PB8 (PIN_BASE + 0x20 + 8) |
73 | #define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) | 66 | #define AT91_PIN_PB9 (PIN_BASE + 0x20 + 9) |
74 | |||
75 | #define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) | 67 | #define AT91_PIN_PB10 (PIN_BASE + 0x20 + 10) |
76 | #define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) | 68 | #define AT91_PIN_PB11 (PIN_BASE + 0x20 + 11) |
77 | #define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) | 69 | #define AT91_PIN_PB12 (PIN_BASE + 0x20 + 12) |
78 | #define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) | 70 | #define AT91_PIN_PB13 (PIN_BASE + 0x20 + 13) |
79 | #define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) | 71 | #define AT91_PIN_PB14 (PIN_BASE + 0x20 + 14) |
80 | |||
81 | #define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) | 72 | #define AT91_PIN_PB15 (PIN_BASE + 0x20 + 15) |
82 | #define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) | 73 | #define AT91_PIN_PB16 (PIN_BASE + 0x20 + 16) |
83 | #define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) | 74 | #define AT91_PIN_PB17 (PIN_BASE + 0x20 + 17) |
84 | #define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) | 75 | #define AT91_PIN_PB18 (PIN_BASE + 0x20 + 18) |
85 | #define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) | 76 | #define AT91_PIN_PB19 (PIN_BASE + 0x20 + 19) |
86 | |||
87 | #define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) | 77 | #define AT91_PIN_PB20 (PIN_BASE + 0x20 + 20) |
88 | #define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) | 78 | #define AT91_PIN_PB21 (PIN_BASE + 0x20 + 21) |
89 | #define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) | 79 | #define AT91_PIN_PB22 (PIN_BASE + 0x20 + 22) |
90 | #define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) | 80 | #define AT91_PIN_PB23 (PIN_BASE + 0x20 + 23) |
91 | #define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) | 81 | #define AT91_PIN_PB24 (PIN_BASE + 0x20 + 24) |
92 | |||
93 | #define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) | 82 | #define AT91_PIN_PB25 (PIN_BASE + 0x20 + 25) |
94 | #define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) | 83 | #define AT91_PIN_PB26 (PIN_BASE + 0x20 + 26) |
95 | #define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) | 84 | #define AT91_PIN_PB27 (PIN_BASE + 0x20 + 27) |
96 | #define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) | 85 | #define AT91_PIN_PB28 (PIN_BASE + 0x20 + 28) |
97 | #define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) | 86 | #define AT91_PIN_PB29 (PIN_BASE + 0x20 + 29) |
98 | |||
99 | #define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) | 87 | #define AT91_PIN_PB30 (PIN_BASE + 0x20 + 30) |
100 | #define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) | 88 | #define AT91_PIN_PB31 (PIN_BASE + 0x20 + 31) |
101 | 89 | ||
@@ -104,37 +92,31 @@ | |||
104 | #define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) | 92 | #define AT91_PIN_PC2 (PIN_BASE + 0x40 + 2) |
105 | #define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) | 93 | #define AT91_PIN_PC3 (PIN_BASE + 0x40 + 3) |
106 | #define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) | 94 | #define AT91_PIN_PC4 (PIN_BASE + 0x40 + 4) |
107 | |||
108 | #define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) | 95 | #define AT91_PIN_PC5 (PIN_BASE + 0x40 + 5) |
109 | #define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) | 96 | #define AT91_PIN_PC6 (PIN_BASE + 0x40 + 6) |
110 | #define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) | 97 | #define AT91_PIN_PC7 (PIN_BASE + 0x40 + 7) |
111 | #define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) | 98 | #define AT91_PIN_PC8 (PIN_BASE + 0x40 + 8) |
112 | #define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) | 99 | #define AT91_PIN_PC9 (PIN_BASE + 0x40 + 9) |
113 | |||
114 | #define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) | 100 | #define AT91_PIN_PC10 (PIN_BASE + 0x40 + 10) |
115 | #define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) | 101 | #define AT91_PIN_PC11 (PIN_BASE + 0x40 + 11) |
116 | #define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) | 102 | #define AT91_PIN_PC12 (PIN_BASE + 0x40 + 12) |
117 | #define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) | 103 | #define AT91_PIN_PC13 (PIN_BASE + 0x40 + 13) |
118 | #define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) | 104 | #define AT91_PIN_PC14 (PIN_BASE + 0x40 + 14) |
119 | |||
120 | #define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) | 105 | #define AT91_PIN_PC15 (PIN_BASE + 0x40 + 15) |
121 | #define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) | 106 | #define AT91_PIN_PC16 (PIN_BASE + 0x40 + 16) |
122 | #define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) | 107 | #define AT91_PIN_PC17 (PIN_BASE + 0x40 + 17) |
123 | #define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) | 108 | #define AT91_PIN_PC18 (PIN_BASE + 0x40 + 18) |
124 | #define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) | 109 | #define AT91_PIN_PC19 (PIN_BASE + 0x40 + 19) |
125 | |||
126 | #define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) | 110 | #define AT91_PIN_PC20 (PIN_BASE + 0x40 + 20) |
127 | #define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) | 111 | #define AT91_PIN_PC21 (PIN_BASE + 0x40 + 21) |
128 | #define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) | 112 | #define AT91_PIN_PC22 (PIN_BASE + 0x40 + 22) |
129 | #define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) | 113 | #define AT91_PIN_PC23 (PIN_BASE + 0x40 + 23) |
130 | #define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) | 114 | #define AT91_PIN_PC24 (PIN_BASE + 0x40 + 24) |
131 | |||
132 | #define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) | 115 | #define AT91_PIN_PC25 (PIN_BASE + 0x40 + 25) |
133 | #define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) | 116 | #define AT91_PIN_PC26 (PIN_BASE + 0x40 + 26) |
134 | #define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) | 117 | #define AT91_PIN_PC27 (PIN_BASE + 0x40 + 27) |
135 | #define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) | 118 | #define AT91_PIN_PC28 (PIN_BASE + 0x40 + 28) |
136 | #define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) | 119 | #define AT91_PIN_PC29 (PIN_BASE + 0x40 + 29) |
137 | |||
138 | #define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) | 120 | #define AT91_PIN_PC30 (PIN_BASE + 0x40 + 30) |
139 | #define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) | 121 | #define AT91_PIN_PC31 (PIN_BASE + 0x40 + 31) |
140 | 122 | ||
@@ -143,40 +125,67 @@ | |||
143 | #define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) | 125 | #define AT91_PIN_PD2 (PIN_BASE + 0x60 + 2) |
144 | #define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) | 126 | #define AT91_PIN_PD3 (PIN_BASE + 0x60 + 3) |
145 | #define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) | 127 | #define AT91_PIN_PD4 (PIN_BASE + 0x60 + 4) |
146 | |||
147 | #define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) | 128 | #define AT91_PIN_PD5 (PIN_BASE + 0x60 + 5) |
148 | #define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) | 129 | #define AT91_PIN_PD6 (PIN_BASE + 0x60 + 6) |
149 | #define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) | 130 | #define AT91_PIN_PD7 (PIN_BASE + 0x60 + 7) |
150 | #define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) | 131 | #define AT91_PIN_PD8 (PIN_BASE + 0x60 + 8) |
151 | #define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) | 132 | #define AT91_PIN_PD9 (PIN_BASE + 0x60 + 9) |
152 | |||
153 | #define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) | 133 | #define AT91_PIN_PD10 (PIN_BASE + 0x60 + 10) |
154 | #define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) | 134 | #define AT91_PIN_PD11 (PIN_BASE + 0x60 + 11) |
155 | #define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) | 135 | #define AT91_PIN_PD12 (PIN_BASE + 0x60 + 12) |
156 | #define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) | 136 | #define AT91_PIN_PD13 (PIN_BASE + 0x60 + 13) |
157 | #define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) | 137 | #define AT91_PIN_PD14 (PIN_BASE + 0x60 + 14) |
158 | |||
159 | #define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) | 138 | #define AT91_PIN_PD15 (PIN_BASE + 0x60 + 15) |
160 | #define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) | 139 | #define AT91_PIN_PD16 (PIN_BASE + 0x60 + 16) |
161 | #define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) | 140 | #define AT91_PIN_PD17 (PIN_BASE + 0x60 + 17) |
162 | #define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) | 141 | #define AT91_PIN_PD18 (PIN_BASE + 0x60 + 18) |
163 | #define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) | 142 | #define AT91_PIN_PD19 (PIN_BASE + 0x60 + 19) |
164 | |||
165 | #define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) | 143 | #define AT91_PIN_PD20 (PIN_BASE + 0x60 + 20) |
166 | #define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) | 144 | #define AT91_PIN_PD21 (PIN_BASE + 0x60 + 21) |
167 | #define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) | 145 | #define AT91_PIN_PD22 (PIN_BASE + 0x60 + 22) |
168 | #define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) | 146 | #define AT91_PIN_PD23 (PIN_BASE + 0x60 + 23) |
169 | #define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) | 147 | #define AT91_PIN_PD24 (PIN_BASE + 0x60 + 24) |
170 | |||
171 | #define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) | 148 | #define AT91_PIN_PD25 (PIN_BASE + 0x60 + 25) |
172 | #define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) | 149 | #define AT91_PIN_PD26 (PIN_BASE + 0x60 + 26) |
173 | #define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) | 150 | #define AT91_PIN_PD27 (PIN_BASE + 0x60 + 27) |
174 | #define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) | 151 | #define AT91_PIN_PD28 (PIN_BASE + 0x60 + 28) |
175 | #define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) | 152 | #define AT91_PIN_PD29 (PIN_BASE + 0x60 + 29) |
176 | |||
177 | #define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) | 153 | #define AT91_PIN_PD30 (PIN_BASE + 0x60 + 30) |
178 | #define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) | 154 | #define AT91_PIN_PD31 (PIN_BASE + 0x60 + 31) |
179 | 155 | ||
156 | #define AT91_PIN_PE0 (PIN_BASE + 0x80 + 0) | ||
157 | #define AT91_PIN_PE1 (PIN_BASE + 0x80 + 1) | ||
158 | #define AT91_PIN_PE2 (PIN_BASE + 0x80 + 2) | ||
159 | #define AT91_PIN_PE3 (PIN_BASE + 0x80 + 3) | ||
160 | #define AT91_PIN_PE4 (PIN_BASE + 0x80 + 4) | ||
161 | #define AT91_PIN_PE5 (PIN_BASE + 0x80 + 5) | ||
162 | #define AT91_PIN_PE6 (PIN_BASE + 0x80 + 6) | ||
163 | #define AT91_PIN_PE7 (PIN_BASE + 0x80 + 7) | ||
164 | #define AT91_PIN_PE8 (PIN_BASE + 0x80 + 8) | ||
165 | #define AT91_PIN_PE9 (PIN_BASE + 0x80 + 9) | ||
166 | #define AT91_PIN_PE10 (PIN_BASE + 0x80 + 10) | ||
167 | #define AT91_PIN_PE11 (PIN_BASE + 0x80 + 11) | ||
168 | #define AT91_PIN_PE12 (PIN_BASE + 0x80 + 12) | ||
169 | #define AT91_PIN_PE13 (PIN_BASE + 0x80 + 13) | ||
170 | #define AT91_PIN_PE14 (PIN_BASE + 0x80 + 14) | ||
171 | #define AT91_PIN_PE15 (PIN_BASE + 0x80 + 15) | ||
172 | #define AT91_PIN_PE16 (PIN_BASE + 0x80 + 16) | ||
173 | #define AT91_PIN_PE17 (PIN_BASE + 0x80 + 17) | ||
174 | #define AT91_PIN_PE18 (PIN_BASE + 0x80 + 18) | ||
175 | #define AT91_PIN_PE19 (PIN_BASE + 0x80 + 19) | ||
176 | #define AT91_PIN_PE20 (PIN_BASE + 0x80 + 20) | ||
177 | #define AT91_PIN_PE21 (PIN_BASE + 0x80 + 21) | ||
178 | #define AT91_PIN_PE22 (PIN_BASE + 0x80 + 22) | ||
179 | #define AT91_PIN_PE23 (PIN_BASE + 0x80 + 23) | ||
180 | #define AT91_PIN_PE24 (PIN_BASE + 0x80 + 24) | ||
181 | #define AT91_PIN_PE25 (PIN_BASE + 0x80 + 25) | ||
182 | #define AT91_PIN_PE26 (PIN_BASE + 0x80 + 26) | ||
183 | #define AT91_PIN_PE27 (PIN_BASE + 0x80 + 27) | ||
184 | #define AT91_PIN_PE28 (PIN_BASE + 0x80 + 28) | ||
185 | #define AT91_PIN_PE29 (PIN_BASE + 0x80 + 29) | ||
186 | #define AT91_PIN_PE30 (PIN_BASE + 0x80 + 30) | ||
187 | #define AT91_PIN_PE31 (PIN_BASE + 0x80 + 31) | ||
188 | |||
180 | #ifndef __ASSEMBLY__ | 189 | #ifndef __ASSEMBLY__ |
181 | /* setup setup routines, called from board init or driver probe() */ | 190 | /* setup setup routines, called from board init or driver probe() */ |
182 | extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup); | 191 | extern int __init_or_module at91_set_A_periph(unsigned pin, int use_pullup); |
diff --git a/include/asm-arm/arch-at91/hardware.h b/include/asm-arm/arch-at91/hardware.h index ccb7c7285b42..1637fc4a0d8f 100644 --- a/include/asm-arm/arch-at91/hardware.h +++ b/include/asm-arm/arch-at91/hardware.h | |||
@@ -28,15 +28,15 @@ | |||
28 | 28 | ||
29 | 29 | ||
30 | /* | 30 | /* |
31 | * Remap the peripherals from address 0xFFFA0000 .. 0xFFFFFFFF | 31 | * Remap the peripherals from address 0xFFF78000 .. 0xFFFFFFFF |
32 | * to 0xFEFA0000 .. 0xFF000000. (384Kb) | 32 | * to 0xFEF78000 .. 0xFF000000. (5444Kb) |
33 | */ | 33 | */ |
34 | #define AT91_IO_PHYS_BASE 0xFFFA0000 | 34 | #define AT91_IO_PHYS_BASE 0xFFF78000 |
35 | #define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) | 35 | #define AT91_IO_SIZE (0xFFFFFFFF - AT91_IO_PHYS_BASE + 1) |
36 | #define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE) | 36 | #define AT91_IO_VIRT_BASE (0xFF000000 - AT91_IO_SIZE) |
37 | 37 | ||
38 | /* Convert a physical IO address to virtual IO address */ | 38 | /* Convert a physical IO address to virtual IO address */ |
39 | #define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE) | 39 | #define AT91_IO_P2V(x) ((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE) |
40 | 40 | ||
41 | /* | 41 | /* |
42 | * Virtual to Physical Address mapping for IO devices. | 42 | * Virtual to Physical Address mapping for IO devices. |
diff --git a/include/asm-arm/arch-at91/irqs.h b/include/asm-arm/arch-at91/irqs.h index f041c98c5337..1ffa3bb9a9c1 100644 --- a/include/asm-arm/arch-at91/irqs.h +++ b/include/asm-arm/arch-at91/irqs.h | |||
@@ -37,8 +37,8 @@ | |||
37 | * IRQ interrupt symbols are the AT91xxx_ID_* symbols | 37 | * IRQ interrupt symbols are the AT91xxx_ID_* symbols |
38 | * for IRQs handled directly through the AIC, or else the AT91_PIN_* | 38 | * for IRQs handled directly through the AIC, or else the AT91_PIN_* |
39 | * symbols in gpio.h for ones handled indirectly as GPIOs. | 39 | * symbols in gpio.h for ones handled indirectly as GPIOs. |
40 | * We make provision for 4 banks of GPIO. | 40 | * We make provision for 5 banks of GPIO. |
41 | */ | 41 | */ |
42 | #define NR_IRQS (NR_AIC_IRQS + (4 * 32)) | 42 | #define NR_IRQS (NR_AIC_IRQS + (5 * 32)) |
43 | 43 | ||
44 | #endif | 44 | #endif |