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-rw-r--r--include/asm-arm/arch-at91/at91_mci.h2
-rw-r--r--include/asm-arm/arch-at91/at91rm9200.h5
-rw-r--r--include/asm-arm/arch-at91/at91sam9260.h7
-rw-r--r--include/asm-arm/arch-at91/at91sam9261.h4
-rw-r--r--include/asm-arm/arch-at91/at91sam9263.h4
-rw-r--r--include/asm-arm/arch-at91/at91sam9rl.h5
-rw-r--r--include/asm-arm/arch-at91/uncompress.h32
7 files changed, 50 insertions, 9 deletions
diff --git a/include/asm-arm/arch-at91/at91_mci.h b/include/asm-arm/arch-at91/at91_mci.h
index c2e11cc374ba..1551fc24eb43 100644
--- a/include/asm-arm/arch-at91/at91_mci.h
+++ b/include/asm-arm/arch-at91/at91_mci.h
@@ -89,7 +89,7 @@
89#define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */ 89#define AT91_MCI_ENDRX (1 << 6) /* End of RX Buffer */
90#define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */ 90#define AT91_MCI_ENDTX (1 << 7) /* End fo TX Buffer */
91#define AT91_MCI_SDIOIRQA (1 << 8) /* SDIO Interrupt for Slot A */ 91#define AT91_MCI_SDIOIRQA (1 << 8) /* SDIO Interrupt for Slot A */
92#define At91_MCI_SDIOIRQB (1 << 9) /* SDIO Interrupt for Slot B [AT91RM9200 only] */ 92#define AT91_MCI_SDIOIRQB (1 << 9) /* SDIO Interrupt for Slot B */
93#define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */ 93#define AT91_MCI_RXBUFF (1 << 14) /* RX Buffer Full */
94#define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */ 94#define AT91_MCI_TXBUFE (1 << 15) /* TX Buffer Empty */
95#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */ 95#define AT91_MCI_RINDE (1 << 16) /* Response Index Error */
diff --git a/include/asm-arm/arch-at91/at91rm9200.h b/include/asm-arm/arch-at91/at91rm9200.h
index 802891a9cd81..e8fc0b1c33f4 100644
--- a/include/asm-arm/arch-at91/at91rm9200.h
+++ b/include/asm-arm/arch-at91/at91rm9200.h
@@ -93,6 +93,11 @@
93#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */ 93#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) /* Real-Time Clock */
94#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */ 94#define AT91_MC (0xffffff00 - AT91_BASE_SYS) /* Memory Controllers */
95 95
96#define AT91_USART0 AT91RM9200_BASE_US0
97#define AT91_USART1 AT91RM9200_BASE_US1
98#define AT91_USART2 AT91RM9200_BASE_US2
99#define AT91_USART3 AT91RM9200_BASE_US3
100
96#define AT91_MATRIX 0 /* not supported */ 101#define AT91_MATRIX 0 /* not supported */
97 102
98/* 103/*
diff --git a/include/asm-arm/arch-at91/at91sam9260.h b/include/asm-arm/arch-at91/at91sam9260.h
index 0427f8698c07..c8934fe34dc5 100644
--- a/include/asm-arm/arch-at91/at91sam9260.h
+++ b/include/asm-arm/arch-at91/at91sam9260.h
@@ -99,6 +99,13 @@
99#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) 99#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
100#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 100#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
101 101
102#define AT91_USART0 AT91SAM9260_BASE_US0
103#define AT91_USART1 AT91SAM9260_BASE_US1
104#define AT91_USART2 AT91SAM9260_BASE_US2
105#define AT91_USART3 AT91SAM9260_BASE_US3
106#define AT91_USART4 AT91SAM9260_BASE_US4
107#define AT91_USART5 AT91SAM9260_BASE_US5
108
102 109
103/* 110/*
104 * Internal Memory. 111 * Internal Memory.
diff --git a/include/asm-arm/arch-at91/at91sam9261.h b/include/asm-arm/arch-at91/at91sam9261.h
index 9eb459570330..c7c4778dac49 100644
--- a/include/asm-arm/arch-at91/at91sam9261.h
+++ b/include/asm-arm/arch-at91/at91sam9261.h
@@ -84,6 +84,10 @@
84#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS) 84#define AT91_WDT (0xfffffd40 - AT91_BASE_SYS)
85#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS) 85#define AT91_GPBR (0xfffffd50 - AT91_BASE_SYS)
86 86
87#define AT91_USART0 AT91SAM9261_BASE_US0
88#define AT91_USART1 AT91SAM9261_BASE_US1
89#define AT91_USART2 AT91SAM9261_BASE_US2
90
87 91
88/* 92/*
89 * Internal Memory. 93 * Internal Memory.
diff --git a/include/asm-arm/arch-at91/at91sam9263.h b/include/asm-arm/arch-at91/at91sam9263.h
index 115c47ac7ebb..018a647311da 100644
--- a/include/asm-arm/arch-at91/at91sam9263.h
+++ b/include/asm-arm/arch-at91/at91sam9263.h
@@ -101,6 +101,10 @@
101#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS) 101#define AT91_RTT1 (0xfffffd50 - AT91_BASE_SYS)
102#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 102#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
103 103
104#define AT91_USART0 AT91SAM9263_BASE_US0
105#define AT91_USART1 AT91SAM9263_BASE_US1
106#define AT91_USART2 AT91SAM9263_BASE_US2
107
104#define AT91_SMC AT91_SMC0 108#define AT91_SMC AT91_SMC0
105 109
106/* 110/*
diff --git a/include/asm-arm/arch-at91/at91sam9rl.h b/include/asm-arm/arch-at91/at91sam9rl.h
index 8a9708a370c6..16d2832f6c0a 100644
--- a/include/asm-arm/arch-at91/at91sam9rl.h
+++ b/include/asm-arm/arch-at91/at91sam9rl.h
@@ -94,6 +94,11 @@
94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS) 94#define AT91_GPBR (0xfffffd60 - AT91_BASE_SYS)
95#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS) 95#define AT91_RTC (0xfffffe00 - AT91_BASE_SYS)
96 96
97#define AT91_USART0 AT91SAM9RL_BASE_US0
98#define AT91_USART1 AT91SAM9RL_BASE_US1
99#define AT91_USART2 AT91SAM9RL_BASE_US2
100#define AT91_USART3 AT91SAM9RL_BASE_US3
101
97 102
98/* 103/*
99 * Internal Memory. 104 * Internal Memory.
diff --git a/include/asm-arm/arch-at91/uncompress.h b/include/asm-arm/arch-at91/uncompress.h
index 272a7e0dc6cf..f5636a8f6132 100644
--- a/include/asm-arm/arch-at91/uncompress.h
+++ b/include/asm-arm/arch-at91/uncompress.h
@@ -22,7 +22,23 @@
22#define __ASM_ARCH_UNCOMPRESS_H 22#define __ASM_ARCH_UNCOMPRESS_H
23 23
24#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/arch/at91_dbgu.h> 25#include <linux/atmel_serial.h>
26
27#if defined(CONFIG_AT91_EARLY_DBGU)
28#define UART_OFFSET (AT91_DBGU + AT91_BASE_SYS)
29#elif defined(CONFIG_AT91_EARLY_USART0)
30#define UART_OFFSET AT91_USART0
31#elif defined(CONFIG_AT91_EARLY_USART1)
32#define UART_OFFSET AT91_USART1
33#elif defined(CONFIG_AT91_EARLY_USART2)
34#define UART_OFFSET AT91_USART2
35#elif defined(CONFIG_AT91_EARLY_USART3)
36#define UART_OFFSET AT91_USART3
37#elif defined(CONFIG_AT91_EARLY_USART4)
38#define UART_OFFSET AT91_USART4
39#elif defined(CONFIG_AT91_EARLY_USART5)
40#define UART_OFFSET AT91_USART5
41#endif
26 42
27/* 43/*
28 * The following code assumes the serial port has already been 44 * The following code assumes the serial port has already been
@@ -33,22 +49,22 @@
33 */ 49 */
34static void putc(int c) 50static void putc(int c)
35{ 51{
36#ifdef AT91_DBGU 52#ifdef UART_OFFSET
37 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ 53 void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
38 54
39 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXRDY)) 55 while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXRDY))
40 barrier(); 56 barrier();
41 __raw_writel(c, sys + AT91_DBGU_THR); 57 __raw_writel(c, sys + ATMEL_US_THR);
42#endif 58#endif
43} 59}
44 60
45static inline void flush(void) 61static inline void flush(void)
46{ 62{
47#ifdef AT91_DBGU 63#ifdef UART_OFFSET
48 void __iomem *sys = (void __iomem *) AT91_BASE_SYS; /* physical address */ 64 void __iomem *sys = (void __iomem *) UART_OFFSET; /* physical address */
49 65
50 /* wait for transmission to complete */ 66 /* wait for transmission to complete */
51 while (!(__raw_readl(sys + AT91_DBGU_SR) & AT91_DBGU_TXEMPTY)) 67 while (!(__raw_readl(sys + ATMEL_US_CSR) & ATMEL_US_TXEMPTY))
52 barrier(); 68 barrier();
53#endif 69#endif
54} 70}