1 files changed, 33 insertions, 27 deletions

diff --git a/include/acpi/actbl.h b/include/acpi/actbl.h
index 59a73e1b2845..4f94b1d812d5 100644
--- a/include/acpi/actbl.h
+++ b/include/acpi/actbl.h
@@ -79,9 +79,15 @@
 #pragma pack(1)
 
 /*
- * Note about bitfields: The u8 type is used for bitfields in ACPI tables.
- * This is the only type that is even remotely portable. Anything else is not
- * portable, so do not use any other bitfield types.
+ * Note: C bitfields are not used for this reason:
+ *
+ * "Bitfields are great and easy to read, but unfortunately the C language
+ * does not specify the layout of bitfields in memory, which means they are
+ * essentially useless for dealing with packed data in on-disk formats or
+ * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me,
+ * this decision was a design error in C. Ritchie could have picked an order
+ * and stuck with it." Norman Ramsey.
+ * See http://stackoverflow.com/a/1053662/41661
  */
 
 /*******************************************************************************
@@ -94,7 +100,7 @@
 struct acpi_table_header {
         char signature[ACPI_NAME_SIZE]; /* ASCII table signature */
         u32 length;             /* Length of table in bytes, including this header */
-        u8 revision;            /* ACPI Specification minor version # */
+        u8 revision;            /* ACPI Specification minor version number */
         u8 checksum;            /* To make sum of entire table == 0 */
         char oem_id[ACPI_OEM_ID_SIZE];  /* ASCII OEM identification */
         char oem_table_id[ACPI_OEM_TABLE_ID_SIZE];      /* ASCII OEM table identification */
@@ -108,7 +114,7 @@ struct acpi_table_header {
  * GAS - Generic Address Structure (ACPI 2.0+)
  *
  * Note: Since this structure is used in the ACPI tables, it is byte aligned.
- * If misaliged access is not supported by the hardware, accesses to the
+ * If misaligned access is not supported by the hardware, accesses to the
  * 64-bit Address field must be performed with care.
  *
  ******************************************************************************/
@@ -210,18 +216,18 @@ struct acpi_table_fadt {
         u8 preferred_profile;   /* Conveys preferred power management profile to OSPM. */
         u16 sci_interrupt;      /* System vector of SCI interrupt */
         u32 smi_command;        /* 32-bit Port address of SMI command port */
-        u8 acpi_enable;         /* Value to write to smi_cmd to enable ACPI */
-        u8 acpi_disable;        /* Value to write to smi_cmd to disable ACPI */
-        u8 s4_bios_request;     /* Value to write to SMI CMD to enter S4BIOS state */
+        u8 acpi_enable;         /* Value to write to SMI_CMD to enable ACPI */
+        u8 acpi_disable;        /* Value to write to SMI_CMD to disable ACPI */
+        u8 s4_bios_request;     /* Value to write to SMI_CMD to enter S4BIOS state */
         u8 pstate_control;      /* Processor performance state control */
-        u32 pm1a_event_block;   /* 32-bit Port address of Power Mgt 1a Event Reg Blk */
-        u32 pm1b_event_block;   /* 32-bit Port address of Power Mgt 1b Event Reg Blk */
-        u32 pm1a_control_block; /* 32-bit Port address of Power Mgt 1a Control Reg Blk */
-        u32 pm1b_control_block; /* 32-bit Port address of Power Mgt 1b Control Reg Blk */
-        u32 pm2_control_block;  /* 32-bit Port address of Power Mgt 2 Control Reg Blk */
-        u32 pm_timer_block;     /* 32-bit Port address of Power Mgt Timer Ctrl Reg Blk */
-        u32 gpe0_block;         /* 32-bit Port address of General Purpose Event 0 Reg Blk */
-        u32 gpe1_block;         /* 32-bit Port address of General Purpose Event 1 Reg Blk */
+        u32 pm1a_event_block;   /* 32-bit port address of Power Mgt 1a Event Reg Blk */
+        u32 pm1b_event_block;   /* 32-bit port address of Power Mgt 1b Event Reg Blk */
+        u32 pm1a_control_block; /* 32-bit port address of Power Mgt 1a Control Reg Blk */
+        u32 pm1b_control_block; /* 32-bit port address of Power Mgt 1b Control Reg Blk */
+        u32 pm2_control_block;  /* 32-bit port address of Power Mgt 2 Control Reg Blk */
+        u32 pm_timer_block;     /* 32-bit port address of Power Mgt Timer Ctrl Reg Blk */
+        u32 gpe0_block;         /* 32-bit port address of General Purpose Event 0 Reg Blk */
+        u32 gpe1_block;         /* 32-bit port address of General Purpose Event 1 Reg Blk */
         u8 pm1_event_length;    /* Byte Length of ports at pm1x_event_block */
         u8 pm1_control_length;  /* Byte Length of ports at pm1x_control_block */
         u8 pm2_control_length;  /* Byte Length of ports at pm2_control_block */
@@ -229,12 +235,12 @@ struct acpi_table_fadt {
         u8 gpe0_block_length;   /* Byte Length of ports at gpe0_block */
         u8 gpe1_block_length;   /* Byte Length of ports at gpe1_block */
         u8 gpe1_base;           /* Offset in GPE number space where GPE1 events start */
-        u8 cst_control;         /* Support for the _CST object and C States change notification */
+        u8 cst_control;         /* Support for the _CST object and C-States change notification */
         u16 c2_latency;         /* Worst case HW latency to enter/exit C2 state */
         u16 c3_latency;         /* Worst case HW latency to enter/exit C3 state */
-        u16 flush_size;         /* Processor's memory cache line width, in bytes */
+        u16 flush_size;         /* Processor memory cache line width, in bytes */
         u16 flush_stride;       /* Number of flush strides that need to be read */
-        u8 duty_offset;         /* Processor duty cycle index in processor's P_CNT reg */
+        u8 duty_offset;         /* Processor duty cycle index in processor P_CNT reg */
         u8 duty_width;          /* Processor duty cycle value bit width in P_CNT register */
         u8 day_alarm;           /* Index to day-of-month alarm in RTC CMOS RAM */
         u8 month_alarm;         /* Index to month-of-year alarm in RTC CMOS RAM */
@@ -255,11 +261,11 @@ struct acpi_table_fadt {
         struct acpi_generic_address xpm_timer_block;    /* 64-bit Extended Power Mgt Timer Ctrl Reg Blk address */
         struct acpi_generic_address xgpe0_block;        /* 64-bit Extended General Purpose Event 0 Reg Blk address */
         struct acpi_generic_address xgpe1_block;        /* 64-bit Extended General Purpose Event 1 Reg Blk address */
-        struct acpi_generic_address sleep_control;      /* 64-bit Sleep Control register */
-        struct acpi_generic_address sleep_status;       /* 64-bit Sleep Status register */
+        struct acpi_generic_address sleep_control;      /* 64-bit Sleep Control register (ACPI 5.0) */
+        struct acpi_generic_address sleep_status;       /* 64-bit Sleep Status register (ACPI 5.0) */
 };
 
-/* Masks for FADT Boot Architecture Flags (boot_flags) */
+/* Masks for FADT Boot Architecture Flags (boot_flags) [Vx]=Introduced in this FADT revision */
 
 #define ACPI_FADT_LEGACY_DEVICES    (1)         /* 00: [V2] System has LPC or ISA bus devices */
 #define ACPI_FADT_8042              (1<<1)      /* 01: [V3] System has an 8042 controller on port 60/64 */
@@ -272,13 +278,13 @@ struct acpi_table_fadt {
 
 /* Masks for FADT flags */
 
-#define ACPI_FADT_WBINVD            (1) /* 00: [V1] The wbinvd instruction works properly */
-#define ACPI_FADT_WBINVD_FLUSH      (1<<1)      /* 01: [V1] wbinvd flushes but does not invalidate caches */
+#define ACPI_FADT_WBINVD            (1) /* 00: [V1] The WBINVD instruction works properly */
+#define ACPI_FADT_WBINVD_FLUSH      (1<<1)      /* 01: [V1] WBINVD flushes but does not invalidate caches */
 #define ACPI_FADT_C1_SUPPORTED      (1<<2)      /* 02: [V1] All processors support C1 state */
 #define ACPI_FADT_C2_MP_SUPPORTED   (1<<3)      /* 03: [V1] C2 state works on MP system */
 #define ACPI_FADT_POWER_BUTTON      (1<<4)      /* 04: [V1] Power button is handled as a control method device */
 #define ACPI_FADT_SLEEP_BUTTON      (1<<5)      /* 05: [V1] Sleep button is handled as a control method device */
-#define ACPI_FADT_FIXED_RTC         (1<<6)      /* 06: [V1] RTC wakeup status not in fixed register space */
+#define ACPI_FADT_FIXED_RTC         (1<<6)      /* 06: [V1] RTC wakeup status is not in fixed register space */
 #define ACPI_FADT_S4_RTC_WAKE       (1<<7)      /* 07: [V1] RTC alarm can wake system from S4 */
 #define ACPI_FADT_32BIT_TIMER       (1<<8)      /* 08: [V1] ACPI timer width is 32-bit (0=24-bit) */
 #define ACPI_FADT_DOCKING_SUPPORTED (1<<9)      /* 09: [V1] Docking supported */
@@ -297,7 +303,7 @@ struct acpi_table_fadt {
 
 /* Values for preferred_profile (Preferred Power Management Profiles) */
 
-enum acpi_prefered_pm_profiles {
+enum acpi_preferred_pm_profiles {
         PM_UNSPECIFIED = 0,
         PM_DESKTOP = 1,
         PM_MOBILE = 2,
@@ -335,7 +341,7 @@ union acpi_name_union {
 struct acpi_table_desc {
         acpi_physical_address address;
         struct acpi_table_header *pointer;
-        u32 length;             /* Length fixed at 32 bits */
+        u32 length;             /* Length fixed at 32 bits (fixed in table header) */
         union acpi_name_union signature;
         acpi_owner_id owner_id;
         u8 flags;