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-rw-r--r--drivers/Makefile3
-rw-r--r--drivers/acpi/Kconfig2
-rw-r--r--drivers/acpi/acpica/accommon.h2
-rw-r--r--drivers/acpi/acpica/acconfig.h2
-rw-r--r--drivers/acpi/acpica/acdebug.h2
-rw-r--r--drivers/acpi/acpica/acdispat.h2
-rw-r--r--drivers/acpi/acpica/acevents.h2
-rw-r--r--drivers/acpi/acpica/acglobal.h2
-rw-r--r--drivers/acpi/acpica/achware.h2
-rw-r--r--drivers/acpi/acpica/acinterp.h2
-rw-r--r--drivers/acpi/acpica/aclocal.h2
-rw-r--r--drivers/acpi/acpica/acmacros.h2
-rw-r--r--drivers/acpi/acpica/acnamesp.h2
-rw-r--r--drivers/acpi/acpica/acobject.h16
-rw-r--r--drivers/acpi/acpica/acopcode.h2
-rw-r--r--drivers/acpi/acpica/acparser.h2
-rw-r--r--drivers/acpi/acpica/acpredef.h2
-rw-r--r--drivers/acpi/acpica/acresrc.h2
-rw-r--r--drivers/acpi/acpica/acstruct.h2
-rw-r--r--drivers/acpi/acpica/actables.h2
-rw-r--r--drivers/acpi/acpica/acutils.h2
-rw-r--r--drivers/acpi/acpica/amlcode.h10
-rw-r--r--drivers/acpi/acpica/amlresrc.h2
-rw-r--r--drivers/acpi/acpica/dsfield.c2
-rw-r--r--drivers/acpi/acpica/dsinit.c2
-rw-r--r--drivers/acpi/acpica/dsmethod.c64
-rw-r--r--drivers/acpi/acpica/dsmthdat.c2
-rw-r--r--drivers/acpi/acpica/dsobject.c2
-rw-r--r--drivers/acpi/acpica/dsopcode.c2
-rw-r--r--drivers/acpi/acpica/dsutils.c2
-rw-r--r--drivers/acpi/acpica/dswexec.c2
-rw-r--r--drivers/acpi/acpica/dswload.c2
-rw-r--r--drivers/acpi/acpica/dswscope.c2
-rw-r--r--drivers/acpi/acpica/dswstate.c2
-rw-r--r--drivers/acpi/acpica/evevent.c2
-rw-r--r--drivers/acpi/acpica/evgpe.c4
-rw-r--r--drivers/acpi/acpica/evgpeblk.c2
-rw-r--r--drivers/acpi/acpica/evgpeinit.c2
-rw-r--r--drivers/acpi/acpica/evgpeutil.c2
-rw-r--r--drivers/acpi/acpica/evmisc.c2
-rw-r--r--drivers/acpi/acpica/evregion.c2
-rw-r--r--drivers/acpi/acpica/evrgnini.c6
-rw-r--r--drivers/acpi/acpica/evsci.c2
-rw-r--r--drivers/acpi/acpica/evxface.c2
-rw-r--r--drivers/acpi/acpica/evxfevnt.c2
-rw-r--r--drivers/acpi/acpica/evxfgpe.c2
-rw-r--r--drivers/acpi/acpica/evxfregn.c2
-rw-r--r--drivers/acpi/acpica/exconfig.c2
-rw-r--r--drivers/acpi/acpica/exconvrt.c2
-rw-r--r--drivers/acpi/acpica/excreate.c10
-rw-r--r--drivers/acpi/acpica/exdebug.c2
-rw-r--r--drivers/acpi/acpica/exdump.c4
-rw-r--r--drivers/acpi/acpica/exfield.c2
-rw-r--r--drivers/acpi/acpica/exfldio.c2
-rw-r--r--drivers/acpi/acpica/exmisc.c2
-rw-r--r--drivers/acpi/acpica/exmutex.c2
-rw-r--r--drivers/acpi/acpica/exnames.c2
-rw-r--r--drivers/acpi/acpica/exoparg1.c2
-rw-r--r--drivers/acpi/acpica/exoparg2.c2
-rw-r--r--drivers/acpi/acpica/exoparg3.c2
-rw-r--r--drivers/acpi/acpica/exoparg6.c2
-rw-r--r--drivers/acpi/acpica/exprep.c2
-rw-r--r--drivers/acpi/acpica/exregion.c2
-rw-r--r--drivers/acpi/acpica/exresnte.c2
-rw-r--r--drivers/acpi/acpica/exresolv.c2
-rw-r--r--drivers/acpi/acpica/exresop.c2
-rw-r--r--drivers/acpi/acpica/exstore.c2
-rw-r--r--drivers/acpi/acpica/exstoren.c2
-rw-r--r--drivers/acpi/acpica/exstorob.c2
-rw-r--r--drivers/acpi/acpica/exsystem.c2
-rw-r--r--drivers/acpi/acpica/exutils.c2
-rw-r--r--drivers/acpi/acpica/hwacpi.c2
-rw-r--r--drivers/acpi/acpica/hwgpe.c2
-rw-r--r--drivers/acpi/acpica/hwpci.c2
-rw-r--r--drivers/acpi/acpica/hwregs.c2
-rw-r--r--drivers/acpi/acpica/hwsleep.c2
-rw-r--r--drivers/acpi/acpica/hwtimer.c2
-rw-r--r--drivers/acpi/acpica/hwvalid.c2
-rw-r--r--drivers/acpi/acpica/hwxface.c2
-rw-r--r--drivers/acpi/acpica/nsaccess.c8
-rw-r--r--drivers/acpi/acpica/nsalloc.c15
-rw-r--r--drivers/acpi/acpica/nsdump.c17
-rw-r--r--drivers/acpi/acpica/nsdumpdv.c2
-rw-r--r--drivers/acpi/acpica/nseval.c4
-rw-r--r--drivers/acpi/acpica/nsinit.c2
-rw-r--r--drivers/acpi/acpica/nsload.c2
-rw-r--r--drivers/acpi/acpica/nsnames.c2
-rw-r--r--drivers/acpi/acpica/nsobject.c2
-rw-r--r--drivers/acpi/acpica/nsparse.c2
-rw-r--r--drivers/acpi/acpica/nspredef.c2
-rw-r--r--drivers/acpi/acpica/nsrepair.c2
-rw-r--r--drivers/acpi/acpica/nsrepair2.c2
-rw-r--r--drivers/acpi/acpica/nssearch.c2
-rw-r--r--drivers/acpi/acpica/nsutils.c2
-rw-r--r--drivers/acpi/acpica/nswalk.c2
-rw-r--r--drivers/acpi/acpica/nsxfeval.c2
-rw-r--r--drivers/acpi/acpica/nsxfname.c7
-rw-r--r--drivers/acpi/acpica/nsxfobj.c2
-rw-r--r--drivers/acpi/acpica/psargs.c2
-rw-r--r--drivers/acpi/acpica/psloop.c4
-rw-r--r--drivers/acpi/acpica/psopcode.c2
-rw-r--r--drivers/acpi/acpica/psparse.c27
-rw-r--r--drivers/acpi/acpica/psscope.c2
-rw-r--r--drivers/acpi/acpica/pstree.c2
-rw-r--r--drivers/acpi/acpica/psutils.c2
-rw-r--r--drivers/acpi/acpica/pswalk.c2
-rw-r--r--drivers/acpi/acpica/psxface.c9
-rw-r--r--drivers/acpi/acpica/rsaddr.c2
-rw-r--r--drivers/acpi/acpica/rscalc.c2
-rw-r--r--drivers/acpi/acpica/rscreate.c2
-rw-r--r--drivers/acpi/acpica/rsdump.c2
-rw-r--r--drivers/acpi/acpica/rsinfo.c2
-rw-r--r--drivers/acpi/acpica/rsio.c2
-rw-r--r--drivers/acpi/acpica/rsirq.c2
-rw-r--r--drivers/acpi/acpica/rslist.c2
-rw-r--r--drivers/acpi/acpica/rsmemory.c2
-rw-r--r--drivers/acpi/acpica/rsmisc.c2
-rw-r--r--drivers/acpi/acpica/rsutils.c2
-rw-r--r--drivers/acpi/acpica/rsxface.c2
-rw-r--r--drivers/acpi/acpica/tbfadt.c2
-rw-r--r--drivers/acpi/acpica/tbfind.c2
-rw-r--r--drivers/acpi/acpica/tbinstal.c2
-rw-r--r--drivers/acpi/acpica/tbutils.c2
-rw-r--r--drivers/acpi/acpica/tbxface.c2
-rw-r--r--drivers/acpi/acpica/tbxfroot.c2
-rw-r--r--drivers/acpi/acpica/utalloc.c2
-rw-r--r--drivers/acpi/acpica/utcopy.c2
-rw-r--r--drivers/acpi/acpica/utdebug.c2
-rw-r--r--drivers/acpi/acpica/utdelete.c2
-rw-r--r--drivers/acpi/acpica/uteval.c2
-rw-r--r--drivers/acpi/acpica/utglobal.c2
-rw-r--r--drivers/acpi/acpica/utids.c2
-rw-r--r--drivers/acpi/acpica/utinit.c2
-rw-r--r--drivers/acpi/acpica/utlock.c2
-rw-r--r--drivers/acpi/acpica/utmath.c2
-rw-r--r--drivers/acpi/acpica/utmisc.c2
-rw-r--r--drivers/acpi/acpica/utmutex.c2
-rw-r--r--drivers/acpi/acpica/utobject.c2
-rw-r--r--drivers/acpi/acpica/utosi.c2
-rw-r--r--drivers/acpi/acpica/utresrc.c2
-rw-r--r--drivers/acpi/acpica/utstate.c2
-rw-r--r--drivers/acpi/acpica/utxface.c2
-rw-r--r--drivers/acpi/acpica/utxferror.c2
-rw-r--r--drivers/acpi/battery.c1
-rw-r--r--drivers/acpi/nvs.c7
-rw-r--r--drivers/acpi/osl.c12
-rw-r--r--drivers/acpi/sleep.c2
-rw-r--r--drivers/ata/Kconfig2
-rw-r--r--drivers/atm/idt77105.c2
-rw-r--r--drivers/base/Kconfig2
-rw-r--r--drivers/char/Kconfig12
-rw-r--r--drivers/char/Makefile13
-rw-r--r--drivers/char/tpm/tpm.c10
-rw-r--r--drivers/char/tpm/tpm_tis.c6
-rw-r--r--drivers/clocksource/acpi_pm.c6
-rw-r--r--drivers/cpufreq/Kconfig2
-rw-r--r--drivers/firewire/Kconfig6
-rw-r--r--drivers/firewire/core-card.c11
-rw-r--r--drivers/firewire/net.c9
-rw-r--r--drivers/firmware/Kconfig2
-rw-r--r--drivers/gpu/drm/Kconfig2
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c4
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.c5
-rw-r--r--drivers/gpu/drm/i915/intel_ringbuffer.h1
-rw-r--r--drivers/gpu/drm/nouveau/Kconfig2
-rw-r--r--drivers/gpu/vga/Kconfig2
-rw-r--r--drivers/hid/Kconfig64
-rw-r--r--drivers/hid/usbhid/Kconfig2
-rw-r--r--drivers/ide/Kconfig2
-rw-r--r--drivers/idle/intel_idle.c8
-rw-r--r--drivers/infiniband/hw/mthca/Kconfig2
-rw-r--r--drivers/infiniband/ulp/ipoib/Kconfig2
-rw-r--r--drivers/input/Kconfig6
-rw-r--r--drivers/input/keyboard/Kconfig4
-rw-r--r--drivers/input/mouse/Kconfig10
-rw-r--r--drivers/input/serio/Kconfig6
-rw-r--r--drivers/input/touchscreen/Kconfig30
-rw-r--r--drivers/leds/ledtrig-gpio.c15
-rw-r--r--drivers/lguest/page_tables.c2
-rw-r--r--drivers/lguest/x86/core.c4
-rw-r--r--drivers/macintosh/therm_pm72.c4
-rw-r--r--drivers/media/common/saa7146_core.c2
-rw-r--r--drivers/media/common/saa7146_fops.c8
-rw-r--r--drivers/media/common/saa7146_vbi.c2
-rw-r--r--drivers/media/common/saa7146_video.c20
-rw-r--r--drivers/media/common/tuners/Kconfig2
-rw-r--r--drivers/media/common/tuners/tda8290.c130
-rw-r--r--drivers/media/dvb/dvb-usb/dib0700_core.c6
-rw-r--r--drivers/media/dvb/firewire/firedtv-rc.c9
-rw-r--r--drivers/media/dvb/frontends/Kconfig2
-rw-r--r--drivers/media/dvb/frontends/af9013.c4
-rw-r--r--drivers/media/dvb/frontends/ix2505v.c2
-rw-r--r--drivers/media/dvb/frontends/mb86a20s.c36
-rw-r--r--drivers/media/dvb/ttpci/av7110_ca.c2
-rw-r--r--drivers/media/radio/Kconfig14
-rw-r--r--drivers/media/radio/Makefile1
-rw-r--r--drivers/media/radio/radio-aimslab.c1
-rw-r--r--drivers/media/radio/radio-gemtek-pci.c478
-rw-r--r--drivers/media/radio/radio-maxiradio.c4
-rw-r--r--drivers/media/radio/radio-wl1273.c2
-rw-r--r--drivers/media/radio/si470x/radio-si470x-common.c9
-rw-r--r--drivers/media/rc/ene_ir.c23
-rw-r--r--drivers/media/rc/ene_ir.h2
-rw-r--r--drivers/media/rc/imon.c60
-rw-r--r--drivers/media/rc/ir-raw.c2
-rw-r--r--drivers/media/rc/keymaps/rc-dib0700-nec.c52
-rw-r--r--drivers/media/rc/mceusb.c3
-rw-r--r--drivers/media/video/Kconfig11
-rw-r--r--drivers/media/video/Makefile1
-rw-r--r--drivers/media/video/adv7175.c11
-rw-r--r--drivers/media/video/bt8xx/bttv-cards.c39
-rw-r--r--drivers/media/video/bt8xx/bttv.h1
-rw-r--r--drivers/media/video/cafe_ccic.c11
-rw-r--r--drivers/media/video/cpia2/cpia2.h2
-rw-r--r--drivers/media/video/cpia2/cpia2_core.c65
-rw-r--r--drivers/media/video/cpia2/cpia2_v4l.c104
-rw-r--r--drivers/media/video/cx18/cx18-driver.c24
-rw-r--r--drivers/media/video/cx18/cx18-driver.h3
-rw-r--r--drivers/media/video/cx18/cx18-streams.h3
-rw-r--r--drivers/media/video/cx231xx/cx231xx-dvb.c5
-rw-r--r--drivers/media/video/cx25840/cx25840-core.c22
-rw-r--r--drivers/media/video/davinci/vpif.c177
-rw-r--r--drivers/media/video/davinci/vpif.h18
-rw-r--r--drivers/media/video/davinci/vpif_capture.c451
-rw-r--r--drivers/media/video/davinci/vpif_capture.h2
-rw-r--r--drivers/media/video/davinci/vpif_display.c474
-rw-r--r--drivers/media/video/davinci/vpif_display.h2
-rw-r--r--drivers/media/video/em28xx/em28xx-cards.c19
-rw-r--r--drivers/media/video/et61x251/et61x251.h24
-rw-r--r--drivers/media/video/gspca/benq.c2
-rw-r--r--drivers/media/video/gspca/conex.c4
-rw-r--r--drivers/media/video/gspca/cpia1.c2
-rw-r--r--drivers/media/video/gspca/etoms.c4
-rw-r--r--drivers/media/video/gspca/finepix.c2
-rw-r--r--drivers/media/video/gspca/gl860/gl860.c2
-rw-r--r--drivers/media/video/gspca/gspca.c210
-rw-r--r--drivers/media/video/gspca/gspca.h2
-rw-r--r--drivers/media/video/gspca/jeilinj.c2
-rw-r--r--drivers/media/video/gspca/jpeg.h4
-rw-r--r--drivers/media/video/gspca/konica.c2
-rw-r--r--drivers/media/video/gspca/m5602/m5602_core.c2
-rw-r--r--drivers/media/video/gspca/mars.c2
-rw-r--r--drivers/media/video/gspca/mr97310a.c2
-rw-r--r--drivers/media/video/gspca/ov519.c8
-rw-r--r--drivers/media/video/gspca/ov534.c29
-rw-r--r--drivers/media/video/gspca/ov534_9.c2
-rw-r--r--drivers/media/video/gspca/pac207.c2
-rw-r--r--drivers/media/video/gspca/pac7302.c4
-rw-r--r--drivers/media/video/gspca/pac7311.c4
-rw-r--r--drivers/media/video/gspca/sn9c2028.c2
-rw-r--r--drivers/media/video/gspca/sn9c20x.c2
-rw-r--r--drivers/media/video/gspca/sonixb.c270
-rw-r--r--drivers/media/video/gspca/sonixj.c155
-rw-r--r--drivers/media/video/gspca/spca1528.c2
-rw-r--r--drivers/media/video/gspca/spca500.c2
-rw-r--r--drivers/media/video/gspca/spca501.c2
-rw-r--r--drivers/media/video/gspca/spca505.c2
-rw-r--r--drivers/media/video/gspca/spca508.c2
-rw-r--r--drivers/media/video/gspca/spca561.c2
-rw-r--r--drivers/media/video/gspca/sq905.c2
-rw-r--r--drivers/media/video/gspca/sq905c.c2
-rw-r--r--drivers/media/video/gspca/sq930x.c2
-rw-r--r--drivers/media/video/gspca/stk014.c2
-rw-r--r--drivers/media/video/gspca/stv0680.c2
-rw-r--r--drivers/media/video/gspca/stv06xx/stv06xx.c2
-rw-r--r--drivers/media/video/gspca/sunplus.c2
-rw-r--r--drivers/media/video/gspca/t613.c2
-rw-r--r--drivers/media/video/gspca/tv8532.c2
-rw-r--r--drivers/media/video/gspca/vc032x.c2
-rw-r--r--drivers/media/video/gspca/xirlink_cit.c2
-rw-r--r--drivers/media/video/gspca/zc3xx.c2
-rw-r--r--drivers/media/video/hdpvr/Makefile4
-rw-r--r--drivers/media/video/hdpvr/hdpvr-core.c10
-rw-r--r--drivers/media/video/hdpvr/hdpvr-i2c.c143
-rw-r--r--drivers/media/video/hdpvr/hdpvr-video.c7
-rw-r--r--drivers/media/video/hdpvr/hdpvr.h5
-rw-r--r--drivers/media/video/ir-kbd-i2c.c12
-rw-r--r--drivers/media/video/ivtv/ivtv-i2c.c9
-rw-r--r--drivers/media/video/mt9v011.c54
-rw-r--r--drivers/media/video/mt9v011.h36
-rw-r--r--drivers/media/video/ov7670.c74
-rw-r--r--drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h2
-rw-r--r--drivers/media/video/pvrusb2/pvrusb2-i2c-core.c62
-rw-r--r--drivers/media/video/saa7134/saa7134-cards.c51
-rw-r--r--drivers/media/video/saa7134/saa7134-dvb.c80
-rw-r--r--drivers/media/video/sn9c102/sn9c102_devtable.h74
-rw-r--r--drivers/media/video/sr030pc30.c10
-rw-r--r--drivers/media/video/tda9875.c411
-rw-r--r--drivers/media/video/tlg2300/pd-video.c13
-rw-r--r--drivers/media/video/v4l2-common.c19
-rw-r--r--drivers/media/video/v4l2-ctrls.c34
-rw-r--r--drivers/media/video/v4l2-dev.c9
-rw-r--r--drivers/media/video/v4l2-device.c16
-rw-r--r--drivers/media/video/v4l2-ioctl.c20
-rw-r--r--drivers/media/video/w9966.c1
-rw-r--r--drivers/media/video/zoran/zoran_card.c2
-rw-r--r--drivers/net/Kconfig2
-rw-r--r--drivers/net/arm/ks8695net.c2
-rw-r--r--drivers/net/atl1c/atl1c_hw.c15
-rw-r--r--drivers/net/atl1c/atl1c_hw.h43
-rw-r--r--drivers/net/atl1e/atl1e_ethtool.c12
-rw-r--r--drivers/net/atl1e/atl1e_hw.c34
-rw-r--r--drivers/net/atl1e/atl1e_hw.h111
-rw-r--r--drivers/net/atl1e/atl1e_main.c4
-rw-r--r--drivers/net/bna/bnad.c108
-rw-r--r--drivers/net/bna/bnad.h2
-rw-r--r--drivers/net/bnx2.c29
-rw-r--r--drivers/net/bnx2.h5
-rw-r--r--drivers/net/bnx2x/bnx2x.h11
-rw-r--r--drivers/net/bnx2x/bnx2x_hsi.h118
-rw-r--r--drivers/net/bnx2x/bnx2x_link.c2727
-rw-r--r--drivers/net/bnx2x/bnx2x_link.h34
-rw-r--r--drivers/net/bnx2x/bnx2x_main.c133
-rw-r--r--drivers/net/bnx2x/bnx2x_reg.h5
-rw-r--r--drivers/net/bonding/bond_3ad.c4
-rw-r--r--drivers/net/bonding/bond_alb.c4
-rw-r--r--drivers/net/bonding/bond_main.c12
-rw-r--r--drivers/net/bonding/bond_sysfs.c4
-rw-r--r--drivers/net/can/Kconfig4
-rw-r--r--drivers/net/can/Makefile1
-rw-r--r--drivers/net/can/at91_can.c138
-rw-r--r--drivers/net/can/softing/Kconfig30
-rw-r--r--drivers/net/can/softing/Makefile6
-rw-r--r--drivers/net/can/softing/softing.h167
-rw-r--r--drivers/net/can/softing/softing_cs.c359
-rw-r--r--drivers/net/can/softing/softing_fw.c691
-rw-r--r--drivers/net/can/softing/softing_main.c893
-rw-r--r--drivers/net/can/softing/softing_platform.h40
-rw-r--r--drivers/net/cnic.c182
-rw-r--r--drivers/net/cnic.h2
-rw-r--r--drivers/net/cnic_if.h8
-rw-r--r--drivers/net/cxgb4/cxgb4_main.c3
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-rw-r--r--drivers/net/e1000e/lib.c4
-rw-r--r--drivers/net/e1000e/netdev.c117
-rw-r--r--drivers/net/e1000e/phy.c8
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-rw-r--r--drivers/net/macvtap.c18
-rw-r--r--drivers/net/myri10ge/myri10ge.c4
-rw-r--r--drivers/net/ns83820.c5
-rw-r--r--drivers/net/pch_gbe/pch_gbe_main.c2
-rw-r--r--drivers/net/ppp_generic.c148
-rw-r--r--drivers/net/sfc/ethtool.c4
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-rw-r--r--drivers/net/vxge/vxge-config.h10
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-rw-r--r--drivers/net/vxge/vxge-main.h23
-rw-r--r--drivers/net/vxge/vxge-traffic.c116
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-rw-r--r--drivers/pcmcia/Kconfig12
-rw-r--r--drivers/rapidio/rio-scan.c2
-rw-r--r--drivers/rtc/Kconfig12
-rw-r--r--drivers/rtc/interface.c61
-rw-r--r--drivers/s390/net/qeth_l2_main.c18
-rw-r--r--drivers/s390/net/qeth_l3_main.c22
-rw-r--r--drivers/ssb/Kconfig2
-rw-r--r--drivers/staging/lirc/TODO.lirc_zilog36
-rw-r--r--drivers/staging/lirc/lirc_imon.c1
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-rw-r--r--drivers/staging/lirc/lirc_parallel.c19
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-rw-r--r--drivers/staging/lirc/lirc_sir.c1
-rw-r--r--drivers/staging/lirc/lirc_zilog.c650
-rw-r--r--drivers/staging/tm6000/tm6000-video.c46
-rw-r--r--drivers/tty/Makefile2
-rw-r--r--drivers/tty/hvc/Makefile13
-rw-r--r--drivers/tty/hvc/hvc_beat.c (renamed from drivers/char/hvc_beat.c)0
-rw-r--r--drivers/tty/hvc/hvc_console.c (renamed from drivers/char/hvc_console.c)0
-rw-r--r--drivers/tty/hvc/hvc_console.h (renamed from drivers/char/hvc_console.h)0
-rw-r--r--drivers/tty/hvc/hvc_dcc.c (renamed from drivers/char/hvc_dcc.c)0
-rw-r--r--drivers/tty/hvc/hvc_irq.c (renamed from drivers/char/hvc_irq.c)0
-rw-r--r--drivers/tty/hvc/hvc_iseries.c (renamed from drivers/char/hvc_iseries.c)0
-rw-r--r--drivers/tty/hvc/hvc_iucv.c (renamed from drivers/char/hvc_iucv.c)0
-rw-r--r--drivers/tty/hvc/hvc_rtas.c (renamed from drivers/char/hvc_rtas.c)0
-rw-r--r--drivers/tty/hvc/hvc_tile.c (renamed from drivers/char/hvc_tile.c)0
-rw-r--r--drivers/tty/hvc/hvc_udbg.c (renamed from drivers/char/hvc_udbg.c)0
-rw-r--r--drivers/tty/hvc/hvc_vio.c (renamed from drivers/char/hvc_vio.c)0
-rw-r--r--drivers/tty/hvc/hvc_xen.c (renamed from drivers/char/hvc_xen.c)0
-rw-r--r--drivers/tty/hvc/hvcs.c (renamed from drivers/char/hvcs.c)0
-rw-r--r--drivers/tty/hvc/hvsi.c (renamed from drivers/char/hvsi.c)0
-rw-r--r--drivers/tty/hvc/virtio_console.c (renamed from drivers/char/virtio_console.c)0
-rw-r--r--drivers/tty/serial/21285.c (renamed from drivers/serial/21285.c)0
-rw-r--r--drivers/tty/serial/68328serial.c (renamed from drivers/serial/68328serial.c)0
-rw-r--r--drivers/tty/serial/68328serial.h (renamed from drivers/serial/68328serial.h)0
-rw-r--r--drivers/tty/serial/68360serial.c (renamed from drivers/serial/68360serial.c)0
-rw-r--r--drivers/tty/serial/8250.c (renamed from drivers/serial/8250.c)0
-rw-r--r--drivers/tty/serial/8250.h (renamed from drivers/serial/8250.h)0
-rw-r--r--drivers/tty/serial/8250_accent.c (renamed from drivers/serial/8250_accent.c)0
-rw-r--r--drivers/tty/serial/8250_acorn.c (renamed from drivers/serial/8250_acorn.c)0
-rw-r--r--drivers/tty/serial/8250_boca.c (renamed from drivers/serial/8250_boca.c)0
-rw-r--r--drivers/tty/serial/8250_early.c (renamed from drivers/serial/8250_early.c)0
-rw-r--r--drivers/tty/serial/8250_exar_st16c554.c (renamed from drivers/serial/8250_exar_st16c554.c)0
-rw-r--r--drivers/tty/serial/8250_fourport.c (renamed from drivers/serial/8250_fourport.c)0
-rw-r--r--drivers/tty/serial/8250_gsc.c (renamed from drivers/serial/8250_gsc.c)0
-rw-r--r--drivers/tty/serial/8250_hp300.c (renamed from drivers/serial/8250_hp300.c)0
-rw-r--r--drivers/tty/serial/8250_hub6.c (renamed from drivers/serial/8250_hub6.c)0
-rw-r--r--drivers/tty/serial/8250_mca.c (renamed from drivers/serial/8250_mca.c)0
-rw-r--r--drivers/tty/serial/8250_pci.c (renamed from drivers/serial/8250_pci.c)0
-rw-r--r--drivers/tty/serial/8250_pnp.c (renamed from drivers/serial/8250_pnp.c)0
-rw-r--r--drivers/tty/serial/Kconfig (renamed from drivers/serial/Kconfig)4
-rw-r--r--drivers/tty/serial/Makefile (renamed from drivers/serial/Makefile)0
-rw-r--r--drivers/tty/serial/altera_jtaguart.c (renamed from drivers/serial/altera_jtaguart.c)0
-rw-r--r--drivers/tty/serial/altera_uart.c (renamed from drivers/serial/altera_uart.c)0
-rw-r--r--drivers/tty/serial/amba-pl010.c (renamed from drivers/serial/amba-pl010.c)0
-rw-r--r--drivers/tty/serial/amba-pl011.c (renamed from drivers/serial/amba-pl011.c)0
-rw-r--r--drivers/tty/serial/apbuart.c (renamed from drivers/serial/apbuart.c)0
-rw-r--r--drivers/tty/serial/apbuart.h (renamed from drivers/serial/apbuart.h)0
-rw-r--r--drivers/tty/serial/atmel_serial.c (renamed from drivers/serial/atmel_serial.c)0
-rw-r--r--drivers/tty/serial/bcm63xx_uart.c (renamed from drivers/serial/bcm63xx_uart.c)0
-rw-r--r--drivers/tty/serial/bfin_5xx.c (renamed from drivers/serial/bfin_5xx.c)0
-rw-r--r--drivers/tty/serial/bfin_sport_uart.c (renamed from drivers/serial/bfin_sport_uart.c)0
-rw-r--r--drivers/tty/serial/bfin_sport_uart.h (renamed from drivers/serial/bfin_sport_uart.h)0
-rw-r--r--drivers/tty/serial/clps711x.c (renamed from drivers/serial/clps711x.c)0
-rw-r--r--drivers/tty/serial/cpm_uart/Makefile (renamed from drivers/serial/cpm_uart/Makefile)0
-rw-r--r--drivers/tty/serial/cpm_uart/cpm_uart.h (renamed from drivers/serial/cpm_uart/cpm_uart.h)0
-rw-r--r--drivers/tty/serial/cpm_uart/cpm_uart_core.c (renamed from drivers/serial/cpm_uart/cpm_uart_core.c)0
-rw-r--r--drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c (renamed from drivers/serial/cpm_uart/cpm_uart_cpm1.c)0
-rw-r--r--drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h (renamed from drivers/serial/cpm_uart/cpm_uart_cpm1.h)0
-rw-r--r--drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c (renamed from drivers/serial/cpm_uart/cpm_uart_cpm2.c)0
-rw-r--r--drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h (renamed from drivers/serial/cpm_uart/cpm_uart_cpm2.h)0
-rw-r--r--drivers/tty/serial/crisv10.c (renamed from drivers/serial/crisv10.c)0
-rw-r--r--drivers/tty/serial/crisv10.h (renamed from drivers/serial/crisv10.h)0
-rw-r--r--drivers/tty/serial/dz.c (renamed from drivers/serial/dz.c)0
-rw-r--r--drivers/tty/serial/dz.h (renamed from drivers/serial/dz.h)0
-rw-r--r--drivers/tty/serial/icom.c (renamed from drivers/serial/icom.c)0
-rw-r--r--drivers/tty/serial/icom.h (renamed from drivers/serial/icom.h)0
-rw-r--r--drivers/tty/serial/ifx6x60.c (renamed from drivers/serial/ifx6x60.c)0
-rw-r--r--drivers/tty/serial/ifx6x60.h (renamed from drivers/serial/ifx6x60.h)0
-rw-r--r--drivers/tty/serial/imx.c (renamed from drivers/serial/imx.c)0
-rw-r--r--drivers/tty/serial/ioc3_serial.c (renamed from drivers/serial/ioc3_serial.c)0
-rw-r--r--drivers/tty/serial/ioc4_serial.c (renamed from drivers/serial/ioc4_serial.c)0
-rw-r--r--drivers/tty/serial/ip22zilog.c (renamed from drivers/serial/ip22zilog.c)0
-rw-r--r--drivers/tty/serial/ip22zilog.h (renamed from drivers/serial/ip22zilog.h)0
-rw-r--r--drivers/tty/serial/jsm/Makefile (renamed from drivers/serial/jsm/Makefile)0
-rw-r--r--drivers/tty/serial/jsm/jsm.h (renamed from drivers/serial/jsm/jsm.h)0
-rw-r--r--drivers/tty/serial/jsm/jsm_driver.c (renamed from drivers/serial/jsm/jsm_driver.c)0
-rw-r--r--drivers/tty/serial/jsm/jsm_neo.c (renamed from drivers/serial/jsm/jsm_neo.c)0
-rw-r--r--drivers/tty/serial/jsm/jsm_tty.c (renamed from drivers/serial/jsm/jsm_tty.c)0
-rw-r--r--drivers/tty/serial/kgdboc.c (renamed from drivers/serial/kgdboc.c)0
-rw-r--r--drivers/tty/serial/m32r_sio.c (renamed from drivers/serial/m32r_sio.c)0
-rw-r--r--drivers/tty/serial/m32r_sio.h (renamed from drivers/serial/m32r_sio.h)0
-rw-r--r--drivers/tty/serial/m32r_sio_reg.h (renamed from drivers/serial/m32r_sio_reg.h)0
-rw-r--r--drivers/tty/serial/max3100.c (renamed from drivers/serial/max3100.c)0
-rw-r--r--drivers/tty/serial/max3107-aava.c (renamed from drivers/serial/max3107-aava.c)0
-rw-r--r--drivers/tty/serial/max3107.c (renamed from drivers/serial/max3107.c)0
-rw-r--r--drivers/tty/serial/max3107.h (renamed from drivers/serial/max3107.h)0
-rw-r--r--drivers/tty/serial/mcf.c (renamed from drivers/serial/mcf.c)0
-rw-r--r--drivers/tty/serial/mfd.c (renamed from drivers/serial/mfd.c)0
-rw-r--r--drivers/tty/serial/mpc52xx_uart.c (renamed from drivers/serial/mpc52xx_uart.c)0
-rw-r--r--drivers/tty/serial/mpsc.c (renamed from drivers/serial/mpsc.c)0
-rw-r--r--drivers/tty/serial/mrst_max3110.c (renamed from drivers/serial/mrst_max3110.c)0
-rw-r--r--drivers/tty/serial/mrst_max3110.h (renamed from drivers/serial/mrst_max3110.h)0
-rw-r--r--drivers/tty/serial/msm_serial.c (renamed from drivers/serial/msm_serial.c)0
-rw-r--r--drivers/tty/serial/msm_serial.h (renamed from drivers/serial/msm_serial.h)0
-rw-r--r--drivers/tty/serial/mux.c (renamed from drivers/serial/mux.c)0
-rw-r--r--drivers/tty/serial/netx-serial.c (renamed from drivers/serial/netx-serial.c)0
-rw-r--r--drivers/tty/serial/nwpserial.c (renamed from drivers/serial/nwpserial.c)0
-rw-r--r--drivers/tty/serial/of_serial.c (renamed from drivers/serial/of_serial.c)0
-rw-r--r--drivers/tty/serial/omap-serial.c (renamed from drivers/serial/omap-serial.c)0
-rw-r--r--drivers/tty/serial/pch_uart.c (renamed from drivers/serial/pch_uart.c)0
-rw-r--r--drivers/tty/serial/pmac_zilog.c (renamed from drivers/serial/pmac_zilog.c)0
-rw-r--r--drivers/tty/serial/pmac_zilog.h (renamed from drivers/serial/pmac_zilog.h)0
-rw-r--r--drivers/tty/serial/pnx8xxx_uart.c (renamed from drivers/serial/pnx8xxx_uart.c)0
-rw-r--r--drivers/tty/serial/pxa.c (renamed from drivers/serial/pxa.c)0
-rw-r--r--drivers/tty/serial/s3c2400.c (renamed from drivers/serial/s3c2400.c)0
-rw-r--r--drivers/tty/serial/s3c2410.c (renamed from drivers/serial/s3c2410.c)0
-rw-r--r--drivers/tty/serial/s3c2412.c (renamed from drivers/serial/s3c2412.c)0
-rw-r--r--drivers/tty/serial/s3c2440.c (renamed from drivers/serial/s3c2440.c)0
-rw-r--r--drivers/tty/serial/s3c24a0.c (renamed from drivers/serial/s3c24a0.c)0
-rw-r--r--drivers/tty/serial/s3c6400.c (renamed from drivers/serial/s3c6400.c)0
-rw-r--r--drivers/tty/serial/s5pv210.c (renamed from drivers/serial/s5pv210.c)0
-rw-r--r--drivers/tty/serial/sa1100.c (renamed from drivers/serial/sa1100.c)0
-rw-r--r--drivers/tty/serial/samsung.c (renamed from drivers/serial/samsung.c)0
-rw-r--r--drivers/tty/serial/samsung.h (renamed from drivers/serial/samsung.h)0
-rw-r--r--drivers/tty/serial/sb1250-duart.c (renamed from drivers/serial/sb1250-duart.c)0
-rw-r--r--drivers/tty/serial/sc26xx.c (renamed from drivers/serial/sc26xx.c)0
-rw-r--r--drivers/tty/serial/serial_core.c (renamed from drivers/serial/serial_core.c)0
-rw-r--r--drivers/tty/serial/serial_cs.c (renamed from drivers/serial/serial_cs.c)0
-rw-r--r--drivers/tty/serial/serial_ks8695.c (renamed from drivers/serial/serial_ks8695.c)0
-rw-r--r--drivers/tty/serial/serial_lh7a40x.c (renamed from drivers/serial/serial_lh7a40x.c)0
-rw-r--r--drivers/tty/serial/serial_txx9.c (renamed from drivers/serial/serial_txx9.c)0
-rw-r--r--drivers/tty/serial/sh-sci.c (renamed from drivers/serial/sh-sci.c)0
-rw-r--r--drivers/tty/serial/sh-sci.h (renamed from drivers/serial/sh-sci.h)0
-rw-r--r--drivers/tty/serial/sn_console.c (renamed from drivers/serial/sn_console.c)0
-rw-r--r--drivers/tty/serial/suncore.c (renamed from drivers/serial/suncore.c)0
-rw-r--r--drivers/tty/serial/suncore.h (renamed from drivers/serial/suncore.h)0
-rw-r--r--drivers/tty/serial/sunhv.c (renamed from drivers/serial/sunhv.c)0
-rw-r--r--drivers/tty/serial/sunsab.c (renamed from drivers/serial/sunsab.c)0
-rw-r--r--drivers/tty/serial/sunsab.h (renamed from drivers/serial/sunsab.h)0
-rw-r--r--drivers/tty/serial/sunsu.c (renamed from drivers/serial/sunsu.c)0
-rw-r--r--drivers/tty/serial/sunzilog.c (renamed from drivers/serial/sunzilog.c)0
-rw-r--r--drivers/tty/serial/sunzilog.h (renamed from drivers/serial/sunzilog.h)0
-rw-r--r--drivers/tty/serial/timbuart.c (renamed from drivers/serial/timbuart.c)0
-rw-r--r--drivers/tty/serial/timbuart.h (renamed from drivers/serial/timbuart.h)0
-rw-r--r--drivers/tty/serial/uartlite.c (renamed from drivers/serial/uartlite.c)0
-rw-r--r--drivers/tty/serial/ucc_uart.c (renamed from drivers/serial/ucc_uart.c)0
-rw-r--r--drivers/tty/serial/vr41xx_siu.c (renamed from drivers/serial/vr41xx_siu.c)0
-rw-r--r--drivers/tty/serial/vt8500_serial.c (renamed from drivers/serial/vt8500_serial.c)0
-rw-r--r--drivers/tty/serial/zs.c (renamed from drivers/serial/zs.c)0
-rw-r--r--drivers/tty/serial/zs.h (renamed from drivers/serial/zs.h)0
-rw-r--r--drivers/usb/core/Kconfig6
-rw-r--r--drivers/video/Kconfig2
-rw-r--r--drivers/video/backlight/88pm860x_bl.c4
-rw-r--r--drivers/video/console/Kconfig2
-rw-r--r--drivers/virtio/virtio_pci.c20
-rw-r--r--drivers/xen/xenfs/xenbus.c31
538 files changed, 10240 insertions, 7345 deletions
diff --git a/drivers/Makefile b/drivers/Makefile
index 7eb35f479461..b423bb16c3a8 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -24,7 +24,7 @@ obj-$(CONFIG_XEN) += xen/
24# regulators early, since some subsystems rely on them to initialize 24# regulators early, since some subsystems rely on them to initialize
25obj-$(CONFIG_REGULATOR) += regulator/ 25obj-$(CONFIG_REGULATOR) += regulator/
26 26
27# char/ comes before serial/ etc so that the VT console is the boot-time 27# tty/ comes before char/ so that the VT console is the boot-time
28# default. 28# default.
29obj-y += tty/ 29obj-y += tty/
30obj-y += char/ 30obj-y += char/
@@ -38,7 +38,6 @@ obj-$(CONFIG_CONNECTOR) += connector/
38obj-$(CONFIG_FB_I810) += video/i810/ 38obj-$(CONFIG_FB_I810) += video/i810/
39obj-$(CONFIG_FB_INTEL) += video/intelfb/ 39obj-$(CONFIG_FB_INTEL) += video/intelfb/
40 40
41obj-y += serial/
42obj-$(CONFIG_PARPORT) += parport/ 41obj-$(CONFIG_PARPORT) += parport/
43obj-y += base/ block/ misc/ mfd/ nfc/ 42obj-y += base/ block/ misc/ mfd/ nfc/
44obj-$(CONFIG_NUBUS) += nubus/ 43obj-$(CONFIG_NUBUS) += nubus/
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index 10c7ad59c0e1..2aa042a5da6d 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -318,7 +318,7 @@ config ACPI_PCI_SLOT
318 the module will be called pci_slot. 318 the module will be called pci_slot.
319 319
320config X86_PM_TIMER 320config X86_PM_TIMER
321 bool "Power Management Timer Support" if EMBEDDED 321 bool "Power Management Timer Support" if EXPERT
322 depends on X86 322 depends on X86
323 default y 323 default y
324 help 324 help
diff --git a/drivers/acpi/acpica/accommon.h b/drivers/acpi/acpica/accommon.h
index 3e50c74ed4a1..e0ba17f0a7c8 100644
--- a/drivers/acpi/acpica/accommon.h
+++ b/drivers/acpi/acpica/accommon.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h
index b17d8de9f6ff..ab87396c2c07 100644
--- a/drivers/acpi/acpica/acconfig.h
+++ b/drivers/acpi/acpica/acconfig.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acdebug.h b/drivers/acpi/acpica/acdebug.h
index 72e9d5eb083c..eb0b1f8dee6d 100644
--- a/drivers/acpi/acpica/acdebug.h
+++ b/drivers/acpi/acpica/acdebug.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acdispat.h b/drivers/acpi/acpica/acdispat.h
index 894a0ff2a946..666271b65418 100644
--- a/drivers/acpi/acpica/acdispat.h
+++ b/drivers/acpi/acpica/acdispat.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acevents.h b/drivers/acpi/acpica/acevents.h
index 70e0b28801aa..41d247daf461 100644
--- a/drivers/acpi/acpica/acevents.h
+++ b/drivers/acpi/acpica/acevents.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acglobal.h b/drivers/acpi/acpica/acglobal.h
index 0e4dba0d0325..82a1bd283db8 100644
--- a/drivers/acpi/acpica/acglobal.h
+++ b/drivers/acpi/acpica/acglobal.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/achware.h b/drivers/acpi/acpica/achware.h
index 258d628793ea..e7213beaafc7 100644
--- a/drivers/acpi/acpica/achware.h
+++ b/drivers/acpi/acpica/achware.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acinterp.h b/drivers/acpi/acpica/acinterp.h
index 049e203bd621..3731e1c34b83 100644
--- a/drivers/acpi/acpica/acinterp.h
+++ b/drivers/acpi/acpica/acinterp.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/aclocal.h b/drivers/acpi/acpica/aclocal.h
index 74000f5b7dab..54784bb42cec 100644
--- a/drivers/acpi/acpica/aclocal.h
+++ b/drivers/acpi/acpica/aclocal.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acmacros.h b/drivers/acpi/acpica/acmacros.h
index 8d5c9e0a495f..b7491ee1fba6 100644
--- a/drivers/acpi/acpica/acmacros.h
+++ b/drivers/acpi/acpica/acmacros.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acnamesp.h b/drivers/acpi/acpica/acnamesp.h
index d44d3bc5b847..79a598c67fe3 100644
--- a/drivers/acpi/acpica/acnamesp.h
+++ b/drivers/acpi/acpica/acnamesp.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acobject.h b/drivers/acpi/acpica/acobject.h
index 962a3ccff6fd..1055769f2f01 100644
--- a/drivers/acpi/acpica/acobject.h
+++ b/drivers/acpi/acpica/acobject.h
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
@@ -97,8 +97,6 @@
97#define AOPOBJ_OBJECT_INITIALIZED 0x08 /* Region is initialized, _REG was run */ 97#define AOPOBJ_OBJECT_INITIALIZED 0x08 /* Region is initialized, _REG was run */
98#define AOPOBJ_SETUP_COMPLETE 0x10 /* Region setup is complete */ 98#define AOPOBJ_SETUP_COMPLETE 0x10 /* Region setup is complete */
99#define AOPOBJ_INVALID 0x20 /* Host OS won't allow a Region address */ 99#define AOPOBJ_INVALID 0x20 /* Host OS won't allow a Region address */
100#define AOPOBJ_MODULE_LEVEL 0x40 /* Method is actually module-level code */
101#define AOPOBJ_MODIFIED_NAMESPACE 0x80 /* Method modified the namespace */
102 100
103/****************************************************************************** 101/******************************************************************************
104 * 102 *
@@ -175,7 +173,7 @@ struct acpi_object_region {
175}; 173};
176 174
177struct acpi_object_method { 175struct acpi_object_method {
178 ACPI_OBJECT_COMMON_HEADER u8 method_flags; 176 ACPI_OBJECT_COMMON_HEADER u8 info_flags;
179 u8 param_count; 177 u8 param_count;
180 u8 sync_level; 178 u8 sync_level;
181 union acpi_operand_object *mutex; 179 union acpi_operand_object *mutex;
@@ -183,13 +181,21 @@ struct acpi_object_method {
183 union { 181 union {
184 ACPI_INTERNAL_METHOD implementation; 182 ACPI_INTERNAL_METHOD implementation;
185 union acpi_operand_object *handler; 183 union acpi_operand_object *handler;
186 } extra; 184 } dispatch;
187 185
188 u32 aml_length; 186 u32 aml_length;
189 u8 thread_count; 187 u8 thread_count;
190 acpi_owner_id owner_id; 188 acpi_owner_id owner_id;
191}; 189};
192 190
191/* Flags for info_flags field above */
192
193#define ACPI_METHOD_MODULE_LEVEL 0x01 /* Method is actually module-level code */
194#define ACPI_METHOD_INTERNAL_ONLY 0x02 /* Method is implemented internally (_OSI) */
195#define ACPI_METHOD_SERIALIZED 0x04 /* Method is serialized */
196#define ACPI_METHOD_SERIALIZED_PENDING 0x08 /* Method is to be marked serialized */
197#define ACPI_METHOD_MODIFIED_NAMESPACE 0x10 /* Method modified the namespace */
198
193/****************************************************************************** 199/******************************************************************************
194 * 200 *
195 * Objects that can be notified. All share a common notify_info area. 201 * Objects that can be notified. All share a common notify_info area.
diff --git a/drivers/acpi/acpica/acopcode.h b/drivers/acpi/acpica/acopcode.h
index 8c15ff43f42b..bb2ccfad7376 100644
--- a/drivers/acpi/acpica/acopcode.h
+++ b/drivers/acpi/acpica/acopcode.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acparser.h b/drivers/acpi/acpica/acparser.h
index d0bb0fd3e57a..5ea1e06afa20 100644
--- a/drivers/acpi/acpica/acparser.h
+++ b/drivers/acpi/acpica/acparser.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acpredef.h b/drivers/acpi/acpica/acpredef.h
index 10998d369ad0..94e73c97cf85 100644
--- a/drivers/acpi/acpica/acpredef.h
+++ b/drivers/acpi/acpica/acpredef.h
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acresrc.h b/drivers/acpi/acpica/acresrc.h
index 528bcbaf4ce7..f08b55b7f3a0 100644
--- a/drivers/acpi/acpica/acresrc.h
+++ b/drivers/acpi/acpica/acresrc.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acstruct.h b/drivers/acpi/acpica/acstruct.h
index 6e5dd97949fe..1623b245dde2 100644
--- a/drivers/acpi/acpica/acstruct.h
+++ b/drivers/acpi/acpica/acstruct.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/actables.h b/drivers/acpi/acpica/actables.h
index 62a576e34361..967f08124eba 100644
--- a/drivers/acpi/acpica/actables.h
+++ b/drivers/acpi/acpica/actables.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/acutils.h b/drivers/acpi/acpica/acutils.h
index 72e4183c1937..99c140d8e348 100644
--- a/drivers/acpi/acpica/acutils.h
+++ b/drivers/acpi/acpica/acutils.h
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/amlcode.h b/drivers/acpi/acpica/amlcode.h
index 1f484ba228fc..f4f0998d3967 100644
--- a/drivers/acpi/acpica/amlcode.h
+++ b/drivers/acpi/acpica/amlcode.h
@@ -7,7 +7,7 @@
7 *****************************************************************************/ 7 *****************************************************************************/
8 8
9/* 9/*
10 * Copyright (C) 2000 - 2010, Intel Corp. 10 * Copyright (C) 2000 - 2011, Intel Corp.
11 * All rights reserved. 11 * All rights reserved.
12 * 12 *
13 * Redistribution and use in source and binary forms, with or without 13 * Redistribution and use in source and binary forms, with or without
@@ -480,16 +480,10 @@ typedef enum {
480 AML_FIELD_ATTRIB_SMB_BLOCK_CALL = 0x0D 480 AML_FIELD_ATTRIB_SMB_BLOCK_CALL = 0x0D
481} AML_ACCESS_ATTRIBUTE; 481} AML_ACCESS_ATTRIBUTE;
482 482
483/* Bit fields in method_flags byte */ 483/* Bit fields in the AML method_flags byte */
484 484
485#define AML_METHOD_ARG_COUNT 0x07 485#define AML_METHOD_ARG_COUNT 0x07
486#define AML_METHOD_SERIALIZED 0x08 486#define AML_METHOD_SERIALIZED 0x08
487#define AML_METHOD_SYNC_LEVEL 0xF0 487#define AML_METHOD_SYNC_LEVEL 0xF0
488 488
489/* METHOD_FLAGS_ARG_COUNT is not used internally, define additional flags */
490
491#define AML_METHOD_INTERNAL_ONLY 0x01
492#define AML_METHOD_RESERVED1 0x02
493#define AML_METHOD_RESERVED2 0x04
494
495#endif /* __AMLCODE_H__ */ 489#endif /* __AMLCODE_H__ */
diff --git a/drivers/acpi/acpica/amlresrc.h b/drivers/acpi/acpica/amlresrc.h
index 0e5798fcbb19..59122cde247c 100644
--- a/drivers/acpi/acpica/amlresrc.h
+++ b/drivers/acpi/acpica/amlresrc.h
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsfield.c b/drivers/acpi/acpica/dsfield.c
index 347bee1726f1..34be60c0e448 100644
--- a/drivers/acpi/acpica/dsfield.c
+++ b/drivers/acpi/acpica/dsfield.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsinit.c b/drivers/acpi/acpica/dsinit.c
index cc4a38c57558..a7718bf2b9a1 100644
--- a/drivers/acpi/acpica/dsinit.c
+++ b/drivers/acpi/acpica/dsinit.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsmethod.c b/drivers/acpi/acpica/dsmethod.c
index d94dd8974b55..5d797751e205 100644
--- a/drivers/acpi/acpica/dsmethod.c
+++ b/drivers/acpi/acpica/dsmethod.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -43,7 +43,6 @@
43 43
44#include <acpi/acpi.h> 44#include <acpi/acpi.h>
45#include "accommon.h" 45#include "accommon.h"
46#include "amlcode.h"
47#include "acdispat.h" 46#include "acdispat.h"
48#include "acinterp.h" 47#include "acinterp.h"
49#include "acnamesp.h" 48#include "acnamesp.h"
@@ -201,7 +200,7 @@ acpi_ds_begin_method_execution(struct acpi_namespace_node *method_node,
201 /* 200 /*
202 * If this method is serialized, we need to acquire the method mutex. 201 * If this method is serialized, we need to acquire the method mutex.
203 */ 202 */
204 if (obj_desc->method.method_flags & AML_METHOD_SERIALIZED) { 203 if (obj_desc->method.info_flags & ACPI_METHOD_SERIALIZED) {
205 /* 204 /*
206 * Create a mutex for the method if it is defined to be Serialized 205 * Create a mutex for the method if it is defined to be Serialized
207 * and a mutex has not already been created. We defer the mutex creation 206 * and a mutex has not already been created. We defer the mutex creation
@@ -413,8 +412,9 @@ acpi_ds_call_control_method(struct acpi_thread_state *thread,
413 412
414 /* Invoke an internal method if necessary */ 413 /* Invoke an internal method if necessary */
415 414
416 if (obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) { 415 if (obj_desc->method.info_flags & ACPI_METHOD_INTERNAL_ONLY) {
417 status = obj_desc->method.extra.implementation(next_walk_state); 416 status =
417 obj_desc->method.dispatch.implementation(next_walk_state);
418 if (status == AE_OK) { 418 if (status == AE_OK) {
419 status = AE_CTRL_TERMINATE; 419 status = AE_CTRL_TERMINATE;
420 } 420 }
@@ -579,11 +579,14 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
579 579
580 /* 580 /*
581 * Delete any namespace objects created anywhere within the 581 * Delete any namespace objects created anywhere within the
582 * namespace by the execution of this method. Unless this method 582 * namespace by the execution of this method. Unless:
583 * is a module-level executable code method, in which case we 583 * 1) This method is a module-level executable code method, in which
584 * want make the objects permanent. 584 * case we want make the objects permanent.
585 * 2) There are other threads executing the method, in which case we
586 * will wait until the last thread has completed.
585 */ 587 */
586 if (!(method_desc->method.flags & AOPOBJ_MODULE_LEVEL)) { 588 if (!(method_desc->method.info_flags & ACPI_METHOD_MODULE_LEVEL)
589 && (method_desc->method.thread_count == 1)) {
587 590
588 /* Delete any direct children of (created by) this method */ 591 /* Delete any direct children of (created by) this method */
589 592
@@ -593,12 +596,17 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
593 /* 596 /*
594 * Delete any objects that were created by this method 597 * Delete any objects that were created by this method
595 * elsewhere in the namespace (if any were created). 598 * elsewhere in the namespace (if any were created).
599 * Use of the ACPI_METHOD_MODIFIED_NAMESPACE optimizes the
600 * deletion such that we don't have to perform an entire
601 * namespace walk for every control method execution.
596 */ 602 */
597 if (method_desc->method. 603 if (method_desc->method.
598 flags & AOPOBJ_MODIFIED_NAMESPACE) { 604 info_flags & ACPI_METHOD_MODIFIED_NAMESPACE) {
599 acpi_ns_delete_namespace_by_owner(method_desc-> 605 acpi_ns_delete_namespace_by_owner(method_desc->
600 method. 606 method.
601 owner_id); 607 owner_id);
608 method_desc->method.info_flags &=
609 ~ACPI_METHOD_MODIFIED_NAMESPACE;
602 } 610 }
603 } 611 }
604 } 612 }
@@ -629,19 +637,43 @@ acpi_ds_terminate_control_method(union acpi_operand_object *method_desc,
629 * Serialized if it appears that the method is incorrectly written and 637 * Serialized if it appears that the method is incorrectly written and
630 * does not support multiple thread execution. The best example of this 638 * does not support multiple thread execution. The best example of this
631 * is if such a method creates namespace objects and blocks. A second 639 * is if such a method creates namespace objects and blocks. A second
632 * thread will fail with an AE_ALREADY_EXISTS exception 640 * thread will fail with an AE_ALREADY_EXISTS exception.
633 * 641 *
634 * This code is here because we must wait until the last thread exits 642 * This code is here because we must wait until the last thread exits
635 * before creating the synchronization semaphore. 643 * before marking the method as serialized.
636 */ 644 */
637 if ((method_desc->method.method_flags & AML_METHOD_SERIALIZED) 645 if (method_desc->method.
638 && (!method_desc->method.mutex)) { 646 info_flags & ACPI_METHOD_SERIALIZED_PENDING) {
639 (void)acpi_ds_create_method_mutex(method_desc); 647 if (walk_state) {
648 ACPI_INFO((AE_INFO,
649 "Marking method %4.4s as Serialized because of AE_ALREADY_EXISTS error",
650 walk_state->method_node->name.
651 ascii));
652 }
653
654 /*
655 * Method tried to create an object twice and was marked as
656 * "pending serialized". The probable cause is that the method
657 * cannot handle reentrancy.
658 *
659 * The method was created as not_serialized, but it tried to create
660 * a named object and then blocked, causing the second thread
661 * entrance to begin and then fail. Workaround this problem by
662 * marking the method permanently as Serialized when the last
663 * thread exits here.
664 */
665 method_desc->method.info_flags &=
666 ~ACPI_METHOD_SERIALIZED_PENDING;
667 method_desc->method.info_flags |=
668 ACPI_METHOD_SERIALIZED;
669 method_desc->method.sync_level = 0;
640 } 670 }
641 671
642 /* No more threads, we can free the owner_id */ 672 /* No more threads, we can free the owner_id */
643 673
644 if (!(method_desc->method.flags & AOPOBJ_MODULE_LEVEL)) { 674 if (!
675 (method_desc->method.
676 info_flags & ACPI_METHOD_MODULE_LEVEL)) {
645 acpi_ut_release_owner_id(&method_desc->method.owner_id); 677 acpi_ut_release_owner_id(&method_desc->method.owner_id);
646 } 678 }
647 } 679 }
diff --git a/drivers/acpi/acpica/dsmthdat.c b/drivers/acpi/acpica/dsmthdat.c
index 8095306fcd8c..905ce29a92e1 100644
--- a/drivers/acpi/acpica/dsmthdat.c
+++ b/drivers/acpi/acpica/dsmthdat.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsobject.c b/drivers/acpi/acpica/dsobject.c
index 8e85f54a8e0e..f42e17e5c252 100644
--- a/drivers/acpi/acpica/dsobject.c
+++ b/drivers/acpi/acpica/dsobject.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsopcode.c b/drivers/acpi/acpica/dsopcode.c
index 7c0e74227171..bbecf293aeeb 100644
--- a/drivers/acpi/acpica/dsopcode.c
+++ b/drivers/acpi/acpica/dsopcode.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dsutils.c b/drivers/acpi/acpica/dsutils.c
index 15135c25aa9b..2c477ce172fa 100644
--- a/drivers/acpi/acpica/dsutils.c
+++ b/drivers/acpi/acpica/dsutils.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswexec.c b/drivers/acpi/acpica/dswexec.c
index 6b0b5d08d97a..fe40e4c6554f 100644
--- a/drivers/acpi/acpica/dswexec.c
+++ b/drivers/acpi/acpica/dswexec.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswload.c b/drivers/acpi/acpica/dswload.c
index 140a9d002959..52566ff5e903 100644
--- a/drivers/acpi/acpica/dswload.c
+++ b/drivers/acpi/acpica/dswload.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswscope.c b/drivers/acpi/acpica/dswscope.c
index d1e701709dac..76a661fc1e09 100644
--- a/drivers/acpi/acpica/dswscope.c
+++ b/drivers/acpi/acpica/dswscope.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/dswstate.c b/drivers/acpi/acpica/dswstate.c
index 83155dd8671e..a6c374ef9914 100644
--- a/drivers/acpi/acpica/dswstate.c
+++ b/drivers/acpi/acpica/dswstate.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evevent.c b/drivers/acpi/acpica/evevent.c
index e5e313c663a5..d458b041e651 100644
--- a/drivers/acpi/acpica/evevent.c
+++ b/drivers/acpi/acpica/evevent.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpe.c b/drivers/acpi/acpica/evgpe.c
index 7c339d34ab42..14988a86066f 100644
--- a/drivers/acpi/acpica/evgpe.c
+++ b/drivers/acpi/acpica/evgpe.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -471,6 +471,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
471 471
472 status = acpi_ut_acquire_mutex(ACPI_MTX_EVENTS); 472 status = acpi_ut_acquire_mutex(ACPI_MTX_EVENTS);
473 if (ACPI_FAILURE(status)) { 473 if (ACPI_FAILURE(status)) {
474 ACPI_FREE(local_gpe_event_info);
474 return_VOID; 475 return_VOID;
475 } 476 }
476 477
@@ -478,6 +479,7 @@ static void ACPI_SYSTEM_XFACE acpi_ev_asynch_execute_gpe_method(void *context)
478 479
479 if (!acpi_ev_valid_gpe_event(gpe_event_info)) { 480 if (!acpi_ev_valid_gpe_event(gpe_event_info)) {
480 status = acpi_ut_release_mutex(ACPI_MTX_EVENTS); 481 status = acpi_ut_release_mutex(ACPI_MTX_EVENTS);
482 ACPI_FREE(local_gpe_event_info);
481 return_VOID; 483 return_VOID;
482 } 484 }
483 485
diff --git a/drivers/acpi/acpica/evgpeblk.c b/drivers/acpi/acpica/evgpeblk.c
index 9acb86958c09..ca2c41a53311 100644
--- a/drivers/acpi/acpica/evgpeblk.c
+++ b/drivers/acpi/acpica/evgpeblk.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpeinit.c b/drivers/acpi/acpica/evgpeinit.c
index c59dc2340593..ce9aa9f9a972 100644
--- a/drivers/acpi/acpica/evgpeinit.c
+++ b/drivers/acpi/acpica/evgpeinit.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evgpeutil.c b/drivers/acpi/acpica/evgpeutil.c
index 10e477494dcf..80a81d0c4a80 100644
--- a/drivers/acpi/acpica/evgpeutil.c
+++ b/drivers/acpi/acpica/evgpeutil.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evmisc.c b/drivers/acpi/acpica/evmisc.c
index 38bba66fcce5..7dc80946f7bd 100644
--- a/drivers/acpi/acpica/evmisc.c
+++ b/drivers/acpi/acpica/evmisc.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evregion.c b/drivers/acpi/acpica/evregion.c
index 98fd210e87b2..785a5ee64585 100644
--- a/drivers/acpi/acpica/evregion.c
+++ b/drivers/acpi/acpica/evregion.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evrgnini.c b/drivers/acpi/acpica/evrgnini.c
index 0b47a6dc9290..9659cee6093e 100644
--- a/drivers/acpi/acpica/evrgnini.c
+++ b/drivers/acpi/acpica/evrgnini.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -590,9 +590,9 @@ acpi_ev_initialize_region(union acpi_operand_object *region_obj,
590 * See acpi_ns_exec_module_code 590 * See acpi_ns_exec_module_code
591 */ 591 */
592 if (obj_desc->method. 592 if (obj_desc->method.
593 flags & AOPOBJ_MODULE_LEVEL) { 593 info_flags & ACPI_METHOD_MODULE_LEVEL) {
594 handler_obj = 594 handler_obj =
595 obj_desc->method.extra.handler; 595 obj_desc->method.dispatch.handler;
596 } 596 }
597 break; 597 break;
598 598
diff --git a/drivers/acpi/acpica/evsci.c b/drivers/acpi/acpica/evsci.c
index 8dfbaa96e422..2ebd40e1a3ef 100644
--- a/drivers/acpi/acpica/evsci.c
+++ b/drivers/acpi/acpica/evsci.c
@@ -6,7 +6,7 @@
6 ******************************************************************************/ 6 ******************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxface.c b/drivers/acpi/acpica/evxface.c
index 1226689bdb1b..e1141402dbed 100644
--- a/drivers/acpi/acpica/evxface.c
+++ b/drivers/acpi/acpica/evxface.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfevnt.c b/drivers/acpi/acpica/evxfevnt.c
index 90488c1e0f3d..c57b5c707a77 100644
--- a/drivers/acpi/acpica/evxfevnt.c
+++ b/drivers/acpi/acpica/evxfevnt.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfgpe.c b/drivers/acpi/acpica/evxfgpe.c
index 416845bc9c1f..e9562a7cb2f9 100644
--- a/drivers/acpi/acpica/evxfgpe.c
+++ b/drivers/acpi/acpica/evxfgpe.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/evxfregn.c b/drivers/acpi/acpica/evxfregn.c
index ce9314f79451..eb7386763712 100644
--- a/drivers/acpi/acpica/evxfregn.c
+++ b/drivers/acpi/acpica/evxfregn.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exconfig.c b/drivers/acpi/acpica/exconfig.c
index 18832205b631..745a42b401f5 100644
--- a/drivers/acpi/acpica/exconfig.c
+++ b/drivers/acpi/acpica/exconfig.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exconvrt.c b/drivers/acpi/acpica/exconvrt.c
index b73bc50c5b76..74162a11817d 100644
--- a/drivers/acpi/acpica/exconvrt.c
+++ b/drivers/acpi/acpica/exconvrt.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/excreate.c b/drivers/acpi/acpica/excreate.c
index 3c61b48c73f5..e7b372d17667 100644
--- a/drivers/acpi/acpica/excreate.c
+++ b/drivers/acpi/acpica/excreate.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -482,13 +482,11 @@ acpi_ex_create_method(u8 * aml_start,
482 obj_desc->method.aml_length = aml_length; 482 obj_desc->method.aml_length = aml_length;
483 483
484 /* 484 /*
485 * Disassemble the method flags. Split off the Arg Count 485 * Disassemble the method flags. Split off the arg_count, Serialized
486 * for efficiency 486 * flag, and sync_level for efficiency.
487 */ 487 */
488 method_flags = (u8) operand[1]->integer.value; 488 method_flags = (u8) operand[1]->integer.value;
489 489
490 obj_desc->method.method_flags =
491 (u8) (method_flags & ~AML_METHOD_ARG_COUNT);
492 obj_desc->method.param_count = 490 obj_desc->method.param_count =
493 (u8) (method_flags & AML_METHOD_ARG_COUNT); 491 (u8) (method_flags & AML_METHOD_ARG_COUNT);
494 492
@@ -497,6 +495,8 @@ acpi_ex_create_method(u8 * aml_start,
497 * created for this method when it is parsed. 495 * created for this method when it is parsed.
498 */ 496 */
499 if (method_flags & AML_METHOD_SERIALIZED) { 497 if (method_flags & AML_METHOD_SERIALIZED) {
498 obj_desc->method.info_flags = ACPI_METHOD_SERIALIZED;
499
500 /* 500 /*
501 * ACPI 1.0: sync_level = 0 501 * ACPI 1.0: sync_level = 0
502 * ACPI 2.0: sync_level = sync_level in method declaration 502 * ACPI 2.0: sync_level = sync_level in method declaration
diff --git a/drivers/acpi/acpica/exdebug.c b/drivers/acpi/acpica/exdebug.c
index be8c98b480d7..c7a2f1edd282 100644
--- a/drivers/acpi/acpica/exdebug.c
+++ b/drivers/acpi/acpica/exdebug.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exdump.c b/drivers/acpi/acpica/exdump.c
index f067bbb0d961..61b8c0e8b74d 100644
--- a/drivers/acpi/acpica/exdump.c
+++ b/drivers/acpi/acpica/exdump.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -122,7 +122,7 @@ static struct acpi_exdump_info acpi_ex_dump_event[2] = {
122 122
123static struct acpi_exdump_info acpi_ex_dump_method[9] = { 123static struct acpi_exdump_info acpi_ex_dump_method[9] = {
124 {ACPI_EXD_INIT, ACPI_EXD_TABLE_SIZE(acpi_ex_dump_method), NULL}, 124 {ACPI_EXD_INIT, ACPI_EXD_TABLE_SIZE(acpi_ex_dump_method), NULL},
125 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.method_flags), "Method Flags"}, 125 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.info_flags), "Info Flags"},
126 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.param_count), 126 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.param_count),
127 "Parameter Count"}, 127 "Parameter Count"},
128 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.sync_level), "Sync Level"}, 128 {ACPI_EXD_UINT8, ACPI_EXD_OFFSET(method.sync_level), "Sync Level"},
diff --git a/drivers/acpi/acpica/exfield.c b/drivers/acpi/acpica/exfield.c
index f17d2ff0031b..0bde2230c028 100644
--- a/drivers/acpi/acpica/exfield.c
+++ b/drivers/acpi/acpica/exfield.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exfldio.c b/drivers/acpi/acpica/exfldio.c
index 38293fd3e088..6c79c29f082d 100644
--- a/drivers/acpi/acpica/exfldio.c
+++ b/drivers/acpi/acpica/exfldio.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exmisc.c b/drivers/acpi/acpica/exmisc.c
index 95db4be0877b..703d88ed0b3d 100644
--- a/drivers/acpi/acpica/exmisc.c
+++ b/drivers/acpi/acpica/exmisc.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exmutex.c b/drivers/acpi/acpica/exmutex.c
index 6af14e43f839..be1c56ead653 100644
--- a/drivers/acpi/acpica/exmutex.c
+++ b/drivers/acpi/acpica/exmutex.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exnames.c b/drivers/acpi/acpica/exnames.c
index d11e539ef763..49ec049c157e 100644
--- a/drivers/acpi/acpica/exnames.c
+++ b/drivers/acpi/acpica/exnames.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg1.c b/drivers/acpi/acpica/exoparg1.c
index 84e4d185aa25..236ead14b7f7 100644
--- a/drivers/acpi/acpica/exoparg1.c
+++ b/drivers/acpi/acpica/exoparg1.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg2.c b/drivers/acpi/acpica/exoparg2.c
index 10e104cf0fb9..2571b4a310f4 100644
--- a/drivers/acpi/acpica/exoparg2.c
+++ b/drivers/acpi/acpica/exoparg2.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg3.c b/drivers/acpi/acpica/exoparg3.c
index 7a08d23befcd..1b48d9d28c9a 100644
--- a/drivers/acpi/acpica/exoparg3.c
+++ b/drivers/acpi/acpica/exoparg3.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exoparg6.c b/drivers/acpi/acpica/exoparg6.c
index 4b50730cf9a0..f4a2787e8e92 100644
--- a/drivers/acpi/acpica/exoparg6.c
+++ b/drivers/acpi/acpica/exoparg6.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exprep.c b/drivers/acpi/acpica/exprep.c
index 7aae29f73d3f..cc95e2000406 100644
--- a/drivers/acpi/acpica/exprep.c
+++ b/drivers/acpi/acpica/exprep.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index de17e10da0ed..f0d5e14f1f2c 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresnte.c b/drivers/acpi/acpica/exresnte.c
index 1fa4289a687e..55997e46948b 100644
--- a/drivers/acpi/acpica/exresnte.c
+++ b/drivers/acpi/acpica/exresnte.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresolv.c b/drivers/acpi/acpica/exresolv.c
index 7ca35ea8acea..db502cd7d934 100644
--- a/drivers/acpi/acpica/exresolv.c
+++ b/drivers/acpi/acpica/exresolv.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exresop.c b/drivers/acpi/acpica/exresop.c
index 8c97cfd6a0fd..e3bb00ccdff5 100644
--- a/drivers/acpi/acpica/exresop.c
+++ b/drivers/acpi/acpica/exresop.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstore.c b/drivers/acpi/acpica/exstore.c
index 1624436ba4c5..c0c8842dd344 100644
--- a/drivers/acpi/acpica/exstore.c
+++ b/drivers/acpi/acpica/exstore.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstoren.c b/drivers/acpi/acpica/exstoren.c
index d4af684620ca..a979017d56b8 100644
--- a/drivers/acpi/acpica/exstoren.c
+++ b/drivers/acpi/acpica/exstoren.c
@@ -7,7 +7,7 @@
7 *****************************************************************************/ 7 *****************************************************************************/
8 8
9/* 9/*
10 * Copyright (C) 2000 - 2010, Intel Corp. 10 * Copyright (C) 2000 - 2011, Intel Corp.
11 * All rights reserved. 11 * All rights reserved.
12 * 12 *
13 * Redistribution and use in source and binary forms, with or without 13 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exstorob.c b/drivers/acpi/acpica/exstorob.c
index e972b667b09b..dc665cc554de 100644
--- a/drivers/acpi/acpica/exstorob.c
+++ b/drivers/acpi/acpica/exstorob.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exsystem.c b/drivers/acpi/acpica/exsystem.c
index 675aaa91a770..df66e7b686be 100644
--- a/drivers/acpi/acpica/exsystem.c
+++ b/drivers/acpi/acpica/exsystem.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/exutils.c b/drivers/acpi/acpica/exutils.c
index 4093522eed45..8ad93146dd32 100644
--- a/drivers/acpi/acpica/exutils.c
+++ b/drivers/acpi/acpica/exutils.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwacpi.c b/drivers/acpi/acpica/hwacpi.c
index b44274a0b62c..fc380d3d45ab 100644
--- a/drivers/acpi/acpica/hwacpi.c
+++ b/drivers/acpi/acpica/hwacpi.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwgpe.c b/drivers/acpi/acpica/hwgpe.c
index 85c3cbd4304d..f610d88a66be 100644
--- a/drivers/acpi/acpica/hwgpe.c
+++ b/drivers/acpi/acpica/hwgpe.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwpci.c b/drivers/acpi/acpica/hwpci.c
index ad21c7d8bf4f..050fd227951b 100644
--- a/drivers/acpi/acpica/hwpci.c
+++ b/drivers/acpi/acpica/hwpci.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwregs.c b/drivers/acpi/acpica/hwregs.c
index 5d1273b660ae..55accb7018bb 100644
--- a/drivers/acpi/acpica/hwregs.c
+++ b/drivers/acpi/acpica/hwregs.c
@@ -7,7 +7,7 @@
7 ******************************************************************************/ 7 ******************************************************************************/
8 8
9/* 9/*
10 * Copyright (C) 2000 - 2010, Intel Corp. 10 * Copyright (C) 2000 - 2011, Intel Corp.
11 * All rights reserved. 11 * All rights reserved.
12 * 12 *
13 * Redistribution and use in source and binary forms, with or without 13 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwsleep.c b/drivers/acpi/acpica/hwsleep.c
index 3796811276ac..2ac28bbe8827 100644
--- a/drivers/acpi/acpica/hwsleep.c
+++ b/drivers/acpi/acpica/hwsleep.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwtimer.c b/drivers/acpi/acpica/hwtimer.c
index 1ef8e0bb250b..9c8eb71a12fb 100644
--- a/drivers/acpi/acpica/hwtimer.c
+++ b/drivers/acpi/acpica/hwtimer.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwvalid.c b/drivers/acpi/acpica/hwvalid.c
index e1d9c777b213..5f1605874655 100644
--- a/drivers/acpi/acpica/hwvalid.c
+++ b/drivers/acpi/acpica/hwvalid.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/hwxface.c b/drivers/acpi/acpica/hwxface.c
index 50cc3be77724..6f98d210e71c 100644
--- a/drivers/acpi/acpica/hwxface.c
+++ b/drivers/acpi/acpica/hwxface.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsaccess.c b/drivers/acpi/acpica/nsaccess.c
index 0cd925be5fc1..d93172fd15a8 100644
--- a/drivers/acpi/acpica/nsaccess.c
+++ b/drivers/acpi/acpica/nsaccess.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -163,9 +163,9 @@ acpi_status acpi_ns_root_initialize(void)
163#else 163#else
164 /* Mark this as a very SPECIAL method */ 164 /* Mark this as a very SPECIAL method */
165 165
166 obj_desc->method.method_flags = 166 obj_desc->method.info_flags =
167 AML_METHOD_INTERNAL_ONLY; 167 ACPI_METHOD_INTERNAL_ONLY;
168 obj_desc->method.extra.implementation = 168 obj_desc->method.dispatch.implementation =
169 acpi_ut_osi_implementation; 169 acpi_ut_osi_implementation;
170#endif 170#endif
171 break; 171 break;
diff --git a/drivers/acpi/acpica/nsalloc.c b/drivers/acpi/acpica/nsalloc.c
index 1e5ff803d9ad..1d0ef15d158f 100644
--- a/drivers/acpi/acpica/nsalloc.c
+++ b/drivers/acpi/acpica/nsalloc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -234,8 +234,8 @@ void acpi_ns_install_node(struct acpi_walk_state *walk_state, struct acpi_namesp
234 * modified the namespace. This is used for cleanup when the 234 * modified the namespace. This is used for cleanup when the
235 * method exits. 235 * method exits.
236 */ 236 */
237 walk_state->method_desc->method.flags |= 237 walk_state->method_desc->method.info_flags |=
238 AOPOBJ_MODIFIED_NAMESPACE; 238 ACPI_METHOD_MODIFIED_NAMESPACE;
239 } 239 }
240 } 240 }
241 241
@@ -341,6 +341,7 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
341{ 341{
342 struct acpi_namespace_node *child_node = NULL; 342 struct acpi_namespace_node *child_node = NULL;
343 u32 level = 1; 343 u32 level = 1;
344 acpi_status status;
344 345
345 ACPI_FUNCTION_TRACE(ns_delete_namespace_subtree); 346 ACPI_FUNCTION_TRACE(ns_delete_namespace_subtree);
346 347
@@ -348,6 +349,13 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
348 return_VOID; 349 return_VOID;
349 } 350 }
350 351
352 /* Lock namespace for possible update */
353
354 status = acpi_ut_acquire_mutex(ACPI_MTX_NAMESPACE);
355 if (ACPI_FAILURE(status)) {
356 return_VOID;
357 }
358
351 /* 359 /*
352 * Traverse the tree of objects until we bubble back up 360 * Traverse the tree of objects until we bubble back up
353 * to where we started. 361 * to where we started.
@@ -397,6 +405,7 @@ void acpi_ns_delete_namespace_subtree(struct acpi_namespace_node *parent_node)
397 } 405 }
398 } 406 }
399 407
408 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
400 return_VOID; 409 return_VOID;
401} 410}
402 411
diff --git a/drivers/acpi/acpica/nsdump.c b/drivers/acpi/acpica/nsdump.c
index a54dc39e304b..b683cc2ff9d3 100644
--- a/drivers/acpi/acpica/nsdump.c
+++ b/drivers/acpi/acpica/nsdump.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -624,9 +624,22 @@ acpi_ns_dump_objects(acpi_object_type type,
624 acpi_owner_id owner_id, acpi_handle start_handle) 624 acpi_owner_id owner_id, acpi_handle start_handle)
625{ 625{
626 struct acpi_walk_info info; 626 struct acpi_walk_info info;
627 acpi_status status;
627 628
628 ACPI_FUNCTION_ENTRY(); 629 ACPI_FUNCTION_ENTRY();
629 630
631 /*
632 * Just lock the entire namespace for the duration of the dump.
633 * We don't want any changes to the namespace during this time,
634 * especially the temporary nodes since we are going to display
635 * them also.
636 */
637 status = acpi_ut_acquire_mutex(ACPI_MTX_NAMESPACE);
638 if (ACPI_FAILURE(status)) {
639 acpi_os_printf("Could not acquire namespace mutex\n");
640 return;
641 }
642
630 info.debug_level = ACPI_LV_TABLES; 643 info.debug_level = ACPI_LV_TABLES;
631 info.owner_id = owner_id; 644 info.owner_id = owner_id;
632 info.display_type = display_type; 645 info.display_type = display_type;
@@ -636,6 +649,8 @@ acpi_ns_dump_objects(acpi_object_type type,
636 ACPI_NS_WALK_TEMP_NODES, 649 ACPI_NS_WALK_TEMP_NODES,
637 acpi_ns_dump_one_object, NULL, 650 acpi_ns_dump_one_object, NULL,
638 (void *)&info, NULL); 651 (void *)&info, NULL);
652
653 (void)acpi_ut_release_mutex(ACPI_MTX_NAMESPACE);
639} 654}
640#endif /* ACPI_FUTURE_USAGE */ 655#endif /* ACPI_FUTURE_USAGE */
641 656
diff --git a/drivers/acpi/acpica/nsdumpdv.c b/drivers/acpi/acpica/nsdumpdv.c
index d2a97921e249..2ed294b7a4db 100644
--- a/drivers/acpi/acpica/nsdumpdv.c
+++ b/drivers/acpi/acpica/nsdumpdv.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nseval.c b/drivers/acpi/acpica/nseval.c
index f52829cc294b..c1bd02b1a058 100644
--- a/drivers/acpi/acpica/nseval.c
+++ b/drivers/acpi/acpica/nseval.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -389,7 +389,7 @@ acpi_ns_exec_module_code(union acpi_operand_object *method_obj,
389 * acpi_gbl_root_node->Object is NULL at PASS1. 389 * acpi_gbl_root_node->Object is NULL at PASS1.
390 */ 390 */
391 if ((type == ACPI_TYPE_DEVICE) && parent_node->object) { 391 if ((type == ACPI_TYPE_DEVICE) && parent_node->object) {
392 method_obj->method.extra.handler = 392 method_obj->method.dispatch.handler =
393 parent_node->object->device.handler; 393 parent_node->object->device.handler;
394 } 394 }
395 395
diff --git a/drivers/acpi/acpica/nsinit.c b/drivers/acpi/acpica/nsinit.c
index 0cac7ec0d2ec..fd7c6380e294 100644
--- a/drivers/acpi/acpica/nsinit.c
+++ b/drivers/acpi/acpica/nsinit.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsload.c b/drivers/acpi/acpica/nsload.c
index df18be94fefe..5f7dc691c183 100644
--- a/drivers/acpi/acpica/nsload.c
+++ b/drivers/acpi/acpica/nsload.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsnames.c b/drivers/acpi/acpica/nsnames.c
index d3104af57e13..d5fa520c3de5 100644
--- a/drivers/acpi/acpica/nsnames.c
+++ b/drivers/acpi/acpica/nsnames.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsobject.c b/drivers/acpi/acpica/nsobject.c
index 41a9213dd5af..3bb8bf105ea2 100644
--- a/drivers/acpi/acpica/nsobject.c
+++ b/drivers/acpi/acpica/nsobject.c
@@ -6,7 +6,7 @@
6 ******************************************************************************/ 6 ******************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsparse.c b/drivers/acpi/acpica/nsparse.c
index 5808c89e9fac..b3234fa795b8 100644
--- a/drivers/acpi/acpica/nsparse.c
+++ b/drivers/acpi/acpica/nsparse.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nspredef.c b/drivers/acpi/acpica/nspredef.c
index 7096bcda0c72..9fb03fa8ffde 100644
--- a/drivers/acpi/acpica/nspredef.c
+++ b/drivers/acpi/acpica/nspredef.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsrepair.c b/drivers/acpi/acpica/nsrepair.c
index d1c136692667..1d76ac85b5e7 100644
--- a/drivers/acpi/acpica/nsrepair.c
+++ b/drivers/acpi/acpica/nsrepair.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsrepair2.c b/drivers/acpi/acpica/nsrepair2.c
index 4ef9f43ea926..973883babee1 100644
--- a/drivers/acpi/acpica/nsrepair2.c
+++ b/drivers/acpi/acpica/nsrepair2.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nssearch.c b/drivers/acpi/acpica/nssearch.c
index 41102a84272f..28b0d7a62b99 100644
--- a/drivers/acpi/acpica/nssearch.c
+++ b/drivers/acpi/acpica/nssearch.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsutils.c b/drivers/acpi/acpica/nsutils.c
index a7d6ad9c111b..cb1b104a69a2 100644
--- a/drivers/acpi/acpica/nsutils.c
+++ b/drivers/acpi/acpica/nsutils.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nswalk.c b/drivers/acpi/acpica/nswalk.c
index 2cd5be8fe10f..345f0c3c6ad2 100644
--- a/drivers/acpi/acpica/nswalk.c
+++ b/drivers/acpi/acpica/nswalk.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsxfeval.c b/drivers/acpi/acpica/nsxfeval.c
index ebef8a7fd707..c53f0040e490 100644
--- a/drivers/acpi/acpica/nsxfeval.c
+++ b/drivers/acpi/acpica/nsxfeval.c
@@ -6,7 +6,7 @@
6 ******************************************************************************/ 6 ******************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/nsxfname.c b/drivers/acpi/acpica/nsxfname.c
index b01e45a415e3..3fd4526f3dba 100644
--- a/drivers/acpi/acpica/nsxfname.c
+++ b/drivers/acpi/acpica/nsxfname.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
@@ -603,10 +603,9 @@ acpi_status acpi_install_method(u8 *buffer)
603 method_obj->method.param_count = (u8) 603 method_obj->method.param_count = (u8)
604 (method_flags & AML_METHOD_ARG_COUNT); 604 (method_flags & AML_METHOD_ARG_COUNT);
605 605
606 method_obj->method.method_flags = (u8)
607 (method_flags & ~AML_METHOD_ARG_COUNT);
608
609 if (method_flags & AML_METHOD_SERIALIZED) { 606 if (method_flags & AML_METHOD_SERIALIZED) {
607 method_obj->method.info_flags = ACPI_METHOD_SERIALIZED;
608
610 method_obj->method.sync_level = (u8) 609 method_obj->method.sync_level = (u8)
611 ((method_flags & AML_METHOD_SYNC_LEVEL) >> 4); 610 ((method_flags & AML_METHOD_SYNC_LEVEL) >> 4);
612 } 611 }
diff --git a/drivers/acpi/acpica/nsxfobj.c b/drivers/acpi/acpica/nsxfobj.c
index a1f04e9b8030..db7660f8b869 100644
--- a/drivers/acpi/acpica/nsxfobj.c
+++ b/drivers/acpi/acpica/nsxfobj.c
@@ -6,7 +6,7 @@
6 ******************************************************************************/ 6 ******************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psargs.c b/drivers/acpi/acpica/psargs.c
index 7df1a4c95274..e1fad0ee0136 100644
--- a/drivers/acpi/acpica/psargs.c
+++ b/drivers/acpi/acpica/psargs.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psloop.c b/drivers/acpi/acpica/psloop.c
index 2f2e7760938c..01dd70d1de51 100644
--- a/drivers/acpi/acpica/psloop.c
+++ b/drivers/acpi/acpica/psloop.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -655,7 +655,7 @@ acpi_ps_link_module_code(union acpi_parse_object *parent_op,
655 method_obj->method.aml_start = aml_start; 655 method_obj->method.aml_start = aml_start;
656 method_obj->method.aml_length = aml_length; 656 method_obj->method.aml_length = aml_length;
657 method_obj->method.owner_id = owner_id; 657 method_obj->method.owner_id = owner_id;
658 method_obj->method.flags |= AOPOBJ_MODULE_LEVEL; 658 method_obj->method.info_flags |= ACPI_METHOD_MODULE_LEVEL;
659 659
660 /* 660 /*
661 * Save the parent node in next_object. This is cheating, but we 661 * Save the parent node in next_object. This is cheating, but we
diff --git a/drivers/acpi/acpica/psopcode.c b/drivers/acpi/acpica/psopcode.c
index 2b0c3be2b1b8..bed08de7528c 100644
--- a/drivers/acpi/acpica/psopcode.c
+++ b/drivers/acpi/acpica/psopcode.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psparse.c b/drivers/acpi/acpica/psparse.c
index 8d81542194d4..9bb0cbd37b5e 100644
--- a/drivers/acpi/acpica/psparse.c
+++ b/drivers/acpi/acpica/psparse.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -55,7 +55,6 @@
55#include "acparser.h" 55#include "acparser.h"
56#include "acdispat.h" 56#include "acdispat.h"
57#include "amlcode.h" 57#include "amlcode.h"
58#include "acnamesp.h"
59#include "acinterp.h" 58#include "acinterp.h"
60 59
61#define _COMPONENT ACPI_PARSER 60#define _COMPONENT ACPI_PARSER
@@ -539,24 +538,16 @@ acpi_status acpi_ps_parse_aml(struct acpi_walk_state *walk_state)
539 /* Check for possible multi-thread reentrancy problem */ 538 /* Check for possible multi-thread reentrancy problem */
540 539
541 if ((status == AE_ALREADY_EXISTS) && 540 if ((status == AE_ALREADY_EXISTS) &&
542 (!walk_state->method_desc->method.mutex)) { 541 (!(walk_state->method_desc->method.
543 ACPI_INFO((AE_INFO, 542 info_flags & ACPI_METHOD_SERIALIZED))) {
544 "Marking method %4.4s as Serialized because of AE_ALREADY_EXISTS error",
545 walk_state->method_node->name.
546 ascii));
547
548 /* 543 /*
549 * Method tried to create an object twice. The probable cause is 544 * Method is not serialized and tried to create an object
550 * that the method cannot handle reentrancy. 545 * twice. The probable cause is that the method cannot
551 * 546 * handle reentrancy. Mark as "pending serialized" now, and
552 * The method is marked not_serialized, but it tried to create 547 * then mark "serialized" when the last thread exits.
553 * a named object, causing the second thread entrance to fail.
554 * Workaround this problem by marking the method permanently
555 * as Serialized.
556 */ 548 */
557 walk_state->method_desc->method.method_flags |= 549 walk_state->method_desc->method.info_flags |=
558 AML_METHOD_SERIALIZED; 550 ACPI_METHOD_SERIALIZED_PENDING;
559 walk_state->method_desc->method.sync_level = 0;
560 } 551 }
561 } 552 }
562 553
diff --git a/drivers/acpi/acpica/psscope.c b/drivers/acpi/acpica/psscope.c
index 40e2b279ea12..a5faa1323a02 100644
--- a/drivers/acpi/acpica/psscope.c
+++ b/drivers/acpi/acpica/psscope.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/pstree.c b/drivers/acpi/acpica/pstree.c
index d4b970c3630b..f1464c03aa42 100644
--- a/drivers/acpi/acpica/pstree.c
+++ b/drivers/acpi/acpica/pstree.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psutils.c b/drivers/acpi/acpica/psutils.c
index fe29eee5adb1..7eda78503422 100644
--- a/drivers/acpi/acpica/psutils.c
+++ b/drivers/acpi/acpica/psutils.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/pswalk.c b/drivers/acpi/acpica/pswalk.c
index 8abb9629443d..3312d6368bf1 100644
--- a/drivers/acpi/acpica/pswalk.c
+++ b/drivers/acpi/acpica/pswalk.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/psxface.c b/drivers/acpi/acpica/psxface.c
index c42f067cff9d..8086805d4494 100644
--- a/drivers/acpi/acpica/psxface.c
+++ b/drivers/acpi/acpica/psxface.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
@@ -47,7 +47,6 @@
47#include "acdispat.h" 47#include "acdispat.h"
48#include "acinterp.h" 48#include "acinterp.h"
49#include "actables.h" 49#include "actables.h"
50#include "amlcode.h"
51 50
52#define _COMPONENT ACPI_PARSER 51#define _COMPONENT ACPI_PARSER
53ACPI_MODULE_NAME("psxface") 52ACPI_MODULE_NAME("psxface")
@@ -285,15 +284,15 @@ acpi_status acpi_ps_execute_method(struct acpi_evaluate_info *info)
285 goto cleanup; 284 goto cleanup;
286 } 285 }
287 286
288 if (info->obj_desc->method.flags & AOPOBJ_MODULE_LEVEL) { 287 if (info->obj_desc->method.info_flags & ACPI_METHOD_MODULE_LEVEL) {
289 walk_state->parse_flags |= ACPI_PARSE_MODULE_LEVEL; 288 walk_state->parse_flags |= ACPI_PARSE_MODULE_LEVEL;
290 } 289 }
291 290
292 /* Invoke an internal method if necessary */ 291 /* Invoke an internal method if necessary */
293 292
294 if (info->obj_desc->method.method_flags & AML_METHOD_INTERNAL_ONLY) { 293 if (info->obj_desc->method.info_flags & ACPI_METHOD_INTERNAL_ONLY) {
295 status = 294 status =
296 info->obj_desc->method.extra.implementation(walk_state); 295 info->obj_desc->method.dispatch.implementation(walk_state);
297 info->return_object = walk_state->return_desc; 296 info->return_object = walk_state->return_desc;
298 297
299 /* Cleanup states */ 298 /* Cleanup states */
diff --git a/drivers/acpi/acpica/rsaddr.c b/drivers/acpi/acpica/rsaddr.c
index 226c806ae986..9e66f9078426 100644
--- a/drivers/acpi/acpica/rsaddr.c
+++ b/drivers/acpi/acpica/rsaddr.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rscalc.c b/drivers/acpi/acpica/rscalc.c
index d6ebf7ec622d..3a8a89ec2ca4 100644
--- a/drivers/acpi/acpica/rscalc.c
+++ b/drivers/acpi/acpica/rscalc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rscreate.c b/drivers/acpi/acpica/rscreate.c
index c80a2eea3a01..4ce6e1147e80 100644
--- a/drivers/acpi/acpica/rscreate.c
+++ b/drivers/acpi/acpica/rscreate.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsdump.c b/drivers/acpi/acpica/rsdump.c
index f859b0386fe4..33db7520c74b 100644
--- a/drivers/acpi/acpica/rsdump.c
+++ b/drivers/acpi/acpica/rsdump.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsinfo.c b/drivers/acpi/acpica/rsinfo.c
index 1fd868b964fd..f9ea60872aa4 100644
--- a/drivers/acpi/acpica/rsinfo.c
+++ b/drivers/acpi/acpica/rsinfo.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsio.c b/drivers/acpi/acpica/rsio.c
index 33bff17c0bbc..0c7efef008be 100644
--- a/drivers/acpi/acpica/rsio.c
+++ b/drivers/acpi/acpica/rsio.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsirq.c b/drivers/acpi/acpica/rsirq.c
index 545da40d7fa7..50b8ad211167 100644
--- a/drivers/acpi/acpica/rsirq.c
+++ b/drivers/acpi/acpica/rsirq.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rslist.c b/drivers/acpi/acpica/rslist.c
index 7335f22aac20..1bfcef736c50 100644
--- a/drivers/acpi/acpica/rslist.c
+++ b/drivers/acpi/acpica/rslist.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsmemory.c b/drivers/acpi/acpica/rsmemory.c
index 887b8ba8c432..7cc6d8625f1e 100644
--- a/drivers/acpi/acpica/rsmemory.c
+++ b/drivers/acpi/acpica/rsmemory.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsmisc.c b/drivers/acpi/acpica/rsmisc.c
index f8cd9e87d987..410264b22a29 100644
--- a/drivers/acpi/acpica/rsmisc.c
+++ b/drivers/acpi/acpica/rsmisc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsutils.c b/drivers/acpi/acpica/rsutils.c
index 491191e6cf69..231811e56939 100644
--- a/drivers/acpi/acpica/rsutils.c
+++ b/drivers/acpi/acpica/rsutils.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/rsxface.c b/drivers/acpi/acpica/rsxface.c
index 9f6a6e7e1c8e..2ff657a28f26 100644
--- a/drivers/acpi/acpica/rsxface.c
+++ b/drivers/acpi/acpica/rsxface.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbfadt.c b/drivers/acpi/acpica/tbfadt.c
index d2ff4325c427..428d44e2d162 100644
--- a/drivers/acpi/acpica/tbfadt.c
+++ b/drivers/acpi/acpica/tbfadt.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbfind.c b/drivers/acpi/acpica/tbfind.c
index 989d5c867864..a55cb2bb5abb 100644
--- a/drivers/acpi/acpica/tbfind.c
+++ b/drivers/acpi/acpica/tbfind.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbinstal.c b/drivers/acpi/acpica/tbinstal.c
index 83d7af8d0905..48db0944ce4a 100644
--- a/drivers/acpi/acpica/tbinstal.c
+++ b/drivers/acpi/acpica/tbinstal.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbutils.c b/drivers/acpi/acpica/tbutils.c
index 34f9c2bc5e1f..0f2d395feaba 100644
--- a/drivers/acpi/acpica/tbutils.c
+++ b/drivers/acpi/acpica/tbutils.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbxface.c b/drivers/acpi/acpica/tbxface.c
index 4a8b9e6ea57a..4b7085dfc683 100644
--- a/drivers/acpi/acpica/tbxface.c
+++ b/drivers/acpi/acpica/tbxface.c
@@ -6,7 +6,7 @@
6 *****************************************************************************/ 6 *****************************************************************************/
7 7
8/* 8/*
9 * Copyright (C) 2000 - 2010, Intel Corp. 9 * Copyright (C) 2000 - 2011, Intel Corp.
10 * All rights reserved. 10 * All rights reserved.
11 * 11 *
12 * Redistribution and use in source and binary forms, with or without 12 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/tbxfroot.c b/drivers/acpi/acpica/tbxfroot.c
index fd2c07d1d3ac..7eb6c6cc1edf 100644
--- a/drivers/acpi/acpica/tbxfroot.c
+++ b/drivers/acpi/acpica/tbxfroot.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utalloc.c b/drivers/acpi/acpica/utalloc.c
index 8f0896281567..0a697351cf69 100644
--- a/drivers/acpi/acpica/utalloc.c
+++ b/drivers/acpi/acpica/utalloc.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utcopy.c b/drivers/acpi/acpica/utcopy.c
index 6fef83f04bcd..aded299a2fa8 100644
--- a/drivers/acpi/acpica/utcopy.c
+++ b/drivers/acpi/acpica/utcopy.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utdebug.c b/drivers/acpi/acpica/utdebug.c
index f21c486929a5..a9bcd816dc29 100644
--- a/drivers/acpi/acpica/utdebug.c
+++ b/drivers/acpi/acpica/utdebug.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utdelete.c b/drivers/acpi/acpica/utdelete.c
index ed794cd033ea..31f5a7832ef1 100644
--- a/drivers/acpi/acpica/utdelete.c
+++ b/drivers/acpi/acpica/utdelete.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/uteval.c b/drivers/acpi/acpica/uteval.c
index 22f59ef604e0..18f73c9d10bc 100644
--- a/drivers/acpi/acpica/uteval.c
+++ b/drivers/acpi/acpica/uteval.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utglobal.c b/drivers/acpi/acpica/utglobal.c
index 508537f884ac..97dd9bbf055a 100644
--- a/drivers/acpi/acpica/utglobal.c
+++ b/drivers/acpi/acpica/utglobal.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utids.c b/drivers/acpi/acpica/utids.c
index d2906328535d..b679ea693545 100644
--- a/drivers/acpi/acpica/utids.c
+++ b/drivers/acpi/acpica/utids.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utinit.c b/drivers/acpi/acpica/utinit.c
index c1b1c803ea9b..191b6828cce9 100644
--- a/drivers/acpi/acpica/utinit.c
+++ b/drivers/acpi/acpica/utinit.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utlock.c b/drivers/acpi/acpica/utlock.c
index b081cd46a15f..f6bb75c6faf5 100644
--- a/drivers/acpi/acpica/utlock.c
+++ b/drivers/acpi/acpica/utlock.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmath.c b/drivers/acpi/acpica/utmath.c
index 49cf7b7fd816..ce481da9bb45 100644
--- a/drivers/acpi/acpica/utmath.c
+++ b/drivers/acpi/acpica/utmath.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmisc.c b/drivers/acpi/acpica/utmisc.c
index c7d0e05ef5a4..c33a852d4f42 100644
--- a/drivers/acpi/acpica/utmisc.c
+++ b/drivers/acpi/acpica/utmisc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utmutex.c b/drivers/acpi/acpica/utmutex.c
index 199528ff7f1d..a946c689f03b 100644
--- a/drivers/acpi/acpica/utmutex.c
+++ b/drivers/acpi/acpica/utmutex.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utobject.c b/drivers/acpi/acpica/utobject.c
index fd1fa2749ea5..188340a017b4 100644
--- a/drivers/acpi/acpica/utobject.c
+++ b/drivers/acpi/acpica/utobject.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utosi.c b/drivers/acpi/acpica/utosi.c
index 18c59a85fdca..1fb10cb8f11d 100644
--- a/drivers/acpi/acpica/utosi.c
+++ b/drivers/acpi/acpica/utosi.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utresrc.c b/drivers/acpi/acpica/utresrc.c
index 7965919000b1..84e051844247 100644
--- a/drivers/acpi/acpica/utresrc.c
+++ b/drivers/acpi/acpica/utresrc.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utstate.c b/drivers/acpi/acpica/utstate.c
index d35d109b8da2..30c21e1a9360 100644
--- a/drivers/acpi/acpica/utstate.c
+++ b/drivers/acpi/acpica/utstate.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utxface.c b/drivers/acpi/acpica/utxface.c
index 1f484c9a6888..98ad125e14ff 100644
--- a/drivers/acpi/acpica/utxface.c
+++ b/drivers/acpi/acpica/utxface.c
@@ -5,7 +5,7 @@
5 *****************************************************************************/ 5 *****************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/acpica/utxferror.c b/drivers/acpi/acpica/utxferror.c
index 6f12e314fbae..916ae097c43c 100644
--- a/drivers/acpi/acpica/utxferror.c
+++ b/drivers/acpi/acpica/utxferror.c
@@ -5,7 +5,7 @@
5 ******************************************************************************/ 5 ******************************************************************************/
6 6
7/* 7/*
8 * Copyright (C) 2000 - 2010, Intel Corp. 8 * Copyright (C) 2000 - 2011, Intel Corp.
9 * All rights reserved. 9 * All rights reserved.
10 * 10 *
11 * Redistribution and use in source and binary forms, with or without 11 * Redistribution and use in source and binary forms, with or without
diff --git a/drivers/acpi/battery.c b/drivers/acpi/battery.c
index 68bc227e7c4c..ac1a599f5147 100644
--- a/drivers/acpi/battery.c
+++ b/drivers/acpi/battery.c
@@ -998,7 +998,6 @@ static int acpi_battery_resume(struct acpi_device *device)
998 if (!device) 998 if (!device)
999 return -EINVAL; 999 return -EINVAL;
1000 battery = acpi_driver_data(device); 1000 battery = acpi_driver_data(device);
1001 acpi_battery_refresh(battery);
1002 battery->update_time = 0; 1001 battery->update_time = 0;
1003 acpi_battery_update(battery); 1002 acpi_battery_update(battery);
1004 return 0; 1003 return 0;
diff --git a/drivers/acpi/nvs.c b/drivers/acpi/nvs.c
index 54b6ab8040a6..fa5a1df42b79 100644
--- a/drivers/acpi/nvs.c
+++ b/drivers/acpi/nvs.c
@@ -12,6 +12,7 @@
12#include <linux/mm.h> 12#include <linux/mm.h>
13#include <linux/slab.h> 13#include <linux/slab.h>
14#include <linux/acpi.h> 14#include <linux/acpi.h>
15#include <linux/acpi_io.h>
15#include <acpi/acpiosxf.h> 16#include <acpi/acpiosxf.h>
16 17
17/* 18/*
@@ -80,7 +81,7 @@ void suspend_nvs_free(void)
80 free_page((unsigned long)entry->data); 81 free_page((unsigned long)entry->data);
81 entry->data = NULL; 82 entry->data = NULL;
82 if (entry->kaddr) { 83 if (entry->kaddr) {
83 acpi_os_unmap_memory(entry->kaddr, entry->size); 84 iounmap(entry->kaddr);
84 entry->kaddr = NULL; 85 entry->kaddr = NULL;
85 } 86 }
86 } 87 }
@@ -114,8 +115,8 @@ int suspend_nvs_save(void)
114 115
115 list_for_each_entry(entry, &nvs_list, node) 116 list_for_each_entry(entry, &nvs_list, node)
116 if (entry->data) { 117 if (entry->data) {
117 entry->kaddr = acpi_os_map_memory(entry->phys_start, 118 entry->kaddr = acpi_os_ioremap(entry->phys_start,
118 entry->size); 119 entry->size);
119 if (!entry->kaddr) { 120 if (!entry->kaddr) {
120 suspend_nvs_free(); 121 suspend_nvs_free();
121 return -ENOMEM; 122 return -ENOMEM;
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c
index e2dd6de5d50c..b0931818cf98 100644
--- a/drivers/acpi/osl.c
+++ b/drivers/acpi/osl.c
@@ -38,6 +38,7 @@
38#include <linux/workqueue.h> 38#include <linux/workqueue.h>
39#include <linux/nmi.h> 39#include <linux/nmi.h>
40#include <linux/acpi.h> 40#include <linux/acpi.h>
41#include <linux/acpi_io.h>
41#include <linux/efi.h> 42#include <linux/efi.h>
42#include <linux/ioport.h> 43#include <linux/ioport.h>
43#include <linux/list.h> 44#include <linux/list.h>
@@ -302,9 +303,10 @@ void __iomem *__init_refok
302acpi_os_map_memory(acpi_physical_address phys, acpi_size size) 303acpi_os_map_memory(acpi_physical_address phys, acpi_size size)
303{ 304{
304 struct acpi_ioremap *map, *tmp_map; 305 struct acpi_ioremap *map, *tmp_map;
305 unsigned long flags, pg_sz; 306 unsigned long flags;
306 void __iomem *virt; 307 void __iomem *virt;
307 phys_addr_t pg_off; 308 acpi_physical_address pg_off;
309 acpi_size pg_sz;
308 310
309 if (phys > ULONG_MAX) { 311 if (phys > ULONG_MAX) {
310 printk(KERN_ERR PREFIX "Cannot map memory that high\n"); 312 printk(KERN_ERR PREFIX "Cannot map memory that high\n");
@@ -320,7 +322,7 @@ acpi_os_map_memory(acpi_physical_address phys, acpi_size size)
320 322
321 pg_off = round_down(phys, PAGE_SIZE); 323 pg_off = round_down(phys, PAGE_SIZE);
322 pg_sz = round_up(phys + size, PAGE_SIZE) - pg_off; 324 pg_sz = round_up(phys + size, PAGE_SIZE) - pg_off;
323 virt = ioremap_cache(pg_off, pg_sz); 325 virt = acpi_os_ioremap(pg_off, pg_sz);
324 if (!virt) { 326 if (!virt) {
325 kfree(map); 327 kfree(map);
326 return NULL; 328 return NULL;
@@ -642,7 +644,7 @@ acpi_os_read_memory(acpi_physical_address phys_addr, u32 * value, u32 width)
642 virt_addr = acpi_map_vaddr_lookup(phys_addr, size); 644 virt_addr = acpi_map_vaddr_lookup(phys_addr, size);
643 rcu_read_unlock(); 645 rcu_read_unlock();
644 if (!virt_addr) { 646 if (!virt_addr) {
645 virt_addr = ioremap_cache(phys_addr, size); 647 virt_addr = acpi_os_ioremap(phys_addr, size);
646 unmap = 1; 648 unmap = 1;
647 } 649 }
648 if (!value) 650 if (!value)
@@ -678,7 +680,7 @@ acpi_os_write_memory(acpi_physical_address phys_addr, u32 value, u32 width)
678 virt_addr = acpi_map_vaddr_lookup(phys_addr, size); 680 virt_addr = acpi_map_vaddr_lookup(phys_addr, size);
679 rcu_read_unlock(); 681 rcu_read_unlock();
680 if (!virt_addr) { 682 if (!virt_addr) {
681 virt_addr = ioremap_cache(phys_addr, size); 683 virt_addr = acpi_os_ioremap(phys_addr, size);
682 unmap = 1; 684 unmap = 1;
683 } 685 }
684 686
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index fdd3aeeb6def..d6a8cd14de2e 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -166,6 +166,7 @@ static void acpi_pm_finish(void)
166 u32 acpi_state = acpi_target_sleep_state; 166 u32 acpi_state = acpi_target_sleep_state;
167 167
168 acpi_ec_unblock_transactions(); 168 acpi_ec_unblock_transactions();
169 suspend_nvs_free();
169 170
170 if (acpi_state == ACPI_STATE_S0) 171 if (acpi_state == ACPI_STATE_S0)
171 return; 172 return;
@@ -186,7 +187,6 @@ static void acpi_pm_finish(void)
186 */ 187 */
187static void acpi_pm_end(void) 188static void acpi_pm_end(void)
188{ 189{
189 suspend_nvs_free();
190 /* 190 /*
191 * This is necessary in case acpi_pm_finish() is not called during a 191 * This is necessary in case acpi_pm_finish() is not called during a
192 * failing transition to a sleep state. 192 * failing transition to a sleep state.
diff --git a/drivers/ata/Kconfig b/drivers/ata/Kconfig
index c6b298d4c136..c2328aed0836 100644
--- a/drivers/ata/Kconfig
+++ b/drivers/ata/Kconfig
@@ -783,7 +783,7 @@ config PATA_PCMCIA
783 783
784config PATA_PLATFORM 784config PATA_PLATFORM
785 tristate "Generic platform device PATA support" 785 tristate "Generic platform device PATA support"
786 depends on EMBEDDED || PPC || HAVE_PATA_PLATFORM 786 depends on EXPERT || PPC || HAVE_PATA_PLATFORM
787 help 787 help
788 This option enables support for generic directly connected ATA 788 This option enables support for generic directly connected ATA
789 devices commonly found on embedded systems. 789 devices commonly found on embedded systems.
diff --git a/drivers/atm/idt77105.c b/drivers/atm/idt77105.c
index bca9cb89a118..487a54739854 100644
--- a/drivers/atm/idt77105.c
+++ b/drivers/atm/idt77105.c
@@ -151,7 +151,7 @@ static int fetch_stats(struct atm_dev *dev,struct idt77105_stats __user *arg,int
151 spin_unlock_irqrestore(&idt77105_priv_lock, flags); 151 spin_unlock_irqrestore(&idt77105_priv_lock, flags);
152 if (arg == NULL) 152 if (arg == NULL)
153 return 0; 153 return 0;
154 return copy_to_user(arg, &PRIV(dev)->stats, 154 return copy_to_user(arg, &stats,
155 sizeof(struct idt77105_stats)) ? -EFAULT : 0; 155 sizeof(struct idt77105_stats)) ? -EFAULT : 0;
156} 156}
157 157
diff --git a/drivers/base/Kconfig b/drivers/base/Kconfig
index fd96345bc35c..d57e8d0fb823 100644
--- a/drivers/base/Kconfig
+++ b/drivers/base/Kconfig
@@ -70,7 +70,7 @@ config PREVENT_FIRMWARE_BUILD
70 If unsure say Y here. 70 If unsure say Y here.
71 71
72config FW_LOADER 72config FW_LOADER
73 tristate "Userspace firmware loading support" if EMBEDDED 73 tristate "Userspace firmware loading support" if EXPERT
74 default y 74 default y
75 ---help--- 75 ---help---
76 This option is provided for the case where no in-kernel-tree modules 76 This option is provided for the case where no in-kernel-tree modules
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 0f175a866ef0..b7980a83ce2d 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -5,7 +5,7 @@
5menu "Character devices" 5menu "Character devices"
6 6
7config VT 7config VT
8 bool "Virtual terminal" if EMBEDDED 8 bool "Virtual terminal" if EXPERT
9 depends on !S390 9 depends on !S390
10 select INPUT 10 select INPUT
11 default y 11 default y
@@ -39,13 +39,13 @@ config VT
39config CONSOLE_TRANSLATIONS 39config CONSOLE_TRANSLATIONS
40 depends on VT 40 depends on VT
41 default y 41 default y
42 bool "Enable character translations in console" if EMBEDDED 42 bool "Enable character translations in console" if EXPERT
43 ---help--- 43 ---help---
44 This enables support for font mapping and Unicode translation 44 This enables support for font mapping and Unicode translation
45 on virtual consoles. 45 on virtual consoles.
46 46
47config VT_CONSOLE 47config VT_CONSOLE
48 bool "Support for console on virtual terminal" if EMBEDDED 48 bool "Support for console on virtual terminal" if EXPERT
49 depends on VT 49 depends on VT
50 default y 50 default y
51 ---help--- 51 ---help---
@@ -426,10 +426,10 @@ config SGI_MBCS
426 If you have an SGI Altix with an attached SABrick 426 If you have an SGI Altix with an attached SABrick
427 say Y or M here, otherwise say N. 427 say Y or M here, otherwise say N.
428 428
429source "drivers/serial/Kconfig" 429source "drivers/tty/serial/Kconfig"
430 430
431config UNIX98_PTYS 431config UNIX98_PTYS
432 bool "Unix98 PTY support" if EMBEDDED 432 bool "Unix98 PTY support" if EXPERT
433 default y 433 default y
434 ---help--- 434 ---help---
435 A pseudo terminal (PTY) is a software device consisting of two 435 A pseudo terminal (PTY) is a software device consisting of two
@@ -495,7 +495,7 @@ config LEGACY_PTY_COUNT
495 495
496config TTY_PRINTK 496config TTY_PRINTK
497 bool "TTY driver to output user messages via printk" 497 bool "TTY driver to output user messages via printk"
498 depends on EMBEDDED 498 depends on EXPERT
499 default n 499 default n
500 ---help--- 500 ---help---
501 If you say Y here, the support for writing user messages (i.e. 501 If you say Y here, the support for writing user messages (i.e.
diff --git a/drivers/char/Makefile b/drivers/char/Makefile
index 1e9dffb33778..5bc765d4c3ca 100644
--- a/drivers/char/Makefile
+++ b/drivers/char/Makefile
@@ -30,25 +30,12 @@ obj-$(CONFIG_SYNCLINK_GT) += synclink_gt.o
30obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o 30obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o
31obj-$(CONFIG_SX) += sx.o generic_serial.o 31obj-$(CONFIG_SX) += sx.o generic_serial.o
32obj-$(CONFIG_RIO) += rio/ generic_serial.o 32obj-$(CONFIG_RIO) += rio/ generic_serial.o
33obj-$(CONFIG_HVC_CONSOLE) += hvc_vio.o hvsi.o
34obj-$(CONFIG_HVC_ISERIES) += hvc_iseries.o
35obj-$(CONFIG_HVC_RTAS) += hvc_rtas.o
36obj-$(CONFIG_HVC_TILE) += hvc_tile.o
37obj-$(CONFIG_HVC_DCC) += hvc_dcc.o
38obj-$(CONFIG_HVC_BEAT) += hvc_beat.o
39obj-$(CONFIG_HVC_DRIVER) += hvc_console.o
40obj-$(CONFIG_HVC_IRQ) += hvc_irq.o
41obj-$(CONFIG_HVC_XEN) += hvc_xen.o
42obj-$(CONFIG_HVC_IUCV) += hvc_iucv.o
43obj-$(CONFIG_HVC_UDBG) += hvc_udbg.o
44obj-$(CONFIG_VIRTIO_CONSOLE) += virtio_console.o
45obj-$(CONFIG_RAW_DRIVER) += raw.o 33obj-$(CONFIG_RAW_DRIVER) += raw.o
46obj-$(CONFIG_SGI_SNSC) += snsc.o snsc_event.o 34obj-$(CONFIG_SGI_SNSC) += snsc.o snsc_event.o
47obj-$(CONFIG_MSPEC) += mspec.o 35obj-$(CONFIG_MSPEC) += mspec.o
48obj-$(CONFIG_MMTIMER) += mmtimer.o 36obj-$(CONFIG_MMTIMER) += mmtimer.o
49obj-$(CONFIG_UV_MMTIMER) += uv_mmtimer.o 37obj-$(CONFIG_UV_MMTIMER) += uv_mmtimer.o
50obj-$(CONFIG_VIOTAPE) += viotape.o 38obj-$(CONFIG_VIOTAPE) += viotape.o
51obj-$(CONFIG_HVCS) += hvcs.o
52obj-$(CONFIG_IBM_BSR) += bsr.o 39obj-$(CONFIG_IBM_BSR) += bsr.o
53obj-$(CONFIG_SGI_MBCS) += mbcs.o 40obj-$(CONFIG_SGI_MBCS) += mbcs.o
54obj-$(CONFIG_BRIQ_PANEL) += briq_panel.o 41obj-$(CONFIG_BRIQ_PANEL) += briq_panel.o
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c
index 1f46f1cd9225..36e0fa161c2b 100644
--- a/drivers/char/tpm/tpm.c
+++ b/drivers/char/tpm/tpm.c
@@ -364,12 +364,14 @@ unsigned long tpm_calc_ordinal_duration(struct tpm_chip *chip,
364 tpm_protected_ordinal_duration[ordinal & 364 tpm_protected_ordinal_duration[ordinal &
365 TPM_PROTECTED_ORDINAL_MASK]; 365 TPM_PROTECTED_ORDINAL_MASK];
366 366
367 if (duration_idx != TPM_UNDEFINED) 367 if (duration_idx != TPM_UNDEFINED) {
368 duration = chip->vendor.duration[duration_idx]; 368 duration = chip->vendor.duration[duration_idx];
369 if (duration <= 0) 369 /* if duration is 0, it's because chip->vendor.duration wasn't */
370 /* filled yet, so we set the lowest timeout just to give enough */
371 /* time for tpm_get_timeouts() to succeed */
372 return (duration <= 0 ? HZ : duration);
373 } else
370 return 2 * 60 * HZ; 374 return 2 * 60 * HZ;
371 else
372 return duration;
373} 375}
374EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration); 376EXPORT_SYMBOL_GPL(tpm_calc_ordinal_duration);
375 377
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index c17a305ecb28..dd21df55689d 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -493,9 +493,6 @@ static int tpm_tis_init(struct device *dev, resource_size_t start,
493 "1.2 TPM (device-id 0x%X, rev-id %d)\n", 493 "1.2 TPM (device-id 0x%X, rev-id %d)\n",
494 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0))); 494 vendor >> 16, ioread8(chip->vendor.iobase + TPM_RID(0)));
495 495
496 if (is_itpm(to_pnp_dev(dev)))
497 itpm = 1;
498
499 if (itpm) 496 if (itpm)
500 dev_info(dev, "Intel iTPM workaround enabled\n"); 497 dev_info(dev, "Intel iTPM workaround enabled\n");
501 498
@@ -637,6 +634,9 @@ static int __devinit tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
637 else 634 else
638 interrupts = 0; 635 interrupts = 0;
639 636
637 if (is_itpm(pnp_dev))
638 itpm = 1;
639
640 return tpm_tis_init(&pnp_dev->dev, start, len, irq); 640 return tpm_tis_init(&pnp_dev->dev, start, len, irq);
641} 641}
642 642
diff --git a/drivers/clocksource/acpi_pm.c b/drivers/clocksource/acpi_pm.c
index cfb0f5278415..effe7974aa9a 100644
--- a/drivers/clocksource/acpi_pm.c
+++ b/drivers/clocksource/acpi_pm.c
@@ -202,17 +202,21 @@ static int __init init_acpi_pm_clocksource(void)
202 printk(KERN_INFO "PM-Timer had inconsistent results:" 202 printk(KERN_INFO "PM-Timer had inconsistent results:"
203 " 0x%#llx, 0x%#llx - aborting.\n", 203 " 0x%#llx, 0x%#llx - aborting.\n",
204 value1, value2); 204 value1, value2);
205 pmtmr_ioport = 0;
205 return -EINVAL; 206 return -EINVAL;
206 } 207 }
207 if (i == ACPI_PM_READ_CHECKS) { 208 if (i == ACPI_PM_READ_CHECKS) {
208 printk(KERN_INFO "PM-Timer failed consistency check " 209 printk(KERN_INFO "PM-Timer failed consistency check "
209 " (0x%#llx) - aborting.\n", value1); 210 " (0x%#llx) - aborting.\n", value1);
211 pmtmr_ioport = 0;
210 return -ENODEV; 212 return -ENODEV;
211 } 213 }
212 } 214 }
213 215
214 if (verify_pmtmr_rate() != 0) 216 if (verify_pmtmr_rate() != 0){
217 pmtmr_ioport = 0;
215 return -ENODEV; 218 return -ENODEV;
219 }
216 220
217 return clocksource_register_hz(&clocksource_acpi_pm, 221 return clocksource_register_hz(&clocksource_acpi_pm,
218 PMTMR_TICKS_PER_SEC); 222 PMTMR_TICKS_PER_SEC);
diff --git a/drivers/cpufreq/Kconfig b/drivers/cpufreq/Kconfig
index a8c8d9c19d74..ca8ee8093d6c 100644
--- a/drivers/cpufreq/Kconfig
+++ b/drivers/cpufreq/Kconfig
@@ -71,7 +71,7 @@ config CPU_FREQ_DEFAULT_GOV_PERFORMANCE
71 71
72config CPU_FREQ_DEFAULT_GOV_POWERSAVE 72config CPU_FREQ_DEFAULT_GOV_POWERSAVE
73 bool "powersave" 73 bool "powersave"
74 depends on EMBEDDED 74 depends on EXPERT
75 select CPU_FREQ_GOV_POWERSAVE 75 select CPU_FREQ_GOV_POWERSAVE
76 help 76 help
77 Use the CPUFreq governor 'powersave' as default. This sets 77 Use the CPUFreq governor 'powersave' as default. This sets
diff --git a/drivers/firewire/Kconfig b/drivers/firewire/Kconfig
index 68f942cb30f2..0c56989cd907 100644
--- a/drivers/firewire/Kconfig
+++ b/drivers/firewire/Kconfig
@@ -49,15 +49,13 @@ config FIREWIRE_SBP2
49 configuration section. 49 configuration section.
50 50
51config FIREWIRE_NET 51config FIREWIRE_NET
52 tristate "IP networking over 1394 (EXPERIMENTAL)" 52 tristate "IP networking over 1394"
53 depends on FIREWIRE && INET && EXPERIMENTAL 53 depends on FIREWIRE && INET
54 help 54 help
55 This enables IPv4 over IEEE 1394, providing IP connectivity with 55 This enables IPv4 over IEEE 1394, providing IP connectivity with
56 other implementations of RFC 2734 as found on several operating 56 other implementations of RFC 2734 as found on several operating
57 systems. Multicast support is currently limited. 57 systems. Multicast support is currently limited.
58 58
59 NOTE, this driver is not stable yet!
60
61 To compile this driver as a module, say M here: The module will be 59 To compile this driver as a module, say M here: The module will be
62 called firewire-net. 60 called firewire-net.
63 61
diff --git a/drivers/firewire/core-card.c b/drivers/firewire/core-card.c
index be0492398ef9..24ff35511e2b 100644
--- a/drivers/firewire/core-card.c
+++ b/drivers/firewire/core-card.c
@@ -75,6 +75,8 @@ static size_t config_rom_length = 1 + 4 + 1 + 1;
75#define BIB_IRMC ((1) << 31) 75#define BIB_IRMC ((1) << 31)
76#define NODE_CAPABILITIES 0x0c0083c0 /* per IEEE 1394 clause 8.3.2.6.5.2 */ 76#define NODE_CAPABILITIES 0x0c0083c0 /* per IEEE 1394 clause 8.3.2.6.5.2 */
77 77
78#define CANON_OUI 0x000085
79
78static void generate_config_rom(struct fw_card *card, __be32 *config_rom) 80static void generate_config_rom(struct fw_card *card, __be32 *config_rom)
79{ 81{
80 struct fw_descriptor *desc; 82 struct fw_descriptor *desc;
@@ -284,6 +286,7 @@ static void bm_work(struct work_struct *work)
284 bool root_device_is_running; 286 bool root_device_is_running;
285 bool root_device_is_cmc; 287 bool root_device_is_cmc;
286 bool irm_is_1394_1995_only; 288 bool irm_is_1394_1995_only;
289 bool keep_this_irm;
287 290
288 spin_lock_irq(&card->lock); 291 spin_lock_irq(&card->lock);
289 292
@@ -305,6 +308,10 @@ static void bm_work(struct work_struct *work)
305 irm_is_1394_1995_only = irm_device && irm_device->config_rom && 308 irm_is_1394_1995_only = irm_device && irm_device->config_rom &&
306 (irm_device->config_rom[2] & 0x000000f0) == 0; 309 (irm_device->config_rom[2] & 0x000000f0) == 0;
307 310
311 /* Canon MV5i works unreliably if it is not root node. */
312 keep_this_irm = irm_device && irm_device->config_rom &&
313 irm_device->config_rom[3] >> 8 == CANON_OUI;
314
308 root_id = root_node->node_id; 315 root_id = root_node->node_id;
309 irm_id = card->irm_node->node_id; 316 irm_id = card->irm_node->node_id;
310 local_id = card->local_node->node_id; 317 local_id = card->local_node->node_id;
@@ -333,7 +340,7 @@ static void bm_work(struct work_struct *work)
333 goto pick_me; 340 goto pick_me;
334 } 341 }
335 342
336 if (irm_is_1394_1995_only) { 343 if (irm_is_1394_1995_only && !keep_this_irm) {
337 new_root_id = local_id; 344 new_root_id = local_id;
338 fw_notify("%s, making local node (%02x) root.\n", 345 fw_notify("%s, making local node (%02x) root.\n",
339 "IRM is not 1394a compliant", new_root_id); 346 "IRM is not 1394a compliant", new_root_id);
@@ -382,7 +389,7 @@ static void bm_work(struct work_struct *work)
382 389
383 spin_lock_irq(&card->lock); 390 spin_lock_irq(&card->lock);
384 391
385 if (rcode != RCODE_COMPLETE) { 392 if (rcode != RCODE_COMPLETE && !keep_this_irm) {
386 /* 393 /*
387 * The lock request failed, maybe the IRM 394 * The lock request failed, maybe the IRM
388 * isn't really IRM capable after all. Let's 395 * isn't really IRM capable after all. Let's
diff --git a/drivers/firewire/net.c b/drivers/firewire/net.c
index c2e194c58667..7ed08fd1214e 100644
--- a/drivers/firewire/net.c
+++ b/drivers/firewire/net.c
@@ -191,6 +191,7 @@ struct fwnet_peer {
191 struct fwnet_device *dev; 191 struct fwnet_device *dev;
192 u64 guid; 192 u64 guid;
193 u64 fifo; 193 u64 fifo;
194 __be32 ip;
194 195
195 /* guarded by dev->lock */ 196 /* guarded by dev->lock */
196 struct list_head pd_list; /* received partial datagrams */ 197 struct list_head pd_list; /* received partial datagrams */
@@ -570,6 +571,8 @@ static int fwnet_finish_incoming_packet(struct net_device *net,
570 peer->speed = sspd; 571 peer->speed = sspd;
571 if (peer->max_payload > max_payload) 572 if (peer->max_payload > max_payload)
572 peer->max_payload = max_payload; 573 peer->max_payload = max_payload;
574
575 peer->ip = arp1394->sip;
573 } 576 }
574 spin_unlock_irqrestore(&dev->lock, flags); 577 spin_unlock_irqrestore(&dev->lock, flags);
575 578
@@ -1470,6 +1473,7 @@ static int fwnet_add_peer(struct fwnet_device *dev,
1470 peer->dev = dev; 1473 peer->dev = dev;
1471 peer->guid = (u64)device->config_rom[3] << 32 | device->config_rom[4]; 1474 peer->guid = (u64)device->config_rom[3] << 32 | device->config_rom[4];
1472 peer->fifo = FWNET_NO_FIFO_ADDR; 1475 peer->fifo = FWNET_NO_FIFO_ADDR;
1476 peer->ip = 0;
1473 INIT_LIST_HEAD(&peer->pd_list); 1477 INIT_LIST_HEAD(&peer->pd_list);
1474 peer->pdg_size = 0; 1478 peer->pdg_size = 0;
1475 peer->datagram_label = 0; 1479 peer->datagram_label = 0;
@@ -1589,10 +1593,13 @@ static int fwnet_remove(struct device *_dev)
1589 1593
1590 mutex_lock(&fwnet_device_mutex); 1594 mutex_lock(&fwnet_device_mutex);
1591 1595
1596 net = dev->netdev;
1597 if (net && peer->ip)
1598 arp_invalidate(net, peer->ip);
1599
1592 fwnet_remove_peer(peer, dev); 1600 fwnet_remove_peer(peer, dev);
1593 1601
1594 if (list_empty(&dev->peer_list)) { 1602 if (list_empty(&dev->peer_list)) {
1595 net = dev->netdev;
1596 unregister_netdev(net); 1603 unregister_netdev(net);
1597 1604
1598 if (dev->local_fifo != FWNET_NO_FIFO_ADDR) 1605 if (dev->local_fifo != FWNET_NO_FIFO_ADDR)
diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig
index e8b6a13515bd..e710424b59ea 100644
--- a/drivers/firmware/Kconfig
+++ b/drivers/firmware/Kconfig
@@ -27,7 +27,7 @@ config EDD_OFF
27 using the kernel parameter 'edd={on|skipmbr|off}'. 27 using the kernel parameter 'edd={on|skipmbr|off}'.
28 28
29config FIRMWARE_MEMMAP 29config FIRMWARE_MEMMAP
30 bool "Add firmware-provided memory map to sysfs" if EMBEDDED 30 bool "Add firmware-provided memory map to sysfs" if EXPERT
31 default X86 31 default X86
32 help 32 help
33 Add the firmware-provided (unmodified) memory map to /sys/firmware/memmap. 33 Add the firmware-provided (unmodified) memory map to /sys/firmware/memmap.
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 64828a7db77b..bea966f8ac84 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -23,7 +23,7 @@ config DRM_KMS_HELPER
23 tristate 23 tristate
24 depends on DRM 24 depends on DRM
25 select FB 25 select FB
26 select FRAMEBUFFER_CONSOLE if !EMBEDDED 26 select FRAMEBUFFER_CONSOLE if !EXPERT
27 help 27 help
28 FB and CRTC helpers for KMS drivers. 28 FB and CRTC helpers for KMS drivers.
29 29
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 5c4f9b9ecdc0..6977a1ce9d98 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -1533,11 +1533,11 @@ bool drm_fb_helper_hotplug_event(struct drm_fb_helper *fb_helper)
1533} 1533}
1534EXPORT_SYMBOL(drm_fb_helper_hotplug_event); 1534EXPORT_SYMBOL(drm_fb_helper_hotplug_event);
1535 1535
1536/* The Kconfig DRM_KMS_HELPER selects FRAMEBUFFER_CONSOLE (if !EMBEDDED) 1536/* The Kconfig DRM_KMS_HELPER selects FRAMEBUFFER_CONSOLE (if !EXPERT)
1537 * but the module doesn't depend on any fb console symbols. At least 1537 * but the module doesn't depend on any fb console symbols. At least
1538 * attempt to load fbcon to avoid leaving the system without a usable console. 1538 * attempt to load fbcon to avoid leaving the system without a usable console.
1539 */ 1539 */
1540#if defined(CONFIG_FRAMEBUFFER_CONSOLE_MODULE) && !defined(CONFIG_EMBEDDED) 1540#if defined(CONFIG_FRAMEBUFFER_CONSOLE_MODULE) && !defined(CONFIG_EXPERT)
1541static int __init drm_fb_helper_modinit(void) 1541static int __init drm_fb_helper_modinit(void)
1542{ 1542{
1543 const char *name = "fbcon"; 1543 const char *name = "fbcon";
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index 03e337072517..f6b9baa6a63d 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -928,6 +928,7 @@ static int intel_wrap_ring_buffer(struct intel_ring_buffer *ring)
928 928
929int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n) 929int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
930{ 930{
931 int reread = 0;
931 struct drm_device *dev = ring->dev; 932 struct drm_device *dev = ring->dev;
932 struct drm_i915_private *dev_priv = dev->dev_private; 933 struct drm_i915_private *dev_priv = dev->dev_private;
933 unsigned long end; 934 unsigned long end;
@@ -940,9 +941,8 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
940 * fallback to the slow and accurate path. 941 * fallback to the slow and accurate path.
941 */ 942 */
942 head = intel_read_status_page(ring, 4); 943 head = intel_read_status_page(ring, 4);
943 if (head < ring->actual_head) 944 if (reread)
944 head = I915_READ_HEAD(ring); 945 head = I915_READ_HEAD(ring);
945 ring->actual_head = head;
946 ring->head = head & HEAD_ADDR; 946 ring->head = head & HEAD_ADDR;
947 ring->space = ring->head - (ring->tail + 8); 947 ring->space = ring->head - (ring->tail + 8);
948 if (ring->space < 0) 948 if (ring->space < 0)
@@ -961,6 +961,7 @@ int intel_wait_ring_buffer(struct intel_ring_buffer *ring, int n)
961 msleep(1); 961 msleep(1);
962 if (atomic_read(&dev_priv->mm.wedged)) 962 if (atomic_read(&dev_priv->mm.wedged))
963 return -EAGAIN; 963 return -EAGAIN;
964 reread = 1;
964 } while (!time_after(jiffies, end)); 965 } while (!time_after(jiffies, end));
965 trace_i915_ring_wait_end (dev); 966 trace_i915_ring_wait_end (dev);
966 return -EBUSY; 967 return -EBUSY;
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h
index be9087e4c9be..5b0abfa881fc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -47,7 +47,6 @@ struct intel_ring_buffer {
47 struct drm_device *dev; 47 struct drm_device *dev;
48 struct drm_i915_gem_object *obj; 48 struct drm_i915_gem_object *obj;
49 49
50 u32 actual_head;
51 u32 head; 50 u32 head;
52 u32 tail; 51 u32 tail;
53 int space; 52 int space;
diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
index 21d6c29c2d21..de70959b9ed5 100644
--- a/drivers/gpu/drm/nouveau/Kconfig
+++ b/drivers/gpu/drm/nouveau/Kconfig
@@ -8,7 +8,7 @@ config DRM_NOUVEAU
8 select FB_CFB_COPYAREA 8 select FB_CFB_COPYAREA
9 select FB_CFB_IMAGEBLIT 9 select FB_CFB_IMAGEBLIT
10 select FB 10 select FB
11 select FRAMEBUFFER_CONSOLE if !EMBEDDED 11 select FRAMEBUFFER_CONSOLE if !EXPERT
12 select FB_BACKLIGHT if DRM_NOUVEAU_BACKLIGHT 12 select FB_BACKLIGHT if DRM_NOUVEAU_BACKLIGHT
13 select ACPI_VIDEO if ACPI && X86 && BACKLIGHT_CLASS_DEVICE && VIDEO_OUTPUT_CONTROL && INPUT 13 select ACPI_VIDEO if ACPI && X86 && BACKLIGHT_CLASS_DEVICE && VIDEO_OUTPUT_CONTROL && INPUT
14 help 14 help
diff --git a/drivers/gpu/vga/Kconfig b/drivers/gpu/vga/Kconfig
index 8d0e31a22027..96c83a9a76bb 100644
--- a/drivers/gpu/vga/Kconfig
+++ b/drivers/gpu/vga/Kconfig
@@ -1,5 +1,5 @@
1config VGA_ARB 1config VGA_ARB
2 bool "VGA Arbitration" if EMBEDDED 2 bool "VGA Arbitration" if EXPERT
3 default y 3 default y
4 depends on PCI 4 depends on PCI
5 help 5 help
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index 24cca2f69dfc..2560f01c1a63 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -62,9 +62,9 @@ config HID_3M_PCT
62 Support for 3M PCT touch screens. 62 Support for 3M PCT touch screens.
63 63
64config HID_A4TECH 64config HID_A4TECH
65 tristate "A4 tech mice" if EMBEDDED 65 tristate "A4 tech mice" if EXPERT
66 depends on USB_HID 66 depends on USB_HID
67 default !EMBEDDED 67 default !EXPERT
68 ---help--- 68 ---help---
69 Support for A4 tech X5 and WOP-35 / Trust 450L mice. 69 Support for A4 tech X5 and WOP-35 / Trust 450L mice.
70 70
@@ -77,9 +77,9 @@ config HID_ACRUX_FF
77 game controllers. 77 game controllers.
78 78
79config HID_APPLE 79config HID_APPLE
80 tristate "Apple {i,Power,Mac}Books" if EMBEDDED 80 tristate "Apple {i,Power,Mac}Books" if EXPERT
81 depends on (USB_HID || BT_HIDP) 81 depends on (USB_HID || BT_HIDP)
82 default !EMBEDDED 82 default !EXPERT
83 ---help--- 83 ---help---
84 Support for some Apple devices which less or more break 84 Support for some Apple devices which less or more break
85 HID specification. 85 HID specification.
@@ -88,9 +88,9 @@ config HID_APPLE
88 MacBooks, MacBook Pros and Apple Aluminum. 88 MacBooks, MacBook Pros and Apple Aluminum.
89 89
90config HID_BELKIN 90config HID_BELKIN
91 tristate "Belkin Flip KVM and Wireless keyboard" if EMBEDDED 91 tristate "Belkin Flip KVM and Wireless keyboard" if EXPERT
92 depends on USB_HID 92 depends on USB_HID
93 default !EMBEDDED 93 default !EXPERT
94 ---help--- 94 ---help---
95 Support for Belkin Flip KVM and Wireless keyboard. 95 Support for Belkin Flip KVM and Wireless keyboard.
96 96
@@ -101,16 +101,16 @@ config HID_CANDO
101 Support for Cando dual touch panel. 101 Support for Cando dual touch panel.
102 102
103config HID_CHERRY 103config HID_CHERRY
104 tristate "Cherry Cymotion keyboard" if EMBEDDED 104 tristate "Cherry Cymotion keyboard" if EXPERT
105 depends on USB_HID 105 depends on USB_HID
106 default !EMBEDDED 106 default !EXPERT
107 ---help--- 107 ---help---
108 Support for Cherry Cymotion keyboard. 108 Support for Cherry Cymotion keyboard.
109 109
110config HID_CHICONY 110config HID_CHICONY
111 tristate "Chicony Tactical pad" if EMBEDDED 111 tristate "Chicony Tactical pad" if EXPERT
112 depends on USB_HID 112 depends on USB_HID
113 default !EMBEDDED 113 default !EXPERT
114 ---help--- 114 ---help---
115 Support for Chicony Tactical pad. 115 Support for Chicony Tactical pad.
116 116
@@ -130,9 +130,9 @@ config HID_PRODIKEYS
130 and some additional multimedia keys. 130 and some additional multimedia keys.
131 131
132config HID_CYPRESS 132config HID_CYPRESS
133 tristate "Cypress mouse and barcode readers" if EMBEDDED 133 tristate "Cypress mouse and barcode readers" if EXPERT
134 depends on USB_HID 134 depends on USB_HID
135 default !EMBEDDED 135 default !EXPERT
136 ---help--- 136 ---help---
137 Support for cypress mouse and barcode readers. 137 Support for cypress mouse and barcode readers.
138 138
@@ -174,16 +174,16 @@ config HID_ELECOM
174 Support for the ELECOM BM084 (bluetooth mouse). 174 Support for the ELECOM BM084 (bluetooth mouse).
175 175
176config HID_EZKEY 176config HID_EZKEY
177 tristate "Ezkey BTC 8193 keyboard" if EMBEDDED 177 tristate "Ezkey BTC 8193 keyboard" if EXPERT
178 depends on USB_HID 178 depends on USB_HID
179 default !EMBEDDED 179 default !EXPERT
180 ---help--- 180 ---help---
181 Support for Ezkey BTC 8193 keyboard. 181 Support for Ezkey BTC 8193 keyboard.
182 182
183config HID_KYE 183config HID_KYE
184 tristate "Kye/Genius Ergo Mouse" if EMBEDDED 184 tristate "Kye/Genius Ergo Mouse" if EXPERT
185 depends on USB_HID 185 depends on USB_HID
186 default !EMBEDDED 186 default !EXPERT
187 ---help--- 187 ---help---
188 Support for Kye/Genius Ergo Mouse. 188 Support for Kye/Genius Ergo Mouse.
189 189
@@ -212,16 +212,16 @@ config HID_TWINHAN
212 Support for Twinhan IR remote control. 212 Support for Twinhan IR remote control.
213 213
214config HID_KENSINGTON 214config HID_KENSINGTON
215 tristate "Kensington Slimblade Trackball" if EMBEDDED 215 tristate "Kensington Slimblade Trackball" if EXPERT
216 depends on USB_HID 216 depends on USB_HID
217 default !EMBEDDED 217 default !EXPERT
218 ---help--- 218 ---help---
219 Support for Kensington Slimblade Trackball. 219 Support for Kensington Slimblade Trackball.
220 220
221config HID_LOGITECH 221config HID_LOGITECH
222 tristate "Logitech devices" if EMBEDDED 222 tristate "Logitech devices" if EXPERT
223 depends on USB_HID 223 depends on USB_HID
224 default !EMBEDDED 224 default !EXPERT
225 ---help--- 225 ---help---
226 Support for Logitech devices that are not fully compliant with HID standard. 226 Support for Logitech devices that are not fully compliant with HID standard.
227 227
@@ -276,9 +276,9 @@ config HID_MAGICMOUSE
276 Apple Wireless "Magic" Mouse. 276 Apple Wireless "Magic" Mouse.
277 277
278config HID_MICROSOFT 278config HID_MICROSOFT
279 tristate "Microsoft non-fully HID-compliant devices" if EMBEDDED 279 tristate "Microsoft non-fully HID-compliant devices" if EXPERT
280 depends on USB_HID 280 depends on USB_HID
281 default !EMBEDDED 281 default !EXPERT
282 ---help--- 282 ---help---
283 Support for Microsoft devices that are not fully compliant with HID standard. 283 Support for Microsoft devices that are not fully compliant with HID standard.
284 284
@@ -289,9 +289,9 @@ config HID_MOSART
289 Support for MosArt dual-touch panels. 289 Support for MosArt dual-touch panels.
290 290
291config HID_MONTEREY 291config HID_MONTEREY
292 tristate "Monterey Genius KB29E keyboard" if EMBEDDED 292 tristate "Monterey Genius KB29E keyboard" if EXPERT
293 depends on USB_HID 293 depends on USB_HID
294 default !EMBEDDED 294 default !EXPERT
295 ---help--- 295 ---help---
296 Support for Monterey Genius KB29E. 296 Support for Monterey Genius KB29E.
297 297
@@ -365,8 +365,8 @@ config HID_PICOLCD
365 - IR 365 - IR
366 366
367config HID_PICOLCD_FB 367config HID_PICOLCD_FB
368 bool "Framebuffer support" if EMBEDDED 368 bool "Framebuffer support" if EXPERT
369 default !EMBEDDED 369 default !EXPERT
370 depends on HID_PICOLCD 370 depends on HID_PICOLCD
371 depends on HID_PICOLCD=FB || FB=y 371 depends on HID_PICOLCD=FB || FB=y
372 select FB_DEFERRED_IO 372 select FB_DEFERRED_IO
@@ -379,8 +379,8 @@ config HID_PICOLCD_FB
379 frambuffer device. 379 frambuffer device.
380 380
381config HID_PICOLCD_BACKLIGHT 381config HID_PICOLCD_BACKLIGHT
382 bool "Backlight control" if EMBEDDED 382 bool "Backlight control" if EXPERT
383 default !EMBEDDED 383 default !EXPERT
384 depends on HID_PICOLCD 384 depends on HID_PICOLCD
385 depends on HID_PICOLCD=BACKLIGHT_CLASS_DEVICE || BACKLIGHT_CLASS_DEVICE=y 385 depends on HID_PICOLCD=BACKLIGHT_CLASS_DEVICE || BACKLIGHT_CLASS_DEVICE=y
386 ---help--- 386 ---help---
@@ -388,16 +388,16 @@ config HID_PICOLCD_BACKLIGHT
388 class. 388 class.
389 389
390config HID_PICOLCD_LCD 390config HID_PICOLCD_LCD
391 bool "Contrast control" if EMBEDDED 391 bool "Contrast control" if EXPERT
392 default !EMBEDDED 392 default !EXPERT
393 depends on HID_PICOLCD 393 depends on HID_PICOLCD
394 depends on HID_PICOLCD=LCD_CLASS_DEVICE || LCD_CLASS_DEVICE=y 394 depends on HID_PICOLCD=LCD_CLASS_DEVICE || LCD_CLASS_DEVICE=y
395 ---help--- 395 ---help---
396 Provide access to PicoLCD's LCD contrast via lcd class. 396 Provide access to PicoLCD's LCD contrast via lcd class.
397 397
398config HID_PICOLCD_LEDS 398config HID_PICOLCD_LEDS
399 bool "GPO via leds class" if EMBEDDED 399 bool "GPO via leds class" if EXPERT
400 default !EMBEDDED 400 default !EXPERT
401 depends on HID_PICOLCD 401 depends on HID_PICOLCD
402 depends on HID_PICOLCD=LEDS_CLASS || LEDS_CLASS=y 402 depends on HID_PICOLCD=LEDS_CLASS || LEDS_CLASS=y
403 ---help--- 403 ---help---
diff --git a/drivers/hid/usbhid/Kconfig b/drivers/hid/usbhid/Kconfig
index 4edb3bef94a6..0f20fd17cf06 100644
--- a/drivers/hid/usbhid/Kconfig
+++ b/drivers/hid/usbhid/Kconfig
@@ -45,7 +45,7 @@ config USB_HIDDEV
45 If unsure, say Y. 45 If unsure, say Y.
46 46
47menu "USB HID Boot Protocol drivers" 47menu "USB HID Boot Protocol drivers"
48 depends on USB!=n && USB_HID!=y && EMBEDDED 48 depends on USB!=n && USB_HID!=y && EXPERT
49 49
50config USB_KBD 50config USB_KBD
51 tristate "USB HIDBP Keyboard (simple Boot) support" 51 tristate "USB HIDBP Keyboard (simple Boot) support"
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig
index 98ccfeb3f5aa..9827c5e686cb 100644
--- a/drivers/ide/Kconfig
+++ b/drivers/ide/Kconfig
@@ -134,7 +134,7 @@ config BLK_DEV_IDECD
134 module will be called ide-cd. 134 module will be called ide-cd.
135 135
136config BLK_DEV_IDECD_VERBOSE_ERRORS 136config BLK_DEV_IDECD_VERBOSE_ERRORS
137 bool "Verbose error logging for IDE/ATAPI CDROM driver" if EMBEDDED 137 bool "Verbose error logging for IDE/ATAPI CDROM driver" if EXPERT
138 depends on BLK_DEV_IDECD 138 depends on BLK_DEV_IDECD
139 default y 139 default y
140 help 140 help
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 7acb32e7f817..1fa091e05690 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -263,7 +263,7 @@ static void __setup_broadcast_timer(void *arg)
263 clockevents_notify(reason, &cpu); 263 clockevents_notify(reason, &cpu);
264} 264}
265 265
266static int __cpuinit setup_broadcast_cpuhp_notify(struct notifier_block *n, 266static int setup_broadcast_cpuhp_notify(struct notifier_block *n,
267 unsigned long action, void *hcpu) 267 unsigned long action, void *hcpu)
268{ 268{
269 int hotcpu = (unsigned long)hcpu; 269 int hotcpu = (unsigned long)hcpu;
@@ -273,15 +273,11 @@ static int __cpuinit setup_broadcast_cpuhp_notify(struct notifier_block *n,
273 smp_call_function_single(hotcpu, __setup_broadcast_timer, 273 smp_call_function_single(hotcpu, __setup_broadcast_timer,
274 (void *)true, 1); 274 (void *)true, 1);
275 break; 275 break;
276 case CPU_DOWN_PREPARE:
277 smp_call_function_single(hotcpu, __setup_broadcast_timer,
278 (void *)false, 1);
279 break;
280 } 276 }
281 return NOTIFY_OK; 277 return NOTIFY_OK;
282} 278}
283 279
284static struct notifier_block __cpuinitdata setup_broadcast_notifier = { 280static struct notifier_block setup_broadcast_notifier = {
285 .notifier_call = setup_broadcast_cpuhp_notify, 281 .notifier_call = setup_broadcast_cpuhp_notify,
286}; 282};
287 283
diff --git a/drivers/infiniband/hw/mthca/Kconfig b/drivers/infiniband/hw/mthca/Kconfig
index 03efc074967e..da314c3fec23 100644
--- a/drivers/infiniband/hw/mthca/Kconfig
+++ b/drivers/infiniband/hw/mthca/Kconfig
@@ -7,7 +7,7 @@ config INFINIBAND_MTHCA
7 ("Tavor") and the MT25208 PCI Express HCA ("Arbel"). 7 ("Tavor") and the MT25208 PCI Express HCA ("Arbel").
8 8
9config INFINIBAND_MTHCA_DEBUG 9config INFINIBAND_MTHCA_DEBUG
10 bool "Verbose debugging output" if EMBEDDED 10 bool "Verbose debugging output" if EXPERT
11 depends on INFINIBAND_MTHCA 11 depends on INFINIBAND_MTHCA
12 default y 12 default y
13 ---help--- 13 ---help---
diff --git a/drivers/infiniband/ulp/ipoib/Kconfig b/drivers/infiniband/ulp/ipoib/Kconfig
index 55855eeabae7..cda8eac55fff 100644
--- a/drivers/infiniband/ulp/ipoib/Kconfig
+++ b/drivers/infiniband/ulp/ipoib/Kconfig
@@ -24,7 +24,7 @@ config INFINIBAND_IPOIB_CM
24 unless you limit mtu for these destinations to 2044. 24 unless you limit mtu for these destinations to 2044.
25 25
26config INFINIBAND_IPOIB_DEBUG 26config INFINIBAND_IPOIB_DEBUG
27 bool "IP-over-InfiniBand debugging" if EMBEDDED 27 bool "IP-over-InfiniBand debugging" if EXPERT
28 depends on INFINIBAND_IPOIB 28 depends on INFINIBAND_IPOIB
29 default y 29 default y
30 ---help--- 30 ---help---
diff --git a/drivers/input/Kconfig b/drivers/input/Kconfig
index 07c2cd43109c..1903c0f5b925 100644
--- a/drivers/input/Kconfig
+++ b/drivers/input/Kconfig
@@ -6,7 +6,7 @@ menu "Input device support"
6 depends on !S390 6 depends on !S390
7 7
8config INPUT 8config INPUT
9 tristate "Generic input layer (needed for keyboard, mouse, ...)" if EMBEDDED 9 tristate "Generic input layer (needed for keyboard, mouse, ...)" if EXPERT
10 default y 10 default y
11 help 11 help
12 Say Y here if you have any input device (mouse, keyboard, tablet, 12 Say Y here if you have any input device (mouse, keyboard, tablet,
@@ -67,7 +67,7 @@ config INPUT_SPARSEKMAP
67comment "Userland interfaces" 67comment "Userland interfaces"
68 68
69config INPUT_MOUSEDEV 69config INPUT_MOUSEDEV
70 tristate "Mouse interface" if EMBEDDED 70 tristate "Mouse interface" if EXPERT
71 default y 71 default y
72 help 72 help
73 Say Y here if you want your mouse to be accessible as char devices 73 Say Y here if you want your mouse to be accessible as char devices
@@ -150,7 +150,7 @@ config INPUT_EVBUG
150 module will be called evbug. 150 module will be called evbug.
151 151
152config INPUT_APMPOWER 152config INPUT_APMPOWER
153 tristate "Input Power Event -> APM Bridge" if EMBEDDED 153 tristate "Input Power Event -> APM Bridge" if EXPERT
154 depends on INPUT && APM_EMULATION 154 depends on INPUT && APM_EMULATION
155 help 155 help
156 Say Y here if you want suspend key events to trigger a user 156 Say Y here if you want suspend key events to trigger a user
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 7b3c0b8fa432..417507348bab 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -2,7 +2,7 @@
2# Input core configuration 2# Input core configuration
3# 3#
4menuconfig INPUT_KEYBOARD 4menuconfig INPUT_KEYBOARD
5 bool "Keyboards" if EMBEDDED || !X86 5 bool "Keyboards" if EXPERT || !X86
6 default y 6 default y
7 help 7 help
8 Say Y here, and a list of supported keyboards will be displayed. 8 Say Y here, and a list of supported keyboards will be displayed.
@@ -57,7 +57,7 @@ config KEYBOARD_ATARI
57 module will be called atakbd. 57 module will be called atakbd.
58 58
59config KEYBOARD_ATKBD 59config KEYBOARD_ATKBD
60 tristate "AT keyboard" if EMBEDDED || !X86 60 tristate "AT keyboard" if EXPERT || !X86
61 default y 61 default y
62 select SERIO 62 select SERIO
63 select SERIO_LIBPS2 63 select SERIO_LIBPS2
diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig
index bf5fd7f6a313..9c1e6ee83531 100644
--- a/drivers/input/mouse/Kconfig
+++ b/drivers/input/mouse/Kconfig
@@ -39,7 +39,7 @@ config MOUSE_PS2
39 module will be called psmouse. 39 module will be called psmouse.
40 40
41config MOUSE_PS2_ALPS 41config MOUSE_PS2_ALPS
42 bool "ALPS PS/2 mouse protocol extension" if EMBEDDED 42 bool "ALPS PS/2 mouse protocol extension" if EXPERT
43 default y 43 default y
44 depends on MOUSE_PS2 44 depends on MOUSE_PS2
45 help 45 help
@@ -49,7 +49,7 @@ config MOUSE_PS2_ALPS
49 If unsure, say Y. 49 If unsure, say Y.
50 50
51config MOUSE_PS2_LOGIPS2PP 51config MOUSE_PS2_LOGIPS2PP
52 bool "Logitech PS/2++ mouse protocol extension" if EMBEDDED 52 bool "Logitech PS/2++ mouse protocol extension" if EXPERT
53 default y 53 default y
54 depends on MOUSE_PS2 54 depends on MOUSE_PS2
55 help 55 help
@@ -59,7 +59,7 @@ config MOUSE_PS2_LOGIPS2PP
59 If unsure, say Y. 59 If unsure, say Y.
60 60
61config MOUSE_PS2_SYNAPTICS 61config MOUSE_PS2_SYNAPTICS
62 bool "Synaptics PS/2 mouse protocol extension" if EMBEDDED 62 bool "Synaptics PS/2 mouse protocol extension" if EXPERT
63 default y 63 default y
64 depends on MOUSE_PS2 64 depends on MOUSE_PS2
65 help 65 help
@@ -69,7 +69,7 @@ config MOUSE_PS2_SYNAPTICS
69 If unsure, say Y. 69 If unsure, say Y.
70 70
71config MOUSE_PS2_LIFEBOOK 71config MOUSE_PS2_LIFEBOOK
72 bool "Fujitsu Lifebook PS/2 mouse protocol extension" if EMBEDDED 72 bool "Fujitsu Lifebook PS/2 mouse protocol extension" if EXPERT
73 default y 73 default y
74 depends on MOUSE_PS2 && X86 && DMI 74 depends on MOUSE_PS2 && X86 && DMI
75 help 75 help
@@ -79,7 +79,7 @@ config MOUSE_PS2_LIFEBOOK
79 If unsure, say Y. 79 If unsure, say Y.
80 80
81config MOUSE_PS2_TRACKPOINT 81config MOUSE_PS2_TRACKPOINT
82 bool "IBM Trackpoint PS/2 mouse protocol extension" if EMBEDDED 82 bool "IBM Trackpoint PS/2 mouse protocol extension" if EXPERT
83 default y 83 default y
84 depends on MOUSE_PS2 84 depends on MOUSE_PS2
85 help 85 help
diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index 307eef77a172..55f2c2293ec6 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -2,7 +2,7 @@
2# Input core configuration 2# Input core configuration
3# 3#
4config SERIO 4config SERIO
5 tristate "Serial I/O support" if EMBEDDED || !X86 5 tristate "Serial I/O support" if EXPERT || !X86
6 default y 6 default y
7 help 7 help
8 Say Yes here if you have any input device that uses serial I/O to 8 Say Yes here if you have any input device that uses serial I/O to
@@ -19,7 +19,7 @@ config SERIO
19if SERIO 19if SERIO
20 20
21config SERIO_I8042 21config SERIO_I8042
22 tristate "i8042 PC Keyboard controller" if EMBEDDED || !X86 22 tristate "i8042 PC Keyboard controller" if EXPERT || !X86
23 default y 23 default y
24 depends on !PARISC && (!ARM || ARCH_SHARK || FOOTBRIDGE_HOST) && \ 24 depends on !PARISC && (!ARM || ARCH_SHARK || FOOTBRIDGE_HOST) && \
25 (!SUPERH || SH_CAYMAN) && !M68K && !BLACKFIN 25 (!SUPERH || SH_CAYMAN) && !M68K && !BLACKFIN
@@ -168,7 +168,7 @@ config SERIO_MACEPS2
168 module will be called maceps2. 168 module will be called maceps2.
169 169
170config SERIO_LIBPS2 170config SERIO_LIBPS2
171 tristate "PS/2 driver library" if EMBEDDED 171 tristate "PS/2 driver library" if EXPERT
172 depends on SERIO_I8042 || SERIO_I8042=n 172 depends on SERIO_I8042 || SERIO_I8042=n
173 help 173 help
174 Say Y here if you are using a driver for device connected 174 Say Y here if you are using a driver for device connected
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 0c9f4b158ff0..61834ae282e1 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -540,62 +540,62 @@ config TOUCHSCREEN_MC13783
540 540
541config TOUCHSCREEN_USB_EGALAX 541config TOUCHSCREEN_USB_EGALAX
542 default y 542 default y
543 bool "eGalax, eTurboTouch CT-410/510/700 device support" if EMBEDDED 543 bool "eGalax, eTurboTouch CT-410/510/700 device support" if EXPERT
544 depends on TOUCHSCREEN_USB_COMPOSITE 544 depends on TOUCHSCREEN_USB_COMPOSITE
545 545
546config TOUCHSCREEN_USB_PANJIT 546config TOUCHSCREEN_USB_PANJIT
547 default y 547 default y
548 bool "PanJit device support" if EMBEDDED 548 bool "PanJit device support" if EXPERT
549 depends on TOUCHSCREEN_USB_COMPOSITE 549 depends on TOUCHSCREEN_USB_COMPOSITE
550 550
551config TOUCHSCREEN_USB_3M 551config TOUCHSCREEN_USB_3M
552 default y 552 default y
553 bool "3M/Microtouch EX II series device support" if EMBEDDED 553 bool "3M/Microtouch EX II series device support" if EXPERT
554 depends on TOUCHSCREEN_USB_COMPOSITE 554 depends on TOUCHSCREEN_USB_COMPOSITE
555 555
556config TOUCHSCREEN_USB_ITM 556config TOUCHSCREEN_USB_ITM
557 default y 557 default y
558 bool "ITM device support" if EMBEDDED 558 bool "ITM device support" if EXPERT
559 depends on TOUCHSCREEN_USB_COMPOSITE 559 depends on TOUCHSCREEN_USB_COMPOSITE
560 560
561config TOUCHSCREEN_USB_ETURBO 561config TOUCHSCREEN_USB_ETURBO
562 default y 562 default y
563 bool "eTurboTouch (non-eGalax compatible) device support" if EMBEDDED 563 bool "eTurboTouch (non-eGalax compatible) device support" if EXPERT
564 depends on TOUCHSCREEN_USB_COMPOSITE 564 depends on TOUCHSCREEN_USB_COMPOSITE
565 565
566config TOUCHSCREEN_USB_GUNZE 566config TOUCHSCREEN_USB_GUNZE
567 default y 567 default y
568 bool "Gunze AHL61 device support" if EMBEDDED 568 bool "Gunze AHL61 device support" if EXPERT
569 depends on TOUCHSCREEN_USB_COMPOSITE 569 depends on TOUCHSCREEN_USB_COMPOSITE
570 570
571config TOUCHSCREEN_USB_DMC_TSC10 571config TOUCHSCREEN_USB_DMC_TSC10
572 default y 572 default y
573 bool "DMC TSC-10/25 device support" if EMBEDDED 573 bool "DMC TSC-10/25 device support" if EXPERT
574 depends on TOUCHSCREEN_USB_COMPOSITE 574 depends on TOUCHSCREEN_USB_COMPOSITE
575 575
576config TOUCHSCREEN_USB_IRTOUCH 576config TOUCHSCREEN_USB_IRTOUCH
577 default y 577 default y
578 bool "IRTOUCHSYSTEMS/UNITOP device support" if EMBEDDED 578 bool "IRTOUCHSYSTEMS/UNITOP device support" if EXPERT
579 depends on TOUCHSCREEN_USB_COMPOSITE 579 depends on TOUCHSCREEN_USB_COMPOSITE
580 580
581config TOUCHSCREEN_USB_IDEALTEK 581config TOUCHSCREEN_USB_IDEALTEK
582 default y 582 default y
583 bool "IdealTEK URTC1000 device support" if EMBEDDED 583 bool "IdealTEK URTC1000 device support" if EXPERT
584 depends on TOUCHSCREEN_USB_COMPOSITE 584 depends on TOUCHSCREEN_USB_COMPOSITE
585 585
586config TOUCHSCREEN_USB_GENERAL_TOUCH 586config TOUCHSCREEN_USB_GENERAL_TOUCH
587 default y 587 default y
588 bool "GeneralTouch Touchscreen device support" if EMBEDDED 588 bool "GeneralTouch Touchscreen device support" if EXPERT
589 depends on TOUCHSCREEN_USB_COMPOSITE 589 depends on TOUCHSCREEN_USB_COMPOSITE
590 590
591config TOUCHSCREEN_USB_GOTOP 591config TOUCHSCREEN_USB_GOTOP
592 default y 592 default y
593 bool "GoTop Super_Q2/GogoPen/PenPower tablet device support" if EMBEDDED 593 bool "GoTop Super_Q2/GogoPen/PenPower tablet device support" if EXPERT
594 depends on TOUCHSCREEN_USB_COMPOSITE 594 depends on TOUCHSCREEN_USB_COMPOSITE
595 595
596config TOUCHSCREEN_USB_JASTEC 596config TOUCHSCREEN_USB_JASTEC
597 default y 597 default y
598 bool "JASTEC/DigiTech DTR-02U USB touch controller device support" if EMBEDDED 598 bool "JASTEC/DigiTech DTR-02U USB touch controller device support" if EXPERT
599 depends on TOUCHSCREEN_USB_COMPOSITE 599 depends on TOUCHSCREEN_USB_COMPOSITE
600 600
601config TOUCHSCREEN_USB_E2I 601config TOUCHSCREEN_USB_E2I
@@ -605,17 +605,17 @@ config TOUCHSCREEN_USB_E2I
605 605
606config TOUCHSCREEN_USB_ZYTRONIC 606config TOUCHSCREEN_USB_ZYTRONIC
607 default y 607 default y
608 bool "Zytronic controller" if EMBEDDED 608 bool "Zytronic controller" if EXPERT
609 depends on TOUCHSCREEN_USB_COMPOSITE 609 depends on TOUCHSCREEN_USB_COMPOSITE
610 610
611config TOUCHSCREEN_USB_ETT_TC45USB 611config TOUCHSCREEN_USB_ETT_TC45USB
612 default y 612 default y
613 bool "ET&T USB series TC4UM/TC5UH touchscreen controller support" if EMBEDDED 613 bool "ET&T USB series TC4UM/TC5UH touchscreen controller support" if EXPERT
614 depends on TOUCHSCREEN_USB_COMPOSITE 614 depends on TOUCHSCREEN_USB_COMPOSITE
615 615
616config TOUCHSCREEN_USB_NEXIO 616config TOUCHSCREEN_USB_NEXIO
617 default y 617 default y
618 bool "NEXIO/iNexio device support" if EMBEDDED 618 bool "NEXIO/iNexio device support" if EXPERT
619 depends on TOUCHSCREEN_USB_COMPOSITE 619 depends on TOUCHSCREEN_USB_COMPOSITE
620 620
621config TOUCHSCREEN_TOUCHIT213 621config TOUCHSCREEN_TOUCHIT213
diff --git a/drivers/leds/ledtrig-gpio.c b/drivers/leds/ledtrig-gpio.c
index 991d93be0f44..ecc4bf3f37a9 100644
--- a/drivers/leds/ledtrig-gpio.c
+++ b/drivers/leds/ledtrig-gpio.c
@@ -99,7 +99,7 @@ static ssize_t gpio_trig_inverted_show(struct device *dev,
99 struct led_classdev *led = dev_get_drvdata(dev); 99 struct led_classdev *led = dev_get_drvdata(dev);
100 struct gpio_trig_data *gpio_data = led->trigger_data; 100 struct gpio_trig_data *gpio_data = led->trigger_data;
101 101
102 return sprintf(buf, "%s\n", gpio_data->inverted ? "yes" : "no"); 102 return sprintf(buf, "%u\n", gpio_data->inverted);
103} 103}
104 104
105static ssize_t gpio_trig_inverted_store(struct device *dev, 105static ssize_t gpio_trig_inverted_store(struct device *dev,
@@ -107,16 +107,17 @@ static ssize_t gpio_trig_inverted_store(struct device *dev,
107{ 107{
108 struct led_classdev *led = dev_get_drvdata(dev); 108 struct led_classdev *led = dev_get_drvdata(dev);
109 struct gpio_trig_data *gpio_data = led->trigger_data; 109 struct gpio_trig_data *gpio_data = led->trigger_data;
110 unsigned inverted; 110 unsigned long inverted;
111 int ret; 111 int ret;
112 112
113 ret = sscanf(buf, "%u", &inverted); 113 ret = strict_strtoul(buf, 10, &inverted);
114 if (ret < 1) { 114 if (ret < 0)
115 dev_err(dev, "invalid value\n"); 115 return ret;
116
117 if (inverted > 1)
116 return -EINVAL; 118 return -EINVAL;
117 }
118 119
119 gpio_data->inverted = !!inverted; 120 gpio_data->inverted = inverted;
120 121
121 /* After inverting, we need to update the LED. */ 122 /* After inverting, we need to update the LED. */
122 schedule_work(&gpio_data->work); 123 schedule_work(&gpio_data->work);
diff --git a/drivers/lguest/page_tables.c b/drivers/lguest/page_tables.c
index 04b22128a474..d21578ee95de 100644
--- a/drivers/lguest/page_tables.c
+++ b/drivers/lguest/page_tables.c
@@ -1137,7 +1137,7 @@ void free_guest_pagetable(struct lguest *lg)
1137 */ 1137 */
1138void map_switcher_in_guest(struct lg_cpu *cpu, struct lguest_pages *pages) 1138void map_switcher_in_guest(struct lg_cpu *cpu, struct lguest_pages *pages)
1139{ 1139{
1140 pte_t *switcher_pte_page = __get_cpu_var(switcher_pte_pages); 1140 pte_t *switcher_pte_page = __this_cpu_read(switcher_pte_pages);
1141 pte_t regs_pte; 1141 pte_t regs_pte;
1142 1142
1143#ifdef CONFIG_X86_PAE 1143#ifdef CONFIG_X86_PAE
diff --git a/drivers/lguest/x86/core.c b/drivers/lguest/x86/core.c
index b4eb675a807e..9f1659c3d1f3 100644
--- a/drivers/lguest/x86/core.c
+++ b/drivers/lguest/x86/core.c
@@ -90,8 +90,8 @@ static void copy_in_guest_info(struct lg_cpu *cpu, struct lguest_pages *pages)
90 * meanwhile). If that's not the case, we pretend everything in the 90 * meanwhile). If that's not the case, we pretend everything in the
91 * Guest has changed. 91 * Guest has changed.
92 */ 92 */
93 if (__get_cpu_var(lg_last_cpu) != cpu || cpu->last_pages != pages) { 93 if (__this_cpu_read(lg_last_cpu) != cpu || cpu->last_pages != pages) {
94 __get_cpu_var(lg_last_cpu) = cpu; 94 __this_cpu_write(lg_last_cpu, cpu);
95 cpu->last_pages = pages; 95 cpu->last_pages = pages;
96 cpu->changed = CHANGED_ALL; 96 cpu->changed = CHANGED_ALL;
97 } 97 }
diff --git a/drivers/macintosh/therm_pm72.c b/drivers/macintosh/therm_pm72.c
index 2e041fd0a00c..f3a29f264db9 100644
--- a/drivers/macintosh/therm_pm72.c
+++ b/drivers/macintosh/therm_pm72.c
@@ -443,7 +443,7 @@ static int fan_read_reg(int reg, unsigned char *buf, int nb)
443 tries = 0; 443 tries = 0;
444 for (;;) { 444 for (;;) {
445 nr = i2c_master_recv(fcu, buf, nb); 445 nr = i2c_master_recv(fcu, buf, nb);
446 if (nr > 0 || (nr < 0 && nr != ENODEV) || tries >= 100) 446 if (nr > 0 || (nr < 0 && nr != -ENODEV) || tries >= 100)
447 break; 447 break;
448 msleep(10); 448 msleep(10);
449 ++tries; 449 ++tries;
@@ -464,7 +464,7 @@ static int fan_write_reg(int reg, const unsigned char *ptr, int nb)
464 tries = 0; 464 tries = 0;
465 for (;;) { 465 for (;;) {
466 nw = i2c_master_send(fcu, buf, nb); 466 nw = i2c_master_send(fcu, buf, nb);
467 if (nw > 0 || (nw < 0 && nw != EIO) || tries >= 100) 467 if (nw > 0 || (nw < 0 && nw != -EIO) || tries >= 100)
468 break; 468 break;
469 msleep(10); 469 msleep(10);
470 ++tries; 470 ++tries;
diff --git a/drivers/media/common/saa7146_core.c b/drivers/media/common/saa7146_core.c
index 982f000a57ff..9f47e383c57a 100644
--- a/drivers/media/common/saa7146_core.c
+++ b/drivers/media/common/saa7146_core.c
@@ -452,7 +452,7 @@ static int saa7146_init_one(struct pci_dev *pci, const struct pci_device_id *ent
452 INFO(("found saa7146 @ mem %p (revision %d, irq %d) (0x%04x,0x%04x).\n", dev->mem, dev->revision, pci->irq, pci->subsystem_vendor, pci->subsystem_device)); 452 INFO(("found saa7146 @ mem %p (revision %d, irq %d) (0x%04x,0x%04x).\n", dev->mem, dev->revision, pci->irq, pci->subsystem_vendor, pci->subsystem_device));
453 dev->ext = ext; 453 dev->ext = ext;
454 454
455 mutex_init(&dev->lock); 455 mutex_init(&dev->v4l2_lock);
456 spin_lock_init(&dev->int_slock); 456 spin_lock_init(&dev->int_slock);
457 spin_lock_init(&dev->slock); 457 spin_lock_init(&dev->slock);
458 458
diff --git a/drivers/media/common/saa7146_fops.c b/drivers/media/common/saa7146_fops.c
index e3fedc60fe77..1bd3dd762c6b 100644
--- a/drivers/media/common/saa7146_fops.c
+++ b/drivers/media/common/saa7146_fops.c
@@ -15,18 +15,15 @@ int saa7146_res_get(struct saa7146_fh *fh, unsigned int bit)
15 } 15 }
16 16
17 /* is it free? */ 17 /* is it free? */
18 mutex_lock(&dev->lock);
19 if (vv->resources & bit) { 18 if (vv->resources & bit) {
20 DEB_D(("locked! vv->resources:0x%02x, we want:0x%02x\n",vv->resources,bit)); 19 DEB_D(("locked! vv->resources:0x%02x, we want:0x%02x\n",vv->resources,bit));
21 /* no, someone else uses it */ 20 /* no, someone else uses it */
22 mutex_unlock(&dev->lock);
23 return 0; 21 return 0;
24 } 22 }
25 /* it's free, grab it */ 23 /* it's free, grab it */
26 fh->resources |= bit; 24 fh->resources |= bit;
27 vv->resources |= bit; 25 vv->resources |= bit;
28 DEB_D(("res: get 0x%02x, cur:0x%02x\n",bit,vv->resources)); 26 DEB_D(("res: get 0x%02x, cur:0x%02x\n",bit,vv->resources));
29 mutex_unlock(&dev->lock);
30 return 1; 27 return 1;
31} 28}
32 29
@@ -37,11 +34,9 @@ void saa7146_res_free(struct saa7146_fh *fh, unsigned int bits)
37 34
38 BUG_ON((fh->resources & bits) != bits); 35 BUG_ON((fh->resources & bits) != bits);
39 36
40 mutex_lock(&dev->lock);
41 fh->resources &= ~bits; 37 fh->resources &= ~bits;
42 vv->resources &= ~bits; 38 vv->resources &= ~bits;
43 DEB_D(("res: put 0x%02x, cur:0x%02x\n",bits,vv->resources)); 39 DEB_D(("res: put 0x%02x, cur:0x%02x\n",bits,vv->resources));
44 mutex_unlock(&dev->lock);
45} 40}
46 41
47 42
@@ -396,7 +391,7 @@ static const struct v4l2_file_operations video_fops =
396 .write = fops_write, 391 .write = fops_write,
397 .poll = fops_poll, 392 .poll = fops_poll,
398 .mmap = fops_mmap, 393 .mmap = fops_mmap,
399 .ioctl = video_ioctl2, 394 .unlocked_ioctl = video_ioctl2,
400}; 395};
401 396
402static void vv_callback(struct saa7146_dev *dev, unsigned long status) 397static void vv_callback(struct saa7146_dev *dev, unsigned long status)
@@ -505,6 +500,7 @@ int saa7146_register_device(struct video_device **vid, struct saa7146_dev* dev,
505 vfd->fops = &video_fops; 500 vfd->fops = &video_fops;
506 vfd->ioctl_ops = &dev->ext_vv_data->ops; 501 vfd->ioctl_ops = &dev->ext_vv_data->ops;
507 vfd->release = video_device_release; 502 vfd->release = video_device_release;
503 vfd->lock = &dev->v4l2_lock;
508 vfd->tvnorms = 0; 504 vfd->tvnorms = 0;
509 for (i = 0; i < dev->ext_vv_data->num_stds; i++) 505 for (i = 0; i < dev->ext_vv_data->num_stds; i++)
510 vfd->tvnorms |= dev->ext_vv_data->stds[i].id; 506 vfd->tvnorms |= dev->ext_vv_data->stds[i].id;
diff --git a/drivers/media/common/saa7146_vbi.c b/drivers/media/common/saa7146_vbi.c
index 2d4533ab22b7..afe85801d6ca 100644
--- a/drivers/media/common/saa7146_vbi.c
+++ b/drivers/media/common/saa7146_vbi.c
@@ -412,7 +412,7 @@ static int vbi_open(struct saa7146_dev *dev, struct file *file)
412 V4L2_BUF_TYPE_VBI_CAPTURE, 412 V4L2_BUF_TYPE_VBI_CAPTURE,
413 V4L2_FIELD_SEQ_TB, // FIXME: does this really work? 413 V4L2_FIELD_SEQ_TB, // FIXME: does this really work?
414 sizeof(struct saa7146_buf), 414 sizeof(struct saa7146_buf),
415 file, NULL); 415 file, &dev->v4l2_lock);
416 416
417 init_timer(&fh->vbi_read_timeout); 417 init_timer(&fh->vbi_read_timeout);
418 fh->vbi_read_timeout.function = vbi_read_timeout; 418 fh->vbi_read_timeout.function = vbi_read_timeout;
diff --git a/drivers/media/common/saa7146_video.c b/drivers/media/common/saa7146_video.c
index 0ac5c619aecf..9aafa4e969a8 100644
--- a/drivers/media/common/saa7146_video.c
+++ b/drivers/media/common/saa7146_video.c
@@ -553,8 +553,6 @@ static int vidioc_s_fbuf(struct file *file, void *fh, struct v4l2_framebuffer *f
553 } 553 }
554 } 554 }
555 555
556 mutex_lock(&dev->lock);
557
558 /* ok, accept it */ 556 /* ok, accept it */
559 vv->ov_fb = *fb; 557 vv->ov_fb = *fb;
560 vv->ov_fmt = fmt; 558 vv->ov_fmt = fmt;
@@ -563,8 +561,6 @@ static int vidioc_s_fbuf(struct file *file, void *fh, struct v4l2_framebuffer *f
563 vv->ov_fb.fmt.bytesperline = vv->ov_fb.fmt.width * fmt->depth / 8; 561 vv->ov_fb.fmt.bytesperline = vv->ov_fb.fmt.width * fmt->depth / 8;
564 DEB_D(("setting bytesperline to %d\n", vv->ov_fb.fmt.bytesperline)); 562 DEB_D(("setting bytesperline to %d\n", vv->ov_fb.fmt.bytesperline));
565 } 563 }
566
567 mutex_unlock(&dev->lock);
568 return 0; 564 return 0;
569} 565}
570 566
@@ -649,8 +645,6 @@ static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *c)
649 return -EINVAL; 645 return -EINVAL;
650 } 646 }
651 647
652 mutex_lock(&dev->lock);
653
654 switch (ctrl->type) { 648 switch (ctrl->type) {
655 case V4L2_CTRL_TYPE_BOOLEAN: 649 case V4L2_CTRL_TYPE_BOOLEAN:
656 case V4L2_CTRL_TYPE_MENU: 650 case V4L2_CTRL_TYPE_MENU:
@@ -693,7 +687,6 @@ static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *c)
693 /* fixme: we can support changing VFLIP and HFLIP here... */ 687 /* fixme: we can support changing VFLIP and HFLIP here... */
694 if (IS_CAPTURE_ACTIVE(fh) != 0) { 688 if (IS_CAPTURE_ACTIVE(fh) != 0) {
695 DEB_D(("V4L2_CID_HFLIP while active capture.\n")); 689 DEB_D(("V4L2_CID_HFLIP while active capture.\n"));
696 mutex_unlock(&dev->lock);
697 return -EBUSY; 690 return -EBUSY;
698 } 691 }
699 vv->hflip = c->value; 692 vv->hflip = c->value;
@@ -701,16 +694,13 @@ static int vidioc_s_ctrl(struct file *file, void *fh, struct v4l2_control *c)
701 case V4L2_CID_VFLIP: 694 case V4L2_CID_VFLIP:
702 if (IS_CAPTURE_ACTIVE(fh) != 0) { 695 if (IS_CAPTURE_ACTIVE(fh) != 0) {
703 DEB_D(("V4L2_CID_VFLIP while active capture.\n")); 696 DEB_D(("V4L2_CID_VFLIP while active capture.\n"));
704 mutex_unlock(&dev->lock);
705 return -EBUSY; 697 return -EBUSY;
706 } 698 }
707 vv->vflip = c->value; 699 vv->vflip = c->value;
708 break; 700 break;
709 default: 701 default:
710 mutex_unlock(&dev->lock);
711 return -EINVAL; 702 return -EINVAL;
712 } 703 }
713 mutex_unlock(&dev->lock);
714 704
715 if (IS_OVERLAY_ACTIVE(fh) != 0) { 705 if (IS_OVERLAY_ACTIVE(fh) != 0) {
716 saa7146_stop_preview(fh); 706 saa7146_stop_preview(fh);
@@ -902,22 +892,18 @@ static int vidioc_s_fmt_vid_overlay(struct file *file, void *__fh, struct v4l2_f
902 err = vidioc_try_fmt_vid_overlay(file, fh, f); 892 err = vidioc_try_fmt_vid_overlay(file, fh, f);
903 if (0 != err) 893 if (0 != err)
904 return err; 894 return err;
905 mutex_lock(&dev->lock);
906 fh->ov.win = f->fmt.win; 895 fh->ov.win = f->fmt.win;
907 fh->ov.nclips = f->fmt.win.clipcount; 896 fh->ov.nclips = f->fmt.win.clipcount;
908 if (fh->ov.nclips > 16) 897 if (fh->ov.nclips > 16)
909 fh->ov.nclips = 16; 898 fh->ov.nclips = 16;
910 if (copy_from_user(fh->ov.clips, f->fmt.win.clips, 899 if (copy_from_user(fh->ov.clips, f->fmt.win.clips,
911 sizeof(struct v4l2_clip) * fh->ov.nclips)) { 900 sizeof(struct v4l2_clip) * fh->ov.nclips)) {
912 mutex_unlock(&dev->lock);
913 return -EFAULT; 901 return -EFAULT;
914 } 902 }
915 903
916 /* fh->ov.fh is used to indicate that we have valid overlay informations, too */ 904 /* fh->ov.fh is used to indicate that we have valid overlay informations, too */
917 fh->ov.fh = fh; 905 fh->ov.fh = fh;
918 906
919 mutex_unlock(&dev->lock);
920
921 /* check if our current overlay is active */ 907 /* check if our current overlay is active */
922 if (IS_OVERLAY_ACTIVE(fh) != 0) { 908 if (IS_OVERLAY_ACTIVE(fh) != 0) {
923 saa7146_stop_preview(fh); 909 saa7146_stop_preview(fh);
@@ -976,8 +962,6 @@ static int vidioc_s_std(struct file *file, void *fh, v4l2_std_id *id)
976 } 962 }
977 } 963 }
978 964
979 mutex_lock(&dev->lock);
980
981 for (i = 0; i < dev->ext_vv_data->num_stds; i++) 965 for (i = 0; i < dev->ext_vv_data->num_stds; i++)
982 if (*id & dev->ext_vv_data->stds[i].id) 966 if (*id & dev->ext_vv_data->stds[i].id)
983 break; 967 break;
@@ -988,8 +972,6 @@ static int vidioc_s_std(struct file *file, void *fh, v4l2_std_id *id)
988 found = 1; 972 found = 1;
989 } 973 }
990 974
991 mutex_unlock(&dev->lock);
992
993 if (vv->ov_suspend != NULL) { 975 if (vv->ov_suspend != NULL) {
994 saa7146_start_preview(vv->ov_suspend); 976 saa7146_start_preview(vv->ov_suspend);
995 vv->ov_suspend = NULL; 977 vv->ov_suspend = NULL;
@@ -1354,7 +1336,7 @@ static int video_open(struct saa7146_dev *dev, struct file *file)
1354 V4L2_BUF_TYPE_VIDEO_CAPTURE, 1336 V4L2_BUF_TYPE_VIDEO_CAPTURE,
1355 V4L2_FIELD_INTERLACED, 1337 V4L2_FIELD_INTERLACED,
1356 sizeof(struct saa7146_buf), 1338 sizeof(struct saa7146_buf),
1357 file, NULL); 1339 file, &dev->v4l2_lock);
1358 1340
1359 return 0; 1341 return 0;
1360} 1342}
diff --git a/drivers/media/common/tuners/Kconfig b/drivers/media/common/tuners/Kconfig
index 78b089526e02..6fc79f15dcbc 100644
--- a/drivers/media/common/tuners/Kconfig
+++ b/drivers/media/common/tuners/Kconfig
@@ -34,7 +34,7 @@ config MEDIA_TUNER
34config MEDIA_TUNER_CUSTOMISE 34config MEDIA_TUNER_CUSTOMISE
35 bool "Customize analog and hybrid tuner modules to build" 35 bool "Customize analog and hybrid tuner modules to build"
36 depends on MEDIA_TUNER 36 depends on MEDIA_TUNER
37 default y if EMBEDDED 37 default y if EXPERT
38 help 38 help
39 This allows the user to deselect tuner drivers unnecessary 39 This allows the user to deselect tuner drivers unnecessary
40 for their hardware from the build. Use this option with care 40 for their hardware from the build. Use this option with care
diff --git a/drivers/media/common/tuners/tda8290.c b/drivers/media/common/tuners/tda8290.c
index c9062ceddc71..bc6a67768af1 100644
--- a/drivers/media/common/tuners/tda8290.c
+++ b/drivers/media/common/tuners/tda8290.c
@@ -95,8 +95,7 @@ static int tda8295_i2c_bridge(struct dvb_frontend *fe, int close)
95 msleep(20); 95 msleep(20);
96 } else { 96 } else {
97 msg = disable; 97 msg = disable;
98 tuner_i2c_xfer_send(&priv->i2c_props, msg, 1); 98 tuner_i2c_xfer_send_recv(&priv->i2c_props, msg, 1, &msg[1], 1);
99 tuner_i2c_xfer_recv(&priv->i2c_props, &msg[1], 1);
100 99
101 buf[2] = msg[1]; 100 buf[2] = msg[1];
102 buf[2] &= ~0x04; 101 buf[2] &= ~0x04;
@@ -233,19 +232,22 @@ static void tda8290_set_params(struct dvb_frontend *fe,
233 tuner_i2c_xfer_send(&priv->i2c_props, pll_bw_nom, 2); 232 tuner_i2c_xfer_send(&priv->i2c_props, pll_bw_nom, 2);
234 } 233 }
235 234
235
236 tda8290_i2c_bridge(fe, 1); 236 tda8290_i2c_bridge(fe, 1);
237 237
238 if (fe->ops.tuner_ops.set_analog_params) 238 if (fe->ops.tuner_ops.set_analog_params)
239 fe->ops.tuner_ops.set_analog_params(fe, params); 239 fe->ops.tuner_ops.set_analog_params(fe, params);
240 240
241 for (i = 0; i < 3; i++) { 241 for (i = 0; i < 3; i++) {
242 tuner_i2c_xfer_send(&priv->i2c_props, &addr_pll_stat, 1); 242 tuner_i2c_xfer_send_recv(&priv->i2c_props,
243 tuner_i2c_xfer_recv(&priv->i2c_props, &pll_stat, 1); 243 &addr_pll_stat, 1, &pll_stat, 1);
244 if (pll_stat & 0x80) { 244 if (pll_stat & 0x80) {
245 tuner_i2c_xfer_send(&priv->i2c_props, &addr_adc_sat, 1); 245 tuner_i2c_xfer_send_recv(&priv->i2c_props,
246 tuner_i2c_xfer_recv(&priv->i2c_props, &adc_sat, 1); 246 &addr_adc_sat, 1,
247 tuner_i2c_xfer_send(&priv->i2c_props, &addr_agc_stat, 1); 247 &adc_sat, 1);
248 tuner_i2c_xfer_recv(&priv->i2c_props, &agc_stat, 1); 248 tuner_i2c_xfer_send_recv(&priv->i2c_props,
249 &addr_agc_stat, 1,
250 &agc_stat, 1);
249 tuner_dbg("tda8290 is locked, AGC: %d\n", agc_stat); 251 tuner_dbg("tda8290 is locked, AGC: %d\n", agc_stat);
250 break; 252 break;
251 } else { 253 } else {
@@ -259,20 +261,22 @@ static void tda8290_set_params(struct dvb_frontend *fe,
259 agc_stat, adc_sat, pll_stat & 0x80); 261 agc_stat, adc_sat, pll_stat & 0x80);
260 tuner_i2c_xfer_send(&priv->i2c_props, gainset_2, 2); 262 tuner_i2c_xfer_send(&priv->i2c_props, gainset_2, 2);
261 msleep(100); 263 msleep(100);
262 tuner_i2c_xfer_send(&priv->i2c_props, &addr_agc_stat, 1); 264 tuner_i2c_xfer_send_recv(&priv->i2c_props,
263 tuner_i2c_xfer_recv(&priv->i2c_props, &agc_stat, 1); 265 &addr_agc_stat, 1, &agc_stat, 1);
264 tuner_i2c_xfer_send(&priv->i2c_props, &addr_pll_stat, 1); 266 tuner_i2c_xfer_send_recv(&priv->i2c_props,
265 tuner_i2c_xfer_recv(&priv->i2c_props, &pll_stat, 1); 267 &addr_pll_stat, 1, &pll_stat, 1);
266 if ((agc_stat > 115) || !(pll_stat & 0x80)) { 268 if ((agc_stat > 115) || !(pll_stat & 0x80)) {
267 tuner_dbg("adjust gain, step 2. Agc: %d, lock: %d\n", 269 tuner_dbg("adjust gain, step 2. Agc: %d, lock: %d\n",
268 agc_stat, pll_stat & 0x80); 270 agc_stat, pll_stat & 0x80);
269 if (priv->cfg.agcf) 271 if (priv->cfg.agcf)
270 priv->cfg.agcf(fe); 272 priv->cfg.agcf(fe);
271 msleep(100); 273 msleep(100);
272 tuner_i2c_xfer_send(&priv->i2c_props, &addr_agc_stat, 1); 274 tuner_i2c_xfer_send_recv(&priv->i2c_props,
273 tuner_i2c_xfer_recv(&priv->i2c_props, &agc_stat, 1); 275 &addr_agc_stat, 1,
274 tuner_i2c_xfer_send(&priv->i2c_props, &addr_pll_stat, 1); 276 &agc_stat, 1);
275 tuner_i2c_xfer_recv(&priv->i2c_props, &pll_stat, 1); 277 tuner_i2c_xfer_send_recv(&priv->i2c_props,
278 &addr_pll_stat, 1,
279 &pll_stat, 1);
276 if((agc_stat > 115) || !(pll_stat & 0x80)) { 280 if((agc_stat > 115) || !(pll_stat & 0x80)) {
277 tuner_dbg("adjust gain, step 3. Agc: %d\n", agc_stat); 281 tuner_dbg("adjust gain, step 3. Agc: %d\n", agc_stat);
278 tuner_i2c_xfer_send(&priv->i2c_props, adc_head_12, 2); 282 tuner_i2c_xfer_send(&priv->i2c_props, adc_head_12, 2);
@@ -284,10 +288,12 @@ static void tda8290_set_params(struct dvb_frontend *fe,
284 288
285 /* l/ l' deadlock? */ 289 /* l/ l' deadlock? */
286 if(priv->tda8290_easy_mode & 0x60) { 290 if(priv->tda8290_easy_mode & 0x60) {
287 tuner_i2c_xfer_send(&priv->i2c_props, &addr_adc_sat, 1); 291 tuner_i2c_xfer_send_recv(&priv->i2c_props,
288 tuner_i2c_xfer_recv(&priv->i2c_props, &adc_sat, 1); 292 &addr_adc_sat, 1,
289 tuner_i2c_xfer_send(&priv->i2c_props, &addr_pll_stat, 1); 293 &adc_sat, 1);
290 tuner_i2c_xfer_recv(&priv->i2c_props, &pll_stat, 1); 294 tuner_i2c_xfer_send_recv(&priv->i2c_props,
295 &addr_pll_stat, 1,
296 &pll_stat, 1);
291 if ((adc_sat > 20) || !(pll_stat & 0x80)) { 297 if ((adc_sat > 20) || !(pll_stat & 0x80)) {
292 tuner_dbg("trying to resolve SECAM L deadlock\n"); 298 tuner_dbg("trying to resolve SECAM L deadlock\n");
293 tuner_i2c_xfer_send(&priv->i2c_props, agc_rst_on, 2); 299 tuner_i2c_xfer_send(&priv->i2c_props, agc_rst_on, 2);
@@ -307,8 +313,7 @@ static void tda8295_power(struct dvb_frontend *fe, int enable)
307 struct tda8290_priv *priv = fe->analog_demod_priv; 313 struct tda8290_priv *priv = fe->analog_demod_priv;
308 unsigned char buf[] = { 0x30, 0x00 }; /* clb_stdbt */ 314 unsigned char buf[] = { 0x30, 0x00 }; /* clb_stdbt */
309 315
310 tuner_i2c_xfer_send(&priv->i2c_props, &buf[0], 1); 316 tuner_i2c_xfer_send_recv(&priv->i2c_props, &buf[0], 1, &buf[1], 1);
311 tuner_i2c_xfer_recv(&priv->i2c_props, &buf[1], 1);
312 317
313 if (enable) 318 if (enable)
314 buf[1] = 0x01; 319 buf[1] = 0x01;
@@ -323,8 +328,7 @@ static void tda8295_set_easy_mode(struct dvb_frontend *fe, int enable)
323 struct tda8290_priv *priv = fe->analog_demod_priv; 328 struct tda8290_priv *priv = fe->analog_demod_priv;
324 unsigned char buf[] = { 0x01, 0x00 }; 329 unsigned char buf[] = { 0x01, 0x00 };
325 330
326 tuner_i2c_xfer_send(&priv->i2c_props, &buf[0], 1); 331 tuner_i2c_xfer_send_recv(&priv->i2c_props, &buf[0], 1, &buf[1], 1);
327 tuner_i2c_xfer_recv(&priv->i2c_props, &buf[1], 1);
328 332
329 if (enable) 333 if (enable)
330 buf[1] = 0x01; /* rising edge sets regs 0x02 - 0x23 */ 334 buf[1] = 0x01; /* rising edge sets regs 0x02 - 0x23 */
@@ -353,8 +357,7 @@ static void tda8295_agc1_out(struct dvb_frontend *fe, int enable)
353 struct tda8290_priv *priv = fe->analog_demod_priv; 357 struct tda8290_priv *priv = fe->analog_demod_priv;
354 unsigned char buf[] = { 0x02, 0x00 }; /* DIV_FUNC */ 358 unsigned char buf[] = { 0x02, 0x00 }; /* DIV_FUNC */
355 359
356 tuner_i2c_xfer_send(&priv->i2c_props, &buf[0], 1); 360 tuner_i2c_xfer_send_recv(&priv->i2c_props, &buf[0], 1, &buf[1], 1);
357 tuner_i2c_xfer_recv(&priv->i2c_props, &buf[1], 1);
358 361
359 if (enable) 362 if (enable)
360 buf[1] &= ~0x40; 363 buf[1] &= ~0x40;
@@ -370,10 +373,10 @@ static void tda8295_agc2_out(struct dvb_frontend *fe, int enable)
370 unsigned char set_gpio_cf[] = { 0x44, 0x00 }; 373 unsigned char set_gpio_cf[] = { 0x44, 0x00 };
371 unsigned char set_gpio_val[] = { 0x46, 0x00 }; 374 unsigned char set_gpio_val[] = { 0x46, 0x00 };
372 375
373 tuner_i2c_xfer_send(&priv->i2c_props, &set_gpio_cf[0], 1); 376 tuner_i2c_xfer_send_recv(&priv->i2c_props,
374 tuner_i2c_xfer_recv(&priv->i2c_props, &set_gpio_cf[1], 1); 377 &set_gpio_cf[0], 1, &set_gpio_cf[1], 1);
375 tuner_i2c_xfer_send(&priv->i2c_props, &set_gpio_val[0], 1); 378 tuner_i2c_xfer_send_recv(&priv->i2c_props,
376 tuner_i2c_xfer_recv(&priv->i2c_props, &set_gpio_val[1], 1); 379 &set_gpio_val[0], 1, &set_gpio_val[1], 1);
377 380
378 set_gpio_cf[1] &= 0xf0; /* clear GPIO_0 bits 3-0 */ 381 set_gpio_cf[1] &= 0xf0; /* clear GPIO_0 bits 3-0 */
379 382
@@ -392,8 +395,7 @@ static int tda8295_has_signal(struct dvb_frontend *fe)
392 unsigned char hvpll_stat = 0x26; 395 unsigned char hvpll_stat = 0x26;
393 unsigned char ret; 396 unsigned char ret;
394 397
395 tuner_i2c_xfer_send(&priv->i2c_props, &hvpll_stat, 1); 398 tuner_i2c_xfer_send_recv(&priv->i2c_props, &hvpll_stat, 1, &ret, 1);
396 tuner_i2c_xfer_recv(&priv->i2c_props, &ret, 1);
397 return (ret & 0x01) ? 65535 : 0; 399 return (ret & 0x01) ? 65535 : 0;
398} 400}
399 401
@@ -413,8 +415,8 @@ static void tda8295_set_params(struct dvb_frontend *fe,
413 tda8295_power(fe, 1); 415 tda8295_power(fe, 1);
414 tda8295_agc1_out(fe, 1); 416 tda8295_agc1_out(fe, 1);
415 417
416 tuner_i2c_xfer_send(&priv->i2c_props, &blanking_mode[0], 1); 418 tuner_i2c_xfer_send_recv(&priv->i2c_props,
417 tuner_i2c_xfer_recv(&priv->i2c_props, &blanking_mode[1], 1); 419 &blanking_mode[0], 1, &blanking_mode[1], 1);
418 420
419 tda8295_set_video_std(fe); 421 tda8295_set_video_std(fe);
420 422
@@ -447,8 +449,8 @@ static int tda8290_has_signal(struct dvb_frontend *fe)
447 unsigned char i2c_get_afc[1] = { 0x1B }; 449 unsigned char i2c_get_afc[1] = { 0x1B };
448 unsigned char afc = 0; 450 unsigned char afc = 0;
449 451
450 tuner_i2c_xfer_send(&priv->i2c_props, i2c_get_afc, ARRAY_SIZE(i2c_get_afc)); 452 tuner_i2c_xfer_send_recv(&priv->i2c_props,
451 tuner_i2c_xfer_recv(&priv->i2c_props, &afc, 1); 453 i2c_get_afc, ARRAY_SIZE(i2c_get_afc), &afc, 1);
452 return (afc & 0x80)? 65535:0; 454 return (afc & 0x80)? 65535:0;
453} 455}
454 456
@@ -654,20 +656,26 @@ static int tda829x_find_tuner(struct dvb_frontend *fe)
654static int tda8290_probe(struct tuner_i2c_props *i2c_props) 656static int tda8290_probe(struct tuner_i2c_props *i2c_props)
655{ 657{
656#define TDA8290_ID 0x89 658#define TDA8290_ID 0x89
657 unsigned char tda8290_id[] = { 0x1f, 0x00 }; 659 u8 reg = 0x1f, id;
660 struct i2c_msg msg_read[] = {
661 { .addr = 0x4b, .flags = 0, .len = 1, .buf = &reg },
662 { .addr = 0x4b, .flags = I2C_M_RD, .len = 1, .buf = &id },
663 };
658 664
659 /* detect tda8290 */ 665 /* detect tda8290 */
660 tuner_i2c_xfer_send(i2c_props, &tda8290_id[0], 1); 666 if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) {
661 tuner_i2c_xfer_recv(i2c_props, &tda8290_id[1], 1); 667 printk(KERN_WARNING "%s: tda8290 couldn't read register 0x%02x\n",
668 __func__, reg);
669 return -ENODEV;
670 }
662 671
663 if (tda8290_id[1] == TDA8290_ID) { 672 if (id == TDA8290_ID) {
664 if (debug) 673 if (debug)
665 printk(KERN_DEBUG "%s: tda8290 detected @ %d-%04x\n", 674 printk(KERN_DEBUG "%s: tda8290 detected @ %d-%04x\n",
666 __func__, i2c_adapter_id(i2c_props->adap), 675 __func__, i2c_adapter_id(i2c_props->adap),
667 i2c_props->addr); 676 i2c_props->addr);
668 return 0; 677 return 0;
669 } 678 }
670
671 return -ENODEV; 679 return -ENODEV;
672} 680}
673 681
@@ -675,16 +683,23 @@ static int tda8295_probe(struct tuner_i2c_props *i2c_props)
675{ 683{
676#define TDA8295_ID 0x8a 684#define TDA8295_ID 0x8a
677#define TDA8295C2_ID 0x8b 685#define TDA8295C2_ID 0x8b
678 unsigned char tda8295_id[] = { 0x2f, 0x00 }; 686 u8 reg = 0x2f, id;
687 struct i2c_msg msg_read[] = {
688 { .addr = 0x4b, .flags = 0, .len = 1, .buf = &reg },
689 { .addr = 0x4b, .flags = I2C_M_RD, .len = 1, .buf = &id },
690 };
679 691
680 /* detect tda8295 */ 692 /* detect tda8290 */
681 tuner_i2c_xfer_send(i2c_props, &tda8295_id[0], 1); 693 if (i2c_transfer(i2c_props->adap, msg_read, 2) != 2) {
682 tuner_i2c_xfer_recv(i2c_props, &tda8295_id[1], 1); 694 printk(KERN_WARNING "%s: tda8290 couldn't read register 0x%02x\n",
695 __func__, reg);
696 return -ENODEV;
697 }
683 698
684 if ((tda8295_id[1] & 0xfe) == TDA8295_ID) { 699 if ((id & 0xfe) == TDA8295_ID) {
685 if (debug) 700 if (debug)
686 printk(KERN_DEBUG "%s: %s detected @ %d-%04x\n", 701 printk(KERN_DEBUG "%s: %s detected @ %d-%04x\n",
687 __func__, (tda8295_id[1] == TDA8295_ID) ? 702 __func__, (id == TDA8295_ID) ?
688 "tda8295c1" : "tda8295c2", 703 "tda8295c1" : "tda8295c2",
689 i2c_adapter_id(i2c_props->adap), 704 i2c_adapter_id(i2c_props->adap),
690 i2c_props->addr); 705 i2c_props->addr);
@@ -740,9 +755,11 @@ struct dvb_frontend *tda829x_attach(struct dvb_frontend *fe,
740 sizeof(struct analog_demod_ops)); 755 sizeof(struct analog_demod_ops));
741 } 756 }
742 757
743 if ((!(cfg) || (TDA829X_PROBE_TUNER == cfg->probe_tuner)) && 758 if (!(cfg) || (TDA829X_PROBE_TUNER == cfg->probe_tuner)) {
744 (tda829x_find_tuner(fe) < 0)) 759 tda8295_power(fe, 1);
745 goto fail; 760 if (tda829x_find_tuner(fe) < 0)
761 goto fail;
762 }
746 763
747 switch (priv->ver) { 764 switch (priv->ver) {
748 case TDA8290: 765 case TDA8290:
@@ -786,6 +803,8 @@ struct dvb_frontend *tda829x_attach(struct dvb_frontend *fe,
786 return fe; 803 return fe;
787 804
788fail: 805fail:
806 memset(&fe->ops.analog_ops, 0, sizeof(struct analog_demod_ops));
807
789 tda829x_release(fe); 808 tda829x_release(fe);
790 return NULL; 809 return NULL;
791} 810}
@@ -809,8 +828,8 @@ int tda829x_probe(struct i2c_adapter *i2c_adap, u8 i2c_addr)
809 int i; 828 int i;
810 829
811 /* rule out tda9887, which would return the same byte repeatedly */ 830 /* rule out tda9887, which would return the same byte repeatedly */
812 tuner_i2c_xfer_send(&i2c_props, soft_reset, 1); 831 tuner_i2c_xfer_send_recv(&i2c_props,
813 tuner_i2c_xfer_recv(&i2c_props, buf, PROBE_BUFFER_SIZE); 832 soft_reset, 1, buf, PROBE_BUFFER_SIZE);
814 for (i = 1; i < PROBE_BUFFER_SIZE; i++) { 833 for (i = 1; i < PROBE_BUFFER_SIZE; i++) {
815 if (buf[i] != buf[0]) 834 if (buf[i] != buf[0])
816 break; 835 break;
@@ -827,13 +846,12 @@ int tda829x_probe(struct i2c_adapter *i2c_adap, u8 i2c_addr)
827 /* fall back to old probing method */ 846 /* fall back to old probing method */
828 tuner_i2c_xfer_send(&i2c_props, easy_mode_b, 2); 847 tuner_i2c_xfer_send(&i2c_props, easy_mode_b, 2);
829 tuner_i2c_xfer_send(&i2c_props, soft_reset, 2); 848 tuner_i2c_xfer_send(&i2c_props, soft_reset, 2);
830 tuner_i2c_xfer_send(&i2c_props, &addr_dto_lsb, 1); 849 tuner_i2c_xfer_send_recv(&i2c_props, &addr_dto_lsb, 1, &data, 1);
831 tuner_i2c_xfer_recv(&i2c_props, &data, 1);
832 if (data == 0) { 850 if (data == 0) {
833 tuner_i2c_xfer_send(&i2c_props, easy_mode_g, 2); 851 tuner_i2c_xfer_send(&i2c_props, easy_mode_g, 2);
834 tuner_i2c_xfer_send(&i2c_props, soft_reset, 2); 852 tuner_i2c_xfer_send(&i2c_props, soft_reset, 2);
835 tuner_i2c_xfer_send(&i2c_props, &addr_dto_lsb, 1); 853 tuner_i2c_xfer_send_recv(&i2c_props,
836 tuner_i2c_xfer_recv(&i2c_props, &data, 1); 854 &addr_dto_lsb, 1, &data, 1);
837 if (data == 0x7b) { 855 if (data == 0x7b) {
838 return 0; 856 return 0;
839 } 857 }
diff --git a/drivers/media/dvb/dvb-usb/dib0700_core.c b/drivers/media/dvb/dvb-usb/dib0700_core.c
index 8ca48f76dfa9..98ffb40728e3 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_core.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_core.c
@@ -514,8 +514,8 @@ struct dib0700_rc_response {
514 union { 514 union {
515 u16 system16; 515 u16 system16;
516 struct { 516 struct {
517 u8 system;
518 u8 not_system; 517 u8 not_system;
518 u8 system;
519 }; 519 };
520 }; 520 };
521 u8 data; 521 u8 data;
@@ -575,7 +575,7 @@ static void dib0700_rc_urb_completion(struct urb *purb)
575 if ((poll_reply->system ^ poll_reply->not_system) != 0xff) { 575 if ((poll_reply->system ^ poll_reply->not_system) != 0xff) {
576 deb_data("NEC extended protocol\n"); 576 deb_data("NEC extended protocol\n");
577 /* NEC extended code - 24 bits */ 577 /* NEC extended code - 24 bits */
578 keycode = poll_reply->system16 << 8 | poll_reply->data; 578 keycode = be16_to_cpu(poll_reply->system16) << 8 | poll_reply->data;
579 } else { 579 } else {
580 deb_data("NEC normal protocol\n"); 580 deb_data("NEC normal protocol\n");
581 /* normal NEC code - 16 bits */ 581 /* normal NEC code - 16 bits */
@@ -587,7 +587,7 @@ static void dib0700_rc_urb_completion(struct urb *purb)
587 deb_data("RC5 protocol\n"); 587 deb_data("RC5 protocol\n");
588 /* RC5 Protocol */ 588 /* RC5 Protocol */
589 toggle = poll_reply->report_id; 589 toggle = poll_reply->report_id;
590 keycode = poll_reply->system16 << 8 | poll_reply->data; 590 keycode = poll_reply->system << 8 | poll_reply->data;
591 591
592 break; 592 break;
593 } 593 }
diff --git a/drivers/media/dvb/firewire/firedtv-rc.c b/drivers/media/dvb/firewire/firedtv-rc.c
index fcf3828472b8..f82d4a93feb3 100644
--- a/drivers/media/dvb/firewire/firedtv-rc.c
+++ b/drivers/media/dvb/firewire/firedtv-rc.c
@@ -172,7 +172,8 @@ void fdtv_unregister_rc(struct firedtv *fdtv)
172 172
173void fdtv_handle_rc(struct firedtv *fdtv, unsigned int code) 173void fdtv_handle_rc(struct firedtv *fdtv, unsigned int code)
174{ 174{
175 u16 *keycode = fdtv->remote_ctrl_dev->keycode; 175 struct input_dev *idev = fdtv->remote_ctrl_dev;
176 u16 *keycode = idev->keycode;
176 177
177 if (code >= 0x0300 && code <= 0x031f) 178 if (code >= 0x0300 && code <= 0x031f)
178 code = keycode[code - 0x0300]; 179 code = keycode[code - 0x0300];
@@ -188,6 +189,8 @@ void fdtv_handle_rc(struct firedtv *fdtv, unsigned int code)
188 return; 189 return;
189 } 190 }
190 191
191 input_report_key(fdtv->remote_ctrl_dev, code, 1); 192 input_report_key(idev, code, 1);
192 input_report_key(fdtv->remote_ctrl_dev, code, 0); 193 input_sync(idev);
194 input_report_key(idev, code, 0);
195 input_sync(idev);
193} 196}
diff --git a/drivers/media/dvb/frontends/Kconfig b/drivers/media/dvb/frontends/Kconfig
index ef3e43a03199..b8519ba511e5 100644
--- a/drivers/media/dvb/frontends/Kconfig
+++ b/drivers/media/dvb/frontends/Kconfig
@@ -1,7 +1,7 @@
1config DVB_FE_CUSTOMISE 1config DVB_FE_CUSTOMISE
2 bool "Customise the frontend modules to build" 2 bool "Customise the frontend modules to build"
3 depends on DVB_CORE 3 depends on DVB_CORE
4 default y if EMBEDDED 4 default y if EXPERT
5 help 5 help
6 This allows the user to select/deselect frontend drivers for their 6 This allows the user to select/deselect frontend drivers for their
7 hardware from the build. 7 hardware from the build.
diff --git a/drivers/media/dvb/frontends/af9013.c b/drivers/media/dvb/frontends/af9013.c
index ce222055526d..ba25fa0b0fc2 100644
--- a/drivers/media/dvb/frontends/af9013.c
+++ b/drivers/media/dvb/frontends/af9013.c
@@ -334,11 +334,11 @@ static int af9013_set_freq_ctrl(struct af9013_state *state, fe_bandwidth_t bw)
334 if_sample_freq = 3300000; /* 3.3 MHz */ 334 if_sample_freq = 3300000; /* 3.3 MHz */
335 break; 335 break;
336 case BANDWIDTH_7_MHZ: 336 case BANDWIDTH_7_MHZ:
337 if_sample_freq = 3800000; /* 3.8 MHz */ 337 if_sample_freq = 3500000; /* 3.5 MHz */
338 break; 338 break;
339 case BANDWIDTH_8_MHZ: 339 case BANDWIDTH_8_MHZ:
340 default: 340 default:
341 if_sample_freq = 4300000; /* 4.3 MHz */ 341 if_sample_freq = 4000000; /* 4.0 MHz */
342 break; 342 break;
343 } 343 }
344 } else if (state->config.tuner == AF9013_TUNER_TDA18218) { 344 } else if (state->config.tuner == AF9013_TUNER_TDA18218) {
diff --git a/drivers/media/dvb/frontends/ix2505v.c b/drivers/media/dvb/frontends/ix2505v.c
index 6360c681ded9..6c2e929bd79f 100644
--- a/drivers/media/dvb/frontends/ix2505v.c
+++ b/drivers/media/dvb/frontends/ix2505v.c
@@ -311,7 +311,7 @@ struct dvb_frontend *ix2505v_attach(struct dvb_frontend *fe,
311 return fe; 311 return fe;
312 312
313error: 313error:
314 ix2505v_release(fe); 314 kfree(state);
315 return NULL; 315 return NULL;
316} 316}
317EXPORT_SYMBOL(ix2505v_attach); 317EXPORT_SYMBOL(ix2505v_attach);
diff --git a/drivers/media/dvb/frontends/mb86a20s.c b/drivers/media/dvb/frontends/mb86a20s.c
index d3ad3e75a35a..cc4acd2f920d 100644
--- a/drivers/media/dvb/frontends/mb86a20s.c
+++ b/drivers/media/dvb/frontends/mb86a20s.c
@@ -43,6 +43,8 @@ struct mb86a20s_state {
43 const struct mb86a20s_config *config; 43 const struct mb86a20s_config *config;
44 44
45 struct dvb_frontend frontend; 45 struct dvb_frontend frontend;
46
47 bool need_init;
46}; 48};
47 49
48struct regdata { 50struct regdata {
@@ -318,7 +320,7 @@ static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
318 320
319 rc = i2c_transfer(state->i2c, &msg, 1); 321 rc = i2c_transfer(state->i2c, &msg, 1);
320 if (rc != 1) { 322 if (rc != 1) {
321 printk("%s: writereg rcor(rc == %i, reg == 0x%02x," 323 printk("%s: writereg error (rc == %i, reg == 0x%02x,"
322 " data == 0x%02x)\n", __func__, rc, reg, data); 324 " data == 0x%02x)\n", __func__, rc, reg, data);
323 return rc; 325 return rc;
324 } 326 }
@@ -353,7 +355,7 @@ static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
353 rc = i2c_transfer(state->i2c, msg, 2); 355 rc = i2c_transfer(state->i2c, msg, 2);
354 356
355 if (rc != 2) { 357 if (rc != 2) {
356 rc("%s: reg=0x%x (rcor=%d)\n", __func__, reg, rc); 358 rc("%s: reg=0x%x (error=%d)\n", __func__, reg, rc);
357 return rc; 359 return rc;
358 } 360 }
359 361
@@ -382,23 +384,31 @@ static int mb86a20s_initfe(struct dvb_frontend *fe)
382 /* Initialize the frontend */ 384 /* Initialize the frontend */
383 rc = mb86a20s_writeregdata(state, mb86a20s_init); 385 rc = mb86a20s_writeregdata(state, mb86a20s_init);
384 if (rc < 0) 386 if (rc < 0)
385 return rc; 387 goto err;
386 388
387 if (!state->config->is_serial) { 389 if (!state->config->is_serial) {
388 regD5 &= ~1; 390 regD5 &= ~1;
389 391
390 rc = mb86a20s_writereg(state, 0x50, 0xd5); 392 rc = mb86a20s_writereg(state, 0x50, 0xd5);
391 if (rc < 0) 393 if (rc < 0)
392 return rc; 394 goto err;
393 rc = mb86a20s_writereg(state, 0x51, regD5); 395 rc = mb86a20s_writereg(state, 0x51, regD5);
394 if (rc < 0) 396 if (rc < 0)
395 return rc; 397 goto err;
396 } 398 }
397 399
398 if (fe->ops.i2c_gate_ctrl) 400 if (fe->ops.i2c_gate_ctrl)
399 fe->ops.i2c_gate_ctrl(fe, 1); 401 fe->ops.i2c_gate_ctrl(fe, 1);
400 402
401 return 0; 403err:
404 if (rc < 0) {
405 state->need_init = true;
406 printk(KERN_INFO "mb86a20s: Init failed. Will try again later\n");
407 } else {
408 state->need_init = false;
409 dprintk("Initialization succeded.\n");
410 }
411 return rc;
402} 412}
403 413
404static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength) 414static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
@@ -485,8 +495,22 @@ static int mb86a20s_set_frontend(struct dvb_frontend *fe,
485 495
486 if (fe->ops.i2c_gate_ctrl) 496 if (fe->ops.i2c_gate_ctrl)
487 fe->ops.i2c_gate_ctrl(fe, 1); 497 fe->ops.i2c_gate_ctrl(fe, 1);
498 dprintk("Calling tuner set parameters\n");
488 fe->ops.tuner_ops.set_params(fe, p); 499 fe->ops.tuner_ops.set_params(fe, p);
489 500
501 /*
502 * Make it more reliable: if, for some reason, the initial
503 * device initialization doesn't happen, initialize it when
504 * a SBTVD parameters are adjusted.
505 *
506 * Unfortunately, due to a hard to track bug at tda829x/tda18271,
507 * the agc callback logic is not called during DVB attach time,
508 * causing mb86a20s to not be initialized with Kworld SBTVD.
509 * So, this hack is needed, in order to make Kworld SBTVD to work.
510 */
511 if (state->need_init)
512 mb86a20s_initfe(fe);
513
490 if (fe->ops.i2c_gate_ctrl) 514 if (fe->ops.i2c_gate_ctrl)
491 fe->ops.i2c_gate_ctrl(fe, 0); 515 fe->ops.i2c_gate_ctrl(fe, 0);
492 rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception); 516 rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
diff --git a/drivers/media/dvb/ttpci/av7110_ca.c b/drivers/media/dvb/ttpci/av7110_ca.c
index 122c72806916..9fc1dd0ba4c3 100644
--- a/drivers/media/dvb/ttpci/av7110_ca.c
+++ b/drivers/media/dvb/ttpci/av7110_ca.c
@@ -277,7 +277,7 @@ static int dvb_ca_ioctl(struct file *file, unsigned int cmd, void *parg)
277 { 277 {
278 ca_slot_info_t *info=(ca_slot_info_t *)parg; 278 ca_slot_info_t *info=(ca_slot_info_t *)parg;
279 279
280 if (info->num > 1) 280 if (info->num < 0 || info->num > 1)
281 return -EINVAL; 281 return -EINVAL;
282 av7110->ci_slot[info->num].num = info->num; 282 av7110->ci_slot[info->num].num = info->num;
283 av7110->ci_slot[info->num].type = FW_CI_LL_SUPPORT(av7110->arm_app) ? 283 av7110->ci_slot[info->num].type = FW_CI_LL_SUPPORT(av7110->arm_app) ?
diff --git a/drivers/media/radio/Kconfig b/drivers/media/radio/Kconfig
index 3c5a4739ed70..ecdffa6aac66 100644
--- a/drivers/media/radio/Kconfig
+++ b/drivers/media/radio/Kconfig
@@ -151,20 +151,6 @@ config RADIO_GEMTEK_PROBE
151 following ports will be probed: 0x20c, 0x30c, 0x24c, 0x34c, 0x248 and 151 following ports will be probed: 0x20c, 0x30c, 0x24c, 0x34c, 0x248 and
152 0x28c. 152 0x28c.
153 153
154config RADIO_GEMTEK_PCI
155 tristate "GemTek PCI Radio Card support"
156 depends on VIDEO_V4L2 && PCI
157 ---help---
158 Choose Y here if you have this PCI FM radio card.
159
160 In order to control your radio card, you will need to use programs
161 that are compatible with the Video for Linux API. Information on
162 this API and pointers to "v4l" programs may be found at
163 <file:Documentation/video4linux/API.html>.
164
165 To compile this driver as a module, choose M here: the
166 module will be called radio-gemtek-pci.
167
168config RADIO_MAXIRADIO 154config RADIO_MAXIRADIO
169 tristate "Guillemot MAXI Radio FM 2000 radio" 155 tristate "Guillemot MAXI Radio FM 2000 radio"
170 depends on VIDEO_V4L2 && PCI 156 depends on VIDEO_V4L2 && PCI
diff --git a/drivers/media/radio/Makefile b/drivers/media/radio/Makefile
index d2970748a69f..717656d2f749 100644
--- a/drivers/media/radio/Makefile
+++ b/drivers/media/radio/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_RADIO_MAXIRADIO) += radio-maxiradio.o
13obj-$(CONFIG_RADIO_RTRACK) += radio-aimslab.o 13obj-$(CONFIG_RADIO_RTRACK) += radio-aimslab.o
14obj-$(CONFIG_RADIO_ZOLTRIX) += radio-zoltrix.o 14obj-$(CONFIG_RADIO_ZOLTRIX) += radio-zoltrix.o
15obj-$(CONFIG_RADIO_GEMTEK) += radio-gemtek.o 15obj-$(CONFIG_RADIO_GEMTEK) += radio-gemtek.o
16obj-$(CONFIG_RADIO_GEMTEK_PCI) += radio-gemtek-pci.o
17obj-$(CONFIG_RADIO_TRUST) += radio-trust.o 16obj-$(CONFIG_RADIO_TRUST) += radio-trust.o
18obj-$(CONFIG_I2C_SI4713) += si4713-i2c.o 17obj-$(CONFIG_I2C_SI4713) += si4713-i2c.o
19obj-$(CONFIG_RADIO_SI4713) += radio-si4713.o 18obj-$(CONFIG_RADIO_SI4713) += radio-si4713.o
diff --git a/drivers/media/radio/radio-aimslab.c b/drivers/media/radio/radio-aimslab.c
index 6cc5d130fbc8..4ce10dbeadd8 100644
--- a/drivers/media/radio/radio-aimslab.c
+++ b/drivers/media/radio/radio-aimslab.c
@@ -31,6 +31,7 @@
31#include <linux/module.h> /* Modules */ 31#include <linux/module.h> /* Modules */
32#include <linux/init.h> /* Initdata */ 32#include <linux/init.h> /* Initdata */
33#include <linux/ioport.h> /* request_region */ 33#include <linux/ioport.h> /* request_region */
34#include <linux/delay.h> /* msleep */
34#include <linux/videodev2.h> /* kernel radio structs */ 35#include <linux/videodev2.h> /* kernel radio structs */
35#include <linux/version.h> /* for KERNEL_VERSION MACRO */ 36#include <linux/version.h> /* for KERNEL_VERSION MACRO */
36#include <linux/io.h> /* outb, outb_p */ 37#include <linux/io.h> /* outb, outb_p */
diff --git a/drivers/media/radio/radio-gemtek-pci.c b/drivers/media/radio/radio-gemtek-pci.c
deleted file mode 100644
index 28fa85ba2087..000000000000
--- a/drivers/media/radio/radio-gemtek-pci.c
+++ /dev/null
@@ -1,478 +0,0 @@
1/*
2 ***************************************************************************
3 *
4 * radio-gemtek-pci.c - Gemtek PCI Radio driver
5 * (C) 2001 Vladimir Shebordaev <vshebordaev@mail.ru>
6 *
7 ***************************************************************************
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public
20 * License along with this program; if not, write to the Free
21 * Software Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139,
22 * USA.
23 *
24 ***************************************************************************
25 *
26 * Gemtek Corp still silently refuses to release any specifications
27 * of their multimedia devices, so the protocol still has to be
28 * reverse engineered.
29 *
30 * The v4l code was inspired by Jonas Munsin's Gemtek serial line
31 * radio device driver.
32 *
33 * Please, let me know if this piece of code was useful :)
34 *
35 * TODO: multiple device support and portability were not tested
36 *
37 * Converted to V4L2 API by Mauro Carvalho Chehab <mchehab@infradead.org>
38 *
39 ***************************************************************************
40 */
41
42#include <linux/types.h>
43#include <linux/list.h>
44#include <linux/module.h>
45#include <linux/init.h>
46#include <linux/pci.h>
47#include <linux/videodev2.h>
48#include <linux/errno.h>
49#include <linux/version.h> /* for KERNEL_VERSION MACRO */
50#include <linux/io.h>
51#include <linux/slab.h>
52#include <media/v4l2-device.h>
53#include <media/v4l2-ioctl.h>
54
55MODULE_AUTHOR("Vladimir Shebordaev <vshebordaev@mail.ru>");
56MODULE_DESCRIPTION("The video4linux driver for the Gemtek PCI Radio Card");
57MODULE_LICENSE("GPL");
58
59static int nr_radio = -1;
60static int mx = 1;
61
62module_param(mx, bool, 0);
63MODULE_PARM_DESC(mx, "single digit: 1 - turn off the turner upon module exit (default), 0 - do not");
64module_param(nr_radio, int, 0);
65MODULE_PARM_DESC(nr_radio, "video4linux device number to use");
66
67#define RADIO_VERSION KERNEL_VERSION(0, 0, 2)
68
69#ifndef PCI_VENDOR_ID_GEMTEK
70#define PCI_VENDOR_ID_GEMTEK 0x5046
71#endif
72
73#ifndef PCI_DEVICE_ID_GEMTEK_PR103
74#define PCI_DEVICE_ID_GEMTEK_PR103 0x1001
75#endif
76
77#ifndef GEMTEK_PCI_RANGE_LOW
78#define GEMTEK_PCI_RANGE_LOW (87*16000)
79#endif
80
81#ifndef GEMTEK_PCI_RANGE_HIGH
82#define GEMTEK_PCI_RANGE_HIGH (108*16000)
83#endif
84
85struct gemtek_pci {
86 struct v4l2_device v4l2_dev;
87 struct video_device vdev;
88 struct mutex lock;
89 struct pci_dev *pdev;
90
91 u32 iobase;
92 u32 length;
93
94 u32 current_frequency;
95 u8 mute;
96};
97
98static inline struct gemtek_pci *to_gemtek_pci(struct v4l2_device *v4l2_dev)
99{
100 return container_of(v4l2_dev, struct gemtek_pci, v4l2_dev);
101}
102
103static inline u8 gemtek_pci_out(u16 value, u32 port)
104{
105 outw(value, port);
106
107 return (u8)value;
108}
109
110#define _b0(v) (*((u8 *)&v))
111
112static void __gemtek_pci_cmd(u16 value, u32 port, u8 *last_byte, int keep)
113{
114 u8 byte = *last_byte;
115
116 if (!value) {
117 if (!keep)
118 value = (u16)port;
119 byte &= 0xfd;
120 } else
121 byte |= 2;
122
123 _b0(value) = byte;
124 outw(value, port);
125 byte |= 1;
126 _b0(value) = byte;
127 outw(value, port);
128 byte &= 0xfe;
129 _b0(value) = byte;
130 outw(value, port);
131
132 *last_byte = byte;
133}
134
135static inline void gemtek_pci_nil(u32 port, u8 *last_byte)
136{
137 __gemtek_pci_cmd(0x00, port, last_byte, false);
138}
139
140static inline void gemtek_pci_cmd(u16 cmd, u32 port, u8 *last_byte)
141{
142 __gemtek_pci_cmd(cmd, port, last_byte, true);
143}
144
145static void gemtek_pci_setfrequency(struct gemtek_pci *card, unsigned long frequency)
146{
147 int i;
148 u32 value = frequency / 200 + 856;
149 u16 mask = 0x8000;
150 u8 last_byte;
151 u32 port = card->iobase;
152
153 mutex_lock(&card->lock);
154 card->current_frequency = frequency;
155 last_byte = gemtek_pci_out(0x06, port);
156
157 i = 0;
158 do {
159 gemtek_pci_nil(port, &last_byte);
160 i++;
161 } while (i < 9);
162
163 i = 0;
164 do {
165 gemtek_pci_cmd(value & mask, port, &last_byte);
166 mask >>= 1;
167 i++;
168 } while (i < 16);
169
170 outw(0x10, port);
171 mutex_unlock(&card->lock);
172}
173
174
175static void gemtek_pci_mute(struct gemtek_pci *card)
176{
177 mutex_lock(&card->lock);
178 outb(0x1f, card->iobase);
179 card->mute = true;
180 mutex_unlock(&card->lock);
181}
182
183static void gemtek_pci_unmute(struct gemtek_pci *card)
184{
185 if (card->mute) {
186 gemtek_pci_setfrequency(card, card->current_frequency);
187 card->mute = false;
188 }
189}
190
191static int gemtek_pci_getsignal(struct gemtek_pci *card)
192{
193 int sig;
194
195 mutex_lock(&card->lock);
196 sig = (inb(card->iobase) & 0x08) ? 0 : 1;
197 mutex_unlock(&card->lock);
198 return sig;
199}
200
201static int vidioc_querycap(struct file *file, void *priv,
202 struct v4l2_capability *v)
203{
204 struct gemtek_pci *card = video_drvdata(file);
205
206 strlcpy(v->driver, "radio-gemtek-pci", sizeof(v->driver));
207 strlcpy(v->card, "GemTek PCI Radio", sizeof(v->card));
208 snprintf(v->bus_info, sizeof(v->bus_info), "PCI:%s", pci_name(card->pdev));
209 v->version = RADIO_VERSION;
210 v->capabilities = V4L2_CAP_TUNER | V4L2_CAP_RADIO;
211 return 0;
212}
213
214static int vidioc_g_tuner(struct file *file, void *priv,
215 struct v4l2_tuner *v)
216{
217 struct gemtek_pci *card = video_drvdata(file);
218
219 if (v->index > 0)
220 return -EINVAL;
221
222 strlcpy(v->name, "FM", sizeof(v->name));
223 v->type = V4L2_TUNER_RADIO;
224 v->rangelow = GEMTEK_PCI_RANGE_LOW;
225 v->rangehigh = GEMTEK_PCI_RANGE_HIGH;
226 v->rxsubchans = V4L2_TUNER_SUB_MONO;
227 v->capability = V4L2_TUNER_CAP_LOW;
228 v->audmode = V4L2_TUNER_MODE_MONO;
229 v->signal = 0xffff * gemtek_pci_getsignal(card);
230 return 0;
231}
232
233static int vidioc_s_tuner(struct file *file, void *priv,
234 struct v4l2_tuner *v)
235{
236 return v->index ? -EINVAL : 0;
237}
238
239static int vidioc_s_frequency(struct file *file, void *priv,
240 struct v4l2_frequency *f)
241{
242 struct gemtek_pci *card = video_drvdata(file);
243
244 if (f->tuner != 0 || f->type != V4L2_TUNER_RADIO)
245 return -EINVAL;
246 if (f->frequency < GEMTEK_PCI_RANGE_LOW ||
247 f->frequency > GEMTEK_PCI_RANGE_HIGH)
248 return -EINVAL;
249 gemtek_pci_setfrequency(card, f->frequency);
250 card->mute = false;
251 return 0;
252}
253
254static int vidioc_g_frequency(struct file *file, void *priv,
255 struct v4l2_frequency *f)
256{
257 struct gemtek_pci *card = video_drvdata(file);
258
259 if (f->tuner != 0)
260 return -EINVAL;
261 f->type = V4L2_TUNER_RADIO;
262 f->frequency = card->current_frequency;
263 return 0;
264}
265
266static int vidioc_queryctrl(struct file *file, void *priv,
267 struct v4l2_queryctrl *qc)
268{
269 switch (qc->id) {
270 case V4L2_CID_AUDIO_MUTE:
271 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 1);
272 case V4L2_CID_AUDIO_VOLUME:
273 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535, 65535);
274 }
275 return -EINVAL;
276}
277
278static int vidioc_g_ctrl(struct file *file, void *priv,
279 struct v4l2_control *ctrl)
280{
281 struct gemtek_pci *card = video_drvdata(file);
282
283 switch (ctrl->id) {
284 case V4L2_CID_AUDIO_MUTE:
285 ctrl->value = card->mute;
286 return 0;
287 case V4L2_CID_AUDIO_VOLUME:
288 if (card->mute)
289 ctrl->value = 0;
290 else
291 ctrl->value = 65535;
292 return 0;
293 }
294 return -EINVAL;
295}
296
297static int vidioc_s_ctrl(struct file *file, void *priv,
298 struct v4l2_control *ctrl)
299{
300 struct gemtek_pci *card = video_drvdata(file);
301
302 switch (ctrl->id) {
303 case V4L2_CID_AUDIO_MUTE:
304 if (ctrl->value)
305 gemtek_pci_mute(card);
306 else
307 gemtek_pci_unmute(card);
308 return 0;
309 case V4L2_CID_AUDIO_VOLUME:
310 if (ctrl->value)
311 gemtek_pci_unmute(card);
312 else
313 gemtek_pci_mute(card);
314 return 0;
315 }
316 return -EINVAL;
317}
318
319static int vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
320{
321 *i = 0;
322 return 0;
323}
324
325static int vidioc_s_input(struct file *filp, void *priv, unsigned int i)
326{
327 return i ? -EINVAL : 0;
328}
329
330static int vidioc_g_audio(struct file *file, void *priv,
331 struct v4l2_audio *a)
332{
333 a->index = 0;
334 strlcpy(a->name, "Radio", sizeof(a->name));
335 a->capability = V4L2_AUDCAP_STEREO;
336 return 0;
337}
338
339static int vidioc_s_audio(struct file *file, void *priv,
340 struct v4l2_audio *a)
341{
342 return a->index ? -EINVAL : 0;
343}
344
345enum {
346 GEMTEK_PR103
347};
348
349static char *card_names[] __devinitdata = {
350 "GEMTEK_PR103"
351};
352
353static struct pci_device_id gemtek_pci_id[] =
354{
355 { PCI_VENDOR_ID_GEMTEK, PCI_DEVICE_ID_GEMTEK_PR103,
356 PCI_ANY_ID, PCI_ANY_ID, 0, 0, GEMTEK_PR103 },
357 { 0 }
358};
359
360MODULE_DEVICE_TABLE(pci, gemtek_pci_id);
361
362static const struct v4l2_file_operations gemtek_pci_fops = {
363 .owner = THIS_MODULE,
364 .unlocked_ioctl = video_ioctl2,
365};
366
367static const struct v4l2_ioctl_ops gemtek_pci_ioctl_ops = {
368 .vidioc_querycap = vidioc_querycap,
369 .vidioc_g_tuner = vidioc_g_tuner,
370 .vidioc_s_tuner = vidioc_s_tuner,
371 .vidioc_g_audio = vidioc_g_audio,
372 .vidioc_s_audio = vidioc_s_audio,
373 .vidioc_g_input = vidioc_g_input,
374 .vidioc_s_input = vidioc_s_input,
375 .vidioc_g_frequency = vidioc_g_frequency,
376 .vidioc_s_frequency = vidioc_s_frequency,
377 .vidioc_queryctrl = vidioc_queryctrl,
378 .vidioc_g_ctrl = vidioc_g_ctrl,
379 .vidioc_s_ctrl = vidioc_s_ctrl,
380};
381
382static int __devinit gemtek_pci_probe(struct pci_dev *pdev, const struct pci_device_id *pci_id)
383{
384 struct gemtek_pci *card;
385 struct v4l2_device *v4l2_dev;
386 int res;
387
388 card = kzalloc(sizeof(struct gemtek_pci), GFP_KERNEL);
389 if (card == NULL) {
390 dev_err(&pdev->dev, "out of memory\n");
391 return -ENOMEM;
392 }
393
394 v4l2_dev = &card->v4l2_dev;
395 mutex_init(&card->lock);
396 card->pdev = pdev;
397
398 strlcpy(v4l2_dev->name, "gemtek_pci", sizeof(v4l2_dev->name));
399
400 res = v4l2_device_register(&pdev->dev, v4l2_dev);
401 if (res < 0) {
402 v4l2_err(v4l2_dev, "Could not register v4l2_device\n");
403 kfree(card);
404 return res;
405 }
406
407 if (pci_enable_device(pdev))
408 goto err_pci;
409
410 card->iobase = pci_resource_start(pdev, 0);
411 card->length = pci_resource_len(pdev, 0);
412
413 if (request_region(card->iobase, card->length, card_names[pci_id->driver_data]) == NULL) {
414 v4l2_err(v4l2_dev, "i/o port already in use\n");
415 goto err_pci;
416 }
417
418 strlcpy(card->vdev.name, v4l2_dev->name, sizeof(card->vdev.name));
419 card->vdev.v4l2_dev = v4l2_dev;
420 card->vdev.fops = &gemtek_pci_fops;
421 card->vdev.ioctl_ops = &gemtek_pci_ioctl_ops;
422 card->vdev.release = video_device_release_empty;
423 video_set_drvdata(&card->vdev, card);
424
425 gemtek_pci_mute(card);
426
427 if (video_register_device(&card->vdev, VFL_TYPE_RADIO, nr_radio) < 0)
428 goto err_video;
429
430 v4l2_info(v4l2_dev, "Gemtek PCI Radio (rev. %d) found at 0x%04x-0x%04x.\n",
431 pdev->revision, card->iobase, card->iobase + card->length - 1);
432
433 return 0;
434
435err_video:
436 release_region(card->iobase, card->length);
437
438err_pci:
439 v4l2_device_unregister(v4l2_dev);
440 kfree(card);
441 return -ENODEV;
442}
443
444static void __devexit gemtek_pci_remove(struct pci_dev *pdev)
445{
446 struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
447 struct gemtek_pci *card = to_gemtek_pci(v4l2_dev);
448
449 video_unregister_device(&card->vdev);
450 v4l2_device_unregister(v4l2_dev);
451
452 release_region(card->iobase, card->length);
453
454 if (mx)
455 gemtek_pci_mute(card);
456
457 kfree(card);
458}
459
460static struct pci_driver gemtek_pci_driver = {
461 .name = "gemtek_pci",
462 .id_table = gemtek_pci_id,
463 .probe = gemtek_pci_probe,
464 .remove = __devexit_p(gemtek_pci_remove),
465};
466
467static int __init gemtek_pci_init(void)
468{
469 return pci_register_driver(&gemtek_pci_driver);
470}
471
472static void __exit gemtek_pci_exit(void)
473{
474 pci_unregister_driver(&gemtek_pci_driver);
475}
476
477module_init(gemtek_pci_init);
478module_exit(gemtek_pci_exit);
diff --git a/drivers/media/radio/radio-maxiradio.c b/drivers/media/radio/radio-maxiradio.c
index 6459a220b0dd..5c2a9058c09f 100644
--- a/drivers/media/radio/radio-maxiradio.c
+++ b/drivers/media/radio/radio-maxiradio.c
@@ -77,8 +77,8 @@ MODULE_PARM_DESC(debug, "activates debug info");
77/* TEA5757 pin mappings */ 77/* TEA5757 pin mappings */
78static const int clk = 1, data = 2, wren = 4, mo_st = 8, power = 16; 78static const int clk = 1, data = 2, wren = 4, mo_st = 8, power = 16;
79 79
80#define FREQ_LO (50 * 16000) 80#define FREQ_LO (87 * 16000)
81#define FREQ_HI (150 * 16000) 81#define FREQ_HI (108 * 16000)
82 82
83#define FREQ_IF 171200 /* 10.7*16000 */ 83#define FREQ_IF 171200 /* 10.7*16000 */
84#define FREQ_STEP 200 /* 12.5*16 */ 84#define FREQ_STEP 200 /* 12.5*16 */
diff --git a/drivers/media/radio/radio-wl1273.c b/drivers/media/radio/radio-wl1273.c
index dd6bd364efa0..7ecc8e657663 100644
--- a/drivers/media/radio/radio-wl1273.c
+++ b/drivers/media/radio/radio-wl1273.c
@@ -1407,7 +1407,7 @@ static const struct v4l2_file_operations wl1273_fops = {
1407 .read = wl1273_fm_fops_read, 1407 .read = wl1273_fm_fops_read,
1408 .write = wl1273_fm_fops_write, 1408 .write = wl1273_fm_fops_write,
1409 .poll = wl1273_fm_fops_poll, 1409 .poll = wl1273_fm_fops_poll,
1410 .ioctl = video_ioctl2, 1410 .unlocked_ioctl = video_ioctl2,
1411 .open = wl1273_fm_fops_open, 1411 .open = wl1273_fm_fops_open,
1412 .release = wl1273_fm_fops_release, 1412 .release = wl1273_fm_fops_release,
1413}; 1413};
diff --git a/drivers/media/radio/si470x/radio-si470x-common.c b/drivers/media/radio/si470x/radio-si470x-common.c
index ac76dfe5b3fa..60c176fe328e 100644
--- a/drivers/media/radio/si470x/radio-si470x-common.c
+++ b/drivers/media/radio/si470x/radio-si470x-common.c
@@ -357,7 +357,8 @@ int si470x_start(struct si470x_device *radio)
357 goto done; 357 goto done;
358 358
359 /* sysconfig 1 */ 359 /* sysconfig 1 */
360 radio->registers[SYSCONFIG1] = SYSCONFIG1_DE; 360 radio->registers[SYSCONFIG1] =
361 (de << 11) & SYSCONFIG1_DE; /* DE*/
361 retval = si470x_set_register(radio, SYSCONFIG1); 362 retval = si470x_set_register(radio, SYSCONFIG1);
362 if (retval < 0) 363 if (retval < 0)
363 goto done; 364 goto done;
@@ -687,12 +688,8 @@ static int si470x_vidioc_g_tuner(struct file *file, void *priv,
687 /* driver constants */ 688 /* driver constants */
688 strcpy(tuner->name, "FM"); 689 strcpy(tuner->name, "FM");
689 tuner->type = V4L2_TUNER_RADIO; 690 tuner->type = V4L2_TUNER_RADIO;
690#if defined(CONFIG_USB_SI470X) || defined(CONFIG_USB_SI470X_MODULE)
691 tuner->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO | 691 tuner->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO |
692 V4L2_TUNER_CAP_RDS | V4L2_TUNER_CAP_RDS_BLOCK_IO; 692 V4L2_TUNER_CAP_RDS | V4L2_TUNER_CAP_RDS_BLOCK_IO;
693#else
694 tuner->capability = V4L2_TUNER_CAP_LOW | V4L2_TUNER_CAP_STEREO;
695#endif
696 693
697 /* range limits */ 694 /* range limits */
698 switch ((radio->registers[SYSCONFIG2] & SYSCONFIG2_BAND) >> 6) { 695 switch ((radio->registers[SYSCONFIG2] & SYSCONFIG2_BAND) >> 6) {
@@ -718,12 +715,10 @@ static int si470x_vidioc_g_tuner(struct file *file, void *priv,
718 tuner->rxsubchans = V4L2_TUNER_SUB_MONO; 715 tuner->rxsubchans = V4L2_TUNER_SUB_MONO;
719 else 716 else
720 tuner->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; 717 tuner->rxsubchans = V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO;
721#if defined(CONFIG_USB_SI470X) || defined(CONFIG_USB_SI470X_MODULE)
722 /* If there is a reliable method of detecting an RDS channel, 718 /* If there is a reliable method of detecting an RDS channel,
723 then this code should check for that before setting this 719 then this code should check for that before setting this
724 RDS subchannel. */ 720 RDS subchannel. */
725 tuner->rxsubchans |= V4L2_TUNER_SUB_RDS; 721 tuner->rxsubchans |= V4L2_TUNER_SUB_RDS;
726#endif
727 722
728 /* mono/stereo selector */ 723 /* mono/stereo selector */
729 if ((radio->registers[POWERCFG] & POWERCFG_MONO) == 0) 724 if ((radio->registers[POWERCFG] & POWERCFG_MONO) == 0)
diff --git a/drivers/media/rc/ene_ir.c b/drivers/media/rc/ene_ir.c
index 80b3c319f698..1ac49139158d 100644
--- a/drivers/media/rc/ene_ir.c
+++ b/drivers/media/rc/ene_ir.c
@@ -446,27 +446,27 @@ static void ene_rx_setup(struct ene_device *dev)
446 446
447select_timeout: 447select_timeout:
448 if (dev->rx_fan_input_inuse) { 448 if (dev->rx_fan_input_inuse) {
449 dev->rdev->rx_resolution = MS_TO_NS(ENE_FW_SAMPLE_PERIOD_FAN); 449 dev->rdev->rx_resolution = US_TO_NS(ENE_FW_SAMPLE_PERIOD_FAN);
450 450
451 /* Fan input doesn't support timeouts, it just ends the 451 /* Fan input doesn't support timeouts, it just ends the
452 input with a maximum sample */ 452 input with a maximum sample */
453 dev->rdev->min_timeout = dev->rdev->max_timeout = 453 dev->rdev->min_timeout = dev->rdev->max_timeout =
454 MS_TO_NS(ENE_FW_SMPL_BUF_FAN_MSK * 454 US_TO_NS(ENE_FW_SMPL_BUF_FAN_MSK *
455 ENE_FW_SAMPLE_PERIOD_FAN); 455 ENE_FW_SAMPLE_PERIOD_FAN);
456 } else { 456 } else {
457 dev->rdev->rx_resolution = MS_TO_NS(sample_period); 457 dev->rdev->rx_resolution = US_TO_NS(sample_period);
458 458
459 /* Theoreticly timeout is unlimited, but we cap it 459 /* Theoreticly timeout is unlimited, but we cap it
460 * because it was seen that on one device, it 460 * because it was seen that on one device, it
461 * would stop sending spaces after around 250 msec. 461 * would stop sending spaces after around 250 msec.
462 * Besides, this is close to 2^32 anyway and timeout is u32. 462 * Besides, this is close to 2^32 anyway and timeout is u32.
463 */ 463 */
464 dev->rdev->min_timeout = MS_TO_NS(127 * sample_period); 464 dev->rdev->min_timeout = US_TO_NS(127 * sample_period);
465 dev->rdev->max_timeout = MS_TO_NS(200000); 465 dev->rdev->max_timeout = US_TO_NS(200000);
466 } 466 }
467 467
468 if (dev->hw_learning_and_tx_capable) 468 if (dev->hw_learning_and_tx_capable)
469 dev->rdev->tx_resolution = MS_TO_NS(sample_period); 469 dev->rdev->tx_resolution = US_TO_NS(sample_period);
470 470
471 if (dev->rdev->timeout > dev->rdev->max_timeout) 471 if (dev->rdev->timeout > dev->rdev->max_timeout)
472 dev->rdev->timeout = dev->rdev->max_timeout; 472 dev->rdev->timeout = dev->rdev->max_timeout;
@@ -801,7 +801,7 @@ static irqreturn_t ene_isr(int irq, void *data)
801 801
802 dbg("RX: %d (%s)", hw_sample, pulse ? "pulse" : "space"); 802 dbg("RX: %d (%s)", hw_sample, pulse ? "pulse" : "space");
803 803
804 ev.duration = MS_TO_NS(hw_sample); 804 ev.duration = US_TO_NS(hw_sample);
805 ev.pulse = pulse; 805 ev.pulse = pulse;
806 ir_raw_event_store_with_filter(dev->rdev, &ev); 806 ir_raw_event_store_with_filter(dev->rdev, &ev);
807 } 807 }
@@ -821,7 +821,7 @@ static void ene_setup_default_settings(struct ene_device *dev)
821 dev->learning_mode_enabled = learning_mode_force; 821 dev->learning_mode_enabled = learning_mode_force;
822 822
823 /* Set reasonable default timeout */ 823 /* Set reasonable default timeout */
824 dev->rdev->timeout = MS_TO_NS(150000); 824 dev->rdev->timeout = US_TO_NS(150000);
825} 825}
826 826
827/* Upload all hardware settings at once. Used at load and resume time */ 827/* Upload all hardware settings at once. Used at load and resume time */
@@ -1004,6 +1004,10 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
1004 /* validate resources */ 1004 /* validate resources */
1005 error = -ENODEV; 1005 error = -ENODEV;
1006 1006
1007 /* init these to -1, as 0 is valid for both */
1008 dev->hw_io = -1;
1009 dev->irq = -1;
1010
1007 if (!pnp_port_valid(pnp_dev, 0) || 1011 if (!pnp_port_valid(pnp_dev, 0) ||
1008 pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE) 1012 pnp_port_len(pnp_dev, 0) < ENE_IO_SIZE)
1009 goto error; 1013 goto error;
@@ -1072,6 +1076,8 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
1072 rdev->input_name = "ENE eHome Infrared Remote Transceiver"; 1076 rdev->input_name = "ENE eHome Infrared Remote Transceiver";
1073 } 1077 }
1074 1078
1079 dev->rdev = rdev;
1080
1075 ene_rx_setup_hw_buffer(dev); 1081 ene_rx_setup_hw_buffer(dev);
1076 ene_setup_default_settings(dev); 1082 ene_setup_default_settings(dev);
1077 ene_setup_hw_settings(dev); 1083 ene_setup_hw_settings(dev);
@@ -1083,7 +1089,6 @@ static int ene_probe(struct pnp_dev *pnp_dev, const struct pnp_device_id *id)
1083 if (error < 0) 1089 if (error < 0)
1084 goto error; 1090 goto error;
1085 1091
1086 dev->rdev = rdev;
1087 ene_notice("driver has been succesfully loaded"); 1092 ene_notice("driver has been succesfully loaded");
1088 return 0; 1093 return 0;
1089error: 1094error:
diff --git a/drivers/media/rc/ene_ir.h b/drivers/media/rc/ene_ir.h
index c179baf34cb4..337a41d4450b 100644
--- a/drivers/media/rc/ene_ir.h
+++ b/drivers/media/rc/ene_ir.h
@@ -201,8 +201,6 @@
201#define dbg_verbose(format, ...) __dbg(2, format, ## __VA_ARGS__) 201#define dbg_verbose(format, ...) __dbg(2, format, ## __VA_ARGS__)
202#define dbg_regs(format, ...) __dbg(3, format, ## __VA_ARGS__) 202#define dbg_regs(format, ...) __dbg(3, format, ## __VA_ARGS__)
203 203
204#define MS_TO_NS(msec) ((msec) * 1000)
205
206struct ene_device { 204struct ene_device {
207 struct pnp_dev *pnp_dev; 205 struct pnp_dev *pnp_dev;
208 struct rc_dev *rdev; 206 struct rc_dev *rdev;
diff --git a/drivers/media/rc/imon.c b/drivers/media/rc/imon.c
index 6811512b4e83..e7dc6b46fdfa 100644
--- a/drivers/media/rc/imon.c
+++ b/drivers/media/rc/imon.c
@@ -988,7 +988,6 @@ static int imon_ir_change_protocol(struct rc_dev *rc, u64 rc_type)
988 int retval; 988 int retval;
989 struct imon_context *ictx = rc->priv; 989 struct imon_context *ictx = rc->priv;
990 struct device *dev = ictx->dev; 990 struct device *dev = ictx->dev;
991 bool pad_mouse;
992 unsigned char ir_proto_packet[] = { 991 unsigned char ir_proto_packet[] = {
993 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86 }; 992 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86 };
994 993
@@ -1000,29 +999,20 @@ static int imon_ir_change_protocol(struct rc_dev *rc, u64 rc_type)
1000 case RC_TYPE_RC6: 999 case RC_TYPE_RC6:
1001 dev_dbg(dev, "Configuring IR receiver for MCE protocol\n"); 1000 dev_dbg(dev, "Configuring IR receiver for MCE protocol\n");
1002 ir_proto_packet[0] = 0x01; 1001 ir_proto_packet[0] = 0x01;
1003 pad_mouse = false;
1004 break; 1002 break;
1005 case RC_TYPE_UNKNOWN: 1003 case RC_TYPE_UNKNOWN:
1006 case RC_TYPE_OTHER: 1004 case RC_TYPE_OTHER:
1007 dev_dbg(dev, "Configuring IR receiver for iMON protocol\n"); 1005 dev_dbg(dev, "Configuring IR receiver for iMON protocol\n");
1008 if (pad_stabilize && !nomouse) 1006 if (!pad_stabilize)
1009 pad_mouse = true;
1010 else {
1011 dev_dbg(dev, "PAD stabilize functionality disabled\n"); 1007 dev_dbg(dev, "PAD stabilize functionality disabled\n");
1012 pad_mouse = false;
1013 }
1014 /* ir_proto_packet[0] = 0x00; // already the default */ 1008 /* ir_proto_packet[0] = 0x00; // already the default */
1015 rc_type = RC_TYPE_OTHER; 1009 rc_type = RC_TYPE_OTHER;
1016 break; 1010 break;
1017 default: 1011 default:
1018 dev_warn(dev, "Unsupported IR protocol specified, overriding " 1012 dev_warn(dev, "Unsupported IR protocol specified, overriding "
1019 "to iMON IR protocol\n"); 1013 "to iMON IR protocol\n");
1020 if (pad_stabilize && !nomouse) 1014 if (!pad_stabilize)
1021 pad_mouse = true;
1022 else {
1023 dev_dbg(dev, "PAD stabilize functionality disabled\n"); 1015 dev_dbg(dev, "PAD stabilize functionality disabled\n");
1024 pad_mouse = false;
1025 }
1026 /* ir_proto_packet[0] = 0x00; // already the default */ 1016 /* ir_proto_packet[0] = 0x00; // already the default */
1027 rc_type = RC_TYPE_OTHER; 1017 rc_type = RC_TYPE_OTHER;
1028 break; 1018 break;
@@ -1035,7 +1025,7 @@ static int imon_ir_change_protocol(struct rc_dev *rc, u64 rc_type)
1035 goto out; 1025 goto out;
1036 1026
1037 ictx->rc_type = rc_type; 1027 ictx->rc_type = rc_type;
1038 ictx->pad_mouse = pad_mouse; 1028 ictx->pad_mouse = false;
1039 1029
1040out: 1030out:
1041 return retval; 1031 return retval;
@@ -1517,7 +1507,7 @@ static void imon_incoming_packet(struct imon_context *ictx,
1517 spin_unlock_irqrestore(&ictx->kc_lock, flags); 1507 spin_unlock_irqrestore(&ictx->kc_lock, flags);
1518 return; 1508 return;
1519 } else { 1509 } else {
1520 ictx->pad_mouse = 0; 1510 ictx->pad_mouse = false;
1521 dev_dbg(dev, "mouse mode disabled, passing key value\n"); 1511 dev_dbg(dev, "mouse mode disabled, passing key value\n");
1522 } 1512 }
1523 } 1513 }
@@ -1756,7 +1746,6 @@ static void imon_get_ffdc_type(struct imon_context *ictx)
1756 printk(KERN_CONT " (id 0x%02x)\n", ffdc_cfg_byte); 1746 printk(KERN_CONT " (id 0x%02x)\n", ffdc_cfg_byte);
1757 1747
1758 ictx->display_type = detected_display_type; 1748 ictx->display_type = detected_display_type;
1759 ictx->rdev->allowed_protos = allowed_protos;
1760 ictx->rc_type = allowed_protos; 1749 ictx->rc_type = allowed_protos;
1761} 1750}
1762 1751
@@ -1839,10 +1828,6 @@ static struct rc_dev *imon_init_rdev(struct imon_context *ictx)
1839 rdev->allowed_protos = RC_TYPE_OTHER | RC_TYPE_RC6; /* iMON PAD or MCE */ 1828 rdev->allowed_protos = RC_TYPE_OTHER | RC_TYPE_RC6; /* iMON PAD or MCE */
1840 rdev->change_protocol = imon_ir_change_protocol; 1829 rdev->change_protocol = imon_ir_change_protocol;
1841 rdev->driver_name = MOD_NAME; 1830 rdev->driver_name = MOD_NAME;
1842 if (ictx->rc_type == RC_TYPE_RC6)
1843 rdev->map_name = RC_MAP_IMON_MCE;
1844 else
1845 rdev->map_name = RC_MAP_IMON_PAD;
1846 1831
1847 /* Enable front-panel buttons and/or knobs */ 1832 /* Enable front-panel buttons and/or knobs */
1848 memcpy(ictx->usb_tx_buf, &fp_packet, sizeof(fp_packet)); 1833 memcpy(ictx->usb_tx_buf, &fp_packet, sizeof(fp_packet));
@@ -1851,11 +1836,18 @@ static struct rc_dev *imon_init_rdev(struct imon_context *ictx)
1851 if (ret) 1836 if (ret)
1852 dev_info(ictx->dev, "panel buttons/knobs setup failed\n"); 1837 dev_info(ictx->dev, "panel buttons/knobs setup failed\n");
1853 1838
1854 if (ictx->product == 0xffdc) 1839 if (ictx->product == 0xffdc) {
1855 imon_get_ffdc_type(ictx); 1840 imon_get_ffdc_type(ictx);
1841 rdev->allowed_protos = ictx->rc_type;
1842 }
1856 1843
1857 imon_set_display_type(ictx); 1844 imon_set_display_type(ictx);
1858 1845
1846 if (ictx->rc_type == RC_TYPE_RC6)
1847 rdev->map_name = RC_MAP_IMON_MCE;
1848 else
1849 rdev->map_name = RC_MAP_IMON_PAD;
1850
1859 ret = rc_register_device(rdev); 1851 ret = rc_register_device(rdev);
1860 if (ret < 0) { 1852 if (ret < 0) {
1861 dev_err(ictx->dev, "remote input dev register failed\n"); 1853 dev_err(ictx->dev, "remote input dev register failed\n");
@@ -2108,18 +2100,6 @@ static struct imon_context *imon_init_intf0(struct usb_interface *intf)
2108 goto find_endpoint_failed; 2100 goto find_endpoint_failed;
2109 } 2101 }
2110 2102
2111 ictx->idev = imon_init_idev(ictx);
2112 if (!ictx->idev) {
2113 dev_err(dev, "%s: input device setup failed\n", __func__);
2114 goto idev_setup_failed;
2115 }
2116
2117 ictx->rdev = imon_init_rdev(ictx);
2118 if (!ictx->rdev) {
2119 dev_err(dev, "%s: rc device setup failed\n", __func__);
2120 goto rdev_setup_failed;
2121 }
2122
2123 usb_fill_int_urb(ictx->rx_urb_intf0, ictx->usbdev_intf0, 2103 usb_fill_int_urb(ictx->rx_urb_intf0, ictx->usbdev_intf0,
2124 usb_rcvintpipe(ictx->usbdev_intf0, 2104 usb_rcvintpipe(ictx->usbdev_intf0,
2125 ictx->rx_endpoint_intf0->bEndpointAddress), 2105 ictx->rx_endpoint_intf0->bEndpointAddress),
@@ -2133,13 +2113,25 @@ static struct imon_context *imon_init_intf0(struct usb_interface *intf)
2133 goto urb_submit_failed; 2113 goto urb_submit_failed;
2134 } 2114 }
2135 2115
2116 ictx->idev = imon_init_idev(ictx);
2117 if (!ictx->idev) {
2118 dev_err(dev, "%s: input device setup failed\n", __func__);
2119 goto idev_setup_failed;
2120 }
2121
2122 ictx->rdev = imon_init_rdev(ictx);
2123 if (!ictx->rdev) {
2124 dev_err(dev, "%s: rc device setup failed\n", __func__);
2125 goto rdev_setup_failed;
2126 }
2127
2136 return ictx; 2128 return ictx;
2137 2129
2138urb_submit_failed:
2139 rc_unregister_device(ictx->rdev);
2140rdev_setup_failed: 2130rdev_setup_failed:
2141 input_unregister_device(ictx->idev); 2131 input_unregister_device(ictx->idev);
2142idev_setup_failed: 2132idev_setup_failed:
2133 usb_kill_urb(ictx->rx_urb_intf0);
2134urb_submit_failed:
2143find_endpoint_failed: 2135find_endpoint_failed:
2144 mutex_unlock(&ictx->lock); 2136 mutex_unlock(&ictx->lock);
2145 usb_free_urb(tx_urb); 2137 usb_free_urb(tx_urb);
diff --git a/drivers/media/rc/ir-raw.c b/drivers/media/rc/ir-raw.c
index 185baddcbf14..73230ff93b8a 100644
--- a/drivers/media/rc/ir-raw.c
+++ b/drivers/media/rc/ir-raw.c
@@ -233,7 +233,7 @@ EXPORT_SYMBOL_GPL(ir_raw_event_handle);
233 233
234/* used internally by the sysfs interface */ 234/* used internally by the sysfs interface */
235u64 235u64
236ir_raw_get_allowed_protocols() 236ir_raw_get_allowed_protocols(void)
237{ 237{
238 u64 protocols; 238 u64 protocols;
239 mutex_lock(&ir_raw_handler_lock); 239 mutex_lock(&ir_raw_handler_lock);
diff --git a/drivers/media/rc/keymaps/rc-dib0700-nec.c b/drivers/media/rc/keymaps/rc-dib0700-nec.c
index c59851b203da..7a5f5300caf9 100644
--- a/drivers/media/rc/keymaps/rc-dib0700-nec.c
+++ b/drivers/media/rc/keymaps/rc-dib0700-nec.c
@@ -19,35 +19,35 @@
19 19
20static struct rc_map_table dib0700_nec_table[] = { 20static struct rc_map_table dib0700_nec_table[] = {
21 /* Key codes for the Pixelview SBTVD remote */ 21 /* Key codes for the Pixelview SBTVD remote */
22 { 0x8613, KEY_MUTE }, 22 { 0x866b13, KEY_MUTE },
23 { 0x8612, KEY_POWER }, 23 { 0x866b12, KEY_POWER },
24 { 0x8601, KEY_1 }, 24 { 0x866b01, KEY_1 },
25 { 0x8602, KEY_2 }, 25 { 0x866b02, KEY_2 },
26 { 0x8603, KEY_3 }, 26 { 0x866b03, KEY_3 },
27 { 0x8604, KEY_4 }, 27 { 0x866b04, KEY_4 },
28 { 0x8605, KEY_5 }, 28 { 0x866b05, KEY_5 },
29 { 0x8606, KEY_6 }, 29 { 0x866b06, KEY_6 },
30 { 0x8607, KEY_7 }, 30 { 0x866b07, KEY_7 },
31 { 0x8608, KEY_8 }, 31 { 0x866b08, KEY_8 },
32 { 0x8609, KEY_9 }, 32 { 0x866b09, KEY_9 },
33 { 0x8600, KEY_0 }, 33 { 0x866b00, KEY_0 },
34 { 0x860d, KEY_CHANNELUP }, 34 { 0x866b0d, KEY_CHANNELUP },
35 { 0x8619, KEY_CHANNELDOWN }, 35 { 0x866b19, KEY_CHANNELDOWN },
36 { 0x8610, KEY_VOLUMEUP }, 36 { 0x866b10, KEY_VOLUMEUP },
37 { 0x860c, KEY_VOLUMEDOWN }, 37 { 0x866b0c, KEY_VOLUMEDOWN },
38 38
39 { 0x860a, KEY_CAMERA }, 39 { 0x866b0a, KEY_CAMERA },
40 { 0x860b, KEY_ZOOM }, 40 { 0x866b0b, KEY_ZOOM },
41 { 0x861b, KEY_BACKSPACE }, 41 { 0x866b1b, KEY_BACKSPACE },
42 { 0x8615, KEY_ENTER }, 42 { 0x866b15, KEY_ENTER },
43 43
44 { 0x861d, KEY_UP }, 44 { 0x866b1d, KEY_UP },
45 { 0x861e, KEY_DOWN }, 45 { 0x866b1e, KEY_DOWN },
46 { 0x860e, KEY_LEFT }, 46 { 0x866b0e, KEY_LEFT },
47 { 0x860f, KEY_RIGHT }, 47 { 0x866b0f, KEY_RIGHT },
48 48
49 { 0x8618, KEY_RECORD }, 49 { 0x866b18, KEY_RECORD },
50 { 0x861a, KEY_STOP }, 50 { 0x866b1a, KEY_STOP },
51 51
52 /* Key codes for the EvolutePC TVWay+ remote */ 52 /* Key codes for the EvolutePC TVWay+ remote */
53 { 0x7a00, KEY_MENU }, 53 { 0x7a00, KEY_MENU },
diff --git a/drivers/media/rc/mceusb.c b/drivers/media/rc/mceusb.c
index 0fef6efad537..079353e5d558 100644
--- a/drivers/media/rc/mceusb.c
+++ b/drivers/media/rc/mceusb.c
@@ -48,7 +48,6 @@
48#define USB_BUFLEN 32 /* USB reception buffer length */ 48#define USB_BUFLEN 32 /* USB reception buffer length */
49#define USB_CTRL_MSG_SZ 2 /* Size of usb ctrl msg on gen1 hw */ 49#define USB_CTRL_MSG_SZ 2 /* Size of usb ctrl msg on gen1 hw */
50#define MCE_G1_INIT_MSGS 40 /* Init messages on gen1 hw to throw out */ 50#define MCE_G1_INIT_MSGS 40 /* Init messages on gen1 hw to throw out */
51#define MS_TO_NS(msec) ((msec) * 1000)
52 51
53/* MCE constants */ 52/* MCE constants */
54#define MCE_CMDBUF_SIZE 384 /* MCE Command buffer length */ 53#define MCE_CMDBUF_SIZE 384 /* MCE Command buffer length */
@@ -858,7 +857,7 @@ static void mceusb_process_ir_data(struct mceusb_dev *ir, int buf_len)
858 ir->rem--; 857 ir->rem--;
859 rawir.pulse = ((ir->buf_in[i] & MCE_PULSE_BIT) != 0); 858 rawir.pulse = ((ir->buf_in[i] & MCE_PULSE_BIT) != 0);
860 rawir.duration = (ir->buf_in[i] & MCE_PULSE_MASK) 859 rawir.duration = (ir->buf_in[i] & MCE_PULSE_MASK)
861 * MS_TO_NS(MCE_TIME_UNIT); 860 * MS_TO_US(MCE_TIME_UNIT);
862 861
863 dev_dbg(ir->dev, "Storing %s with duration %d\n", 862 dev_dbg(ir->dev, "Storing %s with duration %d\n",
864 rawir.pulse ? "pulse" : "space", 863 rawir.pulse ? "pulse" : "space",
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index eb875af05e79..aa021600e9df 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -78,7 +78,7 @@ config VIDEO_FIXED_MINOR_RANGES
78 78
79config VIDEO_HELPER_CHIPS_AUTO 79config VIDEO_HELPER_CHIPS_AUTO
80 bool "Autoselect pertinent encoders/decoders and other helper chips" 80 bool "Autoselect pertinent encoders/decoders and other helper chips"
81 default y if !EMBEDDED 81 default y if !EXPERT
82 ---help--- 82 ---help---
83 Most video cards may require additional modules to encode or 83 Most video cards may require additional modules to encode or
84 decode audio/video standards. This option will autoselect 84 decode audio/video standards. This option will autoselect
@@ -141,15 +141,6 @@ config VIDEO_TDA9840
141 To compile this driver as a module, choose M here: the 141 To compile this driver as a module, choose M here: the
142 module will be called tda9840. 142 module will be called tda9840.
143 143
144config VIDEO_TDA9875
145 tristate "Philips TDA9875 audio processor"
146 depends on VIDEO_V4L2 && I2C
147 ---help---
148 Support for tda9875 audio decoder chip found on some bt8xx boards.
149
150 To compile this driver as a module, choose M here: the
151 module will be called tda9875.
152
153config VIDEO_TEA6415C 144config VIDEO_TEA6415C
154 tristate "Philips TEA6415C audio processor" 145 tristate "Philips TEA6415C audio processor"
155 depends on I2C 146 depends on I2C
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index 81e38cb0b846..a509d317e258 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -27,7 +27,6 @@ obj-$(CONFIG_VIDEO_V4L2_COMMON) += v4l2-common.o
27obj-$(CONFIG_VIDEO_TUNER) += tuner.o 27obj-$(CONFIG_VIDEO_TUNER) += tuner.o
28obj-$(CONFIG_VIDEO_TVAUDIO) += tvaudio.o 28obj-$(CONFIG_VIDEO_TVAUDIO) += tvaudio.o
29obj-$(CONFIG_VIDEO_TDA7432) += tda7432.o 29obj-$(CONFIG_VIDEO_TDA7432) += tda7432.o
30obj-$(CONFIG_VIDEO_TDA9875) += tda9875.o
31obj-$(CONFIG_VIDEO_SAA6588) += saa6588.o 30obj-$(CONFIG_VIDEO_SAA6588) += saa6588.o
32obj-$(CONFIG_VIDEO_TDA9840) += tda9840.o 31obj-$(CONFIG_VIDEO_TDA9840) += tda9840.o
33obj-$(CONFIG_VIDEO_TEA6415C) += tea6415c.o 32obj-$(CONFIG_VIDEO_TEA6415C) += tea6415c.o
diff --git a/drivers/media/video/adv7175.c b/drivers/media/video/adv7175.c
index f318b51448b3..d2327dbb473f 100644
--- a/drivers/media/video/adv7175.c
+++ b/drivers/media/video/adv7175.c
@@ -303,11 +303,22 @@ static int adv7175_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ide
303 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7175, 0); 303 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7175, 0);
304} 304}
305 305
306static int adv7175_s_power(struct v4l2_subdev *sd, int on)
307{
308 if (on)
309 adv7175_write(sd, 0x01, 0x00);
310 else
311 adv7175_write(sd, 0x01, 0x78);
312
313 return 0;
314}
315
306/* ----------------------------------------------------------------------- */ 316/* ----------------------------------------------------------------------- */
307 317
308static const struct v4l2_subdev_core_ops adv7175_core_ops = { 318static const struct v4l2_subdev_core_ops adv7175_core_ops = {
309 .g_chip_ident = adv7175_g_chip_ident, 319 .g_chip_ident = adv7175_g_chip_ident,
310 .init = adv7175_init, 320 .init = adv7175_init,
321 .s_power = adv7175_s_power,
311}; 322};
312 323
313static const struct v4l2_subdev_video_ops adv7175_video_ops = { 324static const struct v4l2_subdev_video_ops adv7175_video_ops = {
diff --git a/drivers/media/video/bt8xx/bttv-cards.c b/drivers/media/video/bt8xx/bttv-cards.c
index 49efcf660ba6..7f58756d72c8 100644
--- a/drivers/media/video/bt8xx/bttv-cards.c
+++ b/drivers/media/video/bt8xx/bttv-cards.c
@@ -1373,7 +1373,6 @@ struct tvcard bttv_tvcards[] = {
1373 .gpiomute = 0x1800, 1373 .gpiomute = 0x1800,
1374 .audio_mode_gpio= fv2000s_audio, 1374 .audio_mode_gpio= fv2000s_audio,
1375 .no_msp34xx = 1, 1375 .no_msp34xx = 1,
1376 .no_tda9875 = 1,
1377 .needs_tvaudio = 1, 1376 .needs_tvaudio = 1,
1378 .pll = PLL_28, 1377 .pll = PLL_28,
1379 .tuner_type = TUNER_PHILIPS_PAL, 1378 .tuner_type = TUNER_PHILIPS_PAL,
@@ -1511,7 +1510,6 @@ struct tvcard bttv_tvcards[] = {
1511 .gpiomute = 0x09, 1510 .gpiomute = 0x09,
1512 .needs_tvaudio = 1, 1511 .needs_tvaudio = 1,
1513 .no_msp34xx = 1, 1512 .no_msp34xx = 1,
1514 .no_tda9875 = 1,
1515 .pll = PLL_28, 1513 .pll = PLL_28,
1516 .tuner_type = TUNER_PHILIPS_PAL, 1514 .tuner_type = TUNER_PHILIPS_PAL,
1517 .tuner_addr = ADDR_UNSET, 1515 .tuner_addr = ADDR_UNSET,
@@ -1550,7 +1548,6 @@ struct tvcard bttv_tvcards[] = {
1550 .gpiomask2 = 0x07ff, 1548 .gpiomask2 = 0x07ff,
1551 .muxsel = MUXSEL(3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3), 1549 .muxsel = MUXSEL(3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3),
1552 .no_msp34xx = 1, 1550 .no_msp34xx = 1,
1553 .no_tda9875 = 1,
1554 .tuner_type = TUNER_ABSENT, 1551 .tuner_type = TUNER_ABSENT,
1555 .tuner_addr = ADDR_UNSET, 1552 .tuner_addr = ADDR_UNSET,
1556 .muxsel_hook = rv605_muxsel, 1553 .muxsel_hook = rv605_muxsel,
@@ -1686,7 +1683,6 @@ struct tvcard bttv_tvcards[] = {
1686 .tuner_type = TUNER_ABSENT, 1683 .tuner_type = TUNER_ABSENT,
1687 .tuner_addr = ADDR_UNSET, 1684 .tuner_addr = ADDR_UNSET,
1688 .no_msp34xx = 1, 1685 .no_msp34xx = 1,
1689 .no_tda9875 = 1,
1690 .no_tda7432 = 1, 1686 .no_tda7432 = 1,
1691 }, 1687 },
1692 [BTTV_BOARD_OSPREY1x0_848] = { 1688 [BTTV_BOARD_OSPREY1x0_848] = {
@@ -1699,7 +1695,6 @@ struct tvcard bttv_tvcards[] = {
1699 .tuner_type = TUNER_ABSENT, 1695 .tuner_type = TUNER_ABSENT,
1700 .tuner_addr = ADDR_UNSET, 1696 .tuner_addr = ADDR_UNSET,
1701 .no_msp34xx = 1, 1697 .no_msp34xx = 1,
1702 .no_tda9875 = 1,
1703 .no_tda7432 = 1, 1698 .no_tda7432 = 1,
1704 }, 1699 },
1705 1700
@@ -1714,7 +1709,6 @@ struct tvcard bttv_tvcards[] = {
1714 .tuner_type = TUNER_ABSENT, 1709 .tuner_type = TUNER_ABSENT,
1715 .tuner_addr = ADDR_UNSET, 1710 .tuner_addr = ADDR_UNSET,
1716 .no_msp34xx = 1, 1711 .no_msp34xx = 1,
1717 .no_tda9875 = 1,
1718 .no_tda7432 = 1, 1712 .no_tda7432 = 1,
1719 }, 1713 },
1720 [BTTV_BOARD_OSPREY1x1] = { 1714 [BTTV_BOARD_OSPREY1x1] = {
@@ -1727,7 +1721,6 @@ struct tvcard bttv_tvcards[] = {
1727 .tuner_type = TUNER_ABSENT, 1721 .tuner_type = TUNER_ABSENT,
1728 .tuner_addr = ADDR_UNSET, 1722 .tuner_addr = ADDR_UNSET,
1729 .no_msp34xx = 1, 1723 .no_msp34xx = 1,
1730 .no_tda9875 = 1,
1731 .no_tda7432 = 1, 1724 .no_tda7432 = 1,
1732 }, 1725 },
1733 [BTTV_BOARD_OSPREY1x1_SVID] = { 1726 [BTTV_BOARD_OSPREY1x1_SVID] = {
@@ -1740,7 +1733,6 @@ struct tvcard bttv_tvcards[] = {
1740 .tuner_type = TUNER_ABSENT, 1733 .tuner_type = TUNER_ABSENT,
1741 .tuner_addr = ADDR_UNSET, 1734 .tuner_addr = ADDR_UNSET,
1742 .no_msp34xx = 1, 1735 .no_msp34xx = 1,
1743 .no_tda9875 = 1,
1744 .no_tda7432 = 1, 1736 .no_tda7432 = 1,
1745 }, 1737 },
1746 [BTTV_BOARD_OSPREY2xx] = { 1738 [BTTV_BOARD_OSPREY2xx] = {
@@ -1753,7 +1745,6 @@ struct tvcard bttv_tvcards[] = {
1753 .tuner_type = TUNER_ABSENT, 1745 .tuner_type = TUNER_ABSENT,
1754 .tuner_addr = ADDR_UNSET, 1746 .tuner_addr = ADDR_UNSET,
1755 .no_msp34xx = 1, 1747 .no_msp34xx = 1,
1756 .no_tda9875 = 1,
1757 .no_tda7432 = 1, 1748 .no_tda7432 = 1,
1758 }, 1749 },
1759 1750
@@ -1768,7 +1759,6 @@ struct tvcard bttv_tvcards[] = {
1768 .tuner_type = TUNER_ABSENT, 1759 .tuner_type = TUNER_ABSENT,
1769 .tuner_addr = ADDR_UNSET, 1760 .tuner_addr = ADDR_UNSET,
1770 .no_msp34xx = 1, 1761 .no_msp34xx = 1,
1771 .no_tda9875 = 1,
1772 .no_tda7432 = 1, 1762 .no_tda7432 = 1,
1773 }, 1763 },
1774 [BTTV_BOARD_OSPREY2x0] = { 1764 [BTTV_BOARD_OSPREY2x0] = {
@@ -1781,7 +1771,6 @@ struct tvcard bttv_tvcards[] = {
1781 .tuner_type = TUNER_ABSENT, 1771 .tuner_type = TUNER_ABSENT,
1782 .tuner_addr = ADDR_UNSET, 1772 .tuner_addr = ADDR_UNSET,
1783 .no_msp34xx = 1, 1773 .no_msp34xx = 1,
1784 .no_tda9875 = 1,
1785 .no_tda7432 = 1, 1774 .no_tda7432 = 1,
1786 }, 1775 },
1787 [BTTV_BOARD_OSPREY500] = { 1776 [BTTV_BOARD_OSPREY500] = {
@@ -1794,7 +1783,6 @@ struct tvcard bttv_tvcards[] = {
1794 .tuner_type = TUNER_ABSENT, 1783 .tuner_type = TUNER_ABSENT,
1795 .tuner_addr = ADDR_UNSET, 1784 .tuner_addr = ADDR_UNSET,
1796 .no_msp34xx = 1, 1785 .no_msp34xx = 1,
1797 .no_tda9875 = 1,
1798 .no_tda7432 = 1, 1786 .no_tda7432 = 1,
1799 }, 1787 },
1800 [BTTV_BOARD_OSPREY540] = { 1788 [BTTV_BOARD_OSPREY540] = {
@@ -1805,7 +1793,6 @@ struct tvcard bttv_tvcards[] = {
1805 .tuner_type = TUNER_ABSENT, 1793 .tuner_type = TUNER_ABSENT,
1806 .tuner_addr = ADDR_UNSET, 1794 .tuner_addr = ADDR_UNSET,
1807 .no_msp34xx = 1, 1795 .no_msp34xx = 1,
1808 .no_tda9875 = 1,
1809 .no_tda7432 = 1, 1796 .no_tda7432 = 1,
1810 }, 1797 },
1811 1798
@@ -1820,7 +1807,6 @@ struct tvcard bttv_tvcards[] = {
1820 .tuner_type = TUNER_ABSENT, 1807 .tuner_type = TUNER_ABSENT,
1821 .tuner_addr = ADDR_UNSET, 1808 .tuner_addr = ADDR_UNSET,
1822 .no_msp34xx = 1, 1809 .no_msp34xx = 1,
1823 .no_tda9875 = 1,
1824 .no_tda7432 = 1, /* must avoid, conflicts with the bt860 */ 1810 .no_tda7432 = 1, /* must avoid, conflicts with the bt860 */
1825 }, 1811 },
1826 [BTTV_BOARD_IDS_EAGLE] = { 1812 [BTTV_BOARD_IDS_EAGLE] = {
@@ -1835,7 +1821,6 @@ struct tvcard bttv_tvcards[] = {
1835 .muxsel = MUXSEL(2, 2, 2, 2), 1821 .muxsel = MUXSEL(2, 2, 2, 2),
1836 .muxsel_hook = eagle_muxsel, 1822 .muxsel_hook = eagle_muxsel,
1837 .no_msp34xx = 1, 1823 .no_msp34xx = 1,
1838 .no_tda9875 = 1,
1839 .pll = PLL_28, 1824 .pll = PLL_28,
1840 }, 1825 },
1841 [BTTV_BOARD_PINNACLESAT] = { 1826 [BTTV_BOARD_PINNACLESAT] = {
@@ -1846,7 +1831,6 @@ struct tvcard bttv_tvcards[] = {
1846 .tuner_type = TUNER_ABSENT, 1831 .tuner_type = TUNER_ABSENT,
1847 .tuner_addr = ADDR_UNSET, 1832 .tuner_addr = ADDR_UNSET,
1848 .no_msp34xx = 1, 1833 .no_msp34xx = 1,
1849 .no_tda9875 = 1,
1850 .no_tda7432 = 1, 1834 .no_tda7432 = 1,
1851 .muxsel = MUXSEL(3, 1), 1835 .muxsel = MUXSEL(3, 1),
1852 .pll = PLL_28, 1836 .pll = PLL_28,
@@ -1897,7 +1881,6 @@ struct tvcard bttv_tvcards[] = {
1897 .svhs = 2, 1881 .svhs = 2,
1898 .gpiomask = 0, 1882 .gpiomask = 0,
1899 .no_msp34xx = 1, 1883 .no_msp34xx = 1,
1900 .no_tda9875 = 1,
1901 .no_tda7432 = 1, 1884 .no_tda7432 = 1,
1902 .muxsel = MUXSEL(2, 0, 1), 1885 .muxsel = MUXSEL(2, 0, 1),
1903 .pll = PLL_28, 1886 .pll = PLL_28,
@@ -1970,7 +1953,6 @@ struct tvcard bttv_tvcards[] = {
1970 /* Tuner, CVid, SVid, CVid over SVid connector */ 1953 /* Tuner, CVid, SVid, CVid over SVid connector */
1971 .muxsel = MUXSEL(2, 3, 1, 1), 1954 .muxsel = MUXSEL(2, 3, 1, 1),
1972 .gpiomask = 0, 1955 .gpiomask = 0,
1973 .no_tda9875 = 1,
1974 .no_tda7432 = 1, 1956 .no_tda7432 = 1,
1975 .tuner_type = TUNER_PHILIPS_PAL_I, 1957 .tuner_type = TUNER_PHILIPS_PAL_I,
1976 .tuner_addr = ADDR_UNSET, 1958 .tuner_addr = ADDR_UNSET,
@@ -2017,7 +1999,6 @@ struct tvcard bttv_tvcards[] = {
2017 .muxsel = MUXSEL(2,2,2,2, 3,3,3,3, 1,1,1,1, 0,0,0,0), 1999 .muxsel = MUXSEL(2,2,2,2, 3,3,3,3, 1,1,1,1, 0,0,0,0),
2018 .muxsel_hook = xguard_muxsel, 2000 .muxsel_hook = xguard_muxsel,
2019 .no_msp34xx = 1, 2001 .no_msp34xx = 1,
2020 .no_tda9875 = 1,
2021 .no_tda7432 = 1, 2002 .no_tda7432 = 1,
2022 .pll = PLL_28, 2003 .pll = PLL_28,
2023 }, 2004 },
@@ -2029,7 +2010,6 @@ struct tvcard bttv_tvcards[] = {
2029 .svhs = NO_SVHS, 2010 .svhs = NO_SVHS,
2030 .muxsel = MUXSEL(2, 3, 1, 0), 2011 .muxsel = MUXSEL(2, 3, 1, 0),
2031 .no_msp34xx = 1, 2012 .no_msp34xx = 1,
2032 .no_tda9875 = 1,
2033 .no_tda7432 = 1, 2013 .no_tda7432 = 1,
2034 .pll = PLL_28, 2014 .pll = PLL_28,
2035 .tuner_type = TUNER_ABSENT, 2015 .tuner_type = TUNER_ABSENT,
@@ -2134,7 +2114,6 @@ struct tvcard bttv_tvcards[] = {
2134 .svhs = NO_SVHS, /* card has no svhs */ 2114 .svhs = NO_SVHS, /* card has no svhs */
2135 .needs_tvaudio = 0, 2115 .needs_tvaudio = 0,
2136 .no_msp34xx = 1, 2116 .no_msp34xx = 1,
2137 .no_tda9875 = 1,
2138 .no_tda7432 = 1, 2117 .no_tda7432 = 1,
2139 .gpiomask = 0x00, 2118 .gpiomask = 0x00,
2140 .muxsel = MUXSEL(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0), 2119 .muxsel = MUXSEL(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0),
@@ -2156,7 +2135,6 @@ struct tvcard bttv_tvcards[] = {
2156 [BTTV_BOARD_TWINHAN_DST] = { 2135 [BTTV_BOARD_TWINHAN_DST] = {
2157 .name = "Twinhan DST + clones", 2136 .name = "Twinhan DST + clones",
2158 .no_msp34xx = 1, 2137 .no_msp34xx = 1,
2159 .no_tda9875 = 1,
2160 .no_tda7432 = 1, 2138 .no_tda7432 = 1,
2161 .tuner_type = TUNER_ABSENT, 2139 .tuner_type = TUNER_ABSENT,
2162 .tuner_addr = ADDR_UNSET, 2140 .tuner_addr = ADDR_UNSET,
@@ -2171,7 +2149,6 @@ struct tvcard bttv_tvcards[] = {
2171 /* Vid In, SVid In, Vid over SVid in connector */ 2149 /* Vid In, SVid In, Vid over SVid in connector */
2172 .muxsel = MUXSEL(3, 1, 1, 3), 2150 .muxsel = MUXSEL(3, 1, 1, 3),
2173 .no_msp34xx = 1, 2151 .no_msp34xx = 1,
2174 .no_tda9875 = 1,
2175 .no_tda7432 = 1, 2152 .no_tda7432 = 1,
2176 .tuner_type = TUNER_ABSENT, 2153 .tuner_type = TUNER_ABSENT,
2177 .tuner_addr = ADDR_UNSET, 2154 .tuner_addr = ADDR_UNSET,
@@ -2226,7 +2203,6 @@ struct tvcard bttv_tvcards[] = {
2226 .svhs = NO_SVHS, 2203 .svhs = NO_SVHS,
2227 .muxsel = MUXSEL(2, 3, 1, 0), 2204 .muxsel = MUXSEL(2, 3, 1, 0),
2228 .no_msp34xx = 1, 2205 .no_msp34xx = 1,
2229 .no_tda9875 = 1,
2230 .no_tda7432 = 1, 2206 .no_tda7432 = 1,
2231 .needs_tvaudio = 0, 2207 .needs_tvaudio = 0,
2232 .tuner_type = TUNER_ABSENT, 2208 .tuner_type = TUNER_ABSENT,
@@ -2278,7 +2254,6 @@ struct tvcard bttv_tvcards[] = {
2278 .gpiomask = 0, 2254 .gpiomask = 0,
2279 .gpiomask2 = 0x3C<<16,/*Set the GPIO[18]->GPIO[21] as output pin.==> drive the video inputs through analog multiplexers*/ 2255 .gpiomask2 = 0x3C<<16,/*Set the GPIO[18]->GPIO[21] as output pin.==> drive the video inputs through analog multiplexers*/
2280 .no_msp34xx = 1, 2256 .no_msp34xx = 1,
2281 .no_tda9875 = 1,
2282 .no_tda7432 = 1, 2257 .no_tda7432 = 1,
2283 /*878A input is always MUX0, see above.*/ 2258 /*878A input is always MUX0, see above.*/
2284 .muxsel = MUXSEL(2, 2, 2, 2), 2259 .muxsel = MUXSEL(2, 2, 2, 2),
@@ -2302,7 +2277,6 @@ struct tvcard bttv_tvcards[] = {
2302 .tuner_type = TUNER_TEMIC_PAL, 2277 .tuner_type = TUNER_TEMIC_PAL,
2303 .tuner_addr = ADDR_UNSET, 2278 .tuner_addr = ADDR_UNSET,
2304 .no_msp34xx = 1, 2279 .no_msp34xx = 1,
2305 .no_tda9875 = 1,
2306 }, 2280 },
2307 [BTTV_BOARD_AVDVBT_771] = { 2281 [BTTV_BOARD_AVDVBT_771] = {
2308 /* Wolfram Joost <wojo@frokaschwei.de> */ 2282 /* Wolfram Joost <wojo@frokaschwei.de> */
@@ -2313,7 +2287,6 @@ struct tvcard bttv_tvcards[] = {
2313 .tuner_addr = ADDR_UNSET, 2287 .tuner_addr = ADDR_UNSET,
2314 .muxsel = MUXSEL(3, 3), 2288 .muxsel = MUXSEL(3, 3),
2315 .no_msp34xx = 1, 2289 .no_msp34xx = 1,
2316 .no_tda9875 = 1,
2317 .no_tda7432 = 1, 2290 .no_tda7432 = 1,
2318 .pll = PLL_28, 2291 .pll = PLL_28,
2319 .has_dvb = 1, 2292 .has_dvb = 1,
@@ -2329,7 +2302,6 @@ struct tvcard bttv_tvcards[] = {
2329 .svhs = 1, 2302 .svhs = 1,
2330 .muxsel = MUXSEL(3, 1, 2, 0), /* Comp0, S-Video, ?, ? */ 2303 .muxsel = MUXSEL(3, 1, 2, 0), /* Comp0, S-Video, ?, ? */
2331 .no_msp34xx = 1, 2304 .no_msp34xx = 1,
2332 .no_tda9875 = 1,
2333 .no_tda7432 = 1, 2305 .no_tda7432 = 1,
2334 .pll = PLL_28, 2306 .pll = PLL_28,
2335 .tuner_type = TUNER_ABSENT, 2307 .tuner_type = TUNER_ABSENT,
@@ -2393,7 +2365,6 @@ struct tvcard bttv_tvcards[] = {
2393 /* Chris Pascoe <c.pascoe@itee.uq.edu.au> */ 2365 /* Chris Pascoe <c.pascoe@itee.uq.edu.au> */
2394 .name = "DViCO FusionHDTV DVB-T Lite", 2366 .name = "DViCO FusionHDTV DVB-T Lite",
2395 .no_msp34xx = 1, 2367 .no_msp34xx = 1,
2396 .no_tda9875 = 1,
2397 .no_tda7432 = 1, 2368 .no_tda7432 = 1,
2398 .pll = PLL_28, 2369 .pll = PLL_28,
2399 .no_video = 1, 2370 .no_video = 1,
@@ -2440,7 +2411,6 @@ struct tvcard bttv_tvcards[] = {
2440 .muxsel = MUXSEL(2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2), 2411 .muxsel = MUXSEL(2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2),
2441 .pll = PLL_28, 2412 .pll = PLL_28,
2442 .no_msp34xx = 1, 2413 .no_msp34xx = 1,
2443 .no_tda9875 = 1,
2444 .no_tda7432 = 1, 2414 .no_tda7432 = 1,
2445 .tuner_type = TUNER_ABSENT, 2415 .tuner_type = TUNER_ABSENT,
2446 .tuner_addr = ADDR_UNSET, 2416 .tuner_addr = ADDR_UNSET,
@@ -2478,7 +2448,6 @@ struct tvcard bttv_tvcards[] = {
2478 .pll = PLL_28, 2448 .pll = PLL_28,
2479 .no_msp34xx = 1, 2449 .no_msp34xx = 1,
2480 .no_tda7432 = 1, 2450 .no_tda7432 = 1,
2481 .no_tda9875 = 1,
2482 .muxsel_hook = kodicom4400r_muxsel, 2451 .muxsel_hook = kodicom4400r_muxsel,
2483 }, 2452 },
2484 [BTTV_BOARD_KODICOM_4400R_SL] = { 2453 [BTTV_BOARD_KODICOM_4400R_SL] = {
@@ -2500,7 +2469,6 @@ struct tvcard bttv_tvcards[] = {
2500 .pll = PLL_28, 2469 .pll = PLL_28,
2501 .no_msp34xx = 1, 2470 .no_msp34xx = 1,
2502 .no_tda7432 = 1, 2471 .no_tda7432 = 1,
2503 .no_tda9875 = 1,
2504 .muxsel_hook = kodicom4400r_muxsel, 2472 .muxsel_hook = kodicom4400r_muxsel,
2505 }, 2473 },
2506 /* ---- card 0x86---------------------------------- */ 2474 /* ---- card 0x86---------------------------------- */
@@ -2530,7 +2498,6 @@ struct tvcard bttv_tvcards[] = {
2530 .gpiomux = { 0x00400005, 0, 0x00000001, 0 }, 2498 .gpiomux = { 0x00400005, 0, 0x00000001, 0 },
2531 .gpiomute = 0x00c00007, 2499 .gpiomute = 0x00c00007,
2532 .no_msp34xx = 1, 2500 .no_msp34xx = 1,
2533 .no_tda9875 = 1,
2534 .no_tda7432 = 1, 2501 .no_tda7432 = 1,
2535 .has_dvb = 1, 2502 .has_dvb = 1,
2536 }, 2503 },
@@ -2630,7 +2597,6 @@ struct tvcard bttv_tvcards[] = {
2630 .tuner_type = TUNER_ABSENT, 2597 .tuner_type = TUNER_ABSENT,
2631 .tuner_addr = ADDR_UNSET, 2598 .tuner_addr = ADDR_UNSET,
2632 .no_msp34xx = 1, 2599 .no_msp34xx = 1,
2633 .no_tda9875 = 1,
2634 .no_tda7432 = 1, 2600 .no_tda7432 = 1,
2635 }, 2601 },
2636 /* ---- card 0x8d ---------------------------------- */ 2602 /* ---- card 0x8d ---------------------------------- */
@@ -2658,7 +2624,6 @@ struct tvcard bttv_tvcards[] = {
2658 .muxsel = MUXSEL(2, 3, 1, 1), 2624 .muxsel = MUXSEL(2, 3, 1, 1),
2659 .gpiomux = { 100000, 100002, 100002, 100000 }, 2625 .gpiomux = { 100000, 100002, 100002, 100000 },
2660 .no_msp34xx = 1, 2626 .no_msp34xx = 1,
2661 .no_tda9875 = 1,
2662 .no_tda7432 = 1, 2627 .no_tda7432 = 1,
2663 .pll = PLL_28, 2628 .pll = PLL_28,
2664 .tuner_type = TUNER_TNF_5335MF, 2629 .tuner_type = TUNER_TNF_5335MF,
@@ -2674,7 +2639,6 @@ struct tvcard bttv_tvcards[] = {
2674 .gpiomask = 0x0f, /* old: 7 */ 2639 .gpiomask = 0x0f, /* old: 7 */
2675 .muxsel = MUXSEL(0, 1, 3, 2), /* Composite 0-3 */ 2640 .muxsel = MUXSEL(0, 1, 3, 2), /* Composite 0-3 */
2676 .no_msp34xx = 1, 2641 .no_msp34xx = 1,
2677 .no_tda9875 = 1,
2678 .no_tda7432 = 1, 2642 .no_tda7432 = 1,
2679 .tuner_type = TUNER_ABSENT, 2643 .tuner_type = TUNER_ABSENT,
2680 .tuner_addr = ADDR_UNSET, 2644 .tuner_addr = ADDR_UNSET,
@@ -2732,7 +2696,6 @@ struct tvcard bttv_tvcards[] = {
2732 .gpiomux = { 0x00400005, 0, 0x00000001, 0 }, 2696 .gpiomux = { 0x00400005, 0, 0x00000001, 0 },
2733 .gpiomute = 0x00c00007, 2697 .gpiomute = 0x00c00007,
2734 .no_msp34xx = 1, 2698 .no_msp34xx = 1,
2735 .no_tda9875 = 1,
2736 .no_tda7432 = 1, 2699 .no_tda7432 = 1,
2737 }, 2700 },
2738 /* ---- card 0x95---------------------------------- */ 2701 /* ---- card 0x95---------------------------------- */
@@ -2874,7 +2837,6 @@ struct tvcard bttv_tvcards[] = {
2874 .pll = PLL_28, 2837 .pll = PLL_28,
2875 .no_msp34xx = 1, 2838 .no_msp34xx = 1,
2876 .no_tda7432 = 1, 2839 .no_tda7432 = 1,
2877 .no_tda9875 = 1,
2878 .muxsel_hook = gv800s_muxsel, 2840 .muxsel_hook = gv800s_muxsel,
2879 }, 2841 },
2880 [BTTV_BOARD_GEOVISION_GV800S_SL] = { 2842 [BTTV_BOARD_GEOVISION_GV800S_SL] = {
@@ -2899,7 +2861,6 @@ struct tvcard bttv_tvcards[] = {
2899 .pll = PLL_28, 2861 .pll = PLL_28,
2900 .no_msp34xx = 1, 2862 .no_msp34xx = 1,
2901 .no_tda7432 = 1, 2863 .no_tda7432 = 1,
2902 .no_tda9875 = 1,
2903 .muxsel_hook = gv800s_muxsel, 2864 .muxsel_hook = gv800s_muxsel,
2904 }, 2865 },
2905 [BTTV_BOARD_PV183] = { 2866 [BTTV_BOARD_PV183] = {
diff --git a/drivers/media/video/bt8xx/bttv.h b/drivers/media/video/bt8xx/bttv.h
index fd62bf15d779..c6333595c6b9 100644
--- a/drivers/media/video/bt8xx/bttv.h
+++ b/drivers/media/video/bt8xx/bttv.h
@@ -234,7 +234,6 @@ struct tvcard {
234 234
235 /* i2c audio flags */ 235 /* i2c audio flags */
236 unsigned int no_msp34xx:1; 236 unsigned int no_msp34xx:1;
237 unsigned int no_tda9875:1;
238 unsigned int no_tda7432:1; 237 unsigned int no_tda7432:1;
239 unsigned int needs_tvaudio:1; 238 unsigned int needs_tvaudio:1;
240 unsigned int msp34xx_alt:1; 239 unsigned int msp34xx_alt:1;
diff --git a/drivers/media/video/cafe_ccic.c b/drivers/media/video/cafe_ccic.c
index 49f1b8f1418e..55ffd60ffa7f 100644
--- a/drivers/media/video/cafe_ccic.c
+++ b/drivers/media/video/cafe_ccic.c
@@ -2001,6 +2001,11 @@ static int cafe_pci_probe(struct pci_dev *pdev,
2001 .min_width = 320, 2001 .min_width = 320,
2002 .min_height = 240, 2002 .min_height = 240,
2003 }; 2003 };
2004 struct i2c_board_info ov7670_info = {
2005 .type = "ov7670",
2006 .addr = 0x42,
2007 .platform_data = &sensor_cfg,
2008 };
2004 2009
2005 /* 2010 /*
2006 * Start putting together one of our big camera structures. 2011 * Start putting together one of our big camera structures.
@@ -2062,9 +2067,9 @@ static int cafe_pci_probe(struct pci_dev *pdev,
2062 if (dmi_check_system(olpc_xo1_dmi)) 2067 if (dmi_check_system(olpc_xo1_dmi))
2063 sensor_cfg.clock_speed = 45; 2068 sensor_cfg.clock_speed = 45;
2064 2069
2065 cam->sensor_addr = 0x42; 2070 cam->sensor_addr = ov7670_info.addr;
2066 cam->sensor = v4l2_i2c_new_subdev_cfg(&cam->v4l2_dev, &cam->i2c_adapter, 2071 cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev, &cam->i2c_adapter,
2067 "ov7670", 0, &sensor_cfg, cam->sensor_addr, NULL); 2072 &ov7670_info, NULL);
2068 if (cam->sensor == NULL) { 2073 if (cam->sensor == NULL) {
2069 ret = -ENODEV; 2074 ret = -ENODEV;
2070 goto out_smbus; 2075 goto out_smbus;
diff --git a/drivers/media/video/cpia2/cpia2.h b/drivers/media/video/cpia2/cpia2.h
index 916c13d5cf7d..6d6d1843791c 100644
--- a/drivers/media/video/cpia2/cpia2.h
+++ b/drivers/media/video/cpia2/cpia2.h
@@ -378,7 +378,7 @@ struct cpia2_fh {
378 378
379struct camera_data { 379struct camera_data {
380 /* locks */ 380 /* locks */
381 struct mutex busy_lock; /* guard against SMP multithreading */ 381 struct mutex v4l2_lock; /* serialize file operations */
382 struct v4l2_prio_state prio; 382 struct v4l2_prio_state prio;
383 383
384 /* camera status */ 384 /* camera status */
diff --git a/drivers/media/video/cpia2/cpia2_core.c b/drivers/media/video/cpia2/cpia2_core.c
index 9606bc01b803..aaffca8e13fd 100644
--- a/drivers/media/video/cpia2/cpia2_core.c
+++ b/drivers/media/video/cpia2/cpia2_core.c
@@ -2247,7 +2247,7 @@ struct camera_data *cpia2_init_camera_struct(void)
2247 2247
2248 2248
2249 cam->present = 1; 2249 cam->present = 1;
2250 mutex_init(&cam->busy_lock); 2250 mutex_init(&cam->v4l2_lock);
2251 init_waitqueue_head(&cam->wq_stream); 2251 init_waitqueue_head(&cam->wq_stream);
2252 2252
2253 return cam; 2253 return cam;
@@ -2365,9 +2365,9 @@ long cpia2_read(struct camera_data *cam,
2365 char __user *buf, unsigned long count, int noblock) 2365 char __user *buf, unsigned long count, int noblock)
2366{ 2366{
2367 struct framebuf *frame; 2367 struct framebuf *frame;
2368 if (!count) { 2368
2369 if (!count)
2369 return 0; 2370 return 0;
2370 }
2371 2371
2372 if (!buf) { 2372 if (!buf) {
2373 ERR("%s: buffer NULL\n",__func__); 2373 ERR("%s: buffer NULL\n",__func__);
@@ -2379,17 +2379,12 @@ long cpia2_read(struct camera_data *cam,
2379 return -EINVAL; 2379 return -EINVAL;
2380 } 2380 }
2381 2381
2382 /* make this _really_ smp and multithread-safe */
2383 if (mutex_lock_interruptible(&cam->busy_lock))
2384 return -ERESTARTSYS;
2385
2386 if (!cam->present) { 2382 if (!cam->present) {
2387 LOG("%s: camera removed\n",__func__); 2383 LOG("%s: camera removed\n",__func__);
2388 mutex_unlock(&cam->busy_lock);
2389 return 0; /* EOF */ 2384 return 0; /* EOF */
2390 } 2385 }
2391 2386
2392 if(!cam->streaming) { 2387 if (!cam->streaming) {
2393 /* Start streaming */ 2388 /* Start streaming */
2394 cpia2_usb_stream_start(cam, 2389 cpia2_usb_stream_start(cam,
2395 cam->params.camera_state.stream_mode); 2390 cam->params.camera_state.stream_mode);
@@ -2398,42 +2393,31 @@ long cpia2_read(struct camera_data *cam,
2398 /* Copy cam->curbuff in case it changes while we're processing */ 2393 /* Copy cam->curbuff in case it changes while we're processing */
2399 frame = cam->curbuff; 2394 frame = cam->curbuff;
2400 if (noblock && frame->status != FRAME_READY) { 2395 if (noblock && frame->status != FRAME_READY) {
2401 mutex_unlock(&cam->busy_lock);
2402 return -EAGAIN; 2396 return -EAGAIN;
2403 } 2397 }
2404 2398
2405 if(frame->status != FRAME_READY) { 2399 if (frame->status != FRAME_READY) {
2406 mutex_unlock(&cam->busy_lock); 2400 mutex_unlock(&cam->v4l2_lock);
2407 wait_event_interruptible(cam->wq_stream, 2401 wait_event_interruptible(cam->wq_stream,
2408 !cam->present || 2402 !cam->present ||
2409 (frame = cam->curbuff)->status == FRAME_READY); 2403 (frame = cam->curbuff)->status == FRAME_READY);
2404 mutex_lock(&cam->v4l2_lock);
2410 if (signal_pending(current)) 2405 if (signal_pending(current))
2411 return -ERESTARTSYS; 2406 return -ERESTARTSYS;
2412 /* make this _really_ smp and multithread-safe */ 2407 if (!cam->present)
2413 if (mutex_lock_interruptible(&cam->busy_lock)) {
2414 return -ERESTARTSYS;
2415 }
2416 if(!cam->present) {
2417 mutex_unlock(&cam->busy_lock);
2418 return 0; 2408 return 0;
2419 }
2420 } 2409 }
2421 2410
2422 /* copy data to user space */ 2411 /* copy data to user space */
2423 if (frame->length > count) { 2412 if (frame->length > count)
2424 mutex_unlock(&cam->busy_lock);
2425 return -EFAULT; 2413 return -EFAULT;
2426 } 2414 if (copy_to_user(buf, frame->data, frame->length))
2427 if (copy_to_user(buf, frame->data, frame->length)) {
2428 mutex_unlock(&cam->busy_lock);
2429 return -EFAULT; 2415 return -EFAULT;
2430 }
2431 2416
2432 count = frame->length; 2417 count = frame->length;
2433 2418
2434 frame->status = FRAME_EMPTY; 2419 frame->status = FRAME_EMPTY;
2435 2420
2436 mutex_unlock(&cam->busy_lock);
2437 return count; 2421 return count;
2438} 2422}
2439 2423
@@ -2447,17 +2431,13 @@ unsigned int cpia2_poll(struct camera_data *cam, struct file *filp,
2447{ 2431{
2448 unsigned int status=0; 2432 unsigned int status=0;
2449 2433
2450 if(!cam) { 2434 if (!cam) {
2451 ERR("%s: Internal error, camera_data not found!\n",__func__); 2435 ERR("%s: Internal error, camera_data not found!\n",__func__);
2452 return POLLERR; 2436 return POLLERR;
2453 } 2437 }
2454 2438
2455 mutex_lock(&cam->busy_lock); 2439 if (!cam->present)
2456
2457 if(!cam->present) {
2458 mutex_unlock(&cam->busy_lock);
2459 return POLLHUP; 2440 return POLLHUP;
2460 }
2461 2441
2462 if(!cam->streaming) { 2442 if(!cam->streaming) {
2463 /* Start streaming */ 2443 /* Start streaming */
@@ -2465,16 +2445,13 @@ unsigned int cpia2_poll(struct camera_data *cam, struct file *filp,
2465 cam->params.camera_state.stream_mode); 2445 cam->params.camera_state.stream_mode);
2466 } 2446 }
2467 2447
2468 mutex_unlock(&cam->busy_lock);
2469 poll_wait(filp, &cam->wq_stream, wait); 2448 poll_wait(filp, &cam->wq_stream, wait);
2470 mutex_lock(&cam->busy_lock);
2471 2449
2472 if(!cam->present) 2450 if(!cam->present)
2473 status = POLLHUP; 2451 status = POLLHUP;
2474 else if(cam->curbuff->status == FRAME_READY) 2452 else if(cam->curbuff->status == FRAME_READY)
2475 status = POLLIN | POLLRDNORM; 2453 status = POLLIN | POLLRDNORM;
2476 2454
2477 mutex_unlock(&cam->busy_lock);
2478 return status; 2455 return status;
2479} 2456}
2480 2457
@@ -2496,29 +2473,19 @@ int cpia2_remap_buffer(struct camera_data *cam, struct vm_area_struct *vma)
2496 2473
2497 DBG("mmap offset:%ld size:%ld\n", start_offset, size); 2474 DBG("mmap offset:%ld size:%ld\n", start_offset, size);
2498 2475
2499 /* make this _really_ smp-safe */ 2476 if (!cam->present)
2500 if (mutex_lock_interruptible(&cam->busy_lock))
2501 return -ERESTARTSYS;
2502
2503 if (!cam->present) {
2504 mutex_unlock(&cam->busy_lock);
2505 return -ENODEV; 2477 return -ENODEV;
2506 }
2507 2478
2508 if (size > cam->frame_size*cam->num_frames || 2479 if (size > cam->frame_size*cam->num_frames ||
2509 (start_offset % cam->frame_size) != 0 || 2480 (start_offset % cam->frame_size) != 0 ||
2510 (start_offset+size > cam->frame_size*cam->num_frames)) { 2481 (start_offset+size > cam->frame_size*cam->num_frames))
2511 mutex_unlock(&cam->busy_lock);
2512 return -EINVAL; 2482 return -EINVAL;
2513 }
2514 2483
2515 pos = ((unsigned long) (cam->frame_buffer)) + start_offset; 2484 pos = ((unsigned long) (cam->frame_buffer)) + start_offset;
2516 while (size > 0) { 2485 while (size > 0) {
2517 page = kvirt_to_pa(pos); 2486 page = kvirt_to_pa(pos);
2518 if (remap_pfn_range(vma, start, page >> PAGE_SHIFT, PAGE_SIZE, PAGE_SHARED)) { 2487 if (remap_pfn_range(vma, start, page >> PAGE_SHIFT, PAGE_SIZE, PAGE_SHARED))
2519 mutex_unlock(&cam->busy_lock);
2520 return -EAGAIN; 2488 return -EAGAIN;
2521 }
2522 start += PAGE_SIZE; 2489 start += PAGE_SIZE;
2523 pos += PAGE_SIZE; 2490 pos += PAGE_SIZE;
2524 if (size > PAGE_SIZE) 2491 if (size > PAGE_SIZE)
@@ -2528,7 +2495,5 @@ int cpia2_remap_buffer(struct camera_data *cam, struct vm_area_struct *vma)
2528 } 2495 }
2529 2496
2530 cam->mmapped = true; 2497 cam->mmapped = true;
2531 mutex_unlock(&cam->busy_lock);
2532 return 0; 2498 return 0;
2533} 2499}
2534
diff --git a/drivers/media/video/cpia2/cpia2_v4l.c b/drivers/media/video/cpia2/cpia2_v4l.c
index 7edf80b0d01a..9bad39842936 100644
--- a/drivers/media/video/cpia2/cpia2_v4l.c
+++ b/drivers/media/video/cpia2/cpia2_v4l.c
@@ -238,59 +238,40 @@ static struct v4l2_queryctrl controls[] = {
238static int cpia2_open(struct file *file) 238static int cpia2_open(struct file *file)
239{ 239{
240 struct camera_data *cam = video_drvdata(file); 240 struct camera_data *cam = video_drvdata(file);
241 int retval = 0; 241 struct cpia2_fh *fh;
242 242
243 if (!cam) { 243 if (!cam) {
244 ERR("Internal error, camera_data not found!\n"); 244 ERR("Internal error, camera_data not found!\n");
245 return -ENODEV; 245 return -ENODEV;
246 } 246 }
247 247
248 if(mutex_lock_interruptible(&cam->busy_lock)) 248 if (!cam->present)
249 return -ERESTARTSYS; 249 return -ENODEV;
250
251 if(!cam->present) {
252 retval = -ENODEV;
253 goto err_return;
254 }
255 250
256 if (cam->open_count > 0) { 251 if (cam->open_count == 0) {
257 goto skip_init; 252 if (cpia2_allocate_buffers(cam))
258 } 253 return -ENOMEM;
259 254
260 if (cpia2_allocate_buffers(cam)) { 255 /* reset the camera */
261 retval = -ENOMEM; 256 if (cpia2_reset_camera(cam) < 0)
262 goto err_return; 257 return -EIO;
263 }
264 258
265 /* reset the camera */ 259 cam->APP_len = 0;
266 if (cpia2_reset_camera(cam) < 0) { 260 cam->COM_len = 0;
267 retval = -EIO;
268 goto err_return;
269 } 261 }
270 262
271 cam->APP_len = 0; 263 fh = kmalloc(sizeof(*fh), GFP_KERNEL);
272 cam->COM_len = 0; 264 if (!fh)
273 265 return -ENOMEM;
274skip_init: 266 file->private_data = fh;
275 { 267 fh->prio = V4L2_PRIORITY_UNSET;
276 struct cpia2_fh *fh = kmalloc(sizeof(*fh),GFP_KERNEL); 268 v4l2_prio_open(&cam->prio, &fh->prio);
277 if(!fh) { 269 fh->mmapped = 0;
278 retval = -ENOMEM;
279 goto err_return;
280 }
281 file->private_data = fh;
282 fh->prio = V4L2_PRIORITY_UNSET;
283 v4l2_prio_open(&cam->prio, &fh->prio);
284 fh->mmapped = 0;
285 }
286 270
287 ++cam->open_count; 271 ++cam->open_count;
288 272
289 cpia2_dbg_dump_registers(cam); 273 cpia2_dbg_dump_registers(cam);
290 274 return 0;
291err_return:
292 mutex_unlock(&cam->busy_lock);
293 return retval;
294} 275}
295 276
296/****************************************************************************** 277/******************************************************************************
@@ -304,15 +285,11 @@ static int cpia2_close(struct file *file)
304 struct camera_data *cam = video_get_drvdata(dev); 285 struct camera_data *cam = video_get_drvdata(dev);
305 struct cpia2_fh *fh = file->private_data; 286 struct cpia2_fh *fh = file->private_data;
306 287
307 mutex_lock(&cam->busy_lock);
308
309 if (cam->present && 288 if (cam->present &&
310 (cam->open_count == 1 289 (cam->open_count == 1 || fh->prio == V4L2_PRIORITY_RECORD)) {
311 || fh->prio == V4L2_PRIORITY_RECORD
312 )) {
313 cpia2_usb_stream_stop(cam); 290 cpia2_usb_stream_stop(cam);
314 291
315 if(cam->open_count == 1) { 292 if (cam->open_count == 1) {
316 /* save camera state for later open */ 293 /* save camera state for later open */
317 cpia2_save_camera_state(cam); 294 cpia2_save_camera_state(cam);
318 295
@@ -321,26 +298,21 @@ static int cpia2_close(struct file *file)
321 } 298 }
322 } 299 }
323 300
324 { 301 if (fh->mmapped)
325 if(fh->mmapped) 302 cam->mmapped = 0;
326 cam->mmapped = 0; 303 v4l2_prio_close(&cam->prio, fh->prio);
327 v4l2_prio_close(&cam->prio, fh->prio); 304 file->private_data = NULL;
328 file->private_data = NULL; 305 kfree(fh);
329 kfree(fh);
330 }
331 306
332 if (--cam->open_count == 0) { 307 if (--cam->open_count == 0) {
333 cpia2_free_buffers(cam); 308 cpia2_free_buffers(cam);
334 if (!cam->present) { 309 if (!cam->present) {
335 video_unregister_device(dev); 310 video_unregister_device(dev);
336 mutex_unlock(&cam->busy_lock);
337 kfree(cam); 311 kfree(cam);
338 return 0; 312 return 0;
339 } 313 }
340 } 314 }
341 315
342 mutex_unlock(&cam->busy_lock);
343
344 return 0; 316 return 0;
345} 317}
346 318
@@ -405,11 +377,11 @@ static int sync(struct camera_data *cam, int frame_nr)
405 return 0; 377 return 0;
406 } 378 }
407 379
408 mutex_unlock(&cam->busy_lock); 380 mutex_unlock(&cam->v4l2_lock);
409 wait_event_interruptible(cam->wq_stream, 381 wait_event_interruptible(cam->wq_stream,
410 !cam->streaming || 382 !cam->streaming ||
411 frame->status == FRAME_READY); 383 frame->status == FRAME_READY);
412 mutex_lock(&cam->busy_lock); 384 mutex_lock(&cam->v4l2_lock);
413 if (signal_pending(current)) 385 if (signal_pending(current))
414 return -ERESTARTSYS; 386 return -ERESTARTSYS;
415 if(!cam->present) 387 if(!cam->present)
@@ -1293,11 +1265,11 @@ static int ioctl_dqbuf(void *arg,struct camera_data *cam, struct file *file)
1293 if(frame < 0) { 1265 if(frame < 0) {
1294 /* Wait for a frame to become available */ 1266 /* Wait for a frame to become available */
1295 struct framebuf *cb=cam->curbuff; 1267 struct framebuf *cb=cam->curbuff;
1296 mutex_unlock(&cam->busy_lock); 1268 mutex_unlock(&cam->v4l2_lock);
1297 wait_event_interruptible(cam->wq_stream, 1269 wait_event_interruptible(cam->wq_stream,
1298 !cam->present || 1270 !cam->present ||
1299 (cb=cam->curbuff)->status == FRAME_READY); 1271 (cb=cam->curbuff)->status == FRAME_READY);
1300 mutex_lock(&cam->busy_lock); 1272 mutex_lock(&cam->v4l2_lock);
1301 if (signal_pending(current)) 1273 if (signal_pending(current))
1302 return -ERESTARTSYS; 1274 return -ERESTARTSYS;
1303 if(!cam->present) 1275 if(!cam->present)
@@ -1337,14 +1309,8 @@ static long cpia2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
1337 if (!cam) 1309 if (!cam)
1338 return -ENOTTY; 1310 return -ENOTTY;
1339 1311
1340 /* make this _really_ smp-safe */ 1312 if (!cam->present)
1341 if (mutex_lock_interruptible(&cam->busy_lock))
1342 return -ERESTARTSYS;
1343
1344 if (!cam->present) {
1345 mutex_unlock(&cam->busy_lock);
1346 return -ENODEV; 1313 return -ENODEV;
1347 }
1348 1314
1349 /* Priority check */ 1315 /* Priority check */
1350 switch (cmd) { 1316 switch (cmd) {
@@ -1352,10 +1318,8 @@ static long cpia2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
1352 { 1318 {
1353 struct cpia2_fh *fh = file->private_data; 1319 struct cpia2_fh *fh = file->private_data;
1354 retval = v4l2_prio_check(&cam->prio, fh->prio); 1320 retval = v4l2_prio_check(&cam->prio, fh->prio);
1355 if(retval) { 1321 if (retval)
1356 mutex_unlock(&cam->busy_lock);
1357 return retval; 1322 return retval;
1358 }
1359 break; 1323 break;
1360 } 1324 }
1361 default: 1325 default:
@@ -1529,7 +1493,6 @@ static long cpia2_do_ioctl(struct file *file, unsigned int cmd, void *arg)
1529 break; 1493 break;
1530 } 1494 }
1531 1495
1532 mutex_unlock(&cam->busy_lock);
1533 return retval; 1496 return retval;
1534} 1497}
1535 1498
@@ -1596,7 +1559,7 @@ static const struct v4l2_file_operations cpia2_fops = {
1596 .release = cpia2_close, 1559 .release = cpia2_close,
1597 .read = cpia2_v4l_read, 1560 .read = cpia2_v4l_read,
1598 .poll = cpia2_v4l_poll, 1561 .poll = cpia2_v4l_poll,
1599 .ioctl = cpia2_ioctl, 1562 .unlocked_ioctl = cpia2_ioctl,
1600 .mmap = cpia2_mmap, 1563 .mmap = cpia2_mmap,
1601}; 1564};
1602 1565
@@ -1620,6 +1583,7 @@ int cpia2_register_camera(struct camera_data *cam)
1620 1583
1621 memcpy(cam->vdev, &cpia2_template, sizeof(cpia2_template)); 1584 memcpy(cam->vdev, &cpia2_template, sizeof(cpia2_template));
1622 video_set_drvdata(cam->vdev, cam); 1585 video_set_drvdata(cam->vdev, cam);
1586 cam->vdev->lock = &cam->v4l2_lock;
1623 1587
1624 reset_camera_struct_v4l(cam); 1588 reset_camera_struct_v4l(cam);
1625 1589
diff --git a/drivers/media/video/cx18/cx18-driver.c b/drivers/media/video/cx18/cx18-driver.c
index 133ec2bac180..944af8adbe0c 100644
--- a/drivers/media/video/cx18/cx18-driver.c
+++ b/drivers/media/video/cx18/cx18-driver.c
@@ -664,7 +664,7 @@ static int __devinit cx18_create_in_workq(struct cx18 *cx)
664{ 664{
665 snprintf(cx->in_workq_name, sizeof(cx->in_workq_name), "%s-in", 665 snprintf(cx->in_workq_name, sizeof(cx->in_workq_name), "%s-in",
666 cx->v4l2_dev.name); 666 cx->v4l2_dev.name);
667 cx->in_work_queue = create_singlethread_workqueue(cx->in_workq_name); 667 cx->in_work_queue = alloc_ordered_workqueue(cx->in_workq_name, 0);
668 if (cx->in_work_queue == NULL) { 668 if (cx->in_work_queue == NULL) {
669 CX18_ERR("Unable to create incoming mailbox handler thread\n"); 669 CX18_ERR("Unable to create incoming mailbox handler thread\n");
670 return -ENOMEM; 670 return -ENOMEM;
@@ -672,18 +672,6 @@ static int __devinit cx18_create_in_workq(struct cx18 *cx)
672 return 0; 672 return 0;
673} 673}
674 674
675static int __devinit cx18_create_out_workq(struct cx18 *cx)
676{
677 snprintf(cx->out_workq_name, sizeof(cx->out_workq_name), "%s-out",
678 cx->v4l2_dev.name);
679 cx->out_work_queue = create_workqueue(cx->out_workq_name);
680 if (cx->out_work_queue == NULL) {
681 CX18_ERR("Unable to create outgoing mailbox handler threads\n");
682 return -ENOMEM;
683 }
684 return 0;
685}
686
687static void __devinit cx18_init_in_work_orders(struct cx18 *cx) 675static void __devinit cx18_init_in_work_orders(struct cx18 *cx)
688{ 676{
689 int i; 677 int i;
@@ -710,15 +698,9 @@ static int __devinit cx18_init_struct1(struct cx18 *cx)
710 mutex_init(&cx->epu2apu_mb_lock); 698 mutex_init(&cx->epu2apu_mb_lock);
711 mutex_init(&cx->epu2cpu_mb_lock); 699 mutex_init(&cx->epu2cpu_mb_lock);
712 700
713 ret = cx18_create_out_workq(cx);
714 if (ret)
715 return ret;
716
717 ret = cx18_create_in_workq(cx); 701 ret = cx18_create_in_workq(cx);
718 if (ret) { 702 if (ret)
719 destroy_workqueue(cx->out_work_queue);
720 return ret; 703 return ret;
721 }
722 704
723 cx18_init_in_work_orders(cx); 705 cx18_init_in_work_orders(cx);
724 706
@@ -1107,7 +1089,6 @@ free_mem:
1107 release_mem_region(cx->base_addr, CX18_MEM_SIZE); 1089 release_mem_region(cx->base_addr, CX18_MEM_SIZE);
1108free_workqueues: 1090free_workqueues:
1109 destroy_workqueue(cx->in_work_queue); 1091 destroy_workqueue(cx->in_work_queue);
1110 destroy_workqueue(cx->out_work_queue);
1111err: 1092err:
1112 if (retval == 0) 1093 if (retval == 0)
1113 retval = -ENODEV; 1094 retval = -ENODEV;
@@ -1259,7 +1240,6 @@ static void cx18_remove(struct pci_dev *pci_dev)
1259 cx18_halt_firmware(cx); 1240 cx18_halt_firmware(cx);
1260 1241
1261 destroy_workqueue(cx->in_work_queue); 1242 destroy_workqueue(cx->in_work_queue);
1262 destroy_workqueue(cx->out_work_queue);
1263 1243
1264 cx18_streams_cleanup(cx, 1); 1244 cx18_streams_cleanup(cx, 1);
1265 1245
diff --git a/drivers/media/video/cx18/cx18-driver.h b/drivers/media/video/cx18/cx18-driver.h
index f6f3e50d4bdf..306caac6d3fc 100644
--- a/drivers/media/video/cx18/cx18-driver.h
+++ b/drivers/media/video/cx18/cx18-driver.h
@@ -617,9 +617,6 @@ struct cx18 {
617 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS]; 617 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
618 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */ 618 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
619 619
620 struct workqueue_struct *out_work_queue;
621 char out_workq_name[12]; /* "cx18-NN-out" */
622
623 /* i2c */ 620 /* i2c */
624 struct i2c_adapter i2c_adap[2]; 621 struct i2c_adapter i2c_adap[2];
625 struct i2c_algo_bit_data i2c_algo[2]; 622 struct i2c_algo_bit_data i2c_algo[2];
diff --git a/drivers/media/video/cx18/cx18-streams.h b/drivers/media/video/cx18/cx18-streams.h
index 51765eb12d39..713b0e61536d 100644
--- a/drivers/media/video/cx18/cx18-streams.h
+++ b/drivers/media/video/cx18/cx18-streams.h
@@ -42,8 +42,7 @@ static inline bool cx18_stream_enabled(struct cx18_stream *s)
42/* Related to submission of mdls to firmware */ 42/* Related to submission of mdls to firmware */
43static inline void cx18_stream_load_fw_queue(struct cx18_stream *s) 43static inline void cx18_stream_load_fw_queue(struct cx18_stream *s)
44{ 44{
45 struct cx18 *cx = s->cx; 45 schedule_work(&s->out_work_order);
46 queue_work(cx->out_work_queue, &s->out_work_order);
47} 46}
48 47
49static inline void cx18_stream_put_mdl_fw(struct cx18_stream *s, 48static inline void cx18_stream_put_mdl_fw(struct cx18_stream *s,
diff --git a/drivers/media/video/cx231xx/cx231xx-dvb.c b/drivers/media/video/cx231xx/cx231xx-dvb.c
index fe59a1c3f064..363aa6004221 100644
--- a/drivers/media/video/cx231xx/cx231xx-dvb.c
+++ b/drivers/media/video/cx231xx/cx231xx-dvb.c
@@ -28,7 +28,6 @@
28#include <media/videobuf-vmalloc.h> 28#include <media/videobuf-vmalloc.h>
29 29
30#include "xc5000.h" 30#include "xc5000.h"
31#include "dvb_dummy_fe.h"
32#include "s5h1432.h" 31#include "s5h1432.h"
33#include "tda18271.h" 32#include "tda18271.h"
34#include "s5h1411.h" 33#include "s5h1411.h"
@@ -619,7 +618,7 @@ static int dvb_init(struct cx231xx *dev)
619 618
620 if (dev->dvb->frontend == NULL) { 619 if (dev->dvb->frontend == NULL) {
621 printk(DRIVER_NAME 620 printk(DRIVER_NAME
622 ": Failed to attach dummy front end\n"); 621 ": Failed to attach s5h1411 front end\n");
623 result = -EINVAL; 622 result = -EINVAL;
624 goto out_free; 623 goto out_free;
625 } 624 }
@@ -665,7 +664,7 @@ static int dvb_init(struct cx231xx *dev)
665 664
666 if (dev->dvb->frontend == NULL) { 665 if (dev->dvb->frontend == NULL) {
667 printk(DRIVER_NAME 666 printk(DRIVER_NAME
668 ": Failed to attach dummy front end\n"); 667 ": Failed to attach s5h1411 front end\n");
669 result = -EINVAL; 668 result = -EINVAL;
670 goto out_free; 669 goto out_free;
671 } 670 }
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c
index f16461844c5c..6fc09dd41b9d 100644
--- a/drivers/media/video/cx25840/cx25840-core.c
+++ b/drivers/media/video/cx25840/cx25840-core.c
@@ -1682,20 +1682,6 @@ static int cx25840_log_status(struct v4l2_subdev *sd)
1682 return 0; 1682 return 0;
1683} 1683}
1684 1684
1685static int cx25840_s_config(struct v4l2_subdev *sd, int irq, void *platform_data)
1686{
1687 struct cx25840_state *state = to_state(sd);
1688 struct i2c_client *client = v4l2_get_subdevdata(sd);
1689
1690 if (platform_data) {
1691 struct cx25840_platform_data *pdata = platform_data;
1692
1693 state->pvr150_workaround = pdata->pvr150_workaround;
1694 set_input(client, state->vid_input, state->aud_input);
1695 }
1696 return 0;
1697}
1698
1699static int cx23885_irq_handler(struct v4l2_subdev *sd, u32 status, 1685static int cx23885_irq_handler(struct v4l2_subdev *sd, u32 status,
1700 bool *handled) 1686 bool *handled)
1701{ 1687{
@@ -1787,7 +1773,6 @@ static const struct v4l2_ctrl_ops cx25840_ctrl_ops = {
1787 1773
1788static const struct v4l2_subdev_core_ops cx25840_core_ops = { 1774static const struct v4l2_subdev_core_ops cx25840_core_ops = {
1789 .log_status = cx25840_log_status, 1775 .log_status = cx25840_log_status,
1790 .s_config = cx25840_s_config,
1791 .g_chip_ident = cx25840_g_chip_ident, 1776 .g_chip_ident = cx25840_g_chip_ident,
1792 .g_ctrl = v4l2_subdev_g_ctrl, 1777 .g_ctrl = v4l2_subdev_g_ctrl,
1793 .s_ctrl = v4l2_subdev_s_ctrl, 1778 .s_ctrl = v4l2_subdev_s_ctrl,
@@ -1974,7 +1959,6 @@ static int cx25840_probe(struct i2c_client *client,
1974 state->vid_input = CX25840_COMPOSITE7; 1959 state->vid_input = CX25840_COMPOSITE7;
1975 state->aud_input = CX25840_AUDIO8; 1960 state->aud_input = CX25840_AUDIO8;
1976 state->audclk_freq = 48000; 1961 state->audclk_freq = 48000;
1977 state->pvr150_workaround = 0;
1978 state->audmode = V4L2_TUNER_MODE_LANG1; 1962 state->audmode = V4L2_TUNER_MODE_LANG1;
1979 state->vbi_line_offset = 8; 1963 state->vbi_line_offset = 8;
1980 state->id = id; 1964 state->id = id;
@@ -2034,6 +2018,12 @@ static int cx25840_probe(struct i2c_client *client,
2034 v4l2_ctrl_cluster(2, &state->volume); 2018 v4l2_ctrl_cluster(2, &state->volume);
2035 v4l2_ctrl_handler_setup(&state->hdl); 2019 v4l2_ctrl_handler_setup(&state->hdl);
2036 2020
2021 if (client->dev.platform_data) {
2022 struct cx25840_platform_data *pdata = client->dev.platform_data;
2023
2024 state->pvr150_workaround = pdata->pvr150_workaround;
2025 }
2026
2037 cx25840_ir_probe(sd); 2027 cx25840_ir_probe(sd);
2038 return 0; 2028 return 0;
2039} 2029}
diff --git a/drivers/media/video/davinci/vpif.c b/drivers/media/video/davinci/vpif.c
index 1f532e31cd49..9f3bfc1eb240 100644
--- a/drivers/media/video/davinci/vpif.c
+++ b/drivers/media/video/davinci/vpif.c
@@ -41,6 +41,183 @@ spinlock_t vpif_lock;
41 41
42void __iomem *vpif_base; 42void __iomem *vpif_base;
43 43
44/**
45 * ch_params: video standard configuration parameters for vpif
46 * The table must include all presets from supported subdevices.
47 */
48const struct vpif_channel_config_params ch_params[] = {
49 /* HDTV formats */
50 {
51 .name = "480p59_94",
52 .width = 720,
53 .height = 480,
54 .frm_fmt = 1,
55 .ycmux_mode = 0,
56 .eav2sav = 138-8,
57 .sav2eav = 720,
58 .l1 = 1,
59 .l3 = 43,
60 .l5 = 523,
61 .vsize = 525,
62 .capture_format = 0,
63 .vbi_supported = 0,
64 .hd_sd = 1,
65 .dv_preset = V4L2_DV_480P59_94,
66 },
67 {
68 .name = "576p50",
69 .width = 720,
70 .height = 576,
71 .frm_fmt = 1,
72 .ycmux_mode = 0,
73 .eav2sav = 144-8,
74 .sav2eav = 720,
75 .l1 = 1,
76 .l3 = 45,
77 .l5 = 621,
78 .vsize = 625,
79 .capture_format = 0,
80 .vbi_supported = 0,
81 .hd_sd = 1,
82 .dv_preset = V4L2_DV_576P50,
83 },
84 {
85 .name = "720p50",
86 .width = 1280,
87 .height = 720,
88 .frm_fmt = 1,
89 .ycmux_mode = 0,
90 .eav2sav = 700-8,
91 .sav2eav = 1280,
92 .l1 = 1,
93 .l3 = 26,
94 .l5 = 746,
95 .vsize = 750,
96 .capture_format = 0,
97 .vbi_supported = 0,
98 .hd_sd = 1,
99 .dv_preset = V4L2_DV_720P50,
100 },
101 {
102 .name = "720p60",
103 .width = 1280,
104 .height = 720,
105 .frm_fmt = 1,
106 .ycmux_mode = 0,
107 .eav2sav = 370 - 8,
108 .sav2eav = 1280,
109 .l1 = 1,
110 .l3 = 26,
111 .l5 = 746,
112 .vsize = 750,
113 .capture_format = 0,
114 .vbi_supported = 0,
115 .hd_sd = 1,
116 .dv_preset = V4L2_DV_720P60,
117 },
118 {
119 .name = "1080I50",
120 .width = 1920,
121 .height = 1080,
122 .frm_fmt = 0,
123 .ycmux_mode = 0,
124 .eav2sav = 720 - 8,
125 .sav2eav = 1920,
126 .l1 = 1,
127 .l3 = 21,
128 .l5 = 561,
129 .l7 = 563,
130 .l9 = 584,
131 .l11 = 1124,
132 .vsize = 1125,
133 .capture_format = 0,
134 .vbi_supported = 0,
135 .hd_sd = 1,
136 .dv_preset = V4L2_DV_1080I50,
137 },
138 {
139 .name = "1080I60",
140 .width = 1920,
141 .height = 1080,
142 .frm_fmt = 0,
143 .ycmux_mode = 0,
144 .eav2sav = 280 - 8,
145 .sav2eav = 1920,
146 .l1 = 1,
147 .l3 = 21,
148 .l5 = 561,
149 .l7 = 563,
150 .l9 = 584,
151 .l11 = 1124,
152 .vsize = 1125,
153 .capture_format = 0,
154 .vbi_supported = 0,
155 .hd_sd = 1,
156 .dv_preset = V4L2_DV_1080I60,
157 },
158 {
159 .name = "1080p60",
160 .width = 1920,
161 .height = 1080,
162 .frm_fmt = 1,
163 .ycmux_mode = 0,
164 .eav2sav = 280 - 8,
165 .sav2eav = 1920,
166 .l1 = 1,
167 .l3 = 42,
168 .l5 = 1122,
169 .vsize = 1125,
170 .capture_format = 0,
171 .vbi_supported = 0,
172 .hd_sd = 1,
173 .dv_preset = V4L2_DV_1080P60,
174 },
175
176 /* SDTV formats */
177 {
178 .name = "NTSC_M",
179 .width = 720,
180 .height = 480,
181 .frm_fmt = 0,
182 .ycmux_mode = 1,
183 .eav2sav = 268,
184 .sav2eav = 1440,
185 .l1 = 1,
186 .l3 = 23,
187 .l5 = 263,
188 .l7 = 266,
189 .l9 = 286,
190 .l11 = 525,
191 .vsize = 525,
192 .capture_format = 0,
193 .vbi_supported = 1,
194 .hd_sd = 0,
195 .stdid = V4L2_STD_525_60,
196 },
197 {
198 .name = "PAL_BDGHIK",
199 .width = 720,
200 .height = 576,
201 .frm_fmt = 0,
202 .ycmux_mode = 1,
203 .eav2sav = 280,
204 .sav2eav = 1440,
205 .l1 = 1,
206 .l3 = 23,
207 .l5 = 311,
208 .l7 = 313,
209 .l9 = 336,
210 .l11 = 624,
211 .vsize = 625,
212 .capture_format = 0,
213 .vbi_supported = 1,
214 .hd_sd = 0,
215 .stdid = V4L2_STD_625_50,
216 },
217};
218
219const unsigned int vpif_ch_params_count = ARRAY_SIZE(ch_params);
220
44static inline void vpif_wr_bit(u32 reg, u32 bit, u32 val) 221static inline void vpif_wr_bit(u32 reg, u32 bit, u32 val)
45{ 222{
46 if (val) 223 if (val)
diff --git a/drivers/media/video/davinci/vpif.h b/drivers/media/video/davinci/vpif.h
index ebd5c4338ebb..10550bd93b06 100644
--- a/drivers/media/video/davinci/vpif.h
+++ b/drivers/media/video/davinci/vpif.h
@@ -577,12 +577,10 @@ struct vpif_channel_config_params {
577 char name[VPIF_MAX_NAME]; /* Name of the mode */ 577 char name[VPIF_MAX_NAME]; /* Name of the mode */
578 u16 width; /* Indicates width of the image */ 578 u16 width; /* Indicates width of the image */
579 u16 height; /* Indicates height of the image */ 579 u16 height; /* Indicates height of the image */
580 u8 fps; 580 u8 frm_fmt; /* Interlaced (0) or progressive (1) */
581 u8 frm_fmt; /* Indicates whether this is interlaced 581 u8 ycmux_mode; /* This mode requires one (0) or two (1)
582 * or progressive format */ 582 channels */
583 u8 ycmux_mode; /* Indicates whether this mode requires 583 u16 eav2sav; /* length of eav 2 sav */
584 * single or two channels */
585 u16 eav2sav; /* length of sav 2 eav */
586 u16 sav2eav; /* length of sav 2 eav */ 584 u16 sav2eav; /* length of sav 2 eav */
587 u16 l1, l3, l5, l7, l9, l11; /* Other parameter configurations */ 585 u16 l1, l3, l5, l7, l9, l11; /* Other parameter configurations */
588 u16 vsize; /* Vertical size of the image */ 586 u16 vsize; /* Vertical size of the image */
@@ -590,10 +588,14 @@ struct vpif_channel_config_params {
590 * is in BT or in CCD/CMOS */ 588 * is in BT or in CCD/CMOS */
591 u8 vbi_supported; /* Indicates whether this mode 589 u8 vbi_supported; /* Indicates whether this mode
592 * supports capturing vbi or not */ 590 * supports capturing vbi or not */
593 u8 hd_sd; 591 u8 hd_sd; /* HDTV (1) or SDTV (0) format */
594 v4l2_std_id stdid; 592 v4l2_std_id stdid; /* SDTV format */
593 u32 dv_preset; /* HDTV format */
595}; 594};
596 595
596extern const unsigned int vpif_ch_params_count;
597extern const struct vpif_channel_config_params ch_params[];
598
597struct vpif_video_params; 599struct vpif_video_params;
598struct vpif_params; 600struct vpif_params;
599struct vpif_vbi_params; 601struct vpif_vbi_params;
diff --git a/drivers/media/video/davinci/vpif_capture.c b/drivers/media/video/davinci/vpif_capture.c
index 193abab6b355..d93ad74a34c5 100644
--- a/drivers/media/video/davinci/vpif_capture.c
+++ b/drivers/media/video/davinci/vpif_capture.c
@@ -37,6 +37,7 @@
37#include <linux/slab.h> 37#include <linux/slab.h>
38#include <media/v4l2-device.h> 38#include <media/v4l2-device.h>
39#include <media/v4l2-ioctl.h> 39#include <media/v4l2-ioctl.h>
40#include <media/v4l2-chip-ident.h>
40 41
41#include "vpif_capture.h" 42#include "vpif_capture.h"
42#include "vpif.h" 43#include "vpif.h"
@@ -81,20 +82,6 @@ static struct vpif_device vpif_obj = { {NULL} };
81static struct device *vpif_dev; 82static struct device *vpif_dev;
82 83
83/** 84/**
84 * ch_params: video standard configuration parameters for vpif
85 */
86static const struct vpif_channel_config_params ch_params[] = {
87 {
88 "NTSC_M", 720, 480, 30, 0, 1, 268, 1440, 1, 23, 263, 266,
89 286, 525, 525, 0, 1, 0, V4L2_STD_525_60,
90 },
91 {
92 "PAL_BDGHIK", 720, 576, 25, 0, 1, 280, 1440, 1, 23, 311, 313,
93 336, 624, 625, 0, 1, 0, V4L2_STD_625_50,
94 },
95};
96
97/**
98 * vpif_uservirt_to_phys : translate user/virtual address to phy address 85 * vpif_uservirt_to_phys : translate user/virtual address to phy address
99 * @virtp: user/virtual address 86 * @virtp: user/virtual address
100 * 87 *
@@ -342,7 +329,7 @@ static void vpif_schedule_next_buffer(struct common_obj *common)
342 * @dev_id: dev_id ptr 329 * @dev_id: dev_id ptr
343 * 330 *
344 * It changes status of the captured buffer, takes next buffer from the queue 331 * It changes status of the captured buffer, takes next buffer from the queue
345 * and sets its address in VPIF registers 332 * and sets its address in VPIF registers
346 */ 333 */
347static irqreturn_t vpif_channel_isr(int irq, void *dev_id) 334static irqreturn_t vpif_channel_isr(int irq, void *dev_id)
348{ 335{
@@ -435,24 +422,31 @@ static int vpif_update_std_info(struct channel_obj *ch)
435 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX]; 422 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
436 struct vpif_params *vpifparams = &ch->vpifparams; 423 struct vpif_params *vpifparams = &ch->vpifparams;
437 const struct vpif_channel_config_params *config; 424 const struct vpif_channel_config_params *config;
438 struct vpif_channel_config_params *std_info; 425 struct vpif_channel_config_params *std_info = &vpifparams->std_info;
439 struct video_obj *vid_ch = &ch->video; 426 struct video_obj *vid_ch = &ch->video;
440 int index; 427 int index;
441 428
442 vpif_dbg(2, debug, "vpif_update_std_info\n"); 429 vpif_dbg(2, debug, "vpif_update_std_info\n");
443 430
444 std_info = &vpifparams->std_info; 431 for (index = 0; index < vpif_ch_params_count; index++) {
445
446 for (index = 0; index < ARRAY_SIZE(ch_params); index++) {
447 config = &ch_params[index]; 432 config = &ch_params[index];
448 if (config->stdid & vid_ch->stdid) { 433 if (config->hd_sd == 0) {
449 memcpy(std_info, config, sizeof(*config)); 434 vpif_dbg(2, debug, "SD format\n");
450 break; 435 if (config->stdid & vid_ch->stdid) {
436 memcpy(std_info, config, sizeof(*config));
437 break;
438 }
439 } else {
440 vpif_dbg(2, debug, "HD format\n");
441 if (config->dv_preset == vid_ch->dv_preset) {
442 memcpy(std_info, config, sizeof(*config));
443 break;
444 }
451 } 445 }
452 } 446 }
453 447
454 /* standard not found */ 448 /* standard not found */
455 if (index == ARRAY_SIZE(ch_params)) 449 if (index == vpif_ch_params_count)
456 return -EINVAL; 450 return -EINVAL;
457 451
458 common->fmt.fmt.pix.width = std_info->width; 452 common->fmt.fmt.pix.width = std_info->width;
@@ -462,6 +456,7 @@ static int vpif_update_std_info(struct channel_obj *ch)
462 common->fmt.fmt.pix.bytesperline = std_info->width; 456 common->fmt.fmt.pix.bytesperline = std_info->width;
463 vpifparams->video_params.hpitch = std_info->width; 457 vpifparams->video_params.hpitch = std_info->width;
464 vpifparams->video_params.storage_mode = std_info->frm_fmt; 458 vpifparams->video_params.storage_mode = std_info->frm_fmt;
459
465 return 0; 460 return 0;
466} 461}
467 462
@@ -757,7 +752,7 @@ static int vpif_open(struct file *filep)
757 struct video_obj *vid_ch; 752 struct video_obj *vid_ch;
758 struct channel_obj *ch; 753 struct channel_obj *ch;
759 struct vpif_fh *fh; 754 struct vpif_fh *fh;
760 int i, ret = 0; 755 int i;
761 756
762 vpif_dbg(2, debug, "vpif_open\n"); 757 vpif_dbg(2, debug, "vpif_open\n");
763 758
@@ -766,9 +761,6 @@ static int vpif_open(struct file *filep)
766 vid_ch = &ch->video; 761 vid_ch = &ch->video;
767 common = &ch->common[VPIF_VIDEO_INDEX]; 762 common = &ch->common[VPIF_VIDEO_INDEX];
768 763
769 if (mutex_lock_interruptible(&common->lock))
770 return -ERESTARTSYS;
771
772 if (NULL == ch->curr_subdev_info) { 764 if (NULL == ch->curr_subdev_info) {
773 /** 765 /**
774 * search through the sub device to see a registered 766 * search through the sub device to see a registered
@@ -785,8 +777,7 @@ static int vpif_open(struct file *filep)
785 } 777 }
786 if (i == config->subdev_count) { 778 if (i == config->subdev_count) {
787 vpif_err("No sub device registered\n"); 779 vpif_err("No sub device registered\n");
788 ret = -ENOENT; 780 return -ENOENT;
789 goto exit;
790 } 781 }
791 } 782 }
792 783
@@ -794,8 +785,7 @@ static int vpif_open(struct file *filep)
794 fh = kzalloc(sizeof(struct vpif_fh), GFP_KERNEL); 785 fh = kzalloc(sizeof(struct vpif_fh), GFP_KERNEL);
795 if (NULL == fh) { 786 if (NULL == fh) {
796 vpif_err("unable to allocate memory for file handle object\n"); 787 vpif_err("unable to allocate memory for file handle object\n");
797 ret = -ENOMEM; 788 return -ENOMEM;
798 goto exit;
799 } 789 }
800 790
801 /* store pointer to fh in private_data member of filep */ 791 /* store pointer to fh in private_data member of filep */
@@ -815,9 +805,7 @@ static int vpif_open(struct file *filep)
815 /* Initialize priority of this instance to default priority */ 805 /* Initialize priority of this instance to default priority */
816 fh->prio = V4L2_PRIORITY_UNSET; 806 fh->prio = V4L2_PRIORITY_UNSET;
817 v4l2_prio_open(&ch->prio, &fh->prio); 807 v4l2_prio_open(&ch->prio, &fh->prio);
818exit: 808 return 0;
819 mutex_unlock(&common->lock);
820 return ret;
821} 809}
822 810
823/** 811/**
@@ -837,9 +825,6 @@ static int vpif_release(struct file *filep)
837 825
838 common = &ch->common[VPIF_VIDEO_INDEX]; 826 common = &ch->common[VPIF_VIDEO_INDEX];
839 827
840 if (mutex_lock_interruptible(&common->lock))
841 return -ERESTARTSYS;
842
843 /* if this instance is doing IO */ 828 /* if this instance is doing IO */
844 if (fh->io_allowed[VPIF_VIDEO_INDEX]) { 829 if (fh->io_allowed[VPIF_VIDEO_INDEX]) {
845 /* Reset io_usrs member of channel object */ 830 /* Reset io_usrs member of channel object */
@@ -863,9 +848,6 @@ static int vpif_release(struct file *filep)
863 /* Decrement channel usrs counter */ 848 /* Decrement channel usrs counter */
864 ch->usrs--; 849 ch->usrs--;
865 850
866 /* unlock mutex on channel object */
867 mutex_unlock(&common->lock);
868
869 /* Close the priority */ 851 /* Close the priority */
870 v4l2_prio_close(&ch->prio, fh->prio); 852 v4l2_prio_close(&ch->prio, fh->prio);
871 853
@@ -890,7 +872,6 @@ static int vpif_reqbufs(struct file *file, void *priv,
890 struct channel_obj *ch = fh->channel; 872 struct channel_obj *ch = fh->channel;
891 struct common_obj *common; 873 struct common_obj *common;
892 u8 index = 0; 874 u8 index = 0;
893 int ret = 0;
894 875
895 vpif_dbg(2, debug, "vpif_reqbufs\n"); 876 vpif_dbg(2, debug, "vpif_reqbufs\n");
896 877
@@ -913,13 +894,8 @@ static int vpif_reqbufs(struct file *file, void *priv,
913 894
914 common = &ch->common[index]; 895 common = &ch->common[index];
915 896
916 if (mutex_lock_interruptible(&common->lock)) 897 if (0 != common->io_usrs)
917 return -ERESTARTSYS; 898 return -EBUSY;
918
919 if (0 != common->io_usrs) {
920 ret = -EBUSY;
921 goto reqbuf_exit;
922 }
923 899
924 /* Initialize videobuf queue as per the buffer type */ 900 /* Initialize videobuf queue as per the buffer type */
925 videobuf_queue_dma_contig_init(&common->buffer_queue, 901 videobuf_queue_dma_contig_init(&common->buffer_queue,
@@ -928,7 +904,7 @@ static int vpif_reqbufs(struct file *file, void *priv,
928 reqbuf->type, 904 reqbuf->type,
929 common->fmt.fmt.pix.field, 905 common->fmt.fmt.pix.field,
930 sizeof(struct videobuf_buffer), fh, 906 sizeof(struct videobuf_buffer), fh,
931 NULL); 907 &common->lock);
932 908
933 /* Set io allowed member of file handle to TRUE */ 909 /* Set io allowed member of file handle to TRUE */
934 fh->io_allowed[index] = 1; 910 fh->io_allowed[index] = 1;
@@ -939,11 +915,7 @@ static int vpif_reqbufs(struct file *file, void *priv,
939 INIT_LIST_HEAD(&common->dma_queue); 915 INIT_LIST_HEAD(&common->dma_queue);
940 916
941 /* Allocate buffers */ 917 /* Allocate buffers */
942 ret = videobuf_reqbufs(&common->buffer_queue, reqbuf); 918 return videobuf_reqbufs(&common->buffer_queue, reqbuf);
943
944reqbuf_exit:
945 mutex_unlock(&common->lock);
946 return ret;
947} 919}
948 920
949/** 921/**
@@ -1157,11 +1129,6 @@ static int vpif_streamon(struct file *file, void *priv,
1157 return ret; 1129 return ret;
1158 } 1130 }
1159 1131
1160 if (mutex_lock_interruptible(&common->lock)) {
1161 ret = -ERESTARTSYS;
1162 goto streamoff_exit;
1163 }
1164
1165 /* If buffer queue is empty, return error */ 1132 /* If buffer queue is empty, return error */
1166 if (list_empty(&common->dma_queue)) { 1133 if (list_empty(&common->dma_queue)) {
1167 vpif_dbg(1, debug, "buffer queue is empty\n"); 1134 vpif_dbg(1, debug, "buffer queue is empty\n");
@@ -1240,13 +1207,10 @@ static int vpif_streamon(struct file *file, void *priv,
1240 enable_channel1(1); 1207 enable_channel1(1);
1241 } 1208 }
1242 channel_first_int[VPIF_VIDEO_INDEX][ch->channel_id] = 1; 1209 channel_first_int[VPIF_VIDEO_INDEX][ch->channel_id] = 1;
1243 mutex_unlock(&common->lock);
1244 return ret; 1210 return ret;
1245 1211
1246exit: 1212exit:
1247 mutex_unlock(&common->lock); 1213 videobuf_streamoff(&common->buffer_queue);
1248streamoff_exit:
1249 ret = videobuf_streamoff(&common->buffer_queue);
1250 return ret; 1214 return ret;
1251} 1215}
1252 1216
@@ -1284,9 +1248,6 @@ static int vpif_streamoff(struct file *file, void *priv,
1284 return -EINVAL; 1248 return -EINVAL;
1285 } 1249 }
1286 1250
1287 if (mutex_lock_interruptible(&common->lock))
1288 return -ERESTARTSYS;
1289
1290 /* disable channel */ 1251 /* disable channel */
1291 if (VPIF_CHANNEL0_VIDEO == ch->channel_id) { 1252 if (VPIF_CHANNEL0_VIDEO == ch->channel_id) {
1292 enable_channel0(0); 1253 enable_channel0(0);
@@ -1304,8 +1265,6 @@ static int vpif_streamoff(struct file *file, void *priv,
1304 if (ret && (ret != -ENOIOCTLCMD)) 1265 if (ret && (ret != -ENOIOCTLCMD))
1305 vpif_dbg(1, debug, "stream off failed in subdev\n"); 1266 vpif_dbg(1, debug, "stream off failed in subdev\n");
1306 1267
1307 mutex_unlock(&common->lock);
1308
1309 return videobuf_streamoff(&common->buffer_queue); 1268 return videobuf_streamoff(&common->buffer_queue);
1310} 1269}
1311 1270
@@ -1381,21 +1340,16 @@ static int vpif_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
1381{ 1340{
1382 struct vpif_fh *fh = priv; 1341 struct vpif_fh *fh = priv;
1383 struct channel_obj *ch = fh->channel; 1342 struct channel_obj *ch = fh->channel;
1384 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
1385 int ret = 0; 1343 int ret = 0;
1386 1344
1387 vpif_dbg(2, debug, "vpif_querystd\n"); 1345 vpif_dbg(2, debug, "vpif_querystd\n");
1388 1346
1389 if (mutex_lock_interruptible(&common->lock))
1390 return -ERESTARTSYS;
1391
1392 /* Call querystd function of decoder device */ 1347 /* Call querystd function of decoder device */
1393 ret = v4l2_subdev_call(vpif_obj.sd[ch->curr_sd_index], video, 1348 ret = v4l2_subdev_call(vpif_obj.sd[ch->curr_sd_index], video,
1394 querystd, std_id); 1349 querystd, std_id);
1395 if (ret < 0) 1350 if (ret < 0)
1396 vpif_dbg(1, debug, "Failed to set standard for sub devices\n"); 1351 vpif_dbg(1, debug, "Failed to set standard for sub devices\n");
1397 1352
1398 mutex_unlock(&common->lock);
1399 return ret; 1353 return ret;
1400} 1354}
1401 1355
@@ -1451,16 +1405,14 @@ static int vpif_s_std(struct file *file, void *priv, v4l2_std_id *std_id)
1451 fh->initialized = 1; 1405 fh->initialized = 1;
1452 1406
1453 /* Call encoder subdevice function to set the standard */ 1407 /* Call encoder subdevice function to set the standard */
1454 if (mutex_lock_interruptible(&common->lock))
1455 return -ERESTARTSYS;
1456
1457 ch->video.stdid = *std_id; 1408 ch->video.stdid = *std_id;
1409 ch->video.dv_preset = V4L2_DV_INVALID;
1410 memset(&ch->video.bt_timings, 0, sizeof(ch->video.bt_timings));
1458 1411
1459 /* Get the information about the standard */ 1412 /* Get the information about the standard */
1460 if (vpif_update_std_info(ch)) { 1413 if (vpif_update_std_info(ch)) {
1461 ret = -EINVAL;
1462 vpif_err("Error getting the standard info\n"); 1414 vpif_err("Error getting the standard info\n");
1463 goto s_std_exit; 1415 return -EINVAL;
1464 } 1416 }
1465 1417
1466 /* Configure the default format information */ 1418 /* Configure the default format information */
@@ -1471,9 +1423,6 @@ static int vpif_s_std(struct file *file, void *priv, v4l2_std_id *std_id)
1471 s_std, *std_id); 1423 s_std, *std_id);
1472 if (ret < 0) 1424 if (ret < 0)
1473 vpif_dbg(1, debug, "Failed to set standard for sub devices\n"); 1425 vpif_dbg(1, debug, "Failed to set standard for sub devices\n");
1474
1475s_std_exit:
1476 mutex_unlock(&common->lock);
1477 return ret; 1426 return ret;
1478} 1427}
1479 1428
@@ -1567,9 +1516,6 @@ static int vpif_s_input(struct file *file, void *priv, unsigned int index)
1567 return -EINVAL; 1516 return -EINVAL;
1568 } 1517 }
1569 1518
1570 if (mutex_lock_interruptible(&common->lock))
1571 return -ERESTARTSYS;
1572
1573 /* first setup input path from sub device to vpif */ 1519 /* first setup input path from sub device to vpif */
1574 if (config->setup_input_path) { 1520 if (config->setup_input_path) {
1575 ret = config->setup_input_path(ch->channel_id, 1521 ret = config->setup_input_path(ch->channel_id,
@@ -1578,7 +1524,7 @@ static int vpif_s_input(struct file *file, void *priv, unsigned int index)
1578 vpif_dbg(1, debug, "couldn't setup input path for the" 1524 vpif_dbg(1, debug, "couldn't setup input path for the"
1579 " sub device %s, for input index %d\n", 1525 " sub device %s, for input index %d\n",
1580 subdev_info->name, index); 1526 subdev_info->name, index);
1581 goto exit; 1527 return ret;
1582 } 1528 }
1583 } 1529 }
1584 1530
@@ -1589,7 +1535,7 @@ static int vpif_s_input(struct file *file, void *priv, unsigned int index)
1589 input, output, 0); 1535 input, output, 0);
1590 if (ret < 0) { 1536 if (ret < 0) {
1591 vpif_dbg(1, debug, "Failed to set input\n"); 1537 vpif_dbg(1, debug, "Failed to set input\n");
1592 goto exit; 1538 return ret;
1593 } 1539 }
1594 } 1540 }
1595 vid_ch->input_idx = index; 1541 vid_ch->input_idx = index;
@@ -1600,9 +1546,6 @@ static int vpif_s_input(struct file *file, void *priv, unsigned int index)
1600 1546
1601 /* update tvnorms from the sub device input info */ 1547 /* update tvnorms from the sub device input info */
1602 ch->video_dev->tvnorms = chan_cfg->inputs[index].input.std; 1548 ch->video_dev->tvnorms = chan_cfg->inputs[index].input.std;
1603
1604exit:
1605 mutex_unlock(&common->lock);
1606 return ret; 1549 return ret;
1607} 1550}
1608 1551
@@ -1671,11 +1614,7 @@ static int vpif_g_fmt_vid_cap(struct file *file, void *priv,
1671 return -EINVAL; 1614 return -EINVAL;
1672 1615
1673 /* Fill in the information about format */ 1616 /* Fill in the information about format */
1674 if (mutex_lock_interruptible(&common->lock))
1675 return -ERESTARTSYS;
1676
1677 *fmt = common->fmt; 1617 *fmt = common->fmt;
1678 mutex_unlock(&common->lock);
1679 return 0; 1618 return 0;
1680} 1619}
1681 1620
@@ -1694,7 +1633,7 @@ static int vpif_s_fmt_vid_cap(struct file *file, void *priv,
1694 struct v4l2_pix_format *pixfmt; 1633 struct v4l2_pix_format *pixfmt;
1695 int ret = 0; 1634 int ret = 0;
1696 1635
1697 vpif_dbg(2, debug, "VIDIOC_S_FMT\n"); 1636 vpif_dbg(2, debug, "%s\n", __func__);
1698 1637
1699 /* If streaming is started, return error */ 1638 /* If streaming is started, return error */
1700 if (common->started) { 1639 if (common->started) {
@@ -1723,12 +1662,7 @@ static int vpif_s_fmt_vid_cap(struct file *file, void *priv,
1723 if (ret) 1662 if (ret)
1724 return ret; 1663 return ret;
1725 /* store the format in the channel object */ 1664 /* store the format in the channel object */
1726 if (mutex_lock_interruptible(&common->lock))
1727 return -ERESTARTSYS;
1728
1729 common->fmt = *fmt; 1665 common->fmt = *fmt;
1730 mutex_unlock(&common->lock);
1731
1732 return 0; 1666 return 0;
1733} 1667}
1734 1668
@@ -1807,6 +1741,306 @@ static int vpif_cropcap(struct file *file, void *priv,
1807 return 0; 1741 return 0;
1808} 1742}
1809 1743
1744/**
1745 * vpif_enum_dv_presets() - ENUM_DV_PRESETS handler
1746 * @file: file ptr
1747 * @priv: file handle
1748 * @preset: input preset
1749 */
1750static int vpif_enum_dv_presets(struct file *file, void *priv,
1751 struct v4l2_dv_enum_preset *preset)
1752{
1753 struct vpif_fh *fh = priv;
1754 struct channel_obj *ch = fh->channel;
1755
1756 return v4l2_subdev_call(vpif_obj.sd[ch->curr_sd_index],
1757 video, enum_dv_presets, preset);
1758}
1759
1760/**
1761 * vpif_query_dv_presets() - QUERY_DV_PRESET handler
1762 * @file: file ptr
1763 * @priv: file handle
1764 * @preset: input preset
1765 */
1766static int vpif_query_dv_preset(struct file *file, void *priv,
1767 struct v4l2_dv_preset *preset)
1768{
1769 struct vpif_fh *fh = priv;
1770 struct channel_obj *ch = fh->channel;
1771
1772 return v4l2_subdev_call(vpif_obj.sd[ch->curr_sd_index],
1773 video, query_dv_preset, preset);
1774}
1775/**
1776 * vpif_s_dv_presets() - S_DV_PRESETS handler
1777 * @file: file ptr
1778 * @priv: file handle
1779 * @preset: input preset
1780 */
1781static int vpif_s_dv_preset(struct file *file, void *priv,
1782 struct v4l2_dv_preset *preset)
1783{
1784 struct vpif_fh *fh = priv;
1785 struct channel_obj *ch = fh->channel;
1786 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
1787 int ret = 0;
1788
1789 if (common->started) {
1790 vpif_dbg(1, debug, "streaming in progress\n");
1791 return -EBUSY;
1792 }
1793
1794 if ((VPIF_CHANNEL0_VIDEO == ch->channel_id) ||
1795 (VPIF_CHANNEL1_VIDEO == ch->channel_id)) {
1796 if (!fh->initialized) {
1797 vpif_dbg(1, debug, "Channel Busy\n");
1798 return -EBUSY;
1799 }
1800 }
1801
1802 ret = v4l2_prio_check(&ch->prio, fh->prio);
1803 if (ret)
1804 return ret;
1805
1806 fh->initialized = 1;
1807
1808 /* Call encoder subdevice function to set the standard */
1809 if (mutex_lock_interruptible(&common->lock))
1810 return -ERESTARTSYS;
1811
1812 ch->video.dv_preset = preset->preset;
1813 ch->video.stdid = V4L2_STD_UNKNOWN;
1814 memset(&ch->video.bt_timings, 0, sizeof(ch->video.bt_timings));
1815
1816 /* Get the information about the standard */
1817 if (vpif_update_std_info(ch)) {
1818 vpif_dbg(1, debug, "Error getting the standard info\n");
1819 ret = -EINVAL;
1820 } else {
1821 /* Configure the default format information */
1822 vpif_config_format(ch);
1823
1824 ret = v4l2_subdev_call(vpif_obj.sd[ch->curr_sd_index],
1825 video, s_dv_preset, preset);
1826 }
1827
1828 mutex_unlock(&common->lock);
1829
1830 return ret;
1831}
1832/**
1833 * vpif_g_dv_presets() - G_DV_PRESETS handler
1834 * @file: file ptr
1835 * @priv: file handle
1836 * @preset: input preset
1837 */
1838static int vpif_g_dv_preset(struct file *file, void *priv,
1839 struct v4l2_dv_preset *preset)
1840{
1841 struct vpif_fh *fh = priv;
1842 struct channel_obj *ch = fh->channel;
1843
1844 preset->preset = ch->video.dv_preset;
1845
1846 return 0;
1847}
1848
1849/**
1850 * vpif_s_dv_timings() - S_DV_TIMINGS handler
1851 * @file: file ptr
1852 * @priv: file handle
1853 * @timings: digital video timings
1854 */
1855static int vpif_s_dv_timings(struct file *file, void *priv,
1856 struct v4l2_dv_timings *timings)
1857{
1858 struct vpif_fh *fh = priv;
1859 struct channel_obj *ch = fh->channel;
1860 struct vpif_params *vpifparams = &ch->vpifparams;
1861 struct vpif_channel_config_params *std_info = &vpifparams->std_info;
1862 struct video_obj *vid_ch = &ch->video;
1863 struct v4l2_bt_timings *bt = &vid_ch->bt_timings;
1864 int ret;
1865
1866 if (timings->type != V4L2_DV_BT_656_1120) {
1867 vpif_dbg(2, debug, "Timing type not defined\n");
1868 return -EINVAL;
1869 }
1870
1871 /* Configure subdevice timings, if any */
1872 ret = v4l2_subdev_call(vpif_obj.sd[ch->curr_sd_index],
1873 video, s_dv_timings, timings);
1874 if (ret == -ENOIOCTLCMD) {
1875 vpif_dbg(2, debug, "Custom DV timings not supported by "
1876 "subdevice\n");
1877 return -EINVAL;
1878 }
1879 if (ret < 0) {
1880 vpif_dbg(2, debug, "Error setting custom DV timings\n");
1881 return ret;
1882 }
1883
1884 if (!(timings->bt.width && timings->bt.height &&
1885 (timings->bt.hbackporch ||
1886 timings->bt.hfrontporch ||
1887 timings->bt.hsync) &&
1888 timings->bt.vfrontporch &&
1889 (timings->bt.vbackporch ||
1890 timings->bt.vsync))) {
1891 vpif_dbg(2, debug, "Timings for width, height, "
1892 "horizontal back porch, horizontal sync, "
1893 "horizontal front porch, vertical back porch, "
1894 "vertical sync and vertical back porch "
1895 "must be defined\n");
1896 return -EINVAL;
1897 }
1898
1899 *bt = timings->bt;
1900
1901 /* Configure video port timings */
1902
1903 std_info->eav2sav = bt->hbackporch + bt->hfrontporch +
1904 bt->hsync - 8;
1905 std_info->sav2eav = bt->width;
1906
1907 std_info->l1 = 1;
1908 std_info->l3 = bt->vsync + bt->vbackporch + 1;
1909
1910 if (bt->interlaced) {
1911 if (bt->il_vbackporch || bt->il_vfrontporch || bt->il_vsync) {
1912 std_info->vsize = bt->height * 2 +
1913 bt->vfrontporch + bt->vsync + bt->vbackporch +
1914 bt->il_vfrontporch + bt->il_vsync +
1915 bt->il_vbackporch;
1916 std_info->l5 = std_info->vsize/2 -
1917 (bt->vfrontporch - 1);
1918 std_info->l7 = std_info->vsize/2 + 1;
1919 std_info->l9 = std_info->l7 + bt->il_vsync +
1920 bt->il_vbackporch + 1;
1921 std_info->l11 = std_info->vsize -
1922 (bt->il_vfrontporch - 1);
1923 } else {
1924 vpif_dbg(2, debug, "Required timing values for "
1925 "interlaced BT format missing\n");
1926 return -EINVAL;
1927 }
1928 } else {
1929 std_info->vsize = bt->height + bt->vfrontporch +
1930 bt->vsync + bt->vbackporch;
1931 std_info->l5 = std_info->vsize - (bt->vfrontporch - 1);
1932 }
1933 strncpy(std_info->name, "Custom timings BT656/1120", VPIF_MAX_NAME);
1934 std_info->width = bt->width;
1935 std_info->height = bt->height;
1936 std_info->frm_fmt = bt->interlaced ? 0 : 1;
1937 std_info->ycmux_mode = 0;
1938 std_info->capture_format = 0;
1939 std_info->vbi_supported = 0;
1940 std_info->hd_sd = 1;
1941 std_info->stdid = 0;
1942 std_info->dv_preset = V4L2_DV_INVALID;
1943
1944 vid_ch->stdid = 0;
1945 vid_ch->dv_preset = V4L2_DV_INVALID;
1946 return 0;
1947}
1948
1949/**
1950 * vpif_g_dv_timings() - G_DV_TIMINGS handler
1951 * @file: file ptr
1952 * @priv: file handle
1953 * @timings: digital video timings
1954 */
1955static int vpif_g_dv_timings(struct file *file, void *priv,
1956 struct v4l2_dv_timings *timings)
1957{
1958 struct vpif_fh *fh = priv;
1959 struct channel_obj *ch = fh->channel;
1960 struct video_obj *vid_ch = &ch->video;
1961 struct v4l2_bt_timings *bt = &vid_ch->bt_timings;
1962
1963 timings->bt = *bt;
1964
1965 return 0;
1966}
1967
1968/*
1969 * vpif_g_chip_ident() - Identify the chip
1970 * @file: file ptr
1971 * @priv: file handle
1972 * @chip: chip identity
1973 *
1974 * Returns zero or -EINVAL if read operations fails.
1975 */
1976static int vpif_g_chip_ident(struct file *file, void *priv,
1977 struct v4l2_dbg_chip_ident *chip)
1978{
1979 chip->ident = V4L2_IDENT_NONE;
1980 chip->revision = 0;
1981 if (chip->match.type != V4L2_CHIP_MATCH_I2C_DRIVER &&
1982 chip->match.type != V4L2_CHIP_MATCH_I2C_ADDR) {
1983 vpif_dbg(2, debug, "match_type is invalid.\n");
1984 return -EINVAL;
1985 }
1986
1987 return v4l2_device_call_until_err(&vpif_obj.v4l2_dev, 0, core,
1988 g_chip_ident, chip);
1989}
1990
1991#ifdef CONFIG_VIDEO_ADV_DEBUG
1992/*
1993 * vpif_dbg_g_register() - Read register
1994 * @file: file ptr
1995 * @priv: file handle
1996 * @reg: register to be read
1997 *
1998 * Debugging only
1999 * Returns zero or -EINVAL if read operations fails.
2000 */
2001static int vpif_dbg_g_register(struct file *file, void *priv,
2002 struct v4l2_dbg_register *reg){
2003 struct vpif_fh *fh = priv;
2004 struct channel_obj *ch = fh->channel;
2005
2006 return v4l2_subdev_call(vpif_obj.sd[ch->curr_sd_index], core,
2007 g_register, reg);
2008}
2009
2010/*
2011 * vpif_dbg_s_register() - Write to register
2012 * @file: file ptr
2013 * @priv: file handle
2014 * @reg: register to be modified
2015 *
2016 * Debugging only
2017 * Returns zero or -EINVAL if write operations fails.
2018 */
2019static int vpif_dbg_s_register(struct file *file, void *priv,
2020 struct v4l2_dbg_register *reg){
2021 struct vpif_fh *fh = priv;
2022 struct channel_obj *ch = fh->channel;
2023
2024 return v4l2_subdev_call(vpif_obj.sd[ch->curr_sd_index], core,
2025 s_register, reg);
2026}
2027#endif
2028
2029/*
2030 * vpif_log_status() - Status information
2031 * @file: file ptr
2032 * @priv: file handle
2033 *
2034 * Returns zero.
2035 */
2036static int vpif_log_status(struct file *filep, void *priv)
2037{
2038 /* status for sub devices */
2039 v4l2_device_call_all(&vpif_obj.v4l2_dev, 0, core, log_status);
2040
2041 return 0;
2042}
2043
1810/* vpif capture ioctl operations */ 2044/* vpif capture ioctl operations */
1811static const struct v4l2_ioctl_ops vpif_ioctl_ops = { 2045static const struct v4l2_ioctl_ops vpif_ioctl_ops = {
1812 .vidioc_querycap = vpif_querycap, 2046 .vidioc_querycap = vpif_querycap,
@@ -1829,6 +2063,18 @@ static const struct v4l2_ioctl_ops vpif_ioctl_ops = {
1829 .vidioc_streamon = vpif_streamon, 2063 .vidioc_streamon = vpif_streamon,
1830 .vidioc_streamoff = vpif_streamoff, 2064 .vidioc_streamoff = vpif_streamoff,
1831 .vidioc_cropcap = vpif_cropcap, 2065 .vidioc_cropcap = vpif_cropcap,
2066 .vidioc_enum_dv_presets = vpif_enum_dv_presets,
2067 .vidioc_s_dv_preset = vpif_s_dv_preset,
2068 .vidioc_g_dv_preset = vpif_g_dv_preset,
2069 .vidioc_query_dv_preset = vpif_query_dv_preset,
2070 .vidioc_s_dv_timings = vpif_s_dv_timings,
2071 .vidioc_g_dv_timings = vpif_g_dv_timings,
2072 .vidioc_g_chip_ident = vpif_g_chip_ident,
2073#ifdef CONFIG_VIDEO_ADV_DEBUG
2074 .vidioc_g_register = vpif_dbg_g_register,
2075 .vidioc_s_register = vpif_dbg_s_register,
2076#endif
2077 .vidioc_log_status = vpif_log_status,
1832}; 2078};
1833 2079
1834/* vpif file operations */ 2080/* vpif file operations */
@@ -1836,7 +2082,7 @@ static struct v4l2_file_operations vpif_fops = {
1836 .owner = THIS_MODULE, 2082 .owner = THIS_MODULE,
1837 .open = vpif_open, 2083 .open = vpif_open,
1838 .release = vpif_release, 2084 .release = vpif_release,
1839 .ioctl = video_ioctl2, 2085 .unlocked_ioctl = video_ioctl2,
1840 .mmap = vpif_mmap, 2086 .mmap = vpif_mmap,
1841 .poll = vpif_poll 2087 .poll = vpif_poll
1842}; 2088};
@@ -1979,6 +2225,7 @@ static __init int vpif_probe(struct platform_device *pdev)
1979 common = &(ch->common[VPIF_VIDEO_INDEX]); 2225 common = &(ch->common[VPIF_VIDEO_INDEX]);
1980 spin_lock_init(&common->irqlock); 2226 spin_lock_init(&common->irqlock);
1981 mutex_init(&common->lock); 2227 mutex_init(&common->lock);
2228 ch->video_dev->lock = &common->lock;
1982 /* Initialize prio member of channel object */ 2229 /* Initialize prio member of channel object */
1983 v4l2_prio_init(&ch->prio); 2230 v4l2_prio_init(&ch->prio);
1984 err = video_register_device(ch->video_dev, 2231 err = video_register_device(ch->video_dev,
@@ -2026,9 +2273,9 @@ static __init int vpif_probe(struct platform_device *pdev)
2026 if (vpif_obj.sd[i]) 2273 if (vpif_obj.sd[i])
2027 vpif_obj.sd[i]->grp_id = 1 << i; 2274 vpif_obj.sd[i]->grp_id = 1 << i;
2028 } 2275 }
2029 v4l2_info(&vpif_obj.v4l2_dev, "DM646x VPIF Capture driver"
2030 " initialized\n");
2031 2276
2277 v4l2_info(&vpif_obj.v4l2_dev,
2278 "DM646x VPIF capture driver initialized\n");
2032 return 0; 2279 return 0;
2033 2280
2034probe_subdev_out: 2281probe_subdev_out:
diff --git a/drivers/media/video/davinci/vpif_capture.h b/drivers/media/video/davinci/vpif_capture.h
index 4e12ec8cac6f..7a4196dfdce1 100644
--- a/drivers/media/video/davinci/vpif_capture.h
+++ b/drivers/media/video/davinci/vpif_capture.h
@@ -59,6 +59,8 @@ struct video_obj {
59 enum v4l2_field buf_field; 59 enum v4l2_field buf_field;
60 /* Currently selected or default standard */ 60 /* Currently selected or default standard */
61 v4l2_std_id stdid; 61 v4l2_std_id stdid;
62 u32 dv_preset;
63 struct v4l2_bt_timings bt_timings;
62 /* This is to track the last input that is passed to application */ 64 /* This is to track the last input that is passed to application */
63 u32 input_idx; 65 u32 input_idx;
64}; 66};
diff --git a/drivers/media/video/davinci/vpif_display.c b/drivers/media/video/davinci/vpif_display.c
index 412c65d54fe1..cdf659abdc2a 100644
--- a/drivers/media/video/davinci/vpif_display.c
+++ b/drivers/media/video/davinci/vpif_display.c
@@ -38,6 +38,7 @@
38#include <media/adv7343.h> 38#include <media/adv7343.h>
39#include <media/v4l2-device.h> 39#include <media/v4l2-device.h>
40#include <media/v4l2-ioctl.h> 40#include <media/v4l2-ioctl.h>
41#include <media/v4l2-chip-ident.h>
41 42
42#include <mach/dm646x.h> 43#include <mach/dm646x.h>
43 44
@@ -84,17 +85,6 @@ static struct vpif_config_params config_params = {
84static struct vpif_device vpif_obj = { {NULL} }; 85static struct vpif_device vpif_obj = { {NULL} };
85static struct device *vpif_dev; 86static struct device *vpif_dev;
86 87
87static const struct vpif_channel_config_params ch_params[] = {
88 {
89 "NTSC", 720, 480, 30, 0, 1, 268, 1440, 1, 23, 263, 266,
90 286, 525, 525, 0, 1, 0, V4L2_STD_525_60,
91 },
92 {
93 "PAL", 720, 576, 25, 0, 1, 280, 1440, 1, 23, 311, 313,
94 336, 624, 625, 0, 1, 0, V4L2_STD_625_50,
95 },
96};
97
98/* 88/*
99 * vpif_uservirt_to_phys: This function is used to convert user 89 * vpif_uservirt_to_phys: This function is used to convert user
100 * space virtual address to physical address. 90 * space virtual address to physical address.
@@ -373,30 +363,54 @@ static irqreturn_t vpif_channel_isr(int irq, void *dev_id)
373 return IRQ_HANDLED; 363 return IRQ_HANDLED;
374} 364}
375 365
376static int vpif_get_std_info(struct channel_obj *ch) 366static int vpif_update_std_info(struct channel_obj *ch)
377{ 367{
378 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
379 struct video_obj *vid_ch = &ch->video; 368 struct video_obj *vid_ch = &ch->video;
380 struct vpif_params *vpifparams = &ch->vpifparams; 369 struct vpif_params *vpifparams = &ch->vpifparams;
381 struct vpif_channel_config_params *std_info = &vpifparams->std_info; 370 struct vpif_channel_config_params *std_info = &vpifparams->std_info;
382 const struct vpif_channel_config_params *config; 371 const struct vpif_channel_config_params *config;
383 372
384 int index; 373 int i;
385
386 std_info->stdid = vid_ch->stdid;
387 if (!std_info->stdid)
388 return -1;
389 374
390 for (index = 0; index < ARRAY_SIZE(ch_params); index++) { 375 for (i = 0; i < vpif_ch_params_count; i++) {
391 config = &ch_params[index]; 376 config = &ch_params[i];
392 if (config->stdid & std_info->stdid) { 377 if (config->hd_sd == 0) {
393 memcpy(std_info, config, sizeof(*config)); 378 vpif_dbg(2, debug, "SD format\n");
394 break; 379 if (config->stdid & vid_ch->stdid) {
380 memcpy(std_info, config, sizeof(*config));
381 break;
382 }
383 } else {
384 vpif_dbg(2, debug, "HD format\n");
385 if (config->dv_preset == vid_ch->dv_preset) {
386 memcpy(std_info, config, sizeof(*config));
387 break;
388 }
395 } 389 }
396 } 390 }
397 391
398 if (index == ARRAY_SIZE(ch_params)) 392 if (i == vpif_ch_params_count) {
399 return -1; 393 vpif_dbg(1, debug, "Format not found\n");
394 return -EINVAL;
395 }
396
397 return 0;
398}
399
400static int vpif_update_resolution(struct channel_obj *ch)
401{
402 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
403 struct video_obj *vid_ch = &ch->video;
404 struct vpif_params *vpifparams = &ch->vpifparams;
405 struct vpif_channel_config_params *std_info = &vpifparams->std_info;
406
407 if (!vid_ch->stdid && !vid_ch->dv_preset && !vid_ch->bt_timings.height)
408 return -EINVAL;
409
410 if (vid_ch->stdid || vid_ch->dv_preset) {
411 if (vpif_update_std_info(ch))
412 return -EINVAL;
413 }
400 414
401 common->fmt.fmt.pix.width = std_info->width; 415 common->fmt.fmt.pix.width = std_info->width;
402 common->fmt.fmt.pix.height = std_info->height; 416 common->fmt.fmt.pix.height = std_info->height;
@@ -404,8 +418,8 @@ static int vpif_get_std_info(struct channel_obj *ch)
404 common->fmt.fmt.pix.width, common->fmt.fmt.pix.height); 418 common->fmt.fmt.pix.width, common->fmt.fmt.pix.height);
405 419
406 /* Set height and width paramateres */ 420 /* Set height and width paramateres */
407 ch->common[VPIF_VIDEO_INDEX].height = std_info->height; 421 common->height = std_info->height;
408 ch->common[VPIF_VIDEO_INDEX].width = std_info->width; 422 common->width = std_info->width;
409 423
410 return 0; 424 return 0;
411} 425}
@@ -516,10 +530,8 @@ static int vpif_check_format(struct channel_obj *ch,
516 else 530 else
517 sizeimage = config_params.channel_bufsize[ch->channel_id]; 531 sizeimage = config_params.channel_bufsize[ch->channel_id];
518 532
519 if (vpif_get_std_info(ch)) { 533 if (vpif_update_resolution(ch))
520 vpif_err("Error getting the standard info\n");
521 return -EINVAL; 534 return -EINVAL;
522 }
523 535
524 hpitch = pixfmt->bytesperline; 536 hpitch = pixfmt->bytesperline;
525 vpitch = sizeimage / (hpitch * 2); 537 vpitch = sizeimage / (hpitch * 2);
@@ -568,7 +580,10 @@ static void vpif_config_addr(struct channel_obj *ch, int muxmode)
568static int vpif_mmap(struct file *filep, struct vm_area_struct *vma) 580static int vpif_mmap(struct file *filep, struct vm_area_struct *vma)
569{ 581{
570 struct vpif_fh *fh = filep->private_data; 582 struct vpif_fh *fh = filep->private_data;
571 struct common_obj *common = &fh->channel->common[VPIF_VIDEO_INDEX]; 583 struct channel_obj *ch = fh->channel;
584 struct common_obj *common = &(ch->common[VPIF_VIDEO_INDEX]);
585
586 vpif_dbg(2, debug, "vpif_mmap\n");
572 587
573 return videobuf_mmap_mapper(&common->buffer_queue, vma); 588 return videobuf_mmap_mapper(&common->buffer_queue, vma);
574} 589}
@@ -637,9 +652,6 @@ static int vpif_release(struct file *filep)
637 struct channel_obj *ch = fh->channel; 652 struct channel_obj *ch = fh->channel;
638 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX]; 653 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
639 654
640 if (mutex_lock_interruptible(&common->lock))
641 return -ERESTARTSYS;
642
643 /* if this instance is doing IO */ 655 /* if this instance is doing IO */
644 if (fh->io_allowed[VPIF_VIDEO_INDEX]) { 656 if (fh->io_allowed[VPIF_VIDEO_INDEX]) {
645 /* Reset io_usrs member of channel object */ 657 /* Reset io_usrs member of channel object */
@@ -662,8 +674,6 @@ static int vpif_release(struct file *filep)
662 config_params.numbuffers[ch->channel_id]; 674 config_params.numbuffers[ch->channel_id];
663 } 675 }
664 676
665 mutex_unlock(&common->lock);
666
667 /* Decrement channel usrs counter */ 677 /* Decrement channel usrs counter */
668 atomic_dec(&ch->usrs); 678 atomic_dec(&ch->usrs);
669 /* If this file handle has initialize encoder device, reset it */ 679 /* If this file handle has initialize encoder device, reset it */
@@ -680,7 +690,12 @@ static int vpif_release(struct file *filep)
680} 690}
681 691
682/* functions implementing ioctls */ 692/* functions implementing ioctls */
683 693/**
694 * vpif_querycap() - QUERYCAP handler
695 * @file: file ptr
696 * @priv: file handle
697 * @cap: ptr to v4l2_capability structure
698 */
684static int vpif_querycap(struct file *file, void *priv, 699static int vpif_querycap(struct file *file, void *priv,
685 struct v4l2_capability *cap) 700 struct v4l2_capability *cap)
686{ 701{
@@ -722,17 +737,9 @@ static int vpif_g_fmt_vid_out(struct file *file, void *priv,
722 if (common->fmt.type != fmt->type) 737 if (common->fmt.type != fmt->type)
723 return -EINVAL; 738 return -EINVAL;
724 739
725 /* Fill in the information about format */ 740 if (vpif_update_resolution(ch))
726 if (mutex_lock_interruptible(&common->lock))
727 return -ERESTARTSYS;
728
729 if (vpif_get_std_info(ch)) {
730 vpif_err("Error getting the standard info\n");
731 return -EINVAL; 741 return -EINVAL;
732 }
733
734 *fmt = common->fmt; 742 *fmt = common->fmt;
735 mutex_unlock(&common->lock);
736 return 0; 743 return 0;
737} 744}
738 745
@@ -773,12 +780,7 @@ static int vpif_s_fmt_vid_out(struct file *file, void *priv,
773 /* store the pix format in the channel object */ 780 /* store the pix format in the channel object */
774 common->fmt.fmt.pix = *pixfmt; 781 common->fmt.fmt.pix = *pixfmt;
775 /* store the format in the channel object */ 782 /* store the format in the channel object */
776 if (mutex_lock_interruptible(&common->lock))
777 return -ERESTARTSYS;
778
779 common->fmt = *fmt; 783 common->fmt = *fmt;
780 mutex_unlock(&common->lock);
781
782 return 0; 784 return 0;
783} 785}
784 786
@@ -808,7 +810,6 @@ static int vpif_reqbufs(struct file *file, void *priv,
808 struct common_obj *common; 810 struct common_obj *common;
809 enum v4l2_field field; 811 enum v4l2_field field;
810 u8 index = 0; 812 u8 index = 0;
811 int ret = 0;
812 813
813 /* This file handle has not initialized the channel, 814 /* This file handle has not initialized the channel,
814 It is not allowed to do settings */ 815 It is not allowed to do settings */
@@ -826,18 +827,12 @@ static int vpif_reqbufs(struct file *file, void *priv,
826 index = VPIF_VIDEO_INDEX; 827 index = VPIF_VIDEO_INDEX;
827 828
828 common = &ch->common[index]; 829 common = &ch->common[index];
829 if (mutex_lock_interruptible(&common->lock))
830 return -ERESTARTSYS;
831 830
832 if (common->fmt.type != reqbuf->type) { 831 if (common->fmt.type != reqbuf->type)
833 ret = -EINVAL; 832 return -EINVAL;
834 goto reqbuf_exit;
835 }
836 833
837 if (0 != common->io_usrs) { 834 if (0 != common->io_usrs)
838 ret = -EBUSY; 835 return -EBUSY;
839 goto reqbuf_exit;
840 }
841 836
842 if (reqbuf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) { 837 if (reqbuf->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
843 if (common->fmt.fmt.pix.field == V4L2_FIELD_ANY) 838 if (common->fmt.fmt.pix.field == V4L2_FIELD_ANY)
@@ -854,7 +849,7 @@ static int vpif_reqbufs(struct file *file, void *priv,
854 &common->irqlock, 849 &common->irqlock,
855 reqbuf->type, field, 850 reqbuf->type, field,
856 sizeof(struct videobuf_buffer), fh, 851 sizeof(struct videobuf_buffer), fh,
857 NULL); 852 &common->lock);
858 853
859 /* Set io allowed member of file handle to TRUE */ 854 /* Set io allowed member of file handle to TRUE */
860 fh->io_allowed[index] = 1; 855 fh->io_allowed[index] = 1;
@@ -865,11 +860,7 @@ static int vpif_reqbufs(struct file *file, void *priv,
865 INIT_LIST_HEAD(&common->dma_queue); 860 INIT_LIST_HEAD(&common->dma_queue);
866 861
867 /* Allocate buffers */ 862 /* Allocate buffers */
868 ret = videobuf_reqbufs(&common->buffer_queue, reqbuf); 863 return videobuf_reqbufs(&common->buffer_queue, reqbuf);
869
870reqbuf_exit:
871 mutex_unlock(&common->lock);
872 return ret;
873} 864}
874 865
875static int vpif_querybuf(struct file *file, void *priv, 866static int vpif_querybuf(struct file *file, void *priv,
@@ -990,22 +981,19 @@ static int vpif_s_std(struct file *file, void *priv, v4l2_std_id *std_id)
990 } 981 }
991 982
992 /* Call encoder subdevice function to set the standard */ 983 /* Call encoder subdevice function to set the standard */
993 if (mutex_lock_interruptible(&common->lock))
994 return -ERESTARTSYS;
995
996 ch->video.stdid = *std_id; 984 ch->video.stdid = *std_id;
985 ch->video.dv_preset = V4L2_DV_INVALID;
986 memset(&ch->video.bt_timings, 0, sizeof(ch->video.bt_timings));
987
997 /* Get the information about the standard */ 988 /* Get the information about the standard */
998 if (vpif_get_std_info(ch)) { 989 if (vpif_update_resolution(ch))
999 vpif_err("Error getting the standard info\n");
1000 return -EINVAL; 990 return -EINVAL;
1001 }
1002 991
1003 if ((ch->vpifparams.std_info.width * 992 if ((ch->vpifparams.std_info.width *
1004 ch->vpifparams.std_info.height * 2) > 993 ch->vpifparams.std_info.height * 2) >
1005 config_params.channel_bufsize[ch->channel_id]) { 994 config_params.channel_bufsize[ch->channel_id]) {
1006 vpif_err("invalid std for this size\n"); 995 vpif_err("invalid std for this size\n");
1007 ret = -EINVAL; 996 return -EINVAL;
1008 goto s_std_exit;
1009 } 997 }
1010 998
1011 common->fmt.fmt.pix.bytesperline = common->fmt.fmt.pix.width; 999 common->fmt.fmt.pix.bytesperline = common->fmt.fmt.pix.width;
@@ -1016,16 +1004,13 @@ static int vpif_s_std(struct file *file, void *priv, v4l2_std_id *std_id)
1016 s_std_output, *std_id); 1004 s_std_output, *std_id);
1017 if (ret < 0) { 1005 if (ret < 0) {
1018 vpif_err("Failed to set output standard\n"); 1006 vpif_err("Failed to set output standard\n");
1019 goto s_std_exit; 1007 return ret;
1020 } 1008 }
1021 1009
1022 ret = v4l2_device_call_until_err(&vpif_obj.v4l2_dev, 1, core, 1010 ret = v4l2_device_call_until_err(&vpif_obj.v4l2_dev, 1, core,
1023 s_std, *std_id); 1011 s_std, *std_id);
1024 if (ret < 0) 1012 if (ret < 0)
1025 vpif_err("Failed to set standard for sub devices\n"); 1013 vpif_err("Failed to set standard for sub devices\n");
1026
1027s_std_exit:
1028 mutex_unlock(&common->lock);
1029 return ret; 1014 return ret;
1030} 1015}
1031 1016
@@ -1090,21 +1075,17 @@ static int vpif_streamon(struct file *file, void *priv,
1090 if (ret < 0) 1075 if (ret < 0)
1091 return ret; 1076 return ret;
1092 1077
1093 /* Call videobuf_streamon to start streaming in videobuf */ 1078 /* Call videobuf_streamon to start streaming in videobuf */
1094 ret = videobuf_streamon(&common->buffer_queue); 1079 ret = videobuf_streamon(&common->buffer_queue);
1095 if (ret < 0) { 1080 if (ret < 0) {
1096 vpif_err("videobuf_streamon\n"); 1081 vpif_err("videobuf_streamon\n");
1097 return ret; 1082 return ret;
1098 } 1083 }
1099 1084
1100 if (mutex_lock_interruptible(&common->lock))
1101 return -ERESTARTSYS;
1102
1103 /* If buffer queue is empty, return error */ 1085 /* If buffer queue is empty, return error */
1104 if (list_empty(&common->dma_queue)) { 1086 if (list_empty(&common->dma_queue)) {
1105 vpif_err("buffer queue is empty\n"); 1087 vpif_err("buffer queue is empty\n");
1106 ret = -EIO; 1088 return -EIO;
1107 goto streamon_exit;
1108 } 1089 }
1109 1090
1110 /* Get the next frame from the buffer queue */ 1091 /* Get the next frame from the buffer queue */
@@ -1130,8 +1111,7 @@ static int vpif_streamon(struct file *file, void *priv,
1130 || (!ch->vpifparams.std_info.frm_fmt 1111 || (!ch->vpifparams.std_info.frm_fmt
1131 && (common->fmt.fmt.pix.field == V4L2_FIELD_NONE))) { 1112 && (common->fmt.fmt.pix.field == V4L2_FIELD_NONE))) {
1132 vpif_err("conflict in field format and std format\n"); 1113 vpif_err("conflict in field format and std format\n");
1133 ret = -EINVAL; 1114 return -EINVAL;
1134 goto streamon_exit;
1135 } 1115 }
1136 1116
1137 /* clock settings */ 1117 /* clock settings */
@@ -1140,13 +1120,13 @@ static int vpif_streamon(struct file *file, void *priv,
1140 ch->vpifparams.std_info.hd_sd); 1120 ch->vpifparams.std_info.hd_sd);
1141 if (ret < 0) { 1121 if (ret < 0) {
1142 vpif_err("can't set clock\n"); 1122 vpif_err("can't set clock\n");
1143 goto streamon_exit; 1123 return ret;
1144 } 1124 }
1145 1125
1146 /* set the parameters and addresses */ 1126 /* set the parameters and addresses */
1147 ret = vpif_set_video_params(vpif, ch->channel_id + 2); 1127 ret = vpif_set_video_params(vpif, ch->channel_id + 2);
1148 if (ret < 0) 1128 if (ret < 0)
1149 goto streamon_exit; 1129 return ret;
1150 1130
1151 common->started = ret; 1131 common->started = ret;
1152 vpif_config_addr(ch, ret); 1132 vpif_config_addr(ch, ret);
@@ -1171,9 +1151,6 @@ static int vpif_streamon(struct file *file, void *priv,
1171 } 1151 }
1172 channel_first_int[VPIF_VIDEO_INDEX][ch->channel_id] = 1; 1152 channel_first_int[VPIF_VIDEO_INDEX][ch->channel_id] = 1;
1173 } 1153 }
1174
1175streamon_exit:
1176 mutex_unlock(&common->lock);
1177 return ret; 1154 return ret;
1178} 1155}
1179 1156
@@ -1199,9 +1176,6 @@ static int vpif_streamoff(struct file *file, void *priv,
1199 return -EINVAL; 1176 return -EINVAL;
1200 } 1177 }
1201 1178
1202 if (mutex_lock_interruptible(&common->lock))
1203 return -ERESTARTSYS;
1204
1205 if (buftype == V4L2_BUF_TYPE_VIDEO_OUTPUT) { 1179 if (buftype == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1206 /* disable channel */ 1180 /* disable channel */
1207 if (VPIF_CHANNEL2_VIDEO == ch->channel_id) { 1181 if (VPIF_CHANNEL2_VIDEO == ch->channel_id) {
@@ -1216,8 +1190,6 @@ static int vpif_streamoff(struct file *file, void *priv,
1216 } 1190 }
1217 1191
1218 common->started = 0; 1192 common->started = 0;
1219 mutex_unlock(&common->lock);
1220
1221 return videobuf_streamoff(&common->buffer_queue); 1193 return videobuf_streamoff(&common->buffer_queue);
1222} 1194}
1223 1195
@@ -1264,13 +1236,9 @@ static int vpif_s_output(struct file *file, void *priv, unsigned int i)
1264 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX]; 1236 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
1265 int ret = 0; 1237 int ret = 0;
1266 1238
1267 if (mutex_lock_interruptible(&common->lock))
1268 return -ERESTARTSYS;
1269
1270 if (common->started) { 1239 if (common->started) {
1271 vpif_err("Streaming in progress\n"); 1240 vpif_err("Streaming in progress\n");
1272 ret = -EBUSY; 1241 return -EBUSY;
1273 goto s_output_exit;
1274 } 1242 }
1275 1243
1276 ret = v4l2_device_call_until_err(&vpif_obj.v4l2_dev, 1, video, 1244 ret = v4l2_device_call_until_err(&vpif_obj.v4l2_dev, 1, video,
@@ -1280,9 +1248,6 @@ static int vpif_s_output(struct file *file, void *priv, unsigned int i)
1280 vpif_err("Failed to set output standard\n"); 1248 vpif_err("Failed to set output standard\n");
1281 1249
1282 vid_ch->output_id = i; 1250 vid_ch->output_id = i;
1283
1284s_output_exit:
1285 mutex_unlock(&common->lock);
1286 return ret; 1251 return ret;
1287} 1252}
1288 1253
@@ -1315,6 +1280,287 @@ static int vpif_s_priority(struct file *file, void *priv, enum v4l2_priority p)
1315 return v4l2_prio_change(&ch->prio, &fh->prio, p); 1280 return v4l2_prio_change(&ch->prio, &fh->prio, p);
1316} 1281}
1317 1282
1283/**
1284 * vpif_enum_dv_presets() - ENUM_DV_PRESETS handler
1285 * @file: file ptr
1286 * @priv: file handle
1287 * @preset: input preset
1288 */
1289static int vpif_enum_dv_presets(struct file *file, void *priv,
1290 struct v4l2_dv_enum_preset *preset)
1291{
1292 struct vpif_fh *fh = priv;
1293 struct channel_obj *ch = fh->channel;
1294 struct video_obj *vid_ch = &ch->video;
1295
1296 return v4l2_subdev_call(vpif_obj.sd[vid_ch->output_id],
1297 video, enum_dv_presets, preset);
1298}
1299
1300/**
1301 * vpif_s_dv_presets() - S_DV_PRESETS handler
1302 * @file: file ptr
1303 * @priv: file handle
1304 * @preset: input preset
1305 */
1306static int vpif_s_dv_preset(struct file *file, void *priv,
1307 struct v4l2_dv_preset *preset)
1308{
1309 struct vpif_fh *fh = priv;
1310 struct channel_obj *ch = fh->channel;
1311 struct common_obj *common = &ch->common[VPIF_VIDEO_INDEX];
1312 struct video_obj *vid_ch = &ch->video;
1313 int ret = 0;
1314
1315 if (common->started) {
1316 vpif_dbg(1, debug, "streaming in progress\n");
1317 return -EBUSY;
1318 }
1319
1320 ret = v4l2_prio_check(&ch->prio, fh->prio);
1321 if (ret != 0)
1322 return ret;
1323
1324 fh->initialized = 1;
1325
1326 /* Call encoder subdevice function to set the standard */
1327 if (mutex_lock_interruptible(&common->lock))
1328 return -ERESTARTSYS;
1329
1330 ch->video.dv_preset = preset->preset;
1331 ch->video.stdid = V4L2_STD_UNKNOWN;
1332 memset(&ch->video.bt_timings, 0, sizeof(ch->video.bt_timings));
1333
1334 /* Get the information about the standard */
1335 if (vpif_update_resolution(ch)) {
1336 ret = -EINVAL;
1337 } else {
1338 /* Configure the default format information */
1339 vpif_config_format(ch);
1340
1341 ret = v4l2_subdev_call(vpif_obj.sd[vid_ch->output_id],
1342 video, s_dv_preset, preset);
1343 }
1344
1345 mutex_unlock(&common->lock);
1346
1347 return ret;
1348}
1349/**
1350 * vpif_g_dv_presets() - G_DV_PRESETS handler
1351 * @file: file ptr
1352 * @priv: file handle
1353 * @preset: input preset
1354 */
1355static int vpif_g_dv_preset(struct file *file, void *priv,
1356 struct v4l2_dv_preset *preset)
1357{
1358 struct vpif_fh *fh = priv;
1359 struct channel_obj *ch = fh->channel;
1360
1361 preset->preset = ch->video.dv_preset;
1362
1363 return 0;
1364}
1365/**
1366 * vpif_s_dv_timings() - S_DV_TIMINGS handler
1367 * @file: file ptr
1368 * @priv: file handle
1369 * @timings: digital video timings
1370 */
1371static int vpif_s_dv_timings(struct file *file, void *priv,
1372 struct v4l2_dv_timings *timings)
1373{
1374 struct vpif_fh *fh = priv;
1375 struct channel_obj *ch = fh->channel;
1376 struct vpif_params *vpifparams = &ch->vpifparams;
1377 struct vpif_channel_config_params *std_info = &vpifparams->std_info;
1378 struct video_obj *vid_ch = &ch->video;
1379 struct v4l2_bt_timings *bt = &vid_ch->bt_timings;
1380 int ret;
1381
1382 if (timings->type != V4L2_DV_BT_656_1120) {
1383 vpif_dbg(2, debug, "Timing type not defined\n");
1384 return -EINVAL;
1385 }
1386
1387 /* Configure subdevice timings, if any */
1388 ret = v4l2_subdev_call(vpif_obj.sd[vid_ch->output_id],
1389 video, s_dv_timings, timings);
1390 if (ret == -ENOIOCTLCMD) {
1391 vpif_dbg(2, debug, "Custom DV timings not supported by "
1392 "subdevice\n");
1393 return -EINVAL;
1394 }
1395 if (ret < 0) {
1396 vpif_dbg(2, debug, "Error setting custom DV timings\n");
1397 return ret;
1398 }
1399
1400 if (!(timings->bt.width && timings->bt.height &&
1401 (timings->bt.hbackporch ||
1402 timings->bt.hfrontporch ||
1403 timings->bt.hsync) &&
1404 timings->bt.vfrontporch &&
1405 (timings->bt.vbackporch ||
1406 timings->bt.vsync))) {
1407 vpif_dbg(2, debug, "Timings for width, height, "
1408 "horizontal back porch, horizontal sync, "
1409 "horizontal front porch, vertical back porch, "
1410 "vertical sync and vertical back porch "
1411 "must be defined\n");
1412 return -EINVAL;
1413 }
1414
1415 *bt = timings->bt;
1416
1417 /* Configure video port timings */
1418
1419 std_info->eav2sav = bt->hbackporch + bt->hfrontporch +
1420 bt->hsync - 8;
1421 std_info->sav2eav = bt->width;
1422
1423 std_info->l1 = 1;
1424 std_info->l3 = bt->vsync + bt->vbackporch + 1;
1425
1426 if (bt->interlaced) {
1427 if (bt->il_vbackporch || bt->il_vfrontporch || bt->il_vsync) {
1428 std_info->vsize = bt->height * 2 +
1429 bt->vfrontporch + bt->vsync + bt->vbackporch +
1430 bt->il_vfrontporch + bt->il_vsync +
1431 bt->il_vbackporch;
1432 std_info->l5 = std_info->vsize/2 -
1433 (bt->vfrontporch - 1);
1434 std_info->l7 = std_info->vsize/2 + 1;
1435 std_info->l9 = std_info->l7 + bt->il_vsync +
1436 bt->il_vbackporch + 1;
1437 std_info->l11 = std_info->vsize -
1438 (bt->il_vfrontporch - 1);
1439 } else {
1440 vpif_dbg(2, debug, "Required timing values for "
1441 "interlaced BT format missing\n");
1442 return -EINVAL;
1443 }
1444 } else {
1445 std_info->vsize = bt->height + bt->vfrontporch +
1446 bt->vsync + bt->vbackporch;
1447 std_info->l5 = std_info->vsize - (bt->vfrontporch - 1);
1448 }
1449 strncpy(std_info->name, "Custom timings BT656/1120",
1450 VPIF_MAX_NAME);
1451 std_info->width = bt->width;
1452 std_info->height = bt->height;
1453 std_info->frm_fmt = bt->interlaced ? 0 : 1;
1454 std_info->ycmux_mode = 0;
1455 std_info->capture_format = 0;
1456 std_info->vbi_supported = 0;
1457 std_info->hd_sd = 1;
1458 std_info->stdid = 0;
1459 std_info->dv_preset = V4L2_DV_INVALID;
1460
1461 vid_ch->stdid = 0;
1462 vid_ch->dv_preset = V4L2_DV_INVALID;
1463
1464 return 0;
1465}
1466
1467/**
1468 * vpif_g_dv_timings() - G_DV_TIMINGS handler
1469 * @file: file ptr
1470 * @priv: file handle
1471 * @timings: digital video timings
1472 */
1473static int vpif_g_dv_timings(struct file *file, void *priv,
1474 struct v4l2_dv_timings *timings)
1475{
1476 struct vpif_fh *fh = priv;
1477 struct channel_obj *ch = fh->channel;
1478 struct video_obj *vid_ch = &ch->video;
1479 struct v4l2_bt_timings *bt = &vid_ch->bt_timings;
1480
1481 timings->bt = *bt;
1482
1483 return 0;
1484}
1485
1486/*
1487 * vpif_g_chip_ident() - Identify the chip
1488 * @file: file ptr
1489 * @priv: file handle
1490 * @chip: chip identity
1491 *
1492 * Returns zero or -EINVAL if read operations fails.
1493 */
1494static int vpif_g_chip_ident(struct file *file, void *priv,
1495 struct v4l2_dbg_chip_ident *chip)
1496{
1497 chip->ident = V4L2_IDENT_NONE;
1498 chip->revision = 0;
1499 if (chip->match.type != V4L2_CHIP_MATCH_I2C_DRIVER &&
1500 chip->match.type != V4L2_CHIP_MATCH_I2C_ADDR) {
1501 vpif_dbg(2, debug, "match_type is invalid.\n");
1502 return -EINVAL;
1503 }
1504
1505 return v4l2_device_call_until_err(&vpif_obj.v4l2_dev, 0, core,
1506 g_chip_ident, chip);
1507}
1508
1509#ifdef CONFIG_VIDEO_ADV_DEBUG
1510/*
1511 * vpif_dbg_g_register() - Read register
1512 * @file: file ptr
1513 * @priv: file handle
1514 * @reg: register to be read
1515 *
1516 * Debugging only
1517 * Returns zero or -EINVAL if read operations fails.
1518 */
1519static int vpif_dbg_g_register(struct file *file, void *priv,
1520 struct v4l2_dbg_register *reg){
1521 struct vpif_fh *fh = priv;
1522 struct channel_obj *ch = fh->channel;
1523 struct video_obj *vid_ch = &ch->video;
1524
1525 return v4l2_subdev_call(vpif_obj.sd[vid_ch->output_id], core,
1526 g_register, reg);
1527}
1528
1529/*
1530 * vpif_dbg_s_register() - Write to register
1531 * @file: file ptr
1532 * @priv: file handle
1533 * @reg: register to be modified
1534 *
1535 * Debugging only
1536 * Returns zero or -EINVAL if write operations fails.
1537 */
1538static int vpif_dbg_s_register(struct file *file, void *priv,
1539 struct v4l2_dbg_register *reg){
1540 struct vpif_fh *fh = priv;
1541 struct channel_obj *ch = fh->channel;
1542 struct video_obj *vid_ch = &ch->video;
1543
1544 return v4l2_subdev_call(vpif_obj.sd[vid_ch->output_id], core,
1545 s_register, reg);
1546}
1547#endif
1548
1549/*
1550 * vpif_log_status() - Status information
1551 * @file: file ptr
1552 * @priv: file handle
1553 *
1554 * Returns zero.
1555 */
1556static int vpif_log_status(struct file *filep, void *priv)
1557{
1558 /* status for sub devices */
1559 v4l2_device_call_all(&vpif_obj.v4l2_dev, 0, core, log_status);
1560
1561 return 0;
1562}
1563
1318/* vpif display ioctl operations */ 1564/* vpif display ioctl operations */
1319static const struct v4l2_ioctl_ops vpif_ioctl_ops = { 1565static const struct v4l2_ioctl_ops vpif_ioctl_ops = {
1320 .vidioc_querycap = vpif_querycap, 1566 .vidioc_querycap = vpif_querycap,
@@ -1336,13 +1582,24 @@ static const struct v4l2_ioctl_ops vpif_ioctl_ops = {
1336 .vidioc_s_output = vpif_s_output, 1582 .vidioc_s_output = vpif_s_output,
1337 .vidioc_g_output = vpif_g_output, 1583 .vidioc_g_output = vpif_g_output,
1338 .vidioc_cropcap = vpif_cropcap, 1584 .vidioc_cropcap = vpif_cropcap,
1585 .vidioc_enum_dv_presets = vpif_enum_dv_presets,
1586 .vidioc_s_dv_preset = vpif_s_dv_preset,
1587 .vidioc_g_dv_preset = vpif_g_dv_preset,
1588 .vidioc_s_dv_timings = vpif_s_dv_timings,
1589 .vidioc_g_dv_timings = vpif_g_dv_timings,
1590 .vidioc_g_chip_ident = vpif_g_chip_ident,
1591#ifdef CONFIG_VIDEO_ADV_DEBUG
1592 .vidioc_g_register = vpif_dbg_g_register,
1593 .vidioc_s_register = vpif_dbg_s_register,
1594#endif
1595 .vidioc_log_status = vpif_log_status,
1339}; 1596};
1340 1597
1341static const struct v4l2_file_operations vpif_fops = { 1598static const struct v4l2_file_operations vpif_fops = {
1342 .owner = THIS_MODULE, 1599 .owner = THIS_MODULE,
1343 .open = vpif_open, 1600 .open = vpif_open,
1344 .release = vpif_release, 1601 .release = vpif_release,
1345 .ioctl = video_ioctl2, 1602 .unlocked_ioctl = video_ioctl2,
1346 .mmap = vpif_mmap, 1603 .mmap = vpif_mmap,
1347 .poll = vpif_poll 1604 .poll = vpif_poll
1348}; 1605};
@@ -1526,6 +1783,7 @@ static __init int vpif_probe(struct platform_device *pdev)
1526 v4l2_prio_init(&ch->prio); 1783 v4l2_prio_init(&ch->prio);
1527 ch->common[VPIF_VIDEO_INDEX].fmt.type = 1784 ch->common[VPIF_VIDEO_INDEX].fmt.type =
1528 V4L2_BUF_TYPE_VIDEO_OUTPUT; 1785 V4L2_BUF_TYPE_VIDEO_OUTPUT;
1786 ch->video_dev->lock = &common->lock;
1529 1787
1530 /* register video device */ 1788 /* register video device */
1531 vpif_dbg(1, debug, "channel=%x,channel->video_dev=%x\n", 1789 vpif_dbg(1, debug, "channel=%x,channel->video_dev=%x\n",
@@ -1565,6 +1823,8 @@ static __init int vpif_probe(struct platform_device *pdev)
1565 vpif_obj.sd[i]->grp_id = 1 << i; 1823 vpif_obj.sd[i]->grp_id = 1 << i;
1566 } 1824 }
1567 1825
1826 v4l2_info(&vpif_obj.v4l2_dev,
1827 "DM646x VPIF display driver initialized\n");
1568 return 0; 1828 return 0;
1569 1829
1570probe_subdev_out: 1830probe_subdev_out:
diff --git a/drivers/media/video/davinci/vpif_display.h b/drivers/media/video/davinci/vpif_display.h
index a2a7cd166bbf..b53aaa883075 100644
--- a/drivers/media/video/davinci/vpif_display.h
+++ b/drivers/media/video/davinci/vpif_display.h
@@ -67,6 +67,8 @@ struct video_obj {
67 * most recent displayed frame only */ 67 * most recent displayed frame only */
68 v4l2_std_id stdid; /* Currently selected or default 68 v4l2_std_id stdid; /* Currently selected or default
69 * standard */ 69 * standard */
70 u32 dv_preset;
71 struct v4l2_bt_timings bt_timings;
70 u32 output_id; /* Current output id */ 72 u32 output_id; /* Current output id */
71}; 73};
72 74
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c
index 099d5df8c572..87f77a34eeab 100644
--- a/drivers/media/video/em28xx/em28xx-cards.c
+++ b/drivers/media/video/em28xx/em28xx-cards.c
@@ -33,6 +33,7 @@
33#include <media/saa7115.h> 33#include <media/saa7115.h>
34#include <media/tvp5150.h> 34#include <media/tvp5150.h>
35#include <media/tvaudio.h> 35#include <media/tvaudio.h>
36#include <media/mt9v011.h>
36#include <media/i2c-addr.h> 37#include <media/i2c-addr.h>
37#include <media/tveeprom.h> 38#include <media/tveeprom.h>
38#include <media/v4l2-common.h> 39#include <media/v4l2-common.h>
@@ -1917,11 +1918,6 @@ static unsigned short tvp5150_addrs[] = {
1917 I2C_CLIENT_END 1918 I2C_CLIENT_END
1918}; 1919};
1919 1920
1920static unsigned short mt9v011_addrs[] = {
1921 0xba >> 1,
1922 I2C_CLIENT_END
1923};
1924
1925static unsigned short msp3400_addrs[] = { 1921static unsigned short msp3400_addrs[] = {
1926 0x80 >> 1, 1922 0x80 >> 1,
1927 0x88 >> 1, 1923 0x88 >> 1,
@@ -2437,6 +2433,7 @@ void em28xx_register_i2c_ir(struct em28xx *dev)
2437 dev->init_data.ir_codes = RC_MAP_RC5_HAUPPAUGE_NEW; 2433 dev->init_data.ir_codes = RC_MAP_RC5_HAUPPAUGE_NEW;
2438 dev->init_data.get_key = em28xx_get_key_em_haup; 2434 dev->init_data.get_key = em28xx_get_key_em_haup;
2439 dev->init_data.name = "i2c IR (EM2840 Hauppauge)"; 2435 dev->init_data.name = "i2c IR (EM2840 Hauppauge)";
2436 break;
2440 case EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE: 2437 case EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE:
2441 dev->init_data.ir_codes = RC_MAP_WINFAST_USBII_DELUXE; 2438 dev->init_data.ir_codes = RC_MAP_WINFAST_USBII_DELUXE;
2442 dev->init_data.get_key = em28xx_get_key_winfast_usbii_deluxe; 2439 dev->init_data.get_key = em28xx_get_key_winfast_usbii_deluxe;
@@ -2623,11 +2620,17 @@ void em28xx_card_setup(struct em28xx *dev)
2623 "tvp5150", 0, tvp5150_addrs); 2620 "tvp5150", 0, tvp5150_addrs);
2624 2621
2625 if (dev->em28xx_sensor == EM28XX_MT9V011) { 2622 if (dev->em28xx_sensor == EM28XX_MT9V011) {
2623 struct mt9v011_platform_data pdata;
2624 struct i2c_board_info mt9v011_info = {
2625 .type = "mt9v011",
2626 .addr = 0xba >> 1,
2627 .platform_data = &pdata,
2628 };
2626 struct v4l2_subdev *sd; 2629 struct v4l2_subdev *sd;
2627 2630
2628 sd = v4l2_i2c_new_subdev(&dev->v4l2_dev, 2631 pdata.xtal = dev->sensor_xtal;
2629 &dev->i2c_adap, "mt9v011", 0, mt9v011_addrs); 2632 sd = v4l2_i2c_new_subdev_board(&dev->v4l2_dev, &dev->i2c_adap,
2630 v4l2_subdev_call(sd, core, s_config, 0, &dev->sensor_xtal); 2633 &mt9v011_info, NULL);
2631 } 2634 }
2632 2635
2633 2636
diff --git a/drivers/media/video/et61x251/et61x251.h b/drivers/media/video/et61x251/et61x251.h
index cc77d144df3c..bf66189cb26d 100644
--- a/drivers/media/video/et61x251/et61x251.h
+++ b/drivers/media/video/et61x251/et61x251.h
@@ -59,31 +59,7 @@
59/*****************************************************************************/ 59/*****************************************************************************/
60 60
61static const struct usb_device_id et61x251_id_table[] = { 61static const struct usb_device_id et61x251_id_table[] = {
62 { USB_DEVICE(0x102c, 0x6151), },
63 { USB_DEVICE(0x102c, 0x6251), }, 62 { USB_DEVICE(0x102c, 0x6251), },
64 { USB_DEVICE(0x102c, 0x6253), },
65 { USB_DEVICE(0x102c, 0x6254), },
66 { USB_DEVICE(0x102c, 0x6255), },
67 { USB_DEVICE(0x102c, 0x6256), },
68 { USB_DEVICE(0x102c, 0x6257), },
69 { USB_DEVICE(0x102c, 0x6258), },
70 { USB_DEVICE(0x102c, 0x6259), },
71 { USB_DEVICE(0x102c, 0x625a), },
72 { USB_DEVICE(0x102c, 0x625b), },
73 { USB_DEVICE(0x102c, 0x625c), },
74 { USB_DEVICE(0x102c, 0x625d), },
75 { USB_DEVICE(0x102c, 0x625e), },
76 { USB_DEVICE(0x102c, 0x625f), },
77 { USB_DEVICE(0x102c, 0x6260), },
78 { USB_DEVICE(0x102c, 0x6261), },
79 { USB_DEVICE(0x102c, 0x6262), },
80 { USB_DEVICE(0x102c, 0x6263), },
81 { USB_DEVICE(0x102c, 0x6264), },
82 { USB_DEVICE(0x102c, 0x6265), },
83 { USB_DEVICE(0x102c, 0x6266), },
84 { USB_DEVICE(0x102c, 0x6267), },
85 { USB_DEVICE(0x102c, 0x6268), },
86 { USB_DEVICE(0x102c, 0x6269), },
87 { } 63 { }
88}; 64};
89 65
diff --git a/drivers/media/video/gspca/benq.c b/drivers/media/video/gspca/benq.c
index 629043933501..a09c4709d613 100644
--- a/drivers/media/video/gspca/benq.c
+++ b/drivers/media/video/gspca/benq.c
@@ -276,7 +276,7 @@ static const struct sd_desc sd_desc = {
276}; 276};
277 277
278/* -- module initialisation -- */ 278/* -- module initialisation -- */
279static const __devinitdata struct usb_device_id device_table[] = { 279static const struct usb_device_id device_table[] = {
280 {USB_DEVICE(0x04a5, 0x3035)}, 280 {USB_DEVICE(0x04a5, 0x3035)},
281 {} 281 {}
282}; 282};
diff --git a/drivers/media/video/gspca/conex.c b/drivers/media/video/gspca/conex.c
index 1eacb6c7926d..8b398493f96b 100644
--- a/drivers/media/video/gspca/conex.c
+++ b/drivers/media/video/gspca/conex.c
@@ -1040,14 +1040,14 @@ static const struct sd_desc sd_desc = {
1040}; 1040};
1041 1041
1042/* -- module initialisation -- */ 1042/* -- module initialisation -- */
1043static const struct usb_device_id device_table[] __devinitconst = { 1043static const struct usb_device_id device_table[] = {
1044 {USB_DEVICE(0x0572, 0x0041)}, 1044 {USB_DEVICE(0x0572, 0x0041)},
1045 {} 1045 {}
1046}; 1046};
1047MODULE_DEVICE_TABLE(usb, device_table); 1047MODULE_DEVICE_TABLE(usb, device_table);
1048 1048
1049/* -- device connect -- */ 1049/* -- device connect -- */
1050static int __devinit sd_probe(struct usb_interface *intf, 1050static int sd_probe(struct usb_interface *intf,
1051 const struct usb_device_id *id) 1051 const struct usb_device_id *id)
1052{ 1052{
1053 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), 1053 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/cpia1.c b/drivers/media/video/gspca/cpia1.c
index c1ae05f4661f..4bf2cab98d64 100644
--- a/drivers/media/video/gspca/cpia1.c
+++ b/drivers/media/video/gspca/cpia1.c
@@ -2088,7 +2088,7 @@ static const struct sd_desc sd_desc = {
2088}; 2088};
2089 2089
2090/* -- module initialisation -- */ 2090/* -- module initialisation -- */
2091static const __devinitdata struct usb_device_id device_table[] = { 2091static const struct usb_device_id device_table[] = {
2092 {USB_DEVICE(0x0553, 0x0002)}, 2092 {USB_DEVICE(0x0553, 0x0002)},
2093 {USB_DEVICE(0x0813, 0x0001)}, 2093 {USB_DEVICE(0x0813, 0x0001)},
2094 {} 2094 {}
diff --git a/drivers/media/video/gspca/etoms.c b/drivers/media/video/gspca/etoms.c
index a594b36d6199..4b2c483fce6f 100644
--- a/drivers/media/video/gspca/etoms.c
+++ b/drivers/media/video/gspca/etoms.c
@@ -864,7 +864,7 @@ static const struct sd_desc sd_desc = {
864}; 864};
865 865
866/* -- module initialisation -- */ 866/* -- module initialisation -- */
867static const struct usb_device_id device_table[] __devinitconst = { 867static const struct usb_device_id device_table[] = {
868 {USB_DEVICE(0x102c, 0x6151), .driver_info = SENSOR_PAS106}, 868 {USB_DEVICE(0x102c, 0x6151), .driver_info = SENSOR_PAS106},
869#if !defined CONFIG_USB_ET61X251 && !defined CONFIG_USB_ET61X251_MODULE 869#if !defined CONFIG_USB_ET61X251 && !defined CONFIG_USB_ET61X251_MODULE
870 {USB_DEVICE(0x102c, 0x6251), .driver_info = SENSOR_TAS5130CXX}, 870 {USB_DEVICE(0x102c, 0x6251), .driver_info = SENSOR_TAS5130CXX},
@@ -875,7 +875,7 @@ static const struct usb_device_id device_table[] __devinitconst = {
875MODULE_DEVICE_TABLE(usb, device_table); 875MODULE_DEVICE_TABLE(usb, device_table);
876 876
877/* -- device connect -- */ 877/* -- device connect -- */
878static int __devinit sd_probe(struct usb_interface *intf, 878static int sd_probe(struct usb_interface *intf,
879 const struct usb_device_id *id) 879 const struct usb_device_id *id)
880{ 880{
881 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), 881 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/finepix.c b/drivers/media/video/gspca/finepix.c
index d78226455d1f..987b4b69d7ab 100644
--- a/drivers/media/video/gspca/finepix.c
+++ b/drivers/media/video/gspca/finepix.c
@@ -229,7 +229,7 @@ static void sd_stop0(struct gspca_dev *gspca_dev)
229} 229}
230 230
231/* Table of supported USB devices */ 231/* Table of supported USB devices */
232static const __devinitdata struct usb_device_id device_table[] = { 232static const struct usb_device_id device_table[] = {
233 {USB_DEVICE(0x04cb, 0x0104)}, 233 {USB_DEVICE(0x04cb, 0x0104)},
234 {USB_DEVICE(0x04cb, 0x0109)}, 234 {USB_DEVICE(0x04cb, 0x0109)},
235 {USB_DEVICE(0x04cb, 0x010b)}, 235 {USB_DEVICE(0x04cb, 0x010b)},
diff --git a/drivers/media/video/gspca/gl860/gl860.c b/drivers/media/video/gspca/gl860/gl860.c
index b05bec7321b5..99083038cec3 100644
--- a/drivers/media/video/gspca/gl860/gl860.c
+++ b/drivers/media/video/gspca/gl860/gl860.c
@@ -488,7 +488,7 @@ static void sd_callback(struct gspca_dev *gspca_dev)
488 488
489/*=================== USB driver structure initialisation ==================*/ 489/*=================== USB driver structure initialisation ==================*/
490 490
491static const __devinitdata struct usb_device_id device_table[] = { 491static const struct usb_device_id device_table[] = {
492 {USB_DEVICE(0x05e3, 0x0503)}, 492 {USB_DEVICE(0x05e3, 0x0503)},
493 {USB_DEVICE(0x05e3, 0xf191)}, 493 {USB_DEVICE(0x05e3, 0xf191)},
494 {} 494 {}
diff --git a/drivers/media/video/gspca/gspca.c b/drivers/media/video/gspca/gspca.c
index 442970073e8a..f21f2a258ae0 100644
--- a/drivers/media/video/gspca/gspca.c
+++ b/drivers/media/video/gspca/gspca.c
@@ -55,7 +55,7 @@ MODULE_AUTHOR("Jean-François Moine <http://moinejf.free.fr>");
55MODULE_DESCRIPTION("GSPCA USB Camera Driver"); 55MODULE_DESCRIPTION("GSPCA USB Camera Driver");
56MODULE_LICENSE("GPL"); 56MODULE_LICENSE("GPL");
57 57
58#define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 11, 0) 58#define DRIVER_VERSION_NUMBER KERNEL_VERSION(2, 12, 0)
59 59
60#ifdef GSPCA_DEBUG 60#ifdef GSPCA_DEBUG
61int gspca_debug = D_ERR | D_PROBE; 61int gspca_debug = D_ERR | D_PROBE;
@@ -508,8 +508,8 @@ static int gspca_is_compressed(__u32 format)
508 return 0; 508 return 0;
509} 509}
510 510
511static int frame_alloc(struct gspca_dev *gspca_dev, 511static int frame_alloc(struct gspca_dev *gspca_dev, struct file *file,
512 unsigned int count) 512 enum v4l2_memory memory, unsigned int count)
513{ 513{
514 struct gspca_frame *frame; 514 struct gspca_frame *frame;
515 unsigned int frsz; 515 unsigned int frsz;
@@ -519,7 +519,6 @@ static int frame_alloc(struct gspca_dev *gspca_dev,
519 frsz = gspca_dev->cam.cam_mode[i].sizeimage; 519 frsz = gspca_dev->cam.cam_mode[i].sizeimage;
520 PDEBUG(D_STREAM, "frame alloc frsz: %d", frsz); 520 PDEBUG(D_STREAM, "frame alloc frsz: %d", frsz);
521 frsz = PAGE_ALIGN(frsz); 521 frsz = PAGE_ALIGN(frsz);
522 gspca_dev->frsz = frsz;
523 if (count >= GSPCA_MAX_FRAMES) 522 if (count >= GSPCA_MAX_FRAMES)
524 count = GSPCA_MAX_FRAMES - 1; 523 count = GSPCA_MAX_FRAMES - 1;
525 gspca_dev->frbuf = vmalloc_32(frsz * count); 524 gspca_dev->frbuf = vmalloc_32(frsz * count);
@@ -527,6 +526,9 @@ static int frame_alloc(struct gspca_dev *gspca_dev,
527 err("frame alloc failed"); 526 err("frame alloc failed");
528 return -ENOMEM; 527 return -ENOMEM;
529 } 528 }
529 gspca_dev->capt_file = file;
530 gspca_dev->memory = memory;
531 gspca_dev->frsz = frsz;
530 gspca_dev->nframes = count; 532 gspca_dev->nframes = count;
531 for (i = 0; i < count; i++) { 533 for (i = 0; i < count; i++) {
532 frame = &gspca_dev->frame[i]; 534 frame = &gspca_dev->frame[i];
@@ -535,7 +537,7 @@ static int frame_alloc(struct gspca_dev *gspca_dev,
535 frame->v4l2_buf.flags = 0; 537 frame->v4l2_buf.flags = 0;
536 frame->v4l2_buf.field = V4L2_FIELD_NONE; 538 frame->v4l2_buf.field = V4L2_FIELD_NONE;
537 frame->v4l2_buf.length = frsz; 539 frame->v4l2_buf.length = frsz;
538 frame->v4l2_buf.memory = gspca_dev->memory; 540 frame->v4l2_buf.memory = memory;
539 frame->v4l2_buf.sequence = 0; 541 frame->v4l2_buf.sequence = 0;
540 frame->data = gspca_dev->frbuf + i * frsz; 542 frame->data = gspca_dev->frbuf + i * frsz;
541 frame->v4l2_buf.m.offset = i * frsz; 543 frame->v4l2_buf.m.offset = i * frsz;
@@ -558,6 +560,9 @@ static void frame_free(struct gspca_dev *gspca_dev)
558 gspca_dev->frame[i].data = NULL; 560 gspca_dev->frame[i].data = NULL;
559 } 561 }
560 gspca_dev->nframes = 0; 562 gspca_dev->nframes = 0;
563 gspca_dev->frsz = 0;
564 gspca_dev->capt_file = NULL;
565 gspca_dev->memory = GSPCA_MEMORY_NO;
561} 566}
562 567
563static void destroy_urbs(struct gspca_dev *gspca_dev) 568static void destroy_urbs(struct gspca_dev *gspca_dev)
@@ -1210,29 +1215,15 @@ static void gspca_release(struct video_device *vfd)
1210static int dev_open(struct file *file) 1215static int dev_open(struct file *file)
1211{ 1216{
1212 struct gspca_dev *gspca_dev; 1217 struct gspca_dev *gspca_dev;
1213 int ret;
1214 1218
1215 PDEBUG(D_STREAM, "[%s] open", current->comm); 1219 PDEBUG(D_STREAM, "[%s] open", current->comm);
1216 gspca_dev = (struct gspca_dev *) video_devdata(file); 1220 gspca_dev = (struct gspca_dev *) video_devdata(file);
1217 if (mutex_lock_interruptible(&gspca_dev->queue_lock)) 1221 if (!gspca_dev->present)
1218 return -ERESTARTSYS; 1222 return -ENODEV;
1219 if (!gspca_dev->present) {
1220 ret = -ENODEV;
1221 goto out;
1222 }
1223
1224 if (gspca_dev->users > 4) { /* (arbitrary value) */
1225 ret = -EBUSY;
1226 goto out;
1227 }
1228 1223
1229 /* protect the subdriver against rmmod */ 1224 /* protect the subdriver against rmmod */
1230 if (!try_module_get(gspca_dev->module)) { 1225 if (!try_module_get(gspca_dev->module))
1231 ret = -ENODEV; 1226 return -ENODEV;
1232 goto out;
1233 }
1234
1235 gspca_dev->users++;
1236 1227
1237 file->private_data = gspca_dev; 1228 file->private_data = gspca_dev;
1238#ifdef GSPCA_DEBUG 1229#ifdef GSPCA_DEBUG
@@ -1244,14 +1235,7 @@ static int dev_open(struct file *file)
1244 gspca_dev->vdev.debug &= ~(V4L2_DEBUG_IOCTL 1235 gspca_dev->vdev.debug &= ~(V4L2_DEBUG_IOCTL
1245 | V4L2_DEBUG_IOCTL_ARG); 1236 | V4L2_DEBUG_IOCTL_ARG);
1246#endif 1237#endif
1247 ret = 0; 1238 return 0;
1248out:
1249 mutex_unlock(&gspca_dev->queue_lock);
1250 if (ret != 0)
1251 PDEBUG(D_ERR|D_STREAM, "open failed err %d", ret);
1252 else
1253 PDEBUG(D_STREAM, "open done");
1254 return ret;
1255} 1239}
1256 1240
1257static int dev_close(struct file *file) 1241static int dev_close(struct file *file)
@@ -1261,7 +1245,6 @@ static int dev_close(struct file *file)
1261 PDEBUG(D_STREAM, "[%s] close", current->comm); 1245 PDEBUG(D_STREAM, "[%s] close", current->comm);
1262 if (mutex_lock_interruptible(&gspca_dev->queue_lock)) 1246 if (mutex_lock_interruptible(&gspca_dev->queue_lock))
1263 return -ERESTARTSYS; 1247 return -ERESTARTSYS;
1264 gspca_dev->users--;
1265 1248
1266 /* if the file did the capture, free the streaming resources */ 1249 /* if the file did the capture, free the streaming resources */
1267 if (gspca_dev->capt_file == file) { 1250 if (gspca_dev->capt_file == file) {
@@ -1272,8 +1255,6 @@ static int dev_close(struct file *file)
1272 mutex_unlock(&gspca_dev->usb_lock); 1255 mutex_unlock(&gspca_dev->usb_lock);
1273 } 1256 }
1274 frame_free(gspca_dev); 1257 frame_free(gspca_dev);
1275 gspca_dev->capt_file = NULL;
1276 gspca_dev->memory = GSPCA_MEMORY_NO;
1277 } 1258 }
1278 file->private_data = NULL; 1259 file->private_data = NULL;
1279 module_put(gspca_dev->module); 1260 module_put(gspca_dev->module);
@@ -1516,6 +1497,7 @@ static int vidioc_reqbufs(struct file *file, void *priv,
1516 return -ERESTARTSYS; 1497 return -ERESTARTSYS;
1517 1498
1518 if (gspca_dev->memory != GSPCA_MEMORY_NO 1499 if (gspca_dev->memory != GSPCA_MEMORY_NO
1500 && gspca_dev->memory != GSPCA_MEMORY_READ
1519 && gspca_dev->memory != rb->memory) { 1501 && gspca_dev->memory != rb->memory) {
1520 ret = -EBUSY; 1502 ret = -EBUSY;
1521 goto out; 1503 goto out;
@@ -1544,19 +1526,18 @@ static int vidioc_reqbufs(struct file *file, void *priv,
1544 gspca_stream_off(gspca_dev); 1526 gspca_stream_off(gspca_dev);
1545 mutex_unlock(&gspca_dev->usb_lock); 1527 mutex_unlock(&gspca_dev->usb_lock);
1546 } 1528 }
1529 /* Don't restart the stream when switching from read to mmap mode */
1530 if (gspca_dev->memory == GSPCA_MEMORY_READ)
1531 streaming = 0;
1547 1532
1548 /* free the previous allocated buffers, if any */ 1533 /* free the previous allocated buffers, if any */
1549 if (gspca_dev->nframes != 0) { 1534 if (gspca_dev->nframes != 0)
1550 frame_free(gspca_dev); 1535 frame_free(gspca_dev);
1551 gspca_dev->capt_file = NULL;
1552 }
1553 if (rb->count == 0) /* unrequest */ 1536 if (rb->count == 0) /* unrequest */
1554 goto out; 1537 goto out;
1555 gspca_dev->memory = rb->memory; 1538 ret = frame_alloc(gspca_dev, file, rb->memory, rb->count);
1556 ret = frame_alloc(gspca_dev, rb->count);
1557 if (ret == 0) { 1539 if (ret == 0) {
1558 rb->count = gspca_dev->nframes; 1540 rb->count = gspca_dev->nframes;
1559 gspca_dev->capt_file = file;
1560 if (streaming) 1541 if (streaming)
1561 ret = gspca_init_transfer(gspca_dev); 1542 ret = gspca_init_transfer(gspca_dev);
1562 } 1543 }
@@ -1630,11 +1611,15 @@ static int vidioc_streamoff(struct file *file, void *priv,
1630 1611
1631 if (buf_type != V4L2_BUF_TYPE_VIDEO_CAPTURE) 1612 if (buf_type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
1632 return -EINVAL; 1613 return -EINVAL;
1633 if (!gspca_dev->streaming) 1614
1634 return 0;
1635 if (mutex_lock_interruptible(&gspca_dev->queue_lock)) 1615 if (mutex_lock_interruptible(&gspca_dev->queue_lock))
1636 return -ERESTARTSYS; 1616 return -ERESTARTSYS;
1637 1617
1618 if (!gspca_dev->streaming) {
1619 ret = 0;
1620 goto out;
1621 }
1622
1638 /* check the capture file */ 1623 /* check the capture file */
1639 if (gspca_dev->capt_file != file) { 1624 if (gspca_dev->capt_file != file) {
1640 ret = -EBUSY; 1625 ret = -EBUSY;
@@ -1649,6 +1634,8 @@ static int vidioc_streamoff(struct file *file, void *priv,
1649 gspca_dev->usb_err = 0; 1634 gspca_dev->usb_err = 0;
1650 gspca_stream_off(gspca_dev); 1635 gspca_stream_off(gspca_dev);
1651 mutex_unlock(&gspca_dev->usb_lock); 1636 mutex_unlock(&gspca_dev->usb_lock);
1637 /* In case another thread is waiting in dqbuf */
1638 wake_up_interruptible(&gspca_dev->wq);
1652 1639
1653 /* empty the transfer queues */ 1640 /* empty the transfer queues */
1654 atomic_set(&gspca_dev->fr_q, 0); 1641 atomic_set(&gspca_dev->fr_q, 0);
@@ -1827,33 +1814,77 @@ out:
1827 return ret; 1814 return ret;
1828} 1815}
1829 1816
1817static int frame_ready_nolock(struct gspca_dev *gspca_dev, struct file *file,
1818 enum v4l2_memory memory)
1819{
1820 if (!gspca_dev->present)
1821 return -ENODEV;
1822 if (gspca_dev->capt_file != file || gspca_dev->memory != memory ||
1823 !gspca_dev->streaming)
1824 return -EINVAL;
1825
1826 /* check if a frame is ready */
1827 return gspca_dev->fr_o != atomic_read(&gspca_dev->fr_i);
1828}
1829
1830static int frame_ready(struct gspca_dev *gspca_dev, struct file *file,
1831 enum v4l2_memory memory)
1832{
1833 int ret;
1834
1835 if (mutex_lock_interruptible(&gspca_dev->queue_lock))
1836 return -ERESTARTSYS;
1837 ret = frame_ready_nolock(gspca_dev, file, memory);
1838 mutex_unlock(&gspca_dev->queue_lock);
1839 return ret;
1840}
1841
1830/* 1842/*
1831 * wait for a video frame 1843 * dequeue a video buffer
1832 * 1844 *
1833 * If a frame is ready, its index is returned. 1845 * If nonblock_ing is false, block until a buffer is available.
1834 */ 1846 */
1835static int frame_wait(struct gspca_dev *gspca_dev, 1847static int vidioc_dqbuf(struct file *file, void *priv,
1836 int nonblock_ing) 1848 struct v4l2_buffer *v4l2_buf)
1837{ 1849{
1838 int i, ret; 1850 struct gspca_dev *gspca_dev = priv;
1851 struct gspca_frame *frame;
1852 int i, j, ret;
1839 1853
1840 /* check if a frame is ready */ 1854 PDEBUG(D_FRAM, "dqbuf");
1841 i = gspca_dev->fr_o; 1855
1842 if (i == atomic_read(&gspca_dev->fr_i)) { 1856 if (mutex_lock_interruptible(&gspca_dev->queue_lock))
1843 if (nonblock_ing) 1857 return -ERESTARTSYS;
1858
1859 for (;;) {
1860 ret = frame_ready_nolock(gspca_dev, file, v4l2_buf->memory);
1861 if (ret < 0)
1862 goto out;
1863 if (ret > 0)
1864 break;
1865
1866 mutex_unlock(&gspca_dev->queue_lock);
1867
1868 if (file->f_flags & O_NONBLOCK)
1844 return -EAGAIN; 1869 return -EAGAIN;
1845 1870
1846 /* wait till a frame is ready */ 1871 /* wait till a frame is ready */
1847 ret = wait_event_interruptible_timeout(gspca_dev->wq, 1872 ret = wait_event_interruptible_timeout(gspca_dev->wq,
1848 i != atomic_read(&gspca_dev->fr_i) || 1873 frame_ready(gspca_dev, file, v4l2_buf->memory),
1849 !gspca_dev->streaming || !gspca_dev->present,
1850 msecs_to_jiffies(3000)); 1874 msecs_to_jiffies(3000));
1851 if (ret < 0) 1875 if (ret < 0)
1852 return ret; 1876 return ret;
1853 if (ret == 0 || !gspca_dev->streaming || !gspca_dev->present) 1877 if (ret == 0)
1854 return -EIO; 1878 return -EIO;
1879
1880 if (mutex_lock_interruptible(&gspca_dev->queue_lock))
1881 return -ERESTARTSYS;
1855 } 1882 }
1856 1883
1884 i = gspca_dev->fr_o;
1885 j = gspca_dev->fr_queue[i];
1886 frame = &gspca_dev->frame[j];
1887
1857 gspca_dev->fr_o = (i + 1) % GSPCA_MAX_FRAMES; 1888 gspca_dev->fr_o = (i + 1) % GSPCA_MAX_FRAMES;
1858 1889
1859 if (gspca_dev->sd_desc->dq_callback) { 1890 if (gspca_dev->sd_desc->dq_callback) {
@@ -1863,46 +1894,12 @@ static int frame_wait(struct gspca_dev *gspca_dev,
1863 gspca_dev->sd_desc->dq_callback(gspca_dev); 1894 gspca_dev->sd_desc->dq_callback(gspca_dev);
1864 mutex_unlock(&gspca_dev->usb_lock); 1895 mutex_unlock(&gspca_dev->usb_lock);
1865 } 1896 }
1866 return gspca_dev->fr_queue[i];
1867}
1868
1869/*
1870 * dequeue a video buffer
1871 *
1872 * If nonblock_ing is false, block until a buffer is available.
1873 */
1874static int vidioc_dqbuf(struct file *file, void *priv,
1875 struct v4l2_buffer *v4l2_buf)
1876{
1877 struct gspca_dev *gspca_dev = priv;
1878 struct gspca_frame *frame;
1879 int i, ret;
1880
1881 PDEBUG(D_FRAM, "dqbuf");
1882 if (v4l2_buf->memory != gspca_dev->memory)
1883 return -EINVAL;
1884
1885 if (!gspca_dev->present)
1886 return -ENODEV;
1887
1888 /* if not streaming, be sure the application will not loop forever */
1889 if (!(file->f_flags & O_NONBLOCK)
1890 && !gspca_dev->streaming && gspca_dev->users == 1)
1891 return -EINVAL;
1892 1897
1893 /* only the capturing file may dequeue */ 1898 frame->v4l2_buf.flags &= ~V4L2_BUF_FLAG_DONE;
1894 if (gspca_dev->capt_file != file) 1899 memcpy(v4l2_buf, &frame->v4l2_buf, sizeof *v4l2_buf);
1895 return -EINVAL; 1900 PDEBUG(D_FRAM, "dqbuf %d", j);
1896 1901 ret = 0;
1897 /* only one dequeue / read at a time */
1898 if (mutex_lock_interruptible(&gspca_dev->read_lock))
1899 return -ERESTARTSYS;
1900 1902
1901 ret = frame_wait(gspca_dev, file->f_flags & O_NONBLOCK);
1902 if (ret < 0)
1903 goto out;
1904 i = ret; /* frame index */
1905 frame = &gspca_dev->frame[i];
1906 if (gspca_dev->memory == V4L2_MEMORY_USERPTR) { 1903 if (gspca_dev->memory == V4L2_MEMORY_USERPTR) {
1907 if (copy_to_user((__u8 __user *) frame->v4l2_buf.m.userptr, 1904 if (copy_to_user((__u8 __user *) frame->v4l2_buf.m.userptr,
1908 frame->data, 1905 frame->data,
@@ -1910,15 +1907,10 @@ static int vidioc_dqbuf(struct file *file, void *priv,
1910 PDEBUG(D_ERR|D_STREAM, 1907 PDEBUG(D_ERR|D_STREAM,
1911 "dqbuf cp to user failed"); 1908 "dqbuf cp to user failed");
1912 ret = -EFAULT; 1909 ret = -EFAULT;
1913 goto out;
1914 } 1910 }
1915 } 1911 }
1916 frame->v4l2_buf.flags &= ~V4L2_BUF_FLAG_DONE;
1917 memcpy(v4l2_buf, &frame->v4l2_buf, sizeof *v4l2_buf);
1918 PDEBUG(D_FRAM, "dqbuf %d", i);
1919 ret = 0;
1920out: 1912out:
1921 mutex_unlock(&gspca_dev->read_lock); 1913 mutex_unlock(&gspca_dev->queue_lock);
1922 return ret; 1914 return ret;
1923} 1915}
1924 1916
@@ -2033,9 +2025,7 @@ static unsigned int dev_poll(struct file *file, poll_table *wait)
2033 poll_wait(file, &gspca_dev->wq, wait); 2025 poll_wait(file, &gspca_dev->wq, wait);
2034 2026
2035 /* if reqbufs is not done, the user would use read() */ 2027 /* if reqbufs is not done, the user would use read() */
2036 if (gspca_dev->nframes == 0) { 2028 if (gspca_dev->memory == GSPCA_MEMORY_NO) {
2037 if (gspca_dev->memory != GSPCA_MEMORY_NO)
2038 return POLLERR; /* not the 1st time */
2039 ret = read_alloc(gspca_dev, file); 2029 ret = read_alloc(gspca_dev, file);
2040 if (ret != 0) 2030 if (ret != 0)
2041 return POLLERR; 2031 return POLLERR;
@@ -2067,18 +2057,10 @@ static ssize_t dev_read(struct file *file, char __user *data,
2067 PDEBUG(D_FRAM, "read (%zd)", count); 2057 PDEBUG(D_FRAM, "read (%zd)", count);
2068 if (!gspca_dev->present) 2058 if (!gspca_dev->present)
2069 return -ENODEV; 2059 return -ENODEV;
2070 switch (gspca_dev->memory) { 2060 if (gspca_dev->memory == GSPCA_MEMORY_NO) { /* first time ? */
2071 case GSPCA_MEMORY_NO: /* first time */
2072 ret = read_alloc(gspca_dev, file); 2061 ret = read_alloc(gspca_dev, file);
2073 if (ret != 0) 2062 if (ret != 0)
2074 return ret; 2063 return ret;
2075 break;
2076 case GSPCA_MEMORY_READ:
2077 if (gspca_dev->capt_file == file)
2078 break;
2079 /* fall thru */
2080 default:
2081 return -EINVAL;
2082 } 2064 }
2083 2065
2084 /* get a frame */ 2066 /* get a frame */
@@ -2266,7 +2248,6 @@ int gspca_dev_probe2(struct usb_interface *intf,
2266 goto out; 2248 goto out;
2267 2249
2268 mutex_init(&gspca_dev->usb_lock); 2250 mutex_init(&gspca_dev->usb_lock);
2269 mutex_init(&gspca_dev->read_lock);
2270 mutex_init(&gspca_dev->queue_lock); 2251 mutex_init(&gspca_dev->queue_lock);
2271 init_waitqueue_head(&gspca_dev->wq); 2252 init_waitqueue_head(&gspca_dev->wq);
2272 2253
@@ -2341,12 +2322,11 @@ void gspca_disconnect(struct usb_interface *intf)
2341 PDEBUG(D_PROBE, "%s disconnect", 2322 PDEBUG(D_PROBE, "%s disconnect",
2342 video_device_node_name(&gspca_dev->vdev)); 2323 video_device_node_name(&gspca_dev->vdev));
2343 mutex_lock(&gspca_dev->usb_lock); 2324 mutex_lock(&gspca_dev->usb_lock);
2325
2344 gspca_dev->present = 0; 2326 gspca_dev->present = 0;
2327 wake_up_interruptible(&gspca_dev->wq);
2345 2328
2346 if (gspca_dev->streaming) { 2329 destroy_urbs(gspca_dev);
2347 destroy_urbs(gspca_dev);
2348 wake_up_interruptible(&gspca_dev->wq);
2349 }
2350 2330
2351#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE) 2331#if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
2352 gspca_input_destroy_urb(gspca_dev); 2332 gspca_input_destroy_urb(gspca_dev);
diff --git a/drivers/media/video/gspca/gspca.h b/drivers/media/video/gspca/gspca.h
index 97b77a26a2eb..41755226d389 100644
--- a/drivers/media/video/gspca/gspca.h
+++ b/drivers/media/video/gspca/gspca.h
@@ -205,14 +205,12 @@ struct gspca_dev {
205 205
206 wait_queue_head_t wq; /* wait queue */ 206 wait_queue_head_t wq; /* wait queue */
207 struct mutex usb_lock; /* usb exchange protection */ 207 struct mutex usb_lock; /* usb exchange protection */
208 struct mutex read_lock; /* read protection */
209 struct mutex queue_lock; /* ISOC queue protection */ 208 struct mutex queue_lock; /* ISOC queue protection */
210 int usb_err; /* USB error - protected by usb_lock */ 209 int usb_err; /* USB error - protected by usb_lock */
211 u16 pkt_size; /* ISOC packet size */ 210 u16 pkt_size; /* ISOC packet size */
212#ifdef CONFIG_PM 211#ifdef CONFIG_PM
213 char frozen; /* suspend - resume */ 212 char frozen; /* suspend - resume */
214#endif 213#endif
215 char users; /* number of opens */
216 char present; /* device connected */ 214 char present; /* device connected */
217 char nbufread; /* number of buffers for read() */ 215 char nbufread; /* number of buffers for read() */
218 char memory; /* memory type (V4L2_MEMORY_xxx) */ 216 char memory; /* memory type (V4L2_MEMORY_xxx) */
diff --git a/drivers/media/video/gspca/jeilinj.c b/drivers/media/video/gspca/jeilinj.c
index a35e87bb0388..06b777f5379e 100644
--- a/drivers/media/video/gspca/jeilinj.c
+++ b/drivers/media/video/gspca/jeilinj.c
@@ -314,7 +314,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
314} 314}
315 315
316/* Table of supported USB devices */ 316/* Table of supported USB devices */
317static const __devinitdata struct usb_device_id device_table[] = { 317static const struct usb_device_id device_table[] = {
318 {USB_DEVICE(0x0979, 0x0280)}, 318 {USB_DEVICE(0x0979, 0x0280)},
319 {} 319 {}
320}; 320};
diff --git a/drivers/media/video/gspca/jpeg.h b/drivers/media/video/gspca/jpeg.h
index de63c36806c0..ab54910418b4 100644
--- a/drivers/media/video/gspca/jpeg.h
+++ b/drivers/media/video/gspca/jpeg.h
@@ -141,9 +141,9 @@ static void jpeg_define(u8 *jpeg_hdr,
141 memcpy(jpeg_hdr, jpeg_head, sizeof jpeg_head); 141 memcpy(jpeg_hdr, jpeg_head, sizeof jpeg_head);
142#ifndef CONEX_CAM 142#ifndef CONEX_CAM
143 jpeg_hdr[JPEG_HEIGHT_OFFSET + 0] = height >> 8; 143 jpeg_hdr[JPEG_HEIGHT_OFFSET + 0] = height >> 8;
144 jpeg_hdr[JPEG_HEIGHT_OFFSET + 1] = height & 0xff; 144 jpeg_hdr[JPEG_HEIGHT_OFFSET + 1] = height;
145 jpeg_hdr[JPEG_HEIGHT_OFFSET + 2] = width >> 8; 145 jpeg_hdr[JPEG_HEIGHT_OFFSET + 2] = width >> 8;
146 jpeg_hdr[JPEG_HEIGHT_OFFSET + 3] = width & 0xff; 146 jpeg_hdr[JPEG_HEIGHT_OFFSET + 3] = width;
147 jpeg_hdr[JPEG_HEIGHT_OFFSET + 6] = samplesY; 147 jpeg_hdr[JPEG_HEIGHT_OFFSET + 6] = samplesY;
148#endif 148#endif
149} 149}
diff --git a/drivers/media/video/gspca/konica.c b/drivers/media/video/gspca/konica.c
index d2ce65dcbfdc..5964691c0e95 100644
--- a/drivers/media/video/gspca/konica.c
+++ b/drivers/media/video/gspca/konica.c
@@ -607,7 +607,7 @@ static const struct sd_desc sd_desc = {
607}; 607};
608 608
609/* -- module initialisation -- */ 609/* -- module initialisation -- */
610static const __devinitdata struct usb_device_id device_table[] = { 610static const struct usb_device_id device_table[] = {
611 {USB_DEVICE(0x04c8, 0x0720)}, /* Intel YC 76 */ 611 {USB_DEVICE(0x04c8, 0x0720)}, /* Intel YC 76 */
612 {} 612 {}
613}; 613};
diff --git a/drivers/media/video/gspca/m5602/m5602_core.c b/drivers/media/video/gspca/m5602/m5602_core.c
index c872b93a3351..a7722b1aef9b 100644
--- a/drivers/media/video/gspca/m5602/m5602_core.c
+++ b/drivers/media/video/gspca/m5602/m5602_core.c
@@ -28,7 +28,7 @@ int force_sensor;
28static int dump_bridge; 28static int dump_bridge;
29int dump_sensor; 29int dump_sensor;
30 30
31static const __devinitdata struct usb_device_id m5602_table[] = { 31static const struct usb_device_id m5602_table[] = {
32 {USB_DEVICE(0x0402, 0x5602)}, 32 {USB_DEVICE(0x0402, 0x5602)},
33 {} 33 {}
34}; 34};
diff --git a/drivers/media/video/gspca/mars.c b/drivers/media/video/gspca/mars.c
index a81536e78698..cb4d0bf0d784 100644
--- a/drivers/media/video/gspca/mars.c
+++ b/drivers/media/video/gspca/mars.c
@@ -490,7 +490,7 @@ static const struct sd_desc sd_desc = {
490}; 490};
491 491
492/* -- module initialisation -- */ 492/* -- module initialisation -- */
493static const __devinitdata struct usb_device_id device_table[] = { 493static const struct usb_device_id device_table[] = {
494 {USB_DEVICE(0x093a, 0x050f)}, 494 {USB_DEVICE(0x093a, 0x050f)},
495 {} 495 {}
496}; 496};
diff --git a/drivers/media/video/gspca/mr97310a.c b/drivers/media/video/gspca/mr97310a.c
index 7607a288b51c..3884c9d300c5 100644
--- a/drivers/media/video/gspca/mr97310a.c
+++ b/drivers/media/video/gspca/mr97310a.c
@@ -1229,7 +1229,7 @@ static const struct sd_desc sd_desc = {
1229}; 1229};
1230 1230
1231/* -- module initialisation -- */ 1231/* -- module initialisation -- */
1232static const __devinitdata struct usb_device_id device_table[] = { 1232static const struct usb_device_id device_table[] = {
1233 {USB_DEVICE(0x08ca, 0x0110)}, /* Trust Spyc@m 100 */ 1233 {USB_DEVICE(0x08ca, 0x0110)}, /* Trust Spyc@m 100 */
1234 {USB_DEVICE(0x08ca, 0x0111)}, /* Aiptek Pencam VGA+ */ 1234 {USB_DEVICE(0x08ca, 0x0111)}, /* Aiptek Pencam VGA+ */
1235 {USB_DEVICE(0x093a, 0x010f)}, /* All other known MR97310A VGA cams */ 1235 {USB_DEVICE(0x093a, 0x010f)}, /* All other known MR97310A VGA cams */
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index e1c3b9328ace..8ab2c452c25e 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -488,7 +488,6 @@ static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
488#define R511_SNAP_PXDIV 0x1c 488#define R511_SNAP_PXDIV 0x1c
489#define R511_SNAP_LNDIV 0x1d 489#define R511_SNAP_LNDIV 0x1d
490#define R511_SNAP_UV_EN 0x1e 490#define R511_SNAP_UV_EN 0x1e
491#define R511_SNAP_UV_EN 0x1e
492#define R511_SNAP_OPTS 0x1f 491#define R511_SNAP_OPTS 0x1f
493 492
494#define R511_DRAM_FLOW_CTL 0x20 493#define R511_DRAM_FLOW_CTL 0x20
@@ -1847,8 +1846,7 @@ static const struct ov_i2c_regvals norm_7670[] = {
1847 { 0x6c, 0x0a }, 1846 { 0x6c, 0x0a },
1848 { 0x6d, 0x55 }, 1847 { 0x6d, 0x55 },
1849 { 0x6e, 0x11 }, 1848 { 0x6e, 0x11 },
1850 { 0x6f, 0x9f }, 1849 { 0x6f, 0x9f }, /* "9e for advance AWB" */
1851 /* "9e for advance AWB" */
1852 { 0x6a, 0x40 }, 1850 { 0x6a, 0x40 },
1853 { OV7670_R01_BLUE, 0x40 }, 1851 { OV7670_R01_BLUE, 0x40 },
1854 { OV7670_R02_RED, 0x60 }, 1852 { OV7670_R02_RED, 0x60 },
@@ -3054,7 +3052,7 @@ static void ov519_configure(struct sd *sd)
3054{ 3052{
3055 static const struct ov_regvals init_519[] = { 3053 static const struct ov_regvals init_519[] = {
3056 { 0x5a, 0x6d }, /* EnableSystem */ 3054 { 0x5a, 0x6d }, /* EnableSystem */
3057 { 0x53, 0x9b }, 3055 { 0x53, 0x9b }, /* don't enable the microcontroller */
3058 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */ 3056 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3059 { 0x5d, 0x03 }, 3057 { 0x5d, 0x03 },
3060 { 0x49, 0x01 }, 3058 { 0x49, 0x01 },
@@ -4747,7 +4745,7 @@ static const struct sd_desc sd_desc = {
4747}; 4745};
4748 4746
4749/* -- module initialisation -- */ 4747/* -- module initialisation -- */
4750static const __devinitdata struct usb_device_id device_table[] = { 4748static const struct usb_device_id device_table[] = {
4751 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF }, 4749 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4752 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 }, 4750 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4753 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 }, 4751 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
diff --git a/drivers/media/video/gspca/ov534.c b/drivers/media/video/gspca/ov534.c
index 0edf93973b1c..04da22802736 100644
--- a/drivers/media/video/gspca/ov534.c
+++ b/drivers/media/video/gspca/ov534.c
@@ -479,15 +479,20 @@ static void ov534_reg_write(struct gspca_dev *gspca_dev, u16 reg, u8 val)
479 struct usb_device *udev = gspca_dev->dev; 479 struct usb_device *udev = gspca_dev->dev;
480 int ret; 480 int ret;
481 481
482 PDEBUG(D_USBO, "reg=0x%04x, val=0%02x", reg, val); 482 if (gspca_dev->usb_err < 0)
483 return;
484
485 PDEBUG(D_USBO, "SET 01 0000 %04x %02x", reg, val);
483 gspca_dev->usb_buf[0] = val; 486 gspca_dev->usb_buf[0] = val;
484 ret = usb_control_msg(udev, 487 ret = usb_control_msg(udev,
485 usb_sndctrlpipe(udev, 0), 488 usb_sndctrlpipe(udev, 0),
486 0x01, 489 0x01,
487 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 490 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
488 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT); 491 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
489 if (ret < 0) 492 if (ret < 0) {
490 err("write failed %d", ret); 493 err("write failed %d", ret);
494 gspca_dev->usb_err = ret;
495 }
491} 496}
492 497
493static u8 ov534_reg_read(struct gspca_dev *gspca_dev, u16 reg) 498static u8 ov534_reg_read(struct gspca_dev *gspca_dev, u16 reg)
@@ -495,14 +500,18 @@ static u8 ov534_reg_read(struct gspca_dev *gspca_dev, u16 reg)
495 struct usb_device *udev = gspca_dev->dev; 500 struct usb_device *udev = gspca_dev->dev;
496 int ret; 501 int ret;
497 502
503 if (gspca_dev->usb_err < 0)
504 return 0;
498 ret = usb_control_msg(udev, 505 ret = usb_control_msg(udev,
499 usb_rcvctrlpipe(udev, 0), 506 usb_rcvctrlpipe(udev, 0),
500 0x01, 507 0x01,
501 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 508 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
502 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT); 509 0x00, reg, gspca_dev->usb_buf, 1, CTRL_TIMEOUT);
503 PDEBUG(D_USBI, "reg=0x%04x, data=0x%02x", reg, gspca_dev->usb_buf[0]); 510 PDEBUG(D_USBI, "GET 01 0000 %04x %02x", reg, gspca_dev->usb_buf[0]);
504 if (ret < 0) 511 if (ret < 0) {
505 err("read failed %d", ret); 512 err("read failed %d", ret);
513 gspca_dev->usb_err = ret;
514 }
506 return gspca_dev->usb_buf[0]; 515 return gspca_dev->usb_buf[0];
507} 516}
508 517
@@ -558,13 +567,15 @@ static int sccb_check_status(struct gspca_dev *gspca_dev)
558 567
559static void sccb_reg_write(struct gspca_dev *gspca_dev, u8 reg, u8 val) 568static void sccb_reg_write(struct gspca_dev *gspca_dev, u8 reg, u8 val)
560{ 569{
561 PDEBUG(D_USBO, "reg: 0x%02x, val: 0x%02x", reg, val); 570 PDEBUG(D_USBO, "sccb write: %02x %02x", reg, val);
562 ov534_reg_write(gspca_dev, OV534_REG_SUBADDR, reg); 571 ov534_reg_write(gspca_dev, OV534_REG_SUBADDR, reg);
563 ov534_reg_write(gspca_dev, OV534_REG_WRITE, val); 572 ov534_reg_write(gspca_dev, OV534_REG_WRITE, val);
564 ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_3); 573 ov534_reg_write(gspca_dev, OV534_REG_OPERATION, OV534_OP_WRITE_3);
565 574
566 if (!sccb_check_status(gspca_dev)) 575 if (!sccb_check_status(gspca_dev)) {
567 err("sccb_reg_write failed"); 576 err("sccb_reg_write failed");
577 gspca_dev->usb_err = -EIO;
578 }
568} 579}
569 580
570static u8 sccb_reg_read(struct gspca_dev *gspca_dev, u16 reg) 581static u8 sccb_reg_read(struct gspca_dev *gspca_dev, u16 reg)
@@ -885,7 +896,7 @@ static int sd_init(struct gspca_dev *gspca_dev)
885 ov534_set_led(gspca_dev, 0); 896 ov534_set_led(gspca_dev, 0);
886 set_frame_rate(gspca_dev); 897 set_frame_rate(gspca_dev);
887 898
888 return 0; 899 return gspca_dev->usb_err;
889} 900}
890 901
891static int sd_start(struct gspca_dev *gspca_dev) 902static int sd_start(struct gspca_dev *gspca_dev)
@@ -920,7 +931,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
920 931
921 ov534_set_led(gspca_dev, 1); 932 ov534_set_led(gspca_dev, 1);
922 ov534_reg_write(gspca_dev, 0xe0, 0x00); 933 ov534_reg_write(gspca_dev, 0xe0, 0x00);
923 return 0; 934 return gspca_dev->usb_err;
924} 935}
925 936
926static void sd_stopN(struct gspca_dev *gspca_dev) 937static void sd_stopN(struct gspca_dev *gspca_dev)
@@ -1289,7 +1300,7 @@ static const struct sd_desc sd_desc = {
1289}; 1300};
1290 1301
1291/* -- module initialisation -- */ 1302/* -- module initialisation -- */
1292static const __devinitdata struct usb_device_id device_table[] = { 1303static const struct usb_device_id device_table[] = {
1293 {USB_DEVICE(0x1415, 0x2000)}, 1304 {USB_DEVICE(0x1415, 0x2000)},
1294 {} 1305 {}
1295}; 1306};
diff --git a/drivers/media/video/gspca/ov534_9.c b/drivers/media/video/gspca/ov534_9.c
index c5244b4b4777..aaf5428c57f5 100644
--- a/drivers/media/video/gspca/ov534_9.c
+++ b/drivers/media/video/gspca/ov534_9.c
@@ -1429,7 +1429,7 @@ static const struct sd_desc sd_desc = {
1429}; 1429};
1430 1430
1431/* -- module initialisation -- */ 1431/* -- module initialisation -- */
1432static const __devinitdata struct usb_device_id device_table[] = { 1432static const struct usb_device_id device_table[] = {
1433 {USB_DEVICE(0x06f8, 0x3003)}, 1433 {USB_DEVICE(0x06f8, 0x3003)},
1434 {} 1434 {}
1435}; 1435};
diff --git a/drivers/media/video/gspca/pac207.c b/drivers/media/video/gspca/pac207.c
index 96f9986305b4..81739a2f205e 100644
--- a/drivers/media/video/gspca/pac207.c
+++ b/drivers/media/video/gspca/pac207.c
@@ -530,7 +530,7 @@ static const struct sd_desc sd_desc = {
530}; 530};
531 531
532/* -- module initialisation -- */ 532/* -- module initialisation -- */
533static const __devinitdata struct usb_device_id device_table[] = { 533static const struct usb_device_id device_table[] = {
534 {USB_DEVICE(0x041e, 0x4028)}, 534 {USB_DEVICE(0x041e, 0x4028)},
535 {USB_DEVICE(0x093a, 0x2460)}, 535 {USB_DEVICE(0x093a, 0x2460)},
536 {USB_DEVICE(0x093a, 0x2461)}, 536 {USB_DEVICE(0x093a, 0x2461)},
diff --git a/drivers/media/video/gspca/pac7302.c b/drivers/media/video/gspca/pac7302.c
index 2700975abce5..5615d7bd8304 100644
--- a/drivers/media/video/gspca/pac7302.c
+++ b/drivers/media/video/gspca/pac7302.c
@@ -1184,7 +1184,7 @@ static const struct sd_desc sd_desc = {
1184}; 1184};
1185 1185
1186/* -- module initialisation -- */ 1186/* -- module initialisation -- */
1187static const struct usb_device_id device_table[] __devinitconst = { 1187static const struct usb_device_id device_table[] = {
1188 {USB_DEVICE(0x06f8, 0x3009)}, 1188 {USB_DEVICE(0x06f8, 0x3009)},
1189 {USB_DEVICE(0x093a, 0x2620)}, 1189 {USB_DEVICE(0x093a, 0x2620)},
1190 {USB_DEVICE(0x093a, 0x2621)}, 1190 {USB_DEVICE(0x093a, 0x2621)},
@@ -1201,7 +1201,7 @@ static const struct usb_device_id device_table[] __devinitconst = {
1201MODULE_DEVICE_TABLE(usb, device_table); 1201MODULE_DEVICE_TABLE(usb, device_table);
1202 1202
1203/* -- device connect -- */ 1203/* -- device connect -- */
1204static int __devinit sd_probe(struct usb_interface *intf, 1204static int sd_probe(struct usb_interface *intf,
1205 const struct usb_device_id *id) 1205 const struct usb_device_id *id)
1206{ 1206{
1207 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), 1207 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/pac7311.c b/drivers/media/video/gspca/pac7311.c
index 6820f5d58b19..f8801b50e64f 100644
--- a/drivers/media/video/gspca/pac7311.c
+++ b/drivers/media/video/gspca/pac7311.c
@@ -837,7 +837,7 @@ static const struct sd_desc sd_desc = {
837}; 837};
838 838
839/* -- module initialisation -- */ 839/* -- module initialisation -- */
840static const struct usb_device_id device_table[] __devinitconst = { 840static const struct usb_device_id device_table[] = {
841 {USB_DEVICE(0x093a, 0x2600)}, 841 {USB_DEVICE(0x093a, 0x2600)},
842 {USB_DEVICE(0x093a, 0x2601)}, 842 {USB_DEVICE(0x093a, 0x2601)},
843 {USB_DEVICE(0x093a, 0x2603)}, 843 {USB_DEVICE(0x093a, 0x2603)},
@@ -849,7 +849,7 @@ static const struct usb_device_id device_table[] __devinitconst = {
849MODULE_DEVICE_TABLE(usb, device_table); 849MODULE_DEVICE_TABLE(usb, device_table);
850 850
851/* -- device connect -- */ 851/* -- device connect -- */
852static int __devinit sd_probe(struct usb_interface *intf, 852static int sd_probe(struct usb_interface *intf,
853 const struct usb_device_id *id) 853 const struct usb_device_id *id)
854{ 854{
855 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), 855 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/sn9c2028.c b/drivers/media/video/gspca/sn9c2028.c
index 40a06680502d..4271f86dfe01 100644
--- a/drivers/media/video/gspca/sn9c2028.c
+++ b/drivers/media/video/gspca/sn9c2028.c
@@ -703,7 +703,7 @@ static const struct sd_desc sd_desc = {
703}; 703};
704 704
705/* -- module initialisation -- */ 705/* -- module initialisation -- */
706static const __devinitdata struct usb_device_id device_table[] = { 706static const struct usb_device_id device_table[] = {
707 {USB_DEVICE(0x0458, 0x7005)}, /* Genius Smart 300, version 2 */ 707 {USB_DEVICE(0x0458, 0x7005)}, /* Genius Smart 300, version 2 */
708 /* The Genius Smart is untested. I can't find an owner ! */ 708 /* The Genius Smart is untested. I can't find an owner ! */
709 /* {USB_DEVICE(0x0c45, 0x8000)}, DC31VC, Don't know this camera */ 709 /* {USB_DEVICE(0x0c45, 0x8000)}, DC31VC, Don't know this camera */
diff --git a/drivers/media/video/gspca/sn9c20x.c b/drivers/media/video/gspca/sn9c20x.c
index cb08d00d0a31..fcf29897b713 100644
--- a/drivers/media/video/gspca/sn9c20x.c
+++ b/drivers/media/video/gspca/sn9c20x.c
@@ -2470,7 +2470,7 @@ static const struct sd_desc sd_desc = {
2470 | (SENSOR_ ## sensor << 8) \ 2470 | (SENSOR_ ## sensor << 8) \
2471 | (i2c_addr) 2471 | (i2c_addr)
2472 2472
2473static const __devinitdata struct usb_device_id device_table[] = { 2473static const struct usb_device_id device_table[] = {
2474 {USB_DEVICE(0x0c45, 0x6240), SN9C20X(MT9M001, 0x5d, 0)}, 2474 {USB_DEVICE(0x0c45, 0x6240), SN9C20X(MT9M001, 0x5d, 0)},
2475 {USB_DEVICE(0x0c45, 0x6242), SN9C20X(MT9M111, 0x5d, 0)}, 2475 {USB_DEVICE(0x0c45, 0x6242), SN9C20X(MT9M111, 0x5d, 0)},
2476 {USB_DEVICE(0x0c45, 0x6248), SN9C20X(OV9655, 0x30, 0)}, 2476 {USB_DEVICE(0x0c45, 0x6248), SN9C20X(OV9655, 0x30, 0)},
diff --git a/drivers/media/video/gspca/sonixb.c b/drivers/media/video/gspca/sonixb.c
index 73504a3f87b7..c6cd68d66b53 100644
--- a/drivers/media/video/gspca/sonixb.c
+++ b/drivers/media/video/gspca/sonixb.c
@@ -23,8 +23,15 @@
23/* Some documentation on known sonixb registers: 23/* Some documentation on known sonixb registers:
24 24
25Reg Use 25Reg Use
26sn9c101 / sn9c102:
260x10 high nibble red gain low nibble blue gain 270x10 high nibble red gain low nibble blue gain
270x11 low nibble green gain 280x11 low nibble green gain
29sn9c103:
300x05 red gain 0-127
310x06 blue gain 0-127
320x07 green gain 0-127
33all:
340x08-0x0f i2c / 3wire registers
280x12 hstart 350x12 hstart
290x13 vstart 360x13 vstart
300x15 hsize (hsize = register-value * 16) 370x15 hsize (hsize = register-value * 16)
@@ -88,12 +95,9 @@ struct sd {
88typedef const __u8 sensor_init_t[8]; 95typedef const __u8 sensor_init_t[8];
89 96
90struct sensor_data { 97struct sensor_data {
91 const __u8 *bridge_init[2]; 98 const __u8 *bridge_init;
92 int bridge_init_size[2];
93 sensor_init_t *sensor_init; 99 sensor_init_t *sensor_init;
94 int sensor_init_size; 100 int sensor_init_size;
95 sensor_init_t *sensor_bridge_init[2];
96 int sensor_bridge_init_size[2];
97 int flags; 101 int flags;
98 unsigned ctrl_dis; 102 unsigned ctrl_dis;
99 __u8 sensor_addr; 103 __u8 sensor_addr;
@@ -114,7 +118,6 @@ struct sensor_data {
114#define NO_FREQ (1 << FREQ_IDX) 118#define NO_FREQ (1 << FREQ_IDX)
115#define NO_BRIGHTNESS (1 << BRIGHTNESS_IDX) 119#define NO_BRIGHTNESS (1 << BRIGHTNESS_IDX)
116 120
117#define COMP2 0x8f
118#define COMP 0xc7 /* 0x87 //0x07 */ 121#define COMP 0xc7 /* 0x87 //0x07 */
119#define COMP1 0xc9 /* 0x89 //0x09 */ 122#define COMP1 0xc9 /* 0x89 //0x09 */
120 123
@@ -123,15 +126,11 @@ struct sensor_data {
123 126
124#define SYS_CLK 0x04 127#define SYS_CLK 0x04
125 128
126#define SENS(bridge_1, bridge_3, sensor, sensor_1, \ 129#define SENS(bridge, sensor, _flags, _ctrl_dis, _sensor_addr) \
127 sensor_3, _flags, _ctrl_dis, _sensor_addr) \
128{ \ 130{ \
129 .bridge_init = { bridge_1, bridge_3 }, \ 131 .bridge_init = bridge, \
130 .bridge_init_size = { sizeof(bridge_1), sizeof(bridge_3) }, \
131 .sensor_init = sensor, \ 132 .sensor_init = sensor, \
132 .sensor_init_size = sizeof(sensor), \ 133 .sensor_init_size = sizeof(sensor), \
133 .sensor_bridge_init = { sensor_1, sensor_3,}, \
134 .sensor_bridge_init_size = { sizeof(sensor_1), sizeof(sensor_3)}, \
135 .flags = _flags, .ctrl_dis = _ctrl_dis, .sensor_addr = _sensor_addr \ 134 .flags = _flags, .ctrl_dis = _ctrl_dis, .sensor_addr = _sensor_addr \
136} 135}
137 136
@@ -311,7 +310,6 @@ static const __u8 initHv7131d[] = {
311 0x00, 0x00, 310 0x00, 0x00,
312 0x00, 0x00, 0x00, 0x02, 0x02, 0x00, 311 0x00, 0x00, 0x00, 0x02, 0x02, 0x00,
313 0x28, 0x1e, 0x60, 0x8e, 0x42, 312 0x28, 0x1e, 0x60, 0x8e, 0x42,
314 0x1d, 0x10, 0x02, 0x03, 0x0f, 0x0c
315}; 313};
316static const __u8 hv7131d_sensor_init[][8] = { 314static const __u8 hv7131d_sensor_init[][8] = {
317 {0xa0, 0x11, 0x01, 0x04, 0x00, 0x00, 0x00, 0x17}, 315 {0xa0, 0x11, 0x01, 0x04, 0x00, 0x00, 0x00, 0x17},
@@ -326,7 +324,6 @@ static const __u8 initHv7131r[] = {
326 0x00, 0x00, 324 0x00, 0x00,
327 0x00, 0x00, 0x00, 0x02, 0x01, 0x00, 325 0x00, 0x00, 0x00, 0x02, 0x01, 0x00,
328 0x28, 0x1e, 0x60, 0x8a, 0x20, 326 0x28, 0x1e, 0x60, 0x8a, 0x20,
329 0x1d, 0x10, 0x02, 0x03, 0x0f, 0x0c
330}; 327};
331static const __u8 hv7131r_sensor_init[][8] = { 328static const __u8 hv7131r_sensor_init[][8] = {
332 {0xc0, 0x11, 0x31, 0x38, 0x2a, 0x2e, 0x00, 0x10}, 329 {0xc0, 0x11, 0x31, 0x38, 0x2a, 0x2e, 0x00, 0x10},
@@ -339,7 +336,7 @@ static const __u8 initOv6650[] = {
339 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 336 0x44, 0x44, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
340 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 337 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
341 0x00, 0x01, 0x01, 0x0a, 0x16, 0x12, 0x68, 0x8b, 338 0x00, 0x01, 0x01, 0x0a, 0x16, 0x12, 0x68, 0x8b,
342 0x10, 0x1d, 0x10, 0x02, 0x02, 0x09, 0x07 339 0x10,
343}; 340};
344static const __u8 ov6650_sensor_init[][8] = { 341static const __u8 ov6650_sensor_init[][8] = {
345 /* Bright, contrast, etc are set through SCBB interface. 342 /* Bright, contrast, etc are set through SCBB interface.
@@ -378,24 +375,13 @@ static const __u8 initOv7630[] = {
378 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* r09 .. r10 */ 375 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* r09 .. r10 */
379 0x00, 0x01, 0x01, 0x0a, /* r11 .. r14 */ 376 0x00, 0x01, 0x01, 0x0a, /* r11 .. r14 */
380 0x28, 0x1e, /* H & V sizes r15 .. r16 */ 377 0x28, 0x1e, /* H & V sizes r15 .. r16 */
381 0x68, COMP2, MCK_INIT1, /* r17 .. r19 */
382 0x1d, 0x10, 0x02, 0x03, 0x0f, 0x0c /* r1a .. r1f */
383};
384static const __u8 initOv7630_3[] = {
385 0x44, 0x44, 0x00, 0x1a, 0x20, 0x20, 0x20, 0x80, /* r01 .. r08 */
386 0x21, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* r09 .. r10 */
387 0x00, 0x02, 0x01, 0x0a, /* r11 .. r14 */
388 0x28, 0x1e, /* H & V sizes r15 .. r16 */
389 0x68, 0x8f, MCK_INIT1, /* r17 .. r19 */ 378 0x68, 0x8f, MCK_INIT1, /* r17 .. r19 */
390 0x1d, 0x10, 0x02, 0x03, 0x0f, 0x0c, 0x00, /* r1a .. r20 */
391 0x10, 0x20, 0x30, 0x40, 0x50, 0x60, 0x70, 0x80, /* r21 .. r28 */
392 0x90, 0xa0, 0xb0, 0xc0, 0xd0, 0xe0, 0xf0, 0xff /* r29 .. r30 */
393}; 379};
394static const __u8 ov7630_sensor_init[][8] = { 380static const __u8 ov7630_sensor_init[][8] = {
395 {0xa0, 0x21, 0x12, 0x80, 0x00, 0x00, 0x00, 0x10}, 381 {0xa0, 0x21, 0x12, 0x80, 0x00, 0x00, 0x00, 0x10},
396 {0xb0, 0x21, 0x01, 0x77, 0x3a, 0x00, 0x00, 0x10}, 382 {0xb0, 0x21, 0x01, 0x77, 0x3a, 0x00, 0x00, 0x10},
397/* {0xd0, 0x21, 0x12, 0x7c, 0x01, 0x80, 0x34, 0x10}, jfm */ 383/* {0xd0, 0x21, 0x12, 0x7c, 0x01, 0x80, 0x34, 0x10}, jfm */
398 {0xd0, 0x21, 0x12, 0x1c, 0x00, 0x80, 0x34, 0x10}, /* jfm */ 384 {0xd0, 0x21, 0x12, 0x5c, 0x00, 0x80, 0x34, 0x10}, /* jfm */
399 {0xa0, 0x21, 0x1b, 0x04, 0x00, 0x80, 0x34, 0x10}, 385 {0xa0, 0x21, 0x1b, 0x04, 0x00, 0x80, 0x34, 0x10},
400 {0xa0, 0x21, 0x20, 0x44, 0x00, 0x80, 0x34, 0x10}, 386 {0xa0, 0x21, 0x20, 0x44, 0x00, 0x80, 0x34, 0x10},
401 {0xa0, 0x21, 0x23, 0xee, 0x00, 0x80, 0x34, 0x10}, 387 {0xa0, 0x21, 0x23, 0xee, 0x00, 0x80, 0x34, 0x10},
@@ -413,16 +399,11 @@ static const __u8 ov7630_sensor_init[][8] = {
413 {0xd0, 0x21, 0x17, 0x1c, 0xbd, 0x06, 0xf6, 0x10}, 399 {0xd0, 0x21, 0x17, 0x1c, 0xbd, 0x06, 0xf6, 0x10},
414}; 400};
415 401
416static const __u8 ov7630_sensor_init_3[][8] = {
417 {0xa0, 0x21, 0x13, 0x80, 0x00, 0x00, 0x00, 0x10},
418};
419
420static const __u8 initPas106[] = { 402static const __u8 initPas106[] = {
421 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x81, 0x40, 0x00, 0x00, 0x00, 403 0x04, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x81, 0x40, 0x00, 0x00, 0x00,
422 0x00, 0x00, 404 0x00, 0x00,
423 0x00, 0x00, 0x00, 0x04, 0x01, 0x00, 405 0x00, 0x00, 0x00, 0x04, 0x01, 0x00,
424 0x16, 0x12, 0x24, COMP1, MCK_INIT1, 406 0x16, 0x12, 0x24, COMP1, MCK_INIT1,
425 0x18, 0x10, 0x02, 0x02, 0x09, 0x07
426}; 407};
427/* compression 0x86 mckinit1 0x2b */ 408/* compression 0x86 mckinit1 0x2b */
428 409
@@ -496,7 +477,6 @@ static const __u8 initPas202[] = {
496 0x00, 0x00, 477 0x00, 0x00,
497 0x00, 0x00, 0x00, 0x06, 0x03, 0x0a, 478 0x00, 0x00, 0x00, 0x06, 0x03, 0x0a,
498 0x28, 0x1e, 0x20, 0x89, 0x20, 479 0x28, 0x1e, 0x20, 0x89, 0x20,
499 0x00, 0x00, 0x02, 0x03, 0x0f, 0x0c
500}; 480};
501 481
502/* "Known" PAS202BCB registers: 482/* "Known" PAS202BCB registers:
@@ -537,7 +517,6 @@ static const __u8 initTas5110c[] = {
537 0x00, 0x00, 517 0x00, 0x00,
538 0x00, 0x00, 0x00, 0x45, 0x09, 0x0a, 518 0x00, 0x00, 0x00, 0x45, 0x09, 0x0a,
539 0x16, 0x12, 0x60, 0x86, 0x2b, 519 0x16, 0x12, 0x60, 0x86, 0x2b,
540 0x14, 0x0a, 0x02, 0x02, 0x09, 0x07
541}; 520};
542/* Same as above, except a different hstart */ 521/* Same as above, except a different hstart */
543static const __u8 initTas5110d[] = { 522static const __u8 initTas5110d[] = {
@@ -545,12 +524,19 @@ static const __u8 initTas5110d[] = {
545 0x00, 0x00, 524 0x00, 0x00,
546 0x00, 0x00, 0x00, 0x41, 0x09, 0x0a, 525 0x00, 0x00, 0x00, 0x41, 0x09, 0x0a,
547 0x16, 0x12, 0x60, 0x86, 0x2b, 526 0x16, 0x12, 0x60, 0x86, 0x2b,
548 0x14, 0x0a, 0x02, 0x02, 0x09, 0x07
549}; 527};
550static const __u8 tas5110_sensor_init[][8] = { 528/* tas5110c is 3 wire, tas5110d is 2 wire (regular i2c) */
529static const __u8 tas5110c_sensor_init[][8] = {
551 {0x30, 0x11, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x10}, 530 {0x30, 0x11, 0x00, 0x00, 0x0c, 0x00, 0x00, 0x10},
552 {0x30, 0x11, 0x02, 0x20, 0xa9, 0x00, 0x00, 0x10}, 531 {0x30, 0x11, 0x02, 0x20, 0xa9, 0x00, 0x00, 0x10},
553 {0xa0, 0x61, 0x9a, 0xca, 0x00, 0x00, 0x00, 0x17}, 532};
533/* Known TAS5110D registers
534 * reg02: gain, bit order reversed!! 0 == max gain, 255 == min gain
535 * reg03: bit3: vflip, bit4: ~hflip, bit7: ~gainboost (~ == inverted)
536 * Note: writing reg03 seems to only work when written together with 02
537 */
538static const __u8 tas5110d_sensor_init[][8] = {
539 {0xa0, 0x61, 0x9a, 0xca, 0x00, 0x00, 0x00, 0x17}, /* reset */
554}; 540};
555 541
556static const __u8 initTas5130[] = { 542static const __u8 initTas5130[] = {
@@ -558,7 +544,6 @@ static const __u8 initTas5130[] = {
558 0x00, 0x00, 544 0x00, 0x00,
559 0x00, 0x00, 0x00, 0x68, 0x0c, 0x0a, 545 0x00, 0x00, 0x00, 0x68, 0x0c, 0x0a,
560 0x28, 0x1e, 0x60, COMP, MCK_INIT, 546 0x28, 0x1e, 0x60, COMP, MCK_INIT,
561 0x18, 0x10, 0x04, 0x03, 0x11, 0x0c
562}; 547};
563static const __u8 tas5130_sensor_init[][8] = { 548static const __u8 tas5130_sensor_init[][8] = {
564/* {0x30, 0x11, 0x00, 0x40, 0x47, 0x00, 0x00, 0x10}, 549/* {0x30, 0x11, 0x00, 0x40, 0x47, 0x00, 0x00, 0x10},
@@ -569,21 +554,18 @@ static const __u8 tas5130_sensor_init[][8] = {
569}; 554};
570 555
571static struct sensor_data sensor_data[] = { 556static struct sensor_data sensor_data[] = {
572SENS(initHv7131d, NULL, hv7131d_sensor_init, NULL, NULL, F_GAIN, NO_BRIGHTNESS|NO_FREQ, 0), 557SENS(initHv7131d, hv7131d_sensor_init, F_GAIN, NO_BRIGHTNESS|NO_FREQ, 0),
573SENS(initHv7131r, NULL, hv7131r_sensor_init, NULL, NULL, 0, NO_BRIGHTNESS|NO_EXPO|NO_FREQ, 0), 558SENS(initHv7131r, hv7131r_sensor_init, 0, NO_BRIGHTNESS|NO_EXPO|NO_FREQ, 0),
574SENS(initOv6650, NULL, ov6650_sensor_init, NULL, NULL, F_GAIN|F_SIF, 0, 0x60), 559SENS(initOv6650, ov6650_sensor_init, F_GAIN|F_SIF, 0, 0x60),
575SENS(initOv7630, initOv7630_3, ov7630_sensor_init, NULL, ov7630_sensor_init_3, 560SENS(initOv7630, ov7630_sensor_init, F_GAIN, 0, 0x21),
576 F_GAIN, 0, 0x21), 561SENS(initPas106, pas106_sensor_init, F_GAIN|F_SIF, NO_FREQ, 0),
577SENS(initPas106, NULL, pas106_sensor_init, NULL, NULL, F_GAIN|F_SIF, NO_FREQ, 562SENS(initPas202, pas202_sensor_init, F_GAIN, NO_FREQ, 0),
578 0), 563SENS(initTas5110c, tas5110c_sensor_init, F_GAIN|F_SIF|F_COARSE_EXPO,
579SENS(initPas202, initPas202, pas202_sensor_init, NULL, NULL, F_GAIN, 564 NO_BRIGHTNESS|NO_FREQ, 0),
580 NO_FREQ, 0), 565SENS(initTas5110d, tas5110d_sensor_init, F_GAIN|F_SIF|F_COARSE_EXPO,
581SENS(initTas5110c, NULL, tas5110_sensor_init, NULL, NULL, 566 NO_BRIGHTNESS|NO_FREQ, 0),
582 F_GAIN|F_SIF|F_COARSE_EXPO, NO_BRIGHTNESS|NO_FREQ, 0), 567SENS(initTas5130, tas5130_sensor_init, F_GAIN,
583SENS(initTas5110d, NULL, tas5110_sensor_init, NULL, NULL, 568 NO_BRIGHTNESS|NO_EXPO|NO_FREQ, 0),
584 F_GAIN|F_SIF|F_COARSE_EXPO, NO_BRIGHTNESS|NO_FREQ, 0),
585SENS(initTas5130, NULL, tas5130_sensor_init, NULL, NULL, 0, NO_EXPO|NO_FREQ,
586 0),
587}; 569};
588 570
589/* get one byte in gspca_dev->usb_buf */ 571/* get one byte in gspca_dev->usb_buf */
@@ -655,7 +637,6 @@ static void i2c_w_vector(struct gspca_dev *gspca_dev,
655static void setbrightness(struct gspca_dev *gspca_dev) 637static void setbrightness(struct gspca_dev *gspca_dev)
656{ 638{
657 struct sd *sd = (struct sd *) gspca_dev; 639 struct sd *sd = (struct sd *) gspca_dev;
658 __u8 value;
659 640
660 switch (sd->sensor) { 641 switch (sd->sensor) {
661 case SENSOR_OV6650: 642 case SENSOR_OV6650:
@@ -697,17 +678,6 @@ static void setbrightness(struct gspca_dev *gspca_dev)
697 goto err; 678 goto err;
698 break; 679 break;
699 } 680 }
700 case SENSOR_TAS5130CXX: {
701 __u8 i2c[] =
702 {0x30, 0x11, 0x02, 0x20, 0x70, 0x00, 0x00, 0x10};
703
704 value = 0xff - sd->brightness;
705 i2c[4] = value;
706 PDEBUG(D_CONF, "brightness %d : %d", value, i2c[4]);
707 if (i2c_w(gspca_dev, i2c) < 0)
708 goto err;
709 break;
710 }
711 } 681 }
712 return; 682 return;
713err: 683err:
@@ -733,7 +703,7 @@ static void setsensorgain(struct gspca_dev *gspca_dev)
733 break; 703 break;
734 } 704 }
735 case SENSOR_TAS5110C: 705 case SENSOR_TAS5110C:
736 case SENSOR_TAS5110D: { 706 case SENSOR_TAS5130CXX: {
737 __u8 i2c[] = 707 __u8 i2c[] =
738 {0x30, 0x11, 0x02, 0x20, 0x70, 0x00, 0x00, 0x10}; 708 {0x30, 0x11, 0x02, 0x20, 0x70, 0x00, 0x00, 0x10};
739 709
@@ -742,6 +712,23 @@ static void setsensorgain(struct gspca_dev *gspca_dev)
742 goto err; 712 goto err;
743 break; 713 break;
744 } 714 }
715 case SENSOR_TAS5110D: {
716 __u8 i2c[] = {
717 0xb0, 0x61, 0x02, 0x00, 0x10, 0x00, 0x00, 0x17 };
718 gain = 255 - gain;
719 /* The bits in the register are the wrong way around!! */
720 i2c[3] |= (gain & 0x80) >> 7;
721 i2c[3] |= (gain & 0x40) >> 5;
722 i2c[3] |= (gain & 0x20) >> 3;
723 i2c[3] |= (gain & 0x10) >> 1;
724 i2c[3] |= (gain & 0x08) << 1;
725 i2c[3] |= (gain & 0x04) << 3;
726 i2c[3] |= (gain & 0x02) << 5;
727 i2c[3] |= (gain & 0x01) << 7;
728 if (i2c_w(gspca_dev, i2c) < 0)
729 goto err;
730 break;
731 }
745 732
746 case SENSOR_OV6650: 733 case SENSOR_OV6650:
747 gain >>= 1; 734 gain >>= 1;
@@ -796,7 +783,7 @@ static void setgain(struct gspca_dev *gspca_dev)
796{ 783{
797 struct sd *sd = (struct sd *) gspca_dev; 784 struct sd *sd = (struct sd *) gspca_dev;
798 __u8 gain; 785 __u8 gain;
799 __u8 buf[2] = { 0, 0 }; 786 __u8 buf[3] = { 0, 0, 0 };
800 787
801 if (sensor_data[sd->sensor].flags & F_GAIN) { 788 if (sensor_data[sd->sensor].flags & F_GAIN) {
802 /* Use the sensor gain to do the actual gain */ 789 /* Use the sensor gain to do the actual gain */
@@ -804,13 +791,18 @@ static void setgain(struct gspca_dev *gspca_dev)
804 return; 791 return;
805 } 792 }
806 793
807 gain = sd->gain >> 4; 794 if (sd->bridge == BRIDGE_103) {
808 795 gain = sd->gain >> 1;
809 /* red and blue gain */ 796 buf[0] = gain; /* Red */
810 buf[0] = gain << 4 | gain; 797 buf[1] = gain; /* Green */
811 /* green gain */ 798 buf[2] = gain; /* Blue */
812 buf[1] = gain; 799 reg_w(gspca_dev, 0x05, buf, 3);
813 reg_w(gspca_dev, 0x10, buf, 2); 800 } else {
801 gain = sd->gain >> 4;
802 buf[0] = gain << 4 | gain; /* Red and blue */
803 buf[1] = gain; /* Green */
804 reg_w(gspca_dev, 0x10, buf, 2);
805 }
814} 806}
815 807
816static void setexposure(struct gspca_dev *gspca_dev) 808static void setexposure(struct gspca_dev *gspca_dev)
@@ -1049,7 +1041,7 @@ static void do_autogain(struct gspca_dev *gspca_dev)
1049 desired_avg_lum = 5000; 1041 desired_avg_lum = 5000;
1050 } else { 1042 } else {
1051 deadzone = 1500; 1043 deadzone = 1500;
1052 desired_avg_lum = 18000; 1044 desired_avg_lum = 13000;
1053 } 1045 }
1054 1046
1055 if (sensor_data[sd->sensor].flags & F_COARSE_EXPO) 1047 if (sensor_data[sd->sensor].flags & F_COARSE_EXPO)
@@ -1127,53 +1119,91 @@ static int sd_start(struct gspca_dev *gspca_dev)
1127{ 1119{
1128 struct sd *sd = (struct sd *) gspca_dev; 1120 struct sd *sd = (struct sd *) gspca_dev;
1129 struct cam *cam = &gspca_dev->cam; 1121 struct cam *cam = &gspca_dev->cam;
1130 int mode, l; 1122 int i, mode;
1131 const __u8 *sn9c10x; 1123 __u8 regs[0x31];
1132 __u8 reg12_19[8];
1133 1124
1134 mode = cam->cam_mode[gspca_dev->curr_mode].priv & 0x07; 1125 mode = cam->cam_mode[gspca_dev->curr_mode].priv & 0x07;
1135 sn9c10x = sensor_data[sd->sensor].bridge_init[sd->bridge]; 1126 /* Copy registers 0x01 - 0x19 from the template */
1136 l = sensor_data[sd->sensor].bridge_init_size[sd->bridge]; 1127 memcpy(&regs[0x01], sensor_data[sd->sensor].bridge_init, 0x19);
1137 memcpy(reg12_19, &sn9c10x[0x12 - 1], 8); 1128 /* Set the mode */
1138 reg12_19[6] = sn9c10x[0x18 - 1] | (mode << 4); 1129 regs[0x18] |= mode << 4;
1139 /* Special cases where reg 17 and or 19 value depends on mode */ 1130
1131 /* Set bridge gain to 1.0 */
1132 if (sd->bridge == BRIDGE_103) {
1133 regs[0x05] = 0x20; /* Red */
1134 regs[0x06] = 0x20; /* Green */
1135 regs[0x07] = 0x20; /* Blue */
1136 } else {
1137 regs[0x10] = 0x00; /* Red and blue */
1138 regs[0x11] = 0x00; /* Green */
1139 }
1140
1141 /* Setup pixel numbers and auto exposure window */
1142 if (sensor_data[sd->sensor].flags & F_SIF) {
1143 regs[0x1a] = 0x14; /* HO_SIZE 640, makes no sense */
1144 regs[0x1b] = 0x0a; /* VO_SIZE 320, makes no sense */
1145 regs[0x1c] = 0x02; /* AE H-start 64 */
1146 regs[0x1d] = 0x02; /* AE V-start 64 */
1147 regs[0x1e] = 0x09; /* AE H-end 288 */
1148 regs[0x1f] = 0x07; /* AE V-end 224 */
1149 } else {
1150 regs[0x1a] = 0x1d; /* HO_SIZE 960, makes no sense */
1151 regs[0x1b] = 0x10; /* VO_SIZE 512, makes no sense */
1152 regs[0x1c] = 0x05; /* AE H-start 160 */
1153 regs[0x1d] = 0x03; /* AE V-start 96 */
1154 regs[0x1e] = 0x0f; /* AE H-end 480 */
1155 regs[0x1f] = 0x0c; /* AE V-end 384 */
1156 }
1157
1158 /* Setup the gamma table (only used with the sn9c103 bridge) */
1159 for (i = 0; i < 16; i++)
1160 regs[0x20 + i] = i * 16;
1161 regs[0x20 + i] = 255;
1162
1163 /* Special cases where some regs depend on mode or bridge */
1140 switch (sd->sensor) { 1164 switch (sd->sensor) {
1141 case SENSOR_TAS5130CXX: 1165 case SENSOR_TAS5130CXX:
1142 /* probably not mode specific at all most likely the upper 1166 /* FIXME / TESTME
1167 probably not mode specific at all most likely the upper
1143 nibble of 0x19 is exposure (clock divider) just as with 1168 nibble of 0x19 is exposure (clock divider) just as with
1144 the tas5110, we need someone to test this. */ 1169 the tas5110, we need someone to test this. */
1145 reg12_19[7] = mode ? 0x23 : 0x43; 1170 regs[0x19] = mode ? 0x23 : 0x43;
1146 break; 1171 break;
1172 case SENSOR_OV7630:
1173 /* FIXME / TESTME for some reason with the 101/102 bridge the
1174 clock is set to 12 Mhz (reg1 == 0x04), rather then 24.
1175 Also the hstart needs to go from 1 to 2 when using a 103,
1176 which is likely related. This does not seem right. */
1177 if (sd->bridge == BRIDGE_103) {
1178 regs[0x01] = 0x44; /* Select 24 Mhz clock */
1179 regs[0x12] = 0x02; /* Set hstart to 2 */
1180 }
1147 } 1181 }
1148 /* Disable compression when the raw bayer format has been selected */ 1182 /* Disable compression when the raw bayer format has been selected */
1149 if (cam->cam_mode[gspca_dev->curr_mode].priv & MODE_RAW) 1183 if (cam->cam_mode[gspca_dev->curr_mode].priv & MODE_RAW)
1150 reg12_19[6] &= ~0x80; 1184 regs[0x18] &= ~0x80;
1151 1185
1152 /* Vga mode emulation on SIF sensor? */ 1186 /* Vga mode emulation on SIF sensor? */
1153 if (cam->cam_mode[gspca_dev->curr_mode].priv & MODE_REDUCED_SIF) { 1187 if (cam->cam_mode[gspca_dev->curr_mode].priv & MODE_REDUCED_SIF) {
1154 reg12_19[0] += 16; /* 0x12: hstart adjust */ 1188 regs[0x12] += 16; /* hstart adjust */
1155 reg12_19[1] += 24; /* 0x13: vstart adjust */ 1189 regs[0x13] += 24; /* vstart adjust */
1156 reg12_19[3] = 320 / 16; /* 0x15: hsize */ 1190 regs[0x15] = 320 / 16; /* hsize */
1157 reg12_19[4] = 240 / 16; /* 0x16: vsize */ 1191 regs[0x16] = 240 / 16; /* vsize */
1158 } 1192 }
1159 1193
1160 /* reg 0x01 bit 2 video transfert on */ 1194 /* reg 0x01 bit 2 video transfert on */
1161 reg_w(gspca_dev, 0x01, &sn9c10x[0x01 - 1], 1); 1195 reg_w(gspca_dev, 0x01, &regs[0x01], 1);
1162 /* reg 0x17 SensorClk enable inv Clk 0x60 */ 1196 /* reg 0x17 SensorClk enable inv Clk 0x60 */
1163 reg_w(gspca_dev, 0x17, &sn9c10x[0x17 - 1], 1); 1197 reg_w(gspca_dev, 0x17, &regs[0x17], 1);
1164 /* Set the registers from the template */ 1198 /* Set the registers from the template */
1165 reg_w(gspca_dev, 0x01, sn9c10x, l); 1199 reg_w(gspca_dev, 0x01, &regs[0x01],
1200 (sd->bridge == BRIDGE_103) ? 0x30 : 0x1f);
1166 1201
1167 /* Init the sensor */ 1202 /* Init the sensor */
1168 i2c_w_vector(gspca_dev, sensor_data[sd->sensor].sensor_init, 1203 i2c_w_vector(gspca_dev, sensor_data[sd->sensor].sensor_init,
1169 sensor_data[sd->sensor].sensor_init_size); 1204 sensor_data[sd->sensor].sensor_init_size);
1170 if (sensor_data[sd->sensor].sensor_bridge_init[sd->bridge])
1171 i2c_w_vector(gspca_dev,
1172 sensor_data[sd->sensor].sensor_bridge_init[sd->bridge],
1173 sensor_data[sd->sensor].sensor_bridge_init_size[
1174 sd->bridge]);
1175 1205
1176 /* Mode specific sensor setup */ 1206 /* Mode / bridge specific sensor setup */
1177 switch (sd->sensor) { 1207 switch (sd->sensor) {
1178 case SENSOR_PAS202: { 1208 case SENSOR_PAS202: {
1179 const __u8 i2cpclockdiv[] = 1209 const __u8 i2cpclockdiv[] =
@@ -1181,27 +1211,37 @@ static int sd_start(struct gspca_dev *gspca_dev)
1181 /* clockdiv from 4 to 3 (7.5 -> 10 fps) when in low res mode */ 1211 /* clockdiv from 4 to 3 (7.5 -> 10 fps) when in low res mode */
1182 if (mode) 1212 if (mode)
1183 i2c_w(gspca_dev, i2cpclockdiv); 1213 i2c_w(gspca_dev, i2cpclockdiv);
1214 break;
1184 } 1215 }
1216 case SENSOR_OV7630:
1217 /* FIXME / TESTME We should be able to handle this identical
1218 for the 101/102 and the 103 case */
1219 if (sd->bridge == BRIDGE_103) {
1220 const __u8 i2c[] = { 0xa0, 0x21, 0x13,
1221 0x80, 0x00, 0x00, 0x00, 0x10 };
1222 i2c_w(gspca_dev, i2c);
1223 }
1224 break;
1185 } 1225 }
1186 /* H_size V_size 0x28, 0x1e -> 640x480. 0x16, 0x12 -> 352x288 */ 1226 /* H_size V_size 0x28, 0x1e -> 640x480. 0x16, 0x12 -> 352x288 */
1187 reg_w(gspca_dev, 0x15, &reg12_19[3], 2); 1227 reg_w(gspca_dev, 0x15, &regs[0x15], 2);
1188 /* compression register */ 1228 /* compression register */
1189 reg_w(gspca_dev, 0x18, &reg12_19[6], 1); 1229 reg_w(gspca_dev, 0x18, &regs[0x18], 1);
1190 /* H_start */ 1230 /* H_start */
1191 reg_w(gspca_dev, 0x12, &reg12_19[0], 1); 1231 reg_w(gspca_dev, 0x12, &regs[0x12], 1);
1192 /* V_START */ 1232 /* V_START */
1193 reg_w(gspca_dev, 0x13, &reg12_19[1], 1); 1233 reg_w(gspca_dev, 0x13, &regs[0x13], 1);
1194 /* reset 0x17 SensorClk enable inv Clk 0x60 */ 1234 /* reset 0x17 SensorClk enable inv Clk 0x60 */
1195 /*fixme: ov7630 [17]=68 8f (+20 if 102)*/ 1235 /*fixme: ov7630 [17]=68 8f (+20 if 102)*/
1196 reg_w(gspca_dev, 0x17, &reg12_19[5], 1); 1236 reg_w(gspca_dev, 0x17, &regs[0x17], 1);
1197 /*MCKSIZE ->3 */ /*fixme: not ov7630*/ 1237 /*MCKSIZE ->3 */ /*fixme: not ov7630*/
1198 reg_w(gspca_dev, 0x19, &reg12_19[7], 1); 1238 reg_w(gspca_dev, 0x19, &regs[0x19], 1);
1199 /* AE_STRX AE_STRY AE_ENDX AE_ENDY */ 1239 /* AE_STRX AE_STRY AE_ENDX AE_ENDY */
1200 reg_w(gspca_dev, 0x1c, &sn9c10x[0x1c - 1], 4); 1240 reg_w(gspca_dev, 0x1c, &regs[0x1c], 4);
1201 /* Enable video transfert */ 1241 /* Enable video transfert */
1202 reg_w(gspca_dev, 0x01, &sn9c10x[0], 1); 1242 reg_w(gspca_dev, 0x01, &regs[0x01], 1);
1203 /* Compression */ 1243 /* Compression */
1204 reg_w(gspca_dev, 0x18, &reg12_19[6], 2); 1244 reg_w(gspca_dev, 0x18, &regs[0x18], 2);
1205 msleep(20); 1245 msleep(20);
1206 1246
1207 sd->reg11 = -1; 1247 sd->reg11 = -1;
@@ -1525,15 +1565,15 @@ static const struct sd_desc sd_desc = {
1525 .driver_info = (SENSOR_ ## sensor << 8) | BRIDGE_ ## bridge 1565 .driver_info = (SENSOR_ ## sensor << 8) | BRIDGE_ ## bridge
1526 1566
1527 1567
1528static const struct usb_device_id device_table[] __devinitconst = { 1568static const struct usb_device_id device_table[] = {
1529 {USB_DEVICE(0x0c45, 0x6001), SB(TAS5110C, 102)}, /* TAS5110C1B */ 1569 {USB_DEVICE(0x0c45, 0x6001), SB(TAS5110C, 102)}, /* TAS5110C1B */
1530 {USB_DEVICE(0x0c45, 0x6005), SB(TAS5110C, 101)}, /* TAS5110C1B */ 1570 {USB_DEVICE(0x0c45, 0x6005), SB(TAS5110C, 101)}, /* TAS5110C1B */
1531 {USB_DEVICE(0x0c45, 0x6007), SB(TAS5110D, 101)}, /* TAS5110D */ 1571 {USB_DEVICE(0x0c45, 0x6007), SB(TAS5110D, 101)}, /* TAS5110D */
1532 {USB_DEVICE(0x0c45, 0x6009), SB(PAS106, 101)}, 1572 {USB_DEVICE(0x0c45, 0x6009), SB(PAS106, 101)},
1533 {USB_DEVICE(0x0c45, 0x600d), SB(PAS106, 101)}, 1573 {USB_DEVICE(0x0c45, 0x600d), SB(PAS106, 101)},
1534 {USB_DEVICE(0x0c45, 0x6011), SB(OV6650, 101)}, 1574 {USB_DEVICE(0x0c45, 0x6011), SB(OV6650, 101)},
1535#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
1536 {USB_DEVICE(0x0c45, 0x6019), SB(OV7630, 101)}, 1575 {USB_DEVICE(0x0c45, 0x6019), SB(OV7630, 101)},
1576#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
1537 {USB_DEVICE(0x0c45, 0x6024), SB(TAS5130CXX, 102)}, 1577 {USB_DEVICE(0x0c45, 0x6024), SB(TAS5130CXX, 102)},
1538 {USB_DEVICE(0x0c45, 0x6025), SB(TAS5130CXX, 102)}, 1578 {USB_DEVICE(0x0c45, 0x6025), SB(TAS5130CXX, 102)},
1539#endif 1579#endif
@@ -1544,18 +1584,22 @@ static const struct usb_device_id device_table[] __devinitconst = {
1544 {USB_DEVICE(0x0c45, 0x602c), SB(OV7630, 102)}, 1584 {USB_DEVICE(0x0c45, 0x602c), SB(OV7630, 102)},
1545 {USB_DEVICE(0x0c45, 0x602d), SB(HV7131R, 102)}, 1585 {USB_DEVICE(0x0c45, 0x602d), SB(HV7131R, 102)},
1546 {USB_DEVICE(0x0c45, 0x602e), SB(OV7630, 102)}, 1586 {USB_DEVICE(0x0c45, 0x602e), SB(OV7630, 102)},
1547 /* {USB_DEVICE(0x0c45, 0x602b), SB(MI03XX, 102)}, */ /* MI0343 MI0360 MI0330 */ 1587 /* {USB_DEVICE(0x0c45, 0x6030), SB(MI03XX, 102)}, */ /* MI0343 MI0360 MI0330 */
1588 /* {USB_DEVICE(0x0c45, 0x6082), SB(MI03XX, 103)}, */ /* MI0343 MI0360 */
1589 {USB_DEVICE(0x0c45, 0x6083), SB(HV7131D, 103)},
1590 {USB_DEVICE(0x0c45, 0x608c), SB(HV7131R, 103)},
1591 /* {USB_DEVICE(0x0c45, 0x608e), SB(CISVF10, 103)}, */
1548 {USB_DEVICE(0x0c45, 0x608f), SB(OV7630, 103)}, 1592 {USB_DEVICE(0x0c45, 0x608f), SB(OV7630, 103)},
1549#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE 1593 {USB_DEVICE(0x0c45, 0x60a8), SB(PAS106, 103)},
1594 {USB_DEVICE(0x0c45, 0x60aa), SB(TAS5130CXX, 103)},
1550 {USB_DEVICE(0x0c45, 0x60af), SB(PAS202, 103)}, 1595 {USB_DEVICE(0x0c45, 0x60af), SB(PAS202, 103)},
1551#endif
1552 {USB_DEVICE(0x0c45, 0x60b0), SB(OV7630, 103)}, 1596 {USB_DEVICE(0x0c45, 0x60b0), SB(OV7630, 103)},
1553 {} 1597 {}
1554}; 1598};
1555MODULE_DEVICE_TABLE(usb, device_table); 1599MODULE_DEVICE_TABLE(usb, device_table);
1556 1600
1557/* -- device connect -- */ 1601/* -- device connect -- */
1558static int __devinit sd_probe(struct usb_interface *intf, 1602static int sd_probe(struct usb_interface *intf,
1559 const struct usb_device_id *id) 1603 const struct usb_device_id *id)
1560{ 1604{
1561 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd), 1605 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c
index 2d0bb17a30a2..d6f39ce1b7e1 100644
--- a/drivers/media/video/gspca/sonixj.c
+++ b/drivers/media/video/gspca/sonixj.c
@@ -25,12 +25,12 @@
25#include "gspca.h" 25#include "gspca.h"
26#include "jpeg.h" 26#include "jpeg.h"
27 27
28#define V4L2_CID_INFRARED (V4L2_CID_PRIVATE_BASE + 0)
29
30MODULE_AUTHOR("Jean-François Moine <http://moinejf.free.fr>"); 28MODULE_AUTHOR("Jean-François Moine <http://moinejf.free.fr>");
31MODULE_DESCRIPTION("GSPCA/SONIX JPEG USB Camera Driver"); 29MODULE_DESCRIPTION("GSPCA/SONIX JPEG USB Camera Driver");
32MODULE_LICENSE("GPL"); 30MODULE_LICENSE("GPL");
33 31
32static int starcam;
33
34/* controls */ 34/* controls */
35enum e_ctrl { 35enum e_ctrl {
36 BRIGHTNESS, 36 BRIGHTNESS,
@@ -43,7 +43,7 @@ enum e_ctrl {
43 HFLIP, 43 HFLIP,
44 VFLIP, 44 VFLIP,
45 SHARPNESS, 45 SHARPNESS,
46 INFRARED, 46 ILLUM,
47 FREQ, 47 FREQ,
48 NCTRLS /* number of controls */ 48 NCTRLS /* number of controls */
49}; 49};
@@ -100,7 +100,8 @@ enum sensors {
100}; 100};
101 101
102/* device flags */ 102/* device flags */
103#define PDN_INV 1 /* inverse pin S_PWR_DN / sn_xxx tables */ 103#define F_PDN_INV 0x01 /* inverse pin S_PWR_DN / sn_xxx tables */
104#define F_ILLUM 0x02 /* presence of illuminator */
104 105
105/* sn9c1xx definitions */ 106/* sn9c1xx definitions */
106/* register 0x01 */ 107/* register 0x01 */
@@ -124,7 +125,7 @@ static void setgamma(struct gspca_dev *gspca_dev);
124static void setautogain(struct gspca_dev *gspca_dev); 125static void setautogain(struct gspca_dev *gspca_dev);
125static void sethvflip(struct gspca_dev *gspca_dev); 126static void sethvflip(struct gspca_dev *gspca_dev);
126static void setsharpness(struct gspca_dev *gspca_dev); 127static void setsharpness(struct gspca_dev *gspca_dev);
127static void setinfrared(struct gspca_dev *gspca_dev); 128static void setillum(struct gspca_dev *gspca_dev);
128static void setfreq(struct gspca_dev *gspca_dev); 129static void setfreq(struct gspca_dev *gspca_dev);
129 130
130static const struct ctrl sd_ctrls[NCTRLS] = { 131static const struct ctrl sd_ctrls[NCTRLS] = {
@@ -251,18 +252,17 @@ static const struct ctrl sd_ctrls[NCTRLS] = {
251 }, 252 },
252 .set_control = setsharpness 253 .set_control = setsharpness
253 }, 254 },
254/* mt9v111 only */ 255[ILLUM] = {
255[INFRARED] = {
256 { 256 {
257 .id = V4L2_CID_INFRARED, 257 .id = V4L2_CID_ILLUMINATORS_1,
258 .type = V4L2_CTRL_TYPE_BOOLEAN, 258 .type = V4L2_CTRL_TYPE_BOOLEAN,
259 .name = "Infrared", 259 .name = "Illuminator / infrared",
260 .minimum = 0, 260 .minimum = 0,
261 .maximum = 1, 261 .maximum = 1,
262 .step = 1, 262 .step = 1,
263 .default_value = 0, 263 .default_value = 0,
264 }, 264 },
265 .set_control = setinfrared 265 .set_control = setillum
266 }, 266 },
267/* ov7630/ov7648/ov7660 only */ 267/* ov7630/ov7648/ov7660 only */
268[FREQ] = { 268[FREQ] = {
@@ -282,32 +282,26 @@ static const struct ctrl sd_ctrls[NCTRLS] = {
282/* table of the disabled controls */ 282/* table of the disabled controls */
283static const __u32 ctrl_dis[] = { 283static const __u32 ctrl_dis[] = {
284[SENSOR_ADCM1700] = (1 << AUTOGAIN) | 284[SENSOR_ADCM1700] = (1 << AUTOGAIN) |
285 (1 << INFRARED) |
286 (1 << HFLIP) | 285 (1 << HFLIP) |
287 (1 << VFLIP) | 286 (1 << VFLIP) |
288 (1 << FREQ), 287 (1 << FREQ),
289 288
290[SENSOR_GC0307] = (1 << INFRARED) | 289[SENSOR_GC0307] = (1 << HFLIP) |
291 (1 << HFLIP) |
292 (1 << VFLIP) | 290 (1 << VFLIP) |
293 (1 << FREQ), 291 (1 << FREQ),
294 292
295[SENSOR_HV7131R] = (1 << INFRARED) | 293[SENSOR_HV7131R] = (1 << HFLIP) |
296 (1 << HFLIP) |
297 (1 << FREQ), 294 (1 << FREQ),
298 295
299[SENSOR_MI0360] = (1 << INFRARED) | 296[SENSOR_MI0360] = (1 << HFLIP) |
300 (1 << HFLIP) |
301 (1 << VFLIP) | 297 (1 << VFLIP) |
302 (1 << FREQ), 298 (1 << FREQ),
303 299
304[SENSOR_MI0360B] = (1 << INFRARED) | 300[SENSOR_MI0360B] = (1 << HFLIP) |
305 (1 << HFLIP) |
306 (1 << VFLIP) | 301 (1 << VFLIP) |
307 (1 << FREQ), 302 (1 << FREQ),
308 303
309[SENSOR_MO4000] = (1 << INFRARED) | 304[SENSOR_MO4000] = (1 << HFLIP) |
310 (1 << HFLIP) |
311 (1 << VFLIP) | 305 (1 << VFLIP) |
312 (1 << FREQ), 306 (1 << FREQ),
313 307
@@ -315,40 +309,32 @@ static const __u32 ctrl_dis[] = {
315 (1 << VFLIP) | 309 (1 << VFLIP) |
316 (1 << FREQ), 310 (1 << FREQ),
317 311
318[SENSOR_OM6802] = (1 << INFRARED) | 312[SENSOR_OM6802] = (1 << HFLIP) |
319 (1 << HFLIP) |
320 (1 << VFLIP) | 313 (1 << VFLIP) |
321 (1 << FREQ), 314 (1 << FREQ),
322 315
323[SENSOR_OV7630] = (1 << INFRARED) | 316[SENSOR_OV7630] = (1 << HFLIP),
324 (1 << HFLIP),
325 317
326[SENSOR_OV7648] = (1 << INFRARED) | 318[SENSOR_OV7648] = (1 << HFLIP),
327 (1 << HFLIP),
328 319
329[SENSOR_OV7660] = (1 << AUTOGAIN) | 320[SENSOR_OV7660] = (1 << AUTOGAIN) |
330 (1 << INFRARED) |
331 (1 << HFLIP) | 321 (1 << HFLIP) |
332 (1 << VFLIP), 322 (1 << VFLIP),
333 323
334[SENSOR_PO1030] = (1 << AUTOGAIN) | 324[SENSOR_PO1030] = (1 << AUTOGAIN) |
335 (1 << INFRARED) |
336 (1 << HFLIP) | 325 (1 << HFLIP) |
337 (1 << VFLIP) | 326 (1 << VFLIP) |
338 (1 << FREQ), 327 (1 << FREQ),
339 328
340[SENSOR_PO2030N] = (1 << AUTOGAIN) | 329[SENSOR_PO2030N] = (1 << AUTOGAIN) |
341 (1 << INFRARED) |
342 (1 << FREQ), 330 (1 << FREQ),
343 331
344[SENSOR_SOI768] = (1 << AUTOGAIN) | 332[SENSOR_SOI768] = (1 << AUTOGAIN) |
345 (1 << INFRARED) |
346 (1 << HFLIP) | 333 (1 << HFLIP) |
347 (1 << VFLIP) | 334 (1 << VFLIP) |
348 (1 << FREQ), 335 (1 << FREQ),
349 336
350[SENSOR_SP80708] = (1 << AUTOGAIN) | 337[SENSOR_SP80708] = (1 << AUTOGAIN) |
351 (1 << INFRARED) |
352 (1 << HFLIP) | 338 (1 << HFLIP) |
353 (1 << VFLIP) | 339 (1 << VFLIP) |
354 (1 << FREQ), 340 (1 << FREQ),
@@ -1822,44 +1808,46 @@ static int sd_init(struct gspca_dev *gspca_dev)
1822 PDEBUG(D_PROBE, "Sonix chip id: %02x", regF1); 1808 PDEBUG(D_PROBE, "Sonix chip id: %02x", regF1);
1823 switch (sd->bridge) { 1809 switch (sd->bridge) {
1824 case BRIDGE_SN9C102P: 1810 case BRIDGE_SN9C102P:
1811 case BRIDGE_SN9C105:
1825 if (regF1 != 0x11) 1812 if (regF1 != 0x11)
1826 return -ENODEV; 1813 return -ENODEV;
1814 break;
1815 default:
1816/* case BRIDGE_SN9C110: */
1817/* case BRIDGE_SN9C120: */
1818 if (regF1 != 0x12)
1819 return -ENODEV;
1820 }
1821
1822 switch (sd->sensor) {
1823 case SENSOR_MI0360:
1824 mi0360_probe(gspca_dev);
1825 break;
1826 case SENSOR_OV7630:
1827 ov7630_probe(gspca_dev);
1828 break;
1829 case SENSOR_OV7648:
1830 ov7648_probe(gspca_dev);
1831 break;
1832 case SENSOR_PO2030N:
1833 po2030n_probe(gspca_dev);
1834 break;
1835 }
1836
1837 switch (sd->bridge) {
1838 case BRIDGE_SN9C102P:
1827 reg_w1(gspca_dev, 0x02, regGpio[1]); 1839 reg_w1(gspca_dev, 0x02, regGpio[1]);
1828 break; 1840 break;
1829 case BRIDGE_SN9C105: 1841 case BRIDGE_SN9C105:
1830 if (regF1 != 0x11)
1831 return -ENODEV;
1832 if (sd->sensor == SENSOR_MI0360)
1833 mi0360_probe(gspca_dev);
1834 reg_w(gspca_dev, 0x01, regGpio, 2); 1842 reg_w(gspca_dev, 0x01, regGpio, 2);
1835 break; 1843 break;
1844 case BRIDGE_SN9C110:
1845 reg_w1(gspca_dev, 0x02, 0x62);
1846 break;
1836 case BRIDGE_SN9C120: 1847 case BRIDGE_SN9C120:
1837 if (regF1 != 0x12)
1838 return -ENODEV;
1839 switch (sd->sensor) {
1840 case SENSOR_MI0360:
1841 mi0360_probe(gspca_dev);
1842 break;
1843 case SENSOR_OV7630:
1844 ov7630_probe(gspca_dev);
1845 break;
1846 case SENSOR_OV7648:
1847 ov7648_probe(gspca_dev);
1848 break;
1849 case SENSOR_PO2030N:
1850 po2030n_probe(gspca_dev);
1851 break;
1852 }
1853 regGpio[1] = 0x70; /* no audio */ 1848 regGpio[1] = 0x70; /* no audio */
1854 reg_w(gspca_dev, 0x01, regGpio, 2); 1849 reg_w(gspca_dev, 0x01, regGpio, 2);
1855 break; 1850 break;
1856 default:
1857/* case BRIDGE_SN9C110: */
1858/* case BRIDGE_SN9C325: */
1859 if (regF1 != 0x12)
1860 return -ENODEV;
1861 reg_w1(gspca_dev, 0x02, 0x62);
1862 break;
1863 } 1851 }
1864 1852
1865 if (sd->sensor == SENSOR_OM6802) 1853 if (sd->sensor == SENSOR_OM6802)
@@ -1874,6 +1862,8 @@ static int sd_init(struct gspca_dev *gspca_dev)
1874 sd->i2c_addr = sn9c1xx[9]; 1862 sd->i2c_addr = sn9c1xx[9];
1875 1863
1876 gspca_dev->ctrl_dis = ctrl_dis[sd->sensor]; 1864 gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
1865 if (!(sd->flags & F_ILLUM))
1866 gspca_dev->ctrl_dis |= (1 << ILLUM);
1877 1867
1878 return gspca_dev->usb_err; 1868 return gspca_dev->usb_err;
1879} 1869}
@@ -2197,16 +2187,28 @@ static void setsharpness(struct gspca_dev *gspca_dev)
2197 reg_w1(gspca_dev, 0x99, sd->ctrls[SHARPNESS].val); 2187 reg_w1(gspca_dev, 0x99, sd->ctrls[SHARPNESS].val);
2198} 2188}
2199 2189
2200static void setinfrared(struct gspca_dev *gspca_dev) 2190static void setillum(struct gspca_dev *gspca_dev)
2201{ 2191{
2202 struct sd *sd = (struct sd *) gspca_dev; 2192 struct sd *sd = (struct sd *) gspca_dev;
2203 2193
2204 if (gspca_dev->ctrl_dis & (1 << INFRARED)) 2194 if (gspca_dev->ctrl_dis & (1 << ILLUM))
2205 return; 2195 return;
2206/*fixme: different sequence for StarCam Clip and StarCam 370i */ 2196 switch (sd->sensor) {
2207/* Clip */ 2197 case SENSOR_ADCM1700:
2208 i2c_w1(gspca_dev, 0x02, /* gpio */ 2198 reg_w1(gspca_dev, 0x02, /* gpio */
2209 sd->ctrls[INFRARED].val ? 0x66 : 0x64); 2199 sd->ctrls[ILLUM].val ? 0x64 : 0x60);
2200 break;
2201 case SENSOR_MT9V111:
2202 if (starcam)
2203 reg_w1(gspca_dev, 0x02,
2204 sd->ctrls[ILLUM].val ?
2205 0x55 : 0x54); /* 370i */
2206 else
2207 reg_w1(gspca_dev, 0x02,
2208 sd->ctrls[ILLUM].val ?
2209 0x66 : 0x64); /* Clip */
2210 break;
2211 }
2210} 2212}
2211 2213
2212static void setfreq(struct gspca_dev *gspca_dev) 2214static void setfreq(struct gspca_dev *gspca_dev)
@@ -2344,7 +2346,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
2344 /* sensor clock already enabled in sd_init */ 2346 /* sensor clock already enabled in sd_init */
2345 /* reg_w1(gspca_dev, 0xf1, 0x00); */ 2347 /* reg_w1(gspca_dev, 0xf1, 0x00); */
2346 reg01 = sn9c1xx[1]; 2348 reg01 = sn9c1xx[1];
2347 if (sd->flags & PDN_INV) 2349 if (sd->flags & F_PDN_INV)
2348 reg01 ^= S_PDN_INV; /* power down inverted */ 2350 reg01 ^= S_PDN_INV; /* power down inverted */
2349 reg_w1(gspca_dev, 0x01, reg01); 2351 reg_w1(gspca_dev, 0x01, reg01);
2350 2352
@@ -2907,13 +2909,11 @@ static const struct sd_desc sd_desc = {
2907 .driver_info = (BRIDGE_ ## bridge << 16) \ 2909 .driver_info = (BRIDGE_ ## bridge << 16) \
2908 | (SENSOR_ ## sensor << 8) \ 2910 | (SENSOR_ ## sensor << 8) \
2909 | (flags) 2911 | (flags)
2910static const __devinitdata struct usb_device_id device_table[] = { 2912static const struct usb_device_id device_table[] = {
2911#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
2912 {USB_DEVICE(0x0458, 0x7025), BS(SN9C120, MI0360)}, 2913 {USB_DEVICE(0x0458, 0x7025), BS(SN9C120, MI0360)},
2913 {USB_DEVICE(0x0458, 0x702e), BS(SN9C120, OV7660)}, 2914 {USB_DEVICE(0x0458, 0x702e), BS(SN9C120, OV7660)},
2914#endif 2915 {USB_DEVICE(0x045e, 0x00f5), BSF(SN9C105, OV7660, F_PDN_INV)},
2915 {USB_DEVICE(0x045e, 0x00f5), BSF(SN9C105, OV7660, PDN_INV)}, 2916 {USB_DEVICE(0x045e, 0x00f7), BSF(SN9C105, OV7660, F_PDN_INV)},
2916 {USB_DEVICE(0x045e, 0x00f7), BSF(SN9C105, OV7660, PDN_INV)},
2917 {USB_DEVICE(0x0471, 0x0327), BS(SN9C105, MI0360)}, 2917 {USB_DEVICE(0x0471, 0x0327), BS(SN9C105, MI0360)},
2918 {USB_DEVICE(0x0471, 0x0328), BS(SN9C105, MI0360)}, 2918 {USB_DEVICE(0x0471, 0x0328), BS(SN9C105, MI0360)},
2919 {USB_DEVICE(0x0471, 0x0330), BS(SN9C105, MI0360)}, 2919 {USB_DEVICE(0x0471, 0x0330), BS(SN9C105, MI0360)},
@@ -2925,7 +2925,7 @@ static const __devinitdata struct usb_device_id device_table[] = {
2925/* {USB_DEVICE(0x0c45, 0x607b), BS(SN9C102P, OV7660)}, */ 2925/* {USB_DEVICE(0x0c45, 0x607b), BS(SN9C102P, OV7660)}, */
2926 {USB_DEVICE(0x0c45, 0x607c), BS(SN9C102P, HV7131R)}, 2926 {USB_DEVICE(0x0c45, 0x607c), BS(SN9C102P, HV7131R)},
2927/* {USB_DEVICE(0x0c45, 0x607e), BS(SN9C102P, OV7630)}, */ 2927/* {USB_DEVICE(0x0c45, 0x607e), BS(SN9C102P, OV7630)}, */
2928 {USB_DEVICE(0x0c45, 0x60c0), BS(SN9C105, MI0360)}, 2928 {USB_DEVICE(0x0c45, 0x60c0), BSF(SN9C105, MI0360, F_ILLUM)},
2929 /* or MT9V111 */ 2929 /* or MT9V111 */
2930/* {USB_DEVICE(0x0c45, 0x60c2), BS(SN9C105, P1030xC)}, */ 2930/* {USB_DEVICE(0x0c45, 0x60c2), BS(SN9C105, P1030xC)}, */
2931/* {USB_DEVICE(0x0c45, 0x60c8), BS(SN9C105, OM6802)}, */ 2931/* {USB_DEVICE(0x0c45, 0x60c8), BS(SN9C105, OM6802)}, */
@@ -2936,10 +2936,8 @@ static const __devinitdata struct usb_device_id device_table[] = {
2936/* {USB_DEVICE(0x0c45, 0x60fa), BS(SN9C105, OV7648)}, */ 2936/* {USB_DEVICE(0x0c45, 0x60fa), BS(SN9C105, OV7648)}, */
2937/* {USB_DEVICE(0x0c45, 0x60f2), BS(SN9C105, OV7660)}, */ 2937/* {USB_DEVICE(0x0c45, 0x60f2), BS(SN9C105, OV7660)}, */
2938 {USB_DEVICE(0x0c45, 0x60fb), BS(SN9C105, OV7660)}, 2938 {USB_DEVICE(0x0c45, 0x60fb), BS(SN9C105, OV7660)},
2939#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
2940 {USB_DEVICE(0x0c45, 0x60fc), BS(SN9C105, HV7131R)}, 2939 {USB_DEVICE(0x0c45, 0x60fc), BS(SN9C105, HV7131R)},
2941 {USB_DEVICE(0x0c45, 0x60fe), BS(SN9C105, OV7630)}, 2940 {USB_DEVICE(0x0c45, 0x60fe), BS(SN9C105, OV7630)},
2942#endif
2943 {USB_DEVICE(0x0c45, 0x6100), BS(SN9C120, MI0360)}, /*sn9c128*/ 2941 {USB_DEVICE(0x0c45, 0x6100), BS(SN9C120, MI0360)}, /*sn9c128*/
2944 {USB_DEVICE(0x0c45, 0x6102), BS(SN9C120, PO2030N)}, /* /GC0305*/ 2942 {USB_DEVICE(0x0c45, 0x6102), BS(SN9C120, PO2030N)}, /* /GC0305*/
2945/* {USB_DEVICE(0x0c45, 0x6108), BS(SN9C120, OM6802)}, */ 2943/* {USB_DEVICE(0x0c45, 0x6108), BS(SN9C120, OM6802)}, */
@@ -2962,16 +2960,15 @@ static const __devinitdata struct usb_device_id device_table[] = {
2962/* {USB_DEVICE(0x0c45, 0x6132), BS(SN9C120, OV7670)}, */ 2960/* {USB_DEVICE(0x0c45, 0x6132), BS(SN9C120, OV7670)}, */
2963 {USB_DEVICE(0x0c45, 0x6138), BS(SN9C120, MO4000)}, 2961 {USB_DEVICE(0x0c45, 0x6138), BS(SN9C120, MO4000)},
2964 {USB_DEVICE(0x0c45, 0x613a), BS(SN9C120, OV7648)}, 2962 {USB_DEVICE(0x0c45, 0x613a), BS(SN9C120, OV7648)},
2965#if !defined CONFIG_USB_SN9C102 && !defined CONFIG_USB_SN9C102_MODULE
2966 {USB_DEVICE(0x0c45, 0x613b), BS(SN9C120, OV7660)}, 2963 {USB_DEVICE(0x0c45, 0x613b), BS(SN9C120, OV7660)},
2967#endif
2968 {USB_DEVICE(0x0c45, 0x613c), BS(SN9C120, HV7131R)}, 2964 {USB_DEVICE(0x0c45, 0x613c), BS(SN9C120, HV7131R)},
2969 {USB_DEVICE(0x0c45, 0x613e), BS(SN9C120, OV7630)}, 2965 {USB_DEVICE(0x0c45, 0x613e), BS(SN9C120, OV7630)},
2970 {USB_DEVICE(0x0c45, 0x6142), BS(SN9C120, PO2030N)}, /*sn9c120b*/ 2966 {USB_DEVICE(0x0c45, 0x6142), BS(SN9C120, PO2030N)}, /*sn9c120b*/
2971 /* or GC0305 / GC0307 */ 2967 /* or GC0305 / GC0307 */
2972 {USB_DEVICE(0x0c45, 0x6143), BS(SN9C120, SP80708)}, /*sn9c120b*/ 2968 {USB_DEVICE(0x0c45, 0x6143), BS(SN9C120, SP80708)}, /*sn9c120b*/
2973 {USB_DEVICE(0x0c45, 0x6148), BS(SN9C120, OM6802)}, /*sn9c120b*/ 2969 {USB_DEVICE(0x0c45, 0x6148), BS(SN9C120, OM6802)}, /*sn9c120b*/
2974 {USB_DEVICE(0x0c45, 0x614a), BS(SN9C120, ADCM1700)}, /*sn9c120b*/ 2970 {USB_DEVICE(0x0c45, 0x614a), BSF(SN9C120, ADCM1700, F_ILLUM)},
2971/* {USB_DEVICE(0x0c45, 0x614c), BS(SN9C120, GC0306)}, */ /*sn9c120b*/
2975 {} 2972 {}
2976}; 2973};
2977MODULE_DEVICE_TABLE(usb, device_table); 2974MODULE_DEVICE_TABLE(usb, device_table);
@@ -3007,3 +3004,7 @@ static void __exit sd_mod_exit(void)
3007 3004
3008module_init(sd_mod_init); 3005module_init(sd_mod_init);
3009module_exit(sd_mod_exit); 3006module_exit(sd_mod_exit);
3007
3008module_param(starcam, int, 0644);
3009MODULE_PARM_DESC(starcam,
3010 "StarCam model. 0: Clip, 1: 370i");
diff --git a/drivers/media/video/gspca/spca1528.c b/drivers/media/video/gspca/spca1528.c
index e64338664410..76c006b2bc83 100644
--- a/drivers/media/video/gspca/spca1528.c
+++ b/drivers/media/video/gspca/spca1528.c
@@ -555,7 +555,7 @@ static const struct sd_desc sd_desc = {
555}; 555};
556 556
557/* -- module initialisation -- */ 557/* -- module initialisation -- */
558static const __devinitdata struct usb_device_id device_table[] = { 558static const struct usb_device_id device_table[] = {
559 {USB_DEVICE(0x04fc, 0x1528)}, 559 {USB_DEVICE(0x04fc, 0x1528)},
560 {} 560 {}
561}; 561};
diff --git a/drivers/media/video/gspca/spca500.c b/drivers/media/video/gspca/spca500.c
index 8e202b9039f1..45552c3ff8d9 100644
--- a/drivers/media/video/gspca/spca500.c
+++ b/drivers/media/video/gspca/spca500.c
@@ -1051,7 +1051,7 @@ static const struct sd_desc sd_desc = {
1051}; 1051};
1052 1052
1053/* -- module initialisation -- */ 1053/* -- module initialisation -- */
1054static const __devinitdata struct usb_device_id device_table[] = { 1054static const struct usb_device_id device_table[] = {
1055 {USB_DEVICE(0x040a, 0x0300), .driver_info = KodakEZ200}, 1055 {USB_DEVICE(0x040a, 0x0300), .driver_info = KodakEZ200},
1056 {USB_DEVICE(0x041e, 0x400a), .driver_info = CreativePCCam300}, 1056 {USB_DEVICE(0x041e, 0x400a), .driver_info = CreativePCCam300},
1057 {USB_DEVICE(0x046d, 0x0890), .driver_info = LogitechTraveler}, 1057 {USB_DEVICE(0x046d, 0x0890), .driver_info = LogitechTraveler},
diff --git a/drivers/media/video/gspca/spca501.c b/drivers/media/video/gspca/spca501.c
index 642839a11e8d..f7ef282cc600 100644
--- a/drivers/media/video/gspca/spca501.c
+++ b/drivers/media/video/gspca/spca501.c
@@ -2155,7 +2155,7 @@ static const struct sd_desc sd_desc = {
2155}; 2155};
2156 2156
2157/* -- module initialisation -- */ 2157/* -- module initialisation -- */
2158static const __devinitdata struct usb_device_id device_table[] = { 2158static const struct usb_device_id device_table[] = {
2159 {USB_DEVICE(0x040a, 0x0002), .driver_info = KodakDVC325}, 2159 {USB_DEVICE(0x040a, 0x0002), .driver_info = KodakDVC325},
2160 {USB_DEVICE(0x0497, 0xc001), .driver_info = SmileIntlCamera}, 2160 {USB_DEVICE(0x0497, 0xc001), .driver_info = SmileIntlCamera},
2161 {USB_DEVICE(0x0506, 0x00df), .driver_info = ThreeComHomeConnectLite}, 2161 {USB_DEVICE(0x0506, 0x00df), .driver_info = ThreeComHomeConnectLite},
diff --git a/drivers/media/video/gspca/spca505.c b/drivers/media/video/gspca/spca505.c
index bc9dd9034ab4..e5bf865147d7 100644
--- a/drivers/media/video/gspca/spca505.c
+++ b/drivers/media/video/gspca/spca505.c
@@ -786,7 +786,7 @@ static const struct sd_desc sd_desc = {
786}; 786};
787 787
788/* -- module initialisation -- */ 788/* -- module initialisation -- */
789static const __devinitdata struct usb_device_id device_table[] = { 789static const struct usb_device_id device_table[] = {
790 {USB_DEVICE(0x041e, 0x401d), .driver_info = Nxultra}, 790 {USB_DEVICE(0x041e, 0x401d), .driver_info = Nxultra},
791 {USB_DEVICE(0x0733, 0x0430), .driver_info = IntelPCCameraPro}, 791 {USB_DEVICE(0x0733, 0x0430), .driver_info = IntelPCCameraPro},
792/*fixme: may be UsbGrabberPV321 BRIDGE_SPCA506 SENSOR_SAA7113 */ 792/*fixme: may be UsbGrabberPV321 BRIDGE_SPCA506 SENSOR_SAA7113 */
diff --git a/drivers/media/video/gspca/spca508.c b/drivers/media/video/gspca/spca508.c
index 7307638ac91d..348319371523 100644
--- a/drivers/media/video/gspca/spca508.c
+++ b/drivers/media/video/gspca/spca508.c
@@ -1509,7 +1509,7 @@ static const struct sd_desc sd_desc = {
1509}; 1509};
1510 1510
1511/* -- module initialisation -- */ 1511/* -- module initialisation -- */
1512static const __devinitdata struct usb_device_id device_table[] = { 1512static const struct usb_device_id device_table[] = {
1513 {USB_DEVICE(0x0130, 0x0130), .driver_info = HamaUSBSightcam}, 1513 {USB_DEVICE(0x0130, 0x0130), .driver_info = HamaUSBSightcam},
1514 {USB_DEVICE(0x041e, 0x4018), .driver_info = CreativeVista}, 1514 {USB_DEVICE(0x041e, 0x4018), .driver_info = CreativeVista},
1515 {USB_DEVICE(0x0733, 0x0110), .driver_info = ViewQuestVQ110}, 1515 {USB_DEVICE(0x0733, 0x0110), .driver_info = ViewQuestVQ110},
diff --git a/drivers/media/video/gspca/spca561.c b/drivers/media/video/gspca/spca561.c
index 3a162c6d5466..e836e778dfb6 100644
--- a/drivers/media/video/gspca/spca561.c
+++ b/drivers/media/video/gspca/spca561.c
@@ -1061,7 +1061,7 @@ static const struct sd_desc *sd_desc[2] = {
1061}; 1061};
1062 1062
1063/* -- module initialisation -- */ 1063/* -- module initialisation -- */
1064static const __devinitdata struct usb_device_id device_table[] = { 1064static const struct usb_device_id device_table[] = {
1065 {USB_DEVICE(0x041e, 0x401a), .driver_info = Rev072A}, 1065 {USB_DEVICE(0x041e, 0x401a), .driver_info = Rev072A},
1066 {USB_DEVICE(0x041e, 0x403b), .driver_info = Rev012A}, 1066 {USB_DEVICE(0x041e, 0x403b), .driver_info = Rev012A},
1067 {USB_DEVICE(0x0458, 0x7004), .driver_info = Rev072A}, 1067 {USB_DEVICE(0x0458, 0x7004), .driver_info = Rev072A},
diff --git a/drivers/media/video/gspca/sq905.c b/drivers/media/video/gspca/sq905.c
index 404067745775..2e9c06175192 100644
--- a/drivers/media/video/gspca/sq905.c
+++ b/drivers/media/video/gspca/sq905.c
@@ -396,7 +396,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
396} 396}
397 397
398/* Table of supported USB devices */ 398/* Table of supported USB devices */
399static const __devinitdata struct usb_device_id device_table[] = { 399static const struct usb_device_id device_table[] = {
400 {USB_DEVICE(0x2770, 0x9120)}, 400 {USB_DEVICE(0x2770, 0x9120)},
401 {} 401 {}
402}; 402};
diff --git a/drivers/media/video/gspca/sq905c.c b/drivers/media/video/gspca/sq905c.c
index 8ba199543856..457563b7a71b 100644
--- a/drivers/media/video/gspca/sq905c.c
+++ b/drivers/media/video/gspca/sq905c.c
@@ -298,7 +298,7 @@ static int sd_start(struct gspca_dev *gspca_dev)
298} 298}
299 299
300/* Table of supported USB devices */ 300/* Table of supported USB devices */
301static const __devinitdata struct usb_device_id device_table[] = { 301static const struct usb_device_id device_table[] = {
302 {USB_DEVICE(0x2770, 0x905c)}, 302 {USB_DEVICE(0x2770, 0x905c)},
303 {USB_DEVICE(0x2770, 0x9050)}, 303 {USB_DEVICE(0x2770, 0x9050)},
304 {USB_DEVICE(0x2770, 0x9051)}, 304 {USB_DEVICE(0x2770, 0x9051)},
diff --git a/drivers/media/video/gspca/sq930x.c b/drivers/media/video/gspca/sq930x.c
index a4a98811b9e3..8215d5dcd456 100644
--- a/drivers/media/video/gspca/sq930x.c
+++ b/drivers/media/video/gspca/sq930x.c
@@ -1163,7 +1163,7 @@ static const struct sd_desc sd_desc = {
1163#define ST(sensor, type) \ 1163#define ST(sensor, type) \
1164 .driver_info = (SENSOR_ ## sensor << 8) \ 1164 .driver_info = (SENSOR_ ## sensor << 8) \
1165 | (type) 1165 | (type)
1166static const __devinitdata struct usb_device_id device_table[] = { 1166static const struct usb_device_id device_table[] = {
1167 {USB_DEVICE(0x041e, 0x4038), ST(MI0360, 0)}, 1167 {USB_DEVICE(0x041e, 0x4038), ST(MI0360, 0)},
1168 {USB_DEVICE(0x041e, 0x403c), ST(LZ24BP, 0)}, 1168 {USB_DEVICE(0x041e, 0x403c), ST(LZ24BP, 0)},
1169 {USB_DEVICE(0x041e, 0x403d), ST(LZ24BP, 0)}, 1169 {USB_DEVICE(0x041e, 0x403d), ST(LZ24BP, 0)},
diff --git a/drivers/media/video/gspca/stk014.c b/drivers/media/video/gspca/stk014.c
index 11a192b95ed4..87be52b5e1e3 100644
--- a/drivers/media/video/gspca/stk014.c
+++ b/drivers/media/video/gspca/stk014.c
@@ -495,7 +495,7 @@ static const struct sd_desc sd_desc = {
495}; 495};
496 496
497/* -- module initialisation -- */ 497/* -- module initialisation -- */
498static const __devinitdata struct usb_device_id device_table[] = { 498static const struct usb_device_id device_table[] = {
499 {USB_DEVICE(0x05e1, 0x0893)}, 499 {USB_DEVICE(0x05e1, 0x0893)},
500 {} 500 {}
501}; 501};
diff --git a/drivers/media/video/gspca/stv0680.c b/drivers/media/video/gspca/stv0680.c
index b199ad4666bd..e2ef41cf72d7 100644
--- a/drivers/media/video/gspca/stv0680.c
+++ b/drivers/media/video/gspca/stv0680.c
@@ -327,7 +327,7 @@ static const struct sd_desc sd_desc = {
327}; 327};
328 328
329/* -- module initialisation -- */ 329/* -- module initialisation -- */
330static const __devinitdata struct usb_device_id device_table[] = { 330static const struct usb_device_id device_table[] = {
331 {USB_DEVICE(0x0553, 0x0202)}, 331 {USB_DEVICE(0x0553, 0x0202)},
332 {USB_DEVICE(0x041e, 0x4007)}, 332 {USB_DEVICE(0x041e, 0x4007)},
333 {} 333 {}
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.c b/drivers/media/video/gspca/stv06xx/stv06xx.c
index 28ea4175b80e..7e0661429293 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx.c
+++ b/drivers/media/video/gspca/stv06xx/stv06xx.c
@@ -564,7 +564,7 @@ static int stv06xx_config(struct gspca_dev *gspca_dev,
564 564
565 565
566/* -- module initialisation -- */ 566/* -- module initialisation -- */
567static const __devinitdata struct usb_device_id device_table[] = { 567static const struct usb_device_id device_table[] = {
568 /* QuickCam Express */ 568 /* QuickCam Express */
569 {USB_DEVICE(0x046d, 0x0840), .driver_info = BRIDGE_STV600 }, 569 {USB_DEVICE(0x046d, 0x0840), .driver_info = BRIDGE_STV600 },
570 /* LEGO cam / QuickCam Web */ 570 /* LEGO cam / QuickCam Web */
diff --git a/drivers/media/video/gspca/sunplus.c b/drivers/media/video/gspca/sunplus.c
index a9cbcd6011d9..543542af2720 100644
--- a/drivers/media/video/gspca/sunplus.c
+++ b/drivers/media/video/gspca/sunplus.c
@@ -1162,7 +1162,7 @@ static const struct sd_desc sd_desc = {
1162#define BS(bridge, subtype) \ 1162#define BS(bridge, subtype) \
1163 .driver_info = (BRIDGE_ ## bridge << 8) \ 1163 .driver_info = (BRIDGE_ ## bridge << 8) \
1164 | (subtype) 1164 | (subtype)
1165static const __devinitdata struct usb_device_id device_table[] = { 1165static const struct usb_device_id device_table[] = {
1166 {USB_DEVICE(0x041e, 0x400b), BS(SPCA504C, 0)}, 1166 {USB_DEVICE(0x041e, 0x400b), BS(SPCA504C, 0)},
1167 {USB_DEVICE(0x041e, 0x4012), BS(SPCA504C, 0)}, 1167 {USB_DEVICE(0x041e, 0x4012), BS(SPCA504C, 0)},
1168 {USB_DEVICE(0x041e, 0x4013), BS(SPCA504C, 0)}, 1168 {USB_DEVICE(0x041e, 0x4013), BS(SPCA504C, 0)},
diff --git a/drivers/media/video/gspca/t613.c b/drivers/media/video/gspca/t613.c
index 8f0c33116e0d..a3eccd815766 100644
--- a/drivers/media/video/gspca/t613.c
+++ b/drivers/media/video/gspca/t613.c
@@ -1416,7 +1416,7 @@ static const struct sd_desc sd_desc = {
1416}; 1416};
1417 1417
1418/* -- module initialisation -- */ 1418/* -- module initialisation -- */
1419static const __devinitdata struct usb_device_id device_table[] = { 1419static const struct usb_device_id device_table[] = {
1420 {USB_DEVICE(0x17a1, 0x0128)}, 1420 {USB_DEVICE(0x17a1, 0x0128)},
1421 {} 1421 {}
1422}; 1422};
diff --git a/drivers/media/video/gspca/tv8532.c b/drivers/media/video/gspca/tv8532.c
index 38c22f0a4263..933ef2ca658c 100644
--- a/drivers/media/video/gspca/tv8532.c
+++ b/drivers/media/video/gspca/tv8532.c
@@ -388,7 +388,7 @@ static const struct sd_desc sd_desc = {
388}; 388};
389 389
390/* -- module initialisation -- */ 390/* -- module initialisation -- */
391static const __devinitdata struct usb_device_id device_table[] = { 391static const struct usb_device_id device_table[] = {
392 {USB_DEVICE(0x046d, 0x0920)}, 392 {USB_DEVICE(0x046d, 0x0920)},
393 {USB_DEVICE(0x046d, 0x0921)}, 393 {USB_DEVICE(0x046d, 0x0921)},
394 {USB_DEVICE(0x0545, 0x808b)}, 394 {USB_DEVICE(0x0545, 0x808b)},
diff --git a/drivers/media/video/gspca/vc032x.c b/drivers/media/video/gspca/vc032x.c
index 9b2ae1b6cc75..6caed734a06a 100644
--- a/drivers/media/video/gspca/vc032x.c
+++ b/drivers/media/video/gspca/vc032x.c
@@ -4192,7 +4192,7 @@ static const struct sd_desc sd_desc = {
4192#define BF(bridge, flags) \ 4192#define BF(bridge, flags) \
4193 .driver_info = (BRIDGE_ ## bridge << 8) \ 4193 .driver_info = (BRIDGE_ ## bridge << 8) \
4194 | (flags) 4194 | (flags)
4195static const __devinitdata struct usb_device_id device_table[] = { 4195static const struct usb_device_id device_table[] = {
4196 {USB_DEVICE(0x041e, 0x405b), BF(VC0323, FL_VFLIP)}, 4196 {USB_DEVICE(0x041e, 0x405b), BF(VC0323, FL_VFLIP)},
4197 {USB_DEVICE(0x046d, 0x0892), BF(VC0321, 0)}, 4197 {USB_DEVICE(0x046d, 0x0892), BF(VC0321, 0)},
4198 {USB_DEVICE(0x046d, 0x0896), BF(VC0321, 0)}, 4198 {USB_DEVICE(0x046d, 0x0896), BF(VC0321, 0)},
diff --git a/drivers/media/video/gspca/xirlink_cit.c b/drivers/media/video/gspca/xirlink_cit.c
index 5b5039a02031..c089a0f6f1d0 100644
--- a/drivers/media/video/gspca/xirlink_cit.c
+++ b/drivers/media/video/gspca/xirlink_cit.c
@@ -3270,7 +3270,7 @@ static const struct sd_desc sd_desc_isoc_nego = {
3270}; 3270};
3271 3271
3272/* -- module initialisation -- */ 3272/* -- module initialisation -- */
3273static const __devinitdata struct usb_device_id device_table[] = { 3273static const struct usb_device_id device_table[] = {
3274 { USB_DEVICE_VER(0x0545, 0x8080, 0x0001, 0x0001), .driver_info = CIT_MODEL0 }, 3274 { USB_DEVICE_VER(0x0545, 0x8080, 0x0001, 0x0001), .driver_info = CIT_MODEL0 },
3275 { USB_DEVICE_VER(0x0545, 0x8080, 0x0002, 0x0002), .driver_info = CIT_MODEL1 }, 3275 { USB_DEVICE_VER(0x0545, 0x8080, 0x0002, 0x0002), .driver_info = CIT_MODEL1 },
3276 { USB_DEVICE_VER(0x0545, 0x8080, 0x030a, 0x030a), .driver_info = CIT_MODEL2 }, 3276 { USB_DEVICE_VER(0x0545, 0x8080, 0x030a, 0x030a), .driver_info = CIT_MODEL2 },
diff --git a/drivers/media/video/gspca/zc3xx.c b/drivers/media/video/gspca/zc3xx.c
index 14b85d483163..865216e9362c 100644
--- a/drivers/media/video/gspca/zc3xx.c
+++ b/drivers/media/video/gspca/zc3xx.c
@@ -6909,7 +6909,7 @@ static const struct sd_desc sd_desc = {
6909#endif 6909#endif
6910}; 6910};
6911 6911
6912static const __devinitdata struct usb_device_id device_table[] = { 6912static const struct usb_device_id device_table[] = {
6913 {USB_DEVICE(0x041e, 0x041e)}, 6913 {USB_DEVICE(0x041e, 0x041e)},
6914 {USB_DEVICE(0x041e, 0x4017)}, 6914 {USB_DEVICE(0x041e, 0x4017)},
6915 {USB_DEVICE(0x041e, 0x401c), .driver_info = SENSOR_PAS106}, 6915 {USB_DEVICE(0x041e, 0x401c), .driver_info = SENSOR_PAS106},
diff --git a/drivers/media/video/hdpvr/Makefile b/drivers/media/video/hdpvr/Makefile
index e0230fcb2e36..3baa9f613ca3 100644
--- a/drivers/media/video/hdpvr/Makefile
+++ b/drivers/media/video/hdpvr/Makefile
@@ -1,6 +1,4 @@
1hdpvr-objs := hdpvr-control.o hdpvr-core.o hdpvr-video.o 1hdpvr-objs := hdpvr-control.o hdpvr-core.o hdpvr-video.o hdpvr-i2c.o
2
3hdpvr-$(CONFIG_I2C) += hdpvr-i2c.o
4 2
5obj-$(CONFIG_VIDEO_HDPVR) += hdpvr.o 3obj-$(CONFIG_VIDEO_HDPVR) += hdpvr.o
6 4
diff --git a/drivers/media/video/hdpvr/hdpvr-core.c b/drivers/media/video/hdpvr/hdpvr-core.c
index f7d1ee55185a..a6572e5ae369 100644
--- a/drivers/media/video/hdpvr/hdpvr-core.c
+++ b/drivers/media/video/hdpvr/hdpvr-core.c
@@ -378,19 +378,17 @@ static int hdpvr_probe(struct usb_interface *interface,
378 goto error; 378 goto error;
379 } 379 }
380 380
381#ifdef CONFIG_I2C 381#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
382 /* until i2c is working properly */ 382 retval = hdpvr_register_i2c_adapter(dev);
383 retval = 0; /* hdpvr_register_i2c_adapter(dev); */
384 if (retval < 0) { 383 if (retval < 0) {
385 v4l2_err(&dev->v4l2_dev, "registering i2c adapter failed\n"); 384 v4l2_err(&dev->v4l2_dev, "registering i2c adapter failed\n");
386 goto error; 385 goto error;
387 } 386 }
388 387
389 /* until i2c is working properly */ 388 retval = hdpvr_register_i2c_ir(dev);
390 retval = 0; /* hdpvr_register_i2c_ir(dev); */
391 if (retval < 0) 389 if (retval < 0)
392 v4l2_err(&dev->v4l2_dev, "registering i2c IR devices failed\n"); 390 v4l2_err(&dev->v4l2_dev, "registering i2c IR devices failed\n");
393#endif /* CONFIG_I2C */ 391#endif
394 392
395 /* let the user know what node this device is now attached to */ 393 /* let the user know what node this device is now attached to */
396 v4l2_info(&dev->v4l2_dev, "device now attached to %s\n", 394 v4l2_info(&dev->v4l2_dev, "device now attached to %s\n",
diff --git a/drivers/media/video/hdpvr/hdpvr-i2c.c b/drivers/media/video/hdpvr/hdpvr-i2c.c
index 24966aa02a70..89b71faeaac2 100644
--- a/drivers/media/video/hdpvr/hdpvr-i2c.c
+++ b/drivers/media/video/hdpvr/hdpvr-i2c.c
@@ -13,6 +13,8 @@
13 * 13 *
14 */ 14 */
15 15
16#if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
17
16#include <linux/i2c.h> 18#include <linux/i2c.h>
17#include <linux/slab.h> 19#include <linux/slab.h>
18 20
@@ -28,106 +30,78 @@
28#define Z8F0811_IR_TX_I2C_ADDR 0x70 30#define Z8F0811_IR_TX_I2C_ADDR 0x70
29#define Z8F0811_IR_RX_I2C_ADDR 0x71 31#define Z8F0811_IR_RX_I2C_ADDR 0x71
30 32
31static const u8 ir_i2c_addrs[] = {
32 Z8F0811_IR_TX_I2C_ADDR,
33 Z8F0811_IR_RX_I2C_ADDR,
34};
35 33
36static const char * const ir_devicenames[] = { 34static struct i2c_board_info hdpvr_i2c_board_info = {
37 "ir_tx_z8f0811_hdpvr", 35 I2C_BOARD_INFO("ir_tx_z8f0811_hdpvr", Z8F0811_IR_TX_I2C_ADDR),
38 "ir_rx_z8f0811_hdpvr", 36 I2C_BOARD_INFO("ir_rx_z8f0811_hdpvr", Z8F0811_IR_RX_I2C_ADDR),
39}; 37};
40 38
41static int hdpvr_new_i2c_ir(struct hdpvr_device *dev, struct i2c_adapter *adap, 39int hdpvr_register_i2c_ir(struct hdpvr_device *dev)
42 const char *type, u8 addr)
43{ 40{
44 struct i2c_board_info info; 41 struct i2c_client *c;
45 struct IR_i2c_init_data *init_data = &dev->ir_i2c_init_data; 42 struct IR_i2c_init_data *init_data = &dev->ir_i2c_init_data;
46 unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
47
48 memset(&info, 0, sizeof(struct i2c_board_info));
49 strlcpy(info.type, type, I2C_NAME_SIZE);
50 43
51 /* Our default information for ir-kbd-i2c.c to use */ 44 /* Our default information for ir-kbd-i2c.c to use */
52 switch (addr) { 45 init_data->ir_codes = RC_MAP_HAUPPAUGE_NEW;
53 case Z8F0811_IR_RX_I2C_ADDR: 46 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
54 init_data->ir_codes = RC_MAP_HAUPPAUGE_NEW; 47 init_data->type = RC_TYPE_RC5;
55 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR; 48 init_data->name = "HD PVR";
56 init_data->type = RC_TYPE_RC5; 49 hdpvr_i2c_board_info.platform_data = init_data;
57 init_data->name = "HD PVR";
58 info.platform_data = init_data;
59 break;
60 }
61 50
62 return i2c_new_probed_device(adap, &info, addr_list, NULL) == NULL ? 51 c = i2c_new_device(&dev->i2c_adapter, &hdpvr_i2c_board_info);
63 -1 : 0;
64}
65 52
66int hdpvr_register_i2c_ir(struct hdpvr_device *dev) 53 return (c == NULL) ? -ENODEV : 0;
67{
68 int i;
69 int ret = 0;
70
71 for (i = 0; i < ARRAY_SIZE(ir_i2c_addrs); i++)
72 ret += hdpvr_new_i2c_ir(dev, dev->i2c_adapter,
73 ir_devicenames[i], ir_i2c_addrs[i]);
74
75 return ret;
76} 54}
77 55
78static int hdpvr_i2c_read(struct hdpvr_device *dev, unsigned char addr, 56static int hdpvr_i2c_read(struct hdpvr_device *dev, int bus,
79 char *data, int len) 57 unsigned char addr, char *data, int len)
80{ 58{
81 int ret; 59 int ret;
82 char *buf = kmalloc(len, GFP_KERNEL); 60
83 if (!buf) 61 if (len > sizeof(dev->i2c_buf))
84 return -ENOMEM; 62 return -EINVAL;
85 63
86 ret = usb_control_msg(dev->udev, 64 ret = usb_control_msg(dev->udev,
87 usb_rcvctrlpipe(dev->udev, 0), 65 usb_rcvctrlpipe(dev->udev, 0),
88 REQTYPE_I2C_READ, CTRL_READ_REQUEST, 66 REQTYPE_I2C_READ, CTRL_READ_REQUEST,
89 0x100|addr, 0, buf, len, 1000); 67 (bus << 8) | addr, 0, &dev->i2c_buf, len, 1000);
90 68
91 if (ret == len) { 69 if (ret == len) {
92 memcpy(data, buf, len); 70 memcpy(data, &dev->i2c_buf, len);
93 ret = 0; 71 ret = 0;
94 } else if (ret >= 0) 72 } else if (ret >= 0)
95 ret = -EIO; 73 ret = -EIO;
96 74
97 kfree(buf);
98
99 return ret; 75 return ret;
100} 76}
101 77
102static int hdpvr_i2c_write(struct hdpvr_device *dev, unsigned char addr, 78static int hdpvr_i2c_write(struct hdpvr_device *dev, int bus,
103 char *data, int len) 79 unsigned char addr, char *data, int len)
104{ 80{
105 int ret; 81 int ret;
106 char *buf = kmalloc(len, GFP_KERNEL);
107 if (!buf)
108 return -ENOMEM;
109 82
110 memcpy(buf, data, len); 83 if (len > sizeof(dev->i2c_buf))
84 return -EINVAL;
85
86 memcpy(&dev->i2c_buf, data, len);
111 ret = usb_control_msg(dev->udev, 87 ret = usb_control_msg(dev->udev,
112 usb_sndctrlpipe(dev->udev, 0), 88 usb_sndctrlpipe(dev->udev, 0),
113 REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST, 89 REQTYPE_I2C_WRITE, CTRL_WRITE_REQUEST,
114 0x100|addr, 0, buf, len, 1000); 90 (bus << 8) | addr, 0, &dev->i2c_buf, len, 1000);
115 91
116 if (ret < 0) 92 if (ret < 0)
117 goto error; 93 return ret;
118 94
119 ret = usb_control_msg(dev->udev, 95 ret = usb_control_msg(dev->udev,
120 usb_rcvctrlpipe(dev->udev, 0), 96 usb_rcvctrlpipe(dev->udev, 0),
121 REQTYPE_I2C_WRITE_STATT, CTRL_READ_REQUEST, 97 REQTYPE_I2C_WRITE_STATT, CTRL_READ_REQUEST,
122 0, 0, buf, 2, 1000); 98 0, 0, &dev->i2c_buf, 2, 1000);
123 99
124 if (ret == 2) 100 if ((ret == 2) && (dev->i2c_buf[1] == (len - 1)))
125 ret = 0; 101 ret = 0;
126 else if (ret >= 0) 102 else if (ret >= 0)
127 ret = -EIO; 103 ret = -EIO;
128 104
129error:
130 kfree(buf);
131 return ret; 105 return ret;
132} 106}
133 107
@@ -146,10 +120,10 @@ static int hdpvr_transfer(struct i2c_adapter *i2c_adapter, struct i2c_msg *msgs,
146 addr = msgs[i].addr << 1; 120 addr = msgs[i].addr << 1;
147 121
148 if (msgs[i].flags & I2C_M_RD) 122 if (msgs[i].flags & I2C_M_RD)
149 retval = hdpvr_i2c_read(dev, addr, msgs[i].buf, 123 retval = hdpvr_i2c_read(dev, 1, addr, msgs[i].buf,
150 msgs[i].len); 124 msgs[i].len);
151 else 125 else
152 retval = hdpvr_i2c_write(dev, addr, msgs[i].buf, 126 retval = hdpvr_i2c_write(dev, 1, addr, msgs[i].buf,
153 msgs[i].len); 127 msgs[i].len);
154 } 128 }
155 129
@@ -168,30 +142,47 @@ static struct i2c_algorithm hdpvr_algo = {
168 .functionality = hdpvr_functionality, 142 .functionality = hdpvr_functionality,
169}; 143};
170 144
145static struct i2c_adapter hdpvr_i2c_adapter_template = {
146 .name = "Hauppage HD PVR I2C",
147 .owner = THIS_MODULE,
148 .algo = &hdpvr_algo,
149};
150
151static int hdpvr_activate_ir(struct hdpvr_device *dev)
152{
153 char buffer[8];
154
155 mutex_lock(&dev->i2c_mutex);
156
157 hdpvr_i2c_read(dev, 0, 0x54, buffer, 1);
158
159 buffer[0] = 0;
160 buffer[1] = 0x8;
161 hdpvr_i2c_write(dev, 1, 0x54, buffer, 2);
162
163 buffer[1] = 0x18;
164 hdpvr_i2c_write(dev, 1, 0x54, buffer, 2);
165
166 mutex_unlock(&dev->i2c_mutex);
167
168 return 0;
169}
170
171int hdpvr_register_i2c_adapter(struct hdpvr_device *dev) 171int hdpvr_register_i2c_adapter(struct hdpvr_device *dev)
172{ 172{
173 struct i2c_adapter *i2c_adap;
174 int retval = -ENOMEM; 173 int retval = -ENOMEM;
175 174
176 i2c_adap = kzalloc(sizeof(struct i2c_adapter), GFP_KERNEL); 175 hdpvr_activate_ir(dev);
177 if (i2c_adap == NULL)
178 goto error;
179
180 strlcpy(i2c_adap->name, "Hauppauge HD PVR I2C",
181 sizeof(i2c_adap->name));
182 i2c_adap->algo = &hdpvr_algo;
183 i2c_adap->owner = THIS_MODULE;
184 i2c_adap->dev.parent = &dev->udev->dev;
185 176
186 i2c_set_adapdata(i2c_adap, dev); 177 memcpy(&dev->i2c_adapter, &hdpvr_i2c_adapter_template,
178 sizeof(struct i2c_adapter));
179 dev->i2c_adapter.dev.parent = &dev->udev->dev;
187 180
188 retval = i2c_add_adapter(i2c_adap); 181 i2c_set_adapdata(&dev->i2c_adapter, dev);
189 182
190 if (!retval) 183 retval = i2c_add_adapter(&dev->i2c_adapter);
191 dev->i2c_adapter = i2c_adap;
192 else
193 kfree(i2c_adap);
194 184
195error:
196 return retval; 185 return retval;
197} 186}
187
188#endif
diff --git a/drivers/media/video/hdpvr/hdpvr-video.c b/drivers/media/video/hdpvr/hdpvr-video.c
index d38fe1043e47..514aea76eaa5 100644
--- a/drivers/media/video/hdpvr/hdpvr-video.c
+++ b/drivers/media/video/hdpvr/hdpvr-video.c
@@ -1220,12 +1220,9 @@ static void hdpvr_device_release(struct video_device *vdev)
1220 v4l2_device_unregister(&dev->v4l2_dev); 1220 v4l2_device_unregister(&dev->v4l2_dev);
1221 1221
1222 /* deregister I2C adapter */ 1222 /* deregister I2C adapter */
1223#ifdef CONFIG_I2C 1223#if defined(CONFIG_I2C) || (CONFIG_I2C_MODULE)
1224 mutex_lock(&dev->i2c_mutex); 1224 mutex_lock(&dev->i2c_mutex);
1225 if (dev->i2c_adapter) 1225 i2c_del_adapter(&dev->i2c_adapter);
1226 i2c_del_adapter(dev->i2c_adapter);
1227 kfree(dev->i2c_adapter);
1228 dev->i2c_adapter = NULL;
1229 mutex_unlock(&dev->i2c_mutex); 1226 mutex_unlock(&dev->i2c_mutex);
1230#endif /* CONFIG_I2C */ 1227#endif /* CONFIG_I2C */
1231 1228
diff --git a/drivers/media/video/hdpvr/hdpvr.h b/drivers/media/video/hdpvr/hdpvr.h
index 37f1e4c7675d..ee74e3be9a6a 100644
--- a/drivers/media/video/hdpvr/hdpvr.h
+++ b/drivers/media/video/hdpvr/hdpvr.h
@@ -25,6 +25,7 @@
25 KERNEL_VERSION(HDPVR_MAJOR_VERSION, HDPVR_MINOR_VERSION, HDPVR_RELEASE) 25 KERNEL_VERSION(HDPVR_MAJOR_VERSION, HDPVR_MINOR_VERSION, HDPVR_RELEASE)
26 26
27#define HDPVR_MAX 8 27#define HDPVR_MAX 8
28#define HDPVR_I2C_MAX_SIZE 128
28 29
29/* Define these values to match your devices */ 30/* Define these values to match your devices */
30#define HD_PVR_VENDOR_ID 0x2040 31#define HD_PVR_VENDOR_ID 0x2040
@@ -106,9 +107,11 @@ struct hdpvr_device {
106 struct work_struct worker; 107 struct work_struct worker;
107 108
108 /* I2C adapter */ 109 /* I2C adapter */
109 struct i2c_adapter *i2c_adapter; 110 struct i2c_adapter i2c_adapter;
110 /* I2C lock */ 111 /* I2C lock */
111 struct mutex i2c_mutex; 112 struct mutex i2c_mutex;
113 /* I2C message buffer space */
114 char i2c_buf[HDPVR_I2C_MAX_SIZE];
112 115
113 /* For passing data to ir-kbd-i2c */ 116 /* For passing data to ir-kbd-i2c */
114 struct IR_i2c_init_data ir_i2c_init_data; 117 struct IR_i2c_init_data ir_i2c_init_data;
diff --git a/drivers/media/video/ir-kbd-i2c.c b/drivers/media/video/ir-kbd-i2c.c
index c87b6bc45555..d2b20ad383a3 100644
--- a/drivers/media/video/ir-kbd-i2c.c
+++ b/drivers/media/video/ir-kbd-i2c.c
@@ -244,15 +244,17 @@ static void ir_key_poll(struct IR_i2c *ir)
244 static u32 ir_key, ir_raw; 244 static u32 ir_key, ir_raw;
245 int rc; 245 int rc;
246 246
247 dprintk(2,"ir_poll_key\n"); 247 dprintk(3, "%s\n", __func__);
248 rc = ir->get_key(ir, &ir_key, &ir_raw); 248 rc = ir->get_key(ir, &ir_key, &ir_raw);
249 if (rc < 0) { 249 if (rc < 0) {
250 dprintk(2,"error\n"); 250 dprintk(2,"error\n");
251 return; 251 return;
252 } 252 }
253 253
254 if (rc) 254 if (rc) {
255 dprintk(1, "%s: keycode = 0x%04x\n", __func__, ir_key);
255 rc_keydown(ir->rc, ir_key, 0); 256 rc_keydown(ir->rc, ir_key, 0);
257 }
256} 258}
257 259
258static void ir_work(struct work_struct *work) 260static void ir_work(struct work_struct *work)
@@ -321,6 +323,12 @@ static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
321 rc_type = RC_TYPE_OTHER; 323 rc_type = RC_TYPE_OTHER;
322 ir_codes = RC_MAP_AVERMEDIA_CARDBUS; 324 ir_codes = RC_MAP_AVERMEDIA_CARDBUS;
323 break; 325 break;
326 case 0x71:
327 name = "Hauppauge/Zilog Z8";
328 ir->get_key = get_key_haup_xvr;
329 rc_type = RC_TYPE_RC5;
330 ir_codes = hauppauge ? RC_MAP_HAUPPAUGE_NEW : RC_MAP_RC5_TV;
331 break;
324 } 332 }
325 333
326 /* Let the caller override settings */ 334 /* Let the caller override settings */
diff --git a/drivers/media/video/ivtv/ivtv-i2c.c b/drivers/media/video/ivtv/ivtv-i2c.c
index e103b8fc7452..9fb86a081c0f 100644
--- a/drivers/media/video/ivtv/ivtv-i2c.c
+++ b/drivers/media/video/ivtv/ivtv-i2c.c
@@ -300,10 +300,15 @@ int ivtv_i2c_register(struct ivtv *itv, unsigned idx)
300 adap, type, 0, I2C_ADDRS(hw_addrs[idx])); 300 adap, type, 0, I2C_ADDRS(hw_addrs[idx]));
301 } else if (hw == IVTV_HW_CX25840) { 301 } else if (hw == IVTV_HW_CX25840) {
302 struct cx25840_platform_data pdata; 302 struct cx25840_platform_data pdata;
303 struct i2c_board_info cx25840_info = {
304 .type = "cx25840",
305 .addr = hw_addrs[idx],
306 .platform_data = &pdata,
307 };
303 308
304 pdata.pvr150_workaround = itv->pvr150_workaround; 309 pdata.pvr150_workaround = itv->pvr150_workaround;
305 sd = v4l2_i2c_new_subdev_cfg(&itv->v4l2_dev, 310 sd = v4l2_i2c_new_subdev_board(&itv->v4l2_dev, adap,
306 adap, type, 0, &pdata, hw_addrs[idx], NULL); 311 &cx25840_info, NULL);
307 } else { 312 } else {
308 sd = v4l2_i2c_new_subdev(&itv->v4l2_dev, 313 sd = v4l2_i2c_new_subdev(&itv->v4l2_dev,
309 adap, type, hw_addrs[idx], NULL); 314 adap, type, hw_addrs[idx], NULL);
diff --git a/drivers/media/video/mt9v011.c b/drivers/media/video/mt9v011.c
index 209ff97261a9..4904d25f689f 100644
--- a/drivers/media/video/mt9v011.c
+++ b/drivers/media/video/mt9v011.c
@@ -12,17 +12,41 @@
12#include <asm/div64.h> 12#include <asm/div64.h>
13#include <media/v4l2-device.h> 13#include <media/v4l2-device.h>
14#include <media/v4l2-chip-ident.h> 14#include <media/v4l2-chip-ident.h>
15#include "mt9v011.h" 15#include <media/mt9v011.h>
16 16
17MODULE_DESCRIPTION("Micron mt9v011 sensor driver"); 17MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
18MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>"); 18MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
19MODULE_LICENSE("GPL"); 19MODULE_LICENSE("GPL");
20 20
21
22static int debug; 21static int debug;
23module_param(debug, int, 0); 22module_param(debug, int, 0);
24MODULE_PARM_DESC(debug, "Debug level (0-2)"); 23MODULE_PARM_DESC(debug, "Debug level (0-2)");
25 24
25#define R00_MT9V011_CHIP_VERSION 0x00
26#define R01_MT9V011_ROWSTART 0x01
27#define R02_MT9V011_COLSTART 0x02
28#define R03_MT9V011_HEIGHT 0x03
29#define R04_MT9V011_WIDTH 0x04
30#define R05_MT9V011_HBLANK 0x05
31#define R06_MT9V011_VBLANK 0x06
32#define R07_MT9V011_OUT_CTRL 0x07
33#define R09_MT9V011_SHUTTER_WIDTH 0x09
34#define R0A_MT9V011_CLK_SPEED 0x0a
35#define R0B_MT9V011_RESTART 0x0b
36#define R0C_MT9V011_SHUTTER_DELAY 0x0c
37#define R0D_MT9V011_RESET 0x0d
38#define R1E_MT9V011_DIGITAL_ZOOM 0x1e
39#define R20_MT9V011_READ_MODE 0x20
40#define R2B_MT9V011_GREEN_1_GAIN 0x2b
41#define R2C_MT9V011_BLUE_GAIN 0x2c
42#define R2D_MT9V011_RED_GAIN 0x2d
43#define R2E_MT9V011_GREEN_2_GAIN 0x2e
44#define R35_MT9V011_GLOBAL_GAIN 0x35
45#define RF1_MT9V011_CHIP_ENABLE 0xf1
46
47#define MT9V011_VERSION 0x8232
48#define MT9V011_REV_B_VERSION 0x8243
49
26/* supported controls */ 50/* supported controls */
27static struct v4l2_queryctrl mt9v011_qctrl[] = { 51static struct v4l2_queryctrl mt9v011_qctrl[] = {
28 { 52 {
@@ -469,23 +493,6 @@ static int mt9v011_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt
469 return 0; 493 return 0;
470} 494}
471 495
472static int mt9v011_s_config(struct v4l2_subdev *sd, int dumb, void *data)
473{
474 struct mt9v011 *core = to_mt9v011(sd);
475 unsigned *xtal = data;
476
477 v4l2_dbg(1, debug, sd, "s_config called\n");
478
479 if (xtal) {
480 core->xtal = *xtal;
481 v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
482 *xtal / 1000000, (*xtal / 1000) % 1000);
483 }
484
485 return 0;
486}
487
488
489#ifdef CONFIG_VIDEO_ADV_DEBUG 496#ifdef CONFIG_VIDEO_ADV_DEBUG
490static int mt9v011_g_register(struct v4l2_subdev *sd, 497static int mt9v011_g_register(struct v4l2_subdev *sd,
491 struct v4l2_dbg_register *reg) 498 struct v4l2_dbg_register *reg)
@@ -536,7 +543,6 @@ static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
536 .g_ctrl = mt9v011_g_ctrl, 543 .g_ctrl = mt9v011_g_ctrl,
537 .s_ctrl = mt9v011_s_ctrl, 544 .s_ctrl = mt9v011_s_ctrl,
538 .reset = mt9v011_reset, 545 .reset = mt9v011_reset,
539 .s_config = mt9v011_s_config,
540 .g_chip_ident = mt9v011_g_chip_ident, 546 .g_chip_ident = mt9v011_g_chip_ident,
541#ifdef CONFIG_VIDEO_ADV_DEBUG 547#ifdef CONFIG_VIDEO_ADV_DEBUG
542 .g_register = mt9v011_g_register, 548 .g_register = mt9v011_g_register,
@@ -596,6 +602,14 @@ static int mt9v011_probe(struct i2c_client *c,
596 core->height = 480; 602 core->height = 480;
597 core->xtal = 27000000; /* Hz */ 603 core->xtal = 27000000; /* Hz */
598 604
605 if (c->dev.platform_data) {
606 struct mt9v011_platform_data *pdata = c->dev.platform_data;
607
608 core->xtal = pdata->xtal;
609 v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
610 core->xtal / 1000000, (core->xtal / 1000) % 1000);
611 }
612
599 v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n", 613 v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
600 c->addr << 1, c->adapter->name, version); 614 c->addr << 1, c->adapter->name, version);
601 615
diff --git a/drivers/media/video/mt9v011.h b/drivers/media/video/mt9v011.h
deleted file mode 100644
index 3350fd6083c3..000000000000
--- a/drivers/media/video/mt9v011.h
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
3 *
4 * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com)
5 * This code is placed under the terms of the GNU General Public License v2
6 */
7
8#ifndef MT9V011_H_
9#define MT9V011_H_
10
11#define R00_MT9V011_CHIP_VERSION 0x00
12#define R01_MT9V011_ROWSTART 0x01
13#define R02_MT9V011_COLSTART 0x02
14#define R03_MT9V011_HEIGHT 0x03
15#define R04_MT9V011_WIDTH 0x04
16#define R05_MT9V011_HBLANK 0x05
17#define R06_MT9V011_VBLANK 0x06
18#define R07_MT9V011_OUT_CTRL 0x07
19#define R09_MT9V011_SHUTTER_WIDTH 0x09
20#define R0A_MT9V011_CLK_SPEED 0x0a
21#define R0B_MT9V011_RESTART 0x0b
22#define R0C_MT9V011_SHUTTER_DELAY 0x0c
23#define R0D_MT9V011_RESET 0x0d
24#define R1E_MT9V011_DIGITAL_ZOOM 0x1e
25#define R20_MT9V011_READ_MODE 0x20
26#define R2B_MT9V011_GREEN_1_GAIN 0x2b
27#define R2C_MT9V011_BLUE_GAIN 0x2c
28#define R2D_MT9V011_RED_GAIN 0x2d
29#define R2E_MT9V011_GREEN_2_GAIN 0x2e
30#define R35_MT9V011_GLOBAL_GAIN 0x35
31#define RF1_MT9V011_CHIP_ENABLE 0xf1
32
33#define MT9V011_VERSION 0x8232
34#define MT9V011_REV_B_VERSION 0x8243
35
36#endif
diff --git a/drivers/media/video/ov7670.c b/drivers/media/video/ov7670.c
index c881a64b41fd..d4e7c11553c3 100644
--- a/drivers/media/video/ov7670.c
+++ b/drivers/media/video/ov7670.c
@@ -1449,47 +1449,6 @@ static int ov7670_g_chip_ident(struct v4l2_subdev *sd,
1449 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_OV7670, 0); 1449 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_OV7670, 0);
1450} 1450}
1451 1451
1452static int ov7670_s_config(struct v4l2_subdev *sd, int dumb, void *data)
1453{
1454 struct i2c_client *client = v4l2_get_subdevdata(sd);
1455 struct ov7670_config *config = data;
1456 struct ov7670_info *info = to_state(sd);
1457 int ret;
1458
1459 info->clock_speed = 30; /* default: a guess */
1460
1461 /*
1462 * Must apply configuration before initializing device, because it
1463 * selects I/O method.
1464 */
1465 if (config) {
1466 info->min_width = config->min_width;
1467 info->min_height = config->min_height;
1468 info->use_smbus = config->use_smbus;
1469
1470 if (config->clock_speed)
1471 info->clock_speed = config->clock_speed;
1472 }
1473
1474 /* Make sure it's an ov7670 */
1475 ret = ov7670_detect(sd);
1476 if (ret) {
1477 v4l_dbg(1, debug, client,
1478 "chip found @ 0x%x (%s) is not an ov7670 chip.\n",
1479 client->addr << 1, client->adapter->name);
1480 kfree(info);
1481 return ret;
1482 }
1483 v4l_info(client, "chip found @ 0x%02x (%s)\n",
1484 client->addr << 1, client->adapter->name);
1485
1486 info->fmt = &ov7670_formats[0];
1487 info->sat = 128; /* Review this */
1488 info->clkrc = info->clock_speed / 30;
1489
1490 return 0;
1491}
1492
1493#ifdef CONFIG_VIDEO_ADV_DEBUG 1452#ifdef CONFIG_VIDEO_ADV_DEBUG
1494static int ov7670_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg) 1453static int ov7670_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1495{ 1454{
@@ -1528,7 +1487,6 @@ static const struct v4l2_subdev_core_ops ov7670_core_ops = {
1528 .s_ctrl = ov7670_s_ctrl, 1487 .s_ctrl = ov7670_s_ctrl,
1529 .queryctrl = ov7670_queryctrl, 1488 .queryctrl = ov7670_queryctrl,
1530 .reset = ov7670_reset, 1489 .reset = ov7670_reset,
1531 .s_config = ov7670_s_config,
1532 .init = ov7670_init, 1490 .init = ov7670_init,
1533#ifdef CONFIG_VIDEO_ADV_DEBUG 1491#ifdef CONFIG_VIDEO_ADV_DEBUG
1534 .g_register = ov7670_g_register, 1492 .g_register = ov7670_g_register,
@@ -1558,6 +1516,7 @@ static int ov7670_probe(struct i2c_client *client,
1558{ 1516{
1559 struct v4l2_subdev *sd; 1517 struct v4l2_subdev *sd;
1560 struct ov7670_info *info; 1518 struct ov7670_info *info;
1519 int ret;
1561 1520
1562 info = kzalloc(sizeof(struct ov7670_info), GFP_KERNEL); 1521 info = kzalloc(sizeof(struct ov7670_info), GFP_KERNEL);
1563 if (info == NULL) 1522 if (info == NULL)
@@ -1565,6 +1524,37 @@ static int ov7670_probe(struct i2c_client *client,
1565 sd = &info->sd; 1524 sd = &info->sd;
1566 v4l2_i2c_subdev_init(sd, client, &ov7670_ops); 1525 v4l2_i2c_subdev_init(sd, client, &ov7670_ops);
1567 1526
1527 info->clock_speed = 30; /* default: a guess */
1528 if (client->dev.platform_data) {
1529 struct ov7670_config *config = client->dev.platform_data;
1530
1531 /*
1532 * Must apply configuration before initializing device, because it
1533 * selects I/O method.
1534 */
1535 info->min_width = config->min_width;
1536 info->min_height = config->min_height;
1537 info->use_smbus = config->use_smbus;
1538
1539 if (config->clock_speed)
1540 info->clock_speed = config->clock_speed;
1541 }
1542
1543 /* Make sure it's an ov7670 */
1544 ret = ov7670_detect(sd);
1545 if (ret) {
1546 v4l_dbg(1, debug, client,
1547 "chip found @ 0x%x (%s) is not an ov7670 chip.\n",
1548 client->addr << 1, client->adapter->name);
1549 kfree(info);
1550 return ret;
1551 }
1552 v4l_info(client, "chip found @ 0x%02x (%s)\n",
1553 client->addr << 1, client->adapter->name);
1554
1555 info->fmt = &ov7670_formats[0];
1556 info->sat = 128; /* Review this */
1557 info->clkrc = info->clock_speed / 30;
1568 return 0; 1558 return 0;
1569} 1559}
1570 1560
diff --git a/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h b/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
index ac94a8bf883e..305e6aaa844a 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
+++ b/drivers/media/video/pvrusb2/pvrusb2-hdw-internal.h
@@ -40,6 +40,7 @@
40#include "pvrusb2-io.h" 40#include "pvrusb2-io.h"
41#include <media/v4l2-device.h> 41#include <media/v4l2-device.h>
42#include <media/cx2341x.h> 42#include <media/cx2341x.h>
43#include <media/ir-kbd-i2c.h>
43#include "pvrusb2-devattr.h" 44#include "pvrusb2-devattr.h"
44 45
45/* Legal values for PVR2_CID_HSM */ 46/* Legal values for PVR2_CID_HSM */
@@ -202,6 +203,7 @@ struct pvr2_hdw {
202 203
203 /* IR related */ 204 /* IR related */
204 unsigned int ir_scheme_active; /* IR scheme as seen from the outside */ 205 unsigned int ir_scheme_active; /* IR scheme as seen from the outside */
206 struct IR_i2c_init_data ir_init_data; /* params passed to IR modules */
205 207
206 /* Frequency table */ 208 /* Frequency table */
207 unsigned int freqTable[FREQTABLE_SIZE]; 209 unsigned int freqTable[FREQTABLE_SIZE];
diff --git a/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c b/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c
index 7cbe18c4ca95..ccc884948f34 100644
--- a/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c
+++ b/drivers/media/video/pvrusb2/pvrusb2-i2c-core.c
@@ -19,6 +19,7 @@
19 */ 19 */
20 20
21#include <linux/i2c.h> 21#include <linux/i2c.h>
22#include <media/ir-kbd-i2c.h>
22#include "pvrusb2-i2c-core.h" 23#include "pvrusb2-i2c-core.h"
23#include "pvrusb2-hdw-internal.h" 24#include "pvrusb2-hdw-internal.h"
24#include "pvrusb2-debug.h" 25#include "pvrusb2-debug.h"
@@ -48,13 +49,6 @@ module_param_named(disable_autoload_ir_video, pvr2_disable_ir_video,
48MODULE_PARM_DESC(disable_autoload_ir_video, 49MODULE_PARM_DESC(disable_autoload_ir_video,
49 "1=do not try to autoload ir_video IR receiver"); 50 "1=do not try to autoload ir_video IR receiver");
50 51
51/* Mapping of IR schemes to known I2C addresses - if any */
52static const unsigned char ir_video_addresses[] = {
53 [PVR2_IR_SCHEME_ZILOG] = 0x71,
54 [PVR2_IR_SCHEME_29XXX] = 0x18,
55 [PVR2_IR_SCHEME_24XXX] = 0x18,
56};
57
58static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */ 52static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */
59 u8 i2c_addr, /* I2C address we're talking to */ 53 u8 i2c_addr, /* I2C address we're talking to */
60 u8 *data, /* Data to write */ 54 u8 *data, /* Data to write */
@@ -574,26 +568,56 @@ static void do_i2c_scan(struct pvr2_hdw *hdw)
574static void pvr2_i2c_register_ir(struct pvr2_hdw *hdw) 568static void pvr2_i2c_register_ir(struct pvr2_hdw *hdw)
575{ 569{
576 struct i2c_board_info info; 570 struct i2c_board_info info;
577 unsigned char addr = 0; 571 struct IR_i2c_init_data *init_data = &hdw->ir_init_data;
578 if (pvr2_disable_ir_video) { 572 if (pvr2_disable_ir_video) {
579 pvr2_trace(PVR2_TRACE_INFO, 573 pvr2_trace(PVR2_TRACE_INFO,
580 "Automatic binding of ir_video has been disabled."); 574 "Automatic binding of ir_video has been disabled.");
581 return; 575 return;
582 } 576 }
583 if (hdw->ir_scheme_active < ARRAY_SIZE(ir_video_addresses)) { 577 memset(&info, 0, sizeof(struct i2c_board_info));
584 addr = ir_video_addresses[hdw->ir_scheme_active]; 578 switch (hdw->ir_scheme_active) {
585 } 579 case PVR2_IR_SCHEME_24XXX: /* FX2-controlled IR */
586 if (!addr) { 580 case PVR2_IR_SCHEME_29XXX: /* Original 29xxx device */
581 init_data->ir_codes = RC_MAP_HAUPPAUGE_NEW;
582 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP;
583 init_data->type = RC_TYPE_RC5;
584 init_data->name = hdw->hdw_desc->description;
585 init_data->polling_interval = 100; /* ms From ir-kbd-i2c */
586 /* IR Receiver */
587 info.addr = 0x18;
588 info.platform_data = init_data;
589 strlcpy(info.type, "ir_video", I2C_NAME_SIZE);
590 pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.",
591 info.type, info.addr);
592 i2c_new_device(&hdw->i2c_adap, &info);
593 break;
594 case PVR2_IR_SCHEME_ZILOG: /* HVR-1950 style */
595 case PVR2_IR_SCHEME_24XXX_MCE: /* 24xxx MCE device */
596 init_data->ir_codes = RC_MAP_HAUPPAUGE_NEW;
597 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
598 init_data->type = RC_TYPE_RC5;
599 init_data->name = hdw->hdw_desc->description;
600 init_data->polling_interval = 260; /* ms From lirc_zilog */
601 /* IR Receiver */
602 info.addr = 0x71;
603 info.platform_data = init_data;
604 strlcpy(info.type, "ir_rx_z8f0811_haup", I2C_NAME_SIZE);
605 pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.",
606 info.type, info.addr);
607 i2c_new_device(&hdw->i2c_adap, &info);
608 /* IR Trasmitter */
609 info.addr = 0x70;
610 info.platform_data = init_data;
611 strlcpy(info.type, "ir_tx_z8f0811_haup", I2C_NAME_SIZE);
612 pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.",
613 info.type, info.addr);
614 i2c_new_device(&hdw->i2c_adap, &info);
615 break;
616 default:
587 /* The device either doesn't support I2C-based IR or we 617 /* The device either doesn't support I2C-based IR or we
588 don't know (yet) how to operate IR on the device. */ 618 don't know (yet) how to operate IR on the device. */
589 return; 619 break;
590 } 620 }
591 pvr2_trace(PVR2_TRACE_INFO,
592 "Binding ir_video to i2c address 0x%02x.", addr);
593 memset(&info, 0, sizeof(struct i2c_board_info));
594 strlcpy(info.type, "ir_video", I2C_NAME_SIZE);
595 info.addr = addr;
596 i2c_new_device(&hdw->i2c_adap, &info);
597} 621}
598 622
599void pvr2_i2c_core_init(struct pvr2_hdw *hdw) 623void pvr2_i2c_core_init(struct pvr2_hdw *hdw)
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c
index e7aa588c6c5a..deb8fcf4aa49 100644
--- a/drivers/media/video/saa7134/saa7134-cards.c
+++ b/drivers/media/video/saa7134/saa7134-cards.c
@@ -5179,18 +5179,8 @@ struct saa7134_board saa7134_boards[] = {
5179 [SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG] = { 5179 [SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG] = {
5180 .name = "Kworld PCI SBTVD/ISDB-T Full-Seg Hybrid", 5180 .name = "Kworld PCI SBTVD/ISDB-T Full-Seg Hybrid",
5181 .audio_clock = 0x00187de7, 5181 .audio_clock = 0x00187de7,
5182#if 0 5182 .tuner_type = TUNER_PHILIPS_TDA8290,
5183 /*
5184 * FIXME: Analog mode doesn't work, if digital is enabled. The proper
5185 * fix is to use tda8290 driver, but Kworld seems to use an
5186 * unsupported version of tda8295.
5187 */
5188 .tuner_type = TUNER_NXP_TDA18271, /* TUNER_PHILIPS_TDA8290 */
5189 .tuner_addr = 0x60,
5190#else
5191 .tuner_type = UNSET,
5192 .tuner_addr = ADDR_UNSET, 5183 .tuner_addr = ADDR_UNSET,
5193#endif
5194 .radio_type = UNSET, 5184 .radio_type = UNSET,
5195 .radio_addr = ADDR_UNSET, 5185 .radio_addr = ADDR_UNSET,
5196 .gpiomask = 0x8e054000, 5186 .gpiomask = 0x8e054000,
@@ -6932,10 +6922,17 @@ static inline int saa7134_kworld_sbtvd_toggle_agc(struct saa7134_dev *dev,
6932 /* toggle AGC switch through GPIO 27 */ 6922 /* toggle AGC switch through GPIO 27 */
6933 switch (mode) { 6923 switch (mode) {
6934 case TDA18271_ANALOG: 6924 case TDA18271_ANALOG:
6935 saa7134_set_gpio(dev, 27, 0); 6925 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x4000);
6926 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x4000);
6927 msleep(20);
6936 break; 6928 break;
6937 case TDA18271_DIGITAL: 6929 case TDA18271_DIGITAL:
6938 saa7134_set_gpio(dev, 27, 1); 6930 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x14000);
6931 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x14000);
6932 msleep(20);
6933 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x54000);
6934 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x54000);
6935 msleep(30);
6939 break; 6936 break;
6940 default: 6937 default:
6941 return -EINVAL; 6938 return -EINVAL;
@@ -6993,6 +6990,7 @@ static int saa7134_tda8290_callback(struct saa7134_dev *dev,
6993int saa7134_tuner_callback(void *priv, int component, int command, int arg) 6990int saa7134_tuner_callback(void *priv, int component, int command, int arg)
6994{ 6991{
6995 struct saa7134_dev *dev = priv; 6992 struct saa7134_dev *dev = priv;
6993
6996 if (dev != NULL) { 6994 if (dev != NULL) {
6997 switch (dev->tuner_type) { 6995 switch (dev->tuner_type) {
6998 case TUNER_PHILIPS_TDA8290: 6996 case TUNER_PHILIPS_TDA8290:
@@ -7659,36 +7657,11 @@ int saa7134_board_init2(struct saa7134_dev *dev)
7659 break; 7657 break;
7660 } 7658 }
7661 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG: 7659 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG:
7662 {
7663 struct i2c_msg msg = { .addr = 0x4b, .flags = 0 };
7664 int i;
7665 static u8 buffer[][2] = {
7666 {0x30, 0x31},
7667 {0xff, 0x00},
7668 {0x41, 0x03},
7669 {0x41, 0x1a},
7670 {0xff, 0x02},
7671 {0x34, 0x00},
7672 {0x45, 0x97},
7673 {0x45, 0xc1},
7674 };
7675 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x4000); 7660 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x4000);
7676 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x4000); 7661 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x4000);
7677 7662
7678 /* 7663 saa7134_set_gpio(dev, 27, 0);
7679 * FIXME: identify what device is at addr 0x4b and what means
7680 * this initialization
7681 */
7682 for (i = 0; i < ARRAY_SIZE(buffer); i++) {
7683 msg.buf = &buffer[i][0];
7684 msg.len = ARRAY_SIZE(buffer[0]);
7685 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1)
7686 printk(KERN_WARNING
7687 "%s: Unable to enable tuner(%i).\n",
7688 dev->name, i);
7689 }
7690 break; 7664 break;
7691 }
7692 } /* switch() */ 7665 } /* switch() */
7693 7666
7694 /* initialize tuner */ 7667 /* initialize tuner */
diff --git a/drivers/media/video/saa7134/saa7134-dvb.c b/drivers/media/video/saa7134/saa7134-dvb.c
index 3315a48a848b..f65cad287b83 100644
--- a/drivers/media/video/saa7134/saa7134-dvb.c
+++ b/drivers/media/video/saa7134/saa7134-dvb.c
@@ -237,12 +237,39 @@ static struct tda18271_std_map mb86a20s_tda18271_std_map = {
237static struct tda18271_config kworld_tda18271_config = { 237static struct tda18271_config kworld_tda18271_config = {
238 .std_map = &mb86a20s_tda18271_std_map, 238 .std_map = &mb86a20s_tda18271_std_map,
239 .gate = TDA18271_GATE_DIGITAL, 239 .gate = TDA18271_GATE_DIGITAL,
240 .config = 3, /* Use tuner callback for AGC */
241
240}; 242};
241 243
242static const struct mb86a20s_config kworld_mb86a20s_config = { 244static const struct mb86a20s_config kworld_mb86a20s_config = {
243 .demod_address = 0x10, 245 .demod_address = 0x10,
244}; 246};
245 247
248static int kworld_sbtvd_gate_ctrl(struct dvb_frontend* fe, int enable)
249{
250 struct saa7134_dev *dev = fe->dvb->priv;
251
252 unsigned char initmsg[] = {0x45, 0x97};
253 unsigned char msg_enable[] = {0x45, 0xc1};
254 unsigned char msg_disable[] = {0x45, 0x81};
255 struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2};
256
257 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
258 wprintk("could not access the I2C gate\n");
259 return -EIO;
260 }
261 if (enable)
262 msg.buf = msg_enable;
263 else
264 msg.buf = msg_disable;
265 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
266 wprintk("could not access the I2C gate\n");
267 return -EIO;
268 }
269 msleep(20);
270 return 0;
271}
272
246/* ================================================================== 273/* ==================================================================
247 * tda1004x based DVB-T cards, helper functions 274 * tda1004x based DVB-T cards, helper functions
248 */ 275 */
@@ -623,37 +650,6 @@ static struct tda827x_config tda827x_cfg_2_sw42 = {
623 650
624/* ------------------------------------------------------------------ */ 651/* ------------------------------------------------------------------ */
625 652
626static int __kworld_sbtvd_i2c_gate_ctrl(struct saa7134_dev *dev, int enable)
627{
628 unsigned char initmsg[] = {0x45, 0x97};
629 unsigned char msg_enable[] = {0x45, 0xc1};
630 unsigned char msg_disable[] = {0x45, 0x81};
631 struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2};
632
633 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
634 wprintk("could not access the I2C gate\n");
635 return -EIO;
636 }
637 if (enable)
638 msg.buf = msg_enable;
639 else
640 msg.buf = msg_disable;
641 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
642 wprintk("could not access the I2C gate\n");
643 return -EIO;
644 }
645 msleep(20);
646 return 0;
647}
648static int kworld_sbtvd_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
649{
650 struct saa7134_dev *dev = fe->dvb->priv;
651
652 return __kworld_sbtvd_i2c_gate_ctrl(dev, enable);
653}
654
655/* ------------------------------------------------------------------ */
656
657static struct tda1004x_config tda827x_lifeview_config = { 653static struct tda1004x_config tda827x_lifeview_config = {
658 .demod_address = 0x08, 654 .demod_address = 0x08,
659 .invert = 1, 655 .invert = 1,
@@ -1660,27 +1656,23 @@ static int dvb_init(struct saa7134_dev *dev)
1660 } 1656 }
1661 break; 1657 break;
1662 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG: 1658 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG:
1663 __kworld_sbtvd_i2c_gate_ctrl(dev, 0); 1659 /* Switch to digital mode */
1664 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x14000); 1660 saa7134_tuner_callback(dev, 0,
1665 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x14000); 1661 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
1666 msleep(20);
1667 saa_writel(SAA7134_GPIO_GPMODE0 >> 2, 0x54000);
1668 saa_writel(SAA7134_GPIO_GPSTATUS0 >> 2, 0x54000);
1669 msleep(20);
1670 fe0->dvb.frontend = dvb_attach(mb86a20s_attach, 1662 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1671 &kworld_mb86a20s_config, 1663 &kworld_mb86a20s_config,
1672 &dev->i2c_adap); 1664 &dev->i2c_adap);
1673 __kworld_sbtvd_i2c_gate_ctrl(dev, 1);
1674 if (fe0->dvb.frontend != NULL) { 1665 if (fe0->dvb.frontend != NULL) {
1666 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1667 &dev->i2c_adap, 0x4b,
1668 &tda829x_no_probe);
1675 dvb_attach(tda18271_attach, fe0->dvb.frontend, 1669 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1676 0x60, &dev->i2c_adap, 1670 0x60, &dev->i2c_adap,
1677 &kworld_tda18271_config); 1671 &kworld_tda18271_config);
1678 /* 1672 fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_gate_ctrl;
1679 * Only after success, it can initialize the gate, otherwise
1680 * an OOPS will hit, due to kfree(fe0->dvb.frontend)
1681 */
1682 fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_i2c_gate_ctrl;
1683 } 1673 }
1674
1675 /* mb86a20s need to use the I2C gateway */
1684 break; 1676 break;
1685 default: 1677 default:
1686 wprintk("Huh? unknown DVB card?\n"); 1678 wprintk("Huh? unknown DVB card?\n");
diff --git a/drivers/media/video/sn9c102/sn9c102_devtable.h b/drivers/media/video/sn9c102/sn9c102_devtable.h
index 41064c7b5ef8..b3d2cc729657 100644
--- a/drivers/media/video/sn9c102/sn9c102_devtable.h
+++ b/drivers/media/video/sn9c102/sn9c102_devtable.h
@@ -47,8 +47,8 @@ static const struct usb_device_id sn9c102_id_table[] = {
47 { SN9C102_USB_DEVICE(0x0c45, 0x6009, BRIDGE_SN9C102), }, 47 { SN9C102_USB_DEVICE(0x0c45, 0x6009, BRIDGE_SN9C102), },
48 { SN9C102_USB_DEVICE(0x0c45, 0x600d, BRIDGE_SN9C102), }, 48 { SN9C102_USB_DEVICE(0x0c45, 0x600d, BRIDGE_SN9C102), },
49/* { SN9C102_USB_DEVICE(0x0c45, 0x6011, BRIDGE_SN9C102), }, OV6650 */ 49/* { SN9C102_USB_DEVICE(0x0c45, 0x6011, BRIDGE_SN9C102), }, OV6650 */
50#endif
51 { SN9C102_USB_DEVICE(0x0c45, 0x6019, BRIDGE_SN9C102), }, 50 { SN9C102_USB_DEVICE(0x0c45, 0x6019, BRIDGE_SN9C102), },
51#endif
52 { SN9C102_USB_DEVICE(0x0c45, 0x6024, BRIDGE_SN9C102), }, 52 { SN9C102_USB_DEVICE(0x0c45, 0x6024, BRIDGE_SN9C102), },
53 { SN9C102_USB_DEVICE(0x0c45, 0x6025, BRIDGE_SN9C102), }, 53 { SN9C102_USB_DEVICE(0x0c45, 0x6025, BRIDGE_SN9C102), },
54#if !defined CONFIG_USB_GSPCA_SONIXB && !defined CONFIG_USB_GSPCA_SONIXB_MODULE 54#if !defined CONFIG_USB_GSPCA_SONIXB && !defined CONFIG_USB_GSPCA_SONIXB_MODULE
@@ -56,78 +56,68 @@ static const struct usb_device_id sn9c102_id_table[] = {
56 { SN9C102_USB_DEVICE(0x0c45, 0x6029, BRIDGE_SN9C102), }, 56 { SN9C102_USB_DEVICE(0x0c45, 0x6029, BRIDGE_SN9C102), },
57 { SN9C102_USB_DEVICE(0x0c45, 0x602a, BRIDGE_SN9C102), }, 57 { SN9C102_USB_DEVICE(0x0c45, 0x602a, BRIDGE_SN9C102), },
58#endif 58#endif
59 { SN9C102_USB_DEVICE(0x0c45, 0x602b, BRIDGE_SN9C102), }, 59 { SN9C102_USB_DEVICE(0x0c45, 0x602b, BRIDGE_SN9C102), }, /* not in sonixb */
60#if !defined CONFIG_USB_GSPCA_SONIXB && !defined CONFIG_USB_GSPCA_SONIXB_MODULE 60#if !defined CONFIG_USB_GSPCA_SONIXB && !defined CONFIG_USB_GSPCA_SONIXB_MODULE
61 { SN9C102_USB_DEVICE(0x0c45, 0x602c, BRIDGE_SN9C102), }, 61 { SN9C102_USB_DEVICE(0x0c45, 0x602c, BRIDGE_SN9C102), },
62/* { SN9C102_USB_DEVICE(0x0c45, 0x602d, BRIDGE_SN9C102), }, HV7131R */ 62/* { SN9C102_USB_DEVICE(0x0c45, 0x602d, BRIDGE_SN9C102), }, HV7131R */
63 { SN9C102_USB_DEVICE(0x0c45, 0x602e, BRIDGE_SN9C102), }, 63 { SN9C102_USB_DEVICE(0x0c45, 0x602e, BRIDGE_SN9C102), },
64#endif 64#endif
65 { SN9C102_USB_DEVICE(0x0c45, 0x6030, BRIDGE_SN9C102), }, 65 { SN9C102_USB_DEVICE(0x0c45, 0x6030, BRIDGE_SN9C102), }, /* not in sonixb */
66 /* SN9C103 */ 66 /* SN9C103 */
67 { SN9C102_USB_DEVICE(0x0c45, 0x6080, BRIDGE_SN9C103), }, 67/* { SN9C102_USB_DEVICE(0x0c45, 0x6080, BRIDGE_SN9C103), }, non existent ? */
68 { SN9C102_USB_DEVICE(0x0c45, 0x6082, BRIDGE_SN9C103), }, 68 { SN9C102_USB_DEVICE(0x0c45, 0x6082, BRIDGE_SN9C103), }, /* not in sonixb */
69#if !defined CONFIG_USB_GSPCA_SONIXB && !defined CONFIG_USB_GSPCA_SONIXB_MODULE
69/* { SN9C102_USB_DEVICE(0x0c45, 0x6083, BRIDGE_SN9C103), }, HY7131D/E */ 70/* { SN9C102_USB_DEVICE(0x0c45, 0x6083, BRIDGE_SN9C103), }, HY7131D/E */
70 { SN9C102_USB_DEVICE(0x0c45, 0x6088, BRIDGE_SN9C103), }, 71/* { SN9C102_USB_DEVICE(0x0c45, 0x6088, BRIDGE_SN9C103), }, non existent ? */
71 { SN9C102_USB_DEVICE(0x0c45, 0x608a, BRIDGE_SN9C103), }, 72/* { SN9C102_USB_DEVICE(0x0c45, 0x608a, BRIDGE_SN9C103), }, non existent ? */
72 { SN9C102_USB_DEVICE(0x0c45, 0x608b, BRIDGE_SN9C103), }, 73/* { SN9C102_USB_DEVICE(0x0c45, 0x608b, BRIDGE_SN9C103), }, non existent ? */
73 { SN9C102_USB_DEVICE(0x0c45, 0x608c, BRIDGE_SN9C103), }, 74 { SN9C102_USB_DEVICE(0x0c45, 0x608c, BRIDGE_SN9C103), },
74/* { SN9C102_USB_DEVICE(0x0c45, 0x608e, BRIDGE_SN9C103), }, CISVF10 */ 75/* { SN9C102_USB_DEVICE(0x0c45, 0x608e, BRIDGE_SN9C103), }, CISVF10 */
75#if !defined CONFIG_USB_GSPCA_SONIXB && !defined CONFIG_USB_GSPCA_SONIXB_MODULE
76 { SN9C102_USB_DEVICE(0x0c45, 0x608f, BRIDGE_SN9C103), }, 76 { SN9C102_USB_DEVICE(0x0c45, 0x608f, BRIDGE_SN9C103), },
77#endif 77/* { SN9C102_USB_DEVICE(0x0c45, 0x60a0, BRIDGE_SN9C103), }, non existent ? */
78 { SN9C102_USB_DEVICE(0x0c45, 0x60a0, BRIDGE_SN9C103), }, 78/* { SN9C102_USB_DEVICE(0x0c45, 0x60a2, BRIDGE_SN9C103), }, non existent ? */
79 { SN9C102_USB_DEVICE(0x0c45, 0x60a2, BRIDGE_SN9C103), }, 79/* { SN9C102_USB_DEVICE(0x0c45, 0x60a3, BRIDGE_SN9C103), }, non existent ? */
80 { SN9C102_USB_DEVICE(0x0c45, 0x60a3, BRIDGE_SN9C103), },
81/* { SN9C102_USB_DEVICE(0x0c45, 0x60a8, BRIDGE_SN9C103), }, PAS106 */ 80/* { SN9C102_USB_DEVICE(0x0c45, 0x60a8, BRIDGE_SN9C103), }, PAS106 */
82/* { SN9C102_USB_DEVICE(0x0c45, 0x60aa, BRIDGE_SN9C103), }, TAS5130 */ 81/* { SN9C102_USB_DEVICE(0x0c45, 0x60aa, BRIDGE_SN9C103), }, TAS5130 */
83/* { SN9C102_USB_DEVICE(0x0c45, 0x60ab, BRIDGE_SN9C103), }, TAS5130 */ 82/* { SN9C102_USB_DEVICE(0x0c45, 0x60ab, BRIDGE_SN9C103), }, TAS5110, non existent */
84 { SN9C102_USB_DEVICE(0x0c45, 0x60ac, BRIDGE_SN9C103), }, 83/* { SN9C102_USB_DEVICE(0x0c45, 0x60ac, BRIDGE_SN9C103), }, non existent ? */
85 { SN9C102_USB_DEVICE(0x0c45, 0x60ae, BRIDGE_SN9C103), }, 84/* { SN9C102_USB_DEVICE(0x0c45, 0x60ae, BRIDGE_SN9C103), }, non existent ? */
86 { SN9C102_USB_DEVICE(0x0c45, 0x60af, BRIDGE_SN9C103), }, 85 { SN9C102_USB_DEVICE(0x0c45, 0x60af, BRIDGE_SN9C103), },
87#if !defined CONFIG_USB_GSPCA_SONIXB && !defined CONFIG_USB_GSPCA_SONIXB_MODULE
88 { SN9C102_USB_DEVICE(0x0c45, 0x60b0, BRIDGE_SN9C103), }, 86 { SN9C102_USB_DEVICE(0x0c45, 0x60b0, BRIDGE_SN9C103), },
87/* { SN9C102_USB_DEVICE(0x0c45, 0x60b2, BRIDGE_SN9C103), }, non existent ? */
88/* { SN9C102_USB_DEVICE(0x0c45, 0x60b3, BRIDGE_SN9C103), }, non existent ? */
89/* { SN9C102_USB_DEVICE(0x0c45, 0x60b8, BRIDGE_SN9C103), }, non existent ? */
90/* { SN9C102_USB_DEVICE(0x0c45, 0x60ba, BRIDGE_SN9C103), }, non existent ? */
91/* { SN9C102_USB_DEVICE(0x0c45, 0x60bb, BRIDGE_SN9C103), }, non existent ? */
92/* { SN9C102_USB_DEVICE(0x0c45, 0x60bc, BRIDGE_SN9C103), }, non existent ? */
93/* { SN9C102_USB_DEVICE(0x0c45, 0x60be, BRIDGE_SN9C103), }, non existent ? */
89#endif 94#endif
90 { SN9C102_USB_DEVICE(0x0c45, 0x60b2, BRIDGE_SN9C103), },
91 { SN9C102_USB_DEVICE(0x0c45, 0x60b3, BRIDGE_SN9C103), },
92 { SN9C102_USB_DEVICE(0x0c45, 0x60b8, BRIDGE_SN9C103), },
93 { SN9C102_USB_DEVICE(0x0c45, 0x60ba, BRIDGE_SN9C103), },
94 { SN9C102_USB_DEVICE(0x0c45, 0x60bb, BRIDGE_SN9C103), },
95 { SN9C102_USB_DEVICE(0x0c45, 0x60bc, BRIDGE_SN9C103), },
96 { SN9C102_USB_DEVICE(0x0c45, 0x60be, BRIDGE_SN9C103), },
97 /* SN9C105 */ 95 /* SN9C105 */
98#if !defined CONFIG_USB_GSPCA_SONIXJ && !defined CONFIG_USB_GSPCA_SONIXJ_MODULE 96#if !defined CONFIG_USB_GSPCA_SONIXJ && !defined CONFIG_USB_GSPCA_SONIXJ_MODULE
99 { SN9C102_USB_DEVICE(0x045e, 0x00f5, BRIDGE_SN9C105), }, 97 { SN9C102_USB_DEVICE(0x045e, 0x00f5, BRIDGE_SN9C105), },
100 { SN9C102_USB_DEVICE(0x045e, 0x00f7, BRIDGE_SN9C105), }, 98 { SN9C102_USB_DEVICE(0x045e, 0x00f7, BRIDGE_SN9C105), },
101 { SN9C102_USB_DEVICE(0x0471, 0x0327, BRIDGE_SN9C105), }, 99 { SN9C102_USB_DEVICE(0x0471, 0x0327, BRIDGE_SN9C105), },
102 { SN9C102_USB_DEVICE(0x0471, 0x0328, BRIDGE_SN9C105), }, 100 { SN9C102_USB_DEVICE(0x0471, 0x0328, BRIDGE_SN9C105), },
103#endif
104 { SN9C102_USB_DEVICE(0x0c45, 0x60c0, BRIDGE_SN9C105), }, 101 { SN9C102_USB_DEVICE(0x0c45, 0x60c0, BRIDGE_SN9C105), },
105 { SN9C102_USB_DEVICE(0x0c45, 0x60c2, BRIDGE_SN9C105), }, 102/* { SN9C102_USB_DEVICE(0x0c45, 0x60c2, BRIDGE_SN9C105), }, PO1030 */
106 { SN9C102_USB_DEVICE(0x0c45, 0x60c8, BRIDGE_SN9C105), }, 103/* { SN9C102_USB_DEVICE(0x0c45, 0x60c8, BRIDGE_SN9C105), }, OM6801 */
107 { SN9C102_USB_DEVICE(0x0c45, 0x60cc, BRIDGE_SN9C105), }, 104/* { SN9C102_USB_DEVICE(0x0c45, 0x60cc, BRIDGE_SN9C105), }, HV7131GP */
108 { SN9C102_USB_DEVICE(0x0c45, 0x60ea, BRIDGE_SN9C105), }, 105/* { SN9C102_USB_DEVICE(0x0c45, 0x60ea, BRIDGE_SN9C105), }, non existent ? */
109 { SN9C102_USB_DEVICE(0x0c45, 0x60ec, BRIDGE_SN9C105), }, 106/* { SN9C102_USB_DEVICE(0x0c45, 0x60ec, BRIDGE_SN9C105), }, MO4000 */
110 { SN9C102_USB_DEVICE(0x0c45, 0x60ef, BRIDGE_SN9C105), }, 107/* { SN9C102_USB_DEVICE(0x0c45, 0x60ef, BRIDGE_SN9C105), }, ICM105C */
111 { SN9C102_USB_DEVICE(0x0c45, 0x60fa, BRIDGE_SN9C105), }, 108/* { SN9C102_USB_DEVICE(0x0c45, 0x60fa, BRIDGE_SN9C105), }, OV7648 */
112 { SN9C102_USB_DEVICE(0x0c45, 0x60fb, BRIDGE_SN9C105), }, 109 { SN9C102_USB_DEVICE(0x0c45, 0x60fb, BRIDGE_SN9C105), },
113 { SN9C102_USB_DEVICE(0x0c45, 0x60fc, BRIDGE_SN9C105), }, 110 { SN9C102_USB_DEVICE(0x0c45, 0x60fc, BRIDGE_SN9C105), },
114 { SN9C102_USB_DEVICE(0x0c45, 0x60fe, BRIDGE_SN9C105), }, 111 { SN9C102_USB_DEVICE(0x0c45, 0x60fe, BRIDGE_SN9C105), },
115 /* SN9C120 */ 112 /* SN9C120 */
116 { SN9C102_USB_DEVICE(0x0458, 0x7025, BRIDGE_SN9C120), }, 113 { SN9C102_USB_DEVICE(0x0458, 0x7025, BRIDGE_SN9C120), },
117#if !defined CONFIG_USB_GSPCA_SONIXJ && !defined CONFIG_USB_GSPCA_SONIXJ_MODULE 114/* { SN9C102_USB_DEVICE(0x0c45, 0x6102, BRIDGE_SN9C120), }, po2030 */
118 { SN9C102_USB_DEVICE(0x0c45, 0x6102, BRIDGE_SN9C120), }, 115/* { SN9C102_USB_DEVICE(0x0c45, 0x6108, BRIDGE_SN9C120), }, om6801 */
119#endif 116/* { SN9C102_USB_DEVICE(0x0c45, 0x610f, BRIDGE_SN9C120), }, S5K53BEB */
120 { SN9C102_USB_DEVICE(0x0c45, 0x6108, BRIDGE_SN9C120), },
121 { SN9C102_USB_DEVICE(0x0c45, 0x610f, BRIDGE_SN9C120), },
122#if !defined CONFIG_USB_GSPCA_SONIXJ && !defined CONFIG_USB_GSPCA_SONIXJ_MODULE
123 { SN9C102_USB_DEVICE(0x0c45, 0x6130, BRIDGE_SN9C120), }, 117 { SN9C102_USB_DEVICE(0x0c45, 0x6130, BRIDGE_SN9C120), },
124#endif
125/* { SN9C102_USB_DEVICE(0x0c45, 0x6138, BRIDGE_SN9C120), }, MO8000 */ 118/* { SN9C102_USB_DEVICE(0x0c45, 0x6138, BRIDGE_SN9C120), }, MO8000 */
126#if !defined CONFIG_USB_GSPCA_SONIXJ && !defined CONFIG_USB_GSPCA_SONIXJ_MODULE
127 { SN9C102_USB_DEVICE(0x0c45, 0x613a, BRIDGE_SN9C120), }, 119 { SN9C102_USB_DEVICE(0x0c45, 0x613a, BRIDGE_SN9C120), },
128#endif
129 { SN9C102_USB_DEVICE(0x0c45, 0x613b, BRIDGE_SN9C120), }, 120 { SN9C102_USB_DEVICE(0x0c45, 0x613b, BRIDGE_SN9C120), },
130#if !defined CONFIG_USB_GSPCA_SONIXJ && !defined CONFIG_USB_GSPCA_SONIXJ_MODULE
131 { SN9C102_USB_DEVICE(0x0c45, 0x613c, BRIDGE_SN9C120), }, 121 { SN9C102_USB_DEVICE(0x0c45, 0x613c, BRIDGE_SN9C120), },
132 { SN9C102_USB_DEVICE(0x0c45, 0x613e, BRIDGE_SN9C120), }, 122 { SN9C102_USB_DEVICE(0x0c45, 0x613e, BRIDGE_SN9C120), },
133#endif 123#endif
diff --git a/drivers/media/video/sr030pc30.c b/drivers/media/video/sr030pc30.c
index 864696b7a006..c901721a1db3 100644
--- a/drivers/media/video/sr030pc30.c
+++ b/drivers/media/video/sr030pc30.c
@@ -714,15 +714,6 @@ static int sr030pc30_base_config(struct v4l2_subdev *sd)
714 return ret; 714 return ret;
715} 715}
716 716
717static int sr030pc30_s_config(struct v4l2_subdev *sd,
718 int irq, void *platform_data)
719{
720 struct sr030pc30_info *info = to_sr030pc30(sd);
721
722 info->pdata = platform_data;
723 return 0;
724}
725
726static int sr030pc30_s_stream(struct v4l2_subdev *sd, int enable) 717static int sr030pc30_s_stream(struct v4l2_subdev *sd, int enable)
727{ 718{
728 return 0; 719 return 0;
@@ -763,7 +754,6 @@ static int sr030pc30_s_power(struct v4l2_subdev *sd, int on)
763} 754}
764 755
765static const struct v4l2_subdev_core_ops sr030pc30_core_ops = { 756static const struct v4l2_subdev_core_ops sr030pc30_core_ops = {
766 .s_config = sr030pc30_s_config,
767 .s_power = sr030pc30_s_power, 757 .s_power = sr030pc30_s_power,
768 .queryctrl = sr030pc30_queryctrl, 758 .queryctrl = sr030pc30_queryctrl,
769 .s_ctrl = sr030pc30_s_ctrl, 759 .s_ctrl = sr030pc30_s_ctrl,
diff --git a/drivers/media/video/tda9875.c b/drivers/media/video/tda9875.c
deleted file mode 100644
index 35b6ff5db319..000000000000
--- a/drivers/media/video/tda9875.c
+++ /dev/null
@@ -1,411 +0,0 @@
1/*
2 * For the TDA9875 chip
3 * (The TDA9875 is used on the Diamond DTV2000 french version
4 * Other cards probably use these chips as well.)
5 * This driver will not complain if used with any
6 * other i2c device with the same address.
7 *
8 * Copyright (c) 2000 Guillaume Delvit based on Gerd Knorr source and
9 * Eric Sandeen
10 * Copyright (c) 2006 Mauro Carvalho Chehab <mchehab@infradead.org>
11 * This code is placed under the terms of the GNU General Public License
12 * Based on tda9855.c by Steve VanDeBogart (vandebo@uclink.berkeley.edu)
13 * Which was based on tda8425.c by Greg Alexander (c) 1998
14 *
15 * OPTIONS:
16 * debug - set to 1 if you'd like to see debug messages
17 *
18 * Revision: 0.1 - original version
19 */
20
21#include <linux/module.h>
22#include <linux/kernel.h>
23#include <linux/string.h>
24#include <linux/timer.h>
25#include <linux/delay.h>
26#include <linux/errno.h>
27#include <linux/slab.h>
28#include <linux/i2c.h>
29#include <linux/videodev2.h>
30#include <media/v4l2-device.h>
31#include <media/i2c-addr.h>
32
33static int debug; /* insmod parameter */
34module_param(debug, int, S_IRUGO | S_IWUSR);
35MODULE_LICENSE("GPL");
36
37
38/* This is a superset of the TDA9875 */
39struct tda9875 {
40 struct v4l2_subdev sd;
41 int rvol, lvol;
42 int bass, treble;
43};
44
45static inline struct tda9875 *to_state(struct v4l2_subdev *sd)
46{
47 return container_of(sd, struct tda9875, sd);
48}
49
50#define dprintk if (debug) printk
51
52/* The TDA9875 is made by Philips Semiconductor
53 * http://www.semiconductors.philips.com
54 * TDA9875: I2C-bus controlled DSP audio processor, FM demodulator
55 *
56 */
57
58 /* subaddresses for TDA9875 */
59#define TDA9875_MUT 0x12 /*General mute (value --> 0b11001100*/
60#define TDA9875_CFG 0x01 /* Config register (value --> 0b00000000 */
61#define TDA9875_DACOS 0x13 /*DAC i/o select (ADC) 0b0000100*/
62#define TDA9875_LOSR 0x16 /*Line output select regirter 0b0100 0001*/
63
64#define TDA9875_CH1V 0x0c /*Channel 1 volume (mute)*/
65#define TDA9875_CH2V 0x0d /*Channel 2 volume (mute)*/
66#define TDA9875_SC1 0x14 /*SCART 1 in (mono)*/
67#define TDA9875_SC2 0x15 /*SCART 2 in (mono)*/
68
69#define TDA9875_ADCIS 0x17 /*ADC input select (mono) 0b0110 000*/
70#define TDA9875_AER 0x19 /*Audio effect (AVL+Pseudo) 0b0000 0110*/
71#define TDA9875_MCS 0x18 /*Main channel select (DAC) 0b0000100*/
72#define TDA9875_MVL 0x1a /* Main volume gauche */
73#define TDA9875_MVR 0x1b /* Main volume droite */
74#define TDA9875_MBA 0x1d /* Main Basse */
75#define TDA9875_MTR 0x1e /* Main treble */
76#define TDA9875_ACS 0x1f /* Auxilary channel select (FM) 0b0000000*/
77#define TDA9875_AVL 0x20 /* Auxilary volume gauche */
78#define TDA9875_AVR 0x21 /* Auxilary volume droite */
79#define TDA9875_ABA 0x22 /* Auxilary Basse */
80#define TDA9875_ATR 0x23 /* Auxilary treble */
81
82#define TDA9875_MSR 0x02 /* Monitor select register */
83#define TDA9875_C1MSB 0x03 /* Carrier 1 (FM) frequency register MSB */
84#define TDA9875_C1MIB 0x04 /* Carrier 1 (FM) frequency register (16-8]b */
85#define TDA9875_C1LSB 0x05 /* Carrier 1 (FM) frequency register LSB */
86#define TDA9875_C2MSB 0x06 /* Carrier 2 (nicam) frequency register MSB */
87#define TDA9875_C2MIB 0x07 /* Carrier 2 (nicam) frequency register (16-8]b */
88#define TDA9875_C2LSB 0x08 /* Carrier 2 (nicam) frequency register LSB */
89#define TDA9875_DCR 0x09 /* Demodulateur configuration regirter*/
90#define TDA9875_DEEM 0x0a /* FM de-emphasis regirter*/
91#define TDA9875_FMAT 0x0b /* FM Matrix regirter*/
92
93/* values */
94#define TDA9875_MUTE_ON 0xff /* general mute */
95#define TDA9875_MUTE_OFF 0xcc /* general no mute */
96
97
98
99/* Begin code */
100
101static int tda9875_write(struct v4l2_subdev *sd, int subaddr, unsigned char val)
102{
103 struct i2c_client *client = v4l2_get_subdevdata(sd);
104 unsigned char buffer[2];
105
106 v4l2_dbg(1, debug, sd, "Writing %d 0x%x\n", subaddr, val);
107 buffer[0] = subaddr;
108 buffer[1] = val;
109 if (2 != i2c_master_send(client, buffer, 2)) {
110 v4l2_warn(sd, "I/O error, trying (write %d 0x%x)\n",
111 subaddr, val);
112 return -1;
113 }
114 return 0;
115}
116
117
118static int i2c_read_register(struct i2c_client *client, int addr, int reg)
119{
120 unsigned char write[1];
121 unsigned char read[1];
122 struct i2c_msg msgs[2] = {
123 { addr, 0, 1, write },
124 { addr, I2C_M_RD, 1, read }
125 };
126
127 write[0] = reg;
128
129 if (2 != i2c_transfer(client->adapter, msgs, 2)) {
130 v4l_warn(client, "I/O error (read2)\n");
131 return -1;
132 }
133 v4l_dbg(1, debug, client, "chip_read2: reg%d=0x%x\n", reg, read[0]);
134 return read[0];
135}
136
137static void tda9875_set(struct v4l2_subdev *sd)
138{
139 struct tda9875 *tda = to_state(sd);
140 unsigned char a;
141
142 v4l2_dbg(1, debug, sd, "tda9875_set(%04x,%04x,%04x,%04x)\n",
143 tda->lvol, tda->rvol, tda->bass, tda->treble);
144
145 a = tda->lvol & 0xff;
146 tda9875_write(sd, TDA9875_MVL, a);
147 a =tda->rvol & 0xff;
148 tda9875_write(sd, TDA9875_MVR, a);
149 a =tda->bass & 0xff;
150 tda9875_write(sd, TDA9875_MBA, a);
151 a =tda->treble & 0xff;
152 tda9875_write(sd, TDA9875_MTR, a);
153}
154
155static void do_tda9875_init(struct v4l2_subdev *sd)
156{
157 struct tda9875 *t = to_state(sd);
158
159 v4l2_dbg(1, debug, sd, "In tda9875_init\n");
160 tda9875_write(sd, TDA9875_CFG, 0xd0); /*reg de config 0 (reset)*/
161 tda9875_write(sd, TDA9875_MSR, 0x03); /* Monitor 0b00000XXX*/
162 tda9875_write(sd, TDA9875_C1MSB, 0x00); /*Car1(FM) MSB XMHz*/
163 tda9875_write(sd, TDA9875_C1MIB, 0x00); /*Car1(FM) MIB XMHz*/
164 tda9875_write(sd, TDA9875_C1LSB, 0x00); /*Car1(FM) LSB XMHz*/
165 tda9875_write(sd, TDA9875_C2MSB, 0x00); /*Car2(NICAM) MSB XMHz*/
166 tda9875_write(sd, TDA9875_C2MIB, 0x00); /*Car2(NICAM) MIB XMHz*/
167 tda9875_write(sd, TDA9875_C2LSB, 0x00); /*Car2(NICAM) LSB XMHz*/
168 tda9875_write(sd, TDA9875_DCR, 0x00); /*Demod config 0x00*/
169 tda9875_write(sd, TDA9875_DEEM, 0x44); /*DE-Emph 0b0100 0100*/
170 tda9875_write(sd, TDA9875_FMAT, 0x00); /*FM Matrix reg 0x00*/
171 tda9875_write(sd, TDA9875_SC1, 0x00); /* SCART 1 (SC1)*/
172 tda9875_write(sd, TDA9875_SC2, 0x01); /* SCART 2 (sc2)*/
173
174 tda9875_write(sd, TDA9875_CH1V, 0x10); /* Channel volume 1 mute*/
175 tda9875_write(sd, TDA9875_CH2V, 0x10); /* Channel volume 2 mute */
176 tda9875_write(sd, TDA9875_DACOS, 0x02); /* sig DAC i/o(in:nicam)*/
177 tda9875_write(sd, TDA9875_ADCIS, 0x6f); /* sig ADC input(in:mono)*/
178 tda9875_write(sd, TDA9875_LOSR, 0x00); /* line out (in:mono)*/
179 tda9875_write(sd, TDA9875_AER, 0x00); /*06 Effect (AVL+PSEUDO) */
180 tda9875_write(sd, TDA9875_MCS, 0x44); /* Main ch select (DAC) */
181 tda9875_write(sd, TDA9875_MVL, 0x03); /* Vol Main left 10dB */
182 tda9875_write(sd, TDA9875_MVR, 0x03); /* Vol Main right 10dB*/
183 tda9875_write(sd, TDA9875_MBA, 0x00); /* Main Bass Main 0dB*/
184 tda9875_write(sd, TDA9875_MTR, 0x00); /* Main Treble Main 0dB*/
185 tda9875_write(sd, TDA9875_ACS, 0x44); /* Aux chan select (dac)*/
186 tda9875_write(sd, TDA9875_AVL, 0x00); /* Vol Aux left 0dB*/
187 tda9875_write(sd, TDA9875_AVR, 0x00); /* Vol Aux right 0dB*/
188 tda9875_write(sd, TDA9875_ABA, 0x00); /* Aux Bass Main 0dB*/
189 tda9875_write(sd, TDA9875_ATR, 0x00); /* Aux Aigus Main 0dB*/
190
191 tda9875_write(sd, TDA9875_MUT, 0xcc); /* General mute */
192
193 t->lvol = t->rvol = 0; /* 0dB */
194 t->bass = 0; /* 0dB */
195 t->treble = 0; /* 0dB */
196 tda9875_set(sd);
197}
198
199
200static int tda9875_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
201{
202 struct tda9875 *t = to_state(sd);
203
204 switch (ctrl->id) {
205 case V4L2_CID_AUDIO_VOLUME:
206 {
207 int left = (t->lvol+84)*606;
208 int right = (t->rvol+84)*606;
209
210 ctrl->value=max(left,right);
211 return 0;
212 }
213 case V4L2_CID_AUDIO_BALANCE:
214 {
215 int left = (t->lvol+84)*606;
216 int right = (t->rvol+84)*606;
217 int volume = max(left,right);
218 int balance = (32768*min(left,right))/
219 (volume ? volume : 1);
220 ctrl->value=(left<right)?
221 (65535-balance) : balance;
222 return 0;
223 }
224 case V4L2_CID_AUDIO_BASS:
225 ctrl->value = (t->bass+12)*2427; /* min -12 max +15 */
226 return 0;
227 case V4L2_CID_AUDIO_TREBLE:
228 ctrl->value = (t->treble+12)*2730;/* min -12 max +12 */
229 return 0;
230 }
231 return -EINVAL;
232}
233
234static int tda9875_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
235{
236 struct tda9875 *t = to_state(sd);
237 int chvol = 0, volume = 0, balance = 0, left, right;
238
239 switch (ctrl->id) {
240 case V4L2_CID_AUDIO_VOLUME:
241 left = (t->lvol+84)*606;
242 right = (t->rvol+84)*606;
243
244 volume = max(left,right);
245 balance = (32768*min(left,right))/
246 (volume ? volume : 1);
247 balance =(left<right)?
248 (65535-balance) : balance;
249
250 volume = ctrl->value;
251
252 chvol=1;
253 break;
254 case V4L2_CID_AUDIO_BALANCE:
255 left = (t->lvol+84)*606;
256 right = (t->rvol+84)*606;
257
258 volume=max(left,right);
259
260 balance = ctrl->value;
261
262 chvol=1;
263 break;
264 case V4L2_CID_AUDIO_BASS:
265 t->bass = ((ctrl->value/2400)-12) & 0xff;
266 if (t->bass > 15)
267 t->bass = 15;
268 if (t->bass < -12)
269 t->bass = -12 & 0xff;
270 break;
271 case V4L2_CID_AUDIO_TREBLE:
272 t->treble = ((ctrl->value/2700)-12) & 0xff;
273 if (t->treble > 12)
274 t->treble = 12;
275 if (t->treble < -12)
276 t->treble = -12 & 0xff;
277 break;
278 default:
279 return -EINVAL;
280 }
281
282 if (chvol) {
283 left = (min(65536 - balance,32768) *
284 volume) / 32768;
285 right = (min(balance,32768) *
286 volume) / 32768;
287 t->lvol = ((left/606)-84) & 0xff;
288 if (t->lvol > 24)
289 t->lvol = 24;
290 if (t->lvol < -84)
291 t->lvol = -84 & 0xff;
292
293 t->rvol = ((right/606)-84) & 0xff;
294 if (t->rvol > 24)
295 t->rvol = 24;
296 if (t->rvol < -84)
297 t->rvol = -84 & 0xff;
298 }
299
300 tda9875_set(sd);
301 return 0;
302}
303
304static int tda9875_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
305{
306 switch (qc->id) {
307 case V4L2_CID_AUDIO_VOLUME:
308 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 58880);
309 case V4L2_CID_AUDIO_BASS:
310 case V4L2_CID_AUDIO_TREBLE:
311 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
312 }
313 return -EINVAL;
314}
315
316/* ----------------------------------------------------------------------- */
317
318static const struct v4l2_subdev_core_ops tda9875_core_ops = {
319 .queryctrl = tda9875_queryctrl,
320 .g_ctrl = tda9875_g_ctrl,
321 .s_ctrl = tda9875_s_ctrl,
322};
323
324static const struct v4l2_subdev_ops tda9875_ops = {
325 .core = &tda9875_core_ops,
326};
327
328/* ----------------------------------------------------------------------- */
329
330
331/* *********************** *
332 * i2c interface functions *
333 * *********************** */
334
335static int tda9875_checkit(struct i2c_client *client, int addr)
336{
337 int dic, rev;
338
339 dic = i2c_read_register(client, addr, 254);
340 rev = i2c_read_register(client, addr, 255);
341
342 if (dic == 0 || dic == 2) { /* tda9875 and tda9875A */
343 v4l_info(client, "tda9875%s rev. %d detected at 0x%02x\n",
344 dic == 0 ? "" : "A", rev, addr << 1);
345 return 1;
346 }
347 v4l_info(client, "no such chip at 0x%02x (dic=0x%x rev=0x%x)\n",
348 addr << 1, dic, rev);
349 return 0;
350}
351
352static int tda9875_probe(struct i2c_client *client,
353 const struct i2c_device_id *id)
354{
355 struct tda9875 *t;
356 struct v4l2_subdev *sd;
357
358 v4l_info(client, "chip found @ 0x%02x (%s)\n",
359 client->addr << 1, client->adapter->name);
360
361 if (!tda9875_checkit(client, client->addr))
362 return -ENODEV;
363
364 t = kzalloc(sizeof(*t), GFP_KERNEL);
365 if (!t)
366 return -ENOMEM;
367 sd = &t->sd;
368 v4l2_i2c_subdev_init(sd, client, &tda9875_ops);
369
370 do_tda9875_init(sd);
371 return 0;
372}
373
374static int tda9875_remove(struct i2c_client *client)
375{
376 struct v4l2_subdev *sd = i2c_get_clientdata(client);
377
378 do_tda9875_init(sd);
379 v4l2_device_unregister_subdev(sd);
380 kfree(to_state(sd));
381 return 0;
382}
383
384static const struct i2c_device_id tda9875_id[] = {
385 { "tda9875", 0 },
386 { }
387};
388MODULE_DEVICE_TABLE(i2c, tda9875_id);
389
390static struct i2c_driver tda9875_driver = {
391 .driver = {
392 .owner = THIS_MODULE,
393 .name = "tda9875",
394 },
395 .probe = tda9875_probe,
396 .remove = tda9875_remove,
397 .id_table = tda9875_id,
398};
399
400static __init int init_tda9875(void)
401{
402 return i2c_add_driver(&tda9875_driver);
403}
404
405static __exit void exit_tda9875(void)
406{
407 i2c_del_driver(&tda9875_driver);
408}
409
410module_init(init_tda9875);
411module_exit(exit_tda9875);
diff --git a/drivers/media/video/tlg2300/pd-video.c b/drivers/media/video/tlg2300/pd-video.c
index a1ffe18640fe..df33a1d188bb 100644
--- a/drivers/media/video/tlg2300/pd-video.c
+++ b/drivers/media/video/tlg2300/pd-video.c
@@ -512,19 +512,20 @@ int alloc_bulk_urbs_generic(struct urb **urb_array, int num,
512 int buf_size, gfp_t gfp_flags, 512 int buf_size, gfp_t gfp_flags,
513 usb_complete_t complete_fn, void *context) 513 usb_complete_t complete_fn, void *context)
514{ 514{
515 struct urb *urb; 515 int i = 0;
516 void *mem;
517 int i;
518 516
519 for (i = 0; i < num; i++) { 517 for (; i < num; i++) {
520 urb = usb_alloc_urb(0, gfp_flags); 518 void *mem;
519 struct urb *urb = usb_alloc_urb(0, gfp_flags);
521 if (urb == NULL) 520 if (urb == NULL)
522 return i; 521 return i;
523 522
524 mem = usb_alloc_coherent(udev, buf_size, gfp_flags, 523 mem = usb_alloc_coherent(udev, buf_size, gfp_flags,
525 &urb->transfer_dma); 524 &urb->transfer_dma);
526 if (mem == NULL) 525 if (mem == NULL) {
526 usb_free_urb(urb);
527 return i; 527 return i;
528 }
528 529
529 usb_fill_bulk_urb(urb, udev, usb_rcvbulkpipe(udev, ep_addr), 530 usb_fill_bulk_urb(urb, udev, usb_rcvbulkpipe(udev, ep_addr),
530 mem, buf_size, complete_fn, context); 531 mem, buf_size, complete_fn, context);
diff --git a/drivers/media/video/v4l2-common.c b/drivers/media/video/v4l2-common.c
index 3f0871b550ad..810eef43c216 100644
--- a/drivers/media/video/v4l2-common.c
+++ b/drivers/media/video/v4l2-common.c
@@ -407,18 +407,6 @@ struct v4l2_subdev *v4l2_i2c_new_subdev_board(struct v4l2_device *v4l2_dev,
407 /* Decrease the module use count to match the first try_module_get. */ 407 /* Decrease the module use count to match the first try_module_get. */
408 module_put(client->driver->driver.owner); 408 module_put(client->driver->driver.owner);
409 409
410 if (sd) {
411 /* We return errors from v4l2_subdev_call only if we have the
412 callback as the .s_config is not mandatory */
413 int err = v4l2_subdev_call(sd, core, s_config,
414 info->irq, info->platform_data);
415
416 if (err && err != -ENOIOCTLCMD) {
417 v4l2_device_unregister_subdev(sd);
418 sd = NULL;
419 }
420 }
421
422error: 410error:
423 /* If we have a client but no subdev, then something went wrong and 411 /* If we have a client but no subdev, then something went wrong and
424 we must unregister the client. */ 412 we must unregister the client. */
@@ -428,9 +416,8 @@ error:
428} 416}
429EXPORT_SYMBOL_GPL(v4l2_i2c_new_subdev_board); 417EXPORT_SYMBOL_GPL(v4l2_i2c_new_subdev_board);
430 418
431struct v4l2_subdev *v4l2_i2c_new_subdev_cfg(struct v4l2_device *v4l2_dev, 419struct v4l2_subdev *v4l2_i2c_new_subdev(struct v4l2_device *v4l2_dev,
432 struct i2c_adapter *adapter, const char *client_type, 420 struct i2c_adapter *adapter, const char *client_type,
433 int irq, void *platform_data,
434 u8 addr, const unsigned short *probe_addrs) 421 u8 addr, const unsigned short *probe_addrs)
435{ 422{
436 struct i2c_board_info info; 423 struct i2c_board_info info;
@@ -440,12 +427,10 @@ struct v4l2_subdev *v4l2_i2c_new_subdev_cfg(struct v4l2_device *v4l2_dev,
440 memset(&info, 0, sizeof(info)); 427 memset(&info, 0, sizeof(info));
441 strlcpy(info.type, client_type, sizeof(info.type)); 428 strlcpy(info.type, client_type, sizeof(info.type));
442 info.addr = addr; 429 info.addr = addr;
443 info.irq = irq;
444 info.platform_data = platform_data;
445 430
446 return v4l2_i2c_new_subdev_board(v4l2_dev, adapter, &info, probe_addrs); 431 return v4l2_i2c_new_subdev_board(v4l2_dev, adapter, &info, probe_addrs);
447} 432}
448EXPORT_SYMBOL_GPL(v4l2_i2c_new_subdev_cfg); 433EXPORT_SYMBOL_GPL(v4l2_i2c_new_subdev);
449 434
450/* Return i2c client address of v4l2_subdev. */ 435/* Return i2c client address of v4l2_subdev. */
451unsigned short v4l2_i2c_subdev_addr(struct v4l2_subdev *sd) 436unsigned short v4l2_i2c_subdev_addr(struct v4l2_subdev *sd)
diff --git a/drivers/media/video/v4l2-ctrls.c b/drivers/media/video/v4l2-ctrls.c
index 8f81efcfcf56..ef66d2af0c57 100644
--- a/drivers/media/video/v4l2-ctrls.c
+++ b/drivers/media/video/v4l2-ctrls.c
@@ -569,7 +569,7 @@ static int user_to_new(struct v4l2_ext_control *c,
569 int ret; 569 int ret;
570 u32 size; 570 u32 size;
571 571
572 ctrl->has_new = 1; 572 ctrl->is_new = 1;
573 switch (ctrl->type) { 573 switch (ctrl->type) {
574 case V4L2_CTRL_TYPE_INTEGER64: 574 case V4L2_CTRL_TYPE_INTEGER64:
575 ctrl->val64 = c->value64; 575 ctrl->val64 = c->value64;
@@ -1280,8 +1280,12 @@ int v4l2_ctrl_handler_setup(struct v4l2_ctrl_handler *hdl)
1280 if (ctrl->done) 1280 if (ctrl->done)
1281 continue; 1281 continue;
1282 1282
1283 for (i = 0; i < master->ncontrols; i++) 1283 for (i = 0; i < master->ncontrols; i++) {
1284 cur_to_new(master->cluster[i]); 1284 if (master->cluster[i]) {
1285 cur_to_new(master->cluster[i]);
1286 master->cluster[i]->is_new = 1;
1287 }
1288 }
1285 1289
1286 /* Skip button controls and read-only controls. */ 1290 /* Skip button controls and read-only controls. */
1287 if (ctrl->type == V4L2_CTRL_TYPE_BUTTON || 1291 if (ctrl->type == V4L2_CTRL_TYPE_BUTTON ||
@@ -1340,12 +1344,15 @@ int v4l2_queryctrl(struct v4l2_ctrl_handler *hdl, struct v4l2_queryctrl *qc)
1340 1344
1341 ctrl = ref->ctrl; 1345 ctrl = ref->ctrl;
1342 memset(qc, 0, sizeof(*qc)); 1346 memset(qc, 0, sizeof(*qc));
1343 qc->id = ctrl->id; 1347 if (id >= V4L2_CID_PRIVATE_BASE)
1348 qc->id = id;
1349 else
1350 qc->id = ctrl->id;
1344 strlcpy(qc->name, ctrl->name, sizeof(qc->name)); 1351 strlcpy(qc->name, ctrl->name, sizeof(qc->name));
1345 qc->minimum = ctrl->minimum; 1352 qc->minimum = ctrl->minimum;
1346 qc->maximum = ctrl->maximum; 1353 qc->maximum = ctrl->maximum;
1347 qc->default_value = ctrl->default_value; 1354 qc->default_value = ctrl->default_value;
1348 if (qc->type == V4L2_CTRL_TYPE_MENU) 1355 if (ctrl->type == V4L2_CTRL_TYPE_MENU)
1349 qc->step = 1; 1356 qc->step = 1;
1350 else 1357 else
1351 qc->step = ctrl->step; 1358 qc->step = ctrl->step;
@@ -1645,7 +1652,7 @@ static int try_or_set_control_cluster(struct v4l2_ctrl *master, bool set)
1645 if (ctrl == NULL) 1652 if (ctrl == NULL)
1646 continue; 1653 continue;
1647 1654
1648 if (ctrl->has_new) { 1655 if (ctrl->is_new) {
1649 /* Double check this: it may have changed since the 1656 /* Double check this: it may have changed since the
1650 last check in try_or_set_ext_ctrls(). */ 1657 last check in try_or_set_ext_ctrls(). */
1651 if (set && (ctrl->flags & V4L2_CTRL_FLAG_GRABBED)) 1658 if (set && (ctrl->flags & V4L2_CTRL_FLAG_GRABBED))
@@ -1719,13 +1726,13 @@ static int try_or_set_ext_ctrls(struct v4l2_ctrl_handler *hdl,
1719 1726
1720 v4l2_ctrl_lock(ctrl); 1727 v4l2_ctrl_lock(ctrl);
1721 1728
1722 /* Reset the 'has_new' flags of the cluster */ 1729 /* Reset the 'is_new' flags of the cluster */
1723 for (j = 0; j < master->ncontrols; j++) 1730 for (j = 0; j < master->ncontrols; j++)
1724 if (master->cluster[j]) 1731 if (master->cluster[j])
1725 master->cluster[j]->has_new = 0; 1732 master->cluster[j]->is_new = 0;
1726 1733
1727 /* Copy the new caller-supplied control values. 1734 /* Copy the new caller-supplied control values.
1728 user_to_new() sets 'has_new' to 1. */ 1735 user_to_new() sets 'is_new' to 1. */
1729 ret = cluster_walk(i, cs, helpers, user_to_new); 1736 ret = cluster_walk(i, cs, helpers, user_to_new);
1730 1737
1731 if (!ret) 1738 if (!ret)
@@ -1820,15 +1827,18 @@ static int set_ctrl(struct v4l2_ctrl *ctrl, s32 *val)
1820 int ret; 1827 int ret;
1821 int i; 1828 int i;
1822 1829
1830 if (ctrl->flags & V4L2_CTRL_FLAG_READ_ONLY)
1831 return -EACCES;
1832
1823 v4l2_ctrl_lock(ctrl); 1833 v4l2_ctrl_lock(ctrl);
1824 1834
1825 /* Reset the 'has_new' flags of the cluster */ 1835 /* Reset the 'is_new' flags of the cluster */
1826 for (i = 0; i < master->ncontrols; i++) 1836 for (i = 0; i < master->ncontrols; i++)
1827 if (master->cluster[i]) 1837 if (master->cluster[i])
1828 master->cluster[i]->has_new = 0; 1838 master->cluster[i]->is_new = 0;
1829 1839
1830 ctrl->val = *val; 1840 ctrl->val = *val;
1831 ctrl->has_new = 1; 1841 ctrl->is_new = 1;
1832 ret = try_or_set_control_cluster(master, false); 1842 ret = try_or_set_control_cluster(master, false);
1833 if (!ret) 1843 if (!ret)
1834 ret = try_or_set_control_cluster(master, true); 1844 ret = try_or_set_control_cluster(master, true);
diff --git a/drivers/media/video/v4l2-dev.c b/drivers/media/video/v4l2-dev.c
index 359e23290a7e..341764a3a990 100644
--- a/drivers/media/video/v4l2-dev.c
+++ b/drivers/media/video/v4l2-dev.c
@@ -419,6 +419,10 @@ static int get_index(struct video_device *vdev)
419 * The registration code assigns minor numbers and device node numbers 419 * The registration code assigns minor numbers and device node numbers
420 * based on the requested type and registers the new device node with 420 * based on the requested type and registers the new device node with
421 * the kernel. 421 * the kernel.
422 *
423 * This function assumes that struct video_device was zeroed when it
424 * was allocated and does not contain any stale date.
425 *
422 * An error is returned if no free minor or device node number could be 426 * An error is returned if no free minor or device node number could be
423 * found, or if the registration of the device node failed. 427 * found, or if the registration of the device node failed.
424 * 428 *
@@ -440,7 +444,6 @@ static int __video_register_device(struct video_device *vdev, int type, int nr,
440 int minor_offset = 0; 444 int minor_offset = 0;
441 int minor_cnt = VIDEO_NUM_DEVICES; 445 int minor_cnt = VIDEO_NUM_DEVICES;
442 const char *name_base; 446 const char *name_base;
443 void *priv = vdev->dev.p;
444 447
445 /* A minor value of -1 marks this video device as never 448 /* A minor value of -1 marks this video device as never
446 having been registered */ 449 having been registered */
@@ -559,10 +562,6 @@ static int __video_register_device(struct video_device *vdev, int type, int nr,
559 } 562 }
560 563
561 /* Part 4: register the device with sysfs */ 564 /* Part 4: register the device with sysfs */
562 memset(&vdev->dev, 0, sizeof(vdev->dev));
563 /* The memset above cleared the device's device_private, so
564 put back the copy we made earlier. */
565 vdev->dev.p = priv;
566 vdev->dev.class = &video_class; 565 vdev->dev.class = &video_class;
567 vdev->dev.devt = MKDEV(VIDEO_MAJOR, vdev->minor); 566 vdev->dev.devt = MKDEV(VIDEO_MAJOR, vdev->minor);
568 if (vdev->parent) 567 if (vdev->parent)
diff --git a/drivers/media/video/v4l2-device.c b/drivers/media/video/v4l2-device.c
index 7fe6f92af480..ce64fe16bc60 100644
--- a/drivers/media/video/v4l2-device.c
+++ b/drivers/media/video/v4l2-device.c
@@ -100,6 +100,7 @@ void v4l2_device_unregister(struct v4l2_device *v4l2_dev)
100 is a platform bus, then it is never deleted. */ 100 is a platform bus, then it is never deleted. */
101 if (client) 101 if (client)
102 i2c_unregister_device(client); 102 i2c_unregister_device(client);
103 continue;
103 } 104 }
104#endif 105#endif
105#if defined(CONFIG_SPI) 106#if defined(CONFIG_SPI)
@@ -108,6 +109,7 @@ void v4l2_device_unregister(struct v4l2_device *v4l2_dev)
108 109
109 if (spi) 110 if (spi)
110 spi_unregister_device(spi); 111 spi_unregister_device(spi);
112 continue;
111 } 113 }
112#endif 114#endif
113 } 115 }
@@ -126,11 +128,19 @@ int v4l2_device_register_subdev(struct v4l2_device *v4l2_dev,
126 WARN_ON(sd->v4l2_dev != NULL); 128 WARN_ON(sd->v4l2_dev != NULL);
127 if (!try_module_get(sd->owner)) 129 if (!try_module_get(sd->owner))
128 return -ENODEV; 130 return -ENODEV;
131 sd->v4l2_dev = v4l2_dev;
132 if (sd->internal_ops && sd->internal_ops->registered) {
133 err = sd->internal_ops->registered(sd);
134 if (err)
135 return err;
136 }
129 /* This just returns 0 if either of the two args is NULL */ 137 /* This just returns 0 if either of the two args is NULL */
130 err = v4l2_ctrl_add_handler(v4l2_dev->ctrl_handler, sd->ctrl_handler); 138 err = v4l2_ctrl_add_handler(v4l2_dev->ctrl_handler, sd->ctrl_handler);
131 if (err) 139 if (err) {
140 if (sd->internal_ops && sd->internal_ops->unregistered)
141 sd->internal_ops->unregistered(sd);
132 return err; 142 return err;
133 sd->v4l2_dev = v4l2_dev; 143 }
134 spin_lock(&v4l2_dev->lock); 144 spin_lock(&v4l2_dev->lock);
135 list_add_tail(&sd->list, &v4l2_dev->subdevs); 145 list_add_tail(&sd->list, &v4l2_dev->subdevs);
136 spin_unlock(&v4l2_dev->lock); 146 spin_unlock(&v4l2_dev->lock);
@@ -146,6 +156,8 @@ void v4l2_device_unregister_subdev(struct v4l2_subdev *sd)
146 spin_lock(&sd->v4l2_dev->lock); 156 spin_lock(&sd->v4l2_dev->lock);
147 list_del(&sd->list); 157 list_del(&sd->list);
148 spin_unlock(&sd->v4l2_dev->lock); 158 spin_unlock(&sd->v4l2_dev->lock);
159 if (sd->internal_ops && sd->internal_ops->unregistered)
160 sd->internal_ops->unregistered(sd);
149 sd->v4l2_dev = NULL; 161 sd->v4l2_dev = NULL;
150 module_put(sd->owner); 162 module_put(sd->owner);
151} 163}
diff --git a/drivers/media/video/v4l2-ioctl.c b/drivers/media/video/v4l2-ioctl.c
index 7e47f15f350d..f51327ef6757 100644
--- a/drivers/media/video/v4l2-ioctl.c
+++ b/drivers/media/video/v4l2-ioctl.c
@@ -1659,20 +1659,24 @@ static long __video_do_ioctl(struct file *file,
1659 { 1659 {
1660 struct v4l2_dbg_register *p = arg; 1660 struct v4l2_dbg_register *p = arg;
1661 1661
1662 if (!capable(CAP_SYS_ADMIN)) 1662 if (ops->vidioc_g_register) {
1663 ret = -EPERM; 1663 if (!capable(CAP_SYS_ADMIN))
1664 else if (ops->vidioc_g_register) 1664 ret = -EPERM;
1665 ret = ops->vidioc_g_register(file, fh, p); 1665 else
1666 ret = ops->vidioc_g_register(file, fh, p);
1667 }
1666 break; 1668 break;
1667 } 1669 }
1668 case VIDIOC_DBG_S_REGISTER: 1670 case VIDIOC_DBG_S_REGISTER:
1669 { 1671 {
1670 struct v4l2_dbg_register *p = arg; 1672 struct v4l2_dbg_register *p = arg;
1671 1673
1672 if (!capable(CAP_SYS_ADMIN)) 1674 if (ops->vidioc_s_register) {
1673 ret = -EPERM; 1675 if (!capable(CAP_SYS_ADMIN))
1674 else if (ops->vidioc_s_register) 1676 ret = -EPERM;
1675 ret = ops->vidioc_s_register(file, fh, p); 1677 else
1678 ret = ops->vidioc_s_register(file, fh, p);
1679 }
1676 break; 1680 break;
1677 } 1681 }
1678#endif 1682#endif
diff --git a/drivers/media/video/w9966.c b/drivers/media/video/w9966.c
index 019ee206cbee..fa35639d0c15 100644
--- a/drivers/media/video/w9966.c
+++ b/drivers/media/video/w9966.c
@@ -937,6 +937,7 @@ static void w9966_term(struct w9966 *cam)
937 parport_unregister_device(cam->pdev); 937 parport_unregister_device(cam->pdev);
938 w9966_set_state(cam, W9966_STATE_PDEV, 0); 938 w9966_set_state(cam, W9966_STATE_PDEV, 0);
939 } 939 }
940 memset(cam, 0, sizeof(*cam));
940} 941}
941 942
942 943
diff --git a/drivers/media/video/zoran/zoran_card.c b/drivers/media/video/zoran/zoran_card.c
index 9cdc3bb15b15..9f2bac519647 100644
--- a/drivers/media/video/zoran/zoran_card.c
+++ b/drivers/media/video/zoran/zoran_card.c
@@ -1041,7 +1041,7 @@ zr36057_init (struct zoran *zr)
1041 /* allocate memory *before* doing anything to the hardware 1041 /* allocate memory *before* doing anything to the hardware
1042 * in case allocation fails */ 1042 * in case allocation fails */
1043 zr->stat_com = kzalloc(BUZ_NUM_STAT_COM * 4, GFP_KERNEL); 1043 zr->stat_com = kzalloc(BUZ_NUM_STAT_COM * 4, GFP_KERNEL);
1044 zr->video_dev = kmalloc(sizeof(struct video_device), GFP_KERNEL); 1044 zr->video_dev = video_device_alloc();
1045 if (!zr->stat_com || !zr->video_dev) { 1045 if (!zr->stat_com || !zr->video_dev) {
1046 dprintk(1, 1046 dprintk(1,
1047 KERN_ERR 1047 KERN_ERR
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 16fe4f9b719b..03823327db25 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -2864,7 +2864,7 @@ config MLX4_CORE
2864 default n 2864 default n
2865 2865
2866config MLX4_DEBUG 2866config MLX4_DEBUG
2867 bool "Verbose debugging output" if (MLX4_CORE && EMBEDDED) 2867 bool "Verbose debugging output" if (MLX4_CORE && EXPERT)
2868 depends on MLX4_CORE 2868 depends on MLX4_CORE
2869 default y 2869 default y
2870 ---help--- 2870 ---help---
diff --git a/drivers/net/arm/ks8695net.c b/drivers/net/arm/ks8695net.c
index 62d6f88cbab5..aa07657744c3 100644
--- a/drivers/net/arm/ks8695net.c
+++ b/drivers/net/arm/ks8695net.c
@@ -1644,7 +1644,7 @@ ks8695_cleanup(void)
1644module_init(ks8695_init); 1644module_init(ks8695_init);
1645module_exit(ks8695_cleanup); 1645module_exit(ks8695_cleanup);
1646 1646
1647MODULE_AUTHOR("Simtec Electronics") 1647MODULE_AUTHOR("Simtec Electronics");
1648MODULE_DESCRIPTION("Micrel KS8695 (Centaur) Ethernet driver"); 1648MODULE_DESCRIPTION("Micrel KS8695 (Centaur) Ethernet driver");
1649MODULE_LICENSE("GPL"); 1649MODULE_LICENSE("GPL");
1650MODULE_ALIAS("platform:" MODULENAME); 1650MODULE_ALIAS("platform:" MODULENAME);
diff --git a/drivers/net/atl1c/atl1c_hw.c b/drivers/net/atl1c/atl1c_hw.c
index 1bf672009948..23f2ab0f2fa8 100644
--- a/drivers/net/atl1c/atl1c_hw.c
+++ b/drivers/net/atl1c/atl1c_hw.c
@@ -345,7 +345,7 @@ int atl1c_write_phy_reg(struct atl1c_hw *hw, u32 reg_addr, u16 phy_data)
345 */ 345 */
346static int atl1c_phy_setup_adv(struct atl1c_hw *hw) 346static int atl1c_phy_setup_adv(struct atl1c_hw *hw)
347{ 347{
348 u16 mii_adv_data = ADVERTISE_DEFAULT_CAP & ~ADVERTISE_SPEED_MASK; 348 u16 mii_adv_data = ADVERTISE_DEFAULT_CAP & ~ADVERTISE_ALL;
349 u16 mii_giga_ctrl_data = GIGA_CR_1000T_DEFAULT_CAP & 349 u16 mii_giga_ctrl_data = GIGA_CR_1000T_DEFAULT_CAP &
350 ~GIGA_CR_1000T_SPEED_MASK; 350 ~GIGA_CR_1000T_SPEED_MASK;
351 351
@@ -373,7 +373,7 @@ static int atl1c_phy_setup_adv(struct atl1c_hw *hw)
373 } 373 }
374 374
375 if (atl1c_write_phy_reg(hw, MII_ADVERTISE, mii_adv_data) != 0 || 375 if (atl1c_write_phy_reg(hw, MII_ADVERTISE, mii_adv_data) != 0 ||
376 atl1c_write_phy_reg(hw, MII_GIGA_CR, mii_giga_ctrl_data) != 0) 376 atl1c_write_phy_reg(hw, MII_CTRL1000, mii_giga_ctrl_data) != 0)
377 return -1; 377 return -1;
378 return 0; 378 return 0;
379} 379}
@@ -517,19 +517,18 @@ int atl1c_phy_init(struct atl1c_hw *hw)
517 "Error Setting up Auto-Negotiation\n"); 517 "Error Setting up Auto-Negotiation\n");
518 return ret_val; 518 return ret_val;
519 } 519 }
520 mii_bmcr_data |= BMCR_AUTO_NEG_EN | BMCR_RESTART_AUTO_NEG; 520 mii_bmcr_data |= BMCR_ANENABLE | BMCR_ANRESTART;
521 break; 521 break;
522 case MEDIA_TYPE_100M_FULL: 522 case MEDIA_TYPE_100M_FULL:
523 mii_bmcr_data |= BMCR_SPEED_100 | BMCR_FULL_DUPLEX; 523 mii_bmcr_data |= BMCR_SPEED100 | BMCR_FULLDPLX;
524 break; 524 break;
525 case MEDIA_TYPE_100M_HALF: 525 case MEDIA_TYPE_100M_HALF:
526 mii_bmcr_data |= BMCR_SPEED_100; 526 mii_bmcr_data |= BMCR_SPEED100;
527 break; 527 break;
528 case MEDIA_TYPE_10M_FULL: 528 case MEDIA_TYPE_10M_FULL:
529 mii_bmcr_data |= BMCR_SPEED_10 | BMCR_FULL_DUPLEX; 529 mii_bmcr_data |= BMCR_FULLDPLX;
530 break; 530 break;
531 case MEDIA_TYPE_10M_HALF: 531 case MEDIA_TYPE_10M_HALF:
532 mii_bmcr_data |= BMCR_SPEED_10;
533 break; 532 break;
534 default: 533 default:
535 if (netif_msg_link(adapter)) 534 if (netif_msg_link(adapter))
@@ -657,7 +656,7 @@ int atl1c_restart_autoneg(struct atl1c_hw *hw)
657 err = atl1c_phy_setup_adv(hw); 656 err = atl1c_phy_setup_adv(hw);
658 if (err) 657 if (err)
659 return err; 658 return err;
660 mii_bmcr_data |= BMCR_AUTO_NEG_EN | BMCR_RESTART_AUTO_NEG; 659 mii_bmcr_data |= BMCR_ANENABLE | BMCR_ANRESTART;
661 660
662 return atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data); 661 return atl1c_write_phy_reg(hw, MII_BMCR, mii_bmcr_data);
663} 662}
diff --git a/drivers/net/atl1c/atl1c_hw.h b/drivers/net/atl1c/atl1c_hw.h
index 3dd675979aa1..655fc6c4a8a4 100644
--- a/drivers/net/atl1c/atl1c_hw.h
+++ b/drivers/net/atl1c/atl1c_hw.h
@@ -736,55 +736,16 @@ int atl1c_phy_power_saving(struct atl1c_hw *hw);
736#define REG_DEBUG_DATA0 0x1900 736#define REG_DEBUG_DATA0 0x1900
737#define REG_DEBUG_DATA1 0x1904 737#define REG_DEBUG_DATA1 0x1904
738 738
739/* PHY Control Register */
740#define MII_BMCR 0x00
741#define BMCR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */
742#define BMCR_COLL_TEST_ENABLE 0x0080 /* Collision test enable */
743#define BMCR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
744#define BMCR_RESTART_AUTO_NEG 0x0200 /* Restart auto negotiation */
745#define BMCR_ISOLATE 0x0400 /* Isolate PHY from MII */
746#define BMCR_POWER_DOWN 0x0800 /* Power down */
747#define BMCR_AUTO_NEG_EN 0x1000 /* Auto Neg Enable */
748#define BMCR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */
749#define BMCR_LOOPBACK 0x4000 /* 0 = normal, 1 = loopback */
750#define BMCR_RESET 0x8000 /* 0 = normal, 1 = PHY reset */
751#define BMCR_SPEED_MASK 0x2040
752#define BMCR_SPEED_1000 0x0040
753#define BMCR_SPEED_100 0x2000
754#define BMCR_SPEED_10 0x0000
755
756/* PHY Status Register */
757#define MII_BMSR 0x01
758#define BMMSR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */
759#define BMSR_JABBER_DETECT 0x0002 /* Jabber Detected */
760#define BMSR_LINK_STATUS 0x0004 /* Link Status 1 = link */
761#define BMSR_AUTONEG_CAPS 0x0008 /* Auto Neg Capable */
762#define BMSR_REMOTE_FAULT 0x0010 /* Remote Fault Detect */
763#define BMSR_AUTONEG_COMPLETE 0x0020 /* Auto Neg Complete */
764#define BMSR_PREAMBLE_SUPPRESS 0x0040 /* Preamble may be suppressed */
765#define BMSR_EXTENDED_STATUS 0x0100 /* Ext. status info in Reg 0x0F */
766#define BMSR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */
767#define BMSR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */
768#define BMSR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */
769#define BMSR_10T_FD_CAPS 0x1000 /* 10T Full Duplex Capable */
770#define BMSR_100X_HD_CAPS 0x2000 /* 100X Half Duplex Capable */
771#define BMMII_SR_100X_FD_CAPS 0x4000 /* 100X Full Duplex Capable */
772#define BMMII_SR_100T4_CAPS 0x8000 /* 100T4 Capable */
773
774#define MII_PHYSID1 0x02
775#define MII_PHYSID2 0x03
776#define L1D_MPW_PHYID1 0xD01C /* V7 */ 739#define L1D_MPW_PHYID1 0xD01C /* V7 */
777#define L1D_MPW_PHYID2 0xD01D /* V1-V6 */ 740#define L1D_MPW_PHYID2 0xD01D /* V1-V6 */
778#define L1D_MPW_PHYID3 0xD01E /* V8 */ 741#define L1D_MPW_PHYID3 0xD01E /* V8 */
779 742
780 743
781/* Autoneg Advertisement Register */ 744/* Autoneg Advertisement Register */
782#define MII_ADVERTISE 0x04 745#define ADVERTISE_DEFAULT_CAP \
783#define ADVERTISE_SPEED_MASK 0x01E0 746 (ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM)
784#define ADVERTISE_DEFAULT_CAP 0x0DE0
785 747
786/* 1000BASE-T Control Register */ 748/* 1000BASE-T Control Register */
787#define MII_GIGA_CR 0x09
788#define GIGA_CR_1000T_REPEATER_DTE 0x0400 /* 1=Repeater/switch device port 0=DTE device */ 749#define GIGA_CR_1000T_REPEATER_DTE 0x0400 /* 1=Repeater/switch device port 0=DTE device */
789 750
790#define GIGA_CR_1000T_MS_VALUE 0x0800 /* 1=Configure PHY as Master 0=Configure PHY as Slave */ 751#define GIGA_CR_1000T_MS_VALUE 0x0800 /* 1=Configure PHY as Master 0=Configure PHY as Slave */
diff --git a/drivers/net/atl1e/atl1e_ethtool.c b/drivers/net/atl1e/atl1e_ethtool.c
index 6943a6c3b948..1209297433b8 100644
--- a/drivers/net/atl1e/atl1e_ethtool.c
+++ b/drivers/net/atl1e/atl1e_ethtool.c
@@ -95,18 +95,18 @@ static int atl1e_set_settings(struct net_device *netdev,
95 ecmd->advertising = hw->autoneg_advertised | 95 ecmd->advertising = hw->autoneg_advertised |
96 ADVERTISED_TP | ADVERTISED_Autoneg; 96 ADVERTISED_TP | ADVERTISED_Autoneg;
97 97
98 adv4 = hw->mii_autoneg_adv_reg & ~MII_AR_SPEED_MASK; 98 adv4 = hw->mii_autoneg_adv_reg & ~ADVERTISE_ALL;
99 adv9 = hw->mii_1000t_ctrl_reg & ~MII_AT001_CR_1000T_SPEED_MASK; 99 adv9 = hw->mii_1000t_ctrl_reg & ~MII_AT001_CR_1000T_SPEED_MASK;
100 if (hw->autoneg_advertised & ADVERTISE_10_HALF) 100 if (hw->autoneg_advertised & ADVERTISE_10_HALF)
101 adv4 |= MII_AR_10T_HD_CAPS; 101 adv4 |= ADVERTISE_10HALF;
102 if (hw->autoneg_advertised & ADVERTISE_10_FULL) 102 if (hw->autoneg_advertised & ADVERTISE_10_FULL)
103 adv4 |= MII_AR_10T_FD_CAPS; 103 adv4 |= ADVERTISE_10FULL;
104 if (hw->autoneg_advertised & ADVERTISE_100_HALF) 104 if (hw->autoneg_advertised & ADVERTISE_100_HALF)
105 adv4 |= MII_AR_100TX_HD_CAPS; 105 adv4 |= ADVERTISE_100HALF;
106 if (hw->autoneg_advertised & ADVERTISE_100_FULL) 106 if (hw->autoneg_advertised & ADVERTISE_100_FULL)
107 adv4 |= MII_AR_100TX_FD_CAPS; 107 adv4 |= ADVERTISE_100FULL;
108 if (hw->autoneg_advertised & ADVERTISE_1000_FULL) 108 if (hw->autoneg_advertised & ADVERTISE_1000_FULL)
109 adv9 |= MII_AT001_CR_1000T_FD_CAPS; 109 adv9 |= ADVERTISE_1000FULL;
110 110
111 if (adv4 != hw->mii_autoneg_adv_reg || 111 if (adv4 != hw->mii_autoneg_adv_reg ||
112 adv9 != hw->mii_1000t_ctrl_reg) { 112 adv9 != hw->mii_1000t_ctrl_reg) {
diff --git a/drivers/net/atl1e/atl1e_hw.c b/drivers/net/atl1e/atl1e_hw.c
index 76cc043def8c..923063d2e5bb 100644
--- a/drivers/net/atl1e/atl1e_hw.c
+++ b/drivers/net/atl1e/atl1e_hw.c
@@ -318,7 +318,7 @@ static int atl1e_phy_setup_autoneg_adv(struct atl1e_hw *hw)
318 * Advertisement Register (Address 4) and the 1000 mb speed bits in 318 * Advertisement Register (Address 4) and the 1000 mb speed bits in
319 * the 1000Base-T control Register (Address 9). 319 * the 1000Base-T control Register (Address 9).
320 */ 320 */
321 mii_autoneg_adv_reg &= ~MII_AR_SPEED_MASK; 321 mii_autoneg_adv_reg &= ~ADVERTISE_ALL;
322 mii_1000t_ctrl_reg &= ~MII_AT001_CR_1000T_SPEED_MASK; 322 mii_1000t_ctrl_reg &= ~MII_AT001_CR_1000T_SPEED_MASK;
323 323
324 /* 324 /*
@@ -327,44 +327,37 @@ static int atl1e_phy_setup_autoneg_adv(struct atl1e_hw *hw)
327 */ 327 */
328 switch (hw->media_type) { 328 switch (hw->media_type) {
329 case MEDIA_TYPE_AUTO_SENSOR: 329 case MEDIA_TYPE_AUTO_SENSOR:
330 mii_autoneg_adv_reg |= (MII_AR_10T_HD_CAPS | 330 mii_autoneg_adv_reg |= ADVERTISE_ALL;
331 MII_AR_10T_FD_CAPS | 331 hw->autoneg_advertised = ADVERTISE_ALL;
332 MII_AR_100TX_HD_CAPS |
333 MII_AR_100TX_FD_CAPS);
334 hw->autoneg_advertised = ADVERTISE_10_HALF |
335 ADVERTISE_10_FULL |
336 ADVERTISE_100_HALF |
337 ADVERTISE_100_FULL;
338 if (hw->nic_type == athr_l1e) { 332 if (hw->nic_type == athr_l1e) {
339 mii_1000t_ctrl_reg |= 333 mii_1000t_ctrl_reg |= ADVERTISE_1000FULL;
340 MII_AT001_CR_1000T_FD_CAPS;
341 hw->autoneg_advertised |= ADVERTISE_1000_FULL; 334 hw->autoneg_advertised |= ADVERTISE_1000_FULL;
342 } 335 }
343 break; 336 break;
344 337
345 case MEDIA_TYPE_100M_FULL: 338 case MEDIA_TYPE_100M_FULL:
346 mii_autoneg_adv_reg |= MII_AR_100TX_FD_CAPS; 339 mii_autoneg_adv_reg |= ADVERTISE_100FULL;
347 hw->autoneg_advertised = ADVERTISE_100_FULL; 340 hw->autoneg_advertised = ADVERTISE_100_FULL;
348 break; 341 break;
349 342
350 case MEDIA_TYPE_100M_HALF: 343 case MEDIA_TYPE_100M_HALF:
351 mii_autoneg_adv_reg |= MII_AR_100TX_HD_CAPS; 344 mii_autoneg_adv_reg |= ADVERTISE_100_HALF;
352 hw->autoneg_advertised = ADVERTISE_100_HALF; 345 hw->autoneg_advertised = ADVERTISE_100_HALF;
353 break; 346 break;
354 347
355 case MEDIA_TYPE_10M_FULL: 348 case MEDIA_TYPE_10M_FULL:
356 mii_autoneg_adv_reg |= MII_AR_10T_FD_CAPS; 349 mii_autoneg_adv_reg |= ADVERTISE_10_FULL;
357 hw->autoneg_advertised = ADVERTISE_10_FULL; 350 hw->autoneg_advertised = ADVERTISE_10_FULL;
358 break; 351 break;
359 352
360 default: 353 default:
361 mii_autoneg_adv_reg |= MII_AR_10T_HD_CAPS; 354 mii_autoneg_adv_reg |= ADVERTISE_10_HALF;
362 hw->autoneg_advertised = ADVERTISE_10_HALF; 355 hw->autoneg_advertised = ADVERTISE_10_HALF;
363 break; 356 break;
364 } 357 }
365 358
366 /* flow control fixed to enable all */ 359 /* flow control fixed to enable all */
367 mii_autoneg_adv_reg |= (MII_AR_ASM_DIR | MII_AR_PAUSE); 360 mii_autoneg_adv_reg |= (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP);
368 361
369 hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg; 362 hw->mii_autoneg_adv_reg = mii_autoneg_adv_reg;
370 hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg; 363 hw->mii_1000t_ctrl_reg = mii_1000t_ctrl_reg;
@@ -374,7 +367,7 @@ static int atl1e_phy_setup_autoneg_adv(struct atl1e_hw *hw)
374 return ret_val; 367 return ret_val;
375 368
376 if (hw->nic_type == athr_l1e || hw->nic_type == athr_l2e_revA) { 369 if (hw->nic_type == athr_l1e || hw->nic_type == athr_l2e_revA) {
377 ret_val = atl1e_write_phy_reg(hw, MII_AT001_CR, 370 ret_val = atl1e_write_phy_reg(hw, MII_CTRL1000,
378 mii_1000t_ctrl_reg); 371 mii_1000t_ctrl_reg);
379 if (ret_val) 372 if (ret_val)
380 return ret_val; 373 return ret_val;
@@ -397,7 +390,7 @@ int atl1e_phy_commit(struct atl1e_hw *hw)
397 int ret_val; 390 int ret_val;
398 u16 phy_data; 391 u16 phy_data;
399 392
400 phy_data = MII_CR_RESET | MII_CR_AUTO_NEG_EN | MII_CR_RESTART_AUTO_NEG; 393 phy_data = BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART;
401 394
402 ret_val = atl1e_write_phy_reg(hw, MII_BMCR, phy_data); 395 ret_val = atl1e_write_phy_reg(hw, MII_BMCR, phy_data);
403 if (ret_val) { 396 if (ret_val) {
@@ -645,15 +638,14 @@ int atl1e_restart_autoneg(struct atl1e_hw *hw)
645 return err; 638 return err;
646 639
647 if (hw->nic_type == athr_l1e || hw->nic_type == athr_l2e_revA) { 640 if (hw->nic_type == athr_l1e || hw->nic_type == athr_l2e_revA) {
648 err = atl1e_write_phy_reg(hw, MII_AT001_CR, 641 err = atl1e_write_phy_reg(hw, MII_CTRL1000,
649 hw->mii_1000t_ctrl_reg); 642 hw->mii_1000t_ctrl_reg);
650 if (err) 643 if (err)
651 return err; 644 return err;
652 } 645 }
653 646
654 err = atl1e_write_phy_reg(hw, MII_BMCR, 647 err = atl1e_write_phy_reg(hw, MII_BMCR,
655 MII_CR_RESET | MII_CR_AUTO_NEG_EN | 648 BMCR_RESET | BMCR_ANENABLE | BMCR_ANRESTART);
656 MII_CR_RESTART_AUTO_NEG);
657 return err; 649 return err;
658} 650}
659 651
diff --git a/drivers/net/atl1e/atl1e_hw.h b/drivers/net/atl1e/atl1e_hw.h
index 5ea2f4d86cfa..74df16aef793 100644
--- a/drivers/net/atl1e/atl1e_hw.h
+++ b/drivers/net/atl1e/atl1e_hw.h
@@ -629,127 +629,24 @@ s32 atl1e_restart_autoneg(struct atl1e_hw *hw);
629 629
630/***************************** MII definition ***************************************/ 630/***************************** MII definition ***************************************/
631/* PHY Common Register */ 631/* PHY Common Register */
632#define MII_BMCR 0x00
633#define MII_BMSR 0x01
634#define MII_PHYSID1 0x02
635#define MII_PHYSID2 0x03
636#define MII_ADVERTISE 0x04
637#define MII_LPA 0x05
638#define MII_EXPANSION 0x06
639#define MII_AT001_CR 0x09
640#define MII_AT001_SR 0x0A
641#define MII_AT001_ESR 0x0F
642#define MII_AT001_PSCR 0x10 632#define MII_AT001_PSCR 0x10
643#define MII_AT001_PSSR 0x11 633#define MII_AT001_PSSR 0x11
644#define MII_INT_CTRL 0x12 634#define MII_INT_CTRL 0x12
645#define MII_INT_STATUS 0x13 635#define MII_INT_STATUS 0x13
646#define MII_SMARTSPEED 0x14 636#define MII_SMARTSPEED 0x14
647#define MII_RERRCOUNTER 0x15
648#define MII_SREVISION 0x16
649#define MII_RESV1 0x17
650#define MII_LBRERROR 0x18 637#define MII_LBRERROR 0x18
651#define MII_PHYADDR 0x19
652#define MII_RESV2 0x1a 638#define MII_RESV2 0x1a
653#define MII_TPISTATUS 0x1b
654#define MII_NCONFIG 0x1c
655 639
656#define MII_DBG_ADDR 0x1D 640#define MII_DBG_ADDR 0x1D
657#define MII_DBG_DATA 0x1E 641#define MII_DBG_DATA 0x1E
658 642
659
660/* PHY Control Register */
661#define MII_CR_SPEED_SELECT_MSB 0x0040 /* bits 6,13: 10=1000, 01=100, 00=10 */
662#define MII_CR_COLL_TEST_ENABLE 0x0080 /* Collision test enable */
663#define MII_CR_FULL_DUPLEX 0x0100 /* FDX =1, half duplex =0 */
664#define MII_CR_RESTART_AUTO_NEG 0x0200 /* Restart auto negotiation */
665#define MII_CR_ISOLATE 0x0400 /* Isolate PHY from MII */
666#define MII_CR_POWER_DOWN 0x0800 /* Power down */
667#define MII_CR_AUTO_NEG_EN 0x1000 /* Auto Neg Enable */
668#define MII_CR_SPEED_SELECT_LSB 0x2000 /* bits 6,13: 10=1000, 01=100, 00=10 */
669#define MII_CR_LOOPBACK 0x4000 /* 0 = normal, 1 = loopback */
670#define MII_CR_RESET 0x8000 /* 0 = normal, 1 = PHY reset */
671#define MII_CR_SPEED_MASK 0x2040
672#define MII_CR_SPEED_1000 0x0040
673#define MII_CR_SPEED_100 0x2000
674#define MII_CR_SPEED_10 0x0000
675
676
677/* PHY Status Register */
678#define MII_SR_EXTENDED_CAPS 0x0001 /* Extended register capabilities */
679#define MII_SR_JABBER_DETECT 0x0002 /* Jabber Detected */
680#define MII_SR_LINK_STATUS 0x0004 /* Link Status 1 = link */
681#define MII_SR_AUTONEG_CAPS 0x0008 /* Auto Neg Capable */
682#define MII_SR_REMOTE_FAULT 0x0010 /* Remote Fault Detect */
683#define MII_SR_AUTONEG_COMPLETE 0x0020 /* Auto Neg Complete */
684#define MII_SR_PREAMBLE_SUPPRESS 0x0040 /* Preamble may be suppressed */
685#define MII_SR_EXTENDED_STATUS 0x0100 /* Ext. status info in Reg 0x0F */
686#define MII_SR_100T2_HD_CAPS 0x0200 /* 100T2 Half Duplex Capable */
687#define MII_SR_100T2_FD_CAPS 0x0400 /* 100T2 Full Duplex Capable */
688#define MII_SR_10T_HD_CAPS 0x0800 /* 10T Half Duplex Capable */
689#define MII_SR_10T_FD_CAPS 0x1000 /* 10T Full Duplex Capable */
690#define MII_SR_100X_HD_CAPS 0x2000 /* 100X Half Duplex Capable */
691#define MII_SR_100X_FD_CAPS 0x4000 /* 100X Full Duplex Capable */
692#define MII_SR_100T4_CAPS 0x8000 /* 100T4 Capable */
693
694/* Link partner ability register. */
695#define MII_LPA_SLCT 0x001f /* Same as advertise selector */
696#define MII_LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
697#define MII_LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
698#define MII_LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
699#define MII_LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
700#define MII_LPA_100BASE4 0x0200 /* 100BASE-T4 */
701#define MII_LPA_PAUSE 0x0400 /* PAUSE */
702#define MII_LPA_ASYPAUSE 0x0800 /* Asymmetrical PAUSE */
703#define MII_LPA_RFAULT 0x2000 /* Link partner faulted */
704#define MII_LPA_LPACK 0x4000 /* Link partner acked us */
705#define MII_LPA_NPAGE 0x8000 /* Next page bit */
706
707/* Autoneg Advertisement Register */ 643/* Autoneg Advertisement Register */
708#define MII_AR_SELECTOR_FIELD 0x0001 /* indicates IEEE 802.3 CSMA/CD */ 644#define MII_AR_DEFAULT_CAP_MASK 0
709#define MII_AR_10T_HD_CAPS 0x0020 /* 10T Half Duplex Capable */
710#define MII_AR_10T_FD_CAPS 0x0040 /* 10T Full Duplex Capable */
711#define MII_AR_100TX_HD_CAPS 0x0080 /* 100TX Half Duplex Capable */
712#define MII_AR_100TX_FD_CAPS 0x0100 /* 100TX Full Duplex Capable */
713#define MII_AR_100T4_CAPS 0x0200 /* 100T4 Capable */
714#define MII_AR_PAUSE 0x0400 /* Pause operation desired */
715#define MII_AR_ASM_DIR 0x0800 /* Asymmetric Pause Direction bit */
716#define MII_AR_REMOTE_FAULT 0x2000 /* Remote Fault detected */
717#define MII_AR_NEXT_PAGE 0x8000 /* Next Page ability supported */
718#define MII_AR_SPEED_MASK 0x01E0
719#define MII_AR_DEFAULT_CAP_MASK 0x0DE0
720 645
721/* 1000BASE-T Control Register */ 646/* 1000BASE-T Control Register */
722#define MII_AT001_CR_1000T_HD_CAPS 0x0100 /* Advertise 1000T HD capability */ 647#define MII_AT001_CR_1000T_SPEED_MASK \
723#define MII_AT001_CR_1000T_FD_CAPS 0x0200 /* Advertise 1000T FD capability */ 648 (ADVERTISE_1000FULL | ADVERTISE_1000HALF)
724#define MII_AT001_CR_1000T_REPEATER_DTE 0x0400 /* 1=Repeater/switch device port */ 649#define MII_AT001_CR_1000T_DEFAULT_CAP_MASK MII_AT001_CR_1000T_SPEED_MASK
725/* 0=DTE device */
726#define MII_AT001_CR_1000T_MS_VALUE 0x0800 /* 1=Configure PHY as Master */
727/* 0=Configure PHY as Slave */
728#define MII_AT001_CR_1000T_MS_ENABLE 0x1000 /* 1=Master/Slave manual config value */
729/* 0=Automatic Master/Slave config */
730#define MII_AT001_CR_1000T_TEST_MODE_NORMAL 0x0000 /* Normal Operation */
731#define MII_AT001_CR_1000T_TEST_MODE_1 0x2000 /* Transmit Waveform test */
732#define MII_AT001_CR_1000T_TEST_MODE_2 0x4000 /* Master Transmit Jitter test */
733#define MII_AT001_CR_1000T_TEST_MODE_3 0x6000 /* Slave Transmit Jitter test */
734#define MII_AT001_CR_1000T_TEST_MODE_4 0x8000 /* Transmitter Distortion test */
735#define MII_AT001_CR_1000T_SPEED_MASK 0x0300
736#define MII_AT001_CR_1000T_DEFAULT_CAP_MASK 0x0300
737
738/* 1000BASE-T Status Register */
739#define MII_AT001_SR_1000T_LP_HD_CAPS 0x0400 /* LP is 1000T HD capable */
740#define MII_AT001_SR_1000T_LP_FD_CAPS 0x0800 /* LP is 1000T FD capable */
741#define MII_AT001_SR_1000T_REMOTE_RX_STATUS 0x1000 /* Remote receiver OK */
742#define MII_AT001_SR_1000T_LOCAL_RX_STATUS 0x2000 /* Local receiver OK */
743#define MII_AT001_SR_1000T_MS_CONFIG_RES 0x4000 /* 1=Local TX is Master, 0=Slave */
744#define MII_AT001_SR_1000T_MS_CONFIG_FAULT 0x8000 /* Master/Slave config fault */
745#define MII_AT001_SR_1000T_REMOTE_RX_STATUS_SHIFT 12
746#define MII_AT001_SR_1000T_LOCAL_RX_STATUS_SHIFT 13
747
748/* Extended Status Register */
749#define MII_AT001_ESR_1000T_HD_CAPS 0x1000 /* 1000T HD capable */
750#define MII_AT001_ESR_1000T_FD_CAPS 0x2000 /* 1000T FD capable */
751#define MII_AT001_ESR_1000X_HD_CAPS 0x4000 /* 1000X HD capable */
752#define MII_AT001_ESR_1000X_FD_CAPS 0x8000 /* 1000X FD capable */
753 650
754/* AT001 PHY Specific Control Register */ 651/* AT001 PHY Specific Control Register */
755#define MII_AT001_PSCR_JABBER_DISABLE 0x0001 /* 1=Jabber Function disabled */ 652#define MII_AT001_PSCR_JABBER_DISABLE 0x0001 /* 1=Jabber Function disabled */
diff --git a/drivers/net/atl1e/atl1e_main.c b/drivers/net/atl1e/atl1e_main.c
index e28f8baf394e..bf7500ccd73f 100644
--- a/drivers/net/atl1e/atl1e_main.c
+++ b/drivers/net/atl1e/atl1e_main.c
@@ -2051,9 +2051,9 @@ static int atl1e_suspend(struct pci_dev *pdev, pm_message_t state)
2051 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data); 2051 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2052 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data); 2052 atl1e_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
2053 2053
2054 mii_advertise_data = MII_AR_10T_HD_CAPS; 2054 mii_advertise_data = ADVERTISE_10HALF;
2055 2055
2056 if ((atl1e_write_phy_reg(hw, MII_AT001_CR, 0) != 0) || 2056 if ((atl1e_write_phy_reg(hw, MII_CTRL1000, 0) != 0) ||
2057 (atl1e_write_phy_reg(hw, 2057 (atl1e_write_phy_reg(hw,
2058 MII_ADVERTISE, mii_advertise_data) != 0) || 2058 MII_ADVERTISE, mii_advertise_data) != 0) ||
2059 (atl1e_phy_commit(hw)) != 0) { 2059 (atl1e_phy_commit(hw)) != 0) {
diff --git a/drivers/net/bna/bnad.c b/drivers/net/bna/bnad.c
index fad912656fe4..9f356d5d0f33 100644
--- a/drivers/net/bna/bnad.c
+++ b/drivers/net/bna/bnad.c
@@ -126,22 +126,22 @@ bnad_free_all_txbufs(struct bnad *bnad,
126 } 126 }
127 unmap_array[unmap_cons].skb = NULL; 127 unmap_array[unmap_cons].skb = NULL;
128 128
129 pci_unmap_single(bnad->pcidev, 129 dma_unmap_single(&bnad->pcidev->dev,
130 pci_unmap_addr(&unmap_array[unmap_cons], 130 dma_unmap_addr(&unmap_array[unmap_cons],
131 dma_addr), skb_headlen(skb), 131 dma_addr), skb_headlen(skb),
132 PCI_DMA_TODEVICE); 132 DMA_TO_DEVICE);
133 133
134 pci_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 0); 134 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 0);
135 if (++unmap_cons >= unmap_q->q_depth) 135 if (++unmap_cons >= unmap_q->q_depth)
136 break; 136 break;
137 137
138 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 138 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
139 pci_unmap_page(bnad->pcidev, 139 dma_unmap_page(&bnad->pcidev->dev,
140 pci_unmap_addr(&unmap_array[unmap_cons], 140 dma_unmap_addr(&unmap_array[unmap_cons],
141 dma_addr), 141 dma_addr),
142 skb_shinfo(skb)->frags[i].size, 142 skb_shinfo(skb)->frags[i].size,
143 PCI_DMA_TODEVICE); 143 DMA_TO_DEVICE);
144 pci_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 144 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr,
145 0); 145 0);
146 if (++unmap_cons >= unmap_q->q_depth) 146 if (++unmap_cons >= unmap_q->q_depth)
147 break; 147 break;
@@ -199,23 +199,23 @@ bnad_free_txbufs(struct bnad *bnad,
199 sent_bytes += skb->len; 199 sent_bytes += skb->len;
200 wis -= BNA_TXQ_WI_NEEDED(1 + skb_shinfo(skb)->nr_frags); 200 wis -= BNA_TXQ_WI_NEEDED(1 + skb_shinfo(skb)->nr_frags);
201 201
202 pci_unmap_single(bnad->pcidev, 202 dma_unmap_single(&bnad->pcidev->dev,
203 pci_unmap_addr(&unmap_array[unmap_cons], 203 dma_unmap_addr(&unmap_array[unmap_cons],
204 dma_addr), skb_headlen(skb), 204 dma_addr), skb_headlen(skb),
205 PCI_DMA_TODEVICE); 205 DMA_TO_DEVICE);
206 pci_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 0); 206 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 0);
207 BNA_QE_INDX_ADD(unmap_cons, 1, unmap_q->q_depth); 207 BNA_QE_INDX_ADD(unmap_cons, 1, unmap_q->q_depth);
208 208
209 prefetch(&unmap_array[unmap_cons + 1]); 209 prefetch(&unmap_array[unmap_cons + 1]);
210 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) { 210 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
211 prefetch(&unmap_array[unmap_cons + 1]); 211 prefetch(&unmap_array[unmap_cons + 1]);
212 212
213 pci_unmap_page(bnad->pcidev, 213 dma_unmap_page(&bnad->pcidev->dev,
214 pci_unmap_addr(&unmap_array[unmap_cons], 214 dma_unmap_addr(&unmap_array[unmap_cons],
215 dma_addr), 215 dma_addr),
216 skb_shinfo(skb)->frags[i].size, 216 skb_shinfo(skb)->frags[i].size,
217 PCI_DMA_TODEVICE); 217 DMA_TO_DEVICE);
218 pci_unmap_addr_set(&unmap_array[unmap_cons], dma_addr, 218 dma_unmap_addr_set(&unmap_array[unmap_cons], dma_addr,
219 0); 219 0);
220 BNA_QE_INDX_ADD(unmap_cons, 1, unmap_q->q_depth); 220 BNA_QE_INDX_ADD(unmap_cons, 1, unmap_q->q_depth);
221 } 221 }
@@ -340,19 +340,22 @@ static void
340bnad_free_all_rxbufs(struct bnad *bnad, struct bna_rcb *rcb) 340bnad_free_all_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)
341{ 341{
342 struct bnad_unmap_q *unmap_q; 342 struct bnad_unmap_q *unmap_q;
343 struct bnad_skb_unmap *unmap_array;
343 struct sk_buff *skb; 344 struct sk_buff *skb;
344 int unmap_cons; 345 int unmap_cons;
345 346
346 unmap_q = rcb->unmap_q; 347 unmap_q = rcb->unmap_q;
348 unmap_array = unmap_q->unmap_array;
347 for (unmap_cons = 0; unmap_cons < unmap_q->q_depth; unmap_cons++) { 349 for (unmap_cons = 0; unmap_cons < unmap_q->q_depth; unmap_cons++) {
348 skb = unmap_q->unmap_array[unmap_cons].skb; 350 skb = unmap_array[unmap_cons].skb;
349 if (!skb) 351 if (!skb)
350 continue; 352 continue;
351 unmap_q->unmap_array[unmap_cons].skb = NULL; 353 unmap_array[unmap_cons].skb = NULL;
352 pci_unmap_single(bnad->pcidev, pci_unmap_addr(&unmap_q-> 354 dma_unmap_single(&bnad->pcidev->dev,
353 unmap_array[unmap_cons], 355 dma_unmap_addr(&unmap_array[unmap_cons],
354 dma_addr), rcb->rxq->buffer_size, 356 dma_addr),
355 PCI_DMA_FROMDEVICE); 357 rcb->rxq->buffer_size,
358 DMA_FROM_DEVICE);
356 dev_kfree_skb(skb); 359 dev_kfree_skb(skb);
357 } 360 }
358 bnad_reset_rcb(bnad, rcb); 361 bnad_reset_rcb(bnad, rcb);
@@ -391,9 +394,10 @@ bnad_alloc_n_post_rxbufs(struct bnad *bnad, struct bna_rcb *rcb)
391 skb->dev = bnad->netdev; 394 skb->dev = bnad->netdev;
392 skb_reserve(skb, NET_IP_ALIGN); 395 skb_reserve(skb, NET_IP_ALIGN);
393 unmap_array[unmap_prod].skb = skb; 396 unmap_array[unmap_prod].skb = skb;
394 dma_addr = pci_map_single(bnad->pcidev, skb->data, 397 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
395 rcb->rxq->buffer_size, PCI_DMA_FROMDEVICE); 398 rcb->rxq->buffer_size,
396 pci_unmap_addr_set(&unmap_array[unmap_prod], dma_addr, 399 DMA_FROM_DEVICE);
400 dma_unmap_addr_set(&unmap_array[unmap_prod], dma_addr,
397 dma_addr); 401 dma_addr);
398 BNA_SET_DMA_ADDR(dma_addr, &rxent->host_addr); 402 BNA_SET_DMA_ADDR(dma_addr, &rxent->host_addr);
399 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth); 403 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth);
@@ -434,8 +438,9 @@ bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)
434 struct bna_rcb *rcb = NULL; 438 struct bna_rcb *rcb = NULL;
435 unsigned int wi_range, packets = 0, wis = 0; 439 unsigned int wi_range, packets = 0, wis = 0;
436 struct bnad_unmap_q *unmap_q; 440 struct bnad_unmap_q *unmap_q;
441 struct bnad_skb_unmap *unmap_array;
437 struct sk_buff *skb; 442 struct sk_buff *skb;
438 u32 flags; 443 u32 flags, unmap_cons;
439 u32 qid0 = ccb->rcb[0]->rxq->rxq_id; 444 u32 qid0 = ccb->rcb[0]->rxq->rxq_id;
440 struct bna_pkt_rate *pkt_rt = &ccb->pkt_rate; 445 struct bna_pkt_rate *pkt_rt = &ccb->pkt_rate;
441 446
@@ -456,17 +461,17 @@ bnad_poll_cq(struct bnad *bnad, struct bna_ccb *ccb, int budget)
456 rcb = ccb->rcb[1]; 461 rcb = ccb->rcb[1];
457 462
458 unmap_q = rcb->unmap_q; 463 unmap_q = rcb->unmap_q;
464 unmap_array = unmap_q->unmap_array;
465 unmap_cons = unmap_q->consumer_index;
459 466
460 skb = unmap_q->unmap_array[unmap_q->consumer_index].skb; 467 skb = unmap_array[unmap_cons].skb;
461 BUG_ON(!(skb)); 468 BUG_ON(!(skb));
462 unmap_q->unmap_array[unmap_q->consumer_index].skb = NULL; 469 unmap_array[unmap_cons].skb = NULL;
463 pci_unmap_single(bnad->pcidev, 470 dma_unmap_single(&bnad->pcidev->dev,
464 pci_unmap_addr(&unmap_q-> 471 dma_unmap_addr(&unmap_array[unmap_cons],
465 unmap_array[unmap_q->
466 consumer_index],
467 dma_addr), 472 dma_addr),
468 rcb->rxq->buffer_size, 473 rcb->rxq->buffer_size,
469 PCI_DMA_FROMDEVICE); 474 DMA_FROM_DEVICE);
470 BNA_QE_INDX_ADD(unmap_q->consumer_index, 1, unmap_q->q_depth); 475 BNA_QE_INDX_ADD(unmap_q->consumer_index, 1, unmap_q->q_depth);
471 476
472 /* Should be more efficient ? Performance ? */ 477 /* Should be more efficient ? Performance ? */
@@ -1015,9 +1020,9 @@ bnad_mem_free(struct bnad *bnad,
1015 if (mem_info->mem_type == BNA_MEM_T_DMA) { 1020 if (mem_info->mem_type == BNA_MEM_T_DMA) {
1016 BNA_GET_DMA_ADDR(&(mem_info->mdl[i].dma), 1021 BNA_GET_DMA_ADDR(&(mem_info->mdl[i].dma),
1017 dma_pa); 1022 dma_pa);
1018 pci_free_consistent(bnad->pcidev, 1023 dma_free_coherent(&bnad->pcidev->dev,
1019 mem_info->mdl[i].len, 1024 mem_info->mdl[i].len,
1020 mem_info->mdl[i].kva, dma_pa); 1025 mem_info->mdl[i].kva, dma_pa);
1021 } else 1026 } else
1022 kfree(mem_info->mdl[i].kva); 1027 kfree(mem_info->mdl[i].kva);
1023 } 1028 }
@@ -1047,8 +1052,9 @@ bnad_mem_alloc(struct bnad *bnad,
1047 for (i = 0; i < mem_info->num; i++) { 1052 for (i = 0; i < mem_info->num; i++) {
1048 mem_info->mdl[i].len = mem_info->len; 1053 mem_info->mdl[i].len = mem_info->len;
1049 mem_info->mdl[i].kva = 1054 mem_info->mdl[i].kva =
1050 pci_alloc_consistent(bnad->pcidev, 1055 dma_alloc_coherent(&bnad->pcidev->dev,
1051 mem_info->len, &dma_pa); 1056 mem_info->len, &dma_pa,
1057 GFP_KERNEL);
1052 1058
1053 if (mem_info->mdl[i].kva == NULL) 1059 if (mem_info->mdl[i].kva == NULL)
1054 goto err_return; 1060 goto err_return;
@@ -2600,9 +2606,9 @@ bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2600 unmap_q->unmap_array[unmap_prod].skb = skb; 2606 unmap_q->unmap_array[unmap_prod].skb = skb;
2601 BUG_ON(!(skb_headlen(skb) <= BFI_TX_MAX_DATA_PER_VECTOR)); 2607 BUG_ON(!(skb_headlen(skb) <= BFI_TX_MAX_DATA_PER_VECTOR));
2602 txqent->vector[vect_id].length = htons(skb_headlen(skb)); 2608 txqent->vector[vect_id].length = htons(skb_headlen(skb));
2603 dma_addr = pci_map_single(bnad->pcidev, skb->data, skb_headlen(skb), 2609 dma_addr = dma_map_single(&bnad->pcidev->dev, skb->data,
2604 PCI_DMA_TODEVICE); 2610 skb_headlen(skb), DMA_TO_DEVICE);
2605 pci_unmap_addr_set(&unmap_q->unmap_array[unmap_prod], dma_addr, 2611 dma_unmap_addr_set(&unmap_q->unmap_array[unmap_prod], dma_addr,
2606 dma_addr); 2612 dma_addr);
2607 2613
2608 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr); 2614 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr);
@@ -2630,11 +2636,9 @@ bnad_start_xmit(struct sk_buff *skb, struct net_device *netdev)
2630 2636
2631 BUG_ON(!(size <= BFI_TX_MAX_DATA_PER_VECTOR)); 2637 BUG_ON(!(size <= BFI_TX_MAX_DATA_PER_VECTOR));
2632 txqent->vector[vect_id].length = htons(size); 2638 txqent->vector[vect_id].length = htons(size);
2633 dma_addr = 2639 dma_addr = dma_map_page(&bnad->pcidev->dev, frag->page,
2634 pci_map_page(bnad->pcidev, frag->page, 2640 frag->page_offset, size, DMA_TO_DEVICE);
2635 frag->page_offset, size, 2641 dma_unmap_addr_set(&unmap_q->unmap_array[unmap_prod], dma_addr,
2636 PCI_DMA_TODEVICE);
2637 pci_unmap_addr_set(&unmap_q->unmap_array[unmap_prod], dma_addr,
2638 dma_addr); 2642 dma_addr);
2639 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr); 2643 BNA_SET_DMA_ADDR(dma_addr, &txqent->vector[vect_id].host_addr);
2640 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth); 2644 BNA_QE_INDX_ADD(unmap_prod, 1, unmap_q->q_depth);
@@ -3022,14 +3026,14 @@ bnad_pci_init(struct bnad *bnad,
3022 err = pci_request_regions(pdev, BNAD_NAME); 3026 err = pci_request_regions(pdev, BNAD_NAME);
3023 if (err) 3027 if (err)
3024 goto disable_device; 3028 goto disable_device;
3025 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) && 3029 if (!dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) &&
3026 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) { 3030 !dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
3027 *using_dac = 1; 3031 *using_dac = 1;
3028 } else { 3032 } else {
3029 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 3033 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
3030 if (err) { 3034 if (err) {
3031 err = pci_set_consistent_dma_mask(pdev, 3035 err = dma_set_coherent_mask(&pdev->dev,
3032 DMA_BIT_MASK(32)); 3036 DMA_BIT_MASK(32));
3033 if (err) 3037 if (err)
3034 goto release_regions; 3038 goto release_regions;
3035 } 3039 }
diff --git a/drivers/net/bna/bnad.h b/drivers/net/bna/bnad.h
index 8b1d51557def..a89117fa4970 100644
--- a/drivers/net/bna/bnad.h
+++ b/drivers/net/bna/bnad.h
@@ -181,7 +181,7 @@ struct bnad_rx_info {
181/* Unmap queues for Tx / Rx cleanup */ 181/* Unmap queues for Tx / Rx cleanup */
182struct bnad_skb_unmap { 182struct bnad_skb_unmap {
183 struct sk_buff *skb; 183 struct sk_buff *skb;
184 DECLARE_PCI_UNMAP_ADDR(dma_addr) 184 DEFINE_DMA_UNMAP_ADDR(dma_addr);
185}; 185};
186 186
187struct bnad_unmap_q { 187struct bnad_unmap_q {
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c
index df99edf3464a..2a961b7f7e17 100644
--- a/drivers/net/bnx2.c
+++ b/drivers/net/bnx2.c
@@ -435,7 +435,8 @@ bnx2_cnic_stop(struct bnx2 *bp)
435 struct cnic_ctl_info info; 435 struct cnic_ctl_info info;
436 436
437 mutex_lock(&bp->cnic_lock); 437 mutex_lock(&bp->cnic_lock);
438 c_ops = bp->cnic_ops; 438 c_ops = rcu_dereference_protected(bp->cnic_ops,
439 lockdep_is_held(&bp->cnic_lock));
439 if (c_ops) { 440 if (c_ops) {
440 info.cmd = CNIC_CTL_STOP_CMD; 441 info.cmd = CNIC_CTL_STOP_CMD;
441 c_ops->cnic_ctl(bp->cnic_data, &info); 442 c_ops->cnic_ctl(bp->cnic_data, &info);
@@ -450,7 +451,8 @@ bnx2_cnic_start(struct bnx2 *bp)
450 struct cnic_ctl_info info; 451 struct cnic_ctl_info info;
451 452
452 mutex_lock(&bp->cnic_lock); 453 mutex_lock(&bp->cnic_lock);
453 c_ops = bp->cnic_ops; 454 c_ops = rcu_dereference_protected(bp->cnic_ops,
455 lockdep_is_held(&bp->cnic_lock));
454 if (c_ops) { 456 if (c_ops) {
455 if (!(bp->flags & BNX2_FLAG_USING_MSIX)) { 457 if (!(bp->flags & BNX2_FLAG_USING_MSIX)) {
456 struct bnx2_napi *bnapi = &bp->bnx2_napi[0]; 458 struct bnx2_napi *bnapi = &bp->bnx2_napi[0];
@@ -7553,6 +7555,10 @@ bnx2_set_flags(struct net_device *dev, u32 data)
7553 !(data & ETH_FLAG_RXVLAN)) 7555 !(data & ETH_FLAG_RXVLAN))
7554 return -EINVAL; 7556 return -EINVAL;
7555 7557
7558 /* TSO with VLAN tag won't work with current firmware */
7559 if (!(data & ETH_FLAG_TXVLAN))
7560 return -EINVAL;
7561
7556 rc = ethtool_op_set_flags(dev, data, ETH_FLAG_RXHASH | ETH_FLAG_RXVLAN | 7562 rc = ethtool_op_set_flags(dev, data, ETH_FLAG_RXHASH | ETH_FLAG_RXVLAN |
7557 ETH_FLAG_TXVLAN); 7563 ETH_FLAG_TXVLAN);
7558 if (rc) 7564 if (rc)
@@ -7962,11 +7968,8 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
7962 7968
7963 /* AER (Advanced Error Reporting) hooks */ 7969 /* AER (Advanced Error Reporting) hooks */
7964 err = pci_enable_pcie_error_reporting(pdev); 7970 err = pci_enable_pcie_error_reporting(pdev);
7965 if (err) { 7971 if (!err)
7966 dev_err(&pdev->dev, "pci_enable_pcie_error_reporting " 7972 bp->flags |= BNX2_FLAG_AER_ENABLED;
7967 "failed 0x%x\n", err);
7968 /* non-fatal, continue */
7969 }
7970 7973
7971 } else { 7974 } else {
7972 bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX); 7975 bp->pcix_cap = pci_find_capability(pdev, PCI_CAP_ID_PCIX);
@@ -8229,8 +8232,10 @@ bnx2_init_board(struct pci_dev *pdev, struct net_device *dev)
8229 return 0; 8232 return 0;
8230 8233
8231err_out_unmap: 8234err_out_unmap:
8232 if (bp->flags & BNX2_FLAG_PCIE) 8235 if (bp->flags & BNX2_FLAG_AER_ENABLED) {
8233 pci_disable_pcie_error_reporting(pdev); 8236 pci_disable_pcie_error_reporting(pdev);
8237 bp->flags &= ~BNX2_FLAG_AER_ENABLED;
8238 }
8234 8239
8235 if (bp->regview) { 8240 if (bp->regview) {
8236 iounmap(bp->regview); 8241 iounmap(bp->regview);
@@ -8312,7 +8317,7 @@ static const struct net_device_ops bnx2_netdev_ops = {
8312#endif 8317#endif
8313}; 8318};
8314 8319
8315static void inline vlan_features_add(struct net_device *dev, unsigned long flags) 8320static void inline vlan_features_add(struct net_device *dev, u32 flags)
8316{ 8321{
8317 dev->vlan_features |= flags; 8322 dev->vlan_features |= flags;
8318} 8323}
@@ -8418,8 +8423,10 @@ bnx2_remove_one(struct pci_dev *pdev)
8418 8423
8419 kfree(bp->temp_stats_blk); 8424 kfree(bp->temp_stats_blk);
8420 8425
8421 if (bp->flags & BNX2_FLAG_PCIE) 8426 if (bp->flags & BNX2_FLAG_AER_ENABLED) {
8422 pci_disable_pcie_error_reporting(pdev); 8427 pci_disable_pcie_error_reporting(pdev);
8428 bp->flags &= ~BNX2_FLAG_AER_ENABLED;
8429 }
8423 8430
8424 free_netdev(dev); 8431 free_netdev(dev);
8425 8432
@@ -8535,7 +8542,7 @@ static pci_ers_result_t bnx2_io_slot_reset(struct pci_dev *pdev)
8535 } 8542 }
8536 rtnl_unlock(); 8543 rtnl_unlock();
8537 8544
8538 if (!(bp->flags & BNX2_FLAG_PCIE)) 8545 if (!(bp->flags & BNX2_FLAG_AER_ENABLED))
8539 return result; 8546 return result;
8540 8547
8541 err = pci_cleanup_aer_uncorrect_error_status(pdev); 8548 err = pci_cleanup_aer_uncorrect_error_status(pdev);
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 5488a2e82fe9..7a5e88f831f6 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -6207,6 +6207,8 @@ struct l2_fhdr {
6207 6207
6208#define BNX2_CP_SCRATCH 0x001a0000 6208#define BNX2_CP_SCRATCH 0x001a0000
6209 6209
6210#define BNX2_FW_MAX_ISCSI_CONN 0x001a0080
6211
6210 6212
6211/* 6213/*
6212 * mcp_reg definition 6214 * mcp_reg definition
@@ -6741,6 +6743,7 @@ struct bnx2 {
6741#define BNX2_FLAG_JUMBO_BROKEN 0x00000800 6743#define BNX2_FLAG_JUMBO_BROKEN 0x00000800
6742#define BNX2_FLAG_CAN_KEEP_VLAN 0x00001000 6744#define BNX2_FLAG_CAN_KEEP_VLAN 0x00001000
6743#define BNX2_FLAG_BROKEN_STATS 0x00002000 6745#define BNX2_FLAG_BROKEN_STATS 0x00002000
6746#define BNX2_FLAG_AER_ENABLED 0x00004000
6744 6747
6745 struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC]; 6748 struct bnx2_napi bnx2_napi[BNX2_MAX_MSIX_VEC];
6746 6749
@@ -6758,7 +6761,7 @@ struct bnx2 {
6758 u32 tx_wake_thresh; 6761 u32 tx_wake_thresh;
6759 6762
6760#ifdef BCM_CNIC 6763#ifdef BCM_CNIC
6761 struct cnic_ops *cnic_ops; 6764 struct cnic_ops __rcu *cnic_ops;
6762 void *cnic_data; 6765 void *cnic_data;
6763#endif 6766#endif
6764 6767
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h
index a6cd335c9436..ff87ec33d00e 100644
--- a/drivers/net/bnx2x/bnx2x.h
+++ b/drivers/net/bnx2x/bnx2x.h
@@ -22,8 +22,8 @@
22 * (you will need to reboot afterwards) */ 22 * (you will need to reboot afterwards) */
23/* #define BNX2X_STOP_ON_ERROR */ 23/* #define BNX2X_STOP_ON_ERROR */
24 24
25#define DRV_MODULE_VERSION "1.62.00-3" 25#define DRV_MODULE_VERSION "1.62.11-0"
26#define DRV_MODULE_RELDATE "2010/12/21" 26#define DRV_MODULE_RELDATE "2011/01/31"
27#define BNX2X_BC_VER 0x040200 27#define BNX2X_BC_VER 0x040200
28 28
29#define BNX2X_MULTI_QUEUE 29#define BNX2X_MULTI_QUEUE
@@ -976,8 +976,12 @@ struct bnx2x {
976#define MF_FUNC_DIS 0x1000 976#define MF_FUNC_DIS 0x1000
977#define FCOE_MACS_SET 0x2000 977#define FCOE_MACS_SET 0x2000
978#define NO_FCOE_FLAG 0x4000 978#define NO_FCOE_FLAG 0x4000
979#define NO_ISCSI_OOO_FLAG 0x8000
980#define NO_ISCSI_FLAG 0x10000
979 981
980#define NO_FCOE(bp) ((bp)->flags & NO_FCOE_FLAG) 982#define NO_FCOE(bp) ((bp)->flags & NO_FCOE_FLAG)
983#define NO_ISCSI(bp) ((bp)->flags & NO_ISCSI_FLAG)
984#define NO_ISCSI_OOO(bp) ((bp)->flags & NO_ISCSI_OOO_FLAG)
981 985
982 int pf_num; /* absolute PF number */ 986 int pf_num; /* absolute PF number */
983 int pfid; /* per-path PF number */ 987 int pfid; /* per-path PF number */
@@ -1110,7 +1114,7 @@ struct bnx2x {
1110#define BNX2X_CNIC_FLAG_MAC_SET 1 1114#define BNX2X_CNIC_FLAG_MAC_SET 1
1111 void *t2; 1115 void *t2;
1112 dma_addr_t t2_mapping; 1116 dma_addr_t t2_mapping;
1113 struct cnic_ops *cnic_ops; 1117 struct cnic_ops __rcu *cnic_ops;
1114 void *cnic_data; 1118 void *cnic_data;
1115 u32 cnic_tag; 1119 u32 cnic_tag;
1116 struct cnic_eth_dev cnic_eth_dev; 1120 struct cnic_eth_dev cnic_eth_dev;
@@ -1125,7 +1129,6 @@ struct bnx2x {
1125 u16 cnic_kwq_pending; 1129 u16 cnic_kwq_pending;
1126 u16 cnic_spq_pending; 1130 u16 cnic_spq_pending;
1127 struct mutex cnic_mutex; 1131 struct mutex cnic_mutex;
1128 u8 iscsi_mac[ETH_ALEN];
1129 u8 fip_mac[ETH_ALEN]; 1132 u8 fip_mac[ETH_ALEN];
1130#endif 1133#endif
1131 1134
diff --git a/drivers/net/bnx2x/bnx2x_hsi.h b/drivers/net/bnx2x/bnx2x_hsi.h
index 6238d4f63989..be503cc0a50b 100644
--- a/drivers/net/bnx2x/bnx2x_hsi.h
+++ b/drivers/net/bnx2x/bnx2x_hsi.h
@@ -11,20 +11,27 @@
11 11
12#include "bnx2x_fw_defs.h" 12#include "bnx2x_fw_defs.h"
13 13
14#define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e
15
14struct license_key { 16struct license_key {
15 u32 reserved[6]; 17 u32 reserved[6];
16 18
17#if defined(__BIG_ENDIAN) 19 u32 max_iscsi_conn;
18 u16 max_iscsi_init_conn; 20#define BNX2X_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF
19 u16 max_iscsi_trgt_conn; 21#define BNX2X_MAX_ISCSI_TRGT_CONN_SHIFT 0
20#elif defined(__LITTLE_ENDIAN) 22#define BNX2X_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000
21 u16 max_iscsi_trgt_conn; 23#define BNX2X_MAX_ISCSI_INIT_CONN_SHIFT 16
22 u16 max_iscsi_init_conn;
23#endif
24 24
25 u32 reserved_a[6]; 25 u32 reserved_a;
26}; 26
27 u32 max_fcoe_conn;
28#define BNX2X_MAX_FCOE_TRGT_CONN_MASK 0xFFFF
29#define BNX2X_MAX_FCOE_TRGT_CONN_SHIFT 0
30#define BNX2X_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000
31#define BNX2X_MAX_FCOE_INIT_CONN_SHIFT 16
27 32
33 u32 reserved_b[4];
34};
28 35
29#define PORT_0 0 36#define PORT_0 0
30#define PORT_1 1 37#define PORT_1 1
@@ -237,8 +244,26 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
237#define PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_SHIFT 16 244#define PORT_HW_CFG_SERDES_RX_DRV_EQUALIZER_SHIFT 16
238 245
239 246
240 u32 Reserved0[16]; /* 0x158 */ 247 u32 Reserved0[3]; /* 0x158 */
241 248 /* Controls the TX laser of the SFP+ module */
249 u32 sfp_ctrl; /* 0x164 */
250#define PORT_HW_CFG_TX_LASER_MASK 0x000000FF
251#define PORT_HW_CFG_TX_LASER_SHIFT 0
252#define PORT_HW_CFG_TX_LASER_MDIO 0x00000000
253#define PORT_HW_CFG_TX_LASER_GPIO0 0x00000001
254#define PORT_HW_CFG_TX_LASER_GPIO1 0x00000002
255#define PORT_HW_CFG_TX_LASER_GPIO2 0x00000003
256#define PORT_HW_CFG_TX_LASER_GPIO3 0x00000004
257
258 /* Controls the fault module LED of the SFP+ */
259#define PORT_HW_CFG_FAULT_MODULE_LED_MASK 0x0000FF00
260#define PORT_HW_CFG_FAULT_MODULE_LED_SHIFT 8
261#define PORT_HW_CFG_FAULT_MODULE_LED_GPIO0 0x00000000
262#define PORT_HW_CFG_FAULT_MODULE_LED_GPIO1 0x00000100
263#define PORT_HW_CFG_FAULT_MODULE_LED_GPIO2 0x00000200
264#define PORT_HW_CFG_FAULT_MODULE_LED_GPIO3 0x00000300
265#define PORT_HW_CFG_FAULT_MODULE_LED_DISABLED 0x00000400
266 u32 Reserved01[12]; /* 0x158 */
242 /* for external PHY, or forced mode or during AN */ 267 /* for external PHY, or forced mode or during AN */
243 u16 xgxs_config_rx[4]; /* 0x198 */ 268 u16 xgxs_config_rx[4]; /* 0x198 */
244 269
@@ -246,12 +271,78 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
246 271
247 u32 Reserved1[56]; /* 0x1A8 */ 272 u32 Reserved1[56]; /* 0x1A8 */
248 u32 default_cfg; /* 0x288 */ 273 u32 default_cfg; /* 0x288 */
274#define PORT_HW_CFG_GPIO0_CONFIG_MASK 0x00000003
275#define PORT_HW_CFG_GPIO0_CONFIG_SHIFT 0
276#define PORT_HW_CFG_GPIO0_CONFIG_NA 0x00000000
277#define PORT_HW_CFG_GPIO0_CONFIG_LOW 0x00000001
278#define PORT_HW_CFG_GPIO0_CONFIG_HIGH 0x00000002
279#define PORT_HW_CFG_GPIO0_CONFIG_INPUT 0x00000003
280
281#define PORT_HW_CFG_GPIO1_CONFIG_MASK 0x0000000C
282#define PORT_HW_CFG_GPIO1_CONFIG_SHIFT 2
283#define PORT_HW_CFG_GPIO1_CONFIG_NA 0x00000000
284#define PORT_HW_CFG_GPIO1_CONFIG_LOW 0x00000004
285#define PORT_HW_CFG_GPIO1_CONFIG_HIGH 0x00000008
286#define PORT_HW_CFG_GPIO1_CONFIG_INPUT 0x0000000c
287
288#define PORT_HW_CFG_GPIO2_CONFIG_MASK 0x00000030
289#define PORT_HW_CFG_GPIO2_CONFIG_SHIFT 4
290#define PORT_HW_CFG_GPIO2_CONFIG_NA 0x00000000
291#define PORT_HW_CFG_GPIO2_CONFIG_LOW 0x00000010
292#define PORT_HW_CFG_GPIO2_CONFIG_HIGH 0x00000020
293#define PORT_HW_CFG_GPIO2_CONFIG_INPUT 0x00000030
294
295#define PORT_HW_CFG_GPIO3_CONFIG_MASK 0x000000C0
296#define PORT_HW_CFG_GPIO3_CONFIG_SHIFT 6
297#define PORT_HW_CFG_GPIO3_CONFIG_NA 0x00000000
298#define PORT_HW_CFG_GPIO3_CONFIG_LOW 0x00000040
299#define PORT_HW_CFG_GPIO3_CONFIG_HIGH 0x00000080
300#define PORT_HW_CFG_GPIO3_CONFIG_INPUT 0x000000c0
301
302 /*
303 * When KR link is required to be set to force which is not
304 * KR-compliant, this parameter determine what is the trigger for it.
305 * When GPIO is selected, low input will force the speed. Currently
306 * default speed is 1G. In the future, it may be widen to select the
307 * forced speed in with another parameter. Note when force-1G is
308 * enabled, it override option 56: Link Speed option.
309 */
310#define PORT_HW_CFG_FORCE_KR_ENABLER_MASK 0x00000F00
311#define PORT_HW_CFG_FORCE_KR_ENABLER_SHIFT 8
312#define PORT_HW_CFG_FORCE_KR_ENABLER_NOT_FORCED 0x00000000
313#define PORT_HW_CFG_FORCE_KR_ENABLER_GPIO0_P0 0x00000100
314#define PORT_HW_CFG_FORCE_KR_ENABLER_GPIO1_P0 0x00000200
315#define PORT_HW_CFG_FORCE_KR_ENABLER_GPIO2_P0 0x00000300
316#define PORT_HW_CFG_FORCE_KR_ENABLER_GPIO3_P0 0x00000400
317#define PORT_HW_CFG_FORCE_KR_ENABLER_GPIO0_P1 0x00000500
318#define PORT_HW_CFG_FORCE_KR_ENABLER_GPIO1_P1 0x00000600
319#define PORT_HW_CFG_FORCE_KR_ENABLER_GPIO2_P1 0x00000700
320#define PORT_HW_CFG_FORCE_KR_ENABLER_GPIO3_P1 0x00000800
321#define PORT_HW_CFG_FORCE_KR_ENABLER_FORCED 0x00000900
322 /* Enable to determine with which GPIO to reset the external phy */
323#define PORT_HW_CFG_EXT_PHY_GPIO_RST_MASK 0x000F0000
324#define PORT_HW_CFG_EXT_PHY_GPIO_RST_SHIFT 16
325#define PORT_HW_CFG_EXT_PHY_GPIO_RST_PHY_TYPE 0x00000000
326#define PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO0_P0 0x00010000
327#define PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO1_P0 0x00020000
328#define PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO2_P0 0x00030000
329#define PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO3_P0 0x00040000
330#define PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO0_P1 0x00050000
331#define PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO1_P1 0x00060000
332#define PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO2_P1 0x00070000
333#define PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO3_P1 0x00080000
249 /* Enable BAM on KR */ 334 /* Enable BAM on KR */
250#define PORT_HW_CFG_ENABLE_BAM_ON_KR_MASK 0x00100000 335#define PORT_HW_CFG_ENABLE_BAM_ON_KR_MASK 0x00100000
251#define PORT_HW_CFG_ENABLE_BAM_ON_KR_SHIFT 20 336#define PORT_HW_CFG_ENABLE_BAM_ON_KR_SHIFT 20
252#define PORT_HW_CFG_ENABLE_BAM_ON_KR_DISABLED 0x00000000 337#define PORT_HW_CFG_ENABLE_BAM_ON_KR_DISABLED 0x00000000
253#define PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED 0x00100000 338#define PORT_HW_CFG_ENABLE_BAM_ON_KR_ENABLED 0x00100000
254 339
340 /* Enable Common Mode Sense */
341#define PORT_HW_CFG_ENABLE_CMS_MASK 0x00200000
342#define PORT_HW_CFG_ENABLE_CMS_SHIFT 21
343#define PORT_HW_CFG_ENABLE_CMS_DISABLED 0x00000000
344#define PORT_HW_CFG_ENABLE_CMS_ENABLED 0x00200000
345
255 u32 speed_capability_mask2; /* 0x28C */ 346 u32 speed_capability_mask2; /* 0x28C */
256#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_MASK 0x0000FFFF 347#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_MASK 0x0000FFFF
257#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_SHIFT 0 348#define PORT_HW_CFG_SPEED_CAPABILITY2_D3_SHIFT 0
@@ -352,6 +443,10 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
352#define PORT_HW_CFG_LANE_SWAP_CFG_31203120 0x0000d8d8 443#define PORT_HW_CFG_LANE_SWAP_CFG_31203120 0x0000d8d8
353 /* forced only */ 444 /* forced only */
354#define PORT_HW_CFG_LANE_SWAP_CFG_32103210 0x0000e4e4 445#define PORT_HW_CFG_LANE_SWAP_CFG_32103210 0x0000e4e4
446 /* Indicate whether to swap the external phy polarity */
447#define PORT_HW_CFG_SWAP_PHY_POLARITY_MASK 0x00010000
448#define PORT_HW_CFG_SWAP_PHY_POLARITY_DISABLED 0x00000000
449#define PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED 0x00010000
355 450
356 u32 external_phy_config; 451 u32 external_phy_config;
357#define PORT_HW_CFG_SERDES_EXT_PHY_TYPE_MASK 0xff000000 452#define PORT_HW_CFG_SERDES_EXT_PHY_TYPE_MASK 0xff000000
@@ -377,6 +472,7 @@ struct port_hw_cfg { /* port 0: 0x12c port 1: 0x2bc */
377#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727 0x00000900 472#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727 0x00000900
378#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727_NOC 0x00000a00 473#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727_NOC 0x00000a00
379#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823 0x00000b00 474#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823 0x00000b00
475#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833 0x00000d00
380#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE 0x0000fd00 476#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_FAILURE 0x0000fd00
381#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN 0x0000ff00 477#define PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN 0x0000ff00
382 478
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c
index 43b0de24f391..f2f367d4e74d 100644
--- a/drivers/net/bnx2x/bnx2x_link.c
+++ b/drivers/net/bnx2x/bnx2x_link.c
@@ -1,4 +1,4 @@
1/* Copyright 2008-2009 Broadcom Corporation 1/* Copyright 2008-2011 Broadcom Corporation
2 * 2 *
3 * Unless you and Broadcom execute a separate written software license 3 * Unless you and Broadcom execute a separate written software license
4 * agreement governing use of this software, this software is licensed to you 4 * agreement governing use of this software, this software is licensed to you
@@ -28,12 +28,13 @@
28 28
29/********************************************************/ 29/********************************************************/
30#define ETH_HLEN 14 30#define ETH_HLEN 14
31#define ETH_OVREHEAD (ETH_HLEN + 8 + 8)/* 16 for CRC + VLAN + LLC */ 31/* L2 header size + 2*VLANs (8 bytes) + LLC SNAP (8 bytes) */
32#define ETH_OVREHEAD (ETH_HLEN + 8 + 8)
32#define ETH_MIN_PACKET_SIZE 60 33#define ETH_MIN_PACKET_SIZE 60
33#define ETH_MAX_PACKET_SIZE 1500 34#define ETH_MAX_PACKET_SIZE 1500
34#define ETH_MAX_JUMBO_PACKET_SIZE 9600 35#define ETH_MAX_JUMBO_PACKET_SIZE 9600
35#define MDIO_ACCESS_TIMEOUT 1000 36#define MDIO_ACCESS_TIMEOUT 1000
36#define BMAC_CONTROL_RX_ENABLE 2 37#define BMAC_CONTROL_RX_ENABLE 2
37 38
38/***********************************************************/ 39/***********************************************************/
39/* Shortcut definitions */ 40/* Shortcut definitions */
@@ -79,7 +80,7 @@
79 80
80#define AUTONEG_CL37 SHARED_HW_CFG_AN_ENABLE_CL37 81#define AUTONEG_CL37 SHARED_HW_CFG_AN_ENABLE_CL37
81#define AUTONEG_CL73 SHARED_HW_CFG_AN_ENABLE_CL73 82#define AUTONEG_CL73 SHARED_HW_CFG_AN_ENABLE_CL73
82#define AUTONEG_BAM SHARED_HW_CFG_AN_ENABLE_BAM 83#define AUTONEG_BAM SHARED_HW_CFG_AN_ENABLE_BAM
83#define AUTONEG_PARALLEL \ 84#define AUTONEG_PARALLEL \
84 SHARED_HW_CFG_AN_ENABLE_PARALLEL_DETECTION 85 SHARED_HW_CFG_AN_ENABLE_PARALLEL_DETECTION
85#define AUTONEG_SGMII_FIBER_AUTODET \ 86#define AUTONEG_SGMII_FIBER_AUTODET \
@@ -112,10 +113,10 @@
112#define GP_STATUS_10G_KX4 \ 113#define GP_STATUS_10G_KX4 \
113 MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KX4 114 MDIO_GP_STATUS_TOP_AN_STATUS1_ACTUAL_SPEED_10G_KX4
114 115
115#define LINK_10THD LINK_STATUS_SPEED_AND_DUPLEX_10THD 116#define LINK_10THD LINK_STATUS_SPEED_AND_DUPLEX_10THD
116#define LINK_10TFD LINK_STATUS_SPEED_AND_DUPLEX_10TFD 117#define LINK_10TFD LINK_STATUS_SPEED_AND_DUPLEX_10TFD
117#define LINK_100TXHD LINK_STATUS_SPEED_AND_DUPLEX_100TXHD 118#define LINK_100TXHD LINK_STATUS_SPEED_AND_DUPLEX_100TXHD
118#define LINK_100T4 LINK_STATUS_SPEED_AND_DUPLEX_100T4 119#define LINK_100T4 LINK_STATUS_SPEED_AND_DUPLEX_100T4
119#define LINK_100TXFD LINK_STATUS_SPEED_AND_DUPLEX_100TXFD 120#define LINK_100TXFD LINK_STATUS_SPEED_AND_DUPLEX_100TXFD
120#define LINK_1000THD LINK_STATUS_SPEED_AND_DUPLEX_1000THD 121#define LINK_1000THD LINK_STATUS_SPEED_AND_DUPLEX_1000THD
121#define LINK_1000TFD LINK_STATUS_SPEED_AND_DUPLEX_1000TFD 122#define LINK_1000TFD LINK_STATUS_SPEED_AND_DUPLEX_1000TFD
@@ -123,18 +124,18 @@
123#define LINK_2500THD LINK_STATUS_SPEED_AND_DUPLEX_2500THD 124#define LINK_2500THD LINK_STATUS_SPEED_AND_DUPLEX_2500THD
124#define LINK_2500TFD LINK_STATUS_SPEED_AND_DUPLEX_2500TFD 125#define LINK_2500TFD LINK_STATUS_SPEED_AND_DUPLEX_2500TFD
125#define LINK_2500XFD LINK_STATUS_SPEED_AND_DUPLEX_2500XFD 126#define LINK_2500XFD LINK_STATUS_SPEED_AND_DUPLEX_2500XFD
126#define LINK_10GTFD LINK_STATUS_SPEED_AND_DUPLEX_10GTFD 127#define LINK_10GTFD LINK_STATUS_SPEED_AND_DUPLEX_10GTFD
127#define LINK_10GXFD LINK_STATUS_SPEED_AND_DUPLEX_10GXFD 128#define LINK_10GXFD LINK_STATUS_SPEED_AND_DUPLEX_10GXFD
128#define LINK_12GTFD LINK_STATUS_SPEED_AND_DUPLEX_12GTFD 129#define LINK_12GTFD LINK_STATUS_SPEED_AND_DUPLEX_12GTFD
129#define LINK_12GXFD LINK_STATUS_SPEED_AND_DUPLEX_12GXFD 130#define LINK_12GXFD LINK_STATUS_SPEED_AND_DUPLEX_12GXFD
130#define LINK_12_5GTFD LINK_STATUS_SPEED_AND_DUPLEX_12_5GTFD 131#define LINK_12_5GTFD LINK_STATUS_SPEED_AND_DUPLEX_12_5GTFD
131#define LINK_12_5GXFD LINK_STATUS_SPEED_AND_DUPLEX_12_5GXFD 132#define LINK_12_5GXFD LINK_STATUS_SPEED_AND_DUPLEX_12_5GXFD
132#define LINK_13GTFD LINK_STATUS_SPEED_AND_DUPLEX_13GTFD 133#define LINK_13GTFD LINK_STATUS_SPEED_AND_DUPLEX_13GTFD
133#define LINK_13GXFD LINK_STATUS_SPEED_AND_DUPLEX_13GXFD 134#define LINK_13GXFD LINK_STATUS_SPEED_AND_DUPLEX_13GXFD
134#define LINK_15GTFD LINK_STATUS_SPEED_AND_DUPLEX_15GTFD 135#define LINK_15GTFD LINK_STATUS_SPEED_AND_DUPLEX_15GTFD
135#define LINK_15GXFD LINK_STATUS_SPEED_AND_DUPLEX_15GXFD 136#define LINK_15GXFD LINK_STATUS_SPEED_AND_DUPLEX_15GXFD
136#define LINK_16GTFD LINK_STATUS_SPEED_AND_DUPLEX_16GTFD 137#define LINK_16GTFD LINK_STATUS_SPEED_AND_DUPLEX_16GTFD
137#define LINK_16GXFD LINK_STATUS_SPEED_AND_DUPLEX_16GXFD 138#define LINK_16GXFD LINK_STATUS_SPEED_AND_DUPLEX_16GXFD
138 139
139#define PHY_XGXS_FLAG 0x1 140#define PHY_XGXS_FLAG 0x1
140#define PHY_SGMII_FLAG 0x2 141#define PHY_SGMII_FLAG 0x2
@@ -142,7 +143,7 @@
142 143
143/* */ 144/* */
144#define SFP_EEPROM_CON_TYPE_ADDR 0x2 145#define SFP_EEPROM_CON_TYPE_ADDR 0x2
145 #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7 146 #define SFP_EEPROM_CON_TYPE_VAL_LC 0x7
146 #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21 147 #define SFP_EEPROM_CON_TYPE_VAL_COPPER 0x21
147 148
148 149
@@ -153,15 +154,15 @@
153 154
154#define SFP_EEPROM_FC_TX_TECH_ADDR 0x8 155#define SFP_EEPROM_FC_TX_TECH_ADDR 0x8
155 #define SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE 0x4 156 #define SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_PASSIVE 0x4
156 #define SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE 0x8 157 #define SFP_EEPROM_FC_TX_TECH_BITMASK_COPPER_ACTIVE 0x8
157 158
158#define SFP_EEPROM_OPTIONS_ADDR 0x40 159#define SFP_EEPROM_OPTIONS_ADDR 0x40
159 #define SFP_EEPROM_OPTIONS_LINEAR_RX_OUT_MASK 0x1 160 #define SFP_EEPROM_OPTIONS_LINEAR_RX_OUT_MASK 0x1
160#define SFP_EEPROM_OPTIONS_SIZE 2 161#define SFP_EEPROM_OPTIONS_SIZE 2
161 162
162#define EDC_MODE_LINEAR 0x0022 163#define EDC_MODE_LINEAR 0x0022
163#define EDC_MODE_LIMITING 0x0044 164#define EDC_MODE_LIMITING 0x0044
164#define EDC_MODE_PASSIVE_DAC 0x0055 165#define EDC_MODE_PASSIVE_DAC 0x0055
165 166
166 167
167#define ETS_BW_LIMIT_CREDIT_UPPER_BOUND (0x5000) 168#define ETS_BW_LIMIT_CREDIT_UPPER_BOUND (0x5000)
@@ -170,24 +171,18 @@
170/* INTERFACE */ 171/* INTERFACE */
171/**********************************************************/ 172/**********************************************************/
172 173
173#define CL45_WR_OVER_CL22(_bp, _phy, _bank, _addr, _val) \ 174#define CL22_WR_OVER_CL45(_bp, _phy, _bank, _addr, _val) \
174 bnx2x_cl45_write(_bp, _phy, \ 175 bnx2x_cl45_write(_bp, _phy, \
175 (_phy)->def_md_devad, \ 176 (_phy)->def_md_devad, \
176 (_bank + (_addr & 0xf)), \ 177 (_bank + (_addr & 0xf)), \
177 _val) 178 _val)
178 179
179#define CL45_RD_OVER_CL22(_bp, _phy, _bank, _addr, _val) \ 180#define CL22_RD_OVER_CL45(_bp, _phy, _bank, _addr, _val) \
180 bnx2x_cl45_read(_bp, _phy, \ 181 bnx2x_cl45_read(_bp, _phy, \
181 (_phy)->def_md_devad, \ 182 (_phy)->def_md_devad, \
182 (_bank + (_addr & 0xf)), \ 183 (_bank + (_addr & 0xf)), \
183 _val) 184 _val)
184 185
185static u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,
186 u8 devad, u16 reg, u16 *ret_val);
187
188static u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
189 u8 devad, u16 reg, u16 val);
190
191static u32 bnx2x_bits_en(struct bnx2x *bp, u32 reg, u32 bits) 186static u32 bnx2x_bits_en(struct bnx2x *bp, u32 reg, u32 bits)
192{ 187{
193 u32 val = REG_RD(bp, reg); 188 u32 val = REG_RD(bp, reg);
@@ -216,7 +211,7 @@ void bnx2x_ets_disabled(struct link_params *params)
216 211
217 DP(NETIF_MSG_LINK, "ETS disabled configuration\n"); 212 DP(NETIF_MSG_LINK, "ETS disabled configuration\n");
218 213
219 /** 214 /*
220 * mapping between entry priority to client number (0,1,2 -debug and 215 * mapping between entry priority to client number (0,1,2 -debug and
221 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST) 216 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST)
222 * 3bits client num. 217 * 3bits client num.
@@ -225,7 +220,7 @@ void bnx2x_ets_disabled(struct link_params *params)
225 */ 220 */
226 221
227 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, 0x4688); 222 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, 0x4688);
228 /** 223 /*
229 * Bitmap of 5bits length. Each bit specifies whether the entry behaves 224 * Bitmap of 5bits length. Each bit specifies whether the entry behaves
230 * as strict. Bits 0,1,2 - debug and management entries, 3 - 225 * as strict. Bits 0,1,2 - debug and management entries, 3 -
231 * COS0 entry, 4 - COS1 entry. 226 * COS0 entry, 4 - COS1 entry.
@@ -237,12 +232,12 @@ void bnx2x_ets_disabled(struct link_params *params)
237 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7); 232 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7);
238 /* defines which entries (clients) are subjected to WFQ arbitration */ 233 /* defines which entries (clients) are subjected to WFQ arbitration */
239 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0); 234 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0);
240 /** 235 /*
241 * For strict priority entries defines the number of consecutive 236 * For strict priority entries defines the number of consecutive
242 * slots for the highest priority. 237 * slots for the highest priority.
243 */ 238 */
244 REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100); 239 REG_WR(bp, NIG_REG_P0_TX_ARB_NUM_STRICT_ARB_SLOTS, 0x100);
245 /** 240 /*
246 * mapping between the CREDIT_WEIGHT registers and actual client 241 * mapping between the CREDIT_WEIGHT registers and actual client
247 * numbers 242 * numbers
248 */ 243 */
@@ -255,7 +250,7 @@ void bnx2x_ets_disabled(struct link_params *params)
255 REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, 0); 250 REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, 0);
256 /* ETS mode disable */ 251 /* ETS mode disable */
257 REG_WR(bp, PBF_REG_ETS_ENABLED, 0); 252 REG_WR(bp, PBF_REG_ETS_ENABLED, 0);
258 /** 253 /*
259 * If ETS mode is enabled (there is no strict priority) defines a WFQ 254 * If ETS mode is enabled (there is no strict priority) defines a WFQ
260 * weight for COS0/COS1. 255 * weight for COS0/COS1.
261 */ 256 */
@@ -268,24 +263,24 @@ void bnx2x_ets_disabled(struct link_params *params)
268 REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0); 263 REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0);
269} 264}
270 265
271void bnx2x_ets_bw_limit_common(const struct link_params *params) 266static void bnx2x_ets_bw_limit_common(const struct link_params *params)
272{ 267{
273 /* ETS disabled configuration */ 268 /* ETS disabled configuration */
274 struct bnx2x *bp = params->bp; 269 struct bnx2x *bp = params->bp;
275 DP(NETIF_MSG_LINK, "ETS enabled BW limit configuration\n"); 270 DP(NETIF_MSG_LINK, "ETS enabled BW limit configuration\n");
276 /** 271 /*
277 * defines which entries (clients) are subjected to WFQ arbitration 272 * defines which entries (clients) are subjected to WFQ arbitration
278 * COS0 0x8 273 * COS0 0x8
279 * COS1 0x10 274 * COS1 0x10
280 */ 275 */
281 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0x18); 276 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_SUBJECT2WFQ, 0x18);
282 /** 277 /*
283 * mapping between the ARB_CREDIT_WEIGHT registers and actual 278 * mapping between the ARB_CREDIT_WEIGHT registers and actual
284 * client numbers (WEIGHT_0 does not actually have to represent 279 * client numbers (WEIGHT_0 does not actually have to represent
285 * client 0) 280 * client 0)
286 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 281 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0
287 * cos1-001 cos0-000 dbg1-100 dbg0-011 MCP-010 282 * cos1-001 cos0-000 dbg1-100 dbg0-011 MCP-010
288 */ 283 */
289 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, 0x111A); 284 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_CREDIT_MAP, 0x111A);
290 285
291 REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_0, 286 REG_WR(bp, NIG_REG_P0_TX_ARB_CREDIT_UPPER_BOUND_0,
@@ -298,14 +293,14 @@ void bnx2x_ets_bw_limit_common(const struct link_params *params)
298 293
299 /* Defines the number of consecutive slots for the strict priority */ 294 /* Defines the number of consecutive slots for the strict priority */
300 REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0); 295 REG_WR(bp, PBF_REG_NUM_STRICT_ARB_SLOTS, 0);
301 /** 296 /*
302 * Bitmap of 5bits length. Each bit specifies whether the entry behaves 297 * Bitmap of 5bits length. Each bit specifies whether the entry behaves
303 * as strict. Bits 0,1,2 - debug and management entries, 3 - COS0 298 * as strict. Bits 0,1,2 - debug and management entries, 3 - COS0
304 * entry, 4 - COS1 entry. 299 * entry, 4 - COS1 entry.
305 * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT 300 * COS1 | COS0 | DEBUG21 | DEBUG0 | MGMT
306 * bit4 bit3 bit2 bit1 bit0 301 * bit4 bit3 bit2 bit1 bit0
307 * MCP and debug are strict 302 * MCP and debug are strict
308 */ 303 */
309 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7); 304 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x7);
310 305
311 /* Upper bound that COS0_WEIGHT can reach in the WFQ arbiter.*/ 306 /* Upper bound that COS0_WEIGHT can reach in the WFQ arbiter.*/
@@ -329,8 +324,7 @@ void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw,
329 if ((0 == total_bw) || 324 if ((0 == total_bw) ||
330 (0 == cos0_bw) || 325 (0 == cos0_bw) ||
331 (0 == cos1_bw)) { 326 (0 == cos1_bw)) {
332 DP(NETIF_MSG_LINK, 327 DP(NETIF_MSG_LINK, "Total BW can't be zero\n");
333 "bnx2x_ets_bw_limit: Total BW can't be zero\n");
334 return; 328 return;
335 } 329 }
336 330
@@ -355,7 +349,7 @@ u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
355 u32 val = 0; 349 u32 val = 0;
356 350
357 DP(NETIF_MSG_LINK, "ETS enabled strict configuration\n"); 351 DP(NETIF_MSG_LINK, "ETS enabled strict configuration\n");
358 /** 352 /*
359 * Bitmap of 5bits length. Each bit specifies whether the entry behaves 353 * Bitmap of 5bits length. Each bit specifies whether the entry behaves
360 * as strict. Bits 0,1,2 - debug and management entries, 354 * as strict. Bits 0,1,2 - debug and management entries,
361 * 3 - COS0 entry, 4 - COS1 entry. 355 * 3 - COS0 entry, 4 - COS1 entry.
@@ -364,7 +358,7 @@ u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
364 * MCP and debug are strict 358 * MCP and debug are strict
365 */ 359 */
366 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x1F); 360 REG_WR(bp, NIG_REG_P0_TX_ARB_CLIENT_IS_STRICT, 0x1F);
367 /** 361 /*
368 * For strict priority entries defines the number of consecutive slots 362 * For strict priority entries defines the number of consecutive slots
369 * for the highest priority. 363 * for the highest priority.
370 */ 364 */
@@ -377,14 +371,14 @@ u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos)
377 /* Defines the number of consecutive slots for the strict priority */ 371 /* Defines the number of consecutive slots for the strict priority */
378 REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, strict_cos); 372 REG_WR(bp, PBF_REG_HIGH_PRIORITY_COS_NUM, strict_cos);
379 373
380 /** 374 /*
381 * mapping between entry priority to client number (0,1,2 -debug and 375 * mapping between entry priority to client number (0,1,2 -debug and
382 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST) 376 * management clients, 3 - COS0 client, 4 - COS client)(HIGHEST)
383 * 3bits client num. 377 * 3bits client num.
384 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0 378 * PRI4 | PRI3 | PRI2 | PRI1 | PRI0
385 * dbg0-010 dbg1-001 cos1-100 cos0-011 MCP-000 379 * dbg0-010 dbg1-001 cos1-100 cos0-011 MCP-000
386 * dbg0-010 dbg1-001 cos0-011 cos1-100 MCP-000 380 * dbg0-010 dbg1-001 cos0-011 cos1-100 MCP-000
387 */ 381 */
388 val = (0 == strict_cos) ? 0x2318 : 0x22E0; 382 val = (0 == strict_cos) ? 0x2318 : 0x22E0;
389 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, val); 383 REG_WR(bp, NIG_REG_P0_TX_ARB_PRIORITY_CLIENT, val);
390 384
@@ -471,7 +465,7 @@ void bnx2x_pfc_statistic(struct link_params *params, struct link_vars *vars,
471/* MAC/PBF section */ 465/* MAC/PBF section */
472/******************************************************************/ 466/******************************************************************/
473static void bnx2x_emac_init(struct link_params *params, 467static void bnx2x_emac_init(struct link_params *params,
474 struct link_vars *vars) 468 struct link_vars *vars)
475{ 469{
476 /* reset and unreset the emac core */ 470 /* reset and unreset the emac core */
477 struct bnx2x *bp = params->bp; 471 struct bnx2x *bp = params->bp;
@@ -481,10 +475,10 @@ static void bnx2x_emac_init(struct link_params *params,
481 u16 timeout; 475 u16 timeout;
482 476
483 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 477 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
484 (MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE << port)); 478 (MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE << port));
485 udelay(5); 479 udelay(5);
486 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, 480 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET,
487 (MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE << port)); 481 (MISC_REGISTERS_RESET_REG_2_RST_EMAC0_HARD_CORE << port));
488 482
489 /* init emac - use read-modify-write */ 483 /* init emac - use read-modify-write */
490 /* self clear reset */ 484 /* self clear reset */
@@ -515,7 +509,7 @@ static void bnx2x_emac_init(struct link_params *params,
515} 509}
516 510
517static u8 bnx2x_emac_enable(struct link_params *params, 511static u8 bnx2x_emac_enable(struct link_params *params,
518 struct link_vars *vars, u8 lb) 512 struct link_vars *vars, u8 lb)
519{ 513{
520 struct bnx2x *bp = params->bp; 514 struct bnx2x *bp = params->bp;
521 u8 port = params->port; 515 u8 port = params->port;
@@ -527,55 +521,33 @@ static u8 bnx2x_emac_enable(struct link_params *params,
527 /* enable emac and not bmac */ 521 /* enable emac and not bmac */
528 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + port*4, 1); 522 REG_WR(bp, NIG_REG_EGRESS_EMAC0_PORT + port*4, 1);
529 523
530 /* for paladium */
531 if (CHIP_REV_IS_EMUL(bp)) {
532 /* Use lane 1 (of lanes 0-3) */
533 REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 1);
534 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL +
535 port*4, 1);
536 }
537 /* for fpga */
538 else
539
540 if (CHIP_REV_IS_FPGA(bp)) {
541 /* Use lane 1 (of lanes 0-3) */
542 DP(NETIF_MSG_LINK, "bnx2x_emac_enable: Setting FPGA\n");
543
544 REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, 1);
545 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4,
546 0);
547 } else
548 /* ASIC */ 524 /* ASIC */
549 if (vars->phy_flags & PHY_XGXS_FLAG) { 525 if (vars->phy_flags & PHY_XGXS_FLAG) {
550 u32 ser_lane = ((params->lane_config & 526 u32 ser_lane = ((params->lane_config &
551 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> 527 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >>
552 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); 528 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT);
553 529
554 DP(NETIF_MSG_LINK, "XGXS\n"); 530 DP(NETIF_MSG_LINK, "XGXS\n");
555 /* select the master lanes (out of 0-3) */ 531 /* select the master lanes (out of 0-3) */
556 REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + 532 REG_WR(bp, NIG_REG_XGXS_LANE_SEL_P0 + port*4, ser_lane);
557 port*4, ser_lane);
558 /* select XGXS */ 533 /* select XGXS */
559 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + 534 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 1);
560 port*4, 1);
561 535
562 } else { /* SerDes */ 536 } else { /* SerDes */
563 DP(NETIF_MSG_LINK, "SerDes\n"); 537 DP(NETIF_MSG_LINK, "SerDes\n");
564 /* select SerDes */ 538 /* select SerDes */
565 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + 539 REG_WR(bp, NIG_REG_XGXS_SERDES0_MODE_SEL + port*4, 0);
566 port*4, 0);
567 } 540 }
568 541
569 bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_RX_MODE, 542 bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_RX_MODE,
570 EMAC_RX_MODE_RESET); 543 EMAC_RX_MODE_RESET);
571 bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_TX_MODE, 544 bnx2x_bits_en(bp, emac_base + EMAC_REG_EMAC_TX_MODE,
572 EMAC_TX_MODE_RESET); 545 EMAC_TX_MODE_RESET);
573 546
574 if (CHIP_REV_IS_SLOW(bp)) { 547 if (CHIP_REV_IS_SLOW(bp)) {
575 /* config GMII mode */ 548 /* config GMII mode */
576 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE); 549 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_MODE);
577 EMAC_WR(bp, EMAC_REG_EMAC_MODE, 550 EMAC_WR(bp, EMAC_REG_EMAC_MODE, (val | EMAC_MODE_PORT_GMII));
578 (val | EMAC_MODE_PORT_GMII));
579 } else { /* ASIC */ 551 } else { /* ASIC */
580 /* pause enable/disable */ 552 /* pause enable/disable */
581 bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_RX_MODE, 553 bnx2x_bits_dis(bp, emac_base + EMAC_REG_EMAC_RX_MODE,
@@ -605,14 +577,14 @@ static u8 bnx2x_emac_enable(struct link_params *params,
605 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_RX_MODE); 577 val = REG_RD(bp, emac_base + EMAC_REG_EMAC_RX_MODE);
606 val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS; 578 val |= EMAC_RX_MODE_KEEP_VLAN_TAG | EMAC_RX_MODE_PROMISCUOUS;
607 579
608 /** 580 /*
609 * Setting this bit causes MAC control frames (except for pause 581 * Setting this bit causes MAC control frames (except for pause
610 * frames) to be passed on for processing. This setting has no 582 * frames) to be passed on for processing. This setting has no
611 * affect on the operation of the pause frames. This bit effects 583 * affect on the operation of the pause frames. This bit effects
612 * all packets regardless of RX Parser packet sorting logic. 584 * all packets regardless of RX Parser packet sorting logic.
613 * Turn the PFC off to make sure we are in Xon state before 585 * Turn the PFC off to make sure we are in Xon state before
614 * enabling it. 586 * enabling it.
615 */ 587 */
616 EMAC_WR(bp, EMAC_REG_RX_PFC_MODE, 0); 588 EMAC_WR(bp, EMAC_REG_RX_PFC_MODE, 0);
617 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) { 589 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) {
618 DP(NETIF_MSG_LINK, "PFC is enabled\n"); 590 DP(NETIF_MSG_LINK, "PFC is enabled\n");
@@ -666,16 +638,7 @@ static u8 bnx2x_emac_enable(struct link_params *params,
666 REG_WR(bp, NIG_REG_EMAC0_PAUSE_OUT_EN + port*4, val); 638 REG_WR(bp, NIG_REG_EMAC0_PAUSE_OUT_EN + port*4, val);
667 REG_WR(bp, NIG_REG_EGRESS_EMAC0_OUT_EN + port*4, 0x1); 639 REG_WR(bp, NIG_REG_EGRESS_EMAC0_OUT_EN + port*4, 0x1);
668 640
669 if (CHIP_REV_IS_EMUL(bp)) { 641 REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x0);
670 /* take the BigMac out of reset */
671 REG_WR(bp,
672 GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET,
673 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port));
674
675 /* enable access for bmac registers */
676 REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x1);
677 } else
678 REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x0);
679 642
680 vars->mac_type = MAC_TYPE_EMAC; 643 vars->mac_type = MAC_TYPE_EMAC;
681 return 0; 644 return 0;
@@ -731,8 +694,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,
731 val |= (1<<5); 694 val |= (1<<5);
732 wb_data[0] = val; 695 wb_data[0] = val;
733 wb_data[1] = 0; 696 wb_data[1] = 0;
734 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_CONTROL, 697 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_CONTROL, wb_data, 2);
735 wb_data, 2);
736 udelay(30); 698 udelay(30);
737 699
738 /* Tx control */ 700 /* Tx control */
@@ -768,12 +730,12 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,
768 730
769 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2); 731 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_PFC_CONTROL, wb_data, 2);
770 732
771 /** 733 /*
772 * Set Time (based unit is 512 bit time) between automatic 734 * Set Time (based unit is 512 bit time) between automatic
773 * re-sending of PP packets amd enable automatic re-send of 735 * re-sending of PP packets amd enable automatic re-send of
774 * Per-Priroity Packet as long as pp_gen is asserted and 736 * Per-Priroity Packet as long as pp_gen is asserted and
775 * pp_disable is low. 737 * pp_disable is low.
776 */ 738 */
777 val = 0x8000; 739 val = 0x8000;
778 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED) 740 if (params->feature_config_flags & FEATURE_CONFIG_PFC_ENABLED)
779 val |= (1<<16); /* enable automatic re-send */ 741 val |= (1<<16); /* enable automatic re-send */
@@ -781,7 +743,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,
781 wb_data[0] = val; 743 wb_data[0] = val;
782 wb_data[1] = 0; 744 wb_data[1] = 0;
783 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_PAUSE_CONTROL, 745 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_PAUSE_CONTROL,
784 wb_data, 2); 746 wb_data, 2);
785 747
786 /* mac control */ 748 /* mac control */
787 val = 0x3; /* Enable RX and TX */ 749 val = 0x3; /* Enable RX and TX */
@@ -795,8 +757,7 @@ static void bnx2x_update_pfc_bmac2(struct link_params *params,
795 757
796 wb_data[0] = val; 758 wb_data[0] = val;
797 wb_data[1] = 0; 759 wb_data[1] = 0;
798 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, 760 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2);
799 wb_data, 2);
800} 761}
801 762
802static void bnx2x_update_pfc_brb(struct link_params *params, 763static void bnx2x_update_pfc_brb(struct link_params *params,
@@ -825,17 +786,25 @@ static void bnx2x_update_pfc_brb(struct link_params *params,
825 full_xon_th = 786 full_xon_th =
826 PFC_BRB_MAC_FULL_XON_THRESHOLD_NON_PAUSEABLE; 787 PFC_BRB_MAC_FULL_XON_THRESHOLD_NON_PAUSEABLE;
827 } 788 }
828 /* The number of free blocks below which the pause signal to class 0 789 /*
829 of MAC #n is asserted. n=0,1 */ 790 * The number of free blocks below which the pause signal to class 0
791 * of MAC #n is asserted. n=0,1
792 */
830 REG_WR(bp, BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 , pause_xoff_th); 793 REG_WR(bp, BRB1_REG_PAUSE_0_XOFF_THRESHOLD_0 , pause_xoff_th);
831 /* The number of free blocks above which the pause signal to class 0 794 /*
832 of MAC #n is de-asserted. n=0,1 */ 795 * The number of free blocks above which the pause signal to class 0
796 * of MAC #n is de-asserted. n=0,1
797 */
833 REG_WR(bp, BRB1_REG_PAUSE_0_XON_THRESHOLD_0 , pause_xon_th); 798 REG_WR(bp, BRB1_REG_PAUSE_0_XON_THRESHOLD_0 , pause_xon_th);
834 /* The number of free blocks below which the full signal to class 0 799 /*
835 of MAC #n is asserted. n=0,1 */ 800 * The number of free blocks below which the full signal to class 0
801 * of MAC #n is asserted. n=0,1
802 */
836 REG_WR(bp, BRB1_REG_FULL_0_XOFF_THRESHOLD_0 , full_xoff_th); 803 REG_WR(bp, BRB1_REG_FULL_0_XOFF_THRESHOLD_0 , full_xoff_th);
837 /* The number of free blocks above which the full signal to class 0 804 /*
838 of MAC #n is de-asserted. n=0,1 */ 805 * The number of free blocks above which the full signal to class 0
806 * of MAC #n is de-asserted. n=0,1
807 */
839 REG_WR(bp, BRB1_REG_FULL_0_XON_THRESHOLD_0 , full_xon_th); 808 REG_WR(bp, BRB1_REG_FULL_0_XON_THRESHOLD_0 , full_xon_th);
840 809
841 if (set_pfc && pfc_params) { 810 if (set_pfc && pfc_params) {
@@ -859,25 +828,25 @@ static void bnx2x_update_pfc_brb(struct link_params *params,
859 full_xon_th = 828 full_xon_th =
860 PFC_BRB_MAC_FULL_XON_THRESHOLD_NON_PAUSEABLE; 829 PFC_BRB_MAC_FULL_XON_THRESHOLD_NON_PAUSEABLE;
861 } 830 }
862 /** 831 /*
863 * The number of free blocks below which the pause signal to 832 * The number of free blocks below which the pause signal to
864 * class 1 of MAC #n is asserted. n=0,1 833 * class 1 of MAC #n is asserted. n=0,1
865 **/ 834 */
866 REG_WR(bp, BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0, pause_xoff_th); 835 REG_WR(bp, BRB1_REG_PAUSE_1_XOFF_THRESHOLD_0, pause_xoff_th);
867 /** 836 /*
868 * The number of free blocks above which the pause signal to 837 * The number of free blocks above which the pause signal to
869 * class 1 of MAC #n is de-asserted. n=0,1 838 * class 1 of MAC #n is de-asserted. n=0,1
870 **/ 839 */
871 REG_WR(bp, BRB1_REG_PAUSE_1_XON_THRESHOLD_0, pause_xon_th); 840 REG_WR(bp, BRB1_REG_PAUSE_1_XON_THRESHOLD_0, pause_xon_th);
872 /** 841 /*
873 * The number of free blocks below which the full signal to 842 * The number of free blocks below which the full signal to
874 * class 1 of MAC #n is asserted. n=0,1 843 * class 1 of MAC #n is asserted. n=0,1
875 **/ 844 */
876 REG_WR(bp, BRB1_REG_FULL_1_XOFF_THRESHOLD_0, full_xoff_th); 845 REG_WR(bp, BRB1_REG_FULL_1_XOFF_THRESHOLD_0, full_xoff_th);
877 /** 846 /*
878 * The number of free blocks above which the full signal to 847 * The number of free blocks above which the full signal to
879 * class 1 of MAC #n is de-asserted. n=0,1 848 * class 1 of MAC #n is de-asserted. n=0,1
880 **/ 849 */
881 REG_WR(bp, BRB1_REG_FULL_1_XON_THRESHOLD_0, full_xon_th); 850 REG_WR(bp, BRB1_REG_FULL_1_XON_THRESHOLD_0, full_xon_th);
882 } 851 }
883} 852}
@@ -896,7 +865,7 @@ static void bnx2x_update_pfc_nig(struct link_params *params,
896 FEATURE_CONFIG_PFC_ENABLED; 865 FEATURE_CONFIG_PFC_ENABLED;
897 DP(NETIF_MSG_LINK, "updating pfc nig parameters\n"); 866 DP(NETIF_MSG_LINK, "updating pfc nig parameters\n");
898 867
899 /** 868 /*
900 * When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set 869 * When NIG_LLH0_XCM_MASK_REG_LLHX_XCM_MASK_BCN bit is set
901 * MAC control frames (that are not pause packets) 870 * MAC control frames (that are not pause packets)
902 * will be forwarded to the XCM. 871 * will be forwarded to the XCM.
@@ -904,7 +873,7 @@ static void bnx2x_update_pfc_nig(struct link_params *params,
904 xcm_mask = REG_RD(bp, 873 xcm_mask = REG_RD(bp,
905 port ? NIG_REG_LLH1_XCM_MASK : 874 port ? NIG_REG_LLH1_XCM_MASK :
906 NIG_REG_LLH0_XCM_MASK); 875 NIG_REG_LLH0_XCM_MASK);
907 /** 876 /*
908 * nig params will override non PFC params, since it's possible to 877 * nig params will override non PFC params, since it's possible to
909 * do transition from PFC to SAFC 878 * do transition from PFC to SAFC
910 */ 879 */
@@ -994,7 +963,7 @@ void bnx2x_update_pfc(struct link_params *params,
994 struct link_vars *vars, 963 struct link_vars *vars,
995 struct bnx2x_nig_brb_pfc_port_params *pfc_params) 964 struct bnx2x_nig_brb_pfc_port_params *pfc_params)
996{ 965{
997 /** 966 /*
998 * The PFC and pause are orthogonal to one another, meaning when 967 * The PFC and pause are orthogonal to one another, meaning when
999 * PFC is enabled, the pause are disabled, and when PFC is 968 * PFC is enabled, the pause are disabled, and when PFC is
1000 * disabled, pause are set according to the pause result. 969 * disabled, pause are set according to the pause result.
@@ -1035,7 +1004,7 @@ void bnx2x_update_pfc(struct link_params *params,
1035 1004
1036static u8 bnx2x_bmac1_enable(struct link_params *params, 1005static u8 bnx2x_bmac1_enable(struct link_params *params,
1037 struct link_vars *vars, 1006 struct link_vars *vars,
1038 u8 is_lb) 1007 u8 is_lb)
1039{ 1008{
1040 struct bnx2x *bp = params->bp; 1009 struct bnx2x *bp = params->bp;
1041 u8 port = params->port; 1010 u8 port = params->port;
@@ -1049,9 +1018,8 @@ static u8 bnx2x_bmac1_enable(struct link_params *params,
1049 /* XGXS control */ 1018 /* XGXS control */
1050 wb_data[0] = 0x3c; 1019 wb_data[0] = 0x3c;
1051 wb_data[1] = 0; 1020 wb_data[1] = 0;
1052 REG_WR_DMAE(bp, bmac_addr + 1021 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_BMAC_XGXS_CONTROL,
1053 BIGMAC_REGISTER_BMAC_XGXS_CONTROL, 1022 wb_data, 2);
1054 wb_data, 2);
1055 1023
1056 /* tx MAC SA */ 1024 /* tx MAC SA */
1057 wb_data[0] = ((params->mac_addr[2] << 24) | 1025 wb_data[0] = ((params->mac_addr[2] << 24) |
@@ -1060,8 +1028,7 @@ static u8 bnx2x_bmac1_enable(struct link_params *params,
1060 params->mac_addr[5]); 1028 params->mac_addr[5]);
1061 wb_data[1] = ((params->mac_addr[0] << 8) | 1029 wb_data[1] = ((params->mac_addr[0] << 8) |
1062 params->mac_addr[1]); 1030 params->mac_addr[1]);
1063 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_SOURCE_ADDR, 1031 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_SOURCE_ADDR, wb_data, 2);
1064 wb_data, 2);
1065 1032
1066 /* mac control */ 1033 /* mac control */
1067 val = 0x3; 1034 val = 0x3;
@@ -1071,43 +1038,30 @@ static u8 bnx2x_bmac1_enable(struct link_params *params,
1071 } 1038 }
1072 wb_data[0] = val; 1039 wb_data[0] = val;
1073 wb_data[1] = 0; 1040 wb_data[1] = 0;
1074 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_BMAC_CONTROL, 1041 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_BMAC_CONTROL, wb_data, 2);
1075 wb_data, 2);
1076 1042
1077 /* set rx mtu */ 1043 /* set rx mtu */
1078 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; 1044 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD;
1079 wb_data[1] = 0; 1045 wb_data[1] = 0;
1080 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_MAX_SIZE, 1046 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_MAX_SIZE, wb_data, 2);
1081 wb_data, 2);
1082 1047
1083 bnx2x_update_pfc_bmac1(params, vars); 1048 bnx2x_update_pfc_bmac1(params, vars);
1084 1049
1085 /* set tx mtu */ 1050 /* set tx mtu */
1086 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; 1051 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD;
1087 wb_data[1] = 0; 1052 wb_data[1] = 0;
1088 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_MAX_SIZE, 1053 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_TX_MAX_SIZE, wb_data, 2);
1089 wb_data, 2);
1090 1054
1091 /* set cnt max size */ 1055 /* set cnt max size */
1092 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; 1056 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD;
1093 wb_data[1] = 0; 1057 wb_data[1] = 0;
1094 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_CNT_MAX_SIZE, 1058 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_CNT_MAX_SIZE, wb_data, 2);
1095 wb_data, 2);
1096 1059
1097 /* configure safc */ 1060 /* configure safc */
1098 wb_data[0] = 0x1000200; 1061 wb_data[0] = 0x1000200;
1099 wb_data[1] = 0; 1062 wb_data[1] = 0;
1100 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_LLFC_MSG_FLDS, 1063 REG_WR_DMAE(bp, bmac_addr + BIGMAC_REGISTER_RX_LLFC_MSG_FLDS,
1101 wb_data, 2); 1064 wb_data, 2);
1102 /* fix for emulation */
1103 if (CHIP_REV_IS_EMUL(bp)) {
1104 wb_data[0] = 0xf000;
1105 wb_data[1] = 0;
1106 REG_WR_DMAE(bp,
1107 bmac_addr + BIGMAC_REGISTER_TX_PAUSE_THRESHOLD,
1108 wb_data, 2);
1109 }
1110
1111 1065
1112 return 0; 1066 return 0;
1113} 1067}
@@ -1126,16 +1080,14 @@ static u8 bnx2x_bmac2_enable(struct link_params *params,
1126 1080
1127 wb_data[0] = 0; 1081 wb_data[0] = 0;
1128 wb_data[1] = 0; 1082 wb_data[1] = 0;
1129 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, 1083 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_CONTROL, wb_data, 2);
1130 wb_data, 2);
1131 udelay(30); 1084 udelay(30);
1132 1085
1133 /* XGXS control: Reset phy HW, MDIO registers, PHY PLL and BMAC */ 1086 /* XGXS control: Reset phy HW, MDIO registers, PHY PLL and BMAC */
1134 wb_data[0] = 0x3c; 1087 wb_data[0] = 0x3c;
1135 wb_data[1] = 0; 1088 wb_data[1] = 0;
1136 REG_WR_DMAE(bp, bmac_addr + 1089 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_BMAC_XGXS_CONTROL,
1137 BIGMAC2_REGISTER_BMAC_XGXS_CONTROL, 1090 wb_data, 2);
1138 wb_data, 2);
1139 1091
1140 udelay(30); 1092 udelay(30);
1141 1093
@@ -1147,7 +1099,7 @@ static u8 bnx2x_bmac2_enable(struct link_params *params,
1147 wb_data[1] = ((params->mac_addr[0] << 8) | 1099 wb_data[1] = ((params->mac_addr[0] << 8) |
1148 params->mac_addr[1]); 1100 params->mac_addr[1]);
1149 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_SOURCE_ADDR, 1101 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_SOURCE_ADDR,
1150 wb_data, 2); 1102 wb_data, 2);
1151 1103
1152 udelay(30); 1104 udelay(30);
1153 1105
@@ -1155,27 +1107,24 @@ static u8 bnx2x_bmac2_enable(struct link_params *params,
1155 wb_data[0] = 0x1000200; 1107 wb_data[0] = 0x1000200;
1156 wb_data[1] = 0; 1108 wb_data[1] = 0;
1157 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_LLFC_MSG_FLDS, 1109 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_LLFC_MSG_FLDS,
1158 wb_data, 2); 1110 wb_data, 2);
1159 udelay(30); 1111 udelay(30);
1160 1112
1161 /* set rx mtu */ 1113 /* set rx mtu */
1162 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; 1114 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD;
1163 wb_data[1] = 0; 1115 wb_data[1] = 0;
1164 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_MAX_SIZE, 1116 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_RX_MAX_SIZE, wb_data, 2);
1165 wb_data, 2);
1166 udelay(30); 1117 udelay(30);
1167 1118
1168 /* set tx mtu */ 1119 /* set tx mtu */
1169 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD; 1120 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD;
1170 wb_data[1] = 0; 1121 wb_data[1] = 0;
1171 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_MAX_SIZE, 1122 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_TX_MAX_SIZE, wb_data, 2);
1172 wb_data, 2);
1173 udelay(30); 1123 udelay(30);
1174 /* set cnt max size */ 1124 /* set cnt max size */
1175 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD - 2; 1125 wb_data[0] = ETH_MAX_JUMBO_PACKET_SIZE + ETH_OVREHEAD - 2;
1176 wb_data[1] = 0; 1126 wb_data[1] = 0;
1177 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_CNT_MAX_SIZE, 1127 REG_WR_DMAE(bp, bmac_addr + BIGMAC2_REGISTER_CNT_MAX_SIZE, wb_data, 2);
1178 wb_data, 2);
1179 udelay(30); 1128 udelay(30);
1180 bnx2x_update_pfc_bmac2(params, vars, is_lb); 1129 bnx2x_update_pfc_bmac2(params, vars, is_lb);
1181 1130
@@ -1191,11 +1140,11 @@ static u8 bnx2x_bmac_enable(struct link_params *params,
1191 u32 val; 1140 u32 val;
1192 /* reset and unreset the BigMac */ 1141 /* reset and unreset the BigMac */
1193 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR, 1142 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
1194 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); 1143 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port));
1195 msleep(1); 1144 msleep(1);
1196 1145
1197 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET, 1146 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_SET,
1198 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port)); 1147 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port));
1199 1148
1200 /* enable access for bmac registers */ 1149 /* enable access for bmac registers */
1201 REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x1); 1150 REG_WR(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4, 0x1);
@@ -1230,15 +1179,14 @@ static void bnx2x_update_mng(struct link_params *params, u32 link_status)
1230 struct bnx2x *bp = params->bp; 1179 struct bnx2x *bp = params->bp;
1231 1180
1232 REG_WR(bp, params->shmem_base + 1181 REG_WR(bp, params->shmem_base +
1233 offsetof(struct shmem_region, 1182 offsetof(struct shmem_region,
1234 port_mb[params->port].link_status), 1183 port_mb[params->port].link_status), link_status);
1235 link_status);
1236} 1184}
1237 1185
1238static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u8 port) 1186static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u8 port)
1239{ 1187{
1240 u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM : 1188 u32 bmac_addr = port ? NIG_REG_INGRESS_BMAC1_MEM :
1241 NIG_REG_INGRESS_BMAC0_MEM; 1189 NIG_REG_INGRESS_BMAC0_MEM;
1242 u32 wb_data[2]; 1190 u32 wb_data[2];
1243 u32 nig_bmac_enable = REG_RD(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4); 1191 u32 nig_bmac_enable = REG_RD(bp, NIG_REG_BMAC0_REGS_OUT_EN + port*4);
1244 1192
@@ -1250,12 +1198,12 @@ static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u8 port)
1250 if (CHIP_IS_E2(bp)) { 1198 if (CHIP_IS_E2(bp)) {
1251 /* Clear Rx Enable bit in BMAC_CONTROL register */ 1199 /* Clear Rx Enable bit in BMAC_CONTROL register */
1252 REG_RD_DMAE(bp, bmac_addr + 1200 REG_RD_DMAE(bp, bmac_addr +
1253 BIGMAC2_REGISTER_BMAC_CONTROL, 1201 BIGMAC2_REGISTER_BMAC_CONTROL,
1254 wb_data, 2); 1202 wb_data, 2);
1255 wb_data[0] &= ~BMAC_CONTROL_RX_ENABLE; 1203 wb_data[0] &= ~BMAC_CONTROL_RX_ENABLE;
1256 REG_WR_DMAE(bp, bmac_addr + 1204 REG_WR_DMAE(bp, bmac_addr +
1257 BIGMAC2_REGISTER_BMAC_CONTROL, 1205 BIGMAC2_REGISTER_BMAC_CONTROL,
1258 wb_data, 2); 1206 wb_data, 2);
1259 } else { 1207 } else {
1260 /* Clear Rx Enable bit in BMAC_CONTROL register */ 1208 /* Clear Rx Enable bit in BMAC_CONTROL register */
1261 REG_RD_DMAE(bp, bmac_addr + 1209 REG_RD_DMAE(bp, bmac_addr +
@@ -1271,7 +1219,7 @@ static void bnx2x_bmac_rx_disable(struct bnx2x *bp, u8 port)
1271} 1219}
1272 1220
1273static u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl, 1221static u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,
1274 u32 line_speed) 1222 u32 line_speed)
1275{ 1223{
1276 struct bnx2x *bp = params->bp; 1224 struct bnx2x *bp = params->bp;
1277 u8 port = params->port; 1225 u8 port = params->port;
@@ -1308,7 +1256,7 @@ static u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,
1308 /* update threshold */ 1256 /* update threshold */
1309 REG_WR(bp, PBF_REG_P0_ARB_THRSH + port*4, 0); 1257 REG_WR(bp, PBF_REG_P0_ARB_THRSH + port*4, 0);
1310 /* update init credit */ 1258 /* update init credit */
1311 init_crd = 778; /* (800-18-4) */ 1259 init_crd = 778; /* (800-18-4) */
1312 1260
1313 } else { 1261 } else {
1314 u32 thresh = (ETH_MAX_JUMBO_PACKET_SIZE + 1262 u32 thresh = (ETH_MAX_JUMBO_PACKET_SIZE +
@@ -1353,6 +1301,23 @@ static u8 bnx2x_pbf_update(struct link_params *params, u32 flow_ctrl,
1353 return 0; 1301 return 0;
1354} 1302}
1355 1303
1304/*
1305 * get_emac_base
1306 *
1307 * @param cb
1308 * @param mdc_mdio_access
1309 * @param port
1310 *
1311 * @return u32
1312 *
1313 * This function selects the MDC/MDIO access (through emac0 or
1314 * emac1) depend on the mdc_mdio_access, port, port swapped. Each
1315 * phy has a default access mode, which could also be overridden
1316 * by nvram configuration. This parameter, whether this is the
1317 * default phy configuration, or the nvram overrun
1318 * configuration, is passed here as mdc_mdio_access and selects
1319 * the emac_base for the CL45 read/writes operations
1320 */
1356static u32 bnx2x_get_emac_base(struct bnx2x *bp, 1321static u32 bnx2x_get_emac_base(struct bnx2x *bp,
1357 u32 mdc_mdio_access, u8 port) 1322 u32 mdc_mdio_access, u8 port)
1358{ 1323{
@@ -1385,13 +1350,16 @@ static u32 bnx2x_get_emac_base(struct bnx2x *bp,
1385 1350
1386} 1351}
1387 1352
1388u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy, 1353/******************************************************************/
1389 u8 devad, u16 reg, u16 val) 1354/* CL45 access functions */
1355/******************************************************************/
1356static u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
1357 u8 devad, u16 reg, u16 val)
1390{ 1358{
1391 u32 tmp, saved_mode; 1359 u32 tmp, saved_mode;
1392 u8 i, rc = 0; 1360 u8 i, rc = 0;
1393 1361 /*
1394 /* set clause 45 mode, slow down the MDIO clock to 2.5MHz 1362 * Set clause 45 mode, slow down the MDIO clock to 2.5MHz
1395 * (a value of 49==0x31) and make sure that the AUTO poll is off 1363 * (a value of 49==0x31) and make sure that the AUTO poll is off
1396 */ 1364 */
1397 1365
@@ -1414,8 +1382,7 @@ u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
1414 for (i = 0; i < 50; i++) { 1382 for (i = 0; i < 50; i++) {
1415 udelay(10); 1383 udelay(10);
1416 1384
1417 tmp = REG_RD(bp, phy->mdio_ctrl + 1385 tmp = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_COMM);
1418 EMAC_REG_EMAC_MDIO_COMM);
1419 if (!(tmp & EMAC_MDIO_COMM_START_BUSY)) { 1386 if (!(tmp & EMAC_MDIO_COMM_START_BUSY)) {
1420 udelay(5); 1387 udelay(5);
1421 break; 1388 break;
@@ -1423,6 +1390,7 @@ u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
1423 } 1390 }
1424 if (tmp & EMAC_MDIO_COMM_START_BUSY) { 1391 if (tmp & EMAC_MDIO_COMM_START_BUSY) {
1425 DP(NETIF_MSG_LINK, "write phy register failed\n"); 1392 DP(NETIF_MSG_LINK, "write phy register failed\n");
1393 netdev_err(bp->dev, "MDC/MDIO access timeout\n");
1426 rc = -EFAULT; 1394 rc = -EFAULT;
1427 } else { 1395 } else {
1428 /* data */ 1396 /* data */
@@ -1435,7 +1403,7 @@ u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
1435 udelay(10); 1403 udelay(10);
1436 1404
1437 tmp = REG_RD(bp, phy->mdio_ctrl + 1405 tmp = REG_RD(bp, phy->mdio_ctrl +
1438 EMAC_REG_EMAC_MDIO_COMM); 1406 EMAC_REG_EMAC_MDIO_COMM);
1439 if (!(tmp & EMAC_MDIO_COMM_START_BUSY)) { 1407 if (!(tmp & EMAC_MDIO_COMM_START_BUSY)) {
1440 udelay(5); 1408 udelay(5);
1441 break; 1409 break;
@@ -1443,6 +1411,7 @@ u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
1443 } 1411 }
1444 if (tmp & EMAC_MDIO_COMM_START_BUSY) { 1412 if (tmp & EMAC_MDIO_COMM_START_BUSY) {
1445 DP(NETIF_MSG_LINK, "write phy register failed\n"); 1413 DP(NETIF_MSG_LINK, "write phy register failed\n");
1414 netdev_err(bp->dev, "MDC/MDIO access timeout\n");
1446 rc = -EFAULT; 1415 rc = -EFAULT;
1447 } 1416 }
1448 } 1417 }
@@ -1453,20 +1422,20 @@ u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
1453 return rc; 1422 return rc;
1454} 1423}
1455 1424
1456u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy, 1425static u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,
1457 u8 devad, u16 reg, u16 *ret_val) 1426 u8 devad, u16 reg, u16 *ret_val)
1458{ 1427{
1459 u32 val, saved_mode; 1428 u32 val, saved_mode;
1460 u16 i; 1429 u16 i;
1461 u8 rc = 0; 1430 u8 rc = 0;
1462 1431 /*
1463 /* set clause 45 mode, slow down the MDIO clock to 2.5MHz 1432 * Set clause 45 mode, slow down the MDIO clock to 2.5MHz
1464 * (a value of 49==0x31) and make sure that the AUTO poll is off 1433 * (a value of 49==0x31) and make sure that the AUTO poll is off
1465 */ 1434 */
1466 1435
1467 saved_mode = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE); 1436 saved_mode = REG_RD(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE);
1468 val = saved_mode & ~((EMAC_MDIO_MODE_AUTO_POLL | 1437 val = saved_mode & ~((EMAC_MDIO_MODE_AUTO_POLL |
1469 EMAC_MDIO_MODE_CLOCK_CNT)); 1438 EMAC_MDIO_MODE_CLOCK_CNT));
1470 val |= (EMAC_MDIO_MODE_CLAUSE_45 | 1439 val |= (EMAC_MDIO_MODE_CLAUSE_45 |
1471 (49L << EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT)); 1440 (49L << EMAC_MDIO_MODE_CLOCK_CNT_BITSHIFT));
1472 REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, val); 1441 REG_WR(bp, phy->mdio_ctrl + EMAC_REG_EMAC_MDIO_MODE, val);
@@ -1490,7 +1459,7 @@ u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,
1490 } 1459 }
1491 if (val & EMAC_MDIO_COMM_START_BUSY) { 1460 if (val & EMAC_MDIO_COMM_START_BUSY) {
1492 DP(NETIF_MSG_LINK, "read phy register failed\n"); 1461 DP(NETIF_MSG_LINK, "read phy register failed\n");
1493 1462 netdev_err(bp->dev, "MDC/MDIO access timeout\n");
1494 *ret_val = 0; 1463 *ret_val = 0;
1495 rc = -EFAULT; 1464 rc = -EFAULT;
1496 1465
@@ -1505,7 +1474,7 @@ u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,
1505 udelay(10); 1474 udelay(10);
1506 1475
1507 val = REG_RD(bp, phy->mdio_ctrl + 1476 val = REG_RD(bp, phy->mdio_ctrl +
1508 EMAC_REG_EMAC_MDIO_COMM); 1477 EMAC_REG_EMAC_MDIO_COMM);
1509 if (!(val & EMAC_MDIO_COMM_START_BUSY)) { 1478 if (!(val & EMAC_MDIO_COMM_START_BUSY)) {
1510 *ret_val = (u16)(val & EMAC_MDIO_COMM_DATA); 1479 *ret_val = (u16)(val & EMAC_MDIO_COMM_DATA);
1511 break; 1480 break;
@@ -1513,7 +1482,7 @@ u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,
1513 } 1482 }
1514 if (val & EMAC_MDIO_COMM_START_BUSY) { 1483 if (val & EMAC_MDIO_COMM_START_BUSY) {
1515 DP(NETIF_MSG_LINK, "read phy register failed\n"); 1484 DP(NETIF_MSG_LINK, "read phy register failed\n");
1516 1485 netdev_err(bp->dev, "MDC/MDIO access timeout\n");
1517 *ret_val = 0; 1486 *ret_val = 0;
1518 rc = -EFAULT; 1487 rc = -EFAULT;
1519 } 1488 }
@@ -1529,7 +1498,7 @@ u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr,
1529 u8 devad, u16 reg, u16 *ret_val) 1498 u8 devad, u16 reg, u16 *ret_val)
1530{ 1499{
1531 u8 phy_index; 1500 u8 phy_index;
1532 /** 1501 /*
1533 * Probe for the phy according to the given phy_addr, and execute 1502 * Probe for the phy according to the given phy_addr, and execute
1534 * the read request on it 1503 * the read request on it
1535 */ 1504 */
@@ -1547,7 +1516,7 @@ u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr,
1547 u8 devad, u16 reg, u16 val) 1516 u8 devad, u16 reg, u16 val)
1548{ 1517{
1549 u8 phy_index; 1518 u8 phy_index;
1550 /** 1519 /*
1551 * Probe for the phy according to the given phy_addr, and execute 1520 * Probe for the phy according to the given phy_addr, and execute
1552 * the write request on it 1521 * the write request on it
1553 */ 1522 */
@@ -1573,19 +1542,18 @@ static void bnx2x_set_aer_mmd_xgxs(struct link_params *params,
1573 1542
1574 offset = phy->addr + ser_lane; 1543 offset = phy->addr + ser_lane;
1575 if (CHIP_IS_E2(bp)) 1544 if (CHIP_IS_E2(bp))
1576 aer_val = 0x2800 + offset - 1; 1545 aer_val = 0x3800 + offset - 1;
1577 else 1546 else
1578 aer_val = 0x3800 + offset; 1547 aer_val = 0x3800 + offset;
1579 CL45_WR_OVER_CL22(bp, phy, 1548 CL22_WR_OVER_CL45(bp, phy, MDIO_REG_BANK_AER_BLOCK,
1580 MDIO_REG_BANK_AER_BLOCK, 1549 MDIO_AER_BLOCK_AER_REG, aer_val);
1581 MDIO_AER_BLOCK_AER_REG, aer_val);
1582} 1550}
1583static void bnx2x_set_aer_mmd_serdes(struct bnx2x *bp, 1551static void bnx2x_set_aer_mmd_serdes(struct bnx2x *bp,
1584 struct bnx2x_phy *phy) 1552 struct bnx2x_phy *phy)
1585{ 1553{
1586 CL45_WR_OVER_CL22(bp, phy, 1554 CL22_WR_OVER_CL45(bp, phy,
1587 MDIO_REG_BANK_AER_BLOCK, 1555 MDIO_REG_BANK_AER_BLOCK,
1588 MDIO_AER_BLOCK_AER_REG, 0x3800); 1556 MDIO_AER_BLOCK_AER_REG, 0x3800);
1589} 1557}
1590 1558
1591/******************************************************************/ 1559/******************************************************************/
@@ -1621,9 +1589,8 @@ static void bnx2x_serdes_deassert(struct bnx2x *bp, u8 port)
1621 1589
1622 bnx2x_set_serdes_access(bp, port); 1590 bnx2x_set_serdes_access(bp, port);
1623 1591
1624 REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_DEVAD + 1592 REG_WR(bp, NIG_REG_SERDES0_CTRL_MD_DEVAD + port*0x10,
1625 port*0x10, 1593 DEFAULT_PHY_DEV_ADDR);
1626 DEFAULT_PHY_DEV_ADDR);
1627} 1594}
1628 1595
1629static void bnx2x_xgxs_deassert(struct link_params *params) 1596static void bnx2x_xgxs_deassert(struct link_params *params)
@@ -1641,23 +1608,22 @@ static void bnx2x_xgxs_deassert(struct link_params *params)
1641 udelay(500); 1608 udelay(500);
1642 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val); 1609 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_SET, val);
1643 1610
1644 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + 1611 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_ST + port*0x18, 0);
1645 port*0x18, 0);
1646 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, 1612 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18,
1647 params->phy[INT_PHY].def_md_devad); 1613 params->phy[INT_PHY].def_md_devad);
1648} 1614}
1649 1615
1650 1616
1651void bnx2x_link_status_update(struct link_params *params, 1617void bnx2x_link_status_update(struct link_params *params,
1652 struct link_vars *vars) 1618 struct link_vars *vars)
1653{ 1619{
1654 struct bnx2x *bp = params->bp; 1620 struct bnx2x *bp = params->bp;
1655 u8 link_10g; 1621 u8 link_10g;
1656 u8 port = params->port; 1622 u8 port = params->port;
1657 1623
1658 vars->link_status = REG_RD(bp, params->shmem_base + 1624 vars->link_status = REG_RD(bp, params->shmem_base +
1659 offsetof(struct shmem_region, 1625 offsetof(struct shmem_region,
1660 port_mb[port].link_status)); 1626 port_mb[port].link_status));
1661 1627
1662 vars->link_up = (vars->link_status & LINK_STATUS_LINK_UP); 1628 vars->link_up = (vars->link_status & LINK_STATUS_LINK_UP);
1663 1629
@@ -1667,7 +1633,7 @@ void bnx2x_link_status_update(struct link_params *params,
1667 vars->phy_link_up = 1; 1633 vars->phy_link_up = 1;
1668 vars->duplex = DUPLEX_FULL; 1634 vars->duplex = DUPLEX_FULL;
1669 switch (vars->link_status & 1635 switch (vars->link_status &
1670 LINK_STATUS_SPEED_AND_DUPLEX_MASK) { 1636 LINK_STATUS_SPEED_AND_DUPLEX_MASK) {
1671 case LINK_10THD: 1637 case LINK_10THD:
1672 vars->duplex = DUPLEX_HALF; 1638 vars->duplex = DUPLEX_HALF;
1673 /* fall thru */ 1639 /* fall thru */
@@ -1779,20 +1745,20 @@ static void bnx2x_set_master_ln(struct link_params *params,
1779{ 1745{
1780 struct bnx2x *bp = params->bp; 1746 struct bnx2x *bp = params->bp;
1781 u16 new_master_ln, ser_lane; 1747 u16 new_master_ln, ser_lane;
1782 ser_lane = ((params->lane_config & 1748 ser_lane = ((params->lane_config &
1783 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> 1749 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >>
1784 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); 1750 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT);
1785 1751
1786 /* set the master_ln for AN */ 1752 /* set the master_ln for AN */
1787 CL45_RD_OVER_CL22(bp, phy, 1753 CL22_RD_OVER_CL45(bp, phy,
1788 MDIO_REG_BANK_XGXS_BLOCK2, 1754 MDIO_REG_BANK_XGXS_BLOCK2,
1789 MDIO_XGXS_BLOCK2_TEST_MODE_LANE, 1755 MDIO_XGXS_BLOCK2_TEST_MODE_LANE,
1790 &new_master_ln); 1756 &new_master_ln);
1791 1757
1792 CL45_WR_OVER_CL22(bp, phy, 1758 CL22_WR_OVER_CL45(bp, phy,
1793 MDIO_REG_BANK_XGXS_BLOCK2 , 1759 MDIO_REG_BANK_XGXS_BLOCK2 ,
1794 MDIO_XGXS_BLOCK2_TEST_MODE_LANE, 1760 MDIO_XGXS_BLOCK2_TEST_MODE_LANE,
1795 (new_master_ln | ser_lane)); 1761 (new_master_ln | ser_lane));
1796} 1762}
1797 1763
1798static u8 bnx2x_reset_unicore(struct link_params *params, 1764static u8 bnx2x_reset_unicore(struct link_params *params,
@@ -1802,17 +1768,16 @@ static u8 bnx2x_reset_unicore(struct link_params *params,
1802 struct bnx2x *bp = params->bp; 1768 struct bnx2x *bp = params->bp;
1803 u16 mii_control; 1769 u16 mii_control;
1804 u16 i; 1770 u16 i;
1805 1771 CL22_RD_OVER_CL45(bp, phy,
1806 CL45_RD_OVER_CL22(bp, phy, 1772 MDIO_REG_BANK_COMBO_IEEE0,
1807 MDIO_REG_BANK_COMBO_IEEE0, 1773 MDIO_COMBO_IEEE0_MII_CONTROL, &mii_control);
1808 MDIO_COMBO_IEEE0_MII_CONTROL, &mii_control);
1809 1774
1810 /* reset the unicore */ 1775 /* reset the unicore */
1811 CL45_WR_OVER_CL22(bp, phy, 1776 CL22_WR_OVER_CL45(bp, phy,
1812 MDIO_REG_BANK_COMBO_IEEE0, 1777 MDIO_REG_BANK_COMBO_IEEE0,
1813 MDIO_COMBO_IEEE0_MII_CONTROL, 1778 MDIO_COMBO_IEEE0_MII_CONTROL,
1814 (mii_control | 1779 (mii_control |
1815 MDIO_COMBO_IEEO_MII_CONTROL_RESET)); 1780 MDIO_COMBO_IEEO_MII_CONTROL_RESET));
1816 if (set_serdes) 1781 if (set_serdes)
1817 bnx2x_set_serdes_access(bp, params->port); 1782 bnx2x_set_serdes_access(bp, params->port);
1818 1783
@@ -1821,10 +1786,10 @@ static u8 bnx2x_reset_unicore(struct link_params *params,
1821 udelay(5); 1786 udelay(5);
1822 1787
1823 /* the reset erased the previous bank value */ 1788 /* the reset erased the previous bank value */
1824 CL45_RD_OVER_CL22(bp, phy, 1789 CL22_RD_OVER_CL45(bp, phy,
1825 MDIO_REG_BANK_COMBO_IEEE0, 1790 MDIO_REG_BANK_COMBO_IEEE0,
1826 MDIO_COMBO_IEEE0_MII_CONTROL, 1791 MDIO_COMBO_IEEE0_MII_CONTROL,
1827 &mii_control); 1792 &mii_control);
1828 1793
1829 if (!(mii_control & MDIO_COMBO_IEEO_MII_CONTROL_RESET)) { 1794 if (!(mii_control & MDIO_COMBO_IEEO_MII_CONTROL_RESET)) {
1830 udelay(5); 1795 udelay(5);
@@ -1832,6 +1797,9 @@ static u8 bnx2x_reset_unicore(struct link_params *params,
1832 } 1797 }
1833 } 1798 }
1834 1799
1800 netdev_err(bp->dev, "Warning: PHY was not initialized,"
1801 " Port %d\n",
1802 params->port);
1835 DP(NETIF_MSG_LINK, "BUG! XGXS is still in reset!\n"); 1803 DP(NETIF_MSG_LINK, "BUG! XGXS is still in reset!\n");
1836 return -EINVAL; 1804 return -EINVAL;
1837 1805
@@ -1841,43 +1809,45 @@ static void bnx2x_set_swap_lanes(struct link_params *params,
1841 struct bnx2x_phy *phy) 1809 struct bnx2x_phy *phy)
1842{ 1810{
1843 struct bnx2x *bp = params->bp; 1811 struct bnx2x *bp = params->bp;
1844 /* Each two bits represents a lane number: 1812 /*
1845 No swap is 0123 => 0x1b no need to enable the swap */ 1813 * Each two bits represents a lane number:
1814 * No swap is 0123 => 0x1b no need to enable the swap
1815 */
1846 u16 ser_lane, rx_lane_swap, tx_lane_swap; 1816 u16 ser_lane, rx_lane_swap, tx_lane_swap;
1847 1817
1848 ser_lane = ((params->lane_config & 1818 ser_lane = ((params->lane_config &
1849 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> 1819 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >>
1850 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT); 1820 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_SHIFT);
1851 rx_lane_swap = ((params->lane_config & 1821 rx_lane_swap = ((params->lane_config &
1852 PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK) >> 1822 PORT_HW_CFG_LANE_SWAP_CFG_RX_MASK) >>
1853 PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT); 1823 PORT_HW_CFG_LANE_SWAP_CFG_RX_SHIFT);
1854 tx_lane_swap = ((params->lane_config & 1824 tx_lane_swap = ((params->lane_config &
1855 PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK) >> 1825 PORT_HW_CFG_LANE_SWAP_CFG_TX_MASK) >>
1856 PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT); 1826 PORT_HW_CFG_LANE_SWAP_CFG_TX_SHIFT);
1857 1827
1858 if (rx_lane_swap != 0x1b) { 1828 if (rx_lane_swap != 0x1b) {
1859 CL45_WR_OVER_CL22(bp, phy, 1829 CL22_WR_OVER_CL45(bp, phy,
1860 MDIO_REG_BANK_XGXS_BLOCK2, 1830 MDIO_REG_BANK_XGXS_BLOCK2,
1861 MDIO_XGXS_BLOCK2_RX_LN_SWAP, 1831 MDIO_XGXS_BLOCK2_RX_LN_SWAP,
1862 (rx_lane_swap | 1832 (rx_lane_swap |
1863 MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE | 1833 MDIO_XGXS_BLOCK2_RX_LN_SWAP_ENABLE |
1864 MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE)); 1834 MDIO_XGXS_BLOCK2_RX_LN_SWAP_FORCE_ENABLE));
1865 } else { 1835 } else {
1866 CL45_WR_OVER_CL22(bp, phy, 1836 CL22_WR_OVER_CL45(bp, phy,
1867 MDIO_REG_BANK_XGXS_BLOCK2, 1837 MDIO_REG_BANK_XGXS_BLOCK2,
1868 MDIO_XGXS_BLOCK2_RX_LN_SWAP, 0); 1838 MDIO_XGXS_BLOCK2_RX_LN_SWAP, 0);
1869 } 1839 }
1870 1840
1871 if (tx_lane_swap != 0x1b) { 1841 if (tx_lane_swap != 0x1b) {
1872 CL45_WR_OVER_CL22(bp, phy, 1842 CL22_WR_OVER_CL45(bp, phy,
1873 MDIO_REG_BANK_XGXS_BLOCK2, 1843 MDIO_REG_BANK_XGXS_BLOCK2,
1874 MDIO_XGXS_BLOCK2_TX_LN_SWAP, 1844 MDIO_XGXS_BLOCK2_TX_LN_SWAP,
1875 (tx_lane_swap | 1845 (tx_lane_swap |
1876 MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE)); 1846 MDIO_XGXS_BLOCK2_TX_LN_SWAP_ENABLE));
1877 } else { 1847 } else {
1878 CL45_WR_OVER_CL22(bp, phy, 1848 CL22_WR_OVER_CL45(bp, phy,
1879 MDIO_REG_BANK_XGXS_BLOCK2, 1849 MDIO_REG_BANK_XGXS_BLOCK2,
1880 MDIO_XGXS_BLOCK2_TX_LN_SWAP, 0); 1850 MDIO_XGXS_BLOCK2_TX_LN_SWAP, 0);
1881 } 1851 }
1882} 1852}
1883 1853
@@ -1886,66 +1856,66 @@ static void bnx2x_set_parallel_detection(struct bnx2x_phy *phy,
1886{ 1856{
1887 struct bnx2x *bp = params->bp; 1857 struct bnx2x *bp = params->bp;
1888 u16 control2; 1858 u16 control2;
1889 CL45_RD_OVER_CL22(bp, phy, 1859 CL22_RD_OVER_CL45(bp, phy,
1890 MDIO_REG_BANK_SERDES_DIGITAL, 1860 MDIO_REG_BANK_SERDES_DIGITAL,
1891 MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, 1861 MDIO_SERDES_DIGITAL_A_1000X_CONTROL2,
1892 &control2); 1862 &control2);
1893 if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G) 1863 if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)
1894 control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; 1864 control2 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN;
1895 else 1865 else
1896 control2 &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN; 1866 control2 &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL2_PRL_DT_EN;
1897 DP(NETIF_MSG_LINK, "phy->speed_cap_mask = 0x%x, control2 = 0x%x\n", 1867 DP(NETIF_MSG_LINK, "phy->speed_cap_mask = 0x%x, control2 = 0x%x\n",
1898 phy->speed_cap_mask, control2); 1868 phy->speed_cap_mask, control2);
1899 CL45_WR_OVER_CL22(bp, phy, 1869 CL22_WR_OVER_CL45(bp, phy,
1900 MDIO_REG_BANK_SERDES_DIGITAL, 1870 MDIO_REG_BANK_SERDES_DIGITAL,
1901 MDIO_SERDES_DIGITAL_A_1000X_CONTROL2, 1871 MDIO_SERDES_DIGITAL_A_1000X_CONTROL2,
1902 control2); 1872 control2);
1903 1873
1904 if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) && 1874 if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) &&
1905 (phy->speed_cap_mask & 1875 (phy->speed_cap_mask &
1906 PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) { 1876 PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)) {
1907 DP(NETIF_MSG_LINK, "XGXS\n"); 1877 DP(NETIF_MSG_LINK, "XGXS\n");
1908 1878
1909 CL45_WR_OVER_CL22(bp, phy, 1879 CL22_WR_OVER_CL45(bp, phy,
1910 MDIO_REG_BANK_10G_PARALLEL_DETECT, 1880 MDIO_REG_BANK_10G_PARALLEL_DETECT,
1911 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK, 1881 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK,
1912 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK_CNT); 1882 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_LINK_CNT);
1913 1883
1914 CL45_RD_OVER_CL22(bp, phy, 1884 CL22_RD_OVER_CL45(bp, phy,
1915 MDIO_REG_BANK_10G_PARALLEL_DETECT, 1885 MDIO_REG_BANK_10G_PARALLEL_DETECT,
1916 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL, 1886 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL,
1917 &control2); 1887 &control2);
1918 1888
1919 1889
1920 control2 |= 1890 control2 |=
1921 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN; 1891 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL_PARDET10G_EN;
1922 1892
1923 CL45_WR_OVER_CL22(bp, phy, 1893 CL22_WR_OVER_CL45(bp, phy,
1924 MDIO_REG_BANK_10G_PARALLEL_DETECT, 1894 MDIO_REG_BANK_10G_PARALLEL_DETECT,
1925 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL, 1895 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_CONTROL,
1926 control2); 1896 control2);
1927 1897
1928 /* Disable parallel detection of HiG */ 1898 /* Disable parallel detection of HiG */
1929 CL45_WR_OVER_CL22(bp, phy, 1899 CL22_WR_OVER_CL45(bp, phy,
1930 MDIO_REG_BANK_XGXS_BLOCK2, 1900 MDIO_REG_BANK_XGXS_BLOCK2,
1931 MDIO_XGXS_BLOCK2_UNICORE_MODE_10G, 1901 MDIO_XGXS_BLOCK2_UNICORE_MODE_10G,
1932 MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS | 1902 MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_CX4_XGXS |
1933 MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS); 1903 MDIO_XGXS_BLOCK2_UNICORE_MODE_10G_HIGIG_XGXS);
1934 } 1904 }
1935} 1905}
1936 1906
1937static void bnx2x_set_autoneg(struct bnx2x_phy *phy, 1907static void bnx2x_set_autoneg(struct bnx2x_phy *phy,
1938 struct link_params *params, 1908 struct link_params *params,
1939 struct link_vars *vars, 1909 struct link_vars *vars,
1940 u8 enable_cl73) 1910 u8 enable_cl73)
1941{ 1911{
1942 struct bnx2x *bp = params->bp; 1912 struct bnx2x *bp = params->bp;
1943 u16 reg_val; 1913 u16 reg_val;
1944 1914
1945 /* CL37 Autoneg */ 1915 /* CL37 Autoneg */
1946 CL45_RD_OVER_CL22(bp, phy, 1916 CL22_RD_OVER_CL45(bp, phy,
1947 MDIO_REG_BANK_COMBO_IEEE0, 1917 MDIO_REG_BANK_COMBO_IEEE0,
1948 MDIO_COMBO_IEEE0_MII_CONTROL, &reg_val); 1918 MDIO_COMBO_IEEE0_MII_CONTROL, &reg_val);
1949 1919
1950 /* CL37 Autoneg Enabled */ 1920 /* CL37 Autoneg Enabled */
1951 if (vars->line_speed == SPEED_AUTO_NEG) 1921 if (vars->line_speed == SPEED_AUTO_NEG)
@@ -1954,15 +1924,15 @@ static void bnx2x_set_autoneg(struct bnx2x_phy *phy,
1954 reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | 1924 reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN |
1955 MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN); 1925 MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN);
1956 1926
1957 CL45_WR_OVER_CL22(bp, phy, 1927 CL22_WR_OVER_CL45(bp, phy,
1958 MDIO_REG_BANK_COMBO_IEEE0, 1928 MDIO_REG_BANK_COMBO_IEEE0,
1959 MDIO_COMBO_IEEE0_MII_CONTROL, reg_val); 1929 MDIO_COMBO_IEEE0_MII_CONTROL, reg_val);
1960 1930
1961 /* Enable/Disable Autodetection */ 1931 /* Enable/Disable Autodetection */
1962 1932
1963 CL45_RD_OVER_CL22(bp, phy, 1933 CL22_RD_OVER_CL45(bp, phy,
1964 MDIO_REG_BANK_SERDES_DIGITAL, 1934 MDIO_REG_BANK_SERDES_DIGITAL,
1965 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, &reg_val); 1935 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, &reg_val);
1966 reg_val &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN | 1936 reg_val &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN |
1967 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT); 1937 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT);
1968 reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE; 1938 reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE;
@@ -1971,14 +1941,14 @@ static void bnx2x_set_autoneg(struct bnx2x_phy *phy,
1971 else 1941 else
1972 reg_val &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET; 1942 reg_val &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET;
1973 1943
1974 CL45_WR_OVER_CL22(bp, phy, 1944 CL22_WR_OVER_CL45(bp, phy,
1975 MDIO_REG_BANK_SERDES_DIGITAL, 1945 MDIO_REG_BANK_SERDES_DIGITAL,
1976 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, reg_val); 1946 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, reg_val);
1977 1947
1978 /* Enable TetonII and BAM autoneg */ 1948 /* Enable TetonII and BAM autoneg */
1979 CL45_RD_OVER_CL22(bp, phy, 1949 CL22_RD_OVER_CL45(bp, phy,
1980 MDIO_REG_BANK_BAM_NEXT_PAGE, 1950 MDIO_REG_BANK_BAM_NEXT_PAGE,
1981 MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL, 1951 MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL,
1982 &reg_val); 1952 &reg_val);
1983 if (vars->line_speed == SPEED_AUTO_NEG) { 1953 if (vars->line_speed == SPEED_AUTO_NEG) {
1984 /* Enable BAM aneg Mode and TetonII aneg Mode */ 1954 /* Enable BAM aneg Mode and TetonII aneg Mode */
@@ -1989,20 +1959,20 @@ static void bnx2x_set_autoneg(struct bnx2x_phy *phy,
1989 reg_val &= ~(MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE | 1959 reg_val &= ~(MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_BAM_MODE |
1990 MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN); 1960 MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL_TETON_AN);
1991 } 1961 }
1992 CL45_WR_OVER_CL22(bp, phy, 1962 CL22_WR_OVER_CL45(bp, phy,
1993 MDIO_REG_BANK_BAM_NEXT_PAGE, 1963 MDIO_REG_BANK_BAM_NEXT_PAGE,
1994 MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL, 1964 MDIO_BAM_NEXT_PAGE_MP5_NEXT_PAGE_CTRL,
1995 reg_val); 1965 reg_val);
1996 1966
1997 if (enable_cl73) { 1967 if (enable_cl73) {
1998 /* Enable Cl73 FSM status bits */ 1968 /* Enable Cl73 FSM status bits */
1999 CL45_WR_OVER_CL22(bp, phy, 1969 CL22_WR_OVER_CL45(bp, phy,
2000 MDIO_REG_BANK_CL73_USERB0, 1970 MDIO_REG_BANK_CL73_USERB0,
2001 MDIO_CL73_USERB0_CL73_UCTRL, 1971 MDIO_CL73_USERB0_CL73_UCTRL,
2002 0xe); 1972 0xe);
2003 1973
2004 /* Enable BAM Station Manager*/ 1974 /* Enable BAM Station Manager*/
2005 CL45_WR_OVER_CL22(bp, phy, 1975 CL22_WR_OVER_CL45(bp, phy,
2006 MDIO_REG_BANK_CL73_USERB0, 1976 MDIO_REG_BANK_CL73_USERB0,
2007 MDIO_CL73_USERB0_CL73_BAM_CTRL1, 1977 MDIO_CL73_USERB0_CL73_BAM_CTRL1,
2008 MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN | 1978 MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_EN |
@@ -2010,10 +1980,10 @@ static void bnx2x_set_autoneg(struct bnx2x_phy *phy,
2010 MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN); 1980 MDIO_CL73_USERB0_CL73_BAM_CTRL1_BAM_NP_AFTER_BP_EN);
2011 1981
2012 /* Advertise CL73 link speeds */ 1982 /* Advertise CL73 link speeds */
2013 CL45_RD_OVER_CL22(bp, phy, 1983 CL22_RD_OVER_CL45(bp, phy,
2014 MDIO_REG_BANK_CL73_IEEEB1, 1984 MDIO_REG_BANK_CL73_IEEEB1,
2015 MDIO_CL73_IEEEB1_AN_ADV2, 1985 MDIO_CL73_IEEEB1_AN_ADV2,
2016 &reg_val); 1986 &reg_val);
2017 if (phy->speed_cap_mask & 1987 if (phy->speed_cap_mask &
2018 PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) 1988 PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)
2019 reg_val |= MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4; 1989 reg_val |= MDIO_CL73_IEEEB1_AN_ADV2_ADVR_10G_KX4;
@@ -2021,10 +1991,10 @@ static void bnx2x_set_autoneg(struct bnx2x_phy *phy,
2021 PORT_HW_CFG_SPEED_CAPABILITY_D0_1G) 1991 PORT_HW_CFG_SPEED_CAPABILITY_D0_1G)
2022 reg_val |= MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX; 1992 reg_val |= MDIO_CL73_IEEEB1_AN_ADV2_ADVR_1000M_KX;
2023 1993
2024 CL45_WR_OVER_CL22(bp, phy, 1994 CL22_WR_OVER_CL45(bp, phy,
2025 MDIO_REG_BANK_CL73_IEEEB1, 1995 MDIO_REG_BANK_CL73_IEEEB1,
2026 MDIO_CL73_IEEEB1_AN_ADV2, 1996 MDIO_CL73_IEEEB1_AN_ADV2,
2027 reg_val); 1997 reg_val);
2028 1998
2029 /* CL73 Autoneg Enabled */ 1999 /* CL73 Autoneg Enabled */
2030 reg_val = MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN; 2000 reg_val = MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN;
@@ -2032,37 +2002,39 @@ static void bnx2x_set_autoneg(struct bnx2x_phy *phy,
2032 } else /* CL73 Autoneg Disabled */ 2002 } else /* CL73 Autoneg Disabled */
2033 reg_val = 0; 2003 reg_val = 0;
2034 2004
2035 CL45_WR_OVER_CL22(bp, phy, 2005 CL22_WR_OVER_CL45(bp, phy,
2036 MDIO_REG_BANK_CL73_IEEEB0, 2006 MDIO_REG_BANK_CL73_IEEEB0,
2037 MDIO_CL73_IEEEB0_CL73_AN_CONTROL, reg_val); 2007 MDIO_CL73_IEEEB0_CL73_AN_CONTROL, reg_val);
2038} 2008}
2039 2009
2040/* program SerDes, forced speed */ 2010/* program SerDes, forced speed */
2041static void bnx2x_program_serdes(struct bnx2x_phy *phy, 2011static void bnx2x_program_serdes(struct bnx2x_phy *phy,
2042 struct link_params *params, 2012 struct link_params *params,
2043 struct link_vars *vars) 2013 struct link_vars *vars)
2044{ 2014{
2045 struct bnx2x *bp = params->bp; 2015 struct bnx2x *bp = params->bp;
2046 u16 reg_val; 2016 u16 reg_val;
2047 2017
2048 /* program duplex, disable autoneg and sgmii*/ 2018 /* program duplex, disable autoneg and sgmii*/
2049 CL45_RD_OVER_CL22(bp, phy, 2019 CL22_RD_OVER_CL45(bp, phy,
2050 MDIO_REG_BANK_COMBO_IEEE0, 2020 MDIO_REG_BANK_COMBO_IEEE0,
2051 MDIO_COMBO_IEEE0_MII_CONTROL, &reg_val); 2021 MDIO_COMBO_IEEE0_MII_CONTROL, &reg_val);
2052 reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX | 2022 reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX |
2053 MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | 2023 MDIO_COMBO_IEEO_MII_CONTROL_AN_EN |
2054 MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK); 2024 MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK);
2055 if (phy->req_duplex == DUPLEX_FULL) 2025 if (phy->req_duplex == DUPLEX_FULL)
2056 reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX; 2026 reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX;
2057 CL45_WR_OVER_CL22(bp, phy, 2027 CL22_WR_OVER_CL45(bp, phy,
2058 MDIO_REG_BANK_COMBO_IEEE0, 2028 MDIO_REG_BANK_COMBO_IEEE0,
2059 MDIO_COMBO_IEEE0_MII_CONTROL, reg_val); 2029 MDIO_COMBO_IEEE0_MII_CONTROL, reg_val);
2060 2030
2061 /* program speed 2031 /*
2062 - needed only if the speed is greater than 1G (2.5G or 10G) */ 2032 * program speed
2063 CL45_RD_OVER_CL22(bp, phy, 2033 * - needed only if the speed is greater than 1G (2.5G or 10G)
2064 MDIO_REG_BANK_SERDES_DIGITAL, 2034 */
2065 MDIO_SERDES_DIGITAL_MISC1, &reg_val); 2035 CL22_RD_OVER_CL45(bp, phy,
2036 MDIO_REG_BANK_SERDES_DIGITAL,
2037 MDIO_SERDES_DIGITAL_MISC1, &reg_val);
2066 /* clearing the speed value before setting the right speed */ 2038 /* clearing the speed value before setting the right speed */
2067 DP(NETIF_MSG_LINK, "MDIO_REG_BANK_SERDES_DIGITAL = 0x%x\n", reg_val); 2039 DP(NETIF_MSG_LINK, "MDIO_REG_BANK_SERDES_DIGITAL = 0x%x\n", reg_val);
2068 2040
@@ -2083,9 +2055,9 @@ static void bnx2x_program_serdes(struct bnx2x_phy *phy,
2083 MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_13G; 2055 MDIO_SERDES_DIGITAL_MISC1_FORCE_SPEED_13G;
2084 } 2056 }
2085 2057
2086 CL45_WR_OVER_CL22(bp, phy, 2058 CL22_WR_OVER_CL45(bp, phy,
2087 MDIO_REG_BANK_SERDES_DIGITAL, 2059 MDIO_REG_BANK_SERDES_DIGITAL,
2088 MDIO_SERDES_DIGITAL_MISC1, reg_val); 2060 MDIO_SERDES_DIGITAL_MISC1, reg_val);
2089 2061
2090} 2062}
2091 2063
@@ -2102,13 +2074,13 @@ static void bnx2x_set_brcm_cl37_advertisment(struct bnx2x_phy *phy,
2102 val |= MDIO_OVER_1G_UP1_2_5G; 2074 val |= MDIO_OVER_1G_UP1_2_5G;
2103 if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) 2075 if (phy->speed_cap_mask & PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)
2104 val |= MDIO_OVER_1G_UP1_10G; 2076 val |= MDIO_OVER_1G_UP1_10G;
2105 CL45_WR_OVER_CL22(bp, phy, 2077 CL22_WR_OVER_CL45(bp, phy,
2106 MDIO_REG_BANK_OVER_1G, 2078 MDIO_REG_BANK_OVER_1G,
2107 MDIO_OVER_1G_UP1, val); 2079 MDIO_OVER_1G_UP1, val);
2108 2080
2109 CL45_WR_OVER_CL22(bp, phy, 2081 CL22_WR_OVER_CL45(bp, phy,
2110 MDIO_REG_BANK_OVER_1G, 2082 MDIO_REG_BANK_OVER_1G,
2111 MDIO_OVER_1G_UP3, 0x400); 2083 MDIO_OVER_1G_UP3, 0x400);
2112} 2084}
2113 2085
2114static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy, 2086static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,
@@ -2116,22 +2088,21 @@ static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,
2116{ 2088{
2117 struct bnx2x *bp = params->bp; 2089 struct bnx2x *bp = params->bp;
2118 *ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX; 2090 *ieee_fc = MDIO_COMBO_IEEE0_AUTO_NEG_ADV_FULL_DUPLEX;
2119 /* resolve pause mode and advertisement 2091 /*
2120 * Please refer to Table 28B-3 of the 802.3ab-1999 spec */ 2092 * Resolve pause mode and advertisement.
2093 * Please refer to Table 28B-3 of the 802.3ab-1999 spec
2094 */
2121 2095
2122 switch (phy->req_flow_ctrl) { 2096 switch (phy->req_flow_ctrl) {
2123 case BNX2X_FLOW_CTRL_AUTO: 2097 case BNX2X_FLOW_CTRL_AUTO:
2124 if (params->req_fc_auto_adv == BNX2X_FLOW_CTRL_BOTH) { 2098 if (params->req_fc_auto_adv == BNX2X_FLOW_CTRL_BOTH)
2125 *ieee_fc |= 2099 *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH;
2126 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH; 2100 else
2127 } else {
2128 *ieee_fc |= 2101 *ieee_fc |=
2129 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC; 2102 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
2130 }
2131 break; 2103 break;
2132 case BNX2X_FLOW_CTRL_TX: 2104 case BNX2X_FLOW_CTRL_TX:
2133 *ieee_fc |= 2105 *ieee_fc |= MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
2134 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC;
2135 break; 2106 break;
2136 2107
2137 case BNX2X_FLOW_CTRL_RX: 2108 case BNX2X_FLOW_CTRL_RX:
@@ -2149,23 +2120,23 @@ static void bnx2x_calc_ieee_aneg_adv(struct bnx2x_phy *phy,
2149 2120
2150static void bnx2x_set_ieee_aneg_advertisment(struct bnx2x_phy *phy, 2121static void bnx2x_set_ieee_aneg_advertisment(struct bnx2x_phy *phy,
2151 struct link_params *params, 2122 struct link_params *params,
2152 u16 ieee_fc) 2123 u16 ieee_fc)
2153{ 2124{
2154 struct bnx2x *bp = params->bp; 2125 struct bnx2x *bp = params->bp;
2155 u16 val; 2126 u16 val;
2156 /* for AN, we are always publishing full duplex */ 2127 /* for AN, we are always publishing full duplex */
2157 2128
2158 CL45_WR_OVER_CL22(bp, phy, 2129 CL22_WR_OVER_CL45(bp, phy,
2159 MDIO_REG_BANK_COMBO_IEEE0, 2130 MDIO_REG_BANK_COMBO_IEEE0,
2160 MDIO_COMBO_IEEE0_AUTO_NEG_ADV, ieee_fc); 2131 MDIO_COMBO_IEEE0_AUTO_NEG_ADV, ieee_fc);
2161 CL45_RD_OVER_CL22(bp, phy, 2132 CL22_RD_OVER_CL45(bp, phy,
2162 MDIO_REG_BANK_CL73_IEEEB1, 2133 MDIO_REG_BANK_CL73_IEEEB1,
2163 MDIO_CL73_IEEEB1_AN_ADV1, &val); 2134 MDIO_CL73_IEEEB1_AN_ADV1, &val);
2164 val &= ~MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_BOTH; 2135 val &= ~MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_BOTH;
2165 val |= ((ieee_fc<<3) & MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK); 2136 val |= ((ieee_fc<<3) & MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK);
2166 CL45_WR_OVER_CL22(bp, phy, 2137 CL22_WR_OVER_CL45(bp, phy,
2167 MDIO_REG_BANK_CL73_IEEEB1, 2138 MDIO_REG_BANK_CL73_IEEEB1,
2168 MDIO_CL73_IEEEB1_AN_ADV1, val); 2139 MDIO_CL73_IEEEB1_AN_ADV1, val);
2169} 2140}
2170 2141
2171static void bnx2x_restart_autoneg(struct bnx2x_phy *phy, 2142static void bnx2x_restart_autoneg(struct bnx2x_phy *phy,
@@ -2179,67 +2150,67 @@ static void bnx2x_restart_autoneg(struct bnx2x_phy *phy,
2179 /* Enable and restart BAM/CL37 aneg */ 2150 /* Enable and restart BAM/CL37 aneg */
2180 2151
2181 if (enable_cl73) { 2152 if (enable_cl73) {
2182 CL45_RD_OVER_CL22(bp, phy, 2153 CL22_RD_OVER_CL45(bp, phy,
2183 MDIO_REG_BANK_CL73_IEEEB0, 2154 MDIO_REG_BANK_CL73_IEEEB0,
2184 MDIO_CL73_IEEEB0_CL73_AN_CONTROL, 2155 MDIO_CL73_IEEEB0_CL73_AN_CONTROL,
2185 &mii_control); 2156 &mii_control);
2186 2157
2187 CL45_WR_OVER_CL22(bp, phy, 2158 CL22_WR_OVER_CL45(bp, phy,
2188 MDIO_REG_BANK_CL73_IEEEB0, 2159 MDIO_REG_BANK_CL73_IEEEB0,
2189 MDIO_CL73_IEEEB0_CL73_AN_CONTROL, 2160 MDIO_CL73_IEEEB0_CL73_AN_CONTROL,
2190 (mii_control | 2161 (mii_control |
2191 MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN | 2162 MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN |
2192 MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN)); 2163 MDIO_CL73_IEEEB0_CL73_AN_CONTROL_RESTART_AN));
2193 } else { 2164 } else {
2194 2165
2195 CL45_RD_OVER_CL22(bp, phy, 2166 CL22_RD_OVER_CL45(bp, phy,
2196 MDIO_REG_BANK_COMBO_IEEE0, 2167 MDIO_REG_BANK_COMBO_IEEE0,
2197 MDIO_COMBO_IEEE0_MII_CONTROL, 2168 MDIO_COMBO_IEEE0_MII_CONTROL,
2198 &mii_control); 2169 &mii_control);
2199 DP(NETIF_MSG_LINK, 2170 DP(NETIF_MSG_LINK,
2200 "bnx2x_restart_autoneg mii_control before = 0x%x\n", 2171 "bnx2x_restart_autoneg mii_control before = 0x%x\n",
2201 mii_control); 2172 mii_control);
2202 CL45_WR_OVER_CL22(bp, phy, 2173 CL22_WR_OVER_CL45(bp, phy,
2203 MDIO_REG_BANK_COMBO_IEEE0, 2174 MDIO_REG_BANK_COMBO_IEEE0,
2204 MDIO_COMBO_IEEE0_MII_CONTROL, 2175 MDIO_COMBO_IEEE0_MII_CONTROL,
2205 (mii_control | 2176 (mii_control |
2206 MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | 2177 MDIO_COMBO_IEEO_MII_CONTROL_AN_EN |
2207 MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN)); 2178 MDIO_COMBO_IEEO_MII_CONTROL_RESTART_AN));
2208 } 2179 }
2209} 2180}
2210 2181
2211static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy, 2182static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy,
2212 struct link_params *params, 2183 struct link_params *params,
2213 struct link_vars *vars) 2184 struct link_vars *vars)
2214{ 2185{
2215 struct bnx2x *bp = params->bp; 2186 struct bnx2x *bp = params->bp;
2216 u16 control1; 2187 u16 control1;
2217 2188
2218 /* in SGMII mode, the unicore is always slave */ 2189 /* in SGMII mode, the unicore is always slave */
2219 2190
2220 CL45_RD_OVER_CL22(bp, phy, 2191 CL22_RD_OVER_CL45(bp, phy,
2221 MDIO_REG_BANK_SERDES_DIGITAL, 2192 MDIO_REG_BANK_SERDES_DIGITAL,
2222 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, 2193 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1,
2223 &control1); 2194 &control1);
2224 control1 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT; 2195 control1 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT;
2225 /* set sgmii mode (and not fiber) */ 2196 /* set sgmii mode (and not fiber) */
2226 control1 &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE | 2197 control1 &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE |
2227 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET | 2198 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET |
2228 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_MSTR_MODE); 2199 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_MSTR_MODE);
2229 CL45_WR_OVER_CL22(bp, phy, 2200 CL22_WR_OVER_CL45(bp, phy,
2230 MDIO_REG_BANK_SERDES_DIGITAL, 2201 MDIO_REG_BANK_SERDES_DIGITAL,
2231 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, 2202 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1,
2232 control1); 2203 control1);
2233 2204
2234 /* if forced speed */ 2205 /* if forced speed */
2235 if (!(vars->line_speed == SPEED_AUTO_NEG)) { 2206 if (!(vars->line_speed == SPEED_AUTO_NEG)) {
2236 /* set speed, disable autoneg */ 2207 /* set speed, disable autoneg */
2237 u16 mii_control; 2208 u16 mii_control;
2238 2209
2239 CL45_RD_OVER_CL22(bp, phy, 2210 CL22_RD_OVER_CL45(bp, phy,
2240 MDIO_REG_BANK_COMBO_IEEE0, 2211 MDIO_REG_BANK_COMBO_IEEE0,
2241 MDIO_COMBO_IEEE0_MII_CONTROL, 2212 MDIO_COMBO_IEEE0_MII_CONTROL,
2242 &mii_control); 2213 &mii_control);
2243 mii_control &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | 2214 mii_control &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN |
2244 MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK| 2215 MDIO_COMBO_IEEO_MII_CONTROL_MAN_SGMII_SP_MASK|
2245 MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX); 2216 MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX);
@@ -2267,10 +2238,10 @@ static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy,
2267 if (phy->req_duplex == DUPLEX_FULL) 2238 if (phy->req_duplex == DUPLEX_FULL)
2268 mii_control |= 2239 mii_control |=
2269 MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX; 2240 MDIO_COMBO_IEEO_MII_CONTROL_FULL_DUPLEX;
2270 CL45_WR_OVER_CL22(bp, phy, 2241 CL22_WR_OVER_CL45(bp, phy,
2271 MDIO_REG_BANK_COMBO_IEEE0, 2242 MDIO_REG_BANK_COMBO_IEEE0,
2272 MDIO_COMBO_IEEE0_MII_CONTROL, 2243 MDIO_COMBO_IEEE0_MII_CONTROL,
2273 mii_control); 2244 mii_control);
2274 2245
2275 } else { /* AN mode */ 2246 } else { /* AN mode */
2276 /* enable and restart AN */ 2247 /* enable and restart AN */
@@ -2285,19 +2256,19 @@ static void bnx2x_initialize_sgmii_process(struct bnx2x_phy *phy,
2285 2256
2286static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result) 2257static void bnx2x_pause_resolve(struct link_vars *vars, u32 pause_result)
2287{ /* LD LP */ 2258{ /* LD LP */
2288 switch (pause_result) { /* ASYM P ASYM P */ 2259 switch (pause_result) { /* ASYM P ASYM P */
2289 case 0xb: /* 1 0 1 1 */ 2260 case 0xb: /* 1 0 1 1 */
2290 vars->flow_ctrl = BNX2X_FLOW_CTRL_TX; 2261 vars->flow_ctrl = BNX2X_FLOW_CTRL_TX;
2291 break; 2262 break;
2292 2263
2293 case 0xe: /* 1 1 1 0 */ 2264 case 0xe: /* 1 1 1 0 */
2294 vars->flow_ctrl = BNX2X_FLOW_CTRL_RX; 2265 vars->flow_ctrl = BNX2X_FLOW_CTRL_RX;
2295 break; 2266 break;
2296 2267
2297 case 0x5: /* 0 1 0 1 */ 2268 case 0x5: /* 0 1 0 1 */
2298 case 0x7: /* 0 1 1 1 */ 2269 case 0x7: /* 0 1 1 1 */
2299 case 0xd: /* 1 1 0 1 */ 2270 case 0xd: /* 1 1 0 1 */
2300 case 0xf: /* 1 1 1 1 */ 2271 case 0xf: /* 1 1 1 1 */
2301 vars->flow_ctrl = BNX2X_FLOW_CTRL_BOTH; 2272 vars->flow_ctrl = BNX2X_FLOW_CTRL_BOTH;
2302 break; 2273 break;
2303 2274
@@ -2317,24 +2288,24 @@ static u8 bnx2x_direct_parallel_detect_used(struct bnx2x_phy *phy,
2317 u16 pd_10g, status2_1000x; 2288 u16 pd_10g, status2_1000x;
2318 if (phy->req_line_speed != SPEED_AUTO_NEG) 2289 if (phy->req_line_speed != SPEED_AUTO_NEG)
2319 return 0; 2290 return 0;
2320 CL45_RD_OVER_CL22(bp, phy, 2291 CL22_RD_OVER_CL45(bp, phy,
2321 MDIO_REG_BANK_SERDES_DIGITAL, 2292 MDIO_REG_BANK_SERDES_DIGITAL,
2322 MDIO_SERDES_DIGITAL_A_1000X_STATUS2, 2293 MDIO_SERDES_DIGITAL_A_1000X_STATUS2,
2323 &status2_1000x); 2294 &status2_1000x);
2324 CL45_RD_OVER_CL22(bp, phy, 2295 CL22_RD_OVER_CL45(bp, phy,
2325 MDIO_REG_BANK_SERDES_DIGITAL, 2296 MDIO_REG_BANK_SERDES_DIGITAL,
2326 MDIO_SERDES_DIGITAL_A_1000X_STATUS2, 2297 MDIO_SERDES_DIGITAL_A_1000X_STATUS2,
2327 &status2_1000x); 2298 &status2_1000x);
2328 if (status2_1000x & MDIO_SERDES_DIGITAL_A_1000X_STATUS2_AN_DISABLED) { 2299 if (status2_1000x & MDIO_SERDES_DIGITAL_A_1000X_STATUS2_AN_DISABLED) {
2329 DP(NETIF_MSG_LINK, "1G parallel detect link on port %d\n", 2300 DP(NETIF_MSG_LINK, "1G parallel detect link on port %d\n",
2330 params->port); 2301 params->port);
2331 return 1; 2302 return 1;
2332 } 2303 }
2333 2304
2334 CL45_RD_OVER_CL22(bp, phy, 2305 CL22_RD_OVER_CL45(bp, phy,
2335 MDIO_REG_BANK_10G_PARALLEL_DETECT, 2306 MDIO_REG_BANK_10G_PARALLEL_DETECT,
2336 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS, 2307 MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS,
2337 &pd_10g); 2308 &pd_10g);
2338 2309
2339 if (pd_10g & MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS_PD_LINK) { 2310 if (pd_10g & MDIO_10G_PARALLEL_DETECT_PAR_DET_10G_STATUS_PD_LINK) {
2340 DP(NETIF_MSG_LINK, "10G parallel detect link on port %d\n", 2311 DP(NETIF_MSG_LINK, "10G parallel detect link on port %d\n",
@@ -2373,14 +2344,14 @@ static void bnx2x_flow_ctrl_resolve(struct bnx2x_phy *phy,
2373 (MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE | 2344 (MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_AUTONEG_COMPLETE |
2374 MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE)) { 2345 MDIO_GP_STATUS_TOP_AN_STATUS1_CL73_MR_LP_NP_AN_ABLE)) {
2375 2346
2376 CL45_RD_OVER_CL22(bp, phy, 2347 CL22_RD_OVER_CL45(bp, phy,
2377 MDIO_REG_BANK_CL73_IEEEB1, 2348 MDIO_REG_BANK_CL73_IEEEB1,
2378 MDIO_CL73_IEEEB1_AN_ADV1, 2349 MDIO_CL73_IEEEB1_AN_ADV1,
2379 &ld_pause); 2350 &ld_pause);
2380 CL45_RD_OVER_CL22(bp, phy, 2351 CL22_RD_OVER_CL45(bp, phy,
2381 MDIO_REG_BANK_CL73_IEEEB1, 2352 MDIO_REG_BANK_CL73_IEEEB1,
2382 MDIO_CL73_IEEEB1_AN_LP_ADV1, 2353 MDIO_CL73_IEEEB1_AN_LP_ADV1,
2383 &lp_pause); 2354 &lp_pause);
2384 pause_result = (ld_pause & 2355 pause_result = (ld_pause &
2385 MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK) 2356 MDIO_CL73_IEEEB1_AN_ADV1_PAUSE_MASK)
2386 >> 8; 2357 >> 8;
@@ -2390,18 +2361,18 @@ static void bnx2x_flow_ctrl_resolve(struct bnx2x_phy *phy,
2390 DP(NETIF_MSG_LINK, "pause_result CL73 0x%x\n", 2361 DP(NETIF_MSG_LINK, "pause_result CL73 0x%x\n",
2391 pause_result); 2362 pause_result);
2392 } else { 2363 } else {
2393 CL45_RD_OVER_CL22(bp, phy, 2364 CL22_RD_OVER_CL45(bp, phy,
2394 MDIO_REG_BANK_COMBO_IEEE0, 2365 MDIO_REG_BANK_COMBO_IEEE0,
2395 MDIO_COMBO_IEEE0_AUTO_NEG_ADV, 2366 MDIO_COMBO_IEEE0_AUTO_NEG_ADV,
2396 &ld_pause); 2367 &ld_pause);
2397 CL45_RD_OVER_CL22(bp, phy, 2368 CL22_RD_OVER_CL45(bp, phy,
2398 MDIO_REG_BANK_COMBO_IEEE0, 2369 MDIO_REG_BANK_COMBO_IEEE0,
2399 MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1, 2370 MDIO_COMBO_IEEE0_AUTO_NEG_LINK_PARTNER_ABILITY1,
2400 &lp_pause); 2371 &lp_pause);
2401 pause_result = (ld_pause & 2372 pause_result = (ld_pause &
2402 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>5; 2373 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>5;
2403 pause_result |= (lp_pause & 2374 pause_result |= (lp_pause &
2404 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>7; 2375 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_MASK)>>7;
2405 DP(NETIF_MSG_LINK, "pause_result CL37 0x%x\n", 2376 DP(NETIF_MSG_LINK, "pause_result CL37 0x%x\n",
2406 pause_result); 2377 pause_result);
2407 } 2378 }
@@ -2417,25 +2388,25 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
2417 u16 rx_status, ustat_val, cl37_fsm_recieved; 2388 u16 rx_status, ustat_val, cl37_fsm_recieved;
2418 DP(NETIF_MSG_LINK, "bnx2x_check_fallback_to_cl37\n"); 2389 DP(NETIF_MSG_LINK, "bnx2x_check_fallback_to_cl37\n");
2419 /* Step 1: Make sure signal is detected */ 2390 /* Step 1: Make sure signal is detected */
2420 CL45_RD_OVER_CL22(bp, phy, 2391 CL22_RD_OVER_CL45(bp, phy,
2421 MDIO_REG_BANK_RX0, 2392 MDIO_REG_BANK_RX0,
2422 MDIO_RX0_RX_STATUS, 2393 MDIO_RX0_RX_STATUS,
2423 &rx_status); 2394 &rx_status);
2424 if ((rx_status & MDIO_RX0_RX_STATUS_SIGDET) != 2395 if ((rx_status & MDIO_RX0_RX_STATUS_SIGDET) !=
2425 (MDIO_RX0_RX_STATUS_SIGDET)) { 2396 (MDIO_RX0_RX_STATUS_SIGDET)) {
2426 DP(NETIF_MSG_LINK, "Signal is not detected. Restoring CL73." 2397 DP(NETIF_MSG_LINK, "Signal is not detected. Restoring CL73."
2427 "rx_status(0x80b0) = 0x%x\n", rx_status); 2398 "rx_status(0x80b0) = 0x%x\n", rx_status);
2428 CL45_WR_OVER_CL22(bp, phy, 2399 CL22_WR_OVER_CL45(bp, phy,
2429 MDIO_REG_BANK_CL73_IEEEB0, 2400 MDIO_REG_BANK_CL73_IEEEB0,
2430 MDIO_CL73_IEEEB0_CL73_AN_CONTROL, 2401 MDIO_CL73_IEEEB0_CL73_AN_CONTROL,
2431 MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN); 2402 MDIO_CL73_IEEEB0_CL73_AN_CONTROL_AN_EN);
2432 return; 2403 return;
2433 } 2404 }
2434 /* Step 2: Check CL73 state machine */ 2405 /* Step 2: Check CL73 state machine */
2435 CL45_RD_OVER_CL22(bp, phy, 2406 CL22_RD_OVER_CL45(bp, phy,
2436 MDIO_REG_BANK_CL73_USERB0, 2407 MDIO_REG_BANK_CL73_USERB0,
2437 MDIO_CL73_USERB0_CL73_USTAT1, 2408 MDIO_CL73_USERB0_CL73_USTAT1,
2438 &ustat_val); 2409 &ustat_val);
2439 if ((ustat_val & 2410 if ((ustat_val &
2440 (MDIO_CL73_USERB0_CL73_USTAT1_LINK_STATUS_CHECK | 2411 (MDIO_CL73_USERB0_CL73_USTAT1_LINK_STATUS_CHECK |
2441 MDIO_CL73_USERB0_CL73_USTAT1_AN_GOOD_CHECK_BAM37)) != 2412 MDIO_CL73_USERB0_CL73_USTAT1_AN_GOOD_CHECK_BAM37)) !=
@@ -2445,12 +2416,14 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
2445 "ustat_val(0x8371) = 0x%x\n", ustat_val); 2416 "ustat_val(0x8371) = 0x%x\n", ustat_val);
2446 return; 2417 return;
2447 } 2418 }
2448 /* Step 3: Check CL37 Message Pages received to indicate LP 2419 /*
2449 supports only CL37 */ 2420 * Step 3: Check CL37 Message Pages received to indicate LP
2450 CL45_RD_OVER_CL22(bp, phy, 2421 * supports only CL37
2451 MDIO_REG_BANK_REMOTE_PHY, 2422 */
2452 MDIO_REMOTE_PHY_MISC_RX_STATUS, 2423 CL22_RD_OVER_CL45(bp, phy,
2453 &cl37_fsm_recieved); 2424 MDIO_REG_BANK_REMOTE_PHY,
2425 MDIO_REMOTE_PHY_MISC_RX_STATUS,
2426 &cl37_fsm_recieved);
2454 if ((cl37_fsm_recieved & 2427 if ((cl37_fsm_recieved &
2455 (MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG | 2428 (MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_OVER1G_MSG |
2456 MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG)) != 2429 MDIO_REMOTE_PHY_MISC_RX_STATUS_CL37_FSM_RECEIVED_BRCM_OUI_MSG)) !=
@@ -2461,14 +2434,18 @@ static void bnx2x_check_fallback_to_cl37(struct bnx2x_phy *phy,
2461 cl37_fsm_recieved); 2434 cl37_fsm_recieved);
2462 return; 2435 return;
2463 } 2436 }
2464 /* The combined cl37/cl73 fsm state information indicating that we are 2437 /*
2465 connected to a device which does not support cl73, but does support 2438 * The combined cl37/cl73 fsm state information indicating that
2466 cl37 BAM. In this case we disable cl73 and restart cl37 auto-neg */ 2439 * we are connected to a device which does not support cl73, but
2440 * does support cl37 BAM. In this case we disable cl73 and
2441 * restart cl37 auto-neg
2442 */
2443
2467 /* Disable CL73 */ 2444 /* Disable CL73 */
2468 CL45_WR_OVER_CL22(bp, phy, 2445 CL22_WR_OVER_CL45(bp, phy,
2469 MDIO_REG_BANK_CL73_IEEEB0, 2446 MDIO_REG_BANK_CL73_IEEEB0,
2470 MDIO_CL73_IEEEB0_CL73_AN_CONTROL, 2447 MDIO_CL73_IEEEB0_CL73_AN_CONTROL,
2471 0); 2448 0);
2472 /* Restart CL37 autoneg */ 2449 /* Restart CL37 autoneg */
2473 bnx2x_restart_autoneg(phy, params, 0); 2450 bnx2x_restart_autoneg(phy, params, 0);
2474 DP(NETIF_MSG_LINK, "Disabling CL73, and restarting CL37 autoneg\n"); 2451 DP(NETIF_MSG_LINK, "Disabling CL73, and restarting CL37 autoneg\n");
@@ -2493,14 +2470,14 @@ static u8 bnx2x_link_settings_status(struct bnx2x_phy *phy,
2493 struct link_vars *vars) 2470 struct link_vars *vars)
2494{ 2471{
2495 struct bnx2x *bp = params->bp; 2472 struct bnx2x *bp = params->bp;
2496 u16 new_line_speed , gp_status; 2473 u16 new_line_speed, gp_status;
2497 u8 rc = 0; 2474 u8 rc = 0;
2498 2475
2499 /* Read gp_status */ 2476 /* Read gp_status */
2500 CL45_RD_OVER_CL22(bp, phy, 2477 CL22_RD_OVER_CL45(bp, phy,
2501 MDIO_REG_BANK_GP_STATUS, 2478 MDIO_REG_BANK_GP_STATUS,
2502 MDIO_GP_STATUS_TOP_AN_STATUS1, 2479 MDIO_GP_STATUS_TOP_AN_STATUS1,
2503 &gp_status); 2480 &gp_status);
2504 2481
2505 if (phy->req_line_speed == SPEED_AUTO_NEG) 2482 if (phy->req_line_speed == SPEED_AUTO_NEG)
2506 vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_ENABLED; 2483 vars->link_status |= LINK_STATUS_AUTO_NEGOTIATE_ENABLED;
@@ -2637,9 +2614,9 @@ static void bnx2x_set_gmii_tx_driver(struct link_params *params)
2637 u16 bank; 2614 u16 bank;
2638 2615
2639 /* read precomp */ 2616 /* read precomp */
2640 CL45_RD_OVER_CL22(bp, phy, 2617 CL22_RD_OVER_CL45(bp, phy,
2641 MDIO_REG_BANK_OVER_1G, 2618 MDIO_REG_BANK_OVER_1G,
2642 MDIO_OVER_1G_LP_UP2, &lp_up2); 2619 MDIO_OVER_1G_LP_UP2, &lp_up2);
2643 2620
2644 /* bits [10:7] at lp_up2, positioned at [15:12] */ 2621 /* bits [10:7] at lp_up2, positioned at [15:12] */
2645 lp_up2 = (((lp_up2 & MDIO_OVER_1G_LP_UP2_PREEMPHASIS_MASK) >> 2622 lp_up2 = (((lp_up2 & MDIO_OVER_1G_LP_UP2_PREEMPHASIS_MASK) >>
@@ -2651,18 +2628,18 @@ static void bnx2x_set_gmii_tx_driver(struct link_params *params)
2651 2628
2652 for (bank = MDIO_REG_BANK_TX0; bank <= MDIO_REG_BANK_TX3; 2629 for (bank = MDIO_REG_BANK_TX0; bank <= MDIO_REG_BANK_TX3;
2653 bank += (MDIO_REG_BANK_TX1 - MDIO_REG_BANK_TX0)) { 2630 bank += (MDIO_REG_BANK_TX1 - MDIO_REG_BANK_TX0)) {
2654 CL45_RD_OVER_CL22(bp, phy, 2631 CL22_RD_OVER_CL45(bp, phy,
2655 bank, 2632 bank,
2656 MDIO_TX0_TX_DRIVER, &tx_driver); 2633 MDIO_TX0_TX_DRIVER, &tx_driver);
2657 2634
2658 /* replace tx_driver bits [15:12] */ 2635 /* replace tx_driver bits [15:12] */
2659 if (lp_up2 != 2636 if (lp_up2 !=
2660 (tx_driver & MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK)) { 2637 (tx_driver & MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK)) {
2661 tx_driver &= ~MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK; 2638 tx_driver &= ~MDIO_TX0_TX_DRIVER_PREEMPHASIS_MASK;
2662 tx_driver |= lp_up2; 2639 tx_driver |= lp_up2;
2663 CL45_WR_OVER_CL22(bp, phy, 2640 CL22_WR_OVER_CL45(bp, phy,
2664 bank, 2641 bank,
2665 MDIO_TX0_TX_DRIVER, tx_driver); 2642 MDIO_TX0_TX_DRIVER, tx_driver);
2666 } 2643 }
2667 } 2644 }
2668} 2645}
@@ -2676,10 +2653,10 @@ static u8 bnx2x_emac_program(struct link_params *params,
2676 2653
2677 DP(NETIF_MSG_LINK, "setting link speed & duplex\n"); 2654 DP(NETIF_MSG_LINK, "setting link speed & duplex\n");
2678 bnx2x_bits_dis(bp, GRCBASE_EMAC0 + port*0x400 + 2655 bnx2x_bits_dis(bp, GRCBASE_EMAC0 + port*0x400 +
2679 EMAC_REG_EMAC_MODE, 2656 EMAC_REG_EMAC_MODE,
2680 (EMAC_MODE_25G_MODE | 2657 (EMAC_MODE_25G_MODE |
2681 EMAC_MODE_PORT_MII_10M | 2658 EMAC_MODE_PORT_MII_10M |
2682 EMAC_MODE_HALF_DUPLEX)); 2659 EMAC_MODE_HALF_DUPLEX));
2683 switch (vars->line_speed) { 2660 switch (vars->line_speed) {
2684 case SPEED_10: 2661 case SPEED_10:
2685 mode |= EMAC_MODE_PORT_MII_10M; 2662 mode |= EMAC_MODE_PORT_MII_10M;
@@ -2707,8 +2684,8 @@ static u8 bnx2x_emac_program(struct link_params *params,
2707 if (vars->duplex == DUPLEX_HALF) 2684 if (vars->duplex == DUPLEX_HALF)
2708 mode |= EMAC_MODE_HALF_DUPLEX; 2685 mode |= EMAC_MODE_HALF_DUPLEX;
2709 bnx2x_bits_en(bp, 2686 bnx2x_bits_en(bp,
2710 GRCBASE_EMAC0 + port*0x400 + EMAC_REG_EMAC_MODE, 2687 GRCBASE_EMAC0 + port*0x400 + EMAC_REG_EMAC_MODE,
2711 mode); 2688 mode);
2712 2689
2713 bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed); 2690 bnx2x_set_led(params, vars, LED_MODE_OPER, vars->line_speed);
2714 return 0; 2691 return 0;
@@ -2723,7 +2700,7 @@ static void bnx2x_set_preemphasis(struct bnx2x_phy *phy,
2723 2700
2724 for (bank = MDIO_REG_BANK_RX0, i = 0; bank <= MDIO_REG_BANK_RX3; 2701 for (bank = MDIO_REG_BANK_RX0, i = 0; bank <= MDIO_REG_BANK_RX3;
2725 bank += (MDIO_REG_BANK_RX1-MDIO_REG_BANK_RX0), i++) { 2702 bank += (MDIO_REG_BANK_RX1-MDIO_REG_BANK_RX0), i++) {
2726 CL45_WR_OVER_CL22(bp, phy, 2703 CL22_WR_OVER_CL45(bp, phy,
2727 bank, 2704 bank,
2728 MDIO_RX0_RX_EQ_BOOST, 2705 MDIO_RX0_RX_EQ_BOOST,
2729 phy->rx_preemphasis[i]); 2706 phy->rx_preemphasis[i]);
@@ -2731,7 +2708,7 @@ static void bnx2x_set_preemphasis(struct bnx2x_phy *phy,
2731 2708
2732 for (bank = MDIO_REG_BANK_TX0, i = 0; bank <= MDIO_REG_BANK_TX3; 2709 for (bank = MDIO_REG_BANK_TX0, i = 0; bank <= MDIO_REG_BANK_TX3;
2733 bank += (MDIO_REG_BANK_TX1 - MDIO_REG_BANK_TX0), i++) { 2710 bank += (MDIO_REG_BANK_TX1 - MDIO_REG_BANK_TX0), i++) {
2734 CL45_WR_OVER_CL22(bp, phy, 2711 CL22_WR_OVER_CL45(bp, phy,
2735 bank, 2712 bank,
2736 MDIO_TX0_TX_DRIVER, 2713 MDIO_TX0_TX_DRIVER,
2737 phy->tx_preemphasis[i]); 2714 phy->tx_preemphasis[i]);
@@ -2754,7 +2731,7 @@ static void bnx2x_init_internal_phy(struct bnx2x_phy *phy,
2754 /* forced speed requested? */ 2731 /* forced speed requested? */
2755 if (vars->line_speed != SPEED_AUTO_NEG || 2732 if (vars->line_speed != SPEED_AUTO_NEG ||
2756 (SINGLE_MEDIA_DIRECT(params) && 2733 (SINGLE_MEDIA_DIRECT(params) &&
2757 params->loopback_mode == LOOPBACK_EXT)) { 2734 params->loopback_mode == LOOPBACK_EXT)) {
2758 DP(NETIF_MSG_LINK, "not SGMII, no AN\n"); 2735 DP(NETIF_MSG_LINK, "not SGMII, no AN\n");
2759 2736
2760 /* disable autoneg */ 2737 /* disable autoneg */
@@ -2771,7 +2748,7 @@ static void bnx2x_init_internal_phy(struct bnx2x_phy *phy,
2771 2748
2772 /* program duplex & pause advertisement (for aneg) */ 2749 /* program duplex & pause advertisement (for aneg) */
2773 bnx2x_set_ieee_aneg_advertisment(phy, params, 2750 bnx2x_set_ieee_aneg_advertisment(phy, params,
2774 vars->ieee_fc); 2751 vars->ieee_fc);
2775 2752
2776 /* enable autoneg */ 2753 /* enable autoneg */
2777 bnx2x_set_autoneg(phy, params, vars, enable_cl73); 2754 bnx2x_set_autoneg(phy, params, vars, enable_cl73);
@@ -2842,7 +2819,8 @@ static u8 bnx2x_init_xgxs(struct bnx2x_phy *phy,
2842} 2819}
2843 2820
2844static u16 bnx2x_wait_reset_complete(struct bnx2x *bp, 2821static u16 bnx2x_wait_reset_complete(struct bnx2x *bp,
2845 struct bnx2x_phy *phy) 2822 struct bnx2x_phy *phy,
2823 struct link_params *params)
2846{ 2824{
2847 u16 cnt, ctrl; 2825 u16 cnt, ctrl;
2848 /* Wait for soft reset to get cleared upto 1 sec */ 2826 /* Wait for soft reset to get cleared upto 1 sec */
@@ -2853,6 +2831,11 @@ static u16 bnx2x_wait_reset_complete(struct bnx2x *bp,
2853 break; 2831 break;
2854 msleep(1); 2832 msleep(1);
2855 } 2833 }
2834
2835 if (cnt == 1000)
2836 netdev_err(bp->dev, "Warning: PHY was not initialized,"
2837 " Port %d\n",
2838 params->port);
2856 DP(NETIF_MSG_LINK, "control reg 0x%x (after %d ms)\n", ctrl, cnt); 2839 DP(NETIF_MSG_LINK, "control reg 0x%x (after %d ms)\n", ctrl, cnt);
2857 return cnt; 2840 return cnt;
2858} 2841}
@@ -2863,9 +2846,7 @@ static void bnx2x_link_int_enable(struct link_params *params)
2863 u32 mask; 2846 u32 mask;
2864 struct bnx2x *bp = params->bp; 2847 struct bnx2x *bp = params->bp;
2865 2848
2866 /* setting the status to report on link up 2849 /* Setting the status to report on link up for either XGXS or SerDes */
2867 for either XGXS or SerDes */
2868
2869 if (params->switch_cfg == SWITCH_CFG_10G) { 2850 if (params->switch_cfg == SWITCH_CFG_10G) {
2870 mask = (NIG_MASK_XGXS0_LINK10G | 2851 mask = (NIG_MASK_XGXS0_LINK10G |
2871 NIG_MASK_XGXS0_LINK_STATUS); 2852 NIG_MASK_XGXS0_LINK_STATUS);
@@ -2908,7 +2889,7 @@ static void bnx2x_rearm_latch_signal(struct bnx2x *bp, u8 port,
2908{ 2889{
2909 u32 latch_status = 0; 2890 u32 latch_status = 0;
2910 2891
2911 /** 2892 /*
2912 * Disable the MI INT ( external phy int ) by writing 1 to the 2893 * Disable the MI INT ( external phy int ) by writing 1 to the
2913 * status register. Link down indication is high-active-signal, 2894 * status register. Link down indication is high-active-signal,
2914 * so in this case we need to write the status to clear the XOR 2895 * so in this case we need to write the status to clear the XOR
@@ -2933,27 +2914,30 @@ static void bnx2x_rearm_latch_signal(struct bnx2x *bp, u8 port,
2933 2914
2934 /* For all latched-signal=up : Re-Arm Latch signals */ 2915 /* For all latched-signal=up : Re-Arm Latch signals */
2935 REG_WR(bp, NIG_REG_LATCH_STATUS_0 + port*8, 2916 REG_WR(bp, NIG_REG_LATCH_STATUS_0 + port*8,
2936 (latch_status & 0xfffe) | (latch_status & 1)); 2917 (latch_status & 0xfffe) | (latch_status & 1));
2937 } 2918 }
2938 /* For all latched-signal=up,Write original_signal to status */ 2919 /* For all latched-signal=up,Write original_signal to status */
2939} 2920}
2940 2921
2941static void bnx2x_link_int_ack(struct link_params *params, 2922static void bnx2x_link_int_ack(struct link_params *params,
2942 struct link_vars *vars, u8 is_10g) 2923 struct link_vars *vars, u8 is_10g)
2943{ 2924{
2944 struct bnx2x *bp = params->bp; 2925 struct bnx2x *bp = params->bp;
2945 u8 port = params->port; 2926 u8 port = params->port;
2946 2927
2947 /* first reset all status 2928 /*
2948 * we assume only one line will be change at a time */ 2929 * First reset all status we assume only one line will be
2930 * change at a time
2931 */
2949 bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4, 2932 bnx2x_bits_dis(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4,
2950 (NIG_STATUS_XGXS0_LINK10G | 2933 (NIG_STATUS_XGXS0_LINK10G |
2951 NIG_STATUS_XGXS0_LINK_STATUS | 2934 NIG_STATUS_XGXS0_LINK_STATUS |
2952 NIG_STATUS_SERDES0_LINK_STATUS)); 2935 NIG_STATUS_SERDES0_LINK_STATUS));
2953 if (vars->phy_link_up) { 2936 if (vars->phy_link_up) {
2954 if (is_10g) { 2937 if (is_10g) {
2955 /* Disable the 10G link interrupt 2938 /*
2956 * by writing 1 to the status register 2939 * Disable the 10G link interrupt by writing 1 to the
2940 * status register
2957 */ 2941 */
2958 DP(NETIF_MSG_LINK, "10G XGXS phy link up\n"); 2942 DP(NETIF_MSG_LINK, "10G XGXS phy link up\n");
2959 bnx2x_bits_en(bp, 2943 bnx2x_bits_en(bp,
@@ -2961,9 +2945,9 @@ static void bnx2x_link_int_ack(struct link_params *params,
2961 NIG_STATUS_XGXS0_LINK10G); 2945 NIG_STATUS_XGXS0_LINK10G);
2962 2946
2963 } else if (params->switch_cfg == SWITCH_CFG_10G) { 2947 } else if (params->switch_cfg == SWITCH_CFG_10G) {
2964 /* Disable the link interrupt 2948 /*
2965 * by writing 1 to the relevant lane 2949 * Disable the link interrupt by writing 1 to the
2966 * in the status register 2950 * relevant lane in the status register
2967 */ 2951 */
2968 u32 ser_lane = ((params->lane_config & 2952 u32 ser_lane = ((params->lane_config &
2969 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >> 2953 PORT_HW_CFG_LANE_SWAP_CFG_MASTER_MASK) >>
@@ -2978,8 +2962,9 @@ static void bnx2x_link_int_ack(struct link_params *params,
2978 2962
2979 } else { /* SerDes */ 2963 } else { /* SerDes */
2980 DP(NETIF_MSG_LINK, "SerDes phy link up\n"); 2964 DP(NETIF_MSG_LINK, "SerDes phy link up\n");
2981 /* Disable the link interrupt 2965 /*
2982 * by writing 1 to the status register 2966 * Disable the link interrupt by writing 1 to the status
2967 * register
2983 */ 2968 */
2984 bnx2x_bits_en(bp, 2969 bnx2x_bits_en(bp,
2985 NIG_REG_STATUS_INTERRUPT_PORT0 + port*4, 2970 NIG_REG_STATUS_INTERRUPT_PORT0 + port*4,
@@ -3059,8 +3044,7 @@ u8 bnx2x_get_ext_phy_fw_version(struct link_params *params, u8 driver_loaded,
3059 } 3044 }
3060 if ((params->num_phys == MAX_PHYS) && 3045 if ((params->num_phys == MAX_PHYS) &&
3061 (params->phy[EXT_PHY2].ver_addr != 0)) { 3046 (params->phy[EXT_PHY2].ver_addr != 0)) {
3062 spirom_ver = REG_RD(bp, 3047 spirom_ver = REG_RD(bp, params->phy[EXT_PHY2].ver_addr);
3063 params->phy[EXT_PHY2].ver_addr);
3064 if (params->phy[EXT_PHY2].format_fw_ver) { 3048 if (params->phy[EXT_PHY2].format_fw_ver) {
3065 *ver_p = '/'; 3049 *ver_p = '/';
3066 ver_p++; 3050 ver_p++;
@@ -3089,29 +3073,27 @@ static void bnx2x_set_xgxs_loopback(struct bnx2x_phy *phy,
3089 3073
3090 /* change the uni_phy_addr in the nig */ 3074 /* change the uni_phy_addr in the nig */
3091 md_devad = REG_RD(bp, (NIG_REG_XGXS0_CTRL_MD_DEVAD + 3075 md_devad = REG_RD(bp, (NIG_REG_XGXS0_CTRL_MD_DEVAD +
3092 port*0x18)); 3076 port*0x18));
3093 3077
3094 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, 0x5); 3078 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, 0x5);
3095 3079
3096 bnx2x_cl45_write(bp, phy, 3080 bnx2x_cl45_write(bp, phy,
3097 5, 3081 5,
3098 (MDIO_REG_BANK_AER_BLOCK + 3082 (MDIO_REG_BANK_AER_BLOCK +
3099 (MDIO_AER_BLOCK_AER_REG & 0xf)), 3083 (MDIO_AER_BLOCK_AER_REG & 0xf)),
3100 0x2800); 3084 0x2800);
3101 3085
3102 bnx2x_cl45_write(bp, phy, 3086 bnx2x_cl45_write(bp, phy,
3103 5, 3087 5,
3104 (MDIO_REG_BANK_CL73_IEEEB0 + 3088 (MDIO_REG_BANK_CL73_IEEEB0 +
3105 (MDIO_CL73_IEEEB0_CL73_AN_CONTROL & 0xf)), 3089 (MDIO_CL73_IEEEB0_CL73_AN_CONTROL & 0xf)),
3106 0x6041); 3090 0x6041);
3107 msleep(200); 3091 msleep(200);
3108 /* set aer mmd back */ 3092 /* set aer mmd back */
3109 bnx2x_set_aer_mmd_xgxs(params, phy); 3093 bnx2x_set_aer_mmd_xgxs(params, phy);
3110 3094
3111 /* and md_devad */ 3095 /* and md_devad */
3112 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, 3096 REG_WR(bp, NIG_REG_XGXS0_CTRL_MD_DEVAD + port*0x18, md_devad);
3113 md_devad);
3114
3115 } else { 3097 } else {
3116 u16 mii_ctrl; 3098 u16 mii_ctrl;
3117 DP(NETIF_MSG_LINK, "XGXS 1G loopback enable\n"); 3099 DP(NETIF_MSG_LINK, "XGXS 1G loopback enable\n");
@@ -3152,56 +3134,71 @@ u8 bnx2x_set_led(struct link_params *params,
3152 case LED_MODE_OFF: 3134 case LED_MODE_OFF:
3153 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 0); 3135 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 0);
3154 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 3136 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4,
3155 SHARED_HW_CFG_LED_MAC1); 3137 SHARED_HW_CFG_LED_MAC1);
3156 3138
3157 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); 3139 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
3158 EMAC_WR(bp, EMAC_REG_EMAC_LED, (tmp | EMAC_LED_OVERRIDE)); 3140 EMAC_WR(bp, EMAC_REG_EMAC_LED, (tmp | EMAC_LED_OVERRIDE));
3159 break; 3141 break;
3160 3142
3161 case LED_MODE_OPER: 3143 case LED_MODE_OPER:
3162 /** 3144 /*
3163 * For all other phys, OPER mode is same as ON, so in case 3145 * For all other phys, OPER mode is same as ON, so in case
3164 * link is down, do nothing 3146 * link is down, do nothing
3165 **/ 3147 */
3166 if (!vars->link_up) 3148 if (!vars->link_up)
3167 break; 3149 break;
3168 case LED_MODE_ON: 3150 case LED_MODE_ON:
3169 if (SINGLE_MEDIA_DIRECT(params)) { 3151 if (params->phy[EXT_PHY1].type ==
3170 /** 3152 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727 &&
3171 * This is a work-around for HW issue found when link 3153 CHIP_IS_E2(bp) && params->num_phys == 2) {
3172 * is up in CL73 3154 /*
3173 */ 3155 * This is a work-around for E2+8727 Configurations
3156 */
3157 if (mode == LED_MODE_ON ||
3158 speed == SPEED_10000){
3159 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0);
3160 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1);
3161
3162 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
3163 EMAC_WR(bp, EMAC_REG_EMAC_LED,
3164 (tmp | EMAC_LED_OVERRIDE));
3165 return rc;
3166 }
3167 } else if (SINGLE_MEDIA_DIRECT(params)) {
3168 /*
3169 * This is a work-around for HW issue found when link
3170 * is up in CL73
3171 */
3174 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0); 3172 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 0);
3175 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1); 3173 REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 1);
3176 } else { 3174 } else {
3177 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, 3175 REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, hw_led_mode);
3178 hw_led_mode);
3179 } 3176 }
3180 3177
3181 REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + 3178 REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 + port*4, 0);
3182 port*4, 0);
3183 /* Set blinking rate to ~15.9Hz */ 3179 /* Set blinking rate to ~15.9Hz */
3184 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4, 3180 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_P0 + port*4,
3185 LED_BLINK_RATE_VAL); 3181 LED_BLINK_RATE_VAL);
3186 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 + 3182 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 +
3187 port*4, 1); 3183 port*4, 1);
3188 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); 3184 tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED);
3189 EMAC_WR(bp, EMAC_REG_EMAC_LED, 3185 EMAC_WR(bp, EMAC_REG_EMAC_LED, (tmp & (~EMAC_LED_OVERRIDE)));
3190 (tmp & (~EMAC_LED_OVERRIDE)));
3191 3186
3192 if (CHIP_IS_E1(bp) && 3187 if (CHIP_IS_E1(bp) &&
3193 ((speed == SPEED_2500) || 3188 ((speed == SPEED_2500) ||
3194 (speed == SPEED_1000) || 3189 (speed == SPEED_1000) ||
3195 (speed == SPEED_100) || 3190 (speed == SPEED_100) ||
3196 (speed == SPEED_10))) { 3191 (speed == SPEED_10))) {
3197 /* On Everest 1 Ax chip versions for speeds less than 3192 /*
3198 10G LED scheme is different */ 3193 * On Everest 1 Ax chip versions for speeds less than
3194 * 10G LED scheme is different
3195 */
3199 REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0 3196 REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0
3200 + port*4, 1); 3197 + port*4, 1);
3201 REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 + 3198 REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 +
3202 port*4, 0); 3199 port*4, 0);
3203 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_TRAFFIC_P0 + 3200 REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_TRAFFIC_P0 +
3204 port*4, 1); 3201 port*4, 1);
3205 } 3202 }
3206 break; 3203 break;
3207 3204
@@ -3215,7 +3212,7 @@ u8 bnx2x_set_led(struct link_params *params,
3215 3212
3216} 3213}
3217 3214
3218/** 3215/*
3219 * This function comes to reflect the actual link state read DIRECTLY from the 3216 * This function comes to reflect the actual link state read DIRECTLY from the
3220 * HW 3217 * HW
3221 */ 3218 */
@@ -3227,10 +3224,10 @@ u8 bnx2x_test_link(struct link_params *params, struct link_vars *vars,
3227 u8 ext_phy_link_up = 0, serdes_phy_type; 3224 u8 ext_phy_link_up = 0, serdes_phy_type;
3228 struct link_vars temp_vars; 3225 struct link_vars temp_vars;
3229 3226
3230 CL45_RD_OVER_CL22(bp, &params->phy[INT_PHY], 3227 CL22_RD_OVER_CL45(bp, &params->phy[INT_PHY],
3231 MDIO_REG_BANK_GP_STATUS, 3228 MDIO_REG_BANK_GP_STATUS,
3232 MDIO_GP_STATUS_TOP_AN_STATUS1, 3229 MDIO_GP_STATUS_TOP_AN_STATUS1,
3233 &gp_status); 3230 &gp_status);
3234 /* link is up only if both local phy and external phy are up */ 3231 /* link is up only if both local phy and external phy are up */
3235 if (!(gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS)) 3232 if (!(gp_status & MDIO_GP_STATUS_TOP_AN_STATUS1_LINK_STATUS))
3236 return -ESRCH; 3233 return -ESRCH;
@@ -3274,15 +3271,15 @@ static u8 bnx2x_link_initialize(struct link_params *params,
3274 u8 rc = 0; 3271 u8 rc = 0;
3275 u8 phy_index, non_ext_phy; 3272 u8 phy_index, non_ext_phy;
3276 struct bnx2x *bp = params->bp; 3273 struct bnx2x *bp = params->bp;
3277 /** 3274 /*
3278 * In case of external phy existence, the line speed would be the 3275 * In case of external phy existence, the line speed would be the
3279 * line speed linked up by the external phy. In case it is direct 3276 * line speed linked up by the external phy. In case it is direct
3280 * only, then the line_speed during initialization will be 3277 * only, then the line_speed during initialization will be
3281 * equal to the req_line_speed 3278 * equal to the req_line_speed
3282 */ 3279 */
3283 vars->line_speed = params->phy[INT_PHY].req_line_speed; 3280 vars->line_speed = params->phy[INT_PHY].req_line_speed;
3284 3281
3285 /** 3282 /*
3286 * Initialize the internal phy in case this is a direct board 3283 * Initialize the internal phy in case this is a direct board
3287 * (no external phys), or this board has external phy which requires 3284 * (no external phys), or this board has external phy which requires
3288 * to first. 3285 * to first.
@@ -3310,17 +3307,16 @@ static u8 bnx2x_link_initialize(struct link_params *params,
3310 if (!non_ext_phy) 3307 if (!non_ext_phy)
3311 for (phy_index = EXT_PHY1; phy_index < params->num_phys; 3308 for (phy_index = EXT_PHY1; phy_index < params->num_phys;
3312 phy_index++) { 3309 phy_index++) {
3313 /** 3310 /*
3314 * No need to initialize second phy in case of first 3311 * No need to initialize second phy in case of first
3315 * phy only selection. In case of second phy, we do 3312 * phy only selection. In case of second phy, we do
3316 * need to initialize the first phy, since they are 3313 * need to initialize the first phy, since they are
3317 * connected. 3314 * connected.
3318 **/ 3315 */
3319 if (phy_index == EXT_PHY2 && 3316 if (phy_index == EXT_PHY2 &&
3320 (bnx2x_phy_selection(params) == 3317 (bnx2x_phy_selection(params) ==
3321 PORT_HW_CFG_PHY_SELECTION_FIRST_PHY)) { 3318 PORT_HW_CFG_PHY_SELECTION_FIRST_PHY)) {
3322 DP(NETIF_MSG_LINK, "Not initializing" 3319 DP(NETIF_MSG_LINK, "Ignoring second phy\n");
3323 "second phy\n");
3324 continue; 3320 continue;
3325 } 3321 }
3326 params->phy[phy_index].config_init( 3322 params->phy[phy_index].config_init(
@@ -3342,9 +3338,8 @@ static void bnx2x_int_link_reset(struct bnx2x_phy *phy,
3342 struct link_params *params) 3338 struct link_params *params)
3343{ 3339{
3344 /* reset the SerDes/XGXS */ 3340 /* reset the SerDes/XGXS */
3345 REG_WR(params->bp, GRCBASE_MISC + 3341 REG_WR(params->bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_3_CLEAR,
3346 MISC_REGISTERS_RESET_REG_3_CLEAR, 3342 (0x1ff << (params->port*16)));
3347 (0x1ff << (params->port*16)));
3348} 3343}
3349 3344
3350static void bnx2x_common_ext_link_reset(struct bnx2x_phy *phy, 3345static void bnx2x_common_ext_link_reset(struct bnx2x_phy *phy,
@@ -3358,11 +3353,11 @@ static void bnx2x_common_ext_link_reset(struct bnx2x_phy *phy,
3358 else 3353 else
3359 gpio_port = params->port; 3354 gpio_port = params->port;
3360 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, 3355 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
3361 MISC_REGISTERS_GPIO_OUTPUT_LOW, 3356 MISC_REGISTERS_GPIO_OUTPUT_LOW,
3362 gpio_port); 3357 gpio_port);
3363 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 3358 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
3364 MISC_REGISTERS_GPIO_OUTPUT_LOW, 3359 MISC_REGISTERS_GPIO_OUTPUT_LOW,
3365 gpio_port); 3360 gpio_port);
3366 DP(NETIF_MSG_LINK, "reset external PHY\n"); 3361 DP(NETIF_MSG_LINK, "reset external PHY\n");
3367} 3362}
3368 3363
@@ -3393,9 +3388,8 @@ static u8 bnx2x_update_link_down(struct link_params *params,
3393 3388
3394 /* reset BigMac */ 3389 /* reset BigMac */
3395 bnx2x_bmac_rx_disable(bp, params->port); 3390 bnx2x_bmac_rx_disable(bp, params->port);
3396 REG_WR(bp, GRCBASE_MISC + 3391 REG_WR(bp, GRCBASE_MISC + MISC_REGISTERS_RESET_REG_2_CLEAR,
3397 MISC_REGISTERS_RESET_REG_2_CLEAR, 3392 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port));
3398 (MISC_REGISTERS_RESET_REG_2_RST_BMAC0 << port));
3399 return 0; 3393 return 0;
3400} 3394}
3401 3395
@@ -3446,7 +3440,7 @@ static u8 bnx2x_update_link_up(struct link_params *params,
3446 msleep(20); 3440 msleep(20);
3447 return rc; 3441 return rc;
3448} 3442}
3449/** 3443/*
3450 * The bnx2x_link_update function should be called upon link 3444 * The bnx2x_link_update function should be called upon link
3451 * interrupt. 3445 * interrupt.
3452 * Link is considered up as follows: 3446 * Link is considered up as follows:
@@ -3485,12 +3479,11 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3485 REG_RD(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4)); 3479 REG_RD(bp, NIG_REG_STATUS_INTERRUPT_PORT0 + port*4));
3486 3480
3487 is_mi_int = (u8)(REG_RD(bp, NIG_REG_EMAC0_STATUS_MISC_MI_INT + 3481 is_mi_int = (u8)(REG_RD(bp, NIG_REG_EMAC0_STATUS_MISC_MI_INT +
3488 port*0x18) > 0); 3482 port*0x18) > 0);
3489 DP(NETIF_MSG_LINK, "int_mask 0x%x MI_INT %x, SERDES_LINK %x\n", 3483 DP(NETIF_MSG_LINK, "int_mask 0x%x MI_INT %x, SERDES_LINK %x\n",
3490 REG_RD(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4), 3484 REG_RD(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4),
3491 is_mi_int, 3485 is_mi_int,
3492 REG_RD(bp, 3486 REG_RD(bp, NIG_REG_SERDES0_STATUS_LINK_STATUS + port*0x3c));
3493 NIG_REG_SERDES0_STATUS_LINK_STATUS + port*0x3c));
3494 3487
3495 DP(NETIF_MSG_LINK, " 10G %x, XGXS_LINK %x\n", 3488 DP(NETIF_MSG_LINK, " 10G %x, XGXS_LINK %x\n",
3496 REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68), 3489 REG_RD(bp, NIG_REG_XGXS0_STATUS_LINK10G + port*0x68),
@@ -3499,14 +3492,14 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3499 /* disable emac */ 3492 /* disable emac */
3500 REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0); 3493 REG_WR(bp, NIG_REG_NIG_EMAC0_EN + port*4, 0);
3501 3494
3502 /** 3495 /*
3503 * Step 1: 3496 * Step 1:
3504 * Check external link change only for external phys, and apply 3497 * Check external link change only for external phys, and apply
3505 * priority selection between them in case the link on both phys 3498 * priority selection between them in case the link on both phys
3506 * is up. Note that the instead of the common vars, a temporary 3499 * is up. Note that the instead of the common vars, a temporary
3507 * vars argument is used since each phy may have different link/ 3500 * vars argument is used since each phy may have different link/
3508 * speed/duplex result 3501 * speed/duplex result
3509 */ 3502 */
3510 for (phy_index = EXT_PHY1; phy_index < params->num_phys; 3503 for (phy_index = EXT_PHY1; phy_index < params->num_phys;
3511 phy_index++) { 3504 phy_index++) {
3512 struct bnx2x_phy *phy = &params->phy[phy_index]; 3505 struct bnx2x_phy *phy = &params->phy[phy_index];
@@ -3531,22 +3524,22 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3531 switch (bnx2x_phy_selection(params)) { 3524 switch (bnx2x_phy_selection(params)) {
3532 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT: 3525 case PORT_HW_CFG_PHY_SELECTION_HARDWARE_DEFAULT:
3533 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY: 3526 case PORT_HW_CFG_PHY_SELECTION_FIRST_PHY_PRIORITY:
3534 /** 3527 /*
3535 * In this option, the first PHY makes sure to pass the 3528 * In this option, the first PHY makes sure to pass the
3536 * traffic through itself only. 3529 * traffic through itself only.
3537 * Its not clear how to reset the link on the second phy 3530 * Its not clear how to reset the link on the second phy
3538 **/ 3531 */
3539 active_external_phy = EXT_PHY1; 3532 active_external_phy = EXT_PHY1;
3540 break; 3533 break;
3541 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY: 3534 case PORT_HW_CFG_PHY_SELECTION_SECOND_PHY_PRIORITY:
3542 /** 3535 /*
3543 * In this option, the first PHY makes sure to pass the 3536 * In this option, the first PHY makes sure to pass the
3544 * traffic through the second PHY. 3537 * traffic through the second PHY.
3545 **/ 3538 */
3546 active_external_phy = EXT_PHY2; 3539 active_external_phy = EXT_PHY2;
3547 break; 3540 break;
3548 default: 3541 default:
3549 /** 3542 /*
3550 * Link indication on both PHYs with the following cases 3543 * Link indication on both PHYs with the following cases
3551 * is invalid: 3544 * is invalid:
3552 * - FIRST_PHY means that second phy wasn't initialized, 3545 * - FIRST_PHY means that second phy wasn't initialized,
@@ -3554,7 +3547,7 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3554 * - SECOND_PHY means that first phy should not be able 3547 * - SECOND_PHY means that first phy should not be able
3555 * to link up by itself (using configuration) 3548 * to link up by itself (using configuration)
3556 * - DEFAULT should be overriden during initialiazation 3549 * - DEFAULT should be overriden during initialiazation
3557 **/ 3550 */
3558 DP(NETIF_MSG_LINK, "Invalid link indication" 3551 DP(NETIF_MSG_LINK, "Invalid link indication"
3559 "mpc=0x%x. DISABLING LINK !!!\n", 3552 "mpc=0x%x. DISABLING LINK !!!\n",
3560 params->multi_phy_config); 3553 params->multi_phy_config);
@@ -3564,18 +3557,18 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3564 } 3557 }
3565 } 3558 }
3566 prev_line_speed = vars->line_speed; 3559 prev_line_speed = vars->line_speed;
3567 /** 3560 /*
3568 * Step 2: 3561 * Step 2:
3569 * Read the status of the internal phy. In case of 3562 * Read the status of the internal phy. In case of
3570 * DIRECT_SINGLE_MEDIA board, this link is the external link, 3563 * DIRECT_SINGLE_MEDIA board, this link is the external link,
3571 * otherwise this is the link between the 577xx and the first 3564 * otherwise this is the link between the 577xx and the first
3572 * external phy 3565 * external phy
3573 */ 3566 */
3574 if (params->phy[INT_PHY].read_status) 3567 if (params->phy[INT_PHY].read_status)
3575 params->phy[INT_PHY].read_status( 3568 params->phy[INT_PHY].read_status(
3576 &params->phy[INT_PHY], 3569 &params->phy[INT_PHY],
3577 params, vars); 3570 params, vars);
3578 /** 3571 /*
3579 * The INT_PHY flow control reside in the vars. This include the 3572 * The INT_PHY flow control reside in the vars. This include the
3580 * case where the speed or flow control are not set to AUTO. 3573 * case where the speed or flow control are not set to AUTO.
3581 * Otherwise, the active external phy flow control result is set 3574 * Otherwise, the active external phy flow control result is set
@@ -3585,13 +3578,13 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3585 */ 3578 */
3586 if (active_external_phy > INT_PHY) { 3579 if (active_external_phy > INT_PHY) {
3587 vars->flow_ctrl = phy_vars[active_external_phy].flow_ctrl; 3580 vars->flow_ctrl = phy_vars[active_external_phy].flow_ctrl;
3588 /** 3581 /*
3589 * Link speed is taken from the XGXS. AN and FC result from 3582 * Link speed is taken from the XGXS. AN and FC result from
3590 * the external phy. 3583 * the external phy.
3591 */ 3584 */
3592 vars->link_status |= phy_vars[active_external_phy].link_status; 3585 vars->link_status |= phy_vars[active_external_phy].link_status;
3593 3586
3594 /** 3587 /*
3595 * if active_external_phy is first PHY and link is up - disable 3588 * if active_external_phy is first PHY and link is up - disable
3596 * disable TX on second external PHY 3589 * disable TX on second external PHY
3597 */ 3590 */
@@ -3627,7 +3620,7 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3627 DP(NETIF_MSG_LINK, "vars->flow_ctrl = 0x%x, vars->link_status = 0x%x," 3620 DP(NETIF_MSG_LINK, "vars->flow_ctrl = 0x%x, vars->link_status = 0x%x,"
3628 " ext_phy_line_speed = %d\n", vars->flow_ctrl, 3621 " ext_phy_line_speed = %d\n", vars->flow_ctrl,
3629 vars->link_status, ext_phy_line_speed); 3622 vars->link_status, ext_phy_line_speed);
3630 /** 3623 /*
3631 * Upon link speed change set the NIG into drain mode. Comes to 3624 * Upon link speed change set the NIG into drain mode. Comes to
3632 * deals with possible FIFO glitch due to clk change when speed 3625 * deals with possible FIFO glitch due to clk change when speed
3633 * is decreased without link down indicator 3626 * is decreased without link down indicator
@@ -3642,8 +3635,8 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3642 ext_phy_line_speed); 3635 ext_phy_line_speed);
3643 vars->phy_link_up = 0; 3636 vars->phy_link_up = 0;
3644 } else if (prev_line_speed != vars->line_speed) { 3637 } else if (prev_line_speed != vars->line_speed) {
3645 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE 3638 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4,
3646 + params->port*4, 0); 3639 0);
3647 msleep(1); 3640 msleep(1);
3648 } 3641 }
3649 } 3642 }
@@ -3658,14 +3651,14 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3658 3651
3659 bnx2x_link_int_ack(params, vars, link_10g); 3652 bnx2x_link_int_ack(params, vars, link_10g);
3660 3653
3661 /** 3654 /*
3662 * In case external phy link is up, and internal link is down 3655 * In case external phy link is up, and internal link is down
3663 * (not initialized yet probably after link initialization, it 3656 * (not initialized yet probably after link initialization, it
3664 * needs to be initialized. 3657 * needs to be initialized.
3665 * Note that after link down-up as result of cable plug, the xgxs 3658 * Note that after link down-up as result of cable plug, the xgxs
3666 * link would probably become up again without the need 3659 * link would probably become up again without the need
3667 * initialize it 3660 * initialize it
3668 */ 3661 */
3669 if (!(SINGLE_MEDIA_DIRECT(params))) { 3662 if (!(SINGLE_MEDIA_DIRECT(params))) {
3670 DP(NETIF_MSG_LINK, "ext_phy_link_up = %d, int_link_up = %d," 3663 DP(NETIF_MSG_LINK, "ext_phy_link_up = %d, int_link_up = %d,"
3671 " init_preceding = %d\n", ext_phy_link_up, 3664 " init_preceding = %d\n", ext_phy_link_up,
@@ -3685,9 +3678,9 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3685 vars); 3678 vars);
3686 } 3679 }
3687 } 3680 }
3688 /** 3681 /*
3689 * Link is up only if both local phy and external phy (in case of 3682 * Link is up only if both local phy and external phy (in case of
3690 * non-direct board) are up 3683 * non-direct board) are up
3691 */ 3684 */
3692 vars->link_up = (vars->phy_link_up && 3685 vars->link_up = (vars->phy_link_up &&
3693 (ext_phy_link_up || 3686 (ext_phy_link_up ||
@@ -3708,10 +3701,10 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
3708void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port) 3701void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port)
3709{ 3702{
3710 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, 3703 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
3711 MISC_REGISTERS_GPIO_OUTPUT_LOW, port); 3704 MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
3712 msleep(1); 3705 msleep(1);
3713 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, 3706 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
3714 MISC_REGISTERS_GPIO_OUTPUT_HIGH, port); 3707 MISC_REGISTERS_GPIO_OUTPUT_HIGH, port);
3715} 3708}
3716 3709
3717static void bnx2x_save_spirom_version(struct bnx2x *bp, u8 port, 3710static void bnx2x_save_spirom_version(struct bnx2x *bp, u8 port,
@@ -3731,9 +3724,9 @@ static void bnx2x_save_bcm_spirom_ver(struct bnx2x *bp,
3731 u16 fw_ver1, fw_ver2; 3724 u16 fw_ver1, fw_ver2;
3732 3725
3733 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 3726 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD,
3734 MDIO_PMA_REG_ROM_VER1, &fw_ver1); 3727 MDIO_PMA_REG_ROM_VER1, &fw_ver1);
3735 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 3728 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD,
3736 MDIO_PMA_REG_ROM_VER2, &fw_ver2); 3729 MDIO_PMA_REG_ROM_VER2, &fw_ver2);
3737 bnx2x_save_spirom_version(bp, port, (u32)(fw_ver1<<16 | fw_ver2), 3730 bnx2x_save_spirom_version(bp, port, (u32)(fw_ver1<<16 | fw_ver2),
3738 phy->ver_addr); 3731 phy->ver_addr);
3739} 3732}
@@ -3754,7 +3747,7 @@ static void bnx2x_ext_phy_set_pause(struct link_params *params,
3754 if ((vars->ieee_fc & 3747 if ((vars->ieee_fc &
3755 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) == 3748 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) ==
3756 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) { 3749 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_ASYMMETRIC) {
3757 val |= MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC; 3750 val |= MDIO_AN_REG_ADV_PAUSE_ASYMMETRIC;
3758 } 3751 }
3759 if ((vars->ieee_fc & 3752 if ((vars->ieee_fc &
3760 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) == 3753 MDIO_COMBO_IEEE0_AUTO_NEG_ADV_PAUSE_BOTH) ==
@@ -3785,11 +3778,11 @@ static u8 bnx2x_ext_phy_resolve_fc(struct bnx2x_phy *phy,
3785 else if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) { 3778 else if (vars->link_status & LINK_STATUS_AUTO_NEGOTIATE_COMPLETE) {
3786 ret = 1; 3779 ret = 1;
3787 bnx2x_cl45_read(bp, phy, 3780 bnx2x_cl45_read(bp, phy,
3788 MDIO_AN_DEVAD, 3781 MDIO_AN_DEVAD,
3789 MDIO_AN_REG_ADV_PAUSE, &ld_pause); 3782 MDIO_AN_REG_ADV_PAUSE, &ld_pause);
3790 bnx2x_cl45_read(bp, phy, 3783 bnx2x_cl45_read(bp, phy,
3791 MDIO_AN_DEVAD, 3784 MDIO_AN_DEVAD,
3792 MDIO_AN_REG_LP_AUTO_NEG, &lp_pause); 3785 MDIO_AN_REG_LP_AUTO_NEG, &lp_pause);
3793 pause_result = (ld_pause & 3786 pause_result = (ld_pause &
3794 MDIO_AN_REG_ADV_PAUSE_MASK) >> 8; 3787 MDIO_AN_REG_ADV_PAUSE_MASK) >> 8;
3795 pause_result |= (lp_pause & 3788 pause_result |= (lp_pause &
@@ -3854,90 +3847,82 @@ static void bnx2x_8073_resolve_fc(struct bnx2x_phy *phy,
3854 pause_result); 3847 pause_result);
3855 } 3848 }
3856} 3849}
3857 3850static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,
3858static void bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp,
3859 struct bnx2x_phy *phy, 3851 struct bnx2x_phy *phy,
3860 u8 port) 3852 u8 port)
3861{ 3853{
3854 u32 count = 0;
3855 u16 fw_ver1, fw_msgout;
3856 u8 rc = 0;
3857
3862 /* Boot port from external ROM */ 3858 /* Boot port from external ROM */
3863 /* EDC grst */ 3859 /* EDC grst */
3864 bnx2x_cl45_write(bp, phy, 3860 bnx2x_cl45_write(bp, phy,
3865 MDIO_PMA_DEVAD, 3861 MDIO_PMA_DEVAD,
3866 MDIO_PMA_REG_GEN_CTRL, 3862 MDIO_PMA_REG_GEN_CTRL,
3867 0x0001); 3863 0x0001);
3868 3864
3869 /* ucode reboot and rst */ 3865 /* ucode reboot and rst */
3870 bnx2x_cl45_write(bp, phy, 3866 bnx2x_cl45_write(bp, phy,
3871 MDIO_PMA_DEVAD, 3867 MDIO_PMA_DEVAD,
3872 MDIO_PMA_REG_GEN_CTRL, 3868 MDIO_PMA_REG_GEN_CTRL,
3873 0x008c); 3869 0x008c);
3874 3870
3875 bnx2x_cl45_write(bp, phy, 3871 bnx2x_cl45_write(bp, phy,
3876 MDIO_PMA_DEVAD, 3872 MDIO_PMA_DEVAD,
3877 MDIO_PMA_REG_MISC_CTRL1, 0x0001); 3873 MDIO_PMA_REG_MISC_CTRL1, 0x0001);
3878 3874
3879 /* Reset internal microprocessor */ 3875 /* Reset internal microprocessor */
3880 bnx2x_cl45_write(bp, phy, 3876 bnx2x_cl45_write(bp, phy,
3881 MDIO_PMA_DEVAD, 3877 MDIO_PMA_DEVAD,
3882 MDIO_PMA_REG_GEN_CTRL, 3878 MDIO_PMA_REG_GEN_CTRL,
3883 MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET); 3879 MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET);
3884 3880
3885 /* Release srst bit */ 3881 /* Release srst bit */
3886 bnx2x_cl45_write(bp, phy, 3882 bnx2x_cl45_write(bp, phy,
3887 MDIO_PMA_DEVAD, 3883 MDIO_PMA_DEVAD,
3888 MDIO_PMA_REG_GEN_CTRL, 3884 MDIO_PMA_REG_GEN_CTRL,
3889 MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP); 3885 MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP);
3890 3886
3891 /* wait for 120ms for code download via SPI port */ 3887 /* Delay 100ms per the PHY specifications */
3892 msleep(120); 3888 msleep(100);
3893 3889
3894 /* Clear ser_boot_ctl bit */ 3890 /* 8073 sometimes taking longer to download */
3895 bnx2x_cl45_write(bp, phy, 3891 do {
3896 MDIO_PMA_DEVAD, 3892 count++;
3897 MDIO_PMA_REG_MISC_CTRL1, 0x0000); 3893 if (count > 300) {
3898 bnx2x_save_bcm_spirom_ver(bp, phy, port); 3894 DP(NETIF_MSG_LINK,
3899} 3895 "bnx2x_8073_8727_external_rom_boot port %x:"
3896 "Download failed. fw version = 0x%x\n",
3897 port, fw_ver1);
3898 rc = -EINVAL;
3899 break;
3900 }
3900 3901
3901static void bnx2x_8073_set_xaui_low_power_mode(struct bnx2x *bp, 3902 bnx2x_cl45_read(bp, phy,
3902 struct bnx2x_phy *phy) 3903 MDIO_PMA_DEVAD,
3903{ 3904 MDIO_PMA_REG_ROM_VER1, &fw_ver1);
3904 u16 val; 3905 bnx2x_cl45_read(bp, phy,
3905 bnx2x_cl45_read(bp, phy, 3906 MDIO_PMA_DEVAD,
3906 MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_CHIP_REV, &val); 3907 MDIO_PMA_REG_M8051_MSGOUT_REG, &fw_msgout);
3907 3908
3908 if (val == 0) { 3909 msleep(1);
3909 /* Mustn't set low power mode in 8073 A0 */ 3910 } while (fw_ver1 == 0 || fw_ver1 == 0x4321 ||
3910 return; 3911 ((fw_msgout & 0xff) != 0x03 && (phy->type ==
3911 } 3912 PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073)));
3912 3913
3913 /* Disable PLL sequencer (use read-modify-write to clear bit 13) */ 3914 /* Clear ser_boot_ctl bit */
3914 bnx2x_cl45_read(bp, phy,
3915 MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, &val);
3916 val &= ~(1<<13);
3917 bnx2x_cl45_write(bp, phy, 3915 bnx2x_cl45_write(bp, phy,
3918 MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val); 3916 MDIO_PMA_DEVAD,
3919 3917 MDIO_PMA_REG_MISC_CTRL1, 0x0000);
3920 /* PLL controls */ 3918 bnx2x_save_bcm_spirom_ver(bp, phy, port);
3921 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805E, 0x1077);
3922 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805D, 0x0000);
3923 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805C, 0x030B);
3924 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805B, 0x1240);
3925 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805A, 0x2490);
3926
3927 /* Tx Controls */
3928 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A7, 0x0C74);
3929 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A6, 0x9041);
3930 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A5, 0x4640);
3931 3919
3932 /* Rx Controls */ 3920 DP(NETIF_MSG_LINK,
3933 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FE, 0x01C4); 3921 "bnx2x_8073_8727_external_rom_boot port %x:"
3934 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FD, 0x9249); 3922 "Download complete. fw version = 0x%x\n",
3935 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FC, 0x2015); 3923 port, fw_ver1);
3936 3924
3937 /* Enable PLL sequencer (use read-modify-write to set bit 13) */ 3925 return rc;
3938 bnx2x_cl45_read(bp, phy, MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, &val);
3939 val |= (1<<13);
3940 bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val);
3941} 3926}
3942 3927
3943/******************************************************************/ 3928/******************************************************************/
@@ -3950,8 +3935,8 @@ static u8 bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy)
3950 3935
3951 /* Read 8073 HW revision*/ 3936 /* Read 8073 HW revision*/
3952 bnx2x_cl45_read(bp, phy, 3937 bnx2x_cl45_read(bp, phy,
3953 MDIO_PMA_DEVAD, 3938 MDIO_PMA_DEVAD,
3954 MDIO_PMA_REG_8073_CHIP_REV, &val); 3939 MDIO_PMA_REG_8073_CHIP_REV, &val);
3955 3940
3956 if (val != 1) { 3941 if (val != 1) {
3957 /* No need to workaround in 8073 A1 */ 3942 /* No need to workaround in 8073 A1 */
@@ -3959,8 +3944,8 @@ static u8 bnx2x_8073_is_snr_needed(struct bnx2x *bp, struct bnx2x_phy *phy)
3959 } 3944 }
3960 3945
3961 bnx2x_cl45_read(bp, phy, 3946 bnx2x_cl45_read(bp, phy,
3962 MDIO_PMA_DEVAD, 3947 MDIO_PMA_DEVAD,
3963 MDIO_PMA_REG_ROM_VER2, &val); 3948 MDIO_PMA_REG_ROM_VER2, &val);
3964 3949
3965 /* SNR should be applied only for version 0x102 */ 3950 /* SNR should be applied only for version 0x102 */
3966 if (val != 0x102) 3951 if (val != 0x102)
@@ -3974,8 +3959,8 @@ static u8 bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)
3974 u16 val, cnt, cnt1 ; 3959 u16 val, cnt, cnt1 ;
3975 3960
3976 bnx2x_cl45_read(bp, phy, 3961 bnx2x_cl45_read(bp, phy,
3977 MDIO_PMA_DEVAD, 3962 MDIO_PMA_DEVAD,
3978 MDIO_PMA_REG_8073_CHIP_REV, &val); 3963 MDIO_PMA_REG_8073_CHIP_REV, &val);
3979 3964
3980 if (val > 0) { 3965 if (val > 0) {
3981 /* No need to workaround in 8073 A1 */ 3966 /* No need to workaround in 8073 A1 */
@@ -3983,26 +3968,32 @@ static u8 bnx2x_8073_xaui_wa(struct bnx2x *bp, struct bnx2x_phy *phy)
3983 } 3968 }
3984 /* XAUI workaround in 8073 A0: */ 3969 /* XAUI workaround in 8073 A0: */
3985 3970
3986 /* After loading the boot ROM and restarting Autoneg, 3971 /*
3987 poll Dev1, Reg $C820: */ 3972 * After loading the boot ROM and restarting Autoneg, poll
3973 * Dev1, Reg $C820:
3974 */
3988 3975
3989 for (cnt = 0; cnt < 1000; cnt++) { 3976 for (cnt = 0; cnt < 1000; cnt++) {
3990 bnx2x_cl45_read(bp, phy, 3977 bnx2x_cl45_read(bp, phy,
3991 MDIO_PMA_DEVAD, 3978 MDIO_PMA_DEVAD,
3992 MDIO_PMA_REG_8073_SPEED_LINK_STATUS, 3979 MDIO_PMA_REG_8073_SPEED_LINK_STATUS,
3993 &val); 3980 &val);
3994 /* If bit [14] = 0 or bit [13] = 0, continue on with 3981 /*
3995 system initialization (XAUI work-around not required, 3982 * If bit [14] = 0 or bit [13] = 0, continue on with
3996 as these bits indicate 2.5G or 1G link up). */ 3983 * system initialization (XAUI work-around not required, as
3984 * these bits indicate 2.5G or 1G link up).
3985 */
3997 if (!(val & (1<<14)) || !(val & (1<<13))) { 3986 if (!(val & (1<<14)) || !(val & (1<<13))) {
3998 DP(NETIF_MSG_LINK, "XAUI work-around not required\n"); 3987 DP(NETIF_MSG_LINK, "XAUI work-around not required\n");
3999 return 0; 3988 return 0;
4000 } else if (!(val & (1<<15))) { 3989 } else if (!(val & (1<<15))) {
4001 DP(NETIF_MSG_LINK, "clc bit 15 went off\n"); 3990 DP(NETIF_MSG_LINK, "bit 15 went off\n");
4002 /* If bit 15 is 0, then poll Dev1, Reg $C841 until 3991 /*
4003 it's MSB (bit 15) goes to 1 (indicating that the 3992 * If bit 15 is 0, then poll Dev1, Reg $C841 until it's
4004 XAUI workaround has completed), 3993 * MSB (bit15) goes to 1 (indicating that the XAUI
4005 then continue on with system initialization.*/ 3994 * workaround has completed), then continue on with
3995 * system initialization.
3996 */
4006 for (cnt1 = 0; cnt1 < 1000; cnt1++) { 3997 for (cnt1 = 0; cnt1 < 1000; cnt1++) {
4007 bnx2x_cl45_read(bp, phy, 3998 bnx2x_cl45_read(bp, phy,
4008 MDIO_PMA_DEVAD, 3999 MDIO_PMA_DEVAD,
@@ -4085,10 +4076,10 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,
4085 gpio_port = params->port; 4076 gpio_port = params->port;
4086 /* Restore normal power mode*/ 4077 /* Restore normal power mode*/
4087 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 4078 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
4088 MISC_REGISTERS_GPIO_OUTPUT_HIGH, gpio_port); 4079 MISC_REGISTERS_GPIO_OUTPUT_HIGH, gpio_port);
4089 4080
4090 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, 4081 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
4091 MISC_REGISTERS_GPIO_OUTPUT_HIGH, gpio_port); 4082 MISC_REGISTERS_GPIO_OUTPUT_HIGH, gpio_port);
4092 4083
4093 /* enable LASI */ 4084 /* enable LASI */
4094 bnx2x_cl45_write(bp, phy, 4085 bnx2x_cl45_write(bp, phy,
@@ -4098,8 +4089,6 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,
4098 4089
4099 bnx2x_8073_set_pause_cl37(params, phy, vars); 4090 bnx2x_8073_set_pause_cl37(params, phy, vars);
4100 4091
4101 bnx2x_8073_set_xaui_low_power_mode(bp, phy);
4102
4103 bnx2x_cl45_read(bp, phy, 4092 bnx2x_cl45_read(bp, phy,
4104 MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &tmp1); 4093 MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &tmp1);
4105 4094
@@ -4108,6 +4097,21 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,
4108 4097
4109 DP(NETIF_MSG_LINK, "Before rom RX_ALARM(port1): 0x%x\n", tmp1); 4098 DP(NETIF_MSG_LINK, "Before rom RX_ALARM(port1): 0x%x\n", tmp1);
4110 4099
4100 /* Swap polarity if required - Must be done only in non-1G mode */
4101 if (params->lane_config & PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) {
4102 /* Configure the 8073 to swap _P and _N of the KR lines */
4103 DP(NETIF_MSG_LINK, "Swapping polarity for the 8073\n");
4104 /* 10G Rx/Tx and 1G Tx signal polarity swap */
4105 bnx2x_cl45_read(bp, phy,
4106 MDIO_PMA_DEVAD,
4107 MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL, &val);
4108 bnx2x_cl45_write(bp, phy,
4109 MDIO_PMA_DEVAD,
4110 MDIO_PMA_REG_8073_OPT_DIGITAL_CTRL,
4111 (val | (3<<9)));
4112 }
4113
4114
4111 /* Enable CL37 BAM */ 4115 /* Enable CL37 BAM */
4112 if (REG_RD(bp, params->shmem_base + 4116 if (REG_RD(bp, params->shmem_base +
4113 offsetof(struct shmem_region, dev_info. 4117 offsetof(struct shmem_region, dev_info.
@@ -4135,8 +4139,10 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,
4135 val = (1<<7); 4139 val = (1<<7);
4136 } else if (phy->req_line_speed == SPEED_2500) { 4140 } else if (phy->req_line_speed == SPEED_2500) {
4137 val = (1<<5); 4141 val = (1<<5);
4138 /* Note that 2.5G works only 4142 /*
4139 when used with 1G advertisment */ 4143 * Note that 2.5G works only when used with 1G
4144 * advertisment
4145 */
4140 } else 4146 } else
4141 val = (1<<5); 4147 val = (1<<5);
4142 } else { 4148 } else {
@@ -4145,8 +4151,7 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,
4145 PORT_HW_CFG_SPEED_CAPABILITY_D0_10G) 4151 PORT_HW_CFG_SPEED_CAPABILITY_D0_10G)
4146 val |= (1<<7); 4152 val |= (1<<7);
4147 4153
4148 /* Note that 2.5G works only when 4154 /* Note that 2.5G works only when used with 1G advertisment */
4149 used with 1G advertisment */
4150 if (phy->speed_cap_mask & 4155 if (phy->speed_cap_mask &
4151 (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G | 4156 (PORT_HW_CFG_SPEED_CAPABILITY_D0_1G |
4152 PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G)) 4157 PORT_HW_CFG_SPEED_CAPABILITY_D0_2_5G))
@@ -4186,9 +4191,11 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy,
4186 /* Add support for CL37 (passive mode) III */ 4191 /* Add support for CL37 (passive mode) III */
4187 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); 4192 bnx2x_cl45_write(bp, phy, MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
4188 4193
4189 /* The SNR will improve about 2db by changing 4194 /*
4190 BW and FEE main tap. Rest commands are executed 4195 * The SNR will improve about 2db by changing BW and FEE main
4191 after link is up*/ 4196 * tap. Rest commands are executed after link is up
4197 * Change FFE main cursor to 5 in EDC register
4198 */
4192 if (bnx2x_8073_is_snr_needed(bp, phy)) 4199 if (bnx2x_8073_is_snr_needed(bp, phy))
4193 bnx2x_cl45_write(bp, phy, 4200 bnx2x_cl45_write(bp, phy,
4194 MDIO_PMA_DEVAD, MDIO_PMA_REG_EDC_FFE_MAIN, 4201 MDIO_PMA_DEVAD, MDIO_PMA_REG_EDC_FFE_MAIN,
@@ -4272,12 +4279,11 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,
4272 4279
4273 link_up = (((val1 & 4) == 4) || (an1000_status & (1<<1))); 4280 link_up = (((val1 & 4) == 4) || (an1000_status & (1<<1)));
4274 if (link_up && bnx2x_8073_is_snr_needed(bp, phy)) { 4281 if (link_up && bnx2x_8073_is_snr_needed(bp, phy)) {
4275 /* The SNR will improve about 2dbby 4282 /*
4276 changing the BW and FEE main tap.*/ 4283 * The SNR will improve about 2dbby changing the BW and FEE main
4277 /* The 1st write to change FFE main 4284 * tap. The 1st write to change FFE main tap is set before
4278 tap is set before restart AN */ 4285 * restart AN. Change PLL Bandwidth in EDC register
4279 /* Change PLL Bandwidth in EDC 4286 */
4280 register */
4281 bnx2x_cl45_write(bp, phy, 4287 bnx2x_cl45_write(bp, phy,
4282 MDIO_PMA_DEVAD, MDIO_PMA_REG_PLL_BANDWIDTH, 4288 MDIO_PMA_DEVAD, MDIO_PMA_REG_PLL_BANDWIDTH,
4283 0x26BC); 4289 0x26BC);
@@ -4314,8 +4320,32 @@ static u8 bnx2x_8073_read_status(struct bnx2x_phy *phy,
4314 } 4320 }
4315 4321
4316 if (link_up) { 4322 if (link_up) {
4323 /* Swap polarity if required */
4324 if (params->lane_config &
4325 PORT_HW_CFG_SWAP_PHY_POLARITY_ENABLED) {
4326 /* Configure the 8073 to swap P and N of the KR lines */
4327 bnx2x_cl45_read(bp, phy,
4328 MDIO_XS_DEVAD,
4329 MDIO_XS_REG_8073_RX_CTRL_PCIE, &val1);
4330 /*
4331 * Set bit 3 to invert Rx in 1G mode and clear this bit
4332 * when it`s in 10G mode.
4333 */
4334 if (vars->line_speed == SPEED_1000) {
4335 DP(NETIF_MSG_LINK, "Swapping 1G polarity for"
4336 "the 8073\n");
4337 val1 |= (1<<3);
4338 } else
4339 val1 &= ~(1<<3);
4340
4341 bnx2x_cl45_write(bp, phy,
4342 MDIO_XS_DEVAD,
4343 MDIO_XS_REG_8073_RX_CTRL_PCIE,
4344 val1);
4345 }
4317 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars); 4346 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
4318 bnx2x_8073_resolve_fc(phy, params, vars); 4347 bnx2x_8073_resolve_fc(phy, params, vars);
4348 vars->duplex = DUPLEX_FULL;
4319 } 4349 }
4320 return link_up; 4350 return link_up;
4321} 4351}
@@ -4332,8 +4362,8 @@ static void bnx2x_8073_link_reset(struct bnx2x_phy *phy,
4332 DP(NETIF_MSG_LINK, "Setting 8073 port %d into low power mode\n", 4362 DP(NETIF_MSG_LINK, "Setting 8073 port %d into low power mode\n",
4333 gpio_port); 4363 gpio_port);
4334 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 4364 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
4335 MISC_REGISTERS_GPIO_OUTPUT_LOW, 4365 MISC_REGISTERS_GPIO_OUTPUT_LOW,
4336 gpio_port); 4366 gpio_port);
4337} 4367}
4338 4368
4339/******************************************************************/ 4369/******************************************************************/
@@ -4347,11 +4377,11 @@ static u8 bnx2x_8705_config_init(struct bnx2x_phy *phy,
4347 DP(NETIF_MSG_LINK, "init 8705\n"); 4377 DP(NETIF_MSG_LINK, "init 8705\n");
4348 /* Restore normal power mode*/ 4378 /* Restore normal power mode*/
4349 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 4379 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
4350 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); 4380 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);
4351 /* HW reset */ 4381 /* HW reset */
4352 bnx2x_ext_phy_hw_reset(bp, params->port); 4382 bnx2x_ext_phy_hw_reset(bp, params->port);
4353 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040); 4383 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040);
4354 bnx2x_wait_reset_complete(bp, phy); 4384 bnx2x_wait_reset_complete(bp, phy, params);
4355 4385
4356 bnx2x_cl45_write(bp, phy, 4386 bnx2x_cl45_write(bp, phy,
4357 MDIO_PMA_DEVAD, MDIO_PMA_REG_MISC_CTRL, 0x8288); 4387 MDIO_PMA_DEVAD, MDIO_PMA_REG_MISC_CTRL, 0x8288);
@@ -4402,35 +4432,79 @@ static u8 bnx2x_8705_read_status(struct bnx2x_phy *phy,
4402/******************************************************************/ 4432/******************************************************************/
4403/* SFP+ module Section */ 4433/* SFP+ module Section */
4404/******************************************************************/ 4434/******************************************************************/
4405static void bnx2x_sfp_set_transmitter(struct bnx2x *bp, 4435static u8 bnx2x_get_gpio_port(struct link_params *params)
4436{
4437 u8 gpio_port;
4438 u32 swap_val, swap_override;
4439 struct bnx2x *bp = params->bp;
4440 if (CHIP_IS_E2(bp))
4441 gpio_port = BP_PATH(bp);
4442 else
4443 gpio_port = params->port;
4444 swap_val = REG_RD(bp, NIG_REG_PORT_SWAP);
4445 swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE);
4446 return gpio_port ^ (swap_val && swap_override);
4447}
4448static void bnx2x_sfp_set_transmitter(struct link_params *params,
4406 struct bnx2x_phy *phy, 4449 struct bnx2x_phy *phy,
4407 u8 port,
4408 u8 tx_en) 4450 u8 tx_en)
4409{ 4451{
4410 u16 val; 4452 u16 val;
4453 u8 port = params->port;
4454 struct bnx2x *bp = params->bp;
4455 u32 tx_en_mode;
4411 4456
4412 DP(NETIF_MSG_LINK, "Setting transmitter tx_en=%x for port %x\n",
4413 tx_en, port);
4414 /* Disable/Enable transmitter ( TX laser of the SFP+ module.)*/ 4457 /* Disable/Enable transmitter ( TX laser of the SFP+ module.)*/
4415 bnx2x_cl45_read(bp, phy, 4458 tx_en_mode = REG_RD(bp, params->shmem_base +
4416 MDIO_PMA_DEVAD, 4459 offsetof(struct shmem_region,
4417 MDIO_PMA_REG_PHY_IDENTIFIER, 4460 dev_info.port_hw_config[port].sfp_ctrl)) &
4418 &val); 4461 PORT_HW_CFG_TX_LASER_MASK;
4462 DP(NETIF_MSG_LINK, "Setting transmitter tx_en=%x for port %x "
4463 "mode = %x\n", tx_en, port, tx_en_mode);
4464 switch (tx_en_mode) {
4465 case PORT_HW_CFG_TX_LASER_MDIO:
4419 4466
4420 if (tx_en) 4467 bnx2x_cl45_read(bp, phy,
4421 val &= ~(1<<15); 4468 MDIO_PMA_DEVAD,
4422 else 4469 MDIO_PMA_REG_PHY_IDENTIFIER,
4423 val |= (1<<15); 4470 &val);
4424 4471
4425 bnx2x_cl45_write(bp, phy, 4472 if (tx_en)
4426 MDIO_PMA_DEVAD, 4473 val &= ~(1<<15);
4427 MDIO_PMA_REG_PHY_IDENTIFIER, 4474 else
4428 val); 4475 val |= (1<<15);
4476
4477 bnx2x_cl45_write(bp, phy,
4478 MDIO_PMA_DEVAD,
4479 MDIO_PMA_REG_PHY_IDENTIFIER,
4480 val);
4481 break;
4482 case PORT_HW_CFG_TX_LASER_GPIO0:
4483 case PORT_HW_CFG_TX_LASER_GPIO1:
4484 case PORT_HW_CFG_TX_LASER_GPIO2:
4485 case PORT_HW_CFG_TX_LASER_GPIO3:
4486 {
4487 u16 gpio_pin;
4488 u8 gpio_port, gpio_mode;
4489 if (tx_en)
4490 gpio_mode = MISC_REGISTERS_GPIO_OUTPUT_HIGH;
4491 else
4492 gpio_mode = MISC_REGISTERS_GPIO_OUTPUT_LOW;
4493
4494 gpio_pin = tx_en_mode - PORT_HW_CFG_TX_LASER_GPIO0;
4495 gpio_port = bnx2x_get_gpio_port(params);
4496 bnx2x_set_gpio(bp, gpio_pin, gpio_mode, gpio_port);
4497 break;
4498 }
4499 default:
4500 DP(NETIF_MSG_LINK, "Invalid TX_LASER_MDIO 0x%x\n", tx_en_mode);
4501 break;
4502 }
4429} 4503}
4430 4504
4431static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy, 4505static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4432 struct link_params *params, 4506 struct link_params *params,
4433 u16 addr, u8 byte_cnt, u8 *o_buf) 4507 u16 addr, u8 byte_cnt, u8 *o_buf)
4434{ 4508{
4435 struct bnx2x *bp = params->bp; 4509 struct bnx2x *bp = params->bp;
4436 u16 val = 0; 4510 u16 val = 0;
@@ -4443,23 +4517,23 @@ static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4443 /* Set the read command byte count */ 4517 /* Set the read command byte count */
4444 bnx2x_cl45_write(bp, phy, 4518 bnx2x_cl45_write(bp, phy,
4445 MDIO_PMA_DEVAD, MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT, 4519 MDIO_PMA_DEVAD, MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT,
4446 (byte_cnt | 0xa000)); 4520 (byte_cnt | 0xa000));
4447 4521
4448 /* Set the read command address */ 4522 /* Set the read command address */
4449 bnx2x_cl45_write(bp, phy, 4523 bnx2x_cl45_write(bp, phy,
4450 MDIO_PMA_DEVAD, MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR, 4524 MDIO_PMA_DEVAD, MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR,
4451 addr); 4525 addr);
4452 4526
4453 /* Activate read command */ 4527 /* Activate read command */
4454 bnx2x_cl45_write(bp, phy, 4528 bnx2x_cl45_write(bp, phy,
4455 MDIO_PMA_DEVAD, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, 4529 MDIO_PMA_DEVAD, MDIO_PMA_REG_SFP_TWO_WIRE_CTRL,
4456 0x2c0f); 4530 0x2c0f);
4457 4531
4458 /* Wait up to 500us for command complete status */ 4532 /* Wait up to 500us for command complete status */
4459 for (i = 0; i < 100; i++) { 4533 for (i = 0; i < 100; i++) {
4460 bnx2x_cl45_read(bp, phy, 4534 bnx2x_cl45_read(bp, phy,
4461 MDIO_PMA_DEVAD, 4535 MDIO_PMA_DEVAD,
4462 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val); 4536 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val);
4463 if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) == 4537 if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) ==
4464 MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE) 4538 MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE)
4465 break; 4539 break;
@@ -4477,15 +4551,15 @@ static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4477 /* Read the buffer */ 4551 /* Read the buffer */
4478 for (i = 0; i < byte_cnt; i++) { 4552 for (i = 0; i < byte_cnt; i++) {
4479 bnx2x_cl45_read(bp, phy, 4553 bnx2x_cl45_read(bp, phy,
4480 MDIO_PMA_DEVAD, 4554 MDIO_PMA_DEVAD,
4481 MDIO_PMA_REG_8726_TWO_WIRE_DATA_BUF + i, &val); 4555 MDIO_PMA_REG_8726_TWO_WIRE_DATA_BUF + i, &val);
4482 o_buf[i] = (u8)(val & MDIO_PMA_REG_8726_TWO_WIRE_DATA_MASK); 4556 o_buf[i] = (u8)(val & MDIO_PMA_REG_8726_TWO_WIRE_DATA_MASK);
4483 } 4557 }
4484 4558
4485 for (i = 0; i < 100; i++) { 4559 for (i = 0; i < 100; i++) {
4486 bnx2x_cl45_read(bp, phy, 4560 bnx2x_cl45_read(bp, phy,
4487 MDIO_PMA_DEVAD, 4561 MDIO_PMA_DEVAD,
4488 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val); 4562 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val);
4489 if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) == 4563 if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) ==
4490 MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE) 4564 MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE)
4491 return 0; 4565 return 0;
@@ -4496,7 +4570,7 @@ static u8 bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4496 4570
4497static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy, 4571static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4498 struct link_params *params, 4572 struct link_params *params,
4499 u16 addr, u8 byte_cnt, u8 *o_buf) 4573 u16 addr, u8 byte_cnt, u8 *o_buf)
4500{ 4574{
4501 struct bnx2x *bp = params->bp; 4575 struct bnx2x *bp = params->bp;
4502 u16 val, i; 4576 u16 val, i;
@@ -4509,41 +4583,43 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4509 4583
4510 /* Need to read from 1.8000 to clear it */ 4584 /* Need to read from 1.8000 to clear it */
4511 bnx2x_cl45_read(bp, phy, 4585 bnx2x_cl45_read(bp, phy,
4512 MDIO_PMA_DEVAD, 4586 MDIO_PMA_DEVAD,
4513 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, 4587 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL,
4514 &val); 4588 &val);
4515 4589
4516 /* Set the read command byte count */ 4590 /* Set the read command byte count */
4517 bnx2x_cl45_write(bp, phy, 4591 bnx2x_cl45_write(bp, phy,
4518 MDIO_PMA_DEVAD, 4592 MDIO_PMA_DEVAD,
4519 MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT, 4593 MDIO_PMA_REG_SFP_TWO_WIRE_BYTE_CNT,
4520 ((byte_cnt < 2) ? 2 : byte_cnt)); 4594 ((byte_cnt < 2) ? 2 : byte_cnt));
4521 4595
4522 /* Set the read command address */ 4596 /* Set the read command address */
4523 bnx2x_cl45_write(bp, phy, 4597 bnx2x_cl45_write(bp, phy,
4524 MDIO_PMA_DEVAD, 4598 MDIO_PMA_DEVAD,
4525 MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR, 4599 MDIO_PMA_REG_SFP_TWO_WIRE_MEM_ADDR,
4526 addr); 4600 addr);
4527 /* Set the destination address */ 4601 /* Set the destination address */
4528 bnx2x_cl45_write(bp, phy, 4602 bnx2x_cl45_write(bp, phy,
4529 MDIO_PMA_DEVAD, 4603 MDIO_PMA_DEVAD,
4530 0x8004, 4604 0x8004,
4531 MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF); 4605 MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF);
4532 4606
4533 /* Activate read command */ 4607 /* Activate read command */
4534 bnx2x_cl45_write(bp, phy, 4608 bnx2x_cl45_write(bp, phy,
4535 MDIO_PMA_DEVAD, 4609 MDIO_PMA_DEVAD,
4536 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, 4610 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL,
4537 0x8002); 4611 0x8002);
4538 /* Wait appropriate time for two-wire command to finish before 4612 /*
4539 polling the status register */ 4613 * Wait appropriate time for two-wire command to finish before
4614 * polling the status register
4615 */
4540 msleep(1); 4616 msleep(1);
4541 4617
4542 /* Wait up to 500us for command complete status */ 4618 /* Wait up to 500us for command complete status */
4543 for (i = 0; i < 100; i++) { 4619 for (i = 0; i < 100; i++) {
4544 bnx2x_cl45_read(bp, phy, 4620 bnx2x_cl45_read(bp, phy,
4545 MDIO_PMA_DEVAD, 4621 MDIO_PMA_DEVAD,
4546 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val); 4622 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val);
4547 if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) == 4623 if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) ==
4548 MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE) 4624 MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_COMPLETE)
4549 break; 4625 break;
@@ -4555,21 +4631,21 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4555 DP(NETIF_MSG_LINK, 4631 DP(NETIF_MSG_LINK,
4556 "Got bad status 0x%x when reading from SFP+ EEPROM\n", 4632 "Got bad status 0x%x when reading from SFP+ EEPROM\n",
4557 (val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK)); 4633 (val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK));
4558 return -EINVAL; 4634 return -EFAULT;
4559 } 4635 }
4560 4636
4561 /* Read the buffer */ 4637 /* Read the buffer */
4562 for (i = 0; i < byte_cnt; i++) { 4638 for (i = 0; i < byte_cnt; i++) {
4563 bnx2x_cl45_read(bp, phy, 4639 bnx2x_cl45_read(bp, phy,
4564 MDIO_PMA_DEVAD, 4640 MDIO_PMA_DEVAD,
4565 MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF + i, &val); 4641 MDIO_PMA_REG_8727_TWO_WIRE_DATA_BUF + i, &val);
4566 o_buf[i] = (u8)(val & MDIO_PMA_REG_8727_TWO_WIRE_DATA_MASK); 4642 o_buf[i] = (u8)(val & MDIO_PMA_REG_8727_TWO_WIRE_DATA_MASK);
4567 } 4643 }
4568 4644
4569 for (i = 0; i < 100; i++) { 4645 for (i = 0; i < 100; i++) {
4570 bnx2x_cl45_read(bp, phy, 4646 bnx2x_cl45_read(bp, phy,
4571 MDIO_PMA_DEVAD, 4647 MDIO_PMA_DEVAD,
4572 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val); 4648 MDIO_PMA_REG_SFP_TWO_WIRE_CTRL, &val);
4573 if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) == 4649 if ((val & MDIO_PMA_REG_SFP_TWO_WIRE_CTRL_STATUS_MASK) ==
4574 MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE) 4650 MDIO_PMA_REG_SFP_TWO_WIRE_STATUS_IDLE)
4575 return 0; 4651 return 0;
@@ -4579,22 +4655,22 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4579 return -EINVAL; 4655 return -EINVAL;
4580} 4656}
4581 4657
4582static u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy, 4658u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,
4583 struct link_params *params, u16 addr, 4659 struct link_params *params, u16 addr,
4584 u8 byte_cnt, u8 *o_buf) 4660 u8 byte_cnt, u8 *o_buf)
4585{ 4661{
4586 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) 4662 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726)
4587 return bnx2x_8726_read_sfp_module_eeprom(phy, params, addr, 4663 return bnx2x_8726_read_sfp_module_eeprom(phy, params, addr,
4588 byte_cnt, o_buf); 4664 byte_cnt, o_buf);
4589 else if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) 4665 else if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727)
4590 return bnx2x_8727_read_sfp_module_eeprom(phy, params, addr, 4666 return bnx2x_8727_read_sfp_module_eeprom(phy, params, addr,
4591 byte_cnt, o_buf); 4667 byte_cnt, o_buf);
4592 return -EINVAL; 4668 return -EINVAL;
4593} 4669}
4594 4670
4595static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy, 4671static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy,
4596 struct link_params *params, 4672 struct link_params *params,
4597 u16 *edc_mode) 4673 u16 *edc_mode)
4598{ 4674{
4599 struct bnx2x *bp = params->bp; 4675 struct bnx2x *bp = params->bp;
4600 u8 val, check_limiting_mode = 0; 4676 u8 val, check_limiting_mode = 0;
@@ -4615,8 +4691,10 @@ static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy,
4615 { 4691 {
4616 u8 copper_module_type; 4692 u8 copper_module_type;
4617 4693
4618 /* Check if its active cable( includes SFP+ module) 4694 /*
4619 of passive cable*/ 4695 * Check if its active cable (includes SFP+ module)
4696 * of passive cable
4697 */
4620 if (bnx2x_read_sfp_module_eeprom(phy, 4698 if (bnx2x_read_sfp_module_eeprom(phy,
4621 params, 4699 params,
4622 SFP_EEPROM_FC_TX_TECH_ADDR, 4700 SFP_EEPROM_FC_TX_TECH_ADDR,
@@ -4675,8 +4753,10 @@ static u8 bnx2x_get_edc_mode(struct bnx2x_phy *phy,
4675 DP(NETIF_MSG_LINK, "EDC mode is set to 0x%x\n", *edc_mode); 4753 DP(NETIF_MSG_LINK, "EDC mode is set to 0x%x\n", *edc_mode);
4676 return 0; 4754 return 0;
4677} 4755}
4678/* This function read the relevant field from the module ( SFP+ ), 4756/*
4679 and verify it is compliant with this board */ 4757 * This function read the relevant field from the module (SFP+), and verify it
4758 * is compliant with this board
4759 */
4680static u8 bnx2x_verify_sfp_module(struct bnx2x_phy *phy, 4760static u8 bnx2x_verify_sfp_module(struct bnx2x_phy *phy,
4681 struct link_params *params) 4761 struct link_params *params)
4682{ 4762{
@@ -4725,24 +4805,24 @@ static u8 bnx2x_verify_sfp_module(struct bnx2x_phy *phy,
4725 /* format the warning message */ 4805 /* format the warning message */
4726 if (bnx2x_read_sfp_module_eeprom(phy, 4806 if (bnx2x_read_sfp_module_eeprom(phy,
4727 params, 4807 params,
4728 SFP_EEPROM_VENDOR_NAME_ADDR, 4808 SFP_EEPROM_VENDOR_NAME_ADDR,
4729 SFP_EEPROM_VENDOR_NAME_SIZE, 4809 SFP_EEPROM_VENDOR_NAME_SIZE,
4730 (u8 *)vendor_name)) 4810 (u8 *)vendor_name))
4731 vendor_name[0] = '\0'; 4811 vendor_name[0] = '\0';
4732 else 4812 else
4733 vendor_name[SFP_EEPROM_VENDOR_NAME_SIZE] = '\0'; 4813 vendor_name[SFP_EEPROM_VENDOR_NAME_SIZE] = '\0';
4734 if (bnx2x_read_sfp_module_eeprom(phy, 4814 if (bnx2x_read_sfp_module_eeprom(phy,
4735 params, 4815 params,
4736 SFP_EEPROM_PART_NO_ADDR, 4816 SFP_EEPROM_PART_NO_ADDR,
4737 SFP_EEPROM_PART_NO_SIZE, 4817 SFP_EEPROM_PART_NO_SIZE,
4738 (u8 *)vendor_pn)) 4818 (u8 *)vendor_pn))
4739 vendor_pn[0] = '\0'; 4819 vendor_pn[0] = '\0';
4740 else 4820 else
4741 vendor_pn[SFP_EEPROM_PART_NO_SIZE] = '\0'; 4821 vendor_pn[SFP_EEPROM_PART_NO_SIZE] = '\0';
4742 4822
4743 netdev_info(bp->dev, "Warning: Unqualified SFP+ module detected," 4823 netdev_err(bp->dev, "Warning: Unqualified SFP+ module detected,"
4744 " Port %d from %s part number %s\n", 4824 " Port %d from %s part number %s\n",
4745 params->port, vendor_name, vendor_pn); 4825 params->port, vendor_name, vendor_pn);
4746 phy->flags |= FLAGS_SFP_NOT_APPROVED; 4826 phy->flags |= FLAGS_SFP_NOT_APPROVED;
4747 return -EINVAL; 4827 return -EINVAL;
4748} 4828}
@@ -4754,8 +4834,11 @@ static u8 bnx2x_wait_for_sfp_module_initialized(struct bnx2x_phy *phy,
4754 u8 val; 4834 u8 val;
4755 struct bnx2x *bp = params->bp; 4835 struct bnx2x *bp = params->bp;
4756 u16 timeout; 4836 u16 timeout;
4757 /* Initialization time after hot-plug may take up to 300ms for some 4837 /*
4758 phys type ( e.g. JDSU ) */ 4838 * Initialization time after hot-plug may take up to 300ms for
4839 * some phys type ( e.g. JDSU )
4840 */
4841
4759 for (timeout = 0; timeout < 60; timeout++) { 4842 for (timeout = 0; timeout < 60; timeout++) {
4760 if (bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, &val) 4843 if (bnx2x_read_sfp_module_eeprom(phy, params, 1, 1, &val)
4761 == 0) { 4844 == 0) {
@@ -4774,16 +4857,14 @@ static void bnx2x_8727_power_module(struct bnx2x *bp,
4774 /* Make sure GPIOs are not using for LED mode */ 4857 /* Make sure GPIOs are not using for LED mode */
4775 u16 val; 4858 u16 val;
4776 /* 4859 /*
4777 * In the GPIO register, bit 4 is use to detemine if the GPIOs are 4860 * In the GPIO register, bit 4 is use to determine if the GPIOs are
4778 * operating as INPUT or as OUTPUT. Bit 1 is for input, and 0 for 4861 * operating as INPUT or as OUTPUT. Bit 1 is for input, and 0 for
4779 * output 4862 * output
4780 * Bits 0-1 determine the gpios value for OUTPUT in case bit 4 val is 0 4863 * Bits 0-1 determine the gpios value for OUTPUT in case bit 4 val is 0
4781 * Bits 8-9 determine the gpios value for INPUT in case bit 4 val is 1 4864 * Bits 8-9 determine the gpios value for INPUT in case bit 4 val is 1
4782 * where the 1st bit is the over-current(only input), and 2nd bit is 4865 * where the 1st bit is the over-current(only input), and 2nd bit is
4783 * for power( only output ) 4866 * for power( only output )
4784 */ 4867 *
4785
4786 /*
4787 * In case of NOC feature is disabled and power is up, set GPIO control 4868 * In case of NOC feature is disabled and power is up, set GPIO control
4788 * as input to enable listening of over-current indication 4869 * as input to enable listening of over-current indication
4789 */ 4870 */
@@ -4812,15 +4893,14 @@ static u8 bnx2x_8726_set_limiting_mode(struct bnx2x *bp,
4812 u16 cur_limiting_mode; 4893 u16 cur_limiting_mode;
4813 4894
4814 bnx2x_cl45_read(bp, phy, 4895 bnx2x_cl45_read(bp, phy,
4815 MDIO_PMA_DEVAD, 4896 MDIO_PMA_DEVAD,
4816 MDIO_PMA_REG_ROM_VER2, 4897 MDIO_PMA_REG_ROM_VER2,
4817 &cur_limiting_mode); 4898 &cur_limiting_mode);
4818 DP(NETIF_MSG_LINK, "Current Limiting mode is 0x%x\n", 4899 DP(NETIF_MSG_LINK, "Current Limiting mode is 0x%x\n",
4819 cur_limiting_mode); 4900 cur_limiting_mode);
4820 4901
4821 if (edc_mode == EDC_MODE_LIMITING) { 4902 if (edc_mode == EDC_MODE_LIMITING) {
4822 DP(NETIF_MSG_LINK, 4903 DP(NETIF_MSG_LINK, "Setting LIMITING MODE\n");
4823 "Setting LIMITING MODE\n");
4824 bnx2x_cl45_write(bp, phy, 4904 bnx2x_cl45_write(bp, phy,
4825 MDIO_PMA_DEVAD, 4905 MDIO_PMA_DEVAD,
4826 MDIO_PMA_REG_ROM_VER2, 4906 MDIO_PMA_REG_ROM_VER2,
@@ -4829,62 +4909,63 @@ static u8 bnx2x_8726_set_limiting_mode(struct bnx2x *bp,
4829 4909
4830 DP(NETIF_MSG_LINK, "Setting LRM MODE\n"); 4910 DP(NETIF_MSG_LINK, "Setting LRM MODE\n");
4831 4911
4832 /* Changing to LRM mode takes quite few seconds. 4912 /*
4833 So do it only if current mode is limiting 4913 * Changing to LRM mode takes quite few seconds. So do it only
4834 ( default is LRM )*/ 4914 * if current mode is limiting (default is LRM)
4915 */
4835 if (cur_limiting_mode != EDC_MODE_LIMITING) 4916 if (cur_limiting_mode != EDC_MODE_LIMITING)
4836 return 0; 4917 return 0;
4837 4918
4838 bnx2x_cl45_write(bp, phy, 4919 bnx2x_cl45_write(bp, phy,
4839 MDIO_PMA_DEVAD, 4920 MDIO_PMA_DEVAD,
4840 MDIO_PMA_REG_LRM_MODE, 4921 MDIO_PMA_REG_LRM_MODE,
4841 0); 4922 0);
4842 bnx2x_cl45_write(bp, phy, 4923 bnx2x_cl45_write(bp, phy,
4843 MDIO_PMA_DEVAD, 4924 MDIO_PMA_DEVAD,
4844 MDIO_PMA_REG_ROM_VER2, 4925 MDIO_PMA_REG_ROM_VER2,
4845 0x128); 4926 0x128);
4846 bnx2x_cl45_write(bp, phy, 4927 bnx2x_cl45_write(bp, phy,
4847 MDIO_PMA_DEVAD, 4928 MDIO_PMA_DEVAD,
4848 MDIO_PMA_REG_MISC_CTRL0, 4929 MDIO_PMA_REG_MISC_CTRL0,
4849 0x4008); 4930 0x4008);
4850 bnx2x_cl45_write(bp, phy, 4931 bnx2x_cl45_write(bp, phy,
4851 MDIO_PMA_DEVAD, 4932 MDIO_PMA_DEVAD,
4852 MDIO_PMA_REG_LRM_MODE, 4933 MDIO_PMA_REG_LRM_MODE,
4853 0xaaaa); 4934 0xaaaa);
4854 } 4935 }
4855 return 0; 4936 return 0;
4856} 4937}
4857 4938
4858static u8 bnx2x_8727_set_limiting_mode(struct bnx2x *bp, 4939static u8 bnx2x_8727_set_limiting_mode(struct bnx2x *bp,
4859 struct bnx2x_phy *phy, 4940 struct bnx2x_phy *phy,
4860 u16 edc_mode) 4941 u16 edc_mode)
4861{ 4942{
4862 u16 phy_identifier; 4943 u16 phy_identifier;
4863 u16 rom_ver2_val; 4944 u16 rom_ver2_val;
4864 bnx2x_cl45_read(bp, phy, 4945 bnx2x_cl45_read(bp, phy,
4865 MDIO_PMA_DEVAD, 4946 MDIO_PMA_DEVAD,
4866 MDIO_PMA_REG_PHY_IDENTIFIER, 4947 MDIO_PMA_REG_PHY_IDENTIFIER,
4867 &phy_identifier); 4948 &phy_identifier);
4868 4949
4869 bnx2x_cl45_write(bp, phy, 4950 bnx2x_cl45_write(bp, phy,
4870 MDIO_PMA_DEVAD, 4951 MDIO_PMA_DEVAD,
4871 MDIO_PMA_REG_PHY_IDENTIFIER, 4952 MDIO_PMA_REG_PHY_IDENTIFIER,
4872 (phy_identifier & ~(1<<9))); 4953 (phy_identifier & ~(1<<9)));
4873 4954
4874 bnx2x_cl45_read(bp, phy, 4955 bnx2x_cl45_read(bp, phy,
4875 MDIO_PMA_DEVAD, 4956 MDIO_PMA_DEVAD,
4876 MDIO_PMA_REG_ROM_VER2, 4957 MDIO_PMA_REG_ROM_VER2,
4877 &rom_ver2_val); 4958 &rom_ver2_val);
4878 /* Keep the MSB 8-bits, and set the LSB 8-bits with the edc_mode */ 4959 /* Keep the MSB 8-bits, and set the LSB 8-bits with the edc_mode */
4879 bnx2x_cl45_write(bp, phy, 4960 bnx2x_cl45_write(bp, phy,
4880 MDIO_PMA_DEVAD, 4961 MDIO_PMA_DEVAD,
4881 MDIO_PMA_REG_ROM_VER2, 4962 MDIO_PMA_REG_ROM_VER2,
4882 (rom_ver2_val & 0xff00) | (edc_mode & 0x00ff)); 4963 (rom_ver2_val & 0xff00) | (edc_mode & 0x00ff));
4883 4964
4884 bnx2x_cl45_write(bp, phy, 4965 bnx2x_cl45_write(bp, phy,
4885 MDIO_PMA_DEVAD, 4966 MDIO_PMA_DEVAD,
4886 MDIO_PMA_REG_PHY_IDENTIFIER, 4967 MDIO_PMA_REG_PHY_IDENTIFIER,
4887 (phy_identifier | (1<<9))); 4968 (phy_identifier | (1<<9)));
4888 4969
4889 return 0; 4970 return 0;
4890} 4971}
@@ -4897,11 +4978,11 @@ static void bnx2x_8727_specific_func(struct bnx2x_phy *phy,
4897 4978
4898 switch (action) { 4979 switch (action) {
4899 case DISABLE_TX: 4980 case DISABLE_TX:
4900 bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); 4981 bnx2x_sfp_set_transmitter(params, phy, 0);
4901 break; 4982 break;
4902 case ENABLE_TX: 4983 case ENABLE_TX:
4903 if (!(phy->flags & FLAGS_SFP_NOT_APPROVED)) 4984 if (!(phy->flags & FLAGS_SFP_NOT_APPROVED))
4904 bnx2x_sfp_set_transmitter(bp, phy, params->port, 1); 4985 bnx2x_sfp_set_transmitter(params, phy, 1);
4905 break; 4986 break;
4906 default: 4987 default:
4907 DP(NETIF_MSG_LINK, "Function 0x%x not supported by 8727\n", 4988 DP(NETIF_MSG_LINK, "Function 0x%x not supported by 8727\n",
@@ -4910,6 +4991,38 @@ static void bnx2x_8727_specific_func(struct bnx2x_phy *phy,
4910 } 4991 }
4911} 4992}
4912 4993
4994static void bnx2x_set_sfp_module_fault_led(struct link_params *params,
4995 u8 gpio_mode)
4996{
4997 struct bnx2x *bp = params->bp;
4998
4999 u32 fault_led_gpio = REG_RD(bp, params->shmem_base +
5000 offsetof(struct shmem_region,
5001 dev_info.port_hw_config[params->port].sfp_ctrl)) &
5002 PORT_HW_CFG_FAULT_MODULE_LED_MASK;
5003 switch (fault_led_gpio) {
5004 case PORT_HW_CFG_FAULT_MODULE_LED_DISABLED:
5005 return;
5006 case PORT_HW_CFG_FAULT_MODULE_LED_GPIO0:
5007 case PORT_HW_CFG_FAULT_MODULE_LED_GPIO1:
5008 case PORT_HW_CFG_FAULT_MODULE_LED_GPIO2:
5009 case PORT_HW_CFG_FAULT_MODULE_LED_GPIO3:
5010 {
5011 u8 gpio_port = bnx2x_get_gpio_port(params);
5012 u16 gpio_pin = fault_led_gpio -
5013 PORT_HW_CFG_FAULT_MODULE_LED_GPIO0;
5014 DP(NETIF_MSG_LINK, "Set fault module-detected led "
5015 "pin %x port %x mode %x\n",
5016 gpio_pin, gpio_port, gpio_mode);
5017 bnx2x_set_gpio(bp, gpio_pin, gpio_mode, gpio_port);
5018 }
5019 break;
5020 default:
5021 DP(NETIF_MSG_LINK, "Error: Invalid fault led mode 0x%x\n",
5022 fault_led_gpio);
5023 }
5024}
5025
4913static u8 bnx2x_sfp_module_detection(struct bnx2x_phy *phy, 5026static u8 bnx2x_sfp_module_detection(struct bnx2x_phy *phy,
4914 struct link_params *params) 5027 struct link_params *params)
4915{ 5028{
@@ -4927,15 +5040,14 @@ static u8 bnx2x_sfp_module_detection(struct bnx2x_phy *phy,
4927 if (bnx2x_get_edc_mode(phy, params, &edc_mode) != 0) { 5040 if (bnx2x_get_edc_mode(phy, params, &edc_mode) != 0) {
4928 DP(NETIF_MSG_LINK, "Failed to get valid module type\n"); 5041 DP(NETIF_MSG_LINK, "Failed to get valid module type\n");
4929 return -EINVAL; 5042 return -EINVAL;
4930 } else if (bnx2x_verify_sfp_module(phy, params) != 5043 } else if (bnx2x_verify_sfp_module(phy, params) != 0) {
4931 0) {
4932 /* check SFP+ module compatibility */ 5044 /* check SFP+ module compatibility */
4933 DP(NETIF_MSG_LINK, "Module verification failed!!\n"); 5045 DP(NETIF_MSG_LINK, "Module verification failed!!\n");
4934 rc = -EINVAL; 5046 rc = -EINVAL;
4935 /* Turn on fault module-detected led */ 5047 /* Turn on fault module-detected led */
4936 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, 5048 bnx2x_set_sfp_module_fault_led(params,
4937 MISC_REGISTERS_GPIO_HIGH, 5049 MISC_REGISTERS_GPIO_HIGH);
4938 params->port); 5050
4939 if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) && 5051 if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) &&
4940 ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) == 5052 ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) ==
4941 PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_POWER_DOWN)) { 5053 PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_POWER_DOWN)) {
@@ -4946,18 +5058,17 @@ static u8 bnx2x_sfp_module_detection(struct bnx2x_phy *phy,
4946 } 5058 }
4947 } else { 5059 } else {
4948 /* Turn off fault module-detected led */ 5060 /* Turn off fault module-detected led */
4949 DP(NETIF_MSG_LINK, "Turn off fault module-detected led\n"); 5061 bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_LOW);
4950 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0,
4951 MISC_REGISTERS_GPIO_LOW,
4952 params->port);
4953 } 5062 }
4954 5063
4955 /* power up the SFP module */ 5064 /* power up the SFP module */
4956 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727) 5065 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727)
4957 bnx2x_8727_power_module(bp, phy, 1); 5066 bnx2x_8727_power_module(bp, phy, 1);
4958 5067
4959 /* Check and set limiting mode / LRM mode on 8726. 5068 /*
4960 On 8727 it is done automatically */ 5069 * Check and set limiting mode / LRM mode on 8726. On 8727 it
5070 * is done automatically
5071 */
4961 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) 5072 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726)
4962 bnx2x_8726_set_limiting_mode(bp, phy, edc_mode); 5073 bnx2x_8726_set_limiting_mode(bp, phy, edc_mode);
4963 else 5074 else
@@ -4969,9 +5080,9 @@ static u8 bnx2x_sfp_module_detection(struct bnx2x_phy *phy,
4969 if (rc == 0 || 5080 if (rc == 0 ||
4970 (val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) != 5081 (val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) !=
4971 PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER) 5082 PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER)
4972 bnx2x_sfp_set_transmitter(bp, phy, params->port, 1); 5083 bnx2x_sfp_set_transmitter(params, phy, 1);
4973 else 5084 else
4974 bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); 5085 bnx2x_sfp_set_transmitter(params, phy, 0);
4975 5086
4976 return rc; 5087 return rc;
4977} 5088}
@@ -4984,11 +5095,9 @@ void bnx2x_handle_module_detect_int(struct link_params *params)
4984 u8 port = params->port; 5095 u8 port = params->port;
4985 5096
4986 /* Set valid module led off */ 5097 /* Set valid module led off */
4987 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, 5098 bnx2x_set_sfp_module_fault_led(params, MISC_REGISTERS_GPIO_HIGH);
4988 MISC_REGISTERS_GPIO_HIGH,
4989 params->port);
4990 5099
4991 /* Get current gpio val refelecting module plugged in / out*/ 5100 /* Get current gpio val reflecting module plugged in / out*/
4992 gpio_val = bnx2x_get_gpio(bp, MISC_REGISTERS_GPIO_3, port); 5101 gpio_val = bnx2x_get_gpio(bp, MISC_REGISTERS_GPIO_3, port);
4993 5102
4994 /* Call the handling function in case module is detected */ 5103 /* Call the handling function in case module is detected */
@@ -5004,18 +5113,20 @@ void bnx2x_handle_module_detect_int(struct link_params *params)
5004 DP(NETIF_MSG_LINK, "SFP+ module is not initialized\n"); 5113 DP(NETIF_MSG_LINK, "SFP+ module is not initialized\n");
5005 } else { 5114 } else {
5006 u32 val = REG_RD(bp, params->shmem_base + 5115 u32 val = REG_RD(bp, params->shmem_base +
5007 offsetof(struct shmem_region, dev_info. 5116 offsetof(struct shmem_region, dev_info.
5008 port_feature_config[params->port]. 5117 port_feature_config[params->port].
5009 config)); 5118 config));
5010 5119
5011 bnx2x_set_gpio_int(bp, MISC_REGISTERS_GPIO_3, 5120 bnx2x_set_gpio_int(bp, MISC_REGISTERS_GPIO_3,
5012 MISC_REGISTERS_GPIO_INT_OUTPUT_SET, 5121 MISC_REGISTERS_GPIO_INT_OUTPUT_SET,
5013 port); 5122 port);
5014 /* Module was plugged out. */ 5123 /*
5015 /* Disable transmit for this module */ 5124 * Module was plugged out.
5125 * Disable transmit for this module
5126 */
5016 if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) == 5127 if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) ==
5017 PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER) 5128 PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER)
5018 bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); 5129 bnx2x_sfp_set_transmitter(params, phy, 0);
5019 } 5130 }
5020} 5131}
5021 5132
@@ -5051,9 +5162,9 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy,
5051 5162
5052 DP(NETIF_MSG_LINK, "8706/8726 rx_sd 0x%x pcs_status 0x%x 1Gbps" 5163 DP(NETIF_MSG_LINK, "8706/8726 rx_sd 0x%x pcs_status 0x%x 1Gbps"
5053 " link_status 0x%x\n", rx_sd, pcs_status, val2); 5164 " link_status 0x%x\n", rx_sd, pcs_status, val2);
5054 /* link is up if both bit 0 of pmd_rx_sd and 5165 /*
5055 * bit 0 of pcs_status are set, or if the autoneg bit 5166 * link is up if both bit 0 of pmd_rx_sd and bit 0 of pcs_status
5056 * 1 is set 5167 * are set, or if the autoneg bit 1 is set
5057 */ 5168 */
5058 link_up = ((rx_sd & pcs_status & 0x1) || (val2 & (1<<1))); 5169 link_up = ((rx_sd & pcs_status & 0x1) || (val2 & (1<<1)));
5059 if (link_up) { 5170 if (link_up) {
@@ -5062,6 +5173,7 @@ static u8 bnx2x_8706_8726_read_status(struct bnx2x_phy *phy,
5062 else 5173 else
5063 vars->line_speed = SPEED_10000; 5174 vars->line_speed = SPEED_10000;
5064 bnx2x_ext_phy_resolve_fc(phy, params, vars); 5175 bnx2x_ext_phy_resolve_fc(phy, params, vars);
5176 vars->duplex = DUPLEX_FULL;
5065 } 5177 }
5066 return link_up; 5178 return link_up;
5067} 5179}
@@ -5073,14 +5185,15 @@ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy,
5073 struct link_params *params, 5185 struct link_params *params,
5074 struct link_vars *vars) 5186 struct link_vars *vars)
5075{ 5187{
5076 u16 cnt, val; 5188 u32 tx_en_mode;
5189 u16 cnt, val, tmp1;
5077 struct bnx2x *bp = params->bp; 5190 struct bnx2x *bp = params->bp;
5078 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 5191 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
5079 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); 5192 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);
5080 /* HW reset */ 5193 /* HW reset */
5081 bnx2x_ext_phy_hw_reset(bp, params->port); 5194 bnx2x_ext_phy_hw_reset(bp, params->port);
5082 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040); 5195 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 0xa040);
5083 bnx2x_wait_reset_complete(bp, phy); 5196 bnx2x_wait_reset_complete(bp, phy, params);
5084 5197
5085 /* Wait until fw is loaded */ 5198 /* Wait until fw is loaded */
5086 for (cnt = 0; cnt < 100; cnt++) { 5199 for (cnt = 0; cnt < 100; cnt++) {
@@ -5147,6 +5260,26 @@ static u8 bnx2x_8706_config_init(struct bnx2x_phy *phy,
5147 0x0004); 5260 0x0004);
5148 } 5261 }
5149 bnx2x_save_bcm_spirom_ver(bp, phy, params->port); 5262 bnx2x_save_bcm_spirom_ver(bp, phy, params->port);
5263
5264 /*
5265 * If TX Laser is controlled by GPIO_0, do not let PHY go into low
5266 * power mode, if TX Laser is disabled
5267 */
5268
5269 tx_en_mode = REG_RD(bp, params->shmem_base +
5270 offsetof(struct shmem_region,
5271 dev_info.port_hw_config[params->port].sfp_ctrl))
5272 & PORT_HW_CFG_TX_LASER_MASK;
5273
5274 if (tx_en_mode == PORT_HW_CFG_TX_LASER_GPIO0) {
5275 DP(NETIF_MSG_LINK, "Enabling TXONOFF_PWRDN_DIS\n");
5276 bnx2x_cl45_read(bp, phy,
5277 MDIO_PMA_DEVAD, MDIO_PMA_REG_DIGITAL_CTRL, &tmp1);
5278 tmp1 |= 0x1;
5279 bnx2x_cl45_write(bp, phy,
5280 MDIO_PMA_DEVAD, MDIO_PMA_REG_DIGITAL_CTRL, tmp1);
5281 }
5282
5150 return 0; 5283 return 0;
5151} 5284}
5152 5285
@@ -5181,26 +5314,26 @@ static void bnx2x_8726_external_rom_boot(struct bnx2x_phy *phy,
5181 5314
5182 /* Set soft reset */ 5315 /* Set soft reset */
5183 bnx2x_cl45_write(bp, phy, 5316 bnx2x_cl45_write(bp, phy,
5184 MDIO_PMA_DEVAD, 5317 MDIO_PMA_DEVAD,
5185 MDIO_PMA_REG_GEN_CTRL, 5318 MDIO_PMA_REG_GEN_CTRL,
5186 MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET); 5319 MDIO_PMA_REG_GEN_CTRL_ROM_MICRO_RESET);
5187 5320
5188 bnx2x_cl45_write(bp, phy, 5321 bnx2x_cl45_write(bp, phy,
5189 MDIO_PMA_DEVAD, 5322 MDIO_PMA_DEVAD,
5190 MDIO_PMA_REG_MISC_CTRL1, 0x0001); 5323 MDIO_PMA_REG_MISC_CTRL1, 0x0001);
5191 5324
5192 bnx2x_cl45_write(bp, phy, 5325 bnx2x_cl45_write(bp, phy,
5193 MDIO_PMA_DEVAD, 5326 MDIO_PMA_DEVAD,
5194 MDIO_PMA_REG_GEN_CTRL, 5327 MDIO_PMA_REG_GEN_CTRL,
5195 MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP); 5328 MDIO_PMA_REG_GEN_CTRL_ROM_RESET_INTERNAL_MP);
5196 5329
5197 /* wait for 150ms for microcode load */ 5330 /* wait for 150ms for microcode load */
5198 msleep(150); 5331 msleep(150);
5199 5332
5200 /* Disable serial boot control, tristates pins SS_N, SCK, MOSI, MISO */ 5333 /* Disable serial boot control, tristates pins SS_N, SCK, MOSI, MISO */
5201 bnx2x_cl45_write(bp, phy, 5334 bnx2x_cl45_write(bp, phy,
5202 MDIO_PMA_DEVAD, 5335 MDIO_PMA_DEVAD,
5203 MDIO_PMA_REG_MISC_CTRL1, 0x0000); 5336 MDIO_PMA_REG_MISC_CTRL1, 0x0000);
5204 5337
5205 msleep(200); 5338 msleep(200);
5206 bnx2x_save_bcm_spirom_ver(bp, phy, params->port); 5339 bnx2x_save_bcm_spirom_ver(bp, phy, params->port);
@@ -5235,23 +5368,18 @@ static u8 bnx2x_8726_config_init(struct bnx2x_phy *phy,
5235 u32 val; 5368 u32 val;
5236 u32 swap_val, swap_override, aeu_gpio_mask, offset; 5369 u32 swap_val, swap_override, aeu_gpio_mask, offset;
5237 DP(NETIF_MSG_LINK, "Initializing BCM8726\n"); 5370 DP(NETIF_MSG_LINK, "Initializing BCM8726\n");
5238 /* Restore normal power mode*/
5239 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
5240 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);
5241
5242 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
5243 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);
5244 5371
5245 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); 5372 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15);
5246 bnx2x_wait_reset_complete(bp, phy); 5373 bnx2x_wait_reset_complete(bp, phy, params);
5247 5374
5248 bnx2x_8726_external_rom_boot(phy, params); 5375 bnx2x_8726_external_rom_boot(phy, params);
5249 5376
5250 /* Need to call module detected on initialization since 5377 /*
5251 the module detection triggered by actual module 5378 * Need to call module detected on initialization since the module
5252 insertion might occur before driver is loaded, and when 5379 * detection triggered by actual module insertion might occur before
5253 driver is loaded, it reset all registers, including the 5380 * driver is loaded, and when driver is loaded, it reset all
5254 transmitter */ 5381 * registers, including the transmitter
5382 */
5255 bnx2x_sfp_module_detection(phy, params); 5383 bnx2x_sfp_module_detection(phy, params);
5256 5384
5257 if (phy->req_line_speed == SPEED_1000) { 5385 if (phy->req_line_speed == SPEED_1000) {
@@ -5284,8 +5412,10 @@ static u8 bnx2x_8726_config_init(struct bnx2x_phy *phy,
5284 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000); 5412 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1000);
5285 bnx2x_cl45_write(bp, phy, 5413 bnx2x_cl45_write(bp, phy,
5286 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200); 5414 MDIO_AN_DEVAD, MDIO_AN_REG_CTRL, 0x1200);
5287 /* Enable RX-ALARM control to receive 5415 /*
5288 interrupt for 1G speed change */ 5416 * Enable RX-ALARM control to receive interrupt for 1G speed
5417 * change
5418 */
5289 bnx2x_cl45_write(bp, phy, 5419 bnx2x_cl45_write(bp, phy,
5290 MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x4); 5420 MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x4);
5291 bnx2x_cl45_write(bp, phy, 5421 bnx2x_cl45_write(bp, phy,
@@ -5317,7 +5447,7 @@ static u8 bnx2x_8726_config_init(struct bnx2x_phy *phy,
5317 5447
5318 /* Set GPIO3 to trigger SFP+ module insertion/removal */ 5448 /* Set GPIO3 to trigger SFP+ module insertion/removal */
5319 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, 5449 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3,
5320 MISC_REGISTERS_GPIO_INPUT_HI_Z, params->port); 5450 MISC_REGISTERS_GPIO_INPUT_HI_Z, params->port);
5321 5451
5322 /* The GPIO should be swapped if the swap register is set and active */ 5452 /* The GPIO should be swapped if the swap register is set and active */
5323 swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); 5453 swap_val = REG_RD(bp, NIG_REG_PORT_SWAP);
@@ -5408,7 +5538,7 @@ static void bnx2x_8727_hw_reset(struct bnx2x_phy *phy,
5408 struct link_params *params) { 5538 struct link_params *params) {
5409 u32 swap_val, swap_override; 5539 u32 swap_val, swap_override;
5410 u8 port; 5540 u8 port;
5411 /** 5541 /*
5412 * The PHY reset is controlled by GPIO 1. Fake the port number 5542 * The PHY reset is controlled by GPIO 1. Fake the port number
5413 * to cancel the swap done in set_gpio() 5543 * to cancel the swap done in set_gpio()
5414 */ 5544 */
@@ -5417,20 +5547,21 @@ static void bnx2x_8727_hw_reset(struct bnx2x_phy *phy,
5417 swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); 5547 swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE);
5418 port = (swap_val && swap_override) ^ 1; 5548 port = (swap_val && swap_override) ^ 1;
5419 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1, 5549 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_1,
5420 MISC_REGISTERS_GPIO_OUTPUT_LOW, port); 5550 MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
5421} 5551}
5422 5552
5423static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy, 5553static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy,
5424 struct link_params *params, 5554 struct link_params *params,
5425 struct link_vars *vars) 5555 struct link_vars *vars)
5426{ 5556{
5427 u16 tmp1, val, mod_abs; 5557 u32 tx_en_mode;
5558 u16 tmp1, val, mod_abs, tmp2;
5428 u16 rx_alarm_ctrl_val; 5559 u16 rx_alarm_ctrl_val;
5429 u16 lasi_ctrl_val; 5560 u16 lasi_ctrl_val;
5430 struct bnx2x *bp = params->bp; 5561 struct bnx2x *bp = params->bp;
5431 /* Enable PMD link, MOD_ABS_FLT, and 1G link alarm */ 5562 /* Enable PMD link, MOD_ABS_FLT, and 1G link alarm */
5432 5563
5433 bnx2x_wait_reset_complete(bp, phy); 5564 bnx2x_wait_reset_complete(bp, phy, params);
5434 rx_alarm_ctrl_val = (1<<2) | (1<<5) ; 5565 rx_alarm_ctrl_val = (1<<2) | (1<<5) ;
5435 lasi_ctrl_val = 0x0004; 5566 lasi_ctrl_val = 0x0004;
5436 5567
@@ -5443,14 +5574,17 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy,
5443 bnx2x_cl45_write(bp, phy, 5574 bnx2x_cl45_write(bp, phy,
5444 MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, lasi_ctrl_val); 5575 MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, lasi_ctrl_val);
5445 5576
5446 /* Initially configure MOD_ABS to interrupt when 5577 /*
5447 module is presence( bit 8) */ 5578 * Initially configure MOD_ABS to interrupt when module is
5579 * presence( bit 8)
5580 */
5448 bnx2x_cl45_read(bp, phy, 5581 bnx2x_cl45_read(bp, phy,
5449 MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, &mod_abs); 5582 MDIO_PMA_DEVAD, MDIO_PMA_REG_PHY_IDENTIFIER, &mod_abs);
5450 /* Set EDC off by setting OPTXLOS signal input to low 5583 /*
5451 (bit 9). 5584 * Set EDC off by setting OPTXLOS signal input to low (bit 9).
5452 When the EDC is off it locks onto a reference clock and 5585 * When the EDC is off it locks onto a reference clock and avoids
5453 avoids becoming 'lost'.*/ 5586 * becoming 'lost'
5587 */
5454 mod_abs &= ~(1<<8); 5588 mod_abs &= ~(1<<8);
5455 if (!(phy->flags & FLAGS_NOC)) 5589 if (!(phy->flags & FLAGS_NOC))
5456 mod_abs &= ~(1<<9); 5590 mod_abs &= ~(1<<9);
@@ -5465,7 +5599,7 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy,
5465 if (phy->flags & FLAGS_NOC) 5599 if (phy->flags & FLAGS_NOC)
5466 val |= (3<<5); 5600 val |= (3<<5);
5467 5601
5468 /** 5602 /*
5469 * Set 8727 GPIOs to input to allow reading from the 8727 GPIO0 5603 * Set 8727 GPIOs to input to allow reading from the 8727 GPIO0
5470 * status which reflect SFP+ module over-current 5604 * status which reflect SFP+ module over-current
5471 */ 5605 */
@@ -5492,7 +5626,7 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy,
5492 bnx2x_cl45_read(bp, phy, 5626 bnx2x_cl45_read(bp, phy,
5493 MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1); 5627 MDIO_PMA_DEVAD, MDIO_PMA_REG_10G_CTRL2, &tmp1);
5494 DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1); 5628 DP(NETIF_MSG_LINK, "1.7 = 0x%x\n", tmp1);
5495 /** 5629 /*
5496 * Power down the XAUI until link is up in case of dual-media 5630 * Power down the XAUI until link is up in case of dual-media
5497 * and 1G 5631 * and 1G
5498 */ 5632 */
@@ -5518,7 +5652,7 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy,
5518 bnx2x_cl45_write(bp, phy, 5652 bnx2x_cl45_write(bp, phy,
5519 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300); 5653 MDIO_AN_DEVAD, MDIO_AN_REG_CL37_AN, 0x1300);
5520 } else { 5654 } else {
5521 /** 5655 /*
5522 * Since the 8727 has only single reset pin, need to set the 10G 5656 * Since the 8727 has only single reset pin, need to set the 10G
5523 * registers although it is default 5657 * registers although it is default
5524 */ 5658 */
@@ -5534,7 +5668,8 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy,
5534 0x0008); 5668 0x0008);
5535 } 5669 }
5536 5670
5537 /* Set 2-wire transfer rate of SFP+ module EEPROM 5671 /*
5672 * Set 2-wire transfer rate of SFP+ module EEPROM
5538 * to 100Khz since some DACs(direct attached cables) do 5673 * to 100Khz since some DACs(direct attached cables) do
5539 * not work at 400Khz. 5674 * not work at 400Khz.
5540 */ 5675 */
@@ -5557,6 +5692,26 @@ static u8 bnx2x_8727_config_init(struct bnx2x_phy *phy,
5557 phy->tx_preemphasis[1]); 5692 phy->tx_preemphasis[1]);
5558 } 5693 }
5559 5694
5695 /*
5696 * If TX Laser is controlled by GPIO_0, do not let PHY go into low
5697 * power mode, if TX Laser is disabled
5698 */
5699 tx_en_mode = REG_RD(bp, params->shmem_base +
5700 offsetof(struct shmem_region,
5701 dev_info.port_hw_config[params->port].sfp_ctrl))
5702 & PORT_HW_CFG_TX_LASER_MASK;
5703
5704 if (tx_en_mode == PORT_HW_CFG_TX_LASER_GPIO0) {
5705
5706 DP(NETIF_MSG_LINK, "Enabling TXONOFF_PWRDN_DIS\n");
5707 bnx2x_cl45_read(bp, phy,
5708 MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_OPT_CFG_REG, &tmp2);
5709 tmp2 |= 0x1000;
5710 tmp2 &= 0xFFEF;
5711 bnx2x_cl45_write(bp, phy,
5712 MDIO_PMA_DEVAD, MDIO_PMA_REG_8727_OPT_CFG_REG, tmp2);
5713 }
5714
5560 return 0; 5715 return 0;
5561} 5716}
5562 5717
@@ -5570,46 +5725,49 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
5570 port_feature_config[params->port]. 5725 port_feature_config[params->port].
5571 config)); 5726 config));
5572 bnx2x_cl45_read(bp, phy, 5727 bnx2x_cl45_read(bp, phy,
5573 MDIO_PMA_DEVAD, 5728 MDIO_PMA_DEVAD,
5574 MDIO_PMA_REG_PHY_IDENTIFIER, &mod_abs); 5729 MDIO_PMA_REG_PHY_IDENTIFIER, &mod_abs);
5575 if (mod_abs & (1<<8)) { 5730 if (mod_abs & (1<<8)) {
5576 5731
5577 /* Module is absent */ 5732 /* Module is absent */
5578 DP(NETIF_MSG_LINK, "MOD_ABS indication " 5733 DP(NETIF_MSG_LINK, "MOD_ABS indication "
5579 "show module is absent\n"); 5734 "show module is absent\n");
5580 5735
5581 /* 1. Set mod_abs to detect next module 5736 /*
5582 presence event 5737 * 1. Set mod_abs to detect next module
5583 2. Set EDC off by setting OPTXLOS signal input to low 5738 * presence event
5584 (bit 9). 5739 * 2. Set EDC off by setting OPTXLOS signal input to low
5585 When the EDC is off it locks onto a reference clock and 5740 * (bit 9).
5586 avoids becoming 'lost'.*/ 5741 * When the EDC is off it locks onto a reference clock and
5742 * avoids becoming 'lost'.
5743 */
5587 mod_abs &= ~(1<<8); 5744 mod_abs &= ~(1<<8);
5588 if (!(phy->flags & FLAGS_NOC)) 5745 if (!(phy->flags & FLAGS_NOC))
5589 mod_abs &= ~(1<<9); 5746 mod_abs &= ~(1<<9);
5590 bnx2x_cl45_write(bp, phy, 5747 bnx2x_cl45_write(bp, phy,
5591 MDIO_PMA_DEVAD, 5748 MDIO_PMA_DEVAD,
5592 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs); 5749 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs);
5593 5750
5594 /* Clear RX alarm since it stays up as long as 5751 /*
5595 the mod_abs wasn't changed */ 5752 * Clear RX alarm since it stays up as long as
5753 * the mod_abs wasn't changed
5754 */
5596 bnx2x_cl45_read(bp, phy, 5755 bnx2x_cl45_read(bp, phy,
5597 MDIO_PMA_DEVAD, 5756 MDIO_PMA_DEVAD,
5598 MDIO_PMA_REG_RX_ALARM, &rx_alarm_status); 5757 MDIO_PMA_REG_RX_ALARM, &rx_alarm_status);
5599 5758
5600 } else { 5759 } else {
5601 /* Module is present */ 5760 /* Module is present */
5602 DP(NETIF_MSG_LINK, "MOD_ABS indication " 5761 DP(NETIF_MSG_LINK, "MOD_ABS indication "
5603 "show module is present\n"); 5762 "show module is present\n");
5604 /* First thing, disable transmitter, 5763 /*
5605 and if the module is ok, the 5764 * First disable transmitter, and if the module is ok, the
5606 module_detection will enable it*/ 5765 * module_detection will enable it
5607 5766 * 1. Set mod_abs to detect next module absent event ( bit 8)
5608 /* 1. Set mod_abs to detect next module 5767 * 2. Restore the default polarity of the OPRXLOS signal and
5609 absent event ( bit 8) 5768 * this signal will then correctly indicate the presence or
5610 2. Restore the default polarity of the OPRXLOS signal and 5769 * absence of the Rx signal. (bit 9)
5611 this signal will then correctly indicate the presence or 5770 */
5612 absence of the Rx signal. (bit 9) */
5613 mod_abs |= (1<<8); 5771 mod_abs |= (1<<8);
5614 if (!(phy->flags & FLAGS_NOC)) 5772 if (!(phy->flags & FLAGS_NOC))
5615 mod_abs |= (1<<9); 5773 mod_abs |= (1<<9);
@@ -5617,10 +5775,12 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
5617 MDIO_PMA_DEVAD, 5775 MDIO_PMA_DEVAD,
5618 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs); 5776 MDIO_PMA_REG_PHY_IDENTIFIER, mod_abs);
5619 5777
5620 /* Clear RX alarm since it stays up as long as 5778 /*
5621 the mod_abs wasn't changed. This is need to be done 5779 * Clear RX alarm since it stays up as long as the mod_abs
5622 before calling the module detection, otherwise it will clear 5780 * wasn't changed. This is need to be done before calling the
5623 the link update alarm */ 5781 * module detection, otherwise it will clear* the link update
5782 * alarm
5783 */
5624 bnx2x_cl45_read(bp, phy, 5784 bnx2x_cl45_read(bp, phy,
5625 MDIO_PMA_DEVAD, 5785 MDIO_PMA_DEVAD,
5626 MDIO_PMA_REG_RX_ALARM, &rx_alarm_status); 5786 MDIO_PMA_REG_RX_ALARM, &rx_alarm_status);
@@ -5628,7 +5788,7 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
5628 5788
5629 if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) == 5789 if ((val & PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_MASK) ==
5630 PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER) 5790 PORT_FEAT_CFG_OPT_MDL_ENFRCMNT_DISABLE_TX_LASER)
5631 bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); 5791 bnx2x_sfp_set_transmitter(params, phy, 0);
5632 5792
5633 if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0) 5793 if (bnx2x_wait_for_sfp_module_initialized(phy, params) == 0)
5634 bnx2x_sfp_module_detection(phy, params); 5794 bnx2x_sfp_module_detection(phy, params);
@@ -5637,9 +5797,8 @@ static void bnx2x_8727_handle_mod_abs(struct bnx2x_phy *phy,
5637 } 5797 }
5638 5798
5639 DP(NETIF_MSG_LINK, "8727 RX_ALARM_STATUS 0x%x\n", 5799 DP(NETIF_MSG_LINK, "8727 RX_ALARM_STATUS 0x%x\n",
5640 rx_alarm_status); 5800 rx_alarm_status);
5641 /* No need to check link status in case of 5801 /* No need to check link status in case of module plugged in/out */
5642 module plugged in/out */
5643} 5802}
5644 5803
5645static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy, 5804static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
@@ -5675,7 +5834,7 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
5675 bnx2x_cl45_read(bp, phy, 5834 bnx2x_cl45_read(bp, phy,
5676 MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &val1); 5835 MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &val1);
5677 5836
5678 /** 5837 /*
5679 * If a module is present and there is need to check 5838 * If a module is present and there is need to check
5680 * for over current 5839 * for over current
5681 */ 5840 */
@@ -5695,12 +5854,8 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
5695 " Please remove the SFP+ module and" 5854 " Please remove the SFP+ module and"
5696 " restart the system to clear this" 5855 " restart the system to clear this"
5697 " error.\n", 5856 " error.\n",
5698 params->port); 5857 params->port);
5699 5858 /* Disable all RX_ALARMs except for mod_abs */
5700 /*
5701 * Disable all RX_ALARMs except for
5702 * mod_abs
5703 */
5704 bnx2x_cl45_write(bp, phy, 5859 bnx2x_cl45_write(bp, phy,
5705 MDIO_PMA_DEVAD, 5860 MDIO_PMA_DEVAD,
5706 MDIO_PMA_REG_RX_ALARM_CTRL, (1<<5)); 5861 MDIO_PMA_REG_RX_ALARM_CTRL, (1<<5));
@@ -5743,11 +5898,15 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
5743 MDIO_PMA_DEVAD, 5898 MDIO_PMA_DEVAD,
5744 MDIO_PMA_REG_8073_SPEED_LINK_STATUS, &link_status); 5899 MDIO_PMA_REG_8073_SPEED_LINK_STATUS, &link_status);
5745 5900
5746 /* Bits 0..2 --> speed detected, 5901 /*
5747 bits 13..15--> link is down */ 5902 * Bits 0..2 --> speed detected,
5903 * Bits 13..15--> link is down
5904 */
5748 if ((link_status & (1<<2)) && (!(link_status & (1<<15)))) { 5905 if ((link_status & (1<<2)) && (!(link_status & (1<<15)))) {
5749 link_up = 1; 5906 link_up = 1;
5750 vars->line_speed = SPEED_10000; 5907 vars->line_speed = SPEED_10000;
5908 DP(NETIF_MSG_LINK, "port %x: External link up in 10G\n",
5909 params->port);
5751 } else if ((link_status & (1<<0)) && (!(link_status & (1<<13)))) { 5910 } else if ((link_status & (1<<0)) && (!(link_status & (1<<13)))) {
5752 link_up = 1; 5911 link_up = 1;
5753 vars->line_speed = SPEED_1000; 5912 vars->line_speed = SPEED_1000;
@@ -5758,15 +5917,18 @@ static u8 bnx2x_8727_read_status(struct bnx2x_phy *phy,
5758 DP(NETIF_MSG_LINK, "port %x: External link is down\n", 5917 DP(NETIF_MSG_LINK, "port %x: External link is down\n",
5759 params->port); 5918 params->port);
5760 } 5919 }
5761 if (link_up) 5920 if (link_up) {
5762 bnx2x_ext_phy_resolve_fc(phy, params, vars); 5921 bnx2x_ext_phy_resolve_fc(phy, params, vars);
5922 vars->duplex = DUPLEX_FULL;
5923 DP(NETIF_MSG_LINK, "duplex = 0x%x\n", vars->duplex);
5924 }
5763 5925
5764 if ((DUAL_MEDIA(params)) && 5926 if ((DUAL_MEDIA(params)) &&
5765 (phy->req_line_speed == SPEED_1000)) { 5927 (phy->req_line_speed == SPEED_1000)) {
5766 bnx2x_cl45_read(bp, phy, 5928 bnx2x_cl45_read(bp, phy,
5767 MDIO_PMA_DEVAD, 5929 MDIO_PMA_DEVAD,
5768 MDIO_PMA_REG_8727_PCS_GP, &val1); 5930 MDIO_PMA_REG_8727_PCS_GP, &val1);
5769 /** 5931 /*
5770 * In case of dual-media board and 1G, power up the XAUI side, 5932 * In case of dual-media board and 1G, power up the XAUI side,
5771 * otherwise power it down. For 10G it is done automatically 5933 * otherwise power it down. For 10G it is done automatically
5772 */ 5934 */
@@ -5786,7 +5948,7 @@ static void bnx2x_8727_link_reset(struct bnx2x_phy *phy,
5786{ 5948{
5787 struct bnx2x *bp = params->bp; 5949 struct bnx2x *bp = params->bp;
5788 /* Disable Transmitter */ 5950 /* Disable Transmitter */
5789 bnx2x_sfp_set_transmitter(bp, phy, params->port, 0); 5951 bnx2x_sfp_set_transmitter(params, phy, 0);
5790 /* Clear LASI */ 5952 /* Clear LASI */
5791 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0); 5953 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0);
5792 5954
@@ -5798,19 +5960,23 @@ static void bnx2x_8727_link_reset(struct bnx2x_phy *phy,
5798static void bnx2x_save_848xx_spirom_version(struct bnx2x_phy *phy, 5960static void bnx2x_save_848xx_spirom_version(struct bnx2x_phy *phy,
5799 struct link_params *params) 5961 struct link_params *params)
5800{ 5962{
5801 u16 val, fw_ver1, fw_ver2, cnt; 5963 u16 val, fw_ver1, fw_ver2, cnt, adj;
5802 struct bnx2x *bp = params->bp; 5964 struct bnx2x *bp = params->bp;
5803 5965
5966 adj = 0;
5967 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833)
5968 adj = -1;
5969
5804 /* For the 32 bits registers in 848xx, access via MDIO2ARM interface.*/ 5970 /* For the 32 bits registers in 848xx, access via MDIO2ARM interface.*/
5805 /* (1) set register 0xc200_0014(SPI_BRIDGE_CTRL_2) to 0x03000000 */ 5971 /* (1) set register 0xc200_0014(SPI_BRIDGE_CTRL_2) to 0x03000000 */
5806 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0014); 5972 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819 + adj, 0x0014);
5807 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); 5973 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A + adj, 0xc200);
5808 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81B, 0x0000); 5974 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81B + adj, 0x0000);
5809 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81C, 0x0300); 5975 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81C + adj, 0x0300);
5810 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x0009); 5976 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817 + adj, 0x0009);
5811 5977
5812 for (cnt = 0; cnt < 100; cnt++) { 5978 for (cnt = 0; cnt < 100; cnt++) {
5813 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818, &val); 5979 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818 + adj, &val);
5814 if (val & 1) 5980 if (val & 1)
5815 break; 5981 break;
5816 udelay(5); 5982 udelay(5);
@@ -5824,11 +5990,11 @@ static void bnx2x_save_848xx_spirom_version(struct bnx2x_phy *phy,
5824 5990
5825 5991
5826 /* 2) read register 0xc200_0000 (SPI_FW_STATUS) */ 5992 /* 2) read register 0xc200_0000 (SPI_FW_STATUS) */
5827 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0000); 5993 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819 + adj, 0x0000);
5828 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); 5994 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A + adj, 0xc200);
5829 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x000A); 5995 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817 + adj, 0x000A);
5830 for (cnt = 0; cnt < 100; cnt++) { 5996 for (cnt = 0; cnt < 100; cnt++) {
5831 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818, &val); 5997 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818 + adj, &val);
5832 if (val & 1) 5998 if (val & 1)
5833 break; 5999 break;
5834 udelay(5); 6000 udelay(5);
@@ -5841,9 +6007,9 @@ static void bnx2x_save_848xx_spirom_version(struct bnx2x_phy *phy,
5841 } 6007 }
5842 6008
5843 /* lower 16 bits of the register SPI_FW_STATUS */ 6009 /* lower 16 bits of the register SPI_FW_STATUS */
5844 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81B, &fw_ver1); 6010 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81B + adj, &fw_ver1);
5845 /* upper 16 bits of register SPI_FW_STATUS */ 6011 /* upper 16 bits of register SPI_FW_STATUS */
5846 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81C, &fw_ver2); 6012 bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81C + adj, &fw_ver2);
5847 6013
5848 bnx2x_save_spirom_version(bp, params->port, (fw_ver2<<16) | fw_ver1, 6014 bnx2x_save_spirom_version(bp, params->port, (fw_ver2<<16) | fw_ver1,
5849 phy->ver_addr); 6015 phy->ver_addr);
@@ -5852,33 +6018,53 @@ static void bnx2x_save_848xx_spirom_version(struct bnx2x_phy *phy,
5852static void bnx2x_848xx_set_led(struct bnx2x *bp, 6018static void bnx2x_848xx_set_led(struct bnx2x *bp,
5853 struct bnx2x_phy *phy) 6019 struct bnx2x_phy *phy)
5854{ 6020{
5855 u16 val; 6021 u16 val, adj;
6022
6023 adj = 0;
6024 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833)
6025 adj = -1;
5856 6026
5857 /* PHYC_CTL_LED_CTL */ 6027 /* PHYC_CTL_LED_CTL */
5858 bnx2x_cl45_read(bp, phy, 6028 bnx2x_cl45_read(bp, phy,
5859 MDIO_PMA_DEVAD, 6029 MDIO_PMA_DEVAD,
5860 MDIO_PMA_REG_8481_LINK_SIGNAL, &val); 6030 MDIO_PMA_REG_8481_LINK_SIGNAL + adj, &val);
5861 val &= 0xFE00; 6031 val &= 0xFE00;
5862 val |= 0x0092; 6032 val |= 0x0092;
5863 6033
5864 bnx2x_cl45_write(bp, phy, 6034 bnx2x_cl45_write(bp, phy,
5865 MDIO_PMA_DEVAD, 6035 MDIO_PMA_DEVAD,
5866 MDIO_PMA_REG_8481_LINK_SIGNAL, val); 6036 MDIO_PMA_REG_8481_LINK_SIGNAL + adj, val);
5867 6037
5868 bnx2x_cl45_write(bp, phy, 6038 bnx2x_cl45_write(bp, phy,
5869 MDIO_PMA_DEVAD, 6039 MDIO_PMA_DEVAD,
5870 MDIO_PMA_REG_8481_LED1_MASK, 6040 MDIO_PMA_REG_8481_LED1_MASK + adj,
5871 0x80); 6041 0x80);
5872 6042
5873 bnx2x_cl45_write(bp, phy, 6043 bnx2x_cl45_write(bp, phy,
5874 MDIO_PMA_DEVAD, 6044 MDIO_PMA_DEVAD,
5875 MDIO_PMA_REG_8481_LED2_MASK, 6045 MDIO_PMA_REG_8481_LED2_MASK + adj,
5876 0x18); 6046 0x18);
5877 6047
6048 /* Select activity source by Tx and Rx, as suggested by PHY AE */
5878 bnx2x_cl45_write(bp, phy, 6049 bnx2x_cl45_write(bp, phy,
5879 MDIO_PMA_DEVAD, 6050 MDIO_PMA_DEVAD,
5880 MDIO_PMA_REG_8481_LED3_MASK, 6051 MDIO_PMA_REG_8481_LED3_MASK + adj,
5881 0x0040); 6052 0x0006);
6053
6054 /* Select the closest activity blink rate to that in 10/100/1000 */
6055 bnx2x_cl45_write(bp, phy,
6056 MDIO_PMA_DEVAD,
6057 MDIO_PMA_REG_8481_LED3_BLINK + adj,
6058 0);
6059
6060 bnx2x_cl45_read(bp, phy,
6061 MDIO_PMA_DEVAD,
6062 MDIO_PMA_REG_84823_CTL_LED_CTL_1 + adj, &val);
6063 val |= MDIO_PMA_REG_84823_LED3_STRETCH_EN; /* stretch_en for LED3*/
6064
6065 bnx2x_cl45_write(bp, phy,
6066 MDIO_PMA_DEVAD,
6067 MDIO_PMA_REG_84823_CTL_LED_CTL_1 + adj, val);
5882 6068
5883 /* 'Interrupt Mask' */ 6069 /* 'Interrupt Mask' */
5884 bnx2x_cl45_write(bp, phy, 6070 bnx2x_cl45_write(bp, phy,
@@ -5892,7 +6078,11 @@ static u8 bnx2x_848xx_cmn_config_init(struct bnx2x_phy *phy,
5892{ 6078{
5893 struct bnx2x *bp = params->bp; 6079 struct bnx2x *bp = params->bp;
5894 u16 autoneg_val, an_1000_val, an_10_100_val; 6080 u16 autoneg_val, an_1000_val, an_10_100_val;
5895 6081 /*
6082 * This phy uses the NIG latch mechanism since link indication
6083 * arrives through its LED4 and not via its LASI signal, so we
6084 * get steady signal instead of clear on read
6085 */
5896 bnx2x_bits_en(bp, NIG_REG_LATCH_BC_0 + params->port*4, 6086 bnx2x_bits_en(bp, NIG_REG_LATCH_BC_0 + params->port*4,
5897 1 << NIG_LATCH_BC_ENABLE_MI_INT); 6087 1 << NIG_LATCH_BC_ENABLE_MI_INT);
5898 6088
@@ -6017,11 +6207,11 @@ static u8 bnx2x_8481_config_init(struct bnx2x_phy *phy,
6017 struct bnx2x *bp = params->bp; 6207 struct bnx2x *bp = params->bp;
6018 /* Restore normal power mode*/ 6208 /* Restore normal power mode*/
6019 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 6209 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
6020 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); 6210 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);
6021 6211
6022 /* HW reset */ 6212 /* HW reset */
6023 bnx2x_ext_phy_hw_reset(bp, params->port); 6213 bnx2x_ext_phy_hw_reset(bp, params->port);
6024 bnx2x_wait_reset_complete(bp, phy); 6214 bnx2x_wait_reset_complete(bp, phy, params);
6025 6215
6026 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15); 6216 bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15);
6027 return bnx2x_848xx_cmn_config_init(phy, params, vars); 6217 return bnx2x_848xx_cmn_config_init(phy, params, vars);
@@ -6033,12 +6223,15 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy,
6033{ 6223{
6034 struct bnx2x *bp = params->bp; 6224 struct bnx2x *bp = params->bp;
6035 u8 port, initialize = 1; 6225 u8 port, initialize = 1;
6036 u16 val; 6226 u16 val, adj;
6037 u16 temp; 6227 u16 temp;
6038 u32 actual_phy_selection; 6228 u32 actual_phy_selection, cms_enable;
6039 u8 rc = 0; 6229 u8 rc = 0;
6040 6230
6041 /* This is just for MDIO_CTL_REG_84823_MEDIA register. */ 6231 /* This is just for MDIO_CTL_REG_84823_MEDIA register. */
6232 adj = 0;
6233 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833)
6234 adj = 3;
6042 6235
6043 msleep(1); 6236 msleep(1);
6044 if (CHIP_IS_E2(bp)) 6237 if (CHIP_IS_E2(bp))
@@ -6048,11 +6241,12 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy,
6048 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, 6241 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3,
6049 MISC_REGISTERS_GPIO_OUTPUT_HIGH, 6242 MISC_REGISTERS_GPIO_OUTPUT_HIGH,
6050 port); 6243 port);
6051 bnx2x_wait_reset_complete(bp, phy); 6244 bnx2x_wait_reset_complete(bp, phy, params);
6052 /* Wait for GPHY to come out of reset */ 6245 /* Wait for GPHY to come out of reset */
6053 msleep(50); 6246 msleep(50);
6054 /* BCM84823 requires that XGXS links up first @ 10G for normal 6247 /*
6055 behavior */ 6248 * BCM84823 requires that XGXS links up first @ 10G for normal behavior
6249 */
6056 temp = vars->line_speed; 6250 temp = vars->line_speed;
6057 vars->line_speed = SPEED_10000; 6251 vars->line_speed = SPEED_10000;
6058 bnx2x_set_autoneg(&params->phy[INT_PHY], params, vars, 0); 6252 bnx2x_set_autoneg(&params->phy[INT_PHY], params, vars, 0);
@@ -6062,7 +6256,7 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy,
6062 /* Set dual-media configuration according to configuration */ 6256 /* Set dual-media configuration according to configuration */
6063 6257
6064 bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, 6258 bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD,
6065 MDIO_CTL_REG_84823_MEDIA, &val); 6259 MDIO_CTL_REG_84823_MEDIA + adj, &val);
6066 val &= ~(MDIO_CTL_REG_84823_MEDIA_MAC_MASK | 6260 val &= ~(MDIO_CTL_REG_84823_MEDIA_MAC_MASK |
6067 MDIO_CTL_REG_84823_MEDIA_LINE_MASK | 6261 MDIO_CTL_REG_84823_MEDIA_LINE_MASK |
6068 MDIO_CTL_REG_84823_MEDIA_COPPER_CORE_DOWN | 6262 MDIO_CTL_REG_84823_MEDIA_COPPER_CORE_DOWN |
@@ -6095,7 +6289,7 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy,
6095 val |= MDIO_CTL_REG_84823_MEDIA_FIBER_1G; 6289 val |= MDIO_CTL_REG_84823_MEDIA_FIBER_1G;
6096 6290
6097 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD, 6291 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD,
6098 MDIO_CTL_REG_84823_MEDIA, val); 6292 MDIO_CTL_REG_84823_MEDIA + adj, val);
6099 DP(NETIF_MSG_LINK, "Multi_phy config = 0x%x, Media control = 0x%x\n", 6293 DP(NETIF_MSG_LINK, "Multi_phy config = 0x%x, Media control = 0x%x\n",
6100 params->multi_phy_config, val); 6294 params->multi_phy_config, val);
6101 6295
@@ -6103,29 +6297,50 @@ static u8 bnx2x_848x3_config_init(struct bnx2x_phy *phy,
6103 rc = bnx2x_848xx_cmn_config_init(phy, params, vars); 6297 rc = bnx2x_848xx_cmn_config_init(phy, params, vars);
6104 else 6298 else
6105 bnx2x_save_848xx_spirom_version(phy, params); 6299 bnx2x_save_848xx_spirom_version(phy, params);
6300 cms_enable = REG_RD(bp, params->shmem_base +
6301 offsetof(struct shmem_region,
6302 dev_info.port_hw_config[params->port].default_cfg)) &
6303 PORT_HW_CFG_ENABLE_CMS_MASK;
6304
6305 bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD,
6306 MDIO_CTL_REG_84823_USER_CTRL_REG, &val);
6307 if (cms_enable)
6308 val |= MDIO_CTL_REG_84823_USER_CTRL_CMS;
6309 else
6310 val &= ~MDIO_CTL_REG_84823_USER_CTRL_CMS;
6311 bnx2x_cl45_write(bp, phy, MDIO_CTL_DEVAD,
6312 MDIO_CTL_REG_84823_USER_CTRL_REG, val);
6313
6314
6106 return rc; 6315 return rc;
6107} 6316}
6108 6317
6109static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy, 6318static u8 bnx2x_848xx_read_status(struct bnx2x_phy *phy,
6110 struct link_params *params, 6319 struct link_params *params,
6111 struct link_vars *vars) 6320 struct link_vars *vars)
6112{ 6321{
6113 struct bnx2x *bp = params->bp; 6322 struct bnx2x *bp = params->bp;
6114 u16 val, val1, val2; 6323 u16 val, val1, val2, adj;
6115 u8 link_up = 0; 6324 u8 link_up = 0;
6116 6325
6326 /* Reg offset adjustment for 84833 */
6327 adj = 0;
6328 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833)
6329 adj = -1;
6330
6117 /* Check 10G-BaseT link status */ 6331 /* Check 10G-BaseT link status */
6118 /* Check PMD signal ok */ 6332 /* Check PMD signal ok */
6119 bnx2x_cl45_read(bp, phy, 6333 bnx2x_cl45_read(bp, phy,
6120 MDIO_AN_DEVAD, 0xFFFA, &val1); 6334 MDIO_AN_DEVAD, 0xFFFA, &val1);
6121 bnx2x_cl45_read(bp, phy, 6335 bnx2x_cl45_read(bp, phy,
6122 MDIO_PMA_DEVAD, MDIO_PMA_REG_8481_PMD_SIGNAL, 6336 MDIO_PMA_DEVAD, MDIO_PMA_REG_8481_PMD_SIGNAL + adj,
6123 &val2); 6337 &val2);
6124 DP(NETIF_MSG_LINK, "BCM848xx: PMD_SIGNAL 1.a811 = 0x%x\n", val2); 6338 DP(NETIF_MSG_LINK, "BCM848xx: PMD_SIGNAL 1.a811 = 0x%x\n", val2);
6125 6339
6126 /* Check link 10G */ 6340 /* Check link 10G */
6127 if (val2 & (1<<11)) { 6341 if (val2 & (1<<11)) {
6128 vars->line_speed = SPEED_10000; 6342 vars->line_speed = SPEED_10000;
6343 vars->duplex = DUPLEX_FULL;
6129 link_up = 1; 6344 link_up = 1;
6130 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars); 6345 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
6131 } else { /* Check Legacy speed link */ 6346 } else { /* Check Legacy speed link */
@@ -6203,9 +6418,9 @@ static void bnx2x_8481_hw_reset(struct bnx2x_phy *phy,
6203 struct link_params *params) 6418 struct link_params *params)
6204{ 6419{
6205 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, 6420 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1,
6206 MISC_REGISTERS_GPIO_OUTPUT_LOW, 0); 6421 MISC_REGISTERS_GPIO_OUTPUT_LOW, 0);
6207 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, 6422 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1,
6208 MISC_REGISTERS_GPIO_OUTPUT_LOW, 1); 6423 MISC_REGISTERS_GPIO_OUTPUT_LOW, 1);
6209} 6424}
6210 6425
6211static void bnx2x_8481_link_reset(struct bnx2x_phy *phy, 6426static void bnx2x_8481_link_reset(struct bnx2x_phy *phy,
@@ -6227,8 +6442,8 @@ static void bnx2x_848x3_link_reset(struct bnx2x_phy *phy,
6227 else 6442 else
6228 port = params->port; 6443 port = params->port;
6229 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3, 6444 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_3,
6230 MISC_REGISTERS_GPIO_OUTPUT_LOW, 6445 MISC_REGISTERS_GPIO_OUTPUT_LOW,
6231 port); 6446 port);
6232} 6447}
6233 6448
6234static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, 6449static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
@@ -6283,24 +6498,24 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
6283 6498
6284 /* Set LED masks */ 6499 /* Set LED masks */
6285 bnx2x_cl45_write(bp, phy, 6500 bnx2x_cl45_write(bp, phy,
6286 MDIO_PMA_DEVAD, 6501 MDIO_PMA_DEVAD,
6287 MDIO_PMA_REG_8481_LED1_MASK, 6502 MDIO_PMA_REG_8481_LED1_MASK,
6288 0x0); 6503 0x0);
6289 6504
6290 bnx2x_cl45_write(bp, phy, 6505 bnx2x_cl45_write(bp, phy,
6291 MDIO_PMA_DEVAD, 6506 MDIO_PMA_DEVAD,
6292 MDIO_PMA_REG_8481_LED2_MASK, 6507 MDIO_PMA_REG_8481_LED2_MASK,
6293 0x0); 6508 0x0);
6294 6509
6295 bnx2x_cl45_write(bp, phy, 6510 bnx2x_cl45_write(bp, phy,
6296 MDIO_PMA_DEVAD, 6511 MDIO_PMA_DEVAD,
6297 MDIO_PMA_REG_8481_LED3_MASK, 6512 MDIO_PMA_REG_8481_LED3_MASK,
6298 0x0); 6513 0x0);
6299 6514
6300 bnx2x_cl45_write(bp, phy, 6515 bnx2x_cl45_write(bp, phy,
6301 MDIO_PMA_DEVAD, 6516 MDIO_PMA_DEVAD,
6302 MDIO_PMA_REG_8481_LED5_MASK, 6517 MDIO_PMA_REG_8481_LED5_MASK,
6303 0x20); 6518 0x20);
6304 6519
6305 } else { 6520 } else {
6306 bnx2x_cl45_write(bp, phy, 6521 bnx2x_cl45_write(bp, phy,
@@ -6324,35 +6539,35 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
6324 val |= 0x2492; 6539 val |= 0x2492;
6325 6540
6326 bnx2x_cl45_write(bp, phy, 6541 bnx2x_cl45_write(bp, phy,
6327 MDIO_PMA_DEVAD, 6542 MDIO_PMA_DEVAD,
6328 MDIO_PMA_REG_8481_LINK_SIGNAL, 6543 MDIO_PMA_REG_8481_LINK_SIGNAL,
6329 val); 6544 val);
6330 6545
6331 /* Set LED masks */ 6546 /* Set LED masks */
6332 bnx2x_cl45_write(bp, phy, 6547 bnx2x_cl45_write(bp, phy,
6333 MDIO_PMA_DEVAD, 6548 MDIO_PMA_DEVAD,
6334 MDIO_PMA_REG_8481_LED1_MASK, 6549 MDIO_PMA_REG_8481_LED1_MASK,
6335 0x0); 6550 0x0);
6336 6551
6337 bnx2x_cl45_write(bp, phy, 6552 bnx2x_cl45_write(bp, phy,
6338 MDIO_PMA_DEVAD, 6553 MDIO_PMA_DEVAD,
6339 MDIO_PMA_REG_8481_LED2_MASK, 6554 MDIO_PMA_REG_8481_LED2_MASK,
6340 0x20); 6555 0x20);
6341 6556
6342 bnx2x_cl45_write(bp, phy, 6557 bnx2x_cl45_write(bp, phy,
6343 MDIO_PMA_DEVAD, 6558 MDIO_PMA_DEVAD,
6344 MDIO_PMA_REG_8481_LED3_MASK, 6559 MDIO_PMA_REG_8481_LED3_MASK,
6345 0x20); 6560 0x20);
6346 6561
6347 bnx2x_cl45_write(bp, phy, 6562 bnx2x_cl45_write(bp, phy,
6348 MDIO_PMA_DEVAD, 6563 MDIO_PMA_DEVAD,
6349 MDIO_PMA_REG_8481_LED5_MASK, 6564 MDIO_PMA_REG_8481_LED5_MASK,
6350 0x0); 6565 0x0);
6351 } else { 6566 } else {
6352 bnx2x_cl45_write(bp, phy, 6567 bnx2x_cl45_write(bp, phy,
6353 MDIO_PMA_DEVAD, 6568 MDIO_PMA_DEVAD,
6354 MDIO_PMA_REG_8481_LED1_MASK, 6569 MDIO_PMA_REG_8481_LED1_MASK,
6355 0x20); 6570 0x20);
6356 } 6571 }
6357 break; 6572 break;
6358 6573
@@ -6370,9 +6585,9 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
6370 &val); 6585 &val);
6371 6586
6372 if (!((val & 6587 if (!((val &
6373 MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_MASK) 6588 MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_MASK)
6374 >> MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_SHIFT)){ 6589 >> MDIO_PMA_REG_8481_LINK_SIGNAL_LED4_ENABLE_SHIFT)) {
6375 DP(NETIF_MSG_LINK, "Seting LINK_SIGNAL\n"); 6590 DP(NETIF_MSG_LINK, "Setting LINK_SIGNAL\n");
6376 bnx2x_cl45_write(bp, phy, 6591 bnx2x_cl45_write(bp, phy,
6377 MDIO_PMA_DEVAD, 6592 MDIO_PMA_DEVAD,
6378 MDIO_PMA_REG_8481_LINK_SIGNAL, 6593 MDIO_PMA_REG_8481_LINK_SIGNAL,
@@ -6381,30 +6596,42 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy,
6381 6596
6382 /* Set LED masks */ 6597 /* Set LED masks */
6383 bnx2x_cl45_write(bp, phy, 6598 bnx2x_cl45_write(bp, phy,
6384 MDIO_PMA_DEVAD, 6599 MDIO_PMA_DEVAD,
6385 MDIO_PMA_REG_8481_LED1_MASK, 6600 MDIO_PMA_REG_8481_LED1_MASK,
6386 0x10); 6601 0x10);
6387 6602
6388 bnx2x_cl45_write(bp, phy, 6603 bnx2x_cl45_write(bp, phy,
6389 MDIO_PMA_DEVAD, 6604 MDIO_PMA_DEVAD,
6390 MDIO_PMA_REG_8481_LED2_MASK, 6605 MDIO_PMA_REG_8481_LED2_MASK,
6391 0x80); 6606 0x80);
6392 6607
6393 bnx2x_cl45_write(bp, phy, 6608 bnx2x_cl45_write(bp, phy,
6394 MDIO_PMA_DEVAD, 6609 MDIO_PMA_DEVAD,
6395 MDIO_PMA_REG_8481_LED3_MASK, 6610 MDIO_PMA_REG_8481_LED3_MASK,
6396 0x98); 6611 0x98);
6397 6612
6398 bnx2x_cl45_write(bp, phy, 6613 bnx2x_cl45_write(bp, phy,
6399 MDIO_PMA_DEVAD, 6614 MDIO_PMA_DEVAD,
6400 MDIO_PMA_REG_8481_LED5_MASK, 6615 MDIO_PMA_REG_8481_LED5_MASK,
6401 0x40); 6616 0x40);
6402 6617
6403 } else { 6618 } else {
6404 bnx2x_cl45_write(bp, phy, 6619 bnx2x_cl45_write(bp, phy,
6405 MDIO_PMA_DEVAD, 6620 MDIO_PMA_DEVAD,
6406 MDIO_PMA_REG_8481_LED1_MASK, 6621 MDIO_PMA_REG_8481_LED1_MASK,
6407 0x80); 6622 0x80);
6623
6624 /* Tell LED3 to blink on source */
6625 bnx2x_cl45_read(bp, phy,
6626 MDIO_PMA_DEVAD,
6627 MDIO_PMA_REG_8481_LINK_SIGNAL,
6628 &val);
6629 val &= ~(7<<6);
6630 val |= (1<<6); /* A83B[8:6]= 1 */
6631 bnx2x_cl45_write(bp, phy,
6632 MDIO_PMA_DEVAD,
6633 MDIO_PMA_REG_8481_LINK_SIGNAL,
6634 val);
6408 } 6635 }
6409 break; 6636 break;
6410 } 6637 }
@@ -6431,10 +6658,10 @@ static u8 bnx2x_7101_config_init(struct bnx2x_phy *phy,
6431 6658
6432 /* Restore normal power mode*/ 6659 /* Restore normal power mode*/
6433 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 6660 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
6434 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port); 6661 MISC_REGISTERS_GPIO_OUTPUT_HIGH, params->port);
6435 /* HW reset */ 6662 /* HW reset */
6436 bnx2x_ext_phy_hw_reset(bp, params->port); 6663 bnx2x_ext_phy_hw_reset(bp, params->port);
6437 bnx2x_wait_reset_complete(bp, phy); 6664 bnx2x_wait_reset_complete(bp, phy, params);
6438 6665
6439 bnx2x_cl45_write(bp, phy, 6666 bnx2x_cl45_write(bp, phy,
6440 MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x1); 6667 MDIO_PMA_DEVAD, MDIO_PMA_REG_LASI_CTRL, 0x1);
@@ -6481,14 +6708,13 @@ static u8 bnx2x_7101_read_status(struct bnx2x_phy *phy,
6481 DP(NETIF_MSG_LINK, "10G-base-T PMA status 0x%x->0x%x\n", 6708 DP(NETIF_MSG_LINK, "10G-base-T PMA status 0x%x->0x%x\n",
6482 val2, val1); 6709 val2, val1);
6483 link_up = ((val1 & 4) == 4); 6710 link_up = ((val1 & 4) == 4);
6484 /* if link is up 6711 /* if link is up print the AN outcome of the SFX7101 PHY */
6485 * print the AN outcome of the SFX7101 PHY
6486 */
6487 if (link_up) { 6712 if (link_up) {
6488 bnx2x_cl45_read(bp, phy, 6713 bnx2x_cl45_read(bp, phy,
6489 MDIO_AN_DEVAD, MDIO_AN_REG_MASTER_STATUS, 6714 MDIO_AN_DEVAD, MDIO_AN_REG_MASTER_STATUS,
6490 &val2); 6715 &val2);
6491 vars->line_speed = SPEED_10000; 6716 vars->line_speed = SPEED_10000;
6717 vars->duplex = DUPLEX_FULL;
6492 DP(NETIF_MSG_LINK, "SFX7101 AN status 0x%x->Master=%x\n", 6718 DP(NETIF_MSG_LINK, "SFX7101 AN status 0x%x->Master=%x\n",
6493 val2, (val2 & (1<<14))); 6719 val2, (val2 & (1<<14)));
6494 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars); 6720 bnx2x_ext_phy_10G_an_resolve(bp, phy, vars);
@@ -6516,20 +6742,20 @@ void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy)
6516 u16 val, cnt; 6742 u16 val, cnt;
6517 6743
6518 bnx2x_cl45_read(bp, phy, 6744 bnx2x_cl45_read(bp, phy,
6519 MDIO_PMA_DEVAD, 6745 MDIO_PMA_DEVAD,
6520 MDIO_PMA_REG_7101_RESET, &val); 6746 MDIO_PMA_REG_7101_RESET, &val);
6521 6747
6522 for (cnt = 0; cnt < 10; cnt++) { 6748 for (cnt = 0; cnt < 10; cnt++) {
6523 msleep(50); 6749 msleep(50);
6524 /* Writes a self-clearing reset */ 6750 /* Writes a self-clearing reset */
6525 bnx2x_cl45_write(bp, phy, 6751 bnx2x_cl45_write(bp, phy,
6526 MDIO_PMA_DEVAD, 6752 MDIO_PMA_DEVAD,
6527 MDIO_PMA_REG_7101_RESET, 6753 MDIO_PMA_REG_7101_RESET,
6528 (val | (1<<15))); 6754 (val | (1<<15)));
6529 /* Wait for clear */ 6755 /* Wait for clear */
6530 bnx2x_cl45_read(bp, phy, 6756 bnx2x_cl45_read(bp, phy,
6531 MDIO_PMA_DEVAD, 6757 MDIO_PMA_DEVAD,
6532 MDIO_PMA_REG_7101_RESET, &val); 6758 MDIO_PMA_REG_7101_RESET, &val);
6533 6759
6534 if ((val & (1<<15)) == 0) 6760 if ((val & (1<<15)) == 0)
6535 break; 6761 break;
@@ -6540,10 +6766,10 @@ static void bnx2x_7101_hw_reset(struct bnx2x_phy *phy,
6540 struct link_params *params) { 6766 struct link_params *params) {
6541 /* Low power mode is controlled by GPIO 2 */ 6767 /* Low power mode is controlled by GPIO 2 */
6542 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_2, 6768 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_2,
6543 MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); 6769 MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port);
6544 /* The PHY reset is controlled by GPIO 1 */ 6770 /* The PHY reset is controlled by GPIO 1 */
6545 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1, 6771 bnx2x_set_gpio(params->bp, MISC_REGISTERS_GPIO_1,
6546 MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port); 6772 MISC_REGISTERS_GPIO_OUTPUT_LOW, params->port);
6547} 6773}
6548 6774
6549static void bnx2x_7101_set_link_led(struct bnx2x_phy *phy, 6775static void bnx2x_7101_set_link_led(struct bnx2x_phy *phy,
@@ -6585,9 +6811,9 @@ static struct bnx2x_phy phy_null = {
6585 .supported = 0, 6811 .supported = 0,
6586 .media_type = ETH_PHY_NOT_PRESENT, 6812 .media_type = ETH_PHY_NOT_PRESENT,
6587 .ver_addr = 0, 6813 .ver_addr = 0,
6588 .req_flow_ctrl = 0, 6814 .req_flow_ctrl = 0,
6589 .req_line_speed = 0, 6815 .req_line_speed = 0,
6590 .speed_cap_mask = 0, 6816 .speed_cap_mask = 0,
6591 .req_duplex = 0, 6817 .req_duplex = 0,
6592 .rsrv = 0, 6818 .rsrv = 0,
6593 .config_init = (config_init_t)NULL, 6819 .config_init = (config_init_t)NULL,
@@ -6622,8 +6848,8 @@ static struct bnx2x_phy phy_serdes = {
6622 .media_type = ETH_PHY_UNSPECIFIED, 6848 .media_type = ETH_PHY_UNSPECIFIED,
6623 .ver_addr = 0, 6849 .ver_addr = 0,
6624 .req_flow_ctrl = 0, 6850 .req_flow_ctrl = 0,
6625 .req_line_speed = 0, 6851 .req_line_speed = 0,
6626 .speed_cap_mask = 0, 6852 .speed_cap_mask = 0,
6627 .req_duplex = 0, 6853 .req_duplex = 0,
6628 .rsrv = 0, 6854 .rsrv = 0,
6629 .config_init = (config_init_t)bnx2x_init_serdes, 6855 .config_init = (config_init_t)bnx2x_init_serdes,
@@ -6659,8 +6885,8 @@ static struct bnx2x_phy phy_xgxs = {
6659 .media_type = ETH_PHY_UNSPECIFIED, 6885 .media_type = ETH_PHY_UNSPECIFIED,
6660 .ver_addr = 0, 6886 .ver_addr = 0,
6661 .req_flow_ctrl = 0, 6887 .req_flow_ctrl = 0,
6662 .req_line_speed = 0, 6888 .req_line_speed = 0,
6663 .speed_cap_mask = 0, 6889 .speed_cap_mask = 0,
6664 .req_duplex = 0, 6890 .req_duplex = 0,
6665 .rsrv = 0, 6891 .rsrv = 0,
6666 .config_init = (config_init_t)bnx2x_init_xgxs, 6892 .config_init = (config_init_t)bnx2x_init_xgxs,
@@ -6690,8 +6916,8 @@ static struct bnx2x_phy phy_7101 = {
6690 .media_type = ETH_PHY_BASE_T, 6916 .media_type = ETH_PHY_BASE_T,
6691 .ver_addr = 0, 6917 .ver_addr = 0,
6692 .req_flow_ctrl = 0, 6918 .req_flow_ctrl = 0,
6693 .req_line_speed = 0, 6919 .req_line_speed = 0,
6694 .speed_cap_mask = 0, 6920 .speed_cap_mask = 0,
6695 .req_duplex = 0, 6921 .req_duplex = 0,
6696 .rsrv = 0, 6922 .rsrv = 0,
6697 .config_init = (config_init_t)bnx2x_7101_config_init, 6923 .config_init = (config_init_t)bnx2x_7101_config_init,
@@ -6721,9 +6947,9 @@ static struct bnx2x_phy phy_8073 = {
6721 SUPPORTED_Asym_Pause), 6947 SUPPORTED_Asym_Pause),
6722 .media_type = ETH_PHY_UNSPECIFIED, 6948 .media_type = ETH_PHY_UNSPECIFIED,
6723 .ver_addr = 0, 6949 .ver_addr = 0,
6724 .req_flow_ctrl = 0, 6950 .req_flow_ctrl = 0,
6725 .req_line_speed = 0, 6951 .req_line_speed = 0,
6726 .speed_cap_mask = 0, 6952 .speed_cap_mask = 0,
6727 .req_duplex = 0, 6953 .req_duplex = 0,
6728 .rsrv = 0, 6954 .rsrv = 0,
6729 .config_init = (config_init_t)bnx2x_8073_config_init, 6955 .config_init = (config_init_t)bnx2x_8073_config_init,
@@ -6932,6 +7158,43 @@ static struct bnx2x_phy phy_84823 = {
6932 .phy_specific_func = (phy_specific_func_t)NULL 7158 .phy_specific_func = (phy_specific_func_t)NULL
6933}; 7159};
6934 7160
7161static struct bnx2x_phy phy_84833 = {
7162 .type = PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833,
7163 .addr = 0xff,
7164 .flags = FLAGS_FAN_FAILURE_DET_REQ |
7165 FLAGS_REARM_LATCH_SIGNAL,
7166 .def_md_devad = 0,
7167 .reserved = 0,
7168 .rx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
7169 .tx_preemphasis = {0xffff, 0xffff, 0xffff, 0xffff},
7170 .mdio_ctrl = 0,
7171 .supported = (SUPPORTED_10baseT_Half |
7172 SUPPORTED_10baseT_Full |
7173 SUPPORTED_100baseT_Half |
7174 SUPPORTED_100baseT_Full |
7175 SUPPORTED_1000baseT_Full |
7176 SUPPORTED_10000baseT_Full |
7177 SUPPORTED_TP |
7178 SUPPORTED_Autoneg |
7179 SUPPORTED_Pause |
7180 SUPPORTED_Asym_Pause),
7181 .media_type = ETH_PHY_BASE_T,
7182 .ver_addr = 0,
7183 .req_flow_ctrl = 0,
7184 .req_line_speed = 0,
7185 .speed_cap_mask = 0,
7186 .req_duplex = 0,
7187 .rsrv = 0,
7188 .config_init = (config_init_t)bnx2x_848x3_config_init,
7189 .read_status = (read_status_t)bnx2x_848xx_read_status,
7190 .link_reset = (link_reset_t)bnx2x_848x3_link_reset,
7191 .config_loopback = (config_loopback_t)NULL,
7192 .format_fw_ver = (format_fw_ver_t)bnx2x_848xx_format_ver,
7193 .hw_reset = (hw_reset_t)NULL,
7194 .set_link_led = (set_link_led_t)bnx2x_848xx_set_link_led,
7195 .phy_specific_func = (phy_specific_func_t)NULL
7196};
7197
6935/*****************************************************************/ 7198/*****************************************************************/
6936/* */ 7199/* */
6937/* Populate the phy according. Main function: bnx2x_populate_phy */ 7200/* Populate the phy according. Main function: bnx2x_populate_phy */
@@ -6945,7 +7208,7 @@ static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,
6945 /* Get the 4 lanes xgxs config rx and tx */ 7208 /* Get the 4 lanes xgxs config rx and tx */
6946 u32 rx = 0, tx = 0, i; 7209 u32 rx = 0, tx = 0, i;
6947 for (i = 0; i < 2; i++) { 7210 for (i = 0; i < 2; i++) {
6948 /** 7211 /*
6949 * INT_PHY and EXT_PHY1 share the same value location in the 7212 * INT_PHY and EXT_PHY1 share the same value location in the
6950 * shmem. When num_phys is greater than 1, than this value 7213 * shmem. When num_phys is greater than 1, than this value
6951 * applies only to EXT_PHY1 7214 * applies only to EXT_PHY1
@@ -6953,19 +7216,19 @@ static void bnx2x_populate_preemphasis(struct bnx2x *bp, u32 shmem_base,
6953 if (phy_index == INT_PHY || phy_index == EXT_PHY1) { 7216 if (phy_index == INT_PHY || phy_index == EXT_PHY1) {
6954 rx = REG_RD(bp, shmem_base + 7217 rx = REG_RD(bp, shmem_base +
6955 offsetof(struct shmem_region, 7218 offsetof(struct shmem_region,
6956 dev_info.port_hw_config[port].xgxs_config_rx[i<<1])); 7219 dev_info.port_hw_config[port].xgxs_config_rx[i<<1]));
6957 7220
6958 tx = REG_RD(bp, shmem_base + 7221 tx = REG_RD(bp, shmem_base +
6959 offsetof(struct shmem_region, 7222 offsetof(struct shmem_region,
6960 dev_info.port_hw_config[port].xgxs_config_tx[i<<1])); 7223 dev_info.port_hw_config[port].xgxs_config_tx[i<<1]));
6961 } else { 7224 } else {
6962 rx = REG_RD(bp, shmem_base + 7225 rx = REG_RD(bp, shmem_base +
6963 offsetof(struct shmem_region, 7226 offsetof(struct shmem_region,
6964 dev_info.port_hw_config[port].xgxs_config2_rx[i<<1])); 7227 dev_info.port_hw_config[port].xgxs_config2_rx[i<<1]));
6965 7228
6966 tx = REG_RD(bp, shmem_base + 7229 tx = REG_RD(bp, shmem_base +
6967 offsetof(struct shmem_region, 7230 offsetof(struct shmem_region,
6968 dev_info.port_hw_config[port].xgxs_config2_rx[i<<1])); 7231 dev_info.port_hw_config[port].xgxs_config2_rx[i<<1]));
6969 } 7232 }
6970 7233
6971 phy->rx_preemphasis[i << 1] = ((rx>>16) & 0xffff); 7234 phy->rx_preemphasis[i << 1] = ((rx>>16) & 0xffff);
@@ -7085,6 +7348,9 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp,
7085 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823: 7348 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823:
7086 *phy = phy_84823; 7349 *phy = phy_84823;
7087 break; 7350 break;
7351 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833:
7352 *phy = phy_84833;
7353 break;
7088 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101: 7354 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101:
7089 *phy = phy_7101; 7355 *phy = phy_7101;
7090 break; 7356 break;
@@ -7099,21 +7365,21 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp,
7099 phy->addr = XGXS_EXT_PHY_ADDR(ext_phy_config); 7365 phy->addr = XGXS_EXT_PHY_ADDR(ext_phy_config);
7100 bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index); 7366 bnx2x_populate_preemphasis(bp, shmem_base, phy, port, phy_index);
7101 7367
7102 /** 7368 /*
7103 * The shmem address of the phy version is located on different 7369 * The shmem address of the phy version is located on different
7104 * structures. In case this structure is too old, do not set 7370 * structures. In case this structure is too old, do not set
7105 * the address 7371 * the address
7106 */ 7372 */
7107 config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region, 7373 config2 = REG_RD(bp, shmem_base + offsetof(struct shmem_region,
7108 dev_info.shared_hw_config.config2)); 7374 dev_info.shared_hw_config.config2));
7109 if (phy_index == EXT_PHY1) { 7375 if (phy_index == EXT_PHY1) {
7110 phy->ver_addr = shmem_base + offsetof(struct shmem_region, 7376 phy->ver_addr = shmem_base + offsetof(struct shmem_region,
7111 port_mb[port].ext_phy_fw_version); 7377 port_mb[port].ext_phy_fw_version);
7112 7378
7113 /* Check specific mdc mdio settings */ 7379 /* Check specific mdc mdio settings */
7114 if (config2 & SHARED_HW_CFG_MDC_MDIO_ACCESS1_MASK) 7380 if (config2 & SHARED_HW_CFG_MDC_MDIO_ACCESS1_MASK)
7115 mdc_mdio_access = config2 & 7381 mdc_mdio_access = config2 &
7116 SHARED_HW_CFG_MDC_MDIO_ACCESS1_MASK; 7382 SHARED_HW_CFG_MDC_MDIO_ACCESS1_MASK;
7117 } else { 7383 } else {
7118 u32 size = REG_RD(bp, shmem2_base); 7384 u32 size = REG_RD(bp, shmem2_base);
7119 7385
@@ -7132,7 +7398,7 @@ static u8 bnx2x_populate_ext_phy(struct bnx2x *bp,
7132 } 7398 }
7133 phy->mdio_ctrl = bnx2x_get_emac_base(bp, mdc_mdio_access, port); 7399 phy->mdio_ctrl = bnx2x_get_emac_base(bp, mdc_mdio_access, port);
7134 7400
7135 /** 7401 /*
7136 * In case mdc/mdio_access of the external phy is different than the 7402 * In case mdc/mdio_access of the external phy is different than the
7137 * mdc/mdio access of the XGXS, a HW lock must be taken in each access 7403 * mdc/mdio access of the XGXS, a HW lock must be taken in each access
7138 * to prevent one port interfere with another port's CL45 operations. 7404 * to prevent one port interfere with another port's CL45 operations.
@@ -7167,18 +7433,20 @@ static void bnx2x_phy_def_cfg(struct link_params *params,
7167 /* Populate the default phy configuration for MF mode */ 7433 /* Populate the default phy configuration for MF mode */
7168 if (phy_index == EXT_PHY2) { 7434 if (phy_index == EXT_PHY2) {
7169 link_config = REG_RD(bp, params->shmem_base + 7435 link_config = REG_RD(bp, params->shmem_base +
7170 offsetof(struct shmem_region, dev_info. 7436 offsetof(struct shmem_region, dev_info.
7171 port_feature_config[params->port].link_config2)); 7437 port_feature_config[params->port].link_config2));
7172 phy->speed_cap_mask = REG_RD(bp, params->shmem_base + 7438 phy->speed_cap_mask = REG_RD(bp, params->shmem_base +
7173 offsetof(struct shmem_region, dev_info. 7439 offsetof(struct shmem_region,
7440 dev_info.
7174 port_hw_config[params->port].speed_capability_mask2)); 7441 port_hw_config[params->port].speed_capability_mask2));
7175 } else { 7442 } else {
7176 link_config = REG_RD(bp, params->shmem_base + 7443 link_config = REG_RD(bp, params->shmem_base +
7177 offsetof(struct shmem_region, dev_info. 7444 offsetof(struct shmem_region, dev_info.
7178 port_feature_config[params->port].link_config)); 7445 port_feature_config[params->port].link_config));
7179 phy->speed_cap_mask = REG_RD(bp, params->shmem_base + 7446 phy->speed_cap_mask = REG_RD(bp, params->shmem_base +
7180 offsetof(struct shmem_region, dev_info. 7447 offsetof(struct shmem_region,
7181 port_hw_config[params->port].speed_capability_mask)); 7448 dev_info.
7449 port_hw_config[params->port].speed_capability_mask));
7182 } 7450 }
7183 DP(NETIF_MSG_LINK, "Default config phy idx %x cfg 0x%x speed_cap_mask" 7451 DP(NETIF_MSG_LINK, "Default config phy idx %x cfg 0x%x speed_cap_mask"
7184 " 0x%x\n", phy_index, link_config, phy->speed_cap_mask); 7452 " 0x%x\n", phy_index, link_config, phy->speed_cap_mask);
@@ -7325,7 +7593,7 @@ static void set_phy_vars(struct link_params *params)
7325 else if (phy_index == EXT_PHY2) 7593 else if (phy_index == EXT_PHY2)
7326 actual_phy_idx = EXT_PHY1; 7594 actual_phy_idx = EXT_PHY1;
7327 } 7595 }
7328 params->phy[actual_phy_idx].req_flow_ctrl = 7596 params->phy[actual_phy_idx].req_flow_ctrl =
7329 params->req_flow_ctrl[link_cfg_idx]; 7597 params->req_flow_ctrl[link_cfg_idx];
7330 7598
7331 params->phy[actual_phy_idx].req_line_speed = 7599 params->phy[actual_phy_idx].req_line_speed =
@@ -7378,57 +7646,6 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
7378 set_phy_vars(params); 7646 set_phy_vars(params);
7379 7647
7380 DP(NETIF_MSG_LINK, "Num of phys on board: %d\n", params->num_phys); 7648 DP(NETIF_MSG_LINK, "Num of phys on board: %d\n", params->num_phys);
7381 if (CHIP_REV_IS_FPGA(bp)) {
7382
7383 vars->link_up = 1;
7384 vars->line_speed = SPEED_10000;
7385 vars->duplex = DUPLEX_FULL;
7386 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
7387 vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD);
7388 /* enable on E1.5 FPGA */
7389 if (CHIP_IS_E1H(bp)) {
7390 vars->flow_ctrl |=
7391 (BNX2X_FLOW_CTRL_TX |
7392 BNX2X_FLOW_CTRL_RX);
7393 vars->link_status |=
7394 (LINK_STATUS_TX_FLOW_CONTROL_ENABLED |
7395 LINK_STATUS_RX_FLOW_CONTROL_ENABLED);
7396 }
7397
7398 bnx2x_emac_enable(params, vars, 0);
7399 if (!(CHIP_IS_E2(bp)))
7400 bnx2x_pbf_update(params, vars->flow_ctrl,
7401 vars->line_speed);
7402 /* disable drain */
7403 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
7404
7405 /* update shared memory */
7406 bnx2x_update_mng(params, vars->link_status);
7407
7408 return 0;
7409
7410 } else
7411 if (CHIP_REV_IS_EMUL(bp)) {
7412
7413 vars->link_up = 1;
7414 vars->line_speed = SPEED_10000;
7415 vars->duplex = DUPLEX_FULL;
7416 vars->flow_ctrl = BNX2X_FLOW_CTRL_NONE;
7417 vars->link_status = (LINK_STATUS_LINK_UP | LINK_10GTFD);
7418
7419 bnx2x_bmac_enable(params, vars, 0);
7420
7421 bnx2x_pbf_update(params, vars->flow_ctrl, vars->line_speed);
7422 /* Disable drain */
7423 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE
7424 + params->port*4, 0);
7425
7426 /* update shared memory */
7427 bnx2x_update_mng(params, vars->link_status);
7428
7429 return 0;
7430
7431 } else
7432 if (params->loopback_mode == LOOPBACK_BMAC) { 7649 if (params->loopback_mode == LOOPBACK_BMAC) {
7433 7650
7434 vars->link_up = 1; 7651 vars->link_up = 1;
@@ -7444,8 +7661,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
7444 /* set bmac loopback */ 7661 /* set bmac loopback */
7445 bnx2x_bmac_enable(params, vars, 1); 7662 bnx2x_bmac_enable(params, vars, 1);
7446 7663
7447 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + 7664 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
7448 params->port*4, 0);
7449 7665
7450 } else if (params->loopback_mode == LOOPBACK_EMAC) { 7666 } else if (params->loopback_mode == LOOPBACK_EMAC) {
7451 7667
@@ -7461,8 +7677,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
7461 /* set bmac loopback */ 7677 /* set bmac loopback */
7462 bnx2x_emac_enable(params, vars, 1); 7678 bnx2x_emac_enable(params, vars, 1);
7463 bnx2x_emac_program(params, vars); 7679 bnx2x_emac_program(params, vars);
7464 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + 7680 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
7465 params->port*4, 0);
7466 7681
7467 } else if ((params->loopback_mode == LOOPBACK_XGXS) || 7682 } else if ((params->loopback_mode == LOOPBACK_XGXS) ||
7468 (params->loopback_mode == LOOPBACK_EXT_PHY)) { 7683 (params->loopback_mode == LOOPBACK_EXT_PHY)) {
@@ -7485,8 +7700,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
7485 bnx2x_emac_program(params, vars); 7700 bnx2x_emac_program(params, vars);
7486 bnx2x_emac_enable(params, vars, 0); 7701 bnx2x_emac_enable(params, vars, 0);
7487 } else 7702 } else
7488 bnx2x_bmac_enable(params, vars, 0); 7703 bnx2x_bmac_enable(params, vars, 0);
7489
7490 if (params->loopback_mode == LOOPBACK_XGXS) { 7704 if (params->loopback_mode == LOOPBACK_XGXS) {
7491 /* set 10G XGXS loopback */ 7705 /* set 10G XGXS loopback */
7492 params->phy[INT_PHY].config_loopback( 7706 params->phy[INT_PHY].config_loopback(
@@ -7504,9 +7718,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
7504 params); 7718 params);
7505 } 7719 }
7506 } 7720 }
7507 7721 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + params->port*4, 0);
7508 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE +
7509 params->port*4, 0);
7510 7722
7511 bnx2x_set_led(params, vars, 7723 bnx2x_set_led(params, vars,
7512 LED_MODE_OPER, vars->line_speed); 7724 LED_MODE_OPER, vars->line_speed);
@@ -7525,7 +7737,7 @@ u8 bnx2x_phy_init(struct link_params *params, struct link_vars *vars)
7525 return 0; 7737 return 0;
7526} 7738}
7527u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars, 7739u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars,
7528 u8 reset_ext_phy) 7740 u8 reset_ext_phy)
7529{ 7741{
7530 struct bnx2x *bp = params->bp; 7742 struct bnx2x *bp = params->bp;
7531 u8 phy_index, port = params->port, clear_latch_ind = 0; 7743 u8 phy_index, port = params->port, clear_latch_ind = 0;
@@ -7534,10 +7746,10 @@ u8 bnx2x_link_reset(struct link_params *params, struct link_vars *vars,
7534 vars->link_status = 0; 7746 vars->link_status = 0;
7535 bnx2x_update_mng(params, vars->link_status); 7747 bnx2x_update_mng(params, vars->link_status);
7536 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4, 7748 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + port*4,
7537 (NIG_MASK_XGXS0_LINK_STATUS | 7749 (NIG_MASK_XGXS0_LINK_STATUS |
7538 NIG_MASK_XGXS0_LINK10G | 7750 NIG_MASK_XGXS0_LINK10G |
7539 NIG_MASK_SERDES0_LINK_STATUS | 7751 NIG_MASK_SERDES0_LINK_STATUS |
7540 NIG_MASK_MI_INT)); 7752 NIG_MASK_MI_INT));
7541 7753
7542 /* activate nig drain */ 7754 /* activate nig drain */
7543 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 1); 7755 REG_WR(bp, NIG_REG_EGRESS_DRAIN0_MODE + port*4, 1);
@@ -7605,10 +7817,13 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
7605 struct bnx2x_phy phy[PORT_MAX]; 7817 struct bnx2x_phy phy[PORT_MAX];
7606 struct bnx2x_phy *phy_blk[PORT_MAX]; 7818 struct bnx2x_phy *phy_blk[PORT_MAX];
7607 u16 val; 7819 u16 val;
7608 s8 port; 7820 s8 port = 0;
7609 s8 port_of_path = 0; 7821 s8 port_of_path = 0;
7610 7822 u32 swap_val, swap_override;
7611 bnx2x_ext_phy_hw_reset(bp, 0); 7823 swap_val = REG_RD(bp, NIG_REG_PORT_SWAP);
7824 swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE);
7825 port ^= (swap_val && swap_override);
7826 bnx2x_ext_phy_hw_reset(bp, port);
7612 /* PART1 - Reset both phys */ 7827 /* PART1 - Reset both phys */
7613 for (port = PORT_MAX - 1; port >= PORT_0; port--) { 7828 for (port = PORT_MAX - 1; port >= PORT_0; port--) {
7614 u32 shmem_base, shmem2_base; 7829 u32 shmem_base, shmem2_base;
@@ -7633,21 +7848,22 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
7633 /* disable attentions */ 7848 /* disable attentions */
7634 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 + 7849 bnx2x_bits_dis(bp, NIG_REG_MASK_INTERRUPT_PORT0 +
7635 port_of_path*4, 7850 port_of_path*4,
7636 (NIG_MASK_XGXS0_LINK_STATUS | 7851 (NIG_MASK_XGXS0_LINK_STATUS |
7637 NIG_MASK_XGXS0_LINK10G | 7852 NIG_MASK_XGXS0_LINK10G |
7638 NIG_MASK_SERDES0_LINK_STATUS | 7853 NIG_MASK_SERDES0_LINK_STATUS |
7639 NIG_MASK_MI_INT)); 7854 NIG_MASK_MI_INT));
7640 7855
7641 /* Need to take the phy out of low power mode in order 7856 /* Need to take the phy out of low power mode in order
7642 to write to access its registers */ 7857 to write to access its registers */
7643 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 7858 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
7644 MISC_REGISTERS_GPIO_OUTPUT_HIGH, port); 7859 MISC_REGISTERS_GPIO_OUTPUT_HIGH,
7860 port);
7645 7861
7646 /* Reset the phy */ 7862 /* Reset the phy */
7647 bnx2x_cl45_write(bp, &phy[port], 7863 bnx2x_cl45_write(bp, &phy[port],
7648 MDIO_PMA_DEVAD, 7864 MDIO_PMA_DEVAD,
7649 MDIO_PMA_REG_CTRL, 7865 MDIO_PMA_REG_CTRL,
7650 1<<15); 7866 1<<15);
7651 } 7867 }
7652 7868
7653 /* Add delay of 150ms after reset */ 7869 /* Add delay of 150ms after reset */
@@ -7663,7 +7879,6 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
7663 7879
7664 /* PART2 - Download firmware to both phys */ 7880 /* PART2 - Download firmware to both phys */
7665 for (port = PORT_MAX - 1; port >= PORT_0; port--) { 7881 for (port = PORT_MAX - 1; port >= PORT_0; port--) {
7666 u16 fw_ver1;
7667 if (CHIP_IS_E2(bp)) 7882 if (CHIP_IS_E2(bp))
7668 port_of_path = 0; 7883 port_of_path = 0;
7669 else 7884 else
@@ -7671,34 +7886,26 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
7671 7886
7672 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n", 7887 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n",
7673 phy_blk[port]->addr); 7888 phy_blk[port]->addr);
7674 bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port], 7889 if (bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port],
7675 port_of_path); 7890 port_of_path))
7676
7677 bnx2x_cl45_read(bp, phy_blk[port],
7678 MDIO_PMA_DEVAD,
7679 MDIO_PMA_REG_ROM_VER1, &fw_ver1);
7680 if (fw_ver1 == 0 || fw_ver1 == 0x4321) {
7681 DP(NETIF_MSG_LINK,
7682 "bnx2x_8073_common_init_phy port %x:"
7683 "Download failed. fw version = 0x%x\n",
7684 port, fw_ver1);
7685 return -EINVAL; 7891 return -EINVAL;
7686 }
7687 7892
7688 /* Only set bit 10 = 1 (Tx power down) */ 7893 /* Only set bit 10 = 1 (Tx power down) */
7689 bnx2x_cl45_read(bp, phy_blk[port], 7894 bnx2x_cl45_read(bp, phy_blk[port],
7690 MDIO_PMA_DEVAD, 7895 MDIO_PMA_DEVAD,
7691 MDIO_PMA_REG_TX_POWER_DOWN, &val); 7896 MDIO_PMA_REG_TX_POWER_DOWN, &val);
7692 7897
7693 /* Phase1 of TX_POWER_DOWN reset */ 7898 /* Phase1 of TX_POWER_DOWN reset */
7694 bnx2x_cl45_write(bp, phy_blk[port], 7899 bnx2x_cl45_write(bp, phy_blk[port],
7695 MDIO_PMA_DEVAD, 7900 MDIO_PMA_DEVAD,
7696 MDIO_PMA_REG_TX_POWER_DOWN, 7901 MDIO_PMA_REG_TX_POWER_DOWN,
7697 (val | 1<<10)); 7902 (val | 1<<10));
7698 } 7903 }
7699 7904
7700 /* Toggle Transmitter: Power down and then up with 600ms 7905 /*
7701 delay between */ 7906 * Toggle Transmitter: Power down and then up with 600ms delay
7907 * between
7908 */
7702 msleep(600); 7909 msleep(600);
7703 7910
7704 /* PART3 - complete TX_POWER_DOWN process, and set GPIO2 back to low */ 7911 /* PART3 - complete TX_POWER_DOWN process, and set GPIO2 back to low */
@@ -7706,25 +7913,25 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp,
7706 /* Phase2 of POWER_DOWN_RESET */ 7913 /* Phase2 of POWER_DOWN_RESET */
7707 /* Release bit 10 (Release Tx power down) */ 7914 /* Release bit 10 (Release Tx power down) */
7708 bnx2x_cl45_read(bp, phy_blk[port], 7915 bnx2x_cl45_read(bp, phy_blk[port],
7709 MDIO_PMA_DEVAD, 7916 MDIO_PMA_DEVAD,
7710 MDIO_PMA_REG_TX_POWER_DOWN, &val); 7917 MDIO_PMA_REG_TX_POWER_DOWN, &val);
7711 7918
7712 bnx2x_cl45_write(bp, phy_blk[port], 7919 bnx2x_cl45_write(bp, phy_blk[port],
7713 MDIO_PMA_DEVAD, 7920 MDIO_PMA_DEVAD,
7714 MDIO_PMA_REG_TX_POWER_DOWN, (val & (~(1<<10)))); 7921 MDIO_PMA_REG_TX_POWER_DOWN, (val & (~(1<<10))));
7715 msleep(15); 7922 msleep(15);
7716 7923
7717 /* Read modify write the SPI-ROM version select register */ 7924 /* Read modify write the SPI-ROM version select register */
7718 bnx2x_cl45_read(bp, phy_blk[port], 7925 bnx2x_cl45_read(bp, phy_blk[port],
7719 MDIO_PMA_DEVAD, 7926 MDIO_PMA_DEVAD,
7720 MDIO_PMA_REG_EDC_FFE_MAIN, &val); 7927 MDIO_PMA_REG_EDC_FFE_MAIN, &val);
7721 bnx2x_cl45_write(bp, phy_blk[port], 7928 bnx2x_cl45_write(bp, phy_blk[port],
7722 MDIO_PMA_DEVAD, 7929 MDIO_PMA_DEVAD,
7723 MDIO_PMA_REG_EDC_FFE_MAIN, (val | (1<<12))); 7930 MDIO_PMA_REG_EDC_FFE_MAIN, (val | (1<<12)));
7724 7931
7725 /* set GPIO2 back to LOW */ 7932 /* set GPIO2 back to LOW */
7726 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2, 7933 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_2,
7727 MISC_REGISTERS_GPIO_OUTPUT_LOW, port); 7934 MISC_REGISTERS_GPIO_OUTPUT_LOW, port);
7728 } 7935 }
7729 return 0; 7936 return 0;
7730} 7937}
@@ -7771,32 +7978,90 @@ static u8 bnx2x_8726_common_init_phy(struct bnx2x *bp,
7771 7978
7772 /* Set fault module detected LED on */ 7979 /* Set fault module detected LED on */
7773 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0, 7980 bnx2x_set_gpio(bp, MISC_REGISTERS_GPIO_0,
7774 MISC_REGISTERS_GPIO_HIGH, 7981 MISC_REGISTERS_GPIO_HIGH,
7775 port); 7982 port);
7776 } 7983 }
7777 7984
7778 return 0; 7985 return 0;
7779} 7986}
7987static void bnx2x_get_ext_phy_reset_gpio(struct bnx2x *bp, u32 shmem_base,
7988 u8 *io_gpio, u8 *io_port)
7989{
7990
7991 u32 phy_gpio_reset = REG_RD(bp, shmem_base +
7992 offsetof(struct shmem_region,
7993 dev_info.port_hw_config[PORT_0].default_cfg));
7994 switch (phy_gpio_reset) {
7995 case PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO0_P0:
7996 *io_gpio = 0;
7997 *io_port = 0;
7998 break;
7999 case PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO1_P0:
8000 *io_gpio = 1;
8001 *io_port = 0;
8002 break;
8003 case PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO2_P0:
8004 *io_gpio = 2;
8005 *io_port = 0;
8006 break;
8007 case PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO3_P0:
8008 *io_gpio = 3;
8009 *io_port = 0;
8010 break;
8011 case PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO0_P1:
8012 *io_gpio = 0;
8013 *io_port = 1;
8014 break;
8015 case PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO1_P1:
8016 *io_gpio = 1;
8017 *io_port = 1;
8018 break;
8019 case PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO2_P1:
8020 *io_gpio = 2;
8021 *io_port = 1;
8022 break;
8023 case PORT_HW_CFG_EXT_PHY_GPIO_RST_GPIO3_P1:
8024 *io_gpio = 3;
8025 *io_port = 1;
8026 break;
8027 default:
8028 /* Don't override the io_gpio and io_port */
8029 break;
8030 }
8031}
7780static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp, 8032static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp,
7781 u32 shmem_base_path[], 8033 u32 shmem_base_path[],
7782 u32 shmem2_base_path[], u8 phy_index, 8034 u32 shmem2_base_path[], u8 phy_index,
7783 u32 chip_id) 8035 u32 chip_id)
7784{ 8036{
7785 s8 port; 8037 s8 port, reset_gpio;
7786 u32 swap_val, swap_override; 8038 u32 swap_val, swap_override;
7787 struct bnx2x_phy phy[PORT_MAX]; 8039 struct bnx2x_phy phy[PORT_MAX];
7788 struct bnx2x_phy *phy_blk[PORT_MAX]; 8040 struct bnx2x_phy *phy_blk[PORT_MAX];
7789 s8 port_of_path; 8041 s8 port_of_path;
7790 swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); 8042 swap_val = REG_RD(bp, NIG_REG_PORT_SWAP);
7791 swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); 8043 swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE);
7792 8044
8045 reset_gpio = MISC_REGISTERS_GPIO_1;
7793 port = 1; 8046 port = 1;
7794 8047
7795 bnx2x_ext_phy_hw_reset(bp, port ^ (swap_val && swap_override)); 8048 /*
8049 * Retrieve the reset gpio/port which control the reset.
8050 * Default is GPIO1, PORT1
8051 */
8052 bnx2x_get_ext_phy_reset_gpio(bp, shmem_base_path[0],
8053 (u8 *)&reset_gpio, (u8 *)&port);
7796 8054
7797 /* Calculate the port based on port swap */ 8055 /* Calculate the port based on port swap */
7798 port ^= (swap_val && swap_override); 8056 port ^= (swap_val && swap_override);
7799 8057
8058 /* Initiate PHY reset*/
8059 bnx2x_set_gpio(bp, reset_gpio, MISC_REGISTERS_GPIO_OUTPUT_LOW,
8060 port);
8061 msleep(1);
8062 bnx2x_set_gpio(bp, reset_gpio, MISC_REGISTERS_GPIO_OUTPUT_HIGH,
8063 port);
8064
7800 msleep(5); 8065 msleep(5);
7801 8066
7802 /* PART1 - Reset both phys */ 8067 /* PART1 - Reset both phys */
@@ -7832,9 +8097,7 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp,
7832 8097
7833 /* Reset the phy */ 8098 /* Reset the phy */
7834 bnx2x_cl45_write(bp, &phy[port], 8099 bnx2x_cl45_write(bp, &phy[port],
7835 MDIO_PMA_DEVAD, 8100 MDIO_PMA_DEVAD, MDIO_PMA_REG_CTRL, 1<<15);
7836 MDIO_PMA_REG_CTRL,
7837 1<<15);
7838 } 8101 }
7839 8102
7840 /* Add delay of 150ms after reset */ 8103 /* Add delay of 150ms after reset */
@@ -7848,27 +8111,17 @@ static u8 bnx2x_8727_common_init_phy(struct bnx2x *bp,
7848 } 8111 }
7849 /* PART2 - Download firmware to both phys */ 8112 /* PART2 - Download firmware to both phys */
7850 for (port = PORT_MAX - 1; port >= PORT_0; port--) { 8113 for (port = PORT_MAX - 1; port >= PORT_0; port--) {
7851 u16 fw_ver1; 8114 if (CHIP_IS_E2(bp))
7852 if (CHIP_IS_E2(bp))
7853 port_of_path = 0; 8115 port_of_path = 0;
7854 else 8116 else
7855 port_of_path = port; 8117 port_of_path = port;
7856 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n", 8118 DP(NETIF_MSG_LINK, "Loading spirom for phy address 0x%x\n",
7857 phy_blk[port]->addr); 8119 phy_blk[port]->addr);
7858 bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port], 8120 if (bnx2x_8073_8727_external_rom_boot(bp, phy_blk[port],
7859 port_of_path); 8121 port_of_path))
7860 bnx2x_cl45_read(bp, phy_blk[port],
7861 MDIO_PMA_DEVAD,
7862 MDIO_PMA_REG_ROM_VER1, &fw_ver1);
7863 if (fw_ver1 == 0 || fw_ver1 == 0x4321) {
7864 DP(NETIF_MSG_LINK,
7865 "bnx2x_8727_common_init_phy port %x:"
7866 "Download failed. fw version = 0x%x\n",
7867 port, fw_ver1);
7868 return -EINVAL; 8122 return -EINVAL;
7869 }
7870 }
7871 8123
8124 }
7872 return 0; 8125 return 0;
7873} 8126}
7874 8127
@@ -7893,8 +8146,10 @@ static u8 bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],
7893 break; 8146 break;
7894 8147
7895 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726: 8148 case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726:
7896 /* GPIO1 affects both ports, so there's need to pull 8149 /*
7897 it for single port alone */ 8150 * GPIO1 affects both ports, so there's need to pull
8151 * it for single port alone
8152 */
7898 rc = bnx2x_8726_common_init_phy(bp, shmem_base_path, 8153 rc = bnx2x_8726_common_init_phy(bp, shmem_base_path,
7899 shmem2_base_path, 8154 shmem2_base_path,
7900 phy_index, chip_id); 8155 phy_index, chip_id);
@@ -7904,11 +8159,15 @@ static u8 bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[],
7904 break; 8159 break;
7905 default: 8160 default:
7906 DP(NETIF_MSG_LINK, 8161 DP(NETIF_MSG_LINK,
7907 "bnx2x_common_init_phy: ext_phy 0x%x not required\n", 8162 "ext_phy 0x%x common init not required\n",
7908 ext_phy_type); 8163 ext_phy_type);
7909 break; 8164 break;
7910 } 8165 }
7911 8166
8167 if (rc != 0)
8168 netdev_err(bp->dev, "Warning: PHY was not initialized,"
8169 " Port %d\n",
8170 0);
7912 return rc; 8171 return rc;
7913} 8172}
7914 8173
@@ -7916,12 +8175,20 @@ u8 bnx2x_common_init_phy(struct bnx2x *bp, u32 shmem_base_path[],
7916 u32 shmem2_base_path[], u32 chip_id) 8175 u32 shmem2_base_path[], u32 chip_id)
7917{ 8176{
7918 u8 rc = 0; 8177 u8 rc = 0;
8178 u32 phy_ver;
7919 u8 phy_index; 8179 u8 phy_index;
7920 u32 ext_phy_type, ext_phy_config; 8180 u32 ext_phy_type, ext_phy_config;
7921 DP(NETIF_MSG_LINK, "Begin common phy init\n"); 8181 DP(NETIF_MSG_LINK, "Begin common phy init\n");
7922 8182
7923 if (CHIP_REV_IS_EMUL(bp)) 8183 /* Check if common init was already done */
8184 phy_ver = REG_RD(bp, shmem_base_path[0] +
8185 offsetof(struct shmem_region,
8186 port_mb[PORT_0].ext_phy_fw_version));
8187 if (phy_ver) {
8188 DP(NETIF_MSG_LINK, "Not doing common init; phy ver is 0x%x\n",
8189 phy_ver);
7924 return 0; 8190 return 0;
8191 }
7925 8192
7926 /* Read the ext_phy_type for arbitrary port(0) */ 8193 /* Read the ext_phy_type for arbitrary port(0) */
7927 for (phy_index = EXT_PHY1; phy_index < MAX_PHYS; 8194 for (phy_index = EXT_PHY1; phy_index < MAX_PHYS;
diff --git a/drivers/net/bnx2x/bnx2x_link.h b/drivers/net/bnx2x/bnx2x_link.h
index bedab1a942c4..92f36b6950dc 100644
--- a/drivers/net/bnx2x/bnx2x_link.h
+++ b/drivers/net/bnx2x/bnx2x_link.h
@@ -1,4 +1,4 @@
1/* Copyright 2008-2010 Broadcom Corporation 1/* Copyright 2008-2011 Broadcom Corporation
2 * 2 *
3 * Unless you and Broadcom execute a separate written software license 3 * Unless you and Broadcom execute a separate written software license
4 * agreement governing use of this software, this software is licensed to you 4 * agreement governing use of this software, this software is licensed to you
@@ -33,7 +33,7 @@
33#define BNX2X_FLOW_CTRL_BOTH PORT_FEATURE_FLOW_CONTROL_BOTH 33#define BNX2X_FLOW_CTRL_BOTH PORT_FEATURE_FLOW_CONTROL_BOTH
34#define BNX2X_FLOW_CTRL_NONE PORT_FEATURE_FLOW_CONTROL_NONE 34#define BNX2X_FLOW_CTRL_NONE PORT_FEATURE_FLOW_CONTROL_NONE
35 35
36#define SPEED_AUTO_NEG 0 36#define SPEED_AUTO_NEG 0
37#define SPEED_12000 12000 37#define SPEED_12000 12000
38#define SPEED_12500 12500 38#define SPEED_12500 12500
39#define SPEED_13000 13000 39#define SPEED_13000 13000
@@ -44,8 +44,8 @@
44#define SFP_EEPROM_VENDOR_NAME_SIZE 16 44#define SFP_EEPROM_VENDOR_NAME_SIZE 16
45#define SFP_EEPROM_VENDOR_OUI_ADDR 0x25 45#define SFP_EEPROM_VENDOR_OUI_ADDR 0x25
46#define SFP_EEPROM_VENDOR_OUI_SIZE 3 46#define SFP_EEPROM_VENDOR_OUI_SIZE 3
47#define SFP_EEPROM_PART_NO_ADDR 0x28 47#define SFP_EEPROM_PART_NO_ADDR 0x28
48#define SFP_EEPROM_PART_NO_SIZE 16 48#define SFP_EEPROM_PART_NO_SIZE 16
49#define PWR_FLT_ERR_MSG_LEN 250 49#define PWR_FLT_ERR_MSG_LEN 250
50 50
51#define XGXS_EXT_PHY_TYPE(ext_phy_config) \ 51#define XGXS_EXT_PHY_TYPE(ext_phy_config) \
@@ -62,7 +62,7 @@
62#define SINGLE_MEDIA(params) (params->num_phys == 2) 62#define SINGLE_MEDIA(params) (params->num_phys == 2)
63/* Dual Media board contains two external phy with different media */ 63/* Dual Media board contains two external phy with different media */
64#define DUAL_MEDIA(params) (params->num_phys == 3) 64#define DUAL_MEDIA(params) (params->num_phys == 3)
65#define FW_PARAM_MDIO_CTRL_OFFSET 16 65#define FW_PARAM_MDIO_CTRL_OFFSET 16
66#define FW_PARAM_SET(phy_addr, phy_type, mdio_access) \ 66#define FW_PARAM_SET(phy_addr, phy_type, mdio_access) \
67 (phy_addr | phy_type | mdio_access << FW_PARAM_MDIO_CTRL_OFFSET) 67 (phy_addr | phy_type | mdio_access << FW_PARAM_MDIO_CTRL_OFFSET)
68 68
@@ -201,12 +201,14 @@ struct link_params {
201 201
202 /* Default / User Configuration */ 202 /* Default / User Configuration */
203 u8 loopback_mode; 203 u8 loopback_mode;
204#define LOOPBACK_NONE 0 204#define LOOPBACK_NONE 0
205#define LOOPBACK_EMAC 1 205#define LOOPBACK_EMAC 1
206#define LOOPBACK_BMAC 2 206#define LOOPBACK_BMAC 2
207#define LOOPBACK_XGXS 3 207#define LOOPBACK_XGXS 3
208#define LOOPBACK_EXT_PHY 4 208#define LOOPBACK_EXT_PHY 4
209#define LOOPBACK_EXT 5 209#define LOOPBACK_EXT 5
210#define LOOPBACK_UMAC 6
211#define LOOPBACK_XMAC 7
210 212
211 /* Device parameters */ 213 /* Device parameters */
212 u8 mac_addr[6]; 214 u8 mac_addr[6];
@@ -230,10 +232,11 @@ struct link_params {
230 /* Phy register parameter */ 232 /* Phy register parameter */
231 u32 chip_id; 233 u32 chip_id;
232 234
235 /* features */
233 u32 feature_config_flags; 236 u32 feature_config_flags;
234#define FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED (1<<0) 237#define FEATURE_CONFIG_OVERRIDE_PREEMPHASIS_ENABLED (1<<0)
235#define FEATURE_CONFIG_PFC_ENABLED (1<<1) 238#define FEATURE_CONFIG_PFC_ENABLED (1<<1)
236#define FEATURE_CONFIG_BC_SUPPORTS_OPT_MDL_VRFY (1<<2) 239#define FEATURE_CONFIG_BC_SUPPORTS_OPT_MDL_VRFY (1<<2)
237#define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY (1<<3) 240#define FEATURE_CONFIG_BC_SUPPORTS_DUAL_PHY_OPT_MDL_VRFY (1<<3)
238 /* Will be populated during common init */ 241 /* Will be populated during common init */
239 struct bnx2x_phy phy[MAX_PHYS]; 242 struct bnx2x_phy phy[MAX_PHYS];
@@ -334,6 +337,11 @@ void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port);
334/* Reset the external of SFX7101 */ 337/* Reset the external of SFX7101 */
335void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy); 338void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy);
336 339
340/* Read "byte_cnt" bytes from address "addr" from the SFP+ EEPROM */
341u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,
342 struct link_params *params, u16 addr,
343 u8 byte_cnt, u8 *o_buf);
344
337void bnx2x_hw_reset_phy(struct link_params *params); 345void bnx2x_hw_reset_phy(struct link_params *params);
338 346
339/* Checks if HW lock is required for this phy/board type */ 347/* Checks if HW lock is required for this phy/board type */
@@ -379,7 +387,7 @@ void bnx2x_ets_disabled(struct link_params *params);
379 387
380/* Used to configure the ETS to BW limited */ 388/* Used to configure the ETS to BW limited */
381void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw, 389void bnx2x_ets_bw_limit(const struct link_params *params, const u32 cos0_bw,
382 const u32 cos1_bw); 390 const u32 cos1_bw);
383 391
384/* Used to configure the ETS to strict */ 392/* Used to configure the ETS to strict */
385u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos); 393u8 bnx2x_ets_strict(const struct link_params *params, const u8 strict_cos);
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c
index 8cdcf5b39d1e..ae8d20a2b4fc 100644
--- a/drivers/net/bnx2x/bnx2x_main.c
+++ b/drivers/net/bnx2x/bnx2x_main.c
@@ -5296,10 +5296,6 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code)
5296 } 5296 }
5297 } 5297 }
5298 5298
5299 bp->port.need_hw_lock = bnx2x_hw_lock_required(bp,
5300 bp->common.shmem_base,
5301 bp->common.shmem2_base);
5302
5303 bnx2x_setup_fan_failure_detection(bp); 5299 bnx2x_setup_fan_failure_detection(bp);
5304 5300
5305 /* clear PXP2 attentions */ 5301 /* clear PXP2 attentions */
@@ -5503,9 +5499,6 @@ static int bnx2x_init_hw_port(struct bnx2x *bp)
5503 5499
5504 bnx2x_init_block(bp, MCP_BLOCK, init_stage); 5500 bnx2x_init_block(bp, MCP_BLOCK, init_stage);
5505 bnx2x_init_block(bp, DMAE_BLOCK, init_stage); 5501 bnx2x_init_block(bp, DMAE_BLOCK, init_stage);
5506 bp->port.need_hw_lock = bnx2x_hw_lock_required(bp,
5507 bp->common.shmem_base,
5508 bp->common.shmem2_base);
5509 if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base, 5502 if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base,
5510 bp->common.shmem2_base, port)) { 5503 bp->common.shmem2_base, port)) {
5511 u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : 5504 u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 :
@@ -6463,12 +6456,13 @@ static int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, int set)
6463 u32 iscsi_l2_cl_id = BNX2X_ISCSI_ETH_CL_ID + 6456 u32 iscsi_l2_cl_id = BNX2X_ISCSI_ETH_CL_ID +
6464 BP_E1HVN(bp) * NONE_ETH_CONTEXT_USE; 6457 BP_E1HVN(bp) * NONE_ETH_CONTEXT_USE;
6465 u32 cl_bit_vec = (1 << iscsi_l2_cl_id); 6458 u32 cl_bit_vec = (1 << iscsi_l2_cl_id);
6459 u8 *iscsi_mac = bp->cnic_eth_dev.iscsi_mac;
6466 6460
6467 /* Send a SET_MAC ramrod */ 6461 /* Send a SET_MAC ramrod */
6468 bnx2x_set_mac_addr_gen(bp, set, bp->iscsi_mac, cl_bit_vec, 6462 bnx2x_set_mac_addr_gen(bp, set, iscsi_mac, cl_bit_vec,
6469 cam_offset, 0); 6463 cam_offset, 0);
6470 6464
6471 bnx2x_set_mac_in_nig(bp, set, bp->iscsi_mac, LLH_CAM_ISCSI_ETH_LINE); 6465 bnx2x_set_mac_in_nig(bp, set, iscsi_mac, LLH_CAM_ISCSI_ETH_LINE);
6472 6466
6473 return 0; 6467 return 0;
6474} 6468}
@@ -8379,13 +8373,60 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp)
8379 (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) 8373 (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN))
8380 bp->mdio.prtad = 8374 bp->mdio.prtad =
8381 XGXS_EXT_PHY_ADDR(ext_phy_config); 8375 XGXS_EXT_PHY_ADDR(ext_phy_config);
8376
8377 /*
8378 * Check if hw lock is required to access MDC/MDIO bus to the PHY(s)
8379 * In MF mode, it is set to cover self test cases
8380 */
8381 if (IS_MF(bp))
8382 bp->port.need_hw_lock = 1;
8383 else
8384 bp->port.need_hw_lock = bnx2x_hw_lock_required(bp,
8385 bp->common.shmem_base,
8386 bp->common.shmem2_base);
8382} 8387}
8383 8388
8389#ifdef BCM_CNIC
8390static void __devinit bnx2x_get_cnic_info(struct bnx2x *bp)
8391{
8392 u32 max_iscsi_conn = FW_ENCODE_32BIT_PATTERN ^ SHMEM_RD(bp,
8393 drv_lic_key[BP_PORT(bp)].max_iscsi_conn);
8394 u32 max_fcoe_conn = FW_ENCODE_32BIT_PATTERN ^ SHMEM_RD(bp,
8395 drv_lic_key[BP_PORT(bp)].max_fcoe_conn);
8396
8397 /* Get the number of maximum allowed iSCSI and FCoE connections */
8398 bp->cnic_eth_dev.max_iscsi_conn =
8399 (max_iscsi_conn & BNX2X_MAX_ISCSI_INIT_CONN_MASK) >>
8400 BNX2X_MAX_ISCSI_INIT_CONN_SHIFT;
8401
8402 bp->cnic_eth_dev.max_fcoe_conn =
8403 (max_fcoe_conn & BNX2X_MAX_FCOE_INIT_CONN_MASK) >>
8404 BNX2X_MAX_FCOE_INIT_CONN_SHIFT;
8405
8406 BNX2X_DEV_INFO("max_iscsi_conn 0x%x max_fcoe_conn 0x%x\n",
8407 bp->cnic_eth_dev.max_iscsi_conn,
8408 bp->cnic_eth_dev.max_fcoe_conn);
8409
8410 /* If mamimum allowed number of connections is zero -
8411 * disable the feature.
8412 */
8413 if (!bp->cnic_eth_dev.max_iscsi_conn)
8414 bp->flags |= NO_ISCSI_OOO_FLAG | NO_ISCSI_FLAG;
8415
8416 if (!bp->cnic_eth_dev.max_fcoe_conn)
8417 bp->flags |= NO_FCOE_FLAG;
8418}
8419#endif
8420
8384static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp) 8421static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
8385{ 8422{
8386 u32 val, val2; 8423 u32 val, val2;
8387 int func = BP_ABS_FUNC(bp); 8424 int func = BP_ABS_FUNC(bp);
8388 int port = BP_PORT(bp); 8425 int port = BP_PORT(bp);
8426#ifdef BCM_CNIC
8427 u8 *iscsi_mac = bp->cnic_eth_dev.iscsi_mac;
8428 u8 *fip_mac = bp->fip_mac;
8429#endif
8389 8430
8390 if (BP_NOMCP(bp)) { 8431 if (BP_NOMCP(bp)) {
8391 BNX2X_ERROR("warning: random MAC workaround active\n"); 8432 BNX2X_ERROR("warning: random MAC workaround active\n");
@@ -8398,7 +8439,9 @@ static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
8398 bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2); 8439 bnx2x_set_mac_buf(bp->dev->dev_addr, val, val2);
8399 8440
8400#ifdef BCM_CNIC 8441#ifdef BCM_CNIC
8401 /* iSCSI NPAR MAC */ 8442 /* iSCSI and FCoE NPAR MACs: if there is no either iSCSI or
8443 * FCoE MAC then the appropriate feature should be disabled.
8444 */
8402 if (IS_MF_SI(bp)) { 8445 if (IS_MF_SI(bp)) {
8403 u32 cfg = MF_CFG_RD(bp, func_ext_config[func].func_cfg); 8446 u32 cfg = MF_CFG_RD(bp, func_ext_config[func].func_cfg);
8404 if (cfg & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD) { 8447 if (cfg & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD) {
@@ -8406,8 +8449,39 @@ static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
8406 iscsi_mac_addr_upper); 8449 iscsi_mac_addr_upper);
8407 val = MF_CFG_RD(bp, func_ext_config[func]. 8450 val = MF_CFG_RD(bp, func_ext_config[func].
8408 iscsi_mac_addr_lower); 8451 iscsi_mac_addr_lower);
8409 bnx2x_set_mac_buf(bp->iscsi_mac, val, val2); 8452 BNX2X_DEV_INFO("Read iSCSI MAC: "
8410 } 8453 "0x%x:0x%04x\n", val2, val);
8454 bnx2x_set_mac_buf(iscsi_mac, val, val2);
8455
8456 /* Disable iSCSI OOO if MAC configuration is
8457 * invalid.
8458 */
8459 if (!is_valid_ether_addr(iscsi_mac)) {
8460 bp->flags |= NO_ISCSI_OOO_FLAG |
8461 NO_ISCSI_FLAG;
8462 memset(iscsi_mac, 0, ETH_ALEN);
8463 }
8464 } else
8465 bp->flags |= NO_ISCSI_OOO_FLAG | NO_ISCSI_FLAG;
8466
8467 if (cfg & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD) {
8468 val2 = MF_CFG_RD(bp, func_ext_config[func].
8469 fcoe_mac_addr_upper);
8470 val = MF_CFG_RD(bp, func_ext_config[func].
8471 fcoe_mac_addr_lower);
8472 BNX2X_DEV_INFO("Read FCoE MAC to "
8473 "0x%x:0x%04x\n", val2, val);
8474 bnx2x_set_mac_buf(fip_mac, val, val2);
8475
8476 /* Disable FCoE if MAC configuration is
8477 * invalid.
8478 */
8479 if (!is_valid_ether_addr(fip_mac)) {
8480 bp->flags |= NO_FCOE_FLAG;
8481 memset(bp->fip_mac, 0, ETH_ALEN);
8482 }
8483 } else
8484 bp->flags |= NO_FCOE_FLAG;
8411 } 8485 }
8412#endif 8486#endif
8413 } else { 8487 } else {
@@ -8421,7 +8495,7 @@ static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
8421 iscsi_mac_upper); 8495 iscsi_mac_upper);
8422 val = SHMEM_RD(bp, dev_info.port_hw_config[port]. 8496 val = SHMEM_RD(bp, dev_info.port_hw_config[port].
8423 iscsi_mac_lower); 8497 iscsi_mac_lower);
8424 bnx2x_set_mac_buf(bp->iscsi_mac, val, val2); 8498 bnx2x_set_mac_buf(iscsi_mac, val, val2);
8425#endif 8499#endif
8426 } 8500 }
8427 8501
@@ -8429,14 +8503,12 @@ static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp)
8429 memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN); 8503 memcpy(bp->dev->perm_addr, bp->dev->dev_addr, ETH_ALEN);
8430 8504
8431#ifdef BCM_CNIC 8505#ifdef BCM_CNIC
8432 /* Inform the upper layers about FCoE MAC */ 8506 /* Set the FCoE MAC in modes other then MF_SI */
8433 if (!CHIP_IS_E1x(bp)) { 8507 if (!CHIP_IS_E1x(bp)) {
8434 if (IS_MF_SD(bp)) 8508 if (IS_MF_SD(bp))
8435 memcpy(bp->fip_mac, bp->dev->dev_addr, 8509 memcpy(fip_mac, bp->dev->dev_addr, ETH_ALEN);
8436 sizeof(bp->fip_mac)); 8510 else if (!IS_MF(bp))
8437 else 8511 memcpy(fip_mac, iscsi_mac, ETH_ALEN);
8438 memcpy(bp->fip_mac, bp->iscsi_mac,
8439 sizeof(bp->fip_mac));
8440 } 8512 }
8441#endif 8513#endif
8442} 8514}
@@ -8599,6 +8671,10 @@ static int __devinit bnx2x_get_hwinfo(struct bnx2x *bp)
8599 /* Get MAC addresses */ 8671 /* Get MAC addresses */
8600 bnx2x_get_mac_hwinfo(bp); 8672 bnx2x_get_mac_hwinfo(bp);
8601 8673
8674#ifdef BCM_CNIC
8675 bnx2x_get_cnic_info(bp);
8676#endif
8677
8602 return rc; 8678 return rc;
8603} 8679}
8604 8680
@@ -9862,7 +9938,8 @@ static int bnx2x_cnic_ctl_send(struct bnx2x *bp, struct cnic_ctl_info *ctl)
9862 int rc = 0; 9938 int rc = 0;
9863 9939
9864 mutex_lock(&bp->cnic_mutex); 9940 mutex_lock(&bp->cnic_mutex);
9865 c_ops = bp->cnic_ops; 9941 c_ops = rcu_dereference_protected(bp->cnic_ops,
9942 lockdep_is_held(&bp->cnic_mutex));
9866 if (c_ops) 9943 if (c_ops)
9867 rc = c_ops->cnic_ctl(bp->cnic_data, ctl); 9944 rc = c_ops->cnic_ctl(bp->cnic_data, ctl);
9868 mutex_unlock(&bp->cnic_mutex); 9945 mutex_unlock(&bp->cnic_mutex);
@@ -10072,6 +10149,13 @@ struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev)
10072 struct bnx2x *bp = netdev_priv(dev); 10149 struct bnx2x *bp = netdev_priv(dev);
10073 struct cnic_eth_dev *cp = &bp->cnic_eth_dev; 10150 struct cnic_eth_dev *cp = &bp->cnic_eth_dev;
10074 10151
10152 /* If both iSCSI and FCoE are disabled - return NULL in
10153 * order to indicate CNIC that it should not try to work
10154 * with this device.
10155 */
10156 if (NO_ISCSI(bp) && NO_FCOE(bp))
10157 return NULL;
10158
10075 cp->drv_owner = THIS_MODULE; 10159 cp->drv_owner = THIS_MODULE;
10076 cp->chip_id = CHIP_ID(bp); 10160 cp->chip_id = CHIP_ID(bp);
10077 cp->pdev = bp->pdev; 10161 cp->pdev = bp->pdev;
@@ -10092,6 +10176,15 @@ struct cnic_eth_dev *bnx2x_cnic_probe(struct net_device *dev)
10092 BP_E1HVN(bp) * NONE_ETH_CONTEXT_USE; 10176 BP_E1HVN(bp) * NONE_ETH_CONTEXT_USE;
10093 cp->iscsi_l2_cid = BNX2X_ISCSI_ETH_CID; 10177 cp->iscsi_l2_cid = BNX2X_ISCSI_ETH_CID;
10094 10178
10179 if (NO_ISCSI_OOO(bp))
10180 cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI_OOO;
10181
10182 if (NO_ISCSI(bp))
10183 cp->drv_state |= CNIC_DRV_STATE_NO_ISCSI;
10184
10185 if (NO_FCOE(bp))
10186 cp->drv_state |= CNIC_DRV_STATE_NO_FCOE;
10187
10095 DP(BNX2X_MSG_SP, "page_size %d, tbl_offset %d, tbl_lines %d, " 10188 DP(BNX2X_MSG_SP, "page_size %d, tbl_offset %d, tbl_lines %d, "
10096 "starting cid %d\n", 10189 "starting cid %d\n",
10097 cp->ctx_blk_size, 10190 cp->ctx_blk_size,
diff --git a/drivers/net/bnx2x/bnx2x_reg.h b/drivers/net/bnx2x/bnx2x_reg.h
index c939683e3d61..1c89f19a4425 100644
--- a/drivers/net/bnx2x/bnx2x_reg.h
+++ b/drivers/net/bnx2x/bnx2x_reg.h
@@ -6083,6 +6083,7 @@ Theotherbitsarereservedandshouldbezero*/
6083#define MDIO_PMA_REG_8727_PCS_OPT_CTRL 0xc808 6083#define MDIO_PMA_REG_8727_PCS_OPT_CTRL 0xc808
6084#define MDIO_PMA_REG_8727_GPIO_CTRL 0xc80e 6084#define MDIO_PMA_REG_8727_GPIO_CTRL 0xc80e
6085#define MDIO_PMA_REG_8727_PCS_GP 0xc842 6085#define MDIO_PMA_REG_8727_PCS_GP 0xc842
6086#define MDIO_PMA_REG_8727_OPT_CFG_REG 0xc8e4
6086 6087
6087#define MDIO_AN_REG_8727_MISC_CTRL 0x8309 6088#define MDIO_AN_REG_8727_MISC_CTRL 0x8309
6088 6089
@@ -6194,7 +6195,11 @@ Theotherbitsarereservedandshouldbezero*/
6194#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER 0x0000 6195#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_COPPER 0x0000
6195#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER 0x0100 6196#define MDIO_CTL_REG_84823_MEDIA_PRIORITY_FIBER 0x0100
6196#define MDIO_CTL_REG_84823_MEDIA_FIBER_1G 0x1000 6197#define MDIO_CTL_REG_84823_MEDIA_FIBER_1G 0x1000
6198#define MDIO_CTL_REG_84823_USER_CTRL_REG 0x4005
6199#define MDIO_CTL_REG_84823_USER_CTRL_CMS 0x0080
6197 6200
6201#define MDIO_PMA_REG_84823_CTL_LED_CTL_1 0xa8e3
6202#define MDIO_PMA_REG_84823_LED3_STRETCH_EN 0x0080
6198 6203
6199#define IGU_FUNC_BASE 0x0400 6204#define IGU_FUNC_BASE 0x0400
6200 6205
diff --git a/drivers/net/bonding/bond_3ad.c b/drivers/net/bonding/bond_3ad.c
index 171782e2bb39..1024ae158227 100644
--- a/drivers/net/bonding/bond_3ad.c
+++ b/drivers/net/bonding/bond_3ad.c
@@ -2470,6 +2470,10 @@ int bond_3ad_lacpdu_recv(struct sk_buff *skb, struct net_device *dev, struct pac
2470 if (!(dev->flags & IFF_MASTER)) 2470 if (!(dev->flags & IFF_MASTER))
2471 goto out; 2471 goto out;
2472 2472
2473 skb = skb_share_check(skb, GFP_ATOMIC);
2474 if (!skb)
2475 goto out;
2476
2473 if (!pskb_may_pull(skb, sizeof(struct lacpdu))) 2477 if (!pskb_may_pull(skb, sizeof(struct lacpdu)))
2474 goto out; 2478 goto out;
2475 2479
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index f4e638c65129..5c6fba802f2b 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -326,6 +326,10 @@ static int rlb_arp_recv(struct sk_buff *skb, struct net_device *bond_dev, struct
326 goto out; 326 goto out;
327 } 327 }
328 328
329 skb = skb_share_check(skb, GFP_ATOMIC);
330 if (!skb)
331 goto out;
332
329 if (!pskb_may_pull(skb, arp_hdr_len(bond_dev))) 333 if (!pskb_may_pull(skb, arp_hdr_len(bond_dev)))
330 goto out; 334 goto out;
331 335
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index b1025b85acf1..1df9f0ea9184 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -1372,8 +1372,8 @@ static int bond_compute_features(struct bonding *bond)
1372{ 1372{
1373 struct slave *slave; 1373 struct slave *slave;
1374 struct net_device *bond_dev = bond->dev; 1374 struct net_device *bond_dev = bond->dev;
1375 unsigned long features = bond_dev->features; 1375 u32 features = bond_dev->features;
1376 unsigned long vlan_features = 0; 1376 u32 vlan_features = 0;
1377 unsigned short max_hard_header_len = max((u16)ETH_HLEN, 1377 unsigned short max_hard_header_len = max((u16)ETH_HLEN,
1378 bond_dev->hard_header_len); 1378 bond_dev->hard_header_len);
1379 int i; 1379 int i;
@@ -1400,8 +1400,8 @@ static int bond_compute_features(struct bonding *bond)
1400 1400
1401done: 1401done:
1402 features |= (bond_dev->features & BOND_VLAN_FEATURES); 1402 features |= (bond_dev->features & BOND_VLAN_FEATURES);
1403 bond_dev->features = netdev_fix_features(features, NULL); 1403 bond_dev->features = netdev_fix_features(bond_dev, features);
1404 bond_dev->vlan_features = netdev_fix_features(vlan_features, NULL); 1404 bond_dev->vlan_features = netdev_fix_features(bond_dev, vlan_features);
1405 bond_dev->hard_header_len = max_hard_header_len; 1405 bond_dev->hard_header_len = max_hard_header_len;
1406 1406
1407 return 0; 1407 return 0;
@@ -2733,6 +2733,10 @@ static int bond_arp_rcv(struct sk_buff *skb, struct net_device *dev, struct pack
2733 if (!slave || !slave_do_arp_validate(bond, slave)) 2733 if (!slave || !slave_do_arp_validate(bond, slave))
2734 goto out_unlock; 2734 goto out_unlock;
2735 2735
2736 skb = skb_share_check(skb, GFP_ATOMIC);
2737 if (!skb)
2738 goto out_unlock;
2739
2736 if (!pskb_may_pull(skb, arp_hdr_len(dev))) 2740 if (!pskb_may_pull(skb, arp_hdr_len(dev)))
2737 goto out_unlock; 2741 goto out_unlock;
2738 2742
diff --git a/drivers/net/bonding/bond_sysfs.c b/drivers/net/bonding/bond_sysfs.c
index 8fd0174c5380..72bb0f6cc9bf 100644
--- a/drivers/net/bonding/bond_sysfs.c
+++ b/drivers/net/bonding/bond_sysfs.c
@@ -1198,7 +1198,7 @@ static ssize_t bonding_store_carrier(struct device *d,
1198 bond->dev->name, new_value); 1198 bond->dev->name, new_value);
1199 } 1199 }
1200out: 1200out:
1201 return count; 1201 return ret;
1202} 1202}
1203static DEVICE_ATTR(use_carrier, S_IRUGO | S_IWUSR, 1203static DEVICE_ATTR(use_carrier, S_IRUGO | S_IWUSR,
1204 bonding_show_carrier, bonding_store_carrier); 1204 bonding_show_carrier, bonding_store_carrier);
@@ -1595,7 +1595,7 @@ static ssize_t bonding_store_slaves_active(struct device *d,
1595 } 1595 }
1596 } 1596 }
1597out: 1597out:
1598 return count; 1598 return ret;
1599} 1599}
1600static DEVICE_ATTR(all_slaves_active, S_IRUGO | S_IWUSR, 1600static DEVICE_ATTR(all_slaves_active, S_IRUGO | S_IWUSR,
1601 bonding_show_slaves_active, bonding_store_slaves_active); 1601 bonding_show_slaves_active, bonding_store_slaves_active);
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index d5a9db60ade9..5dec456fd4a4 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -23,7 +23,7 @@ config CAN_SLCAN
23 23
24 As only the sending and receiving of CAN frames is implemented, this 24 As only the sending and receiving of CAN frames is implemented, this
25 driver should work with the (serial/USB) CAN hardware from: 25 driver should work with the (serial/USB) CAN hardware from:
26 www.canusb.com / www.can232.com / www.mictronic.com / www.canhack.de 26 www.canusb.com / www.can232.com / www.mictronics.de / www.canhack.de
27 27
28 Userspace tools to attach the SLCAN line discipline (slcan_attach, 28 Userspace tools to attach the SLCAN line discipline (slcan_attach,
29 slcand) can be found in the can-utils at the SocketCAN SVN, see 29 slcand) can be found in the can-utils at the SocketCAN SVN, see
@@ -117,6 +117,8 @@ source "drivers/net/can/sja1000/Kconfig"
117 117
118source "drivers/net/can/usb/Kconfig" 118source "drivers/net/can/usb/Kconfig"
119 119
120source "drivers/net/can/softing/Kconfig"
121
120config CAN_DEBUG_DEVICES 122config CAN_DEBUG_DEVICES
121 bool "CAN devices debugging messages" 123 bool "CAN devices debugging messages"
122 depends on CAN 124 depends on CAN
diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile
index 07ca159ba3f9..53c82a71778e 100644
--- a/drivers/net/can/Makefile
+++ b/drivers/net/can/Makefile
@@ -9,6 +9,7 @@ obj-$(CONFIG_CAN_DEV) += can-dev.o
9can-dev-y := dev.o 9can-dev-y := dev.o
10 10
11obj-y += usb/ 11obj-y += usb/
12obj-y += softing/
12 13
13obj-$(CONFIG_CAN_SJA1000) += sja1000/ 14obj-$(CONFIG_CAN_SJA1000) += sja1000/
14obj-$(CONFIG_CAN_MSCAN) += mscan/ 15obj-$(CONFIG_CAN_MSCAN) += mscan/
diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c
index 7ef83d06f7ed..2532b9631538 100644
--- a/drivers/net/can/at91_can.c
+++ b/drivers/net/can/at91_can.c
@@ -2,7 +2,7 @@
2 * at91_can.c - CAN network driver for AT91 SoC CAN controller 2 * at91_can.c - CAN network driver for AT91 SoC CAN controller
3 * 3 *
4 * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de> 4 * (C) 2007 by Hans J. Koch <hjk@hansjkoch.de>
5 * (C) 2008, 2009, 2010 by Marc Kleine-Budde <kernel@pengutronix.de> 5 * (C) 2008, 2009, 2010, 2011 by Marc Kleine-Budde <kernel@pengutronix.de>
6 * 6 *
7 * This software may be distributed under the terms of the GNU General 7 * This software may be distributed under the terms of the GNU General
8 * Public License ("GPL") version 2 as distributed in the 'COPYING' 8 * Public License ("GPL") version 2 as distributed in the 'COPYING'
@@ -30,6 +30,7 @@
30#include <linux/module.h> 30#include <linux/module.h>
31#include <linux/netdevice.h> 31#include <linux/netdevice.h>
32#include <linux/platform_device.h> 32#include <linux/platform_device.h>
33#include <linux/rtnetlink.h>
33#include <linux/skbuff.h> 34#include <linux/skbuff.h>
34#include <linux/spinlock.h> 35#include <linux/spinlock.h>
35#include <linux/string.h> 36#include <linux/string.h>
@@ -40,22 +41,23 @@
40 41
41#include <mach/board.h> 42#include <mach/board.h>
42 43
43#define AT91_NAPI_WEIGHT 12 44#define AT91_NAPI_WEIGHT 11
44 45
45/* 46/*
46 * RX/TX Mailbox split 47 * RX/TX Mailbox split
47 * don't dare to touch 48 * don't dare to touch
48 */ 49 */
49#define AT91_MB_RX_NUM 12 50#define AT91_MB_RX_NUM 11
50#define AT91_MB_TX_SHIFT 2 51#define AT91_MB_TX_SHIFT 2
51 52
52#define AT91_MB_RX_FIRST 0 53#define AT91_MB_RX_FIRST 1
53#define AT91_MB_RX_LAST (AT91_MB_RX_FIRST + AT91_MB_RX_NUM - 1) 54#define AT91_MB_RX_LAST (AT91_MB_RX_FIRST + AT91_MB_RX_NUM - 1)
54 55
55#define AT91_MB_RX_MASK(i) ((1 << (i)) - 1) 56#define AT91_MB_RX_MASK(i) ((1 << (i)) - 1)
56#define AT91_MB_RX_SPLIT 8 57#define AT91_MB_RX_SPLIT 8
57#define AT91_MB_RX_LOW_LAST (AT91_MB_RX_SPLIT - 1) 58#define AT91_MB_RX_LOW_LAST (AT91_MB_RX_SPLIT - 1)
58#define AT91_MB_RX_LOW_MASK (AT91_MB_RX_MASK(AT91_MB_RX_SPLIT)) 59#define AT91_MB_RX_LOW_MASK (AT91_MB_RX_MASK(AT91_MB_RX_SPLIT) & \
60 ~AT91_MB_RX_MASK(AT91_MB_RX_FIRST))
59 61
60#define AT91_MB_TX_NUM (1 << AT91_MB_TX_SHIFT) 62#define AT91_MB_TX_NUM (1 << AT91_MB_TX_SHIFT)
61#define AT91_MB_TX_FIRST (AT91_MB_RX_LAST + 1) 63#define AT91_MB_TX_FIRST (AT91_MB_RX_LAST + 1)
@@ -168,6 +170,8 @@ struct at91_priv {
168 170
169 struct clk *clk; 171 struct clk *clk;
170 struct at91_can_data *pdata; 172 struct at91_can_data *pdata;
173
174 canid_t mb0_id;
171}; 175};
172 176
173static struct can_bittiming_const at91_bittiming_const = { 177static struct can_bittiming_const at91_bittiming_const = {
@@ -220,6 +224,18 @@ static inline void set_mb_mode(const struct at91_priv *priv, unsigned int mb,
220 set_mb_mode_prio(priv, mb, mode, 0); 224 set_mb_mode_prio(priv, mb, mode, 0);
221} 225}
222 226
227static inline u32 at91_can_id_to_reg_mid(canid_t can_id)
228{
229 u32 reg_mid;
230
231 if (can_id & CAN_EFF_FLAG)
232 reg_mid = (can_id & CAN_EFF_MASK) | AT91_MID_MIDE;
233 else
234 reg_mid = (can_id & CAN_SFF_MASK) << 18;
235
236 return reg_mid;
237}
238
223/* 239/*
224 * Swtich transceiver on or off 240 * Swtich transceiver on or off
225 */ 241 */
@@ -233,12 +249,22 @@ static void at91_setup_mailboxes(struct net_device *dev)
233{ 249{
234 struct at91_priv *priv = netdev_priv(dev); 250 struct at91_priv *priv = netdev_priv(dev);
235 unsigned int i; 251 unsigned int i;
252 u32 reg_mid;
236 253
237 /* 254 /*
238 * The first 12 mailboxes are used as a reception FIFO. The 255 * Due to a chip bug (errata 50.2.6.3 & 50.3.5.3) the first
239 * last mailbox is configured with overwrite option. The 256 * mailbox is disabled. The next 11 mailboxes are used as a
240 * overwrite flag indicates a FIFO overflow. 257 * reception FIFO. The last mailbox is configured with
258 * overwrite option. The overwrite flag indicates a FIFO
259 * overflow.
241 */ 260 */
261 reg_mid = at91_can_id_to_reg_mid(priv->mb0_id);
262 for (i = 0; i < AT91_MB_RX_FIRST; i++) {
263 set_mb_mode(priv, i, AT91_MB_MODE_DISABLED);
264 at91_write(priv, AT91_MID(i), reg_mid);
265 at91_write(priv, AT91_MCR(i), 0x0); /* clear dlc */
266 }
267
242 for (i = AT91_MB_RX_FIRST; i < AT91_MB_RX_LAST; i++) 268 for (i = AT91_MB_RX_FIRST; i < AT91_MB_RX_LAST; i++)
243 set_mb_mode(priv, i, AT91_MB_MODE_RX); 269 set_mb_mode(priv, i, AT91_MB_MODE_RX);
244 set_mb_mode(priv, AT91_MB_RX_LAST, AT91_MB_MODE_RX_OVRWR); 270 set_mb_mode(priv, AT91_MB_RX_LAST, AT91_MB_MODE_RX_OVRWR);
@@ -254,7 +280,8 @@ static void at91_setup_mailboxes(struct net_device *dev)
254 set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0); 280 set_mb_mode_prio(priv, i, AT91_MB_MODE_TX, 0);
255 281
256 /* Reset tx and rx helper pointers */ 282 /* Reset tx and rx helper pointers */
257 priv->tx_next = priv->tx_echo = priv->rx_next = 0; 283 priv->tx_next = priv->tx_echo = 0;
284 priv->rx_next = AT91_MB_RX_FIRST;
258} 285}
259 286
260static int at91_set_bittiming(struct net_device *dev) 287static int at91_set_bittiming(struct net_device *dev)
@@ -372,12 +399,7 @@ static netdev_tx_t at91_start_xmit(struct sk_buff *skb, struct net_device *dev)
372 netdev_err(dev, "BUG! TX buffer full when queue awake!\n"); 399 netdev_err(dev, "BUG! TX buffer full when queue awake!\n");
373 return NETDEV_TX_BUSY; 400 return NETDEV_TX_BUSY;
374 } 401 }
375 402 reg_mid = at91_can_id_to_reg_mid(cf->can_id);
376 if (cf->can_id & CAN_EFF_FLAG)
377 reg_mid = (cf->can_id & CAN_EFF_MASK) | AT91_MID_MIDE;
378 else
379 reg_mid = (cf->can_id & CAN_SFF_MASK) << 18;
380
381 reg_mcr = ((cf->can_id & CAN_RTR_FLAG) ? AT91_MCR_MRTR : 0) | 403 reg_mcr = ((cf->can_id & CAN_RTR_FLAG) ? AT91_MCR_MRTR : 0) |
382 (cf->can_dlc << 16) | AT91_MCR_MTCR; 404 (cf->can_dlc << 16) | AT91_MCR_MTCR;
383 405
@@ -539,27 +561,31 @@ static void at91_read_msg(struct net_device *dev, unsigned int mb)
539 * 561 *
540 * Theory of Operation: 562 * Theory of Operation:
541 * 563 *
542 * 12 of the 16 mailboxes on the chip are reserved for RX. we split 564 * 11 of the 16 mailboxes on the chip are reserved for RX. we split
543 * them into 2 groups. The lower group holds 8 and upper 4 mailboxes. 565 * them into 2 groups. The lower group holds 7 and upper 4 mailboxes.
544 * 566 *
545 * Like it or not, but the chip always saves a received CAN message 567 * Like it or not, but the chip always saves a received CAN message
546 * into the first free mailbox it finds (starting with the 568 * into the first free mailbox it finds (starting with the
547 * lowest). This makes it very difficult to read the messages in the 569 * lowest). This makes it very difficult to read the messages in the
548 * right order from the chip. This is how we work around that problem: 570 * right order from the chip. This is how we work around that problem:
549 * 571 *
550 * The first message goes into mb nr. 0 and issues an interrupt. All 572 * The first message goes into mb nr. 1 and issues an interrupt. All
551 * rx ints are disabled in the interrupt handler and a napi poll is 573 * rx ints are disabled in the interrupt handler and a napi poll is
552 * scheduled. We read the mailbox, but do _not_ reenable the mb (to 574 * scheduled. We read the mailbox, but do _not_ reenable the mb (to
553 * receive another message). 575 * receive another message).
554 * 576 *
555 * lower mbxs upper 577 * lower mbxs upper
556 * ______^______ __^__ 578 * ____^______ __^__
557 * / \ / \ 579 * / \ / \
558 * +-+-+-+-+-+-+-+-++-+-+-+-+ 580 * +-+-+-+-+-+-+-+-++-+-+-+-+
559 * |x|x|x|x|x|x|x|x|| | | | | 581 * | |x|x|x|x|x|x|x|| | | | |
560 * +-+-+-+-+-+-+-+-++-+-+-+-+ 582 * +-+-+-+-+-+-+-+-++-+-+-+-+
561 * 0 0 0 0 0 0 0 0 0 0 1 1 \ mail 583 * 0 0 0 0 0 0 0 0 0 0 1 1 \ mail
562 * 0 1 2 3 4 5 6 7 8 9 0 1 / box 584 * 0 1 2 3 4 5 6 7 8 9 0 1 / box
585 * ^
586 * |
587 * \
588 * unused, due to chip bug
563 * 589 *
564 * The variable priv->rx_next points to the next mailbox to read a 590 * The variable priv->rx_next points to the next mailbox to read a
565 * message from. As long we're in the lower mailboxes we just read the 591 * message from. As long we're in the lower mailboxes we just read the
@@ -590,10 +616,10 @@ static int at91_poll_rx(struct net_device *dev, int quota)
590 "order of incoming frames cannot be guaranteed\n"); 616 "order of incoming frames cannot be guaranteed\n");
591 617
592 again: 618 again:
593 for (mb = find_next_bit(addr, AT91_MB_RX_NUM, priv->rx_next); 619 for (mb = find_next_bit(addr, AT91_MB_RX_LAST + 1, priv->rx_next);
594 mb < AT91_MB_RX_NUM && quota > 0; 620 mb < AT91_MB_RX_LAST + 1 && quota > 0;
595 reg_sr = at91_read(priv, AT91_SR), 621 reg_sr = at91_read(priv, AT91_SR),
596 mb = find_next_bit(addr, AT91_MB_RX_NUM, ++priv->rx_next)) { 622 mb = find_next_bit(addr, AT91_MB_RX_LAST + 1, ++priv->rx_next)) {
597 at91_read_msg(dev, mb); 623 at91_read_msg(dev, mb);
598 624
599 /* reactivate mailboxes */ 625 /* reactivate mailboxes */
@@ -610,8 +636,8 @@ static int at91_poll_rx(struct net_device *dev, int quota)
610 636
611 /* upper group completed, look again in lower */ 637 /* upper group completed, look again in lower */
612 if (priv->rx_next > AT91_MB_RX_LOW_LAST && 638 if (priv->rx_next > AT91_MB_RX_LOW_LAST &&
613 quota > 0 && mb >= AT91_MB_RX_NUM) { 639 quota > 0 && mb > AT91_MB_RX_LAST) {
614 priv->rx_next = 0; 640 priv->rx_next = AT91_MB_RX_FIRST;
615 goto again; 641 goto again;
616 } 642 }
617 643
@@ -1037,6 +1063,64 @@ static const struct net_device_ops at91_netdev_ops = {
1037 .ndo_start_xmit = at91_start_xmit, 1063 .ndo_start_xmit = at91_start_xmit,
1038}; 1064};
1039 1065
1066static ssize_t at91_sysfs_show_mb0_id(struct device *dev,
1067 struct device_attribute *attr, char *buf)
1068{
1069 struct at91_priv *priv = netdev_priv(to_net_dev(dev));
1070
1071 if (priv->mb0_id & CAN_EFF_FLAG)
1072 return snprintf(buf, PAGE_SIZE, "0x%08x\n", priv->mb0_id);
1073 else
1074 return snprintf(buf, PAGE_SIZE, "0x%03x\n", priv->mb0_id);
1075}
1076
1077static ssize_t at91_sysfs_set_mb0_id(struct device *dev,
1078 struct device_attribute *attr, const char *buf, size_t count)
1079{
1080 struct net_device *ndev = to_net_dev(dev);
1081 struct at91_priv *priv = netdev_priv(ndev);
1082 unsigned long can_id;
1083 ssize_t ret;
1084 int err;
1085
1086 rtnl_lock();
1087
1088 if (ndev->flags & IFF_UP) {
1089 ret = -EBUSY;
1090 goto out;
1091 }
1092
1093 err = strict_strtoul(buf, 0, &can_id);
1094 if (err) {
1095 ret = err;
1096 goto out;
1097 }
1098
1099 if (can_id & CAN_EFF_FLAG)
1100 can_id &= CAN_EFF_MASK | CAN_EFF_FLAG;
1101 else
1102 can_id &= CAN_SFF_MASK;
1103
1104 priv->mb0_id = can_id;
1105 ret = count;
1106
1107 out:
1108 rtnl_unlock();
1109 return ret;
1110}
1111
1112static DEVICE_ATTR(mb0_id, S_IWUGO | S_IRUGO,
1113 at91_sysfs_show_mb0_id, at91_sysfs_set_mb0_id);
1114
1115static struct attribute *at91_sysfs_attrs[] = {
1116 &dev_attr_mb0_id.attr,
1117 NULL,
1118};
1119
1120static struct attribute_group at91_sysfs_attr_group = {
1121 .attrs = at91_sysfs_attrs,
1122};
1123
1040static int __devinit at91_can_probe(struct platform_device *pdev) 1124static int __devinit at91_can_probe(struct platform_device *pdev)
1041{ 1125{
1042 struct net_device *dev; 1126 struct net_device *dev;
@@ -1082,6 +1166,7 @@ static int __devinit at91_can_probe(struct platform_device *pdev)
1082 dev->netdev_ops = &at91_netdev_ops; 1166 dev->netdev_ops = &at91_netdev_ops;
1083 dev->irq = irq; 1167 dev->irq = irq;
1084 dev->flags |= IFF_ECHO; 1168 dev->flags |= IFF_ECHO;
1169 dev->sysfs_groups[0] = &at91_sysfs_attr_group;
1085 1170
1086 priv = netdev_priv(dev); 1171 priv = netdev_priv(dev);
1087 priv->can.clock.freq = clk_get_rate(clk); 1172 priv->can.clock.freq = clk_get_rate(clk);
@@ -1093,6 +1178,7 @@ static int __devinit at91_can_probe(struct platform_device *pdev)
1093 priv->dev = dev; 1178 priv->dev = dev;
1094 priv->clk = clk; 1179 priv->clk = clk;
1095 priv->pdata = pdev->dev.platform_data; 1180 priv->pdata = pdev->dev.platform_data;
1181 priv->mb0_id = 0x7ff;
1096 1182
1097 netif_napi_add(dev, &priv->napi, at91_poll, AT91_NAPI_WEIGHT); 1183 netif_napi_add(dev, &priv->napi, at91_poll, AT91_NAPI_WEIGHT);
1098 1184
diff --git a/drivers/net/can/softing/Kconfig b/drivers/net/can/softing/Kconfig
new file mode 100644
index 000000000000..92bd6bdde5e3
--- /dev/null
+++ b/drivers/net/can/softing/Kconfig
@@ -0,0 +1,30 @@
1config CAN_SOFTING
2 tristate "Softing Gmbh CAN generic support"
3 depends on CAN_DEV
4 ---help---
5 Support for CAN cards from Softing Gmbh & some cards
6 from Vector Gmbh.
7 Softing Gmbh CAN cards come with 1 or 2 physical busses.
8 Those cards typically use Dual Port RAM to communicate
9 with the host CPU. The interface is then identical for PCI
10 and PCMCIA cards. This driver operates on a platform device,
11 which has been created by softing_cs or softing_pci driver.
12 Warning:
13 The API of the card does not allow fine control per bus, but
14 controls the 2 busses on the card together.
15 As such, some actions (start/stop/busoff recovery) on 1 bus
16 must bring down the other bus too temporarily.
17
18config CAN_SOFTING_CS
19 tristate "Softing Gmbh CAN pcmcia cards"
20 depends on PCMCIA
21 select CAN_SOFTING
22 ---help---
23 Support for PCMCIA cards from Softing Gmbh & some cards
24 from Vector Gmbh.
25 You need firmware for these, which you can get at
26 http://developer.berlios.de/projects/socketcan/
27 This version of the driver is written against
28 firmware version 4.6 (softing-fw-4.6-binaries.tar.gz)
29 In order to use the card as CAN device, you need the Softing generic
30 support too.
diff --git a/drivers/net/can/softing/Makefile b/drivers/net/can/softing/Makefile
new file mode 100644
index 000000000000..c5e5016c742e
--- /dev/null
+++ b/drivers/net/can/softing/Makefile
@@ -0,0 +1,6 @@
1
2softing-y := softing_main.o softing_fw.o
3obj-$(CONFIG_CAN_SOFTING) += softing.o
4obj-$(CONFIG_CAN_SOFTING_CS) += softing_cs.o
5
6ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/softing/softing.h b/drivers/net/can/softing/softing.h
new file mode 100644
index 000000000000..7ec9f4db3d52
--- /dev/null
+++ b/drivers/net/can/softing/softing.h
@@ -0,0 +1,167 @@
1/*
2 * softing common interfaces
3 *
4 * by Kurt Van Dijck, 2008-2010
5 */
6
7#include <linux/atomic.h>
8#include <linux/netdevice.h>
9#include <linux/ktime.h>
10#include <linux/mutex.h>
11#include <linux/spinlock.h>
12#include <linux/can.h>
13#include <linux/can/dev.h>
14
15#include "softing_platform.h"
16
17struct softing;
18
19struct softing_priv {
20 struct can_priv can; /* must be the first member! */
21 struct net_device *netdev;
22 struct softing *card;
23 struct {
24 int pending;
25 /* variables wich hold the circular buffer */
26 int echo_put;
27 int echo_get;
28 } tx;
29 struct can_bittiming_const btr_const;
30 int index;
31 uint8_t output;
32 uint16_t chip;
33};
34#define netdev2softing(netdev) ((struct softing_priv *)netdev_priv(netdev))
35
36struct softing {
37 const struct softing_platform_data *pdat;
38 struct platform_device *pdev;
39 struct net_device *net[2];
40 spinlock_t spin; /* protect this structure & DPRAM access */
41 ktime_t ts_ref;
42 ktime_t ts_overflow; /* timestamp overflow value, in ktime */
43
44 struct {
45 /* indication of firmware status */
46 int up;
47 /* protection of the 'up' variable */
48 struct mutex lock;
49 } fw;
50 struct {
51 int nr;
52 int requested;
53 int svc_count;
54 unsigned int dpram_position;
55 } irq;
56 struct {
57 int pending;
58 int last_bus;
59 /*
60 * keep the bus that last tx'd a message,
61 * in order to let every netdev queue resume
62 */
63 } tx;
64 __iomem uint8_t *dpram;
65 unsigned long dpram_phys;
66 unsigned long dpram_size;
67 struct {
68 uint16_t fw_version, hw_version, license, serial;
69 uint16_t chip[2];
70 unsigned int freq; /* remote cpu's operating frequency */
71 } id;
72};
73
74extern int softing_default_output(struct net_device *netdev);
75
76extern ktime_t softing_raw2ktime(struct softing *card, u32 raw);
77
78extern int softing_chip_poweron(struct softing *card);
79
80extern int softing_bootloader_command(struct softing *card, int16_t cmd,
81 const char *msg);
82
83/* Load firmware after reset */
84extern int softing_load_fw(const char *file, struct softing *card,
85 __iomem uint8_t *virt, unsigned int size, int offset);
86
87/* Load final application firmware after bootloader */
88extern int softing_load_app_fw(const char *file, struct softing *card);
89
90/*
91 * enable or disable irq
92 * only called with fw.lock locked
93 */
94extern int softing_enable_irq(struct softing *card, int enable);
95
96/* start/stop 1 bus on card */
97extern int softing_startstop(struct net_device *netdev, int up);
98
99/* netif_rx() */
100extern int softing_netdev_rx(struct net_device *netdev,
101 const struct can_frame *msg, ktime_t ktime);
102
103/* SOFTING DPRAM mappings */
104#define DPRAM_RX 0x0000
105 #define DPRAM_RX_SIZE 32
106 #define DPRAM_RX_CNT 16
107#define DPRAM_RX_RD 0x0201 /* uint8_t */
108#define DPRAM_RX_WR 0x0205 /* uint8_t */
109#define DPRAM_RX_LOST 0x0207 /* uint8_t */
110
111#define DPRAM_FCT_PARAM 0x0300 /* int16_t [20] */
112#define DPRAM_FCT_RESULT 0x0328 /* int16_t */
113#define DPRAM_FCT_HOST 0x032b /* uint16_t */
114
115#define DPRAM_INFO_BUSSTATE 0x0331 /* uint16_t */
116#define DPRAM_INFO_BUSSTATE2 0x0335 /* uint16_t */
117#define DPRAM_INFO_ERRSTATE 0x0339 /* uint16_t */
118#define DPRAM_INFO_ERRSTATE2 0x033d /* uint16_t */
119#define DPRAM_RESET 0x0341 /* uint16_t */
120#define DPRAM_CLR_RECV_FIFO 0x0345 /* uint16_t */
121#define DPRAM_RESET_TIME 0x034d /* uint16_t */
122#define DPRAM_TIME 0x0350 /* uint64_t */
123#define DPRAM_WR_START 0x0358 /* uint8_t */
124#define DPRAM_WR_END 0x0359 /* uint8_t */
125#define DPRAM_RESET_RX_FIFO 0x0361 /* uint16_t */
126#define DPRAM_RESET_TX_FIFO 0x0364 /* uint8_t */
127#define DPRAM_READ_FIFO_LEVEL 0x0365 /* uint8_t */
128#define DPRAM_RX_FIFO_LEVEL 0x0366 /* uint16_t */
129#define DPRAM_TX_FIFO_LEVEL 0x0366 /* uint16_t */
130
131#define DPRAM_TX 0x0400 /* uint16_t */
132 #define DPRAM_TX_SIZE 16
133 #define DPRAM_TX_CNT 32
134#define DPRAM_TX_RD 0x0601 /* uint8_t */
135#define DPRAM_TX_WR 0x0605 /* uint8_t */
136
137#define DPRAM_COMMAND 0x07e0 /* uint16_t */
138#define DPRAM_RECEIPT 0x07f0 /* uint16_t */
139#define DPRAM_IRQ_TOHOST 0x07fe /* uint8_t */
140#define DPRAM_IRQ_TOCARD 0x07ff /* uint8_t */
141
142#define DPRAM_V2_RESET 0x0e00 /* uint8_t */
143#define DPRAM_V2_IRQ_TOHOST 0x0e02 /* uint8_t */
144
145#define TXMAX (DPRAM_TX_CNT - 1)
146
147/* DPRAM return codes */
148#define RES_NONE 0
149#define RES_OK 1
150#define RES_NOK 2
151#define RES_UNKNOWN 3
152/* DPRAM flags */
153#define CMD_TX 0x01
154#define CMD_ACK 0x02
155#define CMD_XTD 0x04
156#define CMD_RTR 0x08
157#define CMD_ERR 0x10
158#define CMD_BUS2 0x80
159
160/* returned fifo entry bus state masks */
161#define SF_MASK_BUSOFF 0x80
162#define SF_MASK_EPASSIVE 0x60
163
164/* bus states */
165#define STATE_BUSOFF 2
166#define STATE_EPASSIVE 1
167#define STATE_EACTIVE 0
diff --git a/drivers/net/can/softing/softing_cs.c b/drivers/net/can/softing/softing_cs.c
new file mode 100644
index 000000000000..300fe75dd1a7
--- /dev/null
+++ b/drivers/net/can/softing/softing_cs.c
@@ -0,0 +1,359 @@
1/*
2 * Copyright (C) 2008-2010
3 *
4 * - Kurt Van Dijck, EIA Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/module.h>
21#include <linux/kernel.h>
22
23#include <pcmcia/cistpl.h>
24#include <pcmcia/ds.h>
25
26#include "softing_platform.h"
27
28static int softingcs_index;
29static spinlock_t softingcs_index_lock;
30
31static int softingcs_reset(struct platform_device *pdev, int v);
32static int softingcs_enable_irq(struct platform_device *pdev, int v);
33
34/*
35 * platform_data descriptions
36 */
37#define MHZ (1000*1000)
38static const struct softing_platform_data softingcs_platform_data[] = {
39{
40 .name = "CANcard",
41 .manf = 0x0168, .prod = 0x001,
42 .generation = 1,
43 .nbus = 2,
44 .freq = 16 * MHZ, .max_brp = 32, .max_sjw = 4,
45 .dpram_size = 0x0800,
46 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
47 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
48 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
49 .reset = softingcs_reset,
50 .enable_irq = softingcs_enable_irq,
51}, {
52 .name = "CANcard-NEC",
53 .manf = 0x0168, .prod = 0x002,
54 .generation = 1,
55 .nbus = 2,
56 .freq = 16 * MHZ, .max_brp = 32, .max_sjw = 4,
57 .dpram_size = 0x0800,
58 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
59 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
60 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
61 .reset = softingcs_reset,
62 .enable_irq = softingcs_enable_irq,
63}, {
64 .name = "CANcard-SJA",
65 .manf = 0x0168, .prod = 0x004,
66 .generation = 1,
67 .nbus = 2,
68 .freq = 20 * MHZ, .max_brp = 32, .max_sjw = 4,
69 .dpram_size = 0x0800,
70 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
71 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
72 .app = {0x0010, 0x0d0000, fw_dir "cansja.bin",},
73 .reset = softingcs_reset,
74 .enable_irq = softingcs_enable_irq,
75}, {
76 .name = "CANcard-2",
77 .manf = 0x0168, .prod = 0x005,
78 .generation = 2,
79 .nbus = 2,
80 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4,
81 .dpram_size = 0x1000,
82 .boot = {0x0000, 0x000000, fw_dir "bcard2.bin",},
83 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
84 .app = {0x0010, 0x0d0000, fw_dir "cancrd2.bin",},
85 .reset = softingcs_reset,
86 .enable_irq = NULL,
87}, {
88 .name = "Vector-CANcard",
89 .manf = 0x0168, .prod = 0x081,
90 .generation = 1,
91 .nbus = 2,
92 .freq = 16 * MHZ, .max_brp = 64, .max_sjw = 4,
93 .dpram_size = 0x0800,
94 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
95 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
96 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
97 .reset = softingcs_reset,
98 .enable_irq = softingcs_enable_irq,
99}, {
100 .name = "Vector-CANcard-SJA",
101 .manf = 0x0168, .prod = 0x084,
102 .generation = 1,
103 .nbus = 2,
104 .freq = 20 * MHZ, .max_brp = 32, .max_sjw = 4,
105 .dpram_size = 0x0800,
106 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
107 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
108 .app = {0x0010, 0x0d0000, fw_dir "cansja.bin",},
109 .reset = softingcs_reset,
110 .enable_irq = softingcs_enable_irq,
111}, {
112 .name = "Vector-CANcard-2",
113 .manf = 0x0168, .prod = 0x085,
114 .generation = 2,
115 .nbus = 2,
116 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4,
117 .dpram_size = 0x1000,
118 .boot = {0x0000, 0x000000, fw_dir "bcard2.bin",},
119 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
120 .app = {0x0010, 0x0d0000, fw_dir "cancrd2.bin",},
121 .reset = softingcs_reset,
122 .enable_irq = NULL,
123}, {
124 .name = "EDICcard-NEC",
125 .manf = 0x0168, .prod = 0x102,
126 .generation = 1,
127 .nbus = 2,
128 .freq = 16 * MHZ, .max_brp = 64, .max_sjw = 4,
129 .dpram_size = 0x0800,
130 .boot = {0x0000, 0x000000, fw_dir "bcard.bin",},
131 .load = {0x0120, 0x00f600, fw_dir "ldcard.bin",},
132 .app = {0x0010, 0x0d0000, fw_dir "cancard.bin",},
133 .reset = softingcs_reset,
134 .enable_irq = softingcs_enable_irq,
135}, {
136 .name = "EDICcard-2",
137 .manf = 0x0168, .prod = 0x105,
138 .generation = 2,
139 .nbus = 2,
140 .freq = 24 * MHZ, .max_brp = 64, .max_sjw = 4,
141 .dpram_size = 0x1000,
142 .boot = {0x0000, 0x000000, fw_dir "bcard2.bin",},
143 .load = {0x0120, 0x00f600, fw_dir "ldcard2.bin",},
144 .app = {0x0010, 0x0d0000, fw_dir "cancrd2.bin",},
145 .reset = softingcs_reset,
146 .enable_irq = NULL,
147}, {
148 0, 0,
149},
150};
151
152MODULE_FIRMWARE(fw_dir "bcard.bin");
153MODULE_FIRMWARE(fw_dir "ldcard.bin");
154MODULE_FIRMWARE(fw_dir "cancard.bin");
155MODULE_FIRMWARE(fw_dir "cansja.bin");
156
157MODULE_FIRMWARE(fw_dir "bcard2.bin");
158MODULE_FIRMWARE(fw_dir "ldcard2.bin");
159MODULE_FIRMWARE(fw_dir "cancrd2.bin");
160
161static __devinit const struct softing_platform_data
162*softingcs_find_platform_data(unsigned int manf, unsigned int prod)
163{
164 const struct softing_platform_data *lp;
165
166 for (lp = softingcs_platform_data; lp->manf; ++lp) {
167 if ((lp->manf == manf) && (lp->prod == prod))
168 return lp;
169 }
170 return NULL;
171}
172
173/*
174 * platformdata callbacks
175 */
176static int softingcs_reset(struct platform_device *pdev, int v)
177{
178 struct pcmcia_device *pcmcia = to_pcmcia_dev(pdev->dev.parent);
179
180 dev_dbg(&pdev->dev, "pcmcia config [2] %02x\n", v ? 0 : 0x20);
181 return pcmcia_write_config_byte(pcmcia, 2, v ? 0 : 0x20);
182}
183
184static int softingcs_enable_irq(struct platform_device *pdev, int v)
185{
186 struct pcmcia_device *pcmcia = to_pcmcia_dev(pdev->dev.parent);
187
188 dev_dbg(&pdev->dev, "pcmcia config [0] %02x\n", v ? 0x60 : 0);
189 return pcmcia_write_config_byte(pcmcia, 0, v ? 0x60 : 0);
190}
191
192/*
193 * pcmcia check
194 */
195static __devinit int softingcs_probe_config(struct pcmcia_device *pcmcia,
196 void *priv_data)
197{
198 struct softing_platform_data *pdat = priv_data;
199 struct resource *pres;
200 int memspeed = 0;
201
202 WARN_ON(!pdat);
203 pres = pcmcia->resource[PCMCIA_IOMEM_0];
204 if (resource_size(pres) < 0x1000)
205 return -ERANGE;
206
207 pres->flags |= WIN_MEMORY_TYPE_CM | WIN_ENABLE;
208 if (pdat->generation < 2) {
209 pres->flags |= WIN_USE_WAIT | WIN_DATA_WIDTH_8;
210 memspeed = 3;
211 } else {
212 pres->flags |= WIN_DATA_WIDTH_16;
213 }
214 return pcmcia_request_window(pcmcia, pres, memspeed);
215}
216
217static __devexit void softingcs_remove(struct pcmcia_device *pcmcia)
218{
219 struct platform_device *pdev = pcmcia->priv;
220
221 /* free bits */
222 platform_device_unregister(pdev);
223 /* release pcmcia stuff */
224 pcmcia_disable_device(pcmcia);
225}
226
227/*
228 * platform_device wrapper
229 * pdev->resource has 2 entries: io & irq
230 */
231static void softingcs_pdev_release(struct device *dev)
232{
233 struct platform_device *pdev = to_platform_device(dev);
234 kfree(pdev);
235}
236
237static __devinit int softingcs_probe(struct pcmcia_device *pcmcia)
238{
239 int ret;
240 struct platform_device *pdev;
241 const struct softing_platform_data *pdat;
242 struct resource *pres;
243 struct dev {
244 struct platform_device pdev;
245 struct resource res[2];
246 } *dev;
247
248 /* find matching platform_data */
249 pdat = softingcs_find_platform_data(pcmcia->manf_id, pcmcia->card_id);
250 if (!pdat)
251 return -ENOTTY;
252
253 /* setup pcmcia device */
254 pcmcia->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IOMEM |
255 CONF_AUTO_SET_VPP | CONF_AUTO_CHECK_VCC;
256 ret = pcmcia_loop_config(pcmcia, softingcs_probe_config, (void *)pdat);
257 if (ret)
258 goto pcmcia_failed;
259
260 ret = pcmcia_enable_device(pcmcia);
261 if (ret < 0)
262 goto pcmcia_failed;
263
264 pres = pcmcia->resource[PCMCIA_IOMEM_0];
265 if (!pres) {
266 ret = -EBADF;
267 goto pcmcia_bad;
268 }
269
270 /* create softing platform device */
271 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
272 if (!dev) {
273 ret = -ENOMEM;
274 goto mem_failed;
275 }
276 dev->pdev.resource = dev->res;
277 dev->pdev.num_resources = ARRAY_SIZE(dev->res);
278 dev->pdev.dev.release = softingcs_pdev_release;
279
280 pdev = &dev->pdev;
281 pdev->dev.platform_data = (void *)pdat;
282 pdev->dev.parent = &pcmcia->dev;
283 pcmcia->priv = pdev;
284
285 /* platform device resources */
286 pdev->resource[0].flags = IORESOURCE_MEM;
287 pdev->resource[0].start = pres->start;
288 pdev->resource[0].end = pres->end;
289
290 pdev->resource[1].flags = IORESOURCE_IRQ;
291 pdev->resource[1].start = pcmcia->irq;
292 pdev->resource[1].end = pdev->resource[1].start;
293
294 /* platform device setup */
295 spin_lock(&softingcs_index_lock);
296 pdev->id = softingcs_index++;
297 spin_unlock(&softingcs_index_lock);
298 pdev->name = "softing";
299 dev_set_name(&pdev->dev, "softingcs.%i", pdev->id);
300 ret = platform_device_register(pdev);
301 if (ret < 0)
302 goto platform_failed;
303
304 dev_info(&pcmcia->dev, "created %s\n", dev_name(&pdev->dev));
305 return 0;
306
307platform_failed:
308 kfree(dev);
309mem_failed:
310pcmcia_bad:
311pcmcia_failed:
312 pcmcia_disable_device(pcmcia);
313 pcmcia->priv = NULL;
314 return ret ?: -ENODEV;
315}
316
317static /*const*/ struct pcmcia_device_id softingcs_ids[] = {
318 /* softing */
319 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0001),
320 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0002),
321 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0004),
322 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0005),
323 /* vector, manufacturer? */
324 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0081),
325 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0084),
326 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0085),
327 /* EDIC */
328 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0102),
329 PCMCIA_DEVICE_MANF_CARD(0x0168, 0x0105),
330 PCMCIA_DEVICE_NULL,
331};
332
333MODULE_DEVICE_TABLE(pcmcia, softingcs_ids);
334
335static struct pcmcia_driver softingcs_driver = {
336 .owner = THIS_MODULE,
337 .name = "softingcs",
338 .id_table = softingcs_ids,
339 .probe = softingcs_probe,
340 .remove = __devexit_p(softingcs_remove),
341};
342
343static int __init softingcs_start(void)
344{
345 spin_lock_init(&softingcs_index_lock);
346 return pcmcia_register_driver(&softingcs_driver);
347}
348
349static void __exit softingcs_stop(void)
350{
351 pcmcia_unregister_driver(&softingcs_driver);
352}
353
354module_init(softingcs_start);
355module_exit(softingcs_stop);
356
357MODULE_DESCRIPTION("softing CANcard driver"
358 ", links PCMCIA card to softing driver");
359MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/can/softing/softing_fw.c b/drivers/net/can/softing/softing_fw.c
new file mode 100644
index 000000000000..b520784fb197
--- /dev/null
+++ b/drivers/net/can/softing/softing_fw.c
@@ -0,0 +1,691 @@
1/*
2 * Copyright (C) 2008-2010
3 *
4 * - Kurt Van Dijck, EIA Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/firmware.h>
21#include <linux/sched.h>
22#include <asm/div64.h>
23
24#include "softing.h"
25
26/*
27 * low level DPRAM command.
28 * Make sure that card->dpram[DPRAM_FCT_HOST] is preset
29 */
30static int _softing_fct_cmd(struct softing *card, int16_t cmd, uint16_t vector,
31 const char *msg)
32{
33 int ret;
34 unsigned long stamp;
35
36 iowrite16(cmd, &card->dpram[DPRAM_FCT_PARAM]);
37 iowrite8(vector >> 8, &card->dpram[DPRAM_FCT_HOST + 1]);
38 iowrite8(vector, &card->dpram[DPRAM_FCT_HOST]);
39 /* be sure to flush this to the card */
40 wmb();
41 stamp = jiffies + 1 * HZ;
42 /* wait for card */
43 do {
44 /* DPRAM_FCT_HOST is _not_ aligned */
45 ret = ioread8(&card->dpram[DPRAM_FCT_HOST]) +
46 (ioread8(&card->dpram[DPRAM_FCT_HOST + 1]) << 8);
47 /* don't have any cached variables */
48 rmb();
49 if (ret == RES_OK)
50 /* read return-value now */
51 return ioread16(&card->dpram[DPRAM_FCT_RESULT]);
52
53 if ((ret != vector) || time_after(jiffies, stamp))
54 break;
55 /* process context => relax */
56 usleep_range(500, 10000);
57 } while (1);
58
59 ret = (ret == RES_NONE) ? -ETIMEDOUT : -ECANCELED;
60 dev_alert(&card->pdev->dev, "firmware %s failed (%i)\n", msg, ret);
61 return ret;
62}
63
64static int softing_fct_cmd(struct softing *card, int16_t cmd, const char *msg)
65{
66 int ret;
67
68 ret = _softing_fct_cmd(card, cmd, 0, msg);
69 if (ret > 0) {
70 dev_alert(&card->pdev->dev, "%s returned %u\n", msg, ret);
71 ret = -EIO;
72 }
73 return ret;
74}
75
76int softing_bootloader_command(struct softing *card, int16_t cmd,
77 const char *msg)
78{
79 int ret;
80 unsigned long stamp;
81
82 iowrite16(RES_NONE, &card->dpram[DPRAM_RECEIPT]);
83 iowrite16(cmd, &card->dpram[DPRAM_COMMAND]);
84 /* be sure to flush this to the card */
85 wmb();
86 stamp = jiffies + 3 * HZ;
87 /* wait for card */
88 do {
89 ret = ioread16(&card->dpram[DPRAM_RECEIPT]);
90 /* don't have any cached variables */
91 rmb();
92 if (ret == RES_OK)
93 return 0;
94 if (time_after(jiffies, stamp))
95 break;
96 /* process context => relax */
97 usleep_range(500, 10000);
98 } while (!signal_pending(current));
99
100 ret = (ret == RES_NONE) ? -ETIMEDOUT : -ECANCELED;
101 dev_alert(&card->pdev->dev, "bootloader %s failed (%i)\n", msg, ret);
102 return ret;
103}
104
105static int fw_parse(const uint8_t **pmem, uint16_t *ptype, uint32_t *paddr,
106 uint16_t *plen, const uint8_t **pdat)
107{
108 uint16_t checksum[2];
109 const uint8_t *mem;
110 const uint8_t *end;
111
112 /*
113 * firmware records are a binary, unaligned stream composed of:
114 * uint16_t type;
115 * uint32_t addr;
116 * uint16_t len;
117 * uint8_t dat[len];
118 * uint16_t checksum;
119 * all values in little endian.
120 * We could define a struct for this, with __attribute__((packed)),
121 * but would that solve the alignment in _all_ cases (cfr. the
122 * struct itself may be an odd address)?
123 *
124 * I chose to use leXX_to_cpup() since this solves both
125 * endianness & alignment.
126 */
127 mem = *pmem;
128 *ptype = le16_to_cpup((void *)&mem[0]);
129 *paddr = le32_to_cpup((void *)&mem[2]);
130 *plen = le16_to_cpup((void *)&mem[6]);
131 *pdat = &mem[8];
132 /* verify checksum */
133 end = &mem[8 + *plen];
134 checksum[0] = le16_to_cpup((void *)end);
135 for (checksum[1] = 0; mem < end; ++mem)
136 checksum[1] += *mem;
137 if (checksum[0] != checksum[1])
138 return -EINVAL;
139 /* increment */
140 *pmem += 10 + *plen;
141 return 0;
142}
143
144int softing_load_fw(const char *file, struct softing *card,
145 __iomem uint8_t *dpram, unsigned int size, int offset)
146{
147 const struct firmware *fw;
148 int ret;
149 const uint8_t *mem, *end, *dat;
150 uint16_t type, len;
151 uint32_t addr;
152 uint8_t *buf = NULL;
153 int buflen = 0;
154 int8_t type_end = 0;
155
156 ret = request_firmware(&fw, file, &card->pdev->dev);
157 if (ret < 0)
158 return ret;
159 dev_dbg(&card->pdev->dev, "%s, firmware(%s) got %u bytes"
160 ", offset %c0x%04x\n",
161 card->pdat->name, file, (unsigned int)fw->size,
162 (offset >= 0) ? '+' : '-', (unsigned int)abs(offset));
163 /* parse the firmware */
164 mem = fw->data;
165 end = &mem[fw->size];
166 /* look for header record */
167 ret = fw_parse(&mem, &type, &addr, &len, &dat);
168 if (ret < 0)
169 goto failed;
170 if (type != 0xffff)
171 goto failed;
172 if (strncmp("Structured Binary Format, Softing GmbH" , dat, len)) {
173 ret = -EINVAL;
174 goto failed;
175 }
176 /* ok, we had a header */
177 while (mem < end) {
178 ret = fw_parse(&mem, &type, &addr, &len, &dat);
179 if (ret < 0)
180 goto failed;
181 if (type == 3) {
182 /* start address, not used here */
183 continue;
184 } else if (type == 1) {
185 /* eof */
186 type_end = 1;
187 break;
188 } else if (type != 0) {
189 ret = -EINVAL;
190 goto failed;
191 }
192
193 if ((addr + len + offset) > size)
194 goto failed;
195 memcpy_toio(&dpram[addr + offset], dat, len);
196 /* be sure to flush caches from IO space */
197 mb();
198 if (len > buflen) {
199 /* align buflen */
200 buflen = (len + (1024-1)) & ~(1024-1);
201 buf = krealloc(buf, buflen, GFP_KERNEL);
202 if (!buf) {
203 ret = -ENOMEM;
204 goto failed;
205 }
206 }
207 /* verify record data */
208 memcpy_fromio(buf, &dpram[addr + offset], len);
209 if (memcmp(buf, dat, len)) {
210 /* is not ok */
211 dev_alert(&card->pdev->dev, "DPRAM readback failed\n");
212 ret = -EIO;
213 goto failed;
214 }
215 }
216 if (!type_end)
217 /* no end record seen */
218 goto failed;
219 ret = 0;
220failed:
221 kfree(buf);
222 release_firmware(fw);
223 if (ret < 0)
224 dev_info(&card->pdev->dev, "firmware %s failed\n", file);
225 return ret;
226}
227
228int softing_load_app_fw(const char *file, struct softing *card)
229{
230 const struct firmware *fw;
231 const uint8_t *mem, *end, *dat;
232 int ret, j;
233 uint16_t type, len;
234 uint32_t addr, start_addr = 0;
235 unsigned int sum, rx_sum;
236 int8_t type_end = 0, type_entrypoint = 0;
237
238 ret = request_firmware(&fw, file, &card->pdev->dev);
239 if (ret) {
240 dev_alert(&card->pdev->dev, "request_firmware(%s) got %i\n",
241 file, ret);
242 return ret;
243 }
244 dev_dbg(&card->pdev->dev, "firmware(%s) got %lu bytes\n",
245 file, (unsigned long)fw->size);
246 /* parse the firmware */
247 mem = fw->data;
248 end = &mem[fw->size];
249 /* look for header record */
250 ret = fw_parse(&mem, &type, &addr, &len, &dat);
251 if (ret)
252 goto failed;
253 ret = -EINVAL;
254 if (type != 0xffff) {
255 dev_alert(&card->pdev->dev, "firmware starts with type 0x%x\n",
256 type);
257 goto failed;
258 }
259 if (strncmp("Structured Binary Format, Softing GmbH", dat, len)) {
260 dev_alert(&card->pdev->dev, "firmware string '%.*s' fault\n",
261 len, dat);
262 goto failed;
263 }
264 /* ok, we had a header */
265 while (mem < end) {
266 ret = fw_parse(&mem, &type, &addr, &len, &dat);
267 if (ret)
268 goto failed;
269
270 if (type == 3) {
271 /* start address */
272 start_addr = addr;
273 type_entrypoint = 1;
274 continue;
275 } else if (type == 1) {
276 /* eof */
277 type_end = 1;
278 break;
279 } else if (type != 0) {
280 dev_alert(&card->pdev->dev,
281 "unknown record type 0x%04x\n", type);
282 ret = -EINVAL;
283 goto failed;
284 }
285
286 /* regualar data */
287 for (sum = 0, j = 0; j < len; ++j)
288 sum += dat[j];
289 /* work in 16bit (target) */
290 sum &= 0xffff;
291
292 memcpy_toio(&card->dpram[card->pdat->app.offs], dat, len);
293 iowrite32(card->pdat->app.offs + card->pdat->app.addr,
294 &card->dpram[DPRAM_COMMAND + 2]);
295 iowrite32(addr, &card->dpram[DPRAM_COMMAND + 6]);
296 iowrite16(len, &card->dpram[DPRAM_COMMAND + 10]);
297 iowrite8(1, &card->dpram[DPRAM_COMMAND + 12]);
298 ret = softing_bootloader_command(card, 1, "loading app.");
299 if (ret < 0)
300 goto failed;
301 /* verify checksum */
302 rx_sum = ioread16(&card->dpram[DPRAM_RECEIPT + 2]);
303 if (rx_sum != sum) {
304 dev_alert(&card->pdev->dev, "SRAM seems to be damaged"
305 ", wanted 0x%04x, got 0x%04x\n", sum, rx_sum);
306 ret = -EIO;
307 goto failed;
308 }
309 }
310 if (!type_end || !type_entrypoint)
311 goto failed;
312 /* start application in card */
313 iowrite32(start_addr, &card->dpram[DPRAM_COMMAND + 2]);
314 iowrite8(1, &card->dpram[DPRAM_COMMAND + 6]);
315 ret = softing_bootloader_command(card, 3, "start app.");
316 if (ret < 0)
317 goto failed;
318 ret = 0;
319failed:
320 release_firmware(fw);
321 if (ret < 0)
322 dev_info(&card->pdev->dev, "firmware %s failed\n", file);
323 return ret;
324}
325
326static int softing_reset_chip(struct softing *card)
327{
328 int ret;
329
330 do {
331 /* reset chip */
332 iowrite8(0, &card->dpram[DPRAM_RESET_RX_FIFO]);
333 iowrite8(0, &card->dpram[DPRAM_RESET_RX_FIFO+1]);
334 iowrite8(1, &card->dpram[DPRAM_RESET]);
335 iowrite8(0, &card->dpram[DPRAM_RESET+1]);
336
337 ret = softing_fct_cmd(card, 0, "reset_can");
338 if (!ret)
339 break;
340 if (signal_pending(current))
341 /* don't wait any longer */
342 break;
343 } while (1);
344 card->tx.pending = 0;
345 return ret;
346}
347
348int softing_chip_poweron(struct softing *card)
349{
350 int ret;
351 /* sync */
352 ret = _softing_fct_cmd(card, 99, 0x55, "sync-a");
353 if (ret < 0)
354 goto failed;
355
356 ret = _softing_fct_cmd(card, 99, 0xaa, "sync-b");
357 if (ret < 0)
358 goto failed;
359
360 ret = softing_reset_chip(card);
361 if (ret < 0)
362 goto failed;
363 /* get_serial */
364 ret = softing_fct_cmd(card, 43, "get_serial_number");
365 if (ret < 0)
366 goto failed;
367 card->id.serial = ioread32(&card->dpram[DPRAM_FCT_PARAM]);
368 /* get_version */
369 ret = softing_fct_cmd(card, 12, "get_version");
370 if (ret < 0)
371 goto failed;
372 card->id.fw_version = ioread16(&card->dpram[DPRAM_FCT_PARAM + 2]);
373 card->id.hw_version = ioread16(&card->dpram[DPRAM_FCT_PARAM + 4]);
374 card->id.license = ioread16(&card->dpram[DPRAM_FCT_PARAM + 6]);
375 card->id.chip[0] = ioread16(&card->dpram[DPRAM_FCT_PARAM + 8]);
376 card->id.chip[1] = ioread16(&card->dpram[DPRAM_FCT_PARAM + 10]);
377 return 0;
378failed:
379 return ret;
380}
381
382static void softing_initialize_timestamp(struct softing *card)
383{
384 uint64_t ovf;
385
386 card->ts_ref = ktime_get();
387
388 /* 16MHz is the reference */
389 ovf = 0x100000000ULL * 16;
390 do_div(ovf, card->pdat->freq ?: 16);
391
392 card->ts_overflow = ktime_add_us(ktime_set(0, 0), ovf);
393}
394
395ktime_t softing_raw2ktime(struct softing *card, u32 raw)
396{
397 uint64_t rawl;
398 ktime_t now, real_offset;
399 ktime_t target;
400 ktime_t tmp;
401
402 now = ktime_get();
403 real_offset = ktime_sub(ktime_get_real(), now);
404
405 /* find nsec from card */
406 rawl = raw * 16;
407 do_div(rawl, card->pdat->freq ?: 16);
408 target = ktime_add_us(card->ts_ref, rawl);
409 /* test for overflows */
410 tmp = ktime_add(target, card->ts_overflow);
411 while (unlikely(ktime_to_ns(tmp) > ktime_to_ns(now))) {
412 card->ts_ref = ktime_add(card->ts_ref, card->ts_overflow);
413 target = tmp;
414 tmp = ktime_add(target, card->ts_overflow);
415 }
416 return ktime_add(target, real_offset);
417}
418
419static inline int softing_error_reporting(struct net_device *netdev)
420{
421 struct softing_priv *priv = netdev_priv(netdev);
422
423 return (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING)
424 ? 1 : 0;
425}
426
427int softing_startstop(struct net_device *dev, int up)
428{
429 int ret;
430 struct softing *card;
431 struct softing_priv *priv;
432 struct net_device *netdev;
433 int bus_bitmask_start;
434 int j, error_reporting;
435 struct can_frame msg;
436 const struct can_bittiming *bt;
437
438 priv = netdev_priv(dev);
439 card = priv->card;
440
441 if (!card->fw.up)
442 return -EIO;
443
444 ret = mutex_lock_interruptible(&card->fw.lock);
445 if (ret)
446 return ret;
447
448 bus_bitmask_start = 0;
449 if (dev && up)
450 /* prepare to start this bus as well */
451 bus_bitmask_start |= (1 << priv->index);
452 /* bring netdevs down */
453 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
454 netdev = card->net[j];
455 if (!netdev)
456 continue;
457 priv = netdev_priv(netdev);
458
459 if (dev != netdev)
460 netif_stop_queue(netdev);
461
462 if (netif_running(netdev)) {
463 if (dev != netdev)
464 bus_bitmask_start |= (1 << j);
465 priv->tx.pending = 0;
466 priv->tx.echo_put = 0;
467 priv->tx.echo_get = 0;
468 /*
469 * this bus' may just have called open_candev()
470 * which is rather stupid to call close_candev()
471 * already
472 * but we may come here from busoff recovery too
473 * in which case the echo_skb _needs_ flushing too.
474 * just be sure to call open_candev() again
475 */
476 close_candev(netdev);
477 }
478 priv->can.state = CAN_STATE_STOPPED;
479 }
480 card->tx.pending = 0;
481
482 softing_enable_irq(card, 0);
483 ret = softing_reset_chip(card);
484 if (ret)
485 goto failed;
486 if (!bus_bitmask_start)
487 /* no busses to be brought up */
488 goto card_done;
489
490 if ((bus_bitmask_start & 1) && (bus_bitmask_start & 2)
491 && (softing_error_reporting(card->net[0])
492 != softing_error_reporting(card->net[1]))) {
493 dev_alert(&card->pdev->dev,
494 "err_reporting flag differs for busses\n");
495 goto invalid;
496 }
497 error_reporting = 0;
498 if (bus_bitmask_start & 1) {
499 netdev = card->net[0];
500 priv = netdev_priv(netdev);
501 error_reporting += softing_error_reporting(netdev);
502 /* init chip 1 */
503 bt = &priv->can.bittiming;
504 iowrite16(bt->brp, &card->dpram[DPRAM_FCT_PARAM + 2]);
505 iowrite16(bt->sjw, &card->dpram[DPRAM_FCT_PARAM + 4]);
506 iowrite16(bt->phase_seg1 + bt->prop_seg,
507 &card->dpram[DPRAM_FCT_PARAM + 6]);
508 iowrite16(bt->phase_seg2, &card->dpram[DPRAM_FCT_PARAM + 8]);
509 iowrite16((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 : 0,
510 &card->dpram[DPRAM_FCT_PARAM + 10]);
511 ret = softing_fct_cmd(card, 1, "initialize_chip[0]");
512 if (ret < 0)
513 goto failed;
514 /* set mode */
515 iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 2]);
516 iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 4]);
517 ret = softing_fct_cmd(card, 3, "set_mode[0]");
518 if (ret < 0)
519 goto failed;
520 /* set filter */
521 /* 11bit id & mask */
522 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 2]);
523 iowrite16(0x07ff, &card->dpram[DPRAM_FCT_PARAM + 4]);
524 /* 29bit id.lo & mask.lo & id.hi & mask.hi */
525 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 6]);
526 iowrite16(0xffff, &card->dpram[DPRAM_FCT_PARAM + 8]);
527 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 10]);
528 iowrite16(0x1fff, &card->dpram[DPRAM_FCT_PARAM + 12]);
529 ret = softing_fct_cmd(card, 7, "set_filter[0]");
530 if (ret < 0)
531 goto failed;
532 /* set output control */
533 iowrite16(priv->output, &card->dpram[DPRAM_FCT_PARAM + 2]);
534 ret = softing_fct_cmd(card, 5, "set_output[0]");
535 if (ret < 0)
536 goto failed;
537 }
538 if (bus_bitmask_start & 2) {
539 netdev = card->net[1];
540 priv = netdev_priv(netdev);
541 error_reporting += softing_error_reporting(netdev);
542 /* init chip2 */
543 bt = &priv->can.bittiming;
544 iowrite16(bt->brp, &card->dpram[DPRAM_FCT_PARAM + 2]);
545 iowrite16(bt->sjw, &card->dpram[DPRAM_FCT_PARAM + 4]);
546 iowrite16(bt->phase_seg1 + bt->prop_seg,
547 &card->dpram[DPRAM_FCT_PARAM + 6]);
548 iowrite16(bt->phase_seg2, &card->dpram[DPRAM_FCT_PARAM + 8]);
549 iowrite16((priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) ? 1 : 0,
550 &card->dpram[DPRAM_FCT_PARAM + 10]);
551 ret = softing_fct_cmd(card, 2, "initialize_chip[1]");
552 if (ret < 0)
553 goto failed;
554 /* set mode2 */
555 iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 2]);
556 iowrite16(0, &card->dpram[DPRAM_FCT_PARAM + 4]);
557 ret = softing_fct_cmd(card, 4, "set_mode[1]");
558 if (ret < 0)
559 goto failed;
560 /* set filter2 */
561 /* 11bit id & mask */
562 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 2]);
563 iowrite16(0x07ff, &card->dpram[DPRAM_FCT_PARAM + 4]);
564 /* 29bit id.lo & mask.lo & id.hi & mask.hi */
565 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 6]);
566 iowrite16(0xffff, &card->dpram[DPRAM_FCT_PARAM + 8]);
567 iowrite16(0x0000, &card->dpram[DPRAM_FCT_PARAM + 10]);
568 iowrite16(0x1fff, &card->dpram[DPRAM_FCT_PARAM + 12]);
569 ret = softing_fct_cmd(card, 8, "set_filter[1]");
570 if (ret < 0)
571 goto failed;
572 /* set output control2 */
573 iowrite16(priv->output, &card->dpram[DPRAM_FCT_PARAM + 2]);
574 ret = softing_fct_cmd(card, 6, "set_output[1]");
575 if (ret < 0)
576 goto failed;
577 }
578 /* enable_error_frame */
579 /*
580 * Error reporting is switched off at the moment since
581 * the receiving of them is not yet 100% verified
582 * This should be enabled sooner or later
583 *
584 if (error_reporting) {
585 ret = softing_fct_cmd(card, 51, "enable_error_frame");
586 if (ret < 0)
587 goto failed;
588 }
589 */
590 /* initialize interface */
591 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 2]);
592 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 4]);
593 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 6]);
594 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 8]);
595 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 10]);
596 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 12]);
597 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 14]);
598 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 16]);
599 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 18]);
600 iowrite16(1, &card->dpram[DPRAM_FCT_PARAM + 20]);
601 ret = softing_fct_cmd(card, 17, "initialize_interface");
602 if (ret < 0)
603 goto failed;
604 /* enable_fifo */
605 ret = softing_fct_cmd(card, 36, "enable_fifo");
606 if (ret < 0)
607 goto failed;
608 /* enable fifo tx ack */
609 ret = softing_fct_cmd(card, 13, "fifo_tx_ack[0]");
610 if (ret < 0)
611 goto failed;
612 /* enable fifo tx ack2 */
613 ret = softing_fct_cmd(card, 14, "fifo_tx_ack[1]");
614 if (ret < 0)
615 goto failed;
616 /* start_chip */
617 ret = softing_fct_cmd(card, 11, "start_chip");
618 if (ret < 0)
619 goto failed;
620 iowrite8(0, &card->dpram[DPRAM_INFO_BUSSTATE]);
621 iowrite8(0, &card->dpram[DPRAM_INFO_BUSSTATE2]);
622 if (card->pdat->generation < 2) {
623 iowrite8(0, &card->dpram[DPRAM_V2_IRQ_TOHOST]);
624 /* flush the DPRAM caches */
625 wmb();
626 }
627
628 softing_initialize_timestamp(card);
629
630 /*
631 * do socketcan notifications/status changes
632 * from here, no errors should occur, or the failed: part
633 * must be reviewed
634 */
635 memset(&msg, 0, sizeof(msg));
636 msg.can_id = CAN_ERR_FLAG | CAN_ERR_RESTARTED;
637 msg.can_dlc = CAN_ERR_DLC;
638 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
639 if (!(bus_bitmask_start & (1 << j)))
640 continue;
641 netdev = card->net[j];
642 if (!netdev)
643 continue;
644 priv = netdev_priv(netdev);
645 priv->can.state = CAN_STATE_ERROR_ACTIVE;
646 open_candev(netdev);
647 if (dev != netdev) {
648 /* notify other busses on the restart */
649 softing_netdev_rx(netdev, &msg, ktime_set(0, 0));
650 ++priv->can.can_stats.restarts;
651 }
652 netif_wake_queue(netdev);
653 }
654
655 /* enable interrupts */
656 ret = softing_enable_irq(card, 1);
657 if (ret)
658 goto failed;
659card_done:
660 mutex_unlock(&card->fw.lock);
661 return 0;
662invalid:
663 ret = -EINVAL;
664failed:
665 softing_enable_irq(card, 0);
666 softing_reset_chip(card);
667 mutex_unlock(&card->fw.lock);
668 /* bring all other interfaces down */
669 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
670 netdev = card->net[j];
671 if (!netdev)
672 continue;
673 dev_close(netdev);
674 }
675 return ret;
676}
677
678int softing_default_output(struct net_device *netdev)
679{
680 struct softing_priv *priv = netdev_priv(netdev);
681 struct softing *card = priv->card;
682
683 switch (priv->chip) {
684 case 1000:
685 return (card->pdat->generation < 2) ? 0xfb : 0xfa;
686 case 5:
687 return 0x60;
688 default:
689 return 0x40;
690 }
691}
diff --git a/drivers/net/can/softing/softing_main.c b/drivers/net/can/softing/softing_main.c
new file mode 100644
index 000000000000..5157e15e96eb
--- /dev/null
+++ b/drivers/net/can/softing/softing_main.c
@@ -0,0 +1,893 @@
1/*
2 * Copyright (C) 2008-2010
3 *
4 * - Kurt Van Dijck, EIA Electronics
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the version 2 of the GNU General Public License
8 * as published by the Free Software Foundation
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/version.h>
21#include <linux/module.h>
22#include <linux/init.h>
23#include <linux/interrupt.h>
24
25#include "softing.h"
26
27#define TX_ECHO_SKB_MAX (((TXMAX+1)/2)-1)
28
29/*
30 * test is a specific CAN netdev
31 * is online (ie. up 'n running, not sleeping, not busoff
32 */
33static inline int canif_is_active(struct net_device *netdev)
34{
35 struct can_priv *can = netdev_priv(netdev);
36
37 if (!netif_running(netdev))
38 return 0;
39 return (can->state <= CAN_STATE_ERROR_PASSIVE);
40}
41
42/* reset DPRAM */
43static inline void softing_set_reset_dpram(struct softing *card)
44{
45 if (card->pdat->generation >= 2) {
46 spin_lock_bh(&card->spin);
47 iowrite8(ioread8(&card->dpram[DPRAM_V2_RESET]) & ~1,
48 &card->dpram[DPRAM_V2_RESET]);
49 spin_unlock_bh(&card->spin);
50 }
51}
52
53static inline void softing_clr_reset_dpram(struct softing *card)
54{
55 if (card->pdat->generation >= 2) {
56 spin_lock_bh(&card->spin);
57 iowrite8(ioread8(&card->dpram[DPRAM_V2_RESET]) | 1,
58 &card->dpram[DPRAM_V2_RESET]);
59 spin_unlock_bh(&card->spin);
60 }
61}
62
63/* trigger the tx queue-ing */
64static netdev_tx_t softing_netdev_start_xmit(struct sk_buff *skb,
65 struct net_device *dev)
66{
67 struct softing_priv *priv = netdev_priv(dev);
68 struct softing *card = priv->card;
69 int ret;
70 uint8_t *ptr;
71 uint8_t fifo_wr, fifo_rd;
72 struct can_frame *cf = (struct can_frame *)skb->data;
73 uint8_t buf[DPRAM_TX_SIZE];
74
75 if (can_dropped_invalid_skb(dev, skb))
76 return NETDEV_TX_OK;
77
78 spin_lock(&card->spin);
79
80 ret = NETDEV_TX_BUSY;
81 if (!card->fw.up ||
82 (card->tx.pending >= TXMAX) ||
83 (priv->tx.pending >= TX_ECHO_SKB_MAX))
84 goto xmit_done;
85 fifo_wr = ioread8(&card->dpram[DPRAM_TX_WR]);
86 fifo_rd = ioread8(&card->dpram[DPRAM_TX_RD]);
87 if (fifo_wr == fifo_rd)
88 /* fifo full */
89 goto xmit_done;
90 memset(buf, 0, sizeof(buf));
91 ptr = buf;
92 *ptr = CMD_TX;
93 if (cf->can_id & CAN_RTR_FLAG)
94 *ptr |= CMD_RTR;
95 if (cf->can_id & CAN_EFF_FLAG)
96 *ptr |= CMD_XTD;
97 if (priv->index)
98 *ptr |= CMD_BUS2;
99 ++ptr;
100 *ptr++ = cf->can_dlc;
101 *ptr++ = (cf->can_id >> 0);
102 *ptr++ = (cf->can_id >> 8);
103 if (cf->can_id & CAN_EFF_FLAG) {
104 *ptr++ = (cf->can_id >> 16);
105 *ptr++ = (cf->can_id >> 24);
106 } else {
107 /* increment 1, not 2 as you might think */
108 ptr += 1;
109 }
110 if (!(cf->can_id & CAN_RTR_FLAG))
111 memcpy(ptr, &cf->data[0], cf->can_dlc);
112 memcpy_toio(&card->dpram[DPRAM_TX + DPRAM_TX_SIZE * fifo_wr],
113 buf, DPRAM_TX_SIZE);
114 if (++fifo_wr >= DPRAM_TX_CNT)
115 fifo_wr = 0;
116 iowrite8(fifo_wr, &card->dpram[DPRAM_TX_WR]);
117 card->tx.last_bus = priv->index;
118 ++card->tx.pending;
119 ++priv->tx.pending;
120 can_put_echo_skb(skb, dev, priv->tx.echo_put);
121 ++priv->tx.echo_put;
122 if (priv->tx.echo_put >= TX_ECHO_SKB_MAX)
123 priv->tx.echo_put = 0;
124 /* can_put_echo_skb() saves the skb, safe to return TX_OK */
125 ret = NETDEV_TX_OK;
126xmit_done:
127 spin_unlock(&card->spin);
128 if (card->tx.pending >= TXMAX) {
129 int j;
130 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
131 if (card->net[j])
132 netif_stop_queue(card->net[j]);
133 }
134 }
135 if (ret != NETDEV_TX_OK)
136 netif_stop_queue(dev);
137
138 return ret;
139}
140
141/*
142 * shortcut for skb delivery
143 */
144int softing_netdev_rx(struct net_device *netdev, const struct can_frame *msg,
145 ktime_t ktime)
146{
147 struct sk_buff *skb;
148 struct can_frame *cf;
149
150 skb = alloc_can_skb(netdev, &cf);
151 if (!skb)
152 return -ENOMEM;
153 memcpy(cf, msg, sizeof(*msg));
154 skb->tstamp = ktime;
155 return netif_rx(skb);
156}
157
158/*
159 * softing_handle_1
160 * pop 1 entry from the DPRAM queue, and process
161 */
162static int softing_handle_1(struct softing *card)
163{
164 struct net_device *netdev;
165 struct softing_priv *priv;
166 ktime_t ktime;
167 struct can_frame msg;
168 int cnt = 0, lost_msg;
169 uint8_t fifo_rd, fifo_wr, cmd;
170 uint8_t *ptr;
171 uint32_t tmp_u32;
172 uint8_t buf[DPRAM_RX_SIZE];
173
174 memset(&msg, 0, sizeof(msg));
175 /* test for lost msgs */
176 lost_msg = ioread8(&card->dpram[DPRAM_RX_LOST]);
177 if (lost_msg) {
178 int j;
179 /* reset condition */
180 iowrite8(0, &card->dpram[DPRAM_RX_LOST]);
181 /* prepare msg */
182 msg.can_id = CAN_ERR_FLAG | CAN_ERR_CRTL;
183 msg.can_dlc = CAN_ERR_DLC;
184 msg.data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
185 /*
186 * service to all busses, we don't know which it was applicable
187 * but only service busses that are online
188 */
189 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
190 netdev = card->net[j];
191 if (!netdev)
192 continue;
193 if (!canif_is_active(netdev))
194 /* a dead bus has no overflows */
195 continue;
196 ++netdev->stats.rx_over_errors;
197 softing_netdev_rx(netdev, &msg, ktime_set(0, 0));
198 }
199 /* prepare for other use */
200 memset(&msg, 0, sizeof(msg));
201 ++cnt;
202 }
203
204 fifo_rd = ioread8(&card->dpram[DPRAM_RX_RD]);
205 fifo_wr = ioread8(&card->dpram[DPRAM_RX_WR]);
206
207 if (++fifo_rd >= DPRAM_RX_CNT)
208 fifo_rd = 0;
209 if (fifo_wr == fifo_rd)
210 return cnt;
211
212 memcpy_fromio(buf, &card->dpram[DPRAM_RX + DPRAM_RX_SIZE*fifo_rd],
213 DPRAM_RX_SIZE);
214 mb();
215 /* trigger dual port RAM */
216 iowrite8(fifo_rd, &card->dpram[DPRAM_RX_RD]);
217
218 ptr = buf;
219 cmd = *ptr++;
220 if (cmd == 0xff)
221 /* not quite usefull, probably the card has got out */
222 return 0;
223 netdev = card->net[0];
224 if (cmd & CMD_BUS2)
225 netdev = card->net[1];
226 priv = netdev_priv(netdev);
227
228 if (cmd & CMD_ERR) {
229 uint8_t can_state, state;
230
231 state = *ptr++;
232
233 msg.can_id = CAN_ERR_FLAG;
234 msg.can_dlc = CAN_ERR_DLC;
235
236 if (state & SF_MASK_BUSOFF) {
237 can_state = CAN_STATE_BUS_OFF;
238 msg.can_id |= CAN_ERR_BUSOFF;
239 state = STATE_BUSOFF;
240 } else if (state & SF_MASK_EPASSIVE) {
241 can_state = CAN_STATE_ERROR_PASSIVE;
242 msg.can_id |= CAN_ERR_CRTL;
243 msg.data[1] = CAN_ERR_CRTL_TX_PASSIVE;
244 state = STATE_EPASSIVE;
245 } else {
246 can_state = CAN_STATE_ERROR_ACTIVE;
247 msg.can_id |= CAN_ERR_CRTL;
248 state = STATE_EACTIVE;
249 }
250 /* update DPRAM */
251 iowrite8(state, &card->dpram[priv->index ?
252 DPRAM_INFO_BUSSTATE2 : DPRAM_INFO_BUSSTATE]);
253 /* timestamp */
254 tmp_u32 = le32_to_cpup((void *)ptr);
255 ptr += 4;
256 ktime = softing_raw2ktime(card, tmp_u32);
257
258 ++netdev->stats.rx_errors;
259 /* update internal status */
260 if (can_state != priv->can.state) {
261 priv->can.state = can_state;
262 if (can_state == CAN_STATE_ERROR_PASSIVE)
263 ++priv->can.can_stats.error_passive;
264 else if (can_state == CAN_STATE_BUS_OFF) {
265 /* this calls can_close_cleanup() */
266 can_bus_off(netdev);
267 netif_stop_queue(netdev);
268 }
269 /* trigger socketcan */
270 softing_netdev_rx(netdev, &msg, ktime);
271 }
272
273 } else {
274 if (cmd & CMD_RTR)
275 msg.can_id |= CAN_RTR_FLAG;
276 msg.can_dlc = get_can_dlc(*ptr++);
277 if (cmd & CMD_XTD) {
278 msg.can_id |= CAN_EFF_FLAG;
279 msg.can_id |= le32_to_cpup((void *)ptr);
280 ptr += 4;
281 } else {
282 msg.can_id |= le16_to_cpup((void *)ptr);
283 ptr += 2;
284 }
285 /* timestamp */
286 tmp_u32 = le32_to_cpup((void *)ptr);
287 ptr += 4;
288 ktime = softing_raw2ktime(card, tmp_u32);
289 if (!(msg.can_id & CAN_RTR_FLAG))
290 memcpy(&msg.data[0], ptr, 8);
291 ptr += 8;
292 /* update socket */
293 if (cmd & CMD_ACK) {
294 /* acknowledge, was tx msg */
295 struct sk_buff *skb;
296 skb = priv->can.echo_skb[priv->tx.echo_get];
297 if (skb)
298 skb->tstamp = ktime;
299 can_get_echo_skb(netdev, priv->tx.echo_get);
300 ++priv->tx.echo_get;
301 if (priv->tx.echo_get >= TX_ECHO_SKB_MAX)
302 priv->tx.echo_get = 0;
303 if (priv->tx.pending)
304 --priv->tx.pending;
305 if (card->tx.pending)
306 --card->tx.pending;
307 ++netdev->stats.tx_packets;
308 if (!(msg.can_id & CAN_RTR_FLAG))
309 netdev->stats.tx_bytes += msg.can_dlc;
310 } else {
311 int ret;
312
313 ret = softing_netdev_rx(netdev, &msg, ktime);
314 if (ret == NET_RX_SUCCESS) {
315 ++netdev->stats.rx_packets;
316 if (!(msg.can_id & CAN_RTR_FLAG))
317 netdev->stats.rx_bytes += msg.can_dlc;
318 } else {
319 ++netdev->stats.rx_dropped;
320 }
321 }
322 }
323 ++cnt;
324 return cnt;
325}
326
327/*
328 * real interrupt handler
329 */
330static irqreturn_t softing_irq_thread(int irq, void *dev_id)
331{
332 struct softing *card = (struct softing *)dev_id;
333 struct net_device *netdev;
334 struct softing_priv *priv;
335 int j, offset, work_done;
336
337 work_done = 0;
338 spin_lock_bh(&card->spin);
339 while (softing_handle_1(card) > 0) {
340 ++card->irq.svc_count;
341 ++work_done;
342 }
343 spin_unlock_bh(&card->spin);
344 /* resume tx queue's */
345 offset = card->tx.last_bus;
346 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
347 if (card->tx.pending >= TXMAX)
348 break;
349 netdev = card->net[(j + offset + 1) % card->pdat->nbus];
350 if (!netdev)
351 continue;
352 priv = netdev_priv(netdev);
353 if (!canif_is_active(netdev))
354 /* it makes no sense to wake dead busses */
355 continue;
356 if (priv->tx.pending >= TX_ECHO_SKB_MAX)
357 continue;
358 ++work_done;
359 netif_wake_queue(netdev);
360 }
361 return work_done ? IRQ_HANDLED : IRQ_NONE;
362}
363
364/*
365 * interrupt routines:
366 * schedule the 'real interrupt handler'
367 */
368static irqreturn_t softing_irq_v2(int irq, void *dev_id)
369{
370 struct softing *card = (struct softing *)dev_id;
371 uint8_t ir;
372
373 ir = ioread8(&card->dpram[DPRAM_V2_IRQ_TOHOST]);
374 iowrite8(0, &card->dpram[DPRAM_V2_IRQ_TOHOST]);
375 return (1 == ir) ? IRQ_WAKE_THREAD : IRQ_NONE;
376}
377
378static irqreturn_t softing_irq_v1(int irq, void *dev_id)
379{
380 struct softing *card = (struct softing *)dev_id;
381 uint8_t ir;
382
383 ir = ioread8(&card->dpram[DPRAM_IRQ_TOHOST]);
384 iowrite8(0, &card->dpram[DPRAM_IRQ_TOHOST]);
385 return ir ? IRQ_WAKE_THREAD : IRQ_NONE;
386}
387
388/*
389 * netdev/candev inter-operability
390 */
391static int softing_netdev_open(struct net_device *ndev)
392{
393 int ret;
394
395 /* check or determine and set bittime */
396 ret = open_candev(ndev);
397 if (!ret)
398 ret = softing_startstop(ndev, 1);
399 return ret;
400}
401
402static int softing_netdev_stop(struct net_device *ndev)
403{
404 int ret;
405
406 netif_stop_queue(ndev);
407
408 /* softing cycle does close_candev() */
409 ret = softing_startstop(ndev, 0);
410 return ret;
411}
412
413static int softing_candev_set_mode(struct net_device *ndev, enum can_mode mode)
414{
415 int ret;
416
417 switch (mode) {
418 case CAN_MODE_START:
419 /* softing_startstop does close_candev() */
420 ret = softing_startstop(ndev, 1);
421 return ret;
422 case CAN_MODE_STOP:
423 case CAN_MODE_SLEEP:
424 return -EOPNOTSUPP;
425 }
426 return 0;
427}
428
429/*
430 * Softing device management helpers
431 */
432int softing_enable_irq(struct softing *card, int enable)
433{
434 int ret;
435
436 if (!card->irq.nr) {
437 return 0;
438 } else if (card->irq.requested && !enable) {
439 free_irq(card->irq.nr, card);
440 card->irq.requested = 0;
441 } else if (!card->irq.requested && enable) {
442 ret = request_threaded_irq(card->irq.nr,
443 (card->pdat->generation >= 2) ?
444 softing_irq_v2 : softing_irq_v1,
445 softing_irq_thread, IRQF_SHARED,
446 dev_name(&card->pdev->dev), card);
447 if (ret) {
448 dev_alert(&card->pdev->dev,
449 "request_threaded_irq(%u) failed\n",
450 card->irq.nr);
451 return ret;
452 }
453 card->irq.requested = 1;
454 }
455 return 0;
456}
457
458static void softing_card_shutdown(struct softing *card)
459{
460 int fw_up = 0;
461
462 if (mutex_lock_interruptible(&card->fw.lock))
463 /* return -ERESTARTSYS */;
464 fw_up = card->fw.up;
465 card->fw.up = 0;
466
467 if (card->irq.requested && card->irq.nr) {
468 free_irq(card->irq.nr, card);
469 card->irq.requested = 0;
470 }
471 if (fw_up) {
472 if (card->pdat->enable_irq)
473 card->pdat->enable_irq(card->pdev, 0);
474 softing_set_reset_dpram(card);
475 if (card->pdat->reset)
476 card->pdat->reset(card->pdev, 1);
477 }
478 mutex_unlock(&card->fw.lock);
479}
480
481static __devinit int softing_card_boot(struct softing *card)
482{
483 int ret, j;
484 static const uint8_t stream[] = {
485 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, };
486 unsigned char back[sizeof(stream)];
487
488 if (mutex_lock_interruptible(&card->fw.lock))
489 return -ERESTARTSYS;
490 if (card->fw.up) {
491 mutex_unlock(&card->fw.lock);
492 return 0;
493 }
494 /* reset board */
495 if (card->pdat->enable_irq)
496 card->pdat->enable_irq(card->pdev, 1);
497 /* boot card */
498 softing_set_reset_dpram(card);
499 if (card->pdat->reset)
500 card->pdat->reset(card->pdev, 1);
501 for (j = 0; (j + sizeof(stream)) < card->dpram_size;
502 j += sizeof(stream)) {
503
504 memcpy_toio(&card->dpram[j], stream, sizeof(stream));
505 /* flush IO cache */
506 mb();
507 memcpy_fromio(back, &card->dpram[j], sizeof(stream));
508
509 if (!memcmp(back, stream, sizeof(stream)))
510 continue;
511 /* memory is not equal */
512 dev_alert(&card->pdev->dev, "dpram failed at 0x%04x\n", j);
513 ret = -EIO;
514 goto failed;
515 }
516 wmb();
517 /* load boot firmware */
518 ret = softing_load_fw(card->pdat->boot.fw, card, card->dpram,
519 card->dpram_size,
520 card->pdat->boot.offs - card->pdat->boot.addr);
521 if (ret < 0)
522 goto failed;
523 /* load loader firmware */
524 ret = softing_load_fw(card->pdat->load.fw, card, card->dpram,
525 card->dpram_size,
526 card->pdat->load.offs - card->pdat->load.addr);
527 if (ret < 0)
528 goto failed;
529
530 if (card->pdat->reset)
531 card->pdat->reset(card->pdev, 0);
532 softing_clr_reset_dpram(card);
533 ret = softing_bootloader_command(card, 0, "card boot");
534 if (ret < 0)
535 goto failed;
536 ret = softing_load_app_fw(card->pdat->app.fw, card);
537 if (ret < 0)
538 goto failed;
539
540 ret = softing_chip_poweron(card);
541 if (ret < 0)
542 goto failed;
543
544 card->fw.up = 1;
545 mutex_unlock(&card->fw.lock);
546 return 0;
547failed:
548 card->fw.up = 0;
549 if (card->pdat->enable_irq)
550 card->pdat->enable_irq(card->pdev, 0);
551 softing_set_reset_dpram(card);
552 if (card->pdat->reset)
553 card->pdat->reset(card->pdev, 1);
554 mutex_unlock(&card->fw.lock);
555 return ret;
556}
557
558/*
559 * netdev sysfs
560 */
561static ssize_t show_channel(struct device *dev, struct device_attribute *attr,
562 char *buf)
563{
564 struct net_device *ndev = to_net_dev(dev);
565 struct softing_priv *priv = netdev2softing(ndev);
566
567 return sprintf(buf, "%i\n", priv->index);
568}
569
570static ssize_t show_chip(struct device *dev, struct device_attribute *attr,
571 char *buf)
572{
573 struct net_device *ndev = to_net_dev(dev);
574 struct softing_priv *priv = netdev2softing(ndev);
575
576 return sprintf(buf, "%i\n", priv->chip);
577}
578
579static ssize_t show_output(struct device *dev, struct device_attribute *attr,
580 char *buf)
581{
582 struct net_device *ndev = to_net_dev(dev);
583 struct softing_priv *priv = netdev2softing(ndev);
584
585 return sprintf(buf, "0x%02x\n", priv->output);
586}
587
588static ssize_t store_output(struct device *dev, struct device_attribute *attr,
589 const char *buf, size_t count)
590{
591 struct net_device *ndev = to_net_dev(dev);
592 struct softing_priv *priv = netdev2softing(ndev);
593 struct softing *card = priv->card;
594 unsigned long val;
595 int ret;
596
597 ret = strict_strtoul(buf, 0, &val);
598 if (ret < 0)
599 return ret;
600 val &= 0xFF;
601
602 ret = mutex_lock_interruptible(&card->fw.lock);
603 if (ret)
604 return -ERESTARTSYS;
605 if (netif_running(ndev)) {
606 mutex_unlock(&card->fw.lock);
607 return -EBUSY;
608 }
609 priv->output = val;
610 mutex_unlock(&card->fw.lock);
611 return count;
612}
613
614static const DEVICE_ATTR(channel, S_IRUGO, show_channel, NULL);
615static const DEVICE_ATTR(chip, S_IRUGO, show_chip, NULL);
616static const DEVICE_ATTR(output, S_IRUGO | S_IWUSR, show_output, store_output);
617
618static const struct attribute *const netdev_sysfs_attrs[] = {
619 &dev_attr_channel.attr,
620 &dev_attr_chip.attr,
621 &dev_attr_output.attr,
622 NULL,
623};
624static const struct attribute_group netdev_sysfs_group = {
625 .name = NULL,
626 .attrs = (struct attribute **)netdev_sysfs_attrs,
627};
628
629static const struct net_device_ops softing_netdev_ops = {
630 .ndo_open = softing_netdev_open,
631 .ndo_stop = softing_netdev_stop,
632 .ndo_start_xmit = softing_netdev_start_xmit,
633};
634
635static const struct can_bittiming_const softing_btr_const = {
636 .tseg1_min = 1,
637 .tseg1_max = 16,
638 .tseg2_min = 1,
639 .tseg2_max = 8,
640 .sjw_max = 4, /* overruled */
641 .brp_min = 1,
642 .brp_max = 32, /* overruled */
643 .brp_inc = 1,
644};
645
646
647static __devinit struct net_device *softing_netdev_create(struct softing *card,
648 uint16_t chip_id)
649{
650 struct net_device *netdev;
651 struct softing_priv *priv;
652
653 netdev = alloc_candev(sizeof(*priv), TX_ECHO_SKB_MAX);
654 if (!netdev) {
655 dev_alert(&card->pdev->dev, "alloc_candev failed\n");
656 return NULL;
657 }
658 priv = netdev_priv(netdev);
659 priv->netdev = netdev;
660 priv->card = card;
661 memcpy(&priv->btr_const, &softing_btr_const, sizeof(priv->btr_const));
662 priv->btr_const.brp_max = card->pdat->max_brp;
663 priv->btr_const.sjw_max = card->pdat->max_sjw;
664 priv->can.bittiming_const = &priv->btr_const;
665 priv->can.clock.freq = 8000000;
666 priv->chip = chip_id;
667 priv->output = softing_default_output(netdev);
668 SET_NETDEV_DEV(netdev, &card->pdev->dev);
669
670 netdev->flags |= IFF_ECHO;
671 netdev->netdev_ops = &softing_netdev_ops;
672 priv->can.do_set_mode = softing_candev_set_mode;
673 priv->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES;
674
675 return netdev;
676}
677
678static __devinit int softing_netdev_register(struct net_device *netdev)
679{
680 int ret;
681
682 netdev->sysfs_groups[0] = &netdev_sysfs_group;
683 ret = register_candev(netdev);
684 if (ret) {
685 dev_alert(&netdev->dev, "register failed\n");
686 return ret;
687 }
688 return 0;
689}
690
691static void softing_netdev_cleanup(struct net_device *netdev)
692{
693 unregister_candev(netdev);
694 free_candev(netdev);
695}
696
697/*
698 * sysfs for Platform device
699 */
700#define DEV_ATTR_RO(name, member) \
701static ssize_t show_##name(struct device *dev, \
702 struct device_attribute *attr, char *buf) \
703{ \
704 struct softing *card = platform_get_drvdata(to_platform_device(dev)); \
705 return sprintf(buf, "%u\n", card->member); \
706} \
707static DEVICE_ATTR(name, 0444, show_##name, NULL)
708
709#define DEV_ATTR_RO_STR(name, member) \
710static ssize_t show_##name(struct device *dev, \
711 struct device_attribute *attr, char *buf) \
712{ \
713 struct softing *card = platform_get_drvdata(to_platform_device(dev)); \
714 return sprintf(buf, "%s\n", card->member); \
715} \
716static DEVICE_ATTR(name, 0444, show_##name, NULL)
717
718DEV_ATTR_RO(serial, id.serial);
719DEV_ATTR_RO_STR(firmware, pdat->app.fw);
720DEV_ATTR_RO(firmware_version, id.fw_version);
721DEV_ATTR_RO_STR(hardware, pdat->name);
722DEV_ATTR_RO(hardware_version, id.hw_version);
723DEV_ATTR_RO(license, id.license);
724DEV_ATTR_RO(frequency, id.freq);
725DEV_ATTR_RO(txpending, tx.pending);
726
727static struct attribute *softing_pdev_attrs[] = {
728 &dev_attr_serial.attr,
729 &dev_attr_firmware.attr,
730 &dev_attr_firmware_version.attr,
731 &dev_attr_hardware.attr,
732 &dev_attr_hardware_version.attr,
733 &dev_attr_license.attr,
734 &dev_attr_frequency.attr,
735 &dev_attr_txpending.attr,
736 NULL,
737};
738
739static const struct attribute_group softing_pdev_group = {
740 .name = NULL,
741 .attrs = softing_pdev_attrs,
742};
743
744/*
745 * platform driver
746 */
747static __devexit int softing_pdev_remove(struct platform_device *pdev)
748{
749 struct softing *card = platform_get_drvdata(pdev);
750 int j;
751
752 /* first, disable card*/
753 softing_card_shutdown(card);
754
755 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
756 if (!card->net[j])
757 continue;
758 softing_netdev_cleanup(card->net[j]);
759 card->net[j] = NULL;
760 }
761 sysfs_remove_group(&pdev->dev.kobj, &softing_pdev_group);
762
763 iounmap(card->dpram);
764 kfree(card);
765 return 0;
766}
767
768static __devinit int softing_pdev_probe(struct platform_device *pdev)
769{
770 const struct softing_platform_data *pdat = pdev->dev.platform_data;
771 struct softing *card;
772 struct net_device *netdev;
773 struct softing_priv *priv;
774 struct resource *pres;
775 int ret;
776 int j;
777
778 if (!pdat) {
779 dev_warn(&pdev->dev, "no platform data\n");
780 return -EINVAL;
781 }
782 if (pdat->nbus > ARRAY_SIZE(card->net)) {
783 dev_warn(&pdev->dev, "%u nets??\n", pdat->nbus);
784 return -EINVAL;
785 }
786
787 card = kzalloc(sizeof(*card), GFP_KERNEL);
788 if (!card)
789 return -ENOMEM;
790 card->pdat = pdat;
791 card->pdev = pdev;
792 platform_set_drvdata(pdev, card);
793 mutex_init(&card->fw.lock);
794 spin_lock_init(&card->spin);
795
796 ret = -EINVAL;
797 pres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
798 if (!pres)
799 goto platform_resource_failed;;
800 card->dpram_phys = pres->start;
801 card->dpram_size = pres->end - pres->start + 1;
802 card->dpram = ioremap_nocache(card->dpram_phys, card->dpram_size);
803 if (!card->dpram) {
804 dev_alert(&card->pdev->dev, "dpram ioremap failed\n");
805 goto ioremap_failed;
806 }
807
808 pres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
809 if (pres)
810 card->irq.nr = pres->start;
811
812 /* reset card */
813 ret = softing_card_boot(card);
814 if (ret < 0) {
815 dev_alert(&pdev->dev, "failed to boot\n");
816 goto boot_failed;
817 }
818
819 /* only now, the chip's are known */
820 card->id.freq = card->pdat->freq;
821
822 ret = sysfs_create_group(&pdev->dev.kobj, &softing_pdev_group);
823 if (ret < 0) {
824 dev_alert(&card->pdev->dev, "sysfs failed\n");
825 goto sysfs_failed;
826 }
827
828 ret = -ENOMEM;
829 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
830 card->net[j] = netdev =
831 softing_netdev_create(card, card->id.chip[j]);
832 if (!netdev) {
833 dev_alert(&pdev->dev, "failed to make can[%i]", j);
834 goto netdev_failed;
835 }
836 priv = netdev_priv(card->net[j]);
837 priv->index = j;
838 ret = softing_netdev_register(netdev);
839 if (ret) {
840 free_candev(netdev);
841 card->net[j] = NULL;
842 dev_alert(&card->pdev->dev,
843 "failed to register can[%i]\n", j);
844 goto netdev_failed;
845 }
846 }
847 dev_info(&card->pdev->dev, "%s ready.\n", card->pdat->name);
848 return 0;
849
850netdev_failed:
851 for (j = 0; j < ARRAY_SIZE(card->net); ++j) {
852 if (!card->net[j])
853 continue;
854 softing_netdev_cleanup(card->net[j]);
855 }
856 sysfs_remove_group(&pdev->dev.kobj, &softing_pdev_group);
857sysfs_failed:
858 softing_card_shutdown(card);
859boot_failed:
860 iounmap(card->dpram);
861ioremap_failed:
862platform_resource_failed:
863 kfree(card);
864 return ret;
865}
866
867static struct platform_driver softing_driver = {
868 .driver = {
869 .name = "softing",
870 .owner = THIS_MODULE,
871 },
872 .probe = softing_pdev_probe,
873 .remove = __devexit_p(softing_pdev_remove),
874};
875
876MODULE_ALIAS("platform:softing");
877
878static int __init softing_start(void)
879{
880 return platform_driver_register(&softing_driver);
881}
882
883static void __exit softing_stop(void)
884{
885 platform_driver_unregister(&softing_driver);
886}
887
888module_init(softing_start);
889module_exit(softing_stop);
890
891MODULE_DESCRIPTION("Softing DPRAM CAN driver");
892MODULE_AUTHOR("Kurt Van Dijck <kurt.van.dijck@eia.be>");
893MODULE_LICENSE("GPL v2");
diff --git a/drivers/net/can/softing/softing_platform.h b/drivers/net/can/softing/softing_platform.h
new file mode 100644
index 000000000000..ebbf69815623
--- /dev/null
+++ b/drivers/net/can/softing/softing_platform.h
@@ -0,0 +1,40 @@
1
2#include <linux/platform_device.h>
3
4#ifndef _SOFTING_DEVICE_H_
5#define _SOFTING_DEVICE_H_
6
7/* softing firmware directory prefix */
8#define fw_dir "softing-4.6/"
9
10struct softing_platform_data {
11 unsigned int manf;
12 unsigned int prod;
13 /*
14 * generation
15 * 1st with NEC or SJA1000
16 * 8bit, exclusive interrupt, ...
17 * 2nd only SJA1000
18 * 16bit, shared interrupt
19 */
20 int generation;
21 int nbus; /* # busses on device */
22 unsigned int freq; /* operating frequency in Hz */
23 unsigned int max_brp;
24 unsigned int max_sjw;
25 unsigned long dpram_size;
26 const char *name;
27 struct {
28 unsigned long offs;
29 unsigned long addr;
30 const char *fw;
31 } boot, load, app;
32 /*
33 * reset() function
34 * bring pdev in or out of reset, depending on value
35 */
36 int (*reset)(struct platform_device *pdev, int value);
37 int (*enable_irq)(struct platform_device *pdev, int value);
38};
39
40#endif
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c
index 263a2944566f..2d2d28f58e91 100644
--- a/drivers/net/cnic.c
+++ b/drivers/net/cnic.c
@@ -65,7 +65,14 @@ static LIST_HEAD(cnic_udev_list);
65static DEFINE_RWLOCK(cnic_dev_lock); 65static DEFINE_RWLOCK(cnic_dev_lock);
66static DEFINE_MUTEX(cnic_lock); 66static DEFINE_MUTEX(cnic_lock);
67 67
68static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE]; 68static struct cnic_ulp_ops __rcu *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
69
70/* helper function, assuming cnic_lock is held */
71static inline struct cnic_ulp_ops *cnic_ulp_tbl_prot(int type)
72{
73 return rcu_dereference_protected(cnic_ulp_tbl[type],
74 lockdep_is_held(&cnic_lock));
75}
69 76
70static int cnic_service_bnx2(void *, void *); 77static int cnic_service_bnx2(void *, void *);
71static int cnic_service_bnx2x(void *, void *); 78static int cnic_service_bnx2x(void *, void *);
@@ -435,7 +442,7 @@ int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
435 return -EINVAL; 442 return -EINVAL;
436 } 443 }
437 mutex_lock(&cnic_lock); 444 mutex_lock(&cnic_lock);
438 if (cnic_ulp_tbl[ulp_type]) { 445 if (cnic_ulp_tbl_prot(ulp_type)) {
439 pr_err("%s: Type %d has already been registered\n", 446 pr_err("%s: Type %d has already been registered\n",
440 __func__, ulp_type); 447 __func__, ulp_type);
441 mutex_unlock(&cnic_lock); 448 mutex_unlock(&cnic_lock);
@@ -478,7 +485,7 @@ int cnic_unregister_driver(int ulp_type)
478 return -EINVAL; 485 return -EINVAL;
479 } 486 }
480 mutex_lock(&cnic_lock); 487 mutex_lock(&cnic_lock);
481 ulp_ops = cnic_ulp_tbl[ulp_type]; 488 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
482 if (!ulp_ops) { 489 if (!ulp_ops) {
483 pr_err("%s: Type %d has not been registered\n", 490 pr_err("%s: Type %d has not been registered\n",
484 __func__, ulp_type); 491 __func__, ulp_type);
@@ -529,7 +536,7 @@ static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
529 return -EINVAL; 536 return -EINVAL;
530 } 537 }
531 mutex_lock(&cnic_lock); 538 mutex_lock(&cnic_lock);
532 if (cnic_ulp_tbl[ulp_type] == NULL) { 539 if (cnic_ulp_tbl_prot(ulp_type) == NULL) {
533 pr_err("%s: Driver with type %d has not been registered\n", 540 pr_err("%s: Driver with type %d has not been registered\n",
534 __func__, ulp_type); 541 __func__, ulp_type);
535 mutex_unlock(&cnic_lock); 542 mutex_unlock(&cnic_lock);
@@ -544,7 +551,7 @@ static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
544 551
545 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]); 552 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
546 cp->ulp_handle[ulp_type] = ulp_ctx; 553 cp->ulp_handle[ulp_type] = ulp_ctx;
547 ulp_ops = cnic_ulp_tbl[ulp_type]; 554 ulp_ops = cnic_ulp_tbl_prot(ulp_type);
548 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops); 555 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
549 cnic_hold(dev); 556 cnic_hold(dev);
550 557
@@ -699,13 +706,13 @@ static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
699static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma) 706static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
700{ 707{
701 int i; 708 int i;
702 u32 *page_table = dma->pgtbl; 709 __le32 *page_table = (__le32 *) dma->pgtbl;
703 710
704 for (i = 0; i < dma->num_pages; i++) { 711 for (i = 0; i < dma->num_pages; i++) {
705 /* Each entry needs to be in big endian format. */ 712 /* Each entry needs to be in big endian format. */
706 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32); 713 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
707 page_table++; 714 page_table++;
708 *page_table = (u32) dma->pg_map_arr[i]; 715 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
709 page_table++; 716 page_table++;
710 } 717 }
711} 718}
@@ -713,13 +720,13 @@ static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
713static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma) 720static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
714{ 721{
715 int i; 722 int i;
716 u32 *page_table = dma->pgtbl; 723 __le32 *page_table = (__le32 *) dma->pgtbl;
717 724
718 for (i = 0; i < dma->num_pages; i++) { 725 for (i = 0; i < dma->num_pages; i++) {
719 /* Each entry needs to be in little endian format. */ 726 /* Each entry needs to be in little endian format. */
720 *page_table = dma->pg_map_arr[i] & 0xffffffff; 727 *page_table = cpu_to_le32(dma->pg_map_arr[i] & 0xffffffff);
721 page_table++; 728 page_table++;
722 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32); 729 *page_table = cpu_to_le32((u64) dma->pg_map_arr[i] >> 32);
723 page_table++; 730 page_table++;
724 } 731 }
725} 732}
@@ -2953,7 +2960,8 @@ static void cnic_ulp_stop(struct cnic_dev *dev)
2953 struct cnic_ulp_ops *ulp_ops; 2960 struct cnic_ulp_ops *ulp_ops;
2954 2961
2955 mutex_lock(&cnic_lock); 2962 mutex_lock(&cnic_lock);
2956 ulp_ops = cp->ulp_ops[if_type]; 2963 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
2964 lockdep_is_held(&cnic_lock));
2957 if (!ulp_ops) { 2965 if (!ulp_ops) {
2958 mutex_unlock(&cnic_lock); 2966 mutex_unlock(&cnic_lock);
2959 continue; 2967 continue;
@@ -2977,7 +2985,8 @@ static void cnic_ulp_start(struct cnic_dev *dev)
2977 struct cnic_ulp_ops *ulp_ops; 2985 struct cnic_ulp_ops *ulp_ops;
2978 2986
2979 mutex_lock(&cnic_lock); 2987 mutex_lock(&cnic_lock);
2980 ulp_ops = cp->ulp_ops[if_type]; 2988 ulp_ops = rcu_dereference_protected(cp->ulp_ops[if_type],
2989 lockdep_is_held(&cnic_lock));
2981 if (!ulp_ops || !ulp_ops->cnic_start) { 2990 if (!ulp_ops || !ulp_ops->cnic_start) {
2982 mutex_unlock(&cnic_lock); 2991 mutex_unlock(&cnic_lock);
2983 continue; 2992 continue;
@@ -3041,7 +3050,7 @@ static void cnic_ulp_init(struct cnic_dev *dev)
3041 struct cnic_ulp_ops *ulp_ops; 3050 struct cnic_ulp_ops *ulp_ops;
3042 3051
3043 mutex_lock(&cnic_lock); 3052 mutex_lock(&cnic_lock);
3044 ulp_ops = cnic_ulp_tbl[i]; 3053 ulp_ops = cnic_ulp_tbl_prot(i);
3045 if (!ulp_ops || !ulp_ops->cnic_init) { 3054 if (!ulp_ops || !ulp_ops->cnic_init) {
3046 mutex_unlock(&cnic_lock); 3055 mutex_unlock(&cnic_lock);
3047 continue; 3056 continue;
@@ -3065,7 +3074,7 @@ static void cnic_ulp_exit(struct cnic_dev *dev)
3065 struct cnic_ulp_ops *ulp_ops; 3074 struct cnic_ulp_ops *ulp_ops;
3066 3075
3067 mutex_lock(&cnic_lock); 3076 mutex_lock(&cnic_lock);
3068 ulp_ops = cnic_ulp_tbl[i]; 3077 ulp_ops = cnic_ulp_tbl_prot(i);
3069 if (!ulp_ops || !ulp_ops->cnic_exit) { 3078 if (!ulp_ops || !ulp_ops->cnic_exit) {
3070 mutex_unlock(&cnic_lock); 3079 mutex_unlock(&cnic_lock);
3071 continue; 3080 continue;
@@ -4170,6 +4179,14 @@ static void cnic_enable_bnx2_int(struct cnic_dev *dev)
4170 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx); 4179 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
4171} 4180}
4172 4181
4182static void cnic_get_bnx2_iscsi_info(struct cnic_dev *dev)
4183{
4184 u32 max_conn;
4185
4186 max_conn = cnic_reg_rd_ind(dev, BNX2_FW_MAX_ISCSI_CONN);
4187 dev->max_iscsi_conn = max_conn;
4188}
4189
4173static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev) 4190static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
4174{ 4191{
4175 struct cnic_local *cp = dev->cnic_priv; 4192 struct cnic_local *cp = dev->cnic_priv;
@@ -4494,6 +4511,8 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev)
4494 return err; 4511 return err;
4495 } 4512 }
4496 4513
4514 cnic_get_bnx2_iscsi_info(dev);
4515
4497 return 0; 4516 return 0;
4498} 4517}
4499 4518
@@ -4705,129 +4724,6 @@ static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev,
4705 cp->rx_cons = *cp->rx_cons_ptr; 4724 cp->rx_cons = *cp->rx_cons_ptr;
4706} 4725}
4707 4726
4708static int cnic_read_bnx2x_iscsi_mac(struct cnic_dev *dev, u32 upper_addr,
4709 u32 lower_addr)
4710{
4711 u32 val;
4712 u8 mac[6];
4713
4714 val = CNIC_RD(dev, upper_addr);
4715
4716 mac[0] = (u8) (val >> 8);
4717 mac[1] = (u8) val;
4718
4719 val = CNIC_RD(dev, lower_addr);
4720
4721 mac[2] = (u8) (val >> 24);
4722 mac[3] = (u8) (val >> 16);
4723 mac[4] = (u8) (val >> 8);
4724 mac[5] = (u8) val;
4725
4726 if (is_valid_ether_addr(mac)) {
4727 memcpy(dev->mac_addr, mac, 6);
4728 return 0;
4729 } else {
4730 return -EINVAL;
4731 }
4732}
4733
4734static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
4735{
4736 struct cnic_local *cp = dev->cnic_priv;
4737 u32 base, base2, addr, addr1, val;
4738 int port = CNIC_PORT(cp);
4739
4740 dev->max_iscsi_conn = 0;
4741 base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4742 if (base == 0)
4743 return;
4744
4745 base2 = CNIC_RD(dev, (CNIC_PATH(cp) ? MISC_REG_GENERIC_CR_1 :
4746 MISC_REG_GENERIC_CR_0));
4747 addr = BNX2X_SHMEM_ADDR(base,
4748 dev_info.port_hw_config[port].iscsi_mac_upper);
4749
4750 addr1 = BNX2X_SHMEM_ADDR(base,
4751 dev_info.port_hw_config[port].iscsi_mac_lower);
4752
4753 cnic_read_bnx2x_iscsi_mac(dev, addr, addr1);
4754
4755 addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4756 val = CNIC_RD(dev, addr);
4757
4758 if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4759 u16 val16;
4760
4761 addr = BNX2X_SHMEM_ADDR(base,
4762 drv_lic_key[port].max_iscsi_init_conn);
4763 val16 = CNIC_RD16(dev, addr);
4764
4765 if (val16)
4766 val16 ^= 0x1e1e;
4767 dev->max_iscsi_conn = val16;
4768 }
4769
4770 if (BNX2X_CHIP_IS_E2(cp->chip_id))
4771 dev->max_fcoe_conn = BNX2X_FCOE_NUM_CONNECTIONS;
4772
4773 if (BNX2X_CHIP_IS_E1H(cp->chip_id) || BNX2X_CHIP_IS_E2(cp->chip_id)) {
4774 int func = CNIC_FUNC(cp);
4775 u32 mf_cfg_addr;
4776
4777 if (BNX2X_SHMEM2_HAS(base2, mf_cfg_addr))
4778 mf_cfg_addr = CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base2,
4779 mf_cfg_addr));
4780 else
4781 mf_cfg_addr = base + BNX2X_SHMEM_MF_BLK_OFFSET;
4782
4783 if (BNX2X_CHIP_IS_E2(cp->chip_id)) {
4784 /* Must determine if the MF is SD vs SI mode */
4785 addr = BNX2X_SHMEM_ADDR(base,
4786 dev_info.shared_feature_config.config);
4787 val = CNIC_RD(dev, addr);
4788 if ((val & SHARED_FEAT_CFG_FORCE_SF_MODE_MASK) ==
4789 SHARED_FEAT_CFG_FORCE_SF_MODE_SWITCH_INDEPT) {
4790 int rc;
4791
4792 /* MULTI_FUNCTION_SI mode */
4793 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4794 func_ext_config[func].func_cfg);
4795 val = CNIC_RD(dev, addr);
4796 if (!(val & MACP_FUNC_CFG_FLAGS_ISCSI_OFFLOAD))
4797 dev->max_iscsi_conn = 0;
4798
4799 if (!(val & MACP_FUNC_CFG_FLAGS_FCOE_OFFLOAD))
4800 dev->max_fcoe_conn = 0;
4801
4802 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4803 func_ext_config[func].
4804 iscsi_mac_addr_upper);
4805 addr1 = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4806 func_ext_config[func].
4807 iscsi_mac_addr_lower);
4808 rc = cnic_read_bnx2x_iscsi_mac(dev, addr,
4809 addr1);
4810 if (rc && func > 1)
4811 dev->max_iscsi_conn = 0;
4812
4813 return;
4814 }
4815 }
4816
4817 addr = BNX2X_MF_CFG_ADDR(mf_cfg_addr,
4818 func_mf_config[func].e1hov_tag);
4819
4820 val = CNIC_RD(dev, addr);
4821 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4822 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4823 dev->max_fcoe_conn = 0;
4824 dev->max_iscsi_conn = 0;
4825 }
4826 }
4827 if (!is_valid_ether_addr(dev->mac_addr))
4828 dev->max_iscsi_conn = 0;
4829}
4830
4831static void cnic_init_bnx2x_kcq(struct cnic_dev *dev) 4727static void cnic_init_bnx2x_kcq(struct cnic_dev *dev)
4832{ 4728{
4833 struct cnic_local *cp = dev->cnic_priv; 4729 struct cnic_local *cp = dev->cnic_priv;
@@ -4909,8 +4805,6 @@ static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4909 4805
4910 cnic_init_bnx2x_kcq(dev); 4806 cnic_init_bnx2x_kcq(dev);
4911 4807
4912 cnic_get_bnx2x_iscsi_info(dev);
4913
4914 /* Only 1 EQ */ 4808 /* Only 1 EQ */
4915 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX); 4809 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
4916 CNIC_WR(dev, BAR_CSTRORM_INTMEM + 4810 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
@@ -5343,6 +5237,14 @@ static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
5343 cdev->pcidev = pdev; 5237 cdev->pcidev = pdev;
5344 cp->chip_id = ethdev->chip_id; 5238 cp->chip_id = ethdev->chip_id;
5345 5239
5240 if (!(ethdev->drv_state & CNIC_DRV_STATE_NO_ISCSI))
5241 cdev->max_iscsi_conn = ethdev->max_iscsi_conn;
5242 if (BNX2X_CHIP_IS_E2(cp->chip_id) &&
5243 !(ethdev->drv_state & CNIC_DRV_STATE_NO_FCOE))
5244 cdev->max_fcoe_conn = ethdev->max_fcoe_conn;
5245
5246 memcpy(cdev->mac_addr, ethdev->iscsi_mac, 6);
5247
5346 cp->cnic_ops = &cnic_bnx2x_ops; 5248 cp->cnic_ops = &cnic_bnx2x_ops;
5347 cp->start_hw = cnic_start_bnx2x_hw; 5249 cp->start_hw = cnic_start_bnx2x_hw;
5348 cp->stop_hw = cnic_stop_bnx2x_hw; 5250 cp->stop_hw = cnic_stop_bnx2x_hw;
diff --git a/drivers/net/cnic.h b/drivers/net/cnic.h
index b328f6c924c3..4456260c653c 100644
--- a/drivers/net/cnic.h
+++ b/drivers/net/cnic.h
@@ -220,7 +220,7 @@ struct cnic_local {
220#define ULP_F_INIT 0 220#define ULP_F_INIT 0
221#define ULP_F_START 1 221#define ULP_F_START 1
222#define ULP_F_CALL_PENDING 2 222#define ULP_F_CALL_PENDING 2
223 struct cnic_ulp_ops *ulp_ops[MAX_CNIC_ULP_TYPE]; 223 struct cnic_ulp_ops __rcu *ulp_ops[MAX_CNIC_ULP_TYPE];
224 224
225 unsigned long cnic_local_flags; 225 unsigned long cnic_local_flags;
226#define CNIC_LCL_FL_KWQ_INIT 0x0 226#define CNIC_LCL_FL_KWQ_INIT 0x0
diff --git a/drivers/net/cnic_if.h b/drivers/net/cnic_if.h
index 9f44e0ffe003..e01b49ee3591 100644
--- a/drivers/net/cnic_if.h
+++ b/drivers/net/cnic_if.h
@@ -12,8 +12,8 @@
12#ifndef CNIC_IF_H 12#ifndef CNIC_IF_H
13#define CNIC_IF_H 13#define CNIC_IF_H
14 14
15#define CNIC_MODULE_VERSION "2.2.12" 15#define CNIC_MODULE_VERSION "2.2.13"
16#define CNIC_MODULE_RELDATE "Jan 03, 2011" 16#define CNIC_MODULE_RELDATE "Jan 31, 2011"
17 17
18#define CNIC_ULP_RDMA 0 18#define CNIC_ULP_RDMA 0
19#define CNIC_ULP_ISCSI 1 19#define CNIC_ULP_ISCSI 1
@@ -159,6 +159,9 @@ struct cnic_eth_dev {
159 u32 drv_state; 159 u32 drv_state;
160#define CNIC_DRV_STATE_REGD 0x00000001 160#define CNIC_DRV_STATE_REGD 0x00000001
161#define CNIC_DRV_STATE_USING_MSIX 0x00000002 161#define CNIC_DRV_STATE_USING_MSIX 0x00000002
162#define CNIC_DRV_STATE_NO_ISCSI_OOO 0x00000004
163#define CNIC_DRV_STATE_NO_ISCSI 0x00000008
164#define CNIC_DRV_STATE_NO_FCOE 0x00000010
162 u32 chip_id; 165 u32 chip_id;
163 u32 max_kwqe_pending; 166 u32 max_kwqe_pending;
164 struct pci_dev *pdev; 167 struct pci_dev *pdev;
@@ -176,6 +179,7 @@ struct cnic_eth_dev {
176 u32 fcoe_init_cid; 179 u32 fcoe_init_cid;
177 u16 iscsi_l2_client_id; 180 u16 iscsi_l2_client_id;
178 u16 iscsi_l2_cid; 181 u16 iscsi_l2_cid;
182 u8 iscsi_mac[ETH_ALEN];
179 183
180 int num_irq; 184 int num_irq;
181 struct cnic_irq irq_arr[MAX_CNIC_VEC]; 185 struct cnic_irq irq_arr[MAX_CNIC_VEC];
diff --git a/drivers/net/cxgb4/cxgb4_main.c b/drivers/net/cxgb4/cxgb4_main.c
index 059c1eec8c3f..ec35d458102c 100644
--- a/drivers/net/cxgb4/cxgb4_main.c
+++ b/drivers/net/cxgb4/cxgb4_main.c
@@ -2710,6 +2710,8 @@ static int cxgb_open(struct net_device *dev)
2710 struct port_info *pi = netdev_priv(dev); 2710 struct port_info *pi = netdev_priv(dev);
2711 struct adapter *adapter = pi->adapter; 2711 struct adapter *adapter = pi->adapter;
2712 2712
2713 netif_carrier_off(dev);
2714
2713 if (!(adapter->flags & FULL_INIT_DONE)) { 2715 if (!(adapter->flags & FULL_INIT_DONE)) {
2714 err = cxgb_up(adapter); 2716 err = cxgb_up(adapter);
2715 if (err < 0) 2717 if (err < 0)
@@ -3661,7 +3663,6 @@ static int __devinit init_one(struct pci_dev *pdev,
3661 pi->xact_addr_filt = -1; 3663 pi->xact_addr_filt = -1;
3662 pi->rx_offload = RX_CSO; 3664 pi->rx_offload = RX_CSO;
3663 pi->port_id = i; 3665 pi->port_id = i;
3664 netif_carrier_off(netdev);
3665 netdev->irq = pdev->irq; 3666 netdev->irq = pdev->irq;
3666 3667
3667 netdev->features |= NETIF_F_SG | TSO_FLAGS; 3668 netdev->features |= NETIF_F_SG | TSO_FLAGS;
diff --git a/drivers/net/dl2k.c b/drivers/net/dl2k.c
index e1a8216ff692..c05db6046050 100644
--- a/drivers/net/dl2k.c
+++ b/drivers/net/dl2k.c
@@ -1753,8 +1753,6 @@ rio_close (struct net_device *dev)
1753 1753
1754 /* Free all the skbuffs in the queue. */ 1754 /* Free all the skbuffs in the queue. */
1755 for (i = 0; i < RX_RING_SIZE; i++) { 1755 for (i = 0; i < RX_RING_SIZE; i++) {
1756 np->rx_ring[i].status = 0;
1757 np->rx_ring[i].fraginfo = 0;
1758 skb = np->rx_skbuff[i]; 1756 skb = np->rx_skbuff[i];
1759 if (skb) { 1757 if (skb) {
1760 pci_unmap_single(np->pdev, 1758 pci_unmap_single(np->pdev,
@@ -1763,6 +1761,8 @@ rio_close (struct net_device *dev)
1763 dev_kfree_skb (skb); 1761 dev_kfree_skb (skb);
1764 np->rx_skbuff[i] = NULL; 1762 np->rx_skbuff[i] = NULL;
1765 } 1763 }
1764 np->rx_ring[i].status = 0;
1765 np->rx_ring[i].fraginfo = 0;
1766 } 1766 }
1767 for (i = 0; i < TX_RING_SIZE; i++) { 1767 for (i = 0; i < TX_RING_SIZE; i++) {
1768 skb = np->tx_skbuff[i]; 1768 skb = np->tx_skbuff[i];
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index e610e1369053..00bf595ebd67 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -364,6 +364,7 @@ struct e1000_adapter {
364 /* structs defined in e1000_hw.h */ 364 /* structs defined in e1000_hw.h */
365 struct e1000_hw hw; 365 struct e1000_hw hw;
366 366
367 spinlock_t stats64_lock;
367 struct e1000_hw_stats stats; 368 struct e1000_hw_stats stats;
368 struct e1000_phy_info phy_info; 369 struct e1000_phy_info phy_info;
369 struct e1000_phy_stats phy_stats; 370 struct e1000_phy_stats phy_stats;
@@ -494,7 +495,9 @@ extern int e1000e_setup_rx_resources(struct e1000_adapter *adapter);
494extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter); 495extern int e1000e_setup_tx_resources(struct e1000_adapter *adapter);
495extern void e1000e_free_rx_resources(struct e1000_adapter *adapter); 496extern void e1000e_free_rx_resources(struct e1000_adapter *adapter);
496extern void e1000e_free_tx_resources(struct e1000_adapter *adapter); 497extern void e1000e_free_tx_resources(struct e1000_adapter *adapter);
497extern void e1000e_update_stats(struct e1000_adapter *adapter); 498extern struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
499 struct rtnl_link_stats64
500 *stats);
498extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter); 501extern void e1000e_set_interrupt_capability(struct e1000_adapter *adapter);
499extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter); 502extern void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter);
500extern void e1000e_get_hw_control(struct e1000_adapter *adapter); 503extern void e1000e_get_hw_control(struct e1000_adapter *adapter);
diff --git a/drivers/net/e1000e/ethtool.c b/drivers/net/e1000e/ethtool.c
index fa08b6336cfb..daa7fe4b9fdd 100644
--- a/drivers/net/e1000e/ethtool.c
+++ b/drivers/net/e1000e/ethtool.c
@@ -46,15 +46,15 @@ struct e1000_stats {
46}; 46};
47 47
48#define E1000_STAT(str, m) { \ 48#define E1000_STAT(str, m) { \
49 .stat_string = str, \ 49 .stat_string = str, \
50 .type = E1000_STATS, \ 50 .type = E1000_STATS, \
51 .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \ 51 .sizeof_stat = sizeof(((struct e1000_adapter *)0)->m), \
52 .stat_offset = offsetof(struct e1000_adapter, m) } 52 .stat_offset = offsetof(struct e1000_adapter, m) }
53#define E1000_NETDEV_STAT(str, m) { \ 53#define E1000_NETDEV_STAT(str, m) { \
54 .stat_string = str, \ 54 .stat_string = str, \
55 .type = NETDEV_STATS, \ 55 .type = NETDEV_STATS, \
56 .sizeof_stat = sizeof(((struct net_device *)0)->m), \ 56 .sizeof_stat = sizeof(((struct rtnl_link_stats64 *)0)->m), \
57 .stat_offset = offsetof(struct net_device, m) } 57 .stat_offset = offsetof(struct rtnl_link_stats64, m) }
58 58
59static const struct e1000_stats e1000_gstrings_stats[] = { 59static const struct e1000_stats e1000_gstrings_stats[] = {
60 E1000_STAT("rx_packets", stats.gprc), 60 E1000_STAT("rx_packets", stats.gprc),
@@ -65,21 +65,21 @@ static const struct e1000_stats e1000_gstrings_stats[] = {
65 E1000_STAT("tx_broadcast", stats.bptc), 65 E1000_STAT("tx_broadcast", stats.bptc),
66 E1000_STAT("rx_multicast", stats.mprc), 66 E1000_STAT("rx_multicast", stats.mprc),
67 E1000_STAT("tx_multicast", stats.mptc), 67 E1000_STAT("tx_multicast", stats.mptc),
68 E1000_NETDEV_STAT("rx_errors", stats.rx_errors), 68 E1000_NETDEV_STAT("rx_errors", rx_errors),
69 E1000_NETDEV_STAT("tx_errors", stats.tx_errors), 69 E1000_NETDEV_STAT("tx_errors", tx_errors),
70 E1000_NETDEV_STAT("tx_dropped", stats.tx_dropped), 70 E1000_NETDEV_STAT("tx_dropped", tx_dropped),
71 E1000_STAT("multicast", stats.mprc), 71 E1000_STAT("multicast", stats.mprc),
72 E1000_STAT("collisions", stats.colc), 72 E1000_STAT("collisions", stats.colc),
73 E1000_NETDEV_STAT("rx_length_errors", stats.rx_length_errors), 73 E1000_NETDEV_STAT("rx_length_errors", rx_length_errors),
74 E1000_NETDEV_STAT("rx_over_errors", stats.rx_over_errors), 74 E1000_NETDEV_STAT("rx_over_errors", rx_over_errors),
75 E1000_STAT("rx_crc_errors", stats.crcerrs), 75 E1000_STAT("rx_crc_errors", stats.crcerrs),
76 E1000_NETDEV_STAT("rx_frame_errors", stats.rx_frame_errors), 76 E1000_NETDEV_STAT("rx_frame_errors", rx_frame_errors),
77 E1000_STAT("rx_no_buffer_count", stats.rnbc), 77 E1000_STAT("rx_no_buffer_count", stats.rnbc),
78 E1000_STAT("rx_missed_errors", stats.mpc), 78 E1000_STAT("rx_missed_errors", stats.mpc),
79 E1000_STAT("tx_aborted_errors", stats.ecol), 79 E1000_STAT("tx_aborted_errors", stats.ecol),
80 E1000_STAT("tx_carrier_errors", stats.tncrs), 80 E1000_STAT("tx_carrier_errors", stats.tncrs),
81 E1000_NETDEV_STAT("tx_fifo_errors", stats.tx_fifo_errors), 81 E1000_NETDEV_STAT("tx_fifo_errors", tx_fifo_errors),
82 E1000_NETDEV_STAT("tx_heartbeat_errors", stats.tx_heartbeat_errors), 82 E1000_NETDEV_STAT("tx_heartbeat_errors", tx_heartbeat_errors),
83 E1000_STAT("tx_window_errors", stats.latecol), 83 E1000_STAT("tx_window_errors", stats.latecol),
84 E1000_STAT("tx_abort_late_coll", stats.latecol), 84 E1000_STAT("tx_abort_late_coll", stats.latecol),
85 E1000_STAT("tx_deferred_ok", stats.dc), 85 E1000_STAT("tx_deferred_ok", stats.dc),
@@ -684,20 +684,13 @@ static int e1000_set_ringparam(struct net_device *netdev,
684 rx_old = adapter->rx_ring; 684 rx_old = adapter->rx_ring;
685 685
686 err = -ENOMEM; 686 err = -ENOMEM;
687 tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 687 tx_ring = kmemdup(tx_old, sizeof(struct e1000_ring), GFP_KERNEL);
688 if (!tx_ring) 688 if (!tx_ring)
689 goto err_alloc_tx; 689 goto err_alloc_tx;
690 /*
691 * use a memcpy to save any previously configured
692 * items like napi structs from having to be
693 * reinitialized
694 */
695 memcpy(tx_ring, tx_old, sizeof(struct e1000_ring));
696 690
697 rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL); 691 rx_ring = kmemdup(rx_old, sizeof(struct e1000_ring), GFP_KERNEL);
698 if (!rx_ring) 692 if (!rx_ring)
699 goto err_alloc_rx; 693 goto err_alloc_rx;
700 memcpy(rx_ring, rx_old, sizeof(struct e1000_ring));
701 694
702 adapter->tx_ring = tx_ring; 695 adapter->tx_ring = tx_ring;
703 adapter->rx_ring = rx_ring; 696 adapter->rx_ring = rx_ring;
@@ -1255,7 +1248,6 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1255{ 1248{
1256 struct e1000_hw *hw = &adapter->hw; 1249 struct e1000_hw *hw = &adapter->hw;
1257 u32 ctrl_reg = 0; 1250 u32 ctrl_reg = 0;
1258 u32 stat_reg = 0;
1259 u16 phy_reg = 0; 1251 u16 phy_reg = 0;
1260 s32 ret_val = 0; 1252 s32 ret_val = 0;
1261 1253
@@ -1363,8 +1355,7 @@ static int e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
1363 * Set the ILOS bit on the fiber Nic if half duplex link is 1355 * Set the ILOS bit on the fiber Nic if half duplex link is
1364 * detected. 1356 * detected.
1365 */ 1357 */
1366 stat_reg = er32(STATUS); 1358 if ((er32(STATUS) & E1000_STATUS_FD) == 0)
1367 if ((stat_reg & E1000_STATUS_FD) == 0)
1368 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU); 1359 ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
1369 } 1360 }
1370 1361
@@ -1982,14 +1973,15 @@ static void e1000_get_ethtool_stats(struct net_device *netdev,
1982 u64 *data) 1973 u64 *data)
1983{ 1974{
1984 struct e1000_adapter *adapter = netdev_priv(netdev); 1975 struct e1000_adapter *adapter = netdev_priv(netdev);
1976 struct rtnl_link_stats64 net_stats;
1985 int i; 1977 int i;
1986 char *p = NULL; 1978 char *p = NULL;
1987 1979
1988 e1000e_update_stats(adapter); 1980 e1000e_get_stats64(netdev, &net_stats);
1989 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) { 1981 for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
1990 switch (e1000_gstrings_stats[i].type) { 1982 switch (e1000_gstrings_stats[i].type) {
1991 case NETDEV_STATS: 1983 case NETDEV_STATS:
1992 p = (char *) netdev + 1984 p = (char *) &net_stats +
1993 e1000_gstrings_stats[i].stat_offset; 1985 e1000_gstrings_stats[i].stat_offset;
1994 break; 1986 break;
1995 case E1000_STATS: 1987 case E1000_STATS:
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index fb46974cfec1..232b42b7f7ce 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -2104,7 +2104,6 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
2104{ 2104{
2105 union ich8_hws_flash_status hsfsts; 2105 union ich8_hws_flash_status hsfsts;
2106 s32 ret_val = -E1000_ERR_NVM; 2106 s32 ret_val = -E1000_ERR_NVM;
2107 s32 i = 0;
2108 2107
2109 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); 2108 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS);
2110 2109
@@ -2140,6 +2139,8 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
2140 ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval); 2139 ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval);
2141 ret_val = 0; 2140 ret_val = 0;
2142 } else { 2141 } else {
2142 s32 i = 0;
2143
2143 /* 2144 /*
2144 * Otherwise poll for sometime so the current 2145 * Otherwise poll for sometime so the current
2145 * cycle has a chance to end before giving up. 2146 * cycle has a chance to end before giving up.
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index 68aa1749bf66..96921de5df2e 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -1978,15 +1978,15 @@ static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw)
1978{ 1978{
1979 struct e1000_nvm_info *nvm = &hw->nvm; 1979 struct e1000_nvm_info *nvm = &hw->nvm;
1980 u32 eecd = er32(EECD); 1980 u32 eecd = er32(EECD);
1981 u16 timeout = 0;
1982 u8 spi_stat_reg; 1981 u8 spi_stat_reg;
1983 1982
1984 if (nvm->type == e1000_nvm_eeprom_spi) { 1983 if (nvm->type == e1000_nvm_eeprom_spi) {
1984 u16 timeout = NVM_MAX_RETRY_SPI;
1985
1985 /* Clear SK and CS */ 1986 /* Clear SK and CS */
1986 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK); 1987 eecd &= ~(E1000_EECD_CS | E1000_EECD_SK);
1987 ew32(EECD, eecd); 1988 ew32(EECD, eecd);
1988 udelay(1); 1989 udelay(1);
1989 timeout = NVM_MAX_RETRY_SPI;
1990 1990
1991 /* 1991 /*
1992 * Read "Status Register" repeatedly until the LSB is cleared. 1992 * Read "Status Register" repeatedly until the LSB is cleared.
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index 1c18f26b0812..5b916b01805f 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -900,8 +900,6 @@ next_desc:
900 900
901 adapter->total_rx_bytes += total_rx_bytes; 901 adapter->total_rx_bytes += total_rx_bytes;
902 adapter->total_rx_packets += total_rx_packets; 902 adapter->total_rx_packets += total_rx_packets;
903 netdev->stats.rx_bytes += total_rx_bytes;
904 netdev->stats.rx_packets += total_rx_packets;
905 return cleaned; 903 return cleaned;
906} 904}
907 905
@@ -1057,8 +1055,6 @@ static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
1057 } 1055 }
1058 adapter->total_tx_bytes += total_tx_bytes; 1056 adapter->total_tx_bytes += total_tx_bytes;
1059 adapter->total_tx_packets += total_tx_packets; 1057 adapter->total_tx_packets += total_tx_packets;
1060 netdev->stats.tx_bytes += total_tx_bytes;
1061 netdev->stats.tx_packets += total_tx_packets;
1062 return count < tx_ring->count; 1058 return count < tx_ring->count;
1063} 1059}
1064 1060
@@ -1245,8 +1241,6 @@ next_desc:
1245 1241
1246 adapter->total_rx_bytes += total_rx_bytes; 1242 adapter->total_rx_bytes += total_rx_bytes;
1247 adapter->total_rx_packets += total_rx_packets; 1243 adapter->total_rx_packets += total_rx_packets;
1248 netdev->stats.rx_bytes += total_rx_bytes;
1249 netdev->stats.rx_packets += total_rx_packets;
1250 return cleaned; 1244 return cleaned;
1251} 1245}
1252 1246
@@ -1426,8 +1420,6 @@ next_desc:
1426 1420
1427 adapter->total_rx_bytes += total_rx_bytes; 1421 adapter->total_rx_bytes += total_rx_bytes;
1428 adapter->total_rx_packets += total_rx_packets; 1422 adapter->total_rx_packets += total_rx_packets;
1429 netdev->stats.rx_bytes += total_rx_bytes;
1430 netdev->stats.rx_packets += total_rx_packets;
1431 return cleaned; 1423 return cleaned;
1432} 1424}
1433 1425
@@ -2728,7 +2720,6 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
2728{ 2720{
2729 struct e1000_hw *hw = &adapter->hw; 2721 struct e1000_hw *hw = &adapter->hw;
2730 u32 rctl, rfctl; 2722 u32 rctl, rfctl;
2731 u32 psrctl = 0;
2732 u32 pages = 0; 2723 u32 pages = 0;
2733 2724
2734 /* Workaround Si errata on 82579 - configure jumbo frame flow */ 2725 /* Workaround Si errata on 82579 - configure jumbo frame flow */
@@ -2827,6 +2818,8 @@ static void e1000_setup_rctl(struct e1000_adapter *adapter)
2827 adapter->rx_ps_pages = 0; 2818 adapter->rx_ps_pages = 0;
2828 2819
2829 if (adapter->rx_ps_pages) { 2820 if (adapter->rx_ps_pages) {
2821 u32 psrctl = 0;
2822
2830 /* Configure extra packet-split registers */ 2823 /* Configure extra packet-split registers */
2831 rfctl = er32(RFCTL); 2824 rfctl = er32(RFCTL);
2832 rfctl |= E1000_RFCTL_EXTEN; 2825 rfctl |= E1000_RFCTL_EXTEN;
@@ -3028,7 +3021,6 @@ static void e1000_set_multi(struct net_device *netdev)
3028 struct netdev_hw_addr *ha; 3021 struct netdev_hw_addr *ha;
3029 u8 *mta_list; 3022 u8 *mta_list;
3030 u32 rctl; 3023 u32 rctl;
3031 int i;
3032 3024
3033 /* Check for Promiscuous and All Multicast modes */ 3025 /* Check for Promiscuous and All Multicast modes */
3034 3026
@@ -3051,12 +3043,13 @@ static void e1000_set_multi(struct net_device *netdev)
3051 ew32(RCTL, rctl); 3043 ew32(RCTL, rctl);
3052 3044
3053 if (!netdev_mc_empty(netdev)) { 3045 if (!netdev_mc_empty(netdev)) {
3046 int i = 0;
3047
3054 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC); 3048 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
3055 if (!mta_list) 3049 if (!mta_list)
3056 return; 3050 return;
3057 3051
3058 /* prepare a packed array of only addresses. */ 3052 /* prepare a packed array of only addresses. */
3059 i = 0;
3060 netdev_for_each_mc_addr(ha, netdev) 3053 netdev_for_each_mc_addr(ha, netdev)
3061 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN); 3054 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3062 3055
@@ -3338,6 +3331,8 @@ int e1000e_up(struct e1000_adapter *adapter)
3338 return 0; 3331 return 0;
3339} 3332}
3340 3333
3334static void e1000e_update_stats(struct e1000_adapter *adapter);
3335
3341void e1000e_down(struct e1000_adapter *adapter) 3336void e1000e_down(struct e1000_adapter *adapter)
3342{ 3337{
3343 struct net_device *netdev = adapter->netdev; 3338 struct net_device *netdev = adapter->netdev;
@@ -3372,6 +3367,11 @@ void e1000e_down(struct e1000_adapter *adapter)
3372 del_timer_sync(&adapter->phy_info_timer); 3367 del_timer_sync(&adapter->phy_info_timer);
3373 3368
3374 netif_carrier_off(netdev); 3369 netif_carrier_off(netdev);
3370
3371 spin_lock(&adapter->stats64_lock);
3372 e1000e_update_stats(adapter);
3373 spin_unlock(&adapter->stats64_lock);
3374
3375 adapter->link_speed = 0; 3375 adapter->link_speed = 0;
3376 adapter->link_duplex = 0; 3376 adapter->link_duplex = 0;
3377 3377
@@ -3413,6 +3413,8 @@ static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3413 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; 3413 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3414 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN; 3414 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
3415 3415
3416 spin_lock_init(&adapter->stats64_lock);
3417
3416 e1000e_set_interrupt_capability(adapter); 3418 e1000e_set_interrupt_capability(adapter);
3417 3419
3418 if (e1000_alloc_queues(adapter)) 3420 if (e1000_alloc_queues(adapter))
@@ -3886,7 +3888,7 @@ release:
3886 * e1000e_update_stats - Update the board statistics counters 3888 * e1000e_update_stats - Update the board statistics counters
3887 * @adapter: board private structure 3889 * @adapter: board private structure
3888 **/ 3890 **/
3889void e1000e_update_stats(struct e1000_adapter *adapter) 3891static void e1000e_update_stats(struct e1000_adapter *adapter)
3890{ 3892{
3891 struct net_device *netdev = adapter->netdev; 3893 struct net_device *netdev = adapter->netdev;
3892 struct e1000_hw *hw = &adapter->hw; 3894 struct e1000_hw *hw = &adapter->hw;
@@ -3998,10 +4000,11 @@ static void e1000_phy_read_status(struct e1000_adapter *adapter)
3998{ 4000{
3999 struct e1000_hw *hw = &adapter->hw; 4001 struct e1000_hw *hw = &adapter->hw;
4000 struct e1000_phy_regs *phy = &adapter->phy_regs; 4002 struct e1000_phy_regs *phy = &adapter->phy_regs;
4001 int ret_val;
4002 4003
4003 if ((er32(STATUS) & E1000_STATUS_LU) && 4004 if ((er32(STATUS) & E1000_STATUS_LU) &&
4004 (adapter->hw.phy.media_type == e1000_media_type_copper)) { 4005 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4006 int ret_val;
4007
4005 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr); 4008 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
4006 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr); 4009 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
4007 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise); 4010 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
@@ -4147,7 +4150,6 @@ static void e1000_watchdog_task(struct work_struct *work)
4147 struct e1000_ring *tx_ring = adapter->tx_ring; 4150 struct e1000_ring *tx_ring = adapter->tx_ring;
4148 struct e1000_hw *hw = &adapter->hw; 4151 struct e1000_hw *hw = &adapter->hw;
4149 u32 link, tctl; 4152 u32 link, tctl;
4150 int tx_pending = 0;
4151 4153
4152 link = e1000e_has_link(adapter); 4154 link = e1000e_has_link(adapter);
4153 if ((netif_carrier_ok(netdev)) && link) { 4155 if ((netif_carrier_ok(netdev)) && link) {
@@ -4285,7 +4287,9 @@ static void e1000_watchdog_task(struct work_struct *work)
4285 } 4287 }
4286 4288
4287link_up: 4289link_up:
4290 spin_lock(&adapter->stats64_lock);
4288 e1000e_update_stats(adapter); 4291 e1000e_update_stats(adapter);
4292 spin_unlock(&adapter->stats64_lock);
4289 4293
4290 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old; 4294 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4291 adapter->tpt_old = adapter->stats.tpt; 4295 adapter->tpt_old = adapter->stats.tpt;
@@ -4299,21 +4303,18 @@ link_up:
4299 4303
4300 e1000e_update_adaptive(&adapter->hw); 4304 e1000e_update_adaptive(&adapter->hw);
4301 4305
4302 if (!netif_carrier_ok(netdev)) { 4306 if (!netif_carrier_ok(netdev) &&
4303 tx_pending = (e1000_desc_unused(tx_ring) + 1 < 4307 (e1000_desc_unused(tx_ring) + 1 < tx_ring->count)) {
4304 tx_ring->count); 4308 /*
4305 if (tx_pending) { 4309 * We've lost link, so the controller stops DMA,
4306 /* 4310 * but we've got queued Tx work that's never going
4307 * We've lost link, so the controller stops DMA, 4311 * to get done, so reset controller to flush Tx.
4308 * but we've got queued Tx work that's never going 4312 * (Do the reset outside of interrupt context).
4309 * to get done, so reset controller to flush Tx. 4313 */
4310 * (Do the reset outside of interrupt context). 4314 adapter->tx_timeout_count++;
4311 */ 4315 schedule_work(&adapter->reset_task);
4312 adapter->tx_timeout_count++; 4316 /* return immediately since reset is imminent */
4313 schedule_work(&adapter->reset_task); 4317 return;
4314 /* return immediately since reset is imminent */
4315 return;
4316 }
4317 } 4318 }
4318 4319
4319 /* Simple mode for Interrupt Throttle Rate (ITR) */ 4320 /* Simple mode for Interrupt Throttle Rate (ITR) */
@@ -4384,13 +4385,13 @@ static int e1000_tso(struct e1000_adapter *adapter,
4384 u32 cmd_length = 0; 4385 u32 cmd_length = 0;
4385 u16 ipcse = 0, tucse, mss; 4386 u16 ipcse = 0, tucse, mss;
4386 u8 ipcss, ipcso, tucss, tucso, hdr_len; 4387 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4387 int err;
4388 4388
4389 if (!skb_is_gso(skb)) 4389 if (!skb_is_gso(skb))
4390 return 0; 4390 return 0;
4391 4391
4392 if (skb_header_cloned(skb)) { 4392 if (skb_header_cloned(skb)) {
4393 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC); 4393 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4394
4394 if (err) 4395 if (err)
4395 return err; 4396 return err;
4396 } 4397 }
@@ -4897,16 +4898,55 @@ static void e1000_reset_task(struct work_struct *work)
4897} 4898}
4898 4899
4899/** 4900/**
4900 * e1000_get_stats - Get System Network Statistics 4901 * e1000_get_stats64 - Get System Network Statistics
4901 * @netdev: network interface device structure 4902 * @netdev: network interface device structure
4903 * @stats: rtnl_link_stats64 pointer
4902 * 4904 *
4903 * Returns the address of the device statistics structure. 4905 * Returns the address of the device statistics structure.
4904 * The statistics are actually updated from the timer callback.
4905 **/ 4906 **/
4906static struct net_device_stats *e1000_get_stats(struct net_device *netdev) 4907struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
4908 struct rtnl_link_stats64 *stats)
4907{ 4909{
4908 /* only return the current stats */ 4910 struct e1000_adapter *adapter = netdev_priv(netdev);
4909 return &netdev->stats; 4911
4912 memset(stats, 0, sizeof(struct rtnl_link_stats64));
4913 spin_lock(&adapter->stats64_lock);
4914 e1000e_update_stats(adapter);
4915 /* Fill out the OS statistics structure */
4916 stats->rx_bytes = adapter->stats.gorc;
4917 stats->rx_packets = adapter->stats.gprc;
4918 stats->tx_bytes = adapter->stats.gotc;
4919 stats->tx_packets = adapter->stats.gptc;
4920 stats->multicast = adapter->stats.mprc;
4921 stats->collisions = adapter->stats.colc;
4922
4923 /* Rx Errors */
4924
4925 /*
4926 * RLEC on some newer hardware can be incorrect so build
4927 * our own version based on RUC and ROC
4928 */
4929 stats->rx_errors = adapter->stats.rxerrc +
4930 adapter->stats.crcerrs + adapter->stats.algnerrc +
4931 adapter->stats.ruc + adapter->stats.roc +
4932 adapter->stats.cexterr;
4933 stats->rx_length_errors = adapter->stats.ruc +
4934 adapter->stats.roc;
4935 stats->rx_crc_errors = adapter->stats.crcerrs;
4936 stats->rx_frame_errors = adapter->stats.algnerrc;
4937 stats->rx_missed_errors = adapter->stats.mpc;
4938
4939 /* Tx Errors */
4940 stats->tx_errors = adapter->stats.ecol +
4941 adapter->stats.latecol;
4942 stats->tx_aborted_errors = adapter->stats.ecol;
4943 stats->tx_window_errors = adapter->stats.latecol;
4944 stats->tx_carrier_errors = adapter->stats.tncrs;
4945
4946 /* Tx Dropped needs to be maintained elsewhere */
4947
4948 spin_unlock(&adapter->stats64_lock);
4949 return stats;
4910} 4950}
4911 4951
4912/** 4952/**
@@ -5476,9 +5516,10 @@ static irqreturn_t e1000_intr_msix(int irq, void *data)
5476{ 5516{
5477 struct net_device *netdev = data; 5517 struct net_device *netdev = data;
5478 struct e1000_adapter *adapter = netdev_priv(netdev); 5518 struct e1000_adapter *adapter = netdev_priv(netdev);
5479 int vector, msix_irq;
5480 5519
5481 if (adapter->msix_entries) { 5520 if (adapter->msix_entries) {
5521 int vector, msix_irq;
5522
5482 vector = 0; 5523 vector = 0;
5483 msix_irq = adapter->msix_entries[vector].vector; 5524 msix_irq = adapter->msix_entries[vector].vector;
5484 disable_irq(msix_irq); 5525 disable_irq(msix_irq);
@@ -5675,7 +5716,7 @@ static const struct net_device_ops e1000e_netdev_ops = {
5675 .ndo_open = e1000_open, 5716 .ndo_open = e1000_open,
5676 .ndo_stop = e1000_close, 5717 .ndo_stop = e1000_close,
5677 .ndo_start_xmit = e1000_xmit_frame, 5718 .ndo_start_xmit = e1000_xmit_frame,
5678 .ndo_get_stats = e1000_get_stats, 5719 .ndo_get_stats64 = e1000e_get_stats64,
5679 .ndo_set_multicast_list = e1000_set_multi, 5720 .ndo_set_multicast_list = e1000_set_multi,
5680 .ndo_set_mac_address = e1000_set_mac, 5721 .ndo_set_mac_address = e1000_set_mac,
5681 .ndo_change_mtu = e1000_change_mtu, 5722 .ndo_change_mtu = e1000_change_mtu,
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index 6bea051b134b..6ae31fcfb629 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -2409,9 +2409,7 @@ static u32 e1000_get_phy_addr_for_bm_page(u32 page, u32 reg)
2409s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) 2409s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
2410{ 2410{
2411 s32 ret_val; 2411 s32 ret_val;
2412 u32 page_select = 0;
2413 u32 page = offset >> IGP_PAGE_SHIFT; 2412 u32 page = offset >> IGP_PAGE_SHIFT;
2414 u32 page_shift = 0;
2415 2413
2416 ret_val = hw->phy.ops.acquire(hw); 2414 ret_val = hw->phy.ops.acquire(hw);
2417 if (ret_val) 2415 if (ret_val)
@@ -2427,6 +2425,8 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
2427 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); 2425 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
2428 2426
2429 if (offset > MAX_PHY_MULTI_PAGE_REG) { 2427 if (offset > MAX_PHY_MULTI_PAGE_REG) {
2428 u32 page_shift, page_select;
2429
2430 /* 2430 /*
2431 * Page select is register 31 for phy address 1 and 22 for 2431 * Page select is register 31 for phy address 1 and 22 for
2432 * phy address 2 and 3. Page select is shifted only for 2432 * phy address 2 and 3. Page select is shifted only for
@@ -2468,9 +2468,7 @@ out:
2468s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) 2468s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
2469{ 2469{
2470 s32 ret_val; 2470 s32 ret_val;
2471 u32 page_select = 0;
2472 u32 page = offset >> IGP_PAGE_SHIFT; 2471 u32 page = offset >> IGP_PAGE_SHIFT;
2473 u32 page_shift = 0;
2474 2472
2475 ret_val = hw->phy.ops.acquire(hw); 2473 ret_val = hw->phy.ops.acquire(hw);
2476 if (ret_val) 2474 if (ret_val)
@@ -2486,6 +2484,8 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
2486 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); 2484 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
2487 2485
2488 if (offset > MAX_PHY_MULTI_PAGE_REG) { 2486 if (offset > MAX_PHY_MULTI_PAGE_REG) {
2487 u32 page_shift, page_select;
2488
2489 /* 2489 /*
2490 * Page select is register 31 for phy address 1 and 22 for 2490 * Page select is register 31 for phy address 1 and 22 for
2491 * phy address 2 and 3. Page select is shifted only for 2491 * phy address 2 and 3. Page select is shifted only for
diff --git a/drivers/net/enic/enic.h b/drivers/net/enic/enic.h
index a937f49d9db7..ca3be4f15556 100644
--- a/drivers/net/enic/enic.h
+++ b/drivers/net/enic/enic.h
@@ -32,8 +32,8 @@
32 32
33#define DRV_NAME "enic" 33#define DRV_NAME "enic"
34#define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver" 34#define DRV_DESCRIPTION "Cisco VIC Ethernet NIC Driver"
35#define DRV_VERSION "1.4.1.10" 35#define DRV_VERSION "2.1.1.2"
36#define DRV_COPYRIGHT "Copyright 2008-2010 Cisco Systems, Inc" 36#define DRV_COPYRIGHT "Copyright 2008-2011 Cisco Systems, Inc"
37 37
38#define ENIC_BARS_MAX 6 38#define ENIC_BARS_MAX 6
39 39
@@ -49,7 +49,7 @@ struct enic_msix_entry {
49 void *devid; 49 void *devid;
50}; 50};
51 51
52#define ENIC_SET_APPLIED (1 << 0) 52#define ENIC_PORT_REQUEST_APPLIED (1 << 0)
53#define ENIC_SET_REQUEST (1 << 1) 53#define ENIC_SET_REQUEST (1 << 1)
54#define ENIC_SET_NAME (1 << 2) 54#define ENIC_SET_NAME (1 << 2)
55#define ENIC_SET_INSTANCE (1 << 3) 55#define ENIC_SET_INSTANCE (1 << 3)
diff --git a/drivers/net/enic/enic_main.c b/drivers/net/enic/enic_main.c
index a0af48c51fb3..89664c670972 100644
--- a/drivers/net/enic/enic_main.c
+++ b/drivers/net/enic/enic_main.c
@@ -1318,18 +1318,20 @@ static int enic_set_port_profile(struct enic *enic, u8 *mac)
1318 vic_provinfo_free(vp); 1318 vic_provinfo_free(vp);
1319 if (err) 1319 if (err)
1320 return err; 1320 return err;
1321
1322 enic->pp.set |= ENIC_SET_APPLIED;
1323 break; 1321 break;
1324 1322
1325 case PORT_REQUEST_DISASSOCIATE: 1323 case PORT_REQUEST_DISASSOCIATE:
1326 enic->pp.set &= ~ENIC_SET_APPLIED;
1327 break; 1324 break;
1328 1325
1329 default: 1326 default:
1330 return -EINVAL; 1327 return -EINVAL;
1331 } 1328 }
1332 1329
1330 /* Set flag to indicate that the port assoc/disassoc
1331 * request has been sent out to fw
1332 */
1333 enic->pp.set |= ENIC_PORT_REQUEST_APPLIED;
1334
1333 return 0; 1335 return 0;
1334} 1336}
1335 1337
@@ -1411,7 +1413,7 @@ static int enic_get_vf_port(struct net_device *netdev, int vf,
1411 int err, error, done; 1413 int err, error, done;
1412 u16 response = PORT_PROFILE_RESPONSE_SUCCESS; 1414 u16 response = PORT_PROFILE_RESPONSE_SUCCESS;
1413 1415
1414 if (!(enic->pp.set & ENIC_SET_APPLIED)) 1416 if (!(enic->pp.set & ENIC_PORT_REQUEST_APPLIED))
1415 return -ENODATA; 1417 return -ENODATA;
1416 1418
1417 err = enic_dev_init_done(enic, &done, &error); 1419 err = enic_dev_init_done(enic, &done, &error);
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 119aa2000c24..5ed8f9f9419f 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -1920,7 +1920,7 @@ int startup_gfar(struct net_device *ndev)
1920 if (err) { 1920 if (err) {
1921 for (j = 0; j < i; j++) 1921 for (j = 0; j < i; j++)
1922 free_grp_irqs(&priv->gfargrp[j]); 1922 free_grp_irqs(&priv->gfargrp[j]);
1923 goto irq_fail; 1923 goto irq_fail;
1924 } 1924 }
1925 } 1925 }
1926 1926
diff --git a/drivers/net/hamradio/bpqether.c b/drivers/net/hamradio/bpqether.c
index ac1d323c5eb5..8931168d3e74 100644
--- a/drivers/net/hamradio/bpqether.c
+++ b/drivers/net/hamradio/bpqether.c
@@ -400,13 +400,14 @@ static void *bpq_seq_start(struct seq_file *seq, loff_t *pos)
400static void *bpq_seq_next(struct seq_file *seq, void *v, loff_t *pos) 400static void *bpq_seq_next(struct seq_file *seq, void *v, loff_t *pos)
401{ 401{
402 struct list_head *p; 402 struct list_head *p;
403 struct bpqdev *bpqdev = v;
403 404
404 ++*pos; 405 ++*pos;
405 406
406 if (v == SEQ_START_TOKEN) 407 if (v == SEQ_START_TOKEN)
407 p = rcu_dereference(bpq_devices.next); 408 p = rcu_dereference(list_next_rcu(&bpq_devices));
408 else 409 else
409 p = rcu_dereference(((struct bpqdev *)v)->bpq_list.next); 410 p = rcu_dereference(list_next_rcu(&bpqdev->bpq_list));
410 411
411 return (p == &bpq_devices) ? NULL 412 return (p == &bpq_devices) ? NULL
412 : list_entry(p, struct bpqdev, bpq_list); 413 : list_entry(p, struct bpqdev, bpq_list);
diff --git a/drivers/net/igb/e1000_82575.c b/drivers/net/igb/e1000_82575.c
index 0a2368fa6bc6..c1552b6f4a68 100644
--- a/drivers/net/igb/e1000_82575.c
+++ b/drivers/net/igb/e1000_82575.c
@@ -129,6 +129,7 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
129 break; 129 break;
130 case E1000_DEV_ID_82580_COPPER: 130 case E1000_DEV_ID_82580_COPPER:
131 case E1000_DEV_ID_82580_FIBER: 131 case E1000_DEV_ID_82580_FIBER:
132 case E1000_DEV_ID_82580_QUAD_FIBER:
132 case E1000_DEV_ID_82580_SERDES: 133 case E1000_DEV_ID_82580_SERDES:
133 case E1000_DEV_ID_82580_SGMII: 134 case E1000_DEV_ID_82580_SGMII:
134 case E1000_DEV_ID_82580_COPPER_DUAL: 135 case E1000_DEV_ID_82580_COPPER_DUAL:
diff --git a/drivers/net/igb/e1000_hw.h b/drivers/net/igb/e1000_hw.h
index e2638afb8cdc..281324e85980 100644
--- a/drivers/net/igb/e1000_hw.h
+++ b/drivers/net/igb/e1000_hw.h
@@ -54,6 +54,7 @@ struct e1000_hw;
54#define E1000_DEV_ID_82580_SERDES 0x1510 54#define E1000_DEV_ID_82580_SERDES 0x1510
55#define E1000_DEV_ID_82580_SGMII 0x1511 55#define E1000_DEV_ID_82580_SGMII 0x1511
56#define E1000_DEV_ID_82580_COPPER_DUAL 0x1516 56#define E1000_DEV_ID_82580_COPPER_DUAL 0x1516
57#define E1000_DEV_ID_82580_QUAD_FIBER 0x1527
57#define E1000_DEV_ID_DH89XXCC_SGMII 0x0438 58#define E1000_DEV_ID_DH89XXCC_SGMII 0x0438
58#define E1000_DEV_ID_DH89XXCC_SERDES 0x043A 59#define E1000_DEV_ID_DH89XXCC_SERDES 0x043A
59#define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C 60#define E1000_DEV_ID_DH89XXCC_BACKPLANE 0x043C
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c
index 58c665b7513d..200cc3209672 100644
--- a/drivers/net/igb/igb_main.c
+++ b/drivers/net/igb/igb_main.c
@@ -68,6 +68,7 @@ static DEFINE_PCI_DEVICE_TABLE(igb_pci_tbl) = {
68 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 }, 68 { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII), board_82575 },
69 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 }, 69 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER), board_82575 },
70 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 }, 70 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER), board_82575 },
71 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER), board_82575 },
71 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 }, 72 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES), board_82575 },
72 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 }, 73 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII), board_82575 },
73 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 }, 74 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL), board_82575 },
diff --git a/drivers/net/irda/sh_irda.c b/drivers/net/irda/sh_irda.c
index 9e3f4f54281d..4488bd581eca 100644
--- a/drivers/net/irda/sh_irda.c
+++ b/drivers/net/irda/sh_irda.c
@@ -635,7 +635,7 @@ static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
635 635
636 ret = sh_irda_set_baudrate(self, speed); 636 ret = sh_irda_set_baudrate(self, speed);
637 if (ret < 0) 637 if (ret < 0)
638 return ret; 638 goto sh_irda_hard_xmit_end;
639 639
640 self->tx_buff.len = 0; 640 self->tx_buff.len = 0;
641 if (skb->len) { 641 if (skb->len) {
@@ -652,11 +652,21 @@ static int sh_irda_hard_xmit(struct sk_buff *skb, struct net_device *ndev)
652 652
653 sh_irda_write(self, IRTFLR, self->tx_buff.len); 653 sh_irda_write(self, IRTFLR, self->tx_buff.len);
654 sh_irda_write(self, IRTCTR, ARMOD | TE); 654 sh_irda_write(self, IRTCTR, ARMOD | TE);
655 } 655 } else
656 goto sh_irda_hard_xmit_end;
656 657
657 dev_kfree_skb(skb); 658 dev_kfree_skb(skb);
658 659
659 return 0; 660 return 0;
661
662sh_irda_hard_xmit_end:
663 sh_irda_set_baudrate(self, 9600);
664 netif_wake_queue(self->ndev);
665 sh_irda_rcv_ctrl(self, 1);
666 dev_kfree_skb(skb);
667
668 return ret;
669
660} 670}
661 671
662static int sh_irda_ioctl(struct net_device *ndev, struct ifreq *ifreq, int cmd) 672static int sh_irda_ioctl(struct net_device *ndev, struct ifreq *ifreq, int cmd)
diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c
index 5933621ac3ff..2300e4599520 100644
--- a/drivers/net/macvtap.c
+++ b/drivers/net/macvtap.c
@@ -39,7 +39,7 @@ struct macvtap_queue {
39 struct socket sock; 39 struct socket sock;
40 struct socket_wq wq; 40 struct socket_wq wq;
41 int vnet_hdr_sz; 41 int vnet_hdr_sz;
42 struct macvlan_dev *vlan; 42 struct macvlan_dev __rcu *vlan;
43 struct file *file; 43 struct file *file;
44 unsigned int flags; 44 unsigned int flags;
45}; 45};
@@ -141,7 +141,8 @@ static void macvtap_put_queue(struct macvtap_queue *q)
141 struct macvlan_dev *vlan; 141 struct macvlan_dev *vlan;
142 142
143 spin_lock(&macvtap_lock); 143 spin_lock(&macvtap_lock);
144 vlan = rcu_dereference(q->vlan); 144 vlan = rcu_dereference_protected(q->vlan,
145 lockdep_is_held(&macvtap_lock));
145 if (vlan) { 146 if (vlan) {
146 int index = get_slot(vlan, q); 147 int index = get_slot(vlan, q);
147 148
@@ -219,7 +220,8 @@ static void macvtap_del_queues(struct net_device *dev)
219 /* macvtap_put_queue can free some slots, so go through all slots */ 220 /* macvtap_put_queue can free some slots, so go through all slots */
220 spin_lock(&macvtap_lock); 221 spin_lock(&macvtap_lock);
221 for (i = 0; i < MAX_MACVTAP_QUEUES && vlan->numvtaps; i++) { 222 for (i = 0; i < MAX_MACVTAP_QUEUES && vlan->numvtaps; i++) {
222 q = rcu_dereference(vlan->taps[i]); 223 q = rcu_dereference_protected(vlan->taps[i],
224 lockdep_is_held(&macvtap_lock));
223 if (q) { 225 if (q) {
224 qlist[j++] = q; 226 qlist[j++] = q;
225 rcu_assign_pointer(vlan->taps[i], NULL); 227 rcu_assign_pointer(vlan->taps[i], NULL);
@@ -569,7 +571,7 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q,
569 } 571 }
570 572
571 rcu_read_lock_bh(); 573 rcu_read_lock_bh();
572 vlan = rcu_dereference(q->vlan); 574 vlan = rcu_dereference_bh(q->vlan);
573 if (vlan) 575 if (vlan)
574 macvlan_start_xmit(skb, vlan->dev); 576 macvlan_start_xmit(skb, vlan->dev);
575 else 577 else
@@ -583,7 +585,7 @@ err_kfree:
583 585
584err: 586err:
585 rcu_read_lock_bh(); 587 rcu_read_lock_bh();
586 vlan = rcu_dereference(q->vlan); 588 vlan = rcu_dereference_bh(q->vlan);
587 if (vlan) 589 if (vlan)
588 vlan->dev->stats.tx_dropped++; 590 vlan->dev->stats.tx_dropped++;
589 rcu_read_unlock_bh(); 591 rcu_read_unlock_bh();
@@ -631,7 +633,7 @@ static ssize_t macvtap_put_user(struct macvtap_queue *q,
631 ret = skb_copy_datagram_const_iovec(skb, 0, iv, vnet_hdr_len, len); 633 ret = skb_copy_datagram_const_iovec(skb, 0, iv, vnet_hdr_len, len);
632 634
633 rcu_read_lock_bh(); 635 rcu_read_lock_bh();
634 vlan = rcu_dereference(q->vlan); 636 vlan = rcu_dereference_bh(q->vlan);
635 if (vlan) 637 if (vlan)
636 macvlan_count_rx(vlan, len, ret == 0, 0); 638 macvlan_count_rx(vlan, len, ret == 0, 0);
637 rcu_read_unlock_bh(); 639 rcu_read_unlock_bh();
@@ -727,7 +729,7 @@ static long macvtap_ioctl(struct file *file, unsigned int cmd,
727 729
728 case TUNGETIFF: 730 case TUNGETIFF:
729 rcu_read_lock_bh(); 731 rcu_read_lock_bh();
730 vlan = rcu_dereference(q->vlan); 732 vlan = rcu_dereference_bh(q->vlan);
731 if (vlan) 733 if (vlan)
732 dev_hold(vlan->dev); 734 dev_hold(vlan->dev);
733 rcu_read_unlock_bh(); 735 rcu_read_unlock_bh();
@@ -736,7 +738,7 @@ static long macvtap_ioctl(struct file *file, unsigned int cmd,
736 return -ENOLINK; 738 return -ENOLINK;
737 739
738 ret = 0; 740 ret = 0;
739 if (copy_to_user(&ifr->ifr_name, q->vlan->dev->name, IFNAMSIZ) || 741 if (copy_to_user(&ifr->ifr_name, vlan->dev->name, IFNAMSIZ) ||
740 put_user(q->flags, &ifr->ifr_flags)) 742 put_user(q->flags, &ifr->ifr_flags))
741 ret = -EFAULT; 743 ret = -EFAULT;
742 dev_put(vlan->dev); 744 dev_put(vlan->dev);
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index ea5cfe2c3a04..a7f2eed9a08a 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -253,7 +253,7 @@ struct myri10ge_priv {
253 unsigned long serial_number; 253 unsigned long serial_number;
254 int vendor_specific_offset; 254 int vendor_specific_offset;
255 int fw_multicast_support; 255 int fw_multicast_support;
256 unsigned long features; 256 u32 features;
257 u32 max_tso6; 257 u32 max_tso6;
258 u32 read_dma; 258 u32 read_dma;
259 u32 write_dma; 259 u32 write_dma;
@@ -1776,7 +1776,7 @@ static int myri10ge_set_rx_csum(struct net_device *netdev, u32 csum_enabled)
1776static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled) 1776static int myri10ge_set_tso(struct net_device *netdev, u32 tso_enabled)
1777{ 1777{
1778 struct myri10ge_priv *mgp = netdev_priv(netdev); 1778 struct myri10ge_priv *mgp = netdev_priv(netdev);
1779 unsigned long flags = mgp->features & (NETIF_F_TSO6 | NETIF_F_TSO); 1779 u32 flags = mgp->features & (NETIF_F_TSO6 | NETIF_F_TSO);
1780 1780
1781 if (tso_enabled) 1781 if (tso_enabled)
1782 netdev->features |= flags; 1782 netdev->features |= flags;
diff --git a/drivers/net/ns83820.c b/drivers/net/ns83820.c
index 84134c766f3a..a41b2cf4d917 100644
--- a/drivers/net/ns83820.c
+++ b/drivers/net/ns83820.c
@@ -1988,12 +1988,11 @@ static int __devinit ns83820_init_one(struct pci_dev *pci_dev,
1988 } 1988 }
1989 1989
1990 ndev = alloc_etherdev(sizeof(struct ns83820)); 1990 ndev = alloc_etherdev(sizeof(struct ns83820));
1991 dev = PRIV(ndev);
1992
1993 err = -ENOMEM; 1991 err = -ENOMEM;
1994 if (!dev) 1992 if (!ndev)
1995 goto out; 1993 goto out;
1996 1994
1995 dev = PRIV(ndev);
1997 dev->ndev = ndev; 1996 dev->ndev = ndev;
1998 1997
1999 spin_lock_init(&dev->rx_info.lock); 1998 spin_lock_init(&dev->rx_info.lock);
diff --git a/drivers/net/pch_gbe/pch_gbe_main.c b/drivers/net/pch_gbe/pch_gbe_main.c
index d7355306a738..1bf12339441b 100644
--- a/drivers/net/pch_gbe/pch_gbe_main.c
+++ b/drivers/net/pch_gbe/pch_gbe_main.c
@@ -2247,7 +2247,7 @@ static void pch_gbe_remove(struct pci_dev *pdev)
2247 struct net_device *netdev = pci_get_drvdata(pdev); 2247 struct net_device *netdev = pci_get_drvdata(pdev);
2248 struct pch_gbe_adapter *adapter = netdev_priv(netdev); 2248 struct pch_gbe_adapter *adapter = netdev_priv(netdev);
2249 2249
2250 flush_scheduled_work(); 2250 cancel_work_sync(&adapter->reset_task);
2251 unregister_netdev(netdev); 2251 unregister_netdev(netdev);
2252 2252
2253 pch_gbe_hal_phy_hw_reset(&adapter->hw); 2253 pch_gbe_hal_phy_hw_reset(&adapter->hw);
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index c7a6c4466978..9f6d670748d1 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -592,8 +592,8 @@ static long ppp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
592 ppp_release(NULL, file); 592 ppp_release(NULL, file);
593 err = 0; 593 err = 0;
594 } else 594 } else
595 printk(KERN_DEBUG "PPPIOCDETACH file->f_count=%ld\n", 595 pr_warn("PPPIOCDETACH file->f_count=%ld\n",
596 atomic_long_read(&file->f_count)); 596 atomic_long_read(&file->f_count));
597 mutex_unlock(&ppp_mutex); 597 mutex_unlock(&ppp_mutex);
598 return err; 598 return err;
599 } 599 }
@@ -630,7 +630,7 @@ static long ppp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
630 630
631 if (pf->kind != INTERFACE) { 631 if (pf->kind != INTERFACE) {
632 /* can't happen */ 632 /* can't happen */
633 printk(KERN_ERR "PPP: not interface or channel??\n"); 633 pr_err("PPP: not interface or channel??\n");
634 return -EINVAL; 634 return -EINVAL;
635 } 635 }
636 636
@@ -704,7 +704,8 @@ static long ppp_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
704 } 704 }
705 vj = slhc_init(val2+1, val+1); 705 vj = slhc_init(val2+1, val+1);
706 if (!vj) { 706 if (!vj) {
707 printk(KERN_ERR "PPP: no memory (VJ compressor)\n"); 707 netdev_err(ppp->dev,
708 "PPP: no memory (VJ compressor)\n");
708 err = -ENOMEM; 709 err = -ENOMEM;
709 break; 710 break;
710 } 711 }
@@ -898,17 +899,17 @@ static int __init ppp_init(void)
898{ 899{
899 int err; 900 int err;
900 901
901 printk(KERN_INFO "PPP generic driver version " PPP_VERSION "\n"); 902 pr_info("PPP generic driver version " PPP_VERSION "\n");
902 903
903 err = register_pernet_device(&ppp_net_ops); 904 err = register_pernet_device(&ppp_net_ops);
904 if (err) { 905 if (err) {
905 printk(KERN_ERR "failed to register PPP pernet device (%d)\n", err); 906 pr_err("failed to register PPP pernet device (%d)\n", err);
906 goto out; 907 goto out;
907 } 908 }
908 909
909 err = register_chrdev(PPP_MAJOR, "ppp", &ppp_device_fops); 910 err = register_chrdev(PPP_MAJOR, "ppp", &ppp_device_fops);
910 if (err) { 911 if (err) {
911 printk(KERN_ERR "failed to register PPP device (%d)\n", err); 912 pr_err("failed to register PPP device (%d)\n", err);
912 goto out_net; 913 goto out_net;
913 } 914 }
914 915
@@ -1078,7 +1079,7 @@ pad_compress_skb(struct ppp *ppp, struct sk_buff *skb)
1078 new_skb = alloc_skb(new_skb_size, GFP_ATOMIC); 1079 new_skb = alloc_skb(new_skb_size, GFP_ATOMIC);
1079 if (!new_skb) { 1080 if (!new_skb) {
1080 if (net_ratelimit()) 1081 if (net_ratelimit())
1081 printk(KERN_ERR "PPP: no memory (comp pkt)\n"); 1082 netdev_err(ppp->dev, "PPP: no memory (comp pkt)\n");
1082 return NULL; 1083 return NULL;
1083 } 1084 }
1084 if (ppp->dev->hard_header_len > PPP_HDRLEN) 1085 if (ppp->dev->hard_header_len > PPP_HDRLEN)
@@ -1108,7 +1109,7 @@ pad_compress_skb(struct ppp *ppp, struct sk_buff *skb)
1108 * the same number. 1109 * the same number.
1109 */ 1110 */
1110 if (net_ratelimit()) 1111 if (net_ratelimit())
1111 printk(KERN_ERR "ppp: compressor dropped pkt\n"); 1112 netdev_err(ppp->dev, "ppp: compressor dropped pkt\n");
1112 kfree_skb(skb); 1113 kfree_skb(skb);
1113 kfree_skb(new_skb); 1114 kfree_skb(new_skb);
1114 new_skb = NULL; 1115 new_skb = NULL;
@@ -1138,7 +1139,9 @@ ppp_send_frame(struct ppp *ppp, struct sk_buff *skb)
1138 if (ppp->pass_filter && 1139 if (ppp->pass_filter &&
1139 sk_run_filter(skb, ppp->pass_filter) == 0) { 1140 sk_run_filter(skb, ppp->pass_filter) == 0) {
1140 if (ppp->debug & 1) 1141 if (ppp->debug & 1)
1141 printk(KERN_DEBUG "PPP: outbound frame not passed\n"); 1142 netdev_printk(KERN_DEBUG, ppp->dev,
1143 "PPP: outbound frame "
1144 "not passed\n");
1142 kfree_skb(skb); 1145 kfree_skb(skb);
1143 return; 1146 return;
1144 } 1147 }
@@ -1164,7 +1167,7 @@ ppp_send_frame(struct ppp *ppp, struct sk_buff *skb)
1164 new_skb = alloc_skb(skb->len + ppp->dev->hard_header_len - 2, 1167 new_skb = alloc_skb(skb->len + ppp->dev->hard_header_len - 2,
1165 GFP_ATOMIC); 1168 GFP_ATOMIC);
1166 if (!new_skb) { 1169 if (!new_skb) {
1167 printk(KERN_ERR "PPP: no memory (VJ comp pkt)\n"); 1170 netdev_err(ppp->dev, "PPP: no memory (VJ comp pkt)\n");
1168 goto drop; 1171 goto drop;
1169 } 1172 }
1170 skb_reserve(new_skb, ppp->dev->hard_header_len - 2); 1173 skb_reserve(new_skb, ppp->dev->hard_header_len - 2);
@@ -1202,7 +1205,9 @@ ppp_send_frame(struct ppp *ppp, struct sk_buff *skb)
1202 proto != PPP_LCP && proto != PPP_CCP) { 1205 proto != PPP_LCP && proto != PPP_CCP) {
1203 if (!(ppp->flags & SC_CCP_UP) && (ppp->flags & SC_MUST_COMP)) { 1206 if (!(ppp->flags & SC_CCP_UP) && (ppp->flags & SC_MUST_COMP)) {
1204 if (net_ratelimit()) 1207 if (net_ratelimit())
1205 printk(KERN_ERR "ppp: compression required but down - pkt dropped.\n"); 1208 netdev_err(ppp->dev,
1209 "ppp: compression required but "
1210 "down - pkt dropped.\n");
1206 goto drop; 1211 goto drop;
1207 } 1212 }
1208 skb = pad_compress_skb(ppp, skb); 1213 skb = pad_compress_skb(ppp, skb);
@@ -1505,7 +1510,7 @@ static int ppp_mp_explode(struct ppp *ppp, struct sk_buff *skb)
1505 noskb: 1510 noskb:
1506 spin_unlock_bh(&pch->downl); 1511 spin_unlock_bh(&pch->downl);
1507 if (ppp->debug & 1) 1512 if (ppp->debug & 1)
1508 printk(KERN_ERR "PPP: no memory (fragment)\n"); 1513 netdev_err(ppp->dev, "PPP: no memory (fragment)\n");
1509 ++ppp->dev->stats.tx_errors; 1514 ++ppp->dev->stats.tx_errors;
1510 ++ppp->nxseq; 1515 ++ppp->nxseq;
1511 return 1; /* abandon the frame */ 1516 return 1; /* abandon the frame */
@@ -1686,7 +1691,8 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)
1686 /* copy to a new sk_buff with more tailroom */ 1691 /* copy to a new sk_buff with more tailroom */
1687 ns = dev_alloc_skb(skb->len + 128); 1692 ns = dev_alloc_skb(skb->len + 128);
1688 if (!ns) { 1693 if (!ns) {
1689 printk(KERN_ERR"PPP: no memory (VJ decomp)\n"); 1694 netdev_err(ppp->dev, "PPP: no memory "
1695 "(VJ decomp)\n");
1690 goto err; 1696 goto err;
1691 } 1697 }
1692 skb_reserve(ns, 2); 1698 skb_reserve(ns, 2);
@@ -1699,7 +1705,8 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)
1699 1705
1700 len = slhc_uncompress(ppp->vj, skb->data + 2, skb->len - 2); 1706 len = slhc_uncompress(ppp->vj, skb->data + 2, skb->len - 2);
1701 if (len <= 0) { 1707 if (len <= 0) {
1702 printk(KERN_DEBUG "PPP: VJ decompression error\n"); 1708 netdev_printk(KERN_DEBUG, ppp->dev,
1709 "PPP: VJ decompression error\n");
1703 goto err; 1710 goto err;
1704 } 1711 }
1705 len += 2; 1712 len += 2;
@@ -1721,7 +1728,7 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)
1721 goto err; 1728 goto err;
1722 1729
1723 if (slhc_remember(ppp->vj, skb->data + 2, skb->len - 2) <= 0) { 1730 if (slhc_remember(ppp->vj, skb->data + 2, skb->len - 2) <= 0) {
1724 printk(KERN_ERR "PPP: VJ uncompressed error\n"); 1731 netdev_err(ppp->dev, "PPP: VJ uncompressed error\n");
1725 goto err; 1732 goto err;
1726 } 1733 }
1727 proto = PPP_IP; 1734 proto = PPP_IP;
@@ -1762,8 +1769,9 @@ ppp_receive_nonmp_frame(struct ppp *ppp, struct sk_buff *skb)
1762 if (ppp->pass_filter && 1769 if (ppp->pass_filter &&
1763 sk_run_filter(skb, ppp->pass_filter) == 0) { 1770 sk_run_filter(skb, ppp->pass_filter) == 0) {
1764 if (ppp->debug & 1) 1771 if (ppp->debug & 1)
1765 printk(KERN_DEBUG "PPP: inbound frame " 1772 netdev_printk(KERN_DEBUG, ppp->dev,
1766 "not passed\n"); 1773 "PPP: inbound frame "
1774 "not passed\n");
1767 kfree_skb(skb); 1775 kfree_skb(skb);
1768 return; 1776 return;
1769 } 1777 }
@@ -1821,7 +1829,8 @@ ppp_decompress_frame(struct ppp *ppp, struct sk_buff *skb)
1821 1829
1822 ns = dev_alloc_skb(obuff_size); 1830 ns = dev_alloc_skb(obuff_size);
1823 if (!ns) { 1831 if (!ns) {
1824 printk(KERN_ERR "ppp_decompress_frame: no memory\n"); 1832 netdev_err(ppp->dev, "ppp_decompress_frame: "
1833 "no memory\n");
1825 goto err; 1834 goto err;
1826 } 1835 }
1827 /* the decompressor still expects the A/C bytes in the hdr */ 1836 /* the decompressor still expects the A/C bytes in the hdr */
@@ -1989,7 +1998,7 @@ ppp_mp_reconstruct(struct ppp *ppp)
1989 u32 seq = ppp->nextseq; 1998 u32 seq = ppp->nextseq;
1990 u32 minseq = ppp->minseq; 1999 u32 minseq = ppp->minseq;
1991 struct sk_buff_head *list = &ppp->mrq; 2000 struct sk_buff_head *list = &ppp->mrq;
1992 struct sk_buff *p, *next; 2001 struct sk_buff *p, *tmp;
1993 struct sk_buff *head, *tail; 2002 struct sk_buff *head, *tail;
1994 struct sk_buff *skb = NULL; 2003 struct sk_buff *skb = NULL;
1995 int lost = 0, len = 0; 2004 int lost = 0, len = 0;
@@ -1998,13 +2007,15 @@ ppp_mp_reconstruct(struct ppp *ppp)
1998 return NULL; 2007 return NULL;
1999 head = list->next; 2008 head = list->next;
2000 tail = NULL; 2009 tail = NULL;
2001 for (p = head; p != (struct sk_buff *) list; p = next) { 2010 skb_queue_walk_safe(list, p, tmp) {
2002 next = p->next; 2011 again:
2003 if (seq_before(PPP_MP_CB(p)->sequence, seq)) { 2012 if (seq_before(PPP_MP_CB(p)->sequence, seq)) {
2004 /* this can't happen, anyway ignore the skb */ 2013 /* this can't happen, anyway ignore the skb */
2005 printk(KERN_ERR "ppp_mp_reconstruct bad seq %u < %u\n", 2014 netdev_err(ppp->dev, "ppp_mp_reconstruct bad "
2006 PPP_MP_CB(p)->sequence, seq); 2015 "seq %u < %u\n",
2007 head = next; 2016 PPP_MP_CB(p)->sequence, seq);
2017 __skb_unlink(p, list);
2018 kfree_skb(p);
2008 continue; 2019 continue;
2009 } 2020 }
2010 if (PPP_MP_CB(p)->sequence != seq) { 2021 if (PPP_MP_CB(p)->sequence != seq) {
@@ -2016,8 +2027,7 @@ ppp_mp_reconstruct(struct ppp *ppp)
2016 lost = 1; 2027 lost = 1;
2017 seq = seq_before(minseq, PPP_MP_CB(p)->sequence)? 2028 seq = seq_before(minseq, PPP_MP_CB(p)->sequence)?
2018 minseq + 1: PPP_MP_CB(p)->sequence; 2029 minseq + 1: PPP_MP_CB(p)->sequence;
2019 next = p; 2030 goto again;
2020 continue;
2021 } 2031 }
2022 2032
2023 /* 2033 /*
@@ -2042,17 +2052,9 @@ ppp_mp_reconstruct(struct ppp *ppp)
2042 (PPP_MP_CB(head)->BEbits & B)) { 2052 (PPP_MP_CB(head)->BEbits & B)) {
2043 if (len > ppp->mrru + 2) { 2053 if (len > ppp->mrru + 2) {
2044 ++ppp->dev->stats.rx_length_errors; 2054 ++ppp->dev->stats.rx_length_errors;
2045 printk(KERN_DEBUG "PPP: reconstructed packet" 2055 netdev_printk(KERN_DEBUG, ppp->dev,
2046 " is too long (%d)\n", len); 2056 "PPP: reconstructed packet"
2047 } else if (p == head) { 2057 " is too long (%d)\n", len);
2048 /* fragment is complete packet - reuse skb */
2049 tail = p;
2050 skb = skb_get(p);
2051 break;
2052 } else if ((skb = dev_alloc_skb(len)) == NULL) {
2053 ++ppp->dev->stats.rx_missed_errors;
2054 printk(KERN_DEBUG "PPP: no memory for "
2055 "reconstructed packet");
2056 } else { 2058 } else {
2057 tail = p; 2059 tail = p;
2058 break; 2060 break;
@@ -2065,9 +2067,17 @@ ppp_mp_reconstruct(struct ppp *ppp)
2065 * and we haven't found a complete valid packet yet, 2067 * and we haven't found a complete valid packet yet,
2066 * we can discard up to and including this fragment. 2068 * we can discard up to and including this fragment.
2067 */ 2069 */
2068 if (PPP_MP_CB(p)->BEbits & E) 2070 if (PPP_MP_CB(p)->BEbits & E) {
2069 head = next; 2071 struct sk_buff *tmp2;
2070 2072
2073 skb_queue_reverse_walk_from_safe(list, p, tmp2) {
2074 __skb_unlink(p, list);
2075 kfree_skb(p);
2076 }
2077 head = skb_peek(list);
2078 if (!head)
2079 break;
2080 }
2071 ++seq; 2081 ++seq;
2072 } 2082 }
2073 2083
@@ -2077,26 +2087,37 @@ ppp_mp_reconstruct(struct ppp *ppp)
2077 signal a receive error. */ 2087 signal a receive error. */
2078 if (PPP_MP_CB(head)->sequence != ppp->nextseq) { 2088 if (PPP_MP_CB(head)->sequence != ppp->nextseq) {
2079 if (ppp->debug & 1) 2089 if (ppp->debug & 1)
2080 printk(KERN_DEBUG " missed pkts %u..%u\n", 2090 netdev_printk(KERN_DEBUG, ppp->dev,
2081 ppp->nextseq, 2091 " missed pkts %u..%u\n",
2082 PPP_MP_CB(head)->sequence-1); 2092 ppp->nextseq,
2093 PPP_MP_CB(head)->sequence-1);
2083 ++ppp->dev->stats.rx_dropped; 2094 ++ppp->dev->stats.rx_dropped;
2084 ppp_receive_error(ppp); 2095 ppp_receive_error(ppp);
2085 } 2096 }
2086 2097
2087 if (head != tail) 2098 skb = head;
2088 /* copy to a single skb */ 2099 if (head != tail) {
2089 for (p = head; p != tail->next; p = p->next) 2100 struct sk_buff **fragpp = &skb_shinfo(skb)->frag_list;
2090 skb_copy_bits(p, 0, skb_put(skb, p->len), p->len); 2101 p = skb_queue_next(list, head);
2091 ppp->nextseq = PPP_MP_CB(tail)->sequence + 1; 2102 __skb_unlink(skb, list);
2092 head = tail->next; 2103 skb_queue_walk_from_safe(list, p, tmp) {
2093 } 2104 __skb_unlink(p, list);
2105 *fragpp = p;
2106 p->next = NULL;
2107 fragpp = &p->next;
2108
2109 skb->len += p->len;
2110 skb->data_len += p->len;
2111 skb->truesize += p->len;
2112
2113 if (p == tail)
2114 break;
2115 }
2116 } else {
2117 __skb_unlink(skb, list);
2118 }
2094 2119
2095 /* Discard all the skbuffs that we have copied the data out of 2120 ppp->nextseq = PPP_MP_CB(tail)->sequence + 1;
2096 or that we can't use. */
2097 while ((p = list->next) != head) {
2098 __skb_unlink(p, list);
2099 kfree_skb(p);
2100 } 2121 }
2101 2122
2102 return skb; 2123 return skb;
@@ -2617,8 +2638,8 @@ ppp_create_interface(struct net *net, int unit, int *retp)
2617 ret = register_netdev(dev); 2638 ret = register_netdev(dev);
2618 if (ret != 0) { 2639 if (ret != 0) {
2619 unit_put(&pn->units_idr, unit); 2640 unit_put(&pn->units_idr, unit);
2620 printk(KERN_ERR "PPP: couldn't register device %s (%d)\n", 2641 netdev_err(ppp->dev, "PPP: couldn't register device %s (%d)\n",
2621 dev->name, ret); 2642 dev->name, ret);
2622 goto out2; 2643 goto out2;
2623 } 2644 }
2624 2645
@@ -2690,9 +2711,9 @@ static void ppp_destroy_interface(struct ppp *ppp)
2690 2711
2691 if (!ppp->file.dead || ppp->n_channels) { 2712 if (!ppp->file.dead || ppp->n_channels) {
2692 /* "can't happen" */ 2713 /* "can't happen" */
2693 printk(KERN_ERR "ppp: destroying ppp struct %p but dead=%d " 2714 netdev_err(ppp->dev, "ppp: destroying ppp struct %p "
2694 "n_channels=%d !\n", ppp, ppp->file.dead, 2715 "but dead=%d n_channels=%d !\n",
2695 ppp->n_channels); 2716 ppp, ppp->file.dead, ppp->n_channels);
2696 return; 2717 return;
2697 } 2718 }
2698 2719
@@ -2834,8 +2855,7 @@ static void ppp_destroy_channel(struct channel *pch)
2834 2855
2835 if (!pch->file.dead) { 2856 if (!pch->file.dead) {
2836 /* "can't happen" */ 2857 /* "can't happen" */
2837 printk(KERN_ERR "ppp: destroying undead channel %p !\n", 2858 pr_err("ppp: destroying undead channel %p !\n", pch);
2838 pch);
2839 return; 2859 return;
2840 } 2860 }
2841 skb_queue_purge(&pch->file.xq); 2861 skb_queue_purge(&pch->file.xq);
@@ -2847,7 +2867,7 @@ static void __exit ppp_cleanup(void)
2847{ 2867{
2848 /* should never happen */ 2868 /* should never happen */
2849 if (atomic_read(&ppp_unit_count) || atomic_read(&channel_count)) 2869 if (atomic_read(&ppp_unit_count) || atomic_read(&channel_count))
2850 printk(KERN_ERR "PPP: removing module but units remain!\n"); 2870 pr_err("PPP: removing module but units remain!\n");
2851 unregister_chrdev(PPP_MAJOR, "ppp"); 2871 unregister_chrdev(PPP_MAJOR, "ppp");
2852 device_destroy(ppp_class, MKDEV(PPP_MAJOR, 0)); 2872 device_destroy(ppp_class, MKDEV(PPP_MAJOR, 0));
2853 class_destroy(ppp_class); 2873 class_destroy(ppp_class);
@@ -2865,7 +2885,7 @@ static int __unit_alloc(struct idr *p, void *ptr, int n)
2865 2885
2866again: 2886again:
2867 if (!idr_pre_get(p, GFP_KERNEL)) { 2887 if (!idr_pre_get(p, GFP_KERNEL)) {
2868 printk(KERN_ERR "PPP: No free memory for idr\n"); 2888 pr_err("PPP: No free memory for idr\n");
2869 return -ENOMEM; 2889 return -ENOMEM;
2870 } 2890 }
2871 2891
diff --git a/drivers/net/sfc/ethtool.c b/drivers/net/sfc/ethtool.c
index 0e8bb19ed60d..713969accdbd 100644
--- a/drivers/net/sfc/ethtool.c
+++ b/drivers/net/sfc/ethtool.c
@@ -502,7 +502,7 @@ static void efx_ethtool_get_stats(struct net_device *net_dev,
502static int efx_ethtool_set_tso(struct net_device *net_dev, u32 enable) 502static int efx_ethtool_set_tso(struct net_device *net_dev, u32 enable)
503{ 503{
504 struct efx_nic *efx __attribute__ ((unused)) = netdev_priv(net_dev); 504 struct efx_nic *efx __attribute__ ((unused)) = netdev_priv(net_dev);
505 unsigned long features; 505 u32 features;
506 506
507 features = NETIF_F_TSO; 507 features = NETIF_F_TSO;
508 if (efx->type->offload_features & NETIF_F_V6_CSUM) 508 if (efx->type->offload_features & NETIF_F_V6_CSUM)
@@ -519,7 +519,7 @@ static int efx_ethtool_set_tso(struct net_device *net_dev, u32 enable)
519static int efx_ethtool_set_tx_csum(struct net_device *net_dev, u32 enable) 519static int efx_ethtool_set_tx_csum(struct net_device *net_dev, u32 enable)
520{ 520{
521 struct efx_nic *efx = netdev_priv(net_dev); 521 struct efx_nic *efx = netdev_priv(net_dev);
522 unsigned long features = efx->type->offload_features & NETIF_F_ALL_CSUM; 522 u32 features = efx->type->offload_features & NETIF_F_ALL_CSUM;
523 523
524 if (enable) 524 if (enable)
525 net_dev->features |= features; 525 net_dev->features |= features;
diff --git a/drivers/net/sfc/net_driver.h b/drivers/net/sfc/net_driver.h
index 28df8665256a..c65270241d2d 100644
--- a/drivers/net/sfc/net_driver.h
+++ b/drivers/net/sfc/net_driver.h
@@ -906,7 +906,7 @@ struct efx_nic_type {
906 unsigned int phys_addr_channels; 906 unsigned int phys_addr_channels;
907 unsigned int tx_dc_base; 907 unsigned int tx_dc_base;
908 unsigned int rx_dc_base; 908 unsigned int rx_dc_base;
909 unsigned long offload_features; 909 u32 offload_features;
910 u32 reset_world_flags; 910 u32 reset_world_flags;
911}; 911};
912 912
diff --git a/drivers/net/smc91x.c b/drivers/net/smc91x.c
index 726df611ee17..43654a3bb0ec 100644
--- a/drivers/net/smc91x.c
+++ b/drivers/net/smc91x.c
@@ -81,6 +81,7 @@ static const char version[] =
81#include <linux/ethtool.h> 81#include <linux/ethtool.h>
82#include <linux/mii.h> 82#include <linux/mii.h>
83#include <linux/workqueue.h> 83#include <linux/workqueue.h>
84#include <linux/of.h>
84 85
85#include <linux/netdevice.h> 86#include <linux/netdevice.h>
86#include <linux/etherdevice.h> 87#include <linux/etherdevice.h>
@@ -2394,6 +2395,15 @@ static int smc_drv_resume(struct device *dev)
2394 return 0; 2395 return 0;
2395} 2396}
2396 2397
2398#ifdef CONFIG_OF
2399static const struct of_device_id smc91x_match[] = {
2400 { .compatible = "smsc,lan91c94", },
2401 { .compatible = "smsc,lan91c111", },
2402 {},
2403}
2404MODULE_DEVICE_TABLE(of, smc91x_match);
2405#endif
2406
2397static struct dev_pm_ops smc_drv_pm_ops = { 2407static struct dev_pm_ops smc_drv_pm_ops = {
2398 .suspend = smc_drv_suspend, 2408 .suspend = smc_drv_suspend,
2399 .resume = smc_drv_resume, 2409 .resume = smc_drv_resume,
@@ -2406,6 +2416,9 @@ static struct platform_driver smc_driver = {
2406 .name = CARDNAME, 2416 .name = CARDNAME,
2407 .owner = THIS_MODULE, 2417 .owner = THIS_MODULE,
2408 .pm = &smc_drv_pm_ops, 2418 .pm = &smc_drv_pm_ops,
2419#ifdef CONFIG_OF
2420 .of_match_table = smc91x_match,
2421#endif
2409 }, 2422 },
2410}; 2423};
2411 2424
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 1c5408f83937..c1a344829b54 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -320,28 +320,28 @@ static int gem_txmac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_s
320 320
321 if (txmac_stat & MAC_TXSTAT_URUN) { 321 if (txmac_stat & MAC_TXSTAT_URUN) {
322 netdev_err(dev, "TX MAC xmit underrun\n"); 322 netdev_err(dev, "TX MAC xmit underrun\n");
323 gp->net_stats.tx_fifo_errors++; 323 dev->stats.tx_fifo_errors++;
324 } 324 }
325 325
326 if (txmac_stat & MAC_TXSTAT_MPE) { 326 if (txmac_stat & MAC_TXSTAT_MPE) {
327 netdev_err(dev, "TX MAC max packet size error\n"); 327 netdev_err(dev, "TX MAC max packet size error\n");
328 gp->net_stats.tx_errors++; 328 dev->stats.tx_errors++;
329 } 329 }
330 330
331 /* The rest are all cases of one of the 16-bit TX 331 /* The rest are all cases of one of the 16-bit TX
332 * counters expiring. 332 * counters expiring.
333 */ 333 */
334 if (txmac_stat & MAC_TXSTAT_NCE) 334 if (txmac_stat & MAC_TXSTAT_NCE)
335 gp->net_stats.collisions += 0x10000; 335 dev->stats.collisions += 0x10000;
336 336
337 if (txmac_stat & MAC_TXSTAT_ECE) { 337 if (txmac_stat & MAC_TXSTAT_ECE) {
338 gp->net_stats.tx_aborted_errors += 0x10000; 338 dev->stats.tx_aborted_errors += 0x10000;
339 gp->net_stats.collisions += 0x10000; 339 dev->stats.collisions += 0x10000;
340 } 340 }
341 341
342 if (txmac_stat & MAC_TXSTAT_LCE) { 342 if (txmac_stat & MAC_TXSTAT_LCE) {
343 gp->net_stats.tx_aborted_errors += 0x10000; 343 dev->stats.tx_aborted_errors += 0x10000;
344 gp->net_stats.collisions += 0x10000; 344 dev->stats.collisions += 0x10000;
345 } 345 }
346 346
347 /* We do not keep track of MAC_TXSTAT_FCE and 347 /* We do not keep track of MAC_TXSTAT_FCE and
@@ -469,20 +469,20 @@ static int gem_rxmac_interrupt(struct net_device *dev, struct gem *gp, u32 gem_s
469 u32 smac = readl(gp->regs + MAC_SMACHINE); 469 u32 smac = readl(gp->regs + MAC_SMACHINE);
470 470
471 netdev_err(dev, "RX MAC fifo overflow smac[%08x]\n", smac); 471 netdev_err(dev, "RX MAC fifo overflow smac[%08x]\n", smac);
472 gp->net_stats.rx_over_errors++; 472 dev->stats.rx_over_errors++;
473 gp->net_stats.rx_fifo_errors++; 473 dev->stats.rx_fifo_errors++;
474 474
475 ret = gem_rxmac_reset(gp); 475 ret = gem_rxmac_reset(gp);
476 } 476 }
477 477
478 if (rxmac_stat & MAC_RXSTAT_ACE) 478 if (rxmac_stat & MAC_RXSTAT_ACE)
479 gp->net_stats.rx_frame_errors += 0x10000; 479 dev->stats.rx_frame_errors += 0x10000;
480 480
481 if (rxmac_stat & MAC_RXSTAT_CCE) 481 if (rxmac_stat & MAC_RXSTAT_CCE)
482 gp->net_stats.rx_crc_errors += 0x10000; 482 dev->stats.rx_crc_errors += 0x10000;
483 483
484 if (rxmac_stat & MAC_RXSTAT_LCE) 484 if (rxmac_stat & MAC_RXSTAT_LCE)
485 gp->net_stats.rx_length_errors += 0x10000; 485 dev->stats.rx_length_errors += 0x10000;
486 486
487 /* We do not track MAC_RXSTAT_FCE and MAC_RXSTAT_VCE 487 /* We do not track MAC_RXSTAT_FCE and MAC_RXSTAT_VCE
488 * events. 488 * events.
@@ -594,7 +594,7 @@ static int gem_abnormal_irq(struct net_device *dev, struct gem *gp, u32 gem_stat
594 if (netif_msg_rx_err(gp)) 594 if (netif_msg_rx_err(gp))
595 printk(KERN_DEBUG "%s: no buffer for rx frame\n", 595 printk(KERN_DEBUG "%s: no buffer for rx frame\n",
596 gp->dev->name); 596 gp->dev->name);
597 gp->net_stats.rx_dropped++; 597 dev->stats.rx_dropped++;
598 } 598 }
599 599
600 if (gem_status & GREG_STAT_RXTAGERR) { 600 if (gem_status & GREG_STAT_RXTAGERR) {
@@ -602,7 +602,7 @@ static int gem_abnormal_irq(struct net_device *dev, struct gem *gp, u32 gem_stat
602 if (netif_msg_rx_err(gp)) 602 if (netif_msg_rx_err(gp))
603 printk(KERN_DEBUG "%s: corrupt rx tag framing\n", 603 printk(KERN_DEBUG "%s: corrupt rx tag framing\n",
604 gp->dev->name); 604 gp->dev->name);
605 gp->net_stats.rx_errors++; 605 dev->stats.rx_errors++;
606 606
607 goto do_reset; 607 goto do_reset;
608 } 608 }
@@ -684,7 +684,7 @@ static __inline__ void gem_tx(struct net_device *dev, struct gem *gp, u32 gem_st
684 break; 684 break;
685 } 685 }
686 gp->tx_skbs[entry] = NULL; 686 gp->tx_skbs[entry] = NULL;
687 gp->net_stats.tx_bytes += skb->len; 687 dev->stats.tx_bytes += skb->len;
688 688
689 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) { 689 for (frag = 0; frag <= skb_shinfo(skb)->nr_frags; frag++) {
690 txd = &gp->init_block->txd[entry]; 690 txd = &gp->init_block->txd[entry];
@@ -696,7 +696,7 @@ static __inline__ void gem_tx(struct net_device *dev, struct gem *gp, u32 gem_st
696 entry = NEXT_TX(entry); 696 entry = NEXT_TX(entry);
697 } 697 }
698 698
699 gp->net_stats.tx_packets++; 699 dev->stats.tx_packets++;
700 dev_kfree_skb_irq(skb); 700 dev_kfree_skb_irq(skb);
701 } 701 }
702 gp->tx_old = entry; 702 gp->tx_old = entry;
@@ -738,6 +738,7 @@ static __inline__ void gem_post_rxds(struct gem *gp, int limit)
738 738
739static int gem_rx(struct gem *gp, int work_to_do) 739static int gem_rx(struct gem *gp, int work_to_do)
740{ 740{
741 struct net_device *dev = gp->dev;
741 int entry, drops, work_done = 0; 742 int entry, drops, work_done = 0;
742 u32 done; 743 u32 done;
743 __sum16 csum; 744 __sum16 csum;
@@ -782,15 +783,15 @@ static int gem_rx(struct gem *gp, int work_to_do)
782 783
783 len = (status & RXDCTRL_BUFSZ) >> 16; 784 len = (status & RXDCTRL_BUFSZ) >> 16;
784 if ((len < ETH_ZLEN) || (status & RXDCTRL_BAD)) { 785 if ((len < ETH_ZLEN) || (status & RXDCTRL_BAD)) {
785 gp->net_stats.rx_errors++; 786 dev->stats.rx_errors++;
786 if (len < ETH_ZLEN) 787 if (len < ETH_ZLEN)
787 gp->net_stats.rx_length_errors++; 788 dev->stats.rx_length_errors++;
788 if (len & RXDCTRL_BAD) 789 if (len & RXDCTRL_BAD)
789 gp->net_stats.rx_crc_errors++; 790 dev->stats.rx_crc_errors++;
790 791
791 /* We'll just return it to GEM. */ 792 /* We'll just return it to GEM. */
792 drop_it: 793 drop_it:
793 gp->net_stats.rx_dropped++; 794 dev->stats.rx_dropped++;
794 goto next; 795 goto next;
795 } 796 }
796 797
@@ -843,8 +844,8 @@ static int gem_rx(struct gem *gp, int work_to_do)
843 844
844 netif_receive_skb(skb); 845 netif_receive_skb(skb);
845 846
846 gp->net_stats.rx_packets++; 847 dev->stats.rx_packets++;
847 gp->net_stats.rx_bytes += len; 848 dev->stats.rx_bytes += len;
848 849
849 next: 850 next:
850 entry = NEXT_RX(entry); 851 entry = NEXT_RX(entry);
@@ -2472,7 +2473,6 @@ static int gem_resume(struct pci_dev *pdev)
2472static struct net_device_stats *gem_get_stats(struct net_device *dev) 2473static struct net_device_stats *gem_get_stats(struct net_device *dev)
2473{ 2474{
2474 struct gem *gp = netdev_priv(dev); 2475 struct gem *gp = netdev_priv(dev);
2475 struct net_device_stats *stats = &gp->net_stats;
2476 2476
2477 spin_lock_irq(&gp->lock); 2477 spin_lock_irq(&gp->lock);
2478 spin_lock(&gp->tx_lock); 2478 spin_lock(&gp->tx_lock);
@@ -2481,17 +2481,17 @@ static struct net_device_stats *gem_get_stats(struct net_device *dev)
2481 * so we shield against this 2481 * so we shield against this
2482 */ 2482 */
2483 if (gp->running) { 2483 if (gp->running) {
2484 stats->rx_crc_errors += readl(gp->regs + MAC_FCSERR); 2484 dev->stats.rx_crc_errors += readl(gp->regs + MAC_FCSERR);
2485 writel(0, gp->regs + MAC_FCSERR); 2485 writel(0, gp->regs + MAC_FCSERR);
2486 2486
2487 stats->rx_frame_errors += readl(gp->regs + MAC_AERR); 2487 dev->stats.rx_frame_errors += readl(gp->regs + MAC_AERR);
2488 writel(0, gp->regs + MAC_AERR); 2488 writel(0, gp->regs + MAC_AERR);
2489 2489
2490 stats->rx_length_errors += readl(gp->regs + MAC_LERR); 2490 dev->stats.rx_length_errors += readl(gp->regs + MAC_LERR);
2491 writel(0, gp->regs + MAC_LERR); 2491 writel(0, gp->regs + MAC_LERR);
2492 2492
2493 stats->tx_aborted_errors += readl(gp->regs + MAC_ECOLL); 2493 dev->stats.tx_aborted_errors += readl(gp->regs + MAC_ECOLL);
2494 stats->collisions += 2494 dev->stats.collisions +=
2495 (readl(gp->regs + MAC_ECOLL) + 2495 (readl(gp->regs + MAC_ECOLL) +
2496 readl(gp->regs + MAC_LCOLL)); 2496 readl(gp->regs + MAC_LCOLL));
2497 writel(0, gp->regs + MAC_ECOLL); 2497 writel(0, gp->regs + MAC_ECOLL);
@@ -2501,7 +2501,7 @@ static struct net_device_stats *gem_get_stats(struct net_device *dev)
2501 spin_unlock(&gp->tx_lock); 2501 spin_unlock(&gp->tx_lock);
2502 spin_unlock_irq(&gp->lock); 2502 spin_unlock_irq(&gp->lock);
2503 2503
2504 return &gp->net_stats; 2504 return &dev->stats;
2505} 2505}
2506 2506
2507static int gem_set_mac_address(struct net_device *dev, void *addr) 2507static int gem_set_mac_address(struct net_device *dev, void *addr)
diff --git a/drivers/net/sungem.h b/drivers/net/sungem.h
index 19905460def6..ede017872367 100644
--- a/drivers/net/sungem.h
+++ b/drivers/net/sungem.h
@@ -994,7 +994,6 @@ struct gem {
994 u32 status; 994 u32 status;
995 995
996 struct napi_struct napi; 996 struct napi_struct napi;
997 struct net_device_stats net_stats;
998 997
999 int tx_fifo_sz; 998 int tx_fifo_sz;
1000 int rx_fifo_sz; 999 int rx_fifo_sz;
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 7841a8f69998..cc069528b322 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -4,7 +4,7 @@
4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) 4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
5 * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com) 5 * Copyright (C) 2001, 2002, 2003 Jeff Garzik (jgarzik@pobox.com)
6 * Copyright (C) 2004 Sun Microsystems Inc. 6 * Copyright (C) 2004 Sun Microsystems Inc.
7 * Copyright (C) 2005-2010 Broadcom Corporation. 7 * Copyright (C) 2005-2011 Broadcom Corporation.
8 * 8 *
9 * Firmware is: 9 * Firmware is:
10 * Derived from proprietary unpublished source code, 10 * Derived from proprietary unpublished source code,
@@ -60,20 +60,14 @@
60#define BAR_0 0 60#define BAR_0 0
61#define BAR_2 2 61#define BAR_2 2
62 62
63#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
64#define TG3_VLAN_TAG_USED 1
65#else
66#define TG3_VLAN_TAG_USED 0
67#endif
68
69#include "tg3.h" 63#include "tg3.h"
70 64
71#define DRV_MODULE_NAME "tg3" 65#define DRV_MODULE_NAME "tg3"
72#define TG3_MAJ_NUM 3 66#define TG3_MAJ_NUM 3
73#define TG3_MIN_NUM 116 67#define TG3_MIN_NUM 117
74#define DRV_MODULE_VERSION \ 68#define DRV_MODULE_VERSION \
75 __stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM) 69 __stringify(TG3_MAJ_NUM) "." __stringify(TG3_MIN_NUM)
76#define DRV_MODULE_RELDATE "December 3, 2010" 70#define DRV_MODULE_RELDATE "January 25, 2011"
77 71
78#define TG3_DEF_MAC_MODE 0 72#define TG3_DEF_MAC_MODE 0
79#define TG3_DEF_RX_MODE 0 73#define TG3_DEF_RX_MODE 0
@@ -134,9 +128,6 @@
134 TG3_TX_RING_SIZE) 128 TG3_TX_RING_SIZE)
135#define NEXT_TX(N) (((N) + 1) & (TG3_TX_RING_SIZE - 1)) 129#define NEXT_TX(N) (((N) + 1) & (TG3_TX_RING_SIZE - 1))
136 130
137#define TG3_RX_DMA_ALIGN 16
138#define TG3_RX_HEADROOM ALIGN(VLAN_HLEN, TG3_RX_DMA_ALIGN)
139
140#define TG3_DMA_BYTE_ENAB 64 131#define TG3_DMA_BYTE_ENAB 64
141 132
142#define TG3_RX_STD_DMA_SZ 1536 133#define TG3_RX_STD_DMA_SZ 1536
@@ -1785,9 +1776,29 @@ static void tg3_phy_eee_adjust(struct tg3 *tp, u32 current_link_up)
1785 tg3_phy_cl45_read(tp, MDIO_MMD_AN, 1776 tg3_phy_cl45_read(tp, MDIO_MMD_AN,
1786 TG3_CL45_D7_EEERES_STAT, &val); 1777 TG3_CL45_D7_EEERES_STAT, &val);
1787 1778
1788 if (val == TG3_CL45_D7_EEERES_STAT_LP_1000T || 1779 switch (val) {
1789 val == TG3_CL45_D7_EEERES_STAT_LP_100TX) 1780 case TG3_CL45_D7_EEERES_STAT_LP_1000T:
1781 switch (GET_ASIC_REV(tp->pci_chip_rev_id)) {
1782 case ASIC_REV_5717:
1783 case ASIC_REV_5719:
1784 case ASIC_REV_57765:
1785 /* Enable SM_DSP clock and tx 6dB coding. */
1786 val = MII_TG3_AUXCTL_SHDWSEL_AUXCTL |
1787 MII_TG3_AUXCTL_ACTL_SMDSP_ENA |
1788 MII_TG3_AUXCTL_ACTL_TX_6DB;
1789 tg3_writephy(tp, MII_TG3_AUX_CTRL, val);
1790
1791 tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, 0x0000);
1792
1793 /* Turn off SM_DSP clock. */
1794 val = MII_TG3_AUXCTL_SHDWSEL_AUXCTL |
1795 MII_TG3_AUXCTL_ACTL_TX_6DB;
1796 tg3_writephy(tp, MII_TG3_AUX_CTRL, val);
1797 }
1798 /* Fallthrough */
1799 case TG3_CL45_D7_EEERES_STAT_LP_100TX:
1790 tp->setlpicnt = 2; 1800 tp->setlpicnt = 2;
1801 }
1791 } 1802 }
1792 1803
1793 if (!tp->setlpicnt) { 1804 if (!tp->setlpicnt) {
@@ -2977,11 +2988,19 @@ static void tg3_phy_copper_begin(struct tg3 *tp)
2977 MII_TG3_AUXCTL_ACTL_TX_6DB; 2988 MII_TG3_AUXCTL_ACTL_TX_6DB;
2978 tg3_writephy(tp, MII_TG3_AUX_CTRL, val); 2989 tg3_writephy(tp, MII_TG3_AUX_CTRL, val);
2979 2990
2980 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5717 || 2991 switch (GET_ASIC_REV(tp->pci_chip_rev_id)) {
2981 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57765) && 2992 case ASIC_REV_5717:
2982 !tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val)) 2993 case ASIC_REV_57765:
2983 tg3_phydsp_write(tp, MII_TG3_DSP_CH34TP2, 2994 if (!tg3_phydsp_read(tp, MII_TG3_DSP_CH34TP2, &val))
2984 val | MII_TG3_DSP_CH34TP2_HIBW01); 2995 tg3_phydsp_write(tp, MII_TG3_DSP_CH34TP2, val |
2996 MII_TG3_DSP_CH34TP2_HIBW01);
2997 /* Fall through */
2998 case ASIC_REV_5719:
2999 val = MII_TG3_DSP_TAP26_ALNOKO |
3000 MII_TG3_DSP_TAP26_RMRXSTO |
3001 MII_TG3_DSP_TAP26_OPCSINPT;
3002 tg3_phydsp_write(tp, MII_TG3_DSP_TAP26, val);
3003 }
2985 3004
2986 val = 0; 3005 val = 0;
2987 if (tp->link_config.autoneg == AUTONEG_ENABLE) { 3006 if (tp->link_config.autoneg == AUTONEG_ENABLE) {
@@ -4722,8 +4741,6 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
4722 struct sk_buff *skb; 4741 struct sk_buff *skb;
4723 dma_addr_t dma_addr; 4742 dma_addr_t dma_addr;
4724 u32 opaque_key, desc_idx, *post_ptr; 4743 u32 opaque_key, desc_idx, *post_ptr;
4725 bool hw_vlan __maybe_unused = false;
4726 u16 vtag __maybe_unused = 0;
4727 4744
4728 desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK; 4745 desc_idx = desc->opaque & RXD_OPAQUE_INDEX_MASK;
4729 opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK; 4746 opaque_key = desc->opaque & RXD_OPAQUE_RING_MASK;
@@ -4782,12 +4799,12 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
4782 tg3_recycle_rx(tnapi, tpr, opaque_key, 4799 tg3_recycle_rx(tnapi, tpr, opaque_key,
4783 desc_idx, *post_ptr); 4800 desc_idx, *post_ptr);
4784 4801
4785 copy_skb = netdev_alloc_skb(tp->dev, len + VLAN_HLEN + 4802 copy_skb = netdev_alloc_skb(tp->dev, len +
4786 TG3_RAW_IP_ALIGN); 4803 TG3_RAW_IP_ALIGN);
4787 if (copy_skb == NULL) 4804 if (copy_skb == NULL)
4788 goto drop_it_no_recycle; 4805 goto drop_it_no_recycle;
4789 4806
4790 skb_reserve(copy_skb, TG3_RAW_IP_ALIGN + VLAN_HLEN); 4807 skb_reserve(copy_skb, TG3_RAW_IP_ALIGN);
4791 skb_put(copy_skb, len); 4808 skb_put(copy_skb, len);
4792 pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE); 4809 pci_dma_sync_single_for_cpu(tp->pdev, dma_addr, len, PCI_DMA_FROMDEVICE);
4793 skb_copy_from_linear_data(skb, copy_skb->data, len); 4810 skb_copy_from_linear_data(skb, copy_skb->data, len);
@@ -4814,30 +4831,11 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget)
4814 } 4831 }
4815 4832
4816 if (desc->type_flags & RXD_FLAG_VLAN && 4833 if (desc->type_flags & RXD_FLAG_VLAN &&
4817 !(tp->rx_mode & RX_MODE_KEEP_VLAN_TAG)) { 4834 !(tp->rx_mode & RX_MODE_KEEP_VLAN_TAG))
4818 vtag = desc->err_vlan & RXD_VLAN_MASK; 4835 __vlan_hwaccel_put_tag(skb,
4819#if TG3_VLAN_TAG_USED 4836 desc->err_vlan & RXD_VLAN_MASK);
4820 if (tp->vlgrp)
4821 hw_vlan = true;
4822 else
4823#endif
4824 {
4825 struct vlan_ethhdr *ve = (struct vlan_ethhdr *)
4826 __skb_push(skb, VLAN_HLEN);
4827
4828 memmove(ve, skb->data + VLAN_HLEN,
4829 ETH_ALEN * 2);
4830 ve->h_vlan_proto = htons(ETH_P_8021Q);
4831 ve->h_vlan_TCI = htons(vtag);
4832 }
4833 }
4834 4837
4835#if TG3_VLAN_TAG_USED 4838 napi_gro_receive(&tnapi->napi, skb);
4836 if (hw_vlan)
4837 vlan_gro_receive(&tnapi->napi, tp->vlgrp, vtag, skb);
4838 else
4839#endif
4840 napi_gro_receive(&tnapi->napi, skb);
4841 4839
4842 received++; 4840 received++;
4843 budget--; 4841 budget--;
@@ -5740,11 +5738,9 @@ static netdev_tx_t tg3_start_xmit(struct sk_buff *skb,
5740 base_flags |= TXD_FLAG_TCPUDP_CSUM; 5738 base_flags |= TXD_FLAG_TCPUDP_CSUM;
5741 } 5739 }
5742 5740
5743#if TG3_VLAN_TAG_USED
5744 if (vlan_tx_tag_present(skb)) 5741 if (vlan_tx_tag_present(skb))
5745 base_flags |= (TXD_FLAG_VLAN | 5742 base_flags |= (TXD_FLAG_VLAN |
5746 (vlan_tx_tag_get(skb) << 16)); 5743 (vlan_tx_tag_get(skb) << 16));
5747#endif
5748 5744
5749 len = skb_headlen(skb); 5745 len = skb_headlen(skb);
5750 5746
@@ -5986,11 +5982,10 @@ static netdev_tx_t tg3_start_xmit_dma_bug(struct sk_buff *skb,
5986 } 5982 }
5987 } 5983 }
5988 } 5984 }
5989#if TG3_VLAN_TAG_USED 5985
5990 if (vlan_tx_tag_present(skb)) 5986 if (vlan_tx_tag_present(skb))
5991 base_flags |= (TXD_FLAG_VLAN | 5987 base_flags |= (TXD_FLAG_VLAN |
5992 (vlan_tx_tag_get(skb) << 16)); 5988 (vlan_tx_tag_get(skb) << 16));
5993#endif
5994 5989
5995 if ((tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) && 5990 if ((tp->tg3_flags3 & TG3_FLG3_USE_JUMBO_BDFLAG) &&
5996 !mss && skb->len > VLAN_ETH_FRAME_LEN) 5991 !mss && skb->len > VLAN_ETH_FRAME_LEN)
@@ -7834,7 +7829,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
7834 TG3_CPMU_DBTMR1_LNKIDLE_2047US); 7829 TG3_CPMU_DBTMR1_LNKIDLE_2047US);
7835 7830
7836 tw32_f(TG3_CPMU_EEE_DBTMR2, 7831 tw32_f(TG3_CPMU_EEE_DBTMR2,
7837 TG3_CPMU_DBTMR1_APE_TX_2047US | 7832 TG3_CPMU_DBTMR2_APE_TX_2047US |
7838 TG3_CPMU_DBTMR2_TXIDXEQ_2047US); 7833 TG3_CPMU_DBTMR2_TXIDXEQ_2047US);
7839 } 7834 }
7840 7835
@@ -8108,8 +8103,9 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
8108 /* Program the jumbo buffer descriptor ring control 8103 /* Program the jumbo buffer descriptor ring control
8109 * blocks on those devices that have them. 8104 * blocks on those devices that have them.
8110 */ 8105 */
8111 if ((tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) && 8106 if (tp->pci_chip_rev_id == CHIPREV_ID_5719_A0 ||
8112 !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) { 8107 ((tp->tg3_flags & TG3_FLAG_JUMBO_CAPABLE) &&
8108 !(tp->tg3_flags2 & TG3_FLG2_5780_CLASS))) {
8113 /* Setup replenish threshold. */ 8109 /* Setup replenish threshold. */
8114 tw32(RCVBDI_JUMBO_THRESH, tp->rx_jumbo_pending / 8); 8110 tw32(RCVBDI_JUMBO_THRESH, tp->rx_jumbo_pending / 8);
8115 8111
@@ -8227,8 +8223,12 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
8227 (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) { 8223 (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)) {
8228 val = tr32(TG3_RDMA_RSRVCTRL_REG); 8224 val = tr32(TG3_RDMA_RSRVCTRL_REG);
8229 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) { 8225 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) {
8230 val &= ~TG3_RDMA_RSRVCTRL_TXMRGN_MASK; 8226 val &= ~(TG3_RDMA_RSRVCTRL_TXMRGN_MASK |
8231 val |= TG3_RDMA_RSRVCTRL_TXMRGN_320B; 8227 TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK |
8228 TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK);
8229 val |= TG3_RDMA_RSRVCTRL_TXMRGN_320B |
8230 TG3_RDMA_RSRVCTRL_FIFO_LWM_1_5K |
8231 TG3_RDMA_RSRVCTRL_FIFO_HWM_1_5K;
8232 } 8232 }
8233 tw32(TG3_RDMA_RSRVCTRL_REG, 8233 tw32(TG3_RDMA_RSRVCTRL_REG,
8234 val | TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX); 8234 val | TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX);
@@ -8350,7 +8350,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
8350 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 8350 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl);
8351 udelay(100); 8351 udelay(100);
8352 8352
8353 if (tp->tg3_flags2 & TG3_FLG2_USING_MSIX) { 8353 if ((tp->tg3_flags2 & TG3_FLG2_USING_MSIX) &&
8354 tp->irq_cnt > 1) {
8354 val = tr32(MSGINT_MODE); 8355 val = tr32(MSGINT_MODE);
8355 val |= MSGINT_MODE_MULTIVEC_EN | MSGINT_MODE_ENABLE; 8356 val |= MSGINT_MODE_MULTIVEC_EN | MSGINT_MODE_ENABLE;
8356 tw32(MSGINT_MODE, val); 8357 tw32(MSGINT_MODE, val);
@@ -9090,7 +9091,8 @@ static void tg3_ints_init(struct tg3 *tp)
9090 9091
9091 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI_OR_MSIX) { 9092 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI_OR_MSIX) {
9092 u32 msi_mode = tr32(MSGINT_MODE); 9093 u32 msi_mode = tr32(MSGINT_MODE);
9093 if (tp->tg3_flags2 & TG3_FLG2_USING_MSIX) 9094 if ((tp->tg3_flags2 & TG3_FLG2_USING_MSIX) &&
9095 tp->irq_cnt > 1)
9094 msi_mode |= MSGINT_MODE_MULTIVEC_EN; 9096 msi_mode |= MSGINT_MODE_MULTIVEC_EN;
9095 tw32(MSGINT_MODE, msi_mode | MSGINT_MODE_ENABLE); 9097 tw32(MSGINT_MODE, msi_mode | MSGINT_MODE_ENABLE);
9096 } 9098 }
@@ -9532,17 +9534,10 @@ static void __tg3_set_rx_mode(struct net_device *dev)
9532 rx_mode = tp->rx_mode & ~(RX_MODE_PROMISC | 9534 rx_mode = tp->rx_mode & ~(RX_MODE_PROMISC |
9533 RX_MODE_KEEP_VLAN_TAG); 9535 RX_MODE_KEEP_VLAN_TAG);
9534 9536
9537#if !defined(CONFIG_VLAN_8021Q) && !defined(CONFIG_VLAN_8021Q_MODULE)
9535 /* When ASF is in use, we always keep the RX_MODE_KEEP_VLAN_TAG 9538 /* When ASF is in use, we always keep the RX_MODE_KEEP_VLAN_TAG
9536 * flag clear. 9539 * flag clear.
9537 */ 9540 */
9538#if TG3_VLAN_TAG_USED
9539 if (!tp->vlgrp &&
9540 !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))
9541 rx_mode |= RX_MODE_KEEP_VLAN_TAG;
9542#else
9543 /* By definition, VLAN is disabled always in this
9544 * case.
9545 */
9546 if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) 9541 if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))
9547 rx_mode |= RX_MODE_KEEP_VLAN_TAG; 9542 rx_mode |= RX_MODE_KEEP_VLAN_TAG;
9548#endif 9543#endif
@@ -10873,13 +10868,16 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
10873 if (loopback_mode == TG3_MAC_LOOPBACK) { 10868 if (loopback_mode == TG3_MAC_LOOPBACK) {
10874 /* HW errata - mac loopback fails in some cases on 5780. 10869 /* HW errata - mac loopback fails in some cases on 5780.
10875 * Normal traffic and PHY loopback are not affected by 10870 * Normal traffic and PHY loopback are not affected by
10876 * errata. 10871 * errata. Also, the MAC loopback test is deprecated for
10872 * all newer ASIC revisions.
10877 */ 10873 */
10878 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780) 10874 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780 ||
10875 (tp->tg3_flags & TG3_FLAG_CPMU_PRESENT))
10879 return 0; 10876 return 0;
10880 10877
10881 mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) | 10878 mac_mode = tp->mac_mode &
10882 MAC_MODE_PORT_INT_LPBACK; 10879 ~(MAC_MODE_PORT_MODE_MASK | MAC_MODE_HALF_DUPLEX);
10880 mac_mode |= MAC_MODE_PORT_INT_LPBACK;
10883 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS)) 10881 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS))
10884 mac_mode |= MAC_MODE_LINK_POLARITY; 10882 mac_mode |= MAC_MODE_LINK_POLARITY;
10885 if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY) 10883 if (tp->phy_flags & TG3_PHYFLG_10_100_ONLY)
@@ -10901,7 +10899,8 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
10901 tg3_writephy(tp, MII_BMCR, val); 10899 tg3_writephy(tp, MII_BMCR, val);
10902 udelay(40); 10900 udelay(40);
10903 10901
10904 mac_mode = tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK; 10902 mac_mode = tp->mac_mode &
10903 ~(MAC_MODE_PORT_MODE_MASK | MAC_MODE_HALF_DUPLEX);
10905 if (tp->phy_flags & TG3_PHYFLG_IS_FET) { 10904 if (tp->phy_flags & TG3_PHYFLG_IS_FET) {
10906 tg3_writephy(tp, MII_TG3_FET_PTEST, 10905 tg3_writephy(tp, MII_TG3_FET_PTEST,
10907 MII_TG3_FET_PTEST_FRC_TX_LINK | 10906 MII_TG3_FET_PTEST_FRC_TX_LINK |
@@ -10929,6 +10928,13 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
10929 MII_TG3_EXT_CTRL_LNK3_LED_MODE); 10928 MII_TG3_EXT_CTRL_LNK3_LED_MODE);
10930 } 10929 }
10931 tw32(MAC_MODE, mac_mode); 10930 tw32(MAC_MODE, mac_mode);
10931
10932 /* Wait for link */
10933 for (i = 0; i < 100; i++) {
10934 if (tr32(MAC_TX_STATUS) & TX_STATUS_LINK_UP)
10935 break;
10936 mdelay(1);
10937 }
10932 } else { 10938 } else {
10933 return -EINVAL; 10939 return -EINVAL;
10934 } 10940 }
@@ -11035,14 +11041,19 @@ out:
11035static int tg3_test_loopback(struct tg3 *tp) 11041static int tg3_test_loopback(struct tg3 *tp)
11036{ 11042{
11037 int err = 0; 11043 int err = 0;
11038 u32 cpmuctrl = 0; 11044 u32 eee_cap, cpmuctrl = 0;
11039 11045
11040 if (!netif_running(tp->dev)) 11046 if (!netif_running(tp->dev))
11041 return TG3_LOOPBACK_FAILED; 11047 return TG3_LOOPBACK_FAILED;
11042 11048
11049 eee_cap = tp->phy_flags & TG3_PHYFLG_EEE_CAP;
11050 tp->phy_flags &= ~TG3_PHYFLG_EEE_CAP;
11051
11043 err = tg3_reset_hw(tp, 1); 11052 err = tg3_reset_hw(tp, 1);
11044 if (err) 11053 if (err) {
11045 return TG3_LOOPBACK_FAILED; 11054 err = TG3_LOOPBACK_FAILED;
11055 goto done;
11056 }
11046 11057
11047 /* Turn off gphy autopowerdown. */ 11058 /* Turn off gphy autopowerdown. */
11048 if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD) 11059 if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD)
@@ -11062,8 +11073,10 @@ static int tg3_test_loopback(struct tg3 *tp)
11062 udelay(10); 11073 udelay(10);
11063 } 11074 }
11064 11075
11065 if (status != CPMU_MUTEX_GNT_DRIVER) 11076 if (status != CPMU_MUTEX_GNT_DRIVER) {
11066 return TG3_LOOPBACK_FAILED; 11077 err = TG3_LOOPBACK_FAILED;
11078 goto done;
11079 }
11067 11080
11068 /* Turn off link-based power management. */ 11081 /* Turn off link-based power management. */
11069 cpmuctrl = tr32(TG3_CPMU_CTRL); 11082 cpmuctrl = tr32(TG3_CPMU_CTRL);
@@ -11092,6 +11105,9 @@ static int tg3_test_loopback(struct tg3 *tp)
11092 if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD) 11105 if (tp->phy_flags & TG3_PHYFLG_ENABLE_APD)
11093 tg3_phy_toggle_apd(tp, true); 11106 tg3_phy_toggle_apd(tp, true);
11094 11107
11108done:
11109 tp->phy_flags |= eee_cap;
11110
11095 return err; 11111 return err;
11096} 11112}
11097 11113
@@ -11198,7 +11214,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
11198 if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) 11214 if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
11199 break; /* We have no PHY */ 11215 break; /* We have no PHY */
11200 11216
11201 if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) 11217 if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) ||
11218 ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) &&
11219 !netif_running(dev)))
11202 return -EAGAIN; 11220 return -EAGAIN;
11203 11221
11204 spin_lock_bh(&tp->lock); 11222 spin_lock_bh(&tp->lock);
@@ -11214,7 +11232,9 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
11214 if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES) 11232 if (tp->phy_flags & TG3_PHYFLG_PHY_SERDES)
11215 break; /* We have no PHY */ 11233 break; /* We have no PHY */
11216 11234
11217 if (tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) 11235 if ((tp->phy_flags & TG3_PHYFLG_IS_LOW_POWER) ||
11236 ((tp->tg3_flags & TG3_FLAG_ENABLE_ASF) &&
11237 !netif_running(dev)))
11218 return -EAGAIN; 11238 return -EAGAIN;
11219 11239
11220 spin_lock_bh(&tp->lock); 11240 spin_lock_bh(&tp->lock);
@@ -11230,31 +11250,6 @@ static int tg3_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
11230 return -EOPNOTSUPP; 11250 return -EOPNOTSUPP;
11231} 11251}
11232 11252
11233#if TG3_VLAN_TAG_USED
11234static void tg3_vlan_rx_register(struct net_device *dev, struct vlan_group *grp)
11235{
11236 struct tg3 *tp = netdev_priv(dev);
11237
11238 if (!netif_running(dev)) {
11239 tp->vlgrp = grp;
11240 return;
11241 }
11242
11243 tg3_netif_stop(tp);
11244
11245 tg3_full_lock(tp, 0);
11246
11247 tp->vlgrp = grp;
11248
11249 /* Update RX_MODE_KEEP_VLAN_TAG bit in RX_MODE register. */
11250 __tg3_set_rx_mode(dev);
11251
11252 tg3_netif_start(tp);
11253
11254 tg3_full_unlock(tp);
11255}
11256#endif
11257
11258static int tg3_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec) 11253static int tg3_get_coalesce(struct net_device *dev, struct ethtool_coalesce *ec)
11259{ 11254{
11260 struct tg3 *tp = netdev_priv(dev); 11255 struct tg3 *tp = netdev_priv(dev);
@@ -13066,9 +13061,7 @@ static struct pci_dev * __devinit tg3_find_peer(struct tg3 *);
13066 13061
13067static void inline vlan_features_add(struct net_device *dev, unsigned long flags) 13062static void inline vlan_features_add(struct net_device *dev, unsigned long flags)
13068{ 13063{
13069#if TG3_VLAN_TAG_USED
13070 dev->vlan_features |= flags; 13064 dev->vlan_features |= flags;
13071#endif
13072} 13065}
13073 13066
13074static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp) 13067static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp)
@@ -13325,7 +13318,9 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13325 } 13318 }
13326 13319
13327 /* Determine TSO capabilities */ 13320 /* Determine TSO capabilities */
13328 if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) 13321 if (tp->pci_chip_rev_id == CHIPREV_ID_5719_A0)
13322 ; /* Do nothing. HW bug. */
13323 else if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS)
13329 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3; 13324 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_3;
13330 else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) || 13325 else if ((tp->tg3_flags3 & TG3_FLG3_5755_PLUS) ||
13331 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) 13326 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
@@ -13376,7 +13371,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13376 tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG; 13371 tp->tg3_flags3 |= TG3_FLG3_40BIT_DMA_LIMIT_BUG;
13377 } 13372 }
13378 13373
13379 if (tp->tg3_flags3 & TG3_FLG3_5717_PLUS) 13374 if ((tp->tg3_flags3 & TG3_FLG3_5717_PLUS) &&
13375 tp->pci_chip_rev_id != CHIPREV_ID_5719_A0)
13380 tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG; 13376 tp->tg3_flags3 |= TG3_FLG3_USE_JUMBO_BDFLAG;
13381 13377
13382 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) || 13378 if (!(tp->tg3_flags2 & TG3_FLG2_5705_PLUS) ||
@@ -13394,42 +13390,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13394 tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS; 13390 tp->tg3_flags2 |= TG3_FLG2_PCI_EXPRESS;
13395 13391
13396 tp->pcie_readrq = 4096; 13392 tp->pcie_readrq = 4096;
13397 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719) { 13393 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5719)
13398 u16 word; 13394 tp->pcie_readrq = 2048;
13399
13400 pci_read_config_word(tp->pdev,
13401 tp->pcie_cap + PCI_EXP_LNKSTA,
13402 &word);
13403 switch (word & PCI_EXP_LNKSTA_CLS) {
13404 case PCI_EXP_LNKSTA_CLS_2_5GB:
13405 word &= PCI_EXP_LNKSTA_NLW;
13406 word >>= PCI_EXP_LNKSTA_NLW_SHIFT;
13407 switch (word) {
13408 case 2:
13409 tp->pcie_readrq = 2048;
13410 break;
13411 case 4:
13412 tp->pcie_readrq = 1024;
13413 break;
13414 }
13415 break;
13416
13417 case PCI_EXP_LNKSTA_CLS_5_0GB:
13418 word &= PCI_EXP_LNKSTA_NLW;
13419 word >>= PCI_EXP_LNKSTA_NLW_SHIFT;
13420 switch (word) {
13421 case 1:
13422 tp->pcie_readrq = 2048;
13423 break;
13424 case 2:
13425 tp->pcie_readrq = 1024;
13426 break;
13427 case 4:
13428 tp->pcie_readrq = 512;
13429 break;
13430 }
13431 }
13432 }
13433 13395
13434 pcie_set_readrq(tp->pdev, tp->pcie_readrq); 13396 pcie_set_readrq(tp->pdev, tp->pcie_readrq);
13435 13397
@@ -13861,11 +13823,11 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
13861 else 13823 else
13862 tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES; 13824 tp->tg3_flags &= ~TG3_FLAG_POLL_SERDES;
13863 13825
13864 tp->rx_offset = NET_IP_ALIGN + TG3_RX_HEADROOM; 13826 tp->rx_offset = NET_IP_ALIGN;
13865 tp->rx_copy_thresh = TG3_RX_COPY_THRESHOLD; 13827 tp->rx_copy_thresh = TG3_RX_COPY_THRESHOLD;
13866 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 && 13828 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701 &&
13867 (tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0) { 13829 (tp->tg3_flags & TG3_FLAG_PCIX_MODE) != 0) {
13868 tp->rx_offset -= NET_IP_ALIGN; 13830 tp->rx_offset = 0;
13869#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 13831#ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS
13870 tp->rx_copy_thresh = ~(u16)0; 13832 tp->rx_copy_thresh = ~(u16)0;
13871#endif 13833#endif
@@ -14629,9 +14591,6 @@ static const struct net_device_ops tg3_netdev_ops = {
14629 .ndo_do_ioctl = tg3_ioctl, 14591 .ndo_do_ioctl = tg3_ioctl,
14630 .ndo_tx_timeout = tg3_tx_timeout, 14592 .ndo_tx_timeout = tg3_tx_timeout,
14631 .ndo_change_mtu = tg3_change_mtu, 14593 .ndo_change_mtu = tg3_change_mtu,
14632#if TG3_VLAN_TAG_USED
14633 .ndo_vlan_rx_register = tg3_vlan_rx_register,
14634#endif
14635#ifdef CONFIG_NET_POLL_CONTROLLER 14594#ifdef CONFIG_NET_POLL_CONTROLLER
14636 .ndo_poll_controller = tg3_poll_controller, 14595 .ndo_poll_controller = tg3_poll_controller,
14637#endif 14596#endif
@@ -14648,9 +14607,6 @@ static const struct net_device_ops tg3_netdev_ops_dma_bug = {
14648 .ndo_do_ioctl = tg3_ioctl, 14607 .ndo_do_ioctl = tg3_ioctl,
14649 .ndo_tx_timeout = tg3_tx_timeout, 14608 .ndo_tx_timeout = tg3_tx_timeout,
14650 .ndo_change_mtu = tg3_change_mtu, 14609 .ndo_change_mtu = tg3_change_mtu,
14651#if TG3_VLAN_TAG_USED
14652 .ndo_vlan_rx_register = tg3_vlan_rx_register,
14653#endif
14654#ifdef CONFIG_NET_POLL_CONTROLLER 14610#ifdef CONFIG_NET_POLL_CONTROLLER
14655 .ndo_poll_controller = tg3_poll_controller, 14611 .ndo_poll_controller = tg3_poll_controller,
14656#endif 14612#endif
@@ -14700,9 +14656,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
14700 14656
14701 SET_NETDEV_DEV(dev, &pdev->dev); 14657 SET_NETDEV_DEV(dev, &pdev->dev);
14702 14658
14703#if TG3_VLAN_TAG_USED
14704 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX; 14659 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
14705#endif
14706 14660
14707 tp = netdev_priv(dev); 14661 tp = netdev_priv(dev);
14708 tp->pdev = pdev; 14662 tp->pdev = pdev;
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index d62c8d937c82..73884b69b749 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -4,7 +4,7 @@
4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com) 4 * Copyright (C) 2001, 2002, 2003, 2004 David S. Miller (davem@redhat.com)
5 * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com) 5 * Copyright (C) 2001 Jeff Garzik (jgarzik@pobox.com)
6 * Copyright (C) 2004 Sun Microsystems Inc. 6 * Copyright (C) 2004 Sun Microsystems Inc.
7 * Copyright (C) 2007-2010 Broadcom Corporation. 7 * Copyright (C) 2007-2011 Broadcom Corporation.
8 */ 8 */
9 9
10#ifndef _T3_H 10#ifndef _T3_H
@@ -141,6 +141,7 @@
141#define CHIPREV_ID_57780_A1 0x57780001 141#define CHIPREV_ID_57780_A1 0x57780001
142#define CHIPREV_ID_5717_A0 0x05717000 142#define CHIPREV_ID_5717_A0 0x05717000
143#define CHIPREV_ID_57765_A0 0x57785000 143#define CHIPREV_ID_57765_A0 0x57785000
144#define CHIPREV_ID_5719_A0 0x05719000
144#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) 145#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
145#define ASIC_REV_5700 0x07 146#define ASIC_REV_5700 0x07
146#define ASIC_REV_5701 0x00 147#define ASIC_REV_5701 0x00
@@ -1105,7 +1106,7 @@
1105#define TG3_CPMU_DBTMR1_PCIEXIT_2047US 0x07ff0000 1106#define TG3_CPMU_DBTMR1_PCIEXIT_2047US 0x07ff0000
1106#define TG3_CPMU_DBTMR1_LNKIDLE_2047US 0x000070ff 1107#define TG3_CPMU_DBTMR1_LNKIDLE_2047US 0x000070ff
1107#define TG3_CPMU_EEE_DBTMR2 0x000036b8 1108#define TG3_CPMU_EEE_DBTMR2 0x000036b8
1108#define TG3_CPMU_DBTMR1_APE_TX_2047US 0x07ff0000 1109#define TG3_CPMU_DBTMR2_APE_TX_2047US 0x07ff0000
1109#define TG3_CPMU_DBTMR2_TXIDXEQ_2047US 0x000070ff 1110#define TG3_CPMU_DBTMR2_TXIDXEQ_2047US 0x000070ff
1110#define TG3_CPMU_EEE_LNKIDL_CTRL 0x000036bc 1111#define TG3_CPMU_EEE_LNKIDL_CTRL 0x000036bc
1111#define TG3_CPMU_EEE_LNKIDL_PCIE_NL0 0x01000000 1112#define TG3_CPMU_EEE_LNKIDL_PCIE_NL0 0x01000000
@@ -1333,6 +1334,10 @@
1333 1334
1334#define TG3_RDMA_RSRVCTRL_REG 0x00004900 1335#define TG3_RDMA_RSRVCTRL_REG 0x00004900
1335#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004 1336#define TG3_RDMA_RSRVCTRL_FIFO_OFLW_FIX 0x00000004
1337#define TG3_RDMA_RSRVCTRL_FIFO_LWM_1_5K 0x00000c00
1338#define TG3_RDMA_RSRVCTRL_FIFO_LWM_MASK 0x00000ff0
1339#define TG3_RDMA_RSRVCTRL_FIFO_HWM_1_5K 0x000c0000
1340#define TG3_RDMA_RSRVCTRL_FIFO_HWM_MASK 0x000ff000
1336#define TG3_RDMA_RSRVCTRL_TXMRGN_320B 0x28000000 1341#define TG3_RDMA_RSRVCTRL_TXMRGN_320B 0x28000000
1337#define TG3_RDMA_RSRVCTRL_TXMRGN_MASK 0xffe00000 1342#define TG3_RDMA_RSRVCTRL_TXMRGN_MASK 0xffe00000
1338/* 0x4904 --> 0x4910 unused */ 1343/* 0x4904 --> 0x4910 unused */
@@ -2108,6 +2113,10 @@
2108 2113
2109#define MII_TG3_DSP_TAP1 0x0001 2114#define MII_TG3_DSP_TAP1 0x0001
2110#define MII_TG3_DSP_TAP1_AGCTGT_DFLT 0x0007 2115#define MII_TG3_DSP_TAP1_AGCTGT_DFLT 0x0007
2116#define MII_TG3_DSP_TAP26 0x001a
2117#define MII_TG3_DSP_TAP26_ALNOKO 0x0001
2118#define MII_TG3_DSP_TAP26_RMRXSTO 0x0002
2119#define MII_TG3_DSP_TAP26_OPCSINPT 0x0004
2111#define MII_TG3_DSP_AADJ1CH0 0x001f 2120#define MII_TG3_DSP_AADJ1CH0 0x001f
2112#define MII_TG3_DSP_CH34TP2 0x4022 2121#define MII_TG3_DSP_CH34TP2 0x4022
2113#define MII_TG3_DSP_CH34TP2_HIBW01 0x0010 2122#define MII_TG3_DSP_CH34TP2_HIBW01 0x0010
@@ -2808,9 +2817,6 @@ struct tg3 {
2808 u32 rx_std_max_post; 2817 u32 rx_std_max_post;
2809 u32 rx_offset; 2818 u32 rx_offset;
2810 u32 rx_pkt_map_sz; 2819 u32 rx_pkt_map_sz;
2811#if TG3_VLAN_TAG_USED
2812 struct vlan_group *vlgrp;
2813#endif
2814 2820
2815 2821
2816 /* begin "everything else" cacheline(s) section */ 2822 /* begin "everything else" cacheline(s) section */
diff --git a/drivers/net/tlan.c b/drivers/net/tlan.c
index f8e463cd8ecc..0678e7e71f19 100644
--- a/drivers/net/tlan.c
+++ b/drivers/net/tlan.c
@@ -63,45 +63,45 @@
63 * - Other minor stuff 63 * - Other minor stuff
64 * 64 *
65 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's 65 * v1.4 Feb 10, 2000 - Updated with more changes required after Dave's
66 * network cleanup in 2.3.43pre7 (Tigran & myself) 66 * network cleanup in 2.3.43pre7 (Tigran & myself)
67 * - Minor stuff. 67 * - Minor stuff.
68 * 68 *
69 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the driver 69 * v1.5 March 22, 2000 - Fixed another timer bug that would hang the
70 * if no cable/link were present. 70 * driver if no cable/link were present.
71 * - Cosmetic changes. 71 * - Cosmetic changes.
72 * - TODO: Port completely to new PCI/DMA API 72 * - TODO: Port completely to new PCI/DMA API
73 * Auto-Neg fallback. 73 * Auto-Neg fallback.
74 * 74 *
75 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters. Haven't 75 * v1.6 April 04, 2000 - Fixed driver support for kernel-parameters.
76 * tested it though, as the kernel support is currently 76 * Haven't tested it though, as the kernel support
77 * broken (2.3.99p4p3). 77 * is currently broken (2.3.99p4p3).
78 * - Updated tlan.txt accordingly. 78 * - Updated tlan.txt accordingly.
79 * - Adjusted minimum/maximum frame length. 79 * - Adjusted minimum/maximum frame length.
80 * - There is now a TLAN website up at 80 * - There is now a TLAN website up at
81 * http://hp.sourceforge.net/ 81 * http://hp.sourceforge.net/
82 * 82 *
83 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now 83 * v1.7 April 07, 2000 - Started to implement custom ioctls. Driver now
84 * reports PHY information when used with Donald 84 * reports PHY information when used with Donald
85 * Beckers userspace MII diagnostics utility. 85 * Beckers userspace MII diagnostics utility.
86 * 86 *
87 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings. 87 * v1.8 April 23, 2000 - Fixed support for forced speed/duplex settings.
88 * - Added link information to Auto-Neg and forced 88 * - Added link information to Auto-Neg and forced
89 * modes. When NIC operates with auto-neg the driver 89 * modes. When NIC operates with auto-neg the driver
90 * will report Link speed & duplex modes as well as 90 * will report Link speed & duplex modes as well as
91 * link partner abilities. When forced link is used, 91 * link partner abilities. When forced link is used,
92 * the driver will report status of the established 92 * the driver will report status of the established
93 * link. 93 * link.
94 * Please read tlan.txt for additional information. 94 * Please read tlan.txt for additional information.
95 * - Removed call to check_region(), and used 95 * - Removed call to check_region(), and used
96 * return value of request_region() instead. 96 * return value of request_region() instead.
97 * 97 *
98 * v1.8a May 28, 2000 - Minor updates. 98 * v1.8a May 28, 2000 - Minor updates.
99 * 99 *
100 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues. 100 * v1.9 July 25, 2000 - Fixed a few remaining Full-Duplex issues.
101 * - Updated with timer fixes from Andrew Morton. 101 * - Updated with timer fixes from Andrew Morton.
102 * - Fixed module race in TLan_Open. 102 * - Fixed module race in TLan_Open.
103 * - Added routine to monitor PHY status. 103 * - Added routine to monitor PHY status.
104 * - Added activity led support for Proliant devices. 104 * - Added activity led support for Proliant devices.
105 * 105 *
106 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers 106 * v1.10 Aug 30, 2000 - Added support for EISA based tlan controllers
107 * like the Compaq NetFlex3/E. 107 * like the Compaq NetFlex3/E.
@@ -111,8 +111,8 @@
111 * hardware probe is done with kernel API and 111 * hardware probe is done with kernel API and
112 * TLan_EisaProbe. 112 * TLan_EisaProbe.
113 * - Adjusted debug information for probing. 113 * - Adjusted debug information for probing.
114 * - Fixed bug that would cause general debug information 114 * - Fixed bug that would cause general debug
115 * to be printed after driver removal. 115 * information to be printed after driver removal.
116 * - Added transmit timeout handling. 116 * - Added transmit timeout handling.
117 * - Fixed OOM return values in tlan_probe. 117 * - Fixed OOM return values in tlan_probe.
118 * - Fixed possible mem leak in tlan_exit 118 * - Fixed possible mem leak in tlan_exit
@@ -136,8 +136,8 @@
136 * 136 *
137 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.) 137 * v1.12 Oct 12, 2000 - Minor fixes (memleak, init, etc.)
138 * 138 *
139 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues 139 * v1.13 Nov 28, 2000 - Stop flooding console with auto-neg issues
140 * when link can't be established. 140 * when link can't be established.
141 * - Added the bbuf option as a kernel parameter. 141 * - Added the bbuf option as a kernel parameter.
142 * - Fixed ioaddr probe bug. 142 * - Fixed ioaddr probe bug.
143 * - Fixed stupid deadlock with MII interrupts. 143 * - Fixed stupid deadlock with MII interrupts.
@@ -147,28 +147,30 @@
147 * TLAN v1.0 silicon. This needs to be investigated 147 * TLAN v1.0 silicon. This needs to be investigated
148 * further. 148 * further.
149 * 149 *
150 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per. 150 * v1.14 Dec 16, 2000 - Added support for servicing multiple frames per.
151 * interrupt. Thanks goes to 151 * interrupt. Thanks goes to
152 * Adam Keys <adam@ti.com> 152 * Adam Keys <adam@ti.com>
153 * Denis Beaudoin <dbeaudoin@ti.com> 153 * Denis Beaudoin <dbeaudoin@ti.com>
154 * for providing the patch. 154 * for providing the patch.
155 * - Fixed auto-neg output when using multiple 155 * - Fixed auto-neg output when using multiple
156 * adapters. 156 * adapters.
157 * - Converted to use new taskq interface. 157 * - Converted to use new taskq interface.
158 * 158 *
159 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.) 159 * v1.14a Jan 6, 2001 - Minor adjustments (spinlocks, etc.)
160 * 160 *
161 * Samuel Chessman <chessman@tux.org> New Maintainer! 161 * Samuel Chessman <chessman@tux.org> New Maintainer!
162 * 162 *
163 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be 163 * v1.15 Apr 4, 2002 - Correct operation when aui=1 to be
164 * 10T half duplex no loopback 164 * 10T half duplex no loopback
165 * Thanks to Gunnar Eikman 165 * Thanks to Gunnar Eikman
166 * 166 *
167 * Sakari Ailus <sakari.ailus@iki.fi>: 167 * Sakari Ailus <sakari.ailus@iki.fi>:
168 * 168 *
169 * v1.15a Dec 15 2008 - Remove bbuf support, it doesn't work anyway. 169 * v1.15a Dec 15 2008 - Remove bbuf support, it doesn't work anyway.
170 * v1.16 Jan 6 2011 - Make checkpatch.pl happy.
171 * v1.17 Jan 6 2011 - Add suspend/resume support.
170 * 172 *
171 *******************************************************************************/ 173 ******************************************************************************/
172 174
173#include <linux/module.h> 175#include <linux/module.h>
174#include <linux/init.h> 176#include <linux/init.h>
@@ -185,13 +187,11 @@
185 187
186#include "tlan.h" 188#include "tlan.h"
187 189
188typedef u32 (TLanIntVectorFunc)( struct net_device *, u16 );
189
190 190
191/* For removing EISA devices */ 191/* For removing EISA devices */
192static struct net_device *TLan_Eisa_Devices; 192static struct net_device *tlan_eisa_devices;
193 193
194static int TLanDevicesInstalled; 194static int tlan_devices_installed;
195 195
196/* Set speed, duplex and aui settings */ 196/* Set speed, duplex and aui settings */
197static int aui[MAX_TLAN_BOARDS]; 197static int aui[MAX_TLAN_BOARDS];
@@ -202,7 +202,8 @@ module_param_array(aui, int, NULL, 0);
202module_param_array(duplex, int, NULL, 0); 202module_param_array(duplex, int, NULL, 0);
203module_param_array(speed, int, NULL, 0); 203module_param_array(speed, int, NULL, 0);
204MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)"); 204MODULE_PARM_DESC(aui, "ThunderLAN use AUI port(s) (0-1)");
205MODULE_PARM_DESC(duplex, "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)"); 205MODULE_PARM_DESC(duplex,
206 "ThunderLAN duplex setting(s) (0-default, 1-half, 2-full)");
206MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)"); 207MODULE_PARM_DESC(speed, "ThunderLAN port speen setting(s) (0,10,100)");
207 208
208MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>"); 209MODULE_AUTHOR("Maintainer: Samuel Chessman <chessman@tux.org>");
@@ -218,139 +219,144 @@ static int debug;
218module_param(debug, int, 0); 219module_param(debug, int, 0);
219MODULE_PARM_DESC(debug, "ThunderLAN debug mask"); 220MODULE_PARM_DESC(debug, "ThunderLAN debug mask");
220 221
221static const char TLanSignature[] = "TLAN"; 222static const char tlan_signature[] = "TLAN";
222static const char tlan_banner[] = "ThunderLAN driver v1.15a\n"; 223static const char tlan_banner[] = "ThunderLAN driver v1.17\n";
223static int tlan_have_pci; 224static int tlan_have_pci;
224static int tlan_have_eisa; 225static int tlan_have_eisa;
225 226
226static const char *media[] = { 227static const char * const media[] = {
227 "10BaseT-HD ", "10BaseT-FD ","100baseTx-HD ", 228 "10BaseT-HD", "10BaseT-FD", "100baseTx-HD",
228 "100baseTx-FD", "100baseT4", NULL 229 "100BaseTx-FD", "100BaseT4", NULL
229}; 230};
230 231
231static struct board { 232static struct board {
232 const char *deviceLabel; 233 const char *device_label;
233 u32 flags; 234 u32 flags;
234 u16 addrOfs; 235 u16 addr_ofs;
235} board_info[] = { 236} board_info[] = {
236 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 237 { "Compaq Netelligent 10 T PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
237 { "Compaq Netelligent 10/100 TX PCI UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 238 { "Compaq Netelligent 10/100 TX PCI UTP",
239 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
238 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 }, 240 { "Compaq Integrated NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
239 { "Compaq NetFlex-3/P", 241 { "Compaq NetFlex-3/P",
240 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 }, 242 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
241 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 }, 243 { "Compaq NetFlex-3/P", TLAN_ADAPTER_NONE, 0x83 },
242 { "Compaq Netelligent Integrated 10/100 TX UTP", 244 { "Compaq Netelligent Integrated 10/100 TX UTP",
243 TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 245 TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
244 { "Compaq Netelligent Dual 10/100 TX PCI UTP", TLAN_ADAPTER_NONE, 0x83 }, 246 { "Compaq Netelligent Dual 10/100 TX PCI UTP",
245 { "Compaq Netelligent 10/100 TX Embedded UTP", TLAN_ADAPTER_NONE, 0x83 }, 247 TLAN_ADAPTER_NONE, 0x83 },
248 { "Compaq Netelligent 10/100 TX Embedded UTP",
249 TLAN_ADAPTER_NONE, 0x83 },
246 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 }, 250 { "Olicom OC-2183/2185", TLAN_ADAPTER_USE_INTERN_10, 0x83 },
247 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xF8 }, 251 { "Olicom OC-2325", TLAN_ADAPTER_UNMANAGED_PHY, 0xf8 },
248 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xF8 }, 252 { "Olicom OC-2326", TLAN_ADAPTER_USE_INTERN_10, 0xf8 },
249 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, 253 { "Compaq Netelligent 10/100 TX UTP", TLAN_ADAPTER_ACTIVITY_LED, 0x83 },
250 { "Compaq Netelligent 10 T/2 PCI UTP/Coax", TLAN_ADAPTER_NONE, 0x83 }, 254 { "Compaq Netelligent 10 T/2 PCI UTP/coax", TLAN_ADAPTER_NONE, 0x83 },
251 { "Compaq NetFlex-3/E", 255 { "Compaq NetFlex-3/E",
252 TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */ 256 TLAN_ADAPTER_ACTIVITY_LED | /* EISA card */
253 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 }, 257 TLAN_ADAPTER_UNMANAGED_PHY | TLAN_ADAPTER_BIT_RATE_PHY, 0x83 },
254 { "Compaq NetFlex-3/E", TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */ 258 { "Compaq NetFlex-3/E",
259 TLAN_ADAPTER_ACTIVITY_LED, 0x83 }, /* EISA card */
255}; 260};
256 261
257static DEFINE_PCI_DEVICE_TABLE(tlan_pci_tbl) = { 262static DEFINE_PCI_DEVICE_TABLE(tlan_pci_tbl) = {
258 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10, 263 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL10,
259 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 264 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
260 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100, 265 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100,
261 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 }, 266 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 1 },
262 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I, 267 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3I,
263 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 }, 268 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2 },
264 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER, 269 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_THUNDER,
265 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 }, 270 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3 },
266 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B, 271 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETFLEX3B,
267 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 }, 272 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 4 },
268 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI, 273 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100PI,
269 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 }, 274 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 5 },
270 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D, 275 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100D,
271 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 }, 276 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 6 },
272 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I, 277 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_NETEL100I,
273 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 }, 278 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 7 },
274 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183, 279 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2183,
275 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 }, 280 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 8 },
276 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325, 281 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2325,
277 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 }, 282 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 9 },
278 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326, 283 { PCI_VENDOR_ID_OLICOM, PCI_DEVICE_ID_OLICOM_OC2326,
279 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 }, 284 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 10 },
280 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100, 285 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_100_WS_5100,
281 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 }, 286 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 11 },
282 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2, 287 { PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_NETELLIGENT_10_T2,
283 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 }, 288 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 12 },
284 { 0,} 289 { 0,}
285}; 290};
286MODULE_DEVICE_TABLE(pci, tlan_pci_tbl); 291MODULE_DEVICE_TABLE(pci, tlan_pci_tbl);
287 292
288static void TLan_EisaProbe( void ); 293static void tlan_eisa_probe(void);
289static void TLan_Eisa_Cleanup( void ); 294static void tlan_eisa_cleanup(void);
290static int TLan_Init( struct net_device * ); 295static int tlan_init(struct net_device *);
291static int TLan_Open( struct net_device *dev ); 296static int tlan_open(struct net_device *dev);
292static netdev_tx_t TLan_StartTx( struct sk_buff *, struct net_device *); 297static netdev_tx_t tlan_start_tx(struct sk_buff *, struct net_device *);
293static irqreturn_t TLan_HandleInterrupt( int, void *); 298static irqreturn_t tlan_handle_interrupt(int, void *);
294static int TLan_Close( struct net_device *); 299static int tlan_close(struct net_device *);
295static struct net_device_stats *TLan_GetStats( struct net_device *); 300static struct net_device_stats *tlan_get_stats(struct net_device *);
296static void TLan_SetMulticastList( struct net_device *); 301static void tlan_set_multicast_list(struct net_device *);
297static int TLan_ioctl( struct net_device *dev, struct ifreq *rq, int cmd); 302static int tlan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
298static int TLan_probe1( struct pci_dev *pdev, long ioaddr, 303static int tlan_probe1(struct pci_dev *pdev, long ioaddr,
299 int irq, int rev, const struct pci_device_id *ent); 304 int irq, int rev, const struct pci_device_id *ent);
300static void TLan_tx_timeout( struct net_device *dev); 305static void tlan_tx_timeout(struct net_device *dev);
301static void TLan_tx_timeout_work(struct work_struct *work); 306static void tlan_tx_timeout_work(struct work_struct *work);
302static int tlan_init_one( struct pci_dev *pdev, const struct pci_device_id *ent); 307static int tlan_init_one(struct pci_dev *pdev,
303 308 const struct pci_device_id *ent);
304static u32 TLan_HandleTxEOF( struct net_device *, u16 ); 309
305static u32 TLan_HandleStatOverflow( struct net_device *, u16 ); 310static u32 tlan_handle_tx_eof(struct net_device *, u16);
306static u32 TLan_HandleRxEOF( struct net_device *, u16 ); 311static u32 tlan_handle_stat_overflow(struct net_device *, u16);
307static u32 TLan_HandleDummy( struct net_device *, u16 ); 312static u32 tlan_handle_rx_eof(struct net_device *, u16);
308static u32 TLan_HandleTxEOC( struct net_device *, u16 ); 313static u32 tlan_handle_dummy(struct net_device *, u16);
309static u32 TLan_HandleStatusCheck( struct net_device *, u16 ); 314static u32 tlan_handle_tx_eoc(struct net_device *, u16);
310static u32 TLan_HandleRxEOC( struct net_device *, u16 ); 315static u32 tlan_handle_status_check(struct net_device *, u16);
311 316static u32 tlan_handle_rx_eoc(struct net_device *, u16);
312static void TLan_Timer( unsigned long ); 317
313 318static void tlan_timer(unsigned long);
314static void TLan_ResetLists( struct net_device * ); 319
315static void TLan_FreeLists( struct net_device * ); 320static void tlan_reset_lists(struct net_device *);
316static void TLan_PrintDio( u16 ); 321static void tlan_free_lists(struct net_device *);
317static void TLan_PrintList( TLanList *, char *, int ); 322static void tlan_print_dio(u16);
318static void TLan_ReadAndClearStats( struct net_device *, int ); 323static void tlan_print_list(struct tlan_list *, char *, int);
319static void TLan_ResetAdapter( struct net_device * ); 324static void tlan_read_and_clear_stats(struct net_device *, int);
320static void TLan_FinishReset( struct net_device * ); 325static void tlan_reset_adapter(struct net_device *);
321static void TLan_SetMac( struct net_device *, int areg, char *mac ); 326static void tlan_finish_reset(struct net_device *);
322 327static void tlan_set_mac(struct net_device *, int areg, char *mac);
323static void TLan_PhyPrint( struct net_device * ); 328
324static void TLan_PhyDetect( struct net_device * ); 329static void tlan_phy_print(struct net_device *);
325static void TLan_PhyPowerDown( struct net_device * ); 330static void tlan_phy_detect(struct net_device *);
326static void TLan_PhyPowerUp( struct net_device * ); 331static void tlan_phy_power_down(struct net_device *);
327static void TLan_PhyReset( struct net_device * ); 332static void tlan_phy_power_up(struct net_device *);
328static void TLan_PhyStartLink( struct net_device * ); 333static void tlan_phy_reset(struct net_device *);
329static void TLan_PhyFinishAutoNeg( struct net_device * ); 334static void tlan_phy_start_link(struct net_device *);
335static void tlan_phy_finish_auto_neg(struct net_device *);
330#ifdef MONITOR 336#ifdef MONITOR
331static void TLan_PhyMonitor( struct net_device * ); 337static void tlan_phy_monitor(struct net_device *);
332#endif 338#endif
333 339
334/* 340/*
335static int TLan_PhyNop( struct net_device * ); 341 static int tlan_phy_nop(struct net_device *);
336static int TLan_PhyInternalCheck( struct net_device * ); 342 static int tlan_phy_internal_check(struct net_device *);
337static int TLan_PhyInternalService( struct net_device * ); 343 static int tlan_phy_internal_service(struct net_device *);
338static int TLan_PhyDp83840aCheck( struct net_device * ); 344 static int tlan_phy_dp83840a_check(struct net_device *);
339*/ 345*/
340 346
341static bool TLan_MiiReadReg( struct net_device *, u16, u16, u16 * ); 347static bool tlan_mii_read_reg(struct net_device *, u16, u16, u16 *);
342static void TLan_MiiSendData( u16, u32, unsigned ); 348static void tlan_mii_send_data(u16, u32, unsigned);
343static void TLan_MiiSync( u16 ); 349static void tlan_mii_sync(u16);
344static void TLan_MiiWriteReg( struct net_device *, u16, u16, u16 ); 350static void tlan_mii_write_reg(struct net_device *, u16, u16, u16);
345 351
346static void TLan_EeSendStart( u16 ); 352static void tlan_ee_send_start(u16);
347static int TLan_EeSendByte( u16, u8, int ); 353static int tlan_ee_send_byte(u16, u8, int);
348static void TLan_EeReceiveByte( u16, u8 *, int ); 354static void tlan_ee_receive_byte(u16, u8 *, int);
349static int TLan_EeReadByte( struct net_device *, u8, u8 * ); 355static int tlan_ee_read_byte(struct net_device *, u8, u8 *);
350 356
351 357
352static inline void 358static inline void
353TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb) 359tlan_store_skb(struct tlan_list *tag, struct sk_buff *skb)
354{ 360{
355 unsigned long addr = (unsigned long)skb; 361 unsigned long addr = (unsigned long)skb;
356 tag->buffer[9].address = addr; 362 tag->buffer[9].address = addr;
@@ -358,7 +364,7 @@ TLan_StoreSKB( struct tlan_list_tag *tag, struct sk_buff *skb)
358} 364}
359 365
360static inline struct sk_buff * 366static inline struct sk_buff *
361TLan_GetSKB( const struct tlan_list_tag *tag) 367tlan_get_skb(const struct tlan_list *tag)
362{ 368{
363 unsigned long addr; 369 unsigned long addr;
364 370
@@ -367,50 +373,50 @@ TLan_GetSKB( const struct tlan_list_tag *tag)
367 return (struct sk_buff *) addr; 373 return (struct sk_buff *) addr;
368} 374}
369 375
370 376static u32
371static TLanIntVectorFunc *TLanIntVector[TLAN_INT_NUMBER_OF_INTS] = { 377(*tlan_int_vector[TLAN_INT_NUMBER_OF_INTS])(struct net_device *, u16) = {
372 NULL, 378 NULL,
373 TLan_HandleTxEOF, 379 tlan_handle_tx_eof,
374 TLan_HandleStatOverflow, 380 tlan_handle_stat_overflow,
375 TLan_HandleRxEOF, 381 tlan_handle_rx_eof,
376 TLan_HandleDummy, 382 tlan_handle_dummy,
377 TLan_HandleTxEOC, 383 tlan_handle_tx_eoc,
378 TLan_HandleStatusCheck, 384 tlan_handle_status_check,
379 TLan_HandleRxEOC 385 tlan_handle_rx_eoc
380}; 386};
381 387
382static inline void 388static inline void
383TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type ) 389tlan_set_timer(struct net_device *dev, u32 ticks, u32 type)
384{ 390{
385 TLanPrivateInfo *priv = netdev_priv(dev); 391 struct tlan_priv *priv = netdev_priv(dev);
386 unsigned long flags = 0; 392 unsigned long flags = 0;
387 393
388 if (!in_irq()) 394 if (!in_irq())
389 spin_lock_irqsave(&priv->lock, flags); 395 spin_lock_irqsave(&priv->lock, flags);
390 if ( priv->timer.function != NULL && 396 if (priv->timer.function != NULL &&
391 priv->timerType != TLAN_TIMER_ACTIVITY ) { 397 priv->timer_type != TLAN_TIMER_ACTIVITY) {
392 if (!in_irq()) 398 if (!in_irq())
393 spin_unlock_irqrestore(&priv->lock, flags); 399 spin_unlock_irqrestore(&priv->lock, flags);
394 return; 400 return;
395 } 401 }
396 priv->timer.function = TLan_Timer; 402 priv->timer.function = tlan_timer;
397 if (!in_irq()) 403 if (!in_irq())
398 spin_unlock_irqrestore(&priv->lock, flags); 404 spin_unlock_irqrestore(&priv->lock, flags);
399 405
400 priv->timer.data = (unsigned long) dev; 406 priv->timer.data = (unsigned long) dev;
401 priv->timerSetAt = jiffies; 407 priv->timer_set_at = jiffies;
402 priv->timerType = type; 408 priv->timer_type = type;
403 mod_timer(&priv->timer, jiffies + ticks); 409 mod_timer(&priv->timer, jiffies + ticks);
404 410
405} /* TLan_SetTimer */ 411}
406 412
407 413
408/***************************************************************************** 414/*****************************************************************************
409****************************************************************************** 415******************************************************************************
410 416
411 ThunderLAN Driver Primary Functions 417ThunderLAN driver primary functions
412 418
413 These functions are more or less common to all Linux network drivers. 419these functions are more or less common to all linux network drivers.
414 420
415****************************************************************************** 421******************************************************************************
416*****************************************************************************/ 422*****************************************************************************/
@@ -419,49 +425,117 @@ TLan_SetTimer( struct net_device *dev, u32 ticks, u32 type )
419 425
420 426
421 427
422 /*************************************************************** 428/***************************************************************
423 * tlan_remove_one 429 * tlan_remove_one
424 * 430 *
425 * Returns: 431 * Returns:
426 * Nothing 432 * Nothing
427 * Parms: 433 * Parms:
428 * None 434 * None
429 * 435 *
430 * Goes through the TLanDevices list and frees the device 436 * Goes through the TLanDevices list and frees the device
431 * structs and memory associated with each device (lists 437 * structs and memory associated with each device (lists
432 * and buffers). It also ureserves the IO port regions 438 * and buffers). It also ureserves the IO port regions
433 * associated with this device. 439 * associated with this device.
434 * 440 *
435 **************************************************************/ 441 **************************************************************/
436 442
437 443
438static void __devexit tlan_remove_one( struct pci_dev *pdev) 444static void __devexit tlan_remove_one(struct pci_dev *pdev)
439{ 445{
440 struct net_device *dev = pci_get_drvdata( pdev ); 446 struct net_device *dev = pci_get_drvdata(pdev);
441 TLanPrivateInfo *priv = netdev_priv(dev); 447 struct tlan_priv *priv = netdev_priv(dev);
442 448
443 unregister_netdev( dev ); 449 unregister_netdev(dev);
444 450
445 if ( priv->dmaStorage ) { 451 if (priv->dma_storage) {
446 pci_free_consistent(priv->pciDev, 452 pci_free_consistent(priv->pci_dev,
447 priv->dmaSize, priv->dmaStorage, 453 priv->dma_size, priv->dma_storage,
448 priv->dmaStorageDMA ); 454 priv->dma_storage_dma);
449 } 455 }
450 456
451#ifdef CONFIG_PCI 457#ifdef CONFIG_PCI
452 pci_release_regions(pdev); 458 pci_release_regions(pdev);
453#endif 459#endif
454 460
455 free_netdev( dev ); 461 free_netdev(dev);
462
463 pci_set_drvdata(pdev, NULL);
464}
465
466static void tlan_start(struct net_device *dev)
467{
468 tlan_reset_lists(dev);
469 /* NOTE: It might not be necessary to read the stats before a
470 reset if you don't care what the values are.
471 */
472 tlan_read_and_clear_stats(dev, TLAN_IGNORE);
473 tlan_reset_adapter(dev);
474 netif_wake_queue(dev);
475}
476
477static void tlan_stop(struct net_device *dev)
478{
479 struct tlan_priv *priv = netdev_priv(dev);
480
481 tlan_read_and_clear_stats(dev, TLAN_RECORD);
482 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD);
483 /* Reset and power down phy */
484 tlan_reset_adapter(dev);
485 if (priv->timer.function != NULL) {
486 del_timer_sync(&priv->timer);
487 priv->timer.function = NULL;
488 }
489}
490
491#ifdef CONFIG_PM
492
493static int tlan_suspend(struct pci_dev *pdev, pm_message_t state)
494{
495 struct net_device *dev = pci_get_drvdata(pdev);
496
497 if (netif_running(dev))
498 tlan_stop(dev);
499
500 netif_device_detach(dev);
501 pci_save_state(pdev);
502 pci_disable_device(pdev);
503 pci_wake_from_d3(pdev, false);
504 pci_set_power_state(pdev, PCI_D3hot);
456 505
457 pci_set_drvdata( pdev, NULL ); 506 return 0;
458} 507}
459 508
509static int tlan_resume(struct pci_dev *pdev)
510{
511 struct net_device *dev = pci_get_drvdata(pdev);
512
513 pci_set_power_state(pdev, PCI_D0);
514 pci_restore_state(pdev);
515 pci_enable_wake(pdev, 0, 0);
516 netif_device_attach(dev);
517
518 if (netif_running(dev))
519 tlan_start(dev);
520
521 return 0;
522}
523
524#else /* CONFIG_PM */
525
526#define tlan_suspend NULL
527#define tlan_resume NULL
528
529#endif /* CONFIG_PM */
530
531
460static struct pci_driver tlan_driver = { 532static struct pci_driver tlan_driver = {
461 .name = "tlan", 533 .name = "tlan",
462 .id_table = tlan_pci_tbl, 534 .id_table = tlan_pci_tbl,
463 .probe = tlan_init_one, 535 .probe = tlan_init_one,
464 .remove = __devexit_p(tlan_remove_one), 536 .remove = __devexit_p(tlan_remove_one),
537 .suspend = tlan_suspend,
538 .resume = tlan_resume,
465}; 539};
466 540
467static int __init tlan_probe(void) 541static int __init tlan_probe(void)
@@ -482,13 +556,13 @@ static int __init tlan_probe(void)
482 } 556 }
483 557
484 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n"); 558 TLAN_DBG(TLAN_DEBUG_PROBE, "Starting EISA Probe....\n");
485 TLan_EisaProbe(); 559 tlan_eisa_probe();
486 560
487 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n", 561 printk(KERN_INFO "TLAN: %d device%s installed, PCI: %d EISA: %d\n",
488 TLanDevicesInstalled, TLanDevicesInstalled == 1 ? "" : "s", 562 tlan_devices_installed, tlan_devices_installed == 1 ? "" : "s",
489 tlan_have_pci, tlan_have_eisa); 563 tlan_have_pci, tlan_have_eisa);
490 564
491 if (TLanDevicesInstalled == 0) { 565 if (tlan_devices_installed == 0) {
492 rc = -ENODEV; 566 rc = -ENODEV;
493 goto err_out_pci_unreg; 567 goto err_out_pci_unreg;
494 } 568 }
@@ -501,39 +575,39 @@ err_out_pci_free:
501} 575}
502 576
503 577
504static int __devinit tlan_init_one( struct pci_dev *pdev, 578static int __devinit tlan_init_one(struct pci_dev *pdev,
505 const struct pci_device_id *ent) 579 const struct pci_device_id *ent)
506{ 580{
507 return TLan_probe1( pdev, -1, -1, 0, ent); 581 return tlan_probe1(pdev, -1, -1, 0, ent);
508} 582}
509 583
510 584
511/* 585/*
512 *************************************************************** 586***************************************************************
513 * tlan_probe1 587* tlan_probe1
514 * 588*
515 * Returns: 589* Returns:
516 * 0 on success, error code on error 590* 0 on success, error code on error
517 * Parms: 591* Parms:
518 * none 592* none
519 * 593*
520 * The name is lower case to fit in with all the rest of 594* The name is lower case to fit in with all the rest of
521 * the netcard_probe names. This function looks for 595* the netcard_probe names. This function looks for
522 * another TLan based adapter, setting it up with the 596* another TLan based adapter, setting it up with the
523 * allocated device struct if one is found. 597* allocated device struct if one is found.
524 * tlan_probe has been ported to the new net API and 598* tlan_probe has been ported to the new net API and
525 * now allocates its own device structure. This function 599* now allocates its own device structure. This function
526 * is also used by modules. 600* is also used by modules.
527 * 601*
528 **************************************************************/ 602**************************************************************/
529 603
530static int __devinit TLan_probe1(struct pci_dev *pdev, 604static int __devinit tlan_probe1(struct pci_dev *pdev,
531 long ioaddr, int irq, int rev, 605 long ioaddr, int irq, int rev,
532 const struct pci_device_id *ent ) 606 const struct pci_device_id *ent)
533{ 607{
534 608
535 struct net_device *dev; 609 struct net_device *dev;
536 TLanPrivateInfo *priv; 610 struct tlan_priv *priv;
537 u16 device_id; 611 u16 device_id;
538 int reg, rc = -ENODEV; 612 int reg, rc = -ENODEV;
539 613
@@ -543,7 +617,7 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
543 if (rc) 617 if (rc)
544 return rc; 618 return rc;
545 619
546 rc = pci_request_regions(pdev, TLanSignature); 620 rc = pci_request_regions(pdev, tlan_signature);
547 if (rc) { 621 if (rc) {
548 printk(KERN_ERR "TLAN: Could not reserve IO regions\n"); 622 printk(KERN_ERR "TLAN: Could not reserve IO regions\n");
549 goto err_out; 623 goto err_out;
@@ -551,7 +625,7 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
551 } 625 }
552#endif /* CONFIG_PCI */ 626#endif /* CONFIG_PCI */
553 627
554 dev = alloc_etherdev(sizeof(TLanPrivateInfo)); 628 dev = alloc_etherdev(sizeof(struct tlan_priv));
555 if (dev == NULL) { 629 if (dev == NULL) {
556 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n"); 630 printk(KERN_ERR "TLAN: Could not allocate memory for device.\n");
557 rc = -ENOMEM; 631 rc = -ENOMEM;
@@ -561,26 +635,28 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
561 635
562 priv = netdev_priv(dev); 636 priv = netdev_priv(dev);
563 637
564 priv->pciDev = pdev; 638 priv->pci_dev = pdev;
565 priv->dev = dev; 639 priv->dev = dev;
566 640
567 /* Is this a PCI device? */ 641 /* Is this a PCI device? */
568 if (pdev) { 642 if (pdev) {
569 u32 pci_io_base = 0; 643 u32 pci_io_base = 0;
570 644
571 priv->adapter = &board_info[ent->driver_data]; 645 priv->adapter = &board_info[ent->driver_data];
572 646
573 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); 647 rc = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
574 if (rc) { 648 if (rc) {
575 printk(KERN_ERR "TLAN: No suitable PCI mapping available.\n"); 649 printk(KERN_ERR
650 "TLAN: No suitable PCI mapping available.\n");
576 goto err_out_free_dev; 651 goto err_out_free_dev;
577 } 652 }
578 653
579 for ( reg= 0; reg <= 5; reg ++ ) { 654 for (reg = 0; reg <= 5; reg++) {
580 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) { 655 if (pci_resource_flags(pdev, reg) & IORESOURCE_IO) {
581 pci_io_base = pci_resource_start(pdev, reg); 656 pci_io_base = pci_resource_start(pdev, reg);
582 TLAN_DBG( TLAN_DEBUG_GNRL, "IO mapping is available at %x.\n", 657 TLAN_DBG(TLAN_DEBUG_GNRL,
583 pci_io_base); 658 "IO mapping is available at %x.\n",
659 pci_io_base);
584 break; 660 break;
585 } 661 }
586 } 662 }
@@ -592,7 +668,7 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
592 668
593 dev->base_addr = pci_io_base; 669 dev->base_addr = pci_io_base;
594 dev->irq = pdev->irq; 670 dev->irq = pdev->irq;
595 priv->adapterRev = pdev->revision; 671 priv->adapter_rev = pdev->revision;
596 pci_set_master(pdev); 672 pci_set_master(pdev);
597 pci_set_drvdata(pdev, dev); 673 pci_set_drvdata(pdev, dev);
598 674
@@ -602,11 +678,11 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
602 device_id = inw(ioaddr + EISA_ID2); 678 device_id = inw(ioaddr + EISA_ID2);
603 priv->is_eisa = 1; 679 priv->is_eisa = 1;
604 if (device_id == 0x20F1) { 680 if (device_id == 0x20F1) {
605 priv->adapter = &board_info[13]; /* NetFlex-3/E */ 681 priv->adapter = &board_info[13]; /* NetFlex-3/E */
606 priv->adapterRev = 23; /* TLAN 2.3 */ 682 priv->adapter_rev = 23; /* TLAN 2.3 */
607 } else { 683 } else {
608 priv->adapter = &board_info[14]; 684 priv->adapter = &board_info[14];
609 priv->adapterRev = 10; /* TLAN 1.0 */ 685 priv->adapter_rev = 10; /* TLAN 1.0 */
610 } 686 }
611 dev->base_addr = ioaddr; 687 dev->base_addr = ioaddr;
612 dev->irq = irq; 688 dev->irq = irq;
@@ -620,11 +696,11 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
620 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0 696 priv->speed = ((dev->mem_start & 0x18) == 0x18) ? 0
621 : (dev->mem_start & 0x18) >> 3; 697 : (dev->mem_start & 0x18) >> 3;
622 698
623 if (priv->speed == 0x1) { 699 if (priv->speed == 0x1)
624 priv->speed = TLAN_SPEED_10; 700 priv->speed = TLAN_SPEED_10;
625 } else if (priv->speed == 0x2) { 701 else if (priv->speed == 0x2)
626 priv->speed = TLAN_SPEED_100; 702 priv->speed = TLAN_SPEED_100;
627 } 703
628 debug = priv->debug = dev->mem_end; 704 debug = priv->debug = dev->mem_end;
629 } else { 705 } else {
630 priv->aui = aui[boards_found]; 706 priv->aui = aui[boards_found];
@@ -635,11 +711,11 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
635 711
636 /* This will be used when we get an adapter error from 712 /* This will be used when we get an adapter error from
637 * within our irq handler */ 713 * within our irq handler */
638 INIT_WORK(&priv->tlan_tqueue, TLan_tx_timeout_work); 714 INIT_WORK(&priv->tlan_tqueue, tlan_tx_timeout_work);
639 715
640 spin_lock_init(&priv->lock); 716 spin_lock_init(&priv->lock);
641 717
642 rc = TLan_Init(dev); 718 rc = tlan_init(dev);
643 if (rc) { 719 if (rc) {
644 printk(KERN_ERR "TLAN: Could not set up device.\n"); 720 printk(KERN_ERR "TLAN: Could not set up device.\n");
645 goto err_out_free_dev; 721 goto err_out_free_dev;
@@ -652,29 +728,29 @@ static int __devinit TLan_probe1(struct pci_dev *pdev,
652 } 728 }
653 729
654 730
655 TLanDevicesInstalled++; 731 tlan_devices_installed++;
656 boards_found++; 732 boards_found++;
657 733
658 /* pdev is NULL if this is an EISA device */ 734 /* pdev is NULL if this is an EISA device */
659 if (pdev) 735 if (pdev)
660 tlan_have_pci++; 736 tlan_have_pci++;
661 else { 737 else {
662 priv->nextDevice = TLan_Eisa_Devices; 738 priv->next_device = tlan_eisa_devices;
663 TLan_Eisa_Devices = dev; 739 tlan_eisa_devices = dev;
664 tlan_have_eisa++; 740 tlan_have_eisa++;
665 } 741 }
666 742
667 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n", 743 printk(KERN_INFO "TLAN: %s irq=%2d, io=%04x, %s, Rev. %d\n",
668 dev->name, 744 dev->name,
669 (int) dev->irq, 745 (int) dev->irq,
670 (int) dev->base_addr, 746 (int) dev->base_addr,
671 priv->adapter->deviceLabel, 747 priv->adapter->device_label,
672 priv->adapterRev); 748 priv->adapter_rev);
673 return 0; 749 return 0;
674 750
675err_out_uninit: 751err_out_uninit:
676 pci_free_consistent(priv->pciDev, priv->dmaSize, priv->dmaStorage, 752 pci_free_consistent(priv->pci_dev, priv->dma_size, priv->dma_storage,
677 priv->dmaStorageDMA ); 753 priv->dma_storage_dma);
678err_out_free_dev: 754err_out_free_dev:
679 free_netdev(dev); 755 free_netdev(dev);
680err_out_regions: 756err_out_regions:
@@ -689,22 +765,23 @@ err_out:
689} 765}
690 766
691 767
692static void TLan_Eisa_Cleanup(void) 768static void tlan_eisa_cleanup(void)
693{ 769{
694 struct net_device *dev; 770 struct net_device *dev;
695 TLanPrivateInfo *priv; 771 struct tlan_priv *priv;
696 772
697 while( tlan_have_eisa ) { 773 while (tlan_have_eisa) {
698 dev = TLan_Eisa_Devices; 774 dev = tlan_eisa_devices;
699 priv = netdev_priv(dev); 775 priv = netdev_priv(dev);
700 if (priv->dmaStorage) { 776 if (priv->dma_storage) {
701 pci_free_consistent(priv->pciDev, priv->dmaSize, 777 pci_free_consistent(priv->pci_dev, priv->dma_size,
702 priv->dmaStorage, priv->dmaStorageDMA ); 778 priv->dma_storage,
779 priv->dma_storage_dma);
703 } 780 }
704 release_region( dev->base_addr, 0x10); 781 release_region(dev->base_addr, 0x10);
705 unregister_netdev( dev ); 782 unregister_netdev(dev);
706 TLan_Eisa_Devices = priv->nextDevice; 783 tlan_eisa_devices = priv->next_device;
707 free_netdev( dev ); 784 free_netdev(dev);
708 tlan_have_eisa--; 785 tlan_have_eisa--;
709 } 786 }
710} 787}
@@ -715,7 +792,7 @@ static void __exit tlan_exit(void)
715 pci_unregister_driver(&tlan_driver); 792 pci_unregister_driver(&tlan_driver);
716 793
717 if (tlan_have_eisa) 794 if (tlan_have_eisa)
718 TLan_Eisa_Cleanup(); 795 tlan_eisa_cleanup();
719 796
720} 797}
721 798
@@ -726,24 +803,24 @@ module_exit(tlan_exit);
726 803
727 804
728 805
729 /************************************************************** 806/**************************************************************
730 * TLan_EisaProbe 807 * tlan_eisa_probe
731 * 808 *
732 * Returns: 0 on success, 1 otherwise 809 * Returns: 0 on success, 1 otherwise
733 * 810 *
734 * Parms: None 811 * Parms: None
735 * 812 *
736 * 813 *
737 * This functions probes for EISA devices and calls 814 * This functions probes for EISA devices and calls
738 * TLan_probe1 when one is found. 815 * TLan_probe1 when one is found.
739 * 816 *
740 *************************************************************/ 817 *************************************************************/
741 818
742static void __init TLan_EisaProbe (void) 819static void __init tlan_eisa_probe(void)
743{ 820{
744 long ioaddr; 821 long ioaddr;
745 int rc = -ENODEV; 822 int rc = -ENODEV;
746 int irq; 823 int irq;
747 u16 device_id; 824 u16 device_id;
748 825
749 if (!EISA_bus) { 826 if (!EISA_bus) {
@@ -754,15 +831,16 @@ static void __init TLan_EisaProbe (void)
754 /* Loop through all slots of the EISA bus */ 831 /* Loop through all slots of the EISA bus */
755 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) { 832 for (ioaddr = 0x1000; ioaddr < 0x9000; ioaddr += 0x1000) {
756 833
757 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", 834 TLAN_DBG(TLAN_DEBUG_PROBE, "EISA_ID 0x%4x: 0x%4x\n",
758 (int) ioaddr + 0xC80, inw(ioaddr + EISA_ID)); 835 (int) ioaddr + 0xc80, inw(ioaddr + EISA_ID));
759 TLAN_DBG(TLAN_DEBUG_PROBE,"EISA_ID 0x%4x: 0x%4x\n", 836 TLAN_DBG(TLAN_DEBUG_PROBE, "EISA_ID 0x%4x: 0x%4x\n",
760 (int) ioaddr + 0xC82, inw(ioaddr + EISA_ID2)); 837 (int) ioaddr + 0xc82, inw(ioaddr + EISA_ID2));
761 838
762 839
763 TLAN_DBG(TLAN_DEBUG_PROBE, "Probing for EISA adapter at IO: 0x%4x : ", 840 TLAN_DBG(TLAN_DEBUG_PROBE,
764 (int) ioaddr); 841 "Probing for EISA adapter at IO: 0x%4x : ",
765 if (request_region(ioaddr, 0x10, TLanSignature) == NULL) 842 (int) ioaddr);
843 if (request_region(ioaddr, 0x10, tlan_signature) == NULL)
766 goto out; 844 goto out;
767 845
768 if (inw(ioaddr + EISA_ID) != 0x110E) { 846 if (inw(ioaddr + EISA_ID) != 0x110E) {
@@ -772,326 +850,326 @@ static void __init TLan_EisaProbe (void)
772 850
773 device_id = inw(ioaddr + EISA_ID2); 851 device_id = inw(ioaddr + EISA_ID2);
774 if (device_id != 0x20F1 && device_id != 0x40F1) { 852 if (device_id != 0x20F1 && device_id != 0x40F1) {
775 release_region (ioaddr, 0x10); 853 release_region(ioaddr, 0x10);
776 goto out; 854 goto out;
777 } 855 }
778 856
779 if (inb(ioaddr + EISA_CR) != 0x1) { /* Check if adapter is enabled */ 857 /* check if adapter is enabled */
780 release_region (ioaddr, 0x10); 858 if (inb(ioaddr + EISA_CR) != 0x1) {
859 release_region(ioaddr, 0x10);
781 goto out2; 860 goto out2;
782 } 861 }
783 862
784 if (debug == 0x10) 863 if (debug == 0x10)
785 printk("Found one\n"); 864 printk(KERN_INFO "Found one\n");
786 865
787 866
788 /* Get irq from board */ 867 /* Get irq from board */
789 switch (inb(ioaddr + 0xCC0)) { 868 switch (inb(ioaddr + 0xcc0)) {
790 case(0x10): 869 case(0x10):
791 irq=5; 870 irq = 5;
792 break; 871 break;
793 case(0x20): 872 case(0x20):
794 irq=9; 873 irq = 9;
795 break; 874 break;
796 case(0x40): 875 case(0x40):
797 irq=10; 876 irq = 10;
798 break; 877 break;
799 case(0x80): 878 case(0x80):
800 irq=11; 879 irq = 11;
801 break; 880 break;
802 default: 881 default:
803 goto out; 882 goto out;
804 } 883 }
805 884
806 885
807 /* Setup the newly found eisa adapter */ 886 /* Setup the newly found eisa adapter */
808 rc = TLan_probe1( NULL, ioaddr, irq, 887 rc = tlan_probe1(NULL, ioaddr, irq,
809 12, NULL); 888 12, NULL);
810 continue; 889 continue;
811 890
812 out: 891out:
813 if (debug == 0x10) 892 if (debug == 0x10)
814 printk("None found\n"); 893 printk(KERN_INFO "None found\n");
815 continue; 894 continue;
816 895
817 out2: if (debug == 0x10) 896out2:
818 printk("Card found but it is not enabled, skipping\n"); 897 if (debug == 0x10)
819 continue; 898 printk(KERN_INFO "Card found but it is not enabled, skipping\n");
899 continue;
820 900
821 } 901 }
822 902
823} /* TLan_EisaProbe */ 903}
824 904
825#ifdef CONFIG_NET_POLL_CONTROLLER 905#ifdef CONFIG_NET_POLL_CONTROLLER
826static void TLan_Poll(struct net_device *dev) 906static void tlan_poll(struct net_device *dev)
827{ 907{
828 disable_irq(dev->irq); 908 disable_irq(dev->irq);
829 TLan_HandleInterrupt(dev->irq, dev); 909 tlan_handle_interrupt(dev->irq, dev);
830 enable_irq(dev->irq); 910 enable_irq(dev->irq);
831} 911}
832#endif 912#endif
833 913
834static const struct net_device_ops TLan_netdev_ops = { 914static const struct net_device_ops tlan_netdev_ops = {
835 .ndo_open = TLan_Open, 915 .ndo_open = tlan_open,
836 .ndo_stop = TLan_Close, 916 .ndo_stop = tlan_close,
837 .ndo_start_xmit = TLan_StartTx, 917 .ndo_start_xmit = tlan_start_tx,
838 .ndo_tx_timeout = TLan_tx_timeout, 918 .ndo_tx_timeout = tlan_tx_timeout,
839 .ndo_get_stats = TLan_GetStats, 919 .ndo_get_stats = tlan_get_stats,
840 .ndo_set_multicast_list = TLan_SetMulticastList, 920 .ndo_set_multicast_list = tlan_set_multicast_list,
841 .ndo_do_ioctl = TLan_ioctl, 921 .ndo_do_ioctl = tlan_ioctl,
842 .ndo_change_mtu = eth_change_mtu, 922 .ndo_change_mtu = eth_change_mtu,
843 .ndo_set_mac_address = eth_mac_addr, 923 .ndo_set_mac_address = eth_mac_addr,
844 .ndo_validate_addr = eth_validate_addr, 924 .ndo_validate_addr = eth_validate_addr,
845#ifdef CONFIG_NET_POLL_CONTROLLER 925#ifdef CONFIG_NET_POLL_CONTROLLER
846 .ndo_poll_controller = TLan_Poll, 926 .ndo_poll_controller = tlan_poll,
847#endif 927#endif
848}; 928};
849 929
850 930
851 931
852 /*************************************************************** 932/***************************************************************
853 * TLan_Init 933 * tlan_init
854 * 934 *
855 * Returns: 935 * Returns:
856 * 0 on success, error code otherwise. 936 * 0 on success, error code otherwise.
857 * Parms: 937 * Parms:
858 * dev The structure of the device to be 938 * dev The structure of the device to be
859 * init'ed. 939 * init'ed.
860 * 940 *
861 * This function completes the initialization of the 941 * This function completes the initialization of the
862 * device structure and driver. It reserves the IO 942 * device structure and driver. It reserves the IO
863 * addresses, allocates memory for the lists and bounce 943 * addresses, allocates memory for the lists and bounce
864 * buffers, retrieves the MAC address from the eeprom 944 * buffers, retrieves the MAC address from the eeprom
865 * and assignes the device's methods. 945 * and assignes the device's methods.
866 * 946 *
867 **************************************************************/ 947 **************************************************************/
868 948
869static int TLan_Init( struct net_device *dev ) 949static int tlan_init(struct net_device *dev)
870{ 950{
871 int dma_size; 951 int dma_size;
872 int err; 952 int err;
873 int i; 953 int i;
874 TLanPrivateInfo *priv; 954 struct tlan_priv *priv;
875 955
876 priv = netdev_priv(dev); 956 priv = netdev_priv(dev);
877 957
878 dma_size = ( TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS ) 958 dma_size = (TLAN_NUM_RX_LISTS + TLAN_NUM_TX_LISTS)
879 * ( sizeof(TLanList) ); 959 * (sizeof(struct tlan_list));
880 priv->dmaStorage = pci_alloc_consistent(priv->pciDev, 960 priv->dma_storage = pci_alloc_consistent(priv->pci_dev,
881 dma_size, &priv->dmaStorageDMA); 961 dma_size,
882 priv->dmaSize = dma_size; 962 &priv->dma_storage_dma);
883 963 priv->dma_size = dma_size;
884 if ( priv->dmaStorage == NULL ) { 964
885 printk(KERN_ERR "TLAN: Could not allocate lists and buffers for %s.\n", 965 if (priv->dma_storage == NULL) {
886 dev->name ); 966 printk(KERN_ERR
967 "TLAN: Could not allocate lists and buffers for %s.\n",
968 dev->name);
887 return -ENOMEM; 969 return -ENOMEM;
888 } 970 }
889 memset( priv->dmaStorage, 0, dma_size ); 971 memset(priv->dma_storage, 0, dma_size);
890 priv->rxList = (TLanList *) ALIGN((unsigned long)priv->dmaStorage, 8); 972 priv->rx_list = (struct tlan_list *)
891 priv->rxListDMA = ALIGN(priv->dmaStorageDMA, 8); 973 ALIGN((unsigned long)priv->dma_storage, 8);
892 priv->txList = priv->rxList + TLAN_NUM_RX_LISTS; 974 priv->rx_list_dma = ALIGN(priv->dma_storage_dma, 8);
893 priv->txListDMA = priv->rxListDMA + sizeof(TLanList) * TLAN_NUM_RX_LISTS; 975 priv->tx_list = priv->rx_list + TLAN_NUM_RX_LISTS;
976 priv->tx_list_dma =
977 priv->rx_list_dma + sizeof(struct tlan_list)*TLAN_NUM_RX_LISTS;
894 978
895 err = 0; 979 err = 0;
896 for ( i = 0; i < 6 ; i++ ) 980 for (i = 0; i < 6 ; i++)
897 err |= TLan_EeReadByte( dev, 981 err |= tlan_ee_read_byte(dev,
898 (u8) priv->adapter->addrOfs + i, 982 (u8) priv->adapter->addr_ofs + i,
899 (u8 *) &dev->dev_addr[i] ); 983 (u8 *) &dev->dev_addr[i]);
900 if ( err ) { 984 if (err) {
901 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n", 985 printk(KERN_ERR "TLAN: %s: Error reading MAC from eeprom: %d\n",
902 dev->name, 986 dev->name,
903 err ); 987 err);
904 } 988 }
905 dev->addr_len = 6; 989 dev->addr_len = 6;
906 990
907 netif_carrier_off(dev); 991 netif_carrier_off(dev);
908 992
909 /* Device methods */ 993 /* Device methods */
910 dev->netdev_ops = &TLan_netdev_ops; 994 dev->netdev_ops = &tlan_netdev_ops;
911 dev->watchdog_timeo = TX_TIMEOUT; 995 dev->watchdog_timeo = TX_TIMEOUT;
912 996
913 return 0; 997 return 0;
914 998
915} /* TLan_Init */ 999}
916 1000
917 1001
918 1002
919 1003
920 /*************************************************************** 1004/***************************************************************
921 * TLan_Open 1005 * tlan_open
922 * 1006 *
923 * Returns: 1007 * Returns:
924 * 0 on success, error code otherwise. 1008 * 0 on success, error code otherwise.
925 * Parms: 1009 * Parms:
926 * dev Structure of device to be opened. 1010 * dev Structure of device to be opened.
927 * 1011 *
928 * This routine puts the driver and TLAN adapter in a 1012 * This routine puts the driver and TLAN adapter in a
929 * state where it is ready to send and receive packets. 1013 * state where it is ready to send and receive packets.
930 * It allocates the IRQ, resets and brings the adapter 1014 * It allocates the IRQ, resets and brings the adapter
931 * out of reset, and allows interrupts. It also delays 1015 * out of reset, and allows interrupts. It also delays
932 * the startup for autonegotiation or sends a Rx GO 1016 * the startup for autonegotiation or sends a Rx GO
933 * command to the adapter, as appropriate. 1017 * command to the adapter, as appropriate.
934 * 1018 *
935 **************************************************************/ 1019 **************************************************************/
936 1020
937static int TLan_Open( struct net_device *dev ) 1021static int tlan_open(struct net_device *dev)
938{ 1022{
939 TLanPrivateInfo *priv = netdev_priv(dev); 1023 struct tlan_priv *priv = netdev_priv(dev);
940 int err; 1024 int err;
941 1025
942 priv->tlanRev = TLan_DioRead8( dev->base_addr, TLAN_DEF_REVISION ); 1026 priv->tlan_rev = tlan_dio_read8(dev->base_addr, TLAN_DEF_REVISION);
943 err = request_irq( dev->irq, TLan_HandleInterrupt, IRQF_SHARED, 1027 err = request_irq(dev->irq, tlan_handle_interrupt, IRQF_SHARED,
944 dev->name, dev ); 1028 dev->name, dev);
945 1029
946 if ( err ) { 1030 if (err) {
947 pr_err("TLAN: Cannot open %s because IRQ %d is already in use.\n", 1031 pr_err("TLAN: Cannot open %s because IRQ %d is already in use.\n",
948 dev->name, dev->irq ); 1032 dev->name, dev->irq);
949 return err; 1033 return err;
950 } 1034 }
951 1035
952 init_timer(&priv->timer); 1036 init_timer(&priv->timer);
953 netif_start_queue(dev);
954 1037
955 /* NOTE: It might not be necessary to read the stats before a 1038 tlan_start(dev);
956 reset if you don't care what the values are.
957 */
958 TLan_ResetLists( dev );
959 TLan_ReadAndClearStats( dev, TLAN_IGNORE );
960 TLan_ResetAdapter( dev );
961 1039
962 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n", 1040 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Opened. TLAN Chip Rev: %x\n",
963 dev->name, priv->tlanRev ); 1041 dev->name, priv->tlan_rev);
964 1042
965 return 0; 1043 return 0;
966 1044
967} /* TLan_Open */ 1045}
968 1046
969 1047
970 1048
971 /************************************************************** 1049/**************************************************************
972 * TLan_ioctl 1050 * tlan_ioctl
973 * 1051 *
974 * Returns: 1052 * Returns:
975 * 0 on success, error code otherwise 1053 * 0 on success, error code otherwise
976 * Params: 1054 * Params:
977 * dev structure of device to receive ioctl. 1055 * dev structure of device to receive ioctl.
978 * 1056 *
979 * rq ifreq structure to hold userspace data. 1057 * rq ifreq structure to hold userspace data.
980 * 1058 *
981 * cmd ioctl command. 1059 * cmd ioctl command.
982 * 1060 *
983 * 1061 *
984 *************************************************************/ 1062 *************************************************************/
985 1063
986static int TLan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1064static int tlan_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
987{ 1065{
988 TLanPrivateInfo *priv = netdev_priv(dev); 1066 struct tlan_priv *priv = netdev_priv(dev);
989 struct mii_ioctl_data *data = if_mii(rq); 1067 struct mii_ioctl_data *data = if_mii(rq);
990 u32 phy = priv->phy[priv->phyNum]; 1068 u32 phy = priv->phy[priv->phy_num];
991 1069
992 if (!priv->phyOnline) 1070 if (!priv->phy_online)
993 return -EAGAIN; 1071 return -EAGAIN;
994 1072
995 switch(cmd) { 1073 switch (cmd) {
996 case SIOCGMIIPHY: /* Get address of MII PHY in use. */ 1074 case SIOCGMIIPHY: /* get address of MII PHY in use. */
997 data->phy_id = phy; 1075 data->phy_id = phy;
998 1076
999 1077
1000 case SIOCGMIIREG: /* Read MII PHY register. */ 1078 case SIOCGMIIREG: /* read MII PHY register. */
1001 TLan_MiiReadReg(dev, data->phy_id & 0x1f, 1079 tlan_mii_read_reg(dev, data->phy_id & 0x1f,
1002 data->reg_num & 0x1f, &data->val_out); 1080 data->reg_num & 0x1f, &data->val_out);
1003 return 0; 1081 return 0;
1004 1082
1005 1083
1006 case SIOCSMIIREG: /* Write MII PHY register. */ 1084 case SIOCSMIIREG: /* write MII PHY register. */
1007 TLan_MiiWriteReg(dev, data->phy_id & 0x1f, 1085 tlan_mii_write_reg(dev, data->phy_id & 0x1f,
1008 data->reg_num & 0x1f, data->val_in); 1086 data->reg_num & 0x1f, data->val_in);
1009 return 0; 1087 return 0;
1010 default: 1088 default:
1011 return -EOPNOTSUPP; 1089 return -EOPNOTSUPP;
1012 } 1090 }
1013} /* tlan_ioctl */ 1091}
1014 1092
1015 1093
1016 /*************************************************************** 1094/***************************************************************
1017 * TLan_tx_timeout 1095 * tlan_tx_timeout
1018 * 1096 *
1019 * Returns: nothing 1097 * Returns: nothing
1020 * 1098 *
1021 * Params: 1099 * Params:
1022 * dev structure of device which timed out 1100 * dev structure of device which timed out
1023 * during transmit. 1101 * during transmit.
1024 * 1102 *
1025 **************************************************************/ 1103 **************************************************************/
1026 1104
1027static void TLan_tx_timeout(struct net_device *dev) 1105static void tlan_tx_timeout(struct net_device *dev)
1028{ 1106{
1029 1107
1030 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name); 1108 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Transmit timed out.\n", dev->name);
1031 1109
1032 /* Ok so we timed out, lets see what we can do about it...*/ 1110 /* Ok so we timed out, lets see what we can do about it...*/
1033 TLan_FreeLists( dev ); 1111 tlan_free_lists(dev);
1034 TLan_ResetLists( dev ); 1112 tlan_reset_lists(dev);
1035 TLan_ReadAndClearStats( dev, TLAN_IGNORE ); 1113 tlan_read_and_clear_stats(dev, TLAN_IGNORE);
1036 TLan_ResetAdapter( dev ); 1114 tlan_reset_adapter(dev);
1037 dev->trans_start = jiffies; /* prevent tx timeout */ 1115 dev->trans_start = jiffies; /* prevent tx timeout */
1038 netif_wake_queue( dev ); 1116 netif_wake_queue(dev);
1039 1117
1040} 1118}
1041 1119
1042 1120
1043 /*************************************************************** 1121/***************************************************************
1044 * TLan_tx_timeout_work 1122 * tlan_tx_timeout_work
1045 * 1123 *
1046 * Returns: nothing 1124 * Returns: nothing
1047 * 1125 *
1048 * Params: 1126 * Params:
1049 * work work item of device which timed out 1127 * work work item of device which timed out
1050 * 1128 *
1051 **************************************************************/ 1129 **************************************************************/
1052 1130
1053static void TLan_tx_timeout_work(struct work_struct *work) 1131static void tlan_tx_timeout_work(struct work_struct *work)
1054{ 1132{
1055 TLanPrivateInfo *priv = 1133 struct tlan_priv *priv =
1056 container_of(work, TLanPrivateInfo, tlan_tqueue); 1134 container_of(work, struct tlan_priv, tlan_tqueue);
1057 1135
1058 TLan_tx_timeout(priv->dev); 1136 tlan_tx_timeout(priv->dev);
1059} 1137}
1060 1138
1061 1139
1062 1140
1063 /*************************************************************** 1141/***************************************************************
1064 * TLan_StartTx 1142 * tlan_start_tx
1065 * 1143 *
1066 * Returns: 1144 * Returns:
1067 * 0 on success, non-zero on failure. 1145 * 0 on success, non-zero on failure.
1068 * Parms: 1146 * Parms:
1069 * skb A pointer to the sk_buff containing the 1147 * skb A pointer to the sk_buff containing the
1070 * frame to be sent. 1148 * frame to be sent.
1071 * dev The device to send the data on. 1149 * dev The device to send the data on.
1072 * 1150 *
1073 * This function adds a frame to the Tx list to be sent 1151 * This function adds a frame to the Tx list to be sent
1074 * ASAP. First it verifies that the adapter is ready and 1152 * ASAP. First it verifies that the adapter is ready and
1075 * there is room in the queue. Then it sets up the next 1153 * there is room in the queue. Then it sets up the next
1076 * available list, copies the frame to the corresponding 1154 * available list, copies the frame to the corresponding
1077 * buffer. If the adapter Tx channel is idle, it gives 1155 * buffer. If the adapter Tx channel is idle, it gives
1078 * the adapter a Tx Go command on the list, otherwise it 1156 * the adapter a Tx Go command on the list, otherwise it
1079 * sets the forward address of the previous list to point 1157 * sets the forward address of the previous list to point
1080 * to this one. Then it frees the sk_buff. 1158 * to this one. Then it frees the sk_buff.
1081 * 1159 *
1082 **************************************************************/ 1160 **************************************************************/
1083 1161
1084static netdev_tx_t TLan_StartTx( struct sk_buff *skb, struct net_device *dev ) 1162static netdev_tx_t tlan_start_tx(struct sk_buff *skb, struct net_device *dev)
1085{ 1163{
1086 TLanPrivateInfo *priv = netdev_priv(dev); 1164 struct tlan_priv *priv = netdev_priv(dev);
1087 dma_addr_t tail_list_phys; 1165 dma_addr_t tail_list_phys;
1088 TLanList *tail_list; 1166 struct tlan_list *tail_list;
1089 unsigned long flags; 1167 unsigned long flags;
1090 unsigned int txlen; 1168 unsigned int txlen;
1091 1169
1092 if ( ! priv->phyOnline ) { 1170 if (!priv->phy_online) {
1093 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n", 1171 TLAN_DBG(TLAN_DEBUG_TX, "TRANSMIT: %s PHY is not ready\n",
1094 dev->name ); 1172 dev->name);
1095 dev_kfree_skb_any(skb); 1173 dev_kfree_skb_any(skb);
1096 return NETDEV_TX_OK; 1174 return NETDEV_TX_OK;
1097 } 1175 }
@@ -1100,218 +1178,214 @@ static netdev_tx_t TLan_StartTx( struct sk_buff *skb, struct net_device *dev )
1100 return NETDEV_TX_OK; 1178 return NETDEV_TX_OK;
1101 txlen = max(skb->len, (unsigned int)TLAN_MIN_FRAME_SIZE); 1179 txlen = max(skb->len, (unsigned int)TLAN_MIN_FRAME_SIZE);
1102 1180
1103 tail_list = priv->txList + priv->txTail; 1181 tail_list = priv->tx_list + priv->tx_tail;
1104 tail_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txTail; 1182 tail_list_phys =
1183 priv->tx_list_dma + sizeof(struct tlan_list)*priv->tx_tail;
1105 1184
1106 if ( tail_list->cStat != TLAN_CSTAT_UNUSED ) { 1185 if (tail_list->c_stat != TLAN_CSTAT_UNUSED) {
1107 TLAN_DBG( TLAN_DEBUG_TX, 1186 TLAN_DBG(TLAN_DEBUG_TX,
1108 "TRANSMIT: %s is busy (Head=%d Tail=%d)\n", 1187 "TRANSMIT: %s is busy (Head=%d Tail=%d)\n",
1109 dev->name, priv->txHead, priv->txTail ); 1188 dev->name, priv->tx_head, priv->tx_tail);
1110 netif_stop_queue(dev); 1189 netif_stop_queue(dev);
1111 priv->txBusyCount++; 1190 priv->tx_busy_count++;
1112 return NETDEV_TX_BUSY; 1191 return NETDEV_TX_BUSY;
1113 } 1192 }
1114 1193
1115 tail_list->forward = 0; 1194 tail_list->forward = 0;
1116 1195
1117 tail_list->buffer[0].address = pci_map_single(priv->pciDev, 1196 tail_list->buffer[0].address = pci_map_single(priv->pci_dev,
1118 skb->data, txlen, 1197 skb->data, txlen,
1119 PCI_DMA_TODEVICE); 1198 PCI_DMA_TODEVICE);
1120 TLan_StoreSKB(tail_list, skb); 1199 tlan_store_skb(tail_list, skb);
1121 1200
1122 tail_list->frameSize = (u16) txlen; 1201 tail_list->frame_size = (u16) txlen;
1123 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) txlen; 1202 tail_list->buffer[0].count = TLAN_LAST_BUFFER | (u32) txlen;
1124 tail_list->buffer[1].count = 0; 1203 tail_list->buffer[1].count = 0;
1125 tail_list->buffer[1].address = 0; 1204 tail_list->buffer[1].address = 0;
1126 1205
1127 spin_lock_irqsave(&priv->lock, flags); 1206 spin_lock_irqsave(&priv->lock, flags);
1128 tail_list->cStat = TLAN_CSTAT_READY; 1207 tail_list->c_stat = TLAN_CSTAT_READY;
1129 if ( ! priv->txInProgress ) { 1208 if (!priv->tx_in_progress) {
1130 priv->txInProgress = 1; 1209 priv->tx_in_progress = 1;
1131 TLAN_DBG( TLAN_DEBUG_TX, 1210 TLAN_DBG(TLAN_DEBUG_TX,
1132 "TRANSMIT: Starting TX on buffer %d\n", priv->txTail ); 1211 "TRANSMIT: Starting TX on buffer %d\n",
1133 outl( tail_list_phys, dev->base_addr + TLAN_CH_PARM ); 1212 priv->tx_tail);
1134 outl( TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD ); 1213 outl(tail_list_phys, dev->base_addr + TLAN_CH_PARM);
1214 outl(TLAN_HC_GO, dev->base_addr + TLAN_HOST_CMD);
1135 } else { 1215 } else {
1136 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Adding buffer %d to TX channel\n", 1216 TLAN_DBG(TLAN_DEBUG_TX,
1137 priv->txTail ); 1217 "TRANSMIT: Adding buffer %d to TX channel\n",
1138 if ( priv->txTail == 0 ) { 1218 priv->tx_tail);
1139 ( priv->txList + ( TLAN_NUM_TX_LISTS - 1 ) )->forward 1219 if (priv->tx_tail == 0) {
1220 (priv->tx_list + (TLAN_NUM_TX_LISTS - 1))->forward
1140 = tail_list_phys; 1221 = tail_list_phys;
1141 } else { 1222 } else {
1142 ( priv->txList + ( priv->txTail - 1 ) )->forward 1223 (priv->tx_list + (priv->tx_tail - 1))->forward
1143 = tail_list_phys; 1224 = tail_list_phys;
1144 } 1225 }
1145 } 1226 }
1146 spin_unlock_irqrestore(&priv->lock, flags); 1227 spin_unlock_irqrestore(&priv->lock, flags);
1147 1228
1148 CIRC_INC( priv->txTail, TLAN_NUM_TX_LISTS ); 1229 CIRC_INC(priv->tx_tail, TLAN_NUM_TX_LISTS);
1149 1230
1150 return NETDEV_TX_OK; 1231 return NETDEV_TX_OK;
1151 1232
1152} /* TLan_StartTx */ 1233}
1153 1234
1154 1235
1155 1236
1156 1237
1157 /*************************************************************** 1238/***************************************************************
1158 * TLan_HandleInterrupt 1239 * tlan_handle_interrupt
1159 * 1240 *
1160 * Returns: 1241 * Returns:
1161 * Nothing 1242 * Nothing
1162 * Parms: 1243 * Parms:
1163 * irq The line on which the interrupt 1244 * irq The line on which the interrupt
1164 * occurred. 1245 * occurred.
1165 * dev_id A pointer to the device assigned to 1246 * dev_id A pointer to the device assigned to
1166 * this irq line. 1247 * this irq line.
1167 * 1248 *
1168 * This function handles an interrupt generated by its 1249 * This function handles an interrupt generated by its
1169 * assigned TLAN adapter. The function deactivates 1250 * assigned TLAN adapter. The function deactivates
1170 * interrupts on its adapter, records the type of 1251 * interrupts on its adapter, records the type of
1171 * interrupt, executes the appropriate subhandler, and 1252 * interrupt, executes the appropriate subhandler, and
1172 * acknowdges the interrupt to the adapter (thus 1253 * acknowdges the interrupt to the adapter (thus
1173 * re-enabling adapter interrupts. 1254 * re-enabling adapter interrupts.
1174 * 1255 *
1175 **************************************************************/ 1256 **************************************************************/
1176 1257
1177static irqreturn_t TLan_HandleInterrupt(int irq, void *dev_id) 1258static irqreturn_t tlan_handle_interrupt(int irq, void *dev_id)
1178{ 1259{
1179 struct net_device *dev = dev_id; 1260 struct net_device *dev = dev_id;
1180 TLanPrivateInfo *priv = netdev_priv(dev); 1261 struct tlan_priv *priv = netdev_priv(dev);
1181 u16 host_int; 1262 u16 host_int;
1182 u16 type; 1263 u16 type;
1183 1264
1184 spin_lock(&priv->lock); 1265 spin_lock(&priv->lock);
1185 1266
1186 host_int = inw( dev->base_addr + TLAN_HOST_INT ); 1267 host_int = inw(dev->base_addr + TLAN_HOST_INT);
1187 type = ( host_int & TLAN_HI_IT_MASK ) >> 2; 1268 type = (host_int & TLAN_HI_IT_MASK) >> 2;
1188 if ( type ) { 1269 if (type) {
1189 u32 ack; 1270 u32 ack;
1190 u32 host_cmd; 1271 u32 host_cmd;
1191 1272
1192 outw( host_int, dev->base_addr + TLAN_HOST_INT ); 1273 outw(host_int, dev->base_addr + TLAN_HOST_INT);
1193 ack = TLanIntVector[type]( dev, host_int ); 1274 ack = tlan_int_vector[type](dev, host_int);
1194 1275
1195 if ( ack ) { 1276 if (ack) {
1196 host_cmd = TLAN_HC_ACK | ack | ( type << 18 ); 1277 host_cmd = TLAN_HC_ACK | ack | (type << 18);
1197 outl( host_cmd, dev->base_addr + TLAN_HOST_CMD ); 1278 outl(host_cmd, dev->base_addr + TLAN_HOST_CMD);
1198 } 1279 }
1199 } 1280 }
1200 1281
1201 spin_unlock(&priv->lock); 1282 spin_unlock(&priv->lock);
1202 1283
1203 return IRQ_RETVAL(type); 1284 return IRQ_RETVAL(type);
1204} /* TLan_HandleInterrupts */ 1285}
1205 1286
1206 1287
1207 1288
1208 1289
1209 /*************************************************************** 1290/***************************************************************
1210 * TLan_Close 1291 * tlan_close
1211 * 1292 *
1212 * Returns: 1293 * Returns:
1213 * An error code. 1294 * An error code.
1214 * Parms: 1295 * Parms:
1215 * dev The device structure of the device to 1296 * dev The device structure of the device to
1216 * close. 1297 * close.
1217 * 1298 *
1218 * This function shuts down the adapter. It records any 1299 * This function shuts down the adapter. It records any
1219 * stats, puts the adapter into reset state, deactivates 1300 * stats, puts the adapter into reset state, deactivates
1220 * its time as needed, and frees the irq it is using. 1301 * its time as needed, and frees the irq it is using.
1221 * 1302 *
1222 **************************************************************/ 1303 **************************************************************/
1223 1304
1224static int TLan_Close(struct net_device *dev) 1305static int tlan_close(struct net_device *dev)
1225{ 1306{
1226 TLanPrivateInfo *priv = netdev_priv(dev); 1307 struct tlan_priv *priv = netdev_priv(dev);
1227 1308
1228 netif_stop_queue(dev);
1229 priv->neg_be_verbose = 0; 1309 priv->neg_be_verbose = 0;
1310 tlan_stop(dev);
1230 1311
1231 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 1312 free_irq(dev->irq, dev);
1232 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD ); 1313 tlan_free_lists(dev);
1233 if ( priv->timer.function != NULL ) { 1314 TLAN_DBG(TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name);
1234 del_timer_sync( &priv->timer );
1235 priv->timer.function = NULL;
1236 }
1237
1238 free_irq( dev->irq, dev );
1239 TLan_FreeLists( dev );
1240 TLAN_DBG( TLAN_DEBUG_GNRL, "Device %s closed.\n", dev->name );
1241 1315
1242 return 0; 1316 return 0;
1243 1317
1244} /* TLan_Close */ 1318}
1245 1319
1246 1320
1247 1321
1248 1322
1249 /*************************************************************** 1323/***************************************************************
1250 * TLan_GetStats 1324 * tlan_get_stats
1251 * 1325 *
1252 * Returns: 1326 * Returns:
1253 * A pointer to the device's statistics structure. 1327 * A pointer to the device's statistics structure.
1254 * Parms: 1328 * Parms:
1255 * dev The device structure to return the 1329 * dev The device structure to return the
1256 * stats for. 1330 * stats for.
1257 * 1331 *
1258 * This function updates the devices statistics by reading 1332 * This function updates the devices statistics by reading
1259 * the TLAN chip's onboard registers. Then it returns the 1333 * the TLAN chip's onboard registers. Then it returns the
1260 * address of the statistics structure. 1334 * address of the statistics structure.
1261 * 1335 *
1262 **************************************************************/ 1336 **************************************************************/
1263 1337
1264static struct net_device_stats *TLan_GetStats( struct net_device *dev ) 1338static struct net_device_stats *tlan_get_stats(struct net_device *dev)
1265{ 1339{
1266 TLanPrivateInfo *priv = netdev_priv(dev); 1340 struct tlan_priv *priv = netdev_priv(dev);
1267 int i; 1341 int i;
1268 1342
1269 /* Should only read stats if open ? */ 1343 /* Should only read stats if open ? */
1270 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 1344 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1271 1345
1272 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name, 1346 TLAN_DBG(TLAN_DEBUG_RX, "RECEIVE: %s EOC count = %d\n", dev->name,
1273 priv->rxEocCount ); 1347 priv->rx_eoc_count);
1274 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name, 1348 TLAN_DBG(TLAN_DEBUG_TX, "TRANSMIT: %s Busy count = %d\n", dev->name,
1275 priv->txBusyCount ); 1349 priv->tx_busy_count);
1276 if ( debug & TLAN_DEBUG_GNRL ) { 1350 if (debug & TLAN_DEBUG_GNRL) {
1277 TLan_PrintDio( dev->base_addr ); 1351 tlan_print_dio(dev->base_addr);
1278 TLan_PhyPrint( dev ); 1352 tlan_phy_print(dev);
1279 } 1353 }
1280 if ( debug & TLAN_DEBUG_LIST ) { 1354 if (debug & TLAN_DEBUG_LIST) {
1281 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) 1355 for (i = 0; i < TLAN_NUM_RX_LISTS; i++)
1282 TLan_PrintList( priv->rxList + i, "RX", i ); 1356 tlan_print_list(priv->rx_list + i, "RX", i);
1283 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) 1357 for (i = 0; i < TLAN_NUM_TX_LISTS; i++)
1284 TLan_PrintList( priv->txList + i, "TX", i ); 1358 tlan_print_list(priv->tx_list + i, "TX", i);
1285 } 1359 }
1286 1360
1287 return &dev->stats; 1361 return &dev->stats;
1288 1362
1289} /* TLan_GetStats */ 1363}
1290 1364
1291 1365
1292 1366
1293 1367
1294 /*************************************************************** 1368/***************************************************************
1295 * TLan_SetMulticastList 1369 * tlan_set_multicast_list
1296 * 1370 *
1297 * Returns: 1371 * Returns:
1298 * Nothing 1372 * Nothing
1299 * Parms: 1373 * Parms:
1300 * dev The device structure to set the 1374 * dev The device structure to set the
1301 * multicast list for. 1375 * multicast list for.
1302 * 1376 *
1303 * This function sets the TLAN adaptor to various receive 1377 * This function sets the TLAN adaptor to various receive
1304 * modes. If the IFF_PROMISC flag is set, promiscuous 1378 * modes. If the IFF_PROMISC flag is set, promiscuous
1305 * mode is acitviated. Otherwise, promiscuous mode is 1379 * mode is acitviated. Otherwise, promiscuous mode is
1306 * turned off. If the IFF_ALLMULTI flag is set, then 1380 * turned off. If the IFF_ALLMULTI flag is set, then
1307 * the hash table is set to receive all group addresses. 1381 * the hash table is set to receive all group addresses.
1308 * Otherwise, the first three multicast addresses are 1382 * Otherwise, the first three multicast addresses are
1309 * stored in AREG_1-3, and the rest are selected via the 1383 * stored in AREG_1-3, and the rest are selected via the
1310 * hash table, as necessary. 1384 * hash table, as necessary.
1311 * 1385 *
1312 **************************************************************/ 1386 **************************************************************/
1313 1387
1314static void TLan_SetMulticastList( struct net_device *dev ) 1388static void tlan_set_multicast_list(struct net_device *dev)
1315{ 1389{
1316 struct netdev_hw_addr *ha; 1390 struct netdev_hw_addr *ha;
1317 u32 hash1 = 0; 1391 u32 hash1 = 0;
@@ -1320,53 +1394,56 @@ static void TLan_SetMulticastList( struct net_device *dev )
1320 u32 offset; 1394 u32 offset;
1321 u8 tmp; 1395 u8 tmp;
1322 1396
1323 if ( dev->flags & IFF_PROMISC ) { 1397 if (dev->flags & IFF_PROMISC) {
1324 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD ); 1398 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD);
1325 TLan_DioWrite8( dev->base_addr, 1399 tlan_dio_write8(dev->base_addr,
1326 TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF ); 1400 TLAN_NET_CMD, tmp | TLAN_NET_CMD_CAF);
1327 } else { 1401 } else {
1328 tmp = TLan_DioRead8( dev->base_addr, TLAN_NET_CMD ); 1402 tmp = tlan_dio_read8(dev->base_addr, TLAN_NET_CMD);
1329 TLan_DioWrite8( dev->base_addr, 1403 tlan_dio_write8(dev->base_addr,
1330 TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF ); 1404 TLAN_NET_CMD, tmp & ~TLAN_NET_CMD_CAF);
1331 if ( dev->flags & IFF_ALLMULTI ) { 1405 if (dev->flags & IFF_ALLMULTI) {
1332 for ( i = 0; i < 3; i++ ) 1406 for (i = 0; i < 3; i++)
1333 TLan_SetMac( dev, i + 1, NULL ); 1407 tlan_set_mac(dev, i + 1, NULL);
1334 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, 0xFFFFFFFF ); 1408 tlan_dio_write32(dev->base_addr, TLAN_HASH_1,
1335 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, 0xFFFFFFFF ); 1409 0xffffffff);
1410 tlan_dio_write32(dev->base_addr, TLAN_HASH_2,
1411 0xffffffff);
1336 } else { 1412 } else {
1337 i = 0; 1413 i = 0;
1338 netdev_for_each_mc_addr(ha, dev) { 1414 netdev_for_each_mc_addr(ha, dev) {
1339 if ( i < 3 ) { 1415 if (i < 3) {
1340 TLan_SetMac( dev, i + 1, 1416 tlan_set_mac(dev, i + 1,
1341 (char *) &ha->addr); 1417 (char *) &ha->addr);
1342 } else { 1418 } else {
1343 offset = TLan_HashFunc((u8 *)&ha->addr); 1419 offset =
1344 if ( offset < 32 ) 1420 tlan_hash_func((u8 *)&ha->addr);
1345 hash1 |= ( 1 << offset ); 1421 if (offset < 32)
1422 hash1 |= (1 << offset);
1346 else 1423 else
1347 hash2 |= ( 1 << ( offset - 32 ) ); 1424 hash2 |= (1 << (offset - 32));
1348 } 1425 }
1349 i++; 1426 i++;
1350 } 1427 }
1351 for ( ; i < 3; i++ ) 1428 for ( ; i < 3; i++)
1352 TLan_SetMac( dev, i + 1, NULL ); 1429 tlan_set_mac(dev, i + 1, NULL);
1353 TLan_DioWrite32( dev->base_addr, TLAN_HASH_1, hash1 ); 1430 tlan_dio_write32(dev->base_addr, TLAN_HASH_1, hash1);
1354 TLan_DioWrite32( dev->base_addr, TLAN_HASH_2, hash2 ); 1431 tlan_dio_write32(dev->base_addr, TLAN_HASH_2, hash2);
1355 } 1432 }
1356 } 1433 }
1357 1434
1358} /* TLan_SetMulticastList */ 1435}
1359 1436
1360 1437
1361 1438
1362/***************************************************************************** 1439/*****************************************************************************
1363****************************************************************************** 1440******************************************************************************
1364 1441
1365 ThunderLAN Driver Interrupt Vectors and Table 1442ThunderLAN driver interrupt vectors and table
1366 1443
1367 Please see Chap. 4, "Interrupt Handling" of the "ThunderLAN 1444please see chap. 4, "Interrupt Handling" of the "ThunderLAN
1368 Programmer's Guide" for more informations on handling interrupts 1445Programmer's Guide" for more informations on handling interrupts
1369 generated by TLAN based adapters. 1446generated by TLAN based adapters.
1370 1447
1371****************************************************************************** 1448******************************************************************************
1372*****************************************************************************/ 1449*****************************************************************************/
@@ -1374,46 +1451,48 @@ static void TLan_SetMulticastList( struct net_device *dev )
1374 1451
1375 1452
1376 1453
1377 /*************************************************************** 1454/***************************************************************
1378 * TLan_HandleTxEOF 1455 * tlan_handle_tx_eof
1379 * 1456 *
1380 * Returns: 1457 * Returns:
1381 * 1 1458 * 1
1382 * Parms: 1459 * Parms:
1383 * dev Device assigned the IRQ that was 1460 * dev Device assigned the IRQ that was
1384 * raised. 1461 * raised.
1385 * host_int The contents of the HOST_INT 1462 * host_int The contents of the HOST_INT
1386 * port. 1463 * port.
1387 * 1464 *
1388 * This function handles Tx EOF interrupts which are raised 1465 * This function handles Tx EOF interrupts which are raised
1389 * by the adapter when it has completed sending the 1466 * by the adapter when it has completed sending the
1390 * contents of a buffer. If detemines which list/buffer 1467 * contents of a buffer. If detemines which list/buffer
1391 * was completed and resets it. If the buffer was the last 1468 * was completed and resets it. If the buffer was the last
1392 * in the channel (EOC), then the function checks to see if 1469 * in the channel (EOC), then the function checks to see if
1393 * another buffer is ready to send, and if so, sends a Tx 1470 * another buffer is ready to send, and if so, sends a Tx
1394 * Go command. Finally, the driver activates/continues the 1471 * Go command. Finally, the driver activates/continues the
1395 * activity LED. 1472 * activity LED.
1396 * 1473 *
1397 **************************************************************/ 1474 **************************************************************/
1398 1475
1399static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int ) 1476static u32 tlan_handle_tx_eof(struct net_device *dev, u16 host_int)
1400{ 1477{
1401 TLanPrivateInfo *priv = netdev_priv(dev); 1478 struct tlan_priv *priv = netdev_priv(dev);
1402 int eoc = 0; 1479 int eoc = 0;
1403 TLanList *head_list; 1480 struct tlan_list *head_list;
1404 dma_addr_t head_list_phys; 1481 dma_addr_t head_list_phys;
1405 u32 ack = 0; 1482 u32 ack = 0;
1406 u16 tmpCStat; 1483 u16 tmp_c_stat;
1407 1484
1408 TLAN_DBG( TLAN_DEBUG_TX, "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n", 1485 TLAN_DBG(TLAN_DEBUG_TX,
1409 priv->txHead, priv->txTail ); 1486 "TRANSMIT: Handling TX EOF (Head=%d Tail=%d)\n",
1410 head_list = priv->txList + priv->txHead; 1487 priv->tx_head, priv->tx_tail);
1488 head_list = priv->tx_list + priv->tx_head;
1411 1489
1412 while (((tmpCStat = head_list->cStat ) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) { 1490 while (((tmp_c_stat = head_list->c_stat) & TLAN_CSTAT_FRM_CMP)
1413 struct sk_buff *skb = TLan_GetSKB(head_list); 1491 && (ack < 255)) {
1492 struct sk_buff *skb = tlan_get_skb(head_list);
1414 1493
1415 ack++; 1494 ack++;
1416 pci_unmap_single(priv->pciDev, head_list->buffer[0].address, 1495 pci_unmap_single(priv->pci_dev, head_list->buffer[0].address,
1417 max(skb->len, 1496 max(skb->len,
1418 (unsigned int)TLAN_MIN_FRAME_SIZE), 1497 (unsigned int)TLAN_MIN_FRAME_SIZE),
1419 PCI_DMA_TODEVICE); 1498 PCI_DMA_TODEVICE);
@@ -1421,304 +1500,311 @@ static u32 TLan_HandleTxEOF( struct net_device *dev, u16 host_int )
1421 head_list->buffer[8].address = 0; 1500 head_list->buffer[8].address = 0;
1422 head_list->buffer[9].address = 0; 1501 head_list->buffer[9].address = 0;
1423 1502
1424 if ( tmpCStat & TLAN_CSTAT_EOC ) 1503 if (tmp_c_stat & TLAN_CSTAT_EOC)
1425 eoc = 1; 1504 eoc = 1;
1426 1505
1427 dev->stats.tx_bytes += head_list->frameSize; 1506 dev->stats.tx_bytes += head_list->frame_size;
1428 1507
1429 head_list->cStat = TLAN_CSTAT_UNUSED; 1508 head_list->c_stat = TLAN_CSTAT_UNUSED;
1430 netif_start_queue(dev); 1509 netif_start_queue(dev);
1431 CIRC_INC( priv->txHead, TLAN_NUM_TX_LISTS ); 1510 CIRC_INC(priv->tx_head, TLAN_NUM_TX_LISTS);
1432 head_list = priv->txList + priv->txHead; 1511 head_list = priv->tx_list + priv->tx_head;
1433 } 1512 }
1434 1513
1435 if (!ack) 1514 if (!ack)
1436 printk(KERN_INFO "TLAN: Received interrupt for uncompleted TX frame.\n"); 1515 printk(KERN_INFO
1437 1516 "TLAN: Received interrupt for uncompleted TX frame.\n");
1438 if ( eoc ) { 1517
1439 TLAN_DBG( TLAN_DEBUG_TX, 1518 if (eoc) {
1440 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d)\n", 1519 TLAN_DBG(TLAN_DEBUG_TX,
1441 priv->txHead, priv->txTail ); 1520 "TRANSMIT: handling TX EOC (Head=%d Tail=%d)\n",
1442 head_list = priv->txList + priv->txHead; 1521 priv->tx_head, priv->tx_tail);
1443 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead; 1522 head_list = priv->tx_list + priv->tx_head;
1444 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) { 1523 head_list_phys = priv->tx_list_dma
1445 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM ); 1524 + sizeof(struct tlan_list)*priv->tx_head;
1525 if (head_list->c_stat & TLAN_CSTAT_READY) {
1526 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1446 ack |= TLAN_HC_GO; 1527 ack |= TLAN_HC_GO;
1447 } else { 1528 } else {
1448 priv->txInProgress = 0; 1529 priv->tx_in_progress = 0;
1449 } 1530 }
1450 } 1531 }
1451 1532
1452 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) { 1533 if (priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED) {
1453 TLan_DioWrite8( dev->base_addr, 1534 tlan_dio_write8(dev->base_addr,
1454 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT ); 1535 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT);
1455 if ( priv->timer.function == NULL ) { 1536 if (priv->timer.function == NULL) {
1456 priv->timer.function = TLan_Timer; 1537 priv->timer.function = tlan_timer;
1457 priv->timer.data = (unsigned long) dev; 1538 priv->timer.data = (unsigned long) dev;
1458 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY; 1539 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1459 priv->timerSetAt = jiffies; 1540 priv->timer_set_at = jiffies;
1460 priv->timerType = TLAN_TIMER_ACTIVITY; 1541 priv->timer_type = TLAN_TIMER_ACTIVITY;
1461 add_timer(&priv->timer); 1542 add_timer(&priv->timer);
1462 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) { 1543 } else if (priv->timer_type == TLAN_TIMER_ACTIVITY) {
1463 priv->timerSetAt = jiffies; 1544 priv->timer_set_at = jiffies;
1464 } 1545 }
1465 } 1546 }
1466 1547
1467 return ack; 1548 return ack;
1468 1549
1469} /* TLan_HandleTxEOF */ 1550}
1470 1551
1471 1552
1472 1553
1473 1554
1474 /*************************************************************** 1555/***************************************************************
1475 * TLan_HandleStatOverflow 1556 * TLan_HandleStatOverflow
1476 * 1557 *
1477 * Returns: 1558 * Returns:
1478 * 1 1559 * 1
1479 * Parms: 1560 * Parms:
1480 * dev Device assigned the IRQ that was 1561 * dev Device assigned the IRQ that was
1481 * raised. 1562 * raised.
1482 * host_int The contents of the HOST_INT 1563 * host_int The contents of the HOST_INT
1483 * port. 1564 * port.
1484 * 1565 *
1485 * This function handles the Statistics Overflow interrupt 1566 * This function handles the Statistics Overflow interrupt
1486 * which means that one or more of the TLAN statistics 1567 * which means that one or more of the TLAN statistics
1487 * registers has reached 1/2 capacity and needs to be read. 1568 * registers has reached 1/2 capacity and needs to be read.
1488 * 1569 *
1489 **************************************************************/ 1570 **************************************************************/
1490 1571
1491static u32 TLan_HandleStatOverflow( struct net_device *dev, u16 host_int ) 1572static u32 tlan_handle_stat_overflow(struct net_device *dev, u16 host_int)
1492{ 1573{
1493 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 1574 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1494 1575
1495 return 1; 1576 return 1;
1496 1577
1497} /* TLan_HandleStatOverflow */ 1578}
1498 1579
1499 1580
1500 1581
1501 1582
1502 /*************************************************************** 1583/***************************************************************
1503 * TLan_HandleRxEOF 1584 * TLan_HandleRxEOF
1504 * 1585 *
1505 * Returns: 1586 * Returns:
1506 * 1 1587 * 1
1507 * Parms: 1588 * Parms:
1508 * dev Device assigned the IRQ that was 1589 * dev Device assigned the IRQ that was
1509 * raised. 1590 * raised.
1510 * host_int The contents of the HOST_INT 1591 * host_int The contents of the HOST_INT
1511 * port. 1592 * port.
1512 * 1593 *
1513 * This function handles the Rx EOF interrupt which 1594 * This function handles the Rx EOF interrupt which
1514 * indicates a frame has been received by the adapter from 1595 * indicates a frame has been received by the adapter from
1515 * the net and the frame has been transferred to memory. 1596 * the net and the frame has been transferred to memory.
1516 * The function determines the bounce buffer the frame has 1597 * The function determines the bounce buffer the frame has
1517 * been loaded into, creates a new sk_buff big enough to 1598 * been loaded into, creates a new sk_buff big enough to
1518 * hold the frame, and sends it to protocol stack. It 1599 * hold the frame, and sends it to protocol stack. It
1519 * then resets the used buffer and appends it to the end 1600 * then resets the used buffer and appends it to the end
1520 * of the list. If the frame was the last in the Rx 1601 * of the list. If the frame was the last in the Rx
1521 * channel (EOC), the function restarts the receive channel 1602 * channel (EOC), the function restarts the receive channel
1522 * by sending an Rx Go command to the adapter. Then it 1603 * by sending an Rx Go command to the adapter. Then it
1523 * activates/continues the activity LED. 1604 * activates/continues the activity LED.
1524 * 1605 *
1525 **************************************************************/ 1606 **************************************************************/
1526 1607
1527static u32 TLan_HandleRxEOF( struct net_device *dev, u16 host_int ) 1608static u32 tlan_handle_rx_eof(struct net_device *dev, u16 host_int)
1528{ 1609{
1529 TLanPrivateInfo *priv = netdev_priv(dev); 1610 struct tlan_priv *priv = netdev_priv(dev);
1530 u32 ack = 0; 1611 u32 ack = 0;
1531 int eoc = 0; 1612 int eoc = 0;
1532 TLanList *head_list; 1613 struct tlan_list *head_list;
1533 struct sk_buff *skb; 1614 struct sk_buff *skb;
1534 TLanList *tail_list; 1615 struct tlan_list *tail_list;
1535 u16 tmpCStat; 1616 u16 tmp_c_stat;
1536 dma_addr_t head_list_phys; 1617 dma_addr_t head_list_phys;
1537 1618
1538 TLAN_DBG( TLAN_DEBUG_RX, "RECEIVE: Handling RX EOF (Head=%d Tail=%d)\n", 1619 TLAN_DBG(TLAN_DEBUG_RX, "RECEIVE: handling RX EOF (Head=%d Tail=%d)\n",
1539 priv->rxHead, priv->rxTail ); 1620 priv->rx_head, priv->rx_tail);
1540 head_list = priv->rxList + priv->rxHead; 1621 head_list = priv->rx_list + priv->rx_head;
1541 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead; 1622 head_list_phys =
1623 priv->rx_list_dma + sizeof(struct tlan_list)*priv->rx_head;
1542 1624
1543 while (((tmpCStat = head_list->cStat) & TLAN_CSTAT_FRM_CMP) && (ack < 255)) { 1625 while (((tmp_c_stat = head_list->c_stat) & TLAN_CSTAT_FRM_CMP)
1544 dma_addr_t frameDma = head_list->buffer[0].address; 1626 && (ack < 255)) {
1545 u32 frameSize = head_list->frameSize; 1627 dma_addr_t frame_dma = head_list->buffer[0].address;
1628 u32 frame_size = head_list->frame_size;
1546 struct sk_buff *new_skb; 1629 struct sk_buff *new_skb;
1547 1630
1548 ack++; 1631 ack++;
1549 if (tmpCStat & TLAN_CSTAT_EOC) 1632 if (tmp_c_stat & TLAN_CSTAT_EOC)
1550 eoc = 1; 1633 eoc = 1;
1551 1634
1552 new_skb = netdev_alloc_skb_ip_align(dev, 1635 new_skb = netdev_alloc_skb_ip_align(dev,
1553 TLAN_MAX_FRAME_SIZE + 5); 1636 TLAN_MAX_FRAME_SIZE + 5);
1554 if ( !new_skb ) 1637 if (!new_skb)
1555 goto drop_and_reuse; 1638 goto drop_and_reuse;
1556 1639
1557 skb = TLan_GetSKB(head_list); 1640 skb = tlan_get_skb(head_list);
1558 pci_unmap_single(priv->pciDev, frameDma, 1641 pci_unmap_single(priv->pci_dev, frame_dma,
1559 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE); 1642 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1560 skb_put( skb, frameSize ); 1643 skb_put(skb, frame_size);
1561 1644
1562 dev->stats.rx_bytes += frameSize; 1645 dev->stats.rx_bytes += frame_size;
1563 1646
1564 skb->protocol = eth_type_trans( skb, dev ); 1647 skb->protocol = eth_type_trans(skb, dev);
1565 netif_rx( skb ); 1648 netif_rx(skb);
1566 1649
1567 head_list->buffer[0].address = pci_map_single(priv->pciDev, 1650 head_list->buffer[0].address =
1568 new_skb->data, 1651 pci_map_single(priv->pci_dev, new_skb->data,
1569 TLAN_MAX_FRAME_SIZE, 1652 TLAN_MAX_FRAME_SIZE, PCI_DMA_FROMDEVICE);
1570 PCI_DMA_FROMDEVICE);
1571 1653
1572 TLan_StoreSKB(head_list, new_skb); 1654 tlan_store_skb(head_list, new_skb);
1573drop_and_reuse: 1655drop_and_reuse:
1574 head_list->forward = 0; 1656 head_list->forward = 0;
1575 head_list->cStat = 0; 1657 head_list->c_stat = 0;
1576 tail_list = priv->rxList + priv->rxTail; 1658 tail_list = priv->rx_list + priv->rx_tail;
1577 tail_list->forward = head_list_phys; 1659 tail_list->forward = head_list_phys;
1578 1660
1579 CIRC_INC( priv->rxHead, TLAN_NUM_RX_LISTS ); 1661 CIRC_INC(priv->rx_head, TLAN_NUM_RX_LISTS);
1580 CIRC_INC( priv->rxTail, TLAN_NUM_RX_LISTS ); 1662 CIRC_INC(priv->rx_tail, TLAN_NUM_RX_LISTS);
1581 head_list = priv->rxList + priv->rxHead; 1663 head_list = priv->rx_list + priv->rx_head;
1582 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead; 1664 head_list_phys = priv->rx_list_dma
1665 + sizeof(struct tlan_list)*priv->rx_head;
1583 } 1666 }
1584 1667
1585 if (!ack) 1668 if (!ack)
1586 printk(KERN_INFO "TLAN: Received interrupt for uncompleted RX frame.\n"); 1669 printk(KERN_INFO
1587 1670 "TLAN: Received interrupt for uncompleted RX frame.\n");
1588 1671
1589 if ( eoc ) { 1672
1590 TLAN_DBG( TLAN_DEBUG_RX, 1673 if (eoc) {
1591 "RECEIVE: Handling RX EOC (Head=%d Tail=%d)\n", 1674 TLAN_DBG(TLAN_DEBUG_RX,
1592 priv->rxHead, priv->rxTail ); 1675 "RECEIVE: handling RX EOC (Head=%d Tail=%d)\n",
1593 head_list = priv->rxList + priv->rxHead; 1676 priv->rx_head, priv->rx_tail);
1594 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead; 1677 head_list = priv->rx_list + priv->rx_head;
1595 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM ); 1678 head_list_phys = priv->rx_list_dma
1679 + sizeof(struct tlan_list)*priv->rx_head;
1680 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1596 ack |= TLAN_HC_GO | TLAN_HC_RT; 1681 ack |= TLAN_HC_GO | TLAN_HC_RT;
1597 priv->rxEocCount++; 1682 priv->rx_eoc_count++;
1598 } 1683 }
1599 1684
1600 if ( priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED ) { 1685 if (priv->adapter->flags & TLAN_ADAPTER_ACTIVITY_LED) {
1601 TLan_DioWrite8( dev->base_addr, 1686 tlan_dio_write8(dev->base_addr,
1602 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT ); 1687 TLAN_LED_REG, TLAN_LED_LINK | TLAN_LED_ACT);
1603 if ( priv->timer.function == NULL ) { 1688 if (priv->timer.function == NULL) {
1604 priv->timer.function = TLan_Timer; 1689 priv->timer.function = tlan_timer;
1605 priv->timer.data = (unsigned long) dev; 1690 priv->timer.data = (unsigned long) dev;
1606 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY; 1691 priv->timer.expires = jiffies + TLAN_TIMER_ACT_DELAY;
1607 priv->timerSetAt = jiffies; 1692 priv->timer_set_at = jiffies;
1608 priv->timerType = TLAN_TIMER_ACTIVITY; 1693 priv->timer_type = TLAN_TIMER_ACTIVITY;
1609 add_timer(&priv->timer); 1694 add_timer(&priv->timer);
1610 } else if ( priv->timerType == TLAN_TIMER_ACTIVITY ) { 1695 } else if (priv->timer_type == TLAN_TIMER_ACTIVITY) {
1611 priv->timerSetAt = jiffies; 1696 priv->timer_set_at = jiffies;
1612 } 1697 }
1613 } 1698 }
1614 1699
1615 return ack; 1700 return ack;
1616 1701
1617} /* TLan_HandleRxEOF */ 1702}
1618 1703
1619 1704
1620 1705
1621 1706
1622 /*************************************************************** 1707/***************************************************************
1623 * TLan_HandleDummy 1708 * tlan_handle_dummy
1624 * 1709 *
1625 * Returns: 1710 * Returns:
1626 * 1 1711 * 1
1627 * Parms: 1712 * Parms:
1628 * dev Device assigned the IRQ that was 1713 * dev Device assigned the IRQ that was
1629 * raised. 1714 * raised.
1630 * host_int The contents of the HOST_INT 1715 * host_int The contents of the HOST_INT
1631 * port. 1716 * port.
1632 * 1717 *
1633 * This function handles the Dummy interrupt, which is 1718 * This function handles the Dummy interrupt, which is
1634 * raised whenever a test interrupt is generated by setting 1719 * raised whenever a test interrupt is generated by setting
1635 * the Req_Int bit of HOST_CMD to 1. 1720 * the Req_Int bit of HOST_CMD to 1.
1636 * 1721 *
1637 **************************************************************/ 1722 **************************************************************/
1638 1723
1639static u32 TLan_HandleDummy( struct net_device *dev, u16 host_int ) 1724static u32 tlan_handle_dummy(struct net_device *dev, u16 host_int)
1640{ 1725{
1641 printk( "TLAN: Test interrupt on %s.\n", dev->name ); 1726 pr_info("TLAN: Test interrupt on %s.\n", dev->name);
1642 return 1; 1727 return 1;
1643 1728
1644} /* TLan_HandleDummy */ 1729}
1645 1730
1646 1731
1647 1732
1648 1733
1649 /*************************************************************** 1734/***************************************************************
1650 * TLan_HandleTxEOC 1735 * tlan_handle_tx_eoc
1651 * 1736 *
1652 * Returns: 1737 * Returns:
1653 * 1 1738 * 1
1654 * Parms: 1739 * Parms:
1655 * dev Device assigned the IRQ that was 1740 * dev Device assigned the IRQ that was
1656 * raised. 1741 * raised.
1657 * host_int The contents of the HOST_INT 1742 * host_int The contents of the HOST_INT
1658 * port. 1743 * port.
1659 * 1744 *
1660 * This driver is structured to determine EOC occurrences by 1745 * This driver is structured to determine EOC occurrences by
1661 * reading the CSTAT member of the list structure. Tx EOC 1746 * reading the CSTAT member of the list structure. Tx EOC
1662 * interrupts are disabled via the DIO INTDIS register. 1747 * interrupts are disabled via the DIO INTDIS register.
1663 * However, TLAN chips before revision 3.0 didn't have this 1748 * However, TLAN chips before revision 3.0 didn't have this
1664 * functionality, so process EOC events if this is the 1749 * functionality, so process EOC events if this is the
1665 * case. 1750 * case.
1666 * 1751 *
1667 **************************************************************/ 1752 **************************************************************/
1668 1753
1669static u32 TLan_HandleTxEOC( struct net_device *dev, u16 host_int ) 1754static u32 tlan_handle_tx_eoc(struct net_device *dev, u16 host_int)
1670{ 1755{
1671 TLanPrivateInfo *priv = netdev_priv(dev); 1756 struct tlan_priv *priv = netdev_priv(dev);
1672 TLanList *head_list; 1757 struct tlan_list *head_list;
1673 dma_addr_t head_list_phys; 1758 dma_addr_t head_list_phys;
1674 u32 ack = 1; 1759 u32 ack = 1;
1675 1760
1676 host_int = 0; 1761 host_int = 0;
1677 if ( priv->tlanRev < 0x30 ) { 1762 if (priv->tlan_rev < 0x30) {
1678 TLAN_DBG( TLAN_DEBUG_TX, 1763 TLAN_DBG(TLAN_DEBUG_TX,
1679 "TRANSMIT: Handling TX EOC (Head=%d Tail=%d) -- IRQ\n", 1764 "TRANSMIT: handling TX EOC (Head=%d Tail=%d) -- IRQ\n",
1680 priv->txHead, priv->txTail ); 1765 priv->tx_head, priv->tx_tail);
1681 head_list = priv->txList + priv->txHead; 1766 head_list = priv->tx_list + priv->tx_head;
1682 head_list_phys = priv->txListDMA + sizeof(TLanList) * priv->txHead; 1767 head_list_phys = priv->tx_list_dma
1683 if ( ( head_list->cStat & TLAN_CSTAT_READY ) == TLAN_CSTAT_READY ) { 1768 + sizeof(struct tlan_list)*priv->tx_head;
1769 if (head_list->c_stat & TLAN_CSTAT_READY) {
1684 netif_stop_queue(dev); 1770 netif_stop_queue(dev);
1685 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM ); 1771 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1686 ack |= TLAN_HC_GO; 1772 ack |= TLAN_HC_GO;
1687 } else { 1773 } else {
1688 priv->txInProgress = 0; 1774 priv->tx_in_progress = 0;
1689 } 1775 }
1690 } 1776 }
1691 1777
1692 return ack; 1778 return ack;
1693 1779
1694} /* TLan_HandleTxEOC */ 1780}
1695 1781
1696 1782
1697 1783
1698 1784
1699 /*************************************************************** 1785/***************************************************************
1700 * TLan_HandleStatusCheck 1786 * tlan_handle_status_check
1701 * 1787 *
1702 * Returns: 1788 * Returns:
1703 * 0 if Adapter check, 1 if Network Status check. 1789 * 0 if Adapter check, 1 if Network Status check.
1704 * Parms: 1790 * Parms:
1705 * dev Device assigned the IRQ that was 1791 * dev Device assigned the IRQ that was
1706 * raised. 1792 * raised.
1707 * host_int The contents of the HOST_INT 1793 * host_int The contents of the HOST_INT
1708 * port. 1794 * port.
1709 * 1795 *
1710 * This function handles Adapter Check/Network Status 1796 * This function handles Adapter Check/Network Status
1711 * interrupts generated by the adapter. It checks the 1797 * interrupts generated by the adapter. It checks the
1712 * vector in the HOST_INT register to determine if it is 1798 * vector in the HOST_INT register to determine if it is
1713 * an Adapter Check interrupt. If so, it resets the 1799 * an Adapter Check interrupt. If so, it resets the
1714 * adapter. Otherwise it clears the status registers 1800 * adapter. Otherwise it clears the status registers
1715 * and services the PHY. 1801 * and services the PHY.
1716 * 1802 *
1717 **************************************************************/ 1803 **************************************************************/
1718 1804
1719static u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int ) 1805static u32 tlan_handle_status_check(struct net_device *dev, u16 host_int)
1720{ 1806{
1721 TLanPrivateInfo *priv = netdev_priv(dev); 1807 struct tlan_priv *priv = netdev_priv(dev);
1722 u32 ack; 1808 u32 ack;
1723 u32 error; 1809 u32 error;
1724 u8 net_sts; 1810 u8 net_sts;
@@ -1727,92 +1813,94 @@ static u32 TLan_HandleStatusCheck( struct net_device *dev, u16 host_int )
1727 u16 tlphy_sts; 1813 u16 tlphy_sts;
1728 1814
1729 ack = 1; 1815 ack = 1;
1730 if ( host_int & TLAN_HI_IV_MASK ) { 1816 if (host_int & TLAN_HI_IV_MASK) {
1731 netif_stop_queue( dev ); 1817 netif_stop_queue(dev);
1732 error = inl( dev->base_addr + TLAN_CH_PARM ); 1818 error = inl(dev->base_addr + TLAN_CH_PARM);
1733 printk( "TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error ); 1819 pr_info("TLAN: %s: Adaptor Error = 0x%x\n", dev->name, error);
1734 TLan_ReadAndClearStats( dev, TLAN_RECORD ); 1820 tlan_read_and_clear_stats(dev, TLAN_RECORD);
1735 outl( TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD ); 1821 outl(TLAN_HC_AD_RST, dev->base_addr + TLAN_HOST_CMD);
1736 1822
1737 schedule_work(&priv->tlan_tqueue); 1823 schedule_work(&priv->tlan_tqueue);
1738 1824
1739 netif_wake_queue(dev); 1825 netif_wake_queue(dev);
1740 ack = 0; 1826 ack = 0;
1741 } else { 1827 } else {
1742 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name ); 1828 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Status Check\n", dev->name);
1743 phy = priv->phy[priv->phyNum]; 1829 phy = priv->phy[priv->phy_num];
1744 1830
1745 net_sts = TLan_DioRead8( dev->base_addr, TLAN_NET_STS ); 1831 net_sts = tlan_dio_read8(dev->base_addr, TLAN_NET_STS);
1746 if ( net_sts ) { 1832 if (net_sts) {
1747 TLan_DioWrite8( dev->base_addr, TLAN_NET_STS, net_sts ); 1833 tlan_dio_write8(dev->base_addr, TLAN_NET_STS, net_sts);
1748 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n", 1834 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Net_Sts = %x\n",
1749 dev->name, (unsigned) net_sts ); 1835 dev->name, (unsigned) net_sts);
1750 } 1836 }
1751 if ( ( net_sts & TLAN_NET_STS_MIRQ ) && ( priv->phyNum == 0 ) ) { 1837 if ((net_sts & TLAN_NET_STS_MIRQ) && (priv->phy_num == 0)) {
1752 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_STS, &tlphy_sts ); 1838 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_STS, &tlphy_sts);
1753 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl ); 1839 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl);
1754 if ( ! ( tlphy_sts & TLAN_TS_POLOK ) && 1840 if (!(tlphy_sts & TLAN_TS_POLOK) &&
1755 ! ( tlphy_ctl & TLAN_TC_SWAPOL ) ) { 1841 !(tlphy_ctl & TLAN_TC_SWAPOL)) {
1756 tlphy_ctl |= TLAN_TC_SWAPOL; 1842 tlphy_ctl |= TLAN_TC_SWAPOL;
1757 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl); 1843 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL,
1758 } else if ( ( tlphy_sts & TLAN_TS_POLOK ) && 1844 tlphy_ctl);
1759 ( tlphy_ctl & TLAN_TC_SWAPOL ) ) { 1845 } else if ((tlphy_sts & TLAN_TS_POLOK) &&
1760 tlphy_ctl &= ~TLAN_TC_SWAPOL; 1846 (tlphy_ctl & TLAN_TC_SWAPOL)) {
1761 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl); 1847 tlphy_ctl &= ~TLAN_TC_SWAPOL;
1762 } 1848 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL,
1763 1849 tlphy_ctl);
1764 if (debug) {
1765 TLan_PhyPrint( dev );
1766 } 1850 }
1851
1852 if (debug)
1853 tlan_phy_print(dev);
1767 } 1854 }
1768 } 1855 }
1769 1856
1770 return ack; 1857 return ack;
1771 1858
1772} /* TLan_HandleStatusCheck */ 1859}
1773 1860
1774 1861
1775 1862
1776 1863
1777 /*************************************************************** 1864/***************************************************************
1778 * TLan_HandleRxEOC 1865 * tlan_handle_rx_eoc
1779 * 1866 *
1780 * Returns: 1867 * Returns:
1781 * 1 1868 * 1
1782 * Parms: 1869 * Parms:
1783 * dev Device assigned the IRQ that was 1870 * dev Device assigned the IRQ that was
1784 * raised. 1871 * raised.
1785 * host_int The contents of the HOST_INT 1872 * host_int The contents of the HOST_INT
1786 * port. 1873 * port.
1787 * 1874 *
1788 * This driver is structured to determine EOC occurrences by 1875 * This driver is structured to determine EOC occurrences by
1789 * reading the CSTAT member of the list structure. Rx EOC 1876 * reading the CSTAT member of the list structure. Rx EOC
1790 * interrupts are disabled via the DIO INTDIS register. 1877 * interrupts are disabled via the DIO INTDIS register.
1791 * However, TLAN chips before revision 3.0 didn't have this 1878 * However, TLAN chips before revision 3.0 didn't have this
1792 * CSTAT member or a INTDIS register, so if this chip is 1879 * CSTAT member or a INTDIS register, so if this chip is
1793 * pre-3.0, process EOC interrupts normally. 1880 * pre-3.0, process EOC interrupts normally.
1794 * 1881 *
1795 **************************************************************/ 1882 **************************************************************/
1796 1883
1797static u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int ) 1884static u32 tlan_handle_rx_eoc(struct net_device *dev, u16 host_int)
1798{ 1885{
1799 TLanPrivateInfo *priv = netdev_priv(dev); 1886 struct tlan_priv *priv = netdev_priv(dev);
1800 dma_addr_t head_list_phys; 1887 dma_addr_t head_list_phys;
1801 u32 ack = 1; 1888 u32 ack = 1;
1802 1889
1803 if ( priv->tlanRev < 0x30 ) { 1890 if (priv->tlan_rev < 0x30) {
1804 TLAN_DBG( TLAN_DEBUG_RX, 1891 TLAN_DBG(TLAN_DEBUG_RX,
1805 "RECEIVE: Handling RX EOC (Head=%d Tail=%d) -- IRQ\n", 1892 "RECEIVE: Handling RX EOC (head=%d tail=%d) -- IRQ\n",
1806 priv->rxHead, priv->rxTail ); 1893 priv->rx_head, priv->rx_tail);
1807 head_list_phys = priv->rxListDMA + sizeof(TLanList) * priv->rxHead; 1894 head_list_phys = priv->rx_list_dma
1808 outl( head_list_phys, dev->base_addr + TLAN_CH_PARM ); 1895 + sizeof(struct tlan_list)*priv->rx_head;
1896 outl(head_list_phys, dev->base_addr + TLAN_CH_PARM);
1809 ack |= TLAN_HC_GO | TLAN_HC_RT; 1897 ack |= TLAN_HC_GO | TLAN_HC_RT;
1810 priv->rxEocCount++; 1898 priv->rx_eoc_count++;
1811 } 1899 }
1812 1900
1813 return ack; 1901 return ack;
1814 1902
1815} /* TLan_HandleRxEOC */ 1903}
1816 1904
1817 1905
1818 1906
@@ -1820,98 +1908,98 @@ static u32 TLan_HandleRxEOC( struct net_device *dev, u16 host_int )
1820/***************************************************************************** 1908/*****************************************************************************
1821****************************************************************************** 1909******************************************************************************
1822 1910
1823 ThunderLAN Driver Timer Function 1911ThunderLAN driver timer function
1824 1912
1825****************************************************************************** 1913******************************************************************************
1826*****************************************************************************/ 1914*****************************************************************************/
1827 1915
1828 1916
1829 /*************************************************************** 1917/***************************************************************
1830 * TLan_Timer 1918 * tlan_timer
1831 * 1919 *
1832 * Returns: 1920 * Returns:
1833 * Nothing 1921 * Nothing
1834 * Parms: 1922 * Parms:
1835 * data A value given to add timer when 1923 * data A value given to add timer when
1836 * add_timer was called. 1924 * add_timer was called.
1837 * 1925 *
1838 * This function handles timed functionality for the 1926 * This function handles timed functionality for the
1839 * TLAN driver. The two current timer uses are for 1927 * TLAN driver. The two current timer uses are for
1840 * delaying for autonegotionation and driving the ACT LED. 1928 * delaying for autonegotionation and driving the ACT LED.
1841 * - Autonegotiation requires being allowed about 1929 * - Autonegotiation requires being allowed about
1842 * 2 1/2 seconds before attempting to transmit a 1930 * 2 1/2 seconds before attempting to transmit a
1843 * packet. It would be a very bad thing to hang 1931 * packet. It would be a very bad thing to hang
1844 * the kernel this long, so the driver doesn't 1932 * the kernel this long, so the driver doesn't
1845 * allow transmission 'til after this time, for 1933 * allow transmission 'til after this time, for
1846 * certain PHYs. It would be much nicer if all 1934 * certain PHYs. It would be much nicer if all
1847 * PHYs were interrupt-capable like the internal 1935 * PHYs were interrupt-capable like the internal
1848 * PHY. 1936 * PHY.
1849 * - The ACT LED, which shows adapter activity, is 1937 * - The ACT LED, which shows adapter activity, is
1850 * driven by the driver, and so must be left on 1938 * driven by the driver, and so must be left on
1851 * for a short period to power up the LED so it 1939 * for a short period to power up the LED so it
1852 * can be seen. This delay can be changed by 1940 * can be seen. This delay can be changed by
1853 * changing the TLAN_TIMER_ACT_DELAY in tlan.h, 1941 * changing the TLAN_TIMER_ACT_DELAY in tlan.h,
1854 * if desired. 100 ms produces a slightly 1942 * if desired. 100 ms produces a slightly
1855 * sluggish response. 1943 * sluggish response.
1856 * 1944 *
1857 **************************************************************/ 1945 **************************************************************/
1858 1946
1859static void TLan_Timer( unsigned long data ) 1947static void tlan_timer(unsigned long data)
1860{ 1948{
1861 struct net_device *dev = (struct net_device *) data; 1949 struct net_device *dev = (struct net_device *) data;
1862 TLanPrivateInfo *priv = netdev_priv(dev); 1950 struct tlan_priv *priv = netdev_priv(dev);
1863 u32 elapsed; 1951 u32 elapsed;
1864 unsigned long flags = 0; 1952 unsigned long flags = 0;
1865 1953
1866 priv->timer.function = NULL; 1954 priv->timer.function = NULL;
1867 1955
1868 switch ( priv->timerType ) { 1956 switch (priv->timer_type) {
1869#ifdef MONITOR 1957#ifdef MONITOR
1870 case TLAN_TIMER_LINK_BEAT: 1958 case TLAN_TIMER_LINK_BEAT:
1871 TLan_PhyMonitor( dev ); 1959 tlan_phy_monitor(dev);
1872 break; 1960 break;
1873#endif 1961#endif
1874 case TLAN_TIMER_PHY_PDOWN: 1962 case TLAN_TIMER_PHY_PDOWN:
1875 TLan_PhyPowerDown( dev ); 1963 tlan_phy_power_down(dev);
1876 break; 1964 break;
1877 case TLAN_TIMER_PHY_PUP: 1965 case TLAN_TIMER_PHY_PUP:
1878 TLan_PhyPowerUp( dev ); 1966 tlan_phy_power_up(dev);
1879 break; 1967 break;
1880 case TLAN_TIMER_PHY_RESET: 1968 case TLAN_TIMER_PHY_RESET:
1881 TLan_PhyReset( dev ); 1969 tlan_phy_reset(dev);
1882 break; 1970 break;
1883 case TLAN_TIMER_PHY_START_LINK: 1971 case TLAN_TIMER_PHY_START_LINK:
1884 TLan_PhyStartLink( dev ); 1972 tlan_phy_start_link(dev);
1885 break; 1973 break;
1886 case TLAN_TIMER_PHY_FINISH_AN: 1974 case TLAN_TIMER_PHY_FINISH_AN:
1887 TLan_PhyFinishAutoNeg( dev ); 1975 tlan_phy_finish_auto_neg(dev);
1888 break; 1976 break;
1889 case TLAN_TIMER_FINISH_RESET: 1977 case TLAN_TIMER_FINISH_RESET:
1890 TLan_FinishReset( dev ); 1978 tlan_finish_reset(dev);
1891 break; 1979 break;
1892 case TLAN_TIMER_ACTIVITY: 1980 case TLAN_TIMER_ACTIVITY:
1893 spin_lock_irqsave(&priv->lock, flags); 1981 spin_lock_irqsave(&priv->lock, flags);
1894 if ( priv->timer.function == NULL ) { 1982 if (priv->timer.function == NULL) {
1895 elapsed = jiffies - priv->timerSetAt; 1983 elapsed = jiffies - priv->timer_set_at;
1896 if ( elapsed >= TLAN_TIMER_ACT_DELAY ) { 1984 if (elapsed >= TLAN_TIMER_ACT_DELAY) {
1897 TLan_DioWrite8( dev->base_addr, 1985 tlan_dio_write8(dev->base_addr,
1898 TLAN_LED_REG, TLAN_LED_LINK ); 1986 TLAN_LED_REG, TLAN_LED_LINK);
1899 } else { 1987 } else {
1900 priv->timer.function = TLan_Timer; 1988 priv->timer.function = tlan_timer;
1901 priv->timer.expires = priv->timerSetAt 1989 priv->timer.expires = priv->timer_set_at
1902 + TLAN_TIMER_ACT_DELAY; 1990 + TLAN_TIMER_ACT_DELAY;
1903 spin_unlock_irqrestore(&priv->lock, flags); 1991 spin_unlock_irqrestore(&priv->lock, flags);
1904 add_timer( &priv->timer ); 1992 add_timer(&priv->timer);
1905 break; 1993 break;
1906 }
1907 } 1994 }
1908 spin_unlock_irqrestore(&priv->lock, flags); 1995 }
1909 break; 1996 spin_unlock_irqrestore(&priv->lock, flags);
1910 default: 1997 break;
1911 break; 1998 default:
1999 break;
1912 } 2000 }
1913 2001
1914} /* TLan_Timer */ 2002}
1915 2003
1916 2004
1917 2005
@@ -1919,39 +2007,39 @@ static void TLan_Timer( unsigned long data )
1919/***************************************************************************** 2007/*****************************************************************************
1920****************************************************************************** 2008******************************************************************************
1921 2009
1922 ThunderLAN Driver Adapter Related Routines 2010ThunderLAN driver adapter related routines
1923 2011
1924****************************************************************************** 2012******************************************************************************
1925*****************************************************************************/ 2013*****************************************************************************/
1926 2014
1927 2015
1928 /*************************************************************** 2016/***************************************************************
1929 * TLan_ResetLists 2017 * tlan_reset_lists
1930 * 2018 *
1931 * Returns: 2019 * Returns:
1932 * Nothing 2020 * Nothing
1933 * Parms: 2021 * Parms:
1934 * dev The device structure with the list 2022 * dev The device structure with the list
1935 * stuctures to be reset. 2023 * stuctures to be reset.
1936 * 2024 *
1937 * This routine sets the variables associated with managing 2025 * This routine sets the variables associated with managing
1938 * the TLAN lists to their initial values. 2026 * the TLAN lists to their initial values.
1939 * 2027 *
1940 **************************************************************/ 2028 **************************************************************/
1941 2029
1942static void TLan_ResetLists( struct net_device *dev ) 2030static void tlan_reset_lists(struct net_device *dev)
1943{ 2031{
1944 TLanPrivateInfo *priv = netdev_priv(dev); 2032 struct tlan_priv *priv = netdev_priv(dev);
1945 int i; 2033 int i;
1946 TLanList *list; 2034 struct tlan_list *list;
1947 dma_addr_t list_phys; 2035 dma_addr_t list_phys;
1948 struct sk_buff *skb; 2036 struct sk_buff *skb;
1949 2037
1950 priv->txHead = 0; 2038 priv->tx_head = 0;
1951 priv->txTail = 0; 2039 priv->tx_tail = 0;
1952 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) { 2040 for (i = 0; i < TLAN_NUM_TX_LISTS; i++) {
1953 list = priv->txList + i; 2041 list = priv->tx_list + i;
1954 list->cStat = TLAN_CSTAT_UNUSED; 2042 list->c_stat = TLAN_CSTAT_UNUSED;
1955 list->buffer[0].address = 0; 2043 list->buffer[0].address = 0;
1956 list->buffer[2].count = 0; 2044 list->buffer[2].count = 0;
1957 list->buffer[2].address = 0; 2045 list->buffer[2].address = 0;
@@ -1959,169 +2047,169 @@ static void TLan_ResetLists( struct net_device *dev )
1959 list->buffer[9].address = 0; 2047 list->buffer[9].address = 0;
1960 } 2048 }
1961 2049
1962 priv->rxHead = 0; 2050 priv->rx_head = 0;
1963 priv->rxTail = TLAN_NUM_RX_LISTS - 1; 2051 priv->rx_tail = TLAN_NUM_RX_LISTS - 1;
1964 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) { 2052 for (i = 0; i < TLAN_NUM_RX_LISTS; i++) {
1965 list = priv->rxList + i; 2053 list = priv->rx_list + i;
1966 list_phys = priv->rxListDMA + sizeof(TLanList) * i; 2054 list_phys = priv->rx_list_dma + sizeof(struct tlan_list)*i;
1967 list->cStat = TLAN_CSTAT_READY; 2055 list->c_stat = TLAN_CSTAT_READY;
1968 list->frameSize = TLAN_MAX_FRAME_SIZE; 2056 list->frame_size = TLAN_MAX_FRAME_SIZE;
1969 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER; 2057 list->buffer[0].count = TLAN_MAX_FRAME_SIZE | TLAN_LAST_BUFFER;
1970 skb = netdev_alloc_skb_ip_align(dev, TLAN_MAX_FRAME_SIZE + 5); 2058 skb = netdev_alloc_skb_ip_align(dev, TLAN_MAX_FRAME_SIZE + 5);
1971 if ( !skb ) { 2059 if (!skb) {
1972 pr_err("TLAN: out of memory for received data.\n" ); 2060 pr_err("TLAN: out of memory for received data.\n");
1973 break; 2061 break;
1974 } 2062 }
1975 2063
1976 list->buffer[0].address = pci_map_single(priv->pciDev, 2064 list->buffer[0].address = pci_map_single(priv->pci_dev,
1977 skb->data, 2065 skb->data,
1978 TLAN_MAX_FRAME_SIZE, 2066 TLAN_MAX_FRAME_SIZE,
1979 PCI_DMA_FROMDEVICE); 2067 PCI_DMA_FROMDEVICE);
1980 TLan_StoreSKB(list, skb); 2068 tlan_store_skb(list, skb);
1981 list->buffer[1].count = 0; 2069 list->buffer[1].count = 0;
1982 list->buffer[1].address = 0; 2070 list->buffer[1].address = 0;
1983 list->forward = list_phys + sizeof(TLanList); 2071 list->forward = list_phys + sizeof(struct tlan_list);
1984 } 2072 }
1985 2073
1986 /* in case ran out of memory early, clear bits */ 2074 /* in case ran out of memory early, clear bits */
1987 while (i < TLAN_NUM_RX_LISTS) { 2075 while (i < TLAN_NUM_RX_LISTS) {
1988 TLan_StoreSKB(priv->rxList + i, NULL); 2076 tlan_store_skb(priv->rx_list + i, NULL);
1989 ++i; 2077 ++i;
1990 } 2078 }
1991 list->forward = 0; 2079 list->forward = 0;
1992 2080
1993} /* TLan_ResetLists */ 2081}
1994 2082
1995 2083
1996static void TLan_FreeLists( struct net_device *dev ) 2084static void tlan_free_lists(struct net_device *dev)
1997{ 2085{
1998 TLanPrivateInfo *priv = netdev_priv(dev); 2086 struct tlan_priv *priv = netdev_priv(dev);
1999 int i; 2087 int i;
2000 TLanList *list; 2088 struct tlan_list *list;
2001 struct sk_buff *skb; 2089 struct sk_buff *skb;
2002 2090
2003 for ( i = 0; i < TLAN_NUM_TX_LISTS; i++ ) { 2091 for (i = 0; i < TLAN_NUM_TX_LISTS; i++) {
2004 list = priv->txList + i; 2092 list = priv->tx_list + i;
2005 skb = TLan_GetSKB(list); 2093 skb = tlan_get_skb(list);
2006 if ( skb ) { 2094 if (skb) {
2007 pci_unmap_single( 2095 pci_unmap_single(
2008 priv->pciDev, 2096 priv->pci_dev,
2009 list->buffer[0].address, 2097 list->buffer[0].address,
2010 max(skb->len, 2098 max(skb->len,
2011 (unsigned int)TLAN_MIN_FRAME_SIZE), 2099 (unsigned int)TLAN_MIN_FRAME_SIZE),
2012 PCI_DMA_TODEVICE); 2100 PCI_DMA_TODEVICE);
2013 dev_kfree_skb_any( skb ); 2101 dev_kfree_skb_any(skb);
2014 list->buffer[8].address = 0; 2102 list->buffer[8].address = 0;
2015 list->buffer[9].address = 0; 2103 list->buffer[9].address = 0;
2016 } 2104 }
2017 } 2105 }
2018 2106
2019 for ( i = 0; i < TLAN_NUM_RX_LISTS; i++ ) { 2107 for (i = 0; i < TLAN_NUM_RX_LISTS; i++) {
2020 list = priv->rxList + i; 2108 list = priv->rx_list + i;
2021 skb = TLan_GetSKB(list); 2109 skb = tlan_get_skb(list);
2022 if ( skb ) { 2110 if (skb) {
2023 pci_unmap_single(priv->pciDev, 2111 pci_unmap_single(priv->pci_dev,
2024 list->buffer[0].address, 2112 list->buffer[0].address,
2025 TLAN_MAX_FRAME_SIZE, 2113 TLAN_MAX_FRAME_SIZE,
2026 PCI_DMA_FROMDEVICE); 2114 PCI_DMA_FROMDEVICE);
2027 dev_kfree_skb_any( skb ); 2115 dev_kfree_skb_any(skb);
2028 list->buffer[8].address = 0; 2116 list->buffer[8].address = 0;
2029 list->buffer[9].address = 0; 2117 list->buffer[9].address = 0;
2030 } 2118 }
2031 } 2119 }
2032} /* TLan_FreeLists */ 2120}
2033 2121
2034 2122
2035 2123
2036 2124
2037 /*************************************************************** 2125/***************************************************************
2038 * TLan_PrintDio 2126 * tlan_print_dio
2039 * 2127 *
2040 * Returns: 2128 * Returns:
2041 * Nothing 2129 * Nothing
2042 * Parms: 2130 * Parms:
2043 * io_base Base IO port of the device of 2131 * io_base Base IO port of the device of
2044 * which to print DIO registers. 2132 * which to print DIO registers.
2045 * 2133 *
2046 * This function prints out all the internal (DIO) 2134 * This function prints out all the internal (DIO)
2047 * registers of a TLAN chip. 2135 * registers of a TLAN chip.
2048 * 2136 *
2049 **************************************************************/ 2137 **************************************************************/
2050 2138
2051static void TLan_PrintDio( u16 io_base ) 2139static void tlan_print_dio(u16 io_base)
2052{ 2140{
2053 u32 data0, data1; 2141 u32 data0, data1;
2054 int i; 2142 int i;
2055 2143
2056 printk( "TLAN: Contents of internal registers for io base 0x%04hx.\n", 2144 pr_info("TLAN: Contents of internal registers for io base 0x%04hx.\n",
2057 io_base ); 2145 io_base);
2058 printk( "TLAN: Off. +0 +4\n" ); 2146 pr_info("TLAN: Off. +0 +4\n");
2059 for ( i = 0; i < 0x4C; i+= 8 ) { 2147 for (i = 0; i < 0x4C; i += 8) {
2060 data0 = TLan_DioRead32( io_base, i ); 2148 data0 = tlan_dio_read32(io_base, i);
2061 data1 = TLan_DioRead32( io_base, i + 0x4 ); 2149 data1 = tlan_dio_read32(io_base, i + 0x4);
2062 printk( "TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1 ); 2150 pr_info("TLAN: 0x%02x 0x%08x 0x%08x\n", i, data0, data1);
2063 } 2151 }
2064 2152
2065} /* TLan_PrintDio */ 2153}
2066 2154
2067 2155
2068 2156
2069 2157
2070 /*************************************************************** 2158/***************************************************************
2071 * TLan_PrintList 2159 * TLan_PrintList
2072 * 2160 *
2073 * Returns: 2161 * Returns:
2074 * Nothing 2162 * Nothing
2075 * Parms: 2163 * Parms:
2076 * list A pointer to the TLanList structure to 2164 * list A pointer to the struct tlan_list structure to
2077 * be printed. 2165 * be printed.
2078 * type A string to designate type of list, 2166 * type A string to designate type of list,
2079 * "Rx" or "Tx". 2167 * "Rx" or "Tx".
2080 * num The index of the list. 2168 * num The index of the list.
2081 * 2169 *
2082 * This function prints out the contents of the list 2170 * This function prints out the contents of the list
2083 * pointed to by the list parameter. 2171 * pointed to by the list parameter.
2084 * 2172 *
2085 **************************************************************/ 2173 **************************************************************/
2086 2174
2087static void TLan_PrintList( TLanList *list, char *type, int num) 2175static void tlan_print_list(struct tlan_list *list, char *type, int num)
2088{ 2176{
2089 int i; 2177 int i;
2090 2178
2091 printk( "TLAN: %s List %d at %p\n", type, num, list ); 2179 pr_info("TLAN: %s List %d at %p\n", type, num, list);
2092 printk( "TLAN: Forward = 0x%08x\n", list->forward ); 2180 pr_info("TLAN: Forward = 0x%08x\n", list->forward);
2093 printk( "TLAN: CSTAT = 0x%04hx\n", list->cStat ); 2181 pr_info("TLAN: CSTAT = 0x%04hx\n", list->c_stat);
2094 printk( "TLAN: Frame Size = 0x%04hx\n", list->frameSize ); 2182 pr_info("TLAN: Frame Size = 0x%04hx\n", list->frame_size);
2095 /* for ( i = 0; i < 10; i++ ) { */ 2183 /* for (i = 0; i < 10; i++) { */
2096 for ( i = 0; i < 2; i++ ) { 2184 for (i = 0; i < 2; i++) {
2097 printk( "TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n", 2185 pr_info("TLAN: Buffer[%d].count, addr = 0x%08x, 0x%08x\n",
2098 i, list->buffer[i].count, list->buffer[i].address ); 2186 i, list->buffer[i].count, list->buffer[i].address);
2099 } 2187 }
2100 2188
2101} /* TLan_PrintList */ 2189}
2102 2190
2103 2191
2104 2192
2105 2193
2106 /*************************************************************** 2194/***************************************************************
2107 * TLan_ReadAndClearStats 2195 * tlan_read_and_clear_stats
2108 * 2196 *
2109 * Returns: 2197 * Returns:
2110 * Nothing 2198 * Nothing
2111 * Parms: 2199 * Parms:
2112 * dev Pointer to device structure of adapter 2200 * dev Pointer to device structure of adapter
2113 * to which to read stats. 2201 * to which to read stats.
2114 * record Flag indicating whether to add 2202 * record Flag indicating whether to add
2115 * 2203 *
2116 * This functions reads all the internal status registers 2204 * This functions reads all the internal status registers
2117 * of the TLAN chip, which clears them as a side effect. 2205 * of the TLAN chip, which clears them as a side effect.
2118 * It then either adds the values to the device's status 2206 * It then either adds the values to the device's status
2119 * struct, or discards them, depending on whether record 2207 * struct, or discards them, depending on whether record
2120 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0). 2208 * is TLAN_RECORD (!=0) or TLAN_IGNORE (==0).
2121 * 2209 *
2122 **************************************************************/ 2210 **************************************************************/
2123 2211
2124static void TLan_ReadAndClearStats( struct net_device *dev, int record ) 2212static void tlan_read_and_clear_stats(struct net_device *dev, int record)
2125{ 2213{
2126 u32 tx_good, tx_under; 2214 u32 tx_good, tx_under;
2127 u32 rx_good, rx_over; 2215 u32 rx_good, rx_over;
@@ -2129,41 +2217,42 @@ static void TLan_ReadAndClearStats( struct net_device *dev, int record )
2129 u32 multi_col, single_col; 2217 u32 multi_col, single_col;
2130 u32 excess_col, late_col, loss; 2218 u32 excess_col, late_col, loss;
2131 2219
2132 outw( TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR ); 2220 outw(TLAN_GOOD_TX_FRMS, dev->base_addr + TLAN_DIO_ADR);
2133 tx_good = inb( dev->base_addr + TLAN_DIO_DATA ); 2221 tx_good = inb(dev->base_addr + TLAN_DIO_DATA);
2134 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8; 2222 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2135 tx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16; 2223 tx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16;
2136 tx_under = inb( dev->base_addr + TLAN_DIO_DATA + 3 ); 2224 tx_under = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2137 2225
2138 outw( TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR ); 2226 outw(TLAN_GOOD_RX_FRMS, dev->base_addr + TLAN_DIO_ADR);
2139 rx_good = inb( dev->base_addr + TLAN_DIO_DATA ); 2227 rx_good = inb(dev->base_addr + TLAN_DIO_DATA);
2140 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8; 2228 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2141 rx_good += inb( dev->base_addr + TLAN_DIO_DATA + 2 ) << 16; 2229 rx_good += inb(dev->base_addr + TLAN_DIO_DATA + 2) << 16;
2142 rx_over = inb( dev->base_addr + TLAN_DIO_DATA + 3 ); 2230 rx_over = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2143 2231
2144 outw( TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR ); 2232 outw(TLAN_DEFERRED_TX, dev->base_addr + TLAN_DIO_ADR);
2145 def_tx = inb( dev->base_addr + TLAN_DIO_DATA ); 2233 def_tx = inb(dev->base_addr + TLAN_DIO_DATA);
2146 def_tx += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8; 2234 def_tx += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2147 crc = inb( dev->base_addr + TLAN_DIO_DATA + 2 ); 2235 crc = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2148 code = inb( dev->base_addr + TLAN_DIO_DATA + 3 ); 2236 code = inb(dev->base_addr + TLAN_DIO_DATA + 3);
2149 2237
2150 outw( TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR ); 2238 outw(TLAN_MULTICOL_FRMS, dev->base_addr + TLAN_DIO_ADR);
2151 multi_col = inb( dev->base_addr + TLAN_DIO_DATA ); 2239 multi_col = inb(dev->base_addr + TLAN_DIO_DATA);
2152 multi_col += inb( dev->base_addr + TLAN_DIO_DATA + 1 ) << 8; 2240 multi_col += inb(dev->base_addr + TLAN_DIO_DATA + 1) << 8;
2153 single_col = inb( dev->base_addr + TLAN_DIO_DATA + 2 ); 2241 single_col = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2154 single_col += inb( dev->base_addr + TLAN_DIO_DATA + 3 ) << 8; 2242 single_col += inb(dev->base_addr + TLAN_DIO_DATA + 3) << 8;
2155 2243
2156 outw( TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR ); 2244 outw(TLAN_EXCESSCOL_FRMS, dev->base_addr + TLAN_DIO_ADR);
2157 excess_col = inb( dev->base_addr + TLAN_DIO_DATA ); 2245 excess_col = inb(dev->base_addr + TLAN_DIO_DATA);
2158 late_col = inb( dev->base_addr + TLAN_DIO_DATA + 1 ); 2246 late_col = inb(dev->base_addr + TLAN_DIO_DATA + 1);
2159 loss = inb( dev->base_addr + TLAN_DIO_DATA + 2 ); 2247 loss = inb(dev->base_addr + TLAN_DIO_DATA + 2);
2160 2248
2161 if ( record ) { 2249 if (record) {
2162 dev->stats.rx_packets += rx_good; 2250 dev->stats.rx_packets += rx_good;
2163 dev->stats.rx_errors += rx_over + crc + code; 2251 dev->stats.rx_errors += rx_over + crc + code;
2164 dev->stats.tx_packets += tx_good; 2252 dev->stats.tx_packets += tx_good;
2165 dev->stats.tx_errors += tx_under + loss; 2253 dev->stats.tx_errors += tx_under + loss;
2166 dev->stats.collisions += multi_col + single_col + excess_col + late_col; 2254 dev->stats.collisions += multi_col
2255 + single_col + excess_col + late_col;
2167 2256
2168 dev->stats.rx_over_errors += rx_over; 2257 dev->stats.rx_over_errors += rx_over;
2169 dev->stats.rx_crc_errors += crc; 2258 dev->stats.rx_crc_errors += crc;
@@ -2173,39 +2262,39 @@ static void TLan_ReadAndClearStats( struct net_device *dev, int record )
2173 dev->stats.tx_carrier_errors += loss; 2262 dev->stats.tx_carrier_errors += loss;
2174 } 2263 }
2175 2264
2176} /* TLan_ReadAndClearStats */ 2265}
2177 2266
2178 2267
2179 2268
2180 2269
2181 /*************************************************************** 2270/***************************************************************
2182 * TLan_Reset 2271 * TLan_Reset
2183 * 2272 *
2184 * Returns: 2273 * Returns:
2185 * 0 2274 * 0
2186 * Parms: 2275 * Parms:
2187 * dev Pointer to device structure of adapter 2276 * dev Pointer to device structure of adapter
2188 * to be reset. 2277 * to be reset.
2189 * 2278 *
2190 * This function resets the adapter and it's physical 2279 * This function resets the adapter and it's physical
2191 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN 2280 * device. See Chap. 3, pp. 9-10 of the "ThunderLAN
2192 * Programmer's Guide" for details. The routine tries to 2281 * Programmer's Guide" for details. The routine tries to
2193 * implement what is detailed there, though adjustments 2282 * implement what is detailed there, though adjustments
2194 * have been made. 2283 * have been made.
2195 * 2284 *
2196 **************************************************************/ 2285 **************************************************************/
2197 2286
2198static void 2287static void
2199TLan_ResetAdapter( struct net_device *dev ) 2288tlan_reset_adapter(struct net_device *dev)
2200{ 2289{
2201 TLanPrivateInfo *priv = netdev_priv(dev); 2290 struct tlan_priv *priv = netdev_priv(dev);
2202 int i; 2291 int i;
2203 u32 addr; 2292 u32 addr;
2204 u32 data; 2293 u32 data;
2205 u8 data8; 2294 u8 data8;
2206 2295
2207 priv->tlanFullDuplex = false; 2296 priv->tlan_full_duplex = false;
2208 priv->phyOnline=0; 2297 priv->phy_online = 0;
2209 netif_carrier_off(dev); 2298 netif_carrier_off(dev);
2210 2299
2211/* 1. Assert reset bit. */ 2300/* 1. Assert reset bit. */
@@ -2216,7 +2305,7 @@ TLan_ResetAdapter( struct net_device *dev )
2216 2305
2217 udelay(1000); 2306 udelay(1000);
2218 2307
2219/* 2. Turn off interrupts. ( Probably isn't necessary ) */ 2308/* 2. Turn off interrupts. (Probably isn't necessary) */
2220 2309
2221 data = inl(dev->base_addr + TLAN_HOST_CMD); 2310 data = inl(dev->base_addr + TLAN_HOST_CMD);
2222 data |= TLAN_HC_INT_OFF; 2311 data |= TLAN_HC_INT_OFF;
@@ -2224,207 +2313,208 @@ TLan_ResetAdapter( struct net_device *dev )
2224 2313
2225/* 3. Clear AREGs and HASHs. */ 2314/* 3. Clear AREGs and HASHs. */
2226 2315
2227 for ( i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4 ) { 2316 for (i = TLAN_AREG_0; i <= TLAN_HASH_2; i += 4)
2228 TLan_DioWrite32( dev->base_addr, (u16) i, 0 ); 2317 tlan_dio_write32(dev->base_addr, (u16) i, 0);
2229 }
2230 2318
2231/* 4. Setup NetConfig register. */ 2319/* 4. Setup NetConfig register. */
2232 2320
2233 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN; 2321 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN;
2234 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data ); 2322 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data);
2235 2323
2236/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */ 2324/* 5. Load Ld_Tmr and Ld_Thr in HOST_CMD. */
2237 2325
2238 outl( TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD ); 2326 outl(TLAN_HC_LD_TMR | 0x3f, dev->base_addr + TLAN_HOST_CMD);
2239 outl( TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD ); 2327 outl(TLAN_HC_LD_THR | 0x9, dev->base_addr + TLAN_HOST_CMD);
2240 2328
2241/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */ 2329/* 6. Unreset the MII by setting NMRST (in NetSio) to 1. */
2242 2330
2243 outw( TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR ); 2331 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
2244 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; 2332 addr = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
2245 TLan_SetBit( TLAN_NET_SIO_NMRST, addr ); 2333 tlan_set_bit(TLAN_NET_SIO_NMRST, addr);
2246 2334
2247/* 7. Setup the remaining registers. */ 2335/* 7. Setup the remaining registers. */
2248 2336
2249 if ( priv->tlanRev >= 0x30 ) { 2337 if (priv->tlan_rev >= 0x30) {
2250 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC; 2338 data8 = TLAN_ID_TX_EOC | TLAN_ID_RX_EOC;
2251 TLan_DioWrite8( dev->base_addr, TLAN_INT_DIS, data8 ); 2339 tlan_dio_write8(dev->base_addr, TLAN_INT_DIS, data8);
2252 } 2340 }
2253 TLan_PhyDetect( dev ); 2341 tlan_phy_detect(dev);
2254 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN; 2342 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN;
2255 2343
2256 if ( priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY ) { 2344 if (priv->adapter->flags & TLAN_ADAPTER_BIT_RATE_PHY) {
2257 data |= TLAN_NET_CFG_BIT; 2345 data |= TLAN_NET_CFG_BIT;
2258 if ( priv->aui == 1 ) { 2346 if (priv->aui == 1) {
2259 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x0a ); 2347 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x0a);
2260 } else if ( priv->duplex == TLAN_DUPLEX_FULL ) { 2348 } else if (priv->duplex == TLAN_DUPLEX_FULL) {
2261 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x00 ); 2349 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x00);
2262 priv->tlanFullDuplex = true; 2350 priv->tlan_full_duplex = true;
2263 } else { 2351 } else {
2264 TLan_DioWrite8( dev->base_addr, TLAN_ACOMMIT, 0x08 ); 2352 tlan_dio_write8(dev->base_addr, TLAN_ACOMMIT, 0x08);
2265 } 2353 }
2266 } 2354 }
2267 2355
2268 if ( priv->phyNum == 0 ) { 2356 if (priv->phy_num == 0)
2269 data |= TLAN_NET_CFG_PHY_EN; 2357 data |= TLAN_NET_CFG_PHY_EN;
2270 } 2358 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, (u16) data);
2271 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, (u16) data );
2272 2359
2273 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) { 2360 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY)
2274 TLan_FinishReset( dev ); 2361 tlan_finish_reset(dev);
2275 } else { 2362 else
2276 TLan_PhyPowerDown( dev ); 2363 tlan_phy_power_down(dev);
2277 }
2278 2364
2279} /* TLan_ResetAdapter */ 2365}
2280 2366
2281 2367
2282 2368
2283 2369
2284static void 2370static void
2285TLan_FinishReset( struct net_device *dev ) 2371tlan_finish_reset(struct net_device *dev)
2286{ 2372{
2287 TLanPrivateInfo *priv = netdev_priv(dev); 2373 struct tlan_priv *priv = netdev_priv(dev);
2288 u8 data; 2374 u8 data;
2289 u32 phy; 2375 u32 phy;
2290 u8 sio; 2376 u8 sio;
2291 u16 status; 2377 u16 status;
2292 u16 partner; 2378 u16 partner;
2293 u16 tlphy_ctl; 2379 u16 tlphy_ctl;
2294 u16 tlphy_par; 2380 u16 tlphy_par;
2295 u16 tlphy_id1, tlphy_id2; 2381 u16 tlphy_id1, tlphy_id2;
2296 int i; 2382 int i;
2297 2383
2298 phy = priv->phy[priv->phyNum]; 2384 phy = priv->phy[priv->phy_num];
2299 2385
2300 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP; 2386 data = TLAN_NET_CMD_NRESET | TLAN_NET_CMD_NWRAP;
2301 if ( priv->tlanFullDuplex ) { 2387 if (priv->tlan_full_duplex)
2302 data |= TLAN_NET_CMD_DUPLEX; 2388 data |= TLAN_NET_CMD_DUPLEX;
2303 } 2389 tlan_dio_write8(dev->base_addr, TLAN_NET_CMD, data);
2304 TLan_DioWrite8( dev->base_addr, TLAN_NET_CMD, data );
2305 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5; 2390 data = TLAN_NET_MASK_MASK4 | TLAN_NET_MASK_MASK5;
2306 if ( priv->phyNum == 0 ) { 2391 if (priv->phy_num == 0)
2307 data |= TLAN_NET_MASK_MASK7; 2392 data |= TLAN_NET_MASK_MASK7;
2308 } 2393 tlan_dio_write8(dev->base_addr, TLAN_NET_MASK, data);
2309 TLan_DioWrite8( dev->base_addr, TLAN_NET_MASK, data ); 2394 tlan_dio_write16(dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7);
2310 TLan_DioWrite16( dev->base_addr, TLAN_MAX_RX, ((1536)+7)&~7 ); 2395 tlan_mii_read_reg(dev, phy, MII_GEN_ID_HI, &tlphy_id1);
2311 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &tlphy_id1 ); 2396 tlan_mii_read_reg(dev, phy, MII_GEN_ID_LO, &tlphy_id2);
2312 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &tlphy_id2 );
2313 2397
2314 if ( ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) || 2398 if ((priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) ||
2315 ( priv->aui ) ) { 2399 (priv->aui)) {
2316 status = MII_GS_LINK; 2400 status = MII_GS_LINK;
2317 printk( "TLAN: %s: Link forced.\n", dev->name ); 2401 pr_info("TLAN: %s: Link forced.\n", dev->name);
2318 } else { 2402 } else {
2319 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 2403 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2320 udelay( 1000 ); 2404 udelay(1000);
2321 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 2405 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2322 if ( (status & MII_GS_LINK) && 2406 if ((status & MII_GS_LINK) &&
2323 /* We only support link info on Nat.Sem. PHY's */ 2407 /* We only support link info on Nat.Sem. PHY's */
2324 (tlphy_id1 == NAT_SEM_ID1) && 2408 (tlphy_id1 == NAT_SEM_ID1) &&
2325 (tlphy_id2 == NAT_SEM_ID2) ) { 2409 (tlphy_id2 == NAT_SEM_ID2)) {
2326 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &partner ); 2410 tlan_mii_read_reg(dev, phy, MII_AN_LPA, &partner);
2327 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_PAR, &tlphy_par ); 2411 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_PAR, &tlphy_par);
2328 2412
2329 printk( "TLAN: %s: Link active with ", dev->name ); 2413 pr_info("TLAN: %s: Link active with ", dev->name);
2330 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) { 2414 if (!(tlphy_par & TLAN_PHY_AN_EN_STAT)) {
2331 printk( "forced 10%sMbps %s-Duplex\n", 2415 pr_info("forced 10%sMbps %s-Duplex\n",
2332 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0", 2416 tlphy_par & TLAN_PHY_SPEED_100
2333 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half"); 2417 ? "" : "0",
2418 tlphy_par & TLAN_PHY_DUPLEX_FULL
2419 ? "Full" : "Half");
2334 } else { 2420 } else {
2335 printk( "AutoNegotiation enabled, at 10%sMbps %s-Duplex\n", 2421 pr_info("Autonegotiation enabled, at 10%sMbps %s-Duplex\n",
2336 tlphy_par & TLAN_PHY_SPEED_100 ? "" : "0", 2422 tlphy_par & TLAN_PHY_SPEED_100
2337 tlphy_par & TLAN_PHY_DUPLEX_FULL ? "Full" : "Half"); 2423 ? "" : "0",
2338 printk("TLAN: Partner capability: "); 2424 tlphy_par & TLAN_PHY_DUPLEX_FULL
2339 for (i = 5; i <= 10; i++) 2425 ? "Full" : "half");
2340 if (partner & (1<<i)) 2426 pr_info("TLAN: Partner capability: ");
2341 printk("%s",media[i-5]); 2427 for (i = 5; i <= 10; i++)
2428 if (partner & (1<<i))
2429 printk("%s", media[i-5]);
2342 printk("\n"); 2430 printk("\n");
2343 } 2431 }
2344 2432
2345 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK ); 2433 tlan_dio_write8(dev->base_addr, TLAN_LED_REG,
2434 TLAN_LED_LINK);
2346#ifdef MONITOR 2435#ifdef MONITOR
2347 /* We have link beat..for now anyway */ 2436 /* We have link beat..for now anyway */
2348 priv->link = 1; 2437 priv->link = 1;
2349 /*Enabling link beat monitoring */ 2438 /*Enabling link beat monitoring */
2350 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_LINK_BEAT ); 2439 tlan_set_timer(dev, (10*HZ), TLAN_TIMER_LINK_BEAT);
2351#endif 2440#endif
2352 } else if (status & MII_GS_LINK) { 2441 } else if (status & MII_GS_LINK) {
2353 printk( "TLAN: %s: Link active\n", dev->name ); 2442 pr_info("TLAN: %s: Link active\n", dev->name);
2354 TLan_DioWrite8( dev->base_addr, TLAN_LED_REG, TLAN_LED_LINK ); 2443 tlan_dio_write8(dev->base_addr, TLAN_LED_REG,
2444 TLAN_LED_LINK);
2355 } 2445 }
2356 } 2446 }
2357 2447
2358 if ( priv->phyNum == 0 ) { 2448 if (priv->phy_num == 0) {
2359 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl ); 2449 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tlphy_ctl);
2360 tlphy_ctl |= TLAN_TC_INTEN; 2450 tlphy_ctl |= TLAN_TC_INTEN;
2361 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tlphy_ctl ); 2451 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, tlphy_ctl);
2362 sio = TLan_DioRead8( dev->base_addr, TLAN_NET_SIO ); 2452 sio = tlan_dio_read8(dev->base_addr, TLAN_NET_SIO);
2363 sio |= TLAN_NET_SIO_MINTEN; 2453 sio |= TLAN_NET_SIO_MINTEN;
2364 TLan_DioWrite8( dev->base_addr, TLAN_NET_SIO, sio ); 2454 tlan_dio_write8(dev->base_addr, TLAN_NET_SIO, sio);
2365 } 2455 }
2366 2456
2367 if ( status & MII_GS_LINK ) { 2457 if (status & MII_GS_LINK) {
2368 TLan_SetMac( dev, 0, dev->dev_addr ); 2458 tlan_set_mac(dev, 0, dev->dev_addr);
2369 priv->phyOnline = 1; 2459 priv->phy_online = 1;
2370 outb( ( TLAN_HC_INT_ON >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 ); 2460 outb((TLAN_HC_INT_ON >> 8), dev->base_addr + TLAN_HOST_CMD + 1);
2371 if ( debug >= 1 && debug != TLAN_DEBUG_PROBE ) { 2461 if (debug >= 1 && debug != TLAN_DEBUG_PROBE)
2372 outb( ( TLAN_HC_REQ_INT >> 8 ), dev->base_addr + TLAN_HOST_CMD + 1 ); 2462 outb((TLAN_HC_REQ_INT >> 8),
2373 } 2463 dev->base_addr + TLAN_HOST_CMD + 1);
2374 outl( priv->rxListDMA, dev->base_addr + TLAN_CH_PARM ); 2464 outl(priv->rx_list_dma, dev->base_addr + TLAN_CH_PARM);
2375 outl( TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD ); 2465 outl(TLAN_HC_GO | TLAN_HC_RT, dev->base_addr + TLAN_HOST_CMD);
2376 netif_carrier_on(dev); 2466 netif_carrier_on(dev);
2377 } else { 2467 } else {
2378 printk( "TLAN: %s: Link inactive, will retry in 10 secs...\n", 2468 pr_info("TLAN: %s: Link inactive, will retry in 10 secs...\n",
2379 dev->name ); 2469 dev->name);
2380 TLan_SetTimer( dev, (10*HZ), TLAN_TIMER_FINISH_RESET ); 2470 tlan_set_timer(dev, (10*HZ), TLAN_TIMER_FINISH_RESET);
2381 return; 2471 return;
2382 } 2472 }
2383 TLan_SetMulticastList(dev); 2473 tlan_set_multicast_list(dev);
2384 2474
2385} /* TLan_FinishReset */ 2475}
2386 2476
2387 2477
2388 2478
2389 2479
2390 /*************************************************************** 2480/***************************************************************
2391 * TLan_SetMac 2481 * tlan_set_mac
2392 * 2482 *
2393 * Returns: 2483 * Returns:
2394 * Nothing 2484 * Nothing
2395 * Parms: 2485 * Parms:
2396 * dev Pointer to device structure of adapter 2486 * dev Pointer to device structure of adapter
2397 * on which to change the AREG. 2487 * on which to change the AREG.
2398 * areg The AREG to set the address in (0 - 3). 2488 * areg The AREG to set the address in (0 - 3).
2399 * mac A pointer to an array of chars. Each 2489 * mac A pointer to an array of chars. Each
2400 * element stores one byte of the address. 2490 * element stores one byte of the address.
2401 * IE, it isn't in ascii. 2491 * IE, it isn't in ascii.
2402 * 2492 *
2403 * This function transfers a MAC address to one of the 2493 * This function transfers a MAC address to one of the
2404 * TLAN AREGs (address registers). The TLAN chip locks 2494 * TLAN AREGs (address registers). The TLAN chip locks
2405 * the register on writing to offset 0 and unlocks the 2495 * the register on writing to offset 0 and unlocks the
2406 * register after writing to offset 5. If NULL is passed 2496 * register after writing to offset 5. If NULL is passed
2407 * in mac, then the AREG is filled with 0's. 2497 * in mac, then the AREG is filled with 0's.
2408 * 2498 *
2409 **************************************************************/ 2499 **************************************************************/
2410 2500
2411static void TLan_SetMac( struct net_device *dev, int areg, char *mac ) 2501static void tlan_set_mac(struct net_device *dev, int areg, char *mac)
2412{ 2502{
2413 int i; 2503 int i;
2414 2504
2415 areg *= 6; 2505 areg *= 6;
2416 2506
2417 if ( mac != NULL ) { 2507 if (mac != NULL) {
2418 for ( i = 0; i < 6; i++ ) 2508 for (i = 0; i < 6; i++)
2419 TLan_DioWrite8( dev->base_addr, 2509 tlan_dio_write8(dev->base_addr,
2420 TLAN_AREG_0 + areg + i, mac[i] ); 2510 TLAN_AREG_0 + areg + i, mac[i]);
2421 } else { 2511 } else {
2422 for ( i = 0; i < 6; i++ ) 2512 for (i = 0; i < 6; i++)
2423 TLan_DioWrite8( dev->base_addr, 2513 tlan_dio_write8(dev->base_addr,
2424 TLAN_AREG_0 + areg + i, 0 ); 2514 TLAN_AREG_0 + areg + i, 0);
2425 } 2515 }
2426 2516
2427} /* TLan_SetMac */ 2517}
2428 2518
2429 2519
2430 2520
@@ -2432,205 +2522,202 @@ static void TLan_SetMac( struct net_device *dev, int areg, char *mac )
2432/***************************************************************************** 2522/*****************************************************************************
2433****************************************************************************** 2523******************************************************************************
2434 2524
2435 ThunderLAN Driver PHY Layer Routines 2525ThunderLAN driver PHY layer routines
2436 2526
2437****************************************************************************** 2527******************************************************************************
2438*****************************************************************************/ 2528*****************************************************************************/
2439 2529
2440 2530
2441 2531
2442 /********************************************************************* 2532/*********************************************************************
2443 * TLan_PhyPrint 2533 * tlan_phy_print
2444 * 2534 *
2445 * Returns: 2535 * Returns:
2446 * Nothing 2536 * Nothing
2447 * Parms: 2537 * Parms:
2448 * dev A pointer to the device structure of the 2538 * dev A pointer to the device structure of the
2449 * TLAN device having the PHYs to be detailed. 2539 * TLAN device having the PHYs to be detailed.
2450 * 2540 *
2451 * This function prints the registers a PHY (aka transceiver). 2541 * This function prints the registers a PHY (aka transceiver).
2452 * 2542 *
2453 ********************************************************************/ 2543 ********************************************************************/
2454 2544
2455static void TLan_PhyPrint( struct net_device *dev ) 2545static void tlan_phy_print(struct net_device *dev)
2456{ 2546{
2457 TLanPrivateInfo *priv = netdev_priv(dev); 2547 struct tlan_priv *priv = netdev_priv(dev);
2458 u16 i, data0, data1, data2, data3, phy; 2548 u16 i, data0, data1, data2, data3, phy;
2459 2549
2460 phy = priv->phy[priv->phyNum]; 2550 phy = priv->phy[priv->phy_num];
2461 2551
2462 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) { 2552 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) {
2463 printk( "TLAN: Device %s, Unmanaged PHY.\n", dev->name ); 2553 pr_info("TLAN: Device %s, Unmanaged PHY.\n", dev->name);
2464 } else if ( phy <= TLAN_PHY_MAX_ADDR ) { 2554 } else if (phy <= TLAN_PHY_MAX_ADDR) {
2465 printk( "TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy ); 2555 pr_info("TLAN: Device %s, PHY 0x%02x.\n", dev->name, phy);
2466 printk( "TLAN: Off. +0 +1 +2 +3\n" ); 2556 pr_info("TLAN: Off. +0 +1 +2 +3\n");
2467 for ( i = 0; i < 0x20; i+= 4 ) { 2557 for (i = 0; i < 0x20; i += 4) {
2468 printk( "TLAN: 0x%02x", i ); 2558 pr_info("TLAN: 0x%02x", i);
2469 TLan_MiiReadReg( dev, phy, i, &data0 ); 2559 tlan_mii_read_reg(dev, phy, i, &data0);
2470 printk( " 0x%04hx", data0 ); 2560 printk(" 0x%04hx", data0);
2471 TLan_MiiReadReg( dev, phy, i + 1, &data1 ); 2561 tlan_mii_read_reg(dev, phy, i + 1, &data1);
2472 printk( " 0x%04hx", data1 ); 2562 printk(" 0x%04hx", data1);
2473 TLan_MiiReadReg( dev, phy, i + 2, &data2 ); 2563 tlan_mii_read_reg(dev, phy, i + 2, &data2);
2474 printk( " 0x%04hx", data2 ); 2564 printk(" 0x%04hx", data2);
2475 TLan_MiiReadReg( dev, phy, i + 3, &data3 ); 2565 tlan_mii_read_reg(dev, phy, i + 3, &data3);
2476 printk( " 0x%04hx\n", data3 ); 2566 printk(" 0x%04hx\n", data3);
2477 } 2567 }
2478 } else { 2568 } else {
2479 printk( "TLAN: Device %s, Invalid PHY.\n", dev->name ); 2569 pr_info("TLAN: Device %s, Invalid PHY.\n", dev->name);
2480 } 2570 }
2481 2571
2482} /* TLan_PhyPrint */ 2572}
2483 2573
2484 2574
2485 2575
2486 2576
2487 /********************************************************************* 2577/*********************************************************************
2488 * TLan_PhyDetect 2578 * tlan_phy_detect
2489 * 2579 *
2490 * Returns: 2580 * Returns:
2491 * Nothing 2581 * Nothing
2492 * Parms: 2582 * Parms:
2493 * dev A pointer to the device structure of the adapter 2583 * dev A pointer to the device structure of the adapter
2494 * for which the PHY needs determined. 2584 * for which the PHY needs determined.
2495 * 2585 *
2496 * So far I've found that adapters which have external PHYs 2586 * So far I've found that adapters which have external PHYs
2497 * may also use the internal PHY for part of the functionality. 2587 * may also use the internal PHY for part of the functionality.
2498 * (eg, AUI/Thinnet). This function finds out if this TLAN 2588 * (eg, AUI/Thinnet). This function finds out if this TLAN
2499 * chip has an internal PHY, and then finds the first external 2589 * chip has an internal PHY, and then finds the first external
2500 * PHY (starting from address 0) if it exists). 2590 * PHY (starting from address 0) if it exists).
2501 * 2591 *
2502 ********************************************************************/ 2592 ********************************************************************/
2503 2593
2504static void TLan_PhyDetect( struct net_device *dev ) 2594static void tlan_phy_detect(struct net_device *dev)
2505{ 2595{
2506 TLanPrivateInfo *priv = netdev_priv(dev); 2596 struct tlan_priv *priv = netdev_priv(dev);
2507 u16 control; 2597 u16 control;
2508 u16 hi; 2598 u16 hi;
2509 u16 lo; 2599 u16 lo;
2510 u32 phy; 2600 u32 phy;
2511 2601
2512 if ( priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY ) { 2602 if (priv->adapter->flags & TLAN_ADAPTER_UNMANAGED_PHY) {
2513 priv->phyNum = 0xFFFF; 2603 priv->phy_num = 0xffff;
2514 return; 2604 return;
2515 } 2605 }
2516 2606
2517 TLan_MiiReadReg( dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi ); 2607 tlan_mii_read_reg(dev, TLAN_PHY_MAX_ADDR, MII_GEN_ID_HI, &hi);
2518 2608
2519 if ( hi != 0xFFFF ) { 2609 if (hi != 0xffff)
2520 priv->phy[0] = TLAN_PHY_MAX_ADDR; 2610 priv->phy[0] = TLAN_PHY_MAX_ADDR;
2521 } else { 2611 else
2522 priv->phy[0] = TLAN_PHY_NONE; 2612 priv->phy[0] = TLAN_PHY_NONE;
2523 }
2524 2613
2525 priv->phy[1] = TLAN_PHY_NONE; 2614 priv->phy[1] = TLAN_PHY_NONE;
2526 for ( phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++ ) { 2615 for (phy = 0; phy <= TLAN_PHY_MAX_ADDR; phy++) {
2527 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &control ); 2616 tlan_mii_read_reg(dev, phy, MII_GEN_CTL, &control);
2528 TLan_MiiReadReg( dev, phy, MII_GEN_ID_HI, &hi ); 2617 tlan_mii_read_reg(dev, phy, MII_GEN_ID_HI, &hi);
2529 TLan_MiiReadReg( dev, phy, MII_GEN_ID_LO, &lo ); 2618 tlan_mii_read_reg(dev, phy, MII_GEN_ID_LO, &lo);
2530 if ( ( control != 0xFFFF ) || 2619 if ((control != 0xffff) ||
2531 ( hi != 0xFFFF ) || ( lo != 0xFFFF ) ) { 2620 (hi != 0xffff) || (lo != 0xffff)) {
2532 TLAN_DBG( TLAN_DEBUG_GNRL, 2621 TLAN_DBG(TLAN_DEBUG_GNRL,
2533 "PHY found at %02x %04x %04x %04x\n", 2622 "PHY found at %02x %04x %04x %04x\n",
2534 phy, control, hi, lo ); 2623 phy, control, hi, lo);
2535 if ( ( priv->phy[1] == TLAN_PHY_NONE ) && 2624 if ((priv->phy[1] == TLAN_PHY_NONE) &&
2536 ( phy != TLAN_PHY_MAX_ADDR ) ) { 2625 (phy != TLAN_PHY_MAX_ADDR)) {
2537 priv->phy[1] = phy; 2626 priv->phy[1] = phy;
2538 } 2627 }
2539 } 2628 }
2540 } 2629 }
2541 2630
2542 if ( priv->phy[1] != TLAN_PHY_NONE ) { 2631 if (priv->phy[1] != TLAN_PHY_NONE)
2543 priv->phyNum = 1; 2632 priv->phy_num = 1;
2544 } else if ( priv->phy[0] != TLAN_PHY_NONE ) { 2633 else if (priv->phy[0] != TLAN_PHY_NONE)
2545 priv->phyNum = 0; 2634 priv->phy_num = 0;
2546 } else { 2635 else
2547 printk( "TLAN: Cannot initialize device, no PHY was found!\n" ); 2636 pr_info("TLAN: Cannot initialize device, no PHY was found!\n");
2548 }
2549 2637
2550} /* TLan_PhyDetect */ 2638}
2551 2639
2552 2640
2553 2641
2554 2642
2555static void TLan_PhyPowerDown( struct net_device *dev ) 2643static void tlan_phy_power_down(struct net_device *dev)
2556{ 2644{
2557 TLanPrivateInfo *priv = netdev_priv(dev); 2645 struct tlan_priv *priv = netdev_priv(dev);
2558 u16 value; 2646 u16 value;
2559 2647
2560 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name ); 2648 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Powering down PHY(s).\n", dev->name);
2561 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE; 2649 value = MII_GC_PDOWN | MII_GC_LOOPBK | MII_GC_ISOLATE;
2562 TLan_MiiSync( dev->base_addr ); 2650 tlan_mii_sync(dev->base_addr);
2563 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value ); 2651 tlan_mii_write_reg(dev, priv->phy[priv->phy_num], MII_GEN_CTL, value);
2564 if ( ( priv->phyNum == 0 ) && 2652 if ((priv->phy_num == 0) &&
2565 ( priv->phy[1] != TLAN_PHY_NONE ) && 2653 (priv->phy[1] != TLAN_PHY_NONE) &&
2566 ( ! ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) ) ) { 2654 (!(priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10))) {
2567 TLan_MiiSync( dev->base_addr ); 2655 tlan_mii_sync(dev->base_addr);
2568 TLan_MiiWriteReg( dev, priv->phy[1], MII_GEN_CTL, value ); 2656 tlan_mii_write_reg(dev, priv->phy[1], MII_GEN_CTL, value);
2569 } 2657 }
2570 2658
2571 /* Wait for 50 ms and powerup 2659 /* Wait for 50 ms and powerup
2572 * This is abitrary. It is intended to make sure the 2660 * This is abitrary. It is intended to make sure the
2573 * transceiver settles. 2661 * transceiver settles.
2574 */ 2662 */
2575 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_PUP ); 2663 tlan_set_timer(dev, (HZ/20), TLAN_TIMER_PHY_PUP);
2576 2664
2577} /* TLan_PhyPowerDown */ 2665}
2578 2666
2579 2667
2580 2668
2581 2669
2582static void TLan_PhyPowerUp( struct net_device *dev ) 2670static void tlan_phy_power_up(struct net_device *dev)
2583{ 2671{
2584 TLanPrivateInfo *priv = netdev_priv(dev); 2672 struct tlan_priv *priv = netdev_priv(dev);
2585 u16 value; 2673 u16 value;
2586 2674
2587 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name ); 2675 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Powering up PHY.\n", dev->name);
2588 TLan_MiiSync( dev->base_addr ); 2676 tlan_mii_sync(dev->base_addr);
2589 value = MII_GC_LOOPBK; 2677 value = MII_GC_LOOPBK;
2590 TLan_MiiWriteReg( dev, priv->phy[priv->phyNum], MII_GEN_CTL, value ); 2678 tlan_mii_write_reg(dev, priv->phy[priv->phy_num], MII_GEN_CTL, value);
2591 TLan_MiiSync(dev->base_addr); 2679 tlan_mii_sync(dev->base_addr);
2592 /* Wait for 500 ms and reset the 2680 /* Wait for 500 ms and reset the
2593 * transceiver. The TLAN docs say both 50 ms and 2681 * transceiver. The TLAN docs say both 50 ms and
2594 * 500 ms, so do the longer, just in case. 2682 * 500 ms, so do the longer, just in case.
2595 */ 2683 */
2596 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_RESET ); 2684 tlan_set_timer(dev, (HZ/20), TLAN_TIMER_PHY_RESET);
2597 2685
2598} /* TLan_PhyPowerUp */ 2686}
2599 2687
2600 2688
2601 2689
2602 2690
2603static void TLan_PhyReset( struct net_device *dev ) 2691static void tlan_phy_reset(struct net_device *dev)
2604{ 2692{
2605 TLanPrivateInfo *priv = netdev_priv(dev); 2693 struct tlan_priv *priv = netdev_priv(dev);
2606 u16 phy; 2694 u16 phy;
2607 u16 value; 2695 u16 value;
2608 2696
2609 phy = priv->phy[priv->phyNum]; 2697 phy = priv->phy[priv->phy_num];
2610 2698
2611 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name ); 2699 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Reseting PHY.\n", dev->name);
2612 TLan_MiiSync( dev->base_addr ); 2700 tlan_mii_sync(dev->base_addr);
2613 value = MII_GC_LOOPBK | MII_GC_RESET; 2701 value = MII_GC_LOOPBK | MII_GC_RESET;
2614 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, value ); 2702 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, value);
2615 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value ); 2703 tlan_mii_read_reg(dev, phy, MII_GEN_CTL, &value);
2616 while ( value & MII_GC_RESET ) { 2704 while (value & MII_GC_RESET)
2617 TLan_MiiReadReg( dev, phy, MII_GEN_CTL, &value ); 2705 tlan_mii_read_reg(dev, phy, MII_GEN_CTL, &value);
2618 }
2619 2706
2620 /* Wait for 500 ms and initialize. 2707 /* Wait for 500 ms and initialize.
2621 * I don't remember why I wait this long. 2708 * I don't remember why I wait this long.
2622 * I've changed this to 50ms, as it seems long enough. 2709 * I've changed this to 50ms, as it seems long enough.
2623 */ 2710 */
2624 TLan_SetTimer( dev, (HZ/20), TLAN_TIMER_PHY_START_LINK ); 2711 tlan_set_timer(dev, (HZ/20), TLAN_TIMER_PHY_START_LINK);
2625 2712
2626} /* TLan_PhyReset */ 2713}
2627 2714
2628 2715
2629 2716
2630 2717
2631static void TLan_PhyStartLink( struct net_device *dev ) 2718static void tlan_phy_start_link(struct net_device *dev)
2632{ 2719{
2633 TLanPrivateInfo *priv = netdev_priv(dev); 2720 struct tlan_priv *priv = netdev_priv(dev);
2634 u16 ability; 2721 u16 ability;
2635 u16 control; 2722 u16 control;
2636 u16 data; 2723 u16 data;
@@ -2638,86 +2725,88 @@ static void TLan_PhyStartLink( struct net_device *dev )
2638 u16 status; 2725 u16 status;
2639 u16 tctl; 2726 u16 tctl;
2640 2727
2641 phy = priv->phy[priv->phyNum]; 2728 phy = priv->phy[priv->phy_num];
2642 TLAN_DBG( TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name ); 2729 TLAN_DBG(TLAN_DEBUG_GNRL, "%s: Trying to activate link.\n", dev->name);
2643 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 2730 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2644 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &ability ); 2731 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &ability);
2645 2732
2646 if ( ( status & MII_GS_AUTONEG ) && 2733 if ((status & MII_GS_AUTONEG) &&
2647 ( ! priv->aui ) ) { 2734 (!priv->aui)) {
2648 ability = status >> 11; 2735 ability = status >> 11;
2649 if ( priv->speed == TLAN_SPEED_10 && 2736 if (priv->speed == TLAN_SPEED_10 &&
2650 priv->duplex == TLAN_DUPLEX_HALF) { 2737 priv->duplex == TLAN_DUPLEX_HALF) {
2651 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0000); 2738 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x0000);
2652 } else if ( priv->speed == TLAN_SPEED_10 && 2739 } else if (priv->speed == TLAN_SPEED_10 &&
2653 priv->duplex == TLAN_DUPLEX_FULL) { 2740 priv->duplex == TLAN_DUPLEX_FULL) {
2654 priv->tlanFullDuplex = true; 2741 priv->tlan_full_duplex = true;
2655 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x0100); 2742 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x0100);
2656 } else if ( priv->speed == TLAN_SPEED_100 && 2743 } else if (priv->speed == TLAN_SPEED_100 &&
2657 priv->duplex == TLAN_DUPLEX_HALF) { 2744 priv->duplex == TLAN_DUPLEX_HALF) {
2658 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2000); 2745 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x2000);
2659 } else if ( priv->speed == TLAN_SPEED_100 && 2746 } else if (priv->speed == TLAN_SPEED_100 &&
2660 priv->duplex == TLAN_DUPLEX_FULL) { 2747 priv->duplex == TLAN_DUPLEX_FULL) {
2661 priv->tlanFullDuplex = true; 2748 priv->tlan_full_duplex = true;
2662 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x2100); 2749 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x2100);
2663 } else { 2750 } else {
2664 2751
2665 /* Set Auto-Neg advertisement */ 2752 /* Set Auto-Neg advertisement */
2666 TLan_MiiWriteReg( dev, phy, MII_AN_ADV, (ability << 5) | 1); 2753 tlan_mii_write_reg(dev, phy, MII_AN_ADV,
2754 (ability << 5) | 1);
2667 /* Enablee Auto-Neg */ 2755 /* Enablee Auto-Neg */
2668 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1000 ); 2756 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x1000);
2669 /* Restart Auto-Neg */ 2757 /* Restart Auto-Neg */
2670 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 0x1200 ); 2758 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, 0x1200);
2671 /* Wait for 4 sec for autonegotiation 2759 /* Wait for 4 sec for autonegotiation
2672 * to complete. The max spec time is less than this 2760 * to complete. The max spec time is less than this
2673 * but the card need additional time to start AN. 2761 * but the card need additional time to start AN.
2674 * .5 sec should be plenty extra. 2762 * .5 sec should be plenty extra.
2675 */ 2763 */
2676 printk( "TLAN: %s: Starting autonegotiation.\n", dev->name ); 2764 pr_info("TLAN: %s: Starting autonegotiation.\n",
2677 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN ); 2765 dev->name);
2766 tlan_set_timer(dev, (2*HZ), TLAN_TIMER_PHY_FINISH_AN);
2678 return; 2767 return;
2679 } 2768 }
2680 2769
2681 } 2770 }
2682 2771
2683 if ( ( priv->aui ) && ( priv->phyNum != 0 ) ) { 2772 if ((priv->aui) && (priv->phy_num != 0)) {
2684 priv->phyNum = 0; 2773 priv->phy_num = 0;
2685 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN; 2774 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN
2686 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data ); 2775 | TLAN_NET_CFG_PHY_EN;
2687 TLan_SetTimer( dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN ); 2776 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, data);
2777 tlan_set_timer(dev, (40*HZ/1000), TLAN_TIMER_PHY_PDOWN);
2688 return; 2778 return;
2689 } else if ( priv->phyNum == 0 ) { 2779 } else if (priv->phy_num == 0) {
2690 control = 0; 2780 control = 0;
2691 TLan_MiiReadReg( dev, phy, TLAN_TLPHY_CTL, &tctl ); 2781 tlan_mii_read_reg(dev, phy, TLAN_TLPHY_CTL, &tctl);
2692 if ( priv->aui ) { 2782 if (priv->aui) {
2693 tctl |= TLAN_TC_AUISEL; 2783 tctl |= TLAN_TC_AUISEL;
2694 } else { 2784 } else {
2695 tctl &= ~TLAN_TC_AUISEL; 2785 tctl &= ~TLAN_TC_AUISEL;
2696 if ( priv->duplex == TLAN_DUPLEX_FULL ) { 2786 if (priv->duplex == TLAN_DUPLEX_FULL) {
2697 control |= MII_GC_DUPLEX; 2787 control |= MII_GC_DUPLEX;
2698 priv->tlanFullDuplex = true; 2788 priv->tlan_full_duplex = true;
2699 } 2789 }
2700 if ( priv->speed == TLAN_SPEED_100 ) { 2790 if (priv->speed == TLAN_SPEED_100)
2701 control |= MII_GC_SPEEDSEL; 2791 control |= MII_GC_SPEEDSEL;
2702 }
2703 } 2792 }
2704 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, control ); 2793 tlan_mii_write_reg(dev, phy, MII_GEN_CTL, control);
2705 TLan_MiiWriteReg( dev, phy, TLAN_TLPHY_CTL, tctl ); 2794 tlan_mii_write_reg(dev, phy, TLAN_TLPHY_CTL, tctl);
2706 } 2795 }
2707 2796
2708 /* Wait for 2 sec to give the transceiver time 2797 /* Wait for 2 sec to give the transceiver time
2709 * to establish link. 2798 * to establish link.
2710 */ 2799 */
2711 TLan_SetTimer( dev, (4*HZ), TLAN_TIMER_FINISH_RESET ); 2800 tlan_set_timer(dev, (4*HZ), TLAN_TIMER_FINISH_RESET);
2712 2801
2713} /* TLan_PhyStartLink */ 2802}
2714 2803
2715 2804
2716 2805
2717 2806
2718static void TLan_PhyFinishAutoNeg( struct net_device *dev ) 2807static void tlan_phy_finish_auto_neg(struct net_device *dev)
2719{ 2808{
2720 TLanPrivateInfo *priv = netdev_priv(dev); 2809 struct tlan_priv *priv = netdev_priv(dev);
2721 u16 an_adv; 2810 u16 an_adv;
2722 u16 an_lpa; 2811 u16 an_lpa;
2723 u16 data; 2812 u16 data;
@@ -2725,115 +2814,118 @@ static void TLan_PhyFinishAutoNeg( struct net_device *dev )
2725 u16 phy; 2814 u16 phy;
2726 u16 status; 2815 u16 status;
2727 2816
2728 phy = priv->phy[priv->phyNum]; 2817 phy = priv->phy[priv->phy_num];
2729 2818
2730 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 2819 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2731 udelay( 1000 ); 2820 udelay(1000);
2732 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &status ); 2821 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &status);
2733 2822
2734 if ( ! ( status & MII_GS_AUTOCMPLT ) ) { 2823 if (!(status & MII_GS_AUTOCMPLT)) {
2735 /* Wait for 8 sec to give the process 2824 /* Wait for 8 sec to give the process
2736 * more time. Perhaps we should fail after a while. 2825 * more time. Perhaps we should fail after a while.
2737 */ 2826 */
2738 if (!priv->neg_be_verbose++) { 2827 if (!priv->neg_be_verbose++) {
2739 pr_info("TLAN: Giving autonegotiation more time.\n"); 2828 pr_info("TLAN: Giving autonegotiation more time.\n");
2740 pr_info("TLAN: Please check that your adapter has\n"); 2829 pr_info("TLAN: Please check that your adapter has\n");
2741 pr_info("TLAN: been properly connected to a HUB or Switch.\n"); 2830 pr_info("TLAN: been properly connected to a HUB or Switch.\n");
2742 pr_info("TLAN: Trying to establish link in the background...\n"); 2831 pr_info("TLAN: Trying to establish link in the background...\n");
2743 } 2832 }
2744 TLan_SetTimer( dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN ); 2833 tlan_set_timer(dev, (8*HZ), TLAN_TIMER_PHY_FINISH_AN);
2745 return; 2834 return;
2746 } 2835 }
2747 2836
2748 printk( "TLAN: %s: Autonegotiation complete.\n", dev->name ); 2837 pr_info("TLAN: %s: Autonegotiation complete.\n", dev->name);
2749 TLan_MiiReadReg( dev, phy, MII_AN_ADV, &an_adv ); 2838 tlan_mii_read_reg(dev, phy, MII_AN_ADV, &an_adv);
2750 TLan_MiiReadReg( dev, phy, MII_AN_LPA, &an_lpa ); 2839 tlan_mii_read_reg(dev, phy, MII_AN_LPA, &an_lpa);
2751 mode = an_adv & an_lpa & 0x03E0; 2840 mode = an_adv & an_lpa & 0x03E0;
2752 if ( mode & 0x0100 ) { 2841 if (mode & 0x0100)
2753 priv->tlanFullDuplex = true; 2842 priv->tlan_full_duplex = true;
2754 } else if ( ! ( mode & 0x0080 ) && ( mode & 0x0040 ) ) { 2843 else if (!(mode & 0x0080) && (mode & 0x0040))
2755 priv->tlanFullDuplex = true; 2844 priv->tlan_full_duplex = true;
2756 } 2845
2757 2846 if ((!(mode & 0x0180)) &&
2758 if ( ( ! ( mode & 0x0180 ) ) && 2847 (priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10) &&
2759 ( priv->adapter->flags & TLAN_ADAPTER_USE_INTERN_10 ) && 2848 (priv->phy_num != 0)) {
2760 ( priv->phyNum != 0 ) ) { 2849 priv->phy_num = 0;
2761 priv->phyNum = 0; 2850 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN
2762 data = TLAN_NET_CFG_1FRAG | TLAN_NET_CFG_1CHAN | TLAN_NET_CFG_PHY_EN; 2851 | TLAN_NET_CFG_PHY_EN;
2763 TLan_DioWrite16( dev->base_addr, TLAN_NET_CONFIG, data ); 2852 tlan_dio_write16(dev->base_addr, TLAN_NET_CONFIG, data);
2764 TLan_SetTimer( dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN ); 2853 tlan_set_timer(dev, (400*HZ/1000), TLAN_TIMER_PHY_PDOWN);
2765 return; 2854 return;
2766 } 2855 }
2767 2856
2768 if ( priv->phyNum == 0 ) { 2857 if (priv->phy_num == 0) {
2769 if ( ( priv->duplex == TLAN_DUPLEX_FULL ) || 2858 if ((priv->duplex == TLAN_DUPLEX_FULL) ||
2770 ( an_adv & an_lpa & 0x0040 ) ) { 2859 (an_adv & an_lpa & 0x0040)) {
2771 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, 2860 tlan_mii_write_reg(dev, phy, MII_GEN_CTL,
2772 MII_GC_AUTOENB | MII_GC_DUPLEX ); 2861 MII_GC_AUTOENB | MII_GC_DUPLEX);
2773 pr_info("TLAN: Starting internal PHY with FULL-DUPLEX\n" ); 2862 pr_info("TLAN: Starting internal PHY with FULL-DUPLEX\n");
2774 } else { 2863 } else {
2775 TLan_MiiWriteReg( dev, phy, MII_GEN_CTL, MII_GC_AUTOENB ); 2864 tlan_mii_write_reg(dev, phy, MII_GEN_CTL,
2776 pr_info( "TLAN: Starting internal PHY with HALF-DUPLEX\n" ); 2865 MII_GC_AUTOENB);
2866 pr_info("TLAN: Starting internal PHY with HALF-DUPLEX\n");
2777 } 2867 }
2778 } 2868 }
2779 2869
2780 /* Wait for 100 ms. No reason in partiticular. 2870 /* Wait for 100 ms. No reason in partiticular.
2781 */ 2871 */
2782 TLan_SetTimer( dev, (HZ/10), TLAN_TIMER_FINISH_RESET ); 2872 tlan_set_timer(dev, (HZ/10), TLAN_TIMER_FINISH_RESET);
2783 2873
2784} /* TLan_PhyFinishAutoNeg */ 2874}
2785 2875
2786#ifdef MONITOR 2876#ifdef MONITOR
2787 2877
2788 /********************************************************************* 2878/*********************************************************************
2789 * 2879 *
2790 * TLan_phyMonitor 2880 * tlan_phy_monitor
2791 * 2881 *
2792 * Returns: 2882 * Returns:
2793 * None 2883 * None
2794 * 2884 *
2795 * Params: 2885 * Params:
2796 * dev The device structure of this device. 2886 * dev The device structure of this device.
2797 * 2887 *
2798 * 2888 *
2799 * This function monitors PHY condition by reading the status 2889 * This function monitors PHY condition by reading the status
2800 * register via the MII bus. This can be used to give info 2890 * register via the MII bus. This can be used to give info
2801 * about link changes (up/down), and possible switch to alternate 2891 * about link changes (up/down), and possible switch to alternate
2802 * media. 2892 * media.
2803 * 2893 *
2804 * ******************************************************************/ 2894 *******************************************************************/
2805 2895
2806void TLan_PhyMonitor( struct net_device *dev ) 2896void tlan_phy_monitor(struct net_device *dev)
2807{ 2897{
2808 TLanPrivateInfo *priv = netdev_priv(dev); 2898 struct tlan_priv *priv = netdev_priv(dev);
2809 u16 phy; 2899 u16 phy;
2810 u16 phy_status; 2900 u16 phy_status;
2811 2901
2812 phy = priv->phy[priv->phyNum]; 2902 phy = priv->phy[priv->phy_num];
2813 2903
2814 /* Get PHY status register */ 2904 /* Get PHY status register */
2815 TLan_MiiReadReg( dev, phy, MII_GEN_STS, &phy_status ); 2905 tlan_mii_read_reg(dev, phy, MII_GEN_STS, &phy_status);
2816 2906
2817 /* Check if link has been lost */ 2907 /* Check if link has been lost */
2818 if (!(phy_status & MII_GS_LINK)) { 2908 if (!(phy_status & MII_GS_LINK)) {
2819 if (priv->link) { 2909 if (priv->link) {
2820 priv->link = 0; 2910 priv->link = 0;
2821 printk(KERN_DEBUG "TLAN: %s has lost link\n", dev->name); 2911 printk(KERN_DEBUG "TLAN: %s has lost link\n",
2822 netif_carrier_off(dev); 2912 dev->name);
2823 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT ); 2913 netif_carrier_off(dev);
2824 return; 2914 tlan_set_timer(dev, (2*HZ), TLAN_TIMER_LINK_BEAT);
2915 return;
2825 } 2916 }
2826 } 2917 }
2827 2918
2828 /* Link restablished? */ 2919 /* Link restablished? */
2829 if ((phy_status & MII_GS_LINK) && !priv->link) { 2920 if ((phy_status & MII_GS_LINK) && !priv->link) {
2830 priv->link = 1; 2921 priv->link = 1;
2831 printk(KERN_DEBUG "TLAN: %s has reestablished link\n", dev->name); 2922 printk(KERN_DEBUG "TLAN: %s has reestablished link\n",
2923 dev->name);
2832 netif_carrier_on(dev); 2924 netif_carrier_on(dev);
2833 } 2925 }
2834 2926
2835 /* Setup a new monitor */ 2927 /* Setup a new monitor */
2836 TLan_SetTimer( dev, (2*HZ), TLAN_TIMER_LINK_BEAT ); 2928 tlan_set_timer(dev, (2*HZ), TLAN_TIMER_LINK_BEAT);
2837} 2929}
2838 2930
2839#endif /* MONITOR */ 2931#endif /* MONITOR */
@@ -2842,47 +2934,48 @@ void TLan_PhyMonitor( struct net_device *dev )
2842/***************************************************************************** 2934/*****************************************************************************
2843****************************************************************************** 2935******************************************************************************
2844 2936
2845 ThunderLAN Driver MII Routines 2937ThunderLAN driver MII routines
2846 2938
2847 These routines are based on the information in Chap. 2 of the 2939these routines are based on the information in chap. 2 of the
2848 "ThunderLAN Programmer's Guide", pp. 15-24. 2940"ThunderLAN Programmer's Guide", pp. 15-24.
2849 2941
2850****************************************************************************** 2942******************************************************************************
2851*****************************************************************************/ 2943*****************************************************************************/
2852 2944
2853 2945
2854 /*************************************************************** 2946/***************************************************************
2855 * TLan_MiiReadReg 2947 * tlan_mii_read_reg
2856 * 2948 *
2857 * Returns: 2949 * Returns:
2858 * false if ack received ok 2950 * false if ack received ok
2859 * true if no ack received or other error 2951 * true if no ack received or other error
2860 * 2952 *
2861 * Parms: 2953 * Parms:
2862 * dev The device structure containing 2954 * dev The device structure containing
2863 * The io address and interrupt count 2955 * The io address and interrupt count
2864 * for this device. 2956 * for this device.
2865 * phy The address of the PHY to be queried. 2957 * phy The address of the PHY to be queried.
2866 * reg The register whose contents are to be 2958 * reg The register whose contents are to be
2867 * retrieved. 2959 * retrieved.
2868 * val A pointer to a variable to store the 2960 * val A pointer to a variable to store the
2869 * retrieved value. 2961 * retrieved value.
2870 * 2962 *
2871 * This function uses the TLAN's MII bus to retrieve the contents 2963 * This function uses the TLAN's MII bus to retrieve the contents
2872 * of a given register on a PHY. It sends the appropriate info 2964 * of a given register on a PHY. It sends the appropriate info
2873 * and then reads the 16-bit register value from the MII bus via 2965 * and then reads the 16-bit register value from the MII bus via
2874 * the TLAN SIO register. 2966 * the TLAN SIO register.
2875 * 2967 *
2876 **************************************************************/ 2968 **************************************************************/
2877 2969
2878static bool TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val ) 2970static bool
2971tlan_mii_read_reg(struct net_device *dev, u16 phy, u16 reg, u16 *val)
2879{ 2972{
2880 u8 nack; 2973 u8 nack;
2881 u16 sio, tmp; 2974 u16 sio, tmp;
2882 u32 i; 2975 u32 i;
2883 bool err; 2976 bool err;
2884 int minten; 2977 int minten;
2885 TLanPrivateInfo *priv = netdev_priv(dev); 2978 struct tlan_priv *priv = netdev_priv(dev);
2886 unsigned long flags = 0; 2979 unsigned long flags = 0;
2887 2980
2888 err = false; 2981 err = false;
@@ -2892,48 +2985,48 @@ static bool TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val
2892 if (!in_irq()) 2985 if (!in_irq())
2893 spin_lock_irqsave(&priv->lock, flags); 2986 spin_lock_irqsave(&priv->lock, flags);
2894 2987
2895 TLan_MiiSync(dev->base_addr); 2988 tlan_mii_sync(dev->base_addr);
2896 2989
2897 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio ); 2990 minten = tlan_get_bit(TLAN_NET_SIO_MINTEN, sio);
2898 if ( minten ) 2991 if (minten)
2899 TLan_ClearBit(TLAN_NET_SIO_MINTEN, sio); 2992 tlan_clear_bit(TLAN_NET_SIO_MINTEN, sio);
2900 2993
2901 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */ 2994 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */
2902 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Read ( 10b ) */ 2995 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* read (10b) */
2903 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */ 2996 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */
2904 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */ 2997 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */
2905 2998
2906 2999
2907 TLan_ClearBit(TLAN_NET_SIO_MTXEN, sio); /* Change direction */ 3000 tlan_clear_bit(TLAN_NET_SIO_MTXEN, sio); /* change direction */
2908 3001
2909 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Clock Idle bit */ 3002 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio); /* clock idle bit */
2910 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); 3003 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2911 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Wait 300ns */ 3004 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio); /* wait 300ns */
2912 3005
2913 nack = TLan_GetBit(TLAN_NET_SIO_MDATA, sio); /* Check for ACK */ 3006 nack = tlan_get_bit(TLAN_NET_SIO_MDATA, sio); /* check for ACK */
2914 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); /* Finish ACK */ 3007 tlan_set_bit(TLAN_NET_SIO_MCLK, sio); /* finish ACK */
2915 if (nack) { /* No ACK, so fake it */ 3008 if (nack) { /* no ACK, so fake it */
2916 for (i = 0; i < 16; i++) { 3009 for (i = 0; i < 16; i++) {
2917 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); 3010 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2918 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); 3011 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2919 } 3012 }
2920 tmp = 0xffff; 3013 tmp = 0xffff;
2921 err = true; 3014 err = true;
2922 } else { /* ACK, so read data */ 3015 } else { /* ACK, so read data */
2923 for (tmp = 0, i = 0x8000; i; i >>= 1) { 3016 for (tmp = 0, i = 0x8000; i; i >>= 1) {
2924 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); 3017 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2925 if (TLan_GetBit(TLAN_NET_SIO_MDATA, sio)) 3018 if (tlan_get_bit(TLAN_NET_SIO_MDATA, sio))
2926 tmp |= i; 3019 tmp |= i;
2927 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); 3020 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2928 } 3021 }
2929 } 3022 }
2930 3023
2931 3024
2932 TLan_ClearBit(TLAN_NET_SIO_MCLK, sio); /* Idle cycle */ 3025 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio); /* idle cycle */
2933 TLan_SetBit(TLAN_NET_SIO_MCLK, sio); 3026 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2934 3027
2935 if ( minten ) 3028 if (minten)
2936 TLan_SetBit(TLAN_NET_SIO_MINTEN, sio); 3029 tlan_set_bit(TLAN_NET_SIO_MINTEN, sio);
2937 3030
2938 *val = tmp; 3031 *val = tmp;
2939 3032
@@ -2942,116 +3035,117 @@ static bool TLan_MiiReadReg( struct net_device *dev, u16 phy, u16 reg, u16 *val
2942 3035
2943 return err; 3036 return err;
2944 3037
2945} /* TLan_MiiReadReg */ 3038}
2946 3039
2947 3040
2948 3041
2949 3042
2950 /*************************************************************** 3043/***************************************************************
2951 * TLan_MiiSendData 3044 * tlan_mii_send_data
2952 * 3045 *
2953 * Returns: 3046 * Returns:
2954 * Nothing 3047 * Nothing
2955 * Parms: 3048 * Parms:
2956 * base_port The base IO port of the adapter in 3049 * base_port The base IO port of the adapter in
2957 * question. 3050 * question.
2958 * dev The address of the PHY to be queried. 3051 * dev The address of the PHY to be queried.
2959 * data The value to be placed on the MII bus. 3052 * data The value to be placed on the MII bus.
2960 * num_bits The number of bits in data that are to 3053 * num_bits The number of bits in data that are to
2961 * be placed on the MII bus. 3054 * be placed on the MII bus.
2962 * 3055 *
2963 * This function sends on sequence of bits on the MII 3056 * This function sends on sequence of bits on the MII
2964 * configuration bus. 3057 * configuration bus.
2965 * 3058 *
2966 **************************************************************/ 3059 **************************************************************/
2967 3060
2968static void TLan_MiiSendData( u16 base_port, u32 data, unsigned num_bits ) 3061static void tlan_mii_send_data(u16 base_port, u32 data, unsigned num_bits)
2969{ 3062{
2970 u16 sio; 3063 u16 sio;
2971 u32 i; 3064 u32 i;
2972 3065
2973 if ( num_bits == 0 ) 3066 if (num_bits == 0)
2974 return; 3067 return;
2975 3068
2976 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR ); 3069 outw(TLAN_NET_SIO, base_port + TLAN_DIO_ADR);
2977 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO; 3070 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
2978 TLan_SetBit( TLAN_NET_SIO_MTXEN, sio ); 3071 tlan_set_bit(TLAN_NET_SIO_MTXEN, sio);
2979 3072
2980 for ( i = ( 0x1 << ( num_bits - 1 ) ); i; i >>= 1 ) { 3073 for (i = (0x1 << (num_bits - 1)); i; i >>= 1) {
2981 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); 3074 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
2982 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio ); 3075 (void) tlan_get_bit(TLAN_NET_SIO_MCLK, sio);
2983 if ( data & i ) 3076 if (data & i)
2984 TLan_SetBit( TLAN_NET_SIO_MDATA, sio ); 3077 tlan_set_bit(TLAN_NET_SIO_MDATA, sio);
2985 else 3078 else
2986 TLan_ClearBit( TLAN_NET_SIO_MDATA, sio ); 3079 tlan_clear_bit(TLAN_NET_SIO_MDATA, sio);
2987 TLan_SetBit( TLAN_NET_SIO_MCLK, sio ); 3080 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
2988 (void) TLan_GetBit( TLAN_NET_SIO_MCLK, sio ); 3081 (void) tlan_get_bit(TLAN_NET_SIO_MCLK, sio);
2989 } 3082 }
2990 3083
2991} /* TLan_MiiSendData */ 3084}
2992 3085
2993 3086
2994 3087
2995 3088
2996 /*************************************************************** 3089/***************************************************************
2997 * TLan_MiiSync 3090 * TLan_MiiSync
2998 * 3091 *
2999 * Returns: 3092 * Returns:
3000 * Nothing 3093 * Nothing
3001 * Parms: 3094 * Parms:
3002 * base_port The base IO port of the adapter in 3095 * base_port The base IO port of the adapter in
3003 * question. 3096 * question.
3004 * 3097 *
3005 * This functions syncs all PHYs in terms of the MII configuration 3098 * This functions syncs all PHYs in terms of the MII configuration
3006 * bus. 3099 * bus.
3007 * 3100 *
3008 **************************************************************/ 3101 **************************************************************/
3009 3102
3010static void TLan_MiiSync( u16 base_port ) 3103static void tlan_mii_sync(u16 base_port)
3011{ 3104{
3012 int i; 3105 int i;
3013 u16 sio; 3106 u16 sio;
3014 3107
3015 outw( TLAN_NET_SIO, base_port + TLAN_DIO_ADR ); 3108 outw(TLAN_NET_SIO, base_port + TLAN_DIO_ADR);
3016 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO; 3109 sio = base_port + TLAN_DIO_DATA + TLAN_NET_SIO;
3017 3110
3018 TLan_ClearBit( TLAN_NET_SIO_MTXEN, sio ); 3111 tlan_clear_bit(TLAN_NET_SIO_MTXEN, sio);
3019 for ( i = 0; i < 32; i++ ) { 3112 for (i = 0; i < 32; i++) {
3020 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); 3113 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio);
3021 TLan_SetBit( TLAN_NET_SIO_MCLK, sio ); 3114 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
3022 } 3115 }
3023 3116
3024} /* TLan_MiiSync */ 3117}
3025 3118
3026 3119
3027 3120
3028 3121
3029 /*************************************************************** 3122/***************************************************************
3030 * TLan_MiiWriteReg 3123 * tlan_mii_write_reg
3031 * 3124 *
3032 * Returns: 3125 * Returns:
3033 * Nothing 3126 * Nothing
3034 * Parms: 3127 * Parms:
3035 * dev The device structure for the device 3128 * dev The device structure for the device
3036 * to write to. 3129 * to write to.
3037 * phy The address of the PHY to be written to. 3130 * phy The address of the PHY to be written to.
3038 * reg The register whose contents are to be 3131 * reg The register whose contents are to be
3039 * written. 3132 * written.
3040 * val The value to be written to the register. 3133 * val The value to be written to the register.
3041 * 3134 *
3042 * This function uses the TLAN's MII bus to write the contents of a 3135 * This function uses the TLAN's MII bus to write the contents of a
3043 * given register on a PHY. It sends the appropriate info and then 3136 * given register on a PHY. It sends the appropriate info and then
3044 * writes the 16-bit register value from the MII configuration bus 3137 * writes the 16-bit register value from the MII configuration bus
3045 * via the TLAN SIO register. 3138 * via the TLAN SIO register.
3046 * 3139 *
3047 **************************************************************/ 3140 **************************************************************/
3048 3141
3049static void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val ) 3142static void
3143tlan_mii_write_reg(struct net_device *dev, u16 phy, u16 reg, u16 val)
3050{ 3144{
3051 u16 sio; 3145 u16 sio;
3052 int minten; 3146 int minten;
3053 unsigned long flags = 0; 3147 unsigned long flags = 0;
3054 TLanPrivateInfo *priv = netdev_priv(dev); 3148 struct tlan_priv *priv = netdev_priv(dev);
3055 3149
3056 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR); 3150 outw(TLAN_NET_SIO, dev->base_addr + TLAN_DIO_ADR);
3057 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO; 3151 sio = dev->base_addr + TLAN_DIO_DATA + TLAN_NET_SIO;
@@ -3059,30 +3153,30 @@ static void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val
3059 if (!in_irq()) 3153 if (!in_irq())
3060 spin_lock_irqsave(&priv->lock, flags); 3154 spin_lock_irqsave(&priv->lock, flags);
3061 3155
3062 TLan_MiiSync( dev->base_addr ); 3156 tlan_mii_sync(dev->base_addr);
3063 3157
3064 minten = TLan_GetBit( TLAN_NET_SIO_MINTEN, sio ); 3158 minten = tlan_get_bit(TLAN_NET_SIO_MINTEN, sio);
3065 if ( minten ) 3159 if (minten)
3066 TLan_ClearBit( TLAN_NET_SIO_MINTEN, sio ); 3160 tlan_clear_bit(TLAN_NET_SIO_MINTEN, sio);
3067 3161
3068 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Start ( 01b ) */ 3162 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* start (01b) */
3069 TLan_MiiSendData( dev->base_addr, 0x1, 2 ); /* Write ( 01b ) */ 3163 tlan_mii_send_data(dev->base_addr, 0x1, 2); /* write (01b) */
3070 TLan_MiiSendData( dev->base_addr, phy, 5 ); /* Device # */ 3164 tlan_mii_send_data(dev->base_addr, phy, 5); /* device # */
3071 TLan_MiiSendData( dev->base_addr, reg, 5 ); /* Register # */ 3165 tlan_mii_send_data(dev->base_addr, reg, 5); /* register # */
3072 3166
3073 TLan_MiiSendData( dev->base_addr, 0x2, 2 ); /* Send ACK */ 3167 tlan_mii_send_data(dev->base_addr, 0x2, 2); /* send ACK */
3074 TLan_MiiSendData( dev->base_addr, val, 16 ); /* Send Data */ 3168 tlan_mii_send_data(dev->base_addr, val, 16); /* send data */
3075 3169
3076 TLan_ClearBit( TLAN_NET_SIO_MCLK, sio ); /* Idle cycle */ 3170 tlan_clear_bit(TLAN_NET_SIO_MCLK, sio); /* idle cycle */
3077 TLan_SetBit( TLAN_NET_SIO_MCLK, sio ); 3171 tlan_set_bit(TLAN_NET_SIO_MCLK, sio);
3078 3172
3079 if ( minten ) 3173 if (minten)
3080 TLan_SetBit( TLAN_NET_SIO_MINTEN, sio ); 3174 tlan_set_bit(TLAN_NET_SIO_MINTEN, sio);
3081 3175
3082 if (!in_irq()) 3176 if (!in_irq())
3083 spin_unlock_irqrestore(&priv->lock, flags); 3177 spin_unlock_irqrestore(&priv->lock, flags);
3084 3178
3085} /* TLan_MiiWriteReg */ 3179}
3086 3180
3087 3181
3088 3182
@@ -3090,229 +3184,226 @@ static void TLan_MiiWriteReg( struct net_device *dev, u16 phy, u16 reg, u16 val
3090/***************************************************************************** 3184/*****************************************************************************
3091****************************************************************************** 3185******************************************************************************
3092 3186
3093 ThunderLAN Driver Eeprom routines 3187ThunderLAN driver eeprom routines
3094 3188
3095 The Compaq Netelligent 10 and 10/100 cards use a Microchip 24C02A 3189the Compaq netelligent 10 and 10/100 cards use a microchip 24C02A
3096 EEPROM. These functions are based on information in Microchip's 3190EEPROM. these functions are based on information in microchip's
3097 data sheet. I don't know how well this functions will work with 3191data sheet. I don't know how well this functions will work with
3098 other EEPROMs. 3192other Eeproms.
3099 3193
3100****************************************************************************** 3194******************************************************************************
3101*****************************************************************************/ 3195*****************************************************************************/
3102 3196
3103 3197
3104 /*************************************************************** 3198/***************************************************************
3105 * TLan_EeSendStart 3199 * tlan_ee_send_start
3106 * 3200 *
3107 * Returns: 3201 * Returns:
3108 * Nothing 3202 * Nothing
3109 * Parms: 3203 * Parms:
3110 * io_base The IO port base address for the 3204 * io_base The IO port base address for the
3111 * TLAN device with the EEPROM to 3205 * TLAN device with the EEPROM to
3112 * use. 3206 * use.
3113 * 3207 *
3114 * This function sends a start cycle to an EEPROM attached 3208 * This function sends a start cycle to an EEPROM attached
3115 * to a TLAN chip. 3209 * to a TLAN chip.
3116 * 3210 *
3117 **************************************************************/ 3211 **************************************************************/
3118 3212
3119static void TLan_EeSendStart( u16 io_base ) 3213static void tlan_ee_send_start(u16 io_base)
3120{ 3214{
3121 u16 sio; 3215 u16 sio;
3122 3216
3123 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR ); 3217 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
3124 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; 3218 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3125 3219
3126 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3220 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3127 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 3221 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3128 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio ); 3222 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
3129 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); 3223 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3130 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 3224 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3131 3225
3132} /* TLan_EeSendStart */ 3226}
3133 3227
3134 3228
3135 3229
3136 3230
3137 /*************************************************************** 3231/***************************************************************
3138 * TLan_EeSendByte 3232 * tlan_ee_send_byte
3139 * 3233 *
3140 * Returns: 3234 * Returns:
3141 * If the correct ack was received, 0, otherwise 1 3235 * If the correct ack was received, 0, otherwise 1
3142 * Parms: io_base The IO port base address for the 3236 * Parms: io_base The IO port base address for the
3143 * TLAN device with the EEPROM to 3237 * TLAN device with the EEPROM to
3144 * use. 3238 * use.
3145 * data The 8 bits of information to 3239 * data The 8 bits of information to
3146 * send to the EEPROM. 3240 * send to the EEPROM.
3147 * stop If TLAN_EEPROM_STOP is passed, a 3241 * stop If TLAN_EEPROM_STOP is passed, a
3148 * stop cycle is sent after the 3242 * stop cycle is sent after the
3149 * byte is sent after the ack is 3243 * byte is sent after the ack is
3150 * read. 3244 * read.
3151 * 3245 *
3152 * This function sends a byte on the serial EEPROM line, 3246 * This function sends a byte on the serial EEPROM line,
3153 * driving the clock to send each bit. The function then 3247 * driving the clock to send each bit. The function then
3154 * reverses transmission direction and reads an acknowledge 3248 * reverses transmission direction and reads an acknowledge
3155 * bit. 3249 * bit.
3156 * 3250 *
3157 **************************************************************/ 3251 **************************************************************/
3158 3252
3159static int TLan_EeSendByte( u16 io_base, u8 data, int stop ) 3253static int tlan_ee_send_byte(u16 io_base, u8 data, int stop)
3160{ 3254{
3161 int err; 3255 int err;
3162 u8 place; 3256 u8 place;
3163 u16 sio; 3257 u16 sio;
3164 3258
3165 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR ); 3259 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
3166 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; 3260 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3167 3261
3168 /* Assume clock is low, tx is enabled; */ 3262 /* Assume clock is low, tx is enabled; */
3169 for ( place = 0x80; place != 0; place >>= 1 ) { 3263 for (place = 0x80; place != 0; place >>= 1) {
3170 if ( place & data ) 3264 if (place & data)
3171 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 3265 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3172 else 3266 else
3173 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); 3267 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3174 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3268 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3175 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 3269 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3176 } 3270 }
3177 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio ); 3271 tlan_clear_bit(TLAN_NET_SIO_ETXEN, sio);
3178 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3272 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3179 err = TLan_GetBit( TLAN_NET_SIO_EDATA, sio ); 3273 err = tlan_get_bit(TLAN_NET_SIO_EDATA, sio);
3180 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 3274 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3181 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio ); 3275 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
3182 3276
3183 if ( ( ! err ) && stop ) { 3277 if ((!err) && stop) {
3184 /* STOP, raise data while clock is high */ 3278 /* STOP, raise data while clock is high */
3185 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); 3279 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3186 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3280 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3187 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 3281 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3188 } 3282 }
3189 3283
3190 return err; 3284 return err;
3191 3285
3192} /* TLan_EeSendByte */ 3286}
3193 3287
3194 3288
3195 3289
3196 3290
3197 /*************************************************************** 3291/***************************************************************
3198 * TLan_EeReceiveByte 3292 * tlan_ee_receive_byte
3199 * 3293 *
3200 * Returns: 3294 * Returns:
3201 * Nothing 3295 * Nothing
3202 * Parms: 3296 * Parms:
3203 * io_base The IO port base address for the 3297 * io_base The IO port base address for the
3204 * TLAN device with the EEPROM to 3298 * TLAN device with the EEPROM to
3205 * use. 3299 * use.
3206 * data An address to a char to hold the 3300 * data An address to a char to hold the
3207 * data sent from the EEPROM. 3301 * data sent from the EEPROM.
3208 * stop If TLAN_EEPROM_STOP is passed, a 3302 * stop If TLAN_EEPROM_STOP is passed, a
3209 * stop cycle is sent after the 3303 * stop cycle is sent after the
3210 * byte is received, and no ack is 3304 * byte is received, and no ack is
3211 * sent. 3305 * sent.
3212 * 3306 *
3213 * This function receives 8 bits of data from the EEPROM 3307 * This function receives 8 bits of data from the EEPROM
3214 * over the serial link. It then sends and ack bit, or no 3308 * over the serial link. It then sends and ack bit, or no
3215 * ack and a stop bit. This function is used to retrieve 3309 * ack and a stop bit. This function is used to retrieve
3216 * data after the address of a byte in the EEPROM has been 3310 * data after the address of a byte in the EEPROM has been
3217 * sent. 3311 * sent.
3218 * 3312 *
3219 **************************************************************/ 3313 **************************************************************/
3220 3314
3221static void TLan_EeReceiveByte( u16 io_base, u8 *data, int stop ) 3315static void tlan_ee_receive_byte(u16 io_base, u8 *data, int stop)
3222{ 3316{
3223 u8 place; 3317 u8 place;
3224 u16 sio; 3318 u16 sio;
3225 3319
3226 outw( TLAN_NET_SIO, io_base + TLAN_DIO_ADR ); 3320 outw(TLAN_NET_SIO, io_base + TLAN_DIO_ADR);
3227 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO; 3321 sio = io_base + TLAN_DIO_DATA + TLAN_NET_SIO;
3228 *data = 0; 3322 *data = 0;
3229 3323
3230 /* Assume clock is low, tx is enabled; */ 3324 /* Assume clock is low, tx is enabled; */
3231 TLan_ClearBit( TLAN_NET_SIO_ETXEN, sio ); 3325 tlan_clear_bit(TLAN_NET_SIO_ETXEN, sio);
3232 for ( place = 0x80; place; place >>= 1 ) { 3326 for (place = 0x80; place; place >>= 1) {
3233 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3327 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3234 if ( TLan_GetBit( TLAN_NET_SIO_EDATA, sio ) ) 3328 if (tlan_get_bit(TLAN_NET_SIO_EDATA, sio))
3235 *data |= place; 3329 *data |= place;
3236 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 3330 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3237 } 3331 }
3238 3332
3239 TLan_SetBit( TLAN_NET_SIO_ETXEN, sio ); 3333 tlan_set_bit(TLAN_NET_SIO_ETXEN, sio);
3240 if ( ! stop ) { 3334 if (!stop) {
3241 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); /* Ack = 0 */ 3335 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio); /* ack = 0 */
3242 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3336 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3243 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 3337 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3244 } else { 3338 } else {
3245 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); /* No ack = 1 (?) */ 3339 tlan_set_bit(TLAN_NET_SIO_EDATA, sio); /* no ack = 1 (?) */
3246 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3340 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3247 TLan_ClearBit( TLAN_NET_SIO_ECLOK, sio ); 3341 tlan_clear_bit(TLAN_NET_SIO_ECLOK, sio);
3248 /* STOP, raise data while clock is high */ 3342 /* STOP, raise data while clock is high */
3249 TLan_ClearBit( TLAN_NET_SIO_EDATA, sio ); 3343 tlan_clear_bit(TLAN_NET_SIO_EDATA, sio);
3250 TLan_SetBit( TLAN_NET_SIO_ECLOK, sio ); 3344 tlan_set_bit(TLAN_NET_SIO_ECLOK, sio);
3251 TLan_SetBit( TLAN_NET_SIO_EDATA, sio ); 3345 tlan_set_bit(TLAN_NET_SIO_EDATA, sio);
3252 } 3346 }
3253 3347
3254} /* TLan_EeReceiveByte */ 3348}
3255 3349
3256 3350
3257 3351
3258 3352
3259 /*************************************************************** 3353/***************************************************************
3260 * TLan_EeReadByte 3354 * tlan_ee_read_byte
3261 * 3355 *
3262 * Returns: 3356 * Returns:
3263 * No error = 0, else, the stage at which the error 3357 * No error = 0, else, the stage at which the error
3264 * occurred. 3358 * occurred.
3265 * Parms: 3359 * Parms:
3266 * io_base The IO port base address for the 3360 * io_base The IO port base address for the
3267 * TLAN device with the EEPROM to 3361 * TLAN device with the EEPROM to
3268 * use. 3362 * use.
3269 * ee_addr The address of the byte in the 3363 * ee_addr The address of the byte in the
3270 * EEPROM whose contents are to be 3364 * EEPROM whose contents are to be
3271 * retrieved. 3365 * retrieved.
3272 * data An address to a char to hold the 3366 * data An address to a char to hold the
3273 * data obtained from the EEPROM. 3367 * data obtained from the EEPROM.
3274 * 3368 *
3275 * This function reads a byte of information from an byte 3369 * This function reads a byte of information from an byte
3276 * cell in the EEPROM. 3370 * cell in the EEPROM.
3277 * 3371 *
3278 **************************************************************/ 3372 **************************************************************/
3279 3373
3280static int TLan_EeReadByte( struct net_device *dev, u8 ee_addr, u8 *data ) 3374static int tlan_ee_read_byte(struct net_device *dev, u8 ee_addr, u8 *data)
3281{ 3375{
3282 int err; 3376 int err;
3283 TLanPrivateInfo *priv = netdev_priv(dev); 3377 struct tlan_priv *priv = netdev_priv(dev);
3284 unsigned long flags = 0; 3378 unsigned long flags = 0;
3285 int ret=0; 3379 int ret = 0;
3286 3380
3287 spin_lock_irqsave(&priv->lock, flags); 3381 spin_lock_irqsave(&priv->lock, flags);
3288 3382
3289 TLan_EeSendStart( dev->base_addr ); 3383 tlan_ee_send_start(dev->base_addr);
3290 err = TLan_EeSendByte( dev->base_addr, 0xA0, TLAN_EEPROM_ACK ); 3384 err = tlan_ee_send_byte(dev->base_addr, 0xa0, TLAN_EEPROM_ACK);
3291 if (err) 3385 if (err) {
3292 { 3386 ret = 1;
3293 ret=1;
3294 goto fail; 3387 goto fail;
3295 } 3388 }
3296 err = TLan_EeSendByte( dev->base_addr, ee_addr, TLAN_EEPROM_ACK ); 3389 err = tlan_ee_send_byte(dev->base_addr, ee_addr, TLAN_EEPROM_ACK);
3297 if (err) 3390 if (err) {
3298 { 3391 ret = 2;
3299 ret=2;
3300 goto fail; 3392 goto fail;
3301 } 3393 }
3302 TLan_EeSendStart( dev->base_addr ); 3394 tlan_ee_send_start(dev->base_addr);
3303 err = TLan_EeSendByte( dev->base_addr, 0xA1, TLAN_EEPROM_ACK ); 3395 err = tlan_ee_send_byte(dev->base_addr, 0xa1, TLAN_EEPROM_ACK);
3304 if (err) 3396 if (err) {
3305 { 3397 ret = 3;
3306 ret=3;
3307 goto fail; 3398 goto fail;
3308 } 3399 }
3309 TLan_EeReceiveByte( dev->base_addr, data, TLAN_EEPROM_STOP ); 3400 tlan_ee_receive_byte(dev->base_addr, data, TLAN_EEPROM_STOP);
3310fail: 3401fail:
3311 spin_unlock_irqrestore(&priv->lock, flags); 3402 spin_unlock_irqrestore(&priv->lock, flags);
3312 3403
3313 return ret; 3404 return ret;
3314 3405
3315} /* TLan_EeReadByte */ 3406}
3316 3407
3317 3408
3318 3409
diff --git a/drivers/net/tlan.h b/drivers/net/tlan.h
index 3315ced774e2..5fc98a8e4889 100644
--- a/drivers/net/tlan.h
+++ b/drivers/net/tlan.h
@@ -20,8 +20,8 @@
20 ********************************************************************/ 20 ********************************************************************/
21 21
22 22
23#include <asm/io.h> 23#include <linux/io.h>
24#include <asm/types.h> 24#include <linux/types.h>
25#include <linux/netdevice.h> 25#include <linux/netdevice.h>
26 26
27 27
@@ -40,8 +40,11 @@
40#define TLAN_IGNORE 0 40#define TLAN_IGNORE 0
41#define TLAN_RECORD 1 41#define TLAN_RECORD 1
42 42
43#define TLAN_DBG(lvl, format, args...) \ 43#define TLAN_DBG(lvl, format, args...) \
44 do { if (debug&lvl) printk(KERN_DEBUG "TLAN: " format, ##args ); } while(0) 44 do { \
45 if (debug&lvl) \
46 printk(KERN_DEBUG "TLAN: " format, ##args); \
47 } while (0)
45 48
46#define TLAN_DEBUG_GNRL 0x0001 49#define TLAN_DEBUG_GNRL 0x0001
47#define TLAN_DEBUG_TX 0x0002 50#define TLAN_DEBUG_TX 0x0002
@@ -50,7 +53,8 @@
50#define TLAN_DEBUG_PROBE 0x0010 53#define TLAN_DEBUG_PROBE 0x0010
51 54
52#define TX_TIMEOUT (10*HZ) /* We need time for auto-neg */ 55#define TX_TIMEOUT (10*HZ) /* We need time for auto-neg */
53#define MAX_TLAN_BOARDS 8 /* Max number of boards installed at a time */ 56#define MAX_TLAN_BOARDS 8 /* Max number of boards installed
57 at a time */
54 58
55 59
56 /***************************************************************** 60 /*****************************************************************
@@ -70,13 +74,13 @@
70#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014 74#define PCI_DEVICE_ID_OLICOM_OC2326 0x0014
71#endif 75#endif
72 76
73typedef struct tlan_adapter_entry { 77struct tlan_adapter_entry {
74 u16 vendorId; 78 u16 vendor_id;
75 u16 deviceId; 79 u16 device_id;
76 char *deviceLabel; 80 char *device_label;
77 u32 flags; 81 u32 flags;
78 u16 addrOfs; 82 u16 addr_ofs;
79} TLanAdapterEntry; 83};
80 84
81#define TLAN_ADAPTER_NONE 0x00000000 85#define TLAN_ADAPTER_NONE 0x00000000
82#define TLAN_ADAPTER_UNMANAGED_PHY 0x00000001 86#define TLAN_ADAPTER_UNMANAGED_PHY 0x00000001
@@ -129,18 +133,18 @@ typedef struct tlan_adapter_entry {
129#define TLAN_CSTAT_DP_PR 0x0100 133#define TLAN_CSTAT_DP_PR 0x0100
130 134
131 135
132typedef struct tlan_buffer_ref_tag { 136struct tlan_buffer {
133 u32 count; 137 u32 count;
134 u32 address; 138 u32 address;
135} TLanBufferRef; 139};
136 140
137 141
138typedef struct tlan_list_tag { 142struct tlan_list {
139 u32 forward; 143 u32 forward;
140 u16 cStat; 144 u16 c_stat;
141 u16 frameSize; 145 u16 frame_size;
142 TLanBufferRef buffer[TLAN_BUFFERS_PER_LIST]; 146 struct tlan_buffer buffer[TLAN_BUFFERS_PER_LIST];
143} TLanList; 147};
144 148
145 149
146typedef u8 TLanBuffer[TLAN_MAX_FRAME_SIZE]; 150typedef u8 TLanBuffer[TLAN_MAX_FRAME_SIZE];
@@ -164,49 +168,49 @@ typedef u8 TLanBuffer[TLAN_MAX_FRAME_SIZE];
164 * 168 *
165 ****************************************************************/ 169 ****************************************************************/
166 170
167typedef struct tlan_private_tag { 171struct tlan_priv {
168 struct net_device *nextDevice; 172 struct net_device *next_device;
169 struct pci_dev *pciDev; 173 struct pci_dev *pci_dev;
170 struct net_device *dev; 174 struct net_device *dev;
171 void *dmaStorage; 175 void *dma_storage;
172 dma_addr_t dmaStorageDMA; 176 dma_addr_t dma_storage_dma;
173 unsigned int dmaSize; 177 unsigned int dma_size;
174 u8 *padBuffer; 178 u8 *pad_buffer;
175 TLanList *rxList; 179 struct tlan_list *rx_list;
176 dma_addr_t rxListDMA; 180 dma_addr_t rx_list_dma;
177 u8 *rxBuffer; 181 u8 *rx_buffer;
178 dma_addr_t rxBufferDMA; 182 dma_addr_t rx_buffer_dma;
179 u32 rxHead; 183 u32 rx_head;
180 u32 rxTail; 184 u32 rx_tail;
181 u32 rxEocCount; 185 u32 rx_eoc_count;
182 TLanList *txList; 186 struct tlan_list *tx_list;
183 dma_addr_t txListDMA; 187 dma_addr_t tx_list_dma;
184 u8 *txBuffer; 188 u8 *tx_buffer;
185 dma_addr_t txBufferDMA; 189 dma_addr_t tx_buffer_dma;
186 u32 txHead; 190 u32 tx_head;
187 u32 txInProgress; 191 u32 tx_in_progress;
188 u32 txTail; 192 u32 tx_tail;
189 u32 txBusyCount; 193 u32 tx_busy_count;
190 u32 phyOnline; 194 u32 phy_online;
191 u32 timerSetAt; 195 u32 timer_set_at;
192 u32 timerType; 196 u32 timer_type;
193 struct timer_list timer; 197 struct timer_list timer;
194 struct board *adapter; 198 struct board *adapter;
195 u32 adapterRev; 199 u32 adapter_rev;
196 u32 aui; 200 u32 aui;
197 u32 debug; 201 u32 debug;
198 u32 duplex; 202 u32 duplex;
199 u32 phy[2]; 203 u32 phy[2];
200 u32 phyNum; 204 u32 phy_num;
201 u32 speed; 205 u32 speed;
202 u8 tlanRev; 206 u8 tlan_rev;
203 u8 tlanFullDuplex; 207 u8 tlan_full_duplex;
204 spinlock_t lock; 208 spinlock_t lock;
205 u8 link; 209 u8 link;
206 u8 is_eisa; 210 u8 is_eisa;
207 struct work_struct tlan_tqueue; 211 struct work_struct tlan_tqueue;
208 u8 neg_be_verbose; 212 u8 neg_be_verbose;
209} TLanPrivateInfo; 213};
210 214
211 215
212 216
@@ -247,7 +251,7 @@ typedef struct tlan_private_tag {
247 ****************************************************************/ 251 ****************************************************************/
248 252
249#define TLAN_HOST_CMD 0x00 253#define TLAN_HOST_CMD 0x00
250#define TLAN_HC_GO 0x80000000 254#define TLAN_HC_GO 0x80000000
251#define TLAN_HC_STOP 0x40000000 255#define TLAN_HC_STOP 0x40000000
252#define TLAN_HC_ACK 0x20000000 256#define TLAN_HC_ACK 0x20000000
253#define TLAN_HC_CS_MASK 0x1FE00000 257#define TLAN_HC_CS_MASK 0x1FE00000
@@ -283,7 +287,7 @@ typedef struct tlan_private_tag {
283#define TLAN_NET_CMD_TRFRAM 0x02 287#define TLAN_NET_CMD_TRFRAM 0x02
284#define TLAN_NET_CMD_TXPACE 0x01 288#define TLAN_NET_CMD_TXPACE 0x01
285#define TLAN_NET_SIO 0x01 289#define TLAN_NET_SIO 0x01
286#define TLAN_NET_SIO_MINTEN 0x80 290#define TLAN_NET_SIO_MINTEN 0x80
287#define TLAN_NET_SIO_ECLOK 0x40 291#define TLAN_NET_SIO_ECLOK 0x40
288#define TLAN_NET_SIO_ETXEN 0x20 292#define TLAN_NET_SIO_ETXEN 0x20
289#define TLAN_NET_SIO_EDATA 0x10 293#define TLAN_NET_SIO_EDATA 0x10
@@ -304,7 +308,7 @@ typedef struct tlan_private_tag {
304#define TLAN_NET_MASK_MASK4 0x10 308#define TLAN_NET_MASK_MASK4 0x10
305#define TLAN_NET_MASK_RSRVD 0x0F 309#define TLAN_NET_MASK_RSRVD 0x0F
306#define TLAN_NET_CONFIG 0x04 310#define TLAN_NET_CONFIG 0x04
307#define TLAN_NET_CFG_RCLK 0x8000 311#define TLAN_NET_CFG_RCLK 0x8000
308#define TLAN_NET_CFG_TCLK 0x4000 312#define TLAN_NET_CFG_TCLK 0x4000
309#define TLAN_NET_CFG_BIT 0x2000 313#define TLAN_NET_CFG_BIT 0x2000
310#define TLAN_NET_CFG_RXCRC 0x1000 314#define TLAN_NET_CFG_RXCRC 0x1000
@@ -372,7 +376,7 @@ typedef struct tlan_private_tag {
372/* Generic MII/PHY Registers */ 376/* Generic MII/PHY Registers */
373 377
374#define MII_GEN_CTL 0x00 378#define MII_GEN_CTL 0x00
375#define MII_GC_RESET 0x8000 379#define MII_GC_RESET 0x8000
376#define MII_GC_LOOPBK 0x4000 380#define MII_GC_LOOPBK 0x4000
377#define MII_GC_SPEEDSEL 0x2000 381#define MII_GC_SPEEDSEL 0x2000
378#define MII_GC_AUTOENB 0x1000 382#define MII_GC_AUTOENB 0x1000
@@ -397,9 +401,9 @@ typedef struct tlan_private_tag {
397#define MII_GS_EXTCAP 0x0001 401#define MII_GS_EXTCAP 0x0001
398#define MII_GEN_ID_HI 0x02 402#define MII_GEN_ID_HI 0x02
399#define MII_GEN_ID_LO 0x03 403#define MII_GEN_ID_LO 0x03
400#define MII_GIL_OUI 0xFC00 404#define MII_GIL_OUI 0xFC00
401#define MII_GIL_MODEL 0x03F0 405#define MII_GIL_MODEL 0x03F0
402#define MII_GIL_REVISION 0x000F 406#define MII_GIL_REVISION 0x000F
403#define MII_AN_ADV 0x04 407#define MII_AN_ADV 0x04
404#define MII_AN_LPA 0x05 408#define MII_AN_LPA 0x05
405#define MII_AN_EXP 0x06 409#define MII_AN_EXP 0x06
@@ -408,7 +412,7 @@ typedef struct tlan_private_tag {
408 412
409#define TLAN_TLPHY_ID 0x10 413#define TLAN_TLPHY_ID 0x10
410#define TLAN_TLPHY_CTL 0x11 414#define TLAN_TLPHY_CTL 0x11
411#define TLAN_TC_IGLINK 0x8000 415#define TLAN_TC_IGLINK 0x8000
412#define TLAN_TC_SWAPOL 0x4000 416#define TLAN_TC_SWAPOL 0x4000
413#define TLAN_TC_AUISEL 0x2000 417#define TLAN_TC_AUISEL 0x2000
414#define TLAN_TC_SQEEN 0x1000 418#define TLAN_TC_SQEEN 0x1000
@@ -435,41 +439,41 @@ typedef struct tlan_private_tag {
435#define LEVEL1_ID1 0x7810 439#define LEVEL1_ID1 0x7810
436#define LEVEL1_ID2 0x0000 440#define LEVEL1_ID2 0x0000
437 441
438#define CIRC_INC( a, b ) if ( ++a >= b ) a = 0 442#define CIRC_INC(a, b) if (++a >= b) a = 0
439 443
440/* Routines to access internal registers. */ 444/* Routines to access internal registers. */
441 445
442static inline u8 TLan_DioRead8(u16 base_addr, u16 internal_addr) 446static inline u8 tlan_dio_read8(u16 base_addr, u16 internal_addr)
443{ 447{
444 outw(internal_addr, base_addr + TLAN_DIO_ADR); 448 outw(internal_addr, base_addr + TLAN_DIO_ADR);
445 return inb((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x3)); 449 return inb((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x3));
446 450
447} /* TLan_DioRead8 */ 451}
448 452
449 453
450 454
451 455
452static inline u16 TLan_DioRead16(u16 base_addr, u16 internal_addr) 456static inline u16 tlan_dio_read16(u16 base_addr, u16 internal_addr)
453{ 457{
454 outw(internal_addr, base_addr + TLAN_DIO_ADR); 458 outw(internal_addr, base_addr + TLAN_DIO_ADR);
455 return inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2)); 459 return inw((base_addr + TLAN_DIO_DATA) + (internal_addr & 0x2));
456 460
457} /* TLan_DioRead16 */ 461}
458 462
459 463
460 464
461 465
462static inline u32 TLan_DioRead32(u16 base_addr, u16 internal_addr) 466static inline u32 tlan_dio_read32(u16 base_addr, u16 internal_addr)
463{ 467{
464 outw(internal_addr, base_addr + TLAN_DIO_ADR); 468 outw(internal_addr, base_addr + TLAN_DIO_ADR);
465 return inl(base_addr + TLAN_DIO_DATA); 469 return inl(base_addr + TLAN_DIO_DATA);
466 470
467} /* TLan_DioRead32 */ 471}
468 472
469 473
470 474
471 475
472static inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data) 476static inline void tlan_dio_write8(u16 base_addr, u16 internal_addr, u8 data)
473{ 477{
474 outw(internal_addr, base_addr + TLAN_DIO_ADR); 478 outw(internal_addr, base_addr + TLAN_DIO_ADR);
475 outb(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x3)); 479 outb(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x3));
@@ -479,7 +483,7 @@ static inline void TLan_DioWrite8(u16 base_addr, u16 internal_addr, u8 data)
479 483
480 484
481 485
482static inline void TLan_DioWrite16(u16 base_addr, u16 internal_addr, u16 data) 486static inline void tlan_dio_write16(u16 base_addr, u16 internal_addr, u16 data)
483{ 487{
484 outw(internal_addr, base_addr + TLAN_DIO_ADR); 488 outw(internal_addr, base_addr + TLAN_DIO_ADR);
485 outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); 489 outw(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2));
@@ -489,16 +493,16 @@ static inline void TLan_DioWrite16(u16 base_addr, u16 internal_addr, u16 data)
489 493
490 494
491 495
492static inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data) 496static inline void tlan_dio_write32(u16 base_addr, u16 internal_addr, u32 data)
493{ 497{
494 outw(internal_addr, base_addr + TLAN_DIO_ADR); 498 outw(internal_addr, base_addr + TLAN_DIO_ADR);
495 outl(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2)); 499 outl(data, base_addr + TLAN_DIO_DATA + (internal_addr & 0x2));
496 500
497} 501}
498 502
499#define TLan_ClearBit( bit, port ) outb_p(inb_p(port) & ~bit, port) 503#define tlan_clear_bit(bit, port) outb_p(inb_p(port) & ~bit, port)
500#define TLan_GetBit( bit, port ) ((int) (inb_p(port) & bit)) 504#define tlan_get_bit(bit, port) ((int) (inb_p(port) & bit))
501#define TLan_SetBit( bit, port ) outb_p(inb_p(port) | bit, port) 505#define tlan_set_bit(bit, port) outb_p(inb_p(port) | bit, port)
502 506
503/* 507/*
504 * given 6 bytes, view them as 8 6-bit numbers and return the XOR of those 508 * given 6 bytes, view them as 8 6-bit numbers and return the XOR of those
@@ -506,37 +510,37 @@ static inline void TLan_DioWrite32(u16 base_addr, u16 internal_addr, u32 data)
506 * 510 *
507 * The original code was: 511 * The original code was:
508 * 512 *
509 * u32 xor( u32 a, u32 b ) { return ( ( a && ! b ) || ( ! a && b ) ); } 513 * u32 xor(u32 a, u32 b) { return ((a && !b ) || (! a && b )); }
510 * 514 *
511 * #define XOR8( a, b, c, d, e, f, g, h ) \ 515 * #define XOR8(a, b, c, d, e, f, g, h) \
512 * xor( a, xor( b, xor( c, xor( d, xor( e, xor( f, xor( g, h ) ) ) ) ) ) ) 516 * xor(a, xor(b, xor(c, xor(d, xor(e, xor(f, xor(g, h)) ) ) ) ) )
513 * #define DA( a, bit ) ( ( (u8) a[bit/8] ) & ( (u8) ( 1 << bit%8 ) ) ) 517 * #define DA(a, bit) (( (u8) a[bit/8] ) & ( (u8) (1 << bit%8)) )
514 * 518 *
515 * hash = XOR8( DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24), 519 * hash = XOR8(DA(a,0), DA(a, 6), DA(a,12), DA(a,18), DA(a,24),
516 * DA(a,30), DA(a,36), DA(a,42) ); 520 * DA(a,30), DA(a,36), DA(a,42));
517 * hash |= XOR8( DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25), 521 * hash |= XOR8(DA(a,1), DA(a, 7), DA(a,13), DA(a,19), DA(a,25),
518 * DA(a,31), DA(a,37), DA(a,43) ) << 1; 522 * DA(a,31), DA(a,37), DA(a,43)) << 1;
519 * hash |= XOR8( DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26), 523 * hash |= XOR8(DA(a,2), DA(a, 8), DA(a,14), DA(a,20), DA(a,26),
520 * DA(a,32), DA(a,38), DA(a,44) ) << 2; 524 * DA(a,32), DA(a,38), DA(a,44)) << 2;
521 * hash |= XOR8( DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27), 525 * hash |= XOR8(DA(a,3), DA(a, 9), DA(a,15), DA(a,21), DA(a,27),
522 * DA(a,33), DA(a,39), DA(a,45) ) << 3; 526 * DA(a,33), DA(a,39), DA(a,45)) << 3;
523 * hash |= XOR8( DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28), 527 * hash |= XOR8(DA(a,4), DA(a,10), DA(a,16), DA(a,22), DA(a,28),
524 * DA(a,34), DA(a,40), DA(a,46) ) << 4; 528 * DA(a,34), DA(a,40), DA(a,46)) << 4;
525 * hash |= XOR8( DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29), 529 * hash |= XOR8(DA(a,5), DA(a,11), DA(a,17), DA(a,23), DA(a,29),
526 * DA(a,35), DA(a,41), DA(a,47) ) << 5; 530 * DA(a,35), DA(a,41), DA(a,47)) << 5;
527 * 531 *
528 */ 532 */
529static inline u32 TLan_HashFunc( const u8 *a ) 533static inline u32 tlan_hash_func(const u8 *a)
530{ 534{
531 u8 hash; 535 u8 hash;
532 536
533 hash = (a[0]^a[3]); /* & 077 */ 537 hash = (a[0]^a[3]); /* & 077 */
534 hash ^= ((a[0]^a[3])>>6); /* & 003 */ 538 hash ^= ((a[0]^a[3])>>6); /* & 003 */
535 hash ^= ((a[1]^a[4])<<2); /* & 074 */ 539 hash ^= ((a[1]^a[4])<<2); /* & 074 */
536 hash ^= ((a[1]^a[4])>>4); /* & 017 */ 540 hash ^= ((a[1]^a[4])>>4); /* & 017 */
537 hash ^= ((a[2]^a[5])<<4); /* & 060 */ 541 hash ^= ((a[2]^a[5])<<4); /* & 060 */
538 hash ^= ((a[2]^a[5])>>2); /* & 077 */ 542 hash ^= ((a[2]^a[5])>>2); /* & 077 */
539 543
540 return hash & 077; 544 return hash & 077;
541} 545}
542#endif 546#endif
diff --git a/drivers/net/tun.c b/drivers/net/tun.c
index b100bd50a0d7..55786a0efc41 100644
--- a/drivers/net/tun.c
+++ b/drivers/net/tun.c
@@ -1142,7 +1142,7 @@ static int tun_get_iff(struct net *net, struct tun_struct *tun,
1142 * privs required. */ 1142 * privs required. */
1143static int set_offload(struct net_device *dev, unsigned long arg) 1143static int set_offload(struct net_device *dev, unsigned long arg)
1144{ 1144{
1145 unsigned int old_features, features; 1145 u32 old_features, features;
1146 1146
1147 old_features = dev->features; 1147 old_features = dev->features;
1148 /* Unset features, set them as we chew on the arg. */ 1148 /* Unset features, set them as we chew on the arg. */
diff --git a/drivers/net/typhoon.c b/drivers/net/typhoon.c
index a3c46f6a15e7..7fa5ec2de942 100644
--- a/drivers/net/typhoon.c
+++ b/drivers/net/typhoon.c
@@ -123,12 +123,11 @@ static const int multicast_filter_limit = 32;
123#include <linux/in6.h> 123#include <linux/in6.h>
124#include <linux/dma-mapping.h> 124#include <linux/dma-mapping.h>
125#include <linux/firmware.h> 125#include <linux/firmware.h>
126#include <generated/utsrelease.h>
127 126
128#include "typhoon.h" 127#include "typhoon.h"
129 128
130MODULE_AUTHOR("David Dillow <dave@thedillows.org>"); 129MODULE_AUTHOR("David Dillow <dave@thedillows.org>");
131MODULE_VERSION(UTS_RELEASE); 130MODULE_VERSION("1.0");
132MODULE_LICENSE("GPL"); 131MODULE_LICENSE("GPL");
133MODULE_FIRMWARE(FIRMWARE_NAME); 132MODULE_FIRMWARE(FIRMWARE_NAME);
134MODULE_DESCRIPTION("3Com Typhoon Family (3C990, 3CR990, and variants)"); 133MODULE_DESCRIPTION("3Com Typhoon Family (3C990, 3CR990, and variants)");
diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c
index d776c4a8d3c1..04e8ce14a1d0 100644
--- a/drivers/net/usb/cdc_ncm.c
+++ b/drivers/net/usb/cdc_ncm.c
@@ -54,7 +54,7 @@
54#include <linux/usb/usbnet.h> 54#include <linux/usb/usbnet.h>
55#include <linux/usb/cdc.h> 55#include <linux/usb/cdc.h>
56 56
57#define DRIVER_VERSION "30-Nov-2010" 57#define DRIVER_VERSION "17-Jan-2011"
58 58
59/* CDC NCM subclass 3.2.1 */ 59/* CDC NCM subclass 3.2.1 */
60#define USB_CDC_NCM_NDP16_LENGTH_MIN 0x10 60#define USB_CDC_NCM_NDP16_LENGTH_MIN 0x10
@@ -868,15 +868,19 @@ static void cdc_ncm_tx_timeout(unsigned long arg)
868 if (ctx->tx_timer_pending != 0) { 868 if (ctx->tx_timer_pending != 0) {
869 ctx->tx_timer_pending--; 869 ctx->tx_timer_pending--;
870 restart = 1; 870 restart = 1;
871 } else 871 } else {
872 restart = 0; 872 restart = 0;
873 }
873 874
874 spin_unlock(&ctx->mtx); 875 spin_unlock(&ctx->mtx);
875 876
876 if (restart) 877 if (restart) {
878 spin_lock(&ctx->mtx);
877 cdc_ncm_tx_timeout_start(ctx); 879 cdc_ncm_tx_timeout_start(ctx);
878 else if (ctx->netdev != NULL) 880 spin_unlock(&ctx->mtx);
881 } else if (ctx->netdev != NULL) {
879 usbnet_start_xmit(NULL, ctx->netdev); 882 usbnet_start_xmit(NULL, ctx->netdev);
883 }
880} 884}
881 885
882static struct sk_buff * 886static struct sk_buff *
@@ -900,7 +904,6 @@ cdc_ncm_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
900 skb_out = cdc_ncm_fill_tx_frame(ctx, skb); 904 skb_out = cdc_ncm_fill_tx_frame(ctx, skb);
901 if (ctx->tx_curr_skb != NULL) 905 if (ctx->tx_curr_skb != NULL)
902 need_timer = 1; 906 need_timer = 1;
903 spin_unlock(&ctx->mtx);
904 907
905 /* Start timer, if there is a remaining skb */ 908 /* Start timer, if there is a remaining skb */
906 if (need_timer) 909 if (need_timer)
@@ -908,6 +911,8 @@ cdc_ncm_tx_fixup(struct usbnet *dev, struct sk_buff *skb, gfp_t flags)
908 911
909 if (skb_out) 912 if (skb_out)
910 dev->net->stats.tx_packets += ctx->tx_curr_frame_num; 913 dev->net->stats.tx_packets += ctx->tx_curr_frame_num;
914
915 spin_unlock(&ctx->mtx);
911 return skb_out; 916 return skb_out;
912 917
913error: 918error:
@@ -1020,8 +1025,8 @@ static int cdc_ncm_rx_fixup(struct usbnet *dev, struct sk_buff *skb_in)
1020 if (((offset + temp) > actlen) || 1025 if (((offset + temp) > actlen) ||
1021 (temp > CDC_NCM_MAX_DATAGRAM_SIZE) || (temp < ETH_HLEN)) { 1026 (temp > CDC_NCM_MAX_DATAGRAM_SIZE) || (temp < ETH_HLEN)) {
1022 pr_debug("invalid frame detected (ignored)" 1027 pr_debug("invalid frame detected (ignored)"
1023 "offset[%u]=%u, length=%u, skb=%p\n", 1028 "offset[%u]=%u, length=%u, skb=%p\n",
1024 x, offset, temp, skb_in); 1029 x, offset, temp, skb_in);
1025 if (!x) 1030 if (!x)
1026 goto error; 1031 goto error;
1027 break; 1032 break;
diff --git a/drivers/net/usb/kaweth.c b/drivers/net/usb/kaweth.c
index 5e98643a4a21..7dc84971f26f 100644
--- a/drivers/net/usb/kaweth.c
+++ b/drivers/net/usb/kaweth.c
@@ -406,6 +406,7 @@ static int kaweth_download_firmware(struct kaweth_device *kaweth,
406 406
407 if (fw->size > KAWETH_FIRMWARE_BUF_SIZE) { 407 if (fw->size > KAWETH_FIRMWARE_BUF_SIZE) {
408 err("Firmware too big: %zu", fw->size); 408 err("Firmware too big: %zu", fw->size);
409 release_firmware(fw);
409 return -ENOSPC; 410 return -ENOSPC;
410 } 411 }
411 data_len = fw->size; 412 data_len = fw->size;
diff --git a/drivers/net/veth.c b/drivers/net/veth.c
index cc83fa71c3ff..105d7f0630cc 100644
--- a/drivers/net/veth.c
+++ b/drivers/net/veth.c
@@ -403,17 +403,6 @@ static int veth_newlink(struct net *src_net, struct net_device *dev,
403 if (tb[IFLA_ADDRESS] == NULL) 403 if (tb[IFLA_ADDRESS] == NULL)
404 random_ether_addr(dev->dev_addr); 404 random_ether_addr(dev->dev_addr);
405 405
406 if (tb[IFLA_IFNAME])
407 nla_strlcpy(dev->name, tb[IFLA_IFNAME], IFNAMSIZ);
408 else
409 snprintf(dev->name, IFNAMSIZ, DRV_NAME "%%d");
410
411 if (strchr(dev->name, '%')) {
412 err = dev_alloc_name(dev, dev->name);
413 if (err < 0)
414 goto err_alloc_name;
415 }
416
417 err = register_netdevice(dev); 406 err = register_netdevice(dev);
418 if (err < 0) 407 if (err < 0)
419 goto err_register_dev; 408 goto err_register_dev;
@@ -433,7 +422,6 @@ static int veth_newlink(struct net *src_net, struct net_device *dev,
433 422
434err_register_dev: 423err_register_dev:
435 /* nothing to do */ 424 /* nothing to do */
436err_alloc_name:
437err_configure_peer: 425err_configure_peer:
438 unregister_netdevice(peer); 426 unregister_netdevice(peer);
439 return err; 427 return err;
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index 09cac704fdd7..0d6fec6b7d93 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -2923,6 +2923,7 @@ static u16 wol_calc_crc(int size, u8 *pattern, u8 *mask_pattern)
2923static int velocity_set_wol(struct velocity_info *vptr) 2923static int velocity_set_wol(struct velocity_info *vptr)
2924{ 2924{
2925 struct mac_regs __iomem *regs = vptr->mac_regs; 2925 struct mac_regs __iomem *regs = vptr->mac_regs;
2926 enum speed_opt spd_dpx = vptr->options.spd_dpx;
2926 static u8 buf[256]; 2927 static u8 buf[256];
2927 int i; 2928 int i;
2928 2929
@@ -2968,6 +2969,12 @@ static int velocity_set_wol(struct velocity_info *vptr)
2968 2969
2969 writew(0x0FFF, &regs->WOLSRClr); 2970 writew(0x0FFF, &regs->WOLSRClr);
2970 2971
2972 if (spd_dpx == SPD_DPX_1000_FULL)
2973 goto mac_done;
2974
2975 if (spd_dpx != SPD_DPX_AUTO)
2976 goto advertise_done;
2977
2971 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) { 2978 if (vptr->mii_status & VELOCITY_AUTONEG_ENABLE) {
2972 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) 2979 if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201)
2973 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs); 2980 MII_REG_BITS_ON(AUXCR_MDPPS, MII_NCONFIG, vptr->mac_regs);
@@ -2978,6 +2985,7 @@ static int velocity_set_wol(struct velocity_info *vptr)
2978 if (vptr->mii_status & VELOCITY_SPEED_1000) 2985 if (vptr->mii_status & VELOCITY_SPEED_1000)
2979 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs); 2986 MII_REG_BITS_ON(BMCR_ANRESTART, MII_BMCR, vptr->mac_regs);
2980 2987
2988advertise_done:
2981 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR); 2989 BYTE_REG_BITS_ON(CHIPGCR_FCMODE, &regs->CHIPGCR);
2982 2990
2983 { 2991 {
@@ -2987,6 +2995,7 @@ static int velocity_set_wol(struct velocity_info *vptr)
2987 writeb(GCR, &regs->CHIPGCR); 2995 writeb(GCR, &regs->CHIPGCR);
2988 } 2996 }
2989 2997
2998mac_done:
2990 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR); 2999 BYTE_REG_BITS_OFF(ISR_PWEI, &regs->ISR);
2991 /* Turn on SWPTAG just before entering power mode */ 3000 /* Turn on SWPTAG just before entering power mode */
2992 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW); 3001 BYTE_REG_BITS_ON(STICKHW_SWPTAG, &regs->STICKHW);
diff --git a/drivers/net/via-velocity.h b/drivers/net/via-velocity.h
index aa2e69b9ff61..d7227539484e 100644
--- a/drivers/net/via-velocity.h
+++ b/drivers/net/via-velocity.h
@@ -361,7 +361,7 @@ enum velocity_owner {
361#define MAC_REG_CHIPGSR 0x9C 361#define MAC_REG_CHIPGSR 0x9C
362#define MAC_REG_TESTCFG 0x9D 362#define MAC_REG_TESTCFG 0x9D
363#define MAC_REG_DEBUG 0x9E 363#define MAC_REG_DEBUG 0x9E
364#define MAC_REG_CHIPGCR 0x9F 364#define MAC_REG_CHIPGCR 0x9F /* Chip Operation and Diagnostic Control */
365#define MAC_REG_WOLCR0_SET 0xA0 365#define MAC_REG_WOLCR0_SET 0xA0
366#define MAC_REG_WOLCR1_SET 0xA1 366#define MAC_REG_WOLCR1_SET 0xA1
367#define MAC_REG_PWCFG_SET 0xA2 367#define MAC_REG_PWCFG_SET 0xA2
@@ -848,10 +848,10 @@ enum velocity_owner {
848 * Bits in CHIPGCR register 848 * Bits in CHIPGCR register
849 */ 849 */
850 850
851#define CHIPGCR_FCGMII 0x80 /* enable GMII mode */ 851#define CHIPGCR_FCGMII 0x80 /* force GMII (else MII only) */
852#define CHIPGCR_FCFDX 0x40 852#define CHIPGCR_FCFDX 0x40 /* force full duplex */
853#define CHIPGCR_FCRESV 0x20 853#define CHIPGCR_FCRESV 0x20
854#define CHIPGCR_FCMODE 0x10 854#define CHIPGCR_FCMODE 0x10 /* enable MAC forced mode */
855#define CHIPGCR_LPSOPT 0x08 855#define CHIPGCR_LPSOPT 0x08
856#define CHIPGCR_TM1US 0x04 856#define CHIPGCR_TM1US 0x04
857#define CHIPGCR_TM0US 0x02 857#define CHIPGCR_TM0US 0x02
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
index d143e8b72b5b..cc14b4a75048 100644
--- a/drivers/net/vmxnet3/vmxnet3_drv.c
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -48,6 +48,9 @@ static atomic_t devices_found;
48static int enable_mq = 1; 48static int enable_mq = 1;
49static int irq_share_mode; 49static int irq_share_mode;
50 50
51static void
52vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
53
51/* 54/*
52 * Enable/Disable the given intr 55 * Enable/Disable the given intr
53 */ 56 */
@@ -139,9 +142,13 @@ vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
139{ 142{
140 u32 ret; 143 u32 ret;
141 int i; 144 int i;
145 unsigned long flags;
142 146
147 spin_lock_irqsave(&adapter->cmd_lock, flags);
143 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK); 148 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
144 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 149 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
150 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
151
145 adapter->link_speed = ret >> 16; 152 adapter->link_speed = ret >> 16;
146 if (ret & 1) { /* Link is up. */ 153 if (ret & 1) { /* Link is up. */
147 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n", 154 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
@@ -183,8 +190,10 @@ vmxnet3_process_events(struct vmxnet3_adapter *adapter)
183 190
184 /* Check if there is an error on xmit/recv queues */ 191 /* Check if there is an error on xmit/recv queues */
185 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) { 192 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
193 spin_lock(&adapter->cmd_lock);
186 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 194 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
187 VMXNET3_CMD_GET_QUEUE_STATUS); 195 VMXNET3_CMD_GET_QUEUE_STATUS);
196 spin_unlock(&adapter->cmd_lock);
188 197
189 for (i = 0; i < adapter->num_tx_queues; i++) 198 for (i = 0; i < adapter->num_tx_queues; i++)
190 if (adapter->tqd_start[i].status.stopped) 199 if (adapter->tqd_start[i].status.stopped)
@@ -804,30 +813,25 @@ vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
804 skb_transport_header(skb))->doff * 4; 813 skb_transport_header(skb))->doff * 4;
805 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size; 814 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
806 } else { 815 } else {
807 unsigned int pull_size;
808
809 if (skb->ip_summed == CHECKSUM_PARTIAL) { 816 if (skb->ip_summed == CHECKSUM_PARTIAL) {
810 ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb); 817 ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
811 818
812 if (ctx->ipv4) { 819 if (ctx->ipv4) {
813 struct iphdr *iph = (struct iphdr *) 820 struct iphdr *iph = (struct iphdr *)
814 skb_network_header(skb); 821 skb_network_header(skb);
815 if (iph->protocol == IPPROTO_TCP) { 822 if (iph->protocol == IPPROTO_TCP)
816 pull_size = ctx->eth_ip_hdr_size +
817 sizeof(struct tcphdr);
818
819 if (unlikely(!pskb_may_pull(skb,
820 pull_size))) {
821 goto err;
822 }
823 ctx->l4_hdr_size = ((struct tcphdr *) 823 ctx->l4_hdr_size = ((struct tcphdr *)
824 skb_transport_header(skb))->doff * 4; 824 skb_transport_header(skb))->doff * 4;
825 } else if (iph->protocol == IPPROTO_UDP) { 825 else if (iph->protocol == IPPROTO_UDP)
826 /*
827 * Use tcp header size so that bytes to
828 * be copied are more than required by
829 * the device.
830 */
826 ctx->l4_hdr_size = 831 ctx->l4_hdr_size =
827 sizeof(struct udphdr); 832 sizeof(struct tcphdr);
828 } else { 833 else
829 ctx->l4_hdr_size = 0; 834 ctx->l4_hdr_size = 0;
830 }
831 } else { 835 } else {
832 /* for simplicity, don't copy L4 headers */ 836 /* for simplicity, don't copy L4 headers */
833 ctx->l4_hdr_size = 0; 837 ctx->l4_hdr_size = 0;
@@ -1859,18 +1863,14 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1859 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1863 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1860 struct Vmxnet3_DriverShared *shared = adapter->shared; 1864 struct Vmxnet3_DriverShared *shared = adapter->shared;
1861 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1865 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1866 unsigned long flags;
1862 1867
1863 if (grp) { 1868 if (grp) {
1864 /* add vlan rx stripping. */ 1869 /* add vlan rx stripping. */
1865 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) { 1870 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
1866 int i; 1871 int i;
1867 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1868 adapter->vlan_grp = grp; 1872 adapter->vlan_grp = grp;
1869 1873
1870 /* update FEATURES to device */
1871 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1872 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1873 VMXNET3_CMD_UPDATE_FEATURE);
1874 /* 1874 /*
1875 * Clear entire vfTable; then enable untagged pkts. 1875 * Clear entire vfTable; then enable untagged pkts.
1876 * Note: setting one entry in vfTable to non-zero turns 1876 * Note: setting one entry in vfTable to non-zero turns
@@ -1880,8 +1880,10 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1880 vfTable[i] = 0; 1880 vfTable[i] = 0;
1881 1881
1882 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0); 1882 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1883 spin_lock_irqsave(&adapter->cmd_lock, flags);
1883 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1884 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1884 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1885 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1886 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1885 } else { 1887 } else {
1886 printk(KERN_ERR "%s: vlan_rx_register when device has " 1888 printk(KERN_ERR "%s: vlan_rx_register when device has "
1887 "no NETIF_F_HW_VLAN_RX\n", netdev->name); 1889 "no NETIF_F_HW_VLAN_RX\n", netdev->name);
@@ -1900,13 +1902,10 @@ vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1900 */ 1902 */
1901 vfTable[i] = 0; 1903 vfTable[i] = 0;
1902 } 1904 }
1905 spin_lock_irqsave(&adapter->cmd_lock, flags);
1903 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1906 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1904 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1907 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1905 1908 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1906 /* update FEATURES to device */
1907 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1908 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1909 VMXNET3_CMD_UPDATE_FEATURE);
1910 } 1909 }
1911 } 1910 }
1912} 1911}
@@ -1939,10 +1938,13 @@ vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1939{ 1938{
1940 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1939 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1941 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1940 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1941 unsigned long flags;
1942 1942
1943 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid); 1943 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1944 spin_lock_irqsave(&adapter->cmd_lock, flags);
1944 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1945 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1945 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1946 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1947 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1946} 1948}
1947 1949
1948 1950
@@ -1951,10 +1953,13 @@ vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1951{ 1953{
1952 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1954 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1953 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable; 1955 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1956 unsigned long flags;
1954 1957
1955 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid); 1958 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1959 spin_lock_irqsave(&adapter->cmd_lock, flags);
1956 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 1960 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1957 VMXNET3_CMD_UPDATE_VLAN_FILTERS); 1961 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1962 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1958} 1963}
1959 1964
1960 1965
@@ -1985,6 +1990,7 @@ static void
1985vmxnet3_set_mc(struct net_device *netdev) 1990vmxnet3_set_mc(struct net_device *netdev)
1986{ 1991{
1987 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 1992 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1993 unsigned long flags;
1988 struct Vmxnet3_RxFilterConf *rxConf = 1994 struct Vmxnet3_RxFilterConf *rxConf =
1989 &adapter->shared->devRead.rxFilterConf; 1995 &adapter->shared->devRead.rxFilterConf;
1990 u8 *new_table = NULL; 1996 u8 *new_table = NULL;
@@ -2020,6 +2026,7 @@ vmxnet3_set_mc(struct net_device *netdev)
2020 rxConf->mfTablePA = 0; 2026 rxConf->mfTablePA = 0;
2021 } 2027 }
2022 2028
2029 spin_lock_irqsave(&adapter->cmd_lock, flags);
2023 if (new_mode != rxConf->rxMode) { 2030 if (new_mode != rxConf->rxMode) {
2024 rxConf->rxMode = cpu_to_le32(new_mode); 2031 rxConf->rxMode = cpu_to_le32(new_mode);
2025 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2032 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
@@ -2028,6 +2035,7 @@ vmxnet3_set_mc(struct net_device *netdev)
2028 2035
2029 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2036 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2030 VMXNET3_CMD_UPDATE_MAC_FILTERS); 2037 VMXNET3_CMD_UPDATE_MAC_FILTERS);
2038 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2031 2039
2032 kfree(new_table); 2040 kfree(new_table);
2033} 2041}
@@ -2080,10 +2088,8 @@ vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2080 devRead->misc.uptFeatures |= UPT1_F_LRO; 2088 devRead->misc.uptFeatures |= UPT1_F_LRO;
2081 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS); 2089 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2082 } 2090 }
2083 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX) && 2091 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX)
2084 adapter->vlan_grp) {
2085 devRead->misc.uptFeatures |= UPT1_F_RXVLAN; 2092 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2086 }
2087 2093
2088 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu); 2094 devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2089 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa); 2095 devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
@@ -2168,6 +2174,8 @@ vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2168 /* rx filter settings */ 2174 /* rx filter settings */
2169 devRead->rxFilterConf.rxMode = 0; 2175 devRead->rxFilterConf.rxMode = 0;
2170 vmxnet3_restore_vlan(adapter); 2176 vmxnet3_restore_vlan(adapter);
2177 vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2178
2171 /* the rest are already zeroed */ 2179 /* the rest are already zeroed */
2172} 2180}
2173 2181
@@ -2177,6 +2185,7 @@ vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2177{ 2185{
2178 int err, i; 2186 int err, i;
2179 u32 ret; 2187 u32 ret;
2188 unsigned long flags;
2180 2189
2181 dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d," 2190 dev_dbg(&adapter->netdev->dev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2182 " ring sizes %u %u %u\n", adapter->netdev->name, 2191 " ring sizes %u %u %u\n", adapter->netdev->name,
@@ -2206,9 +2215,11 @@ vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2206 adapter->shared_pa)); 2215 adapter->shared_pa));
2207 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI( 2216 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2208 adapter->shared_pa)); 2217 adapter->shared_pa));
2218 spin_lock_irqsave(&adapter->cmd_lock, flags);
2209 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2219 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2210 VMXNET3_CMD_ACTIVATE_DEV); 2220 VMXNET3_CMD_ACTIVATE_DEV);
2211 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2221 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2222 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2212 2223
2213 if (ret != 0) { 2224 if (ret != 0) {
2214 printk(KERN_ERR "Failed to activate dev %s: error %u\n", 2225 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
@@ -2255,7 +2266,10 @@ rq_err:
2255void 2266void
2256vmxnet3_reset_dev(struct vmxnet3_adapter *adapter) 2267vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2257{ 2268{
2269 unsigned long flags;
2270 spin_lock_irqsave(&adapter->cmd_lock, flags);
2258 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV); 2271 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2272 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2259} 2273}
2260 2274
2261 2275
@@ -2263,12 +2277,15 @@ int
2263vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter) 2277vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2264{ 2278{
2265 int i; 2279 int i;
2280 unsigned long flags;
2266 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state)) 2281 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2267 return 0; 2282 return 0;
2268 2283
2269 2284
2285 spin_lock_irqsave(&adapter->cmd_lock, flags);
2270 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2286 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2271 VMXNET3_CMD_QUIESCE_DEV); 2287 VMXNET3_CMD_QUIESCE_DEV);
2288 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2272 vmxnet3_disable_all_intrs(adapter); 2289 vmxnet3_disable_all_intrs(adapter);
2273 2290
2274 for (i = 0; i < adapter->num_rx_queues; i++) 2291 for (i = 0; i < adapter->num_rx_queues; i++)
@@ -2426,7 +2443,7 @@ vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2426 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN; 2443 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2427 ring0_size = adapter->rx_queue[0].rx_ring[0].size; 2444 ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2428 ring0_size = (ring0_size + sz - 1) / sz * sz; 2445 ring0_size = (ring0_size + sz - 1) / sz * sz;
2429 ring0_size = min_t(u32, rq->rx_ring[0].size, VMXNET3_RX_RING_MAX_SIZE / 2446 ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2430 sz * sz); 2447 sz * sz);
2431 ring1_size = adapter->rx_queue[0].rx_ring[1].size; 2448 ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2432 comp_size = ring0_size + ring1_size; 2449 comp_size = ring0_size + ring1_size;
@@ -2695,7 +2712,7 @@ vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter,
2695 break; 2712 break;
2696 } else { 2713 } else {
2697 /* If fails to enable required number of MSI-x vectors 2714 /* If fails to enable required number of MSI-x vectors
2698 * try enabling 3 of them. One each for rx, tx and event 2715 * try enabling minimum number of vectors required.
2699 */ 2716 */
2700 vectors = vector_threshold; 2717 vectors = vector_threshold;
2701 printk(KERN_ERR "Failed to enable %d MSI-X for %s, try" 2718 printk(KERN_ERR "Failed to enable %d MSI-X for %s, try"
@@ -2718,9 +2735,11 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2718 u32 cfg; 2735 u32 cfg;
2719 2736
2720 /* intr settings */ 2737 /* intr settings */
2738 spin_lock(&adapter->cmd_lock);
2721 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 2739 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2722 VMXNET3_CMD_GET_CONF_INTR); 2740 VMXNET3_CMD_GET_CONF_INTR);
2723 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD); 2741 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2742 spin_unlock(&adapter->cmd_lock);
2724 adapter->intr.type = cfg & 0x3; 2743 adapter->intr.type = cfg & 0x3;
2725 adapter->intr.mask_mode = (cfg >> 2) & 0x3; 2744 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2726 2745
@@ -2755,7 +2774,7 @@ vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2755 */ 2774 */
2756 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) { 2775 if (err == VMXNET3_LINUX_MIN_MSIX_VECT) {
2757 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE 2776 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
2758 || adapter->num_rx_queues != 2) { 2777 || adapter->num_rx_queues != 1) {
2759 adapter->share_intr = VMXNET3_INTR_TXSHARE; 2778 adapter->share_intr = VMXNET3_INTR_TXSHARE;
2760 printk(KERN_ERR "Number of rx queues : 1\n"); 2779 printk(KERN_ERR "Number of rx queues : 1\n");
2761 adapter->num_rx_queues = 1; 2780 adapter->num_rx_queues = 1;
@@ -2905,6 +2924,7 @@ vmxnet3_probe_device(struct pci_dev *pdev,
2905 adapter->netdev = netdev; 2924 adapter->netdev = netdev;
2906 adapter->pdev = pdev; 2925 adapter->pdev = pdev;
2907 2926
2927 spin_lock_init(&adapter->cmd_lock);
2908 adapter->shared = pci_alloc_consistent(adapter->pdev, 2928 adapter->shared = pci_alloc_consistent(adapter->pdev,
2909 sizeof(struct Vmxnet3_DriverShared), 2929 sizeof(struct Vmxnet3_DriverShared),
2910 &adapter->shared_pa); 2930 &adapter->shared_pa);
@@ -3108,11 +3128,15 @@ vmxnet3_suspend(struct device *device)
3108 u8 *arpreq; 3128 u8 *arpreq;
3109 struct in_device *in_dev; 3129 struct in_device *in_dev;
3110 struct in_ifaddr *ifa; 3130 struct in_ifaddr *ifa;
3131 unsigned long flags;
3111 int i = 0; 3132 int i = 0;
3112 3133
3113 if (!netif_running(netdev)) 3134 if (!netif_running(netdev))
3114 return 0; 3135 return 0;
3115 3136
3137 for (i = 0; i < adapter->num_rx_queues; i++)
3138 napi_disable(&adapter->rx_queue[i].napi);
3139
3116 vmxnet3_disable_all_intrs(adapter); 3140 vmxnet3_disable_all_intrs(adapter);
3117 vmxnet3_free_irqs(adapter); 3141 vmxnet3_free_irqs(adapter);
3118 vmxnet3_free_intr_resources(adapter); 3142 vmxnet3_free_intr_resources(adapter);
@@ -3188,8 +3212,10 @@ skip_arp:
3188 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys( 3212 adapter->shared->devRead.pmConfDesc.confPA = cpu_to_le64(virt_to_phys(
3189 pmConf)); 3213 pmConf));
3190 3214
3215 spin_lock_irqsave(&adapter->cmd_lock, flags);
3191 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3216 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3192 VMXNET3_CMD_UPDATE_PMCFG); 3217 VMXNET3_CMD_UPDATE_PMCFG);
3218 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3193 3219
3194 pci_save_state(pdev); 3220 pci_save_state(pdev);
3195 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND), 3221 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
@@ -3204,7 +3230,8 @@ skip_arp:
3204static int 3230static int
3205vmxnet3_resume(struct device *device) 3231vmxnet3_resume(struct device *device)
3206{ 3232{
3207 int err; 3233 int err, i = 0;
3234 unsigned long flags;
3208 struct pci_dev *pdev = to_pci_dev(device); 3235 struct pci_dev *pdev = to_pci_dev(device);
3209 struct net_device *netdev = pci_get_drvdata(pdev); 3236 struct net_device *netdev = pci_get_drvdata(pdev);
3210 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 3237 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
@@ -3232,10 +3259,14 @@ vmxnet3_resume(struct device *device)
3232 3259
3233 pci_enable_wake(pdev, PCI_D0, 0); 3260 pci_enable_wake(pdev, PCI_D0, 0);
3234 3261
3262 spin_lock_irqsave(&adapter->cmd_lock, flags);
3235 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 3263 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3236 VMXNET3_CMD_UPDATE_PMCFG); 3264 VMXNET3_CMD_UPDATE_PMCFG);
3265 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3237 vmxnet3_alloc_intr_resources(adapter); 3266 vmxnet3_alloc_intr_resources(adapter);
3238 vmxnet3_request_irqs(adapter); 3267 vmxnet3_request_irqs(adapter);
3268 for (i = 0; i < adapter->num_rx_queues; i++)
3269 napi_enable(&adapter->rx_queue[i].napi);
3239 vmxnet3_enable_all_intrs(adapter); 3270 vmxnet3_enable_all_intrs(adapter);
3240 3271
3241 return 0; 3272 return 0;
diff --git a/drivers/net/vmxnet3/vmxnet3_ethtool.c b/drivers/net/vmxnet3/vmxnet3_ethtool.c
index 8e17fc8a7fe7..81254be85b92 100644
--- a/drivers/net/vmxnet3/vmxnet3_ethtool.c
+++ b/drivers/net/vmxnet3/vmxnet3_ethtool.c
@@ -45,6 +45,7 @@ static int
45vmxnet3_set_rx_csum(struct net_device *netdev, u32 val) 45vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
46{ 46{
47 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 47 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
48 unsigned long flags;
48 49
49 if (adapter->rxcsum != val) { 50 if (adapter->rxcsum != val) {
50 adapter->rxcsum = val; 51 adapter->rxcsum = val;
@@ -56,8 +57,10 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
56 adapter->shared->devRead.misc.uptFeatures &= 57 adapter->shared->devRead.misc.uptFeatures &=
57 ~UPT1_F_RXCSUM; 58 ~UPT1_F_RXCSUM;
58 59
60 spin_lock_irqsave(&adapter->cmd_lock, flags);
59 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 61 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
60 VMXNET3_CMD_UPDATE_FEATURE); 62 VMXNET3_CMD_UPDATE_FEATURE);
63 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
61 } 64 }
62 } 65 }
63 return 0; 66 return 0;
@@ -68,76 +71,78 @@ vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
68static const struct vmxnet3_stat_desc 71static const struct vmxnet3_stat_desc
69vmxnet3_tq_dev_stats[] = { 72vmxnet3_tq_dev_stats[] = {
70 /* description, offset */ 73 /* description, offset */
71 { "TSO pkts tx", offsetof(struct UPT1_TxStats, TSOPktsTxOK) }, 74 { "Tx Queue#", 0 },
72 { "TSO bytes tx", offsetof(struct UPT1_TxStats, TSOBytesTxOK) }, 75 { " TSO pkts tx", offsetof(struct UPT1_TxStats, TSOPktsTxOK) },
73 { "ucast pkts tx", offsetof(struct UPT1_TxStats, ucastPktsTxOK) }, 76 { " TSO bytes tx", offsetof(struct UPT1_TxStats, TSOBytesTxOK) },
74 { "ucast bytes tx", offsetof(struct UPT1_TxStats, ucastBytesTxOK) }, 77 { " ucast pkts tx", offsetof(struct UPT1_TxStats, ucastPktsTxOK) },
75 { "mcast pkts tx", offsetof(struct UPT1_TxStats, mcastPktsTxOK) }, 78 { " ucast bytes tx", offsetof(struct UPT1_TxStats, ucastBytesTxOK) },
76 { "mcast bytes tx", offsetof(struct UPT1_TxStats, mcastBytesTxOK) }, 79 { " mcast pkts tx", offsetof(struct UPT1_TxStats, mcastPktsTxOK) },
77 { "bcast pkts tx", offsetof(struct UPT1_TxStats, bcastPktsTxOK) }, 80 { " mcast bytes tx", offsetof(struct UPT1_TxStats, mcastBytesTxOK) },
78 { "bcast bytes tx", offsetof(struct UPT1_TxStats, bcastBytesTxOK) }, 81 { " bcast pkts tx", offsetof(struct UPT1_TxStats, bcastPktsTxOK) },
79 { "pkts tx err", offsetof(struct UPT1_TxStats, pktsTxError) }, 82 { " bcast bytes tx", offsetof(struct UPT1_TxStats, bcastBytesTxOK) },
80 { "pkts tx discard", offsetof(struct UPT1_TxStats, pktsTxDiscard) }, 83 { " pkts tx err", offsetof(struct UPT1_TxStats, pktsTxError) },
84 { " pkts tx discard", offsetof(struct UPT1_TxStats, pktsTxDiscard) },
81}; 85};
82 86
83/* per tq stats maintained by the driver */ 87/* per tq stats maintained by the driver */
84static const struct vmxnet3_stat_desc 88static const struct vmxnet3_stat_desc
85vmxnet3_tq_driver_stats[] = { 89vmxnet3_tq_driver_stats[] = {
86 /* description, offset */ 90 /* description, offset */
87 {"drv dropped tx total", offsetof(struct vmxnet3_tq_driver_stats, 91 {" drv dropped tx total", offsetof(struct vmxnet3_tq_driver_stats,
88 drop_total) }, 92 drop_total) },
89 { " too many frags", offsetof(struct vmxnet3_tq_driver_stats, 93 { " too many frags", offsetof(struct vmxnet3_tq_driver_stats,
90 drop_too_many_frags) }, 94 drop_too_many_frags) },
91 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats, 95 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats,
92 drop_oversized_hdr) }, 96 drop_oversized_hdr) },
93 { " hdr err", offsetof(struct vmxnet3_tq_driver_stats, 97 { " hdr err", offsetof(struct vmxnet3_tq_driver_stats,
94 drop_hdr_inspect_err) }, 98 drop_hdr_inspect_err) },
95 { " tso", offsetof(struct vmxnet3_tq_driver_stats, 99 { " tso", offsetof(struct vmxnet3_tq_driver_stats,
96 drop_tso) }, 100 drop_tso) },
97 { "ring full", offsetof(struct vmxnet3_tq_driver_stats, 101 { " ring full", offsetof(struct vmxnet3_tq_driver_stats,
98 tx_ring_full) }, 102 tx_ring_full) },
99 { "pkts linearized", offsetof(struct vmxnet3_tq_driver_stats, 103 { " pkts linearized", offsetof(struct vmxnet3_tq_driver_stats,
100 linearized) }, 104 linearized) },
101 { "hdr cloned", offsetof(struct vmxnet3_tq_driver_stats, 105 { " hdr cloned", offsetof(struct vmxnet3_tq_driver_stats,
102 copy_skb_header) }, 106 copy_skb_header) },
103 { "giant hdr", offsetof(struct vmxnet3_tq_driver_stats, 107 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats,
104 oversized_hdr) }, 108 oversized_hdr) },
105}; 109};
106 110
107/* per rq stats maintained by the device */ 111/* per rq stats maintained by the device */
108static const struct vmxnet3_stat_desc 112static const struct vmxnet3_stat_desc
109vmxnet3_rq_dev_stats[] = { 113vmxnet3_rq_dev_stats[] = {
110 { "LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) }, 114 { "Rx Queue#", 0 },
111 { "LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) }, 115 { " LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) },
112 { "ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) }, 116 { " LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) },
113 { "ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) }, 117 { " ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
114 { "mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) }, 118 { " ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
115 { "mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) }, 119 { " mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
116 { "bcast pkts rx", offsetof(struct UPT1_RxStats, bcastPktsRxOK) }, 120 { " mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
117 { "bcast bytes rx", offsetof(struct UPT1_RxStats, bcastBytesRxOK) }, 121 { " bcast pkts rx", offsetof(struct UPT1_RxStats, bcastPktsRxOK) },
118 { "pkts rx out of buf", offsetof(struct UPT1_RxStats, pktsRxOutOfBuf) }, 122 { " bcast bytes rx", offsetof(struct UPT1_RxStats, bcastBytesRxOK) },
119 { "pkts rx err", offsetof(struct UPT1_RxStats, pktsRxError) }, 123 { " pkts rx OOB", offsetof(struct UPT1_RxStats, pktsRxOutOfBuf) },
124 { " pkts rx err", offsetof(struct UPT1_RxStats, pktsRxError) },
120}; 125};
121 126
122/* per rq stats maintained by the driver */ 127/* per rq stats maintained by the driver */
123static const struct vmxnet3_stat_desc 128static const struct vmxnet3_stat_desc
124vmxnet3_rq_driver_stats[] = { 129vmxnet3_rq_driver_stats[] = {
125 /* description, offset */ 130 /* description, offset */
126 { "drv dropped rx total", offsetof(struct vmxnet3_rq_driver_stats, 131 { " drv dropped rx total", offsetof(struct vmxnet3_rq_driver_stats,
127 drop_total) }, 132 drop_total) },
128 { " err", offsetof(struct vmxnet3_rq_driver_stats, 133 { " err", offsetof(struct vmxnet3_rq_driver_stats,
129 drop_err) }, 134 drop_err) },
130 { " fcs", offsetof(struct vmxnet3_rq_driver_stats, 135 { " fcs", offsetof(struct vmxnet3_rq_driver_stats,
131 drop_fcs) }, 136 drop_fcs) },
132 { "rx buf alloc fail", offsetof(struct vmxnet3_rq_driver_stats, 137 { " rx buf alloc fail", offsetof(struct vmxnet3_rq_driver_stats,
133 rx_buf_alloc_failure) }, 138 rx_buf_alloc_failure) },
134}; 139};
135 140
136/* gloabl stats maintained by the driver */ 141/* gloabl stats maintained by the driver */
137static const struct vmxnet3_stat_desc 142static const struct vmxnet3_stat_desc
138vmxnet3_global_stats[] = { 143vmxnet3_global_stats[] = {
139 /* description, offset */ 144 /* description, offset */
140 { "tx timeout count", offsetof(struct vmxnet3_adapter, 145 { "tx timeout count", offsetof(struct vmxnet3_adapter,
141 tx_timeout_count) } 146 tx_timeout_count) }
142}; 147};
143 148
@@ -151,12 +156,15 @@ vmxnet3_get_stats(struct net_device *netdev)
151 struct UPT1_TxStats *devTxStats; 156 struct UPT1_TxStats *devTxStats;
152 struct UPT1_RxStats *devRxStats; 157 struct UPT1_RxStats *devRxStats;
153 struct net_device_stats *net_stats = &netdev->stats; 158 struct net_device_stats *net_stats = &netdev->stats;
159 unsigned long flags;
154 int i; 160 int i;
155 161
156 adapter = netdev_priv(netdev); 162 adapter = netdev_priv(netdev);
157 163
158 /* Collect the dev stats into the shared area */ 164 /* Collect the dev stats into the shared area */
165 spin_lock_irqsave(&adapter->cmd_lock, flags);
159 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS); 166 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
167 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
160 168
161 memset(net_stats, 0, sizeof(*net_stats)); 169 memset(net_stats, 0, sizeof(*net_stats));
162 for (i = 0; i < adapter->num_tx_queues; i++) { 170 for (i = 0; i < adapter->num_tx_queues; i++) {
@@ -193,12 +201,15 @@ vmxnet3_get_stats(struct net_device *netdev)
193static int 201static int
194vmxnet3_get_sset_count(struct net_device *netdev, int sset) 202vmxnet3_get_sset_count(struct net_device *netdev, int sset)
195{ 203{
204 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
196 switch (sset) { 205 switch (sset) {
197 case ETH_SS_STATS: 206 case ETH_SS_STATS:
198 return ARRAY_SIZE(vmxnet3_tq_dev_stats) + 207 return (ARRAY_SIZE(vmxnet3_tq_dev_stats) +
199 ARRAY_SIZE(vmxnet3_tq_driver_stats) + 208 ARRAY_SIZE(vmxnet3_tq_driver_stats)) *
200 ARRAY_SIZE(vmxnet3_rq_dev_stats) + 209 adapter->num_tx_queues +
201 ARRAY_SIZE(vmxnet3_rq_driver_stats) + 210 (ARRAY_SIZE(vmxnet3_rq_dev_stats) +
211 ARRAY_SIZE(vmxnet3_rq_driver_stats)) *
212 adapter->num_rx_queues +
202 ARRAY_SIZE(vmxnet3_global_stats); 213 ARRAY_SIZE(vmxnet3_global_stats);
203 default: 214 default:
204 return -EOPNOTSUPP; 215 return -EOPNOTSUPP;
@@ -206,10 +217,16 @@ vmxnet3_get_sset_count(struct net_device *netdev, int sset)
206} 217}
207 218
208 219
220/* Should be multiple of 4 */
221#define NUM_TX_REGS 8
222#define NUM_RX_REGS 12
223
209static int 224static int
210vmxnet3_get_regs_len(struct net_device *netdev) 225vmxnet3_get_regs_len(struct net_device *netdev)
211{ 226{
212 return 20 * sizeof(u32); 227 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
228 return (adapter->num_tx_queues * NUM_TX_REGS * sizeof(u32) +
229 adapter->num_rx_queues * NUM_RX_REGS * sizeof(u32));
213} 230}
214 231
215 232
@@ -240,29 +257,37 @@ vmxnet3_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
240static void 257static void
241vmxnet3_get_strings(struct net_device *netdev, u32 stringset, u8 *buf) 258vmxnet3_get_strings(struct net_device *netdev, u32 stringset, u8 *buf)
242{ 259{
260 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
243 if (stringset == ETH_SS_STATS) { 261 if (stringset == ETH_SS_STATS) {
244 int i; 262 int i, j;
245 263 for (j = 0; j < adapter->num_tx_queues; j++) {
246 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) { 264 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) {
247 memcpy(buf, vmxnet3_tq_dev_stats[i].desc, 265 memcpy(buf, vmxnet3_tq_dev_stats[i].desc,
248 ETH_GSTRING_LEN); 266 ETH_GSTRING_LEN);
249 buf += ETH_GSTRING_LEN; 267 buf += ETH_GSTRING_LEN;
250 } 268 }
251 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++) { 269 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats);
252 memcpy(buf, vmxnet3_tq_driver_stats[i].desc, 270 i++) {
253 ETH_GSTRING_LEN); 271 memcpy(buf, vmxnet3_tq_driver_stats[i].desc,
254 buf += ETH_GSTRING_LEN; 272 ETH_GSTRING_LEN);
255 } 273 buf += ETH_GSTRING_LEN;
256 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) { 274 }
257 memcpy(buf, vmxnet3_rq_dev_stats[i].desc,
258 ETH_GSTRING_LEN);
259 buf += ETH_GSTRING_LEN;
260 } 275 }
261 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++) { 276
262 memcpy(buf, vmxnet3_rq_driver_stats[i].desc, 277 for (j = 0; j < adapter->num_rx_queues; j++) {
263 ETH_GSTRING_LEN); 278 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) {
264 buf += ETH_GSTRING_LEN; 279 memcpy(buf, vmxnet3_rq_dev_stats[i].desc,
280 ETH_GSTRING_LEN);
281 buf += ETH_GSTRING_LEN;
282 }
283 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats);
284 i++) {
285 memcpy(buf, vmxnet3_rq_driver_stats[i].desc,
286 ETH_GSTRING_LEN);
287 buf += ETH_GSTRING_LEN;
288 }
265 } 289 }
290
266 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++) { 291 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++) {
267 memcpy(buf, vmxnet3_global_stats[i].desc, 292 memcpy(buf, vmxnet3_global_stats[i].desc,
268 ETH_GSTRING_LEN); 293 ETH_GSTRING_LEN);
@@ -277,6 +302,7 @@ vmxnet3_set_flags(struct net_device *netdev, u32 data)
277 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 302 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
278 u8 lro_requested = (data & ETH_FLAG_LRO) == 0 ? 0 : 1; 303 u8 lro_requested = (data & ETH_FLAG_LRO) == 0 ? 0 : 1;
279 u8 lro_present = (netdev->features & NETIF_F_LRO) == 0 ? 0 : 1; 304 u8 lro_present = (netdev->features & NETIF_F_LRO) == 0 ? 0 : 1;
305 unsigned long flags;
280 306
281 if (data & ~ETH_FLAG_LRO) 307 if (data & ~ETH_FLAG_LRO)
282 return -EOPNOTSUPP; 308 return -EOPNOTSUPP;
@@ -292,8 +318,10 @@ vmxnet3_set_flags(struct net_device *netdev, u32 data)
292 else 318 else
293 adapter->shared->devRead.misc.uptFeatures &= 319 adapter->shared->devRead.misc.uptFeatures &=
294 ~UPT1_F_LRO; 320 ~UPT1_F_LRO;
321 spin_lock_irqsave(&adapter->cmd_lock, flags);
295 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 322 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
296 VMXNET3_CMD_UPDATE_FEATURE); 323 VMXNET3_CMD_UPDATE_FEATURE);
324 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
297 } 325 }
298 return 0; 326 return 0;
299} 327}
@@ -303,30 +331,41 @@ vmxnet3_get_ethtool_stats(struct net_device *netdev,
303 struct ethtool_stats *stats, u64 *buf) 331 struct ethtool_stats *stats, u64 *buf)
304{ 332{
305 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 333 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
334 unsigned long flags;
306 u8 *base; 335 u8 *base;
307 int i; 336 int i;
308 int j = 0; 337 int j = 0;
309 338
339 spin_lock_irqsave(&adapter->cmd_lock, flags);
310 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS); 340 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
341 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
311 342
312 /* this does assume each counter is 64-bit wide */ 343 /* this does assume each counter is 64-bit wide */
313/* TODO change this for multiple queues */ 344 for (j = 0; j < adapter->num_tx_queues; j++) {
314 345 base = (u8 *)&adapter->tqd_start[j].stats;
315 base = (u8 *)&adapter->tqd_start[j].stats; 346 *buf++ = (u64)j;
316 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) 347 for (i = 1; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++)
317 *buf++ = *(u64 *)(base + vmxnet3_tq_dev_stats[i].offset); 348 *buf++ = *(u64 *)(base +
318 349 vmxnet3_tq_dev_stats[i].offset);
319 base = (u8 *)&adapter->tx_queue[j].stats; 350
320 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++) 351 base = (u8 *)&adapter->tx_queue[j].stats;
321 *buf++ = *(u64 *)(base + vmxnet3_tq_driver_stats[i].offset); 352 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++)
322 353 *buf++ = *(u64 *)(base +
323 base = (u8 *)&adapter->rqd_start[j].stats; 354 vmxnet3_tq_driver_stats[i].offset);
324 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) 355 }
325 *buf++ = *(u64 *)(base + vmxnet3_rq_dev_stats[i].offset);
326 356
327 base = (u8 *)&adapter->rx_queue[j].stats; 357 for (j = 0; j < adapter->num_tx_queues; j++) {
328 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++) 358 base = (u8 *)&adapter->rqd_start[j].stats;
329 *buf++ = *(u64 *)(base + vmxnet3_rq_driver_stats[i].offset); 359 *buf++ = (u64) j;
360 for (i = 1; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++)
361 *buf++ = *(u64 *)(base +
362 vmxnet3_rq_dev_stats[i].offset);
363
364 base = (u8 *)&adapter->rx_queue[j].stats;
365 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++)
366 *buf++ = *(u64 *)(base +
367 vmxnet3_rq_driver_stats[i].offset);
368 }
330 369
331 base = (u8 *)adapter; 370 base = (u8 *)adapter;
332 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++) 371 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++)
@@ -339,7 +378,7 @@ vmxnet3_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
339{ 378{
340 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 379 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
341 u32 *buf = p; 380 u32 *buf = p;
342 int i = 0; 381 int i = 0, j = 0;
343 382
344 memset(p, 0, vmxnet3_get_regs_len(netdev)); 383 memset(p, 0, vmxnet3_get_regs_len(netdev));
345 384
@@ -348,31 +387,35 @@ vmxnet3_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
348 /* Update vmxnet3_get_regs_len if we want to dump more registers */ 387 /* Update vmxnet3_get_regs_len if we want to dump more registers */
349 388
350 /* make each ring use multiple of 16 bytes */ 389 /* make each ring use multiple of 16 bytes */
351/* TODO change this for multiple queues */ 390 for (i = 0; i < adapter->num_tx_queues; i++) {
352 buf[0] = adapter->tx_queue[i].tx_ring.next2fill; 391 buf[j++] = adapter->tx_queue[i].tx_ring.next2fill;
353 buf[1] = adapter->tx_queue[i].tx_ring.next2comp; 392 buf[j++] = adapter->tx_queue[i].tx_ring.next2comp;
354 buf[2] = adapter->tx_queue[i].tx_ring.gen; 393 buf[j++] = adapter->tx_queue[i].tx_ring.gen;
355 buf[3] = 0; 394 buf[j++] = 0;
356 395
357 buf[4] = adapter->tx_queue[i].comp_ring.next2proc; 396 buf[j++] = adapter->tx_queue[i].comp_ring.next2proc;
358 buf[5] = adapter->tx_queue[i].comp_ring.gen; 397 buf[j++] = adapter->tx_queue[i].comp_ring.gen;
359 buf[6] = adapter->tx_queue[i].stopped; 398 buf[j++] = adapter->tx_queue[i].stopped;
360 buf[7] = 0; 399 buf[j++] = 0;
361 400 }
362 buf[8] = adapter->rx_queue[i].rx_ring[0].next2fill; 401
363 buf[9] = adapter->rx_queue[i].rx_ring[0].next2comp; 402 for (i = 0; i < adapter->num_rx_queues; i++) {
364 buf[10] = adapter->rx_queue[i].rx_ring[0].gen; 403 buf[j++] = adapter->rx_queue[i].rx_ring[0].next2fill;
365 buf[11] = 0; 404 buf[j++] = adapter->rx_queue[i].rx_ring[0].next2comp;
366 405 buf[j++] = adapter->rx_queue[i].rx_ring[0].gen;
367 buf[12] = adapter->rx_queue[i].rx_ring[1].next2fill; 406 buf[j++] = 0;
368 buf[13] = adapter->rx_queue[i].rx_ring[1].next2comp; 407
369 buf[14] = adapter->rx_queue[i].rx_ring[1].gen; 408 buf[j++] = adapter->rx_queue[i].rx_ring[1].next2fill;
370 buf[15] = 0; 409 buf[j++] = adapter->rx_queue[i].rx_ring[1].next2comp;
371 410 buf[j++] = adapter->rx_queue[i].rx_ring[1].gen;
372 buf[16] = adapter->rx_queue[i].comp_ring.next2proc; 411 buf[j++] = 0;
373 buf[17] = adapter->rx_queue[i].comp_ring.gen; 412
374 buf[18] = 0; 413 buf[j++] = adapter->rx_queue[i].comp_ring.next2proc;
375 buf[19] = 0; 414 buf[j++] = adapter->rx_queue[i].comp_ring.gen;
415 buf[j++] = 0;
416 buf[j++] = 0;
417 }
418
376} 419}
377 420
378 421
@@ -574,6 +617,7 @@ vmxnet3_set_rss_indir(struct net_device *netdev,
574 const struct ethtool_rxfh_indir *p) 617 const struct ethtool_rxfh_indir *p)
575{ 618{
576 unsigned int i; 619 unsigned int i;
620 unsigned long flags;
577 struct vmxnet3_adapter *adapter = netdev_priv(netdev); 621 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
578 struct UPT1_RSSConf *rssConf = adapter->rss_conf; 622 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
579 623
@@ -592,8 +636,10 @@ vmxnet3_set_rss_indir(struct net_device *netdev,
592 for (i = 0; i < rssConf->indTableSize; i++) 636 for (i = 0; i < rssConf->indTableSize; i++)
593 rssConf->indTable[i] = p->ring_index[i]; 637 rssConf->indTable[i] = p->ring_index[i];
594 638
639 spin_lock_irqsave(&adapter->cmd_lock, flags);
595 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, 640 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
596 VMXNET3_CMD_UPDATE_RSSIDT); 641 VMXNET3_CMD_UPDATE_RSSIDT);
642 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
597 643
598 return 0; 644 return 0;
599 645
diff --git a/drivers/net/vmxnet3/vmxnet3_int.h b/drivers/net/vmxnet3/vmxnet3_int.h
index 7fadeed37f03..fb5d245ac878 100644
--- a/drivers/net/vmxnet3/vmxnet3_int.h
+++ b/drivers/net/vmxnet3/vmxnet3_int.h
@@ -68,10 +68,10 @@
68/* 68/*
69 * Version numbers 69 * Version numbers
70 */ 70 */
71#define VMXNET3_DRIVER_VERSION_STRING "1.0.16.0-k" 71#define VMXNET3_DRIVER_VERSION_STRING "1.0.25.0-k"
72 72
73/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */ 73/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
74#define VMXNET3_DRIVER_VERSION_NUM 0x01001000 74#define VMXNET3_DRIVER_VERSION_NUM 0x01001900
75 75
76#if defined(CONFIG_PCI_MSI) 76#if defined(CONFIG_PCI_MSI)
77 /* RSS only makes sense if MSI-X is supported. */ 77 /* RSS only makes sense if MSI-X is supported. */
@@ -289,7 +289,7 @@ struct vmxnet3_rx_queue {
289 289
290#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \ 290#define VMXNET3_LINUX_MAX_MSIX_VECT (VMXNET3_DEVICE_MAX_TX_QUEUES + \
291 VMXNET3_DEVICE_MAX_RX_QUEUES + 1) 291 VMXNET3_DEVICE_MAX_RX_QUEUES + 1)
292#define VMXNET3_LINUX_MIN_MSIX_VECT 3 /* 1 for each : tx, rx and event */ 292#define VMXNET3_LINUX_MIN_MSIX_VECT 2 /* 1 for tx-rx pair and 1 for event */
293 293
294 294
295struct vmxnet3_intr { 295struct vmxnet3_intr {
@@ -317,6 +317,7 @@ struct vmxnet3_adapter {
317 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES]; 317 struct vmxnet3_rx_queue rx_queue[VMXNET3_DEVICE_MAX_RX_QUEUES];
318 struct vlan_group *vlan_grp; 318 struct vlan_group *vlan_grp;
319 struct vmxnet3_intr intr; 319 struct vmxnet3_intr intr;
320 spinlock_t cmd_lock;
320 struct Vmxnet3_DriverShared *shared; 321 struct Vmxnet3_DriverShared *shared;
321 struct Vmxnet3_PMConf *pm_conf; 322 struct Vmxnet3_PMConf *pm_conf;
322 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */ 323 struct Vmxnet3_TxQueueDesc *tqd_start; /* all tx queue desc */
diff --git a/drivers/net/vxge/vxge-config.c b/drivers/net/vxge/vxge-config.c
index 01c05f53e2f9..77097e383cf4 100644
--- a/drivers/net/vxge/vxge-config.c
+++ b/drivers/net/vxge/vxge-config.c
@@ -387,8 +387,8 @@ vxge_hw_vpath_eprom_img_ver_get(struct __vxge_hw_device *hldev,
387 data1 = steer_ctrl = 0; 387 data1 = steer_ctrl = 0;
388 388
389 status = vxge_hw_vpath_fw_api(vpath, 389 status = vxge_hw_vpath_fw_api(vpath,
390 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO,
391 VXGE_HW_FW_API_GET_EPROM_REV, 390 VXGE_HW_FW_API_GET_EPROM_REV,
391 VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_FW_MEMO,
392 0, &data0, &data1, &steer_ctrl); 392 0, &data0, &data1, &steer_ctrl);
393 if (status != VXGE_HW_OK) 393 if (status != VXGE_HW_OK)
394 break; 394 break;
@@ -2868,6 +2868,8 @@ __vxge_hw_ring_create(struct __vxge_hw_vpath_handle *vp,
2868 ring->rxd_init = attr->rxd_init; 2868 ring->rxd_init = attr->rxd_init;
2869 ring->rxd_term = attr->rxd_term; 2869 ring->rxd_term = attr->rxd_term;
2870 ring->buffer_mode = config->buffer_mode; 2870 ring->buffer_mode = config->buffer_mode;
2871 ring->tim_rti_cfg1_saved = vp->vpath->tim_rti_cfg1_saved;
2872 ring->tim_rti_cfg3_saved = vp->vpath->tim_rti_cfg3_saved;
2871 ring->rxds_limit = config->rxds_limit; 2873 ring->rxds_limit = config->rxds_limit;
2872 2874
2873 ring->rxd_size = vxge_hw_ring_rxd_size_get(config->buffer_mode); 2875 ring->rxd_size = vxge_hw_ring_rxd_size_get(config->buffer_mode);
@@ -3511,6 +3513,8 @@ __vxge_hw_fifo_create(struct __vxge_hw_vpath_handle *vp,
3511 3513
3512 /* apply "interrupts per txdl" attribute */ 3514 /* apply "interrupts per txdl" attribute */
3513 fifo->interrupt_type = VXGE_HW_FIFO_TXD_INT_TYPE_UTILZ; 3515 fifo->interrupt_type = VXGE_HW_FIFO_TXD_INT_TYPE_UTILZ;
3516 fifo->tim_tti_cfg1_saved = vpath->tim_tti_cfg1_saved;
3517 fifo->tim_tti_cfg3_saved = vpath->tim_tti_cfg3_saved;
3514 3518
3515 if (fifo->config->intr) 3519 if (fifo->config->intr)
3516 fifo->interrupt_type = VXGE_HW_FIFO_TXD_INT_TYPE_PER_LIST; 3520 fifo->interrupt_type = VXGE_HW_FIFO_TXD_INT_TYPE_PER_LIST;
@@ -4377,6 +4381,8 @@ __vxge_hw_vpath_tim_configure(struct __vxge_hw_device *hldev, u32 vp_id)
4377 } 4381 }
4378 4382
4379 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]); 4383 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);
4384 vpath->tim_tti_cfg1_saved = val64;
4385
4380 val64 = readq(&vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_TX]); 4386 val64 = readq(&vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_TX]);
4381 4387
4382 if (config->tti.uec_a != VXGE_HW_USE_FLASH_DEFAULT) { 4388 if (config->tti.uec_a != VXGE_HW_USE_FLASH_DEFAULT) {
@@ -4433,6 +4439,7 @@ __vxge_hw_vpath_tim_configure(struct __vxge_hw_device *hldev, u32 vp_id)
4433 } 4439 }
4434 4440
4435 writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]); 4441 writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]);
4442 vpath->tim_tti_cfg3_saved = val64;
4436 } 4443 }
4437 4444
4438 if (config->ring.enable == VXGE_HW_RING_ENABLE) { 4445 if (config->ring.enable == VXGE_HW_RING_ENABLE) {
@@ -4481,6 +4488,8 @@ __vxge_hw_vpath_tim_configure(struct __vxge_hw_device *hldev, u32 vp_id)
4481 } 4488 }
4482 4489
4483 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]); 4490 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]);
4491 vpath->tim_rti_cfg1_saved = val64;
4492
4484 val64 = readq(&vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_RX]); 4493 val64 = readq(&vp_reg->tim_cfg2_int_num[VXGE_HW_VPATH_INTR_RX]);
4485 4494
4486 if (config->rti.uec_a != VXGE_HW_USE_FLASH_DEFAULT) { 4495 if (config->rti.uec_a != VXGE_HW_USE_FLASH_DEFAULT) {
@@ -4537,6 +4546,7 @@ __vxge_hw_vpath_tim_configure(struct __vxge_hw_device *hldev, u32 vp_id)
4537 } 4546 }
4538 4547
4539 writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]); 4548 writeq(val64, &vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]);
4549 vpath->tim_rti_cfg3_saved = val64;
4540 } 4550 }
4541 4551
4542 val64 = 0; 4552 val64 = 0;
@@ -4555,26 +4565,6 @@ __vxge_hw_vpath_tim_configure(struct __vxge_hw_device *hldev, u32 vp_id)
4555 return status; 4565 return status;
4556} 4566}
4557 4567
4558void vxge_hw_vpath_tti_ci_set(struct __vxge_hw_device *hldev, u32 vp_id)
4559{
4560 struct __vxge_hw_virtualpath *vpath;
4561 struct vxge_hw_vpath_reg __iomem *vp_reg;
4562 struct vxge_hw_vp_config *config;
4563 u64 val64;
4564
4565 vpath = &hldev->virtual_paths[vp_id];
4566 vp_reg = vpath->vp_reg;
4567 config = vpath->vp_config;
4568
4569 if (config->fifo.enable == VXGE_HW_FIFO_ENABLE &&
4570 config->tti.timer_ci_en != VXGE_HW_TIM_TIMER_CI_ENABLE) {
4571 config->tti.timer_ci_en = VXGE_HW_TIM_TIMER_CI_ENABLE;
4572 val64 = readq(&vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);
4573 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI;
4574 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);
4575 }
4576}
4577
4578/* 4568/*
4579 * __vxge_hw_vpath_initialize 4569 * __vxge_hw_vpath_initialize
4580 * This routine is the final phase of init which initializes the 4570 * This routine is the final phase of init which initializes the
diff --git a/drivers/net/vxge/vxge-config.h b/drivers/net/vxge/vxge-config.h
index e249e288d160..3c53aa732c9d 100644
--- a/drivers/net/vxge/vxge-config.h
+++ b/drivers/net/vxge/vxge-config.h
@@ -682,6 +682,10 @@ struct __vxge_hw_virtualpath {
682 u32 vsport_number; 682 u32 vsport_number;
683 u32 max_kdfc_db; 683 u32 max_kdfc_db;
684 u32 max_nofl_db; 684 u32 max_nofl_db;
685 u64 tim_tti_cfg1_saved;
686 u64 tim_tti_cfg3_saved;
687 u64 tim_rti_cfg1_saved;
688 u64 tim_rti_cfg3_saved;
685 689
686 struct __vxge_hw_ring *____cacheline_aligned ringh; 690 struct __vxge_hw_ring *____cacheline_aligned ringh;
687 struct __vxge_hw_fifo *____cacheline_aligned fifoh; 691 struct __vxge_hw_fifo *____cacheline_aligned fifoh;
@@ -921,6 +925,9 @@ struct __vxge_hw_ring {
921 u32 doorbell_cnt; 925 u32 doorbell_cnt;
922 u32 total_db_cnt; 926 u32 total_db_cnt;
923 u64 rxds_limit; 927 u64 rxds_limit;
928 u32 rtimer;
929 u64 tim_rti_cfg1_saved;
930 u64 tim_rti_cfg3_saved;
924 931
925 enum vxge_hw_status (*callback)( 932 enum vxge_hw_status (*callback)(
926 struct __vxge_hw_ring *ringh, 933 struct __vxge_hw_ring *ringh,
@@ -1000,6 +1007,9 @@ struct __vxge_hw_fifo {
1000 u32 per_txdl_space; 1007 u32 per_txdl_space;
1001 u32 vp_id; 1008 u32 vp_id;
1002 u32 tx_intr_num; 1009 u32 tx_intr_num;
1010 u32 rtimer;
1011 u64 tim_tti_cfg1_saved;
1012 u64 tim_tti_cfg3_saved;
1003 1013
1004 enum vxge_hw_status (*callback)( 1014 enum vxge_hw_status (*callback)(
1005 struct __vxge_hw_fifo *fifo_handle, 1015 struct __vxge_hw_fifo *fifo_handle,
diff --git a/drivers/net/vxge/vxge-main.c b/drivers/net/vxge/vxge-main.c
index c81a6512c683..e40f619b62b1 100644
--- a/drivers/net/vxge/vxge-main.c
+++ b/drivers/net/vxge/vxge-main.c
@@ -371,9 +371,6 @@ vxge_rx_1b_compl(struct __vxge_hw_ring *ringh, void *dtr,
371 struct vxge_hw_ring_rxd_info ext_info; 371 struct vxge_hw_ring_rxd_info ext_info;
372 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d", 372 vxge_debug_entryexit(VXGE_TRACE, "%s: %s:%d",
373 ring->ndev->name, __func__, __LINE__); 373 ring->ndev->name, __func__, __LINE__);
374 ring->pkts_processed = 0;
375
376 vxge_hw_ring_replenish(ringh);
377 374
378 do { 375 do {
379 prefetch((char *)dtr + L1_CACHE_BYTES); 376 prefetch((char *)dtr + L1_CACHE_BYTES);
@@ -1588,6 +1585,36 @@ static int vxge_reset_vpath(struct vxgedev *vdev, int vp_id)
1588 return ret; 1585 return ret;
1589} 1586}
1590 1587
1588/* Configure CI */
1589static void vxge_config_ci_for_tti_rti(struct vxgedev *vdev)
1590{
1591 int i = 0;
1592
1593 /* Enable CI for RTI */
1594 if (vdev->config.intr_type == MSI_X) {
1595 for (i = 0; i < vdev->no_of_vpath; i++) {
1596 struct __vxge_hw_ring *hw_ring;
1597
1598 hw_ring = vdev->vpaths[i].ring.handle;
1599 vxge_hw_vpath_dynamic_rti_ci_set(hw_ring);
1600 }
1601 }
1602
1603 /* Enable CI for TTI */
1604 for (i = 0; i < vdev->no_of_vpath; i++) {
1605 struct __vxge_hw_fifo *hw_fifo = vdev->vpaths[i].fifo.handle;
1606 vxge_hw_vpath_tti_ci_set(hw_fifo);
1607 /*
1608 * For Inta (with or without napi), Set CI ON for only one
1609 * vpath. (Have only one free running timer).
1610 */
1611 if ((vdev->config.intr_type == INTA) && (i == 0))
1612 break;
1613 }
1614
1615 return;
1616}
1617
1591static int do_vxge_reset(struct vxgedev *vdev, int event) 1618static int do_vxge_reset(struct vxgedev *vdev, int event)
1592{ 1619{
1593 enum vxge_hw_status status; 1620 enum vxge_hw_status status;
@@ -1753,6 +1780,9 @@ static int do_vxge_reset(struct vxgedev *vdev, int event)
1753 netif_tx_wake_all_queues(vdev->ndev); 1780 netif_tx_wake_all_queues(vdev->ndev);
1754 } 1781 }
1755 1782
1783 /* configure CI */
1784 vxge_config_ci_for_tti_rti(vdev);
1785
1756out: 1786out:
1757 vxge_debug_entryexit(VXGE_TRACE, 1787 vxge_debug_entryexit(VXGE_TRACE,
1758 "%s:%d Exiting...", __func__, __LINE__); 1788 "%s:%d Exiting...", __func__, __LINE__);
@@ -1793,22 +1823,29 @@ static void vxge_reset(struct work_struct *work)
1793 */ 1823 */
1794static int vxge_poll_msix(struct napi_struct *napi, int budget) 1824static int vxge_poll_msix(struct napi_struct *napi, int budget)
1795{ 1825{
1796 struct vxge_ring *ring = 1826 struct vxge_ring *ring = container_of(napi, struct vxge_ring, napi);
1797 container_of(napi, struct vxge_ring, napi); 1827 int pkts_processed;
1798 int budget_org = budget; 1828 int budget_org = budget;
1799 ring->budget = budget;
1800 1829
1830 ring->budget = budget;
1831 ring->pkts_processed = 0;
1801 vxge_hw_vpath_poll_rx(ring->handle); 1832 vxge_hw_vpath_poll_rx(ring->handle);
1833 pkts_processed = ring->pkts_processed;
1802 1834
1803 if (ring->pkts_processed < budget_org) { 1835 if (ring->pkts_processed < budget_org) {
1804 napi_complete(napi); 1836 napi_complete(napi);
1837
1805 /* Re enable the Rx interrupts for the vpath */ 1838 /* Re enable the Rx interrupts for the vpath */
1806 vxge_hw_channel_msix_unmask( 1839 vxge_hw_channel_msix_unmask(
1807 (struct __vxge_hw_channel *)ring->handle, 1840 (struct __vxge_hw_channel *)ring->handle,
1808 ring->rx_vector_no); 1841 ring->rx_vector_no);
1842 mmiowb();
1809 } 1843 }
1810 1844
1811 return ring->pkts_processed; 1845 /* We are copying and returning the local variable, in case if after
1846 * clearing the msix interrupt above, if the interrupt fires right
1847 * away which can preempt this NAPI thread */
1848 return pkts_processed;
1812} 1849}
1813 1850
1814static int vxge_poll_inta(struct napi_struct *napi, int budget) 1851static int vxge_poll_inta(struct napi_struct *napi, int budget)
@@ -1824,6 +1861,7 @@ static int vxge_poll_inta(struct napi_struct *napi, int budget)
1824 for (i = 0; i < vdev->no_of_vpath; i++) { 1861 for (i = 0; i < vdev->no_of_vpath; i++) {
1825 ring = &vdev->vpaths[i].ring; 1862 ring = &vdev->vpaths[i].ring;
1826 ring->budget = budget; 1863 ring->budget = budget;
1864 ring->pkts_processed = 0;
1827 vxge_hw_vpath_poll_rx(ring->handle); 1865 vxge_hw_vpath_poll_rx(ring->handle);
1828 pkts_processed += ring->pkts_processed; 1866 pkts_processed += ring->pkts_processed;
1829 budget -= ring->pkts_processed; 1867 budget -= ring->pkts_processed;
@@ -2054,6 +2092,7 @@ static int vxge_open_vpaths(struct vxgedev *vdev)
2054 netdev_get_tx_queue(vdev->ndev, 0); 2092 netdev_get_tx_queue(vdev->ndev, 0);
2055 vpath->fifo.indicate_max_pkts = 2093 vpath->fifo.indicate_max_pkts =
2056 vdev->config.fifo_indicate_max_pkts; 2094 vdev->config.fifo_indicate_max_pkts;
2095 vpath->fifo.tx_vector_no = 0;
2057 vpath->ring.rx_vector_no = 0; 2096 vpath->ring.rx_vector_no = 0;
2058 vpath->ring.rx_csum = vdev->rx_csum; 2097 vpath->ring.rx_csum = vdev->rx_csum;
2059 vpath->ring.rx_hwts = vdev->rx_hwts; 2098 vpath->ring.rx_hwts = vdev->rx_hwts;
@@ -2079,6 +2118,61 @@ static int vxge_open_vpaths(struct vxgedev *vdev)
2079 return VXGE_HW_OK; 2118 return VXGE_HW_OK;
2080} 2119}
2081 2120
2121/**
2122 * adaptive_coalesce_tx_interrupts - Changes the interrupt coalescing
2123 * if the interrupts are not within a range
2124 * @fifo: pointer to transmit fifo structure
2125 * Description: The function changes boundary timer and restriction timer
2126 * value depends on the traffic
2127 * Return Value: None
2128 */
2129static void adaptive_coalesce_tx_interrupts(struct vxge_fifo *fifo)
2130{
2131 fifo->interrupt_count++;
2132 if (jiffies > fifo->jiffies + HZ / 100) {
2133 struct __vxge_hw_fifo *hw_fifo = fifo->handle;
2134
2135 fifo->jiffies = jiffies;
2136 if (fifo->interrupt_count > VXGE_T1A_MAX_TX_INTERRUPT_COUNT &&
2137 hw_fifo->rtimer != VXGE_TTI_RTIMER_ADAPT_VAL) {
2138 hw_fifo->rtimer = VXGE_TTI_RTIMER_ADAPT_VAL;
2139 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2140 } else if (hw_fifo->rtimer != 0) {
2141 hw_fifo->rtimer = 0;
2142 vxge_hw_vpath_dynamic_tti_rtimer_set(hw_fifo);
2143 }
2144 fifo->interrupt_count = 0;
2145 }
2146}
2147
2148/**
2149 * adaptive_coalesce_rx_interrupts - Changes the interrupt coalescing
2150 * if the interrupts are not within a range
2151 * @ring: pointer to receive ring structure
2152 * Description: The function increases of decreases the packet counts within
2153 * the ranges of traffic utilization, if the interrupts due to this ring are
2154 * not within a fixed range.
2155 * Return Value: Nothing
2156 */
2157static void adaptive_coalesce_rx_interrupts(struct vxge_ring *ring)
2158{
2159 ring->interrupt_count++;
2160 if (jiffies > ring->jiffies + HZ / 100) {
2161 struct __vxge_hw_ring *hw_ring = ring->handle;
2162
2163 ring->jiffies = jiffies;
2164 if (ring->interrupt_count > VXGE_T1A_MAX_INTERRUPT_COUNT &&
2165 hw_ring->rtimer != VXGE_RTI_RTIMER_ADAPT_VAL) {
2166 hw_ring->rtimer = VXGE_RTI_RTIMER_ADAPT_VAL;
2167 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2168 } else if (hw_ring->rtimer != 0) {
2169 hw_ring->rtimer = 0;
2170 vxge_hw_vpath_dynamic_rti_rtimer_set(hw_ring);
2171 }
2172 ring->interrupt_count = 0;
2173 }
2174}
2175
2082/* 2176/*
2083 * vxge_isr_napi 2177 * vxge_isr_napi
2084 * @irq: the irq of the device. 2178 * @irq: the irq of the device.
@@ -2139,24 +2233,39 @@ static irqreturn_t vxge_isr_napi(int irq, void *dev_id)
2139 2233
2140#ifdef CONFIG_PCI_MSI 2234#ifdef CONFIG_PCI_MSI
2141 2235
2142static irqreturn_t 2236static irqreturn_t vxge_tx_msix_handle(int irq, void *dev_id)
2143vxge_tx_msix_handle(int irq, void *dev_id)
2144{ 2237{
2145 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id; 2238 struct vxge_fifo *fifo = (struct vxge_fifo *)dev_id;
2146 2239
2240 adaptive_coalesce_tx_interrupts(fifo);
2241
2242 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)fifo->handle,
2243 fifo->tx_vector_no);
2244
2245 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)fifo->handle,
2246 fifo->tx_vector_no);
2247
2147 VXGE_COMPLETE_VPATH_TX(fifo); 2248 VXGE_COMPLETE_VPATH_TX(fifo);
2148 2249
2250 vxge_hw_channel_msix_unmask((struct __vxge_hw_channel *)fifo->handle,
2251 fifo->tx_vector_no);
2252
2253 mmiowb();
2254
2149 return IRQ_HANDLED; 2255 return IRQ_HANDLED;
2150} 2256}
2151 2257
2152static irqreturn_t 2258static irqreturn_t vxge_rx_msix_napi_handle(int irq, void *dev_id)
2153vxge_rx_msix_napi_handle(int irq, void *dev_id)
2154{ 2259{
2155 struct vxge_ring *ring = (struct vxge_ring *)dev_id; 2260 struct vxge_ring *ring = (struct vxge_ring *)dev_id;
2156 2261
2157 /* MSIX_IDX for Rx is 1 */ 2262 adaptive_coalesce_rx_interrupts(ring);
2263
2158 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle, 2264 vxge_hw_channel_msix_mask((struct __vxge_hw_channel *)ring->handle,
2159 ring->rx_vector_no); 2265 ring->rx_vector_no);
2266
2267 vxge_hw_channel_msix_clear((struct __vxge_hw_channel *)ring->handle,
2268 ring->rx_vector_no);
2160 2269
2161 napi_schedule(&ring->napi); 2270 napi_schedule(&ring->napi);
2162 return IRQ_HANDLED; 2271 return IRQ_HANDLED;
@@ -2173,14 +2282,20 @@ vxge_alarm_msix_handle(int irq, void *dev_id)
2173 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID; 2282 VXGE_HW_VPATH_MSIX_ACTIVE) + VXGE_ALARM_MSIX_ID;
2174 2283
2175 for (i = 0; i < vdev->no_of_vpath; i++) { 2284 for (i = 0; i < vdev->no_of_vpath; i++) {
2285 /* Reduce the chance of loosing alarm interrupts by masking
2286 * the vector. A pending bit will be set if an alarm is
2287 * generated and on unmask the interrupt will be fired.
2288 */
2176 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id); 2289 vxge_hw_vpath_msix_mask(vdev->vpaths[i].handle, msix_id);
2290 vxge_hw_vpath_msix_clear(vdev->vpaths[i].handle, msix_id);
2291 mmiowb();
2177 2292
2178 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle, 2293 status = vxge_hw_vpath_alarm_process(vdev->vpaths[i].handle,
2179 vdev->exec_mode); 2294 vdev->exec_mode);
2180 if (status == VXGE_HW_OK) { 2295 if (status == VXGE_HW_OK) {
2181
2182 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle, 2296 vxge_hw_vpath_msix_unmask(vdev->vpaths[i].handle,
2183 msix_id); 2297 msix_id);
2298 mmiowb();
2184 continue; 2299 continue;
2185 } 2300 }
2186 vxge_debug_intr(VXGE_ERR, 2301 vxge_debug_intr(VXGE_ERR,
@@ -2299,6 +2414,9 @@ static int vxge_enable_msix(struct vxgedev *vdev)
2299 vpath->ring.rx_vector_no = (vpath->device_id * 2414 vpath->ring.rx_vector_no = (vpath->device_id *
2300 VXGE_HW_VPATH_MSIX_ACTIVE) + 1; 2415 VXGE_HW_VPATH_MSIX_ACTIVE) + 1;
2301 2416
2417 vpath->fifo.tx_vector_no = (vpath->device_id *
2418 VXGE_HW_VPATH_MSIX_ACTIVE);
2419
2302 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id, 2420 vxge_hw_vpath_msix_set(vpath->handle, tim_msix_id,
2303 VXGE_ALARM_MSIX_ID); 2421 VXGE_ALARM_MSIX_ID);
2304 } 2422 }
@@ -2474,8 +2592,9 @@ INTA_MODE:
2474 "%s:vxge:INTA", vdev->ndev->name); 2592 "%s:vxge:INTA", vdev->ndev->name);
2475 vxge_hw_device_set_intr_type(vdev->devh, 2593 vxge_hw_device_set_intr_type(vdev->devh,
2476 VXGE_HW_INTR_MODE_IRQLINE); 2594 VXGE_HW_INTR_MODE_IRQLINE);
2477 vxge_hw_vpath_tti_ci_set(vdev->devh, 2595
2478 vdev->vpaths[0].device_id); 2596 vxge_hw_vpath_tti_ci_set(vdev->vpaths[0].fifo.handle);
2597
2479 ret = request_irq((int) vdev->pdev->irq, 2598 ret = request_irq((int) vdev->pdev->irq,
2480 vxge_isr_napi, 2599 vxge_isr_napi,
2481 IRQF_SHARED, vdev->desc[0], vdev); 2600 IRQF_SHARED, vdev->desc[0], vdev);
@@ -2745,6 +2864,10 @@ static int vxge_open(struct net_device *dev)
2745 } 2864 }
2746 2865
2747 netif_tx_start_all_queues(vdev->ndev); 2866 netif_tx_start_all_queues(vdev->ndev);
2867
2868 /* configure CI */
2869 vxge_config_ci_for_tti_rti(vdev);
2870
2748 goto out0; 2871 goto out0;
2749 2872
2750out2: 2873out2:
@@ -3348,7 +3471,7 @@ static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
3348 vxge_debug_init(VXGE_ERR, 3471 vxge_debug_init(VXGE_ERR,
3349 "%s: vpath memory allocation failed", 3472 "%s: vpath memory allocation failed",
3350 vdev->ndev->name); 3473 vdev->ndev->name);
3351 ret = -ENODEV; 3474 ret = -ENOMEM;
3352 goto _out1; 3475 goto _out1;
3353 } 3476 }
3354 3477
@@ -3369,11 +3492,11 @@ static int __devinit vxge_device_register(struct __vxge_hw_device *hldev,
3369 if (vdev->config.gro_enable) 3492 if (vdev->config.gro_enable)
3370 ndev->features |= NETIF_F_GRO; 3493 ndev->features |= NETIF_F_GRO;
3371 3494
3372 if (register_netdev(ndev)) { 3495 ret = register_netdev(ndev);
3496 if (ret) {
3373 vxge_debug_init(vxge_hw_device_trace_level_get(hldev), 3497 vxge_debug_init(vxge_hw_device_trace_level_get(hldev),
3374 "%s: %s : device registration failed!", 3498 "%s: %s : device registration failed!",
3375 ndev->name, __func__); 3499 ndev->name, __func__);
3376 ret = -ENODEV;
3377 goto _out2; 3500 goto _out2;
3378 } 3501 }
3379 3502
@@ -3444,6 +3567,11 @@ static void vxge_device_unregister(struct __vxge_hw_device *hldev)
3444 /* in 2.6 will call stop() if device is up */ 3567 /* in 2.6 will call stop() if device is up */
3445 unregister_netdev(dev); 3568 unregister_netdev(dev);
3446 3569
3570 kfree(vdev->vpaths);
3571
3572 /* we are safe to free it now */
3573 free_netdev(dev);
3574
3447 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered", 3575 vxge_debug_init(vdev->level_trace, "%s: ethernet device unregistered",
3448 buf); 3576 buf);
3449 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf, 3577 vxge_debug_entryexit(vdev->level_trace, "%s: %s:%d Exiting...", buf,
@@ -3799,7 +3927,7 @@ static void __devinit vxge_device_config_init(
3799 break; 3927 break;
3800 3928
3801 case MSI_X: 3929 case MSI_X:
3802 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX; 3930 device_config->intr_mode = VXGE_HW_INTR_MODE_MSIX_ONE_SHOT;
3803 break; 3931 break;
3804 } 3932 }
3805 3933
@@ -4335,10 +4463,10 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4335 goto _exit1; 4463 goto _exit1;
4336 } 4464 }
4337 4465
4338 if (pci_request_region(pdev, 0, VXGE_DRIVER_NAME)) { 4466 ret = pci_request_region(pdev, 0, VXGE_DRIVER_NAME);
4467 if (ret) {
4339 vxge_debug_init(VXGE_ERR, 4468 vxge_debug_init(VXGE_ERR,
4340 "%s : request regions failed", __func__); 4469 "%s : request regions failed", __func__);
4341 ret = -ENODEV;
4342 goto _exit1; 4470 goto _exit1;
4343 } 4471 }
4344 4472
@@ -4446,7 +4574,7 @@ vxge_probe(struct pci_dev *pdev, const struct pci_device_id *pre)
4446 if (!img[i].is_valid) 4574 if (!img[i].is_valid)
4447 break; 4575 break;
4448 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version " 4576 vxge_debug_init(VXGE_TRACE, "%s: EPROM %d, version "
4449 "%d.%d.%d.%d\n", VXGE_DRIVER_NAME, i, 4577 "%d.%d.%d.%d", VXGE_DRIVER_NAME, i,
4450 VXGE_EPROM_IMG_MAJOR(img[i].version), 4578 VXGE_EPROM_IMG_MAJOR(img[i].version),
4451 VXGE_EPROM_IMG_MINOR(img[i].version), 4579 VXGE_EPROM_IMG_MINOR(img[i].version),
4452 VXGE_EPROM_IMG_FIX(img[i].version), 4580 VXGE_EPROM_IMG_FIX(img[i].version),
@@ -4643,8 +4771,9 @@ _exit6:
4643_exit5: 4771_exit5:
4644 vxge_device_unregister(hldev); 4772 vxge_device_unregister(hldev);
4645_exit4: 4773_exit4:
4646 pci_disable_sriov(pdev); 4774 pci_set_drvdata(pdev, NULL);
4647 vxge_hw_device_terminate(hldev); 4775 vxge_hw_device_terminate(hldev);
4776 pci_disable_sriov(pdev);
4648_exit3: 4777_exit3:
4649 iounmap(attr.bar0); 4778 iounmap(attr.bar0);
4650_exit2: 4779_exit2:
@@ -4655,7 +4784,7 @@ _exit0:
4655 kfree(ll_config); 4784 kfree(ll_config);
4656 kfree(device_config); 4785 kfree(device_config);
4657 driver_config->config_dev_cnt--; 4786 driver_config->config_dev_cnt--;
4658 pci_set_drvdata(pdev, NULL); 4787 driver_config->total_dev_cnt--;
4659 return ret; 4788 return ret;
4660} 4789}
4661 4790
@@ -4668,45 +4797,34 @@ _exit0:
4668static void __devexit vxge_remove(struct pci_dev *pdev) 4797static void __devexit vxge_remove(struct pci_dev *pdev)
4669{ 4798{
4670 struct __vxge_hw_device *hldev; 4799 struct __vxge_hw_device *hldev;
4671 struct vxgedev *vdev = NULL; 4800 struct vxgedev *vdev;
4672 struct net_device *dev; 4801 int i;
4673 int i = 0;
4674 4802
4675 hldev = pci_get_drvdata(pdev); 4803 hldev = pci_get_drvdata(pdev);
4676
4677 if (hldev == NULL) 4804 if (hldev == NULL)
4678 return; 4805 return;
4679 4806
4680 dev = hldev->ndev; 4807 vdev = netdev_priv(hldev->ndev);
4681 vdev = netdev_priv(dev);
4682 4808
4683 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__); 4809 vxge_debug_entryexit(vdev->level_trace, "%s:%d", __func__, __LINE__);
4684
4685 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...", 4810 vxge_debug_init(vdev->level_trace, "%s : removing PCI device...",
4686 __func__); 4811 __func__);
4687 vxge_device_unregister(hldev);
4688 4812
4689 for (i = 0; i < vdev->no_of_vpath; i++) { 4813 for (i = 0; i < vdev->no_of_vpath; i++)
4690 vxge_free_mac_add_list(&vdev->vpaths[i]); 4814 vxge_free_mac_add_list(&vdev->vpaths[i]);
4691 vdev->vpaths[i].mcast_addr_cnt = 0;
4692 vdev->vpaths[i].mac_addr_cnt = 0;
4693 }
4694
4695 kfree(vdev->vpaths);
4696 4815
4816 vxge_device_unregister(hldev);
4817 pci_set_drvdata(pdev, NULL);
4818 /* Do not call pci_disable_sriov here, as it will break child devices */
4819 vxge_hw_device_terminate(hldev);
4697 iounmap(vdev->bar0); 4820 iounmap(vdev->bar0);
4698 4821 pci_release_region(pdev, 0);
4699 /* we are safe to free it now */ 4822 pci_disable_device(pdev);
4700 free_netdev(dev); 4823 driver_config->config_dev_cnt--;
4824 driver_config->total_dev_cnt--;
4701 4825
4702 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered", 4826 vxge_debug_init(vdev->level_trace, "%s:%d Device unregistered",
4703 __func__, __LINE__); 4827 __func__, __LINE__);
4704
4705 vxge_hw_device_terminate(hldev);
4706
4707 pci_disable_device(pdev);
4708 pci_release_region(pdev, 0);
4709 pci_set_drvdata(pdev, NULL);
4710 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__, 4828 vxge_debug_entryexit(vdev->level_trace, "%s:%d Exiting...", __func__,
4711 __LINE__); 4829 __LINE__);
4712} 4830}
diff --git a/drivers/net/vxge/vxge-main.h b/drivers/net/vxge/vxge-main.h
index 5746fedc356f..40474f0da576 100644
--- a/drivers/net/vxge/vxge-main.h
+++ b/drivers/net/vxge/vxge-main.h
@@ -59,11 +59,13 @@
59#define VXGE_TTI_LTIMER_VAL 1000 59#define VXGE_TTI_LTIMER_VAL 1000
60#define VXGE_T1A_TTI_LTIMER_VAL 80 60#define VXGE_T1A_TTI_LTIMER_VAL 80
61#define VXGE_TTI_RTIMER_VAL 0 61#define VXGE_TTI_RTIMER_VAL 0
62#define VXGE_TTI_RTIMER_ADAPT_VAL 10
62#define VXGE_T1A_TTI_RTIMER_VAL 400 63#define VXGE_T1A_TTI_RTIMER_VAL 400
63#define VXGE_RTI_BTIMER_VAL 250 64#define VXGE_RTI_BTIMER_VAL 250
64#define VXGE_RTI_LTIMER_VAL 100 65#define VXGE_RTI_LTIMER_VAL 100
65#define VXGE_RTI_RTIMER_VAL 0 66#define VXGE_RTI_RTIMER_VAL 0
66#define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH 67#define VXGE_RTI_RTIMER_ADAPT_VAL 15
68#define VXGE_FIFO_INDICATE_MAX_PKTS VXGE_DEF_FIFO_LENGTH
67#define VXGE_ISR_POLLING_CNT 8 69#define VXGE_ISR_POLLING_CNT 8
68#define VXGE_MAX_CONFIG_DEV 0xFF 70#define VXGE_MAX_CONFIG_DEV 0xFF
69#define VXGE_EXEC_MODE_DISABLE 0 71#define VXGE_EXEC_MODE_DISABLE 0
@@ -107,6 +109,14 @@
107#define RTI_T1A_RX_UFC_C 50 109#define RTI_T1A_RX_UFC_C 50
108#define RTI_T1A_RX_UFC_D 60 110#define RTI_T1A_RX_UFC_D 60
109 111
112/*
113 * The interrupt rate is maintained at 3k per second with the moderation
114 * parameters for most traffic but not all. This is the maximum interrupt
115 * count allowed per function with INTA or per vector in the case of
116 * MSI-X in a 10 millisecond time period. Enabled only for Titan 1A.
117 */
118#define VXGE_T1A_MAX_INTERRUPT_COUNT 100
119#define VXGE_T1A_MAX_TX_INTERRUPT_COUNT 200
110 120
111/* Milli secs timer period */ 121/* Milli secs timer period */
112#define VXGE_TIMER_DELAY 10000 122#define VXGE_TIMER_DELAY 10000
@@ -247,6 +257,11 @@ struct vxge_fifo {
247 int tx_steering_type; 257 int tx_steering_type;
248 int indicate_max_pkts; 258 int indicate_max_pkts;
249 259
260 /* Adaptive interrupt moderation parameters used in T1A */
261 unsigned long interrupt_count;
262 unsigned long jiffies;
263
264 u32 tx_vector_no;
250 /* Tx stats */ 265 /* Tx stats */
251 struct vxge_fifo_stats stats; 266 struct vxge_fifo_stats stats;
252} ____cacheline_aligned; 267} ____cacheline_aligned;
@@ -271,6 +286,10 @@ struct vxge_ring {
271 */ 286 */
272 int driver_id; 287 int driver_id;
273 288
289 /* Adaptive interrupt moderation parameters used in T1A */
290 unsigned long interrupt_count;
291 unsigned long jiffies;
292
274 /* copy of the flag indicating whether rx_csum is to be used */ 293 /* copy of the flag indicating whether rx_csum is to be used */
275 u32 rx_csum:1, 294 u32 rx_csum:1,
276 rx_hwts:1; 295 rx_hwts:1;
@@ -286,7 +305,7 @@ struct vxge_ring {
286 305
287 int vlan_tag_strip; 306 int vlan_tag_strip;
288 struct vlan_group *vlgrp; 307 struct vlan_group *vlgrp;
289 int rx_vector_no; 308 u32 rx_vector_no;
290 enum vxge_hw_status last_status; 309 enum vxge_hw_status last_status;
291 310
292 /* Rx stats */ 311 /* Rx stats */
diff --git a/drivers/net/vxge/vxge-traffic.c b/drivers/net/vxge/vxge-traffic.c
index 4c10d6c4075f..8674f331311c 100644
--- a/drivers/net/vxge/vxge-traffic.c
+++ b/drivers/net/vxge/vxge-traffic.c
@@ -218,6 +218,68 @@ exit:
218 return status; 218 return status;
219} 219}
220 220
221void vxge_hw_vpath_tti_ci_set(struct __vxge_hw_fifo *fifo)
222{
223 struct vxge_hw_vpath_reg __iomem *vp_reg;
224 struct vxge_hw_vp_config *config;
225 u64 val64;
226
227 if (fifo->config->enable != VXGE_HW_FIFO_ENABLE)
228 return;
229
230 vp_reg = fifo->vp_reg;
231 config = container_of(fifo->config, struct vxge_hw_vp_config, fifo);
232
233 if (config->tti.timer_ci_en != VXGE_HW_TIM_TIMER_CI_ENABLE) {
234 config->tti.timer_ci_en = VXGE_HW_TIM_TIMER_CI_ENABLE;
235 val64 = readq(&vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);
236 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI;
237 fifo->tim_tti_cfg1_saved = val64;
238 writeq(val64, &vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_TX]);
239 }
240}
241
242void vxge_hw_vpath_dynamic_rti_ci_set(struct __vxge_hw_ring *ring)
243{
244 u64 val64 = ring->tim_rti_cfg1_saved;
245
246 val64 |= VXGE_HW_TIM_CFG1_INT_NUM_TIMER_CI;
247 ring->tim_rti_cfg1_saved = val64;
248 writeq(val64, &ring->vp_reg->tim_cfg1_int_num[VXGE_HW_VPATH_INTR_RX]);
249}
250
251void vxge_hw_vpath_dynamic_tti_rtimer_set(struct __vxge_hw_fifo *fifo)
252{
253 u64 val64 = fifo->tim_tti_cfg3_saved;
254 u64 timer = (fifo->rtimer * 1000) / 272;
255
256 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL(0x3ffffff);
257 if (timer)
258 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL(timer) |
259 VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_EVENT_SF(5);
260
261 writeq(val64, &fifo->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_TX]);
262 /* tti_cfg3_saved is not updated again because it is
263 * initialized at one place only - init time.
264 */
265}
266
267void vxge_hw_vpath_dynamic_rti_rtimer_set(struct __vxge_hw_ring *ring)
268{
269 u64 val64 = ring->tim_rti_cfg3_saved;
270 u64 timer = (ring->rtimer * 1000) / 272;
271
272 val64 &= ~VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL(0x3ffffff);
273 if (timer)
274 val64 |= VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_VAL(timer) |
275 VXGE_HW_TIM_CFG3_INT_NUM_RTIMER_EVENT_SF(4);
276
277 writeq(val64, &ring->vp_reg->tim_cfg3_int_num[VXGE_HW_VPATH_INTR_RX]);
278 /* rti_cfg3_saved is not updated again because it is
279 * initialized at one place only - init time.
280 */
281}
282
221/** 283/**
222 * vxge_hw_channel_msix_mask - Mask MSIX Vector. 284 * vxge_hw_channel_msix_mask - Mask MSIX Vector.
223 * @channeh: Channel for rx or tx handle 285 * @channeh: Channel for rx or tx handle
@@ -254,6 +316,23 @@ vxge_hw_channel_msix_unmask(struct __vxge_hw_channel *channel, int msix_id)
254} 316}
255 317
256/** 318/**
319 * vxge_hw_channel_msix_clear - Unmask the MSIX Vector.
320 * @channel: Channel for rx or tx handle
321 * @msix_id: MSI ID
322 *
323 * The function unmasks the msix interrupt for the given msix_id
324 * if configured in MSIX oneshot mode
325 *
326 * Returns: 0
327 */
328void vxge_hw_channel_msix_clear(struct __vxge_hw_channel *channel, int msix_id)
329{
330 __vxge_hw_pio_mem_write32_upper(
331 (u32) vxge_bVALn(vxge_mBIT(msix_id >> 2), 0, 32),
332 &channel->common_reg->clr_msix_one_shot_vec[msix_id % 4]);
333}
334
335/**
257 * vxge_hw_device_set_intr_type - Updates the configuration 336 * vxge_hw_device_set_intr_type - Updates the configuration
258 * with new interrupt type. 337 * with new interrupt type.
259 * @hldev: HW device handle. 338 * @hldev: HW device handle.
@@ -2191,19 +2270,14 @@ vxge_hw_vpath_msix_set(struct __vxge_hw_vpath_handle *vp, int *tim_msix_id,
2191 if (vpath->hldev->config.intr_mode == 2270 if (vpath->hldev->config.intr_mode ==
2192 VXGE_HW_INTR_MODE_MSIX_ONE_SHOT) { 2271 VXGE_HW_INTR_MODE_MSIX_ONE_SHOT) {
2193 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn( 2272 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(
2273 VXGE_HW_ONE_SHOT_VECT0_EN_ONE_SHOT_VECT0_EN,
2274 0, 32), &vp_reg->one_shot_vect0_en);
2275 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(
2194 VXGE_HW_ONE_SHOT_VECT1_EN_ONE_SHOT_VECT1_EN, 2276 VXGE_HW_ONE_SHOT_VECT1_EN_ONE_SHOT_VECT1_EN,
2195 0, 32), &vp_reg->one_shot_vect1_en); 2277 0, 32), &vp_reg->one_shot_vect1_en);
2196 }
2197
2198 if (vpath->hldev->config.intr_mode ==
2199 VXGE_HW_INTR_MODE_MSIX_ONE_SHOT) {
2200 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn( 2278 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(
2201 VXGE_HW_ONE_SHOT_VECT2_EN_ONE_SHOT_VECT2_EN, 2279 VXGE_HW_ONE_SHOT_VECT2_EN_ONE_SHOT_VECT2_EN,
2202 0, 32), &vp_reg->one_shot_vect2_en); 2280 0, 32), &vp_reg->one_shot_vect2_en);
2203
2204 __vxge_hw_pio_mem_write32_upper((u32)vxge_bVALn(
2205 VXGE_HW_ONE_SHOT_VECT3_EN_ONE_SHOT_VECT3_EN,
2206 0, 32), &vp_reg->one_shot_vect3_en);
2207 } 2281 }
2208} 2282}
2209 2283
@@ -2229,6 +2303,32 @@ vxge_hw_vpath_msix_mask(struct __vxge_hw_vpath_handle *vp, int msix_id)
2229} 2303}
2230 2304
2231/** 2305/**
2306 * vxge_hw_vpath_msix_clear - Clear MSIX Vector.
2307 * @vp: Virtual Path handle.
2308 * @msix_id: MSI ID
2309 *
2310 * The function clears the msix interrupt for the given msix_id
2311 *
2312 * Returns: 0,
2313 * Otherwise, VXGE_HW_ERR_WRONG_IRQ if the msix index is out of range
2314 * status.
2315 * See also:
2316 */
2317void vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vp, int msix_id)
2318{
2319 struct __vxge_hw_device *hldev = vp->vpath->hldev;
2320
2321 if ((hldev->config.intr_mode == VXGE_HW_INTR_MODE_MSIX_ONE_SHOT))
2322 __vxge_hw_pio_mem_write32_upper(
2323 (u32) vxge_bVALn(vxge_mBIT((msix_id >> 2)), 0, 32),
2324 &hldev->common_reg->clr_msix_one_shot_vec[msix_id % 4]);
2325 else
2326 __vxge_hw_pio_mem_write32_upper(
2327 (u32) vxge_bVALn(vxge_mBIT((msix_id >> 2)), 0, 32),
2328 &hldev->common_reg->clear_msix_mask_vect[msix_id % 4]);
2329}
2330
2331/**
2232 * vxge_hw_vpath_msix_unmask - Unmask the MSIX Vector. 2332 * vxge_hw_vpath_msix_unmask - Unmask the MSIX Vector.
2233 * @vp: Virtual Path handle. 2333 * @vp: Virtual Path handle.
2234 * @msix_id: MSI ID 2334 * @msix_id: MSI ID
diff --git a/drivers/net/vxge/vxge-traffic.h b/drivers/net/vxge/vxge-traffic.h
index d48486d6afa1..9d9dfda4c7ab 100644
--- a/drivers/net/vxge/vxge-traffic.h
+++ b/drivers/net/vxge/vxge-traffic.h
@@ -2142,6 +2142,10 @@ void vxge_hw_device_clear_tx_rx(
2142 * Virtual Paths 2142 * Virtual Paths
2143 */ 2143 */
2144 2144
2145void vxge_hw_vpath_dynamic_rti_rtimer_set(struct __vxge_hw_ring *ring);
2146
2147void vxge_hw_vpath_dynamic_tti_rtimer_set(struct __vxge_hw_fifo *fifo);
2148
2145u32 vxge_hw_vpath_id( 2149u32 vxge_hw_vpath_id(
2146 struct __vxge_hw_vpath_handle *vpath_handle); 2150 struct __vxge_hw_vpath_handle *vpath_handle);
2147 2151
@@ -2245,6 +2249,8 @@ void
2245vxge_hw_vpath_msix_mask(struct __vxge_hw_vpath_handle *vpath_handle, 2249vxge_hw_vpath_msix_mask(struct __vxge_hw_vpath_handle *vpath_handle,
2246 int msix_id); 2250 int msix_id);
2247 2251
2252void vxge_hw_vpath_msix_clear(struct __vxge_hw_vpath_handle *vp, int msix_id);
2253
2248void vxge_hw_device_flush_io(struct __vxge_hw_device *devh); 2254void vxge_hw_device_flush_io(struct __vxge_hw_device *devh);
2249 2255
2250void 2256void
@@ -2270,6 +2276,9 @@ void
2270vxge_hw_channel_msix_unmask(struct __vxge_hw_channel *channelh, int msix_id); 2276vxge_hw_channel_msix_unmask(struct __vxge_hw_channel *channelh, int msix_id);
2271 2277
2272void 2278void
2279vxge_hw_channel_msix_clear(struct __vxge_hw_channel *channelh, int msix_id);
2280
2281void
2273vxge_hw_channel_dtr_try_complete(struct __vxge_hw_channel *channel, 2282vxge_hw_channel_dtr_try_complete(struct __vxge_hw_channel *channel,
2274 void **dtrh); 2283 void **dtrh);
2275 2284
@@ -2282,7 +2291,8 @@ vxge_hw_channel_dtr_free(struct __vxge_hw_channel *channel, void *dtrh);
2282int 2291int
2283vxge_hw_channel_dtr_count(struct __vxge_hw_channel *channel); 2292vxge_hw_channel_dtr_count(struct __vxge_hw_channel *channel);
2284 2293
2285void 2294void vxge_hw_vpath_tti_ci_set(struct __vxge_hw_fifo *fifo);
2286vxge_hw_vpath_tti_ci_set(struct __vxge_hw_device *hldev, u32 vp_id); 2295
2296void vxge_hw_vpath_dynamic_rti_ci_set(struct __vxge_hw_ring *ring);
2287 2297
2288#endif 2298#endif
diff --git a/drivers/net/vxge/vxge-version.h b/drivers/net/vxge/vxge-version.h
index ad2f99b9bcf3..581e21525e85 100644
--- a/drivers/net/vxge/vxge-version.h
+++ b/drivers/net/vxge/vxge-version.h
@@ -16,8 +16,8 @@
16 16
17#define VXGE_VERSION_MAJOR "2" 17#define VXGE_VERSION_MAJOR "2"
18#define VXGE_VERSION_MINOR "5" 18#define VXGE_VERSION_MINOR "5"
19#define VXGE_VERSION_FIX "1" 19#define VXGE_VERSION_FIX "2"
20#define VXGE_VERSION_BUILD "22082" 20#define VXGE_VERSION_BUILD "22259"
21#define VXGE_VERSION_FOR "k" 21#define VXGE_VERSION_FOR "k"
22 22
23#define VXGE_FW_VER(maj, min, bld) (((maj) << 16) + ((min) << 8) + (bld)) 23#define VXGE_FW_VER(maj, min, bld) (((maj) << 16) + ((min) << 8) + (bld))
diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c
index 546de5749824..da1f12120346 100644
--- a/drivers/net/xen-netfront.c
+++ b/drivers/net/xen-netfront.c
@@ -120,6 +120,9 @@ struct netfront_info {
120 unsigned long rx_pfn_array[NET_RX_RING_SIZE]; 120 unsigned long rx_pfn_array[NET_RX_RING_SIZE];
121 struct multicall_entry rx_mcl[NET_RX_RING_SIZE+1]; 121 struct multicall_entry rx_mcl[NET_RX_RING_SIZE+1];
122 struct mmu_update rx_mmu[NET_RX_RING_SIZE]; 122 struct mmu_update rx_mmu[NET_RX_RING_SIZE];
123
124 /* Statistics */
125 int rx_gso_checksum_fixup;
123}; 126};
124 127
125struct netfront_rx_info { 128struct netfront_rx_info {
@@ -770,11 +773,29 @@ static RING_IDX xennet_fill_frags(struct netfront_info *np,
770 return cons; 773 return cons;
771} 774}
772 775
773static int skb_checksum_setup(struct sk_buff *skb) 776static int checksum_setup(struct net_device *dev, struct sk_buff *skb)
774{ 777{
775 struct iphdr *iph; 778 struct iphdr *iph;
776 unsigned char *th; 779 unsigned char *th;
777 int err = -EPROTO; 780 int err = -EPROTO;
781 int recalculate_partial_csum = 0;
782
783 /*
784 * A GSO SKB must be CHECKSUM_PARTIAL. However some buggy
785 * peers can fail to set NETRXF_csum_blank when sending a GSO
786 * frame. In this case force the SKB to CHECKSUM_PARTIAL and
787 * recalculate the partial checksum.
788 */
789 if (skb->ip_summed != CHECKSUM_PARTIAL && skb_is_gso(skb)) {
790 struct netfront_info *np = netdev_priv(dev);
791 np->rx_gso_checksum_fixup++;
792 skb->ip_summed = CHECKSUM_PARTIAL;
793 recalculate_partial_csum = 1;
794 }
795
796 /* A non-CHECKSUM_PARTIAL SKB does not require setup. */
797 if (skb->ip_summed != CHECKSUM_PARTIAL)
798 return 0;
778 799
779 if (skb->protocol != htons(ETH_P_IP)) 800 if (skb->protocol != htons(ETH_P_IP))
780 goto out; 801 goto out;
@@ -788,9 +809,23 @@ static int skb_checksum_setup(struct sk_buff *skb)
788 switch (iph->protocol) { 809 switch (iph->protocol) {
789 case IPPROTO_TCP: 810 case IPPROTO_TCP:
790 skb->csum_offset = offsetof(struct tcphdr, check); 811 skb->csum_offset = offsetof(struct tcphdr, check);
812
813 if (recalculate_partial_csum) {
814 struct tcphdr *tcph = (struct tcphdr *)th;
815 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
816 skb->len - iph->ihl*4,
817 IPPROTO_TCP, 0);
818 }
791 break; 819 break;
792 case IPPROTO_UDP: 820 case IPPROTO_UDP:
793 skb->csum_offset = offsetof(struct udphdr, check); 821 skb->csum_offset = offsetof(struct udphdr, check);
822
823 if (recalculate_partial_csum) {
824 struct udphdr *udph = (struct udphdr *)th;
825 udph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
826 skb->len - iph->ihl*4,
827 IPPROTO_UDP, 0);
828 }
794 break; 829 break;
795 default: 830 default:
796 if (net_ratelimit()) 831 if (net_ratelimit())
@@ -829,13 +864,11 @@ static int handle_incoming_queue(struct net_device *dev,
829 /* Ethernet work: Delayed to here as it peeks the header. */ 864 /* Ethernet work: Delayed to here as it peeks the header. */
830 skb->protocol = eth_type_trans(skb, dev); 865 skb->protocol = eth_type_trans(skb, dev);
831 866
832 if (skb->ip_summed == CHECKSUM_PARTIAL) { 867 if (checksum_setup(dev, skb)) {
833 if (skb_checksum_setup(skb)) { 868 kfree_skb(skb);
834 kfree_skb(skb); 869 packets_dropped++;
835 packets_dropped++; 870 dev->stats.rx_errors++;
836 dev->stats.rx_errors++; 871 continue;
837 continue;
838 }
839 } 872 }
840 873
841 dev->stats.rx_packets++; 874 dev->stats.rx_packets++;
@@ -1632,12 +1665,59 @@ static void netback_changed(struct xenbus_device *dev,
1632 } 1665 }
1633} 1666}
1634 1667
1668static const struct xennet_stat {
1669 char name[ETH_GSTRING_LEN];
1670 u16 offset;
1671} xennet_stats[] = {
1672 {
1673 "rx_gso_checksum_fixup",
1674 offsetof(struct netfront_info, rx_gso_checksum_fixup)
1675 },
1676};
1677
1678static int xennet_get_sset_count(struct net_device *dev, int string_set)
1679{
1680 switch (string_set) {
1681 case ETH_SS_STATS:
1682 return ARRAY_SIZE(xennet_stats);
1683 default:
1684 return -EINVAL;
1685 }
1686}
1687
1688static void xennet_get_ethtool_stats(struct net_device *dev,
1689 struct ethtool_stats *stats, u64 * data)
1690{
1691 void *np = netdev_priv(dev);
1692 int i;
1693
1694 for (i = 0; i < ARRAY_SIZE(xennet_stats); i++)
1695 data[i] = *(int *)(np + xennet_stats[i].offset);
1696}
1697
1698static void xennet_get_strings(struct net_device *dev, u32 stringset, u8 * data)
1699{
1700 int i;
1701
1702 switch (stringset) {
1703 case ETH_SS_STATS:
1704 for (i = 0; i < ARRAY_SIZE(xennet_stats); i++)
1705 memcpy(data + i * ETH_GSTRING_LEN,
1706 xennet_stats[i].name, ETH_GSTRING_LEN);
1707 break;
1708 }
1709}
1710
1635static const struct ethtool_ops xennet_ethtool_ops = 1711static const struct ethtool_ops xennet_ethtool_ops =
1636{ 1712{
1637 .set_tx_csum = ethtool_op_set_tx_csum, 1713 .set_tx_csum = ethtool_op_set_tx_csum,
1638 .set_sg = xennet_set_sg, 1714 .set_sg = xennet_set_sg,
1639 .set_tso = xennet_set_tso, 1715 .set_tso = xennet_set_tso,
1640 .get_link = ethtool_op_get_link, 1716 .get_link = ethtool_op_get_link,
1717
1718 .get_sset_count = xennet_get_sset_count,
1719 .get_ethtool_stats = xennet_get_ethtool_stats,
1720 .get_strings = xennet_get_strings,
1641}; 1721};
1642 1722
1643#ifdef CONFIG_SYSFS 1723#ifdef CONFIG_SYSFS
diff --git a/drivers/pci/pcie/Kconfig b/drivers/pci/pcie/Kconfig
index dda70981b7a6..dc29348264c6 100644
--- a/drivers/pci/pcie/Kconfig
+++ b/drivers/pci/pcie/Kconfig
@@ -31,7 +31,7 @@ source "drivers/pci/pcie/aer/Kconfig"
31# PCI Express ASPM 31# PCI Express ASPM
32# 32#
33config PCIEASPM 33config PCIEASPM
34 bool "PCI Express ASPM control" if EMBEDDED 34 bool "PCI Express ASPM control" if EXPERT
35 depends on PCI && PCIEPORTBUS 35 depends on PCI && PCIEPORTBUS
36 default y 36 default y
37 help 37 help
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index de886f3dfd39..6e318ce41136 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -69,7 +69,7 @@ comment "PC-card bridges"
69config YENTA 69config YENTA
70 tristate "CardBus yenta-compatible bridge support" 70 tristate "CardBus yenta-compatible bridge support"
71 depends on PCI 71 depends on PCI
72 select CARDBUS if !EMBEDDED 72 select CARDBUS if !EXPERT
73 select PCCARD_NONSTATIC if PCMCIA != n 73 select PCCARD_NONSTATIC if PCMCIA != n
74 ---help--- 74 ---help---
75 This option enables support for CardBus host bridges. Virtually 75 This option enables support for CardBus host bridges. Virtually
@@ -84,27 +84,27 @@ config YENTA
84 84
85config YENTA_O2 85config YENTA_O2
86 default y 86 default y
87 bool "Special initialization for O2Micro bridges" if EMBEDDED 87 bool "Special initialization for O2Micro bridges" if EXPERT
88 depends on YENTA 88 depends on YENTA
89 89
90config YENTA_RICOH 90config YENTA_RICOH
91 default y 91 default y
92 bool "Special initialization for Ricoh bridges" if EMBEDDED 92 bool "Special initialization for Ricoh bridges" if EXPERT
93 depends on YENTA 93 depends on YENTA
94 94
95config YENTA_TI 95config YENTA_TI
96 default y 96 default y
97 bool "Special initialization for TI and EnE bridges" if EMBEDDED 97 bool "Special initialization for TI and EnE bridges" if EXPERT
98 depends on YENTA 98 depends on YENTA
99 99
100config YENTA_ENE_TUNE 100config YENTA_ENE_TUNE
101 default y 101 default y
102 bool "Auto-tune EnE bridges for CB cards" if EMBEDDED 102 bool "Auto-tune EnE bridges for CB cards" if EXPERT
103 depends on YENTA_TI && CARDBUS 103 depends on YENTA_TI && CARDBUS
104 104
105config YENTA_TOSHIBA 105config YENTA_TOSHIBA
106 default y 106 default y
107 bool "Special initialization for Toshiba ToPIC bridges" if EMBEDDED 107 bool "Special initialization for Toshiba ToPIC bridges" if EXPERT
108 depends on YENTA 108 depends on YENTA
109 109
110config PD6729 110config PD6729
diff --git a/drivers/rapidio/rio-scan.c b/drivers/rapidio/rio-scan.c
index 467e82bd0929..a50391b6ba2a 100644
--- a/drivers/rapidio/rio-scan.c
+++ b/drivers/rapidio/rio-scan.c
@@ -943,6 +943,8 @@ static int rio_enum_complete(struct rio_mport *port)
943 * @port: Master port to send transactions 943 * @port: Master port to send transactions
944 * @destid: Current destination ID in network 944 * @destid: Current destination ID in network
945 * @hopcount: Number of hops into the network 945 * @hopcount: Number of hops into the network
946 * @prev: previous rio_dev
947 * @prev_port: previous port number
946 * 948 *
947 * Recursively discovers a RIO network. Transactions are sent via the 949 * Recursively discovers a RIO network. Transactions are sent via the
948 * master port passed in @port. 950 * master port passed in @port.
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 4941cade319f..cdd97192dc69 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -97,18 +97,6 @@ config RTC_INTF_DEV
97 97
98 If unsure, say Y. 98 If unsure, say Y.
99 99
100config RTC_INTF_DEV_UIE_EMUL
101 bool "RTC UIE emulation on dev interface"
102 depends on RTC_INTF_DEV
103 help
104 Provides an emulation for RTC_UIE if the underlying rtc chip
105 driver does not expose RTC_UIE ioctls. Those requests generate
106 once-per-second update interrupts, used for synchronization.
107
108 The emulation code will read the time from the hardware
109 clock several times per second, please enable this option
110 only if you know that you really need it.
111
112config RTC_DRV_TEST 100config RTC_DRV_TEST
113 tristate "Test driver/device" 101 tristate "Test driver/device"
114 help 102 help
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index 90384b9f6b2c..925006d33109 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -16,6 +16,9 @@
16#include <linux/log2.h> 16#include <linux/log2.h>
17#include <linux/workqueue.h> 17#include <linux/workqueue.h>
18 18
19static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer);
20static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer);
21
19static int __rtc_read_time(struct rtc_device *rtc, struct rtc_time *tm) 22static int __rtc_read_time(struct rtc_device *rtc, struct rtc_time *tm)
20{ 23{
21 int err; 24 int err;
@@ -120,12 +123,18 @@ int rtc_read_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
120 err = mutex_lock_interruptible(&rtc->ops_lock); 123 err = mutex_lock_interruptible(&rtc->ops_lock);
121 if (err) 124 if (err)
122 return err; 125 return err;
123 alarm->enabled = rtc->aie_timer.enabled; 126 if (rtc->ops == NULL)
124 if (alarm->enabled) 127 err = -ENODEV;
128 else if (!rtc->ops->read_alarm)
129 err = -EINVAL;
130 else {
131 memset(alarm, 0, sizeof(struct rtc_wkalrm));
132 alarm->enabled = rtc->aie_timer.enabled;
125 alarm->time = rtc_ktime_to_tm(rtc->aie_timer.node.expires); 133 alarm->time = rtc_ktime_to_tm(rtc->aie_timer.node.expires);
134 }
126 mutex_unlock(&rtc->ops_lock); 135 mutex_unlock(&rtc->ops_lock);
127 136
128 return 0; 137 return err;
129} 138}
130EXPORT_SYMBOL_GPL(rtc_read_alarm); 139EXPORT_SYMBOL_GPL(rtc_read_alarm);
131 140
@@ -175,16 +184,14 @@ int rtc_set_alarm(struct rtc_device *rtc, struct rtc_wkalrm *alarm)
175 return err; 184 return err;
176 if (rtc->aie_timer.enabled) { 185 if (rtc->aie_timer.enabled) {
177 rtc_timer_remove(rtc, &rtc->aie_timer); 186 rtc_timer_remove(rtc, &rtc->aie_timer);
178 rtc->aie_timer.enabled = 0;
179 } 187 }
180 rtc->aie_timer.node.expires = rtc_tm_to_ktime(alarm->time); 188 rtc->aie_timer.node.expires = rtc_tm_to_ktime(alarm->time);
181 rtc->aie_timer.period = ktime_set(0, 0); 189 rtc->aie_timer.period = ktime_set(0, 0);
182 if (alarm->enabled) { 190 if (alarm->enabled) {
183 rtc->aie_timer.enabled = 1; 191 err = rtc_timer_enqueue(rtc, &rtc->aie_timer);
184 rtc_timer_enqueue(rtc, &rtc->aie_timer);
185 } 192 }
186 mutex_unlock(&rtc->ops_lock); 193 mutex_unlock(&rtc->ops_lock);
187 return 0; 194 return err;
188} 195}
189EXPORT_SYMBOL_GPL(rtc_set_alarm); 196EXPORT_SYMBOL_GPL(rtc_set_alarm);
190 197
@@ -195,15 +202,15 @@ int rtc_alarm_irq_enable(struct rtc_device *rtc, unsigned int enabled)
195 return err; 202 return err;
196 203
197 if (rtc->aie_timer.enabled != enabled) { 204 if (rtc->aie_timer.enabled != enabled) {
198 if (enabled) { 205 if (enabled)
199 rtc->aie_timer.enabled = 1; 206 err = rtc_timer_enqueue(rtc, &rtc->aie_timer);
200 rtc_timer_enqueue(rtc, &rtc->aie_timer); 207 else
201 } else {
202 rtc_timer_remove(rtc, &rtc->aie_timer); 208 rtc_timer_remove(rtc, &rtc->aie_timer);
203 rtc->aie_timer.enabled = 0;
204 }
205 } 209 }
206 210
211 if (err)
212 return err;
213
207 if (!rtc->ops) 214 if (!rtc->ops)
208 err = -ENODEV; 215 err = -ENODEV;
209 else if (!rtc->ops->alarm_irq_enable) 216 else if (!rtc->ops->alarm_irq_enable)
@@ -235,12 +242,9 @@ int rtc_update_irq_enable(struct rtc_device *rtc, unsigned int enabled)
235 now = rtc_tm_to_ktime(tm); 242 now = rtc_tm_to_ktime(tm);
236 rtc->uie_rtctimer.node.expires = ktime_add(now, onesec); 243 rtc->uie_rtctimer.node.expires = ktime_add(now, onesec);
237 rtc->uie_rtctimer.period = ktime_set(1, 0); 244 rtc->uie_rtctimer.period = ktime_set(1, 0);
238 rtc->uie_rtctimer.enabled = 1; 245 err = rtc_timer_enqueue(rtc, &rtc->uie_rtctimer);
239 rtc_timer_enqueue(rtc, &rtc->uie_rtctimer); 246 } else
240 } else {
241 rtc_timer_remove(rtc, &rtc->uie_rtctimer); 247 rtc_timer_remove(rtc, &rtc->uie_rtctimer);
242 rtc->uie_rtctimer.enabled = 0;
243 }
244 248
245out: 249out:
246 mutex_unlock(&rtc->ops_lock); 250 mutex_unlock(&rtc->ops_lock);
@@ -488,10 +492,13 @@ EXPORT_SYMBOL_GPL(rtc_irq_set_freq);
488 * Enqueues a timer onto the rtc devices timerqueue and sets 492 * Enqueues a timer onto the rtc devices timerqueue and sets
489 * the next alarm event appropriately. 493 * the next alarm event appropriately.
490 * 494 *
495 * Sets the enabled bit on the added timer.
496 *
491 * Must hold ops_lock for proper serialization of timerqueue 497 * Must hold ops_lock for proper serialization of timerqueue
492 */ 498 */
493void rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer) 499static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer)
494{ 500{
501 timer->enabled = 1;
495 timerqueue_add(&rtc->timerqueue, &timer->node); 502 timerqueue_add(&rtc->timerqueue, &timer->node);
496 if (&timer->node == timerqueue_getnext(&rtc->timerqueue)) { 503 if (&timer->node == timerqueue_getnext(&rtc->timerqueue)) {
497 struct rtc_wkalrm alarm; 504 struct rtc_wkalrm alarm;
@@ -501,7 +508,13 @@ void rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer)
501 err = __rtc_set_alarm(rtc, &alarm); 508 err = __rtc_set_alarm(rtc, &alarm);
502 if (err == -ETIME) 509 if (err == -ETIME)
503 schedule_work(&rtc->irqwork); 510 schedule_work(&rtc->irqwork);
511 else if (err) {
512 timerqueue_del(&rtc->timerqueue, &timer->node);
513 timer->enabled = 0;
514 return err;
515 }
504 } 516 }
517 return 0;
505} 518}
506 519
507/** 520/**
@@ -512,13 +525,15 @@ void rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer)
512 * Removes a timer onto the rtc devices timerqueue and sets 525 * Removes a timer onto the rtc devices timerqueue and sets
513 * the next alarm event appropriately. 526 * the next alarm event appropriately.
514 * 527 *
528 * Clears the enabled bit on the removed timer.
529 *
515 * Must hold ops_lock for proper serialization of timerqueue 530 * Must hold ops_lock for proper serialization of timerqueue
516 */ 531 */
517void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer) 532static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer)
518{ 533{
519 struct timerqueue_node *next = timerqueue_getnext(&rtc->timerqueue); 534 struct timerqueue_node *next = timerqueue_getnext(&rtc->timerqueue);
520 timerqueue_del(&rtc->timerqueue, &timer->node); 535 timerqueue_del(&rtc->timerqueue, &timer->node);
521 536 timer->enabled = 0;
522 if (next == &timer->node) { 537 if (next == &timer->node) {
523 struct rtc_wkalrm alarm; 538 struct rtc_wkalrm alarm;
524 int err; 539 int err;
@@ -626,8 +641,7 @@ int rtc_timer_start(struct rtc_device *rtc, struct rtc_timer* timer,
626 timer->node.expires = expires; 641 timer->node.expires = expires;
627 timer->period = period; 642 timer->period = period;
628 643
629 timer->enabled = 1; 644 ret = rtc_timer_enqueue(rtc, timer);
630 rtc_timer_enqueue(rtc, timer);
631 645
632 mutex_unlock(&rtc->ops_lock); 646 mutex_unlock(&rtc->ops_lock);
633 return ret; 647 return ret;
@@ -645,7 +659,6 @@ int rtc_timer_cancel(struct rtc_device *rtc, struct rtc_timer* timer)
645 mutex_lock(&rtc->ops_lock); 659 mutex_lock(&rtc->ops_lock);
646 if (timer->enabled) 660 if (timer->enabled)
647 rtc_timer_remove(rtc, timer); 661 rtc_timer_remove(rtc, timer);
648 timer->enabled = 0;
649 mutex_unlock(&rtc->ops_lock); 662 mutex_unlock(&rtc->ops_lock);
650 return ret; 663 return ret;
651} 664}
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c
index 7a7a1b664781..2ac8f6aff5a4 100644
--- a/drivers/s390/net/qeth_l2_main.c
+++ b/drivers/s390/net/qeth_l2_main.c
@@ -831,12 +831,14 @@ tx_drop:
831 return NETDEV_TX_OK; 831 return NETDEV_TX_OK;
832} 832}
833 833
834static int qeth_l2_open(struct net_device *dev) 834static int __qeth_l2_open(struct net_device *dev)
835{ 835{
836 struct qeth_card *card = dev->ml_priv; 836 struct qeth_card *card = dev->ml_priv;
837 int rc = 0; 837 int rc = 0;
838 838
839 QETH_CARD_TEXT(card, 4, "qethopen"); 839 QETH_CARD_TEXT(card, 4, "qethopen");
840 if (card->state == CARD_STATE_UP)
841 return rc;
840 if (card->state != CARD_STATE_SOFTSETUP) 842 if (card->state != CARD_STATE_SOFTSETUP)
841 return -ENODEV; 843 return -ENODEV;
842 844
@@ -857,6 +859,18 @@ static int qeth_l2_open(struct net_device *dev)
857 return rc; 859 return rc;
858} 860}
859 861
862static int qeth_l2_open(struct net_device *dev)
863{
864 struct qeth_card *card = dev->ml_priv;
865
866 QETH_CARD_TEXT(card, 5, "qethope_");
867 if (qeth_wait_for_threads(card, QETH_RECOVER_THREAD)) {
868 QETH_CARD_TEXT(card, 3, "openREC");
869 return -ERESTARTSYS;
870 }
871 return __qeth_l2_open(dev);
872}
873
860static int qeth_l2_stop(struct net_device *dev) 874static int qeth_l2_stop(struct net_device *dev)
861{ 875{
862 struct qeth_card *card = dev->ml_priv; 876 struct qeth_card *card = dev->ml_priv;
@@ -1046,7 +1060,7 @@ contin:
1046 if (recover_flag == CARD_STATE_RECOVER) { 1060 if (recover_flag == CARD_STATE_RECOVER) {
1047 if (recovery_mode && 1061 if (recovery_mode &&
1048 card->info.type != QETH_CARD_TYPE_OSN) { 1062 card->info.type != QETH_CARD_TYPE_OSN) {
1049 qeth_l2_open(card->dev); 1063 __qeth_l2_open(card->dev);
1050 } else { 1064 } else {
1051 rtnl_lock(); 1065 rtnl_lock();
1052 dev_open(card->dev); 1066 dev_open(card->dev);
diff --git a/drivers/s390/net/qeth_l3_main.c b/drivers/s390/net/qeth_l3_main.c
index e227e465bfc4..d09b0c44fc3d 100644
--- a/drivers/s390/net/qeth_l3_main.c
+++ b/drivers/s390/net/qeth_l3_main.c
@@ -2998,7 +2998,9 @@ static inline void qeth_l3_hdr_csum(struct qeth_card *card,
2998 */ 2998 */
2999 if (iph->protocol == IPPROTO_UDP) 2999 if (iph->protocol == IPPROTO_UDP)
3000 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_UDP; 3000 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_UDP;
3001 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ; 3001 hdr->hdr.l3.ext_flags |= QETH_HDR_EXT_CSUM_TRANSP_REQ |
3002 QETH_HDR_EXT_CSUM_HDR_REQ;
3003 iph->check = 0;
3002 if (card->options.performance_stats) 3004 if (card->options.performance_stats)
3003 card->perf_stats.tx_csum++; 3005 card->perf_stats.tx_csum++;
3004} 3006}
@@ -3240,12 +3242,14 @@ tx_drop:
3240 return NETDEV_TX_OK; 3242 return NETDEV_TX_OK;
3241} 3243}
3242 3244
3243static int qeth_l3_open(struct net_device *dev) 3245static int __qeth_l3_open(struct net_device *dev)
3244{ 3246{
3245 struct qeth_card *card = dev->ml_priv; 3247 struct qeth_card *card = dev->ml_priv;
3246 int rc = 0; 3248 int rc = 0;
3247 3249
3248 QETH_CARD_TEXT(card, 4, "qethopen"); 3250 QETH_CARD_TEXT(card, 4, "qethopen");
3251 if (card->state == CARD_STATE_UP)
3252 return rc;
3249 if (card->state != CARD_STATE_SOFTSETUP) 3253 if (card->state != CARD_STATE_SOFTSETUP)
3250 return -ENODEV; 3254 return -ENODEV;
3251 card->data.state = CH_STATE_UP; 3255 card->data.state = CH_STATE_UP;
@@ -3260,6 +3264,18 @@ static int qeth_l3_open(struct net_device *dev)
3260 return rc; 3264 return rc;
3261} 3265}
3262 3266
3267static int qeth_l3_open(struct net_device *dev)
3268{
3269 struct qeth_card *card = dev->ml_priv;
3270
3271 QETH_CARD_TEXT(card, 5, "qethope_");
3272 if (qeth_wait_for_threads(card, QETH_RECOVER_THREAD)) {
3273 QETH_CARD_TEXT(card, 3, "openREC");
3274 return -ERESTARTSYS;
3275 }
3276 return __qeth_l3_open(dev);
3277}
3278
3263static int qeth_l3_stop(struct net_device *dev) 3279static int qeth_l3_stop(struct net_device *dev)
3264{ 3280{
3265 struct qeth_card *card = dev->ml_priv; 3281 struct qeth_card *card = dev->ml_priv;
@@ -3564,7 +3580,7 @@ contin:
3564 netif_carrier_off(card->dev); 3580 netif_carrier_off(card->dev);
3565 if (recover_flag == CARD_STATE_RECOVER) { 3581 if (recover_flag == CARD_STATE_RECOVER) {
3566 if (recovery_mode) 3582 if (recovery_mode)
3567 qeth_l3_open(card->dev); 3583 __qeth_l3_open(card->dev);
3568 else { 3584 else {
3569 rtnl_lock(); 3585 rtnl_lock();
3570 dev_open(card->dev); 3586 dev_open(card->dev);
diff --git a/drivers/ssb/Kconfig b/drivers/ssb/Kconfig
index 2d8cc455dbc7..42cdaa9a4d8a 100644
--- a/drivers/ssb/Kconfig
+++ b/drivers/ssb/Kconfig
@@ -82,7 +82,7 @@ config SSB_SDIOHOST
82 82
83config SSB_SILENT 83config SSB_SILENT
84 bool "No SSB kernel messages" 84 bool "No SSB kernel messages"
85 depends on SSB && EMBEDDED 85 depends on SSB && EXPERT
86 help 86 help
87 This option turns off all Sonics Silicon Backplane printks. 87 This option turns off all Sonics Silicon Backplane printks.
88 Note that you won't be able to identify problems, once 88 Note that you won't be able to identify problems, once
diff --git a/drivers/staging/lirc/TODO.lirc_zilog b/drivers/staging/lirc/TODO.lirc_zilog
index 6aa312df4018..2d0263f07937 100644
--- a/drivers/staging/lirc/TODO.lirc_zilog
+++ b/drivers/staging/lirc/TODO.lirc_zilog
@@ -1,13 +1,37 @@
1The binding between hdpvr and lirc_zilog is currently disabled, 11. Both ir-kbd-i2c and lirc_zilog provide support for RX events.
2The 'tx_only' lirc_zilog module parameter will allow ir-kbd-i2c
3and lirc_zilog to coexist in the kernel, if the user requires such a set-up.
4However the IR unit will not work well without coordination between the
5two modules. A shared mutex, for transceiver access locking, needs to be
6supplied by bridge drivers, in struct IR_i2_init_data, to both ir-kbd-i2c
7and lirc_zilog, before they will coexist usefully. This should be fixed
8before moving out of staging.
9
102. References and locking need careful examination. For cx18 and ivtv PCI
11cards, which are not easily "hot unplugged", the imperfect state of reference
12counting and locking is acceptable if not correct. For USB connected units
13like HD PVR, PVR USB2, HVR-1900, and HVR1950, the likelyhood of an Ooops on
14unplug is probably great. Proper reference counting and locking needs to be
15implemented before this module is moved out of staging.
16
173. The binding between hdpvr and lirc_zilog is currently disabled,
2due to an OOPS reported a few years ago when both the hdpvr and cx18 18due to an OOPS reported a few years ago when both the hdpvr and cx18
3drivers were loaded in his system. More details can be seen at: 19drivers were loaded in his system. More details can be seen at:
4 http://www.mail-archive.com/linux-media@vger.kernel.org/msg09163.html 20 http://www.mail-archive.com/linux-media@vger.kernel.org/msg09163.html
5More tests need to be done, in order to fix the reported issue. 21More tests need to be done, in order to fix the reported issue.
6 22
7There's a conflict between ir-kbd-i2c: Both provide support for RX events. 234. In addition to providing a shared mutex for transceiver access
8Such conflict needs to be fixed, before moving it out of staging. 24locking, bridge drivers, if able, should provide a chip reset() callback
25to lirc_zilog via struct IR_i2c_init_data. cx18 and ivtv already have routines
26to perform Z8 chip resets via GPIO manipulations. This will allow lirc_zilog
27to bring the chip back to normal when it hangs, in the same places the
28original lirc_pvr150 driver code does. This is not strictly needed, so it
29is not required to move lirc_zilog out of staging.
30
315. Both lirc_zilog and ir-kbd-i2c support the Zilog Z8 for IR, as programmed
32and installed on Hauppauge products. When working on either module, developers
33must consider at least the following bridge drivers which mention an IR Rx unit
34at address 0x71 (indicative of a Z8):
9 35
10The way I2C probe works, it will try to register the driver twice, one 36 ivtv cx18 hdpvr pvrusb2 bt8xx cx88 saa7134
11for RX and another for TX. The logic needs to be fixed to avoid such
12issue.
13 37
diff --git a/drivers/staging/lirc/lirc_imon.c b/drivers/staging/lirc/lirc_imon.c
index 0da6b9518af9..235cab0eb087 100644
--- a/drivers/staging/lirc/lirc_imon.c
+++ b/drivers/staging/lirc/lirc_imon.c
@@ -447,6 +447,7 @@ static ssize_t vfd_write(struct file *file, const char *buf,
447 447
448exit: 448exit:
449 mutex_unlock(&context->ctx_lock); 449 mutex_unlock(&context->ctx_lock);
450 kfree(data_buf);
450 451
451 return (!retval) ? n_bytes : retval; 452 return (!retval) ? n_bytes : retval;
452} 453}
diff --git a/drivers/staging/lirc/lirc_it87.c b/drivers/staging/lirc/lirc_it87.c
index 929ae5795467..5938616f3e8f 100644
--- a/drivers/staging/lirc/lirc_it87.c
+++ b/drivers/staging/lirc/lirc_it87.c
@@ -232,6 +232,7 @@ static ssize_t lirc_write(struct file *file, const char *buf,
232 i++; 232 i++;
233 } 233 }
234 terminate_send(tx_buf[i - 1]); 234 terminate_send(tx_buf[i - 1]);
235 kfree(tx_buf);
235 return n; 236 return n;
236} 237}
237 238
diff --git a/drivers/staging/lirc/lirc_parallel.c b/drivers/staging/lirc/lirc_parallel.c
index dfd2c447e67d..3a9c09881b2b 100644
--- a/drivers/staging/lirc/lirc_parallel.c
+++ b/drivers/staging/lirc/lirc_parallel.c
@@ -376,6 +376,7 @@ static ssize_t lirc_write(struct file *filep, const char *buf, size_t n,
376 unsigned long flags; 376 unsigned long flags;
377 int counttimer; 377 int counttimer;
378 int *wbuf; 378 int *wbuf;
379 ssize_t ret;
379 380
380 if (!is_claimed) 381 if (!is_claimed)
381 return -EBUSY; 382 return -EBUSY;
@@ -393,8 +394,10 @@ static ssize_t lirc_write(struct file *filep, const char *buf, size_t n,
393 if (timer == 0) { 394 if (timer == 0) {
394 /* try again if device is ready */ 395 /* try again if device is ready */
395 timer = init_lirc_timer(); 396 timer = init_lirc_timer();
396 if (timer == 0) 397 if (timer == 0) {
397 return -EIO; 398 ret = -EIO;
399 goto out;
400 }
398 } 401 }
399 402
400 /* adjust values from usecs */ 403 /* adjust values from usecs */
@@ -420,7 +423,8 @@ static ssize_t lirc_write(struct file *filep, const char *buf, size_t n,
420 if (check_pselecd && (in(1) & LP_PSELECD)) { 423 if (check_pselecd && (in(1) & LP_PSELECD)) {
421 lirc_off(); 424 lirc_off();
422 local_irq_restore(flags); 425 local_irq_restore(flags);
423 return -EIO; 426 ret = -EIO;
427 goto out;
424 } 428 }
425 } while (counttimer < wbuf[i]); 429 } while (counttimer < wbuf[i]);
426 i++; 430 i++;
@@ -436,7 +440,8 @@ static ssize_t lirc_write(struct file *filep, const char *buf, size_t n,
436 level = newlevel; 440 level = newlevel;
437 if (check_pselecd && (in(1) & LP_PSELECD)) { 441 if (check_pselecd && (in(1) & LP_PSELECD)) {
438 local_irq_restore(flags); 442 local_irq_restore(flags);
439 return -EIO; 443 ret = -EIO;
444 goto out;
440 } 445 }
441 } while (counttimer < wbuf[i]); 446 } while (counttimer < wbuf[i]);
442 i++; 447 i++;
@@ -445,7 +450,11 @@ static ssize_t lirc_write(struct file *filep, const char *buf, size_t n,
445#else 450#else
446 /* place code that handles write without external timer here */ 451 /* place code that handles write without external timer here */
447#endif 452#endif
448 return n; 453 ret = n;
454out:
455 kfree(wbuf);
456
457 return ret;
449} 458}
450 459
451static unsigned int lirc_poll(struct file *file, poll_table *wait) 460static unsigned int lirc_poll(struct file *file, poll_table *wait)
diff --git a/drivers/staging/lirc/lirc_sasem.c b/drivers/staging/lirc/lirc_sasem.c
index 998485ebdbce..925eabe14854 100644
--- a/drivers/staging/lirc/lirc_sasem.c
+++ b/drivers/staging/lirc/lirc_sasem.c
@@ -448,6 +448,7 @@ static ssize_t vfd_write(struct file *file, const char *buf,
448exit: 448exit:
449 449
450 mutex_unlock(&context->ctx_lock); 450 mutex_unlock(&context->ctx_lock);
451 kfree(data_buf);
451 452
452 return (!retval) ? n_bytes : retval; 453 return (!retval) ? n_bytes : retval;
453} 454}
diff --git a/drivers/staging/lirc/lirc_serial.c b/drivers/staging/lirc/lirc_serial.c
index 9bcf149c4260..1c3099b388e0 100644
--- a/drivers/staging/lirc/lirc_serial.c
+++ b/drivers/staging/lirc/lirc_serial.c
@@ -966,7 +966,7 @@ static ssize_t lirc_write(struct file *file, const char *buf,
966 if (n % sizeof(int) || count % 2 == 0) 966 if (n % sizeof(int) || count % 2 == 0)
967 return -EINVAL; 967 return -EINVAL;
968 wbuf = memdup_user(buf, n); 968 wbuf = memdup_user(buf, n);
969 if (PTR_ERR(wbuf)) 969 if (IS_ERR(wbuf))
970 return PTR_ERR(wbuf); 970 return PTR_ERR(wbuf);
971 spin_lock_irqsave(&hardware[type].lock, flags); 971 spin_lock_irqsave(&hardware[type].lock, flags);
972 if (type == LIRC_IRDEO) { 972 if (type == LIRC_IRDEO) {
@@ -981,6 +981,7 @@ static ssize_t lirc_write(struct file *file, const char *buf,
981 } 981 }
982 off(); 982 off();
983 spin_unlock_irqrestore(&hardware[type].lock, flags); 983 spin_unlock_irqrestore(&hardware[type].lock, flags);
984 kfree(wbuf);
984 return n; 985 return n;
985} 986}
986 987
diff --git a/drivers/staging/lirc/lirc_sir.c b/drivers/staging/lirc/lirc_sir.c
index c553ab626238..76be7b8c6209 100644
--- a/drivers/staging/lirc/lirc_sir.c
+++ b/drivers/staging/lirc/lirc_sir.c
@@ -330,6 +330,7 @@ static ssize_t lirc_write(struct file *file, const char *buf, size_t n,
330 /* enable receiver */ 330 /* enable receiver */
331 Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE; 331 Ser2UTCR3 = UTCR3_RXE|UTCR3_RIE;
332#endif 332#endif
333 kfree(tx_buf);
333 return count; 334 return count;
334} 335}
335 336
diff --git a/drivers/staging/lirc/lirc_zilog.c b/drivers/staging/lirc/lirc_zilog.c
index ad29bb1275ab..3fe5f4160194 100644
--- a/drivers/staging/lirc/lirc_zilog.c
+++ b/drivers/staging/lirc/lirc_zilog.c
@@ -20,6 +20,9 @@
20 * 20 *
21 * parts are cut&pasted from the lirc_i2c.c driver 21 * parts are cut&pasted from the lirc_i2c.c driver
22 * 22 *
23 * Numerous changes updating lirc_zilog.c in kernel 2.6.38 and later are
24 * Copyright (C) 2011 Andy Walls <awalls@md.metrocast.net>
25 *
23 * This program is free software; you can redistribute it and/or modify 26 * This program is free software; you can redistribute it and/or modify
24 * it under the terms of the GNU General Public License as published by 27 * it under the terms of the GNU General Public License as published by
25 * the Free Software Foundation; either version 2 of the License, or 28 * the Free Software Foundation; either version 2 of the License, or
@@ -60,38 +63,44 @@
60#include <media/lirc_dev.h> 63#include <media/lirc_dev.h>
61#include <media/lirc.h> 64#include <media/lirc.h>
62 65
63struct IR { 66struct IR_rx {
64 struct lirc_driver l;
65
66 /* Device info */
67 struct mutex ir_lock;
68 int open;
69 bool is_hdpvr;
70
71 /* RX device */ 67 /* RX device */
72 struct i2c_client c_rx; 68 struct i2c_client *c;
73 int have_rx;
74 69
75 /* RX device buffer & lock */ 70 /* RX device buffer & lock */
76 struct lirc_buffer buf; 71 struct lirc_buffer buf;
77 struct mutex buf_lock; 72 struct mutex buf_lock;
78 73
79 /* RX polling thread data */ 74 /* RX polling thread data */
80 struct completion *t_notify;
81 struct completion *t_notify2;
82 int shutdown;
83 struct task_struct *task; 75 struct task_struct *task;
84 76
85 /* RX read data */ 77 /* RX read data */
86 unsigned char b[3]; 78 unsigned char b[3];
79 bool hdpvr_data_fmt;
80};
87 81
82struct IR_tx {
88 /* TX device */ 83 /* TX device */
89 struct i2c_client c_tx; 84 struct i2c_client *c;
85
86 /* TX additional actions needed */
90 int need_boot; 87 int need_boot;
91 int have_tx; 88 bool post_tx_ready_poll;
89};
90
91struct IR {
92 struct lirc_driver l;
93
94 struct mutex ir_lock;
95 int open;
96
97 struct i2c_adapter *adapter;
98 struct IR_rx *rx;
99 struct IR_tx *tx;
92}; 100};
93 101
94/* Minor -> data mapping */ 102/* Minor -> data mapping */
103static struct mutex ir_devices_lock;
95static struct IR *ir_devices[MAX_IRCTL_DEVICES]; 104static struct IR *ir_devices[MAX_IRCTL_DEVICES];
96 105
97/* Block size for IR transmitter */ 106/* Block size for IR transmitter */
@@ -124,14 +133,11 @@ static struct mutex tx_data_lock;
124#define zilog_notify(s, args...) printk(KERN_NOTICE KBUILD_MODNAME ": " s, \ 133#define zilog_notify(s, args...) printk(KERN_NOTICE KBUILD_MODNAME ": " s, \
125 ## args) 134 ## args)
126#define zilog_error(s, args...) printk(KERN_ERR KBUILD_MODNAME ": " s, ## args) 135#define zilog_error(s, args...) printk(KERN_ERR KBUILD_MODNAME ": " s, ## args)
127 136#define zilog_info(s, args...) printk(KERN_INFO KBUILD_MODNAME ": " s, ## args)
128#define ZILOG_HAUPPAUGE_IR_RX_NAME "Zilog/Hauppauge IR RX"
129#define ZILOG_HAUPPAUGE_IR_TX_NAME "Zilog/Hauppauge IR TX"
130 137
131/* module parameters */ 138/* module parameters */
132static int debug; /* debug output */ 139static int debug; /* debug output */
133static int disable_rx; /* disable RX device */ 140static int tx_only; /* only handle the IR Tx function */
134static int disable_tx; /* disable TX device */
135static int minor = -1; /* minor number */ 141static int minor = -1; /* minor number */
136 142
137#define dprintk(fmt, args...) \ 143#define dprintk(fmt, args...) \
@@ -150,8 +156,12 @@ static int add_to_buf(struct IR *ir)
150 int ret; 156 int ret;
151 int failures = 0; 157 int failures = 0;
152 unsigned char sendbuf[1] = { 0 }; 158 unsigned char sendbuf[1] = { 0 };
159 struct IR_rx *rx = ir->rx;
153 160
154 if (lirc_buffer_full(&ir->buf)) { 161 if (rx == NULL)
162 return -ENXIO;
163
164 if (lirc_buffer_full(&rx->buf)) {
155 dprintk("buffer overflow\n"); 165 dprintk("buffer overflow\n");
156 return -EOVERFLOW; 166 return -EOVERFLOW;
157 } 167 }
@@ -161,17 +171,25 @@ static int add_to_buf(struct IR *ir)
161 * data and we have space 171 * data and we have space
162 */ 172 */
163 do { 173 do {
174 if (kthread_should_stop())
175 return -ENODATA;
176
164 /* 177 /*
165 * Lock i2c bus for the duration. RX/TX chips interfere so 178 * Lock i2c bus for the duration. RX/TX chips interfere so
166 * this is worth it 179 * this is worth it
167 */ 180 */
168 mutex_lock(&ir->ir_lock); 181 mutex_lock(&ir->ir_lock);
169 182
183 if (kthread_should_stop()) {
184 mutex_unlock(&ir->ir_lock);
185 return -ENODATA;
186 }
187
170 /* 188 /*
171 * Send random "poll command" (?) Windows driver does this 189 * Send random "poll command" (?) Windows driver does this
172 * and it is a good point to detect chip failure. 190 * and it is a good point to detect chip failure.
173 */ 191 */
174 ret = i2c_master_send(&ir->c_rx, sendbuf, 1); 192 ret = i2c_master_send(rx->c, sendbuf, 1);
175 if (ret != 1) { 193 if (ret != 1) {
176 zilog_error("i2c_master_send failed with %d\n", ret); 194 zilog_error("i2c_master_send failed with %d\n", ret);
177 if (failures >= 3) { 195 if (failures >= 3) {
@@ -186,45 +204,53 @@ static int add_to_buf(struct IR *ir)
186 "trying reset\n"); 204 "trying reset\n");
187 205
188 set_current_state(TASK_UNINTERRUPTIBLE); 206 set_current_state(TASK_UNINTERRUPTIBLE);
207 if (kthread_should_stop()) {
208 mutex_unlock(&ir->ir_lock);
209 return -ENODATA;
210 }
189 schedule_timeout((100 * HZ + 999) / 1000); 211 schedule_timeout((100 * HZ + 999) / 1000);
190 ir->need_boot = 1; 212 ir->tx->need_boot = 1;
191 213
192 ++failures; 214 ++failures;
193 mutex_unlock(&ir->ir_lock); 215 mutex_unlock(&ir->ir_lock);
194 continue; 216 continue;
195 } 217 }
196 218
197 ret = i2c_master_recv(&ir->c_rx, keybuf, sizeof(keybuf)); 219 if (kthread_should_stop()) {
220 mutex_unlock(&ir->ir_lock);
221 return -ENODATA;
222 }
223 ret = i2c_master_recv(rx->c, keybuf, sizeof(keybuf));
198 mutex_unlock(&ir->ir_lock); 224 mutex_unlock(&ir->ir_lock);
199 if (ret != sizeof(keybuf)) { 225 if (ret != sizeof(keybuf)) {
200 zilog_error("i2c_master_recv failed with %d -- " 226 zilog_error("i2c_master_recv failed with %d -- "
201 "keeping last read buffer\n", ret); 227 "keeping last read buffer\n", ret);
202 } else { 228 } else {
203 ir->b[0] = keybuf[3]; 229 rx->b[0] = keybuf[3];
204 ir->b[1] = keybuf[4]; 230 rx->b[1] = keybuf[4];
205 ir->b[2] = keybuf[5]; 231 rx->b[2] = keybuf[5];
206 dprintk("key (0x%02x/0x%02x)\n", ir->b[0], ir->b[1]); 232 dprintk("key (0x%02x/0x%02x)\n", rx->b[0], rx->b[1]);
207 } 233 }
208 234
209 /* key pressed ? */ 235 /* key pressed ? */
210 if (ir->is_hdpvr) { 236 if (rx->hdpvr_data_fmt) {
211 if (got_data && (keybuf[0] == 0x80)) 237 if (got_data && (keybuf[0] == 0x80))
212 return 0; 238 return 0;
213 else if (got_data && (keybuf[0] == 0x00)) 239 else if (got_data && (keybuf[0] == 0x00))
214 return -ENODATA; 240 return -ENODATA;
215 } else if ((ir->b[0] & 0x80) == 0) 241 } else if ((rx->b[0] & 0x80) == 0)
216 return got_data ? 0 : -ENODATA; 242 return got_data ? 0 : -ENODATA;
217 243
218 /* look what we have */ 244 /* look what we have */
219 code = (((__u16)ir->b[0] & 0x7f) << 6) | (ir->b[1] >> 2); 245 code = (((__u16)rx->b[0] & 0x7f) << 6) | (rx->b[1] >> 2);
220 246
221 codes[0] = (code >> 8) & 0xff; 247 codes[0] = (code >> 8) & 0xff;
222 codes[1] = code & 0xff; 248 codes[1] = code & 0xff;
223 249
224 /* return it */ 250 /* return it */
225 lirc_buffer_write(&ir->buf, codes); 251 lirc_buffer_write(&rx->buf, codes);
226 ++got_data; 252 ++got_data;
227 } while (!lirc_buffer_full(&ir->buf)); 253 } while (!lirc_buffer_full(&rx->buf));
228 254
229 return 0; 255 return 0;
230} 256}
@@ -242,46 +268,35 @@ static int add_to_buf(struct IR *ir)
242static int lirc_thread(void *arg) 268static int lirc_thread(void *arg)
243{ 269{
244 struct IR *ir = arg; 270 struct IR *ir = arg;
245 271 struct IR_rx *rx = ir->rx;
246 if (ir->t_notify != NULL)
247 complete(ir->t_notify);
248 272
249 dprintk("poll thread started\n"); 273 dprintk("poll thread started\n");
250 274
251 do { 275 while (!kthread_should_stop()) {
252 if (ir->open) { 276 set_current_state(TASK_INTERRUPTIBLE);
253 set_current_state(TASK_INTERRUPTIBLE);
254 277
255 /* 278 /* if device not opened, we can sleep half a second */
256 * This is ~113*2 + 24 + jitter (2*repeat gap + 279 if (!ir->open) {
257 * code length). We use this interval as the chip
258 * resets every time you poll it (bad!). This is
259 * therefore just sufficient to catch all of the
260 * button presses. It makes the remote much more
261 * responsive. You can see the difference by
262 * running irw and holding down a button. With
263 * 100ms, the old polling interval, you'll notice
264 * breaks in the repeat sequence corresponding to
265 * lost keypresses.
266 */
267 schedule_timeout((260 * HZ) / 1000);
268 if (ir->shutdown)
269 break;
270 if (!add_to_buf(ir))
271 wake_up_interruptible(&ir->buf.wait_poll);
272 } else {
273 /* if device not opened so we can sleep half a second */
274 set_current_state(TASK_INTERRUPTIBLE);
275 schedule_timeout(HZ/2); 280 schedule_timeout(HZ/2);
281 continue;
276 } 282 }
277 } while (!ir->shutdown);
278
279 if (ir->t_notify2 != NULL)
280 wait_for_completion(ir->t_notify2);
281 283
282 ir->task = NULL; 284 /*
283 if (ir->t_notify != NULL) 285 * This is ~113*2 + 24 + jitter (2*repeat gap + code length).
284 complete(ir->t_notify); 286 * We use this interval as the chip resets every time you poll
287 * it (bad!). This is therefore just sufficient to catch all
288 * of the button presses. It makes the remote much more
289 * responsive. You can see the difference by running irw and
290 * holding down a button. With 100ms, the old polling
291 * interval, you'll notice breaks in the repeat sequence
292 * corresponding to lost keypresses.
293 */
294 schedule_timeout((260 * HZ) / 1000);
295 if (kthread_should_stop())
296 break;
297 if (!add_to_buf(ir))
298 wake_up_interruptible(&rx->buf.wait_poll);
299 }
285 300
286 dprintk("poll thread ended\n"); 301 dprintk("poll thread ended\n");
287 return 0; 302 return 0;
@@ -299,10 +314,10 @@ static int set_use_inc(void *data)
299 * this is completely broken code. lirc_unregister_driver() 314 * this is completely broken code. lirc_unregister_driver()
300 * must be possible even when the device is open 315 * must be possible even when the device is open
301 */ 316 */
302 if (ir->c_rx.addr) 317 if (ir->rx != NULL)
303 i2c_use_client(&ir->c_rx); 318 i2c_use_client(ir->rx->c);
304 if (ir->c_tx.addr) 319 if (ir->tx != NULL)
305 i2c_use_client(&ir->c_tx); 320 i2c_use_client(ir->tx->c);
306 321
307 return 0; 322 return 0;
308} 323}
@@ -311,10 +326,10 @@ static void set_use_dec(void *data)
311{ 326{
312 struct IR *ir = data; 327 struct IR *ir = data;
313 328
314 if (ir->c_rx.addr) 329 if (ir->rx)
315 i2c_release_client(&ir->c_rx); 330 i2c_release_client(ir->rx->c);
316 if (ir->c_tx.addr) 331 if (ir->tx)
317 i2c_release_client(&ir->c_tx); 332 i2c_release_client(ir->tx->c);
318 if (ir->l.owner != NULL) 333 if (ir->l.owner != NULL)
319 module_put(ir->l.owner); 334 module_put(ir->l.owner);
320} 335}
@@ -453,7 +468,7 @@ corrupt:
453} 468}
454 469
455/* send a block of data to the IR TX device */ 470/* send a block of data to the IR TX device */
456static int send_data_block(struct IR *ir, unsigned char *data_block) 471static int send_data_block(struct IR_tx *tx, unsigned char *data_block)
457{ 472{
458 int i, j, ret; 473 int i, j, ret;
459 unsigned char buf[5]; 474 unsigned char buf[5];
@@ -467,7 +482,7 @@ static int send_data_block(struct IR *ir, unsigned char *data_block)
467 buf[1 + j] = data_block[i + j]; 482 buf[1 + j] = data_block[i + j];
468 dprintk("%02x %02x %02x %02x %02x", 483 dprintk("%02x %02x %02x %02x %02x",
469 buf[0], buf[1], buf[2], buf[3], buf[4]); 484 buf[0], buf[1], buf[2], buf[3], buf[4]);
470 ret = i2c_master_send(&ir->c_tx, buf, tosend + 1); 485 ret = i2c_master_send(tx->c, buf, tosend + 1);
471 if (ret != tosend + 1) { 486 if (ret != tosend + 1) {
472 zilog_error("i2c_master_send failed with %d\n", ret); 487 zilog_error("i2c_master_send failed with %d\n", ret);
473 return ret < 0 ? ret : -EFAULT; 488 return ret < 0 ? ret : -EFAULT;
@@ -478,32 +493,32 @@ static int send_data_block(struct IR *ir, unsigned char *data_block)
478} 493}
479 494
480/* send boot data to the IR TX device */ 495/* send boot data to the IR TX device */
481static int send_boot_data(struct IR *ir) 496static int send_boot_data(struct IR_tx *tx)
482{ 497{
483 int ret; 498 int ret;
484 unsigned char buf[4]; 499 unsigned char buf[4];
485 500
486 /* send the boot block */ 501 /* send the boot block */
487 ret = send_data_block(ir, tx_data->boot_data); 502 ret = send_data_block(tx, tx_data->boot_data);
488 if (ret != 0) 503 if (ret != 0)
489 return ret; 504 return ret;
490 505
491 /* kick it off? */ 506 /* kick it off? */
492 buf[0] = 0x00; 507 buf[0] = 0x00;
493 buf[1] = 0x20; 508 buf[1] = 0x20;
494 ret = i2c_master_send(&ir->c_tx, buf, 2); 509 ret = i2c_master_send(tx->c, buf, 2);
495 if (ret != 2) { 510 if (ret != 2) {
496 zilog_error("i2c_master_send failed with %d\n", ret); 511 zilog_error("i2c_master_send failed with %d\n", ret);
497 return ret < 0 ? ret : -EFAULT; 512 return ret < 0 ? ret : -EFAULT;
498 } 513 }
499 ret = i2c_master_send(&ir->c_tx, buf, 1); 514 ret = i2c_master_send(tx->c, buf, 1);
500 if (ret != 1) { 515 if (ret != 1) {
501 zilog_error("i2c_master_send failed with %d\n", ret); 516 zilog_error("i2c_master_send failed with %d\n", ret);
502 return ret < 0 ? ret : -EFAULT; 517 return ret < 0 ? ret : -EFAULT;
503 } 518 }
504 519
505 /* Here comes the firmware version... (hopefully) */ 520 /* Here comes the firmware version... (hopefully) */
506 ret = i2c_master_recv(&ir->c_tx, buf, 4); 521 ret = i2c_master_recv(tx->c, buf, 4);
507 if (ret != 4) { 522 if (ret != 4) {
508 zilog_error("i2c_master_recv failed with %d\n", ret); 523 zilog_error("i2c_master_recv failed with %d\n", ret);
509 return 0; 524 return 0;
@@ -543,7 +558,7 @@ static void fw_unload(void)
543} 558}
544 559
545/* load "firmware" for the IR TX device */ 560/* load "firmware" for the IR TX device */
546static int fw_load(struct IR *ir) 561static int fw_load(struct IR_tx *tx)
547{ 562{
548 int ret; 563 int ret;
549 unsigned int i; 564 unsigned int i;
@@ -558,7 +573,7 @@ static int fw_load(struct IR *ir)
558 } 573 }
559 574
560 /* Request codeset data file */ 575 /* Request codeset data file */
561 ret = request_firmware(&fw_entry, "haup-ir-blaster.bin", &ir->c_tx.dev); 576 ret = request_firmware(&fw_entry, "haup-ir-blaster.bin", &tx->c->dev);
562 if (ret != 0) { 577 if (ret != 0) {
563 zilog_error("firmware haup-ir-blaster.bin not available " 578 zilog_error("firmware haup-ir-blaster.bin not available "
564 "(%d)\n", ret); 579 "(%d)\n", ret);
@@ -685,20 +700,20 @@ out:
685} 700}
686 701
687/* initialise the IR TX device */ 702/* initialise the IR TX device */
688static int tx_init(struct IR *ir) 703static int tx_init(struct IR_tx *tx)
689{ 704{
690 int ret; 705 int ret;
691 706
692 /* Load 'firmware' */ 707 /* Load 'firmware' */
693 ret = fw_load(ir); 708 ret = fw_load(tx);
694 if (ret != 0) 709 if (ret != 0)
695 return ret; 710 return ret;
696 711
697 /* Send boot block */ 712 /* Send boot block */
698 ret = send_boot_data(ir); 713 ret = send_boot_data(tx);
699 if (ret != 0) 714 if (ret != 0)
700 return ret; 715 return ret;
701 ir->need_boot = 0; 716 tx->need_boot = 0;
702 717
703 /* Looks good */ 718 /* Looks good */
704 return 0; 719 return 0;
@@ -714,20 +729,20 @@ static loff_t lseek(struct file *filep, loff_t offset, int orig)
714static ssize_t read(struct file *filep, char *outbuf, size_t n, loff_t *ppos) 729static ssize_t read(struct file *filep, char *outbuf, size_t n, loff_t *ppos)
715{ 730{
716 struct IR *ir = filep->private_data; 731 struct IR *ir = filep->private_data;
717 unsigned char buf[ir->buf.chunk_size]; 732 struct IR_rx *rx = ir->rx;
718 int ret = 0, written = 0; 733 int ret = 0, written = 0;
719 DECLARE_WAITQUEUE(wait, current); 734 DECLARE_WAITQUEUE(wait, current);
720 735
721 dprintk("read called\n"); 736 dprintk("read called\n");
722 if (ir->c_rx.addr == 0) 737 if (rx == NULL)
723 return -ENODEV; 738 return -ENODEV;
724 739
725 if (mutex_lock_interruptible(&ir->buf_lock)) 740 if (mutex_lock_interruptible(&rx->buf_lock))
726 return -ERESTARTSYS; 741 return -ERESTARTSYS;
727 742
728 if (n % ir->buf.chunk_size) { 743 if (n % rx->buf.chunk_size) {
729 dprintk("read result = -EINVAL\n"); 744 dprintk("read result = -EINVAL\n");
730 mutex_unlock(&ir->buf_lock); 745 mutex_unlock(&rx->buf_lock);
731 return -EINVAL; 746 return -EINVAL;
732 } 747 }
733 748
@@ -736,7 +751,7 @@ static ssize_t read(struct file *filep, char *outbuf, size_t n, loff_t *ppos)
736 * to avoid losing scan code (in case when queue is awaken somewhere 751 * to avoid losing scan code (in case when queue is awaken somewhere
737 * between while condition checking and scheduling) 752 * between while condition checking and scheduling)
738 */ 753 */
739 add_wait_queue(&ir->buf.wait_poll, &wait); 754 add_wait_queue(&rx->buf.wait_poll, &wait);
740 set_current_state(TASK_INTERRUPTIBLE); 755 set_current_state(TASK_INTERRUPTIBLE);
741 756
742 /* 757 /*
@@ -744,7 +759,7 @@ static ssize_t read(struct file *filep, char *outbuf, size_t n, loff_t *ppos)
744 * mode and 'copy_to_user' is happy, wait for data. 759 * mode and 'copy_to_user' is happy, wait for data.
745 */ 760 */
746 while (written < n && ret == 0) { 761 while (written < n && ret == 0) {
747 if (lirc_buffer_empty(&ir->buf)) { 762 if (lirc_buffer_empty(&rx->buf)) {
748 /* 763 /*
749 * According to the read(2) man page, 'written' can be 764 * According to the read(2) man page, 'written' can be
750 * returned as less than 'n', instead of blocking 765 * returned as less than 'n', instead of blocking
@@ -764,16 +779,17 @@ static ssize_t read(struct file *filep, char *outbuf, size_t n, loff_t *ppos)
764 schedule(); 779 schedule();
765 set_current_state(TASK_INTERRUPTIBLE); 780 set_current_state(TASK_INTERRUPTIBLE);
766 } else { 781 } else {
767 lirc_buffer_read(&ir->buf, buf); 782 unsigned char buf[rx->buf.chunk_size];
783 lirc_buffer_read(&rx->buf, buf);
768 ret = copy_to_user((void *)outbuf+written, buf, 784 ret = copy_to_user((void *)outbuf+written, buf,
769 ir->buf.chunk_size); 785 rx->buf.chunk_size);
770 written += ir->buf.chunk_size; 786 written += rx->buf.chunk_size;
771 } 787 }
772 } 788 }
773 789
774 remove_wait_queue(&ir->buf.wait_poll, &wait); 790 remove_wait_queue(&rx->buf.wait_poll, &wait);
775 set_current_state(TASK_RUNNING); 791 set_current_state(TASK_RUNNING);
776 mutex_unlock(&ir->buf_lock); 792 mutex_unlock(&rx->buf_lock);
777 793
778 dprintk("read result = %s (%d)\n", 794 dprintk("read result = %s (%d)\n",
779 ret ? "-EFAULT" : "OK", ret); 795 ret ? "-EFAULT" : "OK", ret);
@@ -782,7 +798,7 @@ static ssize_t read(struct file *filep, char *outbuf, size_t n, loff_t *ppos)
782} 798}
783 799
784/* send a keypress to the IR TX device */ 800/* send a keypress to the IR TX device */
785static int send_code(struct IR *ir, unsigned int code, unsigned int key) 801static int send_code(struct IR_tx *tx, unsigned int code, unsigned int key)
786{ 802{
787 unsigned char data_block[TX_BLOCK_SIZE]; 803 unsigned char data_block[TX_BLOCK_SIZE];
788 unsigned char buf[2]; 804 unsigned char buf[2];
@@ -799,26 +815,26 @@ static int send_code(struct IR *ir, unsigned int code, unsigned int key)
799 return ret; 815 return ret;
800 816
801 /* Send the data block */ 817 /* Send the data block */
802 ret = send_data_block(ir, data_block); 818 ret = send_data_block(tx, data_block);
803 if (ret != 0) 819 if (ret != 0)
804 return ret; 820 return ret;
805 821
806 /* Send data block length? */ 822 /* Send data block length? */
807 buf[0] = 0x00; 823 buf[0] = 0x00;
808 buf[1] = 0x40; 824 buf[1] = 0x40;
809 ret = i2c_master_send(&ir->c_tx, buf, 2); 825 ret = i2c_master_send(tx->c, buf, 2);
810 if (ret != 2) { 826 if (ret != 2) {
811 zilog_error("i2c_master_send failed with %d\n", ret); 827 zilog_error("i2c_master_send failed with %d\n", ret);
812 return ret < 0 ? ret : -EFAULT; 828 return ret < 0 ? ret : -EFAULT;
813 } 829 }
814 ret = i2c_master_send(&ir->c_tx, buf, 1); 830 ret = i2c_master_send(tx->c, buf, 1);
815 if (ret != 1) { 831 if (ret != 1) {
816 zilog_error("i2c_master_send failed with %d\n", ret); 832 zilog_error("i2c_master_send failed with %d\n", ret);
817 return ret < 0 ? ret : -EFAULT; 833 return ret < 0 ? ret : -EFAULT;
818 } 834 }
819 835
820 /* Send finished download? */ 836 /* Send finished download? */
821 ret = i2c_master_recv(&ir->c_tx, buf, 1); 837 ret = i2c_master_recv(tx->c, buf, 1);
822 if (ret != 1) { 838 if (ret != 1) {
823 zilog_error("i2c_master_recv failed with %d\n", ret); 839 zilog_error("i2c_master_recv failed with %d\n", ret);
824 return ret < 0 ? ret : -EFAULT; 840 return ret < 0 ? ret : -EFAULT;
@@ -832,7 +848,7 @@ static int send_code(struct IR *ir, unsigned int code, unsigned int key)
832 /* Send prepare command? */ 848 /* Send prepare command? */
833 buf[0] = 0x00; 849 buf[0] = 0x00;
834 buf[1] = 0x80; 850 buf[1] = 0x80;
835 ret = i2c_master_send(&ir->c_tx, buf, 2); 851 ret = i2c_master_send(tx->c, buf, 2);
836 if (ret != 2) { 852 if (ret != 2) {
837 zilog_error("i2c_master_send failed with %d\n", ret); 853 zilog_error("i2c_master_send failed with %d\n", ret);
838 return ret < 0 ? ret : -EFAULT; 854 return ret < 0 ? ret : -EFAULT;
@@ -843,7 +859,7 @@ static int send_code(struct IR *ir, unsigned int code, unsigned int key)
843 * last i2c_master_recv always fails with a -5, so for now, we're 859 * last i2c_master_recv always fails with a -5, so for now, we're
844 * going to skip this whole mess and say we're done on the HD PVR 860 * going to skip this whole mess and say we're done on the HD PVR
845 */ 861 */
846 if (ir->is_hdpvr) { 862 if (!tx->post_tx_ready_poll) {
847 dprintk("sent code %u, key %u\n", code, key); 863 dprintk("sent code %u, key %u\n", code, key);
848 return 0; 864 return 0;
849 } 865 }
@@ -857,7 +873,7 @@ static int send_code(struct IR *ir, unsigned int code, unsigned int key)
857 for (i = 0; i < 20; ++i) { 873 for (i = 0; i < 20; ++i) {
858 set_current_state(TASK_UNINTERRUPTIBLE); 874 set_current_state(TASK_UNINTERRUPTIBLE);
859 schedule_timeout((50 * HZ + 999) / 1000); 875 schedule_timeout((50 * HZ + 999) / 1000);
860 ret = i2c_master_send(&ir->c_tx, buf, 1); 876 ret = i2c_master_send(tx->c, buf, 1);
861 if (ret == 1) 877 if (ret == 1)
862 break; 878 break;
863 dprintk("NAK expected: i2c_master_send " 879 dprintk("NAK expected: i2c_master_send "
@@ -870,7 +886,7 @@ static int send_code(struct IR *ir, unsigned int code, unsigned int key)
870 } 886 }
871 887
872 /* Seems to be an 'ok' response */ 888 /* Seems to be an 'ok' response */
873 i = i2c_master_recv(&ir->c_tx, buf, 1); 889 i = i2c_master_recv(tx->c, buf, 1);
874 if (i != 1) { 890 if (i != 1) {
875 zilog_error("i2c_master_recv failed with %d\n", ret); 891 zilog_error("i2c_master_recv failed with %d\n", ret);
876 return -EFAULT; 892 return -EFAULT;
@@ -895,10 +911,11 @@ static ssize_t write(struct file *filep, const char *buf, size_t n,
895 loff_t *ppos) 911 loff_t *ppos)
896{ 912{
897 struct IR *ir = filep->private_data; 913 struct IR *ir = filep->private_data;
914 struct IR_tx *tx = ir->tx;
898 size_t i; 915 size_t i;
899 int failures = 0; 916 int failures = 0;
900 917
901 if (ir->c_tx.addr == 0) 918 if (tx == NULL)
902 return -ENODEV; 919 return -ENODEV;
903 920
904 /* Validate user parameters */ 921 /* Validate user parameters */
@@ -919,15 +936,15 @@ static ssize_t write(struct file *filep, const char *buf, size_t n,
919 } 936 }
920 937
921 /* Send boot data first if required */ 938 /* Send boot data first if required */
922 if (ir->need_boot == 1) { 939 if (tx->need_boot == 1) {
923 ret = send_boot_data(ir); 940 ret = send_boot_data(tx);
924 if (ret == 0) 941 if (ret == 0)
925 ir->need_boot = 0; 942 tx->need_boot = 0;
926 } 943 }
927 944
928 /* Send the code */ 945 /* Send the code */
929 if (ret == 0) { 946 if (ret == 0) {
930 ret = send_code(ir, (unsigned)command >> 16, 947 ret = send_code(tx, (unsigned)command >> 16,
931 (unsigned)command & 0xFFFF); 948 (unsigned)command & 0xFFFF);
932 if (ret == -EPROTO) { 949 if (ret == -EPROTO) {
933 mutex_unlock(&ir->ir_lock); 950 mutex_unlock(&ir->ir_lock);
@@ -952,7 +969,7 @@ static ssize_t write(struct file *filep, const char *buf, size_t n,
952 } 969 }
953 set_current_state(TASK_UNINTERRUPTIBLE); 970 set_current_state(TASK_UNINTERRUPTIBLE);
954 schedule_timeout((100 * HZ + 999) / 1000); 971 schedule_timeout((100 * HZ + 999) / 1000);
955 ir->need_boot = 1; 972 tx->need_boot = 1;
956 ++failures; 973 ++failures;
957 } else 974 } else
958 i += sizeof(int); 975 i += sizeof(int);
@@ -969,22 +986,23 @@ static ssize_t write(struct file *filep, const char *buf, size_t n,
969static unsigned int poll(struct file *filep, poll_table *wait) 986static unsigned int poll(struct file *filep, poll_table *wait)
970{ 987{
971 struct IR *ir = filep->private_data; 988 struct IR *ir = filep->private_data;
989 struct IR_rx *rx = ir->rx;
972 unsigned int ret; 990 unsigned int ret;
973 991
974 dprintk("poll called\n"); 992 dprintk("poll called\n");
975 if (ir->c_rx.addr == 0) 993 if (rx == NULL)
976 return -ENODEV; 994 return -ENODEV;
977 995
978 mutex_lock(&ir->buf_lock); 996 mutex_lock(&rx->buf_lock);
979 997
980 poll_wait(filep, &ir->buf.wait_poll, wait); 998 poll_wait(filep, &rx->buf.wait_poll, wait);
981 999
982 dprintk("poll result = %s\n", 1000 dprintk("poll result = %s\n",
983 lirc_buffer_empty(&ir->buf) ? "0" : "POLLIN|POLLRDNORM"); 1001 lirc_buffer_empty(&rx->buf) ? "0" : "POLLIN|POLLRDNORM");
984 1002
985 ret = lirc_buffer_empty(&ir->buf) ? 0 : (POLLIN|POLLRDNORM); 1003 ret = lirc_buffer_empty(&rx->buf) ? 0 : (POLLIN|POLLRDNORM);
986 1004
987 mutex_unlock(&ir->buf_lock); 1005 mutex_unlock(&rx->buf_lock);
988 return ret; 1006 return ret;
989} 1007}
990 1008
@@ -994,10 +1012,9 @@ static long ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
994 int result; 1012 int result;
995 unsigned long mode, features = 0; 1013 unsigned long mode, features = 0;
996 1014
997 if (ir->c_rx.addr != 0) 1015 features |= LIRC_CAN_SEND_PULSE;
1016 if (ir->rx != NULL)
998 features |= LIRC_CAN_REC_LIRCCODE; 1017 features |= LIRC_CAN_REC_LIRCCODE;
999 if (ir->c_tx.addr != 0)
1000 features |= LIRC_CAN_SEND_PULSE;
1001 1018
1002 switch (cmd) { 1019 switch (cmd) {
1003 case LIRC_GET_LENGTH: 1020 case LIRC_GET_LENGTH:
@@ -1024,15 +1041,9 @@ static long ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1024 result = -EINVAL; 1041 result = -EINVAL;
1025 break; 1042 break;
1026 case LIRC_GET_SEND_MODE: 1043 case LIRC_GET_SEND_MODE:
1027 if (!(features&LIRC_CAN_SEND_MASK))
1028 return -ENOSYS;
1029
1030 result = put_user(LIRC_MODE_PULSE, (unsigned long *) arg); 1044 result = put_user(LIRC_MODE_PULSE, (unsigned long *) arg);
1031 break; 1045 break;
1032 case LIRC_SET_SEND_MODE: 1046 case LIRC_SET_SEND_MODE:
1033 if (!(features&LIRC_CAN_SEND_MASK))
1034 return -ENOSYS;
1035
1036 result = get_user(mode, (unsigned long *) arg); 1047 result = get_user(mode, (unsigned long *) arg);
1037 if (!result && mode != LIRC_MODE_PULSE) 1048 if (!result && mode != LIRC_MODE_PULSE)
1038 return -EINVAL; 1049 return -EINVAL;
@@ -1043,6 +1054,15 @@ static long ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
1043 return result; 1054 return result;
1044} 1055}
1045 1056
1057/* ir_devices_lock must be held */
1058static struct IR *find_ir_device_by_minor(unsigned int minor)
1059{
1060 if (minor >= MAX_IRCTL_DEVICES)
1061 return NULL;
1062
1063 return ir_devices[minor];
1064}
1065
1046/* 1066/*
1047 * Open the IR device. Get hold of our IR structure and 1067 * Open the IR device. Get hold of our IR structure and
1048 * stash it in private_data for the file 1068 * stash it in private_data for the file
@@ -1051,15 +1071,15 @@ static int open(struct inode *node, struct file *filep)
1051{ 1071{
1052 struct IR *ir; 1072 struct IR *ir;
1053 int ret; 1073 int ret;
1074 unsigned int minor = MINOR(node->i_rdev);
1054 1075
1055 /* find our IR struct */ 1076 /* find our IR struct */
1056 unsigned minor = MINOR(node->i_rdev); 1077 mutex_lock(&ir_devices_lock);
1057 if (minor >= MAX_IRCTL_DEVICES) { 1078 ir = find_ir_device_by_minor(minor);
1058 dprintk("minor %d: open result = -ENODEV\n", 1079 mutex_unlock(&ir_devices_lock);
1059 minor); 1080
1081 if (ir == NULL)
1060 return -ENODEV; 1082 return -ENODEV;
1061 }
1062 ir = ir_devices[minor];
1063 1083
1064 /* increment in use count */ 1084 /* increment in use count */
1065 mutex_lock(&ir->ir_lock); 1085 mutex_lock(&ir->ir_lock);
@@ -1106,7 +1126,6 @@ static struct lirc_driver lirc_template = {
1106 1126
1107static int ir_remove(struct i2c_client *client); 1127static int ir_remove(struct i2c_client *client);
1108static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id); 1128static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id);
1109static int ir_command(struct i2c_client *client, unsigned int cmd, void *arg);
1110 1129
1111#define ID_FLAG_TX 0x01 1130#define ID_FLAG_TX 0x01
1112#define ID_FLAG_HDPVR 0x02 1131#define ID_FLAG_HDPVR 0x02
@@ -1126,7 +1145,6 @@ static struct i2c_driver driver = {
1126 }, 1145 },
1127 .probe = ir_probe, 1146 .probe = ir_probe,
1128 .remove = ir_remove, 1147 .remove = ir_remove,
1129 .command = ir_command,
1130 .id_table = ir_transceiver_id, 1148 .id_table = ir_transceiver_id,
1131}; 1149};
1132 1150
@@ -1144,214 +1162,253 @@ static const struct file_operations lirc_fops = {
1144 .release = close 1162 .release = close
1145}; 1163};
1146 1164
1147static int ir_remove(struct i2c_client *client) 1165static void destroy_rx_kthread(struct IR_rx *rx)
1148{ 1166{
1149 struct IR *ir = i2c_get_clientdata(client); 1167 /* end up polling thread */
1168 if (rx != NULL && !IS_ERR_OR_NULL(rx->task)) {
1169 kthread_stop(rx->task);
1170 rx->task = NULL;
1171 }
1172}
1150 1173
1151 mutex_lock(&ir->ir_lock); 1174/* ir_devices_lock must be held */
1175static int add_ir_device(struct IR *ir)
1176{
1177 int i;
1152 1178
1153 if (ir->have_rx || ir->have_tx) { 1179 for (i = 0; i < MAX_IRCTL_DEVICES; i++)
1154 DECLARE_COMPLETION(tn); 1180 if (ir_devices[i] == NULL) {
1155 DECLARE_COMPLETION(tn2); 1181 ir_devices[i] = ir;
1156 1182 break;
1157 /* end up polling thread */
1158 if (ir->task && !IS_ERR(ir->task)) {
1159 ir->t_notify = &tn;
1160 ir->t_notify2 = &tn2;
1161 ir->shutdown = 1;
1162 wake_up_process(ir->task);
1163 complete(&tn2);
1164 wait_for_completion(&tn);
1165 ir->t_notify = NULL;
1166 ir->t_notify2 = NULL;
1167 } 1183 }
1168 1184
1169 } else { 1185 return i == MAX_IRCTL_DEVICES ? -ENOMEM : i;
1170 mutex_unlock(&ir->ir_lock); 1186}
1171 zilog_error("%s: detached from something we didn't " 1187
1172 "attach to\n", __func__); 1188/* ir_devices_lock must be held */
1173 return -ENODEV; 1189static void del_ir_device(struct IR *ir)
1190{
1191 int i;
1192
1193 for (i = 0; i < MAX_IRCTL_DEVICES; i++)
1194 if (ir_devices[i] == ir) {
1195 ir_devices[i] = NULL;
1196 break;
1197 }
1198}
1199
1200static int ir_remove(struct i2c_client *client)
1201{
1202 struct IR *ir = i2c_get_clientdata(client);
1203
1204 mutex_lock(&ir_devices_lock);
1205
1206 if (ir == NULL) {
1207 /* We destroyed everything when the first client came through */
1208 mutex_unlock(&ir_devices_lock);
1209 return 0;
1174 } 1210 }
1175 1211
1176 /* unregister lirc driver */ 1212 /* Good-bye LIRC */
1177 if (ir->l.minor >= 0 && ir->l.minor < MAX_IRCTL_DEVICES) { 1213 lirc_unregister_driver(ir->l.minor);
1178 lirc_unregister_driver(ir->l.minor); 1214
1179 ir_devices[ir->l.minor] = NULL; 1215 /* Good-bye Rx */
1216 destroy_rx_kthread(ir->rx);
1217 if (ir->rx != NULL) {
1218 if (ir->rx->buf.fifo_initialized)
1219 lirc_buffer_free(&ir->rx->buf);
1220 i2c_set_clientdata(ir->rx->c, NULL);
1221 kfree(ir->rx);
1180 } 1222 }
1181 1223
1182 /* free memory */ 1224 /* Good-bye Tx */
1183 lirc_buffer_free(&ir->buf); 1225 i2c_set_clientdata(ir->tx->c, NULL);
1184 mutex_unlock(&ir->ir_lock); 1226 kfree(ir->tx);
1227
1228 /* Good-bye IR */
1229 del_ir_device(ir);
1185 kfree(ir); 1230 kfree(ir);
1186 1231
1232 mutex_unlock(&ir_devices_lock);
1187 return 0; 1233 return 0;
1188} 1234}
1189 1235
1190static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id) 1236
1237/* ir_devices_lock must be held */
1238static struct IR *find_ir_device_by_adapter(struct i2c_adapter *adapter)
1191{ 1239{
1240 int i;
1192 struct IR *ir = NULL; 1241 struct IR *ir = NULL;
1242
1243 for (i = 0; i < MAX_IRCTL_DEVICES; i++)
1244 if (ir_devices[i] != NULL &&
1245 ir_devices[i]->adapter == adapter) {
1246 ir = ir_devices[i];
1247 break;
1248 }
1249
1250 return ir;
1251}
1252
1253static int ir_probe(struct i2c_client *client, const struct i2c_device_id *id)
1254{
1255 struct IR *ir;
1193 struct i2c_adapter *adap = client->adapter; 1256 struct i2c_adapter *adap = client->adapter;
1194 char buf;
1195 int ret; 1257 int ret;
1196 int have_rx = 0, have_tx = 0; 1258 bool tx_probe = false;
1197 1259
1198 dprintk("%s: adapter name (%s) nr %d, i2c_device_id name (%s), " 1260 dprintk("%s: %s on i2c-%d (%s), client addr=0x%02x\n",
1199 "client addr=0x%02x\n", 1261 __func__, id->name, adap->nr, adap->name, client->addr);
1200 __func__, adap->name, adap->nr, id->name, client->addr);
1201 1262
1202 /* 1263 /*
1203 * FIXME - This probe function probes both the Tx and Rx 1264 * The IR receiver is at i2c address 0x71.
1204 * addresses of the IR microcontroller. 1265 * The IR transmitter is at i2c address 0x70.
1205 *
1206 * However, the I2C subsystem is passing along one I2C client at a
1207 * time, based on matches to the ir_transceiver_id[] table above.
1208 * The expectation is that each i2c_client address will be probed
1209 * individually by drivers so the I2C subsystem can mark all client
1210 * addresses as claimed or not.
1211 *
1212 * This probe routine causes only one of the client addresses, TX or RX,
1213 * to be claimed. This will cause a problem if the I2C subsystem is
1214 * subsequently triggered to probe unclaimed clients again.
1215 */ 1266 */
1216 /*
1217 * The external IR receiver is at i2c address 0x71.
1218 * The IR transmitter is at 0x70.
1219 */
1220 client->addr = 0x70;
1221 1267
1222 if (!disable_tx) { 1268 if (id->driver_data & ID_FLAG_TX)
1223 if (i2c_master_recv(client, &buf, 1) == 1) 1269 tx_probe = true;
1224 have_tx = 1; 1270 else if (tx_only) /* module option */
1225 dprintk("probe 0x70 @ %s: %s\n", 1271 return -ENXIO;
1226 adap->name, have_tx ? "success" : "failed");
1227 }
1228 1272
1229 if (!disable_rx) { 1273 zilog_info("probing IR %s on %s (i2c-%d)\n",
1230 client->addr = 0x71; 1274 tx_probe ? "Tx" : "Rx", adap->name, adap->nr);
1231 if (i2c_master_recv(client, &buf, 1) == 1)
1232 have_rx = 1;
1233 dprintk("probe 0x71 @ %s: %s\n",
1234 adap->name, have_rx ? "success" : "failed");
1235 }
1236 1275
1237 if (!(have_rx || have_tx)) { 1276 mutex_lock(&ir_devices_lock);
1238 zilog_error("%s: no devices found\n", adap->name);
1239 goto out_nodev;
1240 }
1241 1277
1242 printk(KERN_INFO "lirc_zilog: chip found with %s\n", 1278 /* Use a single struct IR instance for both the Rx and Tx functions */
1243 have_rx && have_tx ? "RX and TX" : 1279 ir = find_ir_device_by_adapter(adap);
1244 have_rx ? "RX only" : "TX only"); 1280 if (ir == NULL) {
1281 ir = kzalloc(sizeof(struct IR), GFP_KERNEL);
1282 if (ir == NULL) {
1283 ret = -ENOMEM;
1284 goto out_no_ir;
1285 }
1286 /* store for use in ir_probe() again, and open() later on */
1287 ret = add_ir_device(ir);
1288 if (ret)
1289 goto out_free_ir;
1290
1291 ir->adapter = adap;
1292 mutex_init(&ir->ir_lock);
1293
1294 /* set lirc_dev stuff */
1295 memcpy(&ir->l, &lirc_template, sizeof(struct lirc_driver));
1296 ir->l.minor = minor; /* module option */
1297 ir->l.code_length = 13;
1298 ir->l.rbuf = NULL;
1299 ir->l.fops = &lirc_fops;
1300 ir->l.data = ir;
1301 ir->l.dev = &adap->dev;
1302 ir->l.sample_rate = 0;
1303 }
1245 1304
1246 ir = kzalloc(sizeof(struct IR), GFP_KERNEL); 1305 if (tx_probe) {
1306 /* Set up a struct IR_tx instance */
1307 ir->tx = kzalloc(sizeof(struct IR_tx), GFP_KERNEL);
1308 if (ir->tx == NULL) {
1309 ret = -ENOMEM;
1310 goto out_free_xx;
1311 }
1247 1312
1248 if (!ir) 1313 ir->tx->c = client;
1249 goto out_nomem; 1314 ir->tx->need_boot = 1;
1315 ir->tx->post_tx_ready_poll =
1316 (id->driver_data & ID_FLAG_HDPVR) ? false : true;
1317 } else {
1318 /* Set up a struct IR_rx instance */
1319 ir->rx = kzalloc(sizeof(struct IR_rx), GFP_KERNEL);
1320 if (ir->rx == NULL) {
1321 ret = -ENOMEM;
1322 goto out_free_xx;
1323 }
1250 1324
1251 ret = lirc_buffer_init(&ir->buf, 2, BUFLEN / 2); 1325 ret = lirc_buffer_init(&ir->rx->buf, 2, BUFLEN / 2);
1252 if (ret) 1326 if (ret)
1253 goto out_nomem; 1327 goto out_free_xx;
1254 1328
1255 mutex_init(&ir->ir_lock); 1329 mutex_init(&ir->rx->buf_lock);
1256 mutex_init(&ir->buf_lock); 1330 ir->rx->c = client;
1257 ir->need_boot = 1; 1331 ir->rx->hdpvr_data_fmt =
1258 ir->is_hdpvr = (id->driver_data & ID_FLAG_HDPVR) ? true : false; 1332 (id->driver_data & ID_FLAG_HDPVR) ? true : false;
1259 1333
1260 memcpy(&ir->l, &lirc_template, sizeof(struct lirc_driver)); 1334 /* set lirc_dev stuff */
1261 ir->l.minor = -1; 1335 ir->l.rbuf = &ir->rx->buf;
1336 }
1262 1337
1263 /* I2C attach to device */
1264 i2c_set_clientdata(client, ir); 1338 i2c_set_clientdata(client, ir);
1265 1339
1266 /* initialise RX device */ 1340 /* Proceed only if we have the required Tx and Rx clients ready to go */
1267 if (have_rx) { 1341 if (ir->tx == NULL ||
1268 DECLARE_COMPLETION(tn); 1342 (ir->rx == NULL && !tx_only)) {
1269 memcpy(&ir->c_rx, client, sizeof(struct i2c_client)); 1343 zilog_info("probe of IR %s on %s (i2c-%d) done. Waiting on "
1270 1344 "IR %s.\n", tx_probe ? "Tx" : "Rx", adap->name,
1271 ir->c_rx.addr = 0x71; 1345 adap->nr, tx_probe ? "Rx" : "Tx");
1272 strlcpy(ir->c_rx.name, ZILOG_HAUPPAUGE_IR_RX_NAME, 1346 goto out_ok;
1273 I2C_NAME_SIZE); 1347 }
1274 1348
1349 /* initialise RX device */
1350 if (ir->rx != NULL) {
1275 /* try to fire up polling thread */ 1351 /* try to fire up polling thread */
1276 ir->t_notify = &tn; 1352 ir->rx->task = kthread_run(lirc_thread, ir,
1277 ir->task = kthread_run(lirc_thread, ir, "lirc_zilog"); 1353 "zilog-rx-i2c-%d", adap->nr);
1278 if (IS_ERR(ir->task)) { 1354 if (IS_ERR(ir->rx->task)) {
1279 ret = PTR_ERR(ir->task); 1355 ret = PTR_ERR(ir->rx->task);
1280 zilog_error("lirc_register_driver: cannot run " 1356 zilog_error("%s: could not start IR Rx polling thread"
1281 "poll thread %d\n", ret); 1357 "\n", __func__);
1282 goto err; 1358 goto out_free_xx;
1283 } 1359 }
1284 wait_for_completion(&tn);
1285 ir->t_notify = NULL;
1286 ir->have_rx = 1;
1287 }
1288
1289 /* initialise TX device */
1290 if (have_tx) {
1291 memcpy(&ir->c_tx, client, sizeof(struct i2c_client));
1292 ir->c_tx.addr = 0x70;
1293 strlcpy(ir->c_tx.name, ZILOG_HAUPPAUGE_IR_TX_NAME,
1294 I2C_NAME_SIZE);
1295 ir->have_tx = 1;
1296 } 1360 }
1297 1361
1298 /* set lirc_dev stuff */
1299 ir->l.code_length = 13;
1300 ir->l.rbuf = &ir->buf;
1301 ir->l.fops = &lirc_fops;
1302 ir->l.data = ir;
1303 ir->l.minor = minor;
1304 ir->l.dev = &adap->dev;
1305 ir->l.sample_rate = 0;
1306
1307 /* register with lirc */ 1362 /* register with lirc */
1308 ir->l.minor = lirc_register_driver(&ir->l); 1363 ir->l.minor = lirc_register_driver(&ir->l);
1309 if (ir->l.minor < 0 || ir->l.minor >= MAX_IRCTL_DEVICES) { 1364 if (ir->l.minor < 0 || ir->l.minor >= MAX_IRCTL_DEVICES) {
1310 zilog_error("ir_attach: \"minor\" must be between 0 and %d " 1365 zilog_error("%s: \"minor\" must be between 0 and %d (%d)!\n",
1311 "(%d)!\n", MAX_IRCTL_DEVICES-1, ir->l.minor); 1366 __func__, MAX_IRCTL_DEVICES-1, ir->l.minor);
1312 ret = -EBADRQC; 1367 ret = -EBADRQC;
1313 goto err; 1368 goto out_free_thread;
1314 } 1369 }
1315 1370
1316 /* store this for getting back in open() later on */
1317 ir_devices[ir->l.minor] = ir;
1318
1319 /* 1371 /*
1320 * if we have the tx device, load the 'firmware'. We do this 1372 * if we have the tx device, load the 'firmware'. We do this
1321 * after registering with lirc as otherwise hotplug seems to take 1373 * after registering with lirc as otherwise hotplug seems to take
1322 * 10s to create the lirc device. 1374 * 10s to create the lirc device.
1323 */ 1375 */
1324 if (have_tx) { 1376 ret = tx_init(ir->tx);
1325 /* Special TX init */ 1377 if (ret != 0)
1326 ret = tx_init(ir); 1378 goto out_unregister;
1327 if (ret != 0)
1328 goto err;
1329 }
1330 1379
1380 zilog_info("probe of IR %s on %s (i2c-%d) done. IR unit ready.\n",
1381 tx_probe ? "Tx" : "Rx", adap->name, adap->nr);
1382out_ok:
1383 mutex_unlock(&ir_devices_lock);
1331 return 0; 1384 return 0;
1332 1385
1333err: 1386out_unregister:
1334 /* undo everything, hopefully... */ 1387 lirc_unregister_driver(ir->l.minor);
1335 if (ir->c_rx.addr) 1388out_free_thread:
1336 ir_remove(&ir->c_rx); 1389 destroy_rx_kthread(ir->rx);
1337 if (ir->c_tx.addr) 1390out_free_xx:
1338 ir_remove(&ir->c_tx); 1391 if (ir->rx != NULL) {
1339 return ret; 1392 if (ir->rx->buf.fifo_initialized)
1340 1393 lirc_buffer_free(&ir->rx->buf);
1341out_nodev: 1394 if (ir->rx->c != NULL)
1342 zilog_error("no device found\n"); 1395 i2c_set_clientdata(ir->rx->c, NULL);
1343 return -ENODEV; 1396 kfree(ir->rx);
1344 1397 }
1345out_nomem: 1398 if (ir->tx != NULL) {
1346 zilog_error("memory allocation failure\n"); 1399 if (ir->tx->c != NULL)
1400 i2c_set_clientdata(ir->tx->c, NULL);
1401 kfree(ir->tx);
1402 }
1403out_free_ir:
1404 del_ir_device(ir);
1347 kfree(ir); 1405 kfree(ir);
1348 return -ENOMEM; 1406out_no_ir:
1349} 1407 zilog_error("%s: probing IR %s on %s (i2c-%d) failed with %d\n",
1350 1408 __func__, tx_probe ? "Tx" : "Rx", adap->name, adap->nr,
1351static int ir_command(struct i2c_client *client, unsigned int cmd, void *arg) 1409 ret);
1352{ 1410 mutex_unlock(&ir_devices_lock);
1353 /* nothing */ 1411 return ret;
1354 return 0;
1355} 1412}
1356 1413
1357static int __init zilog_init(void) 1414static int __init zilog_init(void)
@@ -1361,6 +1418,7 @@ static int __init zilog_init(void)
1361 zilog_notify("Zilog/Hauppauge IR driver initializing\n"); 1418 zilog_notify("Zilog/Hauppauge IR driver initializing\n");
1362 1419
1363 mutex_init(&tx_data_lock); 1420 mutex_init(&tx_data_lock);
1421 mutex_init(&ir_devices_lock);
1364 1422
1365 request_module("firmware_class"); 1423 request_module("firmware_class");
1366 1424
@@ -1386,7 +1444,8 @@ module_exit(zilog_exit);
1386 1444
1387MODULE_DESCRIPTION("Zilog/Hauppauge infrared transmitter driver (i2c stack)"); 1445MODULE_DESCRIPTION("Zilog/Hauppauge infrared transmitter driver (i2c stack)");
1388MODULE_AUTHOR("Gerd Knorr, Michal Kochanowicz, Christoph Bartelmus, " 1446MODULE_AUTHOR("Gerd Knorr, Michal Kochanowicz, Christoph Bartelmus, "
1389 "Ulrich Mueller, Stefan Jahn, Jerome Brock, Mark Weaver"); 1447 "Ulrich Mueller, Stefan Jahn, Jerome Brock, Mark Weaver, "
1448 "Andy Walls");
1390MODULE_LICENSE("GPL"); 1449MODULE_LICENSE("GPL");
1391/* for compat with old name, which isn't all that accurate anymore */ 1450/* for compat with old name, which isn't all that accurate anymore */
1392MODULE_ALIAS("lirc_pvr150"); 1451MODULE_ALIAS("lirc_pvr150");
@@ -1397,8 +1456,5 @@ MODULE_PARM_DESC(minor, "Preferred minor device number");
1397module_param(debug, bool, 0644); 1456module_param(debug, bool, 0644);
1398MODULE_PARM_DESC(debug, "Enable debugging messages"); 1457MODULE_PARM_DESC(debug, "Enable debugging messages");
1399 1458
1400module_param(disable_rx, bool, 0644); 1459module_param(tx_only, bool, 0644);
1401MODULE_PARM_DESC(disable_rx, "Disable the IR receiver device"); 1460MODULE_PARM_DESC(tx_only, "Only handle the IR transmit function");
1402
1403module_param(disable_tx, bool, 0644);
1404MODULE_PARM_DESC(disable_tx, "Disable the IR transmitter device");
diff --git a/drivers/staging/tm6000/tm6000-video.c b/drivers/staging/tm6000/tm6000-video.c
index 8fe017c3721f..eb9b9f1bc138 100644
--- a/drivers/staging/tm6000/tm6000-video.c
+++ b/drivers/staging/tm6000/tm6000-video.c
@@ -1450,29 +1450,55 @@ static struct video_device tm6000_template = {
1450 * ------------------------------------------------------------------ 1450 * ------------------------------------------------------------------
1451 */ 1451 */
1452 1452
1453int tm6000_v4l2_register(struct tm6000_core *dev) 1453static struct video_device *vdev_init(struct tm6000_core *dev,
1454 const struct video_device
1455 *template, const char *type_name)
1454{ 1456{
1455 int ret = -1;
1456 struct video_device *vfd; 1457 struct video_device *vfd;
1457 1458
1458 vfd = video_device_alloc(); 1459 vfd = video_device_alloc();
1459 if(!vfd) { 1460 if (NULL == vfd)
1461 return NULL;
1462
1463 *vfd = *template;
1464 vfd->v4l2_dev = &dev->v4l2_dev;
1465 vfd->release = video_device_release;
1466 vfd->debug = tm6000_debug;
1467 vfd->lock = &dev->lock;
1468
1469 snprintf(vfd->name, sizeof(vfd->name), "%s %s", dev->name, type_name);
1470
1471 video_set_drvdata(vfd, dev);
1472 return vfd;
1473}
1474
1475int tm6000_v4l2_register(struct tm6000_core *dev)
1476{
1477 int ret = -1;
1478
1479 dev->vfd = vdev_init(dev, &tm6000_template, "video");
1480
1481 if (!dev->vfd) {
1482 printk(KERN_INFO "%s: can't register video device\n",
1483 dev->name);
1460 return -ENOMEM; 1484 return -ENOMEM;
1461 } 1485 }
1462 dev->vfd = vfd;
1463 1486
1464 /* init video dma queues */ 1487 /* init video dma queues */
1465 INIT_LIST_HEAD(&dev->vidq.active); 1488 INIT_LIST_HEAD(&dev->vidq.active);
1466 INIT_LIST_HEAD(&dev->vidq.queued); 1489 INIT_LIST_HEAD(&dev->vidq.queued);
1467 1490
1468 memcpy(dev->vfd, &tm6000_template, sizeof(*(dev->vfd))); 1491 ret = video_register_device(dev->vfd, VFL_TYPE_GRABBER, video_nr);
1469 dev->vfd->debug = tm6000_debug;
1470 dev->vfd->lock = &dev->lock;
1471 1492
1472 vfd->v4l2_dev = &dev->v4l2_dev; 1493 if (ret < 0) {
1473 video_set_drvdata(vfd, dev); 1494 printk(KERN_INFO "%s: can't register video device\n",
1495 dev->name);
1496 return ret;
1497 }
1498
1499 printk(KERN_INFO "%s: registered device %s\n",
1500 dev->name, video_device_node_name(dev->vfd));
1474 1501
1475 ret = video_register_device(dev->vfd, VFL_TYPE_GRABBER, video_nr);
1476 printk(KERN_INFO "Trident TVMaster TM5600/TM6000/TM6010 USB2 board (Load status: %d)\n", ret); 1502 printk(KERN_INFO "Trident TVMaster TM5600/TM6000/TM6010 USB2 board (Load status: %d)\n", ret);
1477 return ret; 1503 return ret;
1478} 1504}
diff --git a/drivers/tty/Makefile b/drivers/tty/Makefile
index c43ef48b1a0f..396277216e4f 100644
--- a/drivers/tty/Makefile
+++ b/drivers/tty/Makefile
@@ -9,3 +9,5 @@ obj-$(CONFIG_N_GSM) += n_gsm.o
9obj-$(CONFIG_R3964) += n_r3964.o 9obj-$(CONFIG_R3964) += n_r3964.o
10 10
11obj-y += vt/ 11obj-y += vt/
12obj-$(CONFIG_HVC_DRIVER) += hvc/
13obj-y += serial/
diff --git a/drivers/tty/hvc/Makefile b/drivers/tty/hvc/Makefile
new file mode 100644
index 000000000000..e6bed5f177ff
--- /dev/null
+++ b/drivers/tty/hvc/Makefile
@@ -0,0 +1,13 @@
1obj-$(CONFIG_HVC_CONSOLE) += hvc_vio.o hvsi.o
2obj-$(CONFIG_HVC_ISERIES) += hvc_iseries.o
3obj-$(CONFIG_HVC_RTAS) += hvc_rtas.o
4obj-$(CONFIG_HVC_TILE) += hvc_tile.o
5obj-$(CONFIG_HVC_DCC) += hvc_dcc.o
6obj-$(CONFIG_HVC_BEAT) += hvc_beat.o
7obj-$(CONFIG_HVC_DRIVER) += hvc_console.o
8obj-$(CONFIG_HVC_IRQ) += hvc_irq.o
9obj-$(CONFIG_HVC_XEN) += hvc_xen.o
10obj-$(CONFIG_HVC_IUCV) += hvc_iucv.o
11obj-$(CONFIG_HVC_UDBG) += hvc_udbg.o
12obj-$(CONFIG_HVCS) += hvcs.o
13obj-$(CONFIG_VIRTIO_CONSOLE) += virtio_console.o
diff --git a/drivers/char/hvc_beat.c b/drivers/tty/hvc/hvc_beat.c
index 5fe4631e2a61..5fe4631e2a61 100644
--- a/drivers/char/hvc_beat.c
+++ b/drivers/tty/hvc/hvc_beat.c
diff --git a/drivers/char/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index e9cba13ee800..e9cba13ee800 100644
--- a/drivers/char/hvc_console.c
+++ b/drivers/tty/hvc/hvc_console.c
diff --git a/drivers/char/hvc_console.h b/drivers/tty/hvc/hvc_console.h
index 54381eba4e4a..54381eba4e4a 100644
--- a/drivers/char/hvc_console.h
+++ b/drivers/tty/hvc/hvc_console.h
diff --git a/drivers/char/hvc_dcc.c b/drivers/tty/hvc/hvc_dcc.c
index 6470f63deb4b..6470f63deb4b 100644
--- a/drivers/char/hvc_dcc.c
+++ b/drivers/tty/hvc/hvc_dcc.c
diff --git a/drivers/char/hvc_irq.c b/drivers/tty/hvc/hvc_irq.c
index 2623e177e8d6..2623e177e8d6 100644
--- a/drivers/char/hvc_irq.c
+++ b/drivers/tty/hvc/hvc_irq.c
diff --git a/drivers/char/hvc_iseries.c b/drivers/tty/hvc/hvc_iseries.c
index 21c54955084e..21c54955084e 100644
--- a/drivers/char/hvc_iseries.c
+++ b/drivers/tty/hvc/hvc_iseries.c
diff --git a/drivers/char/hvc_iucv.c b/drivers/tty/hvc/hvc_iucv.c
index c3425bb3a1f6..c3425bb3a1f6 100644
--- a/drivers/char/hvc_iucv.c
+++ b/drivers/tty/hvc/hvc_iucv.c
diff --git a/drivers/char/hvc_rtas.c b/drivers/tty/hvc/hvc_rtas.c
index 61c4a61558d9..61c4a61558d9 100644
--- a/drivers/char/hvc_rtas.c
+++ b/drivers/tty/hvc/hvc_rtas.c
diff --git a/drivers/char/hvc_tile.c b/drivers/tty/hvc/hvc_tile.c
index 7a84a0595477..7a84a0595477 100644
--- a/drivers/char/hvc_tile.c
+++ b/drivers/tty/hvc/hvc_tile.c
diff --git a/drivers/char/hvc_udbg.c b/drivers/tty/hvc/hvc_udbg.c
index b0957e61a7be..b0957e61a7be 100644
--- a/drivers/char/hvc_udbg.c
+++ b/drivers/tty/hvc/hvc_udbg.c
diff --git a/drivers/char/hvc_vio.c b/drivers/tty/hvc/hvc_vio.c
index 5e2f52b33327..5e2f52b33327 100644
--- a/drivers/char/hvc_vio.c
+++ b/drivers/tty/hvc/hvc_vio.c
diff --git a/drivers/char/hvc_xen.c b/drivers/tty/hvc/hvc_xen.c
index 3740e327f180..3740e327f180 100644
--- a/drivers/char/hvc_xen.c
+++ b/drivers/tty/hvc/hvc_xen.c
diff --git a/drivers/char/hvcs.c b/drivers/tty/hvc/hvcs.c
index bedc6c1b6fa5..bedc6c1b6fa5 100644
--- a/drivers/char/hvcs.c
+++ b/drivers/tty/hvc/hvcs.c
diff --git a/drivers/char/hvsi.c b/drivers/tty/hvc/hvsi.c
index 67a75a502c01..67a75a502c01 100644
--- a/drivers/char/hvsi.c
+++ b/drivers/tty/hvc/hvsi.c
diff --git a/drivers/char/virtio_console.c b/drivers/tty/hvc/virtio_console.c
index 896a2ced1d27..896a2ced1d27 100644
--- a/drivers/char/virtio_console.c
+++ b/drivers/tty/hvc/virtio_console.c
diff --git a/drivers/serial/21285.c b/drivers/tty/serial/21285.c
index d89aa38c5cf0..d89aa38c5cf0 100644
--- a/drivers/serial/21285.c
+++ b/drivers/tty/serial/21285.c
diff --git a/drivers/serial/68328serial.c b/drivers/tty/serial/68328serial.c
index be0ebce36e54..be0ebce36e54 100644
--- a/drivers/serial/68328serial.c
+++ b/drivers/tty/serial/68328serial.c
diff --git a/drivers/serial/68328serial.h b/drivers/tty/serial/68328serial.h
index 664ceb0a158c..664ceb0a158c 100644
--- a/drivers/serial/68328serial.h
+++ b/drivers/tty/serial/68328serial.h
diff --git a/drivers/serial/68360serial.c b/drivers/tty/serial/68360serial.c
index 88b13356ec10..88b13356ec10 100644
--- a/drivers/serial/68360serial.c
+++ b/drivers/tty/serial/68360serial.c
diff --git a/drivers/serial/8250.c b/drivers/tty/serial/8250.c
index b25e6e490530..b25e6e490530 100644
--- a/drivers/serial/8250.c
+++ b/drivers/tty/serial/8250.c
diff --git a/drivers/serial/8250.h b/drivers/tty/serial/8250.h
index 6e19ea3e48d5..6e19ea3e48d5 100644
--- a/drivers/serial/8250.h
+++ b/drivers/tty/serial/8250.h
diff --git a/drivers/serial/8250_accent.c b/drivers/tty/serial/8250_accent.c
index 9c10262f2469..9c10262f2469 100644
--- a/drivers/serial/8250_accent.c
+++ b/drivers/tty/serial/8250_accent.c
diff --git a/drivers/serial/8250_acorn.c b/drivers/tty/serial/8250_acorn.c
index b0ce8c56f1a4..b0ce8c56f1a4 100644
--- a/drivers/serial/8250_acorn.c
+++ b/drivers/tty/serial/8250_acorn.c
diff --git a/drivers/serial/8250_boca.c b/drivers/tty/serial/8250_boca.c
index 3bfe0f7b26fb..3bfe0f7b26fb 100644
--- a/drivers/serial/8250_boca.c
+++ b/drivers/tty/serial/8250_boca.c
diff --git a/drivers/serial/8250_early.c b/drivers/tty/serial/8250_early.c
index eaafb98debed..eaafb98debed 100644
--- a/drivers/serial/8250_early.c
+++ b/drivers/tty/serial/8250_early.c
diff --git a/drivers/serial/8250_exar_st16c554.c b/drivers/tty/serial/8250_exar_st16c554.c
index 567143ace159..567143ace159 100644
--- a/drivers/serial/8250_exar_st16c554.c
+++ b/drivers/tty/serial/8250_exar_st16c554.c
diff --git a/drivers/serial/8250_fourport.c b/drivers/tty/serial/8250_fourport.c
index 6375d68b7913..6375d68b7913 100644
--- a/drivers/serial/8250_fourport.c
+++ b/drivers/tty/serial/8250_fourport.c
diff --git a/drivers/serial/8250_gsc.c b/drivers/tty/serial/8250_gsc.c
index d8c0ffbfa6e3..d8c0ffbfa6e3 100644
--- a/drivers/serial/8250_gsc.c
+++ b/drivers/tty/serial/8250_gsc.c
diff --git a/drivers/serial/8250_hp300.c b/drivers/tty/serial/8250_hp300.c
index c13438c93012..c13438c93012 100644
--- a/drivers/serial/8250_hp300.c
+++ b/drivers/tty/serial/8250_hp300.c
diff --git a/drivers/serial/8250_hub6.c b/drivers/tty/serial/8250_hub6.c
index 7609150e7d5e..7609150e7d5e 100644
--- a/drivers/serial/8250_hub6.c
+++ b/drivers/tty/serial/8250_hub6.c
diff --git a/drivers/serial/8250_mca.c b/drivers/tty/serial/8250_mca.c
index d10be944ad44..d10be944ad44 100644
--- a/drivers/serial/8250_mca.c
+++ b/drivers/tty/serial/8250_mca.c
diff --git a/drivers/serial/8250_pci.c b/drivers/tty/serial/8250_pci.c
index 8b8930f700b5..8b8930f700b5 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/tty/serial/8250_pci.c
diff --git a/drivers/serial/8250_pnp.c b/drivers/tty/serial/8250_pnp.c
index 4822cb50cd0f..4822cb50cd0f 100644
--- a/drivers/serial/8250_pnp.c
+++ b/drivers/tty/serial/8250_pnp.c
diff --git a/drivers/serial/Kconfig b/drivers/tty/serial/Kconfig
index c1df7676a73d..b1682d7f1d8a 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -81,7 +81,7 @@ config SERIAL_8250_GSC
81 default SERIAL_8250 81 default SERIAL_8250
82 82
83config SERIAL_8250_PCI 83config SERIAL_8250_PCI
84 tristate "8250/16550 PCI device support" if EMBEDDED 84 tristate "8250/16550 PCI device support" if EXPERT
85 depends on SERIAL_8250 && PCI 85 depends on SERIAL_8250 && PCI
86 default SERIAL_8250 86 default SERIAL_8250
87 help 87 help
@@ -90,7 +90,7 @@ config SERIAL_8250_PCI
90 Saves about 9K. 90 Saves about 9K.
91 91
92config SERIAL_8250_PNP 92config SERIAL_8250_PNP
93 tristate "8250/16550 PNP device support" if EMBEDDED 93 tristate "8250/16550 PNP device support" if EXPERT
94 depends on SERIAL_8250 && PNP 94 depends on SERIAL_8250 && PNP
95 default SERIAL_8250 95 default SERIAL_8250
96 help 96 help
diff --git a/drivers/serial/Makefile b/drivers/tty/serial/Makefile
index 8ea92e9c73b0..8ea92e9c73b0 100644
--- a/drivers/serial/Makefile
+++ b/drivers/tty/serial/Makefile
diff --git a/drivers/serial/altera_jtaguart.c b/drivers/tty/serial/altera_jtaguart.c
index f9b49b5ff5e1..f9b49b5ff5e1 100644
--- a/drivers/serial/altera_jtaguart.c
+++ b/drivers/tty/serial/altera_jtaguart.c
diff --git a/drivers/serial/altera_uart.c b/drivers/tty/serial/altera_uart.c
index 721216292a50..721216292a50 100644
--- a/drivers/serial/altera_uart.c
+++ b/drivers/tty/serial/altera_uart.c
diff --git a/drivers/serial/amba-pl010.c b/drivers/tty/serial/amba-pl010.c
index 2904aa044126..2904aa044126 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/tty/serial/amba-pl010.c
diff --git a/drivers/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index e76d7d000128..e76d7d000128 100644
--- a/drivers/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
diff --git a/drivers/serial/apbuart.c b/drivers/tty/serial/apbuart.c
index 095a5d562618..095a5d562618 100644
--- a/drivers/serial/apbuart.c
+++ b/drivers/tty/serial/apbuart.c
diff --git a/drivers/serial/apbuart.h b/drivers/tty/serial/apbuart.h
index 5faf87c8d2bc..5faf87c8d2bc 100644
--- a/drivers/serial/apbuart.h
+++ b/drivers/tty/serial/apbuart.h
diff --git a/drivers/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 2a1d52fb4936..2a1d52fb4936 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
diff --git a/drivers/serial/bcm63xx_uart.c b/drivers/tty/serial/bcm63xx_uart.c
index a1a0e55d0807..a1a0e55d0807 100644
--- a/drivers/serial/bcm63xx_uart.c
+++ b/drivers/tty/serial/bcm63xx_uart.c
diff --git a/drivers/serial/bfin_5xx.c b/drivers/tty/serial/bfin_5xx.c
index e381b895b04d..e381b895b04d 100644
--- a/drivers/serial/bfin_5xx.c
+++ b/drivers/tty/serial/bfin_5xx.c
diff --git a/drivers/serial/bfin_sport_uart.c b/drivers/tty/serial/bfin_sport_uart.c
index e95c524d9d18..e95c524d9d18 100644
--- a/drivers/serial/bfin_sport_uart.c
+++ b/drivers/tty/serial/bfin_sport_uart.c
diff --git a/drivers/serial/bfin_sport_uart.h b/drivers/tty/serial/bfin_sport_uart.h
index 6d06ce1d5675..6d06ce1d5675 100644
--- a/drivers/serial/bfin_sport_uart.h
+++ b/drivers/tty/serial/bfin_sport_uart.h
diff --git a/drivers/serial/clps711x.c b/drivers/tty/serial/clps711x.c
index b6acd19b458e..b6acd19b458e 100644
--- a/drivers/serial/clps711x.c
+++ b/drivers/tty/serial/clps711x.c
diff --git a/drivers/serial/cpm_uart/Makefile b/drivers/tty/serial/cpm_uart/Makefile
index e072724ea754..e072724ea754 100644
--- a/drivers/serial/cpm_uart/Makefile
+++ b/drivers/tty/serial/cpm_uart/Makefile
diff --git a/drivers/serial/cpm_uart/cpm_uart.h b/drivers/tty/serial/cpm_uart/cpm_uart.h
index b754dcf0fda5..b754dcf0fda5 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/tty/serial/cpm_uart/cpm_uart.h
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
index 8692ff98fc07..8692ff98fc07 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_core.c
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
index 3fc1d66e32c6..3fc1d66e32c6 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.c
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.h b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h
index 10eecd6af6d4..10eecd6af6d4 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.h
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm1.h
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
index 814ac006393f..814ac006393f 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.c
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.h b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h
index 7194c63dcf5f..7194c63dcf5f 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.h
+++ b/drivers/tty/serial/cpm_uart/cpm_uart_cpm2.h
diff --git a/drivers/serial/crisv10.c b/drivers/tty/serial/crisv10.c
index bcc31f2140ac..bcc31f2140ac 100644
--- a/drivers/serial/crisv10.c
+++ b/drivers/tty/serial/crisv10.c
diff --git a/drivers/serial/crisv10.h b/drivers/tty/serial/crisv10.h
index ea0beb46a10d..ea0beb46a10d 100644
--- a/drivers/serial/crisv10.h
+++ b/drivers/tty/serial/crisv10.h
diff --git a/drivers/serial/dz.c b/drivers/tty/serial/dz.c
index 57421d776329..57421d776329 100644
--- a/drivers/serial/dz.c
+++ b/drivers/tty/serial/dz.c
diff --git a/drivers/serial/dz.h b/drivers/tty/serial/dz.h
index faf169ed27b3..faf169ed27b3 100644
--- a/drivers/serial/dz.h
+++ b/drivers/tty/serial/dz.h
diff --git a/drivers/serial/icom.c b/drivers/tty/serial/icom.c
index 53a468227056..53a468227056 100644
--- a/drivers/serial/icom.c
+++ b/drivers/tty/serial/icom.c
diff --git a/drivers/serial/icom.h b/drivers/tty/serial/icom.h
index c8029e0025c9..c8029e0025c9 100644
--- a/drivers/serial/icom.h
+++ b/drivers/tty/serial/icom.h
diff --git a/drivers/serial/ifx6x60.c b/drivers/tty/serial/ifx6x60.c
index ab93763862d5..ab93763862d5 100644
--- a/drivers/serial/ifx6x60.c
+++ b/drivers/tty/serial/ifx6x60.c
diff --git a/drivers/serial/ifx6x60.h b/drivers/tty/serial/ifx6x60.h
index deb7b8d977dc..deb7b8d977dc 100644
--- a/drivers/serial/ifx6x60.h
+++ b/drivers/tty/serial/ifx6x60.h
diff --git a/drivers/serial/imx.c b/drivers/tty/serial/imx.c
index dfcf4b1878aa..dfcf4b1878aa 100644
--- a/drivers/serial/imx.c
+++ b/drivers/tty/serial/imx.c
diff --git a/drivers/serial/ioc3_serial.c b/drivers/tty/serial/ioc3_serial.c
index ee43efc7bdcc..ee43efc7bdcc 100644
--- a/drivers/serial/ioc3_serial.c
+++ b/drivers/tty/serial/ioc3_serial.c
diff --git a/drivers/serial/ioc4_serial.c b/drivers/tty/serial/ioc4_serial.c
index fcfe82653ac8..fcfe82653ac8 100644
--- a/drivers/serial/ioc4_serial.c
+++ b/drivers/tty/serial/ioc4_serial.c
diff --git a/drivers/serial/ip22zilog.c b/drivers/tty/serial/ip22zilog.c
index ebff4a1d4bcc..ebff4a1d4bcc 100644
--- a/drivers/serial/ip22zilog.c
+++ b/drivers/tty/serial/ip22zilog.c
diff --git a/drivers/serial/ip22zilog.h b/drivers/tty/serial/ip22zilog.h
index a59a9a8341d2..a59a9a8341d2 100644
--- a/drivers/serial/ip22zilog.h
+++ b/drivers/tty/serial/ip22zilog.h
diff --git a/drivers/serial/jsm/Makefile b/drivers/tty/serial/jsm/Makefile
index e46b6e0f8b18..e46b6e0f8b18 100644
--- a/drivers/serial/jsm/Makefile
+++ b/drivers/tty/serial/jsm/Makefile
diff --git a/drivers/serial/jsm/jsm.h b/drivers/tty/serial/jsm/jsm.h
index 38a509c684cd..38a509c684cd 100644
--- a/drivers/serial/jsm/jsm.h
+++ b/drivers/tty/serial/jsm/jsm.h
diff --git a/drivers/serial/jsm/jsm_driver.c b/drivers/tty/serial/jsm/jsm_driver.c
index 18f548449c63..18f548449c63 100644
--- a/drivers/serial/jsm/jsm_driver.c
+++ b/drivers/tty/serial/jsm/jsm_driver.c
diff --git a/drivers/serial/jsm/jsm_neo.c b/drivers/tty/serial/jsm/jsm_neo.c
index 7960d9633c15..7960d9633c15 100644
--- a/drivers/serial/jsm/jsm_neo.c
+++ b/drivers/tty/serial/jsm/jsm_neo.c
diff --git a/drivers/serial/jsm/jsm_tty.c b/drivers/tty/serial/jsm/jsm_tty.c
index 7a4a914ecff0..7a4a914ecff0 100644
--- a/drivers/serial/jsm/jsm_tty.c
+++ b/drivers/tty/serial/jsm/jsm_tty.c
diff --git a/drivers/serial/kgdboc.c b/drivers/tty/serial/kgdboc.c
index 25a8bc565f40..25a8bc565f40 100644
--- a/drivers/serial/kgdboc.c
+++ b/drivers/tty/serial/kgdboc.c
diff --git a/drivers/serial/m32r_sio.c b/drivers/tty/serial/m32r_sio.c
index bea5c215460c..bea5c215460c 100644
--- a/drivers/serial/m32r_sio.c
+++ b/drivers/tty/serial/m32r_sio.c
diff --git a/drivers/serial/m32r_sio.h b/drivers/tty/serial/m32r_sio.h
index e9b7e11793b1..e9b7e11793b1 100644
--- a/drivers/serial/m32r_sio.h
+++ b/drivers/tty/serial/m32r_sio.h
diff --git a/drivers/serial/m32r_sio_reg.h b/drivers/tty/serial/m32r_sio_reg.h
index 4671473793e3..4671473793e3 100644
--- a/drivers/serial/m32r_sio_reg.h
+++ b/drivers/tty/serial/m32r_sio_reg.h
diff --git a/drivers/serial/max3100.c b/drivers/tty/serial/max3100.c
index beb1afa27d8d..beb1afa27d8d 100644
--- a/drivers/serial/max3100.c
+++ b/drivers/tty/serial/max3100.c
diff --git a/drivers/serial/max3107-aava.c b/drivers/tty/serial/max3107-aava.c
index a1fe304f2f52..a1fe304f2f52 100644
--- a/drivers/serial/max3107-aava.c
+++ b/drivers/tty/serial/max3107-aava.c
diff --git a/drivers/serial/max3107.c b/drivers/tty/serial/max3107.c
index 910870edf708..910870edf708 100644
--- a/drivers/serial/max3107.c
+++ b/drivers/tty/serial/max3107.c
diff --git a/drivers/serial/max3107.h b/drivers/tty/serial/max3107.h
index 7ab632392502..7ab632392502 100644
--- a/drivers/serial/max3107.h
+++ b/drivers/tty/serial/max3107.h
diff --git a/drivers/serial/mcf.c b/drivers/tty/serial/mcf.c
index 3394b7cc1722..3394b7cc1722 100644
--- a/drivers/serial/mcf.c
+++ b/drivers/tty/serial/mcf.c
diff --git a/drivers/serial/mfd.c b/drivers/tty/serial/mfd.c
index d40010a22ecd..d40010a22ecd 100644
--- a/drivers/serial/mfd.c
+++ b/drivers/tty/serial/mfd.c
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/tty/serial/mpc52xx_uart.c
index 126ec7f568ec..126ec7f568ec 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
diff --git a/drivers/serial/mpsc.c b/drivers/tty/serial/mpsc.c
index 6a9c6605666a..6a9c6605666a 100644
--- a/drivers/serial/mpsc.c
+++ b/drivers/tty/serial/mpsc.c
diff --git a/drivers/serial/mrst_max3110.c b/drivers/tty/serial/mrst_max3110.c
index b62857bf2fdb..b62857bf2fdb 100644
--- a/drivers/serial/mrst_max3110.c
+++ b/drivers/tty/serial/mrst_max3110.c
diff --git a/drivers/serial/mrst_max3110.h b/drivers/tty/serial/mrst_max3110.h
index d1ef43af397c..d1ef43af397c 100644
--- a/drivers/serial/mrst_max3110.h
+++ b/drivers/tty/serial/mrst_max3110.h
diff --git a/drivers/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index 8e43a7b69e64..8e43a7b69e64 100644
--- a/drivers/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
diff --git a/drivers/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h
index f6ca9ca79e98..f6ca9ca79e98 100644
--- a/drivers/serial/msm_serial.h
+++ b/drivers/tty/serial/msm_serial.h
diff --git a/drivers/serial/mux.c b/drivers/tty/serial/mux.c
index 9711e06a8374..9711e06a8374 100644
--- a/drivers/serial/mux.c
+++ b/drivers/tty/serial/mux.c
diff --git a/drivers/serial/netx-serial.c b/drivers/tty/serial/netx-serial.c
index 7735c9f35fa0..7735c9f35fa0 100644
--- a/drivers/serial/netx-serial.c
+++ b/drivers/tty/serial/netx-serial.c
diff --git a/drivers/serial/nwpserial.c b/drivers/tty/serial/nwpserial.c
index de173671e3d0..de173671e3d0 100644
--- a/drivers/serial/nwpserial.c
+++ b/drivers/tty/serial/nwpserial.c
diff --git a/drivers/serial/of_serial.c b/drivers/tty/serial/of_serial.c
index 5c7abe4c94dd..5c7abe4c94dd 100644
--- a/drivers/serial/of_serial.c
+++ b/drivers/tty/serial/of_serial.c
diff --git a/drivers/serial/omap-serial.c b/drivers/tty/serial/omap-serial.c
index 7f2f01058789..7f2f01058789 100644
--- a/drivers/serial/omap-serial.c
+++ b/drivers/tty/serial/omap-serial.c
diff --git a/drivers/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 70a61458ec42..70a61458ec42 100644
--- a/drivers/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
diff --git a/drivers/serial/pmac_zilog.c b/drivers/tty/serial/pmac_zilog.c
index 5b9cde79e4ea..5b9cde79e4ea 100644
--- a/drivers/serial/pmac_zilog.c
+++ b/drivers/tty/serial/pmac_zilog.c
diff --git a/drivers/serial/pmac_zilog.h b/drivers/tty/serial/pmac_zilog.h
index cbc34fbb1b20..cbc34fbb1b20 100644
--- a/drivers/serial/pmac_zilog.h
+++ b/drivers/tty/serial/pmac_zilog.h
diff --git a/drivers/serial/pnx8xxx_uart.c b/drivers/tty/serial/pnx8xxx_uart.c
index 0aa75a97531c..0aa75a97531c 100644
--- a/drivers/serial/pnx8xxx_uart.c
+++ b/drivers/tty/serial/pnx8xxx_uart.c
diff --git a/drivers/serial/pxa.c b/drivers/tty/serial/pxa.c
index 1102a39b44f5..1102a39b44f5 100644
--- a/drivers/serial/pxa.c
+++ b/drivers/tty/serial/pxa.c
diff --git a/drivers/serial/s3c2400.c b/drivers/tty/serial/s3c2400.c
index fed1a9a1ffb4..fed1a9a1ffb4 100644
--- a/drivers/serial/s3c2400.c
+++ b/drivers/tty/serial/s3c2400.c
diff --git a/drivers/serial/s3c2410.c b/drivers/tty/serial/s3c2410.c
index 73f089d3efd6..73f089d3efd6 100644
--- a/drivers/serial/s3c2410.c
+++ b/drivers/tty/serial/s3c2410.c
diff --git a/drivers/serial/s3c2412.c b/drivers/tty/serial/s3c2412.c
index 1700b1a2fb7e..1700b1a2fb7e 100644
--- a/drivers/serial/s3c2412.c
+++ b/drivers/tty/serial/s3c2412.c
diff --git a/drivers/serial/s3c2440.c b/drivers/tty/serial/s3c2440.c
index 094cc3904b13..094cc3904b13 100644
--- a/drivers/serial/s3c2440.c
+++ b/drivers/tty/serial/s3c2440.c
diff --git a/drivers/serial/s3c24a0.c b/drivers/tty/serial/s3c24a0.c
index fad6083ca427..fad6083ca427 100644
--- a/drivers/serial/s3c24a0.c
+++ b/drivers/tty/serial/s3c24a0.c
diff --git a/drivers/serial/s3c6400.c b/drivers/tty/serial/s3c6400.c
index 4be92ab50058..4be92ab50058 100644
--- a/drivers/serial/s3c6400.c
+++ b/drivers/tty/serial/s3c6400.c
diff --git a/drivers/serial/s5pv210.c b/drivers/tty/serial/s5pv210.c
index 6ebccd70a707..6ebccd70a707 100644
--- a/drivers/serial/s5pv210.c
+++ b/drivers/tty/serial/s5pv210.c
diff --git a/drivers/serial/sa1100.c b/drivers/tty/serial/sa1100.c
index 2199d819a987..2199d819a987 100644
--- a/drivers/serial/sa1100.c
+++ b/drivers/tty/serial/sa1100.c
diff --git a/drivers/serial/samsung.c b/drivers/tty/serial/samsung.c
index 2335edafe903..2335edafe903 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
diff --git a/drivers/serial/samsung.h b/drivers/tty/serial/samsung.h
index 0ac06a07d25f..0ac06a07d25f 100644
--- a/drivers/serial/samsung.h
+++ b/drivers/tty/serial/samsung.h
diff --git a/drivers/serial/sb1250-duart.c b/drivers/tty/serial/sb1250-duart.c
index a2f2b3254499..a2f2b3254499 100644
--- a/drivers/serial/sb1250-duart.c
+++ b/drivers/tty/serial/sb1250-duart.c
diff --git a/drivers/serial/sc26xx.c b/drivers/tty/serial/sc26xx.c
index 75038ad2b242..75038ad2b242 100644
--- a/drivers/serial/sc26xx.c
+++ b/drivers/tty/serial/sc26xx.c
diff --git a/drivers/serial/serial_core.c b/drivers/tty/serial/serial_core.c
index 460a72d91bb7..460a72d91bb7 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/tty/serial/serial_core.c
diff --git a/drivers/serial/serial_cs.c b/drivers/tty/serial/serial_cs.c
index 93760b2ea172..93760b2ea172 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/tty/serial/serial_cs.c
diff --git a/drivers/serial/serial_ks8695.c b/drivers/tty/serial/serial_ks8695.c
index b1962025b1aa..b1962025b1aa 100644
--- a/drivers/serial/serial_ks8695.c
+++ b/drivers/tty/serial/serial_ks8695.c
diff --git a/drivers/serial/serial_lh7a40x.c b/drivers/tty/serial/serial_lh7a40x.c
index ea744707c4d6..ea744707c4d6 100644
--- a/drivers/serial/serial_lh7a40x.c
+++ b/drivers/tty/serial/serial_lh7a40x.c
diff --git a/drivers/serial/serial_txx9.c b/drivers/tty/serial/serial_txx9.c
index c50e9fbbf743..c50e9fbbf743 100644
--- a/drivers/serial/serial_txx9.c
+++ b/drivers/tty/serial/serial_txx9.c
diff --git a/drivers/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index 92c91c83edde..92c91c83edde 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
diff --git a/drivers/serial/sh-sci.h b/drivers/tty/serial/sh-sci.h
index b223d6cbf33a..b223d6cbf33a 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/tty/serial/sh-sci.h
diff --git a/drivers/serial/sn_console.c b/drivers/tty/serial/sn_console.c
index cff9a306660f..cff9a306660f 100644
--- a/drivers/serial/sn_console.c
+++ b/drivers/tty/serial/sn_console.c
diff --git a/drivers/serial/suncore.c b/drivers/tty/serial/suncore.c
index 6381a0282ee7..6381a0282ee7 100644
--- a/drivers/serial/suncore.c
+++ b/drivers/tty/serial/suncore.c
diff --git a/drivers/serial/suncore.h b/drivers/tty/serial/suncore.h
index db2057936c31..db2057936c31 100644
--- a/drivers/serial/suncore.h
+++ b/drivers/tty/serial/suncore.h
diff --git a/drivers/serial/sunhv.c b/drivers/tty/serial/sunhv.c
index c9014868297d..c9014868297d 100644
--- a/drivers/serial/sunhv.c
+++ b/drivers/tty/serial/sunhv.c
diff --git a/drivers/serial/sunsab.c b/drivers/tty/serial/sunsab.c
index 5b246b18f42f..5b246b18f42f 100644
--- a/drivers/serial/sunsab.c
+++ b/drivers/tty/serial/sunsab.c
diff --git a/drivers/serial/sunsab.h b/drivers/tty/serial/sunsab.h
index b78e1f7b8050..b78e1f7b8050 100644
--- a/drivers/serial/sunsab.h
+++ b/drivers/tty/serial/sunsab.h
diff --git a/drivers/serial/sunsu.c b/drivers/tty/serial/sunsu.c
index 551ebfe3ccbb..551ebfe3ccbb 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/tty/serial/sunsu.c
diff --git a/drivers/serial/sunzilog.c b/drivers/tty/serial/sunzilog.c
index c1967ac1c07f..c1967ac1c07f 100644
--- a/drivers/serial/sunzilog.c
+++ b/drivers/tty/serial/sunzilog.c
diff --git a/drivers/serial/sunzilog.h b/drivers/tty/serial/sunzilog.h
index 5dec7b47cc38..5dec7b47cc38 100644
--- a/drivers/serial/sunzilog.h
+++ b/drivers/tty/serial/sunzilog.h
diff --git a/drivers/serial/timbuart.c b/drivers/tty/serial/timbuart.c
index 1f36b7eb7351..1f36b7eb7351 100644
--- a/drivers/serial/timbuart.c
+++ b/drivers/tty/serial/timbuart.c
diff --git a/drivers/serial/timbuart.h b/drivers/tty/serial/timbuart.h
index 7e566766bc43..7e566766bc43 100644
--- a/drivers/serial/timbuart.h
+++ b/drivers/tty/serial/timbuart.h
diff --git a/drivers/serial/uartlite.c b/drivers/tty/serial/uartlite.c
index d2fce865b731..d2fce865b731 100644
--- a/drivers/serial/uartlite.c
+++ b/drivers/tty/serial/uartlite.c
diff --git a/drivers/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c
index 3f4848e2174a..3f4848e2174a 100644
--- a/drivers/serial/ucc_uart.c
+++ b/drivers/tty/serial/ucc_uart.c
diff --git a/drivers/serial/vr41xx_siu.c b/drivers/tty/serial/vr41xx_siu.c
index 3beb6ab4fa68..3beb6ab4fa68 100644
--- a/drivers/serial/vr41xx_siu.c
+++ b/drivers/tty/serial/vr41xx_siu.c
diff --git a/drivers/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c
index 322bf56c0d89..322bf56c0d89 100644
--- a/drivers/serial/vt8500_serial.c
+++ b/drivers/tty/serial/vt8500_serial.c
diff --git a/drivers/serial/zs.c b/drivers/tty/serial/zs.c
index 1a7fd3e70315..1a7fd3e70315 100644
--- a/drivers/serial/zs.c
+++ b/drivers/tty/serial/zs.c
diff --git a/drivers/serial/zs.h b/drivers/tty/serial/zs.h
index aa921b57d827..aa921b57d827 100644
--- a/drivers/serial/zs.h
+++ b/drivers/tty/serial/zs.h
diff --git a/drivers/usb/core/Kconfig b/drivers/usb/core/Kconfig
index bcc24779ba0e..18d02e32a3d5 100644
--- a/drivers/usb/core/Kconfig
+++ b/drivers/usb/core/Kconfig
@@ -123,9 +123,9 @@ config USB_OTG
123 123
124config USB_OTG_WHITELIST 124config USB_OTG_WHITELIST
125 bool "Rely on OTG Targeted Peripherals List" 125 bool "Rely on OTG Targeted Peripherals List"
126 depends on USB_OTG || EMBEDDED 126 depends on USB_OTG || EXPERT
127 default y if USB_OTG 127 default y if USB_OTG
128 default n if EMBEDDED 128 default n if EXPERT
129 help 129 help
130 If you say Y here, the "otg_whitelist.h" file will be used as a 130 If you say Y here, the "otg_whitelist.h" file will be used as a
131 product whitelist, so USB peripherals not listed there will be 131 product whitelist, so USB peripherals not listed there will be
@@ -141,7 +141,7 @@ config USB_OTG_WHITELIST
141 141
142config USB_OTG_BLACKLIST_HUB 142config USB_OTG_BLACKLIST_HUB
143 bool "Disable external hubs" 143 bool "Disable external hubs"
144 depends on USB_OTG || EMBEDDED 144 depends on USB_OTG || EXPERT
145 help 145 help
146 If you say Y here, then Linux will refuse to enumerate 146 If you say Y here, then Linux will refuse to enumerate
147 external hubs. OTG hosts are allowed to reduce hardware 147 external hubs. OTG hosts are allowed to reduce hardware
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index d916ac04abab..6bafb51bb437 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -1227,7 +1227,7 @@ config FB_CARILLO_RANCH
1227 1227
1228config FB_INTEL 1228config FB_INTEL
1229 tristate "Intel 830M/845G/852GM/855GM/865G/915G/945G/945GM/965G/965GM support (EXPERIMENTAL)" 1229 tristate "Intel 830M/845G/852GM/855GM/865G/915G/945G/945GM/965G/965GM support (EXPERIMENTAL)"
1230 depends on EXPERIMENTAL && FB && PCI && X86 && AGP_INTEL && EMBEDDED 1230 depends on EXPERIMENTAL && FB && PCI && X86 && AGP_INTEL && EXPERT
1231 select FB_MODE_HELPERS 1231 select FB_MODE_HELPERS
1232 select FB_CFB_FILLRECT 1232 select FB_CFB_FILLRECT
1233 select FB_CFB_COPYAREA 1233 select FB_CFB_COPYAREA
diff --git a/drivers/video/backlight/88pm860x_bl.c b/drivers/video/backlight/88pm860x_bl.c
index c789c46e38af..b224396b86d5 100644
--- a/drivers/video/backlight/88pm860x_bl.c
+++ b/drivers/video/backlight/88pm860x_bl.c
@@ -21,7 +21,7 @@
21#define MAX_BRIGHTNESS (0xFF) 21#define MAX_BRIGHTNESS (0xFF)
22#define MIN_BRIGHTNESS (0) 22#define MIN_BRIGHTNESS (0)
23 23
24#define CURRENT_MASK (0x1F << 1) 24#define CURRENT_BITMASK (0x1F << 1)
25 25
26struct pm860x_backlight_data { 26struct pm860x_backlight_data {
27 struct pm860x_chip *chip; 27 struct pm860x_chip *chip;
@@ -85,7 +85,7 @@ static int pm860x_backlight_set(struct backlight_device *bl, int brightness)
85 if ((data->current_brightness == 0) && brightness) { 85 if ((data->current_brightness == 0) && brightness) {
86 if (data->iset) { 86 if (data->iset) {
87 ret = pm860x_set_bits(data->i2c, wled_idc(data->port), 87 ret = pm860x_set_bits(data->i2c, wled_idc(data->port),
88 CURRENT_MASK, data->iset); 88 CURRENT_BITMASK, data->iset);
89 if (ret < 0) 89 if (ret < 0)
90 goto out; 90 goto out;
91 } 91 }
diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig
index 5a35f22372b9..2209e354f531 100644
--- a/drivers/video/console/Kconfig
+++ b/drivers/video/console/Kconfig
@@ -5,7 +5,7 @@
5menu "Console display driver support" 5menu "Console display driver support"
6 6
7config VGA_CONSOLE 7config VGA_CONSOLE
8 bool "VGA text console" if EMBEDDED || !X86 8 bool "VGA text console" if EXPERT || !X86
9 depends on !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !SUPERH && !BLACKFIN && !AVR32 && !MN10300 && (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER) 9 depends on !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !SUPERH && !BLACKFIN && !AVR32 && !MN10300 && (!ARM || ARCH_FOOTBRIDGE || ARCH_INTEGRATOR || ARCH_NETWINDER)
10 default y 10 default y
11 help 11 help
diff --git a/drivers/virtio/virtio_pci.c b/drivers/virtio/virtio_pci.c
index ef8d9d558fc7..4fb5b2bf2348 100644
--- a/drivers/virtio/virtio_pci.c
+++ b/drivers/virtio/virtio_pci.c
@@ -96,11 +96,6 @@ static struct pci_device_id virtio_pci_id_table[] = {
96 96
97MODULE_DEVICE_TABLE(pci, virtio_pci_id_table); 97MODULE_DEVICE_TABLE(pci, virtio_pci_id_table);
98 98
99/* A PCI device has it's own struct device and so does a virtio device so
100 * we create a place for the virtio devices to show up in sysfs. I think it
101 * would make more sense for virtio to not insist on having it's own device. */
102static struct device *virtio_pci_root;
103
104/* Convert a generic virtio device to our structure */ 99/* Convert a generic virtio device to our structure */
105static struct virtio_pci_device *to_vp_device(struct virtio_device *vdev) 100static struct virtio_pci_device *to_vp_device(struct virtio_device *vdev)
106{ 101{
@@ -629,7 +624,7 @@ static int __devinit virtio_pci_probe(struct pci_dev *pci_dev,
629 if (vp_dev == NULL) 624 if (vp_dev == NULL)
630 return -ENOMEM; 625 return -ENOMEM;
631 626
632 vp_dev->vdev.dev.parent = virtio_pci_root; 627 vp_dev->vdev.dev.parent = &pci_dev->dev;
633 vp_dev->vdev.dev.release = virtio_pci_release_dev; 628 vp_dev->vdev.dev.release = virtio_pci_release_dev;
634 vp_dev->vdev.config = &virtio_pci_config_ops; 629 vp_dev->vdev.config = &virtio_pci_config_ops;
635 vp_dev->pci_dev = pci_dev; 630 vp_dev->pci_dev = pci_dev;
@@ -717,17 +712,7 @@ static struct pci_driver virtio_pci_driver = {
717 712
718static int __init virtio_pci_init(void) 713static int __init virtio_pci_init(void)
719{ 714{
720 int err; 715 return pci_register_driver(&virtio_pci_driver);
721
722 virtio_pci_root = root_device_register("virtio-pci");
723 if (IS_ERR(virtio_pci_root))
724 return PTR_ERR(virtio_pci_root);
725
726 err = pci_register_driver(&virtio_pci_driver);
727 if (err)
728 root_device_unregister(virtio_pci_root);
729
730 return err;
731} 716}
732 717
733module_init(virtio_pci_init); 718module_init(virtio_pci_init);
@@ -735,7 +720,6 @@ module_init(virtio_pci_init);
735static void __exit virtio_pci_exit(void) 720static void __exit virtio_pci_exit(void)
736{ 721{
737 pci_unregister_driver(&virtio_pci_driver); 722 pci_unregister_driver(&virtio_pci_driver);
738 root_device_unregister(virtio_pci_root);
739} 723}
740 724
741module_exit(virtio_pci_exit); 725module_exit(virtio_pci_exit);
diff --git a/drivers/xen/xenfs/xenbus.c b/drivers/xen/xenfs/xenbus.c
index 1c1236087f78..bbd000f88af7 100644
--- a/drivers/xen/xenfs/xenbus.c
+++ b/drivers/xen/xenfs/xenbus.c
@@ -122,6 +122,7 @@ static ssize_t xenbus_file_read(struct file *filp,
122 int ret; 122 int ret;
123 123
124 mutex_lock(&u->reply_mutex); 124 mutex_lock(&u->reply_mutex);
125again:
125 while (list_empty(&u->read_buffers)) { 126 while (list_empty(&u->read_buffers)) {
126 mutex_unlock(&u->reply_mutex); 127 mutex_unlock(&u->reply_mutex);
127 if (filp->f_flags & O_NONBLOCK) 128 if (filp->f_flags & O_NONBLOCK)
@@ -144,7 +145,7 @@ static ssize_t xenbus_file_read(struct file *filp,
144 i += sz - ret; 145 i += sz - ret;
145 rb->cons += sz - ret; 146 rb->cons += sz - ret;
146 147
147 if (ret != sz) { 148 if (ret != 0) {
148 if (i == 0) 149 if (i == 0)
149 i = -EFAULT; 150 i = -EFAULT;
150 goto out; 151 goto out;
@@ -160,6 +161,8 @@ static ssize_t xenbus_file_read(struct file *filp,
160 struct read_buffer, list); 161 struct read_buffer, list);
161 } 162 }
162 } 163 }
164 if (i == 0)
165 goto again;
163 166
164out: 167out:
165 mutex_unlock(&u->reply_mutex); 168 mutex_unlock(&u->reply_mutex);
@@ -407,6 +410,7 @@ static int xenbus_write_watch(unsigned msg_type, struct xenbus_file_priv *u)
407 410
408 mutex_lock(&u->reply_mutex); 411 mutex_lock(&u->reply_mutex);
409 rc = queue_reply(&u->read_buffers, &reply, sizeof(reply)); 412 rc = queue_reply(&u->read_buffers, &reply, sizeof(reply));
413 wake_up(&u->read_waitq);
410 mutex_unlock(&u->reply_mutex); 414 mutex_unlock(&u->reply_mutex);
411 } 415 }
412 416
@@ -455,7 +459,7 @@ static ssize_t xenbus_file_write(struct file *filp,
455 459
456 ret = copy_from_user(u->u.buffer + u->len, ubuf, len); 460 ret = copy_from_user(u->u.buffer + u->len, ubuf, len);
457 461
458 if (ret == len) { 462 if (ret != 0) {
459 rc = -EFAULT; 463 rc = -EFAULT;
460 goto out; 464 goto out;
461 } 465 }
@@ -488,21 +492,6 @@ static ssize_t xenbus_file_write(struct file *filp,
488 msg_type = u->u.msg.type; 492 msg_type = u->u.msg.type;
489 493
490 switch (msg_type) { 494 switch (msg_type) {
491 case XS_TRANSACTION_START:
492 case XS_TRANSACTION_END:
493 case XS_DIRECTORY:
494 case XS_READ:
495 case XS_GET_PERMS:
496 case XS_RELEASE:
497 case XS_GET_DOMAIN_PATH:
498 case XS_WRITE:
499 case XS_MKDIR:
500 case XS_RM:
501 case XS_SET_PERMS:
502 /* Send out a transaction */
503 ret = xenbus_write_transaction(msg_type, u);
504 break;
505
506 case XS_WATCH: 495 case XS_WATCH:
507 case XS_UNWATCH: 496 case XS_UNWATCH:
508 /* (Un)Ask for some path to be watched for changes */ 497 /* (Un)Ask for some path to be watched for changes */
@@ -510,7 +499,8 @@ static ssize_t xenbus_file_write(struct file *filp,
510 break; 499 break;
511 500
512 default: 501 default:
513 ret = -EINVAL; 502 /* Send out a transaction */
503 ret = xenbus_write_transaction(msg_type, u);
514 break; 504 break;
515 } 505 }
516 if (ret != 0) 506 if (ret != 0)
@@ -555,6 +545,7 @@ static int xenbus_file_release(struct inode *inode, struct file *filp)
555 struct xenbus_file_priv *u = filp->private_data; 545 struct xenbus_file_priv *u = filp->private_data;
556 struct xenbus_transaction_holder *trans, *tmp; 546 struct xenbus_transaction_holder *trans, *tmp;
557 struct watch_adapter *watch, *tmp_watch; 547 struct watch_adapter *watch, *tmp_watch;
548 struct read_buffer *rb, *tmp_rb;
558 549
559 /* 550 /*
560 * No need for locking here because there are no other users, 551 * No need for locking here because there are no other users,
@@ -573,6 +564,10 @@ static int xenbus_file_release(struct inode *inode, struct file *filp)
573 free_watch_adapter(watch); 564 free_watch_adapter(watch);
574 } 565 }
575 566
567 list_for_each_entry_safe(rb, tmp_rb, &u->read_buffers, list) {
568 list_del(&rb->list);
569 kfree(rb);
570 }
576 kfree(u); 571 kfree(u);
577 572
578 return 0; 573 return 0;