diff options
Diffstat (limited to 'drivers')
68 files changed, 874 insertions, 505 deletions
diff --git a/drivers/char/agp/Kconfig b/drivers/char/agp/Kconfig index fcd867d923ba..d8b1b576556c 100644 --- a/drivers/char/agp/Kconfig +++ b/drivers/char/agp/Kconfig | |||
@@ -50,7 +50,7 @@ config AGP_ATI | |||
50 | 50 | ||
51 | config AGP_AMD | 51 | config AGP_AMD |
52 | tristate "AMD Irongate, 761, and 762 chipset support" | 52 | tristate "AMD Irongate, 761, and 762 chipset support" |
53 | depends on AGP && (X86_32 || ALPHA) | 53 | depends on AGP && X86_32 |
54 | help | 54 | help |
55 | This option gives you AGP support for the GLX component of | 55 | This option gives you AGP support for the GLX component of |
56 | X on AMD Irongate, 761, and 762 chipsets. | 56 | X on AMD Irongate, 761, and 762 chipsets. |
diff --git a/drivers/char/agp/amd-k7-agp.c b/drivers/char/agp/amd-k7-agp.c index b1b4362bc648..45681c0ff3b6 100644 --- a/drivers/char/agp/amd-k7-agp.c +++ b/drivers/char/agp/amd-k7-agp.c | |||
@@ -41,22 +41,8 @@ static int amd_create_page_map(struct amd_page_map *page_map) | |||
41 | if (page_map->real == NULL) | 41 | if (page_map->real == NULL) |
42 | return -ENOMEM; | 42 | return -ENOMEM; |
43 | 43 | ||
44 | #ifndef CONFIG_X86 | ||
45 | SetPageReserved(virt_to_page(page_map->real)); | ||
46 | global_cache_flush(); | ||
47 | page_map->remapped = ioremap_nocache(virt_to_phys(page_map->real), | ||
48 | PAGE_SIZE); | ||
49 | if (page_map->remapped == NULL) { | ||
50 | ClearPageReserved(virt_to_page(page_map->real)); | ||
51 | free_page((unsigned long) page_map->real); | ||
52 | page_map->real = NULL; | ||
53 | return -ENOMEM; | ||
54 | } | ||
55 | global_cache_flush(); | ||
56 | #else | ||
57 | set_memory_uc((unsigned long)page_map->real, 1); | 44 | set_memory_uc((unsigned long)page_map->real, 1); |
58 | page_map->remapped = page_map->real; | 45 | page_map->remapped = page_map->real; |
59 | #endif | ||
60 | 46 | ||
61 | for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) { | 47 | for (i = 0; i < PAGE_SIZE / sizeof(unsigned long); i++) { |
62 | writel(agp_bridge->scratch_page, page_map->remapped+i); | 48 | writel(agp_bridge->scratch_page, page_map->remapped+i); |
@@ -68,12 +54,7 @@ static int amd_create_page_map(struct amd_page_map *page_map) | |||
68 | 54 | ||
69 | static void amd_free_page_map(struct amd_page_map *page_map) | 55 | static void amd_free_page_map(struct amd_page_map *page_map) |
70 | { | 56 | { |
71 | #ifndef CONFIG_X86 | ||
72 | iounmap(page_map->remapped); | ||
73 | ClearPageReserved(virt_to_page(page_map->real)); | ||
74 | #else | ||
75 | set_memory_wb((unsigned long)page_map->real, 1); | 57 | set_memory_wb((unsigned long)page_map->real, 1); |
76 | #endif | ||
77 | free_page((unsigned long) page_map->real); | 58 | free_page((unsigned long) page_map->real); |
78 | } | 59 | } |
79 | 60 | ||
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index 857df10c0428..b0a0dccc98c1 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c | |||
@@ -774,20 +774,14 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, | |||
774 | dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name); | 774 | dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name); |
775 | 775 | ||
776 | /* | 776 | /* |
777 | * If the device has not been properly setup, the following will catch | ||
778 | * the problem and should stop the system from crashing. | ||
779 | * 20030610 - hamish@zot.org | ||
780 | */ | ||
781 | if (pci_enable_device(pdev)) { | ||
782 | dev_err(&pdev->dev, "can't enable PCI device\n"); | ||
783 | agp_put_bridge(bridge); | ||
784 | return -ENODEV; | ||
785 | } | ||
786 | |||
787 | /* | ||
788 | * The following fixes the case where the BIOS has "forgotten" to | 777 | * The following fixes the case where the BIOS has "forgotten" to |
789 | * provide an address range for the GART. | 778 | * provide an address range for the GART. |
790 | * 20030610 - hamish@zot.org | 779 | * 20030610 - hamish@zot.org |
780 | * This happens before pci_enable_device() intentionally; | ||
781 | * calling pci_enable_device() before assigning the resource | ||
782 | * will result in the GART being disabled on machines with such | ||
783 | * BIOSs (the GART ends up with a BAR starting at 0, which | ||
784 | * conflicts a lot of other devices). | ||
791 | */ | 785 | */ |
792 | r = &pdev->resource[0]; | 786 | r = &pdev->resource[0]; |
793 | if (!r->start && r->end) { | 787 | if (!r->start && r->end) { |
@@ -798,6 +792,17 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, | |||
798 | } | 792 | } |
799 | } | 793 | } |
800 | 794 | ||
795 | /* | ||
796 | * If the device has not been properly setup, the following will catch | ||
797 | * the problem and should stop the system from crashing. | ||
798 | * 20030610 - hamish@zot.org | ||
799 | */ | ||
800 | if (pci_enable_device(pdev)) { | ||
801 | dev_err(&pdev->dev, "can't enable PCI device\n"); | ||
802 | agp_put_bridge(bridge); | ||
803 | return -ENODEV; | ||
804 | } | ||
805 | |||
801 | /* Fill in the mode register */ | 806 | /* Fill in the mode register */ |
802 | if (cap_ptr) { | 807 | if (cap_ptr) { |
803 | pci_read_config_dword(pdev, | 808 | pci_read_config_dword(pdev, |
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 2baa6708e44c..654faa803dcb 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c | |||
@@ -2674,3 +2674,23 @@ out: | |||
2674 | mutex_unlock(&dev->mode_config.mutex); | 2674 | mutex_unlock(&dev->mode_config.mutex); |
2675 | return ret; | 2675 | return ret; |
2676 | } | 2676 | } |
2677 | |||
2678 | void drm_mode_config_reset(struct drm_device *dev) | ||
2679 | { | ||
2680 | struct drm_crtc *crtc; | ||
2681 | struct drm_encoder *encoder; | ||
2682 | struct drm_connector *connector; | ||
2683 | |||
2684 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) | ||
2685 | if (crtc->funcs->reset) | ||
2686 | crtc->funcs->reset(crtc); | ||
2687 | |||
2688 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) | ||
2689 | if (encoder->funcs->reset) | ||
2690 | encoder->funcs->reset(encoder); | ||
2691 | |||
2692 | list_for_each_entry(connector, &dev->mode_config.connector_list, head) | ||
2693 | if (connector->funcs->reset) | ||
2694 | connector->funcs->reset(connector); | ||
2695 | } | ||
2696 | EXPORT_SYMBOL(drm_mode_config_reset); | ||
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c index 952b3d4fb2a6..92369655dca3 100644 --- a/drivers/gpu/drm/drm_crtc_helper.c +++ b/drivers/gpu/drm/drm_crtc_helper.c | |||
@@ -343,13 +343,12 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc, | |||
343 | struct drm_encoder *encoder; | 343 | struct drm_encoder *encoder; |
344 | bool ret = true; | 344 | bool ret = true; |
345 | 345 | ||
346 | adjusted_mode = drm_mode_duplicate(dev, mode); | ||
347 | |||
348 | crtc->enabled = drm_helper_crtc_in_use(crtc); | 346 | crtc->enabled = drm_helper_crtc_in_use(crtc); |
349 | |||
350 | if (!crtc->enabled) | 347 | if (!crtc->enabled) |
351 | return true; | 348 | return true; |
352 | 349 | ||
350 | adjusted_mode = drm_mode_duplicate(dev, mode); | ||
351 | |||
353 | saved_hwmode = crtc->hwmode; | 352 | saved_hwmode = crtc->hwmode; |
354 | saved_mode = crtc->mode; | 353 | saved_mode = crtc->mode; |
355 | saved_x = crtc->x; | 354 | saved_x = crtc->x; |
@@ -437,10 +436,9 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc, | |||
437 | */ | 436 | */ |
438 | drm_calc_timestamping_constants(crtc); | 437 | drm_calc_timestamping_constants(crtc); |
439 | 438 | ||
440 | /* XXX free adjustedmode */ | ||
441 | drm_mode_destroy(dev, adjusted_mode); | ||
442 | /* FIXME: add subpixel order */ | 439 | /* FIXME: add subpixel order */ |
443 | done: | 440 | done: |
441 | drm_mode_destroy(dev, adjusted_mode); | ||
444 | if (!ret) { | 442 | if (!ret) { |
445 | crtc->hwmode = saved_hwmode; | 443 | crtc->hwmode = saved_hwmode; |
446 | crtc->mode = saved_mode; | 444 | crtc->mode = saved_mode; |
@@ -497,14 +495,17 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) | |||
497 | 495 | ||
498 | crtc_funcs = set->crtc->helper_private; | 496 | crtc_funcs = set->crtc->helper_private; |
499 | 497 | ||
498 | if (!set->mode) | ||
499 | set->fb = NULL; | ||
500 | |||
500 | if (set->fb) { | 501 | if (set->fb) { |
501 | DRM_DEBUG_KMS("[CRTC:%d] [FB:%d] #connectors=%d (x y) (%i %i)\n", | 502 | DRM_DEBUG_KMS("[CRTC:%d] [FB:%d] #connectors=%d (x y) (%i %i)\n", |
502 | set->crtc->base.id, set->fb->base.id, | 503 | set->crtc->base.id, set->fb->base.id, |
503 | (int)set->num_connectors, set->x, set->y); | 504 | (int)set->num_connectors, set->x, set->y); |
504 | } else { | 505 | } else { |
505 | DRM_DEBUG_KMS("[CRTC:%d] [NOFB] #connectors=%d (x y) (%i %i)\n", | 506 | DRM_DEBUG_KMS("[CRTC:%d] [NOFB]\n", set->crtc->base.id); |
506 | set->crtc->base.id, (int)set->num_connectors, | 507 | set->mode = NULL; |
507 | set->x, set->y); | 508 | set->num_connectors = 0; |
508 | } | 509 | } |
509 | 510 | ||
510 | dev = set->crtc->dev; | 511 | dev = set->crtc->dev; |
@@ -649,8 +650,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) | |||
649 | mode_changed = true; | 650 | mode_changed = true; |
650 | 651 | ||
651 | if (mode_changed) { | 652 | if (mode_changed) { |
652 | set->crtc->enabled = (set->mode != NULL); | 653 | set->crtc->enabled = drm_helper_crtc_in_use(set->crtc); |
653 | if (set->mode != NULL) { | 654 | if (set->crtc->enabled) { |
654 | DRM_DEBUG_KMS("attempting to set mode from" | 655 | DRM_DEBUG_KMS("attempting to set mode from" |
655 | " userspace\n"); | 656 | " userspace\n"); |
656 | drm_mode_debug_printmodeline(set->mode); | 657 | drm_mode_debug_printmodeline(set->mode); |
@@ -665,6 +666,12 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) | |||
665 | ret = -EINVAL; | 666 | ret = -EINVAL; |
666 | goto fail; | 667 | goto fail; |
667 | } | 668 | } |
669 | DRM_DEBUG_KMS("Setting connector DPMS state to on\n"); | ||
670 | for (i = 0; i < set->num_connectors; i++) { | ||
671 | DRM_DEBUG_KMS("\t[CONNECTOR:%d:%s] set DPMS on\n", set->connectors[i]->base.id, | ||
672 | drm_get_connector_name(set->connectors[i])); | ||
673 | set->connectors[i]->dpms = DRM_MODE_DPMS_ON; | ||
674 | } | ||
668 | } | 675 | } |
669 | drm_helper_disable_unused_functions(dev); | 676 | drm_helper_disable_unused_functions(dev); |
670 | } else if (fb_changed) { | 677 | } else if (fb_changed) { |
@@ -681,12 +688,6 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) | |||
681 | goto fail; | 688 | goto fail; |
682 | } | 689 | } |
683 | } | 690 | } |
684 | DRM_DEBUG_KMS("Setting connector DPMS state to on\n"); | ||
685 | for (i = 0; i < set->num_connectors; i++) { | ||
686 | DRM_DEBUG_KMS("\t[CONNECTOR:%d:%s] set DPMS on\n", set->connectors[i]->base.id, | ||
687 | drm_get_connector_name(set->connectors[i])); | ||
688 | set->connectors[i]->dpms = DRM_MODE_DPMS_ON; | ||
689 | } | ||
690 | 691 | ||
691 | kfree(save_connectors); | 692 | kfree(save_connectors); |
692 | kfree(save_encoders); | 693 | kfree(save_encoders); |
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c index 0054e957203f..3dadfa2a8528 100644 --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c | |||
@@ -1250,7 +1250,7 @@ void drm_handle_vblank_events(struct drm_device *dev, int crtc) | |||
1250 | * Drivers should call this routine in their vblank interrupt handlers to | 1250 | * Drivers should call this routine in their vblank interrupt handlers to |
1251 | * update the vblank counter and send any signals that may be pending. | 1251 | * update the vblank counter and send any signals that may be pending. |
1252 | */ | 1252 | */ |
1253 | void drm_handle_vblank(struct drm_device *dev, int crtc) | 1253 | bool drm_handle_vblank(struct drm_device *dev, int crtc) |
1254 | { | 1254 | { |
1255 | u32 vblcount; | 1255 | u32 vblcount; |
1256 | s64 diff_ns; | 1256 | s64 diff_ns; |
@@ -1258,7 +1258,7 @@ void drm_handle_vblank(struct drm_device *dev, int crtc) | |||
1258 | unsigned long irqflags; | 1258 | unsigned long irqflags; |
1259 | 1259 | ||
1260 | if (!dev->num_crtcs) | 1260 | if (!dev->num_crtcs) |
1261 | return; | 1261 | return false; |
1262 | 1262 | ||
1263 | /* Need timestamp lock to prevent concurrent execution with | 1263 | /* Need timestamp lock to prevent concurrent execution with |
1264 | * vblank enable/disable, as this would cause inconsistent | 1264 | * vblank enable/disable, as this would cause inconsistent |
@@ -1269,7 +1269,7 @@ void drm_handle_vblank(struct drm_device *dev, int crtc) | |||
1269 | /* Vblank irq handling disabled. Nothing to do. */ | 1269 | /* Vblank irq handling disabled. Nothing to do. */ |
1270 | if (!dev->vblank_enabled[crtc]) { | 1270 | if (!dev->vblank_enabled[crtc]) { |
1271 | spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags); | 1271 | spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags); |
1272 | return; | 1272 | return false; |
1273 | } | 1273 | } |
1274 | 1274 | ||
1275 | /* Fetch corresponding timestamp for this vblank interval from | 1275 | /* Fetch corresponding timestamp for this vblank interval from |
@@ -1311,5 +1311,6 @@ void drm_handle_vblank(struct drm_device *dev, int crtc) | |||
1311 | drm_handle_vblank_events(dev, crtc); | 1311 | drm_handle_vblank_events(dev, crtc); |
1312 | 1312 | ||
1313 | spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags); | 1313 | spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags); |
1314 | return true; | ||
1314 | } | 1315 | } |
1315 | EXPORT_SYMBOL(drm_handle_vblank); | 1316 | EXPORT_SYMBOL(drm_handle_vblank); |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 66796bb82d3e..cfb56d0ff367 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -354,6 +354,7 @@ static int i915_drm_thaw(struct drm_device *dev) | |||
354 | error = i915_gem_init_ringbuffer(dev); | 354 | error = i915_gem_init_ringbuffer(dev); |
355 | mutex_unlock(&dev->struct_mutex); | 355 | mutex_unlock(&dev->struct_mutex); |
356 | 356 | ||
357 | drm_mode_config_reset(dev); | ||
357 | drm_irq_install(dev); | 358 | drm_irq_install(dev); |
358 | 359 | ||
359 | /* Resume the modeset for every activated CRTC */ | 360 | /* Resume the modeset for every activated CRTC */ |
@@ -542,6 +543,7 @@ int i915_reset(struct drm_device *dev, u8 flags) | |||
542 | 543 | ||
543 | mutex_unlock(&dev->struct_mutex); | 544 | mutex_unlock(&dev->struct_mutex); |
544 | drm_irq_uninstall(dev); | 545 | drm_irq_uninstall(dev); |
546 | drm_mode_config_reset(dev); | ||
545 | drm_irq_install(dev); | 547 | drm_irq_install(dev); |
546 | mutex_lock(&dev->struct_mutex); | 548 | mutex_lock(&dev->struct_mutex); |
547 | } | 549 | } |
@@ -566,6 +568,14 @@ int i915_reset(struct drm_device *dev, u8 flags) | |||
566 | static int __devinit | 568 | static int __devinit |
567 | i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | 569 | i915_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) |
568 | { | 570 | { |
571 | /* Only bind to function 0 of the device. Early generations | ||
572 | * used function 1 as a placeholder for multi-head. This causes | ||
573 | * us confusion instead, especially on the systems where both | ||
574 | * functions have the same PCI-ID! | ||
575 | */ | ||
576 | if (PCI_FUNC(pdev->devfn)) | ||
577 | return -ENODEV; | ||
578 | |||
569 | return drm_get_pci_dev(pdev, ent, &driver); | 579 | return drm_get_pci_dev(pdev, ent, &driver); |
570 | } | 580 | } |
571 | 581 | ||
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index 062f353497e6..97f946dcc1aa 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -1196,18 +1196,18 @@ irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) | |||
1196 | intel_finish_page_flip_plane(dev, 1); | 1196 | intel_finish_page_flip_plane(dev, 1); |
1197 | } | 1197 | } |
1198 | 1198 | ||
1199 | if (pipea_stats & vblank_status) { | 1199 | if (pipea_stats & vblank_status && |
1200 | drm_handle_vblank(dev, 0)) { | ||
1200 | vblank++; | 1201 | vblank++; |
1201 | drm_handle_vblank(dev, 0); | ||
1202 | if (!dev_priv->flip_pending_is_done) { | 1202 | if (!dev_priv->flip_pending_is_done) { |
1203 | i915_pageflip_stall_check(dev, 0); | 1203 | i915_pageflip_stall_check(dev, 0); |
1204 | intel_finish_page_flip(dev, 0); | 1204 | intel_finish_page_flip(dev, 0); |
1205 | } | 1205 | } |
1206 | } | 1206 | } |
1207 | 1207 | ||
1208 | if (pipeb_stats & vblank_status) { | 1208 | if (pipeb_stats & vblank_status && |
1209 | drm_handle_vblank(dev, 1)) { | ||
1209 | vblank++; | 1210 | vblank++; |
1210 | drm_handle_vblank(dev, 1); | ||
1211 | if (!dev_priv->flip_pending_is_done) { | 1211 | if (!dev_priv->flip_pending_is_done) { |
1212 | i915_pageflip_stall_check(dev, 1); | 1212 | i915_pageflip_stall_check(dev, 1); |
1213 | intel_finish_page_flip(dev, 1); | 1213 | intel_finish_page_flip(dev, 1); |
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index 17035b87ee46..8a77ff4a7237 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -535,6 +535,15 @@ static int intel_crt_set_property(struct drm_connector *connector, | |||
535 | return 0; | 535 | return 0; |
536 | } | 536 | } |
537 | 537 | ||
538 | static void intel_crt_reset(struct drm_connector *connector) | ||
539 | { | ||
540 | struct drm_device *dev = connector->dev; | ||
541 | struct intel_crt *crt = intel_attached_crt(connector); | ||
542 | |||
543 | if (HAS_PCH_SPLIT(dev)) | ||
544 | crt->force_hotplug_required = 1; | ||
545 | } | ||
546 | |||
538 | /* | 547 | /* |
539 | * Routines for controlling stuff on the analog port | 548 | * Routines for controlling stuff on the analog port |
540 | */ | 549 | */ |
@@ -548,6 +557,7 @@ static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = { | |||
548 | }; | 557 | }; |
549 | 558 | ||
550 | static const struct drm_connector_funcs intel_crt_connector_funcs = { | 559 | static const struct drm_connector_funcs intel_crt_connector_funcs = { |
560 | .reset = intel_crt_reset, | ||
551 | .dpms = drm_helper_connector_dpms, | 561 | .dpms = drm_helper_connector_dpms, |
552 | .detect = intel_crt_detect, | 562 | .detect = intel_crt_detect, |
553 | .fill_modes = drm_helper_probe_single_connector_modes, | 563 | .fill_modes = drm_helper_probe_single_connector_modes, |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index d7f237deaaf0..7e42aa586504 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -5551,6 +5551,18 @@ cleanup_work: | |||
5551 | return ret; | 5551 | return ret; |
5552 | } | 5552 | } |
5553 | 5553 | ||
5554 | static void intel_crtc_reset(struct drm_crtc *crtc) | ||
5555 | { | ||
5556 | struct intel_crtc *intel_crtc = to_intel_crtc(crtc); | ||
5557 | |||
5558 | /* Reset flags back to the 'unknown' status so that they | ||
5559 | * will be correctly set on the initial modeset. | ||
5560 | */ | ||
5561 | intel_crtc->cursor_addr = 0; | ||
5562 | intel_crtc->dpms_mode = -1; | ||
5563 | intel_crtc->active = true; /* force the pipe off on setup_init_config */ | ||
5564 | } | ||
5565 | |||
5554 | static struct drm_crtc_helper_funcs intel_helper_funcs = { | 5566 | static struct drm_crtc_helper_funcs intel_helper_funcs = { |
5555 | .dpms = intel_crtc_dpms, | 5567 | .dpms = intel_crtc_dpms, |
5556 | .mode_fixup = intel_crtc_mode_fixup, | 5568 | .mode_fixup = intel_crtc_mode_fixup, |
@@ -5562,6 +5574,7 @@ static struct drm_crtc_helper_funcs intel_helper_funcs = { | |||
5562 | }; | 5574 | }; |
5563 | 5575 | ||
5564 | static const struct drm_crtc_funcs intel_crtc_funcs = { | 5576 | static const struct drm_crtc_funcs intel_crtc_funcs = { |
5577 | .reset = intel_crtc_reset, | ||
5565 | .cursor_set = intel_crtc_cursor_set, | 5578 | .cursor_set = intel_crtc_cursor_set, |
5566 | .cursor_move = intel_crtc_cursor_move, | 5579 | .cursor_move = intel_crtc_cursor_move, |
5567 | .gamma_set = intel_crtc_gamma_set, | 5580 | .gamma_set = intel_crtc_gamma_set, |
@@ -5652,9 +5665,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) | |||
5652 | dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base; | 5665 | dev_priv->plane_to_crtc_mapping[intel_crtc->plane] = &intel_crtc->base; |
5653 | dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base; | 5666 | dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base; |
5654 | 5667 | ||
5655 | intel_crtc->cursor_addr = 0; | 5668 | intel_crtc_reset(&intel_crtc->base); |
5656 | intel_crtc->dpms_mode = -1; | ||
5657 | intel_crtc->active = true; /* force the pipe off on setup_init_config */ | ||
5658 | 5669 | ||
5659 | if (HAS_PCH_SPLIT(dev)) { | 5670 | if (HAS_PCH_SPLIT(dev)) { |
5660 | intel_helper_funcs.prepare = ironlake_crtc_prepare; | 5671 | intel_helper_funcs.prepare = ironlake_crtc_prepare; |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 45cd37652a37..6a09c1413d60 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -473,20 +473,6 @@ static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, | |||
473 | return false; | 473 | return false; |
474 | } | 474 | } |
475 | 475 | ||
476 | i = 3; | ||
477 | while (status == SDVO_CMD_STATUS_PENDING && i--) { | ||
478 | if (!intel_sdvo_read_byte(intel_sdvo, | ||
479 | SDVO_I2C_CMD_STATUS, | ||
480 | &status)) | ||
481 | return false; | ||
482 | } | ||
483 | if (status != SDVO_CMD_STATUS_SUCCESS) { | ||
484 | DRM_DEBUG_KMS("command returns response %s [%d]\n", | ||
485 | status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP ? cmd_status_names[status] : "???", | ||
486 | status); | ||
487 | return false; | ||
488 | } | ||
489 | |||
490 | return true; | 476 | return true; |
491 | } | 477 | } |
492 | 478 | ||
@@ -497,6 +483,8 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, | |||
497 | u8 status; | 483 | u8 status; |
498 | int i; | 484 | int i; |
499 | 485 | ||
486 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); | ||
487 | |||
500 | /* | 488 | /* |
501 | * The documentation states that all commands will be | 489 | * The documentation states that all commands will be |
502 | * processed within 15µs, and that we need only poll | 490 | * processed within 15µs, and that we need only poll |
@@ -505,14 +493,19 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, | |||
505 | * | 493 | * |
506 | * Check 5 times in case the hardware failed to read the docs. | 494 | * Check 5 times in case the hardware failed to read the docs. |
507 | */ | 495 | */ |
508 | do { | 496 | if (!intel_sdvo_read_byte(intel_sdvo, |
497 | SDVO_I2C_CMD_STATUS, | ||
498 | &status)) | ||
499 | goto log_fail; | ||
500 | |||
501 | while (status == SDVO_CMD_STATUS_PENDING && retry--) { | ||
502 | udelay(15); | ||
509 | if (!intel_sdvo_read_byte(intel_sdvo, | 503 | if (!intel_sdvo_read_byte(intel_sdvo, |
510 | SDVO_I2C_CMD_STATUS, | 504 | SDVO_I2C_CMD_STATUS, |
511 | &status)) | 505 | &status)) |
512 | return false; | 506 | goto log_fail; |
513 | } while (status == SDVO_CMD_STATUS_PENDING && --retry); | 507 | } |
514 | 508 | ||
515 | DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo)); | ||
516 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) | 509 | if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP) |
517 | DRM_LOG_KMS("(%s)", cmd_status_names[status]); | 510 | DRM_LOG_KMS("(%s)", cmd_status_names[status]); |
518 | else | 511 | else |
@@ -533,7 +526,7 @@ static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo, | |||
533 | return true; | 526 | return true; |
534 | 527 | ||
535 | log_fail: | 528 | log_fail: |
536 | DRM_LOG_KMS("\n"); | 529 | DRM_LOG_KMS("... failed\n"); |
537 | return false; | 530 | return false; |
538 | } | 531 | } |
539 | 532 | ||
@@ -550,6 +543,7 @@ static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode) | |||
550 | static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, | 543 | static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, |
551 | u8 ddc_bus) | 544 | u8 ddc_bus) |
552 | { | 545 | { |
546 | /* This must be the immediately preceding write before the i2c xfer */ | ||
553 | return intel_sdvo_write_cmd(intel_sdvo, | 547 | return intel_sdvo_write_cmd(intel_sdvo, |
554 | SDVO_CMD_SET_CONTROL_BUS_SWITCH, | 548 | SDVO_CMD_SET_CONTROL_BUS_SWITCH, |
555 | &ddc_bus, 1); | 549 | &ddc_bus, 1); |
@@ -557,7 +551,10 @@ static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo, | |||
557 | 551 | ||
558 | static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) | 552 | static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len) |
559 | { | 553 | { |
560 | return intel_sdvo_write_cmd(intel_sdvo, cmd, data, len); | 554 | if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len)) |
555 | return false; | ||
556 | |||
557 | return intel_sdvo_read_response(intel_sdvo, NULL, 0); | ||
561 | } | 558 | } |
562 | 559 | ||
563 | static bool | 560 | static bool |
@@ -859,18 +856,21 @@ static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo) | |||
859 | 856 | ||
860 | intel_dip_infoframe_csum(&avi_if); | 857 | intel_dip_infoframe_csum(&avi_if); |
861 | 858 | ||
862 | if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_INDEX, | 859 | if (!intel_sdvo_set_value(intel_sdvo, |
860 | SDVO_CMD_SET_HBUF_INDEX, | ||
863 | set_buf_index, 2)) | 861 | set_buf_index, 2)) |
864 | return false; | 862 | return false; |
865 | 863 | ||
866 | for (i = 0; i < sizeof(avi_if); i += 8) { | 864 | for (i = 0; i < sizeof(avi_if); i += 8) { |
867 | if (!intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_DATA, | 865 | if (!intel_sdvo_set_value(intel_sdvo, |
866 | SDVO_CMD_SET_HBUF_DATA, | ||
868 | data, 8)) | 867 | data, 8)) |
869 | return false; | 868 | return false; |
870 | data++; | 869 | data++; |
871 | } | 870 | } |
872 | 871 | ||
873 | return intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_HBUF_TXRATE, | 872 | return intel_sdvo_set_value(intel_sdvo, |
873 | SDVO_CMD_SET_HBUF_TXRATE, | ||
874 | &tx_rate, 1); | 874 | &tx_rate, 1); |
875 | } | 875 | } |
876 | 876 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_pm.c b/drivers/gpu/drm/nouveau/nouveau_pm.c index fb846a3fef15..f05c0cddfeca 100644 --- a/drivers/gpu/drm/nouveau/nouveau_pm.c +++ b/drivers/gpu/drm/nouveau/nouveau_pm.c | |||
@@ -443,7 +443,7 @@ nouveau_hwmon_fini(struct drm_device *dev) | |||
443 | struct nouveau_pm_engine *pm = &dev_priv->engine.pm; | 443 | struct nouveau_pm_engine *pm = &dev_priv->engine.pm; |
444 | 444 | ||
445 | if (pm->hwmon) { | 445 | if (pm->hwmon) { |
446 | sysfs_remove_group(&pm->hwmon->kobj, &hwmon_attrgroup); | 446 | sysfs_remove_group(&dev->pdev->dev.kobj, &hwmon_attrgroup); |
447 | hwmon_device_unregister(pm->hwmon); | 447 | hwmon_device_unregister(pm->hwmon); |
448 | } | 448 | } |
449 | #endif | 449 | #endif |
diff --git a/drivers/gpu/drm/nouveau/nv50_evo.c b/drivers/gpu/drm/nouveau/nv50_evo.c index 14e24e906ee8..0ea090f4244a 100644 --- a/drivers/gpu/drm/nouveau/nv50_evo.c +++ b/drivers/gpu/drm/nouveau/nv50_evo.c | |||
@@ -283,8 +283,7 @@ nv50_evo_create(struct drm_device *dev) | |||
283 | nv50_evo_channel_del(&dev_priv->evo); | 283 | nv50_evo_channel_del(&dev_priv->evo); |
284 | return ret; | 284 | return ret; |
285 | } | 285 | } |
286 | } else | 286 | } else { |
287 | if (dev_priv->chipset != 0x50) { | ||
288 | ret = nv50_evo_dmaobj_new(evo, 0x3d, NvEvoFB16, 0x70, 0x19, | 287 | ret = nv50_evo_dmaobj_new(evo, 0x3d, NvEvoFB16, 0x70, 0x19, |
289 | 0, 0xffffffff, 0x00010000); | 288 | 0, 0xffffffff, 0x00010000); |
290 | if (ret) { | 289 | if (ret) { |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 842954fe74c5..b1537000a104 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -555,6 +555,7 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
555 | dp_clock = dig_connector->dp_clock; | 555 | dp_clock = dig_connector->dp_clock; |
556 | } | 556 | } |
557 | } | 557 | } |
558 | /* this might work properly with the new pll algo */ | ||
558 | #if 0 /* doesn't work properly on some laptops */ | 559 | #if 0 /* doesn't work properly on some laptops */ |
559 | /* use recommended ref_div for ss */ | 560 | /* use recommended ref_div for ss */ |
560 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 561 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
@@ -572,6 +573,11 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
572 | adjusted_clock = mode->clock * 2; | 573 | adjusted_clock = mode->clock * 2; |
573 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) | 574 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) |
574 | pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER; | 575 | pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER; |
576 | /* rv515 needs more testing with this option */ | ||
577 | if (rdev->family != CHIP_RV515) { | ||
578 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) | ||
579 | pll->flags |= RADEON_PLL_IS_LCD; | ||
580 | } | ||
575 | } else { | 581 | } else { |
576 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) | 582 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) |
577 | pll->flags |= RADEON_PLL_NO_ODD_POST_DIV; | 583 | pll->flags |= RADEON_PLL_NO_ODD_POST_DIV; |
@@ -951,8 +957,16 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode | |||
951 | /* adjust pixel clock as needed */ | 957 | /* adjust pixel clock as needed */ |
952 | adjusted_clock = atombios_adjust_pll(crtc, mode, pll, ss_enabled, &ss); | 958 | adjusted_clock = atombios_adjust_pll(crtc, mode, pll, ss_enabled, &ss); |
953 | 959 | ||
954 | radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, | 960 | /* rv515 seems happier with the old algo */ |
955 | &ref_div, &post_div); | 961 | if (rdev->family == CHIP_RV515) |
962 | radeon_compute_pll_legacy(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, | ||
963 | &ref_div, &post_div); | ||
964 | else if (ASIC_IS_AVIVO(rdev)) | ||
965 | radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, | ||
966 | &ref_div, &post_div); | ||
967 | else | ||
968 | radeon_compute_pll_legacy(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, | ||
969 | &ref_div, &post_div); | ||
956 | 970 | ||
957 | atombios_crtc_program_ss(crtc, ATOM_DISABLE, radeon_crtc->pll_id, &ss); | 971 | atombios_crtc_program_ss(crtc, ATOM_DISABLE, radeon_crtc->pll_id, &ss); |
958 | 972 | ||
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 677af91b555c..ffdc8332b76e 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -97,26 +97,29 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | |||
97 | } | 97 | } |
98 | 98 | ||
99 | /* get temperature in millidegrees */ | 99 | /* get temperature in millidegrees */ |
100 | u32 evergreen_get_temp(struct radeon_device *rdev) | 100 | int evergreen_get_temp(struct radeon_device *rdev) |
101 | { | 101 | { |
102 | u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >> | 102 | u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >> |
103 | ASIC_T_SHIFT; | 103 | ASIC_T_SHIFT; |
104 | u32 actual_temp = 0; | 104 | u32 actual_temp = 0; |
105 | 105 | ||
106 | if ((temp >> 10) & 1) | 106 | if (temp & 0x400) |
107 | actual_temp = 0; | 107 | actual_temp = -256; |
108 | else if ((temp >> 9) & 1) | 108 | else if (temp & 0x200) |
109 | actual_temp = 255; | 109 | actual_temp = 255; |
110 | else | 110 | else if (temp & 0x100) { |
111 | actual_temp = (temp >> 1) & 0xff; | 111 | actual_temp = temp & 0x1ff; |
112 | actual_temp |= ~0x1ff; | ||
113 | } else | ||
114 | actual_temp = temp & 0xff; | ||
112 | 115 | ||
113 | return actual_temp * 1000; | 116 | return (actual_temp * 1000) / 2; |
114 | } | 117 | } |
115 | 118 | ||
116 | u32 sumo_get_temp(struct radeon_device *rdev) | 119 | int sumo_get_temp(struct radeon_device *rdev) |
117 | { | 120 | { |
118 | u32 temp = RREG32(CG_THERMAL_STATUS) & 0xff; | 121 | u32 temp = RREG32(CG_THERMAL_STATUS) & 0xff; |
119 | u32 actual_temp = (temp >> 1) & 0xff; | 122 | int actual_temp = temp - 49; |
120 | 123 | ||
121 | return actual_temp * 1000; | 124 | return actual_temp * 1000; |
122 | } | 125 | } |
@@ -1182,6 +1185,18 @@ static void evergreen_mc_program(struct radeon_device *rdev) | |||
1182 | /* | 1185 | /* |
1183 | * CP. | 1186 | * CP. |
1184 | */ | 1187 | */ |
1188 | void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) | ||
1189 | { | ||
1190 | /* set to DX10/11 mode */ | ||
1191 | radeon_ring_write(rdev, PACKET3(PACKET3_MODE_CONTROL, 0)); | ||
1192 | radeon_ring_write(rdev, 1); | ||
1193 | /* FIXME: implement */ | ||
1194 | radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); | ||
1195 | radeon_ring_write(rdev, ib->gpu_addr & 0xFFFFFFFC); | ||
1196 | radeon_ring_write(rdev, upper_32_bits(ib->gpu_addr) & 0xFF); | ||
1197 | radeon_ring_write(rdev, ib->length_dw); | ||
1198 | } | ||
1199 | |||
1185 | 1200 | ||
1186 | static int evergreen_cp_load_microcode(struct radeon_device *rdev) | 1201 | static int evergreen_cp_load_microcode(struct radeon_device *rdev) |
1187 | { | 1202 | { |
@@ -1233,7 +1248,7 @@ static int evergreen_cp_start(struct radeon_device *rdev) | |||
1233 | cp_me = 0xff; | 1248 | cp_me = 0xff; |
1234 | WREG32(CP_ME_CNTL, cp_me); | 1249 | WREG32(CP_ME_CNTL, cp_me); |
1235 | 1250 | ||
1236 | r = radeon_ring_lock(rdev, evergreen_default_size + 15); | 1251 | r = radeon_ring_lock(rdev, evergreen_default_size + 19); |
1237 | if (r) { | 1252 | if (r) { |
1238 | DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r); | 1253 | DRM_ERROR("radeon: cp failed to lock ring (%d).\n", r); |
1239 | return r; | 1254 | return r; |
@@ -1266,6 +1281,11 @@ static int evergreen_cp_start(struct radeon_device *rdev) | |||
1266 | radeon_ring_write(rdev, 0xffffffff); | 1281 | radeon_ring_write(rdev, 0xffffffff); |
1267 | radeon_ring_write(rdev, 0xffffffff); | 1282 | radeon_ring_write(rdev, 0xffffffff); |
1268 | 1283 | ||
1284 | radeon_ring_write(rdev, 0xc0026900); | ||
1285 | radeon_ring_write(rdev, 0x00000316); | ||
1286 | radeon_ring_write(rdev, 0x0000000e); /* VGT_VERTEX_REUSE_BLOCK_CNTL */ | ||
1287 | radeon_ring_write(rdev, 0x00000010); /* */ | ||
1288 | |||
1269 | radeon_ring_unlock_commit(rdev); | 1289 | radeon_ring_unlock_commit(rdev); |
1270 | 1290 | ||
1271 | return 0; | 1291 | return 0; |
@@ -2072,6 +2092,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
2072 | WREG32(VGT_CACHE_INVALIDATION, vgt_cache_invalidation); | 2092 | WREG32(VGT_CACHE_INVALIDATION, vgt_cache_invalidation); |
2073 | 2093 | ||
2074 | WREG32(VGT_GS_VERTEX_REUSE, 16); | 2094 | WREG32(VGT_GS_VERTEX_REUSE, 16); |
2095 | WREG32(PA_SU_LINE_STIPPLE_VALUE, 0); | ||
2075 | WREG32(PA_SC_LINE_STIPPLE_STATE, 0); | 2096 | WREG32(PA_SC_LINE_STIPPLE_STATE, 0); |
2076 | 2097 | ||
2077 | WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, 14); | 2098 | WREG32(VGT_VERTEX_REUSE_BLOCK_CNTL, 14); |
diff --git a/drivers/gpu/drm/radeon/evergreen_blit_kms.c b/drivers/gpu/drm/radeon/evergreen_blit_kms.c index d4d4db49a8b8..a1ba4b3053d0 100644 --- a/drivers/gpu/drm/radeon/evergreen_blit_kms.c +++ b/drivers/gpu/drm/radeon/evergreen_blit_kms.c | |||
@@ -232,7 +232,7 @@ draw_auto(struct radeon_device *rdev) | |||
232 | 232 | ||
233 | } | 233 | } |
234 | 234 | ||
235 | /* emits 34 */ | 235 | /* emits 36 */ |
236 | static void | 236 | static void |
237 | set_default_state(struct radeon_device *rdev) | 237 | set_default_state(struct radeon_device *rdev) |
238 | { | 238 | { |
@@ -499,6 +499,10 @@ set_default_state(struct radeon_device *rdev) | |||
499 | radeon_ring_write(rdev, 0x00000000); | 499 | radeon_ring_write(rdev, 0x00000000); |
500 | radeon_ring_write(rdev, 0x00000000); | 500 | radeon_ring_write(rdev, 0x00000000); |
501 | 501 | ||
502 | /* set to DX10/11 mode */ | ||
503 | radeon_ring_write(rdev, PACKET3(PACKET3_MODE_CONTROL, 0)); | ||
504 | radeon_ring_write(rdev, 1); | ||
505 | |||
502 | /* emit an IB pointing at default state */ | 506 | /* emit an IB pointing at default state */ |
503 | dwords = ALIGN(rdev->r600_blit.state_len, 0x10); | 507 | dwords = ALIGN(rdev->r600_blit.state_len, 0x10); |
504 | gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset; | 508 | gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset; |
@@ -679,7 +683,7 @@ int evergreen_blit_prepare_copy(struct radeon_device *rdev, int size_bytes) | |||
679 | /* calculate number of loops correctly */ | 683 | /* calculate number of loops correctly */ |
680 | ring_size = num_loops * dwords_per_loop; | 684 | ring_size = num_loops * dwords_per_loop; |
681 | /* set default + shaders */ | 685 | /* set default + shaders */ |
682 | ring_size += 50; /* shaders + def state */ | 686 | ring_size += 52; /* shaders + def state */ |
683 | ring_size += 10; /* fence emit for VB IB */ | 687 | ring_size += 10; /* fence emit for VB IB */ |
684 | ring_size += 5; /* done copy */ | 688 | ring_size += 5; /* done copy */ |
685 | ring_size += 10; /* fence emit for done copy */ | 689 | ring_size += 10; /* fence emit for done copy */ |
@@ -687,7 +691,7 @@ int evergreen_blit_prepare_copy(struct radeon_device *rdev, int size_bytes) | |||
687 | if (r) | 691 | if (r) |
688 | return r; | 692 | return r; |
689 | 693 | ||
690 | set_default_state(rdev); /* 34 */ | 694 | set_default_state(rdev); /* 36 */ |
691 | set_shaders(rdev); /* 16 */ | 695 | set_shaders(rdev); /* 16 */ |
692 | return 0; | 696 | return 0; |
693 | } | 697 | } |
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index 36d32d83d866..afec1aca2a73 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
@@ -240,6 +240,7 @@ | |||
240 | #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) | 240 | #define FORCE_EOV_MAX_CLK_CNT(x) ((x) << 0) |
241 | #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) | 241 | #define FORCE_EOV_MAX_REZ_CNT(x) ((x) << 16) |
242 | #define PA_SC_LINE_STIPPLE 0x28A0C | 242 | #define PA_SC_LINE_STIPPLE 0x28A0C |
243 | #define PA_SU_LINE_STIPPLE_VALUE 0x8A60 | ||
243 | #define PA_SC_LINE_STIPPLE_STATE 0x8B10 | 244 | #define PA_SC_LINE_STIPPLE_STATE 0x8B10 |
244 | 245 | ||
245 | #define SCRATCH_REG0 0x8500 | 246 | #define SCRATCH_REG0 0x8500 |
@@ -652,6 +653,7 @@ | |||
652 | #define PACKET3_DISPATCH_DIRECT 0x15 | 653 | #define PACKET3_DISPATCH_DIRECT 0x15 |
653 | #define PACKET3_DISPATCH_INDIRECT 0x16 | 654 | #define PACKET3_DISPATCH_INDIRECT 0x16 |
654 | #define PACKET3_INDIRECT_BUFFER_END 0x17 | 655 | #define PACKET3_INDIRECT_BUFFER_END 0x17 |
656 | #define PACKET3_MODE_CONTROL 0x18 | ||
655 | #define PACKET3_SET_PREDICATION 0x20 | 657 | #define PACKET3_SET_PREDICATION 0x20 |
656 | #define PACKET3_REG_RMW 0x21 | 658 | #define PACKET3_REG_RMW 0x21 |
657 | #define PACKET3_COND_EXEC 0x22 | 659 | #define PACKET3_COND_EXEC 0x22 |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 1e10e3e2ba2a..650672a0f5ad 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -97,12 +97,16 @@ void r600_irq_disable(struct radeon_device *rdev); | |||
97 | static void r600_pcie_gen2_enable(struct radeon_device *rdev); | 97 | static void r600_pcie_gen2_enable(struct radeon_device *rdev); |
98 | 98 | ||
99 | /* get temperature in millidegrees */ | 99 | /* get temperature in millidegrees */ |
100 | u32 rv6xx_get_temp(struct radeon_device *rdev) | 100 | int rv6xx_get_temp(struct radeon_device *rdev) |
101 | { | 101 | { |
102 | u32 temp = (RREG32(CG_THERMAL_STATUS) & ASIC_T_MASK) >> | 102 | u32 temp = (RREG32(CG_THERMAL_STATUS) & ASIC_T_MASK) >> |
103 | ASIC_T_SHIFT; | 103 | ASIC_T_SHIFT; |
104 | int actual_temp = temp & 0xff; | ||
104 | 105 | ||
105 | return temp * 1000; | 106 | if (temp & 0x100) |
107 | actual_temp -= 256; | ||
108 | |||
109 | return actual_temp * 1000; | ||
106 | } | 110 | } |
107 | 111 | ||
108 | void r600_pm_get_dynpm_state(struct radeon_device *rdev) | 112 | void r600_pm_get_dynpm_state(struct radeon_device *rdev) |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 71d2a554bbe6..56c48b67ef3d 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -179,10 +179,10 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev); | |||
179 | void radeon_atombios_get_power_modes(struct radeon_device *rdev); | 179 | void radeon_atombios_get_power_modes(struct radeon_device *rdev); |
180 | void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level); | 180 | void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level); |
181 | void rs690_pm_info(struct radeon_device *rdev); | 181 | void rs690_pm_info(struct radeon_device *rdev); |
182 | extern u32 rv6xx_get_temp(struct radeon_device *rdev); | 182 | extern int rv6xx_get_temp(struct radeon_device *rdev); |
183 | extern u32 rv770_get_temp(struct radeon_device *rdev); | 183 | extern int rv770_get_temp(struct radeon_device *rdev); |
184 | extern u32 evergreen_get_temp(struct radeon_device *rdev); | 184 | extern int evergreen_get_temp(struct radeon_device *rdev); |
185 | extern u32 sumo_get_temp(struct radeon_device *rdev); | 185 | extern int sumo_get_temp(struct radeon_device *rdev); |
186 | 186 | ||
187 | /* | 187 | /* |
188 | * Fences. | 188 | * Fences. |
@@ -812,8 +812,7 @@ struct radeon_pm { | |||
812 | fixed20_12 sclk; | 812 | fixed20_12 sclk; |
813 | fixed20_12 mclk; | 813 | fixed20_12 mclk; |
814 | fixed20_12 needed_bandwidth; | 814 | fixed20_12 needed_bandwidth; |
815 | /* XXX: use a define for num power modes */ | 815 | struct radeon_power_state *power_state; |
816 | struct radeon_power_state power_state[8]; | ||
817 | /* number of valid power states */ | 816 | /* number of valid power states */ |
818 | int num_power_states; | 817 | int num_power_states; |
819 | int current_power_state_index; | 818 | int current_power_state_index; |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 3a1b16186224..e75d63b8e21d 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -759,7 +759,7 @@ static struct radeon_asic evergreen_asic = { | |||
759 | .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush, | 759 | .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush, |
760 | .gart_set_page = &rs600_gart_set_page, | 760 | .gart_set_page = &rs600_gart_set_page, |
761 | .ring_test = &r600_ring_test, | 761 | .ring_test = &r600_ring_test, |
762 | .ring_ib_execute = &r600_ring_ib_execute, | 762 | .ring_ib_execute = &evergreen_ring_ib_execute, |
763 | .irq_set = &evergreen_irq_set, | 763 | .irq_set = &evergreen_irq_set, |
764 | .irq_process = &evergreen_irq_process, | 764 | .irq_process = &evergreen_irq_process, |
765 | .get_vblank_counter = &evergreen_get_vblank_counter, | 765 | .get_vblank_counter = &evergreen_get_vblank_counter, |
@@ -805,7 +805,7 @@ static struct radeon_asic sumo_asic = { | |||
805 | .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush, | 805 | .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush, |
806 | .gart_set_page = &rs600_gart_set_page, | 806 | .gart_set_page = &rs600_gart_set_page, |
807 | .ring_test = &r600_ring_test, | 807 | .ring_test = &r600_ring_test, |
808 | .ring_ib_execute = &r600_ring_ib_execute, | 808 | .ring_ib_execute = &evergreen_ring_ib_execute, |
809 | .irq_set = &evergreen_irq_set, | 809 | .irq_set = &evergreen_irq_set, |
810 | .irq_process = &evergreen_irq_process, | 810 | .irq_process = &evergreen_irq_process, |
811 | .get_vblank_counter = &evergreen_get_vblank_counter, | 811 | .get_vblank_counter = &evergreen_get_vblank_counter, |
@@ -848,7 +848,7 @@ static struct radeon_asic btc_asic = { | |||
848 | .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush, | 848 | .gart_tlb_flush = &evergreen_pcie_gart_tlb_flush, |
849 | .gart_set_page = &rs600_gart_set_page, | 849 | .gart_set_page = &rs600_gart_set_page, |
850 | .ring_test = &r600_ring_test, | 850 | .ring_test = &r600_ring_test, |
851 | .ring_ib_execute = &r600_ring_ib_execute, | 851 | .ring_ib_execute = &evergreen_ring_ib_execute, |
852 | .irq_set = &evergreen_irq_set, | 852 | .irq_set = &evergreen_irq_set, |
853 | .irq_process = &evergreen_irq_process, | 853 | .irq_process = &evergreen_irq_process, |
854 | .get_vblank_counter = &evergreen_get_vblank_counter, | 854 | .get_vblank_counter = &evergreen_get_vblank_counter, |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index e01f07718539..c59bd98a2029 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -355,6 +355,7 @@ int evergreen_resume(struct radeon_device *rdev); | |||
355 | bool evergreen_gpu_is_lockup(struct radeon_device *rdev); | 355 | bool evergreen_gpu_is_lockup(struct radeon_device *rdev); |
356 | int evergreen_asic_reset(struct radeon_device *rdev); | 356 | int evergreen_asic_reset(struct radeon_device *rdev); |
357 | void evergreen_bandwidth_update(struct radeon_device *rdev); | 357 | void evergreen_bandwidth_update(struct radeon_device *rdev); |
358 | void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib); | ||
358 | int evergreen_copy_blit(struct radeon_device *rdev, | 359 | int evergreen_copy_blit(struct radeon_device *rdev, |
359 | uint64_t src_offset, uint64_t dst_offset, | 360 | uint64_t src_offset, uint64_t dst_offset, |
360 | unsigned num_pages, struct radeon_fence *fence); | 361 | unsigned num_pages, struct radeon_fence *fence); |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 52777902bbcc..5c1cc7ad9a15 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -1163,16 +1163,6 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) | |||
1163 | p1pll->pll_out_min = 64800; | 1163 | p1pll->pll_out_min = 64800; |
1164 | else | 1164 | else |
1165 | p1pll->pll_out_min = 20000; | 1165 | p1pll->pll_out_min = 20000; |
1166 | } else if (p1pll->pll_out_min > 64800) { | ||
1167 | /* Limiting the pll output range is a good thing generally as | ||
1168 | * it limits the number of possible pll combinations for a given | ||
1169 | * frequency presumably to the ones that work best on each card. | ||
1170 | * However, certain duallink DVI monitors seem to like | ||
1171 | * pll combinations that would be limited by this at least on | ||
1172 | * pre-DCE 3.0 r6xx hardware. This might need to be adjusted per | ||
1173 | * family. | ||
1174 | */ | ||
1175 | p1pll->pll_out_min = 64800; | ||
1176 | } | 1166 | } |
1177 | 1167 | ||
1178 | p1pll->pll_in_min = | 1168 | p1pll->pll_in_min = |
@@ -1987,6 +1977,9 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) | |||
1987 | num_modes = power_info->info.ucNumOfPowerModeEntries; | 1977 | num_modes = power_info->info.ucNumOfPowerModeEntries; |
1988 | if (num_modes > ATOM_MAX_NUMBEROF_POWER_BLOCK) | 1978 | if (num_modes > ATOM_MAX_NUMBEROF_POWER_BLOCK) |
1989 | num_modes = ATOM_MAX_NUMBEROF_POWER_BLOCK; | 1979 | num_modes = ATOM_MAX_NUMBEROF_POWER_BLOCK; |
1980 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state) * num_modes, GFP_KERNEL); | ||
1981 | if (!rdev->pm.power_state) | ||
1982 | return state_index; | ||
1990 | /* last mode is usually default, array is low to high */ | 1983 | /* last mode is usually default, array is low to high */ |
1991 | for (i = 0; i < num_modes; i++) { | 1984 | for (i = 0; i < num_modes; i++) { |
1992 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; | 1985 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; |
@@ -2338,6 +2331,10 @@ static int radeon_atombios_parse_power_table_4_5(struct radeon_device *rdev) | |||
2338 | power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); | 2331 | power_info = (union power_info *)(mode_info->atom_context->bios + data_offset); |
2339 | 2332 | ||
2340 | radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController); | 2333 | radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController); |
2334 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state) * | ||
2335 | power_info->pplib.ucNumStates, GFP_KERNEL); | ||
2336 | if (!rdev->pm.power_state) | ||
2337 | return state_index; | ||
2341 | /* first mode is usually default, followed by low to high */ | 2338 | /* first mode is usually default, followed by low to high */ |
2342 | for (i = 0; i < power_info->pplib.ucNumStates; i++) { | 2339 | for (i = 0; i < power_info->pplib.ucNumStates; i++) { |
2343 | mode_index = 0; | 2340 | mode_index = 0; |
@@ -2418,6 +2415,10 @@ static int radeon_atombios_parse_power_table_6(struct radeon_device *rdev) | |||
2418 | non_clock_info_array = (struct NonClockInfoArray *) | 2415 | non_clock_info_array = (struct NonClockInfoArray *) |
2419 | (mode_info->atom_context->bios + data_offset + | 2416 | (mode_info->atom_context->bios + data_offset + |
2420 | power_info->pplib.usNonClockInfoArrayOffset); | 2417 | power_info->pplib.usNonClockInfoArrayOffset); |
2418 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state) * | ||
2419 | state_array->ucNumEntries, GFP_KERNEL); | ||
2420 | if (!rdev->pm.power_state) | ||
2421 | return state_index; | ||
2421 | for (i = 0; i < state_array->ucNumEntries; i++) { | 2422 | for (i = 0; i < state_array->ucNumEntries; i++) { |
2422 | mode_index = 0; | 2423 | mode_index = 0; |
2423 | power_state = (union pplib_power_state *)&state_array->states[i]; | 2424 | power_state = (union pplib_power_state *)&state_array->states[i]; |
@@ -2491,19 +2492,22 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
2491 | break; | 2492 | break; |
2492 | } | 2493 | } |
2493 | } else { | 2494 | } else { |
2494 | /* add the default mode */ | 2495 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state), GFP_KERNEL); |
2495 | rdev->pm.power_state[state_index].type = | 2496 | if (rdev->pm.power_state) { |
2496 | POWER_STATE_TYPE_DEFAULT; | 2497 | /* add the default mode */ |
2497 | rdev->pm.power_state[state_index].num_clock_modes = 1; | 2498 | rdev->pm.power_state[state_index].type = |
2498 | rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; | 2499 | POWER_STATE_TYPE_DEFAULT; |
2499 | rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; | 2500 | rdev->pm.power_state[state_index].num_clock_modes = 1; |
2500 | rdev->pm.power_state[state_index].default_clock_mode = | 2501 | rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; |
2501 | &rdev->pm.power_state[state_index].clock_info[0]; | 2502 | rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; |
2502 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; | 2503 | rdev->pm.power_state[state_index].default_clock_mode = |
2503 | rdev->pm.power_state[state_index].pcie_lanes = 16; | 2504 | &rdev->pm.power_state[state_index].clock_info[0]; |
2504 | rdev->pm.default_power_state_index = state_index; | 2505 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; |
2505 | rdev->pm.power_state[state_index].flags = 0; | 2506 | rdev->pm.power_state[state_index].pcie_lanes = 16; |
2506 | state_index++; | 2507 | rdev->pm.default_power_state_index = state_index; |
2508 | rdev->pm.power_state[state_index].flags = 0; | ||
2509 | state_index++; | ||
2510 | } | ||
2507 | } | 2511 | } |
2508 | 2512 | ||
2509 | rdev->pm.num_power_states = state_index; | 2513 | rdev->pm.num_power_states = state_index; |
@@ -2619,7 +2623,7 @@ void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev) | |||
2619 | bios_2_scratch &= ~ATOM_S2_VRI_BRIGHT_ENABLE; | 2623 | bios_2_scratch &= ~ATOM_S2_VRI_BRIGHT_ENABLE; |
2620 | 2624 | ||
2621 | /* tell the bios not to handle mode switching */ | 2625 | /* tell the bios not to handle mode switching */ |
2622 | bios_6_scratch |= (ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH | ATOM_S6_ACC_MODE); | 2626 | bios_6_scratch |= ATOM_S6_ACC_BLOCK_DISPLAY_SWITCH; |
2623 | 2627 | ||
2624 | if (rdev->family >= CHIP_R600) { | 2628 | if (rdev->family >= CHIP_R600) { |
2625 | WREG32(R600_BIOS_2_SCRATCH, bios_2_scratch); | 2629 | WREG32(R600_BIOS_2_SCRATCH, bios_2_scratch); |
@@ -2670,10 +2674,13 @@ void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock) | |||
2670 | else | 2674 | else |
2671 | bios_6_scratch = RREG32(RADEON_BIOS_6_SCRATCH); | 2675 | bios_6_scratch = RREG32(RADEON_BIOS_6_SCRATCH); |
2672 | 2676 | ||
2673 | if (lock) | 2677 | if (lock) { |
2674 | bios_6_scratch |= ATOM_S6_CRITICAL_STATE; | 2678 | bios_6_scratch |= ATOM_S6_CRITICAL_STATE; |
2675 | else | 2679 | bios_6_scratch &= ~ATOM_S6_ACC_MODE; |
2680 | } else { | ||
2676 | bios_6_scratch &= ~ATOM_S6_CRITICAL_STATE; | 2681 | bios_6_scratch &= ~ATOM_S6_CRITICAL_STATE; |
2682 | bios_6_scratch |= ATOM_S6_ACC_MODE; | ||
2683 | } | ||
2677 | 2684 | ||
2678 | if (rdev->family >= CHIP_R600) | 2685 | if (rdev->family >= CHIP_R600) |
2679 | WREG32(R600_BIOS_6_SCRATCH, bios_6_scratch); | 2686 | WREG32(R600_BIOS_6_SCRATCH, bios_6_scratch); |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 591fcae8f224..d27ef74590cd 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -2442,6 +2442,17 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev) | |||
2442 | 2442 | ||
2443 | rdev->pm.default_power_state_index = -1; | 2443 | rdev->pm.default_power_state_index = -1; |
2444 | 2444 | ||
2445 | /* allocate 2 power states */ | ||
2446 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state) * 2, GFP_KERNEL); | ||
2447 | if (!rdev->pm.power_state) { | ||
2448 | rdev->pm.default_power_state_index = state_index; | ||
2449 | rdev->pm.num_power_states = 0; | ||
2450 | |||
2451 | rdev->pm.current_power_state_index = rdev->pm.default_power_state_index; | ||
2452 | rdev->pm.current_clock_mode_index = 0; | ||
2453 | return; | ||
2454 | } | ||
2455 | |||
2445 | if (rdev->flags & RADEON_IS_MOBILITY) { | 2456 | if (rdev->flags & RADEON_IS_MOBILITY) { |
2446 | offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE); | 2457 | offset = combios_get_table_offset(dev, COMBIOS_POWERPLAY_INFO_TABLE); |
2447 | if (offset) { | 2458 | if (offset) { |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index d26dabf878d9..2eff98cfd728 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -780,6 +780,115 @@ static int radeon_ddc_dump(struct drm_connector *connector) | |||
780 | return ret; | 780 | return ret; |
781 | } | 781 | } |
782 | 782 | ||
783 | /* avivo */ | ||
784 | static void avivo_get_fb_div(struct radeon_pll *pll, | ||
785 | u32 target_clock, | ||
786 | u32 post_div, | ||
787 | u32 ref_div, | ||
788 | u32 *fb_div, | ||
789 | u32 *frac_fb_div) | ||
790 | { | ||
791 | u32 tmp = post_div * ref_div; | ||
792 | |||
793 | tmp *= target_clock; | ||
794 | *fb_div = tmp / pll->reference_freq; | ||
795 | *frac_fb_div = tmp % pll->reference_freq; | ||
796 | } | ||
797 | |||
798 | static u32 avivo_get_post_div(struct radeon_pll *pll, | ||
799 | u32 target_clock) | ||
800 | { | ||
801 | u32 vco, post_div, tmp; | ||
802 | |||
803 | if (pll->flags & RADEON_PLL_USE_POST_DIV) | ||
804 | return pll->post_div; | ||
805 | |||
806 | if (pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP) { | ||
807 | if (pll->flags & RADEON_PLL_IS_LCD) | ||
808 | vco = pll->lcd_pll_out_min; | ||
809 | else | ||
810 | vco = pll->pll_out_min; | ||
811 | } else { | ||
812 | if (pll->flags & RADEON_PLL_IS_LCD) | ||
813 | vco = pll->lcd_pll_out_max; | ||
814 | else | ||
815 | vco = pll->pll_out_max; | ||
816 | } | ||
817 | |||
818 | post_div = vco / target_clock; | ||
819 | tmp = vco % target_clock; | ||
820 | |||
821 | if (pll->flags & RADEON_PLL_PREFER_MINM_OVER_MAXP) { | ||
822 | if (tmp) | ||
823 | post_div++; | ||
824 | } else { | ||
825 | if (!tmp) | ||
826 | post_div--; | ||
827 | } | ||
828 | |||
829 | return post_div; | ||
830 | } | ||
831 | |||
832 | #define MAX_TOLERANCE 10 | ||
833 | |||
834 | void radeon_compute_pll_avivo(struct radeon_pll *pll, | ||
835 | u32 freq, | ||
836 | u32 *dot_clock_p, | ||
837 | u32 *fb_div_p, | ||
838 | u32 *frac_fb_div_p, | ||
839 | u32 *ref_div_p, | ||
840 | u32 *post_div_p) | ||
841 | { | ||
842 | u32 target_clock = freq / 10; | ||
843 | u32 post_div = avivo_get_post_div(pll, target_clock); | ||
844 | u32 ref_div = pll->min_ref_div; | ||
845 | u32 fb_div = 0, frac_fb_div = 0, tmp; | ||
846 | |||
847 | if (pll->flags & RADEON_PLL_USE_REF_DIV) | ||
848 | ref_div = pll->reference_div; | ||
849 | |||
850 | if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV) { | ||
851 | avivo_get_fb_div(pll, target_clock, post_div, ref_div, &fb_div, &frac_fb_div); | ||
852 | frac_fb_div = (100 * frac_fb_div) / pll->reference_freq; | ||
853 | if (frac_fb_div >= 5) { | ||
854 | frac_fb_div -= 5; | ||
855 | frac_fb_div = frac_fb_div / 10; | ||
856 | frac_fb_div++; | ||
857 | } | ||
858 | if (frac_fb_div >= 10) { | ||
859 | fb_div++; | ||
860 | frac_fb_div = 0; | ||
861 | } | ||
862 | } else { | ||
863 | while (ref_div <= pll->max_ref_div) { | ||
864 | avivo_get_fb_div(pll, target_clock, post_div, ref_div, | ||
865 | &fb_div, &frac_fb_div); | ||
866 | if (frac_fb_div >= (pll->reference_freq / 2)) | ||
867 | fb_div++; | ||
868 | frac_fb_div = 0; | ||
869 | tmp = (pll->reference_freq * fb_div) / (post_div * ref_div); | ||
870 | tmp = (tmp * 10000) / target_clock; | ||
871 | |||
872 | if (tmp > (10000 + MAX_TOLERANCE)) | ||
873 | ref_div++; | ||
874 | else if (tmp >= (10000 - MAX_TOLERANCE)) | ||
875 | break; | ||
876 | else | ||
877 | ref_div++; | ||
878 | } | ||
879 | } | ||
880 | |||
881 | *dot_clock_p = ((pll->reference_freq * fb_div * 10) + (pll->reference_freq * frac_fb_div)) / | ||
882 | (ref_div * post_div * 10); | ||
883 | *fb_div_p = fb_div; | ||
884 | *frac_fb_div_p = frac_fb_div; | ||
885 | *ref_div_p = ref_div; | ||
886 | *post_div_p = post_div; | ||
887 | DRM_DEBUG_KMS("%d, pll dividers - fb: %d.%d ref: %d, post %d\n", | ||
888 | *dot_clock_p, fb_div, frac_fb_div, ref_div, post_div); | ||
889 | } | ||
890 | |||
891 | /* pre-avivo */ | ||
783 | static inline uint32_t radeon_div(uint64_t n, uint32_t d) | 892 | static inline uint32_t radeon_div(uint64_t n, uint32_t d) |
784 | { | 893 | { |
785 | uint64_t mod; | 894 | uint64_t mod; |
@@ -790,13 +899,13 @@ static inline uint32_t radeon_div(uint64_t n, uint32_t d) | |||
790 | return n; | 899 | return n; |
791 | } | 900 | } |
792 | 901 | ||
793 | void radeon_compute_pll(struct radeon_pll *pll, | 902 | void radeon_compute_pll_legacy(struct radeon_pll *pll, |
794 | uint64_t freq, | 903 | uint64_t freq, |
795 | uint32_t *dot_clock_p, | 904 | uint32_t *dot_clock_p, |
796 | uint32_t *fb_div_p, | 905 | uint32_t *fb_div_p, |
797 | uint32_t *frac_fb_div_p, | 906 | uint32_t *frac_fb_div_p, |
798 | uint32_t *ref_div_p, | 907 | uint32_t *ref_div_p, |
799 | uint32_t *post_div_p) | 908 | uint32_t *post_div_p) |
800 | { | 909 | { |
801 | uint32_t min_ref_div = pll->min_ref_div; | 910 | uint32_t min_ref_div = pll->min_ref_div; |
802 | uint32_t max_ref_div = pll->max_ref_div; | 911 | uint32_t max_ref_div = pll->max_ref_div; |
@@ -826,6 +935,9 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
826 | pll_out_max = pll->pll_out_max; | 935 | pll_out_max = pll->pll_out_max; |
827 | } | 936 | } |
828 | 937 | ||
938 | if (pll_out_min > 64800) | ||
939 | pll_out_min = 64800; | ||
940 | |||
829 | if (pll->flags & RADEON_PLL_USE_REF_DIV) | 941 | if (pll->flags & RADEON_PLL_USE_REF_DIV) |
830 | min_ref_div = max_ref_div = pll->reference_div; | 942 | min_ref_div = max_ref_div = pll->reference_div; |
831 | else { | 943 | else { |
@@ -849,7 +961,7 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
849 | max_fractional_feed_div = pll->max_frac_feedback_div; | 961 | max_fractional_feed_div = pll->max_frac_feedback_div; |
850 | } | 962 | } |
851 | 963 | ||
852 | for (post_div = max_post_div; post_div >= min_post_div; --post_div) { | 964 | for (post_div = min_post_div; post_div <= max_post_div; ++post_div) { |
853 | uint32_t ref_div; | 965 | uint32_t ref_div; |
854 | 966 | ||
855 | if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) | 967 | if ((pll->flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) |
@@ -965,6 +1077,10 @@ void radeon_compute_pll(struct radeon_pll *pll, | |||
965 | *frac_fb_div_p = best_frac_feedback_div; | 1077 | *frac_fb_div_p = best_frac_feedback_div; |
966 | *ref_div_p = best_ref_div; | 1078 | *ref_div_p = best_ref_div; |
967 | *post_div_p = best_post_div; | 1079 | *post_div_p = best_post_div; |
1080 | DRM_DEBUG_KMS("%d %d, pll dividers - fb: %d.%d ref: %d, post %d\n", | ||
1081 | freq, best_freq / 1000, best_feedback_div, best_frac_feedback_div, | ||
1082 | best_ref_div, best_post_div); | ||
1083 | |||
968 | } | 1084 | } |
969 | 1085 | ||
970 | static void radeon_user_framebuffer_destroy(struct drm_framebuffer *fb) | 1086 | static void radeon_user_framebuffer_destroy(struct drm_framebuffer *fb) |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 5e90984d5ad2..d4a542247618 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -1063,7 +1063,7 @@ atombios_set_edp_panel_power(struct drm_connector *connector, int action) | |||
1063 | if (!ASIC_IS_DCE4(rdev)) | 1063 | if (!ASIC_IS_DCE4(rdev)) |
1064 | return; | 1064 | return; |
1065 | 1065 | ||
1066 | if ((action != ATOM_TRANSMITTER_ACTION_POWER_ON) || | 1066 | if ((action != ATOM_TRANSMITTER_ACTION_POWER_ON) && |
1067 | (action != ATOM_TRANSMITTER_ACTION_POWER_OFF)) | 1067 | (action != ATOM_TRANSMITTER_ACTION_POWER_OFF)) |
1068 | return; | 1068 | return; |
1069 | 1069 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index ace2e6384d40..cf0638c3b7c7 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -778,9 +778,9 @@ static void radeon_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
778 | DRM_DEBUG_KMS("\n"); | 778 | DRM_DEBUG_KMS("\n"); |
779 | 779 | ||
780 | if (!use_bios_divs) { | 780 | if (!use_bios_divs) { |
781 | radeon_compute_pll(pll, mode->clock, | 781 | radeon_compute_pll_legacy(pll, mode->clock, |
782 | &freq, &feedback_div, &frac_fb_div, | 782 | &freq, &feedback_div, &frac_fb_div, |
783 | &reference_div, &post_divider); | 783 | &reference_div, &post_divider); |
784 | 784 | ||
785 | for (post_div = &post_divs[0]; post_div->divider; ++post_div) { | 785 | for (post_div = &post_divs[0]; post_div->divider; ++post_div) { |
786 | if (post_div->divider == post_divider) | 786 | if (post_div->divider == post_divider) |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 12bdeab91c86..6794cdf91f28 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -149,6 +149,7 @@ struct radeon_tmds_pll { | |||
149 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) | 149 | #define RADEON_PLL_PREFER_CLOSEST_LOWER (1 << 11) |
150 | #define RADEON_PLL_USE_POST_DIV (1 << 12) | 150 | #define RADEON_PLL_USE_POST_DIV (1 << 12) |
151 | #define RADEON_PLL_IS_LCD (1 << 13) | 151 | #define RADEON_PLL_IS_LCD (1 << 13) |
152 | #define RADEON_PLL_PREFER_MINM_OVER_MAXP (1 << 14) | ||
152 | 153 | ||
153 | struct radeon_pll { | 154 | struct radeon_pll { |
154 | /* reference frequency */ | 155 | /* reference frequency */ |
@@ -510,13 +511,21 @@ extern bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, | |||
510 | struct radeon_atom_ss *ss, | 511 | struct radeon_atom_ss *ss, |
511 | int id, u32 clock); | 512 | int id, u32 clock); |
512 | 513 | ||
513 | extern void radeon_compute_pll(struct radeon_pll *pll, | 514 | extern void radeon_compute_pll_legacy(struct radeon_pll *pll, |
514 | uint64_t freq, | 515 | uint64_t freq, |
515 | uint32_t *dot_clock_p, | 516 | uint32_t *dot_clock_p, |
516 | uint32_t *fb_div_p, | 517 | uint32_t *fb_div_p, |
517 | uint32_t *frac_fb_div_p, | 518 | uint32_t *frac_fb_div_p, |
518 | uint32_t *ref_div_p, | 519 | uint32_t *ref_div_p, |
519 | uint32_t *post_div_p); | 520 | uint32_t *post_div_p); |
521 | |||
522 | extern void radeon_compute_pll_avivo(struct radeon_pll *pll, | ||
523 | u32 freq, | ||
524 | u32 *dot_clock_p, | ||
525 | u32 *fb_div_p, | ||
526 | u32 *frac_fb_div_p, | ||
527 | u32 *ref_div_p, | ||
528 | u32 *post_div_p); | ||
520 | 529 | ||
521 | extern void radeon_setup_encoder_clones(struct drm_device *dev); | 530 | extern void radeon_setup_encoder_clones(struct drm_device *dev); |
522 | 531 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 3b1b2bf9cdd5..2aed03bde4b2 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -430,7 +430,7 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, | |||
430 | { | 430 | { |
431 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); | 431 | struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev)); |
432 | struct radeon_device *rdev = ddev->dev_private; | 432 | struct radeon_device *rdev = ddev->dev_private; |
433 | u32 temp; | 433 | int temp; |
434 | 434 | ||
435 | switch (rdev->pm.int_thermal_type) { | 435 | switch (rdev->pm.int_thermal_type) { |
436 | case THERMAL_TYPE_RV6XX: | 436 | case THERMAL_TYPE_RV6XX: |
@@ -646,6 +646,9 @@ void radeon_pm_fini(struct radeon_device *rdev) | |||
646 | #endif | 646 | #endif |
647 | } | 647 | } |
648 | 648 | ||
649 | if (rdev->pm.power_state) | ||
650 | kfree(rdev->pm.power_state); | ||
651 | |||
649 | radeon_hwmon_fini(rdev); | 652 | radeon_hwmon_fini(rdev); |
650 | } | 653 | } |
651 | 654 | ||
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 491dc9000655..2211a323db41 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -78,18 +78,23 @@ u32 rv770_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | |||
78 | } | 78 | } |
79 | 79 | ||
80 | /* get temperature in millidegrees */ | 80 | /* get temperature in millidegrees */ |
81 | u32 rv770_get_temp(struct radeon_device *rdev) | 81 | int rv770_get_temp(struct radeon_device *rdev) |
82 | { | 82 | { |
83 | u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >> | 83 | u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >> |
84 | ASIC_T_SHIFT; | 84 | ASIC_T_SHIFT; |
85 | u32 actual_temp = 0; | 85 | int actual_temp; |
86 | 86 | ||
87 | if ((temp >> 9) & 1) | 87 | if (temp & 0x400) |
88 | actual_temp = 0; | 88 | actual_temp = -256; |
89 | else | 89 | else if (temp & 0x200) |
90 | actual_temp = (temp >> 1) & 0xff; | 90 | actual_temp = 255; |
91 | 91 | else if (temp & 0x100) { | |
92 | return actual_temp * 1000; | 92 | actual_temp = temp & 0x1ff; |
93 | actual_temp |= ~0x1ff; | ||
94 | } else | ||
95 | actual_temp = temp & 0xff; | ||
96 | |||
97 | return (actual_temp * 1000) / 2; | ||
93 | } | 98 | } |
94 | 99 | ||
95 | void rv770_pm_misc(struct radeon_device *rdev) | 100 | void rv770_pm_misc(struct radeon_device *rdev) |
diff --git a/drivers/isdn/icn/icn.c b/drivers/isdn/icn/icn.c index f2b5bab5e6a1..1f355bb85e54 100644 --- a/drivers/isdn/icn/icn.c +++ b/drivers/isdn/icn/icn.c | |||
@@ -1627,7 +1627,7 @@ __setup("icn=", icn_setup); | |||
1627 | static int __init icn_init(void) | 1627 | static int __init icn_init(void) |
1628 | { | 1628 | { |
1629 | char *p; | 1629 | char *p; |
1630 | char rev[20]; | 1630 | char rev[21]; |
1631 | 1631 | ||
1632 | memset(&dev, 0, sizeof(icn_dev)); | 1632 | memset(&dev, 0, sizeof(icn_dev)); |
1633 | dev.memaddr = (membase & 0x0ffc000); | 1633 | dev.memaddr = (membase & 0x0ffc000); |
@@ -1638,6 +1638,7 @@ static int __init icn_init(void) | |||
1638 | 1638 | ||
1639 | if ((p = strchr(revision, ':'))) { | 1639 | if ((p = strchr(revision, ':'))) { |
1640 | strncpy(rev, p + 1, 20); | 1640 | strncpy(rev, p + 1, 20); |
1641 | rev[20] = '\0'; | ||
1641 | p = strchr(rev, '$'); | 1642 | p = strchr(rev, '$'); |
1642 | if (p) | 1643 | if (p) |
1643 | *p = 0; | 1644 | *p = 0; |
diff --git a/drivers/net/atl1c/atl1c_main.c b/drivers/net/atl1c/atl1c_main.c index a699bbf20eb5..3824382faecc 100644 --- a/drivers/net/atl1c/atl1c_main.c +++ b/drivers/net/atl1c/atl1c_main.c | |||
@@ -48,6 +48,7 @@ static DEFINE_PCI_DEVICE_TABLE(atl1c_pci_tbl) = { | |||
48 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, | 48 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B)}, |
49 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, | 49 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L2C_B2)}, |
50 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, | 50 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D)}, |
51 | {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATHEROS_L1D_2_0)}, | ||
51 | /* required last entry */ | 52 | /* required last entry */ |
52 | { 0 } | 53 | { 0 } |
53 | }; | 54 | }; |
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c index de40d3b7152f..28a32a6c8bf1 100644 --- a/drivers/net/benet/be_main.c +++ b/drivers/net/benet/be_main.c | |||
@@ -312,11 +312,9 @@ void be_link_status_update(struct be_adapter *adapter, bool link_up) | |||
312 | if (adapter->link_up != link_up) { | 312 | if (adapter->link_up != link_up) { |
313 | adapter->link_speed = -1; | 313 | adapter->link_speed = -1; |
314 | if (link_up) { | 314 | if (link_up) { |
315 | netif_start_queue(netdev); | ||
316 | netif_carrier_on(netdev); | 315 | netif_carrier_on(netdev); |
317 | printk(KERN_INFO "%s: Link up\n", netdev->name); | 316 | printk(KERN_INFO "%s: Link up\n", netdev->name); |
318 | } else { | 317 | } else { |
319 | netif_stop_queue(netdev); | ||
320 | netif_carrier_off(netdev); | 318 | netif_carrier_off(netdev); |
321 | printk(KERN_INFO "%s: Link down\n", netdev->name); | 319 | printk(KERN_INFO "%s: Link down\n", netdev->name); |
322 | } | 320 | } |
@@ -2628,8 +2626,6 @@ static void be_netdev_init(struct net_device *netdev) | |||
2628 | 2626 | ||
2629 | netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc, | 2627 | netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc, |
2630 | BE_NAPI_WEIGHT); | 2628 | BE_NAPI_WEIGHT); |
2631 | |||
2632 | netif_stop_queue(netdev); | ||
2633 | } | 2629 | } |
2634 | 2630 | ||
2635 | static void be_unmap_pci_bars(struct be_adapter *adapter) | 2631 | static void be_unmap_pci_bars(struct be_adapter *adapter) |
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 8e4183717d91..653c62475cb6 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h | |||
@@ -22,8 +22,8 @@ | |||
22 | * (you will need to reboot afterwards) */ | 22 | * (you will need to reboot afterwards) */ |
23 | /* #define BNX2X_STOP_ON_ERROR */ | 23 | /* #define BNX2X_STOP_ON_ERROR */ |
24 | 24 | ||
25 | #define DRV_MODULE_VERSION "1.62.00-4" | 25 | #define DRV_MODULE_VERSION "1.62.00-5" |
26 | #define DRV_MODULE_RELDATE "2011/01/18" | 26 | #define DRV_MODULE_RELDATE "2011/01/30" |
27 | #define BNX2X_BC_VER 0x040200 | 27 | #define BNX2X_BC_VER 0x040200 |
28 | 28 | ||
29 | #define BNX2X_MULTI_QUEUE | 29 | #define BNX2X_MULTI_QUEUE |
diff --git a/drivers/net/bnx2x/bnx2x_link.c b/drivers/net/bnx2x/bnx2x_link.c index 7160ec51093e..dd1210fddfff 100644 --- a/drivers/net/bnx2x/bnx2x_link.c +++ b/drivers/net/bnx2x/bnx2x_link.c | |||
@@ -3948,48 +3948,6 @@ static u8 bnx2x_8073_8727_external_rom_boot(struct bnx2x *bp, | |||
3948 | return rc; | 3948 | return rc; |
3949 | } | 3949 | } |
3950 | 3950 | ||
3951 | static void bnx2x_8073_set_xaui_low_power_mode(struct bnx2x *bp, | ||
3952 | struct bnx2x_phy *phy) | ||
3953 | { | ||
3954 | u16 val; | ||
3955 | bnx2x_cl45_read(bp, phy, | ||
3956 | MDIO_PMA_DEVAD, MDIO_PMA_REG_8073_CHIP_REV, &val); | ||
3957 | |||
3958 | if (val == 0) { | ||
3959 | /* Mustn't set low power mode in 8073 A0 */ | ||
3960 | return; | ||
3961 | } | ||
3962 | |||
3963 | /* Disable PLL sequencer (use read-modify-write to clear bit 13) */ | ||
3964 | bnx2x_cl45_read(bp, phy, | ||
3965 | MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, &val); | ||
3966 | val &= ~(1<<13); | ||
3967 | bnx2x_cl45_write(bp, phy, | ||
3968 | MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val); | ||
3969 | |||
3970 | /* PLL controls */ | ||
3971 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805E, 0x1077); | ||
3972 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805D, 0x0000); | ||
3973 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805C, 0x030B); | ||
3974 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805B, 0x1240); | ||
3975 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x805A, 0x2490); | ||
3976 | |||
3977 | /* Tx Controls */ | ||
3978 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A7, 0x0C74); | ||
3979 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A6, 0x9041); | ||
3980 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80A5, 0x4640); | ||
3981 | |||
3982 | /* Rx Controls */ | ||
3983 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FE, 0x01C4); | ||
3984 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FD, 0x9249); | ||
3985 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, 0x80FC, 0x2015); | ||
3986 | |||
3987 | /* Enable PLL sequencer (use read-modify-write to set bit 13) */ | ||
3988 | bnx2x_cl45_read(bp, phy, MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, &val); | ||
3989 | val |= (1<<13); | ||
3990 | bnx2x_cl45_write(bp, phy, MDIO_XS_DEVAD, MDIO_XS_PLL_SEQUENCER, val); | ||
3991 | } | ||
3992 | |||
3993 | /******************************************************************/ | 3951 | /******************************************************************/ |
3994 | /* BCM8073 PHY SECTION */ | 3952 | /* BCM8073 PHY SECTION */ |
3995 | /******************************************************************/ | 3953 | /******************************************************************/ |
@@ -4148,8 +4106,6 @@ static u8 bnx2x_8073_config_init(struct bnx2x_phy *phy, | |||
4148 | 4106 | ||
4149 | bnx2x_8073_set_pause_cl37(params, phy, vars); | 4107 | bnx2x_8073_set_pause_cl37(params, phy, vars); |
4150 | 4108 | ||
4151 | bnx2x_8073_set_xaui_low_power_mode(bp, phy); | ||
4152 | |||
4153 | bnx2x_cl45_read(bp, phy, | 4109 | bnx2x_cl45_read(bp, phy, |
4154 | MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &tmp1); | 4110 | MDIO_PMA_DEVAD, MDIO_PMA_REG_M8051_MSGOUT_REG, &tmp1); |
4155 | 4111 | ||
@@ -6519,6 +6475,18 @@ static void bnx2x_848xx_set_link_led(struct bnx2x_phy *phy, | |||
6519 | MDIO_PMA_DEVAD, | 6475 | MDIO_PMA_DEVAD, |
6520 | MDIO_PMA_REG_8481_LED1_MASK, | 6476 | MDIO_PMA_REG_8481_LED1_MASK, |
6521 | 0x80); | 6477 | 0x80); |
6478 | |||
6479 | /* Tell LED3 to blink on source */ | ||
6480 | bnx2x_cl45_read(bp, phy, | ||
6481 | MDIO_PMA_DEVAD, | ||
6482 | MDIO_PMA_REG_8481_LINK_SIGNAL, | ||
6483 | &val); | ||
6484 | val &= ~(7<<6); | ||
6485 | val |= (1<<6); /* A83B[8:6]= 1 */ | ||
6486 | bnx2x_cl45_write(bp, phy, | ||
6487 | MDIO_PMA_DEVAD, | ||
6488 | MDIO_PMA_REG_8481_LINK_SIGNAL, | ||
6489 | val); | ||
6522 | } | 6490 | } |
6523 | break; | 6491 | break; |
6524 | } | 6492 | } |
@@ -7720,10 +7688,13 @@ static u8 bnx2x_8073_common_init_phy(struct bnx2x *bp, | |||
7720 | struct bnx2x_phy phy[PORT_MAX]; | 7688 | struct bnx2x_phy phy[PORT_MAX]; |
7721 | struct bnx2x_phy *phy_blk[PORT_MAX]; | 7689 | struct bnx2x_phy *phy_blk[PORT_MAX]; |
7722 | u16 val; | 7690 | u16 val; |
7723 | s8 port; | 7691 | s8 port = 0; |
7724 | s8 port_of_path = 0; | 7692 | s8 port_of_path = 0; |
7725 | 7693 | u32 swap_val, swap_override; | |
7726 | bnx2x_ext_phy_hw_reset(bp, 0); | 7694 | swap_val = REG_RD(bp, NIG_REG_PORT_SWAP); |
7695 | swap_override = REG_RD(bp, NIG_REG_STRAP_OVERRIDE); | ||
7696 | port ^= (swap_val && swap_override); | ||
7697 | bnx2x_ext_phy_hw_reset(bp, port); | ||
7727 | /* PART1 - Reset both phys */ | 7698 | /* PART1 - Reset both phys */ |
7728 | for (port = PORT_MAX - 1; port >= PORT_0; port--) { | 7699 | for (port = PORT_MAX - 1; port >= PORT_0; port--) { |
7729 | u32 shmem_base, shmem2_base; | 7700 | u32 shmem_base, shmem2_base; |
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index 8cdcf5b39d1e..f40740e68ea5 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -2301,15 +2301,10 @@ static void bnx2x_rxq_set_mac_filters(struct bnx2x *bp, u16 cl_id, u32 filters) | |||
2301 | /* accept matched ucast */ | 2301 | /* accept matched ucast */ |
2302 | drop_all_ucast = 0; | 2302 | drop_all_ucast = 0; |
2303 | } | 2303 | } |
2304 | if (filters & BNX2X_ACCEPT_MULTICAST) { | 2304 | if (filters & BNX2X_ACCEPT_MULTICAST) |
2305 | /* accept matched mcast */ | 2305 | /* accept matched mcast */ |
2306 | drop_all_mcast = 0; | 2306 | drop_all_mcast = 0; |
2307 | if (IS_MF_SI(bp)) | 2307 | |
2308 | /* since mcast addresses won't arrive with ovlan, | ||
2309 | * fw needs to accept all of them in | ||
2310 | * switch-independent mode */ | ||
2311 | accp_all_mcast = 1; | ||
2312 | } | ||
2313 | if (filters & BNX2X_ACCEPT_ALL_UNICAST) { | 2308 | if (filters & BNX2X_ACCEPT_ALL_UNICAST) { |
2314 | /* accept all mcast */ | 2309 | /* accept all mcast */ |
2315 | drop_all_ucast = 0; | 2310 | drop_all_ucast = 0; |
@@ -5296,10 +5291,6 @@ static int bnx2x_init_hw_common(struct bnx2x *bp, u32 load_code) | |||
5296 | } | 5291 | } |
5297 | } | 5292 | } |
5298 | 5293 | ||
5299 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
5300 | bp->common.shmem_base, | ||
5301 | bp->common.shmem2_base); | ||
5302 | |||
5303 | bnx2x_setup_fan_failure_detection(bp); | 5294 | bnx2x_setup_fan_failure_detection(bp); |
5304 | 5295 | ||
5305 | /* clear PXP2 attentions */ | 5296 | /* clear PXP2 attentions */ |
@@ -5503,9 +5494,6 @@ static int bnx2x_init_hw_port(struct bnx2x *bp) | |||
5503 | 5494 | ||
5504 | bnx2x_init_block(bp, MCP_BLOCK, init_stage); | 5495 | bnx2x_init_block(bp, MCP_BLOCK, init_stage); |
5505 | bnx2x_init_block(bp, DMAE_BLOCK, init_stage); | 5496 | bnx2x_init_block(bp, DMAE_BLOCK, init_stage); |
5506 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
5507 | bp->common.shmem_base, | ||
5508 | bp->common.shmem2_base); | ||
5509 | if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base, | 5497 | if (bnx2x_fan_failure_det_req(bp, bp->common.shmem_base, |
5510 | bp->common.shmem2_base, port)) { | 5498 | bp->common.shmem2_base, port)) { |
5511 | u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : | 5499 | u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : |
@@ -8379,6 +8367,17 @@ static void __devinit bnx2x_get_port_hwinfo(struct bnx2x *bp) | |||
8379 | (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) | 8367 | (ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_NOT_CONN)) |
8380 | bp->mdio.prtad = | 8368 | bp->mdio.prtad = |
8381 | XGXS_EXT_PHY_ADDR(ext_phy_config); | 8369 | XGXS_EXT_PHY_ADDR(ext_phy_config); |
8370 | |||
8371 | /* | ||
8372 | * Check if hw lock is required to access MDC/MDIO bus to the PHY(s) | ||
8373 | * In MF mode, it is set to cover self test cases | ||
8374 | */ | ||
8375 | if (IS_MF(bp)) | ||
8376 | bp->port.need_hw_lock = 1; | ||
8377 | else | ||
8378 | bp->port.need_hw_lock = bnx2x_hw_lock_required(bp, | ||
8379 | bp->common.shmem_base, | ||
8380 | bp->common.shmem2_base); | ||
8382 | } | 8381 | } |
8383 | 8382 | ||
8384 | static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp) | 8383 | static void __devinit bnx2x_get_mac_hwinfo(struct bnx2x *bp) |
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig index 986195eaa57c..5dec456fd4a4 100644 --- a/drivers/net/can/Kconfig +++ b/drivers/net/can/Kconfig | |||
@@ -23,7 +23,7 @@ config CAN_SLCAN | |||
23 | 23 | ||
24 | As only the sending and receiving of CAN frames is implemented, this | 24 | As only the sending and receiving of CAN frames is implemented, this |
25 | driver should work with the (serial/USB) CAN hardware from: | 25 | driver should work with the (serial/USB) CAN hardware from: |
26 | www.canusb.com / www.can232.com / www.mictronic.com / www.canhack.de | 26 | www.canusb.com / www.can232.com / www.mictronics.de / www.canhack.de |
27 | 27 | ||
28 | Userspace tools to attach the SLCAN line discipline (slcan_attach, | 28 | Userspace tools to attach the SLCAN line discipline (slcan_attach, |
29 | slcand) can be found in the can-utils at the SocketCAN SVN, see | 29 | slcand) can be found in the can-utils at the SocketCAN SVN, see |
diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c index 2532b9631538..57d2ffbbb433 100644 --- a/drivers/net/can/at91_can.c +++ b/drivers/net/can/at91_can.c | |||
@@ -1109,7 +1109,7 @@ static ssize_t at91_sysfs_set_mb0_id(struct device *dev, | |||
1109 | return ret; | 1109 | return ret; |
1110 | } | 1110 | } |
1111 | 1111 | ||
1112 | static DEVICE_ATTR(mb0_id, S_IWUGO | S_IRUGO, | 1112 | static DEVICE_ATTR(mb0_id, S_IWUSR | S_IRUGO, |
1113 | at91_sysfs_show_mb0_id, at91_sysfs_set_mb0_id); | 1113 | at91_sysfs_show_mb0_id, at91_sysfs_set_mb0_id); |
1114 | 1114 | ||
1115 | static struct attribute *at91_sysfs_attrs[] = { | 1115 | static struct attribute *at91_sysfs_attrs[] = { |
diff --git a/drivers/net/can/janz-ican3.c b/drivers/net/can/janz-ican3.c index b9a6d7a5a739..366f5cc050ae 100644 --- a/drivers/net/can/janz-ican3.c +++ b/drivers/net/can/janz-ican3.c | |||
@@ -1618,7 +1618,7 @@ static ssize_t ican3_sysfs_set_term(struct device *dev, | |||
1618 | return count; | 1618 | return count; |
1619 | } | 1619 | } |
1620 | 1620 | ||
1621 | static DEVICE_ATTR(termination, S_IWUGO | S_IRUGO, ican3_sysfs_show_term, | 1621 | static DEVICE_ATTR(termination, S_IWUSR | S_IRUGO, ican3_sysfs_show_term, |
1622 | ican3_sysfs_set_term); | 1622 | ican3_sysfs_set_term); |
1623 | 1623 | ||
1624 | static struct attribute *ican3_sysfs_attrs[] = { | 1624 | static struct attribute *ican3_sysfs_attrs[] = { |
diff --git a/drivers/net/can/softing/Kconfig b/drivers/net/can/softing/Kconfig index 92bd6bdde5e3..8ba81b3ddd90 100644 --- a/drivers/net/can/softing/Kconfig +++ b/drivers/net/can/softing/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config CAN_SOFTING | 1 | config CAN_SOFTING |
2 | tristate "Softing Gmbh CAN generic support" | 2 | tristate "Softing Gmbh CAN generic support" |
3 | depends on CAN_DEV | 3 | depends on CAN_DEV && HAS_IOMEM |
4 | ---help--- | 4 | ---help--- |
5 | Support for CAN cards from Softing Gmbh & some cards | 5 | Support for CAN cards from Softing Gmbh & some cards |
6 | from Vector Gmbh. | 6 | from Vector Gmbh. |
diff --git a/drivers/net/depca.c b/drivers/net/depca.c index 1b48b68ad4fd..8b0084d17c8c 100644 --- a/drivers/net/depca.c +++ b/drivers/net/depca.c | |||
@@ -1094,7 +1094,7 @@ static int depca_rx(struct net_device *dev) | |||
1094 | } | 1094 | } |
1095 | } | 1095 | } |
1096 | /* Change buffer ownership for this last frame, back to the adapter */ | 1096 | /* Change buffer ownership for this last frame, back to the adapter */ |
1097 | for (; lp->rx_old != entry; lp->rx_old = (++lp->rx_old) & lp->rxRingMask) { | 1097 | for (; lp->rx_old != entry; lp->rx_old = (lp->rx_old + 1) & lp->rxRingMask) { |
1098 | writel(readl(&lp->rx_ring[lp->rx_old].base) | R_OWN, &lp->rx_ring[lp->rx_old].base); | 1098 | writel(readl(&lp->rx_ring[lp->rx_old].base) | R_OWN, &lp->rx_ring[lp->rx_old].base); |
1099 | } | 1099 | } |
1100 | writel(readl(&lp->rx_ring[entry].base) | R_OWN, &lp->rx_ring[entry].base); | 1100 | writel(readl(&lp->rx_ring[entry].base) | R_OWN, &lp->rx_ring[entry].base); |
@@ -1103,7 +1103,7 @@ static int depca_rx(struct net_device *dev) | |||
1103 | /* | 1103 | /* |
1104 | ** Update entry information | 1104 | ** Update entry information |
1105 | */ | 1105 | */ |
1106 | lp->rx_new = (++lp->rx_new) & lp->rxRingMask; | 1106 | lp->rx_new = (lp->rx_new + 1) & lp->rxRingMask; |
1107 | } | 1107 | } |
1108 | 1108 | ||
1109 | return 0; | 1109 | return 0; |
@@ -1148,7 +1148,7 @@ static int depca_tx(struct net_device *dev) | |||
1148 | } | 1148 | } |
1149 | 1149 | ||
1150 | /* Update all the pointers */ | 1150 | /* Update all the pointers */ |
1151 | lp->tx_old = (++lp->tx_old) & lp->txRingMask; | 1151 | lp->tx_old = (lp->tx_old + 1) & lp->txRingMask; |
1152 | } | 1152 | } |
1153 | 1153 | ||
1154 | return 0; | 1154 | return 0; |
diff --git a/drivers/net/dl2k.c b/drivers/net/dl2k.c index e1a8216ff692..c05db6046050 100644 --- a/drivers/net/dl2k.c +++ b/drivers/net/dl2k.c | |||
@@ -1753,8 +1753,6 @@ rio_close (struct net_device *dev) | |||
1753 | 1753 | ||
1754 | /* Free all the skbuffs in the queue. */ | 1754 | /* Free all the skbuffs in the queue. */ |
1755 | for (i = 0; i < RX_RING_SIZE; i++) { | 1755 | for (i = 0; i < RX_RING_SIZE; i++) { |
1756 | np->rx_ring[i].status = 0; | ||
1757 | np->rx_ring[i].fraginfo = 0; | ||
1758 | skb = np->rx_skbuff[i]; | 1756 | skb = np->rx_skbuff[i]; |
1759 | if (skb) { | 1757 | if (skb) { |
1760 | pci_unmap_single(np->pdev, | 1758 | pci_unmap_single(np->pdev, |
@@ -1763,6 +1761,8 @@ rio_close (struct net_device *dev) | |||
1763 | dev_kfree_skb (skb); | 1761 | dev_kfree_skb (skb); |
1764 | np->rx_skbuff[i] = NULL; | 1762 | np->rx_skbuff[i] = NULL; |
1765 | } | 1763 | } |
1764 | np->rx_ring[i].status = 0; | ||
1765 | np->rx_ring[i].fraginfo = 0; | ||
1766 | } | 1766 | } |
1767 | for (i = 0; i < TX_RING_SIZE; i++) { | 1767 | for (i = 0; i < TX_RING_SIZE; i++) { |
1768 | skb = np->tx_skbuff[i]; | 1768 | skb = np->tx_skbuff[i]; |
diff --git a/drivers/net/enc28j60.c b/drivers/net/enc28j60.c index 112c5aa9af7f..907b05a1c659 100644 --- a/drivers/net/enc28j60.c +++ b/drivers/net/enc28j60.c | |||
@@ -812,7 +812,7 @@ static void enc28j60_read_tsv(struct enc28j60_net *priv, u8 tsv[TSV_SIZE]) | |||
812 | if (netif_msg_hw(priv)) | 812 | if (netif_msg_hw(priv)) |
813 | printk(KERN_DEBUG DRV_NAME ": reading TSV at addr:0x%04x\n", | 813 | printk(KERN_DEBUG DRV_NAME ": reading TSV at addr:0x%04x\n", |
814 | endptr + 1); | 814 | endptr + 1); |
815 | enc28j60_mem_read(priv, endptr + 1, sizeof(tsv), tsv); | 815 | enc28j60_mem_read(priv, endptr + 1, TSV_SIZE, tsv); |
816 | } | 816 | } |
817 | 817 | ||
818 | static void enc28j60_dump_tsv(struct enc28j60_net *priv, const char *msg, | 818 | static void enc28j60_dump_tsv(struct enc28j60_net *priv, const char *msg, |
diff --git a/drivers/net/niu.c b/drivers/net/niu.c index 2541321bad82..9fb59d3f9c92 100644 --- a/drivers/net/niu.c +++ b/drivers/net/niu.c | |||
@@ -4489,6 +4489,9 @@ static int niu_alloc_channels(struct niu *np) | |||
4489 | { | 4489 | { |
4490 | struct niu_parent *parent = np->parent; | 4490 | struct niu_parent *parent = np->parent; |
4491 | int first_rx_channel, first_tx_channel; | 4491 | int first_rx_channel, first_tx_channel; |
4492 | int num_rx_rings, num_tx_rings; | ||
4493 | struct rx_ring_info *rx_rings; | ||
4494 | struct tx_ring_info *tx_rings; | ||
4492 | int i, port, err; | 4495 | int i, port, err; |
4493 | 4496 | ||
4494 | port = np->port; | 4497 | port = np->port; |
@@ -4498,18 +4501,21 @@ static int niu_alloc_channels(struct niu *np) | |||
4498 | first_tx_channel += parent->txchan_per_port[i]; | 4501 | first_tx_channel += parent->txchan_per_port[i]; |
4499 | } | 4502 | } |
4500 | 4503 | ||
4501 | np->num_rx_rings = parent->rxchan_per_port[port]; | 4504 | num_rx_rings = parent->rxchan_per_port[port]; |
4502 | np->num_tx_rings = parent->txchan_per_port[port]; | 4505 | num_tx_rings = parent->txchan_per_port[port]; |
4503 | 4506 | ||
4504 | netif_set_real_num_rx_queues(np->dev, np->num_rx_rings); | 4507 | rx_rings = kcalloc(num_rx_rings, sizeof(struct rx_ring_info), |
4505 | netif_set_real_num_tx_queues(np->dev, np->num_tx_rings); | 4508 | GFP_KERNEL); |
4506 | |||
4507 | np->rx_rings = kcalloc(np->num_rx_rings, sizeof(struct rx_ring_info), | ||
4508 | GFP_KERNEL); | ||
4509 | err = -ENOMEM; | 4509 | err = -ENOMEM; |
4510 | if (!np->rx_rings) | 4510 | if (!rx_rings) |
4511 | goto out_err; | 4511 | goto out_err; |
4512 | 4512 | ||
4513 | np->num_rx_rings = num_rx_rings; | ||
4514 | smp_wmb(); | ||
4515 | np->rx_rings = rx_rings; | ||
4516 | |||
4517 | netif_set_real_num_rx_queues(np->dev, num_rx_rings); | ||
4518 | |||
4513 | for (i = 0; i < np->num_rx_rings; i++) { | 4519 | for (i = 0; i < np->num_rx_rings; i++) { |
4514 | struct rx_ring_info *rp = &np->rx_rings[i]; | 4520 | struct rx_ring_info *rp = &np->rx_rings[i]; |
4515 | 4521 | ||
@@ -4538,12 +4544,18 @@ static int niu_alloc_channels(struct niu *np) | |||
4538 | return err; | 4544 | return err; |
4539 | } | 4545 | } |
4540 | 4546 | ||
4541 | np->tx_rings = kcalloc(np->num_tx_rings, sizeof(struct tx_ring_info), | 4547 | tx_rings = kcalloc(num_tx_rings, sizeof(struct tx_ring_info), |
4542 | GFP_KERNEL); | 4548 | GFP_KERNEL); |
4543 | err = -ENOMEM; | 4549 | err = -ENOMEM; |
4544 | if (!np->tx_rings) | 4550 | if (!tx_rings) |
4545 | goto out_err; | 4551 | goto out_err; |
4546 | 4552 | ||
4553 | np->num_tx_rings = num_tx_rings; | ||
4554 | smp_wmb(); | ||
4555 | np->tx_rings = tx_rings; | ||
4556 | |||
4557 | netif_set_real_num_tx_queues(np->dev, num_tx_rings); | ||
4558 | |||
4547 | for (i = 0; i < np->num_tx_rings; i++) { | 4559 | for (i = 0; i < np->num_tx_rings; i++) { |
4548 | struct tx_ring_info *rp = &np->tx_rings[i]; | 4560 | struct tx_ring_info *rp = &np->tx_rings[i]; |
4549 | 4561 | ||
@@ -6246,11 +6258,17 @@ static void niu_sync_mac_stats(struct niu *np) | |||
6246 | static void niu_get_rx_stats(struct niu *np) | 6258 | static void niu_get_rx_stats(struct niu *np) |
6247 | { | 6259 | { |
6248 | unsigned long pkts, dropped, errors, bytes; | 6260 | unsigned long pkts, dropped, errors, bytes; |
6261 | struct rx_ring_info *rx_rings; | ||
6249 | int i; | 6262 | int i; |
6250 | 6263 | ||
6251 | pkts = dropped = errors = bytes = 0; | 6264 | pkts = dropped = errors = bytes = 0; |
6265 | |||
6266 | rx_rings = ACCESS_ONCE(np->rx_rings); | ||
6267 | if (!rx_rings) | ||
6268 | goto no_rings; | ||
6269 | |||
6252 | for (i = 0; i < np->num_rx_rings; i++) { | 6270 | for (i = 0; i < np->num_rx_rings; i++) { |
6253 | struct rx_ring_info *rp = &np->rx_rings[i]; | 6271 | struct rx_ring_info *rp = &rx_rings[i]; |
6254 | 6272 | ||
6255 | niu_sync_rx_discard_stats(np, rp, 0); | 6273 | niu_sync_rx_discard_stats(np, rp, 0); |
6256 | 6274 | ||
@@ -6259,6 +6277,8 @@ static void niu_get_rx_stats(struct niu *np) | |||
6259 | dropped += rp->rx_dropped; | 6277 | dropped += rp->rx_dropped; |
6260 | errors += rp->rx_errors; | 6278 | errors += rp->rx_errors; |
6261 | } | 6279 | } |
6280 | |||
6281 | no_rings: | ||
6262 | np->dev->stats.rx_packets = pkts; | 6282 | np->dev->stats.rx_packets = pkts; |
6263 | np->dev->stats.rx_bytes = bytes; | 6283 | np->dev->stats.rx_bytes = bytes; |
6264 | np->dev->stats.rx_dropped = dropped; | 6284 | np->dev->stats.rx_dropped = dropped; |
@@ -6268,16 +6288,24 @@ static void niu_get_rx_stats(struct niu *np) | |||
6268 | static void niu_get_tx_stats(struct niu *np) | 6288 | static void niu_get_tx_stats(struct niu *np) |
6269 | { | 6289 | { |
6270 | unsigned long pkts, errors, bytes; | 6290 | unsigned long pkts, errors, bytes; |
6291 | struct tx_ring_info *tx_rings; | ||
6271 | int i; | 6292 | int i; |
6272 | 6293 | ||
6273 | pkts = errors = bytes = 0; | 6294 | pkts = errors = bytes = 0; |
6295 | |||
6296 | tx_rings = ACCESS_ONCE(np->tx_rings); | ||
6297 | if (!tx_rings) | ||
6298 | goto no_rings; | ||
6299 | |||
6274 | for (i = 0; i < np->num_tx_rings; i++) { | 6300 | for (i = 0; i < np->num_tx_rings; i++) { |
6275 | struct tx_ring_info *rp = &np->tx_rings[i]; | 6301 | struct tx_ring_info *rp = &tx_rings[i]; |
6276 | 6302 | ||
6277 | pkts += rp->tx_packets; | 6303 | pkts += rp->tx_packets; |
6278 | bytes += rp->tx_bytes; | 6304 | bytes += rp->tx_bytes; |
6279 | errors += rp->tx_errors; | 6305 | errors += rp->tx_errors; |
6280 | } | 6306 | } |
6307 | |||
6308 | no_rings: | ||
6281 | np->dev->stats.tx_packets = pkts; | 6309 | np->dev->stats.tx_packets = pkts; |
6282 | np->dev->stats.tx_bytes = bytes; | 6310 | np->dev->stats.tx_bytes = bytes; |
6283 | np->dev->stats.tx_errors = errors; | 6311 | np->dev->stats.tx_errors = errors; |
@@ -6287,9 +6315,10 @@ static struct net_device_stats *niu_get_stats(struct net_device *dev) | |||
6287 | { | 6315 | { |
6288 | struct niu *np = netdev_priv(dev); | 6316 | struct niu *np = netdev_priv(dev); |
6289 | 6317 | ||
6290 | niu_get_rx_stats(np); | 6318 | if (netif_running(dev)) { |
6291 | niu_get_tx_stats(np); | 6319 | niu_get_rx_stats(np); |
6292 | 6320 | niu_get_tx_stats(np); | |
6321 | } | ||
6293 | return &dev->stats; | 6322 | return &dev->stats; |
6294 | } | 6323 | } |
6295 | 6324 | ||
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c index 1f42f6ac8551..d3cb77205863 100644 --- a/drivers/net/pcmcia/axnet_cs.c +++ b/drivers/net/pcmcia/axnet_cs.c | |||
@@ -1488,12 +1488,10 @@ static void ei_rx_overrun(struct net_device *dev) | |||
1488 | 1488 | ||
1489 | /* | 1489 | /* |
1490 | * Wait a full Tx time (1.2ms) + some guard time, NS says 1.6ms total. | 1490 | * Wait a full Tx time (1.2ms) + some guard time, NS says 1.6ms total. |
1491 | * Early datasheets said to poll the reset bit, but now they say that | 1491 | * We wait at least 2ms. |
1492 | * it "is not a reliable indicator and subsequently should be ignored." | ||
1493 | * We wait at least 10ms. | ||
1494 | */ | 1492 | */ |
1495 | 1493 | ||
1496 | mdelay(10); | 1494 | mdelay(2); |
1497 | 1495 | ||
1498 | /* | 1496 | /* |
1499 | * Reset RBCR[01] back to zero as per magic incantation. | 1497 | * Reset RBCR[01] back to zero as per magic incantation. |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index bde7d61f1930..59ccf0c5c610 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -973,7 +973,8 @@ static void __rtl8169_check_link_status(struct net_device *dev, | |||
973 | if (pm) | 973 | if (pm) |
974 | pm_request_resume(&tp->pci_dev->dev); | 974 | pm_request_resume(&tp->pci_dev->dev); |
975 | netif_carrier_on(dev); | 975 | netif_carrier_on(dev); |
976 | netif_info(tp, ifup, dev, "link up\n"); | 976 | if (net_ratelimit()) |
977 | netif_info(tp, ifup, dev, "link up\n"); | ||
977 | } else { | 978 | } else { |
978 | netif_carrier_off(dev); | 979 | netif_carrier_off(dev); |
979 | netif_info(tp, ifdown, dev, "link down\n"); | 980 | netif_info(tp, ifdown, dev, "link down\n"); |
@@ -3757,7 +3758,8 @@ static void rtl_hw_start_8168(struct net_device *dev) | |||
3757 | RTL_W16(IntrMitigate, 0x5151); | 3758 | RTL_W16(IntrMitigate, 0x5151); |
3758 | 3759 | ||
3759 | /* Work around for RxFIFO overflow. */ | 3760 | /* Work around for RxFIFO overflow. */ |
3760 | if (tp->mac_version == RTL_GIGA_MAC_VER_11) { | 3761 | if (tp->mac_version == RTL_GIGA_MAC_VER_11 || |
3762 | tp->mac_version == RTL_GIGA_MAC_VER_22) { | ||
3761 | tp->intr_event |= RxFIFOOver | PCSTimeout; | 3763 | tp->intr_event |= RxFIFOOver | PCSTimeout; |
3762 | tp->intr_event &= ~RxOverflow; | 3764 | tp->intr_event &= ~RxOverflow; |
3763 | } | 3765 | } |
@@ -4639,12 +4641,33 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) | |||
4639 | break; | 4641 | break; |
4640 | } | 4642 | } |
4641 | 4643 | ||
4642 | /* Work around for rx fifo overflow */ | 4644 | if (unlikely(status & RxFIFOOver)) { |
4643 | if (unlikely(status & RxFIFOOver) && | 4645 | switch (tp->mac_version) { |
4644 | (tp->mac_version == RTL_GIGA_MAC_VER_11)) { | 4646 | /* Work around for rx fifo overflow */ |
4645 | netif_stop_queue(dev); | 4647 | case RTL_GIGA_MAC_VER_11: |
4646 | rtl8169_tx_timeout(dev); | 4648 | case RTL_GIGA_MAC_VER_22: |
4647 | break; | 4649 | case RTL_GIGA_MAC_VER_26: |
4650 | netif_stop_queue(dev); | ||
4651 | rtl8169_tx_timeout(dev); | ||
4652 | goto done; | ||
4653 | /* Testers needed. */ | ||
4654 | case RTL_GIGA_MAC_VER_17: | ||
4655 | case RTL_GIGA_MAC_VER_19: | ||
4656 | case RTL_GIGA_MAC_VER_20: | ||
4657 | case RTL_GIGA_MAC_VER_21: | ||
4658 | case RTL_GIGA_MAC_VER_23: | ||
4659 | case RTL_GIGA_MAC_VER_24: | ||
4660 | case RTL_GIGA_MAC_VER_27: | ||
4661 | case RTL_GIGA_MAC_VER_28: | ||
4662 | /* Experimental science. Pktgen proof. */ | ||
4663 | case RTL_GIGA_MAC_VER_12: | ||
4664 | case RTL_GIGA_MAC_VER_25: | ||
4665 | if (status == RxFIFOOver) | ||
4666 | goto done; | ||
4667 | break; | ||
4668 | default: | ||
4669 | break; | ||
4670 | } | ||
4648 | } | 4671 | } |
4649 | 4672 | ||
4650 | if (unlikely(status & SYSErr)) { | 4673 | if (unlikely(status & SYSErr)) { |
@@ -4680,7 +4703,7 @@ static irqreturn_t rtl8169_interrupt(int irq, void *dev_instance) | |||
4680 | (status & RxFIFOOver) ? (status | RxOverflow) : status); | 4703 | (status & RxFIFOOver) ? (status | RxOverflow) : status); |
4681 | status = RTL_R16(IntrStatus); | 4704 | status = RTL_R16(IntrStatus); |
4682 | } | 4705 | } |
4683 | 4706 | done: | |
4684 | return IRQ_RETVAL(handled); | 4707 | return IRQ_RETVAL(handled); |
4685 | } | 4708 | } |
4686 | 4709 | ||
diff --git a/drivers/net/vxge/vxge-config.c b/drivers/net/vxge/vxge-config.c index 01c05f53e2f9..228d4f7a58af 100644 --- a/drivers/net/vxge/vxge-config.c +++ b/drivers/net/vxge/vxge-config.c | |||
@@ -3690,7 +3690,7 @@ __vxge_hw_vpath_rts_table_get(struct __vxge_hw_vpath_handle *vp, | |||
3690 | if (status != VXGE_HW_OK) | 3690 | if (status != VXGE_HW_OK) |
3691 | goto exit; | 3691 | goto exit; |
3692 | 3692 | ||
3693 | if ((rts_table != VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) || | 3693 | if ((rts_table != VXGE_HW_RTS_ACCESS_STEER_CTRL_DATA_STRUCT_SEL_DA) && |
3694 | (rts_table != | 3694 | (rts_table != |
3695 | VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT)) | 3695 | VXGE_HW_RTS_ACS_STEER_CTRL_DATA_STRUCT_SEL_RTH_MULTI_IT)) |
3696 | *data1 = 0; | 3696 | *data1 = 0; |
diff --git a/drivers/net/wireless/ath/ath5k/dma.c b/drivers/net/wireless/ath/ath5k/dma.c index 0064be7ce5c9..21091c26a9a5 100644 --- a/drivers/net/wireless/ath/ath5k/dma.c +++ b/drivers/net/wireless/ath/ath5k/dma.c | |||
@@ -838,9 +838,9 @@ int ath5k_hw_dma_stop(struct ath5k_hw *ah) | |||
838 | for (i = 0; i < qmax; i++) { | 838 | for (i = 0; i < qmax; i++) { |
839 | err = ath5k_hw_stop_tx_dma(ah, i); | 839 | err = ath5k_hw_stop_tx_dma(ah, i); |
840 | /* -EINVAL -> queue inactive */ | 840 | /* -EINVAL -> queue inactive */ |
841 | if (err != -EINVAL) | 841 | if (err && err != -EINVAL) |
842 | return err; | 842 | return err; |
843 | } | 843 | } |
844 | 844 | ||
845 | return err; | 845 | return 0; |
846 | } | 846 | } |
diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c index e5f2b96a4c63..a702817daf72 100644 --- a/drivers/net/wireless/ath/ath5k/pcu.c +++ b/drivers/net/wireless/ath/ath5k/pcu.c | |||
@@ -86,7 +86,7 @@ int ath5k_hw_get_frame_duration(struct ath5k_hw *ah, | |||
86 | if (!ah->ah_bwmode) { | 86 | if (!ah->ah_bwmode) { |
87 | dur = ieee80211_generic_frame_duration(sc->hw, | 87 | dur = ieee80211_generic_frame_duration(sc->hw, |
88 | NULL, len, rate); | 88 | NULL, len, rate); |
89 | return dur; | 89 | return le16_to_cpu(dur); |
90 | } | 90 | } |
91 | 91 | ||
92 | bitrate = rate->bitrate; | 92 | bitrate = rate->bitrate; |
@@ -265,8 +265,6 @@ static inline void ath5k_hw_write_rate_duration(struct ath5k_hw *ah) | |||
265 | * what rate we should choose to TX ACKs. */ | 265 | * what rate we should choose to TX ACKs. */ |
266 | tx_time = ath5k_hw_get_frame_duration(ah, 10, rate); | 266 | tx_time = ath5k_hw_get_frame_duration(ah, 10, rate); |
267 | 267 | ||
268 | tx_time = le16_to_cpu(tx_time); | ||
269 | |||
270 | ath5k_hw_reg_write(ah, tx_time, reg); | 268 | ath5k_hw_reg_write(ah, tx_time, reg); |
271 | 269 | ||
272 | if (!(rate->flags & IEEE80211_RATE_SHORT_PREAMBLE)) | 270 | if (!(rate->flags & IEEE80211_RATE_SHORT_PREAMBLE)) |
diff --git a/drivers/net/wireless/ath/ath9k/ar9002_hw.c b/drivers/net/wireless/ath/ath9k/ar9002_hw.c index f8a7771faee2..f44c84ab5dce 100644 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c | |||
@@ -426,9 +426,8 @@ static void ar9002_hw_configpcipowersave(struct ath_hw *ah, | |||
426 | } | 426 | } |
427 | 427 | ||
428 | /* WAR for ASPM system hang */ | 428 | /* WAR for ASPM system hang */ |
429 | if (AR_SREV_9280(ah) || AR_SREV_9285(ah) || AR_SREV_9287(ah)) { | 429 | if (AR_SREV_9285(ah) || AR_SREV_9287(ah)) |
430 | val |= (AR_WA_BIT6 | AR_WA_BIT7); | 430 | val |= (AR_WA_BIT6 | AR_WA_BIT7); |
431 | } | ||
432 | 431 | ||
433 | if (AR_SREV_9285E_20(ah)) | 432 | if (AR_SREV_9285E_20(ah)) |
434 | val |= AR_WA_BIT23; | 433 | val |= AR_WA_BIT23; |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_init.c b/drivers/net/wireless/ath/ath9k/htc_drv_init.c index 38433f9bfe59..0352f0994caa 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c | |||
@@ -142,9 +142,6 @@ static void ath9k_deinit_priv(struct ath9k_htc_priv *priv) | |||
142 | { | 142 | { |
143 | ath9k_htc_exit_debug(priv->ah); | 143 | ath9k_htc_exit_debug(priv->ah); |
144 | ath9k_hw_deinit(priv->ah); | 144 | ath9k_hw_deinit(priv->ah); |
145 | tasklet_kill(&priv->swba_tasklet); | ||
146 | tasklet_kill(&priv->rx_tasklet); | ||
147 | tasklet_kill(&priv->tx_tasklet); | ||
148 | kfree(priv->ah); | 145 | kfree(priv->ah); |
149 | priv->ah = NULL; | 146 | priv->ah = NULL; |
150 | } | 147 | } |
diff --git a/drivers/net/wireless/ath/ath9k/htc_drv_main.c b/drivers/net/wireless/ath/ath9k/htc_drv_main.c index f4d576bc3ccd..6bb59958f71e 100644 --- a/drivers/net/wireless/ath/ath9k/htc_drv_main.c +++ b/drivers/net/wireless/ath/ath9k/htc_drv_main.c | |||
@@ -1025,12 +1025,6 @@ static void ath9k_htc_stop(struct ieee80211_hw *hw) | |||
1025 | int ret = 0; | 1025 | int ret = 0; |
1026 | u8 cmd_rsp; | 1026 | u8 cmd_rsp; |
1027 | 1027 | ||
1028 | /* Cancel all the running timers/work .. */ | ||
1029 | cancel_work_sync(&priv->fatal_work); | ||
1030 | cancel_work_sync(&priv->ps_work); | ||
1031 | cancel_delayed_work_sync(&priv->ath9k_led_blink_work); | ||
1032 | ath9k_led_stop_brightness(priv); | ||
1033 | |||
1034 | mutex_lock(&priv->mutex); | 1028 | mutex_lock(&priv->mutex); |
1035 | 1029 | ||
1036 | if (priv->op_flags & OP_INVALID) { | 1030 | if (priv->op_flags & OP_INVALID) { |
@@ -1044,8 +1038,23 @@ static void ath9k_htc_stop(struct ieee80211_hw *hw) | |||
1044 | WMI_CMD(WMI_DISABLE_INTR_CMDID); | 1038 | WMI_CMD(WMI_DISABLE_INTR_CMDID); |
1045 | WMI_CMD(WMI_DRAIN_TXQ_ALL_CMDID); | 1039 | WMI_CMD(WMI_DRAIN_TXQ_ALL_CMDID); |
1046 | WMI_CMD(WMI_STOP_RECV_CMDID); | 1040 | WMI_CMD(WMI_STOP_RECV_CMDID); |
1041 | |||
1042 | tasklet_kill(&priv->swba_tasklet); | ||
1043 | tasklet_kill(&priv->rx_tasklet); | ||
1044 | tasklet_kill(&priv->tx_tasklet); | ||
1045 | |||
1047 | skb_queue_purge(&priv->tx_queue); | 1046 | skb_queue_purge(&priv->tx_queue); |
1048 | 1047 | ||
1048 | mutex_unlock(&priv->mutex); | ||
1049 | |||
1050 | /* Cancel all the running timers/work .. */ | ||
1051 | cancel_work_sync(&priv->fatal_work); | ||
1052 | cancel_work_sync(&priv->ps_work); | ||
1053 | cancel_delayed_work_sync(&priv->ath9k_led_blink_work); | ||
1054 | ath9k_led_stop_brightness(priv); | ||
1055 | |||
1056 | mutex_lock(&priv->mutex); | ||
1057 | |||
1049 | /* Remove monitor interface here */ | 1058 | /* Remove monitor interface here */ |
1050 | if (ah->opmode == NL80211_IFTYPE_MONITOR) { | 1059 | if (ah->opmode == NL80211_IFTYPE_MONITOR) { |
1051 | if (ath9k_htc_remove_monitor_interface(priv)) | 1060 | if (ath9k_htc_remove_monitor_interface(priv)) |
diff --git a/drivers/net/wireless/ath/ath9k/init.c b/drivers/net/wireless/ath/ath9k/init.c index 767d8b86f1e1..087a6a95edd5 100644 --- a/drivers/net/wireless/ath/ath9k/init.c +++ b/drivers/net/wireless/ath/ath9k/init.c | |||
@@ -598,8 +598,6 @@ err_btcoex: | |||
598 | err_queues: | 598 | err_queues: |
599 | ath9k_hw_deinit(ah); | 599 | ath9k_hw_deinit(ah); |
600 | err_hw: | 600 | err_hw: |
601 | tasklet_kill(&sc->intr_tq); | ||
602 | tasklet_kill(&sc->bcon_tasklet); | ||
603 | 601 | ||
604 | kfree(ah); | 602 | kfree(ah); |
605 | sc->sc_ah = NULL; | 603 | sc->sc_ah = NULL; |
@@ -807,9 +805,6 @@ static void ath9k_deinit_softc(struct ath_softc *sc) | |||
807 | 805 | ||
808 | ath9k_hw_deinit(sc->sc_ah); | 806 | ath9k_hw_deinit(sc->sc_ah); |
809 | 807 | ||
810 | tasklet_kill(&sc->intr_tq); | ||
811 | tasklet_kill(&sc->bcon_tasklet); | ||
812 | |||
813 | kfree(sc->sc_ah); | 808 | kfree(sc->sc_ah); |
814 | sc->sc_ah = NULL; | 809 | sc->sc_ah = NULL; |
815 | } | 810 | } |
@@ -824,6 +819,8 @@ void ath9k_deinit_device(struct ath_softc *sc) | |||
824 | wiphy_rfkill_stop_polling(sc->hw->wiphy); | 819 | wiphy_rfkill_stop_polling(sc->hw->wiphy); |
825 | ath_deinit_leds(sc); | 820 | ath_deinit_leds(sc); |
826 | 821 | ||
822 | ath9k_ps_restore(sc); | ||
823 | |||
827 | for (i = 0; i < sc->num_sec_wiphy; i++) { | 824 | for (i = 0; i < sc->num_sec_wiphy; i++) { |
828 | struct ath_wiphy *aphy = sc->sec_wiphy[i]; | 825 | struct ath_wiphy *aphy = sc->sec_wiphy[i]; |
829 | if (aphy == NULL) | 826 | if (aphy == NULL) |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index c79c97be6cd4..9040c2ff1909 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -325,6 +325,8 @@ static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int | |||
325 | { | 325 | { |
326 | struct ieee80211_hw *hw = sc->hw; | 326 | struct ieee80211_hw *hw = sc->hw; |
327 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); | 327 | struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); |
328 | struct ath_hw *ah = sc->sc_ah; | ||
329 | struct ath_common *common = ath9k_hw_common(ah); | ||
328 | struct ath_tx_control txctl; | 330 | struct ath_tx_control txctl; |
329 | int time_left; | 331 | int time_left; |
330 | 332 | ||
@@ -342,8 +344,12 @@ static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int | |||
342 | init_completion(&sc->paprd_complete); | 344 | init_completion(&sc->paprd_complete); |
343 | sc->paprd_pending = true; | 345 | sc->paprd_pending = true; |
344 | txctl.paprd = BIT(chain); | 346 | txctl.paprd = BIT(chain); |
345 | if (ath_tx_start(hw, skb, &txctl) != 0) | 347 | |
348 | if (ath_tx_start(hw, skb, &txctl) != 0) { | ||
349 | ath_dbg(common, ATH_DBG_XMIT, "PAPRD TX failed\n"); | ||
350 | dev_kfree_skb_any(skb); | ||
346 | return false; | 351 | return false; |
352 | } | ||
347 | 353 | ||
348 | time_left = wait_for_completion_timeout(&sc->paprd_complete, | 354 | time_left = wait_for_completion_timeout(&sc->paprd_complete, |
349 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); | 355 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); |
@@ -953,8 +959,6 @@ void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw) | |||
953 | 959 | ||
954 | spin_unlock_bh(&sc->sc_pcu_lock); | 960 | spin_unlock_bh(&sc->sc_pcu_lock); |
955 | ath9k_ps_restore(sc); | 961 | ath9k_ps_restore(sc); |
956 | |||
957 | ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP); | ||
958 | } | 962 | } |
959 | 963 | ||
960 | int ath_reset(struct ath_softc *sc, bool retry_tx) | 964 | int ath_reset(struct ath_softc *sc, bool retry_tx) |
@@ -1309,6 +1313,9 @@ static void ath9k_stop(struct ieee80211_hw *hw) | |||
1309 | 1313 | ||
1310 | spin_lock_bh(&sc->sc_pcu_lock); | 1314 | spin_lock_bh(&sc->sc_pcu_lock); |
1311 | 1315 | ||
1316 | /* prevent tasklets to enable interrupts once we disable them */ | ||
1317 | ah->imask &= ~ATH9K_INT_GLOBAL; | ||
1318 | |||
1312 | /* make sure h/w will not generate any interrupt | 1319 | /* make sure h/w will not generate any interrupt |
1313 | * before setting the invalid flag. */ | 1320 | * before setting the invalid flag. */ |
1314 | ath9k_hw_disable_interrupts(ah); | 1321 | ath9k_hw_disable_interrupts(ah); |
@@ -1326,6 +1333,12 @@ static void ath9k_stop(struct ieee80211_hw *hw) | |||
1326 | 1333 | ||
1327 | spin_unlock_bh(&sc->sc_pcu_lock); | 1334 | spin_unlock_bh(&sc->sc_pcu_lock); |
1328 | 1335 | ||
1336 | /* we can now sync irq and kill any running tasklets, since we already | ||
1337 | * disabled interrupts and not holding a spin lock */ | ||
1338 | synchronize_irq(sc->irq); | ||
1339 | tasklet_kill(&sc->intr_tq); | ||
1340 | tasklet_kill(&sc->bcon_tasklet); | ||
1341 | |||
1329 | ath9k_ps_restore(sc); | 1342 | ath9k_ps_restore(sc); |
1330 | 1343 | ||
1331 | sc->ps_idle = true; | 1344 | sc->ps_idle = true; |
diff --git a/drivers/net/wireless/rtlwifi/efuse.c b/drivers/net/wireless/rtlwifi/efuse.c index b8433f3a9bc2..62876cd5c41a 100644 --- a/drivers/net/wireless/rtlwifi/efuse.c +++ b/drivers/net/wireless/rtlwifi/efuse.c | |||
@@ -726,9 +726,9 @@ static int efuse_pg_packet_read(struct ieee80211_hw *hw, u8 offset, u8 *data) | |||
726 | } | 726 | } |
727 | 727 | ||
728 | static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, | 728 | static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, |
729 | u8 efuse_data, u8 offset, int *bcontinual, | 729 | u8 efuse_data, u8 offset, int *bcontinual, |
730 | u8 *write_state, struct pgpkt_struct target_pkt, | 730 | u8 *write_state, struct pgpkt_struct *target_pkt, |
731 | int *repeat_times, int *bresult, u8 word_en) | 731 | int *repeat_times, int *bresult, u8 word_en) |
732 | { | 732 | { |
733 | struct rtl_priv *rtlpriv = rtl_priv(hw); | 733 | struct rtl_priv *rtlpriv = rtl_priv(hw); |
734 | struct pgpkt_struct tmp_pkt; | 734 | struct pgpkt_struct tmp_pkt; |
@@ -744,8 +744,8 @@ static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, | |||
744 | tmp_pkt.word_en = tmp_header & 0x0F; | 744 | tmp_pkt.word_en = tmp_header & 0x0F; |
745 | tmp_word_cnts = efuse_calculate_word_cnts(tmp_pkt.word_en); | 745 | tmp_word_cnts = efuse_calculate_word_cnts(tmp_pkt.word_en); |
746 | 746 | ||
747 | if (tmp_pkt.offset != target_pkt.offset) { | 747 | if (tmp_pkt.offset != target_pkt->offset) { |
748 | efuse_addr = efuse_addr + (tmp_word_cnts * 2) + 1; | 748 | *efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1; |
749 | *write_state = PG_STATE_HEADER; | 749 | *write_state = PG_STATE_HEADER; |
750 | } else { | 750 | } else { |
751 | for (tmpindex = 0; tmpindex < (tmp_word_cnts * 2); tmpindex++) { | 751 | for (tmpindex = 0; tmpindex < (tmp_word_cnts * 2); tmpindex++) { |
@@ -756,23 +756,23 @@ static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, | |||
756 | } | 756 | } |
757 | 757 | ||
758 | if (bdataempty == false) { | 758 | if (bdataempty == false) { |
759 | efuse_addr = efuse_addr + (tmp_word_cnts * 2) + 1; | 759 | *efuse_addr = *efuse_addr + (tmp_word_cnts * 2) + 1; |
760 | *write_state = PG_STATE_HEADER; | 760 | *write_state = PG_STATE_HEADER; |
761 | } else { | 761 | } else { |
762 | match_word_en = 0x0F; | 762 | match_word_en = 0x0F; |
763 | if (!((target_pkt.word_en & BIT(0)) | | 763 | if (!((target_pkt->word_en & BIT(0)) | |
764 | (tmp_pkt.word_en & BIT(0)))) | 764 | (tmp_pkt.word_en & BIT(0)))) |
765 | match_word_en &= (~BIT(0)); | 765 | match_word_en &= (~BIT(0)); |
766 | 766 | ||
767 | if (!((target_pkt.word_en & BIT(1)) | | 767 | if (!((target_pkt->word_en & BIT(1)) | |
768 | (tmp_pkt.word_en & BIT(1)))) | 768 | (tmp_pkt.word_en & BIT(1)))) |
769 | match_word_en &= (~BIT(1)); | 769 | match_word_en &= (~BIT(1)); |
770 | 770 | ||
771 | if (!((target_pkt.word_en & BIT(2)) | | 771 | if (!((target_pkt->word_en & BIT(2)) | |
772 | (tmp_pkt.word_en & BIT(2)))) | 772 | (tmp_pkt.word_en & BIT(2)))) |
773 | match_word_en &= (~BIT(2)); | 773 | match_word_en &= (~BIT(2)); |
774 | 774 | ||
775 | if (!((target_pkt.word_en & BIT(3)) | | 775 | if (!((target_pkt->word_en & BIT(3)) | |
776 | (tmp_pkt.word_en & BIT(3)))) | 776 | (tmp_pkt.word_en & BIT(3)))) |
777 | match_word_en &= (~BIT(3)); | 777 | match_word_en &= (~BIT(3)); |
778 | 778 | ||
@@ -780,7 +780,7 @@ static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, | |||
780 | badworden = efuse_word_enable_data_write( | 780 | badworden = efuse_word_enable_data_write( |
781 | hw, *efuse_addr + 1, | 781 | hw, *efuse_addr + 1, |
782 | tmp_pkt.word_en, | 782 | tmp_pkt.word_en, |
783 | target_pkt.data); | 783 | target_pkt->data); |
784 | 784 | ||
785 | if (0x0F != (badworden & 0x0F)) { | 785 | if (0x0F != (badworden & 0x0F)) { |
786 | u8 reorg_offset = offset; | 786 | u8 reorg_offset = offset; |
@@ -791,26 +791,26 @@ static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, | |||
791 | } | 791 | } |
792 | 792 | ||
793 | tmp_word_en = 0x0F; | 793 | tmp_word_en = 0x0F; |
794 | if ((target_pkt.word_en & BIT(0)) ^ | 794 | if ((target_pkt->word_en & BIT(0)) ^ |
795 | (match_word_en & BIT(0))) | 795 | (match_word_en & BIT(0))) |
796 | tmp_word_en &= (~BIT(0)); | 796 | tmp_word_en &= (~BIT(0)); |
797 | 797 | ||
798 | if ((target_pkt.word_en & BIT(1)) ^ | 798 | if ((target_pkt->word_en & BIT(1)) ^ |
799 | (match_word_en & BIT(1))) | 799 | (match_word_en & BIT(1))) |
800 | tmp_word_en &= (~BIT(1)); | 800 | tmp_word_en &= (~BIT(1)); |
801 | 801 | ||
802 | if ((target_pkt.word_en & BIT(2)) ^ | 802 | if ((target_pkt->word_en & BIT(2)) ^ |
803 | (match_word_en & BIT(2))) | 803 | (match_word_en & BIT(2))) |
804 | tmp_word_en &= (~BIT(2)); | 804 | tmp_word_en &= (~BIT(2)); |
805 | 805 | ||
806 | if ((target_pkt.word_en & BIT(3)) ^ | 806 | if ((target_pkt->word_en & BIT(3)) ^ |
807 | (match_word_en & BIT(3))) | 807 | (match_word_en & BIT(3))) |
808 | tmp_word_en &= (~BIT(3)); | 808 | tmp_word_en &= (~BIT(3)); |
809 | 809 | ||
810 | if ((tmp_word_en & 0x0F) != 0x0F) { | 810 | if ((tmp_word_en & 0x0F) != 0x0F) { |
811 | *efuse_addr = efuse_get_current_size(hw); | 811 | *efuse_addr = efuse_get_current_size(hw); |
812 | target_pkt.offset = offset; | 812 | target_pkt->offset = offset; |
813 | target_pkt.word_en = tmp_word_en; | 813 | target_pkt->word_en = tmp_word_en; |
814 | } else | 814 | } else |
815 | *bcontinual = false; | 815 | *bcontinual = false; |
816 | *write_state = PG_STATE_HEADER; | 816 | *write_state = PG_STATE_HEADER; |
@@ -821,8 +821,8 @@ static void efuse_write_data_case1(struct ieee80211_hw *hw, u16 *efuse_addr, | |||
821 | } | 821 | } |
822 | } else { | 822 | } else { |
823 | *efuse_addr += (2 * tmp_word_cnts) + 1; | 823 | *efuse_addr += (2 * tmp_word_cnts) + 1; |
824 | target_pkt.offset = offset; | 824 | target_pkt->offset = offset; |
825 | target_pkt.word_en = word_en; | 825 | target_pkt->word_en = word_en; |
826 | *write_state = PG_STATE_HEADER; | 826 | *write_state = PG_STATE_HEADER; |
827 | } | 827 | } |
828 | } | 828 | } |
@@ -938,7 +938,7 @@ static int efuse_pg_packet_write(struct ieee80211_hw *hw, | |||
938 | efuse_write_data_case1(hw, &efuse_addr, | 938 | efuse_write_data_case1(hw, &efuse_addr, |
939 | efuse_data, offset, | 939 | efuse_data, offset, |
940 | &bcontinual, | 940 | &bcontinual, |
941 | &write_state, target_pkt, | 941 | &write_state, &target_pkt, |
942 | &repeat_times, &bresult, | 942 | &repeat_times, &bresult, |
943 | word_en); | 943 | word_en); |
944 | else | 944 | else |
diff --git a/drivers/net/wireless/wl12xx/spi.c b/drivers/net/wireless/wl12xx/spi.c index 46714910f98c..7145ea543783 100644 --- a/drivers/net/wireless/wl12xx/spi.c +++ b/drivers/net/wireless/wl12xx/spi.c | |||
@@ -110,9 +110,8 @@ static void wl1271_spi_reset(struct wl1271 *wl) | |||
110 | spi_message_add_tail(&t, &m); | 110 | spi_message_add_tail(&t, &m); |
111 | 111 | ||
112 | spi_sync(wl_to_spi(wl), &m); | 112 | spi_sync(wl_to_spi(wl), &m); |
113 | kfree(cmd); | ||
114 | |||
115 | wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN); | 113 | wl1271_dump(DEBUG_SPI, "spi reset -> ", cmd, WSPI_INIT_CMD_LEN); |
114 | kfree(cmd); | ||
116 | } | 115 | } |
117 | 116 | ||
118 | static void wl1271_spi_init(struct wl1271 *wl) | 117 | static void wl1271_spi_init(struct wl1271 *wl) |
diff --git a/drivers/net/xen-netfront.c b/drivers/net/xen-netfront.c index 546de5749824..da1f12120346 100644 --- a/drivers/net/xen-netfront.c +++ b/drivers/net/xen-netfront.c | |||
@@ -120,6 +120,9 @@ struct netfront_info { | |||
120 | unsigned long rx_pfn_array[NET_RX_RING_SIZE]; | 120 | unsigned long rx_pfn_array[NET_RX_RING_SIZE]; |
121 | struct multicall_entry rx_mcl[NET_RX_RING_SIZE+1]; | 121 | struct multicall_entry rx_mcl[NET_RX_RING_SIZE+1]; |
122 | struct mmu_update rx_mmu[NET_RX_RING_SIZE]; | 122 | struct mmu_update rx_mmu[NET_RX_RING_SIZE]; |
123 | |||
124 | /* Statistics */ | ||
125 | int rx_gso_checksum_fixup; | ||
123 | }; | 126 | }; |
124 | 127 | ||
125 | struct netfront_rx_info { | 128 | struct netfront_rx_info { |
@@ -770,11 +773,29 @@ static RING_IDX xennet_fill_frags(struct netfront_info *np, | |||
770 | return cons; | 773 | return cons; |
771 | } | 774 | } |
772 | 775 | ||
773 | static int skb_checksum_setup(struct sk_buff *skb) | 776 | static int checksum_setup(struct net_device *dev, struct sk_buff *skb) |
774 | { | 777 | { |
775 | struct iphdr *iph; | 778 | struct iphdr *iph; |
776 | unsigned char *th; | 779 | unsigned char *th; |
777 | int err = -EPROTO; | 780 | int err = -EPROTO; |
781 | int recalculate_partial_csum = 0; | ||
782 | |||
783 | /* | ||
784 | * A GSO SKB must be CHECKSUM_PARTIAL. However some buggy | ||
785 | * peers can fail to set NETRXF_csum_blank when sending a GSO | ||
786 | * frame. In this case force the SKB to CHECKSUM_PARTIAL and | ||
787 | * recalculate the partial checksum. | ||
788 | */ | ||
789 | if (skb->ip_summed != CHECKSUM_PARTIAL && skb_is_gso(skb)) { | ||
790 | struct netfront_info *np = netdev_priv(dev); | ||
791 | np->rx_gso_checksum_fixup++; | ||
792 | skb->ip_summed = CHECKSUM_PARTIAL; | ||
793 | recalculate_partial_csum = 1; | ||
794 | } | ||
795 | |||
796 | /* A non-CHECKSUM_PARTIAL SKB does not require setup. */ | ||
797 | if (skb->ip_summed != CHECKSUM_PARTIAL) | ||
798 | return 0; | ||
778 | 799 | ||
779 | if (skb->protocol != htons(ETH_P_IP)) | 800 | if (skb->protocol != htons(ETH_P_IP)) |
780 | goto out; | 801 | goto out; |
@@ -788,9 +809,23 @@ static int skb_checksum_setup(struct sk_buff *skb) | |||
788 | switch (iph->protocol) { | 809 | switch (iph->protocol) { |
789 | case IPPROTO_TCP: | 810 | case IPPROTO_TCP: |
790 | skb->csum_offset = offsetof(struct tcphdr, check); | 811 | skb->csum_offset = offsetof(struct tcphdr, check); |
812 | |||
813 | if (recalculate_partial_csum) { | ||
814 | struct tcphdr *tcph = (struct tcphdr *)th; | ||
815 | tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, | ||
816 | skb->len - iph->ihl*4, | ||
817 | IPPROTO_TCP, 0); | ||
818 | } | ||
791 | break; | 819 | break; |
792 | case IPPROTO_UDP: | 820 | case IPPROTO_UDP: |
793 | skb->csum_offset = offsetof(struct udphdr, check); | 821 | skb->csum_offset = offsetof(struct udphdr, check); |
822 | |||
823 | if (recalculate_partial_csum) { | ||
824 | struct udphdr *udph = (struct udphdr *)th; | ||
825 | udph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, | ||
826 | skb->len - iph->ihl*4, | ||
827 | IPPROTO_UDP, 0); | ||
828 | } | ||
794 | break; | 829 | break; |
795 | default: | 830 | default: |
796 | if (net_ratelimit()) | 831 | if (net_ratelimit()) |
@@ -829,13 +864,11 @@ static int handle_incoming_queue(struct net_device *dev, | |||
829 | /* Ethernet work: Delayed to here as it peeks the header. */ | 864 | /* Ethernet work: Delayed to here as it peeks the header. */ |
830 | skb->protocol = eth_type_trans(skb, dev); | 865 | skb->protocol = eth_type_trans(skb, dev); |
831 | 866 | ||
832 | if (skb->ip_summed == CHECKSUM_PARTIAL) { | 867 | if (checksum_setup(dev, skb)) { |
833 | if (skb_checksum_setup(skb)) { | 868 | kfree_skb(skb); |
834 | kfree_skb(skb); | 869 | packets_dropped++; |
835 | packets_dropped++; | 870 | dev->stats.rx_errors++; |
836 | dev->stats.rx_errors++; | 871 | continue; |
837 | continue; | ||
838 | } | ||
839 | } | 872 | } |
840 | 873 | ||
841 | dev->stats.rx_packets++; | 874 | dev->stats.rx_packets++; |
@@ -1632,12 +1665,59 @@ static void netback_changed(struct xenbus_device *dev, | |||
1632 | } | 1665 | } |
1633 | } | 1666 | } |
1634 | 1667 | ||
1668 | static const struct xennet_stat { | ||
1669 | char name[ETH_GSTRING_LEN]; | ||
1670 | u16 offset; | ||
1671 | } xennet_stats[] = { | ||
1672 | { | ||
1673 | "rx_gso_checksum_fixup", | ||
1674 | offsetof(struct netfront_info, rx_gso_checksum_fixup) | ||
1675 | }, | ||
1676 | }; | ||
1677 | |||
1678 | static int xennet_get_sset_count(struct net_device *dev, int string_set) | ||
1679 | { | ||
1680 | switch (string_set) { | ||
1681 | case ETH_SS_STATS: | ||
1682 | return ARRAY_SIZE(xennet_stats); | ||
1683 | default: | ||
1684 | return -EINVAL; | ||
1685 | } | ||
1686 | } | ||
1687 | |||
1688 | static void xennet_get_ethtool_stats(struct net_device *dev, | ||
1689 | struct ethtool_stats *stats, u64 * data) | ||
1690 | { | ||
1691 | void *np = netdev_priv(dev); | ||
1692 | int i; | ||
1693 | |||
1694 | for (i = 0; i < ARRAY_SIZE(xennet_stats); i++) | ||
1695 | data[i] = *(int *)(np + xennet_stats[i].offset); | ||
1696 | } | ||
1697 | |||
1698 | static void xennet_get_strings(struct net_device *dev, u32 stringset, u8 * data) | ||
1699 | { | ||
1700 | int i; | ||
1701 | |||
1702 | switch (stringset) { | ||
1703 | case ETH_SS_STATS: | ||
1704 | for (i = 0; i < ARRAY_SIZE(xennet_stats); i++) | ||
1705 | memcpy(data + i * ETH_GSTRING_LEN, | ||
1706 | xennet_stats[i].name, ETH_GSTRING_LEN); | ||
1707 | break; | ||
1708 | } | ||
1709 | } | ||
1710 | |||
1635 | static const struct ethtool_ops xennet_ethtool_ops = | 1711 | static const struct ethtool_ops xennet_ethtool_ops = |
1636 | { | 1712 | { |
1637 | .set_tx_csum = ethtool_op_set_tx_csum, | 1713 | .set_tx_csum = ethtool_op_set_tx_csum, |
1638 | .set_sg = xennet_set_sg, | 1714 | .set_sg = xennet_set_sg, |
1639 | .set_tso = xennet_set_tso, | 1715 | .set_tso = xennet_set_tso, |
1640 | .get_link = ethtool_op_get_link, | 1716 | .get_link = ethtool_op_get_link, |
1717 | |||
1718 | .get_sset_count = xennet_get_sset_count, | ||
1719 | .get_ethtool_stats = xennet_get_ethtool_stats, | ||
1720 | .get_strings = xennet_get_strings, | ||
1641 | }; | 1721 | }; |
1642 | 1722 | ||
1643 | #ifdef CONFIG_SYSFS | 1723 | #ifdef CONFIG_SYSFS |
diff --git a/drivers/s390/net/netiucv.c b/drivers/s390/net/netiucv.c index 65ebee0a3266..b6a6356d09b3 100644 --- a/drivers/s390/net/netiucv.c +++ b/drivers/s390/net/netiucv.c | |||
@@ -565,7 +565,7 @@ static int netiucv_callback_connreq(struct iucv_path *path, | |||
565 | struct iucv_event ev; | 565 | struct iucv_event ev; |
566 | int rc; | 566 | int rc; |
567 | 567 | ||
568 | if (memcmp(iucvMagic, ipuser, sizeof(ipuser))) | 568 | if (memcmp(iucvMagic, ipuser, 16)) |
569 | /* ipuser must match iucvMagic. */ | 569 | /* ipuser must match iucvMagic. */ |
570 | return -EINVAL; | 570 | return -EINVAL; |
571 | rc = -EINVAL; | 571 | rc = -EINVAL; |
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c index 29f848bfc12f..019ae58ab913 100644 --- a/drivers/s390/net/qeth_core_main.c +++ b/drivers/s390/net/qeth_core_main.c | |||
@@ -988,16 +988,30 @@ static void qeth_get_channel_path_desc(struct qeth_card *card) | |||
988 | chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); | 988 | chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0); |
989 | if (chp_dsc != NULL) { | 989 | if (chp_dsc != NULL) { |
990 | /* CHPP field bit 6 == 1 -> single queue */ | 990 | /* CHPP field bit 6 == 1 -> single queue */ |
991 | if ((chp_dsc->chpp & 0x02) == 0x02) | 991 | if ((chp_dsc->chpp & 0x02) == 0x02) { |
992 | if ((atomic_read(&card->qdio.state) != | ||
993 | QETH_QDIO_UNINITIALIZED) && | ||
994 | (card->qdio.no_out_queues == 4)) | ||
995 | /* change from 4 to 1 outbound queues */ | ||
996 | qeth_free_qdio_buffers(card); | ||
992 | card->qdio.no_out_queues = 1; | 997 | card->qdio.no_out_queues = 1; |
998 | if (card->qdio.default_out_queue != 0) | ||
999 | dev_info(&card->gdev->dev, | ||
1000 | "Priority Queueing not supported\n"); | ||
1001 | card->qdio.default_out_queue = 0; | ||
1002 | } else { | ||
1003 | if ((atomic_read(&card->qdio.state) != | ||
1004 | QETH_QDIO_UNINITIALIZED) && | ||
1005 | (card->qdio.no_out_queues == 1)) { | ||
1006 | /* change from 1 to 4 outbound queues */ | ||
1007 | qeth_free_qdio_buffers(card); | ||
1008 | card->qdio.default_out_queue = 2; | ||
1009 | } | ||
1010 | card->qdio.no_out_queues = 4; | ||
1011 | } | ||
993 | card->info.func_level = 0x4100 + chp_dsc->desc; | 1012 | card->info.func_level = 0x4100 + chp_dsc->desc; |
994 | kfree(chp_dsc); | 1013 | kfree(chp_dsc); |
995 | } | 1014 | } |
996 | if (card->qdio.no_out_queues == 1) { | ||
997 | card->qdio.default_out_queue = 0; | ||
998 | dev_info(&card->gdev->dev, | ||
999 | "Priority Queueing not supported\n"); | ||
1000 | } | ||
1001 | QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); | 1015 | QETH_DBF_TEXT_(SETUP, 2, "nr:%x", card->qdio.no_out_queues); |
1002 | QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); | 1016 | QETH_DBF_TEXT_(SETUP, 2, "lvl:%02x", card->info.func_level); |
1003 | return; | 1017 | return; |
@@ -1832,33 +1846,6 @@ static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card) | |||
1832 | } | 1846 | } |
1833 | } | 1847 | } |
1834 | 1848 | ||
1835 | static inline int qeth_get_max_mtu_for_card(int cardtype) | ||
1836 | { | ||
1837 | switch (cardtype) { | ||
1838 | |||
1839 | case QETH_CARD_TYPE_UNKNOWN: | ||
1840 | case QETH_CARD_TYPE_OSD: | ||
1841 | case QETH_CARD_TYPE_OSN: | ||
1842 | case QETH_CARD_TYPE_OSM: | ||
1843 | case QETH_CARD_TYPE_OSX: | ||
1844 | return 61440; | ||
1845 | case QETH_CARD_TYPE_IQD: | ||
1846 | return 57344; | ||
1847 | default: | ||
1848 | return 1500; | ||
1849 | } | ||
1850 | } | ||
1851 | |||
1852 | static inline int qeth_get_mtu_out_of_mpc(int cardtype) | ||
1853 | { | ||
1854 | switch (cardtype) { | ||
1855 | case QETH_CARD_TYPE_IQD: | ||
1856 | return 1; | ||
1857 | default: | ||
1858 | return 0; | ||
1859 | } | ||
1860 | } | ||
1861 | |||
1862 | static inline int qeth_get_mtu_outof_framesize(int framesize) | 1849 | static inline int qeth_get_mtu_outof_framesize(int framesize) |
1863 | { | 1850 | { |
1864 | switch (framesize) { | 1851 | switch (framesize) { |
@@ -1881,10 +1868,9 @@ static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu) | |||
1881 | case QETH_CARD_TYPE_OSD: | 1868 | case QETH_CARD_TYPE_OSD: |
1882 | case QETH_CARD_TYPE_OSM: | 1869 | case QETH_CARD_TYPE_OSM: |
1883 | case QETH_CARD_TYPE_OSX: | 1870 | case QETH_CARD_TYPE_OSX: |
1884 | return ((mtu >= 576) && (mtu <= 61440)); | ||
1885 | case QETH_CARD_TYPE_IQD: | 1871 | case QETH_CARD_TYPE_IQD: |
1886 | return ((mtu >= 576) && | 1872 | return ((mtu >= 576) && |
1887 | (mtu <= card->info.max_mtu + 4096 - 32)); | 1873 | (mtu <= card->info.max_mtu)); |
1888 | case QETH_CARD_TYPE_OSN: | 1874 | case QETH_CARD_TYPE_OSN: |
1889 | case QETH_CARD_TYPE_UNKNOWN: | 1875 | case QETH_CARD_TYPE_UNKNOWN: |
1890 | default: | 1876 | default: |
@@ -1907,7 +1893,7 @@ static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, | |||
1907 | memcpy(&card->token.ulp_filter_r, | 1893 | memcpy(&card->token.ulp_filter_r, |
1908 | QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), | 1894 | QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data), |
1909 | QETH_MPC_TOKEN_LENGTH); | 1895 | QETH_MPC_TOKEN_LENGTH); |
1910 | if (qeth_get_mtu_out_of_mpc(card->info.type)) { | 1896 | if (card->info.type == QETH_CARD_TYPE_IQD) { |
1911 | memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); | 1897 | memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2); |
1912 | mtu = qeth_get_mtu_outof_framesize(framesize); | 1898 | mtu = qeth_get_mtu_outof_framesize(framesize); |
1913 | if (!mtu) { | 1899 | if (!mtu) { |
@@ -1915,12 +1901,21 @@ static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply, | |||
1915 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); | 1901 | QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc); |
1916 | return 0; | 1902 | return 0; |
1917 | } | 1903 | } |
1918 | card->info.max_mtu = mtu; | 1904 | if (card->info.initial_mtu && (card->info.initial_mtu != mtu)) { |
1905 | /* frame size has changed */ | ||
1906 | if (card->dev && | ||
1907 | ((card->dev->mtu == card->info.initial_mtu) || | ||
1908 | (card->dev->mtu > mtu))) | ||
1909 | card->dev->mtu = mtu; | ||
1910 | qeth_free_qdio_buffers(card); | ||
1911 | } | ||
1919 | card->info.initial_mtu = mtu; | 1912 | card->info.initial_mtu = mtu; |
1913 | card->info.max_mtu = mtu; | ||
1920 | card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; | 1914 | card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE; |
1921 | } else { | 1915 | } else { |
1922 | card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); | 1916 | card->info.initial_mtu = qeth_get_initial_mtu_for_card(card); |
1923 | card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type); | 1917 | card->info.max_mtu = *(__u16 *)QETH_ULP_ENABLE_RESP_MAX_MTU( |
1918 | iob->data); | ||
1924 | card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; | 1919 | card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT; |
1925 | } | 1920 | } |
1926 | 1921 | ||
@@ -3775,6 +3770,47 @@ static inline int qeth_get_qdio_q_format(struct qeth_card *card) | |||
3775 | } | 3770 | } |
3776 | } | 3771 | } |
3777 | 3772 | ||
3773 | static void qeth_determine_capabilities(struct qeth_card *card) | ||
3774 | { | ||
3775 | int rc; | ||
3776 | int length; | ||
3777 | char *prcd; | ||
3778 | struct ccw_device *ddev; | ||
3779 | int ddev_offline = 0; | ||
3780 | |||
3781 | QETH_DBF_TEXT(SETUP, 2, "detcapab"); | ||
3782 | ddev = CARD_DDEV(card); | ||
3783 | if (!ddev->online) { | ||
3784 | ddev_offline = 1; | ||
3785 | rc = ccw_device_set_online(ddev); | ||
3786 | if (rc) { | ||
3787 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); | ||
3788 | goto out; | ||
3789 | } | ||
3790 | } | ||
3791 | |||
3792 | rc = qeth_read_conf_data(card, (void **) &prcd, &length); | ||
3793 | if (rc) { | ||
3794 | QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", | ||
3795 | dev_name(&card->gdev->dev), rc); | ||
3796 | QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); | ||
3797 | goto out_offline; | ||
3798 | } | ||
3799 | qeth_configure_unitaddr(card, prcd); | ||
3800 | qeth_configure_blkt_default(card, prcd); | ||
3801 | kfree(prcd); | ||
3802 | |||
3803 | rc = qdio_get_ssqd_desc(ddev, &card->ssqd); | ||
3804 | if (rc) | ||
3805 | QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); | ||
3806 | |||
3807 | out_offline: | ||
3808 | if (ddev_offline == 1) | ||
3809 | ccw_device_set_offline(ddev); | ||
3810 | out: | ||
3811 | return; | ||
3812 | } | ||
3813 | |||
3778 | static int qeth_qdio_establish(struct qeth_card *card) | 3814 | static int qeth_qdio_establish(struct qeth_card *card) |
3779 | { | 3815 | { |
3780 | struct qdio_initialize init_data; | 3816 | struct qdio_initialize init_data; |
@@ -3905,6 +3941,7 @@ int qeth_core_hardsetup_card(struct qeth_card *card) | |||
3905 | 3941 | ||
3906 | QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); | 3942 | QETH_DBF_TEXT(SETUP, 2, "hrdsetup"); |
3907 | atomic_set(&card->force_alloc_skb, 0); | 3943 | atomic_set(&card->force_alloc_skb, 0); |
3944 | qeth_get_channel_path_desc(card); | ||
3908 | retry: | 3945 | retry: |
3909 | if (retries) | 3946 | if (retries) |
3910 | QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", | 3947 | QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n", |
@@ -3933,6 +3970,7 @@ retriable: | |||
3933 | else | 3970 | else |
3934 | goto retry; | 3971 | goto retry; |
3935 | } | 3972 | } |
3973 | qeth_determine_capabilities(card); | ||
3936 | qeth_init_tokens(card); | 3974 | qeth_init_tokens(card); |
3937 | qeth_init_func_level(card); | 3975 | qeth_init_func_level(card); |
3938 | rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); | 3976 | rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb); |
@@ -4202,41 +4240,6 @@ void qeth_core_free_discipline(struct qeth_card *card) | |||
4202 | card->discipline.ccwgdriver = NULL; | 4240 | card->discipline.ccwgdriver = NULL; |
4203 | } | 4241 | } |
4204 | 4242 | ||
4205 | static void qeth_determine_capabilities(struct qeth_card *card) | ||
4206 | { | ||
4207 | int rc; | ||
4208 | int length; | ||
4209 | char *prcd; | ||
4210 | |||
4211 | QETH_DBF_TEXT(SETUP, 2, "detcapab"); | ||
4212 | rc = ccw_device_set_online(CARD_DDEV(card)); | ||
4213 | if (rc) { | ||
4214 | QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc); | ||
4215 | goto out; | ||
4216 | } | ||
4217 | |||
4218 | |||
4219 | rc = qeth_read_conf_data(card, (void **) &prcd, &length); | ||
4220 | if (rc) { | ||
4221 | QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n", | ||
4222 | dev_name(&card->gdev->dev), rc); | ||
4223 | QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc); | ||
4224 | goto out_offline; | ||
4225 | } | ||
4226 | qeth_configure_unitaddr(card, prcd); | ||
4227 | qeth_configure_blkt_default(card, prcd); | ||
4228 | kfree(prcd); | ||
4229 | |||
4230 | rc = qdio_get_ssqd_desc(CARD_DDEV(card), &card->ssqd); | ||
4231 | if (rc) | ||
4232 | QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc); | ||
4233 | |||
4234 | out_offline: | ||
4235 | ccw_device_set_offline(CARD_DDEV(card)); | ||
4236 | out: | ||
4237 | return; | ||
4238 | } | ||
4239 | |||
4240 | static int qeth_core_probe_device(struct ccwgroup_device *gdev) | 4243 | static int qeth_core_probe_device(struct ccwgroup_device *gdev) |
4241 | { | 4244 | { |
4242 | struct qeth_card *card; | 4245 | struct qeth_card *card; |
diff --git a/drivers/s390/net/qeth_l2_main.c b/drivers/s390/net/qeth_l2_main.c index 2ac8f6aff5a4..ada0fe782373 100644 --- a/drivers/s390/net/qeth_l2_main.c +++ b/drivers/s390/net/qeth_l2_main.c | |||
@@ -573,13 +573,13 @@ static int qeth_l2_send_setmac_cb(struct qeth_card *card, | |||
573 | case IPA_RC_L2_DUP_LAYER3_MAC: | 573 | case IPA_RC_L2_DUP_LAYER3_MAC: |
574 | dev_warn(&card->gdev->dev, | 574 | dev_warn(&card->gdev->dev, |
575 | "MAC address %pM already exists\n", | 575 | "MAC address %pM already exists\n", |
576 | card->dev->dev_addr); | 576 | cmd->data.setdelmac.mac); |
577 | break; | 577 | break; |
578 | case IPA_RC_L2_MAC_NOT_AUTH_BY_HYP: | 578 | case IPA_RC_L2_MAC_NOT_AUTH_BY_HYP: |
579 | case IPA_RC_L2_MAC_NOT_AUTH_BY_ADP: | 579 | case IPA_RC_L2_MAC_NOT_AUTH_BY_ADP: |
580 | dev_warn(&card->gdev->dev, | 580 | dev_warn(&card->gdev->dev, |
581 | "MAC address %pM is not authorized\n", | 581 | "MAC address %pM is not authorized\n", |
582 | card->dev->dev_addr); | 582 | cmd->data.setdelmac.mac); |
583 | break; | 583 | break; |
584 | default: | 584 | default: |
585 | break; | 585 | break; |
diff --git a/drivers/s390/net/smsgiucv.c b/drivers/s390/net/smsgiucv.c index 65e1cf104943..207b7d742443 100644 --- a/drivers/s390/net/smsgiucv.c +++ b/drivers/s390/net/smsgiucv.c | |||
@@ -60,7 +60,7 @@ static struct iucv_handler smsg_handler = { | |||
60 | static int smsg_path_pending(struct iucv_path *path, u8 ipvmid[8], | 60 | static int smsg_path_pending(struct iucv_path *path, u8 ipvmid[8], |
61 | u8 ipuser[16]) | 61 | u8 ipuser[16]) |
62 | { | 62 | { |
63 | if (strncmp(ipvmid, "*MSG ", sizeof(ipvmid)) != 0) | 63 | if (strncmp(ipvmid, "*MSG ", 8) != 0) |
64 | return -EINVAL; | 64 | return -EINVAL; |
65 | /* Path pending from *MSG. */ | 65 | /* Path pending from *MSG. */ |
66 | return iucv_path_accept(path, &smsg_handler, "SMSGIUCV ", NULL); | 66 | return iucv_path_accept(path, &smsg_handler, "SMSGIUCV ", NULL); |
diff --git a/drivers/scsi/arcmsr/arcmsr.h b/drivers/scsi/arcmsr/arcmsr.h index 475c31ae985c..77b26f5b9c33 100644 --- a/drivers/scsi/arcmsr/arcmsr.h +++ b/drivers/scsi/arcmsr/arcmsr.h | |||
@@ -2,7 +2,7 @@ | |||
2 | ******************************************************************************* | 2 | ******************************************************************************* |
3 | ** O.S : Linux | 3 | ** O.S : Linux |
4 | ** FILE NAME : arcmsr.h | 4 | ** FILE NAME : arcmsr.h |
5 | ** BY : Erich Chen | 5 | ** BY : Nick Cheng |
6 | ** Description: SCSI RAID Device Driver for | 6 | ** Description: SCSI RAID Device Driver for |
7 | ** ARECA RAID Host adapter | 7 | ** ARECA RAID Host adapter |
8 | ******************************************************************************* | 8 | ******************************************************************************* |
@@ -46,8 +46,12 @@ | |||
46 | struct device_attribute; | 46 | struct device_attribute; |
47 | /*The limit of outstanding scsi command that firmware can handle*/ | 47 | /*The limit of outstanding scsi command that firmware can handle*/ |
48 | #define ARCMSR_MAX_OUTSTANDING_CMD 256 | 48 | #define ARCMSR_MAX_OUTSTANDING_CMD 256 |
49 | #define ARCMSR_MAX_FREECCB_NUM 320 | 49 | #ifdef CONFIG_XEN |
50 | #define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2010/02/02" | 50 | #define ARCMSR_MAX_FREECCB_NUM 160 |
51 | #else | ||
52 | #define ARCMSR_MAX_FREECCB_NUM 320 | ||
53 | #endif | ||
54 | #define ARCMSR_DRIVER_VERSION "Driver Version 1.20.00.15 2010/08/05" | ||
51 | #define ARCMSR_SCSI_INITIATOR_ID 255 | 55 | #define ARCMSR_SCSI_INITIATOR_ID 255 |
52 | #define ARCMSR_MAX_XFER_SECTORS 512 | 56 | #define ARCMSR_MAX_XFER_SECTORS 512 |
53 | #define ARCMSR_MAX_XFER_SECTORS_B 4096 | 57 | #define ARCMSR_MAX_XFER_SECTORS_B 4096 |
@@ -60,7 +64,6 @@ struct device_attribute; | |||
60 | #define ARCMSR_MAX_HBB_POSTQUEUE 264 | 64 | #define ARCMSR_MAX_HBB_POSTQUEUE 264 |
61 | #define ARCMSR_MAX_XFER_LEN 0x26000 /* 152K */ | 65 | #define ARCMSR_MAX_XFER_LEN 0x26000 /* 152K */ |
62 | #define ARCMSR_CDB_SG_PAGE_LENGTH 256 | 66 | #define ARCMSR_CDB_SG_PAGE_LENGTH 256 |
63 | #define SCSI_CMD_ARECA_SPECIFIC 0xE1 | ||
64 | #ifndef PCI_DEVICE_ID_ARECA_1880 | 67 | #ifndef PCI_DEVICE_ID_ARECA_1880 |
65 | #define PCI_DEVICE_ID_ARECA_1880 0x1880 | 68 | #define PCI_DEVICE_ID_ARECA_1880 0x1880 |
66 | #endif | 69 | #endif |
diff --git a/drivers/scsi/arcmsr/arcmsr_attr.c b/drivers/scsi/arcmsr/arcmsr_attr.c index a4e04c50c436..acdae33de521 100644 --- a/drivers/scsi/arcmsr/arcmsr_attr.c +++ b/drivers/scsi/arcmsr/arcmsr_attr.c | |||
@@ -2,7 +2,7 @@ | |||
2 | ******************************************************************************* | 2 | ******************************************************************************* |
3 | ** O.S : Linux | 3 | ** O.S : Linux |
4 | ** FILE NAME : arcmsr_attr.c | 4 | ** FILE NAME : arcmsr_attr.c |
5 | ** BY : Erich Chen | 5 | ** BY : Nick Cheng |
6 | ** Description: attributes exported to sysfs and device host | 6 | ** Description: attributes exported to sysfs and device host |
7 | ******************************************************************************* | 7 | ******************************************************************************* |
8 | ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved | 8 | ** Copyright (C) 2002 - 2005, Areca Technology Corporation All rights reserved |
diff --git a/drivers/scsi/arcmsr/arcmsr_hba.c b/drivers/scsi/arcmsr/arcmsr_hba.c index 1cadcd6b7da6..984bd527c6c9 100644 --- a/drivers/scsi/arcmsr/arcmsr_hba.c +++ b/drivers/scsi/arcmsr/arcmsr_hba.c | |||
@@ -2,7 +2,7 @@ | |||
2 | ******************************************************************************* | 2 | ******************************************************************************* |
3 | ** O.S : Linux | 3 | ** O.S : Linux |
4 | ** FILE NAME : arcmsr_hba.c | 4 | ** FILE NAME : arcmsr_hba.c |
5 | ** BY : Erich Chen | 5 | ** BY : Nick Cheng |
6 | ** Description: SCSI RAID Device Driver for | 6 | ** Description: SCSI RAID Device Driver for |
7 | ** ARECA RAID Host adapter | 7 | ** ARECA RAID Host adapter |
8 | ******************************************************************************* | 8 | ******************************************************************************* |
@@ -76,7 +76,7 @@ MODULE_DESCRIPTION("ARECA (ARC11xx/12xx/16xx/1880) SATA/SAS RAID Host Bus Adapte | |||
76 | MODULE_LICENSE("Dual BSD/GPL"); | 76 | MODULE_LICENSE("Dual BSD/GPL"); |
77 | MODULE_VERSION(ARCMSR_DRIVER_VERSION); | 77 | MODULE_VERSION(ARCMSR_DRIVER_VERSION); |
78 | static int sleeptime = 10; | 78 | static int sleeptime = 10; |
79 | static int retrycount = 30; | 79 | static int retrycount = 12; |
80 | wait_queue_head_t wait_q; | 80 | wait_queue_head_t wait_q; |
81 | static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, | 81 | static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb, |
82 | struct scsi_cmnd *cmd); | 82 | struct scsi_cmnd *cmd); |
@@ -187,7 +187,6 @@ int arcmsr_sleep_for_bus_reset(struct scsi_cmnd *cmd) | |||
187 | if (isleep > 0) { | 187 | if (isleep > 0) { |
188 | msleep(isleep*1000); | 188 | msleep(isleep*1000); |
189 | } | 189 | } |
190 | printk(KERN_NOTICE "wake-up\n"); | ||
191 | return 0; | 190 | return 0; |
192 | } | 191 | } |
193 | 192 | ||
@@ -921,7 +920,6 @@ static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, | |||
921 | } | 920 | } |
922 | 921 | ||
923 | static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) | 922 | static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error) |
924 | |||
925 | { | 923 | { |
926 | int id, lun; | 924 | int id, lun; |
927 | if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { | 925 | if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) { |
@@ -948,7 +946,7 @@ static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct Comma | |||
948 | , pCCB->startdone | 946 | , pCCB->startdone |
949 | , atomic_read(&acb->ccboutstandingcount)); | 947 | , atomic_read(&acb->ccboutstandingcount)); |
950 | return; | 948 | return; |
951 | } | 949 | } |
952 | arcmsr_report_ccb_state(acb, pCCB, error); | 950 | arcmsr_report_ccb_state(acb, pCCB, error); |
953 | } | 951 | } |
954 | 952 | ||
@@ -981,7 +979,7 @@ static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb) | |||
981 | case ACB_ADAPTER_TYPE_B: { | 979 | case ACB_ADAPTER_TYPE_B: { |
982 | struct MessageUnit_B *reg = acb->pmuB; | 980 | struct MessageUnit_B *reg = acb->pmuB; |
983 | /*clear all outbound posted Q*/ | 981 | /*clear all outbound posted Q*/ |
984 | writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, ®->iop2drv_doorbell); /* clear doorbell interrupt */ | 982 | writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */ |
985 | for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { | 983 | for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) { |
986 | if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { | 984 | if ((flag_ccb = readl(®->done_qbuffer[i])) != 0) { |
987 | writel(0, ®->done_qbuffer[i]); | 985 | writel(0, ®->done_qbuffer[i]); |
@@ -1511,7 +1509,6 @@ static void arcmsr_hba_postqueue_isr(struct AdapterControlBlock *acb) | |||
1511 | arcmsr_drain_donequeue(acb, pCCB, error); | 1509 | arcmsr_drain_donequeue(acb, pCCB, error); |
1512 | } | 1510 | } |
1513 | } | 1511 | } |
1514 | |||
1515 | static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) | 1512 | static void arcmsr_hbb_postqueue_isr(struct AdapterControlBlock *acb) |
1516 | { | 1513 | { |
1517 | uint32_t index; | 1514 | uint32_t index; |
@@ -2106,10 +2103,6 @@ static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd, | |||
2106 | if (atomic_read(&acb->ccboutstandingcount) >= | 2103 | if (atomic_read(&acb->ccboutstandingcount) >= |
2107 | ARCMSR_MAX_OUTSTANDING_CMD) | 2104 | ARCMSR_MAX_OUTSTANDING_CMD) |
2108 | return SCSI_MLQUEUE_HOST_BUSY; | 2105 | return SCSI_MLQUEUE_HOST_BUSY; |
2109 | if ((scsicmd == SCSI_CMD_ARECA_SPECIFIC)) { | ||
2110 | printk(KERN_NOTICE "Receiveing SCSI_CMD_ARECA_SPECIFIC command..\n"); | ||
2111 | return 0; | ||
2112 | } | ||
2113 | ccb = arcmsr_get_freeccb(acb); | 2106 | ccb = arcmsr_get_freeccb(acb); |
2114 | if (!ccb) | 2107 | if (!ccb) |
2115 | return SCSI_MLQUEUE_HOST_BUSY; | 2108 | return SCSI_MLQUEUE_HOST_BUSY; |
@@ -2393,6 +2386,7 @@ static int arcmsr_polling_hbb_ccbdone(struct AdapterControlBlock *acb, | |||
2393 | int index, rtn; | 2386 | int index, rtn; |
2394 | bool error; | 2387 | bool error; |
2395 | polling_hbb_ccb_retry: | 2388 | polling_hbb_ccb_retry: |
2389 | |||
2396 | poll_count++; | 2390 | poll_count++; |
2397 | /* clear doorbell interrupt */ | 2391 | /* clear doorbell interrupt */ |
2398 | writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); | 2392 | writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); |
@@ -2663,6 +2657,7 @@ static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) | |||
2663 | { | 2657 | { |
2664 | struct MessageUnit_A __iomem *reg = acb->pmuA; | 2658 | struct MessageUnit_A __iomem *reg = acb->pmuA; |
2665 | if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ | 2659 | if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ |
2660 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | ||
2666 | return; | 2661 | return; |
2667 | } else { | 2662 | } else { |
2668 | acb->fw_flag = FW_NORMAL; | 2663 | acb->fw_flag = FW_NORMAL; |
@@ -2670,8 +2665,10 @@ static void arcmsr_request_hba_device_map(struct AdapterControlBlock *acb) | |||
2670 | atomic_set(&acb->rq_map_token, 16); | 2665 | atomic_set(&acb->rq_map_token, 16); |
2671 | } | 2666 | } |
2672 | atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); | 2667 | atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); |
2673 | if (atomic_dec_and_test(&acb->rq_map_token)) | 2668 | if (atomic_dec_and_test(&acb->rq_map_token)) { |
2669 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | ||
2674 | return; | 2670 | return; |
2671 | } | ||
2675 | writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); | 2672 | writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); |
2676 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | 2673 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); |
2677 | } | 2674 | } |
@@ -2682,15 +2679,18 @@ static void arcmsr_request_hbb_device_map(struct AdapterControlBlock *acb) | |||
2682 | { | 2679 | { |
2683 | struct MessageUnit_B __iomem *reg = acb->pmuB; | 2680 | struct MessageUnit_B __iomem *reg = acb->pmuB; |
2684 | if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ | 2681 | if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){ |
2682 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | ||
2685 | return; | 2683 | return; |
2686 | } else { | 2684 | } else { |
2687 | acb->fw_flag = FW_NORMAL; | 2685 | acb->fw_flag = FW_NORMAL; |
2688 | if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { | 2686 | if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) { |
2689 | atomic_set(&acb->rq_map_token,16); | 2687 | atomic_set(&acb->rq_map_token, 16); |
2690 | } | 2688 | } |
2691 | atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); | 2689 | atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); |
2692 | if(atomic_dec_and_test(&acb->rq_map_token)) | 2690 | if (atomic_dec_and_test(&acb->rq_map_token)) { |
2691 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | ||
2693 | return; | 2692 | return; |
2693 | } | ||
2694 | writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); | 2694 | writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell); |
2695 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | 2695 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); |
2696 | } | 2696 | } |
@@ -2701,6 +2701,7 @@ static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb) | |||
2701 | { | 2701 | { |
2702 | struct MessageUnit_C __iomem *reg = acb->pmuC; | 2702 | struct MessageUnit_C __iomem *reg = acb->pmuC; |
2703 | if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { | 2703 | if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) { |
2704 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | ||
2704 | return; | 2705 | return; |
2705 | } else { | 2706 | } else { |
2706 | acb->fw_flag = FW_NORMAL; | 2707 | acb->fw_flag = FW_NORMAL; |
@@ -2708,8 +2709,10 @@ static void arcmsr_request_hbc_device_map(struct AdapterControlBlock *acb) | |||
2708 | atomic_set(&acb->rq_map_token, 16); | 2709 | atomic_set(&acb->rq_map_token, 16); |
2709 | } | 2710 | } |
2710 | atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); | 2711 | atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token)); |
2711 | if (atomic_dec_and_test(&acb->rq_map_token)) | 2712 | if (atomic_dec_and_test(&acb->rq_map_token)) { |
2713 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | ||
2712 | return; | 2714 | return; |
2715 | } | ||
2713 | writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); | 2716 | writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, ®->inbound_msgaddr0); |
2714 | writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); | 2717 | writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, ®->inbound_doorbell); |
2715 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); | 2718 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); |
@@ -2897,6 +2900,8 @@ static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) | |||
2897 | uint32_t intmask_org; | 2900 | uint32_t intmask_org; |
2898 | uint8_t rtnval = 0x00; | 2901 | uint8_t rtnval = 0x00; |
2899 | int i = 0; | 2902 | int i = 0; |
2903 | unsigned long flags; | ||
2904 | |||
2900 | if (atomic_read(&acb->ccboutstandingcount) != 0) { | 2905 | if (atomic_read(&acb->ccboutstandingcount) != 0) { |
2901 | /* disable all outbound interrupt */ | 2906 | /* disable all outbound interrupt */ |
2902 | intmask_org = arcmsr_disable_outbound_ints(acb); | 2907 | intmask_org = arcmsr_disable_outbound_ints(acb); |
@@ -2907,7 +2912,12 @@ static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) | |||
2907 | for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { | 2912 | for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) { |
2908 | ccb = acb->pccb_pool[i]; | 2913 | ccb = acb->pccb_pool[i]; |
2909 | if (ccb->startdone == ARCMSR_CCB_START) { | 2914 | if (ccb->startdone == ARCMSR_CCB_START) { |
2910 | arcmsr_ccb_complete(ccb); | 2915 | scsi_dma_unmap(ccb->pcmd); |
2916 | ccb->startdone = ARCMSR_CCB_DONE; | ||
2917 | ccb->ccb_flags = 0; | ||
2918 | spin_lock_irqsave(&acb->ccblist_lock, flags); | ||
2919 | list_add_tail(&ccb->list, &acb->ccb_free_list); | ||
2920 | spin_unlock_irqrestore(&acb->ccblist_lock, flags); | ||
2911 | } | 2921 | } |
2912 | } | 2922 | } |
2913 | atomic_set(&acb->ccboutstandingcount, 0); | 2923 | atomic_set(&acb->ccboutstandingcount, 0); |
@@ -2920,8 +2930,7 @@ static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb) | |||
2920 | 2930 | ||
2921 | static int arcmsr_bus_reset(struct scsi_cmnd *cmd) | 2931 | static int arcmsr_bus_reset(struct scsi_cmnd *cmd) |
2922 | { | 2932 | { |
2923 | struct AdapterControlBlock *acb = | 2933 | struct AdapterControlBlock *acb; |
2924 | (struct AdapterControlBlock *)cmd->device->host->hostdata; | ||
2925 | uint32_t intmask_org, outbound_doorbell; | 2934 | uint32_t intmask_org, outbound_doorbell; |
2926 | int retry_count = 0; | 2935 | int retry_count = 0; |
2927 | int rtn = FAILED; | 2936 | int rtn = FAILED; |
@@ -2971,31 +2980,16 @@ sleep_again: | |||
2971 | atomic_set(&acb->rq_map_token, 16); | 2980 | atomic_set(&acb->rq_map_token, 16); |
2972 | atomic_set(&acb->ante_token_value, 16); | 2981 | atomic_set(&acb->ante_token_value, 16); |
2973 | acb->fw_flag = FW_NORMAL; | 2982 | acb->fw_flag = FW_NORMAL; |
2974 | init_timer(&acb->eternal_timer); | 2983 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); |
2975 | acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); | ||
2976 | acb->eternal_timer.data = (unsigned long) acb; | ||
2977 | acb->eternal_timer.function = &arcmsr_request_device_map; | ||
2978 | add_timer(&acb->eternal_timer); | ||
2979 | acb->acb_flags &= ~ACB_F_BUS_RESET; | 2984 | acb->acb_flags &= ~ACB_F_BUS_RESET; |
2980 | rtn = SUCCESS; | 2985 | rtn = SUCCESS; |
2981 | printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); | 2986 | printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); |
2982 | } else { | 2987 | } else { |
2983 | acb->acb_flags &= ~ACB_F_BUS_RESET; | 2988 | acb->acb_flags &= ~ACB_F_BUS_RESET; |
2984 | if (atomic_read(&acb->rq_map_token) == 0) { | 2989 | atomic_set(&acb->rq_map_token, 16); |
2985 | atomic_set(&acb->rq_map_token, 16); | 2990 | atomic_set(&acb->ante_token_value, 16); |
2986 | atomic_set(&acb->ante_token_value, 16); | 2991 | acb->fw_flag = FW_NORMAL; |
2987 | acb->fw_flag = FW_NORMAL; | 2992 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); |
2988 | init_timer(&acb->eternal_timer); | ||
2989 | acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); | ||
2990 | acb->eternal_timer.data = (unsigned long) acb; | ||
2991 | acb->eternal_timer.function = &arcmsr_request_device_map; | ||
2992 | add_timer(&acb->eternal_timer); | ||
2993 | } else { | ||
2994 | atomic_set(&acb->rq_map_token, 16); | ||
2995 | atomic_set(&acb->ante_token_value, 16); | ||
2996 | acb->fw_flag = FW_NORMAL; | ||
2997 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); | ||
2998 | } | ||
2999 | rtn = SUCCESS; | 2993 | rtn = SUCCESS; |
3000 | } | 2994 | } |
3001 | break; | 2995 | break; |
@@ -3007,21 +3001,10 @@ sleep_again: | |||
3007 | rtn = FAILED; | 3001 | rtn = FAILED; |
3008 | } else { | 3002 | } else { |
3009 | acb->acb_flags &= ~ACB_F_BUS_RESET; | 3003 | acb->acb_flags &= ~ACB_F_BUS_RESET; |
3010 | if (atomic_read(&acb->rq_map_token) == 0) { | 3004 | atomic_set(&acb->rq_map_token, 16); |
3011 | atomic_set(&acb->rq_map_token, 16); | 3005 | atomic_set(&acb->ante_token_value, 16); |
3012 | atomic_set(&acb->ante_token_value, 16); | 3006 | acb->fw_flag = FW_NORMAL; |
3013 | acb->fw_flag = FW_NORMAL; | 3007 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); |
3014 | init_timer(&acb->eternal_timer); | ||
3015 | acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); | ||
3016 | acb->eternal_timer.data = (unsigned long) acb; | ||
3017 | acb->eternal_timer.function = &arcmsr_request_device_map; | ||
3018 | add_timer(&acb->eternal_timer); | ||
3019 | } else { | ||
3020 | atomic_set(&acb->rq_map_token, 16); | ||
3021 | atomic_set(&acb->ante_token_value, 16); | ||
3022 | acb->fw_flag = FW_NORMAL; | ||
3023 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); | ||
3024 | } | ||
3025 | rtn = SUCCESS; | 3008 | rtn = SUCCESS; |
3026 | } | 3009 | } |
3027 | break; | 3010 | break; |
@@ -3067,31 +3050,16 @@ sleep: | |||
3067 | atomic_set(&acb->rq_map_token, 16); | 3050 | atomic_set(&acb->rq_map_token, 16); |
3068 | atomic_set(&acb->ante_token_value, 16); | 3051 | atomic_set(&acb->ante_token_value, 16); |
3069 | acb->fw_flag = FW_NORMAL; | 3052 | acb->fw_flag = FW_NORMAL; |
3070 | init_timer(&acb->eternal_timer); | 3053 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ)); |
3071 | acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ); | ||
3072 | acb->eternal_timer.data = (unsigned long) acb; | ||
3073 | acb->eternal_timer.function = &arcmsr_request_device_map; | ||
3074 | add_timer(&acb->eternal_timer); | ||
3075 | acb->acb_flags &= ~ACB_F_BUS_RESET; | 3054 | acb->acb_flags &= ~ACB_F_BUS_RESET; |
3076 | rtn = SUCCESS; | 3055 | rtn = SUCCESS; |
3077 | printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); | 3056 | printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n"); |
3078 | } else { | 3057 | } else { |
3079 | acb->acb_flags &= ~ACB_F_BUS_RESET; | 3058 | acb->acb_flags &= ~ACB_F_BUS_RESET; |
3080 | if (atomic_read(&acb->rq_map_token) == 0) { | 3059 | atomic_set(&acb->rq_map_token, 16); |
3081 | atomic_set(&acb->rq_map_token, 16); | 3060 | atomic_set(&acb->ante_token_value, 16); |
3082 | atomic_set(&acb->ante_token_value, 16); | 3061 | acb->fw_flag = FW_NORMAL; |
3083 | acb->fw_flag = FW_NORMAL; | 3062 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); |
3084 | init_timer(&acb->eternal_timer); | ||
3085 | acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6*HZ); | ||
3086 | acb->eternal_timer.data = (unsigned long) acb; | ||
3087 | acb->eternal_timer.function = &arcmsr_request_device_map; | ||
3088 | add_timer(&acb->eternal_timer); | ||
3089 | } else { | ||
3090 | atomic_set(&acb->rq_map_token, 16); | ||
3091 | atomic_set(&acb->ante_token_value, 16); | ||
3092 | acb->fw_flag = FW_NORMAL; | ||
3093 | mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ)); | ||
3094 | } | ||
3095 | rtn = SUCCESS; | 3063 | rtn = SUCCESS; |
3096 | } | 3064 | } |
3097 | break; | 3065 | break; |
diff --git a/drivers/scsi/libsas/sas_scsi_host.c b/drivers/scsi/libsas/sas_scsi_host.c index 5815cbeb27a6..9a7aaf5f1311 100644 --- a/drivers/scsi/libsas/sas_scsi_host.c +++ b/drivers/scsi/libsas/sas_scsi_host.c | |||
@@ -646,6 +646,7 @@ void sas_scsi_recover_host(struct Scsi_Host *shost) | |||
646 | 646 | ||
647 | spin_lock_irqsave(shost->host_lock, flags); | 647 | spin_lock_irqsave(shost->host_lock, flags); |
648 | list_splice_init(&shost->eh_cmd_q, &eh_work_q); | 648 | list_splice_init(&shost->eh_cmd_q, &eh_work_q); |
649 | shost->host_eh_scheduled = 0; | ||
649 | spin_unlock_irqrestore(shost->host_lock, flags); | 650 | spin_unlock_irqrestore(shost->host_lock, flags); |
650 | 651 | ||
651 | SAS_DPRINTK("Enter %s\n", __func__); | 652 | SAS_DPRINTK("Enter %s\n", __func__); |
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c index b2a817055b8b..9ead0399808a 100644 --- a/drivers/scsi/mpt2sas/mpt2sas_base.c +++ b/drivers/scsi/mpt2sas/mpt2sas_base.c | |||
@@ -2176,9 +2176,9 @@ _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag) | |||
2176 | /* adjust hba_queue_depth, reply_free_queue_depth, | 2176 | /* adjust hba_queue_depth, reply_free_queue_depth, |
2177 | * and queue_size | 2177 | * and queue_size |
2178 | */ | 2178 | */ |
2179 | ioc->hba_queue_depth -= queue_diff; | 2179 | ioc->hba_queue_depth -= (queue_diff / 2); |
2180 | ioc->reply_free_queue_depth -= queue_diff; | 2180 | ioc->reply_free_queue_depth -= (queue_diff / 2); |
2181 | queue_size -= queue_diff; | 2181 | queue_size = facts->MaxReplyDescriptorPostQueueDepth; |
2182 | } | 2182 | } |
2183 | ioc->reply_post_queue_depth = queue_size; | 2183 | ioc->reply_post_queue_depth = queue_size; |
2184 | 2184 | ||
@@ -3941,6 +3941,8 @@ mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc) | |||
3941 | static void | 3941 | static void |
3942 | _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) | 3942 | _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) |
3943 | { | 3943 | { |
3944 | mpt2sas_scsih_reset_handler(ioc, reset_phase); | ||
3945 | mpt2sas_ctl_reset_handler(ioc, reset_phase); | ||
3944 | switch (reset_phase) { | 3946 | switch (reset_phase) { |
3945 | case MPT2_IOC_PRE_RESET: | 3947 | case MPT2_IOC_PRE_RESET: |
3946 | dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " | 3948 | dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: " |
@@ -3971,8 +3973,6 @@ _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase) | |||
3971 | "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); | 3973 | "MPT2_IOC_DONE_RESET\n", ioc->name, __func__)); |
3972 | break; | 3974 | break; |
3973 | } | 3975 | } |
3974 | mpt2sas_scsih_reset_handler(ioc, reset_phase); | ||
3975 | mpt2sas_ctl_reset_handler(ioc, reset_phase); | ||
3976 | } | 3976 | } |
3977 | 3977 | ||
3978 | /** | 3978 | /** |
@@ -4026,6 +4026,7 @@ mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, | |||
4026 | { | 4026 | { |
4027 | int r; | 4027 | int r; |
4028 | unsigned long flags; | 4028 | unsigned long flags; |
4029 | u8 pe_complete = ioc->wait_for_port_enable_to_complete; | ||
4029 | 4030 | ||
4030 | dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name, | 4031 | dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name, |
4031 | __func__)); | 4032 | __func__)); |
@@ -4068,6 +4069,14 @@ mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag, | |||
4068 | if (r) | 4069 | if (r) |
4069 | goto out; | 4070 | goto out; |
4070 | _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); | 4071 | _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET); |
4072 | |||
4073 | /* If this hard reset is called while port enable is active, then | ||
4074 | * there is no reason to call make_ioc_operational | ||
4075 | */ | ||
4076 | if (pe_complete) { | ||
4077 | r = -EFAULT; | ||
4078 | goto out; | ||
4079 | } | ||
4071 | r = _base_make_ioc_operational(ioc, sleep_flag); | 4080 | r = _base_make_ioc_operational(ioc, sleep_flag); |
4072 | if (!r) | 4081 | if (!r) |
4073 | _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); | 4082 | _base_reset_handler(ioc, MPT2_IOC_DONE_RESET); |
diff --git a/drivers/scsi/mpt2sas/mpt2sas_scsih.c b/drivers/scsi/mpt2sas/mpt2sas_scsih.c index eda347c57979..5ded3db6e316 100644 --- a/drivers/scsi/mpt2sas/mpt2sas_scsih.c +++ b/drivers/scsi/mpt2sas/mpt2sas_scsih.c | |||
@@ -819,7 +819,7 @@ _scsih_is_end_device(u32 device_info) | |||
819 | } | 819 | } |
820 | 820 | ||
821 | /** | 821 | /** |
822 | * mptscsih_get_scsi_lookup - returns scmd entry | 822 | * _scsih_scsi_lookup_get - returns scmd entry |
823 | * @ioc: per adapter object | 823 | * @ioc: per adapter object |
824 | * @smid: system request message index | 824 | * @smid: system request message index |
825 | * | 825 | * |
@@ -832,6 +832,28 @@ _scsih_scsi_lookup_get(struct MPT2SAS_ADAPTER *ioc, u16 smid) | |||
832 | } | 832 | } |
833 | 833 | ||
834 | /** | 834 | /** |
835 | * _scsih_scsi_lookup_get_clear - returns scmd entry | ||
836 | * @ioc: per adapter object | ||
837 | * @smid: system request message index | ||
838 | * | ||
839 | * Returns the smid stored scmd pointer. | ||
840 | * Then will derefrence the stored scmd pointer. | ||
841 | */ | ||
842 | static inline struct scsi_cmnd * | ||
843 | _scsih_scsi_lookup_get_clear(struct MPT2SAS_ADAPTER *ioc, u16 smid) | ||
844 | { | ||
845 | unsigned long flags; | ||
846 | struct scsi_cmnd *scmd; | ||
847 | |||
848 | spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); | ||
849 | scmd = ioc->scsi_lookup[smid - 1].scmd; | ||
850 | ioc->scsi_lookup[smid - 1].scmd = NULL; | ||
851 | spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); | ||
852 | |||
853 | return scmd; | ||
854 | } | ||
855 | |||
856 | /** | ||
835 | * _scsih_scsi_lookup_find_by_scmd - scmd lookup | 857 | * _scsih_scsi_lookup_find_by_scmd - scmd lookup |
836 | * @ioc: per adapter object | 858 | * @ioc: per adapter object |
837 | * @smid: system request message index | 859 | * @smid: system request message index |
@@ -2981,9 +3003,6 @@ _scsih_check_topo_delete_events(struct MPT2SAS_ADAPTER *ioc, | |||
2981 | u16 handle; | 3003 | u16 handle; |
2982 | 3004 | ||
2983 | for (i = 0 ; i < event_data->NumEntries; i++) { | 3005 | for (i = 0 ; i < event_data->NumEntries; i++) { |
2984 | if (event_data->PHY[i].PhyStatus & | ||
2985 | MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT) | ||
2986 | continue; | ||
2987 | handle = le16_to_cpu(event_data->PHY[i].AttachedDevHandle); | 3006 | handle = le16_to_cpu(event_data->PHY[i].AttachedDevHandle); |
2988 | if (!handle) | 3007 | if (!handle) |
2989 | continue; | 3008 | continue; |
@@ -3210,7 +3229,7 @@ _scsih_flush_running_cmds(struct MPT2SAS_ADAPTER *ioc) | |||
3210 | u16 count = 0; | 3229 | u16 count = 0; |
3211 | 3230 | ||
3212 | for (smid = 1; smid <= ioc->scsiio_depth; smid++) { | 3231 | for (smid = 1; smid <= ioc->scsiio_depth; smid++) { |
3213 | scmd = _scsih_scsi_lookup_get(ioc, smid); | 3232 | scmd = _scsih_scsi_lookup_get_clear(ioc, smid); |
3214 | if (!scmd) | 3233 | if (!scmd) |
3215 | continue; | 3234 | continue; |
3216 | count++; | 3235 | count++; |
@@ -3804,7 +3823,7 @@ _scsih_io_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 msix_index, u32 reply) | |||
3804 | u32 response_code = 0; | 3823 | u32 response_code = 0; |
3805 | 3824 | ||
3806 | mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); | 3825 | mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply); |
3807 | scmd = _scsih_scsi_lookup_get(ioc, smid); | 3826 | scmd = _scsih_scsi_lookup_get_clear(ioc, smid); |
3808 | if (scmd == NULL) | 3827 | if (scmd == NULL) |
3809 | return 1; | 3828 | return 1; |
3810 | 3829 | ||
@@ -5005,6 +5024,12 @@ _scsih_sas_device_status_change_event(struct MPT2SAS_ADAPTER *ioc, | |||
5005 | event_data); | 5024 | event_data); |
5006 | #endif | 5025 | #endif |
5007 | 5026 | ||
5027 | /* In MPI Revision K (0xC), the internal device reset complete was | ||
5028 | * implemented, so avoid setting tm_busy flag for older firmware. | ||
5029 | */ | ||
5030 | if ((ioc->facts.HeaderVersion >> 8) < 0xC) | ||
5031 | return; | ||
5032 | |||
5008 | if (event_data->ReasonCode != | 5033 | if (event_data->ReasonCode != |
5009 | MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET && | 5034 | MPI2_EVENT_SAS_DEV_STAT_RC_INTERNAL_DEVICE_RESET && |
5010 | event_data->ReasonCode != | 5035 | event_data->ReasonCode != |
@@ -5099,6 +5124,7 @@ _scsih_sas_broadcast_primative_event(struct MPT2SAS_ADAPTER *ioc, | |||
5099 | struct fw_event_work *fw_event) | 5124 | struct fw_event_work *fw_event) |
5100 | { | 5125 | { |
5101 | struct scsi_cmnd *scmd; | 5126 | struct scsi_cmnd *scmd; |
5127 | struct scsi_device *sdev; | ||
5102 | u16 smid, handle; | 5128 | u16 smid, handle; |
5103 | u32 lun; | 5129 | u32 lun; |
5104 | struct MPT2SAS_DEVICE *sas_device_priv_data; | 5130 | struct MPT2SAS_DEVICE *sas_device_priv_data; |
@@ -5109,12 +5135,17 @@ _scsih_sas_broadcast_primative_event(struct MPT2SAS_ADAPTER *ioc, | |||
5109 | Mpi2EventDataSasBroadcastPrimitive_t *event_data = fw_event->event_data; | 5135 | Mpi2EventDataSasBroadcastPrimitive_t *event_data = fw_event->event_data; |
5110 | #endif | 5136 | #endif |
5111 | u16 ioc_status; | 5137 | u16 ioc_status; |
5138 | unsigned long flags; | ||
5139 | int r; | ||
5140 | |||
5112 | dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "broadcast primative: " | 5141 | dewtprintk(ioc, printk(MPT2SAS_INFO_FMT "broadcast primative: " |
5113 | "phy number(%d), width(%d)\n", ioc->name, event_data->PhyNum, | 5142 | "phy number(%d), width(%d)\n", ioc->name, event_data->PhyNum, |
5114 | event_data->PortWidth)); | 5143 | event_data->PortWidth)); |
5115 | dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name, | 5144 | dtmprintk(ioc, printk(MPT2SAS_INFO_FMT "%s: enter\n", ioc->name, |
5116 | __func__)); | 5145 | __func__)); |
5117 | 5146 | ||
5147 | spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); | ||
5148 | ioc->broadcast_aen_busy = 0; | ||
5118 | termination_count = 0; | 5149 | termination_count = 0; |
5119 | query_count = 0; | 5150 | query_count = 0; |
5120 | mpi_reply = ioc->tm_cmds.reply; | 5151 | mpi_reply = ioc->tm_cmds.reply; |
@@ -5122,7 +5153,8 @@ _scsih_sas_broadcast_primative_event(struct MPT2SAS_ADAPTER *ioc, | |||
5122 | scmd = _scsih_scsi_lookup_get(ioc, smid); | 5153 | scmd = _scsih_scsi_lookup_get(ioc, smid); |
5123 | if (!scmd) | 5154 | if (!scmd) |
5124 | continue; | 5155 | continue; |
5125 | sas_device_priv_data = scmd->device->hostdata; | 5156 | sdev = scmd->device; |
5157 | sas_device_priv_data = sdev->hostdata; | ||
5126 | if (!sas_device_priv_data || !sas_device_priv_data->sas_target) | 5158 | if (!sas_device_priv_data || !sas_device_priv_data->sas_target) |
5127 | continue; | 5159 | continue; |
5128 | /* skip hidden raid components */ | 5160 | /* skip hidden raid components */ |
@@ -5138,6 +5170,7 @@ _scsih_sas_broadcast_primative_event(struct MPT2SAS_ADAPTER *ioc, | |||
5138 | lun = sas_device_priv_data->lun; | 5170 | lun = sas_device_priv_data->lun; |
5139 | query_count++; | 5171 | query_count++; |
5140 | 5172 | ||
5173 | spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); | ||
5141 | mpt2sas_scsih_issue_tm(ioc, handle, 0, 0, lun, | 5174 | mpt2sas_scsih_issue_tm(ioc, handle, 0, 0, lun, |
5142 | MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK, smid, 30, NULL); | 5175 | MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK, smid, 30, NULL); |
5143 | ioc->tm_cmds.status = MPT2_CMD_NOT_USED; | 5176 | ioc->tm_cmds.status = MPT2_CMD_NOT_USED; |
@@ -5147,14 +5180,20 @@ _scsih_sas_broadcast_primative_event(struct MPT2SAS_ADAPTER *ioc, | |||
5147 | (mpi_reply->ResponseCode == | 5180 | (mpi_reply->ResponseCode == |
5148 | MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED || | 5181 | MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED || |
5149 | mpi_reply->ResponseCode == | 5182 | mpi_reply->ResponseCode == |
5150 | MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC)) | 5183 | MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC)) { |
5184 | spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); | ||
5151 | continue; | 5185 | continue; |
5152 | 5186 | } | |
5153 | mpt2sas_scsih_issue_tm(ioc, handle, 0, 0, lun, | 5187 | r = mpt2sas_scsih_issue_tm(ioc, handle, sdev->channel, sdev->id, |
5154 | MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET, 0, 30, NULL); | 5188 | sdev->lun, MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK, smid, 30, |
5189 | scmd); | ||
5190 | if (r == FAILED) | ||
5191 | sdev_printk(KERN_WARNING, sdev, "task abort: FAILED " | ||
5192 | "scmd(%p)\n", scmd); | ||
5155 | termination_count += le32_to_cpu(mpi_reply->TerminationCount); | 5193 | termination_count += le32_to_cpu(mpi_reply->TerminationCount); |
5194 | spin_lock_irqsave(&ioc->scsi_lookup_lock, flags); | ||
5156 | } | 5195 | } |
5157 | ioc->broadcast_aen_busy = 0; | 5196 | spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags); |
5158 | 5197 | ||
5159 | dtmprintk(ioc, printk(MPT2SAS_INFO_FMT | 5198 | dtmprintk(ioc, printk(MPT2SAS_INFO_FMT |
5160 | "%s - exit, query_count = %d termination_count = %d\n", | 5199 | "%s - exit, query_count = %d termination_count = %d\n", |
@@ -6626,6 +6665,7 @@ _scsih_remove(struct pci_dev *pdev) | |||
6626 | destroy_workqueue(wq); | 6665 | destroy_workqueue(wq); |
6627 | 6666 | ||
6628 | /* release all the volumes */ | 6667 | /* release all the volumes */ |
6668 | _scsih_ir_shutdown(ioc); | ||
6629 | list_for_each_entry_safe(raid_device, next, &ioc->raid_device_list, | 6669 | list_for_each_entry_safe(raid_device, next, &ioc->raid_device_list, |
6630 | list) { | 6670 | list) { |
6631 | if (raid_device->starget) { | 6671 | if (raid_device->starget) { |
diff --git a/drivers/vhost/net.c b/drivers/vhost/net.c index 9b3ca103135f..f616cefc95ba 100644 --- a/drivers/vhost/net.c +++ b/drivers/vhost/net.c | |||
@@ -128,8 +128,7 @@ static void handle_tx(struct vhost_net *net) | |||
128 | size_t hdr_size; | 128 | size_t hdr_size; |
129 | struct socket *sock; | 129 | struct socket *sock; |
130 | 130 | ||
131 | /* TODO: check that we are running from vhost_worker? | 131 | /* TODO: check that we are running from vhost_worker? */ |
132 | * Not sure it's worth it, it's straight-forward enough. */ | ||
133 | sock = rcu_dereference_check(vq->private_data, 1); | 132 | sock = rcu_dereference_check(vq->private_data, 1); |
134 | if (!sock) | 133 | if (!sock) |
135 | return; | 134 | return; |
@@ -306,7 +305,8 @@ static void handle_rx_big(struct vhost_net *net) | |||
306 | size_t len, total_len = 0; | 305 | size_t len, total_len = 0; |
307 | int err; | 306 | int err; |
308 | size_t hdr_size; | 307 | size_t hdr_size; |
309 | struct socket *sock = rcu_dereference(vq->private_data); | 308 | /* TODO: check that we are running from vhost_worker? */ |
309 | struct socket *sock = rcu_dereference_check(vq->private_data, 1); | ||
310 | if (!sock || skb_queue_empty(&sock->sk->sk_receive_queue)) | 310 | if (!sock || skb_queue_empty(&sock->sk->sk_receive_queue)) |
311 | return; | 311 | return; |
312 | 312 | ||
@@ -415,7 +415,8 @@ static void handle_rx_mergeable(struct vhost_net *net) | |||
415 | int err, headcount; | 415 | int err, headcount; |
416 | size_t vhost_hlen, sock_hlen; | 416 | size_t vhost_hlen, sock_hlen; |
417 | size_t vhost_len, sock_len; | 417 | size_t vhost_len, sock_len; |
418 | struct socket *sock = rcu_dereference(vq->private_data); | 418 | /* TODO: check that we are running from vhost_worker? */ |
419 | struct socket *sock = rcu_dereference_check(vq->private_data, 1); | ||
419 | if (!sock || skb_queue_empty(&sock->sk->sk_receive_queue)) | 420 | if (!sock || skb_queue_empty(&sock->sk->sk_receive_queue)) |
420 | return; | 421 | return; |
421 | 422 | ||
diff --git a/drivers/vhost/vhost.h b/drivers/vhost/vhost.h index 2af44b7b1f3f..b3363ae38518 100644 --- a/drivers/vhost/vhost.h +++ b/drivers/vhost/vhost.h | |||
@@ -173,9 +173,9 @@ static inline int vhost_has_feature(struct vhost_dev *dev, int bit) | |||
173 | { | 173 | { |
174 | unsigned acked_features; | 174 | unsigned acked_features; |
175 | 175 | ||
176 | acked_features = | 176 | /* TODO: check that we are running from vhost_worker or dev mutex is |
177 | rcu_dereference_index_check(dev->acked_features, | 177 | * held? */ |
178 | lockdep_is_held(&dev->mutex)); | 178 | acked_features = rcu_dereference_index_check(dev->acked_features, 1); |
179 | return acked_features & (1 << bit); | 179 | return acked_features & (1 << bit); |
180 | } | 180 | } |
181 | 181 | ||