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-rw-r--r--drivers/bluetooth/bluecard_cs.c2
-rw-r--r--drivers/bluetooth/hci_bcsp.c2
-rw-r--r--drivers/char/sysrq.c2
-rw-r--r--drivers/clocksource/cs5535-clockevt.c2
-rw-r--r--drivers/crypto/talitos.c6
-rw-r--r--drivers/edac/Kconfig2
-rw-r--r--drivers/edac/mpc85xx_edac.c1
-rw-r--r--drivers/gpio/cs5535-gpio.c2
-rw-r--r--drivers/gpu/drm/Kconfig1
-rw-r--r--drivers/gpu/drm/drm_crtc.c30
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c44
-rw-r--r--drivers/gpu/drm/drm_drv.c1
-rw-r--r--drivers/gpu/drm/drm_gem.c1
-rw-r--r--drivers/gpu/drm/drm_stub.c3
-rw-r--r--drivers/gpu/drm/i2c/Makefile3
-rw-r--r--drivers/gpu/drm/i2c/sil164_drv.c462
-rw-r--r--drivers/gpu/drm/i810/i810_dma.c81
-rw-r--r--drivers/gpu/drm/i810/i810_drv.h64
-rw-r--r--drivers/gpu/drm/i830/i830_dma.c95
-rw-r--r--drivers/gpu/drm/i830/i830_drv.h48
-rw-r--r--drivers/gpu/drm/i830/i830_irq.c10
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c13
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h64
-rw-r--r--drivers/gpu/drm/mga/mga_dma.c99
-rw-r--r--drivers/gpu/drm/mga/mga_drv.c4
-rw-r--r--drivers/gpu/drm/mga/mga_drv.h187
-rw-r--r--drivers/gpu/drm/mga/mga_irq.c9
-rw-r--r--drivers/gpu/drm/mga/mga_state.c47
-rw-r--r--drivers/gpu/drm/mga/mga_warp.c4
-rw-r--r--drivers/gpu/drm/nouveau/Kconfig9
-rw-r--r--drivers/gpu/drm/r128/r128_cce.c52
-rw-r--r--drivers/gpu/drm/r128/r128_drv.c2
-rw-r--r--drivers/gpu/drm/r128/r128_drv.h122
-rw-r--r--drivers/gpu/drm/r128/r128_irq.c4
-rw-r--r--drivers/gpu/drm/r128/r128_state.c121
-rw-r--r--drivers/gpu/drm/radeon/Makefile1
-rw-r--r--drivers/gpu/drm/radeon/atom.c9
-rw-r--r--drivers/gpu/drm/radeon/atom.h2
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c172
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c18
-rw-r--r--drivers/gpu/drm/radeon/evergreen_cs.c2
-rw-r--r--drivers/gpu/drm/radeon/evergreen_reg.h5
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h5
-rw-r--r--drivers/gpu/drm/radeon/r100.c37
-rw-r--r--drivers/gpu/drm/radeon/r300.c5
-rw-r--r--drivers/gpu/drm/radeon/r420.c2
-rw-r--r--drivers/gpu/drm/radeon/r500_reg.h5
-rw-r--r--drivers/gpu/drm/radeon/r520.c3
-rw-r--r--drivers/gpu/drm/radeon/r600.c42
-rw-r--r--drivers/gpu/drm/radeon/r600_audio.c22
-rw-r--r--drivers/gpu/drm/radeon/r600_blit.c5
-rw-r--r--drivers/gpu/drm/radeon/r600_blit_shaders.c1115
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c235
-rw-r--r--drivers/gpu/drm/radeon/r600_hdmi.c6
-rw-r--r--drivers/gpu/drm/radeon/r600d.h12
-rw-r--r--drivers/gpu/drm/radeon/radeon.h50
-rw-r--r--drivers/gpu/drm/radeon/radeon_acpi.c67
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h1
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c36
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c19
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c23
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c48
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c8
-rw-r--r--drivers/gpu/drm/radeon/radeon_drv.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_kms.c23
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c1
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_tv.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_object.c27
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c82
-rw-r--r--drivers/gpu/drm/radeon/rs400.c9
-rw-r--r--drivers/gpu/drm/radeon/rs600.c12
-rw-r--r--drivers/gpu/drm/radeon/rs690.c12
-rw-r--r--drivers/gpu/drm/radeon/rv515.c3
-rw-r--r--drivers/gpu/drm/radeon/rv770.c23
-rw-r--r--drivers/gpu/drm/radeon/rv770d.h6
-rw-r--r--drivers/gpu/drm/sis/sis_drv.c3
-rw-r--r--drivers/gpu/drm/sis/sis_mm.c14
-rw-r--r--drivers/gpu/drm/ttm/ttm_page_alloc.c6
-rw-r--r--drivers/gpu/drm/via/via_dma.c120
-rw-r--r--drivers/gpu/drm/via/via_dmablit.c71
-rw-r--r--drivers/gpu/drm/via/via_dmablit.h8
-rw-r--r--drivers/gpu/drm/via/via_drv.h22
-rw-r--r--drivers/gpu/drm/via/via_irq.c13
-rw-r--r--drivers/gpu/drm/via/via_map.c4
-rw-r--r--drivers/gpu/drm/via/via_mm.c7
-rw-r--r--drivers/gpu/drm/via/via_verifier.c47
-rw-r--r--drivers/gpu/drm/via/via_verifier.h4
-rw-r--r--drivers/gpu/drm/via/via_video.c6
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_fb.c2
-rw-r--r--drivers/gpu/drm/vmwgfx/vmwgfx_kms.c1
-rw-r--r--drivers/hid/Kconfig1
-rw-r--r--drivers/hid/hid-core.c21
-rw-r--r--drivers/hid/hid-debug.c2
-rw-r--r--drivers/hid/hid-ids.h21
-rw-r--r--drivers/hid/hid-ntrig.c36
-rw-r--r--drivers/hid/usbhid/hid-core.c13
-rw-r--r--drivers/hid/usbhid/hid-quirks.c2
-rw-r--r--drivers/hwmon/coretemp.c32
-rw-r--r--drivers/hwmon/it87.c22
-rw-r--r--drivers/hwmon/k8temp.c10
-rw-r--r--drivers/i2c/busses/i2c-i801.c8
-rw-r--r--drivers/i2c/busses/i2c-sibyte.c4
-rw-r--r--drivers/i2c/i2c-core.c7
-rw-r--r--drivers/infiniband/hw/cxgb4/cm.c12
-rw-r--r--drivers/infiniband/hw/cxgb4/cq.c31
-rw-r--r--drivers/infiniband/hw/cxgb4/iw_cxgb4.h2
-rw-r--r--drivers/infiniband/hw/cxgb4/mem.c4
-rw-r--r--drivers/infiniband/hw/cxgb4/qp.c12
-rw-r--r--drivers/infiniband/hw/cxgb4/t4.h6
-rw-r--r--drivers/infiniband/hw/qib/Makefile2
-rw-r--r--drivers/infiniband/hw/qib/qib.h1
-rw-r--r--drivers/infiniband/hw/qib/qib_7220.h7
-rw-r--r--drivers/infiniband/hw/qib/qib_7322_regs.h48
-rw-r--r--drivers/infiniband/hw/qib/qib_diag.c19
-rw-r--r--drivers/infiniband/hw/qib/qib_iba6120.c3
-rw-r--r--drivers/infiniband/hw/qib/qib_iba7322.c43
-rw-r--r--drivers/infiniband/hw/qib/qib_init.c21
-rw-r--r--drivers/infiniband/hw/qib/qib_pcie.c2
-rw-r--r--drivers/infiniband/hw/qib/qib_sd7220.c56
-rw-r--r--drivers/infiniband/hw/qib/qib_sd7220_img.c1081
-rw-r--r--drivers/infiniband/hw/qib/qib_tx.c6
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib_main.c4
-rw-r--r--drivers/input/joystick/gamecon.c5
-rw-r--r--drivers/input/keyboard/Kconfig6
-rw-r--r--drivers/input/keyboard/twl4030_keypad.c17
-rw-r--r--drivers/input/keyboard/w90p910_keypad.c2
-rw-r--r--drivers/input/mouse/Kconfig2
-rw-r--r--drivers/input/mouse/synaptics.c8
-rw-r--r--drivers/input/mouse/synaptics.h3
-rw-r--r--drivers/input/serio/Kconfig2
-rw-r--r--drivers/input/serio/i8042-x86ia64io.h17
-rw-r--r--drivers/input/touchscreen/w90p910_ts.c2
-rw-r--r--drivers/media/common/tuners/tuner-simple.c1
-rw-r--r--drivers/media/common/tuners/tuner-types.c16
-rw-r--r--drivers/media/video/ivtv/ivtv-streams.c3
-rw-r--r--drivers/media/video/mem2mem_testdev.c3
-rw-r--r--drivers/media/video/omap/Kconfig4
-rw-r--r--drivers/media/video/omap/Makefile4
-rw-r--r--drivers/media/video/omap/omap_vout.c81
-rw-r--r--drivers/media/video/tveeprom.c15
-rw-r--r--drivers/media/video/uvc/uvc_ctrl.c4
-rw-r--r--drivers/misc/cs5535-mfgpt.c2
-rw-r--r--drivers/mmc/host/sdhci-s3c.c20
-rw-r--r--drivers/net/bonding/bond_alb.c3
-rw-r--r--drivers/net/bonding/bond_main.c33
-rw-r--r--drivers/net/ibmveth.c4
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c17
-rw-r--r--drivers/net/ll_temac_main.c18
-rw-r--r--drivers/net/mv643xx_eth.c9
-rw-r--r--drivers/net/ne.c4
-rw-r--r--drivers/net/pcmcia/axnet_cs.c7
-rw-r--r--drivers/net/qlge/qlge_main.c11
-rw-r--r--drivers/net/r8169.c2
-rw-r--r--drivers/net/s2io.c101
-rw-r--r--drivers/net/s2io.h4
-rw-r--r--drivers/net/sb1250-mac.c1
-rw-r--r--drivers/net/usb/rndis_host.c18
-rw-r--r--drivers/net/usb/usbnet.c5
-rw-r--r--drivers/net/virtio_net.c28
-rw-r--r--drivers/net/vxge/vxge-main.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/ath9k.h1
-rw-r--r--drivers/net/wireless/ath/ath9k/hif_usb.c8
-rw-r--r--drivers/net/wireless/ath/ath9k/main.c11
-rw-r--r--drivers/net/wireless/hostap/hostap_pci.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c6
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.c7
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-sta.h11
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c10
-rw-r--r--drivers/pci/setup-res.c32
-rw-r--r--drivers/pcmcia/ds.c3
-rw-r--r--drivers/pcmcia/pcmcia_resource.c4
-rw-r--r--drivers/platform/x86/intel_scu_ipc.c12
-rw-r--r--drivers/power/ds2782_battery.c2
-rw-r--r--drivers/s390/block/dasd_devmap.c4
-rw-r--r--drivers/s390/cio/chsc.c2
-rw-r--r--drivers/sbus/char/openprom.c4
-rw-r--r--drivers/serial/suncore.c4
-rw-r--r--drivers/serial/sunsu.c13
-rw-r--r--drivers/spi/spi_mpc8xxx.c22
-rw-r--r--drivers/usb/gadget/f_fs.c2
-rw-r--r--drivers/usb/gadget/f_uvc.c4
-rw-r--r--drivers/usb/gadget/uvc.h10
-rw-r--r--drivers/usb/gadget/uvc_queue.c153
-rw-r--r--drivers/usb/gadget/uvc_queue.h20
-rw-r--r--drivers/usb/gadget/uvc_v4l2.c2
-rw-r--r--drivers/usb/gadget/uvc_video.c6
-rw-r--r--drivers/usb/gadget/webcam.c4
-rw-r--r--drivers/vhost/net.c25
-rw-r--r--drivers/vhost/vhost.c86
-rw-r--r--drivers/vhost/vhost.h8
-rw-r--r--drivers/video/aty/radeon_pm.c2
191 files changed, 3353 insertions, 3238 deletions
diff --git a/drivers/bluetooth/bluecard_cs.c b/drivers/bluetooth/bluecard_cs.c
index 6f907ebed2d5..6d34f405a2f3 100644
--- a/drivers/bluetooth/bluecard_cs.c
+++ b/drivers/bluetooth/bluecard_cs.c
@@ -37,7 +37,7 @@
37#include <linux/wait.h> 37#include <linux/wait.h>
38 38
39#include <linux/skbuff.h> 39#include <linux/skbuff.h>
40#include <asm/io.h> 40#include <linux/io.h>
41 41
42#include <pcmcia/cs_types.h> 42#include <pcmcia/cs_types.h>
43#include <pcmcia/cs.h> 43#include <pcmcia/cs.h>
diff --git a/drivers/bluetooth/hci_bcsp.c b/drivers/bluetooth/hci_bcsp.c
index 40aec0fb8596..42d69d4de05c 100644
--- a/drivers/bluetooth/hci_bcsp.c
+++ b/drivers/bluetooth/hci_bcsp.c
@@ -244,7 +244,7 @@ static struct sk_buff *bcsp_prepare_pkt(struct bcsp_struct *bcsp, u8 *data,
244 if (rel) { 244 if (rel) {
245 hdr[0] |= 0x80 + bcsp->msgq_txseq; 245 hdr[0] |= 0x80 + bcsp->msgq_txseq;
246 BT_DBG("Sending packet with seqno %u", bcsp->msgq_txseq); 246 BT_DBG("Sending packet with seqno %u", bcsp->msgq_txseq);
247 bcsp->msgq_txseq = ++(bcsp->msgq_txseq) & 0x07; 247 bcsp->msgq_txseq = (bcsp->msgq_txseq + 1) & 0x07;
248 } 248 }
249 249
250 if (bcsp->use_crc) 250 if (bcsp->use_crc)
diff --git a/drivers/char/sysrq.c b/drivers/char/sysrq.c
index 5d64e3acb000..878ac0c2cc68 100644
--- a/drivers/char/sysrq.c
+++ b/drivers/char/sysrq.c
@@ -493,7 +493,7 @@ static void __sysrq_put_key_op(int key, struct sysrq_key_op *op_p)
493 sysrq_key_table[i] = op_p; 493 sysrq_key_table[i] = op_p;
494} 494}
495 495
496static void __handle_sysrq(int key, struct tty_struct *tty, int check_mask) 496void __handle_sysrq(int key, struct tty_struct *tty, int check_mask)
497{ 497{
498 struct sysrq_key_op *op_p; 498 struct sysrq_key_op *op_p;
499 int orig_log_level; 499 int orig_log_level;
diff --git a/drivers/clocksource/cs5535-clockevt.c b/drivers/clocksource/cs5535-clockevt.c
index d7be69f13154..b7dab32ce63c 100644
--- a/drivers/clocksource/cs5535-clockevt.c
+++ b/drivers/clocksource/cs5535-clockevt.c
@@ -194,6 +194,6 @@ err_timer:
194 194
195module_init(cs5535_mfgpt_init); 195module_init(cs5535_mfgpt_init);
196 196
197MODULE_AUTHOR("Andres Salomon <dilinger@collabora.co.uk>"); 197MODULE_AUTHOR("Andres Salomon <dilinger@queued.net>");
198MODULE_DESCRIPTION("CS5535/CS5536 MFGPT clock event driver"); 198MODULE_DESCRIPTION("CS5535/CS5536 MFGPT clock event driver");
199MODULE_LICENSE("GPL"); 199MODULE_LICENSE("GPL");
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index 637c105f53d2..bd78acf3c365 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
@@ -1183,10 +1183,14 @@ static size_t sg_copy_end_to_buffer(struct scatterlist *sgl, unsigned int nents,
1183 /* Copy part of this segment */ 1183 /* Copy part of this segment */
1184 ignore = skip - offset; 1184 ignore = skip - offset;
1185 len = miter.length - ignore; 1185 len = miter.length - ignore;
1186 if (boffset + len > buflen)
1187 len = buflen - boffset;
1186 memcpy(buf + boffset, miter.addr + ignore, len); 1188 memcpy(buf + boffset, miter.addr + ignore, len);
1187 } else { 1189 } else {
1188 /* Copy all of this segment */ 1190 /* Copy all of this segment (up to buflen) */
1189 len = miter.length; 1191 len = miter.length;
1192 if (boffset + len > buflen)
1193 len = buflen - boffset;
1190 memcpy(buf + boffset, miter.addr, len); 1194 memcpy(buf + boffset, miter.addr, len);
1191 } 1195 }
1192 boffset += len; 1196 boffset += len;
diff --git a/drivers/edac/Kconfig b/drivers/edac/Kconfig
index aedef7941b22..0d2f9dbb47e4 100644
--- a/drivers/edac/Kconfig
+++ b/drivers/edac/Kconfig
@@ -209,7 +209,7 @@ config EDAC_I5100
209 209
210config EDAC_MPC85XX 210config EDAC_MPC85XX
211 tristate "Freescale MPC83xx / MPC85xx" 211 tristate "Freescale MPC83xx / MPC85xx"
212 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || MPC85xx) 212 depends on EDAC_MM_EDAC && FSL_SOC && (PPC_83xx || PPC_85xx)
213 help 213 help
214 Support for error detection and correction on the Freescale 214 Support for error detection and correction on the Freescale
215 MPC8349, MPC8560, MPC8540, MPC8548 215 MPC8349, MPC8560, MPC8540, MPC8548
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 52ca09bf4726..f39b00a46eda 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -1120,6 +1120,7 @@ static struct of_device_id mpc85xx_mc_err_of_match[] = {
1120 { .compatible = "fsl,mpc8555-memory-controller", }, 1120 { .compatible = "fsl,mpc8555-memory-controller", },
1121 { .compatible = "fsl,mpc8560-memory-controller", }, 1121 { .compatible = "fsl,mpc8560-memory-controller", },
1122 { .compatible = "fsl,mpc8568-memory-controller", }, 1122 { .compatible = "fsl,mpc8568-memory-controller", },
1123 { .compatible = "fsl,mpc8569-memory-controller", },
1123 { .compatible = "fsl,mpc8572-memory-controller", }, 1124 { .compatible = "fsl,mpc8572-memory-controller", },
1124 { .compatible = "fsl,mpc8349-memory-controller", }, 1125 { .compatible = "fsl,mpc8349-memory-controller", },
1125 { .compatible = "fsl,p2020-memory-controller", }, 1126 { .compatible = "fsl,p2020-memory-controller", },
diff --git a/drivers/gpio/cs5535-gpio.c b/drivers/gpio/cs5535-gpio.c
index f73a1555e49d..e23c06893d19 100644
--- a/drivers/gpio/cs5535-gpio.c
+++ b/drivers/gpio/cs5535-gpio.c
@@ -352,6 +352,6 @@ static void __exit cs5535_gpio_exit(void)
352module_init(cs5535_gpio_init); 352module_init(cs5535_gpio_init);
353module_exit(cs5535_gpio_exit); 353module_exit(cs5535_gpio_exit);
354 354
355MODULE_AUTHOR("Andres Salomon <dilinger@collabora.co.uk>"); 355MODULE_AUTHOR("Andres Salomon <dilinger@queued.net>");
356MODULE_DESCRIPTION("AMD CS5535/CS5536 GPIO driver"); 356MODULE_DESCRIPTION("AMD CS5535/CS5536 GPIO driver");
357MODULE_LICENSE("GPL"); 357MODULE_LICENSE("GPL");
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig
index 5b7a1a4692a0..4cab0c6397e3 100644
--- a/drivers/gpu/drm/Kconfig
+++ b/drivers/gpu/drm/Kconfig
@@ -61,6 +61,7 @@ config DRM_RADEON
61 select DRM_KMS_HELPER 61 select DRM_KMS_HELPER
62 select DRM_TTM 62 select DRM_TTM
63 select POWER_SUPPLY 63 select POWER_SUPPLY
64 select HWMON
64 help 65 help
65 Choose this option if you have an ATI Radeon graphics card. There 66 Choose this option if you have an ATI Radeon graphics card. There
66 are both PCI and AGP versions. You don't need to choose this to 67 are both PCI and AGP versions. You don't need to choose this to
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 57cea01c4ffb..4c68f76993d8 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -80,6 +80,7 @@ static struct drm_prop_enum_list drm_dithering_mode_enum_list[] =
80{ 80{
81 { DRM_MODE_DITHERING_OFF, "Off" }, 81 { DRM_MODE_DITHERING_OFF, "Off" },
82 { DRM_MODE_DITHERING_ON, "On" }, 82 { DRM_MODE_DITHERING_ON, "On" },
83 { DRM_MODE_DITHERING_AUTO, "Automatic" },
83}; 84};
84 85
85/* 86/*
@@ -1126,7 +1127,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
1126 if (file_priv->master->minor->type == DRM_MINOR_CONTROL) { 1127 if (file_priv->master->minor->type == DRM_MINOR_CONTROL) {
1127 list_for_each_entry(crtc, &dev->mode_config.crtc_list, 1128 list_for_each_entry(crtc, &dev->mode_config.crtc_list,
1128 head) { 1129 head) {
1129 DRM_DEBUG_KMS("CRTC ID is %d\n", crtc->base.id); 1130 DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
1130 if (put_user(crtc->base.id, crtc_id + copied)) { 1131 if (put_user(crtc->base.id, crtc_id + copied)) {
1131 ret = -EFAULT; 1132 ret = -EFAULT;
1132 goto out; 1133 goto out;
@@ -1154,8 +1155,8 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
1154 list_for_each_entry(encoder, 1155 list_for_each_entry(encoder,
1155 &dev->mode_config.encoder_list, 1156 &dev->mode_config.encoder_list,
1156 head) { 1157 head) {
1157 DRM_DEBUG_KMS("ENCODER ID is %d\n", 1158 DRM_DEBUG_KMS("[ENCODER:%d:%s]\n", encoder->base.id,
1158 encoder->base.id); 1159 drm_get_encoder_name(encoder));
1159 if (put_user(encoder->base.id, encoder_id + 1160 if (put_user(encoder->base.id, encoder_id +
1160 copied)) { 1161 copied)) {
1161 ret = -EFAULT; 1162 ret = -EFAULT;
@@ -1185,8 +1186,9 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
1185 list_for_each_entry(connector, 1186 list_for_each_entry(connector,
1186 &dev->mode_config.connector_list, 1187 &dev->mode_config.connector_list,
1187 head) { 1188 head) {
1188 DRM_DEBUG_KMS("CONNECTOR ID is %d\n", 1189 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1189 connector->base.id); 1190 connector->base.id,
1191 drm_get_connector_name(connector));
1190 if (put_user(connector->base.id, 1192 if (put_user(connector->base.id,
1191 connector_id + copied)) { 1193 connector_id + copied)) {
1192 ret = -EFAULT; 1194 ret = -EFAULT;
@@ -1209,7 +1211,7 @@ int drm_mode_getresources(struct drm_device *dev, void *data,
1209 } 1211 }
1210 card_res->count_connectors = connector_count; 1212 card_res->count_connectors = connector_count;
1211 1213
1212 DRM_DEBUG_KMS("Counted %d %d %d\n", card_res->count_crtcs, 1214 DRM_DEBUG_KMS("CRTC[%d] CONNECTORS[%d] ENCODERS[%d]\n", card_res->count_crtcs,
1213 card_res->count_connectors, card_res->count_encoders); 1215 card_res->count_connectors, card_res->count_encoders);
1214 1216
1215out: 1217out:
@@ -1312,7 +1314,7 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
1312 1314
1313 memset(&u_mode, 0, sizeof(struct drm_mode_modeinfo)); 1315 memset(&u_mode, 0, sizeof(struct drm_mode_modeinfo));
1314 1316
1315 DRM_DEBUG_KMS("connector id %d:\n", out_resp->connector_id); 1317 DRM_DEBUG_KMS("[CONNECTOR:%d:?]\n", out_resp->connector_id);
1316 1318
1317 mutex_lock(&dev->mode_config.mutex); 1319 mutex_lock(&dev->mode_config.mutex);
1318 1320
@@ -1493,6 +1495,7 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
1493 goto out; 1495 goto out;
1494 } 1496 }
1495 crtc = obj_to_crtc(obj); 1497 crtc = obj_to_crtc(obj);
1498 DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
1496 1499
1497 if (crtc_req->mode_valid) { 1500 if (crtc_req->mode_valid) {
1498 /* If we have a mode we need a framebuffer. */ 1501 /* If we have a mode we need a framebuffer. */
@@ -1569,6 +1572,9 @@ int drm_mode_setcrtc(struct drm_device *dev, void *data,
1569 goto out; 1572 goto out;
1570 } 1573 }
1571 connector = obj_to_connector(obj); 1574 connector = obj_to_connector(obj);
1575 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1576 connector->base.id,
1577 drm_get_connector_name(connector));
1572 1578
1573 connector_set[i] = connector; 1579 connector_set[i] = connector;
1574 } 1580 }
@@ -1684,6 +1690,7 @@ int drm_mode_addfb(struct drm_device *dev,
1684 1690
1685 r->fb_id = fb->base.id; 1691 r->fb_id = fb->base.id;
1686 list_add(&fb->filp_head, &file_priv->fbs); 1692 list_add(&fb->filp_head, &file_priv->fbs);
1693 DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
1687 1694
1688out: 1695out:
1689 mutex_unlock(&dev->mode_config.mutex); 1696 mutex_unlock(&dev->mode_config.mutex);
@@ -2610,6 +2617,15 @@ int drm_mode_page_flip_ioctl(struct drm_device *dev,
2610 goto out; 2617 goto out;
2611 crtc = obj_to_crtc(obj); 2618 crtc = obj_to_crtc(obj);
2612 2619
2620 if (crtc->fb == NULL) {
2621 /* The framebuffer is currently unbound, presumably
2622 * due to a hotplug event, that userspace has not
2623 * yet discovered.
2624 */
2625 ret = -EBUSY;
2626 goto out;
2627 }
2628
2613 if (crtc->funcs->page_flip == NULL) 2629 if (crtc->funcs->page_flip == NULL)
2614 goto out; 2630 goto out;
2615 2631
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 774d21e4dcdd..11fe9c870d17 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -86,7 +86,8 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
86 int count = 0; 86 int count = 0;
87 int mode_flags = 0; 87 int mode_flags = 0;
88 88
89 DRM_DEBUG_KMS("%s\n", drm_get_connector_name(connector)); 89 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n", connector->base.id,
90 drm_get_connector_name(connector));
90 /* set all modes to the unverified state */ 91 /* set all modes to the unverified state */
91 list_for_each_entry_safe(mode, t, &connector->modes, head) 92 list_for_each_entry_safe(mode, t, &connector->modes, head)
92 mode->status = MODE_UNVERIFIED; 93 mode->status = MODE_UNVERIFIED;
@@ -102,8 +103,8 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector,
102 connector->status = connector->funcs->detect(connector); 103 connector->status = connector->funcs->detect(connector);
103 104
104 if (connector->status == connector_status_disconnected) { 105 if (connector->status == connector_status_disconnected) {
105 DRM_DEBUG_KMS("%s is disconnected\n", 106 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
106 drm_get_connector_name(connector)); 107 connector->base.id, drm_get_connector_name(connector));
107 drm_mode_connector_update_edid_property(connector, NULL); 108 drm_mode_connector_update_edid_property(connector, NULL);
108 goto prune; 109 goto prune;
109 } 110 }
@@ -141,8 +142,8 @@ prune:
141 142
142 drm_mode_sort(&connector->modes); 143 drm_mode_sort(&connector->modes);
143 144
144 DRM_DEBUG_KMS("Probed modes for %s\n", 145 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] probed modes :\n", connector->base.id,
145 drm_get_connector_name(connector)); 146 drm_get_connector_name(connector));
146 list_for_each_entry_safe(mode, t, &connector->modes, head) { 147 list_for_each_entry_safe(mode, t, &connector->modes, head) {
147 mode->vrefresh = drm_mode_vrefresh(mode); 148 mode->vrefresh = drm_mode_vrefresh(mode);
148 149
@@ -374,6 +375,7 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
374 if (!(ret = crtc_funcs->mode_fixup(crtc, mode, adjusted_mode))) { 375 if (!(ret = crtc_funcs->mode_fixup(crtc, mode, adjusted_mode))) {
375 goto done; 376 goto done;
376 } 377 }
378 DRM_DEBUG_KMS("[CRTC:%d]\n", crtc->base.id);
377 379
378 /* Prepare the encoders and CRTCs before setting the mode. */ 380 /* Prepare the encoders and CRTCs before setting the mode. */
379 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { 381 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
@@ -401,8 +403,9 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
401 if (encoder->crtc != crtc) 403 if (encoder->crtc != crtc)
402 continue; 404 continue;
403 405
404 DRM_DEBUG("%s: set mode %s %x\n", drm_get_encoder_name(encoder), 406 DRM_DEBUG_KMS("[ENCODER:%d:%s] set [MODE:%d:%s]\n",
405 mode->name, mode->base.id); 407 encoder->base.id, drm_get_encoder_name(encoder),
408 mode->base.id, mode->name);
406 encoder_funcs = encoder->helper_private; 409 encoder_funcs = encoder->helper_private;
407 encoder_funcs->mode_set(encoder, mode, adjusted_mode); 410 encoder_funcs->mode_set(encoder, mode, adjusted_mode);
408 } 411 }
@@ -478,10 +481,15 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
478 481
479 crtc_funcs = set->crtc->helper_private; 482 crtc_funcs = set->crtc->helper_private;
480 483
481 DRM_DEBUG_KMS("crtc: %p %d fb: %p connectors: %p num_connectors:" 484 if (set->fb) {
482 " %d (x, y) (%i, %i)\n", 485 DRM_DEBUG_KMS("[CRTC:%d] [FB:%d] #connectors=%d (x y) (%i %i)\n",
483 set->crtc, set->crtc->base.id, set->fb, set->connectors, 486 set->crtc->base.id, set->fb->base.id,
484 (int)set->num_connectors, set->x, set->y); 487 (int)set->num_connectors, set->x, set->y);
488 } else {
489 DRM_DEBUG_KMS("[CRTC:%d] [NOFB] #connectors=%d (x y) (%i %i)\n",
490 set->crtc->base.id, (int)set->num_connectors,
491 set->x, set->y);
492 }
485 493
486 dev = set->crtc->dev; 494 dev = set->crtc->dev;
487 495
@@ -610,8 +618,14 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
610 mode_changed = true; 618 mode_changed = true;
611 connector->encoder->crtc = new_crtc; 619 connector->encoder->crtc = new_crtc;
612 } 620 }
613 DRM_DEBUG_KMS("setting connector %d crtc to %p\n", 621 if (new_crtc) {
614 connector->base.id, new_crtc); 622 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] to [CRTC:%d]\n",
623 connector->base.id, drm_get_connector_name(connector),
624 new_crtc->base.id);
625 } else {
626 DRM_DEBUG_KMS("[CONNECTOR:%d:%s] to [NOCRTC]\n",
627 connector->base.id, drm_get_connector_name(connector));
628 }
615 } 629 }
616 630
617 /* mode_set_base is not a required function */ 631 /* mode_set_base is not a required function */
@@ -629,8 +643,8 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
629 if (!drm_crtc_helper_set_mode(set->crtc, set->mode, 643 if (!drm_crtc_helper_set_mode(set->crtc, set->mode,
630 set->x, set->y, 644 set->x, set->y,
631 old_fb)) { 645 old_fb)) {
632 DRM_ERROR("failed to set mode on crtc %p\n", 646 DRM_ERROR("failed to set mode on [CRTC:%d]\n",
633 set->crtc); 647 set->crtc->base.id);
634 ret = -EINVAL; 648 ret = -EINVAL;
635 goto fail; 649 goto fail;
636 } 650 }
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c
index 510bc87d98f6..b5a51686f492 100644
--- a/drivers/gpu/drm/drm_drv.c
+++ b/drivers/gpu/drm/drm_drv.c
@@ -335,6 +335,7 @@ static void __exit drm_core_exit(void)
335 335
336 unregister_chrdev(DRM_MAJOR, "drm"); 336 unregister_chrdev(DRM_MAJOR, "drm");
337 337
338 idr_remove_all(&drm_minors_idr);
338 idr_destroy(&drm_minors_idr); 339 idr_destroy(&drm_minors_idr);
339} 340}
340 341
diff --git a/drivers/gpu/drm/drm_gem.c b/drivers/gpu/drm/drm_gem.c
index 8601b72b6f26..4f1b86714489 100644
--- a/drivers/gpu/drm/drm_gem.c
+++ b/drivers/gpu/drm/drm_gem.c
@@ -429,6 +429,7 @@ drm_gem_release(struct drm_device *dev, struct drm_file *file_private)
429 idr_for_each(&file_private->object_idr, 429 idr_for_each(&file_private->object_idr,
430 &drm_gem_object_release_handle, NULL); 430 &drm_gem_object_release_handle, NULL);
431 431
432 idr_remove_all(&file_private->object_idr);
432 idr_destroy(&file_private->object_idr); 433 idr_destroy(&file_private->object_idr);
433} 434}
434 435
diff --git a/drivers/gpu/drm/drm_stub.c b/drivers/gpu/drm/drm_stub.c
index 63575e2fa882..d1ad57450df1 100644
--- a/drivers/gpu/drm/drm_stub.c
+++ b/drivers/gpu/drm/drm_stub.c
@@ -156,6 +156,9 @@ static void drm_master_destroy(struct kref *kref)
156 master->unique_len = 0; 156 master->unique_len = 0;
157 } 157 }
158 158
159 kfree(dev->devname);
160 dev->devname = NULL;
161
159 list_for_each_entry_safe(pt, next, &master->magicfree, head) { 162 list_for_each_entry_safe(pt, next, &master->magicfree, head) {
160 list_del(&pt->head); 163 list_del(&pt->head);
161 drm_ht_remove_item(&master->magiclist, &pt->hash_item); 164 drm_ht_remove_item(&master->magiclist, &pt->hash_item);
diff --git a/drivers/gpu/drm/i2c/Makefile b/drivers/gpu/drm/i2c/Makefile
index 6d2abaf35ba2..92862563e7ee 100644
--- a/drivers/gpu/drm/i2c/Makefile
+++ b/drivers/gpu/drm/i2c/Makefile
@@ -2,3 +2,6 @@ ccflags-y := -Iinclude/drm
2 2
3ch7006-y := ch7006_drv.o ch7006_mode.o 3ch7006-y := ch7006_drv.o ch7006_mode.o
4obj-$(CONFIG_DRM_I2C_CH7006) += ch7006.o 4obj-$(CONFIG_DRM_I2C_CH7006) += ch7006.o
5
6sil164-y := sil164_drv.o
7obj-$(CONFIG_DRM_I2C_SIL164) += sil164.o
diff --git a/drivers/gpu/drm/i2c/sil164_drv.c b/drivers/gpu/drm/i2c/sil164_drv.c
new file mode 100644
index 000000000000..0b6773290c08
--- /dev/null
+++ b/drivers/gpu/drm/i2c/sil164_drv.c
@@ -0,0 +1,462 @@
1/*
2 * Copyright (C) 2010 Francisco Jerez.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sublicense, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the
14 * next paragraph) shall be included in all copies or substantial
15 * portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
18 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
19 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
20 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
21 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
22 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
23 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
24 *
25 */
26
27#include "drmP.h"
28#include "drm_crtc_helper.h"
29#include "drm_encoder_slave.h"
30#include "i2c/sil164.h"
31
32struct sil164_priv {
33 struct sil164_encoder_params config;
34 struct i2c_client *duallink_slave;
35
36 uint8_t saved_state[0x10];
37 uint8_t saved_slave_state[0x10];
38};
39
40#define to_sil164_priv(x) \
41 ((struct sil164_priv *)to_encoder_slave(x)->slave_priv)
42
43#define sil164_dbg(client, format, ...) do { \
44 if (drm_debug & DRM_UT_KMS) \
45 dev_printk(KERN_DEBUG, &client->dev, \
46 "%s: " format, __func__, ## __VA_ARGS__); \
47 } while (0)
48#define sil164_info(client, format, ...) \
49 dev_info(&client->dev, format, __VA_ARGS__)
50#define sil164_err(client, format, ...) \
51 dev_err(&client->dev, format, __VA_ARGS__)
52
53#define SIL164_I2C_ADDR_MASTER 0x38
54#define SIL164_I2C_ADDR_SLAVE 0x39
55
56/* HW register definitions */
57
58#define SIL164_VENDOR_LO 0x0
59#define SIL164_VENDOR_HI 0x1
60#define SIL164_DEVICE_LO 0x2
61#define SIL164_DEVICE_HI 0x3
62#define SIL164_REVISION 0x4
63#define SIL164_FREQ_MIN 0x6
64#define SIL164_FREQ_MAX 0x7
65#define SIL164_CONTROL0 0x8
66# define SIL164_CONTROL0_POWER_ON 0x01
67# define SIL164_CONTROL0_EDGE_RISING 0x02
68# define SIL164_CONTROL0_INPUT_24BIT 0x04
69# define SIL164_CONTROL0_DUAL_EDGE 0x08
70# define SIL164_CONTROL0_HSYNC_ON 0x10
71# define SIL164_CONTROL0_VSYNC_ON 0x20
72#define SIL164_DETECT 0x9
73# define SIL164_DETECT_INTR_STAT 0x01
74# define SIL164_DETECT_HOTPLUG_STAT 0x02
75# define SIL164_DETECT_RECEIVER_STAT 0x04
76# define SIL164_DETECT_INTR_MODE_RECEIVER 0x00
77# define SIL164_DETECT_INTR_MODE_HOTPLUG 0x08
78# define SIL164_DETECT_OUT_MODE_HIGH 0x00
79# define SIL164_DETECT_OUT_MODE_INTR 0x10
80# define SIL164_DETECT_OUT_MODE_RECEIVER 0x20
81# define SIL164_DETECT_OUT_MODE_HOTPLUG 0x30
82# define SIL164_DETECT_VSWING_STAT 0x80
83#define SIL164_CONTROL1 0xa
84# define SIL164_CONTROL1_DESKEW_ENABLE 0x10
85# define SIL164_CONTROL1_DESKEW_INCR_SHIFT 5
86#define SIL164_GPIO 0xb
87#define SIL164_CONTROL2 0xc
88# define SIL164_CONTROL2_FILTER_ENABLE 0x01
89# define SIL164_CONTROL2_FILTER_SETTING_SHIFT 1
90# define SIL164_CONTROL2_DUALLINK_MASTER 0x40
91# define SIL164_CONTROL2_SYNC_CONT 0x80
92#define SIL164_DUALLINK 0xd
93# define SIL164_DUALLINK_ENABLE 0x10
94# define SIL164_DUALLINK_SKEW_SHIFT 5
95#define SIL164_PLLZONE 0xe
96# define SIL164_PLLZONE_STAT 0x08
97# define SIL164_PLLZONE_FORCE_ON 0x10
98# define SIL164_PLLZONE_FORCE_HIGH 0x20
99
100/* HW access functions */
101
102static void
103sil164_write(struct i2c_client *client, uint8_t addr, uint8_t val)
104{
105 uint8_t buf[] = {addr, val};
106 int ret;
107
108 ret = i2c_master_send(client, buf, ARRAY_SIZE(buf));
109 if (ret < 0)
110 sil164_err(client, "Error %d writing to subaddress 0x%x\n",
111 ret, addr);
112}
113
114static uint8_t
115sil164_read(struct i2c_client *client, uint8_t addr)
116{
117 uint8_t val;
118 int ret;
119
120 ret = i2c_master_send(client, &addr, sizeof(addr));
121 if (ret < 0)
122 goto fail;
123
124 ret = i2c_master_recv(client, &val, sizeof(val));
125 if (ret < 0)
126 goto fail;
127
128 return val;
129
130fail:
131 sil164_err(client, "Error %d reading from subaddress 0x%x\n",
132 ret, addr);
133 return 0;
134}
135
136static void
137sil164_save_state(struct i2c_client *client, uint8_t *state)
138{
139 int i;
140
141 for (i = 0x8; i <= 0xe; i++)
142 state[i] = sil164_read(client, i);
143}
144
145static void
146sil164_restore_state(struct i2c_client *client, uint8_t *state)
147{
148 int i;
149
150 for (i = 0x8; i <= 0xe; i++)
151 sil164_write(client, i, state[i]);
152}
153
154static void
155sil164_set_power_state(struct i2c_client *client, bool on)
156{
157 uint8_t control0 = sil164_read(client, SIL164_CONTROL0);
158
159 if (on)
160 control0 |= SIL164_CONTROL0_POWER_ON;
161 else
162 control0 &= ~SIL164_CONTROL0_POWER_ON;
163
164 sil164_write(client, SIL164_CONTROL0, control0);
165}
166
167static void
168sil164_init_state(struct i2c_client *client,
169 struct sil164_encoder_params *config,
170 bool duallink)
171{
172 sil164_write(client, SIL164_CONTROL0,
173 SIL164_CONTROL0_HSYNC_ON |
174 SIL164_CONTROL0_VSYNC_ON |
175 (config->input_edge ? SIL164_CONTROL0_EDGE_RISING : 0) |
176 (config->input_width ? SIL164_CONTROL0_INPUT_24BIT : 0) |
177 (config->input_dual ? SIL164_CONTROL0_DUAL_EDGE : 0));
178
179 sil164_write(client, SIL164_DETECT,
180 SIL164_DETECT_INTR_STAT |
181 SIL164_DETECT_OUT_MODE_RECEIVER);
182
183 sil164_write(client, SIL164_CONTROL1,
184 (config->input_skew ? SIL164_CONTROL1_DESKEW_ENABLE : 0) |
185 (((config->input_skew + 4) & 0x7)
186 << SIL164_CONTROL1_DESKEW_INCR_SHIFT));
187
188 sil164_write(client, SIL164_CONTROL2,
189 SIL164_CONTROL2_SYNC_CONT |
190 (config->pll_filter ? 0 : SIL164_CONTROL2_FILTER_ENABLE) |
191 (4 << SIL164_CONTROL2_FILTER_SETTING_SHIFT));
192
193 sil164_write(client, SIL164_PLLZONE, 0);
194
195 if (duallink)
196 sil164_write(client, SIL164_DUALLINK,
197 SIL164_DUALLINK_ENABLE |
198 (((config->duallink_skew + 4) & 0x7)
199 << SIL164_DUALLINK_SKEW_SHIFT));
200 else
201 sil164_write(client, SIL164_DUALLINK, 0);
202}
203
204/* DRM encoder functions */
205
206static void
207sil164_encoder_set_config(struct drm_encoder *encoder, void *params)
208{
209 struct sil164_priv *priv = to_sil164_priv(encoder);
210
211 priv->config = *(struct sil164_encoder_params *)params;
212}
213
214static void
215sil164_encoder_dpms(struct drm_encoder *encoder, int mode)
216{
217 struct sil164_priv *priv = to_sil164_priv(encoder);
218 bool on = (mode == DRM_MODE_DPMS_ON);
219 bool duallink = (on && encoder->crtc->mode.clock > 165000);
220
221 sil164_set_power_state(drm_i2c_encoder_get_client(encoder), on);
222
223 if (priv->duallink_slave)
224 sil164_set_power_state(priv->duallink_slave, duallink);
225}
226
227static void
228sil164_encoder_save(struct drm_encoder *encoder)
229{
230 struct sil164_priv *priv = to_sil164_priv(encoder);
231
232 sil164_save_state(drm_i2c_encoder_get_client(encoder),
233 priv->saved_state);
234
235 if (priv->duallink_slave)
236 sil164_save_state(priv->duallink_slave,
237 priv->saved_slave_state);
238}
239
240static void
241sil164_encoder_restore(struct drm_encoder *encoder)
242{
243 struct sil164_priv *priv = to_sil164_priv(encoder);
244
245 sil164_restore_state(drm_i2c_encoder_get_client(encoder),
246 priv->saved_state);
247
248 if (priv->duallink_slave)
249 sil164_restore_state(priv->duallink_slave,
250 priv->saved_slave_state);
251}
252
253static bool
254sil164_encoder_mode_fixup(struct drm_encoder *encoder,
255 struct drm_display_mode *mode,
256 struct drm_display_mode *adjusted_mode)
257{
258 return true;
259}
260
261static int
262sil164_encoder_mode_valid(struct drm_encoder *encoder,
263 struct drm_display_mode *mode)
264{
265 struct sil164_priv *priv = to_sil164_priv(encoder);
266
267 if (mode->clock < 32000)
268 return MODE_CLOCK_LOW;
269
270 if (mode->clock > 330000 ||
271 (mode->clock > 165000 && !priv->duallink_slave))
272 return MODE_CLOCK_HIGH;
273
274 return MODE_OK;
275}
276
277static void
278sil164_encoder_mode_set(struct drm_encoder *encoder,
279 struct drm_display_mode *mode,
280 struct drm_display_mode *adjusted_mode)
281{
282 struct sil164_priv *priv = to_sil164_priv(encoder);
283 bool duallink = adjusted_mode->clock > 165000;
284
285 sil164_init_state(drm_i2c_encoder_get_client(encoder),
286 &priv->config, duallink);
287
288 if (priv->duallink_slave)
289 sil164_init_state(priv->duallink_slave,
290 &priv->config, duallink);
291
292 sil164_encoder_dpms(encoder, DRM_MODE_DPMS_ON);
293}
294
295static enum drm_connector_status
296sil164_encoder_detect(struct drm_encoder *encoder,
297 struct drm_connector *connector)
298{
299 struct i2c_client *client = drm_i2c_encoder_get_client(encoder);
300
301 if (sil164_read(client, SIL164_DETECT) & SIL164_DETECT_HOTPLUG_STAT)
302 return connector_status_connected;
303 else
304 return connector_status_disconnected;
305}
306
307static int
308sil164_encoder_get_modes(struct drm_encoder *encoder,
309 struct drm_connector *connector)
310{
311 return 0;
312}
313
314static int
315sil164_encoder_create_resources(struct drm_encoder *encoder,
316 struct drm_connector *connector)
317{
318 return 0;
319}
320
321static int
322sil164_encoder_set_property(struct drm_encoder *encoder,
323 struct drm_connector *connector,
324 struct drm_property *property,
325 uint64_t val)
326{
327 return 0;
328}
329
330static void
331sil164_encoder_destroy(struct drm_encoder *encoder)
332{
333 struct sil164_priv *priv = to_sil164_priv(encoder);
334
335 if (priv->duallink_slave)
336 i2c_unregister_device(priv->duallink_slave);
337
338 kfree(priv);
339 drm_i2c_encoder_destroy(encoder);
340}
341
342static struct drm_encoder_slave_funcs sil164_encoder_funcs = {
343 .set_config = sil164_encoder_set_config,
344 .destroy = sil164_encoder_destroy,
345 .dpms = sil164_encoder_dpms,
346 .save = sil164_encoder_save,
347 .restore = sil164_encoder_restore,
348 .mode_fixup = sil164_encoder_mode_fixup,
349 .mode_valid = sil164_encoder_mode_valid,
350 .mode_set = sil164_encoder_mode_set,
351 .detect = sil164_encoder_detect,
352 .get_modes = sil164_encoder_get_modes,
353 .create_resources = sil164_encoder_create_resources,
354 .set_property = sil164_encoder_set_property,
355};
356
357/* I2C driver functions */
358
359static int
360sil164_probe(struct i2c_client *client, const struct i2c_device_id *id)
361{
362 int vendor = sil164_read(client, SIL164_VENDOR_HI) << 8 |
363 sil164_read(client, SIL164_VENDOR_LO);
364 int device = sil164_read(client, SIL164_DEVICE_HI) << 8 |
365 sil164_read(client, SIL164_DEVICE_LO);
366 int rev = sil164_read(client, SIL164_REVISION);
367
368 if (vendor != 0x1 || device != 0x6) {
369 sil164_dbg(client, "Unknown device %x:%x.%x\n",
370 vendor, device, rev);
371 return -ENODEV;
372 }
373
374 sil164_info(client, "Detected device %x:%x.%x\n",
375 vendor, device, rev);
376
377 return 0;
378}
379
380static int
381sil164_remove(struct i2c_client *client)
382{
383 return 0;
384}
385
386static struct i2c_client *
387sil164_detect_slave(struct i2c_client *client)
388{
389 struct i2c_adapter *adap = client->adapter;
390 struct i2c_msg msg = {
391 .addr = SIL164_I2C_ADDR_SLAVE,
392 .len = 0,
393 };
394 const struct i2c_board_info info = {
395 I2C_BOARD_INFO("sil164", SIL164_I2C_ADDR_SLAVE)
396 };
397
398 if (i2c_transfer(adap, &msg, 1) != 1) {
399 sil164_dbg(adap, "No dual-link slave found.");
400 return NULL;
401 }
402
403 return i2c_new_device(adap, &info);
404}
405
406static int
407sil164_encoder_init(struct i2c_client *client,
408 struct drm_device *dev,
409 struct drm_encoder_slave *encoder)
410{
411 struct sil164_priv *priv;
412
413 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
414 if (!priv)
415 return -ENOMEM;
416
417 encoder->slave_priv = priv;
418 encoder->slave_funcs = &sil164_encoder_funcs;
419
420 priv->duallink_slave = sil164_detect_slave(client);
421
422 return 0;
423}
424
425static struct i2c_device_id sil164_ids[] = {
426 { "sil164", 0 },
427 { }
428};
429MODULE_DEVICE_TABLE(i2c, sil164_ids);
430
431static struct drm_i2c_encoder_driver sil164_driver = {
432 .i2c_driver = {
433 .probe = sil164_probe,
434 .remove = sil164_remove,
435 .driver = {
436 .name = "sil164",
437 },
438 .id_table = sil164_ids,
439 },
440 .encoder_init = sil164_encoder_init,
441};
442
443/* Module initialization */
444
445static int __init
446sil164_init(void)
447{
448 return drm_i2c_encoder_register(THIS_MODULE, &sil164_driver);
449}
450
451static void __exit
452sil164_exit(void)
453{
454 drm_i2c_encoder_unregister(&sil164_driver);
455}
456
457MODULE_AUTHOR("Francisco Jerez <currojerez@riseup.net>");
458MODULE_DESCRIPTION("Silicon Image sil164 TMDS transmitter driver");
459MODULE_LICENSE("GPL and additional rights");
460
461module_init(sil164_init);
462module_exit(sil164_exit);
diff --git a/drivers/gpu/drm/i810/i810_dma.c b/drivers/gpu/drm/i810/i810_dma.c
index 997d91707ad2..09c86ed89927 100644
--- a/drivers/gpu/drm/i810/i810_dma.c
+++ b/drivers/gpu/drm/i810/i810_dma.c
@@ -60,9 +60,8 @@ static struct drm_buf *i810_freelist_get(struct drm_device * dev)
60 /* In use is already a pointer */ 60 /* In use is already a pointer */
61 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE, 61 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
62 I810_BUF_CLIENT); 62 I810_BUF_CLIENT);
63 if (used == I810_BUF_FREE) { 63 if (used == I810_BUF_FREE)
64 return buf; 64 return buf;
65 }
66 } 65 }
67 return NULL; 66 return NULL;
68} 67}
@@ -71,7 +70,7 @@ static struct drm_buf *i810_freelist_get(struct drm_device * dev)
71 * yet, the hardware updates in use for us once its on the ring buffer. 70 * yet, the hardware updates in use for us once its on the ring buffer.
72 */ 71 */
73 72
74static int i810_freelist_put(struct drm_device * dev, struct drm_buf * buf) 73static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
75{ 74{
76 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
77 int used; 76 int used;
@@ -121,7 +120,7 @@ static const struct file_operations i810_buffer_fops = {
121 .fasync = drm_fasync, 120 .fasync = drm_fasync,
122}; 121};
123 122
124static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv) 123static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
125{ 124{
126 struct drm_device *dev = file_priv->minor->dev; 125 struct drm_device *dev = file_priv->minor->dev;
127 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 126 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
@@ -152,7 +151,7 @@ static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
152 return retcode; 151 return retcode;
153} 152}
154 153
155static int i810_unmap_buffer(struct drm_buf * buf) 154static int i810_unmap_buffer(struct drm_buf *buf)
156{ 155{
157 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 156 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
158 int retcode = 0; 157 int retcode = 0;
@@ -172,7 +171,7 @@ static int i810_unmap_buffer(struct drm_buf * buf)
172 return retcode; 171 return retcode;
173} 172}
174 173
175static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d, 174static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
176 struct drm_file *file_priv) 175 struct drm_file *file_priv)
177{ 176{
178 struct drm_buf *buf; 177 struct drm_buf *buf;
@@ -202,7 +201,7 @@ static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d,
202 return retcode; 201 return retcode;
203} 202}
204 203
205static int i810_dma_cleanup(struct drm_device * dev) 204static int i810_dma_cleanup(struct drm_device *dev)
206{ 205{
207 struct drm_device_dma *dma = dev->dma; 206 struct drm_device_dma *dma = dev->dma;
208 207
@@ -218,9 +217,8 @@ static int i810_dma_cleanup(struct drm_device * dev)
218 drm_i810_private_t *dev_priv = 217 drm_i810_private_t *dev_priv =
219 (drm_i810_private_t *) dev->dev_private; 218 (drm_i810_private_t *) dev->dev_private;
220 219
221 if (dev_priv->ring.virtual_start) { 220 if (dev_priv->ring.virtual_start)
222 drm_core_ioremapfree(&dev_priv->ring.map, dev); 221 drm_core_ioremapfree(&dev_priv->ring.map, dev);
223 }
224 if (dev_priv->hw_status_page) { 222 if (dev_priv->hw_status_page) {
225 pci_free_consistent(dev->pdev, PAGE_SIZE, 223 pci_free_consistent(dev->pdev, PAGE_SIZE,
226 dev_priv->hw_status_page, 224 dev_priv->hw_status_page,
@@ -242,7 +240,7 @@ static int i810_dma_cleanup(struct drm_device * dev)
242 return 0; 240 return 0;
243} 241}
244 242
245static int i810_wait_ring(struct drm_device * dev, int n) 243static int i810_wait_ring(struct drm_device *dev, int n)
246{ 244{
247 drm_i810_private_t *dev_priv = dev->dev_private; 245 drm_i810_private_t *dev_priv = dev->dev_private;
248 drm_i810_ring_buffer_t *ring = &(dev_priv->ring); 246 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
@@ -271,11 +269,11 @@ static int i810_wait_ring(struct drm_device * dev, int n)
271 udelay(1); 269 udelay(1);
272 } 270 }
273 271
274 out_wait_ring: 272out_wait_ring:
275 return iters; 273 return iters;
276} 274}
277 275
278static void i810_kernel_lost_context(struct drm_device * dev) 276static void i810_kernel_lost_context(struct drm_device *dev)
279{ 277{
280 drm_i810_private_t *dev_priv = dev->dev_private; 278 drm_i810_private_t *dev_priv = dev->dev_private;
281 drm_i810_ring_buffer_t *ring = &(dev_priv->ring); 279 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
@@ -287,7 +285,7 @@ static void i810_kernel_lost_context(struct drm_device * dev)
287 ring->space += ring->Size; 285 ring->space += ring->Size;
288} 286}
289 287
290static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_priv) 288static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
291{ 289{
292 struct drm_device_dma *dma = dev->dma; 290 struct drm_device_dma *dma = dev->dma;
293 int my_idx = 24; 291 int my_idx = 24;
@@ -322,9 +320,9 @@ static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_
322 return 0; 320 return 0;
323} 321}
324 322
325static int i810_dma_initialize(struct drm_device * dev, 323static int i810_dma_initialize(struct drm_device *dev,
326 drm_i810_private_t * dev_priv, 324 drm_i810_private_t *dev_priv,
327 drm_i810_init_t * init) 325 drm_i810_init_t *init)
328{ 326{
329 struct drm_map_list *r_list; 327 struct drm_map_list *r_list;
330 memset(dev_priv, 0, sizeof(drm_i810_private_t)); 328 memset(dev_priv, 0, sizeof(drm_i810_private_t));
@@ -462,7 +460,7 @@ static int i810_dma_init(struct drm_device *dev, void *data,
462 * Use 'volatile' & local var tmp to force the emitted values to be 460 * Use 'volatile' & local var tmp to force the emitted values to be
463 * identical to the verified ones. 461 * identical to the verified ones.
464 */ 462 */
465static void i810EmitContextVerified(struct drm_device * dev, 463static void i810EmitContextVerified(struct drm_device *dev,
466 volatile unsigned int *code) 464 volatile unsigned int *code)
467{ 465{
468 drm_i810_private_t *dev_priv = dev->dev_private; 466 drm_i810_private_t *dev_priv = dev->dev_private;
@@ -495,7 +493,7 @@ static void i810EmitContextVerified(struct drm_device * dev,
495 ADVANCE_LP_RING(); 493 ADVANCE_LP_RING();
496} 494}
497 495
498static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *code) 496static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
499{ 497{
500 drm_i810_private_t *dev_priv = dev->dev_private; 498 drm_i810_private_t *dev_priv = dev->dev_private;
501 int i, j = 0; 499 int i, j = 0;
@@ -528,7 +526,7 @@ static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *
528 526
529/* Need to do some additional checking when setting the dest buffer. 527/* Need to do some additional checking when setting the dest buffer.
530 */ 528 */
531static void i810EmitDestVerified(struct drm_device * dev, 529static void i810EmitDestVerified(struct drm_device *dev,
532 volatile unsigned int *code) 530 volatile unsigned int *code)
533{ 531{
534 drm_i810_private_t *dev_priv = dev->dev_private; 532 drm_i810_private_t *dev_priv = dev->dev_private;
@@ -563,7 +561,7 @@ static void i810EmitDestVerified(struct drm_device * dev,
563 ADVANCE_LP_RING(); 561 ADVANCE_LP_RING();
564} 562}
565 563
566static void i810EmitState(struct drm_device * dev) 564static void i810EmitState(struct drm_device *dev)
567{ 565{
568 drm_i810_private_t *dev_priv = dev->dev_private; 566 drm_i810_private_t *dev_priv = dev->dev_private;
569 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 567 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -594,7 +592,7 @@ static void i810EmitState(struct drm_device * dev)
594 592
595/* need to verify 593/* need to verify
596 */ 594 */
597static void i810_dma_dispatch_clear(struct drm_device * dev, int flags, 595static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
598 unsigned int clear_color, 596 unsigned int clear_color,
599 unsigned int clear_zval) 597 unsigned int clear_zval)
600{ 598{
@@ -669,7 +667,7 @@ static void i810_dma_dispatch_clear(struct drm_device * dev, int flags,
669 } 667 }
670} 668}
671 669
672static void i810_dma_dispatch_swap(struct drm_device * dev) 670static void i810_dma_dispatch_swap(struct drm_device *dev)
673{ 671{
674 drm_i810_private_t *dev_priv = dev->dev_private; 672 drm_i810_private_t *dev_priv = dev->dev_private;
675 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv; 673 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -715,8 +713,8 @@ static void i810_dma_dispatch_swap(struct drm_device * dev)
715 } 713 }
716} 714}
717 715
718static void i810_dma_dispatch_vertex(struct drm_device * dev, 716static void i810_dma_dispatch_vertex(struct drm_device *dev,
719 struct drm_buf * buf, int discard, int used) 717 struct drm_buf *buf, int discard, int used)
720{ 718{
721 drm_i810_private_t *dev_priv = dev->dev_private; 719 drm_i810_private_t *dev_priv = dev->dev_private;
722 drm_i810_buf_priv_t *buf_priv = buf->dev_private; 720 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
@@ -795,7 +793,7 @@ static void i810_dma_dispatch_vertex(struct drm_device * dev,
795 } 793 }
796} 794}
797 795
798static void i810_dma_dispatch_flip(struct drm_device * dev) 796static void i810_dma_dispatch_flip(struct drm_device *dev)
799{ 797{
800 drm_i810_private_t *dev_priv = dev->dev_private; 798 drm_i810_private_t *dev_priv = dev->dev_private;
801 int pitch = dev_priv->pitch; 799 int pitch = dev_priv->pitch;
@@ -841,7 +839,7 @@ static void i810_dma_dispatch_flip(struct drm_device * dev)
841 839
842} 840}
843 841
844static void i810_dma_quiescent(struct drm_device * dev) 842static void i810_dma_quiescent(struct drm_device *dev)
845{ 843{
846 drm_i810_private_t *dev_priv = dev->dev_private; 844 drm_i810_private_t *dev_priv = dev->dev_private;
847 RING_LOCALS; 845 RING_LOCALS;
@@ -858,7 +856,7 @@ static void i810_dma_quiescent(struct drm_device * dev)
858 i810_wait_ring(dev, dev_priv->ring.Size - 8); 856 i810_wait_ring(dev, dev_priv->ring.Size - 8);
859} 857}
860 858
861static int i810_flush_queue(struct drm_device * dev) 859static int i810_flush_queue(struct drm_device *dev)
862{ 860{
863 drm_i810_private_t *dev_priv = dev->dev_private; 861 drm_i810_private_t *dev_priv = dev->dev_private;
864 struct drm_device_dma *dma = dev->dma; 862 struct drm_device_dma *dma = dev->dma;
@@ -891,7 +889,7 @@ static int i810_flush_queue(struct drm_device * dev)
891} 889}
892 890
893/* Must be called with the lock held */ 891/* Must be called with the lock held */
894static void i810_reclaim_buffers(struct drm_device * dev, 892static void i810_reclaim_buffers(struct drm_device *dev,
895 struct drm_file *file_priv) 893 struct drm_file *file_priv)
896{ 894{
897 struct drm_device_dma *dma = dev->dma; 895 struct drm_device_dma *dma = dev->dma;
@@ -969,9 +967,8 @@ static int i810_clear_bufs(struct drm_device *dev, void *data,
969 LOCK_TEST_WITH_RETURN(dev, file_priv); 967 LOCK_TEST_WITH_RETURN(dev, file_priv);
970 968
971 /* GH: Someone's doing nasty things... */ 969 /* GH: Someone's doing nasty things... */
972 if (!dev->dev_private) { 970 if (!dev->dev_private)
973 return -EINVAL; 971 return -EINVAL;
974 }
975 972
976 i810_dma_dispatch_clear(dev, clear->flags, 973 i810_dma_dispatch_clear(dev, clear->flags,
977 clear->clear_color, clear->clear_depth); 974 clear->clear_color, clear->clear_depth);
@@ -1039,7 +1036,7 @@ static int i810_docopy(struct drm_device *dev, void *data,
1039 return 0; 1036 return 0;
1040} 1037}
1041 1038
1042static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf, int used, 1039static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
1043 unsigned int last_render) 1040 unsigned int last_render)
1044{ 1041{
1045 drm_i810_private_t *dev_priv = dev->dev_private; 1042 drm_i810_private_t *dev_priv = dev->dev_private;
@@ -1053,9 +1050,8 @@ static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf,
1053 i810_kernel_lost_context(dev); 1050 i810_kernel_lost_context(dev);
1054 1051
1055 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE); 1052 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1056 if (u != I810_BUF_CLIENT) { 1053 if (u != I810_BUF_CLIENT)
1057 DRM_DEBUG("MC found buffer that isn't mine!\n"); 1054 DRM_DEBUG("MC found buffer that isn't mine!\n");
1058 }
1059 1055
1060 if (used > 4 * 1024) 1056 if (used > 4 * 1024)
1061 used = 0; 1057 used = 0;
@@ -1160,7 +1156,7 @@ static int i810_ov0_flip(struct drm_device *dev, void *data,
1160 1156
1161 LOCK_TEST_WITH_RETURN(dev, file_priv); 1157 LOCK_TEST_WITH_RETURN(dev, file_priv);
1162 1158
1163 //Tell the overlay to update 1159 /* Tell the overlay to update */
1164 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000); 1160 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1165 1161
1166 return 0; 1162 return 0;
@@ -1168,7 +1164,7 @@ static int i810_ov0_flip(struct drm_device *dev, void *data,
1168 1164
1169/* Not sure why this isn't set all the time: 1165/* Not sure why this isn't set all the time:
1170 */ 1166 */
1171static void i810_do_init_pageflip(struct drm_device * dev) 1167static void i810_do_init_pageflip(struct drm_device *dev)
1172{ 1168{
1173 drm_i810_private_t *dev_priv = dev->dev_private; 1169 drm_i810_private_t *dev_priv = dev->dev_private;
1174 1170
@@ -1178,7 +1174,7 @@ static void i810_do_init_pageflip(struct drm_device * dev)
1178 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1174 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1179} 1175}
1180 1176
1181static int i810_do_cleanup_pageflip(struct drm_device * dev) 1177static int i810_do_cleanup_pageflip(struct drm_device *dev)
1182{ 1178{
1183 drm_i810_private_t *dev_priv = dev->dev_private; 1179 drm_i810_private_t *dev_priv = dev->dev_private;
1184 1180
@@ -1218,28 +1214,27 @@ int i810_driver_load(struct drm_device *dev, unsigned long flags)
1218 return 0; 1214 return 0;
1219} 1215}
1220 1216
1221void i810_driver_lastclose(struct drm_device * dev) 1217void i810_driver_lastclose(struct drm_device *dev)
1222{ 1218{
1223 i810_dma_cleanup(dev); 1219 i810_dma_cleanup(dev);
1224} 1220}
1225 1221
1226void i810_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) 1222void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1227{ 1223{
1228 if (dev->dev_private) { 1224 if (dev->dev_private) {
1229 drm_i810_private_t *dev_priv = dev->dev_private; 1225 drm_i810_private_t *dev_priv = dev->dev_private;
1230 if (dev_priv->page_flipping) { 1226 if (dev_priv->page_flipping)
1231 i810_do_cleanup_pageflip(dev); 1227 i810_do_cleanup_pageflip(dev);
1232 }
1233 } 1228 }
1234} 1229}
1235 1230
1236void i810_driver_reclaim_buffers_locked(struct drm_device * dev, 1231void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
1237 struct drm_file *file_priv) 1232 struct drm_file *file_priv)
1238{ 1233{
1239 i810_reclaim_buffers(dev, file_priv); 1234 i810_reclaim_buffers(dev, file_priv);
1240} 1235}
1241 1236
1242int i810_driver_dma_quiescent(struct drm_device * dev) 1237int i810_driver_dma_quiescent(struct drm_device *dev)
1243{ 1238{
1244 i810_dma_quiescent(dev); 1239 i810_dma_quiescent(dev);
1245 return 0; 1240 return 0;
@@ -1276,7 +1271,7 @@ int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
1276 * \returns 1271 * \returns
1277 * A value of 1 is always retured to indictate every i810 is AGP. 1272 * A value of 1 is always retured to indictate every i810 is AGP.
1278 */ 1273 */
1279int i810_driver_device_is_agp(struct drm_device * dev) 1274int i810_driver_device_is_agp(struct drm_device *dev)
1280{ 1275{
1281 return 1; 1276 return 1;
1282} 1277}
diff --git a/drivers/gpu/drm/i810/i810_drv.h b/drivers/gpu/drm/i810/i810_drv.h
index 21e2691f28f9..0743fe90f1e3 100644
--- a/drivers/gpu/drm/i810/i810_drv.h
+++ b/drivers/gpu/drm/i810/i810_drv.h
@@ -115,16 +115,16 @@ typedef struct drm_i810_private {
115} drm_i810_private_t; 115} drm_i810_private_t;
116 116
117 /* i810_dma.c */ 117 /* i810_dma.c */
118extern int i810_driver_dma_quiescent(struct drm_device * dev); 118extern int i810_driver_dma_quiescent(struct drm_device *dev);
119extern void i810_driver_reclaim_buffers_locked(struct drm_device * dev, 119extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
120 struct drm_file *file_priv); 120 struct drm_file *file_priv);
121extern int i810_driver_load(struct drm_device *, unsigned long flags); 121extern int i810_driver_load(struct drm_device *, unsigned long flags);
122extern void i810_driver_lastclose(struct drm_device * dev); 122extern void i810_driver_lastclose(struct drm_device *dev);
123extern void i810_driver_preclose(struct drm_device * dev, 123extern void i810_driver_preclose(struct drm_device *dev,
124 struct drm_file *file_priv); 124 struct drm_file *file_priv);
125extern void i810_driver_reclaim_buffers_locked(struct drm_device * dev, 125extern void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
126 struct drm_file *file_priv); 126 struct drm_file *file_priv);
127extern int i810_driver_device_is_agp(struct drm_device * dev); 127extern int i810_driver_device_is_agp(struct drm_device *dev);
128 128
129extern struct drm_ioctl_desc i810_ioctls[]; 129extern struct drm_ioctl_desc i810_ioctls[];
130extern int i810_max_ioctl; 130extern int i810_max_ioctl;
@@ -132,39 +132,41 @@ extern int i810_max_ioctl;
132#define I810_BASE(reg) ((unsigned long) \ 132#define I810_BASE(reg) ((unsigned long) \
133 dev_priv->mmio_map->handle) 133 dev_priv->mmio_map->handle)
134#define I810_ADDR(reg) (I810_BASE(reg) + reg) 134#define I810_ADDR(reg) (I810_BASE(reg) + reg)
135#define I810_DEREF(reg) *(__volatile__ int *)I810_ADDR(reg) 135#define I810_DEREF(reg) (*(__volatile__ int *)I810_ADDR(reg))
136#define I810_READ(reg) I810_DEREF(reg) 136#define I810_READ(reg) I810_DEREF(reg)
137#define I810_WRITE(reg,val) do { I810_DEREF(reg) = val; } while (0) 137#define I810_WRITE(reg, val) do { I810_DEREF(reg) = val; } while (0)
138#define I810_DEREF16(reg) *(__volatile__ u16 *)I810_ADDR(reg) 138#define I810_DEREF16(reg) (*(__volatile__ u16 *)I810_ADDR(reg))
139#define I810_READ16(reg) I810_DEREF16(reg) 139#define I810_READ16(reg) I810_DEREF16(reg)
140#define I810_WRITE16(reg,val) do { I810_DEREF16(reg) = val; } while (0) 140#define I810_WRITE16(reg, val) do { I810_DEREF16(reg) = val; } while (0)
141 141
142#define I810_VERBOSE 0 142#define I810_VERBOSE 0
143#define RING_LOCALS unsigned int outring, ringmask; \ 143#define RING_LOCALS unsigned int outring, ringmask; \
144 volatile char *virt; 144 volatile char *virt;
145 145
146#define BEGIN_LP_RING(n) do { \ 146#define BEGIN_LP_RING(n) do { \
147 if (I810_VERBOSE) \ 147 if (I810_VERBOSE) \
148 DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \ 148 DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \
149 if (dev_priv->ring.space < n*4) \ 149 if (dev_priv->ring.space < n*4) \
150 i810_wait_ring(dev, n*4); \ 150 i810_wait_ring(dev, n*4); \
151 dev_priv->ring.space -= n*4; \ 151 dev_priv->ring.space -= n*4; \
152 outring = dev_priv->ring.tail; \ 152 outring = dev_priv->ring.tail; \
153 ringmask = dev_priv->ring.tail_mask; \ 153 ringmask = dev_priv->ring.tail_mask; \
154 virt = dev_priv->ring.virtual_start; \ 154 virt = dev_priv->ring.virtual_start; \
155} while (0) 155} while (0)
156 156
157#define ADVANCE_LP_RING() do { \ 157#define ADVANCE_LP_RING() do { \
158 if (I810_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING\n"); \ 158 if (I810_VERBOSE) \
159 DRM_DEBUG("ADVANCE_LP_RING\n"); \
159 dev_priv->ring.tail = outring; \ 160 dev_priv->ring.tail = outring; \
160 I810_WRITE(LP_RING + RING_TAIL, outring); \ 161 I810_WRITE(LP_RING + RING_TAIL, outring); \
161} while(0) 162} while (0)
162 163
163#define OUT_RING(n) do { \ 164#define OUT_RING(n) do { \
164 if (I810_VERBOSE) DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \ 165 if (I810_VERBOSE) \
165 *(volatile unsigned int *)(virt + outring) = n; \ 166 DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
166 outring += 4; \ 167 *(volatile unsigned int *)(virt + outring) = n; \
167 outring &= ringmask; \ 168 outring += 4; \
169 outring &= ringmask; \
168} while (0) 170} while (0)
169 171
170#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) 172#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
diff --git a/drivers/gpu/drm/i830/i830_dma.c b/drivers/gpu/drm/i830/i830_dma.c
index 65759a9a85c8..7ee85ea507ce 100644
--- a/drivers/gpu/drm/i830/i830_dma.c
+++ b/drivers/gpu/drm/i830/i830_dma.c
@@ -62,9 +62,8 @@ static struct drm_buf *i830_freelist_get(struct drm_device * dev)
62 /* In use is already a pointer */ 62 /* In use is already a pointer */
63 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE, 63 used = cmpxchg(buf_priv->in_use, I830_BUF_FREE,
64 I830_BUF_CLIENT); 64 I830_BUF_CLIENT);
65 if (used == I830_BUF_FREE) { 65 if (used == I830_BUF_FREE)
66 return buf; 66 return buf;
67 }
68 } 67 }
69 return NULL; 68 return NULL;
70} 69}
@@ -73,7 +72,7 @@ static struct drm_buf *i830_freelist_get(struct drm_device * dev)
73 * yet, the hardware updates in use for us once its on the ring buffer. 72 * yet, the hardware updates in use for us once its on the ring buffer.
74 */ 73 */
75 74
76static int i830_freelist_put(struct drm_device * dev, struct drm_buf * buf) 75static int i830_freelist_put(struct drm_device *dev, struct drm_buf *buf)
77{ 76{
78 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 77 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
79 int used; 78 int used;
@@ -123,7 +122,7 @@ static const struct file_operations i830_buffer_fops = {
123 .fasync = drm_fasync, 122 .fasync = drm_fasync,
124}; 123};
125 124
126static int i830_map_buffer(struct drm_buf * buf, struct drm_file *file_priv) 125static int i830_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
127{ 126{
128 struct drm_device *dev = file_priv->minor->dev; 127 struct drm_device *dev = file_priv->minor->dev;
129 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 128 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
@@ -156,7 +155,7 @@ static int i830_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
156 return retcode; 155 return retcode;
157} 156}
158 157
159static int i830_unmap_buffer(struct drm_buf * buf) 158static int i830_unmap_buffer(struct drm_buf *buf)
160{ 159{
161 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 160 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
162 int retcode = 0; 161 int retcode = 0;
@@ -176,7 +175,7 @@ static int i830_unmap_buffer(struct drm_buf * buf)
176 return retcode; 175 return retcode;
177} 176}
178 177
179static int i830_dma_get_buffer(struct drm_device * dev, drm_i830_dma_t * d, 178static int i830_dma_get_buffer(struct drm_device *dev, drm_i830_dma_t *d,
180 struct drm_file *file_priv) 179 struct drm_file *file_priv)
181{ 180{
182 struct drm_buf *buf; 181 struct drm_buf *buf;
@@ -206,7 +205,7 @@ static int i830_dma_get_buffer(struct drm_device * dev, drm_i830_dma_t * d,
206 return retcode; 205 return retcode;
207} 206}
208 207
209static int i830_dma_cleanup(struct drm_device * dev) 208static int i830_dma_cleanup(struct drm_device *dev)
210{ 209{
211 struct drm_device_dma *dma = dev->dma; 210 struct drm_device_dma *dma = dev->dma;
212 211
@@ -222,9 +221,8 @@ static int i830_dma_cleanup(struct drm_device * dev)
222 drm_i830_private_t *dev_priv = 221 drm_i830_private_t *dev_priv =
223 (drm_i830_private_t *) dev->dev_private; 222 (drm_i830_private_t *) dev->dev_private;
224 223
225 if (dev_priv->ring.virtual_start) { 224 if (dev_priv->ring.virtual_start)
226 drm_core_ioremapfree(&dev_priv->ring.map, dev); 225 drm_core_ioremapfree(&dev_priv->ring.map, dev);
227 }
228 if (dev_priv->hw_status_page) { 226 if (dev_priv->hw_status_page) {
229 pci_free_consistent(dev->pdev, PAGE_SIZE, 227 pci_free_consistent(dev->pdev, PAGE_SIZE,
230 dev_priv->hw_status_page, 228 dev_priv->hw_status_page,
@@ -246,7 +244,7 @@ static int i830_dma_cleanup(struct drm_device * dev)
246 return 0; 244 return 0;
247} 245}
248 246
249int i830_wait_ring(struct drm_device * dev, int n, const char *caller) 247int i830_wait_ring(struct drm_device *dev, int n, const char *caller)
250{ 248{
251 drm_i830_private_t *dev_priv = dev->dev_private; 249 drm_i830_private_t *dev_priv = dev->dev_private;
252 drm_i830_ring_buffer_t *ring = &(dev_priv->ring); 250 drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
@@ -276,11 +274,11 @@ int i830_wait_ring(struct drm_device * dev, int n, const char *caller)
276 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT; 274 dev_priv->sarea_priv->perf_boxes |= I830_BOX_WAIT;
277 } 275 }
278 276
279 out_wait_ring: 277out_wait_ring:
280 return iters; 278 return iters;
281} 279}
282 280
283static void i830_kernel_lost_context(struct drm_device * dev) 281static void i830_kernel_lost_context(struct drm_device *dev)
284{ 282{
285 drm_i830_private_t *dev_priv = dev->dev_private; 283 drm_i830_private_t *dev_priv = dev->dev_private;
286 drm_i830_ring_buffer_t *ring = &(dev_priv->ring); 284 drm_i830_ring_buffer_t *ring = &(dev_priv->ring);
@@ -295,7 +293,7 @@ static void i830_kernel_lost_context(struct drm_device * dev)
295 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY; 293 dev_priv->sarea_priv->perf_boxes |= I830_BOX_RING_EMPTY;
296} 294}
297 295
298static int i830_freelist_init(struct drm_device * dev, drm_i830_private_t * dev_priv) 296static int i830_freelist_init(struct drm_device *dev, drm_i830_private_t *dev_priv)
299{ 297{
300 struct drm_device_dma *dma = dev->dma; 298 struct drm_device_dma *dma = dev->dma;
301 int my_idx = 36; 299 int my_idx = 36;
@@ -329,9 +327,9 @@ static int i830_freelist_init(struct drm_device * dev, drm_i830_private_t * dev_
329 return 0; 327 return 0;
330} 328}
331 329
332static int i830_dma_initialize(struct drm_device * dev, 330static int i830_dma_initialize(struct drm_device *dev,
333 drm_i830_private_t * dev_priv, 331 drm_i830_private_t *dev_priv,
334 drm_i830_init_t * init) 332 drm_i830_init_t *init)
335{ 333{
336 struct drm_map_list *r_list; 334 struct drm_map_list *r_list;
337 335
@@ -482,7 +480,7 @@ static int i830_dma_init(struct drm_device *dev, void *data,
482/* Most efficient way to verify state for the i830 is as it is 480/* Most efficient way to verify state for the i830 is as it is
483 * emitted. Non-conformant state is silently dropped. 481 * emitted. Non-conformant state is silently dropped.
484 */ 482 */
485static void i830EmitContextVerified(struct drm_device * dev, unsigned int *code) 483static void i830EmitContextVerified(struct drm_device *dev, unsigned int *code)
486{ 484{
487 drm_i830_private_t *dev_priv = dev->dev_private; 485 drm_i830_private_t *dev_priv = dev->dev_private;
488 int i, j = 0; 486 int i, j = 0;
@@ -527,7 +525,7 @@ static void i830EmitContextVerified(struct drm_device * dev, unsigned int *code)
527 ADVANCE_LP_RING(); 525 ADVANCE_LP_RING();
528} 526}
529 527
530static void i830EmitTexVerified(struct drm_device * dev, unsigned int *code) 528static void i830EmitTexVerified(struct drm_device *dev, unsigned int *code)
531{ 529{
532 drm_i830_private_t *dev_priv = dev->dev_private; 530 drm_i830_private_t *dev_priv = dev->dev_private;
533 int i, j = 0; 531 int i, j = 0;
@@ -561,7 +559,7 @@ static void i830EmitTexVerified(struct drm_device * dev, unsigned int *code)
561 printk("rejected packet %x\n", code[0]); 559 printk("rejected packet %x\n", code[0]);
562} 560}
563 561
564static void i830EmitTexBlendVerified(struct drm_device * dev, 562static void i830EmitTexBlendVerified(struct drm_device *dev,
565 unsigned int *code, unsigned int num) 563 unsigned int *code, unsigned int num)
566{ 564{
567 drm_i830_private_t *dev_priv = dev->dev_private; 565 drm_i830_private_t *dev_priv = dev->dev_private;
@@ -586,7 +584,7 @@ static void i830EmitTexBlendVerified(struct drm_device * dev,
586 ADVANCE_LP_RING(); 584 ADVANCE_LP_RING();
587} 585}
588 586
589static void i830EmitTexPalette(struct drm_device * dev, 587static void i830EmitTexPalette(struct drm_device *dev,
590 unsigned int *palette, int number, int is_shared) 588 unsigned int *palette, int number, int is_shared)
591{ 589{
592 drm_i830_private_t *dev_priv = dev->dev_private; 590 drm_i830_private_t *dev_priv = dev->dev_private;
@@ -603,9 +601,8 @@ static void i830EmitTexPalette(struct drm_device * dev,
603 } else { 601 } else {
604 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number)); 602 OUT_RING(CMD_OP_MAP_PALETTE_LOAD | MAP_PALETTE_NUM(number));
605 } 603 }
606 for (i = 0; i < 256; i++) { 604 for (i = 0; i < 256; i++)
607 OUT_RING(palette[i]); 605 OUT_RING(palette[i]);
608 }
609 OUT_RING(0); 606 OUT_RING(0);
610 /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop! 607 /* KW: WHERE IS THE ADVANCE_LP_RING? This is effectively a noop!
611 */ 608 */
@@ -613,7 +610,7 @@ static void i830EmitTexPalette(struct drm_device * dev,
613 610
614/* Need to do some additional checking when setting the dest buffer. 611/* Need to do some additional checking when setting the dest buffer.
615 */ 612 */
616static void i830EmitDestVerified(struct drm_device * dev, unsigned int *code) 613static void i830EmitDestVerified(struct drm_device *dev, unsigned int *code)
617{ 614{
618 drm_i830_private_t *dev_priv = dev->dev_private; 615 drm_i830_private_t *dev_priv = dev->dev_private;
619 unsigned int tmp; 616 unsigned int tmp;
@@ -674,7 +671,7 @@ static void i830EmitDestVerified(struct drm_device * dev, unsigned int *code)
674 ADVANCE_LP_RING(); 671 ADVANCE_LP_RING();
675} 672}
676 673
677static void i830EmitStippleVerified(struct drm_device * dev, unsigned int *code) 674static void i830EmitStippleVerified(struct drm_device *dev, unsigned int *code)
678{ 675{
679 drm_i830_private_t *dev_priv = dev->dev_private; 676 drm_i830_private_t *dev_priv = dev->dev_private;
680 RING_LOCALS; 677 RING_LOCALS;
@@ -685,7 +682,7 @@ static void i830EmitStippleVerified(struct drm_device * dev, unsigned int *code)
685 ADVANCE_LP_RING(); 682 ADVANCE_LP_RING();
686} 683}
687 684
688static void i830EmitState(struct drm_device * dev) 685static void i830EmitState(struct drm_device *dev)
689{ 686{
690 drm_i830_private_t *dev_priv = dev->dev_private; 687 drm_i830_private_t *dev_priv = dev->dev_private;
691 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; 688 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -788,7 +785,7 @@ static void i830EmitState(struct drm_device * dev)
788 * Performance monitoring functions 785 * Performance monitoring functions
789 */ 786 */
790 787
791static void i830_fill_box(struct drm_device * dev, 788static void i830_fill_box(struct drm_device *dev,
792 int x, int y, int w, int h, int r, int g, int b) 789 int x, int y, int w, int h, int r, int g, int b)
793{ 790{
794 drm_i830_private_t *dev_priv = dev->dev_private; 791 drm_i830_private_t *dev_priv = dev->dev_private;
@@ -816,17 +813,16 @@ static void i830_fill_box(struct drm_device * dev,
816 OUT_RING((y << 16) | x); 813 OUT_RING((y << 16) | x);
817 OUT_RING(((y + h) << 16) | (x + w)); 814 OUT_RING(((y + h) << 16) | (x + w));
818 815
819 if (dev_priv->current_page == 1) { 816 if (dev_priv->current_page == 1)
820 OUT_RING(dev_priv->front_offset); 817 OUT_RING(dev_priv->front_offset);
821 } else { 818 else
822 OUT_RING(dev_priv->back_offset); 819 OUT_RING(dev_priv->back_offset);
823 }
824 820
825 OUT_RING(color); 821 OUT_RING(color);
826 ADVANCE_LP_RING(); 822 ADVANCE_LP_RING();
827} 823}
828 824
829static void i830_cp_performance_boxes(struct drm_device * dev) 825static void i830_cp_performance_boxes(struct drm_device *dev)
830{ 826{
831 drm_i830_private_t *dev_priv = dev->dev_private; 827 drm_i830_private_t *dev_priv = dev->dev_private;
832 828
@@ -871,7 +867,7 @@ static void i830_cp_performance_boxes(struct drm_device * dev)
871 dev_priv->sarea_priv->perf_boxes = 0; 867 dev_priv->sarea_priv->perf_boxes = 0;
872} 868}
873 869
874static void i830_dma_dispatch_clear(struct drm_device * dev, int flags, 870static void i830_dma_dispatch_clear(struct drm_device *dev, int flags,
875 unsigned int clear_color, 871 unsigned int clear_color,
876 unsigned int clear_zval, 872 unsigned int clear_zval,
877 unsigned int clear_depthmask) 873 unsigned int clear_depthmask)
@@ -966,7 +962,7 @@ static void i830_dma_dispatch_clear(struct drm_device * dev, int flags,
966 } 962 }
967} 963}
968 964
969static void i830_dma_dispatch_swap(struct drm_device * dev) 965static void i830_dma_dispatch_swap(struct drm_device *dev)
970{ 966{
971 drm_i830_private_t *dev_priv = dev->dev_private; 967 drm_i830_private_t *dev_priv = dev->dev_private;
972 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv; 968 drm_i830_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -1036,7 +1032,7 @@ static void i830_dma_dispatch_swap(struct drm_device * dev)
1036 } 1032 }
1037} 1033}
1038 1034
1039static void i830_dma_dispatch_flip(struct drm_device * dev) 1035static void i830_dma_dispatch_flip(struct drm_device *dev)
1040{ 1036{
1041 drm_i830_private_t *dev_priv = dev->dev_private; 1037 drm_i830_private_t *dev_priv = dev->dev_private;
1042 RING_LOCALS; 1038 RING_LOCALS;
@@ -1079,8 +1075,8 @@ static void i830_dma_dispatch_flip(struct drm_device * dev)
1079 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1075 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1080} 1076}
1081 1077
1082static void i830_dma_dispatch_vertex(struct drm_device * dev, 1078static void i830_dma_dispatch_vertex(struct drm_device *dev,
1083 struct drm_buf * buf, int discard, int used) 1079 struct drm_buf *buf, int discard, int used)
1084{ 1080{
1085 drm_i830_private_t *dev_priv = dev->dev_private; 1081 drm_i830_private_t *dev_priv = dev->dev_private;
1086 drm_i830_buf_priv_t *buf_priv = buf->dev_private; 1082 drm_i830_buf_priv_t *buf_priv = buf->dev_private;
@@ -1100,9 +1096,8 @@ static void i830_dma_dispatch_vertex(struct drm_device * dev,
1100 if (discard) { 1096 if (discard) {
1101 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT, 1097 u = cmpxchg(buf_priv->in_use, I830_BUF_CLIENT,
1102 I830_BUF_HARDWARE); 1098 I830_BUF_HARDWARE);
1103 if (u != I830_BUF_CLIENT) { 1099 if (u != I830_BUF_CLIENT)
1104 DRM_DEBUG("xxxx 2\n"); 1100 DRM_DEBUG("xxxx 2\n");
1105 }
1106 } 1101 }
1107 1102
1108 if (used > 4 * 1023) 1103 if (used > 4 * 1023)
@@ -1191,7 +1186,7 @@ static void i830_dma_dispatch_vertex(struct drm_device * dev,
1191 } 1186 }
1192} 1187}
1193 1188
1194static void i830_dma_quiescent(struct drm_device * dev) 1189static void i830_dma_quiescent(struct drm_device *dev)
1195{ 1190{
1196 drm_i830_private_t *dev_priv = dev->dev_private; 1191 drm_i830_private_t *dev_priv = dev->dev_private;
1197 RING_LOCALS; 1192 RING_LOCALS;
@@ -1208,7 +1203,7 @@ static void i830_dma_quiescent(struct drm_device * dev)
1208 i830_wait_ring(dev, dev_priv->ring.Size - 8, __func__); 1203 i830_wait_ring(dev, dev_priv->ring.Size - 8, __func__);
1209} 1204}
1210 1205
1211static int i830_flush_queue(struct drm_device * dev) 1206static int i830_flush_queue(struct drm_device *dev)
1212{ 1207{
1213 drm_i830_private_t *dev_priv = dev->dev_private; 1208 drm_i830_private_t *dev_priv = dev->dev_private;
1214 struct drm_device_dma *dma = dev->dma; 1209 struct drm_device_dma *dma = dev->dma;
@@ -1241,7 +1236,7 @@ static int i830_flush_queue(struct drm_device * dev)
1241} 1236}
1242 1237
1243/* Must be called with the lock held */ 1238/* Must be called with the lock held */
1244static void i830_reclaim_buffers(struct drm_device * dev, struct drm_file *file_priv) 1239static void i830_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv)
1245{ 1240{
1246 struct drm_device_dma *dma = dev->dma; 1241 struct drm_device_dma *dma = dev->dma;
1247 int i; 1242 int i;
@@ -1316,9 +1311,8 @@ static int i830_clear_bufs(struct drm_device *dev, void *data,
1316 LOCK_TEST_WITH_RETURN(dev, file_priv); 1311 LOCK_TEST_WITH_RETURN(dev, file_priv);
1317 1312
1318 /* GH: Someone's doing nasty things... */ 1313 /* GH: Someone's doing nasty things... */
1319 if (!dev->dev_private) { 1314 if (!dev->dev_private)
1320 return -EINVAL; 1315 return -EINVAL;
1321 }
1322 1316
1323 i830_dma_dispatch_clear(dev, clear->flags, 1317 i830_dma_dispatch_clear(dev, clear->flags,
1324 clear->clear_color, 1318 clear->clear_color,
@@ -1339,7 +1333,7 @@ static int i830_swap_bufs(struct drm_device *dev, void *data,
1339 1333
1340/* Not sure why this isn't set all the time: 1334/* Not sure why this isn't set all the time:
1341 */ 1335 */
1342static void i830_do_init_pageflip(struct drm_device * dev) 1336static void i830_do_init_pageflip(struct drm_device *dev)
1343{ 1337{
1344 drm_i830_private_t *dev_priv = dev->dev_private; 1338 drm_i830_private_t *dev_priv = dev->dev_private;
1345 1339
@@ -1349,7 +1343,7 @@ static void i830_do_init_pageflip(struct drm_device * dev)
1349 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page; 1343 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1350} 1344}
1351 1345
1352static int i830_do_cleanup_pageflip(struct drm_device * dev) 1346static int i830_do_cleanup_pageflip(struct drm_device *dev)
1353{ 1347{
1354 drm_i830_private_t *dev_priv = dev->dev_private; 1348 drm_i830_private_t *dev_priv = dev->dev_private;
1355 1349
@@ -1490,27 +1484,26 @@ int i830_driver_load(struct drm_device *dev, unsigned long flags)
1490 return 0; 1484 return 0;
1491} 1485}
1492 1486
1493void i830_driver_lastclose(struct drm_device * dev) 1487void i830_driver_lastclose(struct drm_device *dev)
1494{ 1488{
1495 i830_dma_cleanup(dev); 1489 i830_dma_cleanup(dev);
1496} 1490}
1497 1491
1498void i830_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) 1492void i830_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1499{ 1493{
1500 if (dev->dev_private) { 1494 if (dev->dev_private) {
1501 drm_i830_private_t *dev_priv = dev->dev_private; 1495 drm_i830_private_t *dev_priv = dev->dev_private;
1502 if (dev_priv->page_flipping) { 1496 if (dev_priv->page_flipping)
1503 i830_do_cleanup_pageflip(dev); 1497 i830_do_cleanup_pageflip(dev);
1504 }
1505 } 1498 }
1506} 1499}
1507 1500
1508void i830_driver_reclaim_buffers_locked(struct drm_device * dev, struct drm_file *file_priv) 1501void i830_driver_reclaim_buffers_locked(struct drm_device *dev, struct drm_file *file_priv)
1509{ 1502{
1510 i830_reclaim_buffers(dev, file_priv); 1503 i830_reclaim_buffers(dev, file_priv);
1511} 1504}
1512 1505
1513int i830_driver_dma_quiescent(struct drm_device * dev) 1506int i830_driver_dma_quiescent(struct drm_device *dev)
1514{ 1507{
1515 i830_dma_quiescent(dev); 1508 i830_dma_quiescent(dev);
1516 return 0; 1509 return 0;
@@ -1546,7 +1539,7 @@ int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls);
1546 * \returns 1539 * \returns
1547 * A value of 1 is always retured to indictate every i8xx is AGP. 1540 * A value of 1 is always retured to indictate every i8xx is AGP.
1548 */ 1541 */
1549int i830_driver_device_is_agp(struct drm_device * dev) 1542int i830_driver_device_is_agp(struct drm_device *dev)
1550{ 1543{
1551 return 1; 1544 return 1;
1552} 1545}
diff --git a/drivers/gpu/drm/i830/i830_drv.h b/drivers/gpu/drm/i830/i830_drv.h
index da82afe4ded5..ecfd25a35da3 100644
--- a/drivers/gpu/drm/i830/i830_drv.h
+++ b/drivers/gpu/drm/i830/i830_drv.h
@@ -132,33 +132,33 @@ extern int i830_irq_wait(struct drm_device *dev, void *data,
132 struct drm_file *file_priv); 132 struct drm_file *file_priv);
133 133
134extern irqreturn_t i830_driver_irq_handler(DRM_IRQ_ARGS); 134extern irqreturn_t i830_driver_irq_handler(DRM_IRQ_ARGS);
135extern void i830_driver_irq_preinstall(struct drm_device * dev); 135extern void i830_driver_irq_preinstall(struct drm_device *dev);
136extern void i830_driver_irq_postinstall(struct drm_device * dev); 136extern void i830_driver_irq_postinstall(struct drm_device *dev);
137extern void i830_driver_irq_uninstall(struct drm_device * dev); 137extern void i830_driver_irq_uninstall(struct drm_device *dev);
138extern int i830_driver_load(struct drm_device *, unsigned long flags); 138extern int i830_driver_load(struct drm_device *, unsigned long flags);
139extern void i830_driver_preclose(struct drm_device * dev, 139extern void i830_driver_preclose(struct drm_device *dev,
140 struct drm_file *file_priv); 140 struct drm_file *file_priv);
141extern void i830_driver_lastclose(struct drm_device * dev); 141extern void i830_driver_lastclose(struct drm_device *dev);
142extern void i830_driver_reclaim_buffers_locked(struct drm_device * dev, 142extern void i830_driver_reclaim_buffers_locked(struct drm_device *dev,
143 struct drm_file *file_priv); 143 struct drm_file *file_priv);
144extern int i830_driver_dma_quiescent(struct drm_device * dev); 144extern int i830_driver_dma_quiescent(struct drm_device *dev);
145extern int i830_driver_device_is_agp(struct drm_device * dev); 145extern int i830_driver_device_is_agp(struct drm_device *dev);
146 146
147#define I830_READ(reg) DRM_READ32(dev_priv->mmio_map, reg) 147#define I830_READ(reg) DRM_READ32(dev_priv->mmio_map, reg)
148#define I830_WRITE(reg,val) DRM_WRITE32(dev_priv->mmio_map, reg, val) 148#define I830_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio_map, reg, val)
149#define I830_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg) 149#define I830_READ16(reg) DRM_READ16(dev_priv->mmio_map, reg)
150#define I830_WRITE16(reg,val) DRM_WRITE16(dev_priv->mmio_map, reg, val) 150#define I830_WRITE16(reg, val) DRM_WRITE16(dev_priv->mmio_map, reg, val)
151 151
152#define I830_VERBOSE 0 152#define I830_VERBOSE 0
153 153
154#define RING_LOCALS unsigned int outring, ringmask, outcount; \ 154#define RING_LOCALS unsigned int outring, ringmask, outcount; \
155 volatile char *virt; 155 volatile char *virt;
156 156
157#define BEGIN_LP_RING(n) do { \ 157#define BEGIN_LP_RING(n) do { \
158 if (I830_VERBOSE) \ 158 if (I830_VERBOSE) \
159 printk("BEGIN_LP_RING(%d)\n", (n)); \ 159 printk("BEGIN_LP_RING(%d)\n", (n)); \
160 if (dev_priv->ring.space < n*4) \ 160 if (dev_priv->ring.space < n*4) \
161 i830_wait_ring(dev, n*4, __func__); \ 161 i830_wait_ring(dev, n*4, __func__); \
162 outcount = 0; \ 162 outcount = 0; \
163 outring = dev_priv->ring.tail; \ 163 outring = dev_priv->ring.tail; \
164 ringmask = dev_priv->ring.tail_mask; \ 164 ringmask = dev_priv->ring.tail_mask; \
@@ -166,21 +166,23 @@ extern int i830_driver_device_is_agp(struct drm_device * dev);
166} while (0) 166} while (0)
167 167
168#define OUT_RING(n) do { \ 168#define OUT_RING(n) do { \
169 if (I830_VERBOSE) printk(" OUT_RING %x\n", (int)(n)); \ 169 if (I830_VERBOSE) \
170 printk(" OUT_RING %x\n", (int)(n)); \
170 *(volatile unsigned int *)(virt + outring) = n; \ 171 *(volatile unsigned int *)(virt + outring) = n; \
171 outcount++; \ 172 outcount++; \
172 outring += 4; \ 173 outring += 4; \
173 outring &= ringmask; \ 174 outring &= ringmask; \
174} while (0) 175} while (0)
175 176
176#define ADVANCE_LP_RING() do { \ 177#define ADVANCE_LP_RING() do { \
177 if (I830_VERBOSE) printk("ADVANCE_LP_RING %x\n", outring); \ 178 if (I830_VERBOSE) \
178 dev_priv->ring.tail = outring; \ 179 printk("ADVANCE_LP_RING %x\n", outring); \
179 dev_priv->ring.space -= outcount * 4; \ 180 dev_priv->ring.tail = outring; \
180 I830_WRITE(LP_RING + RING_TAIL, outring); \ 181 dev_priv->ring.space -= outcount * 4; \
181} while(0) 182 I830_WRITE(LP_RING + RING_TAIL, outring); \
183} while (0)
182 184
183extern int i830_wait_ring(struct drm_device * dev, int n, const char *caller); 185extern int i830_wait_ring(struct drm_device *dev, int n, const char *caller);
184 186
185#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23)) 187#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
186#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23)) 188#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
diff --git a/drivers/gpu/drm/i830/i830_irq.c b/drivers/gpu/drm/i830/i830_irq.c
index 91ec2bb497e9..d1a6b95d631d 100644
--- a/drivers/gpu/drm/i830/i830_irq.c
+++ b/drivers/gpu/drm/i830/i830_irq.c
@@ -53,7 +53,7 @@ irqreturn_t i830_driver_irq_handler(DRM_IRQ_ARGS)
53 return IRQ_HANDLED; 53 return IRQ_HANDLED;
54} 54}
55 55
56static int i830_emit_irq(struct drm_device * dev) 56static int i830_emit_irq(struct drm_device *dev)
57{ 57{
58 drm_i830_private_t *dev_priv = dev->dev_private; 58 drm_i830_private_t *dev_priv = dev->dev_private;
59 RING_LOCALS; 59 RING_LOCALS;
@@ -70,7 +70,7 @@ static int i830_emit_irq(struct drm_device * dev)
70 return atomic_read(&dev_priv->irq_emitted); 70 return atomic_read(&dev_priv->irq_emitted);
71} 71}
72 72
73static int i830_wait_irq(struct drm_device * dev, int irq_nr) 73static int i830_wait_irq(struct drm_device *dev, int irq_nr)
74{ 74{
75 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private; 75 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
76 DECLARE_WAITQUEUE(entry, current); 76 DECLARE_WAITQUEUE(entry, current);
@@ -156,7 +156,7 @@ int i830_irq_wait(struct drm_device *dev, void *data,
156 156
157/* drm_dma.h hooks 157/* drm_dma.h hooks
158*/ 158*/
159void i830_driver_irq_preinstall(struct drm_device * dev) 159void i830_driver_irq_preinstall(struct drm_device *dev)
160{ 160{
161 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private; 161 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
162 162
@@ -168,14 +168,14 @@ void i830_driver_irq_preinstall(struct drm_device * dev)
168 init_waitqueue_head(&dev_priv->irq_queue); 168 init_waitqueue_head(&dev_priv->irq_queue);
169} 169}
170 170
171void i830_driver_irq_postinstall(struct drm_device * dev) 171void i830_driver_irq_postinstall(struct drm_device *dev)
172{ 172{
173 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private; 173 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
174 174
175 I830_WRITE16(I830REG_INT_ENABLE_R, 0x2); 175 I830_WRITE16(I830REG_INT_ENABLE_R, 0x2);
176} 176}
177 177
178void i830_driver_irq_uninstall(struct drm_device * dev) 178void i830_driver_irq_uninstall(struct drm_device *dev)
179{ 179{
180 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private; 180 drm_i830_private_t *dev_priv = (drm_i830_private_t *) dev->dev_private;
181 if (!dev_priv) 181 if (!dev_priv)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 75061b305b8c..15d2d93aaca9 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2241,6 +2241,7 @@ i915_gem_object_get_pages(struct drm_gem_object *obj,
2241 page = read_cache_page_gfp(mapping, i, 2241 page = read_cache_page_gfp(mapping, i,
2242 GFP_HIGHUSER | 2242 GFP_HIGHUSER |
2243 __GFP_COLD | 2243 __GFP_COLD |
2244 __GFP_RECLAIMABLE |
2244 gfpmask); 2245 gfpmask);
2245 if (IS_ERR(page)) 2246 if (IS_ERR(page))
2246 goto err_pages; 2247 goto err_pages;
@@ -4739,6 +4740,16 @@ i915_gem_load(struct drm_device *dev)
4739 list_add(&dev_priv->mm.shrink_list, &shrink_list); 4740 list_add(&dev_priv->mm.shrink_list, &shrink_list);
4740 spin_unlock(&shrink_list_lock); 4741 spin_unlock(&shrink_list_lock);
4741 4742
4743 /* On GEN3 we really need to make sure the ARB C3 LP bit is set */
4744 if (IS_GEN3(dev)) {
4745 u32 tmp = I915_READ(MI_ARB_STATE);
4746 if (!(tmp & MI_ARB_C3_LP_WRITE_ENABLE)) {
4747 /* arb state is a masked write, so set bit + bit in mask */
4748 tmp = MI_ARB_C3_LP_WRITE_ENABLE | (MI_ARB_C3_LP_WRITE_ENABLE << MI_ARB_MASK_SHIFT);
4749 I915_WRITE(MI_ARB_STATE, tmp);
4750 }
4751 }
4752
4742 /* Old X drivers will take 0-2 for front, back, depth buffers */ 4753 /* Old X drivers will take 0-2 for front, back, depth buffers */
4743 if (!drm_core_check_feature(dev, DRIVER_MODESET)) 4754 if (!drm_core_check_feature(dev, DRIVER_MODESET))
4744 dev_priv->fence_reg_start = 3; 4755 dev_priv->fence_reg_start = 3;
@@ -4975,7 +4986,7 @@ i915_gpu_is_active(struct drm_device *dev)
4975} 4986}
4976 4987
4977static int 4988static int
4978i915_gem_shrink(int nr_to_scan, gfp_t gfp_mask) 4989i915_gem_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
4979{ 4990{
4980 drm_i915_private_t *dev_priv, *next_dev; 4991 drm_i915_private_t *dev_priv, *next_dev;
4981 struct drm_i915_gem_object *obj_priv, *next_obj; 4992 struct drm_i915_gem_object *obj_priv, *next_obj;
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 150400f40534..6d9b0288272a 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -359,6 +359,70 @@
359#define LM_BURST_LENGTH 0x00000700 359#define LM_BURST_LENGTH 0x00000700
360#define LM_FIFO_WATERMARK 0x0000001F 360#define LM_FIFO_WATERMARK 0x0000001F
361#define MI_ARB_STATE 0x020e4 /* 915+ only */ 361#define MI_ARB_STATE 0x020e4 /* 915+ only */
362#define MI_ARB_MASK_SHIFT 16 /* shift for enable bits */
363
364/* Make render/texture TLB fetches lower priorty than associated data
365 * fetches. This is not turned on by default
366 */
367#define MI_ARB_RENDER_TLB_LOW_PRIORITY (1 << 15)
368
369/* Isoch request wait on GTT enable (Display A/B/C streams).
370 * Make isoch requests stall on the TLB update. May cause
371 * display underruns (test mode only)
372 */
373#define MI_ARB_ISOCH_WAIT_GTT (1 << 14)
374
375/* Block grant count for isoch requests when block count is
376 * set to a finite value.
377 */
378#define MI_ARB_BLOCK_GRANT_MASK (3 << 12)
379#define MI_ARB_BLOCK_GRANT_8 (0 << 12) /* for 3 display planes */
380#define MI_ARB_BLOCK_GRANT_4 (1 << 12) /* for 2 display planes */
381#define MI_ARB_BLOCK_GRANT_2 (2 << 12) /* for 1 display plane */
382#define MI_ARB_BLOCK_GRANT_0 (3 << 12) /* don't use */
383
384/* Enable render writes to complete in C2/C3/C4 power states.
385 * If this isn't enabled, render writes are prevented in low
386 * power states. That seems bad to me.
387 */
388#define MI_ARB_C3_LP_WRITE_ENABLE (1 << 11)
389
390/* This acknowledges an async flip immediately instead
391 * of waiting for 2TLB fetches.
392 */
393#define MI_ARB_ASYNC_FLIP_ACK_IMMEDIATE (1 << 10)
394
395/* Enables non-sequential data reads through arbiter
396 */
397#define MI_ARB_DUAL_DATA_PHASE_DISABLE (1 << 9)
398
399/* Disable FSB snooping of cacheable write cycles from binner/render
400 * command stream
401 */
402#define MI_ARB_CACHE_SNOOP_DISABLE (1 << 8)
403
404/* Arbiter time slice for non-isoch streams */
405#define MI_ARB_TIME_SLICE_MASK (7 << 5)
406#define MI_ARB_TIME_SLICE_1 (0 << 5)
407#define MI_ARB_TIME_SLICE_2 (1 << 5)
408#define MI_ARB_TIME_SLICE_4 (2 << 5)
409#define MI_ARB_TIME_SLICE_6 (3 << 5)
410#define MI_ARB_TIME_SLICE_8 (4 << 5)
411#define MI_ARB_TIME_SLICE_10 (5 << 5)
412#define MI_ARB_TIME_SLICE_14 (6 << 5)
413#define MI_ARB_TIME_SLICE_16 (7 << 5)
414
415/* Low priority grace period page size */
416#define MI_ARB_LOW_PRIORITY_GRACE_4KB (0 << 4) /* default */
417#define MI_ARB_LOW_PRIORITY_GRACE_8KB (1 << 4)
418
419/* Disable display A/B trickle feed */
420#define MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE (1 << 2)
421
422/* Set display plane priority */
423#define MI_ARB_DISPLAY_PRIORITY_A_B (0 << 0) /* display A > display B */
424#define MI_ARB_DISPLAY_PRIORITY_B_A (1 << 0) /* display B > display A */
425
362#define CACHE_MODE_0 0x02120 /* 915+ only */ 426#define CACHE_MODE_0 0x02120 /* 915+ only */
363#define CM0_MASK_SHIFT 16 427#define CM0_MASK_SHIFT 16
364#define CM0_IZ_OPT_DISABLE (1<<6) 428#define CM0_IZ_OPT_DISABLE (1<<6)
diff --git a/drivers/gpu/drm/mga/mga_dma.c b/drivers/gpu/drm/mga/mga_dma.c
index ccc129c328a4..08868ac3048a 100644
--- a/drivers/gpu/drm/mga/mga_dma.c
+++ b/drivers/gpu/drm/mga/mga_dma.c
@@ -52,7 +52,7 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup);
52 * Engine control 52 * Engine control
53 */ 53 */
54 54
55int mga_do_wait_for_idle(drm_mga_private_t * dev_priv) 55int mga_do_wait_for_idle(drm_mga_private_t *dev_priv)
56{ 56{
57 u32 status = 0; 57 u32 status = 0;
58 int i; 58 int i;
@@ -74,7 +74,7 @@ int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
74 return -EBUSY; 74 return -EBUSY;
75} 75}
76 76
77static int mga_do_dma_reset(drm_mga_private_t * dev_priv) 77static int mga_do_dma_reset(drm_mga_private_t *dev_priv)
78{ 78{
79 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 79 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
80 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 80 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
@@ -102,7 +102,7 @@ static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
102 * Primary DMA stream 102 * Primary DMA stream
103 */ 103 */
104 104
105void mga_do_dma_flush(drm_mga_private_t * dev_priv) 105void mga_do_dma_flush(drm_mga_private_t *dev_priv)
106{ 106{
107 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 107 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
108 u32 head, tail; 108 u32 head, tail;
@@ -142,11 +142,10 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
142 142
143 head = MGA_READ(MGA_PRIMADDRESS); 143 head = MGA_READ(MGA_PRIMADDRESS);
144 144
145 if (head <= tail) { 145 if (head <= tail)
146 primary->space = primary->size - primary->tail; 146 primary->space = primary->size - primary->tail;
147 } else { 147 else
148 primary->space = head - tail; 148 primary->space = head - tail;
149 }
150 149
151 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset)); 150 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
152 DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset)); 151 DRM_DEBUG(" tail = 0x%06lx\n", (unsigned long)(tail - dev_priv->primary->offset));
@@ -158,7 +157,7 @@ void mga_do_dma_flush(drm_mga_private_t * dev_priv)
158 DRM_DEBUG("done.\n"); 157 DRM_DEBUG("done.\n");
159} 158}
160 159
161void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv) 160void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv)
162{ 161{
163 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 162 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
164 u32 head, tail; 163 u32 head, tail;
@@ -181,11 +180,10 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
181 180
182 head = MGA_READ(MGA_PRIMADDRESS); 181 head = MGA_READ(MGA_PRIMADDRESS);
183 182
184 if (head == dev_priv->primary->offset) { 183 if (head == dev_priv->primary->offset)
185 primary->space = primary->size; 184 primary->space = primary->size;
186 } else { 185 else
187 primary->space = head - dev_priv->primary->offset; 186 primary->space = head - dev_priv->primary->offset;
188 }
189 187
190 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset)); 188 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset));
191 DRM_DEBUG(" tail = 0x%06x\n", primary->tail); 189 DRM_DEBUG(" tail = 0x%06x\n", primary->tail);
@@ -199,7 +197,7 @@ void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
199 DRM_DEBUG("done.\n"); 197 DRM_DEBUG("done.\n");
200} 198}
201 199
202void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv) 200void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv)
203{ 201{
204 drm_mga_primary_buffer_t *primary = &dev_priv->prim; 202 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
205 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 203 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -220,11 +218,11 @@ void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
220 * Freelist management 218 * Freelist management
221 */ 219 */
222 220
223#define MGA_BUFFER_USED ~0 221#define MGA_BUFFER_USED (~0)
224#define MGA_BUFFER_FREE 0 222#define MGA_BUFFER_FREE 0
225 223
226#if MGA_FREELIST_DEBUG 224#if MGA_FREELIST_DEBUG
227static void mga_freelist_print(struct drm_device * dev) 225static void mga_freelist_print(struct drm_device *dev)
228{ 226{
229 drm_mga_private_t *dev_priv = dev->dev_private; 227 drm_mga_private_t *dev_priv = dev->dev_private;
230 drm_mga_freelist_t *entry; 228 drm_mga_freelist_t *entry;
@@ -245,7 +243,7 @@ static void mga_freelist_print(struct drm_device * dev)
245} 243}
246#endif 244#endif
247 245
248static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv) 246static int mga_freelist_init(struct drm_device *dev, drm_mga_private_t *dev_priv)
249{ 247{
250 struct drm_device_dma *dma = dev->dma; 248 struct drm_device_dma *dma = dev->dma;
251 struct drm_buf *buf; 249 struct drm_buf *buf;
@@ -288,7 +286,7 @@ static int mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_pr
288 return 0; 286 return 0;
289} 287}
290 288
291static void mga_freelist_cleanup(struct drm_device * dev) 289static void mga_freelist_cleanup(struct drm_device *dev)
292{ 290{
293 drm_mga_private_t *dev_priv = dev->dev_private; 291 drm_mga_private_t *dev_priv = dev->dev_private;
294 drm_mga_freelist_t *entry; 292 drm_mga_freelist_t *entry;
@@ -308,7 +306,7 @@ static void mga_freelist_cleanup(struct drm_device * dev)
308#if 0 306#if 0
309/* FIXME: Still needed? 307/* FIXME: Still needed?
310 */ 308 */
311static void mga_freelist_reset(struct drm_device * dev) 309static void mga_freelist_reset(struct drm_device *dev)
312{ 310{
313 struct drm_device_dma *dma = dev->dma; 311 struct drm_device_dma *dma = dev->dma;
314 struct drm_buf *buf; 312 struct drm_buf *buf;
@@ -356,7 +354,7 @@ static struct drm_buf *mga_freelist_get(struct drm_device * dev)
356 return NULL; 354 return NULL;
357} 355}
358 356
359int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf) 357int mga_freelist_put(struct drm_device *dev, struct drm_buf *buf)
360{ 358{
361 drm_mga_private_t *dev_priv = dev->dev_private; 359 drm_mga_private_t *dev_priv = dev->dev_private;
362 drm_mga_buf_priv_t *buf_priv = buf->dev_private; 360 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -391,7 +389,7 @@ int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf)
391 * DMA initialization, cleanup 389 * DMA initialization, cleanup
392 */ 390 */
393 391
394int mga_driver_load(struct drm_device * dev, unsigned long flags) 392int mga_driver_load(struct drm_device *dev, unsigned long flags)
395{ 393{
396 drm_mga_private_t *dev_priv; 394 drm_mga_private_t *dev_priv;
397 int ret; 395 int ret;
@@ -439,8 +437,8 @@ int mga_driver_load(struct drm_device * dev, unsigned long flags)
439 * 437 *
440 * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap 438 * \sa mga_do_dma_bootstrap, mga_do_pci_dma_bootstrap
441 */ 439 */
442static int mga_do_agp_dma_bootstrap(struct drm_device * dev, 440static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
443 drm_mga_dma_bootstrap_t * dma_bs) 441 drm_mga_dma_bootstrap_t *dma_bs)
444{ 442{
445 drm_mga_private_t *const dev_priv = 443 drm_mga_private_t *const dev_priv =
446 (drm_mga_private_t *) dev->dev_private; 444 (drm_mga_private_t *) dev->dev_private;
@@ -481,11 +479,10 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
481 */ 479 */
482 480
483 if (dev_priv->chipset == MGA_CARD_TYPE_G200) { 481 if (dev_priv->chipset == MGA_CARD_TYPE_G200) {
484 if (mode.mode & 0x02) { 482 if (mode.mode & 0x02)
485 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE); 483 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_ENABLE);
486 } else { 484 else
487 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE); 485 MGA_WRITE(MGA_AGP_PLL, MGA_AGP2XPLL_DISABLE);
488 }
489 } 486 }
490 487
491 /* Allocate and bind AGP memory. */ 488 /* Allocate and bind AGP memory. */
@@ -593,8 +590,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
593 return 0; 590 return 0;
594} 591}
595#else 592#else
596static int mga_do_agp_dma_bootstrap(struct drm_device * dev, 593static int mga_do_agp_dma_bootstrap(struct drm_device *dev,
597 drm_mga_dma_bootstrap_t * dma_bs) 594 drm_mga_dma_bootstrap_t *dma_bs)
598{ 595{
599 return -EINVAL; 596 return -EINVAL;
600} 597}
@@ -614,8 +611,8 @@ static int mga_do_agp_dma_bootstrap(struct drm_device * dev,
614 * 611 *
615 * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap 612 * \sa mga_do_dma_bootstrap, mga_do_agp_dma_bootstrap
616 */ 613 */
617static int mga_do_pci_dma_bootstrap(struct drm_device * dev, 614static int mga_do_pci_dma_bootstrap(struct drm_device *dev,
618 drm_mga_dma_bootstrap_t * dma_bs) 615 drm_mga_dma_bootstrap_t *dma_bs)
619{ 616{
620 drm_mga_private_t *const dev_priv = 617 drm_mga_private_t *const dev_priv =
621 (drm_mga_private_t *) dev->dev_private; 618 (drm_mga_private_t *) dev->dev_private;
@@ -678,9 +675,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
678 req.size = dma_bs->secondary_bin_size; 675 req.size = dma_bs->secondary_bin_size;
679 676
680 err = drm_addbufs_pci(dev, &req); 677 err = drm_addbufs_pci(dev, &req);
681 if (!err) { 678 if (!err)
682 break; 679 break;
683 }
684 } 680 }
685 681
686 if (bin_count == 0) { 682 if (bin_count == 0) {
@@ -704,8 +700,8 @@ static int mga_do_pci_dma_bootstrap(struct drm_device * dev,
704 return 0; 700 return 0;
705} 701}
706 702
707static int mga_do_dma_bootstrap(struct drm_device * dev, 703static int mga_do_dma_bootstrap(struct drm_device *dev,
708 drm_mga_dma_bootstrap_t * dma_bs) 704 drm_mga_dma_bootstrap_t *dma_bs)
709{ 705{
710 const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev); 706 const int is_agp = (dma_bs->agp_mode != 0) && drm_device_is_agp(dev);
711 int err; 707 int err;
@@ -737,17 +733,15 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
737 * carve off portions of it for internal uses. The remaining memory 733 * carve off portions of it for internal uses. The remaining memory
738 * is returned to user-mode to be used for AGP textures. 734 * is returned to user-mode to be used for AGP textures.
739 */ 735 */
740 if (is_agp) { 736 if (is_agp)
741 err = mga_do_agp_dma_bootstrap(dev, dma_bs); 737 err = mga_do_agp_dma_bootstrap(dev, dma_bs);
742 }
743 738
744 /* If we attempted to initialize the card for AGP DMA but failed, 739 /* If we attempted to initialize the card for AGP DMA but failed,
745 * clean-up any mess that may have been created. 740 * clean-up any mess that may have been created.
746 */ 741 */
747 742
748 if (err) { 743 if (err)
749 mga_do_cleanup_dma(dev, MINIMAL_CLEANUP); 744 mga_do_cleanup_dma(dev, MINIMAL_CLEANUP);
750 }
751 745
752 /* Not only do we want to try and initialized PCI cards for PCI DMA, 746 /* Not only do we want to try and initialized PCI cards for PCI DMA,
753 * but we also try to initialized AGP cards that could not be 747 * but we also try to initialized AGP cards that could not be
@@ -757,9 +751,8 @@ static int mga_do_dma_bootstrap(struct drm_device * dev,
757 * AGP memory, etc. 751 * AGP memory, etc.
758 */ 752 */
759 753
760 if (!is_agp || err) { 754 if (!is_agp || err)
761 err = mga_do_pci_dma_bootstrap(dev, dma_bs); 755 err = mga_do_pci_dma_bootstrap(dev, dma_bs);
762 }
763 756
764 return err; 757 return err;
765} 758}
@@ -792,7 +785,7 @@ int mga_dma_bootstrap(struct drm_device *dev, void *data,
792 return err; 785 return err;
793} 786}
794 787
795static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init) 788static int mga_do_init_dma(struct drm_device *dev, drm_mga_init_t *init)
796{ 789{
797 drm_mga_private_t *dev_priv; 790 drm_mga_private_t *dev_priv;
798 int ret; 791 int ret;
@@ -800,11 +793,10 @@ static int mga_do_init_dma(struct drm_device * dev, drm_mga_init_t * init)
800 793
801 dev_priv = dev->dev_private; 794 dev_priv = dev->dev_private;
802 795
803 if (init->sgram) { 796 if (init->sgram)
804 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK; 797 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
805 } else { 798 else
806 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR; 799 dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
807 }
808 dev_priv->maccess = init->maccess; 800 dev_priv->maccess = init->maccess;
809 801
810 dev_priv->fb_cpp = init->fb_cpp; 802 dev_priv->fb_cpp = init->fb_cpp;
@@ -975,9 +967,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
975 dev_priv->agp_handle = 0; 967 dev_priv->agp_handle = 0;
976 } 968 }
977 969
978 if ((dev->agp != NULL) && dev->agp->acquired) { 970 if ((dev->agp != NULL) && dev->agp->acquired)
979 err = drm_agp_release(dev); 971 err = drm_agp_release(dev);
980 }
981#endif 972#endif
982 } 973 }
983 974
@@ -998,9 +989,8 @@ static int mga_do_cleanup_dma(struct drm_device *dev, int full_cleanup)
998 memset(dev_priv->warp_pipe_phys, 0, 989 memset(dev_priv->warp_pipe_phys, 0,
999 sizeof(dev_priv->warp_pipe_phys)); 990 sizeof(dev_priv->warp_pipe_phys));
1000 991
1001 if (dev_priv->head != NULL) { 992 if (dev_priv->head != NULL)
1002 mga_freelist_cleanup(dev); 993 mga_freelist_cleanup(dev);
1003 }
1004 } 994 }
1005 995
1006 return err; 996 return err;
@@ -1017,9 +1007,8 @@ int mga_dma_init(struct drm_device *dev, void *data,
1017 switch (init->func) { 1007 switch (init->func) {
1018 case MGA_INIT_DMA: 1008 case MGA_INIT_DMA:
1019 err = mga_do_init_dma(dev, init); 1009 err = mga_do_init_dma(dev, init);
1020 if (err) { 1010 if (err)
1021 (void)mga_do_cleanup_dma(dev, FULL_CLEANUP); 1011 (void)mga_do_cleanup_dma(dev, FULL_CLEANUP);
1022 }
1023 return err; 1012 return err;
1024 case MGA_CLEANUP_DMA: 1013 case MGA_CLEANUP_DMA:
1025 return mga_do_cleanup_dma(dev, FULL_CLEANUP); 1014 return mga_do_cleanup_dma(dev, FULL_CLEANUP);
@@ -1047,9 +1036,8 @@ int mga_dma_flush(struct drm_device *dev, void *data,
1047 1036
1048 WRAP_WAIT_WITH_RETURN(dev_priv); 1037 WRAP_WAIT_WITH_RETURN(dev_priv);
1049 1038
1050 if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL)) { 1039 if (lock->flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL))
1051 mga_do_dma_flush(dev_priv); 1040 mga_do_dma_flush(dev_priv);
1052 }
1053 1041
1054 if (lock->flags & _DRM_LOCK_QUIESCENT) { 1042 if (lock->flags & _DRM_LOCK_QUIESCENT) {
1055#if MGA_DMA_DEBUG 1043#if MGA_DMA_DEBUG
@@ -1079,8 +1067,8 @@ int mga_dma_reset(struct drm_device *dev, void *data,
1079 * DMA buffer management 1067 * DMA buffer management
1080 */ 1068 */
1081 1069
1082static int mga_dma_get_buffers(struct drm_device * dev, 1070static int mga_dma_get_buffers(struct drm_device *dev,
1083 struct drm_file *file_priv, struct drm_dma * d) 1071 struct drm_file *file_priv, struct drm_dma *d)
1084{ 1072{
1085 struct drm_buf *buf; 1073 struct drm_buf *buf;
1086 int i; 1074 int i;
@@ -1134,9 +1122,8 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
1134 1122
1135 d->granted_count = 0; 1123 d->granted_count = 0;
1136 1124
1137 if (d->request_count) { 1125 if (d->request_count)
1138 ret = mga_dma_get_buffers(dev, file_priv, d); 1126 ret = mga_dma_get_buffers(dev, file_priv, d);
1139 }
1140 1127
1141 return ret; 1128 return ret;
1142} 1129}
@@ -1144,7 +1131,7 @@ int mga_dma_buffers(struct drm_device *dev, void *data,
1144/** 1131/**
1145 * Called just before the module is unloaded. 1132 * Called just before the module is unloaded.
1146 */ 1133 */
1147int mga_driver_unload(struct drm_device * dev) 1134int mga_driver_unload(struct drm_device *dev)
1148{ 1135{
1149 kfree(dev->dev_private); 1136 kfree(dev->dev_private);
1150 dev->dev_private = NULL; 1137 dev->dev_private = NULL;
@@ -1155,12 +1142,12 @@ int mga_driver_unload(struct drm_device * dev)
1155/** 1142/**
1156 * Called when the last opener of the device is closed. 1143 * Called when the last opener of the device is closed.
1157 */ 1144 */
1158void mga_driver_lastclose(struct drm_device * dev) 1145void mga_driver_lastclose(struct drm_device *dev)
1159{ 1146{
1160 mga_do_cleanup_dma(dev, FULL_CLEANUP); 1147 mga_do_cleanup_dma(dev, FULL_CLEANUP);
1161} 1148}
1162 1149
1163int mga_driver_dma_quiescent(struct drm_device * dev) 1150int mga_driver_dma_quiescent(struct drm_device *dev)
1164{ 1151{
1165 drm_mga_private_t *dev_priv = dev->dev_private; 1152 drm_mga_private_t *dev_priv = dev->dev_private;
1166 return mga_do_wait_for_idle(dev_priv); 1153 return mga_do_wait_for_idle(dev_priv);
diff --git a/drivers/gpu/drm/mga/mga_drv.c b/drivers/gpu/drm/mga/mga_drv.c
index ddfe16197b59..26d0d8ced80d 100644
--- a/drivers/gpu/drm/mga/mga_drv.c
+++ b/drivers/gpu/drm/mga/mga_drv.c
@@ -36,7 +36,7 @@
36 36
37#include "drm_pciids.h" 37#include "drm_pciids.h"
38 38
39static int mga_driver_device_is_agp(struct drm_device * dev); 39static int mga_driver_device_is_agp(struct drm_device *dev);
40 40
41static struct pci_device_id pciidlist[] = { 41static struct pci_device_id pciidlist[] = {
42 mga_PCI_IDS 42 mga_PCI_IDS
@@ -119,7 +119,7 @@ MODULE_LICENSE("GPL and additional rights");
119 * \returns 119 * \returns
120 * If the device is a PCI G450, zero is returned. Otherwise 2 is returned. 120 * If the device is a PCI G450, zero is returned. Otherwise 2 is returned.
121 */ 121 */
122static int mga_driver_device_is_agp(struct drm_device * dev) 122static int mga_driver_device_is_agp(struct drm_device *dev)
123{ 123{
124 const struct pci_dev *const pdev = dev->pdev; 124 const struct pci_dev *const pdev = dev->pdev;
125 125
diff --git a/drivers/gpu/drm/mga/mga_drv.h b/drivers/gpu/drm/mga/mga_drv.h
index be6c6b9b0e89..1084fa4d261b 100644
--- a/drivers/gpu/drm/mga/mga_drv.h
+++ b/drivers/gpu/drm/mga/mga_drv.h
@@ -164,59 +164,59 @@ extern int mga_dma_reset(struct drm_device *dev, void *data,
164extern int mga_dma_buffers(struct drm_device *dev, void *data, 164extern int mga_dma_buffers(struct drm_device *dev, void *data,
165 struct drm_file *file_priv); 165 struct drm_file *file_priv);
166extern int mga_driver_load(struct drm_device *dev, unsigned long flags); 166extern int mga_driver_load(struct drm_device *dev, unsigned long flags);
167extern int mga_driver_unload(struct drm_device * dev); 167extern int mga_driver_unload(struct drm_device *dev);
168extern void mga_driver_lastclose(struct drm_device * dev); 168extern void mga_driver_lastclose(struct drm_device *dev);
169extern int mga_driver_dma_quiescent(struct drm_device * dev); 169extern int mga_driver_dma_quiescent(struct drm_device *dev);
170 170
171extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv); 171extern int mga_do_wait_for_idle(drm_mga_private_t *dev_priv);
172 172
173extern void mga_do_dma_flush(drm_mga_private_t * dev_priv); 173extern void mga_do_dma_flush(drm_mga_private_t *dev_priv);
174extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv); 174extern void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv);
175extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv); 175extern void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv);
176 176
177extern int mga_freelist_put(struct drm_device * dev, struct drm_buf * buf); 177extern int mga_freelist_put(struct drm_device *dev, struct drm_buf *buf);
178 178
179 /* mga_warp.c */ 179 /* mga_warp.c */
180extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv); 180extern int mga_warp_install_microcode(drm_mga_private_t *dev_priv);
181extern int mga_warp_init(drm_mga_private_t * dev_priv); 181extern int mga_warp_init(drm_mga_private_t *dev_priv);
182 182
183 /* mga_irq.c */ 183 /* mga_irq.c */
184extern int mga_enable_vblank(struct drm_device *dev, int crtc); 184extern int mga_enable_vblank(struct drm_device *dev, int crtc);
185extern void mga_disable_vblank(struct drm_device *dev, int crtc); 185extern void mga_disable_vblank(struct drm_device *dev, int crtc);
186extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc); 186extern u32 mga_get_vblank_counter(struct drm_device *dev, int crtc);
187extern int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence); 187extern int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence);
188extern int mga_driver_vblank_wait(struct drm_device * dev, unsigned int *sequence); 188extern int mga_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence);
189extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS); 189extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS);
190extern void mga_driver_irq_preinstall(struct drm_device * dev); 190extern void mga_driver_irq_preinstall(struct drm_device *dev);
191extern int mga_driver_irq_postinstall(struct drm_device *dev); 191extern int mga_driver_irq_postinstall(struct drm_device *dev);
192extern void mga_driver_irq_uninstall(struct drm_device * dev); 192extern void mga_driver_irq_uninstall(struct drm_device *dev);
193extern long mga_compat_ioctl(struct file *filp, unsigned int cmd, 193extern long mga_compat_ioctl(struct file *filp, unsigned int cmd,
194 unsigned long arg); 194 unsigned long arg);
195 195
196#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER() 196#define mga_flush_write_combine() DRM_WRITEMEMORYBARRIER()
197 197
198#if defined(__linux__) && defined(__alpha__) 198#if defined(__linux__) && defined(__alpha__)
199#define MGA_BASE( reg ) ((unsigned long)(dev_priv->mmio->handle)) 199#define MGA_BASE(reg) ((unsigned long)(dev_priv->mmio->handle))
200#define MGA_ADDR( reg ) (MGA_BASE(reg) + reg) 200#define MGA_ADDR(reg) (MGA_BASE(reg) + reg)
201 201
202#define MGA_DEREF( reg ) *(volatile u32 *)MGA_ADDR( reg ) 202#define MGA_DEREF(reg) (*(volatile u32 *)MGA_ADDR(reg))
203#define MGA_DEREF8( reg ) *(volatile u8 *)MGA_ADDR( reg ) 203#define MGA_DEREF8(reg) (*(volatile u8 *)MGA_ADDR(reg))
204 204
205#define MGA_READ( reg ) (_MGA_READ((u32 *)MGA_ADDR(reg))) 205#define MGA_READ(reg) (_MGA_READ((u32 *)MGA_ADDR(reg)))
206#define MGA_READ8( reg ) (_MGA_READ((u8 *)MGA_ADDR(reg))) 206#define MGA_READ8(reg) (_MGA_READ((u8 *)MGA_ADDR(reg)))
207#define MGA_WRITE( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0) 207#define MGA_WRITE(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF(reg) = val; } while (0)
208#define MGA_WRITE8( reg, val ) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0) 208#define MGA_WRITE8(reg, val) do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8(reg) = val; } while (0)
209 209
210static inline u32 _MGA_READ(u32 * addr) 210static inline u32 _MGA_READ(u32 *addr)
211{ 211{
212 DRM_MEMORYBARRIER(); 212 DRM_MEMORYBARRIER();
213 return *(volatile u32 *)addr; 213 return *(volatile u32 *)addr;
214} 214}
215#else 215#else
216#define MGA_READ8( reg ) DRM_READ8(dev_priv->mmio, (reg)) 216#define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
217#define MGA_READ( reg ) DRM_READ32(dev_priv->mmio, (reg)) 217#define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
218#define MGA_WRITE8( reg, val ) DRM_WRITE8(dev_priv->mmio, (reg), (val)) 218#define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
219#define MGA_WRITE( reg, val ) DRM_WRITE32(dev_priv->mmio, (reg), (val)) 219#define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
220#endif 220#endif
221 221
222#define DWGREG0 0x1c00 222#define DWGREG0 0x1c00
@@ -233,40 +233,39 @@ static inline u32 _MGA_READ(u32 * addr)
233 * Helper macross... 233 * Helper macross...
234 */ 234 */
235 235
236#define MGA_EMIT_STATE( dev_priv, dirty ) \ 236#define MGA_EMIT_STATE(dev_priv, dirty) \
237do { \ 237do { \
238 if ( (dirty) & ~MGA_UPLOAD_CLIPRECTS ) { \ 238 if ((dirty) & ~MGA_UPLOAD_CLIPRECTS) { \
239 if ( dev_priv->chipset >= MGA_CARD_TYPE_G400 ) { \ 239 if (dev_priv->chipset >= MGA_CARD_TYPE_G400) \
240 mga_g400_emit_state( dev_priv ); \ 240 mga_g400_emit_state(dev_priv); \
241 } else { \ 241 else \
242 mga_g200_emit_state( dev_priv ); \ 242 mga_g200_emit_state(dev_priv); \
243 } \
244 } \ 243 } \
245} while (0) 244} while (0)
246 245
247#define WRAP_TEST_WITH_RETURN( dev_priv ) \ 246#define WRAP_TEST_WITH_RETURN(dev_priv) \
248do { \ 247do { \
249 if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 248 if (test_bit(0, &dev_priv->prim.wrapped)) { \
250 if ( mga_is_idle( dev_priv ) ) { \ 249 if (mga_is_idle(dev_priv)) { \
251 mga_do_dma_wrap_end( dev_priv ); \ 250 mga_do_dma_wrap_end(dev_priv); \
252 } else if ( dev_priv->prim.space < \ 251 } else if (dev_priv->prim.space < \
253 dev_priv->prim.high_mark ) { \ 252 dev_priv->prim.high_mark) { \
254 if ( MGA_DMA_DEBUG ) \ 253 if (MGA_DMA_DEBUG) \
255 DRM_INFO( "wrap...\n"); \ 254 DRM_INFO("wrap...\n"); \
256 return -EBUSY; \ 255 return -EBUSY; \
257 } \ 256 } \
258 } \ 257 } \
259} while (0) 258} while (0)
260 259
261#define WRAP_WAIT_WITH_RETURN( dev_priv ) \ 260#define WRAP_WAIT_WITH_RETURN(dev_priv) \
262do { \ 261do { \
263 if ( test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 262 if (test_bit(0, &dev_priv->prim.wrapped)) { \
264 if ( mga_do_wait_for_idle( dev_priv ) < 0 ) { \ 263 if (mga_do_wait_for_idle(dev_priv) < 0) { \
265 if ( MGA_DMA_DEBUG ) \ 264 if (MGA_DMA_DEBUG) \
266 DRM_INFO( "wrap...\n"); \ 265 DRM_INFO("wrap...\n"); \
267 return -EBUSY; \ 266 return -EBUSY; \
268 } \ 267 } \
269 mga_do_dma_wrap_end( dev_priv ); \ 268 mga_do_dma_wrap_end(dev_priv); \
270 } \ 269 } \
271} while (0) 270} while (0)
272 271
@@ -280,12 +279,12 @@ do { \
280 279
281#define DMA_BLOCK_SIZE (5 * sizeof(u32)) 280#define DMA_BLOCK_SIZE (5 * sizeof(u32))
282 281
283#define BEGIN_DMA( n ) \ 282#define BEGIN_DMA(n) \
284do { \ 283do { \
285 if ( MGA_VERBOSE ) { \ 284 if (MGA_VERBOSE) { \
286 DRM_INFO( "BEGIN_DMA( %d )\n", (n) ); \ 285 DRM_INFO("BEGIN_DMA(%d)\n", (n)); \
287 DRM_INFO( " space=0x%x req=0x%Zx\n", \ 286 DRM_INFO(" space=0x%x req=0x%Zx\n", \
288 dev_priv->prim.space, (n) * DMA_BLOCK_SIZE ); \ 287 dev_priv->prim.space, (n) * DMA_BLOCK_SIZE); \
289 } \ 288 } \
290 prim = dev_priv->prim.start; \ 289 prim = dev_priv->prim.start; \
291 write = dev_priv->prim.tail; \ 290 write = dev_priv->prim.tail; \
@@ -293,9 +292,9 @@ do { \
293 292
294#define BEGIN_DMA_WRAP() \ 293#define BEGIN_DMA_WRAP() \
295do { \ 294do { \
296 if ( MGA_VERBOSE ) { \ 295 if (MGA_VERBOSE) { \
297 DRM_INFO( "BEGIN_DMA()\n" ); \ 296 DRM_INFO("BEGIN_DMA()\n"); \
298 DRM_INFO( " space=0x%x\n", dev_priv->prim.space ); \ 297 DRM_INFO(" space=0x%x\n", dev_priv->prim.space); \
299 } \ 298 } \
300 prim = dev_priv->prim.start; \ 299 prim = dev_priv->prim.start; \
301 write = dev_priv->prim.tail; \ 300 write = dev_priv->prim.tail; \
@@ -304,72 +303,68 @@ do { \
304#define ADVANCE_DMA() \ 303#define ADVANCE_DMA() \
305do { \ 304do { \
306 dev_priv->prim.tail = write; \ 305 dev_priv->prim.tail = write; \
307 if ( MGA_VERBOSE ) { \ 306 if (MGA_VERBOSE) \
308 DRM_INFO( "ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \ 307 DRM_INFO("ADVANCE_DMA() tail=0x%05x sp=0x%x\n", \
309 write, dev_priv->prim.space ); \ 308 write, dev_priv->prim.space); \
310 } \
311} while (0) 309} while (0)
312 310
313#define FLUSH_DMA() \ 311#define FLUSH_DMA() \
314do { \ 312do { \
315 if ( 0 ) { \ 313 if (0) { \
316 DRM_INFO( "\n" ); \ 314 DRM_INFO("\n"); \
317 DRM_INFO( " tail=0x%06x head=0x%06lx\n", \ 315 DRM_INFO(" tail=0x%06x head=0x%06lx\n", \
318 dev_priv->prim.tail, \ 316 dev_priv->prim.tail, \
319 (unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \ 317 (unsigned long)(MGA_READ(MGA_PRIMADDRESS) - \
320 dev_priv->primary->offset)); \ 318 dev_priv->primary->offset)); \
321 } \ 319 } \
322 if ( !test_bit( 0, &dev_priv->prim.wrapped ) ) { \ 320 if (!test_bit(0, &dev_priv->prim.wrapped)) { \
323 if ( dev_priv->prim.space < \ 321 if (dev_priv->prim.space < dev_priv->prim.high_mark) \
324 dev_priv->prim.high_mark ) { \ 322 mga_do_dma_wrap_start(dev_priv); \
325 mga_do_dma_wrap_start( dev_priv ); \ 323 else \
326 } else { \ 324 mga_do_dma_flush(dev_priv); \
327 mga_do_dma_flush( dev_priv ); \
328 } \
329 } \ 325 } \
330} while (0) 326} while (0)
331 327
332/* Never use this, always use DMA_BLOCK(...) for primary DMA output. 328/* Never use this, always use DMA_BLOCK(...) for primary DMA output.
333 */ 329 */
334#define DMA_WRITE( offset, val ) \ 330#define DMA_WRITE(offset, val) \
335do { \ 331do { \
336 if ( MGA_VERBOSE ) { \ 332 if (MGA_VERBOSE) \
337 DRM_INFO( " DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \ 333 DRM_INFO(" DMA_WRITE( 0x%08x ) at 0x%04Zx\n", \
338 (u32)(val), write + (offset) * sizeof(u32) ); \ 334 (u32)(val), write + (offset) * sizeof(u32)); \
339 } \
340 *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \ 335 *(volatile u32 *)(prim + write + (offset) * sizeof(u32)) = val; \
341} while (0) 336} while (0)
342 337
343#define DMA_BLOCK( reg0, val0, reg1, val1, reg2, val2, reg3, val3 ) \ 338#define DMA_BLOCK(reg0, val0, reg1, val1, reg2, val2, reg3, val3) \
344do { \ 339do { \
345 DMA_WRITE( 0, ((DMAREG( reg0 ) << 0) | \ 340 DMA_WRITE(0, ((DMAREG(reg0) << 0) | \
346 (DMAREG( reg1 ) << 8) | \ 341 (DMAREG(reg1) << 8) | \
347 (DMAREG( reg2 ) << 16) | \ 342 (DMAREG(reg2) << 16) | \
348 (DMAREG( reg3 ) << 24)) ); \ 343 (DMAREG(reg3) << 24))); \
349 DMA_WRITE( 1, val0 ); \ 344 DMA_WRITE(1, val0); \
350 DMA_WRITE( 2, val1 ); \ 345 DMA_WRITE(2, val1); \
351 DMA_WRITE( 3, val2 ); \ 346 DMA_WRITE(3, val2); \
352 DMA_WRITE( 4, val3 ); \ 347 DMA_WRITE(4, val3); \
353 write += DMA_BLOCK_SIZE; \ 348 write += DMA_BLOCK_SIZE; \
354} while (0) 349} while (0)
355 350
356/* Buffer aging via primary DMA stream head pointer. 351/* Buffer aging via primary DMA stream head pointer.
357 */ 352 */
358 353
359#define SET_AGE( age, h, w ) \ 354#define SET_AGE(age, h, w) \
360do { \ 355do { \
361 (age)->head = h; \ 356 (age)->head = h; \
362 (age)->wrap = w; \ 357 (age)->wrap = w; \
363} while (0) 358} while (0)
364 359
365#define TEST_AGE( age, h, w ) ( (age)->wrap < w || \ 360#define TEST_AGE(age, h, w) ((age)->wrap < w || \
366 ( (age)->wrap == w && \ 361 ((age)->wrap == w && \
367 (age)->head < h ) ) 362 (age)->head < h))
368 363
369#define AGE_BUFFER( buf_priv ) \ 364#define AGE_BUFFER(buf_priv) \
370do { \ 365do { \
371 drm_mga_freelist_t *entry = (buf_priv)->list_entry; \ 366 drm_mga_freelist_t *entry = (buf_priv)->list_entry; \
372 if ( (buf_priv)->dispatched ) { \ 367 if ((buf_priv)->dispatched) { \
373 entry->age.head = (dev_priv->prim.tail + \ 368 entry->age.head = (dev_priv->prim.tail + \
374 dev_priv->primary->offset); \ 369 dev_priv->primary->offset); \
375 entry->age.wrap = dev_priv->sarea_priv->last_wrap; \ 370 entry->age.wrap = dev_priv->sarea_priv->last_wrap; \
@@ -681,7 +676,7 @@ do { \
681 676
682/* Simple idle test. 677/* Simple idle test.
683 */ 678 */
684static __inline__ int mga_is_idle(drm_mga_private_t * dev_priv) 679static __inline__ int mga_is_idle(drm_mga_private_t *dev_priv)
685{ 680{
686 u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK; 681 u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
687 return (status == MGA_ENDPRDMASTS); 682 return (status == MGA_ENDPRDMASTS);
diff --git a/drivers/gpu/drm/mga/mga_irq.c b/drivers/gpu/drm/mga/mga_irq.c
index daa6041a483a..2581202297e4 100644
--- a/drivers/gpu/drm/mga/mga_irq.c
+++ b/drivers/gpu/drm/mga/mga_irq.c
@@ -76,9 +76,8 @@ irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
76 /* In addition to clearing the interrupt-pending bit, we 76 /* In addition to clearing the interrupt-pending bit, we
77 * have to write to MGA_PRIMEND to re-start the DMA operation. 77 * have to write to MGA_PRIMEND to re-start the DMA operation.
78 */ 78 */
79 if ((prim_start & ~0x03) != (prim_end & ~0x03)) { 79 if ((prim_start & ~0x03) != (prim_end & ~0x03))
80 MGA_WRITE(MGA_PRIMEND, prim_end); 80 MGA_WRITE(MGA_PRIMEND, prim_end);
81 }
82 81
83 atomic_inc(&dev_priv->last_fence_retired); 82 atomic_inc(&dev_priv->last_fence_retired);
84 DRM_WAKEUP(&dev_priv->fence_queue); 83 DRM_WAKEUP(&dev_priv->fence_queue);
@@ -120,7 +119,7 @@ void mga_disable_vblank(struct drm_device *dev, int crtc)
120 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */ 119 /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
121} 120}
122 121
123int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence) 122int mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
124{ 123{
125 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 124 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
126 unsigned int cur_fence; 125 unsigned int cur_fence;
@@ -139,7 +138,7 @@ int mga_driver_fence_wait(struct drm_device * dev, unsigned int *sequence)
139 return ret; 138 return ret;
140} 139}
141 140
142void mga_driver_irq_preinstall(struct drm_device * dev) 141void mga_driver_irq_preinstall(struct drm_device *dev)
143{ 142{
144 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 143 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
145 144
@@ -162,7 +161,7 @@ int mga_driver_irq_postinstall(struct drm_device *dev)
162 return 0; 161 return 0;
163} 162}
164 163
165void mga_driver_irq_uninstall(struct drm_device * dev) 164void mga_driver_irq_uninstall(struct drm_device *dev)
166{ 165{
167 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; 166 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
168 if (!dev_priv) 167 if (!dev_priv)
diff --git a/drivers/gpu/drm/mga/mga_state.c b/drivers/gpu/drm/mga/mga_state.c
index a53b848e0f17..fff82045c427 100644
--- a/drivers/gpu/drm/mga/mga_state.c
+++ b/drivers/gpu/drm/mga/mga_state.c
@@ -41,8 +41,8 @@
41 * DMA hardware state programming functions 41 * DMA hardware state programming functions
42 */ 42 */
43 43
44static void mga_emit_clip_rect(drm_mga_private_t * dev_priv, 44static void mga_emit_clip_rect(drm_mga_private_t *dev_priv,
45 struct drm_clip_rect * box) 45 struct drm_clip_rect *box)
46{ 46{
47 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 47 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
48 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 48 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -66,7 +66,7 @@ static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
66 ADVANCE_DMA(); 66 ADVANCE_DMA();
67} 67}
68 68
69static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv) 69static __inline__ void mga_g200_emit_context(drm_mga_private_t *dev_priv)
70{ 70{
71 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 71 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
72 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 72 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -89,7 +89,7 @@ static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
89 ADVANCE_DMA(); 89 ADVANCE_DMA();
90} 90}
91 91
92static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv) 92static __inline__ void mga_g400_emit_context(drm_mga_private_t *dev_priv)
93{ 93{
94 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 94 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
95 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 95 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -116,7 +116,7 @@ static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv)
116 ADVANCE_DMA(); 116 ADVANCE_DMA();
117} 117}
118 118
119static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv) 119static __inline__ void mga_g200_emit_tex0(drm_mga_private_t *dev_priv)
120{ 120{
121 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 121 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
122 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; 122 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
@@ -144,7 +144,7 @@ static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv)
144 ADVANCE_DMA(); 144 ADVANCE_DMA();
145} 145}
146 146
147static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv) 147static __inline__ void mga_g400_emit_tex0(drm_mga_private_t *dev_priv)
148{ 148{
149 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 149 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
150 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0]; 150 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
@@ -184,7 +184,7 @@ static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv)
184 ADVANCE_DMA(); 184 ADVANCE_DMA();
185} 185}
186 186
187static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv) 187static __inline__ void mga_g400_emit_tex1(drm_mga_private_t *dev_priv)
188{ 188{
189 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 189 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
190 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1]; 190 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
@@ -223,7 +223,7 @@ static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv)
223 ADVANCE_DMA(); 223 ADVANCE_DMA();
224} 224}
225 225
226static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv) 226static __inline__ void mga_g200_emit_pipe(drm_mga_private_t *dev_priv)
227{ 227{
228 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 228 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
229 unsigned int pipe = sarea_priv->warp_pipe; 229 unsigned int pipe = sarea_priv->warp_pipe;
@@ -250,7 +250,7 @@ static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv)
250 ADVANCE_DMA(); 250 ADVANCE_DMA();
251} 251}
252 252
253static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv) 253static __inline__ void mga_g400_emit_pipe(drm_mga_private_t *dev_priv)
254{ 254{
255 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 255 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
256 unsigned int pipe = sarea_priv->warp_pipe; 256 unsigned int pipe = sarea_priv->warp_pipe;
@@ -327,7 +327,7 @@ static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv)
327 ADVANCE_DMA(); 327 ADVANCE_DMA();
328} 328}
329 329
330static void mga_g200_emit_state(drm_mga_private_t * dev_priv) 330static void mga_g200_emit_state(drm_mga_private_t *dev_priv)
331{ 331{
332 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 332 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
333 unsigned int dirty = sarea_priv->dirty; 333 unsigned int dirty = sarea_priv->dirty;
@@ -348,7 +348,7 @@ static void mga_g200_emit_state(drm_mga_private_t * dev_priv)
348 } 348 }
349} 349}
350 350
351static void mga_g400_emit_state(drm_mga_private_t * dev_priv) 351static void mga_g400_emit_state(drm_mga_private_t *dev_priv)
352{ 352{
353 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 353 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
354 unsigned int dirty = sarea_priv->dirty; 354 unsigned int dirty = sarea_priv->dirty;
@@ -381,7 +381,7 @@ static void mga_g400_emit_state(drm_mga_private_t * dev_priv)
381 381
382/* Disallow all write destinations except the front and backbuffer. 382/* Disallow all write destinations except the front and backbuffer.
383 */ 383 */
384static int mga_verify_context(drm_mga_private_t * dev_priv) 384static int mga_verify_context(drm_mga_private_t *dev_priv)
385{ 385{
386 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 386 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
387 drm_mga_context_regs_t *ctx = &sarea_priv->context_state; 387 drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
@@ -400,7 +400,7 @@ static int mga_verify_context(drm_mga_private_t * dev_priv)
400 400
401/* Disallow texture reads from PCI space. 401/* Disallow texture reads from PCI space.
402 */ 402 */
403static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit) 403static int mga_verify_tex(drm_mga_private_t *dev_priv, int unit)
404{ 404{
405 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 405 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
406 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit]; 406 drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
@@ -417,7 +417,7 @@ static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit)
417 return 0; 417 return 0;
418} 418}
419 419
420static int mga_verify_state(drm_mga_private_t * dev_priv) 420static int mga_verify_state(drm_mga_private_t *dev_priv)
421{ 421{
422 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 422 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
423 unsigned int dirty = sarea_priv->dirty; 423 unsigned int dirty = sarea_priv->dirty;
@@ -446,7 +446,7 @@ static int mga_verify_state(drm_mga_private_t * dev_priv)
446 return (ret == 0); 446 return (ret == 0);
447} 447}
448 448
449static int mga_verify_iload(drm_mga_private_t * dev_priv, 449static int mga_verify_iload(drm_mga_private_t *dev_priv,
450 unsigned int dstorg, unsigned int length) 450 unsigned int dstorg, unsigned int length)
451{ 451{
452 if (dstorg < dev_priv->texture_offset || 452 if (dstorg < dev_priv->texture_offset ||
@@ -465,7 +465,7 @@ static int mga_verify_iload(drm_mga_private_t * dev_priv,
465 return 0; 465 return 0;
466} 466}
467 467
468static int mga_verify_blit(drm_mga_private_t * dev_priv, 468static int mga_verify_blit(drm_mga_private_t *dev_priv,
469 unsigned int srcorg, unsigned int dstorg) 469 unsigned int srcorg, unsigned int dstorg)
470{ 470{
471 if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) || 471 if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
@@ -480,7 +480,7 @@ static int mga_verify_blit(drm_mga_private_t * dev_priv,
480 * 480 *
481 */ 481 */
482 482
483static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * clear) 483static void mga_dma_dispatch_clear(struct drm_device *dev, drm_mga_clear_t *clear)
484{ 484{
485 drm_mga_private_t *dev_priv = dev->dev_private; 485 drm_mga_private_t *dev_priv = dev->dev_private;
486 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 486 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -568,7 +568,7 @@ static void mga_dma_dispatch_clear(struct drm_device * dev, drm_mga_clear_t * cl
568 FLUSH_DMA(); 568 FLUSH_DMA();
569} 569}
570 570
571static void mga_dma_dispatch_swap(struct drm_device * dev) 571static void mga_dma_dispatch_swap(struct drm_device *dev)
572{ 572{
573 drm_mga_private_t *dev_priv = dev->dev_private; 573 drm_mga_private_t *dev_priv = dev->dev_private;
574 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 574 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -622,7 +622,7 @@ static void mga_dma_dispatch_swap(struct drm_device * dev)
622 DRM_DEBUG("... done.\n"); 622 DRM_DEBUG("... done.\n");
623} 623}
624 624
625static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) 625static void mga_dma_dispatch_vertex(struct drm_device *dev, struct drm_buf *buf)
626{ 626{
627 drm_mga_private_t *dev_priv = dev->dev_private; 627 drm_mga_private_t *dev_priv = dev->dev_private;
628 drm_mga_buf_priv_t *buf_priv = buf->dev_private; 628 drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -669,7 +669,7 @@ static void mga_dma_dispatch_vertex(struct drm_device * dev, struct drm_buf * bu
669 FLUSH_DMA(); 669 FLUSH_DMA();
670} 670}
671 671
672static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * buf, 672static void mga_dma_dispatch_indices(struct drm_device *dev, struct drm_buf *buf,
673 unsigned int start, unsigned int end) 673 unsigned int start, unsigned int end)
674{ 674{
675 drm_mga_private_t *dev_priv = dev->dev_private; 675 drm_mga_private_t *dev_priv = dev->dev_private;
@@ -718,7 +718,7 @@ static void mga_dma_dispatch_indices(struct drm_device * dev, struct drm_buf * b
718/* This copies a 64 byte aligned agp region to the frambuffer with a 718/* This copies a 64 byte aligned agp region to the frambuffer with a
719 * standard blit, the ioctl needs to do checking. 719 * standard blit, the ioctl needs to do checking.
720 */ 720 */
721static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf, 721static void mga_dma_dispatch_iload(struct drm_device *dev, struct drm_buf *buf,
722 unsigned int dstorg, unsigned int length) 722 unsigned int dstorg, unsigned int length)
723{ 723{
724 drm_mga_private_t *dev_priv = dev->dev_private; 724 drm_mga_private_t *dev_priv = dev->dev_private;
@@ -766,7 +766,7 @@ static void mga_dma_dispatch_iload(struct drm_device * dev, struct drm_buf * buf
766 FLUSH_DMA(); 766 FLUSH_DMA();
767} 767}
768 768
769static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit) 769static void mga_dma_dispatch_blit(struct drm_device *dev, drm_mga_blit_t *blit)
770{ 770{
771 drm_mga_private_t *dev_priv = dev->dev_private; 771 drm_mga_private_t *dev_priv = dev->dev_private;
772 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; 772 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -801,9 +801,8 @@ static void mga_dma_dispatch_blit(struct drm_device * dev, drm_mga_blit_t * blit
801 int w = pbox[i].x2 - pbox[i].x1 - 1; 801 int w = pbox[i].x2 - pbox[i].x1 - 1;
802 int start; 802 int start;
803 803
804 if (blit->ydir == -1) { 804 if (blit->ydir == -1)
805 srcy = blit->height - srcy - 1; 805 srcy = blit->height - srcy - 1;
806 }
807 806
808 start = srcy * blit->src_pitch + srcx; 807 start = srcy * blit->src_pitch + srcx;
809 808
diff --git a/drivers/gpu/drm/mga/mga_warp.c b/drivers/gpu/drm/mga/mga_warp.c
index 9aad4847afdf..f172bd5c257f 100644
--- a/drivers/gpu/drm/mga/mga_warp.c
+++ b/drivers/gpu/drm/mga/mga_warp.c
@@ -46,7 +46,7 @@ MODULE_FIRMWARE(FIRMWARE_G400);
46 46
47#define WARP_UCODE_SIZE(size) ALIGN(size, MGA_WARP_CODE_ALIGN) 47#define WARP_UCODE_SIZE(size) ALIGN(size, MGA_WARP_CODE_ALIGN)
48 48
49int mga_warp_install_microcode(drm_mga_private_t * dev_priv) 49int mga_warp_install_microcode(drm_mga_private_t *dev_priv)
50{ 50{
51 unsigned char *vcbase = dev_priv->warp->handle; 51 unsigned char *vcbase = dev_priv->warp->handle;
52 unsigned long pcbase = dev_priv->warp->offset; 52 unsigned long pcbase = dev_priv->warp->offset;
@@ -133,7 +133,7 @@ out:
133 133
134#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE) 134#define WMISC_EXPECTED (MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
135 135
136int mga_warp_init(drm_mga_private_t * dev_priv) 136int mga_warp_init(drm_mga_private_t *dev_priv)
137{ 137{
138 u32 wmisc; 138 u32 wmisc;
139 139
diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
index b6f5239c2efb..d2d28048efb2 100644
--- a/drivers/gpu/drm/nouveau/Kconfig
+++ b/drivers/gpu/drm/nouveau/Kconfig
@@ -41,4 +41,13 @@ config DRM_I2C_CH7006
41 41
42 This driver is currently only useful if you're also using 42 This driver is currently only useful if you're also using
43 the nouveau driver. 43 the nouveau driver.
44
45config DRM_I2C_SIL164
46 tristate "Silicon Image sil164 TMDS transmitter"
47 default m if DRM_NOUVEAU
48 help
49 Support for sil164 and similar single-link (or dual-link
50 when used in pairs) TMDS transmitters, used in some nVidia
51 video cards.
52
44endmenu 53endmenu
diff --git a/drivers/gpu/drm/r128/r128_cce.c b/drivers/gpu/drm/r128/r128_cce.c
index e671d0e74d4c..570e190710bd 100644
--- a/drivers/gpu/drm/r128/r128_cce.c
+++ b/drivers/gpu/drm/r128/r128_cce.c
@@ -44,7 +44,7 @@
44 44
45MODULE_FIRMWARE(FIRMWARE_NAME); 45MODULE_FIRMWARE(FIRMWARE_NAME);
46 46
47static int R128_READ_PLL(struct drm_device * dev, int addr) 47static int R128_READ_PLL(struct drm_device *dev, int addr)
48{ 48{
49 drm_r128_private_t *dev_priv = dev->dev_private; 49 drm_r128_private_t *dev_priv = dev->dev_private;
50 50
@@ -53,7 +53,7 @@ static int R128_READ_PLL(struct drm_device * dev, int addr)
53} 53}
54 54
55#if R128_FIFO_DEBUG 55#if R128_FIFO_DEBUG
56static void r128_status(drm_r128_private_t * dev_priv) 56static void r128_status(drm_r128_private_t *dev_priv)
57{ 57{
58 printk("GUI_STAT = 0x%08x\n", 58 printk("GUI_STAT = 0x%08x\n",
59 (unsigned int)R128_READ(R128_GUI_STAT)); 59 (unsigned int)R128_READ(R128_GUI_STAT));
@@ -74,7 +74,7 @@ static void r128_status(drm_r128_private_t * dev_priv)
74 * Engine, FIFO control 74 * Engine, FIFO control
75 */ 75 */
76 76
77static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) 77static int r128_do_pixcache_flush(drm_r128_private_t *dev_priv)
78{ 78{
79 u32 tmp; 79 u32 tmp;
80 int i; 80 int i;
@@ -83,9 +83,8 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
83 R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp); 83 R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp);
84 84
85 for (i = 0; i < dev_priv->usec_timeout; i++) { 85 for (i = 0; i < dev_priv->usec_timeout; i++) {
86 if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) { 86 if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY))
87 return 0; 87 return 0;
88 }
89 DRM_UDELAY(1); 88 DRM_UDELAY(1);
90 } 89 }
91 90
@@ -95,7 +94,7 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
95 return -EBUSY; 94 return -EBUSY;
96} 95}
97 96
98static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries) 97static int r128_do_wait_for_fifo(drm_r128_private_t *dev_priv, int entries)
99{ 98{
100 int i; 99 int i;
101 100
@@ -112,7 +111,7 @@ static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries)
112 return -EBUSY; 111 return -EBUSY;
113} 112}
114 113
115static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv) 114static int r128_do_wait_for_idle(drm_r128_private_t *dev_priv)
116{ 115{
117 int i, ret; 116 int i, ret;
118 117
@@ -189,7 +188,7 @@ out_release:
189 * prior to a wait for idle, as it informs the engine that the command 188 * prior to a wait for idle, as it informs the engine that the command
190 * stream is ending. 189 * stream is ending.
191 */ 190 */
192static void r128_do_cce_flush(drm_r128_private_t * dev_priv) 191static void r128_do_cce_flush(drm_r128_private_t *dev_priv)
193{ 192{
194 u32 tmp; 193 u32 tmp;
195 194
@@ -199,7 +198,7 @@ static void r128_do_cce_flush(drm_r128_private_t * dev_priv)
199 198
200/* Wait for the CCE to go idle. 199/* Wait for the CCE to go idle.
201 */ 200 */
202int r128_do_cce_idle(drm_r128_private_t * dev_priv) 201int r128_do_cce_idle(drm_r128_private_t *dev_priv)
203{ 202{
204 int i; 203 int i;
205 204
@@ -225,7 +224,7 @@ int r128_do_cce_idle(drm_r128_private_t * dev_priv)
225 224
226/* Start the Concurrent Command Engine. 225/* Start the Concurrent Command Engine.
227 */ 226 */
228static void r128_do_cce_start(drm_r128_private_t * dev_priv) 227static void r128_do_cce_start(drm_r128_private_t *dev_priv)
229{ 228{
230 r128_do_wait_for_idle(dev_priv); 229 r128_do_wait_for_idle(dev_priv);
231 230
@@ -242,7 +241,7 @@ static void r128_do_cce_start(drm_r128_private_t * dev_priv)
242 * commands, so you must wait for the CCE command stream to complete 241 * commands, so you must wait for the CCE command stream to complete
243 * before calling this routine. 242 * before calling this routine.
244 */ 243 */
245static void r128_do_cce_reset(drm_r128_private_t * dev_priv) 244static void r128_do_cce_reset(drm_r128_private_t *dev_priv)
246{ 245{
247 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0); 246 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
248 R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0); 247 R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
@@ -253,7 +252,7 @@ static void r128_do_cce_reset(drm_r128_private_t * dev_priv)
253 * commands, so you must flush the command stream and wait for the CCE 252 * commands, so you must flush the command stream and wait for the CCE
254 * to go idle before calling this routine. 253 * to go idle before calling this routine.
255 */ 254 */
256static void r128_do_cce_stop(drm_r128_private_t * dev_priv) 255static void r128_do_cce_stop(drm_r128_private_t *dev_priv)
257{ 256{
258 R128_WRITE(R128_PM4_MICRO_CNTL, 0); 257 R128_WRITE(R128_PM4_MICRO_CNTL, 0);
259 R128_WRITE(R128_PM4_BUFFER_CNTL, 258 R128_WRITE(R128_PM4_BUFFER_CNTL,
@@ -264,7 +263,7 @@ static void r128_do_cce_stop(drm_r128_private_t * dev_priv)
264 263
265/* Reset the engine. This will stop the CCE if it is running. 264/* Reset the engine. This will stop the CCE if it is running.
266 */ 265 */
267static int r128_do_engine_reset(struct drm_device * dev) 266static int r128_do_engine_reset(struct drm_device *dev)
268{ 267{
269 drm_r128_private_t *dev_priv = dev->dev_private; 268 drm_r128_private_t *dev_priv = dev->dev_private;
270 u32 clock_cntl_index, mclk_cntl, gen_reset_cntl; 269 u32 clock_cntl_index, mclk_cntl, gen_reset_cntl;
@@ -301,8 +300,8 @@ static int r128_do_engine_reset(struct drm_device * dev)
301 return 0; 300 return 0;
302} 301}
303 302
304static void r128_cce_init_ring_buffer(struct drm_device * dev, 303static void r128_cce_init_ring_buffer(struct drm_device *dev,
305 drm_r128_private_t * dev_priv) 304 drm_r128_private_t *dev_priv)
306{ 305{
307 u32 ring_start; 306 u32 ring_start;
308 u32 tmp; 307 u32 tmp;
@@ -340,7 +339,7 @@ static void r128_cce_init_ring_buffer(struct drm_device * dev,
340 R128_WRITE(R128_BUS_CNTL, tmp); 339 R128_WRITE(R128_BUS_CNTL, tmp);
341} 340}
342 341
343static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init) 342static int r128_do_init_cce(struct drm_device *dev, drm_r128_init_t *init)
344{ 343{
345 drm_r128_private_t *dev_priv; 344 drm_r128_private_t *dev_priv;
346 int rc; 345 int rc;
@@ -588,7 +587,7 @@ static int r128_do_init_cce(struct drm_device * dev, drm_r128_init_t * init)
588 return rc; 587 return rc;
589} 588}
590 589
591int r128_do_cleanup_cce(struct drm_device * dev) 590int r128_do_cleanup_cce(struct drm_device *dev)
592{ 591{
593 592
594 /* Make sure interrupts are disabled here because the uninstall ioctl 593 /* Make sure interrupts are disabled here because the uninstall ioctl
@@ -682,9 +681,8 @@ int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv
682 /* Flush any pending CCE commands. This ensures any outstanding 681 /* Flush any pending CCE commands. This ensures any outstanding
683 * commands are exectuted by the engine before we turn it off. 682 * commands are exectuted by the engine before we turn it off.
684 */ 683 */
685 if (stop->flush) { 684 if (stop->flush)
686 r128_do_cce_flush(dev_priv); 685 r128_do_cce_flush(dev_priv);
687 }
688 686
689 /* If we fail to make the engine go idle, we return an error 687 /* If we fail to make the engine go idle, we return an error
690 * code so that the DRM ioctl wrapper can try again. 688 * code so that the DRM ioctl wrapper can try again.
@@ -735,9 +733,8 @@ int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv
735 733
736 DEV_INIT_TEST_WITH_RETURN(dev_priv); 734 DEV_INIT_TEST_WITH_RETURN(dev_priv);
737 735
738 if (dev_priv->cce_running) { 736 if (dev_priv->cce_running)
739 r128_do_cce_flush(dev_priv); 737 r128_do_cce_flush(dev_priv);
740 }
741 738
742 return r128_do_cce_idle(dev_priv); 739 return r128_do_cce_idle(dev_priv);
743} 740}
@@ -765,7 +762,7 @@ int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_pr
765#define R128_BUFFER_FREE 0 762#define R128_BUFFER_FREE 0
766 763
767#if 0 764#if 0
768static int r128_freelist_init(struct drm_device * dev) 765static int r128_freelist_init(struct drm_device *dev)
769{ 766{
770 struct drm_device_dma *dma = dev->dma; 767 struct drm_device_dma *dma = dev->dma;
771 drm_r128_private_t *dev_priv = dev->dev_private; 768 drm_r128_private_t *dev_priv = dev->dev_private;
@@ -848,7 +845,7 @@ static struct drm_buf *r128_freelist_get(struct drm_device * dev)
848 return NULL; 845 return NULL;
849} 846}
850 847
851void r128_freelist_reset(struct drm_device * dev) 848void r128_freelist_reset(struct drm_device *dev)
852{ 849{
853 struct drm_device_dma *dma = dev->dma; 850 struct drm_device_dma *dma = dev->dma;
854 int i; 851 int i;
@@ -864,7 +861,7 @@ void r128_freelist_reset(struct drm_device * dev)
864 * CCE command submission 861 * CCE command submission
865 */ 862 */
866 863
867int r128_wait_ring(drm_r128_private_t * dev_priv, int n) 864int r128_wait_ring(drm_r128_private_t *dev_priv, int n)
868{ 865{
869 drm_r128_ring_buffer_t *ring = &dev_priv->ring; 866 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
870 int i; 867 int i;
@@ -881,9 +878,9 @@ int r128_wait_ring(drm_r128_private_t * dev_priv, int n)
881 return -EBUSY; 878 return -EBUSY;
882} 879}
883 880
884static int r128_cce_get_buffers(struct drm_device * dev, 881static int r128_cce_get_buffers(struct drm_device *dev,
885 struct drm_file *file_priv, 882 struct drm_file *file_priv,
886 struct drm_dma * d) 883 struct drm_dma *d)
887{ 884{
888 int i; 885 int i;
889 struct drm_buf *buf; 886 struct drm_buf *buf;
@@ -933,9 +930,8 @@ int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_p
933 930
934 d->granted_count = 0; 931 d->granted_count = 0;
935 932
936 if (d->request_count) { 933 if (d->request_count)
937 ret = r128_cce_get_buffers(dev, file_priv, d); 934 ret = r128_cce_get_buffers(dev, file_priv, d);
938 }
939 935
940 return ret; 936 return ret;
941} 937}
diff --git a/drivers/gpu/drm/r128/r128_drv.c b/drivers/gpu/drm/r128/r128_drv.c
index b806fdcc7170..1e2971f13aa1 100644
--- a/drivers/gpu/drm/r128/r128_drv.c
+++ b/drivers/gpu/drm/r128/r128_drv.c
@@ -85,7 +85,7 @@ static struct drm_driver driver = {
85 .patchlevel = DRIVER_PATCHLEVEL, 85 .patchlevel = DRIVER_PATCHLEVEL,
86}; 86};
87 87
88int r128_driver_load(struct drm_device * dev, unsigned long flags) 88int r128_driver_load(struct drm_device *dev, unsigned long flags)
89{ 89{
90 return drm_vblank_init(dev, 1); 90 return drm_vblank_init(dev, 1);
91} 91}
diff --git a/drivers/gpu/drm/r128/r128_drv.h b/drivers/gpu/drm/r128/r128_drv.h
index 3c60829d82e9..930c71b2fb5e 100644
--- a/drivers/gpu/drm/r128/r128_drv.h
+++ b/drivers/gpu/drm/r128/r128_drv.h
@@ -53,7 +53,7 @@
53#define DRIVER_MINOR 5 53#define DRIVER_MINOR 5
54#define DRIVER_PATCHLEVEL 0 54#define DRIVER_PATCHLEVEL 0
55 55
56#define GET_RING_HEAD(dev_priv) R128_READ( R128_PM4_BUFFER_DL_RPTR ) 56#define GET_RING_HEAD(dev_priv) R128_READ(R128_PM4_BUFFER_DL_RPTR)
57 57
58typedef struct drm_r128_freelist { 58typedef struct drm_r128_freelist {
59 unsigned int age; 59 unsigned int age;
@@ -144,23 +144,23 @@ extern int r128_engine_reset(struct drm_device *dev, void *data, struct drm_file
144extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv); 144extern int r128_fullscreen(struct drm_device *dev, void *data, struct drm_file *file_priv);
145extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv); 145extern int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_priv);
146 146
147extern void r128_freelist_reset(struct drm_device * dev); 147extern void r128_freelist_reset(struct drm_device *dev);
148 148
149extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n); 149extern int r128_wait_ring(drm_r128_private_t *dev_priv, int n);
150 150
151extern int r128_do_cce_idle(drm_r128_private_t * dev_priv); 151extern int r128_do_cce_idle(drm_r128_private_t *dev_priv);
152extern int r128_do_cleanup_cce(struct drm_device * dev); 152extern int r128_do_cleanup_cce(struct drm_device *dev);
153 153
154extern int r128_enable_vblank(struct drm_device *dev, int crtc); 154extern int r128_enable_vblank(struct drm_device *dev, int crtc);
155extern void r128_disable_vblank(struct drm_device *dev, int crtc); 155extern void r128_disable_vblank(struct drm_device *dev, int crtc);
156extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc); 156extern u32 r128_get_vblank_counter(struct drm_device *dev, int crtc);
157extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS); 157extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS);
158extern void r128_driver_irq_preinstall(struct drm_device * dev); 158extern void r128_driver_irq_preinstall(struct drm_device *dev);
159extern int r128_driver_irq_postinstall(struct drm_device *dev); 159extern int r128_driver_irq_postinstall(struct drm_device *dev);
160extern void r128_driver_irq_uninstall(struct drm_device * dev); 160extern void r128_driver_irq_uninstall(struct drm_device *dev);
161extern void r128_driver_lastclose(struct drm_device * dev); 161extern void r128_driver_lastclose(struct drm_device *dev);
162extern int r128_driver_load(struct drm_device * dev, unsigned long flags); 162extern int r128_driver_load(struct drm_device *dev, unsigned long flags);
163extern void r128_driver_preclose(struct drm_device * dev, 163extern void r128_driver_preclose(struct drm_device *dev,
164 struct drm_file *file_priv); 164 struct drm_file *file_priv);
165 165
166extern long r128_compat_ioctl(struct file *filp, unsigned int cmd, 166extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
@@ -390,27 +390,27 @@ extern long r128_compat_ioctl(struct file *filp, unsigned int cmd,
390 390
391#define R128_PCIGART_TABLE_SIZE 32768 391#define R128_PCIGART_TABLE_SIZE 32768
392 392
393#define R128_READ(reg) DRM_READ32( dev_priv->mmio, (reg) ) 393#define R128_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
394#define R128_WRITE(reg,val) DRM_WRITE32( dev_priv->mmio, (reg), (val) ) 394#define R128_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
395#define R128_READ8(reg) DRM_READ8( dev_priv->mmio, (reg) ) 395#define R128_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
396#define R128_WRITE8(reg,val) DRM_WRITE8( dev_priv->mmio, (reg), (val) ) 396#define R128_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
397 397
398#define R128_WRITE_PLL(addr,val) \ 398#define R128_WRITE_PLL(addr, val) \
399do { \ 399do { \
400 R128_WRITE8(R128_CLOCK_CNTL_INDEX, \ 400 R128_WRITE8(R128_CLOCK_CNTL_INDEX, \
401 ((addr) & 0x1f) | R128_PLL_WR_EN); \ 401 ((addr) & 0x1f) | R128_PLL_WR_EN); \
402 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \ 402 R128_WRITE(R128_CLOCK_CNTL_DATA, (val)); \
403} while (0) 403} while (0)
404 404
405#define CCE_PACKET0( reg, n ) (R128_CCE_PACKET0 | \ 405#define CCE_PACKET0(reg, n) (R128_CCE_PACKET0 | \
406 ((n) << 16) | ((reg) >> 2)) 406 ((n) << 16) | ((reg) >> 2))
407#define CCE_PACKET1( reg0, reg1 ) (R128_CCE_PACKET1 | \ 407#define CCE_PACKET1(reg0, reg1) (R128_CCE_PACKET1 | \
408 (((reg1) >> 2) << 11) | ((reg0) >> 2)) 408 (((reg1) >> 2) << 11) | ((reg0) >> 2))
409#define CCE_PACKET2() (R128_CCE_PACKET2) 409#define CCE_PACKET2() (R128_CCE_PACKET2)
410#define CCE_PACKET3( pkt, n ) (R128_CCE_PACKET3 | \ 410#define CCE_PACKET3(pkt, n) (R128_CCE_PACKET3 | \
411 (pkt) | ((n) << 16)) 411 (pkt) | ((n) << 16))
412 412
413static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv) 413static __inline__ void r128_update_ring_snapshot(drm_r128_private_t *dev_priv)
414{ 414{
415 drm_r128_ring_buffer_t *ring = &dev_priv->ring; 415 drm_r128_ring_buffer_t *ring = &dev_priv->ring;
416 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32); 416 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32);
@@ -430,37 +430,38 @@ do { \
430 } \ 430 } \
431} while (0) 431} while (0)
432 432
433#define RING_SPACE_TEST_WITH_RETURN( dev_priv ) \ 433#define RING_SPACE_TEST_WITH_RETURN(dev_priv) \
434do { \ 434do { \
435 drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \ 435 drm_r128_ring_buffer_t *ring = &dev_priv->ring; int i; \
436 if ( ring->space < ring->high_mark ) { \ 436 if (ring->space < ring->high_mark) { \
437 for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) { \ 437 for (i = 0 ; i < dev_priv->usec_timeout ; i++) { \
438 r128_update_ring_snapshot( dev_priv ); \ 438 r128_update_ring_snapshot(dev_priv); \
439 if ( ring->space >= ring->high_mark ) \ 439 if (ring->space >= ring->high_mark) \
440 goto __ring_space_done; \ 440 goto __ring_space_done; \
441 DRM_UDELAY(1); \ 441 DRM_UDELAY(1); \
442 } \ 442 } \
443 DRM_ERROR( "ring space check failed!\n" ); \ 443 DRM_ERROR("ring space check failed!\n"); \
444 return -EBUSY; \ 444 return -EBUSY; \
445 } \ 445 } \
446 __ring_space_done: \ 446 __ring_space_done: \
447 ; \ 447 ; \
448} while (0) 448} while (0)
449 449
450#define VB_AGE_TEST_WITH_RETURN( dev_priv ) \ 450#define VB_AGE_TEST_WITH_RETURN(dev_priv) \
451do { \ 451do { \
452 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \ 452 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; \
453 if ( sarea_priv->last_dispatch >= R128_MAX_VB_AGE ) { \ 453 if (sarea_priv->last_dispatch >= R128_MAX_VB_AGE) { \
454 int __ret = r128_do_cce_idle( dev_priv ); \ 454 int __ret = r128_do_cce_idle(dev_priv); \
455 if ( __ret ) return __ret; \ 455 if (__ret) \
456 return __ret; \
456 sarea_priv->last_dispatch = 0; \ 457 sarea_priv->last_dispatch = 0; \
457 r128_freelist_reset( dev ); \ 458 r128_freelist_reset(dev); \
458 } \ 459 } \
459} while (0) 460} while (0)
460 461
461#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \ 462#define R128_WAIT_UNTIL_PAGE_FLIPPED() do { \
462 OUT_RING( CCE_PACKET0( R128_WAIT_UNTIL, 0 ) ); \ 463 OUT_RING(CCE_PACKET0(R128_WAIT_UNTIL, 0)); \
463 OUT_RING( R128_EVENT_CRTC_OFFSET ); \ 464 OUT_RING(R128_EVENT_CRTC_OFFSET); \
464} while (0) 465} while (0)
465 466
466/* ================================================================ 467/* ================================================================
@@ -472,13 +473,12 @@ do { \
472#define RING_LOCALS \ 473#define RING_LOCALS \
473 int write, _nr; unsigned int tail_mask; volatile u32 *ring; 474 int write, _nr; unsigned int tail_mask; volatile u32 *ring;
474 475
475#define BEGIN_RING( n ) do { \ 476#define BEGIN_RING(n) do { \
476 if ( R128_VERBOSE ) { \ 477 if (R128_VERBOSE) \
477 DRM_INFO( "BEGIN_RING( %d )\n", (n)); \ 478 DRM_INFO("BEGIN_RING(%d)\n", (n)); \
478 } \ 479 if (dev_priv->ring.space <= (n) * sizeof(u32)) { \
479 if ( dev_priv->ring.space <= (n) * sizeof(u32) ) { \
480 COMMIT_RING(); \ 480 COMMIT_RING(); \
481 r128_wait_ring( dev_priv, (n) * sizeof(u32) ); \ 481 r128_wait_ring(dev_priv, (n) * sizeof(u32)); \
482 } \ 482 } \
483 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \ 483 _nr = n; dev_priv->ring.space -= (n) * sizeof(u32); \
484 ring = dev_priv->ring.start; \ 484 ring = dev_priv->ring.start; \
@@ -494,40 +494,36 @@ do { \
494#define R128_BROKEN_CCE 1 494#define R128_BROKEN_CCE 1
495 495
496#define ADVANCE_RING() do { \ 496#define ADVANCE_RING() do { \
497 if ( R128_VERBOSE ) { \ 497 if (R128_VERBOSE) \
498 DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \ 498 DRM_INFO("ADVANCE_RING() wr=0x%06x tail=0x%06x\n", \
499 write, dev_priv->ring.tail ); \ 499 write, dev_priv->ring.tail); \
500 } \ 500 if (R128_BROKEN_CCE && write < 32) \
501 if ( R128_BROKEN_CCE && write < 32 ) { \ 501 memcpy(dev_priv->ring.end, \
502 memcpy( dev_priv->ring.end, \ 502 dev_priv->ring.start, \
503 dev_priv->ring.start, \ 503 write * sizeof(u32)); \
504 write * sizeof(u32) ); \ 504 if (((dev_priv->ring.tail + _nr) & tail_mask) != write) \
505 } \
506 if (((dev_priv->ring.tail + _nr) & tail_mask) != write) { \
507 DRM_ERROR( \ 505 DRM_ERROR( \
508 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \ 506 "ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n", \
509 ((dev_priv->ring.tail + _nr) & tail_mask), \ 507 ((dev_priv->ring.tail + _nr) & tail_mask), \
510 write, __LINE__); \ 508 write, __LINE__); \
511 } else \ 509 else \
512 dev_priv->ring.tail = write; \ 510 dev_priv->ring.tail = write; \
513} while (0) 511} while (0)
514 512
515#define COMMIT_RING() do { \ 513#define COMMIT_RING() do { \
516 if ( R128_VERBOSE ) { \ 514 if (R128_VERBOSE) \
517 DRM_INFO( "COMMIT_RING() tail=0x%06x\n", \ 515 DRM_INFO("COMMIT_RING() tail=0x%06x\n", \
518 dev_priv->ring.tail ); \ 516 dev_priv->ring.tail); \
519 } \
520 DRM_MEMORYBARRIER(); \ 517 DRM_MEMORYBARRIER(); \
521 R128_WRITE( R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail ); \ 518 R128_WRITE(R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail); \
522 R128_READ( R128_PM4_BUFFER_DL_WPTR ); \ 519 R128_READ(R128_PM4_BUFFER_DL_WPTR); \
523} while (0) 520} while (0)
524 521
525#define OUT_RING( x ) do { \ 522#define OUT_RING(x) do { \
526 if ( R128_VERBOSE ) { \ 523 if (R128_VERBOSE) \
527 DRM_INFO( " OUT_RING( 0x%08x ) at 0x%x\n", \ 524 DRM_INFO(" OUT_RING( 0x%08x ) at 0x%x\n", \
528 (unsigned int)(x), write ); \ 525 (unsigned int)(x), write); \
529 } \ 526 ring[write++] = cpu_to_le32(x); \
530 ring[write++] = cpu_to_le32( x ); \
531 write &= tail_mask; \ 527 write &= tail_mask; \
532} while (0) 528} while (0)
533 529
diff --git a/drivers/gpu/drm/r128/r128_irq.c b/drivers/gpu/drm/r128/r128_irq.c
index 69810fb8ac49..429d5a02695f 100644
--- a/drivers/gpu/drm/r128/r128_irq.c
+++ b/drivers/gpu/drm/r128/r128_irq.c
@@ -90,7 +90,7 @@ void r128_disable_vblank(struct drm_device *dev, int crtc)
90 */ 90 */
91} 91}
92 92
93void r128_driver_irq_preinstall(struct drm_device * dev) 93void r128_driver_irq_preinstall(struct drm_device *dev)
94{ 94{
95 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; 95 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
96 96
@@ -105,7 +105,7 @@ int r128_driver_irq_postinstall(struct drm_device *dev)
105 return 0; 105 return 0;
106} 106}
107 107
108void r128_driver_irq_uninstall(struct drm_device * dev) 108void r128_driver_irq_uninstall(struct drm_device *dev)
109{ 109{
110 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; 110 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
111 if (!dev_priv) 111 if (!dev_priv)
diff --git a/drivers/gpu/drm/r128/r128_state.c b/drivers/gpu/drm/r128/r128_state.c
index af2665cf4718..077af1f2f9b4 100644
--- a/drivers/gpu/drm/r128/r128_state.c
+++ b/drivers/gpu/drm/r128/r128_state.c
@@ -37,8 +37,8 @@
37 * CCE hardware state programming functions 37 * CCE hardware state programming functions
38 */ 38 */
39 39
40static void r128_emit_clip_rects(drm_r128_private_t * dev_priv, 40static void r128_emit_clip_rects(drm_r128_private_t *dev_priv,
41 struct drm_clip_rect * boxes, int count) 41 struct drm_clip_rect *boxes, int count)
42{ 42{
43 u32 aux_sc_cntl = 0x00000000; 43 u32 aux_sc_cntl = 0x00000000;
44 RING_LOCALS; 44 RING_LOCALS;
@@ -80,7 +80,7 @@ static void r128_emit_clip_rects(drm_r128_private_t * dev_priv,
80 ADVANCE_RING(); 80 ADVANCE_RING();
81} 81}
82 82
83static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv) 83static __inline__ void r128_emit_core(drm_r128_private_t *dev_priv)
84{ 84{
85 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 85 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
86 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 86 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -95,7 +95,7 @@ static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv)
95 ADVANCE_RING(); 95 ADVANCE_RING();
96} 96}
97 97
98static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv) 98static __inline__ void r128_emit_context(drm_r128_private_t *dev_priv)
99{ 99{
100 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 100 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
101 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 101 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -121,7 +121,7 @@ static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv)
121 ADVANCE_RING(); 121 ADVANCE_RING();
122} 122}
123 123
124static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv) 124static __inline__ void r128_emit_setup(drm_r128_private_t *dev_priv)
125{ 125{
126 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 126 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
127 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 127 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -137,7 +137,7 @@ static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv)
137 ADVANCE_RING(); 137 ADVANCE_RING();
138} 138}
139 139
140static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv) 140static __inline__ void r128_emit_masks(drm_r128_private_t *dev_priv)
141{ 141{
142 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 142 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
143 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 143 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -156,7 +156,7 @@ static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv)
156 ADVANCE_RING(); 156 ADVANCE_RING();
157} 157}
158 158
159static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv) 159static __inline__ void r128_emit_window(drm_r128_private_t *dev_priv)
160{ 160{
161 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 161 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
162 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 162 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -171,7 +171,7 @@ static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv)
171 ADVANCE_RING(); 171 ADVANCE_RING();
172} 172}
173 173
174static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv) 174static __inline__ void r128_emit_tex0(drm_r128_private_t *dev_priv)
175{ 175{
176 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 176 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
177 drm_r128_context_regs_t *ctx = &sarea_priv->context_state; 177 drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
@@ -187,9 +187,8 @@ static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv)
187 OUT_RING(tex->tex_cntl); 187 OUT_RING(tex->tex_cntl);
188 OUT_RING(tex->tex_combine_cntl); 188 OUT_RING(tex->tex_combine_cntl);
189 OUT_RING(ctx->tex_size_pitch_c); 189 OUT_RING(ctx->tex_size_pitch_c);
190 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) { 190 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++)
191 OUT_RING(tex->tex_offset[i]); 191 OUT_RING(tex->tex_offset[i]);
192 }
193 192
194 OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1)); 193 OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1));
195 OUT_RING(ctx->constant_color_c); 194 OUT_RING(ctx->constant_color_c);
@@ -198,7 +197,7 @@ static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv)
198 ADVANCE_RING(); 197 ADVANCE_RING();
199} 198}
200 199
201static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv) 200static __inline__ void r128_emit_tex1(drm_r128_private_t *dev_priv)
202{ 201{
203 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 202 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
204 drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1]; 203 drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1];
@@ -211,9 +210,8 @@ static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv)
211 OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS)); 210 OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS));
212 OUT_RING(tex->tex_cntl); 211 OUT_RING(tex->tex_cntl);
213 OUT_RING(tex->tex_combine_cntl); 212 OUT_RING(tex->tex_combine_cntl);
214 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) { 213 for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++)
215 OUT_RING(tex->tex_offset[i]); 214 OUT_RING(tex->tex_offset[i]);
216 }
217 215
218 OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0)); 216 OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0));
219 OUT_RING(tex->tex_border_color); 217 OUT_RING(tex->tex_border_color);
@@ -221,7 +219,7 @@ static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv)
221 ADVANCE_RING(); 219 ADVANCE_RING();
222} 220}
223 221
224static void r128_emit_state(drm_r128_private_t * dev_priv) 222static void r128_emit_state(drm_r128_private_t *dev_priv)
225{ 223{
226 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 224 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
227 unsigned int dirty = sarea_priv->dirty; 225 unsigned int dirty = sarea_priv->dirty;
@@ -274,7 +272,7 @@ static void r128_emit_state(drm_r128_private_t * dev_priv)
274 * Performance monitoring functions 272 * Performance monitoring functions
275 */ 273 */
276 274
277static void r128_clear_box(drm_r128_private_t * dev_priv, 275static void r128_clear_box(drm_r128_private_t *dev_priv,
278 int x, int y, int w, int h, int r, int g, int b) 276 int x, int y, int w, int h, int r, int g, int b)
279{ 277{
280 u32 pitch, offset; 278 u32 pitch, offset;
@@ -321,13 +319,12 @@ static void r128_clear_box(drm_r128_private_t * dev_priv,
321 ADVANCE_RING(); 319 ADVANCE_RING();
322} 320}
323 321
324static void r128_cce_performance_boxes(drm_r128_private_t * dev_priv) 322static void r128_cce_performance_boxes(drm_r128_private_t *dev_priv)
325{ 323{
326 if (atomic_read(&dev_priv->idle_count) == 0) { 324 if (atomic_read(&dev_priv->idle_count) == 0)
327 r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0); 325 r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0);
328 } else { 326 else
329 atomic_set(&dev_priv->idle_count, 0); 327 atomic_set(&dev_priv->idle_count, 0);
330 }
331} 328}
332 329
333#endif 330#endif
@@ -352,8 +349,8 @@ static void r128_print_dirty(const char *msg, unsigned int flags)
352 (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : ""); 349 (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "");
353} 350}
354 351
355static void r128_cce_dispatch_clear(struct drm_device * dev, 352static void r128_cce_dispatch_clear(struct drm_device *dev,
356 drm_r128_clear_t * clear) 353 drm_r128_clear_t *clear)
357{ 354{
358 drm_r128_private_t *dev_priv = dev->dev_private; 355 drm_r128_private_t *dev_priv = dev->dev_private;
359 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 356 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -458,7 +455,7 @@ static void r128_cce_dispatch_clear(struct drm_device * dev,
458 } 455 }
459} 456}
460 457
461static void r128_cce_dispatch_swap(struct drm_device * dev) 458static void r128_cce_dispatch_swap(struct drm_device *dev)
462{ 459{
463 drm_r128_private_t *dev_priv = dev->dev_private; 460 drm_r128_private_t *dev_priv = dev->dev_private;
464 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; 461 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -524,7 +521,7 @@ static void r128_cce_dispatch_swap(struct drm_device * dev)
524 ADVANCE_RING(); 521 ADVANCE_RING();
525} 522}
526 523
527static void r128_cce_dispatch_flip(struct drm_device * dev) 524static void r128_cce_dispatch_flip(struct drm_device *dev)
528{ 525{
529 drm_r128_private_t *dev_priv = dev->dev_private; 526 drm_r128_private_t *dev_priv = dev->dev_private;
530 RING_LOCALS; 527 RING_LOCALS;
@@ -542,11 +539,10 @@ static void r128_cce_dispatch_flip(struct drm_device * dev)
542 R128_WAIT_UNTIL_PAGE_FLIPPED(); 539 R128_WAIT_UNTIL_PAGE_FLIPPED();
543 OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0)); 540 OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0));
544 541
545 if (dev_priv->current_page == 0) { 542 if (dev_priv->current_page == 0)
546 OUT_RING(dev_priv->back_offset); 543 OUT_RING(dev_priv->back_offset);
547 } else { 544 else
548 OUT_RING(dev_priv->front_offset); 545 OUT_RING(dev_priv->front_offset);
549 }
550 546
551 ADVANCE_RING(); 547 ADVANCE_RING();
552 548
@@ -566,7 +562,7 @@ static void r128_cce_dispatch_flip(struct drm_device * dev)
566 ADVANCE_RING(); 562 ADVANCE_RING();
567} 563}
568 564
569static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * buf) 565static void r128_cce_dispatch_vertex(struct drm_device *dev, struct drm_buf *buf)
570{ 566{
571 drm_r128_private_t *dev_priv = dev->dev_private; 567 drm_r128_private_t *dev_priv = dev->dev_private;
572 drm_r128_buf_priv_t *buf_priv = buf->dev_private; 568 drm_r128_buf_priv_t *buf_priv = buf->dev_private;
@@ -585,9 +581,8 @@ static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * b
585 if (buf->used) { 581 if (buf->used) {
586 buf_priv->dispatched = 1; 582 buf_priv->dispatched = 1;
587 583
588 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) { 584 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS)
589 r128_emit_state(dev_priv); 585 r128_emit_state(dev_priv);
590 }
591 586
592 do { 587 do {
593 /* Emit the next set of up to three cliprects */ 588 /* Emit the next set of up to three cliprects */
@@ -636,8 +631,8 @@ static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * b
636 sarea_priv->nbox = 0; 631 sarea_priv->nbox = 0;
637} 632}
638 633
639static void r128_cce_dispatch_indirect(struct drm_device * dev, 634static void r128_cce_dispatch_indirect(struct drm_device *dev,
640 struct drm_buf * buf, int start, int end) 635 struct drm_buf *buf, int start, int end)
641{ 636{
642 drm_r128_private_t *dev_priv = dev->dev_private; 637 drm_r128_private_t *dev_priv = dev->dev_private;
643 drm_r128_buf_priv_t *buf_priv = buf->dev_private; 638 drm_r128_buf_priv_t *buf_priv = buf->dev_private;
@@ -691,8 +686,8 @@ static void r128_cce_dispatch_indirect(struct drm_device * dev,
691 dev_priv->sarea_priv->last_dispatch++; 686 dev_priv->sarea_priv->last_dispatch++;
692} 687}
693 688
694static void r128_cce_dispatch_indices(struct drm_device * dev, 689static void r128_cce_dispatch_indices(struct drm_device *dev,
695 struct drm_buf * buf, 690 struct drm_buf *buf,
696 int start, int end, int count) 691 int start, int end, int count)
697{ 692{
698 drm_r128_private_t *dev_priv = dev->dev_private; 693 drm_r128_private_t *dev_priv = dev->dev_private;
@@ -713,9 +708,8 @@ static void r128_cce_dispatch_indices(struct drm_device * dev,
713 if (start != end) { 708 if (start != end) {
714 buf_priv->dispatched = 1; 709 buf_priv->dispatched = 1;
715 710
716 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) { 711 if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS)
717 r128_emit_state(dev_priv); 712 r128_emit_state(dev_priv);
718 }
719 713
720 dwords = (end - start + 3) / sizeof(u32); 714 dwords = (end - start + 3) / sizeof(u32);
721 715
@@ -775,9 +769,9 @@ static void r128_cce_dispatch_indices(struct drm_device * dev,
775 sarea_priv->nbox = 0; 769 sarea_priv->nbox = 0;
776} 770}
777 771
778static int r128_cce_dispatch_blit(struct drm_device * dev, 772static int r128_cce_dispatch_blit(struct drm_device *dev,
779 struct drm_file *file_priv, 773 struct drm_file *file_priv,
780 drm_r128_blit_t * blit) 774 drm_r128_blit_t *blit)
781{ 775{
782 drm_r128_private_t *dev_priv = dev->dev_private; 776 drm_r128_private_t *dev_priv = dev->dev_private;
783 struct drm_device_dma *dma = dev->dma; 777 struct drm_device_dma *dma = dev->dma;
@@ -887,8 +881,8 @@ static int r128_cce_dispatch_blit(struct drm_device * dev,
887 * have hardware stencil support. 881 * have hardware stencil support.
888 */ 882 */
889 883
890static int r128_cce_dispatch_write_span(struct drm_device * dev, 884static int r128_cce_dispatch_write_span(struct drm_device *dev,
891 drm_r128_depth_t * depth) 885 drm_r128_depth_t *depth)
892{ 886{
893 drm_r128_private_t *dev_priv = dev->dev_private; 887 drm_r128_private_t *dev_priv = dev->dev_private;
894 int count, x, y; 888 int count, x, y;
@@ -902,12 +896,10 @@ static int r128_cce_dispatch_write_span(struct drm_device * dev,
902 if (count > 4096 || count <= 0) 896 if (count > 4096 || count <= 0)
903 return -EMSGSIZE; 897 return -EMSGSIZE;
904 898
905 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) { 899 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x)))
906 return -EFAULT; 900 return -EFAULT;
907 } 901 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y)))
908 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
909 return -EFAULT; 902 return -EFAULT;
910 }
911 903
912 buffer_size = depth->n * sizeof(u32); 904 buffer_size = depth->n * sizeof(u32);
913 buffer = kmalloc(buffer_size, GFP_KERNEL); 905 buffer = kmalloc(buffer_size, GFP_KERNEL);
@@ -983,8 +975,8 @@ static int r128_cce_dispatch_write_span(struct drm_device * dev,
983 return 0; 975 return 0;
984} 976}
985 977
986static int r128_cce_dispatch_write_pixels(struct drm_device * dev, 978static int r128_cce_dispatch_write_pixels(struct drm_device *dev,
987 drm_r128_depth_t * depth) 979 drm_r128_depth_t *depth)
988{ 980{
989 drm_r128_private_t *dev_priv = dev->dev_private; 981 drm_r128_private_t *dev_priv = dev->dev_private;
990 int count, *x, *y; 982 int count, *x, *y;
@@ -1001,9 +993,8 @@ static int r128_cce_dispatch_write_pixels(struct drm_device * dev,
1001 xbuf_size = count * sizeof(*x); 993 xbuf_size = count * sizeof(*x);
1002 ybuf_size = count * sizeof(*y); 994 ybuf_size = count * sizeof(*y);
1003 x = kmalloc(xbuf_size, GFP_KERNEL); 995 x = kmalloc(xbuf_size, GFP_KERNEL);
1004 if (x == NULL) { 996 if (x == NULL)
1005 return -ENOMEM; 997 return -ENOMEM;
1006 }
1007 y = kmalloc(ybuf_size, GFP_KERNEL); 998 y = kmalloc(ybuf_size, GFP_KERNEL);
1008 if (y == NULL) { 999 if (y == NULL) {
1009 kfree(x); 1000 kfree(x);
@@ -1105,8 +1096,8 @@ static int r128_cce_dispatch_write_pixels(struct drm_device * dev,
1105 return 0; 1096 return 0;
1106} 1097}
1107 1098
1108static int r128_cce_dispatch_read_span(struct drm_device * dev, 1099static int r128_cce_dispatch_read_span(struct drm_device *dev,
1109 drm_r128_depth_t * depth) 1100 drm_r128_depth_t *depth)
1110{ 1101{
1111 drm_r128_private_t *dev_priv = dev->dev_private; 1102 drm_r128_private_t *dev_priv = dev->dev_private;
1112 int count, x, y; 1103 int count, x, y;
@@ -1117,12 +1108,10 @@ static int r128_cce_dispatch_read_span(struct drm_device * dev,
1117 if (count > 4096 || count <= 0) 1108 if (count > 4096 || count <= 0)
1118 return -EMSGSIZE; 1109 return -EMSGSIZE;
1119 1110
1120 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) { 1111 if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x)))
1121 return -EFAULT; 1112 return -EFAULT;
1122 } 1113 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y)))
1123 if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
1124 return -EFAULT; 1114 return -EFAULT;
1125 }
1126 1115
1127 BEGIN_RING(7); 1116 BEGIN_RING(7);
1128 1117
@@ -1148,8 +1137,8 @@ static int r128_cce_dispatch_read_span(struct drm_device * dev,
1148 return 0; 1137 return 0;
1149} 1138}
1150 1139
1151static int r128_cce_dispatch_read_pixels(struct drm_device * dev, 1140static int r128_cce_dispatch_read_pixels(struct drm_device *dev,
1152 drm_r128_depth_t * depth) 1141 drm_r128_depth_t *depth)
1153{ 1142{
1154 drm_r128_private_t *dev_priv = dev->dev_private; 1143 drm_r128_private_t *dev_priv = dev->dev_private;
1155 int count, *x, *y; 1144 int count, *x, *y;
@@ -1161,16 +1150,14 @@ static int r128_cce_dispatch_read_pixels(struct drm_device * dev,
1161 if (count > 4096 || count <= 0) 1150 if (count > 4096 || count <= 0)
1162 return -EMSGSIZE; 1151 return -EMSGSIZE;
1163 1152
1164 if (count > dev_priv->depth_pitch) { 1153 if (count > dev_priv->depth_pitch)
1165 count = dev_priv->depth_pitch; 1154 count = dev_priv->depth_pitch;
1166 }
1167 1155
1168 xbuf_size = count * sizeof(*x); 1156 xbuf_size = count * sizeof(*x);
1169 ybuf_size = count * sizeof(*y); 1157 ybuf_size = count * sizeof(*y);
1170 x = kmalloc(xbuf_size, GFP_KERNEL); 1158 x = kmalloc(xbuf_size, GFP_KERNEL);
1171 if (x == NULL) { 1159 if (x == NULL)
1172 return -ENOMEM; 1160 return -ENOMEM;
1173 }
1174 y = kmalloc(ybuf_size, GFP_KERNEL); 1161 y = kmalloc(ybuf_size, GFP_KERNEL);
1175 if (y == NULL) { 1162 if (y == NULL) {
1176 kfree(x); 1163 kfree(x);
@@ -1220,7 +1207,7 @@ static int r128_cce_dispatch_read_pixels(struct drm_device * dev,
1220 * Polygon stipple 1207 * Polygon stipple
1221 */ 1208 */
1222 1209
1223static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple) 1210static void r128_cce_dispatch_stipple(struct drm_device *dev, u32 *stipple)
1224{ 1211{
1225 drm_r128_private_t *dev_priv = dev->dev_private; 1212 drm_r128_private_t *dev_priv = dev->dev_private;
1226 int i; 1213 int i;
@@ -1230,9 +1217,8 @@ static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple)
1230 BEGIN_RING(33); 1217 BEGIN_RING(33);
1231 1218
1232 OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31)); 1219 OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31));
1233 for (i = 0; i < 32; i++) { 1220 for (i = 0; i < 32; i++)
1234 OUT_RING(stipple[i]); 1221 OUT_RING(stipple[i]);
1235 }
1236 1222
1237 ADVANCE_RING(); 1223 ADVANCE_RING();
1238} 1224}
@@ -1269,7 +1255,7 @@ static int r128_cce_clear(struct drm_device *dev, void *data, struct drm_file *f
1269 return 0; 1255 return 0;
1270} 1256}
1271 1257
1272static int r128_do_init_pageflip(struct drm_device * dev) 1258static int r128_do_init_pageflip(struct drm_device *dev)
1273{ 1259{
1274 drm_r128_private_t *dev_priv = dev->dev_private; 1260 drm_r128_private_t *dev_priv = dev->dev_private;
1275 DRM_DEBUG("\n"); 1261 DRM_DEBUG("\n");
@@ -1288,7 +1274,7 @@ static int r128_do_init_pageflip(struct drm_device * dev)
1288 return 0; 1274 return 0;
1289} 1275}
1290 1276
1291static int r128_do_cleanup_pageflip(struct drm_device * dev) 1277static int r128_do_cleanup_pageflip(struct drm_device *dev)
1292{ 1278{
1293 drm_r128_private_t *dev_priv = dev->dev_private; 1279 drm_r128_private_t *dev_priv = dev->dev_private;
1294 DRM_DEBUG("\n"); 1280 DRM_DEBUG("\n");
@@ -1645,17 +1631,16 @@ static int r128_getparam(struct drm_device *dev, void *data, struct drm_file *fi
1645 return 0; 1631 return 0;
1646} 1632}
1647 1633
1648void r128_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) 1634void r128_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1649{ 1635{
1650 if (dev->dev_private) { 1636 if (dev->dev_private) {
1651 drm_r128_private_t *dev_priv = dev->dev_private; 1637 drm_r128_private_t *dev_priv = dev->dev_private;
1652 if (dev_priv->page_flipping) { 1638 if (dev_priv->page_flipping)
1653 r128_do_cleanup_pageflip(dev); 1639 r128_do_cleanup_pageflip(dev);
1654 }
1655 } 1640 }
1656} 1641}
1657 1642
1658void r128_driver_lastclose(struct drm_device * dev) 1643void r128_driver_lastclose(struct drm_device *dev)
1659{ 1644{
1660 r128_do_cleanup_cce(dev); 1645 r128_do_cleanup_cce(dev);
1661} 1646}
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 84b1f2729d43..aebe00875041 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -69,5 +69,6 @@ radeon-y += radeon_device.o radeon_asic.o radeon_kms.o \
69 69
70radeon-$(CONFIG_COMPAT) += radeon_ioc32.o 70radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
71radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o 71radeon-$(CONFIG_VGA_SWITCHEROO) += radeon_atpx_handler.o
72radeon-$(CONFIG_ACPI) += radeon_acpi.o
72 73
73obj-$(CONFIG_DRM_RADEON)+= radeon.o 74obj-$(CONFIG_DRM_RADEON)+= radeon.o
diff --git a/drivers/gpu/drm/radeon/atom.c b/drivers/gpu/drm/radeon/atom.c
index 1d569830ed99..8e421f644a54 100644
--- a/drivers/gpu/drm/radeon/atom.c
+++ b/drivers/gpu/drm/radeon/atom.c
@@ -108,12 +108,11 @@ static uint32_t atom_iio_execute(struct atom_context *ctx, int base,
108 base++; 108 base++;
109 break; 109 break;
110 case ATOM_IIO_READ: 110 case ATOM_IIO_READ:
111 temp = ctx->card->reg_read(ctx->card, CU16(base + 1)); 111 temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1));
112 base += 3; 112 base += 3;
113 break; 113 break;
114 case ATOM_IIO_WRITE: 114 case ATOM_IIO_WRITE:
115 (void)ctx->card->reg_read(ctx->card, CU16(base + 1)); 115 ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp);
116 ctx->card->reg_write(ctx->card, CU16(base + 1), temp);
117 base += 3; 116 base += 3;
118 break; 117 break;
119 case ATOM_IIO_CLEAR: 118 case ATOM_IIO_CLEAR:
@@ -715,8 +714,8 @@ static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg)
715 cjiffies = jiffies; 714 cjiffies = jiffies;
716 if (time_after(cjiffies, ctx->last_jump_jiffies)) { 715 if (time_after(cjiffies, ctx->last_jump_jiffies)) {
717 cjiffies -= ctx->last_jump_jiffies; 716 cjiffies -= ctx->last_jump_jiffies;
718 if ((jiffies_to_msecs(cjiffies) > 1000)) { 717 if ((jiffies_to_msecs(cjiffies) > 5000)) {
719 DRM_ERROR("atombios stuck in loop for more than 1sec aborting\n"); 718 DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n");
720 ctx->abort = true; 719 ctx->abort = true;
721 } 720 }
722 } else { 721 } else {
diff --git a/drivers/gpu/drm/radeon/atom.h b/drivers/gpu/drm/radeon/atom.h
index cd1b64ab5ca7..a589a55b223e 100644
--- a/drivers/gpu/drm/radeon/atom.h
+++ b/drivers/gpu/drm/radeon/atom.h
@@ -113,6 +113,8 @@ struct card_info {
113 struct drm_device *dev; 113 struct drm_device *dev;
114 void (* reg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */ 114 void (* reg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
115 uint32_t (* reg_read)(struct card_info *, uint32_t); /* filled by driver */ 115 uint32_t (* reg_read)(struct card_info *, uint32_t); /* filled by driver */
116 void (* ioreg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
117 uint32_t (* ioreg_read)(struct card_info *, uint32_t); /* filled by driver */
116 void (* mc_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */ 118 void (* mc_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
117 uint32_t (* mc_read)(struct card_info *, uint32_t); /* filled by driver */ 119 uint32_t (* mc_read)(struct card_info *, uint32_t); /* filled by driver */
118 void (* pll_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */ 120 void (* pll_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 8c2d6478a221..ec702345d70e 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -669,56 +669,25 @@ static void atombios_crtc_set_dcpll(struct drm_crtc *crtc)
669 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 669 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
670} 670}
671 671
672static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) 672static void atombios_crtc_program_pll(struct drm_crtc *crtc,
673 int crtc_id,
674 int pll_id,
675 u32 encoder_mode,
676 u32 encoder_id,
677 u32 clock,
678 u32 ref_div,
679 u32 fb_div,
680 u32 frac_fb_div,
681 u32 post_div)
673{ 682{
674 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
675 struct drm_device *dev = crtc->dev; 683 struct drm_device *dev = crtc->dev;
676 struct radeon_device *rdev = dev->dev_private; 684 struct radeon_device *rdev = dev->dev_private;
677 struct drm_encoder *encoder = NULL;
678 struct radeon_encoder *radeon_encoder = NULL;
679 u8 frev, crev; 685 u8 frev, crev;
680 int index; 686 int index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
681 union set_pixel_clock args; 687 union set_pixel_clock args;
682 u32 pll_clock = mode->clock;
683 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
684 struct radeon_pll *pll;
685 u32 adjusted_clock;
686 int encoder_mode = 0;
687 688
688 memset(&args, 0, sizeof(args)); 689 memset(&args, 0, sizeof(args));
689 690
690 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
691 if (encoder->crtc == crtc) {
692 radeon_encoder = to_radeon_encoder(encoder);
693 encoder_mode = atombios_get_encoder_mode(encoder);
694 break;
695 }
696 }
697
698 if (!radeon_encoder)
699 return;
700
701 switch (radeon_crtc->pll_id) {
702 case ATOM_PPLL1:
703 pll = &rdev->clock.p1pll;
704 break;
705 case ATOM_PPLL2:
706 pll = &rdev->clock.p2pll;
707 break;
708 case ATOM_DCPLL:
709 case ATOM_PPLL_INVALID:
710 default:
711 pll = &rdev->clock.dcpll;
712 break;
713 }
714
715 /* adjust pixel clock as needed */
716 adjusted_clock = atombios_adjust_pll(crtc, mode, pll);
717
718 radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
719 &ref_div, &post_div);
720
721 index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
722 if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, 691 if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
723 &crev)) 692 &crev))
724 return; 693 return;
@@ -727,47 +696,49 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
727 case 1: 696 case 1:
728 switch (crev) { 697 switch (crev) {
729 case 1: 698 case 1:
730 args.v1.usPixelClock = cpu_to_le16(mode->clock / 10); 699 if (clock == ATOM_DISABLE)
700 return;
701 args.v1.usPixelClock = cpu_to_le16(clock / 10);
731 args.v1.usRefDiv = cpu_to_le16(ref_div); 702 args.v1.usRefDiv = cpu_to_le16(ref_div);
732 args.v1.usFbDiv = cpu_to_le16(fb_div); 703 args.v1.usFbDiv = cpu_to_le16(fb_div);
733 args.v1.ucFracFbDiv = frac_fb_div; 704 args.v1.ucFracFbDiv = frac_fb_div;
734 args.v1.ucPostDiv = post_div; 705 args.v1.ucPostDiv = post_div;
735 args.v1.ucPpll = radeon_crtc->pll_id; 706 args.v1.ucPpll = pll_id;
736 args.v1.ucCRTC = radeon_crtc->crtc_id; 707 args.v1.ucCRTC = crtc_id;
737 args.v1.ucRefDivSrc = 1; 708 args.v1.ucRefDivSrc = 1;
738 break; 709 break;
739 case 2: 710 case 2:
740 args.v2.usPixelClock = cpu_to_le16(mode->clock / 10); 711 args.v2.usPixelClock = cpu_to_le16(clock / 10);
741 args.v2.usRefDiv = cpu_to_le16(ref_div); 712 args.v2.usRefDiv = cpu_to_le16(ref_div);
742 args.v2.usFbDiv = cpu_to_le16(fb_div); 713 args.v2.usFbDiv = cpu_to_le16(fb_div);
743 args.v2.ucFracFbDiv = frac_fb_div; 714 args.v2.ucFracFbDiv = frac_fb_div;
744 args.v2.ucPostDiv = post_div; 715 args.v2.ucPostDiv = post_div;
745 args.v2.ucPpll = radeon_crtc->pll_id; 716 args.v2.ucPpll = pll_id;
746 args.v2.ucCRTC = radeon_crtc->crtc_id; 717 args.v2.ucCRTC = crtc_id;
747 args.v2.ucRefDivSrc = 1; 718 args.v2.ucRefDivSrc = 1;
748 break; 719 break;
749 case 3: 720 case 3:
750 args.v3.usPixelClock = cpu_to_le16(mode->clock / 10); 721 args.v3.usPixelClock = cpu_to_le16(clock / 10);
751 args.v3.usRefDiv = cpu_to_le16(ref_div); 722 args.v3.usRefDiv = cpu_to_le16(ref_div);
752 args.v3.usFbDiv = cpu_to_le16(fb_div); 723 args.v3.usFbDiv = cpu_to_le16(fb_div);
753 args.v3.ucFracFbDiv = frac_fb_div; 724 args.v3.ucFracFbDiv = frac_fb_div;
754 args.v3.ucPostDiv = post_div; 725 args.v3.ucPostDiv = post_div;
755 args.v3.ucPpll = radeon_crtc->pll_id; 726 args.v3.ucPpll = pll_id;
756 args.v3.ucMiscInfo = (radeon_crtc->pll_id << 2); 727 args.v3.ucMiscInfo = (pll_id << 2);
757 args.v3.ucTransmitterId = radeon_encoder->encoder_id; 728 args.v3.ucTransmitterId = encoder_id;
758 args.v3.ucEncoderMode = encoder_mode; 729 args.v3.ucEncoderMode = encoder_mode;
759 break; 730 break;
760 case 5: 731 case 5:
761 args.v5.ucCRTC = radeon_crtc->crtc_id; 732 args.v5.ucCRTC = crtc_id;
762 args.v5.usPixelClock = cpu_to_le16(mode->clock / 10); 733 args.v5.usPixelClock = cpu_to_le16(clock / 10);
763 args.v5.ucRefDiv = ref_div; 734 args.v5.ucRefDiv = ref_div;
764 args.v5.usFbDiv = cpu_to_le16(fb_div); 735 args.v5.usFbDiv = cpu_to_le16(fb_div);
765 args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000); 736 args.v5.ulFbDivDecFrac = cpu_to_le32(frac_fb_div * 100000);
766 args.v5.ucPostDiv = post_div; 737 args.v5.ucPostDiv = post_div;
767 args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */ 738 args.v5.ucMiscInfo = 0; /* HDMI depth, etc. */
768 args.v5.ucTransmitterID = radeon_encoder->encoder_id; 739 args.v5.ucTransmitterID = encoder_id;
769 args.v5.ucEncoderMode = encoder_mode; 740 args.v5.ucEncoderMode = encoder_mode;
770 args.v5.ucPpll = radeon_crtc->pll_id; 741 args.v5.ucPpll = pll_id;
771 break; 742 break;
772 default: 743 default:
773 DRM_ERROR("Unknown table version %d %d\n", frev, crev); 744 DRM_ERROR("Unknown table version %d %d\n", frev, crev);
@@ -782,6 +753,56 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode
782 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 753 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
783} 754}
784 755
756static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
757{
758 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
759 struct drm_device *dev = crtc->dev;
760 struct radeon_device *rdev = dev->dev_private;
761 struct drm_encoder *encoder = NULL;
762 struct radeon_encoder *radeon_encoder = NULL;
763 u32 pll_clock = mode->clock;
764 u32 ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
765 struct radeon_pll *pll;
766 u32 adjusted_clock;
767 int encoder_mode = 0;
768
769 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
770 if (encoder->crtc == crtc) {
771 radeon_encoder = to_radeon_encoder(encoder);
772 encoder_mode = atombios_get_encoder_mode(encoder);
773 break;
774 }
775 }
776
777 if (!radeon_encoder)
778 return;
779
780 switch (radeon_crtc->pll_id) {
781 case ATOM_PPLL1:
782 pll = &rdev->clock.p1pll;
783 break;
784 case ATOM_PPLL2:
785 pll = &rdev->clock.p2pll;
786 break;
787 case ATOM_DCPLL:
788 case ATOM_PPLL_INVALID:
789 default:
790 pll = &rdev->clock.dcpll;
791 break;
792 }
793
794 /* adjust pixel clock as needed */
795 adjusted_clock = atombios_adjust_pll(crtc, mode, pll);
796
797 radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
798 &ref_div, &post_div);
799
800 atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
801 encoder_mode, radeon_encoder->encoder_id, mode->clock,
802 ref_div, fb_div, frac_fb_div, post_div);
803
804}
805
785static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y, 806static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y,
786 struct drm_framebuffer *old_fb) 807 struct drm_framebuffer *old_fb)
787{ 808{
@@ -841,6 +862,11 @@ static int evergreen_crtc_set_base(struct drm_crtc *crtc, int x, int y,
841 return -EINVAL; 862 return -EINVAL;
842 } 863 }
843 864
865 if (tiling_flags & RADEON_TILING_MACRO)
866 fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1);
867 else if (tiling_flags & RADEON_TILING_MICRO)
868 fb_format |= EVERGREEN_GRPH_ARRAY_MODE(EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1);
869
844 switch (radeon_crtc->crtc_id) { 870 switch (radeon_crtc->crtc_id) {
845 case 0: 871 case 0:
846 WREG32(AVIVO_D1VGA_CONTROL, 0); 872 WREG32(AVIVO_D1VGA_CONTROL, 0);
@@ -979,11 +1005,18 @@ static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y,
979 return -EINVAL; 1005 return -EINVAL;
980 } 1006 }
981 1007
982 if (tiling_flags & RADEON_TILING_MACRO) 1008 if (rdev->family >= CHIP_R600) {
983 fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE; 1009 if (tiling_flags & RADEON_TILING_MACRO)
1010 fb_format |= R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1;
1011 else if (tiling_flags & RADEON_TILING_MICRO)
1012 fb_format |= R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1;
1013 } else {
1014 if (tiling_flags & RADEON_TILING_MACRO)
1015 fb_format |= AVIVO_D1GRPH_MACRO_ADDRESS_MODE;
984 1016
985 if (tiling_flags & RADEON_TILING_MICRO) 1017 if (tiling_flags & RADEON_TILING_MICRO)
986 fb_format |= AVIVO_D1GRPH_TILED; 1018 fb_format |= AVIVO_D1GRPH_TILED;
1019 }
987 1020
988 if (radeon_crtc->crtc_id == 0) 1021 if (radeon_crtc->crtc_id == 0)
989 WREG32(AVIVO_D1VGA_CONTROL, 0); 1022 WREG32(AVIVO_D1VGA_CONTROL, 0);
@@ -1191,6 +1224,24 @@ static void atombios_crtc_commit(struct drm_crtc *crtc)
1191 atombios_lock_crtc(crtc, ATOM_DISABLE); 1224 atombios_lock_crtc(crtc, ATOM_DISABLE);
1192} 1225}
1193 1226
1227static void atombios_crtc_disable(struct drm_crtc *crtc)
1228{
1229 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1230 atombios_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
1231
1232 switch (radeon_crtc->pll_id) {
1233 case ATOM_PPLL1:
1234 case ATOM_PPLL2:
1235 /* disable the ppll */
1236 atombios_crtc_program_pll(crtc, radeon_crtc->crtc_id, radeon_crtc->pll_id,
1237 0, 0, ATOM_DISABLE, 0, 0, 0, 0);
1238 break;
1239 default:
1240 break;
1241 }
1242 radeon_crtc->pll_id = -1;
1243}
1244
1194static const struct drm_crtc_helper_funcs atombios_helper_funcs = { 1245static const struct drm_crtc_helper_funcs atombios_helper_funcs = {
1195 .dpms = atombios_crtc_dpms, 1246 .dpms = atombios_crtc_dpms,
1196 .mode_fixup = atombios_crtc_mode_fixup, 1247 .mode_fixup = atombios_crtc_mode_fixup,
@@ -1199,6 +1250,7 @@ static const struct drm_crtc_helper_funcs atombios_helper_funcs = {
1199 .prepare = atombios_crtc_prepare, 1250 .prepare = atombios_crtc_prepare,
1200 .commit = atombios_crtc_commit, 1251 .commit = atombios_crtc_commit,
1201 .load_lut = radeon_crtc_load_lut, 1252 .load_lut = radeon_crtc_load_lut,
1253 .disable = atombios_crtc_disable,
1202}; 1254};
1203 1255
1204void radeon_atombios_init_crtc(struct drm_device *dev, 1256void radeon_atombios_init_crtc(struct drm_device *dev,
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 057192acdd36..957d5067ad9c 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -39,6 +39,23 @@
39static void evergreen_gpu_init(struct radeon_device *rdev); 39static void evergreen_gpu_init(struct radeon_device *rdev);
40void evergreen_fini(struct radeon_device *rdev); 40void evergreen_fini(struct radeon_device *rdev);
41 41
42/* get temperature in millidegrees */
43u32 evergreen_get_temp(struct radeon_device *rdev)
44{
45 u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >>
46 ASIC_T_SHIFT;
47 u32 actual_temp = 0;
48
49 if ((temp >> 10) & 1)
50 actual_temp = 0;
51 else if ((temp >> 9) & 1)
52 actual_temp = 255;
53 else
54 actual_temp = (temp >> 1) & 0xff;
55
56 return actual_temp * 1000;
57}
58
42void evergreen_pm_misc(struct radeon_device *rdev) 59void evergreen_pm_misc(struct radeon_device *rdev)
43{ 60{
44 int req_ps_idx = rdev->pm.requested_power_state_index; 61 int req_ps_idx = rdev->pm.requested_power_state_index;
@@ -1115,6 +1132,7 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
1115 rdev->config.evergreen.max_backends) & 1132 rdev->config.evergreen.max_backends) &
1116 EVERGREEN_MAX_BACKENDS_MASK)); 1133 EVERGREEN_MAX_BACKENDS_MASK));
1117 1134
1135 rdev->config.evergreen.tile_config = gb_addr_config;
1118 WREG32(GB_BACKEND_MAP, gb_backend_map); 1136 WREG32(GB_BACKEND_MAP, gb_backend_map);
1119 WREG32(GB_ADDR_CONFIG, gb_addr_config); 1137 WREG32(GB_ADDR_CONFIG, gb_addr_config);
1120 WREG32(DMIF_ADDR_CONFIG, gb_addr_config); 1138 WREG32(DMIF_ADDR_CONFIG, gb_addr_config);
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c
index 010963d4570f..345a75a03c96 100644
--- a/drivers/gpu/drm/radeon/evergreen_cs.c
+++ b/drivers/gpu/drm/radeon/evergreen_cs.c
@@ -333,7 +333,6 @@ static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p)
333 header = radeon_get_ib_value(p, h_idx); 333 header = radeon_get_ib_value(p, h_idx);
334 crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1); 334 crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1);
335 reg = CP_PACKET0_GET_REG(header); 335 reg = CP_PACKET0_GET_REG(header);
336 mutex_lock(&p->rdev->ddev->mode_config.mutex);
337 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC); 336 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
338 if (!obj) { 337 if (!obj) {
339 DRM_ERROR("cannot find crtc %d\n", crtc_id); 338 DRM_ERROR("cannot find crtc %d\n", crtc_id);
@@ -368,7 +367,6 @@ static int evergreen_cs_packet_parse_vline(struct radeon_cs_parser *p)
368 } 367 }
369 } 368 }
370out: 369out:
371 mutex_unlock(&p->rdev->ddev->mode_config.mutex);
372 return r; 370 return r;
373} 371}
374 372
diff --git a/drivers/gpu/drm/radeon/evergreen_reg.h b/drivers/gpu/drm/radeon/evergreen_reg.h
index e028c1cd9d9b..2330f3a36fd5 100644
--- a/drivers/gpu/drm/radeon/evergreen_reg.h
+++ b/drivers/gpu/drm/radeon/evergreen_reg.h
@@ -61,6 +61,11 @@
61# define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102 5 61# define EVERGREEN_GRPH_FORMAT_8B_BGRA1010102 5
62# define EVERGREEN_GRPH_FORMAT_RGB111110 6 62# define EVERGREEN_GRPH_FORMAT_RGB111110 6
63# define EVERGREEN_GRPH_FORMAT_BGR101111 7 63# define EVERGREEN_GRPH_FORMAT_BGR101111 7
64# define EVERGREEN_GRPH_ARRAY_MODE(x) (((x) & 0x7) << 20)
65# define EVERGREEN_GRPH_ARRAY_LINEAR_GENERAL 0
66# define EVERGREEN_GRPH_ARRAY_LINEAR_ALIGNED 1
67# define EVERGREEN_GRPH_ARRAY_1D_TILED_THIN1 2
68# define EVERGREEN_GRPH_ARRAY_2D_TILED_THIN1 4
64#define EVERGREEN_GRPH_SWAP_CONTROL 0x680c 69#define EVERGREEN_GRPH_SWAP_CONTROL 0x680c
65# define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0) 70# define EVERGREEN_GRPH_ENDIAN_SWAP(x) (((x) & 0x3) << 0)
66# define EVERGREEN_GRPH_ENDIAN_NONE 0 71# define EVERGREEN_GRPH_ENDIAN_NONE 0
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index a1cd621780e2..9b7532dd30f7 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -165,6 +165,11 @@
165#define SE_DB_BUSY (1 << 30) 165#define SE_DB_BUSY (1 << 30)
166#define SE_CB_BUSY (1 << 31) 166#define SE_CB_BUSY (1 << 31)
167 167
168#define CG_MULT_THERMAL_STATUS 0x740
169#define ASIC_T(x) ((x) << 16)
170#define ASIC_T_MASK 0x7FF0000
171#define ASIC_T_SHIFT 16
172
168#define HDP_HOST_PATH_CNTL 0x2C00 173#define HDP_HOST_PATH_CNTL 0x2C00
169#define HDP_NONSURFACE_BASE 0x2C04 174#define HDP_NONSURFACE_BASE 0x2C04
170#define HDP_NONSURFACE_INFO 0x2C08 175#define HDP_NONSURFACE_INFO 0x2C08
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index ab37717a5d39..e115583f84fb 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1230,7 +1230,6 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
1230 header = radeon_get_ib_value(p, h_idx); 1230 header = radeon_get_ib_value(p, h_idx);
1231 crtc_id = radeon_get_ib_value(p, h_idx + 5); 1231 crtc_id = radeon_get_ib_value(p, h_idx + 5);
1232 reg = CP_PACKET0_GET_REG(header); 1232 reg = CP_PACKET0_GET_REG(header);
1233 mutex_lock(&p->rdev->ddev->mode_config.mutex);
1234 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC); 1233 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
1235 if (!obj) { 1234 if (!obj) {
1236 DRM_ERROR("cannot find crtc %d\n", crtc_id); 1235 DRM_ERROR("cannot find crtc %d\n", crtc_id);
@@ -1264,7 +1263,6 @@ int r100_cs_packet_parse_vline(struct radeon_cs_parser *p)
1264 ib[h_idx + 3] |= RADEON_ENG_DISPLAY_SELECT_CRTC1; 1263 ib[h_idx + 3] |= RADEON_ENG_DISPLAY_SELECT_CRTC1;
1265 } 1264 }
1266out: 1265out:
1267 mutex_unlock(&p->rdev->ddev->mode_config.mutex);
1268 return r; 1266 return r;
1269} 1267}
1270 1268
@@ -2354,6 +2352,7 @@ void r100_mc_init(struct radeon_device *rdev)
2354 if (rdev->flags & RADEON_IS_IGP) 2352 if (rdev->flags & RADEON_IS_IGP)
2355 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16; 2353 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
2356 radeon_vram_location(rdev, &rdev->mc, base); 2354 radeon_vram_location(rdev, &rdev->mc, base);
2355 rdev->mc.gtt_base_align = 0;
2357 if (!(rdev->flags & RADEON_IS_AGP)) 2356 if (!(rdev->flags & RADEON_IS_AGP))
2358 radeon_gtt_location(rdev, &rdev->mc); 2357 radeon_gtt_location(rdev, &rdev->mc);
2359 radeon_update_bandwidth_info(rdev); 2358 radeon_update_bandwidth_info(rdev);
@@ -2365,11 +2364,10 @@ void r100_mc_init(struct radeon_device *rdev)
2365 */ 2364 */
2366void r100_pll_errata_after_index(struct radeon_device *rdev) 2365void r100_pll_errata_after_index(struct radeon_device *rdev)
2367{ 2366{
2368 if (!(rdev->pll_errata & CHIP_ERRATA_PLL_DUMMYREADS)) { 2367 if (rdev->pll_errata & CHIP_ERRATA_PLL_DUMMYREADS) {
2369 return; 2368 (void)RREG32(RADEON_CLOCK_CNTL_DATA);
2369 (void)RREG32(RADEON_CRTC_GEN_CNTL);
2370 } 2370 }
2371 (void)RREG32(RADEON_CLOCK_CNTL_DATA);
2372 (void)RREG32(RADEON_CRTC_GEN_CNTL);
2373} 2371}
2374 2372
2375static void r100_pll_errata_after_data(struct radeon_device *rdev) 2373static void r100_pll_errata_after_data(struct radeon_device *rdev)
@@ -3810,6 +3808,31 @@ void r100_fini(struct radeon_device *rdev)
3810 rdev->bios = NULL; 3808 rdev->bios = NULL;
3811} 3809}
3812 3810
3811/*
3812 * Due to how kexec works, it can leave the hw fully initialised when it
3813 * boots the new kernel. However doing our init sequence with the CP and
3814 * WB stuff setup causes GPU hangs on the RN50 at least. So at startup
3815 * do some quick sanity checks and restore sane values to avoid this
3816 * problem.
3817 */
3818void r100_restore_sanity(struct radeon_device *rdev)
3819{
3820 u32 tmp;
3821
3822 tmp = RREG32(RADEON_CP_CSQ_CNTL);
3823 if (tmp) {
3824 WREG32(RADEON_CP_CSQ_CNTL, 0);
3825 }
3826 tmp = RREG32(RADEON_CP_RB_CNTL);
3827 if (tmp) {
3828 WREG32(RADEON_CP_RB_CNTL, 0);
3829 }
3830 tmp = RREG32(RADEON_SCRATCH_UMSK);
3831 if (tmp) {
3832 WREG32(RADEON_SCRATCH_UMSK, 0);
3833 }
3834}
3835
3813int r100_init(struct radeon_device *rdev) 3836int r100_init(struct radeon_device *rdev)
3814{ 3837{
3815 int r; 3838 int r;
@@ -3822,6 +3845,8 @@ int r100_init(struct radeon_device *rdev)
3822 radeon_scratch_init(rdev); 3845 radeon_scratch_init(rdev);
3823 /* Initialize surface registers */ 3846 /* Initialize surface registers */
3824 radeon_surface_init(rdev); 3847 radeon_surface_init(rdev);
3848 /* sanity check some register to avoid hangs like after kexec */
3849 r100_restore_sanity(rdev);
3825 /* TODO: disable VGA need to use VGA request */ 3850 /* TODO: disable VGA need to use VGA request */
3826 /* BIOS*/ 3851 /* BIOS*/
3827 if (!radeon_get_bios(rdev)) { 3852 if (!radeon_get_bios(rdev)) {
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 7e81db5eb804..58eab5d47305 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -481,6 +481,7 @@ void r300_mc_init(struct radeon_device *rdev)
481 if (rdev->flags & RADEON_IS_IGP) 481 if (rdev->flags & RADEON_IS_IGP)
482 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16; 482 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
483 radeon_vram_location(rdev, &rdev->mc, base); 483 radeon_vram_location(rdev, &rdev->mc, base);
484 rdev->mc.gtt_base_align = 0;
484 if (!(rdev->flags & RADEON_IS_AGP)) 485 if (!(rdev->flags & RADEON_IS_AGP))
485 radeon_gtt_location(rdev, &rdev->mc); 486 radeon_gtt_location(rdev, &rdev->mc);
486 radeon_update_bandwidth_info(rdev); 487 radeon_update_bandwidth_info(rdev);
@@ -1176,6 +1177,8 @@ int r300_cs_parse(struct radeon_cs_parser *p)
1176 int r; 1177 int r;
1177 1178
1178 track = kzalloc(sizeof(*track), GFP_KERNEL); 1179 track = kzalloc(sizeof(*track), GFP_KERNEL);
1180 if (track == NULL)
1181 return -ENOMEM;
1179 r100_cs_track_clear(p->rdev, track); 1182 r100_cs_track_clear(p->rdev, track);
1180 p->track = track; 1183 p->track = track;
1181 do { 1184 do {
@@ -1377,6 +1380,8 @@ int r300_init(struct radeon_device *rdev)
1377 /* Initialize surface registers */ 1380 /* Initialize surface registers */
1378 radeon_surface_init(rdev); 1381 radeon_surface_init(rdev);
1379 /* TODO: disable VGA need to use VGA request */ 1382 /* TODO: disable VGA need to use VGA request */
1383 /* restore some register to sane defaults */
1384 r100_restore_sanity(rdev);
1380 /* BIOS*/ 1385 /* BIOS*/
1381 if (!radeon_get_bios(rdev)) { 1386 if (!radeon_get_bios(rdev)) {
1382 if (ASIC_IS_AVIVO(rdev)) 1387 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index e6c89142bb4d..59f7bccc5be0 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -343,6 +343,8 @@ int r420_init(struct radeon_device *rdev)
343 /* Initialize surface registers */ 343 /* Initialize surface registers */
344 radeon_surface_init(rdev); 344 radeon_surface_init(rdev);
345 /* TODO: disable VGA need to use VGA request */ 345 /* TODO: disable VGA need to use VGA request */
346 /* restore some register to sane defaults */
347 r100_restore_sanity(rdev);
346 /* BIOS*/ 348 /* BIOS*/
347 if (!radeon_get_bios(rdev)) { 349 if (!radeon_get_bios(rdev)) {
348 if (ASIC_IS_AVIVO(rdev)) 350 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h
index 93c9a2bbccf8..6ac1f604e29b 100644
--- a/drivers/gpu/drm/radeon/r500_reg.h
+++ b/drivers/gpu/drm/radeon/r500_reg.h
@@ -386,6 +386,11 @@
386# define AVIVO_D1GRPH_TILED (1 << 20) 386# define AVIVO_D1GRPH_TILED (1 << 20)
387# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) 387# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21)
388 388
389# define R600_D1GRPH_ARRAY_MODE_LINEAR_GENERAL (0 << 20)
390# define R600_D1GRPH_ARRAY_MODE_LINEAR_ALIGNED (1 << 20)
391# define R600_D1GRPH_ARRAY_MODE_1D_TILED_THIN1 (2 << 20)
392# define R600_D1GRPH_ARRAY_MODE_2D_TILED_THIN1 (4 << 20)
393
389/* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2 394/* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2
390 * block and vice versa. This applies to GRPH, CUR, etc. 395 * block and vice versa. This applies to GRPH, CUR, etc.
391 */ 396 */
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 34330df28483..1458dee902dd 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -125,6 +125,7 @@ void r520_mc_init(struct radeon_device *rdev)
125 r520_vram_get_type(rdev); 125 r520_vram_get_type(rdev);
126 r100_vram_init_sizes(rdev); 126 r100_vram_init_sizes(rdev);
127 radeon_vram_location(rdev, &rdev->mc, 0); 127 radeon_vram_location(rdev, &rdev->mc, 0);
128 rdev->mc.gtt_base_align = 0;
128 if (!(rdev->flags & RADEON_IS_AGP)) 129 if (!(rdev->flags & RADEON_IS_AGP))
129 radeon_gtt_location(rdev, &rdev->mc); 130 radeon_gtt_location(rdev, &rdev->mc);
130 radeon_update_bandwidth_info(rdev); 131 radeon_update_bandwidth_info(rdev);
@@ -230,6 +231,8 @@ int r520_init(struct radeon_device *rdev)
230 radeon_scratch_init(rdev); 231 radeon_scratch_init(rdev);
231 /* Initialize surface registers */ 232 /* Initialize surface registers */
232 radeon_surface_init(rdev); 233 radeon_surface_init(rdev);
234 /* restore some register to sane defaults */
235 r100_restore_sanity(rdev);
233 /* TODO: disable VGA need to use VGA request */ 236 /* TODO: disable VGA need to use VGA request */
234 /* BIOS*/ 237 /* BIOS*/
235 if (!radeon_get_bios(rdev)) { 238 if (!radeon_get_bios(rdev)) {
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index a73a6e17588d..28e39bc6768b 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -92,6 +92,21 @@ void r600_gpu_init(struct radeon_device *rdev);
92void r600_fini(struct radeon_device *rdev); 92void r600_fini(struct radeon_device *rdev);
93void r600_irq_disable(struct radeon_device *rdev); 93void r600_irq_disable(struct radeon_device *rdev);
94 94
95/* get temperature in millidegrees */
96u32 rv6xx_get_temp(struct radeon_device *rdev)
97{
98 u32 temp = (RREG32(CG_THERMAL_STATUS) & ASIC_T_MASK) >>
99 ASIC_T_SHIFT;
100 u32 actual_temp = 0;
101
102 if ((temp >> 7) & 1)
103 actual_temp = 0;
104 else
105 actual_temp = (temp >> 1) & 0xff;
106
107 return actual_temp * 1000;
108}
109
95void r600_pm_get_dynpm_state(struct radeon_device *rdev) 110void r600_pm_get_dynpm_state(struct radeon_device *rdev)
96{ 111{
97 int i; 112 int i;
@@ -869,7 +884,17 @@ void r600_pcie_gart_tlb_flush(struct radeon_device *rdev)
869 u32 tmp; 884 u32 tmp;
870 885
871 /* flush hdp cache so updates hit vram */ 886 /* flush hdp cache so updates hit vram */
872 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); 887 if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740)) {
888 void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
889 u32 tmp;
890
891 /* r7xx hw bug. write to HDP_DEBUG1 followed by fb read
892 * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL
893 */
894 WREG32(HDP_DEBUG1, 0);
895 tmp = readl((void __iomem *)ptr);
896 } else
897 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
873 898
874 WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12); 899 WREG32(VM_CONTEXT0_INVALIDATION_LOW_ADDR, rdev->mc.gtt_start >> 12);
875 WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12); 900 WREG32(VM_CONTEXT0_INVALIDATION_HIGH_ADDR, (rdev->mc.gtt_end - 1) >> 12);
@@ -1179,6 +1204,7 @@ void r600_vram_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
1179 if (rdev->flags & RADEON_IS_IGP) 1204 if (rdev->flags & RADEON_IS_IGP)
1180 base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24; 1205 base = (RREG32(MC_VM_FB_LOCATION) & 0xFFFF) << 24;
1181 radeon_vram_location(rdev, &rdev->mc, base); 1206 radeon_vram_location(rdev, &rdev->mc, base);
1207 rdev->mc.gtt_base_align = 0;
1182 radeon_gtt_location(rdev, mc); 1208 radeon_gtt_location(rdev, mc);
1183 } 1209 }
1184} 1210}
@@ -1608,7 +1634,7 @@ void r600_gpu_init(struct radeon_device *rdev)
1608 r600_count_pipe_bits((cc_rb_backend_disable & 1634 r600_count_pipe_bits((cc_rb_backend_disable &
1609 R6XX_MAX_BACKENDS_MASK) >> 16)), 1635 R6XX_MAX_BACKENDS_MASK) >> 16)),
1610 (cc_rb_backend_disable >> 16)); 1636 (cc_rb_backend_disable >> 16));
1611 1637 rdev->config.r600.tile_config = tiling_config;
1612 tiling_config |= BACKEND_MAP(backend_map); 1638 tiling_config |= BACKEND_MAP(backend_map);
1613 WREG32(GB_TILING_CONFIG, tiling_config); 1639 WREG32(GB_TILING_CONFIG, tiling_config);
1614 WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff); 1640 WREG32(DCP_TILING_CONFIG, tiling_config & 0xffff);
@@ -3511,5 +3537,15 @@ int r600_debugfs_mc_info_init(struct radeon_device *rdev)
3511 */ 3537 */
3512void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo) 3538void r600_ioctl_wait_idle(struct radeon_device *rdev, struct radeon_bo *bo)
3513{ 3539{
3514 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1); 3540 /* r7xx hw bug. write to HDP_DEBUG1 followed by fb read
3541 * rather than write to HDP_REG_COHERENCY_FLUSH_CNTL
3542 */
3543 if ((rdev->family >= CHIP_RV770) && (rdev->family <= CHIP_RV740)) {
3544 void __iomem *ptr = (void *)rdev->gart.table.vram.ptr;
3545 u32 tmp;
3546
3547 WREG32(HDP_DEBUG1, 0);
3548 tmp = readl((void __iomem *)ptr);
3549 } else
3550 WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
3515} 3551}
diff --git a/drivers/gpu/drm/radeon/r600_audio.c b/drivers/gpu/drm/radeon/r600_audio.c
index 2b26553c352c..b5443fe1c1d1 100644
--- a/drivers/gpu/drm/radeon/r600_audio.c
+++ b/drivers/gpu/drm/radeon/r600_audio.c
@@ -63,7 +63,8 @@ int r600_audio_bits_per_sample(struct radeon_device *rdev)
63 case 0x4: return 32; 63 case 0x4: return 32;
64 } 64 }
65 65
66 DRM_ERROR("Unknown bits per sample 0x%x using 16 instead.\n", (int)value); 66 dev_err(rdev->dev, "Unknown bits per sample 0x%x using 16 instead\n",
67 (int)value);
67 68
68 return 16; 69 return 16;
69} 70}
@@ -150,7 +151,8 @@ static void r600_audio_update_hdmi(unsigned long param)
150 r600_hdmi_update_audio_settings(encoder); 151 r600_hdmi_update_audio_settings(encoder);
151 } 152 }
152 153
153 if(still_going) r600_audio_schedule_polling(rdev); 154 if (still_going)
155 r600_audio_schedule_polling(rdev);
154} 156}
155 157
156/* 158/*
@@ -158,8 +160,9 @@ static void r600_audio_update_hdmi(unsigned long param)
158 */ 160 */
159static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable) 161static void r600_audio_engine_enable(struct radeon_device *rdev, bool enable)
160{ 162{
161 DRM_INFO("%s audio support", enable ? "Enabling" : "Disabling"); 163 DRM_INFO("%s audio support\n", enable ? "Enabling" : "Disabling");
162 WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000); 164 WREG32_P(R600_AUDIO_ENABLE, enable ? 0x81000000 : 0x0, ~0x81000000);
165 rdev->audio_enabled = enable;
163} 166}
164 167
165/* 168/*
@@ -195,12 +198,14 @@ void r600_audio_enable_polling(struct drm_encoder *encoder)
195 struct radeon_device *rdev = dev->dev_private; 198 struct radeon_device *rdev = dev->dev_private;
196 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 199 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
197 200
198 DRM_DEBUG("r600_audio_enable_polling: %d", radeon_encoder->audio_polling_active); 201 DRM_DEBUG("r600_audio_enable_polling: %d\n",
202 radeon_encoder->audio_polling_active);
199 if (radeon_encoder->audio_polling_active) 203 if (radeon_encoder->audio_polling_active)
200 return; 204 return;
201 205
202 radeon_encoder->audio_polling_active = 1; 206 radeon_encoder->audio_polling_active = 1;
203 mod_timer(&rdev->audio_timer, jiffies + 1); 207 if (rdev->audio_enabled)
208 mod_timer(&rdev->audio_timer, jiffies + 1);
204} 209}
205 210
206/* 211/*
@@ -209,7 +214,8 @@ void r600_audio_enable_polling(struct drm_encoder *encoder)
209void r600_audio_disable_polling(struct drm_encoder *encoder) 214void r600_audio_disable_polling(struct drm_encoder *encoder)
210{ 215{
211 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 216 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
212 DRM_DEBUG("r600_audio_disable_polling: %d", radeon_encoder->audio_polling_active); 217 DRM_DEBUG("r600_audio_disable_polling: %d\n",
218 radeon_encoder->audio_polling_active);
213 radeon_encoder->audio_polling_active = 0; 219 radeon_encoder->audio_polling_active = 0;
214} 220}
215 221
@@ -236,7 +242,7 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
236 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301); 242 WREG32_P(R600_AUDIO_TIMING, 0x100, ~0x301);
237 break; 243 break;
238 default: 244 default:
239 DRM_ERROR("Unsupported encoder type 0x%02X\n", 245 dev_err(rdev->dev, "Unsupported encoder type 0x%02X\n",
240 radeon_encoder->encoder_id); 246 radeon_encoder->encoder_id);
241 return; 247 return;
242 } 248 }
@@ -266,7 +272,7 @@ void r600_audio_set_clock(struct drm_encoder *encoder, int clock)
266 */ 272 */
267void r600_audio_fini(struct radeon_device *rdev) 273void r600_audio_fini(struct radeon_device *rdev)
268{ 274{
269 if (!radeon_audio || !r600_audio_chipset_supported(rdev)) 275 if (!rdev->audio_enabled)
270 return; 276 return;
271 277
272 del_timer(&rdev->audio_timer); 278 del_timer(&rdev->audio_timer);
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c
index f4fb88ece2bb..ca5c29f70779 100644
--- a/drivers/gpu/drm/radeon/r600_blit.c
+++ b/drivers/gpu/drm/radeon/r600_blit.c
@@ -538,9 +538,12 @@ int
538r600_prepare_blit_copy(struct drm_device *dev, struct drm_file *file_priv) 538r600_prepare_blit_copy(struct drm_device *dev, struct drm_file *file_priv)
539{ 539{
540 drm_radeon_private_t *dev_priv = dev->dev_private; 540 drm_radeon_private_t *dev_priv = dev->dev_private;
541 int ret;
541 DRM_DEBUG("\n"); 542 DRM_DEBUG("\n");
542 543
543 r600_nomm_get_vb(dev); 544 ret = r600_nomm_get_vb(dev);
545 if (ret)
546 return ret;
544 547
545 dev_priv->blit_vb->file_priv = file_priv; 548 dev_priv->blit_vb->file_priv = file_priv;
546 549
diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c
index 0271b53fa2dd..e8151c1d55b2 100644
--- a/drivers/gpu/drm/radeon/r600_blit_shaders.c
+++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c
@@ -39,37 +39,45 @@
39 39
40const u32 r6xx_default_state[] = 40const u32 r6xx_default_state[] =
41{ 41{
42 0xc0002400, 42 0xc0002400, /* START_3D_CMDBUF */
43 0x00000000, 43 0x00000000,
44 0xc0012800, 44
45 0xc0012800, /* CONTEXT_CONTROL */
45 0x80000000, 46 0x80000000,
46 0x80000000, 47 0x80000000,
48
47 0xc0016800, 49 0xc0016800,
48 0x00000010, 50 0x00000010,
49 0x00008000, 51 0x00008000, /* WAIT_UNTIL */
52
50 0xc0016800, 53 0xc0016800,
51 0x00000542, 54 0x00000542,
52 0x07000003, 55 0x07000003, /* TA_CNTL_AUX */
56
53 0xc0016800, 57 0xc0016800,
54 0x000005c5, 58 0x000005c5,
55 0x00000000, 59 0x00000000, /* VC_ENHANCE */
60
56 0xc0016800, 61 0xc0016800,
57 0x00000363, 62 0x00000363,
58 0x00000000, 63 0x00000000, /* SQ_DYN_GPR_CNTL_PS_FLUSH_REQ */
64
59 0xc0016800, 65 0xc0016800,
60 0x0000060c, 66 0x0000060c,
61 0x82000000, 67 0x82000000, /* DB_DEBUG */
68
62 0xc0016800, 69 0xc0016800,
63 0x0000060e, 70 0x0000060e,
64 0x01020204, 71 0x01020204, /* DB_WATERMARKS */
65 0xc0016f00, 72
66 0x00000000, 73 0xc0026f00,
67 0x00000000,
68 0xc0016f00,
69 0x00000001,
70 0x00000000, 74 0x00000000,
75 0x00000000, /* SQ_VTX_BASE_VTX_LOC */
76 0x00000000, /* SQ_VTX_START_INST_LOC */
77
71 0xc0096900, 78 0xc0096900,
72 0x0000022a, 79 0x0000022a,
80 0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
73 0x00000000, 81 0x00000000,
74 0x00000000, 82 0x00000000,
75 0x00000000, 83 0x00000000,
@@ -78,515 +86,317 @@ const u32 r6xx_default_state[] =
78 0x00000000, 86 0x00000000,
79 0x00000000, 87 0x00000000,
80 0x00000000, 88 0x00000000,
81 0x00000000, 89
82 0xc0016900, 90 0xc0016900,
83 0x00000004, 91 0x00000004,
84 0x00000000, 92 0x00000000, /* DB_DEPTH_INFO */
85 0xc0016900, 93
94 0xc0026900,
86 0x0000000a, 95 0x0000000a,
87 0x00000000, 96 0x00000000, /* DB_STENCIL_CLEAR */
88 0xc0016900, 97 0x00000000, /* DB_DEPTH_CLEAR */
89 0x0000000b, 98
90 0x00000000,
91 0xc0016900,
92 0x0000010c,
93 0x00000000,
94 0xc0016900,
95 0x0000010d,
96 0x00000000,
97 0xc0016900, 99 0xc0016900,
98 0x00000200, 100 0x00000200,
99 0x00000000, 101 0x00000000, /* DB_DEPTH_CONTROL */
100 0xc0016900, 102
103 0xc0026900,
101 0x00000343, 104 0x00000343,
102 0x00000060, 105 0x00000060, /* DB_RENDER_CONTROL */
103 0xc0016900, 106 0x00000040, /* DB_RENDER_OVERRIDE */
104 0x00000344, 107
105 0x00000040,
106 0xc0016900, 108 0xc0016900,
107 0x00000351, 109 0x00000351,
108 0x0000aa00, 110 0x0000aa00, /* DB_ALPHA_TO_MASK */
109 0xc0016900, 111
110 0x00000104, 112 0xc00f6900,
111 0x00000000, 113 0x00000100,
112 0xc0016900, 114 0x00000800, /* VGT_MAX_VTX_INDX */
113 0x0000010e, 115 0x00000000, /* VGT_MIN_VTX_INDX */
114 0x00000000, 116 0x00000000, /* VGT_INDX_OFFSET */
115 0xc0046900, 117 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
116 0x00000105, 118 0x00000000, /* SX_ALPHA_TEST_CONTROL */
117 0x00000000, 119 0x00000000, /* CB_BLEND_RED */
118 0x00000000,
119 0x00000000, 120 0x00000000,
120 0x00000000, 121 0x00000000,
121 0xc0036900,
122 0x00000109,
123 0x00000000, 122 0x00000000,
123 0x00000000, /* CB_FOG_RED */
124 0x00000000, 124 0x00000000,
125 0x00000000, 125 0x00000000,
126 0x00000000, /* DB_STENCILREFMASK */
127 0x00000000, /* DB_STENCILREFMASK_BF */
128 0x00000000, /* SX_ALPHA_REF */
129
126 0xc0046900, 130 0xc0046900,
127 0x0000030c, 131 0x0000030c,
128 0x01000000, 132 0x01000000, /* CB_CLRCMP_CNTL */
129 0x00000000, 133 0x00000000,
130 0x00000000, 134 0x00000000,
131 0x00000000, 135 0x00000000,
136
132 0xc0046900, 137 0xc0046900,
133 0x00000048, 138 0x00000048,
134 0x3f800000, 139 0x3f800000, /* CB_CLEAR_RED */
135 0x00000000, 140 0x00000000,
136 0x3f800000, 141 0x3f800000,
137 0x3f800000, 142 0x3f800000,
138 0xc0016900, 143
139 0x0000008e,
140 0x0000000f,
141 0xc0016900, 144 0xc0016900,
142 0x00000080, 145 0x00000080,
143 0x00000000, 146 0x00000000, /* PA_SC_WINDOW_OFFSET */
144 0xc0016900, 147
148 0xc00a6900,
145 0x00000083, 149 0x00000083,
146 0x0000ffff, 150 0x0000ffff, /* PA_SC_CLIP_RECT_RULE */
147 0xc0016900, 151 0x00000000, /* PA_SC_CLIPRECT_0_TL */
148 0x00000084,
149 0x00000000,
150 0xc0016900,
151 0x00000085,
152 0x20002000, 152 0x20002000,
153 0xc0016900,
154 0x00000086,
155 0x00000000, 153 0x00000000,
156 0xc0016900,
157 0x00000087,
158 0x20002000, 154 0x20002000,
159 0xc0016900,
160 0x00000088,
161 0x00000000, 155 0x00000000,
162 0xc0016900,
163 0x00000089,
164 0x20002000, 156 0x20002000,
165 0xc0016900,
166 0x0000008a,
167 0x00000000, 157 0x00000000,
168 0xc0016900,
169 0x0000008b,
170 0x20002000, 158 0x20002000,
171 0xc0016900, 159 0x00000000, /* PA_SC_EDGERULE */
172 0x0000008c, 160
173 0x00000000, 161 0xc0406900,
174 0xc0016900,
175 0x00000094, 162 0x00000094,
176 0x80000000, 163 0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
177 0xc0016900, 164 0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
178 0x00000095, 165 0x80000000, /* PA_SC_VPORT_SCISSOR_1_TL */
179 0x20002000, 166 0x20002000,
180 0xc0026900,
181 0x000000b4,
182 0x00000000,
183 0x3f800000,
184 0xc0016900,
185 0x00000096,
186 0x80000000, 167 0x80000000,
187 0xc0016900,
188 0x00000097,
189 0x20002000, 168 0x20002000,
190 0xc0026900,
191 0x000000b6,
192 0x00000000,
193 0x3f800000,
194 0xc0016900,
195 0x00000098,
196 0x80000000, 169 0x80000000,
197 0xc0016900,
198 0x00000099,
199 0x20002000, 170 0x20002000,
200 0xc0026900,
201 0x000000b8,
202 0x00000000,
203 0x3f800000,
204 0xc0016900,
205 0x0000009a,
206 0x80000000, 171 0x80000000,
207 0xc0016900,
208 0x0000009b,
209 0x20002000, 172 0x20002000,
210 0xc0026900,
211 0x000000ba,
212 0x00000000,
213 0x3f800000,
214 0xc0016900,
215 0x0000009c,
216 0x80000000, 173 0x80000000,
217 0xc0016900,
218 0x0000009d,
219 0x20002000, 174 0x20002000,
220 0xc0026900,
221 0x000000bc,
222 0x00000000,
223 0x3f800000,
224 0xc0016900,
225 0x0000009e,
226 0x80000000, 175 0x80000000,
227 0xc0016900,
228 0x0000009f,
229 0x20002000, 176 0x20002000,
230 0xc0026900,
231 0x000000be,
232 0x00000000,
233 0x3f800000,
234 0xc0016900,
235 0x000000a0,
236 0x80000000, 177 0x80000000,
237 0xc0016900,
238 0x000000a1,
239 0x20002000, 178 0x20002000,
240 0xc0026900,
241 0x000000c0,
242 0x00000000,
243 0x3f800000,
244 0xc0016900,
245 0x000000a2,
246 0x80000000, 179 0x80000000,
247 0xc0016900,
248 0x000000a3,
249 0x20002000, 180 0x20002000,
250 0xc0026900,
251 0x000000c2,
252 0x00000000,
253 0x3f800000,
254 0xc0016900,
255 0x000000a4,
256 0x80000000, 181 0x80000000,
257 0xc0016900,
258 0x000000a5,
259 0x20002000, 182 0x20002000,
260 0xc0026900,
261 0x000000c4,
262 0x00000000,
263 0x3f800000,
264 0xc0016900,
265 0x000000a6,
266 0x80000000, 183 0x80000000,
267 0xc0016900,
268 0x000000a7,
269 0x20002000, 184 0x20002000,
270 0xc0026900,
271 0x000000c6,
272 0x00000000,
273 0x3f800000,
274 0xc0016900,
275 0x000000a8,
276 0x80000000, 185 0x80000000,
277 0xc0016900,
278 0x000000a9,
279 0x20002000, 186 0x20002000,
280 0xc0026900,
281 0x000000c8,
282 0x00000000,
283 0x3f800000,
284 0xc0016900,
285 0x000000aa,
286 0x80000000, 187 0x80000000,
287 0xc0016900,
288 0x000000ab,
289 0x20002000, 188 0x20002000,
290 0xc0026900,
291 0x000000ca,
292 0x00000000,
293 0x3f800000,
294 0xc0016900,
295 0x000000ac,
296 0x80000000, 189 0x80000000,
297 0xc0016900,
298 0x000000ad,
299 0x20002000, 190 0x20002000,
300 0xc0026900,
301 0x000000cc,
302 0x00000000,
303 0x3f800000,
304 0xc0016900,
305 0x000000ae,
306 0x80000000, 191 0x80000000,
307 0xc0016900,
308 0x000000af,
309 0x20002000, 192 0x20002000,
310 0xc0026900,
311 0x000000ce,
312 0x00000000,
313 0x3f800000,
314 0xc0016900,
315 0x000000b0,
316 0x80000000, 193 0x80000000,
317 0xc0016900,
318 0x000000b1,
319 0x20002000, 194 0x20002000,
320 0xc0026900, 195 0x00000000, /* PA_SC_VPORT_ZMIN_0 */
321 0x000000d0,
322 0x00000000,
323 0x3f800000, 196 0x3f800000,
324 0xc0016900,
325 0x000000b2,
326 0x80000000,
327 0xc0016900,
328 0x000000b3,
329 0x20002000,
330 0xc0026900,
331 0x000000d2,
332 0x00000000, 197 0x00000000,
333 0x3f800000, 198 0x3f800000,
334 0xc0016900,
335 0x00000293,
336 0x00004010,
337 0xc0016900,
338 0x00000300,
339 0x00000000, 199 0x00000000,
340 0xc0016900, 200 0x3f800000,
341 0x00000301,
342 0x00000000,
343 0xc0016900,
344 0x00000312,
345 0xffffffff,
346 0xc0016900,
347 0x00000307,
348 0x00000000, 201 0x00000000,
349 0xc0016900, 202 0x3f800000,
350 0x00000308,
351 0x00000000, 203 0x00000000,
352 0xc0016900, 204 0x3f800000,
353 0x00000283,
354 0x00000000, 205 0x00000000,
355 0xc0016900, 206 0x3f800000,
356 0x00000292,
357 0x00000000, 207 0x00000000,
358 0xc0066900, 208 0x3f800000,
359 0x0000010f,
360 0x00000000, 209 0x00000000,
210 0x3f800000,
361 0x00000000, 211 0x00000000,
212 0x3f800000,
362 0x00000000, 213 0x00000000,
214 0x3f800000,
363 0x00000000, 215 0x00000000,
216 0x3f800000,
364 0x00000000, 217 0x00000000,
218 0x3f800000,
365 0x00000000, 219 0x00000000,
366 0xc0016900, 220 0x3f800000,
367 0x00000206,
368 0x00000000, 221 0x00000000,
369 0xc0016900, 222 0x3f800000,
370 0x00000207,
371 0x00000000, 223 0x00000000,
372 0xc0016900, 224 0x3f800000,
373 0x00000208,
374 0x00000000, 225 0x00000000,
375 0xc0046900,
376 0x00000303,
377 0x3f800000, 226 0x3f800000,
227
228 0xc0026900,
229 0x00000292,
230 0x00000000, /* PA_SC_MPASS_PS_CNTL */
231 0x00004010, /* PA_SC_MODE_CNTL */
232
233 0xc0096900,
234 0x00000300,
235 0x00000000, /* PA_SC_LINE_CNTL */
236 0x00000000, /* PA_SC_AA_CONFIG */
237 0x0000002d, /* PA_SU_VTX_CNTL */
238 0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
378 0x3f800000, 239 0x3f800000,
379 0x3f800000, 240 0x3f800000,
380 0x3f800000, 241 0x3f800000,
381 0xc0016900, 242 0x00000000, /* PA_SC_SAMPLE_LOCS_MCTX */
382 0x00000205,
383 0x00000004,
384 0xc0016900,
385 0x00000280,
386 0x00000000,
387 0xc0016900,
388 0x00000281,
389 0x00000000, 243 0x00000000,
244
390 0xc0016900, 245 0xc0016900,
246 0x00000312,
247 0xffffffff, /* PA_SC_AA_MASK */
248
249 0xc0066900,
391 0x0000037e, 250 0x0000037e,
392 0x00000000, 251 0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
393 0xc0016900, 252 0x00000000, /* PA_SU_POLY_OFFSET_CLAMP */
394 0x00000382, 253 0x00000000, /* PA_SU_POLY_OFFSET_FRONT_SCALE */
395 0x00000000, 254 0x00000000, /* PA_SU_POLY_OFFSET_FRONT_OFFSET */
396 0xc0016900, 255 0x00000000, /* PA_SU_POLY_OFFSET_BACK_SCALE */
397 0x00000380, 256 0x00000000, /* PA_SU_POLY_OFFSET_BACK_OFFSET */
398 0x00000000, 257
399 0xc0016900, 258 0xc0046900,
400 0x00000383,
401 0x00000000,
402 0xc0016900,
403 0x00000381,
404 0x00000000,
405 0xc0016900,
406 0x00000282,
407 0x00000008,
408 0xc0016900,
409 0x00000302,
410 0x0000002d,
411 0xc0016900,
412 0x0000037f,
413 0x00000000,
414 0xc0016900,
415 0x000001b2,
416 0x00000000,
417 0xc0016900,
418 0x000001b6, 259 0x000001b6,
419 0x00000000, 260 0x00000000, /* SPI_INPUT_Z */
420 0xc0016900, 261 0x00000000, /* SPI_FOG_CNTL */
421 0x000001b7, 262 0x00000000, /* SPI_FOG_FUNC_SCALE */
422 0x00000000, 263 0x00000000, /* SPI_FOG_FUNC_BIAS */
423 0xc0016900, 264
424 0x000001b8,
425 0x00000000,
426 0xc0016900,
427 0x000001b9,
428 0x00000000,
429 0xc0016900, 265 0xc0016900,
430 0x00000225, 266 0x00000225,
431 0x00000000, 267 0x00000000, /* SQ_PGM_START_FS */
268
432 0xc0016900, 269 0xc0016900,
433 0x00000229, 270 0x00000229,
434 0x00000000, 271 0x00000000, /* SQ_PGM_RESOURCES_FS */
272
435 0xc0016900, 273 0xc0016900,
436 0x00000237, 274 0x00000237,
437 0x00000000, 275 0x00000000, /* SQ_PGM_CF_OFFSET_FS */
438 0xc0016900, 276
439 0x00000100, 277 0xc0026900,
440 0x00000800,
441 0xc0016900,
442 0x00000101,
443 0x00000000,
444 0xc0016900,
445 0x00000102,
446 0x00000000,
447 0xc0016900,
448 0x000002a8, 278 0x000002a8,
449 0x00000000, 279 0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
450 0xc0016900, 280 0x00000000, /* VGT_INSTANCE_STEP_RATE_1 */
451 0x000002a9, 281
452 0x00000000, 282 0xc0116900,
453 0xc0016900, 283 0x00000280,
454 0x00000103, 284 0x00000000, /* PA_SU_POINT_SIZE */
455 0x00000000, 285 0x00000000, /* PA_SU_POINT_MINMAX */
456 0xc0016900, 286 0x00000008, /* PA_SU_LINE_CNTL */
457 0x00000284, 287 0x00000000, /* PA_SC_LINE_STIPPLE */
458 0x00000000, 288 0x00000000, /* VGT_OUTPUT_PATH_CNTL */
459 0xc0016900, 289 0x00000000, /* VGT_HOS_CNTL */
460 0x00000290, 290 0x00000000, /* VGT_HOS_MAX_TESS_LEVEL */
461 0x00000000, 291 0x00000000, /* VGT_HOS_MIN_TESS_LEVEL */
462 0xc0016900, 292 0x00000000, /* VGT_HOS_REUSE_DEPTH */
463 0x00000285, 293 0x00000000, /* VGT_GROUP_PRIM_TYPE */
464 0x00000000, 294 0x00000000, /* VGT_GROUP_FIRST_DECR */
465 0xc0016900, 295 0x00000000, /* VGT_GROUP_DECR */
466 0x00000286, 296 0x00000000, /* VGT_GROUP_VECT_0_CNTL */
467 0x00000000, 297 0x00000000, /* VGT_GROUP_VECT_1_CNTL */
468 0xc0016900, 298 0x00000000, /* VGT_GROUP_VECT_0_FMT_CNTL */
469 0x00000287, 299 0x00000000, /* VGT_GROUP_VECT_1_FMT_CNTL */
470 0x00000000, 300 0x00000000, /* VGT_GS_MODE */
471 0xc0016900, 301
472 0x00000288,
473 0x00000000,
474 0xc0016900,
475 0x00000289,
476 0x00000000,
477 0xc0016900,
478 0x0000028a,
479 0x00000000,
480 0xc0016900,
481 0x0000028b,
482 0x00000000,
483 0xc0016900,
484 0x0000028c,
485 0x00000000,
486 0xc0016900,
487 0x0000028d,
488 0x00000000,
489 0xc0016900,
490 0x0000028e,
491 0x00000000,
492 0xc0016900,
493 0x0000028f,
494 0x00000000,
495 0xc0016900, 302 0xc0016900,
496 0x000002a1, 303 0x000002a1,
497 0x00000000, 304 0x00000000, /* VGT_PRIMITIVEID_EN */
305
498 0xc0016900, 306 0xc0016900,
499 0x000002a5, 307 0x000002a5,
500 0x00000000, 308 0x00000000, /* VGT_MULTI_PRIM_ID_RESET_EN */
501 0xc0016900, 309
310 0xc0036900,
502 0x000002ac, 311 0x000002ac,
503 0x00000000, 312 0x00000000, /* VGT_STRMOUT_EN */
504 0xc0016900, 313 0x00000000, /* VGT_REUSE_OFF */
505 0x000002ad, 314 0x00000000, /* VGT_VTX_CNT_EN */
506 0x00000000, 315
507 0xc0016900,
508 0x000002ae,
509 0x00000000,
510 0xc0016900, 316 0xc0016900,
511 0x000002c8, 317 0x000002c8,
512 0x00000000, 318 0x00000000, /* VGT_STRMOUT_BUFFER_EN */
513 0xc0016900, 319
514 0x00000206, 320 0xc0076900,
515 0x00000100,
516 0xc0016900,
517 0x00000204,
518 0x00010000,
519 0xc0036e00,
520 0x00000000,
521 0x00000012,
522 0x00000000,
523 0x00000000,
524 0xc0016900,
525 0x0000008f,
526 0x0000000f,
527 0xc0016900,
528 0x000001e8,
529 0x00000001,
530 0xc0016900,
531 0x00000202, 321 0x00000202,
532 0x00cc0000, 322 0x00cc0000, /* CB_COLOR_CONTROL */
323 0x00000210, /* DB_SHADER_CNTL */
324 0x00010000, /* PA_CL_CLIP_CNTL */
325 0x00000244, /* PA_SU_SC_MODE_CNTL */
326 0x00000100, /* PA_CL_VTE_CNTL */
327 0x00000000, /* PA_CL_VS_OUT_CNTL */
328 0x00000000, /* PA_CL_NANINF_CNTL */
329
330 0xc0026900,
331 0x0000008e,
332 0x0000000f, /* CB_TARGET_MASK */
333 0x0000000f, /* CB_SHADER_MASK */
334
533 0xc0016900, 335 0xc0016900,
534 0x00000205, 336 0x000001e8,
535 0x00000244, 337 0x00000001, /* CB_SHADER_CONTROL */
338
536 0xc0016900, 339 0xc0016900,
537 0x00000203, 340 0x00000185,
538 0x00000210, 341 0x00000000, /* SPI_VS_OUT_ID_0 */
342
539 0xc0016900, 343 0xc0016900,
344 0x00000191,
345 0x00000b00, /* SPI_PS_INPUT_CNTL_0 */
346
347 0xc0056900,
540 0x000001b1, 348 0x000001b1,
349 0x00000000, /* SPI_VS_OUT_CONFIG */
350 0x00000000, /* SPI_THREAD_GROUPING */
351 0x00000001, /* SPI_PS_IN_CONTROL_0 */
352 0x00000000, /* SPI_PS_IN_CONTROL_1 */
353 0x00000000, /* SPI_INTERP_CONTROL_0 */
354
355 0xc0036e00, /* SET_SAMPLER */
541 0x00000000, 356 0x00000000,
542 0xc0016900, 357 0x00000012,
543 0x00000185,
544 0x00000000,
545 0xc0016900,
546 0x000001b3,
547 0x00000001,
548 0xc0016900,
549 0x000001b4,
550 0x00000000, 358 0x00000000,
551 0xc0016900,
552 0x00000191,
553 0x00000b00,
554 0xc0016900,
555 0x000001b5,
556 0x00000000, 359 0x00000000,
557}; 360};
558 361
559const u32 r7xx_default_state[] = 362const u32 r7xx_default_state[] =
560{ 363{
561 0xc0012800, 364 0xc0012800, /* CONTEXT_CONTROL */
562 0x80000000, 365 0x80000000,
563 0x80000000, 366 0x80000000,
367
564 0xc0016800, 368 0xc0016800,
565 0x00000010, 369 0x00000010,
566 0x00008000, 370 0x00008000, /* WAIT_UNTIL */
371
567 0xc0016800, 372 0xc0016800,
568 0x00000542, 373 0x00000542,
569 0x07000002, 374 0x07000002, /* TA_CNTL_AUX */
375
570 0xc0016800, 376 0xc0016800,
571 0x000005c5, 377 0x000005c5,
572 0x00000000, 378 0x00000000, /* VC_ENHANCE */
379
573 0xc0016800, 380 0xc0016800,
574 0x00000363, 381 0x00000363,
575 0x00004000, 382 0x00004000, /* SQ_DYN_GPR_CNTL_PS_FLUSH_REQ */
383
576 0xc0016800, 384 0xc0016800,
577 0x0000060c, 385 0x0000060c,
578 0x00000000, 386 0x00000000, /* DB_DEBUG */
387
579 0xc0016800, 388 0xc0016800,
580 0x0000060e, 389 0x0000060e,
581 0x00420204, 390 0x00420204, /* DB_WATERMARKS */
582 0xc0016f00, 391
583 0x00000000, 392 0xc0026f00,
584 0x00000000,
585 0xc0016f00,
586 0x00000001,
587 0x00000000, 393 0x00000000,
394 0x00000000, /* SQ_VTX_BASE_VTX_LOC */
395 0x00000000, /* SQ_VTX_START_INST_LOC */
396
588 0xc0096900, 397 0xc0096900,
589 0x0000022a, 398 0x0000022a,
399 0x00000000, /* SQ_ESGS_RING_ITEMSIZE */
590 0x00000000, 400 0x00000000,
591 0x00000000, 401 0x00000000,
592 0x00000000, 402 0x00000000,
@@ -595,470 +405,269 @@ const u32 r7xx_default_state[] =
595 0x00000000, 405 0x00000000,
596 0x00000000, 406 0x00000000,
597 0x00000000, 407 0x00000000,
598 0x00000000, 408
599 0xc0016900, 409 0xc0016900,
600 0x00000004, 410 0x00000004,
601 0x00000000, 411 0x00000000, /* DB_DEPTH_INFO */
602 0xc0016900, 412
413 0xc0026900,
603 0x0000000a, 414 0x0000000a,
604 0x00000000, 415 0x00000000, /* DB_STENCIL_CLEAR */
605 0xc0016900, 416 0x00000000, /* DB_DEPTH_CLEAR */
606 0x0000000b, 417
607 0x00000000,
608 0xc0016900,
609 0x0000010c,
610 0x00000000,
611 0xc0016900,
612 0x0000010d,
613 0x00000000,
614 0xc0016900, 418 0xc0016900,
615 0x00000200, 419 0x00000200,
616 0x00000000, 420 0x00000000, /* DB_DEPTH_CONTROL */
617 0xc0016900, 421
422 0xc0026900,
618 0x00000343, 423 0x00000343,
619 0x00000060, 424 0x00000060, /* DB_RENDER_CONTROL */
620 0xc0016900, 425 0x00000000, /* DB_RENDER_OVERRIDE */
621 0x00000344, 426
622 0x00000000,
623 0xc0016900, 427 0xc0016900,
624 0x00000351, 428 0x00000351,
625 0x0000aa00, 429 0x0000aa00, /* DB_ALPHA_TO_MASK */
626 0xc0016900, 430
627 0x00000104, 431 0xc0096900,
628 0x00000000, 432 0x00000100,
629 0xc0016900, 433 0x00000800, /* VGT_MAX_VTX_INDX */
630 0x0000010e, 434 0x00000000, /* VGT_MIN_VTX_INDX */
631 0x00000000, 435 0x00000000, /* VGT_INDX_OFFSET */
632 0xc0046900, 436 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */
633 0x00000105, 437 0x00000000, /* SX_ALPHA_TEST_CONTROL */
634 0x00000000, 438 0x00000000, /* CB_BLEND_RED */
635 0x00000000, 439 0x00000000,
636 0x00000000, 440 0x00000000,
637 0x00000000, 441 0x00000000,
442
443 0xc0036900,
444 0x0000010c,
445 0x00000000, /* DB_STENCILREFMASK */
446 0x00000000, /* DB_STENCILREFMASK_BF */
447 0x00000000, /* SX_ALPHA_REF */
448
638 0xc0046900, 449 0xc0046900,
639 0x0000030c, 450 0x0000030c, /* CB_CLRCMP_CNTL */
640 0x01000000, 451 0x01000000,
641 0x00000000, 452 0x00000000,
642 0x00000000, 453 0x00000000,
643 0x00000000, 454 0x00000000,
644 0xc0016900, 455
645 0x0000008e,
646 0x0000000f,
647 0xc0016900, 456 0xc0016900,
648 0x00000080, 457 0x00000080,
649 0x00000000, 458 0x00000000, /* PA_SC_WINDOW_OFFSET */
650 0xc0016900, 459
460 0xc00a6900,
651 0x00000083, 461 0x00000083,
652 0x0000ffff, 462 0x0000ffff, /* PA_SC_CLIP_RECT_RULE */
653 0xc0016900, 463 0x00000000, /* PA_SC_CLIPRECT_0_TL */
654 0x00000084,
655 0x00000000,
656 0xc0016900,
657 0x00000085,
658 0x20002000, 464 0x20002000,
659 0xc0016900,
660 0x00000086,
661 0x00000000, 465 0x00000000,
662 0xc0016900,
663 0x00000087,
664 0x20002000, 466 0x20002000,
665 0xc0016900,
666 0x00000088,
667 0x00000000, 467 0x00000000,
668 0xc0016900,
669 0x00000089,
670 0x20002000, 468 0x20002000,
671 0xc0016900,
672 0x0000008a,
673 0x00000000, 469 0x00000000,
674 0xc0016900,
675 0x0000008b,
676 0x20002000, 470 0x20002000,
677 0xc0016900, 471 0xaaaaaaaa, /* PA_SC_EDGERULE */
678 0x0000008c, 472
679 0xaaaaaaaa, 473 0xc0406900,
680 0xc0016900,
681 0x00000094, 474 0x00000094,
682 0x80000000, 475 0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */
683 0xc0016900, 476 0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */
684 0x00000095, 477 0x80000000, /* PA_SC_VPORT_SCISSOR_1_TL */
685 0x20002000, 478 0x20002000,
686 0xc0026900,
687 0x000000b4,
688 0x00000000,
689 0x3f800000,
690 0xc0016900,
691 0x00000096,
692 0x80000000, 479 0x80000000,
693 0xc0016900,
694 0x00000097,
695 0x20002000, 480 0x20002000,
696 0xc0026900,
697 0x000000b6,
698 0x00000000,
699 0x3f800000,
700 0xc0016900,
701 0x00000098,
702 0x80000000, 481 0x80000000,
703 0xc0016900,
704 0x00000099,
705 0x20002000, 482 0x20002000,
706 0xc0026900,
707 0x000000b8,
708 0x00000000,
709 0x3f800000,
710 0xc0016900,
711 0x0000009a,
712 0x80000000, 483 0x80000000,
713 0xc0016900,
714 0x0000009b,
715 0x20002000, 484 0x20002000,
716 0xc0026900,
717 0x000000ba,
718 0x00000000,
719 0x3f800000,
720 0xc0016900,
721 0x0000009c,
722 0x80000000, 485 0x80000000,
723 0xc0016900,
724 0x0000009d,
725 0x20002000, 486 0x20002000,
726 0xc0026900,
727 0x000000bc,
728 0x00000000,
729 0x3f800000,
730 0xc0016900,
731 0x0000009e,
732 0x80000000, 487 0x80000000,
733 0xc0016900,
734 0x0000009f,
735 0x20002000, 488 0x20002000,
736 0xc0026900,
737 0x000000be,
738 0x00000000,
739 0x3f800000,
740 0xc0016900,
741 0x000000a0,
742 0x80000000, 489 0x80000000,
743 0xc0016900,
744 0x000000a1,
745 0x20002000, 490 0x20002000,
746 0xc0026900,
747 0x000000c0,
748 0x00000000,
749 0x3f800000,
750 0xc0016900,
751 0x000000a2,
752 0x80000000, 491 0x80000000,
753 0xc0016900,
754 0x000000a3,
755 0x20002000, 492 0x20002000,
756 0xc0026900,
757 0x000000c2,
758 0x00000000,
759 0x3f800000,
760 0xc0016900,
761 0x000000a4,
762 0x80000000, 493 0x80000000,
763 0xc0016900,
764 0x000000a5,
765 0x20002000, 494 0x20002000,
766 0xc0026900,
767 0x000000c4,
768 0x00000000,
769 0x3f800000,
770 0xc0016900,
771 0x000000a6,
772 0x80000000, 495 0x80000000,
773 0xc0016900,
774 0x000000a7,
775 0x20002000, 496 0x20002000,
776 0xc0026900,
777 0x000000c6,
778 0x00000000,
779 0x3f800000,
780 0xc0016900,
781 0x000000a8,
782 0x80000000, 497 0x80000000,
783 0xc0016900,
784 0x000000a9,
785 0x20002000, 498 0x20002000,
786 0xc0026900,
787 0x000000c8,
788 0x00000000,
789 0x3f800000,
790 0xc0016900,
791 0x000000aa,
792 0x80000000, 499 0x80000000,
793 0xc0016900,
794 0x000000ab,
795 0x20002000, 500 0x20002000,
796 0xc0026900,
797 0x000000ca,
798 0x00000000,
799 0x3f800000,
800 0xc0016900,
801 0x000000ac,
802 0x80000000, 501 0x80000000,
803 0xc0016900,
804 0x000000ad,
805 0x20002000, 502 0x20002000,
806 0xc0026900,
807 0x000000cc,
808 0x00000000,
809 0x3f800000,
810 0xc0016900,
811 0x000000ae,
812 0x80000000, 503 0x80000000,
813 0xc0016900,
814 0x000000af,
815 0x20002000, 504 0x20002000,
816 0xc0026900,
817 0x000000ce,
818 0x00000000,
819 0x3f800000,
820 0xc0016900,
821 0x000000b0,
822 0x80000000, 505 0x80000000,
823 0xc0016900,
824 0x000000b1,
825 0x20002000, 506 0x20002000,
826 0xc0026900, 507 0x00000000, /* PA_SC_VPORT_ZMIN_0 */
827 0x000000d0,
828 0x00000000,
829 0x3f800000, 508 0x3f800000,
830 0xc0016900,
831 0x000000b2,
832 0x80000000,
833 0xc0016900,
834 0x000000b3,
835 0x20002000,
836 0xc0026900,
837 0x000000d2,
838 0x00000000, 509 0x00000000,
839 0x3f800000, 510 0x3f800000,
840 0xc0016900,
841 0x00000293,
842 0x00514000,
843 0xc0016900,
844 0x00000300,
845 0x00000000,
846 0xc0016900,
847 0x00000301,
848 0x00000000, 511 0x00000000,
849 0xc0016900, 512 0x3f800000,
850 0x00000312,
851 0xffffffff,
852 0xc0016900,
853 0x00000307,
854 0x00000000, 513 0x00000000,
855 0xc0016900, 514 0x3f800000,
856 0x00000308,
857 0x00000000, 515 0x00000000,
858 0xc0016900, 516 0x3f800000,
859 0x00000283,
860 0x00000000, 517 0x00000000,
861 0xc0016900, 518 0x3f800000,
862 0x00000292,
863 0x00000000, 519 0x00000000,
864 0xc0066900, 520 0x3f800000,
865 0x0000010f,
866 0x00000000, 521 0x00000000,
522 0x3f800000,
867 0x00000000, 523 0x00000000,
524 0x3f800000,
868 0x00000000, 525 0x00000000,
526 0x3f800000,
869 0x00000000, 527 0x00000000,
528 0x3f800000,
870 0x00000000, 529 0x00000000,
530 0x3f800000,
871 0x00000000, 531 0x00000000,
872 0xc0016900, 532 0x3f800000,
873 0x00000206,
874 0x00000000, 533 0x00000000,
875 0xc0016900, 534 0x3f800000,
876 0x00000207,
877 0x00000000, 535 0x00000000,
878 0xc0016900, 536 0x3f800000,
879 0x00000208,
880 0x00000000, 537 0x00000000,
881 0xc0046900,
882 0x00000303,
883 0x3f800000, 538 0x3f800000,
539
540 0xc0026900,
541 0x00000292,
542 0x00000000, /* PA_SC_MPASS_PS_CNTL */
543 0x00514000, /* PA_SC_MODE_CNTL */
544
545 0xc0096900,
546 0x00000300,
547 0x00000000, /* PA_SC_LINE_CNTL */
548 0x00000000, /* PA_SC_AA_CONFIG */
549 0x0000002d, /* PA_SU_VTX_CNTL */
550 0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */
884 0x3f800000, 551 0x3f800000,
885 0x3f800000, 552 0x3f800000,
886 0x3f800000, 553 0x3f800000,
887 0xc0016900, 554 0x00000000, /* PA_SC_SAMPLE_LOCS_MCTX */
888 0x00000205,
889 0x00000004,
890 0xc0016900,
891 0x00000280,
892 0x00000000,
893 0xc0016900,
894 0x00000281,
895 0x00000000, 555 0x00000000,
556
896 0xc0016900, 557 0xc0016900,
558 0x00000312,
559 0xffffffff, /* PA_SC_AA_MASK */
560
561 0xc0066900,
897 0x0000037e, 562 0x0000037e,
898 0x00000000, 563 0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */
899 0xc0016900, 564 0x00000000, /* PA_SU_POLY_OFFSET_CLAMP */
900 0x00000382, 565 0x00000000, /* PA_SU_POLY_OFFSET_FRONT_SCALE */
901 0x00000000, 566 0x00000000, /* PA_SU_POLY_OFFSET_FRONT_OFFSET */
902 0xc0016900, 567 0x00000000, /* PA_SU_POLY_OFFSET_BACK_SCALE */
903 0x00000380, 568 0x00000000, /* PA_SU_POLY_OFFSET_BACK_OFFSET */
904 0x00000000, 569
905 0xc0016900, 570 0xc0046900,
906 0x00000383,
907 0x00000000,
908 0xc0016900,
909 0x00000381,
910 0x00000000,
911 0xc0016900,
912 0x00000282,
913 0x00000008,
914 0xc0016900,
915 0x00000302,
916 0x0000002d,
917 0xc0016900,
918 0x0000037f,
919 0x00000000,
920 0xc0016900,
921 0x000001b2,
922 0x00000001,
923 0xc0016900,
924 0x000001b6, 571 0x000001b6,
925 0x00000000, 572 0x00000000, /* SPI_INPUT_Z */
926 0xc0016900, 573 0x00000000, /* SPI_FOG_CNTL */
927 0x000001b7, 574 0x00000000, /* SPI_FOG_FUNC_SCALE */
928 0x00000000, 575 0x00000000, /* SPI_FOG_FUNC_BIAS */
929 0xc0016900, 576
930 0x000001b8,
931 0x00000000,
932 0xc0016900,
933 0x000001b9,
934 0x00000000,
935 0xc0016900, 577 0xc0016900,
936 0x00000225, 578 0x00000225,
937 0x00000000, 579 0x00000000, /* SQ_PGM_START_FS */
580
938 0xc0016900, 581 0xc0016900,
939 0x00000229, 582 0x00000229,
940 0x00000000, 583 0x00000000, /* SQ_PGM_RESOURCES_FS */
584
941 0xc0016900, 585 0xc0016900,
942 0x00000237, 586 0x00000237,
943 0x00000000, 587 0x00000000, /* SQ_PGM_CF_OFFSET_FS */
944 0xc0016900, 588
945 0x00000100, 589 0xc0026900,
946 0x00000800,
947 0xc0016900,
948 0x00000101,
949 0x00000000,
950 0xc0016900,
951 0x00000102,
952 0x00000000,
953 0xc0016900,
954 0x000002a8, 590 0x000002a8,
955 0x00000000, 591 0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */
956 0xc0016900, 592 0x00000000, /* VGT_INSTANCE_STEP_RATE_1 */
957 0x000002a9, 593
958 0x00000000, 594 0xc0116900,
959 0xc0016900, 595 0x00000280,
960 0x00000103, 596 0x00000000, /* PA_SU_POINT_SIZE */
961 0x00000000, 597 0x00000000, /* PA_SU_POINT_MINMAX */
962 0xc0016900, 598 0x00000008, /* PA_SU_LINE_CNTL */
963 0x00000284, 599 0x00000000, /* PA_SC_LINE_STIPPLE */
964 0x00000000, 600 0x00000000, /* VGT_OUTPUT_PATH_CNTL */
965 0xc0016900, 601 0x00000000, /* VGT_HOS_CNTL */
966 0x00000290, 602 0x00000000, /* VGT_HOS_MAX_TESS_LEVEL */
967 0x00000000, 603 0x00000000, /* VGT_HOS_MIN_TESS_LEVEL */
968 0xc0016900, 604 0x00000000, /* VGT_HOS_REUSE_DEPTH */
969 0x00000285, 605 0x00000000, /* VGT_GROUP_PRIM_TYPE */
970 0x00000000, 606 0x00000000, /* VGT_GROUP_FIRST_DECR */
971 0xc0016900, 607 0x00000000, /* VGT_GROUP_DECR */
972 0x00000286, 608 0x00000000, /* VGT_GROUP_VECT_0_CNTL */
973 0x00000000, 609 0x00000000, /* VGT_GROUP_VECT_1_CNTL */
974 0xc0016900, 610 0x00000000, /* VGT_GROUP_VECT_0_FMT_CNTL */
975 0x00000287, 611 0x00000000, /* VGT_GROUP_VECT_1_FMT_CNTL */
976 0x00000000, 612 0x00000000, /* VGT_GS_MODE */
977 0xc0016900, 613
978 0x00000288,
979 0x00000000,
980 0xc0016900,
981 0x00000289,
982 0x00000000,
983 0xc0016900,
984 0x0000028a,
985 0x00000000,
986 0xc0016900,
987 0x0000028b,
988 0x00000000,
989 0xc0016900,
990 0x0000028c,
991 0x00000000,
992 0xc0016900,
993 0x0000028d,
994 0x00000000,
995 0xc0016900,
996 0x0000028e,
997 0x00000000,
998 0xc0016900,
999 0x0000028f,
1000 0x00000000,
1001 0xc0016900, 614 0xc0016900,
1002 0x000002a1, 615 0x000002a1,
1003 0x00000000, 616 0x00000000, /* VGT_PRIMITIVEID_EN */
617
1004 0xc0016900, 618 0xc0016900,
1005 0x000002a5, 619 0x000002a5,
1006 0x00000000, 620 0x00000000, /* VGT_MULTI_PRIM_ID_RESET_EN */
1007 0xc0016900, 621
622 0xc0036900,
1008 0x000002ac, 623 0x000002ac,
1009 0x00000000, 624 0x00000000, /* VGT_STRMOUT_EN */
1010 0xc0016900, 625 0x00000000, /* VGT_REUSE_OFF */
1011 0x000002ad, 626 0x00000000, /* VGT_VTX_CNT_EN */
1012 0x00000000, 627
1013 0xc0016900,
1014 0x000002ae,
1015 0x00000000,
1016 0xc0016900, 628 0xc0016900,
1017 0x000002c8, 629 0x000002c8,
1018 0x00000000, 630 0x00000000, /* VGT_STRMOUT_BUFFER_EN */
1019 0xc0016900, 631
1020 0x00000206, 632 0xc0076900,
1021 0x00000100,
1022 0xc0016900,
1023 0x00000204,
1024 0x00010000,
1025 0xc0036e00,
1026 0x00000000,
1027 0x00000012,
1028 0x00000000,
1029 0x00000000,
1030 0xc0016900,
1031 0x0000008f,
1032 0x0000000f,
1033 0xc0016900,
1034 0x000001e8,
1035 0x00000001,
1036 0xc0016900,
1037 0x00000202, 633 0x00000202,
1038 0x00cc0000, 634 0x00cc0000, /* CB_COLOR_CONTROL */
635 0x00000210, /* DB_SHADER_CNTL */
636 0x00010000, /* PA_CL_CLIP_CNTL */
637 0x00000244, /* PA_SU_SC_MODE_CNTL */
638 0x00000100, /* PA_CL_VTE_CNTL */
639 0x00000000, /* PA_CL_VS_OUT_CNTL */
640 0x00000000, /* PA_CL_NANINF_CNTL */
641
642 0xc0026900,
643 0x0000008e,
644 0x0000000f, /* CB_TARGET_MASK */
645 0x0000000f, /* CB_SHADER_MASK */
646
1039 0xc0016900, 647 0xc0016900,
1040 0x00000205, 648 0x000001e8,
1041 0x00000244, 649 0x00000001, /* CB_SHADER_CONTROL */
650
1042 0xc0016900, 651 0xc0016900,
1043 0x00000203, 652 0x00000185,
1044 0x00000210, 653 0x00000000, /* SPI_VS_OUT_ID_0 */
654
1045 0xc0016900, 655 0xc0016900,
656 0x00000191,
657 0x00000b00, /* SPI_PS_INPUT_CNTL_0 */
658
659 0xc0056900,
1046 0x000001b1, 660 0x000001b1,
661 0x00000000, /* SPI_VS_OUT_CONFIG */
662 0x00000001, /* SPI_THREAD_GROUPING */
663 0x00000001, /* SPI_PS_IN_CONTROL_0 */
664 0x00000000, /* SPI_PS_IN_CONTROL_1 */
665 0x00000000, /* SPI_INTERP_CONTROL_0 */
666
667 0xc0036e00, /* SET_SAMPLER */
1047 0x00000000, 668 0x00000000,
1048 0xc0016900, 669 0x00000012,
1049 0x00000185,
1050 0x00000000,
1051 0xc0016900,
1052 0x000001b3,
1053 0x00000001,
1054 0xc0016900,
1055 0x000001b4,
1056 0x00000000, 670 0x00000000,
1057 0xc0016900,
1058 0x00000191,
1059 0x00000b00,
1060 0xc0016900,
1061 0x000001b5,
1062 0x00000000, 671 0x00000000,
1063}; 672};
1064 673
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index c39c1bc13016..c3ea212e0c3c 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -25,6 +25,7 @@
25 * Alex Deucher 25 * Alex Deucher
26 * Jerome Glisse 26 * Jerome Glisse
27 */ 27 */
28#include <linux/kernel.h>
28#include "drmP.h" 29#include "drmP.h"
29#include "radeon.h" 30#include "radeon.h"
30#include "r600d.h" 31#include "r600d.h"
@@ -166,7 +167,7 @@ static void r600_cs_track_init(struct r600_cs_track *track)
166static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) 167static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
167{ 168{
168 struct r600_cs_track *track = p->track; 169 struct r600_cs_track *track = p->track;
169 u32 bpe = 0, pitch, slice_tile_max, size, tmp, height; 170 u32 bpe = 0, pitch, slice_tile_max, size, tmp, height, pitch_align;
170 volatile u32 *ib = p->ib->ptr; 171 volatile u32 *ib = p->ib->ptr;
171 172
172 if (G_0280A0_TILE_MODE(track->cb_color_info[i])) { 173 if (G_0280A0_TILE_MODE(track->cb_color_info[i])) {
@@ -180,56 +181,57 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
180 i, track->cb_color_info[i]); 181 i, track->cb_color_info[i]);
181 return -EINVAL; 182 return -EINVAL;
182 } 183 }
183 pitch = (G_028060_PITCH_TILE_MAX(track->cb_color_size[i]) + 1) << 3; 184 /* pitch is the number of 8x8 tiles per row */
185 pitch = G_028060_PITCH_TILE_MAX(track->cb_color_size[i]) + 1;
184 slice_tile_max = G_028060_SLICE_TILE_MAX(track->cb_color_size[i]) + 1; 186 slice_tile_max = G_028060_SLICE_TILE_MAX(track->cb_color_size[i]) + 1;
185 if (!pitch) { 187 height = size / (pitch * 8 * bpe);
186 dev_warn(p->dev, "%s:%d cb pitch (%d) for %d invalid (0x%08X)\n",
187 __func__, __LINE__, pitch, i, track->cb_color_size[i]);
188 return -EINVAL;
189 }
190 height = size / (pitch * bpe);
191 if (height > 8192) 188 if (height > 8192)
192 height = 8192; 189 height = 8192;
190 if (height > 7)
191 height &= ~0x7;
193 switch (G_0280A0_ARRAY_MODE(track->cb_color_info[i])) { 192 switch (G_0280A0_ARRAY_MODE(track->cb_color_info[i])) {
194 case V_0280A0_ARRAY_LINEAR_GENERAL: 193 case V_0280A0_ARRAY_LINEAR_GENERAL:
194 /* technically height & 0x7 */
195 break;
195 case V_0280A0_ARRAY_LINEAR_ALIGNED: 196 case V_0280A0_ARRAY_LINEAR_ALIGNED:
196 if (pitch & 0x3f) { 197 pitch_align = max((u32)64, (u32)(track->group_size / bpe)) / 8;
197 dev_warn(p->dev, "%s:%d cb pitch (%d x %d = %d) invalid\n", 198 if (!IS_ALIGNED(pitch, pitch_align)) {
198 __func__, __LINE__, pitch, bpe, pitch * bpe); 199 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
200 __func__, __LINE__, pitch);
199 return -EINVAL; 201 return -EINVAL;
200 } 202 }
201 if ((pitch * bpe) & (track->group_size - 1)) { 203 if (!IS_ALIGNED(height, 8)) {
202 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n", 204 dev_warn(p->dev, "%s:%d cb height (%d) invalid\n",
203 __func__, __LINE__, pitch); 205 __func__, __LINE__, height);
204 return -EINVAL; 206 return -EINVAL;
205 } 207 }
206 break; 208 break;
207 case V_0280A0_ARRAY_1D_TILED_THIN1: 209 case V_0280A0_ARRAY_1D_TILED_THIN1:
208 if ((pitch * 8 * bpe * track->nsamples) & (track->group_size - 1)) { 210 pitch_align = max((u32)8, (u32)(track->group_size / (8 * bpe * track->nsamples))) / 8;
211 if (!IS_ALIGNED(pitch, pitch_align)) {
209 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n", 212 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
210 __func__, __LINE__, pitch); 213 __func__, __LINE__, pitch);
214 return -EINVAL;
215 }
216 if (!IS_ALIGNED(height, 8)) {
217 dev_warn(p->dev, "%s:%d cb height (%d) invalid\n",
218 __func__, __LINE__, height);
211 return -EINVAL; 219 return -EINVAL;
212 } 220 }
213 height &= ~0x7;
214 if (!height)
215 height = 8;
216 break; 221 break;
217 case V_0280A0_ARRAY_2D_TILED_THIN1: 222 case V_0280A0_ARRAY_2D_TILED_THIN1:
218 if (pitch & ((8 * track->nbanks) - 1)) { 223 pitch_align = max((u32)track->nbanks,
224 (u32)(((track->group_size / 8) / (bpe * track->nsamples)) * track->nbanks));
225 if (!IS_ALIGNED(pitch, pitch_align)) {
219 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n", 226 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
220 __func__, __LINE__, pitch); 227 __func__, __LINE__, pitch);
221 return -EINVAL; 228 return -EINVAL;
222 } 229 }
223 tmp = pitch * 8 * bpe * track->nsamples; 230 if (!IS_ALIGNED((height / 8), track->nbanks)) {
224 tmp = tmp / track->nbanks; 231 dev_warn(p->dev, "%s:%d cb height (%d) invalid\n",
225 if (tmp & (track->group_size - 1)) { 232 __func__, __LINE__, height);
226 dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n",
227 __func__, __LINE__, pitch);
228 return -EINVAL; 233 return -EINVAL;
229 } 234 }
230 height &= ~((16 * track->npipes) - 1);
231 if (!height)
232 height = 16 * track->npipes;
233 break; 235 break;
234 default: 236 default:
235 dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__, 237 dev_warn(p->dev, "%s invalid tiling %d for %d (0x%08X)\n", __func__,
@@ -238,16 +240,20 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i)
238 return -EINVAL; 240 return -EINVAL;
239 } 241 }
240 /* check offset */ 242 /* check offset */
241 tmp = height * pitch; 243 tmp = height * pitch * 8 * bpe;
242 if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) { 244 if ((tmp + track->cb_color_bo_offset[i]) > radeon_bo_size(track->cb_color_bo[i])) {
243 dev_warn(p->dev, "%s offset[%d] %d to big\n", __func__, i, track->cb_color_bo_offset[i]); 245 dev_warn(p->dev, "%s offset[%d] %d too big\n", __func__, i, track->cb_color_bo_offset[i]);
246 return -EINVAL;
247 }
248 if (!IS_ALIGNED(track->cb_color_bo_offset[i], track->group_size)) {
249 dev_warn(p->dev, "%s offset[%d] %d not aligned\n", __func__, i, track->cb_color_bo_offset[i]);
244 return -EINVAL; 250 return -EINVAL;
245 } 251 }
246 /* limit max tile */ 252 /* limit max tile */
247 tmp = (height * pitch) >> 6; 253 tmp = (height * pitch * 8) >> 6;
248 if (tmp < slice_tile_max) 254 if (tmp < slice_tile_max)
249 slice_tile_max = tmp; 255 slice_tile_max = tmp;
250 tmp = S_028060_PITCH_TILE_MAX((pitch >> 3) - 1) | 256 tmp = S_028060_PITCH_TILE_MAX(pitch - 1) |
251 S_028060_SLICE_TILE_MAX(slice_tile_max - 1); 257 S_028060_SLICE_TILE_MAX(slice_tile_max - 1);
252 ib[track->cb_color_size_idx[i]] = tmp; 258 ib[track->cb_color_size_idx[i]] = tmp;
253 return 0; 259 return 0;
@@ -289,7 +295,7 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
289 /* Check depth buffer */ 295 /* Check depth buffer */
290 if (G_028800_STENCIL_ENABLE(track->db_depth_control) || 296 if (G_028800_STENCIL_ENABLE(track->db_depth_control) ||
291 G_028800_Z_ENABLE(track->db_depth_control)) { 297 G_028800_Z_ENABLE(track->db_depth_control)) {
292 u32 nviews, bpe, ntiles; 298 u32 nviews, bpe, ntiles, pitch, pitch_align, height, size;
293 if (track->db_bo == NULL) { 299 if (track->db_bo == NULL) {
294 dev_warn(p->dev, "z/stencil with no depth buffer\n"); 300 dev_warn(p->dev, "z/stencil with no depth buffer\n");
295 return -EINVAL; 301 return -EINVAL;
@@ -332,6 +338,51 @@ static int r600_cs_track_check(struct radeon_cs_parser *p)
332 } 338 }
333 ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF); 339 ib[track->db_depth_size_idx] = S_028000_SLICE_TILE_MAX(tmp - 1) | (track->db_depth_size & 0x3FF);
334 } else { 340 } else {
341 size = radeon_bo_size(track->db_bo);
342 pitch = G_028000_PITCH_TILE_MAX(track->db_depth_size) + 1;
343 height = size / (pitch * 8 * bpe);
344 height &= ~0x7;
345 if (!height)
346 height = 8;
347
348 switch (G_028010_ARRAY_MODE(track->db_depth_info)) {
349 case V_028010_ARRAY_1D_TILED_THIN1:
350 pitch_align = (max((u32)8, (u32)(track->group_size / (8 * bpe))) / 8);
351 if (!IS_ALIGNED(pitch, pitch_align)) {
352 dev_warn(p->dev, "%s:%d db pitch (%d) invalid\n",
353 __func__, __LINE__, pitch);
354 return -EINVAL;
355 }
356 if (!IS_ALIGNED(height, 8)) {
357 dev_warn(p->dev, "%s:%d db height (%d) invalid\n",
358 __func__, __LINE__, height);
359 return -EINVAL;
360 }
361 break;
362 case V_028010_ARRAY_2D_TILED_THIN1:
363 pitch_align = max((u32)track->nbanks,
364 (u32)(((track->group_size / 8) / bpe) * track->nbanks));
365 if (!IS_ALIGNED(pitch, pitch_align)) {
366 dev_warn(p->dev, "%s:%d db pitch (%d) invalid\n",
367 __func__, __LINE__, pitch);
368 return -EINVAL;
369 }
370 if ((height / 8) & (track->nbanks - 1)) {
371 dev_warn(p->dev, "%s:%d db height (%d) invalid\n",
372 __func__, __LINE__, height);
373 return -EINVAL;
374 }
375 break;
376 default:
377 dev_warn(p->dev, "%s invalid tiling %d (0x%08X)\n", __func__,
378 G_028010_ARRAY_MODE(track->db_depth_info),
379 track->db_depth_info);
380 return -EINVAL;
381 }
382 if (!IS_ALIGNED(track->db_offset, track->group_size)) {
383 dev_warn(p->dev, "%s offset[%d] %d not aligned\n", __func__, i, track->db_offset);
384 return -EINVAL;
385 }
335 ntiles = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1; 386 ntiles = G_028000_SLICE_TILE_MAX(track->db_depth_size) + 1;
336 nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1; 387 nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1;
337 tmp = ntiles * bpe * 64 * nviews; 388 tmp = ntiles * bpe * 64 * nviews;
@@ -585,7 +636,7 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p)
585 header = radeon_get_ib_value(p, h_idx); 636 header = radeon_get_ib_value(p, h_idx);
586 crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1); 637 crtc_id = radeon_get_ib_value(p, h_idx + 2 + 7 + 1);
587 reg = CP_PACKET0_GET_REG(header); 638 reg = CP_PACKET0_GET_REG(header);
588 mutex_lock(&p->rdev->ddev->mode_config.mutex); 639
589 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC); 640 obj = drm_mode_object_find(p->rdev->ddev, crtc_id, DRM_MODE_OBJECT_CRTC);
590 if (!obj) { 641 if (!obj) {
591 DRM_ERROR("cannot find crtc %d\n", crtc_id); 642 DRM_ERROR("cannot find crtc %d\n", crtc_id);
@@ -620,7 +671,6 @@ static int r600_cs_packet_parse_vline(struct radeon_cs_parser *p)
620 ib[h_idx + 4] = AVIVO_D2MODE_VLINE_STATUS >> 2; 671 ib[h_idx + 4] = AVIVO_D2MODE_VLINE_STATUS >> 2;
621 } 672 }
622out: 673out:
623 mutex_unlock(&p->rdev->ddev->mode_config.mutex);
624 return r; 674 return r;
625} 675}
626 676
@@ -725,7 +775,25 @@ static inline int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx
725 track->db_depth_control = radeon_get_ib_value(p, idx); 775 track->db_depth_control = radeon_get_ib_value(p, idx);
726 break; 776 break;
727 case R_028010_DB_DEPTH_INFO: 777 case R_028010_DB_DEPTH_INFO:
728 track->db_depth_info = radeon_get_ib_value(p, idx); 778 if (r600_cs_packet_next_is_pkt3_nop(p)) {
779 r = r600_cs_packet_next_reloc(p, &reloc);
780 if (r) {
781 dev_warn(p->dev, "bad SET_CONTEXT_REG "
782 "0x%04X\n", reg);
783 return -EINVAL;
784 }
785 track->db_depth_info = radeon_get_ib_value(p, idx);
786 ib[idx] &= C_028010_ARRAY_MODE;
787 track->db_depth_info &= C_028010_ARRAY_MODE;
788 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) {
789 ib[idx] |= S_028010_ARRAY_MODE(V_028010_ARRAY_2D_TILED_THIN1);
790 track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_2D_TILED_THIN1);
791 } else {
792 ib[idx] |= S_028010_ARRAY_MODE(V_028010_ARRAY_1D_TILED_THIN1);
793 track->db_depth_info |= S_028010_ARRAY_MODE(V_028010_ARRAY_1D_TILED_THIN1);
794 }
795 } else
796 track->db_depth_info = radeon_get_ib_value(p, idx);
729 break; 797 break;
730 case R_028004_DB_DEPTH_VIEW: 798 case R_028004_DB_DEPTH_VIEW:
731 track->db_depth_view = radeon_get_ib_value(p, idx); 799 track->db_depth_view = radeon_get_ib_value(p, idx);
@@ -758,8 +826,25 @@ static inline int r600_cs_check_reg(struct radeon_cs_parser *p, u32 reg, u32 idx
758 case R_0280B4_CB_COLOR5_INFO: 826 case R_0280B4_CB_COLOR5_INFO:
759 case R_0280B8_CB_COLOR6_INFO: 827 case R_0280B8_CB_COLOR6_INFO:
760 case R_0280BC_CB_COLOR7_INFO: 828 case R_0280BC_CB_COLOR7_INFO:
761 tmp = (reg - R_0280A0_CB_COLOR0_INFO) / 4; 829 if (r600_cs_packet_next_is_pkt3_nop(p)) {
762 track->cb_color_info[tmp] = radeon_get_ib_value(p, idx); 830 r = r600_cs_packet_next_reloc(p, &reloc);
831 if (r) {
832 dev_err(p->dev, "bad SET_CONTEXT_REG 0x%04X\n", reg);
833 return -EINVAL;
834 }
835 tmp = (reg - R_0280A0_CB_COLOR0_INFO) / 4;
836 track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);
837 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO) {
838 ib[idx] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_2D_TILED_THIN1);
839 track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_2D_TILED_THIN1);
840 } else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO) {
841 ib[idx] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_1D_TILED_THIN1);
842 track->cb_color_info[tmp] |= S_0280A0_ARRAY_MODE(V_0280A0_ARRAY_1D_TILED_THIN1);
843 }
844 } else {
845 tmp = (reg - R_0280A0_CB_COLOR0_INFO) / 4;
846 track->cb_color_info[tmp] = radeon_get_ib_value(p, idx);
847 }
763 break; 848 break;
764 case R_028060_CB_COLOR0_SIZE: 849 case R_028060_CB_COLOR0_SIZE:
765 case R_028064_CB_COLOR1_SIZE: 850 case R_028064_CB_COLOR1_SIZE:
@@ -947,8 +1032,9 @@ static inline unsigned minify(unsigned size, unsigned levels)
947} 1032}
948 1033
949static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels, 1034static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels,
950 unsigned w0, unsigned h0, unsigned d0, unsigned bpe, 1035 unsigned w0, unsigned h0, unsigned d0, unsigned bpe,
951 unsigned *l0_size, unsigned *mipmap_size) 1036 unsigned pitch_align,
1037 unsigned *l0_size, unsigned *mipmap_size)
952{ 1038{
953 unsigned offset, i, level, face; 1039 unsigned offset, i, level, face;
954 unsigned width, height, depth, rowstride, size; 1040 unsigned width, height, depth, rowstride, size;
@@ -961,13 +1047,13 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels
961 height = minify(h0, i); 1047 height = minify(h0, i);
962 depth = minify(d0, i); 1048 depth = minify(d0, i);
963 for(face = 0; face < nfaces; face++) { 1049 for(face = 0; face < nfaces; face++) {
964 rowstride = ((width * bpe) + 255) & ~255; 1050 rowstride = ALIGN((width * bpe), pitch_align);
965 size = height * rowstride * depth; 1051 size = height * rowstride * depth;
966 offset += size; 1052 offset += size;
967 offset = (offset + 0x1f) & ~0x1f; 1053 offset = (offset + 0x1f) & ~0x1f;
968 } 1054 }
969 } 1055 }
970 *l0_size = (((w0 * bpe) + 255) & ~255) * h0 * d0; 1056 *l0_size = ALIGN((w0 * bpe), pitch_align) * h0 * d0;
971 *mipmap_size = offset; 1057 *mipmap_size = offset;
972 if (!blevel) 1058 if (!blevel)
973 *mipmap_size -= *l0_size; 1059 *mipmap_size -= *l0_size;
@@ -986,16 +1072,23 @@ static void r600_texture_size(unsigned nfaces, unsigned blevel, unsigned nlevels
986 * the texture and mipmap bo object are big enough to cover this resource. 1072 * the texture and mipmap bo object are big enough to cover this resource.
987 */ 1073 */
988static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx, 1074static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 idx,
989 struct radeon_bo *texture, 1075 struct radeon_bo *texture,
990 struct radeon_bo *mipmap) 1076 struct radeon_bo *mipmap,
1077 u32 tiling_flags)
991{ 1078{
1079 struct r600_cs_track *track = p->track;
992 u32 nfaces, nlevels, blevel, w0, h0, d0, bpe = 0; 1080 u32 nfaces, nlevels, blevel, w0, h0, d0, bpe = 0;
993 u32 word0, word1, l0_size, mipmap_size; 1081 u32 word0, word1, l0_size, mipmap_size, pitch, pitch_align;
994 1082
995 /* on legacy kernel we don't perform advanced check */ 1083 /* on legacy kernel we don't perform advanced check */
996 if (p->rdev == NULL) 1084 if (p->rdev == NULL)
997 return 0; 1085 return 0;
1086
998 word0 = radeon_get_ib_value(p, idx + 0); 1087 word0 = radeon_get_ib_value(p, idx + 0);
1088 if (tiling_flags & RADEON_TILING_MACRO)
1089 word0 |= S_038000_TILE_MODE(V_038000_ARRAY_2D_TILED_THIN1);
1090 else if (tiling_flags & RADEON_TILING_MICRO)
1091 word0 |= S_038000_TILE_MODE(V_038000_ARRAY_1D_TILED_THIN1);
999 word1 = radeon_get_ib_value(p, idx + 1); 1092 word1 = radeon_get_ib_value(p, idx + 1);
1000 w0 = G_038000_TEX_WIDTH(word0) + 1; 1093 w0 = G_038000_TEX_WIDTH(word0) + 1;
1001 h0 = G_038004_TEX_HEIGHT(word1) + 1; 1094 h0 = G_038004_TEX_HEIGHT(word1) + 1;
@@ -1022,11 +1115,55 @@ static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 i
1022 __func__, __LINE__, G_038004_DATA_FORMAT(word1)); 1115 __func__, __LINE__, G_038004_DATA_FORMAT(word1));
1023 return -EINVAL; 1116 return -EINVAL;
1024 } 1117 }
1118
1119 pitch = G_038000_PITCH(word0) + 1;
1120 switch (G_038000_TILE_MODE(word0)) {
1121 case V_038000_ARRAY_LINEAR_GENERAL:
1122 pitch_align = 1;
1123 /* XXX check height align */
1124 break;
1125 case V_038000_ARRAY_LINEAR_ALIGNED:
1126 pitch_align = max((u32)64, (u32)(track->group_size / bpe)) / 8;
1127 if (!IS_ALIGNED(pitch, pitch_align)) {
1128 dev_warn(p->dev, "%s:%d tex pitch (%d) invalid\n",
1129 __func__, __LINE__, pitch);
1130 return -EINVAL;
1131 }
1132 /* XXX check height align */
1133 break;
1134 case V_038000_ARRAY_1D_TILED_THIN1:
1135 pitch_align = max((u32)8, (u32)(track->group_size / (8 * bpe))) / 8;
1136 if (!IS_ALIGNED(pitch, pitch_align)) {
1137 dev_warn(p->dev, "%s:%d tex pitch (%d) invalid\n",
1138 __func__, __LINE__, pitch);
1139 return -EINVAL;
1140 }
1141 /* XXX check height align */
1142 break;
1143 case V_038000_ARRAY_2D_TILED_THIN1:
1144 pitch_align = max((u32)track->nbanks,
1145 (u32)(((track->group_size / 8) / bpe) * track->nbanks));
1146 if (!IS_ALIGNED(pitch, pitch_align)) {
1147 dev_warn(p->dev, "%s:%d tex pitch (%d) invalid\n",
1148 __func__, __LINE__, pitch);
1149 return -EINVAL;
1150 }
1151 /* XXX check height align */
1152 break;
1153 default:
1154 dev_warn(p->dev, "%s invalid tiling %d (0x%08X)\n", __func__,
1155 G_038000_TILE_MODE(word0), word0);
1156 return -EINVAL;
1157 }
1158 /* XXX check offset align */
1159
1025 word0 = radeon_get_ib_value(p, idx + 4); 1160 word0 = radeon_get_ib_value(p, idx + 4);
1026 word1 = radeon_get_ib_value(p, idx + 5); 1161 word1 = radeon_get_ib_value(p, idx + 5);
1027 blevel = G_038010_BASE_LEVEL(word0); 1162 blevel = G_038010_BASE_LEVEL(word0);
1028 nlevels = G_038014_LAST_LEVEL(word1); 1163 nlevels = G_038014_LAST_LEVEL(word1);
1029 r600_texture_size(nfaces, blevel, nlevels, w0, h0, d0, bpe, &l0_size, &mipmap_size); 1164 r600_texture_size(nfaces, blevel, nlevels, w0, h0, d0, bpe,
1165 (pitch_align * bpe),
1166 &l0_size, &mipmap_size);
1030 /* using get ib will give us the offset into the texture bo */ 1167 /* using get ib will give us the offset into the texture bo */
1031 word0 = radeon_get_ib_value(p, idx + 2); 1168 word0 = radeon_get_ib_value(p, idx + 2);
1032 if ((l0_size + word0) > radeon_bo_size(texture)) { 1169 if ((l0_size + word0) > radeon_bo_size(texture)) {
@@ -1240,6 +1377,10 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
1240 return -EINVAL; 1377 return -EINVAL;
1241 } 1378 }
1242 ib[idx+1+(i*7)+2] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); 1379 ib[idx+1+(i*7)+2] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
1380 if (reloc->lobj.tiling_flags & RADEON_TILING_MACRO)
1381 ib[idx+1+(i*7)+0] |= S_038000_TILE_MODE(V_038000_ARRAY_2D_TILED_THIN1);
1382 else if (reloc->lobj.tiling_flags & RADEON_TILING_MICRO)
1383 ib[idx+1+(i*7)+0] |= S_038000_TILE_MODE(V_038000_ARRAY_1D_TILED_THIN1);
1243 texture = reloc->robj; 1384 texture = reloc->robj;
1244 /* tex mip base */ 1385 /* tex mip base */
1245 r = r600_cs_packet_next_reloc(p, &reloc); 1386 r = r600_cs_packet_next_reloc(p, &reloc);
@@ -1250,7 +1391,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
1250 ib[idx+1+(i*7)+3] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); 1391 ib[idx+1+(i*7)+3] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
1251 mipmap = reloc->robj; 1392 mipmap = reloc->robj;
1252 r = r600_check_texture_resource(p, idx+(i*7)+1, 1393 r = r600_check_texture_resource(p, idx+(i*7)+1,
1253 texture, mipmap); 1394 texture, mipmap, reloc->lobj.tiling_flags);
1254 if (r) 1395 if (r)
1255 return r; 1396 return r;
1256 break; 1397 break;
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 26b4bc9d89a5..e6a58ed48dcf 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -435,7 +435,8 @@ static int r600_hdmi_find_free_block(struct drm_device *dev)
435 } 435 }
436 } 436 }
437 437
438 if (rdev->family == CHIP_RS600 || rdev->family == CHIP_RS690) { 438 if (rdev->family == CHIP_RS600 || rdev->family == CHIP_RS690 ||
439 rdev->family == CHIP_RS740) {
439 return free_blocks[0] ? R600_HDMI_BLOCK1 : 0; 440 return free_blocks[0] ? R600_HDMI_BLOCK1 : 0;
440 } else if (rdev->family >= CHIP_R600) { 441 } else if (rdev->family >= CHIP_R600) {
441 if (free_blocks[0]) 442 if (free_blocks[0])
@@ -466,7 +467,8 @@ static void r600_hdmi_assign_block(struct drm_encoder *encoder)
466 if (ASIC_IS_DCE32(rdev)) 467 if (ASIC_IS_DCE32(rdev))
467 radeon_encoder->hdmi_config_offset = dig->dig_encoder ? 468 radeon_encoder->hdmi_config_offset = dig->dig_encoder ?
468 R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1; 469 R600_HDMI_CONFIG2 : R600_HDMI_CONFIG1;
469 } else if (rdev->family >= CHIP_R600) { 470 } else if (rdev->family >= CHIP_R600 || rdev->family == CHIP_RS600 ||
471 rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) {
470 radeon_encoder->hdmi_offset = r600_hdmi_find_free_block(dev); 472 radeon_encoder->hdmi_offset = r600_hdmi_find_free_block(dev);
471 } 473 }
472} 474}
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 59c1f8793e60..858a1920c0d7 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -239,12 +239,18 @@
239#define GRBM_SOFT_RESET 0x8020 239#define GRBM_SOFT_RESET 0x8020
240#define SOFT_RESET_CP (1<<0) 240#define SOFT_RESET_CP (1<<0)
241 241
242#define CG_THERMAL_STATUS 0x7F4
243#define ASIC_T(x) ((x) << 0)
244#define ASIC_T_MASK 0x1FF
245#define ASIC_T_SHIFT 0
246
242#define HDP_HOST_PATH_CNTL 0x2C00 247#define HDP_HOST_PATH_CNTL 0x2C00
243#define HDP_NONSURFACE_BASE 0x2C04 248#define HDP_NONSURFACE_BASE 0x2C04
244#define HDP_NONSURFACE_INFO 0x2C08 249#define HDP_NONSURFACE_INFO 0x2C08
245#define HDP_NONSURFACE_SIZE 0x2C0C 250#define HDP_NONSURFACE_SIZE 0x2C0C
246#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 251#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
247#define HDP_TILING_CONFIG 0x2F3C 252#define HDP_TILING_CONFIG 0x2F3C
253#define HDP_DEBUG1 0x2F34
248 254
249#define MC_VM_AGP_TOP 0x2184 255#define MC_VM_AGP_TOP 0x2184
250#define MC_VM_AGP_BOT 0x2188 256#define MC_VM_AGP_BOT 0x2188
@@ -1154,6 +1160,10 @@
1154#define S_038000_TILE_MODE(x) (((x) & 0xF) << 3) 1160#define S_038000_TILE_MODE(x) (((x) & 0xF) << 3)
1155#define G_038000_TILE_MODE(x) (((x) >> 3) & 0xF) 1161#define G_038000_TILE_MODE(x) (((x) >> 3) & 0xF)
1156#define C_038000_TILE_MODE 0xFFFFFF87 1162#define C_038000_TILE_MODE 0xFFFFFF87
1163#define V_038000_ARRAY_LINEAR_GENERAL 0x00000000
1164#define V_038000_ARRAY_LINEAR_ALIGNED 0x00000001
1165#define V_038000_ARRAY_1D_TILED_THIN1 0x00000002
1166#define V_038000_ARRAY_2D_TILED_THIN1 0x00000004
1157#define S_038000_TILE_TYPE(x) (((x) & 0x1) << 7) 1167#define S_038000_TILE_TYPE(x) (((x) & 0x1) << 7)
1158#define G_038000_TILE_TYPE(x) (((x) >> 7) & 0x1) 1168#define G_038000_TILE_TYPE(x) (((x) >> 7) & 0x1)
1159#define C_038000_TILE_TYPE 0xFFFFFF7F 1169#define C_038000_TILE_TYPE 0xFFFFFF7F
@@ -1357,6 +1367,8 @@
1357#define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15) 1367#define S_028010_ARRAY_MODE(x) (((x) & 0xF) << 15)
1358#define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF) 1368#define G_028010_ARRAY_MODE(x) (((x) >> 15) & 0xF)
1359#define C_028010_ARRAY_MODE 0xFFF87FFF 1369#define C_028010_ARRAY_MODE 0xFFF87FFF
1370#define V_028010_ARRAY_1D_TILED_THIN1 0x00000002
1371#define V_028010_ARRAY_2D_TILED_THIN1 0x00000004
1360#define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25) 1372#define S_028010_TILE_SURFACE_ENABLE(x) (((x) & 0x1) << 25)
1361#define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1) 1373#define G_028010_TILE_SURFACE_ENABLE(x) (((x) >> 25) & 0x1)
1362#define C_028010_TILE_SURFACE_ENABLE 0xFDFFFFFF 1374#define C_028010_TILE_SURFACE_ENABLE 0xFDFFFFFF
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index ab61aaa887bb..c84f9a311550 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -178,6 +178,9 @@ void radeon_combios_get_power_modes(struct radeon_device *rdev);
178void radeon_atombios_get_power_modes(struct radeon_device *rdev); 178void radeon_atombios_get_power_modes(struct radeon_device *rdev);
179void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level); 179void radeon_atom_set_voltage(struct radeon_device *rdev, u16 level);
180void rs690_pm_info(struct radeon_device *rdev); 180void rs690_pm_info(struct radeon_device *rdev);
181extern u32 rv6xx_get_temp(struct radeon_device *rdev);
182extern u32 rv770_get_temp(struct radeon_device *rdev);
183extern u32 evergreen_get_temp(struct radeon_device *rdev);
181 184
182/* 185/*
183 * Fences. 186 * Fences.
@@ -351,6 +354,7 @@ struct radeon_mc {
351 int vram_mtrr; 354 int vram_mtrr;
352 bool vram_is_ddr; 355 bool vram_is_ddr;
353 bool igp_sideport_enabled; 356 bool igp_sideport_enabled;
357 u64 gtt_base_align;
354}; 358};
355 359
356bool radeon_combios_sideport_present(struct radeon_device *rdev); 360bool radeon_combios_sideport_present(struct radeon_device *rdev);
@@ -670,6 +674,13 @@ struct radeon_pm_profile {
670 int dpms_on_cm_idx; 674 int dpms_on_cm_idx;
671}; 675};
672 676
677enum radeon_int_thermal_type {
678 THERMAL_TYPE_NONE,
679 THERMAL_TYPE_RV6XX,
680 THERMAL_TYPE_RV770,
681 THERMAL_TYPE_EVERGREEN,
682};
683
673struct radeon_voltage { 684struct radeon_voltage {
674 enum radeon_voltage_type type; 685 enum radeon_voltage_type type;
675 /* gpio voltage */ 686 /* gpio voltage */
@@ -765,6 +776,9 @@ struct radeon_pm {
765 enum radeon_pm_profile_type profile; 776 enum radeon_pm_profile_type profile;
766 int profile_index; 777 int profile_index;
767 struct radeon_pm_profile profiles[PM_PROFILE_MAX]; 778 struct radeon_pm_profile profiles[PM_PROFILE_MAX];
779 /* internal thermal controller on rv6xx+ */
780 enum radeon_int_thermal_type int_thermal_type;
781 struct device *int_hwmon_dev;
768}; 782};
769 783
770 784
@@ -901,6 +915,7 @@ struct r600_asic {
901 unsigned tiling_nbanks; 915 unsigned tiling_nbanks;
902 unsigned tiling_npipes; 916 unsigned tiling_npipes;
903 unsigned tiling_group_size; 917 unsigned tiling_group_size;
918 unsigned tile_config;
904 struct r100_gpu_lockup lockup; 919 struct r100_gpu_lockup lockup;
905}; 920};
906 921
@@ -925,6 +940,7 @@ struct rv770_asic {
925 unsigned tiling_nbanks; 940 unsigned tiling_nbanks;
926 unsigned tiling_npipes; 941 unsigned tiling_npipes;
927 unsigned tiling_group_size; 942 unsigned tiling_group_size;
943 unsigned tile_config;
928 struct r100_gpu_lockup lockup; 944 struct r100_gpu_lockup lockup;
929}; 945};
930 946
@@ -950,6 +966,7 @@ struct evergreen_asic {
950 unsigned tiling_nbanks; 966 unsigned tiling_nbanks;
951 unsigned tiling_npipes; 967 unsigned tiling_npipes;
952 unsigned tiling_group_size; 968 unsigned tiling_group_size;
969 unsigned tile_config;
953}; 970};
954 971
955union radeon_asic_config { 972union radeon_asic_config {
@@ -1032,6 +1049,9 @@ struct radeon_device {
1032 uint32_t pcie_reg_mask; 1049 uint32_t pcie_reg_mask;
1033 radeon_rreg_t pciep_rreg; 1050 radeon_rreg_t pciep_rreg;
1034 radeon_wreg_t pciep_wreg; 1051 radeon_wreg_t pciep_wreg;
1052 /* io port */
1053 void __iomem *rio_mem;
1054 resource_size_t rio_mem_size;
1035 struct radeon_clock clock; 1055 struct radeon_clock clock;
1036 struct radeon_mc mc; 1056 struct radeon_mc mc;
1037 struct radeon_gart gart; 1057 struct radeon_gart gart;
@@ -1068,6 +1088,7 @@ struct radeon_device {
1068 struct mutex vram_mutex; 1088 struct mutex vram_mutex;
1069 1089
1070 /* audio stuff */ 1090 /* audio stuff */
1091 bool audio_enabled;
1071 struct timer_list audio_timer; 1092 struct timer_list audio_timer;
1072 int audio_channels; 1093 int audio_channels;
1073 int audio_rate; 1094 int audio_rate;
@@ -1113,6 +1134,26 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
1113 } 1134 }
1114} 1135}
1115 1136
1137static inline u32 r100_io_rreg(struct radeon_device *rdev, u32 reg)
1138{
1139 if (reg < rdev->rio_mem_size)
1140 return ioread32(rdev->rio_mem + reg);
1141 else {
1142 iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX);
1143 return ioread32(rdev->rio_mem + RADEON_MM_DATA);
1144 }
1145}
1146
1147static inline void r100_io_wreg(struct radeon_device *rdev, u32 reg, u32 v)
1148{
1149 if (reg < rdev->rio_mem_size)
1150 iowrite32(v, rdev->rio_mem + reg);
1151 else {
1152 iowrite32(reg, rdev->rio_mem + RADEON_MM_INDEX);
1153 iowrite32(v, rdev->rio_mem + RADEON_MM_DATA);
1154 }
1155}
1156
1116/* 1157/*
1117 * Cast helper 1158 * Cast helper
1118 */ 1159 */
@@ -1151,6 +1192,8 @@ static inline void r100_mm_wreg(struct radeon_device *rdev, uint32_t reg, uint32
1151 WREG32_PLL(reg, tmp_); \ 1192 WREG32_PLL(reg, tmp_); \
1152 } while (0) 1193 } while (0)
1153#define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg))) 1194#define DREG32_SYS(sqf, rdev, reg) seq_printf((sqf), #reg " : 0x%08X\n", r100_mm_rreg((rdev), (reg)))
1195#define RREG32_IO(reg) r100_io_rreg(rdev, (reg))
1196#define WREG32_IO(reg, v) r100_io_wreg(rdev, (reg), (v))
1154 1197
1155/* 1198/*
1156 * Indirect registers accessor 1199 * Indirect registers accessor
@@ -1414,6 +1457,13 @@ extern void r700_cp_fini(struct radeon_device *rdev);
1414extern void evergreen_disable_interrupt_state(struct radeon_device *rdev); 1457extern void evergreen_disable_interrupt_state(struct radeon_device *rdev);
1415extern int evergreen_irq_set(struct radeon_device *rdev); 1458extern int evergreen_irq_set(struct radeon_device *rdev);
1416 1459
1460/* radeon_acpi.c */
1461#if defined(CONFIG_ACPI)
1462extern int radeon_acpi_init(struct radeon_device *rdev);
1463#else
1464static inline int radeon_acpi_init(struct radeon_device *rdev) { return 0; }
1465#endif
1466
1417/* evergreen */ 1467/* evergreen */
1418struct evergreen_mc_save { 1468struct evergreen_mc_save {
1419 u32 vga_control[6]; 1469 u32 vga_control[6];
diff --git a/drivers/gpu/drm/radeon/radeon_acpi.c b/drivers/gpu/drm/radeon/radeon_acpi.c
new file mode 100644
index 000000000000..e366434035cb
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_acpi.c
@@ -0,0 +1,67 @@
1#include <linux/pci.h>
2#include <linux/acpi.h>
3#include <linux/slab.h>
4#include <acpi/acpi_drivers.h>
5#include <acpi/acpi_bus.h>
6
7#include "drmP.h"
8#include "drm.h"
9#include "drm_sarea.h"
10#include "drm_crtc_helper.h"
11#include "radeon.h"
12
13#include <linux/vga_switcheroo.h>
14
15/* Call the ATIF method
16 *
17 * Note: currently we discard the output
18 */
19static int radeon_atif_call(acpi_handle handle)
20{
21 acpi_status status;
22 union acpi_object atif_arg_elements[2];
23 struct acpi_object_list atif_arg;
24 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL};
25
26 atif_arg.count = 2;
27 atif_arg.pointer = &atif_arg_elements[0];
28
29 atif_arg_elements[0].type = ACPI_TYPE_INTEGER;
30 atif_arg_elements[0].integer.value = 0;
31 atif_arg_elements[1].type = ACPI_TYPE_INTEGER;
32 atif_arg_elements[1].integer.value = 0;
33
34 status = acpi_evaluate_object(handle, "ATIF", &atif_arg, &buffer);
35
36 /* Fail only if calling the method fails and ATIF is supported */
37 if (ACPI_FAILURE(status) && status != AE_NOT_FOUND) {
38 printk(KERN_INFO "failed to evaluate ATIF got %s\n", acpi_format_exception(status));
39 kfree(buffer.pointer);
40 return 1;
41 }
42
43 kfree(buffer.pointer);
44 return 0;
45}
46
47/* Call all ACPI methods here */
48int radeon_acpi_init(struct radeon_device *rdev)
49{
50 acpi_handle handle;
51 int ret;
52
53 /* No need to proceed if we're sure that ATIF is not supported */
54 if (!ASIC_IS_AVIVO(rdev) || !rdev->bios)
55 return 0;
56
57 /* Get the device handle */
58 handle = DEVICE_ACPI_HANDLE(&rdev->pdev->dev);
59
60 /* Call the ATIF method */
61 ret = radeon_atif_call(handle);
62 if (ret)
63 return ret;
64
65 return 0;
66}
67
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index c0bbaa64157a..a5aff755f0d2 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -113,6 +113,7 @@ void r100_wb_fini(struct radeon_device *rdev);
113int r100_wb_init(struct radeon_device *rdev); 113int r100_wb_init(struct radeon_device *rdev);
114int r100_cp_reset(struct radeon_device *rdev); 114int r100_cp_reset(struct radeon_device *rdev);
115void r100_vga_render_disable(struct radeon_device *rdev); 115void r100_vga_render_disable(struct radeon_device *rdev);
116void r100_restore_sanity(struct radeon_device *rdev);
116int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p, 117int r100_cs_track_check_pkt3_indx_buffer(struct radeon_cs_parser *p,
117 struct radeon_cs_packet *pkt, 118 struct radeon_cs_packet *pkt,
118 struct radeon_bo *robj); 119 struct radeon_bo *robj);
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 99bd8a9c56b3..0a97aeb083dd 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -280,6 +280,15 @@ static bool radeon_atom_apply_quirks(struct drm_device *dev,
280 } 280 }
281 } 281 }
282 282
283 /* ASUS HD 3600 board lists the DVI port as HDMI */
284 if ((dev->pdev->device == 0x9598) &&
285 (dev->pdev->subsystem_vendor == 0x1043) &&
286 (dev->pdev->subsystem_device == 0x01e4)) {
287 if (*connector_type == DRM_MODE_CONNECTOR_HDMIA) {
288 *connector_type = DRM_MODE_CONNECTOR_DVII;
289 }
290 }
291
283 /* ASUS HD 3450 board lists the DVI port as HDMI */ 292 /* ASUS HD 3450 board lists the DVI port as HDMI */
284 if ((dev->pdev->device == 0x95C5) && 293 if ((dev->pdev->device == 0x95C5) &&
285 (dev->pdev->subsystem_vendor == 0x1043) && 294 (dev->pdev->subsystem_vendor == 0x1043) &&
@@ -1029,8 +1038,15 @@ bool radeon_atombios_sideport_present(struct radeon_device *rdev)
1029 data_offset); 1038 data_offset);
1030 switch (crev) { 1039 switch (crev) {
1031 case 1: 1040 case 1:
1032 if (igp_info->info.ucMemoryType & 0xf0) 1041 /* AMD IGPS */
1033 return true; 1042 if ((rdev->family == CHIP_RS690) ||
1043 (rdev->family == CHIP_RS740)) {
1044 if (igp_info->info.ulBootUpMemoryClock)
1045 return true;
1046 } else {
1047 if (igp_info->info.ucMemoryType & 0xf0)
1048 return true;
1049 }
1034 break; 1050 break;
1035 case 2: 1051 case 2:
1036 if (igp_info->info_2.ucMemoryType & 0x0f) 1052 if (igp_info->info_2.ucMemoryType & 0x0f)
@@ -1773,14 +1789,22 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev)
1773 } 1789 }
1774 1790
1775 /* add the i2c bus for thermal/fan chip */ 1791 /* add the i2c bus for thermal/fan chip */
1776 /* no support for internal controller yet */
1777 if (controller->ucType > 0) { 1792 if (controller->ucType > 0) {
1778 if ((controller->ucType == ATOM_PP_THERMALCONTROLLER_RV6xx) || 1793 if (controller->ucType == ATOM_PP_THERMALCONTROLLER_RV6xx) {
1779 (controller->ucType == ATOM_PP_THERMALCONTROLLER_RV770) || 1794 DRM_INFO("Internal thermal controller %s fan control\n",
1780 (controller->ucType == ATOM_PP_THERMALCONTROLLER_EVERGREEN)) { 1795 (controller->ucFanParameters &
1796 ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
1797 rdev->pm.int_thermal_type = THERMAL_TYPE_RV6XX;
1798 } else if (controller->ucType == ATOM_PP_THERMALCONTROLLER_RV770) {
1799 DRM_INFO("Internal thermal controller %s fan control\n",
1800 (controller->ucFanParameters &
1801 ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
1802 rdev->pm.int_thermal_type = THERMAL_TYPE_RV770;
1803 } else if (controller->ucType == ATOM_PP_THERMALCONTROLLER_EVERGREEN) {
1781 DRM_INFO("Internal thermal controller %s fan control\n", 1804 DRM_INFO("Internal thermal controller %s fan control\n",
1782 (controller->ucFanParameters & 1805 (controller->ucFanParameters &
1783 ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with"); 1806 ATOM_PP_FANPARAMETERS_NOFAN) ? "without" : "with");
1807 rdev->pm.int_thermal_type = THERMAL_TYPE_EVERGREEN;
1784 } else if ((controller->ucType == 1808 } else if ((controller->ucType ==
1785 ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO) || 1809 ATOM_PP_THERMALCONTROLLER_EXTERNAL_GPIO) ||
1786 (controller->ucType == 1810 (controller->ucType ==
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index d1c1d8dd93ce..5e45cb27eb98 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -2941,9 +2941,8 @@ static void combios_write_ram_size(struct drm_device *dev)
2941 if (rev < 3) { 2941 if (rev < 3) {
2942 mem_cntl = RBIOS32(offset + 1); 2942 mem_cntl = RBIOS32(offset + 1);
2943 mem_size = RBIOS16(offset + 5); 2943 mem_size = RBIOS16(offset + 5);
2944 if (((rdev->flags & RADEON_FAMILY_MASK) < CHIP_R200) && 2944 if ((rdev->family < CHIP_R200) &&
2945 ((dev->pdev->device != 0x515e) 2945 !ASIC_IS_RN50(rdev))
2946 && (dev->pdev->device != 0x5969)))
2947 WREG32(RADEON_MEM_CNTL, mem_cntl); 2946 WREG32(RADEON_MEM_CNTL, mem_cntl);
2948 } 2947 }
2949 } 2948 }
@@ -2954,10 +2953,8 @@ static void combios_write_ram_size(struct drm_device *dev)
2954 if (offset) { 2953 if (offset) {
2955 rev = RBIOS8(offset - 1); 2954 rev = RBIOS8(offset - 1);
2956 if (rev < 1) { 2955 if (rev < 1) {
2957 if (((rdev->flags & RADEON_FAMILY_MASK) < 2956 if ((rdev->family < CHIP_R200)
2958 CHIP_R200) 2957 && !ASIC_IS_RN50(rdev)) {
2959 && ((dev->pdev->device != 0x515e)
2960 && (dev->pdev->device != 0x5969))) {
2961 int ram = 0; 2958 int ram = 0;
2962 int mem_addr_mapping = 0; 2959 int mem_addr_mapping = 0;
2963 2960
@@ -3050,6 +3047,14 @@ void radeon_combios_asic_init(struct drm_device *dev)
3050 rdev->pdev->subsystem_device == 0x308b) 3047 rdev->pdev->subsystem_device == 0x308b)
3051 return; 3048 return;
3052 3049
3050 /* quirk for rs4xx HP dv5000 laptop to make it resume
3051 * - it hangs on resume inside the dynclk 1 table.
3052 */
3053 if (rdev->family == CHIP_RS480 &&
3054 rdev->pdev->subsystem_vendor == 0x103c &&
3055 rdev->pdev->subsystem_device == 0x30a4)
3056 return;
3057
3053 /* DYN CLK 1 */ 3058 /* DYN CLK 1 */
3054 table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE); 3059 table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);
3055 if (table) 3060 if (table)
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index f58f8bd8f77b..adccbc2c202c 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -771,14 +771,14 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
771 } else 771 } else
772 ret = connector_status_connected; 772 ret = connector_status_connected;
773 773
774 /* multiple connectors on the same encoder with the same ddc line 774 /* This gets complicated. We have boards with VGA + HDMI with a
775 * This tends to be HDMI and DVI on the same encoder with the 775 * shared DDC line and we have boards with DVI-D + HDMI with a shared
776 * same ddc line. If the edid says HDMI, consider the HDMI port 776 * DDC line. The latter is more complex because with DVI<->HDMI adapters
777 * connected and the DVI port disconnected. If the edid doesn't 777 * you don't really know what's connected to which port as both are digital.
778 * say HDMI, vice versa.
779 */ 778 */
780 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) { 779 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
781 struct drm_device *dev = connector->dev; 780 struct drm_device *dev = connector->dev;
781 struct radeon_device *rdev = dev->dev_private;
782 struct drm_connector *list_connector; 782 struct drm_connector *list_connector;
783 struct radeon_connector *list_radeon_connector; 783 struct radeon_connector *list_radeon_connector;
784 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) { 784 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
@@ -788,15 +788,10 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
788 if (list_radeon_connector->shared_ddc && 788 if (list_radeon_connector->shared_ddc &&
789 (list_radeon_connector->ddc_bus->rec.i2c_id == 789 (list_radeon_connector->ddc_bus->rec.i2c_id ==
790 radeon_connector->ddc_bus->rec.i2c_id)) { 790 radeon_connector->ddc_bus->rec.i2c_id)) {
791 if (drm_detect_hdmi_monitor(radeon_connector->edid)) { 791 /* cases where both connectors are digital */
792 if (connector->connector_type == DRM_MODE_CONNECTOR_DVID) { 792 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
793 kfree(radeon_connector->edid); 793 /* hpd is our only option in this case */
794 radeon_connector->edid = NULL; 794 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
795 ret = connector_status_disconnected;
796 }
797 } else {
798 if ((connector->connector_type == DRM_MODE_CONNECTOR_HDMIA) ||
799 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIB)) {
800 kfree(radeon_connector->edid); 795 kfree(radeon_connector->edid);
801 radeon_connector->edid = NULL; 796 radeon_connector->edid = NULL;
802 ret = connector_status_disconnected; 797 ret = connector_status_disconnected;
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 37533bec1f25..0fea894fc127 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -226,20 +226,20 @@ void radeon_gtt_location(struct radeon_device *rdev, struct radeon_mc *mc)
226{ 226{
227 u64 size_af, size_bf; 227 u64 size_af, size_bf;
228 228
229 size_af = 0xFFFFFFFF - mc->vram_end; 229 size_af = ((0xFFFFFFFF - mc->vram_end) + mc->gtt_base_align) & ~mc->gtt_base_align;
230 size_bf = mc->vram_start; 230 size_bf = mc->vram_start & ~mc->gtt_base_align;
231 if (size_bf > size_af) { 231 if (size_bf > size_af) {
232 if (mc->gtt_size > size_bf) { 232 if (mc->gtt_size > size_bf) {
233 dev_warn(rdev->dev, "limiting GTT\n"); 233 dev_warn(rdev->dev, "limiting GTT\n");
234 mc->gtt_size = size_bf; 234 mc->gtt_size = size_bf;
235 } 235 }
236 mc->gtt_start = mc->vram_start - mc->gtt_size; 236 mc->gtt_start = (mc->vram_start & ~mc->gtt_base_align) - mc->gtt_size;
237 } else { 237 } else {
238 if (mc->gtt_size > size_af) { 238 if (mc->gtt_size > size_af) {
239 dev_warn(rdev->dev, "limiting GTT\n"); 239 dev_warn(rdev->dev, "limiting GTT\n");
240 mc->gtt_size = size_af; 240 mc->gtt_size = size_af;
241 } 241 }
242 mc->gtt_start = mc->vram_end + 1; 242 mc->gtt_start = (mc->vram_end + 1 + mc->gtt_base_align) & ~mc->gtt_base_align;
243 } 243 }
244 mc->gtt_end = mc->gtt_start + mc->gtt_size - 1; 244 mc->gtt_end = mc->gtt_start + mc->gtt_size - 1;
245 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n", 245 dev_info(rdev->dev, "GTT: %lluM 0x%08llX - 0x%08llX\n",
@@ -415,6 +415,22 @@ static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
415 return r; 415 return r;
416} 416}
417 417
418static void cail_ioreg_write(struct card_info *info, uint32_t reg, uint32_t val)
419{
420 struct radeon_device *rdev = info->dev->dev_private;
421
422 WREG32_IO(reg*4, val);
423}
424
425static uint32_t cail_ioreg_read(struct card_info *info, uint32_t reg)
426{
427 struct radeon_device *rdev = info->dev->dev_private;
428 uint32_t r;
429
430 r = RREG32_IO(reg*4);
431 return r;
432}
433
418int radeon_atombios_init(struct radeon_device *rdev) 434int radeon_atombios_init(struct radeon_device *rdev)
419{ 435{
420 struct card_info *atom_card_info = 436 struct card_info *atom_card_info =
@@ -427,6 +443,15 @@ int radeon_atombios_init(struct radeon_device *rdev)
427 atom_card_info->dev = rdev->ddev; 443 atom_card_info->dev = rdev->ddev;
428 atom_card_info->reg_read = cail_reg_read; 444 atom_card_info->reg_read = cail_reg_read;
429 atom_card_info->reg_write = cail_reg_write; 445 atom_card_info->reg_write = cail_reg_write;
446 /* needed for iio ops */
447 if (rdev->rio_mem) {
448 atom_card_info->ioreg_read = cail_ioreg_read;
449 atom_card_info->ioreg_write = cail_ioreg_write;
450 } else {
451 DRM_ERROR("Unable to find PCI I/O BAR; using MMIO for ATOM IIO\n");
452 atom_card_info->ioreg_read = cail_reg_read;
453 atom_card_info->ioreg_write = cail_reg_write;
454 }
430 atom_card_info->mc_read = cail_mc_read; 455 atom_card_info->mc_read = cail_mc_read;
431 atom_card_info->mc_write = cail_mc_write; 456 atom_card_info->mc_write = cail_mc_write;
432 atom_card_info->pll_read = cail_pll_read; 457 atom_card_info->pll_read = cail_pll_read;
@@ -573,7 +598,7 @@ int radeon_device_init(struct radeon_device *rdev,
573 struct pci_dev *pdev, 598 struct pci_dev *pdev,
574 uint32_t flags) 599 uint32_t flags)
575{ 600{
576 int r; 601 int r, i;
577 int dma_bits; 602 int dma_bits;
578 603
579 rdev->shutdown = false; 604 rdev->shutdown = false;
@@ -659,6 +684,17 @@ int radeon_device_init(struct radeon_device *rdev,
659 DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base); 684 DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)rdev->rmmio_base);
660 DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); 685 DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size);
661 686
687 /* io port mapping */
688 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
689 if (pci_resource_flags(rdev->pdev, i) & IORESOURCE_IO) {
690 rdev->rio_mem_size = pci_resource_len(rdev->pdev, i);
691 rdev->rio_mem = pci_iomap(rdev->pdev, i, rdev->rio_mem_size);
692 break;
693 }
694 }
695 if (rdev->rio_mem == NULL)
696 DRM_ERROR("Unable to find PCI I/O BAR\n");
697
662 /* if we have > 1 VGA cards, then disable the radeon VGA resources */ 698 /* if we have > 1 VGA cards, then disable the radeon VGA resources */
663 /* this will fail for cards that aren't VGA class devices, just 699 /* this will fail for cards that aren't VGA class devices, just
664 * ignore it */ 700 * ignore it */
@@ -701,6 +737,8 @@ void radeon_device_fini(struct radeon_device *rdev)
701 destroy_workqueue(rdev->wq); 737 destroy_workqueue(rdev->wq);
702 vga_switcheroo_unregister_client(rdev->pdev); 738 vga_switcheroo_unregister_client(rdev->pdev);
703 vga_client_register(rdev->pdev, NULL, NULL, NULL); 739 vga_client_register(rdev->pdev, NULL, NULL, NULL);
740 pci_iounmap(rdev->pdev, rdev->rio_mem);
741 rdev->rio_mem = NULL;
704 iounmap(rdev->rmmio); 742 iounmap(rdev->rmmio);
705 rdev->rmmio = NULL; 743 rdev->rmmio = NULL;
706} 744}
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 8154cdf796e4..a68728dbd41d 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -558,15 +558,17 @@ static void radeon_compute_pll_legacy(struct radeon_pll *pll,
558 current_freq = radeon_div(tmp, ref_div * post_div); 558 current_freq = radeon_div(tmp, ref_div * post_div);
559 559
560 if (pll->flags & RADEON_PLL_PREFER_CLOSEST_LOWER) { 560 if (pll->flags & RADEON_PLL_PREFER_CLOSEST_LOWER) {
561 error = freq - current_freq; 561 if (freq < current_freq)
562 error = error < 0 ? 0xffffffff : error; 562 error = 0xffffffff;
563 else
564 error = freq - current_freq;
563 } else 565 } else
564 error = abs(current_freq - freq); 566 error = abs(current_freq - freq);
565 vco_diff = abs(vco - best_vco); 567 vco_diff = abs(vco - best_vco);
566 568
567 if ((best_vco == 0 && error < best_error) || 569 if ((best_vco == 0 && error < best_error) ||
568 (best_vco != 0 && 570 (best_vco != 0 &&
569 (error < best_error - 100 || 571 ((best_error > 100 && error < best_error - 100) ||
570 (abs(error - best_error) < 100 && vco_diff < best_vco_diff)))) { 572 (abs(error - best_error) < 100 && vco_diff < best_vco_diff)))) {
571 best_post_div = post_div; 573 best_post_div = post_div;
572 best_ref_div = ref_div; 574 best_ref_div = ref_div;
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c
index ed0ceb3fc40a..6f8a2e572878 100644
--- a/drivers/gpu/drm/radeon/radeon_drv.c
+++ b/drivers/gpu/drm/radeon/radeon_drv.c
@@ -46,9 +46,10 @@
46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs 46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
47 * - 2.4.0 - add crtc id query 47 * - 2.4.0 - add crtc id query
48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen 48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
49 * - 2.6.0 - add tiling config query (r6xx+)
49 */ 50 */
50#define KMS_DRIVER_MAJOR 2 51#define KMS_DRIVER_MAJOR 2
51#define KMS_DRIVER_MINOR 5 52#define KMS_DRIVER_MINOR 6
52#define KMS_DRIVER_PATCHLEVEL 0 53#define KMS_DRIVER_PATCHLEVEL 0
53int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags); 54int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
54int radeon_driver_unload_kms(struct drm_device *dev); 55int radeon_driver_unload_kms(struct drm_device *dev);
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c
index 6a70c0dc7f92..8931c8e78101 100644
--- a/drivers/gpu/drm/radeon/radeon_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_kms.c
@@ -49,7 +49,7 @@ int radeon_driver_unload_kms(struct drm_device *dev)
49int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags) 49int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
50{ 50{
51 struct radeon_device *rdev; 51 struct radeon_device *rdev;
52 int r; 52 int r, acpi_status;
53 53
54 rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL); 54 rdev = kzalloc(sizeof(struct radeon_device), GFP_KERNEL);
55 if (rdev == NULL) { 55 if (rdev == NULL) {
@@ -77,6 +77,12 @@ int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags)
77 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n"); 77 dev_err(&dev->pdev->dev, "Fatal error during GPU init\n");
78 goto out; 78 goto out;
79 } 79 }
80
81 /* Call ACPI methods */
82 acpi_status = radeon_acpi_init(rdev);
83 if (acpi_status)
84 dev_err(&dev->pdev->dev, "Error during ACPI methods call\n");
85
80 /* Again modeset_init should fail only on fatal error 86 /* Again modeset_init should fail only on fatal error
81 * otherwise it should provide enough functionalities 87 * otherwise it should provide enough functionalities
82 * for shadowfb to run 88 * for shadowfb to run
@@ -128,7 +134,8 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
128 for (i = 0, found = 0; i < rdev->num_crtc; i++) { 134 for (i = 0, found = 0; i < rdev->num_crtc; i++) {
129 crtc = (struct drm_crtc *)minfo->crtcs[i]; 135 crtc = (struct drm_crtc *)minfo->crtcs[i];
130 if (crtc && crtc->base.id == value) { 136 if (crtc && crtc->base.id == value) {
131 value = i; 137 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
138 value = radeon_crtc->crtc_id;
132 found = 1; 139 found = 1;
133 break; 140 break;
134 } 141 }
@@ -141,6 +148,18 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
141 case RADEON_INFO_ACCEL_WORKING2: 148 case RADEON_INFO_ACCEL_WORKING2:
142 value = rdev->accel_working; 149 value = rdev->accel_working;
143 break; 150 break;
151 case RADEON_INFO_TILING_CONFIG:
152 if (rdev->family >= CHIP_CEDAR)
153 value = rdev->config.evergreen.tile_config;
154 else if (rdev->family >= CHIP_RV770)
155 value = rdev->config.rv770.tile_config;
156 else if (rdev->family >= CHIP_R600)
157 value = rdev->config.r600.tile_config;
158 else {
159 DRM_DEBUG("tiling config is r6xx+ only!\n");
160 return -EINVAL;
161 }
162 break;
144 default: 163 default:
145 DRM_DEBUG("Invalid request %d\n", info->request); 164 DRM_DEBUG("Invalid request %d\n", info->request);
146 return -EINVAL; 165 return -EINVAL;
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index bad77f40a9da..5688a0cf6bbe 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -108,6 +108,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
108 udelay(panel_pwr_delay * 1000); 108 udelay(panel_pwr_delay * 1000);
109 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl); 109 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
110 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl); 110 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
111 udelay(panel_pwr_delay * 1000);
111 break; 112 break;
112 } 113 }
113 114
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
index f2ed27c8055b..032040397743 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
@@ -642,8 +642,8 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
642 } 642 }
643 flicker_removal = (tmp + 500) / 1000; 643 flicker_removal = (tmp + 500) / 1000;
644 644
645 if (flicker_removal < 2) 645 if (flicker_removal < 3)
646 flicker_removal = 2; 646 flicker_removal = 3;
647 for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) { 647 for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) {
648 if (flicker_removal == SLOPE_limit[i]) 648 if (flicker_removal == SLOPE_limit[i])
649 break; 649 break;
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index d5b9373ce06c..0afd1e62347d 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -110,6 +110,7 @@ int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
110 bo->surface_reg = -1; 110 bo->surface_reg = -1;
111 INIT_LIST_HEAD(&bo->list); 111 INIT_LIST_HEAD(&bo->list);
112 112
113retry:
113 radeon_ttm_placement_from_domain(bo, domain); 114 radeon_ttm_placement_from_domain(bo, domain);
114 /* Kernel allocation are uninterruptible */ 115 /* Kernel allocation are uninterruptible */
115 mutex_lock(&rdev->vram_mutex); 116 mutex_lock(&rdev->vram_mutex);
@@ -118,10 +119,15 @@ int radeon_bo_create(struct radeon_device *rdev, struct drm_gem_object *gobj,
118 &radeon_ttm_bo_destroy); 119 &radeon_ttm_bo_destroy);
119 mutex_unlock(&rdev->vram_mutex); 120 mutex_unlock(&rdev->vram_mutex);
120 if (unlikely(r != 0)) { 121 if (unlikely(r != 0)) {
121 if (r != -ERESTARTSYS) 122 if (r != -ERESTARTSYS) {
123 if (domain == RADEON_GEM_DOMAIN_VRAM) {
124 domain |= RADEON_GEM_DOMAIN_GTT;
125 goto retry;
126 }
122 dev_err(rdev->dev, 127 dev_err(rdev->dev,
123 "object_init failed for (%lu, 0x%08X)\n", 128 "object_init failed for (%lu, 0x%08X)\n",
124 size, domain); 129 size, domain);
130 }
125 return r; 131 return r;
126 } 132 }
127 *bo_ptr = bo; 133 *bo_ptr = bo;
@@ -321,6 +327,7 @@ int radeon_bo_list_validate(struct list_head *head)
321{ 327{
322 struct radeon_bo_list *lobj; 328 struct radeon_bo_list *lobj;
323 struct radeon_bo *bo; 329 struct radeon_bo *bo;
330 u32 domain;
324 int r; 331 int r;
325 332
326 list_for_each_entry(lobj, head, list) { 333 list_for_each_entry(lobj, head, list) {
@@ -333,17 +340,19 @@ int radeon_bo_list_validate(struct list_head *head)
333 list_for_each_entry(lobj, head, list) { 340 list_for_each_entry(lobj, head, list) {
334 bo = lobj->bo; 341 bo = lobj->bo;
335 if (!bo->pin_count) { 342 if (!bo->pin_count) {
336 if (lobj->wdomain) { 343 domain = lobj->wdomain ? lobj->wdomain : lobj->rdomain;
337 radeon_ttm_placement_from_domain(bo, 344
338 lobj->wdomain); 345 retry:
339 } else { 346 radeon_ttm_placement_from_domain(bo, domain);
340 radeon_ttm_placement_from_domain(bo,
341 lobj->rdomain);
342 }
343 r = ttm_bo_validate(&bo->tbo, &bo->placement, 347 r = ttm_bo_validate(&bo->tbo, &bo->placement,
344 true, false, false); 348 true, false, false);
345 if (unlikely(r)) 349 if (unlikely(r)) {
350 if (r != -ERESTARTSYS && domain == RADEON_GEM_DOMAIN_VRAM) {
351 domain |= RADEON_GEM_DOMAIN_GTT;
352 goto retry;
353 }
346 return r; 354 return r;
355 }
347 } 356 }
348 lobj->gpu_offset = radeon_bo_gpu_offset(bo); 357 lobj->gpu_offset = radeon_bo_gpu_offset(bo);
349 lobj->tiling_flags = bo->tiling_flags; 358 lobj->tiling_flags = bo->tiling_flags;
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 115d26b762cc..ed66062ae9d0 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -27,6 +27,8 @@
27#include <linux/acpi.h> 27#include <linux/acpi.h>
28#endif 28#endif
29#include <linux/power_supply.h> 29#include <linux/power_supply.h>
30#include <linux/hwmon.h>
31#include <linux/hwmon-sysfs.h>
30 32
31#define RADEON_IDLE_LOOP_MS 100 33#define RADEON_IDLE_LOOP_MS 100
32#define RADEON_RECLOCK_DELAY_MS 200 34#define RADEON_RECLOCK_DELAY_MS 200
@@ -423,6 +425,82 @@ fail:
423static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile); 425static DEVICE_ATTR(power_profile, S_IRUGO | S_IWUSR, radeon_get_pm_profile, radeon_set_pm_profile);
424static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method); 426static DEVICE_ATTR(power_method, S_IRUGO | S_IWUSR, radeon_get_pm_method, radeon_set_pm_method);
425 427
428static ssize_t radeon_hwmon_show_temp(struct device *dev,
429 struct device_attribute *attr,
430 char *buf)
431{
432 struct drm_device *ddev = pci_get_drvdata(to_pci_dev(dev));
433 struct radeon_device *rdev = ddev->dev_private;
434 u32 temp;
435
436 switch (rdev->pm.int_thermal_type) {
437 case THERMAL_TYPE_RV6XX:
438 temp = rv6xx_get_temp(rdev);
439 break;
440 case THERMAL_TYPE_RV770:
441 temp = rv770_get_temp(rdev);
442 break;
443 case THERMAL_TYPE_EVERGREEN:
444 temp = evergreen_get_temp(rdev);
445 break;
446 default:
447 temp = 0;
448 break;
449 }
450
451 return snprintf(buf, PAGE_SIZE, "%d\n", temp);
452}
453
454static ssize_t radeon_hwmon_show_name(struct device *dev,
455 struct device_attribute *attr,
456 char *buf)
457{
458 return sprintf(buf, "radeon\n");
459}
460
461static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, radeon_hwmon_show_temp, NULL, 0);
462static SENSOR_DEVICE_ATTR(name, S_IRUGO, radeon_hwmon_show_name, NULL, 0);
463
464static struct attribute *hwmon_attributes[] = {
465 &sensor_dev_attr_temp1_input.dev_attr.attr,
466 &sensor_dev_attr_name.dev_attr.attr,
467 NULL
468};
469
470static const struct attribute_group hwmon_attrgroup = {
471 .attrs = hwmon_attributes,
472};
473
474static void radeon_hwmon_init(struct radeon_device *rdev)
475{
476 int err;
477
478 rdev->pm.int_hwmon_dev = NULL;
479
480 switch (rdev->pm.int_thermal_type) {
481 case THERMAL_TYPE_RV6XX:
482 case THERMAL_TYPE_RV770:
483 case THERMAL_TYPE_EVERGREEN:
484 rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev);
485 dev_set_drvdata(rdev->pm.int_hwmon_dev, rdev->ddev);
486 err = sysfs_create_group(&rdev->pm.int_hwmon_dev->kobj,
487 &hwmon_attrgroup);
488 if (err)
489 DRM_ERROR("Unable to create hwmon sysfs file: %d\n", err);
490 break;
491 default:
492 break;
493 }
494}
495
496static void radeon_hwmon_fini(struct radeon_device *rdev)
497{
498 if (rdev->pm.int_hwmon_dev) {
499 sysfs_remove_group(&rdev->pm.int_hwmon_dev->kobj, &hwmon_attrgroup);
500 hwmon_device_unregister(rdev->pm.int_hwmon_dev);
501 }
502}
503
426void radeon_pm_suspend(struct radeon_device *rdev) 504void radeon_pm_suspend(struct radeon_device *rdev)
427{ 505{
428 bool flush_wq = false; 506 bool flush_wq = false;
@@ -470,6 +548,7 @@ int radeon_pm_init(struct radeon_device *rdev)
470 rdev->pm.dynpm_can_downclock = true; 548 rdev->pm.dynpm_can_downclock = true;
471 rdev->pm.current_sclk = rdev->clock.default_sclk; 549 rdev->pm.current_sclk = rdev->clock.default_sclk;
472 rdev->pm.current_mclk = rdev->clock.default_mclk; 550 rdev->pm.current_mclk = rdev->clock.default_mclk;
551 rdev->pm.int_thermal_type = THERMAL_TYPE_NONE;
473 552
474 if (rdev->bios) { 553 if (rdev->bios) {
475 if (rdev->is_atom_bios) 554 if (rdev->is_atom_bios)
@@ -480,6 +559,8 @@ int radeon_pm_init(struct radeon_device *rdev)
480 radeon_pm_init_profile(rdev); 559 radeon_pm_init_profile(rdev);
481 } 560 }
482 561
562 /* set up the internal thermal sensor if applicable */
563 radeon_hwmon_init(rdev);
483 if (rdev->pm.num_power_states > 1) { 564 if (rdev->pm.num_power_states > 1) {
484 /* where's the best place to put these? */ 565 /* where's the best place to put these? */
485 ret = device_create_file(rdev->dev, &dev_attr_power_profile); 566 ret = device_create_file(rdev->dev, &dev_attr_power_profile);
@@ -535,6 +616,7 @@ void radeon_pm_fini(struct radeon_device *rdev)
535#endif 616#endif
536 } 617 }
537 618
619 radeon_hwmon_fini(rdev);
538 if (rdev->pm.i2c_bus) 620 if (rdev->pm.i2c_bus)
539 radeon_i2c_destroy(rdev->pm.i2c_bus); 621 radeon_i2c_destroy(rdev->pm.i2c_bus);
540} 622}
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 9e4240b3bf0b..ae2b76b9a388 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -55,12 +55,6 @@ void rs400_gart_adjust_size(struct radeon_device *rdev)
55 rdev->mc.gtt_size = 32 * 1024 * 1024; 55 rdev->mc.gtt_size = 32 * 1024 * 1024;
56 return; 56 return;
57 } 57 }
58 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480) {
59 /* FIXME: RS400 & RS480 seems to have issue with GART size
60 * if 4G of system memory (needs more testing) */
61 rdev->mc.gtt_size = 32 * 1024 * 1024;
62 DRM_ERROR("Forcing to 32M GART size (because of ASIC bug ?)\n");
63 }
64} 58}
65 59
66void rs400_gart_tlb_flush(struct radeon_device *rdev) 60void rs400_gart_tlb_flush(struct radeon_device *rdev)
@@ -263,6 +257,7 @@ void rs400_mc_init(struct radeon_device *rdev)
263 r100_vram_init_sizes(rdev); 257 r100_vram_init_sizes(rdev);
264 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16; 258 base = (RREG32(RADEON_NB_TOM) & 0xffff) << 16;
265 radeon_vram_location(rdev, &rdev->mc, base); 259 radeon_vram_location(rdev, &rdev->mc, base);
260 rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;
266 radeon_gtt_location(rdev, &rdev->mc); 261 radeon_gtt_location(rdev, &rdev->mc);
267 radeon_update_bandwidth_info(rdev); 262 radeon_update_bandwidth_info(rdev);
268} 263}
@@ -480,6 +475,8 @@ int rs400_init(struct radeon_device *rdev)
480 /* Initialize surface registers */ 475 /* Initialize surface registers */
481 radeon_surface_init(rdev); 476 radeon_surface_init(rdev);
482 /* TODO: disable VGA need to use VGA request */ 477 /* TODO: disable VGA need to use VGA request */
478 /* restore some register to sane defaults */
479 r100_restore_sanity(rdev);
483 /* BIOS*/ 480 /* BIOS*/
484 if (!radeon_get_bios(rdev)) { 481 if (!radeon_get_bios(rdev)) {
485 if (ASIC_IS_AVIVO(rdev)) 482 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 5ce3ccc7a423..85cd911952c1 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -698,6 +698,7 @@ void rs600_mc_init(struct radeon_device *rdev)
698 base = G_000004_MC_FB_START(base) << 16; 698 base = G_000004_MC_FB_START(base) << 16;
699 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); 699 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
700 radeon_vram_location(rdev, &rdev->mc, base); 700 radeon_vram_location(rdev, &rdev->mc, base);
701 rdev->mc.gtt_base_align = 0;
701 radeon_gtt_location(rdev, &rdev->mc); 702 radeon_gtt_location(rdev, &rdev->mc);
702 radeon_update_bandwidth_info(rdev); 703 radeon_update_bandwidth_info(rdev);
703} 704}
@@ -812,6 +813,13 @@ static int rs600_startup(struct radeon_device *rdev)
812 dev_err(rdev->dev, "failled initializing IB (%d).\n", r); 813 dev_err(rdev->dev, "failled initializing IB (%d).\n", r);
813 return r; 814 return r;
814 } 815 }
816
817 r = r600_audio_init(rdev);
818 if (r) {
819 dev_err(rdev->dev, "failed initializing audio\n");
820 return r;
821 }
822
815 return 0; 823 return 0;
816} 824}
817 825
@@ -838,6 +846,7 @@ int rs600_resume(struct radeon_device *rdev)
838 846
839int rs600_suspend(struct radeon_device *rdev) 847int rs600_suspend(struct radeon_device *rdev)
840{ 848{
849 r600_audio_fini(rdev);
841 r100_cp_disable(rdev); 850 r100_cp_disable(rdev);
842 r100_wb_disable(rdev); 851 r100_wb_disable(rdev);
843 rs600_irq_disable(rdev); 852 rs600_irq_disable(rdev);
@@ -847,6 +856,7 @@ int rs600_suspend(struct radeon_device *rdev)
847 856
848void rs600_fini(struct radeon_device *rdev) 857void rs600_fini(struct radeon_device *rdev)
849{ 858{
859 r600_audio_fini(rdev);
850 r100_cp_fini(rdev); 860 r100_cp_fini(rdev);
851 r100_wb_fini(rdev); 861 r100_wb_fini(rdev);
852 r100_ib_fini(rdev); 862 r100_ib_fini(rdev);
@@ -870,6 +880,8 @@ int rs600_init(struct radeon_device *rdev)
870 radeon_scratch_init(rdev); 880 radeon_scratch_init(rdev);
871 /* Initialize surface registers */ 881 /* Initialize surface registers */
872 radeon_surface_init(rdev); 882 radeon_surface_init(rdev);
883 /* restore some register to sane defaults */
884 r100_restore_sanity(rdev);
873 /* BIOS */ 885 /* BIOS */
874 if (!radeon_get_bios(rdev)) { 886 if (!radeon_get_bios(rdev)) {
875 if (ASIC_IS_AVIVO(rdev)) 887 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 5fea094ed8cb..f3a8c9344c64 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -162,6 +162,7 @@ void rs690_mc_init(struct radeon_device *rdev)
162 rs690_pm_info(rdev); 162 rs690_pm_info(rdev);
163 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev); 163 rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
164 radeon_vram_location(rdev, &rdev->mc, base); 164 radeon_vram_location(rdev, &rdev->mc, base);
165 rdev->mc.gtt_base_align = rdev->mc.gtt_size - 1;
165 radeon_gtt_location(rdev, &rdev->mc); 166 radeon_gtt_location(rdev, &rdev->mc);
166 radeon_update_bandwidth_info(rdev); 167 radeon_update_bandwidth_info(rdev);
167} 168}
@@ -640,6 +641,13 @@ static int rs690_startup(struct radeon_device *rdev)
640 dev_err(rdev->dev, "failled initializing IB (%d).\n", r); 641 dev_err(rdev->dev, "failled initializing IB (%d).\n", r);
641 return r; 642 return r;
642 } 643 }
644
645 r = r600_audio_init(rdev);
646 if (r) {
647 dev_err(rdev->dev, "failed initializing audio\n");
648 return r;
649 }
650
643 return 0; 651 return 0;
644} 652}
645 653
@@ -666,6 +674,7 @@ int rs690_resume(struct radeon_device *rdev)
666 674
667int rs690_suspend(struct radeon_device *rdev) 675int rs690_suspend(struct radeon_device *rdev)
668{ 676{
677 r600_audio_fini(rdev);
669 r100_cp_disable(rdev); 678 r100_cp_disable(rdev);
670 r100_wb_disable(rdev); 679 r100_wb_disable(rdev);
671 rs600_irq_disable(rdev); 680 rs600_irq_disable(rdev);
@@ -675,6 +684,7 @@ int rs690_suspend(struct radeon_device *rdev)
675 684
676void rs690_fini(struct radeon_device *rdev) 685void rs690_fini(struct radeon_device *rdev)
677{ 686{
687 r600_audio_fini(rdev);
678 r100_cp_fini(rdev); 688 r100_cp_fini(rdev);
679 r100_wb_fini(rdev); 689 r100_wb_fini(rdev);
680 r100_ib_fini(rdev); 690 r100_ib_fini(rdev);
@@ -698,6 +708,8 @@ int rs690_init(struct radeon_device *rdev)
698 radeon_scratch_init(rdev); 708 radeon_scratch_init(rdev);
699 /* Initialize surface registers */ 709 /* Initialize surface registers */
700 radeon_surface_init(rdev); 710 radeon_surface_init(rdev);
711 /* restore some register to sane defaults */
712 r100_restore_sanity(rdev);
701 /* TODO: disable VGA need to use VGA request */ 713 /* TODO: disable VGA need to use VGA request */
702 /* BIOS*/ 714 /* BIOS*/
703 if (!radeon_get_bios(rdev)) { 715 if (!radeon_get_bios(rdev)) {
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 7d9a7b0a180a..b951b8790175 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -195,6 +195,7 @@ void rv515_mc_init(struct radeon_device *rdev)
195 rv515_vram_get_type(rdev); 195 rv515_vram_get_type(rdev);
196 r100_vram_init_sizes(rdev); 196 r100_vram_init_sizes(rdev);
197 radeon_vram_location(rdev, &rdev->mc, 0); 197 radeon_vram_location(rdev, &rdev->mc, 0);
198 rdev->mc.gtt_base_align = 0;
198 if (!(rdev->flags & RADEON_IS_AGP)) 199 if (!(rdev->flags & RADEON_IS_AGP))
199 radeon_gtt_location(rdev, &rdev->mc); 200 radeon_gtt_location(rdev, &rdev->mc);
200 radeon_update_bandwidth_info(rdev); 201 radeon_update_bandwidth_info(rdev);
@@ -468,6 +469,8 @@ int rv515_init(struct radeon_device *rdev)
468 /* Initialize surface registers */ 469 /* Initialize surface registers */
469 radeon_surface_init(rdev); 470 radeon_surface_init(rdev);
470 /* TODO: disable VGA need to use VGA request */ 471 /* TODO: disable VGA need to use VGA request */
472 /* restore some register to sane defaults */
473 r100_restore_sanity(rdev);
471 /* BIOS*/ 474 /* BIOS*/
472 if (!radeon_get_bios(rdev)) { 475 if (!radeon_get_bios(rdev)) {
473 if (ASIC_IS_AVIVO(rdev)) 476 if (ASIC_IS_AVIVO(rdev))
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 6a7bf1091971..f1c796810117 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -42,6 +42,21 @@
42static void rv770_gpu_init(struct radeon_device *rdev); 42static void rv770_gpu_init(struct radeon_device *rdev);
43void rv770_fini(struct radeon_device *rdev); 43void rv770_fini(struct radeon_device *rdev);
44 44
45/* get temperature in millidegrees */
46u32 rv770_get_temp(struct radeon_device *rdev)
47{
48 u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >>
49 ASIC_T_SHIFT;
50 u32 actual_temp = 0;
51
52 if ((temp >> 9) & 1)
53 actual_temp = 0;
54 else
55 actual_temp = (temp >> 1) & 0xff;
56
57 return actual_temp * 1000;
58}
59
45void rv770_pm_misc(struct radeon_device *rdev) 60void rv770_pm_misc(struct radeon_device *rdev)
46{ 61{
47 int req_ps_idx = rdev->pm.requested_power_state_index; 62 int req_ps_idx = rdev->pm.requested_power_state_index;
@@ -189,7 +204,10 @@ static void rv770_mc_program(struct radeon_device *rdev)
189 WREG32((0x2c20 + j), 0x00000000); 204 WREG32((0x2c20 + j), 0x00000000);
190 WREG32((0x2c24 + j), 0x00000000); 205 WREG32((0x2c24 + j), 0x00000000);
191 } 206 }
192 WREG32(HDP_REG_COHERENCY_FLUSH_CNTL, 0); 207 /* r7xx hw bug. Read from HDP_DEBUG1 rather
208 * than writing to HDP_REG_COHERENCY_FLUSH_CNTL
209 */
210 tmp = RREG32(HDP_DEBUG1);
193 211
194 rv515_mc_stop(rdev, &save); 212 rv515_mc_stop(rdev, &save);
195 if (r600_mc_wait_for_idle(rdev)) { 213 if (r600_mc_wait_for_idle(rdev)) {
@@ -659,8 +677,9 @@ static void rv770_gpu_init(struct radeon_device *rdev)
659 r600_count_pipe_bits((cc_rb_backend_disable & 677 r600_count_pipe_bits((cc_rb_backend_disable &
660 R7XX_MAX_BACKENDS_MASK) >> 16)), 678 R7XX_MAX_BACKENDS_MASK) >> 16)),
661 (cc_rb_backend_disable >> 16)); 679 (cc_rb_backend_disable >> 16));
662 gb_tiling_config |= BACKEND_MAP(backend_map);
663 680
681 rdev->config.rv770.tile_config = gb_tiling_config;
682 gb_tiling_config |= BACKEND_MAP(backend_map);
664 683
665 WREG32(GB_TILING_CONFIG, gb_tiling_config); 684 WREG32(GB_TILING_CONFIG, gb_tiling_config);
666 WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff)); 685 WREG32(DCP_TILING_CONFIG, (gb_tiling_config & 0xffff));
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index 9506f8cb99e0..b7a5a20e81dc 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -122,12 +122,18 @@
122#define GUI_ACTIVE (1<<31) 122#define GUI_ACTIVE (1<<31)
123#define GRBM_STATUS2 0x8014 123#define GRBM_STATUS2 0x8014
124 124
125#define CG_MULT_THERMAL_STATUS 0x740
126#define ASIC_T(x) ((x) << 16)
127#define ASIC_T_MASK 0x3FF0000
128#define ASIC_T_SHIFT 16
129
125#define HDP_HOST_PATH_CNTL 0x2C00 130#define HDP_HOST_PATH_CNTL 0x2C00
126#define HDP_NONSURFACE_BASE 0x2C04 131#define HDP_NONSURFACE_BASE 0x2C04
127#define HDP_NONSURFACE_INFO 0x2C08 132#define HDP_NONSURFACE_INFO 0x2C08
128#define HDP_NONSURFACE_SIZE 0x2C0C 133#define HDP_NONSURFACE_SIZE 0x2C0C
129#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 134#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
130#define HDP_TILING_CONFIG 0x2F3C 135#define HDP_TILING_CONFIG 0x2F3C
136#define HDP_DEBUG1 0x2F34
131 137
132#define MC_SHARED_CHMAP 0x2004 138#define MC_SHARED_CHMAP 0x2004
133#define NOOFCHAN_SHIFT 12 139#define NOOFCHAN_SHIFT 12
diff --git a/drivers/gpu/drm/sis/sis_drv.c b/drivers/gpu/drm/sis/sis_drv.c
index 4fd1f067d380..776bf9e9ea1a 100644
--- a/drivers/gpu/drm/sis/sis_drv.c
+++ b/drivers/gpu/drm/sis/sis_drv.c
@@ -47,9 +47,8 @@ static int sis_driver_load(struct drm_device *dev, unsigned long chipset)
47 dev->dev_private = (void *)dev_priv; 47 dev->dev_private = (void *)dev_priv;
48 dev_priv->chipset = chipset; 48 dev_priv->chipset = chipset;
49 ret = drm_sman_init(&dev_priv->sman, 2, 12, 8); 49 ret = drm_sman_init(&dev_priv->sman, 2, 12, 8);
50 if (ret) { 50 if (ret)
51 kfree(dev_priv); 51 kfree(dev_priv);
52 }
53 52
54 return ret; 53 return ret;
55} 54}
diff --git a/drivers/gpu/drm/sis/sis_mm.c b/drivers/gpu/drm/sis/sis_mm.c
index af22111397d8..07d0f2979cac 100644
--- a/drivers/gpu/drm/sis/sis_mm.c
+++ b/drivers/gpu/drm/sis/sis_mm.c
@@ -78,7 +78,7 @@ static unsigned long sis_sman_mm_offset(void *private, void *ref)
78#else /* CONFIG_FB_SIS[_MODULE] */ 78#else /* CONFIG_FB_SIS[_MODULE] */
79 79
80#define SIS_MM_ALIGN_SHIFT 4 80#define SIS_MM_ALIGN_SHIFT 4
81#define SIS_MM_ALIGN_MASK ( (1 << SIS_MM_ALIGN_SHIFT) - 1) 81#define SIS_MM_ALIGN_MASK ((1 << SIS_MM_ALIGN_SHIFT) - 1)
82 82
83#endif /* CONFIG_FB_SIS[_MODULE] */ 83#endif /* CONFIG_FB_SIS[_MODULE] */
84 84
@@ -225,9 +225,8 @@ static drm_local_map_t *sis_reg_init(struct drm_device *dev)
225 map = entry->map; 225 map = entry->map;
226 if (!map) 226 if (!map)
227 continue; 227 continue;
228 if (map->type == _DRM_REGISTERS) { 228 if (map->type == _DRM_REGISTERS)
229 return map; 229 return map;
230 }
231 } 230 }
232 return NULL; 231 return NULL;
233} 232}
@@ -264,10 +263,10 @@ int sis_idle(struct drm_device *dev)
264 263
265 end = jiffies + (DRM_HZ * 3); 264 end = jiffies + (DRM_HZ * 3);
266 265
267 for (i=0; i<4; ++i) { 266 for (i = 0; i < 4; ++i) {
268 do { 267 do {
269 idle_reg = SIS_READ(0x85cc); 268 idle_reg = SIS_READ(0x85cc);
270 } while ( !time_after_eq(jiffies, end) && 269 } while (!time_after_eq(jiffies, end) &&
271 ((idle_reg & 0x80000000) != 0x80000000)); 270 ((idle_reg & 0x80000000) != 0x80000000));
272 } 271 }
273 272
@@ -301,7 +300,7 @@ void sis_lastclose(struct drm_device *dev)
301 mutex_unlock(&dev->struct_mutex); 300 mutex_unlock(&dev->struct_mutex);
302} 301}
303 302
304void sis_reclaim_buffers_locked(struct drm_device * dev, 303void sis_reclaim_buffers_locked(struct drm_device *dev,
305 struct drm_file *file_priv) 304 struct drm_file *file_priv)
306{ 305{
307 drm_sis_private_t *dev_priv = dev->dev_private; 306 drm_sis_private_t *dev_priv = dev->dev_private;
@@ -312,9 +311,8 @@ void sis_reclaim_buffers_locked(struct drm_device * dev,
312 return; 311 return;
313 } 312 }
314 313
315 if (dev->driver->dma_quiescent) { 314 if (dev->driver->dma_quiescent)
316 dev->driver->dma_quiescent(dev); 315 dev->driver->dma_quiescent(dev);
317 }
318 316
319 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv); 317 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv);
320 mutex_unlock(&dev->struct_mutex); 318 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/ttm/ttm_page_alloc.c b/drivers/gpu/drm/ttm/ttm_page_alloc.c
index b1d67dc973dc..ca904799f018 100644
--- a/drivers/gpu/drm/ttm/ttm_page_alloc.c
+++ b/drivers/gpu/drm/ttm/ttm_page_alloc.c
@@ -40,11 +40,13 @@
40#include <linux/slab.h> 40#include <linux/slab.h>
41 41
42#include <asm/atomic.h> 42#include <asm/atomic.h>
43#include <asm/agp.h>
44 43
45#include "ttm/ttm_bo_driver.h" 44#include "ttm/ttm_bo_driver.h"
46#include "ttm/ttm_page_alloc.h" 45#include "ttm/ttm_page_alloc.h"
47 46
47#ifdef TTM_HAS_AGP
48#include <asm/agp.h>
49#endif
48 50
49#define NUM_PAGES_TO_ALLOC (PAGE_SIZE/sizeof(struct page *)) 51#define NUM_PAGES_TO_ALLOC (PAGE_SIZE/sizeof(struct page *))
50#define SMALL_ALLOCATION 16 52#define SMALL_ALLOCATION 16
@@ -392,7 +394,7 @@ static int ttm_pool_get_num_unused_pages(void)
392/** 394/**
393 * Callback for mm to request pool to reduce number of page held. 395 * Callback for mm to request pool to reduce number of page held.
394 */ 396 */
395static int ttm_pool_mm_shrink(int shrink_pages, gfp_t gfp_mask) 397static int ttm_pool_mm_shrink(struct shrinker *shrink, int shrink_pages, gfp_t gfp_mask)
396{ 398{
397 static atomic_t start_pool = ATOMIC_INIT(0); 399 static atomic_t start_pool = ATOMIC_INIT(0);
398 unsigned i; 400 unsigned i;
diff --git a/drivers/gpu/drm/via/via_dma.c b/drivers/gpu/drm/via/via_dma.c
index bfb92d283260..68dda74a50ae 100644
--- a/drivers/gpu/drm/via/via_dma.c
+++ b/drivers/gpu/drm/via/via_dma.c
@@ -58,28 +58,29 @@
58 *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \ 58 *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \
59 *((uint32_t *)(vb) + 1) = (nData); \ 59 *((uint32_t *)(vb) + 1) = (nData); \
60 vb = ((uint32_t *)vb) + 2; \ 60 vb = ((uint32_t *)vb) + 2; \
61 dev_priv->dma_low +=8; \ 61 dev_priv->dma_low += 8; \
62} 62}
63 63
64#define via_flush_write_combine() DRM_MEMORYBARRIER() 64#define via_flush_write_combine() DRM_MEMORYBARRIER()
65 65
66#define VIA_OUT_RING_QW(w1,w2) \ 66#define VIA_OUT_RING_QW(w1, w2) do { \
67 *vb++ = (w1); \ 67 *vb++ = (w1); \
68 *vb++ = (w2); \ 68 *vb++ = (w2); \
69 dev_priv->dma_low += 8; 69 dev_priv->dma_low += 8; \
70} while (0)
70 71
71static void via_cmdbuf_start(drm_via_private_t * dev_priv); 72static void via_cmdbuf_start(drm_via_private_t *dev_priv);
72static void via_cmdbuf_pause(drm_via_private_t * dev_priv); 73static void via_cmdbuf_pause(drm_via_private_t *dev_priv);
73static void via_cmdbuf_reset(drm_via_private_t * dev_priv); 74static void via_cmdbuf_reset(drm_via_private_t *dev_priv);
74static void via_cmdbuf_rewind(drm_via_private_t * dev_priv); 75static void via_cmdbuf_rewind(drm_via_private_t *dev_priv);
75static int via_wait_idle(drm_via_private_t * dev_priv); 76static int via_wait_idle(drm_via_private_t *dev_priv);
76static void via_pad_cache(drm_via_private_t * dev_priv, int qwords); 77static void via_pad_cache(drm_via_private_t *dev_priv, int qwords);
77 78
78/* 79/*
79 * Free space in command buffer. 80 * Free space in command buffer.
80 */ 81 */
81 82
82static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv) 83static uint32_t via_cmdbuf_space(drm_via_private_t *dev_priv)
83{ 84{
84 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 85 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
85 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; 86 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
@@ -93,7 +94,7 @@ static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv)
93 * How much does the command regulator lag behind? 94 * How much does the command regulator lag behind?
94 */ 95 */
95 96
96static uint32_t via_cmdbuf_lag(drm_via_private_t * dev_priv) 97static uint32_t via_cmdbuf_lag(drm_via_private_t *dev_priv)
97{ 98{
98 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 99 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
99 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; 100 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base;
@@ -108,7 +109,7 @@ static uint32_t via_cmdbuf_lag(drm_via_private_t * dev_priv)
108 */ 109 */
109 110
110static inline int 111static inline int
111via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) 112via_cmdbuf_wait(drm_via_private_t *dev_priv, unsigned int size)
112{ 113{
113 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; 114 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr;
114 uint32_t cur_addr, hw_addr, next_addr; 115 uint32_t cur_addr, hw_addr, next_addr;
@@ -146,14 +147,13 @@ static inline uint32_t *via_check_dma(drm_via_private_t * dev_priv,
146 dev_priv->dma_high) { 147 dev_priv->dma_high) {
147 via_cmdbuf_rewind(dev_priv); 148 via_cmdbuf_rewind(dev_priv);
148 } 149 }
149 if (via_cmdbuf_wait(dev_priv, size) != 0) { 150 if (via_cmdbuf_wait(dev_priv, size) != 0)
150 return NULL; 151 return NULL;
151 }
152 152
153 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); 153 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
154} 154}
155 155
156int via_dma_cleanup(struct drm_device * dev) 156int via_dma_cleanup(struct drm_device *dev)
157{ 157{
158 if (dev->dev_private) { 158 if (dev->dev_private) {
159 drm_via_private_t *dev_priv = 159 drm_via_private_t *dev_priv =
@@ -171,9 +171,9 @@ int via_dma_cleanup(struct drm_device * dev)
171 return 0; 171 return 0;
172} 172}
173 173
174static int via_initialize(struct drm_device * dev, 174static int via_initialize(struct drm_device *dev,
175 drm_via_private_t * dev_priv, 175 drm_via_private_t *dev_priv,
176 drm_via_dma_init_t * init) 176 drm_via_dma_init_t *init)
177{ 177{
178 if (!dev_priv || !dev_priv->mmio) { 178 if (!dev_priv || !dev_priv->mmio) {
179 DRM_ERROR("via_dma_init called before via_map_init\n"); 179 DRM_ERROR("via_dma_init called before via_map_init\n");
@@ -258,7 +258,7 @@ static int via_dma_init(struct drm_device *dev, void *data, struct drm_file *fil
258 return retcode; 258 return retcode;
259} 259}
260 260
261static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t * cmd) 261static int via_dispatch_cmdbuffer(struct drm_device *dev, drm_via_cmdbuffer_t *cmd)
262{ 262{
263 drm_via_private_t *dev_priv; 263 drm_via_private_t *dev_priv;
264 uint32_t *vb; 264 uint32_t *vb;
@@ -271,9 +271,8 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
271 return -EFAULT; 271 return -EFAULT;
272 } 272 }
273 273
274 if (cmd->size > VIA_PCI_BUF_SIZE) { 274 if (cmd->size > VIA_PCI_BUF_SIZE)
275 return -ENOMEM; 275 return -ENOMEM;
276 }
277 276
278 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) 277 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
279 return -EFAULT; 278 return -EFAULT;
@@ -291,9 +290,8 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
291 } 290 }
292 291
293 vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size); 292 vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size);
294 if (vb == NULL) { 293 if (vb == NULL)
295 return -EAGAIN; 294 return -EAGAIN;
296 }
297 295
298 memcpy(vb, dev_priv->pci_buf, cmd->size); 296 memcpy(vb, dev_priv->pci_buf, cmd->size);
299 297
@@ -311,13 +309,12 @@ static int via_dispatch_cmdbuffer(struct drm_device * dev, drm_via_cmdbuffer_t *
311 return 0; 309 return 0;
312} 310}
313 311
314int via_driver_dma_quiescent(struct drm_device * dev) 312int via_driver_dma_quiescent(struct drm_device *dev)
315{ 313{
316 drm_via_private_t *dev_priv = dev->dev_private; 314 drm_via_private_t *dev_priv = dev->dev_private;
317 315
318 if (!via_wait_idle(dev_priv)) { 316 if (!via_wait_idle(dev_priv))
319 return -EBUSY; 317 return -EBUSY;
320 }
321 return 0; 318 return 0;
322} 319}
323 320
@@ -339,22 +336,17 @@ static int via_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *fi
339 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); 336 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size);
340 337
341 ret = via_dispatch_cmdbuffer(dev, cmdbuf); 338 ret = via_dispatch_cmdbuffer(dev, cmdbuf);
342 if (ret) { 339 return ret;
343 return ret;
344 }
345
346 return 0;
347} 340}
348 341
349static int via_dispatch_pci_cmdbuffer(struct drm_device * dev, 342static int via_dispatch_pci_cmdbuffer(struct drm_device *dev,
350 drm_via_cmdbuffer_t * cmd) 343 drm_via_cmdbuffer_t *cmd)
351{ 344{
352 drm_via_private_t *dev_priv = dev->dev_private; 345 drm_via_private_t *dev_priv = dev->dev_private;
353 int ret; 346 int ret;
354 347
355 if (cmd->size > VIA_PCI_BUF_SIZE) { 348 if (cmd->size > VIA_PCI_BUF_SIZE)
356 return -ENOMEM; 349 return -ENOMEM;
357 }
358 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size)) 350 if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
359 return -EFAULT; 351 return -EFAULT;
360 352
@@ -380,19 +372,14 @@ static int via_pci_cmdbuffer(struct drm_device *dev, void *data, struct drm_file
380 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size); 372 DRM_DEBUG("buf %p size %lu\n", cmdbuf->buf, cmdbuf->size);
381 373
382 ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf); 374 ret = via_dispatch_pci_cmdbuffer(dev, cmdbuf);
383 if (ret) { 375 return ret;
384 return ret;
385 }
386
387 return 0;
388} 376}
389 377
390static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv, 378static inline uint32_t *via_align_buffer(drm_via_private_t *dev_priv,
391 uint32_t * vb, int qw_count) 379 uint32_t * vb, int qw_count)
392{ 380{
393 for (; qw_count > 0; --qw_count) { 381 for (; qw_count > 0; --qw_count)
394 VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY); 382 VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY);
395 }
396 return vb; 383 return vb;
397} 384}
398 385
@@ -401,7 +388,7 @@ static inline uint32_t *via_align_buffer(drm_via_private_t * dev_priv,
401 * 388 *
402 * Returns virtual pointer to ring buffer. 389 * Returns virtual pointer to ring buffer.
403 */ 390 */
404static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv) 391static inline uint32_t *via_get_dma(drm_via_private_t *dev_priv)
405{ 392{
406 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low); 393 return (uint32_t *) (dev_priv->dma_ptr + dev_priv->dma_low);
407} 394}
@@ -411,18 +398,18 @@ static inline uint32_t *via_get_dma(drm_via_private_t * dev_priv)
411 * modifying the pause address stored in the buffer itself. If 398 * modifying the pause address stored in the buffer itself. If
412 * the regulator has already paused, restart it. 399 * the regulator has already paused, restart it.
413 */ 400 */
414static int via_hook_segment(drm_via_private_t * dev_priv, 401static int via_hook_segment(drm_via_private_t *dev_priv,
415 uint32_t pause_addr_hi, uint32_t pause_addr_lo, 402 uint32_t pause_addr_hi, uint32_t pause_addr_lo,
416 int no_pci_fire) 403 int no_pci_fire)
417{ 404{
418 int paused, count; 405 int paused, count;
419 volatile uint32_t *paused_at = dev_priv->last_pause_ptr; 406 volatile uint32_t *paused_at = dev_priv->last_pause_ptr;
420 uint32_t reader,ptr; 407 uint32_t reader, ptr;
421 uint32_t diff; 408 uint32_t diff;
422 409
423 paused = 0; 410 paused = 0;
424 via_flush_write_combine(); 411 via_flush_write_combine();
425 (void) *(volatile uint32_t *)(via_get_dma(dev_priv) -1); 412 (void) *(volatile uint32_t *)(via_get_dma(dev_priv) - 1);
426 413
427 *paused_at = pause_addr_lo; 414 *paused_at = pause_addr_lo;
428 via_flush_write_combine(); 415 via_flush_write_combine();
@@ -435,7 +422,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
435 dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1; 422 dev_priv->last_pause_ptr = via_get_dma(dev_priv) - 1;
436 423
437 /* 424 /*
438 * If there is a possibility that the command reader will 425 * If there is a possibility that the command reader will
439 * miss the new pause address and pause on the old one, 426 * miss the new pause address and pause on the old one,
440 * In that case we need to program the new start address 427 * In that case we need to program the new start address
441 * using PCI. 428 * using PCI.
@@ -443,9 +430,9 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
443 430
444 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; 431 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
445 count = 10000000; 432 count = 10000000;
446 while(diff == 0 && count--) { 433 while (diff == 0 && count--) {
447 paused = (VIA_READ(0x41c) & 0x80000000); 434 paused = (VIA_READ(0x41c) & 0x80000000);
448 if (paused) 435 if (paused)
449 break; 436 break;
450 reader = *(dev_priv->hw_addr_ptr); 437 reader = *(dev_priv->hw_addr_ptr);
451 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff; 438 diff = (uint32_t) (ptr - reader) - dev_priv->dma_diff;
@@ -477,7 +464,7 @@ static int via_hook_segment(drm_via_private_t * dev_priv,
477 return paused; 464 return paused;
478} 465}
479 466
480static int via_wait_idle(drm_via_private_t * dev_priv) 467static int via_wait_idle(drm_via_private_t *dev_priv)
481{ 468{
482 int count = 10000000; 469 int count = 10000000;
483 470
@@ -491,9 +478,9 @@ static int via_wait_idle(drm_via_private_t * dev_priv)
491 return count; 478 return count;
492} 479}
493 480
494static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, 481static uint32_t *via_align_cmd(drm_via_private_t *dev_priv, uint32_t cmd_type,
495 uint32_t addr, uint32_t * cmd_addr_hi, 482 uint32_t addr, uint32_t *cmd_addr_hi,
496 uint32_t * cmd_addr_lo, int skip_wait) 483 uint32_t *cmd_addr_lo, int skip_wait)
497{ 484{
498 uint32_t agp_base; 485 uint32_t agp_base;
499 uint32_t cmd_addr, addr_lo, addr_hi; 486 uint32_t cmd_addr, addr_lo, addr_hi;
@@ -521,7 +508,7 @@ static uint32_t *via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type,
521 return vb; 508 return vb;
522} 509}
523 510
524static void via_cmdbuf_start(drm_via_private_t * dev_priv) 511static void via_cmdbuf_start(drm_via_private_t *dev_priv)
525{ 512{
526 uint32_t pause_addr_lo, pause_addr_hi; 513 uint32_t pause_addr_lo, pause_addr_hi;
527 uint32_t start_addr, start_addr_lo; 514 uint32_t start_addr, start_addr_lo;
@@ -580,7 +567,7 @@ static void via_cmdbuf_start(drm_via_private_t * dev_priv)
580 dev_priv->dma_diff = ptr - reader; 567 dev_priv->dma_diff = ptr - reader;
581} 568}
582 569
583static void via_pad_cache(drm_via_private_t * dev_priv, int qwords) 570static void via_pad_cache(drm_via_private_t *dev_priv, int qwords)
584{ 571{
585 uint32_t *vb; 572 uint32_t *vb;
586 573
@@ -590,7 +577,7 @@ static void via_pad_cache(drm_via_private_t * dev_priv, int qwords)
590 via_align_buffer(dev_priv, vb, qwords); 577 via_align_buffer(dev_priv, vb, qwords);
591} 578}
592 579
593static inline void via_dummy_bitblt(drm_via_private_t * dev_priv) 580static inline void via_dummy_bitblt(drm_via_private_t *dev_priv)
594{ 581{
595 uint32_t *vb = via_get_dma(dev_priv); 582 uint32_t *vb = via_get_dma(dev_priv);
596 SetReg2DAGP(0x0C, (0 | (0 << 16))); 583 SetReg2DAGP(0x0C, (0 | (0 << 16)));
@@ -598,7 +585,7 @@ static inline void via_dummy_bitblt(drm_via_private_t * dev_priv)
598 SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000); 585 SetReg2DAGP(0x0, 0x1 | 0x2000 | 0xAA000000);
599} 586}
600 587
601static void via_cmdbuf_jump(drm_via_private_t * dev_priv) 588static void via_cmdbuf_jump(drm_via_private_t *dev_priv)
602{ 589{
603 uint32_t agp_base; 590 uint32_t agp_base;
604 uint32_t pause_addr_lo, pause_addr_hi; 591 uint32_t pause_addr_lo, pause_addr_hi;
@@ -617,9 +604,8 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
617 */ 604 */
618 605
619 dev_priv->dma_low = 0; 606 dev_priv->dma_low = 0;
620 if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0) { 607 if (via_cmdbuf_wait(dev_priv, CMDBUF_ALIGNMENT_SIZE) != 0)
621 DRM_ERROR("via_cmdbuf_jump failed\n"); 608 DRM_ERROR("via_cmdbuf_jump failed\n");
622 }
623 609
624 via_dummy_bitblt(dev_priv); 610 via_dummy_bitblt(dev_priv);
625 via_dummy_bitblt(dev_priv); 611 via_dummy_bitblt(dev_priv);
@@ -657,12 +643,12 @@ static void via_cmdbuf_jump(drm_via_private_t * dev_priv)
657} 643}
658 644
659 645
660static void via_cmdbuf_rewind(drm_via_private_t * dev_priv) 646static void via_cmdbuf_rewind(drm_via_private_t *dev_priv)
661{ 647{
662 via_cmdbuf_jump(dev_priv); 648 via_cmdbuf_jump(dev_priv);
663} 649}
664 650
665static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) 651static void via_cmdbuf_flush(drm_via_private_t *dev_priv, uint32_t cmd_type)
666{ 652{
667 uint32_t pause_addr_lo, pause_addr_hi; 653 uint32_t pause_addr_lo, pause_addr_hi;
668 654
@@ -670,12 +656,12 @@ static void via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type)
670 via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0); 656 via_hook_segment(dev_priv, pause_addr_hi, pause_addr_lo, 0);
671} 657}
672 658
673static void via_cmdbuf_pause(drm_via_private_t * dev_priv) 659static void via_cmdbuf_pause(drm_via_private_t *dev_priv)
674{ 660{
675 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE); 661 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_PAUSE);
676} 662}
677 663
678static void via_cmdbuf_reset(drm_via_private_t * dev_priv) 664static void via_cmdbuf_reset(drm_via_private_t *dev_priv)
679{ 665{
680 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP); 666 via_cmdbuf_flush(dev_priv, HC_HAGPBpID_STOP);
681 via_wait_idle(dev_priv); 667 via_wait_idle(dev_priv);
@@ -708,9 +694,8 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
708 case VIA_CMDBUF_SPACE: 694 case VIA_CMDBUF_SPACE:
709 while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size) 695 while (((tmp_size = via_cmdbuf_space(dev_priv)) < d_siz->size)
710 && --count) { 696 && --count) {
711 if (!d_siz->wait) { 697 if (!d_siz->wait)
712 break; 698 break;
713 }
714 } 699 }
715 if (!count) { 700 if (!count) {
716 DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n"); 701 DRM_ERROR("VIA_CMDBUF_SPACE timed out.\n");
@@ -720,9 +705,8 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
720 case VIA_CMDBUF_LAG: 705 case VIA_CMDBUF_LAG:
721 while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size) 706 while (((tmp_size = via_cmdbuf_lag(dev_priv)) > d_siz->size)
722 && --count) { 707 && --count) {
723 if (!d_siz->wait) { 708 if (!d_siz->wait)
724 break; 709 break;
725 }
726 } 710 }
727 if (!count) { 711 if (!count) {
728 DRM_ERROR("VIA_CMDBUF_LAG timed out.\n"); 712 DRM_ERROR("VIA_CMDBUF_LAG timed out.\n");
diff --git a/drivers/gpu/drm/via/via_dmablit.c b/drivers/gpu/drm/via/via_dmablit.c
index 4c54f043068e..9b5b4d9dd62c 100644
--- a/drivers/gpu/drm/via/via_dmablit.c
+++ b/drivers/gpu/drm/via/via_dmablit.c
@@ -70,7 +70,7 @@ via_unmap_blit_from_device(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
70 descriptor_this_page; 70 descriptor_this_page;
71 dma_addr_t next = vsg->chain_start; 71 dma_addr_t next = vsg->chain_start;
72 72
73 while(num_desc--) { 73 while (num_desc--) {
74 if (descriptor_this_page-- == 0) { 74 if (descriptor_this_page-- == 0) {
75 cur_descriptor_page--; 75 cur_descriptor_page--;
76 descriptor_this_page = vsg->descriptors_per_page - 1; 76 descriptor_this_page = vsg->descriptors_per_page - 1;
@@ -174,19 +174,19 @@ via_free_sg_info(struct pci_dev *pdev, drm_via_sg_info_t *vsg)
174 struct page *page; 174 struct page *page;
175 int i; 175 int i;
176 176
177 switch(vsg->state) { 177 switch (vsg->state) {
178 case dr_via_device_mapped: 178 case dr_via_device_mapped:
179 via_unmap_blit_from_device(pdev, vsg); 179 via_unmap_blit_from_device(pdev, vsg);
180 case dr_via_desc_pages_alloc: 180 case dr_via_desc_pages_alloc:
181 for (i=0; i<vsg->num_desc_pages; ++i) { 181 for (i = 0; i < vsg->num_desc_pages; ++i) {
182 if (vsg->desc_pages[i] != NULL) 182 if (vsg->desc_pages[i] != NULL)
183 free_page((unsigned long)vsg->desc_pages[i]); 183 free_page((unsigned long)vsg->desc_pages[i]);
184 } 184 }
185 kfree(vsg->desc_pages); 185 kfree(vsg->desc_pages);
186 case dr_via_pages_locked: 186 case dr_via_pages_locked:
187 for (i=0; i<vsg->num_pages; ++i) { 187 for (i = 0; i < vsg->num_pages; ++i) {
188 if ( NULL != (page = vsg->pages[i])) { 188 if (NULL != (page = vsg->pages[i])) {
189 if (! PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction)) 189 if (!PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
190 SetPageDirty(page); 190 SetPageDirty(page);
191 page_cache_release(page); 191 page_cache_release(page);
192 } 192 }
@@ -232,7 +232,7 @@ via_lock_all_dma_pages(drm_via_sg_info_t *vsg, drm_via_dmablit_t *xfer)
232{ 232{
233 int ret; 233 int ret;
234 unsigned long first_pfn = VIA_PFN(xfer->mem_addr); 234 unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
235 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride -1)) - 235 vsg->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride - 1)) -
236 first_pfn + 1; 236 first_pfn + 1;
237 237
238 if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages))) 238 if (NULL == (vsg->pages = vmalloc(sizeof(struct page *) * vsg->num_pages)))
@@ -268,7 +268,7 @@ via_alloc_desc_pages(drm_via_sg_info_t *vsg)
268{ 268{
269 int i; 269 int i;
270 270
271 vsg->descriptors_per_page = PAGE_SIZE / sizeof( drm_via_descriptor_t); 271 vsg->descriptors_per_page = PAGE_SIZE / sizeof(drm_via_descriptor_t);
272 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) / 272 vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
273 vsg->descriptors_per_page; 273 vsg->descriptors_per_page;
274 274
@@ -276,7 +276,7 @@ via_alloc_desc_pages(drm_via_sg_info_t *vsg)
276 return -ENOMEM; 276 return -ENOMEM;
277 277
278 vsg->state = dr_via_desc_pages_alloc; 278 vsg->state = dr_via_desc_pages_alloc;
279 for (i=0; i<vsg->num_desc_pages; ++i) { 279 for (i = 0; i < vsg->num_desc_pages; ++i) {
280 if (NULL == (vsg->desc_pages[i] = 280 if (NULL == (vsg->desc_pages[i] =
281 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL))) 281 (drm_via_descriptor_t *) __get_free_page(GFP_KERNEL)))
282 return -ENOMEM; 282 return -ENOMEM;
@@ -318,21 +318,20 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
318 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; 318 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
319 int cur; 319 int cur;
320 int done_transfer; 320 int done_transfer;
321 unsigned long irqsave=0; 321 unsigned long irqsave = 0;
322 uint32_t status = 0; 322 uint32_t status = 0;
323 323
324 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n", 324 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
325 engine, from_irq, (unsigned long) blitq); 325 engine, from_irq, (unsigned long) blitq);
326 326
327 if (from_irq) { 327 if (from_irq)
328 spin_lock(&blitq->blit_lock); 328 spin_lock(&blitq->blit_lock);
329 } else { 329 else
330 spin_lock_irqsave(&blitq->blit_lock, irqsave); 330 spin_lock_irqsave(&blitq->blit_lock, irqsave);
331 }
332 331
333 done_transfer = blitq->is_active && 332 done_transfer = blitq->is_active &&
334 (( status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD); 333 ((status = VIA_READ(VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
335 done_transfer = done_transfer || ( blitq->aborting && !(status & VIA_DMA_CSR_DE)); 334 done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE));
336 335
337 cur = blitq->cur; 336 cur = blitq->cur;
338 if (done_transfer) { 337 if (done_transfer) {
@@ -377,18 +376,16 @@ via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
377 if (!timer_pending(&blitq->poll_timer)) 376 if (!timer_pending(&blitq->poll_timer))
378 mod_timer(&blitq->poll_timer, jiffies + 1); 377 mod_timer(&blitq->poll_timer, jiffies + 1);
379 } else { 378 } else {
380 if (timer_pending(&blitq->poll_timer)) { 379 if (timer_pending(&blitq->poll_timer))
381 del_timer(&blitq->poll_timer); 380 del_timer(&blitq->poll_timer);
382 }
383 via_dmablit_engine_off(dev, engine); 381 via_dmablit_engine_off(dev, engine);
384 } 382 }
385 } 383 }
386 384
387 if (from_irq) { 385 if (from_irq)
388 spin_unlock(&blitq->blit_lock); 386 spin_unlock(&blitq->blit_lock);
389 } else { 387 else
390 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 388 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
391 }
392} 389}
393 390
394 391
@@ -414,10 +411,9 @@ via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_que
414 ((blitq->cur_blit_handle - handle) <= (1 << 23)); 411 ((blitq->cur_blit_handle - handle) <= (1 << 23));
415 412
416 if (queue && active) { 413 if (queue && active) {
417 slot = handle - blitq->done_blit_handle + blitq->cur -1; 414 slot = handle - blitq->done_blit_handle + blitq->cur - 1;
418 if (slot >= VIA_NUM_BLIT_SLOTS) { 415 if (slot >= VIA_NUM_BLIT_SLOTS)
419 slot -= VIA_NUM_BLIT_SLOTS; 416 slot -= VIA_NUM_BLIT_SLOTS;
420 }
421 *queue = blitq->blit_queue + slot; 417 *queue = blitq->blit_queue + slot;
422 } 418 }
423 419
@@ -506,12 +502,12 @@ via_dmablit_workqueue(struct work_struct *work)
506 int cur_released; 502 int cur_released;
507 503
508 504
509 DRM_DEBUG("Workqueue task called for blit engine %ld\n",(unsigned long) 505 DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long)
510 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues)); 506 (blitq - ((drm_via_private_t *)dev->dev_private)->blit_queues));
511 507
512 spin_lock_irqsave(&blitq->blit_lock, irqsave); 508 spin_lock_irqsave(&blitq->blit_lock, irqsave);
513 509
514 while(blitq->serviced != blitq->cur) { 510 while (blitq->serviced != blitq->cur) {
515 511
516 cur_released = blitq->serviced++; 512 cur_released = blitq->serviced++;
517 513
@@ -545,13 +541,13 @@ via_dmablit_workqueue(struct work_struct *work)
545void 541void
546via_init_dmablit(struct drm_device *dev) 542via_init_dmablit(struct drm_device *dev)
547{ 543{
548 int i,j; 544 int i, j;
549 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; 545 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private;
550 drm_via_blitq_t *blitq; 546 drm_via_blitq_t *blitq;
551 547
552 pci_set_master(dev->pdev); 548 pci_set_master(dev->pdev);
553 549
554 for (i=0; i< VIA_NUM_BLIT_ENGINES; ++i) { 550 for (i = 0; i < VIA_NUM_BLIT_ENGINES; ++i) {
555 blitq = dev_priv->blit_queues + i; 551 blitq = dev_priv->blit_queues + i;
556 blitq->dev = dev; 552 blitq->dev = dev;
557 blitq->cur_blit_handle = 0; 553 blitq->cur_blit_handle = 0;
@@ -564,9 +560,8 @@ via_init_dmablit(struct drm_device *dev)
564 blitq->is_active = 0; 560 blitq->is_active = 0;
565 blitq->aborting = 0; 561 blitq->aborting = 0;
566 spin_lock_init(&blitq->blit_lock); 562 spin_lock_init(&blitq->blit_lock);
567 for (j=0; j<VIA_NUM_BLIT_SLOTS; ++j) { 563 for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j)
568 DRM_INIT_WAITQUEUE(blitq->blit_queue + j); 564 DRM_INIT_WAITQUEUE(blitq->blit_queue + j);
569 }
570 DRM_INIT_WAITQUEUE(&blitq->busy_queue); 565 DRM_INIT_WAITQUEUE(&blitq->busy_queue);
571 INIT_WORK(&blitq->wq, via_dmablit_workqueue); 566 INIT_WORK(&blitq->wq, via_dmablit_workqueue);
572 setup_timer(&blitq->poll_timer, via_dmablit_timer, 567 setup_timer(&blitq->poll_timer, via_dmablit_timer,
@@ -685,18 +680,17 @@ via_build_sg_info(struct drm_device *dev, drm_via_sg_info_t *vsg, drm_via_dmabli
685static int 680static int
686via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine) 681via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
687{ 682{
688 int ret=0; 683 int ret = 0;
689 unsigned long irqsave; 684 unsigned long irqsave;
690 685
691 DRM_DEBUG("Num free is %d\n", blitq->num_free); 686 DRM_DEBUG("Num free is %d\n", blitq->num_free);
692 spin_lock_irqsave(&blitq->blit_lock, irqsave); 687 spin_lock_irqsave(&blitq->blit_lock, irqsave);
693 while(blitq->num_free == 0) { 688 while (blitq->num_free == 0) {
694 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 689 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
695 690
696 DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0); 691 DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0);
697 if (ret) { 692 if (ret)
698 return (-EINTR == ret) ? -EAGAIN : ret; 693 return (-EINTR == ret) ? -EAGAIN : ret;
699 }
700 694
701 spin_lock_irqsave(&blitq->blit_lock, irqsave); 695 spin_lock_irqsave(&blitq->blit_lock, irqsave);
702 } 696 }
@@ -719,7 +713,7 @@ via_dmablit_release_slot(drm_via_blitq_t *blitq)
719 spin_lock_irqsave(&blitq->blit_lock, irqsave); 713 spin_lock_irqsave(&blitq->blit_lock, irqsave);
720 blitq->num_free++; 714 blitq->num_free++;
721 spin_unlock_irqrestore(&blitq->blit_lock, irqsave); 715 spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
722 DRM_WAKEUP( &blitq->busy_queue ); 716 DRM_WAKEUP(&blitq->busy_queue);
723} 717}
724 718
725/* 719/*
@@ -744,9 +738,8 @@ via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
744 738
745 engine = (xfer->to_fb) ? 0 : 1; 739 engine = (xfer->to_fb) ? 0 : 1;
746 blitq = dev_priv->blit_queues + engine; 740 blitq = dev_priv->blit_queues + engine;
747 if (0 != (ret = via_dmablit_grab_slot(blitq, engine))) { 741 if (0 != (ret = via_dmablit_grab_slot(blitq, engine)))
748 return ret; 742 return ret;
749 }
750 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) { 743 if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
751 via_dmablit_release_slot(blitq); 744 via_dmablit_release_slot(blitq);
752 return -ENOMEM; 745 return -ENOMEM;
@@ -780,7 +773,7 @@ via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
780 */ 773 */
781 774
782int 775int
783via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ) 776via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv)
784{ 777{
785 drm_via_blitsync_t *sync = data; 778 drm_via_blitsync_t *sync = data;
786 int err; 779 int err;
@@ -804,7 +797,7 @@ via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_pri
804 */ 797 */
805 798
806int 799int
807via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ) 800via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
808{ 801{
809 drm_via_dmablit_t *xfer = data; 802 drm_via_dmablit_t *xfer = data;
810 int err; 803 int err;
diff --git a/drivers/gpu/drm/via/via_dmablit.h b/drivers/gpu/drm/via/via_dmablit.h
index 7408a547a036..9b662a327cef 100644
--- a/drivers/gpu/drm/via/via_dmablit.h
+++ b/drivers/gpu/drm/via/via_dmablit.h
@@ -45,12 +45,12 @@ typedef struct _drm_via_sg_info {
45 int num_desc; 45 int num_desc;
46 enum dma_data_direction direction; 46 enum dma_data_direction direction;
47 unsigned char *bounce_buffer; 47 unsigned char *bounce_buffer;
48 dma_addr_t chain_start; 48 dma_addr_t chain_start;
49 uint32_t free_on_sequence; 49 uint32_t free_on_sequence;
50 unsigned int descriptors_per_page; 50 unsigned int descriptors_per_page;
51 int aborted; 51 int aborted;
52 enum { 52 enum {
53 dr_via_device_mapped, 53 dr_via_device_mapped,
54 dr_via_desc_pages_alloc, 54 dr_via_desc_pages_alloc,
55 dr_via_pages_locked, 55 dr_via_pages_locked,
56 dr_via_pages_alloc, 56 dr_via_pages_alloc,
@@ -68,7 +68,7 @@ typedef struct _drm_via_blitq {
68 unsigned num_free; 68 unsigned num_free;
69 unsigned num_outstanding; 69 unsigned num_outstanding;
70 unsigned long end; 70 unsigned long end;
71 int aborting; 71 int aborting;
72 int is_active; 72 int is_active;
73 drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS]; 73 drm_via_sg_info_t *blits[VIA_NUM_BLIT_SLOTS];
74 spinlock_t blit_lock; 74 spinlock_t blit_lock;
diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index cafcb844a223..9cf87d912325 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -107,9 +107,9 @@ enum via_family {
107#define VIA_BASE ((dev_priv->mmio)) 107#define VIA_BASE ((dev_priv->mmio))
108 108
109#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg) 109#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg)
110#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val) 110#define VIA_WRITE(reg, val) DRM_WRITE32(VIA_BASE, reg, val)
111#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg) 111#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg)
112#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val) 112#define VIA_WRITE8(reg, val) DRM_WRITE8(VIA_BASE, reg, val)
113 113
114extern struct drm_ioctl_desc via_ioctls[]; 114extern struct drm_ioctl_desc via_ioctls[];
115extern int via_max_ioctl; 115extern int via_max_ioctl;
@@ -121,28 +121,28 @@ extern int via_agp_init(struct drm_device *dev, void *data, struct drm_file *fil
121extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv); 121extern int via_map_init(struct drm_device *dev, void *data, struct drm_file *file_priv);
122extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv); 122extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv);
123extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv); 123extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv);
124extern int via_dma_blit_sync( struct drm_device *dev, void *data, struct drm_file *file_priv ); 124extern int via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv);
125extern int via_dma_blit( struct drm_device *dev, void *data, struct drm_file *file_priv ); 125extern int via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv);
126 126
127extern int via_driver_load(struct drm_device *dev, unsigned long chipset); 127extern int via_driver_load(struct drm_device *dev, unsigned long chipset);
128extern int via_driver_unload(struct drm_device *dev); 128extern int via_driver_unload(struct drm_device *dev);
129 129
130extern int via_init_context(struct drm_device * dev, int context); 130extern int via_init_context(struct drm_device *dev, int context);
131extern int via_final_context(struct drm_device * dev, int context); 131extern int via_final_context(struct drm_device *dev, int context);
132 132
133extern int via_do_cleanup_map(struct drm_device * dev); 133extern int via_do_cleanup_map(struct drm_device *dev);
134extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc); 134extern u32 via_get_vblank_counter(struct drm_device *dev, int crtc);
135extern int via_enable_vblank(struct drm_device *dev, int crtc); 135extern int via_enable_vblank(struct drm_device *dev, int crtc);
136extern void via_disable_vblank(struct drm_device *dev, int crtc); 136extern void via_disable_vblank(struct drm_device *dev, int crtc);
137 137
138extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS); 138extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
139extern void via_driver_irq_preinstall(struct drm_device * dev); 139extern void via_driver_irq_preinstall(struct drm_device *dev);
140extern int via_driver_irq_postinstall(struct drm_device *dev); 140extern int via_driver_irq_postinstall(struct drm_device *dev);
141extern void via_driver_irq_uninstall(struct drm_device * dev); 141extern void via_driver_irq_uninstall(struct drm_device *dev);
142 142
143extern int via_dma_cleanup(struct drm_device * dev); 143extern int via_dma_cleanup(struct drm_device *dev);
144extern void via_init_command_verifier(void); 144extern void via_init_command_verifier(void);
145extern int via_driver_dma_quiescent(struct drm_device * dev); 145extern int via_driver_dma_quiescent(struct drm_device *dev);
146extern void via_init_futex(drm_via_private_t *dev_priv); 146extern void via_init_futex(drm_via_private_t *dev_priv);
147extern void via_cleanup_futex(drm_via_private_t *dev_priv); 147extern void via_cleanup_futex(drm_via_private_t *dev_priv);
148extern void via_release_futex(drm_via_private_t *dev_priv, int context); 148extern void via_release_futex(drm_via_private_t *dev_priv, int context);
diff --git a/drivers/gpu/drm/via/via_irq.c b/drivers/gpu/drm/via/via_irq.c
index 34079f251cd4..d391f48ef87a 100644
--- a/drivers/gpu/drm/via/via_irq.c
+++ b/drivers/gpu/drm/via/via_irq.c
@@ -141,11 +141,10 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
141 atomic_inc(&cur_irq->irq_received); 141 atomic_inc(&cur_irq->irq_received);
142 DRM_WAKEUP(&cur_irq->irq_queue); 142 DRM_WAKEUP(&cur_irq->irq_queue);
143 handled = 1; 143 handled = 1;
144 if (dev_priv->irq_map[drm_via_irq_dma0_td] == i) { 144 if (dev_priv->irq_map[drm_via_irq_dma0_td] == i)
145 via_dmablit_handler(dev, 0, 1); 145 via_dmablit_handler(dev, 0, 1);
146 } else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i) { 146 else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i)
147 via_dmablit_handler(dev, 1, 1); 147 via_dmablit_handler(dev, 1, 1);
148 }
149 } 148 }
150 cur_irq++; 149 cur_irq++;
151 } 150 }
@@ -160,7 +159,7 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
160 return IRQ_NONE; 159 return IRQ_NONE;
161} 160}
162 161
163static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) 162static __inline__ void viadrv_acknowledge_irqs(drm_via_private_t *dev_priv)
164{ 163{
165 u32 status; 164 u32 status;
166 165
@@ -207,7 +206,7 @@ void via_disable_vblank(struct drm_device *dev, int crtc)
207} 206}
208 207
209static int 208static int
210via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequence, 209via_driver_irq_wait(struct drm_device *dev, unsigned int irq, int force_sequence,
211 unsigned int *sequence) 210 unsigned int *sequence)
212{ 211{
213 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 212 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
@@ -260,7 +259,7 @@ via_driver_irq_wait(struct drm_device * dev, unsigned int irq, int force_sequenc
260 * drm_dma.h hooks 259 * drm_dma.h hooks
261 */ 260 */
262 261
263void via_driver_irq_preinstall(struct drm_device * dev) 262void via_driver_irq_preinstall(struct drm_device *dev)
264{ 263{
265 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 264 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
266 u32 status; 265 u32 status;
@@ -329,7 +328,7 @@ int via_driver_irq_postinstall(struct drm_device *dev)
329 return 0; 328 return 0;
330} 329}
331 330
332void via_driver_irq_uninstall(struct drm_device * dev) 331void via_driver_irq_uninstall(struct drm_device *dev)
333{ 332{
334 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; 333 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private;
335 u32 status; 334 u32 status;
diff --git a/drivers/gpu/drm/via/via_map.c b/drivers/gpu/drm/via/via_map.c
index 6e6f91591639..6cca9a709f7a 100644
--- a/drivers/gpu/drm/via/via_map.c
+++ b/drivers/gpu/drm/via/via_map.c
@@ -25,7 +25,7 @@
25#include "via_drm.h" 25#include "via_drm.h"
26#include "via_drv.h" 26#include "via_drv.h"
27 27
28static int via_do_init_map(struct drm_device * dev, drm_via_init_t * init) 28static int via_do_init_map(struct drm_device *dev, drm_via_init_t *init)
29{ 29{
30 drm_via_private_t *dev_priv = dev->dev_private; 30 drm_via_private_t *dev_priv = dev->dev_private;
31 31
@@ -68,7 +68,7 @@ static int via_do_init_map(struct drm_device * dev, drm_via_init_t * init)
68 return 0; 68 return 0;
69} 69}
70 70
71int via_do_cleanup_map(struct drm_device * dev) 71int via_do_cleanup_map(struct drm_device *dev)
72{ 72{
73 via_dma_cleanup(dev); 73 via_dma_cleanup(dev);
74 74
diff --git a/drivers/gpu/drm/via/via_mm.c b/drivers/gpu/drm/via/via_mm.c
index f694cb5ededc..6cc2dadae3ef 100644
--- a/drivers/gpu/drm/via/via_mm.c
+++ b/drivers/gpu/drm/via/via_mm.c
@@ -31,7 +31,7 @@
31#include "drm_sman.h" 31#include "drm_sman.h"
32 32
33#define VIA_MM_ALIGN_SHIFT 4 33#define VIA_MM_ALIGN_SHIFT 4
34#define VIA_MM_ALIGN_MASK ( (1 << VIA_MM_ALIGN_SHIFT) - 1) 34#define VIA_MM_ALIGN_MASK ((1 << VIA_MM_ALIGN_SHIFT) - 1)
35 35
36int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv) 36int via_agp_init(struct drm_device *dev, void *data, struct drm_file *file_priv)
37{ 37{
@@ -172,7 +172,7 @@ int via_mem_free(struct drm_device *dev, void *data, struct drm_file *file_priv)
172} 172}
173 173
174 174
175void via_reclaim_buffers_locked(struct drm_device * dev, 175void via_reclaim_buffers_locked(struct drm_device *dev,
176 struct drm_file *file_priv) 176 struct drm_file *file_priv)
177{ 177{
178 drm_via_private_t *dev_priv = dev->dev_private; 178 drm_via_private_t *dev_priv = dev->dev_private;
@@ -183,9 +183,8 @@ void via_reclaim_buffers_locked(struct drm_device * dev,
183 return; 183 return;
184 } 184 }
185 185
186 if (dev->driver->dma_quiescent) { 186 if (dev->driver->dma_quiescent)
187 dev->driver->dma_quiescent(dev); 187 dev->driver->dma_quiescent(dev);
188 }
189 188
190 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv); 189 drm_sman_owner_cleanup(&dev_priv->sman, (unsigned long)file_priv);
191 mutex_unlock(&dev->struct_mutex); 190 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/via/via_verifier.c b/drivers/gpu/drm/via/via_verifier.c
index 46a579198747..48957b856d41 100644
--- a/drivers/gpu/drm/via/via_verifier.c
+++ b/drivers/gpu/drm/via/via_verifier.c
@@ -235,7 +235,7 @@ static hazard_t table2[256];
235static hazard_t table3[256]; 235static hazard_t table3[256];
236 236
237static __inline__ int 237static __inline__ int
238eat_words(const uint32_t ** buf, const uint32_t * buf_end, unsigned num_words) 238eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
239{ 239{
240 if ((buf_end - *buf) >= num_words) { 240 if ((buf_end - *buf) >= num_words) {
241 *buf += num_words; 241 *buf += num_words;
@@ -252,7 +252,7 @@ eat_words(const uint32_t ** buf, const uint32_t * buf_end, unsigned num_words)
252static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq, 252static __inline__ drm_local_map_t *via_drm_lookup_agp_map(drm_via_state_t *seq,
253 unsigned long offset, 253 unsigned long offset,
254 unsigned long size, 254 unsigned long size,
255 struct drm_device * dev) 255 struct drm_device *dev)
256{ 256{
257 struct drm_map_list *r_list; 257 struct drm_map_list *r_list;
258 drm_local_map_t *map = seq->map_cache; 258 drm_local_map_t *map = seq->map_cache;
@@ -344,7 +344,7 @@ static __inline__ int finish_current_sequence(drm_via_state_t * cur_seq)
344} 344}
345 345
346static __inline__ int 346static __inline__ int
347investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq) 347investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq)
348{ 348{
349 register uint32_t tmp, *tmp_addr; 349 register uint32_t tmp, *tmp_addr;
350 350
@@ -518,7 +518,7 @@ investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t * cur_seq)
518 518
519static __inline__ int 519static __inline__ int
520via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end, 520via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
521 drm_via_state_t * cur_seq) 521 drm_via_state_t *cur_seq)
522{ 522{
523 drm_via_private_t *dev_priv = 523 drm_via_private_t *dev_priv =
524 (drm_via_private_t *) cur_seq->dev->dev_private; 524 (drm_via_private_t *) cur_seq->dev->dev_private;
@@ -621,8 +621,8 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
621} 621}
622 622
623static __inline__ verifier_state_t 623static __inline__ verifier_state_t
624via_check_header2(uint32_t const **buffer, const uint32_t * buf_end, 624via_check_header2(uint32_t const **buffer, const uint32_t *buf_end,
625 drm_via_state_t * hc_state) 625 drm_via_state_t *hc_state)
626{ 626{
627 uint32_t cmd; 627 uint32_t cmd;
628 int hz_mode; 628 int hz_mode;
@@ -706,16 +706,15 @@ via_check_header2(uint32_t const **buffer, const uint32_t * buf_end,
706 return state_error; 706 return state_error;
707 } 707 }
708 } 708 }
709 if (hc_state->unfinished && finish_current_sequence(hc_state)) { 709 if (hc_state->unfinished && finish_current_sequence(hc_state))
710 return state_error; 710 return state_error;
711 }
712 *buffer = buf; 711 *buffer = buf;
713 return state_command; 712 return state_command;
714} 713}
715 714
716static __inline__ verifier_state_t 715static __inline__ verifier_state_t
717via_parse_header2(drm_via_private_t * dev_priv, uint32_t const **buffer, 716via_parse_header2(drm_via_private_t *dev_priv, uint32_t const **buffer,
718 const uint32_t * buf_end, int *fire_count) 717 const uint32_t *buf_end, int *fire_count)
719{ 718{
720 uint32_t cmd; 719 uint32_t cmd;
721 const uint32_t *buf = *buffer; 720 const uint32_t *buf = *buffer;
@@ -833,8 +832,8 @@ via_check_header1(uint32_t const **buffer, const uint32_t * buf_end)
833} 832}
834 833
835static __inline__ verifier_state_t 834static __inline__ verifier_state_t
836via_parse_header1(drm_via_private_t * dev_priv, uint32_t const **buffer, 835via_parse_header1(drm_via_private_t *dev_priv, uint32_t const **buffer,
837 const uint32_t * buf_end) 836 const uint32_t *buf_end)
838{ 837{
839 register uint32_t cmd; 838 register uint32_t cmd;
840 const uint32_t *buf = *buffer; 839 const uint32_t *buf = *buffer;
@@ -851,7 +850,7 @@ via_parse_header1(drm_via_private_t * dev_priv, uint32_t const **buffer,
851} 850}
852 851
853static __inline__ verifier_state_t 852static __inline__ verifier_state_t
854via_check_vheader5(uint32_t const **buffer, const uint32_t * buf_end) 853via_check_vheader5(uint32_t const **buffer, const uint32_t *buf_end)
855{ 854{
856 uint32_t data; 855 uint32_t data;
857 const uint32_t *buf = *buffer; 856 const uint32_t *buf = *buffer;
@@ -884,8 +883,8 @@ via_check_vheader5(uint32_t const **buffer, const uint32_t * buf_end)
884} 883}
885 884
886static __inline__ verifier_state_t 885static __inline__ verifier_state_t
887via_parse_vheader5(drm_via_private_t * dev_priv, uint32_t const **buffer, 886via_parse_vheader5(drm_via_private_t *dev_priv, uint32_t const **buffer,
888 const uint32_t * buf_end) 887 const uint32_t *buf_end)
889{ 888{
890 uint32_t addr, count, i; 889 uint32_t addr, count, i;
891 const uint32_t *buf = *buffer; 890 const uint32_t *buf = *buffer;
@@ -893,9 +892,8 @@ via_parse_vheader5(drm_via_private_t * dev_priv, uint32_t const **buffer,
893 addr = *buf++ & ~VIA_VIDEOMASK; 892 addr = *buf++ & ~VIA_VIDEOMASK;
894 i = count = *buf; 893 i = count = *buf;
895 buf += 3; 894 buf += 3;
896 while (i--) { 895 while (i--)
897 VIA_WRITE(addr, *buf++); 896 VIA_WRITE(addr, *buf++);
898 }
899 if (count & 3) 897 if (count & 3)
900 buf += 4 - (count & 3); 898 buf += 4 - (count & 3);
901 *buffer = buf; 899 *buffer = buf;
@@ -940,8 +938,8 @@ via_check_vheader6(uint32_t const **buffer, const uint32_t * buf_end)
940} 938}
941 939
942static __inline__ verifier_state_t 940static __inline__ verifier_state_t
943via_parse_vheader6(drm_via_private_t * dev_priv, uint32_t const **buffer, 941via_parse_vheader6(drm_via_private_t *dev_priv, uint32_t const **buffer,
944 const uint32_t * buf_end) 942 const uint32_t *buf_end)
945{ 943{
946 944
947 uint32_t addr, count, i; 945 uint32_t addr, count, i;
@@ -1037,7 +1035,7 @@ via_verify_command_stream(const uint32_t * buf, unsigned int size,
1037} 1035}
1038 1036
1039int 1037int
1040via_parse_command_stream(struct drm_device * dev, const uint32_t * buf, 1038via_parse_command_stream(struct drm_device *dev, const uint32_t *buf,
1041 unsigned int size) 1039 unsigned int size)
1042{ 1040{
1043 1041
@@ -1085,9 +1083,8 @@ via_parse_command_stream(struct drm_device * dev, const uint32_t * buf,
1085 return -EINVAL; 1083 return -EINVAL;
1086 } 1084 }
1087 } 1085 }
1088 if (state == state_error) { 1086 if (state == state_error)
1089 return -EINVAL; 1087 return -EINVAL;
1090 }
1091 return 0; 1088 return 0;
1092} 1089}
1093 1090
@@ -1096,13 +1093,11 @@ setup_hazard_table(hz_init_t init_table[], hazard_t table[], int size)
1096{ 1093{
1097 int i; 1094 int i;
1098 1095
1099 for (i = 0; i < 256; ++i) { 1096 for (i = 0; i < 256; ++i)
1100 table[i] = forbidden_command; 1097 table[i] = forbidden_command;
1101 }
1102 1098
1103 for (i = 0; i < size; ++i) { 1099 for (i = 0; i < size; ++i)
1104 table[init_table[i].code] = init_table[i].hz; 1100 table[init_table[i].code] = init_table[i].hz;
1105 }
1106} 1101}
1107 1102
1108void via_init_command_verifier(void) 1103void via_init_command_verifier(void)
diff --git a/drivers/gpu/drm/via/via_verifier.h b/drivers/gpu/drm/via/via_verifier.h
index d6f8214b69f5..26b6d361ab95 100644
--- a/drivers/gpu/drm/via/via_verifier.h
+++ b/drivers/gpu/drm/via/via_verifier.h
@@ -54,8 +54,8 @@ typedef struct {
54 const uint32_t *buf_start; 54 const uint32_t *buf_start;
55} drm_via_state_t; 55} drm_via_state_t;
56 56
57extern int via_verify_command_stream(const uint32_t * buf, unsigned int size, 57extern int via_verify_command_stream(const uint32_t *buf, unsigned int size,
58 struct drm_device * dev, int agp); 58 struct drm_device *dev, int agp);
59extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf, 59extern int via_parse_command_stream(struct drm_device *dev, const uint32_t *buf,
60 unsigned int size); 60 unsigned int size);
61 61
diff --git a/drivers/gpu/drm/via/via_video.c b/drivers/gpu/drm/via/via_video.c
index 6efac8117c93..675d311f038f 100644
--- a/drivers/gpu/drm/via/via_video.c
+++ b/drivers/gpu/drm/via/via_video.c
@@ -29,7 +29,7 @@
29#include "via_drm.h" 29#include "via_drm.h"
30#include "via_drv.h" 30#include "via_drv.h"
31 31
32void via_init_futex(drm_via_private_t * dev_priv) 32void via_init_futex(drm_via_private_t *dev_priv)
33{ 33{
34 unsigned int i; 34 unsigned int i;
35 35
@@ -41,11 +41,11 @@ void via_init_futex(drm_via_private_t * dev_priv)
41 } 41 }
42} 42}
43 43
44void via_cleanup_futex(drm_via_private_t * dev_priv) 44void via_cleanup_futex(drm_via_private_t *dev_priv)
45{ 45{
46} 46}
47 47
48void via_release_futex(drm_via_private_t * dev_priv, int context) 48void via_release_futex(drm_via_private_t *dev_priv, int context)
49{ 49{
50 unsigned int i; 50 unsigned int i;
51 volatile int *lock; 51 volatile int *lock;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
index b0866f04ec76..870967a97c15 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -528,7 +528,7 @@ int vmw_fb_init(struct vmw_private *vmw_priv)
528 * Dirty & Deferred IO 528 * Dirty & Deferred IO
529 */ 529 */
530 par->dirty.x1 = par->dirty.x2 = 0; 530 par->dirty.x1 = par->dirty.x2 = 0;
531 par->dirty.y1 = par->dirty.y1 = 0; 531 par->dirty.y1 = par->dirty.y2 = 0;
532 par->dirty.active = true; 532 par->dirty.active = true;
533 spin_lock_init(&par->dirty.lock); 533 spin_lock_init(&par->dirty.lock);
534 info->fbdefio = &vmw_defio; 534 info->fbdefio = &vmw_defio;
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index f1d626112415..437ac786277a 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -972,6 +972,7 @@ int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
972 ret = copy_from_user(rects, user_rects, rects_size); 972 ret = copy_from_user(rects, user_rects, rects_size);
973 if (unlikely(ret != 0)) { 973 if (unlikely(ret != 0)) {
974 DRM_ERROR("Failed to get rects.\n"); 974 DRM_ERROR("Failed to get rects.\n");
975 ret = -EFAULT;
975 goto out_free; 976 goto out_free;
976 } 977 }
977 978
diff --git a/drivers/hid/Kconfig b/drivers/hid/Kconfig
index 132278fa6240..434099369058 100644
--- a/drivers/hid/Kconfig
+++ b/drivers/hid/Kconfig
@@ -358,6 +358,7 @@ config HID_ROCCAT
358config HID_ROCCAT_KONE 358config HID_ROCCAT_KONE
359 tristate "Roccat Kone Mouse support" 359 tristate "Roccat Kone Mouse support"
360 depends on USB_HID 360 depends on USB_HID
361 select HID_ROCCAT
361 ---help--- 362 ---help---
362 Support for Roccat Kone mouse. 363 Support for Roccat Kone mouse.
363 364
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index aa0f7dcabcd7..866e54ec5fb2 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1337,6 +1337,24 @@ static const struct hid_device_id hid_blacklist[] = {
1337 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) }, 1337 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_WIRELESS_OPTICAL_DESKTOP_3_0) },
1338 { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) }, 1338 { HID_USB_DEVICE(USB_VENDOR_ID_MONTEREY, USB_DEVICE_ID_GENIUS_KB29E) },
1339 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) }, 1339 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN) },
1340 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_1) },
1341 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_2) },
1342 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_3) },
1343 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_4) },
1344 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_5) },
1345 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_6) },
1346 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_7) },
1347 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_8) },
1348 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_9) },
1349 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_10) },
1350 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_11) },
1351 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_12) },
1352 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_13) },
1353 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_14) },
1354 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_15) },
1355 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_16) },
1356 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_17) },
1357 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18) },
1340 { HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) }, 1358 { HID_USB_DEVICE(USB_VENDOR_ID_ORTEK, USB_DEVICE_ID_ORTEK_WKB2000) },
1341 { HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) }, 1359 { HID_USB_DEVICE(USB_VENDOR_ID_PETALYNX, USB_DEVICE_ID_PETALYNX_MAXTER_REMOTE) },
1342 { HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH) }, 1360 { HID_USB_DEVICE(USB_VENDOR_ID_QUANTA, USB_DEVICE_ID_QUANTA_OPTICAL_TOUCH) },
@@ -1760,7 +1778,8 @@ int hid_add_device(struct hid_device *hdev)
1760 1778
1761 /* we need to kill them here, otherwise they will stay allocated to 1779 /* we need to kill them here, otherwise they will stay allocated to
1762 * wait for coming driver */ 1780 * wait for coming driver */
1763 if (!(hdev->quirks & HID_QUIRK_NO_IGNORE) && hid_ignore(hdev)) 1781 if (!(hdev->quirks & HID_QUIRK_NO_IGNORE)
1782 && (hid_ignore(hdev) || (hdev->quirks & HID_QUIRK_IGNORE)))
1764 return -ENODEV; 1783 return -ENODEV;
1765 1784
1766 /* XXX hack, any other cleaner solution after the driver core 1785 /* XXX hack, any other cleaner solution after the driver core
diff --git a/drivers/hid/hid-debug.c b/drivers/hid/hid-debug.c
index c94026768570..850d02a7a925 100644
--- a/drivers/hid/hid-debug.c
+++ b/drivers/hid/hid-debug.c
@@ -949,8 +949,8 @@ static ssize_t hid_debug_events_read(struct file *file, char __user *buffer,
949 int ret = 0, len; 949 int ret = 0, len;
950 DECLARE_WAITQUEUE(wait, current); 950 DECLARE_WAITQUEUE(wait, current);
951 951
952 mutex_lock(&list->read_mutex);
952 while (ret == 0) { 953 while (ret == 0) {
953 mutex_lock(&list->read_mutex);
954 if (list->head == list->tail) { 954 if (list->head == list->tail) {
955 add_wait_queue(&list->hdev->debug_wait, &wait); 955 add_wait_queue(&list->hdev->debug_wait, &wait);
956 set_current_state(TASK_INTERRUPTIBLE); 956 set_current_state(TASK_INTERRUPTIBLE);
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 6af77ed0b555..31601eef25dd 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -134,6 +134,7 @@
134#define USB_VENDOR_ID_CH 0x068e 134#define USB_VENDOR_ID_CH 0x068e
135#define USB_DEVICE_ID_CH_PRO_PEDALS 0x00f2 135#define USB_DEVICE_ID_CH_PRO_PEDALS 0x00f2
136#define USB_DEVICE_ID_CH_COMBATSTICK 0x00f4 136#define USB_DEVICE_ID_CH_COMBATSTICK 0x00f4
137#define USB_DEVICE_ID_CH_FLIGHT_SIM_ECLIPSE_YOKE 0x0051
137#define USB_DEVICE_ID_CH_FLIGHT_SIM_YOKE 0x00ff 138#define USB_DEVICE_ID_CH_FLIGHT_SIM_YOKE 0x00ff
138#define USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK 0x00d3 139#define USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK 0x00d3
139 140
@@ -369,6 +370,8 @@
369#define USB_DEVICE_ID_MS_PRESENTER_8K_BT 0x0701 370#define USB_DEVICE_ID_MS_PRESENTER_8K_BT 0x0701
370#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713 371#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713
371 372
373#define USB_VENDOR_ID_MOJO 0x8282
374#define USB_DEVICE_ID_RETRO_ADAPTER 0x3201
372 375
373#define USB_VENDOR_ID_MONTEREY 0x0566 376#define USB_VENDOR_ID_MONTEREY 0x0566
374#define USB_DEVICE_ID_GENIUS_KB29E 0x3004 377#define USB_DEVICE_ID_GENIUS_KB29E 0x3004
@@ -391,6 +394,24 @@
391 394
392#define USB_VENDOR_ID_NTRIG 0x1b96 395#define USB_VENDOR_ID_NTRIG 0x1b96
393#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN 0x0001 396#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN 0x0001
397#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_1 0x0003
398#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_2 0x0004
399#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_3 0x0005
400#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_4 0x0006
401#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_5 0x0007
402#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_6 0x0008
403#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_7 0x0009
404#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_8 0x000A
405#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_9 0x000B
406#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_10 0x000C
407#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_11 0x000D
408#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_12 0x000E
409#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_13 0x000F
410#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_14 0x0010
411#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_15 0x0011
412#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_16 0x0012
413#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_17 0x0013
414#define USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18 0x0014
394 415
395#define USB_VENDOR_ID_ONTRAK 0x0a07 416#define USB_VENDOR_ID_ONTRAK 0x0a07
396#define USB_DEVICE_ID_ONTRAK_ADU100 0x0064 417#define USB_DEVICE_ID_ONTRAK_ADU100 0x0064
diff --git a/drivers/hid/hid-ntrig.c b/drivers/hid/hid-ntrig.c
index b6b0caeeac58..fb69b8c4953f 100644
--- a/drivers/hid/hid-ntrig.c
+++ b/drivers/hid/hid-ntrig.c
@@ -868,6 +868,42 @@ static void ntrig_remove(struct hid_device *hdev)
868static const struct hid_device_id ntrig_devices[] = { 868static const struct hid_device_id ntrig_devices[] = {
869 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN), 869 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN),
870 .driver_data = NTRIG_DUPLICATE_USAGES }, 870 .driver_data = NTRIG_DUPLICATE_USAGES },
871 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_1),
872 .driver_data = NTRIG_DUPLICATE_USAGES },
873 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_2),
874 .driver_data = NTRIG_DUPLICATE_USAGES },
875 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_3),
876 .driver_data = NTRIG_DUPLICATE_USAGES },
877 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_4),
878 .driver_data = NTRIG_DUPLICATE_USAGES },
879 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_5),
880 .driver_data = NTRIG_DUPLICATE_USAGES },
881 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_6),
882 .driver_data = NTRIG_DUPLICATE_USAGES },
883 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_7),
884 .driver_data = NTRIG_DUPLICATE_USAGES },
885 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_8),
886 .driver_data = NTRIG_DUPLICATE_USAGES },
887 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_9),
888 .driver_data = NTRIG_DUPLICATE_USAGES },
889 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_10),
890 .driver_data = NTRIG_DUPLICATE_USAGES },
891 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_11),
892 .driver_data = NTRIG_DUPLICATE_USAGES },
893 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_12),
894 .driver_data = NTRIG_DUPLICATE_USAGES },
895 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_13),
896 .driver_data = NTRIG_DUPLICATE_USAGES },
897 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_14),
898 .driver_data = NTRIG_DUPLICATE_USAGES },
899 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_15),
900 .driver_data = NTRIG_DUPLICATE_USAGES },
901 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_16),
902 .driver_data = NTRIG_DUPLICATE_USAGES },
903 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_17),
904 .driver_data = NTRIG_DUPLICATE_USAGES },
905 { HID_USB_DEVICE(USB_VENDOR_ID_NTRIG, USB_DEVICE_ID_NTRIG_TOUCH_SCREEN_18),
906 .driver_data = NTRIG_DUPLICATE_USAGES },
871 { } 907 { }
872}; 908};
873MODULE_DEVICE_TABLE(hid, ntrig_devices); 909MODULE_DEVICE_TABLE(hid, ntrig_devices);
diff --git a/drivers/hid/usbhid/hid-core.c b/drivers/hid/usbhid/hid-core.c
index 1ebd3244eb85..b729c0286679 100644
--- a/drivers/hid/usbhid/hid-core.c
+++ b/drivers/hid/usbhid/hid-core.c
@@ -827,14 +827,21 @@ static int usbhid_output_raw_report(struct hid_device *hid, __u8 *buf, size_t co
827 ret++; 827 ret++;
828 } 828 }
829 } else { 829 } else {
830 int skipped_report_id = 0;
831 if (buf[0] == 0x0) {
832 /* Don't send the Report ID */
833 buf++;
834 count--;
835 skipped_report_id = 1;
836 }
830 ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), 837 ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0),
831 HID_REQ_SET_REPORT, 838 HID_REQ_SET_REPORT,
832 USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE, 839 USB_DIR_OUT | USB_TYPE_CLASS | USB_RECIP_INTERFACE,
833 ((report_type + 1) << 8) | *buf, 840 ((report_type + 1) << 8) | *buf,
834 interface->desc.bInterfaceNumber, buf + 1, count - 1, 841 interface->desc.bInterfaceNumber, buf, count,
835 USB_CTRL_SET_TIMEOUT); 842 USB_CTRL_SET_TIMEOUT);
836 /* count also the report id */ 843 /* count also the report id, if this was a numbered report. */
837 if (ret > 0) 844 if (ret > 0 && skipped_report_id)
838 ret++; 845 ret++;
839 } 846 }
840 847
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
index 5ff8d327f33a..5f5aa39b3988 100644
--- a/drivers/hid/usbhid/hid-quirks.c
+++ b/drivers/hid/usbhid/hid-quirks.c
@@ -34,6 +34,7 @@ static const struct hid_blacklist {
34 { USB_VENDOR_ID_ALPS, USB_DEVICE_ID_IBM_GAMEPAD, HID_QUIRK_BADPAD }, 34 { USB_VENDOR_ID_ALPS, USB_DEVICE_ID_IBM_GAMEPAD, HID_QUIRK_BADPAD },
35 { USB_VENDOR_ID_CHIC, USB_DEVICE_ID_CHIC_GAMEPAD, HID_QUIRK_BADPAD }, 35 { USB_VENDOR_ID_CHIC, USB_DEVICE_ID_CHIC_GAMEPAD, HID_QUIRK_BADPAD },
36 { USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH, HID_QUIRK_MULTI_INPUT }, 36 { USB_VENDOR_ID_DWAV, USB_DEVICE_ID_DWAV_EGALAX_MULTITOUCH, HID_QUIRK_MULTI_INPUT },
37 { USB_VENDOR_ID_MOJO, USB_DEVICE_ID_RETRO_ADAPTER, HID_QUIRK_MULTI_INPUT },
37 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_DRIVING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, 38 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_DRIVING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
38 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, 39 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FLYING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
39 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT }, 40 { USB_VENDOR_ID_HAPP, USB_DEVICE_ID_UGCI_FIGHTING, HID_QUIRK_BADPAD | HID_QUIRK_MULTI_INPUT },
@@ -56,6 +57,7 @@ static const struct hid_blacklist {
56 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVM, HID_QUIRK_NOGET }, 57 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVM, HID_QUIRK_NOGET },
57 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVMC, HID_QUIRK_NOGET }, 58 { USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_4PORTKVMC, HID_QUIRK_NOGET },
58 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_COMBATSTICK, HID_QUIRK_NOGET }, 59 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_COMBATSTICK, HID_QUIRK_NOGET },
60 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_FLIGHT_SIM_ECLIPSE_YOKE, HID_QUIRK_NOGET },
59 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_FLIGHT_SIM_YOKE, HID_QUIRK_NOGET }, 61 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_FLIGHT_SIM_YOKE, HID_QUIRK_NOGET },
60 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_PRO_PEDALS, HID_QUIRK_NOGET }, 62 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_PRO_PEDALS, HID_QUIRK_NOGET },
61 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK, HID_QUIRK_NOGET }, 63 { USB_VENDOR_ID_CH, USB_DEVICE_ID_CH_3AXIS_5BUTTON_STICK, HID_QUIRK_NOGET },
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index 2988da150ed6..05344af50734 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -53,6 +53,7 @@ struct coretemp_data {
53 struct mutex update_lock; 53 struct mutex update_lock;
54 const char *name; 54 const char *name;
55 u32 id; 55 u32 id;
56 u16 core_id;
56 char valid; /* zero until following fields are valid */ 57 char valid; /* zero until following fields are valid */
57 unsigned long last_updated; /* in jiffies */ 58 unsigned long last_updated; /* in jiffies */
58 int temp; 59 int temp;
@@ -75,7 +76,7 @@ static ssize_t show_name(struct device *dev, struct device_attribute
75 if (attr->index == SHOW_NAME) 76 if (attr->index == SHOW_NAME)
76 ret = sprintf(buf, "%s\n", data->name); 77 ret = sprintf(buf, "%s\n", data->name);
77 else /* show label */ 78 else /* show label */
78 ret = sprintf(buf, "Core %d\n", data->id); 79 ret = sprintf(buf, "Core %d\n", data->core_id);
79 return ret; 80 return ret;
80} 81}
81 82
@@ -304,6 +305,9 @@ static int __devinit coretemp_probe(struct platform_device *pdev)
304 } 305 }
305 306
306 data->id = pdev->id; 307 data->id = pdev->id;
308#ifdef CONFIG_SMP
309 data->core_id = c->cpu_core_id;
310#endif
307 data->name = "coretemp"; 311 data->name = "coretemp";
308 mutex_init(&data->update_lock); 312 mutex_init(&data->update_lock);
309 313
@@ -405,6 +409,10 @@ struct pdev_entry {
405 struct list_head list; 409 struct list_head list;
406 struct platform_device *pdev; 410 struct platform_device *pdev;
407 unsigned int cpu; 411 unsigned int cpu;
412#ifdef CONFIG_SMP
413 u16 phys_proc_id;
414 u16 cpu_core_id;
415#endif
408}; 416};
409 417
410static LIST_HEAD(pdev_list); 418static LIST_HEAD(pdev_list);
@@ -415,6 +423,22 @@ static int __cpuinit coretemp_device_add(unsigned int cpu)
415 int err; 423 int err;
416 struct platform_device *pdev; 424 struct platform_device *pdev;
417 struct pdev_entry *pdev_entry; 425 struct pdev_entry *pdev_entry;
426#ifdef CONFIG_SMP
427 struct cpuinfo_x86 *c = &cpu_data(cpu);
428#endif
429
430 mutex_lock(&pdev_list_mutex);
431
432#ifdef CONFIG_SMP
433 /* Skip second HT entry of each core */
434 list_for_each_entry(pdev_entry, &pdev_list, list) {
435 if (c->phys_proc_id == pdev_entry->phys_proc_id &&
436 c->cpu_core_id == pdev_entry->cpu_core_id) {
437 err = 0; /* Not an error */
438 goto exit;
439 }
440 }
441#endif
418 442
419 pdev = platform_device_alloc(DRVNAME, cpu); 443 pdev = platform_device_alloc(DRVNAME, cpu);
420 if (!pdev) { 444 if (!pdev) {
@@ -438,7 +462,10 @@ static int __cpuinit coretemp_device_add(unsigned int cpu)
438 462
439 pdev_entry->pdev = pdev; 463 pdev_entry->pdev = pdev;
440 pdev_entry->cpu = cpu; 464 pdev_entry->cpu = cpu;
441 mutex_lock(&pdev_list_mutex); 465#ifdef CONFIG_SMP
466 pdev_entry->phys_proc_id = c->phys_proc_id;
467 pdev_entry->cpu_core_id = c->cpu_core_id;
468#endif
442 list_add_tail(&pdev_entry->list, &pdev_list); 469 list_add_tail(&pdev_entry->list, &pdev_list);
443 mutex_unlock(&pdev_list_mutex); 470 mutex_unlock(&pdev_list_mutex);
444 471
@@ -449,6 +476,7 @@ exit_device_free:
449exit_device_put: 476exit_device_put:
450 platform_device_put(pdev); 477 platform_device_put(pdev);
451exit: 478exit:
479 mutex_unlock(&pdev_list_mutex);
452 return err; 480 return err;
453} 481}
454 482
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
index 5be09c048c5f..25763d2223b6 100644
--- a/drivers/hwmon/it87.c
+++ b/drivers/hwmon/it87.c
@@ -80,6 +80,13 @@ superio_inb(int reg)
80 return inb(VAL); 80 return inb(VAL);
81} 81}
82 82
83static inline void
84superio_outb(int reg, int val)
85{
86 outb(reg, REG);
87 outb(val, VAL);
88}
89
83static int superio_inw(int reg) 90static int superio_inw(int reg)
84{ 91{
85 int val; 92 int val;
@@ -1517,6 +1524,21 @@ static int __init it87_find(unsigned short *address,
1517 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); 1524 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
1518 1525
1519 reg = superio_inb(IT87_SIO_PINX2_REG); 1526 reg = superio_inb(IT87_SIO_PINX2_REG);
1527 /*
1528 * The IT8720F has no VIN7 pin, so VCCH should always be
1529 * routed internally to VIN7 with an internal divider.
1530 * Curiously, there still is a configuration bit to control
1531 * this, which means it can be set incorrectly. And even
1532 * more curiously, many boards out there are improperly
1533 * configured, even though the IT8720F datasheet claims
1534 * that the internal routing of VCCH to VIN7 is the default
1535 * setting. So we force the internal routing in this case.
1536 */
1537 if (sio_data->type == it8720 && !(reg & (1 << 1))) {
1538 reg |= (1 << 1);
1539 superio_outb(IT87_SIO_PINX2_REG, reg);
1540 pr_notice("it87: Routing internal VCCH to in7\n");
1541 }
1520 if (reg & (1 << 0)) 1542 if (reg & (1 << 0))
1521 pr_info("it87: in3 is VCC (+5V)\n"); 1543 pr_info("it87: in3 is VCC (+5V)\n");
1522 if (reg & (1 << 1)) 1544 if (reg & (1 << 1))
diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c
index f26acdb11681..8bdf80d91598 100644
--- a/drivers/hwmon/k8temp.c
+++ b/drivers/hwmon/k8temp.c
@@ -180,11 +180,13 @@ static int __devinit k8temp_probe(struct pci_dev *pdev,
180 } 180 }
181 181
182 if ((model >= 0x69) && 182 if ((model >= 0x69) &&
183 !(model == 0xc1 || model == 0x6c || model == 0x7c)) { 183 !(model == 0xc1 || model == 0x6c || model == 0x7c ||
184 model == 0x6b || model == 0x6f || model == 0x7f)) {
184 /* 185 /*
185 * RevG desktop CPUs (i.e. no socket S1G1 parts) 186 * RevG desktop CPUs (i.e. no socket S1G1 or
186 * need additional offset, otherwise reported 187 * ASB1 parts) need additional offset,
187 * temperature is below ambient temperature 188 * otherwise reported temperature is below
189 * ambient temperature
188 */ 190 */
189 data->temp_offset = 21000; 191 data->temp_offset = 21000;
190 } 192 }
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index f4b21f2bb8ed..c60081169cc3 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -655,7 +655,7 @@ static void __devinit dmi_check_onboard_device(u8 type, const char *name,
655 /* & ~0x80, ignore enabled/disabled bit */ 655 /* & ~0x80, ignore enabled/disabled bit */
656 if ((type & ~0x80) != dmi_devices[i].type) 656 if ((type & ~0x80) != dmi_devices[i].type)
657 continue; 657 continue;
658 if (strcmp(name, dmi_devices[i].name)) 658 if (strcasecmp(name, dmi_devices[i].name))
659 continue; 659 continue;
660 660
661 memset(&info, 0, sizeof(struct i2c_board_info)); 661 memset(&info, 0, sizeof(struct i2c_board_info));
@@ -704,9 +704,6 @@ static int __devinit i801_probe(struct pci_dev *dev,
704{ 704{
705 unsigned char temp; 705 unsigned char temp;
706 int err, i; 706 int err, i;
707#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
708 const char *vendor;
709#endif
710 707
711 I801_dev = dev; 708 I801_dev = dev;
712 i801_features = 0; 709 i801_features = 0;
@@ -808,8 +805,7 @@ static int __devinit i801_probe(struct pci_dev *dev,
808 } 805 }
809#endif 806#endif
810#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE 807#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
811 vendor = dmi_get_system_info(DMI_BOARD_VENDOR); 808 if (dmi_name_in_vendors("FUJITSU"))
812 if (vendor && !strcmp(vendor, "FUJITSU SIEMENS"))
813 dmi_walk(dmi_check_onboard_devices, &i801_adapter); 809 dmi_walk(dmi_check_onboard_devices, &i801_adapter);
814#endif 810#endif
815 811
diff --git a/drivers/i2c/busses/i2c-sibyte.c b/drivers/i2c/busses/i2c-sibyte.c
index 3d76a188e42f..0fe505d7abe9 100644
--- a/drivers/i2c/busses/i2c-sibyte.c
+++ b/drivers/i2c/busses/i2c-sibyte.c
@@ -94,7 +94,7 @@ static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
94 } 94 }
95 break; 95 break;
96 default: 96 default:
97 return -1; /* XXXKW better error code? */ 97 return -EOPNOTSUPP;
98 } 98 }
99 99
100 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY) 100 while (csr_in32(SMB_CSR(adap, R_SMB_STATUS)) & M_SMB_BUSY)
@@ -104,7 +104,7 @@ static int smbus_xfer(struct i2c_adapter *i2c_adap, u16 addr,
104 if (error & M_SMB_ERROR) { 104 if (error & M_SMB_ERROR) {
105 /* Clear error bit by writing a 1 */ 105 /* Clear error bit by writing a 1 */
106 csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS)); 106 csr_out32(M_SMB_ERROR, SMB_CSR(adap, R_SMB_STATUS));
107 return -1; /* XXXKW better error code? */ 107 return (error & M_SMB_ERROR_TYPE) ? -EIO : -ENXIO;
108 } 108 }
109 109
110 if (data_bytes == 1) 110 if (data_bytes == 1)
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 1cca2631e5b3..0815e10da7c6 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -1428,13 +1428,12 @@ static int i2c_detect(struct i2c_adapter *adapter, struct i2c_driver *driver)
1428 if (!(adapter->class & driver->class)) 1428 if (!(adapter->class & driver->class))
1429 goto exit_free; 1429 goto exit_free;
1430 1430
1431 /* Stop here if we can't use SMBUS_QUICK */ 1431 /* Stop here if the bus doesn't support probing */
1432 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_QUICK)) { 1432 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_READ_BYTE)) {
1433 if (address_list[0] == I2C_CLIENT_END) 1433 if (address_list[0] == I2C_CLIENT_END)
1434 goto exit_free; 1434 goto exit_free;
1435 1435
1436 dev_warn(&adapter->dev, "SMBus Quick command not supported, " 1436 dev_warn(&adapter->dev, "Probing not supported\n");
1437 "can't probe for chips\n");
1438 err = -EOPNOTSUPP; 1437 err = -EOPNOTSUPP;
1439 goto exit_free; 1438 goto exit_free;
1440 } 1439 }
diff --git a/drivers/infiniband/hw/cxgb4/cm.c b/drivers/infiniband/hw/cxgb4/cm.c
index 30ce0a8eca09..855ee44fdb52 100644
--- a/drivers/infiniband/hw/cxgb4/cm.c
+++ b/drivers/infiniband/hw/cxgb4/cm.c
@@ -969,7 +969,8 @@ static void process_mpa_reply(struct c4iw_ep *ep, struct sk_buff *skb)
969 goto err; 969 goto err;
970 goto out; 970 goto out;
971err: 971err:
972 abort_connection(ep, skb, GFP_KERNEL); 972 state_set(&ep->com, ABORTING);
973 send_abort(ep, skb, GFP_KERNEL);
973out: 974out:
974 connect_reply_upcall(ep, err); 975 connect_reply_upcall(ep, err);
975 return; 976 return;
@@ -1372,7 +1373,7 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb)
1372 pdev, 0); 1373 pdev, 0);
1373 mtu = pdev->mtu; 1374 mtu = pdev->mtu;
1374 tx_chan = cxgb4_port_chan(pdev); 1375 tx_chan = cxgb4_port_chan(pdev);
1375 smac_idx = tx_chan << 1; 1376 smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1;
1376 step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan; 1377 step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan;
1377 txq_idx = cxgb4_port_idx(pdev) * step; 1378 txq_idx = cxgb4_port_idx(pdev) * step;
1378 step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; 1379 step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan;
@@ -1383,7 +1384,7 @@ static int pass_accept_req(struct c4iw_dev *dev, struct sk_buff *skb)
1383 dst->neighbour->dev, 0); 1384 dst->neighbour->dev, 0);
1384 mtu = dst_mtu(dst); 1385 mtu = dst_mtu(dst);
1385 tx_chan = cxgb4_port_chan(dst->neighbour->dev); 1386 tx_chan = cxgb4_port_chan(dst->neighbour->dev);
1386 smac_idx = tx_chan << 1; 1387 smac_idx = (cxgb4_port_viid(dst->neighbour->dev) & 0x7F) << 1;
1387 step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan; 1388 step = dev->rdev.lldi.ntxq / dev->rdev.lldi.nchan;
1388 txq_idx = cxgb4_port_idx(dst->neighbour->dev) * step; 1389 txq_idx = cxgb4_port_idx(dst->neighbour->dev) * step;
1389 step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan; 1390 step = dev->rdev.lldi.nrxq / dev->rdev.lldi.nchan;
@@ -1950,7 +1951,7 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
1950 pdev, 0); 1951 pdev, 0);
1951 ep->mtu = pdev->mtu; 1952 ep->mtu = pdev->mtu;
1952 ep->tx_chan = cxgb4_port_chan(pdev); 1953 ep->tx_chan = cxgb4_port_chan(pdev);
1953 ep->smac_idx = ep->tx_chan << 1; 1954 ep->smac_idx = (cxgb4_port_viid(pdev) & 0x7F) << 1;
1954 step = ep->com.dev->rdev.lldi.ntxq / 1955 step = ep->com.dev->rdev.lldi.ntxq /
1955 ep->com.dev->rdev.lldi.nchan; 1956 ep->com.dev->rdev.lldi.nchan;
1956 ep->txq_idx = cxgb4_port_idx(pdev) * step; 1957 ep->txq_idx = cxgb4_port_idx(pdev) * step;
@@ -1965,7 +1966,8 @@ int c4iw_connect(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param)
1965 ep->dst->neighbour->dev, 0); 1966 ep->dst->neighbour->dev, 0);
1966 ep->mtu = dst_mtu(ep->dst); 1967 ep->mtu = dst_mtu(ep->dst);
1967 ep->tx_chan = cxgb4_port_chan(ep->dst->neighbour->dev); 1968 ep->tx_chan = cxgb4_port_chan(ep->dst->neighbour->dev);
1968 ep->smac_idx = ep->tx_chan << 1; 1969 ep->smac_idx = (cxgb4_port_viid(ep->dst->neighbour->dev) &
1970 0x7F) << 1;
1969 step = ep->com.dev->rdev.lldi.ntxq / 1971 step = ep->com.dev->rdev.lldi.ntxq /
1970 ep->com.dev->rdev.lldi.nchan; 1972 ep->com.dev->rdev.lldi.nchan;
1971 ep->txq_idx = cxgb4_port_idx(ep->dst->neighbour->dev) * step; 1973 ep->txq_idx = cxgb4_port_idx(ep->dst->neighbour->dev) * step;
diff --git a/drivers/infiniband/hw/cxgb4/cq.c b/drivers/infiniband/hw/cxgb4/cq.c
index 2447f5295482..fac5c6e68011 100644
--- a/drivers/infiniband/hw/cxgb4/cq.c
+++ b/drivers/infiniband/hw/cxgb4/cq.c
@@ -77,7 +77,7 @@ static int destroy_cq(struct c4iw_rdev *rdev, struct t4_cq *cq,
77 kfree(cq->sw_queue); 77 kfree(cq->sw_queue);
78 dma_free_coherent(&(rdev->lldi.pdev->dev), 78 dma_free_coherent(&(rdev->lldi.pdev->dev),
79 cq->memsize, cq->queue, 79 cq->memsize, cq->queue,
80 pci_unmap_addr(cq, mapping)); 80 dma_unmap_addr(cq, mapping));
81 c4iw_put_cqid(rdev, cq->cqid, uctx); 81 c4iw_put_cqid(rdev, cq->cqid, uctx);
82 return ret; 82 return ret;
83} 83}
@@ -112,7 +112,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq,
112 ret = -ENOMEM; 112 ret = -ENOMEM;
113 goto err3; 113 goto err3;
114 } 114 }
115 pci_unmap_addr_set(cq, mapping, cq->dma_addr); 115 dma_unmap_addr_set(cq, mapping, cq->dma_addr);
116 memset(cq->queue, 0, cq->memsize); 116 memset(cq->queue, 0, cq->memsize);
117 117
118 /* build fw_ri_res_wr */ 118 /* build fw_ri_res_wr */
@@ -179,7 +179,7 @@ static int create_cq(struct c4iw_rdev *rdev, struct t4_cq *cq,
179 return 0; 179 return 0;
180err4: 180err4:
181 dma_free_coherent(&rdev->lldi.pdev->dev, cq->memsize, cq->queue, 181 dma_free_coherent(&rdev->lldi.pdev->dev, cq->memsize, cq->queue,
182 pci_unmap_addr(cq, mapping)); 182 dma_unmap_addr(cq, mapping));
183err3: 183err3:
184 kfree(cq->sw_queue); 184 kfree(cq->sw_queue);
185err2: 185err2:
@@ -764,7 +764,7 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
764 struct c4iw_create_cq_resp uresp; 764 struct c4iw_create_cq_resp uresp;
765 struct c4iw_ucontext *ucontext = NULL; 765 struct c4iw_ucontext *ucontext = NULL;
766 int ret; 766 int ret;
767 size_t memsize; 767 size_t memsize, hwentries;
768 struct c4iw_mm_entry *mm, *mm2; 768 struct c4iw_mm_entry *mm, *mm2;
769 769
770 PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries); 770 PDBG("%s ib_dev %p entries %d\n", __func__, ibdev, entries);
@@ -788,14 +788,29 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
788 * entries must be multiple of 16 for HW. 788 * entries must be multiple of 16 for HW.
789 */ 789 */
790 entries = roundup(entries, 16); 790 entries = roundup(entries, 16);
791 memsize = entries * sizeof *chp->cq.queue; 791
792 /*
793 * Make actual HW queue 2x to avoid cdix_inc overflows.
794 */
795 hwentries = entries * 2;
796
797 /*
798 * Make HW queue at least 64 entries so GTS updates aren't too
799 * frequent.
800 */
801 if (hwentries < 64)
802 hwentries = 64;
803
804 memsize = hwentries * sizeof *chp->cq.queue;
792 805
793 /* 806 /*
794 * memsize must be a multiple of the page size if its a user cq. 807 * memsize must be a multiple of the page size if its a user cq.
795 */ 808 */
796 if (ucontext) 809 if (ucontext) {
797 memsize = roundup(memsize, PAGE_SIZE); 810 memsize = roundup(memsize, PAGE_SIZE);
798 chp->cq.size = entries; 811 hwentries = memsize / sizeof *chp->cq.queue;
812 }
813 chp->cq.size = hwentries;
799 chp->cq.memsize = memsize; 814 chp->cq.memsize = memsize;
800 815
801 ret = create_cq(&rhp->rdev, &chp->cq, 816 ret = create_cq(&rhp->rdev, &chp->cq,
@@ -805,7 +820,7 @@ struct ib_cq *c4iw_create_cq(struct ib_device *ibdev, int entries,
805 820
806 chp->rhp = rhp; 821 chp->rhp = rhp;
807 chp->cq.size--; /* status page */ 822 chp->cq.size--; /* status page */
808 chp->ibcq.cqe = chp->cq.size - 1; 823 chp->ibcq.cqe = entries - 2;
809 spin_lock_init(&chp->lock); 824 spin_lock_init(&chp->lock);
810 atomic_set(&chp->refcnt, 1); 825 atomic_set(&chp->refcnt, 1);
811 init_waitqueue_head(&chp->wait); 826 init_waitqueue_head(&chp->wait);
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
index 277ab589b44d..d33e1a668811 100644
--- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
+++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
@@ -261,7 +261,7 @@ static inline struct c4iw_mw *to_c4iw_mw(struct ib_mw *ibmw)
261 261
262struct c4iw_fr_page_list { 262struct c4iw_fr_page_list {
263 struct ib_fast_reg_page_list ibpl; 263 struct ib_fast_reg_page_list ibpl;
264 DECLARE_PCI_UNMAP_ADDR(mapping); 264 DEFINE_DMA_UNMAP_ADDR(mapping);
265 dma_addr_t dma_addr; 265 dma_addr_t dma_addr;
266 struct c4iw_dev *dev; 266 struct c4iw_dev *dev;
267 int size; 267 int size;
diff --git a/drivers/infiniband/hw/cxgb4/mem.c b/drivers/infiniband/hw/cxgb4/mem.c
index 7f94da1a2437..82b5703b8947 100644
--- a/drivers/infiniband/hw/cxgb4/mem.c
+++ b/drivers/infiniband/hw/cxgb4/mem.c
@@ -764,7 +764,7 @@ struct ib_fast_reg_page_list *c4iw_alloc_fastreg_pbl(struct ib_device *device,
764 if (!c4pl) 764 if (!c4pl)
765 return ERR_PTR(-ENOMEM); 765 return ERR_PTR(-ENOMEM);
766 766
767 pci_unmap_addr_set(c4pl, mapping, dma_addr); 767 dma_unmap_addr_set(c4pl, mapping, dma_addr);
768 c4pl->dma_addr = dma_addr; 768 c4pl->dma_addr = dma_addr;
769 c4pl->dev = dev; 769 c4pl->dev = dev;
770 c4pl->size = size; 770 c4pl->size = size;
@@ -779,7 +779,7 @@ void c4iw_free_fastreg_pbl(struct ib_fast_reg_page_list *ibpl)
779 struct c4iw_fr_page_list *c4pl = to_c4iw_fr_page_list(ibpl); 779 struct c4iw_fr_page_list *c4pl = to_c4iw_fr_page_list(ibpl);
780 780
781 dma_free_coherent(&c4pl->dev->rdev.lldi.pdev->dev, c4pl->size, 781 dma_free_coherent(&c4pl->dev->rdev.lldi.pdev->dev, c4pl->size,
782 c4pl, pci_unmap_addr(c4pl, mapping)); 782 c4pl, dma_unmap_addr(c4pl, mapping));
783} 783}
784 784
785int c4iw_dereg_mr(struct ib_mr *ib_mr) 785int c4iw_dereg_mr(struct ib_mr *ib_mr)
diff --git a/drivers/infiniband/hw/cxgb4/qp.c b/drivers/infiniband/hw/cxgb4/qp.c
index 0c28ed1eafa6..7065cb310553 100644
--- a/drivers/infiniband/hw/cxgb4/qp.c
+++ b/drivers/infiniband/hw/cxgb4/qp.c
@@ -40,10 +40,10 @@ static int destroy_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
40 */ 40 */
41 dma_free_coherent(&(rdev->lldi.pdev->dev), 41 dma_free_coherent(&(rdev->lldi.pdev->dev),
42 wq->rq.memsize, wq->rq.queue, 42 wq->rq.memsize, wq->rq.queue,
43 pci_unmap_addr(&wq->rq, mapping)); 43 dma_unmap_addr(&wq->rq, mapping));
44 dma_free_coherent(&(rdev->lldi.pdev->dev), 44 dma_free_coherent(&(rdev->lldi.pdev->dev),
45 wq->sq.memsize, wq->sq.queue, 45 wq->sq.memsize, wq->sq.queue,
46 pci_unmap_addr(&wq->sq, mapping)); 46 dma_unmap_addr(&wq->sq, mapping));
47 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); 47 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size);
48 kfree(wq->rq.sw_rq); 48 kfree(wq->rq.sw_rq);
49 kfree(wq->sq.sw_sq); 49 kfree(wq->sq.sw_sq);
@@ -99,7 +99,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
99 if (!wq->sq.queue) 99 if (!wq->sq.queue)
100 goto err5; 100 goto err5;
101 memset(wq->sq.queue, 0, wq->sq.memsize); 101 memset(wq->sq.queue, 0, wq->sq.memsize);
102 pci_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr); 102 dma_unmap_addr_set(&wq->sq, mapping, wq->sq.dma_addr);
103 103
104 wq->rq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev), 104 wq->rq.queue = dma_alloc_coherent(&(rdev->lldi.pdev->dev),
105 wq->rq.memsize, &(wq->rq.dma_addr), 105 wq->rq.memsize, &(wq->rq.dma_addr),
@@ -112,7 +112,7 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
112 wq->rq.queue, 112 wq->rq.queue,
113 (unsigned long long)virt_to_phys(wq->rq.queue)); 113 (unsigned long long)virt_to_phys(wq->rq.queue));
114 memset(wq->rq.queue, 0, wq->rq.memsize); 114 memset(wq->rq.queue, 0, wq->rq.memsize);
115 pci_unmap_addr_set(&wq->rq, mapping, wq->rq.dma_addr); 115 dma_unmap_addr_set(&wq->rq, mapping, wq->rq.dma_addr);
116 116
117 wq->db = rdev->lldi.db_reg; 117 wq->db = rdev->lldi.db_reg;
118 wq->gts = rdev->lldi.gts_reg; 118 wq->gts = rdev->lldi.gts_reg;
@@ -217,11 +217,11 @@ static int create_qp(struct c4iw_rdev *rdev, struct t4_wq *wq,
217err7: 217err7:
218 dma_free_coherent(&(rdev->lldi.pdev->dev), 218 dma_free_coherent(&(rdev->lldi.pdev->dev),
219 wq->rq.memsize, wq->rq.queue, 219 wq->rq.memsize, wq->rq.queue,
220 pci_unmap_addr(&wq->rq, mapping)); 220 dma_unmap_addr(&wq->rq, mapping));
221err6: 221err6:
222 dma_free_coherent(&(rdev->lldi.pdev->dev), 222 dma_free_coherent(&(rdev->lldi.pdev->dev),
223 wq->sq.memsize, wq->sq.queue, 223 wq->sq.memsize, wq->sq.queue,
224 pci_unmap_addr(&wq->sq, mapping)); 224 dma_unmap_addr(&wq->sq, mapping));
225err5: 225err5:
226 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size); 226 c4iw_rqtpool_free(rdev, wq->rq.rqt_hwaddr, wq->rq.rqt_size);
227err4: 227err4:
diff --git a/drivers/infiniband/hw/cxgb4/t4.h b/drivers/infiniband/hw/cxgb4/t4.h
index 1057cb96302e..9cf8d85bfcff 100644
--- a/drivers/infiniband/hw/cxgb4/t4.h
+++ b/drivers/infiniband/hw/cxgb4/t4.h
@@ -279,7 +279,7 @@ struct t4_swsqe {
279struct t4_sq { 279struct t4_sq {
280 union t4_wr *queue; 280 union t4_wr *queue;
281 dma_addr_t dma_addr; 281 dma_addr_t dma_addr;
282 DECLARE_PCI_UNMAP_ADDR(mapping); 282 DEFINE_DMA_UNMAP_ADDR(mapping);
283 struct t4_swsqe *sw_sq; 283 struct t4_swsqe *sw_sq;
284 struct t4_swsqe *oldest_read; 284 struct t4_swsqe *oldest_read;
285 u64 udb; 285 u64 udb;
@@ -298,7 +298,7 @@ struct t4_swrqe {
298struct t4_rq { 298struct t4_rq {
299 union t4_recv_wr *queue; 299 union t4_recv_wr *queue;
300 dma_addr_t dma_addr; 300 dma_addr_t dma_addr;
301 DECLARE_PCI_UNMAP_ADDR(mapping); 301 DEFINE_DMA_UNMAP_ADDR(mapping);
302 struct t4_swrqe *sw_rq; 302 struct t4_swrqe *sw_rq;
303 u64 udb; 303 u64 udb;
304 size_t memsize; 304 size_t memsize;
@@ -429,7 +429,7 @@ static inline int t4_wq_db_enabled(struct t4_wq *wq)
429struct t4_cq { 429struct t4_cq {
430 struct t4_cqe *queue; 430 struct t4_cqe *queue;
431 dma_addr_t dma_addr; 431 dma_addr_t dma_addr;
432 DECLARE_PCI_UNMAP_ADDR(mapping); 432 DEFINE_DMA_UNMAP_ADDR(mapping);
433 struct t4_cqe *sw_queue; 433 struct t4_cqe *sw_queue;
434 void __iomem *gts; 434 void __iomem *gts;
435 struct c4iw_rdev *rdev; 435 struct c4iw_rdev *rdev;
diff --git a/drivers/infiniband/hw/qib/Makefile b/drivers/infiniband/hw/qib/Makefile
index c6515a1b9a6a..f12d7bb8b39f 100644
--- a/drivers/infiniband/hw/qib/Makefile
+++ b/drivers/infiniband/hw/qib/Makefile
@@ -6,7 +6,7 @@ ib_qib-y := qib_cq.o qib_diag.o qib_dma.o qib_driver.o qib_eeprom.o \
6 qib_qp.o qib_qsfp.o qib_rc.o qib_ruc.o qib_sdma.o qib_srq.o \ 6 qib_qp.o qib_qsfp.o qib_rc.o qib_ruc.o qib_sdma.o qib_srq.o \
7 qib_sysfs.o qib_twsi.o qib_tx.o qib_uc.o qib_ud.o \ 7 qib_sysfs.o qib_twsi.o qib_tx.o qib_uc.o qib_ud.o \
8 qib_user_pages.o qib_user_sdma.o qib_verbs_mcast.o qib_iba7220.o \ 8 qib_user_pages.o qib_user_sdma.o qib_verbs_mcast.o qib_iba7220.o \
9 qib_sd7220.o qib_sd7220_img.o qib_iba7322.o qib_verbs.o 9 qib_sd7220.o qib_iba7322.o qib_verbs.o
10 10
11# 6120 has no fallback if no MSI interrupts, others can do INTx 11# 6120 has no fallback if no MSI interrupts, others can do INTx
12ib_qib-$(CONFIG_PCI_MSI) += qib_iba6120.o 12ib_qib-$(CONFIG_PCI_MSI) += qib_iba6120.o
diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h
index 32d9208efcff..3593983df7ba 100644
--- a/drivers/infiniband/hw/qib/qib.h
+++ b/drivers/infiniband/hw/qib/qib.h
@@ -686,6 +686,7 @@ struct qib_devdata {
686 void __iomem *piobase; 686 void __iomem *piobase;
687 /* mem-mapped pointer to base of user chip regs (if using WC PAT) */ 687 /* mem-mapped pointer to base of user chip regs (if using WC PAT) */
688 u64 __iomem *userbase; 688 u64 __iomem *userbase;
689 void __iomem *piovl15base; /* base of VL15 buffers, if not WC */
689 /* 690 /*
690 * points to area where PIOavail registers will be DMA'ed. 691 * points to area where PIOavail registers will be DMA'ed.
691 * Has to be on a page of it's own, because the page will be 692 * Has to be on a page of it's own, because the page will be
diff --git a/drivers/infiniband/hw/qib/qib_7220.h b/drivers/infiniband/hw/qib/qib_7220.h
index ea0bfd896f92..21f374aa0631 100644
--- a/drivers/infiniband/hw/qib/qib_7220.h
+++ b/drivers/infiniband/hw/qib/qib_7220.h
@@ -109,10 +109,6 @@ struct qib_chippport_specific {
109 */ 109 */
110int qib_sd7220_presets(struct qib_devdata *dd); 110int qib_sd7220_presets(struct qib_devdata *dd);
111int qib_sd7220_init(struct qib_devdata *dd); 111int qib_sd7220_init(struct qib_devdata *dd);
112int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, u8 *img,
113 int len, int offset);
114int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum, const u8 *img,
115 int len, int offset);
116void qib_sd7220_clr_ibpar(struct qib_devdata *); 112void qib_sd7220_clr_ibpar(struct qib_devdata *);
117/* 113/*
118 * Below used for sdnum parameter, selecting one of the two sections 114 * Below used for sdnum parameter, selecting one of the two sections
@@ -121,9 +117,6 @@ void qib_sd7220_clr_ibpar(struct qib_devdata *);
121 */ 117 */
122#define IB_7220_SERDES 2 118#define IB_7220_SERDES 2
123 119
124int qib_sd7220_ib_load(struct qib_devdata *dd);
125int qib_sd7220_ib_vfy(struct qib_devdata *dd);
126
127static inline u32 qib_read_kreg32(const struct qib_devdata *dd, 120static inline u32 qib_read_kreg32(const struct qib_devdata *dd,
128 const u16 regno) 121 const u16 regno)
129{ 122{
diff --git a/drivers/infiniband/hw/qib/qib_7322_regs.h b/drivers/infiniband/hw/qib/qib_7322_regs.h
index a97440ba924c..32dc81ff8d4a 100644
--- a/drivers/infiniband/hw/qib/qib_7322_regs.h
+++ b/drivers/infiniband/hw/qib/qib_7322_regs.h
@@ -742,15 +742,15 @@
742#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_LSB 0xF 742#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_LSB 0xF
743#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_MSB 0xF 743#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_MSB 0xF
744#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_RMASK 0x1 744#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_1_RMASK 0x1
745#define QIB_7322_HwErrMask_statusValidNoEopMask_1_LSB 0xE 745#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_LSB 0xE
746#define QIB_7322_HwErrMask_statusValidNoEopMask_1_MSB 0xE 746#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_MSB 0xE
747#define QIB_7322_HwErrMask_statusValidNoEopMask_1_RMASK 0x1 747#define QIB_7322_HwErrMask_IBCBusToSPCParityErrMask_1_RMASK 0x1
748#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_LSB 0xD 748#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_LSB 0xD
749#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_MSB 0xD 749#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_MSB 0xD
750#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_RMASK 0x1 750#define QIB_7322_HwErrMask_IBCBusFromSPCParityErrMask_0_RMASK 0x1
751#define QIB_7322_HwErrMask_statusValidNoEopMask_0_LSB 0xC 751#define QIB_7322_HwErrMask_statusValidNoEopMask_LSB 0xC
752#define QIB_7322_HwErrMask_statusValidNoEopMask_0_MSB 0xC 752#define QIB_7322_HwErrMask_statusValidNoEopMask_MSB 0xC
753#define QIB_7322_HwErrMask_statusValidNoEopMask_0_RMASK 0x1 753#define QIB_7322_HwErrMask_statusValidNoEopMask_RMASK 0x1
754#define QIB_7322_HwErrMask_LATriggeredMask_LSB 0xB 754#define QIB_7322_HwErrMask_LATriggeredMask_LSB 0xB
755#define QIB_7322_HwErrMask_LATriggeredMask_MSB 0xB 755#define QIB_7322_HwErrMask_LATriggeredMask_MSB 0xB
756#define QIB_7322_HwErrMask_LATriggeredMask_RMASK 0x1 756#define QIB_7322_HwErrMask_LATriggeredMask_RMASK 0x1
@@ -796,15 +796,15 @@
796#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_LSB 0xF 796#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_LSB 0xF
797#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_MSB 0xF 797#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_MSB 0xF
798#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_RMASK 0x1 798#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_1_RMASK 0x1
799#define QIB_7322_HwErrStatus_statusValidNoEop_1_LSB 0xE 799#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_LSB 0xE
800#define QIB_7322_HwErrStatus_statusValidNoEop_1_MSB 0xE 800#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_MSB 0xE
801#define QIB_7322_HwErrStatus_statusValidNoEop_1_RMASK 0x1 801#define QIB_7322_HwErrStatus_IBCBusToSPCParityErr_1_RMASK 0x1
802#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_LSB 0xD 802#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_LSB 0xD
803#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_MSB 0xD 803#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_MSB 0xD
804#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_RMASK 0x1 804#define QIB_7322_HwErrStatus_IBCBusFromSPCParityErr_0_RMASK 0x1
805#define QIB_7322_HwErrStatus_statusValidNoEop_0_LSB 0xC 805#define QIB_7322_HwErrStatus_statusValidNoEop_LSB 0xC
806#define QIB_7322_HwErrStatus_statusValidNoEop_0_MSB 0xC 806#define QIB_7322_HwErrStatus_statusValidNoEop_MSB 0xC
807#define QIB_7322_HwErrStatus_statusValidNoEop_0_RMASK 0x1 807#define QIB_7322_HwErrStatus_statusValidNoEop_RMASK 0x1
808#define QIB_7322_HwErrStatus_LATriggered_LSB 0xB 808#define QIB_7322_HwErrStatus_LATriggered_LSB 0xB
809#define QIB_7322_HwErrStatus_LATriggered_MSB 0xB 809#define QIB_7322_HwErrStatus_LATriggered_MSB 0xB
810#define QIB_7322_HwErrStatus_LATriggered_RMASK 0x1 810#define QIB_7322_HwErrStatus_LATriggered_RMASK 0x1
@@ -850,15 +850,15 @@
850#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_LSB 0xF 850#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_LSB 0xF
851#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_MSB 0xF 851#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_MSB 0xF
852#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_RMASK 0x1 852#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_1_RMASK 0x1
853#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_LSB 0xE 853#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_LSB 0xE
854#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_MSB 0xE 854#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_MSB 0xE
855#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_1_RMASK 0x1 855#define QIB_7322_HwErrClear_IBCBusToSPCParityErrClear_1_RMASK 0x1
856#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_LSB 0xD 856#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_LSB 0xD
857#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_MSB 0xD 857#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_MSB 0xD
858#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_RMASK 0x1 858#define QIB_7322_HwErrClear_IBCBusFromSPCParityErrClear_0_RMASK 0x1
859#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_LSB 0xC 859#define QIB_7322_HwErrClear_statusValidNoEopClear_LSB 0xC
860#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_MSB 0xC 860#define QIB_7322_HwErrClear_statusValidNoEopClear_MSB 0xC
861#define QIB_7322_HwErrClear_IBCBusToSPCparityErrClear_0_RMASK 0x1 861#define QIB_7322_HwErrClear_statusValidNoEopClear_RMASK 0x1
862#define QIB_7322_HwErrClear_LATriggeredClear_LSB 0xB 862#define QIB_7322_HwErrClear_LATriggeredClear_LSB 0xB
863#define QIB_7322_HwErrClear_LATriggeredClear_MSB 0xB 863#define QIB_7322_HwErrClear_LATriggeredClear_MSB 0xB
864#define QIB_7322_HwErrClear_LATriggeredClear_RMASK 0x1 864#define QIB_7322_HwErrClear_LATriggeredClear_RMASK 0x1
@@ -880,15 +880,15 @@
880#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_LSB 0xF 880#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_LSB 0xF
881#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_MSB 0xF 881#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_MSB 0xF
882#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_RMASK 0x1 882#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_1_RMASK 0x1
883#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_LSB 0xE 883#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_LSB 0xE
884#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_MSB 0xE 884#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_MSB 0xE
885#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_1_RMASK 0x1 885#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_1_RMASK 0x1
886#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_LSB 0xD 886#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_LSB 0xD
887#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_MSB 0xD 887#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_MSB 0xD
888#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_RMASK 0x1 888#define QIB_7322_HwDiagCtrl_ForceIBCBusFromSPCParityErr_0_RMASK 0x1
889#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_LSB 0xC 889#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_LSB 0xC
890#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_MSB 0xC 890#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_MSB 0xC
891#define QIB_7322_HwDiagCtrl_ForcestatusValidNoEop_0_RMASK 0x1 891#define QIB_7322_HwDiagCtrl_ForceIBCBusToSPCParityErr_0_RMASK 0x1
892 892
893#define QIB_7322_EXTStatus_OFFS 0xC0 893#define QIB_7322_EXTStatus_OFFS 0xC0
894#define QIB_7322_EXTStatus_DEF 0x000000000000X000 894#define QIB_7322_EXTStatus_DEF 0x000000000000X000
diff --git a/drivers/infiniband/hw/qib/qib_diag.c b/drivers/infiniband/hw/qib/qib_diag.c
index ca98dd523752..05dcf0d9a7d3 100644
--- a/drivers/infiniband/hw/qib/qib_diag.c
+++ b/drivers/infiniband/hw/qib/qib_diag.c
@@ -233,6 +233,7 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
233 u32 __iomem *krb32 = (u32 __iomem *)dd->kregbase; 233 u32 __iomem *krb32 = (u32 __iomem *)dd->kregbase;
234 u32 __iomem *map = NULL; 234 u32 __iomem *map = NULL;
235 u32 cnt = 0; 235 u32 cnt = 0;
236 u32 tot4k, offs4k;
236 237
237 /* First, simplest case, offset is within the first map. */ 238 /* First, simplest case, offset is within the first map. */
238 kreglen = (dd->kregend - dd->kregbase) * sizeof(u64); 239 kreglen = (dd->kregend - dd->kregbase) * sizeof(u64);
@@ -250,7 +251,8 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
250 if (dd->userbase) { 251 if (dd->userbase) {
251 /* If user regs mapped, they are after send, so set limit. */ 252 /* If user regs mapped, they are after send, so set limit. */
252 u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase; 253 u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase;
253 snd_lim = dd->uregbase; 254 if (!dd->piovl15base)
255 snd_lim = dd->uregbase;
254 krb32 = (u32 __iomem *)dd->userbase; 256 krb32 = (u32 __iomem *)dd->userbase;
255 if (offset >= dd->uregbase && offset < ulim) { 257 if (offset >= dd->uregbase && offset < ulim) {
256 map = krb32 + (offset - dd->uregbase) / sizeof(u32); 258 map = krb32 + (offset - dd->uregbase) / sizeof(u32);
@@ -277,14 +279,14 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
277 /* If 4k buffers exist, account for them by bumping 279 /* If 4k buffers exist, account for them by bumping
278 * appropriate limit. 280 * appropriate limit.
279 */ 281 */
282 tot4k = dd->piobcnt4k * dd->align4k;
283 offs4k = dd->piobufbase >> 32;
280 if (dd->piobcnt4k) { 284 if (dd->piobcnt4k) {
281 u32 tot4k = dd->piobcnt4k * dd->align4k;
282 u32 offs4k = dd->piobufbase >> 32;
283 if (snd_bottom > offs4k) 285 if (snd_bottom > offs4k)
284 snd_bottom = offs4k; 286 snd_bottom = offs4k;
285 else { 287 else {
286 /* 4k above 2k. Bump snd_lim, if needed*/ 288 /* 4k above 2k. Bump snd_lim, if needed*/
287 if (!dd->userbase) 289 if (!dd->userbase || dd->piovl15base)
288 snd_lim = offs4k + tot4k; 290 snd_lim = offs4k + tot4k;
289 } 291 }
290 } 292 }
@@ -298,6 +300,15 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
298 cnt = snd_lim - offset; 300 cnt = snd_lim - offset;
299 } 301 }
300 302
303 if (!map && offs4k && dd->piovl15base) {
304 snd_lim = offs4k + tot4k + 2 * dd->align4k;
305 if (offset >= (offs4k + tot4k) && offset < snd_lim) {
306 map = (u32 __iomem *)dd->piovl15base +
307 ((offset - (offs4k + tot4k)) / sizeof(u32));
308 cnt = snd_lim - offset;
309 }
310 }
311
301mapped: 312mapped:
302 if (cntp) 313 if (cntp)
303 *cntp = cnt; 314 *cntp = cnt;
diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c
index 1eadadc13da8..a5e29dbb9537 100644
--- a/drivers/infiniband/hw/qib/qib_iba6120.c
+++ b/drivers/infiniband/hw/qib/qib_iba6120.c
@@ -1355,8 +1355,7 @@ static int qib_6120_bringup_serdes(struct qib_pportdata *ppd)
1355 hwstat = qib_read_kreg64(dd, kr_hwerrstatus); 1355 hwstat = qib_read_kreg64(dd, kr_hwerrstatus);
1356 if (hwstat) { 1356 if (hwstat) {
1357 /* should just have PLL, clear all set, in an case */ 1357 /* should just have PLL, clear all set, in an case */
1358 if (hwstat & ~QLOGIC_IB_HWE_SERDESPLLFAILED) 1358 qib_write_kreg(dd, kr_hwerrclear, hwstat);
1359 qib_write_kreg(dd, kr_hwerrclear, hwstat);
1360 qib_write_kreg(dd, kr_errclear, ERR_MASK(HardwareErr)); 1359 qib_write_kreg(dd, kr_errclear, ERR_MASK(HardwareErr));
1361 } 1360 }
1362 1361
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c
index 503992d9c5ce..5eedf83e2c3b 100644
--- a/drivers/infiniband/hw/qib/qib_iba7322.c
+++ b/drivers/infiniband/hw/qib/qib_iba7322.c
@@ -543,7 +543,7 @@ struct vendor_txdds_ent {
543static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *); 543static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *);
544 544
545#define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ 545#define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */
546#define TXDDS_EXTRA_SZ 11 /* number of extra tx settings entries */ 546#define TXDDS_EXTRA_SZ 13 /* number of extra tx settings entries */
547#define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ 547#define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */
548 548
549#define H1_FORCE_VAL 8 549#define H1_FORCE_VAL 8
@@ -1100,9 +1100,9 @@ static const struct qib_hwerror_msgs qib_7322_hwerror_msgs[] = {
1100 HWE_AUTO_P(SDmaMemReadErr, 1), 1100 HWE_AUTO_P(SDmaMemReadErr, 1),
1101 HWE_AUTO_P(SDmaMemReadErr, 0), 1101 HWE_AUTO_P(SDmaMemReadErr, 0),
1102 HWE_AUTO_P(IBCBusFromSPCParityErr, 1), 1102 HWE_AUTO_P(IBCBusFromSPCParityErr, 1),
1103 HWE_AUTO_P(IBCBusToSPCParityErr, 1),
1103 HWE_AUTO_P(IBCBusFromSPCParityErr, 0), 1104 HWE_AUTO_P(IBCBusFromSPCParityErr, 0),
1104 HWE_AUTO_P(statusValidNoEop, 1), 1105 HWE_AUTO(statusValidNoEop),
1105 HWE_AUTO_P(statusValidNoEop, 0),
1106 HWE_AUTO(LATriggered), 1106 HWE_AUTO(LATriggered),
1107 { .mask = 0 } 1107 { .mask = 0 }
1108}; 1108};
@@ -4763,6 +4763,8 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *ppd)
4763 SYM_MASK(IBPCSConfig_0, tx_rx_reset); 4763 SYM_MASK(IBPCSConfig_0, tx_rx_reset);
4764 4764
4765 val = qib_read_kreg_port(ppd, krp_ib_pcsconfig); 4765 val = qib_read_kreg_port(ppd, krp_ib_pcsconfig);
4766 qib_write_kreg(dd, kr_hwerrmask,
4767 dd->cspec->hwerrmask & ~HWE_MASK(statusValidNoEop));
4766 qib_write_kreg_port(ppd, krp_ibcctrl_a, 4768 qib_write_kreg_port(ppd, krp_ibcctrl_a,
4767 ppd->cpspec->ibcctrl_a & 4769 ppd->cpspec->ibcctrl_a &
4768 ~SYM_MASK(IBCCtrlA_0, IBLinkEn)); 4770 ~SYM_MASK(IBCCtrlA_0, IBLinkEn));
@@ -4772,6 +4774,9 @@ static void qib_7322_mini_pcs_reset(struct qib_pportdata *ppd)
4772 qib_write_kreg_port(ppd, krp_ib_pcsconfig, val & ~reset_bits); 4774 qib_write_kreg_port(ppd, krp_ib_pcsconfig, val & ~reset_bits);
4773 qib_write_kreg_port(ppd, krp_ibcctrl_a, ppd->cpspec->ibcctrl_a); 4775 qib_write_kreg_port(ppd, krp_ibcctrl_a, ppd->cpspec->ibcctrl_a);
4774 qib_write_kreg(dd, kr_scratch, 0ULL); 4776 qib_write_kreg(dd, kr_scratch, 0ULL);
4777 qib_write_kreg(dd, kr_hwerrclear,
4778 SYM_MASK(HwErrClear, statusValidNoEopClear));
4779 qib_write_kreg(dd, kr_hwerrmask, dd->cspec->hwerrmask);
4775} 4780}
4776 4781
4777/* 4782/*
@@ -5624,6 +5629,8 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change)
5624 if (ppd->port != port || !ppd->link_speed_supported) 5629 if (ppd->port != port || !ppd->link_speed_supported)
5625 continue; 5630 continue;
5626 ppd->cpspec->no_eep = val; 5631 ppd->cpspec->no_eep = val;
5632 if (seth1)
5633 ppd->cpspec->h1_val = h1;
5627 /* now change the IBC and serdes, overriding generic */ 5634 /* now change the IBC and serdes, overriding generic */
5628 init_txdds_table(ppd, 1); 5635 init_txdds_table(ppd, 1);
5629 any++; 5636 any++;
@@ -6064,9 +6071,9 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6064 * the "cable info" setup here. Can be overridden 6071 * the "cable info" setup here. Can be overridden
6065 * in adapter-specific routines. 6072 * in adapter-specific routines.
6066 */ 6073 */
6067 if (!(ppd->dd->flags & QIB_HAS_QSFP)) { 6074 if (!(dd->flags & QIB_HAS_QSFP)) {
6068 if (!IS_QMH(ppd->dd) && !IS_QME(ppd->dd)) 6075 if (!IS_QMH(dd) && !IS_QME(dd))
6069 qib_devinfo(ppd->dd->pcidev, "IB%u:%u: " 6076 qib_devinfo(dd->pcidev, "IB%u:%u: "
6070 "Unknown mezzanine card type\n", 6077 "Unknown mezzanine card type\n",
6071 dd->unit, ppd->port); 6078 dd->unit, ppd->port);
6072 cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME; 6079 cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME;
@@ -6119,9 +6126,25 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6119 qib_set_ctxtcnt(dd); 6126 qib_set_ctxtcnt(dd);
6120 6127
6121 if (qib_wc_pat) { 6128 if (qib_wc_pat) {
6122 ret = init_chip_wc_pat(dd, NUM_VL15_BUFS * dd->align4k); 6129 resource_size_t vl15off;
6130 /*
6131 * We do not set WC on the VL15 buffers to avoid
6132 * a rare problem with unaligned writes from
6133 * interrupt-flushed store buffers, so we need
6134 * to map those separately here. We can't solve
6135 * this for the rarely used mtrr case.
6136 */
6137 ret = init_chip_wc_pat(dd, 0);
6123 if (ret) 6138 if (ret)
6124 goto bail; 6139 goto bail;
6140
6141 /* vl15 buffers start just after the 4k buffers */
6142 vl15off = dd->physaddr + (dd->piobufbase >> 32) +
6143 dd->piobcnt4k * dd->align4k;
6144 dd->piovl15base = ioremap_nocache(vl15off,
6145 NUM_VL15_BUFS * dd->align4k);
6146 if (!dd->piovl15base)
6147 goto bail;
6125 } 6148 }
6126 qib_7322_set_baseaddrs(dd); /* set chip access pointers now */ 6149 qib_7322_set_baseaddrs(dd); /* set chip access pointers now */
6127 6150
@@ -6932,6 +6955,8 @@ static const struct txdds_ent txdds_extra_sdr[TXDDS_EXTRA_SZ] = {
6932 { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 6955 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6933 { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 6956 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6934 { 0, 0, 0, 11 }, /* QME7342 backplane settings */ 6957 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6958 { 0, 0, 0, 3 }, /* QMH7342 backplane settings */
6959 { 0, 0, 0, 4 }, /* QMH7342 backplane settings */
6935}; 6960};
6936 6961
6937static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = { 6962static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = {
@@ -6947,6 +6972,8 @@ static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = {
6947 { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 6972 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6948 { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 6973 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6949 { 0, 0, 0, 13 }, /* QME7342 backplane settings */ 6974 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6975 { 0, 0, 0, 9 }, /* QMH7342 backplane settings */
6976 { 0, 0, 0, 10 }, /* QMH7342 backplane settings */
6950}; 6977};
6951 6978
6952static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = { 6979static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = {
@@ -6962,6 +6989,8 @@ static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = {
6962 { 0, 1, 12, 6 }, /* QME7342 backplane setting */ 6989 { 0, 1, 12, 6 }, /* QME7342 backplane setting */
6963 { 0, 1, 12, 7 }, /* QME7342 backplane setting */ 6990 { 0, 1, 12, 7 }, /* QME7342 backplane setting */
6964 { 0, 1, 12, 8 }, /* QME7342 backplane setting */ 6991 { 0, 1, 12, 8 }, /* QME7342 backplane setting */
6992 { 0, 1, 0, 10 }, /* QMH7342 backplane settings */
6993 { 0, 1, 0, 12 }, /* QMH7342 backplane settings */
6965}; 6994};
6966 6995
6967static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, 6996static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds,
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c
index 9b40f345ac3f..a873dd596e81 100644
--- a/drivers/infiniband/hw/qib/qib_init.c
+++ b/drivers/infiniband/hw/qib/qib_init.c
@@ -1059,7 +1059,7 @@ static int __init qlogic_ib_init(void)
1059 goto bail_dev; 1059 goto bail_dev;
1060 } 1060 }
1061 1061
1062 qib_cq_wq = create_workqueue("qib_cq"); 1062 qib_cq_wq = create_singlethread_workqueue("qib_cq");
1063 if (!qib_cq_wq) { 1063 if (!qib_cq_wq) {
1064 ret = -ENOMEM; 1064 ret = -ENOMEM;
1065 goto bail_wq; 1065 goto bail_wq;
@@ -1289,8 +1289,18 @@ static int __devinit qib_init_one(struct pci_dev *pdev,
1289 1289
1290 if (qib_mini_init || initfail || ret) { 1290 if (qib_mini_init || initfail || ret) {
1291 qib_stop_timers(dd); 1291 qib_stop_timers(dd);
1292 flush_scheduled_work();
1292 for (pidx = 0; pidx < dd->num_pports; ++pidx) 1293 for (pidx = 0; pidx < dd->num_pports; ++pidx)
1293 dd->f_quiet_serdes(dd->pport + pidx); 1294 dd->f_quiet_serdes(dd->pport + pidx);
1295 if (qib_mini_init)
1296 goto bail;
1297 if (!j) {
1298 (void) qibfs_remove(dd);
1299 qib_device_remove(dd);
1300 }
1301 if (!ret)
1302 qib_unregister_ib_device(dd);
1303 qib_postinit_cleanup(dd);
1294 if (initfail) 1304 if (initfail)
1295 ret = initfail; 1305 ret = initfail;
1296 goto bail; 1306 goto bail;
@@ -1472,6 +1482,9 @@ int qib_setup_eagerbufs(struct qib_ctxtdata *rcd)
1472 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk]; 1482 dma_addr_t pa = rcd->rcvegrbuf_phys[chunk];
1473 unsigned i; 1483 unsigned i;
1474 1484
1485 /* clear for security and sanity on each use */
1486 memset(rcd->rcvegrbuf[chunk], 0, size);
1487
1475 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) { 1488 for (i = 0; e < egrcnt && i < egrperchunk; e++, i++) {
1476 dd->f_put_tid(dd, e + egroff + 1489 dd->f_put_tid(dd, e + egroff +
1477 (u64 __iomem *) 1490 (u64 __iomem *)
@@ -1499,6 +1512,12 @@ bail:
1499 return -ENOMEM; 1512 return -ENOMEM;
1500} 1513}
1501 1514
1515/*
1516 * Note: Changes to this routine should be mirrored
1517 * for the diagnostics routine qib_remap_ioaddr32().
1518 * There is also related code for VL15 buffers in qib_init_7322_variables().
1519 * The teardown code that unmaps is in qib_pcie_ddcleanup()
1520 */
1502int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen) 1521int init_chip_wc_pat(struct qib_devdata *dd, u32 vl15buflen)
1503{ 1522{
1504 u64 __iomem *qib_kregbase = NULL; 1523 u64 __iomem *qib_kregbase = NULL;
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c
index c926bf4541df..7fa6e5592630 100644
--- a/drivers/infiniband/hw/qib/qib_pcie.c
+++ b/drivers/infiniband/hw/qib/qib_pcie.c
@@ -179,6 +179,8 @@ void qib_pcie_ddcleanup(struct qib_devdata *dd)
179 iounmap(dd->piobase); 179 iounmap(dd->piobase);
180 if (dd->userbase) 180 if (dd->userbase)
181 iounmap(dd->userbase); 181 iounmap(dd->userbase);
182 if (dd->piovl15base)
183 iounmap(dd->piovl15base);
182 184
183 pci_disable_device(dd->pcidev); 185 pci_disable_device(dd->pcidev);
184 pci_release_regions(dd->pcidev); 186 pci_release_regions(dd->pcidev);
diff --git a/drivers/infiniband/hw/qib/qib_sd7220.c b/drivers/infiniband/hw/qib/qib_sd7220.c
index 0aeed0e74cb6..e9f9f8bc3204 100644
--- a/drivers/infiniband/hw/qib/qib_sd7220.c
+++ b/drivers/infiniband/hw/qib/qib_sd7220.c
@@ -1,5 +1,6 @@
1/* 1/*
2 * Copyright (c) 2006, 2007, 2008, 2009 QLogic Corporation. All rights reserved. 2 * Copyright (c) 2006, 2007, 2008, 2009, 2010 QLogic Corporation.
3 * All rights reserved.
3 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved. 4 * Copyright (c) 2003, 2004, 2005, 2006 PathScale, Inc. All rights reserved.
4 * 5 *
5 * This software is available to you under a choice of one of two 6 * This software is available to you under a choice of one of two
@@ -37,10 +38,14 @@
37 38
38#include <linux/pci.h> 39#include <linux/pci.h>
39#include <linux/delay.h> 40#include <linux/delay.h>
41#include <linux/firmware.h>
40 42
41#include "qib.h" 43#include "qib.h"
42#include "qib_7220.h" 44#include "qib_7220.h"
43 45
46#define SD7220_FW_NAME "qlogic/sd7220.fw"
47MODULE_FIRMWARE(SD7220_FW_NAME);
48
44/* 49/*
45 * Same as in qib_iba7220.c, but just the registers needed here. 50 * Same as in qib_iba7220.c, but just the registers needed here.
46 * Could move whole set to qib_7220.h, but decided better to keep 51 * Could move whole set to qib_7220.h, but decided better to keep
@@ -102,6 +107,10 @@ static int qib_internal_presets(struct qib_devdata *dd);
102/* Tweak the register (CMUCTRL5) that contains the TRIMSELF controls */ 107/* Tweak the register (CMUCTRL5) that contains the TRIMSELF controls */
103static int qib_sd_trimself(struct qib_devdata *dd, int val); 108static int qib_sd_trimself(struct qib_devdata *dd, int val);
104static int epb_access(struct qib_devdata *dd, int sdnum, int claim); 109static int epb_access(struct qib_devdata *dd, int sdnum, int claim);
110static int qib_sd7220_ib_load(struct qib_devdata *dd,
111 const struct firmware *fw);
112static int qib_sd7220_ib_vfy(struct qib_devdata *dd,
113 const struct firmware *fw);
105 114
106/* 115/*
107 * Below keeps track of whether the "once per power-on" initialization has 116 * Below keeps track of whether the "once per power-on" initialization has
@@ -110,10 +119,13 @@ static int epb_access(struct qib_devdata *dd, int sdnum, int claim);
110 * state of the reset "pin", is no longer valid. Instead, we check for the 119 * state of the reset "pin", is no longer valid. Instead, we check for the
111 * actual uC code having been loaded. 120 * actual uC code having been loaded.
112 */ 121 */
113static int qib_ibsd_ucode_loaded(struct qib_pportdata *ppd) 122static int qib_ibsd_ucode_loaded(struct qib_pportdata *ppd,
123 const struct firmware *fw)
114{ 124{
115 struct qib_devdata *dd = ppd->dd; 125 struct qib_devdata *dd = ppd->dd;
116 if (!dd->cspec->serdes_first_init_done && (qib_sd7220_ib_vfy(dd) > 0)) 126
127 if (!dd->cspec->serdes_first_init_done &&
128 qib_sd7220_ib_vfy(dd, fw) > 0)
117 dd->cspec->serdes_first_init_done = 1; 129 dd->cspec->serdes_first_init_done = 1;
118 return dd->cspec->serdes_first_init_done; 130 return dd->cspec->serdes_first_init_done;
119} 131}
@@ -377,6 +389,7 @@ static void qib_sd_trimdone_monitor(struct qib_devdata *dd,
377 */ 389 */
378int qib_sd7220_init(struct qib_devdata *dd) 390int qib_sd7220_init(struct qib_devdata *dd)
379{ 391{
392 const struct firmware *fw;
380 int ret = 1; /* default to failure */ 393 int ret = 1; /* default to failure */
381 int first_reset, was_reset; 394 int first_reset, was_reset;
382 395
@@ -387,8 +400,15 @@ int qib_sd7220_init(struct qib_devdata *dd)
387 qib_ibsd_reset(dd, 1); 400 qib_ibsd_reset(dd, 1);
388 qib_sd_trimdone_monitor(dd, "Driver-reload"); 401 qib_sd_trimdone_monitor(dd, "Driver-reload");
389 } 402 }
403
404 ret = request_firmware(&fw, SD7220_FW_NAME, &dd->pcidev->dev);
405 if (ret) {
406 qib_dev_err(dd, "Failed to load IB SERDES image\n");
407 goto done;
408 }
409
390 /* Substitute our deduced value for was_reset */ 410 /* Substitute our deduced value for was_reset */
391 ret = qib_ibsd_ucode_loaded(dd->pport); 411 ret = qib_ibsd_ucode_loaded(dd->pport, fw);
392 if (ret < 0) 412 if (ret < 0)
393 goto bail; 413 goto bail;
394 414
@@ -437,13 +457,13 @@ int qib_sd7220_init(struct qib_devdata *dd)
437 int vfy; 457 int vfy;
438 int trim_done; 458 int trim_done;
439 459
440 ret = qib_sd7220_ib_load(dd); 460 ret = qib_sd7220_ib_load(dd, fw);
441 if (ret < 0) { 461 if (ret < 0) {
442 qib_dev_err(dd, "Failed to load IB SERDES image\n"); 462 qib_dev_err(dd, "Failed to load IB SERDES image\n");
443 goto bail; 463 goto bail;
444 } else { 464 } else {
445 /* Loaded image, try to verify */ 465 /* Loaded image, try to verify */
446 vfy = qib_sd7220_ib_vfy(dd); 466 vfy = qib_sd7220_ib_vfy(dd, fw);
447 if (vfy != ret) { 467 if (vfy != ret) {
448 qib_dev_err(dd, "SERDES PRAM VFY failed\n"); 468 qib_dev_err(dd, "SERDES PRAM VFY failed\n");
449 goto bail; 469 goto bail;
@@ -506,6 +526,8 @@ bail:
506done: 526done:
507 /* start relock timer regardless, but start at 1 second */ 527 /* start relock timer regardless, but start at 1 second */
508 set_7220_relock_poll(dd, -1); 528 set_7220_relock_poll(dd, -1);
529
530 release_firmware(fw);
509 return ret; 531 return ret;
510} 532}
511 533
@@ -829,8 +851,8 @@ static int qib_sd7220_ram_xfer(struct qib_devdata *dd, int sdnum, u32 loc,
829 851
830#define PROG_CHUNK 64 852#define PROG_CHUNK 64
831 853
832int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum, 854static int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum,
833 u8 *img, int len, int offset) 855 const u8 *img, int len, int offset)
834{ 856{
835 int cnt, sofar, req; 857 int cnt, sofar, req;
836 858
@@ -840,7 +862,7 @@ int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum,
840 if (req > PROG_CHUNK) 862 if (req > PROG_CHUNK)
841 req = PROG_CHUNK; 863 req = PROG_CHUNK;
842 cnt = qib_sd7220_ram_xfer(dd, sdnum, offset + sofar, 864 cnt = qib_sd7220_ram_xfer(dd, sdnum, offset + sofar,
843 img + sofar, req, 0); 865 (u8 *)img + sofar, req, 0);
844 if (cnt < req) { 866 if (cnt < req) {
845 sofar = -1; 867 sofar = -1;
846 break; 868 break;
@@ -853,8 +875,8 @@ int qib_sd7220_prog_ld(struct qib_devdata *dd, int sdnum,
853#define VFY_CHUNK 64 875#define VFY_CHUNK 64
854#define SD_PRAM_ERROR_LIMIT 42 876#define SD_PRAM_ERROR_LIMIT 42
855 877
856int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum, 878static int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum,
857 const u8 *img, int len, int offset) 879 const u8 *img, int len, int offset)
858{ 880{
859 int cnt, sofar, req, idx, errors; 881 int cnt, sofar, req, idx, errors;
860 unsigned char readback[VFY_CHUNK]; 882 unsigned char readback[VFY_CHUNK];
@@ -881,6 +903,18 @@ int qib_sd7220_prog_vfy(struct qib_devdata *dd, int sdnum,
881 return errors ? -errors : sofar; 903 return errors ? -errors : sofar;
882} 904}
883 905
906static int
907qib_sd7220_ib_load(struct qib_devdata *dd, const struct firmware *fw)
908{
909 return qib_sd7220_prog_ld(dd, IB_7220_SERDES, fw->data, fw->size, 0);
910}
911
912static int
913qib_sd7220_ib_vfy(struct qib_devdata *dd, const struct firmware *fw)
914{
915 return qib_sd7220_prog_vfy(dd, IB_7220_SERDES, fw->data, fw->size, 0);
916}
917
884/* 918/*
885 * IRQ not set up at this point in init, so we poll. 919 * IRQ not set up at this point in init, so we poll.
886 */ 920 */
diff --git a/drivers/infiniband/hw/qib/qib_sd7220_img.c b/drivers/infiniband/hw/qib/qib_sd7220_img.c
deleted file mode 100644
index a1118fbd2370..000000000000
--- a/drivers/infiniband/hw/qib/qib_sd7220_img.c
+++ /dev/null
@@ -1,1081 +0,0 @@
1/*
2 * Copyright (c) 2007, 2008 QLogic Corporation. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:
9 *
10 * Redistribution and use in source and binary forms, with or
11 * without modification, are permitted provided that the following
12 * conditions are met:
13 *
14 * - Redistributions of source code must retain the above
15 * copyright notice, this list of conditions and the following
16 * disclaimer.
17 *
18 * - Redistributions in binary form must reproduce the above
19 * copyright notice, this list of conditions and the following
20 * disclaimer in the documentation and/or other materials
21 * provided with the distribution.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
24 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
25 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
26 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
27 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
28 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
29 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
30 * SOFTWARE.
31 */
32
33/*
34 * This file contains the memory image from the vendor, to be copied into
35 * the IB SERDES of the IBA7220 during initialization.
36 * The file also includes the two functions which use this image.
37 */
38#include <linux/pci.h>
39#include <linux/delay.h>
40
41#include "qib.h"
42#include "qib_7220.h"
43
44static unsigned char qib_sd7220_ib_img[] = {
45/*0000*/0x02, 0x0A, 0x29, 0x02, 0x0A, 0x87, 0xE5, 0xE6,
46 0x30, 0xE6, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F,
47/*0010*/0x00, 0xE5, 0xE2, 0x30, 0xE4, 0x04, 0x7E, 0x01,
48 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x5F, 0x60, 0x08,
49/*0020*/0x53, 0xF9, 0xF7, 0xE4, 0xF5, 0xFE, 0x80, 0x08,
50 0x7F, 0x0A, 0x12, 0x17, 0x31, 0x12, 0x0E, 0xA2,
51/*0030*/0x75, 0xFC, 0x08, 0xE4, 0xF5, 0xFD, 0xE5, 0xE7,
52 0x20, 0xE7, 0x03, 0x43, 0xF9, 0x08, 0x22, 0x00,
53/*0040*/0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x75,
54 0x51, 0x01, 0xE4, 0xF5, 0x52, 0xF5, 0x53, 0xF5,
55/*0050*/0x52, 0xF5, 0x7E, 0x7F, 0x04, 0x02, 0x04, 0x38,
56 0xC2, 0x36, 0x05, 0x52, 0xE5, 0x52, 0xD3, 0x94,
57/*0060*/0x0C, 0x40, 0x05, 0x75, 0x52, 0x01, 0xD2, 0x36,
58 0x90, 0x07, 0x0C, 0x74, 0x07, 0xF0, 0xA3, 0x74,
59/*0070*/0xFF, 0xF0, 0xE4, 0xF5, 0x0C, 0xA3, 0xF0, 0x90,
60 0x07, 0x14, 0xF0, 0xA3, 0xF0, 0x75, 0x0B, 0x20,
61/*0080*/0xF5, 0x09, 0xE4, 0xF5, 0x08, 0xE5, 0x08, 0xD3,
62 0x94, 0x30, 0x40, 0x03, 0x02, 0x04, 0x04, 0x12,
63/*0090*/0x00, 0x06, 0x15, 0x0B, 0xE5, 0x08, 0x70, 0x04,
64 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x09,
65/*00A0*/0x70, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00,
66 0xEE, 0x5F, 0x60, 0x05, 0x12, 0x18, 0x71, 0xD2,
67/*00B0*/0x35, 0x53, 0xE1, 0xF7, 0xE5, 0x08, 0x45, 0x09,
68 0xFF, 0xE5, 0x0B, 0x25, 0xE0, 0x25, 0xE0, 0x24,
69/*00C0*/0x83, 0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83,
70 0xEF, 0xF0, 0x85, 0xE2, 0x20, 0xE5, 0x52, 0xD3,
71/*00D0*/0x94, 0x01, 0x40, 0x0D, 0x12, 0x19, 0xF3, 0xE0,
72 0x54, 0xA0, 0x64, 0x40, 0x70, 0x03, 0x02, 0x03,
73/*00E0*/0xFB, 0x53, 0xF9, 0xF8, 0x90, 0x94, 0x70, 0xE4,
74 0xF0, 0xE0, 0xF5, 0x10, 0xAF, 0x09, 0x12, 0x1E,
75/*00F0*/0xB3, 0xAF, 0x08, 0xEF, 0x44, 0x08, 0xF5, 0x82,
76 0x75, 0x83, 0x80, 0xE0, 0xF5, 0x29, 0xEF, 0x44,
77/*0100*/0x07, 0x12, 0x1A, 0x3C, 0xF5, 0x22, 0x54, 0x40,
78 0xD3, 0x94, 0x00, 0x40, 0x1E, 0xE5, 0x29, 0x54,
79/*0110*/0xF0, 0x70, 0x21, 0x12, 0x19, 0xF3, 0xE0, 0x44,
80 0x80, 0xF0, 0xE5, 0x22, 0x54, 0x30, 0x65, 0x08,
81/*0120*/0x70, 0x09, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xBF,
82 0xF0, 0x80, 0x09, 0x12, 0x19, 0xF3, 0x74, 0x40,
83/*0130*/0xF0, 0x02, 0x03, 0xFB, 0x12, 0x1A, 0x12, 0x75,
84 0x83, 0xAE, 0x74, 0xFF, 0xF0, 0xAF, 0x08, 0x7E,
85/*0140*/0x00, 0xEF, 0x44, 0x07, 0xF5, 0x82, 0xE0, 0xFD,
86 0xE5, 0x0B, 0x25, 0xE0, 0x25, 0xE0, 0x24, 0x81,
87/*0150*/0xF5, 0x82, 0xE4, 0x34, 0x07, 0xF5, 0x83, 0xED,
88 0xF0, 0x90, 0x07, 0x0E, 0xE0, 0x04, 0xF0, 0xEF,
89/*0160*/0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0x98, 0xE0,
90 0xF5, 0x28, 0x12, 0x1A, 0x23, 0x40, 0x0C, 0x12,
91/*0170*/0x19, 0xF3, 0xE0, 0x44, 0x01, 0x12, 0x1A, 0x32,
92 0x02, 0x03, 0xF6, 0xAF, 0x08, 0x7E, 0x00, 0x74,
93/*0180*/0x80, 0xCD, 0xEF, 0xCD, 0x8D, 0x82, 0xF5, 0x83,
94 0xE0, 0x30, 0xE0, 0x0A, 0x12, 0x19, 0xF3, 0xE0,
95/*0190*/0x44, 0x20, 0xF0, 0x02, 0x03, 0xFB, 0x12, 0x19,
96 0xF3, 0xE0, 0x54, 0xDF, 0xF0, 0xEE, 0x44, 0xAE,
97/*01A0*/0x12, 0x1A, 0x43, 0x30, 0xE4, 0x03, 0x02, 0x03,
98 0xFB, 0x74, 0x9E, 0x12, 0x1A, 0x05, 0x20, 0xE0,
99/*01B0*/0x03, 0x02, 0x03, 0xFB, 0x8F, 0x82, 0x8E, 0x83,
100 0xE0, 0x20, 0xE0, 0x03, 0x02, 0x03, 0xFB, 0x12,
101/*01C0*/0x19, 0xF3, 0xE0, 0x44, 0x10, 0xF0, 0xE5, 0xE3,
102 0x20, 0xE7, 0x08, 0xE5, 0x08, 0x12, 0x1A, 0x3A,
103/*01D0*/0x44, 0x04, 0xF0, 0xAF, 0x08, 0x7E, 0x00, 0xEF,
104 0x12, 0x1A, 0x3A, 0x20, 0xE2, 0x34, 0x12, 0x19,
105/*01E0*/0xF3, 0xE0, 0x44, 0x08, 0xF0, 0xE5, 0xE4, 0x30,
106 0xE6, 0x04, 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00,
107/*01F0*/0xE5, 0x7E, 0xC3, 0x94, 0x04, 0x50, 0x04, 0x7C,
108 0x01, 0x80, 0x02, 0x7C, 0x00, 0xEC, 0x4D, 0x60,
109/*0200*/0x05, 0xC2, 0x35, 0x02, 0x03, 0xFB, 0xEE, 0x44,
110 0xD2, 0x12, 0x1A, 0x43, 0x44, 0x40, 0xF0, 0x02,
111/*0210*/0x03, 0xFB, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xF7,
112 0xF0, 0x12, 0x1A, 0x12, 0x75, 0x83, 0xD2, 0xE0,
113/*0220*/0x54, 0xBF, 0xF0, 0x90, 0x07, 0x14, 0xE0, 0x04,
114 0xF0, 0xE5, 0x7E, 0x70, 0x03, 0x75, 0x7E, 0x01,
115/*0230*/0xAF, 0x08, 0x7E, 0x00, 0x12, 0x1A, 0x23, 0x40,
116 0x12, 0x12, 0x19, 0xF3, 0xE0, 0x44, 0x01, 0x12,
117/*0240*/0x19, 0xF2, 0xE0, 0x54, 0x02, 0x12, 0x1A, 0x32,
118 0x02, 0x03, 0xFB, 0x12, 0x19, 0xF3, 0xE0, 0x44,
119/*0250*/0x02, 0x12, 0x19, 0xF2, 0xE0, 0x54, 0xFE, 0xF0,
120 0xC2, 0x35, 0xEE, 0x44, 0x8A, 0x8F, 0x82, 0xF5,
121/*0260*/0x83, 0xE0, 0xF5, 0x17, 0x54, 0x8F, 0x44, 0x40,
122 0xF0, 0x74, 0x90, 0xFC, 0xE5, 0x08, 0x44, 0x07,
123/*0270*/0xFD, 0xF5, 0x82, 0x8C, 0x83, 0xE0, 0x54, 0x3F,
124 0x90, 0x07, 0x02, 0xF0, 0xE0, 0x54, 0xC0, 0x8D,
125/*0280*/0x82, 0x8C, 0x83, 0xF0, 0x74, 0x92, 0x12, 0x1A,
126 0x05, 0x90, 0x07, 0x03, 0x12, 0x1A, 0x19, 0x74,
127/*0290*/0x82, 0x12, 0x1A, 0x05, 0x90, 0x07, 0x04, 0x12,
128 0x1A, 0x19, 0x74, 0xB4, 0x12, 0x1A, 0x05, 0x90,
129/*02A0*/0x07, 0x05, 0x12, 0x1A, 0x19, 0x74, 0x94, 0xFE,
130 0xE5, 0x08, 0x44, 0x06, 0x12, 0x1A, 0x0A, 0xF5,
131/*02B0*/0x10, 0x30, 0xE0, 0x04, 0xD2, 0x37, 0x80, 0x02,
132 0xC2, 0x37, 0xE5, 0x10, 0x54, 0x7F, 0x8F, 0x82,
133/*02C0*/0x8E, 0x83, 0xF0, 0x30, 0x44, 0x30, 0x12, 0x1A,
134 0x03, 0x54, 0x80, 0xD3, 0x94, 0x00, 0x40, 0x04,
135/*02D0*/0xD2, 0x39, 0x80, 0x02, 0xC2, 0x39, 0x8F, 0x82,
136 0x8E, 0x83, 0xE0, 0x44, 0x80, 0xF0, 0x12, 0x1A,
137/*02E0*/0x03, 0x54, 0x40, 0xD3, 0x94, 0x00, 0x40, 0x04,
138 0xD2, 0x3A, 0x80, 0x02, 0xC2, 0x3A, 0x8F, 0x82,
139/*02F0*/0x8E, 0x83, 0xE0, 0x44, 0x40, 0xF0, 0x74, 0x92,
140 0xFE, 0xE5, 0x08, 0x44, 0x06, 0x12, 0x1A, 0x0A,
141/*0300*/0x30, 0xE7, 0x04, 0xD2, 0x38, 0x80, 0x02, 0xC2,
142 0x38, 0x8F, 0x82, 0x8E, 0x83, 0xE0, 0x54, 0x7F,
143/*0310*/0xF0, 0x12, 0x1E, 0x46, 0xE4, 0xF5, 0x0A, 0x20,
144 0x03, 0x02, 0x80, 0x03, 0x30, 0x43, 0x03, 0x12,
145/*0320*/0x19, 0x95, 0x20, 0x02, 0x02, 0x80, 0x03, 0x30,
146 0x42, 0x03, 0x12, 0x0C, 0x8F, 0x30, 0x30, 0x06,
147/*0330*/0x12, 0x19, 0x95, 0x12, 0x0C, 0x8F, 0x12, 0x0D,
148 0x47, 0x12, 0x19, 0xF3, 0xE0, 0x54, 0xFB, 0xF0,
149/*0340*/0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40, 0x46, 0x43,
150 0xE1, 0x08, 0x12, 0x19, 0xF3, 0xE0, 0x44, 0x04,
151/*0350*/0xF0, 0xE5, 0xE4, 0x20, 0xE7, 0x2A, 0x12, 0x1A,
152 0x12, 0x75, 0x83, 0xD2, 0xE0, 0x54, 0x08, 0xD3,
153/*0360*/0x94, 0x00, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
154 0x7F, 0x00, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40,
155/*0370*/0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF,
156 0x5E, 0x60, 0x05, 0x12, 0x1D, 0xD7, 0x80, 0x17,
157/*0380*/0x12, 0x1A, 0x12, 0x75, 0x83, 0xD2, 0xE0, 0x44,
158 0x08, 0xF0, 0x02, 0x03, 0xFB, 0x12, 0x1A, 0x12,
159/*0390*/0x75, 0x83, 0xD2, 0xE0, 0x54, 0xF7, 0xF0, 0x12,
160 0x1E, 0x46, 0x7F, 0x08, 0x12, 0x17, 0x31, 0x74,
161/*03A0*/0x8E, 0xFE, 0x12, 0x1A, 0x12, 0x8E, 0x83, 0xE0,
162 0xF5, 0x10, 0x54, 0xFE, 0xF0, 0xE5, 0x10, 0x44,
163/*03B0*/0x01, 0xFF, 0xE5, 0x08, 0xFD, 0xED, 0x44, 0x07,
164 0xF5, 0x82, 0xEF, 0xF0, 0xE5, 0x10, 0x54, 0xFE,
165/*03C0*/0xFF, 0xED, 0x44, 0x07, 0xF5, 0x82, 0xEF, 0x12,
166 0x1A, 0x11, 0x75, 0x83, 0x86, 0xE0, 0x44, 0x10,
167/*03D0*/0x12, 0x1A, 0x11, 0xE0, 0x44, 0x10, 0xF0, 0x12,
168 0x19, 0xF3, 0xE0, 0x54, 0xFD, 0x44, 0x01, 0xFF,
169/*03E0*/0x12, 0x19, 0xF3, 0xEF, 0x12, 0x1A, 0x32, 0x30,
170 0x32, 0x0C, 0xE5, 0x08, 0x44, 0x08, 0xF5, 0x82,
171/*03F0*/0x75, 0x83, 0x82, 0x74, 0x05, 0xF0, 0xAF, 0x0B,
172 0x12, 0x18, 0xD7, 0x74, 0x10, 0x25, 0x08, 0xF5,
173/*0400*/0x08, 0x02, 0x00, 0x85, 0x05, 0x09, 0xE5, 0x09,
174 0xD3, 0x94, 0x07, 0x50, 0x03, 0x02, 0x00, 0x82,
175/*0410*/0xE5, 0x7E, 0xD3, 0x94, 0x00, 0x40, 0x04, 0x7F,
176 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x7E, 0xC3,
177/*0420*/0x94, 0xFA, 0x50, 0x04, 0x7E, 0x01, 0x80, 0x02,
178 0x7E, 0x00, 0xEE, 0x5F, 0x60, 0x02, 0x05, 0x7E,
179/*0430*/0x30, 0x35, 0x0B, 0x43, 0xE1, 0x01, 0x7F, 0x09,
180 0x12, 0x17, 0x31, 0x02, 0x00, 0x58, 0x53, 0xE1,
181/*0440*/0xFE, 0x02, 0x00, 0x58, 0x8E, 0x6A, 0x8F, 0x6B,
182 0x8C, 0x6C, 0x8D, 0x6D, 0x75, 0x6E, 0x01, 0x75,
183/*0450*/0x6F, 0x01, 0x75, 0x70, 0x01, 0xE4, 0xF5, 0x73,
184 0xF5, 0x74, 0xF5, 0x75, 0x90, 0x07, 0x2F, 0xF0,
185/*0460*/0xF5, 0x3C, 0xF5, 0x3E, 0xF5, 0x46, 0xF5, 0x47,
186 0xF5, 0x3D, 0xF5, 0x3F, 0xF5, 0x6F, 0xE5, 0x6F,
187/*0470*/0x70, 0x0F, 0xE5, 0x6B, 0x45, 0x6A, 0x12, 0x07,
188 0x2A, 0x75, 0x83, 0x80, 0x74, 0x3A, 0xF0, 0x80,
189/*0480*/0x09, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x80, 0x74,
190 0x1A, 0xF0, 0xE4, 0xF5, 0x6E, 0xC3, 0x74, 0x3F,
191/*0490*/0x95, 0x6E, 0xFF, 0x12, 0x08, 0x65, 0x75, 0x83,
192 0x82, 0xEF, 0xF0, 0x12, 0x1A, 0x4D, 0x12, 0x08,
193/*04A0*/0xC6, 0xE5, 0x33, 0xF0, 0x12, 0x08, 0xFA, 0x12,
194 0x08, 0xB1, 0x40, 0xE1, 0xE5, 0x6F, 0x70, 0x0B,
195/*04B0*/0x12, 0x07, 0x2A, 0x75, 0x83, 0x80, 0x74, 0x36,
196 0xF0, 0x80, 0x09, 0x12, 0x07, 0x2A, 0x75, 0x83,
197/*04C0*/0x80, 0x74, 0x16, 0xF0, 0x75, 0x6E, 0x01, 0x12,
198 0x07, 0x2A, 0x75, 0x83, 0xB4, 0xE5, 0x6E, 0xF0,
199/*04D0*/0x12, 0x1A, 0x4D, 0x74, 0x3F, 0x25, 0x6E, 0xF5,
200 0x82, 0xE4, 0x34, 0x00, 0xF5, 0x83, 0xE5, 0x33,
201/*04E0*/0xF0, 0x74, 0xBF, 0x25, 0x6E, 0xF5, 0x82, 0xE4,
202 0x34, 0x00, 0x12, 0x08, 0xB1, 0x40, 0xD8, 0xE4,
203/*04F0*/0xF5, 0x70, 0xF5, 0x46, 0xF5, 0x47, 0xF5, 0x6E,
204 0x12, 0x08, 0xFA, 0xF5, 0x83, 0xE0, 0xFE, 0x12,
205/*0500*/0x08, 0xC6, 0xE0, 0x7C, 0x00, 0x24, 0x00, 0xFF,
206 0xEC, 0x3E, 0xFE, 0xAD, 0x3B, 0xD3, 0xEF, 0x9D,
207/*0510*/0xEE, 0x9C, 0x50, 0x04, 0x7B, 0x01, 0x80, 0x02,
208 0x7B, 0x00, 0xE5, 0x70, 0x70, 0x04, 0x7A, 0x01,
209/*0520*/0x80, 0x02, 0x7A, 0x00, 0xEB, 0x5A, 0x60, 0x06,
210 0x85, 0x6E, 0x46, 0x75, 0x70, 0x01, 0xD3, 0xEF,
211/*0530*/0x9D, 0xEE, 0x9C, 0x50, 0x04, 0x7F, 0x01, 0x80,
212 0x02, 0x7F, 0x00, 0xE5, 0x70, 0xB4, 0x01, 0x04,
213/*0540*/0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF, 0x5E,
214 0x60, 0x03, 0x85, 0x6E, 0x47, 0x05, 0x6E, 0xE5,
215/*0550*/0x6E, 0x64, 0x7F, 0x70, 0xA3, 0xE5, 0x46, 0x60,
216 0x05, 0xE5, 0x47, 0xB4, 0x7E, 0x03, 0x85, 0x46,
217/*0560*/0x47, 0xE5, 0x6F, 0x70, 0x08, 0x85, 0x46, 0x76,
218 0x85, 0x47, 0x77, 0x80, 0x0E, 0xC3, 0x74, 0x7F,
219/*0570*/0x95, 0x46, 0xF5, 0x78, 0xC3, 0x74, 0x7F, 0x95,
220 0x47, 0xF5, 0x79, 0xE5, 0x6F, 0x70, 0x37, 0xE5,
221/*0580*/0x46, 0x65, 0x47, 0x70, 0x0C, 0x75, 0x73, 0x01,
222 0x75, 0x74, 0x01, 0xF5, 0x3C, 0xF5, 0x3D, 0x80,
223/*0590*/0x35, 0xE4, 0xF5, 0x4E, 0xC3, 0xE5, 0x47, 0x95,
224 0x46, 0xF5, 0x3C, 0xC3, 0x13, 0xF5, 0x71, 0x25,
225/*05A0*/0x46, 0xF5, 0x72, 0xC3, 0x94, 0x3F, 0x40, 0x05,
226 0xE4, 0xF5, 0x3D, 0x80, 0x40, 0xC3, 0x74, 0x3F,
227/*05B0*/0x95, 0x72, 0xF5, 0x3D, 0x80, 0x37, 0xE5, 0x46,
228 0x65, 0x47, 0x70, 0x0F, 0x75, 0x73, 0x01, 0x75,
229/*05C0*/0x75, 0x01, 0xF5, 0x3E, 0xF5, 0x3F, 0x75, 0x4E,
230 0x01, 0x80, 0x22, 0xE4, 0xF5, 0x4E, 0xC3, 0xE5,
231/*05D0*/0x47, 0x95, 0x46, 0xF5, 0x3E, 0xC3, 0x13, 0xF5,
232 0x71, 0x25, 0x46, 0xF5, 0x72, 0xD3, 0x94, 0x3F,
233/*05E0*/0x50, 0x05, 0xE4, 0xF5, 0x3F, 0x80, 0x06, 0xE5,
234 0x72, 0x24, 0xC1, 0xF5, 0x3F, 0x05, 0x6F, 0xE5,
235/*05F0*/0x6F, 0xC3, 0x94, 0x02, 0x50, 0x03, 0x02, 0x04,
236 0x6E, 0xE5, 0x6D, 0x45, 0x6C, 0x70, 0x02, 0x80,
237/*0600*/0x04, 0xE5, 0x74, 0x45, 0x75, 0x90, 0x07, 0x2F,
238 0xF0, 0x7F, 0x01, 0xE5, 0x3E, 0x60, 0x04, 0xE5,
239/*0610*/0x3C, 0x70, 0x14, 0xE4, 0xF5, 0x3C, 0xF5, 0x3D,
240 0xF5, 0x3E, 0xF5, 0x3F, 0x12, 0x08, 0xD2, 0x70,
241/*0620*/0x04, 0xF0, 0x02, 0x06, 0xA4, 0x80, 0x7A, 0xE5,
242 0x3C, 0xC3, 0x95, 0x3E, 0x40, 0x07, 0xE5, 0x3C,
243/*0630*/0x95, 0x3E, 0xFF, 0x80, 0x06, 0xC3, 0xE5, 0x3E,
244 0x95, 0x3C, 0xFF, 0xE5, 0x76, 0xD3, 0x95, 0x79,
245/*0640*/0x40, 0x05, 0x85, 0x76, 0x7A, 0x80, 0x03, 0x85,
246 0x79, 0x7A, 0xE5, 0x77, 0xC3, 0x95, 0x78, 0x50,
247/*0650*/0x05, 0x85, 0x77, 0x7B, 0x80, 0x03, 0x85, 0x78,
248 0x7B, 0xE5, 0x7B, 0xD3, 0x95, 0x7A, 0x40, 0x30,
249/*0660*/0xE5, 0x7B, 0x95, 0x7A, 0xF5, 0x3C, 0xF5, 0x3E,
250 0xC3, 0xE5, 0x7B, 0x95, 0x7A, 0x90, 0x07, 0x19,
251/*0670*/0xF0, 0xE5, 0x3C, 0xC3, 0x13, 0xF5, 0x71, 0x25,
252 0x7A, 0xF5, 0x72, 0xC3, 0x94, 0x3F, 0x40, 0x05,
253/*0680*/0xE4, 0xF5, 0x3D, 0x80, 0x1F, 0xC3, 0x74, 0x3F,
254 0x95, 0x72, 0xF5, 0x3D, 0xF5, 0x3F, 0x80, 0x14,
255/*0690*/0xE4, 0xF5, 0x3C, 0xF5, 0x3E, 0x90, 0x07, 0x19,
256 0xF0, 0x12, 0x08, 0xD2, 0x70, 0x03, 0xF0, 0x80,
257/*06A0*/0x03, 0x74, 0x01, 0xF0, 0x12, 0x08, 0x65, 0x75,
258 0x83, 0xD0, 0xE0, 0x54, 0x0F, 0xFE, 0xAD, 0x3C,
259/*06B0*/0x70, 0x02, 0x7E, 0x07, 0xBE, 0x0F, 0x02, 0x7E,
260 0x80, 0xEE, 0xFB, 0xEF, 0xD3, 0x9B, 0x74, 0x80,
261/*06C0*/0xF8, 0x98, 0x40, 0x1F, 0xE4, 0xF5, 0x3C, 0xF5,
262 0x3E, 0x12, 0x08, 0xD2, 0x70, 0x03, 0xF0, 0x80,
263/*06D0*/0x12, 0x74, 0x01, 0xF0, 0xE5, 0x08, 0xFB, 0xEB,
264 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xD2, 0xE0,
265/*06E0*/0x44, 0x10, 0xF0, 0xE5, 0x08, 0xFB, 0xEB, 0x44,
266 0x09, 0xF5, 0x82, 0x75, 0x83, 0x9E, 0xED, 0xF0,
267/*06F0*/0xEB, 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xCA,
268 0xED, 0xF0, 0x12, 0x08, 0x65, 0x75, 0x83, 0xCC,
269/*0700*/0xEF, 0xF0, 0x22, 0xE5, 0x08, 0x44, 0x07, 0xF5,
270 0x82, 0x75, 0x83, 0xBC, 0xE0, 0x54, 0xF0, 0xF0,
271/*0710*/0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82, 0x75, 0x83,
272 0xBE, 0xE0, 0x54, 0xF0, 0xF0, 0xE5, 0x08, 0x44,
273/*0720*/0x07, 0xF5, 0x82, 0x75, 0x83, 0xC0, 0xE0, 0x54,
274 0xF0, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82,
275/*0730*/0x22, 0xF0, 0x90, 0x07, 0x28, 0xE0, 0xFE, 0xA3,
276 0xE0, 0xF5, 0x82, 0x8E, 0x83, 0x22, 0x85, 0x42,
277/*0740*/0x42, 0x85, 0x41, 0x41, 0x85, 0x40, 0x40, 0x74,
278 0xC0, 0x2F, 0xF5, 0x82, 0x74, 0x02, 0x3E, 0xF5,
279/*0750*/0x83, 0xE5, 0x42, 0xF0, 0x74, 0xE0, 0x2F, 0xF5,
280 0x82, 0x74, 0x02, 0x3E, 0xF5, 0x83, 0x22, 0xE5,
281/*0760*/0x42, 0x29, 0xFD, 0xE4, 0x33, 0xFC, 0xE5, 0x3C,
282 0xC3, 0x9D, 0xEC, 0x64, 0x80, 0xF8, 0x74, 0x80,
283/*0770*/0x98, 0x22, 0xF5, 0x83, 0xE0, 0x90, 0x07, 0x22,
284 0x54, 0x1F, 0xFD, 0xE0, 0xFA, 0xA3, 0xE0, 0xF5,
285/*0780*/0x82, 0x8A, 0x83, 0xED, 0xF0, 0x22, 0x90, 0x07,
286 0x22, 0xE0, 0xFC, 0xA3, 0xE0, 0xF5, 0x82, 0x8C,
287/*0790*/0x83, 0x22, 0x90, 0x07, 0x24, 0xFF, 0xED, 0x44,
288 0x07, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22, 0x85,
289/*07A0*/0x38, 0x38, 0x85, 0x39, 0x39, 0x85, 0x3A, 0x3A,
290 0x74, 0xC0, 0x2F, 0xF5, 0x82, 0x74, 0x02, 0x3E,
291/*07B0*/0xF5, 0x83, 0x22, 0x90, 0x07, 0x26, 0xFF, 0xED,
292 0x44, 0x07, 0xCF, 0xF0, 0xA3, 0xEF, 0xF0, 0x22,
293/*07C0*/0xF0, 0x74, 0xA0, 0x2F, 0xF5, 0x82, 0x74, 0x02,
294 0x3E, 0xF5, 0x83, 0x22, 0x74, 0xC0, 0x25, 0x11,
295/*07D0*/0xF5, 0x82, 0xE4, 0x34, 0x01, 0xF5, 0x83, 0x22,
296 0x74, 0x00, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
297/*07E0*/0x02, 0xF5, 0x83, 0x22, 0x74, 0x60, 0x25, 0x11,
298 0xF5, 0x82, 0xE4, 0x34, 0x03, 0xF5, 0x83, 0x22,
299/*07F0*/0x74, 0x80, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
300 0x03, 0xF5, 0x83, 0x22, 0x74, 0xE0, 0x25, 0x11,
301/*0800*/0xF5, 0x82, 0xE4, 0x34, 0x03, 0xF5, 0x83, 0x22,
302 0x74, 0x40, 0x25, 0x11, 0xF5, 0x82, 0xE4, 0x34,
303/*0810*/0x06, 0xF5, 0x83, 0x22, 0x74, 0x80, 0x2F, 0xF5,
304 0x82, 0x74, 0x02, 0x3E, 0xF5, 0x83, 0x22, 0xAF,
305/*0820*/0x08, 0x7E, 0x00, 0xEF, 0x44, 0x07, 0xF5, 0x82,
306 0x22, 0xF5, 0x83, 0xE5, 0x82, 0x44, 0x07, 0xF5,
307/*0830*/0x82, 0xE5, 0x40, 0xF0, 0x22, 0x74, 0x40, 0x25,
308 0x11, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83,
309/*0840*/0x22, 0x74, 0xC0, 0x25, 0x11, 0xF5, 0x82, 0xE4,
310 0x34, 0x03, 0xF5, 0x83, 0x22, 0x74, 0x00, 0x25,
311/*0850*/0x11, 0xF5, 0x82, 0xE4, 0x34, 0x06, 0xF5, 0x83,
312 0x22, 0x74, 0x20, 0x25, 0x11, 0xF5, 0x82, 0xE4,
313/*0860*/0x34, 0x06, 0xF5, 0x83, 0x22, 0xE5, 0x08, 0xFD,
314 0xED, 0x44, 0x07, 0xF5, 0x82, 0x22, 0xE5, 0x41,
315/*0870*/0xF0, 0xE5, 0x65, 0x64, 0x01, 0x45, 0x64, 0x22,
316 0x7E, 0x00, 0xFB, 0x7A, 0x00, 0xFD, 0x7C, 0x00,
317/*0880*/0x22, 0x74, 0x20, 0x25, 0x11, 0xF5, 0x82, 0xE4,
318 0x34, 0x02, 0x22, 0x74, 0xA0, 0x25, 0x11, 0xF5,
319/*0890*/0x82, 0xE4, 0x34, 0x03, 0x22, 0x85, 0x3E, 0x42,
320 0x85, 0x3F, 0x41, 0x8F, 0x40, 0x22, 0x85, 0x3C,
321/*08A0*/0x42, 0x85, 0x3D, 0x41, 0x8F, 0x40, 0x22, 0x75,
322 0x45, 0x3F, 0x90, 0x07, 0x20, 0xE4, 0xF0, 0xA3,
323/*08B0*/0x22, 0xF5, 0x83, 0xE5, 0x32, 0xF0, 0x05, 0x6E,
324 0xE5, 0x6E, 0xC3, 0x94, 0x40, 0x22, 0xF0, 0xE5,
325/*08C0*/0x08, 0x44, 0x06, 0xF5, 0x82, 0x22, 0x74, 0x00,
326 0x25, 0x6E, 0xF5, 0x82, 0xE4, 0x34, 0x00, 0xF5,
327/*08D0*/0x83, 0x22, 0xE5, 0x6D, 0x45, 0x6C, 0x90, 0x07,
328 0x2F, 0x22, 0xE4, 0xF9, 0xE5, 0x3C, 0xD3, 0x95,
329/*08E0*/0x3E, 0x22, 0x74, 0x80, 0x2E, 0xF5, 0x82, 0xE4,
330 0x34, 0x02, 0xF5, 0x83, 0xE0, 0x22, 0x74, 0xA0,
331/*08F0*/0x2E, 0xF5, 0x82, 0xE4, 0x34, 0x02, 0xF5, 0x83,
332 0xE0, 0x22, 0x74, 0x80, 0x25, 0x6E, 0xF5, 0x82,
333/*0900*/0xE4, 0x34, 0x00, 0x22, 0x25, 0x42, 0xFD, 0xE4,
334 0x33, 0xFC, 0x22, 0x85, 0x42, 0x42, 0x85, 0x41,
335/*0910*/0x41, 0x85, 0x40, 0x40, 0x22, 0xED, 0x4C, 0x60,
336 0x03, 0x02, 0x09, 0xE5, 0xEF, 0x4E, 0x70, 0x37,
337/*0920*/0x90, 0x07, 0x26, 0x12, 0x07, 0x89, 0xE0, 0xFD,
338 0x12, 0x07, 0xCC, 0xED, 0xF0, 0x90, 0x07, 0x28,
339/*0930*/0x12, 0x07, 0x89, 0xE0, 0xFD, 0x12, 0x07, 0xD8,
340 0xED, 0xF0, 0x12, 0x07, 0x86, 0xE0, 0x54, 0x1F,
341/*0940*/0xFD, 0x12, 0x08, 0x81, 0xF5, 0x83, 0xED, 0xF0,
342 0x90, 0x07, 0x24, 0x12, 0x07, 0x89, 0xE0, 0x54,
343/*0950*/0x1F, 0xFD, 0x12, 0x08, 0x35, 0xED, 0xF0, 0xEF,
344 0x64, 0x04, 0x4E, 0x70, 0x37, 0x90, 0x07, 0x26,
345/*0960*/0x12, 0x07, 0x89, 0xE0, 0xFD, 0x12, 0x07, 0xE4,
346 0xED, 0xF0, 0x90, 0x07, 0x28, 0x12, 0x07, 0x89,
347/*0970*/0xE0, 0xFD, 0x12, 0x07, 0xF0, 0xED, 0xF0, 0x12,
348 0x07, 0x86, 0xE0, 0x54, 0x1F, 0xFD, 0x12, 0x08,
349/*0980*/0x8B, 0xF5, 0x83, 0xED, 0xF0, 0x90, 0x07, 0x24,
350 0x12, 0x07, 0x89, 0xE0, 0x54, 0x1F, 0xFD, 0x12,
351/*0990*/0x08, 0x41, 0xED, 0xF0, 0xEF, 0x64, 0x01, 0x4E,
352 0x70, 0x04, 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00,
353/*09A0*/0xEF, 0x64, 0x02, 0x4E, 0x70, 0x04, 0x7F, 0x01,
354 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x4D, 0x60, 0x78,
355/*09B0*/0x90, 0x07, 0x26, 0x12, 0x07, 0x35, 0xE0, 0xFF,
356 0x12, 0x07, 0xFC, 0xEF, 0x12, 0x07, 0x31, 0xE0,
357/*09C0*/0xFF, 0x12, 0x08, 0x08, 0xEF, 0xF0, 0x90, 0x07,
358 0x22, 0x12, 0x07, 0x35, 0xE0, 0x54, 0x1F, 0xFF,
359/*09D0*/0x12, 0x08, 0x4D, 0xEF, 0xF0, 0x90, 0x07, 0x24,
360 0x12, 0x07, 0x35, 0xE0, 0x54, 0x1F, 0xFF, 0x12,
361/*09E0*/0x08, 0x59, 0xEF, 0xF0, 0x22, 0x12, 0x07, 0xCC,
362 0xE4, 0xF0, 0x12, 0x07, 0xD8, 0xE4, 0xF0, 0x12,
363/*09F0*/0x08, 0x81, 0xF5, 0x83, 0xE4, 0xF0, 0x12, 0x08,
364 0x35, 0x74, 0x14, 0xF0, 0x12, 0x07, 0xE4, 0xE4,
365/*0A00*/0xF0, 0x12, 0x07, 0xF0, 0xE4, 0xF0, 0x12, 0x08,
366 0x8B, 0xF5, 0x83, 0xE4, 0xF0, 0x12, 0x08, 0x41,
367/*0A10*/0x74, 0x14, 0xF0, 0x12, 0x07, 0xFC, 0xE4, 0xF0,
368 0x12, 0x08, 0x08, 0xE4, 0xF0, 0x12, 0x08, 0x4D,
369/*0A20*/0xE4, 0xF0, 0x12, 0x08, 0x59, 0x74, 0x14, 0xF0,
370 0x22, 0x53, 0xF9, 0xF7, 0x75, 0xFC, 0x10, 0xE4,
371/*0A30*/0xF5, 0xFD, 0x75, 0xFE, 0x30, 0xF5, 0xFF, 0xE5,
372 0xE7, 0x20, 0xE7, 0x03, 0x43, 0xF9, 0x08, 0xE5,
373/*0A40*/0xE6, 0x20, 0xE7, 0x0B, 0x78, 0xFF, 0xE4, 0xF6,
374 0xD8, 0xFD, 0x53, 0xE6, 0xFE, 0x80, 0x09, 0x78,
375/*0A50*/0x08, 0xE4, 0xF6, 0xD8, 0xFD, 0x53, 0xE6, 0xFE,
376 0x75, 0x81, 0x80, 0xE4, 0xF5, 0xA8, 0xD2, 0xA8,
377/*0A60*/0xC2, 0xA9, 0xD2, 0xAF, 0xE5, 0xE2, 0x20, 0xE5,
378 0x05, 0x20, 0xE6, 0x02, 0x80, 0x03, 0x43, 0xE1,
379/*0A70*/0x02, 0xE5, 0xE2, 0x20, 0xE0, 0x0E, 0x90, 0x00,
380 0x00, 0x7F, 0x00, 0x7E, 0x08, 0xE4, 0xF0, 0xA3,
381/*0A80*/0xDF, 0xFC, 0xDE, 0xFA, 0x02, 0x0A, 0xDB, 0x43,
382 0xFA, 0x01, 0xC0, 0xE0, 0xC0, 0xF0, 0xC0, 0x83,
383/*0A90*/0xC0, 0x82, 0xC0, 0xD0, 0x12, 0x1C, 0xE7, 0xD0,
384 0xD0, 0xD0, 0x82, 0xD0, 0x83, 0xD0, 0xF0, 0xD0,
385/*0AA0*/0xE0, 0x53, 0xFA, 0xFE, 0x32, 0x02, 0x1B, 0x55,
386 0xE4, 0x93, 0xA3, 0xF8, 0xE4, 0x93, 0xA3, 0xF6,
387/*0AB0*/0x08, 0xDF, 0xF9, 0x80, 0x29, 0xE4, 0x93, 0xA3,
388 0xF8, 0x54, 0x07, 0x24, 0x0C, 0xC8, 0xC3, 0x33,
389/*0AC0*/0xC4, 0x54, 0x0F, 0x44, 0x20, 0xC8, 0x83, 0x40,
390 0x04, 0xF4, 0x56, 0x80, 0x01, 0x46, 0xF6, 0xDF,
391/*0AD0*/0xE4, 0x80, 0x0B, 0x01, 0x02, 0x04, 0x08, 0x10,
392 0x20, 0x40, 0x80, 0x90, 0x00, 0x3F, 0xE4, 0x7E,
393/*0AE0*/0x01, 0x93, 0x60, 0xC1, 0xA3, 0xFF, 0x54, 0x3F,
394 0x30, 0xE5, 0x09, 0x54, 0x1F, 0xFE, 0xE4, 0x93,
395/*0AF0*/0xA3, 0x60, 0x01, 0x0E, 0xCF, 0x54, 0xC0, 0x25,
396 0xE0, 0x60, 0xAD, 0x40, 0xB8, 0x80, 0xFE, 0x8C,
397/*0B00*/0x64, 0x8D, 0x65, 0x8A, 0x66, 0x8B, 0x67, 0xE4,
398 0xF5, 0x69, 0xEF, 0x4E, 0x70, 0x03, 0x02, 0x1D,
399/*0B10*/0x55, 0xE4, 0xF5, 0x68, 0xE5, 0x67, 0x45, 0x66,
400 0x70, 0x32, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x90,
401/*0B20*/0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE4,
402 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0xE4, 0x12,
403/*0B30*/0x08, 0x70, 0x70, 0x29, 0x12, 0x07, 0x2A, 0x75,
404 0x83, 0x92, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83,
405/*0B40*/0xC6, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC8,
406 0xE4, 0xF0, 0x80, 0x11, 0x90, 0x07, 0x26, 0x12,
407/*0B50*/0x07, 0x35, 0xE4, 0x12, 0x08, 0x70, 0x70, 0x05,
408 0x12, 0x07, 0x32, 0xE4, 0xF0, 0x12, 0x1D, 0x55,
409/*0B60*/0x12, 0x1E, 0xBF, 0xE5, 0x67, 0x45, 0x66, 0x70,
410 0x33, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x90, 0xE5,
411/*0B70*/0x41, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE5,
412 0x41, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0x12,
413/*0B80*/0x08, 0x6E, 0x70, 0x29, 0x12, 0x07, 0x2A, 0x75,
414 0x83, 0x92, 0xE5, 0x40, 0x12, 0x07, 0x29, 0x75,
415/*0B90*/0x83, 0xC6, 0xE5, 0x40, 0x12, 0x07, 0x29, 0x75,
416 0x83, 0xC8, 0x80, 0x0E, 0x90, 0x07, 0x26, 0x12,
417/*0BA0*/0x07, 0x35, 0x12, 0x08, 0x6E, 0x70, 0x06, 0x12,
418 0x07, 0x32, 0xE5, 0x40, 0xF0, 0xAF, 0x69, 0x7E,
419/*0BB0*/0x00, 0xAD, 0x67, 0xAC, 0x66, 0x12, 0x04, 0x44,
420 0x12, 0x07, 0x2A, 0x75, 0x83, 0xCA, 0xE0, 0xD3,
421/*0BC0*/0x94, 0x00, 0x50, 0x0C, 0x05, 0x68, 0xE5, 0x68,
422 0xC3, 0x94, 0x05, 0x50, 0x03, 0x02, 0x0B, 0x14,
423/*0BD0*/0x22, 0x8C, 0x60, 0x8D, 0x61, 0x12, 0x08, 0xDA,
424 0x74, 0x20, 0x40, 0x0D, 0x2F, 0xF5, 0x82, 0x74,
425/*0BE0*/0x03, 0x3E, 0xF5, 0x83, 0xE5, 0x3E, 0xF0, 0x80,
426 0x0B, 0x2F, 0xF5, 0x82, 0x74, 0x03, 0x3E, 0xF5,
427/*0BF0*/0x83, 0xE5, 0x3C, 0xF0, 0xE5, 0x3C, 0xD3, 0x95,
428 0x3E, 0x40, 0x3C, 0xE5, 0x61, 0x45, 0x60, 0x70,
429/*0C00*/0x10, 0xE9, 0x12, 0x09, 0x04, 0xE5, 0x3E, 0x12,
430 0x07, 0x68, 0x40, 0x3B, 0x12, 0x08, 0x95, 0x80,
431/*0C10*/0x18, 0xE5, 0x3E, 0xC3, 0x95, 0x38, 0x40, 0x1D,
432 0x85, 0x3E, 0x38, 0xE5, 0x3E, 0x60, 0x05, 0x85,
433/*0C20*/0x3F, 0x39, 0x80, 0x03, 0x85, 0x39, 0x39, 0x8F,
434 0x3A, 0x12, 0x08, 0x14, 0xE5, 0x3E, 0x12, 0x07,
435/*0C30*/0xC0, 0xE5, 0x3F, 0xF0, 0x22, 0x80, 0x43, 0xE5,
436 0x61, 0x45, 0x60, 0x70, 0x19, 0x12, 0x07, 0x5F,
437/*0C40*/0x40, 0x05, 0x12, 0x08, 0x9E, 0x80, 0x27, 0x12,
438 0x09, 0x0B, 0x12, 0x08, 0x14, 0xE5, 0x42, 0x12,
439/*0C50*/0x07, 0xC0, 0xE5, 0x41, 0xF0, 0x22, 0xE5, 0x3C,
440 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3C, 0x38,
441/*0C60*/0xE5, 0x3C, 0x60, 0x05, 0x85, 0x3D, 0x39, 0x80,
442 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, 0x08,
443/*0C70*/0x14, 0xE5, 0x3C, 0x12, 0x07, 0xC0, 0xE5, 0x3D,
444 0xF0, 0x22, 0x85, 0x38, 0x38, 0x85, 0x39, 0x39,
445/*0C80*/0x85, 0x3A, 0x3A, 0x12, 0x08, 0x14, 0xE5, 0x38,
446 0x12, 0x07, 0xC0, 0xE5, 0x39, 0xF0, 0x22, 0x7F,
447/*0C90*/0x06, 0x12, 0x17, 0x31, 0x12, 0x1D, 0x23, 0x12,
448 0x0E, 0x04, 0x12, 0x0E, 0x33, 0xE0, 0x44, 0x0A,
449/*0CA0*/0xF0, 0x74, 0x8E, 0xFE, 0x12, 0x0E, 0x04, 0x12,
450 0x0E, 0x0B, 0xEF, 0xF0, 0xE5, 0x28, 0x30, 0xE5,
451/*0CB0*/0x03, 0xD3, 0x80, 0x01, 0xC3, 0x40, 0x05, 0x75,
452 0x14, 0x20, 0x80, 0x03, 0x75, 0x14, 0x08, 0x12,
453/*0CC0*/0x0E, 0x04, 0x75, 0x83, 0x8A, 0xE5, 0x14, 0xF0,
454 0xB4, 0xFF, 0x05, 0x75, 0x12, 0x80, 0x80, 0x06,
455/*0CD0*/0xE5, 0x14, 0xC3, 0x13, 0xF5, 0x12, 0xE4, 0xF5,
456 0x16, 0xF5, 0x7F, 0x12, 0x19, 0x36, 0x12, 0x13,
457/*0CE0*/0xA3, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x50, 0x09,
458 0x05, 0x16, 0xE5, 0x16, 0xC3, 0x94, 0x14, 0x40,
459/*0CF0*/0xEA, 0xE5, 0xE4, 0x20, 0xE7, 0x28, 0x12, 0x0E,
460 0x04, 0x75, 0x83, 0xD2, 0xE0, 0x54, 0x08, 0xD3,
461/*0D00*/0x94, 0x00, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
462 0x7F, 0x00, 0xE5, 0x0A, 0xC3, 0x94, 0x01, 0x40,
463/*0D10*/0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEF,
464 0x5E, 0x60, 0x03, 0x12, 0x1D, 0xD7, 0xE5, 0x7F,
465/*0D20*/0xC3, 0x94, 0x11, 0x40, 0x14, 0x12, 0x0E, 0x04,
466 0x75, 0x83, 0xD2, 0xE0, 0x44, 0x80, 0xF0, 0xE5,
467/*0D30*/0xE4, 0x20, 0xE7, 0x0F, 0x12, 0x1D, 0xD7, 0x80,
468 0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0xD2, 0xE0,
469/*0D40*/0x54, 0x7F, 0xF0, 0x12, 0x1D, 0x23, 0x22, 0x74,
470 0x8A, 0x85, 0x08, 0x82, 0xF5, 0x83, 0xE5, 0x17,
471/*0D50*/0xF0, 0x12, 0x0E, 0x3A, 0xE4, 0xF0, 0x90, 0x07,
472 0x02, 0xE0, 0x12, 0x0E, 0x17, 0x75, 0x83, 0x90,
473/*0D60*/0xEF, 0xF0, 0x74, 0x92, 0xFE, 0xE5, 0x08, 0x44,
474 0x07, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0, 0x54,
475/*0D70*/0xC0, 0xFD, 0x90, 0x07, 0x03, 0xE0, 0x54, 0x3F,
476 0x4D, 0x8F, 0x82, 0x8E, 0x83, 0xF0, 0x90, 0x07,
477/*0D80*/0x04, 0xE0, 0x12, 0x0E, 0x17, 0x75, 0x83, 0x82,
478 0xEF, 0xF0, 0x90, 0x07, 0x05, 0xE0, 0xFF, 0xED,
479/*0D90*/0x44, 0x07, 0xF5, 0x82, 0x75, 0x83, 0xB4, 0xEF,
480 0x12, 0x0E, 0x03, 0x75, 0x83, 0x80, 0xE0, 0x54,
481/*0DA0*/0xBF, 0xF0, 0x30, 0x37, 0x0A, 0x12, 0x0E, 0x91,
482 0x75, 0x83, 0x94, 0xE0, 0x44, 0x80, 0xF0, 0x30,
483/*0DB0*/0x38, 0x0A, 0x12, 0x0E, 0x91, 0x75, 0x83, 0x92,
484 0xE0, 0x44, 0x80, 0xF0, 0xE5, 0x28, 0x30, 0xE4,
485/*0DC0*/0x1A, 0x20, 0x39, 0x0A, 0x12, 0x0E, 0x04, 0x75,
486 0x83, 0x88, 0xE0, 0x54, 0x7F, 0xF0, 0x20, 0x3A,
487/*0DD0*/0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0x88, 0xE0,
488 0x54, 0xBF, 0xF0, 0x74, 0x8C, 0xFE, 0x12, 0x0E,
489/*0DE0*/0x04, 0x8E, 0x83, 0xE0, 0x54, 0x0F, 0x12, 0x0E,
490 0x03, 0x75, 0x83, 0x86, 0xE0, 0x54, 0xBF, 0xF0,
491/*0DF0*/0xE5, 0x08, 0x44, 0x06, 0x12, 0x0D, 0xFD, 0x75,
492 0x83, 0x8A, 0xE4, 0xF0, 0x22, 0xF5, 0x82, 0x75,
493/*0E00*/0x83, 0x82, 0xE4, 0xF0, 0xE5, 0x08, 0x44, 0x07,
494 0xF5, 0x82, 0x22, 0x8E, 0x83, 0xE0, 0xF5, 0x10,
495/*0E10*/0x54, 0xFE, 0xF0, 0xE5, 0x10, 0x44, 0x01, 0xFF,
496 0xE5, 0x08, 0xFD, 0xED, 0x44, 0x07, 0xF5, 0x82,
497/*0E20*/0x22, 0xE5, 0x15, 0xC4, 0x54, 0x07, 0xFF, 0xE5,
498 0x08, 0xFD, 0xED, 0x44, 0x08, 0xF5, 0x82, 0x75,
499/*0E30*/0x83, 0x82, 0x22, 0x75, 0x83, 0x80, 0xE0, 0x44,
500 0x40, 0xF0, 0xE5, 0x08, 0x44, 0x08, 0xF5, 0x82,
501/*0E40*/0x75, 0x83, 0x8A, 0x22, 0xE5, 0x16, 0x25, 0xE0,
502 0x25, 0xE0, 0x24, 0xAF, 0xF5, 0x82, 0xE4, 0x34,
503/*0E50*/0x1A, 0xF5, 0x83, 0xE4, 0x93, 0xF5, 0x0D, 0x22,
504 0x43, 0xE1, 0x10, 0x43, 0xE1, 0x80, 0x53, 0xE1,
505/*0E60*/0xFD, 0x85, 0xE1, 0x10, 0x22, 0xE5, 0x16, 0x25,
506 0xE0, 0x25, 0xE0, 0x24, 0xB2, 0xF5, 0x82, 0xE4,
507/*0E70*/0x34, 0x1A, 0xF5, 0x83, 0xE4, 0x93, 0x22, 0x85,
508 0x55, 0x82, 0x85, 0x54, 0x83, 0xE5, 0x15, 0xF0,
509/*0E80*/0x22, 0xE5, 0xE2, 0x54, 0x20, 0xD3, 0x94, 0x00,
510 0x22, 0xE5, 0xE2, 0x54, 0x40, 0xD3, 0x94, 0x00,
511/*0E90*/0x22, 0xE5, 0x08, 0x44, 0x06, 0xF5, 0x82, 0x22,
512 0xFD, 0xE5, 0x08, 0xFB, 0xEB, 0x44, 0x07, 0xF5,
513/*0EA0*/0x82, 0x22, 0x53, 0xF9, 0xF7, 0x75, 0xFE, 0x30,
514 0x22, 0xEF, 0x4E, 0x70, 0x26, 0x12, 0x07, 0xCC,
515/*0EB0*/0xE0, 0xFD, 0x90, 0x07, 0x26, 0x12, 0x07, 0x7B,
516 0x12, 0x07, 0xD8, 0xE0, 0xFD, 0x90, 0x07, 0x28,
517/*0EC0*/0x12, 0x07, 0x7B, 0x12, 0x08, 0x81, 0x12, 0x07,
518 0x72, 0x12, 0x08, 0x35, 0xE0, 0x90, 0x07, 0x24,
519/*0ED0*/0x12, 0x07, 0x78, 0xEF, 0x64, 0x04, 0x4E, 0x70,
520 0x29, 0x12, 0x07, 0xE4, 0xE0, 0xFD, 0x90, 0x07,
521/*0EE0*/0x26, 0x12, 0x07, 0x7B, 0x12, 0x07, 0xF0, 0xE0,
522 0xFD, 0x90, 0x07, 0x28, 0x12, 0x07, 0x7B, 0x12,
523/*0EF0*/0x08, 0x8B, 0x12, 0x07, 0x72, 0x12, 0x08, 0x41,
524 0xE0, 0x54, 0x1F, 0xFD, 0x90, 0x07, 0x24, 0x12,
525/*0F00*/0x07, 0x7B, 0xEF, 0x64, 0x01, 0x4E, 0x70, 0x04,
526 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, 0xEF, 0x64,
527/*0F10*/0x02, 0x4E, 0x70, 0x04, 0x7F, 0x01, 0x80, 0x02,
528 0x7F, 0x00, 0xEF, 0x4D, 0x60, 0x35, 0x12, 0x07,
529/*0F20*/0xFC, 0xE0, 0xFF, 0x90, 0x07, 0x26, 0x12, 0x07,
530 0x89, 0xEF, 0xF0, 0x12, 0x08, 0x08, 0xE0, 0xFF,
531/*0F30*/0x90, 0x07, 0x28, 0x12, 0x07, 0x89, 0xEF, 0xF0,
532 0x12, 0x08, 0x4D, 0xE0, 0x54, 0x1F, 0xFF, 0x12,
533/*0F40*/0x07, 0x86, 0xEF, 0xF0, 0x12, 0x08, 0x59, 0xE0,
534 0x54, 0x1F, 0xFF, 0x90, 0x07, 0x24, 0x12, 0x07,
535/*0F50*/0x89, 0xEF, 0xF0, 0x22, 0xE4, 0xF5, 0x53, 0x12,
536 0x0E, 0x81, 0x40, 0x04, 0x7F, 0x01, 0x80, 0x02,
537/*0F60*/0x7F, 0x00, 0x12, 0x0E, 0x89, 0x40, 0x04, 0x7E,
538 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x70,
539/*0F70*/0x03, 0x02, 0x0F, 0xF6, 0x85, 0xE1, 0x10, 0x43,
540 0xE1, 0x02, 0x53, 0xE1, 0x0F, 0x85, 0xE1, 0x10,
541/*0F80*/0xE4, 0xF5, 0x51, 0xE5, 0xE3, 0x54, 0x3F, 0xF5,
542 0x52, 0x12, 0x0E, 0x89, 0x40, 0x1D, 0xAD, 0x52,
543/*0F90*/0xAF, 0x51, 0x12, 0x11, 0x18, 0xEF, 0x60, 0x08,
544 0x85, 0xE1, 0x10, 0x43, 0xE1, 0x40, 0x80, 0x0B,
545/*0FA0*/0x53, 0xE1, 0xBF, 0x12, 0x0E, 0x58, 0x12, 0x00,
546 0x06, 0x80, 0xFB, 0xE5, 0xE3, 0x54, 0x3F, 0xF5,
547/*0FB0*/0x51, 0xE5, 0xE4, 0x54, 0x3F, 0xF5, 0x52, 0x12,
548 0x0E, 0x81, 0x40, 0x1D, 0xAD, 0x52, 0xAF, 0x51,
549/*0FC0*/0x12, 0x11, 0x18, 0xEF, 0x60, 0x08, 0x85, 0xE1,
550 0x10, 0x43, 0xE1, 0x20, 0x80, 0x0B, 0x53, 0xE1,
551/*0FD0*/0xDF, 0x12, 0x0E, 0x58, 0x12, 0x00, 0x06, 0x80,
552 0xFB, 0x12, 0x0E, 0x81, 0x40, 0x04, 0x7F, 0x01,
553/*0FE0*/0x80, 0x02, 0x7F, 0x00, 0x12, 0x0E, 0x89, 0x40,
554 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE,
555/*0FF0*/0x4F, 0x60, 0x03, 0x12, 0x0E, 0x5B, 0x22, 0x12,
556 0x0E, 0x21, 0xEF, 0xF0, 0x12, 0x10, 0x91, 0x22,
557/*1000*/0x02, 0x11, 0x00, 0x02, 0x10, 0x40, 0x02, 0x10,
558 0x90, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
559/*1010*/0x01, 0x20, 0x01, 0x20, 0xE4, 0xF5, 0x57, 0x12,
560 0x16, 0xBD, 0x12, 0x16, 0x44, 0xE4, 0x12, 0x10,
561/*1020*/0x56, 0x12, 0x14, 0xB7, 0x90, 0x07, 0x26, 0x12,
562 0x07, 0x35, 0xE4, 0x12, 0x07, 0x31, 0xE4, 0xF0,
563/*1030*/0x12, 0x10, 0x56, 0x12, 0x14, 0xB7, 0x90, 0x07,
564 0x26, 0x12, 0x07, 0x35, 0xE5, 0x41, 0x12, 0x07,
565/*1040*/0x31, 0xE5, 0x40, 0xF0, 0xAF, 0x57, 0x7E, 0x00,
566 0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, 0xAF,
567/*1050*/0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0xFF, 0x90,
568 0x07, 0x20, 0xA3, 0xE0, 0xFD, 0xE4, 0xF5, 0x56,
569/*1060*/0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, 0x12,
570 0x11, 0x51, 0x7F, 0x0F, 0x7D, 0x18, 0xE4, 0xF5,
571/*1070*/0x56, 0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA,
572 0x12, 0x15, 0x41, 0xAF, 0x56, 0x7E, 0x00, 0x12,
573/*1080*/0x1A, 0xFF, 0xE4, 0xFF, 0xF5, 0x56, 0x7D, 0x1F,
574 0xF5, 0x40, 0xFE, 0xFC, 0xAB, 0x56, 0xFA, 0x22,
575/*1090*/0x22, 0xE4, 0xF5, 0x55, 0xE5, 0x08, 0xFD, 0x74,
576 0xA0, 0xF5, 0x56, 0xED, 0x44, 0x07, 0xF5, 0x57,
577/*10A0*/0xE5, 0x28, 0x30, 0xE5, 0x03, 0xD3, 0x80, 0x01,
578 0xC3, 0x40, 0x05, 0x7F, 0x28, 0xEF, 0x80, 0x04,
579/*10B0*/0x7F, 0x14, 0xEF, 0xC3, 0x13, 0xF5, 0x54, 0xE4,
580 0xF9, 0x12, 0x0E, 0x18, 0x75, 0x83, 0x8E, 0xE0,
581/*10C0*/0xF5, 0x10, 0xCE, 0xEF, 0xCE, 0xEE, 0xD3, 0x94,
582 0x00, 0x40, 0x26, 0xE5, 0x10, 0x54, 0xFE, 0x12,
583/*10D0*/0x0E, 0x98, 0x75, 0x83, 0x8E, 0xED, 0xF0, 0xE5,
584 0x10, 0x44, 0x01, 0xFD, 0xEB, 0x44, 0x07, 0xF5,
585/*10E0*/0x82, 0xED, 0xF0, 0x85, 0x57, 0x82, 0x85, 0x56,
586 0x83, 0xE0, 0x30, 0xE3, 0x01, 0x09, 0x1E, 0x80,
587/*10F0*/0xD4, 0xC2, 0x34, 0xE9, 0xC3, 0x95, 0x54, 0x40,
588 0x02, 0xD2, 0x34, 0x22, 0x02, 0x00, 0x06, 0x22,
589/*1100*/0x30, 0x30, 0x11, 0x90, 0x10, 0x00, 0xE4, 0x93,
590 0xF5, 0x10, 0x90, 0x10, 0x10, 0xE4, 0x93, 0xF5,
591/*1110*/0x10, 0x12, 0x10, 0x90, 0x12, 0x11, 0x50, 0x22,
592 0xE4, 0xFC, 0xC3, 0xED, 0x9F, 0xFA, 0xEF, 0xF5,
593/*1120*/0x83, 0x75, 0x82, 0x00, 0x79, 0xFF, 0xE4, 0x93,
594 0xCC, 0x6C, 0xCC, 0xA3, 0xD9, 0xF8, 0xDA, 0xF6,
595/*1130*/0xE5, 0xE2, 0x30, 0xE4, 0x02, 0x8C, 0xE5, 0xED,
596 0x24, 0xFF, 0xFF, 0xEF, 0x75, 0x82, 0xFF, 0xF5,
597/*1140*/0x83, 0xE4, 0x93, 0x6C, 0x70, 0x03, 0x7F, 0x01,
598 0x22, 0x7F, 0x00, 0x22, 0x22, 0x11, 0x00, 0x00,
599/*1150*/0x22, 0x8E, 0x58, 0x8F, 0x59, 0x8C, 0x5A, 0x8D,
600 0x5B, 0x8A, 0x5C, 0x8B, 0x5D, 0x75, 0x5E, 0x01,
601/*1160*/0xE4, 0xF5, 0x5F, 0xF5, 0x60, 0xF5, 0x62, 0x12,
602 0x07, 0x2A, 0x75, 0x83, 0xD0, 0xE0, 0xFF, 0xC4,
603/*1170*/0x54, 0x0F, 0xF5, 0x61, 0x12, 0x1E, 0xA5, 0x85,
604 0x59, 0x5E, 0xD3, 0xE5, 0x5E, 0x95, 0x5B, 0xE5,
605/*1180*/0x5A, 0x12, 0x07, 0x6B, 0x50, 0x4B, 0x12, 0x07,
606 0x03, 0x75, 0x83, 0xBC, 0xE0, 0x45, 0x5E, 0x12,
607/*1190*/0x07, 0x29, 0x75, 0x83, 0xBE, 0xE0, 0x45, 0x5E,
608 0x12, 0x07, 0x29, 0x75, 0x83, 0xC0, 0xE0, 0x45,
609/*11A0*/0x5E, 0xF0, 0xAF, 0x5F, 0xE5, 0x60, 0x12, 0x08,
610 0x78, 0x12, 0x0A, 0xFF, 0xAF, 0x62, 0x7E, 0x00,
611/*11B0*/0xAD, 0x5D, 0xAC, 0x5C, 0x12, 0x04, 0x44, 0xE5,
612 0x61, 0xAF, 0x5E, 0x7E, 0x00, 0xB4, 0x03, 0x05,
613/*11C0*/0x12, 0x1E, 0x21, 0x80, 0x07, 0xAD, 0x5D, 0xAC,
614 0x5C, 0x12, 0x13, 0x17, 0x05, 0x5E, 0x02, 0x11,
615/*11D0*/0x7A, 0x12, 0x07, 0x03, 0x75, 0x83, 0xBC, 0xE0,
616 0x45, 0x40, 0x12, 0x07, 0x29, 0x75, 0x83, 0xBE,
617/*11E0*/0xE0, 0x45, 0x40, 0x12, 0x07, 0x29, 0x75, 0x83,
618 0xC0, 0xE0, 0x45, 0x40, 0xF0, 0x22, 0x8E, 0x58,
619/*11F0*/0x8F, 0x59, 0x75, 0x5A, 0x01, 0x79, 0x01, 0x75,
620 0x5B, 0x01, 0xE4, 0xFB, 0x12, 0x07, 0x2A, 0x75,
621/*1200*/0x83, 0xAE, 0xE0, 0x54, 0x1A, 0xFF, 0x12, 0x08,
622 0x65, 0xE0, 0xC4, 0x13, 0x54, 0x07, 0xFE, 0xEF,
623/*1210*/0x70, 0x0C, 0xEE, 0x65, 0x35, 0x70, 0x07, 0x90,
624 0x07, 0x2F, 0xE0, 0xB4, 0x01, 0x0D, 0xAF, 0x35,
625/*1220*/0x7E, 0x00, 0x12, 0x0E, 0xA9, 0xCF, 0xEB, 0xCF,
626 0x02, 0x1E, 0x60, 0xE5, 0x59, 0x64, 0x02, 0x45,
627/*1230*/0x58, 0x70, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F,
628 0x00, 0xE5, 0x59, 0x45, 0x58, 0x70, 0x04, 0x7E,
629/*1240*/0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x60,
630 0x23, 0x85, 0x41, 0x49, 0x85, 0x40, 0x4B, 0xE5,
631/*1250*/0x59, 0x45, 0x58, 0x70, 0x2C, 0xAF, 0x5A, 0xFE,
632 0xCD, 0xE9, 0xCD, 0xFC, 0xAB, 0x59, 0xAA, 0x58,
633/*1260*/0x12, 0x0A, 0xFF, 0xAF, 0x5B, 0x7E, 0x00, 0x12,
634 0x1E, 0x60, 0x80, 0x15, 0xAF, 0x5B, 0x7E, 0x00,
635/*1270*/0x12, 0x1E, 0x60, 0x90, 0x07, 0x26, 0x12, 0x07,
636 0x35, 0xE5, 0x49, 0x12, 0x07, 0x31, 0xE5, 0x4B,
637/*1280*/0xF0, 0xE4, 0xFD, 0xAF, 0x35, 0xFE, 0xFC, 0x12,
638 0x09, 0x15, 0x22, 0x8C, 0x64, 0x8D, 0x65, 0x12,
639/*1290*/0x08, 0xDA, 0x40, 0x3C, 0xE5, 0x65, 0x45, 0x64,
640 0x70, 0x10, 0x12, 0x09, 0x04, 0xC3, 0xE5, 0x3E,
641/*12A0*/0x12, 0x07, 0x69, 0x40, 0x3B, 0x12, 0x08, 0x95,
642 0x80, 0x18, 0xE5, 0x3E, 0xC3, 0x95, 0x38, 0x40,
643/*12B0*/0x1D, 0x85, 0x3E, 0x38, 0xE5, 0x3E, 0x60, 0x05,
644 0x85, 0x3F, 0x39, 0x80, 0x03, 0x85, 0x39, 0x39,
645/*12C0*/0x8F, 0x3A, 0x12, 0x07, 0xA8, 0xE5, 0x3E, 0x12,
646 0x07, 0x53, 0xE5, 0x3F, 0xF0, 0x22, 0x80, 0x3B,
647/*12D0*/0xE5, 0x65, 0x45, 0x64, 0x70, 0x11, 0x12, 0x07,
648 0x5F, 0x40, 0x05, 0x12, 0x08, 0x9E, 0x80, 0x1F,
649/*12E0*/0x12, 0x07, 0x3E, 0xE5, 0x41, 0xF0, 0x22, 0xE5,
650 0x3C, 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3C,
651/*12F0*/0x38, 0xE5, 0x3C, 0x60, 0x05, 0x85, 0x3D, 0x39,
652 0x80, 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12,
653/*1300*/0x07, 0xA8, 0xE5, 0x3C, 0x12, 0x07, 0x53, 0xE5,
654 0x3D, 0xF0, 0x22, 0x12, 0x07, 0x9F, 0xE5, 0x38,
655/*1310*/0x12, 0x07, 0x53, 0xE5, 0x39, 0xF0, 0x22, 0x8C,
656 0x63, 0x8D, 0x64, 0x12, 0x08, 0xDA, 0x40, 0x3C,
657/*1320*/0xE5, 0x64, 0x45, 0x63, 0x70, 0x10, 0x12, 0x09,
658 0x04, 0xC3, 0xE5, 0x3E, 0x12, 0x07, 0x69, 0x40,
659/*1330*/0x3B, 0x12, 0x08, 0x95, 0x80, 0x18, 0xE5, 0x3E,
660 0xC3, 0x95, 0x38, 0x40, 0x1D, 0x85, 0x3E, 0x38,
661/*1340*/0xE5, 0x3E, 0x60, 0x05, 0x85, 0x3F, 0x39, 0x80,
662 0x03, 0x85, 0x39, 0x39, 0x8F, 0x3A, 0x12, 0x07,
663/*1350*/0xA8, 0xE5, 0x3E, 0x12, 0x07, 0x53, 0xE5, 0x3F,
664 0xF0, 0x22, 0x80, 0x3B, 0xE5, 0x64, 0x45, 0x63,
665/*1360*/0x70, 0x11, 0x12, 0x07, 0x5F, 0x40, 0x05, 0x12,
666 0x08, 0x9E, 0x80, 0x1F, 0x12, 0x07, 0x3E, 0xE5,
667/*1370*/0x41, 0xF0, 0x22, 0xE5, 0x3C, 0xC3, 0x95, 0x38,
668 0x40, 0x1D, 0x85, 0x3C, 0x38, 0xE5, 0x3C, 0x60,
669/*1380*/0x05, 0x85, 0x3D, 0x39, 0x80, 0x03, 0x85, 0x39,
670 0x39, 0x8F, 0x3A, 0x12, 0x07, 0xA8, 0xE5, 0x3C,
671/*1390*/0x12, 0x07, 0x53, 0xE5, 0x3D, 0xF0, 0x22, 0x12,
672 0x07, 0x9F, 0xE5, 0x38, 0x12, 0x07, 0x53, 0xE5,
673/*13A0*/0x39, 0xF0, 0x22, 0xE5, 0x0D, 0xFE, 0xE5, 0x08,
674 0x8E, 0x54, 0x44, 0x05, 0xF5, 0x55, 0x75, 0x15,
675/*13B0*/0x0F, 0xF5, 0x82, 0x12, 0x0E, 0x7A, 0x12, 0x17,
676 0xA3, 0x20, 0x31, 0x05, 0x75, 0x15, 0x03, 0x80,
677/*13C0*/0x03, 0x75, 0x15, 0x0B, 0xE5, 0x0A, 0xC3, 0x94,
678 0x01, 0x50, 0x38, 0x12, 0x14, 0x20, 0x20, 0x31,
679/*13D0*/0x06, 0x05, 0x15, 0x05, 0x15, 0x80, 0x04, 0x15,
680 0x15, 0x15, 0x15, 0xE5, 0x0A, 0xC3, 0x94, 0x01,
681/*13E0*/0x50, 0x21, 0x12, 0x14, 0x20, 0x20, 0x31, 0x04,
682 0x05, 0x15, 0x80, 0x02, 0x15, 0x15, 0xE5, 0x0A,
683/*13F0*/0xC3, 0x94, 0x01, 0x50, 0x0E, 0x12, 0x0E, 0x77,
684 0x12, 0x17, 0xA3, 0x20, 0x31, 0x05, 0x05, 0x15,
685/*1400*/0x12, 0x0E, 0x77, 0xE5, 0x15, 0xB4, 0x08, 0x04,
686 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x15,
687/*1410*/0xB4, 0x07, 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E,
688 0x00, 0xEE, 0x4F, 0x60, 0x02, 0x05, 0x7F, 0x22,
689/*1420*/0x85, 0x55, 0x82, 0x85, 0x54, 0x83, 0xE5, 0x15,
690 0xF0, 0x12, 0x17, 0xA3, 0x22, 0x12, 0x07, 0x2A,
691/*1430*/0x75, 0x83, 0xAE, 0x74, 0xFF, 0x12, 0x07, 0x29,
692 0xE0, 0x54, 0x1A, 0xF5, 0x34, 0xE0, 0xC4, 0x13,
693/*1440*/0x54, 0x07, 0xF5, 0x35, 0x24, 0xFE, 0x60, 0x24,
694 0x24, 0xFE, 0x60, 0x3C, 0x24, 0x04, 0x70, 0x63,
695/*1450*/0x75, 0x31, 0x2D, 0xE5, 0x08, 0xFD, 0x74, 0xB6,
696 0x12, 0x07, 0x92, 0x74, 0xBC, 0x90, 0x07, 0x22,
697/*1460*/0x12, 0x07, 0x95, 0x74, 0x90, 0x12, 0x07, 0xB3,
698 0x74, 0x92, 0x80, 0x3C, 0x75, 0x31, 0x3A, 0xE5,
699/*1470*/0x08, 0xFD, 0x74, 0xBA, 0x12, 0x07, 0x92, 0x74,
700 0xC0, 0x90, 0x07, 0x22, 0x12, 0x07, 0xB6, 0x74,
701/*1480*/0xC4, 0x12, 0x07, 0xB3, 0x74, 0xC8, 0x80, 0x20,
702 0x75, 0x31, 0x35, 0xE5, 0x08, 0xFD, 0x74, 0xB8,
703/*1490*/0x12, 0x07, 0x92, 0x74, 0xBE, 0xFF, 0xED, 0x44,
704 0x07, 0x90, 0x07, 0x22, 0xCF, 0xF0, 0xA3, 0xEF,
705/*14A0*/0xF0, 0x74, 0xC2, 0x12, 0x07, 0xB3, 0x74, 0xC6,
706 0xFF, 0xED, 0x44, 0x07, 0xA3, 0xCF, 0xF0, 0xA3,
707/*14B0*/0xEF, 0xF0, 0x22, 0x75, 0x34, 0x01, 0x22, 0x8E,
708 0x58, 0x8F, 0x59, 0x8C, 0x5A, 0x8D, 0x5B, 0x8A,
709/*14C0*/0x5C, 0x8B, 0x5D, 0x75, 0x5E, 0x01, 0xE4, 0xF5,
710 0x5F, 0x12, 0x1E, 0xA5, 0x85, 0x59, 0x5E, 0xD3,
711/*14D0*/0xE5, 0x5E, 0x95, 0x5B, 0xE5, 0x5A, 0x12, 0x07,
712 0x6B, 0x50, 0x57, 0xE5, 0x5D, 0x45, 0x5C, 0x70,
713/*14E0*/0x30, 0x12, 0x07, 0x2A, 0x75, 0x83, 0x92, 0xE5,
714 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC6, 0xE5,
715/*14F0*/0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC8, 0xE5,
716 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0x90, 0xE5,
717/*1500*/0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2, 0xE5,
718 0x5E, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0x80,
719/*1510*/0x03, 0x12, 0x07, 0x32, 0xE5, 0x5E, 0xF0, 0xAF,
720 0x5F, 0x7E, 0x00, 0xAD, 0x5D, 0xAC, 0x5C, 0x12,
721/*1520*/0x04, 0x44, 0xAF, 0x5E, 0x7E, 0x00, 0xAD, 0x5D,
722 0xAC, 0x5C, 0x12, 0x0B, 0xD1, 0x05, 0x5E, 0x02,
723/*1530*/0x14, 0xCF, 0xAB, 0x5D, 0xAA, 0x5C, 0xAD, 0x5B,
724 0xAC, 0x5A, 0xAF, 0x59, 0xAE, 0x58, 0x02, 0x1B,
725/*1540*/0xFB, 0x8C, 0x5C, 0x8D, 0x5D, 0x8A, 0x5E, 0x8B,
726 0x5F, 0x75, 0x60, 0x01, 0xE4, 0xF5, 0x61, 0xF5,
727/*1550*/0x62, 0xF5, 0x63, 0x12, 0x1E, 0xA5, 0x8F, 0x60,
728 0xD3, 0xE5, 0x60, 0x95, 0x5D, 0xE5, 0x5C, 0x12,
729/*1560*/0x07, 0x6B, 0x50, 0x61, 0xE5, 0x5F, 0x45, 0x5E,
730 0x70, 0x27, 0x12, 0x07, 0x2A, 0x75, 0x83, 0xB6,
731/*1570*/0xE5, 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0xB8,
732 0xE5, 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0xBA,
733/*1580*/0xE5, 0x60, 0xF0, 0xAF, 0x61, 0x7E, 0x00, 0xE5,
734 0x62, 0x12, 0x08, 0x7A, 0x12, 0x0A, 0xFF, 0x80,
735/*1590*/0x19, 0x90, 0x07, 0x24, 0x12, 0x07, 0x35, 0xE5,
736 0x60, 0x12, 0x07, 0x29, 0x75, 0x83, 0x8E, 0xE4,
737/*15A0*/0x12, 0x07, 0x29, 0x74, 0x01, 0x12, 0x07, 0x29,
738 0xE4, 0xF0, 0xAF, 0x63, 0x7E, 0x00, 0xAD, 0x5F,
739/*15B0*/0xAC, 0x5E, 0x12, 0x04, 0x44, 0xAF, 0x60, 0x7E,
740 0x00, 0xAD, 0x5F, 0xAC, 0x5E, 0x12, 0x12, 0x8B,
741/*15C0*/0x05, 0x60, 0x02, 0x15, 0x58, 0x22, 0x90, 0x11,
742 0x4D, 0xE4, 0x93, 0x90, 0x07, 0x2E, 0xF0, 0x12,
743/*15D0*/0x08, 0x1F, 0x75, 0x83, 0xAE, 0xE0, 0x54, 0x1A,
744 0xF5, 0x34, 0x70, 0x67, 0xEF, 0x44, 0x07, 0xF5,
745/*15E0*/0x82, 0x75, 0x83, 0xCE, 0xE0, 0xFF, 0x13, 0x13,
746 0x13, 0x54, 0x07, 0xF5, 0x36, 0x54, 0x0F, 0xD3,
747/*15F0*/0x94, 0x00, 0x40, 0x06, 0x12, 0x14, 0x2D, 0x12,
748 0x1B, 0xA9, 0xE5, 0x36, 0x54, 0x0F, 0x24, 0xFE,
749/*1600*/0x60, 0x0C, 0x14, 0x60, 0x0C, 0x14, 0x60, 0x19,
750 0x24, 0x03, 0x70, 0x37, 0x80, 0x10, 0x02, 0x1E,
751/*1610*/0x91, 0x12, 0x1E, 0x91, 0x12, 0x07, 0x2A, 0x75,
752 0x83, 0xCE, 0xE0, 0x54, 0xEF, 0xF0, 0x02, 0x1D,
753/*1620*/0xAE, 0x12, 0x10, 0x14, 0xE4, 0xF5, 0x55, 0x12,
754 0x1D, 0x85, 0x05, 0x55, 0xE5, 0x55, 0xC3, 0x94,
755/*1630*/0x05, 0x40, 0xF4, 0x12, 0x07, 0x2A, 0x75, 0x83,
756 0xCE, 0xE0, 0x54, 0xC7, 0x12, 0x07, 0x29, 0xE0,
757/*1640*/0x44, 0x08, 0xF0, 0x22, 0xE4, 0xF5, 0x58, 0xF5,
758 0x59, 0xAF, 0x08, 0xEF, 0x44, 0x07, 0xF5, 0x82,
759/*1650*/0x75, 0x83, 0xD0, 0xE0, 0xFD, 0xC4, 0x54, 0x0F,
760 0xF5, 0x5A, 0xEF, 0x44, 0x07, 0xF5, 0x82, 0x75,
761/*1660*/0x83, 0x80, 0x74, 0x01, 0xF0, 0x12, 0x08, 0x21,
762 0x75, 0x83, 0x82, 0xE5, 0x45, 0xF0, 0xEF, 0x44,
763/*1670*/0x07, 0xF5, 0x82, 0x75, 0x83, 0x8A, 0x74, 0xFF,
764 0xF0, 0x12, 0x1A, 0x4D, 0x12, 0x07, 0x2A, 0x75,
765/*1680*/0x83, 0xBC, 0xE0, 0x54, 0xEF, 0x12, 0x07, 0x29,
766 0x75, 0x83, 0xBE, 0xE0, 0x54, 0xEF, 0x12, 0x07,
767/*1690*/0x29, 0x75, 0x83, 0xC0, 0xE0, 0x54, 0xEF, 0x12,
768 0x07, 0x29, 0x75, 0x83, 0xBC, 0xE0, 0x44, 0x10,
769/*16A0*/0x12, 0x07, 0x29, 0x75, 0x83, 0xBE, 0xE0, 0x44,
770 0x10, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC0, 0xE0,
771/*16B0*/0x44, 0x10, 0xF0, 0xAF, 0x58, 0xE5, 0x59, 0x12,
772 0x08, 0x78, 0x02, 0x0A, 0xFF, 0xE4, 0xF5, 0x58,
773/*16C0*/0x7D, 0x01, 0xF5, 0x59, 0xAF, 0x35, 0xFE, 0xFC,
774 0x12, 0x09, 0x15, 0x12, 0x07, 0x2A, 0x75, 0x83,
775/*16D0*/0xB6, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
776 0xB8, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
777/*16E0*/0xBA, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
778 0xBC, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
779/*16F0*/0xBE, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
780 0xC0, 0x74, 0x10, 0x12, 0x07, 0x29, 0x75, 0x83,
781/*1700*/0x90, 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC2,
782 0xE4, 0x12, 0x07, 0x29, 0x75, 0x83, 0xC4, 0xE4,
783/*1710*/0x12, 0x07, 0x29, 0x75, 0x83, 0x92, 0xE4, 0x12,
784 0x07, 0x29, 0x75, 0x83, 0xC6, 0xE4, 0x12, 0x07,
785/*1720*/0x29, 0x75, 0x83, 0xC8, 0xE4, 0xF0, 0xAF, 0x58,
786 0xFE, 0xE5, 0x59, 0x12, 0x08, 0x7A, 0x02, 0x0A,
787/*1730*/0xFF, 0xE5, 0xE2, 0x30, 0xE4, 0x6C, 0xE5, 0xE7,
788 0x54, 0xC0, 0x64, 0x40, 0x70, 0x64, 0xE5, 0x09,
789/*1740*/0xC4, 0x54, 0x30, 0xFE, 0xE5, 0x08, 0x25, 0xE0,
790 0x25, 0xE0, 0x54, 0xC0, 0x4E, 0xFE, 0xEF, 0x54,
791/*1750*/0x3F, 0x4E, 0xFD, 0xE5, 0x2B, 0xAE, 0x2A, 0x78,
792 0x02, 0xC3, 0x33, 0xCE, 0x33, 0xCE, 0xD8, 0xF9,
793/*1760*/0xF5, 0x82, 0x8E, 0x83, 0xED, 0xF0, 0xE5, 0x2B,
794 0xAE, 0x2A, 0x78, 0x02, 0xC3, 0x33, 0xCE, 0x33,
795/*1770*/0xCE, 0xD8, 0xF9, 0xFF, 0xF5, 0x82, 0x8E, 0x83,
796 0xA3, 0xE5, 0xFE, 0xF0, 0x8F, 0x82, 0x8E, 0x83,
797/*1780*/0xA3, 0xA3, 0xE5, 0xFD, 0xF0, 0x8F, 0x82, 0x8E,
798 0x83, 0xA3, 0xA3, 0xA3, 0xE5, 0xFC, 0xF0, 0xC3,
799/*1790*/0xE5, 0x2B, 0x94, 0xFA, 0xE5, 0x2A, 0x94, 0x00,
800 0x50, 0x08, 0x05, 0x2B, 0xE5, 0x2B, 0x70, 0x02,
801/*17A0*/0x05, 0x2A, 0x22, 0xE4, 0xFF, 0xE4, 0xF5, 0x58,
802 0xF5, 0x56, 0xF5, 0x57, 0x74, 0x82, 0xFC, 0x12,
803/*17B0*/0x0E, 0x04, 0x8C, 0x83, 0xE0, 0xF5, 0x10, 0x54,
804 0x7F, 0xF0, 0xE5, 0x10, 0x44, 0x80, 0x12, 0x0E,
805/*17C0*/0x98, 0xED, 0xF0, 0x7E, 0x0A, 0x12, 0x0E, 0x04,
806 0x75, 0x83, 0xA0, 0xE0, 0x20, 0xE0, 0x26, 0xDE,
807/*17D0*/0xF4, 0x05, 0x57, 0xE5, 0x57, 0x70, 0x02, 0x05,
808 0x56, 0xE5, 0x14, 0x24, 0x01, 0xFD, 0xE4, 0x33,
809/*17E0*/0xFC, 0xD3, 0xE5, 0x57, 0x9D, 0xE5, 0x56, 0x9C,
810 0x40, 0xD9, 0xE5, 0x0A, 0x94, 0x20, 0x50, 0x02,
811/*17F0*/0x05, 0x0A, 0x43, 0xE1, 0x08, 0xC2, 0x31, 0x12,
812 0x0E, 0x04, 0x75, 0x83, 0xA6, 0xE0, 0x55, 0x12,
813/*1800*/0x65, 0x12, 0x70, 0x03, 0xD2, 0x31, 0x22, 0xC2,
814 0x31, 0x22, 0x90, 0x07, 0x26, 0xE0, 0xFA, 0xA3,
815/*1810*/0xE0, 0xF5, 0x82, 0x8A, 0x83, 0xE0, 0xF5, 0x41,
816 0xE5, 0x39, 0xC3, 0x95, 0x41, 0x40, 0x26, 0xE5,
817/*1820*/0x39, 0x95, 0x41, 0xC3, 0x9F, 0xEE, 0x12, 0x07,
818 0x6B, 0x40, 0x04, 0x7C, 0x01, 0x80, 0x02, 0x7C,
819/*1830*/0x00, 0xE5, 0x41, 0x64, 0x3F, 0x60, 0x04, 0x7B,
820 0x01, 0x80, 0x02, 0x7B, 0x00, 0xEC, 0x5B, 0x60,
821/*1840*/0x29, 0x05, 0x41, 0x80, 0x28, 0xC3, 0xE5, 0x41,
822 0x95, 0x39, 0xC3, 0x9F, 0xEE, 0x12, 0x07, 0x6B,
823/*1850*/0x40, 0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00,
824 0xE5, 0x41, 0x60, 0x04, 0x7E, 0x01, 0x80, 0x02,
825/*1860*/0x7E, 0x00, 0xEF, 0x5E, 0x60, 0x04, 0x15, 0x41,
826 0x80, 0x03, 0x85, 0x39, 0x41, 0x85, 0x3A, 0x40,
827/*1870*/0x22, 0xE5, 0xE2, 0x30, 0xE4, 0x60, 0xE5, 0xE1,
828 0x30, 0xE2, 0x5B, 0xE5, 0x09, 0x70, 0x04, 0x7F,
829/*1880*/0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5, 0x08, 0x70,
830 0x04, 0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE,
831/*1890*/0x5F, 0x60, 0x43, 0x53, 0xF9, 0xF8, 0xE5, 0xE2,
832 0x30, 0xE4, 0x3B, 0xE5, 0xE1, 0x30, 0xE2, 0x2E,
833/*18A0*/0x43, 0xFA, 0x02, 0x53, 0xFA, 0xFB, 0xE4, 0xF5,
834 0x10, 0x90, 0x94, 0x70, 0xE5, 0x10, 0xF0, 0xE5,
835/*18B0*/0xE1, 0x30, 0xE2, 0xE7, 0x90, 0x94, 0x70, 0xE0,
836 0x65, 0x10, 0x60, 0x03, 0x43, 0xFA, 0x04, 0x05,
837/*18C0*/0x10, 0x90, 0x94, 0x70, 0xE5, 0x10, 0xF0, 0x70,
838 0xE6, 0x12, 0x00, 0x06, 0x80, 0xE1, 0x53, 0xFA,
839/*18D0*/0xFD, 0x53, 0xFA, 0xFB, 0x80, 0xC0, 0x22, 0x8F,
840 0x54, 0x12, 0x00, 0x06, 0xE5, 0xE1, 0x30, 0xE0,
841/*18E0*/0x04, 0x7F, 0x01, 0x80, 0x02, 0x7F, 0x00, 0xE5,
842 0x7E, 0xD3, 0x94, 0x05, 0x40, 0x04, 0x7E, 0x01,
843/*18F0*/0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F, 0x60, 0x3D,
844 0x85, 0x54, 0x11, 0xE5, 0xE2, 0x20, 0xE1, 0x32,
845/*1900*/0x74, 0xCE, 0x12, 0x1A, 0x05, 0x30, 0xE7, 0x04,
846 0x7D, 0x01, 0x80, 0x02, 0x7D, 0x00, 0x8F, 0x82,
847/*1910*/0x8E, 0x83, 0xE0, 0x30, 0xE6, 0x04, 0x7F, 0x01,
848 0x80, 0x02, 0x7F, 0x00, 0xEF, 0x5D, 0x70, 0x15,
849/*1920*/0x12, 0x15, 0xC6, 0x74, 0xCE, 0x12, 0x1A, 0x05,
850 0x30, 0xE6, 0x07, 0xE0, 0x44, 0x80, 0xF0, 0x43,
851/*1930*/0xF9, 0x80, 0x12, 0x18, 0x71, 0x22, 0x12, 0x0E,
852 0x44, 0xE5, 0x16, 0x25, 0xE0, 0x25, 0xE0, 0x24,
853/*1940*/0xB0, 0xF5, 0x82, 0xE4, 0x34, 0x1A, 0xF5, 0x83,
854 0xE4, 0x93, 0xF5, 0x0F, 0xE5, 0x16, 0x25, 0xE0,
855/*1950*/0x25, 0xE0, 0x24, 0xB1, 0xF5, 0x82, 0xE4, 0x34,
856 0x1A, 0xF5, 0x83, 0xE4, 0x93, 0xF5, 0x0E, 0x12,
857/*1960*/0x0E, 0x65, 0xF5, 0x10, 0xE5, 0x0F, 0x54, 0xF0,
858 0x12, 0x0E, 0x17, 0x75, 0x83, 0x8C, 0xEF, 0xF0,
859/*1970*/0xE5, 0x0F, 0x30, 0xE0, 0x0C, 0x12, 0x0E, 0x04,
860 0x75, 0x83, 0x86, 0xE0, 0x44, 0x40, 0xF0, 0x80,
861/*1980*/0x0A, 0x12, 0x0E, 0x04, 0x75, 0x83, 0x86, 0xE0,
862 0x54, 0xBF, 0xF0, 0x12, 0x0E, 0x91, 0x75, 0x83,
863/*1990*/0x82, 0xE5, 0x0E, 0xF0, 0x22, 0x7F, 0x05, 0x12,
864 0x17, 0x31, 0x12, 0x0E, 0x04, 0x12, 0x0E, 0x33,
865/*19A0*/0x74, 0x02, 0xF0, 0x74, 0x8E, 0xFE, 0x12, 0x0E,
866 0x04, 0x12, 0x0E, 0x0B, 0xEF, 0xF0, 0x75, 0x15,
867/*19B0*/0x70, 0x12, 0x0F, 0xF7, 0x20, 0x34, 0x05, 0x75,
868 0x15, 0x10, 0x80, 0x03, 0x75, 0x15, 0x50, 0x12,
869/*19C0*/0x0F, 0xF7, 0x20, 0x34, 0x04, 0x74, 0x10, 0x80,
870 0x02, 0x74, 0xF0, 0x25, 0x15, 0xF5, 0x15, 0x12,
871/*19D0*/0x0E, 0x21, 0xEF, 0xF0, 0x12, 0x10, 0x91, 0x20,
872 0x34, 0x17, 0xE5, 0x15, 0x64, 0x30, 0x60, 0x0C,
873/*19E0*/0x74, 0x10, 0x25, 0x15, 0xF5, 0x15, 0xB4, 0x80,
874 0x03, 0xE4, 0xF5, 0x15, 0x12, 0x0E, 0x21, 0xEF,
875/*19F0*/0xF0, 0x22, 0xF0, 0xE5, 0x0B, 0x25, 0xE0, 0x25,
876 0xE0, 0x24, 0x82, 0xF5, 0x82, 0xE4, 0x34, 0x07,
877/*1A00*/0xF5, 0x83, 0x22, 0x74, 0x88, 0xFE, 0xE5, 0x08,
878 0x44, 0x07, 0xFF, 0xF5, 0x82, 0x8E, 0x83, 0xE0,
879/*1A10*/0x22, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0xF5, 0x82,
880 0x22, 0xF0, 0xE0, 0x54, 0xC0, 0x8F, 0x82, 0x8E,
881/*1A20*/0x83, 0xF0, 0x22, 0xEF, 0x44, 0x07, 0xF5, 0x82,
882 0x75, 0x83, 0x86, 0xE0, 0x54, 0x10, 0xD3, 0x94,
883/*1A30*/0x00, 0x22, 0xF0, 0x90, 0x07, 0x15, 0xE0, 0x04,
884 0xF0, 0x22, 0x44, 0x06, 0xF5, 0x82, 0x75, 0x83,
885/*1A40*/0x9E, 0xE0, 0x22, 0xFE, 0xEF, 0x44, 0x07, 0xF5,
886 0x82, 0x8E, 0x83, 0xE0, 0x22, 0xE4, 0x90, 0x07,
887/*1A50*/0x2A, 0xF0, 0xA3, 0xF0, 0x12, 0x07, 0x2A, 0x75,
888 0x83, 0x82, 0xE0, 0x54, 0x7F, 0x12, 0x07, 0x29,
889/*1A60*/0xE0, 0x44, 0x80, 0xF0, 0x12, 0x10, 0xFC, 0x12,
890 0x08, 0x1F, 0x75, 0x83, 0xA0, 0xE0, 0x20, 0xE0,
891/*1A70*/0x1A, 0x90, 0x07, 0x2B, 0xE0, 0x04, 0xF0, 0x70,
892 0x06, 0x90, 0x07, 0x2A, 0xE0, 0x04, 0xF0, 0x90,
893/*1A80*/0x07, 0x2A, 0xE0, 0xB4, 0x10, 0xE1, 0xA3, 0xE0,
894 0xB4, 0x00, 0xDC, 0xEE, 0x44, 0xA6, 0xFC, 0xEF,
895/*1A90*/0x44, 0x07, 0xF5, 0x82, 0x8C, 0x83, 0xE0, 0xF5,
896 0x32, 0xEE, 0x44, 0xA8, 0xFE, 0xEF, 0x44, 0x07,
897/*1AA0*/0xF5, 0x82, 0x8E, 0x83, 0xE0, 0xF5, 0x33, 0x22,
898 0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x90,
899/*1AB0*/0x00, 0x20, 0x0F, 0x92, 0x00, 0x21, 0x0F, 0x94,
900 0x00, 0x22, 0x0F, 0x96, 0x00, 0x23, 0x0F, 0x98,
901/*1AC0*/0x00, 0x24, 0x0F, 0x9A, 0x00, 0x25, 0x0F, 0x9C,
902 0x00, 0x26, 0x0F, 0x9E, 0x00, 0x27, 0x0F, 0xA0,
903/*1AD0*/0x01, 0x20, 0x01, 0xA2, 0x01, 0x21, 0x01, 0xA4,
904 0x01, 0x22, 0x01, 0xA6, 0x01, 0x23, 0x01, 0xA8,
905/*1AE0*/0x01, 0x24, 0x01, 0xAA, 0x01, 0x25, 0x01, 0xAC,
906 0x01, 0x26, 0x01, 0xAE, 0x01, 0x27, 0x01, 0xB0,
907/*1AF0*/0x01, 0x28, 0x01, 0xB4, 0x00, 0x28, 0x0F, 0xB6,
908 0x40, 0x28, 0x0F, 0xB8, 0x61, 0x28, 0x01, 0xCB,
909/*1B00*/0xEF, 0xCB, 0xCA, 0xEE, 0xCA, 0x7F, 0x01, 0xE4,
910 0xFD, 0xEB, 0x4A, 0x70, 0x24, 0xE5, 0x08, 0xF5,
911/*1B10*/0x82, 0x74, 0xB6, 0x12, 0x08, 0x29, 0xE5, 0x08,
912 0xF5, 0x82, 0x74, 0xB8, 0x12, 0x08, 0x29, 0xE5,
913/*1B20*/0x08, 0xF5, 0x82, 0x74, 0xBA, 0x12, 0x08, 0x29,
914 0x7E, 0x00, 0x7C, 0x00, 0x12, 0x0A, 0xFF, 0x80,
915/*1B30*/0x12, 0x90, 0x07, 0x26, 0x12, 0x07, 0x35, 0xE5,
916 0x41, 0xF0, 0x90, 0x07, 0x24, 0x12, 0x07, 0x35,
917/*1B40*/0xE5, 0x40, 0xF0, 0x12, 0x07, 0x2A, 0x75, 0x83,
918 0x8E, 0xE4, 0x12, 0x07, 0x29, 0x74, 0x01, 0x12,
919/*1B50*/0x07, 0x29, 0xE4, 0xF0, 0x22, 0xE4, 0xF5, 0x26,
920 0xF5, 0x27, 0x53, 0xE1, 0xFE, 0xF5, 0x2A, 0x75,
921/*1B60*/0x2B, 0x01, 0xF5, 0x08, 0x7F, 0x01, 0x12, 0x17,
922 0x31, 0x30, 0x30, 0x1C, 0x90, 0x1A, 0xA9, 0xE4,
923/*1B70*/0x93, 0xF5, 0x10, 0x90, 0x1F, 0xF9, 0xE4, 0x93,
924 0xF5, 0x10, 0x90, 0x00, 0x41, 0xE4, 0x93, 0xF5,
925/*1B80*/0x10, 0x90, 0x1E, 0xCA, 0xE4, 0x93, 0xF5, 0x10,
926 0x7F, 0x02, 0x12, 0x17, 0x31, 0x12, 0x0F, 0x54,
927/*1B90*/0x7F, 0x03, 0x12, 0x17, 0x31, 0x12, 0x00, 0x06,
928 0xE5, 0xE2, 0x30, 0xE7, 0x09, 0x12, 0x10, 0x00,
929/*1BA0*/0x30, 0x30, 0x03, 0x12, 0x11, 0x00, 0x02, 0x00,
930 0x47, 0x12, 0x08, 0x1F, 0x75, 0x83, 0xD0, 0xE0,
931/*1BB0*/0xC4, 0x54, 0x0F, 0xFD, 0x75, 0x43, 0x01, 0x75,
932 0x44, 0xFF, 0x12, 0x08, 0xAA, 0x74, 0x04, 0xF0,
933/*1BC0*/0x75, 0x3B, 0x01, 0xED, 0x14, 0x60, 0x0C, 0x14,
934 0x60, 0x0B, 0x14, 0x60, 0x0F, 0x24, 0x03, 0x70,
935/*1BD0*/0x0B, 0x80, 0x09, 0x80, 0x00, 0x12, 0x08, 0xA7,
936 0x04, 0xF0, 0x80, 0x06, 0x12, 0x08, 0xA7, 0x74,
937/*1BE0*/0x04, 0xF0, 0xEE, 0x44, 0x82, 0xFE, 0xEF, 0x44,
938 0x07, 0xF5, 0x82, 0x8E, 0x83, 0xE5, 0x45, 0x12,
939/*1BF0*/0x08, 0xBE, 0x75, 0x83, 0x82, 0xE5, 0x31, 0xF0,
940 0x02, 0x11, 0x4C, 0x8E, 0x60, 0x8F, 0x61, 0x12,
941/*1C00*/0x1E, 0xA5, 0xE4, 0xFF, 0xCE, 0xED, 0xCE, 0xEE,
942 0xD3, 0x95, 0x61, 0xE5, 0x60, 0x12, 0x07, 0x6B,
943/*1C10*/0x40, 0x39, 0x74, 0x20, 0x2E, 0xF5, 0x82, 0xE4,
944 0x34, 0x03, 0xF5, 0x83, 0xE0, 0x70, 0x03, 0xFF,
945/*1C20*/0x80, 0x26, 0x12, 0x08, 0xE2, 0xFD, 0xC3, 0x9F,
946 0x40, 0x1E, 0xCF, 0xED, 0xCF, 0xEB, 0x4A, 0x70,
947/*1C30*/0x0B, 0x8D, 0x42, 0x12, 0x08, 0xEE, 0xF5, 0x41,
948 0x8E, 0x40, 0x80, 0x0C, 0x12, 0x08, 0xE2, 0xF5,
949/*1C40*/0x38, 0x12, 0x08, 0xEE, 0xF5, 0x39, 0x8E, 0x3A,
950 0x1E, 0x80, 0xBC, 0x22, 0x75, 0x58, 0x01, 0xE5,
951/*1C50*/0x35, 0x70, 0x0C, 0x12, 0x07, 0xCC, 0xE0, 0xF5,
952 0x4A, 0x12, 0x07, 0xD8, 0xE0, 0xF5, 0x4C, 0xE5,
953/*1C60*/0x35, 0xB4, 0x04, 0x0C, 0x12, 0x07, 0xE4, 0xE0,
954 0xF5, 0x4A, 0x12, 0x07, 0xF0, 0xE0, 0xF5, 0x4C,
955/*1C70*/0xE5, 0x35, 0xB4, 0x01, 0x04, 0x7F, 0x01, 0x80,
956 0x02, 0x7F, 0x00, 0xE5, 0x35, 0xB4, 0x02, 0x04,
957/*1C80*/0x7E, 0x01, 0x80, 0x02, 0x7E, 0x00, 0xEE, 0x4F,
958 0x60, 0x0C, 0x12, 0x07, 0xFC, 0xE0, 0xF5, 0x4A,
959/*1C90*/0x12, 0x08, 0x08, 0xE0, 0xF5, 0x4C, 0x85, 0x41,
960 0x49, 0x85, 0x40, 0x4B, 0x22, 0x75, 0x5B, 0x01,
961/*1CA0*/0x90, 0x07, 0x24, 0x12, 0x07, 0x35, 0xE0, 0x54,
962 0x1F, 0xFF, 0xD3, 0x94, 0x02, 0x50, 0x04, 0x8F,
963/*1CB0*/0x58, 0x80, 0x05, 0xEF, 0x24, 0xFE, 0xF5, 0x58,
964 0xEF, 0xC3, 0x94, 0x18, 0x40, 0x05, 0x75, 0x59,
965/*1CC0*/0x18, 0x80, 0x04, 0xEF, 0x04, 0xF5, 0x59, 0x85,
966 0x43, 0x5A, 0xAF, 0x58, 0x7E, 0x00, 0xAD, 0x59,
967/*1CD0*/0x7C, 0x00, 0xAB, 0x5B, 0x7A, 0x00, 0x12, 0x15,
968 0x41, 0xAF, 0x5A, 0x7E, 0x00, 0x12, 0x18, 0x0A,
969/*1CE0*/0xAF, 0x5B, 0x7E, 0x00, 0x02, 0x1A, 0xFF, 0xE5,
970 0xE2, 0x30, 0xE7, 0x0E, 0x12, 0x10, 0x03, 0xC2,
971/*1CF0*/0x30, 0x30, 0x30, 0x03, 0x12, 0x10, 0xFF, 0x20,
972 0x33, 0x28, 0xE5, 0xE7, 0x30, 0xE7, 0x05, 0x12,
973/*1D00*/0x0E, 0xA2, 0x80, 0x0D, 0xE5, 0xFE, 0xC3, 0x94,
974 0x20, 0x50, 0x06, 0x12, 0x0E, 0xA2, 0x43, 0xF9,
975/*1D10*/0x08, 0xE5, 0xF2, 0x30, 0xE7, 0x03, 0x53, 0xF9,
976 0x7F, 0xE5, 0xF1, 0x54, 0x70, 0xD3, 0x94, 0x00,
977/*1D20*/0x50, 0xD8, 0x22, 0x12, 0x0E, 0x04, 0x75, 0x83,
978 0x80, 0xE4, 0xF0, 0xE5, 0x08, 0x44, 0x07, 0x12,
979/*1D30*/0x0D, 0xFD, 0x75, 0x83, 0x84, 0x12, 0x0E, 0x02,
980 0x75, 0x83, 0x86, 0x12, 0x0E, 0x02, 0x75, 0x83,
981/*1D40*/0x8C, 0xE0, 0x54, 0xF3, 0x12, 0x0E, 0x03, 0x75,
982 0x83, 0x8E, 0x12, 0x0E, 0x02, 0x75, 0x83, 0x94,
983/*1D50*/0xE0, 0x54, 0xFB, 0xF0, 0x22, 0x12, 0x07, 0x2A,
984 0x75, 0x83, 0x8E, 0xE4, 0x12, 0x07, 0x29, 0x74,
985/*1D60*/0x01, 0x12, 0x07, 0x29, 0xE4, 0x12, 0x08, 0xBE,
986 0x75, 0x83, 0x8C, 0xE0, 0x44, 0x20, 0x12, 0x08,
987/*1D70*/0xBE, 0xE0, 0x54, 0xDF, 0xF0, 0x74, 0x84, 0x85,
988 0x08, 0x82, 0xF5, 0x83, 0xE0, 0x54, 0x7F, 0xF0,
989/*1D80*/0xE0, 0x44, 0x80, 0xF0, 0x22, 0x75, 0x56, 0x01,
990 0xE4, 0xFD, 0xF5, 0x57, 0xAF, 0x35, 0xFE, 0xFC,
991/*1D90*/0x12, 0x09, 0x15, 0x12, 0x1C, 0x9D, 0x12, 0x1E,
992 0x7A, 0x12, 0x1C, 0x4C, 0xAF, 0x57, 0x7E, 0x00,
993/*1DA0*/0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44, 0xAF,
994 0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0x75, 0x56,
995/*1DB0*/0x01, 0xE4, 0xFD, 0xF5, 0x57, 0xAF, 0x35, 0xFE,
996 0xFC, 0x12, 0x09, 0x15, 0x12, 0x1C, 0x9D, 0x12,
997/*1DC0*/0x1E, 0x7A, 0x12, 0x1C, 0x4C, 0xAF, 0x57, 0x7E,
998 0x00, 0xAD, 0x56, 0x7C, 0x00, 0x12, 0x04, 0x44,
999/*1DD0*/0xAF, 0x56, 0x7E, 0x00, 0x02, 0x11, 0xEE, 0xE4,
1000 0xF5, 0x16, 0x12, 0x0E, 0x44, 0xFE, 0xE5, 0x08,
1001/*1DE0*/0x44, 0x05, 0xFF, 0x12, 0x0E, 0x65, 0x8F, 0x82,
1002 0x8E, 0x83, 0xF0, 0x05, 0x16, 0xE5, 0x16, 0xC3,
1003/*1DF0*/0x94, 0x14, 0x40, 0xE6, 0xE5, 0x08, 0x12, 0x0E,
1004 0x2B, 0xE4, 0xF0, 0x22, 0xE4, 0xF5, 0x58, 0xF5,
1005/*1E00*/0x59, 0xF5, 0x5A, 0xFF, 0xFE, 0xAD, 0x58, 0xFC,
1006 0x12, 0x09, 0x15, 0x7F, 0x04, 0x7E, 0x00, 0xAD,
1007/*1E10*/0x58, 0x7C, 0x00, 0x12, 0x09, 0x15, 0x7F, 0x02,
1008 0x7E, 0x00, 0xAD, 0x58, 0x7C, 0x00, 0x02, 0x09,
1009/*1E20*/0x15, 0xE5, 0x3C, 0x25, 0x3E, 0xFC, 0xE5, 0x42,
1010 0x24, 0x00, 0xFB, 0xE4, 0x33, 0xFA, 0xEC, 0xC3,
1011/*1E30*/0x9B, 0xEA, 0x12, 0x07, 0x6B, 0x40, 0x0B, 0x8C,
1012 0x42, 0xE5, 0x3D, 0x25, 0x3F, 0xF5, 0x41, 0x8F,
1013/*1E40*/0x40, 0x22, 0x12, 0x09, 0x0B, 0x22, 0x74, 0x84,
1014 0xF5, 0x18, 0x85, 0x08, 0x19, 0x85, 0x19, 0x82,
1015/*1E50*/0x85, 0x18, 0x83, 0xE0, 0x54, 0x7F, 0xF0, 0xE0,
1016 0x44, 0x80, 0xF0, 0xE0, 0x44, 0x80, 0xF0, 0x22,
1017/*1E60*/0xEF, 0x4E, 0x70, 0x0B, 0x12, 0x07, 0x2A, 0x75,
1018 0x83, 0xD2, 0xE0, 0x54, 0xDF, 0xF0, 0x22, 0x12,
1019/*1E70*/0x07, 0x2A, 0x75, 0x83, 0xD2, 0xE0, 0x44, 0x20,
1020 0xF0, 0x22, 0x75, 0x58, 0x01, 0x90, 0x07, 0x26,
1021/*1E80*/0x12, 0x07, 0x35, 0xE0, 0x54, 0x3F, 0xF5, 0x41,
1022 0x12, 0x07, 0x32, 0xE0, 0x54, 0x3F, 0xF5, 0x40,
1023/*1E90*/0x22, 0x75, 0x56, 0x02, 0xE4, 0xF5, 0x57, 0x12,
1024 0x1D, 0xFC, 0xAF, 0x57, 0x7E, 0x00, 0xAD, 0x56,
1025/*1EA0*/0x7C, 0x00, 0x02, 0x04, 0x44, 0xE4, 0xF5, 0x42,
1026 0xF5, 0x41, 0xF5, 0x40, 0xF5, 0x38, 0xF5, 0x39,
1027/*1EB0*/0xF5, 0x3A, 0x22, 0xEF, 0x54, 0x07, 0xFF, 0xE5,
1028 0xF9, 0x54, 0xF8, 0x4F, 0xF5, 0xF9, 0x22, 0x7F,
1029/*1EC0*/0x01, 0xE4, 0xFE, 0x0F, 0x0E, 0xBE, 0xFF, 0xFB,
1030 0x22, 0x01, 0x20, 0x00, 0x01, 0x04, 0x20, 0x00,
1031/*1ED0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1032 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1033/*1EE0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1034 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1035/*1EF0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1036 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1037/*1F00*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1038 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1039/*1F10*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1040 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1041/*1F20*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1042 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1043/*1F30*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1044 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1045/*1F40*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1046 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1047/*1F50*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1048 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1049/*1F60*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1050 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1051/*1F70*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1052 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1053/*1F80*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1054 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1055/*1F90*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1056 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1057/*1FA0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1058 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1059/*1FB0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1060 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1061/*1FC0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1062 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1063/*1FD0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1064 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1065/*1FE0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1066 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1067/*1FF0*/0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1068 0x01, 0x20, 0x11, 0x00, 0x04, 0x20, 0x00, 0x81
1069};
1070
1071int qib_sd7220_ib_load(struct qib_devdata *dd)
1072{
1073 return qib_sd7220_prog_ld(dd, IB_7220_SERDES, qib_sd7220_ib_img,
1074 sizeof(qib_sd7220_ib_img), 0);
1075}
1076
1077int qib_sd7220_ib_vfy(struct qib_devdata *dd)
1078{
1079 return qib_sd7220_prog_vfy(dd, IB_7220_SERDES, qib_sd7220_ib_img,
1080 sizeof(qib_sd7220_ib_img), 0);
1081}
diff --git a/drivers/infiniband/hw/qib/qib_tx.c b/drivers/infiniband/hw/qib/qib_tx.c
index f7eb1ddff5f3..af30232b6831 100644
--- a/drivers/infiniband/hw/qib/qib_tx.c
+++ b/drivers/infiniband/hw/qib/qib_tx.c
@@ -340,9 +340,13 @@ rescan:
340 if (i < dd->piobcnt2k) 340 if (i < dd->piobcnt2k)
341 buf = (u32 __iomem *)(dd->pio2kbase + 341 buf = (u32 __iomem *)(dd->pio2kbase +
342 i * dd->palign); 342 i * dd->palign);
343 else 343 else if (i < dd->piobcnt2k + dd->piobcnt4k || !dd->piovl15base)
344 buf = (u32 __iomem *)(dd->pio4kbase + 344 buf = (u32 __iomem *)(dd->pio4kbase +
345 (i - dd->piobcnt2k) * dd->align4k); 345 (i - dd->piobcnt2k) * dd->align4k);
346 else
347 buf = (u32 __iomem *)(dd->piovl15base +
348 (i - (dd->piobcnt2k + dd->piobcnt4k)) *
349 dd->align4k);
346 if (pbufnum) 350 if (pbufnum)
347 *pbufnum = i; 351 *pbufnum = i;
348 dd->upd_pio_shadow = 0; 352 dd->upd_pio_shadow = 0;
diff --git a/drivers/infiniband/ulp/ipoib/ipoib_main.c b/drivers/infiniband/ulp/ipoib/ipoib_main.c
index df3eb8c9fd96..b4b22576f12a 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib_main.c
+++ b/drivers/infiniband/ulp/ipoib/ipoib_main.c
@@ -1163,7 +1163,7 @@ static ssize_t create_child(struct device *dev,
1163 1163
1164 return ret ? ret : count; 1164 return ret ? ret : count;
1165} 1165}
1166static DEVICE_ATTR(create_child, S_IWUGO, NULL, create_child); 1166static DEVICE_ATTR(create_child, S_IWUSR, NULL, create_child);
1167 1167
1168static ssize_t delete_child(struct device *dev, 1168static ssize_t delete_child(struct device *dev,
1169 struct device_attribute *attr, 1169 struct device_attribute *attr,
@@ -1183,7 +1183,7 @@ static ssize_t delete_child(struct device *dev,
1183 return ret ? ret : count; 1183 return ret ? ret : count;
1184 1184
1185} 1185}
1186static DEVICE_ATTR(delete_child, S_IWUGO, NULL, delete_child); 1186static DEVICE_ATTR(delete_child, S_IWUSR, NULL, delete_child);
1187 1187
1188int ipoib_add_pkey_attr(struct net_device *dev) 1188int ipoib_add_pkey_attr(struct net_device *dev)
1189{ 1189{
diff --git a/drivers/input/joystick/gamecon.c b/drivers/input/joystick/gamecon.c
index fbd62abb66f9..0ffaf2c77a19 100644
--- a/drivers/input/joystick/gamecon.c
+++ b/drivers/input/joystick/gamecon.c
@@ -89,7 +89,6 @@ struct gc_pad {
89struct gc { 89struct gc {
90 struct pardevice *pd; 90 struct pardevice *pd;
91 struct gc_pad pads[GC_MAX_DEVICES]; 91 struct gc_pad pads[GC_MAX_DEVICES];
92 struct input_dev *dev[GC_MAX_DEVICES];
93 struct timer_list timer; 92 struct timer_list timer;
94 int pad_count[GC_MAX]; 93 int pad_count[GC_MAX];
95 int used; 94 int used;
@@ -387,7 +386,7 @@ static void gc_nes_process_packet(struct gc *gc)
387 for (i = 0; i < GC_MAX_DEVICES; i++) { 386 for (i = 0; i < GC_MAX_DEVICES; i++) {
388 387
389 pad = &gc->pads[i]; 388 pad = &gc->pads[i];
390 dev = gc->dev[i]; 389 dev = pad->dev;
391 s = gc_status_bit[i]; 390 s = gc_status_bit[i];
392 391
393 switch (pad->type) { 392 switch (pad->type) {
@@ -579,7 +578,7 @@ static void gc_psx_command(struct gc *gc, int b, unsigned char *data)
579 read = parport_read_status(port) ^ 0x80; 578 read = parport_read_status(port) ^ 0x80;
580 579
581 for (j = 0; j < GC_MAX_DEVICES; j++) { 580 for (j = 0; j < GC_MAX_DEVICES; j++) {
582 struct gc_pad *pad = &gc->pads[i]; 581 struct gc_pad *pad = &gc->pads[j];
583 582
584 if (pad->type == GC_PSX || pad->type == GC_DDR) 583 if (pad->type == GC_PSX || pad->type == GC_DDR)
585 data[j] |= (read & gc_status_bit[j]) ? (1 << i) : 0; 584 data[j] |= (read & gc_status_bit[j]) ? (1 << i) : 0;
diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
index 0f9a4785d798..1ba25145b333 100644
--- a/drivers/input/keyboard/Kconfig
+++ b/drivers/input/keyboard/Kconfig
@@ -69,11 +69,11 @@ config KEYBOARD_ATARI
69 module will be called atakbd. 69 module will be called atakbd.
70 70
71config KEYBOARD_ATKBD 71config KEYBOARD_ATKBD
72 tristate "AT keyboard" if EMBEDDED || !X86 || X86_MRST 72 tristate "AT keyboard" if EMBEDDED || !X86
73 default y 73 default y
74 select SERIO 74 select SERIO
75 select SERIO_LIBPS2 75 select SERIO_LIBPS2
76 select SERIO_I8042 if X86 && !X86_MRST 76 select SERIO_I8042 if X86
77 select SERIO_GSCPS2 if GSC 77 select SERIO_GSCPS2 if GSC
78 help 78 help
79 Say Y here if you want to use a standard AT or PS/2 keyboard. Usually 79 Say Y here if you want to use a standard AT or PS/2 keyboard. Usually
@@ -124,7 +124,7 @@ config KEYBOARD_ATKBD_RDI_KEYCODES
124 right-hand column will be interpreted as the key shown in the 124 right-hand column will be interpreted as the key shown in the
125 left-hand column. 125 left-hand column.
126 126
127config QT2160 127config KEYBOARD_QT2160
128 tristate "Atmel AT42QT2160 Touch Sensor Chip" 128 tristate "Atmel AT42QT2160 Touch Sensor Chip"
129 depends on I2C && EXPERIMENTAL 129 depends on I2C && EXPERIMENTAL
130 help 130 help
diff --git a/drivers/input/keyboard/twl4030_keypad.c b/drivers/input/keyboard/twl4030_keypad.c
index 7aa59e07b689..fb16b5e5ea13 100644
--- a/drivers/input/keyboard/twl4030_keypad.c
+++ b/drivers/input/keyboard/twl4030_keypad.c
@@ -51,8 +51,12 @@
51 */ 51 */
52#define TWL4030_MAX_ROWS 8 /* TWL4030 hard limit */ 52#define TWL4030_MAX_ROWS 8 /* TWL4030 hard limit */
53#define TWL4030_MAX_COLS 8 53#define TWL4030_MAX_COLS 8
54#define TWL4030_ROW_SHIFT 3 54/*
55#define TWL4030_KEYMAP_SIZE (TWL4030_MAX_ROWS * TWL4030_MAX_COLS) 55 * Note that we add space for an extra column so that we can handle
56 * row lines connected to the gnd (see twl4030_col_xlate()).
57 */
58#define TWL4030_ROW_SHIFT 4
59#define TWL4030_KEYMAP_SIZE (TWL4030_MAX_ROWS << TWL4030_ROW_SHIFT)
56 60
57struct twl4030_keypad { 61struct twl4030_keypad {
58 unsigned short keymap[TWL4030_KEYMAP_SIZE]; 62 unsigned short keymap[TWL4030_KEYMAP_SIZE];
@@ -182,7 +186,7 @@ static int twl4030_read_kp_matrix_state(struct twl4030_keypad *kp, u16 *state)
182 return ret; 186 return ret;
183} 187}
184 188
185static int twl4030_is_in_ghost_state(struct twl4030_keypad *kp, u16 *key_state) 189static bool twl4030_is_in_ghost_state(struct twl4030_keypad *kp, u16 *key_state)
186{ 190{
187 int i; 191 int i;
188 u16 check = 0; 192 u16 check = 0;
@@ -191,12 +195,12 @@ static int twl4030_is_in_ghost_state(struct twl4030_keypad *kp, u16 *key_state)
191 u16 col = key_state[i]; 195 u16 col = key_state[i];
192 196
193 if ((col & check) && hweight16(col) > 1) 197 if ((col & check) && hweight16(col) > 1)
194 return 1; 198 return true;
195 199
196 check |= col; 200 check |= col;
197 } 201 }
198 202
199 return 0; 203 return false;
200} 204}
201 205
202static void twl4030_kp_scan(struct twl4030_keypad *kp, bool release_all) 206static void twl4030_kp_scan(struct twl4030_keypad *kp, bool release_all)
@@ -225,7 +229,8 @@ static void twl4030_kp_scan(struct twl4030_keypad *kp, bool release_all)
225 if (!changed) 229 if (!changed)
226 continue; 230 continue;
227 231
228 for (col = 0; col < kp->n_cols; col++) { 232 /* Extra column handles "all gnd" rows */
233 for (col = 0; col < kp->n_cols + 1; col++) {
229 int code; 234 int code;
230 235
231 if (!(changed & (1 << col))) 236 if (!(changed & (1 << col)))
diff --git a/drivers/input/keyboard/w90p910_keypad.c b/drivers/input/keyboard/w90p910_keypad.c
index 4ef764cc493c..ee2bf6bcf291 100644
--- a/drivers/input/keyboard/w90p910_keypad.c
+++ b/drivers/input/keyboard/w90p910_keypad.c
@@ -258,7 +258,7 @@ static struct platform_driver w90p910_keypad_driver = {
258 .probe = w90p910_keypad_probe, 258 .probe = w90p910_keypad_probe,
259 .remove = __devexit_p(w90p910_keypad_remove), 259 .remove = __devexit_p(w90p910_keypad_remove),
260 .driver = { 260 .driver = {
261 .name = "nuc900-keypad", 261 .name = "nuc900-kpi",
262 .owner = THIS_MODULE, 262 .owner = THIS_MODULE,
263 }, 263 },
264}; 264};
diff --git a/drivers/input/mouse/Kconfig b/drivers/input/mouse/Kconfig
index eeb58c1cac16..c714ca2407f8 100644
--- a/drivers/input/mouse/Kconfig
+++ b/drivers/input/mouse/Kconfig
@@ -17,7 +17,7 @@ config MOUSE_PS2
17 default y 17 default y
18 select SERIO 18 select SERIO
19 select SERIO_LIBPS2 19 select SERIO_LIBPS2
20 select SERIO_I8042 if X86 && !X86_MRST 20 select SERIO_I8042 if X86
21 select SERIO_GSCPS2 if GSC 21 select SERIO_GSCPS2 if GSC
22 help 22 help
23 Say Y here if you have a PS/2 mouse connected to your system. This 23 Say Y here if you have a PS/2 mouse connected to your system. This
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index 40cea334ad13..705589dc9ac5 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -141,8 +141,13 @@ static int synaptics_capability(struct psmouse *psmouse)
141 priv->capabilities = (cap[0] << 16) | (cap[1] << 8) | cap[2]; 141 priv->capabilities = (cap[0] << 16) | (cap[1] << 8) | cap[2];
142 priv->ext_cap = priv->ext_cap_0c = 0; 142 priv->ext_cap = priv->ext_cap_0c = 0;
143 143
144 if (!SYN_CAP_VALID(priv->capabilities)) 144 /*
145 * Older firmwares had submodel ID fixed to 0x47
146 */
147 if (SYN_ID_FULL(priv->identity) < 0x705 &&
148 SYN_CAP_SUBMODEL_ID(priv->capabilities) != 0x47) {
145 return -1; 149 return -1;
150 }
146 151
147 /* 152 /*
148 * Unless capExtended is set the rest of the flags should be ignored 153 * Unless capExtended is set the rest of the flags should be ignored
@@ -206,6 +211,7 @@ static int synaptics_resolution(struct psmouse *psmouse)
206 unsigned char max[3]; 211 unsigned char max[3];
207 212
208 if (SYN_ID_MAJOR(priv->identity) < 4) 213 if (SYN_ID_MAJOR(priv->identity) < 4)
214 return 0;
209 215
210 if (synaptics_send_cmd(psmouse, SYN_QUE_RESOLUTION, res) == 0) { 216 if (synaptics_send_cmd(psmouse, SYN_QUE_RESOLUTION, res) == 0) {
211 if (res[0] != 0 && (res[1] & 0x80) && res[2] != 0) { 217 if (res[0] != 0 && (res[1] & 0x80) && res[2] != 0) {
diff --git a/drivers/input/mouse/synaptics.h b/drivers/input/mouse/synaptics.h
index 7d4d5e12c0df..b6aa7d20d8a3 100644
--- a/drivers/input/mouse/synaptics.h
+++ b/drivers/input/mouse/synaptics.h
@@ -47,7 +47,7 @@
47#define SYN_CAP_FOUR_BUTTON(c) ((c) & (1 << 3)) 47#define SYN_CAP_FOUR_BUTTON(c) ((c) & (1 << 3))
48#define SYN_CAP_MULTIFINGER(c) ((c) & (1 << 1)) 48#define SYN_CAP_MULTIFINGER(c) ((c) & (1 << 1))
49#define SYN_CAP_PALMDETECT(c) ((c) & (1 << 0)) 49#define SYN_CAP_PALMDETECT(c) ((c) & (1 << 0))
50#define SYN_CAP_VALID(c) ((((c) & 0x00ff00) >> 8) == 0x47) 50#define SYN_CAP_SUBMODEL_ID(c) (((c) & 0x00ff00) >> 8)
51#define SYN_EXT_CAP_REQUESTS(c) (((c) & 0x700000) >> 20) 51#define SYN_EXT_CAP_REQUESTS(c) (((c) & 0x700000) >> 20)
52#define SYN_CAP_MULTI_BUTTON_NO(ec) (((ec) & 0x00f000) >> 12) 52#define SYN_CAP_MULTI_BUTTON_NO(ec) (((ec) & 0x00f000) >> 12)
53#define SYN_CAP_PRODUCT_ID(ec) (((ec) & 0xff0000) >> 16) 53#define SYN_CAP_PRODUCT_ID(ec) (((ec) & 0xff0000) >> 16)
@@ -66,6 +66,7 @@
66#define SYN_ID_MODEL(i) (((i) >> 4) & 0x0f) 66#define SYN_ID_MODEL(i) (((i) >> 4) & 0x0f)
67#define SYN_ID_MAJOR(i) ((i) & 0x0f) 67#define SYN_ID_MAJOR(i) ((i) & 0x0f)
68#define SYN_ID_MINOR(i) (((i) >> 16) & 0xff) 68#define SYN_ID_MINOR(i) (((i) >> 16) & 0xff)
69#define SYN_ID_FULL(i) ((SYN_ID_MAJOR(i) << 8) | SYN_ID_MINOR(i))
69#define SYN_ID_IS_SYNAPTICS(i) ((((i) >> 8) & 0xff) == 0x47) 70#define SYN_ID_IS_SYNAPTICS(i) ((((i) >> 8) & 0xff) == 0x47)
70 71
71/* synaptics special commands */ 72/* synaptics special commands */
diff --git a/drivers/input/serio/Kconfig b/drivers/input/serio/Kconfig
index 256b9e9394dc..3bfe8fafc6ad 100644
--- a/drivers/input/serio/Kconfig
+++ b/drivers/input/serio/Kconfig
@@ -22,7 +22,7 @@ config SERIO_I8042
22 tristate "i8042 PC Keyboard controller" if EMBEDDED || !X86 22 tristate "i8042 PC Keyboard controller" if EMBEDDED || !X86
23 default y 23 default y
24 depends on !PARISC && (!ARM || ARCH_SHARK || FOOTBRIDGE_HOST) && \ 24 depends on !PARISC && (!ARM || ARCH_SHARK || FOOTBRIDGE_HOST) && \
25 (!SUPERH || SH_CAYMAN) && !M68K && !BLACKFIN && !X86_MRST 25 (!SUPERH || SH_CAYMAN) && !M68K && !BLACKFIN
26 help 26 help
27 i8042 is the chip over which the standard AT keyboard and PS/2 27 i8042 is the chip over which the standard AT keyboard and PS/2
28 mouse are connected to the computer. If you use these devices, 28 mouse are connected to the computer. If you use these devices,
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index 6168469ad1a6..ed7ad7416b24 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -7,6 +7,10 @@
7 * the Free Software Foundation. 7 * the Free Software Foundation.
8 */ 8 */
9 9
10#ifdef CONFIG_X86
11#include <asm/x86_init.h>
12#endif
13
10/* 14/*
11 * Names. 15 * Names.
12 */ 16 */
@@ -166,6 +170,13 @@ static const struct dmi_system_id __initconst i8042_dmi_noloop_table[] = {
166 }, 170 },
167 }, 171 },
168 { 172 {
173 /* Gigabyte Spring Peak - defines wrong chassis type */
174 .matches = {
175 DMI_MATCH(DMI_SYS_VENDOR, "GIGABYTE"),
176 DMI_MATCH(DMI_PRODUCT_NAME, "Spring Peak"),
177 },
178 },
179 {
169 .matches = { 180 .matches = {
170 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), 181 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
171 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv9700"), 182 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv9700"),
@@ -840,6 +851,12 @@ static int __init i8042_platform_init(void)
840{ 851{
841 int retval; 852 int retval;
842 853
854#ifdef CONFIG_X86
855 /* Just return if pre-detection shows no i8042 controller exist */
856 if (!x86_platform.i8042_detect())
857 return -ENODEV;
858#endif
859
843/* 860/*
844 * On ix86 platforms touching the i8042 data register region can do really 861 * On ix86 platforms touching the i8042 data register region can do really
845 * bad things. Because of this the region is always reserved on ix86 boxes. 862 * bad things. Because of this the region is always reserved on ix86 boxes.
diff --git a/drivers/input/touchscreen/w90p910_ts.c b/drivers/input/touchscreen/w90p910_ts.c
index cc18265be1a8..7a45d68c3516 100644
--- a/drivers/input/touchscreen/w90p910_ts.c
+++ b/drivers/input/touchscreen/w90p910_ts.c
@@ -233,7 +233,7 @@ static int __devinit w90x900ts_probe(struct platform_device *pdev)
233 w90p910_ts->state = TS_IDLE; 233 w90p910_ts->state = TS_IDLE;
234 spin_lock_init(&w90p910_ts->lock); 234 spin_lock_init(&w90p910_ts->lock);
235 setup_timer(&w90p910_ts->timer, w90p910_check_pen_up, 235 setup_timer(&w90p910_ts->timer, w90p910_check_pen_up,
236 (unsigned long)&w90p910_ts); 236 (unsigned long)w90p910_ts);
237 237
238 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 238 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
239 if (!res) { 239 if (!res) {
diff --git a/drivers/media/common/tuners/tuner-simple.c b/drivers/media/common/tuners/tuner-simple.c
index 8abbcc5fcf95..8cf2ab609d5e 100644
--- a/drivers/media/common/tuners/tuner-simple.c
+++ b/drivers/media/common/tuners/tuner-simple.c
@@ -524,6 +524,7 @@ static int simple_radio_bandswitch(struct dvb_frontend *fe, u8 *buffer)
524 buffer[3] = 0x39; 524 buffer[3] = 0x39;
525 break; 525 break;
526 case TUNER_PHILIPS_FQ1216LME_MK3: 526 case TUNER_PHILIPS_FQ1216LME_MK3:
527 case TUNER_PHILIPS_FQ1236_MK5:
527 tuner_err("This tuner doesn't have FM\n"); 528 tuner_err("This tuner doesn't have FM\n");
528 /* Set the low band for sanity, since it covers 88-108 MHz */ 529 /* Set the low band for sanity, since it covers 88-108 MHz */
529 buffer[3] = 0x01; 530 buffer[3] = 0x01;
diff --git a/drivers/media/common/tuners/tuner-types.c b/drivers/media/common/tuners/tuner-types.c
index d9aaaca620c9..58a513bcd747 100644
--- a/drivers/media/common/tuners/tuner-types.c
+++ b/drivers/media/common/tuners/tuner-types.c
@@ -1353,6 +1353,17 @@ static struct tuner_params tuner_sony_btf_pxn01z_params[] = {
1353 }, 1353 },
1354}; 1354};
1355 1355
1356/* ------------ TUNER_PHILIPS_FQ1236_MK5 - Philips NTSC ------------ */
1357
1358static struct tuner_params tuner_philips_fq1236_mk5_params[] = {
1359 {
1360 .type = TUNER_PARAM_TYPE_NTSC,
1361 .ranges = tuner_fm1236_mk3_ntsc_ranges,
1362 .count = ARRAY_SIZE(tuner_fm1236_mk3_ntsc_ranges),
1363 .has_tda9887 = 1, /* TDA9885, no FM radio */
1364 },
1365};
1366
1356/* --------------------------------------------------------------------- */ 1367/* --------------------------------------------------------------------- */
1357 1368
1358struct tunertype tuners[] = { 1369struct tunertype tuners[] = {
@@ -1826,6 +1837,11 @@ struct tunertype tuners[] = {
1826 .params = tuner_sony_btf_pxn01z_params, 1837 .params = tuner_sony_btf_pxn01z_params,
1827 .count = ARRAY_SIZE(tuner_sony_btf_pxn01z_params), 1838 .count = ARRAY_SIZE(tuner_sony_btf_pxn01z_params),
1828 }, 1839 },
1840 [TUNER_PHILIPS_FQ1236_MK5] = { /* NTSC, TDA9885, no FM radio */
1841 .name = "Philips FQ1236 MK5",
1842 .params = tuner_philips_fq1236_mk5_params,
1843 .count = ARRAY_SIZE(tuner_philips_fq1236_mk5_params),
1844 },
1829}; 1845};
1830EXPORT_SYMBOL(tuners); 1846EXPORT_SYMBOL(tuners);
1831 1847
diff --git a/drivers/media/video/ivtv/ivtv-streams.c b/drivers/media/video/ivtv/ivtv-streams.c
index 9ecacab4b89b..a937e2ff9b6e 100644
--- a/drivers/media/video/ivtv/ivtv-streams.c
+++ b/drivers/media/video/ivtv/ivtv-streams.c
@@ -912,6 +912,9 @@ int ivtv_stop_v4l2_decode_stream(struct ivtv_stream *s, int flags, u64 pts)
912 clear_bit(IVTV_F_S_STREAMING, &s->s_flags); 912 clear_bit(IVTV_F_S_STREAMING, &s->s_flags);
913 ivtv_flush_queues(s); 913 ivtv_flush_queues(s);
914 914
915 /* decoder needs time to settle */
916 ivtv_msleep_timeout(40, 0);
917
915 /* decrement decoding */ 918 /* decrement decoding */
916 atomic_dec(&itv->decoding); 919 atomic_dec(&itv->decoding);
917 920
diff --git a/drivers/media/video/mem2mem_testdev.c b/drivers/media/video/mem2mem_testdev.c
index 554eaf140128..10ddeccc70eb 100644
--- a/drivers/media/video/mem2mem_testdev.c
+++ b/drivers/media/video/mem2mem_testdev.c
@@ -988,6 +988,9 @@ static int m2mtest_probe(struct platform_device *pdev)
988 goto err_m2m; 988 goto err_m2m;
989 } 989 }
990 990
991 q_data[V4L2_M2M_SRC].fmt = &formats[0];
992 q_data[V4L2_M2M_DST].fmt = &formats[0];
993
991 return 0; 994 return 0;
992 995
993err_m2m: 996err_m2m:
diff --git a/drivers/media/video/omap/Kconfig b/drivers/media/video/omap/Kconfig
index 97c53949ca89..e63233fd2aaa 100644
--- a/drivers/media/video/omap/Kconfig
+++ b/drivers/media/video/omap/Kconfig
@@ -1,8 +1,8 @@
1config VIDEO_OMAP2_VOUT 1config VIDEO_OMAP2_VOUT
2 tristate "OMAP2/OMAP3 V4L2-Display driver" 2 tristate "OMAP2/OMAP3 V4L2-Display driver"
3 depends on ARCH_OMAP24XX || ARCH_OMAP34XX 3 depends on ARCH_OMAP2 || ARCH_OMAP3
4 select VIDEOBUF_GEN 4 select VIDEOBUF_GEN
5 select VIDEOBUF_DMA_SG 5 select VIDEOBUF_DMA_CONTIG
6 select OMAP2_DSS 6 select OMAP2_DSS
7 select OMAP2_VRAM 7 select OMAP2_VRAM
8 select OMAP2_VRFB 8 select OMAP2_VRFB
diff --git a/drivers/media/video/omap/Makefile b/drivers/media/video/omap/Makefile
index b8bab00ad010..b28788070ae1 100644
--- a/drivers/media/video/omap/Makefile
+++ b/drivers/media/video/omap/Makefile
@@ -3,5 +3,5 @@
3# 3#
4 4
5# OMAP2/3 Display driver 5# OMAP2/3 Display driver
6omap-vout-mod-objs := omap_vout.o omap_voutlib.o 6omap-vout-y := omap_vout.o omap_voutlib.o
7obj-$(CONFIG_VIDEO_OMAP2_VOUT) += omap-vout-mod.o 7obj-$(CONFIG_VIDEO_OMAP2_VOUT) += omap-vout.o
diff --git a/drivers/media/video/omap/omap_vout.c b/drivers/media/video/omap/omap_vout.c
index e7db0554949a..929073e792c9 100644
--- a/drivers/media/video/omap/omap_vout.c
+++ b/drivers/media/video/omap/omap_vout.c
@@ -38,8 +38,9 @@
38#include <linux/dma-mapping.h> 38#include <linux/dma-mapping.h>
39#include <linux/irq.h> 39#include <linux/irq.h>
40#include <linux/videodev2.h> 40#include <linux/videodev2.h>
41#include <linux/slab.h>
41 42
42#include <media/videobuf-dma-sg.h> 43#include <media/videobuf-dma-contig.h>
43#include <media/v4l2-device.h> 44#include <media/v4l2-device.h>
44#include <media/v4l2-ioctl.h> 45#include <media/v4l2-ioctl.h>
45 46
@@ -1053,9 +1054,9 @@ static int omap_vout_buffer_prepare(struct videobuf_queue *q,
1053 struct videobuf_buffer *vb, 1054 struct videobuf_buffer *vb,
1054 enum v4l2_field field) 1055 enum v4l2_field field)
1055{ 1056{
1057 dma_addr_t dmabuf;
1056 struct vid_vrfb_dma *tx; 1058 struct vid_vrfb_dma *tx;
1057 enum dss_rotation rotation; 1059 enum dss_rotation rotation;
1058 struct videobuf_dmabuf *dmabuf = NULL;
1059 struct omap_vout_device *vout = q->priv_data; 1060 struct omap_vout_device *vout = q->priv_data;
1060 u32 dest_frame_index = 0, src_element_index = 0; 1061 u32 dest_frame_index = 0, src_element_index = 0;
1061 u32 dest_element_index = 0, src_frame_index = 0; 1062 u32 dest_element_index = 0, src_frame_index = 0;
@@ -1074,24 +1075,17 @@ static int omap_vout_buffer_prepare(struct videobuf_queue *q,
1074 if (V4L2_MEMORY_USERPTR == vb->memory) { 1075 if (V4L2_MEMORY_USERPTR == vb->memory) {
1075 if (0 == vb->baddr) 1076 if (0 == vb->baddr)
1076 return -EINVAL; 1077 return -EINVAL;
1077 /* Virtual address */
1078 /* priv points to struct videobuf_pci_sg_memory. But we went
1079 * pointer to videobuf_dmabuf, which is member of
1080 * videobuf_pci_sg_memory */
1081 dmabuf = videobuf_to_dma(q->bufs[vb->i]);
1082 dmabuf->vmalloc = (void *) vb->baddr;
1083
1084 /* Physical address */ 1078 /* Physical address */
1085 dmabuf->bus_addr = 1079 vout->queued_buf_addr[vb->i] = (u8 *)
1086 (dma_addr_t) omap_vout_uservirt_to_phys(vb->baddr); 1080 omap_vout_uservirt_to_phys(vb->baddr);
1081 } else {
1082 vout->queued_buf_addr[vb->i] = (u8 *)vout->buf_phy_addr[vb->i];
1087 } 1083 }
1088 1084
1089 if (!rotation_enabled(vout)) { 1085 if (!rotation_enabled(vout))
1090 dmabuf = videobuf_to_dma(q->bufs[vb->i]);
1091 vout->queued_buf_addr[vb->i] = (u8 *) dmabuf->bus_addr;
1092 return 0; 1086 return 0;
1093 } 1087
1094 dmabuf = videobuf_to_dma(q->bufs[vb->i]); 1088 dmabuf = vout->buf_phy_addr[vb->i];
1095 /* If rotation is enabled, copy input buffer into VRFB 1089 /* If rotation is enabled, copy input buffer into VRFB
1096 * memory space using DMA. We are copying input buffer 1090 * memory space using DMA. We are copying input buffer
1097 * into VRFB memory space of desired angle and DSS will 1091 * into VRFB memory space of desired angle and DSS will
@@ -1120,7 +1114,7 @@ static int omap_vout_buffer_prepare(struct videobuf_queue *q,
1120 tx->dev_id, 0x0); 1114 tx->dev_id, 0x0);
1121 /* src_port required only for OMAP1 */ 1115 /* src_port required only for OMAP1 */
1122 omap_set_dma_src_params(tx->dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 1116 omap_set_dma_src_params(tx->dma_ch, 0, OMAP_DMA_AMODE_POST_INC,
1123 dmabuf->bus_addr, src_element_index, src_frame_index); 1117 dmabuf, src_element_index, src_frame_index);
1124 /*set dma source burst mode for VRFB */ 1118 /*set dma source burst mode for VRFB */
1125 omap_set_dma_src_burst_mode(tx->dma_ch, OMAP_DMA_DATA_BURST_16); 1119 omap_set_dma_src_burst_mode(tx->dma_ch, OMAP_DMA_DATA_BURST_16);
1126 rotation = calc_rotation(vout); 1120 rotation = calc_rotation(vout);
@@ -1211,7 +1205,6 @@ static int omap_vout_mmap(struct file *file, struct vm_area_struct *vma)
1211 void *pos; 1205 void *pos;
1212 unsigned long start = vma->vm_start; 1206 unsigned long start = vma->vm_start;
1213 unsigned long size = (vma->vm_end - vma->vm_start); 1207 unsigned long size = (vma->vm_end - vma->vm_start);
1214 struct videobuf_dmabuf *dmabuf = NULL;
1215 struct omap_vout_device *vout = file->private_data; 1208 struct omap_vout_device *vout = file->private_data;
1216 struct videobuf_queue *q = &vout->vbq; 1209 struct videobuf_queue *q = &vout->vbq;
1217 1210
@@ -1241,8 +1234,7 @@ static int omap_vout_mmap(struct file *file, struct vm_area_struct *vma)
1241 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot); 1234 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
1242 vma->vm_ops = &omap_vout_vm_ops; 1235 vma->vm_ops = &omap_vout_vm_ops;
1243 vma->vm_private_data = (void *) vout; 1236 vma->vm_private_data = (void *) vout;
1244 dmabuf = videobuf_to_dma(q->bufs[i]); 1237 pos = (void *)vout->buf_virt_addr[i];
1245 pos = dmabuf->vmalloc;
1246 vma->vm_pgoff = virt_to_phys((void *)pos) >> PAGE_SHIFT; 1238 vma->vm_pgoff = virt_to_phys((void *)pos) >> PAGE_SHIFT;
1247 while (size > 0) { 1239 while (size > 0) {
1248 unsigned long pfn; 1240 unsigned long pfn;
@@ -1347,8 +1339,8 @@ static int omap_vout_open(struct file *file)
1347 video_vbq_ops.buf_queue = omap_vout_buffer_queue; 1339 video_vbq_ops.buf_queue = omap_vout_buffer_queue;
1348 spin_lock_init(&vout->vbq_lock); 1340 spin_lock_init(&vout->vbq_lock);
1349 1341
1350 videobuf_queue_sg_init(q, &video_vbq_ops, NULL, &vout->vbq_lock, 1342 videobuf_queue_dma_contig_init(q, &video_vbq_ops, q->dev,
1351 vout->type, V4L2_FIELD_NONE, 1343 &vout->vbq_lock, vout->type, V4L2_FIELD_NONE,
1352 sizeof(struct videobuf_buffer), vout); 1344 sizeof(struct videobuf_buffer), vout);
1353 1345
1354 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Exiting %s\n", __func__); 1346 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Exiting %s\n", __func__);
@@ -1799,7 +1791,6 @@ static int vidioc_reqbufs(struct file *file, void *fh,
1799 unsigned int i, num_buffers = 0; 1791 unsigned int i, num_buffers = 0;
1800 struct omap_vout_device *vout = fh; 1792 struct omap_vout_device *vout = fh;
1801 struct videobuf_queue *q = &vout->vbq; 1793 struct videobuf_queue *q = &vout->vbq;
1802 struct videobuf_dmabuf *dmabuf = NULL;
1803 1794
1804 if ((req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || (req->count < 0)) 1795 if ((req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT) || (req->count < 0))
1805 return -EINVAL; 1796 return -EINVAL;
@@ -1825,8 +1816,7 @@ static int vidioc_reqbufs(struct file *file, void *fh,
1825 num_buffers = (vout->vid == OMAP_VIDEO1) ? 1816 num_buffers = (vout->vid == OMAP_VIDEO1) ?
1826 video1_numbuffers : video2_numbuffers; 1817 video1_numbuffers : video2_numbuffers;
1827 for (i = num_buffers; i < vout->buffer_allocated; i++) { 1818 for (i = num_buffers; i < vout->buffer_allocated; i++) {
1828 dmabuf = videobuf_to_dma(q->bufs[i]); 1819 omap_vout_free_buffer(vout->buf_virt_addr[i],
1829 omap_vout_free_buffer((u32)dmabuf->vmalloc,
1830 vout->buffer_size); 1820 vout->buffer_size);
1831 vout->buf_virt_addr[i] = 0; 1821 vout->buf_virt_addr[i] = 0;
1832 vout->buf_phy_addr[i] = 0; 1822 vout->buf_phy_addr[i] = 0;
@@ -1855,12 +1845,7 @@ static int vidioc_reqbufs(struct file *file, void *fh,
1855 goto reqbuf_err; 1845 goto reqbuf_err;
1856 1846
1857 vout->buffer_allocated = req->count; 1847 vout->buffer_allocated = req->count;
1858 for (i = 0; i < req->count; i++) { 1848
1859 dmabuf = videobuf_to_dma(q->bufs[i]);
1860 dmabuf->vmalloc = (void *) vout->buf_virt_addr[i];
1861 dmabuf->bus_addr = (dma_addr_t) vout->buf_phy_addr[i];
1862 dmabuf->sglen = 1;
1863 }
1864reqbuf_err: 1849reqbuf_err:
1865 mutex_unlock(&vout->lock); 1850 mutex_unlock(&vout->lock);
1866 return ret; 1851 return ret;
@@ -2488,7 +2473,7 @@ static int omap_vout_remove(struct platform_device *pdev)
2488 2473
2489 for (k = 0; k < vid_dev->num_displays; k++) { 2474 for (k = 0; k < vid_dev->num_displays; k++) {
2490 if (vid_dev->displays[k]->state != OMAP_DSS_DISPLAY_DISABLED) 2475 if (vid_dev->displays[k]->state != OMAP_DSS_DISPLAY_DISABLED)
2491 vid_dev->displays[k]->disable(vid_dev->displays[k]); 2476 vid_dev->displays[k]->driver->disable(vid_dev->displays[k]);
2492 2477
2493 omap_dss_put_device(vid_dev->displays[k]); 2478 omap_dss_put_device(vid_dev->displays[k]);
2494 } 2479 }
@@ -2545,7 +2530,9 @@ static int __init omap_vout_probe(struct platform_device *pdev)
2545 def_display = NULL; 2530 def_display = NULL;
2546 } 2531 }
2547 if (def_display) { 2532 if (def_display) {
2548 ret = def_display->enable(def_display); 2533 struct omap_dss_driver *dssdrv = def_display->driver;
2534
2535 ret = dssdrv->enable(def_display);
2549 if (ret) { 2536 if (ret) {
2550 /* Here we are not considering a error 2537 /* Here we are not considering a error
2551 * as display may be enabled by frame 2538 * as display may be enabled by frame
@@ -2559,21 +2546,21 @@ static int __init omap_vout_probe(struct platform_device *pdev)
2559 if (def_display->caps & 2546 if (def_display->caps &
2560 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) { 2547 OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) {
2561#ifdef CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE 2548#ifdef CONFIG_FB_OMAP2_FORCE_AUTO_UPDATE
2562 if (def_display->enable_te) 2549 if (dssdrv->enable_te)
2563 def_display->enable_te(def_display, 1); 2550 dssdrv->enable_te(def_display, 1);
2564 if (def_display->set_update_mode) 2551 if (dssdrv->set_update_mode)
2565 def_display->set_update_mode(def_display, 2552 dssdrv->set_update_mode(def_display,
2566 OMAP_DSS_UPDATE_AUTO); 2553 OMAP_DSS_UPDATE_AUTO);
2567#else /* MANUAL_UPDATE */ 2554#else /* MANUAL_UPDATE */
2568 if (def_display->enable_te) 2555 if (dssdrv->enable_te)
2569 def_display->enable_te(def_display, 0); 2556 dssdrv->enable_te(def_display, 0);
2570 if (def_display->set_update_mode) 2557 if (dssdrv->set_update_mode)
2571 def_display->set_update_mode(def_display, 2558 dssdrv->set_update_mode(def_display,
2572 OMAP_DSS_UPDATE_MANUAL); 2559 OMAP_DSS_UPDATE_MANUAL);
2573#endif 2560#endif
2574 } else { 2561 } else {
2575 if (def_display->set_update_mode) 2562 if (dssdrv->set_update_mode)
2576 def_display->set_update_mode(def_display, 2563 dssdrv->set_update_mode(def_display,
2577 OMAP_DSS_UPDATE_AUTO); 2564 OMAP_DSS_UPDATE_AUTO);
2578 } 2565 }
2579 } 2566 }
@@ -2592,8 +2579,8 @@ static int __init omap_vout_probe(struct platform_device *pdev)
2592 for (i = 0; i < vid_dev->num_displays; i++) { 2579 for (i = 0; i < vid_dev->num_displays; i++) {
2593 struct omap_dss_device *display = vid_dev->displays[i]; 2580 struct omap_dss_device *display = vid_dev->displays[i];
2594 2581
2595 if (display->update) 2582 if (display->driver->update)
2596 display->update(display, 0, 0, 2583 display->driver->update(display, 0, 0,
2597 display->panel.timings.x_res, 2584 display->panel.timings.x_res,
2598 display->panel.timings.y_res); 2585 display->panel.timings.y_res);
2599 } 2586 }
@@ -2608,8 +2595,8 @@ probe_err1:
2608 if (ovl->manager && ovl->manager->device) 2595 if (ovl->manager && ovl->manager->device)
2609 def_display = ovl->manager->device; 2596 def_display = ovl->manager->device;
2610 2597
2611 if (def_display) 2598 if (def_display && def_display->driver)
2612 def_display->disable(def_display); 2599 def_display->driver->disable(def_display);
2613 } 2600 }
2614probe_err0: 2601probe_err0:
2615 kfree(vid_dev); 2602 kfree(vid_dev);
diff --git a/drivers/media/video/tveeprom.c b/drivers/media/video/tveeprom.c
index 0a877497b93f..07fabdd9b465 100644
--- a/drivers/media/video/tveeprom.c
+++ b/drivers/media/video/tveeprom.c
@@ -267,6 +267,21 @@ hauppauge_tuner[] =
267 { TUNER_ABSENT, "Xceive XC4000"}, 267 { TUNER_ABSENT, "Xceive XC4000"},
268 { TUNER_ABSENT, "Dibcom 7070"}, 268 { TUNER_ABSENT, "Dibcom 7070"},
269 { TUNER_PHILIPS_TDA8290, "NXP 18271C2"}, 269 { TUNER_PHILIPS_TDA8290, "NXP 18271C2"},
270 { TUNER_ABSENT, "unknown"},
271 { TUNER_ABSENT, "unknown"},
272 { TUNER_ABSENT, "unknown"},
273 { TUNER_ABSENT, "unknown"},
274 /* 160-169 */
275 { TUNER_ABSENT, "unknown"},
276 { TUNER_ABSENT, "unknown"},
277 { TUNER_ABSENT, "unknown"},
278 { TUNER_ABSENT, "unknown"},
279 { TUNER_ABSENT, "unknown"},
280 { TUNER_ABSENT, "unknown"},
281 { TUNER_ABSENT, "unknown"},
282 { TUNER_ABSENT, "unknown"},
283 { TUNER_PHILIPS_FQ1236_MK5, "TCL M30WTP-4N-E"},
284 { TUNER_ABSENT, "unknown"},
270}; 285};
271 286
272/* Use V4L2_IDENT_AMBIGUOUS for those audio 'chips' that are 287/* Use V4L2_IDENT_AMBIGUOUS for those audio 'chips' that are
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c
index aa0720af07a0..27a79f087b15 100644
--- a/drivers/media/video/uvc/uvc_ctrl.c
+++ b/drivers/media/video/uvc/uvc_ctrl.c
@@ -122,8 +122,8 @@ static struct uvc_control_info uvc_ctrls[] = {
122 .selector = UVC_PU_POWER_LINE_FREQUENCY_CONTROL, 122 .selector = UVC_PU_POWER_LINE_FREQUENCY_CONTROL,
123 .index = 10, 123 .index = 10,
124 .size = 1, 124 .size = 1,
125 .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE 125 .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_CUR
126 | UVC_CONTROL_RESTORE, 126 | UVC_CONTROL_GET_DEF | UVC_CONTROL_RESTORE,
127 }, 127 },
128 { 128 {
129 .entity = UVC_GUID_UVC_PROCESSING, 129 .entity = UVC_GUID_UVC_PROCESSING,
diff --git a/drivers/misc/cs5535-mfgpt.c b/drivers/misc/cs5535-mfgpt.c
index 9bec24db4d41..2d44b3300104 100644
--- a/drivers/misc/cs5535-mfgpt.c
+++ b/drivers/misc/cs5535-mfgpt.c
@@ -366,6 +366,6 @@ static int __init cs5535_mfgpt_init(void)
366 366
367module_init(cs5535_mfgpt_init); 367module_init(cs5535_mfgpt_init);
368 368
369MODULE_AUTHOR("Andres Salomon <dilinger@collabora.co.uk>"); 369MODULE_AUTHOR("Andres Salomon <dilinger@queued.net>");
370MODULE_DESCRIPTION("CS5535/CS5536 MFGPT timer driver"); 370MODULE_DESCRIPTION("CS5535/CS5536 MFGPT timer driver");
371MODULE_LICENSE("GPL"); 371MODULE_LICENSE("GPL");
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c
index af217924a76e..ad30f074ee15 100644
--- a/drivers/mmc/host/sdhci-s3c.c
+++ b/drivers/mmc/host/sdhci-s3c.c
@@ -365,6 +365,26 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
365 365
366static int __devexit sdhci_s3c_remove(struct platform_device *pdev) 366static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
367{ 367{
368 struct sdhci_host *host = platform_get_drvdata(pdev);
369 struct sdhci_s3c *sc = sdhci_priv(host);
370 int ptr;
371
372 sdhci_remove_host(host, 1);
373
374 for (ptr = 0; ptr < 3; ptr++) {
375 clk_disable(sc->clk_bus[ptr]);
376 clk_put(sc->clk_bus[ptr]);
377 }
378 clk_disable(sc->clk_io);
379 clk_put(sc->clk_io);
380
381 iounmap(host->ioaddr);
382 release_resource(sc->ioarea);
383 kfree(sc->ioarea);
384
385 sdhci_free_host(host);
386 platform_set_drvdata(pdev, NULL);
387
368 return 0; 388 return 0;
369} 389}
370 390
diff --git a/drivers/net/bonding/bond_alb.c b/drivers/net/bonding/bond_alb.c
index 40fdc41446cc..df483076eda6 100644
--- a/drivers/net/bonding/bond_alb.c
+++ b/drivers/net/bonding/bond_alb.c
@@ -340,7 +340,8 @@ static void rlb_update_entry_from_arp(struct bonding *bond, struct arp_pkt *arp)
340 340
341 if ((client_info->assigned) && 341 if ((client_info->assigned) &&
342 (client_info->ip_src == arp->ip_dst) && 342 (client_info->ip_src == arp->ip_dst) &&
343 (client_info->ip_dst == arp->ip_src)) { 343 (client_info->ip_dst == arp->ip_src) &&
344 (compare_ether_addr_64bits(client_info->mac_dst, arp->mac_src))) {
344 /* update the clients MAC address */ 345 /* update the clients MAC address */
345 memcpy(client_info->mac_dst, arp->mac_src, ETH_ALEN); 346 memcpy(client_info->mac_dst, arp->mac_src, ETH_ALEN);
346 client_info->ntt = 1; 347 client_info->ntt = 1;
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 5e12462a9d5e..c3d98dde2f86 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -168,7 +168,7 @@ static int arp_ip_count;
168static int bond_mode = BOND_MODE_ROUNDROBIN; 168static int bond_mode = BOND_MODE_ROUNDROBIN;
169static int xmit_hashtype = BOND_XMIT_POLICY_LAYER2; 169static int xmit_hashtype = BOND_XMIT_POLICY_LAYER2;
170static int lacp_fast; 170static int lacp_fast;
171 171static int disable_netpoll = 1;
172 172
173const struct bond_parm_tbl bond_lacp_tbl[] = { 173const struct bond_parm_tbl bond_lacp_tbl[] = {
174{ "slow", AD_LACP_SLOW}, 174{ "slow", AD_LACP_SLOW},
@@ -1742,15 +1742,23 @@ int bond_enslave(struct net_device *bond_dev, struct net_device *slave_dev)
1742 bond_set_carrier(bond); 1742 bond_set_carrier(bond);
1743 1743
1744#ifdef CONFIG_NET_POLL_CONTROLLER 1744#ifdef CONFIG_NET_POLL_CONTROLLER
1745 if (slaves_support_netpoll(bond_dev)) { 1745 /*
1746 bond_dev->priv_flags &= ~IFF_DISABLE_NETPOLL; 1746 * Netpoll and bonding is broken, make sure it is not initialized
1747 if (bond_dev->npinfo) 1747 * until it is fixed.
1748 slave_dev->npinfo = bond_dev->npinfo; 1748 */
1749 } else if (!(bond_dev->priv_flags & IFF_DISABLE_NETPOLL)) { 1749 if (disable_netpoll) {
1750 bond_dev->priv_flags |= IFF_DISABLE_NETPOLL; 1750 bond_dev->priv_flags |= IFF_DISABLE_NETPOLL;
1751 pr_info("New slave device %s does not support netpoll\n", 1751 } else {
1752 slave_dev->name); 1752 if (slaves_support_netpoll(bond_dev)) {
1753 pr_info("Disabling netpoll support for %s\n", bond_dev->name); 1753 bond_dev->priv_flags &= ~IFF_DISABLE_NETPOLL;
1754 if (bond_dev->npinfo)
1755 slave_dev->npinfo = bond_dev->npinfo;
1756 } else if (!(bond_dev->priv_flags & IFF_DISABLE_NETPOLL)) {
1757 bond_dev->priv_flags |= IFF_DISABLE_NETPOLL;
1758 pr_info("New slave device %s does not support netpoll\n",
1759 slave_dev->name);
1760 pr_info("Disabling netpoll support for %s\n", bond_dev->name);
1761 }
1754 } 1762 }
1755#endif 1763#endif
1756 read_unlock(&bond->lock); 1764 read_unlock(&bond->lock);
@@ -1950,8 +1958,11 @@ int bond_release(struct net_device *bond_dev, struct net_device *slave_dev)
1950 1958
1951#ifdef CONFIG_NET_POLL_CONTROLLER 1959#ifdef CONFIG_NET_POLL_CONTROLLER
1952 read_lock_bh(&bond->lock); 1960 read_lock_bh(&bond->lock);
1953 if (slaves_support_netpoll(bond_dev)) 1961
1954 bond_dev->priv_flags &= ~IFF_DISABLE_NETPOLL; 1962 /* Make sure netpoll over stays disabled until fixed. */
1963 if (!disable_netpoll)
1964 if (slaves_support_netpoll(bond_dev))
1965 bond_dev->priv_flags &= ~IFF_DISABLE_NETPOLL;
1955 read_unlock_bh(&bond->lock); 1966 read_unlock_bh(&bond->lock);
1956 if (slave_dev->netdev_ops->ndo_netpoll_cleanup) 1967 if (slave_dev->netdev_ops->ndo_netpoll_cleanup)
1957 slave_dev->netdev_ops->ndo_netpoll_cleanup(slave_dev); 1968 slave_dev->netdev_ops->ndo_netpoll_cleanup(slave_dev);
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c
index 7acb3edc47ef..2602852cc55a 100644
--- a/drivers/net/ibmveth.c
+++ b/drivers/net/ibmveth.c
@@ -677,7 +677,7 @@ static int ibmveth_close(struct net_device *netdev)
677 if (!adapter->pool_config) 677 if (!adapter->pool_config)
678 netif_stop_queue(netdev); 678 netif_stop_queue(netdev);
679 679
680 free_irq(netdev->irq, netdev); 680 h_vio_signal(adapter->vdev->unit_address, VIO_IRQ_DISABLE);
681 681
682 do { 682 do {
683 lpar_rc = h_free_logical_lan(adapter->vdev->unit_address); 683 lpar_rc = h_free_logical_lan(adapter->vdev->unit_address);
@@ -689,6 +689,8 @@ static int ibmveth_close(struct net_device *netdev)
689 lpar_rc); 689 lpar_rc);
690 } 690 }
691 691
692 free_irq(netdev->irq, netdev);
693
692 adapter->rx_no_buffer = *(u64*)(((char*)adapter->buffer_list_addr) + 4096 - 8); 694 adapter->rx_no_buffer = *(u64*)(((char*)adapter->buffer_list_addr) + 4096 - 8);
693 695
694 ibmveth_cleanup(adapter); 696 ibmveth_cleanup(adapter);
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index ce30c62a97f7..7b5d9764f317 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -3684,10 +3684,6 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
3684 /* signal that we are down to the interrupt handler */ 3684 /* signal that we are down to the interrupt handler */
3685 set_bit(__IXGBE_DOWN, &adapter->state); 3685 set_bit(__IXGBE_DOWN, &adapter->state);
3686 3686
3687 /* power down the optics */
3688 if (hw->phy.multispeed_fiber)
3689 hw->mac.ops.disable_tx_laser(hw);
3690
3691 /* disable receive for all VFs and wait one second */ 3687 /* disable receive for all VFs and wait one second */
3692 if (adapter->num_vfs) { 3688 if (adapter->num_vfs) {
3693 /* ping all the active vfs to let them know we are going down */ 3689 /* ping all the active vfs to let them know we are going down */
@@ -3742,6 +3738,10 @@ void ixgbe_down(struct ixgbe_adapter *adapter)
3742 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) & 3738 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
3743 ~IXGBE_DMATXCTL_TE)); 3739 ~IXGBE_DMATXCTL_TE));
3744 3740
3741 /* power down the optics */
3742 if (hw->phy.multispeed_fiber)
3743 hw->mac.ops.disable_tx_laser(hw);
3744
3745 /* clear n-tuple filters that are cached */ 3745 /* clear n-tuple filters that are cached */
3746 ethtool_ntuple_flush(netdev); 3746 ethtool_ntuple_flush(netdev);
3747 3747
@@ -4001,7 +4001,7 @@ static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
4001 4001
4002done: 4002done:
4003 /* Notify the stack of the (possibly) reduced Tx Queue count. */ 4003 /* Notify the stack of the (possibly) reduced Tx Queue count. */
4004 adapter->netdev->real_num_tx_queues = adapter->num_tx_queues; 4004 netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
4005} 4005}
4006 4006
4007static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter, 4007static void ixgbe_acquire_msix_vectors(struct ixgbe_adapter *adapter,
@@ -5195,7 +5195,6 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5195 ixgbe_free_all_tx_resources(adapter); 5195 ixgbe_free_all_tx_resources(adapter);
5196 ixgbe_free_all_rx_resources(adapter); 5196 ixgbe_free_all_rx_resources(adapter);
5197 } 5197 }
5198 ixgbe_clear_interrupt_scheme(adapter);
5199 5198
5200#ifdef CONFIG_PM 5199#ifdef CONFIG_PM
5201 retval = pci_save_state(pdev); 5200 retval = pci_save_state(pdev);
@@ -5230,6 +5229,8 @@ static int __ixgbe_shutdown(struct pci_dev *pdev, bool *enable_wake)
5230 5229
5231 *enable_wake = !!wufc; 5230 *enable_wake = !!wufc;
5232 5231
5232 ixgbe_clear_interrupt_scheme(adapter);
5233
5233 ixgbe_release_hw_control(adapter); 5234 ixgbe_release_hw_control(adapter);
5234 5235
5235 pci_disable_device(pdev); 5236 pci_disable_device(pdev);
@@ -6023,7 +6024,6 @@ static void ixgbe_tx_queue(struct ixgbe_adapter *adapter,
6023static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb, 6024static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb,
6024 int queue, u32 tx_flags) 6025 int queue, u32 tx_flags)
6025{ 6026{
6026 /* Right now, we support IPv4 only */
6027 struct ixgbe_atr_input atr_input; 6027 struct ixgbe_atr_input atr_input;
6028 struct tcphdr *th; 6028 struct tcphdr *th;
6029 struct iphdr *iph = ip_hdr(skb); 6029 struct iphdr *iph = ip_hdr(skb);
@@ -6032,6 +6032,9 @@ static void ixgbe_atr(struct ixgbe_adapter *adapter, struct sk_buff *skb,
6032 u32 src_ipv4_addr, dst_ipv4_addr; 6032 u32 src_ipv4_addr, dst_ipv4_addr;
6033 u8 l4type = 0; 6033 u8 l4type = 0;
6034 6034
6035 /* Right now, we support IPv4 only */
6036 if (skb->protocol != htons(ETH_P_IP))
6037 return;
6035 /* check if we're UDP or TCP */ 6038 /* check if we're UDP or TCP */
6036 if (iph->protocol == IPPROTO_TCP) { 6039 if (iph->protocol == IPPROTO_TCP) {
6037 th = tcp_hdr(skb); 6040 th = tcp_hdr(skb);
diff --git a/drivers/net/ll_temac_main.c b/drivers/net/ll_temac_main.c
index 52dcc8495647..6474c4973d3a 100644
--- a/drivers/net/ll_temac_main.c
+++ b/drivers/net/ll_temac_main.c
@@ -964,7 +964,7 @@ temac_of_probe(struct of_device *op, const struct of_device_id *match)
964 np = of_parse_phandle(op->dev.of_node, "llink-connected", 0); 964 np = of_parse_phandle(op->dev.of_node, "llink-connected", 0);
965 if (!np) { 965 if (!np) {
966 dev_err(&op->dev, "could not find DMA node\n"); 966 dev_err(&op->dev, "could not find DMA node\n");
967 goto nodev; 967 goto err_iounmap;
968 } 968 }
969 969
970 /* Setup the DMA register accesses, could be DCR or memory mapped */ 970 /* Setup the DMA register accesses, could be DCR or memory mapped */
@@ -978,7 +978,7 @@ temac_of_probe(struct of_device *op, const struct of_device_id *match)
978 dev_dbg(&op->dev, "MEM base: %p\n", lp->sdma_regs); 978 dev_dbg(&op->dev, "MEM base: %p\n", lp->sdma_regs);
979 } else { 979 } else {
980 dev_err(&op->dev, "unable to map DMA registers\n"); 980 dev_err(&op->dev, "unable to map DMA registers\n");
981 goto nodev; 981 goto err_iounmap;
982 } 982 }
983 } 983 }
984 984
@@ -987,7 +987,7 @@ temac_of_probe(struct of_device *op, const struct of_device_id *match)
987 if ((lp->rx_irq == NO_IRQ) || (lp->tx_irq == NO_IRQ)) { 987 if ((lp->rx_irq == NO_IRQ) || (lp->tx_irq == NO_IRQ)) {
988 dev_err(&op->dev, "could not determine irqs\n"); 988 dev_err(&op->dev, "could not determine irqs\n");
989 rc = -ENOMEM; 989 rc = -ENOMEM;
990 goto nodev; 990 goto err_iounmap_2;
991 } 991 }
992 992
993 of_node_put(np); /* Finished with the DMA node; drop the reference */ 993 of_node_put(np); /* Finished with the DMA node; drop the reference */
@@ -997,7 +997,7 @@ temac_of_probe(struct of_device *op, const struct of_device_id *match)
997 if ((!addr) || (size != 6)) { 997 if ((!addr) || (size != 6)) {
998 dev_err(&op->dev, "could not find MAC address\n"); 998 dev_err(&op->dev, "could not find MAC address\n");
999 rc = -ENODEV; 999 rc = -ENODEV;
1000 goto nodev; 1000 goto err_iounmap_2;
1001 } 1001 }
1002 temac_set_mac_address(ndev, (void *)addr); 1002 temac_set_mac_address(ndev, (void *)addr);
1003 1003
@@ -1013,7 +1013,7 @@ temac_of_probe(struct of_device *op, const struct of_device_id *match)
1013 rc = sysfs_create_group(&lp->dev->kobj, &temac_attr_group); 1013 rc = sysfs_create_group(&lp->dev->kobj, &temac_attr_group);
1014 if (rc) { 1014 if (rc) {
1015 dev_err(lp->dev, "Error creating sysfs files\n"); 1015 dev_err(lp->dev, "Error creating sysfs files\n");
1016 goto nodev; 1016 goto err_iounmap_2;
1017 } 1017 }
1018 1018
1019 rc = register_netdev(lp->ndev); 1019 rc = register_netdev(lp->ndev);
@@ -1026,6 +1026,11 @@ temac_of_probe(struct of_device *op, const struct of_device_id *match)
1026 1026
1027 err_register_ndev: 1027 err_register_ndev:
1028 sysfs_remove_group(&lp->dev->kobj, &temac_attr_group); 1028 sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
1029 err_iounmap_2:
1030 if (lp->sdma_regs)
1031 iounmap(lp->sdma_regs);
1032 err_iounmap:
1033 iounmap(lp->regs);
1029 nodev: 1034 nodev:
1030 free_netdev(ndev); 1035 free_netdev(ndev);
1031 ndev = NULL; 1036 ndev = NULL;
@@ -1044,6 +1049,9 @@ static int __devexit temac_of_remove(struct of_device *op)
1044 of_node_put(lp->phy_node); 1049 of_node_put(lp->phy_node);
1045 lp->phy_node = NULL; 1050 lp->phy_node = NULL;
1046 dev_set_drvdata(&op->dev, NULL); 1051 dev_set_drvdata(&op->dev, NULL);
1052 iounmap(lp->regs);
1053 if (lp->sdma_regs)
1054 iounmap(lp->sdma_regs);
1047 free_netdev(ndev); 1055 free_netdev(ndev);
1048 return 0; 1056 return 0;
1049} 1057}
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index e345ec8cb473..73bb8ea6f54a 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -289,6 +289,7 @@ struct mv643xx_eth_shared_private {
289 unsigned int t_clk; 289 unsigned int t_clk;
290 int extended_rx_coal_limit; 290 int extended_rx_coal_limit;
291 int tx_bw_control; 291 int tx_bw_control;
292 int tx_csum_limit;
292}; 293};
293 294
294#define TX_BW_CONTROL_ABSENT 0 295#define TX_BW_CONTROL_ABSENT 0
@@ -776,13 +777,16 @@ static int txq_submit_skb(struct tx_queue *txq, struct sk_buff *skb)
776 l4i_chk = 0; 777 l4i_chk = 0;
777 778
778 if (skb->ip_summed == CHECKSUM_PARTIAL) { 779 if (skb->ip_summed == CHECKSUM_PARTIAL) {
780 int hdr_len;
779 int tag_bytes; 781 int tag_bytes;
780 782
781 BUG_ON(skb->protocol != htons(ETH_P_IP) && 783 BUG_ON(skb->protocol != htons(ETH_P_IP) &&
782 skb->protocol != htons(ETH_P_8021Q)); 784 skb->protocol != htons(ETH_P_8021Q));
783 785
784 tag_bytes = (void *)ip_hdr(skb) - (void *)skb->data - ETH_HLEN; 786 hdr_len = (void *)ip_hdr(skb) - (void *)skb->data;
785 if (unlikely(tag_bytes & ~12)) { 787 tag_bytes = hdr_len - ETH_HLEN;
788 if (skb->len - hdr_len > mp->shared->tx_csum_limit ||
789 unlikely(tag_bytes & ~12)) {
786 if (skb_checksum_help(skb) == 0) 790 if (skb_checksum_help(skb) == 0)
787 goto no_csum; 791 goto no_csum;
788 kfree_skb(skb); 792 kfree_skb(skb);
@@ -2666,6 +2670,7 @@ static int mv643xx_eth_shared_probe(struct platform_device *pdev)
2666 * Detect hardware parameters. 2670 * Detect hardware parameters.
2667 */ 2671 */
2668 msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000; 2672 msp->t_clk = (pd != NULL && pd->t_clk != 0) ? pd->t_clk : 133000000;
2673 msp->tx_csum_limit = pd->tx_csum_limit ? pd->tx_csum_limit : 9 * 1024;
2669 infer_hw_params(msp); 2674 infer_hw_params(msp);
2670 2675
2671 platform_set_drvdata(pdev, msp); 2676 platform_set_drvdata(pdev, msp);
diff --git a/drivers/net/ne.c b/drivers/net/ne.c
index b8e2923a1d69..1063093b3afc 100644
--- a/drivers/net/ne.c
+++ b/drivers/net/ne.c
@@ -806,8 +806,10 @@ static int __init ne_drv_probe(struct platform_device *pdev)
806 dev->base_addr = res->start; 806 dev->base_addr = res->start;
807 dev->irq = platform_get_irq(pdev, 0); 807 dev->irq = platform_get_irq(pdev, 0);
808 } else { 808 } else {
809 if (this_dev < 0 || this_dev >= MAX_NE_CARDS) 809 if (this_dev < 0 || this_dev >= MAX_NE_CARDS) {
810 free_netdev(dev);
810 return -EINVAL; 811 return -EINVAL;
812 }
811 dev->base_addr = io[this_dev]; 813 dev->base_addr = io[this_dev];
812 dev->irq = irq[this_dev]; 814 dev->irq = irq[this_dev];
813 dev->mem_end = bad[this_dev]; 815 dev->mem_end = bad[this_dev];
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c
index 5b3dfb4ab279..33525bf2a3d3 100644
--- a/drivers/net/pcmcia/axnet_cs.c
+++ b/drivers/net/pcmcia/axnet_cs.c
@@ -1168,6 +1168,7 @@ static irqreturn_t ax_interrupt(int irq, void *dev_id)
1168 int interrupts, nr_serviced = 0, i; 1168 int interrupts, nr_serviced = 0, i;
1169 struct ei_device *ei_local; 1169 struct ei_device *ei_local;
1170 int handled = 0; 1170 int handled = 0;
1171 unsigned long flags;
1171 1172
1172 e8390_base = dev->base_addr; 1173 e8390_base = dev->base_addr;
1173 ei_local = netdev_priv(dev); 1174 ei_local = netdev_priv(dev);
@@ -1176,7 +1177,7 @@ static irqreturn_t ax_interrupt(int irq, void *dev_id)
1176 * Protect the irq test too. 1177 * Protect the irq test too.
1177 */ 1178 */
1178 1179
1179 spin_lock(&ei_local->page_lock); 1180 spin_lock_irqsave(&ei_local->page_lock, flags);
1180 1181
1181 if (ei_local->irqlock) 1182 if (ei_local->irqlock)
1182 { 1183 {
@@ -1188,7 +1189,7 @@ static irqreturn_t ax_interrupt(int irq, void *dev_id)
1188 dev->name, inb_p(e8390_base + EN0_ISR), 1189 dev->name, inb_p(e8390_base + EN0_ISR),
1189 inb_p(e8390_base + EN0_IMR)); 1190 inb_p(e8390_base + EN0_IMR));
1190#endif 1191#endif
1191 spin_unlock(&ei_local->page_lock); 1192 spin_unlock_irqrestore(&ei_local->page_lock, flags);
1192 return IRQ_NONE; 1193 return IRQ_NONE;
1193 } 1194 }
1194 1195
@@ -1261,7 +1262,7 @@ static irqreturn_t ax_interrupt(int irq, void *dev_id)
1261 ei_local->irqlock = 0; 1262 ei_local->irqlock = 0;
1262 outb_p(ENISR_ALL, e8390_base + EN0_IMR); 1263 outb_p(ENISR_ALL, e8390_base + EN0_IMR);
1263 1264
1264 spin_unlock(&ei_local->page_lock); 1265 spin_unlock_irqrestore(&ei_local->page_lock, flags);
1265 return IRQ_RETVAL(handled); 1266 return IRQ_RETVAL(handled);
1266} 1267}
1267 1268
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index fa4b24c49f42..d10bcefc0e45 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -4611,8 +4611,7 @@ static void ql_timer(unsigned long data)
4611 return; 4611 return;
4612 } 4612 }
4613 4613
4614 qdev->timer.expires = jiffies + (5*HZ); 4614 mod_timer(&qdev->timer, jiffies + (5*HZ));
4615 add_timer(&qdev->timer);
4616} 4615}
4617 4616
4618static int __devinit qlge_probe(struct pci_dev *pdev, 4617static int __devinit qlge_probe(struct pci_dev *pdev,
@@ -4713,6 +4712,8 @@ static void ql_eeh_close(struct net_device *ndev)
4713 netif_stop_queue(ndev); 4712 netif_stop_queue(ndev);
4714 } 4713 }
4715 4714
4715 /* Disabling the timer */
4716 del_timer_sync(&qdev->timer);
4716 if (test_bit(QL_ADAPTER_UP, &qdev->flags)) 4717 if (test_bit(QL_ADAPTER_UP, &qdev->flags))
4717 cancel_delayed_work_sync(&qdev->asic_reset_work); 4718 cancel_delayed_work_sync(&qdev->asic_reset_work);
4718 cancel_delayed_work_sync(&qdev->mpi_reset_work); 4719 cancel_delayed_work_sync(&qdev->mpi_reset_work);
@@ -4808,8 +4809,7 @@ static void qlge_io_resume(struct pci_dev *pdev)
4808 netif_err(qdev, ifup, qdev->ndev, 4809 netif_err(qdev, ifup, qdev->ndev,
4809 "Device was not running prior to EEH.\n"); 4810 "Device was not running prior to EEH.\n");
4810 } 4811 }
4811 qdev->timer.expires = jiffies + (5*HZ); 4812 mod_timer(&qdev->timer, jiffies + (5*HZ));
4812 add_timer(&qdev->timer);
4813 netif_device_attach(ndev); 4813 netif_device_attach(ndev);
4814} 4814}
4815 4815
@@ -4871,8 +4871,7 @@ static int qlge_resume(struct pci_dev *pdev)
4871 return err; 4871 return err;
4872 } 4872 }
4873 4873
4874 qdev->timer.expires = jiffies + (5*HZ); 4874 mod_timer(&qdev->timer, jiffies + (5*HZ));
4875 add_timer(&qdev->timer);
4876 netif_device_attach(ndev); 4875 netif_device_attach(ndev);
4877 4876
4878 return 0; 4877 return 0;
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 96b6cfbf0a3a..cdc6a5c2e70d 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -1316,7 +1316,7 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1316 { 0x7c800000, 0x28000000, RTL_GIGA_MAC_VER_26 }, 1316 { 0x7c800000, 0x28000000, RTL_GIGA_MAC_VER_26 },
1317 1317
1318 /* 8168C family. */ 1318 /* 8168C family. */
1319 { 0x7cf00000, 0x3ca00000, RTL_GIGA_MAC_VER_24 }, 1319 { 0x7cf00000, 0x3cb00000, RTL_GIGA_MAC_VER_24 },
1320 { 0x7cf00000, 0x3c900000, RTL_GIGA_MAC_VER_23 }, 1320 { 0x7cf00000, 0x3c900000, RTL_GIGA_MAC_VER_23 },
1321 { 0x7cf00000, 0x3c800000, RTL_GIGA_MAC_VER_18 }, 1321 { 0x7cf00000, 0x3c800000, RTL_GIGA_MAC_VER_18 },
1322 { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_24 }, 1322 { 0x7c800000, 0x3c800000, RTL_GIGA_MAC_VER_24 },
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index 668327ccd8d0..1d37f0c310ca 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -3130,7 +3130,6 @@ static void tx_intr_handler(struct fifo_info *fifo_data)
3130 pkt_cnt++; 3130 pkt_cnt++;
3131 3131
3132 /* Updating the statistics block */ 3132 /* Updating the statistics block */
3133 nic->dev->stats.tx_bytes += skb->len;
3134 swstats->mem_freed += skb->truesize; 3133 swstats->mem_freed += skb->truesize;
3135 dev_kfree_skb_irq(skb); 3134 dev_kfree_skb_irq(skb);
3136 3135
@@ -4901,48 +4900,81 @@ static void s2io_updt_stats(struct s2io_nic *sp)
4901 * Return value: 4900 * Return value:
4902 * pointer to the updated net_device_stats structure. 4901 * pointer to the updated net_device_stats structure.
4903 */ 4902 */
4904
4905static struct net_device_stats *s2io_get_stats(struct net_device *dev) 4903static struct net_device_stats *s2io_get_stats(struct net_device *dev)
4906{ 4904{
4907 struct s2io_nic *sp = netdev_priv(dev); 4905 struct s2io_nic *sp = netdev_priv(dev);
4908 struct config_param *config = &sp->config;
4909 struct mac_info *mac_control = &sp->mac_control; 4906 struct mac_info *mac_control = &sp->mac_control;
4910 struct stat_block *stats = mac_control->stats_info; 4907 struct stat_block *stats = mac_control->stats_info;
4911 int i; 4908 u64 delta;
4912 4909
4913 /* Configure Stats for immediate updt */ 4910 /* Configure Stats for immediate updt */
4914 s2io_updt_stats(sp); 4911 s2io_updt_stats(sp);
4915 4912
4916 /* Using sp->stats as a staging area, because reset (due to mtu 4913 /* A device reset will cause the on-adapter statistics to be zero'ed.
4917 change, for example) will clear some hardware counters */ 4914 * This can be done while running by changing the MTU. To prevent the
4918 dev->stats.tx_packets += le32_to_cpu(stats->tmac_frms) - 4915 * system from having the stats zero'ed, the driver keeps a copy of the
4919 sp->stats.tx_packets; 4916 * last update to the system (which is also zero'ed on reset). This
4920 sp->stats.tx_packets = le32_to_cpu(stats->tmac_frms); 4917 * enables the driver to accurately know the delta between the last
4921 4918 * update and the current update.
4922 dev->stats.tx_errors += le32_to_cpu(stats->tmac_any_err_frms) - 4919 */
4923 sp->stats.tx_errors; 4920 delta = ((u64) le32_to_cpu(stats->rmac_vld_frms_oflow) << 32 |
4924 sp->stats.tx_errors = le32_to_cpu(stats->tmac_any_err_frms); 4921 le32_to_cpu(stats->rmac_vld_frms)) - sp->stats.rx_packets;
4925 4922 sp->stats.rx_packets += delta;
4926 dev->stats.rx_errors += le64_to_cpu(stats->rmac_drop_frms) - 4923 dev->stats.rx_packets += delta;
4927 sp->stats.rx_errors; 4924
4928 sp->stats.rx_errors = le64_to_cpu(stats->rmac_drop_frms); 4925 delta = ((u64) le32_to_cpu(stats->tmac_frms_oflow) << 32 |
4929 4926 le32_to_cpu(stats->tmac_frms)) - sp->stats.tx_packets;
4930 dev->stats.multicast = le32_to_cpu(stats->rmac_vld_mcst_frms) - 4927 sp->stats.tx_packets += delta;
4931 sp->stats.multicast; 4928 dev->stats.tx_packets += delta;
4932 sp->stats.multicast = le32_to_cpu(stats->rmac_vld_mcst_frms); 4929
4933 4930 delta = ((u64) le32_to_cpu(stats->rmac_data_octets_oflow) << 32 |
4934 dev->stats.rx_length_errors = le64_to_cpu(stats->rmac_long_frms) - 4931 le32_to_cpu(stats->rmac_data_octets)) - sp->stats.rx_bytes;
4935 sp->stats.rx_length_errors; 4932 sp->stats.rx_bytes += delta;
4936 sp->stats.rx_length_errors = le64_to_cpu(stats->rmac_long_frms); 4933 dev->stats.rx_bytes += delta;
4934
4935 delta = ((u64) le32_to_cpu(stats->tmac_data_octets_oflow) << 32 |
4936 le32_to_cpu(stats->tmac_data_octets)) - sp->stats.tx_bytes;
4937 sp->stats.tx_bytes += delta;
4938 dev->stats.tx_bytes += delta;
4939
4940 delta = le64_to_cpu(stats->rmac_drop_frms) - sp->stats.rx_errors;
4941 sp->stats.rx_errors += delta;
4942 dev->stats.rx_errors += delta;
4943
4944 delta = ((u64) le32_to_cpu(stats->tmac_any_err_frms_oflow) << 32 |
4945 le32_to_cpu(stats->tmac_any_err_frms)) - sp->stats.tx_errors;
4946 sp->stats.tx_errors += delta;
4947 dev->stats.tx_errors += delta;
4948
4949 delta = le64_to_cpu(stats->rmac_drop_frms) - sp->stats.rx_dropped;
4950 sp->stats.rx_dropped += delta;
4951 dev->stats.rx_dropped += delta;
4952
4953 delta = le64_to_cpu(stats->tmac_drop_frms) - sp->stats.tx_dropped;
4954 sp->stats.tx_dropped += delta;
4955 dev->stats.tx_dropped += delta;
4956
4957 /* The adapter MAC interprets pause frames as multicast packets, but
4958 * does not pass them up. This erroneously increases the multicast
4959 * packet count and needs to be deducted when the multicast frame count
4960 * is queried.
4961 */
4962 delta = (u64) le32_to_cpu(stats->rmac_vld_mcst_frms_oflow) << 32 |
4963 le32_to_cpu(stats->rmac_vld_mcst_frms);
4964 delta -= le64_to_cpu(stats->rmac_pause_ctrl_frms);
4965 delta -= sp->stats.multicast;
4966 sp->stats.multicast += delta;
4967 dev->stats.multicast += delta;
4937 4968
4938 /* collect per-ring rx_packets and rx_bytes */ 4969 delta = ((u64) le32_to_cpu(stats->rmac_usized_frms_oflow) << 32 |
4939 dev->stats.rx_packets = dev->stats.rx_bytes = 0; 4970 le32_to_cpu(stats->rmac_usized_frms)) +
4940 for (i = 0; i < config->rx_ring_num; i++) { 4971 le64_to_cpu(stats->rmac_long_frms) - sp->stats.rx_length_errors;
4941 struct ring_info *ring = &mac_control->rings[i]; 4972 sp->stats.rx_length_errors += delta;
4973 dev->stats.rx_length_errors += delta;
4942 4974
4943 dev->stats.rx_packets += ring->rx_packets; 4975 delta = le64_to_cpu(stats->rmac_fcs_err_frms) - sp->stats.rx_crc_errors;
4944 dev->stats.rx_bytes += ring->rx_bytes; 4976 sp->stats.rx_crc_errors += delta;
4945 } 4977 dev->stats.rx_crc_errors += delta;
4946 4978
4947 return &dev->stats; 4979 return &dev->stats;
4948} 4980}
@@ -7455,15 +7487,11 @@ static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
7455 } 7487 }
7456 } 7488 }
7457 7489
7458 /* Updating statistics */
7459 ring_data->rx_packets++;
7460 rxdp->Host_Control = 0; 7490 rxdp->Host_Control = 0;
7461 if (sp->rxd_mode == RXD_MODE_1) { 7491 if (sp->rxd_mode == RXD_MODE_1) {
7462 int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2); 7492 int len = RXD_GET_BUFFER0_SIZE_1(rxdp->Control_2);
7463 7493
7464 ring_data->rx_bytes += len;
7465 skb_put(skb, len); 7494 skb_put(skb, len);
7466
7467 } else if (sp->rxd_mode == RXD_MODE_3B) { 7495 } else if (sp->rxd_mode == RXD_MODE_3B) {
7468 int get_block = ring_data->rx_curr_get_info.block_index; 7496 int get_block = ring_data->rx_curr_get_info.block_index;
7469 int get_off = ring_data->rx_curr_get_info.offset; 7497 int get_off = ring_data->rx_curr_get_info.offset;
@@ -7472,7 +7500,6 @@ static int rx_osm_handler(struct ring_info *ring_data, struct RxD_t * rxdp)
7472 unsigned char *buff = skb_push(skb, buf0_len); 7500 unsigned char *buff = skb_push(skb, buf0_len);
7473 7501
7474 struct buffAdd *ba = &ring_data->ba[get_block][get_off]; 7502 struct buffAdd *ba = &ring_data->ba[get_block][get_off];
7475 ring_data->rx_bytes += buf0_len + buf2_len;
7476 memcpy(buff, ba->ba_0, buf0_len); 7503 memcpy(buff, ba->ba_0, buf0_len);
7477 skb_put(skb, buf2_len); 7504 skb_put(skb, buf2_len);
7478 } 7505 }
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h
index 47c36e0994f5..5e52c75892df 100644
--- a/drivers/net/s2io.h
+++ b/drivers/net/s2io.h
@@ -745,10 +745,6 @@ struct ring_info {
745 745
746 /* Buffer Address store. */ 746 /* Buffer Address store. */
747 struct buffAdd **ba; 747 struct buffAdd **ba;
748
749 /* per-Ring statistics */
750 unsigned long rx_packets;
751 unsigned long rx_bytes;
752} ____cacheline_aligned; 748} ____cacheline_aligned;
753 749
754/* Fifo specific structure */ 750/* Fifo specific structure */
diff --git a/drivers/net/sb1250-mac.c b/drivers/net/sb1250-mac.c
index 1f3acc3a5dfd..79eee3062083 100644
--- a/drivers/net/sb1250-mac.c
+++ b/drivers/net/sb1250-mac.c
@@ -2671,6 +2671,7 @@ static struct platform_driver sbmac_driver = {
2671 .remove = __exit_p(sbmac_remove), 2671 .remove = __exit_p(sbmac_remove),
2672 .driver = { 2672 .driver = {
2673 .name = sbmac_string, 2673 .name = sbmac_string,
2674 .owner = THIS_MODULE,
2674 }, 2675 },
2675}; 2676};
2676 2677
diff --git a/drivers/net/usb/rndis_host.c b/drivers/net/usb/rndis_host.c
index 28d3ee175e7b..dd8a4adf48ca 100644
--- a/drivers/net/usb/rndis_host.c
+++ b/drivers/net/usb/rndis_host.c
@@ -104,10 +104,8 @@ static void rndis_msg_indicate(struct usbnet *dev, struct rndis_indicate *msg,
104int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen) 104int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen)
105{ 105{
106 struct cdc_state *info = (void *) &dev->data; 106 struct cdc_state *info = (void *) &dev->data;
107 struct usb_cdc_notification notification;
108 int master_ifnum; 107 int master_ifnum;
109 int retval; 108 int retval;
110 int partial;
111 unsigned count; 109 unsigned count;
112 __le32 rsp; 110 __le32 rsp;
113 u32 xid = 0, msg_len, request_id; 111 u32 xid = 0, msg_len, request_id;
@@ -135,17 +133,13 @@ int rndis_command(struct usbnet *dev, struct rndis_msg_hdr *buf, int buflen)
135 if (unlikely(retval < 0 || xid == 0)) 133 if (unlikely(retval < 0 || xid == 0))
136 return retval; 134 return retval;
137 135
138 /* Some devices don't respond on the control channel until 136 // FIXME Seems like some devices discard responses when
139 * polled on the status channel, so do that first. */ 137 // we time out and cancel our "get response" requests...
140 retval = usb_interrupt_msg( 138 // so, this is fragile. Probably need to poll for status.
141 dev->udev,
142 usb_rcvintpipe(dev->udev, dev->status->desc.bEndpointAddress),
143 &notification, sizeof(notification), &partial,
144 RNDIS_CONTROL_TIMEOUT_MS);
145 if (unlikely(retval < 0))
146 return retval;
147 139
148 /* Poll the control channel; the request probably completed immediately */ 140 /* ignore status endpoint, just poll the control channel;
141 * the request probably completed immediately
142 */
149 rsp = buf->msg_type | RNDIS_MSG_COMPLETION; 143 rsp = buf->msg_type | RNDIS_MSG_COMPLETION;
150 for (count = 0; count < 10; count++) { 144 for (count = 0; count < 10; count++) {
151 memset(buf, 0, CONTROL_BUFFER_SIZE); 145 memset(buf, 0, CONTROL_BUFFER_SIZE);
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c
index a95c73de5824..81c76ada8e56 100644
--- a/drivers/net/usb/usbnet.c
+++ b/drivers/net/usb/usbnet.c
@@ -1293,6 +1293,9 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)
1293 goto out; 1293 goto out;
1294 } 1294 }
1295 1295
1296 /* netdev_printk() needs this so do it as early as possible */
1297 SET_NETDEV_DEV(net, &udev->dev);
1298
1296 dev = netdev_priv(net); 1299 dev = netdev_priv(net);
1297 dev->udev = xdev; 1300 dev->udev = xdev;
1298 dev->intf = udev; 1301 dev->intf = udev;
@@ -1377,8 +1380,6 @@ usbnet_probe (struct usb_interface *udev, const struct usb_device_id *prod)
1377 dev->rx_urb_size = dev->hard_mtu; 1380 dev->rx_urb_size = dev->hard_mtu;
1378 dev->maxpacket = usb_maxpacket (dev->udev, dev->out, 1); 1381 dev->maxpacket = usb_maxpacket (dev->udev, dev->out, 1);
1379 1382
1380 SET_NETDEV_DEV(net, &udev->dev);
1381
1382 if ((dev->driver_info->flags & FLAG_WLAN) != 0) 1383 if ((dev->driver_info->flags & FLAG_WLAN) != 0)
1383 SET_NETDEV_DEVTYPE(net, &wlan_type); 1384 SET_NETDEV_DEVTYPE(net, &wlan_type);
1384 if ((dev->driver_info->flags & FLAG_WWAN) != 0) 1385 if ((dev->driver_info->flags & FLAG_WWAN) != 0)
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 1edb7a61983c..bb6b67f6b0cc 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -415,7 +415,7 @@ static int add_recvbuf_mergeable(struct virtnet_info *vi, gfp_t gfp)
415static bool try_fill_recv(struct virtnet_info *vi, gfp_t gfp) 415static bool try_fill_recv(struct virtnet_info *vi, gfp_t gfp)
416{ 416{
417 int err; 417 int err;
418 bool oom = false; 418 bool oom;
419 419
420 do { 420 do {
421 if (vi->mergeable_rx_bufs) 421 if (vi->mergeable_rx_bufs)
@@ -425,10 +425,9 @@ static bool try_fill_recv(struct virtnet_info *vi, gfp_t gfp)
425 else 425 else
426 err = add_recvbuf_small(vi, gfp); 426 err = add_recvbuf_small(vi, gfp);
427 427
428 if (err < 0) { 428 oom = err == -ENOMEM;
429 oom = true; 429 if (err < 0)
430 break; 430 break;
431 }
432 ++vi->num; 431 ++vi->num;
433 } while (err > 0); 432 } while (err > 0);
434 if (unlikely(vi->num > vi->max)) 433 if (unlikely(vi->num > vi->max))
@@ -563,7 +562,6 @@ static netdev_tx_t start_xmit(struct sk_buff *skb, struct net_device *dev)
563 struct virtnet_info *vi = netdev_priv(dev); 562 struct virtnet_info *vi = netdev_priv(dev);
564 int capacity; 563 int capacity;
565 564
566again:
567 /* Free up any pending old buffers before queueing new ones. */ 565 /* Free up any pending old buffers before queueing new ones. */
568 free_old_xmit_skbs(vi); 566 free_old_xmit_skbs(vi);
569 567
@@ -572,14 +570,20 @@ again:
572 570
573 /* This can happen with OOM and indirect buffers. */ 571 /* This can happen with OOM and indirect buffers. */
574 if (unlikely(capacity < 0)) { 572 if (unlikely(capacity < 0)) {
575 netif_stop_queue(dev); 573 if (net_ratelimit()) {
576 dev_warn(&dev->dev, "Unexpected full queue\n"); 574 if (likely(capacity == -ENOMEM)) {
577 if (unlikely(!virtqueue_enable_cb(vi->svq))) { 575 dev_warn(&dev->dev,
578 virtqueue_disable_cb(vi->svq); 576 "TX queue failure: out of memory\n");
579 netif_start_queue(dev); 577 } else {
580 goto again; 578 dev->stats.tx_fifo_errors++;
579 dev_warn(&dev->dev,
580 "Unexpected TX queue failure: %d\n",
581 capacity);
582 }
581 } 583 }
582 return NETDEV_TX_BUSY; 584 dev->stats.tx_dropped++;
585 kfree_skb(skb);
586 return NETDEV_TX_OK;
583 } 587 }
584 virtqueue_kick(vi->svq); 588 virtqueue_kick(vi->svq);
585 589
diff --git a/drivers/net/vxge/vxge-main.c b/drivers/net/vxge/vxge-main.c
index d14e207de1df..fc8b2d7a0919 100644
--- a/drivers/net/vxge/vxge-main.c
+++ b/drivers/net/vxge/vxge-main.c
@@ -4517,9 +4517,9 @@ vxge_starter(void)
4517 char version[32]; 4517 char version[32];
4518 snprintf(version, 32, "%s", DRV_VERSION); 4518 snprintf(version, 32, "%s", DRV_VERSION);
4519 4519
4520 printk(KERN_CRIT "%s: Copyright(c) 2002-2009 Neterion Inc\n", 4520 printk(KERN_INFO "%s: Copyright(c) 2002-2009 Neterion Inc\n",
4521 VXGE_DRIVER_NAME); 4521 VXGE_DRIVER_NAME);
4522 printk(KERN_CRIT "%s: Driver version: %s\n", 4522 printk(KERN_INFO "%s: Driver version: %s\n",
4523 VXGE_DRIVER_NAME, version); 4523 VXGE_DRIVER_NAME, version);
4524 4524
4525 verify_bandwidth(); 4525 verify_bandwidth();
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h
index fbb7dec6ddeb..5ea87736a6ae 100644
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
@@ -445,6 +445,7 @@ void ath_deinit_leds(struct ath_softc *sc);
445#define SC_OP_TSF_RESET BIT(11) 445#define SC_OP_TSF_RESET BIT(11)
446#define SC_OP_BT_PRIORITY_DETECTED BIT(12) 446#define SC_OP_BT_PRIORITY_DETECTED BIT(12)
447#define SC_OP_BT_SCAN BIT(13) 447#define SC_OP_BT_SCAN BIT(13)
448#define SC_OP_ANI_RUN BIT(14)
448 449
449/* Powersave flags */ 450/* Powersave flags */
450#define PS_WAIT_FOR_BEACON BIT(0) 451#define PS_WAIT_FOR_BEACON BIT(0)
diff --git a/drivers/net/wireless/ath/ath9k/hif_usb.c b/drivers/net/wireless/ath/ath9k/hif_usb.c
index 77b359162d6c..23c15aa9fbd5 100644
--- a/drivers/net/wireless/ath/ath9k/hif_usb.c
+++ b/drivers/net/wireless/ath/ath9k/hif_usb.c
@@ -730,13 +730,17 @@ static int ath9k_hif_usb_alloc_urbs(struct hif_device_usb *hif_dev)
730 730
731 /* RX */ 731 /* RX */
732 if (ath9k_hif_usb_alloc_rx_urbs(hif_dev) < 0) 732 if (ath9k_hif_usb_alloc_rx_urbs(hif_dev) < 0)
733 goto err; 733 goto err_rx;
734 734
735 /* Register Read */ 735 /* Register Read */
736 if (ath9k_hif_usb_alloc_reg_in_urb(hif_dev) < 0) 736 if (ath9k_hif_usb_alloc_reg_in_urb(hif_dev) < 0)
737 goto err; 737 goto err_reg;
738 738
739 return 0; 739 return 0;
740err_reg:
741 ath9k_hif_usb_dealloc_rx_urbs(hif_dev);
742err_rx:
743 ath9k_hif_usb_dealloc_tx_urbs(hif_dev);
740err: 744err:
741 return -ENOMEM; 745 return -ENOMEM;
742} 746}
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c
index abfa0493236f..1e2a68ea9355 100644
--- a/drivers/net/wireless/ath/ath9k/main.c
+++ b/drivers/net/wireless/ath/ath9k/main.c
@@ -336,6 +336,10 @@ set_timer:
336static void ath_start_ani(struct ath_common *common) 336static void ath_start_ani(struct ath_common *common)
337{ 337{
338 unsigned long timestamp = jiffies_to_msecs(jiffies); 338 unsigned long timestamp = jiffies_to_msecs(jiffies);
339 struct ath_softc *sc = (struct ath_softc *) common->priv;
340
341 if (!(sc->sc_flags & SC_OP_ANI_RUN))
342 return;
339 343
340 common->ani.longcal_timer = timestamp; 344 common->ani.longcal_timer = timestamp;
341 common->ani.shortcal_timer = timestamp; 345 common->ani.shortcal_timer = timestamp;
@@ -872,11 +876,13 @@ static void ath9k_bss_assoc_info(struct ath_softc *sc,
872 /* Reset rssi stats */ 876 /* Reset rssi stats */
873 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER; 877 sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
874 878
879 sc->sc_flags |= SC_OP_ANI_RUN;
875 ath_start_ani(common); 880 ath_start_ani(common);
876 } else { 881 } else {
877 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n"); 882 ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
878 common->curaid = 0; 883 common->curaid = 0;
879 /* Stop ANI */ 884 /* Stop ANI */
885 sc->sc_flags &= ~SC_OP_ANI_RUN;
880 del_timer_sync(&common->ani.timer); 886 del_timer_sync(&common->ani.timer);
881 } 887 }
882} 888}
@@ -1478,8 +1484,10 @@ static int ath9k_add_interface(struct ieee80211_hw *hw,
1478 1484
1479 if (vif->type == NL80211_IFTYPE_AP || 1485 if (vif->type == NL80211_IFTYPE_AP ||
1480 vif->type == NL80211_IFTYPE_ADHOC || 1486 vif->type == NL80211_IFTYPE_ADHOC ||
1481 vif->type == NL80211_IFTYPE_MONITOR) 1487 vif->type == NL80211_IFTYPE_MONITOR) {
1488 sc->sc_flags |= SC_OP_ANI_RUN;
1482 ath_start_ani(common); 1489 ath_start_ani(common);
1490 }
1483 1491
1484out: 1492out:
1485 mutex_unlock(&sc->mutex); 1493 mutex_unlock(&sc->mutex);
@@ -1500,6 +1508,7 @@ static void ath9k_remove_interface(struct ieee80211_hw *hw,
1500 mutex_lock(&sc->mutex); 1508 mutex_lock(&sc->mutex);
1501 1509
1502 /* Stop ANI */ 1510 /* Stop ANI */
1511 sc->sc_flags &= ~SC_OP_ANI_RUN;
1503 del_timer_sync(&common->ani.timer); 1512 del_timer_sync(&common->ani.timer);
1504 1513
1505 /* Reclaim beacon resources */ 1514 /* Reclaim beacon resources */
diff --git a/drivers/net/wireless/hostap/hostap_pci.c b/drivers/net/wireless/hostap/hostap_pci.c
index d24dc7dc0723..972a9c3af39e 100644
--- a/drivers/net/wireless/hostap/hostap_pci.c
+++ b/drivers/net/wireless/hostap/hostap_pci.c
@@ -330,6 +330,7 @@ static int prism2_pci_probe(struct pci_dev *pdev,
330 330
331 dev->irq = pdev->irq; 331 dev->irq = pdev->irq;
332 hw_priv->mem_start = mem; 332 hw_priv->mem_start = mem;
333 dev->base_addr = (unsigned long) mem;
333 334
334 prism2_pci_cor_sreset(local); 335 prism2_pci_cor_sreset(local);
335 336
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c
index 44ef5d93befc..01658cf82d39 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-hcmd.c
@@ -212,11 +212,7 @@ static void iwlagn_chain_noise_reset(struct iwl_priv *priv)
212static void iwlagn_rts_tx_cmd_flag(struct ieee80211_tx_info *info, 212static void iwlagn_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
213 __le32 *tx_flags) 213 __le32 *tx_flags)
214{ 214{
215 if ((info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) || 215 *tx_flags |= TX_CMD_FLG_RTS_CTS_MSK;
216 (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT))
217 *tx_flags |= TX_CMD_FLG_RTS_CTS_MSK;
218 else
219 *tx_flags &= ~TX_CMD_FLG_RTS_CTS_MSK;
220} 216}
221 217
222/* Calc max signal level (dBm) among 3 possible receivers */ 218/* Calc max signal level (dBm) among 3 possible receivers */
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c
index 426e95567de3..5bbc5298ef96 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.c
+++ b/drivers/net/wireless/iwlwifi/iwl-core.c
@@ -1314,7 +1314,6 @@ void iwl_configure_filter(struct ieee80211_hw *hw,
1314 changed_flags, *total_flags); 1314 changed_flags, *total_flags);
1315 1315
1316 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); 1316 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
1317 CHK(FIF_ALLMULTI, RXON_FILTER_ACCEPT_GRP_MSK);
1318 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); 1317 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
1319 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); 1318 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
1320 1319
@@ -1329,6 +1328,12 @@ void iwl_configure_filter(struct ieee80211_hw *hw,
1329 1328
1330 mutex_unlock(&priv->mutex); 1329 mutex_unlock(&priv->mutex);
1331 1330
1331 /*
1332 * Receiving all multicast frames is always enabled by the
1333 * default flags setup in iwl_connection_init_rx_config()
1334 * since we currently do not support programming multicast
1335 * filters into the device.
1336 */
1332 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | 1337 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1333 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; 1338 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1334} 1339}
diff --git a/drivers/net/wireless/iwlwifi/iwl-sta.h b/drivers/net/wireless/iwlwifi/iwl-sta.h
index c2a453a1a991..dc43ebd1f1fd 100644
--- a/drivers/net/wireless/iwlwifi/iwl-sta.h
+++ b/drivers/net/wireless/iwlwifi/iwl-sta.h
@@ -97,6 +97,17 @@ static inline void iwl_clear_driver_stations(struct iwl_priv *priv)
97 spin_lock_irqsave(&priv->sta_lock, flags); 97 spin_lock_irqsave(&priv->sta_lock, flags);
98 memset(priv->stations, 0, sizeof(priv->stations)); 98 memset(priv->stations, 0, sizeof(priv->stations));
99 priv->num_stations = 0; 99 priv->num_stations = 0;
100
101 /*
102 * Remove all key information that is not stored as part of station
103 * information since mac80211 may not have had a
104 * chance to remove all the keys. When device is reconfigured by
105 * mac80211 after an error all keys will be reconfigured.
106 */
107 priv->ucode_key_table = 0;
108 priv->key_mapping_key = 0;
109 memset(priv->wep_keys, 0, sizeof(priv->wep_keys));
110
100 spin_unlock_irqrestore(&priv->sta_lock, flags); 111 spin_unlock_irqrestore(&priv->sta_lock, flags);
101} 112}
102 113
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 3ae468c4d760..f20d3eeeea7f 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -854,6 +854,11 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
854 BIT(NL80211_IFTYPE_WDS); 854 BIT(NL80211_IFTYPE_WDS);
855 855
856 /* 856 /*
857 * Initialize configuration work.
858 */
859 INIT_WORK(&rt2x00dev->intf_work, rt2x00lib_intf_scheduled);
860
861 /*
857 * Let the driver probe the device to detect the capabilities. 862 * Let the driver probe the device to detect the capabilities.
858 */ 863 */
859 retval = rt2x00dev->ops->lib->probe_hw(rt2x00dev); 864 retval = rt2x00dev->ops->lib->probe_hw(rt2x00dev);
@@ -863,11 +868,6 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
863 } 868 }
864 869
865 /* 870 /*
866 * Initialize configuration work.
867 */
868 INIT_WORK(&rt2x00dev->intf_work, rt2x00lib_intf_scheduled);
869
870 /*
871 * Allocate queue array. 871 * Allocate queue array.
872 */ 872 */
873 retval = rt2x00queue_allocate(rt2x00dev); 873 retval = rt2x00queue_allocate(rt2x00dev);
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 92379e2d37e7..2aaa13150de3 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -156,6 +156,38 @@ static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
156 pcibios_align_resource, dev); 156 pcibios_align_resource, dev);
157 } 157 }
158 158
159 if (ret < 0 && dev->fw_addr[resno]) {
160 struct resource *root, *conflict;
161 resource_size_t start, end;
162
163 /*
164 * If we failed to assign anything, let's try the address
165 * where firmware left it. That at least has a chance of
166 * working, which is better than just leaving it disabled.
167 */
168
169 if (res->flags & IORESOURCE_IO)
170 root = &ioport_resource;
171 else
172 root = &iomem_resource;
173
174 start = res->start;
175 end = res->end;
176 res->start = dev->fw_addr[resno];
177 res->end = res->start + size - 1;
178 dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
179 resno, res);
180 conflict = request_resource_conflict(root, res);
181 if (conflict) {
182 dev_info(&dev->dev,
183 "BAR %d: %pR conflicts with %s %pR\n", resno,
184 res, conflict->name, conflict);
185 res->start = start;
186 res->end = end;
187 } else
188 ret = 0;
189 }
190
159 if (!ret) { 191 if (!ret) {
160 res->flags &= ~IORESOURCE_STARTALIGN; 192 res->flags &= ~IORESOURCE_STARTALIGN;
161 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res); 193 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
diff --git a/drivers/pcmcia/ds.c b/drivers/pcmcia/ds.c
index 9fc339845538..eac961463be2 100644
--- a/drivers/pcmcia/ds.c
+++ b/drivers/pcmcia/ds.c
@@ -1356,6 +1356,7 @@ static int __devinit pcmcia_bus_add_socket(struct device *dev,
1356 INIT_LIST_HEAD(&socket->devices_list); 1356 INIT_LIST_HEAD(&socket->devices_list);
1357 memset(&socket->pcmcia_state, 0, sizeof(u8)); 1357 memset(&socket->pcmcia_state, 0, sizeof(u8));
1358 socket->device_count = 0; 1358 socket->device_count = 0;
1359 atomic_set(&socket->present, 0);
1359 1360
1360 ret = pccard_register_pcmcia(socket, &pcmcia_bus_callback); 1361 ret = pccard_register_pcmcia(socket, &pcmcia_bus_callback);
1361 if (ret) { 1362 if (ret) {
@@ -1364,8 +1365,6 @@ static int __devinit pcmcia_bus_add_socket(struct device *dev,
1364 return ret; 1365 return ret;
1365 } 1366 }
1366 1367
1367 atomic_set(&socket->present, 0);
1368
1369 return 0; 1368 return 0;
1370} 1369}
1371 1370
diff --git a/drivers/pcmcia/pcmcia_resource.c b/drivers/pcmcia/pcmcia_resource.c
index 29f91fac1dff..a4cd9adfcbc0 100644
--- a/drivers/pcmcia/pcmcia_resource.c
+++ b/drivers/pcmcia/pcmcia_resource.c
@@ -857,8 +857,10 @@ void pcmcia_disable_device(struct pcmcia_device *p_dev)
857{ 857{
858 pcmcia_release_configuration(p_dev); 858 pcmcia_release_configuration(p_dev);
859 pcmcia_release_io(p_dev, &p_dev->io); 859 pcmcia_release_io(p_dev, &p_dev->io);
860 if (p_dev->_irq) 860 if (p_dev->_irq) {
861 free_irq(p_dev->irq, p_dev->priv); 861 free_irq(p_dev->irq, p_dev->priv);
862 p_dev->_irq = 0;
863 }
862 if (p_dev->win) 864 if (p_dev->win)
863 pcmcia_release_window(p_dev, p_dev->win); 865 pcmcia_release_window(p_dev, p_dev->win);
864} 866}
diff --git a/drivers/platform/x86/intel_scu_ipc.c b/drivers/platform/x86/intel_scu_ipc.c
index 40658e3385b4..bb2f1fba637b 100644
--- a/drivers/platform/x86/intel_scu_ipc.c
+++ b/drivers/platform/x86/intel_scu_ipc.c
@@ -489,7 +489,7 @@ int intel_scu_ipc_simple_command(int cmd, int sub)
489 mutex_unlock(&ipclock); 489 mutex_unlock(&ipclock);
490 return -ENODEV; 490 return -ENODEV;
491 } 491 }
492 ipc_command(cmd << 12 | sub); 492 ipc_command(sub << 12 | cmd);
493 err = busy_loop(); 493 err = busy_loop();
494 mutex_unlock(&ipclock); 494 mutex_unlock(&ipclock);
495 return err; 495 return err;
@@ -501,9 +501,9 @@ EXPORT_SYMBOL(intel_scu_ipc_simple_command);
501 * @cmd: command 501 * @cmd: command
502 * @sub: sub type 502 * @sub: sub type
503 * @in: input data 503 * @in: input data
504 * @inlen: input length 504 * @inlen: input length in dwords
505 * @out: output data 505 * @out: output data
506 * @outlein: output length 506 * @outlein: output length in dwords
507 * 507 *
508 * Issue a command to the SCU which involves data transfers. Do the 508 * Issue a command to the SCU which involves data transfers. Do the
509 * data copies under the lock but leave it for the caller to interpret 509 * data copies under the lock but leave it for the caller to interpret
@@ -524,7 +524,7 @@ int intel_scu_ipc_command(int cmd, int sub, u32 *in, int inlen,
524 for (i = 0; i < inlen; i++) 524 for (i = 0; i < inlen; i++)
525 ipc_data_writel(*in++, 4 * i); 525 ipc_data_writel(*in++, 4 * i);
526 526
527 ipc_command((cmd << 12) | sub | (inlen << 18)); 527 ipc_command((sub << 12) | cmd | (inlen << 18));
528 err = busy_loop(); 528 err = busy_loop();
529 529
530 for (i = 0; i < outlen; i++) 530 for (i = 0; i < outlen; i++)
@@ -556,6 +556,10 @@ int intel_scu_ipc_i2c_cntrl(u32 addr, u32 *data)
556 u32 cmd = 0; 556 u32 cmd = 0;
557 557
558 mutex_lock(&ipclock); 558 mutex_lock(&ipclock);
559 if (ipcdev.pdev == NULL) {
560 mutex_unlock(&ipclock);
561 return -ENODEV;
562 }
559 cmd = (addr >> 24) & 0xFF; 563 cmd = (addr >> 24) & 0xFF;
560 if (cmd == IPC_I2C_READ) { 564 if (cmd == IPC_I2C_READ) {
561 writel(addr, ipcdev.i2c_base + IPC_I2C_CNTRL_ADDR); 565 writel(addr, ipcdev.i2c_base + IPC_I2C_CNTRL_ADDR);
diff --git a/drivers/power/ds2782_battery.c b/drivers/power/ds2782_battery.c
index d762a0cbc6af..2afbeec8b791 100644
--- a/drivers/power/ds2782_battery.c
+++ b/drivers/power/ds2782_battery.c
@@ -163,7 +163,7 @@ static int ds2782_get_capacity(struct ds278x_info *info, int *capacity)
163 if (err) 163 if (err)
164 return err; 164 return err;
165 *capacity = raw; 165 *capacity = raw;
166 return raw; 166 return 0;
167} 167}
168 168
169static int ds2786_get_current(struct ds278x_info *info, int *current_uA) 169static int ds2786_get_current(struct ds278x_info *info, int *current_uA)
diff --git a/drivers/s390/block/dasd_devmap.c b/drivers/s390/block/dasd_devmap.c
index 34d51dd4c539..bed7b4634ccd 100644
--- a/drivers/s390/block/dasd_devmap.c
+++ b/drivers/s390/block/dasd_devmap.c
@@ -948,8 +948,10 @@ static ssize_t dasd_alias_show(struct device *dev,
948 if (device->discipline && device->discipline->get_uid && 948 if (device->discipline && device->discipline->get_uid &&
949 !device->discipline->get_uid(device, &uid)) { 949 !device->discipline->get_uid(device, &uid)) {
950 if (uid.type == UA_BASE_PAV_ALIAS || 950 if (uid.type == UA_BASE_PAV_ALIAS ||
951 uid.type == UA_HYPER_PAV_ALIAS) 951 uid.type == UA_HYPER_PAV_ALIAS) {
952 dasd_put_device(device);
952 return sprintf(buf, "1\n"); 953 return sprintf(buf, "1\n");
954 }
953 } 955 }
954 dasd_put_device(device); 956 dasd_put_device(device);
955 957
diff --git a/drivers/s390/cio/chsc.c b/drivers/s390/cio/chsc.c
index ce7cb87479fe..407d0e9adfaf 100644
--- a/drivers/s390/cio/chsc.c
+++ b/drivers/s390/cio/chsc.c
@@ -713,7 +713,7 @@ int chsc_determine_base_channel_path_desc(struct chp_id chpid,
713 ret = chsc_determine_channel_path_desc(chpid, 0, 0, 0, 0, chsc_resp); 713 ret = chsc_determine_channel_path_desc(chpid, 0, 0, 0, 0, chsc_resp);
714 if (ret) 714 if (ret)
715 goto out_free; 715 goto out_free;
716 memcpy(desc, &chsc_resp->data, chsc_resp->length); 716 memcpy(desc, &chsc_resp->data, sizeof(*desc));
717out_free: 717out_free:
718 kfree(chsc_resp); 718 kfree(chsc_resp);
719 return ret; 719 return ret;
diff --git a/drivers/sbus/char/openprom.c b/drivers/sbus/char/openprom.c
index d53e62ab09da..aacbe14e2e7a 100644
--- a/drivers/sbus/char/openprom.c
+++ b/drivers/sbus/char/openprom.c
@@ -554,7 +554,7 @@ static int opiocgetnext(unsigned int cmd, void __user *argp)
554static int openprom_bsd_ioctl(struct file * file, 554static int openprom_bsd_ioctl(struct file * file,
555 unsigned int cmd, unsigned long arg) 555 unsigned int cmd, unsigned long arg)
556{ 556{
557 DATA *data = (DATA *) file->private_data; 557 DATA *data = file->private_data;
558 void __user *argp = (void __user *)arg; 558 void __user *argp = (void __user *)arg;
559 int err; 559 int err;
560 560
@@ -601,7 +601,7 @@ static int openprom_bsd_ioctl(struct file * file,
601static long openprom_ioctl(struct file * file, 601static long openprom_ioctl(struct file * file,
602 unsigned int cmd, unsigned long arg) 602 unsigned int cmd, unsigned long arg)
603{ 603{
604 DATA *data = (DATA *) file->private_data; 604 DATA *data = file->private_data;
605 605
606 switch (cmd) { 606 switch (cmd) {
607 case OPROMGETOPT: 607 case OPROMGETOPT:
diff --git a/drivers/serial/suncore.c b/drivers/serial/suncore.c
index ed7d958b0a01..544f2e25d0e5 100644
--- a/drivers/serial/suncore.c
+++ b/drivers/serial/suncore.c
@@ -71,7 +71,9 @@ int sunserial_console_match(struct console *con, struct device_node *dp,
71 71
72 con->index = line; 72 con->index = line;
73 drv->cons = con; 73 drv->cons = con;
74 add_preferred_console(con->name, line, NULL); 74
75 if (!console_set_on_cmdline)
76 add_preferred_console(con->name, line, NULL);
75 77
76 return 1; 78 return 1;
77} 79}
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index 234459c2f012..ffbf4553f665 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -1500,20 +1500,25 @@ out_unmap:
1500static int __devexit su_remove(struct of_device *op) 1500static int __devexit su_remove(struct of_device *op)
1501{ 1501{
1502 struct uart_sunsu_port *up = dev_get_drvdata(&op->dev); 1502 struct uart_sunsu_port *up = dev_get_drvdata(&op->dev);
1503 bool kbdms = false;
1503 1504
1504 if (up->su_type == SU_PORT_MS || 1505 if (up->su_type == SU_PORT_MS ||
1505 up->su_type == SU_PORT_KBD) { 1506 up->su_type == SU_PORT_KBD)
1507 kbdms = true;
1508
1509 if (kbdms) {
1506#ifdef CONFIG_SERIO 1510#ifdef CONFIG_SERIO
1507 serio_unregister_port(&up->serio); 1511 serio_unregister_port(&up->serio);
1508#endif 1512#endif
1509 kfree(up); 1513 } else if (up->port.type != PORT_UNKNOWN)
1510 } else if (up->port.type != PORT_UNKNOWN) {
1511 uart_remove_one_port(&sunsu_reg, &up->port); 1514 uart_remove_one_port(&sunsu_reg, &up->port);
1512 }
1513 1515
1514 if (up->port.membase) 1516 if (up->port.membase)
1515 of_iounmap(&op->resource[0], up->port.membase, up->reg_size); 1517 of_iounmap(&op->resource[0], up->port.membase, up->reg_size);
1516 1518
1519 if (kbdms)
1520 kfree(up);
1521
1517 dev_set_drvdata(&op->dev, NULL); 1522 dev_set_drvdata(&op->dev, NULL);
1518 1523
1519 return 0; 1524 return 0;
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index ffa111a7e9d4..97ab0a81338a 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -66,28 +66,6 @@ struct mpc8xxx_spi_reg {
66 __be32 receive; 66 __be32 receive;
67}; 67};
68 68
69/* SPI Parameter RAM */
70struct spi_pram {
71 __be16 rbase; /* Rx Buffer descriptor base address */
72 __be16 tbase; /* Tx Buffer descriptor base address */
73 u8 rfcr; /* Rx function code */
74 u8 tfcr; /* Tx function code */
75 __be16 mrblr; /* Max receive buffer length */
76 __be32 rstate; /* Internal */
77 __be32 rdp; /* Internal */
78 __be16 rbptr; /* Internal */
79 __be16 rbc; /* Internal */
80 __be32 rxtmp; /* Internal */
81 __be32 tstate; /* Internal */
82 __be32 tdp; /* Internal */
83 __be16 tbptr; /* Internal */
84 __be16 tbc; /* Internal */
85 __be32 txtmp; /* Internal */
86 __be32 res; /* Tx temp. */
87 __be16 rpbase; /* Relocation pointer (CPM1 only) */
88 __be16 res1; /* Reserved */
89};
90
91/* SPI Controller mode register definitions */ 69/* SPI Controller mode register definitions */
92#define SPMODE_LOOP (1 << 30) 70#define SPMODE_LOOP (1 << 30)
93#define SPMODE_CI_INACTIVEHIGH (1 << 29) 71#define SPMODE_CI_INACTIVEHIGH (1 << 29)
diff --git a/drivers/usb/gadget/f_fs.c b/drivers/usb/gadget/f_fs.c
index d69eccf5f197..2aaa0f75c6cf 100644
--- a/drivers/usb/gadget/f_fs.c
+++ b/drivers/usb/gadget/f_fs.c
@@ -136,7 +136,7 @@ struct ffs_data {
136 * handling setup requests immidiatelly user space may be so 136 * handling setup requests immidiatelly user space may be so
137 * slow that another setup will be sent to the gadget but this 137 * slow that another setup will be sent to the gadget but this
138 * time not to us but another function and then there could be 138 * time not to us but another function and then there could be
139 * a race. Is taht the case? Or maybe we can use cdev->req 139 * a race. Is that the case? Or maybe we can use cdev->req
140 * after all, maybe we just need some spinlock for that? */ 140 * after all, maybe we just need some spinlock for that? */
141 struct usb_request *ep0req; /* P: mutex */ 141 struct usb_request *ep0req; /* P: mutex */
142 struct completion ep0req_completion; /* P: mutex */ 142 struct completion ep0req_completion; /* P: mutex */
diff --git a/drivers/usb/gadget/f_uvc.c b/drivers/usb/gadget/f_uvc.c
index fc2611f8b326..dbe6db0184fd 100644
--- a/drivers/usb/gadget/f_uvc.c
+++ b/drivers/usb/gadget/f_uvc.c
@@ -28,7 +28,7 @@
28 28
29#include "uvc.h" 29#include "uvc.h"
30 30
31unsigned int uvc_trace_param; 31unsigned int uvc_gadget_trace_param;
32 32
33/* -------------------------------------------------------------------------- 33/* --------------------------------------------------------------------------
34 * Function descriptors 34 * Function descriptors
@@ -656,6 +656,6 @@ error:
656 return ret; 656 return ret;
657} 657}
658 658
659module_param_named(trace, uvc_trace_param, uint, S_IRUGO|S_IWUSR); 659module_param_named(trace, uvc_gadget_trace_param, uint, S_IRUGO|S_IWUSR);
660MODULE_PARM_DESC(trace, "Trace level bitmask"); 660MODULE_PARM_DESC(trace, "Trace level bitmask");
661 661
diff --git a/drivers/usb/gadget/uvc.h b/drivers/usb/gadget/uvc.h
index 0a705e63c936..e92454cddd7d 100644
--- a/drivers/usb/gadget/uvc.h
+++ b/drivers/usb/gadget/uvc.h
@@ -107,11 +107,11 @@ struct uvc_streaming_control {
107#define UVC_WARN_MINMAX 0 107#define UVC_WARN_MINMAX 0
108#define UVC_WARN_PROBE_DEF 1 108#define UVC_WARN_PROBE_DEF 1
109 109
110extern unsigned int uvc_trace_param; 110extern unsigned int uvc_gadget_trace_param;
111 111
112#define uvc_trace(flag, msg...) \ 112#define uvc_trace(flag, msg...) \
113 do { \ 113 do { \
114 if (uvc_trace_param & flag) \ 114 if (uvc_gadget_trace_param & flag) \
115 printk(KERN_DEBUG "uvcvideo: " msg); \ 115 printk(KERN_DEBUG "uvcvideo: " msg); \
116 } while (0) 116 } while (0)
117 117
@@ -220,16 +220,10 @@ struct uvc_file_handle
220#define to_uvc_file_handle(handle) \ 220#define to_uvc_file_handle(handle) \
221 container_of(handle, struct uvc_file_handle, vfh) 221 container_of(handle, struct uvc_file_handle, vfh)
222 222
223extern struct v4l2_file_operations uvc_v4l2_fops;
224
225/* ------------------------------------------------------------------------ 223/* ------------------------------------------------------------------------
226 * Functions 224 * Functions
227 */ 225 */
228 226
229extern int uvc_video_enable(struct uvc_video *video, int enable);
230extern int uvc_video_init(struct uvc_video *video);
231extern int uvc_video_pump(struct uvc_video *video);
232
233extern void uvc_endpoint_stream(struct uvc_device *dev); 227extern void uvc_endpoint_stream(struct uvc_device *dev);
234 228
235extern void uvc_function_connect(struct uvc_device *uvc); 229extern void uvc_function_connect(struct uvc_device *uvc);
diff --git a/drivers/usb/gadget/uvc_queue.c b/drivers/usb/gadget/uvc_queue.c
index 43891991bf21..f7395ac5dc17 100644
--- a/drivers/usb/gadget/uvc_queue.c
+++ b/drivers/usb/gadget/uvc_queue.c
@@ -78,7 +78,8 @@
78 * 78 *
79 */ 79 */
80 80
81void uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type) 81static void
82uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type)
82{ 83{
83 mutex_init(&queue->mutex); 84 mutex_init(&queue->mutex);
84 spin_lock_init(&queue->irqlock); 85 spin_lock_init(&queue->irqlock);
@@ -88,6 +89,28 @@ void uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type)
88} 89}
89 90
90/* 91/*
92 * Free the video buffers.
93 *
94 * This function must be called with the queue lock held.
95 */
96static int uvc_free_buffers(struct uvc_video_queue *queue)
97{
98 unsigned int i;
99
100 for (i = 0; i < queue->count; ++i) {
101 if (queue->buffer[i].vma_use_count != 0)
102 return -EBUSY;
103 }
104
105 if (queue->count) {
106 vfree(queue->mem);
107 queue->count = 0;
108 }
109
110 return 0;
111}
112
113/*
91 * Allocate the video buffers. 114 * Allocate the video buffers.
92 * 115 *
93 * Pages are reserved to make sure they will not be swapped, as they will be 116 * Pages are reserved to make sure they will not be swapped, as they will be
@@ -95,8 +118,9 @@ void uvc_queue_init(struct uvc_video_queue *queue, enum v4l2_buf_type type)
95 * 118 *
96 * Buffers will be individually mapped, so they must all be page aligned. 119 * Buffers will be individually mapped, so they must all be page aligned.
97 */ 120 */
98int uvc_alloc_buffers(struct uvc_video_queue *queue, unsigned int nbuffers, 121static int
99 unsigned int buflength) 122uvc_alloc_buffers(struct uvc_video_queue *queue, unsigned int nbuffers,
123 unsigned int buflength)
100{ 124{
101 unsigned int bufsize = PAGE_ALIGN(buflength); 125 unsigned int bufsize = PAGE_ALIGN(buflength);
102 unsigned int i; 126 unsigned int i;
@@ -150,28 +174,6 @@ done:
150 return ret; 174 return ret;
151} 175}
152 176
153/*
154 * Free the video buffers.
155 *
156 * This function must be called with the queue lock held.
157 */
158int uvc_free_buffers(struct uvc_video_queue *queue)
159{
160 unsigned int i;
161
162 for (i = 0; i < queue->count; ++i) {
163 if (queue->buffer[i].vma_use_count != 0)
164 return -EBUSY;
165 }
166
167 if (queue->count) {
168 vfree(queue->mem);
169 queue->count = 0;
170 }
171
172 return 0;
173}
174
175static void __uvc_query_buffer(struct uvc_buffer *buf, 177static void __uvc_query_buffer(struct uvc_buffer *buf,
176 struct v4l2_buffer *v4l2_buf) 178 struct v4l2_buffer *v4l2_buf)
177{ 179{
@@ -195,8 +197,8 @@ static void __uvc_query_buffer(struct uvc_buffer *buf,
195 } 197 }
196} 198}
197 199
198int uvc_query_buffer(struct uvc_video_queue *queue, 200static int
199 struct v4l2_buffer *v4l2_buf) 201uvc_query_buffer(struct uvc_video_queue *queue, struct v4l2_buffer *v4l2_buf)
200{ 202{
201 int ret = 0; 203 int ret = 0;
202 204
@@ -217,8 +219,8 @@ done:
217 * Queue a video buffer. Attempting to queue a buffer that has already been 219 * Queue a video buffer. Attempting to queue a buffer that has already been
218 * queued will return -EINVAL. 220 * queued will return -EINVAL.
219 */ 221 */
220int uvc_queue_buffer(struct uvc_video_queue *queue, 222static int
221 struct v4l2_buffer *v4l2_buf) 223uvc_queue_buffer(struct uvc_video_queue *queue, struct v4l2_buffer *v4l2_buf)
222{ 224{
223 struct uvc_buffer *buf; 225 struct uvc_buffer *buf;
224 unsigned long flags; 226 unsigned long flags;
@@ -298,8 +300,9 @@ static int uvc_queue_waiton(struct uvc_buffer *buf, int nonblocking)
298 * Dequeue a video buffer. If nonblocking is false, block until a buffer is 300 * Dequeue a video buffer. If nonblocking is false, block until a buffer is
299 * available. 301 * available.
300 */ 302 */
301int uvc_dequeue_buffer(struct uvc_video_queue *queue, 303static int
302 struct v4l2_buffer *v4l2_buf, int nonblocking) 304uvc_dequeue_buffer(struct uvc_video_queue *queue, struct v4l2_buffer *v4l2_buf,
305 int nonblocking)
303{ 306{
304 struct uvc_buffer *buf; 307 struct uvc_buffer *buf;
305 int ret = 0; 308 int ret = 0;
@@ -359,8 +362,9 @@ done:
359 * This function implements video queue polling and is intended to be used by 362 * This function implements video queue polling and is intended to be used by
360 * the device poll handler. 363 * the device poll handler.
361 */ 364 */
362unsigned int uvc_queue_poll(struct uvc_video_queue *queue, struct file *file, 365static unsigned int
363 poll_table *wait) 366uvc_queue_poll(struct uvc_video_queue *queue, struct file *file,
367 poll_table *wait)
364{ 368{
365 struct uvc_buffer *buf; 369 struct uvc_buffer *buf;
366 unsigned int mask = 0; 370 unsigned int mask = 0;
@@ -407,7 +411,8 @@ static struct vm_operations_struct uvc_vm_ops = {
407 * This function implements video buffer memory mapping and is intended to be 411 * This function implements video buffer memory mapping and is intended to be
408 * used by the device mmap handler. 412 * used by the device mmap handler.
409 */ 413 */
410int uvc_queue_mmap(struct uvc_video_queue *queue, struct vm_area_struct *vma) 414static int
415uvc_queue_mmap(struct uvc_video_queue *queue, struct vm_area_struct *vma)
411{ 416{
412 struct uvc_buffer *uninitialized_var(buffer); 417 struct uvc_buffer *uninitialized_var(buffer);
413 struct page *page; 418 struct page *page;
@@ -458,6 +463,42 @@ done:
458} 463}
459 464
460/* 465/*
466 * Cancel the video buffers queue.
467 *
468 * Cancelling the queue marks all buffers on the irq queue as erroneous,
469 * wakes them up and removes them from the queue.
470 *
471 * If the disconnect parameter is set, further calls to uvc_queue_buffer will
472 * fail with -ENODEV.
473 *
474 * This function acquires the irq spinlock and can be called from interrupt
475 * context.
476 */
477static void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect)
478{
479 struct uvc_buffer *buf;
480 unsigned long flags;
481
482 spin_lock_irqsave(&queue->irqlock, flags);
483 while (!list_empty(&queue->irqqueue)) {
484 buf = list_first_entry(&queue->irqqueue, struct uvc_buffer,
485 queue);
486 list_del(&buf->queue);
487 buf->state = UVC_BUF_STATE_ERROR;
488 wake_up(&buf->wait);
489 }
490 /* This must be protected by the irqlock spinlock to avoid race
491 * conditions between uvc_queue_buffer and the disconnection event that
492 * could result in an interruptible wait in uvc_dequeue_buffer. Do not
493 * blindly replace this logic by checking for the UVC_DEV_DISCONNECTED
494 * state outside the queue code.
495 */
496 if (disconnect)
497 queue->flags |= UVC_QUEUE_DISCONNECTED;
498 spin_unlock_irqrestore(&queue->irqlock, flags);
499}
500
501/*
461 * Enable or disable the video buffers queue. 502 * Enable or disable the video buffers queue.
462 * 503 *
463 * The queue must be enabled before starting video acquisition and must be 504 * The queue must be enabled before starting video acquisition and must be
@@ -474,7 +515,7 @@ done:
474 * This function can't be called from interrupt context. Use 515 * This function can't be called from interrupt context. Use
475 * uvc_queue_cancel() instead. 516 * uvc_queue_cancel() instead.
476 */ 517 */
477int uvc_queue_enable(struct uvc_video_queue *queue, int enable) 518static int uvc_queue_enable(struct uvc_video_queue *queue, int enable)
478{ 519{
479 unsigned int i; 520 unsigned int i;
480 int ret = 0; 521 int ret = 0;
@@ -503,44 +544,8 @@ done:
503 return ret; 544 return ret;
504} 545}
505 546
506/* 547static struct uvc_buffer *
507 * Cancel the video buffers queue. 548uvc_queue_next_buffer(struct uvc_video_queue *queue, struct uvc_buffer *buf)
508 *
509 * Cancelling the queue marks all buffers on the irq queue as erroneous,
510 * wakes them up and removes them from the queue.
511 *
512 * If the disconnect parameter is set, further calls to uvc_queue_buffer will
513 * fail with -ENODEV.
514 *
515 * This function acquires the irq spinlock and can be called from interrupt
516 * context.
517 */
518void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect)
519{
520 struct uvc_buffer *buf;
521 unsigned long flags;
522
523 spin_lock_irqsave(&queue->irqlock, flags);
524 while (!list_empty(&queue->irqqueue)) {
525 buf = list_first_entry(&queue->irqqueue, struct uvc_buffer,
526 queue);
527 list_del(&buf->queue);
528 buf->state = UVC_BUF_STATE_ERROR;
529 wake_up(&buf->wait);
530 }
531 /* This must be protected by the irqlock spinlock to avoid race
532 * conditions between uvc_queue_buffer and the disconnection event that
533 * could result in an interruptible wait in uvc_dequeue_buffer. Do not
534 * blindly replace this logic by checking for the UVC_DEV_DISCONNECTED
535 * state outside the queue code.
536 */
537 if (disconnect)
538 queue->flags |= UVC_QUEUE_DISCONNECTED;
539 spin_unlock_irqrestore(&queue->irqlock, flags);
540}
541
542struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
543 struct uvc_buffer *buf)
544{ 549{
545 struct uvc_buffer *nextbuf; 550 struct uvc_buffer *nextbuf;
546 unsigned long flags; 551 unsigned long flags;
@@ -568,7 +573,7 @@ struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
568 return nextbuf; 573 return nextbuf;
569} 574}
570 575
571struct uvc_buffer *uvc_queue_head(struct uvc_video_queue *queue) 576static struct uvc_buffer *uvc_queue_head(struct uvc_video_queue *queue)
572{ 577{
573 struct uvc_buffer *buf = NULL; 578 struct uvc_buffer *buf = NULL;
574 579
diff --git a/drivers/usb/gadget/uvc_queue.h b/drivers/usb/gadget/uvc_queue.h
index 7f5a33fe7ae2..1812a8ecc5d0 100644
--- a/drivers/usb/gadget/uvc_queue.h
+++ b/drivers/usb/gadget/uvc_queue.h
@@ -58,30 +58,10 @@ struct uvc_video_queue {
58 struct list_head irqqueue; 58 struct list_head irqqueue;
59}; 59};
60 60
61extern void uvc_queue_init(struct uvc_video_queue *queue,
62 enum v4l2_buf_type type);
63extern int uvc_alloc_buffers(struct uvc_video_queue *queue,
64 unsigned int nbuffers, unsigned int buflength);
65extern int uvc_free_buffers(struct uvc_video_queue *queue);
66extern int uvc_query_buffer(struct uvc_video_queue *queue,
67 struct v4l2_buffer *v4l2_buf);
68extern int uvc_queue_buffer(struct uvc_video_queue *queue,
69 struct v4l2_buffer *v4l2_buf);
70extern int uvc_dequeue_buffer(struct uvc_video_queue *queue,
71 struct v4l2_buffer *v4l2_buf, int nonblocking);
72extern int uvc_queue_enable(struct uvc_video_queue *queue, int enable);
73extern void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect);
74extern struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue,
75 struct uvc_buffer *buf);
76extern unsigned int uvc_queue_poll(struct uvc_video_queue *queue,
77 struct file *file, poll_table *wait);
78extern int uvc_queue_mmap(struct uvc_video_queue *queue,
79 struct vm_area_struct *vma);
80static inline int uvc_queue_streaming(struct uvc_video_queue *queue) 61static inline int uvc_queue_streaming(struct uvc_video_queue *queue)
81{ 62{
82 return queue->flags & UVC_QUEUE_STREAMING; 63 return queue->flags & UVC_QUEUE_STREAMING;
83} 64}
84extern struct uvc_buffer *uvc_queue_head(struct uvc_video_queue *queue);
85 65
86#endif /* __KERNEL__ */ 66#endif /* __KERNEL__ */
87 67
diff --git a/drivers/usb/gadget/uvc_v4l2.c b/drivers/usb/gadget/uvc_v4l2.c
index a7989f29837e..2dcffdac86d2 100644
--- a/drivers/usb/gadget/uvc_v4l2.c
+++ b/drivers/usb/gadget/uvc_v4l2.c
@@ -363,7 +363,7 @@ uvc_v4l2_poll(struct file *file, poll_table *wait)
363 return mask; 363 return mask;
364} 364}
365 365
366struct v4l2_file_operations uvc_v4l2_fops = { 366static struct v4l2_file_operations uvc_v4l2_fops = {
367 .owner = THIS_MODULE, 367 .owner = THIS_MODULE,
368 .open = uvc_v4l2_open, 368 .open = uvc_v4l2_open,
369 .release = uvc_v4l2_release, 369 .release = uvc_v4l2_release,
diff --git a/drivers/usb/gadget/uvc_video.c b/drivers/usb/gadget/uvc_video.c
index de8cbc46518d..b08f35438d70 100644
--- a/drivers/usb/gadget/uvc_video.c
+++ b/drivers/usb/gadget/uvc_video.c
@@ -271,7 +271,7 @@ error:
271 * This function fills the available USB requests (listed in req_free) with 271 * This function fills the available USB requests (listed in req_free) with
272 * video data from the queued buffers. 272 * video data from the queued buffers.
273 */ 273 */
274int 274static int
275uvc_video_pump(struct uvc_video *video) 275uvc_video_pump(struct uvc_video *video)
276{ 276{
277 struct usb_request *req; 277 struct usb_request *req;
@@ -328,7 +328,7 @@ uvc_video_pump(struct uvc_video *video)
328/* 328/*
329 * Enable or disable the video stream. 329 * Enable or disable the video stream.
330 */ 330 */
331int 331static int
332uvc_video_enable(struct uvc_video *video, int enable) 332uvc_video_enable(struct uvc_video *video, int enable)
333{ 333{
334 unsigned int i; 334 unsigned int i;
@@ -367,7 +367,7 @@ uvc_video_enable(struct uvc_video *video, int enable)
367/* 367/*
368 * Initialize the UVC video stream. 368 * Initialize the UVC video stream.
369 */ 369 */
370int 370static int
371uvc_video_init(struct uvc_video *video) 371uvc_video_init(struct uvc_video *video)
372{ 372{
373 INIT_LIST_HEAD(&video->req_free); 373 INIT_LIST_HEAD(&video->req_free);
diff --git a/drivers/usb/gadget/webcam.c b/drivers/usb/gadget/webcam.c
index 417fd6887698..f5f3030cc416 100644
--- a/drivers/usb/gadget/webcam.c
+++ b/drivers/usb/gadget/webcam.c
@@ -28,10 +28,10 @@
28#include "config.c" 28#include "config.c"
29#include "epautoconf.c" 29#include "epautoconf.c"
30 30
31#include "f_uvc.c"
32#include "uvc_queue.c" 31#include "uvc_queue.c"
33#include "uvc_v4l2.c"
34#include "uvc_video.c" 32#include "uvc_video.c"
33#include "uvc_v4l2.c"
34#include "f_uvc.c"
35 35
36/* -------------------------------------------------------------------------- 36/* --------------------------------------------------------------------------
37 * Device descriptor 37 * Device descriptor
diff --git a/drivers/vhost/net.c b/drivers/vhost/net.c
index df5b6b971f26..d219070fed3d 100644
--- a/drivers/vhost/net.c
+++ b/drivers/vhost/net.c
@@ -98,7 +98,8 @@ static void tx_poll_start(struct vhost_net *net, struct socket *sock)
98static void handle_tx(struct vhost_net *net) 98static void handle_tx(struct vhost_net *net)
99{ 99{
100 struct vhost_virtqueue *vq = &net->dev.vqs[VHOST_NET_VQ_TX]; 100 struct vhost_virtqueue *vq = &net->dev.vqs[VHOST_NET_VQ_TX];
101 unsigned head, out, in, s; 101 unsigned out, in, s;
102 int head;
102 struct msghdr msg = { 103 struct msghdr msg = {
103 .msg_name = NULL, 104 .msg_name = NULL,
104 .msg_namelen = 0, 105 .msg_namelen = 0,
@@ -135,6 +136,9 @@ static void handle_tx(struct vhost_net *net)
135 ARRAY_SIZE(vq->iov), 136 ARRAY_SIZE(vq->iov),
136 &out, &in, 137 &out, &in,
137 NULL, NULL); 138 NULL, NULL);
139 /* On error, stop handling until the next kick. */
140 if (unlikely(head < 0))
141 break;
138 /* Nothing new? Wait for eventfd to tell us they refilled. */ 142 /* Nothing new? Wait for eventfd to tell us they refilled. */
139 if (head == vq->num) { 143 if (head == vq->num) {
140 wmem = atomic_read(&sock->sk->sk_wmem_alloc); 144 wmem = atomic_read(&sock->sk->sk_wmem_alloc);
@@ -173,8 +177,8 @@ static void handle_tx(struct vhost_net *net)
173 break; 177 break;
174 } 178 }
175 if (err != len) 179 if (err != len)
176 pr_err("Truncated TX packet: " 180 pr_debug("Truncated TX packet: "
177 " len %d != %zd\n", err, len); 181 " len %d != %zd\n", err, len);
178 vhost_add_used_and_signal(&net->dev, vq, head, 0); 182 vhost_add_used_and_signal(&net->dev, vq, head, 0);
179 total_len += len; 183 total_len += len;
180 if (unlikely(total_len >= VHOST_NET_WEIGHT)) { 184 if (unlikely(total_len >= VHOST_NET_WEIGHT)) {
@@ -192,7 +196,8 @@ static void handle_tx(struct vhost_net *net)
192static void handle_rx(struct vhost_net *net) 196static void handle_rx(struct vhost_net *net)
193{ 197{
194 struct vhost_virtqueue *vq = &net->dev.vqs[VHOST_NET_VQ_RX]; 198 struct vhost_virtqueue *vq = &net->dev.vqs[VHOST_NET_VQ_RX];
195 unsigned head, out, in, log, s; 199 unsigned out, in, log, s;
200 int head;
196 struct vhost_log *vq_log; 201 struct vhost_log *vq_log;
197 struct msghdr msg = { 202 struct msghdr msg = {
198 .msg_name = NULL, 203 .msg_name = NULL,
@@ -228,6 +233,9 @@ static void handle_rx(struct vhost_net *net)
228 ARRAY_SIZE(vq->iov), 233 ARRAY_SIZE(vq->iov),
229 &out, &in, 234 &out, &in,
230 vq_log, &log); 235 vq_log, &log);
236 /* On error, stop handling until the next kick. */
237 if (unlikely(head < 0))
238 break;
231 /* OK, now we need to know about added descriptors. */ 239 /* OK, now we need to know about added descriptors. */
232 if (head == vq->num) { 240 if (head == vq->num) {
233 if (unlikely(vhost_enable_notify(vq))) { 241 if (unlikely(vhost_enable_notify(vq))) {
@@ -267,8 +275,8 @@ static void handle_rx(struct vhost_net *net)
267 } 275 }
268 /* TODO: Should check and handle checksum. */ 276 /* TODO: Should check and handle checksum. */
269 if (err > len) { 277 if (err > len) {
270 pr_err("Discarded truncated rx packet: " 278 pr_debug("Discarded truncated rx packet: "
271 " len %d > %zd\n", err, len); 279 " len %d > %zd\n", err, len);
272 vhost_discard_vq_desc(vq); 280 vhost_discard_vq_desc(vq);
273 continue; 281 continue;
274 } 282 }
@@ -526,11 +534,16 @@ static long vhost_net_set_backend(struct vhost_net *n, unsigned index, int fd)
526 rcu_assign_pointer(vq->private_data, sock); 534 rcu_assign_pointer(vq->private_data, sock);
527 vhost_net_enable_vq(n, vq); 535 vhost_net_enable_vq(n, vq);
528done: 536done:
537 mutex_unlock(&vq->mutex);
538
529 if (oldsock) { 539 if (oldsock) {
530 vhost_net_flush_vq(n, index); 540 vhost_net_flush_vq(n, index);
531 fput(oldsock->file); 541 fput(oldsock->file);
532 } 542 }
533 543
544 mutex_unlock(&n->dev.mutex);
545 return 0;
546
534err_vq: 547err_vq:
535 mutex_unlock(&vq->mutex); 548 mutex_unlock(&vq->mutex);
536err: 549err:
diff --git a/drivers/vhost/vhost.c b/drivers/vhost/vhost.c
index 3b83382e06eb..0b99783083f6 100644
--- a/drivers/vhost/vhost.c
+++ b/drivers/vhost/vhost.c
@@ -736,12 +736,12 @@ static int translate_desc(struct vhost_dev *dev, u64 addr, u32 len,
736 mem = rcu_dereference(dev->memory); 736 mem = rcu_dereference(dev->memory);
737 while ((u64)len > s) { 737 while ((u64)len > s) {
738 u64 size; 738 u64 size;
739 if (ret >= iov_size) { 739 if (unlikely(ret >= iov_size)) {
740 ret = -ENOBUFS; 740 ret = -ENOBUFS;
741 break; 741 break;
742 } 742 }
743 reg = find_region(mem, addr, len); 743 reg = find_region(mem, addr, len);
744 if (!reg) { 744 if (unlikely(!reg)) {
745 ret = -EFAULT; 745 ret = -EFAULT;
746 break; 746 break;
747 } 747 }
@@ -780,18 +780,18 @@ static unsigned next_desc(struct vring_desc *desc)
780 return next; 780 return next;
781} 781}
782 782
783static unsigned get_indirect(struct vhost_dev *dev, struct vhost_virtqueue *vq, 783static int get_indirect(struct vhost_dev *dev, struct vhost_virtqueue *vq,
784 struct iovec iov[], unsigned int iov_size, 784 struct iovec iov[], unsigned int iov_size,
785 unsigned int *out_num, unsigned int *in_num, 785 unsigned int *out_num, unsigned int *in_num,
786 struct vhost_log *log, unsigned int *log_num, 786 struct vhost_log *log, unsigned int *log_num,
787 struct vring_desc *indirect) 787 struct vring_desc *indirect)
788{ 788{
789 struct vring_desc desc; 789 struct vring_desc desc;
790 unsigned int i = 0, count, found = 0; 790 unsigned int i = 0, count, found = 0;
791 int ret; 791 int ret;
792 792
793 /* Sanity check */ 793 /* Sanity check */
794 if (indirect->len % sizeof desc) { 794 if (unlikely(indirect->len % sizeof desc)) {
795 vq_err(vq, "Invalid length in indirect descriptor: " 795 vq_err(vq, "Invalid length in indirect descriptor: "
796 "len 0x%llx not multiple of 0x%zx\n", 796 "len 0x%llx not multiple of 0x%zx\n",
797 (unsigned long long)indirect->len, 797 (unsigned long long)indirect->len,
@@ -801,7 +801,7 @@ static unsigned get_indirect(struct vhost_dev *dev, struct vhost_virtqueue *vq,
801 801
802 ret = translate_desc(dev, indirect->addr, indirect->len, vq->indirect, 802 ret = translate_desc(dev, indirect->addr, indirect->len, vq->indirect,
803 ARRAY_SIZE(vq->indirect)); 803 ARRAY_SIZE(vq->indirect));
804 if (ret < 0) { 804 if (unlikely(ret < 0)) {
805 vq_err(vq, "Translation failure %d in indirect.\n", ret); 805 vq_err(vq, "Translation failure %d in indirect.\n", ret);
806 return ret; 806 return ret;
807 } 807 }
@@ -813,7 +813,7 @@ static unsigned get_indirect(struct vhost_dev *dev, struct vhost_virtqueue *vq,
813 count = indirect->len / sizeof desc; 813 count = indirect->len / sizeof desc;
814 /* Buffers are chained via a 16 bit next field, so 814 /* Buffers are chained via a 16 bit next field, so
815 * we can have at most 2^16 of these. */ 815 * we can have at most 2^16 of these. */
816 if (count > USHRT_MAX + 1) { 816 if (unlikely(count > USHRT_MAX + 1)) {
817 vq_err(vq, "Indirect buffer length too big: %d\n", 817 vq_err(vq, "Indirect buffer length too big: %d\n",
818 indirect->len); 818 indirect->len);
819 return -E2BIG; 819 return -E2BIG;
@@ -821,19 +821,19 @@ static unsigned get_indirect(struct vhost_dev *dev, struct vhost_virtqueue *vq,
821 821
822 do { 822 do {
823 unsigned iov_count = *in_num + *out_num; 823 unsigned iov_count = *in_num + *out_num;
824 if (++found > count) { 824 if (unlikely(++found > count)) {
825 vq_err(vq, "Loop detected: last one at %u " 825 vq_err(vq, "Loop detected: last one at %u "
826 "indirect size %u\n", 826 "indirect size %u\n",
827 i, count); 827 i, count);
828 return -EINVAL; 828 return -EINVAL;
829 } 829 }
830 if (memcpy_fromiovec((unsigned char *)&desc, vq->indirect, 830 if (unlikely(memcpy_fromiovec((unsigned char *)&desc, vq->indirect,
831 sizeof desc)) { 831 sizeof desc))) {
832 vq_err(vq, "Failed indirect descriptor: idx %d, %zx\n", 832 vq_err(vq, "Failed indirect descriptor: idx %d, %zx\n",
833 i, (size_t)indirect->addr + i * sizeof desc); 833 i, (size_t)indirect->addr + i * sizeof desc);
834 return -EINVAL; 834 return -EINVAL;
835 } 835 }
836 if (desc.flags & VRING_DESC_F_INDIRECT) { 836 if (unlikely(desc.flags & VRING_DESC_F_INDIRECT)) {
837 vq_err(vq, "Nested indirect descriptor: idx %d, %zx\n", 837 vq_err(vq, "Nested indirect descriptor: idx %d, %zx\n",
838 i, (size_t)indirect->addr + i * sizeof desc); 838 i, (size_t)indirect->addr + i * sizeof desc);
839 return -EINVAL; 839 return -EINVAL;
@@ -841,7 +841,7 @@ static unsigned get_indirect(struct vhost_dev *dev, struct vhost_virtqueue *vq,
841 841
842 ret = translate_desc(dev, desc.addr, desc.len, iov + iov_count, 842 ret = translate_desc(dev, desc.addr, desc.len, iov + iov_count,
843 iov_size - iov_count); 843 iov_size - iov_count);
844 if (ret < 0) { 844 if (unlikely(ret < 0)) {
845 vq_err(vq, "Translation failure %d indirect idx %d\n", 845 vq_err(vq, "Translation failure %d indirect idx %d\n",
846 ret, i); 846 ret, i);
847 return ret; 847 return ret;
@@ -857,7 +857,7 @@ static unsigned get_indirect(struct vhost_dev *dev, struct vhost_virtqueue *vq,
857 } else { 857 } else {
858 /* If it's an output descriptor, they're all supposed 858 /* If it's an output descriptor, they're all supposed
859 * to come before any input descriptors. */ 859 * to come before any input descriptors. */
860 if (*in_num) { 860 if (unlikely(*in_num)) {
861 vq_err(vq, "Indirect descriptor " 861 vq_err(vq, "Indirect descriptor "
862 "has out after in: idx %d\n", i); 862 "has out after in: idx %d\n", i);
863 return -EINVAL; 863 return -EINVAL;
@@ -873,12 +873,13 @@ static unsigned get_indirect(struct vhost_dev *dev, struct vhost_virtqueue *vq,
873 * number of output then some number of input descriptors, it's actually two 873 * number of output then some number of input descriptors, it's actually two
874 * iovecs, but we pack them into one and note how many of each there were. 874 * iovecs, but we pack them into one and note how many of each there were.
875 * 875 *
876 * This function returns the descriptor number found, or vq->num (which 876 * This function returns the descriptor number found, or vq->num (which is
877 * is never a valid descriptor number) if none was found. */ 877 * never a valid descriptor number) if none was found. A negative code is
878unsigned vhost_get_vq_desc(struct vhost_dev *dev, struct vhost_virtqueue *vq, 878 * returned on error. */
879 struct iovec iov[], unsigned int iov_size, 879int vhost_get_vq_desc(struct vhost_dev *dev, struct vhost_virtqueue *vq,
880 unsigned int *out_num, unsigned int *in_num, 880 struct iovec iov[], unsigned int iov_size,
881 struct vhost_log *log, unsigned int *log_num) 881 unsigned int *out_num, unsigned int *in_num,
882 struct vhost_log *log, unsigned int *log_num)
882{ 883{
883 struct vring_desc desc; 884 struct vring_desc desc;
884 unsigned int i, head, found = 0; 885 unsigned int i, head, found = 0;
@@ -887,16 +888,16 @@ unsigned vhost_get_vq_desc(struct vhost_dev *dev, struct vhost_virtqueue *vq,
887 888
888 /* Check it isn't doing very strange things with descriptor numbers. */ 889 /* Check it isn't doing very strange things with descriptor numbers. */
889 last_avail_idx = vq->last_avail_idx; 890 last_avail_idx = vq->last_avail_idx;
890 if (get_user(vq->avail_idx, &vq->avail->idx)) { 891 if (unlikely(get_user(vq->avail_idx, &vq->avail->idx))) {
891 vq_err(vq, "Failed to access avail idx at %p\n", 892 vq_err(vq, "Failed to access avail idx at %p\n",
892 &vq->avail->idx); 893 &vq->avail->idx);
893 return vq->num; 894 return -EFAULT;
894 } 895 }
895 896
896 if ((u16)(vq->avail_idx - last_avail_idx) > vq->num) { 897 if (unlikely((u16)(vq->avail_idx - last_avail_idx) > vq->num)) {
897 vq_err(vq, "Guest moved used index from %u to %u", 898 vq_err(vq, "Guest moved used index from %u to %u",
898 last_avail_idx, vq->avail_idx); 899 last_avail_idx, vq->avail_idx);
899 return vq->num; 900 return -EFAULT;
900 } 901 }
901 902
902 /* If there's nothing new since last we looked, return invalid. */ 903 /* If there's nothing new since last we looked, return invalid. */
@@ -908,18 +909,19 @@ unsigned vhost_get_vq_desc(struct vhost_dev *dev, struct vhost_virtqueue *vq,
908 909
909 /* Grab the next descriptor number they're advertising, and increment 910 /* Grab the next descriptor number they're advertising, and increment
910 * the index we've seen. */ 911 * the index we've seen. */
911 if (get_user(head, &vq->avail->ring[last_avail_idx % vq->num])) { 912 if (unlikely(get_user(head,
913 &vq->avail->ring[last_avail_idx % vq->num]))) {
912 vq_err(vq, "Failed to read head: idx %d address %p\n", 914 vq_err(vq, "Failed to read head: idx %d address %p\n",
913 last_avail_idx, 915 last_avail_idx,
914 &vq->avail->ring[last_avail_idx % vq->num]); 916 &vq->avail->ring[last_avail_idx % vq->num]);
915 return vq->num; 917 return -EFAULT;
916 } 918 }
917 919
918 /* If their number is silly, that's an error. */ 920 /* If their number is silly, that's an error. */
919 if (head >= vq->num) { 921 if (unlikely(head >= vq->num)) {
920 vq_err(vq, "Guest says index %u > %u is available", 922 vq_err(vq, "Guest says index %u > %u is available",
921 head, vq->num); 923 head, vq->num);
922 return vq->num; 924 return -EINVAL;
923 } 925 }
924 926
925 /* When we start there are none of either input nor output. */ 927 /* When we start there are none of either input nor output. */
@@ -930,41 +932,41 @@ unsigned vhost_get_vq_desc(struct vhost_dev *dev, struct vhost_virtqueue *vq,
930 i = head; 932 i = head;
931 do { 933 do {
932 unsigned iov_count = *in_num + *out_num; 934 unsigned iov_count = *in_num + *out_num;
933 if (i >= vq->num) { 935 if (unlikely(i >= vq->num)) {
934 vq_err(vq, "Desc index is %u > %u, head = %u", 936 vq_err(vq, "Desc index is %u > %u, head = %u",
935 i, vq->num, head); 937 i, vq->num, head);
936 return vq->num; 938 return -EINVAL;
937 } 939 }
938 if (++found > vq->num) { 940 if (unlikely(++found > vq->num)) {
939 vq_err(vq, "Loop detected: last one at %u " 941 vq_err(vq, "Loop detected: last one at %u "
940 "vq size %u head %u\n", 942 "vq size %u head %u\n",
941 i, vq->num, head); 943 i, vq->num, head);
942 return vq->num; 944 return -EINVAL;
943 } 945 }
944 ret = copy_from_user(&desc, vq->desc + i, sizeof desc); 946 ret = copy_from_user(&desc, vq->desc + i, sizeof desc);
945 if (ret) { 947 if (unlikely(ret)) {
946 vq_err(vq, "Failed to get descriptor: idx %d addr %p\n", 948 vq_err(vq, "Failed to get descriptor: idx %d addr %p\n",
947 i, vq->desc + i); 949 i, vq->desc + i);
948 return vq->num; 950 return -EFAULT;
949 } 951 }
950 if (desc.flags & VRING_DESC_F_INDIRECT) { 952 if (desc.flags & VRING_DESC_F_INDIRECT) {
951 ret = get_indirect(dev, vq, iov, iov_size, 953 ret = get_indirect(dev, vq, iov, iov_size,
952 out_num, in_num, 954 out_num, in_num,
953 log, log_num, &desc); 955 log, log_num, &desc);
954 if (ret < 0) { 956 if (unlikely(ret < 0)) {
955 vq_err(vq, "Failure detected " 957 vq_err(vq, "Failure detected "
956 "in indirect descriptor at idx %d\n", i); 958 "in indirect descriptor at idx %d\n", i);
957 return vq->num; 959 return ret;
958 } 960 }
959 continue; 961 continue;
960 } 962 }
961 963
962 ret = translate_desc(dev, desc.addr, desc.len, iov + iov_count, 964 ret = translate_desc(dev, desc.addr, desc.len, iov + iov_count,
963 iov_size - iov_count); 965 iov_size - iov_count);
964 if (ret < 0) { 966 if (unlikely(ret < 0)) {
965 vq_err(vq, "Translation failure %d descriptor idx %d\n", 967 vq_err(vq, "Translation failure %d descriptor idx %d\n",
966 ret, i); 968 ret, i);
967 return vq->num; 969 return ret;
968 } 970 }
969 if (desc.flags & VRING_DESC_F_WRITE) { 971 if (desc.flags & VRING_DESC_F_WRITE) {
970 /* If this is an input descriptor, 972 /* If this is an input descriptor,
@@ -978,10 +980,10 @@ unsigned vhost_get_vq_desc(struct vhost_dev *dev, struct vhost_virtqueue *vq,
978 } else { 980 } else {
979 /* If it's an output descriptor, they're all supposed 981 /* If it's an output descriptor, they're all supposed
980 * to come before any input descriptors. */ 982 * to come before any input descriptors. */
981 if (*in_num) { 983 if (unlikely(*in_num)) {
982 vq_err(vq, "Descriptor has out after in: " 984 vq_err(vq, "Descriptor has out after in: "
983 "idx %d\n", i); 985 "idx %d\n", i);
984 return vq->num; 986 return -EINVAL;
985 } 987 }
986 *out_num += ret; 988 *out_num += ret;
987 } 989 }
diff --git a/drivers/vhost/vhost.h b/drivers/vhost/vhost.h
index 44591ba9b07a..11ee13dba0f7 100644
--- a/drivers/vhost/vhost.h
+++ b/drivers/vhost/vhost.h
@@ -120,10 +120,10 @@ long vhost_dev_ioctl(struct vhost_dev *, unsigned int ioctl, unsigned long arg);
120int vhost_vq_access_ok(struct vhost_virtqueue *vq); 120int vhost_vq_access_ok(struct vhost_virtqueue *vq);
121int vhost_log_access_ok(struct vhost_dev *); 121int vhost_log_access_ok(struct vhost_dev *);
122 122
123unsigned vhost_get_vq_desc(struct vhost_dev *, struct vhost_virtqueue *, 123int vhost_get_vq_desc(struct vhost_dev *, struct vhost_virtqueue *,
124 struct iovec iov[], unsigned int iov_count, 124 struct iovec iov[], unsigned int iov_count,
125 unsigned int *out_num, unsigned int *in_num, 125 unsigned int *out_num, unsigned int *in_num,
126 struct vhost_log *log, unsigned int *log_num); 126 struct vhost_log *log, unsigned int *log_num);
127void vhost_discard_vq_desc(struct vhost_virtqueue *); 127void vhost_discard_vq_desc(struct vhost_virtqueue *);
128 128
129int vhost_add_used(struct vhost_virtqueue *, unsigned int head, int len); 129int vhost_add_used(struct vhost_virtqueue *, unsigned int head, int len);
diff --git a/drivers/video/aty/radeon_pm.c b/drivers/video/aty/radeon_pm.c
index 515cf1978d19..c4e17642d9c5 100644
--- a/drivers/video/aty/radeon_pm.c
+++ b/drivers/video/aty/radeon_pm.c
@@ -2872,7 +2872,7 @@ void radeonfb_pm_init(struct radeonfb_info *rinfo, int dynclk, int ignore_devlis
2872 } 2872 }
2873 2873
2874#if 0 2874#if 0
2875 /* Power down TV DAC, taht saves a significant amount of power, 2875 /* Power down TV DAC, that saves a significant amount of power,
2876 * we'll have something better once we actually have some TVOut 2876 * we'll have something better once we actually have some TVOut
2877 * support 2877 * support
2878 */ 2878 */