diff options
Diffstat (limited to 'drivers')
72 files changed, 878 insertions, 350 deletions
diff --git a/drivers/base/platform.c b/drivers/base/platform.c index 8727e9c5eea4..72c776f2a1f5 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c | |||
| @@ -83,9 +83,16 @@ EXPORT_SYMBOL_GPL(platform_get_resource); | |||
| 83 | */ | 83 | */ |
| 84 | int platform_get_irq(struct platform_device *dev, unsigned int num) | 84 | int platform_get_irq(struct platform_device *dev, unsigned int num) |
| 85 | { | 85 | { |
| 86 | #ifdef CONFIG_SPARC | ||
| 87 | /* sparc does not have irqs represented as IORESOURCE_IRQ resources */ | ||
| 88 | if (!dev || num >= dev->archdata.num_irqs) | ||
| 89 | return -ENXIO; | ||
| 90 | return dev->archdata.irqs[num]; | ||
| 91 | #else | ||
| 86 | struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); | 92 | struct resource *r = platform_get_resource(dev, IORESOURCE_IRQ, num); |
| 87 | 93 | ||
| 88 | return r ? r->start : -ENXIO; | 94 | return r ? r->start : -ENXIO; |
| 95 | #endif | ||
| 89 | } | 96 | } |
| 90 | EXPORT_SYMBOL_GPL(platform_get_irq); | 97 | EXPORT_SYMBOL_GPL(platform_get_irq); |
| 91 | 98 | ||
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index ca4a25ed844c..e2c17d187d98 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c | |||
| @@ -40,7 +40,7 @@ void u8500_clk_init(void) | |||
| 40 | CLK_IS_ROOT|CLK_IGNORE_UNUSED, | 40 | CLK_IS_ROOT|CLK_IGNORE_UNUSED, |
| 41 | 32768); | 41 | 32768); |
| 42 | clk_register_clkdev(clk, "clk32k", NULL); | 42 | clk_register_clkdev(clk, "clk32k", NULL); |
| 43 | clk_register_clkdev(clk, NULL, "rtc-pl031"); | 43 | clk_register_clkdev(clk, "apb_pclk", "rtc-pl031"); |
| 44 | 44 | ||
| 45 | /* PRCMU clocks */ | 45 | /* PRCMU clocks */ |
| 46 | fw_version = prcmu_get_fw_version(); | 46 | fw_version = prcmu_get_fw_version(); |
| @@ -228,10 +228,17 @@ void u8500_clk_init(void) | |||
| 228 | 228 | ||
| 229 | clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, | 229 | clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, |
| 230 | BIT(2), 0); | 230 | BIT(2), 0); |
| 231 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.1"); | ||
| 232 | |||
| 231 | clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, | 233 | clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, |
| 232 | BIT(3), 0); | 234 | BIT(3), 0); |
| 235 | clk_register_clkdev(clk, "apb_pclk", "msp0"); | ||
| 236 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.0"); | ||
| 237 | |||
| 233 | clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, | 238 | clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, |
| 234 | BIT(4), 0); | 239 | BIT(4), 0); |
| 240 | clk_register_clkdev(clk, "apb_pclk", "msp1"); | ||
| 241 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.1"); | ||
| 235 | 242 | ||
| 236 | clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, | 243 | clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, |
| 237 | BIT(5), 0); | 244 | BIT(5), 0); |
| @@ -239,6 +246,7 @@ void u8500_clk_init(void) | |||
| 239 | 246 | ||
| 240 | clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, | 247 | clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, |
| 241 | BIT(6), 0); | 248 | BIT(6), 0); |
| 249 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.2"); | ||
| 242 | 250 | ||
| 243 | clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, | 251 | clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, |
| 244 | BIT(7), 0); | 252 | BIT(7), 0); |
| @@ -246,6 +254,7 @@ void u8500_clk_init(void) | |||
| 246 | 254 | ||
| 247 | clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, | 255 | clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, |
| 248 | BIT(8), 0); | 256 | BIT(8), 0); |
| 257 | clk_register_clkdev(clk, "apb_pclk", "slimbus0"); | ||
| 249 | 258 | ||
| 250 | clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, | 259 | clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, |
| 251 | BIT(9), 0); | 260 | BIT(9), 0); |
| @@ -255,11 +264,16 @@ void u8500_clk_init(void) | |||
| 255 | 264 | ||
| 256 | clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, | 265 | clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, |
| 257 | BIT(10), 0); | 266 | BIT(10), 0); |
| 267 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.4"); | ||
| 268 | |||
| 258 | clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, | 269 | clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, |
| 259 | BIT(11), 0); | 270 | BIT(11), 0); |
| 271 | clk_register_clkdev(clk, "apb_pclk", "msp3"); | ||
| 272 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.3"); | ||
| 260 | 273 | ||
| 261 | clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, | 274 | clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, |
| 262 | BIT(0), 0); | 275 | BIT(0), 0); |
| 276 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.3"); | ||
| 263 | 277 | ||
| 264 | clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, | 278 | clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, |
| 265 | BIT(1), 0); | 279 | BIT(1), 0); |
| @@ -279,12 +293,13 @@ void u8500_clk_init(void) | |||
| 279 | 293 | ||
| 280 | clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, | 294 | clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, |
| 281 | BIT(5), 0); | 295 | BIT(5), 0); |
| 296 | clk_register_clkdev(clk, "apb_pclk", "msp2"); | ||
| 297 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.2"); | ||
| 282 | 298 | ||
| 283 | clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, | 299 | clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, |
| 284 | BIT(6), 0); | 300 | BIT(6), 0); |
| 285 | clk_register_clkdev(clk, "apb_pclk", "sdi1"); | 301 | clk_register_clkdev(clk, "apb_pclk", "sdi1"); |
| 286 | 302 | ||
| 287 | |||
| 288 | clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, | 303 | clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, |
| 289 | BIT(7), 0); | 304 | BIT(7), 0); |
| 290 | clk_register_clkdev(clk, "apb_pclk", "sdi3"); | 305 | clk_register_clkdev(clk, "apb_pclk", "sdi3"); |
| @@ -316,10 +331,15 @@ void u8500_clk_init(void) | |||
| 316 | 331 | ||
| 317 | clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, | 332 | clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, |
| 318 | BIT(1), 0); | 333 | BIT(1), 0); |
| 334 | clk_register_clkdev(clk, "apb_pclk", "ssp0"); | ||
| 335 | |||
| 319 | clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, | 336 | clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, |
| 320 | BIT(2), 0); | 337 | BIT(2), 0); |
| 338 | clk_register_clkdev(clk, "apb_pclk", "ssp1"); | ||
| 339 | |||
| 321 | clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, | 340 | clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, |
| 322 | BIT(3), 0); | 341 | BIT(3), 0); |
| 342 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.0"); | ||
| 323 | 343 | ||
| 324 | clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, | 344 | clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, |
| 325 | BIT(4), 0); | 345 | BIT(4), 0); |
| @@ -401,10 +421,17 @@ void u8500_clk_init(void) | |||
| 401 | 421 | ||
| 402 | clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", | 422 | clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", |
| 403 | U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); | 423 | U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); |
| 424 | clk_register_clkdev(clk, NULL, "nmk-i2c.1"); | ||
| 425 | |||
| 404 | clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", | 426 | clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", |
| 405 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); | 427 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); |
| 428 | clk_register_clkdev(clk, NULL, "msp0"); | ||
| 429 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0"); | ||
| 430 | |||
| 406 | clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", | 431 | clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", |
| 407 | U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); | 432 | U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); |
| 433 | clk_register_clkdev(clk, NULL, "msp1"); | ||
| 434 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1"); | ||
| 408 | 435 | ||
| 409 | clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", | 436 | clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", |
| 410 | U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); | 437 | U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); |
| @@ -412,17 +439,25 @@ void u8500_clk_init(void) | |||
| 412 | 439 | ||
| 413 | clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", | 440 | clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", |
| 414 | U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); | 441 | U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); |
| 442 | clk_register_clkdev(clk, NULL, "nmk-i2c.2"); | ||
| 443 | |||
| 415 | clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", | 444 | clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", |
| 416 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); | 445 | U8500_CLKRST1_BASE, BIT(8), CLK_SET_RATE_GATE); |
| 417 | /* FIXME: Redefinition of BIT(3). */ | 446 | clk_register_clkdev(clk, NULL, "slimbus0"); |
| 447 | |||
| 418 | clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", | 448 | clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", |
| 419 | U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); | 449 | U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); |
| 450 | clk_register_clkdev(clk, NULL, "nmk-i2c.4"); | ||
| 451 | |||
| 420 | clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", | 452 | clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", |
| 421 | U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); | 453 | U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); |
| 454 | clk_register_clkdev(clk, NULL, "msp3"); | ||
| 455 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3"); | ||
| 422 | 456 | ||
| 423 | /* Periph2 */ | 457 | /* Periph2 */ |
| 424 | clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", | 458 | clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", |
| 425 | U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); | 459 | U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); |
| 460 | clk_register_clkdev(clk, NULL, "nmk-i2c.3"); | ||
| 426 | 461 | ||
| 427 | clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", | 462 | clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", |
| 428 | U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); | 463 | U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); |
| @@ -430,6 +465,8 @@ void u8500_clk_init(void) | |||
| 430 | 465 | ||
| 431 | clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", | 466 | clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", |
| 432 | U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); | 467 | U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); |
| 468 | clk_register_clkdev(clk, NULL, "msp2"); | ||
| 469 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2"); | ||
| 433 | 470 | ||
| 434 | clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", | 471 | clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", |
| 435 | U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); | 472 | U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); |
| @@ -450,10 +487,15 @@ void u8500_clk_init(void) | |||
| 450 | /* Periph3 */ | 487 | /* Periph3 */ |
| 451 | clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", | 488 | clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", |
| 452 | U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); | 489 | U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); |
| 490 | clk_register_clkdev(clk, NULL, "ssp0"); | ||
| 491 | |||
| 453 | clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", | 492 | clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", |
| 454 | U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); | 493 | U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); |
| 494 | clk_register_clkdev(clk, NULL, "ssp1"); | ||
| 495 | |||
| 455 | clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", | 496 | clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", |
| 456 | U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); | 497 | U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); |
| 498 | clk_register_clkdev(clk, NULL, "nmk-i2c.0"); | ||
| 457 | 499 | ||
| 458 | clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", | 500 | clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", |
| 459 | U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); | 501 | U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); |
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index d055cee36942..f11d8e3b4041 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
| @@ -47,7 +47,7 @@ if GPIOLIB | |||
| 47 | 47 | ||
| 48 | config OF_GPIO | 48 | config OF_GPIO |
| 49 | def_bool y | 49 | def_bool y |
| 50 | depends on OF && !SPARC | 50 | depends on OF |
| 51 | 51 | ||
| 52 | config DEBUG_GPIO | 52 | config DEBUG_GPIO |
| 53 | bool "Debug GPIO calls" | 53 | bool "Debug GPIO calls" |
diff --git a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c index 16a9afb1060b..05a909a17cee 100644 --- a/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c +++ b/drivers/gpu/drm/nouveau/core/engine/disp/nv50.c | |||
| @@ -22,6 +22,8 @@ | |||
| 22 | * Authors: Ben Skeggs | 22 | * Authors: Ben Skeggs |
| 23 | */ | 23 | */ |
| 24 | 24 | ||
| 25 | #include <subdev/bar.h> | ||
| 26 | |||
| 25 | #include <engine/software.h> | 27 | #include <engine/software.h> |
| 26 | #include <engine/disp.h> | 28 | #include <engine/disp.h> |
| 27 | 29 | ||
| @@ -37,6 +39,7 @@ nv50_disp_sclass[] = { | |||
| 37 | static void | 39 | static void |
| 38 | nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) | 40 | nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) |
| 39 | { | 41 | { |
| 42 | struct nouveau_bar *bar = nouveau_bar(priv); | ||
| 40 | struct nouveau_disp *disp = &priv->base; | 43 | struct nouveau_disp *disp = &priv->base; |
| 41 | struct nouveau_software_chan *chan, *temp; | 44 | struct nouveau_software_chan *chan, *temp; |
| 42 | unsigned long flags; | 45 | unsigned long flags; |
| @@ -46,18 +49,19 @@ nv50_disp_intr_vblank(struct nv50_disp_priv *priv, int crtc) | |||
| 46 | if (chan->vblank.crtc != crtc) | 49 | if (chan->vblank.crtc != crtc) |
| 47 | continue; | 50 | continue; |
| 48 | 51 | ||
| 49 | nv_wr32(priv, 0x001704, chan->vblank.channel); | ||
| 50 | nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); | ||
| 51 | |||
| 52 | if (nv_device(priv)->chipset == 0x50) { | 52 | if (nv_device(priv)->chipset == 0x50) { |
| 53 | nv_wr32(priv, 0x001704, chan->vblank.channel); | ||
| 54 | nv_wr32(priv, 0x001710, 0x80000000 | chan->vblank.ctxdma); | ||
| 55 | bar->flush(bar); | ||
| 53 | nv_wr32(priv, 0x001570, chan->vblank.offset); | 56 | nv_wr32(priv, 0x001570, chan->vblank.offset); |
| 54 | nv_wr32(priv, 0x001574, chan->vblank.value); | 57 | nv_wr32(priv, 0x001574, chan->vblank.value); |
| 55 | } else { | 58 | } else { |
| 56 | if (nv_device(priv)->chipset >= 0xc0) { | 59 | nv_wr32(priv, 0x001718, 0x80000000 | chan->vblank.channel); |
| 57 | nv_wr32(priv, 0x06000c, | 60 | bar->flush(bar); |
| 58 | upper_32_bits(chan->vblank.offset)); | 61 | nv_wr32(priv, 0x06000c, |
| 59 | } | 62 | upper_32_bits(chan->vblank.offset)); |
| 60 | nv_wr32(priv, 0x060010, chan->vblank.offset); | 63 | nv_wr32(priv, 0x060010, |
| 64 | lower_32_bits(chan->vblank.offset)); | ||
| 61 | nv_wr32(priv, 0x060014, chan->vblank.value); | 65 | nv_wr32(priv, 0x060014, chan->vblank.value); |
| 62 | } | 66 | } |
| 63 | 67 | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c index 8d0021049ec0..425001204a89 100644 --- a/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/graph/nv40.c | |||
| @@ -156,8 +156,8 @@ nv40_graph_context_ctor(struct nouveau_object *parent, | |||
| 156 | static int | 156 | static int |
| 157 | nv40_graph_context_fini(struct nouveau_object *object, bool suspend) | 157 | nv40_graph_context_fini(struct nouveau_object *object, bool suspend) |
| 158 | { | 158 | { |
| 159 | struct nv04_graph_priv *priv = (void *)object->engine; | 159 | struct nv40_graph_priv *priv = (void *)object->engine; |
| 160 | struct nv04_graph_chan *chan = (void *)object; | 160 | struct nv40_graph_chan *chan = (void *)object; |
| 161 | u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4; | 161 | u32 inst = 0x01000000 | nv_gpuobj(chan)->addr >> 4; |
| 162 | int ret = 0; | 162 | int ret = 0; |
| 163 | 163 | ||
diff --git a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c index 12418574efea..f7c581ad1991 100644 --- a/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c +++ b/drivers/gpu/drm/nouveau/core/engine/mpeg/nv40.c | |||
| @@ -38,7 +38,7 @@ struct nv40_mpeg_priv { | |||
| 38 | }; | 38 | }; |
| 39 | 39 | ||
| 40 | struct nv40_mpeg_chan { | 40 | struct nv40_mpeg_chan { |
| 41 | struct nouveau_mpeg base; | 41 | struct nouveau_mpeg_chan base; |
| 42 | }; | 42 | }; |
| 43 | 43 | ||
| 44 | /******************************************************************************* | 44 | /******************************************************************************* |
diff --git a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c index 49050d991e75..9474cfca6e4c 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c +++ b/drivers/gpu/drm/nouveau/core/subdev/vm/nv41.c | |||
| @@ -67,7 +67,7 @@ nv41_vm_unmap(struct nouveau_gpuobj *pgt, u32 pte, u32 cnt) | |||
| 67 | static void | 67 | static void |
| 68 | nv41_vm_flush(struct nouveau_vm *vm) | 68 | nv41_vm_flush(struct nouveau_vm *vm) |
| 69 | { | 69 | { |
| 70 | struct nv04_vm_priv *priv = (void *)vm->vmm; | 70 | struct nv04_vmmgr_priv *priv = (void *)vm->vmm; |
| 71 | 71 | ||
| 72 | mutex_lock(&nv_subdev(priv)->mutex); | 72 | mutex_lock(&nv_subdev(priv)->mutex); |
| 73 | nv_wr32(priv, 0x100810, 0x00000022); | 73 | nv_wr32(priv, 0x100810, 0x00000022); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index 9a6e2cb282dc..d3595b23434a 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
| @@ -355,7 +355,7 @@ nouveau_connector_detect_lvds(struct drm_connector *connector, bool force) | |||
| 355 | * valid - it's not (rh#613284) | 355 | * valid - it's not (rh#613284) |
| 356 | */ | 356 | */ |
| 357 | if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) { | 357 | if (nv_encoder->dcb->lvdsconf.use_acpi_for_edid) { |
| 358 | if (!(nv_connector->edid = nouveau_acpi_edid(dev, connector))) { | 358 | if ((nv_connector->edid = nouveau_acpi_edid(dev, connector))) { |
| 359 | status = connector_status_connected; | 359 | status = connector_status_connected; |
| 360 | goto out; | 360 | goto out; |
| 361 | } | 361 | } |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 2e566e123e9e..3bce0299f64a 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
| @@ -1696,35 +1696,43 @@ static int radeon_atom_pick_pll(struct drm_crtc *crtc) | |||
| 1696 | return ATOM_PPLL2; | 1696 | return ATOM_PPLL2; |
| 1697 | DRM_ERROR("unable to allocate a PPLL\n"); | 1697 | DRM_ERROR("unable to allocate a PPLL\n"); |
| 1698 | return ATOM_PPLL_INVALID; | 1698 | return ATOM_PPLL_INVALID; |
| 1699 | } else { | 1699 | } else if (ASIC_IS_AVIVO(rdev)) { |
| 1700 | if (ASIC_IS_AVIVO(rdev)) { | 1700 | /* in DP mode, the DP ref clock can come from either PPLL |
| 1701 | /* in DP mode, the DP ref clock can come from either PPLL | 1701 | * depending on the asic: |
| 1702 | * depending on the asic: | 1702 | * DCE3: PPLL1 or PPLL2 |
| 1703 | * DCE3: PPLL1 or PPLL2 | 1703 | */ |
| 1704 | */ | 1704 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) { |
| 1705 | if (ENCODER_MODE_IS_DP(atombios_get_encoder_mode(radeon_crtc->encoder))) { | 1705 | /* use the same PPLL for all DP monitors */ |
| 1706 | /* use the same PPLL for all DP monitors */ | 1706 | pll = radeon_get_shared_dp_ppll(crtc); |
| 1707 | pll = radeon_get_shared_dp_ppll(crtc); | 1707 | if (pll != ATOM_PPLL_INVALID) |
| 1708 | if (pll != ATOM_PPLL_INVALID) | 1708 | return pll; |
| 1709 | return pll; | 1709 | } else { |
| 1710 | } else { | 1710 | /* use the same PPLL for all monitors with the same clock */ |
| 1711 | /* use the same PPLL for all monitors with the same clock */ | 1711 | pll = radeon_get_shared_nondp_ppll(crtc); |
| 1712 | pll = radeon_get_shared_nondp_ppll(crtc); | 1712 | if (pll != ATOM_PPLL_INVALID) |
| 1713 | if (pll != ATOM_PPLL_INVALID) | 1713 | return pll; |
| 1714 | return pll; | 1714 | } |
| 1715 | } | 1715 | /* all other cases */ |
| 1716 | /* all other cases */ | 1716 | pll_in_use = radeon_get_pll_use_mask(crtc); |
| 1717 | pll_in_use = radeon_get_pll_use_mask(crtc); | 1717 | /* the order shouldn't matter here, but we probably |
| 1718 | * need this until we have atomic modeset | ||
| 1719 | */ | ||
| 1720 | if (rdev->flags & RADEON_IS_IGP) { | ||
| 1718 | if (!(pll_in_use & (1 << ATOM_PPLL1))) | 1721 | if (!(pll_in_use & (1 << ATOM_PPLL1))) |
| 1719 | return ATOM_PPLL1; | 1722 | return ATOM_PPLL1; |
| 1720 | if (!(pll_in_use & (1 << ATOM_PPLL2))) | 1723 | if (!(pll_in_use & (1 << ATOM_PPLL2))) |
| 1721 | return ATOM_PPLL2; | 1724 | return ATOM_PPLL2; |
| 1722 | DRM_ERROR("unable to allocate a PPLL\n"); | ||
| 1723 | return ATOM_PPLL_INVALID; | ||
| 1724 | } else { | 1725 | } else { |
| 1725 | /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */ | 1726 | if (!(pll_in_use & (1 << ATOM_PPLL2))) |
| 1726 | return radeon_crtc->crtc_id; | 1727 | return ATOM_PPLL2; |
| 1728 | if (!(pll_in_use & (1 << ATOM_PPLL1))) | ||
| 1729 | return ATOM_PPLL1; | ||
| 1727 | } | 1730 | } |
| 1731 | DRM_ERROR("unable to allocate a PPLL\n"); | ||
| 1732 | return ATOM_PPLL_INVALID; | ||
| 1733 | } else { | ||
| 1734 | /* on pre-R5xx asics, the crtc to pll mapping is hardcoded */ | ||
| 1735 | return radeon_crtc->crtc_id; | ||
| 1728 | } | 1736 | } |
| 1729 | } | 1737 | } |
| 1730 | 1738 | ||
diff --git a/drivers/gpu/drm/radeon/evergreen_cs.c b/drivers/gpu/drm/radeon/evergreen_cs.c index 95e6318b6268..c042e497e450 100644 --- a/drivers/gpu/drm/radeon/evergreen_cs.c +++ b/drivers/gpu/drm/radeon/evergreen_cs.c | |||
| @@ -2725,6 +2725,9 @@ static bool evergreen_vm_reg_valid(u32 reg) | |||
| 2725 | /* check config regs */ | 2725 | /* check config regs */ |
| 2726 | switch (reg) { | 2726 | switch (reg) { |
| 2727 | case GRBM_GFX_INDEX: | 2727 | case GRBM_GFX_INDEX: |
| 2728 | case CP_STRMOUT_CNTL: | ||
| 2729 | case CP_COHER_CNTL: | ||
| 2730 | case CP_COHER_SIZE: | ||
| 2728 | case VGT_VTX_VECT_EJECT_REG: | 2731 | case VGT_VTX_VECT_EJECT_REG: |
| 2729 | case VGT_CACHE_INVALIDATION: | 2732 | case VGT_CACHE_INVALIDATION: |
| 2730 | case VGT_GS_VERTEX_REUSE: | 2733 | case VGT_GS_VERTEX_REUSE: |
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index df542f1a5dfb..2bc0f6a1b428 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
| @@ -91,6 +91,10 @@ | |||
| 91 | #define FB_READ_EN (1 << 0) | 91 | #define FB_READ_EN (1 << 0) |
| 92 | #define FB_WRITE_EN (1 << 1) | 92 | #define FB_WRITE_EN (1 << 1) |
| 93 | 93 | ||
| 94 | #define CP_STRMOUT_CNTL 0x84FC | ||
| 95 | |||
| 96 | #define CP_COHER_CNTL 0x85F0 | ||
| 97 | #define CP_COHER_SIZE 0x85F4 | ||
| 94 | #define CP_COHER_BASE 0x85F8 | 98 | #define CP_COHER_BASE 0x85F8 |
| 95 | #define CP_STALLED_STAT1 0x8674 | 99 | #define CP_STALLED_STAT1 0x8674 |
| 96 | #define CP_STALLED_STAT2 0x8678 | 100 | #define CP_STALLED_STAT2 0x8678 |
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c index b0db712060fb..4422d630b33b 100644 --- a/drivers/gpu/drm/radeon/si.c +++ b/drivers/gpu/drm/radeon/si.c | |||
| @@ -2474,6 +2474,7 @@ static bool si_vm_reg_valid(u32 reg) | |||
| 2474 | /* check config regs */ | 2474 | /* check config regs */ |
| 2475 | switch (reg) { | 2475 | switch (reg) { |
| 2476 | case GRBM_GFX_INDEX: | 2476 | case GRBM_GFX_INDEX: |
| 2477 | case CP_STRMOUT_CNTL: | ||
| 2477 | case VGT_VTX_VECT_EJECT_REG: | 2478 | case VGT_VTX_VECT_EJECT_REG: |
| 2478 | case VGT_CACHE_INVALIDATION: | 2479 | case VGT_CACHE_INVALIDATION: |
| 2479 | case VGT_ESGS_RING_SIZE: | 2480 | case VGT_ESGS_RING_SIZE: |
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h index 7d2a20e56577..a8871afc5b4e 100644 --- a/drivers/gpu/drm/radeon/sid.h +++ b/drivers/gpu/drm/radeon/sid.h | |||
| @@ -424,6 +424,7 @@ | |||
| 424 | # define RDERR_INT_ENABLE (1 << 0) | 424 | # define RDERR_INT_ENABLE (1 << 0) |
| 425 | # define GUI_IDLE_INT_ENABLE (1 << 19) | 425 | # define GUI_IDLE_INT_ENABLE (1 << 19) |
| 426 | 426 | ||
| 427 | #define CP_STRMOUT_CNTL 0x84FC | ||
| 427 | #define SCRATCH_REG0 0x8500 | 428 | #define SCRATCH_REG0 0x8500 |
| 428 | #define SCRATCH_REG1 0x8504 | 429 | #define SCRATCH_REG1 0x8504 |
| 429 | #define SCRATCH_REG2 0x8508 | 430 | #define SCRATCH_REG2 0x8508 |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c index 3ce68a2e312d..d1498bfd7873 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_dmabuf.c | |||
| @@ -306,7 +306,7 @@ void vmw_bo_pin(struct ttm_buffer_object *bo, bool pin) | |||
| 306 | 306 | ||
| 307 | BUG_ON(!atomic_read(&bo->reserved)); | 307 | BUG_ON(!atomic_read(&bo->reserved)); |
| 308 | BUG_ON(old_mem_type != TTM_PL_VRAM && | 308 | BUG_ON(old_mem_type != TTM_PL_VRAM && |
| 309 | old_mem_type != VMW_PL_FLAG_GMR); | 309 | old_mem_type != VMW_PL_GMR); |
| 310 | 310 | ||
| 311 | pl_flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED; | 311 | pl_flags = TTM_PL_FLAG_VRAM | VMW_PL_FLAG_GMR | TTM_PL_FLAG_CACHED; |
| 312 | if (pin) | 312 | if (pin) |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index ed3c1e7ddde9..2dd185e42f21 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | |||
| @@ -1098,6 +1098,11 @@ static void vmw_pm_complete(struct device *kdev) | |||
| 1098 | struct drm_device *dev = pci_get_drvdata(pdev); | 1098 | struct drm_device *dev = pci_get_drvdata(pdev); |
| 1099 | struct vmw_private *dev_priv = vmw_priv(dev); | 1099 | struct vmw_private *dev_priv = vmw_priv(dev); |
| 1100 | 1100 | ||
| 1101 | mutex_lock(&dev_priv->hw_mutex); | ||
| 1102 | vmw_write(dev_priv, SVGA_REG_ID, SVGA_ID_2); | ||
| 1103 | (void) vmw_read(dev_priv, SVGA_REG_ID); | ||
| 1104 | mutex_unlock(&dev_priv->hw_mutex); | ||
| 1105 | |||
| 1101 | /** | 1106 | /** |
| 1102 | * Reclaim 3d reference held by fbdev and potentially | 1107 | * Reclaim 3d reference held by fbdev and potentially |
| 1103 | * start fifo. | 1108 | * start fifo. |
diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c index 17d15bb610d1..7c47fc3f7b2b 100644 --- a/drivers/hid/hidraw.c +++ b/drivers/hid/hidraw.c | |||
| @@ -42,7 +42,6 @@ static struct cdev hidraw_cdev; | |||
| 42 | static struct class *hidraw_class; | 42 | static struct class *hidraw_class; |
| 43 | static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES]; | 43 | static struct hidraw *hidraw_table[HIDRAW_MAX_DEVICES]; |
| 44 | static DEFINE_MUTEX(minors_lock); | 44 | static DEFINE_MUTEX(minors_lock); |
| 45 | static void drop_ref(struct hidraw *hid, int exists_bit); | ||
| 46 | 45 | ||
| 47 | static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) | 46 | static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos) |
| 48 | { | 47 | { |
| @@ -114,7 +113,7 @@ static ssize_t hidraw_send_report(struct file *file, const char __user *buffer, | |||
| 114 | __u8 *buf; | 113 | __u8 *buf; |
| 115 | int ret = 0; | 114 | int ret = 0; |
| 116 | 115 | ||
| 117 | if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { | 116 | if (!hidraw_table[minor]) { |
| 118 | ret = -ENODEV; | 117 | ret = -ENODEV; |
| 119 | goto out; | 118 | goto out; |
| 120 | } | 119 | } |
| @@ -262,7 +261,7 @@ static int hidraw_open(struct inode *inode, struct file *file) | |||
| 262 | } | 261 | } |
| 263 | 262 | ||
| 264 | mutex_lock(&minors_lock); | 263 | mutex_lock(&minors_lock); |
| 265 | if (!hidraw_table[minor] || !hidraw_table[minor]->exist) { | 264 | if (!hidraw_table[minor]) { |
| 266 | err = -ENODEV; | 265 | err = -ENODEV; |
| 267 | goto out_unlock; | 266 | goto out_unlock; |
| 268 | } | 267 | } |
| @@ -299,12 +298,36 @@ out: | |||
| 299 | static int hidraw_release(struct inode * inode, struct file * file) | 298 | static int hidraw_release(struct inode * inode, struct file * file) |
| 300 | { | 299 | { |
| 301 | unsigned int minor = iminor(inode); | 300 | unsigned int minor = iminor(inode); |
| 301 | struct hidraw *dev; | ||
| 302 | struct hidraw_list *list = file->private_data; | 302 | struct hidraw_list *list = file->private_data; |
| 303 | int ret; | ||
| 304 | int i; | ||
| 305 | |||
| 306 | mutex_lock(&minors_lock); | ||
| 307 | if (!hidraw_table[minor]) { | ||
| 308 | ret = -ENODEV; | ||
| 309 | goto unlock; | ||
| 310 | } | ||
| 303 | 311 | ||
| 304 | drop_ref(hidraw_table[minor], 0); | ||
| 305 | list_del(&list->node); | 312 | list_del(&list->node); |
| 313 | dev = hidraw_table[minor]; | ||
| 314 | if (!--dev->open) { | ||
| 315 | if (list->hidraw->exist) { | ||
| 316 | hid_hw_power(dev->hid, PM_HINT_NORMAL); | ||
| 317 | hid_hw_close(dev->hid); | ||
| 318 | } else { | ||
| 319 | kfree(list->hidraw); | ||
| 320 | } | ||
| 321 | } | ||
| 322 | |||
| 323 | for (i = 0; i < HIDRAW_BUFFER_SIZE; ++i) | ||
| 324 | kfree(list->buffer[i].value); | ||
| 306 | kfree(list); | 325 | kfree(list); |
| 307 | return 0; | 326 | ret = 0; |
| 327 | unlock: | ||
| 328 | mutex_unlock(&minors_lock); | ||
| 329 | |||
| 330 | return ret; | ||
| 308 | } | 331 | } |
| 309 | 332 | ||
| 310 | static long hidraw_ioctl(struct file *file, unsigned int cmd, | 333 | static long hidraw_ioctl(struct file *file, unsigned int cmd, |
| @@ -506,7 +529,21 @@ EXPORT_SYMBOL_GPL(hidraw_connect); | |||
| 506 | void hidraw_disconnect(struct hid_device *hid) | 529 | void hidraw_disconnect(struct hid_device *hid) |
| 507 | { | 530 | { |
| 508 | struct hidraw *hidraw = hid->hidraw; | 531 | struct hidraw *hidraw = hid->hidraw; |
| 509 | drop_ref(hidraw, 1); | 532 | |
| 533 | mutex_lock(&minors_lock); | ||
| 534 | hidraw->exist = 0; | ||
| 535 | |||
| 536 | device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); | ||
| 537 | |||
| 538 | hidraw_table[hidraw->minor] = NULL; | ||
| 539 | |||
| 540 | if (hidraw->open) { | ||
| 541 | hid_hw_close(hid); | ||
| 542 | wake_up_interruptible(&hidraw->wait); | ||
| 543 | } else { | ||
| 544 | kfree(hidraw); | ||
| 545 | } | ||
| 546 | mutex_unlock(&minors_lock); | ||
| 510 | } | 547 | } |
| 511 | EXPORT_SYMBOL_GPL(hidraw_disconnect); | 548 | EXPORT_SYMBOL_GPL(hidraw_disconnect); |
| 512 | 549 | ||
| @@ -555,23 +592,3 @@ void hidraw_exit(void) | |||
| 555 | unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); | 592 | unregister_chrdev_region(dev_id, HIDRAW_MAX_DEVICES); |
| 556 | 593 | ||
| 557 | } | 594 | } |
| 558 | |||
| 559 | static void drop_ref(struct hidraw *hidraw, int exists_bit) | ||
| 560 | { | ||
| 561 | mutex_lock(&minors_lock); | ||
| 562 | if (exists_bit) { | ||
| 563 | hid_hw_close(hidraw->hid); | ||
| 564 | hidraw->exist = 0; | ||
| 565 | if (hidraw->open) | ||
| 566 | wake_up_interruptible(&hidraw->wait); | ||
| 567 | } else { | ||
| 568 | --hidraw->open; | ||
| 569 | } | ||
| 570 | |||
| 571 | if (!hidraw->open && !hidraw->exist) { | ||
| 572 | device_destroy(hidraw_class, MKDEV(hidraw_major, hidraw->minor)); | ||
| 573 | hidraw_table[hidraw->minor] = NULL; | ||
| 574 | kfree(hidraw); | ||
| 575 | } | ||
| 576 | mutex_unlock(&minors_lock); | ||
| 577 | } | ||
diff --git a/drivers/i2c/muxes/i2c-mux-pinctrl.c b/drivers/i2c/muxes/i2c-mux-pinctrl.c index 5f097f309b9f..7fa5b24b16db 100644 --- a/drivers/i2c/muxes/i2c-mux-pinctrl.c +++ b/drivers/i2c/muxes/i2c-mux-pinctrl.c | |||
| @@ -169,7 +169,7 @@ static int __devinit i2c_mux_pinctrl_probe(struct platform_device *pdev) | |||
| 169 | mux->busses = devm_kzalloc(&pdev->dev, | 169 | mux->busses = devm_kzalloc(&pdev->dev, |
| 170 | sizeof(mux->busses) * mux->pdata->bus_count, | 170 | sizeof(mux->busses) * mux->pdata->bus_count, |
| 171 | GFP_KERNEL); | 171 | GFP_KERNEL); |
| 172 | if (!mux->states) { | 172 | if (!mux->busses) { |
| 173 | dev_err(&pdev->dev, "Cannot allocate busses\n"); | 173 | dev_err(&pdev->dev, "Cannot allocate busses\n"); |
| 174 | ret = -ENOMEM; | 174 | ret = -ENOMEM; |
| 175 | goto err; | 175 | goto err; |
diff --git a/drivers/isdn/Kconfig b/drivers/isdn/Kconfig index a233ed53913a..86cd75a0e84d 100644 --- a/drivers/isdn/Kconfig +++ b/drivers/isdn/Kconfig | |||
| @@ -4,7 +4,7 @@ | |||
| 4 | 4 | ||
| 5 | menuconfig ISDN | 5 | menuconfig ISDN |
| 6 | bool "ISDN support" | 6 | bool "ISDN support" |
| 7 | depends on NET | 7 | depends on NET && NETDEVICES |
| 8 | depends on !S390 && !UML | 8 | depends on !S390 && !UML |
| 9 | ---help--- | 9 | ---help--- |
| 10 | ISDN ("Integrated Services Digital Network", called RNIS in France) | 10 | ISDN ("Integrated Services Digital Network", called RNIS in France) |
diff --git a/drivers/isdn/i4l/Kconfig b/drivers/isdn/i4l/Kconfig index 2302fbe70ac6..9c6650ea848e 100644 --- a/drivers/isdn/i4l/Kconfig +++ b/drivers/isdn/i4l/Kconfig | |||
| @@ -6,7 +6,7 @@ if ISDN_I4L | |||
| 6 | 6 | ||
| 7 | config ISDN_PPP | 7 | config ISDN_PPP |
| 8 | bool "Support synchronous PPP" | 8 | bool "Support synchronous PPP" |
| 9 | depends on INET && NETDEVICES | 9 | depends on INET |
| 10 | select SLHC | 10 | select SLHC |
| 11 | help | 11 | help |
| 12 | Over digital connections such as ISDN, there is no need to | 12 | Over digital connections such as ISDN, there is no need to |
diff --git a/drivers/isdn/i4l/isdn_common.c b/drivers/isdn/i4l/isdn_common.c index 8c610fa6782b..e2a945ee9f05 100644 --- a/drivers/isdn/i4l/isdn_common.c +++ b/drivers/isdn/i4l/isdn_common.c | |||
| @@ -1312,7 +1312,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) | |||
| 1312 | } else | 1312 | } else |
| 1313 | return -EINVAL; | 1313 | return -EINVAL; |
| 1314 | break; | 1314 | break; |
| 1315 | #ifdef CONFIG_NETDEVICES | ||
| 1316 | case IIOCNETGPN: | 1315 | case IIOCNETGPN: |
| 1317 | /* Get peer phone number of a connected | 1316 | /* Get peer phone number of a connected |
| 1318 | * isdn network interface */ | 1317 | * isdn network interface */ |
| @@ -1322,7 +1321,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) | |||
| 1322 | return isdn_net_getpeer(&phone, argp); | 1321 | return isdn_net_getpeer(&phone, argp); |
| 1323 | } else | 1322 | } else |
| 1324 | return -EINVAL; | 1323 | return -EINVAL; |
| 1325 | #endif | ||
| 1326 | default: | 1324 | default: |
| 1327 | return -EINVAL; | 1325 | return -EINVAL; |
| 1328 | } | 1326 | } |
| @@ -1352,7 +1350,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) | |||
| 1352 | case IIOCNETLCR: | 1350 | case IIOCNETLCR: |
| 1353 | printk(KERN_INFO "INFO: ISDN_ABC_LCR_SUPPORT not enabled\n"); | 1351 | printk(KERN_INFO "INFO: ISDN_ABC_LCR_SUPPORT not enabled\n"); |
| 1354 | return -ENODEV; | 1352 | return -ENODEV; |
| 1355 | #ifdef CONFIG_NETDEVICES | ||
| 1356 | case IIOCNETAIF: | 1353 | case IIOCNETAIF: |
| 1357 | /* Add a network-interface */ | 1354 | /* Add a network-interface */ |
| 1358 | if (arg) { | 1355 | if (arg) { |
| @@ -1491,7 +1488,6 @@ isdn_ioctl(struct file *file, uint cmd, ulong arg) | |||
| 1491 | return -EFAULT; | 1488 | return -EFAULT; |
| 1492 | return isdn_net_force_hangup(name); | 1489 | return isdn_net_force_hangup(name); |
| 1493 | break; | 1490 | break; |
| 1494 | #endif /* CONFIG_NETDEVICES */ | ||
| 1495 | case IIOCSETVER: | 1491 | case IIOCSETVER: |
| 1496 | dev->net_verbose = arg; | 1492 | dev->net_verbose = arg; |
| 1497 | printk(KERN_INFO "isdn: Verbose-Level is %d\n", dev->net_verbose); | 1493 | printk(KERN_INFO "isdn: Verbose-Level is %d\n", dev->net_verbose); |
diff --git a/drivers/leds/ledtrig-cpu.c b/drivers/leds/ledtrig-cpu.c index b312056da14d..4239b3955ff0 100644 --- a/drivers/leds/ledtrig-cpu.c +++ b/drivers/leds/ledtrig-cpu.c | |||
| @@ -33,8 +33,6 @@ | |||
| 33 | struct led_trigger_cpu { | 33 | struct led_trigger_cpu { |
| 34 | char name[MAX_NAME_LEN]; | 34 | char name[MAX_NAME_LEN]; |
| 35 | struct led_trigger *_trig; | 35 | struct led_trigger *_trig; |
| 36 | struct mutex lock; | ||
| 37 | int lock_is_inited; | ||
| 38 | }; | 36 | }; |
| 39 | 37 | ||
| 40 | static DEFINE_PER_CPU(struct led_trigger_cpu, cpu_trig); | 38 | static DEFINE_PER_CPU(struct led_trigger_cpu, cpu_trig); |
| @@ -50,12 +48,6 @@ void ledtrig_cpu(enum cpu_led_event ledevt) | |||
| 50 | { | 48 | { |
| 51 | struct led_trigger_cpu *trig = &__get_cpu_var(cpu_trig); | 49 | struct led_trigger_cpu *trig = &__get_cpu_var(cpu_trig); |
| 52 | 50 | ||
| 53 | /* mutex lock should be initialized before calling mutex_call() */ | ||
| 54 | if (!trig->lock_is_inited) | ||
| 55 | return; | ||
| 56 | |||
| 57 | mutex_lock(&trig->lock); | ||
| 58 | |||
| 59 | /* Locate the correct CPU LED */ | 51 | /* Locate the correct CPU LED */ |
| 60 | switch (ledevt) { | 52 | switch (ledevt) { |
| 61 | case CPU_LED_IDLE_END: | 53 | case CPU_LED_IDLE_END: |
| @@ -75,8 +67,6 @@ void ledtrig_cpu(enum cpu_led_event ledevt) | |||
| 75 | /* Will leave the LED as it is */ | 67 | /* Will leave the LED as it is */ |
| 76 | break; | 68 | break; |
| 77 | } | 69 | } |
| 78 | |||
| 79 | mutex_unlock(&trig->lock); | ||
| 80 | } | 70 | } |
| 81 | EXPORT_SYMBOL(ledtrig_cpu); | 71 | EXPORT_SYMBOL(ledtrig_cpu); |
| 82 | 72 | ||
| @@ -117,14 +107,9 @@ static int __init ledtrig_cpu_init(void) | |||
| 117 | for_each_possible_cpu(cpu) { | 107 | for_each_possible_cpu(cpu) { |
| 118 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); | 108 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); |
| 119 | 109 | ||
| 120 | mutex_init(&trig->lock); | ||
| 121 | |||
| 122 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); | 110 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); |
| 123 | 111 | ||
| 124 | mutex_lock(&trig->lock); | ||
| 125 | led_trigger_register_simple(trig->name, &trig->_trig); | 112 | led_trigger_register_simple(trig->name, &trig->_trig); |
| 126 | trig->lock_is_inited = 1; | ||
| 127 | mutex_unlock(&trig->lock); | ||
| 128 | } | 113 | } |
| 129 | 114 | ||
| 130 | register_syscore_ops(&ledtrig_cpu_syscore_ops); | 115 | register_syscore_ops(&ledtrig_cpu_syscore_ops); |
| @@ -142,15 +127,9 @@ static void __exit ledtrig_cpu_exit(void) | |||
| 142 | for_each_possible_cpu(cpu) { | 127 | for_each_possible_cpu(cpu) { |
| 143 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); | 128 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); |
| 144 | 129 | ||
| 145 | mutex_lock(&trig->lock); | ||
| 146 | |||
| 147 | led_trigger_unregister_simple(trig->_trig); | 130 | led_trigger_unregister_simple(trig->_trig); |
| 148 | trig->_trig = NULL; | 131 | trig->_trig = NULL; |
| 149 | memset(trig->name, 0, MAX_NAME_LEN); | 132 | memset(trig->name, 0, MAX_NAME_LEN); |
| 150 | trig->lock_is_inited = 0; | ||
| 151 | |||
| 152 | mutex_unlock(&trig->lock); | ||
| 153 | mutex_destroy(&trig->lock); | ||
| 154 | } | 133 | } |
| 155 | 134 | ||
| 156 | unregister_syscore_ops(&ledtrig_cpu_syscore_ops); | 135 | unregister_syscore_ops(&ledtrig_cpu_syscore_ops); |
diff --git a/drivers/mmc/host/dw_mmc-exynos.c b/drivers/mmc/host/dw_mmc-exynos.c index 660bbc528862..4d50da618166 100644 --- a/drivers/mmc/host/dw_mmc-exynos.c +++ b/drivers/mmc/host/dw_mmc-exynos.c | |||
| @@ -208,7 +208,7 @@ static unsigned long exynos5250_dwmmc_caps[4] = { | |||
| 208 | MMC_CAP_CMD23, | 208 | MMC_CAP_CMD23, |
| 209 | }; | 209 | }; |
| 210 | 210 | ||
| 211 | static struct dw_mci_drv_data exynos5250_drv_data = { | 211 | static const struct dw_mci_drv_data exynos5250_drv_data = { |
| 212 | .caps = exynos5250_dwmmc_caps, | 212 | .caps = exynos5250_dwmmc_caps, |
| 213 | .init = dw_mci_exynos_priv_init, | 213 | .init = dw_mci_exynos_priv_init, |
| 214 | .setup_clock = dw_mci_exynos_setup_clock, | 214 | .setup_clock = dw_mci_exynos_setup_clock, |
| @@ -220,14 +220,14 @@ static struct dw_mci_drv_data exynos5250_drv_data = { | |||
| 220 | 220 | ||
| 221 | static const struct of_device_id dw_mci_exynos_match[] = { | 221 | static const struct of_device_id dw_mci_exynos_match[] = { |
| 222 | { .compatible = "samsung,exynos5250-dw-mshc", | 222 | { .compatible = "samsung,exynos5250-dw-mshc", |
| 223 | .data = (void *)&exynos5250_drv_data, }, | 223 | .data = &exynos5250_drv_data, }, |
| 224 | {}, | 224 | {}, |
| 225 | }; | 225 | }; |
| 226 | MODULE_DEVICE_TABLE(of, dw_mci_pltfm_match); | 226 | MODULE_DEVICE_TABLE(of, dw_mci_exynos_match); |
| 227 | 227 | ||
| 228 | int dw_mci_exynos_probe(struct platform_device *pdev) | 228 | int dw_mci_exynos_probe(struct platform_device *pdev) |
| 229 | { | 229 | { |
| 230 | struct dw_mci_drv_data *drv_data; | 230 | const struct dw_mci_drv_data *drv_data; |
| 231 | const struct of_device_id *match; | 231 | const struct of_device_id *match; |
| 232 | 232 | ||
| 233 | match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); | 233 | match = of_match_node(dw_mci_exynos_match, pdev->dev.of_node); |
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index c960ca7ffbe6..917936bee5d5 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c | |||
| @@ -24,7 +24,7 @@ | |||
| 24 | #include "dw_mmc.h" | 24 | #include "dw_mmc.h" |
| 25 | 25 | ||
| 26 | int dw_mci_pltfm_register(struct platform_device *pdev, | 26 | int dw_mci_pltfm_register(struct platform_device *pdev, |
| 27 | struct dw_mci_drv_data *drv_data) | 27 | const struct dw_mci_drv_data *drv_data) |
| 28 | { | 28 | { |
| 29 | struct dw_mci *host; | 29 | struct dw_mci *host; |
| 30 | struct resource *regs; | 30 | struct resource *regs; |
| @@ -50,8 +50,8 @@ int dw_mci_pltfm_register(struct platform_device *pdev, | |||
| 50 | if (!host->regs) | 50 | if (!host->regs) |
| 51 | return -ENOMEM; | 51 | return -ENOMEM; |
| 52 | 52 | ||
| 53 | if (host->drv_data->init) { | 53 | if (drv_data && drv_data->init) { |
| 54 | ret = host->drv_data->init(host); | 54 | ret = drv_data->init(host); |
| 55 | if (ret) | 55 | if (ret) |
| 56 | return ret; | 56 | return ret; |
| 57 | } | 57 | } |
diff --git a/drivers/mmc/host/dw_mmc-pltfm.h b/drivers/mmc/host/dw_mmc-pltfm.h index 301f24541fc2..2ac37b81de4d 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.h +++ b/drivers/mmc/host/dw_mmc-pltfm.h | |||
| @@ -13,7 +13,7 @@ | |||
| 13 | #define _DW_MMC_PLTFM_H_ | 13 | #define _DW_MMC_PLTFM_H_ |
| 14 | 14 | ||
| 15 | extern int dw_mci_pltfm_register(struct platform_device *pdev, | 15 | extern int dw_mci_pltfm_register(struct platform_device *pdev, |
| 16 | struct dw_mci_drv_data *drv_data); | 16 | const struct dw_mci_drv_data *drv_data); |
| 17 | extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev); | 17 | extern int __devexit dw_mci_pltfm_remove(struct platform_device *pdev); |
| 18 | extern const struct dev_pm_ops dw_mci_pltfm_pmops; | 18 | extern const struct dev_pm_ops dw_mci_pltfm_pmops; |
| 19 | 19 | ||
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index c2828f35c3b8..c0667c8af2bd 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c | |||
| @@ -232,6 +232,7 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | |||
| 232 | { | 232 | { |
| 233 | struct mmc_data *data; | 233 | struct mmc_data *data; |
| 234 | struct dw_mci_slot *slot = mmc_priv(mmc); | 234 | struct dw_mci_slot *slot = mmc_priv(mmc); |
| 235 | struct dw_mci_drv_data *drv_data = slot->host->drv_data; | ||
| 235 | u32 cmdr; | 236 | u32 cmdr; |
| 236 | cmd->error = -EINPROGRESS; | 237 | cmd->error = -EINPROGRESS; |
| 237 | 238 | ||
| @@ -261,8 +262,8 @@ static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) | |||
| 261 | cmdr |= SDMMC_CMD_DAT_WR; | 262 | cmdr |= SDMMC_CMD_DAT_WR; |
| 262 | } | 263 | } |
| 263 | 264 | ||
| 264 | if (slot->host->drv_data->prepare_command) | 265 | if (drv_data && drv_data->prepare_command) |
| 265 | slot->host->drv_data->prepare_command(slot->host, &cmdr); | 266 | drv_data->prepare_command(slot->host, &cmdr); |
| 266 | 267 | ||
| 267 | return cmdr; | 268 | return cmdr; |
| 268 | } | 269 | } |
| @@ -434,7 +435,7 @@ static int dw_mci_idmac_init(struct dw_mci *host) | |||
| 434 | return 0; | 435 | return 0; |
| 435 | } | 436 | } |
| 436 | 437 | ||
| 437 | static struct dw_mci_dma_ops dw_mci_idmac_ops = { | 438 | static const struct dw_mci_dma_ops dw_mci_idmac_ops = { |
| 438 | .init = dw_mci_idmac_init, | 439 | .init = dw_mci_idmac_init, |
| 439 | .start = dw_mci_idmac_start_dma, | 440 | .start = dw_mci_idmac_start_dma, |
| 440 | .stop = dw_mci_idmac_stop_dma, | 441 | .stop = dw_mci_idmac_stop_dma, |
| @@ -772,6 +773,7 @@ static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
| 772 | static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | 773 | static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 773 | { | 774 | { |
| 774 | struct dw_mci_slot *slot = mmc_priv(mmc); | 775 | struct dw_mci_slot *slot = mmc_priv(mmc); |
| 776 | struct dw_mci_drv_data *drv_data = slot->host->drv_data; | ||
| 775 | u32 regs; | 777 | u32 regs; |
| 776 | 778 | ||
| 777 | /* set default 1 bit mode */ | 779 | /* set default 1 bit mode */ |
| @@ -807,8 +809,8 @@ static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
| 807 | slot->clock = ios->clock; | 809 | slot->clock = ios->clock; |
| 808 | } | 810 | } |
| 809 | 811 | ||
| 810 | if (slot->host->drv_data->set_ios) | 812 | if (drv_data && drv_data->set_ios) |
| 811 | slot->host->drv_data->set_ios(slot->host, ios); | 813 | drv_data->set_ios(slot->host, ios); |
| 812 | 814 | ||
| 813 | switch (ios->power_mode) { | 815 | switch (ios->power_mode) { |
| 814 | case MMC_POWER_UP: | 816 | case MMC_POWER_UP: |
| @@ -1815,6 +1817,7 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
| 1815 | { | 1817 | { |
| 1816 | struct mmc_host *mmc; | 1818 | struct mmc_host *mmc; |
| 1817 | struct dw_mci_slot *slot; | 1819 | struct dw_mci_slot *slot; |
| 1820 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
| 1818 | int ctrl_id, ret; | 1821 | int ctrl_id, ret; |
| 1819 | u8 bus_width; | 1822 | u8 bus_width; |
| 1820 | 1823 | ||
| @@ -1854,8 +1857,8 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
| 1854 | } else { | 1857 | } else { |
| 1855 | ctrl_id = to_platform_device(host->dev)->id; | 1858 | ctrl_id = to_platform_device(host->dev)->id; |
| 1856 | } | 1859 | } |
| 1857 | if (host->drv_data && host->drv_data->caps) | 1860 | if (drv_data && drv_data->caps) |
| 1858 | mmc->caps |= host->drv_data->caps[ctrl_id]; | 1861 | mmc->caps |= drv_data->caps[ctrl_id]; |
| 1859 | 1862 | ||
| 1860 | if (host->pdata->caps2) | 1863 | if (host->pdata->caps2) |
| 1861 | mmc->caps2 = host->pdata->caps2; | 1864 | mmc->caps2 = host->pdata->caps2; |
| @@ -1867,10 +1870,10 @@ static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) | |||
| 1867 | else | 1870 | else |
| 1868 | bus_width = 1; | 1871 | bus_width = 1; |
| 1869 | 1872 | ||
| 1870 | if (host->drv_data->setup_bus) { | 1873 | if (drv_data && drv_data->setup_bus) { |
| 1871 | struct device_node *slot_np; | 1874 | struct device_node *slot_np; |
| 1872 | slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); | 1875 | slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); |
| 1873 | ret = host->drv_data->setup_bus(host, slot_np, bus_width); | 1876 | ret = drv_data->setup_bus(host, slot_np, bus_width); |
| 1874 | if (ret) | 1877 | if (ret) |
| 1875 | goto err_setup_bus; | 1878 | goto err_setup_bus; |
| 1876 | } | 1879 | } |
| @@ -1968,7 +1971,7 @@ static void dw_mci_init_dma(struct dw_mci *host) | |||
| 1968 | /* Determine which DMA interface to use */ | 1971 | /* Determine which DMA interface to use */ |
| 1969 | #ifdef CONFIG_MMC_DW_IDMAC | 1972 | #ifdef CONFIG_MMC_DW_IDMAC |
| 1970 | host->dma_ops = &dw_mci_idmac_ops; | 1973 | host->dma_ops = &dw_mci_idmac_ops; |
| 1971 | dev_info(&host->dev, "Using internal DMA controller.\n"); | 1974 | dev_info(host->dev, "Using internal DMA controller.\n"); |
| 1972 | #endif | 1975 | #endif |
| 1973 | 1976 | ||
| 1974 | if (!host->dma_ops) | 1977 | if (!host->dma_ops) |
| @@ -2035,6 +2038,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
| 2035 | struct dw_mci_board *pdata; | 2038 | struct dw_mci_board *pdata; |
| 2036 | struct device *dev = host->dev; | 2039 | struct device *dev = host->dev; |
| 2037 | struct device_node *np = dev->of_node; | 2040 | struct device_node *np = dev->of_node; |
| 2041 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
| 2038 | int idx, ret; | 2042 | int idx, ret; |
| 2039 | 2043 | ||
| 2040 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); | 2044 | pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); |
| @@ -2062,8 +2066,8 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
| 2062 | 2066 | ||
| 2063 | of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); | 2067 | of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); |
| 2064 | 2068 | ||
| 2065 | if (host->drv_data->parse_dt) { | 2069 | if (drv_data && drv_data->parse_dt) { |
| 2066 | ret = host->drv_data->parse_dt(host); | 2070 | ret = drv_data->parse_dt(host); |
| 2067 | if (ret) | 2071 | if (ret) |
| 2068 | return ERR_PTR(ret); | 2072 | return ERR_PTR(ret); |
| 2069 | } | 2073 | } |
| @@ -2080,6 +2084,7 @@ static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) | |||
| 2080 | 2084 | ||
| 2081 | int dw_mci_probe(struct dw_mci *host) | 2085 | int dw_mci_probe(struct dw_mci *host) |
| 2082 | { | 2086 | { |
| 2087 | struct dw_mci_drv_data *drv_data = host->drv_data; | ||
| 2083 | int width, i, ret = 0; | 2088 | int width, i, ret = 0; |
| 2084 | u32 fifo_size; | 2089 | u32 fifo_size; |
| 2085 | int init_slots = 0; | 2090 | int init_slots = 0; |
| @@ -2127,8 +2132,8 @@ int dw_mci_probe(struct dw_mci *host) | |||
| 2127 | else | 2132 | else |
| 2128 | host->bus_hz = clk_get_rate(host->ciu_clk); | 2133 | host->bus_hz = clk_get_rate(host->ciu_clk); |
| 2129 | 2134 | ||
| 2130 | if (host->drv_data->setup_clock) { | 2135 | if (drv_data && drv_data->setup_clock) { |
| 2131 | ret = host->drv_data->setup_clock(host); | 2136 | ret = drv_data->setup_clock(host); |
| 2132 | if (ret) { | 2137 | if (ret) { |
| 2133 | dev_err(host->dev, | 2138 | dev_err(host->dev, |
| 2134 | "implementation specific clock setup failed\n"); | 2139 | "implementation specific clock setup failed\n"); |
| @@ -2228,6 +2233,21 @@ int dw_mci_probe(struct dw_mci *host) | |||
| 2228 | else | 2233 | else |
| 2229 | host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; | 2234 | host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; |
| 2230 | 2235 | ||
| 2236 | /* | ||
| 2237 | * Enable interrupts for command done, data over, data empty, card det, | ||
| 2238 | * receive ready and error such as transmit, receive timeout, crc error | ||
| 2239 | */ | ||
| 2240 | mci_writel(host, RINTSTS, 0xFFFFFFFF); | ||
| 2241 | mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | | ||
| 2242 | SDMMC_INT_TXDR | SDMMC_INT_RXDR | | ||
| 2243 | DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); | ||
| 2244 | mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ | ||
| 2245 | |||
| 2246 | dev_info(host->dev, "DW MMC controller at irq %d, " | ||
| 2247 | "%d bit host data width, " | ||
| 2248 | "%u deep fifo\n", | ||
| 2249 | host->irq, width, fifo_size); | ||
| 2250 | |||
| 2231 | /* We need at least one slot to succeed */ | 2251 | /* We need at least one slot to succeed */ |
| 2232 | for (i = 0; i < host->num_slots; i++) { | 2252 | for (i = 0; i < host->num_slots; i++) { |
| 2233 | ret = dw_mci_init_slot(host, i); | 2253 | ret = dw_mci_init_slot(host, i); |
| @@ -2257,20 +2277,6 @@ int dw_mci_probe(struct dw_mci *host) | |||
| 2257 | else | 2277 | else |
| 2258 | host->data_offset = DATA_240A_OFFSET; | 2278 | host->data_offset = DATA_240A_OFFSET; |
| 2259 | 2279 | ||
| 2260 | /* | ||
| 2261 | * Enable interrupts for command done, data over, data empty, card det, | ||
| 2262 | * receive ready and error such as transmit, receive timeout, crc error | ||
| 2263 | */ | ||
| 2264 | mci_writel(host, RINTSTS, 0xFFFFFFFF); | ||
| 2265 | mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | | ||
| 2266 | SDMMC_INT_TXDR | SDMMC_INT_RXDR | | ||
| 2267 | DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); | ||
| 2268 | mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ | ||
| 2269 | |||
| 2270 | dev_info(host->dev, "DW MMC controller at irq %d, " | ||
| 2271 | "%d bit host data width, " | ||
| 2272 | "%u deep fifo\n", | ||
| 2273 | host->irq, width, fifo_size); | ||
| 2274 | if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) | 2280 | if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) |
| 2275 | dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); | 2281 | dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); |
| 2276 | 2282 | ||
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index 565c2e4fac75..6290b7f1ccfe 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c | |||
| @@ -1134,4 +1134,4 @@ module_platform_driver(mxcmci_driver); | |||
| 1134 | MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); | 1134 | MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); |
| 1135 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); | 1135 | MODULE_AUTHOR("Sascha Hauer, Pengutronix"); |
| 1136 | MODULE_LICENSE("GPL"); | 1136 | MODULE_LICENSE("GPL"); |
| 1137 | MODULE_ALIAS("platform:imx-mmc"); | 1137 | MODULE_ALIAS("platform:mxc-mmc"); |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 54bfd0cc106b..fedd258cc4ea 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
| @@ -178,7 +178,8 @@ struct omap_hsmmc_host { | |||
| 178 | 178 | ||
| 179 | static int omap_hsmmc_card_detect(struct device *dev, int slot) | 179 | static int omap_hsmmc_card_detect(struct device *dev, int slot) |
| 180 | { | 180 | { |
| 181 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 181 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
| 182 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
| 182 | 183 | ||
| 183 | /* NOTE: assumes card detect signal is active-low */ | 184 | /* NOTE: assumes card detect signal is active-low */ |
| 184 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); | 185 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); |
| @@ -186,7 +187,8 @@ static int omap_hsmmc_card_detect(struct device *dev, int slot) | |||
| 186 | 187 | ||
| 187 | static int omap_hsmmc_get_wp(struct device *dev, int slot) | 188 | static int omap_hsmmc_get_wp(struct device *dev, int slot) |
| 188 | { | 189 | { |
| 189 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 190 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
| 191 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
| 190 | 192 | ||
| 191 | /* NOTE: assumes write protect signal is active-high */ | 193 | /* NOTE: assumes write protect signal is active-high */ |
| 192 | return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); | 194 | return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); |
| @@ -194,7 +196,8 @@ static int omap_hsmmc_get_wp(struct device *dev, int slot) | |||
| 194 | 196 | ||
| 195 | static int omap_hsmmc_get_cover_state(struct device *dev, int slot) | 197 | static int omap_hsmmc_get_cover_state(struct device *dev, int slot) |
| 196 | { | 198 | { |
| 197 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 199 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
| 200 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
| 198 | 201 | ||
| 199 | /* NOTE: assumes card detect signal is active-low */ | 202 | /* NOTE: assumes card detect signal is active-low */ |
| 200 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); | 203 | return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); |
| @@ -204,7 +207,8 @@ static int omap_hsmmc_get_cover_state(struct device *dev, int slot) | |||
| 204 | 207 | ||
| 205 | static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) | 208 | static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) |
| 206 | { | 209 | { |
| 207 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 210 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
| 211 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
| 208 | 212 | ||
| 209 | disable_irq(mmc->slots[0].card_detect_irq); | 213 | disable_irq(mmc->slots[0].card_detect_irq); |
| 210 | return 0; | 214 | return 0; |
| @@ -212,7 +216,8 @@ static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) | |||
| 212 | 216 | ||
| 213 | static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) | 217 | static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) |
| 214 | { | 218 | { |
| 215 | struct omap_mmc_platform_data *mmc = dev->platform_data; | 219 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
| 220 | struct omap_mmc_platform_data *mmc = host->pdata; | ||
| 216 | 221 | ||
| 217 | enable_irq(mmc->slots[0].card_detect_irq); | 222 | enable_irq(mmc->slots[0].card_detect_irq); |
| 218 | return 0; | 223 | return 0; |
| @@ -2009,9 +2014,9 @@ static int __devexit omap_hsmmc_remove(struct platform_device *pdev) | |||
| 2009 | clk_put(host->dbclk); | 2014 | clk_put(host->dbclk); |
| 2010 | } | 2015 | } |
| 2011 | 2016 | ||
| 2012 | mmc_free_host(host->mmc); | 2017 | omap_hsmmc_gpio_free(host->pdata); |
| 2013 | iounmap(host->base); | 2018 | iounmap(host->base); |
| 2014 | omap_hsmmc_gpio_free(pdev->dev.platform_data); | 2019 | mmc_free_host(host->mmc); |
| 2015 | 2020 | ||
| 2016 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2021 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 2017 | if (res) | 2022 | if (res) |
diff --git a/drivers/mmc/host/sdhci-dove.c b/drivers/mmc/host/sdhci-dove.c index 90140eb03e36..8fd50a211037 100644 --- a/drivers/mmc/host/sdhci-dove.c +++ b/drivers/mmc/host/sdhci-dove.c | |||
| @@ -19,6 +19,7 @@ | |||
| 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
| 20 | */ | 20 | */ |
| 21 | 21 | ||
| 22 | #include <linux/err.h> | ||
| 22 | #include <linux/io.h> | 23 | #include <linux/io.h> |
| 23 | #include <linux/clk.h> | 24 | #include <linux/clk.h> |
| 24 | #include <linux/err.h> | 25 | #include <linux/err.h> |
| @@ -84,30 +85,32 @@ static int __devinit sdhci_dove_probe(struct platform_device *pdev) | |||
| 84 | struct sdhci_dove_priv *priv; | 85 | struct sdhci_dove_priv *priv; |
| 85 | int ret; | 86 | int ret; |
| 86 | 87 | ||
| 87 | ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); | ||
| 88 | if (ret) | ||
| 89 | goto sdhci_dove_register_fail; | ||
| 90 | |||
| 91 | priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), | 88 | priv = devm_kzalloc(&pdev->dev, sizeof(struct sdhci_dove_priv), |
| 92 | GFP_KERNEL); | 89 | GFP_KERNEL); |
| 93 | if (!priv) { | 90 | if (!priv) { |
| 94 | dev_err(&pdev->dev, "unable to allocate private data"); | 91 | dev_err(&pdev->dev, "unable to allocate private data"); |
| 95 | ret = -ENOMEM; | 92 | return -ENOMEM; |
| 96 | goto sdhci_dove_allocate_fail; | ||
| 97 | } | 93 | } |
| 98 | 94 | ||
| 95 | priv->clk = clk_get(&pdev->dev, NULL); | ||
| 96 | if (!IS_ERR(priv->clk)) | ||
| 97 | clk_prepare_enable(priv->clk); | ||
| 98 | |||
| 99 | ret = sdhci_pltfm_register(pdev, &sdhci_dove_pdata); | ||
| 100 | if (ret) | ||
| 101 | goto sdhci_dove_register_fail; | ||
| 102 | |||
| 99 | host = platform_get_drvdata(pdev); | 103 | host = platform_get_drvdata(pdev); |
| 100 | pltfm_host = sdhci_priv(host); | 104 | pltfm_host = sdhci_priv(host); |
| 101 | pltfm_host->priv = priv; | 105 | pltfm_host->priv = priv; |
| 102 | 106 | ||
| 103 | priv->clk = clk_get(&pdev->dev, NULL); | ||
| 104 | if (!IS_ERR(priv->clk)) | ||
| 105 | clk_prepare_enable(priv->clk); | ||
| 106 | return 0; | 107 | return 0; |
| 107 | 108 | ||
| 108 | sdhci_dove_allocate_fail: | ||
| 109 | sdhci_pltfm_unregister(pdev); | ||
| 110 | sdhci_dove_register_fail: | 109 | sdhci_dove_register_fail: |
| 110 | if (!IS_ERR(priv->clk)) { | ||
| 111 | clk_disable_unprepare(priv->clk); | ||
| 112 | clk_put(priv->clk); | ||
| 113 | } | ||
| 111 | return ret; | 114 | return ret; |
| 112 | } | 115 | } |
| 113 | 116 | ||
| @@ -117,14 +120,13 @@ static int __devexit sdhci_dove_remove(struct platform_device *pdev) | |||
| 117 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); | 120 | struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); |
| 118 | struct sdhci_dove_priv *priv = pltfm_host->priv; | 121 | struct sdhci_dove_priv *priv = pltfm_host->priv; |
| 119 | 122 | ||
| 120 | if (priv->clk) { | 123 | sdhci_pltfm_unregister(pdev); |
| 121 | if (!IS_ERR(priv->clk)) { | 124 | |
| 122 | clk_disable_unprepare(priv->clk); | 125 | if (!IS_ERR(priv->clk)) { |
| 123 | clk_put(priv->clk); | 126 | clk_disable_unprepare(priv->clk); |
| 124 | } | 127 | clk_put(priv->clk); |
| 125 | devm_kfree(&pdev->dev, priv->clk); | ||
| 126 | } | 128 | } |
| 127 | return sdhci_pltfm_unregister(pdev); | 129 | return 0; |
| 128 | } | 130 | } |
| 129 | 131 | ||
| 130 | static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = { | 132 | static const struct of_device_id sdhci_dove_of_match_table[] __devinitdata = { |
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c index ae5fcbfa1eef..63d219f57cae 100644 --- a/drivers/mmc/host/sdhci-of-esdhc.c +++ b/drivers/mmc/host/sdhci-of-esdhc.c | |||
| @@ -169,6 +169,16 @@ static void esdhc_of_resume(struct sdhci_host *host) | |||
| 169 | } | 169 | } |
| 170 | #endif | 170 | #endif |
| 171 | 171 | ||
| 172 | static void esdhc_of_platform_init(struct sdhci_host *host) | ||
| 173 | { | ||
| 174 | u32 vvn; | ||
| 175 | |||
| 176 | vvn = in_be32(host->ioaddr + SDHCI_SLOT_INT_STATUS); | ||
| 177 | vvn = (vvn & SDHCI_VENDOR_VER_MASK) >> SDHCI_VENDOR_VER_SHIFT; | ||
| 178 | if (vvn == VENDOR_V_22) | ||
| 179 | host->quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23; | ||
| 180 | } | ||
| 181 | |||
| 172 | static struct sdhci_ops sdhci_esdhc_ops = { | 182 | static struct sdhci_ops sdhci_esdhc_ops = { |
| 173 | .read_l = esdhc_readl, | 183 | .read_l = esdhc_readl, |
| 174 | .read_w = esdhc_readw, | 184 | .read_w = esdhc_readw, |
| @@ -180,6 +190,7 @@ static struct sdhci_ops sdhci_esdhc_ops = { | |||
| 180 | .enable_dma = esdhc_of_enable_dma, | 190 | .enable_dma = esdhc_of_enable_dma, |
| 181 | .get_max_clock = esdhc_of_get_max_clock, | 191 | .get_max_clock = esdhc_of_get_max_clock, |
| 182 | .get_min_clock = esdhc_of_get_min_clock, | 192 | .get_min_clock = esdhc_of_get_min_clock, |
| 193 | .platform_init = esdhc_of_platform_init, | ||
| 183 | #ifdef CONFIG_PM | 194 | #ifdef CONFIG_PM |
| 184 | .platform_suspend = esdhc_of_suspend, | 195 | .platform_suspend = esdhc_of_suspend, |
| 185 | .platform_resume = esdhc_of_resume, | 196 | .platform_resume = esdhc_of_resume, |
diff --git a/drivers/mmc/host/sdhci-pci.c b/drivers/mmc/host/sdhci-pci.c index 4bb74b042a06..04936f353ced 100644 --- a/drivers/mmc/host/sdhci-pci.c +++ b/drivers/mmc/host/sdhci-pci.c | |||
| @@ -1196,7 +1196,7 @@ static struct sdhci_pci_slot * __devinit sdhci_pci_probe_slot( | |||
| 1196 | return ERR_PTR(-ENODEV); | 1196 | return ERR_PTR(-ENODEV); |
| 1197 | } | 1197 | } |
| 1198 | 1198 | ||
| 1199 | if (pci_resource_len(pdev, bar) != 0x100) { | 1199 | if (pci_resource_len(pdev, bar) < 0x100) { |
| 1200 | dev_err(&pdev->dev, "Invalid iomem size. You may " | 1200 | dev_err(&pdev->dev, "Invalid iomem size. You may " |
| 1201 | "experience problems.\n"); | 1201 | "experience problems.\n"); |
| 1202 | } | 1202 | } |
diff --git a/drivers/mmc/host/sdhci-pltfm.c b/drivers/mmc/host/sdhci-pltfm.c index 65551a9709cc..27164457f861 100644 --- a/drivers/mmc/host/sdhci-pltfm.c +++ b/drivers/mmc/host/sdhci-pltfm.c | |||
| @@ -150,6 +150,13 @@ struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, | |||
| 150 | goto err_remap; | 150 | goto err_remap; |
| 151 | } | 151 | } |
| 152 | 152 | ||
| 153 | /* | ||
| 154 | * Some platforms need to probe the controller to be able to | ||
| 155 | * determine which caps should be used. | ||
| 156 | */ | ||
| 157 | if (host->ops && host->ops->platform_init) | ||
| 158 | host->ops->platform_init(host); | ||
| 159 | |||
| 153 | platform_set_drvdata(pdev, host); | 160 | platform_set_drvdata(pdev, host); |
| 154 | 161 | ||
| 155 | return host; | 162 | return host; |
diff --git a/drivers/mmc/host/sdhci-s3c.c b/drivers/mmc/host/sdhci-s3c.c index 2903949594c6..a54dd5d7a5f9 100644 --- a/drivers/mmc/host/sdhci-s3c.c +++ b/drivers/mmc/host/sdhci-s3c.c | |||
| @@ -211,8 +211,8 @@ static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock) | |||
| 211 | if (ourhost->cur_clk != best_src) { | 211 | if (ourhost->cur_clk != best_src) { |
| 212 | struct clk *clk = ourhost->clk_bus[best_src]; | 212 | struct clk *clk = ourhost->clk_bus[best_src]; |
| 213 | 213 | ||
| 214 | clk_enable(clk); | 214 | clk_prepare_enable(clk); |
| 215 | clk_disable(ourhost->clk_bus[ourhost->cur_clk]); | 215 | clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); |
| 216 | 216 | ||
| 217 | /* turn clock off to card before changing clock source */ | 217 | /* turn clock off to card before changing clock source */ |
| 218 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); | 218 | writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL); |
| @@ -607,7 +607,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
| 607 | } | 607 | } |
| 608 | 608 | ||
| 609 | /* enable the local io clock and keep it running for the moment. */ | 609 | /* enable the local io clock and keep it running for the moment. */ |
| 610 | clk_enable(sc->clk_io); | 610 | clk_prepare_enable(sc->clk_io); |
| 611 | 611 | ||
| 612 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 612 | for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
| 613 | struct clk *clk; | 613 | struct clk *clk; |
| @@ -638,7 +638,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
| 638 | } | 638 | } |
| 639 | 639 | ||
| 640 | #ifndef CONFIG_PM_RUNTIME | 640 | #ifndef CONFIG_PM_RUNTIME |
| 641 | clk_enable(sc->clk_bus[sc->cur_clk]); | 641 | clk_prepare_enable(sc->clk_bus[sc->cur_clk]); |
| 642 | #endif | 642 | #endif |
| 643 | 643 | ||
| 644 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 644 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| @@ -747,13 +747,14 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
| 747 | sdhci_s3c_setup_card_detect_gpio(sc); | 747 | sdhci_s3c_setup_card_detect_gpio(sc); |
| 748 | 748 | ||
| 749 | #ifdef CONFIG_PM_RUNTIME | 749 | #ifdef CONFIG_PM_RUNTIME |
| 750 | clk_disable(sc->clk_io); | 750 | if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) |
| 751 | clk_disable_unprepare(sc->clk_io); | ||
| 751 | #endif | 752 | #endif |
| 752 | return 0; | 753 | return 0; |
| 753 | 754 | ||
| 754 | err_req_regs: | 755 | err_req_regs: |
| 755 | #ifndef CONFIG_PM_RUNTIME | 756 | #ifndef CONFIG_PM_RUNTIME |
| 756 | clk_disable(sc->clk_bus[sc->cur_clk]); | 757 | clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); |
| 757 | #endif | 758 | #endif |
| 758 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 759 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
| 759 | if (sc->clk_bus[ptr]) { | 760 | if (sc->clk_bus[ptr]) { |
| @@ -762,7 +763,7 @@ static int __devinit sdhci_s3c_probe(struct platform_device *pdev) | |||
| 762 | } | 763 | } |
| 763 | 764 | ||
| 764 | err_no_busclks: | 765 | err_no_busclks: |
| 765 | clk_disable(sc->clk_io); | 766 | clk_disable_unprepare(sc->clk_io); |
| 766 | clk_put(sc->clk_io); | 767 | clk_put(sc->clk_io); |
| 767 | 768 | ||
| 768 | err_io_clk: | 769 | err_io_clk: |
| @@ -794,7 +795,8 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) | |||
| 794 | gpio_free(sc->ext_cd_gpio); | 795 | gpio_free(sc->ext_cd_gpio); |
| 795 | 796 | ||
| 796 | #ifdef CONFIG_PM_RUNTIME | 797 | #ifdef CONFIG_PM_RUNTIME |
| 797 | clk_enable(sc->clk_io); | 798 | if (pdata->cd_type != S3C_SDHCI_CD_INTERNAL) |
| 799 | clk_prepare_enable(sc->clk_io); | ||
| 798 | #endif | 800 | #endif |
| 799 | sdhci_remove_host(host, 1); | 801 | sdhci_remove_host(host, 1); |
| 800 | 802 | ||
| @@ -802,14 +804,14 @@ static int __devexit sdhci_s3c_remove(struct platform_device *pdev) | |||
| 802 | pm_runtime_disable(&pdev->dev); | 804 | pm_runtime_disable(&pdev->dev); |
| 803 | 805 | ||
| 804 | #ifndef CONFIG_PM_RUNTIME | 806 | #ifndef CONFIG_PM_RUNTIME |
| 805 | clk_disable(sc->clk_bus[sc->cur_clk]); | 807 | clk_disable_unprepare(sc->clk_bus[sc->cur_clk]); |
| 806 | #endif | 808 | #endif |
| 807 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { | 809 | for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) { |
| 808 | if (sc->clk_bus[ptr]) { | 810 | if (sc->clk_bus[ptr]) { |
| 809 | clk_put(sc->clk_bus[ptr]); | 811 | clk_put(sc->clk_bus[ptr]); |
| 810 | } | 812 | } |
| 811 | } | 813 | } |
| 812 | clk_disable(sc->clk_io); | 814 | clk_disable_unprepare(sc->clk_io); |
| 813 | clk_put(sc->clk_io); | 815 | clk_put(sc->clk_io); |
| 814 | 816 | ||
| 815 | if (pdev->dev.of_node) { | 817 | if (pdev->dev.of_node) { |
| @@ -849,8 +851,8 @@ static int sdhci_s3c_runtime_suspend(struct device *dev) | |||
| 849 | 851 | ||
| 850 | ret = sdhci_runtime_suspend_host(host); | 852 | ret = sdhci_runtime_suspend_host(host); |
| 851 | 853 | ||
| 852 | clk_disable(ourhost->clk_bus[ourhost->cur_clk]); | 854 | clk_disable_unprepare(ourhost->clk_bus[ourhost->cur_clk]); |
| 853 | clk_disable(busclk); | 855 | clk_disable_unprepare(busclk); |
| 854 | return ret; | 856 | return ret; |
| 855 | } | 857 | } |
| 856 | 858 | ||
| @@ -861,8 +863,8 @@ static int sdhci_s3c_runtime_resume(struct device *dev) | |||
| 861 | struct clk *busclk = ourhost->clk_io; | 863 | struct clk *busclk = ourhost->clk_io; |
| 862 | int ret; | 864 | int ret; |
| 863 | 865 | ||
| 864 | clk_enable(busclk); | 866 | clk_prepare_enable(busclk); |
| 865 | clk_enable(ourhost->clk_bus[ourhost->cur_clk]); | 867 | clk_prepare_enable(ourhost->clk_bus[ourhost->cur_clk]); |
| 866 | ret = sdhci_runtime_resume_host(host); | 868 | ret = sdhci_runtime_resume_host(host); |
| 867 | return ret; | 869 | return ret; |
| 868 | } | 870 | } |
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 7922adb42386..c7851c0aabce 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c | |||
| @@ -1315,16 +1315,19 @@ static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq) | |||
| 1315 | */ | 1315 | */ |
| 1316 | if ((host->flags & SDHCI_NEEDS_RETUNING) && | 1316 | if ((host->flags & SDHCI_NEEDS_RETUNING) && |
| 1317 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { | 1317 | !(present_state & (SDHCI_DOING_WRITE | SDHCI_DOING_READ))) { |
| 1318 | /* eMMC uses cmd21 while sd and sdio use cmd19 */ | 1318 | if (mmc->card) { |
| 1319 | tuning_opcode = mmc->card->type == MMC_TYPE_MMC ? | 1319 | /* eMMC uses cmd21 but sd and sdio use cmd19 */ |
| 1320 | MMC_SEND_TUNING_BLOCK_HS200 : | 1320 | tuning_opcode = |
| 1321 | MMC_SEND_TUNING_BLOCK; | 1321 | mmc->card->type == MMC_TYPE_MMC ? |
| 1322 | spin_unlock_irqrestore(&host->lock, flags); | 1322 | MMC_SEND_TUNING_BLOCK_HS200 : |
| 1323 | sdhci_execute_tuning(mmc, tuning_opcode); | 1323 | MMC_SEND_TUNING_BLOCK; |
| 1324 | spin_lock_irqsave(&host->lock, flags); | 1324 | spin_unlock_irqrestore(&host->lock, flags); |
| 1325 | 1325 | sdhci_execute_tuning(mmc, tuning_opcode); | |
| 1326 | /* Restore original mmc_request structure */ | 1326 | spin_lock_irqsave(&host->lock, flags); |
| 1327 | host->mrq = mrq; | 1327 | |
| 1328 | /* Restore original mmc_request structure */ | ||
| 1329 | host->mrq = mrq; | ||
| 1330 | } | ||
| 1328 | } | 1331 | } |
| 1329 | 1332 | ||
| 1330 | if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) | 1333 | if (mrq->sbc && !(host->flags & SDHCI_AUTO_CMD23)) |
| @@ -2837,6 +2840,9 @@ int sdhci_add_host(struct sdhci_host *host) | |||
| 2837 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) | 2840 | if (!(host->quirks & SDHCI_QUIRK_FORCE_1_BIT_DATA)) |
| 2838 | mmc->caps |= MMC_CAP_4_BIT_DATA; | 2841 | mmc->caps |= MMC_CAP_4_BIT_DATA; |
| 2839 | 2842 | ||
| 2843 | if (host->quirks2 & SDHCI_QUIRK2_HOST_NO_CMD23) | ||
| 2844 | mmc->caps &= ~MMC_CAP_CMD23; | ||
| 2845 | |||
| 2840 | if (caps[0] & SDHCI_CAN_DO_HISPD) | 2846 | if (caps[0] & SDHCI_CAN_DO_HISPD) |
| 2841 | mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; | 2847 | mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; |
| 2842 | 2848 | ||
| @@ -2846,9 +2852,12 @@ int sdhci_add_host(struct sdhci_host *host) | |||
| 2846 | 2852 | ||
| 2847 | /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ | 2853 | /* If vqmmc regulator and no 1.8V signalling, then there's no UHS */ |
| 2848 | host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); | 2854 | host->vqmmc = regulator_get(mmc_dev(mmc), "vqmmc"); |
| 2849 | if (IS_ERR(host->vqmmc)) { | 2855 | if (IS_ERR_OR_NULL(host->vqmmc)) { |
| 2850 | pr_info("%s: no vqmmc regulator found\n", mmc_hostname(mmc)); | 2856 | if (PTR_ERR(host->vqmmc) < 0) { |
| 2851 | host->vqmmc = NULL; | 2857 | pr_info("%s: no vqmmc regulator found\n", |
| 2858 | mmc_hostname(mmc)); | ||
| 2859 | host->vqmmc = NULL; | ||
| 2860 | } | ||
| 2852 | } | 2861 | } |
| 2853 | else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000)) | 2862 | else if (regulator_is_supported_voltage(host->vqmmc, 1800000, 1800000)) |
| 2854 | regulator_enable(host->vqmmc); | 2863 | regulator_enable(host->vqmmc); |
| @@ -2904,9 +2913,12 @@ int sdhci_add_host(struct sdhci_host *host) | |||
| 2904 | ocr_avail = 0; | 2913 | ocr_avail = 0; |
| 2905 | 2914 | ||
| 2906 | host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); | 2915 | host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); |
| 2907 | if (IS_ERR(host->vmmc)) { | 2916 | if (IS_ERR_OR_NULL(host->vmmc)) { |
| 2908 | pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); | 2917 | if (PTR_ERR(host->vmmc) < 0) { |
| 2909 | host->vmmc = NULL; | 2918 | pr_info("%s: no vmmc regulator found\n", |
| 2919 | mmc_hostname(mmc)); | ||
| 2920 | host->vmmc = NULL; | ||
| 2921 | } | ||
| 2910 | } else | 2922 | } else |
| 2911 | regulator_enable(host->vmmc); | 2923 | regulator_enable(host->vmmc); |
| 2912 | 2924 | ||
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 97653ea8942b..71a4a7ed46c5 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h | |||
| @@ -278,6 +278,7 @@ struct sdhci_ops { | |||
| 278 | void (*hw_reset)(struct sdhci_host *host); | 278 | void (*hw_reset)(struct sdhci_host *host); |
| 279 | void (*platform_suspend)(struct sdhci_host *host); | 279 | void (*platform_suspend)(struct sdhci_host *host); |
| 280 | void (*platform_resume)(struct sdhci_host *host); | 280 | void (*platform_resume)(struct sdhci_host *host); |
| 281 | void (*platform_init)(struct sdhci_host *host); | ||
| 281 | }; | 282 | }; |
| 282 | 283 | ||
| 283 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS | 284 | #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS |
diff --git a/drivers/mmc/host/sh_mmcif.c b/drivers/mmc/host/sh_mmcif.c index 11d2bc3b51d5..d25bc97dc5c6 100644 --- a/drivers/mmc/host/sh_mmcif.c +++ b/drivers/mmc/host/sh_mmcif.c | |||
| @@ -1466,9 +1466,9 @@ static int __devexit sh_mmcif_remove(struct platform_device *pdev) | |||
| 1466 | 1466 | ||
| 1467 | platform_set_drvdata(pdev, NULL); | 1467 | platform_set_drvdata(pdev, NULL); |
| 1468 | 1468 | ||
| 1469 | clk_disable(host->hclk); | ||
| 1469 | mmc_free_host(host->mmc); | 1470 | mmc_free_host(host->mmc); |
| 1470 | pm_runtime_put_sync(&pdev->dev); | 1471 | pm_runtime_put_sync(&pdev->dev); |
| 1471 | clk_disable(host->hclk); | ||
| 1472 | pm_runtime_disable(&pdev->dev); | 1472 | pm_runtime_disable(&pdev->dev); |
| 1473 | 1473 | ||
| 1474 | return 0; | 1474 | return 0; |
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c index c65295dded39..6e5bdd1a31d9 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c | |||
| @@ -1702,7 +1702,7 @@ static int bnx2x_set_eee(struct net_device *dev, struct ethtool_eee *edata) | |||
| 1702 | SHMEM_EEE_ADV_STATUS_SHIFT); | 1702 | SHMEM_EEE_ADV_STATUS_SHIFT); |
| 1703 | if ((advertised != (eee_cfg & SHMEM_EEE_ADV_STATUS_MASK))) { | 1703 | if ((advertised != (eee_cfg & SHMEM_EEE_ADV_STATUS_MASK))) { |
| 1704 | DP(BNX2X_MSG_ETHTOOL, | 1704 | DP(BNX2X_MSG_ETHTOOL, |
| 1705 | "Direct manipulation of EEE advertisment is not supported\n"); | 1705 | "Direct manipulation of EEE advertisement is not supported\n"); |
| 1706 | return -EINVAL; | 1706 | return -EINVAL; |
| 1707 | } | 1707 | } |
| 1708 | 1708 | ||
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c index 6dd0dd076cc5..f6cfdc6cf20f 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | |||
| @@ -9941,7 +9941,7 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy, | |||
| 9941 | else | 9941 | else |
| 9942 | rc = bnx2x_8483x_disable_eee(phy, params, vars); | 9942 | rc = bnx2x_8483x_disable_eee(phy, params, vars); |
| 9943 | if (rc) { | 9943 | if (rc) { |
| 9944 | DP(NETIF_MSG_LINK, "Failed to set EEE advertisment\n"); | 9944 | DP(NETIF_MSG_LINK, "Failed to set EEE advertisement\n"); |
| 9945 | return rc; | 9945 | return rc; |
| 9946 | } | 9946 | } |
| 9947 | } else { | 9947 | } else { |
| @@ -12987,7 +12987,7 @@ static u8 bnx2x_analyze_link_error(struct link_params *params, | |||
| 12987 | DP(NETIF_MSG_LINK, "Analyze TX Fault\n"); | 12987 | DP(NETIF_MSG_LINK, "Analyze TX Fault\n"); |
| 12988 | break; | 12988 | break; |
| 12989 | default: | 12989 | default: |
| 12990 | DP(NETIF_MSG_LINK, "Analyze UNKOWN\n"); | 12990 | DP(NETIF_MSG_LINK, "Analyze UNKNOWN\n"); |
| 12991 | } | 12991 | } |
| 12992 | DP(NETIF_MSG_LINK, "Link changed:[%x %x]->%x\n", vars->link_up, | 12992 | DP(NETIF_MSG_LINK, "Link changed:[%x %x]->%x\n", vars->link_up, |
| 12993 | old_status, status); | 12993 | old_status, status); |
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c index 32eec15fe4c2..730ae2cfa49e 100644 --- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c +++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c | |||
| @@ -2519,6 +2519,7 @@ int t4_fw_bye(struct adapter *adap, unsigned int mbox) | |||
| 2519 | { | 2519 | { |
| 2520 | struct fw_bye_cmd c; | 2520 | struct fw_bye_cmd c; |
| 2521 | 2521 | ||
| 2522 | memset(&c, 0, sizeof(c)); | ||
| 2522 | INIT_CMD(c, BYE, WRITE); | 2523 | INIT_CMD(c, BYE, WRITE); |
| 2523 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2524 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
| 2524 | } | 2525 | } |
| @@ -2535,6 +2536,7 @@ int t4_early_init(struct adapter *adap, unsigned int mbox) | |||
| 2535 | { | 2536 | { |
| 2536 | struct fw_initialize_cmd c; | 2537 | struct fw_initialize_cmd c; |
| 2537 | 2538 | ||
| 2539 | memset(&c, 0, sizeof(c)); | ||
| 2538 | INIT_CMD(c, INITIALIZE, WRITE); | 2540 | INIT_CMD(c, INITIALIZE, WRITE); |
| 2539 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2541 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
| 2540 | } | 2542 | } |
| @@ -2551,6 +2553,7 @@ int t4_fw_reset(struct adapter *adap, unsigned int mbox, int reset) | |||
| 2551 | { | 2553 | { |
| 2552 | struct fw_reset_cmd c; | 2554 | struct fw_reset_cmd c; |
| 2553 | 2555 | ||
| 2556 | memset(&c, 0, sizeof(c)); | ||
| 2554 | INIT_CMD(c, RESET, WRITE); | 2557 | INIT_CMD(c, RESET, WRITE); |
| 2555 | c.val = htonl(reset); | 2558 | c.val = htonl(reset); |
| 2556 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); | 2559 | return t4_wr_mbox(adap, mbox, &c, sizeof(c), NULL); |
| @@ -2828,7 +2831,7 @@ int t4_fixup_host_params(struct adapter *adap, unsigned int page_size, | |||
| 2828 | HOSTPAGESIZEPF7(sge_hps)); | 2831 | HOSTPAGESIZEPF7(sge_hps)); |
| 2829 | 2832 | ||
| 2830 | t4_set_reg_field(adap, SGE_CONTROL, | 2833 | t4_set_reg_field(adap, SGE_CONTROL, |
| 2831 | INGPADBOUNDARY(INGPADBOUNDARY_MASK) | | 2834 | INGPADBOUNDARY_MASK | |
| 2832 | EGRSTATUSPAGESIZE_MASK, | 2835 | EGRSTATUSPAGESIZE_MASK, |
| 2833 | INGPADBOUNDARY(fl_align_log - 5) | | 2836 | INGPADBOUNDARY(fl_align_log - 5) | |
| 2834 | EGRSTATUSPAGESIZE(stat_len != 64)); | 2837 | EGRSTATUSPAGESIZE(stat_len != 64)); |
| @@ -3278,6 +3281,7 @@ int t4_identify_port(struct adapter *adap, unsigned int mbox, unsigned int viid, | |||
| 3278 | { | 3281 | { |
| 3279 | struct fw_vi_enable_cmd c; | 3282 | struct fw_vi_enable_cmd c; |
| 3280 | 3283 | ||
| 3284 | memset(&c, 0, sizeof(c)); | ||
| 3281 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | | 3285 | c.op_to_viid = htonl(FW_CMD_OP(FW_VI_ENABLE_CMD) | FW_CMD_REQUEST | |
| 3282 | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); | 3286 | FW_CMD_EXEC | FW_VI_ENABLE_CMD_VIID(viid)); |
| 3283 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); | 3287 | c.ien_to_len16 = htonl(FW_VI_ENABLE_CMD_LED | FW_LEN16(c)); |
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c index 1d03dcdd5e56..19ac096cb07b 100644 --- a/drivers/net/ethernet/freescale/gianfar.c +++ b/drivers/net/ethernet/freescale/gianfar.c | |||
| @@ -1353,8 +1353,11 @@ static int gfar_restore(struct device *dev) | |||
| 1353 | struct gfar_private *priv = dev_get_drvdata(dev); | 1353 | struct gfar_private *priv = dev_get_drvdata(dev); |
| 1354 | struct net_device *ndev = priv->ndev; | 1354 | struct net_device *ndev = priv->ndev; |
| 1355 | 1355 | ||
| 1356 | if (!netif_running(ndev)) | 1356 | if (!netif_running(ndev)) { |
| 1357 | netif_device_attach(ndev); | ||
| 1358 | |||
| 1357 | return 0; | 1359 | return 0; |
| 1360 | } | ||
| 1358 | 1361 | ||
| 1359 | gfar_init_bds(ndev); | 1362 | gfar_init_bds(ndev); |
| 1360 | init_registers(ndev); | 1363 | init_registers(ndev); |
diff --git a/drivers/net/ethernet/jme.c b/drivers/net/ethernet/jme.c index f8064df10cc4..92317e9c0f73 100644 --- a/drivers/net/ethernet/jme.c +++ b/drivers/net/ethernet/jme.c | |||
| @@ -1948,10 +1948,10 @@ jme_close(struct net_device *netdev) | |||
| 1948 | 1948 | ||
| 1949 | JME_NAPI_DISABLE(jme); | 1949 | JME_NAPI_DISABLE(jme); |
| 1950 | 1950 | ||
| 1951 | tasklet_disable(&jme->linkch_task); | 1951 | tasklet_kill(&jme->linkch_task); |
| 1952 | tasklet_disable(&jme->txclean_task); | 1952 | tasklet_kill(&jme->txclean_task); |
| 1953 | tasklet_disable(&jme->rxclean_task); | 1953 | tasklet_kill(&jme->rxclean_task); |
| 1954 | tasklet_disable(&jme->rxempty_task); | 1954 | tasklet_kill(&jme->rxempty_task); |
| 1955 | 1955 | ||
| 1956 | jme_disable_rx_engine(jme); | 1956 | jme_disable_rx_engine(jme); |
| 1957 | jme_disable_tx_engine(jme); | 1957 | jme_disable_tx_engine(jme); |
diff --git a/drivers/net/ethernet/marvell/skge.c b/drivers/net/ethernet/marvell/skge.c index 9b9c2ac5c4c2..d19a143aa5a8 100644 --- a/drivers/net/ethernet/marvell/skge.c +++ b/drivers/net/ethernet/marvell/skge.c | |||
| @@ -4026,7 +4026,7 @@ static void __devexit skge_remove(struct pci_dev *pdev) | |||
| 4026 | dev0 = hw->dev[0]; | 4026 | dev0 = hw->dev[0]; |
| 4027 | unregister_netdev(dev0); | 4027 | unregister_netdev(dev0); |
| 4028 | 4028 | ||
| 4029 | tasklet_disable(&hw->phy_task); | 4029 | tasklet_kill(&hw->phy_task); |
| 4030 | 4030 | ||
| 4031 | spin_lock_irq(&hw->hw_lock); | 4031 | spin_lock_irq(&hw->hw_lock); |
| 4032 | hw->intr_mask = 0; | 4032 | hw->intr_mask = 0; |
diff --git a/drivers/net/ethernet/micrel/ksz884x.c b/drivers/net/ethernet/micrel/ksz884x.c index 318fee91c79d..e558edd1cb6c 100644 --- a/drivers/net/ethernet/micrel/ksz884x.c +++ b/drivers/net/ethernet/micrel/ksz884x.c | |||
| @@ -5407,8 +5407,8 @@ static int netdev_close(struct net_device *dev) | |||
| 5407 | /* Delay for receive task to stop scheduling itself. */ | 5407 | /* Delay for receive task to stop scheduling itself. */ |
| 5408 | msleep(2000 / HZ); | 5408 | msleep(2000 / HZ); |
| 5409 | 5409 | ||
| 5410 | tasklet_disable(&hw_priv->rx_tasklet); | 5410 | tasklet_kill(&hw_priv->rx_tasklet); |
| 5411 | tasklet_disable(&hw_priv->tx_tasklet); | 5411 | tasklet_kill(&hw_priv->tx_tasklet); |
| 5412 | free_irq(dev->irq, hw_priv->dev); | 5412 | free_irq(dev->irq, hw_priv->dev); |
| 5413 | 5413 | ||
| 5414 | transmit_cleanup(hw_priv, 0); | 5414 | transmit_cleanup(hw_priv, 0); |
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index e7ff886e8047..927aa33d4349 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c | |||
| @@ -3827,6 +3827,8 @@ static void rtl_wol_suspend_quirk(struct rtl8169_private *tp) | |||
| 3827 | void __iomem *ioaddr = tp->mmio_addr; | 3827 | void __iomem *ioaddr = tp->mmio_addr; |
| 3828 | 3828 | ||
| 3829 | switch (tp->mac_version) { | 3829 | switch (tp->mac_version) { |
| 3830 | case RTL_GIGA_MAC_VER_25: | ||
| 3831 | case RTL_GIGA_MAC_VER_26: | ||
| 3830 | case RTL_GIGA_MAC_VER_29: | 3832 | case RTL_GIGA_MAC_VER_29: |
| 3831 | case RTL_GIGA_MAC_VER_30: | 3833 | case RTL_GIGA_MAC_VER_30: |
| 3832 | case RTL_GIGA_MAC_VER_32: | 3834 | case RTL_GIGA_MAC_VER_32: |
| @@ -4519,6 +4521,9 @@ static void rtl_set_rx_mode(struct net_device *dev) | |||
| 4519 | mc_filter[1] = swab32(data); | 4521 | mc_filter[1] = swab32(data); |
| 4520 | } | 4522 | } |
| 4521 | 4523 | ||
| 4524 | if (tp->mac_version == RTL_GIGA_MAC_VER_35) | ||
| 4525 | mc_filter[1] = mc_filter[0] = 0xffffffff; | ||
| 4526 | |||
| 4522 | RTL_W32(MAR0 + 4, mc_filter[1]); | 4527 | RTL_W32(MAR0 + 4, mc_filter[1]); |
| 4523 | RTL_W32(MAR0 + 0, mc_filter[0]); | 4528 | RTL_W32(MAR0 + 0, mc_filter[0]); |
| 4524 | 4529 | ||
diff --git a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c index 0793299bd39e..1d04754a6637 100644 --- a/drivers/net/ethernet/xilinx/xilinx_axienet_main.c +++ b/drivers/net/ethernet/xilinx/xilinx_axienet_main.c | |||
| @@ -990,7 +990,7 @@ static int axienet_stop(struct net_device *ndev) | |||
| 990 | axienet_setoptions(ndev, lp->options & | 990 | axienet_setoptions(ndev, lp->options & |
| 991 | ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN)); | 991 | ~(XAE_OPTION_TXEN | XAE_OPTION_RXEN)); |
| 992 | 992 | ||
| 993 | tasklet_disable(&lp->dma_err_tasklet); | 993 | tasklet_kill(&lp->dma_err_tasklet); |
| 994 | 994 | ||
| 995 | free_irq(lp->tx_irq, ndev); | 995 | free_irq(lp->tx_irq, ndev); |
| 996 | free_irq(lp->rx_irq, ndev); | 996 | free_irq(lp->rx_irq, ndev); |
diff --git a/drivers/net/usb/cdc_eem.c b/drivers/net/usb/cdc_eem.c index c81e278629ff..08d55b6bf272 100644 --- a/drivers/net/usb/cdc_eem.c +++ b/drivers/net/usb/cdc_eem.c | |||
| @@ -31,6 +31,7 @@ | |||
| 31 | #include <linux/usb/cdc.h> | 31 | #include <linux/usb/cdc.h> |
| 32 | #include <linux/usb/usbnet.h> | 32 | #include <linux/usb/usbnet.h> |
| 33 | #include <linux/gfp.h> | 33 | #include <linux/gfp.h> |
| 34 | #include <linux/if_vlan.h> | ||
| 34 | 35 | ||
| 35 | 36 | ||
| 36 | /* | 37 | /* |
| @@ -92,7 +93,7 @@ static int eem_bind(struct usbnet *dev, struct usb_interface *intf) | |||
| 92 | 93 | ||
| 93 | /* no jumbogram (16K) support for now */ | 94 | /* no jumbogram (16K) support for now */ |
| 94 | 95 | ||
| 95 | dev->net->hard_header_len += EEM_HEAD + ETH_FCS_LEN; | 96 | dev->net->hard_header_len += EEM_HEAD + ETH_FCS_LEN + VLAN_HLEN; |
| 96 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; | 97 | dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; |
| 97 | 98 | ||
| 98 | return 0; | 99 | return 0; |
diff --git a/drivers/net/usb/smsc95xx.c b/drivers/net/usb/smsc95xx.c index 7479a5761d0d..3286166415b4 100644 --- a/drivers/net/usb/smsc95xx.c +++ b/drivers/net/usb/smsc95xx.c | |||
| @@ -1344,6 +1344,7 @@ static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, | |||
| 1344 | } else { | 1344 | } else { |
| 1345 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); | 1345 | u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); |
| 1346 | skb_push(skb, 4); | 1346 | skb_push(skb, 4); |
| 1347 | cpu_to_le32s(&csum_preamble); | ||
| 1347 | memcpy(skb->data, &csum_preamble, 4); | 1348 | memcpy(skb->data, &csum_preamble, 4); |
| 1348 | } | 1349 | } |
| 1349 | } | 1350 | } |
diff --git a/drivers/net/usb/usbnet.c b/drivers/net/usb/usbnet.c index cb04f900cc46..edb81ed06950 100644 --- a/drivers/net/usb/usbnet.c +++ b/drivers/net/usb/usbnet.c | |||
| @@ -359,10 +359,12 @@ static enum skb_state defer_bh(struct usbnet *dev, struct sk_buff *skb, | |||
| 359 | void usbnet_defer_kevent (struct usbnet *dev, int work) | 359 | void usbnet_defer_kevent (struct usbnet *dev, int work) |
| 360 | { | 360 | { |
| 361 | set_bit (work, &dev->flags); | 361 | set_bit (work, &dev->flags); |
| 362 | if (!schedule_work (&dev->kevent)) | 362 | if (!schedule_work (&dev->kevent)) { |
| 363 | netdev_err(dev->net, "kevent %d may have been dropped\n", work); | 363 | if (net_ratelimit()) |
| 364 | else | 364 | netdev_err(dev->net, "kevent %d may have been dropped\n", work); |
| 365 | } else { | ||
| 365 | netdev_dbg(dev->net, "kevent %d scheduled\n", work); | 366 | netdev_dbg(dev->net, "kevent %d scheduled\n", work); |
| 367 | } | ||
| 366 | } | 368 | } |
| 367 | EXPORT_SYMBOL_GPL(usbnet_defer_kevent); | 369 | EXPORT_SYMBOL_GPL(usbnet_defer_kevent); |
| 368 | 370 | ||
diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c index 192251adf986..282eedec675e 100644 --- a/drivers/net/wireless/b43legacy/pio.c +++ b/drivers/net/wireless/b43legacy/pio.c | |||
| @@ -382,7 +382,7 @@ static void cancel_transfers(struct b43legacy_pioqueue *queue) | |||
| 382 | { | 382 | { |
| 383 | struct b43legacy_pio_txpacket *packet, *tmp_packet; | 383 | struct b43legacy_pio_txpacket *packet, *tmp_packet; |
| 384 | 384 | ||
| 385 | tasklet_disable(&queue->txtask); | 385 | tasklet_kill(&queue->txtask); |
| 386 | 386 | ||
| 387 | list_for_each_entry_safe(packet, tmp_packet, &queue->txrunning, list) | 387 | list_for_each_entry_safe(packet, tmp_packet, &queue->txrunning, list) |
| 388 | free_txpacket(packet, 0); | 388 | free_txpacket(packet, 0); |
diff --git a/drivers/pci/bus.c b/drivers/pci/bus.c index 6241fd05bd41..a543746fb354 100644 --- a/drivers/pci/bus.c +++ b/drivers/pci/bus.c | |||
| @@ -320,10 +320,7 @@ void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), | |||
| 320 | } else | 320 | } else |
| 321 | next = dev->bus_list.next; | 321 | next = dev->bus_list.next; |
| 322 | 322 | ||
| 323 | /* Run device routines with the device locked */ | ||
| 324 | device_lock(&dev->dev); | ||
| 325 | retval = cb(dev, userdata); | 323 | retval = cb(dev, userdata); |
| 326 | device_unlock(&dev->dev); | ||
| 327 | if (retval) | 324 | if (retval) |
| 328 | break; | 325 | break; |
| 329 | } | 326 | } |
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c index 94c6e2aa03d6..6c94fc9489e7 100644 --- a/drivers/pci/pci-driver.c +++ b/drivers/pci/pci-driver.c | |||
| @@ -398,6 +398,8 @@ static void pci_device_shutdown(struct device *dev) | |||
| 398 | struct pci_dev *pci_dev = to_pci_dev(dev); | 398 | struct pci_dev *pci_dev = to_pci_dev(dev); |
| 399 | struct pci_driver *drv = pci_dev->driver; | 399 | struct pci_driver *drv = pci_dev->driver; |
| 400 | 400 | ||
| 401 | pm_runtime_resume(dev); | ||
| 402 | |||
| 401 | if (drv && drv->shutdown) | 403 | if (drv && drv->shutdown) |
| 402 | drv->shutdown(pci_dev); | 404 | drv->shutdown(pci_dev); |
| 403 | pci_msi_shutdown(pci_dev); | 405 | pci_msi_shutdown(pci_dev); |
| @@ -408,16 +410,6 @@ static void pci_device_shutdown(struct device *dev) | |||
| 408 | * continue to do DMA | 410 | * continue to do DMA |
| 409 | */ | 411 | */ |
| 410 | pci_disable_device(pci_dev); | 412 | pci_disable_device(pci_dev); |
| 411 | |||
| 412 | /* | ||
| 413 | * Devices may be enabled to wake up by runtime PM, but they need not | ||
| 414 | * be supposed to wake up the system from its "power off" state (e.g. | ||
| 415 | * ACPI S5). Therefore disable wakeup for all devices that aren't | ||
| 416 | * supposed to wake up the system at this point. The state argument | ||
| 417 | * will be ignored by pci_enable_wake(). | ||
| 418 | */ | ||
| 419 | if (!device_may_wakeup(dev)) | ||
| 420 | pci_enable_wake(pci_dev, PCI_UNKNOWN, false); | ||
| 421 | } | 413 | } |
| 422 | 414 | ||
| 423 | #ifdef CONFIG_PM | 415 | #ifdef CONFIG_PM |
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 02d107b15281..f39378d9da15 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c | |||
| @@ -458,40 +458,6 @@ boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf) | |||
| 458 | } | 458 | } |
| 459 | struct device_attribute vga_attr = __ATTR_RO(boot_vga); | 459 | struct device_attribute vga_attr = __ATTR_RO(boot_vga); |
| 460 | 460 | ||
| 461 | static void | ||
| 462 | pci_config_pm_runtime_get(struct pci_dev *pdev) | ||
| 463 | { | ||
| 464 | struct device *dev = &pdev->dev; | ||
| 465 | struct device *parent = dev->parent; | ||
| 466 | |||
| 467 | if (parent) | ||
| 468 | pm_runtime_get_sync(parent); | ||
| 469 | pm_runtime_get_noresume(dev); | ||
| 470 | /* | ||
| 471 | * pdev->current_state is set to PCI_D3cold during suspending, | ||
| 472 | * so wait until suspending completes | ||
| 473 | */ | ||
| 474 | pm_runtime_barrier(dev); | ||
| 475 | /* | ||
| 476 | * Only need to resume devices in D3cold, because config | ||
| 477 | * registers are still accessible for devices suspended but | ||
| 478 | * not in D3cold. | ||
| 479 | */ | ||
| 480 | if (pdev->current_state == PCI_D3cold) | ||
| 481 | pm_runtime_resume(dev); | ||
| 482 | } | ||
| 483 | |||
| 484 | static void | ||
| 485 | pci_config_pm_runtime_put(struct pci_dev *pdev) | ||
| 486 | { | ||
| 487 | struct device *dev = &pdev->dev; | ||
| 488 | struct device *parent = dev->parent; | ||
| 489 | |||
| 490 | pm_runtime_put(dev); | ||
| 491 | if (parent) | ||
| 492 | pm_runtime_put_sync(parent); | ||
| 493 | } | ||
| 494 | |||
| 495 | static ssize_t | 461 | static ssize_t |
| 496 | pci_read_config(struct file *filp, struct kobject *kobj, | 462 | pci_read_config(struct file *filp, struct kobject *kobj, |
| 497 | struct bin_attribute *bin_attr, | 463 | struct bin_attribute *bin_attr, |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 54858838f098..aabf64798bda 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
| @@ -1858,6 +1858,38 @@ bool pci_dev_run_wake(struct pci_dev *dev) | |||
| 1858 | } | 1858 | } |
| 1859 | EXPORT_SYMBOL_GPL(pci_dev_run_wake); | 1859 | EXPORT_SYMBOL_GPL(pci_dev_run_wake); |
| 1860 | 1860 | ||
| 1861 | void pci_config_pm_runtime_get(struct pci_dev *pdev) | ||
| 1862 | { | ||
| 1863 | struct device *dev = &pdev->dev; | ||
| 1864 | struct device *parent = dev->parent; | ||
| 1865 | |||
| 1866 | if (parent) | ||
| 1867 | pm_runtime_get_sync(parent); | ||
| 1868 | pm_runtime_get_noresume(dev); | ||
| 1869 | /* | ||
| 1870 | * pdev->current_state is set to PCI_D3cold during suspending, | ||
| 1871 | * so wait until suspending completes | ||
| 1872 | */ | ||
| 1873 | pm_runtime_barrier(dev); | ||
| 1874 | /* | ||
| 1875 | * Only need to resume devices in D3cold, because config | ||
| 1876 | * registers are still accessible for devices suspended but | ||
| 1877 | * not in D3cold. | ||
| 1878 | */ | ||
| 1879 | if (pdev->current_state == PCI_D3cold) | ||
| 1880 | pm_runtime_resume(dev); | ||
| 1881 | } | ||
| 1882 | |||
| 1883 | void pci_config_pm_runtime_put(struct pci_dev *pdev) | ||
| 1884 | { | ||
| 1885 | struct device *dev = &pdev->dev; | ||
| 1886 | struct device *parent = dev->parent; | ||
| 1887 | |||
| 1888 | pm_runtime_put(dev); | ||
| 1889 | if (parent) | ||
| 1890 | pm_runtime_put_sync(parent); | ||
| 1891 | } | ||
| 1892 | |||
| 1861 | /** | 1893 | /** |
| 1862 | * pci_pm_init - Initialize PM functions of given PCI device | 1894 | * pci_pm_init - Initialize PM functions of given PCI device |
| 1863 | * @dev: PCI device to handle. | 1895 | * @dev: PCI device to handle. |
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index bacbcba69cf3..fd92aab9904b 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h | |||
| @@ -72,6 +72,8 @@ extern void pci_disable_enabled_device(struct pci_dev *dev); | |||
| 72 | extern int pci_finish_runtime_suspend(struct pci_dev *dev); | 72 | extern int pci_finish_runtime_suspend(struct pci_dev *dev); |
| 73 | extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); | 73 | extern int __pci_pme_wakeup(struct pci_dev *dev, void *ign); |
| 74 | extern void pci_wakeup_bus(struct pci_bus *bus); | 74 | extern void pci_wakeup_bus(struct pci_bus *bus); |
| 75 | extern void pci_config_pm_runtime_get(struct pci_dev *dev); | ||
| 76 | extern void pci_config_pm_runtime_put(struct pci_dev *dev); | ||
| 75 | extern void pci_pm_init(struct pci_dev *dev); | 77 | extern void pci_pm_init(struct pci_dev *dev); |
| 76 | extern void platform_pci_wakeup_init(struct pci_dev *dev); | 78 | extern void platform_pci_wakeup_init(struct pci_dev *dev); |
| 77 | extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); | 79 | extern void pci_allocate_cap_save_buffers(struct pci_dev *dev); |
diff --git a/drivers/pci/pcie/aer/aerdrv_core.c b/drivers/pci/pcie/aer/aerdrv_core.c index 06bad96af415..af4e31cd3a3b 100644 --- a/drivers/pci/pcie/aer/aerdrv_core.c +++ b/drivers/pci/pcie/aer/aerdrv_core.c | |||
| @@ -213,6 +213,7 @@ static int report_error_detected(struct pci_dev *dev, void *data) | |||
| 213 | struct aer_broadcast_data *result_data; | 213 | struct aer_broadcast_data *result_data; |
| 214 | result_data = (struct aer_broadcast_data *) data; | 214 | result_data = (struct aer_broadcast_data *) data; |
| 215 | 215 | ||
| 216 | device_lock(&dev->dev); | ||
| 216 | dev->error_state = result_data->state; | 217 | dev->error_state = result_data->state; |
| 217 | 218 | ||
| 218 | if (!dev->driver || | 219 | if (!dev->driver || |
| @@ -231,12 +232,14 @@ static int report_error_detected(struct pci_dev *dev, void *data) | |||
| 231 | dev->driver ? | 232 | dev->driver ? |
| 232 | "no AER-aware driver" : "no driver"); | 233 | "no AER-aware driver" : "no driver"); |
| 233 | } | 234 | } |
| 234 | return 0; | 235 | goto out; |
| 235 | } | 236 | } |
| 236 | 237 | ||
| 237 | err_handler = dev->driver->err_handler; | 238 | err_handler = dev->driver->err_handler; |
| 238 | vote = err_handler->error_detected(dev, result_data->state); | 239 | vote = err_handler->error_detected(dev, result_data->state); |
| 239 | result_data->result = merge_result(result_data->result, vote); | 240 | result_data->result = merge_result(result_data->result, vote); |
| 241 | out: | ||
| 242 | device_unlock(&dev->dev); | ||
| 240 | return 0; | 243 | return 0; |
| 241 | } | 244 | } |
| 242 | 245 | ||
| @@ -247,14 +250,17 @@ static int report_mmio_enabled(struct pci_dev *dev, void *data) | |||
| 247 | struct aer_broadcast_data *result_data; | 250 | struct aer_broadcast_data *result_data; |
| 248 | result_data = (struct aer_broadcast_data *) data; | 251 | result_data = (struct aer_broadcast_data *) data; |
| 249 | 252 | ||
| 253 | device_lock(&dev->dev); | ||
| 250 | if (!dev->driver || | 254 | if (!dev->driver || |
| 251 | !dev->driver->err_handler || | 255 | !dev->driver->err_handler || |
| 252 | !dev->driver->err_handler->mmio_enabled) | 256 | !dev->driver->err_handler->mmio_enabled) |
| 253 | return 0; | 257 | goto out; |
| 254 | 258 | ||
| 255 | err_handler = dev->driver->err_handler; | 259 | err_handler = dev->driver->err_handler; |
| 256 | vote = err_handler->mmio_enabled(dev); | 260 | vote = err_handler->mmio_enabled(dev); |
| 257 | result_data->result = merge_result(result_data->result, vote); | 261 | result_data->result = merge_result(result_data->result, vote); |
| 262 | out: | ||
| 263 | device_unlock(&dev->dev); | ||
| 258 | return 0; | 264 | return 0; |
| 259 | } | 265 | } |
| 260 | 266 | ||
| @@ -265,14 +271,17 @@ static int report_slot_reset(struct pci_dev *dev, void *data) | |||
| 265 | struct aer_broadcast_data *result_data; | 271 | struct aer_broadcast_data *result_data; |
| 266 | result_data = (struct aer_broadcast_data *) data; | 272 | result_data = (struct aer_broadcast_data *) data; |
| 267 | 273 | ||
| 274 | device_lock(&dev->dev); | ||
| 268 | if (!dev->driver || | 275 | if (!dev->driver || |
| 269 | !dev->driver->err_handler || | 276 | !dev->driver->err_handler || |
| 270 | !dev->driver->err_handler->slot_reset) | 277 | !dev->driver->err_handler->slot_reset) |
| 271 | return 0; | 278 | goto out; |
| 272 | 279 | ||
| 273 | err_handler = dev->driver->err_handler; | 280 | err_handler = dev->driver->err_handler; |
| 274 | vote = err_handler->slot_reset(dev); | 281 | vote = err_handler->slot_reset(dev); |
| 275 | result_data->result = merge_result(result_data->result, vote); | 282 | result_data->result = merge_result(result_data->result, vote); |
| 283 | out: | ||
| 284 | device_unlock(&dev->dev); | ||
| 276 | return 0; | 285 | return 0; |
| 277 | } | 286 | } |
| 278 | 287 | ||
| @@ -280,15 +289,18 @@ static int report_resume(struct pci_dev *dev, void *data) | |||
| 280 | { | 289 | { |
| 281 | const struct pci_error_handlers *err_handler; | 290 | const struct pci_error_handlers *err_handler; |
| 282 | 291 | ||
| 292 | device_lock(&dev->dev); | ||
| 283 | dev->error_state = pci_channel_io_normal; | 293 | dev->error_state = pci_channel_io_normal; |
| 284 | 294 | ||
| 285 | if (!dev->driver || | 295 | if (!dev->driver || |
| 286 | !dev->driver->err_handler || | 296 | !dev->driver->err_handler || |
| 287 | !dev->driver->err_handler->resume) | 297 | !dev->driver->err_handler->resume) |
| 288 | return 0; | 298 | goto out; |
| 289 | 299 | ||
| 290 | err_handler = dev->driver->err_handler; | 300 | err_handler = dev->driver->err_handler; |
| 291 | err_handler->resume(dev); | 301 | err_handler->resume(dev); |
| 302 | out: | ||
| 303 | device_unlock(&dev->dev); | ||
| 292 | return 0; | 304 | return 0; |
| 293 | } | 305 | } |
| 294 | 306 | ||
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index d03a7a39b2d8..ed129b414624 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c | |||
| @@ -272,7 +272,8 @@ static int get_port_device_capability(struct pci_dev *dev) | |||
| 272 | } | 272 | } |
| 273 | 273 | ||
| 274 | /* Hot-Plug Capable */ | 274 | /* Hot-Plug Capable */ |
| 275 | if (cap_mask & PCIE_PORT_SERVICE_HP) { | 275 | if ((cap_mask & PCIE_PORT_SERVICE_HP) && |
| 276 | dev->pcie_flags_reg & PCI_EXP_FLAGS_SLOT) { | ||
| 276 | pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); | 277 | pcie_capability_read_dword(dev, PCI_EXP_SLTCAP, ®32); |
| 277 | if (reg32 & PCI_EXP_SLTCAP_HPC) { | 278 | if (reg32 & PCI_EXP_SLTCAP_HPC) { |
| 278 | services |= PCIE_PORT_SERVICE_HP; | 279 | services |= PCIE_PORT_SERVICE_HP; |
diff --git a/drivers/pci/proc.c b/drivers/pci/proc.c index eb907a8faf2a..9b8505ccc56d 100644 --- a/drivers/pci/proc.c +++ b/drivers/pci/proc.c | |||
| @@ -76,6 +76,8 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
| 76 | if (!access_ok(VERIFY_WRITE, buf, cnt)) | 76 | if (!access_ok(VERIFY_WRITE, buf, cnt)) |
| 77 | return -EINVAL; | 77 | return -EINVAL; |
| 78 | 78 | ||
| 79 | pci_config_pm_runtime_get(dev); | ||
| 80 | |||
| 79 | if ((pos & 1) && cnt) { | 81 | if ((pos & 1) && cnt) { |
| 80 | unsigned char val; | 82 | unsigned char val; |
| 81 | pci_user_read_config_byte(dev, pos, &val); | 83 | pci_user_read_config_byte(dev, pos, &val); |
| @@ -121,6 +123,8 @@ proc_bus_pci_read(struct file *file, char __user *buf, size_t nbytes, loff_t *pp | |||
| 121 | cnt--; | 123 | cnt--; |
| 122 | } | 124 | } |
| 123 | 125 | ||
| 126 | pci_config_pm_runtime_put(dev); | ||
| 127 | |||
| 124 | *ppos = pos; | 128 | *ppos = pos; |
| 125 | return nbytes; | 129 | return nbytes; |
| 126 | } | 130 | } |
| @@ -146,6 +150,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
| 146 | if (!access_ok(VERIFY_READ, buf, cnt)) | 150 | if (!access_ok(VERIFY_READ, buf, cnt)) |
| 147 | return -EINVAL; | 151 | return -EINVAL; |
| 148 | 152 | ||
| 153 | pci_config_pm_runtime_get(dev); | ||
| 154 | |||
| 149 | if ((pos & 1) && cnt) { | 155 | if ((pos & 1) && cnt) { |
| 150 | unsigned char val; | 156 | unsigned char val; |
| 151 | __get_user(val, buf); | 157 | __get_user(val, buf); |
| @@ -191,6 +197,8 @@ proc_bus_pci_write(struct file *file, const char __user *buf, size_t nbytes, lof | |||
| 191 | cnt--; | 197 | cnt--; |
| 192 | } | 198 | } |
| 193 | 199 | ||
| 200 | pci_config_pm_runtime_put(dev); | ||
| 201 | |||
| 194 | *ppos = pos; | 202 | *ppos = pos; |
| 195 | i_size_write(ino, dp->size); | 203 | i_size_write(ino, dp->size); |
| 196 | return nbytes; | 204 | return nbytes; |
diff --git a/drivers/pinctrl/Kconfig b/drivers/pinctrl/Kconfig index 7bf914df6e91..d96caefd914a 100644 --- a/drivers/pinctrl/Kconfig +++ b/drivers/pinctrl/Kconfig | |||
| @@ -179,11 +179,13 @@ config PINCTRL_COH901 | |||
| 179 | 179 | ||
| 180 | config PINCTRL_SAMSUNG | 180 | config PINCTRL_SAMSUNG |
| 181 | bool "Samsung pinctrl driver" | 181 | bool "Samsung pinctrl driver" |
| 182 | depends on OF && GPIOLIB | ||
| 182 | select PINMUX | 183 | select PINMUX |
| 183 | select PINCONF | 184 | select PINCONF |
| 184 | 185 | ||
| 185 | config PINCTRL_EXYNOS4 | 186 | config PINCTRL_EXYNOS4 |
| 186 | bool "Pinctrl driver data for Exynos4 SoC" | 187 | bool "Pinctrl driver data for Exynos4 SoC" |
| 188 | depends on OF && GPIOLIB | ||
| 187 | select PINCTRL_SAMSUNG | 189 | select PINCTRL_SAMSUNG |
| 188 | 190 | ||
| 189 | config PINCTRL_MVEBU | 191 | config PINCTRL_MVEBU |
diff --git a/drivers/pinctrl/spear/pinctrl-spear.c b/drivers/pinctrl/spear/pinctrl-spear.c index 5d4f44f462f0..b1fd6ee33c6c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear.c +++ b/drivers/pinctrl/spear/pinctrl-spear.c | |||
| @@ -244,7 +244,7 @@ static int spear_pinctrl_endisable(struct pinctrl_dev *pctldev, | |||
| 244 | else | 244 | else |
| 245 | temp = ~muxreg->val; | 245 | temp = ~muxreg->val; |
| 246 | 246 | ||
| 247 | val |= temp; | 247 | val |= muxreg->mask & temp; |
| 248 | pmx_writel(pmx, val, muxreg->reg); | 248 | pmx_writel(pmx, val, muxreg->reg); |
| 249 | } | 249 | } |
| 250 | } | 250 | } |
diff --git a/drivers/pinctrl/spear/pinctrl-spear1310.c b/drivers/pinctrl/spear/pinctrl-spear1310.c index d6cca8c81b92..0436fc7895d6 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1310.c +++ b/drivers/pinctrl/spear/pinctrl-spear1310.c | |||
| @@ -25,8 +25,8 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { | |||
| 25 | }; | 25 | }; |
| 26 | 26 | ||
| 27 | /* registers */ | 27 | /* registers */ |
| 28 | #define PERIP_CFG 0x32C | 28 | #define PERIP_CFG 0x3B0 |
| 29 | #define MCIF_SEL_SHIFT 3 | 29 | #define MCIF_SEL_SHIFT 5 |
| 30 | #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) | 30 | #define MCIF_SEL_SD (0x1 << MCIF_SEL_SHIFT) |
| 31 | #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) | 31 | #define MCIF_SEL_CF (0x2 << MCIF_SEL_SHIFT) |
| 32 | #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT) | 32 | #define MCIF_SEL_XD (0x3 << MCIF_SEL_SHIFT) |
| @@ -164,6 +164,10 @@ static const struct pinctrl_pin_desc spear1310_pins[] = { | |||
| 164 | #define PMX_SSP0_CS0_MASK (1 << 29) | 164 | #define PMX_SSP0_CS0_MASK (1 << 29) |
| 165 | #define PMX_SSP0_CS1_2_MASK (1 << 30) | 165 | #define PMX_SSP0_CS1_2_MASK (1 << 30) |
| 166 | 166 | ||
| 167 | #define PAD_DIRECTION_SEL_0 0x65C | ||
| 168 | #define PAD_DIRECTION_SEL_1 0x660 | ||
| 169 | #define PAD_DIRECTION_SEL_2 0x664 | ||
| 170 | |||
| 167 | /* combined macros */ | 171 | /* combined macros */ |
| 168 | #define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ | 172 | #define PMX_GMII_MASK (PMX_GMIICLK_MASK | \ |
| 169 | PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ | 173 | PMX_GMIICOL_CRS_XFERER_MIITXCLK_MASK | \ |
| @@ -237,6 +241,10 @@ static struct spear_muxreg i2c0_muxreg[] = { | |||
| 237 | .reg = PAD_FUNCTION_EN_0, | 241 | .reg = PAD_FUNCTION_EN_0, |
| 238 | .mask = PMX_I2C0_MASK, | 242 | .mask = PMX_I2C0_MASK, |
| 239 | .val = PMX_I2C0_MASK, | 243 | .val = PMX_I2C0_MASK, |
| 244 | }, { | ||
| 245 | .reg = PAD_DIRECTION_SEL_0, | ||
| 246 | .mask = PMX_I2C0_MASK, | ||
| 247 | .val = PMX_I2C0_MASK, | ||
| 240 | }, | 248 | }, |
| 241 | }; | 249 | }; |
| 242 | 250 | ||
| @@ -269,6 +277,10 @@ static struct spear_muxreg ssp0_muxreg[] = { | |||
| 269 | .reg = PAD_FUNCTION_EN_0, | 277 | .reg = PAD_FUNCTION_EN_0, |
| 270 | .mask = PMX_SSP0_MASK, | 278 | .mask = PMX_SSP0_MASK, |
| 271 | .val = PMX_SSP0_MASK, | 279 | .val = PMX_SSP0_MASK, |
| 280 | }, { | ||
| 281 | .reg = PAD_DIRECTION_SEL_0, | ||
| 282 | .mask = PMX_SSP0_MASK, | ||
| 283 | .val = PMX_SSP0_MASK, | ||
| 272 | }, | 284 | }, |
| 273 | }; | 285 | }; |
| 274 | 286 | ||
| @@ -294,6 +306,10 @@ static struct spear_muxreg ssp0_cs0_muxreg[] = { | |||
| 294 | .reg = PAD_FUNCTION_EN_2, | 306 | .reg = PAD_FUNCTION_EN_2, |
| 295 | .mask = PMX_SSP0_CS0_MASK, | 307 | .mask = PMX_SSP0_CS0_MASK, |
| 296 | .val = PMX_SSP0_CS0_MASK, | 308 | .val = PMX_SSP0_CS0_MASK, |
| 309 | }, { | ||
| 310 | .reg = PAD_DIRECTION_SEL_2, | ||
| 311 | .mask = PMX_SSP0_CS0_MASK, | ||
| 312 | .val = PMX_SSP0_CS0_MASK, | ||
| 297 | }, | 313 | }, |
| 298 | }; | 314 | }; |
| 299 | 315 | ||
| @@ -319,6 +335,10 @@ static struct spear_muxreg ssp0_cs1_2_muxreg[] = { | |||
| 319 | .reg = PAD_FUNCTION_EN_2, | 335 | .reg = PAD_FUNCTION_EN_2, |
| 320 | .mask = PMX_SSP0_CS1_2_MASK, | 336 | .mask = PMX_SSP0_CS1_2_MASK, |
| 321 | .val = PMX_SSP0_CS1_2_MASK, | 337 | .val = PMX_SSP0_CS1_2_MASK, |
| 338 | }, { | ||
| 339 | .reg = PAD_DIRECTION_SEL_2, | ||
| 340 | .mask = PMX_SSP0_CS1_2_MASK, | ||
| 341 | .val = PMX_SSP0_CS1_2_MASK, | ||
| 322 | }, | 342 | }, |
| 323 | }; | 343 | }; |
| 324 | 344 | ||
| @@ -352,6 +372,10 @@ static struct spear_muxreg i2s0_muxreg[] = { | |||
| 352 | .reg = PAD_FUNCTION_EN_0, | 372 | .reg = PAD_FUNCTION_EN_0, |
| 353 | .mask = PMX_I2S0_MASK, | 373 | .mask = PMX_I2S0_MASK, |
| 354 | .val = PMX_I2S0_MASK, | 374 | .val = PMX_I2S0_MASK, |
| 375 | }, { | ||
| 376 | .reg = PAD_DIRECTION_SEL_0, | ||
| 377 | .mask = PMX_I2S0_MASK, | ||
| 378 | .val = PMX_I2S0_MASK, | ||
| 355 | }, | 379 | }, |
| 356 | }; | 380 | }; |
| 357 | 381 | ||
| @@ -384,6 +408,10 @@ static struct spear_muxreg i2s1_muxreg[] = { | |||
| 384 | .reg = PAD_FUNCTION_EN_1, | 408 | .reg = PAD_FUNCTION_EN_1, |
| 385 | .mask = PMX_I2S1_MASK, | 409 | .mask = PMX_I2S1_MASK, |
| 386 | .val = PMX_I2S1_MASK, | 410 | .val = PMX_I2S1_MASK, |
| 411 | }, { | ||
| 412 | .reg = PAD_DIRECTION_SEL_1, | ||
| 413 | .mask = PMX_I2S1_MASK, | ||
| 414 | .val = PMX_I2S1_MASK, | ||
| 387 | }, | 415 | }, |
| 388 | }; | 416 | }; |
| 389 | 417 | ||
| @@ -418,6 +446,10 @@ static struct spear_muxreg clcd_muxreg[] = { | |||
| 418 | .reg = PAD_FUNCTION_EN_0, | 446 | .reg = PAD_FUNCTION_EN_0, |
| 419 | .mask = PMX_CLCD1_MASK, | 447 | .mask = PMX_CLCD1_MASK, |
| 420 | .val = PMX_CLCD1_MASK, | 448 | .val = PMX_CLCD1_MASK, |
| 449 | }, { | ||
| 450 | .reg = PAD_DIRECTION_SEL_0, | ||
| 451 | .mask = PMX_CLCD1_MASK, | ||
| 452 | .val = PMX_CLCD1_MASK, | ||
| 421 | }, | 453 | }, |
| 422 | }; | 454 | }; |
| 423 | 455 | ||
| @@ -443,6 +475,10 @@ static struct spear_muxreg clcd_high_res_muxreg[] = { | |||
| 443 | .reg = PAD_FUNCTION_EN_1, | 475 | .reg = PAD_FUNCTION_EN_1, |
| 444 | .mask = PMX_CLCD2_MASK, | 476 | .mask = PMX_CLCD2_MASK, |
| 445 | .val = PMX_CLCD2_MASK, | 477 | .val = PMX_CLCD2_MASK, |
| 478 | }, { | ||
| 479 | .reg = PAD_DIRECTION_SEL_1, | ||
| 480 | .mask = PMX_CLCD2_MASK, | ||
| 481 | .val = PMX_CLCD2_MASK, | ||
| 446 | }, | 482 | }, |
| 447 | }; | 483 | }; |
| 448 | 484 | ||
| @@ -461,7 +497,7 @@ static struct spear_pingroup clcd_high_res_pingroup = { | |||
| 461 | .nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux), | 497 | .nmodemuxs = ARRAY_SIZE(clcd_high_res_modemux), |
| 462 | }; | 498 | }; |
| 463 | 499 | ||
| 464 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res" }; | 500 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_high_res_grp" }; |
| 465 | static struct spear_function clcd_function = { | 501 | static struct spear_function clcd_function = { |
| 466 | .name = "clcd", | 502 | .name = "clcd", |
| 467 | .groups = clcd_grps, | 503 | .groups = clcd_grps, |
| @@ -479,6 +515,14 @@ static struct spear_muxreg arm_gpio_muxreg[] = { | |||
| 479 | .reg = PAD_FUNCTION_EN_1, | 515 | .reg = PAD_FUNCTION_EN_1, |
| 480 | .mask = PMX_EGPIO_1_GRP_MASK, | 516 | .mask = PMX_EGPIO_1_GRP_MASK, |
| 481 | .val = PMX_EGPIO_1_GRP_MASK, | 517 | .val = PMX_EGPIO_1_GRP_MASK, |
| 518 | }, { | ||
| 519 | .reg = PAD_DIRECTION_SEL_0, | ||
| 520 | .mask = PMX_EGPIO_0_GRP_MASK, | ||
| 521 | .val = PMX_EGPIO_0_GRP_MASK, | ||
| 522 | }, { | ||
| 523 | .reg = PAD_DIRECTION_SEL_1, | ||
| 524 | .mask = PMX_EGPIO_1_GRP_MASK, | ||
| 525 | .val = PMX_EGPIO_1_GRP_MASK, | ||
| 482 | }, | 526 | }, |
| 483 | }; | 527 | }; |
| 484 | 528 | ||
| @@ -511,6 +555,10 @@ static struct spear_muxreg smi_2_chips_muxreg[] = { | |||
| 511 | .reg = PAD_FUNCTION_EN_0, | 555 | .reg = PAD_FUNCTION_EN_0, |
| 512 | .mask = PMX_SMI_MASK, | 556 | .mask = PMX_SMI_MASK, |
| 513 | .val = PMX_SMI_MASK, | 557 | .val = PMX_SMI_MASK, |
| 558 | }, { | ||
| 559 | .reg = PAD_DIRECTION_SEL_0, | ||
| 560 | .mask = PMX_SMI_MASK, | ||
| 561 | .val = PMX_SMI_MASK, | ||
| 514 | }, | 562 | }, |
| 515 | }; | 563 | }; |
| 516 | 564 | ||
| @@ -539,6 +587,14 @@ static struct spear_muxreg smi_4_chips_muxreg[] = { | |||
| 539 | .reg = PAD_FUNCTION_EN_1, | 587 | .reg = PAD_FUNCTION_EN_1, |
| 540 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | 588 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, |
| 541 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | 589 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, |
| 590 | }, { | ||
| 591 | .reg = PAD_DIRECTION_SEL_0, | ||
| 592 | .mask = PMX_SMI_MASK, | ||
| 593 | .val = PMX_SMI_MASK, | ||
| 594 | }, { | ||
| 595 | .reg = PAD_DIRECTION_SEL_1, | ||
| 596 | .mask = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | ||
| 597 | .val = PMX_SMINCS2_MASK | PMX_SMINCS3_MASK, | ||
| 542 | }, | 598 | }, |
| 543 | }; | 599 | }; |
| 544 | 600 | ||
| @@ -573,6 +629,10 @@ static struct spear_muxreg gmii_muxreg[] = { | |||
| 573 | .reg = PAD_FUNCTION_EN_0, | 629 | .reg = PAD_FUNCTION_EN_0, |
| 574 | .mask = PMX_GMII_MASK, | 630 | .mask = PMX_GMII_MASK, |
| 575 | .val = PMX_GMII_MASK, | 631 | .val = PMX_GMII_MASK, |
| 632 | }, { | ||
| 633 | .reg = PAD_DIRECTION_SEL_0, | ||
| 634 | .mask = PMX_GMII_MASK, | ||
| 635 | .val = PMX_GMII_MASK, | ||
| 576 | }, | 636 | }, |
| 577 | }; | 637 | }; |
| 578 | 638 | ||
| @@ -615,6 +675,18 @@ static struct spear_muxreg rgmii_muxreg[] = { | |||
| 615 | .reg = PAD_FUNCTION_EN_2, | 675 | .reg = PAD_FUNCTION_EN_2, |
| 616 | .mask = PMX_RGMII_REG2_MASK, | 676 | .mask = PMX_RGMII_REG2_MASK, |
| 617 | .val = 0, | 677 | .val = 0, |
| 678 | }, { | ||
| 679 | .reg = PAD_DIRECTION_SEL_0, | ||
| 680 | .mask = PMX_RGMII_REG0_MASK, | ||
| 681 | .val = PMX_RGMII_REG0_MASK, | ||
| 682 | }, { | ||
| 683 | .reg = PAD_DIRECTION_SEL_1, | ||
| 684 | .mask = PMX_RGMII_REG1_MASK, | ||
| 685 | .val = PMX_RGMII_REG1_MASK, | ||
| 686 | }, { | ||
| 687 | .reg = PAD_DIRECTION_SEL_2, | ||
| 688 | .mask = PMX_RGMII_REG2_MASK, | ||
| 689 | .val = PMX_RGMII_REG2_MASK, | ||
| 618 | }, | 690 | }, |
| 619 | }; | 691 | }; |
| 620 | 692 | ||
| @@ -649,6 +721,10 @@ static struct spear_muxreg smii_0_1_2_muxreg[] = { | |||
| 649 | .reg = PAD_FUNCTION_EN_1, | 721 | .reg = PAD_FUNCTION_EN_1, |
| 650 | .mask = PMX_SMII_0_1_2_MASK, | 722 | .mask = PMX_SMII_0_1_2_MASK, |
| 651 | .val = 0, | 723 | .val = 0, |
| 724 | }, { | ||
| 725 | .reg = PAD_DIRECTION_SEL_1, | ||
| 726 | .mask = PMX_SMII_0_1_2_MASK, | ||
| 727 | .val = PMX_SMII_0_1_2_MASK, | ||
| 652 | }, | 728 | }, |
| 653 | }; | 729 | }; |
| 654 | 730 | ||
| @@ -681,6 +757,10 @@ static struct spear_muxreg ras_mii_txclk_muxreg[] = { | |||
| 681 | .reg = PAD_FUNCTION_EN_1, | 757 | .reg = PAD_FUNCTION_EN_1, |
| 682 | .mask = PMX_NFCE2_MASK, | 758 | .mask = PMX_NFCE2_MASK, |
| 683 | .val = 0, | 759 | .val = 0, |
| 760 | }, { | ||
| 761 | .reg = PAD_DIRECTION_SEL_1, | ||
| 762 | .mask = PMX_NFCE2_MASK, | ||
| 763 | .val = PMX_NFCE2_MASK, | ||
| 684 | }, | 764 | }, |
| 685 | }; | 765 | }; |
| 686 | 766 | ||
| @@ -721,6 +801,14 @@ static struct spear_muxreg nand_8bit_muxreg[] = { | |||
| 721 | .reg = PAD_FUNCTION_EN_1, | 801 | .reg = PAD_FUNCTION_EN_1, |
| 722 | .mask = PMX_NAND8BIT_1_MASK, | 802 | .mask = PMX_NAND8BIT_1_MASK, |
| 723 | .val = PMX_NAND8BIT_1_MASK, | 803 | .val = PMX_NAND8BIT_1_MASK, |
| 804 | }, { | ||
| 805 | .reg = PAD_DIRECTION_SEL_0, | ||
| 806 | .mask = PMX_NAND8BIT_0_MASK, | ||
| 807 | .val = PMX_NAND8BIT_0_MASK, | ||
| 808 | }, { | ||
| 809 | .reg = PAD_DIRECTION_SEL_1, | ||
| 810 | .mask = PMX_NAND8BIT_1_MASK, | ||
| 811 | .val = PMX_NAND8BIT_1_MASK, | ||
| 724 | }, | 812 | }, |
| 725 | }; | 813 | }; |
| 726 | 814 | ||
| @@ -747,6 +835,10 @@ static struct spear_muxreg nand_16bit_muxreg[] = { | |||
| 747 | .reg = PAD_FUNCTION_EN_1, | 835 | .reg = PAD_FUNCTION_EN_1, |
| 748 | .mask = PMX_NAND16BIT_1_MASK, | 836 | .mask = PMX_NAND16BIT_1_MASK, |
| 749 | .val = PMX_NAND16BIT_1_MASK, | 837 | .val = PMX_NAND16BIT_1_MASK, |
| 838 | }, { | ||
| 839 | .reg = PAD_DIRECTION_SEL_1, | ||
| 840 | .mask = PMX_NAND16BIT_1_MASK, | ||
| 841 | .val = PMX_NAND16BIT_1_MASK, | ||
| 750 | }, | 842 | }, |
| 751 | }; | 843 | }; |
| 752 | 844 | ||
| @@ -772,6 +864,10 @@ static struct spear_muxreg nand_4_chips_muxreg[] = { | |||
| 772 | .reg = PAD_FUNCTION_EN_1, | 864 | .reg = PAD_FUNCTION_EN_1, |
| 773 | .mask = PMX_NAND_4CHIPS_MASK, | 865 | .mask = PMX_NAND_4CHIPS_MASK, |
| 774 | .val = PMX_NAND_4CHIPS_MASK, | 866 | .val = PMX_NAND_4CHIPS_MASK, |
| 867 | }, { | ||
| 868 | .reg = PAD_DIRECTION_SEL_1, | ||
| 869 | .mask = PMX_NAND_4CHIPS_MASK, | ||
| 870 | .val = PMX_NAND_4CHIPS_MASK, | ||
| 775 | }, | 871 | }, |
| 776 | }; | 872 | }; |
| 777 | 873 | ||
| @@ -833,6 +929,10 @@ static struct spear_muxreg keyboard_rowcol6_8_muxreg[] = { | |||
| 833 | .reg = PAD_FUNCTION_EN_1, | 929 | .reg = PAD_FUNCTION_EN_1, |
| 834 | .mask = PMX_KBD_ROWCOL68_MASK, | 930 | .mask = PMX_KBD_ROWCOL68_MASK, |
| 835 | .val = PMX_KBD_ROWCOL68_MASK, | 931 | .val = PMX_KBD_ROWCOL68_MASK, |
| 932 | }, { | ||
| 933 | .reg = PAD_DIRECTION_SEL_1, | ||
| 934 | .mask = PMX_KBD_ROWCOL68_MASK, | ||
| 935 | .val = PMX_KBD_ROWCOL68_MASK, | ||
| 836 | }, | 936 | }, |
| 837 | }; | 937 | }; |
| 838 | 938 | ||
| @@ -866,6 +966,10 @@ static struct spear_muxreg uart0_muxreg[] = { | |||
| 866 | .reg = PAD_FUNCTION_EN_0, | 966 | .reg = PAD_FUNCTION_EN_0, |
| 867 | .mask = PMX_UART0_MASK, | 967 | .mask = PMX_UART0_MASK, |
| 868 | .val = PMX_UART0_MASK, | 968 | .val = PMX_UART0_MASK, |
| 969 | }, { | ||
| 970 | .reg = PAD_DIRECTION_SEL_0, | ||
| 971 | .mask = PMX_UART0_MASK, | ||
| 972 | .val = PMX_UART0_MASK, | ||
| 869 | }, | 973 | }, |
| 870 | }; | 974 | }; |
| 871 | 975 | ||
| @@ -891,6 +995,10 @@ static struct spear_muxreg uart0_modem_muxreg[] = { | |||
| 891 | .reg = PAD_FUNCTION_EN_1, | 995 | .reg = PAD_FUNCTION_EN_1, |
| 892 | .mask = PMX_UART0_MODEM_MASK, | 996 | .mask = PMX_UART0_MODEM_MASK, |
| 893 | .val = PMX_UART0_MODEM_MASK, | 997 | .val = PMX_UART0_MODEM_MASK, |
| 998 | }, { | ||
| 999 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1000 | .mask = PMX_UART0_MODEM_MASK, | ||
| 1001 | .val = PMX_UART0_MODEM_MASK, | ||
| 894 | }, | 1002 | }, |
| 895 | }; | 1003 | }; |
| 896 | 1004 | ||
| @@ -923,6 +1031,10 @@ static struct spear_muxreg gpt0_tmr0_muxreg[] = { | |||
| 923 | .reg = PAD_FUNCTION_EN_1, | 1031 | .reg = PAD_FUNCTION_EN_1, |
| 924 | .mask = PMX_GPT0_TMR0_MASK, | 1032 | .mask = PMX_GPT0_TMR0_MASK, |
| 925 | .val = PMX_GPT0_TMR0_MASK, | 1033 | .val = PMX_GPT0_TMR0_MASK, |
| 1034 | }, { | ||
| 1035 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1036 | .mask = PMX_GPT0_TMR0_MASK, | ||
| 1037 | .val = PMX_GPT0_TMR0_MASK, | ||
| 926 | }, | 1038 | }, |
| 927 | }; | 1039 | }; |
| 928 | 1040 | ||
| @@ -948,6 +1060,10 @@ static struct spear_muxreg gpt0_tmr1_muxreg[] = { | |||
| 948 | .reg = PAD_FUNCTION_EN_1, | 1060 | .reg = PAD_FUNCTION_EN_1, |
| 949 | .mask = PMX_GPT0_TMR1_MASK, | 1061 | .mask = PMX_GPT0_TMR1_MASK, |
| 950 | .val = PMX_GPT0_TMR1_MASK, | 1062 | .val = PMX_GPT0_TMR1_MASK, |
| 1063 | }, { | ||
| 1064 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1065 | .mask = PMX_GPT0_TMR1_MASK, | ||
| 1066 | .val = PMX_GPT0_TMR1_MASK, | ||
| 951 | }, | 1067 | }, |
| 952 | }; | 1068 | }; |
| 953 | 1069 | ||
| @@ -980,6 +1096,10 @@ static struct spear_muxreg gpt1_tmr0_muxreg[] = { | |||
| 980 | .reg = PAD_FUNCTION_EN_1, | 1096 | .reg = PAD_FUNCTION_EN_1, |
| 981 | .mask = PMX_GPT1_TMR0_MASK, | 1097 | .mask = PMX_GPT1_TMR0_MASK, |
| 982 | .val = PMX_GPT1_TMR0_MASK, | 1098 | .val = PMX_GPT1_TMR0_MASK, |
| 1099 | }, { | ||
| 1100 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1101 | .mask = PMX_GPT1_TMR0_MASK, | ||
| 1102 | .val = PMX_GPT1_TMR0_MASK, | ||
| 983 | }, | 1103 | }, |
| 984 | }; | 1104 | }; |
| 985 | 1105 | ||
| @@ -1005,6 +1125,10 @@ static struct spear_muxreg gpt1_tmr1_muxreg[] = { | |||
| 1005 | .reg = PAD_FUNCTION_EN_1, | 1125 | .reg = PAD_FUNCTION_EN_1, |
| 1006 | .mask = PMX_GPT1_TMR1_MASK, | 1126 | .mask = PMX_GPT1_TMR1_MASK, |
| 1007 | .val = PMX_GPT1_TMR1_MASK, | 1127 | .val = PMX_GPT1_TMR1_MASK, |
| 1128 | }, { | ||
| 1129 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1130 | .mask = PMX_GPT1_TMR1_MASK, | ||
| 1131 | .val = PMX_GPT1_TMR1_MASK, | ||
| 1008 | }, | 1132 | }, |
| 1009 | }; | 1133 | }; |
| 1010 | 1134 | ||
| @@ -1049,6 +1173,20 @@ static const unsigned mcif_pins[] = { 86, 87, 88, 89, 90, 91, 92, 93, 213, 214, | |||
| 1049 | .reg = PAD_FUNCTION_EN_2, \ | 1173 | .reg = PAD_FUNCTION_EN_2, \ |
| 1050 | .mask = PMX_MCIFALL_2_MASK, \ | 1174 | .mask = PMX_MCIFALL_2_MASK, \ |
| 1051 | .val = PMX_MCIFALL_2_MASK, \ | 1175 | .val = PMX_MCIFALL_2_MASK, \ |
| 1176 | }, { \ | ||
| 1177 | .reg = PAD_DIRECTION_SEL_0, \ | ||
| 1178 | .mask = PMX_MCI_DATA8_15_MASK, \ | ||
| 1179 | .val = PMX_MCI_DATA8_15_MASK, \ | ||
| 1180 | }, { \ | ||
| 1181 | .reg = PAD_DIRECTION_SEL_1, \ | ||
| 1182 | .mask = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ | ||
| 1183 | PMX_NFWPRT2_MASK, \ | ||
| 1184 | .val = PMX_MCIFALL_1_MASK | PMX_NFWPRT1_MASK | \ | ||
| 1185 | PMX_NFWPRT2_MASK, \ | ||
| 1186 | }, { \ | ||
| 1187 | .reg = PAD_DIRECTION_SEL_2, \ | ||
| 1188 | .mask = PMX_MCIFALL_2_MASK, \ | ||
| 1189 | .val = PMX_MCIFALL_2_MASK, \ | ||
| 1052 | } | 1190 | } |
| 1053 | 1191 | ||
| 1054 | /* sdhci device */ | 1192 | /* sdhci device */ |
| @@ -1154,6 +1292,10 @@ static struct spear_muxreg touch_xy_muxreg[] = { | |||
| 1154 | .reg = PAD_FUNCTION_EN_2, | 1292 | .reg = PAD_FUNCTION_EN_2, |
| 1155 | .mask = PMX_TOUCH_XY_MASK, | 1293 | .mask = PMX_TOUCH_XY_MASK, |
| 1156 | .val = PMX_TOUCH_XY_MASK, | 1294 | .val = PMX_TOUCH_XY_MASK, |
| 1295 | }, { | ||
| 1296 | .reg = PAD_DIRECTION_SEL_2, | ||
| 1297 | .mask = PMX_TOUCH_XY_MASK, | ||
| 1298 | .val = PMX_TOUCH_XY_MASK, | ||
| 1157 | }, | 1299 | }, |
| 1158 | }; | 1300 | }; |
| 1159 | 1301 | ||
| @@ -1187,6 +1329,10 @@ static struct spear_muxreg uart1_dis_i2c_muxreg[] = { | |||
| 1187 | .reg = PAD_FUNCTION_EN_0, | 1329 | .reg = PAD_FUNCTION_EN_0, |
| 1188 | .mask = PMX_I2C0_MASK, | 1330 | .mask = PMX_I2C0_MASK, |
| 1189 | .val = 0, | 1331 | .val = 0, |
| 1332 | }, { | ||
| 1333 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1334 | .mask = PMX_I2C0_MASK, | ||
| 1335 | .val = PMX_I2C0_MASK, | ||
| 1190 | }, | 1336 | }, |
| 1191 | }; | 1337 | }; |
| 1192 | 1338 | ||
| @@ -1213,6 +1359,12 @@ static struct spear_muxreg uart1_dis_sd_muxreg[] = { | |||
| 1213 | .mask = PMX_MCIDATA1_MASK | | 1359 | .mask = PMX_MCIDATA1_MASK | |
| 1214 | PMX_MCIDATA2_MASK, | 1360 | PMX_MCIDATA2_MASK, |
| 1215 | .val = 0, | 1361 | .val = 0, |
| 1362 | }, { | ||
| 1363 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1364 | .mask = PMX_MCIDATA1_MASK | | ||
| 1365 | PMX_MCIDATA2_MASK, | ||
| 1366 | .val = PMX_MCIDATA1_MASK | | ||
| 1367 | PMX_MCIDATA2_MASK, | ||
| 1216 | }, | 1368 | }, |
| 1217 | }; | 1369 | }; |
| 1218 | 1370 | ||
| @@ -1246,6 +1398,10 @@ static struct spear_muxreg uart2_3_muxreg[] = { | |||
| 1246 | .reg = PAD_FUNCTION_EN_0, | 1398 | .reg = PAD_FUNCTION_EN_0, |
| 1247 | .mask = PMX_I2S0_MASK, | 1399 | .mask = PMX_I2S0_MASK, |
| 1248 | .val = 0, | 1400 | .val = 0, |
| 1401 | }, { | ||
| 1402 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1403 | .mask = PMX_I2S0_MASK, | ||
| 1404 | .val = PMX_I2S0_MASK, | ||
| 1249 | }, | 1405 | }, |
| 1250 | }; | 1406 | }; |
| 1251 | 1407 | ||
| @@ -1278,6 +1434,10 @@ static struct spear_muxreg uart4_muxreg[] = { | |||
| 1278 | .reg = PAD_FUNCTION_EN_0, | 1434 | .reg = PAD_FUNCTION_EN_0, |
| 1279 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, | 1435 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, |
| 1280 | .val = 0, | 1436 | .val = 0, |
| 1437 | }, { | ||
| 1438 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1439 | .mask = PMX_I2S0_MASK | PMX_CLCD1_MASK, | ||
| 1440 | .val = PMX_I2S0_MASK | PMX_CLCD1_MASK, | ||
| 1281 | }, | 1441 | }, |
| 1282 | }; | 1442 | }; |
| 1283 | 1443 | ||
| @@ -1310,6 +1470,10 @@ static struct spear_muxreg uart5_muxreg[] = { | |||
| 1310 | .reg = PAD_FUNCTION_EN_0, | 1470 | .reg = PAD_FUNCTION_EN_0, |
| 1311 | .mask = PMX_CLCD1_MASK, | 1471 | .mask = PMX_CLCD1_MASK, |
| 1312 | .val = 0, | 1472 | .val = 0, |
| 1473 | }, { | ||
| 1474 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1475 | .mask = PMX_CLCD1_MASK, | ||
| 1476 | .val = PMX_CLCD1_MASK, | ||
| 1313 | }, | 1477 | }, |
| 1314 | }; | 1478 | }; |
| 1315 | 1479 | ||
| @@ -1344,6 +1508,10 @@ static struct spear_muxreg rs485_0_1_tdm_0_1_muxreg[] = { | |||
| 1344 | .reg = PAD_FUNCTION_EN_0, | 1508 | .reg = PAD_FUNCTION_EN_0, |
| 1345 | .mask = PMX_CLCD1_MASK, | 1509 | .mask = PMX_CLCD1_MASK, |
| 1346 | .val = 0, | 1510 | .val = 0, |
| 1511 | }, { | ||
| 1512 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1513 | .mask = PMX_CLCD1_MASK, | ||
| 1514 | .val = PMX_CLCD1_MASK, | ||
| 1347 | }, | 1515 | }, |
| 1348 | }; | 1516 | }; |
| 1349 | 1517 | ||
| @@ -1376,6 +1544,10 @@ static struct spear_muxreg i2c_1_2_muxreg[] = { | |||
| 1376 | .reg = PAD_FUNCTION_EN_0, | 1544 | .reg = PAD_FUNCTION_EN_0, |
| 1377 | .mask = PMX_CLCD1_MASK, | 1545 | .mask = PMX_CLCD1_MASK, |
| 1378 | .val = 0, | 1546 | .val = 0, |
| 1547 | }, { | ||
| 1548 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1549 | .mask = PMX_CLCD1_MASK, | ||
| 1550 | .val = PMX_CLCD1_MASK, | ||
| 1379 | }, | 1551 | }, |
| 1380 | }; | 1552 | }; |
| 1381 | 1553 | ||
| @@ -1409,6 +1581,10 @@ static struct spear_muxreg i2c3_dis_smi_clcd_muxreg[] = { | |||
| 1409 | .reg = PAD_FUNCTION_EN_0, | 1581 | .reg = PAD_FUNCTION_EN_0, |
| 1410 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, | 1582 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, |
| 1411 | .val = 0, | 1583 | .val = 0, |
| 1584 | }, { | ||
| 1585 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1586 | .mask = PMX_CLCD1_MASK | PMX_SMI_MASK, | ||
| 1587 | .val = PMX_CLCD1_MASK | PMX_SMI_MASK, | ||
| 1412 | }, | 1588 | }, |
| 1413 | }; | 1589 | }; |
| 1414 | 1590 | ||
| @@ -1435,6 +1611,10 @@ static struct spear_muxreg i2c3_dis_sd_i2s0_muxreg[] = { | |||
| 1435 | .reg = PAD_FUNCTION_EN_1, | 1611 | .reg = PAD_FUNCTION_EN_1, |
| 1436 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | 1612 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, |
| 1437 | .val = 0, | 1613 | .val = 0, |
| 1614 | }, { | ||
| 1615 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1616 | .mask = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | ||
| 1617 | .val = PMX_I2S1_MASK | PMX_MCIDATA3_MASK, | ||
| 1438 | }, | 1618 | }, |
| 1439 | }; | 1619 | }; |
| 1440 | 1620 | ||
| @@ -1469,6 +1649,10 @@ static struct spear_muxreg i2c_4_5_dis_smi_muxreg[] = { | |||
| 1469 | .reg = PAD_FUNCTION_EN_0, | 1649 | .reg = PAD_FUNCTION_EN_0, |
| 1470 | .mask = PMX_SMI_MASK, | 1650 | .mask = PMX_SMI_MASK, |
| 1471 | .val = 0, | 1651 | .val = 0, |
| 1652 | }, { | ||
| 1653 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1654 | .mask = PMX_SMI_MASK, | ||
| 1655 | .val = PMX_SMI_MASK, | ||
| 1472 | }, | 1656 | }, |
| 1473 | }; | 1657 | }; |
| 1474 | 1658 | ||
| @@ -1499,6 +1683,14 @@ static struct spear_muxreg i2c4_dis_sd_muxreg[] = { | |||
| 1499 | .reg = PAD_FUNCTION_EN_2, | 1683 | .reg = PAD_FUNCTION_EN_2, |
| 1500 | .mask = PMX_MCIDATA5_MASK, | 1684 | .mask = PMX_MCIDATA5_MASK, |
| 1501 | .val = 0, | 1685 | .val = 0, |
| 1686 | }, { | ||
| 1687 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1688 | .mask = PMX_MCIDATA4_MASK, | ||
| 1689 | .val = PMX_MCIDATA4_MASK, | ||
| 1690 | }, { | ||
| 1691 | .reg = PAD_DIRECTION_SEL_2, | ||
| 1692 | .mask = PMX_MCIDATA5_MASK, | ||
| 1693 | .val = PMX_MCIDATA5_MASK, | ||
| 1502 | }, | 1694 | }, |
| 1503 | }; | 1695 | }; |
| 1504 | 1696 | ||
| @@ -1526,6 +1718,12 @@ static struct spear_muxreg i2c5_dis_sd_muxreg[] = { | |||
| 1526 | .mask = PMX_MCIDATA6_MASK | | 1718 | .mask = PMX_MCIDATA6_MASK | |
| 1527 | PMX_MCIDATA7_MASK, | 1719 | PMX_MCIDATA7_MASK, |
| 1528 | .val = 0, | 1720 | .val = 0, |
| 1721 | }, { | ||
| 1722 | .reg = PAD_DIRECTION_SEL_2, | ||
| 1723 | .mask = PMX_MCIDATA6_MASK | | ||
| 1724 | PMX_MCIDATA7_MASK, | ||
| 1725 | .val = PMX_MCIDATA6_MASK | | ||
| 1726 | PMX_MCIDATA7_MASK, | ||
| 1529 | }, | 1727 | }, |
| 1530 | }; | 1728 | }; |
| 1531 | 1729 | ||
| @@ -1560,6 +1758,10 @@ static struct spear_muxreg i2c_6_7_dis_kbd_muxreg[] = { | |||
| 1560 | .reg = PAD_FUNCTION_EN_1, | 1758 | .reg = PAD_FUNCTION_EN_1, |
| 1561 | .mask = PMX_KBD_ROWCOL25_MASK, | 1759 | .mask = PMX_KBD_ROWCOL25_MASK, |
| 1562 | .val = 0, | 1760 | .val = 0, |
| 1761 | }, { | ||
| 1762 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1763 | .mask = PMX_KBD_ROWCOL25_MASK, | ||
| 1764 | .val = PMX_KBD_ROWCOL25_MASK, | ||
| 1563 | }, | 1765 | }, |
| 1564 | }; | 1766 | }; |
| 1565 | 1767 | ||
| @@ -1587,6 +1789,12 @@ static struct spear_muxreg i2c6_dis_sd_muxreg[] = { | |||
| 1587 | .mask = PMX_MCIIORDRE_MASK | | 1789 | .mask = PMX_MCIIORDRE_MASK | |
| 1588 | PMX_MCIIOWRWE_MASK, | 1790 | PMX_MCIIOWRWE_MASK, |
| 1589 | .val = 0, | 1791 | .val = 0, |
| 1792 | }, { | ||
| 1793 | .reg = PAD_DIRECTION_SEL_2, | ||
| 1794 | .mask = PMX_MCIIORDRE_MASK | | ||
| 1795 | PMX_MCIIOWRWE_MASK, | ||
| 1796 | .val = PMX_MCIIORDRE_MASK | | ||
| 1797 | PMX_MCIIOWRWE_MASK, | ||
| 1590 | }, | 1798 | }, |
| 1591 | }; | 1799 | }; |
| 1592 | 1800 | ||
| @@ -1613,6 +1821,12 @@ static struct spear_muxreg i2c7_dis_sd_muxreg[] = { | |||
| 1613 | .mask = PMX_MCIRESETCF_MASK | | 1821 | .mask = PMX_MCIRESETCF_MASK | |
| 1614 | PMX_MCICS0CE_MASK, | 1822 | PMX_MCICS0CE_MASK, |
| 1615 | .val = 0, | 1823 | .val = 0, |
| 1824 | }, { | ||
| 1825 | .reg = PAD_DIRECTION_SEL_2, | ||
| 1826 | .mask = PMX_MCIRESETCF_MASK | | ||
| 1827 | PMX_MCICS0CE_MASK, | ||
| 1828 | .val = PMX_MCIRESETCF_MASK | | ||
| 1829 | PMX_MCICS0CE_MASK, | ||
| 1616 | }, | 1830 | }, |
| 1617 | }; | 1831 | }; |
| 1618 | 1832 | ||
| @@ -1651,6 +1865,14 @@ static struct spear_muxreg can0_dis_nor_muxreg[] = { | |||
| 1651 | .reg = PAD_FUNCTION_EN_1, | 1865 | .reg = PAD_FUNCTION_EN_1, |
| 1652 | .mask = PMX_NFRSTPWDWN3_MASK, | 1866 | .mask = PMX_NFRSTPWDWN3_MASK, |
| 1653 | .val = 0, | 1867 | .val = 0, |
| 1868 | }, { | ||
| 1869 | .reg = PAD_DIRECTION_SEL_0, | ||
| 1870 | .mask = PMX_NFRSTPWDWN2_MASK, | ||
| 1871 | .val = PMX_NFRSTPWDWN2_MASK, | ||
| 1872 | }, { | ||
| 1873 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1874 | .mask = PMX_NFRSTPWDWN3_MASK, | ||
| 1875 | .val = PMX_NFRSTPWDWN3_MASK, | ||
| 1654 | }, | 1876 | }, |
| 1655 | }; | 1877 | }; |
| 1656 | 1878 | ||
| @@ -1677,6 +1899,10 @@ static struct spear_muxreg can0_dis_sd_muxreg[] = { | |||
| 1677 | .reg = PAD_FUNCTION_EN_2, | 1899 | .reg = PAD_FUNCTION_EN_2, |
| 1678 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | 1900 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, |
| 1679 | .val = 0, | 1901 | .val = 0, |
| 1902 | }, { | ||
| 1903 | .reg = PAD_DIRECTION_SEL_2, | ||
| 1904 | .mask = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | ||
| 1905 | .val = PMX_MCICFINTR_MASK | PMX_MCIIORDY_MASK, | ||
| 1680 | }, | 1906 | }, |
| 1681 | }; | 1907 | }; |
| 1682 | 1908 | ||
| @@ -1711,6 +1937,10 @@ static struct spear_muxreg can1_dis_sd_muxreg[] = { | |||
| 1711 | .reg = PAD_FUNCTION_EN_2, | 1937 | .reg = PAD_FUNCTION_EN_2, |
| 1712 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | 1938 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, |
| 1713 | .val = 0, | 1939 | .val = 0, |
| 1940 | }, { | ||
| 1941 | .reg = PAD_DIRECTION_SEL_2, | ||
| 1942 | .mask = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | ||
| 1943 | .val = PMX_MCICS1_MASK | PMX_MCIDMAACK_MASK, | ||
| 1714 | }, | 1944 | }, |
| 1715 | }; | 1945 | }; |
| 1716 | 1946 | ||
| @@ -1737,6 +1967,10 @@ static struct spear_muxreg can1_dis_kbd_muxreg[] = { | |||
| 1737 | .reg = PAD_FUNCTION_EN_1, | 1967 | .reg = PAD_FUNCTION_EN_1, |
| 1738 | .mask = PMX_KBD_ROWCOL25_MASK, | 1968 | .mask = PMX_KBD_ROWCOL25_MASK, |
| 1739 | .val = 0, | 1969 | .val = 0, |
| 1970 | }, { | ||
| 1971 | .reg = PAD_DIRECTION_SEL_1, | ||
| 1972 | .mask = PMX_KBD_ROWCOL25_MASK, | ||
| 1973 | .val = PMX_KBD_ROWCOL25_MASK, | ||
| 1740 | }, | 1974 | }, |
| 1741 | }; | 1975 | }; |
| 1742 | 1976 | ||
| @@ -1763,29 +1997,64 @@ static struct spear_function can1_function = { | |||
| 1763 | .ngroups = ARRAY_SIZE(can1_grps), | 1997 | .ngroups = ARRAY_SIZE(can1_grps), |
| 1764 | }; | 1998 | }; |
| 1765 | 1999 | ||
| 1766 | /* Pad multiplexing for pci device */ | 2000 | /* Pad multiplexing for (ras-ip) pci device */ |
| 1767 | static const unsigned pci_sata_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, | 2001 | static const unsigned pci_pins[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 18, |
| 1768 | 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, | 2002 | 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, |
| 1769 | 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, | 2003 | 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, |
| 1770 | 55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 }; | 2004 | 55, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99 }; |
| 1771 | #define PCI_SATA_MUXREG \ | ||
| 1772 | { \ | ||
| 1773 | .reg = PAD_FUNCTION_EN_0, \ | ||
| 1774 | .mask = PMX_MCI_DATA8_15_MASK, \ | ||
| 1775 | .val = 0, \ | ||
| 1776 | }, { \ | ||
| 1777 | .reg = PAD_FUNCTION_EN_1, \ | ||
| 1778 | .mask = PMX_PCI_REG1_MASK, \ | ||
| 1779 | .val = 0, \ | ||
| 1780 | }, { \ | ||
| 1781 | .reg = PAD_FUNCTION_EN_2, \ | ||
| 1782 | .mask = PMX_PCI_REG2_MASK, \ | ||
| 1783 | .val = 0, \ | ||
| 1784 | } | ||
| 1785 | 2005 | ||
| 1786 | /* pad multiplexing for pcie0 device */ | 2006 | static struct spear_muxreg pci_muxreg[] = { |
| 2007 | { | ||
| 2008 | .reg = PAD_FUNCTION_EN_0, | ||
| 2009 | .mask = PMX_MCI_DATA8_15_MASK, | ||
| 2010 | .val = 0, | ||
| 2011 | }, { | ||
| 2012 | .reg = PAD_FUNCTION_EN_1, | ||
| 2013 | .mask = PMX_PCI_REG1_MASK, | ||
| 2014 | .val = 0, | ||
| 2015 | }, { | ||
| 2016 | .reg = PAD_FUNCTION_EN_2, | ||
| 2017 | .mask = PMX_PCI_REG2_MASK, | ||
| 2018 | .val = 0, | ||
| 2019 | }, { | ||
| 2020 | .reg = PAD_DIRECTION_SEL_0, | ||
| 2021 | .mask = PMX_MCI_DATA8_15_MASK, | ||
| 2022 | .val = PMX_MCI_DATA8_15_MASK, | ||
| 2023 | }, { | ||
| 2024 | .reg = PAD_DIRECTION_SEL_1, | ||
| 2025 | .mask = PMX_PCI_REG1_MASK, | ||
| 2026 | .val = PMX_PCI_REG1_MASK, | ||
| 2027 | }, { | ||
| 2028 | .reg = PAD_DIRECTION_SEL_2, | ||
| 2029 | .mask = PMX_PCI_REG2_MASK, | ||
| 2030 | .val = PMX_PCI_REG2_MASK, | ||
| 2031 | }, | ||
| 2032 | }; | ||
| 2033 | |||
| 2034 | static struct spear_modemux pci_modemux[] = { | ||
| 2035 | { | ||
| 2036 | .muxregs = pci_muxreg, | ||
| 2037 | .nmuxregs = ARRAY_SIZE(pci_muxreg), | ||
| 2038 | }, | ||
| 2039 | }; | ||
| 2040 | |||
| 2041 | static struct spear_pingroup pci_pingroup = { | ||
| 2042 | .name = "pci_grp", | ||
| 2043 | .pins = pci_pins, | ||
| 2044 | .npins = ARRAY_SIZE(pci_pins), | ||
| 2045 | .modemuxs = pci_modemux, | ||
| 2046 | .nmodemuxs = ARRAY_SIZE(pci_modemux), | ||
| 2047 | }; | ||
| 2048 | |||
| 2049 | static const char *const pci_grps[] = { "pci_grp" }; | ||
| 2050 | static struct spear_function pci_function = { | ||
| 2051 | .name = "pci", | ||
| 2052 | .groups = pci_grps, | ||
| 2053 | .ngroups = ARRAY_SIZE(pci_grps), | ||
| 2054 | }; | ||
| 2055 | |||
| 2056 | /* pad multiplexing for (fix-part) pcie0 device */ | ||
| 1787 | static struct spear_muxreg pcie0_muxreg[] = { | 2057 | static struct spear_muxreg pcie0_muxreg[] = { |
| 1788 | PCI_SATA_MUXREG, | ||
| 1789 | { | 2058 | { |
| 1790 | .reg = PCIE_SATA_CFG, | 2059 | .reg = PCIE_SATA_CFG, |
| 1791 | .mask = PCIE_CFG_VAL(0), | 2060 | .mask = PCIE_CFG_VAL(0), |
| @@ -1802,15 +2071,12 @@ static struct spear_modemux pcie0_modemux[] = { | |||
| 1802 | 2071 | ||
| 1803 | static struct spear_pingroup pcie0_pingroup = { | 2072 | static struct spear_pingroup pcie0_pingroup = { |
| 1804 | .name = "pcie0_grp", | 2073 | .name = "pcie0_grp", |
| 1805 | .pins = pci_sata_pins, | ||
| 1806 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
| 1807 | .modemuxs = pcie0_modemux, | 2074 | .modemuxs = pcie0_modemux, |
| 1808 | .nmodemuxs = ARRAY_SIZE(pcie0_modemux), | 2075 | .nmodemuxs = ARRAY_SIZE(pcie0_modemux), |
| 1809 | }; | 2076 | }; |
| 1810 | 2077 | ||
| 1811 | /* pad multiplexing for pcie1 device */ | 2078 | /* pad multiplexing for (fix-part) pcie1 device */ |
| 1812 | static struct spear_muxreg pcie1_muxreg[] = { | 2079 | static struct spear_muxreg pcie1_muxreg[] = { |
| 1813 | PCI_SATA_MUXREG, | ||
| 1814 | { | 2080 | { |
| 1815 | .reg = PCIE_SATA_CFG, | 2081 | .reg = PCIE_SATA_CFG, |
| 1816 | .mask = PCIE_CFG_VAL(1), | 2082 | .mask = PCIE_CFG_VAL(1), |
| @@ -1827,15 +2093,12 @@ static struct spear_modemux pcie1_modemux[] = { | |||
| 1827 | 2093 | ||
| 1828 | static struct spear_pingroup pcie1_pingroup = { | 2094 | static struct spear_pingroup pcie1_pingroup = { |
| 1829 | .name = "pcie1_grp", | 2095 | .name = "pcie1_grp", |
| 1830 | .pins = pci_sata_pins, | ||
| 1831 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
| 1832 | .modemuxs = pcie1_modemux, | 2096 | .modemuxs = pcie1_modemux, |
| 1833 | .nmodemuxs = ARRAY_SIZE(pcie1_modemux), | 2097 | .nmodemuxs = ARRAY_SIZE(pcie1_modemux), |
| 1834 | }; | 2098 | }; |
| 1835 | 2099 | ||
| 1836 | /* pad multiplexing for pcie2 device */ | 2100 | /* pad multiplexing for (fix-part) pcie2 device */ |
| 1837 | static struct spear_muxreg pcie2_muxreg[] = { | 2101 | static struct spear_muxreg pcie2_muxreg[] = { |
| 1838 | PCI_SATA_MUXREG, | ||
| 1839 | { | 2102 | { |
| 1840 | .reg = PCIE_SATA_CFG, | 2103 | .reg = PCIE_SATA_CFG, |
| 1841 | .mask = PCIE_CFG_VAL(2), | 2104 | .mask = PCIE_CFG_VAL(2), |
| @@ -1852,22 +2115,20 @@ static struct spear_modemux pcie2_modemux[] = { | |||
| 1852 | 2115 | ||
| 1853 | static struct spear_pingroup pcie2_pingroup = { | 2116 | static struct spear_pingroup pcie2_pingroup = { |
| 1854 | .name = "pcie2_grp", | 2117 | .name = "pcie2_grp", |
| 1855 | .pins = pci_sata_pins, | ||
| 1856 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
| 1857 | .modemuxs = pcie2_modemux, | 2118 | .modemuxs = pcie2_modemux, |
| 1858 | .nmodemuxs = ARRAY_SIZE(pcie2_modemux), | 2119 | .nmodemuxs = ARRAY_SIZE(pcie2_modemux), |
| 1859 | }; | 2120 | }; |
| 1860 | 2121 | ||
| 1861 | static const char *const pci_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" }; | 2122 | static const char *const pcie_grps[] = { "pcie0_grp", "pcie1_grp", "pcie2_grp" |
| 1862 | static struct spear_function pci_function = { | 2123 | }; |
| 1863 | .name = "pci", | 2124 | static struct spear_function pcie_function = { |
| 1864 | .groups = pci_grps, | 2125 | .name = "pci_express", |
| 1865 | .ngroups = ARRAY_SIZE(pci_grps), | 2126 | .groups = pcie_grps, |
| 2127 | .ngroups = ARRAY_SIZE(pcie_grps), | ||
| 1866 | }; | 2128 | }; |
| 1867 | 2129 | ||
| 1868 | /* pad multiplexing for sata0 device */ | 2130 | /* pad multiplexing for sata0 device */ |
| 1869 | static struct spear_muxreg sata0_muxreg[] = { | 2131 | static struct spear_muxreg sata0_muxreg[] = { |
| 1870 | PCI_SATA_MUXREG, | ||
| 1871 | { | 2132 | { |
| 1872 | .reg = PCIE_SATA_CFG, | 2133 | .reg = PCIE_SATA_CFG, |
| 1873 | .mask = SATA_CFG_VAL(0), | 2134 | .mask = SATA_CFG_VAL(0), |
| @@ -1884,15 +2145,12 @@ static struct spear_modemux sata0_modemux[] = { | |||
| 1884 | 2145 | ||
| 1885 | static struct spear_pingroup sata0_pingroup = { | 2146 | static struct spear_pingroup sata0_pingroup = { |
| 1886 | .name = "sata0_grp", | 2147 | .name = "sata0_grp", |
| 1887 | .pins = pci_sata_pins, | ||
| 1888 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
| 1889 | .modemuxs = sata0_modemux, | 2148 | .modemuxs = sata0_modemux, |
| 1890 | .nmodemuxs = ARRAY_SIZE(sata0_modemux), | 2149 | .nmodemuxs = ARRAY_SIZE(sata0_modemux), |
| 1891 | }; | 2150 | }; |
| 1892 | 2151 | ||
| 1893 | /* pad multiplexing for sata1 device */ | 2152 | /* pad multiplexing for sata1 device */ |
| 1894 | static struct spear_muxreg sata1_muxreg[] = { | 2153 | static struct spear_muxreg sata1_muxreg[] = { |
| 1895 | PCI_SATA_MUXREG, | ||
| 1896 | { | 2154 | { |
| 1897 | .reg = PCIE_SATA_CFG, | 2155 | .reg = PCIE_SATA_CFG, |
| 1898 | .mask = SATA_CFG_VAL(1), | 2156 | .mask = SATA_CFG_VAL(1), |
| @@ -1909,15 +2167,12 @@ static struct spear_modemux sata1_modemux[] = { | |||
| 1909 | 2167 | ||
| 1910 | static struct spear_pingroup sata1_pingroup = { | 2168 | static struct spear_pingroup sata1_pingroup = { |
| 1911 | .name = "sata1_grp", | 2169 | .name = "sata1_grp", |
| 1912 | .pins = pci_sata_pins, | ||
| 1913 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
| 1914 | .modemuxs = sata1_modemux, | 2170 | .modemuxs = sata1_modemux, |
| 1915 | .nmodemuxs = ARRAY_SIZE(sata1_modemux), | 2171 | .nmodemuxs = ARRAY_SIZE(sata1_modemux), |
| 1916 | }; | 2172 | }; |
| 1917 | 2173 | ||
| 1918 | /* pad multiplexing for sata2 device */ | 2174 | /* pad multiplexing for sata2 device */ |
| 1919 | static struct spear_muxreg sata2_muxreg[] = { | 2175 | static struct spear_muxreg sata2_muxreg[] = { |
| 1920 | PCI_SATA_MUXREG, | ||
| 1921 | { | 2176 | { |
| 1922 | .reg = PCIE_SATA_CFG, | 2177 | .reg = PCIE_SATA_CFG, |
| 1923 | .mask = SATA_CFG_VAL(2), | 2178 | .mask = SATA_CFG_VAL(2), |
| @@ -1934,8 +2189,6 @@ static struct spear_modemux sata2_modemux[] = { | |||
| 1934 | 2189 | ||
| 1935 | static struct spear_pingroup sata2_pingroup = { | 2190 | static struct spear_pingroup sata2_pingroup = { |
| 1936 | .name = "sata2_grp", | 2191 | .name = "sata2_grp", |
| 1937 | .pins = pci_sata_pins, | ||
| 1938 | .npins = ARRAY_SIZE(pci_sata_pins), | ||
| 1939 | .modemuxs = sata2_modemux, | 2192 | .modemuxs = sata2_modemux, |
| 1940 | .nmodemuxs = ARRAY_SIZE(sata2_modemux), | 2193 | .nmodemuxs = ARRAY_SIZE(sata2_modemux), |
| 1941 | }; | 2194 | }; |
| @@ -1957,6 +2210,14 @@ static struct spear_muxreg ssp1_dis_kbd_muxreg[] = { | |||
| 1957 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | 2210 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | |
| 1958 | PMX_NFCE2_MASK, | 2211 | PMX_NFCE2_MASK, |
| 1959 | .val = 0, | 2212 | .val = 0, |
| 2213 | }, { | ||
| 2214 | .reg = PAD_DIRECTION_SEL_1, | ||
| 2215 | .mask = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | | ||
| 2216 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | ||
| 2217 | PMX_NFCE2_MASK, | ||
| 2218 | .val = PMX_KBD_ROWCOL25_MASK | PMX_KBD_COL1_MASK | | ||
| 2219 | PMX_KBD_COL0_MASK | PMX_NFIO8_15_MASK | PMX_NFCE1_MASK | | ||
| 2220 | PMX_NFCE2_MASK, | ||
| 1960 | }, | 2221 | }, |
| 1961 | }; | 2222 | }; |
| 1962 | 2223 | ||
| @@ -1983,6 +2244,12 @@ static struct spear_muxreg ssp1_dis_sd_muxreg[] = { | |||
| 1983 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | 2244 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | |
| 1984 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | 2245 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, |
| 1985 | .val = 0, | 2246 | .val = 0, |
| 2247 | }, { | ||
| 2248 | .reg = PAD_DIRECTION_SEL_2, | ||
| 2249 | .mask = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | ||
| 2250 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | ||
| 2251 | .val = PMX_MCIADDR0ALE_MASK | PMX_MCIADDR2_MASK | | ||
| 2252 | PMX_MCICECF_MASK | PMX_MCICEXD_MASK, | ||
| 1986 | }, | 2253 | }, |
| 1987 | }; | 2254 | }; |
| 1988 | 2255 | ||
| @@ -2017,6 +2284,12 @@ static struct spear_muxreg gpt64_muxreg[] = { | |||
| 2017 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | 2284 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK |
| 2018 | | PMX_MCILEDS_MASK, | 2285 | | PMX_MCILEDS_MASK, |
| 2019 | .val = 0, | 2286 | .val = 0, |
| 2287 | }, { | ||
| 2288 | .reg = PAD_DIRECTION_SEL_2, | ||
| 2289 | .mask = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | ||
| 2290 | | PMX_MCILEDS_MASK, | ||
| 2291 | .val = PMX_MCICDCF1_MASK | PMX_MCICDCF2_MASK | PMX_MCICDXD_MASK | ||
| 2292 | | PMX_MCILEDS_MASK, | ||
| 2020 | }, | 2293 | }, |
| 2021 | }; | 2294 | }; |
| 2022 | 2295 | ||
| @@ -2093,6 +2366,7 @@ static struct spear_pingroup *spear1310_pingroups[] = { | |||
| 2093 | &can0_dis_sd_pingroup, | 2366 | &can0_dis_sd_pingroup, |
| 2094 | &can1_dis_sd_pingroup, | 2367 | &can1_dis_sd_pingroup, |
| 2095 | &can1_dis_kbd_pingroup, | 2368 | &can1_dis_kbd_pingroup, |
| 2369 | &pci_pingroup, | ||
| 2096 | &pcie0_pingroup, | 2370 | &pcie0_pingroup, |
| 2097 | &pcie1_pingroup, | 2371 | &pcie1_pingroup, |
| 2098 | &pcie2_pingroup, | 2372 | &pcie2_pingroup, |
| @@ -2138,6 +2412,7 @@ static struct spear_function *spear1310_functions[] = { | |||
| 2138 | &can0_function, | 2412 | &can0_function, |
| 2139 | &can1_function, | 2413 | &can1_function, |
| 2140 | &pci_function, | 2414 | &pci_function, |
| 2415 | &pcie_function, | ||
| 2141 | &sata_function, | 2416 | &sata_function, |
| 2142 | &ssp1_function, | 2417 | &ssp1_function, |
| 2143 | &gpt64_function, | 2418 | &gpt64_function, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear1340.c b/drivers/pinctrl/spear/pinctrl-spear1340.c index a0eb057e55bd..0606b8cf3f2c 100644 --- a/drivers/pinctrl/spear/pinctrl-spear1340.c +++ b/drivers/pinctrl/spear/pinctrl-spear1340.c | |||
| @@ -213,7 +213,7 @@ static const struct pinctrl_pin_desc spear1340_pins[] = { | |||
| 213 | * Pad multiplexing for making all pads as gpio's. This is done to override the | 213 | * Pad multiplexing for making all pads as gpio's. This is done to override the |
| 214 | * values passed from bootloader and start from scratch. | 214 | * values passed from bootloader and start from scratch. |
| 215 | */ | 215 | */ |
| 216 | static const unsigned pads_as_gpio_pins[] = { 251 }; | 216 | static const unsigned pads_as_gpio_pins[] = { 12, 88, 89, 251 }; |
| 217 | static struct spear_muxreg pads_as_gpio_muxreg[] = { | 217 | static struct spear_muxreg pads_as_gpio_muxreg[] = { |
| 218 | { | 218 | { |
| 219 | .reg = PAD_FUNCTION_EN_1, | 219 | .reg = PAD_FUNCTION_EN_1, |
| @@ -1692,7 +1692,43 @@ static struct spear_pingroup clcd_pingroup = { | |||
| 1692 | .nmodemuxs = ARRAY_SIZE(clcd_modemux), | 1692 | .nmodemuxs = ARRAY_SIZE(clcd_modemux), |
| 1693 | }; | 1693 | }; |
| 1694 | 1694 | ||
| 1695 | static const char *const clcd_grps[] = { "clcd_grp" }; | 1695 | /* Disable cld runtime to save panel damage */ |
| 1696 | static struct spear_muxreg clcd_sleep_muxreg[] = { | ||
| 1697 | { | ||
| 1698 | .reg = PAD_SHARED_IP_EN_1, | ||
| 1699 | .mask = ARM_TRACE_MASK | MIPHY_DBG_MASK, | ||
| 1700 | .val = 0, | ||
| 1701 | }, { | ||
| 1702 | .reg = PAD_FUNCTION_EN_5, | ||
| 1703 | .mask = CLCD_REG4_MASK | CLCD_AND_ARM_TRACE_REG4_MASK, | ||
| 1704 | .val = 0x0, | ||
| 1705 | }, { | ||
| 1706 | .reg = PAD_FUNCTION_EN_6, | ||
| 1707 | .mask = CLCD_AND_ARM_TRACE_REG5_MASK, | ||
| 1708 | .val = 0x0, | ||
| 1709 | }, { | ||
| 1710 | .reg = PAD_FUNCTION_EN_7, | ||
| 1711 | .mask = CLCD_AND_ARM_TRACE_REG6_MASK, | ||
| 1712 | .val = 0x0, | ||
| 1713 | }, | ||
| 1714 | }; | ||
| 1715 | |||
| 1716 | static struct spear_modemux clcd_sleep_modemux[] = { | ||
| 1717 | { | ||
| 1718 | .muxregs = clcd_sleep_muxreg, | ||
| 1719 | .nmuxregs = ARRAY_SIZE(clcd_sleep_muxreg), | ||
| 1720 | }, | ||
| 1721 | }; | ||
| 1722 | |||
| 1723 | static struct spear_pingroup clcd_sleep_pingroup = { | ||
| 1724 | .name = "clcd_sleep_grp", | ||
| 1725 | .pins = clcd_pins, | ||
| 1726 | .npins = ARRAY_SIZE(clcd_pins), | ||
| 1727 | .modemuxs = clcd_sleep_modemux, | ||
| 1728 | .nmodemuxs = ARRAY_SIZE(clcd_sleep_modemux), | ||
| 1729 | }; | ||
| 1730 | |||
| 1731 | static const char *const clcd_grps[] = { "clcd_grp", "clcd_sleep_grp" }; | ||
| 1696 | static struct spear_function clcd_function = { | 1732 | static struct spear_function clcd_function = { |
| 1697 | .name = "clcd", | 1733 | .name = "clcd", |
| 1698 | .groups = clcd_grps, | 1734 | .groups = clcd_grps, |
| @@ -1893,6 +1929,7 @@ static struct spear_pingroup *spear1340_pingroups[] = { | |||
| 1893 | &sdhci_pingroup, | 1929 | &sdhci_pingroup, |
| 1894 | &cf_pingroup, | 1930 | &cf_pingroup, |
| 1895 | &xd_pingroup, | 1931 | &xd_pingroup, |
| 1932 | &clcd_sleep_pingroup, | ||
| 1896 | &clcd_pingroup, | 1933 | &clcd_pingroup, |
| 1897 | &arm_trace_pingroup, | 1934 | &arm_trace_pingroup, |
| 1898 | &miphy_dbg_pingroup, | 1935 | &miphy_dbg_pingroup, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear320.c b/drivers/pinctrl/spear/pinctrl-spear320.c index 020b1e0bdb3e..ca47b0e50780 100644 --- a/drivers/pinctrl/spear/pinctrl-spear320.c +++ b/drivers/pinctrl/spear/pinctrl-spear320.c | |||
| @@ -2240,6 +2240,10 @@ static struct spear_muxreg pwm2_pin_34_muxreg[] = { | |||
| 2240 | .mask = PMX_SSP_CS_MASK, | 2240 | .mask = PMX_SSP_CS_MASK, |
| 2241 | .val = 0, | 2241 | .val = 0, |
| 2242 | }, { | 2242 | }, { |
| 2243 | .reg = MODE_CONFIG_REG, | ||
| 2244 | .mask = PMX_PWM_MASK, | ||
| 2245 | .val = PMX_PWM_MASK, | ||
| 2246 | }, { | ||
| 2243 | .reg = IP_SEL_PAD_30_39_REG, | 2247 | .reg = IP_SEL_PAD_30_39_REG, |
| 2244 | .mask = PMX_PL_34_MASK, | 2248 | .mask = PMX_PL_34_MASK, |
| 2245 | .val = PMX_PWM2_PL_34_VAL, | 2249 | .val = PMX_PWM2_PL_34_VAL, |
| @@ -2956,9 +2960,9 @@ static struct spear_function mii2_function = { | |||
| 2956 | }; | 2960 | }; |
| 2957 | 2961 | ||
| 2958 | /* Pad multiplexing for cadence mii 1_2 as smii or rmii device */ | 2962 | /* Pad multiplexing for cadence mii 1_2 as smii or rmii device */ |
| 2959 | static const unsigned smii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, | 2963 | static const unsigned rmii0_1_pins[] = { 10, 11, 13, 14, 15, 16, 17, 18, 19, 20, |
| 2960 | 21, 22, 23, 24, 25, 26, 27 }; | 2964 | 21, 22, 23, 24, 25, 26, 27 }; |
| 2961 | static const unsigned rmii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 }; | 2965 | static const unsigned smii0_1_pins[] = { 10, 11, 21, 22, 23, 24, 25, 26, 27 }; |
| 2962 | static struct spear_muxreg mii0_1_muxreg[] = { | 2966 | static struct spear_muxreg mii0_1_muxreg[] = { |
| 2963 | { | 2967 | { |
| 2964 | .reg = PMX_CONFIG_REG, | 2968 | .reg = PMX_CONFIG_REG, |
diff --git a/drivers/pinctrl/spear/pinctrl-spear3xx.h b/drivers/pinctrl/spear/pinctrl-spear3xx.h index 31f44347f17c..7860b36053c4 100644 --- a/drivers/pinctrl/spear/pinctrl-spear3xx.h +++ b/drivers/pinctrl/spear/pinctrl-spear3xx.h | |||
| @@ -15,6 +15,7 @@ | |||
| 15 | #include "pinctrl-spear.h" | 15 | #include "pinctrl-spear.h" |
| 16 | 16 | ||
| 17 | /* pad mux declarations */ | 17 | /* pad mux declarations */ |
| 18 | #define PMX_PWM_MASK (1 << 16) | ||
| 18 | #define PMX_FIRDA_MASK (1 << 14) | 19 | #define PMX_FIRDA_MASK (1 << 14) |
| 19 | #define PMX_I2C_MASK (1 << 13) | 20 | #define PMX_I2C_MASK (1 << 13) |
| 20 | #define PMX_SSP_CS_MASK (1 << 12) | 21 | #define PMX_SSP_CS_MASK (1 << 12) |
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 5c4829cba6a6..e872c8be080e 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c | |||
| @@ -1381,22 +1381,14 @@ struct regulator *regulator_get_exclusive(struct device *dev, const char *id) | |||
| 1381 | } | 1381 | } |
| 1382 | EXPORT_SYMBOL_GPL(regulator_get_exclusive); | 1382 | EXPORT_SYMBOL_GPL(regulator_get_exclusive); |
| 1383 | 1383 | ||
| 1384 | /** | 1384 | /* Locks held by regulator_put() */ |
| 1385 | * regulator_put - "free" the regulator source | 1385 | static void _regulator_put(struct regulator *regulator) |
| 1386 | * @regulator: regulator source | ||
| 1387 | * | ||
| 1388 | * Note: drivers must ensure that all regulator_enable calls made on this | ||
| 1389 | * regulator source are balanced by regulator_disable calls prior to calling | ||
| 1390 | * this function. | ||
| 1391 | */ | ||
| 1392 | void regulator_put(struct regulator *regulator) | ||
| 1393 | { | 1386 | { |
| 1394 | struct regulator_dev *rdev; | 1387 | struct regulator_dev *rdev; |
| 1395 | 1388 | ||
| 1396 | if (regulator == NULL || IS_ERR(regulator)) | 1389 | if (regulator == NULL || IS_ERR(regulator)) |
| 1397 | return; | 1390 | return; |
| 1398 | 1391 | ||
| 1399 | mutex_lock(®ulator_list_mutex); | ||
| 1400 | rdev = regulator->rdev; | 1392 | rdev = regulator->rdev; |
| 1401 | 1393 | ||
| 1402 | debugfs_remove_recursive(regulator->debugfs); | 1394 | debugfs_remove_recursive(regulator->debugfs); |
| @@ -1412,6 +1404,20 @@ void regulator_put(struct regulator *regulator) | |||
| 1412 | rdev->exclusive = 0; | 1404 | rdev->exclusive = 0; |
| 1413 | 1405 | ||
| 1414 | module_put(rdev->owner); | 1406 | module_put(rdev->owner); |
| 1407 | } | ||
| 1408 | |||
| 1409 | /** | ||
| 1410 | * regulator_put - "free" the regulator source | ||
| 1411 | * @regulator: regulator source | ||
| 1412 | * | ||
| 1413 | * Note: drivers must ensure that all regulator_enable calls made on this | ||
| 1414 | * regulator source are balanced by regulator_disable calls prior to calling | ||
| 1415 | * this function. | ||
| 1416 | */ | ||
| 1417 | void regulator_put(struct regulator *regulator) | ||
| 1418 | { | ||
| 1419 | mutex_lock(®ulator_list_mutex); | ||
| 1420 | _regulator_put(regulator); | ||
| 1415 | mutex_unlock(®ulator_list_mutex); | 1421 | mutex_unlock(®ulator_list_mutex); |
| 1416 | } | 1422 | } |
| 1417 | EXPORT_SYMBOL_GPL(regulator_put); | 1423 | EXPORT_SYMBOL_GPL(regulator_put); |
| @@ -1974,7 +1980,7 @@ int regulator_is_supported_voltage(struct regulator *regulator, | |||
| 1974 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { | 1980 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { |
| 1975 | ret = regulator_get_voltage(regulator); | 1981 | ret = regulator_get_voltage(regulator); |
| 1976 | if (ret >= 0) | 1982 | if (ret >= 0) |
| 1977 | return (min_uV >= ret && ret <= max_uV); | 1983 | return (min_uV <= ret && ret <= max_uV); |
| 1978 | else | 1984 | else |
| 1979 | return ret; | 1985 | return ret; |
| 1980 | } | 1986 | } |
| @@ -3365,7 +3371,7 @@ regulator_register(const struct regulator_desc *regulator_desc, | |||
| 3365 | if (ret != 0) { | 3371 | if (ret != 0) { |
| 3366 | rdev_err(rdev, "Failed to request enable GPIO%d: %d\n", | 3372 | rdev_err(rdev, "Failed to request enable GPIO%d: %d\n", |
| 3367 | config->ena_gpio, ret); | 3373 | config->ena_gpio, ret); |
| 3368 | goto clean; | 3374 | goto wash; |
| 3369 | } | 3375 | } |
| 3370 | 3376 | ||
| 3371 | rdev->ena_gpio = config->ena_gpio; | 3377 | rdev->ena_gpio = config->ena_gpio; |
| @@ -3445,10 +3451,11 @@ unset_supplies: | |||
| 3445 | 3451 | ||
| 3446 | scrub: | 3452 | scrub: |
| 3447 | if (rdev->supply) | 3453 | if (rdev->supply) |
| 3448 | regulator_put(rdev->supply); | 3454 | _regulator_put(rdev->supply); |
| 3449 | if (rdev->ena_gpio) | 3455 | if (rdev->ena_gpio) |
| 3450 | gpio_free(rdev->ena_gpio); | 3456 | gpio_free(rdev->ena_gpio); |
| 3451 | kfree(rdev->constraints); | 3457 | kfree(rdev->constraints); |
| 3458 | wash: | ||
| 3452 | device_unregister(&rdev->dev); | 3459 | device_unregister(&rdev->dev); |
| 3453 | /* device core frees rdev */ | 3460 | /* device core frees rdev */ |
| 3454 | rdev = ERR_PTR(ret); | 3461 | rdev = ERR_PTR(ret); |
diff --git a/drivers/s390/cio/css.h b/drivers/s390/cio/css.h index 33bb4d891e16..4af3dfe70ef5 100644 --- a/drivers/s390/cio/css.h +++ b/drivers/s390/cio/css.h | |||
| @@ -112,9 +112,6 @@ extern int for_each_subchannel(int(*fn)(struct subchannel_id, void *), void *); | |||
| 112 | extern void css_reiterate_subchannels(void); | 112 | extern void css_reiterate_subchannels(void); |
| 113 | void css_update_ssd_info(struct subchannel *sch); | 113 | void css_update_ssd_info(struct subchannel *sch); |
| 114 | 114 | ||
| 115 | #define __MAX_SUBCHANNEL 65535 | ||
| 116 | #define __MAX_SSID 3 | ||
| 117 | |||
| 118 | struct channel_subsystem { | 115 | struct channel_subsystem { |
| 119 | u8 cssid; | 116 | u8 cssid; |
| 120 | int valid; | 117 | int valid; |
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c index fc916f5d7314..fd3143c291c6 100644 --- a/drivers/s390/cio/device.c +++ b/drivers/s390/cio/device.c | |||
| @@ -1424,7 +1424,7 @@ static enum io_sch_action sch_get_action(struct subchannel *sch) | |||
| 1424 | } | 1424 | } |
| 1425 | if (device_is_disconnected(cdev)) | 1425 | if (device_is_disconnected(cdev)) |
| 1426 | return IO_SCH_REPROBE; | 1426 | return IO_SCH_REPROBE; |
| 1427 | if (cdev->online) | 1427 | if (cdev->online && !cdev->private->flags.resuming) |
| 1428 | return IO_SCH_VERIFY; | 1428 | return IO_SCH_VERIFY; |
| 1429 | if (cdev->private->state == DEV_STATE_NOT_OPER) | 1429 | if (cdev->private->state == DEV_STATE_NOT_OPER) |
| 1430 | return IO_SCH_UNREG_ATTACH; | 1430 | return IO_SCH_UNREG_ATTACH; |
| @@ -1469,12 +1469,6 @@ static int io_subchannel_sch_event(struct subchannel *sch, int process) | |||
| 1469 | rc = 0; | 1469 | rc = 0; |
| 1470 | goto out_unlock; | 1470 | goto out_unlock; |
| 1471 | case IO_SCH_VERIFY: | 1471 | case IO_SCH_VERIFY: |
| 1472 | if (cdev->private->flags.resuming == 1) { | ||
| 1473 | if (cio_enable_subchannel(sch, (u32)(addr_t)sch)) { | ||
| 1474 | ccw_device_set_notoper(cdev); | ||
| 1475 | break; | ||
| 1476 | } | ||
| 1477 | } | ||
| 1478 | /* Trigger path verification. */ | 1472 | /* Trigger path verification. */ |
| 1479 | io_subchannel_verify(sch); | 1473 | io_subchannel_verify(sch); |
| 1480 | rc = 0; | 1474 | rc = 0; |
diff --git a/drivers/s390/cio/idset.c b/drivers/s390/cio/idset.c index 199bc6791177..65d13e38803f 100644 --- a/drivers/s390/cio/idset.c +++ b/drivers/s390/cio/idset.c | |||
| @@ -125,8 +125,7 @@ int idset_is_empty(struct idset *set) | |||
| 125 | 125 | ||
| 126 | void idset_add_set(struct idset *to, struct idset *from) | 126 | void idset_add_set(struct idset *to, struct idset *from) |
| 127 | { | 127 | { |
| 128 | int len = min(__BITOPS_WORDS(to->num_ssid * to->num_id), | 128 | int len = min(to->num_ssid * to->num_id, from->num_ssid * from->num_id); |
| 129 | __BITOPS_WORDS(from->num_ssid * from->num_id)); | ||
| 130 | 129 | ||
| 131 | bitmap_or(to->bitmap, to->bitmap, from->bitmap, len); | 130 | bitmap_or(to->bitmap, to->bitmap, from->bitmap, len); |
| 132 | } | 131 | } |
diff --git a/drivers/scsi/qlogicpti.c b/drivers/scsi/qlogicpti.c index b191dd549207..71fddbc60f18 100644 --- a/drivers/scsi/qlogicpti.c +++ b/drivers/scsi/qlogicpti.c | |||
| @@ -1294,26 +1294,19 @@ static struct scsi_host_template qpti_template = { | |||
| 1294 | static const struct of_device_id qpti_match[]; | 1294 | static const struct of_device_id qpti_match[]; |
| 1295 | static int __devinit qpti_sbus_probe(struct platform_device *op) | 1295 | static int __devinit qpti_sbus_probe(struct platform_device *op) |
| 1296 | { | 1296 | { |
| 1297 | const struct of_device_id *match; | ||
| 1298 | struct scsi_host_template *tpnt; | ||
| 1299 | struct device_node *dp = op->dev.of_node; | 1297 | struct device_node *dp = op->dev.of_node; |
| 1300 | struct Scsi_Host *host; | 1298 | struct Scsi_Host *host; |
| 1301 | struct qlogicpti *qpti; | 1299 | struct qlogicpti *qpti; |
| 1302 | static int nqptis; | 1300 | static int nqptis; |
| 1303 | const char *fcode; | 1301 | const char *fcode; |
| 1304 | 1302 | ||
| 1305 | match = of_match_device(qpti_match, &op->dev); | ||
| 1306 | if (!match) | ||
| 1307 | return -EINVAL; | ||
| 1308 | tpnt = match->data; | ||
| 1309 | |||
| 1310 | /* Sometimes Antares cards come up not completely | 1303 | /* Sometimes Antares cards come up not completely |
| 1311 | * setup, and we get a report of a zero IRQ. | 1304 | * setup, and we get a report of a zero IRQ. |
| 1312 | */ | 1305 | */ |
| 1313 | if (op->archdata.irqs[0] == 0) | 1306 | if (op->archdata.irqs[0] == 0) |
| 1314 | return -ENODEV; | 1307 | return -ENODEV; |
| 1315 | 1308 | ||
| 1316 | host = scsi_host_alloc(tpnt, sizeof(struct qlogicpti)); | 1309 | host = scsi_host_alloc(&qpti_template, sizeof(struct qlogicpti)); |
| 1317 | if (!host) | 1310 | if (!host) |
| 1318 | return -ENOMEM; | 1311 | return -ENOMEM; |
| 1319 | 1312 | ||
| @@ -1445,19 +1438,15 @@ static int __devexit qpti_sbus_remove(struct platform_device *op) | |||
| 1445 | static const struct of_device_id qpti_match[] = { | 1438 | static const struct of_device_id qpti_match[] = { |
| 1446 | { | 1439 | { |
| 1447 | .name = "ptisp", | 1440 | .name = "ptisp", |
| 1448 | .data = &qpti_template, | ||
| 1449 | }, | 1441 | }, |
| 1450 | { | 1442 | { |
| 1451 | .name = "PTI,ptisp", | 1443 | .name = "PTI,ptisp", |
| 1452 | .data = &qpti_template, | ||
| 1453 | }, | 1444 | }, |
| 1454 | { | 1445 | { |
| 1455 | .name = "QLGC,isp", | 1446 | .name = "QLGC,isp", |
| 1456 | .data = &qpti_template, | ||
| 1457 | }, | 1447 | }, |
| 1458 | { | 1448 | { |
| 1459 | .name = "SUNW,isp", | 1449 | .name = "SUNW,isp", |
| 1460 | .data = &qpti_template, | ||
| 1461 | }, | 1450 | }, |
| 1462 | {}, | 1451 | {}, |
| 1463 | }; | 1452 | }; |
diff --git a/drivers/usb/gadget/u_ether.c b/drivers/usb/gadget/u_ether.c index 6458764994ef..4ec3c0d7a18b 100644 --- a/drivers/usb/gadget/u_ether.c +++ b/drivers/usb/gadget/u_ether.c | |||
| @@ -20,6 +20,7 @@ | |||
| 20 | #include <linux/ctype.h> | 20 | #include <linux/ctype.h> |
| 21 | #include <linux/etherdevice.h> | 21 | #include <linux/etherdevice.h> |
| 22 | #include <linux/ethtool.h> | 22 | #include <linux/ethtool.h> |
| 23 | #include <linux/if_vlan.h> | ||
| 23 | 24 | ||
| 24 | #include "u_ether.h" | 25 | #include "u_ether.h" |
| 25 | 26 | ||
| @@ -295,7 +296,7 @@ static void rx_complete(struct usb_ep *ep, struct usb_request *req) | |||
| 295 | while (skb2) { | 296 | while (skb2) { |
| 296 | if (status < 0 | 297 | if (status < 0 |
| 297 | || ETH_HLEN > skb2->len | 298 | || ETH_HLEN > skb2->len |
| 298 | || skb2->len > ETH_FRAME_LEN) { | 299 | || skb2->len > VLAN_ETH_FRAME_LEN) { |
| 299 | dev->net->stats.rx_errors++; | 300 | dev->net->stats.rx_errors++; |
| 300 | dev->net->stats.rx_length_errors++; | 301 | dev->net->stats.rx_length_errors++; |
| 301 | DBG(dev, "rx length %d\n", skb2->len); | 302 | DBG(dev, "rx length %d\n", skb2->len); |
diff --git a/drivers/virtio/virtio.c b/drivers/virtio/virtio.c index 1e8659ca27ef..809b0de59c09 100644 --- a/drivers/virtio/virtio.c +++ b/drivers/virtio/virtio.c | |||
| @@ -225,8 +225,10 @@ EXPORT_SYMBOL_GPL(register_virtio_device); | |||
| 225 | 225 | ||
| 226 | void unregister_virtio_device(struct virtio_device *dev) | 226 | void unregister_virtio_device(struct virtio_device *dev) |
| 227 | { | 227 | { |
| 228 | int index = dev->index; /* save for after device release */ | ||
| 229 | |||
| 228 | device_unregister(&dev->dev); | 230 | device_unregister(&dev->dev); |
| 229 | ida_simple_remove(&virtio_index_ida, dev->index); | 231 | ida_simple_remove(&virtio_index_ida, index); |
| 230 | } | 232 | } |
| 231 | EXPORT_SYMBOL_GPL(unregister_virtio_device); | 233 | EXPORT_SYMBOL_GPL(unregister_virtio_device); |
| 232 | 234 | ||
diff --git a/drivers/xen/Makefile b/drivers/xen/Makefile index 0e8637035457..74354708c6c4 100644 --- a/drivers/xen/Makefile +++ b/drivers/xen/Makefile | |||
| @@ -2,6 +2,7 @@ ifneq ($(CONFIG_ARM),y) | |||
| 2 | obj-y += manage.o balloon.o | 2 | obj-y += manage.o balloon.o |
| 3 | obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o | 3 | obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o |
| 4 | endif | 4 | endif |
| 5 | obj-$(CONFIG_X86) += fallback.o | ||
| 5 | obj-y += grant-table.o features.o events.o | 6 | obj-y += grant-table.o features.o events.o |
| 6 | obj-y += xenbus/ | 7 | obj-y += xenbus/ |
| 7 | 8 | ||
diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 912ac81b6dbf..0be4df39e953 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c | |||
| @@ -1395,10 +1395,10 @@ void xen_evtchn_do_upcall(struct pt_regs *regs) | |||
| 1395 | { | 1395 | { |
| 1396 | struct pt_regs *old_regs = set_irq_regs(regs); | 1396 | struct pt_regs *old_regs = set_irq_regs(regs); |
| 1397 | 1397 | ||
| 1398 | irq_enter(); | ||
| 1398 | #ifdef CONFIG_X86 | 1399 | #ifdef CONFIG_X86 |
| 1399 | exit_idle(); | 1400 | exit_idle(); |
| 1400 | #endif | 1401 | #endif |
| 1401 | irq_enter(); | ||
| 1402 | 1402 | ||
| 1403 | __xen_evtchn_do_upcall(); | 1403 | __xen_evtchn_do_upcall(); |
| 1404 | 1404 | ||
diff --git a/drivers/xen/fallback.c b/drivers/xen/fallback.c new file mode 100644 index 000000000000..0ef7c4d40f86 --- /dev/null +++ b/drivers/xen/fallback.c | |||
| @@ -0,0 +1,80 @@ | |||
| 1 | #include <linux/kernel.h> | ||
| 2 | #include <linux/string.h> | ||
| 3 | #include <linux/bug.h> | ||
| 4 | #include <linux/export.h> | ||
| 5 | #include <asm/hypervisor.h> | ||
| 6 | #include <asm/xen/hypercall.h> | ||
| 7 | |||
| 8 | int xen_event_channel_op_compat(int cmd, void *arg) | ||
| 9 | { | ||
| 10 | struct evtchn_op op; | ||
| 11 | int rc; | ||
| 12 | |||
| 13 | op.cmd = cmd; | ||
| 14 | memcpy(&op.u, arg, sizeof(op.u)); | ||
| 15 | rc = _hypercall1(int, event_channel_op_compat, &op); | ||
| 16 | |||
| 17 | switch (cmd) { | ||
| 18 | case EVTCHNOP_close: | ||
| 19 | case EVTCHNOP_send: | ||
| 20 | case EVTCHNOP_bind_vcpu: | ||
| 21 | case EVTCHNOP_unmask: | ||
| 22 | /* no output */ | ||
| 23 | break; | ||
| 24 | |||
| 25 | #define COPY_BACK(eop) \ | ||
| 26 | case EVTCHNOP_##eop: \ | ||
| 27 | memcpy(arg, &op.u.eop, sizeof(op.u.eop)); \ | ||
| 28 | break | ||
| 29 | |||
| 30 | COPY_BACK(bind_interdomain); | ||
| 31 | COPY_BACK(bind_virq); | ||
| 32 | COPY_BACK(bind_pirq); | ||
| 33 | COPY_BACK(status); | ||
| 34 | COPY_BACK(alloc_unbound); | ||
| 35 | COPY_BACK(bind_ipi); | ||
| 36 | #undef COPY_BACK | ||
| 37 | |||
| 38 | default: | ||
| 39 | WARN_ON(rc != -ENOSYS); | ||
| 40 | break; | ||
| 41 | } | ||
| 42 | |||
| 43 | return rc; | ||
| 44 | } | ||
| 45 | EXPORT_SYMBOL_GPL(xen_event_channel_op_compat); | ||
| 46 | |||
| 47 | int HYPERVISOR_physdev_op_compat(int cmd, void *arg) | ||
| 48 | { | ||
| 49 | struct physdev_op op; | ||
| 50 | int rc; | ||
| 51 | |||
| 52 | op.cmd = cmd; | ||
| 53 | memcpy(&op.u, arg, sizeof(op.u)); | ||
| 54 | rc = _hypercall1(int, physdev_op_compat, &op); | ||
| 55 | |||
| 56 | switch (cmd) { | ||
| 57 | case PHYSDEVOP_IRQ_UNMASK_NOTIFY: | ||
| 58 | case PHYSDEVOP_set_iopl: | ||
| 59 | case PHYSDEVOP_set_iobitmap: | ||
| 60 | case PHYSDEVOP_apic_write: | ||
| 61 | /* no output */ | ||
| 62 | break; | ||
| 63 | |||
| 64 | #define COPY_BACK(pop, fld) \ | ||
| 65 | case PHYSDEVOP_##pop: \ | ||
| 66 | memcpy(arg, &op.u.fld, sizeof(op.u.fld)); \ | ||
| 67 | break | ||
| 68 | |||
| 69 | COPY_BACK(irq_status_query, irq_status_query); | ||
| 70 | COPY_BACK(apic_read, apic_op); | ||
| 71 | COPY_BACK(ASSIGN_VECTOR, irq_op); | ||
| 72 | #undef COPY_BACK | ||
| 73 | |||
| 74 | default: | ||
| 75 | WARN_ON(rc != -ENOSYS); | ||
| 76 | break; | ||
| 77 | } | ||
| 78 | |||
| 79 | return rc; | ||
| 80 | } | ||
