diff options
Diffstat (limited to 'drivers')
390 files changed, 5405 insertions, 6207 deletions
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h index 8e679ef5b231..a4471e3d3853 100644 --- a/drivers/acpi/acpica/acconfig.h +++ b/drivers/acpi/acpica/acconfig.h | |||
@@ -103,9 +103,9 @@ | |||
103 | 103 | ||
104 | #define ACPI_MAX_REFERENCE_COUNT 0x1000 | 104 | #define ACPI_MAX_REFERENCE_COUNT 0x1000 |
105 | 105 | ||
106 | /* Size of cached memory mapping for system memory operation region */ | 106 | /* Default page size for use in mapping memory for operation regions */ |
107 | 107 | ||
108 | #define ACPI_SYSMEM_REGION_WINDOW_SIZE 4096 | 108 | #define ACPI_DEFAULT_PAGE_SIZE 4096 /* Must be power of 2 */ |
109 | 109 | ||
110 | /* owner_id tracking. 8 entries allows for 255 owner_ids */ | 110 | /* owner_id tracking. 8 entries allows for 255 owner_ids */ |
111 | 111 | ||
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c index 3a54b737d2da..2bd83ac57c3a 100644 --- a/drivers/acpi/acpica/exregion.c +++ b/drivers/acpi/acpica/exregion.c | |||
@@ -77,7 +77,8 @@ acpi_ex_system_memory_space_handler(u32 function, | |||
77 | void *logical_addr_ptr = NULL; | 77 | void *logical_addr_ptr = NULL; |
78 | struct acpi_mem_space_context *mem_info = region_context; | 78 | struct acpi_mem_space_context *mem_info = region_context; |
79 | u32 length; | 79 | u32 length; |
80 | acpi_size window_size; | 80 | acpi_size map_length; |
81 | acpi_size page_boundary_map_length; | ||
81 | #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED | 82 | #ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED |
82 | u32 remainder; | 83 | u32 remainder; |
83 | #endif | 84 | #endif |
@@ -144,25 +145,39 @@ acpi_ex_system_memory_space_handler(u32 function, | |||
144 | } | 145 | } |
145 | 146 | ||
146 | /* | 147 | /* |
147 | * Don't attempt to map memory beyond the end of the region, and | 148 | * Attempt to map from the requested address to the end of the region. |
148 | * constrain the maximum mapping size to something reasonable. | 149 | * However, we will never map more than one page, nor will we cross |
150 | * a page boundary. | ||
149 | */ | 151 | */ |
150 | window_size = (acpi_size) | 152 | map_length = (acpi_size) |
151 | ((mem_info->address + mem_info->length) - address); | 153 | ((mem_info->address + mem_info->length) - address); |
152 | 154 | ||
153 | if (window_size > ACPI_SYSMEM_REGION_WINDOW_SIZE) { | 155 | /* |
154 | window_size = ACPI_SYSMEM_REGION_WINDOW_SIZE; | 156 | * If mapping the entire remaining portion of the region will cross |
157 | * a page boundary, just map up to the page boundary, do not cross. | ||
158 | * On some systems, crossing a page boundary while mapping regions | ||
159 | * can cause warnings if the pages have different attributes | ||
160 | * due to resource management | ||
161 | */ | ||
162 | page_boundary_map_length = | ||
163 | ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address; | ||
164 | |||
165 | if (!page_boundary_map_length) { | ||
166 | page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE; | ||
167 | } | ||
168 | |||
169 | if (map_length > page_boundary_map_length) { | ||
170 | map_length = page_boundary_map_length; | ||
155 | } | 171 | } |
156 | 172 | ||
157 | /* Create a new mapping starting at the address given */ | 173 | /* Create a new mapping starting at the address given */ |
158 | 174 | ||
159 | mem_info->mapped_logical_address = | 175 | mem_info->mapped_logical_address = acpi_os_map_memory((acpi_physical_address) address, map_length); |
160 | acpi_os_map_memory((acpi_physical_address) address, window_size); | ||
161 | if (!mem_info->mapped_logical_address) { | 176 | if (!mem_info->mapped_logical_address) { |
162 | ACPI_ERROR((AE_INFO, | 177 | ACPI_ERROR((AE_INFO, |
163 | "Could not map memory at %8.8X%8.8X, size %X", | 178 | "Could not map memory at %8.8X%8.8X, size %X", |
164 | ACPI_FORMAT_NATIVE_UINT(address), | 179 | ACPI_FORMAT_NATIVE_UINT(address), |
165 | (u32) window_size)); | 180 | (u32) map_length)); |
166 | mem_info->mapped_length = 0; | 181 | mem_info->mapped_length = 0; |
167 | return_ACPI_STATUS(AE_NO_MEMORY); | 182 | return_ACPI_STATUS(AE_NO_MEMORY); |
168 | } | 183 | } |
@@ -170,7 +185,7 @@ acpi_ex_system_memory_space_handler(u32 function, | |||
170 | /* Save the physical address and mapping size */ | 185 | /* Save the physical address and mapping size */ |
171 | 186 | ||
172 | mem_info->mapped_physical_address = address; | 187 | mem_info->mapped_physical_address = address; |
173 | mem_info->mapped_length = window_size; | 188 | mem_info->mapped_length = map_length; |
174 | } | 189 | } |
175 | 190 | ||
176 | /* | 191 | /* |
diff --git a/drivers/acpi/power_meter.c b/drivers/acpi/power_meter.c index e6bfd77986b8..2ef7030a0c28 100644 --- a/drivers/acpi/power_meter.c +++ b/drivers/acpi/power_meter.c | |||
@@ -294,7 +294,11 @@ static int set_acpi_trip(struct acpi_power_meter_resource *resource) | |||
294 | return -EINVAL; | 294 | return -EINVAL; |
295 | } | 295 | } |
296 | 296 | ||
297 | return data; | 297 | /* _PTP returns 0 on success, nonzero otherwise */ |
298 | if (data) | ||
299 | return -EINVAL; | ||
300 | |||
301 | return 0; | ||
298 | } | 302 | } |
299 | 303 | ||
300 | static ssize_t set_trip(struct device *dev, struct device_attribute *devattr, | 304 | static ssize_t set_trip(struct device *dev, struct device_attribute *devattr, |
diff --git a/drivers/acpi/proc.c b/drivers/acpi/proc.c index f8b6f555ba52..d0d25e2e1ced 100644 --- a/drivers/acpi/proc.c +++ b/drivers/acpi/proc.c | |||
@@ -393,7 +393,7 @@ acpi_system_write_wakeup_device(struct file *file, | |||
393 | struct list_head *node, *next; | 393 | struct list_head *node, *next; |
394 | char strbuf[5]; | 394 | char strbuf[5]; |
395 | char str[5] = ""; | 395 | char str[5] = ""; |
396 | int len = count; | 396 | unsigned int len = count; |
397 | struct acpi_device *found_dev = NULL; | 397 | struct acpi_device *found_dev = NULL; |
398 | 398 | ||
399 | if (len > 4) | 399 | if (len > 4) |
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c index c567b46dfa0f..ec742a4e5635 100644 --- a/drivers/acpi/processor_core.c +++ b/drivers/acpi/processor_core.c | |||
@@ -770,7 +770,7 @@ static struct notifier_block acpi_cpu_notifier = | |||
770 | .notifier_call = acpi_cpu_soft_notify, | 770 | .notifier_call = acpi_cpu_soft_notify, |
771 | }; | 771 | }; |
772 | 772 | ||
773 | static int acpi_processor_add(struct acpi_device *device) | 773 | static int __cpuinit acpi_processor_add(struct acpi_device *device) |
774 | { | 774 | { |
775 | struct acpi_processor *pr = NULL; | 775 | struct acpi_processor *pr = NULL; |
776 | int result = 0; | 776 | int result = 0; |
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c index 4c6c14c1e307..1c5d7a8b2fdf 100644 --- a/drivers/acpi/processor_throttling.c +++ b/drivers/acpi/processor_throttling.c | |||
@@ -1133,15 +1133,15 @@ int acpi_processor_get_throttling_info(struct acpi_processor *pr) | |||
1133 | int result = 0; | 1133 | int result = 0; |
1134 | struct acpi_processor_throttling *pthrottling; | 1134 | struct acpi_processor_throttling *pthrottling; |
1135 | 1135 | ||
1136 | if (!pr) | ||
1137 | return -EINVAL; | ||
1138 | |||
1136 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, | 1139 | ACPI_DEBUG_PRINT((ACPI_DB_INFO, |
1137 | "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", | 1140 | "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", |
1138 | pr->throttling.address, | 1141 | pr->throttling.address, |
1139 | pr->throttling.duty_offset, | 1142 | pr->throttling.duty_offset, |
1140 | pr->throttling.duty_width)); | 1143 | pr->throttling.duty_width)); |
1141 | 1144 | ||
1142 | if (!pr) | ||
1143 | return -EINVAL; | ||
1144 | |||
1145 | /* | 1145 | /* |
1146 | * Evaluate _PTC, _TSS and _TPC | 1146 | * Evaluate _PTC, _TSS and _TPC |
1147 | * They must all be present or none of them can be used. | 1147 | * They must all be present or none of them can be used. |
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c index a90afcc723ab..4cc1b8116e76 100644 --- a/drivers/acpi/sleep.c +++ b/drivers/acpi/sleep.c | |||
@@ -413,6 +413,30 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = { | |||
413 | }, | 413 | }, |
414 | }, | 414 | }, |
415 | { | 415 | { |
416 | .callback = init_set_sci_en_on_resume, | ||
417 | .ident = "Hewlett-Packard Pavilion dv4", | ||
418 | .matches = { | ||
419 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | ||
420 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4"), | ||
421 | }, | ||
422 | }, | ||
423 | { | ||
424 | .callback = init_set_sci_en_on_resume, | ||
425 | .ident = "Hewlett-Packard Pavilion dv7", | ||
426 | .matches = { | ||
427 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | ||
428 | DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7"), | ||
429 | }, | ||
430 | }, | ||
431 | { | ||
432 | .callback = init_set_sci_en_on_resume, | ||
433 | .ident = "Hewlett-Packard Compaq Presario CQ40 Notebook PC", | ||
434 | .matches = { | ||
435 | DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), | ||
436 | DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario CQ40 Notebook PC"), | ||
437 | }, | ||
438 | }, | ||
439 | { | ||
416 | .callback = init_old_suspend_ordering, | 440 | .callback = init_old_suspend_ordering, |
417 | .ident = "Panasonic CF51-2L", | 441 | .ident = "Panasonic CF51-2L", |
418 | .matches = { | 442 | .matches = { |
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c index 64e3c581b7a9..05dff631591c 100644 --- a/drivers/acpi/video.c +++ b/drivers/acpi/video.c | |||
@@ -1223,7 +1223,7 @@ acpi_video_device_write_state(struct file *file, | |||
1223 | u32 state = 0; | 1223 | u32 state = 0; |
1224 | 1224 | ||
1225 | 1225 | ||
1226 | if (!dev || count + 1 > sizeof str) | 1226 | if (!dev || count >= sizeof(str)) |
1227 | return -EINVAL; | 1227 | return -EINVAL; |
1228 | 1228 | ||
1229 | if (copy_from_user(str, buffer, count)) | 1229 | if (copy_from_user(str, buffer, count)) |
@@ -1280,7 +1280,7 @@ acpi_video_device_write_brightness(struct file *file, | |||
1280 | int i; | 1280 | int i; |
1281 | 1281 | ||
1282 | 1282 | ||
1283 | if (!dev || !dev->brightness || count + 1 > sizeof str) | 1283 | if (!dev || !dev->brightness || count >= sizeof(str)) |
1284 | return -EINVAL; | 1284 | return -EINVAL; |
1285 | 1285 | ||
1286 | if (copy_from_user(str, buffer, count)) | 1286 | if (copy_from_user(str, buffer, count)) |
@@ -1562,7 +1562,7 @@ acpi_video_bus_write_POST(struct file *file, | |||
1562 | unsigned long long opt, options; | 1562 | unsigned long long opt, options; |
1563 | 1563 | ||
1564 | 1564 | ||
1565 | if (!video || count + 1 > sizeof str) | 1565 | if (!video || count >= sizeof(str)) |
1566 | return -EINVAL; | 1566 | return -EINVAL; |
1567 | 1567 | ||
1568 | status = acpi_video_bus_POST_options(video, &options); | 1568 | status = acpi_video_bus_POST_options(video, &options); |
@@ -1602,7 +1602,7 @@ acpi_video_bus_write_DOS(struct file *file, | |||
1602 | unsigned long opt; | 1602 | unsigned long opt; |
1603 | 1603 | ||
1604 | 1604 | ||
1605 | if (!video || count + 1 > sizeof str) | 1605 | if (!video || count >= sizeof(str)) |
1606 | return -EINVAL; | 1606 | return -EINVAL; |
1607 | 1607 | ||
1608 | if (copy_from_user(str, buffer, count)) | 1608 | if (copy_from_user(str, buffer, count)) |
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index a06f5d6375a8..a3241a1a710b 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
@@ -2718,6 +2718,30 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev) | |||
2718 | }, | 2718 | }, |
2719 | .driver_data = "20071026", /* yyyymmdd */ | 2719 | .driver_data = "20071026", /* yyyymmdd */ |
2720 | }, | 2720 | }, |
2721 | /* | ||
2722 | * All BIOS versions for the MSI K9A2 Platinum (MS-7376) | ||
2723 | * support 64bit DMA. | ||
2724 | * | ||
2725 | * BIOS versions earlier than 1.5 had the Manufacturer DMI | ||
2726 | * fields as "MICRO-STAR INTERANTIONAL CO.,LTD". | ||
2727 | * This spelling mistake was fixed in BIOS version 1.5, so | ||
2728 | * 1.5 and later have the Manufacturer as | ||
2729 | * "MICRO-STAR INTERNATIONAL CO.,LTD". | ||
2730 | * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER". | ||
2731 | * | ||
2732 | * BIOS versions earlier than 1.9 had a Board Product Name | ||
2733 | * DMI field of "MS-7376". This was changed to be | ||
2734 | * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still | ||
2735 | * match on DMI_BOARD_NAME of "MS-7376". | ||
2736 | */ | ||
2737 | { | ||
2738 | .ident = "MSI K9A2 Platinum", | ||
2739 | .matches = { | ||
2740 | DMI_MATCH(DMI_BOARD_VENDOR, | ||
2741 | "MICRO-STAR INTER"), | ||
2742 | DMI_MATCH(DMI_BOARD_NAME, "MS-7376"), | ||
2743 | }, | ||
2744 | }, | ||
2721 | { } | 2745 | { } |
2722 | }; | 2746 | }; |
2723 | const struct dmi_system_id *match; | 2747 | const struct dmi_system_id *match; |
@@ -2729,18 +2753,24 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev) | |||
2729 | !match) | 2753 | !match) |
2730 | return false; | 2754 | return false; |
2731 | 2755 | ||
2756 | if (!match->driver_data) | ||
2757 | goto enable_64bit; | ||
2758 | |||
2732 | dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); | 2759 | dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); |
2733 | snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); | 2760 | snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); |
2734 | 2761 | ||
2735 | if (strcmp(buf, match->driver_data) >= 0) { | 2762 | if (strcmp(buf, match->driver_data) >= 0) |
2736 | dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", | 2763 | goto enable_64bit; |
2737 | match->ident); | 2764 | else { |
2738 | return true; | ||
2739 | } else { | ||
2740 | dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " | 2765 | dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " |
2741 | "forcing 32bit DMA, update BIOS\n", match->ident); | 2766 | "forcing 32bit DMA, update BIOS\n", match->ident); |
2742 | return false; | 2767 | return false; |
2743 | } | 2768 | } |
2769 | |||
2770 | enable_64bit: | ||
2771 | dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", | ||
2772 | match->ident); | ||
2773 | return true; | ||
2744 | } | 2774 | } |
2745 | 2775 | ||
2746 | static bool ahci_broken_system_poweroff(struct pci_dev *pdev) | 2776 | static bool ahci_broken_system_poweroff(struct pci_dev *pdev) |
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c index d7f0f1b1ae3e..dc72690ed5db 100644 --- a/drivers/ata/libata-core.c +++ b/drivers/ata/libata-core.c | |||
@@ -4919,10 +4919,11 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev) | |||
4919 | */ | 4919 | */ |
4920 | void ata_qc_free(struct ata_queued_cmd *qc) | 4920 | void ata_qc_free(struct ata_queued_cmd *qc) |
4921 | { | 4921 | { |
4922 | struct ata_port *ap = qc->ap; | 4922 | struct ata_port *ap; |
4923 | unsigned int tag; | 4923 | unsigned int tag; |
4924 | 4924 | ||
4925 | WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ | 4925 | WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4926 | ap = qc->ap; | ||
4926 | 4927 | ||
4927 | qc->flags = 0; | 4928 | qc->flags = 0; |
4928 | tag = qc->tag; | 4929 | tag = qc->tag; |
@@ -4934,11 +4935,13 @@ void ata_qc_free(struct ata_queued_cmd *qc) | |||
4934 | 4935 | ||
4935 | void __ata_qc_complete(struct ata_queued_cmd *qc) | 4936 | void __ata_qc_complete(struct ata_queued_cmd *qc) |
4936 | { | 4937 | { |
4937 | struct ata_port *ap = qc->ap; | 4938 | struct ata_port *ap; |
4938 | struct ata_link *link = qc->dev->link; | 4939 | struct ata_link *link; |
4939 | 4940 | ||
4940 | WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ | 4941 | WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ |
4941 | WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE)); | 4942 | WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE)); |
4943 | ap = qc->ap; | ||
4944 | link = qc->dev->link; | ||
4942 | 4945 | ||
4943 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) | 4946 | if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) |
4944 | ata_sg_clean(qc); | 4947 | ata_sg_clean(qc); |
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c index bdd43c7f432e..02efd9a83d26 100644 --- a/drivers/ata/sata_via.c +++ b/drivers/ata/sata_via.c | |||
@@ -93,7 +93,6 @@ static const struct pci_device_id svia_pci_tbl[] = { | |||
93 | { PCI_VDEVICE(VIA, 0x7372), vt6420 }, | 93 | { PCI_VDEVICE(VIA, 0x7372), vt6420 }, |
94 | { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ | 94 | { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ |
95 | { PCI_VDEVICE(VIA, 0x9000), vt8251 }, | 95 | { PCI_VDEVICE(VIA, 0x9000), vt8251 }, |
96 | { PCI_VDEVICE(VIA, 0x9040), vt8251 }, | ||
97 | 96 | ||
98 | { } /* terminate list */ | 97 | { } /* terminate list */ |
99 | }; | 98 | }; |
diff --git a/drivers/base/bus.c b/drivers/base/bus.c index 973bf2ad4e0d..63c143e54a57 100644 --- a/drivers/base/bus.c +++ b/drivers/base/bus.c | |||
@@ -689,15 +689,19 @@ int bus_add_driver(struct device_driver *drv) | |||
689 | printk(KERN_ERR "%s: driver_add_attrs(%s) failed\n", | 689 | printk(KERN_ERR "%s: driver_add_attrs(%s) failed\n", |
690 | __func__, drv->name); | 690 | __func__, drv->name); |
691 | } | 691 | } |
692 | error = add_bind_files(drv); | 692 | |
693 | if (error) { | 693 | if (!drv->suppress_bind_attrs) { |
694 | /* Ditto */ | 694 | error = add_bind_files(drv); |
695 | printk(KERN_ERR "%s: add_bind_files(%s) failed\n", | 695 | if (error) { |
696 | __func__, drv->name); | 696 | /* Ditto */ |
697 | printk(KERN_ERR "%s: add_bind_files(%s) failed\n", | ||
698 | __func__, drv->name); | ||
699 | } | ||
697 | } | 700 | } |
698 | 701 | ||
699 | kobject_uevent(&priv->kobj, KOBJ_ADD); | 702 | kobject_uevent(&priv->kobj, KOBJ_ADD); |
700 | return 0; | 703 | return 0; |
704 | |||
701 | out_unregister: | 705 | out_unregister: |
702 | kfree(drv->p); | 706 | kfree(drv->p); |
703 | drv->p = NULL; | 707 | drv->p = NULL; |
@@ -720,7 +724,8 @@ void bus_remove_driver(struct device_driver *drv) | |||
720 | if (!drv->bus) | 724 | if (!drv->bus) |
721 | return; | 725 | return; |
722 | 726 | ||
723 | remove_bind_files(drv); | 727 | if (!drv->suppress_bind_attrs) |
728 | remove_bind_files(drv); | ||
724 | driver_remove_attrs(drv->bus, drv); | 729 | driver_remove_attrs(drv->bus, drv); |
725 | driver_remove_file(drv, &driver_attr_uevent); | 730 | driver_remove_file(drv, &driver_attr_uevent); |
726 | klist_remove(&drv->p->knode_bus); | 731 | klist_remove(&drv->p->knode_bus); |
diff --git a/drivers/base/driver.c b/drivers/base/driver.c index ed2ebd3c287d..f367885a7646 100644 --- a/drivers/base/driver.c +++ b/drivers/base/driver.c | |||
@@ -236,7 +236,7 @@ int driver_register(struct device_driver *drv) | |||
236 | put_driver(other); | 236 | put_driver(other); |
237 | printk(KERN_ERR "Error: Driver '%s' is already registered, " | 237 | printk(KERN_ERR "Error: Driver '%s' is already registered, " |
238 | "aborting...\n", drv->name); | 238 | "aborting...\n", drv->name); |
239 | return -EEXIST; | 239 | return -EBUSY; |
240 | } | 240 | } |
241 | 241 | ||
242 | ret = bus_add_driver(drv); | 242 | ret = bus_add_driver(drv); |
diff --git a/drivers/base/platform.c b/drivers/base/platform.c index ed156a13aa40..4fa954b07ac4 100644 --- a/drivers/base/platform.c +++ b/drivers/base/platform.c | |||
@@ -521,11 +521,15 @@ int __init_or_module platform_driver_probe(struct platform_driver *drv, | |||
521 | { | 521 | { |
522 | int retval, code; | 522 | int retval, code; |
523 | 523 | ||
524 | /* make sure driver won't have bind/unbind attributes */ | ||
525 | drv->driver.suppress_bind_attrs = true; | ||
526 | |||
524 | /* temporary section violation during probe() */ | 527 | /* temporary section violation during probe() */ |
525 | drv->probe = probe; | 528 | drv->probe = probe; |
526 | retval = code = platform_driver_register(drv); | 529 | retval = code = platform_driver_register(drv); |
527 | 530 | ||
528 | /* Fixup that section violation, being paranoid about code scanning | 531 | /* |
532 | * Fixup that section violation, being paranoid about code scanning | ||
529 | * the list of drivers in order to probe new devices. Check to see | 533 | * the list of drivers in order to probe new devices. Check to see |
530 | * if the probe was successful, and make sure any forced probes of | 534 | * if the probe was successful, and make sure any forced probes of |
531 | * new devices fail. | 535 | * new devices fail. |
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c index e0dc4071e088..8aa2443182d5 100644 --- a/drivers/base/power/main.c +++ b/drivers/base/power/main.c | |||
@@ -511,6 +511,7 @@ static void dpm_complete(pm_message_t state) | |||
511 | 511 | ||
512 | INIT_LIST_HEAD(&list); | 512 | INIT_LIST_HEAD(&list); |
513 | mutex_lock(&dpm_list_mtx); | 513 | mutex_lock(&dpm_list_mtx); |
514 | transition_started = false; | ||
514 | while (!list_empty(&dpm_list)) { | 515 | while (!list_empty(&dpm_list)) { |
515 | struct device *dev = to_device(dpm_list.prev); | 516 | struct device *dev = to_device(dpm_list.prev); |
516 | 517 | ||
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c index 38556f6cc22d..a770498a74ec 100644 --- a/drivers/base/power/runtime.c +++ b/drivers/base/power/runtime.c | |||
@@ -51,8 +51,6 @@ static int __pm_runtime_idle(struct device *dev) | |||
51 | { | 51 | { |
52 | int retval = 0; | 52 | int retval = 0; |
53 | 53 | ||
54 | dev_dbg(dev, "__pm_runtime_idle()!\n"); | ||
55 | |||
56 | if (dev->power.runtime_error) | 54 | if (dev->power.runtime_error) |
57 | retval = -EINVAL; | 55 | retval = -EINVAL; |
58 | else if (dev->power.idle_notification) | 56 | else if (dev->power.idle_notification) |
@@ -93,8 +91,6 @@ static int __pm_runtime_idle(struct device *dev) | |||
93 | wake_up_all(&dev->power.wait_queue); | 91 | wake_up_all(&dev->power.wait_queue); |
94 | 92 | ||
95 | out: | 93 | out: |
96 | dev_dbg(dev, "__pm_runtime_idle() returns %d!\n", retval); | ||
97 | |||
98 | return retval; | 94 | return retval; |
99 | } | 95 | } |
100 | 96 | ||
diff --git a/drivers/block/loop.c b/drivers/block/loop.c index edda9ea7c626..bd112c8c7bcd 100644 --- a/drivers/block/loop.c +++ b/drivers/block/loop.c | |||
@@ -949,7 +949,7 @@ static int loop_clr_fd(struct loop_device *lo, struct block_device *bdev) | |||
949 | lo->lo_state = Lo_unbound; | 949 | lo->lo_state = Lo_unbound; |
950 | /* This is safe: open() is still holding a reference. */ | 950 | /* This is safe: open() is still holding a reference. */ |
951 | module_put(THIS_MODULE); | 951 | module_put(THIS_MODULE); |
952 | if (max_part > 0) | 952 | if (max_part > 0 && bdev) |
953 | ioctl_by_bdev(bdev, BLKRRPART, 0); | 953 | ioctl_by_bdev(bdev, BLKRRPART, 0); |
954 | mutex_unlock(&lo->lo_ctl_mutex); | 954 | mutex_unlock(&lo->lo_ctl_mutex); |
955 | /* | 955 | /* |
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c index 7ba91aa3fe8b..44bc8bbabf54 100644 --- a/drivers/bluetooth/btusb.c +++ b/drivers/bluetooth/btusb.c | |||
@@ -591,6 +591,7 @@ static int btusb_close(struct hci_dev *hdev) | |||
591 | return 0; | 591 | return 0; |
592 | 592 | ||
593 | cancel_work_sync(&data->work); | 593 | cancel_work_sync(&data->work); |
594 | cancel_work_sync(&data->waker); | ||
594 | 595 | ||
595 | clear_bit(BTUSB_ISOC_RUNNING, &data->flags); | 596 | clear_bit(BTUSB_ISOC_RUNNING, &data->flags); |
596 | clear_bit(BTUSB_BULK_RUNNING, &data->flags); | 597 | clear_bit(BTUSB_BULK_RUNNING, &data->flags); |
@@ -599,11 +600,13 @@ static int btusb_close(struct hci_dev *hdev) | |||
599 | btusb_stop_traffic(data); | 600 | btusb_stop_traffic(data); |
600 | err = usb_autopm_get_interface(data->intf); | 601 | err = usb_autopm_get_interface(data->intf); |
601 | if (err < 0) | 602 | if (err < 0) |
602 | return 0; | 603 | goto failed; |
603 | 604 | ||
604 | data->intf->needs_remote_wakeup = 0; | 605 | data->intf->needs_remote_wakeup = 0; |
605 | usb_autopm_put_interface(data->intf); | 606 | usb_autopm_put_interface(data->intf); |
606 | 607 | ||
608 | failed: | ||
609 | usb_scuttle_anchored_urbs(&data->deferred); | ||
607 | return 0; | 610 | return 0; |
608 | } | 611 | } |
609 | 612 | ||
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 08a6f50ae791..6aad99ec4e0f 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig | |||
@@ -323,7 +323,7 @@ config SPECIALIX | |||
323 | 323 | ||
324 | config SX | 324 | config SX |
325 | tristate "Specialix SX (and SI) card support" | 325 | tristate "Specialix SX (and SI) card support" |
326 | depends on SERIAL_NONSTANDARD && (PCI || EISA || ISA) | 326 | depends on SERIAL_NONSTANDARD && (PCI || EISA || ISA) && BROKEN |
327 | help | 327 | help |
328 | This is a driver for the SX and SI multiport serial cards. | 328 | This is a driver for the SX and SI multiport serial cards. |
329 | Please read the file <file:Documentation/serial/sx.txt> for details. | 329 | Please read the file <file:Documentation/serial/sx.txt> for details. |
@@ -334,7 +334,7 @@ config SX | |||
334 | 334 | ||
335 | config RIO | 335 | config RIO |
336 | tristate "Specialix RIO system support" | 336 | tristate "Specialix RIO system support" |
337 | depends on SERIAL_NONSTANDARD | 337 | depends on SERIAL_NONSTANDARD && BROKEN |
338 | help | 338 | help |
339 | This is a driver for the Specialix RIO, a smart serial card which | 339 | This is a driver for the Specialix RIO, a smart serial card which |
340 | drives an outboard box that can support up to 128 ports. Product | 340 | drives an outboard box that can support up to 128 ports. Product |
@@ -395,7 +395,7 @@ config NOZOMI | |||
395 | 395 | ||
396 | config A2232 | 396 | config A2232 |
397 | tristate "Commodore A2232 serial support (EXPERIMENTAL)" | 397 | tristate "Commodore A2232 serial support (EXPERIMENTAL)" |
398 | depends on EXPERIMENTAL && ZORRO && BROKEN_ON_SMP | 398 | depends on EXPERIMENTAL && ZORRO && BROKEN |
399 | ---help--- | 399 | ---help--- |
400 | This option supports the 2232 7-port serial card shipped with the | 400 | This option supports the 2232 7-port serial card shipped with the |
401 | Amiga 2000 and other Zorro-bus machines, dating from 1989. At | 401 | Amiga 2000 and other Zorro-bus machines, dating from 1989. At |
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c index 4068467ce7b9..10e1f0390bbb 100644 --- a/drivers/char/agp/intel-agp.c +++ b/drivers/char/agp/intel-agp.c | |||
@@ -1161,12 +1161,6 @@ static int intel_i915_configure(void) | |||
1161 | 1161 | ||
1162 | intel_i9xx_setup_flush(); | 1162 | intel_i9xx_setup_flush(); |
1163 | 1163 | ||
1164 | #ifdef USE_PCI_DMA_API | ||
1165 | if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36))) | ||
1166 | dev_err(&intel_private.pcidev->dev, | ||
1167 | "set gfx device dma mask 36bit failed!\n"); | ||
1168 | #endif | ||
1169 | |||
1170 | return 0; | 1164 | return 0; |
1171 | } | 1165 | } |
1172 | 1166 | ||
@@ -2456,6 +2450,11 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev, | |||
2456 | &bridge->mode); | 2450 | &bridge->mode); |
2457 | } | 2451 | } |
2458 | 2452 | ||
2453 | if (bridge->driver->mask_memory == intel_i965_mask_memory) | ||
2454 | if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36))) | ||
2455 | dev_err(&intel_private.pcidev->dev, | ||
2456 | "set gfx device dma mask 36bit failed!\n"); | ||
2457 | |||
2459 | pci_set_drvdata(pdev, bridge); | 2458 | pci_set_drvdata(pdev, bridge); |
2460 | return agp_add_bridge(bridge); | 2459 | return agp_add_bridge(bridge); |
2461 | } | 2460 | } |
diff --git a/drivers/char/hvc_xen.c b/drivers/char/hvc_xen.c index eba999f8598d..a6ee32b599a8 100644 --- a/drivers/char/hvc_xen.c +++ b/drivers/char/hvc_xen.c | |||
@@ -55,7 +55,7 @@ static inline void notify_daemon(void) | |||
55 | notify_remote_via_evtchn(xen_start_info->console.domU.evtchn); | 55 | notify_remote_via_evtchn(xen_start_info->console.domU.evtchn); |
56 | } | 56 | } |
57 | 57 | ||
58 | static int write_console(uint32_t vtermno, const char *data, int len) | 58 | static int __write_console(const char *data, int len) |
59 | { | 59 | { |
60 | struct xencons_interface *intf = xencons_interface(); | 60 | struct xencons_interface *intf = xencons_interface(); |
61 | XENCONS_RING_IDX cons, prod; | 61 | XENCONS_RING_IDX cons, prod; |
@@ -76,6 +76,29 @@ static int write_console(uint32_t vtermno, const char *data, int len) | |||
76 | return sent; | 76 | return sent; |
77 | } | 77 | } |
78 | 78 | ||
79 | static int write_console(uint32_t vtermno, const char *data, int len) | ||
80 | { | ||
81 | int ret = len; | ||
82 | |||
83 | /* | ||
84 | * Make sure the whole buffer is emitted, polling if | ||
85 | * necessary. We don't ever want to rely on the hvc daemon | ||
86 | * because the most interesting console output is when the | ||
87 | * kernel is crippled. | ||
88 | */ | ||
89 | while (len) { | ||
90 | int sent = __write_console(data, len); | ||
91 | |||
92 | data += sent; | ||
93 | len -= sent; | ||
94 | |||
95 | if (unlikely(len)) | ||
96 | HYPERVISOR_sched_op(SCHEDOP_yield, NULL); | ||
97 | } | ||
98 | |||
99 | return ret; | ||
100 | } | ||
101 | |||
79 | static int read_console(uint32_t vtermno, char *buf, int len) | 102 | static int read_console(uint32_t vtermno, char *buf, int len) |
80 | { | 103 | { |
81 | struct xencons_interface *intf = xencons_interface(); | 104 | struct xencons_interface *intf = xencons_interface(); |
diff --git a/drivers/char/tty_port.c b/drivers/char/tty_port.c index a4bbb28f10be..2e8552dc5eda 100644 --- a/drivers/char/tty_port.c +++ b/drivers/char/tty_port.c | |||
@@ -221,6 +221,9 @@ int tty_port_block_til_ready(struct tty_port *port, | |||
221 | the port has just hung up or is in another error state */ | 221 | the port has just hung up or is in another error state */ |
222 | if ((filp->f_flags & O_NONBLOCK) || | 222 | if ((filp->f_flags & O_NONBLOCK) || |
223 | (tty->flags & (1 << TTY_IO_ERROR))) { | 223 | (tty->flags & (1 << TTY_IO_ERROR))) { |
224 | /* Indicate we are open */ | ||
225 | if (tty->termios->c_cflag & CBAUD) | ||
226 | tty_port_raise_dtr_rts(port); | ||
224 | port->flags |= ASYNC_NORMAL_ACTIVE; | 227 | port->flags |= ASYNC_NORMAL_ACTIVE; |
225 | return 0; | 228 | return 0; |
226 | } | 229 | } |
diff --git a/drivers/char/vt_ioctl.c b/drivers/char/vt_ioctl.c index ed86d3bf249a..6aa10284104a 100644 --- a/drivers/char/vt_ioctl.c +++ b/drivers/char/vt_ioctl.c | |||
@@ -103,8 +103,8 @@ void vt_event_post(unsigned int event, unsigned int old, unsigned int new) | |||
103 | ve->event.event = event; | 103 | ve->event.event = event; |
104 | /* kernel view is consoles 0..n-1, user space view is | 104 | /* kernel view is consoles 0..n-1, user space view is |
105 | console 1..n with 0 meaning current, so we must bias */ | 105 | console 1..n with 0 meaning current, so we must bias */ |
106 | ve->event.old = old + 1; | 106 | ve->event.oldev = old + 1; |
107 | ve->event.new = new + 1; | 107 | ve->event.newev = new + 1; |
108 | wake = 1; | 108 | wake = 1; |
109 | ve->done = 1; | 109 | ve->done = 1; |
110 | } | 110 | } |
@@ -186,7 +186,7 @@ int vt_waitactive(int n) | |||
186 | vt_event_wait(&vw); | 186 | vt_event_wait(&vw); |
187 | if (vw.done == 0) | 187 | if (vw.done == 0) |
188 | return -EINTR; | 188 | return -EINTR; |
189 | } while (vw.event.new != n); | 189 | } while (vw.event.newev != n); |
190 | return 0; | 190 | return 0; |
191 | } | 191 | } |
192 | 192 | ||
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c index 3938c7817095..ff57c40e9b8b 100644 --- a/drivers/cpufreq/cpufreq.c +++ b/drivers/cpufreq/cpufreq.c | |||
@@ -41,7 +41,7 @@ static struct cpufreq_driver *cpufreq_driver; | |||
41 | static DEFINE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_data); | 41 | static DEFINE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_data); |
42 | #ifdef CONFIG_HOTPLUG_CPU | 42 | #ifdef CONFIG_HOTPLUG_CPU |
43 | /* This one keeps track of the previously set governor of a removed CPU */ | 43 | /* This one keeps track of the previously set governor of a removed CPU */ |
44 | static DEFINE_PER_CPU(struct cpufreq_governor *, cpufreq_cpu_governor); | 44 | static DEFINE_PER_CPU(char[CPUFREQ_NAME_LEN], cpufreq_cpu_governor); |
45 | #endif | 45 | #endif |
46 | static DEFINE_SPINLOCK(cpufreq_driver_lock); | 46 | static DEFINE_SPINLOCK(cpufreq_driver_lock); |
47 | 47 | ||
@@ -774,10 +774,12 @@ int cpufreq_add_dev_policy(unsigned int cpu, struct cpufreq_policy *policy, | |||
774 | #ifdef CONFIG_SMP | 774 | #ifdef CONFIG_SMP |
775 | unsigned long flags; | 775 | unsigned long flags; |
776 | unsigned int j; | 776 | unsigned int j; |
777 | |||
778 | #ifdef CONFIG_HOTPLUG_CPU | 777 | #ifdef CONFIG_HOTPLUG_CPU |
779 | if (per_cpu(cpufreq_cpu_governor, cpu)) { | 778 | struct cpufreq_governor *gov; |
780 | policy->governor = per_cpu(cpufreq_cpu_governor, cpu); | 779 | |
780 | gov = __find_governor(per_cpu(cpufreq_cpu_governor, cpu)); | ||
781 | if (gov) { | ||
782 | policy->governor = gov; | ||
781 | dprintk("Restoring governor %s for cpu %d\n", | 783 | dprintk("Restoring governor %s for cpu %d\n", |
782 | policy->governor->name, cpu); | 784 | policy->governor->name, cpu); |
783 | } | 785 | } |
@@ -949,10 +951,13 @@ err_out_kobj_put: | |||
949 | static int cpufreq_add_dev(struct sys_device *sys_dev) | 951 | static int cpufreq_add_dev(struct sys_device *sys_dev) |
950 | { | 952 | { |
951 | unsigned int cpu = sys_dev->id; | 953 | unsigned int cpu = sys_dev->id; |
952 | int ret = 0; | 954 | int ret = 0, found = 0; |
953 | struct cpufreq_policy *policy; | 955 | struct cpufreq_policy *policy; |
954 | unsigned long flags; | 956 | unsigned long flags; |
955 | unsigned int j; | 957 | unsigned int j; |
958 | #ifdef CONFIG_HOTPLUG_CPU | ||
959 | int sibling; | ||
960 | #endif | ||
956 | 961 | ||
957 | if (cpu_is_offline(cpu)) | 962 | if (cpu_is_offline(cpu)) |
958 | return 0; | 963 | return 0; |
@@ -999,7 +1004,19 @@ static int cpufreq_add_dev(struct sys_device *sys_dev) | |||
999 | INIT_WORK(&policy->update, handle_update); | 1004 | INIT_WORK(&policy->update, handle_update); |
1000 | 1005 | ||
1001 | /* Set governor before ->init, so that driver could check it */ | 1006 | /* Set governor before ->init, so that driver could check it */ |
1002 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | 1007 | #ifdef CONFIG_HOTPLUG_CPU |
1008 | for_each_online_cpu(sibling) { | ||
1009 | struct cpufreq_policy *cp = per_cpu(cpufreq_cpu_data, sibling); | ||
1010 | if (cp && cp->governor && | ||
1011 | (cpumask_test_cpu(cpu, cp->related_cpus))) { | ||
1012 | policy->governor = cp->governor; | ||
1013 | found = 1; | ||
1014 | break; | ||
1015 | } | ||
1016 | } | ||
1017 | #endif | ||
1018 | if (!found) | ||
1019 | policy->governor = CPUFREQ_DEFAULT_GOVERNOR; | ||
1003 | /* call driver. From then on the cpufreq must be able | 1020 | /* call driver. From then on the cpufreq must be able |
1004 | * to accept all calls to ->verify and ->setpolicy for this CPU | 1021 | * to accept all calls to ->verify and ->setpolicy for this CPU |
1005 | */ | 1022 | */ |
@@ -1111,7 +1128,8 @@ static int __cpufreq_remove_dev(struct sys_device *sys_dev) | |||
1111 | #ifdef CONFIG_SMP | 1128 | #ifdef CONFIG_SMP |
1112 | 1129 | ||
1113 | #ifdef CONFIG_HOTPLUG_CPU | 1130 | #ifdef CONFIG_HOTPLUG_CPU |
1114 | per_cpu(cpufreq_cpu_governor, cpu) = data->governor; | 1131 | strncpy(per_cpu(cpufreq_cpu_governor, cpu), data->governor->name, |
1132 | CPUFREQ_NAME_LEN); | ||
1115 | #endif | 1133 | #endif |
1116 | 1134 | ||
1117 | /* if we have other CPUs still registered, we need to unlink them, | 1135 | /* if we have other CPUs still registered, we need to unlink them, |
@@ -1135,7 +1153,8 @@ static int __cpufreq_remove_dev(struct sys_device *sys_dev) | |||
1135 | continue; | 1153 | continue; |
1136 | dprintk("removing link for cpu %u\n", j); | 1154 | dprintk("removing link for cpu %u\n", j); |
1137 | #ifdef CONFIG_HOTPLUG_CPU | 1155 | #ifdef CONFIG_HOTPLUG_CPU |
1138 | per_cpu(cpufreq_cpu_governor, j) = data->governor; | 1156 | strncpy(per_cpu(cpufreq_cpu_governor, j), |
1157 | data->governor->name, CPUFREQ_NAME_LEN); | ||
1139 | #endif | 1158 | #endif |
1140 | cpu_sys_dev = get_cpu_sysdev(j); | 1159 | cpu_sys_dev = get_cpu_sysdev(j); |
1141 | sysfs_remove_link(&cpu_sys_dev->kobj, "cpufreq"); | 1160 | sysfs_remove_link(&cpu_sys_dev->kobj, "cpufreq"); |
@@ -1606,9 +1625,22 @@ EXPORT_SYMBOL_GPL(cpufreq_register_governor); | |||
1606 | 1625 | ||
1607 | void cpufreq_unregister_governor(struct cpufreq_governor *governor) | 1626 | void cpufreq_unregister_governor(struct cpufreq_governor *governor) |
1608 | { | 1627 | { |
1628 | #ifdef CONFIG_HOTPLUG_CPU | ||
1629 | int cpu; | ||
1630 | #endif | ||
1631 | |||
1609 | if (!governor) | 1632 | if (!governor) |
1610 | return; | 1633 | return; |
1611 | 1634 | ||
1635 | #ifdef CONFIG_HOTPLUG_CPU | ||
1636 | for_each_present_cpu(cpu) { | ||
1637 | if (cpu_online(cpu)) | ||
1638 | continue; | ||
1639 | if (!strcmp(per_cpu(cpufreq_cpu_governor, cpu), governor->name)) | ||
1640 | strcpy(per_cpu(cpufreq_cpu_governor, cpu), "\0"); | ||
1641 | } | ||
1642 | #endif | ||
1643 | |||
1612 | mutex_lock(&cpufreq_governor_mutex); | 1644 | mutex_lock(&cpufreq_governor_mutex); |
1613 | list_del(&governor->governor_list); | 1645 | list_del(&governor->governor_list); |
1614 | mutex_unlock(&cpufreq_governor_mutex); | 1646 | mutex_unlock(&cpufreq_governor_mutex); |
diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c index bc33ddc9c97c..c7b081b839ff 100644 --- a/drivers/cpufreq/cpufreq_conservative.c +++ b/drivers/cpufreq/cpufreq_conservative.c | |||
@@ -116,9 +116,9 @@ static inline cputime64_t get_cpu_idle_time_jiffy(unsigned int cpu, | |||
116 | 116 | ||
117 | idle_time = cputime64_sub(cur_wall_time, busy_time); | 117 | idle_time = cputime64_sub(cur_wall_time, busy_time); |
118 | if (wall) | 118 | if (wall) |
119 | *wall = cur_wall_time; | 119 | *wall = (cputime64_t)jiffies_to_usecs(cur_wall_time); |
120 | 120 | ||
121 | return idle_time; | 121 | return (cputime64_t)jiffies_to_usecs(idle_time);; |
122 | } | 122 | } |
123 | 123 | ||
124 | static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) | 124 | static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) |
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c index 071699de50ee..4b34ade2332b 100644 --- a/drivers/cpufreq/cpufreq_ondemand.c +++ b/drivers/cpufreq/cpufreq_ondemand.c | |||
@@ -133,9 +133,9 @@ static inline cputime64_t get_cpu_idle_time_jiffy(unsigned int cpu, | |||
133 | 133 | ||
134 | idle_time = cputime64_sub(cur_wall_time, busy_time); | 134 | idle_time = cputime64_sub(cur_wall_time, busy_time); |
135 | if (wall) | 135 | if (wall) |
136 | *wall = cur_wall_time; | 136 | *wall = (cputime64_t)jiffies_to_usecs(cur_wall_time); |
137 | 137 | ||
138 | return idle_time; | 138 | return (cputime64_t)jiffies_to_usecs(idle_time); |
139 | } | 139 | } |
140 | 140 | ||
141 | static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) | 141 | static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) |
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c index ad41f19b8e3f..12fdd3987a36 100644 --- a/drivers/cpuidle/cpuidle.c +++ b/drivers/cpuidle/cpuidle.c | |||
@@ -76,8 +76,11 @@ static void cpuidle_idle_call(void) | |||
76 | #endif | 76 | #endif |
77 | /* ask the governor for the next state */ | 77 | /* ask the governor for the next state */ |
78 | next_state = cpuidle_curr_governor->select(dev); | 78 | next_state = cpuidle_curr_governor->select(dev); |
79 | if (need_resched()) | 79 | if (need_resched()) { |
80 | local_irq_enable(); | ||
80 | return; | 81 | return; |
82 | } | ||
83 | |||
81 | target_state = &dev->states[next_state]; | 84 | target_state = &dev->states[next_state]; |
82 | 85 | ||
83 | /* enter the state and update stats */ | 86 | /* enter the state and update stats */ |
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index d4560d9d5a83..a38831c82649 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
@@ -2254,7 +2254,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci, | |||
2254 | { | 2254 | { |
2255 | u32 ec = ERROR_CODE(info->nbsl); | 2255 | u32 ec = ERROR_CODE(info->nbsl); |
2256 | u32 xec = EXT_ERROR_CODE(info->nbsl); | 2256 | u32 xec = EXT_ERROR_CODE(info->nbsl); |
2257 | int ecc_type = info->nbsh & (0x3 << 13); | 2257 | int ecc_type = (info->nbsh >> 13) & 0x3; |
2258 | 2258 | ||
2259 | /* Bail early out if this was an 'observed' error */ | 2259 | /* Bail early out if this was an 'observed' error */ |
2260 | if (PP(ec) == K8_NBSL_PP_OBS) | 2260 | if (PP(ec) == K8_NBSL_PP_OBS) |
@@ -3163,7 +3163,7 @@ static int __init amd64_edac_init(void) | |||
3163 | opstate_init(); | 3163 | opstate_init(); |
3164 | 3164 | ||
3165 | if (cache_k8_northbridges() < 0) | 3165 | if (cache_k8_northbridges() < 0) |
3166 | goto err_exit; | 3166 | return err; |
3167 | 3167 | ||
3168 | err = pci_register_driver(&amd64_pci_driver); | 3168 | err = pci_register_driver(&amd64_pci_driver); |
3169 | if (err) | 3169 | if (err) |
@@ -3189,8 +3189,6 @@ static int __init amd64_edac_init(void) | |||
3189 | 3189 | ||
3190 | err_2nd_stage: | 3190 | err_2nd_stage: |
3191 | debugf0("2nd stage failed\n"); | 3191 | debugf0("2nd stage failed\n"); |
3192 | |||
3193 | err_exit: | ||
3194 | pci_unregister_driver(&amd64_pci_driver); | 3192 | pci_unregister_driver(&amd64_pci_driver); |
3195 | 3193 | ||
3196 | return err; | 3194 | return err; |
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c index d335086f4a26..77a9579d7167 100644 --- a/drivers/edac/i5000_edac.c +++ b/drivers/edac/i5000_edac.c | |||
@@ -1173,7 +1173,7 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci) | |||
1173 | pci_read_config_word(pvt->branch_1, where, | 1173 | pci_read_config_word(pvt->branch_1, where, |
1174 | &pvt->b1_mtr[slot_row]); | 1174 | &pvt->b1_mtr[slot_row]); |
1175 | debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row, | 1175 | debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row, |
1176 | where, pvt->b0_mtr[slot_row]); | 1176 | where, pvt->b1_mtr[slot_row]); |
1177 | } else { | 1177 | } else { |
1178 | pvt->b1_mtr[slot_row] = 0; | 1178 | pvt->b1_mtr[slot_row] = 0; |
1179 | } | 1179 | } |
@@ -1232,7 +1232,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) | |||
1232 | struct csrow_info *p_csrow; | 1232 | struct csrow_info *p_csrow; |
1233 | int empty, channel_count; | 1233 | int empty, channel_count; |
1234 | int max_csrows; | 1234 | int max_csrows; |
1235 | int mtr; | 1235 | int mtr, mtr1; |
1236 | int csrow_megs; | 1236 | int csrow_megs; |
1237 | int channel; | 1237 | int channel; |
1238 | int csrow; | 1238 | int csrow; |
@@ -1251,9 +1251,10 @@ static int i5000_init_csrows(struct mem_ctl_info *mci) | |||
1251 | 1251 | ||
1252 | /* use branch 0 for the basis */ | 1252 | /* use branch 0 for the basis */ |
1253 | mtr = pvt->b0_mtr[csrow >> 1]; | 1253 | mtr = pvt->b0_mtr[csrow >> 1]; |
1254 | mtr1 = pvt->b1_mtr[csrow >> 1]; | ||
1254 | 1255 | ||
1255 | /* if no DIMMS on this row, continue */ | 1256 | /* if no DIMMS on this row, continue */ |
1256 | if (!MTR_DIMMS_PRESENT(mtr)) | 1257 | if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1)) |
1257 | continue; | 1258 | continue; |
1258 | 1259 | ||
1259 | /* FAKE OUT VALUES, FIXME */ | 1260 | /* FAKE OUT VALUES, FIXME */ |
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c index b08b6d8e2dc7..f99d10655ed4 100644 --- a/drivers/edac/i5400_edac.c +++ b/drivers/edac/i5400_edac.c | |||
@@ -46,9 +46,10 @@ | |||
46 | /* Limits for i5400 */ | 46 | /* Limits for i5400 */ |
47 | #define NUM_MTRS_PER_BRANCH 4 | 47 | #define NUM_MTRS_PER_BRANCH 4 |
48 | #define CHANNELS_PER_BRANCH 2 | 48 | #define CHANNELS_PER_BRANCH 2 |
49 | #define MAX_DIMMS_PER_CHANNEL NUM_MTRS_PER_BRANCH | ||
49 | #define MAX_CHANNELS 4 | 50 | #define MAX_CHANNELS 4 |
50 | #define MAX_DIMMS (MAX_CHANNELS * 4) /* Up to 4 DIMM's per channel */ | 51 | /* max possible csrows per channel */ |
51 | #define MAX_CSROWS (MAX_DIMMS * 2) /* max possible csrows per channel */ | 52 | #define MAX_CSROWS (MAX_DIMMS_PER_CHANNEL) |
52 | 53 | ||
53 | /* Device 16, | 54 | /* Device 16, |
54 | * Function 0: System Address | 55 | * Function 0: System Address |
@@ -331,7 +332,6 @@ static const struct i5400_dev_info i5400_devs[] = { | |||
331 | 332 | ||
332 | struct i5400_dimm_info { | 333 | struct i5400_dimm_info { |
333 | int megabytes; /* size, 0 means not present */ | 334 | int megabytes; /* size, 0 means not present */ |
334 | int dual_rank; | ||
335 | }; | 335 | }; |
336 | 336 | ||
337 | /* driver private data structure */ | 337 | /* driver private data structure */ |
@@ -849,11 +849,9 @@ static int determine_mtr(struct i5400_pvt *pvt, int csrow, int channel) | |||
849 | int n; | 849 | int n; |
850 | 850 | ||
851 | /* There is one MTR for each slot pair of FB-DIMMs, | 851 | /* There is one MTR for each slot pair of FB-DIMMs, |
852 | Each slot may have one or two ranks (2 csrows), | ||
853 | Each slot pair may be at branch 0 or branch 1. | 852 | Each slot pair may be at branch 0 or branch 1. |
854 | So, csrow should be divided by eight | ||
855 | */ | 853 | */ |
856 | n = csrow >> 3; | 854 | n = csrow; |
857 | 855 | ||
858 | if (n >= NUM_MTRS_PER_BRANCH) { | 856 | if (n >= NUM_MTRS_PER_BRANCH) { |
859 | debugf0("ERROR: trying to access an invalid csrow: %d\n", | 857 | debugf0("ERROR: trying to access an invalid csrow: %d\n", |
@@ -905,25 +903,22 @@ static void handle_channel(struct i5400_pvt *pvt, int csrow, int channel, | |||
905 | amb_present_reg = determine_amb_present_reg(pvt, channel); | 903 | amb_present_reg = determine_amb_present_reg(pvt, channel); |
906 | 904 | ||
907 | /* Determine if there is a DIMM present in this DIMM slot */ | 905 | /* Determine if there is a DIMM present in this DIMM slot */ |
908 | if (amb_present_reg & (1 << (csrow >> 1))) { | 906 | if (amb_present_reg & (1 << csrow)) { |
909 | dinfo->dual_rank = MTR_DIMM_RANK(mtr); | 907 | /* Start with the number of bits for a Bank |
910 | 908 | * on the DRAM */ | |
911 | if (!((dinfo->dual_rank == 0) && | 909 | addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr); |
912 | ((csrow & 0x1) == 0x1))) { | 910 | /* Add thenumber of ROW bits */ |
913 | /* Start with the number of bits for a Bank | 911 | addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr); |
914 | * on the DRAM */ | 912 | /* add the number of COLUMN bits */ |
915 | addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr); | 913 | addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr); |
916 | /* Add thenumber of ROW bits */ | 914 | /* add the number of RANK bits */ |
917 | addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr); | 915 | addrBits += MTR_DIMM_RANK(mtr); |
918 | /* add the number of COLUMN bits */ | 916 | |
919 | addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr); | 917 | addrBits += 6; /* add 64 bits per DIMM */ |
920 | 918 | addrBits -= 20; /* divide by 2^^20 */ | |
921 | addrBits += 6; /* add 64 bits per DIMM */ | 919 | addrBits -= 3; /* 8 bits per bytes */ |
922 | addrBits -= 20; /* divide by 2^^20 */ | 920 | |
923 | addrBits -= 3; /* 8 bits per bytes */ | 921 | dinfo->megabytes = 1 << addrBits; |
924 | |||
925 | dinfo->megabytes = 1 << addrBits; | ||
926 | } | ||
927 | } | 922 | } |
928 | } | 923 | } |
929 | } | 924 | } |
@@ -951,12 +946,12 @@ static void calculate_dimm_size(struct i5400_pvt *pvt) | |||
951 | return; | 946 | return; |
952 | } | 947 | } |
953 | 948 | ||
954 | /* Scan all the actual CSROWS (which is # of DIMMS * 2) | 949 | /* Scan all the actual CSROWS |
955 | * and calculate the information for each DIMM | 950 | * and calculate the information for each DIMM |
956 | * Start with the highest csrow first, to display it first | 951 | * Start with the highest csrow first, to display it first |
957 | * and work toward the 0th csrow | 952 | * and work toward the 0th csrow |
958 | */ | 953 | */ |
959 | max_csrows = pvt->maxdimmperch * 2; | 954 | max_csrows = pvt->maxdimmperch; |
960 | for (csrow = max_csrows - 1; csrow >= 0; csrow--) { | 955 | for (csrow = max_csrows - 1; csrow >= 0; csrow--) { |
961 | 956 | ||
962 | /* on an odd csrow, first output a 'boundary' marker, | 957 | /* on an odd csrow, first output a 'boundary' marker, |
@@ -1064,7 +1059,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci) | |||
1064 | 1059 | ||
1065 | /* Get the set of MTR[0-3] regs by each branch */ | 1060 | /* Get the set of MTR[0-3] regs by each branch */ |
1066 | for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) { | 1061 | for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) { |
1067 | int where = MTR0 + (slot_row * sizeof(u32)); | 1062 | int where = MTR0 + (slot_row * sizeof(u16)); |
1068 | 1063 | ||
1069 | /* Branch 0 set of MTR registers */ | 1064 | /* Branch 0 set of MTR registers */ |
1070 | pci_read_config_word(pvt->branch_0, where, | 1065 | pci_read_config_word(pvt->branch_0, where, |
@@ -1146,7 +1141,7 @@ static int i5400_init_csrows(struct mem_ctl_info *mci) | |||
1146 | pvt = mci->pvt_info; | 1141 | pvt = mci->pvt_info; |
1147 | 1142 | ||
1148 | channel_count = pvt->maxch; | 1143 | channel_count = pvt->maxch; |
1149 | max_csrows = pvt->maxdimmperch * 2; | 1144 | max_csrows = pvt->maxdimmperch; |
1150 | 1145 | ||
1151 | empty = 1; /* Assume NO memory */ | 1146 | empty = 1; /* Assume NO memory */ |
1152 | 1147 | ||
@@ -1215,28 +1210,6 @@ static void i5400_enable_error_reporting(struct mem_ctl_info *mci) | |||
1215 | } | 1210 | } |
1216 | 1211 | ||
1217 | /* | 1212 | /* |
1218 | * i5400_get_dimm_and_channel_counts(pdev, &num_csrows, &num_channels) | ||
1219 | * | ||
1220 | * ask the device how many channels are present and how many CSROWS | ||
1221 | * as well | ||
1222 | */ | ||
1223 | static void i5400_get_dimm_and_channel_counts(struct pci_dev *pdev, | ||
1224 | int *num_dimms_per_channel, | ||
1225 | int *num_channels) | ||
1226 | { | ||
1227 | u8 value; | ||
1228 | |||
1229 | /* Need to retrieve just how many channels and dimms per channel are | ||
1230 | * supported on this memory controller | ||
1231 | */ | ||
1232 | pci_read_config_byte(pdev, MAXDIMMPERCH, &value); | ||
1233 | *num_dimms_per_channel = (int)value * 2; | ||
1234 | |||
1235 | pci_read_config_byte(pdev, MAXCH, &value); | ||
1236 | *num_channels = (int)value; | ||
1237 | } | ||
1238 | |||
1239 | /* | ||
1240 | * i5400_probe1 Probe for ONE instance of device to see if it is | 1213 | * i5400_probe1 Probe for ONE instance of device to see if it is |
1241 | * present. | 1214 | * present. |
1242 | * return: | 1215 | * return: |
@@ -1263,22 +1236,16 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx) | |||
1263 | if (PCI_FUNC(pdev->devfn) != 0) | 1236 | if (PCI_FUNC(pdev->devfn) != 0) |
1264 | return -ENODEV; | 1237 | return -ENODEV; |
1265 | 1238 | ||
1266 | /* Ask the devices for the number of CSROWS and CHANNELS so | 1239 | /* As we don't have a motherboard identification routine to determine |
1267 | * that we can calculate the memory resources, etc | ||
1268 | * | ||
1269 | * The Chipset will report what it can handle which will be greater | ||
1270 | * or equal to what the motherboard manufacturer will implement. | ||
1271 | * | ||
1272 | * As we don't have a motherboard identification routine to determine | ||
1273 | * actual number of slots/dimms per channel, we thus utilize the | 1240 | * actual number of slots/dimms per channel, we thus utilize the |
1274 | * resource as specified by the chipset. Thus, we might have | 1241 | * resource as specified by the chipset. Thus, we might have |
1275 | * have more DIMMs per channel than actually on the mobo, but this | 1242 | * have more DIMMs per channel than actually on the mobo, but this |
1276 | * allows the driver to support upto the chipset max, without | 1243 | * allows the driver to support upto the chipset max, without |
1277 | * some fancy mobo determination. | 1244 | * some fancy mobo determination. |
1278 | */ | 1245 | */ |
1279 | i5400_get_dimm_and_channel_counts(pdev, &num_dimms_per_channel, | 1246 | num_dimms_per_channel = MAX_DIMMS_PER_CHANNEL; |
1280 | &num_channels); | 1247 | num_channels = MAX_CHANNELS; |
1281 | num_csrows = num_dimms_per_channel * 2; | 1248 | num_csrows = num_dimms_per_channel; |
1282 | 1249 | ||
1283 | debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", | 1250 | debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", |
1284 | __func__, num_channels, num_dimms_per_channel, num_csrows); | 1251 | __func__, num_channels, num_dimms_per_channel, num_csrows); |
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c index 157f6504f25e..cf27402af97b 100644 --- a/drivers/edac/mpc85xx_edac.c +++ b/drivers/edac/mpc85xx_edac.c | |||
@@ -26,7 +26,9 @@ | |||
26 | #include "mpc85xx_edac.h" | 26 | #include "mpc85xx_edac.h" |
27 | 27 | ||
28 | static int edac_dev_idx; | 28 | static int edac_dev_idx; |
29 | #ifdef CONFIG_PCI | ||
29 | static int edac_pci_idx; | 30 | static int edac_pci_idx; |
31 | #endif | ||
30 | static int edac_mc_idx; | 32 | static int edac_mc_idx; |
31 | 33 | ||
32 | static u32 orig_ddr_err_disable; | 34 | static u32 orig_ddr_err_disable; |
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c index 662ed923d9eb..50de0f5750d8 100644 --- a/drivers/gpio/gpiolib.c +++ b/drivers/gpio/gpiolib.c | |||
@@ -661,7 +661,7 @@ int gpio_export(unsigned gpio, bool direction_may_change) | |||
661 | 661 | ||
662 | dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), | 662 | dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), |
663 | desc, ioname ? ioname : "gpio%d", gpio); | 663 | desc, ioname ? ioname : "gpio%d", gpio); |
664 | if (dev) { | 664 | if (!IS_ERR(dev)) { |
665 | if (direction_may_change) | 665 | if (direction_may_change) |
666 | status = sysfs_create_group(&dev->kobj, | 666 | status = sysfs_create_group(&dev->kobj, |
667 | &gpio_attr_group); | 667 | &gpio_attr_group); |
@@ -679,7 +679,7 @@ int gpio_export(unsigned gpio, bool direction_may_change) | |||
679 | if (status != 0) | 679 | if (status != 0) |
680 | device_unregister(dev); | 680 | device_unregister(dev); |
681 | } else | 681 | } else |
682 | status = -ENODEV; | 682 | status = PTR_ERR(dev); |
683 | if (status == 0) | 683 | if (status == 0) |
684 | set_bit(FLAG_EXPORT, &desc->flags); | 684 | set_bit(FLAG_EXPORT, &desc->flags); |
685 | } | 685 | } |
@@ -800,11 +800,11 @@ static int gpiochip_export(struct gpio_chip *chip) | |||
800 | mutex_lock(&sysfs_lock); | 800 | mutex_lock(&sysfs_lock); |
801 | dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip, | 801 | dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip, |
802 | "gpiochip%d", chip->base); | 802 | "gpiochip%d", chip->base); |
803 | if (dev) { | 803 | if (!IS_ERR(dev)) { |
804 | status = sysfs_create_group(&dev->kobj, | 804 | status = sysfs_create_group(&dev->kobj, |
805 | &gpiochip_attr_group); | 805 | &gpiochip_attr_group); |
806 | } else | 806 | } else |
807 | status = -ENODEV; | 807 | status = PTR_ERR(dev); |
808 | chip->exported = (status == 0); | 808 | chip->exported = (status == 0); |
809 | mutex_unlock(&sysfs_lock); | 809 | mutex_unlock(&sysfs_lock); |
810 | 810 | ||
diff --git a/drivers/gpio/twl4030-gpio.c b/drivers/gpio/twl4030-gpio.c index afad14792141..49384a7c5492 100644 --- a/drivers/gpio/twl4030-gpio.c +++ b/drivers/gpio/twl4030-gpio.c | |||
@@ -460,7 +460,8 @@ no_irqs: | |||
460 | return ret; | 460 | return ret; |
461 | } | 461 | } |
462 | 462 | ||
463 | static int __devexit gpio_twl4030_remove(struct platform_device *pdev) | 463 | /* Cannot use __devexit as gpio_twl4030_probe() calls us */ |
464 | static int gpio_twl4030_remove(struct platform_device *pdev) | ||
464 | { | 465 | { |
465 | struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; | 466 | struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; |
466 | int status; | 467 | int status; |
@@ -493,7 +494,7 @@ static struct platform_driver gpio_twl4030_driver = { | |||
493 | .driver.name = "twl4030_gpio", | 494 | .driver.name = "twl4030_gpio", |
494 | .driver.owner = THIS_MODULE, | 495 | .driver.owner = THIS_MODULE, |
495 | .probe = gpio_twl4030_probe, | 496 | .probe = gpio_twl4030_probe, |
496 | .remove = __devexit_p(gpio_twl4030_remove), | 497 | .remove = gpio_twl4030_remove, |
497 | }; | 498 | }; |
498 | 499 | ||
499 | static int __init gpio_twl4030_init(void) | 500 | static int __init gpio_twl4030_init(void) |
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c index 1fe4e1d344fd..bbfd110a7168 100644 --- a/drivers/gpu/drm/drm_crtc_helper.c +++ b/drivers/gpu/drm/drm_crtc_helper.c | |||
@@ -331,6 +331,7 @@ create_mode: | |||
331 | cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60, | 331 | cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60, |
332 | cmdline_mode->rb, cmdline_mode->interlace, | 332 | cmdline_mode->rb, cmdline_mode->interlace, |
333 | cmdline_mode->margins); | 333 | cmdline_mode->margins); |
334 | drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); | ||
334 | list_add(&mode->head, &connector->modes); | 335 | list_add(&mode->head, &connector->modes); |
335 | return mode; | 336 | return mode; |
336 | } | 337 | } |
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index 3c0d2b3aed76..cea665d86dd3 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c | |||
@@ -626,6 +626,12 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, | |||
626 | return NULL; | 626 | return NULL; |
627 | } | 627 | } |
628 | 628 | ||
629 | /* it is incorrect if hsync/vsync width is zero */ | ||
630 | if (!hsync_pulse_width || !vsync_pulse_width) { | ||
631 | DRM_DEBUG_KMS("Incorrect Detailed timing. " | ||
632 | "Wrong Hsync/Vsync pulse width\n"); | ||
633 | return NULL; | ||
634 | } | ||
629 | mode = drm_mode_create(dev); | 635 | mode = drm_mode_create(dev); |
630 | if (!mode) | 636 | if (!mode) |
631 | return NULL; | 637 | return NULL; |
@@ -647,6 +653,15 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, | |||
647 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; | 653 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; |
648 | mode->vtotal = mode->vdisplay + vblank; | 654 | mode->vtotal = mode->vdisplay + vblank; |
649 | 655 | ||
656 | /* perform the basic check for the detailed timing */ | ||
657 | if (mode->hsync_end > mode->htotal || | ||
658 | mode->vsync_end > mode->vtotal) { | ||
659 | drm_mode_destroy(dev, mode); | ||
660 | DRM_DEBUG_KMS("Incorrect detailed timing. " | ||
661 | "Sync is beyond the blank.\n"); | ||
662 | return NULL; | ||
663 | } | ||
664 | |||
650 | drm_mode_set_name(mode); | 665 | drm_mode_set_name(mode); |
651 | 666 | ||
652 | if (pt->misc & DRM_EDID_PT_INTERLACED) | 667 | if (pt->misc & DRM_EDID_PT_INTERLACED) |
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index 23dc9c115fd9..dc8e374a0b55 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
@@ -454,22 +454,39 @@ out_free: | |||
454 | } | 454 | } |
455 | EXPORT_SYMBOL(drm_fb_helper_init_crtc_count); | 455 | EXPORT_SYMBOL(drm_fb_helper_init_crtc_count); |
456 | 456 | ||
457 | static void setcolreg(struct drm_crtc *crtc, u16 red, u16 green, | 457 | static int setcolreg(struct drm_crtc *crtc, u16 red, u16 green, |
458 | u16 blue, u16 regno, struct fb_info *info) | 458 | u16 blue, u16 regno, struct fb_info *info) |
459 | { | 459 | { |
460 | struct drm_fb_helper *fb_helper = info->par; | 460 | struct drm_fb_helper *fb_helper = info->par; |
461 | struct drm_framebuffer *fb = fb_helper->fb; | 461 | struct drm_framebuffer *fb = fb_helper->fb; |
462 | int pindex; | 462 | int pindex; |
463 | 463 | ||
464 | if (info->fix.visual == FB_VISUAL_TRUECOLOR) { | ||
465 | u32 *palette; | ||
466 | u32 value; | ||
467 | /* place color in psuedopalette */ | ||
468 | if (regno > 16) | ||
469 | return -EINVAL; | ||
470 | palette = (u32 *)info->pseudo_palette; | ||
471 | red >>= (16 - info->var.red.length); | ||
472 | green >>= (16 - info->var.green.length); | ||
473 | blue >>= (16 - info->var.blue.length); | ||
474 | value = (red << info->var.red.offset) | | ||
475 | (green << info->var.green.offset) | | ||
476 | (blue << info->var.blue.offset); | ||
477 | palette[regno] = value; | ||
478 | return 0; | ||
479 | } | ||
480 | |||
464 | pindex = regno; | 481 | pindex = regno; |
465 | 482 | ||
466 | if (fb->bits_per_pixel == 16) { | 483 | if (fb->bits_per_pixel == 16) { |
467 | pindex = regno << 3; | 484 | pindex = regno << 3; |
468 | 485 | ||
469 | if (fb->depth == 16 && regno > 63) | 486 | if (fb->depth == 16 && regno > 63) |
470 | return; | 487 | return -EINVAL; |
471 | if (fb->depth == 15 && regno > 31) | 488 | if (fb->depth == 15 && regno > 31) |
472 | return; | 489 | return -EINVAL; |
473 | 490 | ||
474 | if (fb->depth == 16) { | 491 | if (fb->depth == 16) { |
475 | u16 r, g, b; | 492 | u16 r, g, b; |
@@ -493,13 +510,7 @@ static void setcolreg(struct drm_crtc *crtc, u16 red, u16 green, | |||
493 | 510 | ||
494 | if (fb->depth != 16) | 511 | if (fb->depth != 16) |
495 | fb_helper->funcs->gamma_set(crtc, red, green, blue, pindex); | 512 | fb_helper->funcs->gamma_set(crtc, red, green, blue, pindex); |
496 | 513 | return 0; | |
497 | if (regno < 16 && info->fix.visual == FB_VISUAL_DIRECTCOLOR) { | ||
498 | ((u32 *) fb->pseudo_palette)[regno] = | ||
499 | (regno << info->var.red.offset) | | ||
500 | (regno << info->var.green.offset) | | ||
501 | (regno << info->var.blue.offset); | ||
502 | } | ||
503 | } | 514 | } |
504 | 515 | ||
505 | int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info) | 516 | int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info) |
@@ -536,7 +547,9 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info) | |||
536 | if (transp) | 547 | if (transp) |
537 | htransp = *transp++; | 548 | htransp = *transp++; |
538 | 549 | ||
539 | setcolreg(crtc, hred, hgreen, hblue, start++, info); | 550 | rc = setcolreg(crtc, hred, hgreen, hblue, start++, info); |
551 | if (rc) | ||
552 | return rc; | ||
540 | } | 553 | } |
541 | crtc_funcs->load_lut(crtc); | 554 | crtc_funcs->load_lut(crtc); |
542 | } | 555 | } |
@@ -555,6 +568,7 @@ int drm_fb_helper_setcolreg(unsigned regno, | |||
555 | struct drm_device *dev = fb_helper->dev; | 568 | struct drm_device *dev = fb_helper->dev; |
556 | struct drm_crtc *crtc; | 569 | struct drm_crtc *crtc; |
557 | int i; | 570 | int i; |
571 | int ret; | ||
558 | 572 | ||
559 | if (regno > 255) | 573 | if (regno > 255) |
560 | return 1; | 574 | return 1; |
@@ -568,8 +582,10 @@ int drm_fb_helper_setcolreg(unsigned regno, | |||
568 | if (i == fb_helper->crtc_count) | 582 | if (i == fb_helper->crtc_count) |
569 | continue; | 583 | continue; |
570 | 584 | ||
585 | ret = setcolreg(crtc, red, green, blue, regno, info); | ||
586 | if (ret) | ||
587 | return ret; | ||
571 | 588 | ||
572 | setcolreg(crtc, red, green, blue, regno, info); | ||
573 | crtc_funcs->load_lut(crtc); | 589 | crtc_funcs->load_lut(crtc); |
574 | } | 590 | } |
575 | return 0; | 591 | return 0; |
@@ -691,7 +707,7 @@ int drm_fb_helper_set_par(struct fb_info *info) | |||
691 | 707 | ||
692 | if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) { | 708 | if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) { |
693 | mutex_lock(&dev->mode_config.mutex); | 709 | mutex_lock(&dev->mode_config.mutex); |
694 | ret = crtc->funcs->set_config(&fb_helper->crtc_info->mode_set); | 710 | ret = crtc->funcs->set_config(&fb_helper->crtc_info[i].mode_set); |
695 | mutex_unlock(&dev->mode_config.mutex); | 711 | mutex_unlock(&dev->mode_config.mutex); |
696 | if (ret) | 712 | if (ret) |
697 | return ret; | 713 | return ret; |
@@ -928,7 +944,7 @@ void drm_fb_helper_fill_fix(struct fb_info *info, uint32_t pitch, | |||
928 | { | 944 | { |
929 | info->fix.type = FB_TYPE_PACKED_PIXELS; | 945 | info->fix.type = FB_TYPE_PACKED_PIXELS; |
930 | info->fix.visual = depth == 8 ? FB_VISUAL_PSEUDOCOLOR : | 946 | info->fix.visual = depth == 8 ? FB_VISUAL_PSEUDOCOLOR : |
931 | FB_VISUAL_DIRECTCOLOR; | 947 | FB_VISUAL_TRUECOLOR; |
932 | info->fix.type_aux = 0; | 948 | info->fix.type_aux = 0; |
933 | info->fix.xpanstep = 1; /* doing it in hw */ | 949 | info->fix.xpanstep = 1; /* doing it in hw */ |
934 | info->fix.ypanstep = 1; /* doing it in hw */ | 950 | info->fix.ypanstep = 1; /* doing it in hw */ |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 92aeb918e0c0..e5b138be45fa 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1227,8 +1227,7 @@ static int i915_load_modeset_init(struct drm_device *dev, | |||
1227 | goto out; | 1227 | goto out; |
1228 | 1228 | ||
1229 | /* Try to set up FBC with a reasonable compressed buffer size */ | 1229 | /* Try to set up FBC with a reasonable compressed buffer size */ |
1230 | if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) && | 1230 | if (I915_HAS_FBC(dev) && i915_powersave) { |
1231 | i915_powersave) { | ||
1232 | int cfb_size; | 1231 | int cfb_size; |
1233 | 1232 | ||
1234 | /* Try to get an 8M buffer... */ | 1233 | /* Try to get an 8M buffer... */ |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index b93814c0d3e2..7f436ec075f6 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -89,7 +89,8 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state) | |||
89 | pci_set_power_state(dev->pdev, PCI_D3hot); | 89 | pci_set_power_state(dev->pdev, PCI_D3hot); |
90 | } | 90 | } |
91 | 91 | ||
92 | dev_priv->suspended = 1; | 92 | /* Modeset on resume, not lid events */ |
93 | dev_priv->modeset_on_lid = 0; | ||
93 | 94 | ||
94 | return 0; | 95 | return 0; |
95 | } | 96 | } |
@@ -124,7 +125,7 @@ static int i915_resume(struct drm_device *dev) | |||
124 | drm_helper_resume_force_mode(dev); | 125 | drm_helper_resume_force_mode(dev); |
125 | } | 126 | } |
126 | 127 | ||
127 | dev_priv->suspended = 0; | 128 | dev_priv->modeset_on_lid = 0; |
128 | 129 | ||
129 | return ret; | 130 | return ret; |
130 | } | 131 | } |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 6035d3dae851..57204e298975 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -274,7 +274,7 @@ typedef struct drm_i915_private { | |||
274 | struct drm_i915_display_funcs display; | 274 | struct drm_i915_display_funcs display; |
275 | 275 | ||
276 | /* Register state */ | 276 | /* Register state */ |
277 | bool suspended; | 277 | bool modeset_on_lid; |
278 | u8 saveLBB; | 278 | u8 saveLBB; |
279 | u32 saveDSPACNTR; | 279 | u32 saveDSPACNTR; |
280 | u32 saveDSPBCNTR; | 280 | u32 saveDSPBCNTR; |
@@ -296,6 +296,12 @@ typedef struct drm_i915_private { | |||
296 | u32 saveVBLANK_A; | 296 | u32 saveVBLANK_A; |
297 | u32 saveVSYNC_A; | 297 | u32 saveVSYNC_A; |
298 | u32 saveBCLRPAT_A; | 298 | u32 saveBCLRPAT_A; |
299 | u32 saveTRANS_HTOTAL_A; | ||
300 | u32 saveTRANS_HBLANK_A; | ||
301 | u32 saveTRANS_HSYNC_A; | ||
302 | u32 saveTRANS_VTOTAL_A; | ||
303 | u32 saveTRANS_VBLANK_A; | ||
304 | u32 saveTRANS_VSYNC_A; | ||
299 | u32 savePIPEASTAT; | 305 | u32 savePIPEASTAT; |
300 | u32 saveDSPASTRIDE; | 306 | u32 saveDSPASTRIDE; |
301 | u32 saveDSPASIZE; | 307 | u32 saveDSPASIZE; |
@@ -304,8 +310,11 @@ typedef struct drm_i915_private { | |||
304 | u32 saveDSPASURF; | 310 | u32 saveDSPASURF; |
305 | u32 saveDSPATILEOFF; | 311 | u32 saveDSPATILEOFF; |
306 | u32 savePFIT_PGM_RATIOS; | 312 | u32 savePFIT_PGM_RATIOS; |
313 | u32 saveBLC_HIST_CTL; | ||
307 | u32 saveBLC_PWM_CTL; | 314 | u32 saveBLC_PWM_CTL; |
308 | u32 saveBLC_PWM_CTL2; | 315 | u32 saveBLC_PWM_CTL2; |
316 | u32 saveBLC_CPU_PWM_CTL; | ||
317 | u32 saveBLC_CPU_PWM_CTL2; | ||
309 | u32 saveFPB0; | 318 | u32 saveFPB0; |
310 | u32 saveFPB1; | 319 | u32 saveFPB1; |
311 | u32 saveDPLL_B; | 320 | u32 saveDPLL_B; |
@@ -317,6 +326,12 @@ typedef struct drm_i915_private { | |||
317 | u32 saveVBLANK_B; | 326 | u32 saveVBLANK_B; |
318 | u32 saveVSYNC_B; | 327 | u32 saveVSYNC_B; |
319 | u32 saveBCLRPAT_B; | 328 | u32 saveBCLRPAT_B; |
329 | u32 saveTRANS_HTOTAL_B; | ||
330 | u32 saveTRANS_HBLANK_B; | ||
331 | u32 saveTRANS_HSYNC_B; | ||
332 | u32 saveTRANS_VTOTAL_B; | ||
333 | u32 saveTRANS_VBLANK_B; | ||
334 | u32 saveTRANS_VSYNC_B; | ||
320 | u32 savePIPEBSTAT; | 335 | u32 savePIPEBSTAT; |
321 | u32 saveDSPBSTRIDE; | 336 | u32 saveDSPBSTRIDE; |
322 | u32 saveDSPBSIZE; | 337 | u32 saveDSPBSIZE; |
@@ -342,6 +357,7 @@ typedef struct drm_i915_private { | |||
342 | u32 savePFIT_CONTROL; | 357 | u32 savePFIT_CONTROL; |
343 | u32 save_palette_a[256]; | 358 | u32 save_palette_a[256]; |
344 | u32 save_palette_b[256]; | 359 | u32 save_palette_b[256]; |
360 | u32 saveDPFC_CB_BASE; | ||
345 | u32 saveFBC_CFB_BASE; | 361 | u32 saveFBC_CFB_BASE; |
346 | u32 saveFBC_LL_BASE; | 362 | u32 saveFBC_LL_BASE; |
347 | u32 saveFBC_CONTROL; | 363 | u32 saveFBC_CONTROL; |
@@ -349,6 +365,12 @@ typedef struct drm_i915_private { | |||
349 | u32 saveIER; | 365 | u32 saveIER; |
350 | u32 saveIIR; | 366 | u32 saveIIR; |
351 | u32 saveIMR; | 367 | u32 saveIMR; |
368 | u32 saveDEIER; | ||
369 | u32 saveDEIMR; | ||
370 | u32 saveGTIER; | ||
371 | u32 saveGTIMR; | ||
372 | u32 saveFDI_RXA_IMR; | ||
373 | u32 saveFDI_RXB_IMR; | ||
352 | u32 saveCACHE_MODE_0; | 374 | u32 saveCACHE_MODE_0; |
353 | u32 saveD_STATE; | 375 | u32 saveD_STATE; |
354 | u32 saveDSPCLK_GATE_D; | 376 | u32 saveDSPCLK_GATE_D; |
@@ -382,6 +404,16 @@ typedef struct drm_i915_private { | |||
382 | u32 savePIPEB_DP_LINK_M; | 404 | u32 savePIPEB_DP_LINK_M; |
383 | u32 savePIPEA_DP_LINK_N; | 405 | u32 savePIPEA_DP_LINK_N; |
384 | u32 savePIPEB_DP_LINK_N; | 406 | u32 savePIPEB_DP_LINK_N; |
407 | u32 saveFDI_RXA_CTL; | ||
408 | u32 saveFDI_TXA_CTL; | ||
409 | u32 saveFDI_RXB_CTL; | ||
410 | u32 saveFDI_TXB_CTL; | ||
411 | u32 savePFA_CTL_1; | ||
412 | u32 savePFB_CTL_1; | ||
413 | u32 savePFA_WIN_SZ; | ||
414 | u32 savePFB_WIN_SZ; | ||
415 | u32 savePFA_WIN_POS; | ||
416 | u32 savePFB_WIN_POS; | ||
385 | 417 | ||
386 | struct { | 418 | struct { |
387 | struct drm_mm gtt_space; | 419 | struct drm_mm gtt_space; |
@@ -492,6 +524,8 @@ typedef struct drm_i915_private { | |||
492 | struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; | 524 | struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; |
493 | } mm; | 525 | } mm; |
494 | struct sdvo_device_mapping sdvo_mappings[2]; | 526 | struct sdvo_device_mapping sdvo_mappings[2]; |
527 | /* indicate whether the LVDS_BORDER should be enabled or not */ | ||
528 | unsigned int lvds_border_bits; | ||
495 | 529 | ||
496 | /* Reclocking support */ | 530 | /* Reclocking support */ |
497 | bool render_reclock_avail; | 531 | bool render_reclock_avail; |
@@ -981,7 +1015,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller); | |||
981 | 1015 | ||
982 | #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev)) | 1016 | #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev)) |
983 | #define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev)) | 1017 | #define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev)) |
984 | #define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev))) | 1018 | #define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \ |
1019 | (IS_I9XX(dev) || IS_GM45(dev)) && \ | ||
1020 | !IS_IGD(dev) && \ | ||
1021 | !IS_IGDNG(dev)) | ||
985 | 1022 | ||
986 | #define PRIMARY_RINGBUFFER_SIZE (128*1024) | 1023 | #define PRIMARY_RINGBUFFER_SIZE (128*1024) |
987 | 1024 | ||
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 0466ddbeba32..1687edf68795 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -968,6 +968,8 @@ | |||
968 | #define LVDS_PORT_EN (1 << 31) | 968 | #define LVDS_PORT_EN (1 << 31) |
969 | /* Selects pipe B for LVDS data. Must be set on pre-965. */ | 969 | /* Selects pipe B for LVDS data. Must be set on pre-965. */ |
970 | #define LVDS_PIPEB_SELECT (1 << 30) | 970 | #define LVDS_PIPEB_SELECT (1 << 30) |
971 | /* Enable border for unscaled (or aspect-scaled) display */ | ||
972 | #define LVDS_BORDER_ENABLE (1 << 15) | ||
971 | /* | 973 | /* |
972 | * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per | 974 | * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per |
973 | * pixel. | 975 | * pixel. |
@@ -1078,6 +1080,8 @@ | |||
1078 | #define BACKLIGHT_DUTY_CYCLE_SHIFT (0) | 1080 | #define BACKLIGHT_DUTY_CYCLE_SHIFT (0) |
1079 | #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) | 1081 | #define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) |
1080 | 1082 | ||
1083 | #define BLC_HIST_CTL 0x61260 | ||
1084 | |||
1081 | /* TV port control */ | 1085 | /* TV port control */ |
1082 | #define TV_CTL 0x68000 | 1086 | #define TV_CTL 0x68000 |
1083 | /** Enables the TV encoder */ | 1087 | /** Enables the TV encoder */ |
@@ -1780,6 +1784,11 @@ | |||
1780 | #define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ | 1784 | #define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ |
1781 | #define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) | 1785 | #define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) |
1782 | #define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) | 1786 | #define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) |
1787 | #define PIPE_BPC_MASK (7 << 5) /* Ironlake */ | ||
1788 | #define PIPE_8BPC (0 << 5) | ||
1789 | #define PIPE_10BPC (1 << 5) | ||
1790 | #define PIPE_6BPC (2 << 5) | ||
1791 | #define PIPE_12BPC (3 << 5) | ||
1783 | 1792 | ||
1784 | #define DSPARB 0x70030 | 1793 | #define DSPARB 0x70030 |
1785 | #define DSPARB_CSTART_MASK (0x7f << 7) | 1794 | #define DSPARB_CSTART_MASK (0x7f << 7) |
@@ -1790,17 +1799,29 @@ | |||
1790 | #define DSPARB_AEND_SHIFT 0 | 1799 | #define DSPARB_AEND_SHIFT 0 |
1791 | 1800 | ||
1792 | #define DSPFW1 0x70034 | 1801 | #define DSPFW1 0x70034 |
1802 | #define DSPFW_SR_SHIFT 23 | ||
1803 | #define DSPFW_CURSORB_SHIFT 16 | ||
1804 | #define DSPFW_PLANEB_SHIFT 8 | ||
1793 | #define DSPFW2 0x70038 | 1805 | #define DSPFW2 0x70038 |
1806 | #define DSPFW_CURSORA_MASK 0x00003f00 | ||
1807 | #define DSPFW_CURSORA_SHIFT 16 | ||
1794 | #define DSPFW3 0x7003c | 1808 | #define DSPFW3 0x7003c |
1809 | #define DSPFW_HPLL_SR_EN (1<<31) | ||
1810 | #define DSPFW_CURSOR_SR_SHIFT 24 | ||
1795 | #define IGD_SELF_REFRESH_EN (1<<30) | 1811 | #define IGD_SELF_REFRESH_EN (1<<30) |
1796 | 1812 | ||
1797 | /* FIFO watermark sizes etc */ | 1813 | /* FIFO watermark sizes etc */ |
1814 | #define G4X_FIFO_LINE_SIZE 64 | ||
1798 | #define I915_FIFO_LINE_SIZE 64 | 1815 | #define I915_FIFO_LINE_SIZE 64 |
1799 | #define I830_FIFO_LINE_SIZE 32 | 1816 | #define I830_FIFO_LINE_SIZE 32 |
1817 | |||
1818 | #define G4X_FIFO_SIZE 127 | ||
1800 | #define I945_FIFO_SIZE 127 /* 945 & 965 */ | 1819 | #define I945_FIFO_SIZE 127 /* 945 & 965 */ |
1801 | #define I915_FIFO_SIZE 95 | 1820 | #define I915_FIFO_SIZE 95 |
1802 | #define I855GM_FIFO_SIZE 127 /* In cachelines */ | 1821 | #define I855GM_FIFO_SIZE 127 /* In cachelines */ |
1803 | #define I830_FIFO_SIZE 95 | 1822 | #define I830_FIFO_SIZE 95 |
1823 | |||
1824 | #define G4X_MAX_WM 0x3f | ||
1804 | #define I915_MAX_WM 0x3f | 1825 | #define I915_MAX_WM 0x3f |
1805 | 1826 | ||
1806 | #define IGD_DISPLAY_FIFO 512 /* in 64byte unit */ | 1827 | #define IGD_DISPLAY_FIFO 512 /* in 64byte unit */ |
@@ -2030,6 +2051,11 @@ | |||
2030 | #define PFA_CTL_1 0x68080 | 2051 | #define PFA_CTL_1 0x68080 |
2031 | #define PFB_CTL_1 0x68880 | 2052 | #define PFB_CTL_1 0x68880 |
2032 | #define PF_ENABLE (1<<31) | 2053 | #define PF_ENABLE (1<<31) |
2054 | #define PF_FILTER_MASK (3<<23) | ||
2055 | #define PF_FILTER_PROGRAMMED (0<<23) | ||
2056 | #define PF_FILTER_MED_3x3 (1<<23) | ||
2057 | #define PF_FILTER_EDGE_ENHANCE (2<<23) | ||
2058 | #define PF_FILTER_EDGE_SOFTEN (3<<23) | ||
2033 | #define PFA_WIN_SZ 0x68074 | 2059 | #define PFA_WIN_SZ 0x68074 |
2034 | #define PFB_WIN_SZ 0x68874 | 2060 | #define PFB_WIN_SZ 0x68874 |
2035 | #define PFA_WIN_POS 0x68070 | 2061 | #define PFA_WIN_POS 0x68070 |
@@ -2149,11 +2175,11 @@ | |||
2149 | #define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13) | 2175 | #define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13) |
2150 | #define DREF_SSC_SOURCE_DISABLE (0<<11) | 2176 | #define DREF_SSC_SOURCE_DISABLE (0<<11) |
2151 | #define DREF_SSC_SOURCE_ENABLE (2<<11) | 2177 | #define DREF_SSC_SOURCE_ENABLE (2<<11) |
2152 | #define DREF_SSC_SOURCE_MASK (2<<11) | 2178 | #define DREF_SSC_SOURCE_MASK (3<<11) |
2153 | #define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) | 2179 | #define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) |
2154 | #define DREF_NONSPREAD_CK505_ENABLE (1<<9) | 2180 | #define DREF_NONSPREAD_CK505_ENABLE (1<<9) |
2155 | #define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) | 2181 | #define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) |
2156 | #define DREF_NONSPREAD_SOURCE_MASK (2<<9) | 2182 | #define DREF_NONSPREAD_SOURCE_MASK (3<<9) |
2157 | #define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) | 2183 | #define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) |
2158 | #define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) | 2184 | #define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) |
2159 | #define DREF_SSC4_DOWNSPREAD (0<<6) | 2185 | #define DREF_SSC4_DOWNSPREAD (0<<6) |
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index bd6d8d91ca9f..992d5617e798 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
@@ -32,11 +32,15 @@ | |||
32 | static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) | 32 | static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) |
33 | { | 33 | { |
34 | struct drm_i915_private *dev_priv = dev->dev_private; | 34 | struct drm_i915_private *dev_priv = dev->dev_private; |
35 | u32 dpll_reg; | ||
35 | 36 | ||
36 | if (pipe == PIPE_A) | 37 | if (IS_IGDNG(dev)) { |
37 | return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE); | 38 | dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B; |
38 | else | 39 | } else { |
39 | return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE); | 40 | dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B; |
41 | } | ||
42 | |||
43 | return (I915_READ(dpll_reg) & DPLL_VCO_ENABLE); | ||
40 | } | 44 | } |
41 | 45 | ||
42 | static void i915_save_palette(struct drm_device *dev, enum pipe pipe) | 46 | static void i915_save_palette(struct drm_device *dev, enum pipe pipe) |
@@ -49,6 +53,9 @@ static void i915_save_palette(struct drm_device *dev, enum pipe pipe) | |||
49 | if (!i915_pipe_enabled(dev, pipe)) | 53 | if (!i915_pipe_enabled(dev, pipe)) |
50 | return; | 54 | return; |
51 | 55 | ||
56 | if (IS_IGDNG(dev)) | ||
57 | reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B; | ||
58 | |||
52 | if (pipe == PIPE_A) | 59 | if (pipe == PIPE_A) |
53 | array = dev_priv->save_palette_a; | 60 | array = dev_priv->save_palette_a; |
54 | else | 61 | else |
@@ -68,6 +75,9 @@ static void i915_restore_palette(struct drm_device *dev, enum pipe pipe) | |||
68 | if (!i915_pipe_enabled(dev, pipe)) | 75 | if (!i915_pipe_enabled(dev, pipe)) |
69 | return; | 76 | return; |
70 | 77 | ||
78 | if (IS_IGDNG(dev)) | ||
79 | reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B; | ||
80 | |||
71 | if (pipe == PIPE_A) | 81 | if (pipe == PIPE_A) |
72 | array = dev_priv->save_palette_a; | 82 | array = dev_priv->save_palette_a; |
73 | else | 83 | else |
@@ -232,10 +242,16 @@ static void i915_save_modeset_reg(struct drm_device *dev) | |||
232 | /* Pipe & plane A info */ | 242 | /* Pipe & plane A info */ |
233 | dev_priv->savePIPEACONF = I915_READ(PIPEACONF); | 243 | dev_priv->savePIPEACONF = I915_READ(PIPEACONF); |
234 | dev_priv->savePIPEASRC = I915_READ(PIPEASRC); | 244 | dev_priv->savePIPEASRC = I915_READ(PIPEASRC); |
235 | dev_priv->saveFPA0 = I915_READ(FPA0); | 245 | if (IS_IGDNG(dev)) { |
236 | dev_priv->saveFPA1 = I915_READ(FPA1); | 246 | dev_priv->saveFPA0 = I915_READ(PCH_FPA0); |
237 | dev_priv->saveDPLL_A = I915_READ(DPLL_A); | 247 | dev_priv->saveFPA1 = I915_READ(PCH_FPA1); |
238 | if (IS_I965G(dev)) | 248 | dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A); |
249 | } else { | ||
250 | dev_priv->saveFPA0 = I915_READ(FPA0); | ||
251 | dev_priv->saveFPA1 = I915_READ(FPA1); | ||
252 | dev_priv->saveDPLL_A = I915_READ(DPLL_A); | ||
253 | } | ||
254 | if (IS_I965G(dev) && !IS_IGDNG(dev)) | ||
239 | dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD); | 255 | dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD); |
240 | dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A); | 256 | dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A); |
241 | dev_priv->saveHBLANK_A = I915_READ(HBLANK_A); | 257 | dev_priv->saveHBLANK_A = I915_READ(HBLANK_A); |
@@ -243,7 +259,24 @@ static void i915_save_modeset_reg(struct drm_device *dev) | |||
243 | dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A); | 259 | dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A); |
244 | dev_priv->saveVBLANK_A = I915_READ(VBLANK_A); | 260 | dev_priv->saveVBLANK_A = I915_READ(VBLANK_A); |
245 | dev_priv->saveVSYNC_A = I915_READ(VSYNC_A); | 261 | dev_priv->saveVSYNC_A = I915_READ(VSYNC_A); |
246 | dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); | 262 | if (!IS_IGDNG(dev)) |
263 | dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); | ||
264 | |||
265 | if (IS_IGDNG(dev)) { | ||
266 | dev_priv->saveFDI_TXA_CTL = I915_READ(FDI_TXA_CTL); | ||
267 | dev_priv->saveFDI_RXA_CTL = I915_READ(FDI_RXA_CTL); | ||
268 | |||
269 | dev_priv->savePFA_CTL_1 = I915_READ(PFA_CTL_1); | ||
270 | dev_priv->savePFA_WIN_SZ = I915_READ(PFA_WIN_SZ); | ||
271 | dev_priv->savePFA_WIN_POS = I915_READ(PFA_WIN_POS); | ||
272 | |||
273 | dev_priv->saveTRANS_HTOTAL_A = I915_READ(TRANS_HTOTAL_A); | ||
274 | dev_priv->saveTRANS_HBLANK_A = I915_READ(TRANS_HBLANK_A); | ||
275 | dev_priv->saveTRANS_HSYNC_A = I915_READ(TRANS_HSYNC_A); | ||
276 | dev_priv->saveTRANS_VTOTAL_A = I915_READ(TRANS_VTOTAL_A); | ||
277 | dev_priv->saveTRANS_VBLANK_A = I915_READ(TRANS_VBLANK_A); | ||
278 | dev_priv->saveTRANS_VSYNC_A = I915_READ(TRANS_VSYNC_A); | ||
279 | } | ||
247 | 280 | ||
248 | dev_priv->saveDSPACNTR = I915_READ(DSPACNTR); | 281 | dev_priv->saveDSPACNTR = I915_READ(DSPACNTR); |
249 | dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE); | 282 | dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE); |
@@ -260,10 +293,16 @@ static void i915_save_modeset_reg(struct drm_device *dev) | |||
260 | /* Pipe & plane B info */ | 293 | /* Pipe & plane B info */ |
261 | dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF); | 294 | dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF); |
262 | dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC); | 295 | dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC); |
263 | dev_priv->saveFPB0 = I915_READ(FPB0); | 296 | if (IS_IGDNG(dev)) { |
264 | dev_priv->saveFPB1 = I915_READ(FPB1); | 297 | dev_priv->saveFPB0 = I915_READ(PCH_FPB0); |
265 | dev_priv->saveDPLL_B = I915_READ(DPLL_B); | 298 | dev_priv->saveFPB1 = I915_READ(PCH_FPB1); |
266 | if (IS_I965G(dev)) | 299 | dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B); |
300 | } else { | ||
301 | dev_priv->saveFPB0 = I915_READ(FPB0); | ||
302 | dev_priv->saveFPB1 = I915_READ(FPB1); | ||
303 | dev_priv->saveDPLL_B = I915_READ(DPLL_B); | ||
304 | } | ||
305 | if (IS_I965G(dev) && !IS_IGDNG(dev)) | ||
267 | dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD); | 306 | dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD); |
268 | dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B); | 307 | dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B); |
269 | dev_priv->saveHBLANK_B = I915_READ(HBLANK_B); | 308 | dev_priv->saveHBLANK_B = I915_READ(HBLANK_B); |
@@ -271,7 +310,24 @@ static void i915_save_modeset_reg(struct drm_device *dev) | |||
271 | dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B); | 310 | dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B); |
272 | dev_priv->saveVBLANK_B = I915_READ(VBLANK_B); | 311 | dev_priv->saveVBLANK_B = I915_READ(VBLANK_B); |
273 | dev_priv->saveVSYNC_B = I915_READ(VSYNC_B); | 312 | dev_priv->saveVSYNC_B = I915_READ(VSYNC_B); |
274 | dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); | 313 | if (!IS_IGDNG(dev)) |
314 | dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B); | ||
315 | |||
316 | if (IS_IGDNG(dev)) { | ||
317 | dev_priv->saveFDI_TXB_CTL = I915_READ(FDI_TXB_CTL); | ||
318 | dev_priv->saveFDI_RXB_CTL = I915_READ(FDI_RXB_CTL); | ||
319 | |||
320 | dev_priv->savePFB_CTL_1 = I915_READ(PFB_CTL_1); | ||
321 | dev_priv->savePFB_WIN_SZ = I915_READ(PFB_WIN_SZ); | ||
322 | dev_priv->savePFB_WIN_POS = I915_READ(PFB_WIN_POS); | ||
323 | |||
324 | dev_priv->saveTRANS_HTOTAL_B = I915_READ(TRANS_HTOTAL_B); | ||
325 | dev_priv->saveTRANS_HBLANK_B = I915_READ(TRANS_HBLANK_B); | ||
326 | dev_priv->saveTRANS_HSYNC_B = I915_READ(TRANS_HSYNC_B); | ||
327 | dev_priv->saveTRANS_VTOTAL_B = I915_READ(TRANS_VTOTAL_B); | ||
328 | dev_priv->saveTRANS_VBLANK_B = I915_READ(TRANS_VBLANK_B); | ||
329 | dev_priv->saveTRANS_VSYNC_B = I915_READ(TRANS_VSYNC_B); | ||
330 | } | ||
275 | 331 | ||
276 | dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR); | 332 | dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR); |
277 | dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE); | 333 | dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE); |
@@ -290,23 +346,41 @@ static void i915_save_modeset_reg(struct drm_device *dev) | |||
290 | static void i915_restore_modeset_reg(struct drm_device *dev) | 346 | static void i915_restore_modeset_reg(struct drm_device *dev) |
291 | { | 347 | { |
292 | struct drm_i915_private *dev_priv = dev->dev_private; | 348 | struct drm_i915_private *dev_priv = dev->dev_private; |
349 | int dpll_a_reg, fpa0_reg, fpa1_reg; | ||
350 | int dpll_b_reg, fpb0_reg, fpb1_reg; | ||
293 | 351 | ||
294 | if (drm_core_check_feature(dev, DRIVER_MODESET)) | 352 | if (drm_core_check_feature(dev, DRIVER_MODESET)) |
295 | return; | 353 | return; |
296 | 354 | ||
355 | if (IS_IGDNG(dev)) { | ||
356 | dpll_a_reg = PCH_DPLL_A; | ||
357 | dpll_b_reg = PCH_DPLL_B; | ||
358 | fpa0_reg = PCH_FPA0; | ||
359 | fpb0_reg = PCH_FPB0; | ||
360 | fpa1_reg = PCH_FPA1; | ||
361 | fpb1_reg = PCH_FPB1; | ||
362 | } else { | ||
363 | dpll_a_reg = DPLL_A; | ||
364 | dpll_b_reg = DPLL_B; | ||
365 | fpa0_reg = FPA0; | ||
366 | fpb0_reg = FPB0; | ||
367 | fpa1_reg = FPA1; | ||
368 | fpb1_reg = FPB1; | ||
369 | } | ||
370 | |||
297 | /* Pipe & plane A info */ | 371 | /* Pipe & plane A info */ |
298 | /* Prime the clock */ | 372 | /* Prime the clock */ |
299 | if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { | 373 | if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { |
300 | I915_WRITE(DPLL_A, dev_priv->saveDPLL_A & | 374 | I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A & |
301 | ~DPLL_VCO_ENABLE); | 375 | ~DPLL_VCO_ENABLE); |
302 | DRM_UDELAY(150); | 376 | DRM_UDELAY(150); |
303 | } | 377 | } |
304 | I915_WRITE(FPA0, dev_priv->saveFPA0); | 378 | I915_WRITE(fpa0_reg, dev_priv->saveFPA0); |
305 | I915_WRITE(FPA1, dev_priv->saveFPA1); | 379 | I915_WRITE(fpa1_reg, dev_priv->saveFPA1); |
306 | /* Actually enable it */ | 380 | /* Actually enable it */ |
307 | I915_WRITE(DPLL_A, dev_priv->saveDPLL_A); | 381 | I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A); |
308 | DRM_UDELAY(150); | 382 | DRM_UDELAY(150); |
309 | if (IS_I965G(dev)) | 383 | if (IS_I965G(dev) && !IS_IGDNG(dev)) |
310 | I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD); | 384 | I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD); |
311 | DRM_UDELAY(150); | 385 | DRM_UDELAY(150); |
312 | 386 | ||
@@ -317,7 +391,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev) | |||
317 | I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A); | 391 | I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A); |
318 | I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A); | 392 | I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A); |
319 | I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A); | 393 | I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A); |
320 | I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A); | 394 | if (!IS_IGDNG(dev)) |
395 | I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A); | ||
396 | |||
397 | if (IS_IGDNG(dev)) { | ||
398 | I915_WRITE(FDI_RXA_CTL, dev_priv->saveFDI_RXA_CTL); | ||
399 | I915_WRITE(FDI_TXA_CTL, dev_priv->saveFDI_TXA_CTL); | ||
400 | |||
401 | I915_WRITE(PFA_CTL_1, dev_priv->savePFA_CTL_1); | ||
402 | I915_WRITE(PFA_WIN_SZ, dev_priv->savePFA_WIN_SZ); | ||
403 | I915_WRITE(PFA_WIN_POS, dev_priv->savePFA_WIN_POS); | ||
404 | |||
405 | I915_WRITE(TRANS_HTOTAL_A, dev_priv->saveTRANS_HTOTAL_A); | ||
406 | I915_WRITE(TRANS_HBLANK_A, dev_priv->saveTRANS_HBLANK_A); | ||
407 | I915_WRITE(TRANS_HSYNC_A, dev_priv->saveTRANS_HSYNC_A); | ||
408 | I915_WRITE(TRANS_VTOTAL_A, dev_priv->saveTRANS_VTOTAL_A); | ||
409 | I915_WRITE(TRANS_VBLANK_A, dev_priv->saveTRANS_VBLANK_A); | ||
410 | I915_WRITE(TRANS_VSYNC_A, dev_priv->saveTRANS_VSYNC_A); | ||
411 | } | ||
321 | 412 | ||
322 | /* Restore plane info */ | 413 | /* Restore plane info */ |
323 | I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE); | 414 | I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE); |
@@ -339,14 +430,14 @@ static void i915_restore_modeset_reg(struct drm_device *dev) | |||
339 | 430 | ||
340 | /* Pipe & plane B info */ | 431 | /* Pipe & plane B info */ |
341 | if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) { | 432 | if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) { |
342 | I915_WRITE(DPLL_B, dev_priv->saveDPLL_B & | 433 | I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B & |
343 | ~DPLL_VCO_ENABLE); | 434 | ~DPLL_VCO_ENABLE); |
344 | DRM_UDELAY(150); | 435 | DRM_UDELAY(150); |
345 | } | 436 | } |
346 | I915_WRITE(FPB0, dev_priv->saveFPB0); | 437 | I915_WRITE(fpb0_reg, dev_priv->saveFPB0); |
347 | I915_WRITE(FPB1, dev_priv->saveFPB1); | 438 | I915_WRITE(fpb1_reg, dev_priv->saveFPB1); |
348 | /* Actually enable it */ | 439 | /* Actually enable it */ |
349 | I915_WRITE(DPLL_B, dev_priv->saveDPLL_B); | 440 | I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B); |
350 | DRM_UDELAY(150); | 441 | DRM_UDELAY(150); |
351 | if (IS_I965G(dev)) | 442 | if (IS_I965G(dev)) |
352 | I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD); | 443 | I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD); |
@@ -359,7 +450,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev) | |||
359 | I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B); | 450 | I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B); |
360 | I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B); | 451 | I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B); |
361 | I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B); | 452 | I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B); |
362 | I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B); | 453 | if (!IS_IGDNG(dev)) |
454 | I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B); | ||
455 | |||
456 | if (IS_IGDNG(dev)) { | ||
457 | I915_WRITE(FDI_RXB_CTL, dev_priv->saveFDI_RXB_CTL); | ||
458 | I915_WRITE(FDI_TXB_CTL, dev_priv->saveFDI_TXB_CTL); | ||
459 | |||
460 | I915_WRITE(PFB_CTL_1, dev_priv->savePFB_CTL_1); | ||
461 | I915_WRITE(PFB_WIN_SZ, dev_priv->savePFB_WIN_SZ); | ||
462 | I915_WRITE(PFB_WIN_POS, dev_priv->savePFB_WIN_POS); | ||
463 | |||
464 | I915_WRITE(TRANS_HTOTAL_B, dev_priv->saveTRANS_HTOTAL_B); | ||
465 | I915_WRITE(TRANS_HBLANK_B, dev_priv->saveTRANS_HBLANK_B); | ||
466 | I915_WRITE(TRANS_HSYNC_B, dev_priv->saveTRANS_HSYNC_B); | ||
467 | I915_WRITE(TRANS_VTOTAL_B, dev_priv->saveTRANS_VTOTAL_B); | ||
468 | I915_WRITE(TRANS_VBLANK_B, dev_priv->saveTRANS_VBLANK_B); | ||
469 | I915_WRITE(TRANS_VSYNC_B, dev_priv->saveTRANS_VSYNC_B); | ||
470 | } | ||
363 | 471 | ||
364 | /* Restore plane info */ | 472 | /* Restore plane info */ |
365 | I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE); | 473 | I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE); |
@@ -404,21 +512,43 @@ void i915_save_display(struct drm_device *dev) | |||
404 | dev_priv->saveCURSIZE = I915_READ(CURSIZE); | 512 | dev_priv->saveCURSIZE = I915_READ(CURSIZE); |
405 | 513 | ||
406 | /* CRT state */ | 514 | /* CRT state */ |
407 | dev_priv->saveADPA = I915_READ(ADPA); | 515 | if (IS_IGDNG(dev)) { |
516 | dev_priv->saveADPA = I915_READ(PCH_ADPA); | ||
517 | } else { | ||
518 | dev_priv->saveADPA = I915_READ(ADPA); | ||
519 | } | ||
408 | 520 | ||
409 | /* LVDS state */ | 521 | /* LVDS state */ |
410 | dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); | 522 | if (IS_IGDNG(dev)) { |
411 | dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); | 523 | dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL); |
412 | dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); | 524 | dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1); |
413 | if (IS_I965G(dev)) | 525 | dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2); |
414 | dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); | 526 | dev_priv->saveBLC_CPU_PWM_CTL = I915_READ(BLC_PWM_CPU_CTL); |
415 | if (IS_MOBILE(dev) && !IS_I830(dev)) | 527 | dev_priv->saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2); |
416 | dev_priv->saveLVDS = I915_READ(LVDS); | 528 | dev_priv->saveLVDS = I915_READ(PCH_LVDS); |
417 | if (!IS_I830(dev) && !IS_845G(dev)) | 529 | } else { |
530 | dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); | ||
531 | dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); | ||
532 | dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); | ||
533 | dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL); | ||
534 | if (IS_I965G(dev)) | ||
535 | dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); | ||
536 | if (IS_MOBILE(dev) && !IS_I830(dev)) | ||
537 | dev_priv->saveLVDS = I915_READ(LVDS); | ||
538 | } | ||
539 | |||
540 | if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev)) | ||
418 | dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL); | 541 | dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL); |
419 | dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); | 542 | |
420 | dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); | 543 | if (IS_IGDNG(dev)) { |
421 | dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); | 544 | dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS); |
545 | dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS); | ||
546 | dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR); | ||
547 | } else { | ||
548 | dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); | ||
549 | dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); | ||
550 | dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); | ||
551 | } | ||
422 | 552 | ||
423 | /* Display Port state */ | 553 | /* Display Port state */ |
424 | if (SUPPORTS_INTEGRATED_DP(dev)) { | 554 | if (SUPPORTS_INTEGRATED_DP(dev)) { |
@@ -437,16 +567,23 @@ void i915_save_display(struct drm_device *dev) | |||
437 | /* FIXME: save TV & SDVO state */ | 567 | /* FIXME: save TV & SDVO state */ |
438 | 568 | ||
439 | /* FBC state */ | 569 | /* FBC state */ |
440 | dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE); | 570 | if (IS_GM45(dev)) { |
441 | dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE); | 571 | dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE); |
442 | dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2); | 572 | } else { |
443 | dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL); | 573 | dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE); |
574 | dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE); | ||
575 | dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2); | ||
576 | dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL); | ||
577 | } | ||
444 | 578 | ||
445 | /* VGA state */ | 579 | /* VGA state */ |
446 | dev_priv->saveVGA0 = I915_READ(VGA0); | 580 | dev_priv->saveVGA0 = I915_READ(VGA0); |
447 | dev_priv->saveVGA1 = I915_READ(VGA1); | 581 | dev_priv->saveVGA1 = I915_READ(VGA1); |
448 | dev_priv->saveVGA_PD = I915_READ(VGA_PD); | 582 | dev_priv->saveVGA_PD = I915_READ(VGA_PD); |
449 | dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); | 583 | if (IS_IGDNG(dev)) |
584 | dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL); | ||
585 | else | ||
586 | dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); | ||
450 | 587 | ||
451 | i915_save_vga(dev); | 588 | i915_save_vga(dev); |
452 | } | 589 | } |
@@ -485,22 +622,41 @@ void i915_restore_display(struct drm_device *dev) | |||
485 | I915_WRITE(CURSIZE, dev_priv->saveCURSIZE); | 622 | I915_WRITE(CURSIZE, dev_priv->saveCURSIZE); |
486 | 623 | ||
487 | /* CRT state */ | 624 | /* CRT state */ |
488 | I915_WRITE(ADPA, dev_priv->saveADPA); | 625 | if (IS_IGDNG(dev)) |
626 | I915_WRITE(PCH_ADPA, dev_priv->saveADPA); | ||
627 | else | ||
628 | I915_WRITE(ADPA, dev_priv->saveADPA); | ||
489 | 629 | ||
490 | /* LVDS state */ | 630 | /* LVDS state */ |
491 | if (IS_I965G(dev)) | 631 | if (IS_I965G(dev) && !IS_IGDNG(dev)) |
492 | I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2); | 632 | I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2); |
493 | if (IS_MOBILE(dev) && !IS_I830(dev)) | 633 | |
634 | if (IS_IGDNG(dev)) { | ||
635 | I915_WRITE(PCH_LVDS, dev_priv->saveLVDS); | ||
636 | } else if (IS_MOBILE(dev) && !IS_I830(dev)) | ||
494 | I915_WRITE(LVDS, dev_priv->saveLVDS); | 637 | I915_WRITE(LVDS, dev_priv->saveLVDS); |
495 | if (!IS_I830(dev) && !IS_845G(dev)) | 638 | |
639 | if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev)) | ||
496 | I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL); | 640 | I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL); |
497 | 641 | ||
498 | I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); | 642 | if (IS_IGDNG(dev)) { |
499 | I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); | 643 | I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL); |
500 | I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); | 644 | I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2); |
501 | I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); | 645 | I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL); |
502 | I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); | 646 | I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2); |
503 | I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); | 647 | I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); |
648 | I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); | ||
649 | I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR); | ||
650 | I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL); | ||
651 | } else { | ||
652 | I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); | ||
653 | I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); | ||
654 | I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL); | ||
655 | I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); | ||
656 | I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); | ||
657 | I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); | ||
658 | I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); | ||
659 | } | ||
504 | 660 | ||
505 | /* Display Port state */ | 661 | /* Display Port state */ |
506 | if (SUPPORTS_INTEGRATED_DP(dev)) { | 662 | if (SUPPORTS_INTEGRATED_DP(dev)) { |
@@ -511,13 +667,22 @@ void i915_restore_display(struct drm_device *dev) | |||
511 | /* FIXME: restore TV & SDVO state */ | 667 | /* FIXME: restore TV & SDVO state */ |
512 | 668 | ||
513 | /* FBC info */ | 669 | /* FBC info */ |
514 | I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); | 670 | if (IS_GM45(dev)) { |
515 | I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); | 671 | g4x_disable_fbc(dev); |
516 | I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); | 672 | I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE); |
517 | I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL); | 673 | } else { |
674 | i8xx_disable_fbc(dev); | ||
675 | I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); | ||
676 | I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); | ||
677 | I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); | ||
678 | I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL); | ||
679 | } | ||
518 | 680 | ||
519 | /* VGA state */ | 681 | /* VGA state */ |
520 | I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); | 682 | if (IS_IGDNG(dev)) |
683 | I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL); | ||
684 | else | ||
685 | I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); | ||
521 | I915_WRITE(VGA0, dev_priv->saveVGA0); | 686 | I915_WRITE(VGA0, dev_priv->saveVGA0); |
522 | I915_WRITE(VGA1, dev_priv->saveVGA1); | 687 | I915_WRITE(VGA1, dev_priv->saveVGA1); |
523 | I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); | 688 | I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); |
@@ -543,8 +708,17 @@ int i915_save_state(struct drm_device *dev) | |||
543 | i915_save_display(dev); | 708 | i915_save_display(dev); |
544 | 709 | ||
545 | /* Interrupt state */ | 710 | /* Interrupt state */ |
546 | dev_priv->saveIER = I915_READ(IER); | 711 | if (IS_IGDNG(dev)) { |
547 | dev_priv->saveIMR = I915_READ(IMR); | 712 | dev_priv->saveDEIER = I915_READ(DEIER); |
713 | dev_priv->saveDEIMR = I915_READ(DEIMR); | ||
714 | dev_priv->saveGTIER = I915_READ(GTIER); | ||
715 | dev_priv->saveGTIMR = I915_READ(GTIMR); | ||
716 | dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR); | ||
717 | dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR); | ||
718 | } else { | ||
719 | dev_priv->saveIER = I915_READ(IER); | ||
720 | dev_priv->saveIMR = I915_READ(IMR); | ||
721 | } | ||
548 | 722 | ||
549 | /* Clock gating state */ | 723 | /* Clock gating state */ |
550 | dev_priv->saveD_STATE = I915_READ(D_STATE); | 724 | dev_priv->saveD_STATE = I915_READ(D_STATE); |
@@ -609,8 +783,17 @@ int i915_restore_state(struct drm_device *dev) | |||
609 | i915_restore_display(dev); | 783 | i915_restore_display(dev); |
610 | 784 | ||
611 | /* Interrupt state */ | 785 | /* Interrupt state */ |
612 | I915_WRITE (IER, dev_priv->saveIER); | 786 | if (IS_IGDNG(dev)) { |
613 | I915_WRITE (IMR, dev_priv->saveIMR); | 787 | I915_WRITE(DEIER, dev_priv->saveDEIER); |
788 | I915_WRITE(DEIMR, dev_priv->saveDEIMR); | ||
789 | I915_WRITE(GTIER, dev_priv->saveGTIER); | ||
790 | I915_WRITE(GTIMR, dev_priv->saveGTIMR); | ||
791 | I915_WRITE(FDI_RXA_IMR, dev_priv->saveFDI_RXA_IMR); | ||
792 | I915_WRITE(FDI_RXB_IMR, dev_priv->saveFDI_RXB_IMR); | ||
793 | } else { | ||
794 | I915_WRITE (IER, dev_priv->saveIER); | ||
795 | I915_WRITE (IMR, dev_priv->saveIMR); | ||
796 | } | ||
614 | 797 | ||
615 | /* Clock gating state */ | 798 | /* Clock gating state */ |
616 | I915_WRITE (D_STATE, dev_priv->saveD_STATE); | 799 | I915_WRITE (D_STATE, dev_priv->saveD_STATE); |
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c index 4337414846b6..96cd256e60e6 100644 --- a/drivers/gpu/drm/i915/intel_bios.c +++ b/drivers/gpu/drm/i915/intel_bios.c | |||
@@ -351,20 +351,18 @@ parse_driver_features(struct drm_i915_private *dev_priv, | |||
351 | struct drm_device *dev = dev_priv->dev; | 351 | struct drm_device *dev = dev_priv->dev; |
352 | struct bdb_driver_features *driver; | 352 | struct bdb_driver_features *driver; |
353 | 353 | ||
354 | /* set default for chips without eDP */ | ||
355 | if (!SUPPORTS_EDP(dev)) { | ||
356 | dev_priv->edp_support = 0; | ||
357 | return; | ||
358 | } | ||
359 | |||
360 | driver = find_section(bdb, BDB_DRIVER_FEATURES); | 354 | driver = find_section(bdb, BDB_DRIVER_FEATURES); |
361 | if (!driver) | 355 | if (!driver) |
362 | return; | 356 | return; |
363 | 357 | ||
364 | if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) | 358 | if (driver && SUPPORTS_EDP(dev) && |
359 | driver->lvds_config == BDB_DRIVER_FEATURE_EDP) { | ||
365 | dev_priv->edp_support = 1; | 360 | dev_priv->edp_support = 1; |
361 | } else { | ||
362 | dev_priv->edp_support = 0; | ||
363 | } | ||
366 | 364 | ||
367 | if (driver->dual_frequency) | 365 | if (driver && driver->dual_frequency) |
368 | dev_priv->render_reclock_avail = true; | 366 | dev_priv->render_reclock_avail = true; |
369 | } | 367 | } |
370 | 368 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3c14240cc002..3ba6546b7c7f 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -943,6 +943,7 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc, | |||
943 | clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2); | 943 | clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2); |
944 | clock.p = (clock.p1 * clock.p2); | 944 | clock.p = (clock.p1 * clock.p2); |
945 | clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p; | 945 | clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p; |
946 | clock.vco = 0; | ||
946 | memcpy(best_clock, &clock, sizeof(intel_clock_t)); | 947 | memcpy(best_clock, &clock, sizeof(intel_clock_t)); |
947 | return true; | 948 | return true; |
948 | } | 949 | } |
@@ -1260,9 +1261,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y, | |||
1260 | return ret; | 1261 | return ret; |
1261 | } | 1262 | } |
1262 | 1263 | ||
1263 | /* Pre-i965 needs to install a fence for tiled scan-out */ | 1264 | /* Install a fence for tiled scan-out. Pre-i965 always needs a fence, |
1264 | if (!IS_I965G(dev) && | 1265 | * whereas 965+ only requires a fence if using framebuffer compression. |
1265 | obj_priv->fence_reg == I915_FENCE_REG_NONE && | 1266 | * For simplicity, we always install a fence as the cost is not that onerous. |
1267 | */ | ||
1268 | if (obj_priv->fence_reg == I915_FENCE_REG_NONE && | ||
1266 | obj_priv->tiling_mode != I915_TILING_NONE) { | 1269 | obj_priv->tiling_mode != I915_TILING_NONE) { |
1267 | ret = i915_gem_object_get_fence_reg(obj); | 1270 | ret = i915_gem_object_get_fence_reg(obj); |
1268 | if (ret != 0) { | 1271 | if (ret != 0) { |
@@ -1513,7 +1516,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
1513 | /* Enable panel fitting for LVDS */ | 1516 | /* Enable panel fitting for LVDS */ |
1514 | if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { | 1517 | if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { |
1515 | temp = I915_READ(pf_ctl_reg); | 1518 | temp = I915_READ(pf_ctl_reg); |
1516 | I915_WRITE(pf_ctl_reg, temp | PF_ENABLE); | 1519 | I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3); |
1517 | 1520 | ||
1518 | /* currently full aspect */ | 1521 | /* currently full aspect */ |
1519 | I915_WRITE(pf_win_pos, 0); | 1522 | I915_WRITE(pf_win_pos, 0); |
@@ -1801,6 +1804,8 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
1801 | case DRM_MODE_DPMS_ON: | 1804 | case DRM_MODE_DPMS_ON: |
1802 | case DRM_MODE_DPMS_STANDBY: | 1805 | case DRM_MODE_DPMS_STANDBY: |
1803 | case DRM_MODE_DPMS_SUSPEND: | 1806 | case DRM_MODE_DPMS_SUSPEND: |
1807 | intel_update_watermarks(dev); | ||
1808 | |||
1804 | /* Enable the DPLL */ | 1809 | /* Enable the DPLL */ |
1805 | temp = I915_READ(dpll_reg); | 1810 | temp = I915_READ(dpll_reg); |
1806 | if ((temp & DPLL_VCO_ENABLE) == 0) { | 1811 | if ((temp & DPLL_VCO_ENABLE) == 0) { |
@@ -1838,7 +1843,6 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
1838 | 1843 | ||
1839 | /* Give the overlay scaler a chance to enable if it's on this pipe */ | 1844 | /* Give the overlay scaler a chance to enable if it's on this pipe */ |
1840 | //intel_crtc_dpms_video(crtc, true); TODO | 1845 | //intel_crtc_dpms_video(crtc, true); TODO |
1841 | intel_update_watermarks(dev); | ||
1842 | break; | 1846 | break; |
1843 | case DRM_MODE_DPMS_OFF: | 1847 | case DRM_MODE_DPMS_OFF: |
1844 | intel_update_watermarks(dev); | 1848 | intel_update_watermarks(dev); |
@@ -2082,7 +2086,7 @@ fdi_reduce_ratio(u32 *num, u32 *den) | |||
2082 | #define LINK_N 0x80000 | 2086 | #define LINK_N 0x80000 |
2083 | 2087 | ||
2084 | static void | 2088 | static void |
2085 | igdng_compute_m_n(int bytes_per_pixel, int nlanes, | 2089 | igdng_compute_m_n(int bits_per_pixel, int nlanes, |
2086 | int pixel_clock, int link_clock, | 2090 | int pixel_clock, int link_clock, |
2087 | struct fdi_m_n *m_n) | 2091 | struct fdi_m_n *m_n) |
2088 | { | 2092 | { |
@@ -2092,7 +2096,8 @@ igdng_compute_m_n(int bytes_per_pixel, int nlanes, | |||
2092 | 2096 | ||
2093 | temp = (u64) DATA_N * pixel_clock; | 2097 | temp = (u64) DATA_N * pixel_clock; |
2094 | temp = div_u64(temp, link_clock); | 2098 | temp = div_u64(temp, link_clock); |
2095 | m_n->gmch_m = div_u64(temp * bytes_per_pixel, nlanes); | 2099 | m_n->gmch_m = div_u64(temp * bits_per_pixel, nlanes); |
2100 | m_n->gmch_m >>= 3; /* convert to bytes_per_pixel */ | ||
2096 | m_n->gmch_n = DATA_N; | 2101 | m_n->gmch_n = DATA_N; |
2097 | fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); | 2102 | fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); |
2098 | 2103 | ||
@@ -2140,6 +2145,13 @@ static struct intel_watermark_params igd_cursor_hplloff_wm = { | |||
2140 | IGD_CURSOR_GUARD_WM, | 2145 | IGD_CURSOR_GUARD_WM, |
2141 | IGD_FIFO_LINE_SIZE | 2146 | IGD_FIFO_LINE_SIZE |
2142 | }; | 2147 | }; |
2148 | static struct intel_watermark_params g4x_wm_info = { | ||
2149 | G4X_FIFO_SIZE, | ||
2150 | G4X_MAX_WM, | ||
2151 | G4X_MAX_WM, | ||
2152 | 2, | ||
2153 | G4X_FIFO_LINE_SIZE, | ||
2154 | }; | ||
2143 | static struct intel_watermark_params i945_wm_info = { | 2155 | static struct intel_watermark_params i945_wm_info = { |
2144 | I945_FIFO_SIZE, | 2156 | I945_FIFO_SIZE, |
2145 | I915_MAX_WM, | 2157 | I915_MAX_WM, |
@@ -2430,17 +2442,74 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane) | |||
2430 | return size; | 2442 | return size; |
2431 | } | 2443 | } |
2432 | 2444 | ||
2433 | static void g4x_update_wm(struct drm_device *dev, int unused, int unused2, | 2445 | static void g4x_update_wm(struct drm_device *dev, int planea_clock, |
2434 | int unused3, int unused4) | 2446 | int planeb_clock, int sr_hdisplay, int pixel_size) |
2435 | { | 2447 | { |
2436 | struct drm_i915_private *dev_priv = dev->dev_private; | 2448 | struct drm_i915_private *dev_priv = dev->dev_private; |
2437 | u32 fw_blc_self = I915_READ(FW_BLC_SELF); | 2449 | int total_size, cacheline_size; |
2450 | int planea_wm, planeb_wm, cursora_wm, cursorb_wm, cursor_sr; | ||
2451 | struct intel_watermark_params planea_params, planeb_params; | ||
2452 | unsigned long line_time_us; | ||
2453 | int sr_clock, sr_entries = 0, entries_required; | ||
2438 | 2454 | ||
2439 | if (i915_powersave) | 2455 | /* Create copies of the base settings for each pipe */ |
2440 | fw_blc_self |= FW_BLC_SELF_EN; | 2456 | planea_params = planeb_params = g4x_wm_info; |
2441 | else | 2457 | |
2442 | fw_blc_self &= ~FW_BLC_SELF_EN; | 2458 | /* Grab a couple of global values before we overwrite them */ |
2443 | I915_WRITE(FW_BLC_SELF, fw_blc_self); | 2459 | total_size = planea_params.fifo_size; |
2460 | cacheline_size = planea_params.cacheline_size; | ||
2461 | |||
2462 | /* | ||
2463 | * Note: we need to make sure we don't overflow for various clock & | ||
2464 | * latency values. | ||
2465 | * clocks go from a few thousand to several hundred thousand. | ||
2466 | * latency is usually a few thousand | ||
2467 | */ | ||
2468 | entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) / | ||
2469 | 1000; | ||
2470 | entries_required /= G4X_FIFO_LINE_SIZE; | ||
2471 | planea_wm = entries_required + planea_params.guard_size; | ||
2472 | |||
2473 | entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) / | ||
2474 | 1000; | ||
2475 | entries_required /= G4X_FIFO_LINE_SIZE; | ||
2476 | planeb_wm = entries_required + planeb_params.guard_size; | ||
2477 | |||
2478 | cursora_wm = cursorb_wm = 16; | ||
2479 | cursor_sr = 32; | ||
2480 | |||
2481 | DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm); | ||
2482 | |||
2483 | /* Calc sr entries for one plane configs */ | ||
2484 | if (sr_hdisplay && (!planea_clock || !planeb_clock)) { | ||
2485 | /* self-refresh has much higher latency */ | ||
2486 | const static int sr_latency_ns = 12000; | ||
2487 | |||
2488 | sr_clock = planea_clock ? planea_clock : planeb_clock; | ||
2489 | line_time_us = ((sr_hdisplay * 1000) / sr_clock); | ||
2490 | |||
2491 | /* Use ns/us then divide to preserve precision */ | ||
2492 | sr_entries = (((sr_latency_ns / line_time_us) + 1) * | ||
2493 | pixel_size * sr_hdisplay) / 1000; | ||
2494 | sr_entries = roundup(sr_entries / cacheline_size, 1); | ||
2495 | DRM_DEBUG("self-refresh entries: %d\n", sr_entries); | ||
2496 | I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN); | ||
2497 | } | ||
2498 | |||
2499 | DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n", | ||
2500 | planea_wm, planeb_wm, sr_entries); | ||
2501 | |||
2502 | planea_wm &= 0x3f; | ||
2503 | planeb_wm &= 0x3f; | ||
2504 | |||
2505 | I915_WRITE(DSPFW1, (sr_entries << DSPFW_SR_SHIFT) | | ||
2506 | (cursorb_wm << DSPFW_CURSORB_SHIFT) | | ||
2507 | (planeb_wm << DSPFW_PLANEB_SHIFT) | planea_wm); | ||
2508 | I915_WRITE(DSPFW2, (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) | | ||
2509 | (cursora_wm << DSPFW_CURSORA_SHIFT)); | ||
2510 | /* HPLL off in SR has some issues on G4x... disable it */ | ||
2511 | I915_WRITE(DSPFW3, (I915_READ(DSPFW3) & ~DSPFW_HPLL_SR_EN) | | ||
2512 | (cursor_sr << DSPFW_CURSOR_SR_SHIFT)); | ||
2444 | } | 2513 | } |
2445 | 2514 | ||
2446 | static void i965_update_wm(struct drm_device *dev, int unused, int unused2, | 2515 | static void i965_update_wm(struct drm_device *dev, int unused, int unused2, |
@@ -2586,6 +2655,9 @@ static void intel_update_watermarks(struct drm_device *dev) | |||
2586 | unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0; | 2655 | unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0; |
2587 | int enabled = 0, pixel_size = 0; | 2656 | int enabled = 0, pixel_size = 0; |
2588 | 2657 | ||
2658 | if (!dev_priv->display.update_wm) | ||
2659 | return; | ||
2660 | |||
2589 | /* Get the clock config from both planes */ | 2661 | /* Get the clock config from both planes */ |
2590 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { | 2662 | list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { |
2591 | intel_crtc = to_intel_crtc(crtc); | 2663 | intel_crtc = to_intel_crtc(crtc); |
@@ -2763,7 +2835,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2763 | 2835 | ||
2764 | /* FDI link */ | 2836 | /* FDI link */ |
2765 | if (IS_IGDNG(dev)) { | 2837 | if (IS_IGDNG(dev)) { |
2766 | int lane, link_bw; | 2838 | int lane, link_bw, bpp; |
2767 | /* eDP doesn't require FDI link, so just set DP M/N | 2839 | /* eDP doesn't require FDI link, so just set DP M/N |
2768 | according to current link config */ | 2840 | according to current link config */ |
2769 | if (is_edp) { | 2841 | if (is_edp) { |
@@ -2782,10 +2854,72 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2782 | lane = 4; | 2854 | lane = 4; |
2783 | link_bw = 270000; | 2855 | link_bw = 270000; |
2784 | } | 2856 | } |
2785 | igdng_compute_m_n(3, lane, target_clock, | 2857 | |
2858 | /* determine panel color depth */ | ||
2859 | temp = I915_READ(pipeconf_reg); | ||
2860 | |||
2861 | switch (temp & PIPE_BPC_MASK) { | ||
2862 | case PIPE_8BPC: | ||
2863 | bpp = 24; | ||
2864 | break; | ||
2865 | case PIPE_10BPC: | ||
2866 | bpp = 30; | ||
2867 | break; | ||
2868 | case PIPE_6BPC: | ||
2869 | bpp = 18; | ||
2870 | break; | ||
2871 | case PIPE_12BPC: | ||
2872 | bpp = 36; | ||
2873 | break; | ||
2874 | default: | ||
2875 | DRM_ERROR("unknown pipe bpc value\n"); | ||
2876 | bpp = 24; | ||
2877 | } | ||
2878 | |||
2879 | igdng_compute_m_n(bpp, lane, target_clock, | ||
2786 | link_bw, &m_n); | 2880 | link_bw, &m_n); |
2787 | } | 2881 | } |
2788 | 2882 | ||
2883 | /* Ironlake: try to setup display ref clock before DPLL | ||
2884 | * enabling. This is only under driver's control after | ||
2885 | * PCH B stepping, previous chipset stepping should be | ||
2886 | * ignoring this setting. | ||
2887 | */ | ||
2888 | if (IS_IGDNG(dev)) { | ||
2889 | temp = I915_READ(PCH_DREF_CONTROL); | ||
2890 | /* Always enable nonspread source */ | ||
2891 | temp &= ~DREF_NONSPREAD_SOURCE_MASK; | ||
2892 | temp |= DREF_NONSPREAD_SOURCE_ENABLE; | ||
2893 | I915_WRITE(PCH_DREF_CONTROL, temp); | ||
2894 | POSTING_READ(PCH_DREF_CONTROL); | ||
2895 | |||
2896 | temp &= ~DREF_SSC_SOURCE_MASK; | ||
2897 | temp |= DREF_SSC_SOURCE_ENABLE; | ||
2898 | I915_WRITE(PCH_DREF_CONTROL, temp); | ||
2899 | POSTING_READ(PCH_DREF_CONTROL); | ||
2900 | |||
2901 | udelay(200); | ||
2902 | |||
2903 | if (is_edp) { | ||
2904 | if (dev_priv->lvds_use_ssc) { | ||
2905 | temp |= DREF_SSC1_ENABLE; | ||
2906 | I915_WRITE(PCH_DREF_CONTROL, temp); | ||
2907 | POSTING_READ(PCH_DREF_CONTROL); | ||
2908 | |||
2909 | udelay(200); | ||
2910 | |||
2911 | temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK; | ||
2912 | temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD; | ||
2913 | I915_WRITE(PCH_DREF_CONTROL, temp); | ||
2914 | POSTING_READ(PCH_DREF_CONTROL); | ||
2915 | } else { | ||
2916 | temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD; | ||
2917 | I915_WRITE(PCH_DREF_CONTROL, temp); | ||
2918 | POSTING_READ(PCH_DREF_CONTROL); | ||
2919 | } | ||
2920 | } | ||
2921 | } | ||
2922 | |||
2789 | if (IS_IGD(dev)) { | 2923 | if (IS_IGD(dev)) { |
2790 | fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2; | 2924 | fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2; |
2791 | if (has_reduced_clock) | 2925 | if (has_reduced_clock) |
@@ -2936,6 +3070,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, | |||
2936 | 3070 | ||
2937 | lvds = I915_READ(lvds_reg); | 3071 | lvds = I915_READ(lvds_reg); |
2938 | lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; | 3072 | lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; |
3073 | /* set the corresponsding LVDS_BORDER bit */ | ||
3074 | lvds |= dev_priv->lvds_border_bits; | ||
2939 | /* Set the B0-B3 data pairs corresponding to whether we're going to | 3075 | /* Set the B0-B3 data pairs corresponding to whether we're going to |
2940 | * set the DPLLs for dual-channel mode or not. | 3076 | * set the DPLLs for dual-channel mode or not. |
2941 | */ | 3077 | */ |
@@ -4124,7 +4260,9 @@ void intel_init_clock_gating(struct drm_device *dev) | |||
4124 | * Disable clock gating reported to work incorrectly according to the | 4260 | * Disable clock gating reported to work incorrectly according to the |
4125 | * specs, but enable as much else as we can. | 4261 | * specs, but enable as much else as we can. |
4126 | */ | 4262 | */ |
4127 | if (IS_G4X(dev)) { | 4263 | if (IS_IGDNG(dev)) { |
4264 | return; | ||
4265 | } else if (IS_G4X(dev)) { | ||
4128 | uint32_t dspclk_gate; | 4266 | uint32_t dspclk_gate; |
4129 | I915_WRITE(RENCLK_GATE_D1, 0); | 4267 | I915_WRITE(RENCLK_GATE_D1, 0); |
4130 | I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE | | 4268 | I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE | |
@@ -4212,7 +4350,9 @@ static void intel_init_display(struct drm_device *dev) | |||
4212 | i830_get_display_clock_speed; | 4350 | i830_get_display_clock_speed; |
4213 | 4351 | ||
4214 | /* For FIFO watermark updates */ | 4352 | /* For FIFO watermark updates */ |
4215 | if (IS_G4X(dev)) | 4353 | if (IS_IGDNG(dev)) |
4354 | dev_priv->display.update_wm = NULL; | ||
4355 | else if (IS_G4X(dev)) | ||
4216 | dev_priv->display.update_wm = g4x_update_wm; | 4356 | dev_priv->display.update_wm = g4x_update_wm; |
4217 | else if (IS_I965G(dev)) | 4357 | else if (IS_I965G(dev)) |
4218 | dev_priv->display.update_wm = i965_update_wm; | 4358 | dev_priv->display.update_wm = i965_update_wm; |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index f4856a510476..d83447557f9b 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -400,7 +400,7 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name) | |||
400 | { | 400 | { |
401 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; | 401 | struct intel_dp_priv *dp_priv = intel_output->dev_priv; |
402 | 402 | ||
403 | DRM_ERROR("i2c_init %s\n", name); | 403 | DRM_DEBUG_KMS("i2c_init %s\n", name); |
404 | dp_priv->algo.running = false; | 404 | dp_priv->algo.running = false; |
405 | dp_priv->algo.address = 0; | 405 | dp_priv->algo.address = 0; |
406 | dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch; | 406 | dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch; |
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 98ae3d73577e..05598ae10c4b 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -380,7 +380,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
380 | adjusted_mode->crtc_vblank_start + vsync_pos; | 380 | adjusted_mode->crtc_vblank_start + vsync_pos; |
381 | /* keep the vsync width constant */ | 381 | /* keep the vsync width constant */ |
382 | adjusted_mode->crtc_vsync_end = | 382 | adjusted_mode->crtc_vsync_end = |
383 | adjusted_mode->crtc_vblank_start + vsync_width; | 383 | adjusted_mode->crtc_vsync_start + vsync_width; |
384 | border = 1; | 384 | border = 1; |
385 | break; | 385 | break; |
386 | case DRM_MODE_SCALE_ASPECT: | 386 | case DRM_MODE_SCALE_ASPECT: |
@@ -526,6 +526,14 @@ out: | |||
526 | lvds_priv->pfit_control = pfit_control; | 526 | lvds_priv->pfit_control = pfit_control; |
527 | lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; | 527 | lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; |
528 | /* | 528 | /* |
529 | * When there exists the border, it means that the LVDS_BORDR | ||
530 | * should be enabled. | ||
531 | */ | ||
532 | if (border) | ||
533 | dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE; | ||
534 | else | ||
535 | dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE); | ||
536 | /* | ||
529 | * XXX: It would be nice to support lower refresh rates on the | 537 | * XXX: It would be nice to support lower refresh rates on the |
530 | * panels to reduce power consumption, and perhaps match the | 538 | * panels to reduce power consumption, and perhaps match the |
531 | * user's requested refresh rate. | 539 | * user's requested refresh rate. |
@@ -656,6 +664,15 @@ static int intel_lvds_get_modes(struct drm_connector *connector) | |||
656 | return 0; | 664 | return 0; |
657 | } | 665 | } |
658 | 666 | ||
667 | /* | ||
668 | * Lid events. Note the use of 'modeset_on_lid': | ||
669 | * - we set it on lid close, and reset it on open | ||
670 | * - we use it as a "only once" bit (ie we ignore | ||
671 | * duplicate events where it was already properly | ||
672 | * set/reset) | ||
673 | * - the suspend/resume paths will also set it to | ||
674 | * zero, since they restore the mode ("lid open"). | ||
675 | */ | ||
659 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, | 676 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, |
660 | void *unused) | 677 | void *unused) |
661 | { | 678 | { |
@@ -663,13 +680,19 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val, | |||
663 | container_of(nb, struct drm_i915_private, lid_notifier); | 680 | container_of(nb, struct drm_i915_private, lid_notifier); |
664 | struct drm_device *dev = dev_priv->dev; | 681 | struct drm_device *dev = dev_priv->dev; |
665 | 682 | ||
666 | if (acpi_lid_open() && !dev_priv->suspended) { | 683 | if (!acpi_lid_open()) { |
667 | mutex_lock(&dev->mode_config.mutex); | 684 | dev_priv->modeset_on_lid = 1; |
668 | drm_helper_resume_force_mode(dev); | 685 | return NOTIFY_OK; |
669 | mutex_unlock(&dev->mode_config.mutex); | ||
670 | } | 686 | } |
671 | 687 | ||
672 | drm_sysfs_hotplug_event(dev_priv->dev); | 688 | if (!dev_priv->modeset_on_lid) |
689 | return NOTIFY_OK; | ||
690 | |||
691 | dev_priv->modeset_on_lid = 0; | ||
692 | |||
693 | mutex_lock(&dev->mode_config.mutex); | ||
694 | drm_helper_resume_force_mode(dev); | ||
695 | mutex_unlock(&dev->mode_config.mutex); | ||
673 | 696 | ||
674 | return NOTIFY_OK; | 697 | return NOTIFY_OK; |
675 | } | 698 | } |
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile index 09a28923f46e..b5713eedd6e1 100644 --- a/drivers/gpu/drm/radeon/Makefile +++ b/drivers/gpu/drm/radeon/Makefile | |||
@@ -49,7 +49,7 @@ radeon-y += radeon_device.o radeon_kms.o \ | |||
49 | radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ | 49 | radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ |
50 | rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ | 50 | rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ |
51 | r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ | 51 | r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ |
52 | r600_blit_kms.o | 52 | r600_blit_kms.o radeon_pm.o |
53 | 53 | ||
54 | radeon-$(CONFIG_COMPAT) += radeon_ioc32.o | 54 | radeon-$(CONFIG_COMPAT) += radeon_ioc32.o |
55 | 55 | ||
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h index 5d402086bc47..c11ddddfb3b6 100644 --- a/drivers/gpu/drm/radeon/atombios.h +++ b/drivers/gpu/drm/radeon/atombios.h | |||
@@ -2314,7 +2314,7 @@ typedef struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT { | |||
2314 | UCHAR ucSS_Step; | 2314 | UCHAR ucSS_Step; |
2315 | UCHAR ucSS_Delay; | 2315 | UCHAR ucSS_Delay; |
2316 | UCHAR ucSS_Id; | 2316 | UCHAR ucSS_Id; |
2317 | UCHAR ucRecommandedRef_Div; | 2317 | UCHAR ucRecommendedRef_Div; |
2318 | UCHAR ucSS_Range; /* it was reserved for V11 */ | 2318 | UCHAR ucSS_Range; /* it was reserved for V11 */ |
2319 | } ATOM_SPREAD_SPECTRUM_ASSIGNMENT; | 2319 | } ATOM_SPREAD_SPECTRUM_ASSIGNMENT; |
2320 | 2320 | ||
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 14fa9701aeb3..c15287a590ff 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -31,10 +31,6 @@ | |||
31 | #include "atom.h" | 31 | #include "atom.h" |
32 | #include "atom-bits.h" | 32 | #include "atom-bits.h" |
33 | 33 | ||
34 | /* evil but including atombios.h is much worse */ | ||
35 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | ||
36 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing, | ||
37 | int32_t *pixel_clock); | ||
38 | static void atombios_overscan_setup(struct drm_crtc *crtc, | 34 | static void atombios_overscan_setup(struct drm_crtc *crtc, |
39 | struct drm_display_mode *mode, | 35 | struct drm_display_mode *mode, |
40 | struct drm_display_mode *adjusted_mode) | 36 | struct drm_display_mode *adjusted_mode) |
@@ -248,18 +244,18 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
248 | 244 | ||
249 | switch (mode) { | 245 | switch (mode) { |
250 | case DRM_MODE_DPMS_ON: | 246 | case DRM_MODE_DPMS_ON: |
247 | atombios_enable_crtc(crtc, 1); | ||
251 | if (ASIC_IS_DCE3(rdev)) | 248 | if (ASIC_IS_DCE3(rdev)) |
252 | atombios_enable_crtc_memreq(crtc, 1); | 249 | atombios_enable_crtc_memreq(crtc, 1); |
253 | atombios_enable_crtc(crtc, 1); | ||
254 | atombios_blank_crtc(crtc, 0); | 250 | atombios_blank_crtc(crtc, 0); |
255 | break; | 251 | break; |
256 | case DRM_MODE_DPMS_STANDBY: | 252 | case DRM_MODE_DPMS_STANDBY: |
257 | case DRM_MODE_DPMS_SUSPEND: | 253 | case DRM_MODE_DPMS_SUSPEND: |
258 | case DRM_MODE_DPMS_OFF: | 254 | case DRM_MODE_DPMS_OFF: |
259 | atombios_blank_crtc(crtc, 1); | 255 | atombios_blank_crtc(crtc, 1); |
260 | atombios_enable_crtc(crtc, 0); | ||
261 | if (ASIC_IS_DCE3(rdev)) | 256 | if (ASIC_IS_DCE3(rdev)) |
262 | atombios_enable_crtc_memreq(crtc, 0); | 257 | atombios_enable_crtc_memreq(crtc, 0); |
258 | atombios_enable_crtc(crtc, 0); | ||
263 | break; | 259 | break; |
264 | } | 260 | } |
265 | 261 | ||
@@ -270,59 +266,147 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode) | |||
270 | 266 | ||
271 | static void | 267 | static void |
272 | atombios_set_crtc_dtd_timing(struct drm_crtc *crtc, | 268 | atombios_set_crtc_dtd_timing(struct drm_crtc *crtc, |
273 | SET_CRTC_USING_DTD_TIMING_PARAMETERS * crtc_param) | 269 | struct drm_display_mode *mode) |
274 | { | 270 | { |
271 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
275 | struct drm_device *dev = crtc->dev; | 272 | struct drm_device *dev = crtc->dev; |
276 | struct radeon_device *rdev = dev->dev_private; | 273 | struct radeon_device *rdev = dev->dev_private; |
277 | SET_CRTC_USING_DTD_TIMING_PARAMETERS conv_param; | 274 | SET_CRTC_USING_DTD_TIMING_PARAMETERS args; |
278 | int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_UsingDTDTiming); | 275 | int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_UsingDTDTiming); |
276 | u16 misc = 0; | ||
279 | 277 | ||
280 | conv_param.usH_Size = cpu_to_le16(crtc_param->usH_Size); | 278 | memset(&args, 0, sizeof(args)); |
281 | conv_param.usH_Blanking_Time = | 279 | args.usH_Size = cpu_to_le16(mode->crtc_hdisplay); |
282 | cpu_to_le16(crtc_param->usH_Blanking_Time); | 280 | args.usH_Blanking_Time = |
283 | conv_param.usV_Size = cpu_to_le16(crtc_param->usV_Size); | 281 | cpu_to_le16(mode->crtc_hblank_end - mode->crtc_hdisplay); |
284 | conv_param.usV_Blanking_Time = | 282 | args.usV_Size = cpu_to_le16(mode->crtc_vdisplay); |
285 | cpu_to_le16(crtc_param->usV_Blanking_Time); | 283 | args.usV_Blanking_Time = |
286 | conv_param.usH_SyncOffset = cpu_to_le16(crtc_param->usH_SyncOffset); | 284 | cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay); |
287 | conv_param.usH_SyncWidth = cpu_to_le16(crtc_param->usH_SyncWidth); | 285 | args.usH_SyncOffset = |
288 | conv_param.usV_SyncOffset = cpu_to_le16(crtc_param->usV_SyncOffset); | 286 | cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay); |
289 | conv_param.usV_SyncWidth = cpu_to_le16(crtc_param->usV_SyncWidth); | 287 | args.usH_SyncWidth = |
290 | conv_param.susModeMiscInfo.usAccess = | 288 | cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); |
291 | cpu_to_le16(crtc_param->susModeMiscInfo.usAccess); | 289 | args.usV_SyncOffset = |
292 | conv_param.ucCRTC = crtc_param->ucCRTC; | 290 | cpu_to_le16(mode->crtc_vsync_start - mode->crtc_vdisplay); |
291 | args.usV_SyncWidth = | ||
292 | cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start); | ||
293 | /*args.ucH_Border = mode->hborder;*/ | ||
294 | /*args.ucV_Border = mode->vborder;*/ | ||
295 | |||
296 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) | ||
297 | misc |= ATOM_VSYNC_POLARITY; | ||
298 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) | ||
299 | misc |= ATOM_HSYNC_POLARITY; | ||
300 | if (mode->flags & DRM_MODE_FLAG_CSYNC) | ||
301 | misc |= ATOM_COMPOSITESYNC; | ||
302 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
303 | misc |= ATOM_INTERLACE; | ||
304 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | ||
305 | misc |= ATOM_DOUBLE_CLOCK_MODE; | ||
306 | |||
307 | args.susModeMiscInfo.usAccess = cpu_to_le16(misc); | ||
308 | args.ucCRTC = radeon_crtc->crtc_id; | ||
293 | 309 | ||
294 | printk("executing set crtc dtd timing\n"); | 310 | printk("executing set crtc dtd timing\n"); |
295 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&conv_param); | 311 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
296 | } | 312 | } |
297 | 313 | ||
298 | void atombios_crtc_set_timing(struct drm_crtc *crtc, | 314 | static void atombios_crtc_set_timing(struct drm_crtc *crtc, |
299 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION * | 315 | struct drm_display_mode *mode) |
300 | crtc_param) | ||
301 | { | 316 | { |
317 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
302 | struct drm_device *dev = crtc->dev; | 318 | struct drm_device *dev = crtc->dev; |
303 | struct radeon_device *rdev = dev->dev_private; | 319 | struct radeon_device *rdev = dev->dev_private; |
304 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION conv_param; | 320 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION args; |
305 | int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing); | 321 | int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing); |
322 | u16 misc = 0; | ||
306 | 323 | ||
307 | conv_param.usH_Total = cpu_to_le16(crtc_param->usH_Total); | 324 | memset(&args, 0, sizeof(args)); |
308 | conv_param.usH_Disp = cpu_to_le16(crtc_param->usH_Disp); | 325 | args.usH_Total = cpu_to_le16(mode->crtc_htotal); |
309 | conv_param.usH_SyncStart = cpu_to_le16(crtc_param->usH_SyncStart); | 326 | args.usH_Disp = cpu_to_le16(mode->crtc_hdisplay); |
310 | conv_param.usH_SyncWidth = cpu_to_le16(crtc_param->usH_SyncWidth); | 327 | args.usH_SyncStart = cpu_to_le16(mode->crtc_hsync_start); |
311 | conv_param.usV_Total = cpu_to_le16(crtc_param->usV_Total); | 328 | args.usH_SyncWidth = |
312 | conv_param.usV_Disp = cpu_to_le16(crtc_param->usV_Disp); | 329 | cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start); |
313 | conv_param.usV_SyncStart = cpu_to_le16(crtc_param->usV_SyncStart); | 330 | args.usV_Total = cpu_to_le16(mode->crtc_vtotal); |
314 | conv_param.usV_SyncWidth = cpu_to_le16(crtc_param->usV_SyncWidth); | 331 | args.usV_Disp = cpu_to_le16(mode->crtc_vdisplay); |
315 | conv_param.susModeMiscInfo.usAccess = | 332 | args.usV_SyncStart = cpu_to_le16(mode->crtc_vsync_start); |
316 | cpu_to_le16(crtc_param->susModeMiscInfo.usAccess); | 333 | args.usV_SyncWidth = |
317 | conv_param.ucCRTC = crtc_param->ucCRTC; | 334 | cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start); |
318 | conv_param.ucOverscanRight = crtc_param->ucOverscanRight; | 335 | |
319 | conv_param.ucOverscanLeft = crtc_param->ucOverscanLeft; | 336 | if (mode->flags & DRM_MODE_FLAG_NVSYNC) |
320 | conv_param.ucOverscanBottom = crtc_param->ucOverscanBottom; | 337 | misc |= ATOM_VSYNC_POLARITY; |
321 | conv_param.ucOverscanTop = crtc_param->ucOverscanTop; | 338 | if (mode->flags & DRM_MODE_FLAG_NHSYNC) |
322 | conv_param.ucReserved = crtc_param->ucReserved; | 339 | misc |= ATOM_HSYNC_POLARITY; |
340 | if (mode->flags & DRM_MODE_FLAG_CSYNC) | ||
341 | misc |= ATOM_COMPOSITESYNC; | ||
342 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
343 | misc |= ATOM_INTERLACE; | ||
344 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | ||
345 | misc |= ATOM_DOUBLE_CLOCK_MODE; | ||
346 | |||
347 | args.susModeMiscInfo.usAccess = cpu_to_le16(misc); | ||
348 | args.ucCRTC = radeon_crtc->crtc_id; | ||
323 | 349 | ||
324 | printk("executing set crtc timing\n"); | 350 | printk("executing set crtc timing\n"); |
325 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&conv_param); | 351 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
352 | } | ||
353 | |||
354 | static void atombios_set_ss(struct drm_crtc *crtc, int enable) | ||
355 | { | ||
356 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | ||
357 | struct drm_device *dev = crtc->dev; | ||
358 | struct radeon_device *rdev = dev->dev_private; | ||
359 | struct drm_encoder *encoder = NULL; | ||
360 | struct radeon_encoder *radeon_encoder = NULL; | ||
361 | struct radeon_encoder_atom_dig *dig = NULL; | ||
362 | int index = GetIndexIntoMasterTable(COMMAND, EnableSpreadSpectrumOnPPLL); | ||
363 | ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION args; | ||
364 | ENABLE_LVDS_SS_PARAMETERS legacy_args; | ||
365 | uint16_t percentage = 0; | ||
366 | uint8_t type = 0, step = 0, delay = 0, range = 0; | ||
367 | |||
368 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | ||
369 | if (encoder->crtc == crtc) { | ||
370 | radeon_encoder = to_radeon_encoder(encoder); | ||
371 | /* only enable spread spectrum on LVDS */ | ||
372 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | ||
373 | dig = radeon_encoder->enc_priv; | ||
374 | if (dig && dig->ss) { | ||
375 | percentage = dig->ss->percentage; | ||
376 | type = dig->ss->type; | ||
377 | step = dig->ss->step; | ||
378 | delay = dig->ss->delay; | ||
379 | range = dig->ss->range; | ||
380 | } else if (enable) | ||
381 | return; | ||
382 | } else if (enable) | ||
383 | return; | ||
384 | break; | ||
385 | } | ||
386 | } | ||
387 | |||
388 | if (!radeon_encoder) | ||
389 | return; | ||
390 | |||
391 | if (ASIC_IS_AVIVO(rdev)) { | ||
392 | memset(&args, 0, sizeof(args)); | ||
393 | args.usSpreadSpectrumPercentage = cpu_to_le16(percentage); | ||
394 | args.ucSpreadSpectrumType = type; | ||
395 | args.ucSpreadSpectrumStep = step; | ||
396 | args.ucSpreadSpectrumDelay = delay; | ||
397 | args.ucSpreadSpectrumRange = range; | ||
398 | args.ucPpll = radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1; | ||
399 | args.ucEnable = enable; | ||
400 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
401 | } else { | ||
402 | memset(&legacy_args, 0, sizeof(legacy_args)); | ||
403 | legacy_args.usSpreadSpectrumPercentage = cpu_to_le16(percentage); | ||
404 | legacy_args.ucSpreadSpectrumType = type; | ||
405 | legacy_args.ucSpreadSpectrumStepSize_Delay = (step & 3) << 2; | ||
406 | legacy_args.ucSpreadSpectrumStepSize_Delay |= (delay & 7) << 4; | ||
407 | legacy_args.ucEnable = enable; | ||
408 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&legacy_args); | ||
409 | } | ||
326 | } | 410 | } |
327 | 411 | ||
328 | void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | 412 | void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) |
@@ -333,12 +417,13 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
333 | struct drm_encoder *encoder = NULL; | 417 | struct drm_encoder *encoder = NULL; |
334 | struct radeon_encoder *radeon_encoder = NULL; | 418 | struct radeon_encoder *radeon_encoder = NULL; |
335 | uint8_t frev, crev; | 419 | uint8_t frev, crev; |
336 | int index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); | 420 | int index; |
337 | SET_PIXEL_CLOCK_PS_ALLOCATION args; | 421 | SET_PIXEL_CLOCK_PS_ALLOCATION args; |
338 | PIXEL_CLOCK_PARAMETERS *spc1_ptr; | 422 | PIXEL_CLOCK_PARAMETERS *spc1_ptr; |
339 | PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr; | 423 | PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr; |
340 | PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr; | 424 | PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr; |
341 | uint32_t sclock = mode->clock; | 425 | uint32_t pll_clock = mode->clock; |
426 | uint32_t adjusted_clock; | ||
342 | uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; | 427 | uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; |
343 | struct radeon_pll *pll; | 428 | struct radeon_pll *pll; |
344 | int pll_flags = 0; | 429 | int pll_flags = 0; |
@@ -346,8 +431,6 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
346 | memset(&args, 0, sizeof(args)); | 431 | memset(&args, 0, sizeof(args)); |
347 | 432 | ||
348 | if (ASIC_IS_AVIVO(rdev)) { | 433 | if (ASIC_IS_AVIVO(rdev)) { |
349 | uint32_t ss_cntl; | ||
350 | |||
351 | if ((rdev->family == CHIP_RS600) || | 434 | if ((rdev->family == CHIP_RS600) || |
352 | (rdev->family == CHIP_RS690) || | 435 | (rdev->family == CHIP_RS690) || |
353 | (rdev->family == CHIP_RS740)) | 436 | (rdev->family == CHIP_RS740)) |
@@ -358,15 +441,6 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
358 | pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; | 441 | pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; |
359 | else | 442 | else |
360 | pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; | 443 | pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; |
361 | |||
362 | /* disable spread spectrum clocking for now -- thanks Hedy Lamarr */ | ||
363 | if (radeon_crtc->crtc_id == 0) { | ||
364 | ss_cntl = RREG32(AVIVO_P1PLL_INT_SS_CNTL); | ||
365 | WREG32(AVIVO_P1PLL_INT_SS_CNTL, ss_cntl & ~1); | ||
366 | } else { | ||
367 | ss_cntl = RREG32(AVIVO_P2PLL_INT_SS_CNTL); | ||
368 | WREG32(AVIVO_P2PLL_INT_SS_CNTL, ss_cntl & ~1); | ||
369 | } | ||
370 | } else { | 444 | } else { |
371 | pll_flags |= RADEON_PLL_LEGACY; | 445 | pll_flags |= RADEON_PLL_LEGACY; |
372 | 446 | ||
@@ -393,14 +467,43 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
393 | } | 467 | } |
394 | } | 468 | } |
395 | 469 | ||
470 | /* DCE3+ has an AdjustDisplayPll that will adjust the pixel clock | ||
471 | * accordingly based on the encoder/transmitter to work around | ||
472 | * special hw requirements. | ||
473 | */ | ||
474 | if (ASIC_IS_DCE3(rdev)) { | ||
475 | ADJUST_DISPLAY_PLL_PS_ALLOCATION adjust_pll_args; | ||
476 | |||
477 | if (!encoder) | ||
478 | return; | ||
479 | |||
480 | memset(&adjust_pll_args, 0, sizeof(adjust_pll_args)); | ||
481 | adjust_pll_args.usPixelClock = cpu_to_le16(mode->clock / 10); | ||
482 | adjust_pll_args.ucTransmitterID = radeon_encoder->encoder_id; | ||
483 | adjust_pll_args.ucEncodeMode = atombios_get_encoder_mode(encoder); | ||
484 | |||
485 | index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll); | ||
486 | atom_execute_table(rdev->mode_info.atom_context, | ||
487 | index, (uint32_t *)&adjust_pll_args); | ||
488 | adjusted_clock = le16_to_cpu(adjust_pll_args.usPixelClock) * 10; | ||
489 | } else { | ||
490 | /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ | ||
491 | if (ASIC_IS_AVIVO(rdev) && | ||
492 | (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1)) | ||
493 | adjusted_clock = mode->clock * 2; | ||
494 | else | ||
495 | adjusted_clock = mode->clock; | ||
496 | } | ||
497 | |||
396 | if (radeon_crtc->crtc_id == 0) | 498 | if (radeon_crtc->crtc_id == 0) |
397 | pll = &rdev->clock.p1pll; | 499 | pll = &rdev->clock.p1pll; |
398 | else | 500 | else |
399 | pll = &rdev->clock.p2pll; | 501 | pll = &rdev->clock.p2pll; |
400 | 502 | ||
401 | radeon_compute_pll(pll, mode->clock, &sclock, &fb_div, &frac_fb_div, | 503 | radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, |
402 | &ref_div, &post_div, pll_flags); | 504 | &ref_div, &post_div, pll_flags); |
403 | 505 | ||
506 | index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); | ||
404 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, | 507 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, |
405 | &crev); | 508 | &crev); |
406 | 509 | ||
@@ -409,7 +512,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
409 | switch (crev) { | 512 | switch (crev) { |
410 | case 1: | 513 | case 1: |
411 | spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput; | 514 | spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput; |
412 | spc1_ptr->usPixelClock = cpu_to_le16(sclock); | 515 | spc1_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); |
413 | spc1_ptr->usRefDiv = cpu_to_le16(ref_div); | 516 | spc1_ptr->usRefDiv = cpu_to_le16(ref_div); |
414 | spc1_ptr->usFbDiv = cpu_to_le16(fb_div); | 517 | spc1_ptr->usFbDiv = cpu_to_le16(fb_div); |
415 | spc1_ptr->ucFracFbDiv = frac_fb_div; | 518 | spc1_ptr->ucFracFbDiv = frac_fb_div; |
@@ -422,7 +525,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
422 | case 2: | 525 | case 2: |
423 | spc2_ptr = | 526 | spc2_ptr = |
424 | (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput; | 527 | (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput; |
425 | spc2_ptr->usPixelClock = cpu_to_le16(sclock); | 528 | spc2_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); |
426 | spc2_ptr->usRefDiv = cpu_to_le16(ref_div); | 529 | spc2_ptr->usRefDiv = cpu_to_le16(ref_div); |
427 | spc2_ptr->usFbDiv = cpu_to_le16(fb_div); | 530 | spc2_ptr->usFbDiv = cpu_to_le16(fb_div); |
428 | spc2_ptr->ucFracFbDiv = frac_fb_div; | 531 | spc2_ptr->ucFracFbDiv = frac_fb_div; |
@@ -437,7 +540,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
437 | return; | 540 | return; |
438 | spc3_ptr = | 541 | spc3_ptr = |
439 | (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput; | 542 | (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput; |
440 | spc3_ptr->usPixelClock = cpu_to_le16(sclock); | 543 | spc3_ptr->usPixelClock = cpu_to_le16(mode->clock / 10); |
441 | spc3_ptr->usRefDiv = cpu_to_le16(ref_div); | 544 | spc3_ptr->usRefDiv = cpu_to_le16(ref_div); |
442 | spc3_ptr->usFbDiv = cpu_to_le16(fb_div); | 545 | spc3_ptr->usFbDiv = cpu_to_le16(fb_div); |
443 | spc3_ptr->ucFracFbDiv = frac_fb_div; | 546 | spc3_ptr->ucFracFbDiv = frac_fb_div; |
@@ -527,6 +630,16 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
527 | WREG32(AVIVO_D1VGA_CONTROL, 0); | 630 | WREG32(AVIVO_D1VGA_CONTROL, 0); |
528 | else | 631 | else |
529 | WREG32(AVIVO_D2VGA_CONTROL, 0); | 632 | WREG32(AVIVO_D2VGA_CONTROL, 0); |
633 | |||
634 | if (rdev->family >= CHIP_RV770) { | ||
635 | if (radeon_crtc->crtc_id) { | ||
636 | WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0); | ||
637 | WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0); | ||
638 | } else { | ||
639 | WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0); | ||
640 | WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0); | ||
641 | } | ||
642 | } | ||
530 | WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, | 643 | WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, |
531 | (u32) fb_location); | 644 | (u32) fb_location); |
532 | WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + | 645 | WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + |
@@ -563,6 +676,10 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
563 | radeon_fb = to_radeon_framebuffer(old_fb); | 676 | radeon_fb = to_radeon_framebuffer(old_fb); |
564 | radeon_gem_object_unpin(radeon_fb->obj); | 677 | radeon_gem_object_unpin(radeon_fb->obj); |
565 | } | 678 | } |
679 | |||
680 | /* Bytes per pixel may have changed */ | ||
681 | radeon_bandwidth_update(rdev); | ||
682 | |||
566 | return 0; | 683 | return 0; |
567 | } | 684 | } |
568 | 685 | ||
@@ -574,134 +691,24 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, | |||
574 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 691 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
575 | struct drm_device *dev = crtc->dev; | 692 | struct drm_device *dev = crtc->dev; |
576 | struct radeon_device *rdev = dev->dev_private; | 693 | struct radeon_device *rdev = dev->dev_private; |
577 | struct drm_encoder *encoder; | ||
578 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION crtc_timing; | ||
579 | int need_tv_timings = 0; | ||
580 | bool ret; | ||
581 | 694 | ||
582 | /* TODO color tiling */ | 695 | /* TODO color tiling */ |
583 | memset(&crtc_timing, 0, sizeof(crtc_timing)); | ||
584 | |||
585 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | ||
586 | /* find tv std */ | ||
587 | if (encoder->crtc == crtc) { | ||
588 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
589 | |||
590 | if (radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT) { | ||
591 | struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv; | ||
592 | if (tv_dac) { | ||
593 | if (tv_dac->tv_std == TV_STD_NTSC || | ||
594 | tv_dac->tv_std == TV_STD_NTSC_J || | ||
595 | tv_dac->tv_std == TV_STD_PAL_M) | ||
596 | need_tv_timings = 1; | ||
597 | else | ||
598 | need_tv_timings = 2; | ||
599 | break; | ||
600 | } | ||
601 | } | ||
602 | } | ||
603 | } | ||
604 | |||
605 | crtc_timing.ucCRTC = radeon_crtc->crtc_id; | ||
606 | if (need_tv_timings) { | ||
607 | ret = radeon_atom_get_tv_timings(rdev, need_tv_timings - 1, | ||
608 | &crtc_timing, &adjusted_mode->clock); | ||
609 | if (ret == false) | ||
610 | need_tv_timings = 0; | ||
611 | } | ||
612 | |||
613 | if (!need_tv_timings) { | ||
614 | crtc_timing.usH_Total = adjusted_mode->crtc_htotal; | ||
615 | crtc_timing.usH_Disp = adjusted_mode->crtc_hdisplay; | ||
616 | crtc_timing.usH_SyncStart = adjusted_mode->crtc_hsync_start; | ||
617 | crtc_timing.usH_SyncWidth = | ||
618 | adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start; | ||
619 | |||
620 | crtc_timing.usV_Total = adjusted_mode->crtc_vtotal; | ||
621 | crtc_timing.usV_Disp = adjusted_mode->crtc_vdisplay; | ||
622 | crtc_timing.usV_SyncStart = adjusted_mode->crtc_vsync_start; | ||
623 | crtc_timing.usV_SyncWidth = | ||
624 | adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start; | ||
625 | |||
626 | if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) | ||
627 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_VSYNC_POLARITY; | ||
628 | |||
629 | if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) | ||
630 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_HSYNC_POLARITY; | ||
631 | |||
632 | if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC) | ||
633 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_COMPOSITESYNC; | ||
634 | |||
635 | if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
636 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_INTERLACE; | ||
637 | |||
638 | if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) | ||
639 | crtc_timing.susModeMiscInfo.usAccess |= ATOM_DOUBLE_CLOCK_MODE; | ||
640 | } | ||
641 | 696 | ||
697 | atombios_set_ss(crtc, 0); | ||
642 | atombios_crtc_set_pll(crtc, adjusted_mode); | 698 | atombios_crtc_set_pll(crtc, adjusted_mode); |
643 | atombios_crtc_set_timing(crtc, &crtc_timing); | 699 | atombios_set_ss(crtc, 1); |
700 | atombios_crtc_set_timing(crtc, adjusted_mode); | ||
644 | 701 | ||
645 | if (ASIC_IS_AVIVO(rdev)) | 702 | if (ASIC_IS_AVIVO(rdev)) |
646 | atombios_crtc_set_base(crtc, x, y, old_fb); | 703 | atombios_crtc_set_base(crtc, x, y, old_fb); |
647 | else { | 704 | else { |
648 | if (radeon_crtc->crtc_id == 0) { | 705 | if (radeon_crtc->crtc_id == 0) |
649 | SET_CRTC_USING_DTD_TIMING_PARAMETERS crtc_dtd_timing; | 706 | atombios_set_crtc_dtd_timing(crtc, adjusted_mode); |
650 | memset(&crtc_dtd_timing, 0, sizeof(crtc_dtd_timing)); | ||
651 | |||
652 | /* setup FP shadow regs on R4xx */ | ||
653 | crtc_dtd_timing.ucCRTC = radeon_crtc->crtc_id; | ||
654 | crtc_dtd_timing.usH_Size = adjusted_mode->crtc_hdisplay; | ||
655 | crtc_dtd_timing.usV_Size = adjusted_mode->crtc_vdisplay; | ||
656 | crtc_dtd_timing.usH_Blanking_Time = | ||
657 | adjusted_mode->crtc_hblank_end - | ||
658 | adjusted_mode->crtc_hdisplay; | ||
659 | crtc_dtd_timing.usV_Blanking_Time = | ||
660 | adjusted_mode->crtc_vblank_end - | ||
661 | adjusted_mode->crtc_vdisplay; | ||
662 | crtc_dtd_timing.usH_SyncOffset = | ||
663 | adjusted_mode->crtc_hsync_start - | ||
664 | adjusted_mode->crtc_hdisplay; | ||
665 | crtc_dtd_timing.usV_SyncOffset = | ||
666 | adjusted_mode->crtc_vsync_start - | ||
667 | adjusted_mode->crtc_vdisplay; | ||
668 | crtc_dtd_timing.usH_SyncWidth = | ||
669 | adjusted_mode->crtc_hsync_end - | ||
670 | adjusted_mode->crtc_hsync_start; | ||
671 | crtc_dtd_timing.usV_SyncWidth = | ||
672 | adjusted_mode->crtc_vsync_end - | ||
673 | adjusted_mode->crtc_vsync_start; | ||
674 | /* crtc_dtd_timing.ucH_Border = adjusted_mode->crtc_hborder; */ | ||
675 | /* crtc_dtd_timing.ucV_Border = adjusted_mode->crtc_vborder; */ | ||
676 | |||
677 | if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC) | ||
678 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
679 | ATOM_VSYNC_POLARITY; | ||
680 | |||
681 | if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC) | ||
682 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
683 | ATOM_HSYNC_POLARITY; | ||
684 | |||
685 | if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC) | ||
686 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
687 | ATOM_COMPOSITESYNC; | ||
688 | |||
689 | if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
690 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
691 | ATOM_INTERLACE; | ||
692 | |||
693 | if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN) | ||
694 | crtc_dtd_timing.susModeMiscInfo.usAccess |= | ||
695 | ATOM_DOUBLE_CLOCK_MODE; | ||
696 | |||
697 | atombios_set_crtc_dtd_timing(crtc, &crtc_dtd_timing); | ||
698 | } | ||
699 | radeon_crtc_set_base(crtc, x, y, old_fb); | 707 | radeon_crtc_set_base(crtc, x, y, old_fb); |
700 | radeon_legacy_atom_set_surface(crtc); | 708 | radeon_legacy_atom_set_surface(crtc); |
701 | } | 709 | } |
702 | atombios_overscan_setup(crtc, mode, adjusted_mode); | 710 | atombios_overscan_setup(crtc, mode, adjusted_mode); |
703 | atombios_scaler_setup(crtc); | 711 | atombios_scaler_setup(crtc); |
704 | radeon_bandwidth_update(rdev); | ||
705 | return 0; | 712 | return 0; |
706 | } | 713 | } |
707 | 714 | ||
diff --git a/drivers/gpu/drm/radeon/mkregtable.c b/drivers/gpu/drm/radeon/mkregtable.c index fb211e585dea..0d79577c1576 100644 --- a/drivers/gpu/drm/radeon/mkregtable.c +++ b/drivers/gpu/drm/radeon/mkregtable.c | |||
@@ -561,7 +561,7 @@ struct table { | |||
561 | char *gpu_prefix; | 561 | char *gpu_prefix; |
562 | }; | 562 | }; |
563 | 563 | ||
564 | struct offset *offset_new(unsigned o) | 564 | static struct offset *offset_new(unsigned o) |
565 | { | 565 | { |
566 | struct offset *offset; | 566 | struct offset *offset; |
567 | 567 | ||
@@ -573,12 +573,12 @@ struct offset *offset_new(unsigned o) | |||
573 | return offset; | 573 | return offset; |
574 | } | 574 | } |
575 | 575 | ||
576 | void table_offset_add(struct table *t, struct offset *offset) | 576 | static void table_offset_add(struct table *t, struct offset *offset) |
577 | { | 577 | { |
578 | list_add_tail(&offset->list, &t->offsets); | 578 | list_add_tail(&offset->list, &t->offsets); |
579 | } | 579 | } |
580 | 580 | ||
581 | void table_init(struct table *t) | 581 | static void table_init(struct table *t) |
582 | { | 582 | { |
583 | INIT_LIST_HEAD(&t->offsets); | 583 | INIT_LIST_HEAD(&t->offsets); |
584 | t->offset_max = 0; | 584 | t->offset_max = 0; |
@@ -586,7 +586,7 @@ void table_init(struct table *t) | |||
586 | t->table = NULL; | 586 | t->table = NULL; |
587 | } | 587 | } |
588 | 588 | ||
589 | void table_print(struct table *t) | 589 | static void table_print(struct table *t) |
590 | { | 590 | { |
591 | unsigned nlloop, i, j, n, c, id; | 591 | unsigned nlloop, i, j, n, c, id; |
592 | 592 | ||
@@ -611,7 +611,7 @@ void table_print(struct table *t) | |||
611 | printf("};\n"); | 611 | printf("};\n"); |
612 | } | 612 | } |
613 | 613 | ||
614 | int table_build(struct table *t) | 614 | static int table_build(struct table *t) |
615 | { | 615 | { |
616 | struct offset *offset; | 616 | struct offset *offset; |
617 | unsigned i, m; | 617 | unsigned i, m; |
@@ -631,7 +631,7 @@ int table_build(struct table *t) | |||
631 | } | 631 | } |
632 | 632 | ||
633 | static char gpu_name[10]; | 633 | static char gpu_name[10]; |
634 | int parser_auth(struct table *t, const char *filename) | 634 | static int parser_auth(struct table *t, const char *filename) |
635 | { | 635 | { |
636 | FILE *file; | 636 | FILE *file; |
637 | regex_t mask_rex; | 637 | regex_t mask_rex; |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 161094c07d94..c9e93eabcf16 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -186,7 +186,7 @@ static inline uint32_t r100_irq_ack(struct radeon_device *rdev) | |||
186 | 186 | ||
187 | int r100_irq_process(struct radeon_device *rdev) | 187 | int r100_irq_process(struct radeon_device *rdev) |
188 | { | 188 | { |
189 | uint32_t status; | 189 | uint32_t status, msi_rearm; |
190 | 190 | ||
191 | status = r100_irq_ack(rdev); | 191 | status = r100_irq_ack(rdev); |
192 | if (!status) { | 192 | if (!status) { |
@@ -209,6 +209,21 @@ int r100_irq_process(struct radeon_device *rdev) | |||
209 | } | 209 | } |
210 | status = r100_irq_ack(rdev); | 210 | status = r100_irq_ack(rdev); |
211 | } | 211 | } |
212 | if (rdev->msi_enabled) { | ||
213 | switch (rdev->family) { | ||
214 | case CHIP_RS400: | ||
215 | case CHIP_RS480: | ||
216 | msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM; | ||
217 | WREG32(RADEON_AIC_CNTL, msi_rearm); | ||
218 | WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM); | ||
219 | break; | ||
220 | default: | ||
221 | msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; | ||
222 | WREG32(RADEON_MSI_REARM_EN, msi_rearm); | ||
223 | WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); | ||
224 | break; | ||
225 | } | ||
226 | } | ||
212 | return IRQ_HANDLED; | 227 | return IRQ_HANDLED; |
213 | } | 228 | } |
214 | 229 | ||
@@ -240,7 +255,7 @@ int r100_wb_init(struct radeon_device *rdev) | |||
240 | int r; | 255 | int r; |
241 | 256 | ||
242 | if (rdev->wb.wb_obj == NULL) { | 257 | if (rdev->wb.wb_obj == NULL) { |
243 | r = radeon_object_create(rdev, NULL, 4096, | 258 | r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, |
244 | true, | 259 | true, |
245 | RADEON_GEM_DOMAIN_GTT, | 260 | RADEON_GEM_DOMAIN_GTT, |
246 | false, &rdev->wb.wb_obj); | 261 | false, &rdev->wb.wb_obj); |
@@ -563,19 +578,19 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size) | |||
563 | indirect1_start = 16; | 578 | indirect1_start = 16; |
564 | /* cp setup */ | 579 | /* cp setup */ |
565 | WREG32(0x718, pre_write_timer | (pre_write_limit << 28)); | 580 | WREG32(0x718, pre_write_timer | (pre_write_limit << 28)); |
566 | WREG32(RADEON_CP_RB_CNTL, | 581 | tmp = (REG_SET(RADEON_RB_BUFSZ, rb_bufsz) | |
567 | #ifdef __BIG_ENDIAN | ||
568 | RADEON_BUF_SWAP_32BIT | | ||
569 | #endif | ||
570 | REG_SET(RADEON_RB_BUFSZ, rb_bufsz) | | ||
571 | REG_SET(RADEON_RB_BLKSZ, rb_blksz) | | 582 | REG_SET(RADEON_RB_BLKSZ, rb_blksz) | |
572 | REG_SET(RADEON_MAX_FETCH, max_fetch) | | 583 | REG_SET(RADEON_MAX_FETCH, max_fetch) | |
573 | RADEON_RB_NO_UPDATE); | 584 | RADEON_RB_NO_UPDATE); |
585 | #ifdef __BIG_ENDIAN | ||
586 | tmp |= RADEON_BUF_SWAP_32BIT; | ||
587 | #endif | ||
588 | WREG32(RADEON_CP_RB_CNTL, tmp); | ||
589 | |||
574 | /* Set ring address */ | 590 | /* Set ring address */ |
575 | DRM_INFO("radeon: ring at 0x%016lX\n", (unsigned long)rdev->cp.gpu_addr); | 591 | DRM_INFO("radeon: ring at 0x%016lX\n", (unsigned long)rdev->cp.gpu_addr); |
576 | WREG32(RADEON_CP_RB_BASE, rdev->cp.gpu_addr); | 592 | WREG32(RADEON_CP_RB_BASE, rdev->cp.gpu_addr); |
577 | /* Force read & write ptr to 0 */ | 593 | /* Force read & write ptr to 0 */ |
578 | tmp = RREG32(RADEON_CP_RB_CNTL); | ||
579 | WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); | 594 | WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); |
580 | WREG32(RADEON_CP_RB_RPTR_WR, 0); | 595 | WREG32(RADEON_CP_RB_RPTR_WR, 0); |
581 | WREG32(RADEON_CP_RB_WPTR, 0); | 596 | WREG32(RADEON_CP_RB_WPTR, 0); |
@@ -2364,7 +2379,7 @@ void r100_bandwidth_update(struct radeon_device *rdev) | |||
2364 | /* | 2379 | /* |
2365 | Find the total latency for the display data. | 2380 | Find the total latency for the display data. |
2366 | */ | 2381 | */ |
2367 | disp_latency_overhead.full = rfixed_const(80); | 2382 | disp_latency_overhead.full = rfixed_const(8); |
2368 | disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff); | 2383 | disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff); |
2369 | mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full; | 2384 | mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full; |
2370 | mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full; | 2385 | mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full; |
@@ -2562,8 +2577,11 @@ void r100_bandwidth_update(struct radeon_device *rdev) | |||
2562 | static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t) | 2577 | static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t) |
2563 | { | 2578 | { |
2564 | DRM_ERROR("pitch %d\n", t->pitch); | 2579 | DRM_ERROR("pitch %d\n", t->pitch); |
2580 | DRM_ERROR("use_pitch %d\n", t->use_pitch); | ||
2565 | DRM_ERROR("width %d\n", t->width); | 2581 | DRM_ERROR("width %d\n", t->width); |
2582 | DRM_ERROR("width_11 %d\n", t->width_11); | ||
2566 | DRM_ERROR("height %d\n", t->height); | 2583 | DRM_ERROR("height %d\n", t->height); |
2584 | DRM_ERROR("height_11 %d\n", t->height_11); | ||
2567 | DRM_ERROR("num levels %d\n", t->num_levels); | 2585 | DRM_ERROR("num levels %d\n", t->num_levels); |
2568 | DRM_ERROR("depth %d\n", t->txdepth); | 2586 | DRM_ERROR("depth %d\n", t->txdepth); |
2569 | DRM_ERROR("bpp %d\n", t->cpp); | 2587 | DRM_ERROR("bpp %d\n", t->cpp); |
@@ -2623,15 +2641,17 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev, | |||
2623 | else | 2641 | else |
2624 | w = track->textures[u].pitch / (1 << i); | 2642 | w = track->textures[u].pitch / (1 << i); |
2625 | } else { | 2643 | } else { |
2626 | w = track->textures[u].width / (1 << i); | 2644 | w = track->textures[u].width; |
2627 | if (rdev->family >= CHIP_RV515) | 2645 | if (rdev->family >= CHIP_RV515) |
2628 | w |= track->textures[u].width_11; | 2646 | w |= track->textures[u].width_11; |
2647 | w = w / (1 << i); | ||
2629 | if (track->textures[u].roundup_w) | 2648 | if (track->textures[u].roundup_w) |
2630 | w = roundup_pow_of_two(w); | 2649 | w = roundup_pow_of_two(w); |
2631 | } | 2650 | } |
2632 | h = track->textures[u].height / (1 << i); | 2651 | h = track->textures[u].height; |
2633 | if (rdev->family >= CHIP_RV515) | 2652 | if (rdev->family >= CHIP_RV515) |
2634 | h |= track->textures[u].height_11; | 2653 | h |= track->textures[u].height_11; |
2654 | h = h / (1 << i); | ||
2635 | if (track->textures[u].roundup_h) | 2655 | if (track->textures[u].roundup_h) |
2636 | h = roundup_pow_of_two(h); | 2656 | h = roundup_pow_of_two(h); |
2637 | size += w * h; | 2657 | size += w * h; |
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index e08c4a8974ca..2f43ee8e4048 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -113,7 +113,7 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev) | |||
113 | tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD; | 113 | tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD; |
114 | WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); | 114 | WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); |
115 | WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location); | 115 | WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location); |
116 | tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 4096; | 116 | tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - RADEON_GPU_PAGE_SIZE; |
117 | WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp); | 117 | WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp); |
118 | WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0); | 118 | WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0); |
119 | WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0); | 119 | WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0); |
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c index 5c7fe52de30e..1cefdbcc0850 100644 --- a/drivers/gpu/drm/radeon/r420.c +++ b/drivers/gpu/drm/radeon/r420.c | |||
@@ -311,6 +311,8 @@ int r420_init(struct radeon_device *rdev) | |||
311 | } | 311 | } |
312 | /* Initialize clocks */ | 312 | /* Initialize clocks */ |
313 | radeon_get_clock_info(rdev->ddev); | 313 | radeon_get_clock_info(rdev->ddev); |
314 | /* Initialize power management */ | ||
315 | radeon_pm_init(rdev); | ||
314 | /* Get vram informations */ | 316 | /* Get vram informations */ |
315 | r300_vram_info(rdev); | 317 | r300_vram_info(rdev); |
316 | /* Initialize memory controller (also test AGP) */ | 318 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h index 868add6e166d..7baa73955563 100644 --- a/drivers/gpu/drm/radeon/r500_reg.h +++ b/drivers/gpu/drm/radeon/r500_reg.h | |||
@@ -384,9 +384,16 @@ | |||
384 | # define AVIVO_D1GRPH_TILED (1 << 20) | 384 | # define AVIVO_D1GRPH_TILED (1 << 20) |
385 | # define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) | 385 | # define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) |
386 | 386 | ||
387 | /* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2 | ||
388 | * block and vice versa. This applies to GRPH, CUR, etc. | ||
389 | */ | ||
387 | #define AVIVO_D1GRPH_LUT_SEL 0x6108 | 390 | #define AVIVO_D1GRPH_LUT_SEL 0x6108 |
388 | #define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 | 391 | #define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 |
392 | #define R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914 | ||
393 | #define R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114 | ||
389 | #define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 | 394 | #define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 |
395 | #define R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x691c | ||
396 | #define R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x611c | ||
390 | #define AVIVO_D1GRPH_PITCH 0x6120 | 397 | #define AVIVO_D1GRPH_PITCH 0x6120 |
391 | #define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 | 398 | #define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 |
392 | #define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 | 399 | #define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 |
@@ -404,6 +411,8 @@ | |||
404 | # define AVIVO_D1CURSOR_MODE_MASK (3 << 8) | 411 | # define AVIVO_D1CURSOR_MODE_MASK (3 << 8) |
405 | # define AVIVO_D1CURSOR_MODE_24BPP 2 | 412 | # define AVIVO_D1CURSOR_MODE_24BPP 2 |
406 | #define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 | 413 | #define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 |
414 | #define R700_D1CUR_SURFACE_ADDRESS_HIGH 0x6c0c | ||
415 | #define R700_D2CUR_SURFACE_ADDRESS_HIGH 0x640c | ||
407 | #define AVIVO_D1CUR_SIZE 0x6410 | 416 | #define AVIVO_D1CUR_SIZE 0x6410 |
408 | #define AVIVO_D1CUR_POSITION 0x6414 | 417 | #define AVIVO_D1CUR_POSITION 0x6414 |
409 | #define AVIVO_D1CUR_HOT_SPOT 0x6418 | 418 | #define AVIVO_D1CUR_HOT_SPOT 0x6418 |
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index a555b7b19b48..f7435185c0a6 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c | |||
@@ -260,6 +260,8 @@ int r520_init(struct radeon_device *rdev) | |||
260 | } | 260 | } |
261 | /* Initialize clocks */ | 261 | /* Initialize clocks */ |
262 | radeon_get_clock_info(rdev->ddev); | 262 | radeon_get_clock_info(rdev->ddev); |
263 | /* Initialize power management */ | ||
264 | radeon_pm_init(rdev); | ||
263 | /* Get vram informations */ | 265 | /* Get vram informations */ |
264 | r520_vram_info(rdev); | 266 | r520_vram_info(rdev); |
265 | /* Initialize memory controller (also test AGP) */ | 267 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 609719490ec2..278f646bc18e 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -339,11 +339,10 @@ int r600_mc_init(struct radeon_device *rdev) | |||
339 | { | 339 | { |
340 | fixed20_12 a; | 340 | fixed20_12 a; |
341 | u32 tmp; | 341 | u32 tmp; |
342 | int chansize; | 342 | int chansize, numchan; |
343 | int r; | 343 | int r; |
344 | 344 | ||
345 | /* Get VRAM informations */ | 345 | /* Get VRAM informations */ |
346 | rdev->mc.vram_width = 128; | ||
347 | rdev->mc.vram_is_ddr = true; | 346 | rdev->mc.vram_is_ddr = true; |
348 | tmp = RREG32(RAMCFG); | 347 | tmp = RREG32(RAMCFG); |
349 | if (tmp & CHANSIZE_OVERRIDE) { | 348 | if (tmp & CHANSIZE_OVERRIDE) { |
@@ -353,17 +352,23 @@ int r600_mc_init(struct radeon_device *rdev) | |||
353 | } else { | 352 | } else { |
354 | chansize = 32; | 353 | chansize = 32; |
355 | } | 354 | } |
356 | if (rdev->family == CHIP_R600) { | 355 | tmp = RREG32(CHMAP); |
357 | rdev->mc.vram_width = 8 * chansize; | 356 | switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) { |
358 | } else if (rdev->family == CHIP_RV670) { | 357 | case 0: |
359 | rdev->mc.vram_width = 4 * chansize; | 358 | default: |
360 | } else if ((rdev->family == CHIP_RV610) || | 359 | numchan = 1; |
361 | (rdev->family == CHIP_RV620)) { | 360 | break; |
362 | rdev->mc.vram_width = chansize; | 361 | case 1: |
363 | } else if ((rdev->family == CHIP_RV630) || | 362 | numchan = 2; |
364 | (rdev->family == CHIP_RV635)) { | 363 | break; |
365 | rdev->mc.vram_width = 2 * chansize; | 364 | case 2: |
365 | numchan = 4; | ||
366 | break; | ||
367 | case 3: | ||
368 | numchan = 8; | ||
369 | break; | ||
366 | } | 370 | } |
371 | rdev->mc.vram_width = numchan * chansize; | ||
367 | /* Could aper size report 0 ? */ | 372 | /* Could aper size report 0 ? */ |
368 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 373 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); |
369 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 374 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); |
@@ -404,35 +409,29 @@ int r600_mc_init(struct radeon_device *rdev) | |||
404 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; | 409 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; |
405 | } | 410 | } |
406 | } else { | 411 | } else { |
407 | if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { | 412 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; |
408 | rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) & | 413 | rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) & |
409 | 0xFFFF) << 24; | 414 | 0xFFFF) << 24; |
410 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; | 415 | tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size; |
411 | tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size; | 416 | if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { |
412 | if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { | 417 | /* Enough place after vram */ |
413 | /* Enough place after vram */ | 418 | rdev->mc.gtt_location = tmp; |
414 | rdev->mc.gtt_location = tmp; | 419 | } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) { |
415 | } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) { | 420 | /* Enough place before vram */ |
416 | /* Enough place before vram */ | 421 | rdev->mc.gtt_location = 0; |
422 | } else { | ||
423 | /* Not enough place after or before shrink | ||
424 | * gart size | ||
425 | */ | ||
426 | if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) { | ||
417 | rdev->mc.gtt_location = 0; | 427 | rdev->mc.gtt_location = 0; |
428 | rdev->mc.gtt_size = rdev->mc.vram_location; | ||
418 | } else { | 429 | } else { |
419 | /* Not enough place after or before shrink | 430 | rdev->mc.gtt_location = tmp; |
420 | * gart size | 431 | rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp; |
421 | */ | ||
422 | if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) { | ||
423 | rdev->mc.gtt_location = 0; | ||
424 | rdev->mc.gtt_size = rdev->mc.vram_location; | ||
425 | } else { | ||
426 | rdev->mc.gtt_location = tmp; | ||
427 | rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp; | ||
428 | } | ||
429 | } | 432 | } |
430 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; | ||
431 | } else { | ||
432 | rdev->mc.vram_location = 0x00000000UL; | ||
433 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; | ||
434 | rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; | ||
435 | } | 433 | } |
434 | rdev->mc.gtt_location = rdev->mc.mc_vram_size; | ||
436 | } | 435 | } |
437 | rdev->mc.vram_start = rdev->mc.vram_location; | 436 | rdev->mc.vram_start = rdev->mc.vram_location; |
438 | rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; | 437 | rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; |
@@ -859,7 +858,8 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
859 | ((rdev->family) == CHIP_RV630) || | 858 | ((rdev->family) == CHIP_RV630) || |
860 | ((rdev->family) == CHIP_RV610) || | 859 | ((rdev->family) == CHIP_RV610) || |
861 | ((rdev->family) == CHIP_RV620) || | 860 | ((rdev->family) == CHIP_RV620) || |
862 | ((rdev->family) == CHIP_RS780)) { | 861 | ((rdev->family) == CHIP_RS780) || |
862 | ((rdev->family) == CHIP_RS880)) { | ||
863 | WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE); | 863 | WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE); |
864 | } else { | 864 | } else { |
865 | WREG32(DB_DEBUG, 0); | 865 | WREG32(DB_DEBUG, 0); |
@@ -876,7 +876,8 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
876 | tmp = RREG32(SQ_MS_FIFO_SIZES); | 876 | tmp = RREG32(SQ_MS_FIFO_SIZES); |
877 | if (((rdev->family) == CHIP_RV610) || | 877 | if (((rdev->family) == CHIP_RV610) || |
878 | ((rdev->family) == CHIP_RV620) || | 878 | ((rdev->family) == CHIP_RV620) || |
879 | ((rdev->family) == CHIP_RS780)) { | 879 | ((rdev->family) == CHIP_RS780) || |
880 | ((rdev->family) == CHIP_RS880)) { | ||
880 | tmp = (CACHE_FIFO_SIZE(0xa) | | 881 | tmp = (CACHE_FIFO_SIZE(0xa) | |
881 | FETCH_FIFO_HIWATER(0xa) | | 882 | FETCH_FIFO_HIWATER(0xa) | |
882 | DONE_FIFO_HIWATER(0xe0) | | 883 | DONE_FIFO_HIWATER(0xe0) | |
@@ -919,7 +920,8 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
919 | NUM_ES_STACK_ENTRIES(0)); | 920 | NUM_ES_STACK_ENTRIES(0)); |
920 | } else if (((rdev->family) == CHIP_RV610) || | 921 | } else if (((rdev->family) == CHIP_RV610) || |
921 | ((rdev->family) == CHIP_RV620) || | 922 | ((rdev->family) == CHIP_RV620) || |
922 | ((rdev->family) == CHIP_RS780)) { | 923 | ((rdev->family) == CHIP_RS780) || |
924 | ((rdev->family) == CHIP_RS880)) { | ||
923 | /* no vertex cache */ | 925 | /* no vertex cache */ |
924 | sq_config &= ~VC_ENABLE; | 926 | sq_config &= ~VC_ENABLE; |
925 | 927 | ||
@@ -976,7 +978,8 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
976 | 978 | ||
977 | if (((rdev->family) == CHIP_RV610) || | 979 | if (((rdev->family) == CHIP_RV610) || |
978 | ((rdev->family) == CHIP_RV620) || | 980 | ((rdev->family) == CHIP_RV620) || |
979 | ((rdev->family) == CHIP_RS780)) { | 981 | ((rdev->family) == CHIP_RS780) || |
982 | ((rdev->family) == CHIP_RS880)) { | ||
980 | WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY)); | 983 | WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY)); |
981 | } else { | 984 | } else { |
982 | WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC)); | 985 | WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC)); |
@@ -1002,8 +1005,9 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
1002 | tmp = rdev->config.r600.max_pipes * 16; | 1005 | tmp = rdev->config.r600.max_pipes * 16; |
1003 | switch (rdev->family) { | 1006 | switch (rdev->family) { |
1004 | case CHIP_RV610: | 1007 | case CHIP_RV610: |
1005 | case CHIP_RS780: | ||
1006 | case CHIP_RV620: | 1008 | case CHIP_RV620: |
1009 | case CHIP_RS780: | ||
1010 | case CHIP_RS880: | ||
1007 | tmp += 32; | 1011 | tmp += 32; |
1008 | break; | 1012 | break; |
1009 | case CHIP_RV670: | 1013 | case CHIP_RV670: |
@@ -1044,8 +1048,9 @@ void r600_gpu_init(struct radeon_device *rdev) | |||
1044 | 1048 | ||
1045 | switch (rdev->family) { | 1049 | switch (rdev->family) { |
1046 | case CHIP_RV610: | 1050 | case CHIP_RV610: |
1047 | case CHIP_RS780: | ||
1048 | case CHIP_RV620: | 1051 | case CHIP_RV620: |
1052 | case CHIP_RS780: | ||
1053 | case CHIP_RS880: | ||
1049 | tmp = TC_L2_SIZE(8); | 1054 | tmp = TC_L2_SIZE(8); |
1050 | break; | 1055 | break; |
1051 | case CHIP_RV630: | 1056 | case CHIP_RV630: |
@@ -1267,19 +1272,17 @@ int r600_cp_resume(struct radeon_device *rdev) | |||
1267 | 1272 | ||
1268 | /* Set ring buffer size */ | 1273 | /* Set ring buffer size */ |
1269 | rb_bufsz = drm_order(rdev->cp.ring_size / 8); | 1274 | rb_bufsz = drm_order(rdev->cp.ring_size / 8); |
1275 | tmp = RB_NO_UPDATE | (drm_order(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz; | ||
1270 | #ifdef __BIG_ENDIAN | 1276 | #ifdef __BIG_ENDIAN |
1271 | WREG32(CP_RB_CNTL, BUF_SWAP_32BIT | RB_NO_UPDATE | | 1277 | tmp |= BUF_SWAP_32BIT; |
1272 | (drm_order(4096/8) << 8) | rb_bufsz); | ||
1273 | #else | ||
1274 | WREG32(CP_RB_CNTL, RB_NO_UPDATE | (drm_order(4096/8) << 8) | rb_bufsz); | ||
1275 | #endif | 1278 | #endif |
1279 | WREG32(CP_RB_CNTL, tmp); | ||
1276 | WREG32(CP_SEM_WAIT_TIMER, 0x4); | 1280 | WREG32(CP_SEM_WAIT_TIMER, 0x4); |
1277 | 1281 | ||
1278 | /* Set the write pointer delay */ | 1282 | /* Set the write pointer delay */ |
1279 | WREG32(CP_RB_WPTR_DELAY, 0); | 1283 | WREG32(CP_RB_WPTR_DELAY, 0); |
1280 | 1284 | ||
1281 | /* Initialize the ring buffer's read and write pointers */ | 1285 | /* Initialize the ring buffer's read and write pointers */ |
1282 | tmp = RREG32(CP_RB_CNTL); | ||
1283 | WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); | 1286 | WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); |
1284 | WREG32(CP_RB_RPTR_WR, 0); | 1287 | WREG32(CP_RB_RPTR_WR, 0); |
1285 | WREG32(CP_RB_WPTR, 0); | 1288 | WREG32(CP_RB_WPTR, 0); |
@@ -1400,7 +1403,7 @@ int r600_wb_enable(struct radeon_device *rdev) | |||
1400 | int r; | 1403 | int r; |
1401 | 1404 | ||
1402 | if (rdev->wb.wb_obj == NULL) { | 1405 | if (rdev->wb.wb_obj == NULL) { |
1403 | r = radeon_object_create(rdev, NULL, 4096, true, | 1406 | r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true, |
1404 | RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj); | 1407 | RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj); |
1405 | if (r) { | 1408 | if (r) { |
1406 | dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r); | 1409 | dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r); |
@@ -1450,8 +1453,8 @@ int r600_copy_blit(struct radeon_device *rdev, | |||
1450 | uint64_t src_offset, uint64_t dst_offset, | 1453 | uint64_t src_offset, uint64_t dst_offset, |
1451 | unsigned num_pages, struct radeon_fence *fence) | 1454 | unsigned num_pages, struct radeon_fence *fence) |
1452 | { | 1455 | { |
1453 | r600_blit_prepare_copy(rdev, num_pages * 4096); | 1456 | r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE); |
1454 | r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * 4096); | 1457 | r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE); |
1455 | r600_blit_done_copy(rdev, fence); | 1458 | r600_blit_done_copy(rdev, fence); |
1456 | return 0; | 1459 | return 0; |
1457 | } | 1460 | } |
@@ -1632,10 +1635,13 @@ int r600_init(struct radeon_device *rdev) | |||
1632 | r600_scratch_init(rdev); | 1635 | r600_scratch_init(rdev); |
1633 | /* Initialize surface registers */ | 1636 | /* Initialize surface registers */ |
1634 | radeon_surface_init(rdev); | 1637 | radeon_surface_init(rdev); |
1638 | /* Initialize clocks */ | ||
1635 | radeon_get_clock_info(rdev->ddev); | 1639 | radeon_get_clock_info(rdev->ddev); |
1636 | r = radeon_clocks_init(rdev); | 1640 | r = radeon_clocks_init(rdev); |
1637 | if (r) | 1641 | if (r) |
1638 | return r; | 1642 | return r; |
1643 | /* Initialize power management */ | ||
1644 | radeon_pm_init(rdev); | ||
1639 | /* Fence driver */ | 1645 | /* Fence driver */ |
1640 | r = radeon_fence_driver_init(rdev); | 1646 | r = radeon_fence_driver_init(rdev); |
1641 | if (r) | 1647 | if (r) |
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c index dec501081608..5ea432347589 100644 --- a/drivers/gpu/drm/radeon/r600_blit.c +++ b/drivers/gpu/drm/radeon/r600_blit.c | |||
@@ -582,6 +582,8 @@ r600_blit_copy(struct drm_device *dev, | |||
582 | u64 vb_addr; | 582 | u64 vb_addr; |
583 | u32 *vb; | 583 | u32 *vb; |
584 | 584 | ||
585 | vb = r600_nomm_get_vb_ptr(dev); | ||
586 | |||
585 | if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { | 587 | if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { |
586 | max_bytes = 8192; | 588 | max_bytes = 8192; |
587 | 589 | ||
@@ -617,8 +619,8 @@ r600_blit_copy(struct drm_device *dev, | |||
617 | if (!dev_priv->blit_vb) | 619 | if (!dev_priv->blit_vb) |
618 | return; | 620 | return; |
619 | set_shaders(dev); | 621 | set_shaders(dev); |
622 | vb = r600_nomm_get_vb_ptr(dev); | ||
620 | } | 623 | } |
621 | vb = r600_nomm_get_vb_ptr(dev); | ||
622 | 624 | ||
623 | vb[0] = i2f(dst_x); | 625 | vb[0] = i2f(dst_x); |
624 | vb[1] = 0; | 626 | vb[1] = 0; |
@@ -706,8 +708,8 @@ r600_blit_copy(struct drm_device *dev, | |||
706 | return; | 708 | return; |
707 | 709 | ||
708 | set_shaders(dev); | 710 | set_shaders(dev); |
711 | vb = r600_nomm_get_vb_ptr(dev); | ||
709 | } | 712 | } |
710 | vb = r600_nomm_get_vb_ptr(dev); | ||
711 | 713 | ||
712 | vb[0] = i2f(dst_x / 4); | 714 | vb[0] = i2f(dst_x / 4); |
713 | vb[1] = 0; | 715 | vb[1] = 0; |
@@ -772,6 +774,7 @@ r600_blit_swap(struct drm_device *dev, | |||
772 | { | 774 | { |
773 | drm_radeon_private_t *dev_priv = dev->dev_private; | 775 | drm_radeon_private_t *dev_priv = dev->dev_private; |
774 | int cb_format, tex_format; | 776 | int cb_format, tex_format; |
777 | int sx2, sy2, dx2, dy2; | ||
775 | u64 vb_addr; | 778 | u64 vb_addr; |
776 | u32 *vb; | 779 | u32 *vb; |
777 | 780 | ||
@@ -786,16 +789,10 @@ r600_blit_swap(struct drm_device *dev, | |||
786 | } | 789 | } |
787 | vb = r600_nomm_get_vb_ptr(dev); | 790 | vb = r600_nomm_get_vb_ptr(dev); |
788 | 791 | ||
789 | if (cpp == 4) { | 792 | sx2 = sx + w; |
790 | cb_format = COLOR_8_8_8_8; | 793 | sy2 = sy + h; |
791 | tex_format = FMT_8_8_8_8; | 794 | dx2 = dx + w; |
792 | } else if (cpp == 2) { | 795 | dy2 = dy + h; |
793 | cb_format = COLOR_5_6_5; | ||
794 | tex_format = FMT_5_6_5; | ||
795 | } else { | ||
796 | cb_format = COLOR_8; | ||
797 | tex_format = FMT_8; | ||
798 | } | ||
799 | 796 | ||
800 | vb[0] = i2f(dx); | 797 | vb[0] = i2f(dx); |
801 | vb[1] = i2f(dy); | 798 | vb[1] = i2f(dy); |
@@ -803,31 +800,46 @@ r600_blit_swap(struct drm_device *dev, | |||
803 | vb[3] = i2f(sy); | 800 | vb[3] = i2f(sy); |
804 | 801 | ||
805 | vb[4] = i2f(dx); | 802 | vb[4] = i2f(dx); |
806 | vb[5] = i2f(dy + h); | 803 | vb[5] = i2f(dy2); |
807 | vb[6] = i2f(sx); | 804 | vb[6] = i2f(sx); |
808 | vb[7] = i2f(sy + h); | 805 | vb[7] = i2f(sy2); |
806 | |||
807 | vb[8] = i2f(dx2); | ||
808 | vb[9] = i2f(dy2); | ||
809 | vb[10] = i2f(sx2); | ||
810 | vb[11] = i2f(sy2); | ||
809 | 811 | ||
810 | vb[8] = i2f(dx + w); | 812 | switch(cpp) { |
811 | vb[9] = i2f(dy + h); | 813 | case 4: |
812 | vb[10] = i2f(sx + w); | 814 | cb_format = COLOR_8_8_8_8; |
813 | vb[11] = i2f(sy + h); | 815 | tex_format = FMT_8_8_8_8; |
816 | break; | ||
817 | case 2: | ||
818 | cb_format = COLOR_5_6_5; | ||
819 | tex_format = FMT_5_6_5; | ||
820 | break; | ||
821 | default: | ||
822 | cb_format = COLOR_8; | ||
823 | tex_format = FMT_8; | ||
824 | break; | ||
825 | } | ||
814 | 826 | ||
815 | /* src */ | 827 | /* src */ |
816 | set_tex_resource(dev_priv, tex_format, | 828 | set_tex_resource(dev_priv, tex_format, |
817 | src_pitch / cpp, | 829 | src_pitch / cpp, |
818 | sy + h, src_pitch / cpp, | 830 | sy2, src_pitch / cpp, |
819 | src_gpu_addr); | 831 | src_gpu_addr); |
820 | 832 | ||
821 | cp_set_surface_sync(dev_priv, | 833 | cp_set_surface_sync(dev_priv, |
822 | R600_TC_ACTION_ENA, (src_pitch * (sy + h)), src_gpu_addr); | 834 | R600_TC_ACTION_ENA, src_pitch * sy2, src_gpu_addr); |
823 | 835 | ||
824 | /* dst */ | 836 | /* dst */ |
825 | set_render_target(dev_priv, cb_format, | 837 | set_render_target(dev_priv, cb_format, |
826 | dst_pitch / cpp, dy + h, | 838 | dst_pitch / cpp, dy2, |
827 | dst_gpu_addr); | 839 | dst_gpu_addr); |
828 | 840 | ||
829 | /* scissors */ | 841 | /* scissors */ |
830 | set_scissors(dev_priv, dx, dy, dx + w, dy + h); | 842 | set_scissors(dev_priv, dx, dy, dx2, dy2); |
831 | 843 | ||
832 | /* Vertex buffer setup */ | 844 | /* Vertex buffer setup */ |
833 | vb_addr = dev_priv->gart_buffers_offset + | 845 | vb_addr = dev_priv->gart_buffers_offset + |
@@ -840,7 +852,7 @@ r600_blit_swap(struct drm_device *dev, | |||
840 | 852 | ||
841 | cp_set_surface_sync(dev_priv, | 853 | cp_set_surface_sync(dev_priv, |
842 | R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, | 854 | R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, |
843 | dst_pitch * (dy + h), dst_gpu_addr); | 855 | dst_pitch * dy2, dst_gpu_addr); |
844 | 856 | ||
845 | dev_priv->blit_vb->used += 12 * 4; | 857 | dev_priv->blit_vb->used += 12 * 4; |
846 | } | 858 | } |
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c index 93108bb31d1d..dbf716e1fbf3 100644 --- a/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/drivers/gpu/drm/radeon/r600_blit_kms.c | |||
@@ -368,7 +368,7 @@ set_default_state(struct radeon_device *rdev) | |||
368 | if ((rdev->family == CHIP_RV610) || | 368 | if ((rdev->family == CHIP_RV610) || |
369 | (rdev->family == CHIP_RV620) || | 369 | (rdev->family == CHIP_RV620) || |
370 | (rdev->family == CHIP_RS780) || | 370 | (rdev->family == CHIP_RS780) || |
371 | (rdev->family == CHIP_RS780) || | 371 | (rdev->family == CHIP_RS880) || |
372 | (rdev->family == CHIP_RV710)) | 372 | (rdev->family == CHIP_RV710)) |
373 | sq_config = 0; | 373 | sq_config = 0; |
374 | else | 374 | else |
@@ -610,6 +610,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev, | |||
610 | 610 | ||
611 | DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr, | 611 | DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr, |
612 | size_bytes, rdev->r600_blit.vb_used); | 612 | size_bytes, rdev->r600_blit.vb_used); |
613 | vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used); | ||
613 | if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { | 614 | if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { |
614 | max_bytes = 8192; | 615 | max_bytes = 8192; |
615 | 616 | ||
@@ -652,7 +653,6 @@ void r600_kms_blit_copy(struct radeon_device *rdev, | |||
652 | vb = r600_nomm_get_vb_ptr(dev); | 653 | vb = r600_nomm_get_vb_ptr(dev); |
653 | #endif | 654 | #endif |
654 | } | 655 | } |
655 | vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used); | ||
656 | 656 | ||
657 | vb[0] = i2f(dst_x); | 657 | vb[0] = i2f(dst_x); |
658 | vb[1] = 0; | 658 | vb[1] = 0; |
@@ -747,7 +747,6 @@ void r600_kms_blit_copy(struct radeon_device *rdev, | |||
747 | vb = r600_nomm_get_vb_ptr(dev); | 747 | vb = r600_nomm_get_vb_ptr(dev); |
748 | } | 748 | } |
749 | #endif | 749 | #endif |
750 | vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used); | ||
751 | 750 | ||
752 | vb[0] = i2f(dst_x / 4); | 751 | vb[0] = i2f(dst_x / 4); |
753 | vb[1] = 0; | 752 | vb[1] = 0; |
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 17e42195c632..0d820764f340 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
@@ -466,6 +466,23 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
466 | for (i = 0; i < pkt->count; i++) { | 466 | for (i = 0; i < pkt->count; i++) { |
467 | reg = start_reg + (4 * i); | 467 | reg = start_reg + (4 * i); |
468 | switch (reg) { | 468 | switch (reg) { |
469 | case SQ_ESGS_RING_BASE: | ||
470 | case SQ_GSVS_RING_BASE: | ||
471 | case SQ_ESTMP_RING_BASE: | ||
472 | case SQ_GSTMP_RING_BASE: | ||
473 | case SQ_VSTMP_RING_BASE: | ||
474 | case SQ_PSTMP_RING_BASE: | ||
475 | case SQ_FBUF_RING_BASE: | ||
476 | case SQ_REDUC_RING_BASE: | ||
477 | case SX_MEMORY_EXPORT_BASE: | ||
478 | r = r600_cs_packet_next_reloc(p, &reloc); | ||
479 | if (r) { | ||
480 | DRM_ERROR("bad SET_CONFIG_REG " | ||
481 | "0x%04X\n", reg); | ||
482 | return -EINVAL; | ||
483 | } | ||
484 | ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff); | ||
485 | break; | ||
469 | case CP_COHER_BASE: | 486 | case CP_COHER_BASE: |
470 | /* use PACKET3_SURFACE_SYNC */ | 487 | /* use PACKET3_SURFACE_SYNC */ |
471 | return -EINVAL; | 488 | return -EINVAL; |
@@ -487,6 +504,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p, | |||
487 | reg = start_reg + (4 * i); | 504 | reg = start_reg + (4 * i); |
488 | switch (reg) { | 505 | switch (reg) { |
489 | case DB_DEPTH_BASE: | 506 | case DB_DEPTH_BASE: |
507 | case DB_HTILE_DATA_BASE: | ||
490 | case CB_COLOR0_BASE: | 508 | case CB_COLOR0_BASE: |
491 | case CB_COLOR1_BASE: | 509 | case CB_COLOR1_BASE: |
492 | case CB_COLOR2_BASE: | 510 | case CB_COLOR2_BASE: |
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index 9b64d47f1f82..27ab428b149b 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
@@ -119,6 +119,7 @@ | |||
119 | #define DB_DEBUG 0x9830 | 119 | #define DB_DEBUG 0x9830 |
120 | #define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31) | 120 | #define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31) |
121 | #define DB_DEPTH_BASE 0x2800C | 121 | #define DB_DEPTH_BASE 0x2800C |
122 | #define DB_HTILE_DATA_BASE 0x28014 | ||
122 | #define DB_WATERMARKS 0x9838 | 123 | #define DB_WATERMARKS 0x9838 |
123 | #define DEPTH_FREE(x) ((x) << 0) | 124 | #define DEPTH_FREE(x) ((x) << 0) |
124 | #define DEPTH_FLUSH(x) ((x) << 5) | 125 | #define DEPTH_FLUSH(x) ((x) << 5) |
@@ -171,6 +172,14 @@ | |||
171 | #define SQ_STACK_RESOURCE_MGMT_2 0x8c14 | 172 | #define SQ_STACK_RESOURCE_MGMT_2 0x8c14 |
172 | # define NUM_GS_STACK_ENTRIES(x) ((x) << 0) | 173 | # define NUM_GS_STACK_ENTRIES(x) ((x) << 0) |
173 | # define NUM_ES_STACK_ENTRIES(x) ((x) << 16) | 174 | # define NUM_ES_STACK_ENTRIES(x) ((x) << 16) |
175 | #define SQ_ESGS_RING_BASE 0x8c40 | ||
176 | #define SQ_GSVS_RING_BASE 0x8c48 | ||
177 | #define SQ_ESTMP_RING_BASE 0x8c50 | ||
178 | #define SQ_GSTMP_RING_BASE 0x8c58 | ||
179 | #define SQ_VSTMP_RING_BASE 0x8c60 | ||
180 | #define SQ_PSTMP_RING_BASE 0x8c68 | ||
181 | #define SQ_FBUF_RING_BASE 0x8c70 | ||
182 | #define SQ_REDUC_RING_BASE 0x8c78 | ||
174 | 183 | ||
175 | #define GRBM_CNTL 0x8000 | 184 | #define GRBM_CNTL 0x8000 |
176 | # define GRBM_READ_TIMEOUT(x) ((x) << 0) | 185 | # define GRBM_READ_TIMEOUT(x) ((x) << 0) |
@@ -271,6 +280,10 @@ | |||
271 | #define PCIE_PORT_INDEX 0x0038 | 280 | #define PCIE_PORT_INDEX 0x0038 |
272 | #define PCIE_PORT_DATA 0x003C | 281 | #define PCIE_PORT_DATA 0x003C |
273 | 282 | ||
283 | #define CHMAP 0x2004 | ||
284 | #define NOOFCHAN_SHIFT 12 | ||
285 | #define NOOFCHAN_MASK 0x00003000 | ||
286 | |||
274 | #define RAMCFG 0x2408 | 287 | #define RAMCFG 0x2408 |
275 | #define NOOFBANK_SHIFT 0 | 288 | #define NOOFBANK_SHIFT 0 |
276 | #define NOOFBANK_MASK 0x00000001 | 289 | #define NOOFBANK_MASK 0x00000001 |
@@ -352,6 +365,7 @@ | |||
352 | 365 | ||
353 | 366 | ||
354 | #define SX_MISC 0x28350 | 367 | #define SX_MISC 0x28350 |
368 | #define SX_MEMORY_EXPORT_BASE 0x9010 | ||
355 | #define SX_DEBUG_1 0x9054 | 369 | #define SX_DEBUG_1 0x9054 |
356 | #define SMX_EVENT_RELEASE (1 << 0) | 370 | #define SMX_EVENT_RELEASE (1 << 0) |
357 | #define ENABLE_NEW_SMX_ADDRESS (1 << 16) | 371 | #define ENABLE_NEW_SMX_ADDRESS (1 << 16) |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index 5ab35b81c86b..757f5cd37744 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
@@ -139,6 +139,10 @@ struct radeon_clock { | |||
139 | uint32_t default_sclk; | 139 | uint32_t default_sclk; |
140 | }; | 140 | }; |
141 | 141 | ||
142 | /* | ||
143 | * Power management | ||
144 | */ | ||
145 | int radeon_pm_init(struct radeon_device *rdev); | ||
142 | 146 | ||
143 | /* | 147 | /* |
144 | * Fences. | 148 | * Fences. |
@@ -276,6 +280,8 @@ union radeon_gart_table { | |||
276 | struct radeon_gart_table_vram vram; | 280 | struct radeon_gart_table_vram vram; |
277 | }; | 281 | }; |
278 | 282 | ||
283 | #define RADEON_GPU_PAGE_SIZE 4096 | ||
284 | |||
279 | struct radeon_gart { | 285 | struct radeon_gart { |
280 | dma_addr_t table_addr; | 286 | dma_addr_t table_addr; |
281 | unsigned num_gpu_pages; | 287 | unsigned num_gpu_pages; |
@@ -621,7 +627,9 @@ struct radeon_asic { | |||
621 | uint64_t dst_offset, | 627 | uint64_t dst_offset, |
622 | unsigned num_pages, | 628 | unsigned num_pages, |
623 | struct radeon_fence *fence); | 629 | struct radeon_fence *fence); |
630 | uint32_t (*get_engine_clock)(struct radeon_device *rdev); | ||
624 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); | 631 | void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); |
632 | uint32_t (*get_memory_clock)(struct radeon_device *rdev); | ||
625 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); | 633 | void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); |
626 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); | 634 | void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); |
627 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); | 635 | void (*set_clock_gating)(struct radeon_device *rdev, int enable); |
@@ -783,6 +791,7 @@ struct radeon_device { | |||
783 | const struct firmware *me_fw; /* all family ME firmware */ | 791 | const struct firmware *me_fw; /* all family ME firmware */ |
784 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ | 792 | const struct firmware *pfp_fw; /* r6/700 PFP firmware */ |
785 | struct r600_blit r600_blit; | 793 | struct r600_blit r600_blit; |
794 | int msi_enabled; /* msi enabled */ | ||
786 | }; | 795 | }; |
787 | 796 | ||
788 | int radeon_device_init(struct radeon_device *rdev, | 797 | int radeon_device_init(struct radeon_device *rdev, |
@@ -952,7 +961,9 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v) | |||
952 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) | 961 | #define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) |
953 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) | 962 | #define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) |
954 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) | 963 | #define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) |
964 | #define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev)) | ||
955 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) | 965 | #define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
966 | #define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev)) | ||
956 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) | 967 | #define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) |
957 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) | 968 | #define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) |
958 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) | 969 | #define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index c3532c7a6f3f..c18fbee387d7 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
@@ -31,10 +31,13 @@ | |||
31 | /* | 31 | /* |
32 | * common functions | 32 | * common functions |
33 | */ | 33 | */ |
34 | uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev); | ||
34 | void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); | 35 | void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
35 | void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); | 36 | void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); |
36 | 37 | ||
38 | uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev); | ||
37 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); | 39 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); |
40 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev); | ||
38 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); | 41 | void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); |
39 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); | 42 | void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); |
40 | 43 | ||
@@ -95,7 +98,9 @@ static struct radeon_asic r100_asic = { | |||
95 | .copy_blit = &r100_copy_blit, | 98 | .copy_blit = &r100_copy_blit, |
96 | .copy_dma = NULL, | 99 | .copy_dma = NULL, |
97 | .copy = &r100_copy_blit, | 100 | .copy = &r100_copy_blit, |
101 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
98 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 102 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
103 | .get_memory_clock = NULL, | ||
99 | .set_memory_clock = NULL, | 104 | .set_memory_clock = NULL, |
100 | .set_pcie_lanes = NULL, | 105 | .set_pcie_lanes = NULL, |
101 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 106 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -148,7 +153,9 @@ static struct radeon_asic r300_asic = { | |||
148 | .copy_blit = &r100_copy_blit, | 153 | .copy_blit = &r100_copy_blit, |
149 | .copy_dma = &r300_copy_dma, | 154 | .copy_dma = &r300_copy_dma, |
150 | .copy = &r100_copy_blit, | 155 | .copy = &r100_copy_blit, |
156 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
151 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 157 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
158 | .get_memory_clock = NULL, | ||
152 | .set_memory_clock = NULL, | 159 | .set_memory_clock = NULL, |
153 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 160 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
154 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 161 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -185,7 +192,9 @@ static struct radeon_asic r420_asic = { | |||
185 | .copy_blit = &r100_copy_blit, | 192 | .copy_blit = &r100_copy_blit, |
186 | .copy_dma = &r300_copy_dma, | 193 | .copy_dma = &r300_copy_dma, |
187 | .copy = &r100_copy_blit, | 194 | .copy = &r100_copy_blit, |
195 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
188 | .set_engine_clock = &radeon_atom_set_engine_clock, | 196 | .set_engine_clock = &radeon_atom_set_engine_clock, |
197 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
189 | .set_memory_clock = &radeon_atom_set_memory_clock, | 198 | .set_memory_clock = &radeon_atom_set_memory_clock, |
190 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 199 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
191 | .set_clock_gating = &radeon_atom_set_clock_gating, | 200 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -227,7 +236,9 @@ static struct radeon_asic rs400_asic = { | |||
227 | .copy_blit = &r100_copy_blit, | 236 | .copy_blit = &r100_copy_blit, |
228 | .copy_dma = &r300_copy_dma, | 237 | .copy_dma = &r300_copy_dma, |
229 | .copy = &r100_copy_blit, | 238 | .copy = &r100_copy_blit, |
239 | .get_engine_clock = &radeon_legacy_get_engine_clock, | ||
230 | .set_engine_clock = &radeon_legacy_set_engine_clock, | 240 | .set_engine_clock = &radeon_legacy_set_engine_clock, |
241 | .get_memory_clock = NULL, | ||
231 | .set_memory_clock = NULL, | 242 | .set_memory_clock = NULL, |
232 | .set_pcie_lanes = NULL, | 243 | .set_pcie_lanes = NULL, |
233 | .set_clock_gating = &radeon_legacy_set_clock_gating, | 244 | .set_clock_gating = &radeon_legacy_set_clock_gating, |
@@ -273,7 +284,9 @@ static struct radeon_asic rs600_asic = { | |||
273 | .copy_blit = &r100_copy_blit, | 284 | .copy_blit = &r100_copy_blit, |
274 | .copy_dma = &r300_copy_dma, | 285 | .copy_dma = &r300_copy_dma, |
275 | .copy = &r100_copy_blit, | 286 | .copy = &r100_copy_blit, |
287 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
276 | .set_engine_clock = &radeon_atom_set_engine_clock, | 288 | .set_engine_clock = &radeon_atom_set_engine_clock, |
289 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
277 | .set_memory_clock = &radeon_atom_set_memory_clock, | 290 | .set_memory_clock = &radeon_atom_set_memory_clock, |
278 | .set_pcie_lanes = NULL, | 291 | .set_pcie_lanes = NULL, |
279 | .set_clock_gating = &radeon_atom_set_clock_gating, | 292 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -312,7 +325,9 @@ static struct radeon_asic rs690_asic = { | |||
312 | .copy_blit = &r100_copy_blit, | 325 | .copy_blit = &r100_copy_blit, |
313 | .copy_dma = &r300_copy_dma, | 326 | .copy_dma = &r300_copy_dma, |
314 | .copy = &r300_copy_dma, | 327 | .copy = &r300_copy_dma, |
328 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
315 | .set_engine_clock = &radeon_atom_set_engine_clock, | 329 | .set_engine_clock = &radeon_atom_set_engine_clock, |
330 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
316 | .set_memory_clock = &radeon_atom_set_memory_clock, | 331 | .set_memory_clock = &radeon_atom_set_memory_clock, |
317 | .set_pcie_lanes = NULL, | 332 | .set_pcie_lanes = NULL, |
318 | .set_clock_gating = &radeon_atom_set_clock_gating, | 333 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -357,7 +372,9 @@ static struct radeon_asic rv515_asic = { | |||
357 | .copy_blit = &r100_copy_blit, | 372 | .copy_blit = &r100_copy_blit, |
358 | .copy_dma = &r300_copy_dma, | 373 | .copy_dma = &r300_copy_dma, |
359 | .copy = &r100_copy_blit, | 374 | .copy = &r100_copy_blit, |
375 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
360 | .set_engine_clock = &radeon_atom_set_engine_clock, | 376 | .set_engine_clock = &radeon_atom_set_engine_clock, |
377 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
361 | .set_memory_clock = &radeon_atom_set_memory_clock, | 378 | .set_memory_clock = &radeon_atom_set_memory_clock, |
362 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 379 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
363 | .set_clock_gating = &radeon_atom_set_clock_gating, | 380 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -393,7 +410,9 @@ static struct radeon_asic r520_asic = { | |||
393 | .copy_blit = &r100_copy_blit, | 410 | .copy_blit = &r100_copy_blit, |
394 | .copy_dma = &r300_copy_dma, | 411 | .copy_dma = &r300_copy_dma, |
395 | .copy = &r100_copy_blit, | 412 | .copy = &r100_copy_blit, |
413 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
396 | .set_engine_clock = &radeon_atom_set_engine_clock, | 414 | .set_engine_clock = &radeon_atom_set_engine_clock, |
415 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
397 | .set_memory_clock = &radeon_atom_set_memory_clock, | 416 | .set_memory_clock = &radeon_atom_set_memory_clock, |
398 | .set_pcie_lanes = &rv370_set_pcie_lanes, | 417 | .set_pcie_lanes = &rv370_set_pcie_lanes, |
399 | .set_clock_gating = &radeon_atom_set_clock_gating, | 418 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -456,7 +475,9 @@ static struct radeon_asic r600_asic = { | |||
456 | .copy_blit = &r600_copy_blit, | 475 | .copy_blit = &r600_copy_blit, |
457 | .copy_dma = &r600_copy_blit, | 476 | .copy_dma = &r600_copy_blit, |
458 | .copy = &r600_copy_blit, | 477 | .copy = &r600_copy_blit, |
478 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
459 | .set_engine_clock = &radeon_atom_set_engine_clock, | 479 | .set_engine_clock = &radeon_atom_set_engine_clock, |
480 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
460 | .set_memory_clock = &radeon_atom_set_memory_clock, | 481 | .set_memory_clock = &radeon_atom_set_memory_clock, |
461 | .set_pcie_lanes = NULL, | 482 | .set_pcie_lanes = NULL, |
462 | .set_clock_gating = &radeon_atom_set_clock_gating, | 483 | .set_clock_gating = &radeon_atom_set_clock_gating, |
@@ -493,7 +514,9 @@ static struct radeon_asic rv770_asic = { | |||
493 | .copy_blit = &r600_copy_blit, | 514 | .copy_blit = &r600_copy_blit, |
494 | .copy_dma = &r600_copy_blit, | 515 | .copy_dma = &r600_copy_blit, |
495 | .copy = &r600_copy_blit, | 516 | .copy = &r600_copy_blit, |
517 | .get_engine_clock = &radeon_atom_get_engine_clock, | ||
496 | .set_engine_clock = &radeon_atom_set_engine_clock, | 518 | .set_engine_clock = &radeon_atom_set_engine_clock, |
519 | .get_memory_clock = &radeon_atom_get_memory_clock, | ||
497 | .set_memory_clock = &radeon_atom_set_memory_clock, | 520 | .set_memory_clock = &radeon_atom_set_memory_clock, |
498 | .set_pcie_lanes = NULL, | 521 | .set_pcie_lanes = NULL, |
499 | .set_clock_gating = &radeon_atom_set_clock_gating, | 522 | .set_clock_gating = &radeon_atom_set_clock_gating, |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 5b6c08cee40e..2ed88a820935 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -46,7 +46,8 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
46 | uint32_t supported_device, | 46 | uint32_t supported_device, |
47 | int connector_type, | 47 | int connector_type, |
48 | struct radeon_i2c_bus_rec *i2c_bus, | 48 | struct radeon_i2c_bus_rec *i2c_bus, |
49 | bool linkb, uint32_t igp_lane_info); | 49 | bool linkb, uint32_t igp_lane_info, |
50 | uint16_t connector_object_id); | ||
50 | 51 | ||
51 | /* from radeon_legacy_encoder.c */ | 52 | /* from radeon_legacy_encoder.c */ |
52 | extern void | 53 | extern void |
@@ -193,6 +194,23 @@ const int supported_devices_connector_convert[] = { | |||
193 | DRM_MODE_CONNECTOR_DisplayPort | 194 | DRM_MODE_CONNECTOR_DisplayPort |
194 | }; | 195 | }; |
195 | 196 | ||
197 | const uint16_t supported_devices_connector_object_id_convert[] = { | ||
198 | CONNECTOR_OBJECT_ID_NONE, | ||
199 | CONNECTOR_OBJECT_ID_VGA, | ||
200 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, /* not all boards support DL */ | ||
201 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D, /* not all boards support DL */ | ||
202 | CONNECTOR_OBJECT_ID_VGA, /* technically DVI-A */ | ||
203 | CONNECTOR_OBJECT_ID_COMPOSITE, | ||
204 | CONNECTOR_OBJECT_ID_SVIDEO, | ||
205 | CONNECTOR_OBJECT_ID_LVDS, | ||
206 | CONNECTOR_OBJECT_ID_9PIN_DIN, | ||
207 | CONNECTOR_OBJECT_ID_9PIN_DIN, | ||
208 | CONNECTOR_OBJECT_ID_DISPLAYPORT, | ||
209 | CONNECTOR_OBJECT_ID_HDMI_TYPE_A, | ||
210 | CONNECTOR_OBJECT_ID_HDMI_TYPE_B, | ||
211 | CONNECTOR_OBJECT_ID_SVIDEO | ||
212 | }; | ||
213 | |||
196 | const int object_connector_convert[] = { | 214 | const int object_connector_convert[] = { |
197 | DRM_MODE_CONNECTOR_Unknown, | 215 | DRM_MODE_CONNECTOR_Unknown, |
198 | DRM_MODE_CONNECTOR_DVII, | 216 | DRM_MODE_CONNECTOR_DVII, |
@@ -229,7 +247,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
229 | ATOM_OBJECT_HEADER *obj_header; | 247 | ATOM_OBJECT_HEADER *obj_header; |
230 | int i, j, path_size, device_support; | 248 | int i, j, path_size, device_support; |
231 | int connector_type; | 249 | int connector_type; |
232 | uint16_t igp_lane_info, conn_id; | 250 | uint16_t igp_lane_info, conn_id, connector_object_id; |
233 | bool linkb; | 251 | bool linkb; |
234 | struct radeon_i2c_bus_rec ddc_bus; | 252 | struct radeon_i2c_bus_rec ddc_bus; |
235 | 253 | ||
@@ -277,7 +295,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
277 | ATOM_DEVICE_CV_SUPPORT) | 295 | ATOM_DEVICE_CV_SUPPORT) |
278 | continue; | 296 | continue; |
279 | 297 | ||
280 | if ((rdev->family == CHIP_RS780) && | 298 | /* IGP chips */ |
299 | if ((rdev->flags & RADEON_IS_IGP) && | ||
281 | (con_obj_id == | 300 | (con_obj_id == |
282 | CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) { | 301 | CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) { |
283 | uint16_t igp_offset = 0; | 302 | uint16_t igp_offset = 0; |
@@ -311,6 +330,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
311 | connector_type = | 330 | connector_type = |
312 | object_connector_convert | 331 | object_connector_convert |
313 | [ct]; | 332 | [ct]; |
333 | connector_object_id = ct; | ||
314 | igp_lane_info = | 334 | igp_lane_info = |
315 | slot_config & 0xffff; | 335 | slot_config & 0xffff; |
316 | } else | 336 | } else |
@@ -321,6 +341,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
321 | igp_lane_info = 0; | 341 | igp_lane_info = 0; |
322 | connector_type = | 342 | connector_type = |
323 | object_connector_convert[con_obj_id]; | 343 | object_connector_convert[con_obj_id]; |
344 | connector_object_id = con_obj_id; | ||
324 | } | 345 | } |
325 | 346 | ||
326 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) | 347 | if (connector_type == DRM_MODE_CONNECTOR_Unknown) |
@@ -425,7 +446,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
425 | le16_to_cpu(path-> | 446 | le16_to_cpu(path-> |
426 | usDeviceTag), | 447 | usDeviceTag), |
427 | connector_type, &ddc_bus, | 448 | connector_type, &ddc_bus, |
428 | linkb, igp_lane_info); | 449 | linkb, igp_lane_info, |
450 | connector_object_id); | ||
429 | 451 | ||
430 | } | 452 | } |
431 | } | 453 | } |
@@ -435,6 +457,45 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
435 | return true; | 457 | return true; |
436 | } | 458 | } |
437 | 459 | ||
460 | static uint16_t atombios_get_connector_object_id(struct drm_device *dev, | ||
461 | int connector_type, | ||
462 | uint16_t devices) | ||
463 | { | ||
464 | struct radeon_device *rdev = dev->dev_private; | ||
465 | |||
466 | if (rdev->flags & RADEON_IS_IGP) { | ||
467 | return supported_devices_connector_object_id_convert | ||
468 | [connector_type]; | ||
469 | } else if (((connector_type == DRM_MODE_CONNECTOR_DVII) || | ||
470 | (connector_type == DRM_MODE_CONNECTOR_DVID)) && | ||
471 | (devices & ATOM_DEVICE_DFP2_SUPPORT)) { | ||
472 | struct radeon_mode_info *mode_info = &rdev->mode_info; | ||
473 | struct atom_context *ctx = mode_info->atom_context; | ||
474 | int index = GetIndexIntoMasterTable(DATA, XTMDS_Info); | ||
475 | uint16_t size, data_offset; | ||
476 | uint8_t frev, crev; | ||
477 | ATOM_XTMDS_INFO *xtmds; | ||
478 | |||
479 | atom_parse_data_header(ctx, index, &size, &frev, &crev, &data_offset); | ||
480 | xtmds = (ATOM_XTMDS_INFO *)(ctx->bios + data_offset); | ||
481 | |||
482 | if (xtmds->ucSupportedLink & ATOM_XTMDS_SUPPORTED_DUALLINK) { | ||
483 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | ||
484 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I; | ||
485 | else | ||
486 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D; | ||
487 | } else { | ||
488 | if (connector_type == DRM_MODE_CONNECTOR_DVII) | ||
489 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
490 | else | ||
491 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D; | ||
492 | } | ||
493 | } else { | ||
494 | return supported_devices_connector_object_id_convert | ||
495 | [connector_type]; | ||
496 | } | ||
497 | } | ||
498 | |||
438 | struct bios_connector { | 499 | struct bios_connector { |
439 | bool valid; | 500 | bool valid; |
440 | uint16_t line_mux; | 501 | uint16_t line_mux; |
@@ -593,14 +654,20 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct | |||
593 | 654 | ||
594 | /* add the connectors */ | 655 | /* add the connectors */ |
595 | for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) { | 656 | for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) { |
596 | if (bios_connectors[i].valid) | 657 | if (bios_connectors[i].valid) { |
658 | uint16_t connector_object_id = | ||
659 | atombios_get_connector_object_id(dev, | ||
660 | bios_connectors[i].connector_type, | ||
661 | bios_connectors[i].devices); | ||
597 | radeon_add_atom_connector(dev, | 662 | radeon_add_atom_connector(dev, |
598 | bios_connectors[i].line_mux, | 663 | bios_connectors[i].line_mux, |
599 | bios_connectors[i].devices, | 664 | bios_connectors[i].devices, |
600 | bios_connectors[i]. | 665 | bios_connectors[i]. |
601 | connector_type, | 666 | connector_type, |
602 | &bios_connectors[i].ddc_bus, | 667 | &bios_connectors[i].ddc_bus, |
603 | false, 0); | 668 | false, 0, |
669 | connector_object_id); | ||
670 | } | ||
604 | } | 671 | } |
605 | 672 | ||
606 | radeon_link_encoder_connector(dev); | 673 | radeon_link_encoder_connector(dev); |
@@ -641,8 +708,12 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) | |||
641 | le16_to_cpu(firmware_info->info.usReferenceClock); | 708 | le16_to_cpu(firmware_info->info.usReferenceClock); |
642 | p1pll->reference_div = 0; | 709 | p1pll->reference_div = 0; |
643 | 710 | ||
644 | p1pll->pll_out_min = | 711 | if (crev < 2) |
645 | le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output); | 712 | p1pll->pll_out_min = |
713 | le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output); | ||
714 | else | ||
715 | p1pll->pll_out_min = | ||
716 | le32_to_cpu(firmware_info->info_12.ulMinPixelClockPLL_Output); | ||
646 | p1pll->pll_out_max = | 717 | p1pll->pll_out_max = |
647 | le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output); | 718 | le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output); |
648 | 719 | ||
@@ -651,6 +722,16 @@ bool radeon_atom_get_clock_info(struct drm_device *dev) | |||
651 | p1pll->pll_out_min = 64800; | 722 | p1pll->pll_out_min = 64800; |
652 | else | 723 | else |
653 | p1pll->pll_out_min = 20000; | 724 | p1pll->pll_out_min = 20000; |
725 | } else if (p1pll->pll_out_min > 64800) { | ||
726 | /* Limiting the pll output range is a good thing generally as | ||
727 | * it limits the number of possible pll combinations for a given | ||
728 | * frequency presumably to the ones that work best on each card. | ||
729 | * However, certain duallink DVI monitors seem to like | ||
730 | * pll combinations that would be limited by this at least on | ||
731 | * pre-DCE 3.0 r6xx hardware. This might need to be adjusted per | ||
732 | * family. | ||
733 | */ | ||
734 | p1pll->pll_out_min = 64800; | ||
654 | } | 735 | } |
655 | 736 | ||
656 | p1pll->pll_in_min = | 737 | p1pll->pll_in_min = |
@@ -767,6 +848,46 @@ bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder, | |||
767 | return false; | 848 | return false; |
768 | } | 849 | } |
769 | 850 | ||
851 | static struct radeon_atom_ss *radeon_atombios_get_ss_info(struct | ||
852 | radeon_encoder | ||
853 | *encoder, | ||
854 | int id) | ||
855 | { | ||
856 | struct drm_device *dev = encoder->base.dev; | ||
857 | struct radeon_device *rdev = dev->dev_private; | ||
858 | struct radeon_mode_info *mode_info = &rdev->mode_info; | ||
859 | int index = GetIndexIntoMasterTable(DATA, PPLL_SS_Info); | ||
860 | uint16_t data_offset; | ||
861 | struct _ATOM_SPREAD_SPECTRUM_INFO *ss_info; | ||
862 | uint8_t frev, crev; | ||
863 | struct radeon_atom_ss *ss = NULL; | ||
864 | |||
865 | if (id > ATOM_MAX_SS_ENTRY) | ||
866 | return NULL; | ||
867 | |||
868 | atom_parse_data_header(mode_info->atom_context, index, NULL, &frev, | ||
869 | &crev, &data_offset); | ||
870 | |||
871 | ss_info = | ||
872 | (struct _ATOM_SPREAD_SPECTRUM_INFO *)(mode_info->atom_context->bios + data_offset); | ||
873 | |||
874 | if (ss_info) { | ||
875 | ss = | ||
876 | kzalloc(sizeof(struct radeon_atom_ss), GFP_KERNEL); | ||
877 | |||
878 | if (!ss) | ||
879 | return NULL; | ||
880 | |||
881 | ss->percentage = le16_to_cpu(ss_info->asSS_Info[id].usSpreadSpectrumPercentage); | ||
882 | ss->type = ss_info->asSS_Info[id].ucSpreadSpectrumType; | ||
883 | ss->step = ss_info->asSS_Info[id].ucSS_Step; | ||
884 | ss->delay = ss_info->asSS_Info[id].ucSS_Delay; | ||
885 | ss->range = ss_info->asSS_Info[id].ucSS_Range; | ||
886 | ss->refdiv = ss_info->asSS_Info[id].ucRecommendedRef_Div; | ||
887 | } | ||
888 | return ss; | ||
889 | } | ||
890 | |||
770 | union lvds_info { | 891 | union lvds_info { |
771 | struct _ATOM_LVDS_INFO info; | 892 | struct _ATOM_LVDS_INFO info; |
772 | struct _ATOM_LVDS_INFO_V12 info_12; | 893 | struct _ATOM_LVDS_INFO_V12 info_12; |
@@ -798,27 +919,31 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct | |||
798 | if (!lvds) | 919 | if (!lvds) |
799 | return NULL; | 920 | return NULL; |
800 | 921 | ||
801 | lvds->native_mode.dotclock = | 922 | lvds->native_mode.clock = |
802 | le16_to_cpu(lvds_info->info.sLCDTiming.usPixClk) * 10; | 923 | le16_to_cpu(lvds_info->info.sLCDTiming.usPixClk) * 10; |
803 | lvds->native_mode.panel_xres = | 924 | lvds->native_mode.hdisplay = |
804 | le16_to_cpu(lvds_info->info.sLCDTiming.usHActive); | 925 | le16_to_cpu(lvds_info->info.sLCDTiming.usHActive); |
805 | lvds->native_mode.panel_yres = | 926 | lvds->native_mode.vdisplay = |
806 | le16_to_cpu(lvds_info->info.sLCDTiming.usVActive); | 927 | le16_to_cpu(lvds_info->info.sLCDTiming.usVActive); |
807 | lvds->native_mode.hblank = | 928 | lvds->native_mode.htotal = lvds->native_mode.hdisplay + |
808 | le16_to_cpu(lvds_info->info.sLCDTiming.usHBlanking_Time); | 929 | le16_to_cpu(lvds_info->info.sLCDTiming.usHBlanking_Time); |
809 | lvds->native_mode.hoverplus = | 930 | lvds->native_mode.hsync_start = lvds->native_mode.hdisplay + |
810 | le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncOffset); | 931 | le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncOffset); |
811 | lvds->native_mode.hsync_width = | 932 | lvds->native_mode.hsync_end = lvds->native_mode.hsync_start + |
812 | le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncWidth); | 933 | le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncWidth); |
813 | lvds->native_mode.vblank = | 934 | lvds->native_mode.vtotal = lvds->native_mode.vdisplay + |
814 | le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time); | 935 | le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time); |
815 | lvds->native_mode.voverplus = | 936 | lvds->native_mode.vsync_start = lvds->native_mode.vdisplay + |
816 | le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncOffset); | 937 | le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth); |
817 | lvds->native_mode.vsync_width = | 938 | lvds->native_mode.vsync_end = lvds->native_mode.vsync_start + |
818 | le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth); | 939 | le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth); |
819 | lvds->panel_pwr_delay = | 940 | lvds->panel_pwr_delay = |
820 | le16_to_cpu(lvds_info->info.usOffDelayInMs); | 941 | le16_to_cpu(lvds_info->info.usOffDelayInMs); |
821 | lvds->lvds_misc = lvds_info->info.ucLVDS_Misc; | 942 | lvds->lvds_misc = lvds_info->info.ucLVDS_Misc; |
943 | /* set crtc values */ | ||
944 | drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); | ||
945 | |||
946 | lvds->ss = radeon_atombios_get_ss_info(encoder, lvds_info->info.ucSS_Id); | ||
822 | 947 | ||
823 | encoder->native_mode = lvds->native_mode; | 948 | encoder->native_mode = lvds->native_mode; |
824 | } | 949 | } |
@@ -857,8 +982,7 @@ radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder) | |||
857 | } | 982 | } |
858 | 983 | ||
859 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | 984 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, |
860 | SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing, | 985 | struct drm_display_mode *mode) |
861 | int32_t *pixel_clock) | ||
862 | { | 986 | { |
863 | struct radeon_mode_info *mode_info = &rdev->mode_info; | 987 | struct radeon_mode_info *mode_info = &rdev->mode_info; |
864 | ATOM_ANALOG_TV_INFO *tv_info; | 988 | ATOM_ANALOG_TV_INFO *tv_info; |
@@ -866,7 +990,7 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | |||
866 | ATOM_DTD_FORMAT *dtd_timings; | 990 | ATOM_DTD_FORMAT *dtd_timings; |
867 | int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info); | 991 | int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info); |
868 | u8 frev, crev; | 992 | u8 frev, crev; |
869 | uint16_t data_offset; | 993 | u16 data_offset, misc; |
870 | 994 | ||
871 | atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset); | 995 | atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset); |
872 | 996 | ||
@@ -876,28 +1000,37 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | |||
876 | if (index > MAX_SUPPORTED_TV_TIMING) | 1000 | if (index > MAX_SUPPORTED_TV_TIMING) |
877 | return false; | 1001 | return false; |
878 | 1002 | ||
879 | crtc_timing->usH_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total); | 1003 | mode->crtc_htotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total); |
880 | crtc_timing->usH_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp); | 1004 | mode->crtc_hdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp); |
881 | crtc_timing->usH_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart); | 1005 | mode->crtc_hsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart); |
882 | crtc_timing->usH_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth); | 1006 | mode->crtc_hsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart) + |
883 | 1007 | le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth); | |
884 | crtc_timing->usV_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total); | 1008 | |
885 | crtc_timing->usV_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp); | 1009 | mode->crtc_vtotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total); |
886 | crtc_timing->usV_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart); | 1010 | mode->crtc_vdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp); |
887 | crtc_timing->usV_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth); | 1011 | mode->crtc_vsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart); |
888 | 1012 | mode->crtc_vsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart) + | |
889 | crtc_timing->susModeMiscInfo = tv_info->aModeTimings[index].susModeMiscInfo; | 1013 | le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth); |
890 | 1014 | ||
891 | crtc_timing->ucOverscanRight = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanRight); | 1015 | mode->flags = 0; |
892 | crtc_timing->ucOverscanLeft = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanLeft); | 1016 | misc = le16_to_cpu(tv_info->aModeTimings[index].susModeMiscInfo.usAccess); |
893 | crtc_timing->ucOverscanBottom = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanBottom); | 1017 | if (misc & ATOM_VSYNC_POLARITY) |
894 | crtc_timing->ucOverscanTop = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanTop); | 1018 | mode->flags |= DRM_MODE_FLAG_NVSYNC; |
895 | *pixel_clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10; | 1019 | if (misc & ATOM_HSYNC_POLARITY) |
1020 | mode->flags |= DRM_MODE_FLAG_NHSYNC; | ||
1021 | if (misc & ATOM_COMPOSITESYNC) | ||
1022 | mode->flags |= DRM_MODE_FLAG_CSYNC; | ||
1023 | if (misc & ATOM_INTERLACE) | ||
1024 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | ||
1025 | if (misc & ATOM_DOUBLE_CLOCK_MODE) | ||
1026 | mode->flags |= DRM_MODE_FLAG_DBLSCAN; | ||
1027 | |||
1028 | mode->clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10; | ||
896 | 1029 | ||
897 | if (index == 1) { | 1030 | if (index == 1) { |
898 | /* PAL timings appear to have wrong values for totals */ | 1031 | /* PAL timings appear to have wrong values for totals */ |
899 | crtc_timing->usH_Total -= 1; | 1032 | mode->crtc_htotal -= 1; |
900 | crtc_timing->usV_Total -= 1; | 1033 | mode->crtc_vtotal -= 1; |
901 | } | 1034 | } |
902 | break; | 1035 | break; |
903 | case 2: | 1036 | case 2: |
@@ -906,17 +1039,36 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | |||
906 | return false; | 1039 | return false; |
907 | 1040 | ||
908 | dtd_timings = &tv_info_v1_2->aModeTimings[index]; | 1041 | dtd_timings = &tv_info_v1_2->aModeTimings[index]; |
909 | crtc_timing->usH_Total = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHBlanking_Time); | 1042 | mode->crtc_htotal = le16_to_cpu(dtd_timings->usHActive) + |
910 | crtc_timing->usH_Disp = le16_to_cpu(dtd_timings->usHActive); | 1043 | le16_to_cpu(dtd_timings->usHBlanking_Time); |
911 | crtc_timing->usH_SyncStart = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHSyncOffset); | 1044 | mode->crtc_hdisplay = le16_to_cpu(dtd_timings->usHActive); |
912 | crtc_timing->usH_SyncWidth = le16_to_cpu(dtd_timings->usHSyncWidth); | 1045 | mode->crtc_hsync_start = le16_to_cpu(dtd_timings->usHActive) + |
913 | crtc_timing->usV_Total = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVBlanking_Time); | 1046 | le16_to_cpu(dtd_timings->usHSyncOffset); |
914 | crtc_timing->usV_Disp = le16_to_cpu(dtd_timings->usVActive); | 1047 | mode->crtc_hsync_end = mode->crtc_hsync_start + |
915 | crtc_timing->usV_SyncStart = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVSyncOffset); | 1048 | le16_to_cpu(dtd_timings->usHSyncWidth); |
916 | crtc_timing->usV_SyncWidth = le16_to_cpu(dtd_timings->usVSyncWidth); | 1049 | |
917 | 1050 | mode->crtc_vtotal = le16_to_cpu(dtd_timings->usVActive) + | |
918 | crtc_timing->susModeMiscInfo.usAccess = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess); | 1051 | le16_to_cpu(dtd_timings->usVBlanking_Time); |
919 | *pixel_clock = le16_to_cpu(dtd_timings->usPixClk) * 10; | 1052 | mode->crtc_vdisplay = le16_to_cpu(dtd_timings->usVActive); |
1053 | mode->crtc_vsync_start = le16_to_cpu(dtd_timings->usVActive) + | ||
1054 | le16_to_cpu(dtd_timings->usVSyncOffset); | ||
1055 | mode->crtc_vsync_end = mode->crtc_vsync_start + | ||
1056 | le16_to_cpu(dtd_timings->usVSyncWidth); | ||
1057 | |||
1058 | mode->flags = 0; | ||
1059 | misc = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess); | ||
1060 | if (misc & ATOM_VSYNC_POLARITY) | ||
1061 | mode->flags |= DRM_MODE_FLAG_NVSYNC; | ||
1062 | if (misc & ATOM_HSYNC_POLARITY) | ||
1063 | mode->flags |= DRM_MODE_FLAG_NHSYNC; | ||
1064 | if (misc & ATOM_COMPOSITESYNC) | ||
1065 | mode->flags |= DRM_MODE_FLAG_CSYNC; | ||
1066 | if (misc & ATOM_INTERLACE) | ||
1067 | mode->flags |= DRM_MODE_FLAG_INTERLACE; | ||
1068 | if (misc & ATOM_DOUBLE_CLOCK_MODE) | ||
1069 | mode->flags |= DRM_MODE_FLAG_DBLSCAN; | ||
1070 | |||
1071 | mode->clock = le16_to_cpu(dtd_timings->usPixClk) * 10; | ||
920 | break; | 1072 | break; |
921 | } | 1073 | } |
922 | return true; | 1074 | return true; |
@@ -981,6 +1133,24 @@ void radeon_atom_static_pwrmgt_setup(struct radeon_device *rdev, int enable) | |||
981 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 1133 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
982 | } | 1134 | } |
983 | 1135 | ||
1136 | uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev) | ||
1137 | { | ||
1138 | GET_ENGINE_CLOCK_PS_ALLOCATION args; | ||
1139 | int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock); | ||
1140 | |||
1141 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1142 | return args.ulReturnEngineClock; | ||
1143 | } | ||
1144 | |||
1145 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev) | ||
1146 | { | ||
1147 | GET_MEMORY_CLOCK_PS_ALLOCATION args; | ||
1148 | int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock); | ||
1149 | |||
1150 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | ||
1151 | return args.ulReturnMemoryClock; | ||
1152 | } | ||
1153 | |||
984 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, | 1154 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, |
985 | uint32_t eng_clock) | 1155 | uint32_t eng_clock) |
986 | { | 1156 | { |
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c index 2e938f7496fb..10bd50a7db87 100644 --- a/drivers/gpu/drm/radeon/radeon_benchmark.c +++ b/drivers/gpu/drm/radeon/radeon_benchmark.c | |||
@@ -63,7 +63,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize, | |||
63 | if (r) { | 63 | if (r) { |
64 | goto out_cleanup; | 64 | goto out_cleanup; |
65 | } | 65 | } |
66 | r = radeon_copy_dma(rdev, saddr, daddr, size / 4096, fence); | 66 | r = radeon_copy_dma(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence); |
67 | if (r) { | 67 | if (r) { |
68 | goto out_cleanup; | 68 | goto out_cleanup; |
69 | } | 69 | } |
@@ -88,7 +88,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize, | |||
88 | if (r) { | 88 | if (r) { |
89 | goto out_cleanup; | 89 | goto out_cleanup; |
90 | } | 90 | } |
91 | r = radeon_copy_blit(rdev, saddr, daddr, size / 4096, fence); | 91 | r = radeon_copy_blit(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence); |
92 | if (r) { | 92 | if (r) { |
93 | goto out_cleanup; | 93 | goto out_cleanup; |
94 | } | 94 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c index 34a9b9119518..906921740c60 100644 --- a/drivers/gpu/drm/radeon/radeon_bios.c +++ b/drivers/gpu/drm/radeon/radeon_bios.c | |||
@@ -50,19 +50,16 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev) | |||
50 | vram_base = drm_get_resource_start(rdev->ddev, 0); | 50 | vram_base = drm_get_resource_start(rdev->ddev, 0); |
51 | bios = ioremap(vram_base, size); | 51 | bios = ioremap(vram_base, size); |
52 | if (!bios) { | 52 | if (!bios) { |
53 | DRM_ERROR("Unable to mmap vram\n"); | ||
54 | return false; | 53 | return false; |
55 | } | 54 | } |
56 | 55 | ||
57 | if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { | 56 | if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { |
58 | iounmap(bios); | 57 | iounmap(bios); |
59 | DRM_ERROR("bad rom signature\n"); | ||
60 | return false; | 58 | return false; |
61 | } | 59 | } |
62 | rdev->bios = kmalloc(size, GFP_KERNEL); | 60 | rdev->bios = kmalloc(size, GFP_KERNEL); |
63 | if (rdev->bios == NULL) { | 61 | if (rdev->bios == NULL) { |
64 | iounmap(bios); | 62 | iounmap(bios); |
65 | DRM_ERROR("kmalloc failed\n"); | ||
66 | return false; | 63 | return false; |
67 | } | 64 | } |
68 | memcpy(rdev->bios, bios, size); | 65 | memcpy(rdev->bios, bios, size); |
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c index f5c32a766b10..a81354167621 100644 --- a/drivers/gpu/drm/radeon/radeon_clocks.c +++ b/drivers/gpu/drm/radeon/radeon_clocks.c | |||
@@ -32,7 +32,7 @@ | |||
32 | #include "atom.h" | 32 | #include "atom.h" |
33 | 33 | ||
34 | /* 10 khz */ | 34 | /* 10 khz */ |
35 | static uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) | 35 | uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) |
36 | { | 36 | { |
37 | struct radeon_pll *spll = &rdev->clock.spll; | 37 | struct radeon_pll *spll = &rdev->clock.spll; |
38 | uint32_t fb_div, ref_div, post_div, sclk; | 38 | uint32_t fb_div, ref_div, post_div, sclk; |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 748265a105b3..5253cbf6db1f 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -49,7 +49,8 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
49 | uint32_t connector_id, | 49 | uint32_t connector_id, |
50 | uint32_t supported_device, | 50 | uint32_t supported_device, |
51 | int connector_type, | 51 | int connector_type, |
52 | struct radeon_i2c_bus_rec *i2c_bus); | 52 | struct radeon_i2c_bus_rec *i2c_bus, |
53 | uint16_t connector_object_id); | ||
53 | 54 | ||
54 | /* from radeon_legacy_encoder.c */ | 55 | /* from radeon_legacy_encoder.c */ |
55 | extern void | 56 | extern void |
@@ -808,25 +809,25 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct | |||
808 | lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf; | 809 | lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf; |
809 | 810 | ||
810 | if (fp_vert_stretch & RADEON_VERT_STRETCH_ENABLE) | 811 | if (fp_vert_stretch & RADEON_VERT_STRETCH_ENABLE) |
811 | lvds->native_mode.panel_yres = | 812 | lvds->native_mode.vdisplay = |
812 | ((fp_vert_stretch & RADEON_VERT_PANEL_SIZE) >> | 813 | ((fp_vert_stretch & RADEON_VERT_PANEL_SIZE) >> |
813 | RADEON_VERT_PANEL_SHIFT) + 1; | 814 | RADEON_VERT_PANEL_SHIFT) + 1; |
814 | else | 815 | else |
815 | lvds->native_mode.panel_yres = | 816 | lvds->native_mode.vdisplay = |
816 | (RREG32(RADEON_CRTC_V_TOTAL_DISP) >> 16) + 1; | 817 | (RREG32(RADEON_CRTC_V_TOTAL_DISP) >> 16) + 1; |
817 | 818 | ||
818 | if (fp_horz_stretch & RADEON_HORZ_STRETCH_ENABLE) | 819 | if (fp_horz_stretch & RADEON_HORZ_STRETCH_ENABLE) |
819 | lvds->native_mode.panel_xres = | 820 | lvds->native_mode.hdisplay = |
820 | (((fp_horz_stretch & RADEON_HORZ_PANEL_SIZE) >> | 821 | (((fp_horz_stretch & RADEON_HORZ_PANEL_SIZE) >> |
821 | RADEON_HORZ_PANEL_SHIFT) + 1) * 8; | 822 | RADEON_HORZ_PANEL_SHIFT) + 1) * 8; |
822 | else | 823 | else |
823 | lvds->native_mode.panel_xres = | 824 | lvds->native_mode.hdisplay = |
824 | ((RREG32(RADEON_CRTC_H_TOTAL_DISP) >> 16) + 1) * 8; | 825 | ((RREG32(RADEON_CRTC_H_TOTAL_DISP) >> 16) + 1) * 8; |
825 | 826 | ||
826 | if ((lvds->native_mode.panel_xres < 640) || | 827 | if ((lvds->native_mode.hdisplay < 640) || |
827 | (lvds->native_mode.panel_yres < 480)) { | 828 | (lvds->native_mode.vdisplay < 480)) { |
828 | lvds->native_mode.panel_xres = 640; | 829 | lvds->native_mode.hdisplay = 640; |
829 | lvds->native_mode.panel_yres = 480; | 830 | lvds->native_mode.vdisplay = 480; |
830 | } | 831 | } |
831 | 832 | ||
832 | ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; | 833 | ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; |
@@ -846,8 +847,8 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct | |||
846 | lvds->panel_vcc_delay = 200; | 847 | lvds->panel_vcc_delay = 200; |
847 | 848 | ||
848 | DRM_INFO("Panel info derived from registers\n"); | 849 | DRM_INFO("Panel info derived from registers\n"); |
849 | DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.panel_xres, | 850 | DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, |
850 | lvds->native_mode.panel_yres); | 851 | lvds->native_mode.vdisplay); |
851 | 852 | ||
852 | return lvds; | 853 | return lvds; |
853 | } | 854 | } |
@@ -882,11 +883,11 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder | |||
882 | 883 | ||
883 | DRM_INFO("Panel ID String: %s\n", stmp); | 884 | DRM_INFO("Panel ID String: %s\n", stmp); |
884 | 885 | ||
885 | lvds->native_mode.panel_xres = RBIOS16(lcd_info + 0x19); | 886 | lvds->native_mode.hdisplay = RBIOS16(lcd_info + 0x19); |
886 | lvds->native_mode.panel_yres = RBIOS16(lcd_info + 0x1b); | 887 | lvds->native_mode.vdisplay = RBIOS16(lcd_info + 0x1b); |
887 | 888 | ||
888 | DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.panel_xres, | 889 | DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay, |
889 | lvds->native_mode.panel_yres); | 890 | lvds->native_mode.vdisplay); |
890 | 891 | ||
891 | lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); | 892 | lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); |
892 | if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) | 893 | if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) |
@@ -944,27 +945,25 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder | |||
944 | if (tmp == 0) | 945 | if (tmp == 0) |
945 | break; | 946 | break; |
946 | 947 | ||
947 | if ((RBIOS16(tmp) == lvds->native_mode.panel_xres) && | 948 | if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) && |
948 | (RBIOS16(tmp + 2) == | 949 | (RBIOS16(tmp + 2) == |
949 | lvds->native_mode.panel_yres)) { | 950 | lvds->native_mode.vdisplay)) { |
950 | lvds->native_mode.hblank = | 951 | lvds->native_mode.htotal = RBIOS16(tmp + 17) * 8; |
951 | (RBIOS16(tmp + 17) - RBIOS16(tmp + 19)) * 8; | 952 | lvds->native_mode.hsync_start = RBIOS16(tmp + 21) * 8; |
952 | lvds->native_mode.hoverplus = | 953 | lvds->native_mode.hsync_end = (RBIOS8(tmp + 23) + |
953 | (RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - | 954 | RBIOS16(tmp + 21)) * 8; |
954 | 1) * 8; | 955 | |
955 | lvds->native_mode.hsync_width = | 956 | lvds->native_mode.vtotal = RBIOS16(tmp + 24); |
956 | RBIOS8(tmp + 23) * 8; | 957 | lvds->native_mode.vsync_start = RBIOS16(tmp + 28) & 0x7ff; |
957 | 958 | lvds->native_mode.vsync_end = | |
958 | lvds->native_mode.vblank = (RBIOS16(tmp + 24) - | 959 | ((RBIOS16(tmp + 28) & 0xf800) >> 11) + |
959 | RBIOS16(tmp + 26)); | 960 | (RBIOS16(tmp + 28) & 0x7ff); |
960 | lvds->native_mode.voverplus = | 961 | |
961 | ((RBIOS16(tmp + 28) & 0x7ff) - | 962 | lvds->native_mode.clock = RBIOS16(tmp + 9) * 10; |
962 | RBIOS16(tmp + 26)); | ||
963 | lvds->native_mode.vsync_width = | ||
964 | ((RBIOS16(tmp + 28) & 0xf800) >> 11); | ||
965 | lvds->native_mode.dotclock = | ||
966 | RBIOS16(tmp + 9) * 10; | ||
967 | lvds->native_mode.flags = 0; | 963 | lvds->native_mode.flags = 0; |
964 | /* set crtc values */ | ||
965 | drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); | ||
966 | |||
968 | } | 967 | } |
969 | } | 968 | } |
970 | } else { | 969 | } else { |
@@ -1178,7 +1177,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1178 | radeon_add_legacy_connector(dev, 0, | 1177 | radeon_add_legacy_connector(dev, 0, |
1179 | ATOM_DEVICE_CRT1_SUPPORT, | 1178 | ATOM_DEVICE_CRT1_SUPPORT, |
1180 | DRM_MODE_CONNECTOR_VGA, | 1179 | DRM_MODE_CONNECTOR_VGA, |
1181 | &ddc_i2c); | 1180 | &ddc_i2c, |
1181 | CONNECTOR_OBJECT_ID_VGA); | ||
1182 | } else if (rdev->flags & RADEON_IS_MOBILITY) { | 1182 | } else if (rdev->flags & RADEON_IS_MOBILITY) { |
1183 | /* LVDS */ | 1183 | /* LVDS */ |
1184 | ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); | 1184 | ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); |
@@ -1190,7 +1190,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1190 | radeon_add_legacy_connector(dev, 0, | 1190 | radeon_add_legacy_connector(dev, 0, |
1191 | ATOM_DEVICE_LCD1_SUPPORT, | 1191 | ATOM_DEVICE_LCD1_SUPPORT, |
1192 | DRM_MODE_CONNECTOR_LVDS, | 1192 | DRM_MODE_CONNECTOR_LVDS, |
1193 | &ddc_i2c); | 1193 | &ddc_i2c, |
1194 | CONNECTOR_OBJECT_ID_LVDS); | ||
1194 | 1195 | ||
1195 | /* VGA - primary dac */ | 1196 | /* VGA - primary dac */ |
1196 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1197 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
@@ -1202,7 +1203,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1202 | radeon_add_legacy_connector(dev, 1, | 1203 | radeon_add_legacy_connector(dev, 1, |
1203 | ATOM_DEVICE_CRT1_SUPPORT, | 1204 | ATOM_DEVICE_CRT1_SUPPORT, |
1204 | DRM_MODE_CONNECTOR_VGA, | 1205 | DRM_MODE_CONNECTOR_VGA, |
1205 | &ddc_i2c); | 1206 | &ddc_i2c, |
1207 | CONNECTOR_OBJECT_ID_VGA); | ||
1206 | } else { | 1208 | } else { |
1207 | /* DVI-I - tv dac, int tmds */ | 1209 | /* DVI-I - tv dac, int tmds */ |
1208 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); | 1210 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
@@ -1220,7 +1222,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1220 | ATOM_DEVICE_DFP1_SUPPORT | | 1222 | ATOM_DEVICE_DFP1_SUPPORT | |
1221 | ATOM_DEVICE_CRT2_SUPPORT, | 1223 | ATOM_DEVICE_CRT2_SUPPORT, |
1222 | DRM_MODE_CONNECTOR_DVII, | 1224 | DRM_MODE_CONNECTOR_DVII, |
1223 | &ddc_i2c); | 1225 | &ddc_i2c, |
1226 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1224 | 1227 | ||
1225 | /* VGA - primary dac */ | 1228 | /* VGA - primary dac */ |
1226 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1229 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
@@ -1232,7 +1235,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1232 | radeon_add_legacy_connector(dev, 1, | 1235 | radeon_add_legacy_connector(dev, 1, |
1233 | ATOM_DEVICE_CRT1_SUPPORT, | 1236 | ATOM_DEVICE_CRT1_SUPPORT, |
1234 | DRM_MODE_CONNECTOR_VGA, | 1237 | DRM_MODE_CONNECTOR_VGA, |
1235 | &ddc_i2c); | 1238 | &ddc_i2c, |
1239 | CONNECTOR_OBJECT_ID_VGA); | ||
1236 | } | 1240 | } |
1237 | 1241 | ||
1238 | if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { | 1242 | if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { |
@@ -1245,7 +1249,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1245 | radeon_add_legacy_connector(dev, 2, | 1249 | radeon_add_legacy_connector(dev, 2, |
1246 | ATOM_DEVICE_TV1_SUPPORT, | 1250 | ATOM_DEVICE_TV1_SUPPORT, |
1247 | DRM_MODE_CONNECTOR_SVIDEO, | 1251 | DRM_MODE_CONNECTOR_SVIDEO, |
1248 | &ddc_i2c); | 1252 | &ddc_i2c, |
1253 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1249 | } | 1254 | } |
1250 | break; | 1255 | break; |
1251 | case CT_IBOOK: | 1256 | case CT_IBOOK: |
@@ -1259,7 +1264,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1259 | 0), | 1264 | 0), |
1260 | ATOM_DEVICE_LCD1_SUPPORT); | 1265 | ATOM_DEVICE_LCD1_SUPPORT); |
1261 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, | 1266 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1262 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); | 1267 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1268 | CONNECTOR_OBJECT_ID_LVDS); | ||
1263 | /* VGA - TV DAC */ | 1269 | /* VGA - TV DAC */ |
1264 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1270 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1265 | radeon_add_legacy_encoder(dev, | 1271 | radeon_add_legacy_encoder(dev, |
@@ -1268,7 +1274,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1268 | 2), | 1274 | 2), |
1269 | ATOM_DEVICE_CRT2_SUPPORT); | 1275 | ATOM_DEVICE_CRT2_SUPPORT); |
1270 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, | 1276 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1271 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1277 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1278 | CONNECTOR_OBJECT_ID_VGA); | ||
1272 | /* TV - TV DAC */ | 1279 | /* TV - TV DAC */ |
1273 | radeon_add_legacy_encoder(dev, | 1280 | radeon_add_legacy_encoder(dev, |
1274 | radeon_get_encoder_id(dev, | 1281 | radeon_get_encoder_id(dev, |
@@ -1277,7 +1284,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1277 | ATOM_DEVICE_TV1_SUPPORT); | 1284 | ATOM_DEVICE_TV1_SUPPORT); |
1278 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1285 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1279 | DRM_MODE_CONNECTOR_SVIDEO, | 1286 | DRM_MODE_CONNECTOR_SVIDEO, |
1280 | &ddc_i2c); | 1287 | &ddc_i2c, |
1288 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1281 | break; | 1289 | break; |
1282 | case CT_POWERBOOK_EXTERNAL: | 1290 | case CT_POWERBOOK_EXTERNAL: |
1283 | DRM_INFO("Connector Table: %d (powerbook external tmds)\n", | 1291 | DRM_INFO("Connector Table: %d (powerbook external tmds)\n", |
@@ -1290,7 +1298,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1290 | 0), | 1298 | 0), |
1291 | ATOM_DEVICE_LCD1_SUPPORT); | 1299 | ATOM_DEVICE_LCD1_SUPPORT); |
1292 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, | 1300 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1293 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); | 1301 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1302 | CONNECTOR_OBJECT_ID_LVDS); | ||
1294 | /* DVI-I - primary dac, ext tmds */ | 1303 | /* DVI-I - primary dac, ext tmds */ |
1295 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1304 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1296 | radeon_add_legacy_encoder(dev, | 1305 | radeon_add_legacy_encoder(dev, |
@@ -1303,10 +1312,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1303 | ATOM_DEVICE_CRT1_SUPPORT, | 1312 | ATOM_DEVICE_CRT1_SUPPORT, |
1304 | 1), | 1313 | 1), |
1305 | ATOM_DEVICE_CRT1_SUPPORT); | 1314 | ATOM_DEVICE_CRT1_SUPPORT); |
1315 | /* XXX some are SL */ | ||
1306 | radeon_add_legacy_connector(dev, 1, | 1316 | radeon_add_legacy_connector(dev, 1, |
1307 | ATOM_DEVICE_DFP2_SUPPORT | | 1317 | ATOM_DEVICE_DFP2_SUPPORT | |
1308 | ATOM_DEVICE_CRT1_SUPPORT, | 1318 | ATOM_DEVICE_CRT1_SUPPORT, |
1309 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c); | 1319 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1320 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I); | ||
1310 | /* TV - TV DAC */ | 1321 | /* TV - TV DAC */ |
1311 | radeon_add_legacy_encoder(dev, | 1322 | radeon_add_legacy_encoder(dev, |
1312 | radeon_get_encoder_id(dev, | 1323 | radeon_get_encoder_id(dev, |
@@ -1315,7 +1326,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1315 | ATOM_DEVICE_TV1_SUPPORT); | 1326 | ATOM_DEVICE_TV1_SUPPORT); |
1316 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1327 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1317 | DRM_MODE_CONNECTOR_SVIDEO, | 1328 | DRM_MODE_CONNECTOR_SVIDEO, |
1318 | &ddc_i2c); | 1329 | &ddc_i2c, |
1330 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1319 | break; | 1331 | break; |
1320 | case CT_POWERBOOK_INTERNAL: | 1332 | case CT_POWERBOOK_INTERNAL: |
1321 | DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", | 1333 | DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", |
@@ -1328,7 +1340,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1328 | 0), | 1340 | 0), |
1329 | ATOM_DEVICE_LCD1_SUPPORT); | 1341 | ATOM_DEVICE_LCD1_SUPPORT); |
1330 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, | 1342 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1331 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); | 1343 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1344 | CONNECTOR_OBJECT_ID_LVDS); | ||
1332 | /* DVI-I - primary dac, int tmds */ | 1345 | /* DVI-I - primary dac, int tmds */ |
1333 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1346 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1334 | radeon_add_legacy_encoder(dev, | 1347 | radeon_add_legacy_encoder(dev, |
@@ -1344,7 +1357,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1344 | radeon_add_legacy_connector(dev, 1, | 1357 | radeon_add_legacy_connector(dev, 1, |
1345 | ATOM_DEVICE_DFP1_SUPPORT | | 1358 | ATOM_DEVICE_DFP1_SUPPORT | |
1346 | ATOM_DEVICE_CRT1_SUPPORT, | 1359 | ATOM_DEVICE_CRT1_SUPPORT, |
1347 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c); | 1360 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1361 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1348 | /* TV - TV DAC */ | 1362 | /* TV - TV DAC */ |
1349 | radeon_add_legacy_encoder(dev, | 1363 | radeon_add_legacy_encoder(dev, |
1350 | radeon_get_encoder_id(dev, | 1364 | radeon_get_encoder_id(dev, |
@@ -1353,7 +1367,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1353 | ATOM_DEVICE_TV1_SUPPORT); | 1367 | ATOM_DEVICE_TV1_SUPPORT); |
1354 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1368 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1355 | DRM_MODE_CONNECTOR_SVIDEO, | 1369 | DRM_MODE_CONNECTOR_SVIDEO, |
1356 | &ddc_i2c); | 1370 | &ddc_i2c, |
1371 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1357 | break; | 1372 | break; |
1358 | case CT_POWERBOOK_VGA: | 1373 | case CT_POWERBOOK_VGA: |
1359 | DRM_INFO("Connector Table: %d (powerbook vga)\n", | 1374 | DRM_INFO("Connector Table: %d (powerbook vga)\n", |
@@ -1366,7 +1381,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1366 | 0), | 1381 | 0), |
1367 | ATOM_DEVICE_LCD1_SUPPORT); | 1382 | ATOM_DEVICE_LCD1_SUPPORT); |
1368 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, | 1383 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, |
1369 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); | 1384 | DRM_MODE_CONNECTOR_LVDS, &ddc_i2c, |
1385 | CONNECTOR_OBJECT_ID_LVDS); | ||
1370 | /* VGA - primary dac */ | 1386 | /* VGA - primary dac */ |
1371 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | 1387 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); |
1372 | radeon_add_legacy_encoder(dev, | 1388 | radeon_add_legacy_encoder(dev, |
@@ -1375,7 +1391,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1375 | 1), | 1391 | 1), |
1376 | ATOM_DEVICE_CRT1_SUPPORT); | 1392 | ATOM_DEVICE_CRT1_SUPPORT); |
1377 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, | 1393 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, |
1378 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1394 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1395 | CONNECTOR_OBJECT_ID_VGA); | ||
1379 | /* TV - TV DAC */ | 1396 | /* TV - TV DAC */ |
1380 | radeon_add_legacy_encoder(dev, | 1397 | radeon_add_legacy_encoder(dev, |
1381 | radeon_get_encoder_id(dev, | 1398 | radeon_get_encoder_id(dev, |
@@ -1384,7 +1401,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1384 | ATOM_DEVICE_TV1_SUPPORT); | 1401 | ATOM_DEVICE_TV1_SUPPORT); |
1385 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1402 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1386 | DRM_MODE_CONNECTOR_SVIDEO, | 1403 | DRM_MODE_CONNECTOR_SVIDEO, |
1387 | &ddc_i2c); | 1404 | &ddc_i2c, |
1405 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1388 | break; | 1406 | break; |
1389 | case CT_MINI_EXTERNAL: | 1407 | case CT_MINI_EXTERNAL: |
1390 | DRM_INFO("Connector Table: %d (mini external tmds)\n", | 1408 | DRM_INFO("Connector Table: %d (mini external tmds)\n", |
@@ -1401,10 +1419,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1401 | ATOM_DEVICE_CRT2_SUPPORT, | 1419 | ATOM_DEVICE_CRT2_SUPPORT, |
1402 | 2), | 1420 | 2), |
1403 | ATOM_DEVICE_CRT2_SUPPORT); | 1421 | ATOM_DEVICE_CRT2_SUPPORT); |
1422 | /* XXX are any DL? */ | ||
1404 | radeon_add_legacy_connector(dev, 0, | 1423 | radeon_add_legacy_connector(dev, 0, |
1405 | ATOM_DEVICE_DFP2_SUPPORT | | 1424 | ATOM_DEVICE_DFP2_SUPPORT | |
1406 | ATOM_DEVICE_CRT2_SUPPORT, | 1425 | ATOM_DEVICE_CRT2_SUPPORT, |
1407 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c); | 1426 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1427 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1408 | /* TV - TV DAC */ | 1428 | /* TV - TV DAC */ |
1409 | radeon_add_legacy_encoder(dev, | 1429 | radeon_add_legacy_encoder(dev, |
1410 | radeon_get_encoder_id(dev, | 1430 | radeon_get_encoder_id(dev, |
@@ -1413,7 +1433,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1413 | ATOM_DEVICE_TV1_SUPPORT); | 1433 | ATOM_DEVICE_TV1_SUPPORT); |
1414 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, | 1434 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
1415 | DRM_MODE_CONNECTOR_SVIDEO, | 1435 | DRM_MODE_CONNECTOR_SVIDEO, |
1416 | &ddc_i2c); | 1436 | &ddc_i2c, |
1437 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1417 | break; | 1438 | break; |
1418 | case CT_MINI_INTERNAL: | 1439 | case CT_MINI_INTERNAL: |
1419 | DRM_INFO("Connector Table: %d (mini internal tmds)\n", | 1440 | DRM_INFO("Connector Table: %d (mini internal tmds)\n", |
@@ -1433,7 +1454,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1433 | radeon_add_legacy_connector(dev, 0, | 1454 | radeon_add_legacy_connector(dev, 0, |
1434 | ATOM_DEVICE_DFP1_SUPPORT | | 1455 | ATOM_DEVICE_DFP1_SUPPORT | |
1435 | ATOM_DEVICE_CRT2_SUPPORT, | 1456 | ATOM_DEVICE_CRT2_SUPPORT, |
1436 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c); | 1457 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, |
1458 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1437 | /* TV - TV DAC */ | 1459 | /* TV - TV DAC */ |
1438 | radeon_add_legacy_encoder(dev, | 1460 | radeon_add_legacy_encoder(dev, |
1439 | radeon_get_encoder_id(dev, | 1461 | radeon_get_encoder_id(dev, |
@@ -1442,7 +1464,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1442 | ATOM_DEVICE_TV1_SUPPORT); | 1464 | ATOM_DEVICE_TV1_SUPPORT); |
1443 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, | 1465 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, |
1444 | DRM_MODE_CONNECTOR_SVIDEO, | 1466 | DRM_MODE_CONNECTOR_SVIDEO, |
1445 | &ddc_i2c); | 1467 | &ddc_i2c, |
1468 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1446 | break; | 1469 | break; |
1447 | case CT_IMAC_G5_ISIGHT: | 1470 | case CT_IMAC_G5_ISIGHT: |
1448 | DRM_INFO("Connector Table: %d (imac g5 isight)\n", | 1471 | DRM_INFO("Connector Table: %d (imac g5 isight)\n", |
@@ -1455,7 +1478,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1455 | 0), | 1478 | 0), |
1456 | ATOM_DEVICE_DFP1_SUPPORT); | 1479 | ATOM_DEVICE_DFP1_SUPPORT); |
1457 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, | 1480 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, |
1458 | DRM_MODE_CONNECTOR_DVID, &ddc_i2c); | 1481 | DRM_MODE_CONNECTOR_DVID, &ddc_i2c, |
1482 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); | ||
1459 | /* VGA - tv dac */ | 1483 | /* VGA - tv dac */ |
1460 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); | 1484 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); |
1461 | radeon_add_legacy_encoder(dev, | 1485 | radeon_add_legacy_encoder(dev, |
@@ -1464,7 +1488,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1464 | 2), | 1488 | 2), |
1465 | ATOM_DEVICE_CRT2_SUPPORT); | 1489 | ATOM_DEVICE_CRT2_SUPPORT); |
1466 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, | 1490 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1467 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1491 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1492 | CONNECTOR_OBJECT_ID_VGA); | ||
1468 | /* TV - TV DAC */ | 1493 | /* TV - TV DAC */ |
1469 | radeon_add_legacy_encoder(dev, | 1494 | radeon_add_legacy_encoder(dev, |
1470 | radeon_get_encoder_id(dev, | 1495 | radeon_get_encoder_id(dev, |
@@ -1473,7 +1498,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1473 | ATOM_DEVICE_TV1_SUPPORT); | 1498 | ATOM_DEVICE_TV1_SUPPORT); |
1474 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1499 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1475 | DRM_MODE_CONNECTOR_SVIDEO, | 1500 | DRM_MODE_CONNECTOR_SVIDEO, |
1476 | &ddc_i2c); | 1501 | &ddc_i2c, |
1502 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1477 | break; | 1503 | break; |
1478 | case CT_EMAC: | 1504 | case CT_EMAC: |
1479 | DRM_INFO("Connector Table: %d (emac)\n", | 1505 | DRM_INFO("Connector Table: %d (emac)\n", |
@@ -1486,7 +1512,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1486 | 1), | 1512 | 1), |
1487 | ATOM_DEVICE_CRT1_SUPPORT); | 1513 | ATOM_DEVICE_CRT1_SUPPORT); |
1488 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, | 1514 | radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, |
1489 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1515 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1516 | CONNECTOR_OBJECT_ID_VGA); | ||
1490 | /* VGA - tv dac */ | 1517 | /* VGA - tv dac */ |
1491 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); | 1518 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); |
1492 | radeon_add_legacy_encoder(dev, | 1519 | radeon_add_legacy_encoder(dev, |
@@ -1495,7 +1522,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1495 | 2), | 1522 | 2), |
1496 | ATOM_DEVICE_CRT2_SUPPORT); | 1523 | ATOM_DEVICE_CRT2_SUPPORT); |
1497 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, | 1524 | radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, |
1498 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c); | 1525 | DRM_MODE_CONNECTOR_VGA, &ddc_i2c, |
1526 | CONNECTOR_OBJECT_ID_VGA); | ||
1499 | /* TV - TV DAC */ | 1527 | /* TV - TV DAC */ |
1500 | radeon_add_legacy_encoder(dev, | 1528 | radeon_add_legacy_encoder(dev, |
1501 | radeon_get_encoder_id(dev, | 1529 | radeon_get_encoder_id(dev, |
@@ -1504,7 +1532,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1504 | ATOM_DEVICE_TV1_SUPPORT); | 1532 | ATOM_DEVICE_TV1_SUPPORT); |
1505 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, | 1533 | radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, |
1506 | DRM_MODE_CONNECTOR_SVIDEO, | 1534 | DRM_MODE_CONNECTOR_SVIDEO, |
1507 | &ddc_i2c); | 1535 | &ddc_i2c, |
1536 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1508 | break; | 1537 | break; |
1509 | default: | 1538 | default: |
1510 | DRM_INFO("Connector table: %d (invalid)\n", | 1539 | DRM_INFO("Connector table: %d (invalid)\n", |
@@ -1581,11 +1610,63 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev, | |||
1581 | return true; | 1610 | return true; |
1582 | } | 1611 | } |
1583 | 1612 | ||
1613 | static bool radeon_apply_legacy_tv_quirks(struct drm_device *dev) | ||
1614 | { | ||
1615 | /* Acer 5102 has non-existent TV port */ | ||
1616 | if (dev->pdev->device == 0x5975 && | ||
1617 | dev->pdev->subsystem_vendor == 0x1025 && | ||
1618 | dev->pdev->subsystem_device == 0x009f) | ||
1619 | return false; | ||
1620 | |||
1621 | /* HP dc5750 has non-existent TV port */ | ||
1622 | if (dev->pdev->device == 0x5974 && | ||
1623 | dev->pdev->subsystem_vendor == 0x103c && | ||
1624 | dev->pdev->subsystem_device == 0x280a) | ||
1625 | return false; | ||
1626 | |||
1627 | return true; | ||
1628 | } | ||
1629 | |||
1630 | static uint16_t combios_check_dl_dvi(struct drm_device *dev, int is_dvi_d) | ||
1631 | { | ||
1632 | struct radeon_device *rdev = dev->dev_private; | ||
1633 | uint32_t ext_tmds_info; | ||
1634 | |||
1635 | if (rdev->flags & RADEON_IS_IGP) { | ||
1636 | if (is_dvi_d) | ||
1637 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D; | ||
1638 | else | ||
1639 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
1640 | } | ||
1641 | ext_tmds_info = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE); | ||
1642 | if (ext_tmds_info) { | ||
1643 | uint8_t rev = RBIOS8(ext_tmds_info); | ||
1644 | uint8_t flags = RBIOS8(ext_tmds_info + 4 + 5); | ||
1645 | if (rev >= 3) { | ||
1646 | if (is_dvi_d) | ||
1647 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D; | ||
1648 | else | ||
1649 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I; | ||
1650 | } else { | ||
1651 | if (flags & 1) { | ||
1652 | if (is_dvi_d) | ||
1653 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D; | ||
1654 | else | ||
1655 | return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I; | ||
1656 | } | ||
1657 | } | ||
1658 | } | ||
1659 | if (is_dvi_d) | ||
1660 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D; | ||
1661 | else | ||
1662 | return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
1663 | } | ||
1664 | |||
1584 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | 1665 | bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) |
1585 | { | 1666 | { |
1586 | struct radeon_device *rdev = dev->dev_private; | 1667 | struct radeon_device *rdev = dev->dev_private; |
1587 | uint32_t conn_info, entry, devices; | 1668 | uint32_t conn_info, entry, devices; |
1588 | uint16_t tmp; | 1669 | uint16_t tmp, connector_object_id; |
1589 | enum radeon_combios_ddc ddc_type; | 1670 | enum radeon_combios_ddc ddc_type; |
1590 | enum radeon_combios_connector connector; | 1671 | enum radeon_combios_connector connector; |
1591 | int i = 0; | 1672 | int i = 0; |
@@ -1628,8 +1709,9 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1628 | break; | 1709 | break; |
1629 | } | 1710 | } |
1630 | 1711 | ||
1631 | radeon_apply_legacy_quirks(dev, i, &connector, | 1712 | if (!radeon_apply_legacy_quirks(dev, i, &connector, |
1632 | &ddc_i2c); | 1713 | &ddc_i2c)) |
1714 | continue; | ||
1633 | 1715 | ||
1634 | switch (connector) { | 1716 | switch (connector) { |
1635 | case CONNECTOR_PROPRIETARY_LEGACY: | 1717 | case CONNECTOR_PROPRIETARY_LEGACY: |
@@ -1644,7 +1726,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1644 | radeon_add_legacy_connector(dev, i, devices, | 1726 | radeon_add_legacy_connector(dev, i, devices, |
1645 | legacy_connector_convert | 1727 | legacy_connector_convert |
1646 | [connector], | 1728 | [connector], |
1647 | &ddc_i2c); | 1729 | &ddc_i2c, |
1730 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D); | ||
1648 | break; | 1731 | break; |
1649 | case CONNECTOR_CRT_LEGACY: | 1732 | case CONNECTOR_CRT_LEGACY: |
1650 | if (tmp & 0x1) { | 1733 | if (tmp & 0x1) { |
@@ -1669,7 +1752,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1669 | devices, | 1752 | devices, |
1670 | legacy_connector_convert | 1753 | legacy_connector_convert |
1671 | [connector], | 1754 | [connector], |
1672 | &ddc_i2c); | 1755 | &ddc_i2c, |
1756 | CONNECTOR_OBJECT_ID_VGA); | ||
1673 | break; | 1757 | break; |
1674 | case CONNECTOR_DVI_I_LEGACY: | 1758 | case CONNECTOR_DVI_I_LEGACY: |
1675 | devices = 0; | 1759 | devices = 0; |
@@ -1698,6 +1782,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1698 | ATOM_DEVICE_DFP2_SUPPORT, | 1782 | ATOM_DEVICE_DFP2_SUPPORT, |
1699 | 0), | 1783 | 0), |
1700 | ATOM_DEVICE_DFP2_SUPPORT); | 1784 | ATOM_DEVICE_DFP2_SUPPORT); |
1785 | connector_object_id = combios_check_dl_dvi(dev, 0); | ||
1701 | } else { | 1786 | } else { |
1702 | devices |= ATOM_DEVICE_DFP1_SUPPORT; | 1787 | devices |= ATOM_DEVICE_DFP1_SUPPORT; |
1703 | radeon_add_legacy_encoder(dev, | 1788 | radeon_add_legacy_encoder(dev, |
@@ -1706,19 +1791,24 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1706 | ATOM_DEVICE_DFP1_SUPPORT, | 1791 | ATOM_DEVICE_DFP1_SUPPORT, |
1707 | 0), | 1792 | 0), |
1708 | ATOM_DEVICE_DFP1_SUPPORT); | 1793 | ATOM_DEVICE_DFP1_SUPPORT); |
1794 | connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
1709 | } | 1795 | } |
1710 | radeon_add_legacy_connector(dev, | 1796 | radeon_add_legacy_connector(dev, |
1711 | i, | 1797 | i, |
1712 | devices, | 1798 | devices, |
1713 | legacy_connector_convert | 1799 | legacy_connector_convert |
1714 | [connector], | 1800 | [connector], |
1715 | &ddc_i2c); | 1801 | &ddc_i2c, |
1802 | connector_object_id); | ||
1716 | break; | 1803 | break; |
1717 | case CONNECTOR_DVI_D_LEGACY: | 1804 | case CONNECTOR_DVI_D_LEGACY: |
1718 | if ((tmp >> 4) & 0x1) | 1805 | if ((tmp >> 4) & 0x1) { |
1719 | devices = ATOM_DEVICE_DFP2_SUPPORT; | 1806 | devices = ATOM_DEVICE_DFP2_SUPPORT; |
1720 | else | 1807 | connector_object_id = combios_check_dl_dvi(dev, 1); |
1808 | } else { | ||
1721 | devices = ATOM_DEVICE_DFP1_SUPPORT; | 1809 | devices = ATOM_DEVICE_DFP1_SUPPORT; |
1810 | connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | ||
1811 | } | ||
1722 | radeon_add_legacy_encoder(dev, | 1812 | radeon_add_legacy_encoder(dev, |
1723 | radeon_get_encoder_id | 1813 | radeon_get_encoder_id |
1724 | (dev, devices, 0), | 1814 | (dev, devices, 0), |
@@ -1726,7 +1816,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1726 | radeon_add_legacy_connector(dev, i, devices, | 1816 | radeon_add_legacy_connector(dev, i, devices, |
1727 | legacy_connector_convert | 1817 | legacy_connector_convert |
1728 | [connector], | 1818 | [connector], |
1729 | &ddc_i2c); | 1819 | &ddc_i2c, |
1820 | connector_object_id); | ||
1730 | break; | 1821 | break; |
1731 | case CONNECTOR_CTV_LEGACY: | 1822 | case CONNECTOR_CTV_LEGACY: |
1732 | case CONNECTOR_STV_LEGACY: | 1823 | case CONNECTOR_STV_LEGACY: |
@@ -1740,7 +1831,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1740 | ATOM_DEVICE_TV1_SUPPORT, | 1831 | ATOM_DEVICE_TV1_SUPPORT, |
1741 | legacy_connector_convert | 1832 | legacy_connector_convert |
1742 | [connector], | 1833 | [connector], |
1743 | &ddc_i2c); | 1834 | &ddc_i2c, |
1835 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
1744 | break; | 1836 | break; |
1745 | default: | 1837 | default: |
1746 | DRM_ERROR("Unknown connector type: %d\n", | 1838 | DRM_ERROR("Unknown connector type: %d\n", |
@@ -1772,10 +1864,29 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1772 | ATOM_DEVICE_CRT1_SUPPORT | | 1864 | ATOM_DEVICE_CRT1_SUPPORT | |
1773 | ATOM_DEVICE_DFP1_SUPPORT, | 1865 | ATOM_DEVICE_DFP1_SUPPORT, |
1774 | DRM_MODE_CONNECTOR_DVII, | 1866 | DRM_MODE_CONNECTOR_DVII, |
1775 | &ddc_i2c); | 1867 | &ddc_i2c, |
1868 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I); | ||
1776 | } else { | 1869 | } else { |
1777 | DRM_DEBUG("No connector info found\n"); | 1870 | uint16_t crt_info = |
1778 | return false; | 1871 | combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE); |
1872 | DRM_DEBUG("Found CRT table, assuming VGA connector\n"); | ||
1873 | if (crt_info) { | ||
1874 | radeon_add_legacy_encoder(dev, | ||
1875 | radeon_get_encoder_id(dev, | ||
1876 | ATOM_DEVICE_CRT1_SUPPORT, | ||
1877 | 1), | ||
1878 | ATOM_DEVICE_CRT1_SUPPORT); | ||
1879 | ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); | ||
1880 | radeon_add_legacy_connector(dev, | ||
1881 | 0, | ||
1882 | ATOM_DEVICE_CRT1_SUPPORT, | ||
1883 | DRM_MODE_CONNECTOR_VGA, | ||
1884 | &ddc_i2c, | ||
1885 | CONNECTOR_OBJECT_ID_VGA); | ||
1886 | } else { | ||
1887 | DRM_DEBUG("No connector info found\n"); | ||
1888 | return false; | ||
1889 | } | ||
1779 | } | 1890 | } |
1780 | } | 1891 | } |
1781 | 1892 | ||
@@ -1870,7 +1981,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1870 | 5, | 1981 | 5, |
1871 | ATOM_DEVICE_LCD1_SUPPORT, | 1982 | ATOM_DEVICE_LCD1_SUPPORT, |
1872 | DRM_MODE_CONNECTOR_LVDS, | 1983 | DRM_MODE_CONNECTOR_LVDS, |
1873 | &ddc_i2c); | 1984 | &ddc_i2c, |
1985 | CONNECTOR_OBJECT_ID_LVDS); | ||
1874 | } | 1986 | } |
1875 | } | 1987 | } |
1876 | 1988 | ||
@@ -1880,16 +1992,19 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
1880 | combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); | 1992 | combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); |
1881 | if (tv_info) { | 1993 | if (tv_info) { |
1882 | if (RBIOS8(tv_info + 6) == 'T') { | 1994 | if (RBIOS8(tv_info + 6) == 'T') { |
1883 | radeon_add_legacy_encoder(dev, | 1995 | if (radeon_apply_legacy_tv_quirks(dev)) { |
1884 | radeon_get_encoder_id | 1996 | radeon_add_legacy_encoder(dev, |
1885 | (dev, | 1997 | radeon_get_encoder_id |
1886 | ATOM_DEVICE_TV1_SUPPORT, | 1998 | (dev, |
1887 | 2), | 1999 | ATOM_DEVICE_TV1_SUPPORT, |
1888 | ATOM_DEVICE_TV1_SUPPORT); | 2000 | 2), |
1889 | radeon_add_legacy_connector(dev, 6, | 2001 | ATOM_DEVICE_TV1_SUPPORT); |
1890 | ATOM_DEVICE_TV1_SUPPORT, | 2002 | radeon_add_legacy_connector(dev, 6, |
1891 | DRM_MODE_CONNECTOR_SVIDEO, | 2003 | ATOM_DEVICE_TV1_SUPPORT, |
1892 | &ddc_i2c); | 2004 | DRM_MODE_CONNECTOR_SVIDEO, |
2005 | &ddc_i2c, | ||
2006 | CONNECTOR_OBJECT_ID_SVIDEO); | ||
2007 | } | ||
1893 | } | 2008 | } |
1894 | } | 2009 | } |
1895 | } | 2010 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index e376be47a4a0..fce4c4087fda 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -178,25 +178,12 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode | |||
178 | struct drm_device *dev = encoder->dev; | 178 | struct drm_device *dev = encoder->dev; |
179 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 179 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
180 | struct drm_display_mode *mode = NULL; | 180 | struct drm_display_mode *mode = NULL; |
181 | struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; | 181 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
182 | |||
183 | if (native_mode->panel_xres != 0 && | ||
184 | native_mode->panel_yres != 0 && | ||
185 | native_mode->dotclock != 0) { | ||
186 | mode = drm_mode_create(dev); | ||
187 | |||
188 | mode->hdisplay = native_mode->panel_xres; | ||
189 | mode->vdisplay = native_mode->panel_yres; | ||
190 | |||
191 | mode->htotal = mode->hdisplay + native_mode->hblank; | ||
192 | mode->hsync_start = mode->hdisplay + native_mode->hoverplus; | ||
193 | mode->hsync_end = mode->hsync_start + native_mode->hsync_width; | ||
194 | mode->vtotal = mode->vdisplay + native_mode->vblank; | ||
195 | mode->vsync_start = mode->vdisplay + native_mode->voverplus; | ||
196 | mode->vsync_end = mode->vsync_start + native_mode->vsync_width; | ||
197 | mode->clock = native_mode->dotclock; | ||
198 | mode->flags = 0; | ||
199 | 182 | ||
183 | if (native_mode->hdisplay != 0 && | ||
184 | native_mode->vdisplay != 0 && | ||
185 | native_mode->clock != 0) { | ||
186 | mode = drm_mode_duplicate(dev, native_mode); | ||
200 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; | 187 | mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; |
201 | drm_mode_set_name(mode); | 188 | drm_mode_set_name(mode); |
202 | 189 | ||
@@ -210,7 +197,7 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn | |||
210 | struct drm_device *dev = encoder->dev; | 197 | struct drm_device *dev = encoder->dev; |
211 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 198 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
212 | struct drm_display_mode *mode = NULL; | 199 | struct drm_display_mode *mode = NULL; |
213 | struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; | 200 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
214 | int i; | 201 | int i; |
215 | struct mode_size { | 202 | struct mode_size { |
216 | int w; | 203 | int w; |
@@ -236,11 +223,16 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn | |||
236 | }; | 223 | }; |
237 | 224 | ||
238 | for (i = 0; i < 17; i++) { | 225 | for (i = 0; i < 17; i++) { |
226 | if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) { | ||
227 | if (common_modes[i].w > 1024 || | ||
228 | common_modes[i].h > 768) | ||
229 | continue; | ||
230 | } | ||
239 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 231 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
240 | if (common_modes[i].w > native_mode->panel_xres || | 232 | if (common_modes[i].w > native_mode->hdisplay || |
241 | common_modes[i].h > native_mode->panel_yres || | 233 | common_modes[i].h > native_mode->vdisplay || |
242 | (common_modes[i].w == native_mode->panel_xres && | 234 | (common_modes[i].w == native_mode->hdisplay && |
243 | common_modes[i].h == native_mode->panel_yres)) | 235 | common_modes[i].h == native_mode->vdisplay)) |
244 | continue; | 236 | continue; |
245 | } | 237 | } |
246 | if (common_modes[i].w < 320 || common_modes[i].h < 200) | 238 | if (common_modes[i].w < 320 || common_modes[i].h < 200) |
@@ -344,28 +336,23 @@ static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder, | |||
344 | struct drm_connector *connector) | 336 | struct drm_connector *connector) |
345 | { | 337 | { |
346 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 338 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
347 | struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; | 339 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
348 | 340 | ||
349 | /* Try to get native mode details from EDID if necessary */ | 341 | /* Try to get native mode details from EDID if necessary */ |
350 | if (!native_mode->dotclock) { | 342 | if (!native_mode->clock) { |
351 | struct drm_display_mode *t, *mode; | 343 | struct drm_display_mode *t, *mode; |
352 | 344 | ||
353 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { | 345 | list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { |
354 | if (mode->hdisplay == native_mode->panel_xres && | 346 | if (mode->hdisplay == native_mode->hdisplay && |
355 | mode->vdisplay == native_mode->panel_yres) { | 347 | mode->vdisplay == native_mode->vdisplay) { |
356 | native_mode->hblank = mode->htotal - mode->hdisplay; | 348 | *native_mode = *mode; |
357 | native_mode->hoverplus = mode->hsync_start - mode->hdisplay; | 349 | drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V); |
358 | native_mode->hsync_width = mode->hsync_end - mode->hsync_start; | ||
359 | native_mode->vblank = mode->vtotal - mode->vdisplay; | ||
360 | native_mode->voverplus = mode->vsync_start - mode->vdisplay; | ||
361 | native_mode->vsync_width = mode->vsync_end - mode->vsync_start; | ||
362 | native_mode->dotclock = mode->clock; | ||
363 | DRM_INFO("Determined LVDS native mode details from EDID\n"); | 350 | DRM_INFO("Determined LVDS native mode details from EDID\n"); |
364 | break; | 351 | break; |
365 | } | 352 | } |
366 | } | 353 | } |
367 | } | 354 | } |
368 | if (!native_mode->dotclock) { | 355 | if (!native_mode->clock) { |
369 | DRM_INFO("No LVDS native mode details, disabling RMX\n"); | 356 | DRM_INFO("No LVDS native mode details, disabling RMX\n"); |
370 | radeon_encoder->rmx_type = RMX_OFF; | 357 | radeon_encoder->rmx_type = RMX_OFF; |
371 | } | 358 | } |
@@ -410,13 +397,64 @@ static int radeon_lvds_get_modes(struct drm_connector *connector) | |||
410 | static int radeon_lvds_mode_valid(struct drm_connector *connector, | 397 | static int radeon_lvds_mode_valid(struct drm_connector *connector, |
411 | struct drm_display_mode *mode) | 398 | struct drm_display_mode *mode) |
412 | { | 399 | { |
400 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
401 | |||
402 | if ((mode->hdisplay < 320) || (mode->vdisplay < 240)) | ||
403 | return MODE_PANEL; | ||
404 | |||
405 | if (encoder) { | ||
406 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
407 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | ||
408 | |||
409 | /* AVIVO hardware supports downscaling modes larger than the panel | ||
410 | * to the panel size, but I'm not sure this is desirable. | ||
411 | */ | ||
412 | if ((mode->hdisplay > native_mode->hdisplay) || | ||
413 | (mode->vdisplay > native_mode->vdisplay)) | ||
414 | return MODE_PANEL; | ||
415 | |||
416 | /* if scaling is disabled, block non-native modes */ | ||
417 | if (radeon_encoder->rmx_type == RMX_OFF) { | ||
418 | if ((mode->hdisplay != native_mode->hdisplay) || | ||
419 | (mode->vdisplay != native_mode->vdisplay)) | ||
420 | return MODE_PANEL; | ||
421 | } | ||
422 | } | ||
423 | |||
413 | return MODE_OK; | 424 | return MODE_OK; |
414 | } | 425 | } |
415 | 426 | ||
416 | static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector) | 427 | static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector) |
417 | { | 428 | { |
418 | enum drm_connector_status ret = connector_status_connected; | 429 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
430 | struct drm_encoder *encoder = radeon_best_single_encoder(connector); | ||
431 | enum drm_connector_status ret = connector_status_disconnected; | ||
432 | |||
433 | if (encoder) { | ||
434 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | ||
435 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; | ||
436 | |||
437 | /* check if panel is valid */ | ||
438 | if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240) | ||
439 | ret = connector_status_connected; | ||
440 | |||
441 | } | ||
442 | |||
443 | /* check for edid as well */ | ||
444 | if (radeon_connector->edid) | ||
445 | ret = connector_status_connected; | ||
446 | else { | ||
447 | if (radeon_connector->ddc_bus) { | ||
448 | radeon_i2c_do_lock(radeon_connector, 1); | ||
449 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, | ||
450 | &radeon_connector->ddc_bus->adapter); | ||
451 | radeon_i2c_do_lock(radeon_connector, 0); | ||
452 | if (radeon_connector->edid) | ||
453 | ret = connector_status_connected; | ||
454 | } | ||
455 | } | ||
419 | /* check acpi lid status ??? */ | 456 | /* check acpi lid status ??? */ |
457 | |||
420 | radeon_connector_update_scratch_regs(connector, ret); | 458 | radeon_connector_update_scratch_regs(connector, ret); |
421 | return ret; | 459 | return ret; |
422 | } | 460 | } |
@@ -427,6 +465,8 @@ static void radeon_connector_destroy(struct drm_connector *connector) | |||
427 | 465 | ||
428 | if (radeon_connector->ddc_bus) | 466 | if (radeon_connector->ddc_bus) |
429 | radeon_i2c_destroy(radeon_connector->ddc_bus); | 467 | radeon_i2c_destroy(radeon_connector->ddc_bus); |
468 | if (radeon_connector->edid) | ||
469 | kfree(radeon_connector->edid); | ||
430 | kfree(radeon_connector->con_priv); | 470 | kfree(radeon_connector->con_priv); |
431 | drm_sysfs_connector_remove(connector); | 471 | drm_sysfs_connector_remove(connector); |
432 | drm_connector_cleanup(connector); | 472 | drm_connector_cleanup(connector); |
@@ -496,6 +536,8 @@ static int radeon_vga_get_modes(struct drm_connector *connector) | |||
496 | static int radeon_vga_mode_valid(struct drm_connector *connector, | 536 | static int radeon_vga_mode_valid(struct drm_connector *connector, |
497 | struct drm_display_mode *mode) | 537 | struct drm_display_mode *mode) |
498 | { | 538 | { |
539 | /* XXX check mode bandwidth */ | ||
540 | /* XXX verify against max DAC output frequency */ | ||
499 | return MODE_OK; | 541 | return MODE_OK; |
500 | } | 542 | } |
501 | 543 | ||
@@ -514,9 +556,32 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect | |||
514 | radeon_i2c_do_lock(radeon_connector, 1); | 556 | radeon_i2c_do_lock(radeon_connector, 1); |
515 | dret = radeon_ddc_probe(radeon_connector); | 557 | dret = radeon_ddc_probe(radeon_connector); |
516 | radeon_i2c_do_lock(radeon_connector, 0); | 558 | radeon_i2c_do_lock(radeon_connector, 0); |
517 | if (dret) | 559 | if (dret) { |
518 | ret = connector_status_connected; | 560 | if (radeon_connector->edid) { |
519 | else { | 561 | kfree(radeon_connector->edid); |
562 | radeon_connector->edid = NULL; | ||
563 | } | ||
564 | radeon_i2c_do_lock(radeon_connector, 1); | ||
565 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); | ||
566 | radeon_i2c_do_lock(radeon_connector, 0); | ||
567 | |||
568 | if (!radeon_connector->edid) { | ||
569 | DRM_ERROR("DDC responded but not EDID found for %s\n", | ||
570 | drm_get_connector_name(connector)); | ||
571 | } else { | ||
572 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | ||
573 | |||
574 | /* some oems have boards with separate digital and analog connectors | ||
575 | * with a shared ddc line (often vga + hdmi) | ||
576 | */ | ||
577 | if (radeon_connector->use_digital && radeon_connector->shared_ddc) { | ||
578 | kfree(radeon_connector->edid); | ||
579 | radeon_connector->edid = NULL; | ||
580 | ret = connector_status_disconnected; | ||
581 | } else | ||
582 | ret = connector_status_connected; | ||
583 | } | ||
584 | } else { | ||
520 | if (radeon_connector->dac_load_detect) { | 585 | if (radeon_connector->dac_load_detect) { |
521 | encoder_funcs = encoder->helper_private; | 586 | encoder_funcs = encoder->helper_private; |
522 | ret = encoder_funcs->detect(encoder, connector); | 587 | ret = encoder_funcs->detect(encoder, connector); |
@@ -570,6 +635,8 @@ static int radeon_tv_get_modes(struct drm_connector *connector) | |||
570 | static int radeon_tv_mode_valid(struct drm_connector *connector, | 635 | static int radeon_tv_mode_valid(struct drm_connector *connector, |
571 | struct drm_display_mode *mode) | 636 | struct drm_display_mode *mode) |
572 | { | 637 | { |
638 | if ((mode->hdisplay > 1024) || (mode->vdisplay > 768)) | ||
639 | return MODE_CLOCK_RANGE; | ||
573 | return MODE_OK; | 640 | return MODE_OK; |
574 | } | 641 | } |
575 | 642 | ||
@@ -644,6 +711,10 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect | |||
644 | dret = radeon_ddc_probe(radeon_connector); | 711 | dret = radeon_ddc_probe(radeon_connector); |
645 | radeon_i2c_do_lock(radeon_connector, 0); | 712 | radeon_i2c_do_lock(radeon_connector, 0); |
646 | if (dret) { | 713 | if (dret) { |
714 | if (radeon_connector->edid) { | ||
715 | kfree(radeon_connector->edid); | ||
716 | radeon_connector->edid = NULL; | ||
717 | } | ||
647 | radeon_i2c_do_lock(radeon_connector, 1); | 718 | radeon_i2c_do_lock(radeon_connector, 1); |
648 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); | 719 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
649 | radeon_i2c_do_lock(radeon_connector, 0); | 720 | radeon_i2c_do_lock(radeon_connector, 0); |
@@ -654,10 +725,15 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect | |||
654 | } else { | 725 | } else { |
655 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); | 726 | radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); |
656 | 727 | ||
657 | /* if this isn't a digital monitor | 728 | /* some oems have boards with separate digital and analog connectors |
658 | then we need to make sure we don't have any | 729 | * with a shared ddc line (often vga + hdmi) |
659 | TV conflicts */ | 730 | */ |
660 | ret = connector_status_connected; | 731 | if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) { |
732 | kfree(radeon_connector->edid); | ||
733 | radeon_connector->edid = NULL; | ||
734 | ret = connector_status_disconnected; | ||
735 | } else | ||
736 | ret = connector_status_connected; | ||
661 | } | 737 | } |
662 | } | 738 | } |
663 | 739 | ||
@@ -753,9 +829,27 @@ static void radeon_dvi_force(struct drm_connector *connector) | |||
753 | radeon_connector->use_digital = true; | 829 | radeon_connector->use_digital = true; |
754 | } | 830 | } |
755 | 831 | ||
832 | static int radeon_dvi_mode_valid(struct drm_connector *connector, | ||
833 | struct drm_display_mode *mode) | ||
834 | { | ||
835 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | ||
836 | |||
837 | /* XXX check mode bandwidth */ | ||
838 | |||
839 | if (radeon_connector->use_digital && (mode->clock > 165000)) { | ||
840 | if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) || | ||
841 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) || | ||
842 | (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B)) | ||
843 | return MODE_OK; | ||
844 | else | ||
845 | return MODE_CLOCK_HIGH; | ||
846 | } | ||
847 | return MODE_OK; | ||
848 | } | ||
849 | |||
756 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { | 850 | struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { |
757 | .get_modes = radeon_dvi_get_modes, | 851 | .get_modes = radeon_dvi_get_modes, |
758 | .mode_valid = radeon_vga_mode_valid, | 852 | .mode_valid = radeon_dvi_mode_valid, |
759 | .best_encoder = radeon_dvi_encoder, | 853 | .best_encoder = radeon_dvi_encoder, |
760 | }; | 854 | }; |
761 | 855 | ||
@@ -775,13 +869,15 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
775 | int connector_type, | 869 | int connector_type, |
776 | struct radeon_i2c_bus_rec *i2c_bus, | 870 | struct radeon_i2c_bus_rec *i2c_bus, |
777 | bool linkb, | 871 | bool linkb, |
778 | uint32_t igp_lane_info) | 872 | uint32_t igp_lane_info, |
873 | uint16_t connector_object_id) | ||
779 | { | 874 | { |
780 | struct radeon_device *rdev = dev->dev_private; | 875 | struct radeon_device *rdev = dev->dev_private; |
781 | struct drm_connector *connector; | 876 | struct drm_connector *connector; |
782 | struct radeon_connector *radeon_connector; | 877 | struct radeon_connector *radeon_connector; |
783 | struct radeon_connector_atom_dig *radeon_dig_connector; | 878 | struct radeon_connector_atom_dig *radeon_dig_connector; |
784 | uint32_t subpixel_order = SubPixelNone; | 879 | uint32_t subpixel_order = SubPixelNone; |
880 | bool shared_ddc = false; | ||
785 | int ret; | 881 | int ret; |
786 | 882 | ||
787 | /* fixme - tv/cv/din */ | 883 | /* fixme - tv/cv/din */ |
@@ -795,6 +891,13 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
795 | radeon_connector->devices |= supported_device; | 891 | radeon_connector->devices |= supported_device; |
796 | return; | 892 | return; |
797 | } | 893 | } |
894 | if (radeon_connector->ddc_bus && i2c_bus->valid) { | ||
895 | if (memcmp(&radeon_connector->ddc_bus->rec, i2c_bus, | ||
896 | sizeof(struct radeon_i2c_bus_rec)) == 0) { | ||
897 | radeon_connector->shared_ddc = true; | ||
898 | shared_ddc = true; | ||
899 | } | ||
900 | } | ||
798 | } | 901 | } |
799 | 902 | ||
800 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); | 903 | radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); |
@@ -805,6 +908,8 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
805 | 908 | ||
806 | radeon_connector->connector_id = connector_id; | 909 | radeon_connector->connector_id = connector_id; |
807 | radeon_connector->devices = supported_device; | 910 | radeon_connector->devices = supported_device; |
911 | radeon_connector->shared_ddc = shared_ddc; | ||
912 | radeon_connector->connector_object_id = connector_object_id; | ||
808 | switch (connector_type) { | 913 | switch (connector_type) { |
809 | case DRM_MODE_CONNECTOR_VGA: | 914 | case DRM_MODE_CONNECTOR_VGA: |
810 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | 915 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); |
@@ -956,7 +1061,8 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
956 | uint32_t connector_id, | 1061 | uint32_t connector_id, |
957 | uint32_t supported_device, | 1062 | uint32_t supported_device, |
958 | int connector_type, | 1063 | int connector_type, |
959 | struct radeon_i2c_bus_rec *i2c_bus) | 1064 | struct radeon_i2c_bus_rec *i2c_bus, |
1065 | uint16_t connector_object_id) | ||
960 | { | 1066 | { |
961 | struct radeon_device *rdev = dev->dev_private; | 1067 | struct radeon_device *rdev = dev->dev_private; |
962 | struct drm_connector *connector; | 1068 | struct drm_connector *connector; |
@@ -985,6 +1091,7 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
985 | 1091 | ||
986 | radeon_connector->connector_id = connector_id; | 1092 | radeon_connector->connector_id = connector_id; |
987 | radeon_connector->devices = supported_device; | 1093 | radeon_connector->devices = supported_device; |
1094 | radeon_connector->connector_object_id = connector_object_id; | ||
988 | switch (connector_type) { | 1095 | switch (connector_type) { |
989 | case DRM_MODE_CONNECTOR_VGA: | 1096 | case DRM_MODE_CONNECTOR_VGA: |
990 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); | 1097 | drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); |
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c index b13c79e38bc0..28772a37009c 100644 --- a/drivers/gpu/drm/radeon/radeon_cursor.c +++ b/drivers/gpu/drm/radeon/radeon_cursor.c | |||
@@ -109,9 +109,15 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj, | |||
109 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 109 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
110 | struct radeon_device *rdev = crtc->dev->dev_private; | 110 | struct radeon_device *rdev = crtc->dev->dev_private; |
111 | 111 | ||
112 | if (ASIC_IS_AVIVO(rdev)) | 112 | if (ASIC_IS_AVIVO(rdev)) { |
113 | if (rdev->family >= CHIP_RV770) { | ||
114 | if (radeon_crtc->crtc_id) | ||
115 | WREG32(R700_D2CUR_SURFACE_ADDRESS_HIGH, 0); | ||
116 | else | ||
117 | WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0); | ||
118 | } | ||
113 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); | 119 | WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); |
114 | else { | 120 | } else { |
115 | radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; | 121 | radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; |
116 | /* offset is from DISP(2)_BASE_ADDRESS */ | 122 | /* offset is from DISP(2)_BASE_ADDRESS */ |
117 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); | 123 | WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 3d667031de6e..e3f9edfa40fe 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -444,20 +444,24 @@ static uint32_t cail_reg_read(struct card_info *info, uint32_t reg) | |||
444 | return r; | 444 | return r; |
445 | } | 445 | } |
446 | 446 | ||
447 | static struct card_info atom_card_info = { | ||
448 | .dev = NULL, | ||
449 | .reg_read = cail_reg_read, | ||
450 | .reg_write = cail_reg_write, | ||
451 | .mc_read = cail_mc_read, | ||
452 | .mc_write = cail_mc_write, | ||
453 | .pll_read = cail_pll_read, | ||
454 | .pll_write = cail_pll_write, | ||
455 | }; | ||
456 | |||
457 | int radeon_atombios_init(struct radeon_device *rdev) | 447 | int radeon_atombios_init(struct radeon_device *rdev) |
458 | { | 448 | { |
459 | atom_card_info.dev = rdev->ddev; | 449 | struct card_info *atom_card_info = |
460 | rdev->mode_info.atom_context = atom_parse(&atom_card_info, rdev->bios); | 450 | kzalloc(sizeof(struct card_info), GFP_KERNEL); |
451 | |||
452 | if (!atom_card_info) | ||
453 | return -ENOMEM; | ||
454 | |||
455 | rdev->mode_info.atom_card_info = atom_card_info; | ||
456 | atom_card_info->dev = rdev->ddev; | ||
457 | atom_card_info->reg_read = cail_reg_read; | ||
458 | atom_card_info->reg_write = cail_reg_write; | ||
459 | atom_card_info->mc_read = cail_mc_read; | ||
460 | atom_card_info->mc_write = cail_mc_write; | ||
461 | atom_card_info->pll_read = cail_pll_read; | ||
462 | atom_card_info->pll_write = cail_pll_write; | ||
463 | |||
464 | rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios); | ||
461 | radeon_atom_initialize_bios_scratch_regs(rdev->ddev); | 465 | radeon_atom_initialize_bios_scratch_regs(rdev->ddev); |
462 | return 0; | 466 | return 0; |
463 | } | 467 | } |
@@ -465,6 +469,7 @@ int radeon_atombios_init(struct radeon_device *rdev) | |||
465 | void radeon_atombios_fini(struct radeon_device *rdev) | 469 | void radeon_atombios_fini(struct radeon_device *rdev) |
466 | { | 470 | { |
467 | kfree(rdev->mode_info.atom_context); | 471 | kfree(rdev->mode_info.atom_context); |
472 | kfree(rdev->mode_info.atom_card_info); | ||
468 | } | 473 | } |
469 | 474 | ||
470 | int radeon_combios_init(struct radeon_device *rdev) | 475 | int radeon_combios_init(struct radeon_device *rdev) |
@@ -582,10 +587,9 @@ int radeon_device_init(struct radeon_device *rdev, | |||
582 | DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); | 587 | DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); |
583 | 588 | ||
584 | /* if we have > 1 VGA cards, then disable the radeon VGA resources */ | 589 | /* if we have > 1 VGA cards, then disable the radeon VGA resources */ |
585 | r = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); | 590 | /* this will fail for cards that aren't VGA class devices, just |
586 | if (r) { | 591 | * ignore it */ |
587 | return -EINVAL; | 592 | vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); |
588 | } | ||
589 | 593 | ||
590 | r = radeon_init(rdev); | 594 | r = radeon_init(rdev); |
591 | if (r) | 595 | if (r) |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 3655d91993a6..c85df4afcb7a 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -137,9 +137,6 @@ static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, | |||
137 | if (size != 256) { | 137 | if (size != 256) { |
138 | return; | 138 | return; |
139 | } | 139 | } |
140 | if (crtc->fb == NULL) { | ||
141 | return; | ||
142 | } | ||
143 | 140 | ||
144 | /* userspace palettes are always correct as is */ | 141 | /* userspace palettes are always correct as is */ |
145 | for (i = 0; i < 256; i++) { | 142 | for (i = 0; i < 256; i++) { |
@@ -147,7 +144,6 @@ static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, | |||
147 | radeon_crtc->lut_g[i] = green[i] >> 6; | 144 | radeon_crtc->lut_g[i] = green[i] >> 6; |
148 | radeon_crtc->lut_b[i] = blue[i] >> 6; | 145 | radeon_crtc->lut_b[i] = blue[i] >> 6; |
149 | } | 146 | } |
150 | |||
151 | radeon_crtc_load_lut(crtc); | 147 | radeon_crtc_load_lut(crtc); |
152 | } | 148 | } |
153 | 149 | ||
@@ -338,27 +334,19 @@ static bool radeon_setup_enc_conn(struct drm_device *dev) | |||
338 | 334 | ||
339 | int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) | 335 | int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) |
340 | { | 336 | { |
341 | struct edid *edid; | ||
342 | int ret = 0; | 337 | int ret = 0; |
343 | 338 | ||
344 | if (!radeon_connector->ddc_bus) | 339 | if (!radeon_connector->ddc_bus) |
345 | return -1; | 340 | return -1; |
346 | if (!radeon_connector->edid) { | 341 | if (!radeon_connector->edid) { |
347 | radeon_i2c_do_lock(radeon_connector, 1); | 342 | radeon_i2c_do_lock(radeon_connector, 1); |
348 | edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); | 343 | radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); |
349 | radeon_i2c_do_lock(radeon_connector, 0); | 344 | radeon_i2c_do_lock(radeon_connector, 0); |
350 | } else | 345 | } |
351 | edid = radeon_connector->edid; | ||
352 | 346 | ||
353 | if (edid) { | 347 | if (radeon_connector->edid) { |
354 | /* update digital bits here */ | 348 | drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid); |
355 | if (edid->input & DRM_EDID_INPUT_DIGITAL) | 349 | ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid); |
356 | radeon_connector->use_digital = 1; | ||
357 | else | ||
358 | radeon_connector->use_digital = 0; | ||
359 | drm_mode_connector_update_edid_property(&radeon_connector->base, edid); | ||
360 | ret = drm_add_edid_modes(&radeon_connector->base, edid); | ||
361 | kfree(edid); | ||
362 | return ret; | 350 | return ret; |
363 | } | 351 | } |
364 | drm_mode_connector_update_edid_property(&radeon_connector->base, NULL); | 352 | drm_mode_connector_update_edid_property(&radeon_connector->base, NULL); |
@@ -765,7 +753,7 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, | |||
765 | radeon_crtc->rmx_type = radeon_encoder->rmx_type; | 753 | radeon_crtc->rmx_type = radeon_encoder->rmx_type; |
766 | memcpy(&radeon_crtc->native_mode, | 754 | memcpy(&radeon_crtc->native_mode, |
767 | &radeon_encoder->native_mode, | 755 | &radeon_encoder->native_mode, |
768 | sizeof(struct radeon_native_mode)); | 756 | sizeof(struct drm_display_mode)); |
769 | first = false; | 757 | first = false; |
770 | } else { | 758 | } else { |
771 | if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) { | 759 | if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) { |
@@ -783,10 +771,10 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, | |||
783 | if (radeon_crtc->rmx_type != RMX_OFF) { | 771 | if (radeon_crtc->rmx_type != RMX_OFF) { |
784 | fixed20_12 a, b; | 772 | fixed20_12 a, b; |
785 | a.full = rfixed_const(crtc->mode.vdisplay); | 773 | a.full = rfixed_const(crtc->mode.vdisplay); |
786 | b.full = rfixed_const(radeon_crtc->native_mode.panel_xres); | 774 | b.full = rfixed_const(radeon_crtc->native_mode.hdisplay); |
787 | radeon_crtc->vsc.full = rfixed_div(a, b); | 775 | radeon_crtc->vsc.full = rfixed_div(a, b); |
788 | a.full = rfixed_const(crtc->mode.hdisplay); | 776 | a.full = rfixed_const(crtc->mode.hdisplay); |
789 | b.full = rfixed_const(radeon_crtc->native_mode.panel_yres); | 777 | b.full = rfixed_const(radeon_crtc->native_mode.vdisplay); |
790 | radeon_crtc->hsc.full = rfixed_div(a, b); | 778 | radeon_crtc->hsc.full = rfixed_div(a, b); |
791 | } else { | 779 | } else { |
792 | radeon_crtc->vsc.full = rfixed_const(1); | 780 | radeon_crtc->vsc.full = rfixed_const(1); |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index a65ab1a0dad2..d42bc512d75a 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -31,6 +31,10 @@ | |||
31 | 31 | ||
32 | extern int atom_debug; | 32 | extern int atom_debug; |
33 | 33 | ||
34 | /* evil but including atombios.h is much worse */ | ||
35 | bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, | ||
36 | struct drm_display_mode *mode); | ||
37 | |||
34 | uint32_t | 38 | uint32_t |
35 | radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac) | 39 | radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac) |
36 | { | 40 | { |
@@ -167,49 +171,17 @@ void radeon_rmx_mode_fixup(struct drm_encoder *encoder, | |||
167 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 171 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
168 | struct drm_device *dev = encoder->dev; | 172 | struct drm_device *dev = encoder->dev; |
169 | struct radeon_device *rdev = dev->dev_private; | 173 | struct radeon_device *rdev = dev->dev_private; |
170 | struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; | 174 | struct drm_display_mode *native_mode = &radeon_encoder->native_mode; |
171 | 175 | ||
172 | if (mode->hdisplay < native_mode->panel_xres || | 176 | if (mode->hdisplay < native_mode->hdisplay || |
173 | mode->vdisplay < native_mode->panel_yres) { | 177 | mode->vdisplay < native_mode->vdisplay) { |
174 | if (ASIC_IS_AVIVO(rdev)) { | 178 | int mode_id = adjusted_mode->base.id; |
175 | adjusted_mode->hdisplay = native_mode->panel_xres; | 179 | *adjusted_mode = *native_mode; |
176 | adjusted_mode->vdisplay = native_mode->panel_yres; | 180 | if (!ASIC_IS_AVIVO(rdev)) { |
177 | adjusted_mode->htotal = native_mode->panel_xres + native_mode->hblank; | 181 | adjusted_mode->hdisplay = mode->hdisplay; |
178 | adjusted_mode->hsync_start = native_mode->panel_xres + native_mode->hoverplus; | 182 | adjusted_mode->vdisplay = mode->vdisplay; |
179 | adjusted_mode->hsync_end = adjusted_mode->hsync_start + native_mode->hsync_width; | ||
180 | adjusted_mode->vtotal = native_mode->panel_yres + native_mode->vblank; | ||
181 | adjusted_mode->vsync_start = native_mode->panel_yres + native_mode->voverplus; | ||
182 | adjusted_mode->vsync_end = adjusted_mode->vsync_start + native_mode->vsync_width; | ||
183 | /* update crtc values */ | ||
184 | drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); | ||
185 | /* adjust crtc values */ | ||
186 | adjusted_mode->crtc_hdisplay = native_mode->panel_xres; | ||
187 | adjusted_mode->crtc_vdisplay = native_mode->panel_yres; | ||
188 | adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + native_mode->hblank; | ||
189 | adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + native_mode->hoverplus; | ||
190 | adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + native_mode->hsync_width; | ||
191 | adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + native_mode->vblank; | ||
192 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + native_mode->voverplus; | ||
193 | adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + native_mode->vsync_width; | ||
194 | } else { | ||
195 | adjusted_mode->htotal = native_mode->panel_xres + native_mode->hblank; | ||
196 | adjusted_mode->hsync_start = native_mode->panel_xres + native_mode->hoverplus; | ||
197 | adjusted_mode->hsync_end = adjusted_mode->hsync_start + native_mode->hsync_width; | ||
198 | adjusted_mode->vtotal = native_mode->panel_yres + native_mode->vblank; | ||
199 | adjusted_mode->vsync_start = native_mode->panel_yres + native_mode->voverplus; | ||
200 | adjusted_mode->vsync_end = adjusted_mode->vsync_start + native_mode->vsync_width; | ||
201 | /* update crtc values */ | ||
202 | drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); | ||
203 | /* adjust crtc values */ | ||
204 | adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + native_mode->hblank; | ||
205 | adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + native_mode->hoverplus; | ||
206 | adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + native_mode->hsync_width; | ||
207 | adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + native_mode->vblank; | ||
208 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + native_mode->voverplus; | ||
209 | adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + native_mode->vsync_width; | ||
210 | } | 183 | } |
211 | adjusted_mode->flags = native_mode->flags; | 184 | adjusted_mode->base.id = mode_id; |
212 | adjusted_mode->clock = native_mode->dotclock; | ||
213 | } | 185 | } |
214 | } | 186 | } |
215 | 187 | ||
@@ -219,7 +191,11 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, | |||
219 | struct drm_display_mode *adjusted_mode) | 191 | struct drm_display_mode *adjusted_mode) |
220 | { | 192 | { |
221 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 193 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
194 | struct drm_device *dev = encoder->dev; | ||
195 | struct radeon_device *rdev = dev->dev_private; | ||
222 | 196 | ||
197 | /* set the active encoder to connector routing */ | ||
198 | radeon_encoder_set_active_device(encoder); | ||
223 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 199 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
224 | 200 | ||
225 | if (radeon_encoder->rmx_type != RMX_OFF) | 201 | if (radeon_encoder->rmx_type != RMX_OFF) |
@@ -230,6 +206,18 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder, | |||
230 | && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2))) | 206 | && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2))) |
231 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2; | 207 | adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2; |
232 | 208 | ||
209 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) { | ||
210 | struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv; | ||
211 | if (tv_dac) { | ||
212 | if (tv_dac->tv_std == TV_STD_NTSC || | ||
213 | tv_dac->tv_std == TV_STD_NTSC_J || | ||
214 | tv_dac->tv_std == TV_STD_PAL_M) | ||
215 | radeon_atom_get_tv_timings(rdev, 0, adjusted_mode); | ||
216 | else | ||
217 | radeon_atom_get_tv_timings(rdev, 1, adjusted_mode); | ||
218 | } | ||
219 | } | ||
220 | |||
233 | return true; | 221 | return true; |
234 | } | 222 | } |
235 | 223 | ||
@@ -461,7 +449,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
461 | case 1: | 449 | case 1: |
462 | args.v1.ucMisc = 0; | 450 | args.v1.ucMisc = 0; |
463 | args.v1.ucAction = action; | 451 | args.v1.ucAction = action; |
464 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 452 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
465 | args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; | 453 | args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; |
466 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | 454 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
467 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 455 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
@@ -486,7 +474,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
486 | if (dig->coherent_mode) | 474 | if (dig->coherent_mode) |
487 | args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; | 475 | args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; |
488 | } | 476 | } |
489 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 477 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
490 | args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; | 478 | args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; |
491 | args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | 479 | args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
492 | args.v2.ucTruncate = 0; | 480 | args.v2.ucTruncate = 0; |
@@ -544,7 +532,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
544 | switch (connector->connector_type) { | 532 | switch (connector->connector_type) { |
545 | case DRM_MODE_CONNECTOR_DVII: | 533 | case DRM_MODE_CONNECTOR_DVII: |
546 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ | 534 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ |
547 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 535 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
548 | return ATOM_ENCODER_MODE_HDMI; | 536 | return ATOM_ENCODER_MODE_HDMI; |
549 | else if (radeon_connector->use_digital) | 537 | else if (radeon_connector->use_digital) |
550 | return ATOM_ENCODER_MODE_DVI; | 538 | return ATOM_ENCODER_MODE_DVI; |
@@ -554,7 +542,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
554 | case DRM_MODE_CONNECTOR_DVID: | 542 | case DRM_MODE_CONNECTOR_DVID: |
555 | case DRM_MODE_CONNECTOR_HDMIA: | 543 | case DRM_MODE_CONNECTOR_HDMIA: |
556 | default: | 544 | default: |
557 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 545 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
558 | return ATOM_ENCODER_MODE_HDMI; | 546 | return ATOM_ENCODER_MODE_HDMI; |
559 | else | 547 | else |
560 | return ATOM_ENCODER_MODE_DVI; | 548 | return ATOM_ENCODER_MODE_DVI; |
@@ -566,7 +554,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
566 | /*if (radeon_output->MonType == MT_DP) | 554 | /*if (radeon_output->MonType == MT_DP) |
567 | return ATOM_ENCODER_MODE_DP; | 555 | return ATOM_ENCODER_MODE_DP; |
568 | else*/ | 556 | else*/ |
569 | if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) | 557 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) |
570 | return ATOM_ENCODER_MODE_HDMI; | 558 | return ATOM_ENCODER_MODE_HDMI; |
571 | else | 559 | else |
572 | return ATOM_ENCODER_MODE_DVI; | 560 | return ATOM_ENCODER_MODE_DVI; |
@@ -734,14 +722,17 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action) | |||
734 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); | 722 | atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); |
735 | 723 | ||
736 | args.v1.ucAction = action; | 724 | args.v1.ucAction = action; |
737 | 725 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { | |
726 | args.v1.usInitInfo = radeon_connector->connector_object_id; | ||
727 | } else { | ||
728 | if (radeon_encoder->pixel_clock > 165000) | ||
729 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); | ||
730 | else | ||
731 | args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | ||
732 | } | ||
738 | if (ASIC_IS_DCE32(rdev)) { | 733 | if (ASIC_IS_DCE32(rdev)) { |
739 | if (radeon_encoder->pixel_clock > 165000) { | 734 | if (radeon_encoder->pixel_clock > 165000) |
740 | args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock * 10 * 2) / 100); | 735 | args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
741 | args.v2.acConfig.fDualLinkConnector = 1; | ||
742 | } else { | ||
743 | args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock * 10 * 4) / 100); | ||
744 | } | ||
745 | if (dig->dig_block) | 736 | if (dig->dig_block) |
746 | args.v2.acConfig.ucEncoderSel = 1; | 737 | args.v2.acConfig.ucEncoderSel = 1; |
747 | 738 | ||
@@ -766,7 +757,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action) | |||
766 | } | 757 | } |
767 | } else { | 758 | } else { |
768 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; | 759 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; |
769 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock) / 10); | ||
770 | 760 | ||
771 | switch (radeon_encoder->encoder_id) { | 761 | switch (radeon_encoder->encoder_id) { |
772 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 762 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
@@ -874,16 +864,9 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
874 | DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args; | 864 | DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args; |
875 | int index = 0; | 865 | int index = 0; |
876 | bool is_dig = false; | 866 | bool is_dig = false; |
877 | int devices; | ||
878 | 867 | ||
879 | memset(&args, 0, sizeof(args)); | 868 | memset(&args, 0, sizeof(args)); |
880 | 869 | ||
881 | /* on DPMS off we have no idea if active device is meaningful */ | ||
882 | if (mode != DRM_MODE_DPMS_ON && !radeon_encoder->active_device) | ||
883 | devices = radeon_encoder->devices; | ||
884 | else | ||
885 | devices = radeon_encoder->active_device; | ||
886 | |||
887 | DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", | 870 | DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", |
888 | radeon_encoder->encoder_id, mode, radeon_encoder->devices, | 871 | radeon_encoder->encoder_id, mode, radeon_encoder->devices, |
889 | radeon_encoder->active_device); | 872 | radeon_encoder->active_device); |
@@ -914,18 +897,18 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
914 | break; | 897 | break; |
915 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: | 898 | case ENCODER_OBJECT_ID_INTERNAL_DAC1: |
916 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: | 899 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: |
917 | if (devices & (ATOM_DEVICE_TV_SUPPORT)) | 900 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) |
918 | index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); | 901 | index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); |
919 | else if (devices & (ATOM_DEVICE_CV_SUPPORT)) | 902 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
920 | index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); | 903 | index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); |
921 | else | 904 | else |
922 | index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl); | 905 | index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl); |
923 | break; | 906 | break; |
924 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: | 907 | case ENCODER_OBJECT_ID_INTERNAL_DAC2: |
925 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: | 908 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: |
926 | if (devices & (ATOM_DEVICE_TV_SUPPORT)) | 909 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) |
927 | index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); | 910 | index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); |
928 | else if (devices & (ATOM_DEVICE_CV_SUPPORT)) | 911 | else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT)) |
929 | index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); | 912 | index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); |
930 | else | 913 | else |
931 | index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl); | 914 | index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl); |
@@ -1104,8 +1087,11 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder, | |||
1104 | } | 1087 | } |
1105 | 1088 | ||
1106 | /* set scaler clears this on some chips */ | 1089 | /* set scaler clears this on some chips */ |
1107 | if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE)) | 1090 | if (!(radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))) { |
1108 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, AVIVO_D1MODE_INTERLEAVE_EN); | 1091 | if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE)) |
1092 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, | ||
1093 | AVIVO_D1MODE_INTERLEAVE_EN); | ||
1094 | } | ||
1109 | } | 1095 | } |
1110 | 1096 | ||
1111 | static void | 1097 | static void |
@@ -1153,6 +1139,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder, | |||
1153 | 1139 | ||
1154 | /* setup and enable the encoder and transmitter */ | 1140 | /* setup and enable the encoder and transmitter */ |
1155 | atombios_dig_encoder_setup(encoder, ATOM_ENABLE); | 1141 | atombios_dig_encoder_setup(encoder, ATOM_ENABLE); |
1142 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT); | ||
1156 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP); | 1143 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP); |
1157 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE); | 1144 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE); |
1158 | break; | 1145 | break; |
@@ -1268,8 +1255,6 @@ static void radeon_atom_encoder_prepare(struct drm_encoder *encoder) | |||
1268 | { | 1255 | { |
1269 | radeon_atom_output_lock(encoder, true); | 1256 | radeon_atom_output_lock(encoder, true); |
1270 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); | 1257 | radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); |
1271 | |||
1272 | radeon_encoder_set_active_device(encoder); | ||
1273 | } | 1258 | } |
1274 | 1259 | ||
1275 | static void radeon_atom_encoder_commit(struct drm_encoder *encoder) | 1260 | static void radeon_atom_encoder_commit(struct drm_encoder *encoder) |
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c index a931af065dd4..a68d7566178c 100644 --- a/drivers/gpu/drm/radeon/radeon_gart.c +++ b/drivers/gpu/drm/radeon/radeon_gart.c | |||
@@ -140,15 +140,15 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset, | |||
140 | WARN(1, "trying to unbind memory to unitialized GART !\n"); | 140 | WARN(1, "trying to unbind memory to unitialized GART !\n"); |
141 | return; | 141 | return; |
142 | } | 142 | } |
143 | t = offset / 4096; | 143 | t = offset / RADEON_GPU_PAGE_SIZE; |
144 | p = t / (PAGE_SIZE / 4096); | 144 | p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); |
145 | for (i = 0; i < pages; i++, p++) { | 145 | for (i = 0; i < pages; i++, p++) { |
146 | if (rdev->gart.pages[p]) { | 146 | if (rdev->gart.pages[p]) { |
147 | pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p], | 147 | pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p], |
148 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); | 148 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
149 | rdev->gart.pages[p] = NULL; | 149 | rdev->gart.pages[p] = NULL; |
150 | rdev->gart.pages_addr[p] = 0; | 150 | rdev->gart.pages_addr[p] = 0; |
151 | for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { | 151 | for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { |
152 | radeon_gart_set_page(rdev, t, 0); | 152 | radeon_gart_set_page(rdev, t, 0); |
153 | } | 153 | } |
154 | } | 154 | } |
@@ -169,8 +169,8 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, | |||
169 | DRM_ERROR("trying to bind memory to unitialized GART !\n"); | 169 | DRM_ERROR("trying to bind memory to unitialized GART !\n"); |
170 | return -EINVAL; | 170 | return -EINVAL; |
171 | } | 171 | } |
172 | t = offset / 4096; | 172 | t = offset / RADEON_GPU_PAGE_SIZE; |
173 | p = t / (PAGE_SIZE / 4096); | 173 | p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); |
174 | 174 | ||
175 | for (i = 0; i < pages; i++, p++) { | 175 | for (i = 0; i < pages; i++, p++) { |
176 | /* we need to support large memory configurations */ | 176 | /* we need to support large memory configurations */ |
@@ -185,9 +185,9 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset, | |||
185 | } | 185 | } |
186 | rdev->gart.pages[p] = pagelist[i]; | 186 | rdev->gart.pages[p] = pagelist[i]; |
187 | page_base = rdev->gart.pages_addr[p]; | 187 | page_base = rdev->gart.pages_addr[p]; |
188 | for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { | 188 | for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) { |
189 | radeon_gart_set_page(rdev, t, page_base); | 189 | radeon_gart_set_page(rdev, t, page_base); |
190 | page_base += 4096; | 190 | page_base += RADEON_GPU_PAGE_SIZE; |
191 | } | 191 | } |
192 | } | 192 | } |
193 | mb(); | 193 | mb(); |
@@ -200,14 +200,14 @@ int radeon_gart_init(struct radeon_device *rdev) | |||
200 | if (rdev->gart.pages) { | 200 | if (rdev->gart.pages) { |
201 | return 0; | 201 | return 0; |
202 | } | 202 | } |
203 | /* We need PAGE_SIZE >= 4096 */ | 203 | /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */ |
204 | if (PAGE_SIZE < 4096) { | 204 | if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) { |
205 | DRM_ERROR("Page size is smaller than GPU page size!\n"); | 205 | DRM_ERROR("Page size is smaller than GPU page size!\n"); |
206 | return -EINVAL; | 206 | return -EINVAL; |
207 | } | 207 | } |
208 | /* Compute table size */ | 208 | /* Compute table size */ |
209 | rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; | 209 | rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; |
210 | rdev->gart.num_gpu_pages = rdev->mc.gtt_size / 4096; | 210 | rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE; |
211 | DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n", | 211 | DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n", |
212 | rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); | 212 | rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); |
213 | /* Allocate pages table */ | 213 | /* Allocate pages table */ |
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c index 8e0a8759e428..a0fe6232dcb6 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c | |||
@@ -92,6 +92,13 @@ int radeon_irq_kms_init(struct radeon_device *rdev) | |||
92 | if (r) { | 92 | if (r) { |
93 | return r; | 93 | return r; |
94 | } | 94 | } |
95 | /* enable msi */ | ||
96 | rdev->msi_enabled = 0; | ||
97 | if (rdev->family >= CHIP_RV380) { | ||
98 | int ret = pci_enable_msi(rdev->pdev); | ||
99 | if (!ret) | ||
100 | rdev->msi_enabled = 1; | ||
101 | } | ||
95 | drm_irq_install(rdev->ddev); | 102 | drm_irq_install(rdev->ddev); |
96 | rdev->irq.installed = true; | 103 | rdev->irq.installed = true; |
97 | DRM_INFO("radeon: irq initialized.\n"); | 104 | DRM_INFO("radeon: irq initialized.\n"); |
@@ -103,5 +110,7 @@ void radeon_irq_kms_fini(struct radeon_device *rdev) | |||
103 | if (rdev->irq.installed) { | 110 | if (rdev->irq.installed) { |
104 | rdev->irq.installed = false; | 111 | rdev->irq.installed = false; |
105 | drm_irq_uninstall(rdev->ddev); | 112 | drm_irq_uninstall(rdev->ddev); |
113 | if (rdev->msi_enabled) | ||
114 | pci_disable_msi(rdev->pdev); | ||
106 | } | 115 | } |
107 | } | 116 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 36410f85d705..8d0b7aa87fa4 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -48,7 +48,7 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
48 | u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active; | 48 | u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active; |
49 | u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp; | 49 | u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp; |
50 | u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp; | 50 | u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp; |
51 | struct radeon_native_mode *native_mode = &radeon_crtc->native_mode; | 51 | struct drm_display_mode *native_mode = &radeon_crtc->native_mode; |
52 | 52 | ||
53 | fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) & | 53 | fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) & |
54 | (RADEON_VERT_STRETCH_RESERVED | | 54 | (RADEON_VERT_STRETCH_RESERVED | |
@@ -95,19 +95,19 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
95 | 95 | ||
96 | fp_horz_vert_active = 0; | 96 | fp_horz_vert_active = 0; |
97 | 97 | ||
98 | if (native_mode->panel_xres == 0 || | 98 | if (native_mode->hdisplay == 0 || |
99 | native_mode->panel_yres == 0) { | 99 | native_mode->vdisplay == 0) { |
100 | hscale = false; | 100 | hscale = false; |
101 | vscale = false; | 101 | vscale = false; |
102 | } else { | 102 | } else { |
103 | if (xres > native_mode->panel_xres) | 103 | if (xres > native_mode->hdisplay) |
104 | xres = native_mode->panel_xres; | 104 | xres = native_mode->hdisplay; |
105 | if (yres > native_mode->panel_yres) | 105 | if (yres > native_mode->vdisplay) |
106 | yres = native_mode->panel_yres; | 106 | yres = native_mode->vdisplay; |
107 | 107 | ||
108 | if (xres == native_mode->panel_xres) | 108 | if (xres == native_mode->hdisplay) |
109 | hscale = false; | 109 | hscale = false; |
110 | if (yres == native_mode->panel_yres) | 110 | if (yres == native_mode->vdisplay) |
111 | vscale = false; | 111 | vscale = false; |
112 | } | 112 | } |
113 | 113 | ||
@@ -119,11 +119,11 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
119 | else { | 119 | else { |
120 | inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0; | 120 | inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0; |
121 | scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX) | 121 | scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX) |
122 | / native_mode->panel_xres + 1; | 122 | / native_mode->hdisplay + 1; |
123 | fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) | | 123 | fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) | |
124 | RADEON_HORZ_STRETCH_BLEND | | 124 | RADEON_HORZ_STRETCH_BLEND | |
125 | RADEON_HORZ_STRETCH_ENABLE | | 125 | RADEON_HORZ_STRETCH_ENABLE | |
126 | ((native_mode->panel_xres/8-1) << 16)); | 126 | ((native_mode->hdisplay/8-1) << 16)); |
127 | } | 127 | } |
128 | 128 | ||
129 | if (!vscale) | 129 | if (!vscale) |
@@ -131,11 +131,11 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
131 | else { | 131 | else { |
132 | inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0; | 132 | inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0; |
133 | scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX) | 133 | scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX) |
134 | / native_mode->panel_yres + 1; | 134 | / native_mode->vdisplay + 1; |
135 | fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) | | 135 | fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) | |
136 | RADEON_VERT_STRETCH_ENABLE | | 136 | RADEON_VERT_STRETCH_ENABLE | |
137 | RADEON_VERT_STRETCH_BLEND | | 137 | RADEON_VERT_STRETCH_BLEND | |
138 | ((native_mode->panel_yres-1) << 12)); | 138 | ((native_mode->vdisplay-1) << 12)); |
139 | } | 139 | } |
140 | break; | 140 | break; |
141 | case RMX_CENTER: | 141 | case RMX_CENTER: |
@@ -175,8 +175,8 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc, | |||
175 | ? RADEON_CRTC_V_SYNC_POL | 175 | ? RADEON_CRTC_V_SYNC_POL |
176 | : 0))); | 176 | : 0))); |
177 | 177 | ||
178 | fp_horz_vert_active = (((native_mode->panel_yres) & 0xfff) | | 178 | fp_horz_vert_active = (((native_mode->vdisplay) & 0xfff) | |
179 | (((native_mode->panel_xres / 8) & 0x1ff) << 16)); | 179 | (((native_mode->hdisplay / 8) & 0x1ff) << 16)); |
180 | break; | 180 | break; |
181 | case RMX_OFF: | 181 | case RMX_OFF: |
182 | default: | 182 | default: |
@@ -532,6 +532,10 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
532 | radeon_fb = to_radeon_framebuffer(old_fb); | 532 | radeon_fb = to_radeon_framebuffer(old_fb); |
533 | radeon_gem_object_unpin(radeon_fb->obj); | 533 | radeon_gem_object_unpin(radeon_fb->obj); |
534 | } | 534 | } |
535 | |||
536 | /* Bytes per pixel may have changed */ | ||
537 | radeon_bandwidth_update(rdev); | ||
538 | |||
535 | return 0; | 539 | return 0; |
536 | } | 540 | } |
537 | 541 | ||
@@ -664,6 +668,9 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod | |||
664 | 668 | ||
665 | WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl); | 669 | WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl); |
666 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); | 670 | WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); |
671 | |||
672 | WREG32(RADEON_FP_H2_SYNC_STRT_WID, crtc_h_sync_strt_wid); | ||
673 | WREG32(RADEON_FP_V2_SYNC_STRT_WID, crtc_v_sync_strt_wid); | ||
667 | } else { | 674 | } else { |
668 | uint32_t crtc_gen_cntl; | 675 | uint32_t crtc_gen_cntl; |
669 | uint32_t crtc_ext_cntl; | 676 | uint32_t crtc_ext_cntl; |
@@ -1015,14 +1022,11 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc, | |||
1015 | int x, int y, struct drm_framebuffer *old_fb) | 1022 | int x, int y, struct drm_framebuffer *old_fb) |
1016 | { | 1023 | { |
1017 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 1024 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
1018 | struct drm_device *dev = crtc->dev; | ||
1019 | struct radeon_device *rdev = dev->dev_private; | ||
1020 | 1025 | ||
1021 | /* TODO TV */ | 1026 | /* TODO TV */ |
1022 | radeon_crtc_set_base(crtc, x, y, old_fb); | 1027 | radeon_crtc_set_base(crtc, x, y, old_fb); |
1023 | radeon_set_crtc_timing(crtc, adjusted_mode); | 1028 | radeon_set_crtc_timing(crtc, adjusted_mode); |
1024 | radeon_set_pll(crtc, adjusted_mode); | 1029 | radeon_set_pll(crtc, adjusted_mode); |
1025 | radeon_bandwidth_update(rdev); | ||
1026 | if (radeon_crtc->crtc_id == 0) { | 1030 | if (radeon_crtc->crtc_id == 0) { |
1027 | radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode); | 1031 | radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode); |
1028 | } else { | 1032 | } else { |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index 6ceb958fd194..00382122869b 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -107,8 +107,6 @@ static void radeon_legacy_lvds_prepare(struct drm_encoder *encoder) | |||
107 | else | 107 | else |
108 | radeon_combios_output_lock(encoder, true); | 108 | radeon_combios_output_lock(encoder, true); |
109 | radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF); | 109 | radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF); |
110 | |||
111 | radeon_encoder_set_active_device(encoder); | ||
112 | } | 110 | } |
113 | 111 | ||
114 | static void radeon_legacy_lvds_commit(struct drm_encoder *encoder) | 112 | static void radeon_legacy_lvds_commit(struct drm_encoder *encoder) |
@@ -192,6 +190,8 @@ static bool radeon_legacy_lvds_mode_fixup(struct drm_encoder *encoder, | |||
192 | { | 190 | { |
193 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 191 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
194 | 192 | ||
193 | /* set the active encoder to connector routing */ | ||
194 | radeon_encoder_set_active_device(encoder); | ||
195 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 195 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
196 | 196 | ||
197 | if (radeon_encoder->rmx_type != RMX_OFF) | 197 | if (radeon_encoder->rmx_type != RMX_OFF) |
@@ -218,7 +218,8 @@ static bool radeon_legacy_primary_dac_mode_fixup(struct drm_encoder *encoder, | |||
218 | struct drm_display_mode *mode, | 218 | struct drm_display_mode *mode, |
219 | struct drm_display_mode *adjusted_mode) | 219 | struct drm_display_mode *adjusted_mode) |
220 | { | 220 | { |
221 | 221 | /* set the active encoder to connector routing */ | |
222 | radeon_encoder_set_active_device(encoder); | ||
222 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 223 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
223 | 224 | ||
224 | return true; | 225 | return true; |
@@ -272,7 +273,6 @@ static void radeon_legacy_primary_dac_prepare(struct drm_encoder *encoder) | |||
272 | else | 273 | else |
273 | radeon_combios_output_lock(encoder, true); | 274 | radeon_combios_output_lock(encoder, true); |
274 | radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF); | 275 | radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF); |
275 | radeon_encoder_set_active_device(encoder); | ||
276 | } | 276 | } |
277 | 277 | ||
278 | static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder) | 278 | static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder) |
@@ -468,7 +468,6 @@ static void radeon_legacy_tmds_int_prepare(struct drm_encoder *encoder) | |||
468 | else | 468 | else |
469 | radeon_combios_output_lock(encoder, true); | 469 | radeon_combios_output_lock(encoder, true); |
470 | radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF); | 470 | radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF); |
471 | radeon_encoder_set_active_device(encoder); | ||
472 | } | 471 | } |
473 | 472 | ||
474 | static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder) | 473 | static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder) |
@@ -543,6 +542,14 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder, | |||
543 | 542 | ||
544 | fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN); | 543 | fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN); |
545 | 544 | ||
545 | fp_gen_cntl &= ~(RADEON_FP_RMX_HVSYNC_CONTROL_EN | | ||
546 | RADEON_FP_DFP_SYNC_SEL | | ||
547 | RADEON_FP_CRT_SYNC_SEL | | ||
548 | RADEON_FP_CRTC_LOCK_8DOT | | ||
549 | RADEON_FP_USE_SHADOW_EN | | ||
550 | RADEON_FP_CRTC_USE_SHADOW_VEND | | ||
551 | RADEON_FP_CRT_SYNC_ALT); | ||
552 | |||
546 | if (1) /* FIXME rgbBits == 8 */ | 553 | if (1) /* FIXME rgbBits == 8 */ |
547 | fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */ | 554 | fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */ |
548 | else | 555 | else |
@@ -556,7 +563,7 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder, | |||
556 | else | 563 | else |
557 | fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; | 564 | fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; |
558 | } else | 565 | } else |
559 | fp_gen_cntl |= RADEON_FP_SEL_CRTC1; | 566 | fp_gen_cntl &= ~RADEON_FP_SEL_CRTC2; |
560 | } else { | 567 | } else { |
561 | if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { | 568 | if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { |
562 | fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; | 569 | fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; |
@@ -593,7 +600,8 @@ static bool radeon_legacy_tmds_ext_mode_fixup(struct drm_encoder *encoder, | |||
593 | struct drm_display_mode *mode, | 600 | struct drm_display_mode *mode, |
594 | struct drm_display_mode *adjusted_mode) | 601 | struct drm_display_mode *adjusted_mode) |
595 | { | 602 | { |
596 | 603 | /* set the active encoder to connector routing */ | |
604 | radeon_encoder_set_active_device(encoder); | ||
597 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 605 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
598 | 606 | ||
599 | return true; | 607 | return true; |
@@ -636,7 +644,6 @@ static void radeon_legacy_tmds_ext_prepare(struct drm_encoder *encoder) | |||
636 | else | 644 | else |
637 | radeon_combios_output_lock(encoder, true); | 645 | radeon_combios_output_lock(encoder, true); |
638 | radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF); | 646 | radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF); |
639 | radeon_encoder_set_active_device(encoder); | ||
640 | } | 647 | } |
641 | 648 | ||
642 | static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder) | 649 | static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder) |
@@ -735,7 +742,8 @@ static bool radeon_legacy_tv_dac_mode_fixup(struct drm_encoder *encoder, | |||
735 | struct drm_display_mode *mode, | 742 | struct drm_display_mode *mode, |
736 | struct drm_display_mode *adjusted_mode) | 743 | struct drm_display_mode *adjusted_mode) |
737 | { | 744 | { |
738 | 745 | /* set the active encoder to connector routing */ | |
746 | radeon_encoder_set_active_device(encoder); | ||
739 | drm_mode_set_crtcinfo(adjusted_mode, 0); | 747 | drm_mode_set_crtcinfo(adjusted_mode, 0); |
740 | 748 | ||
741 | return true; | 749 | return true; |
@@ -839,7 +847,6 @@ static void radeon_legacy_tv_dac_prepare(struct drm_encoder *encoder) | |||
839 | else | 847 | else |
840 | radeon_combios_output_lock(encoder, true); | 848 | radeon_combios_output_lock(encoder, true); |
841 | radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF); | 849 | radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF); |
842 | radeon_encoder_set_active_device(encoder); | ||
843 | } | 850 | } |
844 | 851 | ||
845 | static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder) | 852 | static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder) |
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index e61226817ccf..ace726aa0d76 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -172,6 +172,7 @@ enum radeon_connector_table { | |||
172 | 172 | ||
173 | struct radeon_mode_info { | 173 | struct radeon_mode_info { |
174 | struct atom_context *atom_context; | 174 | struct atom_context *atom_context; |
175 | struct card_info *atom_card_info; | ||
175 | enum radeon_connector_table connector_table; | 176 | enum radeon_connector_table connector_table; |
176 | bool mode_config_initialized; | 177 | bool mode_config_initialized; |
177 | struct radeon_crtc *crtcs[2]; | 178 | struct radeon_crtc *crtcs[2]; |
@@ -186,17 +187,6 @@ struct radeon_mode_info { | |||
186 | 187 | ||
187 | }; | 188 | }; |
188 | 189 | ||
189 | struct radeon_native_mode { | ||
190 | /* preferred mode */ | ||
191 | uint32_t panel_xres, panel_yres; | ||
192 | uint32_t hoverplus, hsync_width; | ||
193 | uint32_t hblank; | ||
194 | uint32_t voverplus, vsync_width; | ||
195 | uint32_t vblank; | ||
196 | uint32_t dotclock; | ||
197 | uint32_t flags; | ||
198 | }; | ||
199 | |||
200 | #define MAX_H_CODE_TIMING_LEN 32 | 190 | #define MAX_H_CODE_TIMING_LEN 32 |
201 | #define MAX_V_CODE_TIMING_LEN 32 | 191 | #define MAX_V_CODE_TIMING_LEN 32 |
202 | 192 | ||
@@ -228,7 +218,7 @@ struct radeon_crtc { | |||
228 | enum radeon_rmx_type rmx_type; | 218 | enum radeon_rmx_type rmx_type; |
229 | fixed20_12 vsc; | 219 | fixed20_12 vsc; |
230 | fixed20_12 hsc; | 220 | fixed20_12 hsc; |
231 | struct radeon_native_mode native_mode; | 221 | struct drm_display_mode native_mode; |
232 | }; | 222 | }; |
233 | 223 | ||
234 | struct radeon_encoder_primary_dac { | 224 | struct radeon_encoder_primary_dac { |
@@ -248,7 +238,7 @@ struct radeon_encoder_lvds { | |||
248 | bool use_bios_dividers; | 238 | bool use_bios_dividers; |
249 | uint32_t lvds_gen_cntl; | 239 | uint32_t lvds_gen_cntl; |
250 | /* panel mode */ | 240 | /* panel mode */ |
251 | struct radeon_native_mode native_mode; | 241 | struct drm_display_mode native_mode; |
252 | }; | 242 | }; |
253 | 243 | ||
254 | struct radeon_encoder_tv_dac { | 244 | struct radeon_encoder_tv_dac { |
@@ -271,6 +261,16 @@ struct radeon_encoder_int_tmds { | |||
271 | struct radeon_tmds_pll tmds_pll[4]; | 261 | struct radeon_tmds_pll tmds_pll[4]; |
272 | }; | 262 | }; |
273 | 263 | ||
264 | /* spread spectrum */ | ||
265 | struct radeon_atom_ss { | ||
266 | uint16_t percentage; | ||
267 | uint8_t type; | ||
268 | uint8_t step; | ||
269 | uint8_t delay; | ||
270 | uint8_t range; | ||
271 | uint8_t refdiv; | ||
272 | }; | ||
273 | |||
274 | struct radeon_encoder_atom_dig { | 274 | struct radeon_encoder_atom_dig { |
275 | /* atom dig */ | 275 | /* atom dig */ |
276 | bool coherent_mode; | 276 | bool coherent_mode; |
@@ -278,8 +278,9 @@ struct radeon_encoder_atom_dig { | |||
278 | /* atom lvds */ | 278 | /* atom lvds */ |
279 | uint32_t lvds_misc; | 279 | uint32_t lvds_misc; |
280 | uint16_t panel_pwr_delay; | 280 | uint16_t panel_pwr_delay; |
281 | struct radeon_atom_ss *ss; | ||
281 | /* panel mode */ | 282 | /* panel mode */ |
282 | struct radeon_native_mode native_mode; | 283 | struct drm_display_mode native_mode; |
283 | }; | 284 | }; |
284 | 285 | ||
285 | struct radeon_encoder_atom_dac { | 286 | struct radeon_encoder_atom_dac { |
@@ -294,7 +295,7 @@ struct radeon_encoder { | |||
294 | uint32_t flags; | 295 | uint32_t flags; |
295 | uint32_t pixel_clock; | 296 | uint32_t pixel_clock; |
296 | enum radeon_rmx_type rmx_type; | 297 | enum radeon_rmx_type rmx_type; |
297 | struct radeon_native_mode native_mode; | 298 | struct drm_display_mode native_mode; |
298 | void *enc_priv; | 299 | void *enc_priv; |
299 | }; | 300 | }; |
300 | 301 | ||
@@ -308,12 +309,15 @@ struct radeon_connector { | |||
308 | uint32_t connector_id; | 309 | uint32_t connector_id; |
309 | uint32_t devices; | 310 | uint32_t devices; |
310 | struct radeon_i2c_chan *ddc_bus; | 311 | struct radeon_i2c_chan *ddc_bus; |
312 | /* some systems have a an hdmi and vga port with a shared ddc line */ | ||
313 | bool shared_ddc; | ||
311 | bool use_digital; | 314 | bool use_digital; |
312 | /* we need to mind the EDID between detect | 315 | /* we need to mind the EDID between detect |
313 | and get modes due to analog/digital/tvencoder */ | 316 | and get modes due to analog/digital/tvencoder */ |
314 | struct edid *edid; | 317 | struct edid *edid; |
315 | void *con_priv; | 318 | void *con_priv; |
316 | bool dac_load_detect; | 319 | bool dac_load_detect; |
320 | uint16_t connector_object_id; | ||
317 | }; | 321 | }; |
318 | 322 | ||
319 | struct radeon_framebuffer { | 323 | struct radeon_framebuffer { |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c new file mode 100644 index 000000000000..46146c6a2a06 --- /dev/null +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -0,0 +1,65 @@ | |||
1 | /* | ||
2 | * Permission is hereby granted, free of charge, to any person obtaining a | ||
3 | * copy of this software and associated documentation files (the "Software"), | ||
4 | * to deal in the Software without restriction, including without limitation | ||
5 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | ||
6 | * and/or sell copies of the Software, and to permit persons to whom the | ||
7 | * Software is furnished to do so, subject to the following conditions: | ||
8 | * | ||
9 | * The above copyright notice and this permission notice shall be included in | ||
10 | * all copies or substantial portions of the Software. | ||
11 | * | ||
12 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | ||
13 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | ||
15 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR | ||
16 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | ||
17 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR | ||
18 | * OTHER DEALINGS IN THE SOFTWARE. | ||
19 | * | ||
20 | * Authors: Rafał Miłecki <zajec5@gmail.com> | ||
21 | */ | ||
22 | #include "drmP.h" | ||
23 | #include "radeon.h" | ||
24 | |||
25 | int radeon_debugfs_pm_init(struct radeon_device *rdev); | ||
26 | |||
27 | int radeon_pm_init(struct radeon_device *rdev) | ||
28 | { | ||
29 | if (radeon_debugfs_pm_init(rdev)) { | ||
30 | DRM_ERROR("Failed to register debugfs file for CP !\n"); | ||
31 | } | ||
32 | |||
33 | return 0; | ||
34 | } | ||
35 | |||
36 | /* | ||
37 | * Debugfs info | ||
38 | */ | ||
39 | #if defined(CONFIG_DEBUG_FS) | ||
40 | |||
41 | static int radeon_debugfs_pm_info(struct seq_file *m, void *data) | ||
42 | { | ||
43 | struct drm_info_node *node = (struct drm_info_node *) m->private; | ||
44 | struct drm_device *dev = node->minor->dev; | ||
45 | struct radeon_device *rdev = dev->dev_private; | ||
46 | |||
47 | seq_printf(m, "engine clock: %u0 Hz\n", radeon_get_engine_clock(rdev)); | ||
48 | seq_printf(m, "memory clock: %u0 Hz\n", radeon_get_memory_clock(rdev)); | ||
49 | |||
50 | return 0; | ||
51 | } | ||
52 | |||
53 | static struct drm_info_list radeon_pm_info_list[] = { | ||
54 | {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL}, | ||
55 | }; | ||
56 | #endif | ||
57 | |||
58 | int radeon_debugfs_pm_init(struct radeon_device *rdev) | ||
59 | { | ||
60 | #if defined(CONFIG_DEBUG_FS) | ||
61 | return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list)); | ||
62 | #else | ||
63 | return 0; | ||
64 | #endif | ||
65 | } | ||
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h index bfa1ab9c93e1..29ab75903ec1 100644 --- a/drivers/gpu/drm/radeon/radeon_reg.h +++ b/drivers/gpu/drm/radeon/radeon_reg.h | |||
@@ -290,6 +290,8 @@ | |||
290 | #define RADEON_BUS_CNTL 0x0030 | 290 | #define RADEON_BUS_CNTL 0x0030 |
291 | # define RADEON_BUS_MASTER_DIS (1 << 6) | 291 | # define RADEON_BUS_MASTER_DIS (1 << 6) |
292 | # define RADEON_BUS_BIOS_DIS_ROM (1 << 12) | 292 | # define RADEON_BUS_BIOS_DIS_ROM (1 << 12) |
293 | # define RS600_BUS_MASTER_DIS (1 << 14) | ||
294 | # define RS600_MSI_REARM (1 << 20) /* rs600/rs690/rs740 */ | ||
293 | # define RADEON_BUS_RD_DISCARD_EN (1 << 24) | 295 | # define RADEON_BUS_RD_DISCARD_EN (1 << 24) |
294 | # define RADEON_BUS_RD_ABORT_EN (1 << 25) | 296 | # define RADEON_BUS_RD_ABORT_EN (1 << 25) |
295 | # define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) | 297 | # define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) |
@@ -297,6 +299,9 @@ | |||
297 | # define RADEON_BUS_READ_BURST (1 << 30) | 299 | # define RADEON_BUS_READ_BURST (1 << 30) |
298 | #define RADEON_BUS_CNTL1 0x0034 | 300 | #define RADEON_BUS_CNTL1 0x0034 |
299 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) | 301 | # define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) |
302 | /* rv370/rv380, rv410, r423/r430/r480, r5xx */ | ||
303 | #define RADEON_MSI_REARM_EN 0x0160 | ||
304 | # define RV370_MSI_REARM_EN (1 << 0) | ||
300 | 305 | ||
301 | /* #define RADEON_PCIE_INDEX 0x0030 */ | 306 | /* #define RADEON_PCIE_INDEX 0x0030 */ |
302 | /* #define RADEON_PCIE_DATA 0x0034 */ | 307 | /* #define RADEON_PCIE_DATA 0x0034 */ |
@@ -3311,6 +3316,7 @@ | |||
3311 | #define RADEON_AIC_CNTL 0x01d0 | 3316 | #define RADEON_AIC_CNTL 0x01d0 |
3312 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) | 3317 | # define RADEON_PCIGART_TRANSLATE_EN (1 << 0) |
3313 | # define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) | 3318 | # define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) |
3319 | # define RS400_MSI_REARM (1 << 3) /* rs400/rs480 */ | ||
3314 | #define RADEON_AIC_LO_ADDR 0x01dc | 3320 | #define RADEON_AIC_LO_ADDR 0x01dc |
3315 | #define RADEON_AIC_PT_BASE 0x01d8 | 3321 | #define RADEON_AIC_PT_BASE 0x01d8 |
3316 | #define RADEON_AIC_HI_ADDR 0x01e0 | 3322 | #define RADEON_AIC_HI_ADDR 0x01e0 |
diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c index 03c33cf4e14c..f8a465d9a1cf 100644 --- a/drivers/gpu/drm/radeon/radeon_test.c +++ b/drivers/gpu/drm/radeon/radeon_test.c | |||
@@ -42,7 +42,7 @@ void radeon_test_moves(struct radeon_device *rdev) | |||
42 | /* Number of tests = | 42 | /* Number of tests = |
43 | * (Total GTT - IB pool - writeback page - ring buffer) / test size | 43 | * (Total GTT - IB pool - writeback page - ring buffer) / test size |
44 | */ | 44 | */ |
45 | n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - 4096 - | 45 | n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE - |
46 | rdev->cp.ring_size) / size; | 46 | rdev->cp.ring_size) / size; |
47 | 47 | ||
48 | gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); | 48 | gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); |
@@ -102,7 +102,7 @@ void radeon_test_moves(struct radeon_device *rdev) | |||
102 | goto out_cleanup; | 102 | goto out_cleanup; |
103 | } | 103 | } |
104 | 104 | ||
105 | r = radeon_copy(rdev, gtt_addr, vram_addr, size / 4096, fence); | 105 | r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence); |
106 | if (r) { | 106 | if (r) { |
107 | DRM_ERROR("Failed GTT->VRAM copy %d\n", i); | 107 | DRM_ERROR("Failed GTT->VRAM copy %d\n", i); |
108 | goto out_cleanup; | 108 | goto out_cleanup; |
@@ -145,7 +145,7 @@ void radeon_test_moves(struct radeon_device *rdev) | |||
145 | goto out_cleanup; | 145 | goto out_cleanup; |
146 | } | 146 | } |
147 | 147 | ||
148 | r = radeon_copy(rdev, vram_addr, gtt_addr, size / 4096, fence); | 148 | r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence); |
149 | if (r) { | 149 | if (r) { |
150 | DRM_ERROR("Failed VRAM->GTT copy %d\n", i); | 150 | DRM_ERROR("Failed VRAM->GTT copy %d\n", i); |
151 | goto out_cleanup; | 151 | goto out_cleanup; |
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 765bd184b6fc..1381e06d6af3 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c | |||
@@ -295,6 +295,12 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo, | |||
295 | if (unlikely(r)) { | 295 | if (unlikely(r)) { |
296 | return r; | 296 | return r; |
297 | } | 297 | } |
298 | |||
299 | r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement); | ||
300 | if (unlikely(r)) { | ||
301 | goto out_cleanup; | ||
302 | } | ||
303 | |||
298 | r = ttm_tt_bind(bo->ttm, &tmp_mem); | 304 | r = ttm_tt_bind(bo->ttm, &tmp_mem); |
299 | if (unlikely(r)) { | 305 | if (unlikely(r)) { |
300 | goto out_cleanup; | 306 | goto out_cleanup; |
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index a769c296f6a6..ca037160a582 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c | |||
@@ -418,6 +418,8 @@ int rs400_resume(struct radeon_device *rdev) | |||
418 | rs400_gart_disable(rdev); | 418 | rs400_gart_disable(rdev); |
419 | /* Resume clock before doing reset */ | 419 | /* Resume clock before doing reset */ |
420 | r300_clock_startup(rdev); | 420 | r300_clock_startup(rdev); |
421 | /* setup MC before calling post tables */ | ||
422 | rs400_mc_program(rdev); | ||
421 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ | 423 | /* Reset gpu before posting otherwise ATOM will enter infinite loop */ |
422 | if (radeon_gpu_reset(rdev)) { | 424 | if (radeon_gpu_reset(rdev)) { |
423 | dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", | 425 | dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", |
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c index 10dfa78762da..5f117cd8736a 100644 --- a/drivers/gpu/drm/radeon/rs600.c +++ b/drivers/gpu/drm/radeon/rs600.c | |||
@@ -242,7 +242,7 @@ void rs600_irq_disable(struct radeon_device *rdev) | |||
242 | 242 | ||
243 | int rs600_irq_process(struct radeon_device *rdev) | 243 | int rs600_irq_process(struct radeon_device *rdev) |
244 | { | 244 | { |
245 | uint32_t status; | 245 | uint32_t status, msi_rearm; |
246 | uint32_t r500_disp_int; | 246 | uint32_t r500_disp_int; |
247 | 247 | ||
248 | status = rs600_irq_ack(rdev, &r500_disp_int); | 248 | status = rs600_irq_ack(rdev, &r500_disp_int); |
@@ -260,6 +260,22 @@ int rs600_irq_process(struct radeon_device *rdev) | |||
260 | drm_handle_vblank(rdev->ddev, 1); | 260 | drm_handle_vblank(rdev->ddev, 1); |
261 | status = rs600_irq_ack(rdev, &r500_disp_int); | 261 | status = rs600_irq_ack(rdev, &r500_disp_int); |
262 | } | 262 | } |
263 | if (rdev->msi_enabled) { | ||
264 | switch (rdev->family) { | ||
265 | case CHIP_RS600: | ||
266 | case CHIP_RS690: | ||
267 | case CHIP_RS740: | ||
268 | msi_rearm = RREG32(RADEON_BUS_CNTL) & ~RS600_MSI_REARM; | ||
269 | WREG32(RADEON_BUS_CNTL, msi_rearm); | ||
270 | WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM); | ||
271 | break; | ||
272 | default: | ||
273 | msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN; | ||
274 | WREG32(RADEON_MSI_REARM_EN, msi_rearm); | ||
275 | WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN); | ||
276 | break; | ||
277 | } | ||
278 | } | ||
263 | return IRQ_HANDLED; | 279 | return IRQ_HANDLED; |
264 | } | 280 | } |
265 | 281 | ||
@@ -472,6 +488,8 @@ int rs600_init(struct radeon_device *rdev) | |||
472 | } | 488 | } |
473 | /* Initialize clocks */ | 489 | /* Initialize clocks */ |
474 | radeon_get_clock_info(rdev->ddev); | 490 | radeon_get_clock_info(rdev->ddev); |
491 | /* Initialize power management */ | ||
492 | radeon_pm_init(rdev); | ||
475 | /* Get vram informations */ | 493 | /* Get vram informations */ |
476 | rs600_vram_info(rdev); | 494 | rs600_vram_info(rdev); |
477 | /* Initialize memory controller (also test AGP) */ | 495 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 025e3225346c..27547175cf93 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -706,6 +706,8 @@ int rs690_init(struct radeon_device *rdev) | |||
706 | } | 706 | } |
707 | /* Initialize clocks */ | 707 | /* Initialize clocks */ |
708 | radeon_get_clock_info(rdev->ddev); | 708 | radeon_get_clock_info(rdev->ddev); |
709 | /* Initialize power management */ | ||
710 | radeon_pm_init(rdev); | ||
709 | /* Get vram informations */ | 711 | /* Get vram informations */ |
710 | rs690_vram_info(rdev); | 712 | rs690_vram_info(rdev); |
711 | /* Initialize memory controller (also test AGP) */ | 713 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c index 41a34c23e6d8..7935f793bf62 100644 --- a/drivers/gpu/drm/radeon/rv515.c +++ b/drivers/gpu/drm/radeon/rv515.c | |||
@@ -137,6 +137,8 @@ int rv515_mc_wait_for_idle(struct radeon_device *rdev) | |||
137 | 137 | ||
138 | void rv515_vga_render_disable(struct radeon_device *rdev) | 138 | void rv515_vga_render_disable(struct radeon_device *rdev) |
139 | { | 139 | { |
140 | WREG32(R_000330_D1VGA_CONTROL, 0); | ||
141 | WREG32(R_000338_D2VGA_CONTROL, 0); | ||
140 | WREG32(R_000300_VGA_RENDER_CONTROL, | 142 | WREG32(R_000300_VGA_RENDER_CONTROL, |
141 | RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL); | 143 | RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL); |
142 | } | 144 | } |
@@ -585,6 +587,8 @@ int rv515_init(struct radeon_device *rdev) | |||
585 | } | 587 | } |
586 | /* Initialize clocks */ | 588 | /* Initialize clocks */ |
587 | radeon_get_clock_info(rdev->ddev); | 589 | radeon_get_clock_info(rdev->ddev); |
590 | /* Initialize power management */ | ||
591 | radeon_pm_init(rdev); | ||
588 | /* Get vram informations */ | 592 | /* Get vram informations */ |
589 | rv515_vram_info(rdev); | 593 | rv515_vram_info(rdev); |
590 | /* Initialize memory controller (also test AGP) */ | 594 | /* Initialize memory controller (also test AGP) */ |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 595ac638039d..b0efd0ddae7a 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -529,11 +529,11 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
529 | if (rdev->family == CHIP_RV770) | 529 | if (rdev->family == CHIP_RV770) |
530 | gb_tiling_config |= BANK_TILING(1); | 530 | gb_tiling_config |= BANK_TILING(1); |
531 | else | 531 | else |
532 | gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_SHIFT) >> NOOFBANK_MASK); | 532 | gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT); |
533 | 533 | ||
534 | gb_tiling_config |= GROUP_SIZE(0); | 534 | gb_tiling_config |= GROUP_SIZE(0); |
535 | 535 | ||
536 | if (((mc_arb_ramcfg & NOOFROWS_MASK) & NOOFROWS_SHIFT) > 3) { | 536 | if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) { |
537 | gb_tiling_config |= ROW_TILING(3); | 537 | gb_tiling_config |= ROW_TILING(3); |
538 | gb_tiling_config |= SAMPLE_SPLIT(3); | 538 | gb_tiling_config |= SAMPLE_SPLIT(3); |
539 | } else { | 539 | } else { |
@@ -579,14 +579,14 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
579 | 579 | ||
580 | /* set HW defaults for 3D engine */ | 580 | /* set HW defaults for 3D engine */ |
581 | WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | | 581 | WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | |
582 | ROQ_IB2_START(0x2b))); | 582 | ROQ_IB2_START(0x2b))); |
583 | 583 | ||
584 | WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30)); | 584 | WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30)); |
585 | 585 | ||
586 | WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO | | 586 | WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO | |
587 | SYNC_GRADIENT | | 587 | SYNC_GRADIENT | |
588 | SYNC_WALKER | | 588 | SYNC_WALKER | |
589 | SYNC_ALIGNER)); | 589 | SYNC_ALIGNER)); |
590 | 590 | ||
591 | sx_debug_1 = RREG32(SX_DEBUG_1); | 591 | sx_debug_1 = RREG32(SX_DEBUG_1); |
592 | sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS; | 592 | sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS; |
@@ -598,9 +598,9 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
598 | WREG32(SMX_DC_CTL0, smx_dc_ctl0); | 598 | WREG32(SMX_DC_CTL0, smx_dc_ctl0); |
599 | 599 | ||
600 | WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) | | 600 | WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) | |
601 | GS_FLUSH_CTL(4) | | 601 | GS_FLUSH_CTL(4) | |
602 | ACK_FLUSH_CTL(3) | | 602 | ACK_FLUSH_CTL(3) | |
603 | SYNC_FLUSH_CTL)); | 603 | SYNC_FLUSH_CTL)); |
604 | 604 | ||
605 | if (rdev->family == CHIP_RV770) | 605 | if (rdev->family == CHIP_RV770) |
606 | WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f)); | 606 | WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f)); |
@@ -611,12 +611,12 @@ static void rv770_gpu_init(struct radeon_device *rdev) | |||
611 | } | 611 | } |
612 | 612 | ||
613 | WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) | | 613 | WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) | |
614 | POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) | | 614 | POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) | |
615 | SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1))); | 615 | SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1))); |
616 | 616 | ||
617 | WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) | | 617 | WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) | |
618 | SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | | 618 | SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | |
619 | SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize))); | 619 | SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize))); |
620 | 620 | ||
621 | WREG32(PA_SC_MULTI_CHIP_CNTL, 0); | 621 | WREG32(PA_SC_MULTI_CHIP_CNTL, 0); |
622 | 622 | ||
@@ -774,14 +774,36 @@ int rv770_mc_init(struct radeon_device *rdev) | |||
774 | { | 774 | { |
775 | fixed20_12 a; | 775 | fixed20_12 a; |
776 | u32 tmp; | 776 | u32 tmp; |
777 | int chansize, numchan; | ||
777 | int r; | 778 | int r; |
778 | 779 | ||
779 | /* Get VRAM informations */ | 780 | /* Get VRAM informations */ |
780 | /* FIXME: Don't know how to determine vram width, need to check | ||
781 | * vram_width usage | ||
782 | */ | ||
783 | rdev->mc.vram_width = 128; | ||
784 | rdev->mc.vram_is_ddr = true; | 781 | rdev->mc.vram_is_ddr = true; |
782 | tmp = RREG32(MC_ARB_RAMCFG); | ||
783 | if (tmp & CHANSIZE_OVERRIDE) { | ||
784 | chansize = 16; | ||
785 | } else if (tmp & CHANSIZE_MASK) { | ||
786 | chansize = 64; | ||
787 | } else { | ||
788 | chansize = 32; | ||
789 | } | ||
790 | tmp = RREG32(MC_SHARED_CHMAP); | ||
791 | switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) { | ||
792 | case 0: | ||
793 | default: | ||
794 | numchan = 1; | ||
795 | break; | ||
796 | case 1: | ||
797 | numchan = 2; | ||
798 | break; | ||
799 | case 2: | ||
800 | numchan = 4; | ||
801 | break; | ||
802 | case 3: | ||
803 | numchan = 8; | ||
804 | break; | ||
805 | } | ||
806 | rdev->mc.vram_width = numchan * chansize; | ||
785 | /* Could aper size report 0 ? */ | 807 | /* Could aper size report 0 ? */ |
786 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); | 808 | rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); |
787 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); | 809 | rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); |
@@ -961,10 +983,13 @@ int rv770_init(struct radeon_device *rdev) | |||
961 | r600_scratch_init(rdev); | 983 | r600_scratch_init(rdev); |
962 | /* Initialize surface registers */ | 984 | /* Initialize surface registers */ |
963 | radeon_surface_init(rdev); | 985 | radeon_surface_init(rdev); |
986 | /* Initialize clocks */ | ||
964 | radeon_get_clock_info(rdev->ddev); | 987 | radeon_get_clock_info(rdev->ddev); |
965 | r = radeon_clocks_init(rdev); | 988 | r = radeon_clocks_init(rdev); |
966 | if (r) | 989 | if (r) |
967 | return r; | 990 | return r; |
991 | /* Initialize power management */ | ||
992 | radeon_pm_init(rdev); | ||
968 | /* Fence driver */ | 993 | /* Fence driver */ |
969 | r = radeon_fence_driver_init(rdev); | 994 | r = radeon_fence_driver_init(rdev); |
970 | if (r) | 995 | if (r) |
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h index 4b9c3d6396ff..a1367ab6f261 100644 --- a/drivers/gpu/drm/radeon/rv770d.h +++ b/drivers/gpu/drm/radeon/rv770d.h | |||
@@ -129,6 +129,10 @@ | |||
129 | #define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 | 129 | #define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 |
130 | #define HDP_TILING_CONFIG 0x2F3C | 130 | #define HDP_TILING_CONFIG 0x2F3C |
131 | 131 | ||
132 | #define MC_SHARED_CHMAP 0x2004 | ||
133 | #define NOOFCHAN_SHIFT 12 | ||
134 | #define NOOFCHAN_MASK 0x00003000 | ||
135 | |||
132 | #define MC_ARB_RAMCFG 0x2760 | 136 | #define MC_ARB_RAMCFG 0x2760 |
133 | #define NOOFBANK_SHIFT 0 | 137 | #define NOOFBANK_SHIFT 0 |
134 | #define NOOFBANK_MASK 0x00000003 | 138 | #define NOOFBANK_MASK 0x00000003 |
@@ -142,6 +146,7 @@ | |||
142 | #define CHANSIZE_MASK 0x00000100 | 146 | #define CHANSIZE_MASK 0x00000100 |
143 | #define BURSTLENGTH_SHIFT 9 | 147 | #define BURSTLENGTH_SHIFT 9 |
144 | #define BURSTLENGTH_MASK 0x00000200 | 148 | #define BURSTLENGTH_MASK 0x00000200 |
149 | #define CHANSIZE_OVERRIDE (1 << 11) | ||
145 | #define MC_VM_AGP_TOP 0x2028 | 150 | #define MC_VM_AGP_TOP 0x2028 |
146 | #define MC_VM_AGP_BOT 0x202C | 151 | #define MC_VM_AGP_BOT 0x202C |
147 | #define MC_VM_AGP_BASE 0x2030 | 152 | #define MC_VM_AGP_BASE 0x2030 |
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c index a55ee1a56c16..7bcb89f39ce8 100644 --- a/drivers/gpu/drm/ttm/ttm_tt.c +++ b/drivers/gpu/drm/ttm/ttm_tt.c | |||
@@ -279,6 +279,7 @@ int ttm_tt_set_placement_caching(struct ttm_tt *ttm, uint32_t placement) | |||
279 | 279 | ||
280 | return ttm_tt_set_caching(ttm, state); | 280 | return ttm_tt_set_caching(ttm, state); |
281 | } | 281 | } |
282 | EXPORT_SYMBOL(ttm_tt_set_placement_caching); | ||
282 | 283 | ||
283 | static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm) | 284 | static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm) |
284 | { | 285 | { |
diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c index d39877a7da63..b5a95193c694 100644 --- a/drivers/hwmon/adt7475.c +++ b/drivers/hwmon/adt7475.c | |||
@@ -350,8 +350,7 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *attr, | |||
350 | 350 | ||
351 | case FAULT: | 351 | case FAULT: |
352 | /* Note - only for remote1 and remote2 */ | 352 | /* Note - only for remote1 and remote2 */ |
353 | out = data->alarms & (sattr->index ? 0x8000 : 0x4000); | 353 | out = !!(data->alarms & (sattr->index ? 0x8000 : 0x4000)); |
354 | out = out ? 0 : 1; | ||
355 | break; | 354 | break; |
356 | 355 | ||
357 | default: | 356 | default: |
@@ -863,7 +862,7 @@ static SENSOR_DEVICE_ATTR_2(pwm1_freq, S_IRUGO | S_IWUSR, show_pwmfreq, | |||
863 | set_pwmfreq, INPUT, 0); | 862 | set_pwmfreq, INPUT, 0); |
864 | static SENSOR_DEVICE_ATTR_2(pwm1_enable, S_IRUGO | S_IWUSR, show_pwmctrl, | 863 | static SENSOR_DEVICE_ATTR_2(pwm1_enable, S_IRUGO | S_IWUSR, show_pwmctrl, |
865 | set_pwmctrl, INPUT, 0); | 864 | set_pwmctrl, INPUT, 0); |
866 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_channel_temp, S_IRUGO | S_IWUSR, | 865 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR, |
867 | show_pwmchan, set_pwmchan, INPUT, 0); | 866 | show_pwmchan, set_pwmchan, INPUT, 0); |
868 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, | 867 | static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, |
869 | set_pwm, MIN, 0); | 868 | set_pwm, MIN, 0); |
@@ -875,7 +874,7 @@ static SENSOR_DEVICE_ATTR_2(pwm2_freq, S_IRUGO | S_IWUSR, show_pwmfreq, | |||
875 | set_pwmfreq, INPUT, 1); | 874 | set_pwmfreq, INPUT, 1); |
876 | static SENSOR_DEVICE_ATTR_2(pwm2_enable, S_IRUGO | S_IWUSR, show_pwmctrl, | 875 | static SENSOR_DEVICE_ATTR_2(pwm2_enable, S_IRUGO | S_IWUSR, show_pwmctrl, |
877 | set_pwmctrl, INPUT, 1); | 876 | set_pwmctrl, INPUT, 1); |
878 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_channel_temp, S_IRUGO | S_IWUSR, | 877 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR, |
879 | show_pwmchan, set_pwmchan, INPUT, 1); | 878 | show_pwmchan, set_pwmchan, INPUT, 1); |
880 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, | 879 | static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, |
881 | set_pwm, MIN, 1); | 880 | set_pwm, MIN, 1); |
@@ -887,7 +886,7 @@ static SENSOR_DEVICE_ATTR_2(pwm3_freq, S_IRUGO | S_IWUSR, show_pwmfreq, | |||
887 | set_pwmfreq, INPUT, 2); | 886 | set_pwmfreq, INPUT, 2); |
888 | static SENSOR_DEVICE_ATTR_2(pwm3_enable, S_IRUGO | S_IWUSR, show_pwmctrl, | 887 | static SENSOR_DEVICE_ATTR_2(pwm3_enable, S_IRUGO | S_IWUSR, show_pwmctrl, |
889 | set_pwmctrl, INPUT, 2); | 888 | set_pwmctrl, INPUT, 2); |
890 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_channel_temp, S_IRUGO | S_IWUSR, | 889 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR, |
891 | show_pwmchan, set_pwmchan, INPUT, 2); | 890 | show_pwmchan, set_pwmchan, INPUT, 2); |
892 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, | 891 | static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, |
893 | set_pwm, MIN, 2); | 892 | set_pwm, MIN, 2); |
@@ -947,19 +946,19 @@ static struct attribute *adt7475_attrs[] = { | |||
947 | &sensor_dev_attr_pwm1.dev_attr.attr, | 946 | &sensor_dev_attr_pwm1.dev_attr.attr, |
948 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, | 947 | &sensor_dev_attr_pwm1_freq.dev_attr.attr, |
949 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, | 948 | &sensor_dev_attr_pwm1_enable.dev_attr.attr, |
950 | &sensor_dev_attr_pwm1_auto_channel_temp.dev_attr.attr, | 949 | &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr, |
951 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, | 950 | &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, |
952 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, | 951 | &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, |
953 | &sensor_dev_attr_pwm2.dev_attr.attr, | 952 | &sensor_dev_attr_pwm2.dev_attr.attr, |
954 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, | 953 | &sensor_dev_attr_pwm2_freq.dev_attr.attr, |
955 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, | 954 | &sensor_dev_attr_pwm2_enable.dev_attr.attr, |
956 | &sensor_dev_attr_pwm2_auto_channel_temp.dev_attr.attr, | 955 | &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr, |
957 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, | 956 | &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, |
958 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, | 957 | &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, |
959 | &sensor_dev_attr_pwm3.dev_attr.attr, | 958 | &sensor_dev_attr_pwm3.dev_attr.attr, |
960 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, | 959 | &sensor_dev_attr_pwm3_freq.dev_attr.attr, |
961 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, | 960 | &sensor_dev_attr_pwm3_enable.dev_attr.attr, |
962 | &sensor_dev_attr_pwm3_auto_channel_temp.dev_attr.attr, | 961 | &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr, |
963 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, | 962 | &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, |
964 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, | 963 | &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, |
965 | NULL, | 964 | NULL, |
@@ -1152,7 +1151,7 @@ static struct adt7475_data *adt7475_update_device(struct device *dev) | |||
1152 | } | 1151 | } |
1153 | 1152 | ||
1154 | /* Limits and settings, should never change update every 60 seconds */ | 1153 | /* Limits and settings, should never change update every 60 seconds */ |
1155 | if (time_after(jiffies, data->limits_updated + HZ * 2) || | 1154 | if (time_after(jiffies, data->limits_updated + HZ * 60) || |
1156 | !data->valid) { | 1155 | !data->valid) { |
1157 | data->config5 = adt7475_read(REG_CONFIG5); | 1156 | data->config5 = adt7475_read(REG_CONFIG5); |
1158 | 1157 | ||
diff --git a/drivers/hwmon/dme1737.c b/drivers/hwmon/dme1737.c index 2c2cb1ec94c5..27d62574284f 100644 --- a/drivers/hwmon/dme1737.c +++ b/drivers/hwmon/dme1737.c | |||
@@ -572,7 +572,7 @@ static struct dme1737_data *dme1737_update_device(struct device *dev) | |||
572 | 572 | ||
573 | /* Sample register contents every 1 sec */ | 573 | /* Sample register contents every 1 sec */ |
574 | if (time_after(jiffies, data->last_update + HZ) || !data->valid) { | 574 | if (time_after(jiffies, data->last_update + HZ) || !data->valid) { |
575 | if (data->type != sch5027) { | 575 | if (data->type == dme1737) { |
576 | data->vid = dme1737_read(data, DME1737_REG_VID) & | 576 | data->vid = dme1737_read(data, DME1737_REG_VID) & |
577 | 0x3f; | 577 | 0x3f; |
578 | } | 578 | } |
@@ -1621,9 +1621,6 @@ static struct attribute *dme1737_misc_attr[] = { | |||
1621 | &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, | 1621 | &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, |
1622 | &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, | 1622 | &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, |
1623 | &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr, | 1623 | &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr, |
1624 | /* Misc */ | ||
1625 | &dev_attr_vrm.attr, | ||
1626 | &dev_attr_cpu0_vid.attr, | ||
1627 | NULL | 1624 | NULL |
1628 | }; | 1625 | }; |
1629 | 1626 | ||
@@ -1631,6 +1628,18 @@ static const struct attribute_group dme1737_misc_group = { | |||
1631 | .attrs = dme1737_misc_attr, | 1628 | .attrs = dme1737_misc_attr, |
1632 | }; | 1629 | }; |
1633 | 1630 | ||
1631 | /* The following struct holds VID-related attributes. Their creation | ||
1632 | depends on the chip type which is determined during module load. */ | ||
1633 | static struct attribute *dme1737_vid_attr[] = { | ||
1634 | &dev_attr_vrm.attr, | ||
1635 | &dev_attr_cpu0_vid.attr, | ||
1636 | NULL | ||
1637 | }; | ||
1638 | |||
1639 | static const struct attribute_group dme1737_vid_group = { | ||
1640 | .attrs = dme1737_vid_attr, | ||
1641 | }; | ||
1642 | |||
1634 | /* The following structs hold the PWM attributes, some of which are optional. | 1643 | /* The following structs hold the PWM attributes, some of which are optional. |
1635 | * Their creation depends on the chip configuration which is determined during | 1644 | * Their creation depends on the chip configuration which is determined during |
1636 | * module load. */ | 1645 | * module load. */ |
@@ -1902,6 +1911,9 @@ static void dme1737_remove_files(struct device *dev) | |||
1902 | if (data->type != sch5027) { | 1911 | if (data->type != sch5027) { |
1903 | sysfs_remove_group(&dev->kobj, &dme1737_misc_group); | 1912 | sysfs_remove_group(&dev->kobj, &dme1737_misc_group); |
1904 | } | 1913 | } |
1914 | if (data->type == dme1737) { | ||
1915 | sysfs_remove_group(&dev->kobj, &dme1737_vid_group); | ||
1916 | } | ||
1905 | 1917 | ||
1906 | sysfs_remove_group(&dev->kobj, &dme1737_group); | 1918 | sysfs_remove_group(&dev->kobj, &dme1737_group); |
1907 | 1919 | ||
@@ -1933,6 +1945,13 @@ static int dme1737_create_files(struct device *dev) | |||
1933 | goto exit_remove; | 1945 | goto exit_remove; |
1934 | } | 1946 | } |
1935 | 1947 | ||
1948 | /* Create VID-related sysfs attributes */ | ||
1949 | if ((data->type == dme1737) && | ||
1950 | (err = sysfs_create_group(&dev->kobj, | ||
1951 | &dme1737_vid_group))) { | ||
1952 | goto exit_remove; | ||
1953 | } | ||
1954 | |||
1936 | /* Create fan sysfs attributes */ | 1955 | /* Create fan sysfs attributes */ |
1937 | for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { | 1956 | for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { |
1938 | if (data->has_fan & (1 << ix)) { | 1957 | if (data->has_fan & (1 << ix)) { |
@@ -2127,7 +2146,7 @@ static int dme1737_init_device(struct device *dev) | |||
2127 | data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ | 2146 | data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ |
2128 | 2147 | ||
2129 | /* Set VRM */ | 2148 | /* Set VRM */ |
2130 | if (data->type != sch5027) { | 2149 | if (data->type == dme1737) { |
2131 | data->vrm = vid_which_vrm(); | 2150 | data->vrm = vid_which_vrm(); |
2132 | } | 2151 | } |
2133 | 2152 | ||
diff --git a/drivers/hwmon/fschmd.c b/drivers/hwmon/fschmd.c index 2a7a85a6dc36..da1b1f9488af 100644 --- a/drivers/hwmon/fschmd.c +++ b/drivers/hwmon/fschmd.c | |||
@@ -819,7 +819,7 @@ static int watchdog_release(struct inode *inode, struct file *filp) | |||
819 | static ssize_t watchdog_write(struct file *filp, const char __user *buf, | 819 | static ssize_t watchdog_write(struct file *filp, const char __user *buf, |
820 | size_t count, loff_t *offset) | 820 | size_t count, loff_t *offset) |
821 | { | 821 | { |
822 | size_t ret; | 822 | int ret; |
823 | struct fschmd_data *data = filp->private_data; | 823 | struct fschmd_data *data = filp->private_data; |
824 | 824 | ||
825 | if (count) { | 825 | if (count) { |
diff --git a/drivers/hwmon/hp_accel.c b/drivers/hwmon/hp_accel.c index 6679854c85b0..be475e844c2a 100644 --- a/drivers/hwmon/hp_accel.c +++ b/drivers/hwmon/hp_accel.c | |||
@@ -197,11 +197,13 @@ static struct dmi_system_id lis3lv02d_dmi_ids[] = { | |||
197 | AXIS_DMI_MATCH("HP2133", "HP 2133", xy_rotated_left), | 197 | AXIS_DMI_MATCH("HP2133", "HP 2133", xy_rotated_left), |
198 | AXIS_DMI_MATCH("HP2140", "HP 2140", xy_swap_inverted), | 198 | AXIS_DMI_MATCH("HP2140", "HP 2140", xy_swap_inverted), |
199 | AXIS_DMI_MATCH("NC653x", "HP Compaq 653", xy_rotated_left_usd), | 199 | AXIS_DMI_MATCH("NC653x", "HP Compaq 653", xy_rotated_left_usd), |
200 | AXIS_DMI_MATCH("NC673x", "HP Compaq 673", xy_rotated_left_usd), | 200 | AXIS_DMI_MATCH("NC6730b", "HP Compaq 6730b", xy_rotated_left_usd), |
201 | AXIS_DMI_MATCH("NC6730s", "HP Compaq 6730s", xy_swap), | ||
201 | AXIS_DMI_MATCH("NC651xx", "HP Compaq 651", xy_rotated_right), | 202 | AXIS_DMI_MATCH("NC651xx", "HP Compaq 651", xy_rotated_right), |
202 | AXIS_DMI_MATCH("NC6710x", "HP Compaq 6710", xy_swap_yz_inverted), | 203 | AXIS_DMI_MATCH("NC6710x", "HP Compaq 6710", xy_swap_yz_inverted), |
203 | AXIS_DMI_MATCH("NC6715x", "HP Compaq 6715", y_inverted), | 204 | AXIS_DMI_MATCH("NC6715x", "HP Compaq 6715", y_inverted), |
204 | AXIS_DMI_MATCH("NC693xx", "HP EliteBook 693", xy_rotated_right), | 205 | AXIS_DMI_MATCH("NC693xx", "HP EliteBook 693", xy_rotated_right), |
206 | AXIS_DMI_MATCH("NC693xx", "HP EliteBook 853", xy_swap), | ||
205 | /* Intel-based HP Pavilion dv5 */ | 207 | /* Intel-based HP Pavilion dv5 */ |
206 | AXIS_DMI_MATCH2("HPDV5_I", | 208 | AXIS_DMI_MATCH2("HPDV5_I", |
207 | PRODUCT_NAME, "HP Pavilion dv5", | 209 | PRODUCT_NAME, "HP Pavilion dv5", |
@@ -214,6 +216,7 @@ static struct dmi_system_id lis3lv02d_dmi_ids[] = { | |||
214 | y_inverted), | 216 | y_inverted), |
215 | AXIS_DMI_MATCH("DV7", "HP Pavilion dv7", x_inverted), | 217 | AXIS_DMI_MATCH("DV7", "HP Pavilion dv7", x_inverted), |
216 | AXIS_DMI_MATCH("HP8710", "HP Compaq 8710", y_inverted), | 218 | AXIS_DMI_MATCH("HP8710", "HP Compaq 8710", y_inverted), |
219 | AXIS_DMI_MATCH("HDX18", "HP HDX 18", x_inverted), | ||
217 | { NULL, } | 220 | { NULL, } |
218 | /* Laptop models without axis info (yet): | 221 | /* Laptop models without axis info (yet): |
219 | * "NC6910" "HP Compaq 6910" | 222 | * "NC6910" "HP Compaq 6910" |
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c index ffeb2a10e1a7..a3749cb0f181 100644 --- a/drivers/hwmon/it87.c +++ b/drivers/hwmon/it87.c | |||
@@ -1028,12 +1028,11 @@ static int __init it87_find(unsigned short *address, | |||
1028 | chip_type, *address, sio_data->revision); | 1028 | chip_type, *address, sio_data->revision); |
1029 | 1029 | ||
1030 | /* Read GPIO config and VID value from LDN 7 (GPIO) */ | 1030 | /* Read GPIO config and VID value from LDN 7 (GPIO) */ |
1031 | if (chip_type != IT8705F_DEVID) { | 1031 | if (sio_data->type != it87) { |
1032 | int reg; | 1032 | int reg; |
1033 | 1033 | ||
1034 | superio_select(GPIO); | 1034 | superio_select(GPIO); |
1035 | if ((chip_type == it8718) || | 1035 | if (sio_data->type == it8718 || sio_data->type == it8720) |
1036 | (chip_type == it8720)) | ||
1037 | sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); | 1036 | sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); |
1038 | 1037 | ||
1039 | reg = superio_inb(IT87_SIO_PINX2_REG); | 1038 | reg = superio_inb(IT87_SIO_PINX2_REG); |
diff --git a/drivers/hwmon/s3c-hwmon.c b/drivers/hwmon/s3c-hwmon.c index 3a524f2fe493..71835412529f 100644 --- a/drivers/hwmon/s3c-hwmon.c +++ b/drivers/hwmon/s3c-hwmon.c | |||
@@ -323,14 +323,21 @@ static int __devinit s3c_hwmon_probe(struct platform_device *dev) | |||
323 | } | 323 | } |
324 | 324 | ||
325 | for (i = 0; i < ARRAY_SIZE(pdata->in); i++) { | 325 | for (i = 0; i < ARRAY_SIZE(pdata->in); i++) { |
326 | if (!pdata->in[i]) | 326 | struct s3c24xx_adc_hwmon_incfg *cfg = pdata->in[i]; |
327 | |||
328 | if (!cfg) | ||
327 | continue; | 329 | continue; |
328 | 330 | ||
329 | if (pdata->in[i]->mult >= 0x10000) | 331 | if (cfg->mult >= 0x10000) |
330 | dev_warn(&dev->dev, | 332 | dev_warn(&dev->dev, |
331 | "channel %d multiplier too large\n", | 333 | "channel %d multiplier too large\n", |
332 | i); | 334 | i); |
333 | 335 | ||
336 | if (cfg->divider == 0) { | ||
337 | dev_err(&dev->dev, "channel %d divider zero\n", i); | ||
338 | continue; | ||
339 | } | ||
340 | |||
334 | ret = s3c_hwmon_create_attr(&dev->dev, pdata->in[i], | 341 | ret = s3c_hwmon_create_attr(&dev->dev, pdata->in[i], |
335 | &hwmon->attrs[i], i); | 342 | &hwmon->attrs[i], i); |
336 | if (ret) { | 343 | if (ret) { |
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig index 737335ff2b21..e8fe7f169e25 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig | |||
@@ -128,7 +128,7 @@ config I2C_PIIX4 | |||
128 | ATI SB600 | 128 | ATI SB600 |
129 | ATI SB700 | 129 | ATI SB700 |
130 | ATI SB800 | 130 | ATI SB800 |
131 | AMD SB900 | 131 | AMD Hudson-2 |
132 | Serverworks OSB4 | 132 | Serverworks OSB4 |
133 | Serverworks CSB5 | 133 | Serverworks CSB5 |
134 | Serverworks CSB6 | 134 | Serverworks CSB6 |
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c index 4afba3ec2a61..e3654d683e15 100644 --- a/drivers/i2c/busses/i2c-imx.c +++ b/drivers/i2c/busses/i2c-imx.c | |||
@@ -120,19 +120,26 @@ struct imx_i2c_struct { | |||
120 | wait_queue_head_t queue; | 120 | wait_queue_head_t queue; |
121 | unsigned long i2csr; | 121 | unsigned long i2csr; |
122 | unsigned int disable_delay; | 122 | unsigned int disable_delay; |
123 | int stopped; | ||
124 | unsigned int ifdr; /* IMX_I2C_IFDR */ | ||
123 | }; | 125 | }; |
124 | 126 | ||
125 | /** Functions for IMX I2C adapter driver *************************************** | 127 | /** Functions for IMX I2C adapter driver *************************************** |
126 | *******************************************************************************/ | 128 | *******************************************************************************/ |
127 | 129 | ||
128 | static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx) | 130 | static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy) |
129 | { | 131 | { |
130 | unsigned long orig_jiffies = jiffies; | 132 | unsigned long orig_jiffies = jiffies; |
133 | unsigned int temp; | ||
131 | 134 | ||
132 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 135 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
133 | 136 | ||
134 | /* wait for bus not busy */ | 137 | while (1) { |
135 | while (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_IBB) { | 138 | temp = readb(i2c_imx->base + IMX_I2C_I2SR); |
139 | if (for_busy && (temp & I2SR_IBB)) | ||
140 | break; | ||
141 | if (!for_busy && !(temp & I2SR_IBB)) | ||
142 | break; | ||
136 | if (signal_pending(current)) { | 143 | if (signal_pending(current)) { |
137 | dev_dbg(&i2c_imx->adapter.dev, | 144 | dev_dbg(&i2c_imx->adapter.dev, |
138 | "<%s> I2C Interrupted\n", __func__); | 145 | "<%s> I2C Interrupted\n", __func__); |
@@ -179,41 +186,62 @@ static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx) | |||
179 | return 0; | 186 | return 0; |
180 | } | 187 | } |
181 | 188 | ||
182 | static void i2c_imx_start(struct imx_i2c_struct *i2c_imx) | 189 | static int i2c_imx_start(struct imx_i2c_struct *i2c_imx) |
183 | { | 190 | { |
184 | unsigned int temp = 0; | 191 | unsigned int temp = 0; |
192 | int result; | ||
185 | 193 | ||
186 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 194 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
187 | 195 | ||
196 | clk_enable(i2c_imx->clk); | ||
197 | writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR); | ||
188 | /* Enable I2C controller */ | 198 | /* Enable I2C controller */ |
199 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | ||
189 | writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); | 200 | writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); |
201 | |||
202 | /* Wait controller to be stable */ | ||
203 | udelay(50); | ||
204 | |||
190 | /* Start I2C transaction */ | 205 | /* Start I2C transaction */ |
191 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 206 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); |
192 | temp |= I2CR_MSTA; | 207 | temp |= I2CR_MSTA; |
193 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 208 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
209 | result = i2c_imx_bus_busy(i2c_imx, 1); | ||
210 | if (result) | ||
211 | return result; | ||
212 | i2c_imx->stopped = 0; | ||
213 | |||
194 | temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; | 214 | temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; |
195 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 215 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
216 | return result; | ||
196 | } | 217 | } |
197 | 218 | ||
198 | static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) | 219 | static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) |
199 | { | 220 | { |
200 | unsigned int temp = 0; | 221 | unsigned int temp = 0; |
201 | 222 | ||
202 | /* Stop I2C transaction */ | 223 | if (!i2c_imx->stopped) { |
203 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 224 | /* Stop I2C transaction */ |
204 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 225 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
205 | temp &= ~I2CR_MSTA; | 226 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); |
206 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 227 | temp &= ~(I2CR_MSTA | I2CR_MTX); |
207 | /* setup chip registers to defaults */ | 228 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
208 | writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); | 229 | i2c_imx->stopped = 1; |
209 | writeb(0, i2c_imx->base + IMX_I2C_I2SR); | 230 | } |
210 | /* | 231 | if (cpu_is_mx1()) { |
211 | * This delay caused by an i.MXL hardware bug. | 232 | /* |
212 | * If no (or too short) delay, no "STOP" bit will be generated. | 233 | * This delay caused by an i.MXL hardware bug. |
213 | */ | 234 | * If no (or too short) delay, no "STOP" bit will be generated. |
214 | udelay(i2c_imx->disable_delay); | 235 | */ |
236 | udelay(i2c_imx->disable_delay); | ||
237 | } | ||
238 | |||
239 | if (!i2c_imx->stopped) | ||
240 | i2c_imx_bus_busy(i2c_imx, 0); | ||
241 | |||
215 | /* Disable I2C controller */ | 242 | /* Disable I2C controller */ |
216 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); | 243 | writeb(0, i2c_imx->base + IMX_I2C_I2CR); |
244 | clk_disable(i2c_imx->clk); | ||
217 | } | 245 | } |
218 | 246 | ||
219 | static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, | 247 | static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, |
@@ -233,8 +261,8 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, | |||
233 | else | 261 | else |
234 | for (i = 0; i2c_clk_div[i][0] < div; i++); | 262 | for (i = 0; i2c_clk_div[i][0] < div; i++); |
235 | 263 | ||
236 | /* Write divider value to register */ | 264 | /* Store divider value */ |
237 | writeb(i2c_clk_div[i][1], i2c_imx->base + IMX_I2C_IFDR); | 265 | i2c_imx->ifdr = i2c_clk_div[i][1]; |
238 | 266 | ||
239 | /* | 267 | /* |
240 | * There dummy delay is calculated. | 268 | * There dummy delay is calculated. |
@@ -341,11 +369,15 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs) | |||
341 | if (result) | 369 | if (result) |
342 | return result; | 370 | return result; |
343 | if (i == (msgs->len - 1)) { | 371 | if (i == (msgs->len - 1)) { |
372 | /* It must generate STOP before read I2DR to prevent | ||
373 | controller from generating another clock cycle */ | ||
344 | dev_dbg(&i2c_imx->adapter.dev, | 374 | dev_dbg(&i2c_imx->adapter.dev, |
345 | "<%s> clear MSTA\n", __func__); | 375 | "<%s> clear MSTA\n", __func__); |
346 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 376 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); |
347 | temp &= ~I2CR_MSTA; | 377 | temp &= ~(I2CR_MSTA | I2CR_MTX); |
348 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 378 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
379 | i2c_imx_bus_busy(i2c_imx, 0); | ||
380 | i2c_imx->stopped = 1; | ||
349 | } else if (i == (msgs->len - 2)) { | 381 | } else if (i == (msgs->len - 2)) { |
350 | dev_dbg(&i2c_imx->adapter.dev, | 382 | dev_dbg(&i2c_imx->adapter.dev, |
351 | "<%s> set TXAK\n", __func__); | 383 | "<%s> set TXAK\n", __func__); |
@@ -370,14 +402,11 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter, | |||
370 | 402 | ||
371 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); | 403 | dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); |
372 | 404 | ||
373 | /* Check if i2c bus is not busy */ | 405 | /* Start I2C transfer */ |
374 | result = i2c_imx_bus_busy(i2c_imx); | 406 | result = i2c_imx_start(i2c_imx); |
375 | if (result) | 407 | if (result) |
376 | goto fail0; | 408 | goto fail0; |
377 | 409 | ||
378 | /* Start I2C transfer */ | ||
379 | i2c_imx_start(i2c_imx); | ||
380 | |||
381 | /* read/write data */ | 410 | /* read/write data */ |
382 | for (i = 0; i < num; i++) { | 411 | for (i = 0; i < num; i++) { |
383 | if (i) { | 412 | if (i) { |
@@ -386,6 +415,9 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter, | |||
386 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); | 415 | temp = readb(i2c_imx->base + IMX_I2C_I2CR); |
387 | temp |= I2CR_RSTA; | 416 | temp |= I2CR_RSTA; |
388 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); | 417 | writeb(temp, i2c_imx->base + IMX_I2C_I2CR); |
418 | result = i2c_imx_bus_busy(i2c_imx, 1); | ||
419 | if (result) | ||
420 | goto fail0; | ||
389 | } | 421 | } |
390 | dev_dbg(&i2c_imx->adapter.dev, | 422 | dev_dbg(&i2c_imx->adapter.dev, |
391 | "<%s> transfer message: %d\n", __func__, i); | 423 | "<%s> transfer message: %d\n", __func__, i); |
@@ -500,7 +532,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev) | |||
500 | dev_err(&pdev->dev, "can't get I2C clock\n"); | 532 | dev_err(&pdev->dev, "can't get I2C clock\n"); |
501 | goto fail3; | 533 | goto fail3; |
502 | } | 534 | } |
503 | clk_enable(i2c_imx->clk); | ||
504 | 535 | ||
505 | /* Request IRQ */ | 536 | /* Request IRQ */ |
506 | ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); | 537 | ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); |
@@ -549,7 +580,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev) | |||
549 | fail5: | 580 | fail5: |
550 | free_irq(i2c_imx->irq, i2c_imx); | 581 | free_irq(i2c_imx->irq, i2c_imx); |
551 | fail4: | 582 | fail4: |
552 | clk_disable(i2c_imx->clk); | ||
553 | clk_put(i2c_imx->clk); | 583 | clk_put(i2c_imx->clk); |
554 | fail3: | 584 | fail3: |
555 | release_mem_region(i2c_imx->res->start, resource_size(res)); | 585 | release_mem_region(i2c_imx->res->start, resource_size(res)); |
@@ -586,8 +616,6 @@ static int __exit i2c_imx_remove(struct platform_device *pdev) | |||
586 | if (pdata && pdata->exit) | 616 | if (pdata && pdata->exit) |
587 | pdata->exit(&pdev->dev); | 617 | pdata->exit(&pdev->dev); |
588 | 618 | ||
589 | /* Disable I2C clock */ | ||
590 | clk_disable(i2c_imx->clk); | ||
591 | clk_put(i2c_imx->clk); | 619 | clk_put(i2c_imx->clk); |
592 | 620 | ||
593 | release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); | 621 | release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); |
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c index d325e86e3103..f627001108b8 100644 --- a/drivers/i2c/busses/i2c-mpc.c +++ b/drivers/i2c/busses/i2c-mpc.c | |||
@@ -365,9 +365,6 @@ static int mpc_write(struct mpc_i2c *i2c, int target, | |||
365 | unsigned timeout = i2c->adap.timeout; | 365 | unsigned timeout = i2c->adap.timeout; |
366 | u32 flags = restart ? CCR_RSTA : 0; | 366 | u32 flags = restart ? CCR_RSTA : 0; |
367 | 367 | ||
368 | /* Start with MEN */ | ||
369 | if (!restart) | ||
370 | writeccr(i2c, CCR_MEN); | ||
371 | /* Start as master */ | 368 | /* Start as master */ |
372 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); | 369 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); |
373 | /* Write target byte */ | 370 | /* Write target byte */ |
@@ -396,9 +393,6 @@ static int mpc_read(struct mpc_i2c *i2c, int target, | |||
396 | int i, result; | 393 | int i, result; |
397 | u32 flags = restart ? CCR_RSTA : 0; | 394 | u32 flags = restart ? CCR_RSTA : 0; |
398 | 395 | ||
399 | /* Start with MEN */ | ||
400 | if (!restart) | ||
401 | writeccr(i2c, CCR_MEN); | ||
402 | /* Switch to read - restart */ | 396 | /* Switch to read - restart */ |
403 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); | 397 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); |
404 | /* Write target address byte - this time with the read flag set */ | 398 | /* Write target address byte - this time with the read flag set */ |
@@ -425,9 +419,9 @@ static int mpc_read(struct mpc_i2c *i2c, int target, | |||
425 | /* Generate txack on next to last byte */ | 419 | /* Generate txack on next to last byte */ |
426 | if (i == length - 2) | 420 | if (i == length - 2) |
427 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK); | 421 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK); |
428 | /* Generate stop on last byte */ | 422 | /* Do not generate stop on last byte */ |
429 | if (i == length - 1) | 423 | if (i == length - 1) |
430 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK); | 424 | writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX); |
431 | data[i] = readb(i2c->base + MPC_I2C_DR); | 425 | data[i] = readb(i2c->base + MPC_I2C_DR); |
432 | } | 426 | } |
433 | 427 | ||
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c index d26a972aacaa..1e245e9cad31 100644 --- a/drivers/i2c/busses/i2c-piix4.c +++ b/drivers/i2c/busses/i2c-piix4.c | |||
@@ -22,7 +22,7 @@ | |||
22 | Intel PIIX4, 440MX | 22 | Intel PIIX4, 440MX |
23 | Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 | 23 | Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 |
24 | ATI IXP200, IXP300, IXP400, SB600, SB700, SB800 | 24 | ATI IXP200, IXP300, IXP400, SB600, SB700, SB800 |
25 | AMD SB900 | 25 | AMD Hudson-2 |
26 | SMSC Victory66 | 26 | SMSC Victory66 |
27 | 27 | ||
28 | Note: we assume there can only be one device, with one SMBus interface. | 28 | Note: we assume there can only be one device, with one SMBus interface. |
@@ -233,9 +233,9 @@ static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev, | |||
233 | unsigned short smba_idx = 0xcd6; | 233 | unsigned short smba_idx = 0xcd6; |
234 | u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c; | 234 | u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c; |
235 | 235 | ||
236 | /* SB800 SMBus does not support forcing address */ | 236 | /* SB800 and later SMBus does not support forcing address */ |
237 | if (force || force_addr) { | 237 | if (force || force_addr) { |
238 | dev_err(&PIIX4_dev->dev, "SB800 SMBus does not support " | 238 | dev_err(&PIIX4_dev->dev, "SMBus does not support " |
239 | "forcing address!\n"); | 239 | "forcing address!\n"); |
240 | return -EINVAL; | 240 | return -EINVAL; |
241 | } | 241 | } |
@@ -480,7 +480,7 @@ static struct pci_device_id piix4_ids[] = { | |||
480 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, | 480 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, |
481 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, | 481 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, |
482 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, | 482 | { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, |
483 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SMBUS) }, | 483 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) }, |
484 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, | 484 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, |
485 | PCI_DEVICE_ID_SERVERWORKS_OSB4) }, | 485 | PCI_DEVICE_ID_SERVERWORKS_OSB4) }, |
486 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, | 486 | { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, |
diff --git a/drivers/ide/cmd64x.c b/drivers/ide/cmd64x.c index 680e5975217f..ca0c46f6580a 100644 --- a/drivers/ide/cmd64x.c +++ b/drivers/ide/cmd64x.c | |||
@@ -379,7 +379,8 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { | |||
379 | .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, | 379 | .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, |
380 | .port_ops = &cmd64x_port_ops, | 380 | .port_ops = &cmd64x_port_ops, |
381 | .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | | 381 | .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | |
382 | IDE_HFLAG_ABUSE_PREFETCH, | 382 | IDE_HFLAG_ABUSE_PREFETCH | |
383 | IDE_HFLAG_SERIALIZE, | ||
383 | .pio_mask = ATA_PIO5, | 384 | .pio_mask = ATA_PIO5, |
384 | .mwdma_mask = ATA_MWDMA2, | 385 | .mwdma_mask = ATA_MWDMA2, |
385 | .udma_mask = 0x00, /* no udma */ | 386 | .udma_mask = 0x00, /* no udma */ |
@@ -389,7 +390,8 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = { | |||
389 | .init_chipset = init_chipset_cmd64x, | 390 | .init_chipset = init_chipset_cmd64x, |
390 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, | 391 | .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, |
391 | .port_ops = &cmd648_port_ops, | 392 | .port_ops = &cmd648_port_ops, |
392 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH, | 393 | .host_flags = IDE_HFLAG_ABUSE_PREFETCH | |
394 | IDE_HFLAG_SERIALIZE, | ||
393 | .pio_mask = ATA_PIO5, | 395 | .pio_mask = ATA_PIO5, |
394 | .mwdma_mask = ATA_MWDMA2, | 396 | .mwdma_mask = ATA_MWDMA2, |
395 | .udma_mask = ATA_UDMA2, | 397 | .udma_mask = ATA_UDMA2, |
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c index 63c53d65e875..4d76ba473097 100644 --- a/drivers/ide/ide-probe.c +++ b/drivers/ide/ide-probe.c | |||
@@ -1046,15 +1046,6 @@ static void ide_port_init_devices(ide_hwif_t *hwif) | |||
1046 | if (port_ops && port_ops->init_dev) | 1046 | if (port_ops && port_ops->init_dev) |
1047 | port_ops->init_dev(drive); | 1047 | port_ops->init_dev(drive); |
1048 | } | 1048 | } |
1049 | |||
1050 | ide_port_for_each_dev(i, drive, hwif) { | ||
1051 | /* | ||
1052 | * default to PIO Mode 0 before we figure out | ||
1053 | * the most suited mode for the attached device | ||
1054 | */ | ||
1055 | if (port_ops && port_ops->set_pio_mode) | ||
1056 | port_ops->set_pio_mode(drive, 0); | ||
1057 | } | ||
1058 | } | 1049 | } |
1059 | 1050 | ||
1060 | static void ide_init_port(ide_hwif_t *hwif, unsigned int port, | 1051 | static void ide_init_port(ide_hwif_t *hwif, unsigned int port, |
diff --git a/drivers/input/ff-core.c b/drivers/input/ff-core.c index 72c63e5dd630..38df81fcdc3a 100644 --- a/drivers/input/ff-core.c +++ b/drivers/input/ff-core.c | |||
@@ -337,16 +337,16 @@ int input_ff_create(struct input_dev *dev, int max_effects) | |||
337 | dev->ff = ff; | 337 | dev->ff = ff; |
338 | dev->flush = flush_effects; | 338 | dev->flush = flush_effects; |
339 | dev->event = input_ff_event; | 339 | dev->event = input_ff_event; |
340 | set_bit(EV_FF, dev->evbit); | 340 | __set_bit(EV_FF, dev->evbit); |
341 | 341 | ||
342 | /* Copy "true" bits into ff device bitmap */ | 342 | /* Copy "true" bits into ff device bitmap */ |
343 | for (i = 0; i <= FF_MAX; i++) | 343 | for (i = 0; i <= FF_MAX; i++) |
344 | if (test_bit(i, dev->ffbit)) | 344 | if (test_bit(i, dev->ffbit)) |
345 | set_bit(i, ff->ffbit); | 345 | __set_bit(i, ff->ffbit); |
346 | 346 | ||
347 | /* we can emulate RUMBLE with periodic effects */ | 347 | /* we can emulate RUMBLE with periodic effects */ |
348 | if (test_bit(FF_PERIODIC, ff->ffbit)) | 348 | if (test_bit(FF_PERIODIC, ff->ffbit)) |
349 | set_bit(FF_RUMBLE, dev->ffbit); | 349 | __set_bit(FF_RUMBLE, dev->ffbit); |
350 | 350 | ||
351 | return 0; | 351 | return 0; |
352 | } | 352 | } |
@@ -362,12 +362,14 @@ EXPORT_SYMBOL_GPL(input_ff_create); | |||
362 | */ | 362 | */ |
363 | void input_ff_destroy(struct input_dev *dev) | 363 | void input_ff_destroy(struct input_dev *dev) |
364 | { | 364 | { |
365 | clear_bit(EV_FF, dev->evbit); | 365 | struct ff_device *ff = dev->ff; |
366 | if (dev->ff) { | 366 | |
367 | if (dev->ff->destroy) | 367 | __clear_bit(EV_FF, dev->evbit); |
368 | dev->ff->destroy(dev->ff); | 368 | if (ff) { |
369 | kfree(dev->ff->private); | 369 | if (ff->destroy) |
370 | kfree(dev->ff); | 370 | ff->destroy(ff); |
371 | kfree(ff->private); | ||
372 | kfree(ff); | ||
371 | dev->ff = NULL; | 373 | dev->ff = NULL; |
372 | } | 374 | } |
373 | } | 375 | } |
diff --git a/drivers/input/ff-memless.c b/drivers/input/ff-memless.c index 2d1415e16834..b483b2995fa9 100644 --- a/drivers/input/ff-memless.c +++ b/drivers/input/ff-memless.c | |||
@@ -61,7 +61,6 @@ struct ml_device { | |||
61 | struct ml_effect_state states[FF_MEMLESS_EFFECTS]; | 61 | struct ml_effect_state states[FF_MEMLESS_EFFECTS]; |
62 | int gain; | 62 | int gain; |
63 | struct timer_list timer; | 63 | struct timer_list timer; |
64 | spinlock_t timer_lock; | ||
65 | struct input_dev *dev; | 64 | struct input_dev *dev; |
66 | 65 | ||
67 | int (*play_effect)(struct input_dev *dev, void *data, | 66 | int (*play_effect)(struct input_dev *dev, void *data, |
@@ -368,38 +367,38 @@ static void ml_effect_timer(unsigned long timer_data) | |||
368 | { | 367 | { |
369 | struct input_dev *dev = (struct input_dev *)timer_data; | 368 | struct input_dev *dev = (struct input_dev *)timer_data; |
370 | struct ml_device *ml = dev->ff->private; | 369 | struct ml_device *ml = dev->ff->private; |
370 | unsigned long flags; | ||
371 | 371 | ||
372 | debug("timer: updating effects"); | 372 | debug("timer: updating effects"); |
373 | 373 | ||
374 | spin_lock(&ml->timer_lock); | 374 | spin_lock_irqsave(&dev->event_lock, flags); |
375 | ml_play_effects(ml); | 375 | ml_play_effects(ml); |
376 | spin_unlock(&ml->timer_lock); | 376 | spin_unlock_irqrestore(&dev->event_lock, flags); |
377 | } | 377 | } |
378 | 378 | ||
379 | /* | ||
380 | * Sets requested gain for FF effects. Called with dev->event_lock held. | ||
381 | */ | ||
379 | static void ml_ff_set_gain(struct input_dev *dev, u16 gain) | 382 | static void ml_ff_set_gain(struct input_dev *dev, u16 gain) |
380 | { | 383 | { |
381 | struct ml_device *ml = dev->ff->private; | 384 | struct ml_device *ml = dev->ff->private; |
382 | int i; | 385 | int i; |
383 | 386 | ||
384 | spin_lock_bh(&ml->timer_lock); | ||
385 | |||
386 | ml->gain = gain; | 387 | ml->gain = gain; |
387 | 388 | ||
388 | for (i = 0; i < FF_MEMLESS_EFFECTS; i++) | 389 | for (i = 0; i < FF_MEMLESS_EFFECTS; i++) |
389 | __clear_bit(FF_EFFECT_PLAYING, &ml->states[i].flags); | 390 | __clear_bit(FF_EFFECT_PLAYING, &ml->states[i].flags); |
390 | 391 | ||
391 | ml_play_effects(ml); | 392 | ml_play_effects(ml); |
392 | |||
393 | spin_unlock_bh(&ml->timer_lock); | ||
394 | } | 393 | } |
395 | 394 | ||
395 | /* | ||
396 | * Start/stop specified FF effect. Called with dev->event_lock held. | ||
397 | */ | ||
396 | static int ml_ff_playback(struct input_dev *dev, int effect_id, int value) | 398 | static int ml_ff_playback(struct input_dev *dev, int effect_id, int value) |
397 | { | 399 | { |
398 | struct ml_device *ml = dev->ff->private; | 400 | struct ml_device *ml = dev->ff->private; |
399 | struct ml_effect_state *state = &ml->states[effect_id]; | 401 | struct ml_effect_state *state = &ml->states[effect_id]; |
400 | unsigned long flags; | ||
401 | |||
402 | spin_lock_irqsave(&ml->timer_lock, flags); | ||
403 | 402 | ||
404 | if (value > 0) { | 403 | if (value > 0) { |
405 | debug("initiated play"); | 404 | debug("initiated play"); |
@@ -425,8 +424,6 @@ static int ml_ff_playback(struct input_dev *dev, int effect_id, int value) | |||
425 | ml_play_effects(ml); | 424 | ml_play_effects(ml); |
426 | } | 425 | } |
427 | 426 | ||
428 | spin_unlock_irqrestore(&ml->timer_lock, flags); | ||
429 | |||
430 | return 0; | 427 | return 0; |
431 | } | 428 | } |
432 | 429 | ||
@@ -436,7 +433,7 @@ static int ml_ff_upload(struct input_dev *dev, | |||
436 | struct ml_device *ml = dev->ff->private; | 433 | struct ml_device *ml = dev->ff->private; |
437 | struct ml_effect_state *state = &ml->states[effect->id]; | 434 | struct ml_effect_state *state = &ml->states[effect->id]; |
438 | 435 | ||
439 | spin_lock_bh(&ml->timer_lock); | 436 | spin_lock_irq(&dev->event_lock); |
440 | 437 | ||
441 | if (test_bit(FF_EFFECT_STARTED, &state->flags)) { | 438 | if (test_bit(FF_EFFECT_STARTED, &state->flags)) { |
442 | __clear_bit(FF_EFFECT_PLAYING, &state->flags); | 439 | __clear_bit(FF_EFFECT_PLAYING, &state->flags); |
@@ -448,7 +445,7 @@ static int ml_ff_upload(struct input_dev *dev, | |||
448 | ml_schedule_timer(ml); | 445 | ml_schedule_timer(ml); |
449 | } | 446 | } |
450 | 447 | ||
451 | spin_unlock_bh(&ml->timer_lock); | 448 | spin_unlock_irq(&dev->event_lock); |
452 | 449 | ||
453 | return 0; | 450 | return 0; |
454 | } | 451 | } |
@@ -482,7 +479,6 @@ int input_ff_create_memless(struct input_dev *dev, void *data, | |||
482 | ml->private = data; | 479 | ml->private = data; |
483 | ml->play_effect = play_effect; | 480 | ml->play_effect = play_effect; |
484 | ml->gain = 0xffff; | 481 | ml->gain = 0xffff; |
485 | spin_lock_init(&ml->timer_lock); | ||
486 | setup_timer(&ml->timer, ml_effect_timer, (unsigned long)dev); | 482 | setup_timer(&ml->timer, ml_effect_timer, (unsigned long)dev); |
487 | 483 | ||
488 | set_bit(FF_GAIN, dev->ffbit); | 484 | set_bit(FF_GAIN, dev->ffbit); |
diff --git a/drivers/input/input.c b/drivers/input/input.c index cc763c96fada..2266ecbfbc01 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c | |||
@@ -1292,17 +1292,24 @@ static int input_dev_uevent(struct device *device, struct kobj_uevent_env *env) | |||
1292 | return 0; | 1292 | return 0; |
1293 | } | 1293 | } |
1294 | 1294 | ||
1295 | #define INPUT_DO_TOGGLE(dev, type, bits, on) \ | 1295 | #define INPUT_DO_TOGGLE(dev, type, bits, on) \ |
1296 | do { \ | 1296 | do { \ |
1297 | int i; \ | 1297 | int i; \ |
1298 | if (!test_bit(EV_##type, dev->evbit)) \ | 1298 | bool active; \ |
1299 | break; \ | 1299 | \ |
1300 | for (i = 0; i < type##_MAX; i++) { \ | 1300 | if (!test_bit(EV_##type, dev->evbit)) \ |
1301 | if (!test_bit(i, dev->bits##bit) || \ | 1301 | break; \ |
1302 | !test_bit(i, dev->bits)) \ | 1302 | \ |
1303 | continue; \ | 1303 | for (i = 0; i < type##_MAX; i++) { \ |
1304 | dev->event(dev, EV_##type, i, on); \ | 1304 | if (!test_bit(i, dev->bits##bit)) \ |
1305 | } \ | 1305 | continue; \ |
1306 | \ | ||
1307 | active = test_bit(i, dev->bits); \ | ||
1308 | if (!active && !on) \ | ||
1309 | continue; \ | ||
1310 | \ | ||
1311 | dev->event(dev, EV_##type, i, on ? active : 0); \ | ||
1312 | } \ | ||
1306 | } while (0) | 1313 | } while (0) |
1307 | 1314 | ||
1308 | #ifdef CONFIG_PM | 1315 | #ifdef CONFIG_PM |
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c index a6512372c7a3..28e6110d1ff8 100644 --- a/drivers/input/keyboard/atkbd.c +++ b/drivers/input/keyboard/atkbd.c | |||
@@ -233,6 +233,7 @@ struct atkbd { | |||
233 | */ | 233 | */ |
234 | static void (*atkbd_platform_fixup)(struct atkbd *, const void *data); | 234 | static void (*atkbd_platform_fixup)(struct atkbd *, const void *data); |
235 | static void *atkbd_platform_fixup_data; | 235 | static void *atkbd_platform_fixup_data; |
236 | static unsigned int (*atkbd_platform_scancode_fixup)(struct atkbd *, unsigned int); | ||
236 | 237 | ||
237 | static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf, | 238 | static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf, |
238 | ssize_t (*handler)(struct atkbd *, char *)); | 239 | ssize_t (*handler)(struct atkbd *, char *)); |
@@ -393,6 +394,9 @@ static irqreturn_t atkbd_interrupt(struct serio *serio, unsigned char data, | |||
393 | 394 | ||
394 | input_event(dev, EV_MSC, MSC_RAW, code); | 395 | input_event(dev, EV_MSC, MSC_RAW, code); |
395 | 396 | ||
397 | if (atkbd_platform_scancode_fixup) | ||
398 | code = atkbd_platform_scancode_fixup(atkbd, code); | ||
399 | |||
396 | if (atkbd->translated) { | 400 | if (atkbd->translated) { |
397 | 401 | ||
398 | if (atkbd->emul || atkbd_need_xlate(atkbd->xl_bit, code)) { | 402 | if (atkbd->emul || atkbd_need_xlate(atkbd->xl_bit, code)) { |
@@ -923,6 +927,22 @@ static unsigned int atkbd_volume_forced_release_keys[] = { | |||
923 | }; | 927 | }; |
924 | 928 | ||
925 | /* | 929 | /* |
930 | * OQO 01+ multimedia keys (64--66) generate e0 6x upon release whereas | ||
931 | * they should be generating e4-e6 (0x80 | code). | ||
932 | */ | ||
933 | static unsigned int atkbd_oqo_01plus_scancode_fixup(struct atkbd *atkbd, | ||
934 | unsigned int code) | ||
935 | { | ||
936 | if (atkbd->translated && atkbd->emul == 1 && | ||
937 | (code == 0x64 || code == 0x65 || code == 0x66)) { | ||
938 | atkbd->emul = 0; | ||
939 | code |= 0x80; | ||
940 | } | ||
941 | |||
942 | return code; | ||
943 | } | ||
944 | |||
945 | /* | ||
926 | * atkbd_set_keycode_table() initializes keyboard's keycode table | 946 | * atkbd_set_keycode_table() initializes keyboard's keycode table |
927 | * according to the selected scancode set | 947 | * according to the selected scancode set |
928 | */ | 948 | */ |
@@ -1154,6 +1174,18 @@ static int atkbd_reconnect(struct serio *serio) | |||
1154 | return -1; | 1174 | return -1; |
1155 | 1175 | ||
1156 | atkbd_activate(atkbd); | 1176 | atkbd_activate(atkbd); |
1177 | |||
1178 | /* | ||
1179 | * Restore LED state and repeat rate. While input core | ||
1180 | * will do this for us at resume time reconnect may happen | ||
1181 | * because user requested it via sysfs or simply because | ||
1182 | * keyboard was unplugged and plugged in again so we need | ||
1183 | * to do it ourselves here. | ||
1184 | */ | ||
1185 | atkbd_set_leds(atkbd); | ||
1186 | if (!atkbd->softrepeat) | ||
1187 | atkbd_set_repeat_rate(atkbd); | ||
1188 | |||
1157 | } | 1189 | } |
1158 | 1190 | ||
1159 | atkbd_enable(atkbd); | 1191 | atkbd_enable(atkbd); |
@@ -1402,6 +1434,7 @@ static ssize_t atkbd_set_set(struct atkbd *atkbd, const char *buf, size_t count) | |||
1402 | 1434 | ||
1403 | atkbd->dev = new_dev; | 1435 | atkbd->dev = new_dev; |
1404 | atkbd->set = atkbd_select_set(atkbd, value, atkbd->extra); | 1436 | atkbd->set = atkbd_select_set(atkbd, value, atkbd->extra); |
1437 | atkbd_reset_state(atkbd); | ||
1405 | atkbd_activate(atkbd); | 1438 | atkbd_activate(atkbd); |
1406 | atkbd_set_keycode_table(atkbd); | 1439 | atkbd_set_keycode_table(atkbd); |
1407 | atkbd_set_device_attrs(atkbd); | 1440 | atkbd_set_device_attrs(atkbd); |
@@ -1527,6 +1560,13 @@ static int __init atkbd_setup_forced_release(const struct dmi_system_id *id) | |||
1527 | return 0; | 1560 | return 0; |
1528 | } | 1561 | } |
1529 | 1562 | ||
1563 | static int __init atkbd_setup_scancode_fixup(const struct dmi_system_id *id) | ||
1564 | { | ||
1565 | atkbd_platform_scancode_fixup = id->driver_data; | ||
1566 | |||
1567 | return 0; | ||
1568 | } | ||
1569 | |||
1530 | static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = { | 1570 | static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = { |
1531 | { | 1571 | { |
1532 | .ident = "Dell Laptop", | 1572 | .ident = "Dell Laptop", |
@@ -1663,6 +1703,15 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = { | |||
1663 | .callback = atkbd_setup_forced_release, | 1703 | .callback = atkbd_setup_forced_release, |
1664 | .driver_data = atkdb_soltech_ta12_forced_release_keys, | 1704 | .driver_data = atkdb_soltech_ta12_forced_release_keys, |
1665 | }, | 1705 | }, |
1706 | { | ||
1707 | .ident = "OQO Model 01+", | ||
1708 | .matches = { | ||
1709 | DMI_MATCH(DMI_SYS_VENDOR, "OQO"), | ||
1710 | DMI_MATCH(DMI_PRODUCT_NAME, "ZEPTO"), | ||
1711 | }, | ||
1712 | .callback = atkbd_setup_scancode_fixup, | ||
1713 | .driver_data = atkbd_oqo_01plus_scancode_fixup, | ||
1714 | }, | ||
1666 | { } | 1715 | { } |
1667 | }; | 1716 | }; |
1668 | 1717 | ||
diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c index a88aff3816a0..77d130914259 100644 --- a/drivers/input/keyboard/gpio_keys.c +++ b/drivers/input/keyboard/gpio_keys.c | |||
@@ -147,6 +147,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev) | |||
147 | } | 147 | } |
148 | 148 | ||
149 | error = request_irq(irq, gpio_keys_isr, | 149 | error = request_irq(irq, gpio_keys_isr, |
150 | IRQF_SHARED | | ||
150 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, | 151 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
151 | button->desc ? button->desc : "gpio_keys", | 152 | button->desc ? button->desc : "gpio_keys", |
152 | bdata); | 153 | bdata); |
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig index 02f4f8f1db6f..a9bb2544b2de 100644 --- a/drivers/input/misc/Kconfig +++ b/drivers/input/misc/Kconfig | |||
@@ -227,6 +227,7 @@ config INPUT_WINBOND_CIR | |||
227 | depends on X86 && PNP | 227 | depends on X86 && PNP |
228 | select NEW_LEDS | 228 | select NEW_LEDS |
229 | select LEDS_CLASS | 229 | select LEDS_CLASS |
230 | select LEDS_TRIGGERS | ||
230 | select BITREVERSE | 231 | select BITREVERSE |
231 | help | 232 | help |
232 | Say Y here if you want to use the IR remote functionality found | 233 | Say Y here if you want to use the IR remote functionality found |
diff --git a/drivers/input/mouse/lifebook.c b/drivers/input/mouse/lifebook.c index 5e6308694408..82811558ec33 100644 --- a/drivers/input/mouse/lifebook.c +++ b/drivers/input/mouse/lifebook.c | |||
@@ -107,8 +107,7 @@ static const struct dmi_system_id lifebook_dmi_table[] = { | |||
107 | .matches = { | 107 | .matches = { |
108 | DMI_MATCH(DMI_PRODUCT_NAME, "CF-72"), | 108 | DMI_MATCH(DMI_PRODUCT_NAME, "CF-72"), |
109 | }, | 109 | }, |
110 | .callback = lifebook_set_serio_phys, | 110 | .callback = lifebook_set_6byte_proto, |
111 | .driver_data = "isa0060/serio3", | ||
112 | }, | 111 | }, |
113 | { | 112 | { |
114 | .ident = "Lifebook B142", | 113 | .ident = "Lifebook B142", |
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c index 690aed905436..07c53798301a 100644 --- a/drivers/input/mouse/psmouse-base.c +++ b/drivers/input/mouse/psmouse-base.c | |||
@@ -581,7 +581,7 @@ static int cortron_detect(struct psmouse *psmouse, bool set_properties) | |||
581 | static int psmouse_extensions(struct psmouse *psmouse, | 581 | static int psmouse_extensions(struct psmouse *psmouse, |
582 | unsigned int max_proto, bool set_properties) | 582 | unsigned int max_proto, bool set_properties) |
583 | { | 583 | { |
584 | bool synaptics_hardware = true; | 584 | bool synaptics_hardware = false; |
585 | 585 | ||
586 | /* | 586 | /* |
587 | * We always check for lifebook because it does not disturb mouse | 587 | * We always check for lifebook because it does not disturb mouse |
@@ -1673,7 +1673,7 @@ static int psmouse_get_maxproto(char *buffer, struct kernel_param *kp) | |||
1673 | { | 1673 | { |
1674 | int type = *((unsigned int *)kp->arg); | 1674 | int type = *((unsigned int *)kp->arg); |
1675 | 1675 | ||
1676 | return sprintf(buffer, "%s\n", psmouse_protocol_by_type(type)->name); | 1676 | return sprintf(buffer, "%s", psmouse_protocol_by_type(type)->name); |
1677 | } | 1677 | } |
1678 | 1678 | ||
1679 | static int __init psmouse_init(void) | 1679 | static int __init psmouse_init(void) |
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c index a31578170ccc..1df02d25aca5 100644 --- a/drivers/input/serio/i8042.c +++ b/drivers/input/serio/i8042.c | |||
@@ -836,17 +836,32 @@ static int i8042_controller_selftest(void) | |||
836 | static int i8042_controller_init(void) | 836 | static int i8042_controller_init(void) |
837 | { | 837 | { |
838 | unsigned long flags; | 838 | unsigned long flags; |
839 | int n = 0; | ||
840 | unsigned char ctr[2]; | ||
839 | 841 | ||
840 | /* | 842 | /* |
841 | * Save the CTR for restoral on unload / reboot. | 843 | * Save the CTR for restore on unload / reboot. |
842 | */ | 844 | */ |
843 | 845 | ||
844 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { | 846 | do { |
845 | printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); | 847 | if (n >= 10) { |
846 | return -EIO; | 848 | printk(KERN_ERR |
847 | } | 849 | "i8042.c: Unable to get stable CTR read.\n"); |
850 | return -EIO; | ||
851 | } | ||
852 | |||
853 | if (n != 0) | ||
854 | udelay(50); | ||
855 | |||
856 | if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) { | ||
857 | printk(KERN_ERR | ||
858 | "i8042.c: Can't read CTR while initializing i8042.\n"); | ||
859 | return -EIO; | ||
860 | } | ||
848 | 861 | ||
849 | i8042_initial_ctr = i8042_ctr; | 862 | } while (n < 2 || ctr[0] != ctr[1]); |
863 | |||
864 | i8042_initial_ctr = i8042_ctr = ctr[0]; | ||
850 | 865 | ||
851 | /* | 866 | /* |
852 | * Disable the keyboard interface and interrupt. | 867 | * Disable the keyboard interface and interrupt. |
@@ -895,6 +910,12 @@ static int i8042_controller_init(void) | |||
895 | return -EIO; | 910 | return -EIO; |
896 | } | 911 | } |
897 | 912 | ||
913 | /* | ||
914 | * Flush whatever accumulated while we were disabling keyboard port. | ||
915 | */ | ||
916 | |||
917 | i8042_flush(); | ||
918 | |||
898 | return 0; | 919 | return 0; |
899 | } | 920 | } |
900 | 921 | ||
@@ -914,7 +935,7 @@ static void i8042_controller_reset(void) | |||
914 | i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; | 935 | i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; |
915 | i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); | 936 | i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); |
916 | 937 | ||
917 | if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) | 938 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) |
918 | printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n"); | 939 | printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n"); |
919 | 940 | ||
920 | /* | 941 | /* |
diff --git a/drivers/isdn/hardware/eicon/maintidi.c b/drivers/isdn/hardware/eicon/maintidi.c index 23960cb6eaab..41c26e756452 100644 --- a/drivers/isdn/hardware/eicon/maintidi.c +++ b/drivers/isdn/hardware/eicon/maintidi.c | |||
@@ -959,8 +959,9 @@ static int process_idi_event (diva_strace_context_t* pLib, | |||
959 | } | 959 | } |
960 | if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) { | 960 | if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) { |
961 | char* tmp = &pLib->lines[0].pInterface->Layer2[0]; | 961 | char* tmp = &pLib->lines[0].pInterface->Layer2[0]; |
962 | dword l2_state; | 962 | dword l2_state; |
963 | diva_strace_read_uint (pVar, &l2_state); | 963 | if (diva_strace_read_uint(pVar, &l2_state)) |
964 | return -1; | ||
964 | 965 | ||
965 | switch (l2_state) { | 966 | switch (l2_state) { |
966 | case 0: | 967 | case 0: |
diff --git a/drivers/isdn/hardware/eicon/message.c b/drivers/isdn/hardware/eicon/message.c index 27d5dd68f4fb..ae89fb89da64 100644 --- a/drivers/isdn/hardware/eicon/message.c +++ b/drivers/isdn/hardware/eicon/message.c | |||
@@ -2692,7 +2692,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
2692 | if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS) | 2692 | if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS) |
2693 | || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) | 2693 | || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) |
2694 | { | 2694 | { |
2695 | len = (byte)(&(((T30_INFO *) 0)->universal_6)); | 2695 | len = offsetof(T30_INFO, universal_6); |
2696 | fax_info_change = false; | 2696 | fax_info_change = false; |
2697 | if (ncpi->length >= 4) | 2697 | if (ncpi->length >= 4) |
2698 | { | 2698 | { |
@@ -2754,7 +2754,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
2754 | for (i = 0; i < w; i++) | 2754 | for (i = 0; i < w; i++) |
2755 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i]; | 2755 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i]; |
2756 | ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0; | 2756 | ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0; |
2757 | len = (byte)(((T30_INFO *) 0)->station_id + 20); | 2757 | len = offsetof(T30_INFO, station_id) + 20; |
2758 | w = fax_parms[5].length; | 2758 | w = fax_parms[5].length; |
2759 | if (w > 20) | 2759 | if (w > 20) |
2760 | w = 20; | 2760 | w = 20; |
@@ -2788,7 +2788,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
2788 | } | 2788 | } |
2789 | else | 2789 | else |
2790 | { | 2790 | { |
2791 | len = (byte)(&(((T30_INFO *) 0)->universal_6)); | 2791 | len = offsetof(T30_INFO, universal_6); |
2792 | } | 2792 | } |
2793 | fax_info_change = true; | 2793 | fax_info_change = true; |
2794 | 2794 | ||
@@ -2892,7 +2892,7 @@ static byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
2892 | && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF) | 2892 | && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF) |
2893 | && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP)) | 2893 | && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP)) |
2894 | { | 2894 | { |
2895 | len = ((byte)(((T30_INFO *) 0)->station_id + 20)); | 2895 | len = offsetof(T30_INFO, station_id) + 20; |
2896 | if (plci->fax_connect_info_length < len) | 2896 | if (plci->fax_connect_info_length < len) |
2897 | { | 2897 | { |
2898 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; | 2898 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; |
@@ -3802,7 +3802,7 @@ static byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a, | |||
3802 | break; | 3802 | break; |
3803 | } | 3803 | } |
3804 | ncpi = &m_parms[1]; | 3804 | ncpi = &m_parms[1]; |
3805 | len = ((byte)(((T30_INFO *) 0)->station_id + 20)); | 3805 | len = offsetof(T30_INFO, station_id) + 20; |
3806 | if (plci->fax_connect_info_length < len) | 3806 | if (plci->fax_connect_info_length < len) |
3807 | { | 3807 | { |
3808 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; | 3808 | ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; |
@@ -6844,7 +6844,7 @@ static void nl_ind(PLCI *plci) | |||
6844 | if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1]) | 6844 | if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1]) |
6845 | & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD))) | 6845 | & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD))) |
6846 | { | 6846 | { |
6847 | i = ((word)(((T30_INFO *) 0)->station_id + 20)) + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len; | 6847 | i = offsetof(T30_INFO, station_id) + 20 + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len; |
6848 | while (i < plci->NL.RBuffer->length) | 6848 | while (i < plci->NL.RBuffer->length) |
6849 | plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++]; | 6849 | plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++]; |
6850 | } | 6850 | } |
@@ -7236,7 +7236,7 @@ static void nl_ind(PLCI *plci) | |||
7236 | { | 7236 | { |
7237 | plci->RData[1].P = plci->RData[0].P; | 7237 | plci->RData[1].P = plci->RData[0].P; |
7238 | plci->RData[1].PLength = plci->RData[0].PLength; | 7238 | plci->RData[1].PLength = plci->RData[0].PLength; |
7239 | plci->RData[0].P = v120_header_buffer + (-((int) v120_header_buffer) & 3); | 7239 | plci->RData[0].P = v120_header_buffer + (-((unsigned long)v120_header_buffer) & 3); |
7240 | if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1)) | 7240 | if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1)) |
7241 | plci->RData[0].PLength = 1; | 7241 | plci->RData[0].PLength = 1; |
7242 | else | 7242 | else |
@@ -8473,7 +8473,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp) | |||
8473 | fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING; | 8473 | fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING; |
8474 | } | 8474 | } |
8475 | len = nlc[0]; | 8475 | len = nlc[0]; |
8476 | pos = ((byte)(((T30_INFO *) 0)->station_id + 20)); | 8476 | pos = offsetof(T30_INFO, station_id) + 20; |
8477 | if (pos < plci->fax_connect_info_length) | 8477 | if (pos < plci->fax_connect_info_length) |
8478 | { | 8478 | { |
8479 | for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--) | 8479 | for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--) |
@@ -8525,7 +8525,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp) | |||
8525 | } | 8525 | } |
8526 | 8526 | ||
8527 | PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits); | 8527 | PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits); |
8528 | len = ((byte)(((T30_INFO *) 0)->station_id + 20)); | 8528 | len = offsetof(T30_INFO, station_id) + 20; |
8529 | for (i = 0; i < len; i++) | 8529 | for (i = 0; i < len; i++) |
8530 | plci->fax_connect_info_buffer[i] = nlc[1+i]; | 8530 | plci->fax_connect_info_buffer[i] = nlc[1+i]; |
8531 | ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0; | 8531 | ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0; |
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c index faed794cf75a..a6624ad252c5 100644 --- a/drivers/isdn/hardware/mISDN/hfcmulti.c +++ b/drivers/isdn/hardware/mISDN/hfcmulti.c | |||
@@ -5481,7 +5481,7 @@ HFCmulti_init(void) | |||
5481 | if (err) { | 5481 | if (err) { |
5482 | printk(KERN_ERR "error registering embedded driver: " | 5482 | printk(KERN_ERR "error registering embedded driver: " |
5483 | "%x\n", err); | 5483 | "%x\n", err); |
5484 | return -err; | 5484 | return err; |
5485 | } | 5485 | } |
5486 | HFC_cnt++; | 5486 | HFC_cnt++; |
5487 | printk(KERN_INFO "%d devices registered\n", HFC_cnt); | 5487 | printk(KERN_INFO "%d devices registered\n", HFC_cnt); |
diff --git a/drivers/isdn/hisax/amd7930_fn.c b/drivers/isdn/hisax/amd7930_fn.c index bf526a7a63af..d6fdf1f66754 100644 --- a/drivers/isdn/hisax/amd7930_fn.c +++ b/drivers/isdn/hisax/amd7930_fn.c | |||
@@ -594,6 +594,7 @@ Amd7930_l1hw(struct PStack *st, int pr, void *arg) | |||
594 | if (cs->debug & L1_DEB_WARN) | 594 | if (cs->debug & L1_DEB_WARN) |
595 | debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen"); | 595 | debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen"); |
596 | skb_queue_tail(&cs->sq, skb); | 596 | skb_queue_tail(&cs->sq, skb); |
597 | spin_unlock_irqrestore(&cs->lock, flags); | ||
597 | break; | 598 | break; |
598 | } | 599 | } |
599 | if (cs->debug & DEB_DLOG_HEX) | 600 | if (cs->debug & DEB_DLOG_HEX) |
diff --git a/drivers/isdn/hisax/diva.c b/drivers/isdn/hisax/diva.c index 018bd293e580..0b0c2e5d806b 100644 --- a/drivers/isdn/hisax/diva.c +++ b/drivers/isdn/hisax/diva.c | |||
@@ -382,7 +382,7 @@ MemwaitforXFW(struct IsdnCardState *cs, int hscx) | |||
382 | { | 382 | { |
383 | int to = 50; | 383 | int to = 50; |
384 | 384 | ||
385 | while ((!(MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { | 385 | while (((MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) { |
386 | udelay(1); | 386 | udelay(1); |
387 | to--; | 387 | to--; |
388 | } | 388 | } |
diff --git a/drivers/isdn/hisax/elsa_ser.c b/drivers/isdn/hisax/elsa_ser.c index f181db464392..1657bba7879e 100644 --- a/drivers/isdn/hisax/elsa_ser.c +++ b/drivers/isdn/hisax/elsa_ser.c | |||
@@ -477,62 +477,62 @@ static void | |||
477 | modem_set_init(struct IsdnCardState *cs) { | 477 | modem_set_init(struct IsdnCardState *cs) { |
478 | int timeout; | 478 | int timeout; |
479 | 479 | ||
480 | #define RCV_DELAY 20000 | 480 | #define RCV_DELAY 20 |
481 | modem_write_cmd(cs, MInit_1, strlen(MInit_1)); | 481 | modem_write_cmd(cs, MInit_1, strlen(MInit_1)); |
482 | timeout = 1000; | 482 | timeout = 1000; |
483 | while(timeout-- && cs->hw.elsa.transcnt) | 483 | while(timeout-- && cs->hw.elsa.transcnt) |
484 | udelay(1000); | 484 | udelay(1000); |
485 | debugl1(cs, "msi tout=%d", timeout); | 485 | debugl1(cs, "msi tout=%d", timeout); |
486 | udelay(RCV_DELAY); | 486 | mdelay(RCV_DELAY); |
487 | modem_write_cmd(cs, MInit_2, strlen(MInit_2)); | 487 | modem_write_cmd(cs, MInit_2, strlen(MInit_2)); |
488 | timeout = 1000; | 488 | timeout = 1000; |
489 | while(timeout-- && cs->hw.elsa.transcnt) | 489 | while(timeout-- && cs->hw.elsa.transcnt) |
490 | udelay(1000); | 490 | udelay(1000); |
491 | debugl1(cs, "msi tout=%d", timeout); | 491 | debugl1(cs, "msi tout=%d", timeout); |
492 | udelay(RCV_DELAY); | 492 | mdelay(RCV_DELAY); |
493 | modem_write_cmd(cs, MInit_3, strlen(MInit_3)); | 493 | modem_write_cmd(cs, MInit_3, strlen(MInit_3)); |
494 | timeout = 1000; | 494 | timeout = 1000; |
495 | while(timeout-- && cs->hw.elsa.transcnt) | 495 | while(timeout-- && cs->hw.elsa.transcnt) |
496 | udelay(1000); | 496 | udelay(1000); |
497 | debugl1(cs, "msi tout=%d", timeout); | 497 | debugl1(cs, "msi tout=%d", timeout); |
498 | udelay(RCV_DELAY); | 498 | mdelay(RCV_DELAY); |
499 | modem_write_cmd(cs, MInit_4, strlen(MInit_4)); | 499 | modem_write_cmd(cs, MInit_4, strlen(MInit_4)); |
500 | timeout = 1000; | 500 | timeout = 1000; |
501 | while(timeout-- && cs->hw.elsa.transcnt) | 501 | while(timeout-- && cs->hw.elsa.transcnt) |
502 | udelay(1000); | 502 | udelay(1000); |
503 | debugl1(cs, "msi tout=%d", timeout); | 503 | debugl1(cs, "msi tout=%d", timeout); |
504 | udelay(RCV_DELAY ); | 504 | mdelay(RCV_DELAY); |
505 | modem_write_cmd(cs, MInit_5, strlen(MInit_5)); | 505 | modem_write_cmd(cs, MInit_5, strlen(MInit_5)); |
506 | timeout = 1000; | 506 | timeout = 1000; |
507 | while(timeout-- && cs->hw.elsa.transcnt) | 507 | while(timeout-- && cs->hw.elsa.transcnt) |
508 | udelay(1000); | 508 | udelay(1000); |
509 | debugl1(cs, "msi tout=%d", timeout); | 509 | debugl1(cs, "msi tout=%d", timeout); |
510 | udelay(RCV_DELAY); | 510 | mdelay(RCV_DELAY); |
511 | modem_write_cmd(cs, MInit_6, strlen(MInit_6)); | 511 | modem_write_cmd(cs, MInit_6, strlen(MInit_6)); |
512 | timeout = 1000; | 512 | timeout = 1000; |
513 | while(timeout-- && cs->hw.elsa.transcnt) | 513 | while(timeout-- && cs->hw.elsa.transcnt) |
514 | udelay(1000); | 514 | udelay(1000); |
515 | debugl1(cs, "msi tout=%d", timeout); | 515 | debugl1(cs, "msi tout=%d", timeout); |
516 | udelay(RCV_DELAY); | 516 | mdelay(RCV_DELAY); |
517 | modem_write_cmd(cs, MInit_7, strlen(MInit_7)); | 517 | modem_write_cmd(cs, MInit_7, strlen(MInit_7)); |
518 | timeout = 1000; | 518 | timeout = 1000; |
519 | while(timeout-- && cs->hw.elsa.transcnt) | 519 | while(timeout-- && cs->hw.elsa.transcnt) |
520 | udelay(1000); | 520 | udelay(1000); |
521 | debugl1(cs, "msi tout=%d", timeout); | 521 | debugl1(cs, "msi tout=%d", timeout); |
522 | udelay(RCV_DELAY); | 522 | mdelay(RCV_DELAY); |
523 | } | 523 | } |
524 | 524 | ||
525 | static void | 525 | static void |
526 | modem_set_dial(struct IsdnCardState *cs, int outgoing) { | 526 | modem_set_dial(struct IsdnCardState *cs, int outgoing) { |
527 | int timeout; | 527 | int timeout; |
528 | #define RCV_DELAY 20000 | 528 | #define RCV_DELAY 20 |
529 | 529 | ||
530 | modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800)); | 530 | modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800)); |
531 | timeout = 1000; | 531 | timeout = 1000; |
532 | while(timeout-- && cs->hw.elsa.transcnt) | 532 | while(timeout-- && cs->hw.elsa.transcnt) |
533 | udelay(1000); | 533 | udelay(1000); |
534 | debugl1(cs, "msi tout=%d", timeout); | 534 | debugl1(cs, "msi tout=%d", timeout); |
535 | udelay(RCV_DELAY); | 535 | mdelay(RCV_DELAY); |
536 | if (outgoing) | 536 | if (outgoing) |
537 | modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout)); | 537 | modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout)); |
538 | else | 538 | else |
@@ -541,7 +541,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) { | |||
541 | while(timeout-- && cs->hw.elsa.transcnt) | 541 | while(timeout-- && cs->hw.elsa.transcnt) |
542 | udelay(1000); | 542 | udelay(1000); |
543 | debugl1(cs, "msi tout=%d", timeout); | 543 | debugl1(cs, "msi tout=%d", timeout); |
544 | udelay(RCV_DELAY); | 544 | mdelay(RCV_DELAY); |
545 | } | 545 | } |
546 | 546 | ||
547 | static void | 547 | static void |
diff --git a/drivers/isdn/hisax/hfc_usb.c b/drivers/isdn/hisax/hfc_usb.c index 9de54202c90c..a420b64472e3 100644 --- a/drivers/isdn/hisax/hfc_usb.c +++ b/drivers/isdn/hisax/hfc_usb.c | |||
@@ -817,8 +817,8 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish) | |||
817 | } | 817 | } |
818 | /* we have a complete hdlc packet */ | 818 | /* we have a complete hdlc packet */ |
819 | if (finish) { | 819 | if (finish) { |
820 | if ((!fifo->skbuff->data[fifo->skbuff->len - 1]) | 820 | if (fifo->skbuff->len > 3 && |
821 | && (fifo->skbuff->len > 3)) { | 821 | !fifo->skbuff->data[fifo->skbuff->len - 1]) { |
822 | 822 | ||
823 | if (fifon == HFCUSB_D_RX) { | 823 | if (fifon == HFCUSB_D_RX) { |
824 | DBG(HFCUSB_DBG_DCHANNEL, | 824 | DBG(HFCUSB_DBG_DCHANNEL, |
diff --git a/drivers/isdn/hisax/hscx_irq.c b/drivers/isdn/hisax/hscx_irq.c index 7b1ad5e4ecda..2387d76c721a 100644 --- a/drivers/isdn/hisax/hscx_irq.c +++ b/drivers/isdn/hisax/hscx_irq.c | |||
@@ -32,7 +32,7 @@ waitforXFW(struct IsdnCardState *cs, int hscx) | |||
32 | { | 32 | { |
33 | int to = 50; | 33 | int to = 50; |
34 | 34 | ||
35 | while ((!(READHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { | 35 | while (((READHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) { |
36 | udelay(1); | 36 | udelay(1); |
37 | to--; | 37 | to--; |
38 | } | 38 | } |
diff --git a/drivers/isdn/hisax/icc.c b/drivers/isdn/hisax/icc.c index 9aba646ba221..c80cbb8a2ef9 100644 --- a/drivers/isdn/hisax/icc.c +++ b/drivers/isdn/hisax/icc.c | |||
@@ -468,6 +468,7 @@ ICC_l1hw(struct PStack *st, int pr, void *arg) | |||
468 | if (cs->debug & L1_DEB_WARN) | 468 | if (cs->debug & L1_DEB_WARN) |
469 | debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); | 469 | debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); |
470 | skb_queue_tail(&cs->sq, skb); | 470 | skb_queue_tail(&cs->sq, skb); |
471 | spin_unlock_irqrestore(&cs->lock, flags); | ||
471 | break; | 472 | break; |
472 | } | 473 | } |
473 | if (cs->debug & DEB_DLOG_HEX) | 474 | if (cs->debug & DEB_DLOG_HEX) |
diff --git a/drivers/isdn/i4l/isdn_net.h b/drivers/isdn/i4l/isdn_net.h index 74032d0881ef..7511f08effa5 100644 --- a/drivers/isdn/i4l/isdn_net.h +++ b/drivers/isdn/i4l/isdn_net.h | |||
@@ -83,19 +83,19 @@ static __inline__ isdn_net_local * isdn_net_get_locked_lp(isdn_net_dev *nd) | |||
83 | 83 | ||
84 | spin_lock_irqsave(&nd->queue_lock, flags); | 84 | spin_lock_irqsave(&nd->queue_lock, flags); |
85 | lp = nd->queue; /* get lp on top of queue */ | 85 | lp = nd->queue; /* get lp on top of queue */ |
86 | spin_lock(&nd->queue->xmit_lock); | ||
87 | while (isdn_net_lp_busy(nd->queue)) { | 86 | while (isdn_net_lp_busy(nd->queue)) { |
88 | spin_unlock(&nd->queue->xmit_lock); | ||
89 | nd->queue = nd->queue->next; | 87 | nd->queue = nd->queue->next; |
90 | if (nd->queue == lp) { /* not found -- should never happen */ | 88 | if (nd->queue == lp) { /* not found -- should never happen */ |
91 | lp = NULL; | 89 | lp = NULL; |
92 | goto errout; | 90 | goto errout; |
93 | } | 91 | } |
94 | spin_lock(&nd->queue->xmit_lock); | ||
95 | } | 92 | } |
96 | lp = nd->queue; | 93 | lp = nd->queue; |
97 | nd->queue = nd->queue->next; | 94 | nd->queue = nd->queue->next; |
95 | spin_unlock_irqrestore(&nd->queue_lock, flags); | ||
96 | spin_lock(&lp->xmit_lock); | ||
98 | local_bh_disable(); | 97 | local_bh_disable(); |
98 | return lp; | ||
99 | errout: | 99 | errout: |
100 | spin_unlock_irqrestore(&nd->queue_lock, flags); | 100 | spin_unlock_irqrestore(&nd->queue_lock, flags); |
101 | return lp; | 101 | return lp; |
diff --git a/drivers/isdn/i4l/isdn_ppp.c b/drivers/isdn/i4l/isdn_ppp.c index 2d14b64202a3..642d5aaf53ce 100644 --- a/drivers/isdn/i4l/isdn_ppp.c +++ b/drivers/isdn/i4l/isdn_ppp.c | |||
@@ -1535,10 +1535,8 @@ static int isdn_ppp_mp_bundle_array_init(void) | |||
1535 | int sz = ISDN_MAX_CHANNELS*sizeof(ippp_bundle); | 1535 | int sz = ISDN_MAX_CHANNELS*sizeof(ippp_bundle); |
1536 | if( (isdn_ppp_bundle_arr = kzalloc(sz, GFP_KERNEL)) == NULL ) | 1536 | if( (isdn_ppp_bundle_arr = kzalloc(sz, GFP_KERNEL)) == NULL ) |
1537 | return -ENOMEM; | 1537 | return -ENOMEM; |
1538 | for (i = 0; i < ISDN_MAX_CHANNELS; i++) { | 1538 | for( i = 0; i < ISDN_MAX_CHANNELS; i++ ) |
1539 | spin_lock_init(&isdn_ppp_bundle_arr[i].lock); | 1539 | spin_lock_init(&isdn_ppp_bundle_arr[i].lock); |
1540 | skb_queue_head_init(&isdn_ppp_bundle_arr[i].frags); | ||
1541 | } | ||
1542 | return 0; | 1540 | return 0; |
1543 | } | 1541 | } |
1544 | 1542 | ||
@@ -1571,7 +1569,7 @@ static int isdn_ppp_mp_init( isdn_net_local * lp, ippp_bundle * add_to ) | |||
1571 | if ((lp->netdev->pb = isdn_ppp_mp_bundle_alloc()) == NULL) | 1569 | if ((lp->netdev->pb = isdn_ppp_mp_bundle_alloc()) == NULL) |
1572 | return -ENOMEM; | 1570 | return -ENOMEM; |
1573 | lp->next = lp->last = lp; /* nobody else in a queue */ | 1571 | lp->next = lp->last = lp; /* nobody else in a queue */ |
1574 | skb_queue_head_init(&lp->netdev->pb->frags); | 1572 | lp->netdev->pb->frags = NULL; |
1575 | lp->netdev->pb->frames = 0; | 1573 | lp->netdev->pb->frames = 0; |
1576 | lp->netdev->pb->seq = UINT_MAX; | 1574 | lp->netdev->pb->seq = UINT_MAX; |
1577 | } | 1575 | } |
@@ -1583,29 +1581,28 @@ static int isdn_ppp_mp_init( isdn_net_local * lp, ippp_bundle * add_to ) | |||
1583 | 1581 | ||
1584 | static u32 isdn_ppp_mp_get_seq( int short_seq, | 1582 | static u32 isdn_ppp_mp_get_seq( int short_seq, |
1585 | struct sk_buff * skb, u32 last_seq ); | 1583 | struct sk_buff * skb, u32 last_seq ); |
1586 | static void isdn_ppp_mp_discard(ippp_bundle *mp, struct sk_buff *from, | 1584 | static struct sk_buff * isdn_ppp_mp_discard( ippp_bundle * mp, |
1587 | struct sk_buff *to); | 1585 | struct sk_buff * from, struct sk_buff * to ); |
1588 | static void isdn_ppp_mp_reassembly(isdn_net_dev *net_dev, isdn_net_local *lp, | 1586 | static void isdn_ppp_mp_reassembly( isdn_net_dev * net_dev, isdn_net_local * lp, |
1589 | struct sk_buff *from, struct sk_buff *to, | 1587 | struct sk_buff * from, struct sk_buff * to ); |
1590 | u32 lastseq); | 1588 | static void isdn_ppp_mp_free_skb( ippp_bundle * mp, struct sk_buff * skb ); |
1591 | static void isdn_ppp_mp_free_skb(ippp_bundle *mp, struct sk_buff *skb); | ||
1592 | static void isdn_ppp_mp_print_recv_pkt( int slot, struct sk_buff * skb ); | 1589 | static void isdn_ppp_mp_print_recv_pkt( int slot, struct sk_buff * skb ); |
1593 | 1590 | ||
1594 | static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, | 1591 | static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, |
1595 | struct sk_buff *skb) | 1592 | struct sk_buff *skb) |
1596 | { | 1593 | { |
1597 | struct sk_buff *newfrag, *frag, *start, *nextf; | ||
1598 | u32 newseq, minseq, thisseq; | ||
1599 | isdn_mppp_stats *stats; | ||
1600 | struct ippp_struct *is; | 1594 | struct ippp_struct *is; |
1595 | isdn_net_local * lpq; | ||
1596 | ippp_bundle * mp; | ||
1597 | isdn_mppp_stats * stats; | ||
1598 | struct sk_buff * newfrag, * frag, * start, *nextf; | ||
1599 | u32 newseq, minseq, thisseq; | ||
1601 | unsigned long flags; | 1600 | unsigned long flags; |
1602 | isdn_net_local *lpq; | ||
1603 | ippp_bundle *mp; | ||
1604 | int slot; | 1601 | int slot; |
1605 | 1602 | ||
1606 | spin_lock_irqsave(&net_dev->pb->lock, flags); | 1603 | spin_lock_irqsave(&net_dev->pb->lock, flags); |
1607 | mp = net_dev->pb; | 1604 | mp = net_dev->pb; |
1608 | stats = &mp->stats; | 1605 | stats = &mp->stats; |
1609 | slot = lp->ppp_slot; | 1606 | slot = lp->ppp_slot; |
1610 | if (slot < 0 || slot >= ISDN_MAX_CHANNELS) { | 1607 | if (slot < 0 || slot >= ISDN_MAX_CHANNELS) { |
1611 | printk(KERN_ERR "%s: lp->ppp_slot(%d)\n", | 1608 | printk(KERN_ERR "%s: lp->ppp_slot(%d)\n", |
@@ -1616,19 +1613,20 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, | |||
1616 | return; | 1613 | return; |
1617 | } | 1614 | } |
1618 | is = ippp_table[slot]; | 1615 | is = ippp_table[slot]; |
1619 | if (++mp->frames > stats->max_queue_len) | 1616 | if( ++mp->frames > stats->max_queue_len ) |
1620 | stats->max_queue_len = mp->frames; | 1617 | stats->max_queue_len = mp->frames; |
1621 | 1618 | ||
1622 | if (is->debug & 0x8) | 1619 | if (is->debug & 0x8) |
1623 | isdn_ppp_mp_print_recv_pkt(lp->ppp_slot, skb); | 1620 | isdn_ppp_mp_print_recv_pkt(lp->ppp_slot, skb); |
1624 | 1621 | ||
1625 | newseq = isdn_ppp_mp_get_seq(is->mpppcfg & SC_IN_SHORT_SEQ, | 1622 | newseq = isdn_ppp_mp_get_seq(is->mpppcfg & SC_IN_SHORT_SEQ, |
1626 | skb, is->last_link_seqno); | 1623 | skb, is->last_link_seqno); |
1624 | |||
1627 | 1625 | ||
1628 | /* if this packet seq # is less than last already processed one, | 1626 | /* if this packet seq # is less than last already processed one, |
1629 | * toss it right away, but check for sequence start case first | 1627 | * toss it right away, but check for sequence start case first |
1630 | */ | 1628 | */ |
1631 | if (mp->seq > MP_LONGSEQ_MAX && (newseq & MP_LONGSEQ_MAXBIT)) { | 1629 | if( mp->seq > MP_LONGSEQ_MAX && (newseq & MP_LONGSEQ_MAXBIT) ) { |
1632 | mp->seq = newseq; /* the first packet: required for | 1630 | mp->seq = newseq; /* the first packet: required for |
1633 | * rfc1990 non-compliant clients -- | 1631 | * rfc1990 non-compliant clients -- |
1634 | * prevents constant packet toss */ | 1632 | * prevents constant packet toss */ |
@@ -1638,7 +1636,7 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, | |||
1638 | spin_unlock_irqrestore(&mp->lock, flags); | 1636 | spin_unlock_irqrestore(&mp->lock, flags); |
1639 | return; | 1637 | return; |
1640 | } | 1638 | } |
1641 | 1639 | ||
1642 | /* find the minimum received sequence number over all links */ | 1640 | /* find the minimum received sequence number over all links */ |
1643 | is->last_link_seqno = minseq = newseq; | 1641 | is->last_link_seqno = minseq = newseq; |
1644 | for (lpq = net_dev->queue;;) { | 1642 | for (lpq = net_dev->queue;;) { |
@@ -1659,31 +1657,22 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, | |||
1659 | * packets */ | 1657 | * packets */ |
1660 | newfrag = skb; | 1658 | newfrag = skb; |
1661 | 1659 | ||
1662 | /* Insert new fragment into the proper sequence slot. */ | 1660 | /* if this new fragment is before the first one, then enqueue it now. */ |
1663 | skb_queue_walk(&mp->frags, frag) { | 1661 | if ((frag = mp->frags) == NULL || MP_LT(newseq, MP_SEQ(frag))) { |
1664 | if (MP_SEQ(frag) == newseq) { | 1662 | newfrag->next = frag; |
1665 | isdn_ppp_mp_free_skb(mp, newfrag); | 1663 | mp->frags = frag = newfrag; |
1666 | newfrag = NULL; | 1664 | newfrag = NULL; |
1667 | break; | 1665 | } |
1668 | } | ||
1669 | if (MP_LT(newseq, MP_SEQ(frag))) { | ||
1670 | __skb_queue_before(&mp->frags, frag, newfrag); | ||
1671 | newfrag = NULL; | ||
1672 | break; | ||
1673 | } | ||
1674 | } | ||
1675 | if (newfrag) | ||
1676 | __skb_queue_tail(&mp->frags, newfrag); | ||
1677 | 1666 | ||
1678 | frag = skb_peek(&mp->frags); | 1667 | start = MP_FLAGS(frag) & MP_BEGIN_FRAG && |
1679 | start = ((MP_FLAGS(frag) & MP_BEGIN_FRAG) && | 1668 | MP_SEQ(frag) == mp->seq ? frag : NULL; |
1680 | (MP_SEQ(frag) == mp->seq)) ? frag : NULL; | ||
1681 | if (!start) | ||
1682 | goto check_overflow; | ||
1683 | 1669 | ||
1684 | /* main fragment traversing loop | 1670 | /* |
1671 | * main fragment traversing loop | ||
1685 | * | 1672 | * |
1686 | * try to accomplish several tasks: | 1673 | * try to accomplish several tasks: |
1674 | * - insert new fragment into the proper sequence slot (once that's done | ||
1675 | * newfrag will be set to NULL) | ||
1687 | * - reassemble any complete fragment sequence (non-null 'start' | 1676 | * - reassemble any complete fragment sequence (non-null 'start' |
1688 | * indicates there is a continguous sequence present) | 1677 | * indicates there is a continguous sequence present) |
1689 | * - discard any incomplete sequences that are below minseq -- due | 1678 | * - discard any incomplete sequences that are below minseq -- due |
@@ -1692,46 +1681,71 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, | |||
1692 | * come to complete such sequence and it should be discarded | 1681 | * come to complete such sequence and it should be discarded |
1693 | * | 1682 | * |
1694 | * loop completes when we accomplished the following tasks: | 1683 | * loop completes when we accomplished the following tasks: |
1684 | * - new fragment is inserted in the proper sequence ('newfrag' is | ||
1685 | * set to NULL) | ||
1695 | * - we hit a gap in the sequence, so no reassembly/processing is | 1686 | * - we hit a gap in the sequence, so no reassembly/processing is |
1696 | * possible ('start' would be set to NULL) | 1687 | * possible ('start' would be set to NULL) |
1697 | * | 1688 | * |
1698 | * algorithm for this code is derived from code in the book | 1689 | * algorithm for this code is derived from code in the book |
1699 | * 'PPP Design And Debugging' by James Carlson (Addison-Wesley) | 1690 | * 'PPP Design And Debugging' by James Carlson (Addison-Wesley) |
1700 | */ | 1691 | */ |
1701 | skb_queue_walk_safe(&mp->frags, frag, nextf) { | 1692 | while (start != NULL || newfrag != NULL) { |
1702 | thisseq = MP_SEQ(frag); | 1693 | |
1703 | 1694 | thisseq = MP_SEQ(frag); | |
1704 | /* check for misplaced start */ | 1695 | nextf = frag->next; |
1705 | if (start != frag && (MP_FLAGS(frag) & MP_BEGIN_FRAG)) { | 1696 | |
1706 | printk(KERN_WARNING"isdn_mppp(seq %d): new " | 1697 | /* drop any duplicate fragments */ |
1707 | "BEGIN flag with no prior END", thisseq); | 1698 | if (newfrag != NULL && thisseq == newseq) { |
1708 | stats->seqerrs++; | 1699 | isdn_ppp_mp_free_skb(mp, newfrag); |
1709 | stats->frame_drops++; | 1700 | newfrag = NULL; |
1710 | isdn_ppp_mp_discard(mp, start, frag); | 1701 | } |
1711 | start = frag; | 1702 | |
1712 | } else if (MP_LE(thisseq, minseq)) { | 1703 | /* insert new fragment before next element if possible. */ |
1713 | if (MP_FLAGS(frag) & MP_BEGIN_FRAG) | 1704 | if (newfrag != NULL && (nextf == NULL || |
1705 | MP_LT(newseq, MP_SEQ(nextf)))) { | ||
1706 | newfrag->next = nextf; | ||
1707 | frag->next = nextf = newfrag; | ||
1708 | newfrag = NULL; | ||
1709 | } | ||
1710 | |||
1711 | if (start != NULL) { | ||
1712 | /* check for misplaced start */ | ||
1713 | if (start != frag && (MP_FLAGS(frag) & MP_BEGIN_FRAG)) { | ||
1714 | printk(KERN_WARNING"isdn_mppp(seq %d): new " | ||
1715 | "BEGIN flag with no prior END", thisseq); | ||
1716 | stats->seqerrs++; | ||
1717 | stats->frame_drops++; | ||
1718 | start = isdn_ppp_mp_discard(mp, start,frag); | ||
1719 | nextf = frag->next; | ||
1720 | } | ||
1721 | } else if (MP_LE(thisseq, minseq)) { | ||
1722 | if (MP_FLAGS(frag) & MP_BEGIN_FRAG) | ||
1714 | start = frag; | 1723 | start = frag; |
1715 | else { | 1724 | else { |
1716 | if (MP_FLAGS(frag) & MP_END_FRAG) | 1725 | if (MP_FLAGS(frag) & MP_END_FRAG) |
1717 | stats->frame_drops++; | 1726 | stats->frame_drops++; |
1718 | __skb_unlink(skb, &mp->frags); | 1727 | if( mp->frags == frag ) |
1728 | mp->frags = nextf; | ||
1719 | isdn_ppp_mp_free_skb(mp, frag); | 1729 | isdn_ppp_mp_free_skb(mp, frag); |
1730 | frag = nextf; | ||
1720 | continue; | 1731 | continue; |
1721 | } | 1732 | } |
1722 | } | 1733 | } |
1723 | 1734 | ||
1724 | /* if we have end fragment, then we have full reassembly | 1735 | /* if start is non-null and we have end fragment, then |
1725 | * sequence -- reassemble and process packet now | 1736 | * we have full reassembly sequence -- reassemble |
1737 | * and process packet now | ||
1726 | */ | 1738 | */ |
1727 | if (MP_FLAGS(frag) & MP_END_FRAG) { | 1739 | if (start != NULL && (MP_FLAGS(frag) & MP_END_FRAG)) { |
1728 | minseq = mp->seq = (thisseq+1) & MP_LONGSEQ_MASK; | 1740 | minseq = mp->seq = (thisseq+1) & MP_LONGSEQ_MASK; |
1729 | /* Reassemble the packet then dispatch it */ | 1741 | /* Reassemble the packet then dispatch it */ |
1730 | isdn_ppp_mp_reassembly(net_dev, lp, start, frag, thisseq); | 1742 | isdn_ppp_mp_reassembly(net_dev, lp, start, nextf); |
1743 | |||
1744 | start = NULL; | ||
1745 | frag = NULL; | ||
1731 | 1746 | ||
1732 | start = NULL; | 1747 | mp->frags = nextf; |
1733 | frag = NULL; | 1748 | } |
1734 | } | ||
1735 | 1749 | ||
1736 | /* check if need to update start pointer: if we just | 1750 | /* check if need to update start pointer: if we just |
1737 | * reassembled the packet and sequence is contiguous | 1751 | * reassembled the packet and sequence is contiguous |
@@ -1742,25 +1756,26 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, | |||
1742 | * below low watermark and set start to the next frag or | 1756 | * below low watermark and set start to the next frag or |
1743 | * clear start ptr. | 1757 | * clear start ptr. |
1744 | */ | 1758 | */ |
1745 | if (nextf != (struct sk_buff *)&mp->frags && | 1759 | if (nextf != NULL && |
1746 | ((thisseq+1) & MP_LONGSEQ_MASK) == MP_SEQ(nextf)) { | 1760 | ((thisseq+1) & MP_LONGSEQ_MASK) == MP_SEQ(nextf)) { |
1747 | /* if we just reassembled and the next one is here, | 1761 | /* if we just reassembled and the next one is here, |
1748 | * then start another reassembly. | 1762 | * then start another reassembly. */ |
1749 | */ | 1763 | |
1750 | if (frag == NULL) { | 1764 | if (frag == NULL) { |
1751 | if (MP_FLAGS(nextf) & MP_BEGIN_FRAG) | 1765 | if (MP_FLAGS(nextf) & MP_BEGIN_FRAG) |
1752 | start = nextf; | 1766 | start = nextf; |
1753 | else { | 1767 | else |
1754 | printk(KERN_WARNING"isdn_mppp(seq %d):" | 1768 | { |
1755 | " END flag with no following " | 1769 | printk(KERN_WARNING"isdn_mppp(seq %d):" |
1756 | "BEGIN", thisseq); | 1770 | " END flag with no following " |
1771 | "BEGIN", thisseq); | ||
1757 | stats->seqerrs++; | 1772 | stats->seqerrs++; |
1758 | } | 1773 | } |
1759 | } | 1774 | } |
1760 | } else { | 1775 | |
1761 | if (nextf != (struct sk_buff *)&mp->frags && | 1776 | } else { |
1762 | frag != NULL && | 1777 | if ( nextf != NULL && frag != NULL && |
1763 | MP_LT(thisseq, minseq)) { | 1778 | MP_LT(thisseq, minseq)) { |
1764 | /* we've got a break in the sequence | 1779 | /* we've got a break in the sequence |
1765 | * and we not at the end yet | 1780 | * and we not at the end yet |
1766 | * and we did not just reassembled | 1781 | * and we did not just reassembled |
@@ -1769,39 +1784,41 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, | |||
1769 | * discard all the frames below low watermark | 1784 | * discard all the frames below low watermark |
1770 | * and start over */ | 1785 | * and start over */ |
1771 | stats->frame_drops++; | 1786 | stats->frame_drops++; |
1772 | isdn_ppp_mp_discard(mp, start, nextf); | 1787 | mp->frags = isdn_ppp_mp_discard(mp,start,nextf); |
1773 | } | 1788 | } |
1774 | /* break in the sequence, no reassembly */ | 1789 | /* break in the sequence, no reassembly */ |
1775 | start = NULL; | 1790 | start = NULL; |
1776 | } | 1791 | } |
1777 | if (!start) | 1792 | |
1778 | break; | 1793 | frag = nextf; |
1779 | } | 1794 | } /* while -- main loop */ |
1780 | 1795 | ||
1781 | check_overflow: | 1796 | if (mp->frags == NULL) |
1797 | mp->frags = frag; | ||
1798 | |||
1782 | /* rather straighforward way to deal with (not very) possible | 1799 | /* rather straighforward way to deal with (not very) possible |
1783 | * queue overflow | 1800 | * queue overflow */ |
1784 | */ | ||
1785 | if (mp->frames > MP_MAX_QUEUE_LEN) { | 1801 | if (mp->frames > MP_MAX_QUEUE_LEN) { |
1786 | stats->overflows++; | 1802 | stats->overflows++; |
1787 | skb_queue_walk_safe(&mp->frags, frag, nextf) { | 1803 | while (mp->frames > MP_MAX_QUEUE_LEN) { |
1788 | if (mp->frames <= MP_MAX_QUEUE_LEN) | 1804 | frag = mp->frags->next; |
1789 | break; | 1805 | isdn_ppp_mp_free_skb(mp, mp->frags); |
1790 | __skb_unlink(frag, &mp->frags); | 1806 | mp->frags = frag; |
1791 | isdn_ppp_mp_free_skb(mp, frag); | ||
1792 | } | 1807 | } |
1793 | } | 1808 | } |
1794 | spin_unlock_irqrestore(&mp->lock, flags); | 1809 | spin_unlock_irqrestore(&mp->lock, flags); |
1795 | } | 1810 | } |
1796 | 1811 | ||
1797 | static void isdn_ppp_mp_cleanup(isdn_net_local *lp) | 1812 | static void isdn_ppp_mp_cleanup( isdn_net_local * lp ) |
1798 | { | 1813 | { |
1799 | struct sk_buff *skb, *tmp; | 1814 | struct sk_buff * frag = lp->netdev->pb->frags; |
1800 | 1815 | struct sk_buff * nextfrag; | |
1801 | skb_queue_walk_safe(&lp->netdev->pb->frags, skb, tmp) { | 1816 | while( frag ) { |
1802 | __skb_unlink(skb, &lp->netdev->pb->frags); | 1817 | nextfrag = frag->next; |
1803 | isdn_ppp_mp_free_skb(lp->netdev->pb, skb); | 1818 | isdn_ppp_mp_free_skb(lp->netdev->pb, frag); |
1804 | } | 1819 | frag = nextfrag; |
1820 | } | ||
1821 | lp->netdev->pb->frags = NULL; | ||
1805 | } | 1822 | } |
1806 | 1823 | ||
1807 | static u32 isdn_ppp_mp_get_seq( int short_seq, | 1824 | static u32 isdn_ppp_mp_get_seq( int short_seq, |
@@ -1838,115 +1855,72 @@ static u32 isdn_ppp_mp_get_seq( int short_seq, | |||
1838 | return seq; | 1855 | return seq; |
1839 | } | 1856 | } |
1840 | 1857 | ||
1841 | static void isdn_ppp_mp_discard(ippp_bundle *mp, struct sk_buff *from, | 1858 | struct sk_buff * isdn_ppp_mp_discard( ippp_bundle * mp, |
1842 | struct sk_buff *to) | 1859 | struct sk_buff * from, struct sk_buff * to ) |
1843 | { | 1860 | { |
1844 | if (from) { | 1861 | if( from ) |
1845 | struct sk_buff *skb, *tmp; | 1862 | while (from != to) { |
1846 | int freeing = 0; | 1863 | struct sk_buff * next = from->next; |
1847 | 1864 | isdn_ppp_mp_free_skb(mp, from); | |
1848 | skb_queue_walk_safe(&mp->frags, skb, tmp) { | 1865 | from = next; |
1849 | if (skb == to) | ||
1850 | break; | ||
1851 | if (skb == from) | ||
1852 | freeing = 1; | ||
1853 | if (!freeing) | ||
1854 | continue; | ||
1855 | __skb_unlink(skb, &mp->frags); | ||
1856 | isdn_ppp_mp_free_skb(mp, skb); | ||
1857 | } | 1866 | } |
1858 | } | 1867 | return from; |
1859 | } | ||
1860 | |||
1861 | static unsigned int calc_tot_len(struct sk_buff_head *queue, | ||
1862 | struct sk_buff *from, struct sk_buff *to) | ||
1863 | { | ||
1864 | unsigned int tot_len = 0; | ||
1865 | struct sk_buff *skb; | ||
1866 | int found_start = 0; | ||
1867 | |||
1868 | skb_queue_walk(queue, skb) { | ||
1869 | if (skb == from) | ||
1870 | found_start = 1; | ||
1871 | if (!found_start) | ||
1872 | continue; | ||
1873 | tot_len += skb->len - MP_HEADER_LEN; | ||
1874 | if (skb == to) | ||
1875 | break; | ||
1876 | } | ||
1877 | return tot_len; | ||
1878 | } | 1868 | } |
1879 | 1869 | ||
1880 | /* Reassemble packet using fragments in the reassembly queue from | 1870 | void isdn_ppp_mp_reassembly( isdn_net_dev * net_dev, isdn_net_local * lp, |
1881 | * 'from' until 'to', inclusive. | 1871 | struct sk_buff * from, struct sk_buff * to ) |
1882 | */ | ||
1883 | static void isdn_ppp_mp_reassembly(isdn_net_dev *net_dev, isdn_net_local *lp, | ||
1884 | struct sk_buff *from, struct sk_buff *to, | ||
1885 | u32 lastseq) | ||
1886 | { | 1872 | { |
1887 | ippp_bundle *mp = net_dev->pb; | 1873 | ippp_bundle * mp = net_dev->pb; |
1888 | unsigned int tot_len; | ||
1889 | struct sk_buff *skb; | ||
1890 | int proto; | 1874 | int proto; |
1875 | struct sk_buff * skb; | ||
1876 | unsigned int tot_len; | ||
1891 | 1877 | ||
1892 | if (lp->ppp_slot < 0 || lp->ppp_slot >= ISDN_MAX_CHANNELS) { | 1878 | if (lp->ppp_slot < 0 || lp->ppp_slot >= ISDN_MAX_CHANNELS) { |
1893 | printk(KERN_ERR "%s: lp->ppp_slot(%d) out of range\n", | 1879 | printk(KERN_ERR "%s: lp->ppp_slot(%d) out of range\n", |
1894 | __func__, lp->ppp_slot); | 1880 | __func__, lp->ppp_slot); |
1895 | return; | 1881 | return; |
1896 | } | 1882 | } |
1897 | 1883 | if( MP_FLAGS(from) == (MP_BEGIN_FRAG | MP_END_FRAG) ) { | |
1898 | tot_len = calc_tot_len(&mp->frags, from, to); | 1884 | if( ippp_table[lp->ppp_slot]->debug & 0x40 ) |
1899 | |||
1900 | if (MP_FLAGS(from) == (MP_BEGIN_FRAG | MP_END_FRAG)) { | ||
1901 | if (ippp_table[lp->ppp_slot]->debug & 0x40) | ||
1902 | printk(KERN_DEBUG "isdn_mppp: reassembly: frame %d, " | 1885 | printk(KERN_DEBUG "isdn_mppp: reassembly: frame %d, " |
1903 | "len %d\n", MP_SEQ(from), from->len); | 1886 | "len %d\n", MP_SEQ(from), from->len ); |
1904 | skb = from; | 1887 | skb = from; |
1905 | skb_pull(skb, MP_HEADER_LEN); | 1888 | skb_pull(skb, MP_HEADER_LEN); |
1906 | __skb_unlink(skb, &mp->frags); | ||
1907 | mp->frames--; | 1889 | mp->frames--; |
1908 | } else { | 1890 | } else { |
1909 | struct sk_buff *walk, *tmp; | 1891 | struct sk_buff * frag; |
1910 | int found_start = 0; | 1892 | int n; |
1911 | 1893 | ||
1912 | if (ippp_table[lp->ppp_slot]->debug & 0x40) | 1894 | for(tot_len=n=0, frag=from; frag != to; frag=frag->next, n++) |
1913 | printk(KERN_DEBUG"isdn_mppp: reassembling frames %d " | 1895 | tot_len += frag->len - MP_HEADER_LEN; |
1914 | "to %d, len %d\n", MP_SEQ(from), lastseq, | ||
1915 | tot_len); | ||
1916 | 1896 | ||
1917 | skb = dev_alloc_skb(tot_len); | 1897 | if( ippp_table[lp->ppp_slot]->debug & 0x40 ) |
1918 | if (!skb) | 1898 | printk(KERN_DEBUG"isdn_mppp: reassembling frames %d " |
1899 | "to %d, len %d\n", MP_SEQ(from), | ||
1900 | (MP_SEQ(from)+n-1) & MP_LONGSEQ_MASK, tot_len ); | ||
1901 | if( (skb = dev_alloc_skb(tot_len)) == NULL ) { | ||
1919 | printk(KERN_ERR "isdn_mppp: cannot allocate sk buff " | 1902 | printk(KERN_ERR "isdn_mppp: cannot allocate sk buff " |
1920 | "of size %d\n", tot_len); | 1903 | "of size %d\n", tot_len); |
1921 | 1904 | isdn_ppp_mp_discard(mp, from, to); | |
1922 | found_start = 0; | 1905 | return; |
1923 | skb_queue_walk_safe(&mp->frags, walk, tmp) { | 1906 | } |
1924 | if (walk == from) | ||
1925 | found_start = 1; | ||
1926 | if (!found_start) | ||
1927 | continue; | ||
1928 | 1907 | ||
1929 | if (skb) { | 1908 | while( from != to ) { |
1930 | unsigned int len = walk->len - MP_HEADER_LEN; | 1909 | unsigned int len = from->len - MP_HEADER_LEN; |
1931 | skb_copy_from_linear_data_offset(walk, MP_HEADER_LEN, | ||
1932 | skb_put(skb, len), | ||
1933 | len); | ||
1934 | } | ||
1935 | __skb_unlink(walk, &mp->frags); | ||
1936 | isdn_ppp_mp_free_skb(mp, walk); | ||
1937 | 1910 | ||
1938 | if (walk == to) | 1911 | skb_copy_from_linear_data_offset(from, MP_HEADER_LEN, |
1939 | break; | 1912 | skb_put(skb,len), |
1913 | len); | ||
1914 | frag = from->next; | ||
1915 | isdn_ppp_mp_free_skb(mp, from); | ||
1916 | from = frag; | ||
1940 | } | 1917 | } |
1941 | } | 1918 | } |
1942 | if (!skb) | ||
1943 | return; | ||
1944 | |||
1945 | proto = isdn_ppp_strip_proto(skb); | 1919 | proto = isdn_ppp_strip_proto(skb); |
1946 | isdn_ppp_push_higher(net_dev, lp, skb, proto); | 1920 | isdn_ppp_push_higher(net_dev, lp, skb, proto); |
1947 | } | 1921 | } |
1948 | 1922 | ||
1949 | static void isdn_ppp_mp_free_skb(ippp_bundle *mp, struct sk_buff *skb) | 1923 | static void isdn_ppp_mp_free_skb(ippp_bundle * mp, struct sk_buff * skb) |
1950 | { | 1924 | { |
1951 | dev_kfree_skb(skb); | 1925 | dev_kfree_skb(skb); |
1952 | mp->frames--; | 1926 | mp->frames--; |
diff --git a/drivers/isdn/mISDN/stack.c b/drivers/isdn/mISDN/stack.c index 3e1532a180ff..0d05ec43012c 100644 --- a/drivers/isdn/mISDN/stack.c +++ b/drivers/isdn/mISDN/stack.c | |||
@@ -364,7 +364,7 @@ add_layer2(struct mISDNchannel *ch, struct mISDNstack *st) | |||
364 | static int | 364 | static int |
365 | st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg) | 365 | st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg) |
366 | { | 366 | { |
367 | if (!ch->st || ch->st->layer1) | 367 | if (!ch->st || !ch->st->layer1) |
368 | return -EINVAL; | 368 | return -EINVAL; |
369 | return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg); | 369 | return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg); |
370 | } | 370 | } |
diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c index 7467980b8cf9..e5225d28f392 100644 --- a/drivers/leds/leds-gpio.c +++ b/drivers/leds/leds-gpio.c | |||
@@ -78,6 +78,8 @@ static int __devinit create_gpio_led(const struct gpio_led *template, | |||
78 | { | 78 | { |
79 | int ret, state; | 79 | int ret, state; |
80 | 80 | ||
81 | led_dat->gpio = -1; | ||
82 | |||
81 | /* skip leds that aren't available */ | 83 | /* skip leds that aren't available */ |
82 | if (!gpio_is_valid(template->gpio)) { | 84 | if (!gpio_is_valid(template->gpio)) { |
83 | printk(KERN_INFO "Skipping unavailable LED gpio %d (%s)\n", | 85 | printk(KERN_INFO "Skipping unavailable LED gpio %d (%s)\n", |
diff --git a/drivers/md/Makefile b/drivers/md/Makefile index 1dc4185bd781..e355e7f6a536 100644 --- a/drivers/md/Makefile +++ b/drivers/md/Makefile | |||
@@ -46,7 +46,7 @@ obj-$(CONFIG_DM_LOG_USERSPACE) += dm-log-userspace.o | |||
46 | obj-$(CONFIG_DM_ZERO) += dm-zero.o | 46 | obj-$(CONFIG_DM_ZERO) += dm-zero.o |
47 | 47 | ||
48 | quiet_cmd_unroll = UNROLL $@ | 48 | quiet_cmd_unroll = UNROLL $@ |
49 | cmd_unroll = $(PERL) $(srctree)/$(src)/unroll.pl $(UNROLL) \ | 49 | cmd_unroll = $(AWK) -f$(srctree)/$(src)/unroll.awk -vN=$(UNROLL) \ |
50 | < $< > $@ || ( rm -f $@ && exit 1 ) | 50 | < $< > $@ || ( rm -f $@ && exit 1 ) |
51 | 51 | ||
52 | ifeq ($(CONFIG_ALTIVEC),y) | 52 | ifeq ($(CONFIG_ALTIVEC),y) |
@@ -59,56 +59,56 @@ endif | |||
59 | 59 | ||
60 | targets += raid6int1.c | 60 | targets += raid6int1.c |
61 | $(obj)/raid6int1.c: UNROLL := 1 | 61 | $(obj)/raid6int1.c: UNROLL := 1 |
62 | $(obj)/raid6int1.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE | 62 | $(obj)/raid6int1.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE |
63 | $(call if_changed,unroll) | 63 | $(call if_changed,unroll) |
64 | 64 | ||
65 | targets += raid6int2.c | 65 | targets += raid6int2.c |
66 | $(obj)/raid6int2.c: UNROLL := 2 | 66 | $(obj)/raid6int2.c: UNROLL := 2 |
67 | $(obj)/raid6int2.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE | 67 | $(obj)/raid6int2.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE |
68 | $(call if_changed,unroll) | 68 | $(call if_changed,unroll) |
69 | 69 | ||
70 | targets += raid6int4.c | 70 | targets += raid6int4.c |
71 | $(obj)/raid6int4.c: UNROLL := 4 | 71 | $(obj)/raid6int4.c: UNROLL := 4 |
72 | $(obj)/raid6int4.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE | 72 | $(obj)/raid6int4.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE |
73 | $(call if_changed,unroll) | 73 | $(call if_changed,unroll) |
74 | 74 | ||
75 | targets += raid6int8.c | 75 | targets += raid6int8.c |
76 | $(obj)/raid6int8.c: UNROLL := 8 | 76 | $(obj)/raid6int8.c: UNROLL := 8 |
77 | $(obj)/raid6int8.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE | 77 | $(obj)/raid6int8.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE |
78 | $(call if_changed,unroll) | 78 | $(call if_changed,unroll) |
79 | 79 | ||
80 | targets += raid6int16.c | 80 | targets += raid6int16.c |
81 | $(obj)/raid6int16.c: UNROLL := 16 | 81 | $(obj)/raid6int16.c: UNROLL := 16 |
82 | $(obj)/raid6int16.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE | 82 | $(obj)/raid6int16.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE |
83 | $(call if_changed,unroll) | 83 | $(call if_changed,unroll) |
84 | 84 | ||
85 | targets += raid6int32.c | 85 | targets += raid6int32.c |
86 | $(obj)/raid6int32.c: UNROLL := 32 | 86 | $(obj)/raid6int32.c: UNROLL := 32 |
87 | $(obj)/raid6int32.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE | 87 | $(obj)/raid6int32.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE |
88 | $(call if_changed,unroll) | 88 | $(call if_changed,unroll) |
89 | 89 | ||
90 | CFLAGS_raid6altivec1.o += $(altivec_flags) | 90 | CFLAGS_raid6altivec1.o += $(altivec_flags) |
91 | targets += raid6altivec1.c | 91 | targets += raid6altivec1.c |
92 | $(obj)/raid6altivec1.c: UNROLL := 1 | 92 | $(obj)/raid6altivec1.c: UNROLL := 1 |
93 | $(obj)/raid6altivec1.c: $(src)/raid6altivec.uc $(src)/unroll.pl FORCE | 93 | $(obj)/raid6altivec1.c: $(src)/raid6altivec.uc $(src)/unroll.awk FORCE |
94 | $(call if_changed,unroll) | 94 | $(call if_changed,unroll) |
95 | 95 | ||
96 | CFLAGS_raid6altivec2.o += $(altivec_flags) | 96 | CFLAGS_raid6altivec2.o += $(altivec_flags) |
97 | targets += raid6altivec2.c | 97 | targets += raid6altivec2.c |
98 | $(obj)/raid6altivec2.c: UNROLL := 2 | 98 | $(obj)/raid6altivec2.c: UNROLL := 2 |
99 | $(obj)/raid6altivec2.c: $(src)/raid6altivec.uc $(src)/unroll.pl FORCE | 99 | $(obj)/raid6altivec2.c: $(src)/raid6altivec.uc $(src)/unroll.awk FORCE |
100 | $(call if_changed,unroll) | 100 | $(call if_changed,unroll) |
101 | 101 | ||
102 | CFLAGS_raid6altivec4.o += $(altivec_flags) | 102 | CFLAGS_raid6altivec4.o += $(altivec_flags) |
103 | targets += raid6altivec4.c | 103 | targets += raid6altivec4.c |
104 | $(obj)/raid6altivec4.c: UNROLL := 4 | 104 | $(obj)/raid6altivec4.c: UNROLL := 4 |
105 | $(obj)/raid6altivec4.c: $(src)/raid6altivec.uc $(src)/unroll.pl FORCE | 105 | $(obj)/raid6altivec4.c: $(src)/raid6altivec.uc $(src)/unroll.awk FORCE |
106 | $(call if_changed,unroll) | 106 | $(call if_changed,unroll) |
107 | 107 | ||
108 | CFLAGS_raid6altivec8.o += $(altivec_flags) | 108 | CFLAGS_raid6altivec8.o += $(altivec_flags) |
109 | targets += raid6altivec8.c | 109 | targets += raid6altivec8.c |
110 | $(obj)/raid6altivec8.c: UNROLL := 8 | 110 | $(obj)/raid6altivec8.c: UNROLL := 8 |
111 | $(obj)/raid6altivec8.c: $(src)/raid6altivec.uc $(src)/unroll.pl FORCE | 111 | $(obj)/raid6altivec8.c: $(src)/raid6altivec.uc $(src)/unroll.awk FORCE |
112 | $(call if_changed,unroll) | 112 | $(call if_changed,unroll) |
113 | 113 | ||
114 | quiet_cmd_mktable = TABLE $@ | 114 | quiet_cmd_mktable = TABLE $@ |
diff --git a/drivers/md/bitmap.c b/drivers/md/bitmap.c index 6986b0059d23..60e2b322db11 100644 --- a/drivers/md/bitmap.c +++ b/drivers/md/bitmap.c | |||
@@ -1624,10 +1624,11 @@ int bitmap_create(mddev_t *mddev) | |||
1624 | bitmap->offset = mddev->bitmap_offset; | 1624 | bitmap->offset = mddev->bitmap_offset; |
1625 | if (file) { | 1625 | if (file) { |
1626 | get_file(file); | 1626 | get_file(file); |
1627 | do_sync_mapping_range(file->f_mapping, 0, LLONG_MAX, | 1627 | /* As future accesses to this file will use bmap, |
1628 | SYNC_FILE_RANGE_WAIT_BEFORE | | 1628 | * and bypass the page cache, we must sync the file |
1629 | SYNC_FILE_RANGE_WRITE | | 1629 | * first. |
1630 | SYNC_FILE_RANGE_WAIT_AFTER); | 1630 | */ |
1631 | vfs_fsync(file, file->f_dentry, 1); | ||
1631 | } | 1632 | } |
1632 | /* read superblock from bitmap file (this sets bitmap->chunksize) */ | 1633 | /* read superblock from bitmap file (this sets bitmap->chunksize) */ |
1633 | err = bitmap_read_sb(bitmap); | 1634 | err = bitmap_read_sb(bitmap); |
diff --git a/drivers/md/md.c b/drivers/md/md.c index 26ba42a79129..b182f86a19dd 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -944,6 +944,14 @@ static int super_90_validate(mddev_t *mddev, mdk_rdev_t *rdev) | |||
944 | desc->raid_disk < mddev->raid_disks */) { | 944 | desc->raid_disk < mddev->raid_disks */) { |
945 | set_bit(In_sync, &rdev->flags); | 945 | set_bit(In_sync, &rdev->flags); |
946 | rdev->raid_disk = desc->raid_disk; | 946 | rdev->raid_disk = desc->raid_disk; |
947 | } else if (desc->state & (1<<MD_DISK_ACTIVE)) { | ||
948 | /* active but not in sync implies recovery up to | ||
949 | * reshape position. We don't know exactly where | ||
950 | * that is, so set to zero for now */ | ||
951 | if (mddev->minor_version >= 91) { | ||
952 | rdev->recovery_offset = 0; | ||
953 | rdev->raid_disk = desc->raid_disk; | ||
954 | } | ||
947 | } | 955 | } |
948 | if (desc->state & (1<<MD_DISK_WRITEMOSTLY)) | 956 | if (desc->state & (1<<MD_DISK_WRITEMOSTLY)) |
949 | set_bit(WriteMostly, &rdev->flags); | 957 | set_bit(WriteMostly, &rdev->flags); |
@@ -1032,8 +1040,19 @@ static void super_90_sync(mddev_t *mddev, mdk_rdev_t *rdev) | |||
1032 | list_for_each_entry(rdev2, &mddev->disks, same_set) { | 1040 | list_for_each_entry(rdev2, &mddev->disks, same_set) { |
1033 | mdp_disk_t *d; | 1041 | mdp_disk_t *d; |
1034 | int desc_nr; | 1042 | int desc_nr; |
1035 | if (rdev2->raid_disk >= 0 && test_bit(In_sync, &rdev2->flags) | 1043 | int is_active = test_bit(In_sync, &rdev2->flags); |
1036 | && !test_bit(Faulty, &rdev2->flags)) | 1044 | |
1045 | if (rdev2->raid_disk >= 0 && | ||
1046 | sb->minor_version >= 91) | ||
1047 | /* we have nowhere to store the recovery_offset, | ||
1048 | * but if it is not below the reshape_position, | ||
1049 | * we can piggy-back on that. | ||
1050 | */ | ||
1051 | is_active = 1; | ||
1052 | if (rdev2->raid_disk < 0 || | ||
1053 | test_bit(Faulty, &rdev2->flags)) | ||
1054 | is_active = 0; | ||
1055 | if (is_active) | ||
1037 | desc_nr = rdev2->raid_disk; | 1056 | desc_nr = rdev2->raid_disk; |
1038 | else | 1057 | else |
1039 | desc_nr = next_spare++; | 1058 | desc_nr = next_spare++; |
@@ -1043,16 +1062,16 @@ static void super_90_sync(mddev_t *mddev, mdk_rdev_t *rdev) | |||
1043 | d->number = rdev2->desc_nr; | 1062 | d->number = rdev2->desc_nr; |
1044 | d->major = MAJOR(rdev2->bdev->bd_dev); | 1063 | d->major = MAJOR(rdev2->bdev->bd_dev); |
1045 | d->minor = MINOR(rdev2->bdev->bd_dev); | 1064 | d->minor = MINOR(rdev2->bdev->bd_dev); |
1046 | if (rdev2->raid_disk >= 0 && test_bit(In_sync, &rdev2->flags) | 1065 | if (is_active) |
1047 | && !test_bit(Faulty, &rdev2->flags)) | ||
1048 | d->raid_disk = rdev2->raid_disk; | 1066 | d->raid_disk = rdev2->raid_disk; |
1049 | else | 1067 | else |
1050 | d->raid_disk = rdev2->desc_nr; /* compatibility */ | 1068 | d->raid_disk = rdev2->desc_nr; /* compatibility */ |
1051 | if (test_bit(Faulty, &rdev2->flags)) | 1069 | if (test_bit(Faulty, &rdev2->flags)) |
1052 | d->state = (1<<MD_DISK_FAULTY); | 1070 | d->state = (1<<MD_DISK_FAULTY); |
1053 | else if (test_bit(In_sync, &rdev2->flags)) { | 1071 | else if (is_active) { |
1054 | d->state = (1<<MD_DISK_ACTIVE); | 1072 | d->state = (1<<MD_DISK_ACTIVE); |
1055 | d->state |= (1<<MD_DISK_SYNC); | 1073 | if (test_bit(In_sync, &rdev2->flags)) |
1074 | d->state |= (1<<MD_DISK_SYNC); | ||
1056 | active++; | 1075 | active++; |
1057 | working++; | 1076 | working++; |
1058 | } else { | 1077 | } else { |
@@ -1382,8 +1401,6 @@ static void super_1_sync(mddev_t *mddev, mdk_rdev_t *rdev) | |||
1382 | 1401 | ||
1383 | if (rdev->raid_disk >= 0 && | 1402 | if (rdev->raid_disk >= 0 && |
1384 | !test_bit(In_sync, &rdev->flags)) { | 1403 | !test_bit(In_sync, &rdev->flags)) { |
1385 | if (mddev->curr_resync_completed > rdev->recovery_offset) | ||
1386 | rdev->recovery_offset = mddev->curr_resync_completed; | ||
1387 | if (rdev->recovery_offset > 0) { | 1404 | if (rdev->recovery_offset > 0) { |
1388 | sb->feature_map |= | 1405 | sb->feature_map |= |
1389 | cpu_to_le32(MD_FEATURE_RECOVERY_OFFSET); | 1406 | cpu_to_le32(MD_FEATURE_RECOVERY_OFFSET); |
@@ -1917,6 +1934,14 @@ static void sync_sbs(mddev_t * mddev, int nospares) | |||
1917 | */ | 1934 | */ |
1918 | mdk_rdev_t *rdev; | 1935 | mdk_rdev_t *rdev; |
1919 | 1936 | ||
1937 | /* First make sure individual recovery_offsets are correct */ | ||
1938 | list_for_each_entry(rdev, &mddev->disks, same_set) { | ||
1939 | if (rdev->raid_disk >= 0 && | ||
1940 | !test_bit(In_sync, &rdev->flags) && | ||
1941 | mddev->curr_resync_completed > rdev->recovery_offset) | ||
1942 | rdev->recovery_offset = mddev->curr_resync_completed; | ||
1943 | |||
1944 | } | ||
1920 | list_for_each_entry(rdev, &mddev->disks, same_set) { | 1945 | list_for_each_entry(rdev, &mddev->disks, same_set) { |
1921 | if (rdev->sb_events == mddev->events || | 1946 | if (rdev->sb_events == mddev->events || |
1922 | (nospares && | 1947 | (nospares && |
@@ -2631,7 +2656,7 @@ static void analyze_sbs(mddev_t * mddev) | |||
2631 | rdev->desc_nr = i++; | 2656 | rdev->desc_nr = i++; |
2632 | rdev->raid_disk = rdev->desc_nr; | 2657 | rdev->raid_disk = rdev->desc_nr; |
2633 | set_bit(In_sync, &rdev->flags); | 2658 | set_bit(In_sync, &rdev->flags); |
2634 | } else if (rdev->raid_disk >= mddev->raid_disks) { | 2659 | } else if (rdev->raid_disk >= (mddev->raid_disks - min(0, mddev->delta_disks))) { |
2635 | rdev->raid_disk = -1; | 2660 | rdev->raid_disk = -1; |
2636 | clear_bit(In_sync, &rdev->flags); | 2661 | clear_bit(In_sync, &rdev->flags); |
2637 | } | 2662 | } |
@@ -6504,8 +6529,9 @@ void md_do_sync(mddev_t *mddev) | |||
6504 | skip: | 6529 | skip: |
6505 | mddev->curr_resync = 0; | 6530 | mddev->curr_resync = 0; |
6506 | mddev->curr_resync_completed = 0; | 6531 | mddev->curr_resync_completed = 0; |
6507 | mddev->resync_min = 0; | 6532 | if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery)) |
6508 | mddev->resync_max = MaxSector; | 6533 | /* We completed so max setting can be forgotten. */ |
6534 | mddev->resync_max = MaxSector; | ||
6509 | sysfs_notify(&mddev->kobj, NULL, "sync_completed"); | 6535 | sysfs_notify(&mddev->kobj, NULL, "sync_completed"); |
6510 | wake_up(&resync_wait); | 6536 | wake_up(&resync_wait); |
6511 | set_bit(MD_RECOVERY_DONE, &mddev->recovery); | 6537 | set_bit(MD_RECOVERY_DONE, &mddev->recovery); |
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c index d1b9bd5fd4f6..a053423785c9 100644 --- a/drivers/md/raid1.c +++ b/drivers/md/raid1.c | |||
@@ -64,7 +64,7 @@ static void * r1bio_pool_alloc(gfp_t gfp_flags, void *data) | |||
64 | 64 | ||
65 | /* allocate a r1bio with room for raid_disks entries in the bios array */ | 65 | /* allocate a r1bio with room for raid_disks entries in the bios array */ |
66 | r1_bio = kzalloc(size, gfp_flags); | 66 | r1_bio = kzalloc(size, gfp_flags); |
67 | if (!r1_bio) | 67 | if (!r1_bio && pi->mddev) |
68 | unplug_slaves(pi->mddev); | 68 | unplug_slaves(pi->mddev); |
69 | 69 | ||
70 | return r1_bio; | 70 | return r1_bio; |
@@ -1683,6 +1683,7 @@ static void raid1d(mddev_t *mddev) | |||
1683 | generic_make_request(bio); | 1683 | generic_make_request(bio); |
1684 | } | 1684 | } |
1685 | } | 1685 | } |
1686 | cond_resched(); | ||
1686 | } | 1687 | } |
1687 | if (unplug) | 1688 | if (unplug) |
1688 | unplug_slaves(mddev); | 1689 | unplug_slaves(mddev); |
@@ -1978,13 +1979,14 @@ static int run(mddev_t *mddev) | |||
1978 | conf->poolinfo = kmalloc(sizeof(*conf->poolinfo), GFP_KERNEL); | 1979 | conf->poolinfo = kmalloc(sizeof(*conf->poolinfo), GFP_KERNEL); |
1979 | if (!conf->poolinfo) | 1980 | if (!conf->poolinfo) |
1980 | goto out_no_mem; | 1981 | goto out_no_mem; |
1981 | conf->poolinfo->mddev = mddev; | 1982 | conf->poolinfo->mddev = NULL; |
1982 | conf->poolinfo->raid_disks = mddev->raid_disks; | 1983 | conf->poolinfo->raid_disks = mddev->raid_disks; |
1983 | conf->r1bio_pool = mempool_create(NR_RAID1_BIOS, r1bio_pool_alloc, | 1984 | conf->r1bio_pool = mempool_create(NR_RAID1_BIOS, r1bio_pool_alloc, |
1984 | r1bio_pool_free, | 1985 | r1bio_pool_free, |
1985 | conf->poolinfo); | 1986 | conf->poolinfo); |
1986 | if (!conf->r1bio_pool) | 1987 | if (!conf->r1bio_pool) |
1987 | goto out_no_mem; | 1988 | goto out_no_mem; |
1989 | conf->poolinfo->mddev = mddev; | ||
1988 | 1990 | ||
1989 | spin_lock_init(&conf->device_lock); | 1991 | spin_lock_init(&conf->device_lock); |
1990 | mddev->queue->queue_lock = &conf->device_lock; | 1992 | mddev->queue->queue_lock = &conf->device_lock; |
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index 51c4c5c4d87a..c2cb7b87b440 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c | |||
@@ -68,7 +68,7 @@ static void * r10bio_pool_alloc(gfp_t gfp_flags, void *data) | |||
68 | 68 | ||
69 | /* allocate a r10bio with room for raid_disks entries in the bios array */ | 69 | /* allocate a r10bio with room for raid_disks entries in the bios array */ |
70 | r10_bio = kzalloc(size, gfp_flags); | 70 | r10_bio = kzalloc(size, gfp_flags); |
71 | if (!r10_bio) | 71 | if (!r10_bio && conf->mddev) |
72 | unplug_slaves(conf->mddev); | 72 | unplug_slaves(conf->mddev); |
73 | 73 | ||
74 | return r10_bio; | 74 | return r10_bio; |
@@ -1632,6 +1632,7 @@ static void raid10d(mddev_t *mddev) | |||
1632 | generic_make_request(bio); | 1632 | generic_make_request(bio); |
1633 | } | 1633 | } |
1634 | } | 1634 | } |
1635 | cond_resched(); | ||
1635 | } | 1636 | } |
1636 | if (unplug) | 1637 | if (unplug) |
1637 | unplug_slaves(mddev); | 1638 | unplug_slaves(mddev); |
@@ -2095,7 +2096,6 @@ static int run(mddev_t *mddev) | |||
2095 | if (!conf->tmppage) | 2096 | if (!conf->tmppage) |
2096 | goto out_free_conf; | 2097 | goto out_free_conf; |
2097 | 2098 | ||
2098 | conf->mddev = mddev; | ||
2099 | conf->raid_disks = mddev->raid_disks; | 2099 | conf->raid_disks = mddev->raid_disks; |
2100 | conf->near_copies = nc; | 2100 | conf->near_copies = nc; |
2101 | conf->far_copies = fc; | 2101 | conf->far_copies = fc; |
@@ -2132,6 +2132,7 @@ static int run(mddev_t *mddev) | |||
2132 | goto out_free_conf; | 2132 | goto out_free_conf; |
2133 | } | 2133 | } |
2134 | 2134 | ||
2135 | conf->mddev = mddev; | ||
2135 | spin_lock_init(&conf->device_lock); | 2136 | spin_lock_init(&conf->device_lock); |
2136 | mddev->queue->queue_lock = &conf->device_lock; | 2137 | mddev->queue->queue_lock = &conf->device_lock; |
2137 | 2138 | ||
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 94829804ab7f..d29215d966da 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c | |||
@@ -156,13 +156,16 @@ static inline int raid6_next_disk(int disk, int raid_disks) | |||
156 | static int raid6_idx_to_slot(int idx, struct stripe_head *sh, | 156 | static int raid6_idx_to_slot(int idx, struct stripe_head *sh, |
157 | int *count, int syndrome_disks) | 157 | int *count, int syndrome_disks) |
158 | { | 158 | { |
159 | int slot; | 159 | int slot = *count; |
160 | 160 | ||
161 | if (sh->ddf_layout) | ||
162 | (*count)++; | ||
161 | if (idx == sh->pd_idx) | 163 | if (idx == sh->pd_idx) |
162 | return syndrome_disks; | 164 | return syndrome_disks; |
163 | if (idx == sh->qd_idx) | 165 | if (idx == sh->qd_idx) |
164 | return syndrome_disks + 1; | 166 | return syndrome_disks + 1; |
165 | slot = (*count)++; | 167 | if (!sh->ddf_layout) |
168 | (*count)++; | ||
166 | return slot; | 169 | return slot; |
167 | } | 170 | } |
168 | 171 | ||
@@ -717,7 +720,7 @@ static int set_syndrome_sources(struct page **srcs, struct stripe_head *sh) | |||
717 | int i; | 720 | int i; |
718 | 721 | ||
719 | for (i = 0; i < disks; i++) | 722 | for (i = 0; i < disks; i++) |
720 | srcs[i] = (void *)raid6_empty_zero_page; | 723 | srcs[i] = NULL; |
721 | 724 | ||
722 | count = 0; | 725 | count = 0; |
723 | i = d0_idx; | 726 | i = d0_idx; |
@@ -727,9 +730,8 @@ static int set_syndrome_sources(struct page **srcs, struct stripe_head *sh) | |||
727 | srcs[slot] = sh->dev[i].page; | 730 | srcs[slot] = sh->dev[i].page; |
728 | i = raid6_next_disk(i, disks); | 731 | i = raid6_next_disk(i, disks); |
729 | } while (i != d0_idx); | 732 | } while (i != d0_idx); |
730 | BUG_ON(count != syndrome_disks); | ||
731 | 733 | ||
732 | return count; | 734 | return syndrome_disks; |
733 | } | 735 | } |
734 | 736 | ||
735 | static struct dma_async_tx_descriptor * | 737 | static struct dma_async_tx_descriptor * |
@@ -814,7 +816,7 @@ ops_run_compute6_2(struct stripe_head *sh, struct raid5_percpu *percpu) | |||
814 | * slot number conversion for 'faila' and 'failb' | 816 | * slot number conversion for 'faila' and 'failb' |
815 | */ | 817 | */ |
816 | for (i = 0; i < disks ; i++) | 818 | for (i = 0; i < disks ; i++) |
817 | blocks[i] = (void *)raid6_empty_zero_page; | 819 | blocks[i] = NULL; |
818 | count = 0; | 820 | count = 0; |
819 | i = d0_idx; | 821 | i = d0_idx; |
820 | do { | 822 | do { |
@@ -828,7 +830,6 @@ ops_run_compute6_2(struct stripe_head *sh, struct raid5_percpu *percpu) | |||
828 | failb = slot; | 830 | failb = slot; |
829 | i = raid6_next_disk(i, disks); | 831 | i = raid6_next_disk(i, disks); |
830 | } while (i != d0_idx); | 832 | } while (i != d0_idx); |
831 | BUG_ON(count != syndrome_disks); | ||
832 | 833 | ||
833 | BUG_ON(faila == failb); | 834 | BUG_ON(faila == failb); |
834 | if (failb < faila) | 835 | if (failb < faila) |
@@ -845,7 +846,7 @@ ops_run_compute6_2(struct stripe_head *sh, struct raid5_percpu *percpu) | |||
845 | init_async_submit(&submit, ASYNC_TX_FENCE, NULL, | 846 | init_async_submit(&submit, ASYNC_TX_FENCE, NULL, |
846 | ops_complete_compute, sh, | 847 | ops_complete_compute, sh, |
847 | to_addr_conv(sh, percpu)); | 848 | to_addr_conv(sh, percpu)); |
848 | return async_gen_syndrome(blocks, 0, count+2, | 849 | return async_gen_syndrome(blocks, 0, syndrome_disks+2, |
849 | STRIPE_SIZE, &submit); | 850 | STRIPE_SIZE, &submit); |
850 | } else { | 851 | } else { |
851 | struct page *dest; | 852 | struct page *dest; |
@@ -1139,7 +1140,7 @@ static void ops_run_check_pq(struct stripe_head *sh, struct raid5_percpu *percpu | |||
1139 | &sh->ops.zero_sum_result, percpu->spare_page, &submit); | 1140 | &sh->ops.zero_sum_result, percpu->spare_page, &submit); |
1140 | } | 1141 | } |
1141 | 1142 | ||
1142 | static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request) | 1143 | static void __raid_run_ops(struct stripe_head *sh, unsigned long ops_request) |
1143 | { | 1144 | { |
1144 | int overlap_clear = 0, i, disks = sh->disks; | 1145 | int overlap_clear = 0, i, disks = sh->disks; |
1145 | struct dma_async_tx_descriptor *tx = NULL; | 1146 | struct dma_async_tx_descriptor *tx = NULL; |
@@ -1204,22 +1205,55 @@ static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request) | |||
1204 | put_cpu(); | 1205 | put_cpu(); |
1205 | } | 1206 | } |
1206 | 1207 | ||
1208 | #ifdef CONFIG_MULTICORE_RAID456 | ||
1209 | static void async_run_ops(void *param, async_cookie_t cookie) | ||
1210 | { | ||
1211 | struct stripe_head *sh = param; | ||
1212 | unsigned long ops_request = sh->ops.request; | ||
1213 | |||
1214 | clear_bit_unlock(STRIPE_OPS_REQ_PENDING, &sh->state); | ||
1215 | wake_up(&sh->ops.wait_for_ops); | ||
1216 | |||
1217 | __raid_run_ops(sh, ops_request); | ||
1218 | release_stripe(sh); | ||
1219 | } | ||
1220 | |||
1221 | static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request) | ||
1222 | { | ||
1223 | /* since handle_stripe can be called outside of raid5d context | ||
1224 | * we need to ensure sh->ops.request is de-staged before another | ||
1225 | * request arrives | ||
1226 | */ | ||
1227 | wait_event(sh->ops.wait_for_ops, | ||
1228 | !test_and_set_bit_lock(STRIPE_OPS_REQ_PENDING, &sh->state)); | ||
1229 | sh->ops.request = ops_request; | ||
1230 | |||
1231 | atomic_inc(&sh->count); | ||
1232 | async_schedule(async_run_ops, sh); | ||
1233 | } | ||
1234 | #else | ||
1235 | #define raid_run_ops __raid_run_ops | ||
1236 | #endif | ||
1237 | |||
1207 | static int grow_one_stripe(raid5_conf_t *conf) | 1238 | static int grow_one_stripe(raid5_conf_t *conf) |
1208 | { | 1239 | { |
1209 | struct stripe_head *sh; | 1240 | struct stripe_head *sh; |
1241 | int disks = max(conf->raid_disks, conf->previous_raid_disks); | ||
1210 | sh = kmem_cache_alloc(conf->slab_cache, GFP_KERNEL); | 1242 | sh = kmem_cache_alloc(conf->slab_cache, GFP_KERNEL); |
1211 | if (!sh) | 1243 | if (!sh) |
1212 | return 0; | 1244 | return 0; |
1213 | memset(sh, 0, sizeof(*sh) + (conf->raid_disks-1)*sizeof(struct r5dev)); | 1245 | memset(sh, 0, sizeof(*sh) + (disks-1)*sizeof(struct r5dev)); |
1214 | sh->raid_conf = conf; | 1246 | sh->raid_conf = conf; |
1215 | spin_lock_init(&sh->lock); | 1247 | spin_lock_init(&sh->lock); |
1248 | #ifdef CONFIG_MULTICORE_RAID456 | ||
1249 | init_waitqueue_head(&sh->ops.wait_for_ops); | ||
1250 | #endif | ||
1216 | 1251 | ||
1217 | if (grow_buffers(sh, conf->raid_disks)) { | 1252 | if (grow_buffers(sh, disks)) { |
1218 | shrink_buffers(sh, conf->raid_disks); | 1253 | shrink_buffers(sh, disks); |
1219 | kmem_cache_free(conf->slab_cache, sh); | 1254 | kmem_cache_free(conf->slab_cache, sh); |
1220 | return 0; | 1255 | return 0; |
1221 | } | 1256 | } |
1222 | sh->disks = conf->raid_disks; | ||
1223 | /* we just created an active stripe so... */ | 1257 | /* we just created an active stripe so... */ |
1224 | atomic_set(&sh->count, 1); | 1258 | atomic_set(&sh->count, 1); |
1225 | atomic_inc(&conf->active_stripes); | 1259 | atomic_inc(&conf->active_stripes); |
@@ -1231,7 +1265,7 @@ static int grow_one_stripe(raid5_conf_t *conf) | |||
1231 | static int grow_stripes(raid5_conf_t *conf, int num) | 1265 | static int grow_stripes(raid5_conf_t *conf, int num) |
1232 | { | 1266 | { |
1233 | struct kmem_cache *sc; | 1267 | struct kmem_cache *sc; |
1234 | int devs = conf->raid_disks; | 1268 | int devs = max(conf->raid_disks, conf->previous_raid_disks); |
1235 | 1269 | ||
1236 | sprintf(conf->cache_name[0], | 1270 | sprintf(conf->cache_name[0], |
1237 | "raid%d-%s", conf->level, mdname(conf->mddev)); | 1271 | "raid%d-%s", conf->level, mdname(conf->mddev)); |
@@ -1329,6 +1363,9 @@ static int resize_stripes(raid5_conf_t *conf, int newsize) | |||
1329 | 1363 | ||
1330 | nsh->raid_conf = conf; | 1364 | nsh->raid_conf = conf; |
1331 | spin_lock_init(&nsh->lock); | 1365 | spin_lock_init(&nsh->lock); |
1366 | #ifdef CONFIG_MULTICORE_RAID456 | ||
1367 | init_waitqueue_head(&nsh->ops.wait_for_ops); | ||
1368 | #endif | ||
1332 | 1369 | ||
1333 | list_add(&nsh->lru, &newstripes); | 1370 | list_add(&nsh->lru, &newstripes); |
1334 | } | 1371 | } |
@@ -1899,10 +1936,15 @@ static sector_t compute_blocknr(struct stripe_head *sh, int i, int previous) | |||
1899 | case ALGORITHM_PARITY_N: | 1936 | case ALGORITHM_PARITY_N: |
1900 | break; | 1937 | break; |
1901 | case ALGORITHM_ROTATING_N_CONTINUE: | 1938 | case ALGORITHM_ROTATING_N_CONTINUE: |
1939 | /* Like left_symmetric, but P is before Q */ | ||
1902 | if (sh->pd_idx == 0) | 1940 | if (sh->pd_idx == 0) |
1903 | i--; /* P D D D Q */ | 1941 | i--; /* P D D D Q */ |
1904 | else if (i > sh->pd_idx) | 1942 | else { |
1905 | i -= 2; /* D D Q P D */ | 1943 | /* D D Q P D */ |
1944 | if (i < sh->pd_idx) | ||
1945 | i += raid_disks; | ||
1946 | i -= (sh->pd_idx + 1); | ||
1947 | } | ||
1906 | break; | 1948 | break; |
1907 | case ALGORITHM_LEFT_ASYMMETRIC_6: | 1949 | case ALGORITHM_LEFT_ASYMMETRIC_6: |
1908 | case ALGORITHM_RIGHT_ASYMMETRIC_6: | 1950 | case ALGORITHM_RIGHT_ASYMMETRIC_6: |
@@ -2896,7 +2938,7 @@ static void handle_stripe_expansion(raid5_conf_t *conf, struct stripe_head *sh, | |||
2896 | * | 2938 | * |
2897 | */ | 2939 | */ |
2898 | 2940 | ||
2899 | static bool handle_stripe5(struct stripe_head *sh) | 2941 | static void handle_stripe5(struct stripe_head *sh) |
2900 | { | 2942 | { |
2901 | raid5_conf_t *conf = sh->raid_conf; | 2943 | raid5_conf_t *conf = sh->raid_conf; |
2902 | int disks = sh->disks, i; | 2944 | int disks = sh->disks, i; |
@@ -3167,11 +3209,9 @@ static bool handle_stripe5(struct stripe_head *sh) | |||
3167 | ops_run_io(sh, &s); | 3209 | ops_run_io(sh, &s); |
3168 | 3210 | ||
3169 | return_io(return_bi); | 3211 | return_io(return_bi); |
3170 | |||
3171 | return blocked_rdev == NULL; | ||
3172 | } | 3212 | } |
3173 | 3213 | ||
3174 | static bool handle_stripe6(struct stripe_head *sh) | 3214 | static void handle_stripe6(struct stripe_head *sh) |
3175 | { | 3215 | { |
3176 | raid5_conf_t *conf = sh->raid_conf; | 3216 | raid5_conf_t *conf = sh->raid_conf; |
3177 | int disks = sh->disks; | 3217 | int disks = sh->disks; |
@@ -3455,17 +3495,14 @@ static bool handle_stripe6(struct stripe_head *sh) | |||
3455 | ops_run_io(sh, &s); | 3495 | ops_run_io(sh, &s); |
3456 | 3496 | ||
3457 | return_io(return_bi); | 3497 | return_io(return_bi); |
3458 | |||
3459 | return blocked_rdev == NULL; | ||
3460 | } | 3498 | } |
3461 | 3499 | ||
3462 | /* returns true if the stripe was handled */ | 3500 | static void handle_stripe(struct stripe_head *sh) |
3463 | static bool handle_stripe(struct stripe_head *sh) | ||
3464 | { | 3501 | { |
3465 | if (sh->raid_conf->level == 6) | 3502 | if (sh->raid_conf->level == 6) |
3466 | return handle_stripe6(sh); | 3503 | handle_stripe6(sh); |
3467 | else | 3504 | else |
3468 | return handle_stripe5(sh); | 3505 | handle_stripe5(sh); |
3469 | } | 3506 | } |
3470 | 3507 | ||
3471 | static void raid5_activate_delayed(raid5_conf_t *conf) | 3508 | static void raid5_activate_delayed(raid5_conf_t *conf) |
@@ -3503,9 +3540,10 @@ static void unplug_slaves(mddev_t *mddev) | |||
3503 | { | 3540 | { |
3504 | raid5_conf_t *conf = mddev->private; | 3541 | raid5_conf_t *conf = mddev->private; |
3505 | int i; | 3542 | int i; |
3543 | int devs = max(conf->raid_disks, conf->previous_raid_disks); | ||
3506 | 3544 | ||
3507 | rcu_read_lock(); | 3545 | rcu_read_lock(); |
3508 | for (i = 0; i < conf->raid_disks; i++) { | 3546 | for (i = 0; i < devs; i++) { |
3509 | mdk_rdev_t *rdev = rcu_dereference(conf->disks[i].rdev); | 3547 | mdk_rdev_t *rdev = rcu_dereference(conf->disks[i].rdev); |
3510 | if (rdev && !test_bit(Faulty, &rdev->flags) && atomic_read(&rdev->nr_pending)) { | 3548 | if (rdev && !test_bit(Faulty, &rdev->flags) && atomic_read(&rdev->nr_pending)) { |
3511 | struct request_queue *r_queue = bdev_get_queue(rdev->bdev); | 3549 | struct request_queue *r_queue = bdev_get_queue(rdev->bdev); |
@@ -4011,6 +4049,8 @@ static sector_t reshape_request(mddev_t *mddev, sector_t sector_nr, int *skipped | |||
4011 | sector_nr = conf->reshape_progress; | 4049 | sector_nr = conf->reshape_progress; |
4012 | sector_div(sector_nr, new_data_disks); | 4050 | sector_div(sector_nr, new_data_disks); |
4013 | if (sector_nr) { | 4051 | if (sector_nr) { |
4052 | mddev->curr_resync_completed = sector_nr; | ||
4053 | sysfs_notify(&mddev->kobj, NULL, "sync_completed"); | ||
4014 | *skipped = 1; | 4054 | *skipped = 1; |
4015 | return sector_nr; | 4055 | return sector_nr; |
4016 | } | 4056 | } |
@@ -4277,9 +4317,7 @@ static inline sector_t sync_request(mddev_t *mddev, sector_t sector_nr, int *ski | |||
4277 | clear_bit(STRIPE_INSYNC, &sh->state); | 4317 | clear_bit(STRIPE_INSYNC, &sh->state); |
4278 | spin_unlock(&sh->lock); | 4318 | spin_unlock(&sh->lock); |
4279 | 4319 | ||
4280 | /* wait for any blocked device to be handled */ | 4320 | handle_stripe(sh); |
4281 | while (unlikely(!handle_stripe(sh))) | ||
4282 | ; | ||
4283 | release_stripe(sh); | 4321 | release_stripe(sh); |
4284 | 4322 | ||
4285 | return STRIPE_SECTORS; | 4323 | return STRIPE_SECTORS; |
@@ -4349,37 +4387,6 @@ static int retry_aligned_read(raid5_conf_t *conf, struct bio *raid_bio) | |||
4349 | return handled; | 4387 | return handled; |
4350 | } | 4388 | } |
4351 | 4389 | ||
4352 | #ifdef CONFIG_MULTICORE_RAID456 | ||
4353 | static void __process_stripe(void *param, async_cookie_t cookie) | ||
4354 | { | ||
4355 | struct stripe_head *sh = param; | ||
4356 | |||
4357 | handle_stripe(sh); | ||
4358 | release_stripe(sh); | ||
4359 | } | ||
4360 | |||
4361 | static void process_stripe(struct stripe_head *sh, struct list_head *domain) | ||
4362 | { | ||
4363 | async_schedule_domain(__process_stripe, sh, domain); | ||
4364 | } | ||
4365 | |||
4366 | static void synchronize_stripe_processing(struct list_head *domain) | ||
4367 | { | ||
4368 | async_synchronize_full_domain(domain); | ||
4369 | } | ||
4370 | #else | ||
4371 | static void process_stripe(struct stripe_head *sh, struct list_head *domain) | ||
4372 | { | ||
4373 | handle_stripe(sh); | ||
4374 | release_stripe(sh); | ||
4375 | cond_resched(); | ||
4376 | } | ||
4377 | |||
4378 | static void synchronize_stripe_processing(struct list_head *domain) | ||
4379 | { | ||
4380 | } | ||
4381 | #endif | ||
4382 | |||
4383 | 4390 | ||
4384 | /* | 4391 | /* |
4385 | * This is our raid5 kernel thread. | 4392 | * This is our raid5 kernel thread. |
@@ -4393,7 +4400,6 @@ static void raid5d(mddev_t *mddev) | |||
4393 | struct stripe_head *sh; | 4400 | struct stripe_head *sh; |
4394 | raid5_conf_t *conf = mddev->private; | 4401 | raid5_conf_t *conf = mddev->private; |
4395 | int handled; | 4402 | int handled; |
4396 | LIST_HEAD(raid_domain); | ||
4397 | 4403 | ||
4398 | pr_debug("+++ raid5d active\n"); | 4404 | pr_debug("+++ raid5d active\n"); |
4399 | 4405 | ||
@@ -4430,7 +4436,9 @@ static void raid5d(mddev_t *mddev) | |||
4430 | spin_unlock_irq(&conf->device_lock); | 4436 | spin_unlock_irq(&conf->device_lock); |
4431 | 4437 | ||
4432 | handled++; | 4438 | handled++; |
4433 | process_stripe(sh, &raid_domain); | 4439 | handle_stripe(sh); |
4440 | release_stripe(sh); | ||
4441 | cond_resched(); | ||
4434 | 4442 | ||
4435 | spin_lock_irq(&conf->device_lock); | 4443 | spin_lock_irq(&conf->device_lock); |
4436 | } | 4444 | } |
@@ -4438,7 +4446,6 @@ static void raid5d(mddev_t *mddev) | |||
4438 | 4446 | ||
4439 | spin_unlock_irq(&conf->device_lock); | 4447 | spin_unlock_irq(&conf->device_lock); |
4440 | 4448 | ||
4441 | synchronize_stripe_processing(&raid_domain); | ||
4442 | async_tx_issue_pending_all(); | 4449 | async_tx_issue_pending_all(); |
4443 | unplug_slaves(mddev); | 4450 | unplug_slaves(mddev); |
4444 | 4451 | ||
@@ -4558,13 +4565,9 @@ raid5_size(mddev_t *mddev, sector_t sectors, int raid_disks) | |||
4558 | 4565 | ||
4559 | if (!sectors) | 4566 | if (!sectors) |
4560 | sectors = mddev->dev_sectors; | 4567 | sectors = mddev->dev_sectors; |
4561 | if (!raid_disks) { | 4568 | if (!raid_disks) |
4562 | /* size is defined by the smallest of previous and new size */ | 4569 | /* size is defined by the smallest of previous and new size */ |
4563 | if (conf->raid_disks < conf->previous_raid_disks) | 4570 | raid_disks = min(conf->raid_disks, conf->previous_raid_disks); |
4564 | raid_disks = conf->raid_disks; | ||
4565 | else | ||
4566 | raid_disks = conf->previous_raid_disks; | ||
4567 | } | ||
4568 | 4571 | ||
4569 | sectors &= ~((sector_t)mddev->chunk_sectors - 1); | 4572 | sectors &= ~((sector_t)mddev->chunk_sectors - 1); |
4570 | sectors &= ~((sector_t)mddev->new_chunk_sectors - 1); | 4573 | sectors &= ~((sector_t)mddev->new_chunk_sectors - 1); |
@@ -4665,7 +4668,7 @@ static int raid5_alloc_percpu(raid5_conf_t *conf) | |||
4665 | } | 4668 | } |
4666 | per_cpu_ptr(conf->percpu, cpu)->spare_page = spare_page; | 4669 | per_cpu_ptr(conf->percpu, cpu)->spare_page = spare_page; |
4667 | } | 4670 | } |
4668 | scribble = kmalloc(scribble_len(conf->raid_disks), GFP_KERNEL); | 4671 | scribble = kmalloc(conf->scribble_len, GFP_KERNEL); |
4669 | if (!scribble) { | 4672 | if (!scribble) { |
4670 | err = -ENOMEM; | 4673 | err = -ENOMEM; |
4671 | break; | 4674 | break; |
@@ -4686,7 +4689,7 @@ static int raid5_alloc_percpu(raid5_conf_t *conf) | |||
4686 | static raid5_conf_t *setup_conf(mddev_t *mddev) | 4689 | static raid5_conf_t *setup_conf(mddev_t *mddev) |
4687 | { | 4690 | { |
4688 | raid5_conf_t *conf; | 4691 | raid5_conf_t *conf; |
4689 | int raid_disk, memory; | 4692 | int raid_disk, memory, max_disks; |
4690 | mdk_rdev_t *rdev; | 4693 | mdk_rdev_t *rdev; |
4691 | struct disk_info *disk; | 4694 | struct disk_info *disk; |
4692 | 4695 | ||
@@ -4722,15 +4725,28 @@ static raid5_conf_t *setup_conf(mddev_t *mddev) | |||
4722 | conf = kzalloc(sizeof(raid5_conf_t), GFP_KERNEL); | 4725 | conf = kzalloc(sizeof(raid5_conf_t), GFP_KERNEL); |
4723 | if (conf == NULL) | 4726 | if (conf == NULL) |
4724 | goto abort; | 4727 | goto abort; |
4728 | spin_lock_init(&conf->device_lock); | ||
4729 | init_waitqueue_head(&conf->wait_for_stripe); | ||
4730 | init_waitqueue_head(&conf->wait_for_overlap); | ||
4731 | INIT_LIST_HEAD(&conf->handle_list); | ||
4732 | INIT_LIST_HEAD(&conf->hold_list); | ||
4733 | INIT_LIST_HEAD(&conf->delayed_list); | ||
4734 | INIT_LIST_HEAD(&conf->bitmap_list); | ||
4735 | INIT_LIST_HEAD(&conf->inactive_list); | ||
4736 | atomic_set(&conf->active_stripes, 0); | ||
4737 | atomic_set(&conf->preread_active_stripes, 0); | ||
4738 | atomic_set(&conf->active_aligned_reads, 0); | ||
4739 | conf->bypass_threshold = BYPASS_THRESHOLD; | ||
4725 | 4740 | ||
4726 | conf->raid_disks = mddev->raid_disks; | 4741 | conf->raid_disks = mddev->raid_disks; |
4727 | conf->scribble_len = scribble_len(conf->raid_disks); | ||
4728 | if (mddev->reshape_position == MaxSector) | 4742 | if (mddev->reshape_position == MaxSector) |
4729 | conf->previous_raid_disks = mddev->raid_disks; | 4743 | conf->previous_raid_disks = mddev->raid_disks; |
4730 | else | 4744 | else |
4731 | conf->previous_raid_disks = mddev->raid_disks - mddev->delta_disks; | 4745 | conf->previous_raid_disks = mddev->raid_disks - mddev->delta_disks; |
4746 | max_disks = max(conf->raid_disks, conf->previous_raid_disks); | ||
4747 | conf->scribble_len = scribble_len(max_disks); | ||
4732 | 4748 | ||
4733 | conf->disks = kzalloc(conf->raid_disks * sizeof(struct disk_info), | 4749 | conf->disks = kzalloc(max_disks * sizeof(struct disk_info), |
4734 | GFP_KERNEL); | 4750 | GFP_KERNEL); |
4735 | if (!conf->disks) | 4751 | if (!conf->disks) |
4736 | goto abort; | 4752 | goto abort; |
@@ -4744,24 +4760,11 @@ static raid5_conf_t *setup_conf(mddev_t *mddev) | |||
4744 | if (raid5_alloc_percpu(conf) != 0) | 4760 | if (raid5_alloc_percpu(conf) != 0) |
4745 | goto abort; | 4761 | goto abort; |
4746 | 4762 | ||
4747 | spin_lock_init(&conf->device_lock); | ||
4748 | init_waitqueue_head(&conf->wait_for_stripe); | ||
4749 | init_waitqueue_head(&conf->wait_for_overlap); | ||
4750 | INIT_LIST_HEAD(&conf->handle_list); | ||
4751 | INIT_LIST_HEAD(&conf->hold_list); | ||
4752 | INIT_LIST_HEAD(&conf->delayed_list); | ||
4753 | INIT_LIST_HEAD(&conf->bitmap_list); | ||
4754 | INIT_LIST_HEAD(&conf->inactive_list); | ||
4755 | atomic_set(&conf->active_stripes, 0); | ||
4756 | atomic_set(&conf->preread_active_stripes, 0); | ||
4757 | atomic_set(&conf->active_aligned_reads, 0); | ||
4758 | conf->bypass_threshold = BYPASS_THRESHOLD; | ||
4759 | |||
4760 | pr_debug("raid5: run(%s) called.\n", mdname(mddev)); | 4763 | pr_debug("raid5: run(%s) called.\n", mdname(mddev)); |
4761 | 4764 | ||
4762 | list_for_each_entry(rdev, &mddev->disks, same_set) { | 4765 | list_for_each_entry(rdev, &mddev->disks, same_set) { |
4763 | raid_disk = rdev->raid_disk; | 4766 | raid_disk = rdev->raid_disk; |
4764 | if (raid_disk >= conf->raid_disks | 4767 | if (raid_disk >= max_disks |
4765 | || raid_disk < 0) | 4768 | || raid_disk < 0) |
4766 | continue; | 4769 | continue; |
4767 | disk = conf->disks + raid_disk; | 4770 | disk = conf->disks + raid_disk; |
@@ -4793,7 +4796,7 @@ static raid5_conf_t *setup_conf(mddev_t *mddev) | |||
4793 | } | 4796 | } |
4794 | 4797 | ||
4795 | memory = conf->max_nr_stripes * (sizeof(struct stripe_head) + | 4798 | memory = conf->max_nr_stripes * (sizeof(struct stripe_head) + |
4796 | conf->raid_disks * ((sizeof(struct bio) + PAGE_SIZE))) / 1024; | 4799 | max_disks * ((sizeof(struct bio) + PAGE_SIZE))) / 1024; |
4797 | if (grow_stripes(conf, conf->max_nr_stripes)) { | 4800 | if (grow_stripes(conf, conf->max_nr_stripes)) { |
4798 | printk(KERN_ERR | 4801 | printk(KERN_ERR |
4799 | "raid5: couldn't allocate %dkB for buffers\n", memory); | 4802 | "raid5: couldn't allocate %dkB for buffers\n", memory); |
@@ -4820,11 +4823,40 @@ static raid5_conf_t *setup_conf(mddev_t *mddev) | |||
4820 | return ERR_PTR(-ENOMEM); | 4823 | return ERR_PTR(-ENOMEM); |
4821 | } | 4824 | } |
4822 | 4825 | ||
4826 | |||
4827 | static int only_parity(int raid_disk, int algo, int raid_disks, int max_degraded) | ||
4828 | { | ||
4829 | switch (algo) { | ||
4830 | case ALGORITHM_PARITY_0: | ||
4831 | if (raid_disk < max_degraded) | ||
4832 | return 1; | ||
4833 | break; | ||
4834 | case ALGORITHM_PARITY_N: | ||
4835 | if (raid_disk >= raid_disks - max_degraded) | ||
4836 | return 1; | ||
4837 | break; | ||
4838 | case ALGORITHM_PARITY_0_6: | ||
4839 | if (raid_disk == 0 || | ||
4840 | raid_disk == raid_disks - 1) | ||
4841 | return 1; | ||
4842 | break; | ||
4843 | case ALGORITHM_LEFT_ASYMMETRIC_6: | ||
4844 | case ALGORITHM_RIGHT_ASYMMETRIC_6: | ||
4845 | case ALGORITHM_LEFT_SYMMETRIC_6: | ||
4846 | case ALGORITHM_RIGHT_SYMMETRIC_6: | ||
4847 | if (raid_disk == raid_disks - 1) | ||
4848 | return 1; | ||
4849 | } | ||
4850 | return 0; | ||
4851 | } | ||
4852 | |||
4823 | static int run(mddev_t *mddev) | 4853 | static int run(mddev_t *mddev) |
4824 | { | 4854 | { |
4825 | raid5_conf_t *conf; | 4855 | raid5_conf_t *conf; |
4826 | int working_disks = 0, chunk_size; | 4856 | int working_disks = 0, chunk_size; |
4857 | int dirty_parity_disks = 0; | ||
4827 | mdk_rdev_t *rdev; | 4858 | mdk_rdev_t *rdev; |
4859 | sector_t reshape_offset = 0; | ||
4828 | 4860 | ||
4829 | if (mddev->recovery_cp != MaxSector) | 4861 | if (mddev->recovery_cp != MaxSector) |
4830 | printk(KERN_NOTICE "raid5: %s is not clean" | 4862 | printk(KERN_NOTICE "raid5: %s is not clean" |
@@ -4858,6 +4890,7 @@ static int run(mddev_t *mddev) | |||
4858 | "on a stripe boundary\n"); | 4890 | "on a stripe boundary\n"); |
4859 | return -EINVAL; | 4891 | return -EINVAL; |
4860 | } | 4892 | } |
4893 | reshape_offset = here_new * mddev->new_chunk_sectors; | ||
4861 | /* here_new is the stripe we will write to */ | 4894 | /* here_new is the stripe we will write to */ |
4862 | here_old = mddev->reshape_position; | 4895 | here_old = mddev->reshape_position; |
4863 | sector_div(here_old, mddev->chunk_sectors * | 4896 | sector_div(here_old, mddev->chunk_sectors * |
@@ -4913,12 +4946,54 @@ static int run(mddev_t *mddev) | |||
4913 | /* | 4946 | /* |
4914 | * 0 for a fully functional array, 1 or 2 for a degraded array. | 4947 | * 0 for a fully functional array, 1 or 2 for a degraded array. |
4915 | */ | 4948 | */ |
4916 | list_for_each_entry(rdev, &mddev->disks, same_set) | 4949 | list_for_each_entry(rdev, &mddev->disks, same_set) { |
4917 | if (rdev->raid_disk >= 0 && | 4950 | if (rdev->raid_disk < 0) |
4918 | test_bit(In_sync, &rdev->flags)) | 4951 | continue; |
4952 | if (test_bit(In_sync, &rdev->flags)) | ||
4919 | working_disks++; | 4953 | working_disks++; |
4954 | /* This disc is not fully in-sync. However if it | ||
4955 | * just stored parity (beyond the recovery_offset), | ||
4956 | * when we don't need to be concerned about the | ||
4957 | * array being dirty. | ||
4958 | * When reshape goes 'backwards', we never have | ||
4959 | * partially completed devices, so we only need | ||
4960 | * to worry about reshape going forwards. | ||
4961 | */ | ||
4962 | /* Hack because v0.91 doesn't store recovery_offset properly. */ | ||
4963 | if (mddev->major_version == 0 && | ||
4964 | mddev->minor_version > 90) | ||
4965 | rdev->recovery_offset = reshape_offset; | ||
4966 | |||
4967 | printk("%d: w=%d pa=%d pr=%d m=%d a=%d r=%d op1=%d op2=%d\n", | ||
4968 | rdev->raid_disk, working_disks, conf->prev_algo, | ||
4969 | conf->previous_raid_disks, conf->max_degraded, | ||
4970 | conf->algorithm, conf->raid_disks, | ||
4971 | only_parity(rdev->raid_disk, | ||
4972 | conf->prev_algo, | ||
4973 | conf->previous_raid_disks, | ||
4974 | conf->max_degraded), | ||
4975 | only_parity(rdev->raid_disk, | ||
4976 | conf->algorithm, | ||
4977 | conf->raid_disks, | ||
4978 | conf->max_degraded)); | ||
4979 | if (rdev->recovery_offset < reshape_offset) { | ||
4980 | /* We need to check old and new layout */ | ||
4981 | if (!only_parity(rdev->raid_disk, | ||
4982 | conf->algorithm, | ||
4983 | conf->raid_disks, | ||
4984 | conf->max_degraded)) | ||
4985 | continue; | ||
4986 | } | ||
4987 | if (!only_parity(rdev->raid_disk, | ||
4988 | conf->prev_algo, | ||
4989 | conf->previous_raid_disks, | ||
4990 | conf->max_degraded)) | ||
4991 | continue; | ||
4992 | dirty_parity_disks++; | ||
4993 | } | ||
4920 | 4994 | ||
4921 | mddev->degraded = conf->raid_disks - working_disks; | 4995 | mddev->degraded = (max(conf->raid_disks, conf->previous_raid_disks) |
4996 | - working_disks); | ||
4922 | 4997 | ||
4923 | if (mddev->degraded > conf->max_degraded) { | 4998 | if (mddev->degraded > conf->max_degraded) { |
4924 | printk(KERN_ERR "raid5: not enough operational devices for %s" | 4999 | printk(KERN_ERR "raid5: not enough operational devices for %s" |
@@ -4931,7 +5006,7 @@ static int run(mddev_t *mddev) | |||
4931 | mddev->dev_sectors &= ~(mddev->chunk_sectors - 1); | 5006 | mddev->dev_sectors &= ~(mddev->chunk_sectors - 1); |
4932 | mddev->resync_max_sectors = mddev->dev_sectors; | 5007 | mddev->resync_max_sectors = mddev->dev_sectors; |
4933 | 5008 | ||
4934 | if (mddev->degraded > 0 && | 5009 | if (mddev->degraded > dirty_parity_disks && |
4935 | mddev->recovery_cp != MaxSector) { | 5010 | mddev->recovery_cp != MaxSector) { |
4936 | if (mddev->ok_start_degraded) | 5011 | if (mddev->ok_start_degraded) |
4937 | printk(KERN_WARNING | 5012 | printk(KERN_WARNING |
@@ -5357,9 +5432,11 @@ static int raid5_start_reshape(mddev_t *mddev) | |||
5357 | !test_bit(Faulty, &rdev->flags)) { | 5432 | !test_bit(Faulty, &rdev->flags)) { |
5358 | if (raid5_add_disk(mddev, rdev) == 0) { | 5433 | if (raid5_add_disk(mddev, rdev) == 0) { |
5359 | char nm[20]; | 5434 | char nm[20]; |
5360 | set_bit(In_sync, &rdev->flags); | 5435 | if (rdev->raid_disk >= conf->previous_raid_disks) |
5436 | set_bit(In_sync, &rdev->flags); | ||
5437 | else | ||
5438 | rdev->recovery_offset = 0; | ||
5361 | added_devices++; | 5439 | added_devices++; |
5362 | rdev->recovery_offset = 0; | ||
5363 | sprintf(nm, "rd%d", rdev->raid_disk); | 5440 | sprintf(nm, "rd%d", rdev->raid_disk); |
5364 | if (sysfs_create_link(&mddev->kobj, | 5441 | if (sysfs_create_link(&mddev->kobj, |
5365 | &rdev->kobj, nm)) | 5442 | &rdev->kobj, nm)) |
diff --git a/drivers/md/raid5.h b/drivers/md/raid5.h index 2390e0e83daf..dd708359b451 100644 --- a/drivers/md/raid5.h +++ b/drivers/md/raid5.h | |||
@@ -214,12 +214,20 @@ struct stripe_head { | |||
214 | int disks; /* disks in stripe */ | 214 | int disks; /* disks in stripe */ |
215 | enum check_states check_state; | 215 | enum check_states check_state; |
216 | enum reconstruct_states reconstruct_state; | 216 | enum reconstruct_states reconstruct_state; |
217 | /* stripe_operations | 217 | /** |
218 | * struct stripe_operations | ||
218 | * @target - STRIPE_OP_COMPUTE_BLK target | 219 | * @target - STRIPE_OP_COMPUTE_BLK target |
220 | * @target2 - 2nd compute target in the raid6 case | ||
221 | * @zero_sum_result - P and Q verification flags | ||
222 | * @request - async service request flags for raid_run_ops | ||
219 | */ | 223 | */ |
220 | struct stripe_operations { | 224 | struct stripe_operations { |
221 | int target, target2; | 225 | int target, target2; |
222 | enum sum_check_flags zero_sum_result; | 226 | enum sum_check_flags zero_sum_result; |
227 | #ifdef CONFIG_MULTICORE_RAID456 | ||
228 | unsigned long request; | ||
229 | wait_queue_head_t wait_for_ops; | ||
230 | #endif | ||
223 | } ops; | 231 | } ops; |
224 | struct r5dev { | 232 | struct r5dev { |
225 | struct bio req; | 233 | struct bio req; |
@@ -294,6 +302,8 @@ struct r6_state { | |||
294 | #define STRIPE_FULL_WRITE 13 /* all blocks are set to be overwritten */ | 302 | #define STRIPE_FULL_WRITE 13 /* all blocks are set to be overwritten */ |
295 | #define STRIPE_BIOFILL_RUN 14 | 303 | #define STRIPE_BIOFILL_RUN 14 |
296 | #define STRIPE_COMPUTE_RUN 15 | 304 | #define STRIPE_COMPUTE_RUN 15 |
305 | #define STRIPE_OPS_REQ_PENDING 16 | ||
306 | |||
297 | /* | 307 | /* |
298 | * Operation request flags | 308 | * Operation request flags |
299 | */ | 309 | */ |
@@ -478,7 +488,7 @@ static inline int algorithm_valid_raid6(int layout) | |||
478 | { | 488 | { |
479 | return (layout >= 0 && layout <= 5) | 489 | return (layout >= 0 && layout <= 5) |
480 | || | 490 | || |
481 | (layout == 8 || layout == 10) | 491 | (layout >= 8 && layout <= 10) |
482 | || | 492 | || |
483 | (layout >= 16 && layout <= 20); | 493 | (layout >= 16 && layout <= 20); |
484 | } | 494 | } |
diff --git a/drivers/md/raid6altivec.uc b/drivers/md/raid6altivec.uc index 699dfeee4944..2654d5c854be 100644 --- a/drivers/md/raid6altivec.uc +++ b/drivers/md/raid6altivec.uc | |||
@@ -15,7 +15,7 @@ | |||
15 | * | 15 | * |
16 | * $#-way unrolled portable integer math RAID-6 instruction set | 16 | * $#-way unrolled portable integer math RAID-6 instruction set |
17 | * | 17 | * |
18 | * This file is postprocessed using unroll.pl | 18 | * This file is postprocessed using unroll.awk |
19 | * | 19 | * |
20 | * <benh> hpa: in process, | 20 | * <benh> hpa: in process, |
21 | * you can just "steal" the vec unit with enable_kernel_altivec() (but | 21 | * you can just "steal" the vec unit with enable_kernel_altivec() (but |
diff --git a/drivers/md/raid6int.uc b/drivers/md/raid6int.uc index f9bf9cba357f..d1e276a14fab 100644 --- a/drivers/md/raid6int.uc +++ b/drivers/md/raid6int.uc | |||
@@ -15,7 +15,7 @@ | |||
15 | * | 15 | * |
16 | * $#-way unrolled portable integer math RAID-6 instruction set | 16 | * $#-way unrolled portable integer math RAID-6 instruction set |
17 | * | 17 | * |
18 | * This file is postprocessed using unroll.pl | 18 | * This file is postprocessed using unroll.awk |
19 | */ | 19 | */ |
20 | 20 | ||
21 | #include <linux/raid/pq.h> | 21 | #include <linux/raid/pq.h> |
diff --git a/drivers/md/raid6test/Makefile b/drivers/md/raid6test/Makefile index 58ffdf4f5161..2874cbef529d 100644 --- a/drivers/md/raid6test/Makefile +++ b/drivers/md/raid6test/Makefile | |||
@@ -7,7 +7,7 @@ CC = gcc | |||
7 | OPTFLAGS = -O2 # Adjust as desired | 7 | OPTFLAGS = -O2 # Adjust as desired |
8 | CFLAGS = -I.. -I ../../../include -g $(OPTFLAGS) | 8 | CFLAGS = -I.. -I ../../../include -g $(OPTFLAGS) |
9 | LD = ld | 9 | LD = ld |
10 | PERL = perl | 10 | AWK = awk |
11 | AR = ar | 11 | AR = ar |
12 | RANLIB = ranlib | 12 | RANLIB = ranlib |
13 | 13 | ||
@@ -35,35 +35,35 @@ raid6.a: raid6int1.o raid6int2.o raid6int4.o raid6int8.o raid6int16.o \ | |||
35 | raid6test: test.c raid6.a | 35 | raid6test: test.c raid6.a |
36 | $(CC) $(CFLAGS) -o raid6test $^ | 36 | $(CC) $(CFLAGS) -o raid6test $^ |
37 | 37 | ||
38 | raid6altivec1.c: raid6altivec.uc ../unroll.pl | 38 | raid6altivec1.c: raid6altivec.uc ../unroll.awk |
39 | $(PERL) ../unroll.pl 1 < raid6altivec.uc > $@ | 39 | $(AWK) ../unroll.awk -vN=1 < raid6altivec.uc > $@ |
40 | 40 | ||
41 | raid6altivec2.c: raid6altivec.uc ../unroll.pl | 41 | raid6altivec2.c: raid6altivec.uc ../unroll.awk |
42 | $(PERL) ../unroll.pl 2 < raid6altivec.uc > $@ | 42 | $(AWK) ../unroll.awk -vN=2 < raid6altivec.uc > $@ |
43 | 43 | ||
44 | raid6altivec4.c: raid6altivec.uc ../unroll.pl | 44 | raid6altivec4.c: raid6altivec.uc ../unroll.awk |
45 | $(PERL) ../unroll.pl 4 < raid6altivec.uc > $@ | 45 | $(AWK) ../unroll.awk -vN=4 < raid6altivec.uc > $@ |
46 | 46 | ||
47 | raid6altivec8.c: raid6altivec.uc ../unroll.pl | 47 | raid6altivec8.c: raid6altivec.uc ../unroll.awk |
48 | $(PERL) ../unroll.pl 8 < raid6altivec.uc > $@ | 48 | $(AWK) ../unroll.awk -vN=8 < raid6altivec.uc > $@ |
49 | 49 | ||
50 | raid6int1.c: raid6int.uc ../unroll.pl | 50 | raid6int1.c: raid6int.uc ../unroll.awk |
51 | $(PERL) ../unroll.pl 1 < raid6int.uc > $@ | 51 | $(AWK) ../unroll.awk -vN=1 < raid6int.uc > $@ |
52 | 52 | ||
53 | raid6int2.c: raid6int.uc ../unroll.pl | 53 | raid6int2.c: raid6int.uc ../unroll.awk |
54 | $(PERL) ../unroll.pl 2 < raid6int.uc > $@ | 54 | $(AWK) ../unroll.awk -vN=2 < raid6int.uc > $@ |
55 | 55 | ||
56 | raid6int4.c: raid6int.uc ../unroll.pl | 56 | raid6int4.c: raid6int.uc ../unroll.awk |
57 | $(PERL) ../unroll.pl 4 < raid6int.uc > $@ | 57 | $(AWK) ../unroll.awk -vN=4 < raid6int.uc > $@ |
58 | 58 | ||
59 | raid6int8.c: raid6int.uc ../unroll.pl | 59 | raid6int8.c: raid6int.uc ../unroll.awk |
60 | $(PERL) ../unroll.pl 8 < raid6int.uc > $@ | 60 | $(AWK) ../unroll.awk -vN=8 < raid6int.uc > $@ |
61 | 61 | ||
62 | raid6int16.c: raid6int.uc ../unroll.pl | 62 | raid6int16.c: raid6int.uc ../unroll.awk |
63 | $(PERL) ../unroll.pl 16 < raid6int.uc > $@ | 63 | $(AWK) ../unroll.awk -vN=16 < raid6int.uc > $@ |
64 | 64 | ||
65 | raid6int32.c: raid6int.uc ../unroll.pl | 65 | raid6int32.c: raid6int.uc ../unroll.awk |
66 | $(PERL) ../unroll.pl 32 < raid6int.uc > $@ | 66 | $(AWK) ../unroll.awk -vN=32 < raid6int.uc > $@ |
67 | 67 | ||
68 | raid6tables.c: mktables | 68 | raid6tables.c: mktables |
69 | ./mktables > raid6tables.c | 69 | ./mktables > raid6tables.c |
diff --git a/drivers/md/unroll.awk b/drivers/md/unroll.awk new file mode 100644 index 000000000000..c6aa03631df8 --- /dev/null +++ b/drivers/md/unroll.awk | |||
@@ -0,0 +1,20 @@ | |||
1 | |||
2 | # This filter requires one command line option of form -vN=n | ||
3 | # where n must be a decimal number. | ||
4 | # | ||
5 | # Repeat each input line containing $$ n times, replacing $$ with 0...n-1. | ||
6 | # Replace each $# with n, and each $* with a single $. | ||
7 | |||
8 | BEGIN { | ||
9 | n = N + 0 | ||
10 | } | ||
11 | { | ||
12 | if (/\$\$/) { rep = n } else { rep = 1 } | ||
13 | for (i = 0; i < rep; ++i) { | ||
14 | tmp = $0 | ||
15 | gsub(/\$\$/, i, tmp) | ||
16 | gsub(/\$\#/, n, tmp) | ||
17 | gsub(/\$\*/, "$", tmp) | ||
18 | print tmp | ||
19 | } | ||
20 | } | ||
diff --git a/drivers/md/unroll.pl b/drivers/md/unroll.pl deleted file mode 100644 index 3acc710a20ea..000000000000 --- a/drivers/md/unroll.pl +++ /dev/null | |||
@@ -1,24 +0,0 @@ | |||
1 | #!/usr/bin/perl | ||
2 | # | ||
3 | # Take a piece of C code and for each line which contains the sequence $$ | ||
4 | # repeat n times with $ replaced by 0...n-1; the sequence $# is replaced | ||
5 | # by the unrolling factor, and $* with a single $ | ||
6 | # | ||
7 | |||
8 | ($n) = @ARGV; | ||
9 | $n += 0; | ||
10 | |||
11 | while ( defined($line = <STDIN>) ) { | ||
12 | if ( $line =~ /\$\$/ ) { | ||
13 | $rep = $n; | ||
14 | } else { | ||
15 | $rep = 1; | ||
16 | } | ||
17 | for ( $i = 0 ; $i < $rep ; $i++ ) { | ||
18 | $tmp = $line; | ||
19 | $tmp =~ s/\$\$/$i/g; | ||
20 | $tmp =~ s/\$\#/$n/g; | ||
21 | $tmp =~ s/\$\*/\$/g; | ||
22 | print $tmp; | ||
23 | } | ||
24 | } | ||
diff --git a/drivers/media/common/tuners/tda18271-fe.c b/drivers/media/common/tuners/tda18271-fe.c index 64595112000d..3a50ce96fcb9 100644 --- a/drivers/media/common/tuners/tda18271-fe.c +++ b/drivers/media/common/tuners/tda18271-fe.c | |||
@@ -616,13 +616,13 @@ static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq) | |||
616 | case RF2: | 616 | case RF2: |
617 | map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] - | 617 | map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] - |
618 | prog_cal[RF1] + prog_tab[RF1]) / | 618 | prog_cal[RF1] + prog_tab[RF1]) / |
619 | ((rf_freq[RF2] - rf_freq[RF1]) / 1000); | 619 | (s32)((rf_freq[RF2] - rf_freq[RF1]) / 1000); |
620 | map[i].rf2 = rf_freq[RF2] / 1000; | 620 | map[i].rf2 = rf_freq[RF2] / 1000; |
621 | break; | 621 | break; |
622 | case RF3: | 622 | case RF3: |
623 | map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] - | 623 | map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] - |
624 | prog_cal[RF2] + prog_tab[RF2]) / | 624 | prog_cal[RF2] + prog_tab[RF2]) / |
625 | ((rf_freq[RF3] - rf_freq[RF2]) / 1000); | 625 | (s32)((rf_freq[RF3] - rf_freq[RF2]) / 1000); |
626 | map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2]; | 626 | map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2]; |
627 | map[i].rf3 = rf_freq[RF3] / 1000; | 627 | map[i].rf3 = rf_freq[RF3] / 1000; |
628 | break; | 628 | break; |
@@ -1000,12 +1000,12 @@ static int tda18271_set_analog_params(struct dvb_frontend *fe, | |||
1000 | struct tda18271_std_map_item *map; | 1000 | struct tda18271_std_map_item *map; |
1001 | char *mode; | 1001 | char *mode; |
1002 | int ret; | 1002 | int ret; |
1003 | u32 freq = params->frequency * 62500; | 1003 | u32 freq = params->frequency * 125 * |
1004 | ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2; | ||
1004 | 1005 | ||
1005 | priv->mode = TDA18271_ANALOG; | 1006 | priv->mode = TDA18271_ANALOG; |
1006 | 1007 | ||
1007 | if (params->mode == V4L2_TUNER_RADIO) { | 1008 | if (params->mode == V4L2_TUNER_RADIO) { |
1008 | freq = freq / 1000; | ||
1009 | map = &std_map->fm_radio; | 1009 | map = &std_map->fm_radio; |
1010 | mode = "fm"; | 1010 | mode = "fm"; |
1011 | } else if (params->std & V4L2_STD_MN) { | 1011 | } else if (params->std & V4L2_STD_MN) { |
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig index 9744b0692417..0e4b97fba384 100644 --- a/drivers/media/dvb/dvb-usb/Kconfig +++ b/drivers/media/dvb/dvb-usb/Kconfig | |||
@@ -75,7 +75,7 @@ config DVB_USB_DIB0700 | |||
75 | select DVB_DIB3000MC if !DVB_FE_CUSTOMISE | 75 | select DVB_DIB3000MC if !DVB_FE_CUSTOMISE |
76 | select DVB_S5H1411 if !DVB_FE_CUSTOMISE | 76 | select DVB_S5H1411 if !DVB_FE_CUSTOMISE |
77 | select DVB_LGDT3305 if !DVB_FE_CUSTOMISE | 77 | select DVB_LGDT3305 if !DVB_FE_CUSTOMISE |
78 | select DVB_TUNER_DIB0070 | 78 | select DVB_TUNER_DIB0070 if !DVB_FE_CUSTOMISE |
79 | select MEDIA_TUNER_MT2060 if !MEDIA_TUNER_CUSTOMISE | 79 | select MEDIA_TUNER_MT2060 if !MEDIA_TUNER_CUSTOMISE |
80 | select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE | 80 | select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE |
81 | select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE | 81 | select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE |
diff --git a/drivers/media/dvb/dvb-usb/ce6230.c b/drivers/media/dvb/dvb-usb/ce6230.c index 0737c6377892..3df2045b7d2d 100644 --- a/drivers/media/dvb/dvb-usb/ce6230.c +++ b/drivers/media/dvb/dvb-usb/ce6230.c | |||
@@ -105,7 +105,7 @@ static int ce6230_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[], | |||
105 | int i = 0; | 105 | int i = 0; |
106 | struct req_t req; | 106 | struct req_t req; |
107 | int ret = 0; | 107 | int ret = 0; |
108 | memset(&req, 0, sizeof(&req)); | 108 | memset(&req, 0, sizeof(req)); |
109 | 109 | ||
110 | if (num > 2) | 110 | if (num > 2) |
111 | return -EINVAL; | 111 | return -EINVAL; |
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c index 0b2812aa30a4..6bd8951ea02b 100644 --- a/drivers/media/dvb/dvb-usb/dib0700_devices.c +++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c | |||
@@ -1925,7 +1925,7 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
1925 | { NULL }, | 1925 | { NULL }, |
1926 | }, | 1926 | }, |
1927 | { "Leadtek Winfast DTV Dongle (STK7700P based)", | 1927 | { "Leadtek Winfast DTV Dongle (STK7700P based)", |
1928 | { &dib0700_usb_id_table[8] }, | 1928 | { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] }, |
1929 | { NULL }, | 1929 | { NULL }, |
1930 | }, | 1930 | }, |
1931 | { "AVerMedia AVerTV DVB-T Express", | 1931 | { "AVerMedia AVerTV DVB-T Express", |
@@ -2064,7 +2064,7 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
2064 | }, | 2064 | }, |
2065 | }, | 2065 | }, |
2066 | 2066 | ||
2067 | .num_device_descs = 12, | 2067 | .num_device_descs = 11, |
2068 | .devices = { | 2068 | .devices = { |
2069 | { "DiBcom STK7070P reference design", | 2069 | { "DiBcom STK7070P reference design", |
2070 | { &dib0700_usb_id_table[15], NULL }, | 2070 | { &dib0700_usb_id_table[15], NULL }, |
@@ -2098,11 +2098,6 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
2098 | { &dib0700_usb_id_table[30], NULL }, | 2098 | { &dib0700_usb_id_table[30], NULL }, |
2099 | { NULL }, | 2099 | { NULL }, |
2100 | }, | 2100 | }, |
2101 | { "Terratec Cinergy T USB XXS/ T3", | ||
2102 | { &dib0700_usb_id_table[33], | ||
2103 | &dib0700_usb_id_table[52], NULL }, | ||
2104 | { NULL }, | ||
2105 | }, | ||
2106 | { "Elgato EyeTV DTT", | 2101 | { "Elgato EyeTV DTT", |
2107 | { &dib0700_usb_id_table[49], NULL }, | 2102 | { &dib0700_usb_id_table[49], NULL }, |
2108 | { NULL }, | 2103 | { NULL }, |
@@ -2343,8 +2338,10 @@ struct dvb_usb_device_properties dib0700_devices[] = { | |||
2343 | { &dib0700_usb_id_table[59], NULL }, | 2338 | { &dib0700_usb_id_table[59], NULL }, |
2344 | { NULL }, | 2339 | { NULL }, |
2345 | }, | 2340 | }, |
2346 | { "Terratec Cinergy T USB XXS (HD)", | 2341 | { "Terratec Cinergy T USB XXS (HD)/ T3", |
2347 | { &dib0700_usb_id_table[34], &dib0700_usb_id_table[60] }, | 2342 | { &dib0700_usb_id_table[33], |
2343 | &dib0700_usb_id_table[52], | ||
2344 | &dib0700_usb_id_table[60], NULL}, | ||
2348 | { NULL }, | 2345 | { NULL }, |
2349 | }, | 2346 | }, |
2350 | }, | 2347 | }, |
diff --git a/drivers/media/dvb/firewire/firedtv-avc.c b/drivers/media/dvb/firewire/firedtv-avc.c index d1b67fe0f011..485d061319ab 100644 --- a/drivers/media/dvb/firewire/firedtv-avc.c +++ b/drivers/media/dvb/firewire/firedtv-avc.c | |||
@@ -1050,28 +1050,28 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length) | |||
1050 | c->operand[4] = 0; /* slot */ | 1050 | c->operand[4] = 0; /* slot */ |
1051 | c->operand[5] = SFE_VENDOR_TAG_CA_PMT; /* ca tag */ | 1051 | c->operand[5] = SFE_VENDOR_TAG_CA_PMT; /* ca tag */ |
1052 | c->operand[6] = 0; /* more/last */ | 1052 | c->operand[6] = 0; /* more/last */ |
1053 | /* c->operand[7] = XXXprogram_info_length + 17; */ /* length */ | 1053 | /* Use three bytes for length field in case length > 127 */ |
1054 | c->operand[8] = list_management; | 1054 | c->operand[10] = list_management; |
1055 | c->operand[9] = 0x01; /* pmt_cmd=OK_descramble */ | 1055 | c->operand[11] = 0x01; /* pmt_cmd=OK_descramble */ |
1056 | 1056 | ||
1057 | /* TS program map table */ | 1057 | /* TS program map table */ |
1058 | 1058 | ||
1059 | c->operand[10] = 0x02; /* Table id=2 */ | 1059 | c->operand[12] = 0x02; /* Table id=2 */ |
1060 | c->operand[11] = 0x80; /* Section syntax + length */ | 1060 | c->operand[13] = 0x80; /* Section syntax + length */ |
1061 | /* c->operand[12] = XXXprogram_info_length + 12; */ | 1061 | /* c->operand[14] = XXXprogram_info_length + 12; */ |
1062 | c->operand[13] = msg[1]; /* Program number */ | 1062 | c->operand[15] = msg[1]; /* Program number */ |
1063 | c->operand[14] = msg[2]; | 1063 | c->operand[16] = msg[2]; |
1064 | c->operand[15] = 0x01; /* Version number=0 + current/next=1 */ | 1064 | c->operand[17] = 0x01; /* Version number=0 + current/next=1 */ |
1065 | c->operand[16] = 0x00; /* Section number=0 */ | 1065 | c->operand[18] = 0x00; /* Section number=0 */ |
1066 | c->operand[17] = 0x00; /* Last section number=0 */ | 1066 | c->operand[19] = 0x00; /* Last section number=0 */ |
1067 | c->operand[18] = 0x1f; /* PCR_PID=1FFF */ | 1067 | c->operand[20] = 0x1f; /* PCR_PID=1FFF */ |
1068 | c->operand[19] = 0xff; | 1068 | c->operand[21] = 0xff; |
1069 | c->operand[20] = (program_info_length >> 8); /* Program info length */ | 1069 | c->operand[22] = (program_info_length >> 8); /* Program info length */ |
1070 | c->operand[21] = (program_info_length & 0xff); | 1070 | c->operand[23] = (program_info_length & 0xff); |
1071 | 1071 | ||
1072 | /* CA descriptors at programme level */ | 1072 | /* CA descriptors at programme level */ |
1073 | read_pos = 6; | 1073 | read_pos = 6; |
1074 | write_pos = 22; | 1074 | write_pos = 24; |
1075 | if (program_info_length > 0) { | 1075 | if (program_info_length > 0) { |
1076 | pmt_cmd_id = msg[read_pos++]; | 1076 | pmt_cmd_id = msg[read_pos++]; |
1077 | if (pmt_cmd_id != 1 && pmt_cmd_id != 4) | 1077 | if (pmt_cmd_id != 1 && pmt_cmd_id != 4) |
@@ -1113,8 +1113,10 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length) | |||
1113 | c->operand[write_pos++] = 0x00; | 1113 | c->operand[write_pos++] = 0x00; |
1114 | c->operand[write_pos++] = 0x00; | 1114 | c->operand[write_pos++] = 0x00; |
1115 | 1115 | ||
1116 | c->operand[7] = write_pos - 8; | 1116 | c->operand[7] = 0x82; |
1117 | c->operand[12] = write_pos - 13; | 1117 | c->operand[8] = (write_pos - 10) >> 8; |
1118 | c->operand[9] = (write_pos - 10) & 0xff; | ||
1119 | c->operand[14] = write_pos - 15; | ||
1118 | 1120 | ||
1119 | crc32_csum = crc32_be(0, &c->operand[10], c->operand[12] - 1); | 1121 | crc32_csum = crc32_be(0, &c->operand[10], c->operand[12] - 1); |
1120 | c->operand[write_pos - 4] = (crc32_csum >> 24) & 0xff; | 1122 | c->operand[write_pos - 4] = (crc32_csum >> 24) & 0xff; |
diff --git a/drivers/media/dvb/firewire/firedtv-fe.c b/drivers/media/dvb/firewire/firedtv-fe.c index 7ba43630a25d..e49cdc88b0c7 100644 --- a/drivers/media/dvb/firewire/firedtv-fe.c +++ b/drivers/media/dvb/firewire/firedtv-fe.c | |||
@@ -141,18 +141,12 @@ static int fdtv_read_uncorrected_blocks(struct dvb_frontend *fe, u32 *ucblocks) | |||
141 | return -EOPNOTSUPP; | 141 | return -EOPNOTSUPP; |
142 | } | 142 | } |
143 | 143 | ||
144 | #define ACCEPTED 0x9 | ||
145 | |||
146 | static int fdtv_set_frontend(struct dvb_frontend *fe, | 144 | static int fdtv_set_frontend(struct dvb_frontend *fe, |
147 | struct dvb_frontend_parameters *params) | 145 | struct dvb_frontend_parameters *params) |
148 | { | 146 | { |
149 | struct firedtv *fdtv = fe->sec_priv; | 147 | struct firedtv *fdtv = fe->sec_priv; |
150 | 148 | ||
151 | /* FIXME: avc_tuner_dsd never returns ACCEPTED. Check status? */ | 149 | return avc_tuner_dsd(fdtv, params); |
152 | if (avc_tuner_dsd(fdtv, params) != ACCEPTED) | ||
153 | return -EINVAL; | ||
154 | else | ||
155 | return 0; /* not sure of this... */ | ||
156 | } | 150 | } |
157 | 151 | ||
158 | static int fdtv_get_frontend(struct dvb_frontend *fe, | 152 | static int fdtv_get_frontend(struct dvb_frontend *fe, |
diff --git a/drivers/media/dvb/frontends/dib0070.h b/drivers/media/dvb/frontends/dib0070.h index 8a2e1e710adb..eec9e52ffa75 100644 --- a/drivers/media/dvb/frontends/dib0070.h +++ b/drivers/media/dvb/frontends/dib0070.h | |||
@@ -51,6 +51,7 @@ struct dib0070_config { | |||
51 | #if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE)) | 51 | #if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE)) |
52 | extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg); | 52 | extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg); |
53 | extern u16 dib0070_wbd_offset(struct dvb_frontend *); | 53 | extern u16 dib0070_wbd_offset(struct dvb_frontend *); |
54 | extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open); | ||
54 | #else | 55 | #else |
55 | static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg) | 56 | static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg) |
56 | { | 57 | { |
@@ -63,7 +64,11 @@ static inline u16 dib0070_wbd_offset(struct dvb_frontend *fe) | |||
63 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | 64 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); |
64 | return -ENODEV; | 65 | return -ENODEV; |
65 | } | 66 | } |
67 | |||
68 | static inline void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open) | ||
69 | { | ||
70 | printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); | ||
71 | } | ||
66 | #endif | 72 | #endif |
67 | extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open); | ||
68 | 73 | ||
69 | #endif | 74 | #endif |
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c index 55ef6eeb0769..0781f94e05d2 100644 --- a/drivers/media/dvb/frontends/dib7000p.c +++ b/drivers/media/dvb/frontends/dib7000p.c | |||
@@ -1375,6 +1375,11 @@ struct dvb_frontend * dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr, | |||
1375 | if (dib7000p_identify(st) != 0) | 1375 | if (dib7000p_identify(st) != 0) |
1376 | goto error; | 1376 | goto error; |
1377 | 1377 | ||
1378 | /* FIXME: make sure the dev.parent field is initialized, or else | ||
1379 | request_firmware() will hit an OOPS (this should be moved somewhere | ||
1380 | more common) */ | ||
1381 | st->i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap->dev.parent; | ||
1382 | |||
1378 | dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); | 1383 | dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); |
1379 | 1384 | ||
1380 | dib7000p_demod_reset(st); | 1385 | dib7000p_demod_reset(st); |
diff --git a/drivers/media/dvb/pt1/pt1.c b/drivers/media/dvb/pt1/pt1.c index 81e623a90f09..1fd8306371e2 100644 --- a/drivers/media/dvb/pt1/pt1.c +++ b/drivers/media/dvb/pt1/pt1.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include <linux/pci.h> | 27 | #include <linux/pci.h> |
28 | #include <linux/kthread.h> | 28 | #include <linux/kthread.h> |
29 | #include <linux/freezer.h> | 29 | #include <linux/freezer.h> |
30 | #include <linux/vmalloc.h> | ||
30 | 31 | ||
31 | #include "dvbdev.h" | 32 | #include "dvbdev.h" |
32 | #include "dvb_demux.h" | 33 | #include "dvb_demux.h" |
diff --git a/drivers/media/dvb/siano/smsusb.c b/drivers/media/dvb/siano/smsusb.c index cb8a358b7310..8f88a586b0dd 100644 --- a/drivers/media/dvb/siano/smsusb.c +++ b/drivers/media/dvb/siano/smsusb.c | |||
@@ -529,6 +529,12 @@ struct usb_device_id smsusb_id_table[] = { | |||
529 | .driver_info = SMS1XXX_BOARD_SIANO_NICE }, | 529 | .driver_info = SMS1XXX_BOARD_SIANO_NICE }, |
530 | { USB_DEVICE(0x187f, 0x0301), | 530 | { USB_DEVICE(0x187f, 0x0301), |
531 | .driver_info = SMS1XXX_BOARD_SIANO_VENICE }, | 531 | .driver_info = SMS1XXX_BOARD_SIANO_VENICE }, |
532 | { USB_DEVICE(0x2040, 0xb900), | ||
533 | .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, | ||
534 | { USB_DEVICE(0x2040, 0xb910), | ||
535 | .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, | ||
536 | { USB_DEVICE(0x2040, 0xc000), | ||
537 | .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM }, | ||
532 | { } /* Terminating entry */ | 538 | { } /* Terminating entry */ |
533 | }; | 539 | }; |
534 | 540 | ||
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c index 939d1e512974..a6724019c66f 100644 --- a/drivers/media/video/bt8xx/bttv-driver.c +++ b/drivers/media/video/bt8xx/bttv-driver.c | |||
@@ -1299,7 +1299,7 @@ set_tvnorm(struct bttv *btv, unsigned int norm) | |||
1299 | 1299 | ||
1300 | tvnorm = &bttv_tvnorms[norm]; | 1300 | tvnorm = &bttv_tvnorms[norm]; |
1301 | 1301 | ||
1302 | if (!memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap, | 1302 | if (memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap, |
1303 | sizeof (tvnorm->cropcap))) { | 1303 | sizeof (tvnorm->cropcap))) { |
1304 | bttv_crop_reset(&btv->crop[0], norm); | 1304 | bttv_crop_reset(&btv->crop[0], norm); |
1305 | btv->crop[1] = btv->crop[0]; /* current = default */ | 1305 | btv->crop[1] = btv->crop[0]; /* current = default */ |
@@ -3800,11 +3800,34 @@ bttv_irq_next_video(struct bttv *btv, struct bttv_buffer_set *set) | |||
3800 | if (!V4L2_FIELD_HAS_BOTH(item->vb.field) && | 3800 | if (!V4L2_FIELD_HAS_BOTH(item->vb.field) && |
3801 | (item->vb.queue.next != &btv->capture)) { | 3801 | (item->vb.queue.next != &btv->capture)) { |
3802 | item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue); | 3802 | item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue); |
3803 | /* Mike Isely <isely@pobox.com> - Only check | ||
3804 | * and set up the bottom field in the logic | ||
3805 | * below. Don't ever do the top field. This | ||
3806 | * of course means that if we set up the | ||
3807 | * bottom field in the above code that we'll | ||
3808 | * actually skip a field. But that's OK. | ||
3809 | * Having processed only a single buffer this | ||
3810 | * time, then the next time around the first | ||
3811 | * available buffer should be for a top field. | ||
3812 | * That will then cause us here to set up a | ||
3813 | * top then a bottom field in the normal way. | ||
3814 | * The alternative to this understanding is | ||
3815 | * that we set up the second available buffer | ||
3816 | * as a top field, but that's out of order | ||
3817 | * since this driver always processes the top | ||
3818 | * field first - the effect will be the two | ||
3819 | * buffers being returned in the wrong order, | ||
3820 | * with the second buffer also being delayed | ||
3821 | * by one field time (owing to the fifo nature | ||
3822 | * of videobuf). Worse still, we'll be stuck | ||
3823 | * doing fields out of order now every time | ||
3824 | * until something else causes a field to be | ||
3825 | * dropped. By effectively forcing a field to | ||
3826 | * drop this way then we always get back into | ||
3827 | * sync within a single frame time. (Out of | ||
3828 | * order fields can screw up deinterlacing | ||
3829 | * algorithms.) */ | ||
3803 | if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) { | 3830 | if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) { |
3804 | if (NULL == set->top && | ||
3805 | V4L2_FIELD_TOP == item->vb.field) { | ||
3806 | set->top = item; | ||
3807 | } | ||
3808 | if (NULL == set->bottom && | 3831 | if (NULL == set->bottom && |
3809 | V4L2_FIELD_BOTTOM == item->vb.field) { | 3832 | V4L2_FIELD_BOTTOM == item->vb.field) { |
3810 | set->bottom = item; | 3833 | set->bottom = item; |
diff --git a/drivers/media/video/em28xx/em28xx-audio.c b/drivers/media/video/em28xx/em28xx-audio.c index 7bd8a70f0a0b..ac947aecb9c3 100644 --- a/drivers/media/video/em28xx/em28xx-audio.c +++ b/drivers/media/video/em28xx/em28xx-audio.c | |||
@@ -383,6 +383,11 @@ static int snd_em28xx_hw_capture_free(struct snd_pcm_substream *substream) | |||
383 | 383 | ||
384 | static int snd_em28xx_prepare(struct snd_pcm_substream *substream) | 384 | static int snd_em28xx_prepare(struct snd_pcm_substream *substream) |
385 | { | 385 | { |
386 | struct em28xx *dev = snd_pcm_substream_chip(substream); | ||
387 | |||
388 | dev->adev.hwptr_done_capture = 0; | ||
389 | dev->adev.capture_transfer_done = 0; | ||
390 | |||
386 | return 0; | 391 | return 0; |
387 | } | 392 | } |
388 | 393 | ||
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c index 59400e858965..a27afeb6f39b 100644 --- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c +++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c | |||
@@ -35,12 +35,25 @@ static | |||
35 | const | 35 | const |
36 | struct dmi_system_id s5k4aa_vflip_dmi_table[] = { | 36 | struct dmi_system_id s5k4aa_vflip_dmi_table[] = { |
37 | { | 37 | { |
38 | .ident = "BRUNEINIT", | ||
39 | .matches = { | ||
40 | DMI_MATCH(DMI_SYS_VENDOR, "BRUNENIT"), | ||
41 | DMI_MATCH(DMI_PRODUCT_NAME, "BRUNENIT"), | ||
42 | DMI_MATCH(DMI_BOARD_VERSION, "00030D0000000001") | ||
43 | } | ||
44 | }, { | ||
38 | .ident = "Fujitsu-Siemens Amilo Xa 2528", | 45 | .ident = "Fujitsu-Siemens Amilo Xa 2528", |
39 | .matches = { | 46 | .matches = { |
40 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | 47 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), |
41 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528") | 48 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528") |
42 | } | 49 | } |
43 | }, { | 50 | }, { |
51 | .ident = "Fujitsu-Siemens Amilo Xi 2528", | ||
52 | .matches = { | ||
53 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | ||
54 | DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xi 2528") | ||
55 | } | ||
56 | }, { | ||
44 | .ident = "Fujitsu-Siemens Amilo Xi 2550", | 57 | .ident = "Fujitsu-Siemens Amilo Xi 2550", |
45 | .matches = { | 58 | .matches = { |
46 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), | 59 | DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), |
@@ -57,6 +70,13 @@ static | |||
57 | .matches = { | 70 | .matches = { |
58 | DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), | 71 | DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), |
59 | DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), | 72 | DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), |
73 | DMI_MATCH(DMI_BIOS_DATE, "12/02/2008") | ||
74 | } | ||
75 | }, { | ||
76 | .ident = "MSI GX700", | ||
77 | .matches = { | ||
78 | DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), | ||
79 | DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), | ||
60 | DMI_MATCH(DMI_BIOS_DATE, "07/26/2007") | 80 | DMI_MATCH(DMI_BIOS_DATE, "07/26/2007") |
61 | } | 81 | } |
62 | }, { | 82 | }, { |
diff --git a/drivers/media/video/gspca/mr97310a.c b/drivers/media/video/gspca/mr97310a.c index 140c8f320e47..f8328b9efae5 100644 --- a/drivers/media/video/gspca/mr97310a.c +++ b/drivers/media/video/gspca/mr97310a.c | |||
@@ -483,7 +483,7 @@ static int start_cif_cam(struct gspca_dev *gspca_dev) | |||
483 | data[3] = 0x2c; /* reg 2, H size/8 */ | 483 | data[3] = 0x2c; /* reg 2, H size/8 */ |
484 | data[4] = 0x48; /* reg 3, V size/4 */ | 484 | data[4] = 0x48; /* reg 3, V size/4 */ |
485 | data[6] = 0x06; /* reg 5, H start */ | 485 | data[6] = 0x06; /* reg 5, H start */ |
486 | data[8] = 0x06 + sd->sensor_type; /* reg 7, V start */ | 486 | data[8] = 0x06 - sd->sensor_type; /* reg 7, V start */ |
487 | break; | 487 | break; |
488 | } | 488 | } |
489 | err_code = mr_write(gspca_dev, 11); | 489 | err_code = mr_write(gspca_dev, 11); |
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c index 2f6e135d94bc..a5c190e93799 100644 --- a/drivers/media/video/gspca/ov519.c +++ b/drivers/media/video/gspca/ov519.c | |||
@@ -2919,7 +2919,7 @@ static void ov518_pkt_scan(struct gspca_dev *gspca_dev, | |||
2919 | /* A false positive here is likely, until OVT gives me | 2919 | /* A false positive here is likely, until OVT gives me |
2920 | * the definitive SOF/EOF format */ | 2920 | * the definitive SOF/EOF format */ |
2921 | if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { | 2921 | if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { |
2922 | gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); | 2922 | frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); |
2923 | gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0); | 2923 | gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0); |
2924 | sd->packet_nr = 0; | 2924 | sd->packet_nr = 0; |
2925 | } | 2925 | } |
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.c b/drivers/media/video/gspca/stv06xx/stv06xx.c index 65489d6b0d89..bfae63f5584c 100644 --- a/drivers/media/video/gspca/stv06xx/stv06xx.c +++ b/drivers/media/video/gspca/stv06xx/stv06xx.c | |||
@@ -394,7 +394,8 @@ frame_data: | |||
394 | PDEBUG(D_PACK, "End of frame detected"); | 394 | PDEBUG(D_PACK, "End of frame detected"); |
395 | 395 | ||
396 | /* Complete the last frame (if any) */ | 396 | /* Complete the last frame (if any) */ |
397 | gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); | 397 | frame = gspca_frame_add(gspca_dev, LAST_PACKET, |
398 | frame, data, 0); | ||
398 | 399 | ||
399 | if (chunk_len) | 400 | if (chunk_len) |
400 | PDEBUG(D_ERR, "Chunk length is " | 401 | PDEBUG(D_ERR, "Chunk length is " |
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c index 6952e9602d5d..51b683c63b70 100644 --- a/drivers/media/video/pxa_camera.c +++ b/drivers/media/video/pxa_camera.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/device.h> | 26 | #include <linux/device.h> |
27 | #include <linux/platform_device.h> | 27 | #include <linux/platform_device.h> |
28 | #include <linux/clk.h> | 28 | #include <linux/clk.h> |
29 | #include <linux/sched.h> | ||
29 | 30 | ||
30 | #include <media/v4l2-common.h> | 31 | #include <media/v4l2-common.h> |
31 | #include <media/v4l2-dev.h> | 32 | #include <media/v4l2-dev.h> |
@@ -1432,7 +1433,9 @@ static int pxa_camera_set_fmt(struct soc_camera_device *icd, | |||
1432 | icd->sense = &sense; | 1433 | icd->sense = &sense; |
1433 | 1434 | ||
1434 | cam_f.fmt.pix.pixelformat = cam_fmt->fourcc; | 1435 | cam_f.fmt.pix.pixelformat = cam_fmt->fourcc; |
1435 | ret = v4l2_subdev_call(sd, video, s_fmt, f); | 1436 | ret = v4l2_subdev_call(sd, video, s_fmt, &cam_f); |
1437 | cam_f.fmt.pix.pixelformat = pix->pixelformat; | ||
1438 | *pix = cam_f.fmt.pix; | ||
1436 | 1439 | ||
1437 | icd->sense = NULL; | 1440 | icd->sense = NULL; |
1438 | 1441 | ||
diff --git a/drivers/media/video/s2255drv.c b/drivers/media/video/s2255drv.c index 9e3262c0ba37..2c0bb06cab3b 100644 --- a/drivers/media/video/s2255drv.c +++ b/drivers/media/video/s2255drv.c | |||
@@ -598,11 +598,6 @@ static int s2255_got_frame(struct s2255_dev *dev, int chn, int jpgsize) | |||
598 | buf = list_entry(dma_q->active.next, | 598 | buf = list_entry(dma_q->active.next, |
599 | struct s2255_buffer, vb.queue); | 599 | struct s2255_buffer, vb.queue); |
600 | 600 | ||
601 | if (!waitqueue_active(&buf->vb.done)) { | ||
602 | /* no one active */ | ||
603 | rc = -1; | ||
604 | goto unlock; | ||
605 | } | ||
606 | list_del(&buf->vb.queue); | 601 | list_del(&buf->vb.queue); |
607 | do_gettimeofday(&buf->vb.ts); | 602 | do_gettimeofday(&buf->vb.ts); |
608 | dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i); | 603 | dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i); |
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c index 71145bff94fa..09013229d4aa 100644 --- a/drivers/media/video/saa7134/saa7134-cards.c +++ b/drivers/media/video/saa7134/saa7134-cards.c | |||
@@ -3428,6 +3428,7 @@ struct saa7134_board saa7134_boards[] = { | |||
3428 | .tuner_config = 3, | 3428 | .tuner_config = 3, |
3429 | .mpeg = SAA7134_MPEG_DVB, | 3429 | .mpeg = SAA7134_MPEG_DVB, |
3430 | .ts_type = SAA7134_MPEG_TS_SERIAL, | 3430 | .ts_type = SAA7134_MPEG_TS_SERIAL, |
3431 | .ts_force_val = 1, | ||
3431 | .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */ | 3432 | .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */ |
3432 | .inputs = {{ | 3433 | .inputs = {{ |
3433 | .name = name_tv, | 3434 | .name = name_tv, |
diff --git a/drivers/media/video/saa7134/saa7134-ts.c b/drivers/media/video/saa7134/saa7134-ts.c index 3fa652279ac0..03488ba4c99c 100644 --- a/drivers/media/video/saa7134/saa7134-ts.c +++ b/drivers/media/video/saa7134/saa7134-ts.c | |||
@@ -262,11 +262,13 @@ int saa7134_ts_start(struct saa7134_dev *dev) | |||
262 | switch (saa7134_boards[dev->board].ts_type) { | 262 | switch (saa7134_boards[dev->board].ts_type) { |
263 | case SAA7134_MPEG_TS_PARALLEL: | 263 | case SAA7134_MPEG_TS_PARALLEL: |
264 | saa_writeb(SAA7134_TS_SERIAL0, 0x40); | 264 | saa_writeb(SAA7134_TS_SERIAL0, 0x40); |
265 | saa_writeb(SAA7134_TS_PARALLEL, 0xec); | 265 | saa_writeb(SAA7134_TS_PARALLEL, 0xec | |
266 | (saa7134_boards[dev->board].ts_force_val << 4)); | ||
266 | break; | 267 | break; |
267 | case SAA7134_MPEG_TS_SERIAL: | 268 | case SAA7134_MPEG_TS_SERIAL: |
268 | saa_writeb(SAA7134_TS_SERIAL0, 0xd8); | 269 | saa_writeb(SAA7134_TS_SERIAL0, 0xd8); |
269 | saa_writeb(SAA7134_TS_PARALLEL, 0x6c); | 270 | saa_writeb(SAA7134_TS_PARALLEL, 0x6c | |
271 | (saa7134_boards[dev->board].ts_force_val << 4)); | ||
270 | saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); | 272 | saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); |
271 | saa_writeb(SAA7134_TS_SERIAL1, 0x02); | 273 | saa_writeb(SAA7134_TS_SERIAL1, 0x02); |
272 | break; | 274 | break; |
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h index 6ee3e9b7769e..f8697d46ff5f 100644 --- a/drivers/media/video/saa7134/saa7134.h +++ b/drivers/media/video/saa7134/saa7134.h | |||
@@ -360,6 +360,7 @@ struct saa7134_board { | |||
360 | enum saa7134_mpeg_type mpeg; | 360 | enum saa7134_mpeg_type mpeg; |
361 | enum saa7134_mpeg_ts_type ts_type; | 361 | enum saa7134_mpeg_ts_type ts_type; |
362 | unsigned int vid_port_opts; | 362 | unsigned int vid_port_opts; |
363 | unsigned int ts_force_val:1; | ||
363 | }; | 364 | }; |
364 | 365 | ||
365 | #define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name) | 366 | #define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name) |
diff --git a/drivers/media/video/saa7164/saa7164-cmd.c b/drivers/media/video/saa7164/saa7164-cmd.c index c45966edc0cf..9c1d3ac43869 100644 --- a/drivers/media/video/saa7164/saa7164-cmd.c +++ b/drivers/media/video/saa7164/saa7164-cmd.c | |||
@@ -347,7 +347,7 @@ int saa7164_cmd_send(struct saa7164_dev *dev, u8 id, tmComResCmd_t command, | |||
347 | 347 | ||
348 | /* Prepare some basic command/response structures */ | 348 | /* Prepare some basic command/response structures */ |
349 | memset(&command_t, 0, sizeof(command_t)); | 349 | memset(&command_t, 0, sizeof(command_t)); |
350 | memset(&response_t, 0, sizeof(&response_t)); | 350 | memset(&response_t, 0, sizeof(response_t)); |
351 | pcommand_t = &command_t; | 351 | pcommand_t = &command_t; |
352 | presponse_t = &response_t; | 352 | presponse_t = &response_t; |
353 | command_t.id = id; | 353 | command_t.id = id; |
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c index 65ac474c517a..2f78b4f263f5 100644 --- a/drivers/media/video/sh_mobile_ceu_camera.c +++ b/drivers/media/video/sh_mobile_ceu_camera.c | |||
@@ -1173,8 +1173,8 @@ static int get_scales(struct soc_camera_device *icd, | |||
1173 | width_in = scale_up(cam->ceu_rect.width, *scale_h); | 1173 | width_in = scale_up(cam->ceu_rect.width, *scale_h); |
1174 | height_in = scale_up(cam->ceu_rect.height, *scale_v); | 1174 | height_in = scale_up(cam->ceu_rect.height, *scale_v); |
1175 | 1175 | ||
1176 | *scale_h = calc_generic_scale(cam->ceu_rect.width, icd->user_width); | 1176 | *scale_h = calc_generic_scale(width_in, icd->user_width); |
1177 | *scale_v = calc_generic_scale(cam->ceu_rect.height, icd->user_height); | 1177 | *scale_v = calc_generic_scale(height_in, icd->user_height); |
1178 | 1178 | ||
1179 | return 0; | 1179 | return 0; |
1180 | } | 1180 | } |
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c index 59aa7a3694c2..36e617bd13c7 100644 --- a/drivers/media/video/soc_camera.c +++ b/drivers/media/video/soc_camera.c | |||
@@ -1160,13 +1160,15 @@ void soc_camera_host_unregister(struct soc_camera_host *ici) | |||
1160 | if (icd->iface == ici->nr) { | 1160 | if (icd->iface == ici->nr) { |
1161 | /* The bus->remove will be called */ | 1161 | /* The bus->remove will be called */ |
1162 | device_unregister(&icd->dev); | 1162 | device_unregister(&icd->dev); |
1163 | /* Not before device_unregister(), .remove | 1163 | /* |
1164 | * needs parent to call ici->ops->remove() */ | 1164 | * Not before device_unregister(), .remove |
1165 | icd->dev.parent = NULL; | 1165 | * needs parent to call ici->ops->remove(). |
1166 | 1166 | * If the host module is loaded again, device_register() | |
1167 | /* If the host module is loaded again, device_register() | 1167 | * would complain "already initialised," since 2.6.32 |
1168 | * would complain "already initialised" */ | 1168 | * this is also needed to prevent use-after-free of the |
1169 | memset(&icd->dev.kobj, 0, sizeof(icd->dev.kobj)); | 1169 | * device private data. |
1170 | */ | ||
1171 | memset(&icd->dev, 0, sizeof(icd->dev)); | ||
1170 | } | 1172 | } |
1171 | } | 1173 | } |
1172 | 1174 | ||
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c index c3225a561748..1b89735e62fd 100644 --- a/drivers/media/video/uvc/uvc_ctrl.c +++ b/drivers/media/video/uvc/uvc_ctrl.c | |||
@@ -348,7 +348,7 @@ static void uvc_ctrl_set_zoom(struct uvc_control_mapping *mapping, | |||
348 | __s32 value, __u8 *data) | 348 | __s32 value, __u8 *data) |
349 | { | 349 | { |
350 | data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff; | 350 | data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff; |
351 | data[2] = min(abs(value), 0xff); | 351 | data[2] = min((int)abs(value), 0xff); |
352 | } | 352 | } |
353 | 353 | ||
354 | static struct uvc_control_mapping uvc_ctrl_mappings[] = { | 354 | static struct uvc_control_mapping uvc_ctrl_mappings[] = { |
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c index f960e8ea4f17..a6e41d12b221 100644 --- a/drivers/media/video/uvc/uvc_video.c +++ b/drivers/media/video/uvc/uvc_video.c | |||
@@ -90,7 +90,8 @@ static void uvc_fixup_video_ctrl(struct uvc_streaming *stream, | |||
90 | ctrl->dwMaxVideoFrameSize = | 90 | ctrl->dwMaxVideoFrameSize = |
91 | frame->dwMaxVideoFrameBufferSize; | 91 | frame->dwMaxVideoFrameBufferSize; |
92 | 92 | ||
93 | if (stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH && | 93 | if (!(format->flags & UVC_FMT_FLAG_COMPRESSED) && |
94 | stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH && | ||
94 | stream->intf->num_altsetting > 1) { | 95 | stream->intf->num_altsetting > 1) { |
95 | u32 interval; | 96 | u32 interval; |
96 | u32 bandwidth; | 97 | u32 bandwidth; |
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c index e832e975da60..a1c47ee95c0e 100644 --- a/drivers/mfd/twl4030-core.c +++ b/drivers/mfd/twl4030-core.c | |||
@@ -795,7 +795,7 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id) | |||
795 | twl->client = i2c_new_dummy(client->adapter, | 795 | twl->client = i2c_new_dummy(client->adapter, |
796 | twl->address); | 796 | twl->address); |
797 | if (!twl->client) { | 797 | if (!twl->client) { |
798 | dev_err(&twl->client->dev, | 798 | dev_err(&client->dev, |
799 | "can't attach client %d\n", i); | 799 | "can't attach client %d\n", i); |
800 | status = -ENOMEM; | 800 | status = -ENOMEM; |
801 | goto fail; | 801 | goto fail; |
diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c index d3015dfb9134..ac056ea6b66e 100644 --- a/drivers/mfd/wm831x-irq.c +++ b/drivers/mfd/wm831x-irq.c | |||
@@ -507,6 +507,8 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq) | |||
507 | { | 507 | { |
508 | int i, ret; | 508 | int i, ret; |
509 | 509 | ||
510 | mutex_init(&wm831x->irq_lock); | ||
511 | |||
510 | if (!irq) { | 512 | if (!irq) { |
511 | dev_warn(wm831x->dev, | 513 | dev_warn(wm831x->dev, |
512 | "No interrupt specified - functionality limited\n"); | 514 | "No interrupt specified - functionality limited\n"); |
@@ -521,7 +523,6 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq) | |||
521 | } | 523 | } |
522 | 524 | ||
523 | wm831x->irq = irq; | 525 | wm831x->irq = irq; |
524 | mutex_init(&wm831x->irq_lock); | ||
525 | INIT_WORK(&wm831x->irq_work, wm831x_irq_worker); | 526 | INIT_WORK(&wm831x->irq_work, wm831x_irq_worker); |
526 | 527 | ||
527 | /* Mask the individual interrupt sources */ | 528 | /* Mask the individual interrupt sources */ |
diff --git a/drivers/misc/sgi-gru/gruprocfs.c b/drivers/misc/sgi-gru/gruprocfs.c index ccd4408a26c7..3f2375c5ba5b 100644 --- a/drivers/misc/sgi-gru/gruprocfs.c +++ b/drivers/misc/sgi-gru/gruprocfs.c | |||
@@ -161,14 +161,15 @@ static int options_show(struct seq_file *s, void *p) | |||
161 | static ssize_t options_write(struct file *file, const char __user *userbuf, | 161 | static ssize_t options_write(struct file *file, const char __user *userbuf, |
162 | size_t count, loff_t *data) | 162 | size_t count, loff_t *data) |
163 | { | 163 | { |
164 | unsigned long val; | 164 | char buf[20]; |
165 | char buf[80]; | ||
166 | 165 | ||
167 | if (strncpy_from_user(buf, userbuf, sizeof(buf) - 1) < 0) | 166 | if (count >= sizeof(buf)) |
167 | return -EINVAL; | ||
168 | if (copy_from_user(buf, userbuf, count)) | ||
168 | return -EFAULT; | 169 | return -EFAULT; |
169 | buf[count - 1] = '\0'; | 170 | buf[count] = '\0'; |
170 | if (!strict_strtoul(buf, 10, &val)) | 171 | if (strict_strtoul(buf, 0, &gru_options)) |
171 | gru_options = val; | 172 | return -EINVAL; |
172 | 173 | ||
173 | return count; | 174 | return count; |
174 | } | 175 | } |
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c index e7a331de5733..b8fd7af1ceeb 100644 --- a/drivers/mmc/host/omap.c +++ b/drivers/mmc/host/omap.c | |||
@@ -1529,6 +1529,7 @@ static int mmc_omap_remove(struct platform_device *pdev) | |||
1529 | host->pdata->cleanup(&pdev->dev); | 1529 | host->pdata->cleanup(&pdev->dev); |
1530 | 1530 | ||
1531 | mmc_omap_fclk_enable(host, 0); | 1531 | mmc_omap_fclk_enable(host, 0); |
1532 | free_irq(host->irq, host); | ||
1532 | clk_put(host->fclk); | 1533 | clk_put(host->fclk); |
1533 | clk_disable(host->iclk); | 1534 | clk_disable(host->iclk); |
1534 | clk_put(host->iclk); | 1535 | clk_put(host->iclk); |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 4487cc097911..0aecaaebef3d 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
@@ -2013,7 +2013,7 @@ static struct platform_driver omap_hsmmc_driver = { | |||
2013 | static int __init omap_hsmmc_init(void) | 2013 | static int __init omap_hsmmc_init(void) |
2014 | { | 2014 | { |
2015 | /* Register the MMC driver */ | 2015 | /* Register the MMC driver */ |
2016 | return platform_driver_register(&omap_hsmmc_driver); | 2016 | return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe); |
2017 | } | 2017 | } |
2018 | 2018 | ||
2019 | static void __exit omap_hsmmc_cleanup(void) | 2019 | static void __exit omap_hsmmc_cleanup(void) |
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig index 841e085ab74a..14be0755d7cd 100644 --- a/drivers/mtd/maps/Kconfig +++ b/drivers/mtd/maps/Kconfig | |||
@@ -486,6 +486,7 @@ config MTD_BFIN_ASYNC | |||
486 | 486 | ||
487 | config MTD_GPIO_ADDR | 487 | config MTD_GPIO_ADDR |
488 | tristate "GPIO-assisted Flash Chip Support" | 488 | tristate "GPIO-assisted Flash Chip Support" |
489 | depends on GENERIC_GPIO || GPIOLIB | ||
489 | depends on MTD_COMPLEX_MAPPINGS | 490 | depends on MTD_COMPLEX_MAPPINGS |
490 | select MTD_PARTITIONS | 491 | select MTD_PARTITIONS |
491 | help | 492 | help |
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index 1d5cf8636723..ae2f6dbe43c3 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile | |||
@@ -58,4 +58,6 @@ obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o | |||
58 | obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o | 58 | obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o |
59 | obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o | 59 | obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o |
60 | obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o | 60 | obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o |
61 | obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o | ||
62 | obj-$(CONFIG_MTD_VMU) += vmu-flash.o | ||
61 | obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o | 63 | obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o |
diff --git a/drivers/mtd/maps/gpio-addr-flash.c b/drivers/mtd/maps/gpio-addr-flash.c index 44ef9a49a860..1ad5caf9fe69 100644 --- a/drivers/mtd/maps/gpio-addr-flash.c +++ b/drivers/mtd/maps/gpio-addr-flash.c | |||
@@ -13,7 +13,9 @@ | |||
13 | * Licensed under the GPL-2 or later. | 13 | * Licensed under the GPL-2 or later. |
14 | */ | 14 | */ |
15 | 15 | ||
16 | #include <linux/gpio.h> | ||
16 | #include <linux/init.h> | 17 | #include <linux/init.h> |
18 | #include <linux/io.h> | ||
17 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
18 | #include <linux/module.h> | 20 | #include <linux/module.h> |
19 | #include <linux/mtd/mtd.h> | 21 | #include <linux/mtd/mtd.h> |
@@ -23,9 +25,6 @@ | |||
23 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
24 | #include <linux/types.h> | 26 | #include <linux/types.h> |
25 | 27 | ||
26 | #include <asm/gpio.h> | ||
27 | #include <asm/io.h> | ||
28 | |||
29 | #define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); }) | 28 | #define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); }) |
30 | 29 | ||
31 | #define DRIVER_NAME "gpio-addr-flash" | 30 | #define DRIVER_NAME "gpio-addr-flash" |
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c index fdb97f3d30e9..d7a47574d21e 100644 --- a/drivers/mtd/maps/sa1100-flash.c +++ b/drivers/mtd/maps/sa1100-flash.c | |||
@@ -209,8 +209,8 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r | |||
209 | } | 209 | } |
210 | subdev->mtd->owner = THIS_MODULE; | 210 | subdev->mtd->owner = THIS_MODULE; |
211 | 211 | ||
212 | printk(KERN_INFO "SA1100 flash: CFI device at 0x%08lx, %dMiB, " | 212 | printk(KERN_INFO "SA1100 flash: CFI device at 0x%08lx, %uMiB, %d-bit\n", |
213 | "%d-bit\n", phys, subdev->mtd->size >> 20, | 213 | phys, (unsigned)(subdev->mtd->size >> 20), |
214 | subdev->map.bankwidth * 8); | 214 | subdev->map.bankwidth * 8); |
215 | 215 | ||
216 | return 0; | 216 | return 0; |
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 22113865438b..2957cc70da3d 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c | |||
@@ -761,6 +761,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip) | |||
761 | * @mtd: mtd info structure | 761 | * @mtd: mtd info structure |
762 | * @chip: nand chip info structure | 762 | * @chip: nand chip info structure |
763 | * @buf: buffer to store read data | 763 | * @buf: buffer to store read data |
764 | * @page: page number to read | ||
764 | * | 765 | * |
765 | * Not for syndrome calculating ecc controllers, which use a special oob layout | 766 | * Not for syndrome calculating ecc controllers, which use a special oob layout |
766 | */ | 767 | */ |
@@ -777,6 +778,7 @@ static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, | |||
777 | * @mtd: mtd info structure | 778 | * @mtd: mtd info structure |
778 | * @chip: nand chip info structure | 779 | * @chip: nand chip info structure |
779 | * @buf: buffer to store read data | 780 | * @buf: buffer to store read data |
781 | * @page: page number to read | ||
780 | * | 782 | * |
781 | * We need a special oob layout and handling even when OOB isn't used. | 783 | * We need a special oob layout and handling even when OOB isn't used. |
782 | */ | 784 | */ |
@@ -818,6 +820,7 @@ static int nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *c | |||
818 | * @mtd: mtd info structure | 820 | * @mtd: mtd info structure |
819 | * @chip: nand chip info structure | 821 | * @chip: nand chip info structure |
820 | * @buf: buffer to store read data | 822 | * @buf: buffer to store read data |
823 | * @page: page number to read | ||
821 | */ | 824 | */ |
822 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, | 825 | static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, |
823 | uint8_t *buf, int page) | 826 | uint8_t *buf, int page) |
@@ -939,6 +942,7 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint3 | |||
939 | * @mtd: mtd info structure | 942 | * @mtd: mtd info structure |
940 | * @chip: nand chip info structure | 943 | * @chip: nand chip info structure |
941 | * @buf: buffer to store read data | 944 | * @buf: buffer to store read data |
945 | * @page: page number to read | ||
942 | * | 946 | * |
943 | * Not for syndrome calculating ecc controllers which need a special oob layout | 947 | * Not for syndrome calculating ecc controllers which need a special oob layout |
944 | */ | 948 | */ |
@@ -983,6 +987,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, | |||
983 | * @mtd: mtd info structure | 987 | * @mtd: mtd info structure |
984 | * @chip: nand chip info structure | 988 | * @chip: nand chip info structure |
985 | * @buf: buffer to store read data | 989 | * @buf: buffer to store read data |
990 | * @page: page number to read | ||
986 | * | 991 | * |
987 | * Hardware ECC for large page chips, require OOB to be read first. | 992 | * Hardware ECC for large page chips, require OOB to be read first. |
988 | * For this ECC mode, the write_page method is re-used from ECC_HW. | 993 | * For this ECC mode, the write_page method is re-used from ECC_HW. |
@@ -1031,6 +1036,7 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd, | |||
1031 | * @mtd: mtd info structure | 1036 | * @mtd: mtd info structure |
1032 | * @chip: nand chip info structure | 1037 | * @chip: nand chip info structure |
1033 | * @buf: buffer to store read data | 1038 | * @buf: buffer to store read data |
1039 | * @page: page number to read | ||
1034 | * | 1040 | * |
1035 | * The hw generator calculates the error syndrome automatically. Therefor | 1041 | * The hw generator calculates the error syndrome automatically. Therefor |
1036 | * we need a special oob layout and handling. | 1042 | * we need a special oob layout and handling. |
diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c index e1f7d0a78b9d..14cec04c34f9 100644 --- a/drivers/mtd/ubi/build.c +++ b/drivers/mtd/ubi/build.c | |||
@@ -42,6 +42,7 @@ | |||
42 | #include <linux/log2.h> | 42 | #include <linux/log2.h> |
43 | #include <linux/kthread.h> | 43 | #include <linux/kthread.h> |
44 | #include <linux/reboot.h> | 44 | #include <linux/reboot.h> |
45 | #include <linux/kernel.h> | ||
45 | #include "ubi.h" | 46 | #include "ubi.h" |
46 | 47 | ||
47 | /* Maximum length of the 'mtd=' parameter */ | 48 | /* Maximum length of the 'mtd=' parameter */ |
@@ -1257,7 +1258,7 @@ static int __init bytes_str_to_int(const char *str) | |||
1257 | unsigned long result; | 1258 | unsigned long result; |
1258 | 1259 | ||
1259 | result = simple_strtoul(str, &endp, 0); | 1260 | result = simple_strtoul(str, &endp, 0); |
1260 | if (str == endp || result < 0) { | 1261 | if (str == endp || result >= INT_MAX) { |
1261 | printk(KERN_ERR "UBI error: incorrect bytes count: \"%s\"\n", | 1262 | printk(KERN_ERR "UBI error: incorrect bytes count: \"%s\"\n", |
1262 | str); | 1263 | str); |
1263 | return -EINVAL; | 1264 | return -EINVAL; |
diff --git a/drivers/mtd/ubi/scan.c b/drivers/mtd/ubi/scan.c index e7161adc419d..90af61a2c3e4 100644 --- a/drivers/mtd/ubi/scan.c +++ b/drivers/mtd/ubi/scan.c | |||
@@ -794,16 +794,15 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si, | |||
794 | * number. | 794 | * number. |
795 | */ | 795 | */ |
796 | image_seq = be32_to_cpu(ech->image_seq); | 796 | image_seq = be32_to_cpu(ech->image_seq); |
797 | if (!si->image_seq_set) { | 797 | if (!ubi->image_seq && image_seq) |
798 | ubi->image_seq = image_seq; | 798 | ubi->image_seq = image_seq; |
799 | si->image_seq_set = 1; | 799 | if (ubi->image_seq && image_seq && |
800 | } else if (ubi->image_seq && ubi->image_seq != image_seq) { | 800 | ubi->image_seq != image_seq) { |
801 | ubi_err("bad image sequence number %d in PEB %d, " | 801 | ubi_err("bad image sequence number %d in PEB %d, " |
802 | "expected %d", image_seq, pnum, ubi->image_seq); | 802 | "expected %d", image_seq, pnum, ubi->image_seq); |
803 | ubi_dbg_dump_ec_hdr(ech); | 803 | ubi_dbg_dump_ec_hdr(ech); |
804 | return -EINVAL; | 804 | return -EINVAL; |
805 | } | 805 | } |
806 | |||
807 | } | 806 | } |
808 | 807 | ||
809 | /* OK, we've done with the EC header, let's look at the VID header */ | 808 | /* OK, we've done with the EC header, let's look at the VID header */ |
diff --git a/drivers/mtd/ubi/scan.h b/drivers/mtd/ubi/scan.h index bab31695dace..ff179ad7ca55 100644 --- a/drivers/mtd/ubi/scan.h +++ b/drivers/mtd/ubi/scan.h | |||
@@ -103,7 +103,6 @@ struct ubi_scan_volume { | |||
103 | * @ec_sum: a temporary variable used when calculating @mean_ec | 103 | * @ec_sum: a temporary variable used when calculating @mean_ec |
104 | * @ec_count: a temporary variable used when calculating @mean_ec | 104 | * @ec_count: a temporary variable used when calculating @mean_ec |
105 | * @corr_count: count of corrupted PEBs | 105 | * @corr_count: count of corrupted PEBs |
106 | * @image_seq_set: indicates @ubi->image_seq is known | ||
107 | * | 106 | * |
108 | * This data structure contains the result of scanning and may be used by other | 107 | * This data structure contains the result of scanning and may be used by other |
109 | * UBI sub-systems to build final UBI data structures, further error-recovery | 108 | * UBI sub-systems to build final UBI data structures, further error-recovery |
@@ -127,7 +126,6 @@ struct ubi_scan_info { | |||
127 | uint64_t ec_sum; | 126 | uint64_t ec_sum; |
128 | int ec_count; | 127 | int ec_count; |
129 | int corr_count; | 128 | int corr_count; |
130 | int image_seq_set; | ||
131 | }; | 129 | }; |
132 | 130 | ||
133 | struct ubi_device; | 131 | struct ubi_device; |
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c index 04f63c77071d..ce6f1ac25df8 100644 --- a/drivers/net/au1000_eth.c +++ b/drivers/net/au1000_eth.c | |||
@@ -34,6 +34,7 @@ | |||
34 | * | 34 | * |
35 | * | 35 | * |
36 | */ | 36 | */ |
37 | #include <linux/capability.h> | ||
37 | #include <linux/dma-mapping.h> | 38 | #include <linux/dma-mapping.h> |
38 | #include <linux/module.h> | 39 | #include <linux/module.h> |
39 | #include <linux/kernel.h> | 40 | #include <linux/kernel.h> |
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h index a80da0e14a52..3b79a225628a 100644 --- a/drivers/net/benet/be.h +++ b/drivers/net/benet/be.h | |||
@@ -259,6 +259,8 @@ struct be_adapter { | |||
259 | u32 port_num; | 259 | u32 port_num; |
260 | bool promiscuous; | 260 | bool promiscuous; |
261 | u32 cap; | 261 | u32 cap; |
262 | u32 rx_fc; /* Rx flow control */ | ||
263 | u32 tx_fc; /* Tx flow control */ | ||
262 | }; | 264 | }; |
263 | 265 | ||
264 | extern const struct ethtool_ops be_ethtool_ops; | 266 | extern const struct ethtool_ops be_ethtool_ops; |
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h index 49953787e41c..e5f9676cf1bc 100644 --- a/drivers/net/benet/be_cmds.h +++ b/drivers/net/benet/be_cmds.h | |||
@@ -68,7 +68,7 @@ enum { | |||
68 | #define CQE_STATUS_COMPL_MASK 0xFFFF | 68 | #define CQE_STATUS_COMPL_MASK 0xFFFF |
69 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ | 69 | #define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ |
70 | #define CQE_STATUS_EXTD_MASK 0xFFFF | 70 | #define CQE_STATUS_EXTD_MASK 0xFFFF |
71 | #define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */ | 71 | #define CQE_STATUS_EXTD_SHIFT 16 /* bits 16 - 31 */ |
72 | 72 | ||
73 | struct be_mcc_compl { | 73 | struct be_mcc_compl { |
74 | u32 status; /* dword 0 */ | 74 | u32 status; /* dword 0 */ |
diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c index cda5bf2fc50a..f0fd95b43c07 100644 --- a/drivers/net/benet/be_ethtool.c +++ b/drivers/net/benet/be_ethtool.c | |||
@@ -323,10 +323,12 @@ be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd) | |||
323 | 323 | ||
324 | if (ecmd->autoneg != 0) | 324 | if (ecmd->autoneg != 0) |
325 | return -EINVAL; | 325 | return -EINVAL; |
326 | adapter->tx_fc = ecmd->tx_pause; | ||
327 | adapter->rx_fc = ecmd->rx_pause; | ||
326 | 328 | ||
327 | status = be_cmd_set_flow_control(adapter, ecmd->tx_pause, | 329 | status = be_cmd_set_flow_control(adapter, |
328 | ecmd->rx_pause); | 330 | adapter->tx_fc, adapter->rx_fc); |
329 | if (!status) | 331 | if (status) |
330 | dev_warn(&adapter->pdev->dev, "Pause param set failed.\n"); | 332 | dev_warn(&adapter->pdev->dev, "Pause param set failed.\n"); |
331 | 333 | ||
332 | return status; | 334 | return status; |
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c index 1f941f027718..876b357101fa 100644 --- a/drivers/net/benet/be_main.c +++ b/drivers/net/benet/be_main.c | |||
@@ -1610,11 +1610,21 @@ static int be_open(struct net_device *netdev) | |||
1610 | 1610 | ||
1611 | status = be_cmd_link_status_query(adapter, &link_up); | 1611 | status = be_cmd_link_status_query(adapter, &link_up); |
1612 | if (status) | 1612 | if (status) |
1613 | return status; | 1613 | goto ret_sts; |
1614 | be_link_status_update(adapter, link_up); | 1614 | be_link_status_update(adapter, link_up); |
1615 | 1615 | ||
1616 | status = be_vid_config(adapter); | ||
1617 | if (status) | ||
1618 | goto ret_sts; | ||
1619 | |||
1620 | status = be_cmd_set_flow_control(adapter, | ||
1621 | adapter->tx_fc, adapter->rx_fc); | ||
1622 | if (status) | ||
1623 | goto ret_sts; | ||
1624 | |||
1616 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); | 1625 | schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); |
1617 | return 0; | 1626 | ret_sts: |
1627 | return status; | ||
1618 | } | 1628 | } |
1619 | 1629 | ||
1620 | static int be_setup(struct be_adapter *adapter) | 1630 | static int be_setup(struct be_adapter *adapter) |
@@ -1648,17 +1658,8 @@ static int be_setup(struct be_adapter *adapter) | |||
1648 | if (status != 0) | 1658 | if (status != 0) |
1649 | goto rx_qs_destroy; | 1659 | goto rx_qs_destroy; |
1650 | 1660 | ||
1651 | status = be_vid_config(adapter); | ||
1652 | if (status != 0) | ||
1653 | goto mccqs_destroy; | ||
1654 | |||
1655 | status = be_cmd_set_flow_control(adapter, true, true); | ||
1656 | if (status != 0) | ||
1657 | goto mccqs_destroy; | ||
1658 | return 0; | 1661 | return 0; |
1659 | 1662 | ||
1660 | mccqs_destroy: | ||
1661 | be_mcc_queues_destroy(adapter); | ||
1662 | rx_qs_destroy: | 1663 | rx_qs_destroy: |
1663 | be_rx_queues_destroy(adapter); | 1664 | be_rx_queues_destroy(adapter); |
1664 | tx_qs_destroy: | 1665 | tx_qs_destroy: |
@@ -1909,6 +1910,10 @@ static void be_netdev_init(struct net_device *netdev) | |||
1909 | 1910 | ||
1910 | adapter->rx_csum = true; | 1911 | adapter->rx_csum = true; |
1911 | 1912 | ||
1913 | /* Default settings for Rx and Tx flow control */ | ||
1914 | adapter->rx_fc = true; | ||
1915 | adapter->tx_fc = true; | ||
1916 | |||
1912 | netif_set_gso_max_size(netdev, 65535); | 1917 | netif_set_gso_max_size(netdev, 65535); |
1913 | 1918 | ||
1914 | BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); | 1919 | BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); |
@@ -2171,6 +2176,7 @@ static int be_suspend(struct pci_dev *pdev, pm_message_t state) | |||
2171 | be_close(netdev); | 2176 | be_close(netdev); |
2172 | rtnl_unlock(); | 2177 | rtnl_unlock(); |
2173 | } | 2178 | } |
2179 | be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc); | ||
2174 | be_clear(adapter); | 2180 | be_clear(adapter); |
2175 | 2181 | ||
2176 | pci_save_state(pdev); | 2182 | pci_save_state(pdev); |
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index 6c7f795d12de..a4d83409f205 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h | |||
@@ -361,9 +361,12 @@ struct l2_fhdr { | |||
361 | #define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<28) | 361 | #define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<28) |
362 | 362 | ||
363 | #define BNX2_L2CTX_HOST_BDIDX 0x00000004 | 363 | #define BNX2_L2CTX_HOST_BDIDX 0x00000004 |
364 | #define BNX2_L2CTX_STATUSB_NUM_SHIFT 16 | 364 | #define BNX2_L2CTX_L5_STATUSB_NUM_SHIFT 16 |
365 | #define BNX2_L2CTX_STATUSB_NUM(sb_id) \ | 365 | #define BNX2_L2CTX_L2_STATUSB_NUM_SHIFT 24 |
366 | (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_STATUSB_NUM_SHIFT) : 0) | 366 | #define BNX2_L2CTX_L5_STATUSB_NUM(sb_id) \ |
367 | (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L5_STATUSB_NUM_SHIFT) : 0) | ||
368 | #define BNX2_L2CTX_L2_STATUSB_NUM(sb_id) \ | ||
369 | (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT) : 0) | ||
367 | #define BNX2_L2CTX_HOST_BSEQ 0x00000008 | 370 | #define BNX2_L2CTX_HOST_BSEQ 0x00000008 |
368 | #define BNX2_L2CTX_NX_BSEQ 0x0000000c | 371 | #define BNX2_L2CTX_NX_BSEQ 0x0000000c |
369 | #define BNX2_L2CTX_NX_BDHADDR_HI 0x00000010 | 372 | #define BNX2_L2CTX_NX_BDHADDR_HI 0x00000010 |
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c index 69c5b15e22da..40fb5eefc72e 100644 --- a/drivers/net/bonding/bond_main.c +++ b/drivers/net/bonding/bond_main.c | |||
@@ -691,7 +691,7 @@ static int bond_check_dev_link(struct bonding *bond, | |||
691 | struct net_device *slave_dev, int reporting) | 691 | struct net_device *slave_dev, int reporting) |
692 | { | 692 | { |
693 | const struct net_device_ops *slave_ops = slave_dev->netdev_ops; | 693 | const struct net_device_ops *slave_ops = slave_dev->netdev_ops; |
694 | static int (*ioctl)(struct net_device *, struct ifreq *, int); | 694 | int (*ioctl)(struct net_device *, struct ifreq *, int); |
695 | struct ifreq ifr; | 695 | struct ifreq ifr; |
696 | struct mii_ioctl_data *mii; | 696 | struct mii_ioctl_data *mii; |
697 | 697 | ||
@@ -3665,10 +3665,10 @@ static int bond_xmit_hash_policy_l23(struct sk_buff *skb, | |||
3665 | 3665 | ||
3666 | if (skb->protocol == htons(ETH_P_IP)) { | 3666 | if (skb->protocol == htons(ETH_P_IP)) { |
3667 | return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^ | 3667 | return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^ |
3668 | (data->h_dest[5] ^ bond_dev->dev_addr[5])) % count; | 3668 | (data->h_dest[5] ^ data->h_source[5])) % count; |
3669 | } | 3669 | } |
3670 | 3670 | ||
3671 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | 3671 | return (data->h_dest[5] ^ data->h_source[5]) % count; |
3672 | } | 3672 | } |
3673 | 3673 | ||
3674 | /* | 3674 | /* |
@@ -3695,7 +3695,7 @@ static int bond_xmit_hash_policy_l34(struct sk_buff *skb, | |||
3695 | 3695 | ||
3696 | } | 3696 | } |
3697 | 3697 | ||
3698 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | 3698 | return (data->h_dest[5] ^ data->h_source[5]) % count; |
3699 | } | 3699 | } |
3700 | 3700 | ||
3701 | /* | 3701 | /* |
@@ -3706,7 +3706,7 @@ static int bond_xmit_hash_policy_l2(struct sk_buff *skb, | |||
3706 | { | 3706 | { |
3707 | struct ethhdr *data = (struct ethhdr *)skb->data; | 3707 | struct ethhdr *data = (struct ethhdr *)skb->data; |
3708 | 3708 | ||
3709 | return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; | 3709 | return (data->h_dest[5] ^ data->h_source[5]) % count; |
3710 | } | 3710 | } |
3711 | 3711 | ||
3712 | /*-------------------------- Device entry points ----------------------------*/ | 3712 | /*-------------------------- Device entry points ----------------------------*/ |
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig index df32c109b7ac..772f6d2489ce 100644 --- a/drivers/net/can/Kconfig +++ b/drivers/net/can/Kconfig | |||
@@ -35,66 +35,16 @@ config CAN_CALC_BITTIMING | |||
35 | arguments "tq", "prop_seg", "phase_seg1", "phase_seg2" and "sjw". | 35 | arguments "tq", "prop_seg", "phase_seg1", "phase_seg2" and "sjw". |
36 | If unsure, say Y. | 36 | If unsure, say Y. |
37 | 37 | ||
38 | config CAN_SJA1000 | ||
39 | depends on CAN_DEV && HAS_IOMEM | ||
40 | tristate "Philips SJA1000" | ||
41 | ---help--- | ||
42 | Driver for the SJA1000 CAN controllers from Philips or NXP | ||
43 | |||
44 | config CAN_SJA1000_ISA | ||
45 | depends on CAN_SJA1000 && ISA | ||
46 | tristate "ISA Bus based legacy SJA1000 driver" | ||
47 | ---help--- | ||
48 | This driver adds legacy support for SJA1000 chips connected to | ||
49 | the ISA bus using I/O port, memory mapped or indirect access. | ||
50 | |||
51 | config CAN_SJA1000_PLATFORM | ||
52 | depends on CAN_SJA1000 | ||
53 | tristate "Generic Platform Bus based SJA1000 driver" | ||
54 | ---help--- | ||
55 | This driver adds support for the SJA1000 chips connected to | ||
56 | the "platform bus" (Linux abstraction for directly to the | ||
57 | processor attached devices). Which can be found on various | ||
58 | boards from Phytec (http://www.phytec.de) like the PCM027, | ||
59 | PCM038. | ||
60 | |||
61 | config CAN_SJA1000_OF_PLATFORM | ||
62 | depends on CAN_SJA1000 && PPC_OF | ||
63 | tristate "Generic OF Platform Bus based SJA1000 driver" | ||
64 | ---help--- | ||
65 | This driver adds support for the SJA1000 chips connected to | ||
66 | the OpenFirmware "platform bus" found on embedded systems with | ||
67 | OpenFirmware bindings, e.g. if you have a PowerPC based system | ||
68 | you may want to enable this option. | ||
69 | |||
70 | config CAN_EMS_PCI | ||
71 | tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card" | ||
72 | depends on PCI && CAN_SJA1000 | ||
73 | ---help--- | ||
74 | This driver is for the one, two or four channel CPC-PCI, | ||
75 | CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche | ||
76 | (http://www.ems-wuensche.de). | ||
77 | |||
78 | config CAN_EMS_USB | ||
79 | tristate "EMS CPC-USB/ARM7 CAN/USB interface" | ||
80 | depends on USB && CAN_DEV | ||
81 | ---help--- | ||
82 | This driver is for the one channel CPC-USB/ARM7 CAN/USB interface | ||
83 | from from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de). | ||
84 | |||
85 | config CAN_KVASER_PCI | ||
86 | tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards" | ||
87 | depends on PCI && CAN_SJA1000 | ||
88 | ---help--- | ||
89 | This driver is for the the PCIcanx and PCIcan cards (1, 2 or | ||
90 | 4 channel) from Kvaser (http://www.kvaser.com). | ||
91 | |||
92 | config CAN_AT91 | 38 | config CAN_AT91 |
93 | tristate "Atmel AT91 onchip CAN controller" | 39 | tristate "Atmel AT91 onchip CAN controller" |
94 | depends on CAN && CAN_DEV && ARCH_AT91SAM9263 | 40 | depends on CAN_DEV && ARCH_AT91SAM9263 |
95 | ---help--- | 41 | ---help--- |
96 | This is a driver for the SoC CAN controller in Atmel's AT91SAM9263. | 42 | This is a driver for the SoC CAN controller in Atmel's AT91SAM9263. |
97 | 43 | ||
44 | source "drivers/net/can/sja1000/Kconfig" | ||
45 | |||
46 | source "drivers/net/can/usb/Kconfig" | ||
47 | |||
98 | config CAN_DEBUG_DEVICES | 48 | config CAN_DEBUG_DEVICES |
99 | bool "CAN devices debugging messages" | 49 | bool "CAN devices debugging messages" |
100 | depends on CAN | 50 | depends on CAN |
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c index f0b9a1e1db46..2868fe842a41 100644 --- a/drivers/net/can/dev.c +++ b/drivers/net/can/dev.c | |||
@@ -589,6 +589,22 @@ static int can_changelink(struct net_device *dev, | |||
589 | return 0; | 589 | return 0; |
590 | } | 590 | } |
591 | 591 | ||
592 | static size_t can_get_size(const struct net_device *dev) | ||
593 | { | ||
594 | struct can_priv *priv = netdev_priv(dev); | ||
595 | size_t size; | ||
596 | |||
597 | size = nla_total_size(sizeof(u32)); /* IFLA_CAN_STATE */ | ||
598 | size += sizeof(struct can_ctrlmode); /* IFLA_CAN_CTRLMODE */ | ||
599 | size += nla_total_size(sizeof(u32)); /* IFLA_CAN_RESTART_MS */ | ||
600 | size += sizeof(struct can_bittiming); /* IFLA_CAN_BITTIMING */ | ||
601 | size += sizeof(struct can_clock); /* IFLA_CAN_CLOCK */ | ||
602 | if (priv->bittiming_const) /* IFLA_CAN_BITTIMING_CONST */ | ||
603 | size += sizeof(struct can_bittiming_const); | ||
604 | |||
605 | return size; | ||
606 | } | ||
607 | |||
592 | static int can_fill_info(struct sk_buff *skb, const struct net_device *dev) | 608 | static int can_fill_info(struct sk_buff *skb, const struct net_device *dev) |
593 | { | 609 | { |
594 | struct can_priv *priv = netdev_priv(dev); | 610 | struct can_priv *priv = netdev_priv(dev); |
@@ -613,6 +629,11 @@ nla_put_failure: | |||
613 | return -EMSGSIZE; | 629 | return -EMSGSIZE; |
614 | } | 630 | } |
615 | 631 | ||
632 | static size_t can_get_xstats_size(const struct net_device *dev) | ||
633 | { | ||
634 | return sizeof(struct can_device_stats); | ||
635 | } | ||
636 | |||
616 | static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev) | 637 | static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev) |
617 | { | 638 | { |
618 | struct can_priv *priv = netdev_priv(dev); | 639 | struct can_priv *priv = netdev_priv(dev); |
@@ -639,7 +660,9 @@ static struct rtnl_link_ops can_link_ops __read_mostly = { | |||
639 | .setup = can_setup, | 660 | .setup = can_setup, |
640 | .newlink = can_newlink, | 661 | .newlink = can_newlink, |
641 | .changelink = can_changelink, | 662 | .changelink = can_changelink, |
663 | .get_size = can_get_size, | ||
642 | .fill_info = can_fill_info, | 664 | .fill_info = can_fill_info, |
665 | .get_xstats_size = can_get_xstats_size, | ||
643 | .fill_xstats = can_fill_xstats, | 666 | .fill_xstats = can_fill_xstats, |
644 | }; | 667 | }; |
645 | 668 | ||
diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig new file mode 100644 index 000000000000..4c674927f247 --- /dev/null +++ b/drivers/net/can/sja1000/Kconfig | |||
@@ -0,0 +1,47 @@ | |||
1 | menuconfig CAN_SJA1000 | ||
2 | tristate "Philips/NXP SJA1000 devices" | ||
3 | depends on CAN_DEV && HAS_IOMEM | ||
4 | |||
5 | if CAN_SJA1000 | ||
6 | |||
7 | config CAN_SJA1000_ISA | ||
8 | tristate "ISA Bus based legacy SJA1000 driver" | ||
9 | depends on ISA | ||
10 | ---help--- | ||
11 | This driver adds legacy support for SJA1000 chips connected to | ||
12 | the ISA bus using I/O port, memory mapped or indirect access. | ||
13 | |||
14 | config CAN_SJA1000_PLATFORM | ||
15 | tristate "Generic Platform Bus based SJA1000 driver" | ||
16 | ---help--- | ||
17 | This driver adds support for the SJA1000 chips connected to | ||
18 | the "platform bus" (Linux abstraction for directly to the | ||
19 | processor attached devices). Which can be found on various | ||
20 | boards from Phytec (http://www.phytec.de) like the PCM027, | ||
21 | PCM038. | ||
22 | |||
23 | config CAN_SJA1000_OF_PLATFORM | ||
24 | tristate "Generic OF Platform Bus based SJA1000 driver" | ||
25 | depends on PPC_OF | ||
26 | ---help--- | ||
27 | This driver adds support for the SJA1000 chips connected to | ||
28 | the OpenFirmware "platform bus" found on embedded systems with | ||
29 | OpenFirmware bindings, e.g. if you have a PowerPC based system | ||
30 | you may want to enable this option. | ||
31 | |||
32 | config CAN_EMS_PCI | ||
33 | tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card" | ||
34 | depends on PCI | ||
35 | ---help--- | ||
36 | This driver is for the one, two or four channel CPC-PCI, | ||
37 | CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche | ||
38 | (http://www.ems-wuensche.de). | ||
39 | |||
40 | config CAN_KVASER_PCI | ||
41 | tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards" | ||
42 | depends on PCI | ||
43 | ---help--- | ||
44 | This driver is for the the PCIcanx and PCIcan cards (1, 2 or | ||
45 | 4 channel) from Kvaser (http://www.kvaser.com). | ||
46 | |||
47 | endif | ||
diff --git a/drivers/net/can/usb/Kconfig b/drivers/net/can/usb/Kconfig new file mode 100644 index 000000000000..bbc78e0b8a15 --- /dev/null +++ b/drivers/net/can/usb/Kconfig | |||
@@ -0,0 +1,10 @@ | |||
1 | menu "CAN USB interfaces" | ||
2 | depends on USB && CAN_DEV | ||
3 | |||
4 | config CAN_EMS_USB | ||
5 | tristate "EMS CPC-USB/ARM7 CAN/USB interface" | ||
6 | ---help--- | ||
7 | This driver is for the one channel CPC-USB/ARM7 CAN/USB interface | ||
8 | from from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de). | ||
9 | |||
10 | endmenu | ||
diff --git a/drivers/net/can/usb/Makefile b/drivers/net/can/usb/Makefile index c3f75ba701b1..0afd51d4c7a5 100644 --- a/drivers/net/can/usb/Makefile +++ b/drivers/net/can/usb/Makefile | |||
@@ -3,3 +3,5 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_CAN_EMS_USB) += ems_usb.o | 5 | obj-$(CONFIG_CAN_EMS_USB) += ems_usb.o |
6 | |||
7 | ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG | ||
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c index 9012e0abc626..abdbd9c2b788 100644 --- a/drivers/net/can/usb/ems_usb.c +++ b/drivers/net/can/usb/ems_usb.c | |||
@@ -319,7 +319,7 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg) | |||
319 | 319 | ||
320 | cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame)); | 320 | cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame)); |
321 | 321 | ||
322 | cf->can_id = msg->msg.can_msg.id; | 322 | cf->can_id = le32_to_cpu(msg->msg.can_msg.id); |
323 | cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8); | 323 | cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8); |
324 | 324 | ||
325 | if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME | 325 | if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME |
@@ -813,6 +813,9 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne | |||
813 | msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc; | 813 | msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc; |
814 | } | 814 | } |
815 | 815 | ||
816 | /* Respect byte order */ | ||
817 | msg->msg.can_msg.id = cpu_to_le32(msg->msg.can_msg.id); | ||
818 | |||
816 | for (i = 0; i < MAX_TX_URBS; i++) { | 819 | for (i = 0; i < MAX_TX_URBS; i++) { |
817 | if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) { | 820 | if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) { |
818 | context = &dev->tx_contexts[i]; | 821 | context = &dev->tx_contexts[i]; |
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c index 05916aafa4f1..f857afe8e488 100644 --- a/drivers/net/cassini.c +++ b/drivers/net/cassini.c | |||
@@ -4342,11 +4342,11 @@ static int cas_open(struct net_device *dev) | |||
4342 | cas_unlock_all_restore(cp, flags); | 4342 | cas_unlock_all_restore(cp, flags); |
4343 | } | 4343 | } |
4344 | 4344 | ||
4345 | err = -ENOMEM; | ||
4345 | if (cas_tx_tiny_alloc(cp) < 0) | 4346 | if (cas_tx_tiny_alloc(cp) < 0) |
4346 | return -ENOMEM; | 4347 | goto err_unlock; |
4347 | 4348 | ||
4348 | /* alloc rx descriptors */ | 4349 | /* alloc rx descriptors */ |
4349 | err = -ENOMEM; | ||
4350 | if (cas_alloc_rxds(cp) < 0) | 4350 | if (cas_alloc_rxds(cp) < 0) |
4351 | goto err_tx_tiny; | 4351 | goto err_tx_tiny; |
4352 | 4352 | ||
@@ -4386,6 +4386,7 @@ err_spare: | |||
4386 | cas_free_rxds(cp); | 4386 | cas_free_rxds(cp); |
4387 | err_tx_tiny: | 4387 | err_tx_tiny: |
4388 | cas_tx_tiny_free(cp); | 4388 | cas_tx_tiny_free(cp); |
4389 | err_unlock: | ||
4389 | mutex_unlock(&cp->pm_mutex); | 4390 | mutex_unlock(&cp->pm_mutex); |
4390 | return err; | 4391 | return err; |
4391 | } | 4392 | } |
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c index 46c87ec7960c..3bf1b04f2cab 100644 --- a/drivers/net/cnic.c +++ b/drivers/net/cnic.c | |||
@@ -2264,9 +2264,9 @@ static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev) | |||
2264 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val); | 2264 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val); |
2265 | 2265 | ||
2266 | if (sb_id == 0) | 2266 | if (sb_id == 0) |
2267 | val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT; | 2267 | val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT; |
2268 | else | 2268 | else |
2269 | val = BNX2_L2CTX_STATUSB_NUM(sb_id); | 2269 | val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id); |
2270 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val); | 2270 | cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val); |
2271 | 2271 | ||
2272 | rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE); | 2272 | rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE); |
@@ -2423,7 +2423,7 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev) | |||
2423 | cp->int_num = 0; | 2423 | cp->int_num = 0; |
2424 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { | 2424 | if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { |
2425 | u32 sb_id = cp->status_blk_num; | 2425 | u32 sb_id = cp->status_blk_num; |
2426 | u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id); | 2426 | u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id); |
2427 | 2427 | ||
2428 | cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT; | 2428 | cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT; |
2429 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); | 2429 | cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); |
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c index f86612857a73..6366061712f4 100644 --- a/drivers/net/cxgb3/sge.c +++ b/drivers/net/cxgb3/sge.c | |||
@@ -879,7 +879,7 @@ recycle: | |||
879 | pci_dma_sync_single_for_cpu(adap->pdev, dma_addr, len, | 879 | pci_dma_sync_single_for_cpu(adap->pdev, dma_addr, len, |
880 | PCI_DMA_FROMDEVICE); | 880 | PCI_DMA_FROMDEVICE); |
881 | (*sd->pg_chunk.p_cnt)--; | 881 | (*sd->pg_chunk.p_cnt)--; |
882 | if (!*sd->pg_chunk.p_cnt) | 882 | if (!*sd->pg_chunk.p_cnt && sd->pg_chunk.page != fl->pg_chunk.page) |
883 | pci_unmap_page(adap->pdev, | 883 | pci_unmap_page(adap->pdev, |
884 | sd->pg_chunk.mapping, | 884 | sd->pg_chunk.mapping, |
885 | fl->alloc_size, | 885 | fl->alloc_size, |
@@ -2088,7 +2088,7 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs, | |||
2088 | PCI_DMA_FROMDEVICE); | 2088 | PCI_DMA_FROMDEVICE); |
2089 | 2089 | ||
2090 | (*sd->pg_chunk.p_cnt)--; | 2090 | (*sd->pg_chunk.p_cnt)--; |
2091 | if (!*sd->pg_chunk.p_cnt) | 2091 | if (!*sd->pg_chunk.p_cnt && sd->pg_chunk.page != fl->pg_chunk.page) |
2092 | pci_unmap_page(adap->pdev, | 2092 | pci_unmap_page(adap->pdev, |
2093 | sd->pg_chunk.mapping, | 2093 | sd->pg_chunk.mapping, |
2094 | fl->alloc_size, | 2094 | fl->alloc_size, |
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c index f72c56dec33c..db6380379478 100644 --- a/drivers/net/davinci_emac.c +++ b/drivers/net/davinci_emac.c | |||
@@ -2140,9 +2140,6 @@ static int emac_poll(struct napi_struct *napi, int budget) | |||
2140 | u32 status = 0; | 2140 | u32 status = 0; |
2141 | u32 num_pkts = 0; | 2141 | u32 num_pkts = 0; |
2142 | 2142 | ||
2143 | if (!netif_running(ndev)) | ||
2144 | return 0; | ||
2145 | |||
2146 | /* Check interrupt vectors and call packet processing */ | 2143 | /* Check interrupt vectors and call packet processing */ |
2147 | status = emac_read(EMAC_MACINVECTOR); | 2144 | status = emac_read(EMAC_MACINVECTOR); |
2148 | 2145 | ||
@@ -2221,7 +2218,7 @@ void emac_poll_controller(struct net_device *ndev) | |||
2221 | struct emac_priv *priv = netdev_priv(ndev); | 2218 | struct emac_priv *priv = netdev_priv(ndev); |
2222 | 2219 | ||
2223 | emac_int_disable(priv); | 2220 | emac_int_disable(priv); |
2224 | emac_irq(ndev->irq, priv); | 2221 | emac_irq(ndev->irq, ndev); |
2225 | emac_int_enable(priv); | 2222 | emac_int_enable(priv); |
2226 | } | 2223 | } |
2227 | #endif | 2224 | #endif |
diff --git a/drivers/net/dm9000.h b/drivers/net/dm9000.h index 80817c2edfb3..fb1c924d79b4 100644 --- a/drivers/net/dm9000.h +++ b/drivers/net/dm9000.h | |||
@@ -50,7 +50,7 @@ | |||
50 | #define DM9000_RCSR 0x32 | 50 | #define DM9000_RCSR 0x32 |
51 | 51 | ||
52 | #define CHIPR_DM9000A 0x19 | 52 | #define CHIPR_DM9000A 0x19 |
53 | #define CHIPR_DM9000B 0x1B | 53 | #define CHIPR_DM9000B 0x1A |
54 | 54 | ||
55 | #define DM9000_MRCMDX 0xF0 | 55 | #define DM9000_MRCMDX 0xF0 |
56 | #define DM9000_MRCMD 0xF2 | 56 | #define DM9000_MRCMD 0xF2 |
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index 5d2f48f02251..3c29a20b751e 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -1427,19 +1427,31 @@ static int e100_phy_init(struct nic *nic) | |||
1427 | } else | 1427 | } else |
1428 | DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id); | 1428 | DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id); |
1429 | 1429 | ||
1430 | /* Isolate all the PHY ids */ | ||
1431 | for (addr = 0; addr < 32; addr++) | ||
1432 | mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE); | ||
1433 | /* Select the discovered PHY */ | ||
1434 | bmcr &= ~BMCR_ISOLATE; | ||
1435 | mdio_write(netdev, nic->mii.phy_id, MII_BMCR, bmcr); | ||
1436 | |||
1437 | /* Get phy ID */ | 1430 | /* Get phy ID */ |
1438 | id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1); | 1431 | id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1); |
1439 | id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2); | 1432 | id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2); |
1440 | nic->phy = (u32)id_hi << 16 | (u32)id_lo; | 1433 | nic->phy = (u32)id_hi << 16 | (u32)id_lo; |
1441 | DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy); | 1434 | DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy); |
1442 | 1435 | ||
1436 | /* Select the phy and isolate the rest */ | ||
1437 | for (addr = 0; addr < 32; addr++) { | ||
1438 | if (addr != nic->mii.phy_id) { | ||
1439 | mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE); | ||
1440 | } else if (nic->phy != phy_82552_v) { | ||
1441 | bmcr = mdio_read(netdev, addr, MII_BMCR); | ||
1442 | mdio_write(netdev, addr, MII_BMCR, | ||
1443 | bmcr & ~BMCR_ISOLATE); | ||
1444 | } | ||
1445 | } | ||
1446 | /* | ||
1447 | * Workaround for 82552: | ||
1448 | * Clear the ISOLATE bit on selected phy_id last (mirrored on all | ||
1449 | * other phy_id's) using bmcr value from addr discovery loop above. | ||
1450 | */ | ||
1451 | if (nic->phy == phy_82552_v) | ||
1452 | mdio_write(netdev, nic->mii.phy_id, MII_BMCR, | ||
1453 | bmcr & ~BMCR_ISOLATE); | ||
1454 | |||
1443 | /* Handle National tx phys */ | 1455 | /* Handle National tx phys */ |
1444 | #define NCS_PHY_MODEL_MASK 0xFFF0FFFF | 1456 | #define NCS_PHY_MODEL_MASK 0xFFF0FFFF |
1445 | if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) { | 1457 | if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) { |
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index c0f185beb8bc..1190167a8b3d 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h | |||
@@ -76,6 +76,7 @@ | |||
76 | /* Extended Device Control */ | 76 | /* Extended Device Control */ |
77 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ | 77 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ |
78 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ | 78 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ |
79 | #define E1000_CTRL_EXT_SPD_BYPS 0x00008000 /* Speed Select Bypass */ | ||
79 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ | 80 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ |
80 | #define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */ | 81 | #define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */ |
81 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 | 82 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 |
@@ -347,6 +348,7 @@ | |||
347 | /* Extended Configuration Control and Size */ | 348 | /* Extended Configuration Control and Size */ |
348 | #define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020 | 349 | #define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020 |
349 | #define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE 0x00000001 | 350 | #define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE 0x00000001 |
351 | #define E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE 0x00000008 | ||
350 | #define E1000_EXTCNF_CTRL_SWFLAG 0x00000020 | 352 | #define E1000_EXTCNF_CTRL_SWFLAG 0x00000020 |
351 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK 0x00FF0000 | 353 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK 0x00FF0000 |
352 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT 16 | 354 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT 16 |
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h index 981936c1fb46..189dfa2d6c76 100644 --- a/drivers/net/e1000e/e1000.h +++ b/drivers/net/e1000e/e1000.h | |||
@@ -141,6 +141,20 @@ struct e1000_info; | |||
141 | #define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */ | 141 | #define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */ |
142 | #define HV_TNCRS_LOWER PHY_REG(778, 30) | 142 | #define HV_TNCRS_LOWER PHY_REG(778, 30) |
143 | 143 | ||
144 | /* BM PHY Copper Specific Status */ | ||
145 | #define BM_CS_STATUS 17 | ||
146 | #define BM_CS_STATUS_LINK_UP 0x0400 | ||
147 | #define BM_CS_STATUS_RESOLVED 0x0800 | ||
148 | #define BM_CS_STATUS_SPEED_MASK 0xC000 | ||
149 | #define BM_CS_STATUS_SPEED_1000 0x8000 | ||
150 | |||
151 | /* 82577 Mobile Phy Status Register */ | ||
152 | #define HV_M_STATUS 26 | ||
153 | #define HV_M_STATUS_AUTONEG_COMPLETE 0x1000 | ||
154 | #define HV_M_STATUS_SPEED_MASK 0x0300 | ||
155 | #define HV_M_STATUS_SPEED_1000 0x0200 | ||
156 | #define HV_M_STATUS_LINK_UP 0x0040 | ||
157 | |||
144 | enum e1000_boards { | 158 | enum e1000_boards { |
145 | board_82571, | 159 | board_82571, |
146 | board_82572, | 160 | board_82572, |
@@ -519,9 +533,13 @@ extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw); | |||
519 | extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); | 533 | extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); |
520 | extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); | 534 | extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); |
521 | extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); | 535 | extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); |
536 | extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, | ||
537 | u16 *data); | ||
522 | extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); | 538 | extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); |
523 | extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); | 539 | extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); |
524 | extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); | 540 | extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); |
541 | extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, | ||
542 | u16 data); | ||
525 | extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); | 543 | extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); |
526 | extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); | 544 | extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); |
527 | extern s32 e1000e_get_cfg_done(struct e1000_hw *hw); | 545 | extern s32 e1000e_get_cfg_done(struct e1000_hw *hw); |
@@ -538,7 +556,11 @@ extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data); | |||
538 | extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); | 556 | extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); |
539 | extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); | 557 | extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); |
540 | extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); | 558 | extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); |
559 | extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, | ||
560 | u16 data); | ||
541 | extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); | 561 | extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); |
562 | extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, | ||
563 | u16 *data); | ||
542 | extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, | 564 | extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, |
543 | u32 usec_interval, bool *success); | 565 | u32 usec_interval, bool *success); |
544 | extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); | 566 | extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); |
@@ -546,7 +568,11 @@ extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data); | |||
546 | extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); | 568 | extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); |
547 | extern s32 e1000e_check_downshift(struct e1000_hw *hw); | 569 | extern s32 e1000e_check_downshift(struct e1000_hw *hw); |
548 | extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); | 570 | extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); |
571 | extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, | ||
572 | u16 *data); | ||
549 | extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); | 573 | extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); |
574 | extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, | ||
575 | u16 data); | ||
550 | extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); | 576 | extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); |
551 | extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); | 577 | extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); |
552 | extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); | 578 | extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); |
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h index fd44d9f90769..aaea41ef794d 100644 --- a/drivers/net/e1000e/hw.h +++ b/drivers/net/e1000e/hw.h | |||
@@ -764,11 +764,13 @@ struct e1000_phy_operations { | |||
764 | s32 (*get_cable_length)(struct e1000_hw *); | 764 | s32 (*get_cable_length)(struct e1000_hw *); |
765 | s32 (*get_phy_info)(struct e1000_hw *); | 765 | s32 (*get_phy_info)(struct e1000_hw *); |
766 | s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *); | 766 | s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *); |
767 | s32 (*read_phy_reg_locked)(struct e1000_hw *, u32, u16 *); | ||
767 | void (*release_phy)(struct e1000_hw *); | 768 | void (*release_phy)(struct e1000_hw *); |
768 | s32 (*reset_phy)(struct e1000_hw *); | 769 | s32 (*reset_phy)(struct e1000_hw *); |
769 | s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); | 770 | s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); |
770 | s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); | 771 | s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); |
771 | s32 (*write_phy_reg)(struct e1000_hw *, u32, u16); | 772 | s32 (*write_phy_reg)(struct e1000_hw *, u32, u16); |
773 | s32 (*write_phy_reg_locked)(struct e1000_hw *, u32, u16); | ||
772 | s32 (*cfg_on_link_up)(struct e1000_hw *); | 774 | s32 (*cfg_on_link_up)(struct e1000_hw *); |
773 | }; | 775 | }; |
774 | 776 | ||
@@ -901,6 +903,7 @@ struct e1000_shadow_ram { | |||
901 | struct e1000_dev_spec_ich8lan { | 903 | struct e1000_dev_spec_ich8lan { |
902 | bool kmrn_lock_loss_workaround_enabled; | 904 | bool kmrn_lock_loss_workaround_enabled; |
903 | struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS]; | 905 | struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS]; |
906 | bool nvm_k1_enabled; | ||
904 | }; | 907 | }; |
905 | 908 | ||
906 | struct e1000_hw { | 909 | struct e1000_hw { |
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index 99df2abf82a9..51ddb04ab195 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -122,6 +122,27 @@ | |||
122 | 122 | ||
123 | #define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */ | 123 | #define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */ |
124 | 124 | ||
125 | #define SW_FLAG_TIMEOUT 1000 /* SW Semaphore flag timeout in milliseconds */ | ||
126 | |||
127 | /* SMBus Address Phy Register */ | ||
128 | #define HV_SMB_ADDR PHY_REG(768, 26) | ||
129 | #define HV_SMB_ADDR_PEC_EN 0x0200 | ||
130 | #define HV_SMB_ADDR_VALID 0x0080 | ||
131 | |||
132 | /* Strapping Option Register - RO */ | ||
133 | #define E1000_STRAP 0x0000C | ||
134 | #define E1000_STRAP_SMBUS_ADDRESS_MASK 0x00FE0000 | ||
135 | #define E1000_STRAP_SMBUS_ADDRESS_SHIFT 17 | ||
136 | |||
137 | /* OEM Bits Phy Register */ | ||
138 | #define HV_OEM_BITS PHY_REG(768, 25) | ||
139 | #define HV_OEM_BITS_LPLU 0x0004 /* Low Power Link Up */ | ||
140 | #define HV_OEM_BITS_GBE_DIS 0x0040 /* Gigabit Disable */ | ||
141 | #define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */ | ||
142 | |||
143 | #define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */ | ||
144 | #define E1000_NVM_K1_ENABLE 0x1 /* NVM Enable K1 bit */ | ||
145 | |||
125 | /* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ | 146 | /* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ |
126 | /* Offset 04h HSFSTS */ | 147 | /* Offset 04h HSFSTS */ |
127 | union ich8_hws_flash_status { | 148 | union ich8_hws_flash_status { |
@@ -200,6 +221,10 @@ static s32 e1000_setup_led_pchlan(struct e1000_hw *hw); | |||
200 | static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw); | 221 | static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw); |
201 | static s32 e1000_led_on_pchlan(struct e1000_hw *hw); | 222 | static s32 e1000_led_on_pchlan(struct e1000_hw *hw); |
202 | static s32 e1000_led_off_pchlan(struct e1000_hw *hw); | 223 | static s32 e1000_led_off_pchlan(struct e1000_hw *hw); |
224 | static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active); | ||
225 | static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw); | ||
226 | static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link); | ||
227 | static s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable); | ||
203 | 228 | ||
204 | static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) | 229 | static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) |
205 | { | 230 | { |
@@ -242,7 +267,11 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) | |||
242 | 267 | ||
243 | phy->ops.check_polarity = e1000_check_polarity_ife_ich8lan; | 268 | phy->ops.check_polarity = e1000_check_polarity_ife_ich8lan; |
244 | phy->ops.read_phy_reg = e1000_read_phy_reg_hv; | 269 | phy->ops.read_phy_reg = e1000_read_phy_reg_hv; |
270 | phy->ops.read_phy_reg_locked = e1000_read_phy_reg_hv_locked; | ||
271 | phy->ops.set_d0_lplu_state = e1000_set_lplu_state_pchlan; | ||
272 | phy->ops.set_d3_lplu_state = e1000_set_lplu_state_pchlan; | ||
245 | phy->ops.write_phy_reg = e1000_write_phy_reg_hv; | 273 | phy->ops.write_phy_reg = e1000_write_phy_reg_hv; |
274 | phy->ops.write_phy_reg_locked = e1000_write_phy_reg_hv_locked; | ||
246 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; | 275 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; |
247 | 276 | ||
248 | phy->id = e1000_phy_unknown; | 277 | phy->id = e1000_phy_unknown; |
@@ -303,6 +332,8 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw) | |||
303 | case IGP03E1000_E_PHY_ID: | 332 | case IGP03E1000_E_PHY_ID: |
304 | phy->type = e1000_phy_igp_3; | 333 | phy->type = e1000_phy_igp_3; |
305 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; | 334 | phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; |
335 | phy->ops.read_phy_reg_locked = e1000e_read_phy_reg_igp_locked; | ||
336 | phy->ops.write_phy_reg_locked = e1000e_write_phy_reg_igp_locked; | ||
306 | break; | 337 | break; |
307 | case IFE_E_PHY_ID: | 338 | case IFE_E_PHY_ID: |
308 | case IFE_PLUS_E_PHY_ID: | 339 | case IFE_PLUS_E_PHY_ID: |
@@ -469,14 +500,6 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) | |||
469 | goto out; | 500 | goto out; |
470 | } | 501 | } |
471 | 502 | ||
472 | if (hw->mac.type == e1000_pchlan) { | ||
473 | ret_val = e1000e_write_kmrn_reg(hw, | ||
474 | E1000_KMRNCTRLSTA_K1_CONFIG, | ||
475 | E1000_KMRNCTRLSTA_K1_ENABLE); | ||
476 | if (ret_val) | ||
477 | goto out; | ||
478 | } | ||
479 | |||
480 | /* | 503 | /* |
481 | * First we want to see if the MII Status Register reports | 504 | * First we want to see if the MII Status Register reports |
482 | * link. If so, then we want to get the current speed/duplex | 505 | * link. If so, then we want to get the current speed/duplex |
@@ -486,6 +509,12 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw) | |||
486 | if (ret_val) | 509 | if (ret_val) |
487 | goto out; | 510 | goto out; |
488 | 511 | ||
512 | if (hw->mac.type == e1000_pchlan) { | ||
513 | ret_val = e1000_k1_gig_workaround_hv(hw, link); | ||
514 | if (ret_val) | ||
515 | goto out; | ||
516 | } | ||
517 | |||
489 | if (!link) | 518 | if (!link) |
490 | goto out; /* No link detected */ | 519 | goto out; /* No link detected */ |
491 | 520 | ||
@@ -568,12 +597,39 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter) | |||
568 | static DEFINE_MUTEX(nvm_mutex); | 597 | static DEFINE_MUTEX(nvm_mutex); |
569 | 598 | ||
570 | /** | 599 | /** |
600 | * e1000_acquire_nvm_ich8lan - Acquire NVM mutex | ||
601 | * @hw: pointer to the HW structure | ||
602 | * | ||
603 | * Acquires the mutex for performing NVM operations. | ||
604 | **/ | ||
605 | static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw *hw) | ||
606 | { | ||
607 | mutex_lock(&nvm_mutex); | ||
608 | |||
609 | return 0; | ||
610 | } | ||
611 | |||
612 | /** | ||
613 | * e1000_release_nvm_ich8lan - Release NVM mutex | ||
614 | * @hw: pointer to the HW structure | ||
615 | * | ||
616 | * Releases the mutex used while performing NVM operations. | ||
617 | **/ | ||
618 | static void e1000_release_nvm_ich8lan(struct e1000_hw *hw) | ||
619 | { | ||
620 | mutex_unlock(&nvm_mutex); | ||
621 | |||
622 | return; | ||
623 | } | ||
624 | |||
625 | static DEFINE_MUTEX(swflag_mutex); | ||
626 | |||
627 | /** | ||
571 | * e1000_acquire_swflag_ich8lan - Acquire software control flag | 628 | * e1000_acquire_swflag_ich8lan - Acquire software control flag |
572 | * @hw: pointer to the HW structure | 629 | * @hw: pointer to the HW structure |
573 | * | 630 | * |
574 | * Acquires the software control flag for performing NVM and PHY | 631 | * Acquires the software control flag for performing PHY and select |
575 | * operations. This is a function pointer entry point only called by | 632 | * MAC CSR accesses. |
576 | * read/write routines for the PHY and NVM parts. | ||
577 | **/ | 633 | **/ |
578 | static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | 634 | static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) |
579 | { | 635 | { |
@@ -582,7 +638,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | |||
582 | 638 | ||
583 | might_sleep(); | 639 | might_sleep(); |
584 | 640 | ||
585 | mutex_lock(&nvm_mutex); | 641 | mutex_lock(&swflag_mutex); |
586 | 642 | ||
587 | while (timeout) { | 643 | while (timeout) { |
588 | extcnf_ctrl = er32(EXTCNF_CTRL); | 644 | extcnf_ctrl = er32(EXTCNF_CTRL); |
@@ -599,7 +655,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | |||
599 | goto out; | 655 | goto out; |
600 | } | 656 | } |
601 | 657 | ||
602 | timeout = PHY_CFG_TIMEOUT * 2; | 658 | timeout = SW_FLAG_TIMEOUT; |
603 | 659 | ||
604 | extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG; | 660 | extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG; |
605 | ew32(EXTCNF_CTRL, extcnf_ctrl); | 661 | ew32(EXTCNF_CTRL, extcnf_ctrl); |
@@ -623,7 +679,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) | |||
623 | 679 | ||
624 | out: | 680 | out: |
625 | if (ret_val) | 681 | if (ret_val) |
626 | mutex_unlock(&nvm_mutex); | 682 | mutex_unlock(&swflag_mutex); |
627 | 683 | ||
628 | return ret_val; | 684 | return ret_val; |
629 | } | 685 | } |
@@ -632,9 +688,8 @@ out: | |||
632 | * e1000_release_swflag_ich8lan - Release software control flag | 688 | * e1000_release_swflag_ich8lan - Release software control flag |
633 | * @hw: pointer to the HW structure | 689 | * @hw: pointer to the HW structure |
634 | * | 690 | * |
635 | * Releases the software control flag for performing NVM and PHY operations. | 691 | * Releases the software control flag for performing PHY and select |
636 | * This is a function pointer entry point only called by read/write | 692 | * MAC CSR accesses. |
637 | * routines for the PHY and NVM parts. | ||
638 | **/ | 693 | **/ |
639 | static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) | 694 | static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) |
640 | { | 695 | { |
@@ -644,7 +699,9 @@ static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) | |||
644 | extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; | 699 | extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; |
645 | ew32(EXTCNF_CTRL, extcnf_ctrl); | 700 | ew32(EXTCNF_CTRL, extcnf_ctrl); |
646 | 701 | ||
647 | mutex_unlock(&nvm_mutex); | 702 | mutex_unlock(&swflag_mutex); |
703 | |||
704 | return; | ||
648 | } | 705 | } |
649 | 706 | ||
650 | /** | 707 | /** |
@@ -752,6 +809,326 @@ static s32 e1000_phy_force_speed_duplex_ich8lan(struct e1000_hw *hw) | |||
752 | } | 809 | } |
753 | 810 | ||
754 | /** | 811 | /** |
812 | * e1000_sw_lcd_config_ich8lan - SW-based LCD Configuration | ||
813 | * @hw: pointer to the HW structure | ||
814 | * | ||
815 | * SW should configure the LCD from the NVM extended configuration region | ||
816 | * as a workaround for certain parts. | ||
817 | **/ | ||
818 | static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) | ||
819 | { | ||
820 | struct e1000_phy_info *phy = &hw->phy; | ||
821 | u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask; | ||
822 | s32 ret_val; | ||
823 | u16 word_addr, reg_data, reg_addr, phy_page = 0; | ||
824 | |||
825 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
826 | if (ret_val) | ||
827 | return ret_val; | ||
828 | |||
829 | /* | ||
830 | * Initialize the PHY from the NVM on ICH platforms. This | ||
831 | * is needed due to an issue where the NVM configuration is | ||
832 | * not properly autoloaded after power transitions. | ||
833 | * Therefore, after each PHY reset, we will load the | ||
834 | * configuration data out of the NVM manually. | ||
835 | */ | ||
836 | if ((hw->mac.type == e1000_ich8lan && phy->type == e1000_phy_igp_3) || | ||
837 | (hw->mac.type == e1000_pchlan)) { | ||
838 | struct e1000_adapter *adapter = hw->adapter; | ||
839 | |||
840 | /* Check if SW needs to configure the PHY */ | ||
841 | if ((adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M_AMT) || | ||
842 | (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M) || | ||
843 | (hw->mac.type == e1000_pchlan)) | ||
844 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; | ||
845 | else | ||
846 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG; | ||
847 | |||
848 | data = er32(FEXTNVM); | ||
849 | if (!(data & sw_cfg_mask)) | ||
850 | goto out; | ||
851 | |||
852 | /* Wait for basic configuration completes before proceeding */ | ||
853 | e1000_lan_init_done_ich8lan(hw); | ||
854 | |||
855 | /* | ||
856 | * Make sure HW does not configure LCD from PHY | ||
857 | * extended configuration before SW configuration | ||
858 | */ | ||
859 | data = er32(EXTCNF_CTRL); | ||
860 | if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE) | ||
861 | goto out; | ||
862 | |||
863 | cnf_size = er32(EXTCNF_SIZE); | ||
864 | cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK; | ||
865 | cnf_size >>= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT; | ||
866 | if (!cnf_size) | ||
867 | goto out; | ||
868 | |||
869 | cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK; | ||
870 | cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT; | ||
871 | |||
872 | if (!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) && | ||
873 | (hw->mac.type == e1000_pchlan)) { | ||
874 | /* | ||
875 | * HW configures the SMBus address and LEDs when the | ||
876 | * OEM and LCD Write Enable bits are set in the NVM. | ||
877 | * When both NVM bits are cleared, SW will configure | ||
878 | * them instead. | ||
879 | */ | ||
880 | data = er32(STRAP); | ||
881 | data &= E1000_STRAP_SMBUS_ADDRESS_MASK; | ||
882 | reg_data = data >> E1000_STRAP_SMBUS_ADDRESS_SHIFT; | ||
883 | reg_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID; | ||
884 | ret_val = e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR, | ||
885 | reg_data); | ||
886 | if (ret_val) | ||
887 | goto out; | ||
888 | |||
889 | data = er32(LEDCTL); | ||
890 | ret_val = e1000_write_phy_reg_hv_locked(hw, | ||
891 | HV_LED_CONFIG, | ||
892 | (u16)data); | ||
893 | if (ret_val) | ||
894 | goto out; | ||
895 | } | ||
896 | /* Configure LCD from extended configuration region. */ | ||
897 | |||
898 | /* cnf_base_addr is in DWORD */ | ||
899 | word_addr = (u16)(cnf_base_addr << 1); | ||
900 | |||
901 | for (i = 0; i < cnf_size; i++) { | ||
902 | ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1, | ||
903 | ®_data); | ||
904 | if (ret_val) | ||
905 | goto out; | ||
906 | |||
907 | ret_val = e1000_read_nvm(hw, (word_addr + i * 2 + 1), | ||
908 | 1, ®_addr); | ||
909 | if (ret_val) | ||
910 | goto out; | ||
911 | |||
912 | /* Save off the PHY page for future writes. */ | ||
913 | if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) { | ||
914 | phy_page = reg_data; | ||
915 | continue; | ||
916 | } | ||
917 | |||
918 | reg_addr &= PHY_REG_MASK; | ||
919 | reg_addr |= phy_page; | ||
920 | |||
921 | ret_val = phy->ops.write_phy_reg_locked(hw, | ||
922 | (u32)reg_addr, | ||
923 | reg_data); | ||
924 | if (ret_val) | ||
925 | goto out; | ||
926 | } | ||
927 | } | ||
928 | |||
929 | out: | ||
930 | hw->phy.ops.release_phy(hw); | ||
931 | return ret_val; | ||
932 | } | ||
933 | |||
934 | /** | ||
935 | * e1000_k1_gig_workaround_hv - K1 Si workaround | ||
936 | * @hw: pointer to the HW structure | ||
937 | * @link: link up bool flag | ||
938 | * | ||
939 | * If K1 is enabled for 1Gbps, the MAC might stall when transitioning | ||
940 | * from a lower speed. This workaround disables K1 whenever link is at 1Gig | ||
941 | * If link is down, the function will restore the default K1 setting located | ||
942 | * in the NVM. | ||
943 | **/ | ||
944 | static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link) | ||
945 | { | ||
946 | s32 ret_val = 0; | ||
947 | u16 status_reg = 0; | ||
948 | bool k1_enable = hw->dev_spec.ich8lan.nvm_k1_enabled; | ||
949 | |||
950 | if (hw->mac.type != e1000_pchlan) | ||
951 | goto out; | ||
952 | |||
953 | /* Wrap the whole flow with the sw flag */ | ||
954 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
955 | if (ret_val) | ||
956 | goto out; | ||
957 | |||
958 | /* Disable K1 when link is 1Gbps, otherwise use the NVM setting */ | ||
959 | if (link) { | ||
960 | if (hw->phy.type == e1000_phy_82578) { | ||
961 | ret_val = hw->phy.ops.read_phy_reg_locked(hw, | ||
962 | BM_CS_STATUS, | ||
963 | &status_reg); | ||
964 | if (ret_val) | ||
965 | goto release; | ||
966 | |||
967 | status_reg &= BM_CS_STATUS_LINK_UP | | ||
968 | BM_CS_STATUS_RESOLVED | | ||
969 | BM_CS_STATUS_SPEED_MASK; | ||
970 | |||
971 | if (status_reg == (BM_CS_STATUS_LINK_UP | | ||
972 | BM_CS_STATUS_RESOLVED | | ||
973 | BM_CS_STATUS_SPEED_1000)) | ||
974 | k1_enable = false; | ||
975 | } | ||
976 | |||
977 | if (hw->phy.type == e1000_phy_82577) { | ||
978 | ret_val = hw->phy.ops.read_phy_reg_locked(hw, | ||
979 | HV_M_STATUS, | ||
980 | &status_reg); | ||
981 | if (ret_val) | ||
982 | goto release; | ||
983 | |||
984 | status_reg &= HV_M_STATUS_LINK_UP | | ||
985 | HV_M_STATUS_AUTONEG_COMPLETE | | ||
986 | HV_M_STATUS_SPEED_MASK; | ||
987 | |||
988 | if (status_reg == (HV_M_STATUS_LINK_UP | | ||
989 | HV_M_STATUS_AUTONEG_COMPLETE | | ||
990 | HV_M_STATUS_SPEED_1000)) | ||
991 | k1_enable = false; | ||
992 | } | ||
993 | |||
994 | /* Link stall fix for link up */ | ||
995 | ret_val = hw->phy.ops.write_phy_reg_locked(hw, PHY_REG(770, 19), | ||
996 | 0x0100); | ||
997 | if (ret_val) | ||
998 | goto release; | ||
999 | |||
1000 | } else { | ||
1001 | /* Link stall fix for link down */ | ||
1002 | ret_val = hw->phy.ops.write_phy_reg_locked(hw, PHY_REG(770, 19), | ||
1003 | 0x4100); | ||
1004 | if (ret_val) | ||
1005 | goto release; | ||
1006 | } | ||
1007 | |||
1008 | ret_val = e1000_configure_k1_ich8lan(hw, k1_enable); | ||
1009 | |||
1010 | release: | ||
1011 | hw->phy.ops.release_phy(hw); | ||
1012 | out: | ||
1013 | return ret_val; | ||
1014 | } | ||
1015 | |||
1016 | /** | ||
1017 | * e1000_configure_k1_ich8lan - Configure K1 power state | ||
1018 | * @hw: pointer to the HW structure | ||
1019 | * @enable: K1 state to configure | ||
1020 | * | ||
1021 | * Configure the K1 power state based on the provided parameter. | ||
1022 | * Assumes semaphore already acquired. | ||
1023 | * | ||
1024 | * Success returns 0, Failure returns -E1000_ERR_PHY (-2) | ||
1025 | **/ | ||
1026 | static s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable) | ||
1027 | { | ||
1028 | s32 ret_val = 0; | ||
1029 | u32 ctrl_reg = 0; | ||
1030 | u32 ctrl_ext = 0; | ||
1031 | u32 reg = 0; | ||
1032 | u16 kmrn_reg = 0; | ||
1033 | |||
1034 | ret_val = e1000e_read_kmrn_reg_locked(hw, | ||
1035 | E1000_KMRNCTRLSTA_K1_CONFIG, | ||
1036 | &kmrn_reg); | ||
1037 | if (ret_val) | ||
1038 | goto out; | ||
1039 | |||
1040 | if (k1_enable) | ||
1041 | kmrn_reg |= E1000_KMRNCTRLSTA_K1_ENABLE; | ||
1042 | else | ||
1043 | kmrn_reg &= ~E1000_KMRNCTRLSTA_K1_ENABLE; | ||
1044 | |||
1045 | ret_val = e1000e_write_kmrn_reg_locked(hw, | ||
1046 | E1000_KMRNCTRLSTA_K1_CONFIG, | ||
1047 | kmrn_reg); | ||
1048 | if (ret_val) | ||
1049 | goto out; | ||
1050 | |||
1051 | udelay(20); | ||
1052 | ctrl_ext = er32(CTRL_EXT); | ||
1053 | ctrl_reg = er32(CTRL); | ||
1054 | |||
1055 | reg = ctrl_reg & ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100); | ||
1056 | reg |= E1000_CTRL_FRCSPD; | ||
1057 | ew32(CTRL, reg); | ||
1058 | |||
1059 | ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_SPD_BYPS); | ||
1060 | udelay(20); | ||
1061 | ew32(CTRL, ctrl_reg); | ||
1062 | ew32(CTRL_EXT, ctrl_ext); | ||
1063 | udelay(20); | ||
1064 | |||
1065 | out: | ||
1066 | return ret_val; | ||
1067 | } | ||
1068 | |||
1069 | /** | ||
1070 | * e1000_oem_bits_config_ich8lan - SW-based LCD Configuration | ||
1071 | * @hw: pointer to the HW structure | ||
1072 | * @d0_state: boolean if entering d0 or d3 device state | ||
1073 | * | ||
1074 | * SW will configure Gbe Disable and LPLU based on the NVM. The four bits are | ||
1075 | * collectively called OEM bits. The OEM Write Enable bit and SW Config bit | ||
1076 | * in NVM determines whether HW should configure LPLU and Gbe Disable. | ||
1077 | **/ | ||
1078 | static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state) | ||
1079 | { | ||
1080 | s32 ret_val = 0; | ||
1081 | u32 mac_reg; | ||
1082 | u16 oem_reg; | ||
1083 | |||
1084 | if (hw->mac.type != e1000_pchlan) | ||
1085 | return ret_val; | ||
1086 | |||
1087 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
1088 | if (ret_val) | ||
1089 | return ret_val; | ||
1090 | |||
1091 | mac_reg = er32(EXTCNF_CTRL); | ||
1092 | if (mac_reg & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) | ||
1093 | goto out; | ||
1094 | |||
1095 | mac_reg = er32(FEXTNVM); | ||
1096 | if (!(mac_reg & E1000_FEXTNVM_SW_CONFIG_ICH8M)) | ||
1097 | goto out; | ||
1098 | |||
1099 | mac_reg = er32(PHY_CTRL); | ||
1100 | |||
1101 | ret_val = hw->phy.ops.read_phy_reg_locked(hw, HV_OEM_BITS, &oem_reg); | ||
1102 | if (ret_val) | ||
1103 | goto out; | ||
1104 | |||
1105 | oem_reg &= ~(HV_OEM_BITS_GBE_DIS | HV_OEM_BITS_LPLU); | ||
1106 | |||
1107 | if (d0_state) { | ||
1108 | if (mac_reg & E1000_PHY_CTRL_GBE_DISABLE) | ||
1109 | oem_reg |= HV_OEM_BITS_GBE_DIS; | ||
1110 | |||
1111 | if (mac_reg & E1000_PHY_CTRL_D0A_LPLU) | ||
1112 | oem_reg |= HV_OEM_BITS_LPLU; | ||
1113 | } else { | ||
1114 | if (mac_reg & E1000_PHY_CTRL_NOND0A_GBE_DISABLE) | ||
1115 | oem_reg |= HV_OEM_BITS_GBE_DIS; | ||
1116 | |||
1117 | if (mac_reg & E1000_PHY_CTRL_NOND0A_LPLU) | ||
1118 | oem_reg |= HV_OEM_BITS_LPLU; | ||
1119 | } | ||
1120 | /* Restart auto-neg to activate the bits */ | ||
1121 | oem_reg |= HV_OEM_BITS_RESTART_AN; | ||
1122 | ret_val = hw->phy.ops.write_phy_reg_locked(hw, HV_OEM_BITS, oem_reg); | ||
1123 | |||
1124 | out: | ||
1125 | hw->phy.ops.release_phy(hw); | ||
1126 | |||
1127 | return ret_val; | ||
1128 | } | ||
1129 | |||
1130 | |||
1131 | /** | ||
755 | * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be | 1132 | * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be |
756 | * done after every PHY reset. | 1133 | * done after every PHY reset. |
757 | **/ | 1134 | **/ |
@@ -791,10 +1168,20 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw) | |||
791 | ret_val = hw->phy.ops.acquire_phy(hw); | 1168 | ret_val = hw->phy.ops.acquire_phy(hw); |
792 | if (ret_val) | 1169 | if (ret_val) |
793 | return ret_val; | 1170 | return ret_val; |
1171 | |||
794 | hw->phy.addr = 1; | 1172 | hw->phy.addr = 1; |
795 | e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); | 1173 | ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); |
1174 | if (ret_val) | ||
1175 | goto out; | ||
796 | hw->phy.ops.release_phy(hw); | 1176 | hw->phy.ops.release_phy(hw); |
797 | 1177 | ||
1178 | /* | ||
1179 | * Configure the K1 Si workaround during phy reset assuming there is | ||
1180 | * link so that it disables K1 if link is in 1Gbps. | ||
1181 | */ | ||
1182 | ret_val = e1000_k1_gig_workaround_hv(hw, true); | ||
1183 | |||
1184 | out: | ||
798 | return ret_val; | 1185 | return ret_val; |
799 | } | 1186 | } |
800 | 1187 | ||
@@ -840,11 +1227,8 @@ static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw) | |||
840 | **/ | 1227 | **/ |
841 | static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) | 1228 | static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) |
842 | { | 1229 | { |
843 | struct e1000_phy_info *phy = &hw->phy; | 1230 | s32 ret_val = 0; |
844 | u32 i; | 1231 | u16 reg; |
845 | u32 data, cnf_size, cnf_base_addr, sw_cfg_mask; | ||
846 | s32 ret_val; | ||
847 | u16 word_addr, reg_data, reg_addr, phy_page = 0; | ||
848 | 1232 | ||
849 | ret_val = e1000e_phy_hw_reset_generic(hw); | 1233 | ret_val = e1000e_phy_hw_reset_generic(hw); |
850 | if (ret_val) | 1234 | if (ret_val) |
@@ -859,81 +1243,20 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) | |||
859 | return ret_val; | 1243 | return ret_val; |
860 | } | 1244 | } |
861 | 1245 | ||
862 | /* | 1246 | /* Dummy read to clear the phy wakeup bit after lcd reset */ |
863 | * Initialize the PHY from the NVM on ICH platforms. This | 1247 | if (hw->mac.type == e1000_pchlan) |
864 | * is needed due to an issue where the NVM configuration is | 1248 | e1e_rphy(hw, BM_WUC, ®); |
865 | * not properly autoloaded after power transitions. | ||
866 | * Therefore, after each PHY reset, we will load the | ||
867 | * configuration data out of the NVM manually. | ||
868 | */ | ||
869 | if (hw->mac.type == e1000_ich8lan && phy->type == e1000_phy_igp_3) { | ||
870 | struct e1000_adapter *adapter = hw->adapter; | ||
871 | |||
872 | /* Check if SW needs configure the PHY */ | ||
873 | if ((adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M_AMT) || | ||
874 | (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M)) | ||
875 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; | ||
876 | else | ||
877 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG; | ||
878 | |||
879 | data = er32(FEXTNVM); | ||
880 | if (!(data & sw_cfg_mask)) | ||
881 | return 0; | ||
882 | |||
883 | /* Wait for basic configuration completes before proceeding */ | ||
884 | e1000_lan_init_done_ich8lan(hw); | ||
885 | |||
886 | /* | ||
887 | * Make sure HW does not configure LCD from PHY | ||
888 | * extended configuration before SW configuration | ||
889 | */ | ||
890 | data = er32(EXTCNF_CTRL); | ||
891 | if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE) | ||
892 | return 0; | ||
893 | |||
894 | cnf_size = er32(EXTCNF_SIZE); | ||
895 | cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK; | ||
896 | cnf_size >>= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT; | ||
897 | if (!cnf_size) | ||
898 | return 0; | ||
899 | |||
900 | cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK; | ||
901 | cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT; | ||
902 | |||
903 | /* Configure LCD from extended configuration region. */ | ||
904 | |||
905 | /* cnf_base_addr is in DWORD */ | ||
906 | word_addr = (u16)(cnf_base_addr << 1); | ||
907 | |||
908 | for (i = 0; i < cnf_size; i++) { | ||
909 | ret_val = e1000_read_nvm(hw, | ||
910 | (word_addr + i * 2), | ||
911 | 1, | ||
912 | ®_data); | ||
913 | if (ret_val) | ||
914 | return ret_val; | ||
915 | |||
916 | ret_val = e1000_read_nvm(hw, | ||
917 | (word_addr + i * 2 + 1), | ||
918 | 1, | ||
919 | ®_addr); | ||
920 | if (ret_val) | ||
921 | return ret_val; | ||
922 | |||
923 | /* Save off the PHY page for future writes. */ | ||
924 | if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) { | ||
925 | phy_page = reg_data; | ||
926 | continue; | ||
927 | } | ||
928 | 1249 | ||
929 | reg_addr |= phy_page; | 1250 | /* Configure the LCD with the extended configuration region in NVM */ |
1251 | ret_val = e1000_sw_lcd_config_ich8lan(hw); | ||
1252 | if (ret_val) | ||
1253 | goto out; | ||
930 | 1254 | ||
931 | ret_val = e1e_wphy(hw, (u32)reg_addr, reg_data); | 1255 | /* Configure the LCD with the OEM bits in NVM */ |
932 | if (ret_val) | 1256 | if (hw->mac.type == e1000_pchlan) |
933 | return ret_val; | 1257 | ret_val = e1000_oem_bits_config_ich8lan(hw, true); |
934 | } | ||
935 | } | ||
936 | 1258 | ||
1259 | out: | ||
937 | return 0; | 1260 | return 0; |
938 | } | 1261 | } |
939 | 1262 | ||
@@ -1054,6 +1377,38 @@ static s32 e1000_check_polarity_ife_ich8lan(struct e1000_hw *hw) | |||
1054 | } | 1377 | } |
1055 | 1378 | ||
1056 | /** | 1379 | /** |
1380 | * e1000_set_lplu_state_pchlan - Set Low Power Link Up state | ||
1381 | * @hw: pointer to the HW structure | ||
1382 | * @active: true to enable LPLU, false to disable | ||
1383 | * | ||
1384 | * Sets the LPLU state according to the active flag. For PCH, if OEM write | ||
1385 | * bit are disabled in the NVM, writing the LPLU bits in the MAC will not set | ||
1386 | * the phy speed. This function will manually set the LPLU bit and restart | ||
1387 | * auto-neg as hw would do. D3 and D0 LPLU will call the same function | ||
1388 | * since it configures the same bit. | ||
1389 | **/ | ||
1390 | static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active) | ||
1391 | { | ||
1392 | s32 ret_val = 0; | ||
1393 | u16 oem_reg; | ||
1394 | |||
1395 | ret_val = e1e_rphy(hw, HV_OEM_BITS, &oem_reg); | ||
1396 | if (ret_val) | ||
1397 | goto out; | ||
1398 | |||
1399 | if (active) | ||
1400 | oem_reg |= HV_OEM_BITS_LPLU; | ||
1401 | else | ||
1402 | oem_reg &= ~HV_OEM_BITS_LPLU; | ||
1403 | |||
1404 | oem_reg |= HV_OEM_BITS_RESTART_AN; | ||
1405 | ret_val = e1e_wphy(hw, HV_OEM_BITS, oem_reg); | ||
1406 | |||
1407 | out: | ||
1408 | return ret_val; | ||
1409 | } | ||
1410 | |||
1411 | /** | ||
1057 | * e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state | 1412 | * e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state |
1058 | * @hw: pointer to the HW structure | 1413 | * @hw: pointer to the HW structure |
1059 | * @active: TRUE to enable LPLU, FALSE to disable | 1414 | * @active: TRUE to enable LPLU, FALSE to disable |
@@ -1314,12 +1669,11 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, | |||
1314 | if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || | 1669 | if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || |
1315 | (words == 0)) { | 1670 | (words == 0)) { |
1316 | hw_dbg(hw, "nvm parameter(s) out of bounds\n"); | 1671 | hw_dbg(hw, "nvm parameter(s) out of bounds\n"); |
1317 | return -E1000_ERR_NVM; | 1672 | ret_val = -E1000_ERR_NVM; |
1673 | goto out; | ||
1318 | } | 1674 | } |
1319 | 1675 | ||
1320 | ret_val = e1000_acquire_swflag_ich8lan(hw); | 1676 | nvm->ops.acquire_nvm(hw); |
1321 | if (ret_val) | ||
1322 | goto out; | ||
1323 | 1677 | ||
1324 | ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); | 1678 | ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); |
1325 | if (ret_val) { | 1679 | if (ret_val) { |
@@ -1345,7 +1699,7 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, | |||
1345 | } | 1699 | } |
1346 | } | 1700 | } |
1347 | 1701 | ||
1348 | e1000_release_swflag_ich8lan(hw); | 1702 | nvm->ops.release_nvm(hw); |
1349 | 1703 | ||
1350 | out: | 1704 | out: |
1351 | if (ret_val) | 1705 | if (ret_val) |
@@ -1603,11 +1957,15 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words, | |||
1603 | return -E1000_ERR_NVM; | 1957 | return -E1000_ERR_NVM; |
1604 | } | 1958 | } |
1605 | 1959 | ||
1960 | nvm->ops.acquire_nvm(hw); | ||
1961 | |||
1606 | for (i = 0; i < words; i++) { | 1962 | for (i = 0; i < words; i++) { |
1607 | dev_spec->shadow_ram[offset+i].modified = 1; | 1963 | dev_spec->shadow_ram[offset+i].modified = 1; |
1608 | dev_spec->shadow_ram[offset+i].value = data[i]; | 1964 | dev_spec->shadow_ram[offset+i].value = data[i]; |
1609 | } | 1965 | } |
1610 | 1966 | ||
1967 | nvm->ops.release_nvm(hw); | ||
1968 | |||
1611 | return 0; | 1969 | return 0; |
1612 | } | 1970 | } |
1613 | 1971 | ||
@@ -1637,9 +1995,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1637 | if (nvm->type != e1000_nvm_flash_sw) | 1995 | if (nvm->type != e1000_nvm_flash_sw) |
1638 | goto out; | 1996 | goto out; |
1639 | 1997 | ||
1640 | ret_val = e1000_acquire_swflag_ich8lan(hw); | 1998 | nvm->ops.acquire_nvm(hw); |
1641 | if (ret_val) | ||
1642 | goto out; | ||
1643 | 1999 | ||
1644 | /* | 2000 | /* |
1645 | * We're writing to the opposite bank so if we're on bank 1, | 2001 | * We're writing to the opposite bank so if we're on bank 1, |
@@ -1657,7 +2013,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1657 | old_bank_offset = 0; | 2013 | old_bank_offset = 0; |
1658 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); | 2014 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); |
1659 | if (ret_val) { | 2015 | if (ret_val) { |
1660 | e1000_release_swflag_ich8lan(hw); | 2016 | nvm->ops.release_nvm(hw); |
1661 | goto out; | 2017 | goto out; |
1662 | } | 2018 | } |
1663 | } else { | 2019 | } else { |
@@ -1665,7 +2021,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1665 | new_bank_offset = 0; | 2021 | new_bank_offset = 0; |
1666 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); | 2022 | ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); |
1667 | if (ret_val) { | 2023 | if (ret_val) { |
1668 | e1000_release_swflag_ich8lan(hw); | 2024 | nvm->ops.release_nvm(hw); |
1669 | goto out; | 2025 | goto out; |
1670 | } | 2026 | } |
1671 | } | 2027 | } |
@@ -1723,7 +2079,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1723 | if (ret_val) { | 2079 | if (ret_val) { |
1724 | /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */ | 2080 | /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */ |
1725 | hw_dbg(hw, "Flash commit failed.\n"); | 2081 | hw_dbg(hw, "Flash commit failed.\n"); |
1726 | e1000_release_swflag_ich8lan(hw); | 2082 | nvm->ops.release_nvm(hw); |
1727 | goto out; | 2083 | goto out; |
1728 | } | 2084 | } |
1729 | 2085 | ||
@@ -1736,7 +2092,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1736 | act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD; | 2092 | act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD; |
1737 | ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); | 2093 | ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); |
1738 | if (ret_val) { | 2094 | if (ret_val) { |
1739 | e1000_release_swflag_ich8lan(hw); | 2095 | nvm->ops.release_nvm(hw); |
1740 | goto out; | 2096 | goto out; |
1741 | } | 2097 | } |
1742 | data &= 0xBFFF; | 2098 | data &= 0xBFFF; |
@@ -1744,7 +2100,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1744 | act_offset * 2 + 1, | 2100 | act_offset * 2 + 1, |
1745 | (u8)(data >> 8)); | 2101 | (u8)(data >> 8)); |
1746 | if (ret_val) { | 2102 | if (ret_val) { |
1747 | e1000_release_swflag_ich8lan(hw); | 2103 | nvm->ops.release_nvm(hw); |
1748 | goto out; | 2104 | goto out; |
1749 | } | 2105 | } |
1750 | 2106 | ||
@@ -1757,7 +2113,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1757 | act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1; | 2113 | act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1; |
1758 | ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); | 2114 | ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); |
1759 | if (ret_val) { | 2115 | if (ret_val) { |
1760 | e1000_release_swflag_ich8lan(hw); | 2116 | nvm->ops.release_nvm(hw); |
1761 | goto out; | 2117 | goto out; |
1762 | } | 2118 | } |
1763 | 2119 | ||
@@ -1767,7 +2123,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1767 | dev_spec->shadow_ram[i].value = 0xFFFF; | 2123 | dev_spec->shadow_ram[i].value = 0xFFFF; |
1768 | } | 2124 | } |
1769 | 2125 | ||
1770 | e1000_release_swflag_ich8lan(hw); | 2126 | nvm->ops.release_nvm(hw); |
1771 | 2127 | ||
1772 | /* | 2128 | /* |
1773 | * Reload the EEPROM, or else modifications will not appear | 2129 | * Reload the EEPROM, or else modifications will not appear |
@@ -1831,14 +2187,12 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw) | |||
1831 | **/ | 2187 | **/ |
1832 | void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw) | 2188 | void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw) |
1833 | { | 2189 | { |
2190 | struct e1000_nvm_info *nvm = &hw->nvm; | ||
1834 | union ich8_flash_protected_range pr0; | 2191 | union ich8_flash_protected_range pr0; |
1835 | union ich8_hws_flash_status hsfsts; | 2192 | union ich8_hws_flash_status hsfsts; |
1836 | u32 gfpreg; | 2193 | u32 gfpreg; |
1837 | s32 ret_val; | ||
1838 | 2194 | ||
1839 | ret_val = e1000_acquire_swflag_ich8lan(hw); | 2195 | nvm->ops.acquire_nvm(hw); |
1840 | if (ret_val) | ||
1841 | return; | ||
1842 | 2196 | ||
1843 | gfpreg = er32flash(ICH_FLASH_GFPREG); | 2197 | gfpreg = er32flash(ICH_FLASH_GFPREG); |
1844 | 2198 | ||
@@ -1859,7 +2213,7 @@ void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw) | |||
1859 | hsfsts.hsf_status.flockdn = true; | 2213 | hsfsts.hsf_status.flockdn = true; |
1860 | ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval); | 2214 | ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval); |
1861 | 2215 | ||
1862 | e1000_release_swflag_ich8lan(hw); | 2216 | nvm->ops.release_nvm(hw); |
1863 | } | 2217 | } |
1864 | 2218 | ||
1865 | /** | 2219 | /** |
@@ -2229,6 +2583,8 @@ static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw) | |||
2229 | **/ | 2583 | **/ |
2230 | static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | 2584 | static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) |
2231 | { | 2585 | { |
2586 | struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan; | ||
2587 | u16 reg; | ||
2232 | u32 ctrl, icr, kab; | 2588 | u32 ctrl, icr, kab; |
2233 | s32 ret_val; | 2589 | s32 ret_val; |
2234 | 2590 | ||
@@ -2263,6 +2619,18 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
2263 | ew32(PBS, E1000_PBS_16K); | 2619 | ew32(PBS, E1000_PBS_16K); |
2264 | } | 2620 | } |
2265 | 2621 | ||
2622 | if (hw->mac.type == e1000_pchlan) { | ||
2623 | /* Save the NVM K1 bit setting*/ | ||
2624 | ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, ®); | ||
2625 | if (ret_val) | ||
2626 | return ret_val; | ||
2627 | |||
2628 | if (reg & E1000_NVM_K1_ENABLE) | ||
2629 | dev_spec->nvm_k1_enabled = true; | ||
2630 | else | ||
2631 | dev_spec->nvm_k1_enabled = false; | ||
2632 | } | ||
2633 | |||
2266 | ctrl = er32(CTRL); | 2634 | ctrl = er32(CTRL); |
2267 | 2635 | ||
2268 | if (!e1000_check_reset_block(hw)) { | 2636 | if (!e1000_check_reset_block(hw)) { |
@@ -2304,7 +2672,19 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
2304 | hw_dbg(hw, "Auto Read Done did not complete\n"); | 2672 | hw_dbg(hw, "Auto Read Done did not complete\n"); |
2305 | } | 2673 | } |
2306 | } | 2674 | } |
2675 | /* Dummy read to clear the phy wakeup bit after lcd reset */ | ||
2676 | if (hw->mac.type == e1000_pchlan) | ||
2677 | e1e_rphy(hw, BM_WUC, ®); | ||
2307 | 2678 | ||
2679 | ret_val = e1000_sw_lcd_config_ich8lan(hw); | ||
2680 | if (ret_val) | ||
2681 | goto out; | ||
2682 | |||
2683 | if (hw->mac.type == e1000_pchlan) { | ||
2684 | ret_val = e1000_oem_bits_config_ich8lan(hw, true); | ||
2685 | if (ret_val) | ||
2686 | goto out; | ||
2687 | } | ||
2308 | /* | 2688 | /* |
2309 | * For PCH, this write will make sure that any noise | 2689 | * For PCH, this write will make sure that any noise |
2310 | * will be detected as a CRC error and be dropped rather than show up | 2690 | * will be detected as a CRC error and be dropped rather than show up |
@@ -2323,6 +2703,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) | |||
2323 | if (hw->mac.type == e1000_pchlan) | 2703 | if (hw->mac.type == e1000_pchlan) |
2324 | ret_val = e1000_hv_phy_workarounds_ich8lan(hw); | 2704 | ret_val = e1000_hv_phy_workarounds_ich8lan(hw); |
2325 | 2705 | ||
2706 | out: | ||
2326 | return ret_val; | 2707 | return ret_val; |
2327 | } | 2708 | } |
2328 | 2709 | ||
@@ -2627,14 +3008,6 @@ static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed, | |||
2627 | if (ret_val) | 3008 | if (ret_val) |
2628 | return ret_val; | 3009 | return ret_val; |
2629 | 3010 | ||
2630 | if ((hw->mac.type == e1000_pchlan) && (*speed == SPEED_1000)) { | ||
2631 | ret_val = e1000e_write_kmrn_reg(hw, | ||
2632 | E1000_KMRNCTRLSTA_K1_CONFIG, | ||
2633 | E1000_KMRNCTRLSTA_K1_DISABLE); | ||
2634 | if (ret_val) | ||
2635 | return ret_val; | ||
2636 | } | ||
2637 | |||
2638 | if ((hw->mac.type == e1000_ich8lan) && | 3011 | if ((hw->mac.type == e1000_ich8lan) && |
2639 | (hw->phy.type == e1000_phy_igp_3) && | 3012 | (hw->phy.type == e1000_phy_igp_3) && |
2640 | (*speed == SPEED_1000)) { | 3013 | (*speed == SPEED_1000)) { |
@@ -2843,9 +3216,8 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw) | |||
2843 | E1000_PHY_CTRL_GBE_DISABLE; | 3216 | E1000_PHY_CTRL_GBE_DISABLE; |
2844 | ew32(PHY_CTRL, phy_ctrl); | 3217 | ew32(PHY_CTRL, phy_ctrl); |
2845 | 3218 | ||
2846 | /* Workaround SWFLAG unexpectedly set during S0->Sx */ | ||
2847 | if (hw->mac.type == e1000_pchlan) | 3219 | if (hw->mac.type == e1000_pchlan) |
2848 | udelay(500); | 3220 | e1000_phy_hw_reset_ich8lan(hw); |
2849 | default: | 3221 | default: |
2850 | break; | 3222 | break; |
2851 | } | 3223 | } |
@@ -3113,9 +3485,9 @@ static struct e1000_phy_operations ich8_phy_ops = { | |||
3113 | }; | 3485 | }; |
3114 | 3486 | ||
3115 | static struct e1000_nvm_operations ich8_nvm_ops = { | 3487 | static struct e1000_nvm_operations ich8_nvm_ops = { |
3116 | .acquire_nvm = e1000_acquire_swflag_ich8lan, | 3488 | .acquire_nvm = e1000_acquire_nvm_ich8lan, |
3117 | .read_nvm = e1000_read_nvm_ich8lan, | 3489 | .read_nvm = e1000_read_nvm_ich8lan, |
3118 | .release_nvm = e1000_release_swflag_ich8lan, | 3490 | .release_nvm = e1000_release_nvm_ich8lan, |
3119 | .update_nvm = e1000_update_nvm_checksum_ich8lan, | 3491 | .update_nvm = e1000_update_nvm_checksum_ich8lan, |
3120 | .valid_led_default = e1000_valid_led_default_ich8lan, | 3492 | .valid_led_default = e1000_valid_led_default_ich8lan, |
3121 | .validate_nvm = e1000_validate_nvm_checksum_ich8lan, | 3493 | .validate_nvm = e1000_validate_nvm_checksum_ich8lan, |
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c index 994401fd0664..03175b3a2c9e 100644 --- a/drivers/net/e1000e/phy.c +++ b/drivers/net/e1000e/phy.c | |||
@@ -95,13 +95,6 @@ static const u16 e1000_igp_2_cable_length_table[] = | |||
95 | /* BM PHY Copper Specific Control 1 */ | 95 | /* BM PHY Copper Specific Control 1 */ |
96 | #define BM_CS_CTRL1 16 | 96 | #define BM_CS_CTRL1 16 |
97 | 97 | ||
98 | /* BM PHY Copper Specific Status */ | ||
99 | #define BM_CS_STATUS 17 | ||
100 | #define BM_CS_STATUS_LINK_UP 0x0400 | ||
101 | #define BM_CS_STATUS_RESOLVED 0x0800 | ||
102 | #define BM_CS_STATUS_SPEED_MASK 0xC000 | ||
103 | #define BM_CS_STATUS_SPEED_1000 0x8000 | ||
104 | |||
105 | #define HV_MUX_DATA_CTRL PHY_REG(776, 16) | 98 | #define HV_MUX_DATA_CTRL PHY_REG(776, 16) |
106 | #define HV_MUX_DATA_CTRL_GEN_TO_MAC 0x0400 | 99 | #define HV_MUX_DATA_CTRL_GEN_TO_MAC 0x0400 |
107 | #define HV_MUX_DATA_CTRL_FORCE_SPEED 0x0004 | 100 | #define HV_MUX_DATA_CTRL_FORCE_SPEED 0x0004 |
@@ -164,16 +157,25 @@ s32 e1000e_get_phy_id(struct e1000_hw *hw) | |||
164 | * MDIC mode. No harm in trying again in this case since | 157 | * MDIC mode. No harm in trying again in this case since |
165 | * the PHY ID is unknown at this point anyway | 158 | * the PHY ID is unknown at this point anyway |
166 | */ | 159 | */ |
160 | ret_val = phy->ops.acquire_phy(hw); | ||
161 | if (ret_val) | ||
162 | goto out; | ||
167 | ret_val = e1000_set_mdio_slow_mode_hv(hw, true); | 163 | ret_val = e1000_set_mdio_slow_mode_hv(hw, true); |
168 | if (ret_val) | 164 | if (ret_val) |
169 | goto out; | 165 | goto out; |
166 | phy->ops.release_phy(hw); | ||
170 | 167 | ||
171 | retry_count++; | 168 | retry_count++; |
172 | } | 169 | } |
173 | out: | 170 | out: |
174 | /* Revert to MDIO fast mode, if applicable */ | 171 | /* Revert to MDIO fast mode, if applicable */ |
175 | if (retry_count) | 172 | if (retry_count) { |
173 | ret_val = phy->ops.acquire_phy(hw); | ||
174 | if (ret_val) | ||
175 | return ret_val; | ||
176 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 176 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
177 | phy->ops.release_phy(hw); | ||
178 | } | ||
177 | 179 | ||
178 | return ret_val; | 180 | return ret_val; |
179 | } | 181 | } |
@@ -354,94 +356,173 @@ s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data) | |||
354 | } | 356 | } |
355 | 357 | ||
356 | /** | 358 | /** |
357 | * e1000e_read_phy_reg_igp - Read igp PHY register | 359 | * __e1000e_read_phy_reg_igp - Read igp PHY register |
358 | * @hw: pointer to the HW structure | 360 | * @hw: pointer to the HW structure |
359 | * @offset: register offset to be read | 361 | * @offset: register offset to be read |
360 | * @data: pointer to the read data | 362 | * @data: pointer to the read data |
363 | * @locked: semaphore has already been acquired or not | ||
361 | * | 364 | * |
362 | * Acquires semaphore, if necessary, then reads the PHY register at offset | 365 | * Acquires semaphore, if necessary, then reads the PHY register at offset |
363 | * and storing the retrieved information in data. Release any acquired | 366 | * and stores the retrieved information in data. Release any acquired |
364 | * semaphores before exiting. | 367 | * semaphores before exiting. |
365 | **/ | 368 | **/ |
366 | s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) | 369 | static s32 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, |
370 | bool locked) | ||
367 | { | 371 | { |
368 | s32 ret_val; | 372 | s32 ret_val = 0; |
369 | 373 | ||
370 | ret_val = hw->phy.ops.acquire_phy(hw); | 374 | if (!locked) { |
371 | if (ret_val) | 375 | if (!(hw->phy.ops.acquire_phy)) |
372 | return ret_val; | 376 | goto out; |
377 | |||
378 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
379 | if (ret_val) | ||
380 | goto out; | ||
381 | } | ||
373 | 382 | ||
374 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 383 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
375 | ret_val = e1000e_write_phy_reg_mdic(hw, | 384 | ret_val = e1000e_write_phy_reg_mdic(hw, |
376 | IGP01E1000_PHY_PAGE_SELECT, | 385 | IGP01E1000_PHY_PAGE_SELECT, |
377 | (u16)offset); | 386 | (u16)offset); |
378 | if (ret_val) { | 387 | if (ret_val) |
379 | hw->phy.ops.release_phy(hw); | 388 | goto release; |
380 | return ret_val; | ||
381 | } | ||
382 | } | 389 | } |
383 | 390 | ||
384 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 391 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
385 | data); | 392 | data); |
386 | |||
387 | hw->phy.ops.release_phy(hw); | ||
388 | 393 | ||
394 | release: | ||
395 | if (!locked) | ||
396 | hw->phy.ops.release_phy(hw); | ||
397 | out: | ||
389 | return ret_val; | 398 | return ret_val; |
390 | } | 399 | } |
391 | 400 | ||
392 | /** | 401 | /** |
402 | * e1000e_read_phy_reg_igp - Read igp PHY register | ||
403 | * @hw: pointer to the HW structure | ||
404 | * @offset: register offset to be read | ||
405 | * @data: pointer to the read data | ||
406 | * | ||
407 | * Acquires semaphore then reads the PHY register at offset and stores the | ||
408 | * retrieved information in data. | ||
409 | * Release the acquired semaphore before exiting. | ||
410 | **/ | ||
411 | s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) | ||
412 | { | ||
413 | return __e1000e_read_phy_reg_igp(hw, offset, data, false); | ||
414 | } | ||
415 | |||
416 | /** | ||
417 | * e1000e_read_phy_reg_igp_locked - Read igp PHY register | ||
418 | * @hw: pointer to the HW structure | ||
419 | * @offset: register offset to be read | ||
420 | * @data: pointer to the read data | ||
421 | * | ||
422 | * Reads the PHY register at offset and stores the retrieved information | ||
423 | * in data. Assumes semaphore already acquired. | ||
424 | **/ | ||
425 | s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data) | ||
426 | { | ||
427 | return __e1000e_read_phy_reg_igp(hw, offset, data, true); | ||
428 | } | ||
429 | |||
430 | /** | ||
393 | * e1000e_write_phy_reg_igp - Write igp PHY register | 431 | * e1000e_write_phy_reg_igp - Write igp PHY register |
394 | * @hw: pointer to the HW structure | 432 | * @hw: pointer to the HW structure |
395 | * @offset: register offset to write to | 433 | * @offset: register offset to write to |
396 | * @data: data to write at register offset | 434 | * @data: data to write at register offset |
435 | * @locked: semaphore has already been acquired or not | ||
397 | * | 436 | * |
398 | * Acquires semaphore, if necessary, then writes the data to PHY register | 437 | * Acquires semaphore, if necessary, then writes the data to PHY register |
399 | * at the offset. Release any acquired semaphores before exiting. | 438 | * at the offset. Release any acquired semaphores before exiting. |
400 | **/ | 439 | **/ |
401 | s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) | 440 | static s32 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, |
441 | bool locked) | ||
402 | { | 442 | { |
403 | s32 ret_val; | 443 | s32 ret_val = 0; |
404 | 444 | ||
405 | ret_val = hw->phy.ops.acquire_phy(hw); | 445 | if (!locked) { |
406 | if (ret_val) | 446 | if (!(hw->phy.ops.acquire_phy)) |
407 | return ret_val; | 447 | goto out; |
448 | |||
449 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
450 | if (ret_val) | ||
451 | goto out; | ||
452 | } | ||
408 | 453 | ||
409 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 454 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
410 | ret_val = e1000e_write_phy_reg_mdic(hw, | 455 | ret_val = e1000e_write_phy_reg_mdic(hw, |
411 | IGP01E1000_PHY_PAGE_SELECT, | 456 | IGP01E1000_PHY_PAGE_SELECT, |
412 | (u16)offset); | 457 | (u16)offset); |
413 | if (ret_val) { | 458 | if (ret_val) |
414 | hw->phy.ops.release_phy(hw); | 459 | goto release; |
415 | return ret_val; | ||
416 | } | ||
417 | } | 460 | } |
418 | 461 | ||
419 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 462 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
420 | data); | 463 | data); |
421 | 464 | ||
422 | hw->phy.ops.release_phy(hw); | 465 | release: |
466 | if (!locked) | ||
467 | hw->phy.ops.release_phy(hw); | ||
423 | 468 | ||
469 | out: | ||
424 | return ret_val; | 470 | return ret_val; |
425 | } | 471 | } |
426 | 472 | ||
427 | /** | 473 | /** |
428 | * e1000e_read_kmrn_reg - Read kumeran register | 474 | * e1000e_write_phy_reg_igp - Write igp PHY register |
475 | * @hw: pointer to the HW structure | ||
476 | * @offset: register offset to write to | ||
477 | * @data: data to write at register offset | ||
478 | * | ||
479 | * Acquires semaphore then writes the data to PHY register | ||
480 | * at the offset. Release any acquired semaphores before exiting. | ||
481 | **/ | ||
482 | s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) | ||
483 | { | ||
484 | return __e1000e_write_phy_reg_igp(hw, offset, data, false); | ||
485 | } | ||
486 | |||
487 | /** | ||
488 | * e1000e_write_phy_reg_igp_locked - Write igp PHY register | ||
489 | * @hw: pointer to the HW structure | ||
490 | * @offset: register offset to write to | ||
491 | * @data: data to write at register offset | ||
492 | * | ||
493 | * Writes the data to PHY register at the offset. | ||
494 | * Assumes semaphore already acquired. | ||
495 | **/ | ||
496 | s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data) | ||
497 | { | ||
498 | return __e1000e_write_phy_reg_igp(hw, offset, data, true); | ||
499 | } | ||
500 | |||
501 | /** | ||
502 | * __e1000_read_kmrn_reg - Read kumeran register | ||
429 | * @hw: pointer to the HW structure | 503 | * @hw: pointer to the HW structure |
430 | * @offset: register offset to be read | 504 | * @offset: register offset to be read |
431 | * @data: pointer to the read data | 505 | * @data: pointer to the read data |
506 | * @locked: semaphore has already been acquired or not | ||
432 | * | 507 | * |
433 | * Acquires semaphore, if necessary. Then reads the PHY register at offset | 508 | * Acquires semaphore, if necessary. Then reads the PHY register at offset |
434 | * using the kumeran interface. The information retrieved is stored in data. | 509 | * using the kumeran interface. The information retrieved is stored in data. |
435 | * Release any acquired semaphores before exiting. | 510 | * Release any acquired semaphores before exiting. |
436 | **/ | 511 | **/ |
437 | s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) | 512 | static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, |
513 | bool locked) | ||
438 | { | 514 | { |
439 | u32 kmrnctrlsta; | 515 | u32 kmrnctrlsta; |
440 | s32 ret_val; | 516 | s32 ret_val = 0; |
441 | 517 | ||
442 | ret_val = hw->phy.ops.acquire_phy(hw); | 518 | if (!locked) { |
443 | if (ret_val) | 519 | if (!(hw->phy.ops.acquire_phy)) |
444 | return ret_val; | 520 | goto out; |
521 | |||
522 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
523 | if (ret_val) | ||
524 | goto out; | ||
525 | } | ||
445 | 526 | ||
446 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & | 527 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & |
447 | E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; | 528 | E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; |
@@ -452,41 +533,111 @@ s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) | |||
452 | kmrnctrlsta = er32(KMRNCTRLSTA); | 533 | kmrnctrlsta = er32(KMRNCTRLSTA); |
453 | *data = (u16)kmrnctrlsta; | 534 | *data = (u16)kmrnctrlsta; |
454 | 535 | ||
455 | hw->phy.ops.release_phy(hw); | 536 | if (!locked) |
537 | hw->phy.ops.release_phy(hw); | ||
456 | 538 | ||
539 | out: | ||
457 | return ret_val; | 540 | return ret_val; |
458 | } | 541 | } |
459 | 542 | ||
460 | /** | 543 | /** |
461 | * e1000e_write_kmrn_reg - Write kumeran register | 544 | * e1000e_read_kmrn_reg - Read kumeran register |
545 | * @hw: pointer to the HW structure | ||
546 | * @offset: register offset to be read | ||
547 | * @data: pointer to the read data | ||
548 | * | ||
549 | * Acquires semaphore then reads the PHY register at offset using the | ||
550 | * kumeran interface. The information retrieved is stored in data. | ||
551 | * Release the acquired semaphore before exiting. | ||
552 | **/ | ||
553 | s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) | ||
554 | { | ||
555 | return __e1000_read_kmrn_reg(hw, offset, data, false); | ||
556 | } | ||
557 | |||
558 | /** | ||
559 | * e1000e_read_kmrn_reg_locked - Read kumeran register | ||
560 | * @hw: pointer to the HW structure | ||
561 | * @offset: register offset to be read | ||
562 | * @data: pointer to the read data | ||
563 | * | ||
564 | * Reads the PHY register at offset using the kumeran interface. The | ||
565 | * information retrieved is stored in data. | ||
566 | * Assumes semaphore already acquired. | ||
567 | **/ | ||
568 | s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data) | ||
569 | { | ||
570 | return __e1000_read_kmrn_reg(hw, offset, data, true); | ||
571 | } | ||
572 | |||
573 | /** | ||
574 | * __e1000_write_kmrn_reg - Write kumeran register | ||
462 | * @hw: pointer to the HW structure | 575 | * @hw: pointer to the HW structure |
463 | * @offset: register offset to write to | 576 | * @offset: register offset to write to |
464 | * @data: data to write at register offset | 577 | * @data: data to write at register offset |
578 | * @locked: semaphore has already been acquired or not | ||
465 | * | 579 | * |
466 | * Acquires semaphore, if necessary. Then write the data to PHY register | 580 | * Acquires semaphore, if necessary. Then write the data to PHY register |
467 | * at the offset using the kumeran interface. Release any acquired semaphores | 581 | * at the offset using the kumeran interface. Release any acquired semaphores |
468 | * before exiting. | 582 | * before exiting. |
469 | **/ | 583 | **/ |
470 | s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data) | 584 | static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, |
585 | bool locked) | ||
471 | { | 586 | { |
472 | u32 kmrnctrlsta; | 587 | u32 kmrnctrlsta; |
473 | s32 ret_val; | 588 | s32 ret_val = 0; |
474 | 589 | ||
475 | ret_val = hw->phy.ops.acquire_phy(hw); | 590 | if (!locked) { |
476 | if (ret_val) | 591 | if (!(hw->phy.ops.acquire_phy)) |
477 | return ret_val; | 592 | goto out; |
593 | |||
594 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
595 | if (ret_val) | ||
596 | goto out; | ||
597 | } | ||
478 | 598 | ||
479 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & | 599 | kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & |
480 | E1000_KMRNCTRLSTA_OFFSET) | data; | 600 | E1000_KMRNCTRLSTA_OFFSET) | data; |
481 | ew32(KMRNCTRLSTA, kmrnctrlsta); | 601 | ew32(KMRNCTRLSTA, kmrnctrlsta); |
482 | 602 | ||
483 | udelay(2); | 603 | udelay(2); |
484 | hw->phy.ops.release_phy(hw); | ||
485 | 604 | ||
605 | if (!locked) | ||
606 | hw->phy.ops.release_phy(hw); | ||
607 | |||
608 | out: | ||
486 | return ret_val; | 609 | return ret_val; |
487 | } | 610 | } |
488 | 611 | ||
489 | /** | 612 | /** |
613 | * e1000e_write_kmrn_reg - Write kumeran register | ||
614 | * @hw: pointer to the HW structure | ||
615 | * @offset: register offset to write to | ||
616 | * @data: data to write at register offset | ||
617 | * | ||
618 | * Acquires semaphore then writes the data to the PHY register at the offset | ||
619 | * using the kumeran interface. Release the acquired semaphore before exiting. | ||
620 | **/ | ||
621 | s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data) | ||
622 | { | ||
623 | return __e1000_write_kmrn_reg(hw, offset, data, false); | ||
624 | } | ||
625 | |||
626 | /** | ||
627 | * e1000e_write_kmrn_reg_locked - Write kumeran register | ||
628 | * @hw: pointer to the HW structure | ||
629 | * @offset: register offset to write to | ||
630 | * @data: data to write at register offset | ||
631 | * | ||
632 | * Write the data to PHY register at the offset using the kumeran interface. | ||
633 | * Assumes semaphore already acquired. | ||
634 | **/ | ||
635 | s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data) | ||
636 | { | ||
637 | return __e1000_write_kmrn_reg(hw, offset, data, true); | ||
638 | } | ||
639 | |||
640 | /** | ||
490 | * e1000_copper_link_setup_82577 - Setup 82577 PHY for copper link | 641 | * e1000_copper_link_setup_82577 - Setup 82577 PHY for copper link |
491 | * @hw: pointer to the HW structure | 642 | * @hw: pointer to the HW structure |
492 | * | 643 | * |
@@ -2105,6 +2256,10 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | |||
2105 | u32 page = offset >> IGP_PAGE_SHIFT; | 2256 | u32 page = offset >> IGP_PAGE_SHIFT; |
2106 | u32 page_shift = 0; | 2257 | u32 page_shift = 0; |
2107 | 2258 | ||
2259 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2260 | if (ret_val) | ||
2261 | return ret_val; | ||
2262 | |||
2108 | /* Page 800 works differently than the rest so it has its own func */ | 2263 | /* Page 800 works differently than the rest so it has its own func */ |
2109 | if (page == BM_WUC_PAGE) { | 2264 | if (page == BM_WUC_PAGE) { |
2110 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, | 2265 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, |
@@ -2112,10 +2267,6 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | |||
2112 | goto out; | 2267 | goto out; |
2113 | } | 2268 | } |
2114 | 2269 | ||
2115 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2116 | if (ret_val) | ||
2117 | goto out; | ||
2118 | |||
2119 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); | 2270 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); |
2120 | 2271 | ||
2121 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 2272 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2135,18 +2286,15 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | |||
2135 | /* Page is shifted left, PHY expects (page x 32) */ | 2286 | /* Page is shifted left, PHY expects (page x 32) */ |
2136 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, | 2287 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, |
2137 | (page << page_shift)); | 2288 | (page << page_shift)); |
2138 | if (ret_val) { | 2289 | if (ret_val) |
2139 | hw->phy.ops.release_phy(hw); | ||
2140 | goto out; | 2290 | goto out; |
2141 | } | ||
2142 | } | 2291 | } |
2143 | 2292 | ||
2144 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2293 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2145 | data); | 2294 | data); |
2146 | 2295 | ||
2147 | hw->phy.ops.release_phy(hw); | ||
2148 | |||
2149 | out: | 2296 | out: |
2297 | hw->phy.ops.release_phy(hw); | ||
2150 | return ret_val; | 2298 | return ret_val; |
2151 | } | 2299 | } |
2152 | 2300 | ||
@@ -2167,6 +2315,10 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2167 | u32 page = offset >> IGP_PAGE_SHIFT; | 2315 | u32 page = offset >> IGP_PAGE_SHIFT; |
2168 | u32 page_shift = 0; | 2316 | u32 page_shift = 0; |
2169 | 2317 | ||
2318 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2319 | if (ret_val) | ||
2320 | return ret_val; | ||
2321 | |||
2170 | /* Page 800 works differently than the rest so it has its own func */ | 2322 | /* Page 800 works differently than the rest so it has its own func */ |
2171 | if (page == BM_WUC_PAGE) { | 2323 | if (page == BM_WUC_PAGE) { |
2172 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, | 2324 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, |
@@ -2174,10 +2326,6 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2174 | goto out; | 2326 | goto out; |
2175 | } | 2327 | } |
2176 | 2328 | ||
2177 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2178 | if (ret_val) | ||
2179 | goto out; | ||
2180 | |||
2181 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); | 2329 | hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); |
2182 | 2330 | ||
2183 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 2331 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2197,17 +2345,14 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2197 | /* Page is shifted left, PHY expects (page x 32) */ | 2345 | /* Page is shifted left, PHY expects (page x 32) */ |
2198 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, | 2346 | ret_val = e1000e_write_phy_reg_mdic(hw, page_select, |
2199 | (page << page_shift)); | 2347 | (page << page_shift)); |
2200 | if (ret_val) { | 2348 | if (ret_val) |
2201 | hw->phy.ops.release_phy(hw); | ||
2202 | goto out; | 2349 | goto out; |
2203 | } | ||
2204 | } | 2350 | } |
2205 | 2351 | ||
2206 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2352 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2207 | data); | 2353 | data); |
2208 | hw->phy.ops.release_phy(hw); | ||
2209 | |||
2210 | out: | 2354 | out: |
2355 | hw->phy.ops.release_phy(hw); | ||
2211 | return ret_val; | 2356 | return ret_val; |
2212 | } | 2357 | } |
2213 | 2358 | ||
@@ -2226,17 +2371,17 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2226 | s32 ret_val; | 2371 | s32 ret_val; |
2227 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); | 2372 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); |
2228 | 2373 | ||
2374 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2375 | if (ret_val) | ||
2376 | return ret_val; | ||
2377 | |||
2229 | /* Page 800 works differently than the rest so it has its own func */ | 2378 | /* Page 800 works differently than the rest so it has its own func */ |
2230 | if (page == BM_WUC_PAGE) { | 2379 | if (page == BM_WUC_PAGE) { |
2231 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, | 2380 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, |
2232 | true); | 2381 | true); |
2233 | return ret_val; | 2382 | goto out; |
2234 | } | 2383 | } |
2235 | 2384 | ||
2236 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2237 | if (ret_val) | ||
2238 | return ret_val; | ||
2239 | |||
2240 | hw->phy.addr = 1; | 2385 | hw->phy.addr = 1; |
2241 | 2386 | ||
2242 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 2387 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2245,16 +2390,14 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2245 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, | 2390 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, |
2246 | page); | 2391 | page); |
2247 | 2392 | ||
2248 | if (ret_val) { | 2393 | if (ret_val) |
2249 | hw->phy.ops.release_phy(hw); | 2394 | goto out; |
2250 | return ret_val; | ||
2251 | } | ||
2252 | } | 2395 | } |
2253 | 2396 | ||
2254 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2397 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2255 | data); | 2398 | data); |
2399 | out: | ||
2256 | hw->phy.ops.release_phy(hw); | 2400 | hw->phy.ops.release_phy(hw); |
2257 | |||
2258 | return ret_val; | 2401 | return ret_val; |
2259 | } | 2402 | } |
2260 | 2403 | ||
@@ -2272,17 +2415,17 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) | |||
2272 | s32 ret_val; | 2415 | s32 ret_val; |
2273 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); | 2416 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); |
2274 | 2417 | ||
2418 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2419 | if (ret_val) | ||
2420 | return ret_val; | ||
2421 | |||
2275 | /* Page 800 works differently than the rest so it has its own func */ | 2422 | /* Page 800 works differently than the rest so it has its own func */ |
2276 | if (page == BM_WUC_PAGE) { | 2423 | if (page == BM_WUC_PAGE) { |
2277 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, | 2424 | ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, |
2278 | false); | 2425 | false); |
2279 | return ret_val; | 2426 | goto out; |
2280 | } | 2427 | } |
2281 | 2428 | ||
2282 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2283 | if (ret_val) | ||
2284 | return ret_val; | ||
2285 | |||
2286 | hw->phy.addr = 1; | 2429 | hw->phy.addr = 1; |
2287 | 2430 | ||
2288 | if (offset > MAX_PHY_MULTI_PAGE_REG) { | 2431 | if (offset > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2290,17 +2433,15 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) | |||
2290 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, | 2433 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, |
2291 | page); | 2434 | page); |
2292 | 2435 | ||
2293 | if (ret_val) { | 2436 | if (ret_val) |
2294 | hw->phy.ops.release_phy(hw); | 2437 | goto out; |
2295 | return ret_val; | ||
2296 | } | ||
2297 | } | 2438 | } |
2298 | 2439 | ||
2299 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2440 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2300 | data); | 2441 | data); |
2301 | 2442 | ||
2443 | out: | ||
2302 | hw->phy.ops.release_phy(hw); | 2444 | hw->phy.ops.release_phy(hw); |
2303 | |||
2304 | return ret_val; | 2445 | return ret_val; |
2305 | } | 2446 | } |
2306 | 2447 | ||
@@ -2320,6 +2461,8 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) | |||
2320 | * 3) Write the address using the address opcode (0x11) | 2461 | * 3) Write the address using the address opcode (0x11) |
2321 | * 4) Read or write the data using the data opcode (0x12) | 2462 | * 4) Read or write the data using the data opcode (0x12) |
2322 | * 5) Restore 769_17.2 to its original value | 2463 | * 5) Restore 769_17.2 to its original value |
2464 | * | ||
2465 | * Assumes semaphore already acquired. | ||
2323 | **/ | 2466 | **/ |
2324 | static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | 2467 | static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, |
2325 | u16 *data, bool read) | 2468 | u16 *data, bool read) |
@@ -2327,20 +2470,12 @@ static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | |||
2327 | s32 ret_val; | 2470 | s32 ret_val; |
2328 | u16 reg = BM_PHY_REG_NUM(offset); | 2471 | u16 reg = BM_PHY_REG_NUM(offset); |
2329 | u16 phy_reg = 0; | 2472 | u16 phy_reg = 0; |
2330 | u8 phy_acquired = 1; | ||
2331 | |||
2332 | 2473 | ||
2333 | /* Gig must be disabled for MDIO accesses to page 800 */ | 2474 | /* Gig must be disabled for MDIO accesses to page 800 */ |
2334 | if ((hw->mac.type == e1000_pchlan) && | 2475 | if ((hw->mac.type == e1000_pchlan) && |
2335 | (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE))) | 2476 | (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE))) |
2336 | hw_dbg(hw, "Attempting to access page 800 while gig enabled\n"); | 2477 | hw_dbg(hw, "Attempting to access page 800 while gig enabled\n"); |
2337 | 2478 | ||
2338 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2339 | if (ret_val) { | ||
2340 | phy_acquired = 0; | ||
2341 | goto out; | ||
2342 | } | ||
2343 | |||
2344 | /* All operations in this function are phy address 1 */ | 2479 | /* All operations in this function are phy address 1 */ |
2345 | hw->phy.addr = 1; | 2480 | hw->phy.addr = 1; |
2346 | 2481 | ||
@@ -2397,8 +2532,6 @@ static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, | |||
2397 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); | 2532 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); |
2398 | 2533 | ||
2399 | out: | 2534 | out: |
2400 | if (phy_acquired == 1) | ||
2401 | hw->phy.ops.release_phy(hw); | ||
2402 | return ret_val; | 2535 | return ret_val; |
2403 | } | 2536 | } |
2404 | 2537 | ||
@@ -2439,52 +2572,63 @@ static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active) | |||
2439 | return 0; | 2572 | return 0; |
2440 | } | 2573 | } |
2441 | 2574 | ||
2575 | /** | ||
2576 | * e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode | ||
2577 | * @hw: pointer to the HW structure | ||
2578 | * @slow: true for slow mode, false for normal mode | ||
2579 | * | ||
2580 | * Assumes semaphore already acquired. | ||
2581 | **/ | ||
2442 | s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow) | 2582 | s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow) |
2443 | { | 2583 | { |
2444 | s32 ret_val = 0; | 2584 | s32 ret_val = 0; |
2445 | u16 data = 0; | 2585 | u16 data = 0; |
2446 | 2586 | ||
2447 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2448 | if (ret_val) | ||
2449 | return ret_val; | ||
2450 | |||
2451 | /* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */ | 2587 | /* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */ |
2452 | hw->phy.addr = 1; | 2588 | hw->phy.addr = 1; |
2453 | ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, | 2589 | ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, |
2454 | (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT)); | 2590 | (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT)); |
2455 | if (ret_val) { | 2591 | if (ret_val) |
2456 | hw->phy.ops.release_phy(hw); | 2592 | goto out; |
2457 | return ret_val; | 2593 | |
2458 | } | ||
2459 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1, | 2594 | ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1, |
2460 | (0x2180 | (slow << 10))); | 2595 | (0x2180 | (slow << 10))); |
2596 | if (ret_val) | ||
2597 | goto out; | ||
2461 | 2598 | ||
2462 | /* dummy read when reverting to fast mode - throw away result */ | 2599 | /* dummy read when reverting to fast mode - throw away result */ |
2463 | if (!slow) | 2600 | if (!slow) |
2464 | e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data); | 2601 | ret_val = e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data); |
2465 | |||
2466 | hw->phy.ops.release_phy(hw); | ||
2467 | 2602 | ||
2603 | out: | ||
2468 | return ret_val; | 2604 | return ret_val; |
2469 | } | 2605 | } |
2470 | 2606 | ||
2471 | /** | 2607 | /** |
2472 | * e1000_read_phy_reg_hv - Read HV PHY register | 2608 | * __e1000_read_phy_reg_hv - Read HV PHY register |
2473 | * @hw: pointer to the HW structure | 2609 | * @hw: pointer to the HW structure |
2474 | * @offset: register offset to be read | 2610 | * @offset: register offset to be read |
2475 | * @data: pointer to the read data | 2611 | * @data: pointer to the read data |
2612 | * @locked: semaphore has already been acquired or not | ||
2476 | * | 2613 | * |
2477 | * Acquires semaphore, if necessary, then reads the PHY register at offset | 2614 | * Acquires semaphore, if necessary, then reads the PHY register at offset |
2478 | * and storing the retrieved information in data. Release any acquired | 2615 | * and stores the retrieved information in data. Release any acquired |
2479 | * semaphore before exiting. | 2616 | * semaphore before exiting. |
2480 | **/ | 2617 | **/ |
2481 | s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) | 2618 | static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, |
2619 | bool locked) | ||
2482 | { | 2620 | { |
2483 | s32 ret_val; | 2621 | s32 ret_val; |
2484 | u16 page = BM_PHY_REG_PAGE(offset); | 2622 | u16 page = BM_PHY_REG_PAGE(offset); |
2485 | u16 reg = BM_PHY_REG_NUM(offset); | 2623 | u16 reg = BM_PHY_REG_NUM(offset); |
2486 | bool in_slow_mode = false; | 2624 | bool in_slow_mode = false; |
2487 | 2625 | ||
2626 | if (!locked) { | ||
2627 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2628 | if (ret_val) | ||
2629 | return ret_val; | ||
2630 | } | ||
2631 | |||
2488 | /* Workaround failure in MDIO access while cable is disconnected */ | 2632 | /* Workaround failure in MDIO access while cable is disconnected */ |
2489 | if ((hw->phy.type == e1000_phy_82577) && | 2633 | if ((hw->phy.type == e1000_phy_82577) && |
2490 | !(er32(STATUS) & E1000_STATUS_LU)) { | 2634 | !(er32(STATUS) & E1000_STATUS_LU)) { |
@@ -2508,10 +2652,6 @@ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2508 | goto out; | 2652 | goto out; |
2509 | } | 2653 | } |
2510 | 2654 | ||
2511 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2512 | if (ret_val) | ||
2513 | goto out; | ||
2514 | |||
2515 | hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); | 2655 | hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); |
2516 | 2656 | ||
2517 | if (page == HV_INTC_FC_PAGE_START) | 2657 | if (page == HV_INTC_FC_PAGE_START) |
@@ -2529,42 +2669,76 @@ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2529 | ret_val = e1000e_write_phy_reg_mdic(hw, | 2669 | ret_val = e1000e_write_phy_reg_mdic(hw, |
2530 | IGP01E1000_PHY_PAGE_SELECT, | 2670 | IGP01E1000_PHY_PAGE_SELECT, |
2531 | (page << IGP_PAGE_SHIFT)); | 2671 | (page << IGP_PAGE_SHIFT)); |
2532 | if (ret_val) { | ||
2533 | hw->phy.ops.release_phy(hw); | ||
2534 | goto out; | ||
2535 | } | ||
2536 | hw->phy.addr = phy_addr; | 2672 | hw->phy.addr = phy_addr; |
2537 | } | 2673 | } |
2538 | } | 2674 | } |
2539 | 2675 | ||
2540 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, | 2676 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, |
2541 | data); | 2677 | data); |
2542 | hw->phy.ops.release_phy(hw); | ||
2543 | |||
2544 | out: | 2678 | out: |
2545 | /* Revert to MDIO fast mode, if applicable */ | 2679 | /* Revert to MDIO fast mode, if applicable */ |
2546 | if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) | 2680 | if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) |
2547 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 2681 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
2548 | 2682 | ||
2683 | if (!locked) | ||
2684 | hw->phy.ops.release_phy(hw); | ||
2685 | |||
2549 | return ret_val; | 2686 | return ret_val; |
2550 | } | 2687 | } |
2551 | 2688 | ||
2552 | /** | 2689 | /** |
2553 | * e1000_write_phy_reg_hv - Write HV PHY register | 2690 | * e1000_read_phy_reg_hv - Read HV PHY register |
2691 | * @hw: pointer to the HW structure | ||
2692 | * @offset: register offset to be read | ||
2693 | * @data: pointer to the read data | ||
2694 | * | ||
2695 | * Acquires semaphore then reads the PHY register at offset and stores | ||
2696 | * the retrieved information in data. Release the acquired semaphore | ||
2697 | * before exiting. | ||
2698 | **/ | ||
2699 | s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) | ||
2700 | { | ||
2701 | return __e1000_read_phy_reg_hv(hw, offset, data, false); | ||
2702 | } | ||
2703 | |||
2704 | /** | ||
2705 | * e1000_read_phy_reg_hv_locked - Read HV PHY register | ||
2706 | * @hw: pointer to the HW structure | ||
2707 | * @offset: register offset to be read | ||
2708 | * @data: pointer to the read data | ||
2709 | * | ||
2710 | * Reads the PHY register at offset and stores the retrieved information | ||
2711 | * in data. Assumes semaphore already acquired. | ||
2712 | **/ | ||
2713 | s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data) | ||
2714 | { | ||
2715 | return __e1000_read_phy_reg_hv(hw, offset, data, true); | ||
2716 | } | ||
2717 | |||
2718 | /** | ||
2719 | * __e1000_write_phy_reg_hv - Write HV PHY register | ||
2554 | * @hw: pointer to the HW structure | 2720 | * @hw: pointer to the HW structure |
2555 | * @offset: register offset to write to | 2721 | * @offset: register offset to write to |
2556 | * @data: data to write at register offset | 2722 | * @data: data to write at register offset |
2723 | * @locked: semaphore has already been acquired or not | ||
2557 | * | 2724 | * |
2558 | * Acquires semaphore, if necessary, then writes the data to PHY register | 2725 | * Acquires semaphore, if necessary, then writes the data to PHY register |
2559 | * at the offset. Release any acquired semaphores before exiting. | 2726 | * at the offset. Release any acquired semaphores before exiting. |
2560 | **/ | 2727 | **/ |
2561 | s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | 2728 | static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, |
2729 | bool locked) | ||
2562 | { | 2730 | { |
2563 | s32 ret_val; | 2731 | s32 ret_val; |
2564 | u16 page = BM_PHY_REG_PAGE(offset); | 2732 | u16 page = BM_PHY_REG_PAGE(offset); |
2565 | u16 reg = BM_PHY_REG_NUM(offset); | 2733 | u16 reg = BM_PHY_REG_NUM(offset); |
2566 | bool in_slow_mode = false; | 2734 | bool in_slow_mode = false; |
2567 | 2735 | ||
2736 | if (!locked) { | ||
2737 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2738 | if (ret_val) | ||
2739 | return ret_val; | ||
2740 | } | ||
2741 | |||
2568 | /* Workaround failure in MDIO access while cable is disconnected */ | 2742 | /* Workaround failure in MDIO access while cable is disconnected */ |
2569 | if ((hw->phy.type == e1000_phy_82577) && | 2743 | if ((hw->phy.type == e1000_phy_82577) && |
2570 | !(er32(STATUS) & E1000_STATUS_LU)) { | 2744 | !(er32(STATUS) & E1000_STATUS_LU)) { |
@@ -2588,10 +2762,6 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | |||
2588 | goto out; | 2762 | goto out; |
2589 | } | 2763 | } |
2590 | 2764 | ||
2591 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2592 | if (ret_val) | ||
2593 | goto out; | ||
2594 | |||
2595 | hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); | 2765 | hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); |
2596 | 2766 | ||
2597 | if (page == HV_INTC_FC_PAGE_START) | 2767 | if (page == HV_INTC_FC_PAGE_START) |
@@ -2607,15 +2777,10 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | |||
2607 | ((MAX_PHY_REG_ADDRESS & reg) == 0) && | 2777 | ((MAX_PHY_REG_ADDRESS & reg) == 0) && |
2608 | (data & (1 << 11))) { | 2778 | (data & (1 << 11))) { |
2609 | u16 data2 = 0x7EFF; | 2779 | u16 data2 = 0x7EFF; |
2610 | hw->phy.ops.release_phy(hw); | ||
2611 | ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3, | 2780 | ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3, |
2612 | &data2, false); | 2781 | &data2, false); |
2613 | if (ret_val) | 2782 | if (ret_val) |
2614 | goto out; | 2783 | goto out; |
2615 | |||
2616 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2617 | if (ret_val) | ||
2618 | goto out; | ||
2619 | } | 2784 | } |
2620 | 2785 | ||
2621 | if (reg > MAX_PHY_MULTI_PAGE_REG) { | 2786 | if (reg > MAX_PHY_MULTI_PAGE_REG) { |
@@ -2630,27 +2795,53 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | |||
2630 | ret_val = e1000e_write_phy_reg_mdic(hw, | 2795 | ret_val = e1000e_write_phy_reg_mdic(hw, |
2631 | IGP01E1000_PHY_PAGE_SELECT, | 2796 | IGP01E1000_PHY_PAGE_SELECT, |
2632 | (page << IGP_PAGE_SHIFT)); | 2797 | (page << IGP_PAGE_SHIFT)); |
2633 | if (ret_val) { | ||
2634 | hw->phy.ops.release_phy(hw); | ||
2635 | goto out; | ||
2636 | } | ||
2637 | hw->phy.addr = phy_addr; | 2798 | hw->phy.addr = phy_addr; |
2638 | } | 2799 | } |
2639 | } | 2800 | } |
2640 | 2801 | ||
2641 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, | 2802 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, |
2642 | data); | 2803 | data); |
2643 | hw->phy.ops.release_phy(hw); | ||
2644 | 2804 | ||
2645 | out: | 2805 | out: |
2646 | /* Revert to MDIO fast mode, if applicable */ | 2806 | /* Revert to MDIO fast mode, if applicable */ |
2647 | if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) | 2807 | if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) |
2648 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 2808 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
2649 | 2809 | ||
2810 | if (!locked) | ||
2811 | hw->phy.ops.release_phy(hw); | ||
2812 | |||
2650 | return ret_val; | 2813 | return ret_val; |
2651 | } | 2814 | } |
2652 | 2815 | ||
2653 | /** | 2816 | /** |
2817 | * e1000_write_phy_reg_hv - Write HV PHY register | ||
2818 | * @hw: pointer to the HW structure | ||
2819 | * @offset: register offset to write to | ||
2820 | * @data: data to write at register offset | ||
2821 | * | ||
2822 | * Acquires semaphore then writes the data to PHY register at the offset. | ||
2823 | * Release the acquired semaphores before exiting. | ||
2824 | **/ | ||
2825 | s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) | ||
2826 | { | ||
2827 | return __e1000_write_phy_reg_hv(hw, offset, data, false); | ||
2828 | } | ||
2829 | |||
2830 | /** | ||
2831 | * e1000_write_phy_reg_hv_locked - Write HV PHY register | ||
2832 | * @hw: pointer to the HW structure | ||
2833 | * @offset: register offset to write to | ||
2834 | * @data: data to write at register offset | ||
2835 | * | ||
2836 | * Writes the data to PHY register at the offset. Assumes semaphore | ||
2837 | * already acquired. | ||
2838 | **/ | ||
2839 | s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data) | ||
2840 | { | ||
2841 | return __e1000_write_phy_reg_hv(hw, offset, data, true); | ||
2842 | } | ||
2843 | |||
2844 | /** | ||
2654 | * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page | 2845 | * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page |
2655 | * @page: page to be accessed | 2846 | * @page: page to be accessed |
2656 | **/ | 2847 | **/ |
@@ -2671,10 +2862,9 @@ static u32 e1000_get_phy_addr_for_hv_page(u32 page) | |||
2671 | * @data: pointer to the data to be read or written | 2862 | * @data: pointer to the data to be read or written |
2672 | * @read: determines if operation is read or written | 2863 | * @read: determines if operation is read or written |
2673 | * | 2864 | * |
2674 | * Acquires semaphore, if necessary, then reads the PHY register at offset | 2865 | * Reads the PHY register at offset and stores the retreived information |
2675 | * and storing the retreived information in data. Release any acquired | 2866 | * in data. Assumes semaphore already acquired. Note that the procedure |
2676 | * semaphores before exiting. Note that the procedure to read these regs | 2867 | * to read these regs uses the address port and data port to read/write. |
2677 | * uses the address port and data port to read/write. | ||
2678 | **/ | 2868 | **/ |
2679 | static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, | 2869 | static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, |
2680 | u16 *data, bool read) | 2870 | u16 *data, bool read) |
@@ -2682,20 +2872,12 @@ static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, | |||
2682 | s32 ret_val; | 2872 | s32 ret_val; |
2683 | u32 addr_reg = 0; | 2873 | u32 addr_reg = 0; |
2684 | u32 data_reg = 0; | 2874 | u32 data_reg = 0; |
2685 | u8 phy_acquired = 1; | ||
2686 | 2875 | ||
2687 | /* This takes care of the difference with desktop vs mobile phy */ | 2876 | /* This takes care of the difference with desktop vs mobile phy */ |
2688 | addr_reg = (hw->phy.type == e1000_phy_82578) ? | 2877 | addr_reg = (hw->phy.type == e1000_phy_82578) ? |
2689 | I82578_ADDR_REG : I82577_ADDR_REG; | 2878 | I82578_ADDR_REG : I82577_ADDR_REG; |
2690 | data_reg = addr_reg + 1; | 2879 | data_reg = addr_reg + 1; |
2691 | 2880 | ||
2692 | ret_val = hw->phy.ops.acquire_phy(hw); | ||
2693 | if (ret_val) { | ||
2694 | hw_dbg(hw, "Could not acquire PHY\n"); | ||
2695 | phy_acquired = 0; | ||
2696 | goto out; | ||
2697 | } | ||
2698 | |||
2699 | /* All operations in this function are phy address 2 */ | 2881 | /* All operations in this function are phy address 2 */ |
2700 | hw->phy.addr = 2; | 2882 | hw->phy.addr = 2; |
2701 | 2883 | ||
@@ -2718,8 +2900,6 @@ static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, | |||
2718 | } | 2900 | } |
2719 | 2901 | ||
2720 | out: | 2902 | out: |
2721 | if (phy_acquired == 1) | ||
2722 | hw->phy.ops.release_phy(hw); | ||
2723 | return ret_val; | 2903 | return ret_val; |
2724 | } | 2904 | } |
2725 | 2905 | ||
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c index e1da4666f204..3116601dbfea 100644 --- a/drivers/net/forcedeth.c +++ b/drivers/net/forcedeth.c | |||
@@ -5821,10 +5821,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i | |||
5821 | dev->dev_addr); | 5821 | dev->dev_addr); |
5822 | dev_printk(KERN_ERR, &pci_dev->dev, | 5822 | dev_printk(KERN_ERR, &pci_dev->dev, |
5823 | "Please complain to your hardware vendor. Switching to a random MAC.\n"); | 5823 | "Please complain to your hardware vendor. Switching to a random MAC.\n"); |
5824 | dev->dev_addr[0] = 0x00; | 5824 | random_ether_addr(dev->dev_addr); |
5825 | dev->dev_addr[1] = 0x00; | ||
5826 | dev->dev_addr[2] = 0x6c; | ||
5827 | get_random_bytes(&dev->dev_addr[3], 3); | ||
5828 | } | 5825 | } |
5829 | 5826 | ||
5830 | dprintk(KERN_DEBUG "%s: MAC Address %pM\n", | 5827 | dprintk(KERN_DEBUG "%s: MAC Address %pM\n", |
diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c index 6ac464866972..efbf67689eca 100644 --- a/drivers/net/fsl_pq_mdio.c +++ b/drivers/net/fsl_pq_mdio.c | |||
@@ -427,3 +427,4 @@ void fsl_pq_mdio_exit(void) | |||
427 | of_unregister_platform_driver(&fsl_pq_mdio_driver); | 427 | of_unregister_platform_driver(&fsl_pq_mdio_driver); |
428 | } | 428 | } |
429 | module_exit(fsl_pq_mdio_exit); | 429 | module_exit(fsl_pq_mdio_exit); |
430 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/net/ibm_newemac/emac.h b/drivers/net/ibm_newemac/emac.h index d34adf99fc6a..8a61b597a169 100644 --- a/drivers/net/ibm_newemac/emac.h +++ b/drivers/net/ibm_newemac/emac.h | |||
@@ -263,8 +263,8 @@ struct emac_regs { | |||
263 | 263 | ||
264 | 264 | ||
265 | /* EMACx_TRTR */ | 265 | /* EMACx_TRTR */ |
266 | #define EMAC_TRTR_SHIFT_EMAC4 27 | 266 | #define EMAC_TRTR_SHIFT_EMAC4 24 |
267 | #define EMAC_TRTR_SHIFT 24 | 267 | #define EMAC_TRTR_SHIFT 27 |
268 | 268 | ||
269 | /* EMAC specific TX descriptor control fields (write access) */ | 269 | /* EMAC specific TX descriptor control fields (write access) */ |
270 | #define EMAC_TX_CTRL_GFCS 0x0200 | 270 | #define EMAC_TX_CTRL_GFCS 0x0200 |
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c index 801f088c134f..030913f8bd26 100644 --- a/drivers/net/ifb.c +++ b/drivers/net/ifb.c | |||
@@ -98,12 +98,13 @@ static void ri_tasklet(unsigned long dev) | |||
98 | stats->tx_packets++; | 98 | stats->tx_packets++; |
99 | stats->tx_bytes +=skb->len; | 99 | stats->tx_bytes +=skb->len; |
100 | 100 | ||
101 | skb->dev = __dev_get_by_index(&init_net, skb->iif); | 101 | skb->dev = dev_get_by_index(&init_net, skb->iif); |
102 | if (!skb->dev) { | 102 | if (!skb->dev) { |
103 | dev_kfree_skb(skb); | 103 | dev_kfree_skb(skb); |
104 | stats->tx_dropped++; | 104 | stats->tx_dropped++; |
105 | break; | 105 | break; |
106 | } | 106 | } |
107 | dev_put(skb->dev); | ||
107 | skb->iif = _dev->ifindex; | 108 | skb->iif = _dev->ifindex; |
108 | 109 | ||
109 | if (from & AT_EGRESS) { | 110 | if (from & AT_EGRESS) { |
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c index deaea8fa1032..b243ed3b0c36 100644 --- a/drivers/net/igb/igb_ethtool.c +++ b/drivers/net/igb/igb_ethtool.c | |||
@@ -732,7 +732,7 @@ static int igb_set_ringparam(struct net_device *netdev, | |||
732 | { | 732 | { |
733 | struct igb_adapter *adapter = netdev_priv(netdev); | 733 | struct igb_adapter *adapter = netdev_priv(netdev); |
734 | struct igb_ring *temp_ring; | 734 | struct igb_ring *temp_ring; |
735 | int i, err; | 735 | int i, err = 0; |
736 | u32 new_rx_count, new_tx_count; | 736 | u32 new_rx_count, new_tx_count; |
737 | 737 | ||
738 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | 738 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
@@ -752,18 +752,30 @@ static int igb_set_ringparam(struct net_device *netdev, | |||
752 | return 0; | 752 | return 0; |
753 | } | 753 | } |
754 | 754 | ||
755 | while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) | ||
756 | msleep(1); | ||
757 | |||
758 | if (!netif_running(adapter->netdev)) { | ||
759 | for (i = 0; i < adapter->num_tx_queues; i++) | ||
760 | adapter->tx_ring[i].count = new_tx_count; | ||
761 | for (i = 0; i < adapter->num_rx_queues; i++) | ||
762 | adapter->rx_ring[i].count = new_rx_count; | ||
763 | adapter->tx_ring_count = new_tx_count; | ||
764 | adapter->rx_ring_count = new_rx_count; | ||
765 | goto clear_reset; | ||
766 | } | ||
767 | |||
755 | if (adapter->num_tx_queues > adapter->num_rx_queues) | 768 | if (adapter->num_tx_queues > adapter->num_rx_queues) |
756 | temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring)); | 769 | temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring)); |
757 | else | 770 | else |
758 | temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring)); | 771 | temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring)); |
759 | if (!temp_ring) | ||
760 | return -ENOMEM; | ||
761 | 772 | ||
762 | while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) | 773 | if (!temp_ring) { |
763 | msleep(1); | 774 | err = -ENOMEM; |
775 | goto clear_reset; | ||
776 | } | ||
764 | 777 | ||
765 | if (netif_running(adapter->netdev)) | 778 | igb_down(adapter); |
766 | igb_down(adapter); | ||
767 | 779 | ||
768 | /* | 780 | /* |
769 | * We can't just free everything and then setup again, | 781 | * We can't just free everything and then setup again, |
@@ -820,14 +832,11 @@ static int igb_set_ringparam(struct net_device *netdev, | |||
820 | 832 | ||
821 | adapter->rx_ring_count = new_rx_count; | 833 | adapter->rx_ring_count = new_rx_count; |
822 | } | 834 | } |
823 | |||
824 | err = 0; | ||
825 | err_setup: | 835 | err_setup: |
826 | if (netif_running(adapter->netdev)) | 836 | igb_up(adapter); |
827 | igb_up(adapter); | ||
828 | |||
829 | clear_bit(__IGB_RESETTING, &adapter->state); | ||
830 | vfree(temp_ring); | 837 | vfree(temp_ring); |
838 | clear_reset: | ||
839 | clear_bit(__IGB_RESETTING, &adapter->state); | ||
831 | return err; | 840 | return err; |
832 | } | 841 | } |
833 | 842 | ||
diff --git a/drivers/net/igbvf/ethtool.c b/drivers/net/igbvf/ethtool.c index ee17a097d1ca..c68265bd0d1a 100644 --- a/drivers/net/igbvf/ethtool.c +++ b/drivers/net/igbvf/ethtool.c | |||
@@ -279,7 +279,7 @@ static int igbvf_set_ringparam(struct net_device *netdev, | |||
279 | { | 279 | { |
280 | struct igbvf_adapter *adapter = netdev_priv(netdev); | 280 | struct igbvf_adapter *adapter = netdev_priv(netdev); |
281 | struct igbvf_ring *temp_ring; | 281 | struct igbvf_ring *temp_ring; |
282 | int err; | 282 | int err = 0; |
283 | u32 new_rx_count, new_tx_count; | 283 | u32 new_rx_count, new_tx_count; |
284 | 284 | ||
285 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) | 285 | if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) |
@@ -299,15 +299,22 @@ static int igbvf_set_ringparam(struct net_device *netdev, | |||
299 | return 0; | 299 | return 0; |
300 | } | 300 | } |
301 | 301 | ||
302 | temp_ring = vmalloc(sizeof(struct igbvf_ring)); | ||
303 | if (!temp_ring) | ||
304 | return -ENOMEM; | ||
305 | |||
306 | while (test_and_set_bit(__IGBVF_RESETTING, &adapter->state)) | 302 | while (test_and_set_bit(__IGBVF_RESETTING, &adapter->state)) |
307 | msleep(1); | 303 | msleep(1); |
308 | 304 | ||
309 | if (netif_running(adapter->netdev)) | 305 | if (!netif_running(adapter->netdev)) { |
310 | igbvf_down(adapter); | 306 | adapter->tx_ring->count = new_tx_count; |
307 | adapter->rx_ring->count = new_rx_count; | ||
308 | goto clear_reset; | ||
309 | } | ||
310 | |||
311 | temp_ring = vmalloc(sizeof(struct igbvf_ring)); | ||
312 | if (!temp_ring) { | ||
313 | err = -ENOMEM; | ||
314 | goto clear_reset; | ||
315 | } | ||
316 | |||
317 | igbvf_down(adapter); | ||
311 | 318 | ||
312 | /* | 319 | /* |
313 | * We can't just free everything and then setup again, | 320 | * We can't just free everything and then setup again, |
@@ -339,14 +346,11 @@ static int igbvf_set_ringparam(struct net_device *netdev, | |||
339 | 346 | ||
340 | memcpy(adapter->rx_ring, temp_ring,sizeof(struct igbvf_ring)); | 347 | memcpy(adapter->rx_ring, temp_ring,sizeof(struct igbvf_ring)); |
341 | } | 348 | } |
342 | |||
343 | err = 0; | ||
344 | err_setup: | 349 | err_setup: |
345 | if (netif_running(adapter->netdev)) | 350 | igbvf_up(adapter); |
346 | igbvf_up(adapter); | ||
347 | |||
348 | clear_bit(__IGBVF_RESETTING, &adapter->state); | ||
349 | vfree(temp_ring); | 351 | vfree(temp_ring); |
352 | clear_reset: | ||
353 | clear_bit(__IGBVF_RESETTING, &adapter->state); | ||
350 | return err; | 354 | return err; |
351 | } | 355 | } |
352 | 356 | ||
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c index fa314cb005a4..856c18c207f3 100644 --- a/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -798,7 +798,7 @@ static int ixgbe_set_ringparam(struct net_device *netdev, | |||
798 | { | 798 | { |
799 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 799 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
800 | struct ixgbe_ring *temp_tx_ring, *temp_rx_ring; | 800 | struct ixgbe_ring *temp_tx_ring, *temp_rx_ring; |
801 | int i, err; | 801 | int i, err = 0; |
802 | u32 new_rx_count, new_tx_count; | 802 | u32 new_rx_count, new_tx_count; |
803 | bool need_update = false; | 803 | bool need_update = false; |
804 | 804 | ||
@@ -822,6 +822,16 @@ static int ixgbe_set_ringparam(struct net_device *netdev, | |||
822 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) | 822 | while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) |
823 | msleep(1); | 823 | msleep(1); |
824 | 824 | ||
825 | if (!netif_running(adapter->netdev)) { | ||
826 | for (i = 0; i < adapter->num_tx_queues; i++) | ||
827 | adapter->tx_ring[i].count = new_tx_count; | ||
828 | for (i = 0; i < adapter->num_rx_queues; i++) | ||
829 | adapter->rx_ring[i].count = new_rx_count; | ||
830 | adapter->tx_ring_count = new_tx_count; | ||
831 | adapter->rx_ring_count = new_rx_count; | ||
832 | goto err_setup; | ||
833 | } | ||
834 | |||
825 | temp_tx_ring = kcalloc(adapter->num_tx_queues, | 835 | temp_tx_ring = kcalloc(adapter->num_tx_queues, |
826 | sizeof(struct ixgbe_ring), GFP_KERNEL); | 836 | sizeof(struct ixgbe_ring), GFP_KERNEL); |
827 | if (!temp_tx_ring) { | 837 | if (!temp_tx_ring) { |
@@ -879,8 +889,7 @@ static int ixgbe_set_ringparam(struct net_device *netdev, | |||
879 | 889 | ||
880 | /* if rings need to be updated, here's the place to do it in one shot */ | 890 | /* if rings need to be updated, here's the place to do it in one shot */ |
881 | if (need_update) { | 891 | if (need_update) { |
882 | if (netif_running(netdev)) | 892 | ixgbe_down(adapter); |
883 | ixgbe_down(adapter); | ||
884 | 893 | ||
885 | /* tx */ | 894 | /* tx */ |
886 | if (new_tx_count != adapter->tx_ring_count) { | 895 | if (new_tx_count != adapter->tx_ring_count) { |
@@ -897,13 +906,8 @@ static int ixgbe_set_ringparam(struct net_device *netdev, | |||
897 | temp_rx_ring = NULL; | 906 | temp_rx_ring = NULL; |
898 | adapter->rx_ring_count = new_rx_count; | 907 | adapter->rx_ring_count = new_rx_count; |
899 | } | 908 | } |
900 | } | ||
901 | |||
902 | /* success! */ | ||
903 | err = 0; | ||
904 | if (netif_running(netdev)) | ||
905 | ixgbe_up(adapter); | 909 | ixgbe_up(adapter); |
906 | 910 | } | |
907 | err_setup: | 911 | err_setup: |
908 | clear_bit(__IXGBE_RESETTING, &adapter->state); | 912 | clear_bit(__IXGBE_RESETTING, &adapter->state); |
909 | return err; | 913 | return err; |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index cbb143ca1eb8..a5036f7c1923 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -44,6 +44,7 @@ | |||
44 | 44 | ||
45 | #include "ixgbe.h" | 45 | #include "ixgbe.h" |
46 | #include "ixgbe_common.h" | 46 | #include "ixgbe_common.h" |
47 | #include "ixgbe_dcb_82599.h" | ||
47 | 48 | ||
48 | char ixgbe_driver_name[] = "ixgbe"; | 49 | char ixgbe_driver_name[] = "ixgbe"; |
49 | static const char ixgbe_driver_string[] = | 50 | static const char ixgbe_driver_string[] = |
@@ -226,6 +227,56 @@ static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter, | |||
226 | /* tx_buffer_info must be completely set up in the transmit path */ | 227 | /* tx_buffer_info must be completely set up in the transmit path */ |
227 | } | 228 | } |
228 | 229 | ||
230 | /** | ||
231 | * ixgbe_tx_is_paused - check if the tx ring is paused | ||
232 | * @adapter: the ixgbe adapter | ||
233 | * @tx_ring: the corresponding tx_ring | ||
234 | * | ||
235 | * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the | ||
236 | * corresponding TC of this tx_ring when checking TFCS. | ||
237 | * | ||
238 | * Returns : true if paused | ||
239 | */ | ||
240 | static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter, | ||
241 | struct ixgbe_ring *tx_ring) | ||
242 | { | ||
243 | int tc; | ||
244 | u32 txoff = IXGBE_TFCS_TXOFF; | ||
245 | |||
246 | #ifdef CONFIG_IXGBE_DCB | ||
247 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | ||
248 | int reg_idx = tx_ring->reg_idx; | ||
249 | int dcb_i = adapter->ring_feature[RING_F_DCB].indices; | ||
250 | |||
251 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { | ||
252 | tc = reg_idx >> 2; | ||
253 | txoff = IXGBE_TFCS_TXOFF0; | ||
254 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | ||
255 | tc = 0; | ||
256 | txoff = IXGBE_TFCS_TXOFF; | ||
257 | if (dcb_i == 8) { | ||
258 | /* TC0, TC1 */ | ||
259 | tc = reg_idx >> 5; | ||
260 | if (tc == 2) /* TC2, TC3 */ | ||
261 | tc += (reg_idx - 64) >> 4; | ||
262 | else if (tc == 3) /* TC4, TC5, TC6, TC7 */ | ||
263 | tc += 1 + ((reg_idx - 96) >> 3); | ||
264 | } else if (dcb_i == 4) { | ||
265 | /* TC0, TC1 */ | ||
266 | tc = reg_idx >> 6; | ||
267 | if (tc == 1) { | ||
268 | tc += (reg_idx - 64) >> 5; | ||
269 | if (tc == 2) /* TC2, TC3 */ | ||
270 | tc += (reg_idx - 96) >> 4; | ||
271 | } | ||
272 | } | ||
273 | } | ||
274 | txoff <<= tc; | ||
275 | } | ||
276 | #endif | ||
277 | return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff; | ||
278 | } | ||
279 | |||
229 | static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, | 280 | static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, |
230 | struct ixgbe_ring *tx_ring, | 281 | struct ixgbe_ring *tx_ring, |
231 | unsigned int eop) | 282 | unsigned int eop) |
@@ -237,7 +288,7 @@ static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, | |||
237 | adapter->detect_tx_hung = false; | 288 | adapter->detect_tx_hung = false; |
238 | if (tx_ring->tx_buffer_info[eop].time_stamp && | 289 | if (tx_ring->tx_buffer_info[eop].time_stamp && |
239 | time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && | 290 | time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && |
240 | !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) { | 291 | !ixgbe_tx_is_paused(adapter, tx_ring)) { |
241 | /* detected Tx unit hang */ | 292 | /* detected Tx unit hang */ |
242 | union ixgbe_adv_tx_desc *tx_desc; | 293 | union ixgbe_adv_tx_desc *tx_desc; |
243 | tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); | 294 | tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); |
@@ -412,19 +463,23 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter, | |||
412 | u32 txctrl; | 463 | u32 txctrl; |
413 | int cpu = get_cpu(); | 464 | int cpu = get_cpu(); |
414 | int q = tx_ring - adapter->tx_ring; | 465 | int q = tx_ring - adapter->tx_ring; |
466 | struct ixgbe_hw *hw = &adapter->hw; | ||
415 | 467 | ||
416 | if (tx_ring->cpu != cpu) { | 468 | if (tx_ring->cpu != cpu) { |
417 | txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q)); | ||
418 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { | 469 | if (adapter->hw.mac.type == ixgbe_mac_82598EB) { |
470 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q)); | ||
419 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; | 471 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; |
420 | txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); | 472 | txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); |
473 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
474 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl); | ||
421 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { | 475 | } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { |
476 | txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q)); | ||
422 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; | 477 | txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; |
423 | txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << | 478 | txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << |
424 | IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); | 479 | IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); |
480 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
481 | IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl); | ||
425 | } | 482 | } |
426 | txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN; | ||
427 | IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl); | ||
428 | tx_ring->cpu = cpu; | 483 | tx_ring->cpu = cpu; |
429 | } | 484 | } |
430 | put_cpu(); | 485 | put_cpu(); |
@@ -1913,11 +1968,25 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter) | |||
1913 | break; | 1968 | break; |
1914 | } | 1969 | } |
1915 | } | 1970 | } |
1971 | |||
1916 | if (hw->mac.type == ixgbe_mac_82599EB) { | 1972 | if (hw->mac.type == ixgbe_mac_82599EB) { |
1973 | u32 rttdcs; | ||
1974 | |||
1975 | /* disable the arbiter while setting MTQC */ | ||
1976 | rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS); | ||
1977 | rttdcs |= IXGBE_RTTDCS_ARBDIS; | ||
1978 | IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); | ||
1979 | |||
1917 | /* We enable 8 traffic classes, DCB only */ | 1980 | /* We enable 8 traffic classes, DCB only */ |
1918 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) | 1981 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) |
1919 | IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA | | 1982 | IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA | |
1920 | IXGBE_MTQC_8TC_8TQ)); | 1983 | IXGBE_MTQC_8TC_8TQ)); |
1984 | else | ||
1985 | IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB); | ||
1986 | |||
1987 | /* re-eable the arbiter */ | ||
1988 | rttdcs &= ~IXGBE_RTTDCS_ARBDIS; | ||
1989 | IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs); | ||
1921 | } | 1990 | } |
1922 | } | 1991 | } |
1923 | 1992 | ||
@@ -2471,7 +2540,10 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter) | |||
2471 | ixgbe_restore_vlan(adapter); | 2540 | ixgbe_restore_vlan(adapter); |
2472 | #ifdef CONFIG_IXGBE_DCB | 2541 | #ifdef CONFIG_IXGBE_DCB |
2473 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { | 2542 | if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { |
2474 | netif_set_gso_max_size(netdev, 32768); | 2543 | if (hw->mac.type == ixgbe_mac_82598EB) |
2544 | netif_set_gso_max_size(netdev, 32768); | ||
2545 | else | ||
2546 | netif_set_gso_max_size(netdev, 65536); | ||
2475 | ixgbe_configure_dcb(adapter); | 2547 | ixgbe_configure_dcb(adapter); |
2476 | } else { | 2548 | } else { |
2477 | netif_set_gso_max_size(netdev, 65536); | 2549 | netif_set_gso_max_size(netdev, 65536); |
@@ -5922,6 +5994,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev) | |||
5922 | } else { | 5994 | } else { |
5923 | pci_set_master(pdev); | 5995 | pci_set_master(pdev); |
5924 | pci_restore_state(pdev); | 5996 | pci_restore_state(pdev); |
5997 | pci_save_state(pdev); | ||
5925 | 5998 | ||
5926 | pci_wake_from_d3(pdev, false); | 5999 | pci_wake_from_d3(pdev, false); |
5927 | 6000 | ||
diff --git a/drivers/net/macsonic.c b/drivers/net/macsonic.c index 61eabcac734c..b3d7d8d77f46 100644 --- a/drivers/net/macsonic.c +++ b/drivers/net/macsonic.c | |||
@@ -223,69 +223,73 @@ static int __devinit macsonic_init(struct net_device *dev) | |||
223 | return 0; | 223 | return 0; |
224 | } | 224 | } |
225 | 225 | ||
226 | static int __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev) | 226 | #define INVALID_MAC(mac) (memcmp(mac, "\x08\x00\x07", 3) && \ |
227 | memcmp(mac, "\x00\xA0\x40", 3) && \ | ||
228 | memcmp(mac, "\x00\x80\x19", 3) && \ | ||
229 | memcmp(mac, "\x00\x05\x02", 3)) | ||
230 | |||
231 | static void __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev) | ||
227 | { | 232 | { |
228 | struct sonic_local *lp = netdev_priv(dev); | 233 | struct sonic_local *lp = netdev_priv(dev); |
229 | const int prom_addr = ONBOARD_SONIC_PROM_BASE; | 234 | const int prom_addr = ONBOARD_SONIC_PROM_BASE; |
230 | int i; | 235 | unsigned short val; |
231 | 236 | ||
232 | /* On NuBus boards we can sometimes look in the ROM resources. | 237 | /* |
233 | No such luck for comm-slot/onboard. */ | 238 | * On NuBus boards we can sometimes look in the ROM resources. |
234 | for(i = 0; i < 6; i++) | 239 | * No such luck for comm-slot/onboard. |
235 | dev->dev_addr[i] = SONIC_READ_PROM(i); | 240 | * On the PowerBook 520, the PROM base address is a mystery. |
241 | */ | ||
242 | if (hwreg_present((void *)prom_addr)) { | ||
243 | int i; | ||
244 | |||
245 | for (i = 0; i < 6; i++) | ||
246 | dev->dev_addr[i] = SONIC_READ_PROM(i); | ||
247 | if (!INVALID_MAC(dev->dev_addr)) | ||
248 | return; | ||
236 | 249 | ||
237 | /* Most of the time, the address is bit-reversed. The NetBSD | 250 | /* |
238 | source has a rather long and detailed historical account of | 251 | * Most of the time, the address is bit-reversed. The NetBSD |
239 | why this is so. */ | 252 | * source has a rather long and detailed historical account of |
240 | if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && | 253 | * why this is so. |
241 | memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && | 254 | */ |
242 | memcmp(dev->dev_addr, "\x00\x80\x19", 3) && | ||
243 | memcmp(dev->dev_addr, "\x00\x05\x02", 3)) | ||
244 | bit_reverse_addr(dev->dev_addr); | 255 | bit_reverse_addr(dev->dev_addr); |
245 | else | 256 | if (!INVALID_MAC(dev->dev_addr)) |
246 | return 0; | 257 | return; |
247 | 258 | ||
248 | /* If we still have what seems to be a bogus address, we'll | ||
249 | look in the CAM. The top entry should be ours. */ | ||
250 | /* Danger! This only works if MacOS has already initialized | ||
251 | the card... */ | ||
252 | if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && | ||
253 | memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && | ||
254 | memcmp(dev->dev_addr, "\x00\x80\x19", 3) && | ||
255 | memcmp(dev->dev_addr, "\x00\x05\x02", 3)) | ||
256 | { | ||
257 | unsigned short val; | ||
258 | |||
259 | printk(KERN_INFO "macsonic: PROM seems to be wrong, trying CAM entry 15\n"); | ||
260 | |||
261 | SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); | ||
262 | SONIC_WRITE(SONIC_CEP, 15); | ||
263 | |||
264 | val = SONIC_READ(SONIC_CAP2); | ||
265 | dev->dev_addr[5] = val >> 8; | ||
266 | dev->dev_addr[4] = val & 0xff; | ||
267 | val = SONIC_READ(SONIC_CAP1); | ||
268 | dev->dev_addr[3] = val >> 8; | ||
269 | dev->dev_addr[2] = val & 0xff; | ||
270 | val = SONIC_READ(SONIC_CAP0); | ||
271 | dev->dev_addr[1] = val >> 8; | ||
272 | dev->dev_addr[0] = val & 0xff; | ||
273 | |||
274 | printk(KERN_INFO "HW Address from CAM 15: %pM\n", | ||
275 | dev->dev_addr); | ||
276 | } else return 0; | ||
277 | |||
278 | if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && | ||
279 | memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && | ||
280 | memcmp(dev->dev_addr, "\x00\x80\x19", 3) && | ||
281 | memcmp(dev->dev_addr, "\x00\x05\x02", 3)) | ||
282 | { | ||
283 | /* | 259 | /* |
284 | * Still nonsense ... messed up someplace! | 260 | * If we still have what seems to be a bogus address, we'll |
261 | * look in the CAM. The top entry should be ours. | ||
285 | */ | 262 | */ |
286 | printk(KERN_ERR "macsonic: ERROR (INVALID MAC)\n"); | 263 | printk(KERN_WARNING "macsonic: MAC address in PROM seems " |
287 | return -EIO; | 264 | "to be invalid, trying CAM\n"); |
288 | } else return 0; | 265 | } else { |
266 | printk(KERN_WARNING "macsonic: cannot read MAC address from " | ||
267 | "PROM, trying CAM\n"); | ||
268 | } | ||
269 | |||
270 | /* This only works if MacOS has already initialized the card. */ | ||
271 | |||
272 | SONIC_WRITE(SONIC_CMD, SONIC_CR_RST); | ||
273 | SONIC_WRITE(SONIC_CEP, 15); | ||
274 | |||
275 | val = SONIC_READ(SONIC_CAP2); | ||
276 | dev->dev_addr[5] = val >> 8; | ||
277 | dev->dev_addr[4] = val & 0xff; | ||
278 | val = SONIC_READ(SONIC_CAP1); | ||
279 | dev->dev_addr[3] = val >> 8; | ||
280 | dev->dev_addr[2] = val & 0xff; | ||
281 | val = SONIC_READ(SONIC_CAP0); | ||
282 | dev->dev_addr[1] = val >> 8; | ||
283 | dev->dev_addr[0] = val & 0xff; | ||
284 | |||
285 | if (!INVALID_MAC(dev->dev_addr)) | ||
286 | return; | ||
287 | |||
288 | /* Still nonsense ... messed up someplace! */ | ||
289 | |||
290 | printk(KERN_WARNING "macsonic: MAC address in CAM entry 15 " | ||
291 | "seems invalid, will use a random MAC\n"); | ||
292 | random_ether_addr(dev->dev_addr); | ||
289 | } | 293 | } |
290 | 294 | ||
291 | static int __devinit mac_onboard_sonic_probe(struct net_device *dev) | 295 | static int __devinit mac_onboard_sonic_probe(struct net_device *dev) |
@@ -402,8 +406,7 @@ static int __devinit mac_onboard_sonic_probe(struct net_device *dev) | |||
402 | SONIC_WRITE(SONIC_ISR, 0x7fff); | 406 | SONIC_WRITE(SONIC_ISR, 0x7fff); |
403 | 407 | ||
404 | /* Now look for the MAC address. */ | 408 | /* Now look for the MAC address. */ |
405 | if (mac_onboard_sonic_ethernet_addr(dev) != 0) | 409 | mac_onboard_sonic_ethernet_addr(dev); |
406 | return -ENODEV; | ||
407 | 410 | ||
408 | /* Shared init code */ | 411 | /* Shared init code */ |
409 | return macsonic_init(dev); | 412 | return macsonic_init(dev); |
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c index 5dd7225b178e..291a505fd4fc 100644 --- a/drivers/net/mlx4/main.c +++ b/drivers/net/mlx4/main.c | |||
@@ -1282,6 +1282,7 @@ static struct pci_device_id mlx4_pci_table[] = { | |||
1282 | { PCI_VDEVICE(MELLANOX, 0x6372) }, /* MT25458 ConnectX EN 10GBASE-T 10GigE */ | 1282 | { PCI_VDEVICE(MELLANOX, 0x6372) }, /* MT25458 ConnectX EN 10GBASE-T 10GigE */ |
1283 | { PCI_VDEVICE(MELLANOX, 0x675a) }, /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */ | 1283 | { PCI_VDEVICE(MELLANOX, 0x675a) }, /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */ |
1284 | { PCI_VDEVICE(MELLANOX, 0x6764) }, /* MT26468 ConnectX EN 10GigE PCIe gen2*/ | 1284 | { PCI_VDEVICE(MELLANOX, 0x6764) }, /* MT26468 ConnectX EN 10GigE PCIe gen2*/ |
1285 | { PCI_VDEVICE(MELLANOX, 0x6746) }, /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */ | ||
1285 | { PCI_VDEVICE(MELLANOX, 0x676e) }, /* MT26478 ConnectX2 40GigE PCIe gen2 */ | 1286 | { PCI_VDEVICE(MELLANOX, 0x676e) }, /* MT26478 ConnectX2 40GigE PCIe gen2 */ |
1286 | { 0, } | 1287 | { 0, } |
1287 | }; | 1288 | }; |
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c index 6930c87f362e..f3624517cb0e 100644 --- a/drivers/net/myri10ge/myri10ge.c +++ b/drivers/net/myri10ge/myri10ge.c | |||
@@ -75,7 +75,7 @@ | |||
75 | #include "myri10ge_mcp.h" | 75 | #include "myri10ge_mcp.h" |
76 | #include "myri10ge_mcp_gen_header.h" | 76 | #include "myri10ge_mcp_gen_header.h" |
77 | 77 | ||
78 | #define MYRI10GE_VERSION_STR "1.5.0-1.432" | 78 | #define MYRI10GE_VERSION_STR "1.5.1-1.451" |
79 | 79 | ||
80 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); | 80 | MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); |
81 | MODULE_AUTHOR("Maintainer: help@myri.com"); | 81 | MODULE_AUTHOR("Maintainer: help@myri.com"); |
@@ -1624,10 +1624,21 @@ myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd) | |||
1624 | return 0; | 1624 | return 0; |
1625 | } | 1625 | } |
1626 | } | 1626 | } |
1627 | if (*ptr == 'R' || *ptr == 'Q') { | 1627 | if (*ptr == '2') |
1628 | /* We've found either an XFP or quad ribbon fiber */ | 1628 | ptr++; |
1629 | if (*ptr == 'R' || *ptr == 'Q' || *ptr == 'S') { | ||
1630 | /* We've found either an XFP, quad ribbon fiber, or SFP+ */ | ||
1629 | cmd->port = PORT_FIBRE; | 1631 | cmd->port = PORT_FIBRE; |
1632 | cmd->supported |= SUPPORTED_FIBRE; | ||
1633 | cmd->advertising |= ADVERTISED_FIBRE; | ||
1634 | } else { | ||
1635 | cmd->port = PORT_OTHER; | ||
1630 | } | 1636 | } |
1637 | if (*ptr == 'R' || *ptr == 'S') | ||
1638 | cmd->transceiver = XCVR_EXTERNAL; | ||
1639 | else | ||
1640 | cmd->transceiver = XCVR_INTERNAL; | ||
1641 | |||
1631 | return 0; | 1642 | return 0; |
1632 | } | 1643 | } |
1633 | 1644 | ||
diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h index 7a7177421d7c..1c46da632125 100644 --- a/drivers/net/netxen/netxen_nic_hdr.h +++ b/drivers/net/netxen/netxen_nic_hdr.h | |||
@@ -419,6 +419,7 @@ enum { | |||
419 | #define NETXEN_CRB_ROMUSB \ | 419 | #define NETXEN_CRB_ROMUSB \ |
420 | NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_ROMUSB) | 420 | NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_ROMUSB) |
421 | #define NETXEN_CRB_I2Q NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2Q) | 421 | #define NETXEN_CRB_I2Q NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2Q) |
422 | #define NETXEN_CRB_I2C0 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2C0) | ||
422 | #define NETXEN_CRB_SMB NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_SMB) | 423 | #define NETXEN_CRB_SMB NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_SMB) |
423 | #define NETXEN_CRB_MAX NETXEN_PCI_CRB_WINDOW(64) | 424 | #define NETXEN_CRB_MAX NETXEN_PCI_CRB_WINDOW(64) |
424 | 425 | ||
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c index 32314000dfcd..3185a98b0917 100644 --- a/drivers/net/netxen/netxen_nic_hw.c +++ b/drivers/net/netxen/netxen_nic_hw.c | |||
@@ -1901,22 +1901,16 @@ netxen_setup_hwops(struct netxen_adapter *adapter) | |||
1901 | 1901 | ||
1902 | int netxen_nic_get_board_info(struct netxen_adapter *adapter) | 1902 | int netxen_nic_get_board_info(struct netxen_adapter *adapter) |
1903 | { | 1903 | { |
1904 | int offset, board_type, magic, header_version; | 1904 | int offset, board_type, magic; |
1905 | struct pci_dev *pdev = adapter->pdev; | 1905 | struct pci_dev *pdev = adapter->pdev; |
1906 | 1906 | ||
1907 | offset = NX_FW_MAGIC_OFFSET; | 1907 | offset = NX_FW_MAGIC_OFFSET; |
1908 | if (netxen_rom_fast_read(adapter, offset, &magic)) | 1908 | if (netxen_rom_fast_read(adapter, offset, &magic)) |
1909 | return -EIO; | 1909 | return -EIO; |
1910 | 1910 | ||
1911 | offset = NX_HDR_VERSION_OFFSET; | 1911 | if (magic != NETXEN_BDINFO_MAGIC) { |
1912 | if (netxen_rom_fast_read(adapter, offset, &header_version)) | 1912 | dev_err(&pdev->dev, "invalid board config, magic=%08x\n", |
1913 | return -EIO; | 1913 | magic); |
1914 | |||
1915 | if (magic != NETXEN_BDINFO_MAGIC || | ||
1916 | header_version != NETXEN_BDINFO_VERSION) { | ||
1917 | dev_err(&pdev->dev, | ||
1918 | "invalid board config, magic=%08x, version=%08x\n", | ||
1919 | magic, header_version); | ||
1920 | return -EIO; | 1914 | return -EIO; |
1921 | } | 1915 | } |
1922 | 1916 | ||
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c index 91c2bc61c8eb..e40b914d6faf 100644 --- a/drivers/net/netxen/netxen_nic_init.c +++ b/drivers/net/netxen/netxen_nic_init.c | |||
@@ -531,6 +531,8 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose) | |||
531 | continue; | 531 | continue; |
532 | 532 | ||
533 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { | 533 | if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { |
534 | if (off == (NETXEN_CRB_I2C0 + 0x1c)) | ||
535 | continue; | ||
534 | /* do not reset PCI */ | 536 | /* do not reset PCI */ |
535 | if (off == (ROMUSB_GLB + 0xbc)) | 537 | if (off == (ROMUSB_GLB + 0xbc)) |
536 | continue; | 538 | continue; |
@@ -553,12 +555,6 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose) | |||
553 | continue; | 555 | continue; |
554 | } | 556 | } |
555 | 557 | ||
556 | if (off == NETXEN_ADDR_ERROR) { | ||
557 | printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n", | ||
558 | netxen_nic_driver_name, buf[i].addr); | ||
559 | continue; | ||
560 | } | ||
561 | |||
562 | init_delay = 1; | 558 | init_delay = 1; |
563 | /* After writing this register, HW needs time for CRB */ | 559 | /* After writing this register, HW needs time for CRB */ |
564 | /* to quiet down (else crb_window returns 0xffffffff) */ | 560 | /* to quiet down (else crb_window returns 0xffffffff) */ |
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c index 7fc15e9e8adb..0b4a56a8c8d5 100644 --- a/drivers/net/netxen/netxen_nic_main.c +++ b/drivers/net/netxen/netxen_nic_main.c | |||
@@ -1919,6 +1919,7 @@ static void netxen_tx_timeout_task(struct work_struct *work) | |||
1919 | 1919 | ||
1920 | request_reset: | 1920 | request_reset: |
1921 | adapter->need_fw_reset = 1; | 1921 | adapter->need_fw_reset = 1; |
1922 | clear_bit(__NX_RESETTING, &adapter->state); | ||
1922 | } | 1923 | } |
1923 | 1924 | ||
1924 | struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) | 1925 | struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) |
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c index bd3447f04902..94c9ad2746bc 100644 --- a/drivers/net/pcmcia/pcnet_cs.c +++ b/drivers/net/pcmcia/pcnet_cs.c | |||
@@ -1760,7 +1760,7 @@ static struct pcmcia_device_id pcnet_ids[] = { | |||
1760 | PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"), | 1760 | PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"), |
1761 | PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"), | 1761 | PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"), |
1762 | PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"), | 1762 | PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"), |
1763 | PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "PE-200.cis"), | 1763 | PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "cis/PE-200.cis"), |
1764 | PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"), | 1764 | PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"), |
1765 | PCMCIA_DEVICE_PROD_ID12("Ethernet", "CF Size PC Card", 0x00b2e941, 0x43ac239b), | 1765 | PCMCIA_DEVICE_PROD_ID12("Ethernet", "CF Size PC Card", 0x00b2e941, 0x43ac239b), |
1766 | PCMCIA_DEVICE_PROD_ID123("Fast Ethernet", "CF Size PC Card", "1.0", | 1766 | PCMCIA_DEVICE_PROD_ID123("Fast Ethernet", "CF Size PC Card", "1.0", |
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c index 8659d341e769..35897134a5dd 100644 --- a/drivers/net/phy/mdio-gpio.c +++ b/drivers/net/phy/mdio-gpio.c | |||
@@ -139,7 +139,7 @@ out: | |||
139 | return NULL; | 139 | return NULL; |
140 | } | 140 | } |
141 | 141 | ||
142 | static void __devinit mdio_gpio_bus_deinit(struct device *dev) | 142 | static void mdio_gpio_bus_deinit(struct device *dev) |
143 | { | 143 | { |
144 | struct mii_bus *bus = dev_get_drvdata(dev); | 144 | struct mii_bus *bus = dev_get_drvdata(dev); |
145 | struct mdio_gpio_info *bitbang = bus->priv; | 145 | struct mdio_gpio_info *bitbang = bus->priv; |
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c index 9bf2a6be9031..965adb6174c3 100644 --- a/drivers/net/ppp_generic.c +++ b/drivers/net/ppp_generic.c | |||
@@ -1944,8 +1944,15 @@ ppp_receive_mp_frame(struct ppp *ppp, struct sk_buff *skb, struct channel *pch) | |||
1944 | } | 1944 | } |
1945 | 1945 | ||
1946 | /* Pull completed packets off the queue and receive them. */ | 1946 | /* Pull completed packets off the queue and receive them. */ |
1947 | while ((skb = ppp_mp_reconstruct(ppp))) | 1947 | while ((skb = ppp_mp_reconstruct(ppp))) { |
1948 | ppp_receive_nonmp_frame(ppp, skb); | 1948 | if (pskb_may_pull(skb, 2)) |
1949 | ppp_receive_nonmp_frame(ppp, skb); | ||
1950 | else { | ||
1951 | ++ppp->dev->stats.rx_length_errors; | ||
1952 | kfree_skb(skb); | ||
1953 | ppp_receive_error(ppp); | ||
1954 | } | ||
1955 | } | ||
1949 | 1956 | ||
1950 | return; | 1957 | return; |
1951 | 1958 | ||
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c index 7cbf6f9b51de..2559991eea6a 100644 --- a/drivers/net/pppoe.c +++ b/drivers/net/pppoe.c | |||
@@ -111,9 +111,6 @@ struct pppoe_net { | |||
111 | rwlock_t hash_lock; | 111 | rwlock_t hash_lock; |
112 | }; | 112 | }; |
113 | 113 | ||
114 | /* to eliminate a race btw pppoe_flush_dev and pppoe_release */ | ||
115 | static DEFINE_SPINLOCK(flush_lock); | ||
116 | |||
117 | /* | 114 | /* |
118 | * PPPoE could be in the following stages: | 115 | * PPPoE could be in the following stages: |
119 | * 1) Discovery stage (to obtain remote MAC and Session ID) | 116 | * 1) Discovery stage (to obtain remote MAC and Session ID) |
@@ -303,45 +300,48 @@ static void pppoe_flush_dev(struct net_device *dev) | |||
303 | write_lock_bh(&pn->hash_lock); | 300 | write_lock_bh(&pn->hash_lock); |
304 | for (i = 0; i < PPPOE_HASH_SIZE; i++) { | 301 | for (i = 0; i < PPPOE_HASH_SIZE; i++) { |
305 | struct pppox_sock *po = pn->hash_table[i]; | 302 | struct pppox_sock *po = pn->hash_table[i]; |
303 | struct sock *sk; | ||
306 | 304 | ||
307 | while (po != NULL) { | 305 | while (po) { |
308 | struct sock *sk; | 306 | while (po && po->pppoe_dev != dev) { |
309 | if (po->pppoe_dev != dev) { | ||
310 | po = po->next; | 307 | po = po->next; |
311 | continue; | ||
312 | } | 308 | } |
309 | |||
310 | if (!po) | ||
311 | break; | ||
312 | |||
313 | sk = sk_pppox(po); | 313 | sk = sk_pppox(po); |
314 | spin_lock(&flush_lock); | ||
315 | po->pppoe_dev = NULL; | ||
316 | spin_unlock(&flush_lock); | ||
317 | dev_put(dev); | ||
318 | 314 | ||
319 | /* We always grab the socket lock, followed by the | 315 | /* We always grab the socket lock, followed by the |
320 | * hash_lock, in that order. Since we should | 316 | * hash_lock, in that order. Since we should hold the |
321 | * hold the sock lock while doing any unbinding, | 317 | * sock lock while doing any unbinding, we need to |
322 | * we need to release the lock we're holding. | 318 | * release the lock we're holding. Hold a reference to |
323 | * Hold a reference to the sock so it doesn't disappear | 319 | * the sock so it doesn't disappear as we're jumping |
324 | * as we're jumping between locks. | 320 | * between locks. |
325 | */ | 321 | */ |
326 | 322 | ||
327 | sock_hold(sk); | 323 | sock_hold(sk); |
328 | |||
329 | write_unlock_bh(&pn->hash_lock); | 324 | write_unlock_bh(&pn->hash_lock); |
330 | lock_sock(sk); | 325 | lock_sock(sk); |
331 | 326 | ||
332 | if (sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) { | 327 | if (po->pppoe_dev == dev |
328 | && sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) { | ||
333 | pppox_unbind_sock(sk); | 329 | pppox_unbind_sock(sk); |
334 | sk->sk_state = PPPOX_ZOMBIE; | 330 | sk->sk_state = PPPOX_ZOMBIE; |
335 | sk->sk_state_change(sk); | 331 | sk->sk_state_change(sk); |
332 | po->pppoe_dev = NULL; | ||
333 | dev_put(dev); | ||
336 | } | 334 | } |
337 | 335 | ||
338 | release_sock(sk); | 336 | release_sock(sk); |
339 | sock_put(sk); | 337 | sock_put(sk); |
340 | 338 | ||
341 | /* Restart scan at the beginning of this hash chain. | 339 | /* Restart the process from the start of the current |
342 | * While the lock was dropped the chain contents may | 340 | * hash chain. We dropped locks so the world may have |
343 | * have changed. | 341 | * change from underneath us. |
344 | */ | 342 | */ |
343 | |||
344 | BUG_ON(pppoe_pernet(dev_net(dev)) == NULL); | ||
345 | write_lock_bh(&pn->hash_lock); | 345 | write_lock_bh(&pn->hash_lock); |
346 | po = pn->hash_table[i]; | 346 | po = pn->hash_table[i]; |
347 | } | 347 | } |
@@ -388,11 +388,16 @@ static int pppoe_rcv_core(struct sock *sk, struct sk_buff *skb) | |||
388 | struct pppox_sock *po = pppox_sk(sk); | 388 | struct pppox_sock *po = pppox_sk(sk); |
389 | struct pppox_sock *relay_po; | 389 | struct pppox_sock *relay_po; |
390 | 390 | ||
391 | /* Backlog receive. Semantics of backlog rcv preclude any code from | ||
392 | * executing in lock_sock()/release_sock() bounds; meaning sk->sk_state | ||
393 | * can't change. | ||
394 | */ | ||
395 | |||
391 | if (sk->sk_state & PPPOX_BOUND) { | 396 | if (sk->sk_state & PPPOX_BOUND) { |
392 | ppp_input(&po->chan, skb); | 397 | ppp_input(&po->chan, skb); |
393 | } else if (sk->sk_state & PPPOX_RELAY) { | 398 | } else if (sk->sk_state & PPPOX_RELAY) { |
394 | relay_po = get_item_by_addr(dev_net(po->pppoe_dev), | 399 | relay_po = get_item_by_addr(sock_net(sk), |
395 | &po->pppoe_relay); | 400 | &po->pppoe_relay); |
396 | if (relay_po == NULL) | 401 | if (relay_po == NULL) |
397 | goto abort_kfree; | 402 | goto abort_kfree; |
398 | 403 | ||
@@ -447,6 +452,10 @@ static int pppoe_rcv(struct sk_buff *skb, struct net_device *dev, | |||
447 | goto drop; | 452 | goto drop; |
448 | 453 | ||
449 | pn = pppoe_pernet(dev_net(dev)); | 454 | pn = pppoe_pernet(dev_net(dev)); |
455 | |||
456 | /* Note that get_item does a sock_hold(), so sk_pppox(po) | ||
457 | * is known to be safe. | ||
458 | */ | ||
450 | po = get_item(pn, ph->sid, eth_hdr(skb)->h_source, dev->ifindex); | 459 | po = get_item(pn, ph->sid, eth_hdr(skb)->h_source, dev->ifindex); |
451 | if (!po) | 460 | if (!po) |
452 | goto drop; | 461 | goto drop; |
@@ -561,6 +570,7 @@ static int pppoe_release(struct socket *sock) | |||
561 | struct sock *sk = sock->sk; | 570 | struct sock *sk = sock->sk; |
562 | struct pppox_sock *po; | 571 | struct pppox_sock *po; |
563 | struct pppoe_net *pn; | 572 | struct pppoe_net *pn; |
573 | struct net *net = NULL; | ||
564 | 574 | ||
565 | if (!sk) | 575 | if (!sk) |
566 | return 0; | 576 | return 0; |
@@ -571,44 +581,28 @@ static int pppoe_release(struct socket *sock) | |||
571 | return -EBADF; | 581 | return -EBADF; |
572 | } | 582 | } |
573 | 583 | ||
584 | po = pppox_sk(sk); | ||
585 | |||
586 | if (sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) { | ||
587 | dev_put(po->pppoe_dev); | ||
588 | po->pppoe_dev = NULL; | ||
589 | } | ||
590 | |||
574 | pppox_unbind_sock(sk); | 591 | pppox_unbind_sock(sk); |
575 | 592 | ||
576 | /* Signal the death of the socket. */ | 593 | /* Signal the death of the socket. */ |
577 | sk->sk_state = PPPOX_DEAD; | 594 | sk->sk_state = PPPOX_DEAD; |
578 | 595 | ||
579 | /* | 596 | net = sock_net(sk); |
580 | * pppoe_flush_dev could lead to a race with | 597 | pn = pppoe_pernet(net); |
581 | * this routine so we use flush_lock to eliminate | ||
582 | * such a case (we only need per-net specific data) | ||
583 | */ | ||
584 | spin_lock(&flush_lock); | ||
585 | po = pppox_sk(sk); | ||
586 | if (!po->pppoe_dev) { | ||
587 | spin_unlock(&flush_lock); | ||
588 | goto out; | ||
589 | } | ||
590 | pn = pppoe_pernet(dev_net(po->pppoe_dev)); | ||
591 | spin_unlock(&flush_lock); | ||
592 | 598 | ||
593 | /* | 599 | /* |
594 | * protect "po" from concurrent updates | 600 | * protect "po" from concurrent updates |
595 | * on pppoe_flush_dev | 601 | * on pppoe_flush_dev |
596 | */ | 602 | */ |
597 | write_lock_bh(&pn->hash_lock); | 603 | delete_item(pn, po->pppoe_pa.sid, po->pppoe_pa.remote, |
604 | po->pppoe_ifindex); | ||
598 | 605 | ||
599 | po = pppox_sk(sk); | ||
600 | if (stage_session(po->pppoe_pa.sid)) | ||
601 | __delete_item(pn, po->pppoe_pa.sid, po->pppoe_pa.remote, | ||
602 | po->pppoe_ifindex); | ||
603 | |||
604 | if (po->pppoe_dev) { | ||
605 | dev_put(po->pppoe_dev); | ||
606 | po->pppoe_dev = NULL; | ||
607 | } | ||
608 | |||
609 | write_unlock_bh(&pn->hash_lock); | ||
610 | |||
611 | out: | ||
612 | sock_orphan(sk); | 606 | sock_orphan(sk); |
613 | sock->sk = NULL; | 607 | sock->sk = NULL; |
614 | 608 | ||
@@ -625,8 +619,9 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
625 | struct sock *sk = sock->sk; | 619 | struct sock *sk = sock->sk; |
626 | struct sockaddr_pppox *sp = (struct sockaddr_pppox *)uservaddr; | 620 | struct sockaddr_pppox *sp = (struct sockaddr_pppox *)uservaddr; |
627 | struct pppox_sock *po = pppox_sk(sk); | 621 | struct pppox_sock *po = pppox_sk(sk); |
628 | struct net_device *dev; | 622 | struct net_device *dev = NULL; |
629 | struct pppoe_net *pn; | 623 | struct pppoe_net *pn; |
624 | struct net *net = NULL; | ||
630 | int error; | 625 | int error; |
631 | 626 | ||
632 | lock_sock(sk); | 627 | lock_sock(sk); |
@@ -652,12 +647,14 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
652 | /* Delete the old binding */ | 647 | /* Delete the old binding */ |
653 | if (stage_session(po->pppoe_pa.sid)) { | 648 | if (stage_session(po->pppoe_pa.sid)) { |
654 | pppox_unbind_sock(sk); | 649 | pppox_unbind_sock(sk); |
650 | pn = pppoe_pernet(sock_net(sk)); | ||
651 | delete_item(pn, po->pppoe_pa.sid, | ||
652 | po->pppoe_pa.remote, po->pppoe_ifindex); | ||
655 | if (po->pppoe_dev) { | 653 | if (po->pppoe_dev) { |
656 | pn = pppoe_pernet(dev_net(po->pppoe_dev)); | ||
657 | delete_item(pn, po->pppoe_pa.sid, | ||
658 | po->pppoe_pa.remote, po->pppoe_ifindex); | ||
659 | dev_put(po->pppoe_dev); | 654 | dev_put(po->pppoe_dev); |
655 | po->pppoe_dev = NULL; | ||
660 | } | 656 | } |
657 | |||
661 | memset(sk_pppox(po) + 1, 0, | 658 | memset(sk_pppox(po) + 1, 0, |
662 | sizeof(struct pppox_sock) - sizeof(struct sock)); | 659 | sizeof(struct pppox_sock) - sizeof(struct sock)); |
663 | sk->sk_state = PPPOX_NONE; | 660 | sk->sk_state = PPPOX_NONE; |
@@ -666,16 +663,15 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
666 | /* Re-bind in session stage only */ | 663 | /* Re-bind in session stage only */ |
667 | if (stage_session(sp->sa_addr.pppoe.sid)) { | 664 | if (stage_session(sp->sa_addr.pppoe.sid)) { |
668 | error = -ENODEV; | 665 | error = -ENODEV; |
669 | dev = dev_get_by_name(sock_net(sk), sp->sa_addr.pppoe.dev); | 666 | net = sock_net(sk); |
667 | dev = dev_get_by_name(net, sp->sa_addr.pppoe.dev); | ||
670 | if (!dev) | 668 | if (!dev) |
671 | goto end; | 669 | goto err_put; |
672 | 670 | ||
673 | po->pppoe_dev = dev; | 671 | po->pppoe_dev = dev; |
674 | po->pppoe_ifindex = dev->ifindex; | 672 | po->pppoe_ifindex = dev->ifindex; |
675 | pn = pppoe_pernet(dev_net(dev)); | 673 | pn = pppoe_pernet(net); |
676 | write_lock_bh(&pn->hash_lock); | ||
677 | if (!(dev->flags & IFF_UP)) { | 674 | if (!(dev->flags & IFF_UP)) { |
678 | write_unlock_bh(&pn->hash_lock); | ||
679 | goto err_put; | 675 | goto err_put; |
680 | } | 676 | } |
681 | 677 | ||
@@ -683,6 +679,7 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
683 | &sp->sa_addr.pppoe, | 679 | &sp->sa_addr.pppoe, |
684 | sizeof(struct pppoe_addr)); | 680 | sizeof(struct pppoe_addr)); |
685 | 681 | ||
682 | write_lock_bh(&pn->hash_lock); | ||
686 | error = __set_item(pn, po); | 683 | error = __set_item(pn, po); |
687 | write_unlock_bh(&pn->hash_lock); | 684 | write_unlock_bh(&pn->hash_lock); |
688 | if (error < 0) | 685 | if (error < 0) |
@@ -696,8 +693,11 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr, | |||
696 | po->chan.ops = &pppoe_chan_ops; | 693 | po->chan.ops = &pppoe_chan_ops; |
697 | 694 | ||
698 | error = ppp_register_net_channel(dev_net(dev), &po->chan); | 695 | error = ppp_register_net_channel(dev_net(dev), &po->chan); |
699 | if (error) | 696 | if (error) { |
697 | delete_item(pn, po->pppoe_pa.sid, | ||
698 | po->pppoe_pa.remote, po->pppoe_ifindex); | ||
700 | goto err_put; | 699 | goto err_put; |
700 | } | ||
701 | 701 | ||
702 | sk->sk_state = PPPOX_CONNECTED; | 702 | sk->sk_state = PPPOX_CONNECTED; |
703 | } | 703 | } |
@@ -915,6 +915,14 @@ static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb) | |||
915 | struct pppoe_hdr *ph; | 915 | struct pppoe_hdr *ph; |
916 | int data_len = skb->len; | 916 | int data_len = skb->len; |
917 | 917 | ||
918 | /* The higher-level PPP code (ppp_unregister_channel()) ensures the PPP | ||
919 | * xmit operations conclude prior to an unregistration call. Thus | ||
920 | * sk->sk_state cannot change, so we don't need to do lock_sock(). | ||
921 | * But, we also can't do a lock_sock since that introduces a potential | ||
922 | * deadlock as we'd reverse the lock ordering used when calling | ||
923 | * ppp_unregister_channel(). | ||
924 | */ | ||
925 | |||
918 | if (sock_flag(sk, SOCK_DEAD) || !(sk->sk_state & PPPOX_CONNECTED)) | 926 | if (sock_flag(sk, SOCK_DEAD) || !(sk->sk_state & PPPOX_CONNECTED)) |
919 | goto abort; | 927 | goto abort; |
920 | 928 | ||
@@ -944,7 +952,6 @@ static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb) | |||
944 | po->pppoe_pa.remote, NULL, data_len); | 952 | po->pppoe_pa.remote, NULL, data_len); |
945 | 953 | ||
946 | dev_queue_xmit(skb); | 954 | dev_queue_xmit(skb); |
947 | |||
948 | return 1; | 955 | return 1; |
949 | 956 | ||
950 | abort: | 957 | abort: |
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h index e7285f01bd04..c2383adcd527 100644 --- a/drivers/net/qlge/qlge.h +++ b/drivers/net/qlge/qlge.h | |||
@@ -95,6 +95,7 @@ enum { | |||
95 | 95 | ||
96 | /* Misc. stuff */ | 96 | /* Misc. stuff */ |
97 | MAILBOX_COUNT = 16, | 97 | MAILBOX_COUNT = 16, |
98 | MAILBOX_TIMEOUT = 5, | ||
98 | 99 | ||
99 | PROC_ADDR_RDY = (1 << 31), | 100 | PROC_ADDR_RDY = (1 << 31), |
100 | PROC_ADDR_R = (1 << 30), | 101 | PROC_ADDR_R = (1 << 30), |
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c index 48b45df85ec9..a2fc70a0d0cc 100644 --- a/drivers/net/qlge/qlge_main.c +++ b/drivers/net/qlge/qlge_main.c | |||
@@ -3916,6 +3916,9 @@ static int __devinit ql_init_device(struct pci_dev *pdev, | |||
3916 | goto err_out; | 3916 | goto err_out; |
3917 | } | 3917 | } |
3918 | 3918 | ||
3919 | /* Set PCIe reset type for EEH to fundamental. */ | ||
3920 | pdev->needs_freset = 1; | ||
3921 | pci_save_state(pdev); | ||
3919 | qdev->reg_base = | 3922 | qdev->reg_base = |
3920 | ioremap_nocache(pci_resource_start(pdev, 1), | 3923 | ioremap_nocache(pci_resource_start(pdev, 1), |
3921 | pci_resource_len(pdev, 1)); | 3924 | pci_resource_len(pdev, 1)); |
@@ -4070,6 +4073,33 @@ static void __devexit qlge_remove(struct pci_dev *pdev) | |||
4070 | free_netdev(ndev); | 4073 | free_netdev(ndev); |
4071 | } | 4074 | } |
4072 | 4075 | ||
4076 | /* Clean up resources without touching hardware. */ | ||
4077 | static void ql_eeh_close(struct net_device *ndev) | ||
4078 | { | ||
4079 | int i; | ||
4080 | struct ql_adapter *qdev = netdev_priv(ndev); | ||
4081 | |||
4082 | if (netif_carrier_ok(ndev)) { | ||
4083 | netif_carrier_off(ndev); | ||
4084 | netif_stop_queue(ndev); | ||
4085 | } | ||
4086 | |||
4087 | if (test_bit(QL_ADAPTER_UP, &qdev->flags)) | ||
4088 | cancel_delayed_work_sync(&qdev->asic_reset_work); | ||
4089 | cancel_delayed_work_sync(&qdev->mpi_reset_work); | ||
4090 | cancel_delayed_work_sync(&qdev->mpi_work); | ||
4091 | cancel_delayed_work_sync(&qdev->mpi_idc_work); | ||
4092 | cancel_delayed_work_sync(&qdev->mpi_port_cfg_work); | ||
4093 | |||
4094 | for (i = 0; i < qdev->rss_ring_count; i++) | ||
4095 | netif_napi_del(&qdev->rx_ring[i].napi); | ||
4096 | |||
4097 | clear_bit(QL_ADAPTER_UP, &qdev->flags); | ||
4098 | ql_tx_ring_clean(qdev); | ||
4099 | ql_free_rx_buffers(qdev); | ||
4100 | ql_release_adapter_resources(qdev); | ||
4101 | } | ||
4102 | |||
4073 | /* | 4103 | /* |
4074 | * This callback is called by the PCI subsystem whenever | 4104 | * This callback is called by the PCI subsystem whenever |
4075 | * a PCI bus error is detected. | 4105 | * a PCI bus error is detected. |
@@ -4078,17 +4108,21 @@ static pci_ers_result_t qlge_io_error_detected(struct pci_dev *pdev, | |||
4078 | enum pci_channel_state state) | 4108 | enum pci_channel_state state) |
4079 | { | 4109 | { |
4080 | struct net_device *ndev = pci_get_drvdata(pdev); | 4110 | struct net_device *ndev = pci_get_drvdata(pdev); |
4081 | struct ql_adapter *qdev = netdev_priv(ndev); | ||
4082 | |||
4083 | netif_device_detach(ndev); | ||
4084 | 4111 | ||
4085 | if (state == pci_channel_io_perm_failure) | 4112 | switch (state) { |
4113 | case pci_channel_io_normal: | ||
4114 | return PCI_ERS_RESULT_CAN_RECOVER; | ||
4115 | case pci_channel_io_frozen: | ||
4116 | netif_device_detach(ndev); | ||
4117 | if (netif_running(ndev)) | ||
4118 | ql_eeh_close(ndev); | ||
4119 | pci_disable_device(pdev); | ||
4120 | return PCI_ERS_RESULT_NEED_RESET; | ||
4121 | case pci_channel_io_perm_failure: | ||
4122 | dev_err(&pdev->dev, | ||
4123 | "%s: pci_channel_io_perm_failure.\n", __func__); | ||
4086 | return PCI_ERS_RESULT_DISCONNECT; | 4124 | return PCI_ERS_RESULT_DISCONNECT; |
4087 | 4125 | } | |
4088 | if (netif_running(ndev)) | ||
4089 | ql_adapter_down(qdev); | ||
4090 | |||
4091 | pci_disable_device(pdev); | ||
4092 | 4126 | ||
4093 | /* Request a slot reset. */ | 4127 | /* Request a slot reset. */ |
4094 | return PCI_ERS_RESULT_NEED_RESET; | 4128 | return PCI_ERS_RESULT_NEED_RESET; |
@@ -4105,25 +4139,15 @@ static pci_ers_result_t qlge_io_slot_reset(struct pci_dev *pdev) | |||
4105 | struct net_device *ndev = pci_get_drvdata(pdev); | 4139 | struct net_device *ndev = pci_get_drvdata(pdev); |
4106 | struct ql_adapter *qdev = netdev_priv(ndev); | 4140 | struct ql_adapter *qdev = netdev_priv(ndev); |
4107 | 4141 | ||
4142 | pdev->error_state = pci_channel_io_normal; | ||
4143 | |||
4144 | pci_restore_state(pdev); | ||
4108 | if (pci_enable_device(pdev)) { | 4145 | if (pci_enable_device(pdev)) { |
4109 | QPRINTK(qdev, IFUP, ERR, | 4146 | QPRINTK(qdev, IFUP, ERR, |
4110 | "Cannot re-enable PCI device after reset.\n"); | 4147 | "Cannot re-enable PCI device after reset.\n"); |
4111 | return PCI_ERS_RESULT_DISCONNECT; | 4148 | return PCI_ERS_RESULT_DISCONNECT; |
4112 | } | 4149 | } |
4113 | |||
4114 | pci_set_master(pdev); | 4150 | pci_set_master(pdev); |
4115 | |||
4116 | netif_carrier_off(ndev); | ||
4117 | ql_adapter_reset(qdev); | ||
4118 | |||
4119 | /* Make sure the EEPROM is good */ | ||
4120 | memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len); | ||
4121 | |||
4122 | if (!is_valid_ether_addr(ndev->perm_addr)) { | ||
4123 | QPRINTK(qdev, IFUP, ERR, "After reset, invalid MAC address.\n"); | ||
4124 | return PCI_ERS_RESULT_DISCONNECT; | ||
4125 | } | ||
4126 | |||
4127 | return PCI_ERS_RESULT_RECOVERED; | 4151 | return PCI_ERS_RESULT_RECOVERED; |
4128 | } | 4152 | } |
4129 | 4153 | ||
@@ -4131,17 +4155,21 @@ static void qlge_io_resume(struct pci_dev *pdev) | |||
4131 | { | 4155 | { |
4132 | struct net_device *ndev = pci_get_drvdata(pdev); | 4156 | struct net_device *ndev = pci_get_drvdata(pdev); |
4133 | struct ql_adapter *qdev = netdev_priv(ndev); | 4157 | struct ql_adapter *qdev = netdev_priv(ndev); |
4158 | int err = 0; | ||
4134 | 4159 | ||
4135 | pci_set_master(pdev); | 4160 | if (ql_adapter_reset(qdev)) |
4136 | 4161 | QPRINTK(qdev, DRV, ERR, "reset FAILED!\n"); | |
4137 | if (netif_running(ndev)) { | 4162 | if (netif_running(ndev)) { |
4138 | if (ql_adapter_up(qdev)) { | 4163 | err = qlge_open(ndev); |
4164 | if (err) { | ||
4139 | QPRINTK(qdev, IFUP, ERR, | 4165 | QPRINTK(qdev, IFUP, ERR, |
4140 | "Device initialization failed after reset.\n"); | 4166 | "Device initialization failed after reset.\n"); |
4141 | return; | 4167 | return; |
4142 | } | 4168 | } |
4169 | } else { | ||
4170 | QPRINTK(qdev, IFUP, ERR, | ||
4171 | "Device was not running prior to EEH.\n"); | ||
4143 | } | 4172 | } |
4144 | |||
4145 | netif_device_attach(ndev); | 4173 | netif_device_attach(ndev); |
4146 | } | 4174 | } |
4147 | 4175 | ||
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c index 99e58e3f8e22..aec05f266107 100644 --- a/drivers/net/qlge/qlge_mpi.c +++ b/drivers/net/qlge/qlge_mpi.c | |||
@@ -470,7 +470,8 @@ end: | |||
470 | */ | 470 | */ |
471 | static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) | 471 | static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) |
472 | { | 472 | { |
473 | int status, count; | 473 | int status; |
474 | unsigned long count; | ||
474 | 475 | ||
475 | 476 | ||
476 | /* Begin polled mode for MPI */ | 477 | /* Begin polled mode for MPI */ |
@@ -491,14 +492,14 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) | |||
491 | /* Wait for the command to complete. We loop | 492 | /* Wait for the command to complete. We loop |
492 | * here because some AEN might arrive while | 493 | * here because some AEN might arrive while |
493 | * we're waiting for the mailbox command to | 494 | * we're waiting for the mailbox command to |
494 | * complete. If more than 5 arrive then we can | 495 | * complete. If more than 5 seconds expire we can |
495 | * assume something is wrong. */ | 496 | * assume something is wrong. */ |
496 | count = 5; | 497 | count = jiffies + HZ * MAILBOX_TIMEOUT; |
497 | do { | 498 | do { |
498 | /* Wait for the interrupt to come in. */ | 499 | /* Wait for the interrupt to come in. */ |
499 | status = ql_wait_mbx_cmd_cmplt(qdev); | 500 | status = ql_wait_mbx_cmd_cmplt(qdev); |
500 | if (status) | 501 | if (status) |
501 | goto end; | 502 | continue; |
502 | 503 | ||
503 | /* Process the event. If it's an AEN, it | 504 | /* Process the event. If it's an AEN, it |
504 | * will be handled in-line or a worker | 505 | * will be handled in-line or a worker |
@@ -517,15 +518,15 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) | |||
517 | MB_CMD_STS_GOOD) || | 518 | MB_CMD_STS_GOOD) || |
518 | ((mbcp->mbox_out[0] & 0x0000f000) == | 519 | ((mbcp->mbox_out[0] & 0x0000f000) == |
519 | MB_CMD_STS_INTRMDT)) | 520 | MB_CMD_STS_INTRMDT)) |
520 | break; | 521 | goto done; |
521 | } while (--count); | 522 | } while (time_before(jiffies, count)); |
522 | 523 | ||
523 | if (!count) { | 524 | QPRINTK(qdev, DRV, ERR, |
524 | QPRINTK(qdev, DRV, ERR, | 525 | "Timed out waiting for mailbox complete.\n"); |
525 | "Timed out waiting for mailbox complete.\n"); | 526 | status = -ETIMEDOUT; |
526 | status = -ETIMEDOUT; | 527 | goto end; |
527 | goto end; | 528 | |
528 | } | 529 | done: |
529 | 530 | ||
530 | /* Now we can clear the interrupt condition | 531 | /* Now we can clear the interrupt condition |
531 | * and look at our status. | 532 | * and look at our status. |
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c index 7dfcb58b0eb4..8b14c6eda7c3 100644 --- a/drivers/net/r6040.c +++ b/drivers/net/r6040.c | |||
@@ -1085,7 +1085,7 @@ static int __devinit r6040_init_one(struct pci_dev *pdev, | |||
1085 | int bar = 0; | 1085 | int bar = 0; |
1086 | u16 *adrp; | 1086 | u16 *adrp; |
1087 | 1087 | ||
1088 | printk(KERN_INFO "%s\n", version); | 1088 | printk("%s\n", version); |
1089 | 1089 | ||
1090 | err = pci_enable_device(pdev); | 1090 | err = pci_enable_device(pdev); |
1091 | if (err) | 1091 | if (err) |
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c index 83c47d95c3aa..b9221bdc7184 100644 --- a/drivers/net/r8169.c +++ b/drivers/net/r8169.c | |||
@@ -1029,7 +1029,10 @@ static void rtl8169_vlan_rx_register(struct net_device *dev, | |||
1029 | 1029 | ||
1030 | spin_lock_irqsave(&tp->lock, flags); | 1030 | spin_lock_irqsave(&tp->lock, flags); |
1031 | tp->vlgrp = grp; | 1031 | tp->vlgrp = grp; |
1032 | if (tp->vlgrp) | 1032 | /* |
1033 | * Do not disable RxVlan on 8110SCd. | ||
1034 | */ | ||
1035 | if (tp->vlgrp || (tp->mac_version == RTL_GIGA_MAC_VER_05)) | ||
1033 | tp->cp_cmd |= RxVlan; | 1036 | tp->cp_cmd |= RxVlan; |
1034 | else | 1037 | else |
1035 | tp->cp_cmd &= ~RxVlan; | 1038 | tp->cp_cmd &= ~RxVlan; |
@@ -3197,6 +3200,14 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
3197 | } | 3200 | } |
3198 | 3201 | ||
3199 | rtl8169_init_phy(dev, tp); | 3202 | rtl8169_init_phy(dev, tp); |
3203 | |||
3204 | /* | ||
3205 | * Pretend we are using VLANs; This bypasses a nasty bug where | ||
3206 | * Interrupts stop flowing on high load on 8110SCd controllers. | ||
3207 | */ | ||
3208 | if (tp->mac_version == RTL_GIGA_MAC_VER_05) | ||
3209 | RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | RxVlan); | ||
3210 | |||
3200 | device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL); | 3211 | device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL); |
3201 | 3212 | ||
3202 | out: | 3213 | out: |
@@ -3232,9 +3243,9 @@ static void __devexit rtl8169_remove_one(struct pci_dev *pdev) | |||
3232 | static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, | 3243 | static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, |
3233 | struct net_device *dev) | 3244 | struct net_device *dev) |
3234 | { | 3245 | { |
3235 | unsigned int mtu = dev->mtu; | 3246 | unsigned int max_frame = dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN; |
3236 | 3247 | ||
3237 | tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE; | 3248 | tp->rx_buf_sz = (max_frame > RX_BUF_SIZE) ? max_frame : RX_BUF_SIZE; |
3238 | } | 3249 | } |
3239 | 3250 | ||
3240 | static int rtl8169_open(struct net_device *dev) | 3251 | static int rtl8169_open(struct net_device *dev) |
@@ -3368,7 +3379,7 @@ static u16 rtl_rw_cpluscmd(void __iomem *ioaddr) | |||
3368 | static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz) | 3379 | static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz) |
3369 | { | 3380 | { |
3370 | /* Low hurts. Let's disable the filtering. */ | 3381 | /* Low hurts. Let's disable the filtering. */ |
3371 | RTL_W16(RxMaxSize, rx_buf_sz); | 3382 | RTL_W16(RxMaxSize, rx_buf_sz + 1); |
3372 | } | 3383 | } |
3373 | 3384 | ||
3374 | static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version) | 3385 | static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version) |
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c index ddccf5fa56b6..0dd7839322bc 100644 --- a/drivers/net/s2io.c +++ b/drivers/net/s2io.c | |||
@@ -3494,6 +3494,7 @@ static void s2io_reset(struct s2io_nic *sp) | |||
3494 | 3494 | ||
3495 | /* Restore the PCI state saved during initialization. */ | 3495 | /* Restore the PCI state saved during initialization. */ |
3496 | pci_restore_state(sp->pdev); | 3496 | pci_restore_state(sp->pdev); |
3497 | pci_save_state(sp->pdev); | ||
3497 | pci_read_config_word(sp->pdev, 0x2, &val16); | 3498 | pci_read_config_word(sp->pdev, 0x2, &val16); |
3498 | if (check_pci_device_id(val16) != (u16)PCI_ANY_ID) | 3499 | if (check_pci_device_id(val16) != (u16)PCI_ANY_ID) |
3499 | break; | 3500 | break; |
diff --git a/drivers/net/sfc/rx.c b/drivers/net/sfc/rx.c index 01f9432c31ef..98bff5ada09a 100644 --- a/drivers/net/sfc/rx.c +++ b/drivers/net/sfc/rx.c | |||
@@ -444,7 +444,8 @@ static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue, | |||
444 | * the appropriate LRO method | 444 | * the appropriate LRO method |
445 | */ | 445 | */ |
446 | static void efx_rx_packet_lro(struct efx_channel *channel, | 446 | static void efx_rx_packet_lro(struct efx_channel *channel, |
447 | struct efx_rx_buffer *rx_buf) | 447 | struct efx_rx_buffer *rx_buf, |
448 | bool checksummed) | ||
448 | { | 449 | { |
449 | struct napi_struct *napi = &channel->napi_str; | 450 | struct napi_struct *napi = &channel->napi_str; |
450 | 451 | ||
@@ -466,7 +467,8 @@ static void efx_rx_packet_lro(struct efx_channel *channel, | |||
466 | skb->len = rx_buf->len; | 467 | skb->len = rx_buf->len; |
467 | skb->data_len = rx_buf->len; | 468 | skb->data_len = rx_buf->len; |
468 | skb->truesize += rx_buf->len; | 469 | skb->truesize += rx_buf->len; |
469 | skb->ip_summed = CHECKSUM_UNNECESSARY; | 470 | skb->ip_summed = |
471 | checksummed ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE; | ||
470 | 472 | ||
471 | napi_gro_frags(napi); | 473 | napi_gro_frags(napi); |
472 | 474 | ||
@@ -475,6 +477,7 @@ out: | |||
475 | rx_buf->page = NULL; | 477 | rx_buf->page = NULL; |
476 | } else { | 478 | } else { |
477 | EFX_BUG_ON_PARANOID(!rx_buf->skb); | 479 | EFX_BUG_ON_PARANOID(!rx_buf->skb); |
480 | EFX_BUG_ON_PARANOID(!checksummed); | ||
478 | 481 | ||
479 | napi_gro_receive(napi, rx_buf->skb); | 482 | napi_gro_receive(napi, rx_buf->skb); |
480 | rx_buf->skb = NULL; | 483 | rx_buf->skb = NULL; |
@@ -570,7 +573,7 @@ void __efx_rx_packet(struct efx_channel *channel, | |||
570 | } | 573 | } |
571 | 574 | ||
572 | if (likely(checksummed || rx_buf->page)) { | 575 | if (likely(checksummed || rx_buf->page)) { |
573 | efx_rx_packet_lro(channel, rx_buf); | 576 | efx_rx_packet_lro(channel, rx_buf, checksummed); |
574 | goto done; | 577 | goto done; |
575 | } | 578 | } |
576 | 579 | ||
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c index cee00ad49b57..49eb91b5f50c 100644 --- a/drivers/net/sfc/sfe4001.c +++ b/drivers/net/sfc/sfe4001.c | |||
@@ -188,7 +188,7 @@ static int sfn4111t_reset(struct efx_nic *efx) | |||
188 | efx_oword_t reg; | 188 | efx_oword_t reg; |
189 | 189 | ||
190 | /* GPIO 3 and the GPIO register are shared with I2C, so block that */ | 190 | /* GPIO 3 and the GPIO register are shared with I2C, so block that */ |
191 | mutex_lock(&efx->i2c_adap.bus_lock); | 191 | i2c_lock_adapter(&efx->i2c_adap); |
192 | 192 | ||
193 | /* Pull RST_N (GPIO 2) low then let it up again, setting the | 193 | /* Pull RST_N (GPIO 2) low then let it up again, setting the |
194 | * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the | 194 | * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the |
@@ -204,7 +204,7 @@ static int sfn4111t_reset(struct efx_nic *efx) | |||
204 | falcon_write(efx, ®, GPIO_CTL_REG_KER); | 204 | falcon_write(efx, ®, GPIO_CTL_REG_KER); |
205 | msleep(1); | 205 | msleep(1); |
206 | 206 | ||
207 | mutex_unlock(&efx->i2c_adap.bus_lock); | 207 | i2c_unlock_adapter(&efx->i2c_adap); |
208 | 208 | ||
209 | ssleep(1); | 209 | ssleep(1); |
210 | return 0; | 210 | return 0; |
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index f49d0800c1d1..528b912a4b0d 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <linux/phy.h> | 30 | #include <linux/phy.h> |
31 | #include <linux/cache.h> | 31 | #include <linux/cache.h> |
32 | #include <linux/io.h> | 32 | #include <linux/io.h> |
33 | #include <asm/cacheflush.h> | ||
33 | 34 | ||
34 | #include "sh_eth.h" | 35 | #include "sh_eth.h" |
35 | 36 | ||
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c index 2ab5c39f33ca..6a10d7ba5877 100644 --- a/drivers/net/sky2.c +++ b/drivers/net/sky2.c | |||
@@ -4538,6 +4538,8 @@ static int __devinit sky2_probe(struct pci_dev *pdev, | |||
4538 | goto err_out_free_netdev; | 4538 | goto err_out_free_netdev; |
4539 | } | 4539 | } |
4540 | 4540 | ||
4541 | netif_carrier_off(dev); | ||
4542 | |||
4541 | netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT); | 4543 | netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT); |
4542 | 4544 | ||
4543 | err = request_irq(pdev->irq, sky2_intr, | 4545 | err = request_irq(pdev->irq, sky2_intr, |
diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c index ccdd196f5297..f9cdcbcb77d4 100644 --- a/drivers/net/smsc911x.c +++ b/drivers/net/smsc911x.c | |||
@@ -986,7 +986,7 @@ static int smsc911x_poll(struct napi_struct *napi, int budget) | |||
986 | struct net_device *dev = pdata->dev; | 986 | struct net_device *dev = pdata->dev; |
987 | int npackets = 0; | 987 | int npackets = 0; |
988 | 988 | ||
989 | while (likely(netif_running(dev)) && (npackets < budget)) { | 989 | while (npackets < budget) { |
990 | unsigned int pktlength; | 990 | unsigned int pktlength; |
991 | unsigned int pktwords; | 991 | unsigned int pktwords; |
992 | struct sk_buff *skb; | 992 | struct sk_buff *skb; |
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c index 7019a0d1a82b..61640b99b705 100644 --- a/drivers/net/sungem.c +++ b/drivers/net/sungem.c | |||
@@ -2063,7 +2063,15 @@ static int gem_check_invariants(struct gem *gp) | |||
2063 | mif_cfg &= ~MIF_CFG_PSELECT; | 2063 | mif_cfg &= ~MIF_CFG_PSELECT; |
2064 | writel(mif_cfg, gp->regs + MIF_CFG); | 2064 | writel(mif_cfg, gp->regs + MIF_CFG); |
2065 | } else { | 2065 | } else { |
2066 | gp->phy_type = phy_serialink; | 2066 | #ifdef CONFIG_SPARC |
2067 | const char *p; | ||
2068 | |||
2069 | p = of_get_property(gp->of_node, "shared-pins", NULL); | ||
2070 | if (p && !strcmp(p, "serdes")) | ||
2071 | gp->phy_type = phy_serdes; | ||
2072 | else | ||
2073 | #endif | ||
2074 | gp->phy_type = phy_serialink; | ||
2067 | } | 2075 | } |
2068 | if (gp->phy_type == phy_mii_mdio1 || | 2076 | if (gp->phy_type == phy_mii_mdio1 || |
2069 | gp->phy_type == phy_mii_mdio0) { | 2077 | gp->phy_type == phy_mii_mdio0) { |
diff --git a/drivers/net/tokenring/ibmtr.c b/drivers/net/tokenring/ibmtr.c index 36cb2423bcf1..75fa32e34fd0 100644 --- a/drivers/net/tokenring/ibmtr.c +++ b/drivers/net/tokenring/ibmtr.c | |||
@@ -1144,9 +1144,16 @@ static void dir_open_adapter (struct net_device *dev) | |||
1144 | } else { | 1144 | } else { |
1145 | char **prphase = printphase; | 1145 | char **prphase = printphase; |
1146 | char **prerror = printerror; | 1146 | char **prerror = printerror; |
1147 | int pnr = err / 16 - 1; | ||
1148 | int enr = err % 16 - 1; | ||
1147 | DPRINTK("TR Adapter misc open failure, error code = "); | 1149 | DPRINTK("TR Adapter misc open failure, error code = "); |
1148 | printk("0x%x, Phase: %s, Error: %s\n", | 1150 | if (pnr < 0 || pnr >= ARRAY_SIZE(printphase) || |
1149 | err, prphase[err/16 -1], prerror[err%16 -1]); | 1151 | enr < 0 || |
1152 | enr >= ARRAY_SIZE(printerror)) | ||
1153 | printk("0x%x, invalid Phase/Error.", err); | ||
1154 | else | ||
1155 | printk("0x%x, Phase: %s, Error: %s\n", err, | ||
1156 | prphase[pnr], prerror[enr]); | ||
1150 | printk(" retrying after %ds delay...\n", | 1157 | printk(" retrying after %ds delay...\n", |
1151 | TR_RETRY_INTERVAL/HZ); | 1158 | TR_RETRY_INTERVAL/HZ); |
1152 | } | 1159 | } |
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig index c47237c2d638..32d93564a74d 100644 --- a/drivers/net/usb/Kconfig +++ b/drivers/net/usb/Kconfig | |||
@@ -174,7 +174,7 @@ config USB_NET_CDCETHER | |||
174 | * Ericsson Mobile Broadband Module (all variants) | 174 | * Ericsson Mobile Broadband Module (all variants) |
175 | * Motorola (DM100 and SB4100) | 175 | * Motorola (DM100 and SB4100) |
176 | * Broadcom Cable Modem (reference design) | 176 | * Broadcom Cable Modem (reference design) |
177 | * Toshiba (PCX1100U and F3507g) | 177 | * Toshiba (PCX1100U and F3507g/F3607gw) |
178 | * ... | 178 | * ... |
179 | 179 | ||
180 | This driver creates an interface named "ethX", where X depends on | 180 | This driver creates an interface named "ethX", where X depends on |
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c index 4a6aff579403..21e1ba160008 100644 --- a/drivers/net/usb/cdc_ether.c +++ b/drivers/net/usb/cdc_ether.c | |||
@@ -544,20 +544,60 @@ static const struct usb_device_id products [] = { | |||
544 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | 544 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), |
545 | .driver_info = (unsigned long) &cdc_info, | 545 | .driver_info = (unsigned long) &cdc_info, |
546 | }, { | 546 | }, { |
547 | /* Ericsson F3307 */ | 547 | /* Ericsson F3607gw ver 2 */ |
548 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1905, USB_CLASS_COMM, | ||
549 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
550 | .driver_info = (unsigned long) &cdc_info, | ||
551 | }, { | ||
552 | /* Ericsson F3607gw ver 3 */ | ||
548 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM, | 553 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM, |
549 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | 554 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), |
550 | .driver_info = (unsigned long) &cdc_info, | 555 | .driver_info = (unsigned long) &cdc_info, |
551 | }, { | 556 | }, { |
557 | /* Ericsson F3307 */ | ||
558 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x190a, USB_CLASS_COMM, | ||
559 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
560 | .driver_info = (unsigned long) &cdc_info, | ||
561 | }, { | ||
562 | /* Ericsson F3307 ver 2 */ | ||
563 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1909, USB_CLASS_COMM, | ||
564 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
565 | .driver_info = (unsigned long) &cdc_info, | ||
566 | }, { | ||
567 | /* Ericsson C3607w */ | ||
568 | USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1049, USB_CLASS_COMM, | ||
569 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
570 | .driver_info = (unsigned long) &cdc_info, | ||
571 | }, { | ||
552 | /* Toshiba F3507g */ | 572 | /* Toshiba F3507g */ |
553 | USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, | 573 | USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, |
554 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | 574 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), |
555 | .driver_info = (unsigned long) &cdc_info, | 575 | .driver_info = (unsigned long) &cdc_info, |
556 | }, { | 576 | }, { |
577 | /* Toshiba F3607gw */ | ||
578 | USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130c, USB_CLASS_COMM, | ||
579 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
580 | .driver_info = (unsigned long) &cdc_info, | ||
581 | }, { | ||
582 | /* Toshiba F3607gw ver 2 */ | ||
583 | USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x1311, USB_CLASS_COMM, | ||
584 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
585 | .driver_info = (unsigned long) &cdc_info, | ||
586 | }, { | ||
557 | /* Dell F3507g */ | 587 | /* Dell F3507g */ |
558 | USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM, | 588 | USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM, |
559 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | 589 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), |
560 | .driver_info = (unsigned long) &cdc_info, | 590 | .driver_info = (unsigned long) &cdc_info, |
591 | }, { | ||
592 | /* Dell F3607gw */ | ||
593 | USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8183, USB_CLASS_COMM, | ||
594 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
595 | .driver_info = (unsigned long) &cdc_info, | ||
596 | }, { | ||
597 | /* Dell F3607gw ver 2 */ | ||
598 | USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8184, USB_CLASS_COMM, | ||
599 | USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), | ||
600 | .driver_info = (unsigned long) &cdc_info, | ||
561 | }, | 601 | }, |
562 | { }, // END | 602 | { }, // END |
563 | }; | 603 | }; |
diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c index 72470f77f556..a2b30a10064f 100644 --- a/drivers/net/usb/dm9601.c +++ b/drivers/net/usb/dm9601.c | |||
@@ -649,6 +649,10 @@ static const struct usb_device_id products[] = { | |||
649 | USB_DEVICE(0x0fe6, 0x8101), /* DM9601 USB to Fast Ethernet Adapter */ | 649 | USB_DEVICE(0x0fe6, 0x8101), /* DM9601 USB to Fast Ethernet Adapter */ |
650 | .driver_info = (unsigned long)&dm9601_info, | 650 | .driver_info = (unsigned long)&dm9601_info, |
651 | }, | 651 | }, |
652 | { | ||
653 | USB_DEVICE(0x0a46, 0x9000), /* DM9000E */ | ||
654 | .driver_info = (unsigned long)&dm9601_info, | ||
655 | }, | ||
652 | {}, // END | 656 | {}, // END |
653 | }; | 657 | }; |
654 | 658 | ||
diff --git a/drivers/net/usb/rndis_host.c b/drivers/net/usb/rndis_host.c index 0caa8008c51c..f56dec6119c3 100644 --- a/drivers/net/usb/rndis_host.c +++ b/drivers/net/usb/rndis_host.c | |||
@@ -362,12 +362,12 @@ generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags) | |||
362 | retval = -EINVAL; | 362 | retval = -EINVAL; |
363 | goto halt_fail_and_release; | 363 | goto halt_fail_and_release; |
364 | } | 364 | } |
365 | dev->hard_mtu = tmp; | ||
366 | net->mtu = dev->hard_mtu - net->hard_header_len; | ||
367 | dev_warn(&intf->dev, | 365 | dev_warn(&intf->dev, |
368 | "dev can't take %u byte packets (max %u), " | 366 | "dev can't take %u byte packets (max %u), " |
369 | "adjusting MTU to %u\n", | 367 | "adjusting MTU to %u\n", |
370 | dev->hard_mtu, tmp, net->mtu); | 368 | dev->hard_mtu, tmp, tmp - net->hard_header_len); |
369 | dev->hard_mtu = tmp; | ||
370 | net->mtu = dev->hard_mtu - net->hard_header_len; | ||
371 | } | 371 | } |
372 | 372 | ||
373 | /* REVISIT: peripheral "alignment" request is ignored ... */ | 373 | /* REVISIT: peripheral "alignment" request is ignored ... */ |
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c index 3709d6af9abf..b9e002fccbca 100644 --- a/drivers/net/virtio_net.c +++ b/drivers/net/virtio_net.c | |||
@@ -516,8 +516,7 @@ again: | |||
516 | /* Free up any pending old buffers before queueing new ones. */ | 516 | /* Free up any pending old buffers before queueing new ones. */ |
517 | free_old_xmit_skbs(vi); | 517 | free_old_xmit_skbs(vi); |
518 | 518 | ||
519 | /* Put new one in send queue and do transmit */ | 519 | /* Try to transmit */ |
520 | __skb_queue_head(&vi->send, skb); | ||
521 | capacity = xmit_skb(vi, skb); | 520 | capacity = xmit_skb(vi, skb); |
522 | 521 | ||
523 | /* This can happen with OOM and indirect buffers. */ | 522 | /* This can happen with OOM and indirect buffers. */ |
@@ -531,8 +530,17 @@ again: | |||
531 | } | 530 | } |
532 | return NETDEV_TX_BUSY; | 531 | return NETDEV_TX_BUSY; |
533 | } | 532 | } |
534 | |||
535 | vi->svq->vq_ops->kick(vi->svq); | 533 | vi->svq->vq_ops->kick(vi->svq); |
534 | |||
535 | /* | ||
536 | * Put new one in send queue. You'd expect we'd need this before | ||
537 | * xmit_skb calls add_buf(), since the callback can be triggered | ||
538 | * immediately after that. But since the callback just triggers | ||
539 | * another call back here, normal network xmit locking prevents the | ||
540 | * race. | ||
541 | */ | ||
542 | __skb_queue_head(&vi->send, skb); | ||
543 | |||
536 | /* Don't wait up for transmitted skbs to be freed. */ | 544 | /* Don't wait up for transmitted skbs to be freed. */ |
537 | skb_orphan(skb); | 545 | skb_orphan(skb); |
538 | nf_reset(skb); | 546 | nf_reset(skb); |
@@ -990,7 +998,7 @@ static unsigned int features[] = { | |||
990 | VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN, | 998 | VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN, |
991 | }; | 999 | }; |
992 | 1000 | ||
993 | static struct virtio_driver virtio_net = { | 1001 | static struct virtio_driver virtio_net_driver = { |
994 | .feature_table = features, | 1002 | .feature_table = features, |
995 | .feature_table_size = ARRAY_SIZE(features), | 1003 | .feature_table_size = ARRAY_SIZE(features), |
996 | .driver.name = KBUILD_MODNAME, | 1004 | .driver.name = KBUILD_MODNAME, |
@@ -1003,12 +1011,12 @@ static struct virtio_driver virtio_net = { | |||
1003 | 1011 | ||
1004 | static int __init init(void) | 1012 | static int __init init(void) |
1005 | { | 1013 | { |
1006 | return register_virtio_driver(&virtio_net); | 1014 | return register_virtio_driver(&virtio_net_driver); |
1007 | } | 1015 | } |
1008 | 1016 | ||
1009 | static void __exit fini(void) | 1017 | static void __exit fini(void) |
1010 | { | 1018 | { |
1011 | unregister_virtio_driver(&virtio_net); | 1019 | unregister_virtio_driver(&virtio_net_driver); |
1012 | } | 1020 | } |
1013 | module_init(init); | 1021 | module_init(init); |
1014 | module_exit(fini); | 1022 | module_exit(fini); |
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c index 7116a1aa20ce..abf896a7390e 100644 --- a/drivers/net/wireless/airo.c +++ b/drivers/net/wireless/airo.c | |||
@@ -4790,9 +4790,8 @@ static int proc_stats_rid_open( struct inode *inode, | |||
4790 | static int get_dec_u16( char *buffer, int *start, int limit ) { | 4790 | static int get_dec_u16( char *buffer, int *start, int limit ) { |
4791 | u16 value; | 4791 | u16 value; |
4792 | int valid = 0; | 4792 | int valid = 0; |
4793 | for( value = 0; buffer[*start] >= '0' && | 4793 | for (value = 0; *start < limit && buffer[*start] >= '0' && |
4794 | buffer[*start] <= '9' && | 4794 | buffer[*start] <= '9'; (*start)++) { |
4795 | *start < limit; (*start)++ ) { | ||
4796 | valid = 1; | 4795 | valid = 1; |
4797 | value *= 10; | 4796 | value *= 10; |
4798 | value += buffer[*start] - '0'; | 4797 | value += buffer[*start] - '0'; |
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c index 9c6ab5378f6e..95a8e232b58f 100644 --- a/drivers/net/wireless/ath/ath5k/base.c +++ b/drivers/net/wireless/ath/ath5k/base.c | |||
@@ -1125,7 +1125,6 @@ ath5k_mode_setup(struct ath5k_softc *sc) | |||
1125 | /* configure operational mode */ | 1125 | /* configure operational mode */ |
1126 | ath5k_hw_set_opmode(ah); | 1126 | ath5k_hw_set_opmode(ah); |
1127 | 1127 | ||
1128 | ath5k_hw_set_mcast_filter(ah, 0, 0); | ||
1129 | ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); | 1128 | ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); |
1130 | } | 1129 | } |
1131 | 1130 | ||
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c index b767c3b67b24..b548c8eaaae1 100644 --- a/drivers/net/wireless/ath/ath5k/led.c +++ b/drivers/net/wireless/ath/ath5k/led.c | |||
@@ -63,12 +63,16 @@ static const struct pci_device_id ath5k_led_devices[] = { | |||
63 | { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) }, | 63 | { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) }, |
64 | /* E-machines E510 (tuliom@gmail.com) */ | 64 | /* E-machines E510 (tuliom@gmail.com) */ |
65 | { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0428), ATH_LED(3, 0) }, | 65 | { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0428), ATH_LED(3, 0) }, |
66 | /* BenQ Joybook R55v (nowymarluk@wp.pl) */ | ||
67 | { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0100), ATH_LED(1, 0) }, | ||
66 | /* Acer Extensa 5620z (nekoreeve@gmail.com) */ | 68 | /* Acer Extensa 5620z (nekoreeve@gmail.com) */ |
67 | { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0105), ATH_LED(3, 0) }, | 69 | { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0105), ATH_LED(3, 0) }, |
68 | /* Fukato Datacask Jupiter 1014a (mrb74@gmx.at) */ | 70 | /* Fukato Datacask Jupiter 1014a (mrb74@gmx.at) */ |
69 | { ATH_SDEVICE(PCI_VENDOR_ID_AZWAVE, 0x1026), ATH_LED(3, 0) }, | 71 | { ATH_SDEVICE(PCI_VENDOR_ID_AZWAVE, 0x1026), ATH_LED(3, 0) }, |
70 | /* IBM ThinkPad AR5BXB6 (legovini@spiro.fisica.unipd.it) */ | 72 | /* IBM ThinkPad AR5BXB6 (legovini@spiro.fisica.unipd.it) */ |
71 | { ATH_SDEVICE(PCI_VENDOR_ID_IBM, 0x058a), ATH_LED(1, 0) }, | 73 | { ATH_SDEVICE(PCI_VENDOR_ID_IBM, 0x058a), ATH_LED(1, 0) }, |
74 | /* HP Compaq CQ60-206US (ddreggors@jumptv.com) */ | ||
75 | { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137a), ATH_LED(3, 1) }, | ||
72 | /* HP Compaq C700 (nitrousnrg@gmail.com) */ | 76 | /* HP Compaq C700 (nitrousnrg@gmail.com) */ |
73 | { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) }, | 77 | { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) }, |
74 | /* IBM-specific AR5212 (all others) */ | 78 | /* IBM-specific AR5212 (all others) */ |
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c index 16a271787b85..1895d63aad0a 100644 --- a/drivers/net/wireless/ath/ath9k/rc.c +++ b/drivers/net/wireless/ath/ath9k/rc.c | |||
@@ -679,7 +679,7 @@ static u8 ath_rc_get_highest_rix(struct ath_softc *sc, | |||
679 | return rate; | 679 | return rate; |
680 | 680 | ||
681 | if (rate_table->info[rate].valid_single_stream && | 681 | if (rate_table->info[rate].valid_single_stream && |
682 | !(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG)); | 682 | !(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG)) |
683 | return rate; | 683 | return rate; |
684 | 684 | ||
685 | /* This should not happen */ | 685 | /* This should not happen */ |
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c index 8701034569fa..de4e804bedf0 100644 --- a/drivers/net/wireless/b43/dma.c +++ b/drivers/net/wireless/b43/dma.c | |||
@@ -1157,8 +1157,9 @@ struct b43_dmaring *parse_cookie(struct b43_wldev *dev, u16 cookie, int *slot) | |||
1157 | } | 1157 | } |
1158 | 1158 | ||
1159 | static int dma_tx_fragment(struct b43_dmaring *ring, | 1159 | static int dma_tx_fragment(struct b43_dmaring *ring, |
1160 | struct sk_buff *skb) | 1160 | struct sk_buff **in_skb) |
1161 | { | 1161 | { |
1162 | struct sk_buff *skb = *in_skb; | ||
1162 | const struct b43_dma_ops *ops = ring->ops; | 1163 | const struct b43_dma_ops *ops = ring->ops; |
1163 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | 1164 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); |
1164 | u8 *header; | 1165 | u8 *header; |
@@ -1224,8 +1225,14 @@ static int dma_tx_fragment(struct b43_dmaring *ring, | |||
1224 | } | 1225 | } |
1225 | 1226 | ||
1226 | memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len); | 1227 | memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len); |
1228 | memcpy(bounce_skb->cb, skb->cb, sizeof(skb->cb)); | ||
1229 | bounce_skb->dev = skb->dev; | ||
1230 | skb_set_queue_mapping(bounce_skb, skb_get_queue_mapping(skb)); | ||
1231 | info = IEEE80211_SKB_CB(bounce_skb); | ||
1232 | |||
1227 | dev_kfree_skb_any(skb); | 1233 | dev_kfree_skb_any(skb); |
1228 | skb = bounce_skb; | 1234 | skb = bounce_skb; |
1235 | *in_skb = bounce_skb; | ||
1229 | meta->skb = skb; | 1236 | meta->skb = skb; |
1230 | meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); | 1237 | meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); |
1231 | if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { | 1238 | if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { |
@@ -1355,7 +1362,11 @@ int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb) | |||
1355 | * static, so we don't need to store it per frame. */ | 1362 | * static, so we don't need to store it per frame. */ |
1356 | ring->queue_prio = skb_get_queue_mapping(skb); | 1363 | ring->queue_prio = skb_get_queue_mapping(skb); |
1357 | 1364 | ||
1358 | err = dma_tx_fragment(ring, skb); | 1365 | /* dma_tx_fragment might reallocate the skb, so invalidate pointers pointing |
1366 | * into the skb data or cb now. */ | ||
1367 | hdr = NULL; | ||
1368 | info = NULL; | ||
1369 | err = dma_tx_fragment(ring, &skb); | ||
1359 | if (unlikely(err == -ENOKEY)) { | 1370 | if (unlikely(err == -ENOKEY)) { |
1360 | /* Drop this packet, as we don't have the encryption key | 1371 | /* Drop this packet, as we don't have the encryption key |
1361 | * anymore and must not transmit it unencrypted. */ | 1372 | * anymore and must not transmit it unencrypted. */ |
diff --git a/drivers/net/wireless/b43/leds.h b/drivers/net/wireless/b43/leds.h index 4c56187810fc..32b66d53cdac 100644 --- a/drivers/net/wireless/b43/leds.h +++ b/drivers/net/wireless/b43/leds.h | |||
@@ -1,6 +1,7 @@ | |||
1 | #ifndef B43_LEDS_H_ | 1 | #ifndef B43_LEDS_H_ |
2 | #define B43_LEDS_H_ | 2 | #define B43_LEDS_H_ |
3 | 3 | ||
4 | struct b43_wl; | ||
4 | struct b43_wldev; | 5 | struct b43_wldev; |
5 | 6 | ||
6 | #ifdef CONFIG_B43_LEDS | 7 | #ifdef CONFIG_B43_LEDS |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index df6b26a0c05e..098dda1a67c1 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -4501,7 +4501,6 @@ static void b43_op_stop(struct ieee80211_hw *hw) | |||
4501 | 4501 | ||
4502 | cancel_work_sync(&(wl->beacon_update_trigger)); | 4502 | cancel_work_sync(&(wl->beacon_update_trigger)); |
4503 | 4503 | ||
4504 | wiphy_rfkill_stop_polling(hw->wiphy); | ||
4505 | mutex_lock(&wl->mutex); | 4504 | mutex_lock(&wl->mutex); |
4506 | if (b43_status(dev) >= B43_STAT_STARTED) { | 4505 | if (b43_status(dev) >= B43_STAT_STARTED) { |
4507 | dev = b43_wireless_core_stop(dev); | 4506 | dev = b43_wireless_core_stop(dev); |
@@ -4522,9 +4521,8 @@ static int b43_op_beacon_set_tim(struct ieee80211_hw *hw, | |||
4522 | { | 4521 | { |
4523 | struct b43_wl *wl = hw_to_b43_wl(hw); | 4522 | struct b43_wl *wl = hw_to_b43_wl(hw); |
4524 | 4523 | ||
4525 | mutex_lock(&wl->mutex); | 4524 | /* FIXME: add locking */ |
4526 | b43_update_templates(wl); | 4525 | b43_update_templates(wl); |
4527 | mutex_unlock(&wl->mutex); | ||
4528 | 4526 | ||
4529 | return 0; | 4527 | return 0; |
4530 | } | 4528 | } |
diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c index 7a3218c5ba7d..ffdce6f3c909 100644 --- a/drivers/net/wireless/b43/rfkill.c +++ b/drivers/net/wireless/b43/rfkill.c | |||
@@ -33,7 +33,8 @@ bool b43_is_hw_radio_enabled(struct b43_wldev *dev) | |||
33 | & B43_MMIO_RADIO_HWENABLED_HI_MASK)) | 33 | & B43_MMIO_RADIO_HWENABLED_HI_MASK)) |
34 | return 1; | 34 | return 1; |
35 | } else { | 35 | } else { |
36 | if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) | 36 | if (b43_status(dev) >= B43_STAT_STARTED && |
37 | b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) | ||
37 | & B43_MMIO_RADIO_HWENABLED_LO_MASK) | 38 | & B43_MMIO_RADIO_HWENABLED_LO_MASK) |
38 | return 1; | 39 | return 1; |
39 | } | 40 | } |
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c index 240cff1e6979..6e2fc0cb6f8a 100644 --- a/drivers/net/wireless/ipw2x00/ipw2100.c +++ b/drivers/net/wireless/ipw2x00/ipw2100.c | |||
@@ -6029,7 +6029,7 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev, | |||
6029 | struct ipw2100_priv *priv; | 6029 | struct ipw2100_priv *priv; |
6030 | struct net_device *dev; | 6030 | struct net_device *dev; |
6031 | 6031 | ||
6032 | dev = alloc_ieee80211(sizeof(struct ipw2100_priv), 0); | 6032 | dev = alloc_ieee80211(sizeof(struct ipw2100_priv)); |
6033 | if (!dev) | 6033 | if (!dev) |
6034 | return NULL; | 6034 | return NULL; |
6035 | priv = libipw_priv(dev); | 6035 | priv = libipw_priv(dev); |
@@ -6342,7 +6342,7 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev, | |||
6342 | sysfs_remove_group(&pci_dev->dev.kobj, | 6342 | sysfs_remove_group(&pci_dev->dev.kobj, |
6343 | &ipw2100_attribute_group); | 6343 | &ipw2100_attribute_group); |
6344 | 6344 | ||
6345 | free_ieee80211(dev, 0); | 6345 | free_ieee80211(dev); |
6346 | pci_set_drvdata(pci_dev, NULL); | 6346 | pci_set_drvdata(pci_dev, NULL); |
6347 | } | 6347 | } |
6348 | 6348 | ||
@@ -6400,7 +6400,7 @@ static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev) | |||
6400 | if (dev->base_addr) | 6400 | if (dev->base_addr) |
6401 | iounmap((void __iomem *)dev->base_addr); | 6401 | iounmap((void __iomem *)dev->base_addr); |
6402 | 6402 | ||
6403 | free_ieee80211(dev, 0); | 6403 | free_ieee80211(dev); |
6404 | } | 6404 | } |
6405 | 6405 | ||
6406 | pci_release_regions(pci_dev); | 6406 | pci_release_regions(pci_dev); |
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c index 827824d45de9..a6ca536e44f8 100644 --- a/drivers/net/wireless/ipw2x00/ipw2200.c +++ b/drivers/net/wireless/ipw2x00/ipw2200.c | |||
@@ -104,25 +104,6 @@ static int antenna = CFG_SYS_ANTENNA_BOTH; | |||
104 | static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */ | 104 | static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */ |
105 | #endif | 105 | #endif |
106 | 106 | ||
107 | static struct ieee80211_rate ipw2200_rates[] = { | ||
108 | { .bitrate = 10 }, | ||
109 | { .bitrate = 20, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | ||
110 | { .bitrate = 55, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | ||
111 | { .bitrate = 110, .flags = IEEE80211_RATE_SHORT_PREAMBLE }, | ||
112 | { .bitrate = 60 }, | ||
113 | { .bitrate = 90 }, | ||
114 | { .bitrate = 120 }, | ||
115 | { .bitrate = 180 }, | ||
116 | { .bitrate = 240 }, | ||
117 | { .bitrate = 360 }, | ||
118 | { .bitrate = 480 }, | ||
119 | { .bitrate = 540 } | ||
120 | }; | ||
121 | |||
122 | #define ipw2200_a_rates (ipw2200_rates + 4) | ||
123 | #define ipw2200_num_a_rates 8 | ||
124 | #define ipw2200_bg_rates (ipw2200_rates + 0) | ||
125 | #define ipw2200_num_bg_rates 12 | ||
126 | 107 | ||
127 | #ifdef CONFIG_IPW2200_QOS | 108 | #ifdef CONFIG_IPW2200_QOS |
128 | static int qos_enable = 0; | 109 | static int qos_enable = 0; |
@@ -8674,6 +8655,24 @@ static int ipw_sw_reset(struct ipw_priv *priv, int option) | |||
8674 | * | 8655 | * |
8675 | */ | 8656 | */ |
8676 | 8657 | ||
8658 | static int ipw_wx_get_name(struct net_device *dev, | ||
8659 | struct iw_request_info *info, | ||
8660 | union iwreq_data *wrqu, char *extra) | ||
8661 | { | ||
8662 | struct ipw_priv *priv = libipw_priv(dev); | ||
8663 | mutex_lock(&priv->mutex); | ||
8664 | if (priv->status & STATUS_RF_KILL_MASK) | ||
8665 | strcpy(wrqu->name, "radio off"); | ||
8666 | else if (!(priv->status & STATUS_ASSOCIATED)) | ||
8667 | strcpy(wrqu->name, "unassociated"); | ||
8668 | else | ||
8669 | snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11%c", | ||
8670 | ipw_modes[priv->assoc_request.ieee_mode]); | ||
8671 | IPW_DEBUG_WX("Name: %s\n", wrqu->name); | ||
8672 | mutex_unlock(&priv->mutex); | ||
8673 | return 0; | ||
8674 | } | ||
8675 | |||
8677 | static int ipw_set_channel(struct ipw_priv *priv, u8 channel) | 8676 | static int ipw_set_channel(struct ipw_priv *priv, u8 channel) |
8678 | { | 8677 | { |
8679 | if (channel == 0) { | 8678 | if (channel == 0) { |
@@ -9973,7 +9972,7 @@ static int ipw_wx_sw_reset(struct net_device *dev, | |||
9973 | /* Rebase the WE IOCTLs to zero for the handler array */ | 9972 | /* Rebase the WE IOCTLs to zero for the handler array */ |
9974 | #define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT] | 9973 | #define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT] |
9975 | static iw_handler ipw_wx_handlers[] = { | 9974 | static iw_handler ipw_wx_handlers[] = { |
9976 | IW_IOCTL(SIOCGIWNAME) = (iw_handler) cfg80211_wext_giwname, | 9975 | IW_IOCTL(SIOCGIWNAME) = ipw_wx_get_name, |
9977 | IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq, | 9976 | IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq, |
9978 | IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq, | 9977 | IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq, |
9979 | IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode, | 9978 | IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode, |
@@ -11417,100 +11416,16 @@ static void ipw_bg_down(struct work_struct *work) | |||
11417 | /* Called by register_netdev() */ | 11416 | /* Called by register_netdev() */ |
11418 | static int ipw_net_init(struct net_device *dev) | 11417 | static int ipw_net_init(struct net_device *dev) |
11419 | { | 11418 | { |
11420 | int i, rc = 0; | ||
11421 | struct ipw_priv *priv = libipw_priv(dev); | 11419 | struct ipw_priv *priv = libipw_priv(dev); |
11422 | const struct libipw_geo *geo = libipw_get_geo(priv->ieee); | ||
11423 | struct wireless_dev *wdev = &priv->ieee->wdev; | ||
11424 | mutex_lock(&priv->mutex); | 11420 | mutex_lock(&priv->mutex); |
11425 | 11421 | ||
11426 | if (ipw_up(priv)) { | 11422 | if (ipw_up(priv)) { |
11427 | rc = -EIO; | 11423 | mutex_unlock(&priv->mutex); |
11428 | goto out; | 11424 | return -EIO; |
11429 | } | ||
11430 | |||
11431 | memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN); | ||
11432 | |||
11433 | /* fill-out priv->ieee->bg_band */ | ||
11434 | if (geo->bg_channels) { | ||
11435 | struct ieee80211_supported_band *bg_band = &priv->ieee->bg_band; | ||
11436 | |||
11437 | bg_band->band = IEEE80211_BAND_2GHZ; | ||
11438 | bg_band->n_channels = geo->bg_channels; | ||
11439 | bg_band->channels = | ||
11440 | kzalloc(geo->bg_channels * | ||
11441 | sizeof(struct ieee80211_channel), GFP_KERNEL); | ||
11442 | /* translate geo->bg to bg_band.channels */ | ||
11443 | for (i = 0; i < geo->bg_channels; i++) { | ||
11444 | bg_band->channels[i].band = IEEE80211_BAND_2GHZ; | ||
11445 | bg_band->channels[i].center_freq = geo->bg[i].freq; | ||
11446 | bg_band->channels[i].hw_value = geo->bg[i].channel; | ||
11447 | bg_band->channels[i].max_power = geo->bg[i].max_power; | ||
11448 | if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY) | ||
11449 | bg_band->channels[i].flags |= | ||
11450 | IEEE80211_CHAN_PASSIVE_SCAN; | ||
11451 | if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS) | ||
11452 | bg_band->channels[i].flags |= | ||
11453 | IEEE80211_CHAN_NO_IBSS; | ||
11454 | if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT) | ||
11455 | bg_band->channels[i].flags |= | ||
11456 | IEEE80211_CHAN_RADAR; | ||
11457 | /* No equivalent for LIBIPW_CH_80211H_RULES, | ||
11458 | LIBIPW_CH_UNIFORM_SPREADING, or | ||
11459 | LIBIPW_CH_B_ONLY... */ | ||
11460 | } | ||
11461 | /* point at bitrate info */ | ||
11462 | bg_band->bitrates = ipw2200_bg_rates; | ||
11463 | bg_band->n_bitrates = ipw2200_num_bg_rates; | ||
11464 | |||
11465 | wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = bg_band; | ||
11466 | } | ||
11467 | |||
11468 | /* fill-out priv->ieee->a_band */ | ||
11469 | if (geo->a_channels) { | ||
11470 | struct ieee80211_supported_band *a_band = &priv->ieee->a_band; | ||
11471 | |||
11472 | a_band->band = IEEE80211_BAND_5GHZ; | ||
11473 | a_band->n_channels = geo->a_channels; | ||
11474 | a_band->channels = | ||
11475 | kzalloc(geo->a_channels * | ||
11476 | sizeof(struct ieee80211_channel), GFP_KERNEL); | ||
11477 | /* translate geo->bg to a_band.channels */ | ||
11478 | for (i = 0; i < geo->a_channels; i++) { | ||
11479 | a_band->channels[i].band = IEEE80211_BAND_2GHZ; | ||
11480 | a_band->channels[i].center_freq = geo->a[i].freq; | ||
11481 | a_band->channels[i].hw_value = geo->a[i].channel; | ||
11482 | a_band->channels[i].max_power = geo->a[i].max_power; | ||
11483 | if (geo->a[i].flags & LIBIPW_CH_PASSIVE_ONLY) | ||
11484 | a_band->channels[i].flags |= | ||
11485 | IEEE80211_CHAN_PASSIVE_SCAN; | ||
11486 | if (geo->a[i].flags & LIBIPW_CH_NO_IBSS) | ||
11487 | a_band->channels[i].flags |= | ||
11488 | IEEE80211_CHAN_NO_IBSS; | ||
11489 | if (geo->a[i].flags & LIBIPW_CH_RADAR_DETECT) | ||
11490 | a_band->channels[i].flags |= | ||
11491 | IEEE80211_CHAN_RADAR; | ||
11492 | /* No equivalent for LIBIPW_CH_80211H_RULES, | ||
11493 | LIBIPW_CH_UNIFORM_SPREADING, or | ||
11494 | LIBIPW_CH_B_ONLY... */ | ||
11495 | } | ||
11496 | /* point at bitrate info */ | ||
11497 | a_band->bitrates = ipw2200_a_rates; | ||
11498 | a_band->n_bitrates = ipw2200_num_a_rates; | ||
11499 | |||
11500 | wdev->wiphy->bands[IEEE80211_BAND_5GHZ] = a_band; | ||
11501 | } | ||
11502 | |||
11503 | set_wiphy_dev(wdev->wiphy, &priv->pci_dev->dev); | ||
11504 | |||
11505 | /* With that information in place, we can now register the wiphy... */ | ||
11506 | if (wiphy_register(wdev->wiphy)) { | ||
11507 | rc = -EIO; | ||
11508 | goto out; | ||
11509 | } | 11425 | } |
11510 | 11426 | ||
11511 | out: | ||
11512 | mutex_unlock(&priv->mutex); | 11427 | mutex_unlock(&priv->mutex); |
11513 | return rc; | 11428 | return 0; |
11514 | } | 11429 | } |
11515 | 11430 | ||
11516 | /* PCI driver stuff */ | 11431 | /* PCI driver stuff */ |
@@ -11641,7 +11556,7 @@ static int ipw_prom_alloc(struct ipw_priv *priv) | |||
11641 | if (priv->prom_net_dev) | 11556 | if (priv->prom_net_dev) |
11642 | return -EPERM; | 11557 | return -EPERM; |
11643 | 11558 | ||
11644 | priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv), 1); | 11559 | priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv)); |
11645 | if (priv->prom_net_dev == NULL) | 11560 | if (priv->prom_net_dev == NULL) |
11646 | return -ENOMEM; | 11561 | return -ENOMEM; |
11647 | 11562 | ||
@@ -11660,7 +11575,7 @@ static int ipw_prom_alloc(struct ipw_priv *priv) | |||
11660 | 11575 | ||
11661 | rc = register_netdev(priv->prom_net_dev); | 11576 | rc = register_netdev(priv->prom_net_dev); |
11662 | if (rc) { | 11577 | if (rc) { |
11663 | free_ieee80211(priv->prom_net_dev, 1); | 11578 | free_ieee80211(priv->prom_net_dev); |
11664 | priv->prom_net_dev = NULL; | 11579 | priv->prom_net_dev = NULL; |
11665 | return rc; | 11580 | return rc; |
11666 | } | 11581 | } |
@@ -11674,7 +11589,7 @@ static void ipw_prom_free(struct ipw_priv *priv) | |||
11674 | return; | 11589 | return; |
11675 | 11590 | ||
11676 | unregister_netdev(priv->prom_net_dev); | 11591 | unregister_netdev(priv->prom_net_dev); |
11677 | free_ieee80211(priv->prom_net_dev, 1); | 11592 | free_ieee80211(priv->prom_net_dev); |
11678 | 11593 | ||
11679 | priv->prom_net_dev = NULL; | 11594 | priv->prom_net_dev = NULL; |
11680 | } | 11595 | } |
@@ -11702,7 +11617,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev, | |||
11702 | struct ipw_priv *priv; | 11617 | struct ipw_priv *priv; |
11703 | int i; | 11618 | int i; |
11704 | 11619 | ||
11705 | net_dev = alloc_ieee80211(sizeof(struct ipw_priv), 0); | 11620 | net_dev = alloc_ieee80211(sizeof(struct ipw_priv)); |
11706 | if (net_dev == NULL) { | 11621 | if (net_dev == NULL) { |
11707 | err = -ENOMEM; | 11622 | err = -ENOMEM; |
11708 | goto out; | 11623 | goto out; |
@@ -11850,7 +11765,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev, | |||
11850 | pci_disable_device(pdev); | 11765 | pci_disable_device(pdev); |
11851 | pci_set_drvdata(pdev, NULL); | 11766 | pci_set_drvdata(pdev, NULL); |
11852 | out_free_ieee80211: | 11767 | out_free_ieee80211: |
11853 | free_ieee80211(priv->net_dev, 0); | 11768 | free_ieee80211(priv->net_dev); |
11854 | out: | 11769 | out: |
11855 | return err; | 11770 | return err; |
11856 | } | 11771 | } |
@@ -11917,7 +11832,7 @@ static void __devexit ipw_pci_remove(struct pci_dev *pdev) | |||
11917 | pci_release_regions(pdev); | 11832 | pci_release_regions(pdev); |
11918 | pci_disable_device(pdev); | 11833 | pci_disable_device(pdev); |
11919 | pci_set_drvdata(pdev, NULL); | 11834 | pci_set_drvdata(pdev, NULL); |
11920 | free_ieee80211(priv->net_dev, 0); | 11835 | free_ieee80211(priv->net_dev); |
11921 | free_firmware(); | 11836 | free_firmware(); |
11922 | } | 11837 | } |
11923 | 11838 | ||
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h index bf45391172f3..1e334ff6bd52 100644 --- a/drivers/net/wireless/ipw2x00/libipw.h +++ b/drivers/net/wireless/ipw2x00/libipw.h | |||
@@ -31,7 +31,6 @@ | |||
31 | #include <linux/ieee80211.h> | 31 | #include <linux/ieee80211.h> |
32 | 32 | ||
33 | #include <net/lib80211.h> | 33 | #include <net/lib80211.h> |
34 | #include <net/cfg80211.h> | ||
35 | 34 | ||
36 | #define LIBIPW_VERSION "git-1.1.13" | 35 | #define LIBIPW_VERSION "git-1.1.13" |
37 | 36 | ||
@@ -784,15 +783,12 @@ struct libipw_geo { | |||
784 | 783 | ||
785 | struct libipw_device { | 784 | struct libipw_device { |
786 | struct net_device *dev; | 785 | struct net_device *dev; |
787 | struct wireless_dev wdev; | ||
788 | struct libipw_security sec; | 786 | struct libipw_security sec; |
789 | 787 | ||
790 | /* Bookkeeping structures */ | 788 | /* Bookkeeping structures */ |
791 | struct libipw_stats ieee_stats; | 789 | struct libipw_stats ieee_stats; |
792 | 790 | ||
793 | struct libipw_geo geo; | 791 | struct libipw_geo geo; |
794 | struct ieee80211_supported_band bg_band; | ||
795 | struct ieee80211_supported_band a_band; | ||
796 | 792 | ||
797 | /* Probe / Beacon management */ | 793 | /* Probe / Beacon management */ |
798 | struct list_head network_free_list; | 794 | struct list_head network_free_list; |
@@ -1018,8 +1014,8 @@ static inline int libipw_is_cck_rate(u8 rate) | |||
1018 | } | 1014 | } |
1019 | 1015 | ||
1020 | /* ieee80211.c */ | 1016 | /* ieee80211.c */ |
1021 | extern void free_ieee80211(struct net_device *dev, int monitor); | 1017 | extern void free_ieee80211(struct net_device *dev); |
1022 | extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor); | 1018 | extern struct net_device *alloc_ieee80211(int sizeof_priv); |
1023 | extern int libipw_change_mtu(struct net_device *dev, int new_mtu); | 1019 | extern int libipw_change_mtu(struct net_device *dev, int new_mtu); |
1024 | 1020 | ||
1025 | extern void libipw_networks_age(struct libipw_device *ieee, | 1021 | extern void libipw_networks_age(struct libipw_device *ieee, |
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c index a0e9f6aed7da..eb2b60834c17 100644 --- a/drivers/net/wireless/ipw2x00/libipw_module.c +++ b/drivers/net/wireless/ipw2x00/libipw_module.c | |||
@@ -62,9 +62,6 @@ MODULE_DESCRIPTION(DRV_DESCRIPTION); | |||
62 | MODULE_AUTHOR(DRV_COPYRIGHT); | 62 | MODULE_AUTHOR(DRV_COPYRIGHT); |
63 | MODULE_LICENSE("GPL"); | 63 | MODULE_LICENSE("GPL"); |
64 | 64 | ||
65 | struct cfg80211_ops libipw_config_ops = { }; | ||
66 | void *libipw_wiphy_privid = &libipw_wiphy_privid; | ||
67 | |||
68 | static int libipw_networks_allocate(struct libipw_device *ieee) | 65 | static int libipw_networks_allocate(struct libipw_device *ieee) |
69 | { | 66 | { |
70 | if (ieee->networks) | 67 | if (ieee->networks) |
@@ -143,7 +140,7 @@ int libipw_change_mtu(struct net_device *dev, int new_mtu) | |||
143 | } | 140 | } |
144 | EXPORT_SYMBOL(libipw_change_mtu); | 141 | EXPORT_SYMBOL(libipw_change_mtu); |
145 | 142 | ||
146 | struct net_device *alloc_ieee80211(int sizeof_priv, int monitor) | 143 | struct net_device *alloc_ieee80211(int sizeof_priv) |
147 | { | 144 | { |
148 | struct libipw_device *ieee; | 145 | struct libipw_device *ieee; |
149 | struct net_device *dev; | 146 | struct net_device *dev; |
@@ -160,31 +157,10 @@ struct net_device *alloc_ieee80211(int sizeof_priv, int monitor) | |||
160 | 157 | ||
161 | ieee->dev = dev; | 158 | ieee->dev = dev; |
162 | 159 | ||
163 | if (!monitor) { | ||
164 | ieee->wdev.wiphy = wiphy_new(&libipw_config_ops, 0); | ||
165 | if (!ieee->wdev.wiphy) { | ||
166 | LIBIPW_ERROR("Unable to allocate wiphy.\n"); | ||
167 | goto failed_free_netdev; | ||
168 | } | ||
169 | |||
170 | ieee->dev->ieee80211_ptr = &ieee->wdev; | ||
171 | ieee->wdev.iftype = NL80211_IFTYPE_STATION; | ||
172 | |||
173 | /* Fill-out wiphy structure bits we know... Not enough info | ||
174 | here to call set_wiphy_dev or set MAC address or channel info | ||
175 | -- have to do that in ->ndo_init... */ | ||
176 | ieee->wdev.wiphy->privid = libipw_wiphy_privid; | ||
177 | |||
178 | ieee->wdev.wiphy->max_scan_ssids = 1; | ||
179 | ieee->wdev.wiphy->max_scan_ie_len = 0; | ||
180 | ieee->wdev.wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) | ||
181 | | BIT(NL80211_IFTYPE_ADHOC); | ||
182 | } | ||
183 | |||
184 | err = libipw_networks_allocate(ieee); | 160 | err = libipw_networks_allocate(ieee); |
185 | if (err) { | 161 | if (err) { |
186 | LIBIPW_ERROR("Unable to allocate beacon storage: %d\n", err); | 162 | LIBIPW_ERROR("Unable to allocate beacon storage: %d\n", err); |
187 | goto failed_free_wiphy; | 163 | goto failed_free_netdev; |
188 | } | 164 | } |
189 | libipw_networks_initialize(ieee); | 165 | libipw_networks_initialize(ieee); |
190 | 166 | ||
@@ -217,31 +193,19 @@ struct net_device *alloc_ieee80211(int sizeof_priv, int monitor) | |||
217 | 193 | ||
218 | return dev; | 194 | return dev; |
219 | 195 | ||
220 | failed_free_wiphy: | ||
221 | if (!monitor) | ||
222 | wiphy_free(ieee->wdev.wiphy); | ||
223 | failed_free_netdev: | 196 | failed_free_netdev: |
224 | free_netdev(dev); | 197 | free_netdev(dev); |
225 | failed: | 198 | failed: |
226 | return NULL; | 199 | return NULL; |
227 | } | 200 | } |
228 | 201 | ||
229 | void free_ieee80211(struct net_device *dev, int monitor) | 202 | void free_ieee80211(struct net_device *dev) |
230 | { | 203 | { |
231 | struct libipw_device *ieee = netdev_priv(dev); | 204 | struct libipw_device *ieee = netdev_priv(dev); |
232 | 205 | ||
233 | lib80211_crypt_info_free(&ieee->crypt_info); | 206 | lib80211_crypt_info_free(&ieee->crypt_info); |
234 | 207 | ||
235 | libipw_networks_free(ieee); | 208 | libipw_networks_free(ieee); |
236 | |||
237 | /* free cfg80211 resources */ | ||
238 | if (!monitor) { | ||
239 | wiphy_unregister(ieee->wdev.wiphy); | ||
240 | kfree(ieee->a_band.channels); | ||
241 | kfree(ieee->bg_band.channels); | ||
242 | wiphy_free(ieee->wdev.wiphy); | ||
243 | } | ||
244 | |||
245 | free_netdev(dev); | 209 | free_netdev(dev); |
246 | } | 210 | } |
247 | 211 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c index 2716b91ba9fa..950267ab556a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-1000.c +++ b/drivers/net/wireless/iwlwifi/iwl-1000.c | |||
@@ -161,5 +161,6 @@ struct iwl_cfg iwl1000_bgn_cfg = { | |||
161 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, | 161 | .max_ll_items = OTP_MAX_LL_ITEMS_1000, |
162 | .shadow_ram_support = false, | 162 | .shadow_ram_support = false, |
163 | .ht_greenfield_support = true, | 163 | .ht_greenfield_support = true, |
164 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
164 | }; | 165 | }; |
165 | 166 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c index c295b8ee9228..1473452ba22f 100644 --- a/drivers/net/wireless/iwlwifi/iwl-6000.c +++ b/drivers/net/wireless/iwlwifi/iwl-6000.c | |||
@@ -175,6 +175,7 @@ struct iwl_cfg iwl6000h_2agn_cfg = { | |||
175 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | 175 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, |
176 | .shadow_ram_support = true, | 176 | .shadow_ram_support = true, |
177 | .ht_greenfield_support = true, | 177 | .ht_greenfield_support = true, |
178 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
178 | }; | 179 | }; |
179 | 180 | ||
180 | /* | 181 | /* |
@@ -198,6 +199,7 @@ struct iwl_cfg iwl6000i_2agn_cfg = { | |||
198 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | 199 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, |
199 | .shadow_ram_support = true, | 200 | .shadow_ram_support = true, |
200 | .ht_greenfield_support = true, | 201 | .ht_greenfield_support = true, |
202 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
201 | }; | 203 | }; |
202 | 204 | ||
203 | struct iwl_cfg iwl6050_2agn_cfg = { | 205 | struct iwl_cfg iwl6050_2agn_cfg = { |
@@ -218,6 +220,7 @@ struct iwl_cfg iwl6050_2agn_cfg = { | |||
218 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | 220 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, |
219 | .shadow_ram_support = true, | 221 | .shadow_ram_support = true, |
220 | .ht_greenfield_support = true, | 222 | .ht_greenfield_support = true, |
223 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
221 | }; | 224 | }; |
222 | 225 | ||
223 | struct iwl_cfg iwl6000_3agn_cfg = { | 226 | struct iwl_cfg iwl6000_3agn_cfg = { |
@@ -238,6 +241,7 @@ struct iwl_cfg iwl6000_3agn_cfg = { | |||
238 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | 241 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, |
239 | .shadow_ram_support = true, | 242 | .shadow_ram_support = true, |
240 | .ht_greenfield_support = true, | 243 | .ht_greenfield_support = true, |
244 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
241 | }; | 245 | }; |
242 | 246 | ||
243 | struct iwl_cfg iwl6050_3agn_cfg = { | 247 | struct iwl_cfg iwl6050_3agn_cfg = { |
@@ -258,6 +262,7 @@ struct iwl_cfg iwl6050_3agn_cfg = { | |||
258 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, | 262 | .max_ll_items = OTP_MAX_LL_ITEMS_6x00, |
259 | .shadow_ram_support = true, | 263 | .shadow_ram_support = true, |
260 | .ht_greenfield_support = true, | 264 | .ht_greenfield_support = true, |
265 | .use_rts_for_ht = true, /* use rts/cts protection */ | ||
261 | }; | 266 | }; |
262 | 267 | ||
263 | MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); | 268 | MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c index 346dc06fa7b7..81726ee32858 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c | |||
@@ -418,6 +418,15 @@ static void rs_tl_turn_on_agg(struct iwl_priv *priv, u8 tid, | |||
418 | else if (tid == IWL_AGG_ALL_TID) | 418 | else if (tid == IWL_AGG_ALL_TID) |
419 | for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++) | 419 | for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++) |
420 | rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta); | 420 | rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta); |
421 | if (priv->cfg->use_rts_for_ht) { | ||
422 | /* | ||
423 | * switch to RTS/CTS if it is the prefer protection method | ||
424 | * for HT traffic | ||
425 | */ | ||
426 | IWL_DEBUG_HT(priv, "use RTS/CTS protection for HT\n"); | ||
427 | priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN; | ||
428 | iwlcore_commit_rxon(priv); | ||
429 | } | ||
421 | } | 430 | } |
422 | 431 | ||
423 | static inline int get_num_of_ant_from_rate(u32 rate_n_flags) | 432 | static inline int get_num_of_ant_from_rate(u32 rate_n_flags) |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index eaafae091f5b..921dc4a26fe2 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -116,9 +116,6 @@ int iwl_commit_rxon(struct iwl_priv *priv) | |||
116 | 116 | ||
117 | /* always get timestamp with Rx frame */ | 117 | /* always get timestamp with Rx frame */ |
118 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; | 118 | priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; |
119 | /* allow CTS-to-self if possible. this is relevant only for | ||
120 | * 5000, but will not damage 4965 */ | ||
121 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | ||
122 | 119 | ||
123 | ret = iwl_check_rxon_cmd(priv); | 120 | ret = iwl_check_rxon_cmd(priv); |
124 | if (ret) { | 121 | if (ret) { |
@@ -218,6 +215,13 @@ int iwl_commit_rxon(struct iwl_priv *priv) | |||
218 | "Could not send WEP static key.\n"); | 215 | "Could not send WEP static key.\n"); |
219 | } | 216 | } |
220 | 217 | ||
218 | /* | ||
219 | * allow CTS-to-self if possible for new association. | ||
220 | * this is relevant only for 5000 series and up, | ||
221 | * but will not damage 4965 | ||
222 | */ | ||
223 | priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN; | ||
224 | |||
221 | /* Apply the new configuration | 225 | /* Apply the new configuration |
222 | * RXON assoc doesn't clear the station table in uCode, | 226 | * RXON assoc doesn't clear the station table in uCode, |
223 | */ | 227 | */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index e50103a956b1..7754538c2194 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -213,6 +213,7 @@ struct iwl_mod_params { | |||
213 | * @pa_type: used by 6000 series only to identify the type of Power Amplifier | 213 | * @pa_type: used by 6000 series only to identify the type of Power Amplifier |
214 | * @max_ll_items: max number of OTP blocks | 214 | * @max_ll_items: max number of OTP blocks |
215 | * @shadow_ram_support: shadow support for OTP memory | 215 | * @shadow_ram_support: shadow support for OTP memory |
216 | * @use_rts_for_ht: use rts/cts protection for HT traffic | ||
216 | * | 217 | * |
217 | * We enable the driver to be backward compatible wrt API version. The | 218 | * We enable the driver to be backward compatible wrt API version. The |
218 | * driver specifies which APIs it supports (with @ucode_api_max being the | 219 | * driver specifies which APIs it supports (with @ucode_api_max being the |
@@ -255,6 +256,7 @@ struct iwl_cfg { | |||
255 | const bool shadow_ram_support; | 256 | const bool shadow_ram_support; |
256 | const bool ht_greenfield_support; | 257 | const bool ht_greenfield_support; |
257 | const bool broken_powersave; | 258 | const bool broken_powersave; |
259 | bool use_rts_for_ht; | ||
258 | }; | 260 | }; |
259 | 261 | ||
260 | /*************************** | 262 | /*************************** |
diff --git a/drivers/net/wireless/libertas/ethtool.c b/drivers/net/wireless/libertas/ethtool.c index 039b555e4d76..53d56ab83c03 100644 --- a/drivers/net/wireless/libertas/ethtool.c +++ b/drivers/net/wireless/libertas/ethtool.c | |||
@@ -169,16 +169,19 @@ static int lbs_ethtool_set_wol(struct net_device *dev, | |||
169 | struct lbs_private *priv = dev->ml_priv; | 169 | struct lbs_private *priv = dev->ml_priv; |
170 | uint32_t criteria = 0; | 170 | uint32_t criteria = 0; |
171 | 171 | ||
172 | if (priv->wol_criteria == 0xffffffff && wol->wolopts) | ||
173 | return -EOPNOTSUPP; | ||
174 | |||
175 | if (wol->wolopts & ~(WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY)) | 172 | if (wol->wolopts & ~(WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY)) |
176 | return -EOPNOTSUPP; | 173 | return -EOPNOTSUPP; |
177 | 174 | ||
178 | if (wol->wolopts & WAKE_UCAST) criteria |= EHS_WAKE_ON_UNICAST_DATA; | 175 | if (wol->wolopts & WAKE_UCAST) |
179 | if (wol->wolopts & WAKE_MCAST) criteria |= EHS_WAKE_ON_MULTICAST_DATA; | 176 | criteria |= EHS_WAKE_ON_UNICAST_DATA; |
180 | if (wol->wolopts & WAKE_BCAST) criteria |= EHS_WAKE_ON_BROADCAST_DATA; | 177 | if (wol->wolopts & WAKE_MCAST) |
181 | if (wol->wolopts & WAKE_PHY) criteria |= EHS_WAKE_ON_MAC_EVENT; | 178 | criteria |= EHS_WAKE_ON_MULTICAST_DATA; |
179 | if (wol->wolopts & WAKE_BCAST) | ||
180 | criteria |= EHS_WAKE_ON_BROADCAST_DATA; | ||
181 | if (wol->wolopts & WAKE_PHY) | ||
182 | criteria |= EHS_WAKE_ON_MAC_EVENT; | ||
183 | if (wol->wolopts == 0) | ||
184 | criteria |= EHS_REMOVE_WAKEUP; | ||
182 | 185 | ||
183 | return lbs_host_sleep_cfg(priv, criteria, (struct wol_config *)NULL); | 186 | return lbs_host_sleep_cfg(priv, criteria, (struct wol_config *)NULL); |
184 | } | 187 | } |
diff --git a/drivers/net/wireless/libertas/if_spi.c b/drivers/net/wireless/libertas/if_spi.c index cb8be8d7abc1..5b3672c4d0cc 100644 --- a/drivers/net/wireless/libertas/if_spi.c +++ b/drivers/net/wireless/libertas/if_spi.c | |||
@@ -134,7 +134,7 @@ static void spu_transaction_finish(struct if_spi_card *card) | |||
134 | static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len) | 134 | static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len) |
135 | { | 135 | { |
136 | int err = 0; | 136 | int err = 0; |
137 | u16 reg_out = cpu_to_le16(reg | IF_SPI_WRITE_OPERATION_MASK); | 137 | __le16 reg_out = cpu_to_le16(reg | IF_SPI_WRITE_OPERATION_MASK); |
138 | struct spi_message m; | 138 | struct spi_message m; |
139 | struct spi_transfer reg_trans; | 139 | struct spi_transfer reg_trans; |
140 | struct spi_transfer data_trans; | 140 | struct spi_transfer data_trans; |
@@ -166,7 +166,7 @@ static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len) | |||
166 | 166 | ||
167 | static inline int spu_write_u16(struct if_spi_card *card, u16 reg, u16 val) | 167 | static inline int spu_write_u16(struct if_spi_card *card, u16 reg, u16 val) |
168 | { | 168 | { |
169 | u16 buff; | 169 | __le16 buff; |
170 | 170 | ||
171 | buff = cpu_to_le16(val); | 171 | buff = cpu_to_le16(val); |
172 | return spu_write(card, reg, (u8 *)&buff, sizeof(u16)); | 172 | return spu_write(card, reg, (u8 *)&buff, sizeof(u16)); |
@@ -188,7 +188,7 @@ static int spu_read(struct if_spi_card *card, u16 reg, u8 *buf, int len) | |||
188 | { | 188 | { |
189 | unsigned int delay; | 189 | unsigned int delay; |
190 | int err = 0; | 190 | int err = 0; |
191 | u16 reg_out = cpu_to_le16(reg | IF_SPI_READ_OPERATION_MASK); | 191 | __le16 reg_out = cpu_to_le16(reg | IF_SPI_READ_OPERATION_MASK); |
192 | struct spi_message m; | 192 | struct spi_message m; |
193 | struct spi_transfer reg_trans; | 193 | struct spi_transfer reg_trans; |
194 | struct spi_transfer dummy_trans; | 194 | struct spi_transfer dummy_trans; |
@@ -235,7 +235,7 @@ static int spu_read(struct if_spi_card *card, u16 reg, u8 *buf, int len) | |||
235 | /* Read 16 bits from an SPI register */ | 235 | /* Read 16 bits from an SPI register */ |
236 | static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val) | 236 | static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val) |
237 | { | 237 | { |
238 | u16 buf; | 238 | __le16 buf; |
239 | int ret; | 239 | int ret; |
240 | 240 | ||
241 | ret = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); | 241 | ret = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); |
@@ -248,7 +248,7 @@ static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val) | |||
248 | * The low 16 bits are read first. */ | 248 | * The low 16 bits are read first. */ |
249 | static int spu_read_u32(struct if_spi_card *card, u16 reg, u32 *val) | 249 | static int spu_read_u32(struct if_spi_card *card, u16 reg, u32 *val) |
250 | { | 250 | { |
251 | u32 buf; | 251 | __le32 buf; |
252 | int err; | 252 | int err; |
253 | 253 | ||
254 | err = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); | 254 | err = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); |
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c index 92bc8c5f1ca2..3fac4efa5ac8 100644 --- a/drivers/net/wireless/libertas/if_usb.c +++ b/drivers/net/wireless/libertas/if_usb.c | |||
@@ -508,7 +508,7 @@ static int __if_usb_submit_rx_urb(struct if_usb_card *cardp, | |||
508 | /* Fill the receive configuration URB and initialise the Rx call back */ | 508 | /* Fill the receive configuration URB and initialise the Rx call back */ |
509 | usb_fill_bulk_urb(cardp->rx_urb, cardp->udev, | 509 | usb_fill_bulk_urb(cardp->rx_urb, cardp->udev, |
510 | usb_rcvbulkpipe(cardp->udev, cardp->ep_in), | 510 | usb_rcvbulkpipe(cardp->udev, cardp->ep_in), |
511 | (void *) (skb->tail + (size_t) IPFIELD_ALIGN_OFFSET), | 511 | skb->data + IPFIELD_ALIGN_OFFSET, |
512 | MRVDRV_ETH_RX_PACKET_BUFFER_SIZE, callbackfn, | 512 | MRVDRV_ETH_RX_PACKET_BUFFER_SIZE, callbackfn, |
513 | cardp); | 513 | cardp); |
514 | 514 | ||
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c index 17e199546eeb..92af9b96bb7a 100644 --- a/drivers/net/wireless/p54/p54usb.c +++ b/drivers/net/wireless/p54/p54usb.c | |||
@@ -426,12 +426,16 @@ static const char p54u_romboot_3887[] = "~~~~"; | |||
426 | static int p54u_firmware_reset_3887(struct ieee80211_hw *dev) | 426 | static int p54u_firmware_reset_3887(struct ieee80211_hw *dev) |
427 | { | 427 | { |
428 | struct p54u_priv *priv = dev->priv; | 428 | struct p54u_priv *priv = dev->priv; |
429 | u8 buf[4]; | 429 | u8 *buf; |
430 | int ret; | 430 | int ret; |
431 | 431 | ||
432 | memcpy(&buf, p54u_romboot_3887, sizeof(buf)); | 432 | buf = kmalloc(4, GFP_KERNEL); |
433 | if (!buf) | ||
434 | return -ENOMEM; | ||
435 | memcpy(buf, p54u_romboot_3887, 4); | ||
433 | ret = p54u_bulk_msg(priv, P54U_PIPE_DATA, | 436 | ret = p54u_bulk_msg(priv, P54U_PIPE_DATA, |
434 | buf, sizeof(buf)); | 437 | buf, 4); |
438 | kfree(buf); | ||
435 | if (ret) | 439 | if (ret) |
436 | dev_err(&priv->udev->dev, "(p54usb) unable to jump to " | 440 | dev_err(&priv->udev->dev, "(p54usb) unable to jump to " |
437 | "boot ROM (%d)!\n", ret); | 441 | "boot ROM (%d)!\n", ret); |
diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c index 88cd58eb3b9f..1c88c2ea59aa 100644 --- a/drivers/net/wireless/ray_cs.c +++ b/drivers/net/wireless/ray_cs.c | |||
@@ -2879,7 +2879,7 @@ static int write_essid(struct file *file, const char __user *buffer, | |||
2879 | unsigned long count, void *data) | 2879 | unsigned long count, void *data) |
2880 | { | 2880 | { |
2881 | static char proc_essid[33]; | 2881 | static char proc_essid[33]; |
2882 | int len = count; | 2882 | unsigned int len = count; |
2883 | 2883 | ||
2884 | if (len > 32) | 2884 | if (len > 32) |
2885 | len = 32; | 2885 | len = 32; |
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c index a084077a1c61..9fe770f7d7bb 100644 --- a/drivers/net/wireless/rt2x00/rt2800usb.c +++ b/drivers/net/wireless/rt2x00/rt2800usb.c | |||
@@ -1994,7 +1994,7 @@ static void rt2800usb_write_tx_desc(struct rt2x00_dev *rt2x00dev, | |||
1994 | rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size); | 1994 | rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size); |
1995 | rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID, | 1995 | rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID, |
1996 | test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ? | 1996 | test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ? |
1997 | (skbdesc->entry->entry_idx + 1) : 0xff); | 1997 | txdesc->key_idx : 0xff); |
1998 | rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT, | 1998 | rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT, |
1999 | skb->len - txdesc->l2pad); | 1999 | skb->len - txdesc->l2pad); |
2000 | rt2x00_set_field32(&word, TXWI_W1_PACKETID, | 2000 | rt2x00_set_field32(&word, TXWI_W1_PACKETID, |
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index 71761b343839..73bbec58341e 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -815,6 +815,8 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | |||
815 | 815 | ||
816 | mutex_init(&rt2x00dev->csr_mutex); | 816 | mutex_init(&rt2x00dev->csr_mutex); |
817 | 817 | ||
818 | set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags); | ||
819 | |||
818 | /* | 820 | /* |
819 | * Make room for rt2x00_intf inside the per-interface | 821 | * Make room for rt2x00_intf inside the per-interface |
820 | * structure ieee80211_vif. | 822 | * structure ieee80211_vif. |
@@ -871,8 +873,6 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | |||
871 | rt2x00leds_register(rt2x00dev); | 873 | rt2x00leds_register(rt2x00dev); |
872 | rt2x00debug_register(rt2x00dev); | 874 | rt2x00debug_register(rt2x00dev); |
873 | 875 | ||
874 | set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags); | ||
875 | |||
876 | return 0; | 876 | return 0; |
877 | 877 | ||
878 | exit: | 878 | exit: |
diff --git a/drivers/net/wireless/rt2x00/rt2x00link.c b/drivers/net/wireless/rt2x00/rt2x00link.c index c64db0ba7f40..c708d0be9155 100644 --- a/drivers/net/wireless/rt2x00/rt2x00link.c +++ b/drivers/net/wireless/rt2x00/rt2x00link.c | |||
@@ -362,8 +362,9 @@ void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev) | |||
362 | 362 | ||
363 | rt2x00link_reset_tuner(rt2x00dev, false); | 363 | rt2x00link_reset_tuner(rt2x00dev, false); |
364 | 364 | ||
365 | ieee80211_queue_delayed_work(rt2x00dev->hw, | 365 | if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) |
366 | &link->work, LINK_TUNE_INTERVAL); | 366 | ieee80211_queue_delayed_work(rt2x00dev->hw, |
367 | &link->work, LINK_TUNE_INTERVAL); | ||
367 | } | 368 | } |
368 | 369 | ||
369 | void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev) | 370 | void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev) |
@@ -469,8 +470,10 @@ static void rt2x00link_tuner(struct work_struct *work) | |||
469 | * Increase tuner counter, and reschedule the next link tuner run. | 470 | * Increase tuner counter, and reschedule the next link tuner run. |
470 | */ | 471 | */ |
471 | link->count++; | 472 | link->count++; |
472 | ieee80211_queue_delayed_work(rt2x00dev->hw, | 473 | |
473 | &link->work, LINK_TUNE_INTERVAL); | 474 | if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) |
475 | ieee80211_queue_delayed_work(rt2x00dev->hw, | ||
476 | &link->work, LINK_TUNE_INTERVAL); | ||
474 | } | 477 | } |
475 | 478 | ||
476 | void rt2x00link_register(struct rt2x00_dev *rt2x00dev) | 479 | void rt2x00link_register(struct rt2x00_dev *rt2x00dev) |
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c index 501544882c2c..f02b48a90593 100644 --- a/drivers/net/wireless/rt2x00/rt2x00usb.c +++ b/drivers/net/wireless/rt2x00/rt2x00usb.c | |||
@@ -47,6 +47,8 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev, | |||
47 | (requesttype == USB_VENDOR_REQUEST_IN) ? | 47 | (requesttype == USB_VENDOR_REQUEST_IN) ? |
48 | usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0); | 48 | usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0); |
49 | 49 | ||
50 | if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) | ||
51 | return -ENODEV; | ||
50 | 52 | ||
51 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 53 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
52 | status = usb_control_msg(usb_dev, pipe, request, requesttype, | 54 | status = usb_control_msg(usb_dev, pipe, request, requesttype, |
@@ -60,8 +62,10 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev, | |||
60 | * -ENODEV: Device has disappeared, no point continuing. | 62 | * -ENODEV: Device has disappeared, no point continuing. |
61 | * All other errors: Try again. | 63 | * All other errors: Try again. |
62 | */ | 64 | */ |
63 | else if (status == -ENODEV) | 65 | else if (status == -ENODEV) { |
66 | clear_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags); | ||
64 | break; | 67 | break; |
68 | } | ||
65 | } | 69 | } |
66 | 70 | ||
67 | ERROR(rt2x00dev, | 71 | ERROR(rt2x00dev, |
@@ -161,6 +165,9 @@ int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev, | |||
161 | { | 165 | { |
162 | unsigned int i; | 166 | unsigned int i; |
163 | 167 | ||
168 | if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags)) | ||
169 | return -ENODEV; | ||
170 | |||
164 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { | 171 | for (i = 0; i < REGISTER_BUSY_COUNT; i++) { |
165 | rt2x00usb_register_read_lock(rt2x00dev, offset, reg); | 172 | rt2x00usb_register_read_lock(rt2x00dev, offset, reg); |
166 | if (!rt2x00_get_field32(*reg, field)) | 173 | if (!rt2x00_get_field32(*reg, field)) |
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c index b8f5ee33445e..14e7bb210075 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.c +++ b/drivers/net/wireless/rt2x00/rt73usb.c | |||
@@ -2389,10 +2389,13 @@ static struct usb_device_id rt73usb_device_table[] = { | |||
2389 | { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) }, | 2389 | { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) }, |
2390 | { USB_DEVICE(0x13b1, 0x0028), USB_DEVICE_DATA(&rt73usb_ops) }, | 2390 | { USB_DEVICE(0x13b1, 0x0028), USB_DEVICE_DATA(&rt73usb_ops) }, |
2391 | /* MSI */ | 2391 | /* MSI */ |
2392 | { USB_DEVICE(0x0db0, 0x4600), USB_DEVICE_DATA(&rt73usb_ops) }, | ||
2392 | { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) }, | 2393 | { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) }, |
2393 | { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) }, | 2394 | { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) }, |
2394 | { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) }, | 2395 | { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) }, |
2395 | { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) }, | 2396 | { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) }, |
2397 | /* Ovislink */ | ||
2398 | { USB_DEVICE(0x1b75, 0x7318), USB_DEVICE_DATA(&rt73usb_ops) }, | ||
2396 | /* Ralink */ | 2399 | /* Ralink */ |
2397 | { USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) }, | 2400 | { USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) }, |
2398 | { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) }, | 2401 | { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) }, |
@@ -2420,6 +2423,8 @@ static struct usb_device_id rt73usb_device_table[] = { | |||
2420 | /* Planex */ | 2423 | /* Planex */ |
2421 | { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) }, | 2424 | { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) }, |
2422 | { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) }, | 2425 | { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) }, |
2426 | /* WideTell */ | ||
2427 | { USB_DEVICE(0x7167, 0x3840), USB_DEVICE_DATA(&rt73usb_ops) }, | ||
2423 | /* Zcom */ | 2428 | /* Zcom */ |
2424 | { USB_DEVICE(0x0cde, 0x001c), USB_DEVICE_DATA(&rt73usb_ops) }, | 2429 | { USB_DEVICE(0x0cde, 0x001c), USB_DEVICE_DATA(&rt73usb_ops) }, |
2425 | /* ZyXEL */ | 2430 | /* ZyXEL */ |
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c index a1c670fc1552..cf8a4a40fdf6 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_leds.c +++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c | |||
@@ -210,10 +210,10 @@ void rtl8187_leds_exit(struct ieee80211_hw *dev) | |||
210 | 210 | ||
211 | /* turn the LED off before exiting */ | 211 | /* turn the LED off before exiting */ |
212 | ieee80211_queue_delayed_work(dev, &priv->led_off, 0); | 212 | ieee80211_queue_delayed_work(dev, &priv->led_off, 0); |
213 | cancel_delayed_work_sync(&priv->led_off); | ||
214 | cancel_delayed_work_sync(&priv->led_on); | ||
215 | rtl8187_unregister_led(&priv->led_rx); | 213 | rtl8187_unregister_led(&priv->led_rx); |
216 | rtl8187_unregister_led(&priv->led_tx); | 214 | rtl8187_unregister_led(&priv->led_tx); |
215 | cancel_delayed_work_sync(&priv->led_off); | ||
216 | cancel_delayed_work_sync(&priv->led_on); | ||
217 | } | 217 | } |
218 | #endif /* def CONFIG_RTL8187_LED */ | 218 | #endif /* def CONFIG_RTL8187_LED */ |
219 | 219 | ||
diff --git a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c index 9fab13e4004e..cad8037ab2af 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c +++ b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <net/mac80211.h> | 18 | #include <net/mac80211.h> |
19 | 19 | ||
20 | #include "rtl8187.h" | 20 | #include "rtl8187.h" |
21 | #include "rtl8187_rfkill.h" | ||
21 | 22 | ||
22 | static bool rtl8187_is_radio_enabled(struct rtl8187_priv *priv) | 23 | static bool rtl8187_is_radio_enabled(struct rtl8187_priv *priv) |
23 | { | 24 | { |
diff --git a/drivers/of/of_mdio.c b/drivers/of/of_mdio.c index bacaa536fd51..4b22ba568b19 100644 --- a/drivers/of/of_mdio.c +++ b/drivers/of/of_mdio.c | |||
@@ -97,6 +97,12 @@ int of_mdiobus_register(struct mii_bus *mdio, struct device_node *np) | |||
97 | } | 97 | } |
98 | EXPORT_SYMBOL(of_mdiobus_register); | 98 | EXPORT_SYMBOL(of_mdiobus_register); |
99 | 99 | ||
100 | /* Helper function for of_phy_find_device */ | ||
101 | static int of_phy_match(struct device *dev, void *phy_np) | ||
102 | { | ||
103 | return dev_archdata_get_node(&dev->archdata) == phy_np; | ||
104 | } | ||
105 | |||
100 | /** | 106 | /** |
101 | * of_phy_find_device - Give a PHY node, find the phy_device | 107 | * of_phy_find_device - Give a PHY node, find the phy_device |
102 | * @phy_np: Pointer to the phy's device tree node | 108 | * @phy_np: Pointer to the phy's device tree node |
@@ -106,15 +112,10 @@ EXPORT_SYMBOL(of_mdiobus_register); | |||
106 | struct phy_device *of_phy_find_device(struct device_node *phy_np) | 112 | struct phy_device *of_phy_find_device(struct device_node *phy_np) |
107 | { | 113 | { |
108 | struct device *d; | 114 | struct device *d; |
109 | int match(struct device *dev, void *phy_np) | ||
110 | { | ||
111 | return dev_archdata_get_node(&dev->archdata) == phy_np; | ||
112 | } | ||
113 | |||
114 | if (!phy_np) | 115 | if (!phy_np) |
115 | return NULL; | 116 | return NULL; |
116 | 117 | ||
117 | d = bus_find_device(&mdio_bus_type, NULL, phy_np, match); | 118 | d = bus_find_device(&mdio_bus_type, NULL, phy_np, of_phy_match); |
118 | return d ? to_phy_device(d) : NULL; | 119 | return d ? to_phy_device(d) : NULL; |
119 | } | 120 | } |
120 | EXPORT_SYMBOL(of_phy_find_device); | 121 | EXPORT_SYMBOL(of_phy_find_device); |
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c index 22b02c6df854..b952ebc7a78b 100644 --- a/drivers/pci/dmar.c +++ b/drivers/pci/dmar.c | |||
@@ -175,15 +175,6 @@ dmar_parse_one_drhd(struct acpi_dmar_header *header) | |||
175 | int ret = 0; | 175 | int ret = 0; |
176 | 176 | ||
177 | drhd = (struct acpi_dmar_hardware_unit *)header; | 177 | drhd = (struct acpi_dmar_hardware_unit *)header; |
178 | if (!drhd->address) { | ||
179 | /* Promote an attitude of violence to a BIOS engineer today */ | ||
180 | WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n" | ||
181 | "BIOS vendor: %s; Ver: %s; Product Version: %s\n", | ||
182 | dmi_get_system_info(DMI_BIOS_VENDOR), | ||
183 | dmi_get_system_info(DMI_BIOS_VERSION), | ||
184 | dmi_get_system_info(DMI_PRODUCT_VERSION)); | ||
185 | return -ENODEV; | ||
186 | } | ||
187 | dmaru = kzalloc(sizeof(*dmaru), GFP_KERNEL); | 178 | dmaru = kzalloc(sizeof(*dmaru), GFP_KERNEL); |
188 | if (!dmaru) | 179 | if (!dmaru) |
189 | return -ENOMEM; | 180 | return -ENOMEM; |
@@ -591,12 +582,53 @@ int __init dmar_table_init(void) | |||
591 | return 0; | 582 | return 0; |
592 | } | 583 | } |
593 | 584 | ||
585 | int __init check_zero_address(void) | ||
586 | { | ||
587 | struct acpi_table_dmar *dmar; | ||
588 | struct acpi_dmar_header *entry_header; | ||
589 | struct acpi_dmar_hardware_unit *drhd; | ||
590 | |||
591 | dmar = (struct acpi_table_dmar *)dmar_tbl; | ||
592 | entry_header = (struct acpi_dmar_header *)(dmar + 1); | ||
593 | |||
594 | while (((unsigned long)entry_header) < | ||
595 | (((unsigned long)dmar) + dmar_tbl->length)) { | ||
596 | /* Avoid looping forever on bad ACPI tables */ | ||
597 | if (entry_header->length == 0) { | ||
598 | printk(KERN_WARNING PREFIX | ||
599 | "Invalid 0-length structure\n"); | ||
600 | return 0; | ||
601 | } | ||
602 | |||
603 | if (entry_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT) { | ||
604 | drhd = (void *)entry_header; | ||
605 | if (!drhd->address) { | ||
606 | /* Promote an attitude of violence to a BIOS engineer today */ | ||
607 | WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n" | ||
608 | "BIOS vendor: %s; Ver: %s; Product Version: %s\n", | ||
609 | dmi_get_system_info(DMI_BIOS_VENDOR), | ||
610 | dmi_get_system_info(DMI_BIOS_VERSION), | ||
611 | dmi_get_system_info(DMI_PRODUCT_VERSION)); | ||
612 | #ifdef CONFIG_DMAR | ||
613 | dmar_disabled = 1; | ||
614 | #endif | ||
615 | return 0; | ||
616 | } | ||
617 | break; | ||
618 | } | ||
619 | |||
620 | entry_header = ((void *)entry_header + entry_header->length); | ||
621 | } | ||
622 | return 1; | ||
623 | } | ||
624 | |||
594 | void __init detect_intel_iommu(void) | 625 | void __init detect_intel_iommu(void) |
595 | { | 626 | { |
596 | int ret; | 627 | int ret; |
597 | 628 | ||
598 | ret = dmar_table_detect(); | 629 | ret = dmar_table_detect(); |
599 | 630 | if (ret) | |
631 | ret = check_zero_address(); | ||
600 | { | 632 | { |
601 | #ifdef CONFIG_INTR_REMAP | 633 | #ifdef CONFIG_INTR_REMAP |
602 | struct acpi_table_dmar *dmar; | 634 | struct acpi_table_dmar *dmar; |
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c index b1e97e682500..1840a0578a42 100644 --- a/drivers/pci/intel-iommu.c +++ b/drivers/pci/intel-iommu.c | |||
@@ -2767,7 +2767,15 @@ static void *intel_alloc_coherent(struct device *hwdev, size_t size, | |||
2767 | 2767 | ||
2768 | size = PAGE_ALIGN(size); | 2768 | size = PAGE_ALIGN(size); |
2769 | order = get_order(size); | 2769 | order = get_order(size); |
2770 | flags &= ~(GFP_DMA | GFP_DMA32); | 2770 | |
2771 | if (!iommu_no_mapping(hwdev)) | ||
2772 | flags &= ~(GFP_DMA | GFP_DMA32); | ||
2773 | else if (hwdev->coherent_dma_mask < dma_get_required_mask(hwdev)) { | ||
2774 | if (hwdev->coherent_dma_mask < DMA_BIT_MASK(32)) | ||
2775 | flags |= GFP_DMA; | ||
2776 | else | ||
2777 | flags |= GFP_DMA32; | ||
2778 | } | ||
2771 | 2779 | ||
2772 | vaddr = (void *)__get_free_pages(flags, order); | 2780 | vaddr = (void *)__get_free_pages(flags, order); |
2773 | if (!vaddr) | 2781 | if (!vaddr) |
@@ -3207,6 +3215,33 @@ static int __init init_iommu_sysfs(void) | |||
3207 | } | 3215 | } |
3208 | #endif /* CONFIG_PM */ | 3216 | #endif /* CONFIG_PM */ |
3209 | 3217 | ||
3218 | /* | ||
3219 | * Here we only respond to action of unbound device from driver. | ||
3220 | * | ||
3221 | * Added device is not attached to its DMAR domain here yet. That will happen | ||
3222 | * when mapping the device to iova. | ||
3223 | */ | ||
3224 | static int device_notifier(struct notifier_block *nb, | ||
3225 | unsigned long action, void *data) | ||
3226 | { | ||
3227 | struct device *dev = data; | ||
3228 | struct pci_dev *pdev = to_pci_dev(dev); | ||
3229 | struct dmar_domain *domain; | ||
3230 | |||
3231 | domain = find_domain(pdev); | ||
3232 | if (!domain) | ||
3233 | return 0; | ||
3234 | |||
3235 | if (action == BUS_NOTIFY_UNBOUND_DRIVER && !iommu_pass_through) | ||
3236 | domain_remove_one_dev_info(domain, pdev); | ||
3237 | |||
3238 | return 0; | ||
3239 | } | ||
3240 | |||
3241 | static struct notifier_block device_nb = { | ||
3242 | .notifier_call = device_notifier, | ||
3243 | }; | ||
3244 | |||
3210 | int __init intel_iommu_init(void) | 3245 | int __init intel_iommu_init(void) |
3211 | { | 3246 | { |
3212 | int ret = 0; | 3247 | int ret = 0; |
@@ -3259,6 +3294,8 @@ int __init intel_iommu_init(void) | |||
3259 | 3294 | ||
3260 | register_iommu(&intel_iommu_ops); | 3295 | register_iommu(&intel_iommu_ops); |
3261 | 3296 | ||
3297 | bus_register_notifier(&pci_bus_type, &device_nb); | ||
3298 | |||
3262 | return 0; | 3299 | return 0; |
3263 | } | 3300 | } |
3264 | 3301 | ||
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index 745402e8e498..5b7056cec00c 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c | |||
@@ -656,8 +656,10 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev) | |||
656 | free_link_state(link); | 656 | free_link_state(link); |
657 | 657 | ||
658 | /* Recheck latencies and configure upstream links */ | 658 | /* Recheck latencies and configure upstream links */ |
659 | pcie_update_aspm_capable(root); | 659 | if (parent_link) { |
660 | pcie_config_aspm_path(parent_link); | 660 | pcie_update_aspm_capable(root); |
661 | pcie_config_aspm_path(parent_link); | ||
662 | } | ||
661 | out: | 663 | out: |
662 | mutex_unlock(&aspm_lock); | 664 | mutex_unlock(&aspm_lock); |
663 | up_read(&pci_bus_sem); | 665 | up_read(&pci_bus_sem); |
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 0959430534b2..cb1a027eb552 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c | |||
@@ -299,17 +299,8 @@ static struct resource *find_free_bus_resource(struct pci_bus *bus, unsigned lon | |||
299 | r = bus->resource[i]; | 299 | r = bus->resource[i]; |
300 | if (r == &ioport_resource || r == &iomem_resource) | 300 | if (r == &ioport_resource || r == &iomem_resource) |
301 | continue; | 301 | continue; |
302 | if (r && (r->flags & type_mask) == type) { | 302 | if (r && (r->flags & type_mask) == type && !r->parent) |
303 | if (!r->parent) | 303 | return r; |
304 | return r; | ||
305 | /* | ||
306 | * if there is no child under that, we should release | ||
307 | * and use it. don't need to reset it, pbus_size_* will | ||
308 | * set it again | ||
309 | */ | ||
310 | if (!r->child && !release_resource(r)) | ||
311 | return r; | ||
312 | } | ||
313 | } | 304 | } |
314 | return NULL; | 305 | return NULL; |
315 | } | 306 | } |
diff --git a/drivers/pcmcia/cistpl.c b/drivers/pcmcia/cistpl.c index 4a110b7b2673..6c4a4fc83630 100644 --- a/drivers/pcmcia/cistpl.c +++ b/drivers/pcmcia/cistpl.c | |||
@@ -1463,7 +1463,9 @@ int pccard_read_tuple(struct pcmcia_socket *s, unsigned int function, cisdata_t | |||
1463 | return -ENOMEM; | 1463 | return -ENOMEM; |
1464 | } | 1464 | } |
1465 | tuple.DesiredTuple = code; | 1465 | tuple.DesiredTuple = code; |
1466 | tuple.Attributes = TUPLE_RETURN_COMMON; | 1466 | tuple.Attributes = 0; |
1467 | if (function == BIND_FN_ALL) | ||
1468 | tuple.Attributes = TUPLE_RETURN_COMMON; | ||
1467 | ret = pccard_get_first_tuple(s, function, &tuple); | 1469 | ret = pccard_get_first_tuple(s, function, &tuple); |
1468 | if (ret != 0) | 1470 | if (ret != 0) |
1469 | goto done; | 1471 | goto done; |
@@ -1490,7 +1492,7 @@ EXPORT_SYMBOL(pccard_read_tuple); | |||
1490 | 1492 | ||
1491 | ======================================================================*/ | 1493 | ======================================================================*/ |
1492 | 1494 | ||
1493 | int pccard_validate_cis(struct pcmcia_socket *s, unsigned int function, unsigned int *info) | 1495 | int pccard_validate_cis(struct pcmcia_socket *s, unsigned int *info) |
1494 | { | 1496 | { |
1495 | tuple_t *tuple; | 1497 | tuple_t *tuple; |
1496 | cisparse_t *p; | 1498 | cisparse_t *p; |
@@ -1515,30 +1517,30 @@ int pccard_validate_cis(struct pcmcia_socket *s, unsigned int function, unsigned | |||
1515 | count = reserved = 0; | 1517 | count = reserved = 0; |
1516 | tuple->DesiredTuple = RETURN_FIRST_TUPLE; | 1518 | tuple->DesiredTuple = RETURN_FIRST_TUPLE; |
1517 | tuple->Attributes = TUPLE_RETURN_COMMON; | 1519 | tuple->Attributes = TUPLE_RETURN_COMMON; |
1518 | ret = pccard_get_first_tuple(s, function, tuple); | 1520 | ret = pccard_get_first_tuple(s, BIND_FN_ALL, tuple); |
1519 | if (ret != 0) | 1521 | if (ret != 0) |
1520 | goto done; | 1522 | goto done; |
1521 | 1523 | ||
1522 | /* First tuple should be DEVICE; we should really have either that | 1524 | /* First tuple should be DEVICE; we should really have either that |
1523 | or a CFTABLE_ENTRY of some sort */ | 1525 | or a CFTABLE_ENTRY of some sort */ |
1524 | if ((tuple->TupleCode == CISTPL_DEVICE) || | 1526 | if ((tuple->TupleCode == CISTPL_DEVICE) || |
1525 | (pccard_read_tuple(s, function, CISTPL_CFTABLE_ENTRY, p) == 0) || | 1527 | (pccard_read_tuple(s, BIND_FN_ALL, CISTPL_CFTABLE_ENTRY, p) == 0) || |
1526 | (pccard_read_tuple(s, function, CISTPL_CFTABLE_ENTRY_CB, p) == 0)) | 1528 | (pccard_read_tuple(s, BIND_FN_ALL, CISTPL_CFTABLE_ENTRY_CB, p) == 0)) |
1527 | dev_ok++; | 1529 | dev_ok++; |
1528 | 1530 | ||
1529 | /* All cards should have a MANFID tuple, and/or a VERS_1 or VERS_2 | 1531 | /* All cards should have a MANFID tuple, and/or a VERS_1 or VERS_2 |
1530 | tuple, for card identification. Certain old D-Link and Linksys | 1532 | tuple, for card identification. Certain old D-Link and Linksys |
1531 | cards have only a broken VERS_2 tuple; hence the bogus test. */ | 1533 | cards have only a broken VERS_2 tuple; hence the bogus test. */ |
1532 | if ((pccard_read_tuple(s, function, CISTPL_MANFID, p) == 0) || | 1534 | if ((pccard_read_tuple(s, BIND_FN_ALL, CISTPL_MANFID, p) == 0) || |
1533 | (pccard_read_tuple(s, function, CISTPL_VERS_1, p) == 0) || | 1535 | (pccard_read_tuple(s, BIND_FN_ALL, CISTPL_VERS_1, p) == 0) || |
1534 | (pccard_read_tuple(s, function, CISTPL_VERS_2, p) != -ENOSPC)) | 1536 | (pccard_read_tuple(s, BIND_FN_ALL, CISTPL_VERS_2, p) != -ENOSPC)) |
1535 | ident_ok++; | 1537 | ident_ok++; |
1536 | 1538 | ||
1537 | if (!dev_ok && !ident_ok) | 1539 | if (!dev_ok && !ident_ok) |
1538 | goto done; | 1540 | goto done; |
1539 | 1541 | ||
1540 | for (count = 1; count < MAX_TUPLES; count++) { | 1542 | for (count = 1; count < MAX_TUPLES; count++) { |
1541 | ret = pccard_get_next_tuple(s, function, tuple); | 1543 | ret = pccard_get_next_tuple(s, BIND_FN_ALL, tuple); |
1542 | if (ret != 0) | 1544 | if (ret != 0) |
1543 | break; | 1545 | break; |
1544 | if (((tuple->TupleCode > 0x23) && (tuple->TupleCode < 0x40)) || | 1546 | if (((tuple->TupleCode > 0x23) && (tuple->TupleCode < 0x40)) || |
diff --git a/drivers/pcmcia/cs.c b/drivers/pcmcia/cs.c index 934d4bee39a0..698d75cda084 100644 --- a/drivers/pcmcia/cs.c +++ b/drivers/pcmcia/cs.c | |||
@@ -98,10 +98,13 @@ EXPORT_SYMBOL(pcmcia_socket_list_rwsem); | |||
98 | * These functions check for the appropriate struct pcmcia_soket arrays, | 98 | * These functions check for the appropriate struct pcmcia_soket arrays, |
99 | * and pass them to the low-level functions pcmcia_{suspend,resume}_socket | 99 | * and pass them to the low-level functions pcmcia_{suspend,resume}_socket |
100 | */ | 100 | */ |
101 | static int socket_early_resume(struct pcmcia_socket *skt); | ||
102 | static int socket_late_resume(struct pcmcia_socket *skt); | ||
101 | static int socket_resume(struct pcmcia_socket *skt); | 103 | static int socket_resume(struct pcmcia_socket *skt); |
102 | static int socket_suspend(struct pcmcia_socket *skt); | 104 | static int socket_suspend(struct pcmcia_socket *skt); |
103 | 105 | ||
104 | int pcmcia_socket_dev_suspend(struct device *dev) | 106 | static void pcmcia_socket_dev_run(struct device *dev, |
107 | int (*cb)(struct pcmcia_socket *)) | ||
105 | { | 108 | { |
106 | struct pcmcia_socket *socket; | 109 | struct pcmcia_socket *socket; |
107 | 110 | ||
@@ -110,29 +113,34 @@ int pcmcia_socket_dev_suspend(struct device *dev) | |||
110 | if (socket->dev.parent != dev) | 113 | if (socket->dev.parent != dev) |
111 | continue; | 114 | continue; |
112 | mutex_lock(&socket->skt_mutex); | 115 | mutex_lock(&socket->skt_mutex); |
113 | socket_suspend(socket); | 116 | cb(socket); |
114 | mutex_unlock(&socket->skt_mutex); | 117 | mutex_unlock(&socket->skt_mutex); |
115 | } | 118 | } |
116 | up_read(&pcmcia_socket_list_rwsem); | 119 | up_read(&pcmcia_socket_list_rwsem); |
120 | } | ||
117 | 121 | ||
122 | int pcmcia_socket_dev_suspend(struct device *dev) | ||
123 | { | ||
124 | pcmcia_socket_dev_run(dev, socket_suspend); | ||
118 | return 0; | 125 | return 0; |
119 | } | 126 | } |
120 | EXPORT_SYMBOL(pcmcia_socket_dev_suspend); | 127 | EXPORT_SYMBOL(pcmcia_socket_dev_suspend); |
121 | 128 | ||
122 | int pcmcia_socket_dev_resume(struct device *dev) | 129 | void pcmcia_socket_dev_early_resume(struct device *dev) |
123 | { | 130 | { |
124 | struct pcmcia_socket *socket; | 131 | pcmcia_socket_dev_run(dev, socket_early_resume); |
132 | } | ||
133 | EXPORT_SYMBOL(pcmcia_socket_dev_early_resume); | ||
125 | 134 | ||
126 | down_read(&pcmcia_socket_list_rwsem); | 135 | void pcmcia_socket_dev_late_resume(struct device *dev) |
127 | list_for_each_entry(socket, &pcmcia_socket_list, socket_list) { | 136 | { |
128 | if (socket->dev.parent != dev) | 137 | pcmcia_socket_dev_run(dev, socket_late_resume); |
129 | continue; | 138 | } |
130 | mutex_lock(&socket->skt_mutex); | 139 | EXPORT_SYMBOL(pcmcia_socket_dev_late_resume); |
131 | socket_resume(socket); | ||
132 | mutex_unlock(&socket->skt_mutex); | ||
133 | } | ||
134 | up_read(&pcmcia_socket_list_rwsem); | ||
135 | 140 | ||
141 | int pcmcia_socket_dev_resume(struct device *dev) | ||
142 | { | ||
143 | pcmcia_socket_dev_run(dev, socket_resume); | ||
136 | return 0; | 144 | return 0; |
137 | } | 145 | } |
138 | EXPORT_SYMBOL(pcmcia_socket_dev_resume); | 146 | EXPORT_SYMBOL(pcmcia_socket_dev_resume); |
@@ -546,29 +554,24 @@ static int socket_suspend(struct pcmcia_socket *skt) | |||
546 | return 0; | 554 | return 0; |
547 | } | 555 | } |
548 | 556 | ||
549 | /* | 557 | static int socket_early_resume(struct pcmcia_socket *skt) |
550 | * Resume a socket. If a card is present, verify its CIS against | ||
551 | * our cached copy. If they are different, the card has been | ||
552 | * replaced, and we need to tell the drivers. | ||
553 | */ | ||
554 | static int socket_resume(struct pcmcia_socket *skt) | ||
555 | { | 558 | { |
556 | int ret; | ||
557 | |||
558 | if (!(skt->state & SOCKET_SUSPEND)) | ||
559 | return -EBUSY; | ||
560 | |||
561 | skt->socket = dead_socket; | 559 | skt->socket = dead_socket; |
562 | skt->ops->init(skt); | 560 | skt->ops->init(skt); |
563 | skt->ops->set_socket(skt, &skt->socket); | 561 | skt->ops->set_socket(skt, &skt->socket); |
562 | if (skt->state & SOCKET_PRESENT) | ||
563 | skt->resume_status = socket_setup(skt, resume_delay); | ||
564 | return 0; | ||
565 | } | ||
564 | 566 | ||
567 | static int socket_late_resume(struct pcmcia_socket *skt) | ||
568 | { | ||
565 | if (!(skt->state & SOCKET_PRESENT)) { | 569 | if (!(skt->state & SOCKET_PRESENT)) { |
566 | skt->state &= ~SOCKET_SUSPEND; | 570 | skt->state &= ~SOCKET_SUSPEND; |
567 | return socket_insert(skt); | 571 | return socket_insert(skt); |
568 | } | 572 | } |
569 | 573 | ||
570 | ret = socket_setup(skt, resume_delay); | 574 | if (skt->resume_status == 0) { |
571 | if (ret == 0) { | ||
572 | /* | 575 | /* |
573 | * FIXME: need a better check here for cardbus cards. | 576 | * FIXME: need a better check here for cardbus cards. |
574 | */ | 577 | */ |
@@ -596,6 +599,20 @@ static int socket_resume(struct pcmcia_socket *skt) | |||
596 | return 0; | 599 | return 0; |
597 | } | 600 | } |
598 | 601 | ||
602 | /* | ||
603 | * Resume a socket. If a card is present, verify its CIS against | ||
604 | * our cached copy. If they are different, the card has been | ||
605 | * replaced, and we need to tell the drivers. | ||
606 | */ | ||
607 | static int socket_resume(struct pcmcia_socket *skt) | ||
608 | { | ||
609 | if (!(skt->state & SOCKET_SUSPEND)) | ||
610 | return -EBUSY; | ||
611 | |||
612 | socket_early_resume(skt); | ||
613 | return socket_late_resume(skt); | ||
614 | } | ||
615 | |||
599 | static void socket_remove(struct pcmcia_socket *skt) | 616 | static void socket_remove(struct pcmcia_socket *skt) |
600 | { | 617 | { |
601 | dev_printk(KERN_NOTICE, &skt->dev, | 618 | dev_printk(KERN_NOTICE, &skt->dev, |
diff --git a/drivers/pcmcia/cs_internal.h b/drivers/pcmcia/cs_internal.h index 79615e6d540b..1f4098f1354d 100644 --- a/drivers/pcmcia/cs_internal.h +++ b/drivers/pcmcia/cs_internal.h | |||
@@ -197,8 +197,7 @@ int pccard_read_tuple(struct pcmcia_socket *s, unsigned int function, | |||
197 | cisdata_t code, void *parse); | 197 | cisdata_t code, void *parse); |
198 | int pcmcia_replace_cis(struct pcmcia_socket *s, | 198 | int pcmcia_replace_cis(struct pcmcia_socket *s, |
199 | const u8 *data, const size_t len); | 199 | const u8 *data, const size_t len); |
200 | int pccard_validate_cis(struct pcmcia_socket *s, unsigned int function, | 200 | int pccard_validate_cis(struct pcmcia_socket *s, unsigned int *count); |
201 | unsigned int *count); | ||
202 | 201 | ||
203 | /* rsrc_mgr.c */ | 202 | /* rsrc_mgr.c */ |
204 | int pcmcia_validate_mem(struct pcmcia_socket *s); | 203 | int pcmcia_validate_mem(struct pcmcia_socket *s); |
diff --git a/drivers/pcmcia/ds.c b/drivers/pcmcia/ds.c index 9f300d3cb125..f5b7079f13d3 100644 --- a/drivers/pcmcia/ds.c +++ b/drivers/pcmcia/ds.c | |||
@@ -547,7 +547,7 @@ static int pcmcia_device_query(struct pcmcia_device *p_dev) | |||
547 | if (!vers1) | 547 | if (!vers1) |
548 | return -ENOMEM; | 548 | return -ENOMEM; |
549 | 549 | ||
550 | if (!pccard_read_tuple(p_dev->socket, p_dev->func, | 550 | if (!pccard_read_tuple(p_dev->socket, BIND_FN_ALL, |
551 | CISTPL_MANFID, &manf_id)) { | 551 | CISTPL_MANFID, &manf_id)) { |
552 | p_dev->manf_id = manf_id.manf; | 552 | p_dev->manf_id = manf_id.manf; |
553 | p_dev->card_id = manf_id.card; | 553 | p_dev->card_id = manf_id.card; |
@@ -581,9 +581,9 @@ static int pcmcia_device_query(struct pcmcia_device *p_dev) | |||
581 | kfree(devgeo); | 581 | kfree(devgeo); |
582 | } | 582 | } |
583 | 583 | ||
584 | if (!pccard_read_tuple(p_dev->socket, p_dev->func, CISTPL_VERS_1, | 584 | if (!pccard_read_tuple(p_dev->socket, BIND_FN_ALL, CISTPL_VERS_1, |
585 | vers1)) { | 585 | vers1)) { |
586 | for (i=0; i < vers1->ns; i++) { | 586 | for (i = 0; i < min_t(unsigned int, 4, vers1->ns); i++) { |
587 | char *tmp; | 587 | char *tmp; |
588 | unsigned int length; | 588 | unsigned int length; |
589 | 589 | ||
@@ -733,7 +733,7 @@ static int pcmcia_card_add(struct pcmcia_socket *s) | |||
733 | return -EAGAIN; /* try again, but later... */ | 733 | return -EAGAIN; /* try again, but later... */ |
734 | } | 734 | } |
735 | 735 | ||
736 | ret = pccard_validate_cis(s, BIND_FN_ALL, &no_chains); | 736 | ret = pccard_validate_cis(s, &no_chains); |
737 | if (ret || !no_chains) { | 737 | if (ret || !no_chains) { |
738 | ds_dev_dbg(0, &s->dev, "invalid CIS or invalid resources\n"); | 738 | ds_dev_dbg(0, &s->dev, "invalid CIS or invalid resources\n"); |
739 | return -ENODEV; | 739 | return -ENODEV; |
diff --git a/drivers/pcmcia/i82365.c b/drivers/pcmcia/i82365.c index b906abe26ad0..a4aacb830b80 100644 --- a/drivers/pcmcia/i82365.c +++ b/drivers/pcmcia/i82365.c | |||
@@ -1053,8 +1053,8 @@ static int i365_set_io_map(u_short sock, struct pccard_io_map *io) | |||
1053 | u_char map, ioctl; | 1053 | u_char map, ioctl; |
1054 | 1054 | ||
1055 | debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, " | 1055 | debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, " |
1056 | "%#x-%#x)\n", sock, io->map, io->flags, | 1056 | "%#llx-%#llx)\n", sock, io->map, io->flags, io->speed, |
1057 | io->speed, io->start, io->stop); | 1057 | (unsigned long long)io->start, (unsigned long long)io->stop); |
1058 | map = io->map; | 1058 | map = io->map; |
1059 | if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || | 1059 | if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || |
1060 | (io->stop < io->start)) return -EINVAL; | 1060 | (io->stop < io->start)) return -EINVAL; |
diff --git a/drivers/pcmcia/m32r_cfc.c b/drivers/pcmcia/m32r_cfc.c index d1d89c4491ad..7dfbee1dcd76 100644 --- a/drivers/pcmcia/m32r_cfc.c +++ b/drivers/pcmcia/m32r_cfc.c | |||
@@ -537,8 +537,9 @@ static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io) | |||
537 | u_char map; | 537 | u_char map; |
538 | 538 | ||
539 | debug(3, "m32r_cfc: SetIOMap(%d, %d, %#2.2x, %d ns, " | 539 | debug(3, "m32r_cfc: SetIOMap(%d, %d, %#2.2x, %d ns, " |
540 | "%#lx-%#lx)\n", sock, io->map, io->flags, | 540 | "%#llx-%#llx)\n", sock, io->map, io->flags, |
541 | io->speed, io->start, io->stop); | 541 | io->speed, (unsigned long long)io->start, |
542 | (unsigned long long)io->stop); | ||
542 | map = io->map; | 543 | map = io->map; |
543 | 544 | ||
544 | return 0; | 545 | return 0; |
@@ -554,8 +555,9 @@ static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem) | |||
554 | pcc_socket_t *t = &socket[sock]; | 555 | pcc_socket_t *t = &socket[sock]; |
555 | 556 | ||
556 | debug(3, "m32r_cfc: SetMemMap(%d, %d, %#2.2x, %d ns, " | 557 | debug(3, "m32r_cfc: SetMemMap(%d, %d, %#2.2x, %d ns, " |
557 | "%#lx, %#x)\n", sock, map, mem->flags, | 558 | "%#llx, %#x)\n", sock, map, mem->flags, |
558 | mem->speed, mem->static_start, mem->card_start); | 559 | mem->speed, (unsigned long long)mem->static_start, |
560 | mem->card_start); | ||
559 | 561 | ||
560 | /* | 562 | /* |
561 | * sanity check | 563 | * sanity check |
diff --git a/drivers/pcmcia/m32r_pcc.c b/drivers/pcmcia/m32r_pcc.c index a0655839c8d3..c6524f99ccc3 100644 --- a/drivers/pcmcia/m32r_pcc.c +++ b/drivers/pcmcia/m32r_pcc.c | |||
@@ -492,8 +492,9 @@ static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io) | |||
492 | u_char map; | 492 | u_char map; |
493 | 493 | ||
494 | debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, " | 494 | debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, " |
495 | "%#x-%#x)\n", sock, io->map, io->flags, | 495 | "%#llx-%#llx)\n", sock, io->map, io->flags, |
496 | io->speed, io->start, io->stop); | 496 | io->speed, (unsigned long long)io->start, |
497 | (unsigned long long)io->stop); | ||
497 | map = io->map; | 498 | map = io->map; |
498 | 499 | ||
499 | return 0; | 500 | return 0; |
@@ -515,8 +516,9 @@ static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem) | |||
515 | #endif | 516 | #endif |
516 | 517 | ||
517 | debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, " | 518 | debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, " |
518 | "%#lx, %#x)\n", sock, map, mem->flags, | 519 | "%#llx, %#x)\n", sock, map, mem->flags, |
519 | mem->speed, mem->static_start, mem->card_start); | 520 | mem->speed, (unsigned long long)mem->static_start, |
521 | mem->card_start); | ||
520 | 522 | ||
521 | /* | 523 | /* |
522 | * sanity check | 524 | * sanity check |
diff --git a/drivers/pcmcia/m8xx_pcmcia.c b/drivers/pcmcia/m8xx_pcmcia.c index c69f2c4fe520..403559ba49dd 100644 --- a/drivers/pcmcia/m8xx_pcmcia.c +++ b/drivers/pcmcia/m8xx_pcmcia.c | |||
@@ -975,8 +975,9 @@ static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) | |||
975 | #define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start) | 975 | #define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start) |
976 | 976 | ||
977 | dprintk("SetIOMap(%d, %d, %#2.2x, %d ns, " | 977 | dprintk("SetIOMap(%d, %d, %#2.2x, %d ns, " |
978 | "%#4.4x-%#4.4x)\n", lsock, io->map, io->flags, | 978 | "%#4.4llx-%#4.4llx)\n", lsock, io->map, io->flags, |
979 | io->speed, io->start, io->stop); | 979 | io->speed, (unsigned long long)io->start, |
980 | (unsigned long long)io->stop); | ||
980 | 981 | ||
981 | if ((io->map >= PCMCIA_IO_WIN_NO) || (io->start > 0xffff) | 982 | if ((io->map >= PCMCIA_IO_WIN_NO) || (io->start > 0xffff) |
982 | || (io->stop > 0xffff) || (io->stop < io->start)) | 983 | || (io->stop > 0xffff) || (io->stop < io->start)) |
@@ -1055,8 +1056,9 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, | |||
1055 | pcmconf8xx_t *pcmcia = s->pcmcia; | 1056 | pcmconf8xx_t *pcmcia = s->pcmcia; |
1056 | 1057 | ||
1057 | dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, " | 1058 | dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, " |
1058 | "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags, | 1059 | "%#5.5llx, %#5.5x)\n", lsock, mem->map, mem->flags, |
1059 | mem->speed, mem->static_start, mem->card_start); | 1060 | mem->speed, (unsigned long long)mem->static_start, |
1061 | mem->card_start); | ||
1060 | 1062 | ||
1061 | if ((mem->map >= PCMCIA_MEM_WIN_NO) | 1063 | if ((mem->map >= PCMCIA_MEM_WIN_NO) |
1062 | // || ((mem->s) >= PCMCIA_MEM_WIN_SIZE) | 1064 | // || ((mem->s) >= PCMCIA_MEM_WIN_SIZE) |
@@ -1107,8 +1109,9 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock, | |||
1107 | } | 1109 | } |
1108 | 1110 | ||
1109 | dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, " | 1111 | dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, " |
1110 | "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags, | 1112 | "%#5.5llx, %#5.5x)\n", lsock, mem->map, mem->flags, |
1111 | mem->speed, mem->static_start, mem->card_start); | 1113 | mem->speed, (unsigned long long)mem->static_start, |
1114 | mem->card_start); | ||
1112 | 1115 | ||
1113 | /* copy the struct and modify the copy */ | 1116 | /* copy the struct and modify the copy */ |
1114 | 1117 | ||
diff --git a/drivers/pcmcia/pcmcia_ioctl.c b/drivers/pcmcia/pcmcia_ioctl.c index 32c44040c1e8..30cf71d2ee23 100644 --- a/drivers/pcmcia/pcmcia_ioctl.c +++ b/drivers/pcmcia/pcmcia_ioctl.c | |||
@@ -881,7 +881,7 @@ static int ds_ioctl(struct inode * inode, struct file * file, | |||
881 | mutex_lock(&s->skt_mutex); | 881 | mutex_lock(&s->skt_mutex); |
882 | pcmcia_validate_mem(s); | 882 | pcmcia_validate_mem(s); |
883 | mutex_unlock(&s->skt_mutex); | 883 | mutex_unlock(&s->skt_mutex); |
884 | ret = pccard_validate_cis(s, BIND_FN_ALL, &buf->cisinfo.Chains); | 884 | ret = pccard_validate_cis(s, &buf->cisinfo.Chains); |
885 | break; | 885 | break; |
886 | case DS_SUSPEND_CARD: | 886 | case DS_SUSPEND_CARD: |
887 | ret = pcmcia_suspend_card(s); | 887 | ret = pcmcia_suspend_card(s); |
diff --git a/drivers/pcmcia/pd6729.c b/drivers/pcmcia/pd6729.c index 1c39d3438f20..70a33468bcd0 100644 --- a/drivers/pcmcia/pd6729.c +++ b/drivers/pcmcia/pd6729.c | |||
@@ -641,6 +641,12 @@ static int __devinit pd6729_pci_probe(struct pci_dev *dev, | |||
641 | if ((ret = pci_enable_device(dev))) | 641 | if ((ret = pci_enable_device(dev))) |
642 | goto err_out_free_mem; | 642 | goto err_out_free_mem; |
643 | 643 | ||
644 | if (!pci_resource_start(dev, 0)) { | ||
645 | printk(KERN_INFO "pd6729: refusing to load the driver " | ||
646 | "as the io_base is 0.\n"); | ||
647 | goto err_out_free_mem; | ||
648 | } | ||
649 | |||
644 | printk(KERN_INFO "pd6729: Cirrus PD6729 PCI to PCMCIA Bridge " | 650 | printk(KERN_INFO "pd6729: Cirrus PD6729 PCI to PCMCIA Bridge " |
645 | "at 0x%llx on irq %d\n", | 651 | "at 0x%llx on irq %d\n", |
646 | (unsigned long long)pci_resource_start(dev, 0), dev->irq); | 652 | (unsigned long long)pci_resource_start(dev, 0), dev->irq); |
diff --git a/drivers/pcmcia/rsrc_nonstatic.c b/drivers/pcmcia/rsrc_nonstatic.c index 9ca22c7aafb2..7039f3cf5b77 100644 --- a/drivers/pcmcia/rsrc_nonstatic.c +++ b/drivers/pcmcia/rsrc_nonstatic.c | |||
@@ -206,6 +206,7 @@ static void do_io_probe(struct pcmcia_socket *s, unsigned int base, | |||
206 | /* First, what does a floating port look like? */ | 206 | /* First, what does a floating port look like? */ |
207 | b = kzalloc(256, GFP_KERNEL); | 207 | b = kzalloc(256, GFP_KERNEL); |
208 | if (!b) { | 208 | if (!b) { |
209 | printk("\n"); | ||
209 | dev_printk(KERN_ERR, &s->dev, | 210 | dev_printk(KERN_ERR, &s->dev, |
210 | "do_io_probe: unable to kmalloc 256 bytes"); | 211 | "do_io_probe: unable to kmalloc 256 bytes"); |
211 | return; | 212 | return; |
@@ -275,7 +276,7 @@ static int readable(struct pcmcia_socket *s, struct resource *res, | |||
275 | s->cis_mem.res = res; | 276 | s->cis_mem.res = res; |
276 | s->cis_virt = ioremap(res->start, s->map_size); | 277 | s->cis_virt = ioremap(res->start, s->map_size); |
277 | if (s->cis_virt) { | 278 | if (s->cis_virt) { |
278 | ret = pccard_validate_cis(s, BIND_FN_ALL, count); | 279 | ret = pccard_validate_cis(s, count); |
279 | /* invalidate mapping and CIS cache */ | 280 | /* invalidate mapping and CIS cache */ |
280 | iounmap(s->cis_virt); | 281 | iounmap(s->cis_virt); |
281 | s->cis_virt = NULL; | 282 | s->cis_virt = NULL; |
diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c index 163cf98e2386..ef7e9e58782b 100644 --- a/drivers/pcmcia/soc_common.c +++ b/drivers/pcmcia/soc_common.c | |||
@@ -336,8 +336,9 @@ soc_common_pcmcia_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *m | |||
336 | struct soc_pcmcia_socket *skt = to_soc_pcmcia_socket(sock); | 336 | struct soc_pcmcia_socket *skt = to_soc_pcmcia_socket(sock); |
337 | unsigned short speed = map->speed; | 337 | unsigned short speed = map->speed; |
338 | 338 | ||
339 | debug(skt, 2, "map %u speed %u start 0x%08x stop 0x%08x\n", | 339 | debug(skt, 2, "map %u speed %u start 0x%08llx stop 0x%08llx\n", |
340 | map->map, map->speed, map->start, map->stop); | 340 | map->map, map->speed, (unsigned long long)map->start, |
341 | (unsigned long long)map->stop); | ||
341 | debug(skt, 2, "flags: %s%s%s%s%s%s%s%s\n", | 342 | debug(skt, 2, "flags: %s%s%s%s%s%s%s%s\n", |
342 | (map->flags==0)?"<NONE>":"", | 343 | (map->flags==0)?"<NONE>":"", |
343 | (map->flags&MAP_ACTIVE)?"ACTIVE ":"", | 344 | (map->flags&MAP_ACTIVE)?"ACTIVE ":"", |
diff --git a/drivers/pcmcia/socket_sysfs.c b/drivers/pcmcia/socket_sysfs.c index ff9a3bb3c88d..78d5aab542f7 100644 --- a/drivers/pcmcia/socket_sysfs.c +++ b/drivers/pcmcia/socket_sysfs.c | |||
@@ -300,7 +300,7 @@ static ssize_t pccard_show_cis(struct kobject *kobj, | |||
300 | 300 | ||
301 | if (!(s->state & SOCKET_PRESENT)) | 301 | if (!(s->state & SOCKET_PRESENT)) |
302 | return -ENODEV; | 302 | return -ENODEV; |
303 | if (pccard_validate_cis(s, BIND_FN_ALL, &chains)) | 303 | if (pccard_validate_cis(s, &chains)) |
304 | return -EIO; | 304 | return -EIO; |
305 | if (!chains) | 305 | if (!chains) |
306 | return -ENODATA; | 306 | return -ENODATA; |
diff --git a/drivers/pcmcia/tcic.c b/drivers/pcmcia/tcic.c index 582413fcb62f..6918849d511e 100644 --- a/drivers/pcmcia/tcic.c +++ b/drivers/pcmcia/tcic.c | |||
@@ -732,8 +732,8 @@ static int tcic_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io) | |||
732 | u_short base, len, ioctl; | 732 | u_short base, len, ioctl; |
733 | 733 | ||
734 | debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, " | 734 | debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, " |
735 | "%#x-%#x)\n", psock, io->map, io->flags, | 735 | "%#llx-%#llx)\n", psock, io->map, io->flags, io->speed, |
736 | io->speed, io->start, io->stop); | 736 | (unsigned long long)io->start, (unsigned long long)io->stop); |
737 | if ((io->map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || | 737 | if ((io->map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || |
738 | (io->stop < io->start)) return -EINVAL; | 738 | (io->stop < io->start)) return -EINVAL; |
739 | tcic_setw(TCIC_ADDR+2, TCIC_ADR2_INDREG | (psock << TCIC_SS_SHFT)); | 739 | tcic_setw(TCIC_ADDR+2, TCIC_ADR2_INDREG | (psock << TCIC_SS_SHFT)); |
diff --git a/drivers/pcmcia/yenta_socket.c b/drivers/pcmcia/yenta_socket.c index abe0e44c6e9e..8be4cc447a17 100644 --- a/drivers/pcmcia/yenta_socket.c +++ b/drivers/pcmcia/yenta_socket.c | |||
@@ -1275,16 +1275,26 @@ static int yenta_dev_resume_noirq(struct device *dev) | |||
1275 | if (socket->type && socket->type->restore_state) | 1275 | if (socket->type && socket->type->restore_state) |
1276 | socket->type->restore_state(socket); | 1276 | socket->type->restore_state(socket); |
1277 | 1277 | ||
1278 | return pcmcia_socket_dev_resume(dev); | 1278 | pcmcia_socket_dev_early_resume(dev); |
1279 | return 0; | ||
1280 | } | ||
1281 | |||
1282 | static int yenta_dev_resume(struct device *dev) | ||
1283 | { | ||
1284 | pcmcia_socket_dev_late_resume(dev); | ||
1285 | return 0; | ||
1279 | } | 1286 | } |
1280 | 1287 | ||
1281 | static struct dev_pm_ops yenta_pm_ops = { | 1288 | static struct dev_pm_ops yenta_pm_ops = { |
1282 | .suspend_noirq = yenta_dev_suspend_noirq, | 1289 | .suspend_noirq = yenta_dev_suspend_noirq, |
1283 | .resume_noirq = yenta_dev_resume_noirq, | 1290 | .resume_noirq = yenta_dev_resume_noirq, |
1291 | .resume = yenta_dev_resume, | ||
1284 | .freeze_noirq = yenta_dev_suspend_noirq, | 1292 | .freeze_noirq = yenta_dev_suspend_noirq, |
1285 | .thaw_noirq = yenta_dev_resume_noirq, | 1293 | .thaw_noirq = yenta_dev_resume_noirq, |
1294 | .thaw = yenta_dev_resume, | ||
1286 | .poweroff_noirq = yenta_dev_suspend_noirq, | 1295 | .poweroff_noirq = yenta_dev_suspend_noirq, |
1287 | .restore_noirq = yenta_dev_resume_noirq, | 1296 | .restore_noirq = yenta_dev_resume_noirq, |
1297 | .restore = yenta_dev_resume, | ||
1288 | }; | 1298 | }; |
1289 | 1299 | ||
1290 | #define YENTA_PM_OPS (¥ta_pm_ops) | 1300 | #define YENTA_PM_OPS (¥ta_pm_ops) |
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c index d379e74a05d0..4226e5352738 100644 --- a/drivers/platform/x86/eeepc-laptop.c +++ b/drivers/platform/x86/eeepc-laptop.c | |||
@@ -150,8 +150,6 @@ struct eeepc_hotk { | |||
150 | /* The actual device the driver binds to */ | 150 | /* The actual device the driver binds to */ |
151 | static struct eeepc_hotk *ehotk; | 151 | static struct eeepc_hotk *ehotk; |
152 | 152 | ||
153 | static void eeepc_rfkill_hotplug(bool real); | ||
154 | |||
155 | /* Platform device/driver */ | 153 | /* Platform device/driver */ |
156 | static int eeepc_hotk_thaw(struct device *device); | 154 | static int eeepc_hotk_thaw(struct device *device); |
157 | static int eeepc_hotk_restore(struct device *device); | 155 | static int eeepc_hotk_restore(struct device *device); |
@@ -345,16 +343,7 @@ static bool eeepc_wlan_rfkill_blocked(void) | |||
345 | static int eeepc_rfkill_set(void *data, bool blocked) | 343 | static int eeepc_rfkill_set(void *data, bool blocked) |
346 | { | 344 | { |
347 | unsigned long asl = (unsigned long)data; | 345 | unsigned long asl = (unsigned long)data; |
348 | int ret; | 346 | return set_acpi(asl, !blocked); |
349 | |||
350 | if (asl != CM_ASL_WLAN) | ||
351 | return set_acpi(asl, !blocked); | ||
352 | |||
353 | /* hack to avoid panic with rt2860sta */ | ||
354 | if (blocked) | ||
355 | eeepc_rfkill_hotplug(false); | ||
356 | ret = set_acpi(asl, !blocked); | ||
357 | return ret; | ||
358 | } | 347 | } |
359 | 348 | ||
360 | static const struct rfkill_ops eeepc_rfkill_ops = { | 349 | static const struct rfkill_ops eeepc_rfkill_ops = { |
@@ -367,7 +356,8 @@ static void __devinit eeepc_enable_camera(void) | |||
367 | * If the following call to set_acpi() fails, it's because there's no | 356 | * If the following call to set_acpi() fails, it's because there's no |
368 | * camera so we can ignore the error. | 357 | * camera so we can ignore the error. |
369 | */ | 358 | */ |
370 | set_acpi(CM_ASL_CAMERA, 1); | 359 | if (get_acpi(CM_ASL_CAMERA) == 0) |
360 | set_acpi(CM_ASL_CAMERA, 1); | ||
371 | } | 361 | } |
372 | 362 | ||
373 | /* | 363 | /* |
@@ -654,13 +644,13 @@ static int eeepc_get_adapter_status(struct hotplug_slot *hotplug_slot, | |||
654 | return 0; | 644 | return 0; |
655 | } | 645 | } |
656 | 646 | ||
657 | static void eeepc_rfkill_hotplug(bool real) | 647 | static void eeepc_rfkill_hotplug(void) |
658 | { | 648 | { |
659 | struct pci_dev *dev; | 649 | struct pci_dev *dev; |
660 | struct pci_bus *bus; | 650 | struct pci_bus *bus; |
661 | bool blocked = real ? eeepc_wlan_rfkill_blocked() : true; | 651 | bool blocked = eeepc_wlan_rfkill_blocked(); |
662 | 652 | ||
663 | if (real && ehotk->wlan_rfkill) | 653 | if (ehotk->wlan_rfkill) |
664 | rfkill_set_sw_state(ehotk->wlan_rfkill, blocked); | 654 | rfkill_set_sw_state(ehotk->wlan_rfkill, blocked); |
665 | 655 | ||
666 | mutex_lock(&ehotk->hotplug_lock); | 656 | mutex_lock(&ehotk->hotplug_lock); |
@@ -703,7 +693,7 @@ static void eeepc_rfkill_notify(acpi_handle handle, u32 event, void *data) | |||
703 | if (event != ACPI_NOTIFY_BUS_CHECK) | 693 | if (event != ACPI_NOTIFY_BUS_CHECK) |
704 | return; | 694 | return; |
705 | 695 | ||
706 | eeepc_rfkill_hotplug(true); | 696 | eeepc_rfkill_hotplug(); |
707 | } | 697 | } |
708 | 698 | ||
709 | static void eeepc_hotk_notify(struct acpi_device *device, u32 event) | 699 | static void eeepc_hotk_notify(struct acpi_device *device, u32 event) |
@@ -861,7 +851,7 @@ static int eeepc_hotk_restore(struct device *device) | |||
861 | { | 851 | { |
862 | /* Refresh both wlan rfkill state and pci hotplug */ | 852 | /* Refresh both wlan rfkill state and pci hotplug */ |
863 | if (ehotk->wlan_rfkill) | 853 | if (ehotk->wlan_rfkill) |
864 | eeepc_rfkill_hotplug(true); | 854 | eeepc_rfkill_hotplug(); |
865 | 855 | ||
866 | if (ehotk->bluetooth_rfkill) | 856 | if (ehotk->bluetooth_rfkill) |
867 | rfkill_set_sw_state(ehotk->bluetooth_rfkill, | 857 | rfkill_set_sw_state(ehotk->bluetooth_rfkill, |
@@ -1004,7 +994,7 @@ static void eeepc_rfkill_exit(void) | |||
1004 | * Refresh pci hotplug in case the rfkill state was changed after | 994 | * Refresh pci hotplug in case the rfkill state was changed after |
1005 | * eeepc_unregister_rfkill_notifier() | 995 | * eeepc_unregister_rfkill_notifier() |
1006 | */ | 996 | */ |
1007 | eeepc_rfkill_hotplug(true); | 997 | eeepc_rfkill_hotplug(); |
1008 | if (ehotk->hotplug_slot) | 998 | if (ehotk->hotplug_slot) |
1009 | pci_hp_deregister(ehotk->hotplug_slot); | 999 | pci_hp_deregister(ehotk->hotplug_slot); |
1010 | 1000 | ||
@@ -1120,7 +1110,7 @@ static int eeepc_rfkill_init(struct device *dev) | |||
1120 | * Refresh pci hotplug in case the rfkill state was changed during | 1110 | * Refresh pci hotplug in case the rfkill state was changed during |
1121 | * setup. | 1111 | * setup. |
1122 | */ | 1112 | */ |
1123 | eeepc_rfkill_hotplug(true); | 1113 | eeepc_rfkill_hotplug(); |
1124 | 1114 | ||
1125 | exit: | 1115 | exit: |
1126 | if (result && result != -ENODEV) | 1116 | if (result && result != -ENODEV) |
diff --git a/drivers/pps/kapi.c b/drivers/pps/kapi.c index 35a0b192d768..2d414e23d390 100644 --- a/drivers/pps/kapi.c +++ b/drivers/pps/kapi.c | |||
@@ -271,6 +271,7 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data) | |||
271 | { | 271 | { |
272 | struct pps_device *pps; | 272 | struct pps_device *pps; |
273 | unsigned long flags; | 273 | unsigned long flags; |
274 | int captured = 0; | ||
274 | 275 | ||
275 | if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) { | 276 | if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) { |
276 | printk(KERN_ERR "pps: unknown event (%x) for source %d\n", | 277 | printk(KERN_ERR "pps: unknown event (%x) for source %d\n", |
@@ -293,7 +294,8 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data) | |||
293 | 294 | ||
294 | /* Check the event */ | 295 | /* Check the event */ |
295 | pps->current_mode = pps->params.mode; | 296 | pps->current_mode = pps->params.mode; |
296 | if (event & PPS_CAPTUREASSERT) { | 297 | if ((event & PPS_CAPTUREASSERT) & |
298 | (pps->params.mode & PPS_CAPTUREASSERT)) { | ||
297 | /* We have to add an offset? */ | 299 | /* We have to add an offset? */ |
298 | if (pps->params.mode & PPS_OFFSETASSERT) | 300 | if (pps->params.mode & PPS_OFFSETASSERT) |
299 | pps_add_offset(ts, &pps->params.assert_off_tu); | 301 | pps_add_offset(ts, &pps->params.assert_off_tu); |
@@ -303,8 +305,11 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data) | |||
303 | pps->assert_sequence++; | 305 | pps->assert_sequence++; |
304 | pr_debug("capture assert seq #%u for source %d\n", | 306 | pr_debug("capture assert seq #%u for source %d\n", |
305 | pps->assert_sequence, source); | 307 | pps->assert_sequence, source); |
308 | |||
309 | captured = ~0; | ||
306 | } | 310 | } |
307 | if (event & PPS_CAPTURECLEAR) { | 311 | if ((event & PPS_CAPTURECLEAR) & |
312 | (pps->params.mode & PPS_CAPTURECLEAR)) { | ||
308 | /* We have to add an offset? */ | 313 | /* We have to add an offset? */ |
309 | if (pps->params.mode & PPS_OFFSETCLEAR) | 314 | if (pps->params.mode & PPS_OFFSETCLEAR) |
310 | pps_add_offset(ts, &pps->params.clear_off_tu); | 315 | pps_add_offset(ts, &pps->params.clear_off_tu); |
@@ -314,12 +319,17 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data) | |||
314 | pps->clear_sequence++; | 319 | pps->clear_sequence++; |
315 | pr_debug("capture clear seq #%u for source %d\n", | 320 | pr_debug("capture clear seq #%u for source %d\n", |
316 | pps->clear_sequence, source); | 321 | pps->clear_sequence, source); |
322 | |||
323 | captured = ~0; | ||
317 | } | 324 | } |
318 | 325 | ||
319 | pps->go = ~0; | 326 | /* Wake up iif captured somthing */ |
320 | wake_up_interruptible(&pps->queue); | 327 | if (captured) { |
328 | pps->go = ~0; | ||
329 | wake_up_interruptible(&pps->queue); | ||
321 | 330 | ||
322 | kill_fasync(&pps->async_queue, SIGIO, POLL_IN); | 331 | kill_fasync(&pps->async_queue, SIGIO, POLL_IN); |
332 | } | ||
323 | 333 | ||
324 | spin_unlock_irqrestore(&pps->lock, flags); | 334 | spin_unlock_irqrestore(&pps->lock, flags); |
325 | 335 | ||
diff --git a/drivers/pps/pps.c b/drivers/pps/pps.c index fea17e7805e9..ca5183bdad85 100644 --- a/drivers/pps/pps.c +++ b/drivers/pps/pps.c | |||
@@ -71,9 +71,14 @@ static long pps_cdev_ioctl(struct file *file, | |||
71 | case PPS_GETPARAMS: | 71 | case PPS_GETPARAMS: |
72 | pr_debug("PPS_GETPARAMS: source %d\n", pps->id); | 72 | pr_debug("PPS_GETPARAMS: source %d\n", pps->id); |
73 | 73 | ||
74 | /* Return current parameters */ | 74 | spin_lock_irq(&pps->lock); |
75 | err = copy_to_user(uarg, &pps->params, | 75 | |
76 | sizeof(struct pps_kparams)); | 76 | /* Get the current parameters */ |
77 | params = pps->params; | ||
78 | |||
79 | spin_unlock_irq(&pps->lock); | ||
80 | |||
81 | err = copy_to_user(uarg, ¶ms, sizeof(struct pps_kparams)); | ||
77 | if (err) | 82 | if (err) |
78 | return -EFAULT; | 83 | return -EFAULT; |
79 | 84 | ||
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 744ea1d0b59b..efe568deda12 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c | |||
@@ -1283,7 +1283,8 @@ static int _regulator_disable(struct regulator_dev *rdev) | |||
1283 | return -EIO; | 1283 | return -EIO; |
1284 | 1284 | ||
1285 | /* are we the last user and permitted to disable ? */ | 1285 | /* are we the last user and permitted to disable ? */ |
1286 | if (rdev->use_count == 1 && !rdev->constraints->always_on) { | 1286 | if (rdev->use_count == 1 && |
1287 | (rdev->constraints && !rdev->constraints->always_on)) { | ||
1287 | 1288 | ||
1288 | /* we are last user */ | 1289 | /* we are last user */ |
1289 | if (_regulator_can_change_status(rdev) && | 1290 | if (_regulator_can_change_status(rdev) && |
diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c index f8b295700d7d..f9f516a3028a 100644 --- a/drivers/regulator/fixed.c +++ b/drivers/regulator/fixed.c | |||
@@ -196,11 +196,10 @@ static int regulator_fixed_voltage_remove(struct platform_device *pdev) | |||
196 | struct fixed_voltage_data *drvdata = platform_get_drvdata(pdev); | 196 | struct fixed_voltage_data *drvdata = platform_get_drvdata(pdev); |
197 | 197 | ||
198 | regulator_unregister(drvdata->dev); | 198 | regulator_unregister(drvdata->dev); |
199 | kfree(drvdata->desc.name); | ||
200 | kfree(drvdata); | ||
201 | |||
202 | if (gpio_is_valid(drvdata->gpio)) | 199 | if (gpio_is_valid(drvdata->gpio)) |
203 | gpio_free(drvdata->gpio); | 200 | gpio_free(drvdata->gpio); |
201 | kfree(drvdata->desc.name); | ||
202 | kfree(drvdata); | ||
204 | 203 | ||
205 | return 0; | 204 | return 0; |
206 | } | 205 | } |
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c index bb61aede4801..902db56ce099 100644 --- a/drivers/regulator/wm831x-ldo.c +++ b/drivers/regulator/wm831x-ldo.c | |||
@@ -175,18 +175,18 @@ static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev) | |||
175 | struct wm831x *wm831x = ldo->wm831x; | 175 | struct wm831x *wm831x = ldo->wm831x; |
176 | int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; | 176 | int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; |
177 | int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; | 177 | int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; |
178 | unsigned int ret; | 178 | int ret; |
179 | 179 | ||
180 | ret = wm831x_reg_read(wm831x, on_reg); | 180 | ret = wm831x_reg_read(wm831x, on_reg); |
181 | if (ret < 0) | 181 | if (ret < 0) |
182 | return 0; | 182 | return ret; |
183 | 183 | ||
184 | if (!(ret & WM831X_LDO1_ON_MODE)) | 184 | if (!(ret & WM831X_LDO1_ON_MODE)) |
185 | return REGULATOR_MODE_NORMAL; | 185 | return REGULATOR_MODE_NORMAL; |
186 | 186 | ||
187 | ret = wm831x_reg_read(wm831x, ctrl_reg); | 187 | ret = wm831x_reg_read(wm831x, ctrl_reg); |
188 | if (ret < 0) | 188 | if (ret < 0) |
189 | return 0; | 189 | return ret; |
190 | 190 | ||
191 | if (ret & WM831X_LDO1_LP_MODE) | 191 | if (ret & WM831X_LDO1_LP_MODE) |
192 | return REGULATOR_MODE_STANDBY; | 192 | return REGULATOR_MODE_STANDBY; |
diff --git a/drivers/rtc/rtc-coh901331.c b/drivers/rtc/rtc-coh901331.c index 7fe1fa26c52c..03ea530981d1 100644 --- a/drivers/rtc/rtc-coh901331.c +++ b/drivers/rtc/rtc-coh901331.c | |||
@@ -58,7 +58,16 @@ static irqreturn_t coh901331_interrupt(int irq, void *data) | |||
58 | clk_enable(rtap->clk); | 58 | clk_enable(rtap->clk); |
59 | /* Ack IRQ */ | 59 | /* Ack IRQ */ |
60 | writel(1, rtap->virtbase + COH901331_IRQ_EVENT); | 60 | writel(1, rtap->virtbase + COH901331_IRQ_EVENT); |
61 | /* | ||
62 | * Disable the interrupt. This is necessary because | ||
63 | * the RTC lives on a lower-clocked line and will | ||
64 | * not release the IRQ line until after a few (slower) | ||
65 | * clock cycles. The interrupt will be re-enabled when | ||
66 | * a new alarm is set anyway. | ||
67 | */ | ||
68 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | ||
61 | clk_disable(rtap->clk); | 69 | clk_disable(rtap->clk); |
70 | |||
62 | /* Set alarm flag */ | 71 | /* Set alarm flag */ |
63 | rtc_update_irq(rtap->rtc, 1, RTC_AF); | 72 | rtc_update_irq(rtap->rtc, 1, RTC_AF); |
64 | 73 | ||
@@ -128,6 +137,8 @@ static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled) | |||
128 | else | 137 | else |
129 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); | 138 | writel(0, rtap->virtbase + COH901331_IRQ_MASK); |
130 | clk_disable(rtap->clk); | 139 | clk_disable(rtap->clk); |
140 | |||
141 | return 0; | ||
131 | } | 142 | } |
132 | 143 | ||
133 | static struct rtc_class_ops coh901331_ops = { | 144 | static struct rtc_class_ops coh901331_ops = { |
diff --git a/drivers/rtc/rtc-pcf50633.c b/drivers/rtc/rtc-pcf50633.c index f4dd87e29075..33a10c47260e 100644 --- a/drivers/rtc/rtc-pcf50633.c +++ b/drivers/rtc/rtc-pcf50633.c | |||
@@ -70,7 +70,7 @@ static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf) | |||
70 | rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]); | 70 | rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]); |
71 | rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]); | 71 | rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]); |
72 | rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]); | 72 | rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]); |
73 | rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]); | 73 | rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]) - 1; |
74 | rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100; | 74 | rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100; |
75 | } | 75 | } |
76 | 76 | ||
@@ -81,7 +81,7 @@ static void rtc2pcf_time(struct pcf50633_time *pcf, struct rtc_time *rtc) | |||
81 | pcf->time[PCF50633_TI_HOUR] = bin2bcd(rtc->tm_hour); | 81 | pcf->time[PCF50633_TI_HOUR] = bin2bcd(rtc->tm_hour); |
82 | pcf->time[PCF50633_TI_WKDAY] = bin2bcd(rtc->tm_wday); | 82 | pcf->time[PCF50633_TI_WKDAY] = bin2bcd(rtc->tm_wday); |
83 | pcf->time[PCF50633_TI_DAY] = bin2bcd(rtc->tm_mday); | 83 | pcf->time[PCF50633_TI_DAY] = bin2bcd(rtc->tm_mday); |
84 | pcf->time[PCF50633_TI_MONTH] = bin2bcd(rtc->tm_mon); | 84 | pcf->time[PCF50633_TI_MONTH] = bin2bcd(rtc->tm_mon + 1); |
85 | pcf->time[PCF50633_TI_YEAR] = bin2bcd(rtc->tm_year % 100); | 85 | pcf->time[PCF50633_TI_YEAR] = bin2bcd(rtc->tm_year % 100); |
86 | } | 86 | } |
87 | 87 | ||
@@ -245,8 +245,9 @@ static int pcf50633_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
245 | ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA, | 245 | ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA, |
246 | PCF50633_TI_EXTENT, &pcf_tm.time[0]); | 246 | PCF50633_TI_EXTENT, &pcf_tm.time[0]); |
247 | 247 | ||
248 | if (!alarm_masked) | 248 | if (!alarm_masked || alrm->enabled) |
249 | pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM); | 249 | pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM); |
250 | rtc->alarm_enabled = alrm->enabled; | ||
250 | 251 | ||
251 | return ret; | 252 | return ret; |
252 | } | 253 | } |
diff --git a/drivers/rtc/rtc-v3020.c b/drivers/rtc/rtc-v3020.c index ad164056feb6..423cd5a30b10 100644 --- a/drivers/rtc/rtc-v3020.c +++ b/drivers/rtc/rtc-v3020.c | |||
@@ -96,7 +96,7 @@ static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit) | |||
96 | 96 | ||
97 | static unsigned char v3020_mmio_read_bit(struct v3020 *chip) | 97 | static unsigned char v3020_mmio_read_bit(struct v3020 *chip) |
98 | { | 98 | { |
99 | return readl(chip->ioaddress) & (1 << chip->leftshift); | 99 | return !!(readl(chip->ioaddress) & (1 << chip->leftshift)); |
100 | } | 100 | } |
101 | 101 | ||
102 | static struct v3020_chip_ops v3020_mmio_ops = { | 102 | static struct v3020_chip_ops v3020_mmio_ops = { |
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c index 2c839d0d21bd..fadddac1e5a4 100644 --- a/drivers/rtc/rtc-vr41xx.c +++ b/drivers/rtc/rtc-vr41xx.c | |||
@@ -209,19 +209,18 @@ static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm) | |||
209 | 209 | ||
210 | static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq) | 210 | static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq) |
211 | { | 211 | { |
212 | unsigned long count; | 212 | u64 count; |
213 | 213 | ||
214 | if (!is_power_of_2(freq)) | 214 | if (!is_power_of_2(freq)) |
215 | return -EINVAL; | 215 | return -EINVAL; |
216 | count = RTC_FREQUENCY; | 216 | count = RTC_FREQUENCY; |
217 | do_div(count, freq); | 217 | do_div(count, freq); |
218 | 218 | ||
219 | periodic_count = count; | ||
220 | |||
221 | spin_lock_irq(&rtc_lock); | 219 | spin_lock_irq(&rtc_lock); |
222 | 220 | ||
223 | rtc1_write(RTCL1LREG, count); | 221 | periodic_count = count; |
224 | rtc1_write(RTCL1HREG, count >> 16); | 222 | rtc1_write(RTCL1LREG, periodic_count); |
223 | rtc1_write(RTCL1HREG, periodic_count >> 16); | ||
225 | 224 | ||
226 | spin_unlock_irq(&rtc_lock); | 225 | spin_unlock_irq(&rtc_lock); |
227 | 226 | ||
diff --git a/drivers/s390/char/monreader.c b/drivers/s390/char/monreader.c index 89ece1c235aa..66e21dd23154 100644 --- a/drivers/s390/char/monreader.c +++ b/drivers/s390/char/monreader.c | |||
@@ -357,6 +357,7 @@ static int mon_close(struct inode *inode, struct file *filp) | |||
357 | atomic_set(&monpriv->msglim_count, 0); | 357 | atomic_set(&monpriv->msglim_count, 0); |
358 | monpriv->write_index = 0; | 358 | monpriv->write_index = 0; |
359 | monpriv->read_index = 0; | 359 | monpriv->read_index = 0; |
360 | dev_set_drvdata(monreader_device, NULL); | ||
360 | 361 | ||
361 | for (i = 0; i < MON_MSGLIM; i++) | 362 | for (i = 0; i < MON_MSGLIM; i++) |
362 | kfree(monpriv->msg_array[i]); | 363 | kfree(monpriv->msg_array[i]); |
diff --git a/drivers/s390/char/sclp_async.c b/drivers/s390/char/sclp_async.c index a4f68e5b9c96..b44462a6c6d3 100644 --- a/drivers/s390/char/sclp_async.c +++ b/drivers/s390/char/sclp_async.c | |||
@@ -26,7 +26,6 @@ static struct sclp_async_sccb *sccb; | |||
26 | static int sclp_async_send_wait(char *message); | 26 | static int sclp_async_send_wait(char *message); |
27 | static struct ctl_table_header *callhome_sysctl_header; | 27 | static struct ctl_table_header *callhome_sysctl_header; |
28 | static DEFINE_SPINLOCK(sclp_async_lock); | 28 | static DEFINE_SPINLOCK(sclp_async_lock); |
29 | static char nodename[64]; | ||
30 | #define SCLP_NORMAL_WRITE 0x00 | 29 | #define SCLP_NORMAL_WRITE 0x00 |
31 | 30 | ||
32 | struct async_evbuf { | 31 | struct async_evbuf { |
@@ -52,9 +51,10 @@ static struct sclp_register sclp_async_register = { | |||
52 | static int call_home_on_panic(struct notifier_block *self, | 51 | static int call_home_on_panic(struct notifier_block *self, |
53 | unsigned long event, void *data) | 52 | unsigned long event, void *data) |
54 | { | 53 | { |
55 | strncat(data, nodename, strlen(nodename)); | 54 | strncat(data, init_utsname()->nodename, |
56 | sclp_async_send_wait(data); | 55 | sizeof(init_utsname()->nodename)); |
57 | return NOTIFY_DONE; | 56 | sclp_async_send_wait(data); |
57 | return NOTIFY_DONE; | ||
58 | } | 58 | } |
59 | 59 | ||
60 | static struct notifier_block call_home_panic_nb = { | 60 | static struct notifier_block call_home_panic_nb = { |
@@ -68,15 +68,14 @@ static int proc_handler_callhome(struct ctl_table *ctl, int write, | |||
68 | { | 68 | { |
69 | unsigned long val; | 69 | unsigned long val; |
70 | int len, rc; | 70 | int len, rc; |
71 | char buf[2]; | 71 | char buf[3]; |
72 | 72 | ||
73 | if (!*count | (*ppos && !write)) { | 73 | if (!*count || (*ppos && !write)) { |
74 | *count = 0; | 74 | *count = 0; |
75 | return 0; | 75 | return 0; |
76 | } | 76 | } |
77 | if (!write) { | 77 | if (!write) { |
78 | len = sprintf(buf, "%d\n", callhome_enabled); | 78 | len = snprintf(buf, sizeof(buf), "%d\n", callhome_enabled); |
79 | buf[len] = '\0'; | ||
80 | rc = copy_to_user(buffer, buf, sizeof(buf)); | 79 | rc = copy_to_user(buffer, buf, sizeof(buf)); |
81 | if (rc != 0) | 80 | if (rc != 0) |
82 | return -EFAULT; | 81 | return -EFAULT; |
@@ -171,39 +170,29 @@ static int __init sclp_async_init(void) | |||
171 | rc = sclp_register(&sclp_async_register); | 170 | rc = sclp_register(&sclp_async_register); |
172 | if (rc) | 171 | if (rc) |
173 | return rc; | 172 | return rc; |
174 | callhome_sysctl_header = register_sysctl_table(kern_dir_table); | 173 | rc = -EOPNOTSUPP; |
175 | if (!callhome_sysctl_header) { | 174 | if (!(sclp_async_register.sclp_receive_mask & EVTYP_ASYNC_MASK)) |
176 | rc = -ENOMEM; | ||
177 | goto out_sclp; | ||
178 | } | ||
179 | if (!(sclp_async_register.sclp_receive_mask & EVTYP_ASYNC_MASK)) { | ||
180 | rc = -EOPNOTSUPP; | ||
181 | goto out_sclp; | 175 | goto out_sclp; |
182 | } | ||
183 | rc = -ENOMEM; | 176 | rc = -ENOMEM; |
177 | callhome_sysctl_header = register_sysctl_table(kern_dir_table); | ||
178 | if (!callhome_sysctl_header) | ||
179 | goto out_sclp; | ||
184 | request = kzalloc(sizeof(struct sclp_req), GFP_KERNEL); | 180 | request = kzalloc(sizeof(struct sclp_req), GFP_KERNEL); |
185 | if (!request) | ||
186 | goto out_sys; | ||
187 | sccb = (struct sclp_async_sccb *) get_zeroed_page(GFP_KERNEL | GFP_DMA); | 181 | sccb = (struct sclp_async_sccb *) get_zeroed_page(GFP_KERNEL | GFP_DMA); |
188 | if (!sccb) | 182 | if (!request || !sccb) |
189 | goto out_mem; | 183 | goto out_mem; |
190 | rc = atomic_notifier_chain_register(&panic_notifier_list, | 184 | rc = atomic_notifier_chain_register(&panic_notifier_list, |
191 | &call_home_panic_nb); | 185 | &call_home_panic_nb); |
192 | if (rc) | 186 | if (!rc) |
193 | goto out_mem; | 187 | goto out; |
194 | |||
195 | strncpy(nodename, init_utsname()->nodename, 64); | ||
196 | return 0; | ||
197 | |||
198 | out_mem: | 188 | out_mem: |
199 | kfree(request); | 189 | kfree(request); |
200 | free_page((unsigned long) sccb); | 190 | free_page((unsigned long) sccb); |
201 | out_sys: | ||
202 | unregister_sysctl_table(callhome_sysctl_header); | 191 | unregister_sysctl_table(callhome_sysctl_header); |
203 | out_sclp: | 192 | out_sclp: |
204 | sclp_unregister(&sclp_async_register); | 193 | sclp_unregister(&sclp_async_register); |
194 | out: | ||
205 | return rc; | 195 | return rc; |
206 | |||
207 | } | 196 | } |
208 | module_init(sclp_async_init); | 197 | module_init(sclp_async_init); |
209 | 198 | ||
diff --git a/drivers/s390/char/sclp_quiesce.c b/drivers/s390/char/sclp_quiesce.c index 84c191c1cd62..05909a7df8b3 100644 --- a/drivers/s390/char/sclp_quiesce.c +++ b/drivers/s390/char/sclp_quiesce.c | |||
@@ -20,9 +20,12 @@ | |||
20 | 20 | ||
21 | #include "sclp.h" | 21 | #include "sclp.h" |
22 | 22 | ||
23 | static void (*old_machine_restart)(char *); | ||
24 | static void (*old_machine_halt)(void); | ||
25 | static void (*old_machine_power_off)(void); | ||
26 | |||
23 | /* Shutdown handler. Signal completion of shutdown by loading special PSW. */ | 27 | /* Shutdown handler. Signal completion of shutdown by loading special PSW. */ |
24 | static void | 28 | static void do_machine_quiesce(void) |
25 | do_machine_quiesce(void) | ||
26 | { | 29 | { |
27 | psw_t quiesce_psw; | 30 | psw_t quiesce_psw; |
28 | 31 | ||
@@ -33,23 +36,48 @@ do_machine_quiesce(void) | |||
33 | } | 36 | } |
34 | 37 | ||
35 | /* Handler for quiesce event. Start shutdown procedure. */ | 38 | /* Handler for quiesce event. Start shutdown procedure. */ |
36 | static void | 39 | static void sclp_quiesce_handler(struct evbuf_header *evbuf) |
37 | sclp_quiesce_handler(struct evbuf_header *evbuf) | ||
38 | { | 40 | { |
39 | _machine_restart = (void *) do_machine_quiesce; | 41 | if (_machine_restart != (void *) do_machine_quiesce) { |
40 | _machine_halt = do_machine_quiesce; | 42 | old_machine_restart = _machine_restart; |
41 | _machine_power_off = do_machine_quiesce; | 43 | old_machine_halt = _machine_halt; |
44 | old_machine_power_off = _machine_power_off; | ||
45 | _machine_restart = (void *) do_machine_quiesce; | ||
46 | _machine_halt = do_machine_quiesce; | ||
47 | _machine_power_off = do_machine_quiesce; | ||
48 | } | ||
42 | ctrl_alt_del(); | 49 | ctrl_alt_del(); |
43 | } | 50 | } |
44 | 51 | ||
52 | /* Undo machine restart/halt/power_off modification on resume */ | ||
53 | static void sclp_quiesce_pm_event(struct sclp_register *reg, | ||
54 | enum sclp_pm_event sclp_pm_event) | ||
55 | { | ||
56 | switch (sclp_pm_event) { | ||
57 | case SCLP_PM_EVENT_RESTORE: | ||
58 | if (old_machine_restart) { | ||
59 | _machine_restart = old_machine_restart; | ||
60 | _machine_halt = old_machine_halt; | ||
61 | _machine_power_off = old_machine_power_off; | ||
62 | old_machine_restart = NULL; | ||
63 | old_machine_halt = NULL; | ||
64 | old_machine_power_off = NULL; | ||
65 | } | ||
66 | break; | ||
67 | case SCLP_PM_EVENT_FREEZE: | ||
68 | case SCLP_PM_EVENT_THAW: | ||
69 | break; | ||
70 | } | ||
71 | } | ||
72 | |||
45 | static struct sclp_register sclp_quiesce_event = { | 73 | static struct sclp_register sclp_quiesce_event = { |
46 | .receive_mask = EVTYP_SIGQUIESCE_MASK, | 74 | .receive_mask = EVTYP_SIGQUIESCE_MASK, |
47 | .receiver_fn = sclp_quiesce_handler | 75 | .receiver_fn = sclp_quiesce_handler, |
76 | .pm_event_fn = sclp_quiesce_pm_event | ||
48 | }; | 77 | }; |
49 | 78 | ||
50 | /* Initialize quiesce driver. */ | 79 | /* Initialize quiesce driver. */ |
51 | static int __init | 80 | static int __init sclp_quiesce_init(void) |
52 | sclp_quiesce_init(void) | ||
53 | { | 81 | { |
54 | return sclp_register(&sclp_quiesce_event); | 82 | return sclp_register(&sclp_quiesce_event); |
55 | } | 83 | } |
diff --git a/drivers/s390/net/smsgiucv.c b/drivers/s390/net/smsgiucv.c index 102000d1af6f..3012355f8304 100644 --- a/drivers/s390/net/smsgiucv.c +++ b/drivers/s390/net/smsgiucv.c | |||
@@ -158,7 +158,12 @@ static int smsg_pm_restore_thaw(struct device *dev) | |||
158 | smsg_path->flags = 0; | 158 | smsg_path->flags = 0; |
159 | rc = iucv_path_connect(smsg_path, &smsg_handler, "*MSG ", | 159 | rc = iucv_path_connect(smsg_path, &smsg_handler, "*MSG ", |
160 | NULL, NULL, NULL); | 160 | NULL, NULL, NULL); |
161 | printk(KERN_ERR "iucv_path_connect returned with rc %i\n", rc); | 161 | #ifdef CONFIG_PM_DEBUG |
162 | if (rc) | ||
163 | printk(KERN_ERR | ||
164 | "iucv_path_connect returned with rc %i\n", rc); | ||
165 | #endif | ||
166 | cpcmd("SET SMSG IUCV", NULL, 0, NULL); | ||
162 | } | 167 | } |
163 | return 0; | 168 | return 0; |
164 | } | 169 | } |
diff --git a/drivers/s390/scsi/zfcp_aux.c b/drivers/s390/scsi/zfcp_aux.c index 0f79f3af4f54..2889e5f2dfd3 100644 --- a/drivers/s390/scsi/zfcp_aux.c +++ b/drivers/s390/scsi/zfcp_aux.c | |||
@@ -128,12 +128,13 @@ out_ccwdev: | |||
128 | static void __init zfcp_init_device_setup(char *devstr) | 128 | static void __init zfcp_init_device_setup(char *devstr) |
129 | { | 129 | { |
130 | char *token; | 130 | char *token; |
131 | char *str; | 131 | char *str, *str_saved; |
132 | char busid[ZFCP_BUS_ID_SIZE]; | 132 | char busid[ZFCP_BUS_ID_SIZE]; |
133 | u64 wwpn, lun; | 133 | u64 wwpn, lun; |
134 | 134 | ||
135 | /* duplicate devstr and keep the original for sysfs presentation*/ | 135 | /* duplicate devstr and keep the original for sysfs presentation*/ |
136 | str = kmalloc(strlen(devstr) + 1, GFP_KERNEL); | 136 | str_saved = kmalloc(strlen(devstr) + 1, GFP_KERNEL); |
137 | str = str_saved; | ||
137 | if (!str) | 138 | if (!str) |
138 | return; | 139 | return; |
139 | 140 | ||
@@ -152,12 +153,12 @@ static void __init zfcp_init_device_setup(char *devstr) | |||
152 | if (!token || strict_strtoull(token, 0, (unsigned long long *) &lun)) | 153 | if (!token || strict_strtoull(token, 0, (unsigned long long *) &lun)) |
153 | goto err_out; | 154 | goto err_out; |
154 | 155 | ||
155 | kfree(str); | 156 | kfree(str_saved); |
156 | zfcp_init_device_configure(busid, wwpn, lun); | 157 | zfcp_init_device_configure(busid, wwpn, lun); |
157 | return; | 158 | return; |
158 | 159 | ||
159 | err_out: | 160 | err_out: |
160 | kfree(str); | 161 | kfree(str_saved); |
161 | pr_err("%s is not a valid SCSI device\n", devstr); | 162 | pr_err("%s is not a valid SCSI device\n", devstr); |
162 | } | 163 | } |
163 | 164 | ||
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c index 73d366ba31e5..f73e2180f333 100644 --- a/drivers/s390/scsi/zfcp_erp.c +++ b/drivers/s390/scsi/zfcp_erp.c | |||
@@ -858,10 +858,7 @@ static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act) | |||
858 | if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP) | 858 | if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP) |
859 | return zfcp_erp_open_ptp_port(act); | 859 | return zfcp_erp_open_ptp_port(act); |
860 | if (!port->d_id) { | 860 | if (!port->d_id) { |
861 | zfcp_port_get(port); | 861 | zfcp_fc_trigger_did_lookup(port); |
862 | if (!queue_work(adapter->work_queue, | ||
863 | &port->gid_pn_work)) | ||
864 | zfcp_port_put(port); | ||
865 | return ZFCP_ERP_EXIT; | 862 | return ZFCP_ERP_EXIT; |
866 | } | 863 | } |
867 | return zfcp_erp_port_strategy_open_port(act); | 864 | return zfcp_erp_port_strategy_open_port(act); |
@@ -869,12 +866,11 @@ static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act) | |||
869 | case ZFCP_ERP_STEP_PORT_OPENING: | 866 | case ZFCP_ERP_STEP_PORT_OPENING: |
870 | /* D_ID might have changed during open */ | 867 | /* D_ID might have changed during open */ |
871 | if (p_status & ZFCP_STATUS_COMMON_OPEN) { | 868 | if (p_status & ZFCP_STATUS_COMMON_OPEN) { |
872 | if (port->d_id) | 869 | if (!port->d_id) { |
873 | return ZFCP_ERP_SUCCEEDED; | 870 | zfcp_fc_trigger_did_lookup(port); |
874 | else { | 871 | return ZFCP_ERP_EXIT; |
875 | act->step = ZFCP_ERP_STEP_PORT_CLOSING; | ||
876 | return ZFCP_ERP_CONTINUES; | ||
877 | } | 872 | } |
873 | return ZFCP_ERP_SUCCEEDED; | ||
878 | } | 874 | } |
879 | if (port->d_id && !(p_status & ZFCP_STATUS_COMMON_NOESC)) { | 875 | if (port->d_id && !(p_status & ZFCP_STATUS_COMMON_NOESC)) { |
880 | port->d_id = 0; | 876 | port->d_id = 0; |
@@ -889,19 +885,21 @@ static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act) | |||
889 | static int zfcp_erp_port_strategy(struct zfcp_erp_action *erp_action) | 885 | static int zfcp_erp_port_strategy(struct zfcp_erp_action *erp_action) |
890 | { | 886 | { |
891 | struct zfcp_port *port = erp_action->port; | 887 | struct zfcp_port *port = erp_action->port; |
888 | int p_status = atomic_read(&port->status); | ||
892 | 889 | ||
893 | if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_NOESC) | 890 | if ((p_status & ZFCP_STATUS_COMMON_NOESC) && |
891 | !(p_status & ZFCP_STATUS_COMMON_OPEN)) | ||
894 | goto close_init_done; | 892 | goto close_init_done; |
895 | 893 | ||
896 | switch (erp_action->step) { | 894 | switch (erp_action->step) { |
897 | case ZFCP_ERP_STEP_UNINITIALIZED: | 895 | case ZFCP_ERP_STEP_UNINITIALIZED: |
898 | zfcp_erp_port_strategy_clearstati(port); | 896 | zfcp_erp_port_strategy_clearstati(port); |
899 | if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_OPEN) | 897 | if (p_status & ZFCP_STATUS_COMMON_OPEN) |
900 | return zfcp_erp_port_strategy_close(erp_action); | 898 | return zfcp_erp_port_strategy_close(erp_action); |
901 | break; | 899 | break; |
902 | 900 | ||
903 | case ZFCP_ERP_STEP_PORT_CLOSING: | 901 | case ZFCP_ERP_STEP_PORT_CLOSING: |
904 | if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_OPEN) | 902 | if (p_status & ZFCP_STATUS_COMMON_OPEN) |
905 | return ZFCP_ERP_FAILED; | 903 | return ZFCP_ERP_FAILED; |
906 | break; | 904 | break; |
907 | } | 905 | } |
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h index 629edec70405..b3f28deb4505 100644 --- a/drivers/s390/scsi/zfcp_ext.h +++ b/drivers/s390/scsi/zfcp_ext.h | |||
@@ -96,6 +96,7 @@ extern int zfcp_fc_scan_ports(struct zfcp_adapter *); | |||
96 | extern void _zfcp_fc_scan_ports_later(struct work_struct *); | 96 | extern void _zfcp_fc_scan_ports_later(struct work_struct *); |
97 | extern void zfcp_fc_incoming_els(struct zfcp_fsf_req *); | 97 | extern void zfcp_fc_incoming_els(struct zfcp_fsf_req *); |
98 | extern void zfcp_fc_port_did_lookup(struct work_struct *); | 98 | extern void zfcp_fc_port_did_lookup(struct work_struct *); |
99 | extern void zfcp_fc_trigger_did_lookup(struct zfcp_port *); | ||
99 | extern void zfcp_fc_plogi_evaluate(struct zfcp_port *, struct fsf_plogi *); | 100 | extern void zfcp_fc_plogi_evaluate(struct zfcp_port *, struct fsf_plogi *); |
100 | extern void zfcp_fc_test_link(struct zfcp_port *); | 101 | extern void zfcp_fc_test_link(struct zfcp_port *); |
101 | extern void zfcp_fc_link_test_work(struct work_struct *); | 102 | extern void zfcp_fc_link_test_work(struct work_struct *); |
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c index 722f22de8753..df23bcead23d 100644 --- a/drivers/s390/scsi/zfcp_fc.c +++ b/drivers/s390/scsi/zfcp_fc.c | |||
@@ -361,6 +361,17 @@ out: | |||
361 | } | 361 | } |
362 | 362 | ||
363 | /** | 363 | /** |
364 | * zfcp_fc_trigger_did_lookup - trigger the d_id lookup using a GID_PN request | ||
365 | * @port: The zfcp_port to lookup the d_id for. | ||
366 | */ | ||
367 | void zfcp_fc_trigger_did_lookup(struct zfcp_port *port) | ||
368 | { | ||
369 | zfcp_port_get(port); | ||
370 | if (!queue_work(port->adapter->work_queue, &port->gid_pn_work)) | ||
371 | zfcp_port_put(port); | ||
372 | } | ||
373 | |||
374 | /** | ||
364 | * zfcp_fc_plogi_evaluate - evaluate PLOGI playload | 375 | * zfcp_fc_plogi_evaluate - evaluate PLOGI playload |
365 | * @port: zfcp_port structure | 376 | * @port: zfcp_port structure |
366 | * @plogi: plogi payload | 377 | * @plogi: plogi payload |
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c index 38a7e4a6b639..4e41baa0c141 100644 --- a/drivers/s390/scsi/zfcp_fsf.c +++ b/drivers/s390/scsi/zfcp_fsf.c | |||
@@ -1079,7 +1079,7 @@ static int zfcp_fsf_setup_ct_els(struct zfcp_fsf_req *req, | |||
1079 | /* common settings for ct/gs and els requests */ | 1079 | /* common settings for ct/gs and els requests */ |
1080 | req->qtcb->bottom.support.service_class = FSF_CLASS_3; | 1080 | req->qtcb->bottom.support.service_class = FSF_CLASS_3; |
1081 | req->qtcb->bottom.support.timeout = 2 * R_A_TOV; | 1081 | req->qtcb->bottom.support.timeout = 2 * R_A_TOV; |
1082 | zfcp_fsf_start_timer(req, 2 * R_A_TOV + 10); | 1082 | zfcp_fsf_start_timer(req, (2 * R_A_TOV + 10) * HZ); |
1083 | 1083 | ||
1084 | return 0; | 1084 | return 0; |
1085 | } | 1085 | } |
@@ -1475,9 +1475,16 @@ static void zfcp_fsf_open_port_handler(struct zfcp_fsf_req *req) | |||
1475 | plogi = (struct fsf_plogi *) req->qtcb->bottom.support.els; | 1475 | plogi = (struct fsf_plogi *) req->qtcb->bottom.support.els; |
1476 | if (req->qtcb->bottom.support.els1_length >= | 1476 | if (req->qtcb->bottom.support.els1_length >= |
1477 | FSF_PLOGI_MIN_LEN) { | 1477 | FSF_PLOGI_MIN_LEN) { |
1478 | if (plogi->serv_param.wwpn != port->wwpn) | 1478 | if (plogi->serv_param.wwpn != port->wwpn) { |
1479 | port->d_id = 0; | 1479 | port->d_id = 0; |
1480 | else { | 1480 | dev_warn(&port->adapter->ccw_device->dev, |
1481 | "A port opened with WWPN 0x%016Lx " | ||
1482 | "returned data that identifies it as " | ||
1483 | "WWPN 0x%016Lx\n", | ||
1484 | (unsigned long long) port->wwpn, | ||
1485 | (unsigned long long) | ||
1486 | plogi->serv_param.wwpn); | ||
1487 | } else { | ||
1481 | port->wwnn = plogi->serv_param.wwnn; | 1488 | port->wwnn = plogi->serv_param.wwnn; |
1482 | zfcp_fc_plogi_evaluate(port, plogi); | 1489 | zfcp_fc_plogi_evaluate(port, plogi); |
1483 | } | 1490 | } |
diff --git a/drivers/s390/scsi/zfcp_sysfs.c b/drivers/s390/scsi/zfcp_sysfs.c index 079a8cf518a3..d31000886ca8 100644 --- a/drivers/s390/scsi/zfcp_sysfs.c +++ b/drivers/s390/scsi/zfcp_sysfs.c | |||
@@ -224,6 +224,7 @@ static ssize_t zfcp_sysfs_unit_add_store(struct device *dev, | |||
224 | 224 | ||
225 | zfcp_erp_unit_reopen(unit, 0, "syuas_1", NULL); | 225 | zfcp_erp_unit_reopen(unit, 0, "syuas_1", NULL); |
226 | zfcp_erp_wait(unit->port->adapter); | 226 | zfcp_erp_wait(unit->port->adapter); |
227 | flush_work(&unit->scsi_work); | ||
227 | zfcp_unit_put(unit); | 228 | zfcp_unit_put(unit); |
228 | out: | 229 | out: |
229 | mutex_unlock(&zfcp_data.config_mutex); | 230 | mutex_unlock(&zfcp_data.config_mutex); |
diff --git a/drivers/scsi/bfa/bfad_fwimg.c b/drivers/scsi/bfa/bfad_fwimg.c index b2f6949bc8d3..bd34b0db2d6b 100644 --- a/drivers/scsi/bfa/bfad_fwimg.c +++ b/drivers/scsi/bfa/bfad_fwimg.c | |||
@@ -41,6 +41,8 @@ u32 *bfi_image_cb; | |||
41 | 41 | ||
42 | #define BFAD_FW_FILE_CT "ctfw.bin" | 42 | #define BFAD_FW_FILE_CT "ctfw.bin" |
43 | #define BFAD_FW_FILE_CB "cbfw.bin" | 43 | #define BFAD_FW_FILE_CB "cbfw.bin" |
44 | MODULE_FIRMWARE(BFAD_FW_FILE_CT); | ||
45 | MODULE_FIRMWARE(BFAD_FW_FILE_CB); | ||
44 | 46 | ||
45 | u32 * | 47 | u32 * |
46 | bfad_read_firmware(struct pci_dev *pdev, u32 **bfi_image, | 48 | bfad_read_firmware(struct pci_dev *pdev, u32 **bfi_image, |
diff --git a/drivers/scsi/bfa/bfad_im.c b/drivers/scsi/bfa/bfad_im.c index 158c99243c08..55d012a9a668 100644 --- a/drivers/scsi/bfa/bfad_im.c +++ b/drivers/scsi/bfa/bfad_im.c | |||
@@ -948,7 +948,7 @@ bfad_os_fc_host_init(struct bfad_im_port_s *im_port) | |||
948 | if (bfad_supported_fc4s & (BFA_PORT_ROLE_FCP_IM | BFA_PORT_ROLE_FCP_TM)) | 948 | if (bfad_supported_fc4s & (BFA_PORT_ROLE_FCP_IM | BFA_PORT_ROLE_FCP_TM)) |
949 | /* For FCP type 0x08 */ | 949 | /* For FCP type 0x08 */ |
950 | fc_host_supported_fc4s(host)[2] = 1; | 950 | fc_host_supported_fc4s(host)[2] = 1; |
951 | if (bfad_supported_fc4s | BFA_PORT_ROLE_FCP_IPFC) | 951 | if (bfad_supported_fc4s & BFA_PORT_ROLE_FCP_IPFC) |
952 | /* For LLC/SNAP type 0x05 */ | 952 | /* For LLC/SNAP type 0x05 */ |
953 | fc_host_supported_fc4s(host)[3] = 0x20; | 953 | fc_host_supported_fc4s(host)[3] = 0x20; |
954 | /* For fibre channel services type 0x20 */ | 954 | /* For fibre channel services type 0x20 */ |
diff --git a/drivers/scsi/dpt_i2o.c b/drivers/scsi/dpt_i2o.c index b6af63ca980b..496764349c41 100644 --- a/drivers/scsi/dpt_i2o.c +++ b/drivers/scsi/dpt_i2o.c | |||
@@ -1918,6 +1918,10 @@ static int adpt_i2o_passthru(adpt_hba* pHba, u32 __user *arg) | |||
1918 | } | 1918 | } |
1919 | size = size>>16; | 1919 | size = size>>16; |
1920 | size *= 4; | 1920 | size *= 4; |
1921 | if (size > MAX_MESSAGE_SIZE) { | ||
1922 | rcode = -EINVAL; | ||
1923 | goto cleanup; | ||
1924 | } | ||
1921 | /* Copy in the user's I2O command */ | 1925 | /* Copy in the user's I2O command */ |
1922 | if (copy_from_user (msg, user_msg, size)) { | 1926 | if (copy_from_user (msg, user_msg, size)) { |
1923 | rcode = -EFAULT; | 1927 | rcode = -EFAULT; |
diff --git a/drivers/scsi/gdth.c b/drivers/scsi/gdth.c index 185e6bc4dd40..9e8fce0f0c1b 100644 --- a/drivers/scsi/gdth.c +++ b/drivers/scsi/gdth.c | |||
@@ -2900,7 +2900,7 @@ static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr) | |||
2900 | eindex = handle; | 2900 | eindex = handle; |
2901 | estr->event_source = 0; | 2901 | estr->event_source = 0; |
2902 | 2902 | ||
2903 | if (eindex >= MAX_EVENTS) { | 2903 | if (eindex < 0 || eindex >= MAX_EVENTS) { |
2904 | spin_unlock_irqrestore(&ha->smp_lock, flags); | 2904 | spin_unlock_irqrestore(&ha->smp_lock, flags); |
2905 | return eindex; | 2905 | return eindex; |
2906 | } | 2906 | } |
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c index 5f045505a1f4..76d294fc7846 100644 --- a/drivers/scsi/ipr.c +++ b/drivers/scsi/ipr.c | |||
@@ -4189,6 +4189,25 @@ static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg, | |||
4189 | } | 4189 | } |
4190 | 4190 | ||
4191 | /** | 4191 | /** |
4192 | * ipr_isr_eh - Interrupt service routine error handler | ||
4193 | * @ioa_cfg: ioa config struct | ||
4194 | * @msg: message to log | ||
4195 | * | ||
4196 | * Return value: | ||
4197 | * none | ||
4198 | **/ | ||
4199 | static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg) | ||
4200 | { | ||
4201 | ioa_cfg->errors_logged++; | ||
4202 | dev_err(&ioa_cfg->pdev->dev, "%s\n", msg); | ||
4203 | |||
4204 | if (WAIT_FOR_DUMP == ioa_cfg->sdt_state) | ||
4205 | ioa_cfg->sdt_state = GET_DUMP; | ||
4206 | |||
4207 | ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE); | ||
4208 | } | ||
4209 | |||
4210 | /** | ||
4192 | * ipr_isr - Interrupt service routine | 4211 | * ipr_isr - Interrupt service routine |
4193 | * @irq: irq number | 4212 | * @irq: irq number |
4194 | * @devp: pointer to ioa config struct | 4213 | * @devp: pointer to ioa config struct |
@@ -4203,6 +4222,7 @@ static irqreturn_t ipr_isr(int irq, void *devp) | |||
4203 | volatile u32 int_reg, int_mask_reg; | 4222 | volatile u32 int_reg, int_mask_reg; |
4204 | u32 ioasc; | 4223 | u32 ioasc; |
4205 | u16 cmd_index; | 4224 | u16 cmd_index; |
4225 | int num_hrrq = 0; | ||
4206 | struct ipr_cmnd *ipr_cmd; | 4226 | struct ipr_cmnd *ipr_cmd; |
4207 | irqreturn_t rc = IRQ_NONE; | 4227 | irqreturn_t rc = IRQ_NONE; |
4208 | 4228 | ||
@@ -4233,13 +4253,7 @@ static irqreturn_t ipr_isr(int irq, void *devp) | |||
4233 | IPR_HRRQ_REQ_RESP_HANDLE_MASK) >> IPR_HRRQ_REQ_RESP_HANDLE_SHIFT; | 4253 | IPR_HRRQ_REQ_RESP_HANDLE_MASK) >> IPR_HRRQ_REQ_RESP_HANDLE_SHIFT; |
4234 | 4254 | ||
4235 | if (unlikely(cmd_index >= IPR_NUM_CMD_BLKS)) { | 4255 | if (unlikely(cmd_index >= IPR_NUM_CMD_BLKS)) { |
4236 | ioa_cfg->errors_logged++; | 4256 | ipr_isr_eh(ioa_cfg, "Invalid response handle from IOA"); |
4237 | dev_err(&ioa_cfg->pdev->dev, "Invalid response handle from IOA\n"); | ||
4238 | |||
4239 | if (WAIT_FOR_DUMP == ioa_cfg->sdt_state) | ||
4240 | ioa_cfg->sdt_state = GET_DUMP; | ||
4241 | |||
4242 | ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE); | ||
4243 | spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); | 4257 | spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); |
4244 | return IRQ_HANDLED; | 4258 | return IRQ_HANDLED; |
4245 | } | 4259 | } |
@@ -4266,8 +4280,18 @@ static irqreturn_t ipr_isr(int irq, void *devp) | |||
4266 | 4280 | ||
4267 | if (ipr_cmd != NULL) { | 4281 | if (ipr_cmd != NULL) { |
4268 | /* Clear the PCI interrupt */ | 4282 | /* Clear the PCI interrupt */ |
4269 | writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg); | 4283 | do { |
4270 | int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg; | 4284 | writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg); |
4285 | int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg; | ||
4286 | } while (int_reg & IPR_PCII_HRRQ_UPDATED && | ||
4287 | num_hrrq++ < IPR_MAX_HRRQ_RETRIES); | ||
4288 | |||
4289 | if (int_reg & IPR_PCII_HRRQ_UPDATED) { | ||
4290 | ipr_isr_eh(ioa_cfg, "Error clearing HRRQ"); | ||
4291 | spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); | ||
4292 | return IRQ_HANDLED; | ||
4293 | } | ||
4294 | |||
4271 | } else | 4295 | } else |
4272 | break; | 4296 | break; |
4273 | } | 4297 | } |
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h index 163245a1c3e5..19bbcf39f0c9 100644 --- a/drivers/scsi/ipr.h +++ b/drivers/scsi/ipr.h | |||
@@ -144,6 +144,7 @@ | |||
144 | #define IPR_IOA_MAX_SECTORS 32767 | 144 | #define IPR_IOA_MAX_SECTORS 32767 |
145 | #define IPR_VSET_MAX_SECTORS 512 | 145 | #define IPR_VSET_MAX_SECTORS 512 |
146 | #define IPR_MAX_CDB_LEN 16 | 146 | #define IPR_MAX_CDB_LEN 16 |
147 | #define IPR_MAX_HRRQ_RETRIES 3 | ||
147 | 148 | ||
148 | #define IPR_DEFAULT_BUS_WIDTH 16 | 149 | #define IPR_DEFAULT_BUS_WIDTH 16 |
149 | #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8)) | 150 | #define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8)) |
diff --git a/drivers/scsi/libsas/sas_expander.c b/drivers/scsi/libsas/sas_expander.c index b3381959acce..33cf988c8c8a 100644 --- a/drivers/scsi/libsas/sas_expander.c +++ b/drivers/scsi/libsas/sas_expander.c | |||
@@ -960,7 +960,6 @@ static int sas_ex_discover_dev(struct domain_device *dev, int phy_id) | |||
960 | 960 | ||
961 | } | 961 | } |
962 | } | 962 | } |
963 | res = 0; | ||
964 | } | 963 | } |
965 | 964 | ||
966 | return res; | 965 | return res; |
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c index f7c70e2a8224..0a97bc9074bb 100644 --- a/drivers/scsi/pmcraid.c +++ b/drivers/scsi/pmcraid.c | |||
@@ -1071,7 +1071,7 @@ static struct pmcraid_cmd *pmcraid_init_hcam | |||
1071 | 1071 | ||
1072 | ioarcb->data_transfer_length = cpu_to_le32(rcb_size); | 1072 | ioarcb->data_transfer_length = cpu_to_le32(rcb_size); |
1073 | 1073 | ||
1074 | ioadl[0].flags |= cpu_to_le32(IOADL_FLAGS_READ_LAST); | 1074 | ioadl[0].flags |= IOADL_FLAGS_READ_LAST; |
1075 | ioadl[0].data_len = cpu_to_le32(rcb_size); | 1075 | ioadl[0].data_len = cpu_to_le32(rcb_size); |
1076 | ioadl[0].address = cpu_to_le32(dma); | 1076 | ioadl[0].address = cpu_to_le32(dma); |
1077 | 1077 | ||
@@ -2251,7 +2251,7 @@ static void pmcraid_request_sense(struct pmcraid_cmd *cmd) | |||
2251 | 2251 | ||
2252 | ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); | 2252 | ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); |
2253 | ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); | 2253 | ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); |
2254 | ioadl->flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); | 2254 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
2255 | 2255 | ||
2256 | /* request sense might be called as part of error response processing | 2256 | /* request sense might be called as part of error response processing |
2257 | * which runs in tasklets context. It is possible that mid-layer might | 2257 | * which runs in tasklets context. It is possible that mid-layer might |
@@ -3017,7 +3017,7 @@ static int pmcraid_build_ioadl( | |||
3017 | ioadl[i].flags = 0; | 3017 | ioadl[i].flags = 0; |
3018 | } | 3018 | } |
3019 | /* setup last descriptor */ | 3019 | /* setup last descriptor */ |
3020 | ioadl[i - 1].flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); | 3020 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
3021 | 3021 | ||
3022 | return 0; | 3022 | return 0; |
3023 | } | 3023 | } |
@@ -3387,7 +3387,7 @@ static int pmcraid_build_passthrough_ioadls( | |||
3387 | } | 3387 | } |
3388 | 3388 | ||
3389 | /* setup the last descriptor */ | 3389 | /* setup the last descriptor */ |
3390 | ioadl[i - 1].flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); | 3390 | ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC; |
3391 | 3391 | ||
3392 | return 0; | 3392 | return 0; |
3393 | } | 3393 | } |
@@ -5314,7 +5314,7 @@ static void pmcraid_querycfg(struct pmcraid_cmd *cmd) | |||
5314 | cpu_to_le32(sizeof(struct pmcraid_config_table)); | 5314 | cpu_to_le32(sizeof(struct pmcraid_config_table)); |
5315 | 5315 | ||
5316 | ioadl = &(ioarcb->add_data.u.ioadl[0]); | 5316 | ioadl = &(ioarcb->add_data.u.ioadl[0]); |
5317 | ioadl->flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); | 5317 | ioadl->flags = IOADL_FLAGS_LAST_DESC; |
5318 | ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); | 5318 | ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); |
5319 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); | 5319 | ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); |
5320 | 5320 | ||
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c index c44783801402..0547a7f44d42 100644 --- a/drivers/scsi/scsi_scan.c +++ b/drivers/scsi/scsi_scan.c | |||
@@ -317,6 +317,7 @@ static struct scsi_device *scsi_alloc_sdev(struct scsi_target *starget, | |||
317 | out_device_destroy: | 317 | out_device_destroy: |
318 | scsi_device_set_state(sdev, SDEV_DEL); | 318 | scsi_device_set_state(sdev, SDEV_DEL); |
319 | transport_destroy_device(&sdev->sdev_gendev); | 319 | transport_destroy_device(&sdev->sdev_gendev); |
320 | put_device(&sdev->sdev_dev); | ||
320 | put_device(&sdev->sdev_gendev); | 321 | put_device(&sdev->sdev_gendev); |
321 | out: | 322 | out: |
322 | if (display_failure_msg) | 323 | if (display_failure_msg) |
@@ -957,6 +958,7 @@ static inline void scsi_destroy_sdev(struct scsi_device *sdev) | |||
957 | if (sdev->host->hostt->slave_destroy) | 958 | if (sdev->host->hostt->slave_destroy) |
958 | sdev->host->hostt->slave_destroy(sdev); | 959 | sdev->host->hostt->slave_destroy(sdev); |
959 | transport_destroy_device(&sdev->sdev_gendev); | 960 | transport_destroy_device(&sdev->sdev_gendev); |
961 | put_device(&sdev->sdev_dev); | ||
960 | put_device(&sdev->sdev_gendev); | 962 | put_device(&sdev->sdev_gendev); |
961 | } | 963 | } |
962 | 964 | ||
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c index fde54537d715..5c7eb63a19d1 100644 --- a/drivers/scsi/scsi_sysfs.c +++ b/drivers/scsi/scsi_sysfs.c | |||
@@ -864,10 +864,6 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev) | |||
864 | goto clean_device; | 864 | goto clean_device; |
865 | } | 865 | } |
866 | 866 | ||
867 | /* take a reference for the sdev_dev; this is | ||
868 | * released by the sdev_class .release */ | ||
869 | get_device(&sdev->sdev_gendev); | ||
870 | |||
871 | /* create queue files, which may be writable, depending on the host */ | 867 | /* create queue files, which may be writable, depending on the host */ |
872 | if (sdev->host->hostt->change_queue_depth) | 868 | if (sdev->host->hostt->change_queue_depth) |
873 | error = device_create_file(&sdev->sdev_gendev, &sdev_attr_queue_depth_rw); | 869 | error = device_create_file(&sdev->sdev_gendev, &sdev_attr_queue_depth_rw); |
@@ -917,6 +913,7 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev) | |||
917 | 913 | ||
918 | device_del(&sdev->sdev_gendev); | 914 | device_del(&sdev->sdev_gendev); |
919 | transport_destroy_device(&sdev->sdev_gendev); | 915 | transport_destroy_device(&sdev->sdev_gendev); |
916 | put_device(&sdev->sdev_dev); | ||
920 | put_device(&sdev->sdev_gendev); | 917 | put_device(&sdev->sdev_gendev); |
921 | 918 | ||
922 | return error; | 919 | return error; |
@@ -1065,7 +1062,7 @@ void scsi_sysfs_device_initialize(struct scsi_device *sdev) | |||
1065 | sdev->host->host_no, sdev->channel, sdev->id, sdev->lun); | 1062 | sdev->host->host_no, sdev->channel, sdev->id, sdev->lun); |
1066 | 1063 | ||
1067 | device_initialize(&sdev->sdev_dev); | 1064 | device_initialize(&sdev->sdev_dev); |
1068 | sdev->sdev_dev.parent = &sdev->sdev_gendev; | 1065 | sdev->sdev_dev.parent = get_device(&sdev->sdev_gendev); |
1069 | sdev->sdev_dev.class = &sdev_class; | 1066 | sdev->sdev_dev.class = &sdev_class; |
1070 | dev_set_name(&sdev->sdev_dev, "%d:%d:%d:%d", | 1067 | dev_set_name(&sdev->sdev_dev, "%d:%d:%d:%d", |
1071 | sdev->host->host_no, sdev->channel, sdev->id, sdev->lun); | 1068 | sdev->host->host_no, sdev->channel, sdev->id, sdev->lun); |
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c index a67fed10598a..c6f70dae9b2e 100644 --- a/drivers/scsi/scsi_transport_fc.c +++ b/drivers/scsi/scsi_transport_fc.c | |||
@@ -3656,6 +3656,7 @@ fc_bsg_host_dispatch(struct request_queue *q, struct Scsi_Host *shost, | |||
3656 | fail_host_msg: | 3656 | fail_host_msg: |
3657 | /* return the errno failure code as the only status */ | 3657 | /* return the errno failure code as the only status */ |
3658 | BUG_ON(job->reply_len < sizeof(uint32_t)); | 3658 | BUG_ON(job->reply_len < sizeof(uint32_t)); |
3659 | job->reply->reply_payload_rcv_len = 0; | ||
3659 | job->reply->result = ret; | 3660 | job->reply->result = ret; |
3660 | job->reply_len = sizeof(uint32_t); | 3661 | job->reply_len = sizeof(uint32_t); |
3661 | fc_bsg_jobdone(job); | 3662 | fc_bsg_jobdone(job); |
@@ -3741,6 +3742,7 @@ check_bidi: | |||
3741 | fail_rport_msg: | 3742 | fail_rport_msg: |
3742 | /* return the errno failure code as the only status */ | 3743 | /* return the errno failure code as the only status */ |
3743 | BUG_ON(job->reply_len < sizeof(uint32_t)); | 3744 | BUG_ON(job->reply_len < sizeof(uint32_t)); |
3745 | job->reply->reply_payload_rcv_len = 0; | ||
3744 | job->reply->result = ret; | 3746 | job->reply->result = ret; |
3745 | job->reply_len = sizeof(uint32_t); | 3747 | job->reply_len = sizeof(uint32_t); |
3746 | fc_bsg_jobdone(job); | 3748 | fc_bsg_jobdone(job); |
@@ -3797,6 +3799,7 @@ fc_bsg_request_handler(struct request_queue *q, struct Scsi_Host *shost, | |||
3797 | /* check if we have the msgcode value at least */ | 3799 | /* check if we have the msgcode value at least */ |
3798 | if (job->request_len < sizeof(uint32_t)) { | 3800 | if (job->request_len < sizeof(uint32_t)) { |
3799 | BUG_ON(job->reply_len < sizeof(uint32_t)); | 3801 | BUG_ON(job->reply_len < sizeof(uint32_t)); |
3802 | job->reply->reply_payload_rcv_len = 0; | ||
3800 | job->reply->result = -ENOMSG; | 3803 | job->reply->result = -ENOMSG; |
3801 | job->reply_len = sizeof(uint32_t); | 3804 | job->reply_len = sizeof(uint32_t); |
3802 | fc_bsg_jobdone(job); | 3805 | fc_bsg_jobdone(job); |
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c index b1ae774016f1..737b4c960971 100644 --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c | |||
@@ -1089,7 +1089,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags) | |||
1089 | if (!up->port.iobase && !up->port.mapbase && !up->port.membase) | 1089 | if (!up->port.iobase && !up->port.mapbase && !up->port.membase) |
1090 | return; | 1090 | return; |
1091 | 1091 | ||
1092 | DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ", | 1092 | DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ", |
1093 | serial_index(&up->port), up->port.iobase, up->port.membase); | 1093 | serial_index(&up->port), up->port.iobase, up->port.membase); |
1094 | 1094 | ||
1095 | /* | 1095 | /* |
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c index e7108e75653d..b28af13c45a1 100644 --- a/drivers/serial/8250_pci.c +++ b/drivers/serial/8250_pci.c | |||
@@ -1561,11 +1561,16 @@ enum pci_board_num_t { | |||
1561 | pbn_exar_XR17C152, | 1561 | pbn_exar_XR17C152, |
1562 | pbn_exar_XR17C154, | 1562 | pbn_exar_XR17C154, |
1563 | pbn_exar_XR17C158, | 1563 | pbn_exar_XR17C158, |
1564 | pbn_exar_ibm_saturn, | ||
1564 | pbn_pasemi_1682M, | 1565 | pbn_pasemi_1682M, |
1565 | pbn_ni8430_2, | 1566 | pbn_ni8430_2, |
1566 | pbn_ni8430_4, | 1567 | pbn_ni8430_4, |
1567 | pbn_ni8430_8, | 1568 | pbn_ni8430_8, |
1568 | pbn_ni8430_16, | 1569 | pbn_ni8430_16, |
1570 | pbn_ADDIDATA_PCIe_1_3906250, | ||
1571 | pbn_ADDIDATA_PCIe_2_3906250, | ||
1572 | pbn_ADDIDATA_PCIe_4_3906250, | ||
1573 | pbn_ADDIDATA_PCIe_8_3906250, | ||
1569 | }; | 1574 | }; |
1570 | 1575 | ||
1571 | /* | 1576 | /* |
@@ -2146,6 +2151,13 @@ static struct pciserial_board pci_boards[] __devinitdata = { | |||
2146 | .base_baud = 921600, | 2151 | .base_baud = 921600, |
2147 | .uart_offset = 0x200, | 2152 | .uart_offset = 0x200, |
2148 | }, | 2153 | }, |
2154 | [pbn_exar_ibm_saturn] = { | ||
2155 | .flags = FL_BASE0, | ||
2156 | .num_ports = 1, | ||
2157 | .base_baud = 921600, | ||
2158 | .uart_offset = 0x200, | ||
2159 | }, | ||
2160 | |||
2149 | /* | 2161 | /* |
2150 | * PA Semi PWRficient PA6T-1682M on-chip UART | 2162 | * PA Semi PWRficient PA6T-1682M on-chip UART |
2151 | */ | 2163 | */ |
@@ -2185,6 +2197,37 @@ static struct pciserial_board pci_boards[] __devinitdata = { | |||
2185 | .uart_offset = 0x10, | 2197 | .uart_offset = 0x10, |
2186 | .first_offset = 0x800, | 2198 | .first_offset = 0x800, |
2187 | }, | 2199 | }, |
2200 | /* | ||
2201 | * ADDI-DATA GmbH PCI-Express communication cards <info@addi-data.com> | ||
2202 | */ | ||
2203 | [pbn_ADDIDATA_PCIe_1_3906250] = { | ||
2204 | .flags = FL_BASE0, | ||
2205 | .num_ports = 1, | ||
2206 | .base_baud = 3906250, | ||
2207 | .uart_offset = 0x200, | ||
2208 | .first_offset = 0x1000, | ||
2209 | }, | ||
2210 | [pbn_ADDIDATA_PCIe_2_3906250] = { | ||
2211 | .flags = FL_BASE0, | ||
2212 | .num_ports = 2, | ||
2213 | .base_baud = 3906250, | ||
2214 | .uart_offset = 0x200, | ||
2215 | .first_offset = 0x1000, | ||
2216 | }, | ||
2217 | [pbn_ADDIDATA_PCIe_4_3906250] = { | ||
2218 | .flags = FL_BASE0, | ||
2219 | .num_ports = 4, | ||
2220 | .base_baud = 3906250, | ||
2221 | .uart_offset = 0x200, | ||
2222 | .first_offset = 0x1000, | ||
2223 | }, | ||
2224 | [pbn_ADDIDATA_PCIe_8_3906250] = { | ||
2225 | .flags = FL_BASE0, | ||
2226 | .num_ports = 8, | ||
2227 | .base_baud = 3906250, | ||
2228 | .uart_offset = 0x200, | ||
2229 | .first_offset = 0x1000, | ||
2230 | }, | ||
2188 | }; | 2231 | }; |
2189 | 2232 | ||
2190 | static const struct pci_device_id softmodem_blacklist[] = { | 2233 | static const struct pci_device_id softmodem_blacklist[] = { |
@@ -2340,7 +2383,7 @@ pciserial_init_ports(struct pci_dev *dev, const struct pciserial_board *board) | |||
2340 | break; | 2383 | break; |
2341 | 2384 | ||
2342 | #ifdef SERIAL_DEBUG_PCI | 2385 | #ifdef SERIAL_DEBUG_PCI |
2343 | printk(KERN_DEBUG "Setup PCI port: port %x, irq %d, type %d\n", | 2386 | printk(KERN_DEBUG "Setup PCI port: port %lx, irq %d, type %d\n", |
2344 | serial_port.iobase, serial_port.irq, serial_port.iotype); | 2387 | serial_port.iobase, serial_port.irq, serial_port.iotype); |
2345 | #endif | 2388 | #endif |
2346 | 2389 | ||
@@ -2649,6 +2692,9 @@ static struct pci_device_id serial_pci_tbl[] = { | |||
2649 | PCI_SUBVENDOR_ID_CONNECT_TECH, | 2692 | PCI_SUBVENDOR_ID_CONNECT_TECH, |
2650 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0, | 2693 | PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0, |
2651 | pbn_b0_8_1843200_200 }, | 2694 | pbn_b0_8_1843200_200 }, |
2695 | { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152, | ||
2696 | PCI_VENDOR_ID_IBM, PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT, | ||
2697 | 0, 0, pbn_exar_ibm_saturn }, | ||
2652 | 2698 | ||
2653 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530, | 2699 | { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530, |
2654 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 2700 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
@@ -3093,6 +3139,12 @@ static struct pci_device_id serial_pci_tbl[] = { | |||
3093 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B, | 3139 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B, |
3094 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 3140 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
3095 | pbn_b0_bt_2_115200 }, | 3141 | pbn_b0_bt_2_115200 }, |
3142 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_A, | ||
3143 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
3144 | pbn_b0_bt_2_115200 }, | ||
3145 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_B, | ||
3146 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | ||
3147 | pbn_b0_bt_2_115200 }, | ||
3096 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, | 3148 | { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, |
3097 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, | 3149 | PCI_ANY_ID, PCI_ANY_ID, 0, 0, |
3098 | pbn_b0_bt_4_460800 }, | 3150 | pbn_b0_bt_4_460800 }, |
@@ -3556,6 +3608,38 @@ static struct pci_device_id serial_pci_tbl[] = { | |||
3556 | 0, | 3608 | 0, |
3557 | pbn_b0_8_115200 }, | 3609 | pbn_b0_8_115200 }, |
3558 | 3610 | ||
3611 | { PCI_VENDOR_ID_ADDIDATA, | ||
3612 | PCI_DEVICE_ID_ADDIDATA_APCIe7500, | ||
3613 | PCI_ANY_ID, | ||
3614 | PCI_ANY_ID, | ||
3615 | 0, | ||
3616 | 0, | ||
3617 | pbn_ADDIDATA_PCIe_4_3906250 }, | ||
3618 | |||
3619 | { PCI_VENDOR_ID_ADDIDATA, | ||
3620 | PCI_DEVICE_ID_ADDIDATA_APCIe7420, | ||
3621 | PCI_ANY_ID, | ||
3622 | PCI_ANY_ID, | ||
3623 | 0, | ||
3624 | 0, | ||
3625 | pbn_ADDIDATA_PCIe_2_3906250 }, | ||
3626 | |||
3627 | { PCI_VENDOR_ID_ADDIDATA, | ||
3628 | PCI_DEVICE_ID_ADDIDATA_APCIe7300, | ||
3629 | PCI_ANY_ID, | ||
3630 | PCI_ANY_ID, | ||
3631 | 0, | ||
3632 | 0, | ||
3633 | pbn_ADDIDATA_PCIe_1_3906250 }, | ||
3634 | |||
3635 | { PCI_VENDOR_ID_ADDIDATA, | ||
3636 | PCI_DEVICE_ID_ADDIDATA_APCIe7800, | ||
3637 | PCI_ANY_ID, | ||
3638 | PCI_ANY_ID, | ||
3639 | 0, | ||
3640 | 0, | ||
3641 | pbn_ADDIDATA_PCIe_8_3906250 }, | ||
3642 | |||
3559 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835, | 3643 | { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835, |
3560 | PCI_VENDOR_ID_IBM, 0x0299, | 3644 | PCI_VENDOR_ID_IBM, 0x0299, |
3561 | 0, 0, pbn_b0_bt_2_115200 }, | 3645 | 0, 0, pbn_b0_bt_2_115200 }, |
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c index 3551c5cb7094..9d948bccafaf 100644 --- a/drivers/serial/atmel_serial.c +++ b/drivers/serial/atmel_serial.c | |||
@@ -1531,7 +1531,7 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev) | |||
1531 | void *data; | 1531 | void *data; |
1532 | int ret; | 1532 | int ret; |
1533 | 1533 | ||
1534 | BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE)); | 1534 | BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1)); |
1535 | 1535 | ||
1536 | port = &atmel_ports[pdev->id]; | 1536 | port = &atmel_ports[pdev->id]; |
1537 | port->backup_imr = 0; | 1537 | port->backup_imr = 0; |
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index d7bcd074d383..7ce9e9f567a3 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
@@ -705,7 +705,7 @@ mpc52xx_uart_verify_port(struct uart_port *port, struct serial_struct *ser) | |||
705 | return -EINVAL; | 705 | return -EINVAL; |
706 | 706 | ||
707 | if ((ser->irq != port->irq) || | 707 | if ((ser->irq != port->irq) || |
708 | (ser->io_type != SERIAL_IO_MEM) || | 708 | (ser->io_type != UPIO_MEM) || |
709 | (ser->baud_base != port->uartclk) || | 709 | (ser->baud_base != port->uartclk) || |
710 | (ser->iomem_base != (void *)port->mapbase) || | 710 | (ser->iomem_base != (void *)port->mapbase) || |
711 | (ser->hub6 != 0)) | 711 | (ser->hub6 != 0)) |
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c index ff4617e21426..7c7914f5fa02 100644 --- a/drivers/serial/serial_cs.c +++ b/drivers/serial/serial_cs.c | |||
@@ -879,10 +879,10 @@ static struct pcmcia_device_id serial_ids[] = { | |||
879 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0175, 0x0000, "cis/DP83903.cis"), | 879 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0175, 0x0000, "cis/DP83903.cis"), |
880 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"), | 880 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"), |
881 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"), | 881 | PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"), |
882 | PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */ | 882 | PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */ |
883 | PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0x0710, "SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */ | 883 | PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC710/AC750", 0xd85f6206, 0x761b11e0, "cis/SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */ |
884 | PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ | 884 | PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ |
885 | PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ | 885 | PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ |
886 | PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"), | 886 | PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"), |
887 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "cis/COMpad2.cis"), | 887 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "cis/COMpad2.cis"), |
888 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"), | 888 | PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"), |
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c index 85119fb7cb50..6498bd1fb6dd 100644 --- a/drivers/serial/sh-sci.c +++ b/drivers/serial/sh-sci.c | |||
@@ -1143,7 +1143,7 @@ static void serial_console_write(struct console *co, const char *s, | |||
1143 | while ((sci_in(port, SCxSR) & bits) != bits) | 1143 | while ((sci_in(port, SCxSR) & bits) != bits) |
1144 | cpu_relax(); | 1144 | cpu_relax(); |
1145 | 1145 | ||
1146 | if (sci_port->disable); | 1146 | if (sci_port->disable) |
1147 | sci_port->disable(port); | 1147 | sci_port->disable(port); |
1148 | } | 1148 | } |
1149 | 1149 | ||
diff --git a/drivers/spi/spi_stmp.c b/drivers/spi/spi_stmp.c index d871dc23909c..2552bb364005 100644 --- a/drivers/spi/spi_stmp.c +++ b/drivers/spi/spi_stmp.c | |||
@@ -242,7 +242,7 @@ static int stmp_spi_txrx_dma(struct stmp_spi *ss, int cs, | |||
242 | wait_for_completion(&ss->done); | 242 | wait_for_completion(&ss->done); |
243 | 243 | ||
244 | if (!busy_wait(readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN)) | 244 | if (!busy_wait(readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN)) |
245 | status = ETIMEDOUT; | 245 | status = -ETIMEDOUT; |
246 | 246 | ||
247 | if (!dma_buf) | 247 | if (!dma_buf) |
248 | dma_unmap_single(ss->master_dev, spi_buf_dma, len, dir); | 248 | dma_unmap_single(ss->master_dev, spi_buf_dma, len, dir); |
diff --git a/drivers/ssb/scan.c b/drivers/ssb/scan.c index b74212d698c7..e8b89e8ac9bd 100644 --- a/drivers/ssb/scan.c +++ b/drivers/ssb/scan.c | |||
@@ -162,6 +162,8 @@ static u8 chipid_to_nrcores(u16 chipid) | |||
162 | static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx, | 162 | static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx, |
163 | u16 offset) | 163 | u16 offset) |
164 | { | 164 | { |
165 | u32 lo, hi; | ||
166 | |||
165 | switch (bus->bustype) { | 167 | switch (bus->bustype) { |
166 | case SSB_BUSTYPE_SSB: | 168 | case SSB_BUSTYPE_SSB: |
167 | offset += current_coreidx * SSB_CORE_SIZE; | 169 | offset += current_coreidx * SSB_CORE_SIZE; |
@@ -174,7 +176,9 @@ static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx, | |||
174 | offset -= 0x800; | 176 | offset -= 0x800; |
175 | } else | 177 | } else |
176 | ssb_pcmcia_switch_segment(bus, 0); | 178 | ssb_pcmcia_switch_segment(bus, 0); |
177 | break; | 179 | lo = readw(bus->mmio + offset); |
180 | hi = readw(bus->mmio + offset + 2); | ||
181 | return lo | (hi << 16); | ||
178 | case SSB_BUSTYPE_SDIO: | 182 | case SSB_BUSTYPE_SDIO: |
179 | offset += current_coreidx * SSB_CORE_SIZE; | 183 | offset += current_coreidx * SSB_CORE_SIZE; |
180 | return ssb_sdio_scan_read32(bus, offset); | 184 | return ssb_sdio_scan_read32(bus, offset); |
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 7df3ba4f1f4d..d21b3469f6d7 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig | |||
@@ -93,8 +93,6 @@ source "drivers/staging/dst/Kconfig" | |||
93 | 93 | ||
94 | source "drivers/staging/pohmelfs/Kconfig" | 94 | source "drivers/staging/pohmelfs/Kconfig" |
95 | 95 | ||
96 | source "drivers/staging/stlc45xx/Kconfig" | ||
97 | |||
98 | source "drivers/staging/b3dfg/Kconfig" | 96 | source "drivers/staging/b3dfg/Kconfig" |
99 | 97 | ||
100 | source "drivers/staging/phison/Kconfig" | 98 | source "drivers/staging/phison/Kconfig" |
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 747571172269..8cbf1aebea2e 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile | |||
@@ -29,7 +29,6 @@ obj-$(CONFIG_ANDROID) += android/ | |||
29 | obj-$(CONFIG_ANDROID) += dream/ | 29 | obj-$(CONFIG_ANDROID) += dream/ |
30 | obj-$(CONFIG_DST) += dst/ | 30 | obj-$(CONFIG_DST) += dst/ |
31 | obj-$(CONFIG_POHMELFS) += pohmelfs/ | 31 | obj-$(CONFIG_POHMELFS) += pohmelfs/ |
32 | obj-$(CONFIG_STLC45XX) += stlc45xx/ | ||
33 | obj-$(CONFIG_B3DFG) += b3dfg/ | 32 | obj-$(CONFIG_B3DFG) += b3dfg/ |
34 | obj-$(CONFIG_IDE_PHISON) += phison/ | 33 | obj-$(CONFIG_IDE_PHISON) += phison/ |
35 | obj-$(CONFIG_PLAN9AUTH) += p9auth/ | 34 | obj-$(CONFIG_PLAN9AUTH) += p9auth/ |
diff --git a/drivers/staging/android/Kconfig b/drivers/staging/android/Kconfig index 247194992374..eb675635ae60 100644 --- a/drivers/staging/android/Kconfig +++ b/drivers/staging/android/Kconfig | |||
@@ -2,6 +2,7 @@ menu "Android" | |||
2 | 2 | ||
3 | config ANDROID | 3 | config ANDROID |
4 | bool "Android Drivers" | 4 | bool "Android Drivers" |
5 | depends on BROKEN | ||
5 | default N | 6 | default N |
6 | ---help--- | 7 | ---help--- |
7 | Enable support for various drivers needed on the Android platform | 8 | Enable support for various drivers needed on the Android platform |
diff --git a/drivers/staging/hv/ChannelMgmt.h b/drivers/staging/hv/ChannelMgmt.h index a839d8fe6cec..fa973d86b624 100644 --- a/drivers/staging/hv/ChannelMgmt.h +++ b/drivers/staging/hv/ChannelMgmt.h | |||
@@ -26,6 +26,7 @@ | |||
26 | #define _CHANNEL_MGMT_H_ | 26 | #define _CHANNEL_MGMT_H_ |
27 | 27 | ||
28 | #include <linux/list.h> | 28 | #include <linux/list.h> |
29 | #include <linux/timer.h> | ||
29 | #include "RingBuffer.h" | 30 | #include "RingBuffer.h" |
30 | #include "VmbusChannelInterface.h" | 31 | #include "VmbusChannelInterface.h" |
31 | #include "VmbusPacketFormat.h" | 32 | #include "VmbusPacketFormat.h" |
@@ -54,7 +55,7 @@ enum vmbus_channel_message_type { | |||
54 | ChannelMessageViewRangeRemove = 18, | 55 | ChannelMessageViewRangeRemove = 18, |
55 | #endif | 56 | #endif |
56 | ChannelMessageCount | 57 | ChannelMessageCount |
57 | } __attribute__((packed)); | 58 | }; |
58 | 59 | ||
59 | struct vmbus_channel_message_header { | 60 | struct vmbus_channel_message_header { |
60 | enum vmbus_channel_message_type MessageType; | 61 | enum vmbus_channel_message_type MessageType; |
diff --git a/drivers/staging/hv/NetVsc.c b/drivers/staging/hv/NetVsc.c index 1610b845198f..d384c0ddf069 100644 --- a/drivers/staging/hv/NetVsc.c +++ b/drivers/staging/hv/NetVsc.c | |||
@@ -1052,7 +1052,7 @@ static void NetVscOnReceive(struct hv_device *Device, | |||
1052 | */ | 1052 | */ |
1053 | spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags); | 1053 | spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags); |
1054 | while (!list_empty(&netDevice->ReceivePacketList)) { | 1054 | while (!list_empty(&netDevice->ReceivePacketList)) { |
1055 | list_move_tail(&netDevice->ReceivePacketList, &listHead); | 1055 | list_move_tail(netDevice->ReceivePacketList.next, &listHead); |
1056 | if (++count == vmxferpagePacket->RangeCount + 1) | 1056 | if (++count == vmxferpagePacket->RangeCount + 1) |
1057 | break; | 1057 | break; |
1058 | } | 1058 | } |
@@ -1071,7 +1071,7 @@ static void NetVscOnReceive(struct hv_device *Device, | |||
1071 | /* Return it to the freelist */ | 1071 | /* Return it to the freelist */ |
1072 | spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags); | 1072 | spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags); |
1073 | for (i = count; i != 0; i--) { | 1073 | for (i = count; i != 0; i--) { |
1074 | list_move_tail(&listHead, | 1074 | list_move_tail(listHead.next, |
1075 | &netDevice->ReceivePacketList); | 1075 | &netDevice->ReceivePacketList); |
1076 | } | 1076 | } |
1077 | spin_unlock_irqrestore(&netDevice->receive_packet_list_lock, | 1077 | spin_unlock_irqrestore(&netDevice->receive_packet_list_lock, |
@@ -1085,8 +1085,7 @@ static void NetVscOnReceive(struct hv_device *Device, | |||
1085 | } | 1085 | } |
1086 | 1086 | ||
1087 | /* Remove the 1st packet to represent the xfer page packet itself */ | 1087 | /* Remove the 1st packet to represent the xfer page packet itself */ |
1088 | xferpagePacket = list_entry(&listHead, struct xferpage_packet, | 1088 | xferpagePacket = (struct xferpage_packet*)listHead.next; |
1089 | ListEntry); | ||
1090 | list_del(&xferpagePacket->ListEntry); | 1089 | list_del(&xferpagePacket->ListEntry); |
1091 | 1090 | ||
1092 | /* This is how much we can satisfy */ | 1091 | /* This is how much we can satisfy */ |
@@ -1102,8 +1101,7 @@ static void NetVscOnReceive(struct hv_device *Device, | |||
1102 | 1101 | ||
1103 | /* Each range represents 1 RNDIS pkt that contains 1 ethernet frame */ | 1102 | /* Each range represents 1 RNDIS pkt that contains 1 ethernet frame */ |
1104 | for (i = 0; i < (count - 1); i++) { | 1103 | for (i = 0; i < (count - 1); i++) { |
1105 | netvscPacket = list_entry(&listHead, struct hv_netvsc_packet, | 1104 | netvscPacket = (struct hv_netvsc_packet*)listHead.next; |
1106 | ListEntry); | ||
1107 | list_del(&netvscPacket->ListEntry); | 1105 | list_del(&netvscPacket->ListEntry); |
1108 | 1106 | ||
1109 | /* Initialize the netvsc packet */ | 1107 | /* Initialize the netvsc packet */ |
diff --git a/drivers/staging/hv/TODO b/drivers/staging/hv/TODO index 4d390b237742..dbfbde937a66 100644 --- a/drivers/staging/hv/TODO +++ b/drivers/staging/hv/TODO | |||
@@ -1,11 +1,17 @@ | |||
1 | TODO: | 1 | TODO: |
2 | - fix remaining checkpatch warnings and errors | 2 | - fix remaining checkpatch warnings and errors |
3 | - use of /** when it is not a kerneldoc header | ||
3 | - remove RingBuffer.c to us in-kernel ringbuffer functions instead. | 4 | - remove RingBuffer.c to us in-kernel ringbuffer functions instead. |
4 | - audit the vmbus to verify it is working properly with the | 5 | - audit the vmbus to verify it is working properly with the |
5 | driver model | 6 | driver model |
7 | - convert vmbus driver interface function pointer tables | ||
8 | to constant, a.k.a vmbus_ops | ||
6 | - see if the vmbus can be merged with the other virtual busses | 9 | - see if the vmbus can be merged with the other virtual busses |
7 | in the kernel | 10 | in the kernel |
8 | - audit the network driver | 11 | - audit the network driver |
12 | - use existing net_device_stats struct in network device | ||
13 | - checking for carrier inside open is wrong, network device API | ||
14 | confusion?? | ||
9 | - audit the block driver | 15 | - audit the block driver |
10 | - audit the scsi driver | 16 | - audit the scsi driver |
11 | 17 | ||
diff --git a/drivers/staging/hv/osd.h b/drivers/staging/hv/osd.h index 9504604c72bd..ce064e8ea644 100644 --- a/drivers/staging/hv/osd.h +++ b/drivers/staging/hv/osd.h | |||
@@ -25,6 +25,7 @@ | |||
25 | #ifndef _OSD_H_ | 25 | #ifndef _OSD_H_ |
26 | #define _OSD_H_ | 26 | #define _OSD_H_ |
27 | 27 | ||
28 | #include <linux/workqueue.h> | ||
28 | 29 | ||
29 | /* Defines */ | 30 | /* Defines */ |
30 | #define ALIGN_UP(value, align) (((value) & (align-1)) ? \ | 31 | #define ALIGN_UP(value, align) (((value) & (align-1)) ? \ |
diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c index 582318f10222..894eecfc63ca 100644 --- a/drivers/staging/hv/vmbus_drv.c +++ b/drivers/staging/hv/vmbus_drv.c | |||
@@ -507,12 +507,12 @@ static struct hv_device *vmbus_child_device_create(struct hv_guid *type, | |||
507 | 507 | ||
508 | child_device_obj = &child_device_ctx->device_obj; | 508 | child_device_obj = &child_device_ctx->device_obj; |
509 | child_device_obj->context = context; | 509 | child_device_obj->context = context; |
510 | memcpy(&child_device_obj->deviceType, &type, sizeof(struct hv_guid)); | 510 | memcpy(&child_device_obj->deviceType, type, sizeof(struct hv_guid)); |
511 | memcpy(&child_device_obj->deviceInstance, &instance, | 511 | memcpy(&child_device_obj->deviceInstance, instance, |
512 | sizeof(struct hv_guid)); | 512 | sizeof(struct hv_guid)); |
513 | 513 | ||
514 | memcpy(&child_device_ctx->class_id, &type, sizeof(struct hv_guid)); | 514 | memcpy(&child_device_ctx->class_id, type, sizeof(struct hv_guid)); |
515 | memcpy(&child_device_ctx->device_id, &instance, sizeof(struct hv_guid)); | 515 | memcpy(&child_device_ctx->device_id, instance, sizeof(struct hv_guid)); |
516 | 516 | ||
517 | DPRINT_EXIT(VMBUS_DRV); | 517 | DPRINT_EXIT(VMBUS_DRV); |
518 | 518 | ||
@@ -537,18 +537,7 @@ static int vmbus_child_device_register(struct hv_device *root_device_obj, | |||
537 | DPRINT_DBG(VMBUS_DRV, "child device (%p) registering", | 537 | DPRINT_DBG(VMBUS_DRV, "child device (%p) registering", |
538 | child_device_ctx); | 538 | child_device_ctx); |
539 | 539 | ||
540 | /* Make sure we are not registered already */ | 540 | /* Set the device name. Otherwise, device_register() will fail. */ |
541 | if (strlen(dev_name(&child_device_ctx->device)) != 0) { | ||
542 | DPRINT_ERR(VMBUS_DRV, | ||
543 | "child device (%p) already registered - busid %s", | ||
544 | child_device_ctx, | ||
545 | dev_name(&child_device_ctx->device)); | ||
546 | |||
547 | ret = -1; | ||
548 | goto Cleanup; | ||
549 | } | ||
550 | |||
551 | /* Set the device bus id. Otherwise, device_register()will fail. */ | ||
552 | dev_set_name(&child_device_ctx->device, "vmbus_0_%d", | 541 | dev_set_name(&child_device_ctx->device, "vmbus_0_%d", |
553 | atomic_inc_return(&device_num)); | 542 | atomic_inc_return(&device_num)); |
554 | 543 | ||
@@ -573,7 +562,6 @@ static int vmbus_child_device_register(struct hv_device *root_device_obj, | |||
573 | DPRINT_INFO(VMBUS_DRV, "child device (%p) registered", | 562 | DPRINT_INFO(VMBUS_DRV, "child device (%p) registered", |
574 | &child_device_ctx->device); | 563 | &child_device_ctx->device); |
575 | 564 | ||
576 | Cleanup: | ||
577 | DPRINT_EXIT(VMBUS_DRV); | 565 | DPRINT_EXIT(VMBUS_DRV); |
578 | 566 | ||
579 | return ret; | 567 | return ret; |
@@ -623,8 +611,6 @@ static void vmbus_child_device_destroy(struct hv_device *device_obj) | |||
623 | static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env) | 611 | static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env) |
624 | { | 612 | { |
625 | struct device_context *device_ctx = device_to_device_context(device); | 613 | struct device_context *device_ctx = device_to_device_context(device); |
626 | int i = 0; | ||
627 | int len = 0; | ||
628 | int ret; | 614 | int ret; |
629 | 615 | ||
630 | DPRINT_ENTER(VMBUS_DRV); | 616 | DPRINT_ENTER(VMBUS_DRV); |
@@ -644,8 +630,6 @@ static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env) | |||
644 | device_ctx->class_id.data[14], | 630 | device_ctx->class_id.data[14], |
645 | device_ctx->class_id.data[15]); | 631 | device_ctx->class_id.data[15]); |
646 | 632 | ||
647 | env->envp_idx = i; | ||
648 | env->buflen = len; | ||
649 | ret = add_uevent_var(env, "VMBUS_DEVICE_CLASS_GUID={" | 633 | ret = add_uevent_var(env, "VMBUS_DEVICE_CLASS_GUID={" |
650 | "%02x%02x%02x%02x-%02x%02x-%02x%02x-" | 634 | "%02x%02x%02x%02x-%02x%02x-%02x%02x-" |
651 | "%02x%02x%02x%02x%02x%02x%02x%02x}", | 635 | "%02x%02x%02x%02x%02x%02x%02x%02x}", |
@@ -691,8 +675,6 @@ static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env) | |||
691 | if (ret) | 675 | if (ret) |
692 | return ret; | 676 | return ret; |
693 | 677 | ||
694 | env->envp[env->envp_idx] = NULL; | ||
695 | |||
696 | DPRINT_EXIT(VMBUS_DRV); | 678 | DPRINT_EXIT(VMBUS_DRV); |
697 | 679 | ||
698 | return 0; | 680 | return 0; |
diff --git a/drivers/staging/otus/Kconfig b/drivers/staging/otus/Kconfig index d549d08fd495..f6cc2625e341 100644 --- a/drivers/staging/otus/Kconfig +++ b/drivers/staging/otus/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config OTUS | 1 | config OTUS |
2 | tristate "Atheros OTUS 802.11n USB wireless support" | 2 | tristate "Atheros OTUS 802.11n USB wireless support" |
3 | depends on USB && WLAN_80211 && MAC80211 | 3 | depends on USB && WLAN && MAC80211 |
4 | default N | 4 | default N |
5 | ---help--- | 5 | ---help--- |
6 | Enable support for Atheros 802.11n USB hardware: | 6 | Enable support for Atheros 802.11n USB hardware: |
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c index dd7d3fde9699..4ce399b6d237 100644 --- a/drivers/staging/panel/panel.c +++ b/drivers/staging/panel/panel.c | |||
@@ -2071,11 +2071,15 @@ static void panel_detach(struct parport *port) | |||
2071 | return; | 2071 | return; |
2072 | } | 2072 | } |
2073 | 2073 | ||
2074 | if (keypad_enabled && keypad_initialized) | 2074 | if (keypad_enabled && keypad_initialized) { |
2075 | misc_deregister(&keypad_dev); | 2075 | misc_deregister(&keypad_dev); |
2076 | keypad_initialized = 0; | ||
2077 | } | ||
2076 | 2078 | ||
2077 | if (lcd_enabled && lcd_initialized) | 2079 | if (lcd_enabled && lcd_initialized) { |
2078 | misc_deregister(&lcd_dev); | 2080 | misc_deregister(&lcd_dev); |
2081 | lcd_initialized = 0; | ||
2082 | } | ||
2079 | 2083 | ||
2080 | parport_release(pprt); | 2084 | parport_release(pprt); |
2081 | parport_unregister_device(pprt); | 2085 | parport_unregister_device(pprt); |
@@ -2211,13 +2215,16 @@ static void __exit panel_cleanup_module(void) | |||
2211 | del_timer(&scan_timer); | 2215 | del_timer(&scan_timer); |
2212 | 2216 | ||
2213 | if (pprt != NULL) { | 2217 | if (pprt != NULL) { |
2214 | if (keypad_enabled) | 2218 | if (keypad_enabled) { |
2215 | misc_deregister(&keypad_dev); | 2219 | misc_deregister(&keypad_dev); |
2220 | keypad_initialized = 0; | ||
2221 | } | ||
2216 | 2222 | ||
2217 | if (lcd_enabled) { | 2223 | if (lcd_enabled) { |
2218 | panel_lcd_print("\x0cLCD driver " PANEL_VERSION | 2224 | panel_lcd_print("\x0cLCD driver " PANEL_VERSION |
2219 | "\nunloaded.\x1b[Lc\x1b[Lb\x1b[L-"); | 2225 | "\nunloaded.\x1b[Lc\x1b[Lb\x1b[L-"); |
2220 | misc_deregister(&lcd_dev); | 2226 | misc_deregister(&lcd_dev); |
2227 | lcd_initialized = 0; | ||
2221 | } | 2228 | } |
2222 | 2229 | ||
2223 | /* TODO: free all input signals */ | 2230 | /* TODO: free all input signals */ |
diff --git a/drivers/staging/rt2860/Kconfig b/drivers/staging/rt2860/Kconfig index 7f44e5e72463..efe38e25c5ed 100644 --- a/drivers/staging/rt2860/Kconfig +++ b/drivers/staging/rt2860/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | config RT2860 | 1 | config RT2860 |
2 | tristate "Ralink 2860 wireless support" | 2 | tristate "Ralink 2860 wireless support" |
3 | depends on PCI && X86 && WLAN_80211 | 3 | depends on PCI && X86 && WLAN |
4 | ---help--- | 4 | ---help--- |
5 | This is an experimental driver for the Ralink 2860 wireless chip. | 5 | This is an experimental driver for the Ralink 2860 wireless chip. |
diff --git a/drivers/staging/rt2870/Kconfig b/drivers/staging/rt2870/Kconfig index 76841f6dea93..aea5c8221810 100644 --- a/drivers/staging/rt2870/Kconfig +++ b/drivers/staging/rt2870/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | config RT2870 | 1 | config RT2870 |
2 | tristate "Ralink 2870/3070 wireless support" | 2 | tristate "Ralink 2870/3070 wireless support" |
3 | depends on USB && X86 && WLAN_80211 | 3 | depends on USB && X86 && WLAN |
4 | ---help--- | 4 | ---help--- |
5 | This is an experimental driver for the Ralink xx70 wireless chips. | 5 | This is an experimental driver for the Ralink xx70 wireless chips. |
diff --git a/drivers/staging/rt3090/Kconfig b/drivers/staging/rt3090/Kconfig index 255e8eaa4836..2b3f745d72b7 100644 --- a/drivers/staging/rt3090/Kconfig +++ b/drivers/staging/rt3090/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | config RT3090 | 1 | config RT3090 |
2 | tristate "Ralink 3090 wireless support" | 2 | tristate "Ralink 3090 wireless support" |
3 | depends on PCI && X86 && WLAN_80211 | 3 | depends on PCI && X86 && WLAN |
4 | ---help--- | 4 | ---help--- |
5 | This is an experimental driver for the Ralink 3090 wireless chip. | 5 | This is an experimental driver for the Ralink 3090 wireless chip. |
diff --git a/drivers/staging/rtl8187se/Kconfig b/drivers/staging/rtl8187se/Kconfig index 236e42725447..203c79b8180f 100644 --- a/drivers/staging/rtl8187se/Kconfig +++ b/drivers/staging/rtl8187se/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config RTL8187SE | 1 | config RTL8187SE |
2 | tristate "RealTek RTL8187SE Wireless LAN NIC driver" | 2 | tristate "RealTek RTL8187SE Wireless LAN NIC driver" |
3 | depends on PCI | 3 | depends on PCI && WLAN |
4 | depends on WIRELESS_EXT | 4 | depends on WIRELESS_EXT |
5 | default N | 5 | default N |
6 | ---help--- | 6 | ---help--- |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c index 013c3e19ae25..4c5d63fd5833 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c | |||
@@ -53,10 +53,8 @@ void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee, | |||
53 | 53 | ||
54 | list_del(ptr); | 54 | list_del(ptr); |
55 | 55 | ||
56 | if (entry->ops) { | 56 | if (entry->ops) |
57 | entry->ops->deinit(entry->priv); | 57 | entry->ops->deinit(entry->priv); |
58 | module_put(entry->ops->owner); | ||
59 | } | ||
60 | kfree(entry); | 58 | kfree(entry); |
61 | } | 59 | } |
62 | } | 60 | } |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c index 6fbe4890cb66..18392fce487d 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c | |||
@@ -189,10 +189,8 @@ void free_ieee80211(struct net_device *dev) | |||
189 | for (i = 0; i < WEP_KEYS; i++) { | 189 | for (i = 0; i < WEP_KEYS; i++) { |
190 | struct ieee80211_crypt_data *crypt = ieee->crypt[i]; | 190 | struct ieee80211_crypt_data *crypt = ieee->crypt[i]; |
191 | if (crypt) { | 191 | if (crypt) { |
192 | if (crypt->ops) { | 192 | if (crypt->ops) |
193 | crypt->ops->deinit(crypt->priv); | 193 | crypt->ops->deinit(crypt->priv); |
194 | module_put(crypt->ops->owner); | ||
195 | } | ||
196 | kfree(crypt); | 194 | kfree(crypt); |
197 | ieee->crypt[i] = NULL; | 195 | ieee->crypt[i] = NULL; |
198 | } | 196 | } |
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c index 59b2ab48cdcf..334e4c7ec61b 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c | |||
@@ -2839,16 +2839,12 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee, | |||
2839 | goto skip_host_crypt; | 2839 | goto skip_host_crypt; |
2840 | 2840 | ||
2841 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 2841 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
2842 | if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) { | 2842 | if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) |
2843 | request_module("ieee80211_crypt_wep"); | ||
2844 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 2843 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
2845 | } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) { | 2844 | else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) |
2846 | request_module("ieee80211_crypt_tkip"); | ||
2847 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 2845 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
2848 | } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) { | 2846 | else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) |
2849 | request_module("ieee80211_crypt_ccmp"); | ||
2850 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 2847 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
2851 | } | ||
2852 | if (ops == NULL) { | 2848 | if (ops == NULL) { |
2853 | printk("unknown crypto alg '%s'\n", param->u.crypt.alg); | 2849 | printk("unknown crypto alg '%s'\n", param->u.crypt.alg); |
2854 | param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; | 2850 | param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; |
@@ -2869,7 +2865,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee, | |||
2869 | } | 2865 | } |
2870 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); | 2866 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); |
2871 | new_crypt->ops = ops; | 2867 | new_crypt->ops = ops; |
2872 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | 2868 | if (new_crypt->ops) |
2873 | new_crypt->priv = | 2869 | new_crypt->priv = |
2874 | new_crypt->ops->init(param->u.crypt.idx); | 2870 | new_crypt->ops->init(param->u.crypt.idx); |
2875 | 2871 | ||
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c index 8d8bdd0a130e..a08b97a09512 100644 --- a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c | |||
@@ -331,12 +331,10 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee, | |||
331 | return -ENOMEM; | 331 | return -ENOMEM; |
332 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); | 332 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); |
333 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); | 333 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); |
334 | if (!new_crypt->ops) { | 334 | if (!new_crypt->ops) |
335 | request_module("ieee80211_crypt_wep"); | ||
336 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); | 335 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); |
337 | } | ||
338 | 336 | ||
339 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | 337 | if (new_crypt->ops) |
340 | new_crypt->priv = new_crypt->ops->init(key); | 338 | new_crypt->priv = new_crypt->ops->init(key); |
341 | 339 | ||
342 | if (!new_crypt->ops || !new_crypt->priv) { | 340 | if (!new_crypt->ops || !new_crypt->priv) { |
@@ -483,7 +481,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
483 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; | 481 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; |
484 | int i, idx, ret = 0; | 482 | int i, idx, ret = 0; |
485 | int group_key = 0; | 483 | int group_key = 0; |
486 | const char *alg, *module; | 484 | const char *alg; |
487 | struct ieee80211_crypto_ops *ops; | 485 | struct ieee80211_crypto_ops *ops; |
488 | struct ieee80211_crypt_data **crypt; | 486 | struct ieee80211_crypt_data **crypt; |
489 | 487 | ||
@@ -539,15 +537,12 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
539 | switch (ext->alg) { | 537 | switch (ext->alg) { |
540 | case IW_ENCODE_ALG_WEP: | 538 | case IW_ENCODE_ALG_WEP: |
541 | alg = "WEP"; | 539 | alg = "WEP"; |
542 | module = "ieee80211_crypt_wep"; | ||
543 | break; | 540 | break; |
544 | case IW_ENCODE_ALG_TKIP: | 541 | case IW_ENCODE_ALG_TKIP: |
545 | alg = "TKIP"; | 542 | alg = "TKIP"; |
546 | module = "ieee80211_crypt_tkip"; | ||
547 | break; | 543 | break; |
548 | case IW_ENCODE_ALG_CCMP: | 544 | case IW_ENCODE_ALG_CCMP: |
549 | alg = "CCMP"; | 545 | alg = "CCMP"; |
550 | module = "ieee80211_crypt_ccmp"; | ||
551 | break; | 546 | break; |
552 | default: | 547 | default: |
553 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", | 548 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", |
@@ -558,10 +553,8 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
558 | // printk("8-09-08-9=====>%s, alg name:%s\n",__func__, alg); | 553 | // printk("8-09-08-9=====>%s, alg name:%s\n",__func__, alg); |
559 | 554 | ||
560 | ops = ieee80211_get_crypto_ops(alg); | 555 | ops = ieee80211_get_crypto_ops(alg); |
561 | if (ops == NULL) { | 556 | if (ops == NULL) |
562 | request_module(module); | ||
563 | ops = ieee80211_get_crypto_ops(alg); | 557 | ops = ieee80211_get_crypto_ops(alg); |
564 | } | ||
565 | if (ops == NULL) { | 558 | if (ops == NULL) { |
566 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", | 559 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", |
567 | dev->name, ext->alg); | 560 | dev->name, ext->alg); |
@@ -581,7 +574,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
581 | goto done; | 574 | goto done; |
582 | } | 575 | } |
583 | new_crypt->ops = ops; | 576 | new_crypt->ops = ops; |
584 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | 577 | if (new_crypt->ops) |
585 | new_crypt->priv = new_crypt->ops->init(idx); | 578 | new_crypt->priv = new_crypt->ops->init(idx); |
586 | if (new_crypt->priv == NULL) { | 579 | if (new_crypt->priv == NULL) { |
587 | kfree(new_crypt); | 580 | kfree(new_crypt); |
diff --git a/drivers/staging/rtl8192e/Kconfig b/drivers/staging/rtl8192e/Kconfig index 3100aa58c940..37e4fde45073 100644 --- a/drivers/staging/rtl8192e/Kconfig +++ b/drivers/staging/rtl8192e/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config RTL8192E | 1 | config RTL8192E |
2 | tristate "RealTek RTL8192E Wireless LAN NIC driver" | 2 | tristate "RealTek RTL8192E Wireless LAN NIC driver" |
3 | depends on PCI | 3 | depends on PCI && WLAN |
4 | depends on WIRELESS_EXT | 4 | depends on WIRELESS_EXT |
5 | default N | 5 | default N |
6 | ---help--- | 6 | ---help--- |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c index 1a8ea8a40c3c..b1c54932da3e 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c | |||
@@ -53,14 +53,8 @@ void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee, | |||
53 | 53 | ||
54 | list_del(ptr); | 54 | list_del(ptr); |
55 | 55 | ||
56 | if (entry->ops) { | 56 | if (entry->ops) |
57 | entry->ops->deinit(entry->priv); | 57 | entry->ops->deinit(entry->priv); |
58 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) | ||
59 | module_put(entry->ops->owner); | ||
60 | #else | ||
61 | __MOD_DEC_USE_COUNT(entry->ops->owner); | ||
62 | #endif | ||
63 | } | ||
64 | kfree(entry); | 58 | kfree(entry); |
65 | } | 59 | } |
66 | } | 60 | } |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c index 16256a31f993..12c2a18e1fa2 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c | |||
@@ -242,14 +242,8 @@ void free_ieee80211(struct net_device *dev) | |||
242 | for (i = 0; i < WEP_KEYS; i++) { | 242 | for (i = 0; i < WEP_KEYS; i++) { |
243 | struct ieee80211_crypt_data *crypt = ieee->crypt[i]; | 243 | struct ieee80211_crypt_data *crypt = ieee->crypt[i]; |
244 | if (crypt) { | 244 | if (crypt) { |
245 | if (crypt->ops) { | 245 | if (crypt->ops) |
246 | crypt->ops->deinit(crypt->priv); | 246 | crypt->ops->deinit(crypt->priv); |
247 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) | ||
248 | module_put(crypt->ops->owner); | ||
249 | #else | ||
250 | __MOD_DEC_USE_COUNT(crypt->ops->owner); | ||
251 | #endif | ||
252 | } | ||
253 | kfree(crypt); | 247 | kfree(crypt); |
254 | ieee->crypt[i] = NULL; | 248 | ieee->crypt[i] = NULL; |
255 | } | 249 | } |
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c index 2fc04df872ca..eae7c4579a68 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c | |||
@@ -3284,17 +3284,14 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee, | |||
3284 | goto skip_host_crypt; | 3284 | goto skip_host_crypt; |
3285 | 3285 | ||
3286 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 3286 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
3287 | if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) { | 3287 | if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) |
3288 | request_module("ieee80211_crypt_wep"); | ||
3289 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 3288 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
3290 | //set WEP40 first, it will be modified according to WEP104 or WEP40 at other place | 3289 | /* set WEP40 first, it will be modified according to WEP104 or |
3291 | } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) { | 3290 | * WEP40 at other place */ |
3292 | request_module("ieee80211_crypt_tkip"); | 3291 | else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) |
3293 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 3292 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
3294 | } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) { | 3293 | else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) |
3295 | request_module("ieee80211_crypt_ccmp"); | ||
3296 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 3294 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
3297 | } | ||
3298 | if (ops == NULL) { | 3295 | if (ops == NULL) { |
3299 | printk("unknown crypto alg '%s'\n", param->u.crypt.alg); | 3296 | printk("unknown crypto alg '%s'\n", param->u.crypt.alg); |
3300 | param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; | 3297 | param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; |
@@ -3315,11 +3312,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee, | |||
3315 | } | 3312 | } |
3316 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); | 3313 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); |
3317 | new_crypt->ops = ops; | 3314 | new_crypt->ops = ops; |
3318 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) | 3315 | if (new_crypt->ops) |
3319 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | ||
3320 | #else | ||
3321 | if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner)) | ||
3322 | #endif | ||
3323 | new_crypt->priv = | 3316 | new_crypt->priv = |
3324 | new_crypt->ops->init(param->u.crypt.idx); | 3317 | new_crypt->ops->init(param->u.crypt.idx); |
3325 | 3318 | ||
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c index 223483126b0e..4e34a1f4c66b 100644 --- a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c | |||
@@ -482,15 +482,9 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee, | |||
482 | return -ENOMEM; | 482 | return -ENOMEM; |
483 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); | 483 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); |
484 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); | 484 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); |
485 | if (!new_crypt->ops) { | 485 | if (!new_crypt->ops) |
486 | request_module("ieee80211_crypt_wep"); | ||
487 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); | 486 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); |
488 | } | 487 | if (new_crypt->ops) |
489 | #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) | ||
490 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | ||
491 | #else | ||
492 | if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner)) | ||
493 | #endif | ||
494 | new_crypt->priv = new_crypt->ops->init(key); | 488 | new_crypt->priv = new_crypt->ops->init(key); |
495 | 489 | ||
496 | if (!new_crypt->ops || !new_crypt->priv) { | 490 | if (!new_crypt->ops || !new_crypt->priv) { |
@@ -644,7 +638,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
644 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; | 638 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; |
645 | int i, idx; | 639 | int i, idx; |
646 | int group_key = 0; | 640 | int group_key = 0; |
647 | const char *alg, *module; | 641 | const char *alg; |
648 | struct ieee80211_crypto_ops *ops; | 642 | struct ieee80211_crypto_ops *ops; |
649 | struct ieee80211_crypt_data **crypt; | 643 | struct ieee80211_crypt_data **crypt; |
650 | 644 | ||
@@ -711,15 +705,12 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
711 | switch (ext->alg) { | 705 | switch (ext->alg) { |
712 | case IW_ENCODE_ALG_WEP: | 706 | case IW_ENCODE_ALG_WEP: |
713 | alg = "WEP"; | 707 | alg = "WEP"; |
714 | module = "ieee80211_crypt_wep"; | ||
715 | break; | 708 | break; |
716 | case IW_ENCODE_ALG_TKIP: | 709 | case IW_ENCODE_ALG_TKIP: |
717 | alg = "TKIP"; | 710 | alg = "TKIP"; |
718 | module = "ieee80211_crypt_tkip"; | ||
719 | break; | 711 | break; |
720 | case IW_ENCODE_ALG_CCMP: | 712 | case IW_ENCODE_ALG_CCMP: |
721 | alg = "CCMP"; | 713 | alg = "CCMP"; |
722 | module = "ieee80211_crypt_ccmp"; | ||
723 | break; | 714 | break; |
724 | default: | 715 | default: |
725 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", | 716 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", |
@@ -730,10 +721,8 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
730 | printk("alg name:%s\n",alg); | 721 | printk("alg name:%s\n",alg); |
731 | 722 | ||
732 | ops = ieee80211_get_crypto_ops(alg); | 723 | ops = ieee80211_get_crypto_ops(alg); |
733 | if (ops == NULL) { | 724 | if (ops == NULL) |
734 | request_module(module); | ||
735 | ops = ieee80211_get_crypto_ops(alg); | 725 | ops = ieee80211_get_crypto_ops(alg); |
736 | } | ||
737 | if (ops == NULL) { | 726 | if (ops == NULL) { |
738 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", | 727 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", |
739 | dev->name, ext->alg); | 728 | dev->name, ext->alg); |
@@ -758,7 +747,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
758 | goto done; | 747 | goto done; |
759 | } | 748 | } |
760 | new_crypt->ops = ops; | 749 | new_crypt->ops = ops; |
761 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | 750 | if (new_crypt->ops) |
762 | new_crypt->priv = new_crypt->ops->init(idx); | 751 | new_crypt->priv = new_crypt->ops->init(idx); |
763 | if (new_crypt->priv == NULL) { | 752 | if (new_crypt->priv == NULL) { |
764 | kfree(new_crypt); | 753 | kfree(new_crypt); |
diff --git a/drivers/staging/rtl8192su/Kconfig b/drivers/staging/rtl8192su/Kconfig index 770f41280f21..b8c95f942069 100644 --- a/drivers/staging/rtl8192su/Kconfig +++ b/drivers/staging/rtl8192su/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config RTL8192SU | 1 | config RTL8192SU |
2 | tristate "RealTek RTL8192SU Wireless LAN NIC driver" | 2 | tristate "RealTek RTL8192SU Wireless LAN NIC driver" |
3 | depends on PCI | 3 | depends on PCI && WLAN |
4 | depends on WIRELESS_EXT | 4 | depends on WIRELESS_EXT |
5 | default N | 5 | default N |
6 | ---help--- | 6 | ---help--- |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c index d76a54d59d2f..521e7b989934 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c | |||
@@ -53,10 +53,8 @@ void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee, | |||
53 | 53 | ||
54 | list_del(ptr); | 54 | list_del(ptr); |
55 | 55 | ||
56 | if (entry->ops) { | 56 | if (entry->ops) |
57 | entry->ops->deinit(entry->priv); | 57 | entry->ops->deinit(entry->priv); |
58 | module_put(entry->ops->owner); | ||
59 | } | ||
60 | kfree(entry); | 58 | kfree(entry); |
61 | } | 59 | } |
62 | } | 60 | } |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c index 68dc8fa094cc..c3383bb8b760 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c | |||
@@ -216,10 +216,8 @@ void free_ieee80211(struct net_device *dev) | |||
216 | for (i = 0; i < WEP_KEYS; i++) { | 216 | for (i = 0; i < WEP_KEYS; i++) { |
217 | struct ieee80211_crypt_data *crypt = ieee->crypt[i]; | 217 | struct ieee80211_crypt_data *crypt = ieee->crypt[i]; |
218 | if (crypt) { | 218 | if (crypt) { |
219 | if (crypt->ops) { | 219 | if (crypt->ops) |
220 | crypt->ops->deinit(crypt->priv); | 220 | crypt->ops->deinit(crypt->priv); |
221 | module_put(crypt->ops->owner); | ||
222 | } | ||
223 | kfree(crypt); | 221 | kfree(crypt); |
224 | ieee->crypt[i] = NULL; | 222 | ieee->crypt[i] = NULL; |
225 | } | 223 | } |
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c index c64ae03f68a0..fd8e11252f1b 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c | |||
@@ -3026,17 +3026,14 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee, | |||
3026 | goto skip_host_crypt; | 3026 | goto skip_host_crypt; |
3027 | 3027 | ||
3028 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 3028 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
3029 | if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) { | 3029 | if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) |
3030 | request_module("ieee80211_crypt_wep"); | ||
3031 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 3030 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
3032 | //set WEP40 first, it will be modified according to WEP104 or WEP40 at other place | 3031 | /* set WEP40 first, it will be modified according to WEP104 or |
3033 | } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) { | 3032 | * WEP40 at other place */ |
3034 | request_module("ieee80211_crypt_tkip"); | 3033 | else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) |
3035 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 3034 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
3036 | } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) { | 3035 | else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) |
3037 | request_module("ieee80211_crypt_ccmp"); | ||
3038 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); | 3036 | ops = ieee80211_get_crypto_ops(param->u.crypt.alg); |
3039 | } | ||
3040 | if (ops == NULL) { | 3037 | if (ops == NULL) { |
3041 | printk("unknown crypto alg '%s'\n", param->u.crypt.alg); | 3038 | printk("unknown crypto alg '%s'\n", param->u.crypt.alg); |
3042 | param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; | 3039 | param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; |
@@ -3058,7 +3055,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee, | |||
3058 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); | 3055 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); |
3059 | new_crypt->ops = ops; | 3056 | new_crypt->ops = ops; |
3060 | 3057 | ||
3061 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | 3058 | if (new_crypt->ops) |
3062 | new_crypt->priv = | 3059 | new_crypt->priv = |
3063 | new_crypt->ops->init(param->u.crypt.idx); | 3060 | new_crypt->ops->init(param->u.crypt.idx); |
3064 | 3061 | ||
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c index 107759024335..6146c6435dde 100644 --- a/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c +++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c | |||
@@ -358,11 +358,9 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee, | |||
358 | return -ENOMEM; | 358 | return -ENOMEM; |
359 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); | 359 | memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); |
360 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); | 360 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); |
361 | if (!new_crypt->ops) { | 361 | if (!new_crypt->ops) |
362 | request_module("ieee80211_crypt_wep"); | ||
363 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); | 362 | new_crypt->ops = ieee80211_get_crypto_ops("WEP"); |
364 | } | 363 | if (new_crypt->ops) |
365 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | ||
366 | new_crypt->priv = new_crypt->ops->init(key); | 364 | new_crypt->priv = new_crypt->ops->init(key); |
367 | 365 | ||
368 | if (!new_crypt->ops || !new_crypt->priv) { | 366 | if (!new_crypt->ops || !new_crypt->priv) { |
@@ -507,7 +505,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
507 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; | 505 | struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; |
508 | int i, idx; | 506 | int i, idx; |
509 | int group_key = 0; | 507 | int group_key = 0; |
510 | const char *alg, *module; | 508 | const char *alg; |
511 | struct ieee80211_crypto_ops *ops; | 509 | struct ieee80211_crypto_ops *ops; |
512 | struct ieee80211_crypt_data **crypt; | 510 | struct ieee80211_crypt_data **crypt; |
513 | 511 | ||
@@ -570,15 +568,12 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
570 | switch (ext->alg) { | 568 | switch (ext->alg) { |
571 | case IW_ENCODE_ALG_WEP: | 569 | case IW_ENCODE_ALG_WEP: |
572 | alg = "WEP"; | 570 | alg = "WEP"; |
573 | module = "ieee80211_crypt_wep"; | ||
574 | break; | 571 | break; |
575 | case IW_ENCODE_ALG_TKIP: | 572 | case IW_ENCODE_ALG_TKIP: |
576 | alg = "TKIP"; | 573 | alg = "TKIP"; |
577 | module = "ieee80211_crypt_tkip"; | ||
578 | break; | 574 | break; |
579 | case IW_ENCODE_ALG_CCMP: | 575 | case IW_ENCODE_ALG_CCMP: |
580 | alg = "CCMP"; | 576 | alg = "CCMP"; |
581 | module = "ieee80211_crypt_ccmp"; | ||
582 | break; | 577 | break; |
583 | default: | 578 | default: |
584 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", | 579 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", |
@@ -589,10 +584,8 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
589 | printk("alg name:%s\n",alg); | 584 | printk("alg name:%s\n",alg); |
590 | 585 | ||
591 | ops = ieee80211_get_crypto_ops(alg); | 586 | ops = ieee80211_get_crypto_ops(alg); |
592 | if (ops == NULL) { | 587 | if (ops == NULL) |
593 | request_module("%s", module); | ||
594 | ops = ieee80211_get_crypto_ops(alg); | 588 | ops = ieee80211_get_crypto_ops(alg); |
595 | } | ||
596 | if (ops == NULL) { | 589 | if (ops == NULL) { |
597 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", | 590 | IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", |
598 | dev->name, ext->alg); | 591 | dev->name, ext->alg); |
@@ -612,7 +605,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee, | |||
612 | goto done; | 605 | goto done; |
613 | } | 606 | } |
614 | new_crypt->ops = ops; | 607 | new_crypt->ops = ops; |
615 | if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) | 608 | if (new_crypt->ops) |
616 | new_crypt->priv = new_crypt->ops->init(idx); | 609 | new_crypt->priv = new_crypt->ops->init(idx); |
617 | if (new_crypt->priv == NULL) { | 610 | if (new_crypt->priv == NULL) { |
618 | kfree(new_crypt); | 611 | kfree(new_crypt); |
diff --git a/drivers/staging/stlc45xx/Kconfig b/drivers/staging/stlc45xx/Kconfig deleted file mode 100644 index 947fb75a9c68..000000000000 --- a/drivers/staging/stlc45xx/Kconfig +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | config STLC45XX | ||
2 | tristate "stlc4550/4560 support" | ||
3 | depends on MAC80211 && WLAN_80211 && SPI_MASTER && GENERIC_HARDIRQS | ||
4 | ---help--- | ||
5 | This is a driver for stlc4550 and stlc4560 chipsets. | ||
6 | |||
7 | To compile this driver as a module, choose M here: the module will be | ||
8 | called stlc45xx. If unsure, say N. | ||
diff --git a/drivers/staging/stlc45xx/Makefile b/drivers/staging/stlc45xx/Makefile deleted file mode 100644 index 7ee32903055a..000000000000 --- a/drivers/staging/stlc45xx/Makefile +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | obj-$(CONFIG_STLC45XX) += stlc45xx.o | ||
diff --git a/drivers/staging/stlc45xx/stlc45xx.c b/drivers/staging/stlc45xx/stlc45xx.c deleted file mode 100644 index be99eb33d817..000000000000 --- a/drivers/staging/stlc45xx/stlc45xx.c +++ /dev/null | |||
@@ -1,2594 +0,0 @@ | |||
1 | /* | ||
2 | * This file is part of stlc45xx | ||
3 | * | ||
4 | * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies). | ||
5 | * | ||
6 | * Contact: Kalle Valo <kalle.valo@nokia.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * version 2 as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but | ||
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
15 | * General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
20 | * 02110-1301 USA | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | #include "stlc45xx.h" | ||
25 | |||
26 | #include <linux/module.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/interrupt.h> | ||
29 | #include <linux/firmware.h> | ||
30 | #include <linux/delay.h> | ||
31 | #include <linux/irq.h> | ||
32 | #include <linux/spi/spi.h> | ||
33 | #include <linux/etherdevice.h> | ||
34 | #include <linux/gpio.h> | ||
35 | #include <linux/moduleparam.h> | ||
36 | |||
37 | #include "stlc45xx_lmac.h" | ||
38 | |||
39 | /* | ||
40 | * gpios should be handled in board files and provided via platform data, | ||
41 | * but because it's currently impossible for stlc45xx to have a header file | ||
42 | * in include/linux, let's use module paramaters for now | ||
43 | */ | ||
44 | static int stlc45xx_gpio_power = 97; | ||
45 | module_param(stlc45xx_gpio_power, int, 0444); | ||
46 | MODULE_PARM_DESC(stlc45xx_gpio_power, "stlc45xx gpio number for power line"); | ||
47 | |||
48 | static int stlc45xx_gpio_irq = 87; | ||
49 | module_param(stlc45xx_gpio_irq, int, 0444); | ||
50 | MODULE_PARM_DESC(stlc45xx_gpio_irq, "stlc45xx gpio number for irq line"); | ||
51 | |||
52 | static const u8 default_cal_channels[] = { | ||
53 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
54 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6c, 0x09, | ||
55 | 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, | ||
56 | 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xe0, 0x00, 0xe0, 0x00, | ||
57 | 0xe0, 0x00, 0xe0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, | ||
58 | 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, | ||
59 | 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, | ||
60 | 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, | ||
61 | 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, | ||
62 | 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, | ||
63 | 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, | ||
64 | 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, | ||
65 | 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, | ||
66 | 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, | ||
67 | 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, | ||
68 | 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, | ||
69 | 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, | ||
70 | 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, | ||
71 | 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, | ||
72 | 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, | ||
73 | 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
74 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
75 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
76 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
77 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
78 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
79 | 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
80 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
81 | 0x00, 0x00, 0x00, 0x00, 0x71, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, | ||
82 | 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, | ||
83 | 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, | ||
84 | 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, | ||
85 | 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, | ||
86 | 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, | ||
87 | 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, | ||
88 | 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, | ||
89 | 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, | ||
90 | 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, | ||
91 | 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, | ||
92 | 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, | ||
93 | 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, | ||
94 | 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, | ||
95 | 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, | ||
96 | 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, | ||
97 | 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, | ||
98 | 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, | ||
99 | 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, | ||
100 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
101 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
102 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
103 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
104 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
105 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, | ||
106 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
107 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76, | ||
108 | 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, | ||
109 | 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0, | ||
110 | 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, | ||
111 | 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, | ||
112 | 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, | ||
113 | 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, | ||
114 | 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, | ||
115 | 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, | ||
116 | 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, | ||
117 | 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, | ||
118 | 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, | ||
119 | 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, | ||
120 | 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, | ||
121 | 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, | ||
122 | 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, | ||
123 | 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, | ||
124 | 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, | ||
125 | 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, | ||
126 | 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
127 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
128 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
129 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
130 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
131 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
132 | 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
133 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
134 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x7b, 0x09, 0x00, 0x00, 0xc9, 0xff, | ||
135 | 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, | ||
136 | 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, | ||
137 | 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, | ||
138 | 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, | ||
139 | 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, | ||
140 | 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, | ||
141 | 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, | ||
142 | 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, | ||
143 | 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, | ||
144 | 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, | ||
145 | 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, | ||
146 | 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, | ||
147 | 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, | ||
148 | 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, | ||
149 | 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, | ||
150 | 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, | ||
151 | 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, | ||
152 | 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, | ||
153 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
154 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
155 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
156 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
157 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
158 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, | ||
159 | 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
160 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
161 | 0x80, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, | ||
162 | 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xf0, 0x00, | ||
163 | 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, | ||
164 | 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, | ||
165 | 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, | ||
166 | 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, | ||
167 | 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, | ||
168 | 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, | ||
169 | 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, | ||
170 | 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, | ||
171 | 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, | ||
172 | 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, | ||
173 | 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, | ||
174 | 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, | ||
175 | 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, | ||
176 | 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, | ||
177 | 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, | ||
178 | 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, | ||
179 | 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
180 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
181 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
182 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
183 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
184 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
185 | 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, | ||
186 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
187 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x09, 0x00, 0x00, 0xc9, | ||
188 | 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, | ||
189 | 0x10, 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, | ||
190 | 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, | ||
191 | 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, | ||
192 | 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, | ||
193 | 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, | ||
194 | 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, | ||
195 | 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, | ||
196 | 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, | ||
197 | 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, | ||
198 | 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, | ||
199 | 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, | ||
200 | 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, | ||
201 | 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, | ||
202 | 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, | ||
203 | 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, | ||
204 | 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, | ||
205 | 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, | ||
206 | 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
207 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
208 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
209 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
210 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
211 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, | ||
212 | 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
213 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
214 | 0x00, 0x8a, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, | ||
215 | 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xf0, | ||
216 | 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00, 0xd0, 0x00, | ||
217 | 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, | ||
218 | 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, | ||
219 | 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, | ||
220 | 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, | ||
221 | 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, | ||
222 | 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, | ||
223 | 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, | ||
224 | 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, | ||
225 | 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, | ||
226 | 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, | ||
227 | 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, | ||
228 | 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, | ||
229 | 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, | ||
230 | 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, | ||
231 | 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, | ||
232 | 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, | ||
233 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
234 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
235 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
236 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
237 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
238 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, | ||
239 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
240 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x09, 0x00, 0x00, | ||
241 | 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, | ||
242 | 0x01, 0x10, 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, | ||
243 | 0xf0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, | ||
244 | 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, | ||
245 | 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, | ||
246 | 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, | ||
247 | 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, | ||
248 | 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, | ||
249 | 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, | ||
250 | 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, | ||
251 | 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, | ||
252 | 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, | ||
253 | 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, | ||
254 | 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, | ||
255 | 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, | ||
256 | 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, | ||
257 | 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, | ||
258 | 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, | ||
259 | 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
260 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
261 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
262 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
263 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
264 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
265 | 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
266 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
267 | 0x00, 0x00, 0x94, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, | ||
268 | 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, | ||
269 | 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00, 0xd0, | ||
270 | 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, | ||
271 | 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, | ||
272 | 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, | ||
273 | 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, | ||
274 | 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, | ||
275 | 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, | ||
276 | 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, | ||
277 | 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, | ||
278 | 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, | ||
279 | 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, | ||
280 | 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, | ||
281 | 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, | ||
282 | 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, | ||
283 | 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, | ||
284 | 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, | ||
285 | 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, | ||
286 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
287 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
288 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
289 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
290 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
291 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, | ||
292 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
293 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x99, 0x09, 0x00, | ||
294 | 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, | ||
295 | 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, | ||
296 | 0x00, 0xf0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, | ||
297 | 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, | ||
298 | 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, | ||
299 | 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, | ||
300 | 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, | ||
301 | 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, | ||
302 | 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, | ||
303 | 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, | ||
304 | 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, | ||
305 | 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, | ||
306 | 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, | ||
307 | 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, | ||
308 | 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, | ||
309 | 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, | ||
310 | 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, | ||
311 | 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, | ||
312 | 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
313 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
314 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
315 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
316 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
317 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
318 | 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
319 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
320 | 0x00, 0x00, 0x00, 0x9e, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, | ||
321 | 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, | ||
322 | 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00, | ||
323 | 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, | ||
324 | 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, | ||
325 | 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, | ||
326 | 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, | ||
327 | 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, | ||
328 | 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, | ||
329 | 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, | ||
330 | 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, | ||
331 | 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, | ||
332 | 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, | ||
333 | 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, | ||
334 | 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, | ||
335 | 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, | ||
336 | 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, | ||
337 | 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, | ||
338 | 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, | ||
339 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
340 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
341 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
342 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
343 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
344 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, | ||
345 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
346 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
347 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
348 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
349 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
350 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
351 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
352 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
353 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
354 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
355 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
356 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
357 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
358 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
359 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
360 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
361 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
362 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
363 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
364 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
365 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
366 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
367 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
368 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
369 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
370 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
371 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
372 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
373 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
374 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
375 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
376 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
377 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
378 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
379 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
380 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
381 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
382 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
383 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
384 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
385 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
386 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
387 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
388 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
389 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
390 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
391 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
392 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
393 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
394 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
395 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
396 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
397 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
398 | 0x00 }; | ||
399 | |||
400 | static const u8 default_cal_rssi[] = { | ||
401 | 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, | ||
402 | 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, | ||
403 | 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, | ||
404 | 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, | ||
405 | 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, | ||
406 | 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, | ||
407 | 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, | ||
408 | 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, | ||
409 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, | ||
410 | 0x00, 0x00, 0x00, 0x00, 0x00 }; | ||
411 | |||
412 | static void stlc45xx_tx_edcf(struct stlc45xx *stlc); | ||
413 | static void stlc45xx_tx_setup(struct stlc45xx *stlc); | ||
414 | static void stlc45xx_tx_scan(struct stlc45xx *stlc); | ||
415 | static void stlc45xx_tx_psm(struct stlc45xx *stlc, bool enable); | ||
416 | static int stlc45xx_tx_nullfunc(struct stlc45xx *stlc, bool powersave); | ||
417 | static int stlc45xx_tx_pspoll(struct stlc45xx *stlc, bool powersave); | ||
418 | |||
419 | static ssize_t stlc45xx_sysfs_show_cal_rssi(struct device *dev, | ||
420 | struct device_attribute *attr, | ||
421 | char *buf) | ||
422 | { | ||
423 | struct stlc45xx *stlc = dev_get_drvdata(dev); | ||
424 | ssize_t len; | ||
425 | |||
426 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
427 | |||
428 | len = PAGE_SIZE; | ||
429 | |||
430 | mutex_lock(&stlc->mutex); | ||
431 | |||
432 | if (stlc->cal_rssi) | ||
433 | hex_dump_to_buffer(stlc->cal_rssi, RSSI_CAL_ARRAY_LEN, 16, | ||
434 | 2, buf, len, 0); | ||
435 | mutex_unlock(&stlc->mutex); | ||
436 | |||
437 | len = strlen(buf); | ||
438 | |||
439 | return len; | ||
440 | } | ||
441 | |||
442 | static ssize_t stlc45xx_sysfs_store_cal_rssi(struct device *dev, | ||
443 | struct device_attribute *attr, | ||
444 | const char *buf, size_t count) | ||
445 | { | ||
446 | struct stlc45xx *stlc = dev_get_drvdata(dev); | ||
447 | |||
448 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
449 | |||
450 | mutex_lock(&stlc->mutex); | ||
451 | |||
452 | if (count != RSSI_CAL_ARRAY_LEN) { | ||
453 | stlc45xx_error("invalid cal_rssi length: %zu", count); | ||
454 | count = 0; | ||
455 | goto out_unlock; | ||
456 | } | ||
457 | |||
458 | kfree(stlc->cal_rssi); | ||
459 | |||
460 | stlc->cal_rssi = kmemdup(buf, RSSI_CAL_ARRAY_LEN, GFP_KERNEL); | ||
461 | |||
462 | if (!stlc->cal_rssi) { | ||
463 | stlc45xx_error("failed to allocate memory for cal_rssi"); | ||
464 | count = 0; | ||
465 | goto out_unlock; | ||
466 | } | ||
467 | |||
468 | out_unlock: | ||
469 | mutex_unlock(&stlc->mutex); | ||
470 | |||
471 | return count; | ||
472 | } | ||
473 | |||
474 | static ssize_t stlc45xx_sysfs_show_cal_channels(struct device *dev, | ||
475 | struct device_attribute *attr, | ||
476 | char *buf) | ||
477 | { | ||
478 | struct stlc45xx *stlc = dev_get_drvdata(dev); | ||
479 | ssize_t len; | ||
480 | |||
481 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
482 | |||
483 | len = PAGE_SIZE; | ||
484 | |||
485 | mutex_lock(&stlc->mutex); | ||
486 | |||
487 | if (stlc->cal_channels) | ||
488 | hex_dump_to_buffer(stlc->cal_channels, CHANNEL_CAL_ARRAY_LEN, | ||
489 | 16, 2, buf, len, 0); | ||
490 | |||
491 | mutex_unlock(&stlc->mutex); | ||
492 | |||
493 | len = strlen(buf); | ||
494 | |||
495 | return len; | ||
496 | } | ||
497 | |||
498 | static ssize_t stlc45xx_sysfs_store_cal_channels(struct device *dev, | ||
499 | struct device_attribute *attr, | ||
500 | const char *buf, size_t count) | ||
501 | { | ||
502 | struct stlc45xx *stlc = dev_get_drvdata(dev); | ||
503 | |||
504 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
505 | |||
506 | mutex_lock(&stlc->mutex); | ||
507 | |||
508 | if (count != CHANNEL_CAL_ARRAY_LEN) { | ||
509 | stlc45xx_error("invalid cal_channels size: %zu ", count); | ||
510 | count = 0; | ||
511 | goto out_unlock; | ||
512 | } | ||
513 | |||
514 | kfree(stlc->cal_channels); | ||
515 | |||
516 | stlc->cal_channels = kmemdup(buf, count, GFP_KERNEL); | ||
517 | |||
518 | if (!stlc->cal_channels) { | ||
519 | stlc45xx_error("failed to allocate memory for cal_channels"); | ||
520 | count = 0; | ||
521 | goto out_unlock; | ||
522 | } | ||
523 | |||
524 | out_unlock: | ||
525 | mutex_unlock(&stlc->mutex); | ||
526 | |||
527 | return count; | ||
528 | } | ||
529 | |||
530 | static ssize_t stlc45xx_sysfs_show_tx_buf(struct device *dev, | ||
531 | struct device_attribute *attr, | ||
532 | char *buf) | ||
533 | { | ||
534 | struct stlc45xx *stlc = dev_get_drvdata(dev); | ||
535 | struct txbuffer *entry; | ||
536 | ssize_t len = 0; | ||
537 | |||
538 | stlc45xx_debug(DEBUG_FUNC, "%s()", __func__); | ||
539 | |||
540 | mutex_lock(&stlc->mutex); | ||
541 | |||
542 | list_for_each_entry(entry, &stlc->tx_sent, tx_list) { | ||
543 | len += sprintf(buf + len, "0x%x: 0x%x-0x%x\n", | ||
544 | entry->handle, entry->start, | ||
545 | entry->end); | ||
546 | } | ||
547 | |||
548 | mutex_unlock(&stlc->mutex); | ||
549 | |||
550 | return len; | ||
551 | } | ||
552 | |||
553 | static DEVICE_ATTR(cal_rssi, S_IRUGO | S_IWUSR, | ||
554 | stlc45xx_sysfs_show_cal_rssi, | ||
555 | stlc45xx_sysfs_store_cal_rssi); | ||
556 | static DEVICE_ATTR(cal_channels, S_IRUGO | S_IWUSR, | ||
557 | stlc45xx_sysfs_show_cal_channels, | ||
558 | stlc45xx_sysfs_store_cal_channels); | ||
559 | static DEVICE_ATTR(tx_buf, S_IRUGO, stlc45xx_sysfs_show_tx_buf, NULL); | ||
560 | |||
561 | static void stlc45xx_spi_read(struct stlc45xx *stlc, unsigned long addr, | ||
562 | void *buf, size_t len) | ||
563 | { | ||
564 | struct spi_transfer t[2]; | ||
565 | struct spi_message m; | ||
566 | |||
567 | /* We first push the address */ | ||
568 | addr = (addr << 8) | ADDR_READ_BIT_15; | ||
569 | |||
570 | spi_message_init(&m); | ||
571 | memset(t, 0, sizeof(t)); | ||
572 | |||
573 | t[0].tx_buf = &addr; | ||
574 | t[0].len = 2; | ||
575 | spi_message_add_tail(&t[0], &m); | ||
576 | |||
577 | t[1].rx_buf = buf; | ||
578 | t[1].len = len; | ||
579 | spi_message_add_tail(&t[1], &m); | ||
580 | |||
581 | spi_sync(stlc->spi, &m); | ||
582 | } | ||
583 | |||
584 | |||
585 | static void stlc45xx_spi_write(struct stlc45xx *stlc, unsigned long addr, | ||
586 | void *buf, size_t len) | ||
587 | { | ||
588 | struct spi_transfer t[3]; | ||
589 | struct spi_message m; | ||
590 | u16 last_word; | ||
591 | |||
592 | /* We first push the address */ | ||
593 | addr = addr << 8; | ||
594 | |||
595 | spi_message_init(&m); | ||
596 | memset(t, 0, sizeof(t)); | ||
597 | |||
598 | t[0].tx_buf = &addr; | ||
599 | t[0].len = 2; | ||
600 | spi_message_add_tail(&t[0], &m); | ||
601 | |||
602 | t[1].tx_buf = buf; | ||
603 | t[1].len = len; | ||
604 | spi_message_add_tail(&t[1], &m); | ||
605 | |||
606 | if (len % 2) { | ||
607 | last_word = ((u8 *)buf)[len - 1]; | ||
608 | |||
609 | t[2].tx_buf = &last_word; | ||
610 | t[2].len = 2; | ||
611 | spi_message_add_tail(&t[2], &m); | ||
612 | } | ||
613 | |||
614 | spi_sync(stlc->spi, &m); | ||
615 | } | ||
616 | |||
617 | static u16 stlc45xx_read16(struct stlc45xx *stlc, unsigned long addr) | ||
618 | { | ||
619 | u16 val; | ||
620 | |||
621 | stlc45xx_spi_read(stlc, addr, &val, sizeof(val)); | ||
622 | |||
623 | return val; | ||
624 | } | ||
625 | |||
626 | static u32 stlc45xx_read32(struct stlc45xx *stlc, unsigned long addr) | ||
627 | { | ||
628 | u32 val; | ||
629 | |||
630 | stlc45xx_spi_read(stlc, addr, &val, sizeof(val)); | ||
631 | |||
632 | return val; | ||
633 | } | ||
634 | |||
635 | static void stlc45xx_write16(struct stlc45xx *stlc, unsigned long addr, u16 val) | ||
636 | { | ||
637 | stlc45xx_spi_write(stlc, addr, &val, sizeof(val)); | ||
638 | } | ||
639 | |||
640 | static void stlc45xx_write32(struct stlc45xx *stlc, unsigned long addr, u32 val) | ||
641 | { | ||
642 | stlc45xx_spi_write(stlc, addr, &val, sizeof(val)); | ||
643 | } | ||
644 | |||
645 | struct stlc45xx_spi_reg { | ||
646 | u16 address; | ||
647 | u16 length; | ||
648 | char *name; | ||
649 | }; | ||
650 | |||
651 | /* caller must hold tx_lock */ | ||
652 | static void stlc45xx_txbuffer_dump(struct stlc45xx *stlc) | ||
653 | { | ||
654 | struct txbuffer *txbuffer; | ||
655 | char *buf, *pos; | ||
656 | int buf_len, l, count; | ||
657 | |||
658 | if (!(DEBUG_LEVEL & DEBUG_TXBUFFER)) | ||
659 | return; | ||
660 | |||
661 | stlc45xx_debug(DEBUG_FUNC, "%s()", __func__); | ||
662 | |||
663 | buf_len = 500; | ||
664 | buf = kmalloc(buf_len, GFP_ATOMIC); | ||
665 | if (!buf) | ||
666 | return; | ||
667 | |||
668 | pos = buf; | ||
669 | count = 0; | ||
670 | |||
671 | list_for_each_entry(txbuffer, &stlc->txbuffer, buffer_list) { | ||
672 | l = snprintf(pos, buf_len, "0x%x-0x%x,", | ||
673 | txbuffer->start, txbuffer->end); | ||
674 | /* drop the null byte */ | ||
675 | pos += l; | ||
676 | buf_len -= l; | ||
677 | count++; | ||
678 | } | ||
679 | |||
680 | if (count == 0) | ||
681 | *pos = '\0'; | ||
682 | else | ||
683 | *--pos = '\0'; | ||
684 | |||
685 | stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: in buffer %d regions: %s", | ||
686 | count, buf); | ||
687 | |||
688 | kfree(buf); | ||
689 | } | ||
690 | |||
691 | /* caller must hold tx_lock */ | ||
692 | static int stlc45xx_txbuffer_find(struct stlc45xx *stlc, size_t len) | ||
693 | { | ||
694 | struct txbuffer *txbuffer; | ||
695 | int pos; | ||
696 | |||
697 | stlc45xx_debug(DEBUG_FUNC, "%s()", __func__); | ||
698 | |||
699 | pos = FIRMWARE_TXBUFFER_START; | ||
700 | |||
701 | if (list_empty(&stlc->txbuffer)) | ||
702 | goto out; | ||
703 | |||
704 | /* | ||
705 | * the entries in txbuffer must be in the same order as they are in | ||
706 | * the real buffer | ||
707 | */ | ||
708 | list_for_each_entry(txbuffer, &stlc->txbuffer, buffer_list) { | ||
709 | if (pos + len < txbuffer->start) | ||
710 | break; | ||
711 | pos = ALIGN(txbuffer->end + 1, 4); | ||
712 | } | ||
713 | |||
714 | if (pos + len > FIRMWARE_TXBUFFER_END) | ||
715 | /* not enough room */ | ||
716 | pos = -1; | ||
717 | |||
718 | stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: find %zu B: 0x%x", len, pos); | ||
719 | |||
720 | out: | ||
721 | return pos; | ||
722 | } | ||
723 | |||
724 | static int stlc45xx_txbuffer_add(struct stlc45xx *stlc, | ||
725 | struct txbuffer *txbuffer) | ||
726 | { | ||
727 | struct txbuffer *r, *prev = NULL; | ||
728 | |||
729 | if (list_empty(&stlc->txbuffer)) { | ||
730 | list_add(&txbuffer->buffer_list, &stlc->txbuffer); | ||
731 | return 0; | ||
732 | } | ||
733 | |||
734 | r = list_first_entry(&stlc->txbuffer, struct txbuffer, buffer_list); | ||
735 | |||
736 | if (txbuffer->start < r->start) { | ||
737 | /* add to the beginning of the list */ | ||
738 | list_add(&txbuffer->buffer_list, &stlc->txbuffer); | ||
739 | return 0; | ||
740 | } | ||
741 | |||
742 | prev = NULL; | ||
743 | list_for_each_entry(r, &stlc->txbuffer, buffer_list) { | ||
744 | /* skip first entry, we checked for that above */ | ||
745 | if (!prev) { | ||
746 | prev = r; | ||
747 | continue; | ||
748 | } | ||
749 | |||
750 | /* double-check overlaps */ | ||
751 | WARN_ON_ONCE(txbuffer->start >= r->start && | ||
752 | txbuffer->start <= r->end); | ||
753 | WARN_ON_ONCE(txbuffer->end >= r->start && | ||
754 | txbuffer->end <= r->end); | ||
755 | |||
756 | if (prev->end < txbuffer->start && | ||
757 | txbuffer->end < r->start) { | ||
758 | /* insert at this spot */ | ||
759 | list_add_tail(&txbuffer->buffer_list, &r->buffer_list); | ||
760 | return 0; | ||
761 | } | ||
762 | |||
763 | prev = r; | ||
764 | } | ||
765 | |||
766 | /* not found */ | ||
767 | list_add_tail(&txbuffer->buffer_list, &stlc->txbuffer); | ||
768 | |||
769 | return 0; | ||
770 | |||
771 | } | ||
772 | |||
773 | /* caller must hold tx_lock */ | ||
774 | static struct txbuffer *stlc45xx_txbuffer_alloc(struct stlc45xx *stlc, | ||
775 | size_t frame_len) | ||
776 | { | ||
777 | struct txbuffer *entry = NULL; | ||
778 | size_t len; | ||
779 | int pos; | ||
780 | |||
781 | stlc45xx_debug(DEBUG_FUNC, "%s()", __func__); | ||
782 | |||
783 | len = FIRMWARE_TXBUFFER_HEADER + frame_len + FIRMWARE_TXBUFFER_TRAILER; | ||
784 | pos = stlc45xx_txbuffer_find(stlc, len); | ||
785 | |||
786 | if (pos < 0) | ||
787 | return NULL; | ||
788 | |||
789 | WARN_ON_ONCE(pos + len > FIRMWARE_TXBUFFER_END); | ||
790 | WARN_ON_ONCE(pos < FIRMWARE_TXBUFFER_START); | ||
791 | |||
792 | entry = kmalloc(sizeof(*entry), GFP_ATOMIC); | ||
793 | entry->start = pos; | ||
794 | entry->frame_start = pos + FIRMWARE_TXBUFFER_HEADER; | ||
795 | entry->end = entry->start + len - 1; | ||
796 | |||
797 | stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: allocated 0x%x-0x%x", | ||
798 | entry->start, entry->end); | ||
799 | |||
800 | stlc45xx_txbuffer_add(stlc, entry); | ||
801 | |||
802 | stlc45xx_txbuffer_dump(stlc); | ||
803 | |||
804 | return entry; | ||
805 | } | ||
806 | |||
807 | /* caller must hold tx_lock */ | ||
808 | static void stlc45xx_txbuffer_free(struct stlc45xx *stlc, | ||
809 | struct txbuffer *txbuffer) | ||
810 | { | ||
811 | stlc45xx_debug(DEBUG_FUNC, "%s()", __func__); | ||
812 | |||
813 | stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: freed 0x%x-0x%x", | ||
814 | txbuffer->start, txbuffer->end); | ||
815 | |||
816 | list_del(&txbuffer->buffer_list); | ||
817 | kfree(txbuffer); | ||
818 | } | ||
819 | |||
820 | |||
821 | static int stlc45xx_wait_bit(struct stlc45xx *stlc, u16 reg, u32 mask, | ||
822 | u32 expected) | ||
823 | { | ||
824 | int i; | ||
825 | char buffer[4]; | ||
826 | |||
827 | for (i = 0; i < 2000; i++) { | ||
828 | stlc45xx_spi_read(stlc, reg, buffer, sizeof(buffer)); | ||
829 | if (((*(u32 *)buffer) & mask) == expected) | ||
830 | return 1; | ||
831 | msleep(1); | ||
832 | } | ||
833 | |||
834 | return 0; | ||
835 | } | ||
836 | |||
837 | static int stlc45xx_request_firmware(struct stlc45xx *stlc) | ||
838 | { | ||
839 | const struct firmware *fw; | ||
840 | int ret; | ||
841 | |||
842 | /* FIXME: should driver use it's own struct device? */ | ||
843 | ret = request_firmware(&fw, "3826.arm", &stlc->spi->dev); | ||
844 | |||
845 | if (ret < 0) { | ||
846 | stlc45xx_error("request_firmware() failed: %d", ret); | ||
847 | return ret; | ||
848 | } | ||
849 | |||
850 | if (fw->size % 4) { | ||
851 | stlc45xx_error("firmware size is not multiple of 32bit: %zu", | ||
852 | fw->size); | ||
853 | return -EILSEQ; /* Illegal byte sequence */; | ||
854 | } | ||
855 | |||
856 | if (fw->size < 1000) { | ||
857 | stlc45xx_error("firmware is too small: %zu", fw->size); | ||
858 | return -EILSEQ; | ||
859 | } | ||
860 | |||
861 | stlc->fw = kmemdup(fw->data, fw->size, GFP_KERNEL); | ||
862 | if (!stlc->fw) { | ||
863 | stlc45xx_error("could not allocate memory for firmware"); | ||
864 | return -ENOMEM; | ||
865 | } | ||
866 | |||
867 | stlc->fw_len = fw->size; | ||
868 | |||
869 | release_firmware(fw); | ||
870 | |||
871 | return 0; | ||
872 | } | ||
873 | |||
874 | static int stlc45xx_upload_firmware(struct stlc45xx *stlc) | ||
875 | { | ||
876 | struct s_dma_regs dma_regs; | ||
877 | unsigned long fw_len, fw_addr; | ||
878 | long _fw_len; | ||
879 | int ret; | ||
880 | |||
881 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
882 | |||
883 | if (!stlc->fw) { | ||
884 | ret = stlc45xx_request_firmware(stlc); | ||
885 | if (ret < 0) | ||
886 | return ret; | ||
887 | } | ||
888 | |||
889 | /* stop the device */ | ||
890 | stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT, | ||
891 | SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET | ||
892 | | SPI_CTRL_STAT_START_HALTED); | ||
893 | |||
894 | msleep(TARGET_BOOT_SLEEP); | ||
895 | |||
896 | stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT, | ||
897 | SPI_CTRL_STAT_HOST_OVERRIDE | ||
898 | | SPI_CTRL_STAT_START_HALTED); | ||
899 | |||
900 | msleep(TARGET_BOOT_SLEEP); | ||
901 | |||
902 | fw_addr = FIRMWARE_ADDRESS; | ||
903 | fw_len = stlc->fw_len; | ||
904 | |||
905 | while (fw_len > 0) { | ||
906 | _fw_len = (fw_len > SPI_MAX_PACKET_SIZE) | ||
907 | ? SPI_MAX_PACKET_SIZE : fw_len; | ||
908 | dma_regs.cmd = SPI_DMA_WRITE_CTRL_ENABLE; | ||
909 | dma_regs.len = cpu_to_le16(_fw_len); | ||
910 | dma_regs.addr = cpu_to_le32(fw_addr); | ||
911 | |||
912 | fw_len -= _fw_len; | ||
913 | fw_addr += _fw_len; | ||
914 | |||
915 | stlc45xx_write16(stlc, SPI_ADRS_DMA_WRITE_CTRL, dma_regs.cmd); | ||
916 | |||
917 | if (stlc45xx_wait_bit(stlc, SPI_ADRS_DMA_WRITE_CTRL, | ||
918 | HOST_ALLOWED, HOST_ALLOWED) == 0) { | ||
919 | stlc45xx_error("fw_upload not allowed to DMA write"); | ||
920 | return -EAGAIN; | ||
921 | } | ||
922 | |||
923 | stlc45xx_write16(stlc, SPI_ADRS_DMA_WRITE_LEN, dma_regs.len); | ||
924 | stlc45xx_write32(stlc, SPI_ADRS_DMA_WRITE_BASE, dma_regs.addr); | ||
925 | |||
926 | stlc45xx_spi_write(stlc, SPI_ADRS_DMA_DATA, stlc->fw, _fw_len); | ||
927 | |||
928 | /* FIXME: I think this doesn't work if firmware is large, | ||
929 | * this loop goes to second round. fw->data is not | ||
930 | * increased at all! */ | ||
931 | } | ||
932 | |||
933 | BUG_ON(fw_len != 0); | ||
934 | |||
935 | /* enable host interrupts */ | ||
936 | stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_EN, SPI_HOST_INTS_DEFAULT); | ||
937 | |||
938 | /* boot the device */ | ||
939 | stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT, | ||
940 | SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET | ||
941 | | SPI_CTRL_STAT_RAM_BOOT); | ||
942 | |||
943 | msleep(TARGET_BOOT_SLEEP); | ||
944 | |||
945 | stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT, | ||
946 | SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT); | ||
947 | msleep(TARGET_BOOT_SLEEP); | ||
948 | |||
949 | return 0; | ||
950 | } | ||
951 | |||
952 | /* caller must hold tx_lock */ | ||
953 | static void stlc45xx_check_txsent(struct stlc45xx *stlc) | ||
954 | { | ||
955 | struct txbuffer *entry, *n; | ||
956 | |||
957 | list_for_each_entry_safe(entry, n, &stlc->tx_sent, tx_list) { | ||
958 | if (time_after(jiffies, entry->lifetime)) { | ||
959 | if (net_ratelimit()) | ||
960 | stlc45xx_warning("frame 0x%x lifetime exceeded", | ||
961 | entry->start); | ||
962 | list_del(&entry->tx_list); | ||
963 | skb_pull(entry->skb, entry->header_len); | ||
964 | ieee80211_tx_status(stlc->hw, entry->skb); | ||
965 | stlc45xx_txbuffer_free(stlc, entry); | ||
966 | } | ||
967 | } | ||
968 | } | ||
969 | |||
970 | static void stlc45xx_power_off(struct stlc45xx *stlc) | ||
971 | { | ||
972 | disable_irq(gpio_to_irq(stlc45xx_gpio_irq)); | ||
973 | gpio_set_value(stlc45xx_gpio_power, 0); | ||
974 | } | ||
975 | |||
976 | static void stlc45xx_power_on(struct stlc45xx *stlc) | ||
977 | { | ||
978 | gpio_set_value(stlc45xx_gpio_power, 1); | ||
979 | enable_irq(gpio_to_irq(stlc45xx_gpio_irq)); | ||
980 | |||
981 | /* | ||
982 | * need to wait a while before device can be accessed, the length | ||
983 | * is just a guess | ||
984 | */ | ||
985 | msleep(10); | ||
986 | } | ||
987 | |||
988 | /* caller must hold tx_lock */ | ||
989 | static void stlc45xx_flush_queues(struct stlc45xx *stlc) | ||
990 | { | ||
991 | struct txbuffer *entry; | ||
992 | |||
993 | while (!list_empty(&stlc->tx_sent)) { | ||
994 | entry = list_first_entry(&stlc->tx_sent, | ||
995 | struct txbuffer, tx_list); | ||
996 | list_del(&entry->tx_list); | ||
997 | dev_kfree_skb(entry->skb); | ||
998 | stlc45xx_txbuffer_free(stlc, entry); | ||
999 | } | ||
1000 | |||
1001 | WARN_ON(!list_empty(&stlc->tx_sent)); | ||
1002 | |||
1003 | while (!list_empty(&stlc->tx_pending)) { | ||
1004 | entry = list_first_entry(&stlc->tx_pending, | ||
1005 | struct txbuffer, tx_list); | ||
1006 | list_del(&entry->tx_list); | ||
1007 | dev_kfree_skb(entry->skb); | ||
1008 | stlc45xx_txbuffer_free(stlc, entry); | ||
1009 | } | ||
1010 | |||
1011 | WARN_ON(!list_empty(&stlc->tx_pending)); | ||
1012 | WARN_ON(!list_empty(&stlc->txbuffer)); | ||
1013 | } | ||
1014 | |||
1015 | static void stlc45xx_work_reset(struct work_struct *work) | ||
1016 | { | ||
1017 | struct stlc45xx *stlc = container_of(work, struct stlc45xx, | ||
1018 | work_reset); | ||
1019 | |||
1020 | mutex_lock(&stlc->mutex); | ||
1021 | |||
1022 | if (stlc->fw_state != FW_STATE_RESET) | ||
1023 | goto out; | ||
1024 | |||
1025 | stlc45xx_power_off(stlc); | ||
1026 | |||
1027 | mutex_unlock(&stlc->mutex); | ||
1028 | |||
1029 | /* wait that all work_structs have finished, we can't hold | ||
1030 | * stlc->mutex to avoid deadlock */ | ||
1031 | cancel_work_sync(&stlc->work); | ||
1032 | |||
1033 | /* FIXME: find out good value to wait for chip power down */ | ||
1034 | msleep(100); | ||
1035 | |||
1036 | mutex_lock(&stlc->mutex); | ||
1037 | |||
1038 | /* FIXME: we should gracefully handle if the state has changed | ||
1039 | * after re-acquiring mutex */ | ||
1040 | WARN_ON(stlc->fw_state != FW_STATE_RESET); | ||
1041 | |||
1042 | spin_lock_bh(&stlc->tx_lock); | ||
1043 | stlc45xx_flush_queues(stlc); | ||
1044 | spin_unlock_bh(&stlc->tx_lock); | ||
1045 | |||
1046 | stlc->fw_state = FW_STATE_RESETTING; | ||
1047 | |||
1048 | stlc45xx_power_on(stlc); | ||
1049 | stlc45xx_upload_firmware(stlc); | ||
1050 | |||
1051 | out: | ||
1052 | mutex_unlock(&stlc->mutex); | ||
1053 | } | ||
1054 | |||
1055 | /* caller must hold mutex */ | ||
1056 | static void stlc45xx_reset(struct stlc45xx *stlc) | ||
1057 | { | ||
1058 | stlc45xx_warning("resetting firmware"); | ||
1059 | stlc->fw_state = FW_STATE_RESET; | ||
1060 | ieee80211_stop_queues(stlc->hw); | ||
1061 | queue_work(stlc->hw->workqueue, &stlc->work_reset); | ||
1062 | } | ||
1063 | |||
1064 | static void stlc45xx_work_tx_timeout(struct work_struct *work) | ||
1065 | { | ||
1066 | struct stlc45xx *stlc = container_of(work, struct stlc45xx, | ||
1067 | work_tx_timeout.work); | ||
1068 | |||
1069 | stlc45xx_warning("tx timeout"); | ||
1070 | |||
1071 | mutex_lock(&stlc->mutex); | ||
1072 | |||
1073 | if (stlc->fw_state != FW_STATE_READY) | ||
1074 | goto out; | ||
1075 | |||
1076 | stlc45xx_reset(stlc); | ||
1077 | |||
1078 | out: | ||
1079 | mutex_unlock(&stlc->mutex); | ||
1080 | } | ||
1081 | |||
1082 | static void stlc45xx_int_ack(struct stlc45xx *stlc, u32 val) | ||
1083 | { | ||
1084 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1085 | |||
1086 | stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_ACK, val); | ||
1087 | } | ||
1088 | |||
1089 | static void stlc45xx_wakeup(struct stlc45xx *stlc) | ||
1090 | { | ||
1091 | unsigned long timeout; | ||
1092 | u32 ints; | ||
1093 | |||
1094 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1095 | |||
1096 | /* wake the chip */ | ||
1097 | stlc45xx_write32(stlc, SPI_ADRS_ARM_INTERRUPTS, SPI_TARGET_INT_WAKEUP); | ||
1098 | |||
1099 | /* And wait for the READY interrupt */ | ||
1100 | timeout = jiffies + HZ; | ||
1101 | |||
1102 | ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS); | ||
1103 | while (!(ints & SPI_HOST_INT_READY)) { | ||
1104 | if (time_after(jiffies, timeout)) | ||
1105 | goto out; | ||
1106 | ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS); | ||
1107 | } | ||
1108 | |||
1109 | stlc45xx_int_ack(stlc, SPI_HOST_INT_READY); | ||
1110 | |||
1111 | out: | ||
1112 | return; | ||
1113 | } | ||
1114 | |||
1115 | static void stlc45xx_sleep(struct stlc45xx *stlc) | ||
1116 | { | ||
1117 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1118 | |||
1119 | stlc45xx_write32(stlc, SPI_ADRS_ARM_INTERRUPTS, SPI_TARGET_INT_SLEEP); | ||
1120 | } | ||
1121 | |||
1122 | static void stlc45xx_int_ready(struct stlc45xx *stlc) | ||
1123 | { | ||
1124 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1125 | |||
1126 | stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_EN, | ||
1127 | SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE); | ||
1128 | |||
1129 | switch (stlc->fw_state) { | ||
1130 | case FW_STATE_BOOTING: | ||
1131 | stlc->fw_state = FW_STATE_READY; | ||
1132 | complete(&stlc->fw_comp); | ||
1133 | break; | ||
1134 | case FW_STATE_RESETTING: | ||
1135 | stlc->fw_state = FW_STATE_READY; | ||
1136 | |||
1137 | stlc45xx_tx_scan(stlc); | ||
1138 | stlc45xx_tx_setup(stlc); | ||
1139 | stlc45xx_tx_edcf(stlc); | ||
1140 | |||
1141 | ieee80211_wake_queues(stlc->hw); | ||
1142 | break; | ||
1143 | default: | ||
1144 | break; | ||
1145 | } | ||
1146 | } | ||
1147 | |||
1148 | static int stlc45xx_rx_txack(struct stlc45xx *stlc, struct sk_buff *skb) | ||
1149 | { | ||
1150 | struct ieee80211_tx_info *info; | ||
1151 | struct s_lm_control *control; | ||
1152 | struct s_lmo_tx *tx; | ||
1153 | struct txbuffer *entry; | ||
1154 | int found = 0; | ||
1155 | |||
1156 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1157 | |||
1158 | control = (struct s_lm_control *) skb->data; | ||
1159 | tx = (struct s_lmo_tx *) (control + 1); | ||
1160 | |||
1161 | if (list_empty(&stlc->tx_sent)) { | ||
1162 | if (net_ratelimit()) | ||
1163 | stlc45xx_warning("no frames waiting for " | ||
1164 | "acknowledgement"); | ||
1165 | return -1; | ||
1166 | } | ||
1167 | |||
1168 | list_for_each_entry(entry, &stlc->tx_sent, tx_list) { | ||
1169 | if (control->handle == entry->handle) { | ||
1170 | found = 1; | ||
1171 | break; | ||
1172 | } | ||
1173 | } | ||
1174 | |||
1175 | if (!found) { | ||
1176 | if (net_ratelimit()) | ||
1177 | stlc45xx_warning("couldn't find frame for tx ack 0x%x", | ||
1178 | control->handle); | ||
1179 | return -1; | ||
1180 | } | ||
1181 | |||
1182 | stlc45xx_debug(DEBUG_TX, "TX ACK 0x%x", entry->handle); | ||
1183 | |||
1184 | if (entry->status_needed) { | ||
1185 | info = IEEE80211_SKB_CB(entry->skb); | ||
1186 | |||
1187 | if (!(tx->flags & LM_TX_FAILED)) { | ||
1188 | /* frame was acked */ | ||
1189 | info->flags |= IEEE80211_TX_STAT_ACK; | ||
1190 | info->status.ack_signal = tx->rcpi / 2 - 110; | ||
1191 | } | ||
1192 | |||
1193 | skb_pull(entry->skb, entry->header_len); | ||
1194 | |||
1195 | ieee80211_tx_status(stlc->hw, entry->skb); | ||
1196 | } | ||
1197 | |||
1198 | list_del(&entry->tx_list); | ||
1199 | |||
1200 | stlc45xx_check_txsent(stlc); | ||
1201 | if (list_empty(&stlc->tx_sent)) | ||
1202 | /* there are no pending frames, we can stop the tx timeout | ||
1203 | * timer */ | ||
1204 | cancel_delayed_work(&stlc->work_tx_timeout); | ||
1205 | |||
1206 | spin_lock_bh(&stlc->tx_lock); | ||
1207 | |||
1208 | stlc45xx_txbuffer_free(stlc, entry); | ||
1209 | |||
1210 | if (stlc->tx_queue_stopped && | ||
1211 | stlc45xx_txbuffer_find(stlc, MAX_FRAME_LEN) != -1) { | ||
1212 | stlc45xx_debug(DEBUG_QUEUE, "room in tx buffer, waking queues"); | ||
1213 | ieee80211_wake_queues(stlc->hw); | ||
1214 | stlc->tx_queue_stopped = 0; | ||
1215 | } | ||
1216 | |||
1217 | spin_unlock_bh(&stlc->tx_lock); | ||
1218 | |||
1219 | return 0; | ||
1220 | } | ||
1221 | |||
1222 | static int stlc45xx_rx_control(struct stlc45xx *stlc, struct sk_buff *skb) | ||
1223 | { | ||
1224 | struct s_lm_control *control; | ||
1225 | int ret = 0; | ||
1226 | |||
1227 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1228 | |||
1229 | control = (struct s_lm_control *) skb->data; | ||
1230 | |||
1231 | switch (control->oid) { | ||
1232 | case LM_OID_TX: | ||
1233 | ret = stlc45xx_rx_txack(stlc, skb); | ||
1234 | break; | ||
1235 | case LM_OID_SETUP: | ||
1236 | case LM_OID_SCAN: | ||
1237 | case LM_OID_TRAP: | ||
1238 | case LM_OID_EDCF: | ||
1239 | case LM_OID_KEYCACHE: | ||
1240 | case LM_OID_PSM: | ||
1241 | case LM_OID_STATS: | ||
1242 | case LM_OID_LED: | ||
1243 | default: | ||
1244 | stlc45xx_warning("unhandled rx control oid %d\n", | ||
1245 | control->oid); | ||
1246 | break; | ||
1247 | } | ||
1248 | |||
1249 | dev_kfree_skb(skb); | ||
1250 | |||
1251 | return ret; | ||
1252 | } | ||
1253 | |||
1254 | /* copied from mac80211 */ | ||
1255 | static void stlc45xx_parse_elems(u8 *start, size_t len, | ||
1256 | struct stlc45xx_ie_tim **tim, | ||
1257 | size_t *tim_len) | ||
1258 | { | ||
1259 | size_t left = len; | ||
1260 | u8 *pos = start; | ||
1261 | |||
1262 | while (left >= 2) { | ||
1263 | u8 id, elen; | ||
1264 | |||
1265 | id = *pos++; | ||
1266 | elen = *pos++; | ||
1267 | left -= 2; | ||
1268 | |||
1269 | if (elen > left) | ||
1270 | return; | ||
1271 | |||
1272 | switch (id) { | ||
1273 | case WLAN_EID_TIM: | ||
1274 | *tim = (struct stlc45xx_ie_tim *) pos; | ||
1275 | *tim_len = elen; | ||
1276 | break; | ||
1277 | default: | ||
1278 | break; | ||
1279 | } | ||
1280 | |||
1281 | left -= elen; | ||
1282 | pos += elen; | ||
1283 | } | ||
1284 | } | ||
1285 | |||
1286 | /* | ||
1287 | * mac80211 doesn't have support for asking frames with PS-Poll, so let's | ||
1288 | * implement in the driver for now. We have to add support to mac80211 | ||
1289 | * later. | ||
1290 | */ | ||
1291 | static int stlc45xx_check_more_data(struct stlc45xx *stlc, struct sk_buff *skb) | ||
1292 | { | ||
1293 | struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data; | ||
1294 | struct ieee80211_hdr *hdr; | ||
1295 | size_t len; | ||
1296 | u16 fc; | ||
1297 | |||
1298 | hdr = (void *) skb->data + sizeof(*data); | ||
1299 | len = skb->len - sizeof(*data); | ||
1300 | |||
1301 | /* minimum frame length is the null frame length 24 bytes */ | ||
1302 | if (len < 24) { | ||
1303 | stlc45xx_warning("invalid frame length when checking for " | ||
1304 | "more data"); | ||
1305 | return -EINVAL; | ||
1306 | } | ||
1307 | |||
1308 | fc = le16_to_cpu(hdr->frame_control); | ||
1309 | if (!(fc & IEEE80211_FCTL_FROMDS)) | ||
1310 | /* this is not from DS */ | ||
1311 | return 0; | ||
1312 | |||
1313 | if (compare_ether_addr(hdr->addr1, stlc->mac_addr) != 0) | ||
1314 | /* the frame was not for us */ | ||
1315 | return 0; | ||
1316 | |||
1317 | if (!(fc & IEEE80211_FCTL_MOREDATA)) { | ||
1318 | /* AP has no more frames buffered for us */ | ||
1319 | stlc45xx_debug(DEBUG_PSM, "all buffered frames retrieved"); | ||
1320 | stlc->pspolling = false; | ||
1321 | return 0; | ||
1322 | } | ||
1323 | |||
1324 | /* MOREDATA bit is set, let's ask for a new frame from the AP */ | ||
1325 | stlc45xx_tx_pspoll(stlc, stlc->psm); | ||
1326 | |||
1327 | return 0; | ||
1328 | } | ||
1329 | |||
1330 | /* | ||
1331 | * mac80211 cannot read TIM from beacons, so let's add a hack to the | ||
1332 | * driver. We have to add support to mac80211 later. | ||
1333 | */ | ||
1334 | static int stlc45xx_rx_data_beacon(struct stlc45xx *stlc, struct sk_buff *skb) | ||
1335 | { | ||
1336 | struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data; | ||
1337 | size_t len = skb->len, tim_len = 0, baselen, pvbmap_len; | ||
1338 | struct ieee80211_mgmt *mgmt; | ||
1339 | struct stlc45xx_ie_tim *tim = NULL; | ||
1340 | int bmap_offset, index, aid_bit; | ||
1341 | |||
1342 | mgmt = (void *) skb->data + sizeof(*data); | ||
1343 | |||
1344 | baselen = (u8 *) mgmt->u.beacon.variable - (u8 *) mgmt; | ||
1345 | if (baselen > len) { | ||
1346 | stlc45xx_warning("invalid baselen in beacon"); | ||
1347 | return -EINVAL; | ||
1348 | } | ||
1349 | |||
1350 | stlc45xx_parse_elems(mgmt->u.beacon.variable, len - baselen, &tim, | ||
1351 | &tim_len); | ||
1352 | |||
1353 | if (!tim) { | ||
1354 | stlc45xx_warning("didn't find tim from a beacon"); | ||
1355 | return -EINVAL; | ||
1356 | } | ||
1357 | |||
1358 | bmap_offset = tim->bmap_control & 0xfe; | ||
1359 | index = stlc->aid / 8 - bmap_offset; | ||
1360 | |||
1361 | pvbmap_len = tim_len - 3; | ||
1362 | if (index > pvbmap_len) | ||
1363 | return -EINVAL; | ||
1364 | |||
1365 | aid_bit = !!(tim->pvbmap[index] & (1 << stlc->aid % 8)); | ||
1366 | |||
1367 | stlc45xx_debug(DEBUG_PSM, "fc 0x%x duration %d seq %d dtim %u " | ||
1368 | "bmap_control 0x%x aid_bit %d", | ||
1369 | mgmt->frame_control, mgmt->duration, mgmt->seq_ctrl >> 4, | ||
1370 | tim->dtim_count, tim->bmap_control, aid_bit); | ||
1371 | |||
1372 | if (!aid_bit) | ||
1373 | return 0; | ||
1374 | |||
1375 | stlc->pspolling = true; | ||
1376 | stlc45xx_tx_pspoll(stlc, stlc->psm); | ||
1377 | |||
1378 | return 0; | ||
1379 | } | ||
1380 | |||
1381 | static int stlc45xx_rx_data(struct stlc45xx *stlc, struct sk_buff *skb) | ||
1382 | { | ||
1383 | struct ieee80211_rx_status status; | ||
1384 | struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data; | ||
1385 | int align = 0; | ||
1386 | u8 *p, align_len; | ||
1387 | u16 len; | ||
1388 | |||
1389 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1390 | |||
1391 | if (stlc->psm) { | ||
1392 | if (data->flags & LM_IN_BEACON) | ||
1393 | stlc45xx_rx_data_beacon(stlc, skb); | ||
1394 | else if (stlc->pspolling && (data->flags & LM_IN_DATA)) | ||
1395 | stlc45xx_check_more_data(stlc, skb); | ||
1396 | } | ||
1397 | |||
1398 | memset(&status, 0, sizeof(status)); | ||
1399 | |||
1400 | status.freq = data->frequency; | ||
1401 | status.signal = data->rcpi / 2 - 110; | ||
1402 | |||
1403 | /* let's assume that maximum rcpi value is 140 (= 35 dBm) */ | ||
1404 | status.qual = data->rcpi * 100 / 140; | ||
1405 | |||
1406 | status.band = IEEE80211_BAND_2GHZ; | ||
1407 | |||
1408 | /* | ||
1409 | * FIXME: this gives warning from __ieee80211_rx() | ||
1410 | * | ||
1411 | * status.rate_idx = data->rate; | ||
1412 | */ | ||
1413 | |||
1414 | len = data->length; | ||
1415 | |||
1416 | if (data->flags & LM_FLAG_ALIGN) | ||
1417 | align = 1; | ||
1418 | |||
1419 | skb_pull(skb, sizeof(*data)); | ||
1420 | |||
1421 | if (align) { | ||
1422 | p = skb->data; | ||
1423 | align_len = *p; | ||
1424 | skb_pull(skb, align_len); | ||
1425 | } | ||
1426 | |||
1427 | skb_trim(skb, len); | ||
1428 | |||
1429 | stlc45xx_debug(DEBUG_RX, "rx data 0x%p %d B", skb->data, skb->len); | ||
1430 | stlc45xx_dump(DEBUG_RX_CONTENT, skb->data, skb->len); | ||
1431 | |||
1432 | memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); | ||
1433 | ieee80211_rx(stlc->hw, skb); | ||
1434 | |||
1435 | return 0; | ||
1436 | } | ||
1437 | |||
1438 | |||
1439 | |||
1440 | static int stlc45xx_rx(struct stlc45xx *stlc) | ||
1441 | { | ||
1442 | struct s_lm_control *control; | ||
1443 | struct sk_buff *skb; | ||
1444 | int ret; | ||
1445 | u16 len; | ||
1446 | |||
1447 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1448 | |||
1449 | stlc45xx_wakeup(stlc); | ||
1450 | |||
1451 | /* dummy read to flush SPI DMA controller bug */ | ||
1452 | stlc45xx_read16(stlc, SPI_ADRS_GEN_PURP_1); | ||
1453 | |||
1454 | len = stlc45xx_read16(stlc, SPI_ADRS_DMA_DATA); | ||
1455 | |||
1456 | if (len == 0) { | ||
1457 | stlc45xx_warning("rx request of zero bytes"); | ||
1458 | return 0; | ||
1459 | } | ||
1460 | |||
1461 | skb = dev_alloc_skb(len); | ||
1462 | if (!skb) { | ||
1463 | stlc45xx_warning("could not alloc skb"); | ||
1464 | return 0; | ||
1465 | } | ||
1466 | |||
1467 | stlc45xx_spi_read(stlc, SPI_ADRS_DMA_DATA, skb_put(skb, len), len); | ||
1468 | |||
1469 | stlc45xx_sleep(stlc); | ||
1470 | |||
1471 | stlc45xx_debug(DEBUG_RX, "rx frame 0x%p %d B", skb->data, skb->len); | ||
1472 | stlc45xx_dump(DEBUG_RX_CONTENT, skb->data, skb->len); | ||
1473 | |||
1474 | control = (struct s_lm_control *) skb->data; | ||
1475 | |||
1476 | if (control->flags & LM_FLAG_CONTROL) | ||
1477 | ret = stlc45xx_rx_control(stlc, skb); | ||
1478 | else | ||
1479 | ret = stlc45xx_rx_data(stlc, skb); | ||
1480 | |||
1481 | return ret; | ||
1482 | } | ||
1483 | |||
1484 | |||
1485 | static irqreturn_t stlc45xx_interrupt(int irq, void *config) | ||
1486 | { | ||
1487 | struct spi_device *spi = config; | ||
1488 | struct stlc45xx *stlc = dev_get_drvdata(&spi->dev); | ||
1489 | |||
1490 | stlc45xx_debug(DEBUG_IRQ, "IRQ"); | ||
1491 | |||
1492 | queue_work(stlc->hw->workqueue, &stlc->work); | ||
1493 | |||
1494 | return IRQ_HANDLED; | ||
1495 | } | ||
1496 | |||
1497 | static int stlc45xx_tx_frame(struct stlc45xx *stlc, u32 address, | ||
1498 | void *buf, size_t len) | ||
1499 | { | ||
1500 | struct s_dma_regs dma_regs; | ||
1501 | unsigned long timeout; | ||
1502 | int ret = 0; | ||
1503 | u32 ints; | ||
1504 | |||
1505 | stlc->tx_frames++; | ||
1506 | |||
1507 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1508 | |||
1509 | stlc45xx_debug(DEBUG_TX, "tx frame 0x%p %zu B", buf, len); | ||
1510 | stlc45xx_dump(DEBUG_TX_CONTENT, buf, len); | ||
1511 | |||
1512 | stlc45xx_wakeup(stlc); | ||
1513 | |||
1514 | dma_regs.cmd = SPI_DMA_WRITE_CTRL_ENABLE; | ||
1515 | dma_regs.len = cpu_to_le16(len); | ||
1516 | dma_regs.addr = cpu_to_le32(address); | ||
1517 | |||
1518 | stlc45xx_spi_write(stlc, SPI_ADRS_DMA_WRITE_CTRL, &dma_regs, | ||
1519 | sizeof(dma_regs)); | ||
1520 | |||
1521 | stlc45xx_spi_write(stlc, SPI_ADRS_DMA_DATA, buf, len); | ||
1522 | |||
1523 | timeout = jiffies + 2 * HZ; | ||
1524 | ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS); | ||
1525 | while (!(ints & SPI_HOST_INT_WR_READY)) { | ||
1526 | if (time_after(jiffies, timeout)) { | ||
1527 | stlc45xx_warning("WR_READY timeout"); | ||
1528 | ret = -1; | ||
1529 | goto out; | ||
1530 | } | ||
1531 | ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS); | ||
1532 | } | ||
1533 | |||
1534 | stlc45xx_int_ack(stlc, SPI_HOST_INT_WR_READY); | ||
1535 | |||
1536 | stlc45xx_sleep(stlc); | ||
1537 | |||
1538 | out: | ||
1539 | return ret; | ||
1540 | } | ||
1541 | |||
1542 | static int stlc45xx_wq_tx(struct stlc45xx *stlc) | ||
1543 | { | ||
1544 | struct txbuffer *entry; | ||
1545 | int ret = 0; | ||
1546 | |||
1547 | spin_lock_bh(&stlc->tx_lock); | ||
1548 | |||
1549 | while (!list_empty(&stlc->tx_pending)) { | ||
1550 | entry = list_entry(stlc->tx_pending.next, | ||
1551 | struct txbuffer, tx_list); | ||
1552 | |||
1553 | list_del_init(&entry->tx_list); | ||
1554 | |||
1555 | spin_unlock_bh(&stlc->tx_lock); | ||
1556 | |||
1557 | ret = stlc45xx_tx_frame(stlc, entry->frame_start, | ||
1558 | entry->skb->data, entry->skb->len); | ||
1559 | |||
1560 | spin_lock_bh(&stlc->tx_lock); | ||
1561 | |||
1562 | if (ret < 0) { | ||
1563 | /* frame transfer to firmware buffer failed */ | ||
1564 | /* FIXME: report this to mac80211 */ | ||
1565 | dev_kfree_skb(entry->skb); | ||
1566 | stlc45xx_txbuffer_free(stlc, entry); | ||
1567 | goto out; | ||
1568 | } | ||
1569 | |||
1570 | list_add(&entry->tx_list, &stlc->tx_sent); | ||
1571 | queue_delayed_work(stlc->hw->workqueue, | ||
1572 | &stlc->work_tx_timeout, | ||
1573 | msecs_to_jiffies(TX_TIMEOUT)); | ||
1574 | } | ||
1575 | |||
1576 | out: | ||
1577 | spin_unlock_bh(&stlc->tx_lock); | ||
1578 | return ret; | ||
1579 | } | ||
1580 | |||
1581 | static void stlc45xx_work(struct work_struct *work) | ||
1582 | { | ||
1583 | struct stlc45xx *stlc = container_of(work, struct stlc45xx, work); | ||
1584 | u32 ints; | ||
1585 | int ret; | ||
1586 | |||
1587 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1588 | |||
1589 | mutex_lock(&stlc->mutex); | ||
1590 | |||
1591 | if (stlc->fw_state == FW_STATE_OFF && | ||
1592 | stlc->fw_state == FW_STATE_RESET) | ||
1593 | goto out; | ||
1594 | |||
1595 | ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS); | ||
1596 | stlc45xx_debug(DEBUG_BH, "begin host_ints 0x%08x", ints); | ||
1597 | |||
1598 | if (ints & SPI_HOST_INT_READY) { | ||
1599 | stlc45xx_int_ready(stlc); | ||
1600 | stlc45xx_int_ack(stlc, SPI_HOST_INT_READY); | ||
1601 | } | ||
1602 | |||
1603 | if (stlc->fw_state != FW_STATE_READY) | ||
1604 | goto out; | ||
1605 | |||
1606 | if (ints & SPI_HOST_INT_UPDATE) { | ||
1607 | stlc45xx_int_ack(stlc, SPI_HOST_INT_UPDATE); | ||
1608 | ret = stlc45xx_rx(stlc); | ||
1609 | if (ret < 0) { | ||
1610 | stlc45xx_reset(stlc); | ||
1611 | goto out; | ||
1612 | } | ||
1613 | } | ||
1614 | if (ints & SPI_HOST_INT_SW_UPDATE) { | ||
1615 | stlc45xx_int_ack(stlc, SPI_HOST_INT_SW_UPDATE); | ||
1616 | ret = stlc45xx_rx(stlc); | ||
1617 | if (ret < 0) { | ||
1618 | stlc45xx_reset(stlc); | ||
1619 | goto out; | ||
1620 | } | ||
1621 | } | ||
1622 | |||
1623 | ret = stlc45xx_wq_tx(stlc); | ||
1624 | if (ret < 0) { | ||
1625 | stlc45xx_reset(stlc); | ||
1626 | goto out; | ||
1627 | } | ||
1628 | |||
1629 | ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS); | ||
1630 | stlc45xx_debug(DEBUG_BH, "end host_ints 0x%08x", ints); | ||
1631 | |||
1632 | out: | ||
1633 | mutex_unlock(&stlc->mutex); | ||
1634 | } | ||
1635 | |||
1636 | static void stlc45xx_tx_edcf(struct stlc45xx *stlc) | ||
1637 | { | ||
1638 | struct s_lm_control *control; | ||
1639 | struct s_lmo_edcf *edcf; | ||
1640 | size_t len, edcf_len; | ||
1641 | |||
1642 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1643 | |||
1644 | edcf_len = sizeof(*edcf); | ||
1645 | len = sizeof(*control) + edcf_len; | ||
1646 | control = kzalloc(len, GFP_KERNEL); | ||
1647 | edcf = (struct s_lmo_edcf *) (control + 1); | ||
1648 | |||
1649 | control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET; | ||
1650 | control->length = edcf_len; | ||
1651 | control->oid = LM_OID_EDCF; | ||
1652 | |||
1653 | edcf->slottime = 0x14; | ||
1654 | edcf->sifs = 10; | ||
1655 | edcf->eofpad = 6; | ||
1656 | edcf->maxburst = 1500; | ||
1657 | |||
1658 | edcf->queues[0].aifs = 2; | ||
1659 | edcf->queues[0].pad0 = 1; | ||
1660 | edcf->queues[0].cwmin = 3; | ||
1661 | edcf->queues[0].cwmax = 7; | ||
1662 | edcf->queues[0].txop = 47; | ||
1663 | edcf->queues[1].aifs = 2; | ||
1664 | edcf->queues[1].pad0 = 0; | ||
1665 | edcf->queues[1].cwmin = 7; | ||
1666 | edcf->queues[1].cwmax = 15; | ||
1667 | edcf->queues[1].txop = 94; | ||
1668 | edcf->queues[2].aifs = 3; | ||
1669 | edcf->queues[2].pad0 = 0; | ||
1670 | edcf->queues[2].cwmin = 15; | ||
1671 | edcf->queues[2].cwmax = 1023; | ||
1672 | edcf->queues[2].txop = 0; | ||
1673 | edcf->queues[3].aifs = 7; | ||
1674 | edcf->queues[3].pad0 = 0; | ||
1675 | edcf->queues[3].cwmin = 15; | ||
1676 | edcf->queues[3].cwmax = 1023; | ||
1677 | edcf->queues[3].txop = 0; | ||
1678 | edcf->queues[4].aifs = 13; | ||
1679 | edcf->queues[4].pad0 = 99; | ||
1680 | edcf->queues[4].cwmin = 3437; | ||
1681 | edcf->queues[4].cwmax = 512; | ||
1682 | edcf->queues[4].txop = 12; | ||
1683 | edcf->queues[5].aifs = 142; | ||
1684 | edcf->queues[5].pad0 = 109; | ||
1685 | edcf->queues[5].cwmin = 8756; | ||
1686 | edcf->queues[5].cwmax = 6; | ||
1687 | edcf->queues[5].txop = 0; | ||
1688 | edcf->queues[6].aifs = 4; | ||
1689 | edcf->queues[6].pad0 = 0; | ||
1690 | edcf->queues[6].cwmin = 0; | ||
1691 | edcf->queues[6].cwmax = 58705; | ||
1692 | edcf->queues[6].txop = 25716; | ||
1693 | edcf->queues[7].aifs = 0; | ||
1694 | edcf->queues[7].pad0 = 0; | ||
1695 | edcf->queues[7].cwmin = 0; | ||
1696 | edcf->queues[7].cwmax = 0; | ||
1697 | edcf->queues[7].txop = 0; | ||
1698 | |||
1699 | stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len); | ||
1700 | |||
1701 | kfree(control); | ||
1702 | } | ||
1703 | |||
1704 | static void stlc45xx_tx_setup(struct stlc45xx *stlc) | ||
1705 | { | ||
1706 | struct s_lm_control *control; | ||
1707 | struct s_lmo_setup *setup; | ||
1708 | size_t len, setup_len; | ||
1709 | |||
1710 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1711 | |||
1712 | setup_len = sizeof(*setup); | ||
1713 | len = sizeof(*control) + setup_len; | ||
1714 | control = kzalloc(len, GFP_KERNEL); | ||
1715 | setup = (struct s_lmo_setup *) (control + 1); | ||
1716 | |||
1717 | control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET; | ||
1718 | control->length = setup_len; | ||
1719 | control->oid = LM_OID_SETUP; | ||
1720 | |||
1721 | setup->flags = LM_SETUP_INFRA; | ||
1722 | setup->antenna = 2; | ||
1723 | setup->rx_align = 0; | ||
1724 | setup->rx_buffer = FIRMWARE_RXBUFFER_START; | ||
1725 | setup->rx_mtu = FIRMWARE_MTU; | ||
1726 | setup->frontend = 5; | ||
1727 | setup->timeout = 0; | ||
1728 | setup->truncate = 48896; | ||
1729 | setup->bratemask = 0xffffffff; | ||
1730 | setup->ref_clock = 644245094; | ||
1731 | setup->lpf_bandwidth = 65535; | ||
1732 | setup->osc_start_delay = 65535; | ||
1733 | |||
1734 | memcpy(setup->macaddr, stlc->mac_addr, ETH_ALEN); | ||
1735 | memcpy(setup->bssid, stlc->bssid, ETH_ALEN); | ||
1736 | |||
1737 | stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len); | ||
1738 | |||
1739 | kfree(control); | ||
1740 | } | ||
1741 | |||
1742 | static void stlc45xx_tx_scan(struct stlc45xx *stlc) | ||
1743 | { | ||
1744 | struct s_lm_control *control; | ||
1745 | struct s_lmo_scan *scan; | ||
1746 | size_t len, scan_len; | ||
1747 | |||
1748 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
1749 | |||
1750 | scan_len = sizeof(*scan); | ||
1751 | len = sizeof(*control) + scan_len; | ||
1752 | control = kzalloc(len, GFP_KERNEL); | ||
1753 | scan = (struct s_lmo_scan *) (control + 1); | ||
1754 | |||
1755 | control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET; | ||
1756 | control->length = scan_len; | ||
1757 | control->oid = LM_OID_SCAN; | ||
1758 | |||
1759 | scan->flags = LM_SCAN_EXIT; | ||
1760 | scan->bratemask = 0x15f; | ||
1761 | scan->aloft[0] = 3; | ||
1762 | scan->aloft[1] = 3; | ||
1763 | scan->aloft[2] = 1; | ||
1764 | scan->aloft[3] = 0; | ||
1765 | scan->aloft[4] = 0; | ||
1766 | scan->aloft[5] = 0; | ||
1767 | scan->aloft[6] = 0; | ||
1768 | scan->aloft[7] = 0; | ||
1769 | |||
1770 | memcpy(&scan->rssical, &stlc->cal_rssi[(stlc->channel - 1) * | ||
1771 | RSSI_CAL_LEN], | ||
1772 | RSSI_CAL_LEN); | ||
1773 | memcpy(&scan->channel, &stlc->cal_channels[(stlc->channel - 1) * | ||
1774 | CHANNEL_CAL_LEN], | ||
1775 | CHANNEL_CAL_LEN); | ||
1776 | |||
1777 | stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len); | ||
1778 | |||
1779 | kfree(control); | ||
1780 | } | ||
1781 | |||
1782 | /* | ||
1783 | * caller must hold mutex | ||
1784 | */ | ||
1785 | static int stlc45xx_tx_pspoll(struct stlc45xx *stlc, bool powersave) | ||
1786 | { | ||
1787 | struct ieee80211_hdr *pspoll; | ||
1788 | int payload_len, padding, i; | ||
1789 | struct s_lm_data_out *data; | ||
1790 | struct txbuffer *entry; | ||
1791 | struct sk_buff *skb; | ||
1792 | char *payload; | ||
1793 | u16 fc; | ||
1794 | |||
1795 | skb = dev_alloc_skb(stlc->hw->extra_tx_headroom + 16); | ||
1796 | if (!skb) { | ||
1797 | stlc45xx_warning("failed to allocate pspoll frame"); | ||
1798 | return -ENOMEM; | ||
1799 | } | ||
1800 | skb_reserve(skb, stlc->hw->extra_tx_headroom); | ||
1801 | |||
1802 | pspoll = (struct ieee80211_hdr *) skb_put(skb, 16); | ||
1803 | memset(pspoll, 0, 16); | ||
1804 | fc = IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL; | ||
1805 | if (powersave) | ||
1806 | fc |= IEEE80211_FCTL_PM; | ||
1807 | pspoll->frame_control = cpu_to_le16(fc); | ||
1808 | pspoll->duration_id = cpu_to_le16(stlc->aid); | ||
1809 | |||
1810 | /* aid in PS-Poll has its two MSBs each set to 1 */ | ||
1811 | pspoll->duration_id |= cpu_to_le16(1 << 15) | cpu_to_le16(1 << 14); | ||
1812 | |||
1813 | memcpy(pspoll->addr1, stlc->bssid, ETH_ALEN); | ||
1814 | memcpy(pspoll->addr2, stlc->mac_addr, ETH_ALEN); | ||
1815 | |||
1816 | stlc45xx_debug(DEBUG_PSM, "sending PS-Poll frame to %pM (powersave %d, " | ||
1817 | "fc 0x%x, aid %d)", pspoll->addr1, | ||
1818 | powersave, fc, stlc->aid); | ||
1819 | |||
1820 | spin_lock_bh(&stlc->tx_lock); | ||
1821 | |||
1822 | entry = stlc45xx_txbuffer_alloc(stlc, skb->len); | ||
1823 | |||
1824 | spin_unlock_bh(&stlc->tx_lock); | ||
1825 | |||
1826 | if (!entry) { | ||
1827 | /* | ||
1828 | * The queue should be stopped before the firmware buffer | ||
1829 | * is full, so firmware buffer should always have enough | ||
1830 | * space. | ||
1831 | * | ||
1832 | * But I'm too lazy and omit it for now. | ||
1833 | */ | ||
1834 | if (net_ratelimit()) | ||
1835 | stlc45xx_warning("firmware tx buffer full is full " | ||
1836 | "for null frame"); | ||
1837 | return -ENOSPC; | ||
1838 | } | ||
1839 | |||
1840 | payload = skb->data; | ||
1841 | payload_len = skb->len; | ||
1842 | padding = (int) (skb->data - sizeof(*data)) & 3; | ||
1843 | entry->header_len = sizeof(*data) + padding; | ||
1844 | |||
1845 | entry->skb = skb; | ||
1846 | entry->status_needed = false; | ||
1847 | entry->handle = (u32) skb; | ||
1848 | entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME); | ||
1849 | |||
1850 | stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B " | ||
1851 | "padding %d header_len %d)", | ||
1852 | entry->handle, payload, payload_len, padding, | ||
1853 | entry->header_len); | ||
1854 | stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len); | ||
1855 | |||
1856 | data = (struct s_lm_data_out *) skb_push(skb, entry->header_len); | ||
1857 | |||
1858 | memset(data, 0, entry->header_len); | ||
1859 | |||
1860 | if (padding) | ||
1861 | data->flags = LM_FLAG_ALIGN; | ||
1862 | |||
1863 | data->flags = LM_OUT_BURST; | ||
1864 | data->length = payload_len; | ||
1865 | data->handle = entry->handle; | ||
1866 | data->aid = 1; | ||
1867 | data->rts_retries = 7; | ||
1868 | data->retries = 7; | ||
1869 | data->aloft_ctrl = 0; | ||
1870 | data->crypt_offset = 58; | ||
1871 | data->keytype = 0; | ||
1872 | data->keylen = 0; | ||
1873 | data->queue = LM_QUEUE_DATA3; | ||
1874 | data->backlog = 32; | ||
1875 | data->antenna = 2; | ||
1876 | data->cts = 3; | ||
1877 | data->power = 127; | ||
1878 | |||
1879 | for (i = 0; i < 8; i++) | ||
1880 | data->aloft[i] = 0; | ||
1881 | |||
1882 | /* | ||
1883 | * check if there's enough space in tx buffer | ||
1884 | * | ||
1885 | * FIXME: ignored for now | ||
1886 | */ | ||
1887 | |||
1888 | stlc45xx_tx_frame(stlc, entry->start, skb->data, skb->len); | ||
1889 | |||
1890 | list_add(&entry->tx_list, &stlc->tx_sent); | ||
1891 | |||
1892 | return 0; | ||
1893 | } | ||
1894 | |||
1895 | /* | ||
1896 | * caller must hold mutex | ||
1897 | * | ||
1898 | * shamelessly stolen from mac80211/ieee80211_send_nullfunc | ||
1899 | */ | ||
1900 | static int stlc45xx_tx_nullfunc(struct stlc45xx *stlc, bool powersave) | ||
1901 | { | ||
1902 | struct ieee80211_hdr *nullfunc; | ||
1903 | int payload_len, padding, i; | ||
1904 | struct s_lm_data_out *data; | ||
1905 | struct txbuffer *entry; | ||
1906 | struct sk_buff *skb; | ||
1907 | char *payload; | ||
1908 | u16 fc; | ||
1909 | |||
1910 | skb = dev_alloc_skb(stlc->hw->extra_tx_headroom + 24); | ||
1911 | if (!skb) { | ||
1912 | stlc45xx_warning("failed to allocate buffer for null frame\n"); | ||
1913 | return -ENOMEM; | ||
1914 | } | ||
1915 | skb_reserve(skb, stlc->hw->extra_tx_headroom); | ||
1916 | |||
1917 | nullfunc = (struct ieee80211_hdr *) skb_put(skb, 24); | ||
1918 | memset(nullfunc, 0, 24); | ||
1919 | fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC | | ||
1920 | IEEE80211_FCTL_TODS; | ||
1921 | |||
1922 | if (powersave) | ||
1923 | fc |= IEEE80211_FCTL_PM; | ||
1924 | |||
1925 | nullfunc->frame_control = cpu_to_le16(fc); | ||
1926 | memcpy(nullfunc->addr1, stlc->bssid, ETH_ALEN); | ||
1927 | memcpy(nullfunc->addr2, stlc->mac_addr, ETH_ALEN); | ||
1928 | memcpy(nullfunc->addr3, stlc->bssid, ETH_ALEN); | ||
1929 | |||
1930 | stlc45xx_debug(DEBUG_PSM, "sending Null frame to %pM (powersave %d, " | ||
1931 | "fc 0x%x)", nullfunc->addr1, powersave, fc); | ||
1932 | |||
1933 | spin_lock_bh(&stlc->tx_lock); | ||
1934 | |||
1935 | entry = stlc45xx_txbuffer_alloc(stlc, skb->len); | ||
1936 | |||
1937 | spin_unlock_bh(&stlc->tx_lock); | ||
1938 | |||
1939 | if (!entry) { | ||
1940 | /* | ||
1941 | * The queue should be stopped before the firmware buffer | ||
1942 | * is full, so firmware buffer should always have enough | ||
1943 | * space. | ||
1944 | * | ||
1945 | * But I'm too lazy and omit it for now. | ||
1946 | */ | ||
1947 | if (net_ratelimit()) | ||
1948 | stlc45xx_warning("firmware tx buffer full is full " | ||
1949 | "for null frame"); | ||
1950 | return -ENOSPC; | ||
1951 | } | ||
1952 | |||
1953 | payload = skb->data; | ||
1954 | payload_len = skb->len; | ||
1955 | padding = (int) (skb->data - sizeof(*data)) & 3; | ||
1956 | entry->header_len = sizeof(*data) + padding; | ||
1957 | |||
1958 | entry->skb = skb; | ||
1959 | entry->status_needed = false; | ||
1960 | entry->handle = (u32) skb; | ||
1961 | entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME); | ||
1962 | |||
1963 | stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B " | ||
1964 | "padding %d header_len %d)", | ||
1965 | entry->handle, payload, payload_len, padding, | ||
1966 | entry->header_len); | ||
1967 | stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len); | ||
1968 | |||
1969 | data = (struct s_lm_data_out *) skb_push(skb, entry->header_len); | ||
1970 | |||
1971 | memset(data, 0, entry->header_len); | ||
1972 | |||
1973 | if (padding) | ||
1974 | data->flags = LM_FLAG_ALIGN; | ||
1975 | |||
1976 | data->flags = LM_OUT_BURST; | ||
1977 | data->length = payload_len; | ||
1978 | data->handle = entry->handle; | ||
1979 | data->aid = 1; | ||
1980 | data->rts_retries = 7; | ||
1981 | data->retries = 7; | ||
1982 | data->aloft_ctrl = 0; | ||
1983 | data->crypt_offset = 58; | ||
1984 | data->keytype = 0; | ||
1985 | data->keylen = 0; | ||
1986 | data->queue = LM_QUEUE_DATA3; | ||
1987 | data->backlog = 32; | ||
1988 | data->antenna = 2; | ||
1989 | data->cts = 3; | ||
1990 | data->power = 127; | ||
1991 | |||
1992 | for (i = 0; i < 8; i++) | ||
1993 | data->aloft[i] = 0; | ||
1994 | |||
1995 | /* | ||
1996 | * check if there's enough space in tx buffer | ||
1997 | * | ||
1998 | * FIXME: ignored for now | ||
1999 | */ | ||
2000 | |||
2001 | stlc45xx_tx_frame(stlc, entry->start, skb->data, skb->len); | ||
2002 | |||
2003 | list_add(&entry->tx_list, &stlc->tx_sent); | ||
2004 | |||
2005 | return 0; | ||
2006 | } | ||
2007 | |||
2008 | /* caller must hold mutex */ | ||
2009 | static void stlc45xx_tx_psm(struct stlc45xx *stlc, bool enable) | ||
2010 | { | ||
2011 | struct s_lm_control *control; | ||
2012 | struct s_lmo_psm *psm; | ||
2013 | size_t len, psm_len; | ||
2014 | |||
2015 | WARN_ON(!stlc->associated); | ||
2016 | WARN_ON(stlc->aid < 1); | ||
2017 | WARN_ON(stlc->aid > 2007); | ||
2018 | |||
2019 | psm_len = sizeof(*psm); | ||
2020 | len = sizeof(*control) + psm_len; | ||
2021 | control = kzalloc(len, GFP_KERNEL); | ||
2022 | psm = (struct s_lmo_psm *) (control + 1); | ||
2023 | |||
2024 | control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET; | ||
2025 | control->length = psm_len; | ||
2026 | control->oid = LM_OID_PSM; | ||
2027 | |||
2028 | if (enable) | ||
2029 | psm->flags |= LM_PSM; | ||
2030 | |||
2031 | psm->aid = stlc->aid; | ||
2032 | |||
2033 | psm->beacon_rcpi_skip_max = 60; | ||
2034 | |||
2035 | psm->intervals[0].interval = 1; | ||
2036 | psm->intervals[0].periods = 1; | ||
2037 | psm->intervals[1].interval = 1; | ||
2038 | psm->intervals[1].periods = 1; | ||
2039 | psm->intervals[2].interval = 1; | ||
2040 | psm->intervals[2].periods = 1; | ||
2041 | psm->intervals[3].interval = 1; | ||
2042 | psm->intervals[3].periods = 1; | ||
2043 | |||
2044 | psm->nr = 0; | ||
2045 | psm->exclude[0] = 0; | ||
2046 | |||
2047 | stlc45xx_debug(DEBUG_PSM, "sending LM_OID_PSM (aid %d, interval %d)", | ||
2048 | psm->aid, psm->intervals[0].interval); | ||
2049 | |||
2050 | stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len); | ||
2051 | |||
2052 | kfree(control); | ||
2053 | } | ||
2054 | |||
2055 | static int stlc45xx_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | ||
2056 | { | ||
2057 | struct stlc45xx *stlc = hw->priv; | ||
2058 | struct ieee80211_tx_info *info; | ||
2059 | struct ieee80211_rate *rate; | ||
2060 | int payload_len, padding, i; | ||
2061 | struct s_lm_data_out *data; | ||
2062 | struct txbuffer *entry; | ||
2063 | char *payload; | ||
2064 | |||
2065 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2066 | |||
2067 | spin_lock_bh(&stlc->tx_lock); | ||
2068 | |||
2069 | entry = stlc45xx_txbuffer_alloc(stlc, skb->len); | ||
2070 | if (!entry) { | ||
2071 | /* the queue should be stopped before the firmware buffer | ||
2072 | * is full, so firmware buffer should always have enough | ||
2073 | * space */ | ||
2074 | if (net_ratelimit()) | ||
2075 | stlc45xx_warning("firmware buffer full"); | ||
2076 | spin_unlock_bh(&stlc->tx_lock); | ||
2077 | return NETDEV_TX_BUSY; | ||
2078 | } | ||
2079 | |||
2080 | info = IEEE80211_SKB_CB(skb); | ||
2081 | |||
2082 | payload = skb->data; | ||
2083 | payload_len = skb->len; | ||
2084 | padding = (int) (skb->data - sizeof(*data)) & 3; | ||
2085 | entry->header_len = sizeof(*data) + padding; | ||
2086 | |||
2087 | entry->skb = skb; | ||
2088 | entry->status_needed = true; | ||
2089 | entry->handle = (u32) skb; | ||
2090 | entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME); | ||
2091 | |||
2092 | stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B " | ||
2093 | "padding %d header_len %d)", | ||
2094 | entry->handle, payload, payload_len, padding, | ||
2095 | entry->header_len); | ||
2096 | stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len); | ||
2097 | |||
2098 | data = (struct s_lm_data_out *) skb_push(skb, entry->header_len); | ||
2099 | |||
2100 | memset(data, 0, entry->header_len); | ||
2101 | |||
2102 | if (padding) | ||
2103 | data->flags = LM_FLAG_ALIGN; | ||
2104 | |||
2105 | data->flags = LM_OUT_BURST; | ||
2106 | data->length = payload_len; | ||
2107 | data->handle = entry->handle; | ||
2108 | data->aid = 1; | ||
2109 | data->rts_retries = 7; | ||
2110 | data->retries = 7; | ||
2111 | data->aloft_ctrl = 0; | ||
2112 | data->crypt_offset = 58; | ||
2113 | data->keytype = 0; | ||
2114 | data->keylen = 0; | ||
2115 | data->queue = 2; | ||
2116 | data->backlog = 32; | ||
2117 | data->antenna = 2; | ||
2118 | data->cts = 3; | ||
2119 | data->power = 127; | ||
2120 | |||
2121 | for (i = 0; i < 8; i++) { | ||
2122 | rate = ieee80211_get_tx_rate(stlc->hw, info); | ||
2123 | data->aloft[i] = rate->hw_value; | ||
2124 | } | ||
2125 | |||
2126 | list_add_tail(&entry->tx_list, &stlc->tx_pending); | ||
2127 | |||
2128 | /* check if there's enough space in tx buffer */ | ||
2129 | if (stlc45xx_txbuffer_find(stlc, MAX_FRAME_LEN) == -1) { | ||
2130 | stlc45xx_debug(DEBUG_QUEUE, "tx buffer full, stopping queues"); | ||
2131 | stlc->tx_queue_stopped = 1; | ||
2132 | ieee80211_stop_queues(stlc->hw); | ||
2133 | } | ||
2134 | |||
2135 | queue_work(stlc->hw->workqueue, &stlc->work); | ||
2136 | |||
2137 | spin_unlock_bh(&stlc->tx_lock); | ||
2138 | |||
2139 | return NETDEV_TX_OK; | ||
2140 | } | ||
2141 | |||
2142 | static int stlc45xx_op_start(struct ieee80211_hw *hw) | ||
2143 | { | ||
2144 | struct stlc45xx *stlc = hw->priv; | ||
2145 | unsigned long timeout; | ||
2146 | int ret = 0; | ||
2147 | |||
2148 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2149 | |||
2150 | mutex_lock(&stlc->mutex); | ||
2151 | |||
2152 | stlc->fw_state = FW_STATE_BOOTING; | ||
2153 | stlc->channel = 1; | ||
2154 | |||
2155 | stlc45xx_power_on(stlc); | ||
2156 | |||
2157 | ret = stlc45xx_upload_firmware(stlc); | ||
2158 | if (ret < 0) { | ||
2159 | stlc45xx_power_off(stlc); | ||
2160 | goto out_unlock; | ||
2161 | } | ||
2162 | |||
2163 | stlc->tx_queue_stopped = 0; | ||
2164 | |||
2165 | mutex_unlock(&stlc->mutex); | ||
2166 | |||
2167 | timeout = msecs_to_jiffies(2000); | ||
2168 | timeout = wait_for_completion_interruptible_timeout(&stlc->fw_comp, | ||
2169 | timeout); | ||
2170 | if (!timeout) { | ||
2171 | stlc45xx_error("firmware boot failed"); | ||
2172 | stlc45xx_power_off(stlc); | ||
2173 | ret = -1; | ||
2174 | goto out; | ||
2175 | } | ||
2176 | |||
2177 | stlc45xx_debug(DEBUG_BOOT, "firmware booted"); | ||
2178 | |||
2179 | /* FIXME: should we take mutex just after wait_for_completion()? */ | ||
2180 | mutex_lock(&stlc->mutex); | ||
2181 | |||
2182 | WARN_ON(stlc->fw_state != FW_STATE_READY); | ||
2183 | |||
2184 | out_unlock: | ||
2185 | mutex_unlock(&stlc->mutex); | ||
2186 | |||
2187 | out: | ||
2188 | return ret; | ||
2189 | } | ||
2190 | |||
2191 | static void stlc45xx_op_stop(struct ieee80211_hw *hw) | ||
2192 | { | ||
2193 | struct stlc45xx *stlc = hw->priv; | ||
2194 | |||
2195 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2196 | |||
2197 | mutex_lock(&stlc->mutex); | ||
2198 | |||
2199 | WARN_ON(stlc->fw_state != FW_STATE_READY); | ||
2200 | |||
2201 | stlc45xx_power_off(stlc); | ||
2202 | |||
2203 | /* FIXME: make sure that all work_structs have completed */ | ||
2204 | |||
2205 | spin_lock_bh(&stlc->tx_lock); | ||
2206 | stlc45xx_flush_queues(stlc); | ||
2207 | spin_unlock_bh(&stlc->tx_lock); | ||
2208 | |||
2209 | stlc->fw_state = FW_STATE_OFF; | ||
2210 | |||
2211 | mutex_unlock(&stlc->mutex); | ||
2212 | } | ||
2213 | |||
2214 | static int stlc45xx_op_add_interface(struct ieee80211_hw *hw, | ||
2215 | struct ieee80211_if_init_conf *conf) | ||
2216 | { | ||
2217 | struct stlc45xx *stlc = hw->priv; | ||
2218 | |||
2219 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2220 | |||
2221 | switch (conf->type) { | ||
2222 | case NL80211_IFTYPE_STATION: | ||
2223 | break; | ||
2224 | default: | ||
2225 | return -EOPNOTSUPP; | ||
2226 | } | ||
2227 | |||
2228 | memcpy(stlc->mac_addr, conf->mac_addr, ETH_ALEN); | ||
2229 | |||
2230 | return 0; | ||
2231 | } | ||
2232 | |||
2233 | static void stlc45xx_op_remove_interface(struct ieee80211_hw *hw, | ||
2234 | struct ieee80211_if_init_conf *conf) | ||
2235 | { | ||
2236 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2237 | } | ||
2238 | |||
2239 | static int stlc45xx_op_config(struct ieee80211_hw *hw, u32 changed) | ||
2240 | { | ||
2241 | struct stlc45xx *stlc = hw->priv; | ||
2242 | |||
2243 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2244 | |||
2245 | mutex_lock(&stlc->mutex); | ||
2246 | |||
2247 | stlc->channel = hw->conf.channel->hw_value; | ||
2248 | stlc45xx_tx_scan(stlc); | ||
2249 | stlc45xx_tx_setup(stlc); | ||
2250 | stlc45xx_tx_edcf(stlc); | ||
2251 | |||
2252 | if ((hw->conf.flags & IEEE80211_CONF_PS) != stlc->psm) { | ||
2253 | stlc->psm = hw->conf.flags & IEEE80211_CONF_PS; | ||
2254 | if (stlc->associated) { | ||
2255 | stlc45xx_tx_psm(stlc, stlc->psm); | ||
2256 | stlc45xx_tx_nullfunc(stlc, stlc->psm); | ||
2257 | } | ||
2258 | } | ||
2259 | |||
2260 | mutex_unlock(&stlc->mutex); | ||
2261 | |||
2262 | return 0; | ||
2263 | } | ||
2264 | |||
2265 | static void stlc45xx_op_configure_filter(struct ieee80211_hw *hw, | ||
2266 | unsigned int changed_flags, | ||
2267 | unsigned int *total_flags, | ||
2268 | int mc_count, | ||
2269 | struct dev_addr_list *mc_list) | ||
2270 | { | ||
2271 | *total_flags = 0; | ||
2272 | } | ||
2273 | |||
2274 | static void stlc45xx_op_bss_info_changed(struct ieee80211_hw *hw, | ||
2275 | struct ieee80211_vif *vif, | ||
2276 | struct ieee80211_bss_conf *info, | ||
2277 | u32 changed) | ||
2278 | { | ||
2279 | struct stlc45xx *stlc = hw->priv; | ||
2280 | |||
2281 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2282 | mutex_lock(&stlc->mutex); | ||
2283 | |||
2284 | memcpy(stlc->bssid, info->bssid, ETH_ALEN); | ||
2285 | stlc45xx_tx_setup(stlc); | ||
2286 | |||
2287 | mutex_unlock(&stlc->mutex); | ||
2288 | |||
2289 | if (changed & BSS_CHANGED_ASSOC) { | ||
2290 | stlc->associated = info->assoc; | ||
2291 | if (info->assoc) | ||
2292 | stlc->aid = info->aid; | ||
2293 | else | ||
2294 | stlc->aid = -1; | ||
2295 | |||
2296 | if (stlc->psm) { | ||
2297 | stlc45xx_tx_psm(stlc, stlc->psm); | ||
2298 | stlc45xx_tx_nullfunc(stlc, stlc->psm); | ||
2299 | } | ||
2300 | } | ||
2301 | } | ||
2302 | |||
2303 | |||
2304 | /* can't be const, mac80211 writes to this */ | ||
2305 | static struct ieee80211_rate stlc45xx_rates[] = { | ||
2306 | { .bitrate = 10, .hw_value = 0, .hw_value_short = 0, }, | ||
2307 | { .bitrate = 20, .hw_value = 1, .hw_value_short = 1, }, | ||
2308 | { .bitrate = 55, .hw_value = 2, .hw_value_short = 2, }, | ||
2309 | { .bitrate = 110, .hw_value = 3, .hw_value_short = 3, }, | ||
2310 | { .bitrate = 60, .hw_value = 4, .hw_value_short = 4, }, | ||
2311 | { .bitrate = 90, .hw_value = 5, .hw_value_short = 5, }, | ||
2312 | { .bitrate = 120, .hw_value = 6, .hw_value_short = 6, }, | ||
2313 | { .bitrate = 180, .hw_value = 7, .hw_value_short = 7, }, | ||
2314 | { .bitrate = 240, .hw_value = 8, .hw_value_short = 8, }, | ||
2315 | { .bitrate = 360, .hw_value = 9, .hw_value_short = 9, }, | ||
2316 | { .bitrate = 480, .hw_value = 10, .hw_value_short = 10, }, | ||
2317 | { .bitrate = 540, .hw_value = 11, .hw_value_short = 11, }, | ||
2318 | }; | ||
2319 | |||
2320 | /* can't be const, mac80211 writes to this */ | ||
2321 | static struct ieee80211_channel stlc45xx_channels[] = { | ||
2322 | { .hw_value = 1, .center_freq = 2412}, | ||
2323 | { .hw_value = 2, .center_freq = 2417}, | ||
2324 | { .hw_value = 3, .center_freq = 2422}, | ||
2325 | { .hw_value = 4, .center_freq = 2427}, | ||
2326 | { .hw_value = 5, .center_freq = 2432}, | ||
2327 | { .hw_value = 6, .center_freq = 2437}, | ||
2328 | { .hw_value = 7, .center_freq = 2442}, | ||
2329 | { .hw_value = 8, .center_freq = 2447}, | ||
2330 | { .hw_value = 9, .center_freq = 2452}, | ||
2331 | { .hw_value = 10, .center_freq = 2457}, | ||
2332 | { .hw_value = 11, .center_freq = 2462}, | ||
2333 | { .hw_value = 12, .center_freq = 2467}, | ||
2334 | { .hw_value = 13, .center_freq = 2472}, | ||
2335 | }; | ||
2336 | |||
2337 | /* can't be const, mac80211 writes to this */ | ||
2338 | static struct ieee80211_supported_band stlc45xx_band_2ghz = { | ||
2339 | .channels = stlc45xx_channels, | ||
2340 | .n_channels = ARRAY_SIZE(stlc45xx_channels), | ||
2341 | .bitrates = stlc45xx_rates, | ||
2342 | .n_bitrates = ARRAY_SIZE(stlc45xx_rates), | ||
2343 | }; | ||
2344 | |||
2345 | static const struct ieee80211_ops stlc45xx_ops = { | ||
2346 | .start = stlc45xx_op_start, | ||
2347 | .stop = stlc45xx_op_stop, | ||
2348 | .add_interface = stlc45xx_op_add_interface, | ||
2349 | .remove_interface = stlc45xx_op_remove_interface, | ||
2350 | .config = stlc45xx_op_config, | ||
2351 | .configure_filter = stlc45xx_op_configure_filter, | ||
2352 | .tx = stlc45xx_op_tx, | ||
2353 | .bss_info_changed = stlc45xx_op_bss_info_changed, | ||
2354 | }; | ||
2355 | |||
2356 | static int stlc45xx_register_mac80211(struct stlc45xx *stlc) | ||
2357 | { | ||
2358 | /* FIXME: SET_IEEE80211_PERM_ADDR() requires default_mac_addr | ||
2359 | to be non-const for some strange reason */ | ||
2360 | static u8 default_mac_addr[ETH_ALEN] = { | ||
2361 | 0x00, 0x02, 0xee, 0xc0, 0xff, 0xee | ||
2362 | }; | ||
2363 | int ret; | ||
2364 | |||
2365 | SET_IEEE80211_PERM_ADDR(stlc->hw, default_mac_addr); | ||
2366 | |||
2367 | ret = ieee80211_register_hw(stlc->hw); | ||
2368 | if (ret) { | ||
2369 | stlc45xx_error("unable to register mac80211 hw: %d", ret); | ||
2370 | return ret; | ||
2371 | } | ||
2372 | |||
2373 | return 0; | ||
2374 | } | ||
2375 | |||
2376 | static void stlc45xx_device_release(struct device *dev) | ||
2377 | { | ||
2378 | |||
2379 | } | ||
2380 | |||
2381 | static struct platform_device stlc45xx_device = { | ||
2382 | .name = "stlc45xx", | ||
2383 | .id = -1, | ||
2384 | |||
2385 | /* device model insists to have a release function */ | ||
2386 | .dev = { | ||
2387 | .release = stlc45xx_device_release, | ||
2388 | }, | ||
2389 | }; | ||
2390 | |||
2391 | static int __devinit stlc45xx_probe(struct spi_device *spi) | ||
2392 | { | ||
2393 | struct stlc45xx *stlc; | ||
2394 | struct ieee80211_hw *hw; | ||
2395 | int ret; | ||
2396 | |||
2397 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2398 | |||
2399 | /* mac80211 alloc */ | ||
2400 | hw = ieee80211_alloc_hw(sizeof(*stlc), &stlc45xx_ops); | ||
2401 | if (!hw) { | ||
2402 | stlc45xx_error("could not alloc ieee80211_hw"); | ||
2403 | ret = -ENOMEM; | ||
2404 | goto out; | ||
2405 | } | ||
2406 | |||
2407 | /* mac80211 clears hw->priv */ | ||
2408 | stlc = hw->priv; | ||
2409 | |||
2410 | stlc->hw = hw; | ||
2411 | dev_set_drvdata(&spi->dev, stlc); | ||
2412 | stlc->spi = spi; | ||
2413 | |||
2414 | spi->bits_per_word = 16; | ||
2415 | spi->max_speed_hz = 24000000; | ||
2416 | |||
2417 | ret = spi_setup(spi); | ||
2418 | if (ret < 0) | ||
2419 | stlc45xx_error("spi_setup failed"); | ||
2420 | |||
2421 | ret = gpio_request(stlc45xx_gpio_power, "stlc45xx power"); | ||
2422 | if (ret < 0) { | ||
2423 | stlc45xx_error("power GPIO request failed: %d", ret); | ||
2424 | return ret; | ||
2425 | } | ||
2426 | |||
2427 | ret = gpio_request(stlc45xx_gpio_irq, "stlc45xx irq"); | ||
2428 | if (ret < 0) { | ||
2429 | stlc45xx_error("irq GPIO request failed: %d", ret); | ||
2430 | goto out; | ||
2431 | } | ||
2432 | |||
2433 | gpio_direction_output(stlc45xx_gpio_power, 0); | ||
2434 | gpio_direction_input(stlc45xx_gpio_irq); | ||
2435 | |||
2436 | ret = request_irq(gpio_to_irq(stlc45xx_gpio_irq), | ||
2437 | stlc45xx_interrupt, IRQF_DISABLED, "stlc45xx", | ||
2438 | stlc->spi); | ||
2439 | if (ret < 0) | ||
2440 | /* FIXME: handle the error */ | ||
2441 | stlc45xx_error("request_irq() failed"); | ||
2442 | |||
2443 | set_irq_type(gpio_to_irq(stlc45xx_gpio_irq), | ||
2444 | IRQ_TYPE_EDGE_RISING); | ||
2445 | |||
2446 | disable_irq(gpio_to_irq(stlc45xx_gpio_irq)); | ||
2447 | |||
2448 | ret = platform_device_register(&stlc45xx_device); | ||
2449 | if (ret) { | ||
2450 | stlc45xx_error("Couldn't register wlan_omap device."); | ||
2451 | return ret; | ||
2452 | } | ||
2453 | dev_set_drvdata(&stlc45xx_device.dev, stlc); | ||
2454 | |||
2455 | INIT_WORK(&stlc->work, stlc45xx_work); | ||
2456 | INIT_WORK(&stlc->work_reset, stlc45xx_work_reset); | ||
2457 | INIT_DELAYED_WORK(&stlc->work_tx_timeout, stlc45xx_work_tx_timeout); | ||
2458 | mutex_init(&stlc->mutex); | ||
2459 | init_completion(&stlc->fw_comp); | ||
2460 | spin_lock_init(&stlc->tx_lock); | ||
2461 | INIT_LIST_HEAD(&stlc->txbuffer); | ||
2462 | INIT_LIST_HEAD(&stlc->tx_pending); | ||
2463 | INIT_LIST_HEAD(&stlc->tx_sent); | ||
2464 | |||
2465 | hw->flags = IEEE80211_HW_RX_INCLUDES_FCS | | ||
2466 | IEEE80211_HW_SIGNAL_DBM | | ||
2467 | IEEE80211_HW_NOISE_DBM; | ||
2468 | /* four bytes for padding */ | ||
2469 | hw->extra_tx_headroom = sizeof(struct s_lm_data_out) + 4; | ||
2470 | |||
2471 | /* unit us */ | ||
2472 | hw->channel_change_time = 1000; | ||
2473 | |||
2474 | hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION); | ||
2475 | hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &stlc45xx_band_2ghz; | ||
2476 | |||
2477 | SET_IEEE80211_DEV(hw, &spi->dev); | ||
2478 | |||
2479 | BUILD_BUG_ON(sizeof(default_cal_rssi) != RSSI_CAL_ARRAY_LEN); | ||
2480 | BUILD_BUG_ON(sizeof(default_cal_channels) != CHANNEL_CAL_ARRAY_LEN); | ||
2481 | |||
2482 | stlc->cal_rssi = kmemdup(default_cal_rssi, RSSI_CAL_ARRAY_LEN, | ||
2483 | GFP_KERNEL); | ||
2484 | stlc->cal_channels = kmemdup(default_cal_channels, | ||
2485 | CHANNEL_CAL_ARRAY_LEN, | ||
2486 | GFP_KERNEL); | ||
2487 | |||
2488 | ret = device_create_file(&stlc45xx_device.dev, &dev_attr_cal_rssi); | ||
2489 | if (ret < 0) { | ||
2490 | stlc45xx_error("failed to create sysfs file cal_rssi"); | ||
2491 | goto out; | ||
2492 | } | ||
2493 | |||
2494 | ret = device_create_file(&stlc45xx_device.dev, &dev_attr_cal_channels); | ||
2495 | if (ret < 0) { | ||
2496 | stlc45xx_error("failed to create sysfs file cal_channels"); | ||
2497 | goto out; | ||
2498 | } | ||
2499 | |||
2500 | ret = device_create_file(&stlc45xx_device.dev, &dev_attr_tx_buf); | ||
2501 | if (ret < 0) { | ||
2502 | stlc45xx_error("failed to create sysfs file tx_buf"); | ||
2503 | goto out; | ||
2504 | } | ||
2505 | |||
2506 | ret = stlc45xx_register_mac80211(stlc); | ||
2507 | if (ret < 0) | ||
2508 | goto out; | ||
2509 | |||
2510 | stlc45xx_info("v" DRIVER_VERSION " loaded"); | ||
2511 | |||
2512 | stlc45xx_info("config buffer 0x%x-0x%x", | ||
2513 | FIRMWARE_CONFIG_START, FIRMWARE_CONFIG_END); | ||
2514 | stlc45xx_info("tx 0x%x-0x%x, rx 0x%x-0x%x", | ||
2515 | FIRMWARE_TXBUFFER_START, FIRMWARE_TXBUFFER_END, | ||
2516 | FIRMWARE_RXBUFFER_START, FIRMWARE_RXBUFFER_END); | ||
2517 | |||
2518 | out: | ||
2519 | return ret; | ||
2520 | } | ||
2521 | |||
2522 | static int __devexit stlc45xx_remove(struct spi_device *spi) | ||
2523 | { | ||
2524 | struct stlc45xx *stlc = dev_get_drvdata(&spi->dev); | ||
2525 | |||
2526 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2527 | |||
2528 | platform_device_unregister(&stlc45xx_device); | ||
2529 | |||
2530 | ieee80211_unregister_hw(stlc->hw); | ||
2531 | |||
2532 | free_irq(gpio_to_irq(stlc45xx_gpio_irq), spi); | ||
2533 | |||
2534 | gpio_free(stlc45xx_gpio_power); | ||
2535 | gpio_free(stlc45xx_gpio_irq); | ||
2536 | |||
2537 | /* FIXME: free cal_channels and cal_rssi? */ | ||
2538 | |||
2539 | kfree(stlc->fw); | ||
2540 | |||
2541 | mutex_destroy(&stlc->mutex); | ||
2542 | |||
2543 | /* frees also stlc */ | ||
2544 | ieee80211_free_hw(stlc->hw); | ||
2545 | stlc = NULL; | ||
2546 | |||
2547 | return 0; | ||
2548 | } | ||
2549 | |||
2550 | |||
2551 | static struct spi_driver stlc45xx_spi_driver = { | ||
2552 | .driver = { | ||
2553 | /* use cx3110x name because board-n800.c uses that for the | ||
2554 | * SPI port */ | ||
2555 | .name = "cx3110x", | ||
2556 | .bus = &spi_bus_type, | ||
2557 | .owner = THIS_MODULE, | ||
2558 | }, | ||
2559 | |||
2560 | .probe = stlc45xx_probe, | ||
2561 | .remove = __devexit_p(stlc45xx_remove), | ||
2562 | }; | ||
2563 | |||
2564 | static int __init stlc45xx_init(void) | ||
2565 | { | ||
2566 | int ret; | ||
2567 | |||
2568 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2569 | |||
2570 | ret = spi_register_driver(&stlc45xx_spi_driver); | ||
2571 | if (ret < 0) { | ||
2572 | stlc45xx_error("failed to register SPI driver: %d", ret); | ||
2573 | goto out; | ||
2574 | } | ||
2575 | |||
2576 | out: | ||
2577 | return ret; | ||
2578 | } | ||
2579 | |||
2580 | static void __exit stlc45xx_exit(void) | ||
2581 | { | ||
2582 | stlc45xx_debug(DEBUG_FUNC, "%s", __func__); | ||
2583 | |||
2584 | spi_unregister_driver(&stlc45xx_spi_driver); | ||
2585 | |||
2586 | stlc45xx_info("unloaded"); | ||
2587 | } | ||
2588 | |||
2589 | module_init(stlc45xx_init); | ||
2590 | module_exit(stlc45xx_exit); | ||
2591 | |||
2592 | MODULE_LICENSE("GPL"); | ||
2593 | MODULE_AUTHOR("Kalle Valo <kalle.valo@nokia.com>"); | ||
2594 | MODULE_ALIAS("spi:cx3110x"); | ||
diff --git a/drivers/staging/stlc45xx/stlc45xx.h b/drivers/staging/stlc45xx/stlc45xx.h deleted file mode 100644 index ac96bbbde79f..000000000000 --- a/drivers/staging/stlc45xx/stlc45xx.h +++ /dev/null | |||
@@ -1,283 +0,0 @@ | |||
1 | /* | ||
2 | * This file is part of stlc45xx | ||
3 | * | ||
4 | * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies). | ||
5 | * | ||
6 | * Contact: Kalle Valo <kalle.valo@nokia.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or | ||
9 | * modify it under the terms of the GNU General Public License | ||
10 | * version 2 as published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but | ||
13 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
15 | * General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
20 | * 02110-1301 USA | ||
21 | * | ||
22 | */ | ||
23 | |||
24 | #include <linux/mutex.h> | ||
25 | #include <linux/list.h> | ||
26 | #include <net/mac80211.h> | ||
27 | |||
28 | #include "stlc45xx_lmac.h" | ||
29 | |||
30 | #define DRIVER_NAME "stlc45xx" | ||
31 | #define DRIVER_VERSION "0.1.3" | ||
32 | |||
33 | #define DRIVER_PREFIX DRIVER_NAME ": " | ||
34 | |||
35 | enum { | ||
36 | DEBUG_NONE = 0, | ||
37 | DEBUG_FUNC = 1 << 0, | ||
38 | DEBUG_IRQ = 1 << 1, | ||
39 | DEBUG_BH = 1 << 2, | ||
40 | DEBUG_RX = 1 << 3, | ||
41 | DEBUG_RX_CONTENT = 1 << 5, | ||
42 | DEBUG_TX = 1 << 6, | ||
43 | DEBUG_TX_CONTENT = 1 << 8, | ||
44 | DEBUG_TXBUFFER = 1 << 9, | ||
45 | DEBUG_QUEUE = 1 << 10, | ||
46 | DEBUG_BOOT = 1 << 11, | ||
47 | DEBUG_PSM = 1 << 12, | ||
48 | DEBUG_ALL = ~0, | ||
49 | }; | ||
50 | |||
51 | #define DEBUG_LEVEL DEBUG_NONE | ||
52 | /* #define DEBUG_LEVEL DEBUG_ALL */ | ||
53 | /* #define DEBUG_LEVEL (DEBUG_TX | DEBUG_RX | DEBUG_IRQ) */ | ||
54 | /* #define DEBUG_LEVEL (DEBUG_TX | DEBUG_MEMREGION | DEBUG_QUEUE) */ | ||
55 | /* #define DEBUG_LEVEL (DEBUG_MEMREGION | DEBUG_QUEUE) */ | ||
56 | |||
57 | #define stlc45xx_error(fmt, arg...) \ | ||
58 | printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg) | ||
59 | |||
60 | #define stlc45xx_warning(fmt, arg...) \ | ||
61 | printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg) | ||
62 | |||
63 | #define stlc45xx_info(fmt, arg...) \ | ||
64 | printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg) | ||
65 | |||
66 | #define stlc45xx_debug(level, fmt, arg...) \ | ||
67 | do { \ | ||
68 | if (level & DEBUG_LEVEL) \ | ||
69 | printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \ | ||
70 | } while (0) | ||
71 | |||
72 | #define stlc45xx_dump(level, buf, len) \ | ||
73 | do { \ | ||
74 | if (level & DEBUG_LEVEL) \ | ||
75 | print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, \ | ||
76 | 16, 1, buf, len, 1); \ | ||
77 | } while (0) | ||
78 | |||
79 | #define MAC2STR(a) ((a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]) | ||
80 | #define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x" | ||
81 | |||
82 | /* Bit 15 is read/write bit; ON = READ, OFF = WRITE */ | ||
83 | #define ADDR_READ_BIT_15 0x8000 | ||
84 | |||
85 | #define SPI_ADRS_ARM_INTERRUPTS 0x00 | ||
86 | #define SPI_ADRS_ARM_INT_EN 0x04 | ||
87 | |||
88 | #define SPI_ADRS_HOST_INTERRUPTS 0x08 | ||
89 | #define SPI_ADRS_HOST_INT_EN 0x0c | ||
90 | #define SPI_ADRS_HOST_INT_ACK 0x10 | ||
91 | |||
92 | #define SPI_ADRS_GEN_PURP_1 0x14 | ||
93 | #define SPI_ADRS_GEN_PURP_2 0x18 | ||
94 | |||
95 | /* high word */ | ||
96 | #define SPI_ADRS_DEV_CTRL_STAT 0x26 | ||
97 | |||
98 | #define SPI_ADRS_DMA_DATA 0x28 | ||
99 | |||
100 | #define SPI_ADRS_DMA_WRITE_CTRL 0x2c | ||
101 | #define SPI_ADRS_DMA_WRITE_LEN 0x2e | ||
102 | #define SPI_ADRS_DMA_WRITE_BASE 0x30 | ||
103 | |||
104 | #define SPI_ADRS_DMA_READ_CTRL 0x34 | ||
105 | #define SPI_ADRS_DMA_READ_LEN 0x36 | ||
106 | #define SPI_ADRS_DMA_READ_BASE 0x38 | ||
107 | |||
108 | #define SPI_CTRL_STAT_HOST_OVERRIDE 0x8000 | ||
109 | #define SPI_CTRL_STAT_START_HALTED 0x4000 | ||
110 | #define SPI_CTRL_STAT_RAM_BOOT 0x2000 | ||
111 | #define SPI_CTRL_STAT_HOST_RESET 0x1000 | ||
112 | #define SPI_CTRL_STAT_HOST_CPU_EN 0x0800 | ||
113 | |||
114 | #define SPI_DMA_WRITE_CTRL_ENABLE 0x0001 | ||
115 | #define SPI_DMA_READ_CTRL_ENABLE 0x0001 | ||
116 | #define HOST_ALLOWED (1 << 7) | ||
117 | |||
118 | #define FIRMWARE_ADDRESS 0x20000 | ||
119 | |||
120 | #define SPI_TIMEOUT 100 /* msec */ | ||
121 | |||
122 | #define SPI_MAX_TX_PACKETS 32 | ||
123 | |||
124 | #define SPI_MAX_PACKET_SIZE 32767 | ||
125 | |||
126 | #define SPI_TARGET_INT_WAKEUP 0x00000001 | ||
127 | #define SPI_TARGET_INT_SLEEP 0x00000002 | ||
128 | #define SPI_TARGET_INT_RDDONE 0x00000004 | ||
129 | |||
130 | #define SPI_TARGET_INT_CTS 0x00004000 | ||
131 | #define SPI_TARGET_INT_DR 0x00008000 | ||
132 | |||
133 | #define SPI_HOST_INT_READY 0x00000001 | ||
134 | #define SPI_HOST_INT_WR_READY 0x00000002 | ||
135 | #define SPI_HOST_INT_SW_UPDATE 0x00000004 | ||
136 | #define SPI_HOST_INT_UPDATE 0x10000000 | ||
137 | |||
138 | /* clear to send */ | ||
139 | #define SPI_HOST_INT_CTS 0x00004000 | ||
140 | |||
141 | /* data ready */ | ||
142 | #define SPI_HOST_INT_DR 0x00008000 | ||
143 | |||
144 | #define SPI_HOST_INTS_DEFAULT \ | ||
145 | (SPI_HOST_INT_READY | SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE) | ||
146 | |||
147 | #define TARGET_BOOT_SLEEP 50 | ||
148 | |||
149 | /* The firmware buffer is divided into three areas: | ||
150 | * | ||
151 | * o config area (for control commands) | ||
152 | * o tx buffer | ||
153 | * o rx buffer | ||
154 | */ | ||
155 | #define FIRMWARE_BUFFER_START 0x20200 | ||
156 | #define FIRMWARE_BUFFER_END 0x27c60 | ||
157 | #define FIRMWARE_BUFFER_LEN (FIRMWARE_BUFFER_END - FIRMWARE_BUFFER_START) | ||
158 | #define FIRMWARE_MTU 3240 | ||
159 | #define FIRMWARE_CONFIG_PAYLOAD_LEN 1024 | ||
160 | #define FIRMWARE_CONFIG_START FIRMWARE_BUFFER_START | ||
161 | #define FIRMWARE_CONFIG_LEN (sizeof(struct s_lm_control) + \ | ||
162 | FIRMWARE_CONFIG_PAYLOAD_LEN) | ||
163 | #define FIRMWARE_CONFIG_END (FIRMWARE_CONFIG_START + FIRMWARE_CONFIG_LEN - 1) | ||
164 | #define FIRMWARE_RXBUFFER_LEN (5 * FIRMWARE_MTU + 1024) | ||
165 | #define FIRMWARE_RXBUFFER_START (FIRMWARE_BUFFER_END - FIRMWARE_RXBUFFER_LEN) | ||
166 | #define FIRMWARE_RXBUFFER_END (FIRMWARE_RXBUFFER_START + \ | ||
167 | FIRMWARE_RXBUFFER_LEN - 1) | ||
168 | #define FIRMWARE_TXBUFFER_START (FIRMWARE_BUFFER_START + FIRMWARE_CONFIG_LEN) | ||
169 | #define FIRMWARE_TXBUFFER_LEN (FIRMWARE_BUFFER_LEN - FIRMWARE_CONFIG_LEN - \ | ||
170 | FIRMWARE_RXBUFFER_LEN) | ||
171 | #define FIRMWARE_TXBUFFER_END (FIRMWARE_TXBUFFER_START + \ | ||
172 | FIRMWARE_TXBUFFER_LEN - 1) | ||
173 | |||
174 | #define FIRMWARE_TXBUFFER_HEADER 100 | ||
175 | #define FIRMWARE_TXBUFFER_TRAILER 4 | ||
176 | |||
177 | /* FIXME: come up with a proper value */ | ||
178 | #define MAX_FRAME_LEN 2500 | ||
179 | |||
180 | /* unit is ms */ | ||
181 | #define TX_FRAME_LIFETIME 2000 | ||
182 | #define TX_TIMEOUT 4000 | ||
183 | |||
184 | #define SUPPORTED_CHANNELS 13 | ||
185 | |||
186 | /* FIXME */ | ||
187 | /* #define CHANNEL_CAL_LEN offsetof(struct s_lmo_scan, bratemask) - \ */ | ||
188 | /* offsetof(struct s_lmo_scan, channel) */ | ||
189 | #define CHANNEL_CAL_LEN 292 | ||
190 | #define CHANNEL_CAL_ARRAY_LEN (SUPPORTED_CHANNELS * CHANNEL_CAL_LEN) | ||
191 | /* FIXME */ | ||
192 | /* #define RSSI_CAL_LEN sizeof(struct s_lmo_scan) - \ */ | ||
193 | /* offsetof(struct s_lmo_scan, rssical) */ | ||
194 | #define RSSI_CAL_LEN 8 | ||
195 | #define RSSI_CAL_ARRAY_LEN (SUPPORTED_CHANNELS * RSSI_CAL_LEN) | ||
196 | |||
197 | struct s_dma_regs { | ||
198 | unsigned short cmd; | ||
199 | unsigned short len; | ||
200 | unsigned long addr; | ||
201 | }; | ||
202 | |||
203 | struct stlc45xx_ie_tim { | ||
204 | u8 dtim_count; | ||
205 | u8 dtim_period; | ||
206 | u8 bmap_control; | ||
207 | u8 pvbmap[251]; | ||
208 | }; | ||
209 | |||
210 | struct txbuffer { | ||
211 | /* can be removed when switched to skb queue */ | ||
212 | struct list_head tx_list; | ||
213 | |||
214 | struct list_head buffer_list; | ||
215 | |||
216 | int start; | ||
217 | int frame_start; | ||
218 | int end; | ||
219 | |||
220 | struct sk_buff *skb; | ||
221 | u32 handle; | ||
222 | |||
223 | bool status_needed; | ||
224 | |||
225 | int header_len; | ||
226 | |||
227 | /* unit jiffies */ | ||
228 | unsigned long lifetime; | ||
229 | }; | ||
230 | |||
231 | enum fw_state { | ||
232 | FW_STATE_OFF, | ||
233 | FW_STATE_BOOTING, | ||
234 | FW_STATE_READY, | ||
235 | FW_STATE_RESET, | ||
236 | FW_STATE_RESETTING, | ||
237 | }; | ||
238 | |||
239 | struct stlc45xx { | ||
240 | struct ieee80211_hw *hw; | ||
241 | struct spi_device *spi; | ||
242 | struct work_struct work; | ||
243 | struct work_struct work_reset; | ||
244 | struct delayed_work work_tx_timeout; | ||
245 | struct mutex mutex; | ||
246 | struct completion fw_comp; | ||
247 | |||
248 | |||
249 | u8 bssid[ETH_ALEN]; | ||
250 | u8 mac_addr[ETH_ALEN]; | ||
251 | int channel; | ||
252 | |||
253 | u8 *cal_rssi; | ||
254 | u8 *cal_channels; | ||
255 | |||
256 | enum fw_state fw_state; | ||
257 | |||
258 | spinlock_t tx_lock; | ||
259 | |||
260 | /* protected by tx_lock */ | ||
261 | struct list_head txbuffer; | ||
262 | |||
263 | /* protected by tx_lock */ | ||
264 | struct list_head tx_pending; | ||
265 | |||
266 | /* protected by tx_lock */ | ||
267 | int tx_queue_stopped; | ||
268 | |||
269 | /* protected by mutex */ | ||
270 | struct list_head tx_sent; | ||
271 | |||
272 | int tx_frames; | ||
273 | |||
274 | u8 *fw; | ||
275 | int fw_len; | ||
276 | |||
277 | bool psm; | ||
278 | bool associated; | ||
279 | int aid; | ||
280 | bool pspolling; | ||
281 | }; | ||
282 | |||
283 | |||
diff --git a/drivers/staging/stlc45xx/stlc45xx_lmac.h b/drivers/staging/stlc45xx/stlc45xx_lmac.h deleted file mode 100644 index af5db801347f..000000000000 --- a/drivers/staging/stlc45xx/stlc45xx_lmac.h +++ /dev/null | |||
@@ -1,434 +0,0 @@ | |||
1 | /************************************************************************ | ||
2 | * This is the LMAC API interface header file for STLC4560. * | ||
3 | * Copyright (C) 2007 Conexant Systems, Inc. * | ||
4 | * This program is free software; you can redistribute it and/or * | ||
5 | * modify it under the terms of the GNU General Public License * | ||
6 | * as published by the Free Software Foundation; either version 2 * | ||
7 | * of the License, or (at your option) any later version. * | ||
8 | * * | ||
9 | * This program is distributed in the hope that it will be useful, * | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of * | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * | ||
12 | * GNU General Public License for more details. * | ||
13 | * * | ||
14 | * You should have received a copy of the GNU General Public License * | ||
15 | * along with this program. If not, see <http://www.gnu.org/licenses/>.* | ||
16 | *************************************************************************/ | ||
17 | |||
18 | #ifndef __lmac_h__ | ||
19 | #define __lmac_h__ | ||
20 | |||
21 | #define LM_TOP_VARIANT 0x0506 | ||
22 | #define LM_BOTTOM_VARIANT 0x0506 | ||
23 | |||
24 | /* | ||
25 | * LMAC - UMAC interface definition: | ||
26 | */ | ||
27 | |||
28 | #define LM_FLAG_CONTROL 0x8000 | ||
29 | #define LM_FLAG_ALIGN 0x4000 | ||
30 | |||
31 | #define LM_CTRL_OPSET 0x0001 | ||
32 | |||
33 | #define LM_OUT_PROMISC 0x0001 | ||
34 | #define LM_OUT_TIMESTAMP 0x0002 | ||
35 | #define LM_OUT_SEQNR 0x0004 | ||
36 | #define LM_OUT_BURST 0x0010 | ||
37 | #define LM_OUT_NOCANCEL 0x0020 | ||
38 | #define LM_OUT_CLEARTIM 0x0040 | ||
39 | #define LM_OUT_HITCHHIKE 0x0080 | ||
40 | #define LM_OUT_COMPRESS 0x0100 | ||
41 | #define LM_OUT_CONCAT 0x0200 | ||
42 | #define LM_OUT_PCS_ACCEPT 0x0400 | ||
43 | #define LM_OUT_WAITEOSP 0x0800 | ||
44 | |||
45 | |||
46 | #define LM_ALOFT_SP 0x10 | ||
47 | #define LM_ALOFT_CTS 0x20 | ||
48 | #define LM_ALOFT_RTS 0x40 | ||
49 | #define LM_ALOFT_MASK 0x1f | ||
50 | #define LM_ALOFT_RATE 0x0f | ||
51 | |||
52 | #define LM_IN_FCS_GOOD 0x0001 | ||
53 | #define LM_IN_MATCH_MAC 0x0002 | ||
54 | #define LM_IN_MCBC 0x0004 | ||
55 | #define LM_IN_BEACON 0x0008 | ||
56 | #define LM_IN_MATCH_BSS 0x0010 | ||
57 | #define LM_IN_BCAST_BSS 0x0020 | ||
58 | #define LM_IN_DATA 0x0040 | ||
59 | #define LM_IN_TRUNCATED 0x0080 | ||
60 | |||
61 | #define LM_IN_TRANSPARENT 0x0200 | ||
62 | |||
63 | #define LM_QUEUE_BEACON 0 | ||
64 | #define LM_QUEUE_SCAN 1 | ||
65 | #define LM_QUEUE_MGT 2 | ||
66 | #define LM_QUEUE_MCBC 3 | ||
67 | #define LM_QUEUE_DATA 4 | ||
68 | #define LM_QUEUE_DATA0 4 | ||
69 | #define LM_QUEUE_DATA1 5 | ||
70 | #define LM_QUEUE_DATA2 6 | ||
71 | #define LM_QUEUE_DATA3 7 | ||
72 | |||
73 | #define LM_SETUP_INFRA 0x0001 | ||
74 | #define LM_SETUP_IBSS 0x0002 | ||
75 | #define LM_SETUP_TRANSPARENT 0x0008 | ||
76 | #define LM_SETUP_PROMISCUOUS 0x0010 | ||
77 | #define LM_SETUP_HIBERNATE 0x0020 | ||
78 | #define LM_SETUP_NOACK 0x0040 | ||
79 | #define LM_SETUP_RX_DISABLED 0x0080 | ||
80 | |||
81 | #define LM_ANTENNA_0 0 | ||
82 | #define LM_ANTENNA_1 1 | ||
83 | #define LM_ANTENNA_DIVERSITY 2 | ||
84 | |||
85 | #define LM_TX_FAILED 0x0001 | ||
86 | #define LM_TX_PSM 0x0002 | ||
87 | #define LM_TX_PSM_CANCELLED 0x0004 | ||
88 | |||
89 | #define LM_SCAN_EXIT 0x0001 | ||
90 | #define LM_SCAN_TRAP 0x0002 | ||
91 | #define LM_SCAN_ACTIVE 0x0004 | ||
92 | #define LM_SCAN_FILTER 0x0008 | ||
93 | |||
94 | #define LM_PSM 0x0001 | ||
95 | #define LM_PSM_DTIM 0x0002 | ||
96 | #define LM_PSM_MCBC 0x0004 | ||
97 | #define LM_PSM_CHECKSUM 0x0008 | ||
98 | #define LM_PSM_SKIP_MORE_DATA 0x0010 | ||
99 | #define LM_PSM_BEACON_TIMEOUT 0x0020 | ||
100 | #define LM_PSM_HFOSLEEP 0x0040 | ||
101 | #define LM_PSM_AUTOSWITCH_SLEEP 0x0080 | ||
102 | #define LM_PSM_LPIT 0x0100 | ||
103 | #define LM_PSM_BF_UCAST_SKIP 0x0200 | ||
104 | #define LM_PSM_BF_MCAST_SKIP 0x0400 | ||
105 | |||
106 | /* hfosleep */ | ||
107 | #define LM_PSM_SLEEP_OPTION_MASK (LM_PSM_AUTOSWITCH_SLEEP | LM_PSM_HFOSLEEP) | ||
108 | #define LM_PSM_SLEEP_OPTION_SHIFT 6 | ||
109 | /* hfosleepend */ | ||
110 | #define LM_PSM_BF_OPTION_MASK (LM_PSM_BF_MCAST_SKIP | LM_PSM_BF_UCAST_SKIP) | ||
111 | #define LM_PSM_BF_OPTION_SHIFT 9 | ||
112 | |||
113 | |||
114 | #define LM_PRIVACC_WEP 0x01 | ||
115 | #define LM_PRIVACC_TKIP 0x02 | ||
116 | #define LM_PRIVACC_MICHAEL 0x04 | ||
117 | #define LM_PRIVACC_CCX_KP 0x08 | ||
118 | #define LM_PRIVACC_CCX_MIC 0x10 | ||
119 | #define LM_PRIVACC_AES_CCMP 0x20 | ||
120 | |||
121 | /* size of s_lm_descr in words */ | ||
122 | #define LM_DESCR_SIZE_WORDS 11 | ||
123 | |||
124 | #ifndef __ASSEMBLER__ | ||
125 | |||
126 | enum { | ||
127 | LM_MODE_CLIENT = 0, | ||
128 | LM_MODE_AP | ||
129 | }; | ||
130 | |||
131 | struct s_lm_descr { | ||
132 | uint16_t modes; | ||
133 | uint16_t flags; | ||
134 | uint32_t buffer_start; | ||
135 | uint32_t buffer_end; | ||
136 | uint8_t header; | ||
137 | uint8_t trailer; | ||
138 | uint8_t tx_queues; | ||
139 | uint8_t tx_depth; | ||
140 | uint8_t privacy; | ||
141 | uint8_t rx_keycache; | ||
142 | uint8_t tim_size; | ||
143 | uint8_t pad1; | ||
144 | uint8_t rates[16]; | ||
145 | uint32_t link; | ||
146 | uint16_t mtu; | ||
147 | }; | ||
148 | |||
149 | |||
150 | struct s_lm_control { | ||
151 | uint16_t flags; | ||
152 | uint16_t length; | ||
153 | uint32_t handle; | ||
154 | uint16_t oid; | ||
155 | uint16_t pad; | ||
156 | /* uint8_t data[]; */ | ||
157 | }; | ||
158 | |||
159 | enum { | ||
160 | LM_PRIV_NONE = 0, | ||
161 | LM_PRIV_WEP, | ||
162 | LM_PRIV_TKIP, | ||
163 | LM_PRIV_TKIPMICHAEL, | ||
164 | LM_PRIV_CCX_WEPMIC, | ||
165 | LM_PRIV_CCX_KPMIC, | ||
166 | LM_PRIV_CCX_KP, | ||
167 | LM_PRIV_AES_CCMP | ||
168 | }; | ||
169 | |||
170 | enum { | ||
171 | LM_DECRYPT_NONE, | ||
172 | LM_DECRYPT_OK, | ||
173 | LM_DECRYPT_NOKEY, | ||
174 | LM_DECRYPT_NOMICHAEL, | ||
175 | LM_DECRYPT_NOCKIPMIC, | ||
176 | LM_DECRYPT_FAIL_WEP, | ||
177 | LM_DECRYPT_FAIL_TKIP, | ||
178 | LM_DECRYPT_FAIL_MICHAEL, | ||
179 | LM_DECRYPT_FAIL_CKIPKP, | ||
180 | LM_DECRYPT_FAIL_CKIPMIC, | ||
181 | LM_DECRYPT_FAIL_AESCCMP | ||
182 | }; | ||
183 | |||
184 | struct s_lm_data_out { | ||
185 | uint16_t flags; | ||
186 | uint16_t length; | ||
187 | uint32_t handle; | ||
188 | uint16_t aid; | ||
189 | uint8_t rts_retries; | ||
190 | uint8_t retries; | ||
191 | uint8_t aloft[8]; | ||
192 | uint8_t aloft_ctrl; | ||
193 | uint8_t crypt_offset; | ||
194 | uint8_t keytype; | ||
195 | uint8_t keylen; | ||
196 | uint8_t key[16]; | ||
197 | uint8_t queue; | ||
198 | uint8_t backlog; | ||
199 | uint16_t durations[4]; | ||
200 | uint8_t antenna; | ||
201 | uint8_t cts; | ||
202 | int16_t power; | ||
203 | uint8_t pad[2]; | ||
204 | /*uint8_t data[];*/ | ||
205 | }; | ||
206 | |||
207 | #define LM_RCPI_INVALID (0xff) | ||
208 | |||
209 | struct s_lm_data_in { | ||
210 | uint16_t flags; | ||
211 | uint16_t length; | ||
212 | uint16_t frequency; | ||
213 | uint8_t antenna; | ||
214 | uint8_t rate; | ||
215 | uint8_t rcpi; | ||
216 | uint8_t sq; | ||
217 | uint8_t decrypt; | ||
218 | uint8_t rssi_raw; | ||
219 | uint32_t clock[2]; | ||
220 | /*uint8_t data[];*/ | ||
221 | }; | ||
222 | |||
223 | union u_lm_data { | ||
224 | struct s_lm_data_out out; | ||
225 | struct s_lm_data_in in; | ||
226 | }; | ||
227 | |||
228 | enum { | ||
229 | LM_OID_SETUP = 0, | ||
230 | LM_OID_SCAN = 1, | ||
231 | LM_OID_TRAP = 2, | ||
232 | LM_OID_EDCF = 3, | ||
233 | LM_OID_KEYCACHE = 4, | ||
234 | LM_OID_PSM = 6, | ||
235 | LM_OID_TXCANCEL = 7, | ||
236 | LM_OID_TX = 8, | ||
237 | LM_OID_BURST = 9, | ||
238 | LM_OID_STATS = 10, | ||
239 | LM_OID_LED = 13, | ||
240 | LM_OID_TIMER = 15, | ||
241 | LM_OID_NAV = 20, | ||
242 | LM_OID_PCS = 22, | ||
243 | LM_OID_BT_BALANCER = 28, | ||
244 | LM_OID_GROUP_ADDRESS_TABLE = 30, | ||
245 | LM_OID_ARPTABLE = 31, | ||
246 | LM_OID_BT_OPTIONS = 35 | ||
247 | }; | ||
248 | |||
249 | enum { | ||
250 | LM_FRONTEND_UNKNOWN = 0, | ||
251 | LM_FRONTEND_DUETTE3, | ||
252 | LM_FRONTEND_DUETTE2, | ||
253 | LM_FRONTEND_FRISBEE, | ||
254 | LM_FRONTEND_CROSSBOW, | ||
255 | LM_FRONTEND_LONGBOW | ||
256 | }; | ||
257 | |||
258 | |||
259 | #define INVALID_LPF_BANDWIDTH 0xffff | ||
260 | #define INVALID_OSC_START_DELAY 0xffff | ||
261 | |||
262 | struct s_lmo_setup { | ||
263 | uint16_t flags; | ||
264 | uint8_t macaddr[6]; | ||
265 | uint8_t bssid[6]; | ||
266 | uint8_t antenna; | ||
267 | uint8_t rx_align; | ||
268 | uint32_t rx_buffer; | ||
269 | uint16_t rx_mtu; | ||
270 | uint16_t frontend; | ||
271 | uint16_t timeout; | ||
272 | uint16_t truncate; | ||
273 | uint32_t bratemask; | ||
274 | uint8_t sbss_offset; | ||
275 | uint8_t mcast_window; | ||
276 | uint8_t rx_rssi_threshold; | ||
277 | uint8_t rx_ed_threshold; | ||
278 | uint32_t ref_clock; | ||
279 | uint16_t lpf_bandwidth; | ||
280 | uint16_t osc_start_delay; | ||
281 | }; | ||
282 | |||
283 | |||
284 | struct s_lmo_scan { | ||
285 | uint16_t flags; | ||
286 | uint16_t dwell; | ||
287 | uint8_t channel[292]; | ||
288 | uint32_t bratemask; | ||
289 | uint8_t aloft[8]; | ||
290 | uint8_t rssical[8]; | ||
291 | }; | ||
292 | |||
293 | |||
294 | enum { | ||
295 | LM_TRAP_SCAN = 0, | ||
296 | LM_TRAP_TIMER, | ||
297 | LM_TRAP_BEACON_TX, | ||
298 | LM_TRAP_FAA_RADIO_ON, | ||
299 | LM_TRAP_FAA_RADIO_OFF, | ||
300 | LM_TRAP_RADAR, | ||
301 | LM_TRAP_NO_BEACON, | ||
302 | LM_TRAP_TBTT, | ||
303 | LM_TRAP_SCO_ENTER, | ||
304 | LM_TRAP_SCO_EXIT | ||
305 | }; | ||
306 | |||
307 | struct s_lmo_trap { | ||
308 | uint16_t event; | ||
309 | uint16_t frequency; | ||
310 | }; | ||
311 | |||
312 | struct s_lmo_timer { | ||
313 | uint32_t interval; | ||
314 | }; | ||
315 | |||
316 | struct s_lmo_nav { | ||
317 | uint32_t period; | ||
318 | }; | ||
319 | |||
320 | |||
321 | struct s_lmo_edcf_queue; | ||
322 | |||
323 | struct s_lmo_edcf { | ||
324 | uint8_t flags; | ||
325 | uint8_t slottime; | ||
326 | uint8_t sifs; | ||
327 | uint8_t eofpad; | ||
328 | struct s_lmo_edcf_queue { | ||
329 | uint8_t aifs; | ||
330 | uint8_t pad0; | ||
331 | uint16_t cwmin; | ||
332 | uint16_t cwmax; | ||
333 | uint16_t txop; | ||
334 | } queues[8]; | ||
335 | uint8_t mapping[4]; | ||
336 | uint16_t maxburst; | ||
337 | uint16_t round_trip_delay; | ||
338 | }; | ||
339 | |||
340 | struct s_lmo_keycache { | ||
341 | uint8_t entry; | ||
342 | uint8_t keyid; | ||
343 | uint8_t address[6]; | ||
344 | uint8_t pad[2]; | ||
345 | uint8_t keytype; | ||
346 | uint8_t keylen; | ||
347 | uint8_t key[24]; | ||
348 | }; | ||
349 | |||
350 | |||
351 | struct s_lm_interval; | ||
352 | |||
353 | struct s_lmo_psm { | ||
354 | uint16_t flags; | ||
355 | uint16_t aid; | ||
356 | struct s_lm_interval { | ||
357 | uint16_t interval; | ||
358 | uint16_t periods; | ||
359 | } intervals[4]; | ||
360 | /* uint16_t pad; */ | ||
361 | uint8_t beacon_rcpi_skip_max; | ||
362 | uint8_t rcpi_delta_threshold; | ||
363 | uint8_t nr; | ||
364 | uint8_t exclude[1]; | ||
365 | }; | ||
366 | |||
367 | #define MC_FILTER_ADDRESS_NUM 4 | ||
368 | |||
369 | struct s_lmo_group_address_table { | ||
370 | uint16_t filter_enable; | ||
371 | uint16_t num_address; | ||
372 | uint8_t macaddr_list[MC_FILTER_ADDRESS_NUM][6]; | ||
373 | }; | ||
374 | |||
375 | struct s_lmo_txcancel { | ||
376 | uint32_t address[1]; | ||
377 | }; | ||
378 | |||
379 | |||
380 | struct s_lmo_tx { | ||
381 | uint8_t flags; | ||
382 | uint8_t retries; | ||
383 | uint8_t rcpi; | ||
384 | uint8_t sq; | ||
385 | uint16_t seqctrl; | ||
386 | uint8_t antenna; | ||
387 | uint8_t pad; | ||
388 | }; | ||
389 | |||
390 | struct s_lmo_burst { | ||
391 | uint8_t flags; | ||
392 | uint8_t queue; | ||
393 | uint8_t backlog; | ||
394 | uint8_t pad; | ||
395 | uint16_t durations[32]; | ||
396 | }; | ||
397 | |||
398 | struct s_lmo_stats { | ||
399 | uint32_t valid; | ||
400 | uint32_t fcs; | ||
401 | uint32_t abort; | ||
402 | uint32_t phyabort; | ||
403 | uint32_t rts_success; | ||
404 | uint32_t rts_fail; | ||
405 | uint32_t timestamp; | ||
406 | uint32_t time_tx; | ||
407 | uint32_t noisefloor; | ||
408 | uint32_t sample_noise[8]; | ||
409 | uint32_t sample_cca; | ||
410 | uint32_t sample_tx; | ||
411 | }; | ||
412 | |||
413 | |||
414 | struct s_lmo_led { | ||
415 | uint16_t flags; | ||
416 | uint16_t mask[2]; | ||
417 | uint16_t delay/*[2]*/; | ||
418 | }; | ||
419 | |||
420 | |||
421 | struct s_lmo_bt_balancer { | ||
422 | uint16_t prio_thresh; | ||
423 | uint16_t acl_thresh; | ||
424 | }; | ||
425 | |||
426 | |||
427 | struct s_lmo_arp_table { | ||
428 | uint16_t filter_enable; | ||
429 | uint32_t ipaddr; | ||
430 | }; | ||
431 | |||
432 | #endif /* __ASSEMBLER__ */ | ||
433 | |||
434 | #endif /* __lmac_h__ */ | ||
diff --git a/drivers/staging/vt6656/main_usb.c b/drivers/staging/vt6656/main_usb.c index 7f96bcaf1c60..05186110c029 100644 --- a/drivers/staging/vt6656/main_usb.c +++ b/drivers/staging/vt6656/main_usb.c | |||
@@ -1332,7 +1332,6 @@ device_release_WPADEV(pDevice); | |||
1332 | free_netdev(pDevice->dev); | 1332 | free_netdev(pDevice->dev); |
1333 | } | 1333 | } |
1334 | 1334 | ||
1335 | kfree(pDevice); | ||
1336 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_disconnect3.. \n"); | 1335 | DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_disconnect3.. \n"); |
1337 | } | 1336 | } |
1338 | 1337 | ||
diff --git a/drivers/staging/winbond/Kconfig b/drivers/staging/winbond/Kconfig index 940460c39f36..132671d96d0d 100644 --- a/drivers/staging/winbond/Kconfig +++ b/drivers/staging/winbond/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config W35UND | 1 | config W35UND |
2 | tristate "IS89C35 WLAN USB driver" | 2 | tristate "IS89C35 WLAN USB driver" |
3 | depends on MAC80211 && WLAN_80211 && USB && EXPERIMENTAL | 3 | depends on MAC80211 && WLAN && USB && EXPERIMENTAL |
4 | default n | 4 | default n |
5 | ---help--- | 5 | ---help--- |
6 | This is highly experimental driver for Winbond WIFI card. | 6 | This is highly experimental driver for Winbond WIFI card. |
diff --git a/drivers/staging/wlan-ng/Kconfig b/drivers/staging/wlan-ng/Kconfig index 9959b658c8cf..f44294b0d8dc 100644 --- a/drivers/staging/wlan-ng/Kconfig +++ b/drivers/staging/wlan-ng/Kconfig | |||
@@ -1,6 +1,6 @@ | |||
1 | config PRISM2_USB | 1 | config PRISM2_USB |
2 | tristate "Prism2.5/3 USB driver" | 2 | tristate "Prism2.5/3 USB driver" |
3 | depends on WLAN_80211 && USB && WIRELESS_EXT | 3 | depends on WLAN && USB && WIRELESS_EXT |
4 | default n | 4 | default n |
5 | ---help--- | 5 | ---help--- |
6 | This is the wlan-ng prism 2.5/3 USB driver for a wide range of | 6 | This is the wlan-ng prism 2.5/3 USB driver for a wide range of |
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c index 4e83c297ec9e..6f8d8f971212 100644 --- a/drivers/thermal/thermal_sys.c +++ b/drivers/thermal/thermal_sys.c | |||
@@ -180,15 +180,15 @@ trip_point_type_show(struct device *dev, struct device_attribute *attr, | |||
180 | 180 | ||
181 | switch (type) { | 181 | switch (type) { |
182 | case THERMAL_TRIP_CRITICAL: | 182 | case THERMAL_TRIP_CRITICAL: |
183 | return sprintf(buf, "critical"); | 183 | return sprintf(buf, "critical\n"); |
184 | case THERMAL_TRIP_HOT: | 184 | case THERMAL_TRIP_HOT: |
185 | return sprintf(buf, "hot"); | 185 | return sprintf(buf, "hot\n"); |
186 | case THERMAL_TRIP_PASSIVE: | 186 | case THERMAL_TRIP_PASSIVE: |
187 | return sprintf(buf, "passive"); | 187 | return sprintf(buf, "passive\n"); |
188 | case THERMAL_TRIP_ACTIVE: | 188 | case THERMAL_TRIP_ACTIVE: |
189 | return sprintf(buf, "active"); | 189 | return sprintf(buf, "active\n"); |
190 | default: | 190 | default: |
191 | return sprintf(buf, "unknown"); | 191 | return sprintf(buf, "unknown\n"); |
192 | } | 192 | } |
193 | } | 193 | } |
194 | 194 | ||
diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c index 02347c57357d..aa53db9f2e88 100644 --- a/drivers/uio/uio_pdrv_genirq.c +++ b/drivers/uio/uio_pdrv_genirq.c | |||
@@ -178,6 +178,7 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev) | |||
178 | return 0; | 178 | return 0; |
179 | bad1: | 179 | bad1: |
180 | kfree(priv); | 180 | kfree(priv); |
181 | pm_runtime_disable(&pdev->dev); | ||
181 | bad0: | 182 | bad0: |
182 | return ret; | 183 | return ret; |
183 | } | 184 | } |
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c index e3861b21e776..e4eca7810bcf 100644 --- a/drivers/usb/class/cdc-acm.c +++ b/drivers/usb/class/cdc-acm.c | |||
@@ -609,9 +609,9 @@ static int acm_tty_open(struct tty_struct *tty, struct file *filp) | |||
609 | 609 | ||
610 | acm->throttle = 0; | 610 | acm->throttle = 0; |
611 | 611 | ||
612 | tasklet_schedule(&acm->urb_task); | ||
613 | set_bit(ASYNCB_INITIALIZED, &acm->port.flags); | 612 | set_bit(ASYNCB_INITIALIZED, &acm->port.flags); |
614 | rv = tty_port_block_til_ready(&acm->port, tty, filp); | 613 | rv = tty_port_block_til_ready(&acm->port, tty, filp); |
614 | tasklet_schedule(&acm->urb_task); | ||
615 | done: | 615 | done: |
616 | mutex_unlock(&acm->mutex); | 616 | mutex_unlock(&acm->mutex); |
617 | err_out: | 617 | err_out: |
@@ -686,15 +686,21 @@ static void acm_tty_close(struct tty_struct *tty, struct file *filp) | |||
686 | 686 | ||
687 | /* Perform the closing process and see if we need to do the hardware | 687 | /* Perform the closing process and see if we need to do the hardware |
688 | shutdown */ | 688 | shutdown */ |
689 | if (!acm || tty_port_close_start(&acm->port, tty, filp) == 0) | 689 | if (!acm) |
690 | return; | ||
691 | if (tty_port_close_start(&acm->port, tty, filp) == 0) { | ||
692 | mutex_lock(&open_mutex); | ||
693 | if (!acm->dev) { | ||
694 | tty_port_tty_set(&acm->port, NULL); | ||
695 | acm_tty_unregister(acm); | ||
696 | tty->driver_data = NULL; | ||
697 | } | ||
698 | mutex_unlock(&open_mutex); | ||
690 | return; | 699 | return; |
700 | } | ||
691 | acm_port_down(acm, 0); | 701 | acm_port_down(acm, 0); |
692 | tty_port_close_end(&acm->port, tty); | 702 | tty_port_close_end(&acm->port, tty); |
693 | mutex_lock(&open_mutex); | ||
694 | tty_port_tty_set(&acm->port, NULL); | 703 | tty_port_tty_set(&acm->port, NULL); |
695 | if (!acm->dev) | ||
696 | acm_tty_unregister(acm); | ||
697 | mutex_unlock(&open_mutex); | ||
698 | } | 704 | } |
699 | 705 | ||
700 | static int acm_tty_write(struct tty_struct *tty, | 706 | static int acm_tty_write(struct tty_struct *tty, |
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 33351312327f..a18e3c5dd82e 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig | |||
@@ -223,6 +223,7 @@ config USB_OTG | |||
223 | config USB_GADGET_PXA25X | 223 | config USB_GADGET_PXA25X |
224 | boolean "PXA 25x or IXP 4xx" | 224 | boolean "PXA 25x or IXP 4xx" |
225 | depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX | 225 | depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX |
226 | select USB_OTG_UTILS | ||
226 | help | 227 | help |
227 | Intel's PXA 25x series XScale ARM-5TE processors include | 228 | Intel's PXA 25x series XScale ARM-5TE processors include |
228 | an integrated full speed USB 1.1 device controller. The | 229 | an integrated full speed USB 1.1 device controller. The |
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c index 42a74b8a0bb8..fa3d142ba64d 100644 --- a/drivers/usb/gadget/fsl_udc_core.c +++ b/drivers/usb/gadget/fsl_udc_core.c | |||
@@ -2139,7 +2139,7 @@ static int fsl_proc_read(char *page, char **start, off_t off, int count, | |||
2139 | static void fsl_udc_release(struct device *dev) | 2139 | static void fsl_udc_release(struct device *dev) |
2140 | { | 2140 | { |
2141 | complete(udc_controller->done); | 2141 | complete(udc_controller->done); |
2142 | dma_free_coherent(dev, udc_controller->ep_qh_size, | 2142 | dma_free_coherent(dev->parent, udc_controller->ep_qh_size, |
2143 | udc_controller->ep_qh, udc_controller->ep_qh_dma); | 2143 | udc_controller->ep_qh, udc_controller->ep_qh_dma); |
2144 | kfree(udc_controller); | 2144 | kfree(udc_controller); |
2145 | } | 2145 | } |
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c index 78bb7710f36d..24eb74781919 100644 --- a/drivers/usb/host/ohci-hcd.c +++ b/drivers/usb/host/ohci-hcd.c | |||
@@ -87,6 +87,7 @@ static int ohci_restart (struct ohci_hcd *ohci); | |||
87 | #ifdef CONFIG_PCI | 87 | #ifdef CONFIG_PCI |
88 | static void quirk_amd_pll(int state); | 88 | static void quirk_amd_pll(int state); |
89 | static void amd_iso_dev_put(void); | 89 | static void amd_iso_dev_put(void); |
90 | static void sb800_prefetch(struct ohci_hcd *ohci, int on); | ||
90 | #else | 91 | #else |
91 | static inline void quirk_amd_pll(int state) | 92 | static inline void quirk_amd_pll(int state) |
92 | { | 93 | { |
@@ -96,6 +97,10 @@ static inline void amd_iso_dev_put(void) | |||
96 | { | 97 | { |
97 | return; | 98 | return; |
98 | } | 99 | } |
100 | static inline void sb800_prefetch(struct ohci_hcd *ohci, int on) | ||
101 | { | ||
102 | return; | ||
103 | } | ||
99 | #endif | 104 | #endif |
100 | 105 | ||
101 | 106 | ||
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c index d2ba04dd785e..b8a1148f248e 100644 --- a/drivers/usb/host/ohci-pci.c +++ b/drivers/usb/host/ohci-pci.c | |||
@@ -177,6 +177,13 @@ static int ohci_quirk_amd700(struct usb_hcd *hcd) | |||
177 | return 0; | 177 | return 0; |
178 | 178 | ||
179 | pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev); | 179 | pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev); |
180 | |||
181 | /* SB800 needs pre-fetch fix */ | ||
182 | if ((rev >= 0x40) && (rev <= 0x4f)) { | ||
183 | ohci->flags |= OHCI_QUIRK_AMD_PREFETCH; | ||
184 | ohci_dbg(ohci, "enabled AMD prefetch quirk\n"); | ||
185 | } | ||
186 | |||
180 | if ((rev > 0x3b) || (rev < 0x30)) { | 187 | if ((rev > 0x3b) || (rev < 0x30)) { |
181 | pci_dev_put(amd_smbus_dev); | 188 | pci_dev_put(amd_smbus_dev); |
182 | amd_smbus_dev = NULL; | 189 | amd_smbus_dev = NULL; |
@@ -262,6 +269,19 @@ static void amd_iso_dev_put(void) | |||
262 | 269 | ||
263 | } | 270 | } |
264 | 271 | ||
272 | static void sb800_prefetch(struct ohci_hcd *ohci, int on) | ||
273 | { | ||
274 | struct pci_dev *pdev; | ||
275 | u16 misc; | ||
276 | |||
277 | pdev = to_pci_dev(ohci_to_hcd(ohci)->self.controller); | ||
278 | pci_read_config_word(pdev, 0x50, &misc); | ||
279 | if (on == 0) | ||
280 | pci_write_config_word(pdev, 0x50, misc & 0xfcff); | ||
281 | else | ||
282 | pci_write_config_word(pdev, 0x50, misc | 0x0300); | ||
283 | } | ||
284 | |||
265 | /* List of quirks for OHCI */ | 285 | /* List of quirks for OHCI */ |
266 | static const struct pci_device_id ohci_pci_quirks[] = { | 286 | static const struct pci_device_id ohci_pci_quirks[] = { |
267 | { | 287 | { |
diff --git a/drivers/usb/host/ohci-q.c b/drivers/usb/host/ohci-q.c index 16fecb8ecc39..35288bcae0db 100644 --- a/drivers/usb/host/ohci-q.c +++ b/drivers/usb/host/ohci-q.c | |||
@@ -49,9 +49,12 @@ __acquires(ohci->lock) | |||
49 | switch (usb_pipetype (urb->pipe)) { | 49 | switch (usb_pipetype (urb->pipe)) { |
50 | case PIPE_ISOCHRONOUS: | 50 | case PIPE_ISOCHRONOUS: |
51 | ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--; | 51 | ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--; |
52 | if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0 | 52 | if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) { |
53 | && quirk_amdiso(ohci)) | 53 | if (quirk_amdiso(ohci)) |
54 | quirk_amd_pll(1); | 54 | quirk_amd_pll(1); |
55 | if (quirk_amdprefetch(ohci)) | ||
56 | sb800_prefetch(ohci, 0); | ||
57 | } | ||
55 | break; | 58 | break; |
56 | case PIPE_INTERRUPT: | 59 | case PIPE_INTERRUPT: |
57 | ohci_to_hcd(ohci)->self.bandwidth_int_reqs--; | 60 | ohci_to_hcd(ohci)->self.bandwidth_int_reqs--; |
@@ -680,9 +683,12 @@ static void td_submit_urb ( | |||
680 | data + urb->iso_frame_desc [cnt].offset, | 683 | data + urb->iso_frame_desc [cnt].offset, |
681 | urb->iso_frame_desc [cnt].length, urb, cnt); | 684 | urb->iso_frame_desc [cnt].length, urb, cnt); |
682 | } | 685 | } |
683 | if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0 | 686 | if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) { |
684 | && quirk_amdiso(ohci)) | 687 | if (quirk_amdiso(ohci)) |
685 | quirk_amd_pll(0); | 688 | quirk_amd_pll(0); |
689 | if (quirk_amdprefetch(ohci)) | ||
690 | sb800_prefetch(ohci, 1); | ||
691 | } | ||
686 | periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0 | 692 | periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0 |
687 | && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0; | 693 | && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0; |
688 | break; | 694 | break; |
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h index 222011f6172c..5bf15fed0d9f 100644 --- a/drivers/usb/host/ohci.h +++ b/drivers/usb/host/ohci.h | |||
@@ -402,6 +402,7 @@ struct ohci_hcd { | |||
402 | #define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */ | 402 | #define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */ |
403 | #define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ | 403 | #define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ |
404 | #define OHCI_QUIRK_AMD_ISO 0x200 /* ISO transfers*/ | 404 | #define OHCI_QUIRK_AMD_ISO 0x200 /* ISO transfers*/ |
405 | #define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */ | ||
405 | // there are also chip quirks/bugs in init logic | 406 | // there are also chip quirks/bugs in init logic |
406 | 407 | ||
407 | struct work_struct nec_work; /* Worker for NEC quirk */ | 408 | struct work_struct nec_work; /* Worker for NEC quirk */ |
@@ -433,6 +434,10 @@ static inline int quirk_amdiso(struct ohci_hcd *ohci) | |||
433 | { | 434 | { |
434 | return ohci->flags & OHCI_QUIRK_AMD_ISO; | 435 | return ohci->flags & OHCI_QUIRK_AMD_ISO; |
435 | } | 436 | } |
437 | static inline int quirk_amdprefetch(struct ohci_hcd *ohci) | ||
438 | { | ||
439 | return ohci->flags & OHCI_QUIRK_AMD_PREFETCH; | ||
440 | } | ||
436 | #else | 441 | #else |
437 | static inline int quirk_nec(struct ohci_hcd *ohci) | 442 | static inline int quirk_nec(struct ohci_hcd *ohci) |
438 | { | 443 | { |
@@ -446,6 +451,10 @@ static inline int quirk_amdiso(struct ohci_hcd *ohci) | |||
446 | { | 451 | { |
447 | return 0; | 452 | return 0; |
448 | } | 453 | } |
454 | static inline int quirk_amdprefetch(struct ohci_hcd *ohci) | ||
455 | { | ||
456 | return 0; | ||
457 | } | ||
449 | #endif | 458 | #endif |
450 | 459 | ||
451 | /* convert between an hcd pointer and the corresponding ohci_hcd */ | 460 | /* convert between an hcd pointer and the corresponding ohci_hcd */ |
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c index 749b53742828..e33d36256350 100644 --- a/drivers/usb/host/r8a66597-hcd.c +++ b/drivers/usb/host/r8a66597-hcd.c | |||
@@ -1003,19 +1003,20 @@ static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port, | |||
1003 | if (syssts == SE0) { | 1003 | if (syssts == SE0) { |
1004 | r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port)); | 1004 | r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port)); |
1005 | r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port)); | 1005 | r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port)); |
1006 | return; | 1006 | } else { |
1007 | } | 1007 | if (syssts == FS_JSTS) |
1008 | r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port)); | ||
1009 | else if (syssts == LS_JSTS) | ||
1010 | r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port)); | ||
1008 | 1011 | ||
1009 | if (syssts == FS_JSTS) | 1012 | r8a66597_write(r8a66597, ~DTCH, get_intsts_reg(port)); |
1010 | r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port)); | 1013 | r8a66597_bset(r8a66597, DTCHE, get_intenb_reg(port)); |
1011 | else if (syssts == LS_JSTS) | ||
1012 | r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port)); | ||
1013 | 1014 | ||
1014 | r8a66597_write(r8a66597, ~DTCH, get_intsts_reg(port)); | 1015 | if (r8a66597->bus_suspended) |
1015 | r8a66597_bset(r8a66597, DTCHE, get_intenb_reg(port)); | 1016 | usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597)); |
1017 | } | ||
1016 | 1018 | ||
1017 | if (r8a66597->bus_suspended) | 1019 | usb_hcd_poll_rh_status(r8a66597_to_hcd(r8a66597)); |
1018 | usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597)); | ||
1019 | } | 1020 | } |
1020 | 1021 | ||
1021 | /* this function must be called with interrupt disabled */ | 1022 | /* this function must be called with interrupt disabled */ |
@@ -1024,6 +1025,8 @@ static void r8a66597_usb_connect(struct r8a66597 *r8a66597, int port) | |||
1024 | u16 speed = get_rh_usb_speed(r8a66597, port); | 1025 | u16 speed = get_rh_usb_speed(r8a66597, port); |
1025 | struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; | 1026 | struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; |
1026 | 1027 | ||
1028 | rh->port &= ~((1 << USB_PORT_FEAT_HIGHSPEED) | | ||
1029 | (1 << USB_PORT_FEAT_LOWSPEED)); | ||
1027 | if (speed == HSMODE) | 1030 | if (speed == HSMODE) |
1028 | rh->port |= (1 << USB_PORT_FEAT_HIGHSPEED); | 1031 | rh->port |= (1 << USB_PORT_FEAT_HIGHSPEED); |
1029 | else if (speed == LSMODE) | 1032 | else if (speed == LSMODE) |
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 1db4fea8c170..b8fd270a8b0d 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c | |||
@@ -802,9 +802,11 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci) | |||
802 | int i; | 802 | int i; |
803 | 803 | ||
804 | /* Free the Event Ring Segment Table and the actual Event Ring */ | 804 | /* Free the Event Ring Segment Table and the actual Event Ring */ |
805 | xhci_writel(xhci, 0, &xhci->ir_set->erst_size); | 805 | if (xhci->ir_set) { |
806 | xhci_write_64(xhci, 0, &xhci->ir_set->erst_base); | 806 | xhci_writel(xhci, 0, &xhci->ir_set->erst_size); |
807 | xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue); | 807 | xhci_write_64(xhci, 0, &xhci->ir_set->erst_base); |
808 | xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue); | ||
809 | } | ||
808 | size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); | 810 | size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); |
809 | if (xhci->erst.entries) | 811 | if (xhci->erst.entries) |
810 | pci_free_consistent(pdev, size, | 812 | pci_free_consistent(pdev, size, |
@@ -841,9 +843,9 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci) | |||
841 | xhci->dcbaa, xhci->dcbaa->dma); | 843 | xhci->dcbaa, xhci->dcbaa->dma); |
842 | xhci->dcbaa = NULL; | 844 | xhci->dcbaa = NULL; |
843 | 845 | ||
846 | scratchpad_free(xhci); | ||
844 | xhci->page_size = 0; | 847 | xhci->page_size = 0; |
845 | xhci->page_shift = 0; | 848 | xhci->page_shift = 0; |
846 | scratchpad_free(xhci); | ||
847 | } | 849 | } |
848 | 850 | ||
849 | int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) | 851 | int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) |
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index 173c39c76489..821b7b4709de 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -864,9 +864,11 @@ static struct xhci_segment *trb_in_td( | |||
864 | cur_seg = start_seg; | 864 | cur_seg = start_seg; |
865 | 865 | ||
866 | do { | 866 | do { |
867 | if (start_dma == 0) | ||
868 | return 0; | ||
867 | /* We may get an event for a Link TRB in the middle of a TD */ | 869 | /* We may get an event for a Link TRB in the middle of a TD */ |
868 | end_seg_dma = xhci_trb_virt_to_dma(cur_seg, | 870 | end_seg_dma = xhci_trb_virt_to_dma(cur_seg, |
869 | &start_seg->trbs[TRBS_PER_SEGMENT - 1]); | 871 | &cur_seg->trbs[TRBS_PER_SEGMENT - 1]); |
870 | /* If the end TRB isn't in this segment, this is set to 0 */ | 872 | /* If the end TRB isn't in this segment, this is set to 0 */ |
871 | end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb); | 873 | end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb); |
872 | 874 | ||
@@ -893,8 +895,9 @@ static struct xhci_segment *trb_in_td( | |||
893 | } | 895 | } |
894 | cur_seg = cur_seg->next; | 896 | cur_seg = cur_seg->next; |
895 | start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); | 897 | start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); |
896 | } while (1); | 898 | } while (cur_seg != start_seg); |
897 | 899 | ||
900 | return 0; | ||
898 | } | 901 | } |
899 | 902 | ||
900 | /* | 903 | /* |
diff --git a/drivers/usb/mon/mon_bin.c b/drivers/usb/mon/mon_bin.c index 9ed3e741bee1..10f3205798e8 100644 --- a/drivers/usb/mon/mon_bin.c +++ b/drivers/usb/mon/mon_bin.c | |||
@@ -348,12 +348,12 @@ static unsigned int mon_buff_area_alloc_contiguous(struct mon_reader_bin *rp, | |||
348 | 348 | ||
349 | /* | 349 | /* |
350 | * Return a few (kilo-)bytes to the head of the buffer. | 350 | * Return a few (kilo-)bytes to the head of the buffer. |
351 | * This is used if a DMA fetch fails. | 351 | * This is used if a data fetch fails. |
352 | */ | 352 | */ |
353 | static void mon_buff_area_shrink(struct mon_reader_bin *rp, unsigned int size) | 353 | static void mon_buff_area_shrink(struct mon_reader_bin *rp, unsigned int size) |
354 | { | 354 | { |
355 | 355 | ||
356 | size = (size + PKT_ALIGN-1) & ~(PKT_ALIGN-1); | 356 | /* size &= ~(PKT_ALIGN-1); -- we're called with aligned size */ |
357 | rp->b_cnt -= size; | 357 | rp->b_cnt -= size; |
358 | if (rp->b_in < size) | 358 | if (rp->b_in < size) |
359 | rp->b_in += rp->b_size; | 359 | rp->b_in += rp->b_size; |
@@ -433,6 +433,7 @@ static void mon_bin_event(struct mon_reader_bin *rp, struct urb *urb, | |||
433 | unsigned int urb_length; | 433 | unsigned int urb_length; |
434 | unsigned int offset; | 434 | unsigned int offset; |
435 | unsigned int length; | 435 | unsigned int length; |
436 | unsigned int delta; | ||
436 | unsigned int ndesc, lendesc; | 437 | unsigned int ndesc, lendesc; |
437 | unsigned char dir; | 438 | unsigned char dir; |
438 | struct mon_bin_hdr *ep; | 439 | struct mon_bin_hdr *ep; |
@@ -537,8 +538,10 @@ static void mon_bin_event(struct mon_reader_bin *rp, struct urb *urb, | |||
537 | if (length != 0) { | 538 | if (length != 0) { |
538 | ep->flag_data = mon_bin_get_data(rp, offset, urb, length); | 539 | ep->flag_data = mon_bin_get_data(rp, offset, urb, length); |
539 | if (ep->flag_data != 0) { /* Yes, it's 0x00, not '0' */ | 540 | if (ep->flag_data != 0) { /* Yes, it's 0x00, not '0' */ |
540 | ep->len_cap = 0; | 541 | delta = (ep->len_cap + PKT_ALIGN-1) & ~(PKT_ALIGN-1); |
541 | mon_buff_area_shrink(rp, length); | 542 | ep->len_cap -= length; |
543 | delta -= (ep->len_cap + PKT_ALIGN-1) & ~(PKT_ALIGN-1); | ||
544 | mon_buff_area_shrink(rp, delta); | ||
542 | } | 545 | } |
543 | } else { | 546 | } else { |
544 | ep->flag_data = data_tag; | 547 | ep->flag_data = data_tag; |
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c index 698252a4dc5d..bd254ec97d14 100644 --- a/drivers/usb/serial/cp210x.c +++ b/drivers/usb/serial/cp210x.c | |||
@@ -50,6 +50,8 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port, struct file *, | |||
50 | static void cp210x_break_ctl(struct tty_struct *, int); | 50 | static void cp210x_break_ctl(struct tty_struct *, int); |
51 | static int cp210x_startup(struct usb_serial *); | 51 | static int cp210x_startup(struct usb_serial *); |
52 | static void cp210x_disconnect(struct usb_serial *); | 52 | static void cp210x_disconnect(struct usb_serial *); |
53 | static void cp210x_dtr_rts(struct usb_serial_port *p, int on); | ||
54 | static int cp210x_carrier_raised(struct usb_serial_port *p); | ||
53 | 55 | ||
54 | static int debug; | 56 | static int debug; |
55 | 57 | ||
@@ -143,6 +145,8 @@ static struct usb_serial_driver cp210x_device = { | |||
143 | .tiocmset = cp210x_tiocmset, | 145 | .tiocmset = cp210x_tiocmset, |
144 | .attach = cp210x_startup, | 146 | .attach = cp210x_startup, |
145 | .disconnect = cp210x_disconnect, | 147 | .disconnect = cp210x_disconnect, |
148 | .dtr_rts = cp210x_dtr_rts, | ||
149 | .carrier_raised = cp210x_carrier_raised | ||
146 | }; | 150 | }; |
147 | 151 | ||
148 | /* Config request types */ | 152 | /* Config request types */ |
@@ -746,6 +750,14 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port, struct file *file, | |||
746 | return cp210x_set_config(port, CP210X_SET_MHS, &control, 2); | 750 | return cp210x_set_config(port, CP210X_SET_MHS, &control, 2); |
747 | } | 751 | } |
748 | 752 | ||
753 | static void cp210x_dtr_rts(struct usb_serial_port *p, int on) | ||
754 | { | ||
755 | if (on) | ||
756 | cp210x_tiocmset_port(p, NULL, TIOCM_DTR|TIOCM_RTS, 0); | ||
757 | else | ||
758 | cp210x_tiocmset_port(p, NULL, 0, TIOCM_DTR|TIOCM_RTS); | ||
759 | } | ||
760 | |||
749 | static int cp210x_tiocmget (struct tty_struct *tty, struct file *file) | 761 | static int cp210x_tiocmget (struct tty_struct *tty, struct file *file) |
750 | { | 762 | { |
751 | struct usb_serial_port *port = tty->driver_data; | 763 | struct usb_serial_port *port = tty->driver_data; |
@@ -768,6 +780,15 @@ static int cp210x_tiocmget (struct tty_struct *tty, struct file *file) | |||
768 | return result; | 780 | return result; |
769 | } | 781 | } |
770 | 782 | ||
783 | static int cp210x_carrier_raised(struct usb_serial_port *p) | ||
784 | { | ||
785 | unsigned int control; | ||
786 | cp210x_get_config(p, CP210X_GET_MDMSTS, &control, 1); | ||
787 | if (control & CONTROL_DCD) | ||
788 | return 1; | ||
789 | return 0; | ||
790 | } | ||
791 | |||
771 | static void cp210x_break_ctl (struct tty_struct *tty, int break_state) | 792 | static void cp210x_break_ctl (struct tty_struct *tty, int break_state) |
772 | { | 793 | { |
773 | struct usb_serial_port *port = tty->driver_data; | 794 | struct usb_serial_port *port = tty->driver_data; |
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index 65d96b214f95..319aaf9725b3 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c | |||
@@ -308,6 +308,7 @@ static int option_resume(struct usb_serial *serial); | |||
308 | 308 | ||
309 | #define DLINK_VENDOR_ID 0x1186 | 309 | #define DLINK_VENDOR_ID 0x1186 |
310 | #define DLINK_PRODUCT_DWM_652 0x3e04 | 310 | #define DLINK_PRODUCT_DWM_652 0x3e04 |
311 | #define DLINK_PRODUCT_DWM_652_U5 0xce16 | ||
311 | 312 | ||
312 | #define QISDA_VENDOR_ID 0x1da5 | 313 | #define QISDA_VENDOR_ID 0x1da5 |
313 | #define QISDA_PRODUCT_H21_4512 0x4512 | 314 | #define QISDA_PRODUCT_H21_4512 0x4512 |
@@ -315,6 +316,9 @@ static int option_resume(struct usb_serial *serial); | |||
315 | #define QISDA_PRODUCT_H20_4515 0x4515 | 316 | #define QISDA_PRODUCT_H20_4515 0x4515 |
316 | #define QISDA_PRODUCT_H20_4519 0x4519 | 317 | #define QISDA_PRODUCT_H20_4519 0x4519 |
317 | 318 | ||
319 | /* TLAYTECH PRODUCTS */ | ||
320 | #define TLAYTECH_VENDOR_ID 0x20B9 | ||
321 | #define TLAYTECH_PRODUCT_TEU800 0x1682 | ||
318 | 322 | ||
319 | /* TOSHIBA PRODUCTS */ | 323 | /* TOSHIBA PRODUCTS */ |
320 | #define TOSHIBA_VENDOR_ID 0x0930 | 324 | #define TOSHIBA_VENDOR_ID 0x0930 |
@@ -583,6 +587,7 @@ static struct usb_device_id option_ids[] = { | |||
583 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) }, | 587 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) }, |
584 | { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) }, | 588 | { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) }, |
585 | { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) }, | 589 | { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) }, |
590 | { USB_DEVICE(ALINK_VENDOR_ID, DLINK_PRODUCT_DWM_652_U5) }, /* Yes, ALINK_VENDOR_ID */ | ||
586 | { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) }, | 591 | { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) }, |
587 | { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) }, | 592 | { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) }, |
588 | { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) }, | 593 | { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) }, |
@@ -593,6 +598,7 @@ static struct usb_device_id option_ids[] = { | |||
593 | { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) }, | 598 | { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) }, |
594 | { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) }, | 599 | { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) }, |
595 | { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, | 600 | { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, |
601 | { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, | ||
596 | { } /* Terminating entry */ | 602 | { } /* Terminating entry */ |
597 | }; | 603 | }; |
598 | MODULE_DEVICE_TABLE(usb, option_ids); | 604 | MODULE_DEVICE_TABLE(usb, option_ids); |
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c index 45883988a005..5019325ba25d 100644 --- a/drivers/usb/serial/sierra.c +++ b/drivers/usb/serial/sierra.c | |||
@@ -296,7 +296,6 @@ struct sierra_port_private { | |||
296 | int dsr_state; | 296 | int dsr_state; |
297 | int dcd_state; | 297 | int dcd_state; |
298 | int ri_state; | 298 | int ri_state; |
299 | |||
300 | unsigned int opened:1; | 299 | unsigned int opened:1; |
301 | }; | 300 | }; |
302 | 301 | ||
@@ -306,6 +305,8 @@ static int sierra_send_setup(struct usb_serial_port *port) | |||
306 | struct sierra_port_private *portdata; | 305 | struct sierra_port_private *portdata; |
307 | __u16 interface = 0; | 306 | __u16 interface = 0; |
308 | int val = 0; | 307 | int val = 0; |
308 | int do_send = 0; | ||
309 | int retval; | ||
309 | 310 | ||
310 | dev_dbg(&port->dev, "%s\n", __func__); | 311 | dev_dbg(&port->dev, "%s\n", __func__); |
311 | 312 | ||
@@ -324,10 +325,7 @@ static int sierra_send_setup(struct usb_serial_port *port) | |||
324 | */ | 325 | */ |
325 | if (port->interrupt_in_urb) { | 326 | if (port->interrupt_in_urb) { |
326 | /* send control message */ | 327 | /* send control message */ |
327 | return usb_control_msg(serial->dev, | 328 | do_send = 1; |
328 | usb_rcvctrlpipe(serial->dev, 0), | ||
329 | 0x22, 0x21, val, interface, | ||
330 | NULL, 0, USB_CTRL_SET_TIMEOUT); | ||
331 | } | 329 | } |
332 | } | 330 | } |
333 | 331 | ||
@@ -339,12 +337,18 @@ static int sierra_send_setup(struct usb_serial_port *port) | |||
339 | interface = 1; | 337 | interface = 1; |
340 | else if (port->bulk_out_endpointAddress == 5) | 338 | else if (port->bulk_out_endpointAddress == 5) |
341 | interface = 2; | 339 | interface = 2; |
342 | return usb_control_msg(serial->dev, | 340 | |
343 | usb_rcvctrlpipe(serial->dev, 0), | 341 | do_send = 1; |
344 | 0x22, 0x21, val, interface, | ||
345 | NULL, 0, USB_CTRL_SET_TIMEOUT); | ||
346 | } | 342 | } |
347 | return 0; | 343 | if (!do_send) |
344 | return 0; | ||
345 | |||
346 | usb_autopm_get_interface(serial->interface); | ||
347 | retval = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0), | ||
348 | 0x22, 0x21, val, interface, NULL, 0, USB_CTRL_SET_TIMEOUT); | ||
349 | usb_autopm_put_interface(serial->interface); | ||
350 | |||
351 | return retval; | ||
348 | } | 352 | } |
349 | 353 | ||
350 | static void sierra_set_termios(struct tty_struct *tty, | 354 | static void sierra_set_termios(struct tty_struct *tty, |
@@ -773,8 +777,11 @@ static void sierra_close(struct usb_serial_port *port) | |||
773 | 777 | ||
774 | if (serial->dev) { | 778 | if (serial->dev) { |
775 | mutex_lock(&serial->disc_mutex); | 779 | mutex_lock(&serial->disc_mutex); |
776 | if (!serial->disconnected) | 780 | if (!serial->disconnected) { |
781 | serial->interface->needs_remote_wakeup = 0; | ||
782 | usb_autopm_get_interface(serial->interface); | ||
777 | sierra_send_setup(port); | 783 | sierra_send_setup(port); |
784 | } | ||
778 | mutex_unlock(&serial->disc_mutex); | 785 | mutex_unlock(&serial->disc_mutex); |
779 | spin_lock_irq(&intfdata->susp_lock); | 786 | spin_lock_irq(&intfdata->susp_lock); |
780 | portdata->opened = 0; | 787 | portdata->opened = 0; |
@@ -788,8 +795,6 @@ static void sierra_close(struct usb_serial_port *port) | |||
788 | sierra_release_urb(portdata->in_urbs[i]); | 795 | sierra_release_urb(portdata->in_urbs[i]); |
789 | portdata->in_urbs[i] = NULL; | 796 | portdata->in_urbs[i] = NULL; |
790 | } | 797 | } |
791 | usb_autopm_get_interface(serial->interface); | ||
792 | serial->interface->needs_remote_wakeup = 0; | ||
793 | } | 798 | } |
794 | } | 799 | } |
795 | 800 | ||
@@ -827,6 +832,8 @@ static int sierra_open(struct tty_struct *tty, struct usb_serial_port *port) | |||
827 | if (err) { | 832 | if (err) { |
828 | /* get rid of everything as in close */ | 833 | /* get rid of everything as in close */ |
829 | sierra_close(port); | 834 | sierra_close(port); |
835 | /* restore balance for autopm */ | ||
836 | usb_autopm_put_interface(serial->interface); | ||
830 | return err; | 837 | return err; |
831 | } | 838 | } |
832 | sierra_send_setup(port); | 839 | sierra_send_setup(port); |
@@ -915,7 +922,7 @@ static void sierra_release(struct usb_serial *serial) | |||
915 | #ifdef CONFIG_PM | 922 | #ifdef CONFIG_PM |
916 | static void stop_read_write_urbs(struct usb_serial *serial) | 923 | static void stop_read_write_urbs(struct usb_serial *serial) |
917 | { | 924 | { |
918 | int i, j; | 925 | int i; |
919 | struct usb_serial_port *port; | 926 | struct usb_serial_port *port; |
920 | struct sierra_port_private *portdata; | 927 | struct sierra_port_private *portdata; |
921 | 928 | ||
@@ -923,8 +930,7 @@ static void stop_read_write_urbs(struct usb_serial *serial) | |||
923 | for (i = 0; i < serial->num_ports; ++i) { | 930 | for (i = 0; i < serial->num_ports; ++i) { |
924 | port = serial->port[i]; | 931 | port = serial->port[i]; |
925 | portdata = usb_get_serial_port_data(port); | 932 | portdata = usb_get_serial_port_data(port); |
926 | for (j = 0; j < N_IN_URB; j++) | 933 | sierra_stop_rx_urbs(port); |
927 | usb_kill_urb(portdata->in_urbs[j]); | ||
928 | usb_kill_anchored_urbs(&portdata->active); | 934 | usb_kill_anchored_urbs(&portdata->active); |
929 | } | 935 | } |
930 | } | 936 | } |
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index 9bbb2855ea91..188e1ba3b69f 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -2121,7 +2121,7 @@ config FB_EP93XX | |||
2121 | 2121 | ||
2122 | config FB_PRE_INIT_FB | 2122 | config FB_PRE_INIT_FB |
2123 | bool "Don't reinitialize, use bootloader's GDC/Display configuration" | 2123 | bool "Don't reinitialize, use bootloader's GDC/Display configuration" |
2124 | depends on FB_MB862XX_LIME | 2124 | depends on FB && FB_MB862XX_LIME |
2125 | ---help--- | 2125 | ---help--- |
2126 | Select this option if display contents should be inherited as set by | 2126 | Select this option if display contents should be inherited as set by |
2127 | the bootloader. | 2127 | the bootloader. |
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c index 8cd279be74e5..37624f74e88b 100644 --- a/drivers/video/atafb.c +++ b/drivers/video/atafb.c | |||
@@ -329,12 +329,6 @@ extern unsigned char fontdata_8x16[]; | |||
329 | * | 329 | * |
330 | * * perform fb specific mmap * | 330 | * * perform fb specific mmap * |
331 | * int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma); | 331 | * int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma); |
332 | * | ||
333 | * * save current hardware state * | ||
334 | * void (*fb_save_state)(struct fb_info *info); | ||
335 | * | ||
336 | * * restore saved state * | ||
337 | * void (*fb_restore_state)(struct fb_info *info); | ||
338 | * } ; | 332 | * } ; |
339 | */ | 333 | */ |
340 | 334 | ||
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 2830ffd72976..d5e801076d33 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c | |||
@@ -484,6 +484,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info) | |||
484 | unsigned long value; | 484 | unsigned long value; |
485 | unsigned long clk_value_khz; | 485 | unsigned long clk_value_khz; |
486 | unsigned long bits_per_line; | 486 | unsigned long bits_per_line; |
487 | unsigned long pix_factor = 2; | ||
487 | 488 | ||
488 | might_sleep(); | 489 | might_sleep(); |
489 | 490 | ||
@@ -516,20 +517,24 @@ static int atmel_lcdfb_set_par(struct fb_info *info) | |||
516 | /* Now, the LCDC core... */ | 517 | /* Now, the LCDC core... */ |
517 | 518 | ||
518 | /* Set pixel clock */ | 519 | /* Set pixel clock */ |
520 | if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es()) | ||
521 | pix_factor = 1; | ||
522 | |||
519 | clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; | 523 | clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; |
520 | 524 | ||
521 | value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); | 525 | value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); |
522 | 526 | ||
523 | if (value < 2) { | 527 | if (value < pix_factor) { |
524 | dev_notice(info->device, "Bypassing pixel clock divider\n"); | 528 | dev_notice(info->device, "Bypassing pixel clock divider\n"); |
525 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); | 529 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); |
526 | } else { | 530 | } else { |
527 | value = (value / 2) - 1; | 531 | value = (value / pix_factor) - 1; |
528 | dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", | 532 | dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", |
529 | value); | 533 | value); |
530 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, | 534 | lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, |
531 | value << ATMEL_LCDC_CLKVAL_OFFSET); | 535 | value << ATMEL_LCDC_CLKVAL_OFFSET); |
532 | info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1))); | 536 | info->var.pixclock = |
537 | KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1))); | ||
533 | dev_dbg(info->device, " updated pixclk: %lu KHz\n", | 538 | dev_dbg(info->device, " updated pixclk: %lu KHz\n", |
534 | PICOS2KHZ(info->var.pixclock)); | 539 | PICOS2KHZ(info->var.pixclock)); |
535 | } | 540 | } |
diff --git a/drivers/video/backlight/corgi_lcd.c b/drivers/video/backlight/corgi_lcd.c index 2211a852af9c..96774949cd30 100644 --- a/drivers/video/backlight/corgi_lcd.c +++ b/drivers/video/backlight/corgi_lcd.c | |||
@@ -433,8 +433,9 @@ static int corgi_bl_update_status(struct backlight_device *bd) | |||
433 | 433 | ||
434 | if (corgibl_flags & CORGIBL_SUSPENDED) | 434 | if (corgibl_flags & CORGIBL_SUSPENDED) |
435 | intensity = 0; | 435 | intensity = 0; |
436 | if (corgibl_flags & CORGIBL_BATTLOW) | 436 | |
437 | intensity &= lcd->limit_mask; | 437 | if ((corgibl_flags & CORGIBL_BATTLOW) && intensity > lcd->limit_mask) |
438 | intensity = lcd->limit_mask; | ||
438 | 439 | ||
439 | return corgi_bl_set_intensity(lcd, intensity); | 440 | return corgi_bl_set_intensity(lcd, intensity); |
440 | } | 441 | } |
diff --git a/drivers/video/backlight/lcd.c b/drivers/video/backlight/lcd.c index b6449470106c..a482dd7b0311 100644 --- a/drivers/video/backlight/lcd.c +++ b/drivers/video/backlight/lcd.c | |||
@@ -56,7 +56,7 @@ static int fb_notifier_callback(struct notifier_block *self, | |||
56 | 56 | ||
57 | static int lcd_register_fb(struct lcd_device *ld) | 57 | static int lcd_register_fb(struct lcd_device *ld) |
58 | { | 58 | { |
59 | memset(&ld->fb_notif, 0, sizeof(&ld->fb_notif)); | 59 | memset(&ld->fb_notif, 0, sizeof(ld->fb_notif)); |
60 | ld->fb_notif.notifier_call = fb_notifier_callback; | 60 | ld->fb_notif.notifier_call = fb_notifier_callback; |
61 | return fb_register_client(&ld->fb_notif); | 61 | return fb_register_client(&ld->fb_notif); |
62 | } | 62 | } |
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c index 5a686cea23f4..3681c6a88212 100644 --- a/drivers/video/console/fbcon.c +++ b/drivers/video/console/fbcon.c | |||
@@ -2311,14 +2311,11 @@ static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch) | |||
2311 | ops->graphics = 1; | 2311 | ops->graphics = 1; |
2312 | 2312 | ||
2313 | if (!blank) { | 2313 | if (!blank) { |
2314 | if (info->fbops->fb_save_state) | ||
2315 | info->fbops->fb_save_state(info); | ||
2316 | var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE; | 2314 | var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE; |
2317 | fb_set_var(info, &var); | 2315 | fb_set_var(info, &var); |
2318 | ops->graphics = 0; | 2316 | ops->graphics = 0; |
2319 | ops->var = info->var; | 2317 | ops->var = info->var; |
2320 | } else if (info->fbops->fb_restore_state) | 2318 | } |
2321 | info->fbops->fb_restore_state(info); | ||
2322 | } | 2319 | } |
2323 | 2320 | ||
2324 | if (!fbcon_is_inactive(vc, info)) { | 2321 | if (!fbcon_is_inactive(vc, info)) { |
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c index d065894ce38f..035d56835b75 100644 --- a/drivers/video/da8xx-fb.c +++ b/drivers/video/da8xx-fb.c | |||
@@ -704,7 +704,7 @@ static int __init fb_probe(struct platform_device *device) | |||
704 | 704 | ||
705 | if (i == ARRAY_SIZE(known_lcd_panels)) { | 705 | if (i == ARRAY_SIZE(known_lcd_panels)) { |
706 | dev_err(&device->dev, "GLCD: No valid panel found\n"); | 706 | dev_err(&device->dev, "GLCD: No valid panel found\n"); |
707 | ret = ENODEV; | 707 | ret = -ENODEV; |
708 | goto err_clk_disable; | 708 | goto err_clk_disable; |
709 | } else | 709 | } else |
710 | dev_info(&device->dev, "GLCD: Found %s panel\n", | 710 | dev_info(&device->dev, "GLCD: Found %s panel\n", |
diff --git a/drivers/video/msm/mddi.c b/drivers/video/msm/mddi.c index 5c5a1ad1d397..474421fe79a6 100644 --- a/drivers/video/msm/mddi.c +++ b/drivers/video/msm/mddi.c | |||
@@ -24,6 +24,7 @@ | |||
24 | #include <linux/spinlock.h> | 24 | #include <linux/spinlock.h> |
25 | #include <linux/clk.h> | 25 | #include <linux/clk.h> |
26 | #include <linux/io.h> | 26 | #include <linux/io.h> |
27 | #include <linux/sched.h> | ||
27 | #include <mach/msm_iomap.h> | 28 | #include <mach/msm_iomap.h> |
28 | #include <mach/irqs.h> | 29 | #include <mach/irqs.h> |
29 | #include <mach/board.h> | 30 | #include <mach/board.h> |
diff --git a/drivers/video/msm/mddi_client_nt35399.c b/drivers/video/msm/mddi_client_nt35399.c index 9c78050ac799..c9e9349451cb 100644 --- a/drivers/video/msm/mddi_client_nt35399.c +++ b/drivers/video/msm/mddi_client_nt35399.c | |||
@@ -19,6 +19,7 @@ | |||
19 | #include <linux/kernel.h> | 19 | #include <linux/kernel.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/sched.h> | ||
22 | #include <linux/gpio.h> | 23 | #include <linux/gpio.h> |
23 | #include <mach/msm_fb.h> | 24 | #include <mach/msm_fb.h> |
24 | 25 | ||
diff --git a/drivers/video/msm/mddi_client_toshiba.c b/drivers/video/msm/mddi_client_toshiba.c index 80d0f5fdf0b1..71048e78f7f0 100644 --- a/drivers/video/msm/mddi_client_toshiba.c +++ b/drivers/video/msm/mddi_client_toshiba.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/interrupt.h> | 21 | #include <linux/interrupt.h> |
22 | #include <linux/gpio.h> | 22 | #include <linux/gpio.h> |
23 | #include <linux/sched.h> | ||
23 | #include <mach/msm_fb.h> | 24 | #include <mach/msm_fb.h> |
24 | 25 | ||
25 | 26 | ||
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c index 99636a2b20f2..6c519e2fa2b7 100644 --- a/drivers/video/msm/mdp.c +++ b/drivers/video/msm/mdp.c | |||
@@ -22,9 +22,6 @@ | |||
22 | #include <linux/wait.h> | 22 | #include <linux/wait.h> |
23 | #include <linux/clk.h> | 23 | #include <linux/clk.h> |
24 | #include <linux/file.h> | 24 | #include <linux/file.h> |
25 | #ifdef CONFIG_ANDROID_PMEM | ||
26 | #include <linux/android_pmem.h> | ||
27 | #endif | ||
28 | #include <linux/major.h> | 25 | #include <linux/major.h> |
29 | 26 | ||
30 | #include <mach/msm_iomap.h> | 27 | #include <mach/msm_iomap.h> |
@@ -262,11 +259,6 @@ int get_img(struct mdp_img *img, struct fb_info *info, | |||
262 | struct file *file; | 259 | struct file *file; |
263 | unsigned long vstart; | 260 | unsigned long vstart; |
264 | 261 | ||
265 | #ifdef CONFIG_ANDROID_PMEM | ||
266 | if (!get_pmem_file(img->memory_id, start, &vstart, len, filep)) | ||
267 | return 0; | ||
268 | #endif | ||
269 | |||
270 | file = fget_light(img->memory_id, &put_needed); | 262 | file = fget_light(img->memory_id, &put_needed); |
271 | if (file == NULL) | 263 | if (file == NULL) |
272 | return -1; | 264 | return -1; |
@@ -283,12 +275,6 @@ int get_img(struct mdp_img *img, struct fb_info *info, | |||
283 | 275 | ||
284 | void put_img(struct file *src_file, struct file *dst_file) | 276 | void put_img(struct file *src_file, struct file *dst_file) |
285 | { | 277 | { |
286 | #ifdef CONFIG_ANDROID_PMEM | ||
287 | if (src_file) | ||
288 | put_pmem_file(src_file); | ||
289 | if (dst_file) | ||
290 | put_pmem_file(dst_file); | ||
291 | #endif | ||
292 | } | 278 | } |
293 | 279 | ||
294 | int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb, | 280 | int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb, |
@@ -320,9 +306,6 @@ int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb, | |||
320 | if (unlikely(get_img(&req->dst, fb, &dst_start, &dst_len, &dst_file))) { | 306 | if (unlikely(get_img(&req->dst, fb, &dst_start, &dst_len, &dst_file))) { |
321 | printk(KERN_ERR "mpd_ppp: could not retrieve dst image from " | 307 | printk(KERN_ERR "mpd_ppp: could not retrieve dst image from " |
322 | "memory\n"); | 308 | "memory\n"); |
323 | #ifdef CONFIG_ANDROID_PMEM | ||
324 | put_pmem_file(src_file); | ||
325 | #endif | ||
326 | return -EINVAL; | 309 | return -EINVAL; |
327 | } | 310 | } |
328 | mutex_lock(&mdp_mutex); | 311 | mutex_lock(&mdp_mutex); |
@@ -499,7 +482,6 @@ int mdp_probe(struct platform_device *pdev) | |||
499 | /* register mdp device */ | 482 | /* register mdp device */ |
500 | mdp->mdp_dev.dev.parent = &pdev->dev; | 483 | mdp->mdp_dev.dev.parent = &pdev->dev; |
501 | mdp->mdp_dev.dev.class = mdp_class; | 484 | mdp->mdp_dev.dev.class = mdp_class; |
502 | snprintf(mdp->mdp_dev.dev.bus_id, BUS_ID_SIZE, "mdp%d", pdev->id); | ||
503 | 485 | ||
504 | /* if you can remove the platform device you'd have to implement | 486 | /* if you can remove the platform device you'd have to implement |
505 | * this: | 487 | * this: |
diff --git a/drivers/video/msm/mdp_ppp.c b/drivers/video/msm/mdp_ppp.c index ba2c4673b648..4ff001f4cbbd 100644 --- a/drivers/video/msm/mdp_ppp.c +++ b/drivers/video/msm/mdp_ppp.c | |||
@@ -16,7 +16,6 @@ | |||
16 | #include <linux/file.h> | 16 | #include <linux/file.h> |
17 | #include <linux/delay.h> | 17 | #include <linux/delay.h> |
18 | #include <linux/msm_mdp.h> | 18 | #include <linux/msm_mdp.h> |
19 | #include <linux/android_pmem.h> | ||
20 | #include <mach/msm_fb.h> | 19 | #include <mach/msm_fb.h> |
21 | 20 | ||
22 | #include "mdp_hw.h" | 21 | #include "mdp_hw.h" |
@@ -579,25 +578,6 @@ static int valid_src_dst(unsigned long src_start, unsigned long src_len, | |||
579 | static void flush_imgs(struct mdp_blit_req *req, struct mdp_regs *regs, | 578 | static void flush_imgs(struct mdp_blit_req *req, struct mdp_regs *regs, |
580 | struct file *src_file, struct file *dst_file) | 579 | struct file *src_file, struct file *dst_file) |
581 | { | 580 | { |
582 | #ifdef CONFIG_ANDROID_PMEM | ||
583 | uint32_t src0_len, src1_len, dst0_len, dst1_len; | ||
584 | |||
585 | /* flush src images to memory before dma to mdp */ | ||
586 | get_len(&req->src, &req->src_rect, regs->src_bpp, &src0_len, | ||
587 | &src1_len); | ||
588 | flush_pmem_file(src_file, req->src.offset, src0_len); | ||
589 | if (IS_PSEUDOPLNR(req->src.format)) | ||
590 | flush_pmem_file(src_file, req->src.offset + src0_len, | ||
591 | src1_len); | ||
592 | |||
593 | /* flush dst images */ | ||
594 | get_len(&req->dst, &req->dst_rect, regs->dst_bpp, &dst0_len, | ||
595 | &dst1_len); | ||
596 | flush_pmem_file(dst_file, req->dst.offset, dst0_len); | ||
597 | if (IS_PSEUDOPLNR(req->dst.format)) | ||
598 | flush_pmem_file(dst_file, req->dst.offset + dst0_len, | ||
599 | dst1_len); | ||
600 | #endif | ||
601 | } | 581 | } |
602 | 582 | ||
603 | static void get_chroma_addr(struct mdp_img *img, struct mdp_rect *rect, | 583 | static void get_chroma_addr(struct mdp_img *img, struct mdp_rect *rect, |
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c index 37b135d5d12e..842d157e1025 100644 --- a/drivers/video/savage/savagefb_driver.c +++ b/drivers/video/savage/savagefb_driver.c | |||
@@ -1565,7 +1565,7 @@ static int savagefb_blank(int blank, struct fb_info *info) | |||
1565 | vga_out8(0x3c5, sr8, par); | 1565 | vga_out8(0x3c5, sr8, par); |
1566 | vga_out8(0x3c4, 0x0d, par); | 1566 | vga_out8(0x3c4, 0x0d, par); |
1567 | srd = vga_in8(0x3c5, par); | 1567 | srd = vga_in8(0x3c5, par); |
1568 | srd &= 0x03; | 1568 | srd &= 0x50; |
1569 | 1569 | ||
1570 | switch (blank) { | 1570 | switch (blank) { |
1571 | case FB_BLANK_UNBLANK: | 1571 | case FB_BLANK_UNBLANK: |
@@ -1606,22 +1606,6 @@ static int savagefb_blank(int blank, struct fb_info *info) | |||
1606 | return (blank == FB_BLANK_NORMAL) ? 1 : 0; | 1606 | return (blank == FB_BLANK_NORMAL) ? 1 : 0; |
1607 | } | 1607 | } |
1608 | 1608 | ||
1609 | static void savagefb_save_state(struct fb_info *info) | ||
1610 | { | ||
1611 | struct savagefb_par *par = info->par; | ||
1612 | |||
1613 | savage_get_default_par(par, &par->save); | ||
1614 | } | ||
1615 | |||
1616 | static void savagefb_restore_state(struct fb_info *info) | ||
1617 | { | ||
1618 | struct savagefb_par *par = info->par; | ||
1619 | |||
1620 | savagefb_blank(FB_BLANK_POWERDOWN, info); | ||
1621 | savage_set_default_par(par, &par->save); | ||
1622 | savagefb_blank(FB_BLANK_UNBLANK, info); | ||
1623 | } | ||
1624 | |||
1625 | static int savagefb_open(struct fb_info *info, int user) | 1609 | static int savagefb_open(struct fb_info *info, int user) |
1626 | { | 1610 | { |
1627 | struct savagefb_par *par = info->par; | 1611 | struct savagefb_par *par = info->par; |
@@ -1667,8 +1651,6 @@ static struct fb_ops savagefb_ops = { | |||
1667 | .fb_setcolreg = savagefb_setcolreg, | 1651 | .fb_setcolreg = savagefb_setcolreg, |
1668 | .fb_pan_display = savagefb_pan_display, | 1652 | .fb_pan_display = savagefb_pan_display, |
1669 | .fb_blank = savagefb_blank, | 1653 | .fb_blank = savagefb_blank, |
1670 | .fb_save_state = savagefb_save_state, | ||
1671 | .fb_restore_state = savagefb_restore_state, | ||
1672 | #if defined(CONFIG_FB_SAVAGE_ACCEL) | 1654 | #if defined(CONFIG_FB_SAVAGE_ACCEL) |
1673 | .fb_fillrect = savagefb_fillrect, | 1655 | .fb_fillrect = savagefb_fillrect, |
1674 | .fb_copyarea = savagefb_copyarea, | 1656 | .fb_copyarea = savagefb_copyarea, |
diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c index e35232a18571..54fbb2995a5f 100644 --- a/drivers/video/uvesafb.c +++ b/drivers/video/uvesafb.c | |||
@@ -1411,23 +1411,6 @@ static int uvesafb_check_var(struct fb_var_screeninfo *var, | |||
1411 | return 0; | 1411 | return 0; |
1412 | } | 1412 | } |
1413 | 1413 | ||
1414 | static void uvesafb_save_state(struct fb_info *info) | ||
1415 | { | ||
1416 | struct uvesafb_par *par = info->par; | ||
1417 | |||
1418 | if (par->vbe_state_saved) | ||
1419 | kfree(par->vbe_state_saved); | ||
1420 | |||
1421 | par->vbe_state_saved = uvesafb_vbe_state_save(par); | ||
1422 | } | ||
1423 | |||
1424 | static void uvesafb_restore_state(struct fb_info *info) | ||
1425 | { | ||
1426 | struct uvesafb_par *par = info->par; | ||
1427 | |||
1428 | uvesafb_vbe_state_restore(par, par->vbe_state_saved); | ||
1429 | } | ||
1430 | |||
1431 | static struct fb_ops uvesafb_ops = { | 1414 | static struct fb_ops uvesafb_ops = { |
1432 | .owner = THIS_MODULE, | 1415 | .owner = THIS_MODULE, |
1433 | .fb_open = uvesafb_open, | 1416 | .fb_open = uvesafb_open, |
@@ -1441,8 +1424,6 @@ static struct fb_ops uvesafb_ops = { | |||
1441 | .fb_imageblit = cfb_imageblit, | 1424 | .fb_imageblit = cfb_imageblit, |
1442 | .fb_check_var = uvesafb_check_var, | 1425 | .fb_check_var = uvesafb_check_var, |
1443 | .fb_set_par = uvesafb_set_par, | 1426 | .fb_set_par = uvesafb_set_par, |
1444 | .fb_save_state = uvesafb_save_state, | ||
1445 | .fb_restore_state = uvesafb_restore_state, | ||
1446 | }; | 1427 | }; |
1447 | 1428 | ||
1448 | static void __devinit uvesafb_init_info(struct fb_info *info, | 1429 | static void __devinit uvesafb_init_info(struct fb_info *info, |
@@ -1459,15 +1440,6 @@ static void __devinit uvesafb_init_info(struct fb_info *info, | |||
1459 | info->fix.ypanstep = par->ypan ? 1 : 0; | 1440 | info->fix.ypanstep = par->ypan ? 1 : 0; |
1460 | info->fix.ywrapstep = (par->ypan > 1) ? 1 : 0; | 1441 | info->fix.ywrapstep = (par->ypan > 1) ? 1 : 0; |
1461 | 1442 | ||
1462 | /* | ||
1463 | * If we were unable to get the state buffer size, disable | ||
1464 | * functions for saving and restoring the hardware state. | ||
1465 | */ | ||
1466 | if (par->vbe_state_size == 0) { | ||
1467 | info->fbops->fb_save_state = NULL; | ||
1468 | info->fbops->fb_restore_state = NULL; | ||
1469 | } | ||
1470 | |||
1471 | /* Disable blanking if the user requested so. */ | 1443 | /* Disable blanking if the user requested so. */ |
1472 | if (!blank) | 1444 | if (!blank) |
1473 | info->fbops->fb_blank = NULL; | 1445 | info->fbops->fb_blank = NULL; |
diff --git a/drivers/virtio/virtio_pci.c b/drivers/virtio/virtio_pci.c index 4a1f1ebff7bf..28d9cf7cf72f 100644 --- a/drivers/virtio/virtio_pci.c +++ b/drivers/virtio/virtio_pci.c | |||
@@ -530,19 +530,22 @@ static int vp_try_to_find_vqs(struct virtio_device *vdev, unsigned nvqs, | |||
530 | err = PTR_ERR(vqs[i]); | 530 | err = PTR_ERR(vqs[i]); |
531 | goto error_find; | 531 | goto error_find; |
532 | } | 532 | } |
533 | |||
534 | if (!vp_dev->per_vq_vectors || msix_vec == VIRTIO_MSI_NO_VECTOR) | ||
535 | continue; | ||
536 | |||
533 | /* allocate per-vq irq if available and necessary */ | 537 | /* allocate per-vq irq if available and necessary */ |
534 | if (vp_dev->per_vq_vectors) { | 538 | snprintf(vp_dev->msix_names[msix_vec], |
535 | snprintf(vp_dev->msix_names[msix_vec], | 539 | sizeof *vp_dev->msix_names, |
536 | sizeof *vp_dev->msix_names, | 540 | "%s-%s", |
537 | "%s-%s", | 541 | dev_name(&vp_dev->vdev.dev), names[i]); |
538 | dev_name(&vp_dev->vdev.dev), names[i]); | 542 | err = request_irq(vp_dev->msix_entries[msix_vec].vector, |
539 | err = request_irq(msix_vec, vring_interrupt, 0, | 543 | vring_interrupt, 0, |
540 | vp_dev->msix_names[msix_vec], | 544 | vp_dev->msix_names[msix_vec], |
541 | vqs[i]); | 545 | vqs[i]); |
542 | if (err) { | 546 | if (err) { |
543 | vp_del_vq(vqs[i]); | 547 | vp_del_vq(vqs[i]); |
544 | goto error_find; | 548 | goto error_find; |
545 | } | ||
546 | } | 549 | } |
547 | } | 550 | } |
548 | return 0; | 551 | return 0; |
diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c index f53600580726..fbd2ecde93e4 100644 --- a/drivers/virtio/virtio_ring.c +++ b/drivers/virtio/virtio_ring.c | |||
@@ -285,6 +285,9 @@ static void *vring_get_buf(struct virtqueue *_vq, unsigned int *len) | |||
285 | return NULL; | 285 | return NULL; |
286 | } | 286 | } |
287 | 287 | ||
288 | /* Only get used array entries after they have been exposed by host. */ | ||
289 | rmb(); | ||
290 | |||
288 | i = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].id; | 291 | i = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].id; |
289 | *len = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].len; | 292 | *len = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].len; |
290 | 293 | ||
diff --git a/drivers/watchdog/sbc_fitpc2_wdt.c b/drivers/watchdog/sbc_fitpc2_wdt.c index 852ca1977917..91430a89107c 100644 --- a/drivers/watchdog/sbc_fitpc2_wdt.c +++ b/drivers/watchdog/sbc_fitpc2_wdt.c | |||
@@ -227,7 +227,7 @@ static int __init fitpc2_wdt_init(void) | |||
227 | } | 227 | } |
228 | 228 | ||
229 | err = misc_register(&fitpc2_wdt_miscdev); | 229 | err = misc_register(&fitpc2_wdt_miscdev); |
230 | if (!err) { | 230 | if (err) { |
231 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", | 231 | pr_err("cannot register miscdev on minor=%d (err=%d)\n", |
232 | WATCHDOG_MINOR, err); | 232 | WATCHDOG_MINOR, err); |
233 | goto err_margin; | 233 | goto err_margin; |