diff options
Diffstat (limited to 'drivers')
188 files changed, 1945 insertions, 1228 deletions
diff --git a/drivers/acpi/acpica/evxfgpe.c b/drivers/acpi/acpica/evxfgpe.c index e9562a7cb2f9..3b20a3401b64 100644 --- a/drivers/acpi/acpica/evxfgpe.c +++ b/drivers/acpi/acpica/evxfgpe.c | |||
@@ -212,37 +212,40 @@ acpi_setup_gpe_for_wake(acpi_handle wake_device, | |||
212 | return_ACPI_STATUS(AE_BAD_PARAMETER); | 212 | return_ACPI_STATUS(AE_BAD_PARAMETER); |
213 | } | 213 | } |
214 | 214 | ||
215 | /* Validate wake_device is of type Device */ | ||
216 | |||
217 | device_node = ACPI_CAST_PTR(struct acpi_namespace_node, wake_device); | ||
218 | if (device_node->type != ACPI_TYPE_DEVICE) { | ||
219 | return_ACPI_STATUS(AE_BAD_PARAMETER); | ||
220 | } | ||
221 | |||
222 | flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock); | 215 | flags = acpi_os_acquire_lock(acpi_gbl_gpe_lock); |
223 | 216 | ||
224 | /* Ensure that we have a valid GPE number */ | 217 | /* Ensure that we have a valid GPE number */ |
225 | 218 | ||
226 | gpe_event_info = acpi_ev_get_gpe_event_info(gpe_device, gpe_number); | 219 | gpe_event_info = acpi_ev_get_gpe_event_info(gpe_device, gpe_number); |
227 | if (gpe_event_info) { | 220 | if (!gpe_event_info) { |
228 | /* | 221 | goto unlock_and_exit; |
229 | * If there is no method or handler for this GPE, then the | 222 | } |
230 | * wake_device will be notified whenever this GPE fires (aka | 223 | |
231 | * "implicit notify") Note: The GPE is assumed to be | 224 | /* |
232 | * level-triggered (for windows compatibility). | 225 | * If there is no method or handler for this GPE, then the |
233 | */ | 226 | * wake_device will be notified whenever this GPE fires (aka |
234 | if ((gpe_event_info->flags & ACPI_GPE_DISPATCH_MASK) == | 227 | * "implicit notify") Note: The GPE is assumed to be |
235 | ACPI_GPE_DISPATCH_NONE) { | 228 | * level-triggered (for windows compatibility). |
236 | gpe_event_info->flags = | 229 | */ |
237 | (ACPI_GPE_DISPATCH_NOTIFY | | 230 | if (((gpe_event_info->flags & ACPI_GPE_DISPATCH_MASK) == |
238 | ACPI_GPE_LEVEL_TRIGGERED); | 231 | ACPI_GPE_DISPATCH_NONE) && (wake_device != ACPI_ROOT_OBJECT)) { |
239 | gpe_event_info->dispatch.device_node = device_node; | ||
240 | } | ||
241 | 232 | ||
242 | gpe_event_info->flags |= ACPI_GPE_CAN_WAKE; | 233 | /* Validate wake_device is of type Device */ |
243 | status = AE_OK; | 234 | |
235 | device_node = ACPI_CAST_PTR(struct acpi_namespace_node, | ||
236 | wake_device); | ||
237 | if (device_node->type != ACPI_TYPE_DEVICE) { | ||
238 | goto unlock_and_exit; | ||
239 | } | ||
240 | gpe_event_info->flags = (ACPI_GPE_DISPATCH_NOTIFY | | ||
241 | ACPI_GPE_LEVEL_TRIGGERED); | ||
242 | gpe_event_info->dispatch.device_node = device_node; | ||
244 | } | 243 | } |
245 | 244 | ||
245 | gpe_event_info->flags |= ACPI_GPE_CAN_WAKE; | ||
246 | status = AE_OK; | ||
247 | |||
248 | unlock_and_exit: | ||
246 | acpi_os_release_lock(acpi_gbl_gpe_lock, flags); | 249 | acpi_os_release_lock(acpi_gbl_gpe_lock, flags); |
247 | return_ACPI_STATUS(status); | 250 | return_ACPI_STATUS(status); |
248 | } | 251 | } |
diff --git a/drivers/acpi/osl.c b/drivers/acpi/osl.c index b0931818cf98..c90c76aa7f8b 100644 --- a/drivers/acpi/osl.c +++ b/drivers/acpi/osl.c | |||
@@ -636,17 +636,21 @@ EXPORT_SYMBOL(acpi_os_write_port); | |||
636 | acpi_status | 636 | acpi_status |
637 | acpi_os_read_memory(acpi_physical_address phys_addr, u32 * value, u32 width) | 637 | acpi_os_read_memory(acpi_physical_address phys_addr, u32 * value, u32 width) |
638 | { | 638 | { |
639 | u32 dummy; | ||
640 | void __iomem *virt_addr; | 639 | void __iomem *virt_addr; |
641 | int size = width / 8, unmap = 0; | 640 | unsigned int size = width / 8; |
641 | bool unmap = false; | ||
642 | u32 dummy; | ||
642 | 643 | ||
643 | rcu_read_lock(); | 644 | rcu_read_lock(); |
644 | virt_addr = acpi_map_vaddr_lookup(phys_addr, size); | 645 | virt_addr = acpi_map_vaddr_lookup(phys_addr, size); |
645 | rcu_read_unlock(); | ||
646 | if (!virt_addr) { | 646 | if (!virt_addr) { |
647 | rcu_read_unlock(); | ||
647 | virt_addr = acpi_os_ioremap(phys_addr, size); | 648 | virt_addr = acpi_os_ioremap(phys_addr, size); |
648 | unmap = 1; | 649 | if (!virt_addr) |
650 | return AE_BAD_ADDRESS; | ||
651 | unmap = true; | ||
649 | } | 652 | } |
653 | |||
650 | if (!value) | 654 | if (!value) |
651 | value = &dummy; | 655 | value = &dummy; |
652 | 656 | ||
@@ -666,6 +670,8 @@ acpi_os_read_memory(acpi_physical_address phys_addr, u32 * value, u32 width) | |||
666 | 670 | ||
667 | if (unmap) | 671 | if (unmap) |
668 | iounmap(virt_addr); | 672 | iounmap(virt_addr); |
673 | else | ||
674 | rcu_read_unlock(); | ||
669 | 675 | ||
670 | return AE_OK; | 676 | return AE_OK; |
671 | } | 677 | } |
@@ -674,14 +680,17 @@ acpi_status | |||
674 | acpi_os_write_memory(acpi_physical_address phys_addr, u32 value, u32 width) | 680 | acpi_os_write_memory(acpi_physical_address phys_addr, u32 value, u32 width) |
675 | { | 681 | { |
676 | void __iomem *virt_addr; | 682 | void __iomem *virt_addr; |
677 | int size = width / 8, unmap = 0; | 683 | unsigned int size = width / 8; |
684 | bool unmap = false; | ||
678 | 685 | ||
679 | rcu_read_lock(); | 686 | rcu_read_lock(); |
680 | virt_addr = acpi_map_vaddr_lookup(phys_addr, size); | 687 | virt_addr = acpi_map_vaddr_lookup(phys_addr, size); |
681 | rcu_read_unlock(); | ||
682 | if (!virt_addr) { | 688 | if (!virt_addr) { |
689 | rcu_read_unlock(); | ||
683 | virt_addr = acpi_os_ioremap(phys_addr, size); | 690 | virt_addr = acpi_os_ioremap(phys_addr, size); |
684 | unmap = 1; | 691 | if (!virt_addr) |
692 | return AE_BAD_ADDRESS; | ||
693 | unmap = true; | ||
685 | } | 694 | } |
686 | 695 | ||
687 | switch (width) { | 696 | switch (width) { |
@@ -700,6 +709,8 @@ acpi_os_write_memory(acpi_physical_address phys_addr, u32 value, u32 width) | |||
700 | 709 | ||
701 | if (unmap) | 710 | if (unmap) |
702 | iounmap(virt_addr); | 711 | iounmap(virt_addr); |
712 | else | ||
713 | rcu_read_unlock(); | ||
703 | 714 | ||
704 | return AE_OK; | 715 | return AE_OK; |
705 | } | 716 | } |
diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c index 42d3d72dae85..5af3479714f6 100644 --- a/drivers/acpi/video_detect.c +++ b/drivers/acpi/video_detect.c | |||
@@ -82,6 +82,11 @@ long acpi_is_video_device(struct acpi_device *device) | |||
82 | if (!device) | 82 | if (!device) |
83 | return 0; | 83 | return 0; |
84 | 84 | ||
85 | /* Is this device able to support video switching ? */ | ||
86 | if (ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOD", &h_dummy)) || | ||
87 | ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOS", &h_dummy))) | ||
88 | video_caps |= ACPI_VIDEO_OUTPUT_SWITCHING; | ||
89 | |||
85 | /* Is this device able to retrieve a video ROM ? */ | 90 | /* Is this device able to retrieve a video ROM ? */ |
86 | if (ACPI_SUCCESS(acpi_get_handle(device->handle, "_ROM", &h_dummy))) | 91 | if (ACPI_SUCCESS(acpi_get_handle(device->handle, "_ROM", &h_dummy))) |
87 | video_caps |= ACPI_VIDEO_ROM_AVAILABLE; | 92 | video_caps |= ACPI_VIDEO_ROM_AVAILABLE; |
diff --git a/drivers/acpi/wakeup.c b/drivers/acpi/wakeup.c index ed6501452507..7bfbe40bc43b 100644 --- a/drivers/acpi/wakeup.c +++ b/drivers/acpi/wakeup.c | |||
@@ -86,8 +86,12 @@ int __init acpi_wakeup_device_init(void) | |||
86 | struct acpi_device *dev = container_of(node, | 86 | struct acpi_device *dev = container_of(node, |
87 | struct acpi_device, | 87 | struct acpi_device, |
88 | wakeup_list); | 88 | wakeup_list); |
89 | if (device_can_wakeup(&dev->dev)) | 89 | if (device_can_wakeup(&dev->dev)) { |
90 | /* Button GPEs are supposed to be always enabled. */ | ||
91 | acpi_enable_gpe(dev->wakeup.gpe_device, | ||
92 | dev->wakeup.gpe_number); | ||
90 | device_set_wakeup_enable(&dev->dev, true); | 93 | device_set_wakeup_enable(&dev->dev, true); |
94 | } | ||
91 | } | 95 | } |
92 | mutex_unlock(&acpi_device_lock); | 96 | mutex_unlock(&acpi_device_lock); |
93 | return 0; | 97 | return 0; |
diff --git a/drivers/block/Makefile b/drivers/block/Makefile index d7f463d6312d..40528ba56d1b 100644 --- a/drivers/block/Makefile +++ b/drivers/block/Makefile | |||
@@ -39,4 +39,4 @@ obj-$(CONFIG_XEN_BLKDEV_FRONTEND) += xen-blkfront.o | |||
39 | obj-$(CONFIG_BLK_DEV_DRBD) += drbd/ | 39 | obj-$(CONFIG_BLK_DEV_DRBD) += drbd/ |
40 | obj-$(CONFIG_BLK_DEV_RBD) += rbd.o | 40 | obj-$(CONFIG_BLK_DEV_RBD) += rbd.o |
41 | 41 | ||
42 | swim_mod-objs := swim.o swim_asm.o | 42 | swim_mod-y := swim.o swim_asm.o |
diff --git a/drivers/block/aoe/Makefile b/drivers/block/aoe/Makefile index e76d997183c6..06ea82cdf27d 100644 --- a/drivers/block/aoe/Makefile +++ b/drivers/block/aoe/Makefile | |||
@@ -3,4 +3,4 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-$(CONFIG_ATA_OVER_ETH) += aoe.o | 5 | obj-$(CONFIG_ATA_OVER_ETH) += aoe.o |
6 | aoe-objs := aoeblk.o aoechr.o aoecmd.o aoedev.o aoemain.o aoenet.o | 6 | aoe-y := aoeblk.o aoechr.o aoecmd.o aoedev.o aoemain.o aoenet.o |
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index 516d5bbec2b6..9279272b3732 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c | |||
@@ -2833,7 +2833,7 @@ static int cciss_revalidate(struct gendisk *disk) | |||
2833 | sector_t total_size; | 2833 | sector_t total_size; |
2834 | InquiryData_struct *inq_buff = NULL; | 2834 | InquiryData_struct *inq_buff = NULL; |
2835 | 2835 | ||
2836 | for (logvol = 0; logvol < CISS_MAX_LUN; logvol++) { | 2836 | for (logvol = 0; logvol <= h->highest_lun; logvol++) { |
2837 | if (!h->drv[logvol]) | 2837 | if (!h->drv[logvol]) |
2838 | continue; | 2838 | continue; |
2839 | if (memcmp(h->drv[logvol]->LunID, drv->LunID, | 2839 | if (memcmp(h->drv[logvol]->LunID, drv->LunID, |
diff --git a/drivers/block/loop.c b/drivers/block/loop.c index 44e18c073c44..49e6a545eb63 100644 --- a/drivers/block/loop.c +++ b/drivers/block/loop.c | |||
@@ -1641,6 +1641,9 @@ out: | |||
1641 | 1641 | ||
1642 | static void loop_free(struct loop_device *lo) | 1642 | static void loop_free(struct loop_device *lo) |
1643 | { | 1643 | { |
1644 | if (!lo->lo_queue->queue_lock) | ||
1645 | lo->lo_queue->queue_lock = &lo->lo_queue->__queue_lock; | ||
1646 | |||
1644 | blk_cleanup_queue(lo->lo_queue); | 1647 | blk_cleanup_queue(lo->lo_queue); |
1645 | put_disk(lo->lo_disk); | 1648 | put_disk(lo->lo_disk); |
1646 | list_del(&lo->lo_list); | 1649 | list_del(&lo->lo_list); |
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c index a32fb41246f8..e6fc716aca45 100644 --- a/drivers/block/nbd.c +++ b/drivers/block/nbd.c | |||
@@ -53,7 +53,6 @@ | |||
53 | #define DBG_BLKDEV 0x0100 | 53 | #define DBG_BLKDEV 0x0100 |
54 | #define DBG_RX 0x0200 | 54 | #define DBG_RX 0x0200 |
55 | #define DBG_TX 0x0400 | 55 | #define DBG_TX 0x0400 |
56 | static DEFINE_MUTEX(nbd_mutex); | ||
57 | static unsigned int debugflags; | 56 | static unsigned int debugflags; |
58 | #endif /* NDEBUG */ | 57 | #endif /* NDEBUG */ |
59 | 58 | ||
@@ -718,11 +717,9 @@ static int nbd_ioctl(struct block_device *bdev, fmode_t mode, | |||
718 | dprintk(DBG_IOCTL, "%s: nbd_ioctl cmd=%s(0x%x) arg=%lu\n", | 717 | dprintk(DBG_IOCTL, "%s: nbd_ioctl cmd=%s(0x%x) arg=%lu\n", |
719 | lo->disk->disk_name, ioctl_cmd_to_ascii(cmd), cmd, arg); | 718 | lo->disk->disk_name, ioctl_cmd_to_ascii(cmd), cmd, arg); |
720 | 719 | ||
721 | mutex_lock(&nbd_mutex); | ||
722 | mutex_lock(&lo->tx_lock); | 720 | mutex_lock(&lo->tx_lock); |
723 | error = __nbd_ioctl(bdev, lo, cmd, arg); | 721 | error = __nbd_ioctl(bdev, lo, cmd, arg); |
724 | mutex_unlock(&lo->tx_lock); | 722 | mutex_unlock(&lo->tx_lock); |
725 | mutex_unlock(&nbd_mutex); | ||
726 | 723 | ||
727 | return error; | 724 | return error; |
728 | } | 725 | } |
diff --git a/drivers/cdrom/cdrom.c b/drivers/cdrom/cdrom.c index 14033a36bcd0..e2c48a7eccff 100644 --- a/drivers/cdrom/cdrom.c +++ b/drivers/cdrom/cdrom.c | |||
@@ -409,7 +409,8 @@ int register_cdrom(struct cdrom_device_info *cdi) | |||
409 | } | 409 | } |
410 | 410 | ||
411 | ENSURE(drive_status, CDC_DRIVE_STATUS ); | 411 | ENSURE(drive_status, CDC_DRIVE_STATUS ); |
412 | ENSURE(media_changed, CDC_MEDIA_CHANGED); | 412 | if (cdo->check_events == NULL && cdo->media_changed == NULL) |
413 | *change_capability = ~(CDC_MEDIA_CHANGED | CDC_SELECT_DISC); | ||
413 | ENSURE(tray_move, CDC_CLOSE_TRAY | CDC_OPEN_TRAY); | 414 | ENSURE(tray_move, CDC_CLOSE_TRAY | CDC_OPEN_TRAY); |
414 | ENSURE(lock_door, CDC_LOCK); | 415 | ENSURE(lock_door, CDC_LOCK); |
415 | ENSURE(select_speed, CDC_SELECT_SPEED); | 416 | ENSURE(select_speed, CDC_SELECT_SPEED); |
diff --git a/drivers/char/Makefile b/drivers/char/Makefile index 5bc765d4c3ca..8238f89f73c9 100644 --- a/drivers/char/Makefile +++ b/drivers/char/Makefile | |||
@@ -30,6 +30,7 @@ obj-$(CONFIG_SYNCLINK_GT) += synclink_gt.o | |||
30 | obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o | 30 | obj-$(CONFIG_AMIGA_BUILTIN_SERIAL) += amiserial.o |
31 | obj-$(CONFIG_SX) += sx.o generic_serial.o | 31 | obj-$(CONFIG_SX) += sx.o generic_serial.o |
32 | obj-$(CONFIG_RIO) += rio/ generic_serial.o | 32 | obj-$(CONFIG_RIO) += rio/ generic_serial.o |
33 | obj-$(CONFIG_VIRTIO_CONSOLE) += virtio_console.o | ||
33 | obj-$(CONFIG_RAW_DRIVER) += raw.o | 34 | obj-$(CONFIG_RAW_DRIVER) += raw.o |
34 | obj-$(CONFIG_SGI_SNSC) += snsc.o snsc_event.o | 35 | obj-$(CONFIG_SGI_SNSC) += snsc.o snsc_event.o |
35 | obj-$(CONFIG_MSPEC) += mspec.o | 36 | obj-$(CONFIG_MSPEC) += mspec.o |
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c index b6ae6e9a9c5f..7855f9f45b8e 100644 --- a/drivers/char/ipmi/ipmi_si_intf.c +++ b/drivers/char/ipmi/ipmi_si_intf.c | |||
@@ -320,6 +320,7 @@ static int unload_when_empty = 1; | |||
320 | static int add_smi(struct smi_info *smi); | 320 | static int add_smi(struct smi_info *smi); |
321 | static int try_smi_init(struct smi_info *smi); | 321 | static int try_smi_init(struct smi_info *smi); |
322 | static void cleanup_one_si(struct smi_info *to_clean); | 322 | static void cleanup_one_si(struct smi_info *to_clean); |
323 | static void cleanup_ipmi_si(void); | ||
323 | 324 | ||
324 | static ATOMIC_NOTIFIER_HEAD(xaction_notifier_list); | 325 | static ATOMIC_NOTIFIER_HEAD(xaction_notifier_list); |
325 | static int register_xaction_notifier(struct notifier_block *nb) | 326 | static int register_xaction_notifier(struct notifier_block *nb) |
@@ -3450,16 +3451,7 @@ static int __devinit init_ipmi_si(void) | |||
3450 | mutex_lock(&smi_infos_lock); | 3451 | mutex_lock(&smi_infos_lock); |
3451 | if (unload_when_empty && list_empty(&smi_infos)) { | 3452 | if (unload_when_empty && list_empty(&smi_infos)) { |
3452 | mutex_unlock(&smi_infos_lock); | 3453 | mutex_unlock(&smi_infos_lock); |
3453 | #ifdef CONFIG_PCI | 3454 | cleanup_ipmi_si(); |
3454 | if (pci_registered) | ||
3455 | pci_unregister_driver(&ipmi_pci_driver); | ||
3456 | #endif | ||
3457 | |||
3458 | #ifdef CONFIG_PPC_OF | ||
3459 | if (of_registered) | ||
3460 | of_unregister_platform_driver(&ipmi_of_platform_driver); | ||
3461 | #endif | ||
3462 | driver_unregister(&ipmi_driver.driver); | ||
3463 | printk(KERN_WARNING PFX | 3455 | printk(KERN_WARNING PFX |
3464 | "Unable to find any System Interface(s)\n"); | 3456 | "Unable to find any System Interface(s)\n"); |
3465 | return -ENODEV; | 3457 | return -ENODEV; |
diff --git a/drivers/char/tpm/tpm.c b/drivers/char/tpm/tpm.c index 36e0fa161c2b..faf5a2c65926 100644 --- a/drivers/char/tpm/tpm.c +++ b/drivers/char/tpm/tpm.c | |||
@@ -577,9 +577,11 @@ duration: | |||
577 | if (rc) | 577 | if (rc) |
578 | return; | 578 | return; |
579 | 579 | ||
580 | if (be32_to_cpu(tpm_cmd.header.out.return_code) | 580 | if (be32_to_cpu(tpm_cmd.header.out.return_code) != 0 || |
581 | != 3 * sizeof(u32)) | 581 | be32_to_cpu(tpm_cmd.header.out.length) |
582 | != sizeof(tpm_cmd.header.out) + sizeof(u32) + 3 * sizeof(u32)) | ||
582 | return; | 583 | return; |
584 | |||
583 | duration_cap = &tpm_cmd.params.getcap_out.cap.duration; | 585 | duration_cap = &tpm_cmd.params.getcap_out.cap.duration; |
584 | chip->vendor.duration[TPM_SHORT] = | 586 | chip->vendor.duration[TPM_SHORT] = |
585 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short)); | 587 | usecs_to_jiffies(be32_to_cpu(duration_cap->tpm_short)); |
@@ -939,6 +941,18 @@ ssize_t tpm_show_caps_1_2(struct device * dev, | |||
939 | } | 941 | } |
940 | EXPORT_SYMBOL_GPL(tpm_show_caps_1_2); | 942 | EXPORT_SYMBOL_GPL(tpm_show_caps_1_2); |
941 | 943 | ||
944 | ssize_t tpm_show_timeouts(struct device *dev, struct device_attribute *attr, | ||
945 | char *buf) | ||
946 | { | ||
947 | struct tpm_chip *chip = dev_get_drvdata(dev); | ||
948 | |||
949 | return sprintf(buf, "%d %d %d\n", | ||
950 | jiffies_to_usecs(chip->vendor.duration[TPM_SHORT]), | ||
951 | jiffies_to_usecs(chip->vendor.duration[TPM_MEDIUM]), | ||
952 | jiffies_to_usecs(chip->vendor.duration[TPM_LONG])); | ||
953 | } | ||
954 | EXPORT_SYMBOL_GPL(tpm_show_timeouts); | ||
955 | |||
942 | ssize_t tpm_store_cancel(struct device *dev, struct device_attribute *attr, | 956 | ssize_t tpm_store_cancel(struct device *dev, struct device_attribute *attr, |
943 | const char *buf, size_t count) | 957 | const char *buf, size_t count) |
944 | { | 958 | { |
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h index 72ddb031b69a..d84ff772c26f 100644 --- a/drivers/char/tpm/tpm.h +++ b/drivers/char/tpm/tpm.h | |||
@@ -56,6 +56,8 @@ extern ssize_t tpm_show_owned(struct device *, struct device_attribute *attr, | |||
56 | char *); | 56 | char *); |
57 | extern ssize_t tpm_show_temp_deactivated(struct device *, | 57 | extern ssize_t tpm_show_temp_deactivated(struct device *, |
58 | struct device_attribute *attr, char *); | 58 | struct device_attribute *attr, char *); |
59 | extern ssize_t tpm_show_timeouts(struct device *, | ||
60 | struct device_attribute *attr, char *); | ||
59 | 61 | ||
60 | struct tpm_chip; | 62 | struct tpm_chip; |
61 | 63 | ||
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c index dd21df55689d..0d1d38e5f266 100644 --- a/drivers/char/tpm/tpm_tis.c +++ b/drivers/char/tpm/tpm_tis.c | |||
@@ -376,6 +376,7 @@ static DEVICE_ATTR(temp_deactivated, S_IRUGO, tpm_show_temp_deactivated, | |||
376 | NULL); | 376 | NULL); |
377 | static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); | 377 | static DEVICE_ATTR(caps, S_IRUGO, tpm_show_caps_1_2, NULL); |
378 | static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); | 378 | static DEVICE_ATTR(cancel, S_IWUSR | S_IWGRP, NULL, tpm_store_cancel); |
379 | static DEVICE_ATTR(timeouts, S_IRUGO, tpm_show_timeouts, NULL); | ||
379 | 380 | ||
380 | static struct attribute *tis_attrs[] = { | 381 | static struct attribute *tis_attrs[] = { |
381 | &dev_attr_pubek.attr, | 382 | &dev_attr_pubek.attr, |
@@ -385,7 +386,8 @@ static struct attribute *tis_attrs[] = { | |||
385 | &dev_attr_owned.attr, | 386 | &dev_attr_owned.attr, |
386 | &dev_attr_temp_deactivated.attr, | 387 | &dev_attr_temp_deactivated.attr, |
387 | &dev_attr_caps.attr, | 388 | &dev_attr_caps.attr, |
388 | &dev_attr_cancel.attr, NULL, | 389 | &dev_attr_cancel.attr, |
390 | &dev_attr_timeouts.attr, NULL, | ||
389 | }; | 391 | }; |
390 | 392 | ||
391 | static struct attribute_group tis_attr_grp = { | 393 | static struct attribute_group tis_attr_grp = { |
diff --git a/drivers/tty/hvc/virtio_console.c b/drivers/char/virtio_console.c index 896a2ced1d27..490393186338 100644 --- a/drivers/tty/hvc/virtio_console.c +++ b/drivers/char/virtio_console.c | |||
@@ -1,6 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2006, 2007, 2009 Rusty Russell, IBM Corporation | 2 | * Copyright (C) 2006, 2007, 2009 Rusty Russell, IBM Corporation |
3 | * Copyright (C) 2009, 2010 Red Hat, Inc. | 3 | * Copyright (C) 2009, 2010, 2011 Red Hat, Inc. |
4 | * Copyright (C) 2009, 2010, 2011 Amit Shah <amit.shah@redhat.com> | ||
4 | * | 5 | * |
5 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
6 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -31,7 +32,7 @@ | |||
31 | #include <linux/virtio_console.h> | 32 | #include <linux/virtio_console.h> |
32 | #include <linux/wait.h> | 33 | #include <linux/wait.h> |
33 | #include <linux/workqueue.h> | 34 | #include <linux/workqueue.h> |
34 | #include "hvc_console.h" | 35 | #include "../tty/hvc/hvc_console.h" |
35 | 36 | ||
36 | /* | 37 | /* |
37 | * This is a global struct for storing common data for all the devices | 38 | * This is a global struct for storing common data for all the devices |
@@ -1462,6 +1463,17 @@ static void control_work_handler(struct work_struct *work) | |||
1462 | spin_unlock(&portdev->cvq_lock); | 1463 | spin_unlock(&portdev->cvq_lock); |
1463 | } | 1464 | } |
1464 | 1465 | ||
1466 | static void out_intr(struct virtqueue *vq) | ||
1467 | { | ||
1468 | struct port *port; | ||
1469 | |||
1470 | port = find_port_by_vq(vq->vdev->priv, vq); | ||
1471 | if (!port) | ||
1472 | return; | ||
1473 | |||
1474 | wake_up_interruptible(&port->waitqueue); | ||
1475 | } | ||
1476 | |||
1465 | static void in_intr(struct virtqueue *vq) | 1477 | static void in_intr(struct virtqueue *vq) |
1466 | { | 1478 | { |
1467 | struct port *port; | 1479 | struct port *port; |
@@ -1566,7 +1578,7 @@ static int init_vqs(struct ports_device *portdev) | |||
1566 | */ | 1578 | */ |
1567 | j = 0; | 1579 | j = 0; |
1568 | io_callbacks[j] = in_intr; | 1580 | io_callbacks[j] = in_intr; |
1569 | io_callbacks[j + 1] = NULL; | 1581 | io_callbacks[j + 1] = out_intr; |
1570 | io_names[j] = "input"; | 1582 | io_names[j] = "input"; |
1571 | io_names[j + 1] = "output"; | 1583 | io_names[j + 1] = "output"; |
1572 | j += 2; | 1584 | j += 2; |
@@ -1580,7 +1592,7 @@ static int init_vqs(struct ports_device *portdev) | |||
1580 | for (i = 1; i < nr_ports; i++) { | 1592 | for (i = 1; i < nr_ports; i++) { |
1581 | j += 2; | 1593 | j += 2; |
1582 | io_callbacks[j] = in_intr; | 1594 | io_callbacks[j] = in_intr; |
1583 | io_callbacks[j + 1] = NULL; | 1595 | io_callbacks[j + 1] = out_intr; |
1584 | io_names[j] = "input"; | 1596 | io_names[j] = "input"; |
1585 | io_names[j + 1] = "output"; | 1597 | io_names[j + 1] = "output"; |
1586 | } | 1598 | } |
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c index 297f48b0cba9..07bca4970e50 100644 --- a/drivers/dma/amba-pl08x.c +++ b/drivers/dma/amba-pl08x.c | |||
@@ -79,6 +79,7 @@ | |||
79 | #include <linux/module.h> | 79 | #include <linux/module.h> |
80 | #include <linux/interrupt.h> | 80 | #include <linux/interrupt.h> |
81 | #include <linux/slab.h> | 81 | #include <linux/slab.h> |
82 | #include <linux/delay.h> | ||
82 | #include <linux/dmapool.h> | 83 | #include <linux/dmapool.h> |
83 | #include <linux/dmaengine.h> | 84 | #include <linux/dmaengine.h> |
84 | #include <linux/amba/bus.h> | 85 | #include <linux/amba/bus.h> |
@@ -235,16 +236,19 @@ static void pl08x_start_txd(struct pl08x_dma_chan *plchan, | |||
235 | } | 236 | } |
236 | 237 | ||
237 | /* | 238 | /* |
238 | * Overall DMAC remains enabled always. | 239 | * Pause the channel by setting the HALT bit. |
239 | * | 240 | * |
240 | * Disabling individual channels could lose data. | 241 | * For M->P transfers, pause the DMAC first and then stop the peripheral - |
242 | * the FIFO can only drain if the peripheral is still requesting data. | ||
243 | * (note: this can still timeout if the DMAC FIFO never drains of data.) | ||
241 | * | 244 | * |
242 | * Disable the peripheral DMA after disabling the DMAC in order to allow | 245 | * For P->M transfers, disable the peripheral first to stop it filling |
243 | * the DMAC FIFO to drain, and hence allow the channel to show inactive | 246 | * the DMAC FIFO, and then pause the DMAC. |
244 | */ | 247 | */ |
245 | static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) | 248 | static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) |
246 | { | 249 | { |
247 | u32 val; | 250 | u32 val; |
251 | int timeout; | ||
248 | 252 | ||
249 | /* Set the HALT bit and wait for the FIFO to drain */ | 253 | /* Set the HALT bit and wait for the FIFO to drain */ |
250 | val = readl(ch->base + PL080_CH_CONFIG); | 254 | val = readl(ch->base + PL080_CH_CONFIG); |
@@ -252,8 +256,13 @@ static void pl08x_pause_phy_chan(struct pl08x_phy_chan *ch) | |||
252 | writel(val, ch->base + PL080_CH_CONFIG); | 256 | writel(val, ch->base + PL080_CH_CONFIG); |
253 | 257 | ||
254 | /* Wait for channel inactive */ | 258 | /* Wait for channel inactive */ |
255 | while (pl08x_phy_channel_busy(ch)) | 259 | for (timeout = 1000; timeout; timeout--) { |
256 | cpu_relax(); | 260 | if (!pl08x_phy_channel_busy(ch)) |
261 | break; | ||
262 | udelay(1); | ||
263 | } | ||
264 | if (pl08x_phy_channel_busy(ch)) | ||
265 | pr_err("pl08x: channel%u timeout waiting for pause\n", ch->id); | ||
257 | } | 266 | } |
258 | 267 | ||
259 | static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch) | 268 | static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch) |
@@ -267,19 +276,24 @@ static void pl08x_resume_phy_chan(struct pl08x_phy_chan *ch) | |||
267 | } | 276 | } |
268 | 277 | ||
269 | 278 | ||
270 | /* Stops the channel */ | 279 | /* |
271 | static void pl08x_stop_phy_chan(struct pl08x_phy_chan *ch) | 280 | * pl08x_terminate_phy_chan() stops the channel, clears the FIFO and |
281 | * clears any pending interrupt status. This should not be used for | ||
282 | * an on-going transfer, but as a method of shutting down a channel | ||
283 | * (eg, when it's no longer used) or terminating a transfer. | ||
284 | */ | ||
285 | static void pl08x_terminate_phy_chan(struct pl08x_driver_data *pl08x, | ||
286 | struct pl08x_phy_chan *ch) | ||
272 | { | 287 | { |
273 | u32 val; | 288 | u32 val = readl(ch->base + PL080_CH_CONFIG); |
274 | 289 | ||
275 | pl08x_pause_phy_chan(ch); | 290 | val &= ~(PL080_CONFIG_ENABLE | PL080_CONFIG_ERR_IRQ_MASK | |
291 | PL080_CONFIG_TC_IRQ_MASK); | ||
276 | 292 | ||
277 | /* Disable channel */ | ||
278 | val = readl(ch->base + PL080_CH_CONFIG); | ||
279 | val &= ~PL080_CONFIG_ENABLE; | ||
280 | val &= ~PL080_CONFIG_ERR_IRQ_MASK; | ||
281 | val &= ~PL080_CONFIG_TC_IRQ_MASK; | ||
282 | writel(val, ch->base + PL080_CH_CONFIG); | 293 | writel(val, ch->base + PL080_CH_CONFIG); |
294 | |||
295 | writel(1 << ch->id, pl08x->base + PL080_ERR_CLEAR); | ||
296 | writel(1 << ch->id, pl08x->base + PL080_TC_CLEAR); | ||
283 | } | 297 | } |
284 | 298 | ||
285 | static inline u32 get_bytes_in_cctl(u32 cctl) | 299 | static inline u32 get_bytes_in_cctl(u32 cctl) |
@@ -404,13 +418,12 @@ static inline void pl08x_put_phy_channel(struct pl08x_driver_data *pl08x, | |||
404 | { | 418 | { |
405 | unsigned long flags; | 419 | unsigned long flags; |
406 | 420 | ||
421 | spin_lock_irqsave(&ch->lock, flags); | ||
422 | |||
407 | /* Stop the channel and clear its interrupts */ | 423 | /* Stop the channel and clear its interrupts */ |
408 | pl08x_stop_phy_chan(ch); | 424 | pl08x_terminate_phy_chan(pl08x, ch); |
409 | writel((1 << ch->id), pl08x->base + PL080_ERR_CLEAR); | ||
410 | writel((1 << ch->id), pl08x->base + PL080_TC_CLEAR); | ||
411 | 425 | ||
412 | /* Mark it as free */ | 426 | /* Mark it as free */ |
413 | spin_lock_irqsave(&ch->lock, flags); | ||
414 | ch->serving = NULL; | 427 | ch->serving = NULL; |
415 | spin_unlock_irqrestore(&ch->lock, flags); | 428 | spin_unlock_irqrestore(&ch->lock, flags); |
416 | } | 429 | } |
@@ -1449,7 +1462,7 @@ static int pl08x_control(struct dma_chan *chan, enum dma_ctrl_cmd cmd, | |||
1449 | plchan->state = PL08X_CHAN_IDLE; | 1462 | plchan->state = PL08X_CHAN_IDLE; |
1450 | 1463 | ||
1451 | if (plchan->phychan) { | 1464 | if (plchan->phychan) { |
1452 | pl08x_stop_phy_chan(plchan->phychan); | 1465 | pl08x_terminate_phy_chan(pl08x, plchan->phychan); |
1453 | 1466 | ||
1454 | /* | 1467 | /* |
1455 | * Mark physical channel as free and free any slave | 1468 | * Mark physical channel as free and free any slave |
diff --git a/drivers/dma/imx-dma.c b/drivers/dma/imx-dma.c index e53d438142bb..e18eaabe92b9 100644 --- a/drivers/dma/imx-dma.c +++ b/drivers/dma/imx-dma.c | |||
@@ -49,6 +49,7 @@ struct imxdma_channel { | |||
49 | 49 | ||
50 | struct imxdma_engine { | 50 | struct imxdma_engine { |
51 | struct device *dev; | 51 | struct device *dev; |
52 | struct device_dma_parameters dma_parms; | ||
52 | struct dma_device dma_device; | 53 | struct dma_device dma_device; |
53 | struct imxdma_channel channel[MAX_DMA_CHANNELS]; | 54 | struct imxdma_channel channel[MAX_DMA_CHANNELS]; |
54 | }; | 55 | }; |
@@ -242,6 +243,21 @@ static struct dma_async_tx_descriptor *imxdma_prep_slave_sg( | |||
242 | else | 243 | else |
243 | dmamode = DMA_MODE_WRITE; | 244 | dmamode = DMA_MODE_WRITE; |
244 | 245 | ||
246 | switch (imxdmac->word_size) { | ||
247 | case DMA_SLAVE_BUSWIDTH_4_BYTES: | ||
248 | if (sgl->length & 3 || sgl->dma_address & 3) | ||
249 | return NULL; | ||
250 | break; | ||
251 | case DMA_SLAVE_BUSWIDTH_2_BYTES: | ||
252 | if (sgl->length & 1 || sgl->dma_address & 1) | ||
253 | return NULL; | ||
254 | break; | ||
255 | case DMA_SLAVE_BUSWIDTH_1_BYTE: | ||
256 | break; | ||
257 | default: | ||
258 | return NULL; | ||
259 | } | ||
260 | |||
245 | ret = imx_dma_setup_sg(imxdmac->imxdma_channel, sgl, sg_len, | 261 | ret = imx_dma_setup_sg(imxdmac->imxdma_channel, sgl, sg_len, |
246 | dma_length, imxdmac->per_address, dmamode); | 262 | dma_length, imxdmac->per_address, dmamode); |
247 | if (ret) | 263 | if (ret) |
@@ -329,6 +345,9 @@ static int __init imxdma_probe(struct platform_device *pdev) | |||
329 | 345 | ||
330 | INIT_LIST_HEAD(&imxdma->dma_device.channels); | 346 | INIT_LIST_HEAD(&imxdma->dma_device.channels); |
331 | 347 | ||
348 | dma_cap_set(DMA_SLAVE, imxdma->dma_device.cap_mask); | ||
349 | dma_cap_set(DMA_CYCLIC, imxdma->dma_device.cap_mask); | ||
350 | |||
332 | /* Initialize channel parameters */ | 351 | /* Initialize channel parameters */ |
333 | for (i = 0; i < MAX_DMA_CHANNELS; i++) { | 352 | for (i = 0; i < MAX_DMA_CHANNELS; i++) { |
334 | struct imxdma_channel *imxdmac = &imxdma->channel[i]; | 353 | struct imxdma_channel *imxdmac = &imxdma->channel[i]; |
@@ -346,11 +365,7 @@ static int __init imxdma_probe(struct platform_device *pdev) | |||
346 | imxdmac->imxdma = imxdma; | 365 | imxdmac->imxdma = imxdma; |
347 | spin_lock_init(&imxdmac->lock); | 366 | spin_lock_init(&imxdmac->lock); |
348 | 367 | ||
349 | dma_cap_set(DMA_SLAVE, imxdma->dma_device.cap_mask); | ||
350 | dma_cap_set(DMA_CYCLIC, imxdma->dma_device.cap_mask); | ||
351 | |||
352 | imxdmac->chan.device = &imxdma->dma_device; | 368 | imxdmac->chan.device = &imxdma->dma_device; |
353 | imxdmac->chan.chan_id = i; | ||
354 | imxdmac->channel = i; | 369 | imxdmac->channel = i; |
355 | 370 | ||
356 | /* Add the channel to the DMAC list */ | 371 | /* Add the channel to the DMAC list */ |
@@ -370,6 +385,9 @@ static int __init imxdma_probe(struct platform_device *pdev) | |||
370 | 385 | ||
371 | platform_set_drvdata(pdev, imxdma); | 386 | platform_set_drvdata(pdev, imxdma); |
372 | 387 | ||
388 | imxdma->dma_device.dev->dma_parms = &imxdma->dma_parms; | ||
389 | dma_set_max_seg_size(imxdma->dma_device.dev, 0xffffff); | ||
390 | |||
373 | ret = dma_async_device_register(&imxdma->dma_device); | 391 | ret = dma_async_device_register(&imxdma->dma_device); |
374 | if (ret) { | 392 | if (ret) { |
375 | dev_err(&pdev->dev, "unable to register\n"); | 393 | dev_err(&pdev->dev, "unable to register\n"); |
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c index d5a5d4d9c19b..b6d1455fa936 100644 --- a/drivers/dma/imx-sdma.c +++ b/drivers/dma/imx-sdma.c | |||
@@ -230,7 +230,7 @@ struct sdma_engine; | |||
230 | * struct sdma_channel - housekeeping for a SDMA channel | 230 | * struct sdma_channel - housekeeping for a SDMA channel |
231 | * | 231 | * |
232 | * @sdma pointer to the SDMA engine for this channel | 232 | * @sdma pointer to the SDMA engine for this channel |
233 | * @channel the channel number, matches dmaengine chan_id | 233 | * @channel the channel number, matches dmaengine chan_id + 1 |
234 | * @direction transfer type. Needed for setting SDMA script | 234 | * @direction transfer type. Needed for setting SDMA script |
235 | * @peripheral_type Peripheral type. Needed for setting SDMA script | 235 | * @peripheral_type Peripheral type. Needed for setting SDMA script |
236 | * @event_id0 aka dma request line | 236 | * @event_id0 aka dma request line |
@@ -301,6 +301,7 @@ struct sdma_firmware_header { | |||
301 | 301 | ||
302 | struct sdma_engine { | 302 | struct sdma_engine { |
303 | struct device *dev; | 303 | struct device *dev; |
304 | struct device_dma_parameters dma_parms; | ||
304 | struct sdma_channel channel[MAX_DMA_CHANNELS]; | 305 | struct sdma_channel channel[MAX_DMA_CHANNELS]; |
305 | struct sdma_channel_control *channel_control; | 306 | struct sdma_channel_control *channel_control; |
306 | void __iomem *regs; | 307 | void __iomem *regs; |
@@ -449,7 +450,7 @@ static void sdma_handle_channel_loop(struct sdma_channel *sdmac) | |||
449 | if (bd->mode.status & BD_RROR) | 450 | if (bd->mode.status & BD_RROR) |
450 | sdmac->status = DMA_ERROR; | 451 | sdmac->status = DMA_ERROR; |
451 | else | 452 | else |
452 | sdmac->status = DMA_SUCCESS; | 453 | sdmac->status = DMA_IN_PROGRESS; |
453 | 454 | ||
454 | bd->mode.status |= BD_DONE; | 455 | bd->mode.status |= BD_DONE; |
455 | sdmac->buf_tail++; | 456 | sdmac->buf_tail++; |
@@ -770,15 +771,15 @@ static void sdma_enable_channel(struct sdma_engine *sdma, int channel) | |||
770 | __raw_writel(1 << channel, sdma->regs + SDMA_H_START); | 771 | __raw_writel(1 << channel, sdma->regs + SDMA_H_START); |
771 | } | 772 | } |
772 | 773 | ||
773 | static dma_cookie_t sdma_assign_cookie(struct sdma_channel *sdma) | 774 | static dma_cookie_t sdma_assign_cookie(struct sdma_channel *sdmac) |
774 | { | 775 | { |
775 | dma_cookie_t cookie = sdma->chan.cookie; | 776 | dma_cookie_t cookie = sdmac->chan.cookie; |
776 | 777 | ||
777 | if (++cookie < 0) | 778 | if (++cookie < 0) |
778 | cookie = 1; | 779 | cookie = 1; |
779 | 780 | ||
780 | sdma->chan.cookie = cookie; | 781 | sdmac->chan.cookie = cookie; |
781 | sdma->desc.cookie = cookie; | 782 | sdmac->desc.cookie = cookie; |
782 | 783 | ||
783 | return cookie; | 784 | return cookie; |
784 | } | 785 | } |
@@ -798,7 +799,7 @@ static dma_cookie_t sdma_tx_submit(struct dma_async_tx_descriptor *tx) | |||
798 | 799 | ||
799 | cookie = sdma_assign_cookie(sdmac); | 800 | cookie = sdma_assign_cookie(sdmac); |
800 | 801 | ||
801 | sdma_enable_channel(sdma, tx->chan->chan_id); | 802 | sdma_enable_channel(sdma, sdmac->channel); |
802 | 803 | ||
803 | spin_unlock_irq(&sdmac->lock); | 804 | spin_unlock_irq(&sdmac->lock); |
804 | 805 | ||
@@ -811,10 +812,6 @@ static int sdma_alloc_chan_resources(struct dma_chan *chan) | |||
811 | struct imx_dma_data *data = chan->private; | 812 | struct imx_dma_data *data = chan->private; |
812 | int prio, ret; | 813 | int prio, ret; |
813 | 814 | ||
814 | /* No need to execute this for internal channel 0 */ | ||
815 | if (chan->chan_id == 0) | ||
816 | return 0; | ||
817 | |||
818 | if (!data) | 815 | if (!data) |
819 | return -EINVAL; | 816 | return -EINVAL; |
820 | 817 | ||
@@ -879,7 +876,7 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg( | |||
879 | struct sdma_channel *sdmac = to_sdma_chan(chan); | 876 | struct sdma_channel *sdmac = to_sdma_chan(chan); |
880 | struct sdma_engine *sdma = sdmac->sdma; | 877 | struct sdma_engine *sdma = sdmac->sdma; |
881 | int ret, i, count; | 878 | int ret, i, count; |
882 | int channel = chan->chan_id; | 879 | int channel = sdmac->channel; |
883 | struct scatterlist *sg; | 880 | struct scatterlist *sg; |
884 | 881 | ||
885 | if (sdmac->status == DMA_IN_PROGRESS) | 882 | if (sdmac->status == DMA_IN_PROGRESS) |
@@ -924,22 +921,33 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg( | |||
924 | ret = -EINVAL; | 921 | ret = -EINVAL; |
925 | goto err_out; | 922 | goto err_out; |
926 | } | 923 | } |
927 | if (sdmac->word_size == DMA_SLAVE_BUSWIDTH_4_BYTES) | 924 | |
925 | switch (sdmac->word_size) { | ||
926 | case DMA_SLAVE_BUSWIDTH_4_BYTES: | ||
928 | bd->mode.command = 0; | 927 | bd->mode.command = 0; |
929 | else | 928 | if (count & 3 || sg->dma_address & 3) |
930 | bd->mode.command = sdmac->word_size; | 929 | return NULL; |
930 | break; | ||
931 | case DMA_SLAVE_BUSWIDTH_2_BYTES: | ||
932 | bd->mode.command = 2; | ||
933 | if (count & 1 || sg->dma_address & 1) | ||
934 | return NULL; | ||
935 | break; | ||
936 | case DMA_SLAVE_BUSWIDTH_1_BYTE: | ||
937 | bd->mode.command = 1; | ||
938 | break; | ||
939 | default: | ||
940 | return NULL; | ||
941 | } | ||
931 | 942 | ||
932 | param = BD_DONE | BD_EXTD | BD_CONT; | 943 | param = BD_DONE | BD_EXTD | BD_CONT; |
933 | 944 | ||
934 | if (sdmac->flags & IMX_DMA_SG_LOOP) { | 945 | if (i + 1 == sg_len) { |
935 | param |= BD_INTR; | 946 | param |= BD_INTR; |
936 | if (i + 1 == sg_len) | 947 | param |= BD_LAST; |
937 | param |= BD_WRAP; | 948 | param &= ~BD_CONT; |
938 | } | 949 | } |
939 | 950 | ||
940 | if (i + 1 == sg_len) | ||
941 | param |= BD_INTR; | ||
942 | |||
943 | dev_dbg(sdma->dev, "entry %d: count: %d dma: 0x%08x %s%s\n", | 951 | dev_dbg(sdma->dev, "entry %d: count: %d dma: 0x%08x %s%s\n", |
944 | i, count, sg->dma_address, | 952 | i, count, sg->dma_address, |
945 | param & BD_WRAP ? "wrap" : "", | 953 | param & BD_WRAP ? "wrap" : "", |
@@ -953,6 +961,7 @@ static struct dma_async_tx_descriptor *sdma_prep_slave_sg( | |||
953 | 961 | ||
954 | return &sdmac->desc; | 962 | return &sdmac->desc; |
955 | err_out: | 963 | err_out: |
964 | sdmac->status = DMA_ERROR; | ||
956 | return NULL; | 965 | return NULL; |
957 | } | 966 | } |
958 | 967 | ||
@@ -963,7 +972,7 @@ static struct dma_async_tx_descriptor *sdma_prep_dma_cyclic( | |||
963 | struct sdma_channel *sdmac = to_sdma_chan(chan); | 972 | struct sdma_channel *sdmac = to_sdma_chan(chan); |
964 | struct sdma_engine *sdma = sdmac->sdma; | 973 | struct sdma_engine *sdma = sdmac->sdma; |
965 | int num_periods = buf_len / period_len; | 974 | int num_periods = buf_len / period_len; |
966 | int channel = chan->chan_id; | 975 | int channel = sdmac->channel; |
967 | int ret, i = 0, buf = 0; | 976 | int ret, i = 0, buf = 0; |
968 | 977 | ||
969 | dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); | 978 | dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); |
@@ -1066,14 +1075,12 @@ static enum dma_status sdma_tx_status(struct dma_chan *chan, | |||
1066 | { | 1075 | { |
1067 | struct sdma_channel *sdmac = to_sdma_chan(chan); | 1076 | struct sdma_channel *sdmac = to_sdma_chan(chan); |
1068 | dma_cookie_t last_used; | 1077 | dma_cookie_t last_used; |
1069 | enum dma_status ret; | ||
1070 | 1078 | ||
1071 | last_used = chan->cookie; | 1079 | last_used = chan->cookie; |
1072 | 1080 | ||
1073 | ret = dma_async_is_complete(cookie, sdmac->last_completed, last_used); | ||
1074 | dma_set_tx_state(txstate, sdmac->last_completed, last_used, 0); | 1081 | dma_set_tx_state(txstate, sdmac->last_completed, last_used, 0); |
1075 | 1082 | ||
1076 | return ret; | 1083 | return sdmac->status; |
1077 | } | 1084 | } |
1078 | 1085 | ||
1079 | static void sdma_issue_pending(struct dma_chan *chan) | 1086 | static void sdma_issue_pending(struct dma_chan *chan) |
@@ -1135,7 +1142,7 @@ static int __init sdma_get_firmware(struct sdma_engine *sdma, | |||
1135 | /* download the RAM image for SDMA */ | 1142 | /* download the RAM image for SDMA */ |
1136 | sdma_load_script(sdma, ram_code, | 1143 | sdma_load_script(sdma, ram_code, |
1137 | header->ram_code_size, | 1144 | header->ram_code_size, |
1138 | sdma->script_addrs->ram_code_start_addr); | 1145 | addr->ram_code_start_addr); |
1139 | clk_disable(sdma->clk); | 1146 | clk_disable(sdma->clk); |
1140 | 1147 | ||
1141 | sdma_add_scripts(sdma, addr); | 1148 | sdma_add_scripts(sdma, addr); |
@@ -1237,7 +1244,6 @@ static int __init sdma_probe(struct platform_device *pdev) | |||
1237 | struct resource *iores; | 1244 | struct resource *iores; |
1238 | struct sdma_platform_data *pdata = pdev->dev.platform_data; | 1245 | struct sdma_platform_data *pdata = pdev->dev.platform_data; |
1239 | int i; | 1246 | int i; |
1240 | dma_cap_mask_t mask; | ||
1241 | struct sdma_engine *sdma; | 1247 | struct sdma_engine *sdma; |
1242 | 1248 | ||
1243 | sdma = kzalloc(sizeof(*sdma), GFP_KERNEL); | 1249 | sdma = kzalloc(sizeof(*sdma), GFP_KERNEL); |
@@ -1280,6 +1286,9 @@ static int __init sdma_probe(struct platform_device *pdev) | |||
1280 | 1286 | ||
1281 | sdma->version = pdata->sdma_version; | 1287 | sdma->version = pdata->sdma_version; |
1282 | 1288 | ||
1289 | dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask); | ||
1290 | dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask); | ||
1291 | |||
1283 | INIT_LIST_HEAD(&sdma->dma_device.channels); | 1292 | INIT_LIST_HEAD(&sdma->dma_device.channels); |
1284 | /* Initialize channel parameters */ | 1293 | /* Initialize channel parameters */ |
1285 | for (i = 0; i < MAX_DMA_CHANNELS; i++) { | 1294 | for (i = 0; i < MAX_DMA_CHANNELS; i++) { |
@@ -1288,15 +1297,17 @@ static int __init sdma_probe(struct platform_device *pdev) | |||
1288 | sdmac->sdma = sdma; | 1297 | sdmac->sdma = sdma; |
1289 | spin_lock_init(&sdmac->lock); | 1298 | spin_lock_init(&sdmac->lock); |
1290 | 1299 | ||
1291 | dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask); | ||
1292 | dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask); | ||
1293 | |||
1294 | sdmac->chan.device = &sdma->dma_device; | 1300 | sdmac->chan.device = &sdma->dma_device; |
1295 | sdmac->chan.chan_id = i; | ||
1296 | sdmac->channel = i; | 1301 | sdmac->channel = i; |
1297 | 1302 | ||
1298 | /* Add the channel to the DMAC list */ | 1303 | /* |
1299 | list_add_tail(&sdmac->chan.device_node, &sdma->dma_device.channels); | 1304 | * Add the channel to the DMAC list. Do not add channel 0 though |
1305 | * because we need it internally in the SDMA driver. This also means | ||
1306 | * that channel 0 in dmaengine counting matches sdma channel 1. | ||
1307 | */ | ||
1308 | if (i) | ||
1309 | list_add_tail(&sdmac->chan.device_node, | ||
1310 | &sdma->dma_device.channels); | ||
1300 | } | 1311 | } |
1301 | 1312 | ||
1302 | ret = sdma_init(sdma); | 1313 | ret = sdma_init(sdma); |
@@ -1317,6 +1328,8 @@ static int __init sdma_probe(struct platform_device *pdev) | |||
1317 | sdma->dma_device.device_prep_dma_cyclic = sdma_prep_dma_cyclic; | 1328 | sdma->dma_device.device_prep_dma_cyclic = sdma_prep_dma_cyclic; |
1318 | sdma->dma_device.device_control = sdma_control; | 1329 | sdma->dma_device.device_control = sdma_control; |
1319 | sdma->dma_device.device_issue_pending = sdma_issue_pending; | 1330 | sdma->dma_device.device_issue_pending = sdma_issue_pending; |
1331 | sdma->dma_device.dev->dma_parms = &sdma->dma_parms; | ||
1332 | dma_set_max_seg_size(sdma->dma_device.dev, 65535); | ||
1320 | 1333 | ||
1321 | ret = dma_async_device_register(&sdma->dma_device); | 1334 | ret = dma_async_device_register(&sdma->dma_device); |
1322 | if (ret) { | 1335 | if (ret) { |
@@ -1324,13 +1337,6 @@ static int __init sdma_probe(struct platform_device *pdev) | |||
1324 | goto err_init; | 1337 | goto err_init; |
1325 | } | 1338 | } |
1326 | 1339 | ||
1327 | /* request channel 0. This is an internal control channel | ||
1328 | * to the SDMA engine and not available to clients. | ||
1329 | */ | ||
1330 | dma_cap_zero(mask); | ||
1331 | dma_cap_set(DMA_SLAVE, mask); | ||
1332 | dma_request_channel(mask, NULL, NULL); | ||
1333 | |||
1334 | dev_info(sdma->dev, "initialized\n"); | 1340 | dev_info(sdma->dev, "initialized\n"); |
1335 | 1341 | ||
1336 | return 0; | 1342 | return 0; |
@@ -1348,7 +1354,7 @@ err_clk: | |||
1348 | err_request_region: | 1354 | err_request_region: |
1349 | err_irq: | 1355 | err_irq: |
1350 | kfree(sdma); | 1356 | kfree(sdma); |
1351 | return 0; | 1357 | return ret; |
1352 | } | 1358 | } |
1353 | 1359 | ||
1354 | static int __exit sdma_remove(struct platform_device *pdev) | 1360 | static int __exit sdma_remove(struct platform_device *pdev) |
diff --git a/drivers/dma/ipu/ipu_idmac.c b/drivers/dma/ipu/ipu_idmac.c index cb26ee9773d6..c1a125e7d1df 100644 --- a/drivers/dma/ipu/ipu_idmac.c +++ b/drivers/dma/ipu/ipu_idmac.c | |||
@@ -1145,29 +1145,6 @@ static int ipu_disable_channel(struct idmac *idmac, struct idmac_channel *ichan, | |||
1145 | reg = idmac_read_icreg(ipu, IDMAC_CHA_EN); | 1145 | reg = idmac_read_icreg(ipu, IDMAC_CHA_EN); |
1146 | idmac_write_icreg(ipu, reg & ~chan_mask, IDMAC_CHA_EN); | 1146 | idmac_write_icreg(ipu, reg & ~chan_mask, IDMAC_CHA_EN); |
1147 | 1147 | ||
1148 | /* | ||
1149 | * Problem (observed with channel DMAIC_7): after enabling the channel | ||
1150 | * and initialising buffers, there comes an interrupt with current still | ||
1151 | * pointing at buffer 0, whereas it should use buffer 0 first and only | ||
1152 | * generate an interrupt when it is done, then current should already | ||
1153 | * point to buffer 1. This spurious interrupt also comes on channel | ||
1154 | * DMASDC_0. With DMAIC_7 normally, is we just leave the ISR after the | ||
1155 | * first interrupt, there comes the second with current correctly | ||
1156 | * pointing to buffer 1 this time. But sometimes this second interrupt | ||
1157 | * doesn't come and the channel hangs. Clearing BUFx_RDY when disabling | ||
1158 | * the channel seems to prevent the channel from hanging, but it doesn't | ||
1159 | * prevent the spurious interrupt. This might also be unsafe. Think | ||
1160 | * about the IDMAC controller trying to switch to a buffer, when we | ||
1161 | * clear the ready bit, and re-enable it a moment later. | ||
1162 | */ | ||
1163 | reg = idmac_read_ipureg(ipu, IPU_CHA_BUF0_RDY); | ||
1164 | idmac_write_ipureg(ipu, 0, IPU_CHA_BUF0_RDY); | ||
1165 | idmac_write_ipureg(ipu, reg & ~(1UL << channel), IPU_CHA_BUF0_RDY); | ||
1166 | |||
1167 | reg = idmac_read_ipureg(ipu, IPU_CHA_BUF1_RDY); | ||
1168 | idmac_write_ipureg(ipu, 0, IPU_CHA_BUF1_RDY); | ||
1169 | idmac_write_ipureg(ipu, reg & ~(1UL << channel), IPU_CHA_BUF1_RDY); | ||
1170 | |||
1171 | spin_unlock_irqrestore(&ipu->lock, flags); | 1148 | spin_unlock_irqrestore(&ipu->lock, flags); |
1172 | 1149 | ||
1173 | return 0; | 1150 | return 0; |
@@ -1246,33 +1223,6 @@ static irqreturn_t idmac_interrupt(int irq, void *dev_id) | |||
1246 | 1223 | ||
1247 | /* Other interrupts do not interfere with this channel */ | 1224 | /* Other interrupts do not interfere with this channel */ |
1248 | spin_lock(&ichan->lock); | 1225 | spin_lock(&ichan->lock); |
1249 | if (unlikely(chan_id != IDMAC_SDC_0 && chan_id != IDMAC_SDC_1 && | ||
1250 | ((curbuf >> chan_id) & 1) == ichan->active_buffer && | ||
1251 | !list_is_last(ichan->queue.next, &ichan->queue))) { | ||
1252 | int i = 100; | ||
1253 | |||
1254 | /* This doesn't help. See comment in ipu_disable_channel() */ | ||
1255 | while (--i) { | ||
1256 | curbuf = idmac_read_ipureg(&ipu_data, IPU_CHA_CUR_BUF); | ||
1257 | if (((curbuf >> chan_id) & 1) != ichan->active_buffer) | ||
1258 | break; | ||
1259 | cpu_relax(); | ||
1260 | } | ||
1261 | |||
1262 | if (!i) { | ||
1263 | spin_unlock(&ichan->lock); | ||
1264 | dev_dbg(dev, | ||
1265 | "IRQ on active buffer on channel %x, active " | ||
1266 | "%d, ready %x, %x, current %x!\n", chan_id, | ||
1267 | ichan->active_buffer, ready0, ready1, curbuf); | ||
1268 | return IRQ_NONE; | ||
1269 | } else | ||
1270 | dev_dbg(dev, | ||
1271 | "Buffer deactivated on channel %x, active " | ||
1272 | "%d, ready %x, %x, current %x, rest %d!\n", chan_id, | ||
1273 | ichan->active_buffer, ready0, ready1, curbuf, i); | ||
1274 | } | ||
1275 | |||
1276 | if (unlikely((ichan->active_buffer && (ready1 >> chan_id) & 1) || | 1226 | if (unlikely((ichan->active_buffer && (ready1 >> chan_id) & 1) || |
1277 | (!ichan->active_buffer && (ready0 >> chan_id) & 1) | 1227 | (!ichan->active_buffer && (ready0 >> chan_id) & 1) |
1278 | )) { | 1228 | )) { |
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c index 4a5ecc58025d..23e03554f0d3 100644 --- a/drivers/edac/amd64_edac.c +++ b/drivers/edac/amd64_edac.c | |||
@@ -826,8 +826,6 @@ static void amd64_dump_dramcfg_low(u32 dclr, int chan) | |||
826 | /* Display and decode various NB registers for debug purposes. */ | 826 | /* Display and decode various NB registers for debug purposes. */ |
827 | static void amd64_dump_misc_regs(struct amd64_pvt *pvt) | 827 | static void amd64_dump_misc_regs(struct amd64_pvt *pvt) |
828 | { | 828 | { |
829 | int ganged; | ||
830 | |||
831 | debugf1("F3xE8 (NB Cap): 0x%08x\n", pvt->nbcap); | 829 | debugf1("F3xE8 (NB Cap): 0x%08x\n", pvt->nbcap); |
832 | 830 | ||
833 | debugf1(" NB two channel DRAM capable: %s\n", | 831 | debugf1(" NB two channel DRAM capable: %s\n", |
@@ -851,28 +849,19 @@ static void amd64_dump_misc_regs(struct amd64_pvt *pvt) | |||
851 | debugf1(" DramHoleValid: %s\n", | 849 | debugf1(" DramHoleValid: %s\n", |
852 | (pvt->dhar & DHAR_VALID) ? "yes" : "no"); | 850 | (pvt->dhar & DHAR_VALID) ? "yes" : "no"); |
853 | 851 | ||
852 | amd64_debug_display_dimm_sizes(0, pvt); | ||
853 | |||
854 | /* everything below this point is Fam10h and above */ | 854 | /* everything below this point is Fam10h and above */ |
855 | if (boot_cpu_data.x86 == 0xf) { | 855 | if (boot_cpu_data.x86 == 0xf) |
856 | amd64_debug_display_dimm_sizes(0, pvt); | ||
857 | return; | 856 | return; |
858 | } | 857 | |
858 | amd64_debug_display_dimm_sizes(1, pvt); | ||
859 | 859 | ||
860 | amd64_info("using %s syndromes.\n", ((pvt->syn_type == 8) ? "x8" : "x4")); | 860 | amd64_info("using %s syndromes.\n", ((pvt->syn_type == 8) ? "x8" : "x4")); |
861 | 861 | ||
862 | /* Only if NOT ganged does dclr1 have valid info */ | 862 | /* Only if NOT ganged does dclr1 have valid info */ |
863 | if (!dct_ganging_enabled(pvt)) | 863 | if (!dct_ganging_enabled(pvt)) |
864 | amd64_dump_dramcfg_low(pvt->dclr1, 1); | 864 | amd64_dump_dramcfg_low(pvt->dclr1, 1); |
865 | |||
866 | /* | ||
867 | * Determine if ganged and then dump memory sizes for first controller, | ||
868 | * and if NOT ganged dump info for 2nd controller. | ||
869 | */ | ||
870 | ganged = dct_ganging_enabled(pvt); | ||
871 | |||
872 | amd64_debug_display_dimm_sizes(0, pvt); | ||
873 | |||
874 | if (!ganged) | ||
875 | amd64_debug_display_dimm_sizes(1, pvt); | ||
876 | } | 865 | } |
877 | 866 | ||
878 | /* Read in both of DBAM registers */ | 867 | /* Read in both of DBAM registers */ |
@@ -1644,11 +1633,10 @@ static void amd64_debug_display_dimm_sizes(int ctrl, struct amd64_pvt *pvt) | |||
1644 | WARN_ON(ctrl != 0); | 1633 | WARN_ON(ctrl != 0); |
1645 | } | 1634 | } |
1646 | 1635 | ||
1647 | debugf1("F2x%d80 (DRAM Bank Address Mapping): 0x%08x\n", | 1636 | dbam = (ctrl && !dct_ganging_enabled(pvt)) ? pvt->dbam1 : pvt->dbam0; |
1648 | ctrl, ctrl ? pvt->dbam1 : pvt->dbam0); | 1637 | dcsb = (ctrl && !dct_ganging_enabled(pvt)) ? pvt->dcsb1 : pvt->dcsb0; |
1649 | 1638 | ||
1650 | dbam = ctrl ? pvt->dbam1 : pvt->dbam0; | 1639 | debugf1("F2x%d80 (DRAM Bank Address Mapping): 0x%08x\n", ctrl, dbam); |
1651 | dcsb = ctrl ? pvt->dcsb1 : pvt->dcsb0; | ||
1652 | 1640 | ||
1653 | edac_printk(KERN_DEBUG, EDAC_MC, "DCT%d chip selects:\n", ctrl); | 1641 | edac_printk(KERN_DEBUG, EDAC_MC, "DCT%d chip selects:\n", ctrl); |
1654 | 1642 | ||
diff --git a/drivers/firmware/dmi_scan.c b/drivers/firmware/dmi_scan.c index e28e41668177..bcb1126e3d00 100644 --- a/drivers/firmware/dmi_scan.c +++ b/drivers/firmware/dmi_scan.c | |||
@@ -378,10 +378,17 @@ static void __init print_filtered(const char *info) | |||
378 | 378 | ||
379 | static void __init dmi_dump_ids(void) | 379 | static void __init dmi_dump_ids(void) |
380 | { | 380 | { |
381 | const char *board; /* Board Name is optional */ | ||
382 | |||
381 | printk(KERN_DEBUG "DMI: "); | 383 | printk(KERN_DEBUG "DMI: "); |
382 | print_filtered(dmi_get_system_info(DMI_BOARD_NAME)); | 384 | print_filtered(dmi_get_system_info(DMI_SYS_VENDOR)); |
383 | printk(KERN_CONT "/"); | 385 | printk(KERN_CONT " "); |
384 | print_filtered(dmi_get_system_info(DMI_PRODUCT_NAME)); | 386 | print_filtered(dmi_get_system_info(DMI_PRODUCT_NAME)); |
387 | board = dmi_get_system_info(DMI_BOARD_NAME); | ||
388 | if (board) { | ||
389 | printk(KERN_CONT "/"); | ||
390 | print_filtered(board); | ||
391 | } | ||
385 | printk(KERN_CONT ", BIOS "); | 392 | printk(KERN_CONT ", BIOS "); |
386 | print_filtered(dmi_get_system_info(DMI_BIOS_VERSION)); | 393 | print_filtered(dmi_get_system_info(DMI_BIOS_VERSION)); |
387 | printk(KERN_CONT " "); | 394 | printk(KERN_CONT " "); |
diff --git a/drivers/gpio/pca953x.c b/drivers/gpio/pca953x.c index a261972f603d..b473429eee75 100644 --- a/drivers/gpio/pca953x.c +++ b/drivers/gpio/pca953x.c | |||
@@ -60,6 +60,7 @@ struct pca953x_chip { | |||
60 | unsigned gpio_start; | 60 | unsigned gpio_start; |
61 | uint16_t reg_output; | 61 | uint16_t reg_output; |
62 | uint16_t reg_direction; | 62 | uint16_t reg_direction; |
63 | struct mutex i2c_lock; | ||
63 | 64 | ||
64 | #ifdef CONFIG_GPIO_PCA953X_IRQ | 65 | #ifdef CONFIG_GPIO_PCA953X_IRQ |
65 | struct mutex irq_lock; | 66 | struct mutex irq_lock; |
@@ -119,13 +120,17 @@ static int pca953x_gpio_direction_input(struct gpio_chip *gc, unsigned off) | |||
119 | 120 | ||
120 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | 121 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
121 | 122 | ||
123 | mutex_lock(&chip->i2c_lock); | ||
122 | reg_val = chip->reg_direction | (1u << off); | 124 | reg_val = chip->reg_direction | (1u << off); |
123 | ret = pca953x_write_reg(chip, PCA953X_DIRECTION, reg_val); | 125 | ret = pca953x_write_reg(chip, PCA953X_DIRECTION, reg_val); |
124 | if (ret) | 126 | if (ret) |
125 | return ret; | 127 | goto exit; |
126 | 128 | ||
127 | chip->reg_direction = reg_val; | 129 | chip->reg_direction = reg_val; |
128 | return 0; | 130 | ret = 0; |
131 | exit: | ||
132 | mutex_unlock(&chip->i2c_lock); | ||
133 | return ret; | ||
129 | } | 134 | } |
130 | 135 | ||
131 | static int pca953x_gpio_direction_output(struct gpio_chip *gc, | 136 | static int pca953x_gpio_direction_output(struct gpio_chip *gc, |
@@ -137,6 +142,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, | |||
137 | 142 | ||
138 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | 143 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
139 | 144 | ||
145 | mutex_lock(&chip->i2c_lock); | ||
140 | /* set output level */ | 146 | /* set output level */ |
141 | if (val) | 147 | if (val) |
142 | reg_val = chip->reg_output | (1u << off); | 148 | reg_val = chip->reg_output | (1u << off); |
@@ -145,7 +151,7 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, | |||
145 | 151 | ||
146 | ret = pca953x_write_reg(chip, PCA953X_OUTPUT, reg_val); | 152 | ret = pca953x_write_reg(chip, PCA953X_OUTPUT, reg_val); |
147 | if (ret) | 153 | if (ret) |
148 | return ret; | 154 | goto exit; |
149 | 155 | ||
150 | chip->reg_output = reg_val; | 156 | chip->reg_output = reg_val; |
151 | 157 | ||
@@ -153,10 +159,13 @@ static int pca953x_gpio_direction_output(struct gpio_chip *gc, | |||
153 | reg_val = chip->reg_direction & ~(1u << off); | 159 | reg_val = chip->reg_direction & ~(1u << off); |
154 | ret = pca953x_write_reg(chip, PCA953X_DIRECTION, reg_val); | 160 | ret = pca953x_write_reg(chip, PCA953X_DIRECTION, reg_val); |
155 | if (ret) | 161 | if (ret) |
156 | return ret; | 162 | goto exit; |
157 | 163 | ||
158 | chip->reg_direction = reg_val; | 164 | chip->reg_direction = reg_val; |
159 | return 0; | 165 | ret = 0; |
166 | exit: | ||
167 | mutex_unlock(&chip->i2c_lock); | ||
168 | return ret; | ||
160 | } | 169 | } |
161 | 170 | ||
162 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) | 171 | static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) |
@@ -167,7 +176,9 @@ static int pca953x_gpio_get_value(struct gpio_chip *gc, unsigned off) | |||
167 | 176 | ||
168 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | 177 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
169 | 178 | ||
179 | mutex_lock(&chip->i2c_lock); | ||
170 | ret = pca953x_read_reg(chip, PCA953X_INPUT, ®_val); | 180 | ret = pca953x_read_reg(chip, PCA953X_INPUT, ®_val); |
181 | mutex_unlock(&chip->i2c_lock); | ||
171 | if (ret < 0) { | 182 | if (ret < 0) { |
172 | /* NOTE: diagnostic already emitted; that's all we should | 183 | /* NOTE: diagnostic already emitted; that's all we should |
173 | * do unless gpio_*_value_cansleep() calls become different | 184 | * do unless gpio_*_value_cansleep() calls become different |
@@ -187,6 +198,7 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) | |||
187 | 198 | ||
188 | chip = container_of(gc, struct pca953x_chip, gpio_chip); | 199 | chip = container_of(gc, struct pca953x_chip, gpio_chip); |
189 | 200 | ||
201 | mutex_lock(&chip->i2c_lock); | ||
190 | if (val) | 202 | if (val) |
191 | reg_val = chip->reg_output | (1u << off); | 203 | reg_val = chip->reg_output | (1u << off); |
192 | else | 204 | else |
@@ -194,9 +206,11 @@ static void pca953x_gpio_set_value(struct gpio_chip *gc, unsigned off, int val) | |||
194 | 206 | ||
195 | ret = pca953x_write_reg(chip, PCA953X_OUTPUT, reg_val); | 207 | ret = pca953x_write_reg(chip, PCA953X_OUTPUT, reg_val); |
196 | if (ret) | 208 | if (ret) |
197 | return; | 209 | goto exit; |
198 | 210 | ||
199 | chip->reg_output = reg_val; | 211 | chip->reg_output = reg_val; |
212 | exit: | ||
213 | mutex_unlock(&chip->i2c_lock); | ||
200 | } | 214 | } |
201 | 215 | ||
202 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) | 216 | static void pca953x_setup_gpio(struct pca953x_chip *chip, int gpios) |
@@ -517,6 +531,8 @@ static int __devinit pca953x_probe(struct i2c_client *client, | |||
517 | 531 | ||
518 | chip->names = pdata->names; | 532 | chip->names = pdata->names; |
519 | 533 | ||
534 | mutex_init(&chip->i2c_lock); | ||
535 | |||
520 | /* initialize cached registers from their original values. | 536 | /* initialize cached registers from their original values. |
521 | * we can't share this chip with another i2c master. | 537 | * we can't share this chip with another i2c master. |
522 | */ | 538 | */ |
diff --git a/drivers/gpu/drm/drm_info.c b/drivers/gpu/drm/drm_info.c index 3cdbaf379bb5..be9a9c07d152 100644 --- a/drivers/gpu/drm/drm_info.c +++ b/drivers/gpu/drm/drm_info.c | |||
@@ -283,17 +283,18 @@ int drm_vma_info(struct seq_file *m, void *data) | |||
283 | #endif | 283 | #endif |
284 | 284 | ||
285 | mutex_lock(&dev->struct_mutex); | 285 | mutex_lock(&dev->struct_mutex); |
286 | seq_printf(m, "vma use count: %d, high_memory = %p, 0x%08llx\n", | 286 | seq_printf(m, "vma use count: %d, high_memory = %pK, 0x%pK\n", |
287 | atomic_read(&dev->vma_count), | 287 | atomic_read(&dev->vma_count), |
288 | high_memory, (u64)virt_to_phys(high_memory)); | 288 | high_memory, (void *)virt_to_phys(high_memory)); |
289 | 289 | ||
290 | list_for_each_entry(pt, &dev->vmalist, head) { | 290 | list_for_each_entry(pt, &dev->vmalist, head) { |
291 | vma = pt->vma; | 291 | vma = pt->vma; |
292 | if (!vma) | 292 | if (!vma) |
293 | continue; | 293 | continue; |
294 | seq_printf(m, | 294 | seq_printf(m, |
295 | "\n%5d 0x%08lx-0x%08lx %c%c%c%c%c%c 0x%08lx000", | 295 | "\n%5d 0x%pK-0x%pK %c%c%c%c%c%c 0x%08lx000", |
296 | pt->pid, vma->vm_start, vma->vm_end, | 296 | pt->pid, |
297 | (void *)vma->vm_start, (void *)vma->vm_end, | ||
297 | vma->vm_flags & VM_READ ? 'r' : '-', | 298 | vma->vm_flags & VM_READ ? 'r' : '-', |
298 | vma->vm_flags & VM_WRITE ? 'w' : '-', | 299 | vma->vm_flags & VM_WRITE ? 'w' : '-', |
299 | vma->vm_flags & VM_EXEC ? 'x' : '-', | 300 | vma->vm_flags & VM_EXEC ? 'x' : '-', |
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index cfb56d0ff367..0ad533f06af9 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c | |||
@@ -46,6 +46,9 @@ module_param_named(fbpercrtc, i915_fbpercrtc, int, 0400); | |||
46 | unsigned int i915_powersave = 1; | 46 | unsigned int i915_powersave = 1; |
47 | module_param_named(powersave, i915_powersave, int, 0600); | 47 | module_param_named(powersave, i915_powersave, int, 0600); |
48 | 48 | ||
49 | unsigned int i915_enable_rc6 = 0; | ||
50 | module_param_named(i915_enable_rc6, i915_enable_rc6, int, 0600); | ||
51 | |||
49 | unsigned int i915_lvds_downclock = 0; | 52 | unsigned int i915_lvds_downclock = 0; |
50 | module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400); | 53 | module_param_named(lvds_downclock, i915_lvds_downclock, int, 0400); |
51 | 54 | ||
@@ -360,7 +363,7 @@ static int i915_drm_thaw(struct drm_device *dev) | |||
360 | /* Resume the modeset for every activated CRTC */ | 363 | /* Resume the modeset for every activated CRTC */ |
361 | drm_helper_resume_force_mode(dev); | 364 | drm_helper_resume_force_mode(dev); |
362 | 365 | ||
363 | if (dev_priv->renderctx && dev_priv->pwrctx) | 366 | if (IS_IRONLAKE_M(dev)) |
364 | ironlake_enable_rc6(dev); | 367 | ironlake_enable_rc6(dev); |
365 | } | 368 | } |
366 | 369 | ||
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a0149c619cdd..65dfe81d0035 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -958,6 +958,7 @@ extern unsigned int i915_fbpercrtc; | |||
958 | extern unsigned int i915_powersave; | 958 | extern unsigned int i915_powersave; |
959 | extern unsigned int i915_lvds_downclock; | 959 | extern unsigned int i915_lvds_downclock; |
960 | extern unsigned int i915_panel_use_ssc; | 960 | extern unsigned int i915_panel_use_ssc; |
961 | extern unsigned int i915_enable_rc6; | ||
961 | 962 | ||
962 | extern int i915_suspend(struct drm_device *dev, pm_message_t state); | 963 | extern int i915_suspend(struct drm_device *dev, pm_message_t state); |
963 | extern int i915_resume(struct drm_device *dev); | 964 | extern int i915_resume(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 5cfc68940f17..15d94c63918c 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -174,7 +174,9 @@ | |||
174 | * address/value pairs. Don't overdue it, though, x <= 2^4 must hold! | 174 | * address/value pairs. Don't overdue it, though, x <= 2^4 must hold! |
175 | */ | 175 | */ |
176 | #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*x-1) | 176 | #define MI_LOAD_REGISTER_IMM(x) MI_INSTR(0x22, 2*x-1) |
177 | #define MI_FLUSH_DW MI_INSTR(0x26, 2) /* for GEN6 */ | 177 | #define MI_FLUSH_DW MI_INSTR(0x26, 1) /* for GEN6 */ |
178 | #define MI_INVALIDATE_TLB (1<<18) | ||
179 | #define MI_INVALIDATE_BSD (1<<7) | ||
178 | #define MI_BATCH_BUFFER MI_INSTR(0x30, 1) | 180 | #define MI_BATCH_BUFFER MI_INSTR(0x30, 1) |
179 | #define MI_BATCH_NON_SECURE (1) | 181 | #define MI_BATCH_NON_SECURE (1) |
180 | #define MI_BATCH_NON_SECURE_I965 (1<<8) | 182 | #define MI_BATCH_NON_SECURE_I965 (1<<8) |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 7e42aa586504..3b006536b3d2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -5558,9 +5558,7 @@ static void intel_crtc_reset(struct drm_crtc *crtc) | |||
5558 | /* Reset flags back to the 'unknown' status so that they | 5558 | /* Reset flags back to the 'unknown' status so that they |
5559 | * will be correctly set on the initial modeset. | 5559 | * will be correctly set on the initial modeset. |
5560 | */ | 5560 | */ |
5561 | intel_crtc->cursor_addr = 0; | ||
5562 | intel_crtc->dpms_mode = -1; | 5561 | intel_crtc->dpms_mode = -1; |
5563 | intel_crtc->active = true; /* force the pipe off on setup_init_config */ | ||
5564 | } | 5562 | } |
5565 | 5563 | ||
5566 | static struct drm_crtc_helper_funcs intel_helper_funcs = { | 5564 | static struct drm_crtc_helper_funcs intel_helper_funcs = { |
@@ -5666,6 +5664,7 @@ static void intel_crtc_init(struct drm_device *dev, int pipe) | |||
5666 | dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base; | 5664 | dev_priv->pipe_to_crtc_mapping[intel_crtc->pipe] = &intel_crtc->base; |
5667 | 5665 | ||
5668 | intel_crtc_reset(&intel_crtc->base); | 5666 | intel_crtc_reset(&intel_crtc->base); |
5667 | intel_crtc->active = true; /* force the pipe off on setup_init_config */ | ||
5669 | 5668 | ||
5670 | if (HAS_PCH_SPLIT(dev)) { | 5669 | if (HAS_PCH_SPLIT(dev)) { |
5671 | intel_helper_funcs.prepare = ironlake_crtc_prepare; | 5670 | intel_helper_funcs.prepare = ironlake_crtc_prepare; |
@@ -6463,52 +6462,60 @@ void intel_enable_clock_gating(struct drm_device *dev) | |||
6463 | } | 6462 | } |
6464 | } | 6463 | } |
6465 | 6464 | ||
6466 | void intel_disable_clock_gating(struct drm_device *dev) | 6465 | static void ironlake_teardown_rc6(struct drm_device *dev) |
6467 | { | 6466 | { |
6468 | struct drm_i915_private *dev_priv = dev->dev_private; | 6467 | struct drm_i915_private *dev_priv = dev->dev_private; |
6469 | 6468 | ||
6470 | if (dev_priv->renderctx) { | 6469 | if (dev_priv->renderctx) { |
6471 | struct drm_i915_gem_object *obj = dev_priv->renderctx; | 6470 | i915_gem_object_unpin(dev_priv->renderctx); |
6472 | 6471 | drm_gem_object_unreference(&dev_priv->renderctx->base); | |
6473 | I915_WRITE(CCID, 0); | ||
6474 | POSTING_READ(CCID); | ||
6475 | |||
6476 | i915_gem_object_unpin(obj); | ||
6477 | drm_gem_object_unreference(&obj->base); | ||
6478 | dev_priv->renderctx = NULL; | 6472 | dev_priv->renderctx = NULL; |
6479 | } | 6473 | } |
6480 | 6474 | ||
6481 | if (dev_priv->pwrctx) { | 6475 | if (dev_priv->pwrctx) { |
6482 | struct drm_i915_gem_object *obj = dev_priv->pwrctx; | 6476 | i915_gem_object_unpin(dev_priv->pwrctx); |
6477 | drm_gem_object_unreference(&dev_priv->pwrctx->base); | ||
6478 | dev_priv->pwrctx = NULL; | ||
6479 | } | ||
6480 | } | ||
6481 | |||
6482 | static void ironlake_disable_rc6(struct drm_device *dev) | ||
6483 | { | ||
6484 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
6485 | |||
6486 | if (I915_READ(PWRCTXA)) { | ||
6487 | /* Wake the GPU, prevent RC6, then restore RSTDBYCTL */ | ||
6488 | I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT); | ||
6489 | wait_for(((I915_READ(RSTDBYCTL) & RSX_STATUS_MASK) == RSX_STATUS_ON), | ||
6490 | 50); | ||
6483 | 6491 | ||
6484 | I915_WRITE(PWRCTXA, 0); | 6492 | I915_WRITE(PWRCTXA, 0); |
6485 | POSTING_READ(PWRCTXA); | 6493 | POSTING_READ(PWRCTXA); |
6486 | 6494 | ||
6487 | i915_gem_object_unpin(obj); | 6495 | I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT); |
6488 | drm_gem_object_unreference(&obj->base); | 6496 | POSTING_READ(RSTDBYCTL); |
6489 | dev_priv->pwrctx = NULL; | ||
6490 | } | 6497 | } |
6498 | |||
6499 | ironlake_disable_rc6(dev); | ||
6491 | } | 6500 | } |
6492 | 6501 | ||
6493 | static void ironlake_disable_rc6(struct drm_device *dev) | 6502 | static int ironlake_setup_rc6(struct drm_device *dev) |
6494 | { | 6503 | { |
6495 | struct drm_i915_private *dev_priv = dev->dev_private; | 6504 | struct drm_i915_private *dev_priv = dev->dev_private; |
6496 | 6505 | ||
6497 | /* Wake the GPU, prevent RC6, then restore RSTDBYCTL */ | 6506 | if (dev_priv->renderctx == NULL) |
6498 | I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) | RCX_SW_EXIT); | 6507 | dev_priv->renderctx = intel_alloc_context_page(dev); |
6499 | wait_for(((I915_READ(RSTDBYCTL) & RSX_STATUS_MASK) == RSX_STATUS_ON), | 6508 | if (!dev_priv->renderctx) |
6500 | 10); | 6509 | return -ENOMEM; |
6501 | POSTING_READ(CCID); | 6510 | |
6502 | I915_WRITE(PWRCTXA, 0); | 6511 | if (dev_priv->pwrctx == NULL) |
6503 | POSTING_READ(PWRCTXA); | 6512 | dev_priv->pwrctx = intel_alloc_context_page(dev); |
6504 | I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT); | 6513 | if (!dev_priv->pwrctx) { |
6505 | POSTING_READ(RSTDBYCTL); | 6514 | ironlake_teardown_rc6(dev); |
6506 | i915_gem_object_unpin(dev_priv->renderctx); | 6515 | return -ENOMEM; |
6507 | drm_gem_object_unreference(&dev_priv->renderctx->base); | 6516 | } |
6508 | dev_priv->renderctx = NULL; | 6517 | |
6509 | i915_gem_object_unpin(dev_priv->pwrctx); | 6518 | return 0; |
6510 | drm_gem_object_unreference(&dev_priv->pwrctx->base); | ||
6511 | dev_priv->pwrctx = NULL; | ||
6512 | } | 6519 | } |
6513 | 6520 | ||
6514 | void ironlake_enable_rc6(struct drm_device *dev) | 6521 | void ironlake_enable_rc6(struct drm_device *dev) |
@@ -6516,15 +6523,26 @@ void ironlake_enable_rc6(struct drm_device *dev) | |||
6516 | struct drm_i915_private *dev_priv = dev->dev_private; | 6523 | struct drm_i915_private *dev_priv = dev->dev_private; |
6517 | int ret; | 6524 | int ret; |
6518 | 6525 | ||
6526 | /* rc6 disabled by default due to repeated reports of hanging during | ||
6527 | * boot and resume. | ||
6528 | */ | ||
6529 | if (!i915_enable_rc6) | ||
6530 | return; | ||
6531 | |||
6532 | ret = ironlake_setup_rc6(dev); | ||
6533 | if (ret) | ||
6534 | return; | ||
6535 | |||
6519 | /* | 6536 | /* |
6520 | * GPU can automatically power down the render unit if given a page | 6537 | * GPU can automatically power down the render unit if given a page |
6521 | * to save state. | 6538 | * to save state. |
6522 | */ | 6539 | */ |
6523 | ret = BEGIN_LP_RING(6); | 6540 | ret = BEGIN_LP_RING(6); |
6524 | if (ret) { | 6541 | if (ret) { |
6525 | ironlake_disable_rc6(dev); | 6542 | ironlake_teardown_rc6(dev); |
6526 | return; | 6543 | return; |
6527 | } | 6544 | } |
6545 | |||
6528 | OUT_RING(MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN); | 6546 | OUT_RING(MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN); |
6529 | OUT_RING(MI_SET_CONTEXT); | 6547 | OUT_RING(MI_SET_CONTEXT); |
6530 | OUT_RING(dev_priv->renderctx->gtt_offset | | 6548 | OUT_RING(dev_priv->renderctx->gtt_offset | |
@@ -6541,6 +6559,7 @@ void ironlake_enable_rc6(struct drm_device *dev) | |||
6541 | I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT); | 6559 | I915_WRITE(RSTDBYCTL, I915_READ(RSTDBYCTL) & ~RCX_SW_EXIT); |
6542 | } | 6560 | } |
6543 | 6561 | ||
6562 | |||
6544 | /* Set up chip specific display functions */ | 6563 | /* Set up chip specific display functions */ |
6545 | static void intel_init_display(struct drm_device *dev) | 6564 | static void intel_init_display(struct drm_device *dev) |
6546 | { | 6565 | { |
@@ -6783,21 +6802,9 @@ void intel_modeset_init(struct drm_device *dev) | |||
6783 | if (IS_GEN6(dev)) | 6802 | if (IS_GEN6(dev)) |
6784 | gen6_enable_rps(dev_priv); | 6803 | gen6_enable_rps(dev_priv); |
6785 | 6804 | ||
6786 | if (IS_IRONLAKE_M(dev)) { | 6805 | if (IS_IRONLAKE_M(dev)) |
6787 | dev_priv->renderctx = intel_alloc_context_page(dev); | ||
6788 | if (!dev_priv->renderctx) | ||
6789 | goto skip_rc6; | ||
6790 | dev_priv->pwrctx = intel_alloc_context_page(dev); | ||
6791 | if (!dev_priv->pwrctx) { | ||
6792 | i915_gem_object_unpin(dev_priv->renderctx); | ||
6793 | drm_gem_object_unreference(&dev_priv->renderctx->base); | ||
6794 | dev_priv->renderctx = NULL; | ||
6795 | goto skip_rc6; | ||
6796 | } | ||
6797 | ironlake_enable_rc6(dev); | 6806 | ironlake_enable_rc6(dev); |
6798 | } | ||
6799 | 6807 | ||
6800 | skip_rc6: | ||
6801 | INIT_WORK(&dev_priv->idle_work, intel_idle_update); | 6808 | INIT_WORK(&dev_priv->idle_work, intel_idle_update); |
6802 | setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer, | 6809 | setup_timer(&dev_priv->idle_timer, intel_gpu_idle_timer, |
6803 | (unsigned long)dev); | 6810 | (unsigned long)dev); |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 1f4242b682c8..51cb4e36997f 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -1639,6 +1639,24 @@ static int intel_dp_get_modes(struct drm_connector *connector) | |||
1639 | return 0; | 1639 | return 0; |
1640 | } | 1640 | } |
1641 | 1641 | ||
1642 | static bool | ||
1643 | intel_dp_detect_audio(struct drm_connector *connector) | ||
1644 | { | ||
1645 | struct intel_dp *intel_dp = intel_attached_dp(connector); | ||
1646 | struct edid *edid; | ||
1647 | bool has_audio = false; | ||
1648 | |||
1649 | edid = drm_get_edid(connector, &intel_dp->adapter); | ||
1650 | if (edid) { | ||
1651 | has_audio = drm_detect_monitor_audio(edid); | ||
1652 | |||
1653 | connector->display_info.raw_edid = NULL; | ||
1654 | kfree(edid); | ||
1655 | } | ||
1656 | |||
1657 | return has_audio; | ||
1658 | } | ||
1659 | |||
1642 | static int | 1660 | static int |
1643 | intel_dp_set_property(struct drm_connector *connector, | 1661 | intel_dp_set_property(struct drm_connector *connector, |
1644 | struct drm_property *property, | 1662 | struct drm_property *property, |
@@ -1652,17 +1670,23 @@ intel_dp_set_property(struct drm_connector *connector, | |||
1652 | return ret; | 1670 | return ret; |
1653 | 1671 | ||
1654 | if (property == intel_dp->force_audio_property) { | 1672 | if (property == intel_dp->force_audio_property) { |
1655 | if (val == intel_dp->force_audio) | 1673 | int i = val; |
1674 | bool has_audio; | ||
1675 | |||
1676 | if (i == intel_dp->force_audio) | ||
1656 | return 0; | 1677 | return 0; |
1657 | 1678 | ||
1658 | intel_dp->force_audio = val; | 1679 | intel_dp->force_audio = i; |
1659 | 1680 | ||
1660 | if (val > 0 && intel_dp->has_audio) | 1681 | if (i == 0) |
1661 | return 0; | 1682 | has_audio = intel_dp_detect_audio(connector); |
1662 | if (val < 0 && !intel_dp->has_audio) | 1683 | else |
1684 | has_audio = i > 0; | ||
1685 | |||
1686 | if (has_audio == intel_dp->has_audio) | ||
1663 | return 0; | 1687 | return 0; |
1664 | 1688 | ||
1665 | intel_dp->has_audio = val > 0; | 1689 | intel_dp->has_audio = has_audio; |
1666 | goto done; | 1690 | goto done; |
1667 | } | 1691 | } |
1668 | 1692 | ||
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 74db2557d644..2c431049963c 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -298,7 +298,6 @@ extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, | |||
298 | extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, | 298 | extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
299 | u16 *blue, int regno); | 299 | u16 *blue, int regno); |
300 | extern void intel_enable_clock_gating(struct drm_device *dev); | 300 | extern void intel_enable_clock_gating(struct drm_device *dev); |
301 | extern void intel_disable_clock_gating(struct drm_device *dev); | ||
302 | extern void ironlake_enable_drps(struct drm_device *dev); | 301 | extern void ironlake_enable_drps(struct drm_device *dev); |
303 | extern void ironlake_disable_drps(struct drm_device *dev); | 302 | extern void ironlake_disable_drps(struct drm_device *dev); |
304 | extern void gen6_enable_rps(struct drm_i915_private *dev_priv); | 303 | extern void gen6_enable_rps(struct drm_i915_private *dev_priv); |
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index 0d0273e7b029..c635c9e357b9 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -251,6 +251,27 @@ static int intel_hdmi_get_modes(struct drm_connector *connector) | |||
251 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); | 251 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); |
252 | } | 252 | } |
253 | 253 | ||
254 | static bool | ||
255 | intel_hdmi_detect_audio(struct drm_connector *connector) | ||
256 | { | ||
257 | struct intel_hdmi *intel_hdmi = intel_attached_hdmi(connector); | ||
258 | struct drm_i915_private *dev_priv = connector->dev->dev_private; | ||
259 | struct edid *edid; | ||
260 | bool has_audio = false; | ||
261 | |||
262 | edid = drm_get_edid(connector, | ||
263 | &dev_priv->gmbus[intel_hdmi->ddc_bus].adapter); | ||
264 | if (edid) { | ||
265 | if (edid->input & DRM_EDID_INPUT_DIGITAL) | ||
266 | has_audio = drm_detect_monitor_audio(edid); | ||
267 | |||
268 | connector->display_info.raw_edid = NULL; | ||
269 | kfree(edid); | ||
270 | } | ||
271 | |||
272 | return has_audio; | ||
273 | } | ||
274 | |||
254 | static int | 275 | static int |
255 | intel_hdmi_set_property(struct drm_connector *connector, | 276 | intel_hdmi_set_property(struct drm_connector *connector, |
256 | struct drm_property *property, | 277 | struct drm_property *property, |
@@ -264,17 +285,23 @@ intel_hdmi_set_property(struct drm_connector *connector, | |||
264 | return ret; | 285 | return ret; |
265 | 286 | ||
266 | if (property == intel_hdmi->force_audio_property) { | 287 | if (property == intel_hdmi->force_audio_property) { |
267 | if (val == intel_hdmi->force_audio) | 288 | int i = val; |
289 | bool has_audio; | ||
290 | |||
291 | if (i == intel_hdmi->force_audio) | ||
268 | return 0; | 292 | return 0; |
269 | 293 | ||
270 | intel_hdmi->force_audio = val; | 294 | intel_hdmi->force_audio = i; |
271 | 295 | ||
272 | if (val > 0 && intel_hdmi->has_audio) | 296 | if (i == 0) |
273 | return 0; | 297 | has_audio = intel_hdmi_detect_audio(connector); |
274 | if (val < 0 && !intel_hdmi->has_audio) | 298 | else |
299 | has_audio = i > 0; | ||
300 | |||
301 | if (has_audio == intel_hdmi->has_audio) | ||
275 | return 0; | 302 | return 0; |
276 | 303 | ||
277 | intel_hdmi->has_audio = val > 0; | 304 | intel_hdmi->has_audio = has_audio; |
278 | goto done; | 305 | goto done; |
279 | } | 306 | } |
280 | 307 | ||
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index ace8d5d30dd2..bcdba7bd5cfa 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -261,12 +261,6 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
261 | return true; | 261 | return true; |
262 | } | 262 | } |
263 | 263 | ||
264 | /* Make sure pre-965s set dither correctly */ | ||
265 | if (INTEL_INFO(dev)->gen < 4) { | ||
266 | if (dev_priv->lvds_dither) | ||
267 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | ||
268 | } | ||
269 | |||
270 | /* Native modes don't need fitting */ | 264 | /* Native modes don't need fitting */ |
271 | if (adjusted_mode->hdisplay == mode->hdisplay && | 265 | if (adjusted_mode->hdisplay == mode->hdisplay && |
272 | adjusted_mode->vdisplay == mode->vdisplay) | 266 | adjusted_mode->vdisplay == mode->vdisplay) |
@@ -374,10 +368,16 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, | |||
374 | } | 368 | } |
375 | 369 | ||
376 | out: | 370 | out: |
371 | /* If not enabling scaling, be consistent and always use 0. */ | ||
377 | if ((pfit_control & PFIT_ENABLE) == 0) { | 372 | if ((pfit_control & PFIT_ENABLE) == 0) { |
378 | pfit_control = 0; | 373 | pfit_control = 0; |
379 | pfit_pgm_ratios = 0; | 374 | pfit_pgm_ratios = 0; |
380 | } | 375 | } |
376 | |||
377 | /* Make sure pre-965 set dither correctly */ | ||
378 | if (INTEL_INFO(dev)->gen < 4 && dev_priv->lvds_dither) | ||
379 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; | ||
380 | |||
381 | if (pfit_control != intel_lvds->pfit_control || | 381 | if (pfit_control != intel_lvds->pfit_control || |
382 | pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) { | 382 | pfit_pgm_ratios != intel_lvds->pfit_pgm_ratios) { |
383 | intel_lvds->pfit_control = pfit_control; | 383 | intel_lvds->pfit_control = pfit_control; |
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c index 6218fa97aa1e..445f27efe677 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.c +++ b/drivers/gpu/drm/i915/intel_ringbuffer.c | |||
@@ -1059,22 +1059,25 @@ static void gen6_bsd_ring_write_tail(struct intel_ring_buffer *ring, | |||
1059 | } | 1059 | } |
1060 | 1060 | ||
1061 | static int gen6_ring_flush(struct intel_ring_buffer *ring, | 1061 | static int gen6_ring_flush(struct intel_ring_buffer *ring, |
1062 | u32 invalidate_domains, | 1062 | u32 invalidate, u32 flush) |
1063 | u32 flush_domains) | ||
1064 | { | 1063 | { |
1064 | uint32_t cmd; | ||
1065 | int ret; | 1065 | int ret; |
1066 | 1066 | ||
1067 | if ((flush_domains & I915_GEM_DOMAIN_RENDER) == 0) | 1067 | if (((invalidate | flush) & I915_GEM_GPU_DOMAINS) == 0) |
1068 | return 0; | 1068 | return 0; |
1069 | 1069 | ||
1070 | ret = intel_ring_begin(ring, 4); | 1070 | ret = intel_ring_begin(ring, 4); |
1071 | if (ret) | 1071 | if (ret) |
1072 | return ret; | 1072 | return ret; |
1073 | 1073 | ||
1074 | intel_ring_emit(ring, MI_FLUSH_DW); | 1074 | cmd = MI_FLUSH_DW; |
1075 | intel_ring_emit(ring, 0); | 1075 | if (invalidate & I915_GEM_GPU_DOMAINS) |
1076 | cmd |= MI_INVALIDATE_TLB | MI_INVALIDATE_BSD; | ||
1077 | intel_ring_emit(ring, cmd); | ||
1076 | intel_ring_emit(ring, 0); | 1078 | intel_ring_emit(ring, 0); |
1077 | intel_ring_emit(ring, 0); | 1079 | intel_ring_emit(ring, 0); |
1080 | intel_ring_emit(ring, MI_NOOP); | ||
1078 | intel_ring_advance(ring); | 1081 | intel_ring_advance(ring); |
1079 | return 0; | 1082 | return 0; |
1080 | } | 1083 | } |
@@ -1230,22 +1233,25 @@ static int blt_ring_begin(struct intel_ring_buffer *ring, | |||
1230 | } | 1233 | } |
1231 | 1234 | ||
1232 | static int blt_ring_flush(struct intel_ring_buffer *ring, | 1235 | static int blt_ring_flush(struct intel_ring_buffer *ring, |
1233 | u32 invalidate_domains, | 1236 | u32 invalidate, u32 flush) |
1234 | u32 flush_domains) | ||
1235 | { | 1237 | { |
1238 | uint32_t cmd; | ||
1236 | int ret; | 1239 | int ret; |
1237 | 1240 | ||
1238 | if ((flush_domains & I915_GEM_DOMAIN_RENDER) == 0) | 1241 | if (((invalidate | flush) & I915_GEM_DOMAIN_RENDER) == 0) |
1239 | return 0; | 1242 | return 0; |
1240 | 1243 | ||
1241 | ret = blt_ring_begin(ring, 4); | 1244 | ret = blt_ring_begin(ring, 4); |
1242 | if (ret) | 1245 | if (ret) |
1243 | return ret; | 1246 | return ret; |
1244 | 1247 | ||
1245 | intel_ring_emit(ring, MI_FLUSH_DW); | 1248 | cmd = MI_FLUSH_DW; |
1246 | intel_ring_emit(ring, 0); | 1249 | if (invalidate & I915_GEM_DOMAIN_RENDER) |
1250 | cmd |= MI_INVALIDATE_TLB; | ||
1251 | intel_ring_emit(ring, cmd); | ||
1247 | intel_ring_emit(ring, 0); | 1252 | intel_ring_emit(ring, 0); |
1248 | intel_ring_emit(ring, 0); | 1253 | intel_ring_emit(ring, 0); |
1254 | intel_ring_emit(ring, MI_NOOP); | ||
1249 | intel_ring_advance(ring); | 1255 | intel_ring_advance(ring); |
1250 | return 0; | 1256 | return 0; |
1251 | } | 1257 | } |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 6a09c1413d60..7c50cdce84f0 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -46,6 +46,7 @@ | |||
46 | SDVO_TV_MASK) | 46 | SDVO_TV_MASK) |
47 | 47 | ||
48 | #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) | 48 | #define IS_TV(c) (c->output_flag & SDVO_TV_MASK) |
49 | #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK) | ||
49 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) | 50 | #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK) |
50 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) | 51 | #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK)) |
51 | 52 | ||
@@ -1359,7 +1360,8 @@ intel_sdvo_hdmi_sink_detect(struct drm_connector *connector) | |||
1359 | intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); | 1360 | intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid); |
1360 | intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); | 1361 | intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid); |
1361 | } | 1362 | } |
1362 | } | 1363 | } else |
1364 | status = connector_status_disconnected; | ||
1363 | connector->display_info.raw_edid = NULL; | 1365 | connector->display_info.raw_edid = NULL; |
1364 | kfree(edid); | 1366 | kfree(edid); |
1365 | } | 1367 | } |
@@ -1407,10 +1409,25 @@ intel_sdvo_detect(struct drm_connector *connector, bool force) | |||
1407 | 1409 | ||
1408 | if ((intel_sdvo_connector->output_flag & response) == 0) | 1410 | if ((intel_sdvo_connector->output_flag & response) == 0) |
1409 | ret = connector_status_disconnected; | 1411 | ret = connector_status_disconnected; |
1410 | else if (response & SDVO_TMDS_MASK) | 1412 | else if (IS_TMDS(intel_sdvo_connector)) |
1411 | ret = intel_sdvo_hdmi_sink_detect(connector); | 1413 | ret = intel_sdvo_hdmi_sink_detect(connector); |
1412 | else | 1414 | else { |
1413 | ret = connector_status_connected; | 1415 | struct edid *edid; |
1416 | |||
1417 | /* if we have an edid check it matches the connection */ | ||
1418 | edid = intel_sdvo_get_edid(connector); | ||
1419 | if (edid == NULL) | ||
1420 | edid = intel_sdvo_get_analog_edid(connector); | ||
1421 | if (edid != NULL) { | ||
1422 | if (edid->input & DRM_EDID_INPUT_DIGITAL) | ||
1423 | ret = connector_status_disconnected; | ||
1424 | else | ||
1425 | ret = connector_status_connected; | ||
1426 | connector->display_info.raw_edid = NULL; | ||
1427 | kfree(edid); | ||
1428 | } else | ||
1429 | ret = connector_status_connected; | ||
1430 | } | ||
1414 | 1431 | ||
1415 | /* May update encoder flag for like clock for SDVO TV, etc.*/ | 1432 | /* May update encoder flag for like clock for SDVO TV, etc.*/ |
1416 | if (ret == connector_status_connected) { | 1433 | if (ret == connector_status_connected) { |
@@ -1446,10 +1463,15 @@ static void intel_sdvo_get_ddc_modes(struct drm_connector *connector) | |||
1446 | edid = intel_sdvo_get_analog_edid(connector); | 1463 | edid = intel_sdvo_get_analog_edid(connector); |
1447 | 1464 | ||
1448 | if (edid != NULL) { | 1465 | if (edid != NULL) { |
1449 | if (edid->input & DRM_EDID_INPUT_DIGITAL) { | 1466 | struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector); |
1467 | bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL); | ||
1468 | bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector); | ||
1469 | |||
1470 | if (connector_is_digital == monitor_is_digital) { | ||
1450 | drm_mode_connector_update_edid_property(connector, edid); | 1471 | drm_mode_connector_update_edid_property(connector, edid); |
1451 | drm_add_edid_modes(connector, edid); | 1472 | drm_add_edid_modes(connector, edid); |
1452 | } | 1473 | } |
1474 | |||
1453 | connector->display_info.raw_edid = NULL; | 1475 | connector->display_info.raw_edid = NULL; |
1454 | kfree(edid); | 1476 | kfree(edid); |
1455 | } | 1477 | } |
@@ -1668,6 +1690,22 @@ static void intel_sdvo_destroy(struct drm_connector *connector) | |||
1668 | kfree(connector); | 1690 | kfree(connector); |
1669 | } | 1691 | } |
1670 | 1692 | ||
1693 | static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector) | ||
1694 | { | ||
1695 | struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector); | ||
1696 | struct edid *edid; | ||
1697 | bool has_audio = false; | ||
1698 | |||
1699 | if (!intel_sdvo->is_hdmi) | ||
1700 | return false; | ||
1701 | |||
1702 | edid = intel_sdvo_get_edid(connector); | ||
1703 | if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL) | ||
1704 | has_audio = drm_detect_monitor_audio(edid); | ||
1705 | |||
1706 | return has_audio; | ||
1707 | } | ||
1708 | |||
1671 | static int | 1709 | static int |
1672 | intel_sdvo_set_property(struct drm_connector *connector, | 1710 | intel_sdvo_set_property(struct drm_connector *connector, |
1673 | struct drm_property *property, | 1711 | struct drm_property *property, |
@@ -1684,17 +1722,23 @@ intel_sdvo_set_property(struct drm_connector *connector, | |||
1684 | return ret; | 1722 | return ret; |
1685 | 1723 | ||
1686 | if (property == intel_sdvo_connector->force_audio_property) { | 1724 | if (property == intel_sdvo_connector->force_audio_property) { |
1687 | if (val == intel_sdvo_connector->force_audio) | 1725 | int i = val; |
1726 | bool has_audio; | ||
1727 | |||
1728 | if (i == intel_sdvo_connector->force_audio) | ||
1688 | return 0; | 1729 | return 0; |
1689 | 1730 | ||
1690 | intel_sdvo_connector->force_audio = val; | 1731 | intel_sdvo_connector->force_audio = i; |
1691 | 1732 | ||
1692 | if (val > 0 && intel_sdvo->has_hdmi_audio) | 1733 | if (i == 0) |
1693 | return 0; | 1734 | has_audio = intel_sdvo_detect_hdmi_audio(connector); |
1694 | if (val < 0 && !intel_sdvo->has_hdmi_audio) | 1735 | else |
1736 | has_audio = i > 0; | ||
1737 | |||
1738 | if (has_audio == intel_sdvo->has_hdmi_audio) | ||
1695 | return 0; | 1739 | return 0; |
1696 | 1740 | ||
1697 | intel_sdvo->has_hdmi_audio = val > 0; | 1741 | intel_sdvo->has_hdmi_audio = has_audio; |
1698 | goto done; | 1742 | goto done; |
1699 | } | 1743 | } |
1700 | 1744 | ||
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 93206e4eaa6f..fe4a53a50b83 100644 --- a/drivers/gpu/drm/i915/intel_tv.c +++ b/drivers/gpu/drm/i915/intel_tv.c | |||
@@ -1234,7 +1234,8 @@ static const struct drm_display_mode reported_modes[] = { | |||
1234 | * \return false if TV is disconnected. | 1234 | * \return false if TV is disconnected. |
1235 | */ | 1235 | */ |
1236 | static int | 1236 | static int |
1237 | intel_tv_detect_type (struct intel_tv *intel_tv) | 1237 | intel_tv_detect_type (struct intel_tv *intel_tv, |
1238 | struct drm_connector *connector) | ||
1238 | { | 1239 | { |
1239 | struct drm_encoder *encoder = &intel_tv->base.base; | 1240 | struct drm_encoder *encoder = &intel_tv->base.base; |
1240 | struct drm_device *dev = encoder->dev; | 1241 | struct drm_device *dev = encoder->dev; |
@@ -1245,11 +1246,13 @@ intel_tv_detect_type (struct intel_tv *intel_tv) | |||
1245 | int type; | 1246 | int type; |
1246 | 1247 | ||
1247 | /* Disable TV interrupts around load detect or we'll recurse */ | 1248 | /* Disable TV interrupts around load detect or we'll recurse */ |
1248 | spin_lock_irqsave(&dev_priv->irq_lock, irqflags); | 1249 | if (connector->polled & DRM_CONNECTOR_POLL_HPD) { |
1249 | i915_disable_pipestat(dev_priv, 0, | 1250 | spin_lock_irqsave(&dev_priv->irq_lock, irqflags); |
1250 | PIPE_HOTPLUG_INTERRUPT_ENABLE | | 1251 | i915_disable_pipestat(dev_priv, 0, |
1251 | PIPE_HOTPLUG_TV_INTERRUPT_ENABLE); | 1252 | PIPE_HOTPLUG_INTERRUPT_ENABLE | |
1252 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | 1253 | PIPE_HOTPLUG_TV_INTERRUPT_ENABLE); |
1254 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | ||
1255 | } | ||
1253 | 1256 | ||
1254 | save_tv_dac = tv_dac = I915_READ(TV_DAC); | 1257 | save_tv_dac = tv_dac = I915_READ(TV_DAC); |
1255 | save_tv_ctl = tv_ctl = I915_READ(TV_CTL); | 1258 | save_tv_ctl = tv_ctl = I915_READ(TV_CTL); |
@@ -1302,11 +1305,13 @@ intel_tv_detect_type (struct intel_tv *intel_tv) | |||
1302 | I915_WRITE(TV_CTL, save_tv_ctl); | 1305 | I915_WRITE(TV_CTL, save_tv_ctl); |
1303 | 1306 | ||
1304 | /* Restore interrupt config */ | 1307 | /* Restore interrupt config */ |
1305 | spin_lock_irqsave(&dev_priv->irq_lock, irqflags); | 1308 | if (connector->polled & DRM_CONNECTOR_POLL_HPD) { |
1306 | i915_enable_pipestat(dev_priv, 0, | 1309 | spin_lock_irqsave(&dev_priv->irq_lock, irqflags); |
1307 | PIPE_HOTPLUG_INTERRUPT_ENABLE | | 1310 | i915_enable_pipestat(dev_priv, 0, |
1308 | PIPE_HOTPLUG_TV_INTERRUPT_ENABLE); | 1311 | PIPE_HOTPLUG_INTERRUPT_ENABLE | |
1309 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | 1312 | PIPE_HOTPLUG_TV_INTERRUPT_ENABLE); |
1313 | spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags); | ||
1314 | } | ||
1310 | 1315 | ||
1311 | return type; | 1316 | return type; |
1312 | } | 1317 | } |
@@ -1356,7 +1361,7 @@ intel_tv_detect(struct drm_connector *connector, bool force) | |||
1356 | drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V); | 1361 | drm_mode_set_crtcinfo(&mode, CRTC_INTERLACE_HALVE_V); |
1357 | 1362 | ||
1358 | if (intel_tv->base.base.crtc && intel_tv->base.base.crtc->enabled) { | 1363 | if (intel_tv->base.base.crtc && intel_tv->base.base.crtc->enabled) { |
1359 | type = intel_tv_detect_type(intel_tv); | 1364 | type = intel_tv_detect_type(intel_tv, connector); |
1360 | } else if (force) { | 1365 | } else if (force) { |
1361 | struct drm_crtc *crtc; | 1366 | struct drm_crtc *crtc; |
1362 | int dpms_mode; | 1367 | int dpms_mode; |
@@ -1364,7 +1369,7 @@ intel_tv_detect(struct drm_connector *connector, bool force) | |||
1364 | crtc = intel_get_load_detect_pipe(&intel_tv->base, connector, | 1369 | crtc = intel_get_load_detect_pipe(&intel_tv->base, connector, |
1365 | &mode, &dpms_mode); | 1370 | &mode, &dpms_mode); |
1366 | if (crtc) { | 1371 | if (crtc) { |
1367 | type = intel_tv_detect_type(intel_tv); | 1372 | type = intel_tv_detect_type(intel_tv, connector); |
1368 | intel_release_load_detect_pipe(&intel_tv->base, connector, | 1373 | intel_release_load_detect_pipe(&intel_tv->base, connector, |
1369 | dpms_mode); | 1374 | dpms_mode); |
1370 | } else | 1375 | } else |
@@ -1658,6 +1663,18 @@ intel_tv_init(struct drm_device *dev) | |||
1658 | intel_encoder = &intel_tv->base; | 1663 | intel_encoder = &intel_tv->base; |
1659 | connector = &intel_connector->base; | 1664 | connector = &intel_connector->base; |
1660 | 1665 | ||
1666 | /* The documentation, for the older chipsets at least, recommend | ||
1667 | * using a polling method rather than hotplug detection for TVs. | ||
1668 | * This is because in order to perform the hotplug detection, the PLLs | ||
1669 | * for the TV must be kept alive increasing power drain and starving | ||
1670 | * bandwidth from other encoders. Notably for instance, it causes | ||
1671 | * pipe underruns on Crestline when this encoder is supposedly idle. | ||
1672 | * | ||
1673 | * More recent chipsets favour HDMI rather than integrated S-Video. | ||
1674 | */ | ||
1675 | connector->polled = | ||
1676 | DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT; | ||
1677 | |||
1661 | drm_connector_init(dev, connector, &intel_tv_connector_funcs, | 1678 | drm_connector_init(dev, connector, &intel_tv_connector_funcs, |
1662 | DRM_MODE_CONNECTOR_SVIDEO); | 1679 | DRM_MODE_CONNECTOR_SVIDEO); |
1663 | 1680 | ||
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index b1537000a104..095bc507fb16 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -48,29 +48,29 @@ static void atombios_overscan_setup(struct drm_crtc *crtc, | |||
48 | 48 | ||
49 | switch (radeon_crtc->rmx_type) { | 49 | switch (radeon_crtc->rmx_type) { |
50 | case RMX_CENTER: | 50 | case RMX_CENTER: |
51 | args.usOverscanTop = (adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2; | 51 | args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); |
52 | args.usOverscanBottom = (adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2; | 52 | args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); |
53 | args.usOverscanLeft = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2; | 53 | args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); |
54 | args.usOverscanRight = (adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2; | 54 | args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); |
55 | break; | 55 | break; |
56 | case RMX_ASPECT: | 56 | case RMX_ASPECT: |
57 | a1 = mode->crtc_vdisplay * adjusted_mode->crtc_hdisplay; | 57 | a1 = mode->crtc_vdisplay * adjusted_mode->crtc_hdisplay; |
58 | a2 = adjusted_mode->crtc_vdisplay * mode->crtc_hdisplay; | 58 | a2 = adjusted_mode->crtc_vdisplay * mode->crtc_hdisplay; |
59 | 59 | ||
60 | if (a1 > a2) { | 60 | if (a1 > a2) { |
61 | args.usOverscanLeft = (adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2; | 61 | args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2); |
62 | args.usOverscanRight = (adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2; | 62 | args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - (a2 / mode->crtc_vdisplay)) / 2); |
63 | } else if (a2 > a1) { | 63 | } else if (a2 > a1) { |
64 | args.usOverscanLeft = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2; | 64 | args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2); |
65 | args.usOverscanRight = (adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2; | 65 | args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_vdisplay - (a1 / mode->crtc_hdisplay)) / 2); |
66 | } | 66 | } |
67 | break; | 67 | break; |
68 | case RMX_FULL: | 68 | case RMX_FULL: |
69 | default: | 69 | default: |
70 | args.usOverscanRight = radeon_crtc->h_border; | 70 | args.usOverscanRight = cpu_to_le16(radeon_crtc->h_border); |
71 | args.usOverscanLeft = radeon_crtc->h_border; | 71 | args.usOverscanLeft = cpu_to_le16(radeon_crtc->h_border); |
72 | args.usOverscanBottom = radeon_crtc->v_border; | 72 | args.usOverscanBottom = cpu_to_le16(radeon_crtc->v_border); |
73 | args.usOverscanTop = radeon_crtc->v_border; | 73 | args.usOverscanTop = cpu_to_le16(radeon_crtc->v_border); |
74 | break; | 74 | break; |
75 | } | 75 | } |
76 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 76 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
@@ -419,23 +419,23 @@ static void atombios_crtc_program_ss(struct drm_crtc *crtc, | |||
419 | memset(&args, 0, sizeof(args)); | 419 | memset(&args, 0, sizeof(args)); |
420 | 420 | ||
421 | if (ASIC_IS_DCE5(rdev)) { | 421 | if (ASIC_IS_DCE5(rdev)) { |
422 | args.v3.usSpreadSpectrumAmountFrac = 0; | 422 | args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0); |
423 | args.v3.ucSpreadSpectrumType = ss->type; | 423 | args.v3.ucSpreadSpectrumType = ss->type; |
424 | switch (pll_id) { | 424 | switch (pll_id) { |
425 | case ATOM_PPLL1: | 425 | case ATOM_PPLL1: |
426 | args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL; | 426 | args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL; |
427 | args.v3.usSpreadSpectrumAmount = ss->amount; | 427 | args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); |
428 | args.v3.usSpreadSpectrumStep = ss->step; | 428 | args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); |
429 | break; | 429 | break; |
430 | case ATOM_PPLL2: | 430 | case ATOM_PPLL2: |
431 | args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL; | 431 | args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL; |
432 | args.v3.usSpreadSpectrumAmount = ss->amount; | 432 | args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); |
433 | args.v3.usSpreadSpectrumStep = ss->step; | 433 | args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); |
434 | break; | 434 | break; |
435 | case ATOM_DCPLL: | 435 | case ATOM_DCPLL: |
436 | args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL; | 436 | args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL; |
437 | args.v3.usSpreadSpectrumAmount = 0; | 437 | args.v3.usSpreadSpectrumAmount = cpu_to_le16(0); |
438 | args.v3.usSpreadSpectrumStep = 0; | 438 | args.v3.usSpreadSpectrumStep = cpu_to_le16(0); |
439 | break; | 439 | break; |
440 | case ATOM_PPLL_INVALID: | 440 | case ATOM_PPLL_INVALID: |
441 | return; | 441 | return; |
@@ -447,18 +447,18 @@ static void atombios_crtc_program_ss(struct drm_crtc *crtc, | |||
447 | switch (pll_id) { | 447 | switch (pll_id) { |
448 | case ATOM_PPLL1: | 448 | case ATOM_PPLL1: |
449 | args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_P1PLL; | 449 | args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_P1PLL; |
450 | args.v2.usSpreadSpectrumAmount = ss->amount; | 450 | args.v2.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); |
451 | args.v2.usSpreadSpectrumStep = ss->step; | 451 | args.v2.usSpreadSpectrumStep = cpu_to_le16(ss->step); |
452 | break; | 452 | break; |
453 | case ATOM_PPLL2: | 453 | case ATOM_PPLL2: |
454 | args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_P2PLL; | 454 | args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_P2PLL; |
455 | args.v2.usSpreadSpectrumAmount = ss->amount; | 455 | args.v2.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); |
456 | args.v2.usSpreadSpectrumStep = ss->step; | 456 | args.v2.usSpreadSpectrumStep = cpu_to_le16(ss->step); |
457 | break; | 457 | break; |
458 | case ATOM_DCPLL: | 458 | case ATOM_DCPLL: |
459 | args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_DCPLL; | 459 | args.v2.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V2_DCPLL; |
460 | args.v2.usSpreadSpectrumAmount = 0; | 460 | args.v2.usSpreadSpectrumAmount = cpu_to_le16(0); |
461 | args.v2.usSpreadSpectrumStep = 0; | 461 | args.v2.usSpreadSpectrumStep = cpu_to_le16(0); |
462 | break; | 462 | break; |
463 | case ATOM_PPLL_INVALID: | 463 | case ATOM_PPLL_INVALID: |
464 | return; | 464 | return; |
@@ -538,7 +538,6 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
538 | pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; | 538 | pll->flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; |
539 | else | 539 | else |
540 | pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV; | 540 | pll->flags |= RADEON_PLL_PREFER_LOW_REF_DIV; |
541 | |||
542 | } | 541 | } |
543 | 542 | ||
544 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 543 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
@@ -555,29 +554,28 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
555 | dp_clock = dig_connector->dp_clock; | 554 | dp_clock = dig_connector->dp_clock; |
556 | } | 555 | } |
557 | } | 556 | } |
558 | /* this might work properly with the new pll algo */ | 557 | |
559 | #if 0 /* doesn't work properly on some laptops */ | ||
560 | /* use recommended ref_div for ss */ | 558 | /* use recommended ref_div for ss */ |
561 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 559 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
560 | pll->flags |= RADEON_PLL_PREFER_MINM_OVER_MAXP; | ||
562 | if (ss_enabled) { | 561 | if (ss_enabled) { |
563 | if (ss->refdiv) { | 562 | if (ss->refdiv) { |
564 | pll->flags |= RADEON_PLL_USE_REF_DIV; | 563 | pll->flags |= RADEON_PLL_USE_REF_DIV; |
565 | pll->reference_div = ss->refdiv; | 564 | pll->reference_div = ss->refdiv; |
565 | if (ASIC_IS_AVIVO(rdev)) | ||
566 | pll->flags |= RADEON_PLL_USE_FRAC_FB_DIV; | ||
566 | } | 567 | } |
567 | } | 568 | } |
568 | } | 569 | } |
569 | #endif | 570 | |
570 | if (ASIC_IS_AVIVO(rdev)) { | 571 | if (ASIC_IS_AVIVO(rdev)) { |
571 | /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ | 572 | /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ |
572 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) | 573 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) |
573 | adjusted_clock = mode->clock * 2; | 574 | adjusted_clock = mode->clock * 2; |
574 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) | 575 | if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) |
575 | pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER; | 576 | pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER; |
576 | /* rv515 needs more testing with this option */ | 577 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) |
577 | if (rdev->family != CHIP_RV515) { | 578 | pll->flags |= RADEON_PLL_IS_LCD; |
578 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) | ||
579 | pll->flags |= RADEON_PLL_IS_LCD; | ||
580 | } | ||
581 | } else { | 579 | } else { |
582 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) | 580 | if (encoder->encoder_type != DRM_MODE_ENCODER_DAC) |
583 | pll->flags |= RADEON_PLL_NO_ODD_POST_DIV; | 581 | pll->flags |= RADEON_PLL_NO_ODD_POST_DIV; |
@@ -721,14 +719,14 @@ static void atombios_crtc_set_dcpll(struct drm_crtc *crtc, | |||
721 | * SetPixelClock provides the dividers | 719 | * SetPixelClock provides the dividers |
722 | */ | 720 | */ |
723 | args.v5.ucCRTC = ATOM_CRTC_INVALID; | 721 | args.v5.ucCRTC = ATOM_CRTC_INVALID; |
724 | args.v5.usPixelClock = dispclk; | 722 | args.v5.usPixelClock = cpu_to_le16(dispclk); |
725 | args.v5.ucPpll = ATOM_DCPLL; | 723 | args.v5.ucPpll = ATOM_DCPLL; |
726 | break; | 724 | break; |
727 | case 6: | 725 | case 6: |
728 | /* if the default dcpll clock is specified, | 726 | /* if the default dcpll clock is specified, |
729 | * SetPixelClock provides the dividers | 727 | * SetPixelClock provides the dividers |
730 | */ | 728 | */ |
731 | args.v6.ulDispEngClkFreq = dispclk; | 729 | args.v6.ulDispEngClkFreq = cpu_to_le32(dispclk); |
732 | args.v6.ucPpll = ATOM_DCPLL; | 730 | args.v6.ucPpll = ATOM_DCPLL; |
733 | break; | 731 | break; |
734 | default: | 732 | default: |
@@ -957,11 +955,7 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode | |||
957 | /* adjust pixel clock as needed */ | 955 | /* adjust pixel clock as needed */ |
958 | adjusted_clock = atombios_adjust_pll(crtc, mode, pll, ss_enabled, &ss); | 956 | adjusted_clock = atombios_adjust_pll(crtc, mode, pll, ss_enabled, &ss); |
959 | 957 | ||
960 | /* rv515 seems happier with the old algo */ | 958 | if (ASIC_IS_AVIVO(rdev)) |
961 | if (rdev->family == CHIP_RV515) | ||
962 | radeon_compute_pll_legacy(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, | ||
963 | &ref_div, &post_div); | ||
964 | else if (ASIC_IS_AVIVO(rdev)) | ||
965 | radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, | 959 | radeon_compute_pll_avivo(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div, |
966 | &ref_div, &post_div); | 960 | &ref_div, &post_div); |
967 | else | 961 | else |
@@ -995,9 +989,9 @@ static void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode | |||
995 | } | 989 | } |
996 | } | 990 | } |
997 | 991 | ||
998 | static int evergreen_crtc_do_set_base(struct drm_crtc *crtc, | 992 | static int dce4_crtc_do_set_base(struct drm_crtc *crtc, |
999 | struct drm_framebuffer *fb, | 993 | struct drm_framebuffer *fb, |
1000 | int x, int y, int atomic) | 994 | int x, int y, int atomic) |
1001 | { | 995 | { |
1002 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); | 996 | struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); |
1003 | struct drm_device *dev = crtc->dev; | 997 | struct drm_device *dev = crtc->dev; |
@@ -1137,12 +1131,6 @@ static int evergreen_crtc_do_set_base(struct drm_crtc *crtc, | |||
1137 | WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset, | 1131 | WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset, |
1138 | (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); | 1132 | (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); |
1139 | 1133 | ||
1140 | if (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) | ||
1141 | WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset, | ||
1142 | EVERGREEN_INTERLEAVE_EN); | ||
1143 | else | ||
1144 | WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset, 0); | ||
1145 | |||
1146 | if (!atomic && fb && fb != crtc->fb) { | 1134 | if (!atomic && fb && fb != crtc->fb) { |
1147 | radeon_fb = to_radeon_framebuffer(fb); | 1135 | radeon_fb = to_radeon_framebuffer(fb); |
1148 | rbo = radeon_fb->obj->driver_private; | 1136 | rbo = radeon_fb->obj->driver_private; |
@@ -1300,12 +1288,6 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc, | |||
1300 | WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset, | 1288 | WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset, |
1301 | (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); | 1289 | (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); |
1302 | 1290 | ||
1303 | if (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE) | ||
1304 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, | ||
1305 | AVIVO_D1MODE_INTERLEAVE_EN); | ||
1306 | else | ||
1307 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, 0); | ||
1308 | |||
1309 | if (!atomic && fb && fb != crtc->fb) { | 1291 | if (!atomic && fb && fb != crtc->fb) { |
1310 | radeon_fb = to_radeon_framebuffer(fb); | 1292 | radeon_fb = to_radeon_framebuffer(fb); |
1311 | rbo = radeon_fb->obj->driver_private; | 1293 | rbo = radeon_fb->obj->driver_private; |
@@ -1329,7 +1311,7 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y, | |||
1329 | struct radeon_device *rdev = dev->dev_private; | 1311 | struct radeon_device *rdev = dev->dev_private; |
1330 | 1312 | ||
1331 | if (ASIC_IS_DCE4(rdev)) | 1313 | if (ASIC_IS_DCE4(rdev)) |
1332 | return evergreen_crtc_do_set_base(crtc, old_fb, x, y, 0); | 1314 | return dce4_crtc_do_set_base(crtc, old_fb, x, y, 0); |
1333 | else if (ASIC_IS_AVIVO(rdev)) | 1315 | else if (ASIC_IS_AVIVO(rdev)) |
1334 | return avivo_crtc_do_set_base(crtc, old_fb, x, y, 0); | 1316 | return avivo_crtc_do_set_base(crtc, old_fb, x, y, 0); |
1335 | else | 1317 | else |
@@ -1344,7 +1326,7 @@ int atombios_crtc_set_base_atomic(struct drm_crtc *crtc, | |||
1344 | struct radeon_device *rdev = dev->dev_private; | 1326 | struct radeon_device *rdev = dev->dev_private; |
1345 | 1327 | ||
1346 | if (ASIC_IS_DCE4(rdev)) | 1328 | if (ASIC_IS_DCE4(rdev)) |
1347 | return evergreen_crtc_do_set_base(crtc, fb, x, y, 1); | 1329 | return dce4_crtc_do_set_base(crtc, fb, x, y, 1); |
1348 | else if (ASIC_IS_AVIVO(rdev)) | 1330 | else if (ASIC_IS_AVIVO(rdev)) |
1349 | return avivo_crtc_do_set_base(crtc, fb, x, y, 1); | 1331 | return avivo_crtc_do_set_base(crtc, fb, x, y, 1); |
1350 | else | 1332 | else |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index ffdc8332b76e..d270b3ff896b 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -1192,7 +1192,11 @@ void evergreen_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) | |||
1192 | radeon_ring_write(rdev, 1); | 1192 | radeon_ring_write(rdev, 1); |
1193 | /* FIXME: implement */ | 1193 | /* FIXME: implement */ |
1194 | radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); | 1194 | radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); |
1195 | radeon_ring_write(rdev, ib->gpu_addr & 0xFFFFFFFC); | 1195 | radeon_ring_write(rdev, |
1196 | #ifdef __BIG_ENDIAN | ||
1197 | (2 << 0) | | ||
1198 | #endif | ||
1199 | (ib->gpu_addr & 0xFFFFFFFC)); | ||
1196 | radeon_ring_write(rdev, upper_32_bits(ib->gpu_addr) & 0xFF); | 1200 | radeon_ring_write(rdev, upper_32_bits(ib->gpu_addr) & 0xFF); |
1197 | radeon_ring_write(rdev, ib->length_dw); | 1201 | radeon_ring_write(rdev, ib->length_dw); |
1198 | } | 1202 | } |
@@ -1207,7 +1211,11 @@ static int evergreen_cp_load_microcode(struct radeon_device *rdev) | |||
1207 | return -EINVAL; | 1211 | return -EINVAL; |
1208 | 1212 | ||
1209 | r700_cp_stop(rdev); | 1213 | r700_cp_stop(rdev); |
1210 | WREG32(CP_RB_CNTL, RB_NO_UPDATE | (15 << 8) | (3 << 0)); | 1214 | WREG32(CP_RB_CNTL, |
1215 | #ifdef __BIG_ENDIAN | ||
1216 | BUF_SWAP_32BIT | | ||
1217 | #endif | ||
1218 | RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); | ||
1211 | 1219 | ||
1212 | fw_data = (const __be32 *)rdev->pfp_fw->data; | 1220 | fw_data = (const __be32 *)rdev->pfp_fw->data; |
1213 | WREG32(CP_PFP_UCODE_ADDR, 0); | 1221 | WREG32(CP_PFP_UCODE_ADDR, 0); |
@@ -1326,7 +1334,11 @@ int evergreen_cp_resume(struct radeon_device *rdev) | |||
1326 | WREG32(CP_RB_WPTR, 0); | 1334 | WREG32(CP_RB_WPTR, 0); |
1327 | 1335 | ||
1328 | /* set the wb address wether it's enabled or not */ | 1336 | /* set the wb address wether it's enabled or not */ |
1329 | WREG32(CP_RB_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC); | 1337 | WREG32(CP_RB_RPTR_ADDR, |
1338 | #ifdef __BIG_ENDIAN | ||
1339 | RB_RPTR_SWAP(2) | | ||
1340 | #endif | ||
1341 | ((rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC)); | ||
1330 | WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); | 1342 | WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); |
1331 | WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); | 1343 | WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); |
1332 | 1344 | ||
@@ -2627,8 +2639,8 @@ restart_ih: | |||
2627 | while (rptr != wptr) { | 2639 | while (rptr != wptr) { |
2628 | /* wptr/rptr are in bytes! */ | 2640 | /* wptr/rptr are in bytes! */ |
2629 | ring_index = rptr / 4; | 2641 | ring_index = rptr / 4; |
2630 | src_id = rdev->ih.ring[ring_index] & 0xff; | 2642 | src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff; |
2631 | src_data = rdev->ih.ring[ring_index + 1] & 0xfffffff; | 2643 | src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff; |
2632 | 2644 | ||
2633 | switch (src_id) { | 2645 | switch (src_id) { |
2634 | case 1: /* D1 vblank/vline */ | 2646 | case 1: /* D1 vblank/vline */ |
diff --git a/drivers/gpu/drm/radeon/evergreen_blit_kms.c b/drivers/gpu/drm/radeon/evergreen_blit_kms.c index a1ba4b3053d0..2adfb03f479b 100644 --- a/drivers/gpu/drm/radeon/evergreen_blit_kms.c +++ b/drivers/gpu/drm/radeon/evergreen_blit_kms.c | |||
@@ -55,7 +55,7 @@ set_render_target(struct radeon_device *rdev, int format, | |||
55 | if (h < 8) | 55 | if (h < 8) |
56 | h = 8; | 56 | h = 8; |
57 | 57 | ||
58 | cb_color_info = ((format << 2) | (1 << 24)); | 58 | cb_color_info = ((format << 2) | (1 << 24) | (1 << 8)); |
59 | pitch = (w / 8) - 1; | 59 | pitch = (w / 8) - 1; |
60 | slice = ((w * h) / 64) - 1; | 60 | slice = ((w * h) / 64) - 1; |
61 | 61 | ||
@@ -133,6 +133,9 @@ set_vtx_resource(struct radeon_device *rdev, u64 gpu_addr) | |||
133 | 133 | ||
134 | /* high addr, stride */ | 134 | /* high addr, stride */ |
135 | sq_vtx_constant_word2 = ((upper_32_bits(gpu_addr) & 0xff) | (16 << 8)); | 135 | sq_vtx_constant_word2 = ((upper_32_bits(gpu_addr) & 0xff) | (16 << 8)); |
136 | #ifdef __BIG_ENDIAN | ||
137 | sq_vtx_constant_word2 |= (2 << 30); | ||
138 | #endif | ||
136 | /* xyzw swizzles */ | 139 | /* xyzw swizzles */ |
137 | sq_vtx_constant_word3 = (0 << 3) | (1 << 6) | (2 << 9) | (3 << 12); | 140 | sq_vtx_constant_word3 = (0 << 3) | (1 << 6) | (2 << 9) | (3 << 12); |
138 | 141 | ||
@@ -173,7 +176,7 @@ set_tex_resource(struct radeon_device *rdev, | |||
173 | sq_tex_resource_word0 = (1 << 0); /* 2D */ | 176 | sq_tex_resource_word0 = (1 << 0); /* 2D */ |
174 | sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 6) | | 177 | sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 6) | |
175 | ((w - 1) << 18)); | 178 | ((w - 1) << 18)); |
176 | sq_tex_resource_word1 = ((h - 1) << 0); | 179 | sq_tex_resource_word1 = ((h - 1) << 0) | (1 << 28); |
177 | /* xyzw swizzles */ | 180 | /* xyzw swizzles */ |
178 | sq_tex_resource_word4 = (0 << 16) | (1 << 19) | (2 << 22) | (3 << 25); | 181 | sq_tex_resource_word4 = (0 << 16) | (1 << 19) | (2 << 22) | (3 << 25); |
179 | 182 | ||
@@ -221,7 +224,11 @@ draw_auto(struct radeon_device *rdev) | |||
221 | radeon_ring_write(rdev, DI_PT_RECTLIST); | 224 | radeon_ring_write(rdev, DI_PT_RECTLIST); |
222 | 225 | ||
223 | radeon_ring_write(rdev, PACKET3(PACKET3_INDEX_TYPE, 0)); | 226 | radeon_ring_write(rdev, PACKET3(PACKET3_INDEX_TYPE, 0)); |
224 | radeon_ring_write(rdev, DI_INDEX_SIZE_16_BIT); | 227 | radeon_ring_write(rdev, |
228 | #ifdef __BIG_ENDIAN | ||
229 | (2 << 2) | | ||
230 | #endif | ||
231 | DI_INDEX_SIZE_16_BIT); | ||
225 | 232 | ||
226 | radeon_ring_write(rdev, PACKET3(PACKET3_NUM_INSTANCES, 0)); | 233 | radeon_ring_write(rdev, PACKET3(PACKET3_NUM_INSTANCES, 0)); |
227 | radeon_ring_write(rdev, 1); | 234 | radeon_ring_write(rdev, 1); |
@@ -541,7 +548,7 @@ static inline uint32_t i2f(uint32_t input) | |||
541 | int evergreen_blit_init(struct radeon_device *rdev) | 548 | int evergreen_blit_init(struct radeon_device *rdev) |
542 | { | 549 | { |
543 | u32 obj_size; | 550 | u32 obj_size; |
544 | int r, dwords; | 551 | int i, r, dwords; |
545 | void *ptr; | 552 | void *ptr; |
546 | u32 packet2s[16]; | 553 | u32 packet2s[16]; |
547 | int num_packet2s = 0; | 554 | int num_packet2s = 0; |
@@ -557,7 +564,7 @@ int evergreen_blit_init(struct radeon_device *rdev) | |||
557 | 564 | ||
558 | dwords = rdev->r600_blit.state_len; | 565 | dwords = rdev->r600_blit.state_len; |
559 | while (dwords & 0xf) { | 566 | while (dwords & 0xf) { |
560 | packet2s[num_packet2s++] = PACKET2(0); | 567 | packet2s[num_packet2s++] = cpu_to_le32(PACKET2(0)); |
561 | dwords++; | 568 | dwords++; |
562 | } | 569 | } |
563 | 570 | ||
@@ -598,8 +605,10 @@ int evergreen_blit_init(struct radeon_device *rdev) | |||
598 | if (num_packet2s) | 605 | if (num_packet2s) |
599 | memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4), | 606 | memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4), |
600 | packet2s, num_packet2s * 4); | 607 | packet2s, num_packet2s * 4); |
601 | memcpy(ptr + rdev->r600_blit.vs_offset, evergreen_vs, evergreen_vs_size * 4); | 608 | for (i = 0; i < evergreen_vs_size; i++) |
602 | memcpy(ptr + rdev->r600_blit.ps_offset, evergreen_ps, evergreen_ps_size * 4); | 609 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.vs_offset + i * 4) = cpu_to_le32(evergreen_vs[i]); |
610 | for (i = 0; i < evergreen_ps_size; i++) | ||
611 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.ps_offset + i * 4) = cpu_to_le32(evergreen_ps[i]); | ||
603 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); | 612 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); |
604 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | 613 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
605 | 614 | ||
diff --git a/drivers/gpu/drm/radeon/evergreen_blit_shaders.c b/drivers/gpu/drm/radeon/evergreen_blit_shaders.c index ef1d28c07fbf..3a10399e0066 100644 --- a/drivers/gpu/drm/radeon/evergreen_blit_shaders.c +++ b/drivers/gpu/drm/radeon/evergreen_blit_shaders.c | |||
@@ -311,11 +311,19 @@ const u32 evergreen_vs[] = | |||
311 | 0x00000000, | 311 | 0x00000000, |
312 | 0x3c000000, | 312 | 0x3c000000, |
313 | 0x67961001, | 313 | 0x67961001, |
314 | #ifdef __BIG_ENDIAN | ||
315 | 0x000a0000, | ||
316 | #else | ||
314 | 0x00080000, | 317 | 0x00080000, |
318 | #endif | ||
315 | 0x00000000, | 319 | 0x00000000, |
316 | 0x1c000000, | 320 | 0x1c000000, |
317 | 0x67961000, | 321 | 0x67961000, |
322 | #ifdef __BIG_ENDIAN | ||
323 | 0x00020008, | ||
324 | #else | ||
318 | 0x00000008, | 325 | 0x00000008, |
326 | #endif | ||
319 | 0x00000000, | 327 | 0x00000000, |
320 | }; | 328 | }; |
321 | 329 | ||
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index afec1aca2a73..eb4acf4528ff 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
@@ -98,6 +98,7 @@ | |||
98 | #define BUF_SWAP_32BIT (2 << 16) | 98 | #define BUF_SWAP_32BIT (2 << 16) |
99 | #define CP_RB_RPTR 0x8700 | 99 | #define CP_RB_RPTR 0x8700 |
100 | #define CP_RB_RPTR_ADDR 0xC10C | 100 | #define CP_RB_RPTR_ADDR 0xC10C |
101 | #define RB_RPTR_SWAP(x) ((x) << 0) | ||
101 | #define CP_RB_RPTR_ADDR_HI 0xC110 | 102 | #define CP_RB_RPTR_ADDR_HI 0xC110 |
102 | #define CP_RB_RPTR_WR 0xC108 | 103 | #define CP_RB_RPTR_WR 0xC108 |
103 | #define CP_RB_WPTR 0xC114 | 104 | #define CP_RB_WPTR 0xC114 |
diff --git a/drivers/gpu/drm/radeon/mkregtable.c b/drivers/gpu/drm/radeon/mkregtable.c index 607241c6a8a9..5a82b6b75849 100644 --- a/drivers/gpu/drm/radeon/mkregtable.c +++ b/drivers/gpu/drm/radeon/mkregtable.c | |||
@@ -673,8 +673,10 @@ static int parser_auth(struct table *t, const char *filename) | |||
673 | last_reg = strtol(last_reg_s, NULL, 16); | 673 | last_reg = strtol(last_reg_s, NULL, 16); |
674 | 674 | ||
675 | do { | 675 | do { |
676 | if (fgets(buf, 1024, file) == NULL) | 676 | if (fgets(buf, 1024, file) == NULL) { |
677 | fclose(file); | ||
677 | return -1; | 678 | return -1; |
679 | } | ||
678 | len = strlen(buf); | 680 | len = strlen(buf); |
679 | if (ftell(file) == end) | 681 | if (ftell(file) == end) |
680 | done = 1; | 682 | done = 1; |
@@ -685,6 +687,7 @@ static int parser_auth(struct table *t, const char *filename) | |||
685 | fprintf(stderr, | 687 | fprintf(stderr, |
686 | "Error matching regular expression %d in %s\n", | 688 | "Error matching regular expression %d in %s\n", |
687 | r, filename); | 689 | r, filename); |
690 | fclose(file); | ||
688 | return -1; | 691 | return -1; |
689 | } else { | 692 | } else { |
690 | buf[match[0].rm_eo] = 0; | 693 | buf[match[0].rm_eo] = 0; |
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 5f15820efe12..56deae5bf02e 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c | |||
@@ -1427,6 +1427,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1427 | } | 1427 | } |
1428 | track->zb.robj = reloc->robj; | 1428 | track->zb.robj = reloc->robj; |
1429 | track->zb.offset = idx_value; | 1429 | track->zb.offset = idx_value; |
1430 | track->zb_dirty = true; | ||
1430 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 1431 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
1431 | break; | 1432 | break; |
1432 | case RADEON_RB3D_COLOROFFSET: | 1433 | case RADEON_RB3D_COLOROFFSET: |
@@ -1439,6 +1440,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1439 | } | 1440 | } |
1440 | track->cb[0].robj = reloc->robj; | 1441 | track->cb[0].robj = reloc->robj; |
1441 | track->cb[0].offset = idx_value; | 1442 | track->cb[0].offset = idx_value; |
1443 | track->cb_dirty = true; | ||
1442 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 1444 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
1443 | break; | 1445 | break; |
1444 | case RADEON_PP_TXOFFSET_0: | 1446 | case RADEON_PP_TXOFFSET_0: |
@@ -1454,6 +1456,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1454 | } | 1456 | } |
1455 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 1457 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
1456 | track->textures[i].robj = reloc->robj; | 1458 | track->textures[i].robj = reloc->robj; |
1459 | track->tex_dirty = true; | ||
1457 | break; | 1460 | break; |
1458 | case RADEON_PP_CUBIC_OFFSET_T0_0: | 1461 | case RADEON_PP_CUBIC_OFFSET_T0_0: |
1459 | case RADEON_PP_CUBIC_OFFSET_T0_1: | 1462 | case RADEON_PP_CUBIC_OFFSET_T0_1: |
@@ -1471,6 +1474,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1471 | track->textures[0].cube_info[i].offset = idx_value; | 1474 | track->textures[0].cube_info[i].offset = idx_value; |
1472 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 1475 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
1473 | track->textures[0].cube_info[i].robj = reloc->robj; | 1476 | track->textures[0].cube_info[i].robj = reloc->robj; |
1477 | track->tex_dirty = true; | ||
1474 | break; | 1478 | break; |
1475 | case RADEON_PP_CUBIC_OFFSET_T1_0: | 1479 | case RADEON_PP_CUBIC_OFFSET_T1_0: |
1476 | case RADEON_PP_CUBIC_OFFSET_T1_1: | 1480 | case RADEON_PP_CUBIC_OFFSET_T1_1: |
@@ -1488,6 +1492,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1488 | track->textures[1].cube_info[i].offset = idx_value; | 1492 | track->textures[1].cube_info[i].offset = idx_value; |
1489 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 1493 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
1490 | track->textures[1].cube_info[i].robj = reloc->robj; | 1494 | track->textures[1].cube_info[i].robj = reloc->robj; |
1495 | track->tex_dirty = true; | ||
1491 | break; | 1496 | break; |
1492 | case RADEON_PP_CUBIC_OFFSET_T2_0: | 1497 | case RADEON_PP_CUBIC_OFFSET_T2_0: |
1493 | case RADEON_PP_CUBIC_OFFSET_T2_1: | 1498 | case RADEON_PP_CUBIC_OFFSET_T2_1: |
@@ -1505,9 +1510,12 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1505 | track->textures[2].cube_info[i].offset = idx_value; | 1510 | track->textures[2].cube_info[i].offset = idx_value; |
1506 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 1511 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
1507 | track->textures[2].cube_info[i].robj = reloc->robj; | 1512 | track->textures[2].cube_info[i].robj = reloc->robj; |
1513 | track->tex_dirty = true; | ||
1508 | break; | 1514 | break; |
1509 | case RADEON_RE_WIDTH_HEIGHT: | 1515 | case RADEON_RE_WIDTH_HEIGHT: |
1510 | track->maxy = ((idx_value >> 16) & 0x7FF); | 1516 | track->maxy = ((idx_value >> 16) & 0x7FF); |
1517 | track->cb_dirty = true; | ||
1518 | track->zb_dirty = true; | ||
1511 | break; | 1519 | break; |
1512 | case RADEON_RB3D_COLORPITCH: | 1520 | case RADEON_RB3D_COLORPITCH: |
1513 | r = r100_cs_packet_next_reloc(p, &reloc); | 1521 | r = r100_cs_packet_next_reloc(p, &reloc); |
@@ -1528,9 +1536,11 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1528 | ib[idx] = tmp; | 1536 | ib[idx] = tmp; |
1529 | 1537 | ||
1530 | track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK; | 1538 | track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK; |
1539 | track->cb_dirty = true; | ||
1531 | break; | 1540 | break; |
1532 | case RADEON_RB3D_DEPTHPITCH: | 1541 | case RADEON_RB3D_DEPTHPITCH: |
1533 | track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK; | 1542 | track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK; |
1543 | track->zb_dirty = true; | ||
1534 | break; | 1544 | break; |
1535 | case RADEON_RB3D_CNTL: | 1545 | case RADEON_RB3D_CNTL: |
1536 | switch ((idx_value >> RADEON_RB3D_COLOR_FORMAT_SHIFT) & 0x1f) { | 1546 | switch ((idx_value >> RADEON_RB3D_COLOR_FORMAT_SHIFT) & 0x1f) { |
@@ -1555,6 +1565,8 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1555 | return -EINVAL; | 1565 | return -EINVAL; |
1556 | } | 1566 | } |
1557 | track->z_enabled = !!(idx_value & RADEON_Z_ENABLE); | 1567 | track->z_enabled = !!(idx_value & RADEON_Z_ENABLE); |
1568 | track->cb_dirty = true; | ||
1569 | track->zb_dirty = true; | ||
1558 | break; | 1570 | break; |
1559 | case RADEON_RB3D_ZSTENCILCNTL: | 1571 | case RADEON_RB3D_ZSTENCILCNTL: |
1560 | switch (idx_value & 0xf) { | 1572 | switch (idx_value & 0xf) { |
@@ -1572,6 +1584,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1572 | default: | 1584 | default: |
1573 | break; | 1585 | break; |
1574 | } | 1586 | } |
1587 | track->zb_dirty = true; | ||
1575 | break; | 1588 | break; |
1576 | case RADEON_RB3D_ZPASS_ADDR: | 1589 | case RADEON_RB3D_ZPASS_ADDR: |
1577 | r = r100_cs_packet_next_reloc(p, &reloc); | 1590 | r = r100_cs_packet_next_reloc(p, &reloc); |
@@ -1588,6 +1601,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1588 | uint32_t temp = idx_value >> 4; | 1601 | uint32_t temp = idx_value >> 4; |
1589 | for (i = 0; i < track->num_texture; i++) | 1602 | for (i = 0; i < track->num_texture; i++) |
1590 | track->textures[i].enabled = !!(temp & (1 << i)); | 1603 | track->textures[i].enabled = !!(temp & (1 << i)); |
1604 | track->tex_dirty = true; | ||
1591 | } | 1605 | } |
1592 | break; | 1606 | break; |
1593 | case RADEON_SE_VF_CNTL: | 1607 | case RADEON_SE_VF_CNTL: |
@@ -1602,12 +1616,14 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1602 | i = (reg - RADEON_PP_TEX_SIZE_0) / 8; | 1616 | i = (reg - RADEON_PP_TEX_SIZE_0) / 8; |
1603 | track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1; | 1617 | track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1; |
1604 | track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1; | 1618 | track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1; |
1619 | track->tex_dirty = true; | ||
1605 | break; | 1620 | break; |
1606 | case RADEON_PP_TEX_PITCH_0: | 1621 | case RADEON_PP_TEX_PITCH_0: |
1607 | case RADEON_PP_TEX_PITCH_1: | 1622 | case RADEON_PP_TEX_PITCH_1: |
1608 | case RADEON_PP_TEX_PITCH_2: | 1623 | case RADEON_PP_TEX_PITCH_2: |
1609 | i = (reg - RADEON_PP_TEX_PITCH_0) / 8; | 1624 | i = (reg - RADEON_PP_TEX_PITCH_0) / 8; |
1610 | track->textures[i].pitch = idx_value + 32; | 1625 | track->textures[i].pitch = idx_value + 32; |
1626 | track->tex_dirty = true; | ||
1611 | break; | 1627 | break; |
1612 | case RADEON_PP_TXFILTER_0: | 1628 | case RADEON_PP_TXFILTER_0: |
1613 | case RADEON_PP_TXFILTER_1: | 1629 | case RADEON_PP_TXFILTER_1: |
@@ -1621,6 +1637,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1621 | tmp = (idx_value >> 27) & 0x7; | 1637 | tmp = (idx_value >> 27) & 0x7; |
1622 | if (tmp == 2 || tmp == 6) | 1638 | if (tmp == 2 || tmp == 6) |
1623 | track->textures[i].roundup_h = false; | 1639 | track->textures[i].roundup_h = false; |
1640 | track->tex_dirty = true; | ||
1624 | break; | 1641 | break; |
1625 | case RADEON_PP_TXFORMAT_0: | 1642 | case RADEON_PP_TXFORMAT_0: |
1626 | case RADEON_PP_TXFORMAT_1: | 1643 | case RADEON_PP_TXFORMAT_1: |
@@ -1673,6 +1690,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1673 | } | 1690 | } |
1674 | track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); | 1691 | track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); |
1675 | track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); | 1692 | track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); |
1693 | track->tex_dirty = true; | ||
1676 | break; | 1694 | break; |
1677 | case RADEON_PP_CUBIC_FACES_0: | 1695 | case RADEON_PP_CUBIC_FACES_0: |
1678 | case RADEON_PP_CUBIC_FACES_1: | 1696 | case RADEON_PP_CUBIC_FACES_1: |
@@ -1683,6 +1701,7 @@ static int r100_packet0_check(struct radeon_cs_parser *p, | |||
1683 | track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf); | 1701 | track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf); |
1684 | track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf); | 1702 | track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf); |
1685 | } | 1703 | } |
1704 | track->tex_dirty = true; | ||
1686 | break; | 1705 | break; |
1687 | default: | 1706 | default: |
1688 | printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", | 1707 | printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", |
@@ -3318,9 +3337,9 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) | |||
3318 | unsigned long size; | 3337 | unsigned long size; |
3319 | unsigned prim_walk; | 3338 | unsigned prim_walk; |
3320 | unsigned nverts; | 3339 | unsigned nverts; |
3321 | unsigned num_cb = track->num_cb; | 3340 | unsigned num_cb = track->cb_dirty ? track->num_cb : 0; |
3322 | 3341 | ||
3323 | if (!track->zb_cb_clear && !track->color_channel_mask && | 3342 | if (num_cb && !track->zb_cb_clear && !track->color_channel_mask && |
3324 | !track->blend_read_enable) | 3343 | !track->blend_read_enable) |
3325 | num_cb = 0; | 3344 | num_cb = 0; |
3326 | 3345 | ||
@@ -3341,7 +3360,9 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) | |||
3341 | return -EINVAL; | 3360 | return -EINVAL; |
3342 | } | 3361 | } |
3343 | } | 3362 | } |
3344 | if (track->z_enabled) { | 3363 | track->cb_dirty = false; |
3364 | |||
3365 | if (track->zb_dirty && track->z_enabled) { | ||
3345 | if (track->zb.robj == NULL) { | 3366 | if (track->zb.robj == NULL) { |
3346 | DRM_ERROR("[drm] No buffer for z buffer !\n"); | 3367 | DRM_ERROR("[drm] No buffer for z buffer !\n"); |
3347 | return -EINVAL; | 3368 | return -EINVAL; |
@@ -3358,6 +3379,28 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) | |||
3358 | return -EINVAL; | 3379 | return -EINVAL; |
3359 | } | 3380 | } |
3360 | } | 3381 | } |
3382 | track->zb_dirty = false; | ||
3383 | |||
3384 | if (track->aa_dirty && track->aaresolve) { | ||
3385 | if (track->aa.robj == NULL) { | ||
3386 | DRM_ERROR("[drm] No buffer for AA resolve buffer %d !\n", i); | ||
3387 | return -EINVAL; | ||
3388 | } | ||
3389 | /* I believe the format comes from colorbuffer0. */ | ||
3390 | size = track->aa.pitch * track->cb[0].cpp * track->maxy; | ||
3391 | size += track->aa.offset; | ||
3392 | if (size > radeon_bo_size(track->aa.robj)) { | ||
3393 | DRM_ERROR("[drm] Buffer too small for AA resolve buffer %d " | ||
3394 | "(need %lu have %lu) !\n", i, size, | ||
3395 | radeon_bo_size(track->aa.robj)); | ||
3396 | DRM_ERROR("[drm] AA resolve buffer %d (%u %u %u %u)\n", | ||
3397 | i, track->aa.pitch, track->cb[0].cpp, | ||
3398 | track->aa.offset, track->maxy); | ||
3399 | return -EINVAL; | ||
3400 | } | ||
3401 | } | ||
3402 | track->aa_dirty = false; | ||
3403 | |||
3361 | prim_walk = (track->vap_vf_cntl >> 4) & 0x3; | 3404 | prim_walk = (track->vap_vf_cntl >> 4) & 0x3; |
3362 | if (track->vap_vf_cntl & (1 << 14)) { | 3405 | if (track->vap_vf_cntl & (1 << 14)) { |
3363 | nverts = track->vap_alt_nverts; | 3406 | nverts = track->vap_alt_nverts; |
@@ -3417,13 +3460,23 @@ int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track) | |||
3417 | prim_walk); | 3460 | prim_walk); |
3418 | return -EINVAL; | 3461 | return -EINVAL; |
3419 | } | 3462 | } |
3420 | return r100_cs_track_texture_check(rdev, track); | 3463 | |
3464 | if (track->tex_dirty) { | ||
3465 | track->tex_dirty = false; | ||
3466 | return r100_cs_track_texture_check(rdev, track); | ||
3467 | } | ||
3468 | return 0; | ||
3421 | } | 3469 | } |
3422 | 3470 | ||
3423 | void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track) | 3471 | void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track) |
3424 | { | 3472 | { |
3425 | unsigned i, face; | 3473 | unsigned i, face; |
3426 | 3474 | ||
3475 | track->cb_dirty = true; | ||
3476 | track->zb_dirty = true; | ||
3477 | track->tex_dirty = true; | ||
3478 | track->aa_dirty = true; | ||
3479 | |||
3427 | if (rdev->family < CHIP_R300) { | 3480 | if (rdev->family < CHIP_R300) { |
3428 | track->num_cb = 1; | 3481 | track->num_cb = 1; |
3429 | if (rdev->family <= CHIP_RS200) | 3482 | if (rdev->family <= CHIP_RS200) |
@@ -3437,6 +3490,8 @@ void r100_cs_track_clear(struct radeon_device *rdev, struct r100_cs_track *track | |||
3437 | track->num_texture = 16; | 3490 | track->num_texture = 16; |
3438 | track->maxy = 4096; | 3491 | track->maxy = 4096; |
3439 | track->separate_cube = 0; | 3492 | track->separate_cube = 0; |
3493 | track->aaresolve = true; | ||
3494 | track->aa.robj = NULL; | ||
3440 | } | 3495 | } |
3441 | 3496 | ||
3442 | for (i = 0; i < track->num_cb; i++) { | 3497 | for (i = 0; i < track->num_cb; i++) { |
diff --git a/drivers/gpu/drm/radeon/r100_track.h b/drivers/gpu/drm/radeon/r100_track.h index af65600e6564..2fef9de7f363 100644 --- a/drivers/gpu/drm/radeon/r100_track.h +++ b/drivers/gpu/drm/radeon/r100_track.h | |||
@@ -52,14 +52,7 @@ struct r100_cs_track_texture { | |||
52 | unsigned compress_format; | 52 | unsigned compress_format; |
53 | }; | 53 | }; |
54 | 54 | ||
55 | struct r100_cs_track_limits { | ||
56 | unsigned num_cb; | ||
57 | unsigned num_texture; | ||
58 | unsigned max_levels; | ||
59 | }; | ||
60 | |||
61 | struct r100_cs_track { | 55 | struct r100_cs_track { |
62 | struct radeon_device *rdev; | ||
63 | unsigned num_cb; | 56 | unsigned num_cb; |
64 | unsigned num_texture; | 57 | unsigned num_texture; |
65 | unsigned maxy; | 58 | unsigned maxy; |
@@ -73,11 +66,17 @@ struct r100_cs_track { | |||
73 | struct r100_cs_track_array arrays[11]; | 66 | struct r100_cs_track_array arrays[11]; |
74 | struct r100_cs_track_cb cb[R300_MAX_CB]; | 67 | struct r100_cs_track_cb cb[R300_MAX_CB]; |
75 | struct r100_cs_track_cb zb; | 68 | struct r100_cs_track_cb zb; |
69 | struct r100_cs_track_cb aa; | ||
76 | struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE]; | 70 | struct r100_cs_track_texture textures[R300_TRACK_MAX_TEXTURE]; |
77 | bool z_enabled; | 71 | bool z_enabled; |
78 | bool separate_cube; | 72 | bool separate_cube; |
79 | bool zb_cb_clear; | 73 | bool zb_cb_clear; |
80 | bool blend_read_enable; | 74 | bool blend_read_enable; |
75 | bool cb_dirty; | ||
76 | bool zb_dirty; | ||
77 | bool tex_dirty; | ||
78 | bool aa_dirty; | ||
79 | bool aaresolve; | ||
81 | }; | 80 | }; |
82 | 81 | ||
83 | int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track); | 82 | int r100_cs_track_check(struct radeon_device *rdev, struct r100_cs_track *track); |
diff --git a/drivers/gpu/drm/radeon/r200.c b/drivers/gpu/drm/radeon/r200.c index d2408c395619..f24058300413 100644 --- a/drivers/gpu/drm/radeon/r200.c +++ b/drivers/gpu/drm/radeon/r200.c | |||
@@ -184,6 +184,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
184 | } | 184 | } |
185 | track->zb.robj = reloc->robj; | 185 | track->zb.robj = reloc->robj; |
186 | track->zb.offset = idx_value; | 186 | track->zb.offset = idx_value; |
187 | track->zb_dirty = true; | ||
187 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 188 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
188 | break; | 189 | break; |
189 | case RADEON_RB3D_COLOROFFSET: | 190 | case RADEON_RB3D_COLOROFFSET: |
@@ -196,6 +197,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
196 | } | 197 | } |
197 | track->cb[0].robj = reloc->robj; | 198 | track->cb[0].robj = reloc->robj; |
198 | track->cb[0].offset = idx_value; | 199 | track->cb[0].offset = idx_value; |
200 | track->cb_dirty = true; | ||
199 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 201 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
200 | break; | 202 | break; |
201 | case R200_PP_TXOFFSET_0: | 203 | case R200_PP_TXOFFSET_0: |
@@ -214,6 +216,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
214 | } | 216 | } |
215 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 217 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
216 | track->textures[i].robj = reloc->robj; | 218 | track->textures[i].robj = reloc->robj; |
219 | track->tex_dirty = true; | ||
217 | break; | 220 | break; |
218 | case R200_PP_CUBIC_OFFSET_F1_0: | 221 | case R200_PP_CUBIC_OFFSET_F1_0: |
219 | case R200_PP_CUBIC_OFFSET_F2_0: | 222 | case R200_PP_CUBIC_OFFSET_F2_0: |
@@ -257,9 +260,12 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
257 | track->textures[i].cube_info[face - 1].offset = idx_value; | 260 | track->textures[i].cube_info[face - 1].offset = idx_value; |
258 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 261 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
259 | track->textures[i].cube_info[face - 1].robj = reloc->robj; | 262 | track->textures[i].cube_info[face - 1].robj = reloc->robj; |
263 | track->tex_dirty = true; | ||
260 | break; | 264 | break; |
261 | case RADEON_RE_WIDTH_HEIGHT: | 265 | case RADEON_RE_WIDTH_HEIGHT: |
262 | track->maxy = ((idx_value >> 16) & 0x7FF); | 266 | track->maxy = ((idx_value >> 16) & 0x7FF); |
267 | track->cb_dirty = true; | ||
268 | track->zb_dirty = true; | ||
263 | break; | 269 | break; |
264 | case RADEON_RB3D_COLORPITCH: | 270 | case RADEON_RB3D_COLORPITCH: |
265 | r = r100_cs_packet_next_reloc(p, &reloc); | 271 | r = r100_cs_packet_next_reloc(p, &reloc); |
@@ -280,9 +286,11 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
280 | ib[idx] = tmp; | 286 | ib[idx] = tmp; |
281 | 287 | ||
282 | track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK; | 288 | track->cb[0].pitch = idx_value & RADEON_COLORPITCH_MASK; |
289 | track->cb_dirty = true; | ||
283 | break; | 290 | break; |
284 | case RADEON_RB3D_DEPTHPITCH: | 291 | case RADEON_RB3D_DEPTHPITCH: |
285 | track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK; | 292 | track->zb.pitch = idx_value & RADEON_DEPTHPITCH_MASK; |
293 | track->zb_dirty = true; | ||
286 | break; | 294 | break; |
287 | case RADEON_RB3D_CNTL: | 295 | case RADEON_RB3D_CNTL: |
288 | switch ((idx_value >> RADEON_RB3D_COLOR_FORMAT_SHIFT) & 0x1f) { | 296 | switch ((idx_value >> RADEON_RB3D_COLOR_FORMAT_SHIFT) & 0x1f) { |
@@ -312,6 +320,8 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
312 | } | 320 | } |
313 | 321 | ||
314 | track->z_enabled = !!(idx_value & RADEON_Z_ENABLE); | 322 | track->z_enabled = !!(idx_value & RADEON_Z_ENABLE); |
323 | track->cb_dirty = true; | ||
324 | track->zb_dirty = true; | ||
315 | break; | 325 | break; |
316 | case RADEON_RB3D_ZSTENCILCNTL: | 326 | case RADEON_RB3D_ZSTENCILCNTL: |
317 | switch (idx_value & 0xf) { | 327 | switch (idx_value & 0xf) { |
@@ -329,6 +339,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
329 | default: | 339 | default: |
330 | break; | 340 | break; |
331 | } | 341 | } |
342 | track->zb_dirty = true; | ||
332 | break; | 343 | break; |
333 | case RADEON_RB3D_ZPASS_ADDR: | 344 | case RADEON_RB3D_ZPASS_ADDR: |
334 | r = r100_cs_packet_next_reloc(p, &reloc); | 345 | r = r100_cs_packet_next_reloc(p, &reloc); |
@@ -345,6 +356,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
345 | uint32_t temp = idx_value >> 4; | 356 | uint32_t temp = idx_value >> 4; |
346 | for (i = 0; i < track->num_texture; i++) | 357 | for (i = 0; i < track->num_texture; i++) |
347 | track->textures[i].enabled = !!(temp & (1 << i)); | 358 | track->textures[i].enabled = !!(temp & (1 << i)); |
359 | track->tex_dirty = true; | ||
348 | } | 360 | } |
349 | break; | 361 | break; |
350 | case RADEON_SE_VF_CNTL: | 362 | case RADEON_SE_VF_CNTL: |
@@ -369,6 +381,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
369 | i = (reg - R200_PP_TXSIZE_0) / 32; | 381 | i = (reg - R200_PP_TXSIZE_0) / 32; |
370 | track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1; | 382 | track->textures[i].width = (idx_value & RADEON_TEX_USIZE_MASK) + 1; |
371 | track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1; | 383 | track->textures[i].height = ((idx_value & RADEON_TEX_VSIZE_MASK) >> RADEON_TEX_VSIZE_SHIFT) + 1; |
384 | track->tex_dirty = true; | ||
372 | break; | 385 | break; |
373 | case R200_PP_TXPITCH_0: | 386 | case R200_PP_TXPITCH_0: |
374 | case R200_PP_TXPITCH_1: | 387 | case R200_PP_TXPITCH_1: |
@@ -378,6 +391,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
378 | case R200_PP_TXPITCH_5: | 391 | case R200_PP_TXPITCH_5: |
379 | i = (reg - R200_PP_TXPITCH_0) / 32; | 392 | i = (reg - R200_PP_TXPITCH_0) / 32; |
380 | track->textures[i].pitch = idx_value + 32; | 393 | track->textures[i].pitch = idx_value + 32; |
394 | track->tex_dirty = true; | ||
381 | break; | 395 | break; |
382 | case R200_PP_TXFILTER_0: | 396 | case R200_PP_TXFILTER_0: |
383 | case R200_PP_TXFILTER_1: | 397 | case R200_PP_TXFILTER_1: |
@@ -394,6 +408,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
394 | tmp = (idx_value >> 27) & 0x7; | 408 | tmp = (idx_value >> 27) & 0x7; |
395 | if (tmp == 2 || tmp == 6) | 409 | if (tmp == 2 || tmp == 6) |
396 | track->textures[i].roundup_h = false; | 410 | track->textures[i].roundup_h = false; |
411 | track->tex_dirty = true; | ||
397 | break; | 412 | break; |
398 | case R200_PP_TXMULTI_CTL_0: | 413 | case R200_PP_TXMULTI_CTL_0: |
399 | case R200_PP_TXMULTI_CTL_1: | 414 | case R200_PP_TXMULTI_CTL_1: |
@@ -432,6 +447,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
432 | track->textures[i].tex_coord_type = 1; | 447 | track->textures[i].tex_coord_type = 1; |
433 | break; | 448 | break; |
434 | } | 449 | } |
450 | track->tex_dirty = true; | ||
435 | break; | 451 | break; |
436 | case R200_PP_TXFORMAT_0: | 452 | case R200_PP_TXFORMAT_0: |
437 | case R200_PP_TXFORMAT_1: | 453 | case R200_PP_TXFORMAT_1: |
@@ -488,6 +504,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
488 | } | 504 | } |
489 | track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); | 505 | track->textures[i].cube_info[4].width = 1 << ((idx_value >> 16) & 0xf); |
490 | track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); | 506 | track->textures[i].cube_info[4].height = 1 << ((idx_value >> 20) & 0xf); |
507 | track->tex_dirty = true; | ||
491 | break; | 508 | break; |
492 | case R200_PP_CUBIC_FACES_0: | 509 | case R200_PP_CUBIC_FACES_0: |
493 | case R200_PP_CUBIC_FACES_1: | 510 | case R200_PP_CUBIC_FACES_1: |
@@ -501,6 +518,7 @@ int r200_packet0_check(struct radeon_cs_parser *p, | |||
501 | track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf); | 518 | track->textures[i].cube_info[face].width = 1 << ((tmp >> (face * 8)) & 0xf); |
502 | track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf); | 519 | track->textures[i].cube_info[face].height = 1 << ((tmp >> ((face * 8) + 4)) & 0xf); |
503 | } | 520 | } |
521 | track->tex_dirty = true; | ||
504 | break; | 522 | break; |
505 | default: | 523 | default: |
506 | printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", | 524 | printk(KERN_ERR "Forbidden register 0x%04X in cs at %d\n", |
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c index 55fe5ba7def3..768c60ee4ab6 100644 --- a/drivers/gpu/drm/radeon/r300.c +++ b/drivers/gpu/drm/radeon/r300.c | |||
@@ -667,6 +667,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
667 | } | 667 | } |
668 | track->cb[i].robj = reloc->robj; | 668 | track->cb[i].robj = reloc->robj; |
669 | track->cb[i].offset = idx_value; | 669 | track->cb[i].offset = idx_value; |
670 | track->cb_dirty = true; | ||
670 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 671 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
671 | break; | 672 | break; |
672 | case R300_ZB_DEPTHOFFSET: | 673 | case R300_ZB_DEPTHOFFSET: |
@@ -679,6 +680,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
679 | } | 680 | } |
680 | track->zb.robj = reloc->robj; | 681 | track->zb.robj = reloc->robj; |
681 | track->zb.offset = idx_value; | 682 | track->zb.offset = idx_value; |
683 | track->zb_dirty = true; | ||
682 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | 684 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); |
683 | break; | 685 | break; |
684 | case R300_TX_OFFSET_0: | 686 | case R300_TX_OFFSET_0: |
@@ -717,6 +719,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
717 | tmp |= tile_flags; | 719 | tmp |= tile_flags; |
718 | ib[idx] = tmp; | 720 | ib[idx] = tmp; |
719 | track->textures[i].robj = reloc->robj; | 721 | track->textures[i].robj = reloc->robj; |
722 | track->tex_dirty = true; | ||
720 | break; | 723 | break; |
721 | /* Tracked registers */ | 724 | /* Tracked registers */ |
722 | case 0x2084: | 725 | case 0x2084: |
@@ -743,6 +746,8 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
743 | if (p->rdev->family < CHIP_RV515) { | 746 | if (p->rdev->family < CHIP_RV515) { |
744 | track->maxy -= 1440; | 747 | track->maxy -= 1440; |
745 | } | 748 | } |
749 | track->cb_dirty = true; | ||
750 | track->zb_dirty = true; | ||
746 | break; | 751 | break; |
747 | case 0x4E00: | 752 | case 0x4E00: |
748 | /* RB3D_CCTL */ | 753 | /* RB3D_CCTL */ |
@@ -752,6 +757,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
752 | return -EINVAL; | 757 | return -EINVAL; |
753 | } | 758 | } |
754 | track->num_cb = ((idx_value >> 5) & 0x3) + 1; | 759 | track->num_cb = ((idx_value >> 5) & 0x3) + 1; |
760 | track->cb_dirty = true; | ||
755 | break; | 761 | break; |
756 | case 0x4E38: | 762 | case 0x4E38: |
757 | case 0x4E3C: | 763 | case 0x4E3C: |
@@ -814,6 +820,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
814 | ((idx_value >> 21) & 0xF)); | 820 | ((idx_value >> 21) & 0xF)); |
815 | return -EINVAL; | 821 | return -EINVAL; |
816 | } | 822 | } |
823 | track->cb_dirty = true; | ||
817 | break; | 824 | break; |
818 | case 0x4F00: | 825 | case 0x4F00: |
819 | /* ZB_CNTL */ | 826 | /* ZB_CNTL */ |
@@ -822,6 +829,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
822 | } else { | 829 | } else { |
823 | track->z_enabled = false; | 830 | track->z_enabled = false; |
824 | } | 831 | } |
832 | track->zb_dirty = true; | ||
825 | break; | 833 | break; |
826 | case 0x4F10: | 834 | case 0x4F10: |
827 | /* ZB_FORMAT */ | 835 | /* ZB_FORMAT */ |
@@ -838,6 +846,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
838 | (idx_value & 0xF)); | 846 | (idx_value & 0xF)); |
839 | return -EINVAL; | 847 | return -EINVAL; |
840 | } | 848 | } |
849 | track->zb_dirty = true; | ||
841 | break; | 850 | break; |
842 | case 0x4F24: | 851 | case 0x4F24: |
843 | /* ZB_DEPTHPITCH */ | 852 | /* ZB_DEPTHPITCH */ |
@@ -861,14 +870,17 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
861 | ib[idx] = tmp; | 870 | ib[idx] = tmp; |
862 | 871 | ||
863 | track->zb.pitch = idx_value & 0x3FFC; | 872 | track->zb.pitch = idx_value & 0x3FFC; |
873 | track->zb_dirty = true; | ||
864 | break; | 874 | break; |
865 | case 0x4104: | 875 | case 0x4104: |
876 | /* TX_ENABLE */ | ||
866 | for (i = 0; i < 16; i++) { | 877 | for (i = 0; i < 16; i++) { |
867 | bool enabled; | 878 | bool enabled; |
868 | 879 | ||
869 | enabled = !!(idx_value & (1 << i)); | 880 | enabled = !!(idx_value & (1 << i)); |
870 | track->textures[i].enabled = enabled; | 881 | track->textures[i].enabled = enabled; |
871 | } | 882 | } |
883 | track->tex_dirty = true; | ||
872 | break; | 884 | break; |
873 | case 0x44C0: | 885 | case 0x44C0: |
874 | case 0x44C4: | 886 | case 0x44C4: |
@@ -951,8 +963,8 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
951 | DRM_ERROR("Invalid texture format %u\n", | 963 | DRM_ERROR("Invalid texture format %u\n", |
952 | (idx_value & 0x1F)); | 964 | (idx_value & 0x1F)); |
953 | return -EINVAL; | 965 | return -EINVAL; |
954 | break; | ||
955 | } | 966 | } |
967 | track->tex_dirty = true; | ||
956 | break; | 968 | break; |
957 | case 0x4400: | 969 | case 0x4400: |
958 | case 0x4404: | 970 | case 0x4404: |
@@ -980,6 +992,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
980 | if (tmp == 2 || tmp == 4 || tmp == 6) { | 992 | if (tmp == 2 || tmp == 4 || tmp == 6) { |
981 | track->textures[i].roundup_h = false; | 993 | track->textures[i].roundup_h = false; |
982 | } | 994 | } |
995 | track->tex_dirty = true; | ||
983 | break; | 996 | break; |
984 | case 0x4500: | 997 | case 0x4500: |
985 | case 0x4504: | 998 | case 0x4504: |
@@ -1017,6 +1030,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
1017 | DRM_ERROR("Forbidden bit TXFORMAT_MSB\n"); | 1030 | DRM_ERROR("Forbidden bit TXFORMAT_MSB\n"); |
1018 | return -EINVAL; | 1031 | return -EINVAL; |
1019 | } | 1032 | } |
1033 | track->tex_dirty = true; | ||
1020 | break; | 1034 | break; |
1021 | case 0x4480: | 1035 | case 0x4480: |
1022 | case 0x4484: | 1036 | case 0x4484: |
@@ -1046,6 +1060,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
1046 | track->textures[i].use_pitch = !!tmp; | 1060 | track->textures[i].use_pitch = !!tmp; |
1047 | tmp = (idx_value >> 22) & 0xF; | 1061 | tmp = (idx_value >> 22) & 0xF; |
1048 | track->textures[i].txdepth = tmp; | 1062 | track->textures[i].txdepth = tmp; |
1063 | track->tex_dirty = true; | ||
1049 | break; | 1064 | break; |
1050 | case R300_ZB_ZPASS_ADDR: | 1065 | case R300_ZB_ZPASS_ADDR: |
1051 | r = r100_cs_packet_next_reloc(p, &reloc); | 1066 | r = r100_cs_packet_next_reloc(p, &reloc); |
@@ -1060,6 +1075,7 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
1060 | case 0x4e0c: | 1075 | case 0x4e0c: |
1061 | /* RB3D_COLOR_CHANNEL_MASK */ | 1076 | /* RB3D_COLOR_CHANNEL_MASK */ |
1062 | track->color_channel_mask = idx_value; | 1077 | track->color_channel_mask = idx_value; |
1078 | track->cb_dirty = true; | ||
1063 | break; | 1079 | break; |
1064 | case 0x43a4: | 1080 | case 0x43a4: |
1065 | /* SC_HYPERZ_EN */ | 1081 | /* SC_HYPERZ_EN */ |
@@ -1073,6 +1089,8 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
1073 | case 0x4f1c: | 1089 | case 0x4f1c: |
1074 | /* ZB_BW_CNTL */ | 1090 | /* ZB_BW_CNTL */ |
1075 | track->zb_cb_clear = !!(idx_value & (1 << 5)); | 1091 | track->zb_cb_clear = !!(idx_value & (1 << 5)); |
1092 | track->cb_dirty = true; | ||
1093 | track->zb_dirty = true; | ||
1076 | if (p->rdev->hyperz_filp != p->filp) { | 1094 | if (p->rdev->hyperz_filp != p->filp) { |
1077 | if (idx_value & (R300_HIZ_ENABLE | | 1095 | if (idx_value & (R300_HIZ_ENABLE | |
1078 | R300_RD_COMP_ENABLE | | 1096 | R300_RD_COMP_ENABLE | |
@@ -1084,8 +1102,28 @@ static int r300_packet0_check(struct radeon_cs_parser *p, | |||
1084 | case 0x4e04: | 1102 | case 0x4e04: |
1085 | /* RB3D_BLENDCNTL */ | 1103 | /* RB3D_BLENDCNTL */ |
1086 | track->blend_read_enable = !!(idx_value & (1 << 2)); | 1104 | track->blend_read_enable = !!(idx_value & (1 << 2)); |
1105 | track->cb_dirty = true; | ||
1106 | break; | ||
1107 | case R300_RB3D_AARESOLVE_OFFSET: | ||
1108 | r = r100_cs_packet_next_reloc(p, &reloc); | ||
1109 | if (r) { | ||
1110 | DRM_ERROR("No reloc for ib[%d]=0x%04X\n", | ||
1111 | idx, reg); | ||
1112 | r100_cs_dump_packet(p, pkt); | ||
1113 | return r; | ||
1114 | } | ||
1115 | track->aa.robj = reloc->robj; | ||
1116 | track->aa.offset = idx_value; | ||
1117 | track->aa_dirty = true; | ||
1118 | ib[idx] = idx_value + ((u32)reloc->lobj.gpu_offset); | ||
1119 | break; | ||
1120 | case R300_RB3D_AARESOLVE_PITCH: | ||
1121 | track->aa.pitch = idx_value & 0x3FFE; | ||
1122 | track->aa_dirty = true; | ||
1087 | break; | 1123 | break; |
1088 | case 0x4f28: /* ZB_DEPTHCLEARVALUE */ | 1124 | case R300_RB3D_AARESOLVE_CTL: |
1125 | track->aaresolve = idx_value & 0x1; | ||
1126 | track->aa_dirty = true; | ||
1089 | break; | 1127 | break; |
1090 | case 0x4f30: /* ZB_MASK_OFFSET */ | 1128 | case 0x4f30: /* ZB_MASK_OFFSET */ |
1091 | case 0x4f34: /* ZB_ZMASK_PITCH */ | 1129 | case 0x4f34: /* ZB_ZMASK_PITCH */ |
diff --git a/drivers/gpu/drm/radeon/r300_reg.h b/drivers/gpu/drm/radeon/r300_reg.h index 1a0d5362cd79..f0bce399c9f3 100644 --- a/drivers/gpu/drm/radeon/r300_reg.h +++ b/drivers/gpu/drm/radeon/r300_reg.h | |||
@@ -1371,6 +1371,8 @@ | |||
1371 | #define R300_RB3D_COLORPITCH2 0x4E40 /* GUESS */ | 1371 | #define R300_RB3D_COLORPITCH2 0x4E40 /* GUESS */ |
1372 | #define R300_RB3D_COLORPITCH3 0x4E44 /* GUESS */ | 1372 | #define R300_RB3D_COLORPITCH3 0x4E44 /* GUESS */ |
1373 | 1373 | ||
1374 | #define R300_RB3D_AARESOLVE_OFFSET 0x4E80 | ||
1375 | #define R300_RB3D_AARESOLVE_PITCH 0x4E84 | ||
1374 | #define R300_RB3D_AARESOLVE_CTL 0x4E88 | 1376 | #define R300_RB3D_AARESOLVE_CTL 0x4E88 |
1375 | /* gap */ | 1377 | /* gap */ |
1376 | 1378 | ||
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 650672a0f5ad..de88624d5f87 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -2105,7 +2105,11 @@ static int r600_cp_load_microcode(struct radeon_device *rdev) | |||
2105 | 2105 | ||
2106 | r600_cp_stop(rdev); | 2106 | r600_cp_stop(rdev); |
2107 | 2107 | ||
2108 | WREG32(CP_RB_CNTL, RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); | 2108 | WREG32(CP_RB_CNTL, |
2109 | #ifdef __BIG_ENDIAN | ||
2110 | BUF_SWAP_32BIT | | ||
2111 | #endif | ||
2112 | RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); | ||
2109 | 2113 | ||
2110 | /* Reset cp */ | 2114 | /* Reset cp */ |
2111 | WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); | 2115 | WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); |
@@ -2192,7 +2196,11 @@ int r600_cp_resume(struct radeon_device *rdev) | |||
2192 | WREG32(CP_RB_WPTR, 0); | 2196 | WREG32(CP_RB_WPTR, 0); |
2193 | 2197 | ||
2194 | /* set the wb address whether it's enabled or not */ | 2198 | /* set the wb address whether it's enabled or not */ |
2195 | WREG32(CP_RB_RPTR_ADDR, (rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC); | 2199 | WREG32(CP_RB_RPTR_ADDR, |
2200 | #ifdef __BIG_ENDIAN | ||
2201 | RB_RPTR_SWAP(2) | | ||
2202 | #endif | ||
2203 | ((rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFFFFFFFC)); | ||
2196 | WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); | 2204 | WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); |
2197 | WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); | 2205 | WREG32(SCRATCH_ADDR, ((rdev->wb.gpu_addr + RADEON_WB_SCRATCH_OFFSET) >> 8) & 0xFFFFFFFF); |
2198 | 2206 | ||
@@ -2628,7 +2636,11 @@ void r600_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib) | |||
2628 | { | 2636 | { |
2629 | /* FIXME: implement */ | 2637 | /* FIXME: implement */ |
2630 | radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); | 2638 | radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); |
2631 | radeon_ring_write(rdev, ib->gpu_addr & 0xFFFFFFFC); | 2639 | radeon_ring_write(rdev, |
2640 | #ifdef __BIG_ENDIAN | ||
2641 | (2 << 0) | | ||
2642 | #endif | ||
2643 | (ib->gpu_addr & 0xFFFFFFFC)); | ||
2632 | radeon_ring_write(rdev, upper_32_bits(ib->gpu_addr) & 0xFF); | 2644 | radeon_ring_write(rdev, upper_32_bits(ib->gpu_addr) & 0xFF); |
2633 | radeon_ring_write(rdev, ib->length_dw); | 2645 | radeon_ring_write(rdev, ib->length_dw); |
2634 | } | 2646 | } |
@@ -3297,8 +3309,8 @@ restart_ih: | |||
3297 | while (rptr != wptr) { | 3309 | while (rptr != wptr) { |
3298 | /* wptr/rptr are in bytes! */ | 3310 | /* wptr/rptr are in bytes! */ |
3299 | ring_index = rptr / 4; | 3311 | ring_index = rptr / 4; |
3300 | src_id = rdev->ih.ring[ring_index] & 0xff; | 3312 | src_id = le32_to_cpu(rdev->ih.ring[ring_index]) & 0xff; |
3301 | src_data = rdev->ih.ring[ring_index + 1] & 0xfffffff; | 3313 | src_data = le32_to_cpu(rdev->ih.ring[ring_index + 1]) & 0xfffffff; |
3302 | 3314 | ||
3303 | switch (src_id) { | 3315 | switch (src_id) { |
3304 | case 1: /* D1 vblank/vline */ | 3316 | case 1: /* D1 vblank/vline */ |
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c index ca5c29f70779..7f1043448d25 100644 --- a/drivers/gpu/drm/radeon/r600_blit.c +++ b/drivers/gpu/drm/radeon/r600_blit.c | |||
@@ -137,9 +137,9 @@ set_shaders(struct drm_device *dev) | |||
137 | ps = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset + 256); | 137 | ps = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset + 256); |
138 | 138 | ||
139 | for (i = 0; i < r6xx_vs_size; i++) | 139 | for (i = 0; i < r6xx_vs_size; i++) |
140 | vs[i] = r6xx_vs[i]; | 140 | vs[i] = cpu_to_le32(r6xx_vs[i]); |
141 | for (i = 0; i < r6xx_ps_size; i++) | 141 | for (i = 0; i < r6xx_ps_size; i++) |
142 | ps[i] = r6xx_ps[i]; | 142 | ps[i] = cpu_to_le32(r6xx_ps[i]); |
143 | 143 | ||
144 | dev_priv->blit_vb->used = 512; | 144 | dev_priv->blit_vb->used = 512; |
145 | 145 | ||
@@ -192,6 +192,9 @@ set_vtx_resource(drm_radeon_private_t *dev_priv, u64 gpu_addr) | |||
192 | DRM_DEBUG("\n"); | 192 | DRM_DEBUG("\n"); |
193 | 193 | ||
194 | sq_vtx_constant_word2 = (((gpu_addr >> 32) & 0xff) | (16 << 8)); | 194 | sq_vtx_constant_word2 = (((gpu_addr >> 32) & 0xff) | (16 << 8)); |
195 | #ifdef __BIG_ENDIAN | ||
196 | sq_vtx_constant_word2 |= (2 << 30); | ||
197 | #endif | ||
195 | 198 | ||
196 | BEGIN_RING(9); | 199 | BEGIN_RING(9); |
197 | OUT_RING(CP_PACKET3(R600_IT_SET_RESOURCE, 7)); | 200 | OUT_RING(CP_PACKET3(R600_IT_SET_RESOURCE, 7)); |
@@ -291,7 +294,11 @@ draw_auto(drm_radeon_private_t *dev_priv) | |||
291 | OUT_RING(DI_PT_RECTLIST); | 294 | OUT_RING(DI_PT_RECTLIST); |
292 | 295 | ||
293 | OUT_RING(CP_PACKET3(R600_IT_INDEX_TYPE, 0)); | 296 | OUT_RING(CP_PACKET3(R600_IT_INDEX_TYPE, 0)); |
297 | #ifdef __BIG_ENDIAN | ||
298 | OUT_RING((2 << 2) | DI_INDEX_SIZE_16_BIT); | ||
299 | #else | ||
294 | OUT_RING(DI_INDEX_SIZE_16_BIT); | 300 | OUT_RING(DI_INDEX_SIZE_16_BIT); |
301 | #endif | ||
295 | 302 | ||
296 | OUT_RING(CP_PACKET3(R600_IT_NUM_INSTANCES, 0)); | 303 | OUT_RING(CP_PACKET3(R600_IT_NUM_INSTANCES, 0)); |
297 | OUT_RING(1); | 304 | OUT_RING(1); |
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c index 86e5aa07f0db..41f7aafc97c4 100644 --- a/drivers/gpu/drm/radeon/r600_blit_kms.c +++ b/drivers/gpu/drm/radeon/r600_blit_kms.c | |||
@@ -54,7 +54,7 @@ set_render_target(struct radeon_device *rdev, int format, | |||
54 | if (h < 8) | 54 | if (h < 8) |
55 | h = 8; | 55 | h = 8; |
56 | 56 | ||
57 | cb_color_info = ((format << 2) | (1 << 27)); | 57 | cb_color_info = ((format << 2) | (1 << 27) | (1 << 8)); |
58 | pitch = (w / 8) - 1; | 58 | pitch = (w / 8) - 1; |
59 | slice = ((w * h) / 64) - 1; | 59 | slice = ((w * h) / 64) - 1; |
60 | 60 | ||
@@ -165,6 +165,9 @@ set_vtx_resource(struct radeon_device *rdev, u64 gpu_addr) | |||
165 | u32 sq_vtx_constant_word2; | 165 | u32 sq_vtx_constant_word2; |
166 | 166 | ||
167 | sq_vtx_constant_word2 = ((upper_32_bits(gpu_addr) & 0xff) | (16 << 8)); | 167 | sq_vtx_constant_word2 = ((upper_32_bits(gpu_addr) & 0xff) | (16 << 8)); |
168 | #ifdef __BIG_ENDIAN | ||
169 | sq_vtx_constant_word2 |= (2 << 30); | ||
170 | #endif | ||
168 | 171 | ||
169 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_RESOURCE, 7)); | 172 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_RESOURCE, 7)); |
170 | radeon_ring_write(rdev, 0x460); | 173 | radeon_ring_write(rdev, 0x460); |
@@ -199,7 +202,7 @@ set_tex_resource(struct radeon_device *rdev, | |||
199 | if (h < 1) | 202 | if (h < 1) |
200 | h = 1; | 203 | h = 1; |
201 | 204 | ||
202 | sq_tex_resource_word0 = (1 << 0); | 205 | sq_tex_resource_word0 = (1 << 0) | (1 << 3); |
203 | sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 8) | | 206 | sq_tex_resource_word0 |= ((((pitch >> 3) - 1) << 8) | |
204 | ((w - 1) << 19)); | 207 | ((w - 1) << 19)); |
205 | 208 | ||
@@ -253,7 +256,11 @@ draw_auto(struct radeon_device *rdev) | |||
253 | radeon_ring_write(rdev, DI_PT_RECTLIST); | 256 | radeon_ring_write(rdev, DI_PT_RECTLIST); |
254 | 257 | ||
255 | radeon_ring_write(rdev, PACKET3(PACKET3_INDEX_TYPE, 0)); | 258 | radeon_ring_write(rdev, PACKET3(PACKET3_INDEX_TYPE, 0)); |
256 | radeon_ring_write(rdev, DI_INDEX_SIZE_16_BIT); | 259 | radeon_ring_write(rdev, |
260 | #ifdef __BIG_ENDIAN | ||
261 | (2 << 2) | | ||
262 | #endif | ||
263 | DI_INDEX_SIZE_16_BIT); | ||
257 | 264 | ||
258 | radeon_ring_write(rdev, PACKET3(PACKET3_NUM_INSTANCES, 0)); | 265 | radeon_ring_write(rdev, PACKET3(PACKET3_NUM_INSTANCES, 0)); |
259 | radeon_ring_write(rdev, 1); | 266 | radeon_ring_write(rdev, 1); |
@@ -424,7 +431,11 @@ set_default_state(struct radeon_device *rdev) | |||
424 | dwords = ALIGN(rdev->r600_blit.state_len, 0x10); | 431 | dwords = ALIGN(rdev->r600_blit.state_len, 0x10); |
425 | gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset; | 432 | gpu_addr = rdev->r600_blit.shader_gpu_addr + rdev->r600_blit.state_offset; |
426 | radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); | 433 | radeon_ring_write(rdev, PACKET3(PACKET3_INDIRECT_BUFFER, 2)); |
427 | radeon_ring_write(rdev, gpu_addr & 0xFFFFFFFC); | 434 | radeon_ring_write(rdev, |
435 | #ifdef __BIG_ENDIAN | ||
436 | (2 << 0) | | ||
437 | #endif | ||
438 | (gpu_addr & 0xFFFFFFFC)); | ||
428 | radeon_ring_write(rdev, upper_32_bits(gpu_addr) & 0xFF); | 439 | radeon_ring_write(rdev, upper_32_bits(gpu_addr) & 0xFF); |
429 | radeon_ring_write(rdev, dwords); | 440 | radeon_ring_write(rdev, dwords); |
430 | 441 | ||
@@ -467,7 +478,7 @@ static inline uint32_t i2f(uint32_t input) | |||
467 | int r600_blit_init(struct radeon_device *rdev) | 478 | int r600_blit_init(struct radeon_device *rdev) |
468 | { | 479 | { |
469 | u32 obj_size; | 480 | u32 obj_size; |
470 | int r, dwords; | 481 | int i, r, dwords; |
471 | void *ptr; | 482 | void *ptr; |
472 | u32 packet2s[16]; | 483 | u32 packet2s[16]; |
473 | int num_packet2s = 0; | 484 | int num_packet2s = 0; |
@@ -486,7 +497,7 @@ int r600_blit_init(struct radeon_device *rdev) | |||
486 | 497 | ||
487 | dwords = rdev->r600_blit.state_len; | 498 | dwords = rdev->r600_blit.state_len; |
488 | while (dwords & 0xf) { | 499 | while (dwords & 0xf) { |
489 | packet2s[num_packet2s++] = PACKET2(0); | 500 | packet2s[num_packet2s++] = cpu_to_le32(PACKET2(0)); |
490 | dwords++; | 501 | dwords++; |
491 | } | 502 | } |
492 | 503 | ||
@@ -529,8 +540,10 @@ int r600_blit_init(struct radeon_device *rdev) | |||
529 | if (num_packet2s) | 540 | if (num_packet2s) |
530 | memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4), | 541 | memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4), |
531 | packet2s, num_packet2s * 4); | 542 | packet2s, num_packet2s * 4); |
532 | memcpy(ptr + rdev->r600_blit.vs_offset, r6xx_vs, r6xx_vs_size * 4); | 543 | for (i = 0; i < r6xx_vs_size; i++) |
533 | memcpy(ptr + rdev->r600_blit.ps_offset, r6xx_ps, r6xx_ps_size * 4); | 544 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.vs_offset + i * 4) = cpu_to_le32(r6xx_vs[i]); |
545 | for (i = 0; i < r6xx_ps_size; i++) | ||
546 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.ps_offset + i * 4) = cpu_to_le32(r6xx_ps[i]); | ||
534 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); | 547 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); |
535 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | 548 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
536 | 549 | ||
diff --git a/drivers/gpu/drm/radeon/r600_blit_shaders.c b/drivers/gpu/drm/radeon/r600_blit_shaders.c index e8151c1d55b2..2d1f6c5ee2a7 100644 --- a/drivers/gpu/drm/radeon/r600_blit_shaders.c +++ b/drivers/gpu/drm/radeon/r600_blit_shaders.c | |||
@@ -684,7 +684,11 @@ const u32 r6xx_vs[] = | |||
684 | 0x00000000, | 684 | 0x00000000, |
685 | 0x3c000000, | 685 | 0x3c000000, |
686 | 0x68cd1000, | 686 | 0x68cd1000, |
687 | #ifdef __BIG_ENDIAN | ||
688 | 0x000a0000, | ||
689 | #else | ||
687 | 0x00080000, | 690 | 0x00080000, |
691 | #endif | ||
688 | 0x00000000, | 692 | 0x00000000, |
689 | }; | 693 | }; |
690 | 694 | ||
diff --git a/drivers/gpu/drm/radeon/r600_cp.c b/drivers/gpu/drm/radeon/r600_cp.c index 4f4cd8b286d5..c3ab959bdc7c 100644 --- a/drivers/gpu/drm/radeon/r600_cp.c +++ b/drivers/gpu/drm/radeon/r600_cp.c | |||
@@ -396,6 +396,9 @@ static void r600_cp_load_microcode(drm_radeon_private_t *dev_priv) | |||
396 | r600_do_cp_stop(dev_priv); | 396 | r600_do_cp_stop(dev_priv); |
397 | 397 | ||
398 | RADEON_WRITE(R600_CP_RB_CNTL, | 398 | RADEON_WRITE(R600_CP_RB_CNTL, |
399 | #ifdef __BIG_ENDIAN | ||
400 | R600_BUF_SWAP_32BIT | | ||
401 | #endif | ||
399 | R600_RB_NO_UPDATE | | 402 | R600_RB_NO_UPDATE | |
400 | R600_RB_BLKSZ(15) | | 403 | R600_RB_BLKSZ(15) | |
401 | R600_RB_BUFSZ(3)); | 404 | R600_RB_BUFSZ(3)); |
@@ -486,9 +489,12 @@ static void r700_cp_load_microcode(drm_radeon_private_t *dev_priv) | |||
486 | r600_do_cp_stop(dev_priv); | 489 | r600_do_cp_stop(dev_priv); |
487 | 490 | ||
488 | RADEON_WRITE(R600_CP_RB_CNTL, | 491 | RADEON_WRITE(R600_CP_RB_CNTL, |
492 | #ifdef __BIG_ENDIAN | ||
493 | R600_BUF_SWAP_32BIT | | ||
494 | #endif | ||
489 | R600_RB_NO_UPDATE | | 495 | R600_RB_NO_UPDATE | |
490 | (15 << 8) | | 496 | R600_RB_BLKSZ(15) | |
491 | (3 << 0)); | 497 | R600_RB_BUFSZ(3)); |
492 | 498 | ||
493 | RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); | 499 | RADEON_WRITE(R600_GRBM_SOFT_RESET, R600_SOFT_RESET_CP); |
494 | RADEON_READ(R600_GRBM_SOFT_RESET); | 500 | RADEON_READ(R600_GRBM_SOFT_RESET); |
@@ -550,8 +556,12 @@ static void r600_test_writeback(drm_radeon_private_t *dev_priv) | |||
550 | 556 | ||
551 | if (!dev_priv->writeback_works) { | 557 | if (!dev_priv->writeback_works) { |
552 | /* Disable writeback to avoid unnecessary bus master transfer */ | 558 | /* Disable writeback to avoid unnecessary bus master transfer */ |
553 | RADEON_WRITE(R600_CP_RB_CNTL, RADEON_READ(R600_CP_RB_CNTL) | | 559 | RADEON_WRITE(R600_CP_RB_CNTL, |
554 | RADEON_RB_NO_UPDATE); | 560 | #ifdef __BIG_ENDIAN |
561 | R600_BUF_SWAP_32BIT | | ||
562 | #endif | ||
563 | RADEON_READ(R600_CP_RB_CNTL) | | ||
564 | R600_RB_NO_UPDATE); | ||
555 | RADEON_WRITE(R600_SCRATCH_UMSK, 0); | 565 | RADEON_WRITE(R600_SCRATCH_UMSK, 0); |
556 | } | 566 | } |
557 | } | 567 | } |
@@ -575,7 +585,11 @@ int r600_do_engine_reset(struct drm_device *dev) | |||
575 | 585 | ||
576 | RADEON_WRITE(R600_CP_RB_WPTR_DELAY, 0); | 586 | RADEON_WRITE(R600_CP_RB_WPTR_DELAY, 0); |
577 | cp_rb_cntl = RADEON_READ(R600_CP_RB_CNTL); | 587 | cp_rb_cntl = RADEON_READ(R600_CP_RB_CNTL); |
578 | RADEON_WRITE(R600_CP_RB_CNTL, R600_RB_RPTR_WR_ENA); | 588 | RADEON_WRITE(R600_CP_RB_CNTL, |
589 | #ifdef __BIG_ENDIAN | ||
590 | R600_BUF_SWAP_32BIT | | ||
591 | #endif | ||
592 | R600_RB_RPTR_WR_ENA); | ||
579 | 593 | ||
580 | RADEON_WRITE(R600_CP_RB_RPTR_WR, cp_ptr); | 594 | RADEON_WRITE(R600_CP_RB_RPTR_WR, cp_ptr); |
581 | RADEON_WRITE(R600_CP_RB_WPTR, cp_ptr); | 595 | RADEON_WRITE(R600_CP_RB_WPTR, cp_ptr); |
@@ -1838,7 +1852,10 @@ static void r600_cp_init_ring_buffer(struct drm_device *dev, | |||
1838 | + dev_priv->gart_vm_start; | 1852 | + dev_priv->gart_vm_start; |
1839 | } | 1853 | } |
1840 | RADEON_WRITE(R600_CP_RB_RPTR_ADDR, | 1854 | RADEON_WRITE(R600_CP_RB_RPTR_ADDR, |
1841 | rptr_addr & 0xffffffff); | 1855 | #ifdef __BIG_ENDIAN |
1856 | (2 << 0) | | ||
1857 | #endif | ||
1858 | (rptr_addr & 0xfffffffc)); | ||
1842 | RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI, | 1859 | RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI, |
1843 | upper_32_bits(rptr_addr)); | 1860 | upper_32_bits(rptr_addr)); |
1844 | 1861 | ||
@@ -1889,7 +1906,7 @@ static void r600_cp_init_ring_buffer(struct drm_device *dev, | |||
1889 | { | 1906 | { |
1890 | u64 scratch_addr; | 1907 | u64 scratch_addr; |
1891 | 1908 | ||
1892 | scratch_addr = RADEON_READ(R600_CP_RB_RPTR_ADDR); | 1909 | scratch_addr = RADEON_READ(R600_CP_RB_RPTR_ADDR) & 0xFFFFFFFC; |
1893 | scratch_addr |= ((u64)RADEON_READ(R600_CP_RB_RPTR_ADDR_HI)) << 32; | 1910 | scratch_addr |= ((u64)RADEON_READ(R600_CP_RB_RPTR_ADDR_HI)) << 32; |
1894 | scratch_addr += R600_SCRATCH_REG_OFFSET; | 1911 | scratch_addr += R600_SCRATCH_REG_OFFSET; |
1895 | scratch_addr >>= 8; | 1912 | scratch_addr >>= 8; |
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index 7831e0890210..153095fba62f 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
@@ -295,17 +295,18 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) | |||
295 | } | 295 | } |
296 | 296 | ||
297 | if (!IS_ALIGNED(pitch, pitch_align)) { | 297 | if (!IS_ALIGNED(pitch, pitch_align)) { |
298 | dev_warn(p->dev, "%s:%d cb pitch (%d) invalid\n", | 298 | dev_warn(p->dev, "%s:%d cb pitch (%d, 0x%x, %d) invalid\n", |
299 | __func__, __LINE__, pitch); | 299 | __func__, __LINE__, pitch, pitch_align, array_mode); |
300 | return -EINVAL; | 300 | return -EINVAL; |
301 | } | 301 | } |
302 | if (!IS_ALIGNED(height, height_align)) { | 302 | if (!IS_ALIGNED(height, height_align)) { |
303 | dev_warn(p->dev, "%s:%d cb height (%d) invalid\n", | 303 | dev_warn(p->dev, "%s:%d cb height (%d, 0x%x, %d) invalid\n", |
304 | __func__, __LINE__, height); | 304 | __func__, __LINE__, height, height_align, array_mode); |
305 | return -EINVAL; | 305 | return -EINVAL; |
306 | } | 306 | } |
307 | if (!IS_ALIGNED(base_offset, base_align)) { | 307 | if (!IS_ALIGNED(base_offset, base_align)) { |
308 | dev_warn(p->dev, "%s offset[%d] 0x%llx not aligned\n", __func__, i, base_offset); | 308 | dev_warn(p->dev, "%s offset[%d] 0x%llx 0x%llx, %d not aligned\n", __func__, i, |
309 | base_offset, base_align, array_mode); | ||
309 | return -EINVAL; | 310 | return -EINVAL; |
310 | } | 311 | } |
311 | 312 | ||
@@ -320,7 +321,10 @@ static inline int r600_cs_track_validate_cb(struct radeon_cs_parser *p, int i) | |||
320 | * broken userspace. | 321 | * broken userspace. |
321 | */ | 322 | */ |
322 | } else { | 323 | } else { |
323 | dev_warn(p->dev, "%s offset[%d] %d %d %lu too big\n", __func__, i, track->cb_color_bo_offset[i], tmp, radeon_bo_size(track->cb_color_bo[i])); | 324 | dev_warn(p->dev, "%s offset[%d] %d %d %d %lu too big\n", __func__, i, |
325 | array_mode, | ||
326 | track->cb_color_bo_offset[i], tmp, | ||
327 | radeon_bo_size(track->cb_color_bo[i])); | ||
324 | return -EINVAL; | 328 | return -EINVAL; |
325 | } | 329 | } |
326 | } | 330 | } |
@@ -455,17 +459,18 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) | |||
455 | } | 459 | } |
456 | 460 | ||
457 | if (!IS_ALIGNED(pitch, pitch_align)) { | 461 | if (!IS_ALIGNED(pitch, pitch_align)) { |
458 | dev_warn(p->dev, "%s:%d db pitch (%d) invalid\n", | 462 | dev_warn(p->dev, "%s:%d db pitch (%d, 0x%x, %d) invalid\n", |
459 | __func__, __LINE__, pitch); | 463 | __func__, __LINE__, pitch, pitch_align, array_mode); |
460 | return -EINVAL; | 464 | return -EINVAL; |
461 | } | 465 | } |
462 | if (!IS_ALIGNED(height, height_align)) { | 466 | if (!IS_ALIGNED(height, height_align)) { |
463 | dev_warn(p->dev, "%s:%d db height (%d) invalid\n", | 467 | dev_warn(p->dev, "%s:%d db height (%d, 0x%x, %d) invalid\n", |
464 | __func__, __LINE__, height); | 468 | __func__, __LINE__, height, height_align, array_mode); |
465 | return -EINVAL; | 469 | return -EINVAL; |
466 | } | 470 | } |
467 | if (!IS_ALIGNED(base_offset, base_align)) { | 471 | if (!IS_ALIGNED(base_offset, base_align)) { |
468 | dev_warn(p->dev, "%s offset[%d] 0x%llx not aligned\n", __func__, i, base_offset); | 472 | dev_warn(p->dev, "%s offset[%d] 0x%llx, 0x%llx, %d not aligned\n", __func__, i, |
473 | base_offset, base_align, array_mode); | ||
469 | return -EINVAL; | 474 | return -EINVAL; |
470 | } | 475 | } |
471 | 476 | ||
@@ -473,9 +478,10 @@ static int r600_cs_track_check(struct radeon_cs_parser *p) | |||
473 | nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1; | 478 | nviews = G_028004_SLICE_MAX(track->db_depth_view) + 1; |
474 | tmp = ntiles * bpe * 64 * nviews; | 479 | tmp = ntiles * bpe * 64 * nviews; |
475 | if ((tmp + track->db_offset) > radeon_bo_size(track->db_bo)) { | 480 | if ((tmp + track->db_offset) > radeon_bo_size(track->db_bo)) { |
476 | dev_warn(p->dev, "z/stencil buffer too small (0x%08X %d %d %d -> %u have %lu)\n", | 481 | dev_warn(p->dev, "z/stencil buffer (%d) too small (0x%08X %d %d %d -> %u have %lu)\n", |
477 | track->db_depth_size, ntiles, nviews, bpe, tmp + track->db_offset, | 482 | array_mode, |
478 | radeon_bo_size(track->db_bo)); | 483 | track->db_depth_size, ntiles, nviews, bpe, tmp + track->db_offset, |
484 | radeon_bo_size(track->db_bo)); | ||
479 | return -EINVAL; | 485 | return -EINVAL; |
480 | } | 486 | } |
481 | } | 487 | } |
@@ -1227,18 +1233,18 @@ static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 i | |||
1227 | /* XXX check height as well... */ | 1233 | /* XXX check height as well... */ |
1228 | 1234 | ||
1229 | if (!IS_ALIGNED(pitch, pitch_align)) { | 1235 | if (!IS_ALIGNED(pitch, pitch_align)) { |
1230 | dev_warn(p->dev, "%s:%d tex pitch (%d) invalid\n", | 1236 | dev_warn(p->dev, "%s:%d tex pitch (%d, 0x%x, %d) invalid\n", |
1231 | __func__, __LINE__, pitch); | 1237 | __func__, __LINE__, pitch, pitch_align, G_038000_TILE_MODE(word0)); |
1232 | return -EINVAL; | 1238 | return -EINVAL; |
1233 | } | 1239 | } |
1234 | if (!IS_ALIGNED(base_offset, base_align)) { | 1240 | if (!IS_ALIGNED(base_offset, base_align)) { |
1235 | dev_warn(p->dev, "%s:%d tex base offset (0x%llx) invalid\n", | 1241 | dev_warn(p->dev, "%s:%d tex base offset (0x%llx, 0x%llx, %d) invalid\n", |
1236 | __func__, __LINE__, base_offset); | 1242 | __func__, __LINE__, base_offset, base_align, G_038000_TILE_MODE(word0)); |
1237 | return -EINVAL; | 1243 | return -EINVAL; |
1238 | } | 1244 | } |
1239 | if (!IS_ALIGNED(mip_offset, base_align)) { | 1245 | if (!IS_ALIGNED(mip_offset, base_align)) { |
1240 | dev_warn(p->dev, "%s:%d tex mip offset (0x%llx) invalid\n", | 1246 | dev_warn(p->dev, "%s:%d tex mip offset (0x%llx, 0x%llx, %d) invalid\n", |
1241 | __func__, __LINE__, mip_offset); | 1247 | __func__, __LINE__, mip_offset, base_align, G_038000_TILE_MODE(word0)); |
1242 | return -EINVAL; | 1248 | return -EINVAL; |
1243 | } | 1249 | } |
1244 | 1250 | ||
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index a5d898b4bad2..04bac0bbd3ec 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
@@ -154,13 +154,14 @@ | |||
154 | #define ROQ_IB2_START(x) ((x) << 8) | 154 | #define ROQ_IB2_START(x) ((x) << 8) |
155 | #define CP_RB_BASE 0xC100 | 155 | #define CP_RB_BASE 0xC100 |
156 | #define CP_RB_CNTL 0xC104 | 156 | #define CP_RB_CNTL 0xC104 |
157 | #define RB_BUFSZ(x) ((x)<<0) | 157 | #define RB_BUFSZ(x) ((x) << 0) |
158 | #define RB_BLKSZ(x) ((x)<<8) | 158 | #define RB_BLKSZ(x) ((x) << 8) |
159 | #define RB_NO_UPDATE (1<<27) | 159 | #define RB_NO_UPDATE (1 << 27) |
160 | #define RB_RPTR_WR_ENA (1<<31) | 160 | #define RB_RPTR_WR_ENA (1 << 31) |
161 | #define BUF_SWAP_32BIT (2 << 16) | 161 | #define BUF_SWAP_32BIT (2 << 16) |
162 | #define CP_RB_RPTR 0x8700 | 162 | #define CP_RB_RPTR 0x8700 |
163 | #define CP_RB_RPTR_ADDR 0xC10C | 163 | #define CP_RB_RPTR_ADDR 0xC10C |
164 | #define RB_RPTR_SWAP(x) ((x) << 0) | ||
164 | #define CP_RB_RPTR_ADDR_HI 0xC110 | 165 | #define CP_RB_RPTR_ADDR_HI 0xC110 |
165 | #define CP_RB_RPTR_WR 0xC108 | 166 | #define CP_RB_RPTR_WR 0xC108 |
166 | #define CP_RB_WPTR 0xC114 | 167 | #define CP_RB_WPTR 0xC114 |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 5c1cc7ad9a15..02d5c415f499 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -88,7 +88,7 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_dev | |||
88 | /* some evergreen boards have bad data for this entry */ | 88 | /* some evergreen boards have bad data for this entry */ |
89 | if (ASIC_IS_DCE4(rdev)) { | 89 | if (ASIC_IS_DCE4(rdev)) { |
90 | if ((i == 7) && | 90 | if ((i == 7) && |
91 | (gpio->usClkMaskRegisterIndex == 0x1936) && | 91 | (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) && |
92 | (gpio->sucI2cId.ucAccess == 0)) { | 92 | (gpio->sucI2cId.ucAccess == 0)) { |
93 | gpio->sucI2cId.ucAccess = 0x97; | 93 | gpio->sucI2cId.ucAccess = 0x97; |
94 | gpio->ucDataMaskShift = 8; | 94 | gpio->ucDataMaskShift = 8; |
@@ -101,7 +101,7 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_dev | |||
101 | /* some DCE3 boards have bad data for this entry */ | 101 | /* some DCE3 boards have bad data for this entry */ |
102 | if (ASIC_IS_DCE3(rdev)) { | 102 | if (ASIC_IS_DCE3(rdev)) { |
103 | if ((i == 4) && | 103 | if ((i == 4) && |
104 | (gpio->usClkMaskRegisterIndex == 0x1fda) && | 104 | (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) && |
105 | (gpio->sucI2cId.ucAccess == 0x94)) | 105 | (gpio->sucI2cId.ucAccess == 0x94)) |
106 | gpio->sucI2cId.ucAccess = 0x14; | 106 | gpio->sucI2cId.ucAccess = 0x14; |
107 | } | 107 | } |
@@ -172,7 +172,7 @@ void radeon_atombios_i2c_init(struct radeon_device *rdev) | |||
172 | /* some evergreen boards have bad data for this entry */ | 172 | /* some evergreen boards have bad data for this entry */ |
173 | if (ASIC_IS_DCE4(rdev)) { | 173 | if (ASIC_IS_DCE4(rdev)) { |
174 | if ((i == 7) && | 174 | if ((i == 7) && |
175 | (gpio->usClkMaskRegisterIndex == 0x1936) && | 175 | (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) && |
176 | (gpio->sucI2cId.ucAccess == 0)) { | 176 | (gpio->sucI2cId.ucAccess == 0)) { |
177 | gpio->sucI2cId.ucAccess = 0x97; | 177 | gpio->sucI2cId.ucAccess = 0x97; |
178 | gpio->ucDataMaskShift = 8; | 178 | gpio->ucDataMaskShift = 8; |
@@ -185,7 +185,7 @@ void radeon_atombios_i2c_init(struct radeon_device *rdev) | |||
185 | /* some DCE3 boards have bad data for this entry */ | 185 | /* some DCE3 boards have bad data for this entry */ |
186 | if (ASIC_IS_DCE3(rdev)) { | 186 | if (ASIC_IS_DCE3(rdev)) { |
187 | if ((i == 4) && | 187 | if ((i == 4) && |
188 | (gpio->usClkMaskRegisterIndex == 0x1fda) && | 188 | (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) && |
189 | (gpio->sucI2cId.ucAccess == 0x94)) | 189 | (gpio->sucI2cId.ucAccess == 0x94)) |
190 | gpio->sucI2cId.ucAccess = 0x14; | 190 | gpio->sucI2cId.ucAccess = 0x14; |
191 | } | 191 | } |
@@ -252,7 +252,7 @@ static inline struct radeon_gpio_rec radeon_lookup_gpio(struct radeon_device *rd | |||
252 | pin = &gpio_info->asGPIO_Pin[i]; | 252 | pin = &gpio_info->asGPIO_Pin[i]; |
253 | if (id == pin->ucGPIO_ID) { | 253 | if (id == pin->ucGPIO_ID) { |
254 | gpio.id = pin->ucGPIO_ID; | 254 | gpio.id = pin->ucGPIO_ID; |
255 | gpio.reg = pin->usGpioPin_AIndex * 4; | 255 | gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex) * 4; |
256 | gpio.mask = (1 << pin->ucGpioPinBitShift); | 256 | gpio.mask = (1 << pin->ucGpioPinBitShift); |
257 | gpio.valid = true; | 257 | gpio.valid = true; |
258 | break; | 258 | break; |
@@ -1274,11 +1274,11 @@ bool radeon_atombios_sideport_present(struct radeon_device *rdev) | |||
1274 | data_offset); | 1274 | data_offset); |
1275 | switch (crev) { | 1275 | switch (crev) { |
1276 | case 1: | 1276 | case 1: |
1277 | if (igp_info->info.ulBootUpMemoryClock) | 1277 | if (le32_to_cpu(igp_info->info.ulBootUpMemoryClock)) |
1278 | return true; | 1278 | return true; |
1279 | break; | 1279 | break; |
1280 | case 2: | 1280 | case 2: |
1281 | if (igp_info->info_2.ulBootUpSidePortClock) | 1281 | if (le32_to_cpu(igp_info->info_2.ulBootUpSidePortClock)) |
1282 | return true; | 1282 | return true; |
1283 | break; | 1283 | break; |
1284 | default: | 1284 | default: |
@@ -1442,7 +1442,7 @@ bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, | |||
1442 | 1442 | ||
1443 | for (i = 0; i < num_indices; i++) { | 1443 | for (i = 0; i < num_indices; i++) { |
1444 | if ((ss_info->info.asSpreadSpectrum[i].ucClockIndication == id) && | 1444 | if ((ss_info->info.asSpreadSpectrum[i].ucClockIndication == id) && |
1445 | (clock <= ss_info->info.asSpreadSpectrum[i].ulTargetClockRange)) { | 1445 | (clock <= le32_to_cpu(ss_info->info.asSpreadSpectrum[i].ulTargetClockRange))) { |
1446 | ss->percentage = | 1446 | ss->percentage = |
1447 | le16_to_cpu(ss_info->info.asSpreadSpectrum[i].usSpreadSpectrumPercentage); | 1447 | le16_to_cpu(ss_info->info.asSpreadSpectrum[i].usSpreadSpectrumPercentage); |
1448 | ss->type = ss_info->info.asSpreadSpectrum[i].ucSpreadSpectrumMode; | 1448 | ss->type = ss_info->info.asSpreadSpectrum[i].ucSpreadSpectrumMode; |
@@ -1456,7 +1456,7 @@ bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, | |||
1456 | sizeof(ATOM_ASIC_SS_ASSIGNMENT_V2); | 1456 | sizeof(ATOM_ASIC_SS_ASSIGNMENT_V2); |
1457 | for (i = 0; i < num_indices; i++) { | 1457 | for (i = 0; i < num_indices; i++) { |
1458 | if ((ss_info->info_2.asSpreadSpectrum[i].ucClockIndication == id) && | 1458 | if ((ss_info->info_2.asSpreadSpectrum[i].ucClockIndication == id) && |
1459 | (clock <= ss_info->info_2.asSpreadSpectrum[i].ulTargetClockRange)) { | 1459 | (clock <= le32_to_cpu(ss_info->info_2.asSpreadSpectrum[i].ulTargetClockRange))) { |
1460 | ss->percentage = | 1460 | ss->percentage = |
1461 | le16_to_cpu(ss_info->info_2.asSpreadSpectrum[i].usSpreadSpectrumPercentage); | 1461 | le16_to_cpu(ss_info->info_2.asSpreadSpectrum[i].usSpreadSpectrumPercentage); |
1462 | ss->type = ss_info->info_2.asSpreadSpectrum[i].ucSpreadSpectrumMode; | 1462 | ss->type = ss_info->info_2.asSpreadSpectrum[i].ucSpreadSpectrumMode; |
@@ -1470,7 +1470,7 @@ bool radeon_atombios_get_asic_ss_info(struct radeon_device *rdev, | |||
1470 | sizeof(ATOM_ASIC_SS_ASSIGNMENT_V3); | 1470 | sizeof(ATOM_ASIC_SS_ASSIGNMENT_V3); |
1471 | for (i = 0; i < num_indices; i++) { | 1471 | for (i = 0; i < num_indices; i++) { |
1472 | if ((ss_info->info_3.asSpreadSpectrum[i].ucClockIndication == id) && | 1472 | if ((ss_info->info_3.asSpreadSpectrum[i].ucClockIndication == id) && |
1473 | (clock <= ss_info->info_3.asSpreadSpectrum[i].ulTargetClockRange)) { | 1473 | (clock <= le32_to_cpu(ss_info->info_3.asSpreadSpectrum[i].ulTargetClockRange))) { |
1474 | ss->percentage = | 1474 | ss->percentage = |
1475 | le16_to_cpu(ss_info->info_3.asSpreadSpectrum[i].usSpreadSpectrumPercentage); | 1475 | le16_to_cpu(ss_info->info_3.asSpreadSpectrum[i].usSpreadSpectrumPercentage); |
1476 | ss->type = ss_info->info_3.asSpreadSpectrum[i].ucSpreadSpectrumMode; | 1476 | ss->type = ss_info->info_3.asSpreadSpectrum[i].ucSpreadSpectrumMode; |
@@ -1553,8 +1553,8 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct | |||
1553 | if (misc & ATOM_DOUBLE_CLOCK_MODE) | 1553 | if (misc & ATOM_DOUBLE_CLOCK_MODE) |
1554 | lvds->native_mode.flags |= DRM_MODE_FLAG_DBLSCAN; | 1554 | lvds->native_mode.flags |= DRM_MODE_FLAG_DBLSCAN; |
1555 | 1555 | ||
1556 | lvds->native_mode.width_mm = lvds_info->info.sLCDTiming.usImageHSize; | 1556 | lvds->native_mode.width_mm = le16_to_cpu(lvds_info->info.sLCDTiming.usImageHSize); |
1557 | lvds->native_mode.height_mm = lvds_info->info.sLCDTiming.usImageVSize; | 1557 | lvds->native_mode.height_mm = le16_to_cpu(lvds_info->info.sLCDTiming.usImageVSize); |
1558 | 1558 | ||
1559 | /* set crtc values */ | 1559 | /* set crtc values */ |
1560 | drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); | 1560 | drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V); |
@@ -1569,13 +1569,13 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct | |||
1569 | lvds->linkb = false; | 1569 | lvds->linkb = false; |
1570 | 1570 | ||
1571 | /* parse the lcd record table */ | 1571 | /* parse the lcd record table */ |
1572 | if (lvds_info->info.usModePatchTableOffset) { | 1572 | if (le16_to_cpu(lvds_info->info.usModePatchTableOffset)) { |
1573 | ATOM_FAKE_EDID_PATCH_RECORD *fake_edid_record; | 1573 | ATOM_FAKE_EDID_PATCH_RECORD *fake_edid_record; |
1574 | ATOM_PANEL_RESOLUTION_PATCH_RECORD *panel_res_record; | 1574 | ATOM_PANEL_RESOLUTION_PATCH_RECORD *panel_res_record; |
1575 | bool bad_record = false; | 1575 | bool bad_record = false; |
1576 | u8 *record = (u8 *)(mode_info->atom_context->bios + | 1576 | u8 *record = (u8 *)(mode_info->atom_context->bios + |
1577 | data_offset + | 1577 | data_offset + |
1578 | lvds_info->info.usModePatchTableOffset); | 1578 | le16_to_cpu(lvds_info->info.usModePatchTableOffset)); |
1579 | while (*record != ATOM_RECORD_END_TYPE) { | 1579 | while (*record != ATOM_RECORD_END_TYPE) { |
1580 | switch (*record) { | 1580 | switch (*record) { |
1581 | case LCD_MODE_PATCH_RECORD_MODE_TYPE: | 1581 | case LCD_MODE_PATCH_RECORD_MODE_TYPE: |
@@ -2189,7 +2189,7 @@ static u16 radeon_atombios_get_default_vddc(struct radeon_device *rdev) | |||
2189 | firmware_info = | 2189 | firmware_info = |
2190 | (union firmware_info *)(mode_info->atom_context->bios + | 2190 | (union firmware_info *)(mode_info->atom_context->bios + |
2191 | data_offset); | 2191 | data_offset); |
2192 | vddc = firmware_info->info_14.usBootUpVDDCVoltage; | 2192 | vddc = le16_to_cpu(firmware_info->info_14.usBootUpVDDCVoltage); |
2193 | } | 2193 | } |
2194 | 2194 | ||
2195 | return vddc; | 2195 | return vddc; |
@@ -2284,7 +2284,7 @@ static bool radeon_atombios_parse_pplib_clock_info(struct radeon_device *rdev, | |||
2284 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = | 2284 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = |
2285 | VOLTAGE_SW; | 2285 | VOLTAGE_SW; |
2286 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = | 2286 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = |
2287 | clock_info->evergreen.usVDDC; | 2287 | le16_to_cpu(clock_info->evergreen.usVDDC); |
2288 | } else { | 2288 | } else { |
2289 | sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); | 2289 | sclk = le16_to_cpu(clock_info->r600.usEngineClockLow); |
2290 | sclk |= clock_info->r600.ucEngineClockHigh << 16; | 2290 | sclk |= clock_info->r600.ucEngineClockHigh << 16; |
@@ -2295,7 +2295,7 @@ static bool radeon_atombios_parse_pplib_clock_info(struct radeon_device *rdev, | |||
2295 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = | 2295 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.type = |
2296 | VOLTAGE_SW; | 2296 | VOLTAGE_SW; |
2297 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = | 2297 | rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = |
2298 | clock_info->r600.usVDDC; | 2298 | le16_to_cpu(clock_info->r600.usVDDC); |
2299 | } | 2299 | } |
2300 | 2300 | ||
2301 | if (rdev->flags & RADEON_IS_IGP) { | 2301 | if (rdev->flags & RADEON_IS_IGP) { |
@@ -2408,13 +2408,13 @@ static int radeon_atombios_parse_power_table_6(struct radeon_device *rdev) | |||
2408 | radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController); | 2408 | radeon_atombios_add_pplib_thermal_controller(rdev, &power_info->pplib.sThermalController); |
2409 | state_array = (struct StateArray *) | 2409 | state_array = (struct StateArray *) |
2410 | (mode_info->atom_context->bios + data_offset + | 2410 | (mode_info->atom_context->bios + data_offset + |
2411 | power_info->pplib.usStateArrayOffset); | 2411 | le16_to_cpu(power_info->pplib.usStateArrayOffset)); |
2412 | clock_info_array = (struct ClockInfoArray *) | 2412 | clock_info_array = (struct ClockInfoArray *) |
2413 | (mode_info->atom_context->bios + data_offset + | 2413 | (mode_info->atom_context->bios + data_offset + |
2414 | power_info->pplib.usClockInfoArrayOffset); | 2414 | le16_to_cpu(power_info->pplib.usClockInfoArrayOffset)); |
2415 | non_clock_info_array = (struct NonClockInfoArray *) | 2415 | non_clock_info_array = (struct NonClockInfoArray *) |
2416 | (mode_info->atom_context->bios + data_offset + | 2416 | (mode_info->atom_context->bios + data_offset + |
2417 | power_info->pplib.usNonClockInfoArrayOffset); | 2417 | le16_to_cpu(power_info->pplib.usNonClockInfoArrayOffset)); |
2418 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state) * | 2418 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state) * |
2419 | state_array->ucNumEntries, GFP_KERNEL); | 2419 | state_array->ucNumEntries, GFP_KERNEL); |
2420 | if (!rdev->pm.power_state) | 2420 | if (!rdev->pm.power_state) |
@@ -2533,7 +2533,7 @@ uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev) | |||
2533 | int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock); | 2533 | int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock); |
2534 | 2534 | ||
2535 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 2535 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
2536 | return args.ulReturnEngineClock; | 2536 | return le32_to_cpu(args.ulReturnEngineClock); |
2537 | } | 2537 | } |
2538 | 2538 | ||
2539 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev) | 2539 | uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev) |
@@ -2542,7 +2542,7 @@ uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev) | |||
2542 | int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock); | 2542 | int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock); |
2543 | 2543 | ||
2544 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 2544 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
2545 | return args.ulReturnMemoryClock; | 2545 | return le32_to_cpu(args.ulReturnMemoryClock); |
2546 | } | 2546 | } |
2547 | 2547 | ||
2548 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, | 2548 | void radeon_atom_set_engine_clock(struct radeon_device *rdev, |
@@ -2551,7 +2551,7 @@ void radeon_atom_set_engine_clock(struct radeon_device *rdev, | |||
2551 | SET_ENGINE_CLOCK_PS_ALLOCATION args; | 2551 | SET_ENGINE_CLOCK_PS_ALLOCATION args; |
2552 | int index = GetIndexIntoMasterTable(COMMAND, SetEngineClock); | 2552 | int index = GetIndexIntoMasterTable(COMMAND, SetEngineClock); |
2553 | 2553 | ||
2554 | args.ulTargetEngineClock = eng_clock; /* 10 khz */ | 2554 | args.ulTargetEngineClock = cpu_to_le32(eng_clock); /* 10 khz */ |
2555 | 2555 | ||
2556 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 2556 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
2557 | } | 2557 | } |
@@ -2565,7 +2565,7 @@ void radeon_atom_set_memory_clock(struct radeon_device *rdev, | |||
2565 | if (rdev->flags & RADEON_IS_IGP) | 2565 | if (rdev->flags & RADEON_IS_IGP) |
2566 | return; | 2566 | return; |
2567 | 2567 | ||
2568 | args.ulTargetMemoryClock = mem_clock; /* 10 khz */ | 2568 | args.ulTargetMemoryClock = cpu_to_le32(mem_clock); /* 10 khz */ |
2569 | 2569 | ||
2570 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); | 2570 | atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); |
2571 | } | 2571 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index d27ef74590cd..cf7c8d5b4ec2 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -1504,6 +1504,11 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1504 | (rdev->pdev->subsystem_device == 0x4a48)) { | 1504 | (rdev->pdev->subsystem_device == 0x4a48)) { |
1505 | /* Mac X800 */ | 1505 | /* Mac X800 */ |
1506 | rdev->mode_info.connector_table = CT_MAC_X800; | 1506 | rdev->mode_info.connector_table = CT_MAC_X800; |
1507 | } else if ((rdev->pdev->device == 0x4150) && | ||
1508 | (rdev->pdev->subsystem_vendor == 0x1002) && | ||
1509 | (rdev->pdev->subsystem_device == 0x4150)) { | ||
1510 | /* Mac G5 9600 */ | ||
1511 | rdev->mode_info.connector_table = CT_MAC_G5_9600; | ||
1507 | } else | 1512 | } else |
1508 | #endif /* CONFIG_PPC_PMAC */ | 1513 | #endif /* CONFIG_PPC_PMAC */ |
1509 | #ifdef CONFIG_PPC64 | 1514 | #ifdef CONFIG_PPC64 |
@@ -2022,6 +2027,48 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
2022 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, | 2027 | CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, |
2023 | &hpd); | 2028 | &hpd); |
2024 | break; | 2029 | break; |
2030 | case CT_MAC_G5_9600: | ||
2031 | DRM_INFO("Connector Table: %d (mac g5 9600)\n", | ||
2032 | rdev->mode_info.connector_table); | ||
2033 | /* DVI - tv dac, dvo */ | ||
2034 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); | ||
2035 | hpd.hpd = RADEON_HPD_1; /* ??? */ | ||
2036 | radeon_add_legacy_encoder(dev, | ||
2037 | radeon_get_encoder_enum(dev, | ||
2038 | ATOM_DEVICE_DFP2_SUPPORT, | ||
2039 | 0), | ||
2040 | ATOM_DEVICE_DFP2_SUPPORT); | ||
2041 | radeon_add_legacy_encoder(dev, | ||
2042 | radeon_get_encoder_enum(dev, | ||
2043 | ATOM_DEVICE_CRT2_SUPPORT, | ||
2044 | 2), | ||
2045 | ATOM_DEVICE_CRT2_SUPPORT); | ||
2046 | radeon_add_legacy_connector(dev, 0, | ||
2047 | ATOM_DEVICE_DFP2_SUPPORT | | ||
2048 | ATOM_DEVICE_CRT2_SUPPORT, | ||
2049 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, | ||
2050 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, | ||
2051 | &hpd); | ||
2052 | /* ADC - primary dac, internal tmds */ | ||
2053 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | ||
2054 | hpd.hpd = RADEON_HPD_2; /* ??? */ | ||
2055 | radeon_add_legacy_encoder(dev, | ||
2056 | radeon_get_encoder_enum(dev, | ||
2057 | ATOM_DEVICE_DFP1_SUPPORT, | ||
2058 | 0), | ||
2059 | ATOM_DEVICE_DFP1_SUPPORT); | ||
2060 | radeon_add_legacy_encoder(dev, | ||
2061 | radeon_get_encoder_enum(dev, | ||
2062 | ATOM_DEVICE_CRT1_SUPPORT, | ||
2063 | 1), | ||
2064 | ATOM_DEVICE_CRT1_SUPPORT); | ||
2065 | radeon_add_legacy_connector(dev, 1, | ||
2066 | ATOM_DEVICE_DFP1_SUPPORT | | ||
2067 | ATOM_DEVICE_CRT1_SUPPORT, | ||
2068 | DRM_MODE_CONNECTOR_DVII, &ddc_i2c, | ||
2069 | CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I, | ||
2070 | &hpd); | ||
2071 | break; | ||
2025 | default: | 2072 | default: |
2026 | DRM_INFO("Connector table: %d (invalid)\n", | 2073 | DRM_INFO("Connector table: %d (invalid)\n", |
2027 | rdev->mode_info.connector_table); | 2074 | rdev->mode_info.connector_table); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 0d478932b1a9..4954e2d6ffa2 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -936,8 +936,11 @@ int radeon_resume_kms(struct drm_device *dev) | |||
936 | int radeon_gpu_reset(struct radeon_device *rdev) | 936 | int radeon_gpu_reset(struct radeon_device *rdev) |
937 | { | 937 | { |
938 | int r; | 938 | int r; |
939 | int resched; | ||
939 | 940 | ||
940 | radeon_save_bios_scratch_regs(rdev); | 941 | radeon_save_bios_scratch_regs(rdev); |
942 | /* block TTM */ | ||
943 | resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); | ||
941 | radeon_suspend(rdev); | 944 | radeon_suspend(rdev); |
942 | 945 | ||
943 | r = radeon_asic_reset(rdev); | 946 | r = radeon_asic_reset(rdev); |
@@ -946,6 +949,7 @@ int radeon_gpu_reset(struct radeon_device *rdev) | |||
946 | radeon_resume(rdev); | 949 | radeon_resume(rdev); |
947 | radeon_restore_bios_scratch_regs(rdev); | 950 | radeon_restore_bios_scratch_regs(rdev); |
948 | drm_helper_resume_force_mode(rdev->ddev); | 951 | drm_helper_resume_force_mode(rdev->ddev); |
952 | ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); | ||
949 | return 0; | 953 | return 0; |
950 | } | 954 | } |
951 | /* bad news, how to tell it to userspace ? */ | 955 | /* bad news, how to tell it to userspace ? */ |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 2eff98cfd728..0e657095de7c 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -793,6 +793,11 @@ static void avivo_get_fb_div(struct radeon_pll *pll, | |||
793 | tmp *= target_clock; | 793 | tmp *= target_clock; |
794 | *fb_div = tmp / pll->reference_freq; | 794 | *fb_div = tmp / pll->reference_freq; |
795 | *frac_fb_div = tmp % pll->reference_freq; | 795 | *frac_fb_div = tmp % pll->reference_freq; |
796 | |||
797 | if (*fb_div > pll->max_feedback_div) | ||
798 | *fb_div = pll->max_feedback_div; | ||
799 | else if (*fb_div < pll->min_feedback_div) | ||
800 | *fb_div = pll->min_feedback_div; | ||
796 | } | 801 | } |
797 | 802 | ||
798 | static u32 avivo_get_post_div(struct radeon_pll *pll, | 803 | static u32 avivo_get_post_div(struct radeon_pll *pll, |
@@ -826,6 +831,11 @@ static u32 avivo_get_post_div(struct radeon_pll *pll, | |||
826 | post_div--; | 831 | post_div--; |
827 | } | 832 | } |
828 | 833 | ||
834 | if (post_div > pll->max_post_div) | ||
835 | post_div = pll->max_post_div; | ||
836 | else if (post_div < pll->min_post_div) | ||
837 | post_div = pll->min_post_div; | ||
838 | |||
829 | return post_div; | 839 | return post_div; |
830 | } | 840 | } |
831 | 841 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_drv.h b/drivers/gpu/drm/radeon/radeon_drv.h index 448eba89d1e6..5cba46b9779a 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.h +++ b/drivers/gpu/drm/radeon/radeon_drv.h | |||
@@ -1524,6 +1524,7 @@ extern u32 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index); | |||
1524 | #define R600_CP_RB_CNTL 0xc104 | 1524 | #define R600_CP_RB_CNTL 0xc104 |
1525 | # define R600_RB_BUFSZ(x) ((x) << 0) | 1525 | # define R600_RB_BUFSZ(x) ((x) << 0) |
1526 | # define R600_RB_BLKSZ(x) ((x) << 8) | 1526 | # define R600_RB_BLKSZ(x) ((x) << 8) |
1527 | # define R600_BUF_SWAP_32BIT (2 << 16) | ||
1527 | # define R600_RB_NO_UPDATE (1 << 27) | 1528 | # define R600_RB_NO_UPDATE (1 << 27) |
1528 | # define R600_RB_RPTR_WR_ENA (1 << 31) | 1529 | # define R600_RB_RPTR_WR_ENA (1 << 31) |
1529 | #define R600_CP_RB_RPTR_WR 0xc108 | 1530 | #define R600_CP_RB_RPTR_WR 0xc108 |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index d4a542247618..b4274883227f 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -910,7 +910,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
910 | 910 | ||
911 | args.v1.ucAction = action; | 911 | args.v1.ucAction = action; |
912 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { | 912 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { |
913 | args.v1.usInitInfo = connector_object_id; | 913 | args.v1.usInitInfo = cpu_to_le16(connector_object_id); |
914 | } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) { | 914 | } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) { |
915 | args.v1.asMode.ucLaneSel = lane_num; | 915 | args.v1.asMode.ucLaneSel = lane_num; |
916 | args.v1.asMode.ucLaneSet = lane_set; | 916 | args.v1.asMode.ucLaneSet = lane_set; |
@@ -1140,7 +1140,7 @@ atombios_external_encoder_setup(struct drm_encoder *encoder, | |||
1140 | case 3: | 1140 | case 3: |
1141 | args.v3.sExtEncoder.ucAction = action; | 1141 | args.v3.sExtEncoder.ucAction = action; |
1142 | if (action == EXTERNAL_ENCODER_ACTION_V3_ENCODER_INIT) | 1142 | if (action == EXTERNAL_ENCODER_ACTION_V3_ENCODER_INIT) |
1143 | args.v3.sExtEncoder.usConnectorId = connector_object_id; | 1143 | args.v3.sExtEncoder.usConnectorId = cpu_to_le16(connector_object_id); |
1144 | else | 1144 | else |
1145 | args.v3.sExtEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); | 1145 | args.v3.sExtEncoder.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); |
1146 | args.v3.sExtEncoder.ucEncoderMode = atombios_get_encoder_mode(encoder); | 1146 | args.v3.sExtEncoder.ucEncoderMode = atombios_get_encoder_mode(encoder); |
@@ -1570,11 +1570,21 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder, | |||
1570 | } | 1570 | } |
1571 | 1571 | ||
1572 | /* set scaler clears this on some chips */ | 1572 | /* set scaler clears this on some chips */ |
1573 | /* XXX check DCE4 */ | 1573 | if (ASIC_IS_AVIVO(rdev) && |
1574 | if (!(radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))) { | 1574 | (!(radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)))) { |
1575 | if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE)) | 1575 | if (ASIC_IS_DCE4(rdev)) { |
1576 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, | 1576 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) |
1577 | AVIVO_D1MODE_INTERLEAVE_EN); | 1577 | WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset, |
1578 | EVERGREEN_INTERLEAVE_EN); | ||
1579 | else | ||
1580 | WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset, 0); | ||
1581 | } else { | ||
1582 | if (mode->flags & DRM_MODE_FLAG_INTERLACE) | ||
1583 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, | ||
1584 | AVIVO_D1MODE_INTERLEAVE_EN); | ||
1585 | else | ||
1586 | WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, 0); | ||
1587 | } | ||
1578 | } | 1588 | } |
1579 | } | 1589 | } |
1580 | 1590 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 6794cdf91f28..a670caaee29e 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -209,6 +209,7 @@ enum radeon_connector_table { | |||
209 | CT_EMAC, | 209 | CT_EMAC, |
210 | CT_RN50_POWER, | 210 | CT_RN50_POWER, |
211 | CT_MAC_X800, | 211 | CT_MAC_X800, |
212 | CT_MAC_G5_9600, | ||
212 | }; | 213 | }; |
213 | 214 | ||
214 | enum radeon_dvo_chip { | 215 | enum radeon_dvo_chip { |
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 1272e4b6a1d4..e5b2cf10cbf4 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c | |||
@@ -787,9 +787,9 @@ static int radeon_ttm_debugfs_init(struct radeon_device *rdev) | |||
787 | radeon_mem_types_list[i].show = &radeon_mm_dump_table; | 787 | radeon_mem_types_list[i].show = &radeon_mm_dump_table; |
788 | radeon_mem_types_list[i].driver_features = 0; | 788 | radeon_mem_types_list[i].driver_features = 0; |
789 | if (i == 0) | 789 | if (i == 0) |
790 | radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].priv; | 790 | radeon_mem_types_list[i].data = rdev->mman.bdev.man[TTM_PL_VRAM].priv; |
791 | else | 791 | else |
792 | radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].priv; | 792 | radeon_mem_types_list[i].data = rdev->mman.bdev.man[TTM_PL_TT].priv; |
793 | 793 | ||
794 | } | 794 | } |
795 | /* Add ttm page pool to debugfs */ | 795 | /* Add ttm page pool to debugfs */ |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r300 b/drivers/gpu/drm/radeon/reg_srcs/r300 index b506ec1cab4b..e8a1786b6426 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/r300 +++ b/drivers/gpu/drm/radeon/reg_srcs/r300 | |||
@@ -683,9 +683,7 @@ r300 0x4f60 | |||
683 | 0x4DF4 US_ALU_CONST_G_31 | 683 | 0x4DF4 US_ALU_CONST_G_31 |
684 | 0x4DF8 US_ALU_CONST_B_31 | 684 | 0x4DF8 US_ALU_CONST_B_31 |
685 | 0x4DFC US_ALU_CONST_A_31 | 685 | 0x4DFC US_ALU_CONST_A_31 |
686 | 0x4E04 RB3D_BLENDCNTL_R3 | ||
687 | 0x4E08 RB3D_ABLENDCNTL_R3 | 686 | 0x4E08 RB3D_ABLENDCNTL_R3 |
688 | 0x4E0C RB3D_COLOR_CHANNEL_MASK | ||
689 | 0x4E10 RB3D_CONSTANT_COLOR | 687 | 0x4E10 RB3D_CONSTANT_COLOR |
690 | 0x4E14 RB3D_COLOR_CLEAR_VALUE | 688 | 0x4E14 RB3D_COLOR_CLEAR_VALUE |
691 | 0x4E18 RB3D_ROPCNTL_R3 | 689 | 0x4E18 RB3D_ROPCNTL_R3 |
@@ -706,13 +704,11 @@ r300 0x4f60 | |||
706 | 0x4E74 RB3D_CMASK_WRINDEX | 704 | 0x4E74 RB3D_CMASK_WRINDEX |
707 | 0x4E78 RB3D_CMASK_DWORD | 705 | 0x4E78 RB3D_CMASK_DWORD |
708 | 0x4E7C RB3D_CMASK_RDINDEX | 706 | 0x4E7C RB3D_CMASK_RDINDEX |
709 | 0x4E80 RB3D_AARESOLVE_OFFSET | ||
710 | 0x4E84 RB3D_AARESOLVE_PITCH | ||
711 | 0x4E88 RB3D_AARESOLVE_CTL | ||
712 | 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD | 707 | 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD |
713 | 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD | 708 | 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD |
714 | 0x4F04 ZB_ZSTENCILCNTL | 709 | 0x4F04 ZB_ZSTENCILCNTL |
715 | 0x4F08 ZB_STENCILREFMASK | 710 | 0x4F08 ZB_STENCILREFMASK |
716 | 0x4F14 ZB_ZTOP | 711 | 0x4F14 ZB_ZTOP |
717 | 0x4F18 ZB_ZCACHE_CTLSTAT | 712 | 0x4F18 ZB_ZCACHE_CTLSTAT |
713 | 0x4F28 ZB_DEPTHCLEARVALUE | ||
718 | 0x4F58 ZB_ZPASS_DATA | 714 | 0x4F58 ZB_ZPASS_DATA |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r420 b/drivers/gpu/drm/radeon/reg_srcs/r420 index 8c1214c2390f..722074e21e2f 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/r420 +++ b/drivers/gpu/drm/radeon/reg_srcs/r420 | |||
@@ -130,7 +130,6 @@ r420 0x4f60 | |||
130 | 0x401C GB_SELECT | 130 | 0x401C GB_SELECT |
131 | 0x4020 GB_AA_CONFIG | 131 | 0x4020 GB_AA_CONFIG |
132 | 0x4024 GB_FIFO_SIZE | 132 | 0x4024 GB_FIFO_SIZE |
133 | 0x4028 GB_Z_PEQ_CONFIG | ||
134 | 0x4100 TX_INVALTAGS | 133 | 0x4100 TX_INVALTAGS |
135 | 0x4200 GA_POINT_S0 | 134 | 0x4200 GA_POINT_S0 |
136 | 0x4204 GA_POINT_T0 | 135 | 0x4204 GA_POINT_T0 |
@@ -750,9 +749,7 @@ r420 0x4f60 | |||
750 | 0x4DF4 US_ALU_CONST_G_31 | 749 | 0x4DF4 US_ALU_CONST_G_31 |
751 | 0x4DF8 US_ALU_CONST_B_31 | 750 | 0x4DF8 US_ALU_CONST_B_31 |
752 | 0x4DFC US_ALU_CONST_A_31 | 751 | 0x4DFC US_ALU_CONST_A_31 |
753 | 0x4E04 RB3D_BLENDCNTL_R3 | ||
754 | 0x4E08 RB3D_ABLENDCNTL_R3 | 752 | 0x4E08 RB3D_ABLENDCNTL_R3 |
755 | 0x4E0C RB3D_COLOR_CHANNEL_MASK | ||
756 | 0x4E10 RB3D_CONSTANT_COLOR | 753 | 0x4E10 RB3D_CONSTANT_COLOR |
757 | 0x4E14 RB3D_COLOR_CLEAR_VALUE | 754 | 0x4E14 RB3D_COLOR_CLEAR_VALUE |
758 | 0x4E18 RB3D_ROPCNTL_R3 | 755 | 0x4E18 RB3D_ROPCNTL_R3 |
@@ -773,13 +770,11 @@ r420 0x4f60 | |||
773 | 0x4E74 RB3D_CMASK_WRINDEX | 770 | 0x4E74 RB3D_CMASK_WRINDEX |
774 | 0x4E78 RB3D_CMASK_DWORD | 771 | 0x4E78 RB3D_CMASK_DWORD |
775 | 0x4E7C RB3D_CMASK_RDINDEX | 772 | 0x4E7C RB3D_CMASK_RDINDEX |
776 | 0x4E80 RB3D_AARESOLVE_OFFSET | ||
777 | 0x4E84 RB3D_AARESOLVE_PITCH | ||
778 | 0x4E88 RB3D_AARESOLVE_CTL | ||
779 | 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD | 773 | 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD |
780 | 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD | 774 | 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD |
781 | 0x4F04 ZB_ZSTENCILCNTL | 775 | 0x4F04 ZB_ZSTENCILCNTL |
782 | 0x4F08 ZB_STENCILREFMASK | 776 | 0x4F08 ZB_STENCILREFMASK |
783 | 0x4F14 ZB_ZTOP | 777 | 0x4F14 ZB_ZTOP |
784 | 0x4F18 ZB_ZCACHE_CTLSTAT | 778 | 0x4F18 ZB_ZCACHE_CTLSTAT |
779 | 0x4F28 ZB_DEPTHCLEARVALUE | ||
785 | 0x4F58 ZB_ZPASS_DATA | 780 | 0x4F58 ZB_ZPASS_DATA |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600 index 0828d80396f2..d9f62866bbc1 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/rs600 +++ b/drivers/gpu/drm/radeon/reg_srcs/rs600 | |||
@@ -749,9 +749,7 @@ rs600 0x6d40 | |||
749 | 0x4DF4 US_ALU_CONST_G_31 | 749 | 0x4DF4 US_ALU_CONST_G_31 |
750 | 0x4DF8 US_ALU_CONST_B_31 | 750 | 0x4DF8 US_ALU_CONST_B_31 |
751 | 0x4DFC US_ALU_CONST_A_31 | 751 | 0x4DFC US_ALU_CONST_A_31 |
752 | 0x4E04 RB3D_BLENDCNTL_R3 | ||
753 | 0x4E08 RB3D_ABLENDCNTL_R3 | 752 | 0x4E08 RB3D_ABLENDCNTL_R3 |
754 | 0x4E0C RB3D_COLOR_CHANNEL_MASK | ||
755 | 0x4E10 RB3D_CONSTANT_COLOR | 753 | 0x4E10 RB3D_CONSTANT_COLOR |
756 | 0x4E14 RB3D_COLOR_CLEAR_VALUE | 754 | 0x4E14 RB3D_COLOR_CLEAR_VALUE |
757 | 0x4E18 RB3D_ROPCNTL_R3 | 755 | 0x4E18 RB3D_ROPCNTL_R3 |
@@ -772,13 +770,11 @@ rs600 0x6d40 | |||
772 | 0x4E74 RB3D_CMASK_WRINDEX | 770 | 0x4E74 RB3D_CMASK_WRINDEX |
773 | 0x4E78 RB3D_CMASK_DWORD | 771 | 0x4E78 RB3D_CMASK_DWORD |
774 | 0x4E7C RB3D_CMASK_RDINDEX | 772 | 0x4E7C RB3D_CMASK_RDINDEX |
775 | 0x4E80 RB3D_AARESOLVE_OFFSET | ||
776 | 0x4E84 RB3D_AARESOLVE_PITCH | ||
777 | 0x4E88 RB3D_AARESOLVE_CTL | ||
778 | 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD | 773 | 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD |
779 | 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD | 774 | 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD |
780 | 0x4F04 ZB_ZSTENCILCNTL | 775 | 0x4F04 ZB_ZSTENCILCNTL |
781 | 0x4F08 ZB_STENCILREFMASK | 776 | 0x4F08 ZB_STENCILREFMASK |
782 | 0x4F14 ZB_ZTOP | 777 | 0x4F14 ZB_ZTOP |
783 | 0x4F18 ZB_ZCACHE_CTLSTAT | 778 | 0x4F18 ZB_ZCACHE_CTLSTAT |
779 | 0x4F28 ZB_DEPTHCLEARVALUE | ||
784 | 0x4F58 ZB_ZPASS_DATA | 780 | 0x4F58 ZB_ZPASS_DATA |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515 index ef422bbacfc1..911a8fbd32bb 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/rv515 +++ b/drivers/gpu/drm/radeon/reg_srcs/rv515 | |||
@@ -164,7 +164,6 @@ rv515 0x6d40 | |||
164 | 0x401C GB_SELECT | 164 | 0x401C GB_SELECT |
165 | 0x4020 GB_AA_CONFIG | 165 | 0x4020 GB_AA_CONFIG |
166 | 0x4024 GB_FIFO_SIZE | 166 | 0x4024 GB_FIFO_SIZE |
167 | 0x4028 GB_Z_PEQ_CONFIG | ||
168 | 0x4100 TX_INVALTAGS | 167 | 0x4100 TX_INVALTAGS |
169 | 0x4114 SU_TEX_WRAP_PS3 | 168 | 0x4114 SU_TEX_WRAP_PS3 |
170 | 0x4118 PS3_ENABLE | 169 | 0x4118 PS3_ENABLE |
@@ -461,9 +460,7 @@ rv515 0x6d40 | |||
461 | 0x4DF4 US_ALU_CONST_G_31 | 460 | 0x4DF4 US_ALU_CONST_G_31 |
462 | 0x4DF8 US_ALU_CONST_B_31 | 461 | 0x4DF8 US_ALU_CONST_B_31 |
463 | 0x4DFC US_ALU_CONST_A_31 | 462 | 0x4DFC US_ALU_CONST_A_31 |
464 | 0x4E04 RB3D_BLENDCNTL_R3 | ||
465 | 0x4E08 RB3D_ABLENDCNTL_R3 | 463 | 0x4E08 RB3D_ABLENDCNTL_R3 |
466 | 0x4E0C RB3D_COLOR_CHANNEL_MASK | ||
467 | 0x4E10 RB3D_CONSTANT_COLOR | 464 | 0x4E10 RB3D_CONSTANT_COLOR |
468 | 0x4E14 RB3D_COLOR_CLEAR_VALUE | 465 | 0x4E14 RB3D_COLOR_CLEAR_VALUE |
469 | 0x4E18 RB3D_ROPCNTL_R3 | 466 | 0x4E18 RB3D_ROPCNTL_R3 |
@@ -484,9 +481,6 @@ rv515 0x6d40 | |||
484 | 0x4E74 RB3D_CMASK_WRINDEX | 481 | 0x4E74 RB3D_CMASK_WRINDEX |
485 | 0x4E78 RB3D_CMASK_DWORD | 482 | 0x4E78 RB3D_CMASK_DWORD |
486 | 0x4E7C RB3D_CMASK_RDINDEX | 483 | 0x4E7C RB3D_CMASK_RDINDEX |
487 | 0x4E80 RB3D_AARESOLVE_OFFSET | ||
488 | 0x4E84 RB3D_AARESOLVE_PITCH | ||
489 | 0x4E88 RB3D_AARESOLVE_CTL | ||
490 | 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD | 484 | 0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD |
491 | 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD | 485 | 0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD |
492 | 0x4EF8 RB3D_CONSTANT_COLOR_AR | 486 | 0x4EF8 RB3D_CONSTANT_COLOR_AR |
@@ -496,4 +490,5 @@ rv515 0x6d40 | |||
496 | 0x4F14 ZB_ZTOP | 490 | 0x4F14 ZB_ZTOP |
497 | 0x4F18 ZB_ZCACHE_CTLSTAT | 491 | 0x4F18 ZB_ZCACHE_CTLSTAT |
498 | 0x4F58 ZB_ZPASS_DATA | 492 | 0x4F58 ZB_ZPASS_DATA |
493 | 0x4F28 ZB_DEPTHCLEARVALUE | ||
499 | 0x4FD4 ZB_STENCILREFMASK_BF | 494 | 0x4FD4 ZB_STENCILREFMASK_BF |
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c index 0137d3e3728d..6638c8e4c81b 100644 --- a/drivers/gpu/drm/radeon/rs690.c +++ b/drivers/gpu/drm/radeon/rs690.c | |||
@@ -77,9 +77,9 @@ void rs690_pm_info(struct radeon_device *rdev) | |||
77 | switch (crev) { | 77 | switch (crev) { |
78 | case 1: | 78 | case 1: |
79 | tmp.full = dfixed_const(100); | 79 | tmp.full = dfixed_const(100); |
80 | rdev->pm.igp_sideport_mclk.full = dfixed_const(info->info.ulBootUpMemoryClock); | 80 | rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info.ulBootUpMemoryClock)); |
81 | rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); | 81 | rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); |
82 | if (info->info.usK8MemoryClock) | 82 | if (le16_to_cpu(info->info.usK8MemoryClock)) |
83 | rdev->pm.igp_system_mclk.full = dfixed_const(le16_to_cpu(info->info.usK8MemoryClock)); | 83 | rdev->pm.igp_system_mclk.full = dfixed_const(le16_to_cpu(info->info.usK8MemoryClock)); |
84 | else if (rdev->clock.default_mclk) { | 84 | else if (rdev->clock.default_mclk) { |
85 | rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); | 85 | rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); |
@@ -91,16 +91,16 @@ void rs690_pm_info(struct radeon_device *rdev) | |||
91 | break; | 91 | break; |
92 | case 2: | 92 | case 2: |
93 | tmp.full = dfixed_const(100); | 93 | tmp.full = dfixed_const(100); |
94 | rdev->pm.igp_sideport_mclk.full = dfixed_const(info->info_v2.ulBootUpSidePortClock); | 94 | rdev->pm.igp_sideport_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpSidePortClock)); |
95 | rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); | 95 | rdev->pm.igp_sideport_mclk.full = dfixed_div(rdev->pm.igp_sideport_mclk, tmp); |
96 | if (info->info_v2.ulBootUpUMAClock) | 96 | if (le32_to_cpu(info->info_v2.ulBootUpUMAClock)) |
97 | rdev->pm.igp_system_mclk.full = dfixed_const(info->info_v2.ulBootUpUMAClock); | 97 | rdev->pm.igp_system_mclk.full = dfixed_const(le32_to_cpu(info->info_v2.ulBootUpUMAClock)); |
98 | else if (rdev->clock.default_mclk) | 98 | else if (rdev->clock.default_mclk) |
99 | rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); | 99 | rdev->pm.igp_system_mclk.full = dfixed_const(rdev->clock.default_mclk); |
100 | else | 100 | else |
101 | rdev->pm.igp_system_mclk.full = dfixed_const(66700); | 101 | rdev->pm.igp_system_mclk.full = dfixed_const(66700); |
102 | rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp); | 102 | rdev->pm.igp_system_mclk.full = dfixed_div(rdev->pm.igp_system_mclk, tmp); |
103 | rdev->pm.igp_ht_link_clk.full = dfixed_const(info->info_v2.ulHTLinkFreq); | 103 | rdev->pm.igp_ht_link_clk.full = dfixed_const(le32_to_cpu(info->info_v2.ulHTLinkFreq)); |
104 | rdev->pm.igp_ht_link_clk.full = dfixed_div(rdev->pm.igp_ht_link_clk, tmp); | 104 | rdev->pm.igp_ht_link_clk.full = dfixed_div(rdev->pm.igp_ht_link_clk, tmp); |
105 | rdev->pm.igp_ht_link_width.full = dfixed_const(le16_to_cpu(info->info_v2.usMinHTLinkWidth)); | 105 | rdev->pm.igp_ht_link_width.full = dfixed_const(le16_to_cpu(info->info_v2.usMinHTLinkWidth)); |
106 | break; | 106 | break; |
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c index 2211a323db41..d8ba67690656 100644 --- a/drivers/gpu/drm/radeon/rv770.c +++ b/drivers/gpu/drm/radeon/rv770.c | |||
@@ -321,7 +321,11 @@ static int rv770_cp_load_microcode(struct radeon_device *rdev) | |||
321 | return -EINVAL; | 321 | return -EINVAL; |
322 | 322 | ||
323 | r700_cp_stop(rdev); | 323 | r700_cp_stop(rdev); |
324 | WREG32(CP_RB_CNTL, RB_NO_UPDATE | (15 << 8) | (3 << 0)); | 324 | WREG32(CP_RB_CNTL, |
325 | #ifdef __BIG_ENDIAN | ||
326 | BUF_SWAP_32BIT | | ||
327 | #endif | ||
328 | RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); | ||
325 | 329 | ||
326 | /* Reset cp */ | 330 | /* Reset cp */ |
327 | WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); | 331 | WREG32(GRBM_SOFT_RESET, SOFT_RESET_CP); |
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h index abc8cf5a3672..79fa588e9ed5 100644 --- a/drivers/gpu/drm/radeon/rv770d.h +++ b/drivers/gpu/drm/radeon/rv770d.h | |||
@@ -76,10 +76,10 @@ | |||
76 | #define ROQ_IB1_START(x) ((x) << 0) | 76 | #define ROQ_IB1_START(x) ((x) << 0) |
77 | #define ROQ_IB2_START(x) ((x) << 8) | 77 | #define ROQ_IB2_START(x) ((x) << 8) |
78 | #define CP_RB_CNTL 0xC104 | 78 | #define CP_RB_CNTL 0xC104 |
79 | #define RB_BUFSZ(x) ((x)<<0) | 79 | #define RB_BUFSZ(x) ((x) << 0) |
80 | #define RB_BLKSZ(x) ((x)<<8) | 80 | #define RB_BLKSZ(x) ((x) << 8) |
81 | #define RB_NO_UPDATE (1<<27) | 81 | #define RB_NO_UPDATE (1 << 27) |
82 | #define RB_RPTR_WR_ENA (1<<31) | 82 | #define RB_RPTR_WR_ENA (1 << 31) |
83 | #define BUF_SWAP_32BIT (2 << 16) | 83 | #define BUF_SWAP_32BIT (2 << 16) |
84 | #define CP_RB_RPTR 0x8700 | 84 | #define CP_RB_RPTR 0x8700 |
85 | #define CP_RB_RPTR_ADDR 0xC10C | 85 | #define CP_RB_RPTR_ADDR 0xC10C |
diff --git a/drivers/hwmon/emc1403.c b/drivers/hwmon/emc1403.c index 5dea9faa1656..cd2a6e437aec 100644 --- a/drivers/hwmon/emc1403.c +++ b/drivers/hwmon/emc1403.c | |||
@@ -344,7 +344,7 @@ static int emc1403_remove(struct i2c_client *client) | |||
344 | } | 344 | } |
345 | 345 | ||
346 | static const unsigned short emc1403_address_list[] = { | 346 | static const unsigned short emc1403_address_list[] = { |
347 | 0x18, 0x2a, 0x4c, 0x4d, I2C_CLIENT_END | 347 | 0x18, 0x29, 0x4c, 0x4d, I2C_CLIENT_END |
348 | }; | 348 | }; |
349 | 349 | ||
350 | static const struct i2c_device_id emc1403_idtable[] = { | 350 | static const struct i2c_device_id emc1403_idtable[] = { |
diff --git a/drivers/hwmon/lm63.c b/drivers/hwmon/lm63.c index 776aeb3019d2..508cb291f71b 100644 --- a/drivers/hwmon/lm63.c +++ b/drivers/hwmon/lm63.c | |||
@@ -98,6 +98,9 @@ static const unsigned short normal_i2c[] = { 0x18, 0x4c, 0x4e, I2C_CLIENT_END }; | |||
98 | * value, it uses signed 8-bit values with LSB = 1 degree Celsius. | 98 | * value, it uses signed 8-bit values with LSB = 1 degree Celsius. |
99 | * For remote temperature, low and high limits, it uses signed 11-bit values | 99 | * For remote temperature, low and high limits, it uses signed 11-bit values |
100 | * with LSB = 0.125 degree Celsius, left-justified in 16-bit registers. | 100 | * with LSB = 0.125 degree Celsius, left-justified in 16-bit registers. |
101 | * For LM64 the actual remote diode temperature is 16 degree Celsius higher | ||
102 | * than the register reading. Remote temperature setpoints have to be | ||
103 | * adapted accordingly. | ||
101 | */ | 104 | */ |
102 | 105 | ||
103 | #define FAN_FROM_REG(reg) ((reg) == 0xFFFC || (reg) == 0 ? 0 : \ | 106 | #define FAN_FROM_REG(reg) ((reg) == 0xFFFC || (reg) == 0 ? 0 : \ |
@@ -165,6 +168,8 @@ struct lm63_data { | |||
165 | struct mutex update_lock; | 168 | struct mutex update_lock; |
166 | char valid; /* zero until following fields are valid */ | 169 | char valid; /* zero until following fields are valid */ |
167 | unsigned long last_updated; /* in jiffies */ | 170 | unsigned long last_updated; /* in jiffies */ |
171 | int kind; | ||
172 | int temp2_offset; | ||
168 | 173 | ||
169 | /* registers values */ | 174 | /* registers values */ |
170 | u8 config, config_fan; | 175 | u8 config, config_fan; |
@@ -247,16 +252,34 @@ static ssize_t show_pwm1_enable(struct device *dev, struct device_attribute *dum | |||
247 | return sprintf(buf, "%d\n", data->config_fan & 0x20 ? 1 : 2); | 252 | return sprintf(buf, "%d\n", data->config_fan & 0x20 ? 1 : 2); |
248 | } | 253 | } |
249 | 254 | ||
250 | static ssize_t show_temp8(struct device *dev, struct device_attribute *devattr, | 255 | /* |
251 | char *buf) | 256 | * There are 8bit registers for both local(temp1) and remote(temp2) sensor. |
257 | * For remote sensor registers temp2_offset has to be considered, | ||
258 | * for local sensor it must not. | ||
259 | * So we need separate 8bit accessors for local and remote sensor. | ||
260 | */ | ||
261 | static ssize_t show_local_temp8(struct device *dev, | ||
262 | struct device_attribute *devattr, | ||
263 | char *buf) | ||
252 | { | 264 | { |
253 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | 265 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
254 | struct lm63_data *data = lm63_update_device(dev); | 266 | struct lm63_data *data = lm63_update_device(dev); |
255 | return sprintf(buf, "%d\n", TEMP8_FROM_REG(data->temp8[attr->index])); | 267 | return sprintf(buf, "%d\n", TEMP8_FROM_REG(data->temp8[attr->index])); |
256 | } | 268 | } |
257 | 269 | ||
258 | static ssize_t set_temp8(struct device *dev, struct device_attribute *dummy, | 270 | static ssize_t show_remote_temp8(struct device *dev, |
259 | const char *buf, size_t count) | 271 | struct device_attribute *devattr, |
272 | char *buf) | ||
273 | { | ||
274 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | ||
275 | struct lm63_data *data = lm63_update_device(dev); | ||
276 | return sprintf(buf, "%d\n", TEMP8_FROM_REG(data->temp8[attr->index]) | ||
277 | + data->temp2_offset); | ||
278 | } | ||
279 | |||
280 | static ssize_t set_local_temp8(struct device *dev, | ||
281 | struct device_attribute *dummy, | ||
282 | const char *buf, size_t count) | ||
260 | { | 283 | { |
261 | struct i2c_client *client = to_i2c_client(dev); | 284 | struct i2c_client *client = to_i2c_client(dev); |
262 | struct lm63_data *data = i2c_get_clientdata(client); | 285 | struct lm63_data *data = i2c_get_clientdata(client); |
@@ -274,7 +297,8 @@ static ssize_t show_temp11(struct device *dev, struct device_attribute *devattr, | |||
274 | { | 297 | { |
275 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | 298 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); |
276 | struct lm63_data *data = lm63_update_device(dev); | 299 | struct lm63_data *data = lm63_update_device(dev); |
277 | return sprintf(buf, "%d\n", TEMP11_FROM_REG(data->temp11[attr->index])); | 300 | return sprintf(buf, "%d\n", TEMP11_FROM_REG(data->temp11[attr->index]) |
301 | + data->temp2_offset); | ||
278 | } | 302 | } |
279 | 303 | ||
280 | static ssize_t set_temp11(struct device *dev, struct device_attribute *devattr, | 304 | static ssize_t set_temp11(struct device *dev, struct device_attribute *devattr, |
@@ -294,7 +318,7 @@ static ssize_t set_temp11(struct device *dev, struct device_attribute *devattr, | |||
294 | int nr = attr->index; | 318 | int nr = attr->index; |
295 | 319 | ||
296 | mutex_lock(&data->update_lock); | 320 | mutex_lock(&data->update_lock); |
297 | data->temp11[nr] = TEMP11_TO_REG(val); | 321 | data->temp11[nr] = TEMP11_TO_REG(val - data->temp2_offset); |
298 | i2c_smbus_write_byte_data(client, reg[(nr - 1) * 2], | 322 | i2c_smbus_write_byte_data(client, reg[(nr - 1) * 2], |
299 | data->temp11[nr] >> 8); | 323 | data->temp11[nr] >> 8); |
300 | i2c_smbus_write_byte_data(client, reg[(nr - 1) * 2 + 1], | 324 | i2c_smbus_write_byte_data(client, reg[(nr - 1) * 2 + 1], |
@@ -310,6 +334,7 @@ static ssize_t show_temp2_crit_hyst(struct device *dev, struct device_attribute | |||
310 | { | 334 | { |
311 | struct lm63_data *data = lm63_update_device(dev); | 335 | struct lm63_data *data = lm63_update_device(dev); |
312 | return sprintf(buf, "%d\n", TEMP8_FROM_REG(data->temp8[2]) | 336 | return sprintf(buf, "%d\n", TEMP8_FROM_REG(data->temp8[2]) |
337 | + data->temp2_offset | ||
313 | - TEMP8_FROM_REG(data->temp2_crit_hyst)); | 338 | - TEMP8_FROM_REG(data->temp2_crit_hyst)); |
314 | } | 339 | } |
315 | 340 | ||
@@ -324,7 +349,7 @@ static ssize_t set_temp2_crit_hyst(struct device *dev, struct device_attribute * | |||
324 | long hyst; | 349 | long hyst; |
325 | 350 | ||
326 | mutex_lock(&data->update_lock); | 351 | mutex_lock(&data->update_lock); |
327 | hyst = TEMP8_FROM_REG(data->temp8[2]) - val; | 352 | hyst = TEMP8_FROM_REG(data->temp8[2]) + data->temp2_offset - val; |
328 | i2c_smbus_write_byte_data(client, LM63_REG_REMOTE_TCRIT_HYST, | 353 | i2c_smbus_write_byte_data(client, LM63_REG_REMOTE_TCRIT_HYST, |
329 | HYST_TO_REG(hyst)); | 354 | HYST_TO_REG(hyst)); |
330 | mutex_unlock(&data->update_lock); | 355 | mutex_unlock(&data->update_lock); |
@@ -355,16 +380,21 @@ static SENSOR_DEVICE_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan, | |||
355 | static DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm1, set_pwm1); | 380 | static DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm1, set_pwm1); |
356 | static DEVICE_ATTR(pwm1_enable, S_IRUGO, show_pwm1_enable, NULL); | 381 | static DEVICE_ATTR(pwm1_enable, S_IRUGO, show_pwm1_enable, NULL); |
357 | 382 | ||
358 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp8, NULL, 0); | 383 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_local_temp8, NULL, 0); |
359 | static SENSOR_DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO, show_temp8, | 384 | static SENSOR_DEVICE_ATTR(temp1_max, S_IWUSR | S_IRUGO, show_local_temp8, |
360 | set_temp8, 1); | 385 | set_local_temp8, 1); |
361 | 386 | ||
362 | static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp11, NULL, 0); | 387 | static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO, show_temp11, NULL, 0); |
363 | static SENSOR_DEVICE_ATTR(temp2_min, S_IWUSR | S_IRUGO, show_temp11, | 388 | static SENSOR_DEVICE_ATTR(temp2_min, S_IWUSR | S_IRUGO, show_temp11, |
364 | set_temp11, 1); | 389 | set_temp11, 1); |
365 | static SENSOR_DEVICE_ATTR(temp2_max, S_IWUSR | S_IRUGO, show_temp11, | 390 | static SENSOR_DEVICE_ATTR(temp2_max, S_IWUSR | S_IRUGO, show_temp11, |
366 | set_temp11, 2); | 391 | set_temp11, 2); |
367 | static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO, show_temp8, NULL, 2); | 392 | /* |
393 | * On LM63, temp2_crit can be set only once, which should be job | ||
394 | * of the bootloader. | ||
395 | */ | ||
396 | static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO, show_remote_temp8, | ||
397 | NULL, 2); | ||
368 | static DEVICE_ATTR(temp2_crit_hyst, S_IWUSR | S_IRUGO, show_temp2_crit_hyst, | 398 | static DEVICE_ATTR(temp2_crit_hyst, S_IWUSR | S_IRUGO, show_temp2_crit_hyst, |
369 | set_temp2_crit_hyst); | 399 | set_temp2_crit_hyst); |
370 | 400 | ||
@@ -479,7 +509,12 @@ static int lm63_probe(struct i2c_client *new_client, | |||
479 | data->valid = 0; | 509 | data->valid = 0; |
480 | mutex_init(&data->update_lock); | 510 | mutex_init(&data->update_lock); |
481 | 511 | ||
482 | /* Initialize the LM63 chip */ | 512 | /* Set the device type */ |
513 | data->kind = id->driver_data; | ||
514 | if (data->kind == lm64) | ||
515 | data->temp2_offset = 16000; | ||
516 | |||
517 | /* Initialize chip */ | ||
483 | lm63_init_client(new_client); | 518 | lm63_init_client(new_client); |
484 | 519 | ||
485 | /* Register sysfs hooks */ | 520 | /* Register sysfs hooks */ |
diff --git a/drivers/input/input.c b/drivers/input/input.c index 7985114beac7..11905b6a3023 100644 --- a/drivers/input/input.c +++ b/drivers/input/input.c | |||
@@ -75,7 +75,6 @@ static int input_defuzz_abs_event(int value, int old_val, int fuzz) | |||
75 | * dev->event_lock held and interrupts disabled. | 75 | * dev->event_lock held and interrupts disabled. |
76 | */ | 76 | */ |
77 | static void input_pass_event(struct input_dev *dev, | 77 | static void input_pass_event(struct input_dev *dev, |
78 | struct input_handler *src_handler, | ||
79 | unsigned int type, unsigned int code, int value) | 78 | unsigned int type, unsigned int code, int value) |
80 | { | 79 | { |
81 | struct input_handler *handler; | 80 | struct input_handler *handler; |
@@ -94,15 +93,6 @@ static void input_pass_event(struct input_dev *dev, | |||
94 | continue; | 93 | continue; |
95 | 94 | ||
96 | handler = handle->handler; | 95 | handler = handle->handler; |
97 | |||
98 | /* | ||
99 | * If this is the handler that injected this | ||
100 | * particular event we want to skip it to avoid | ||
101 | * filters firing again and again. | ||
102 | */ | ||
103 | if (handler == src_handler) | ||
104 | continue; | ||
105 | |||
106 | if (!handler->filter) { | 96 | if (!handler->filter) { |
107 | if (filtered) | 97 | if (filtered) |
108 | break; | 98 | break; |
@@ -132,7 +122,7 @@ static void input_repeat_key(unsigned long data) | |||
132 | if (test_bit(dev->repeat_key, dev->key) && | 122 | if (test_bit(dev->repeat_key, dev->key) && |
133 | is_event_supported(dev->repeat_key, dev->keybit, KEY_MAX)) { | 123 | is_event_supported(dev->repeat_key, dev->keybit, KEY_MAX)) { |
134 | 124 | ||
135 | input_pass_event(dev, NULL, EV_KEY, dev->repeat_key, 2); | 125 | input_pass_event(dev, EV_KEY, dev->repeat_key, 2); |
136 | 126 | ||
137 | if (dev->sync) { | 127 | if (dev->sync) { |
138 | /* | 128 | /* |
@@ -141,7 +131,7 @@ static void input_repeat_key(unsigned long data) | |||
141 | * Otherwise assume that the driver will send | 131 | * Otherwise assume that the driver will send |
142 | * SYN_REPORT once it's done. | 132 | * SYN_REPORT once it's done. |
143 | */ | 133 | */ |
144 | input_pass_event(dev, NULL, EV_SYN, SYN_REPORT, 1); | 134 | input_pass_event(dev, EV_SYN, SYN_REPORT, 1); |
145 | } | 135 | } |
146 | 136 | ||
147 | if (dev->rep[REP_PERIOD]) | 137 | if (dev->rep[REP_PERIOD]) |
@@ -174,7 +164,6 @@ static void input_stop_autorepeat(struct input_dev *dev) | |||
174 | #define INPUT_PASS_TO_ALL (INPUT_PASS_TO_HANDLERS | INPUT_PASS_TO_DEVICE) | 164 | #define INPUT_PASS_TO_ALL (INPUT_PASS_TO_HANDLERS | INPUT_PASS_TO_DEVICE) |
175 | 165 | ||
176 | static int input_handle_abs_event(struct input_dev *dev, | 166 | static int input_handle_abs_event(struct input_dev *dev, |
177 | struct input_handler *src_handler, | ||
178 | unsigned int code, int *pval) | 167 | unsigned int code, int *pval) |
179 | { | 168 | { |
180 | bool is_mt_event; | 169 | bool is_mt_event; |
@@ -218,15 +207,13 @@ static int input_handle_abs_event(struct input_dev *dev, | |||
218 | /* Flush pending "slot" event */ | 207 | /* Flush pending "slot" event */ |
219 | if (is_mt_event && dev->slot != input_abs_get_val(dev, ABS_MT_SLOT)) { | 208 | if (is_mt_event && dev->slot != input_abs_get_val(dev, ABS_MT_SLOT)) { |
220 | input_abs_set_val(dev, ABS_MT_SLOT, dev->slot); | 209 | input_abs_set_val(dev, ABS_MT_SLOT, dev->slot); |
221 | input_pass_event(dev, src_handler, | 210 | input_pass_event(dev, EV_ABS, ABS_MT_SLOT, dev->slot); |
222 | EV_ABS, ABS_MT_SLOT, dev->slot); | ||
223 | } | 211 | } |
224 | 212 | ||
225 | return INPUT_PASS_TO_HANDLERS; | 213 | return INPUT_PASS_TO_HANDLERS; |
226 | } | 214 | } |
227 | 215 | ||
228 | static void input_handle_event(struct input_dev *dev, | 216 | static void input_handle_event(struct input_dev *dev, |
229 | struct input_handler *src_handler, | ||
230 | unsigned int type, unsigned int code, int value) | 217 | unsigned int type, unsigned int code, int value) |
231 | { | 218 | { |
232 | int disposition = INPUT_IGNORE_EVENT; | 219 | int disposition = INPUT_IGNORE_EVENT; |
@@ -279,8 +266,7 @@ static void input_handle_event(struct input_dev *dev, | |||
279 | 266 | ||
280 | case EV_ABS: | 267 | case EV_ABS: |
281 | if (is_event_supported(code, dev->absbit, ABS_MAX)) | 268 | if (is_event_supported(code, dev->absbit, ABS_MAX)) |
282 | disposition = input_handle_abs_event(dev, src_handler, | 269 | disposition = input_handle_abs_event(dev, code, &value); |
283 | code, &value); | ||
284 | 270 | ||
285 | break; | 271 | break; |
286 | 272 | ||
@@ -338,7 +324,7 @@ static void input_handle_event(struct input_dev *dev, | |||
338 | dev->event(dev, type, code, value); | 324 | dev->event(dev, type, code, value); |
339 | 325 | ||
340 | if (disposition & INPUT_PASS_TO_HANDLERS) | 326 | if (disposition & INPUT_PASS_TO_HANDLERS) |
341 | input_pass_event(dev, src_handler, type, code, value); | 327 | input_pass_event(dev, type, code, value); |
342 | } | 328 | } |
343 | 329 | ||
344 | /** | 330 | /** |
@@ -367,7 +353,7 @@ void input_event(struct input_dev *dev, | |||
367 | 353 | ||
368 | spin_lock_irqsave(&dev->event_lock, flags); | 354 | spin_lock_irqsave(&dev->event_lock, flags); |
369 | add_input_randomness(type, code, value); | 355 | add_input_randomness(type, code, value); |
370 | input_handle_event(dev, NULL, type, code, value); | 356 | input_handle_event(dev, type, code, value); |
371 | spin_unlock_irqrestore(&dev->event_lock, flags); | 357 | spin_unlock_irqrestore(&dev->event_lock, flags); |
372 | } | 358 | } |
373 | } | 359 | } |
@@ -397,8 +383,7 @@ void input_inject_event(struct input_handle *handle, | |||
397 | rcu_read_lock(); | 383 | rcu_read_lock(); |
398 | grab = rcu_dereference(dev->grab); | 384 | grab = rcu_dereference(dev->grab); |
399 | if (!grab || grab == handle) | 385 | if (!grab || grab == handle) |
400 | input_handle_event(dev, handle->handler, | 386 | input_handle_event(dev, type, code, value); |
401 | type, code, value); | ||
402 | rcu_read_unlock(); | 387 | rcu_read_unlock(); |
403 | 388 | ||
404 | spin_unlock_irqrestore(&dev->event_lock, flags); | 389 | spin_unlock_irqrestore(&dev->event_lock, flags); |
@@ -611,10 +596,10 @@ static void input_dev_release_keys(struct input_dev *dev) | |||
611 | for (code = 0; code <= KEY_MAX; code++) { | 596 | for (code = 0; code <= KEY_MAX; code++) { |
612 | if (is_event_supported(code, dev->keybit, KEY_MAX) && | 597 | if (is_event_supported(code, dev->keybit, KEY_MAX) && |
613 | __test_and_clear_bit(code, dev->key)) { | 598 | __test_and_clear_bit(code, dev->key)) { |
614 | input_pass_event(dev, NULL, EV_KEY, code, 0); | 599 | input_pass_event(dev, EV_KEY, code, 0); |
615 | } | 600 | } |
616 | } | 601 | } |
617 | input_pass_event(dev, NULL, EV_SYN, SYN_REPORT, 1); | 602 | input_pass_event(dev, EV_SYN, SYN_REPORT, 1); |
618 | } | 603 | } |
619 | } | 604 | } |
620 | 605 | ||
@@ -889,9 +874,9 @@ int input_set_keycode(struct input_dev *dev, | |||
889 | !is_event_supported(old_keycode, dev->keybit, KEY_MAX) && | 874 | !is_event_supported(old_keycode, dev->keybit, KEY_MAX) && |
890 | __test_and_clear_bit(old_keycode, dev->key)) { | 875 | __test_and_clear_bit(old_keycode, dev->key)) { |
891 | 876 | ||
892 | input_pass_event(dev, NULL, EV_KEY, old_keycode, 0); | 877 | input_pass_event(dev, EV_KEY, old_keycode, 0); |
893 | if (dev->sync) | 878 | if (dev->sync) |
894 | input_pass_event(dev, NULL, EV_SYN, SYN_REPORT, 1); | 879 | input_pass_event(dev, EV_SYN, SYN_REPORT, 1); |
895 | } | 880 | } |
896 | 881 | ||
897 | out: | 882 | out: |
diff --git a/drivers/input/misc/rotary_encoder.c b/drivers/input/misc/rotary_encoder.c index 1f8e0108962e..7e64d01da2be 100644 --- a/drivers/input/misc/rotary_encoder.c +++ b/drivers/input/misc/rotary_encoder.c | |||
@@ -176,7 +176,7 @@ static int __devinit rotary_encoder_probe(struct platform_device *pdev) | |||
176 | 176 | ||
177 | /* request the IRQs */ | 177 | /* request the IRQs */ |
178 | err = request_irq(encoder->irq_a, &rotary_encoder_irq, | 178 | err = request_irq(encoder->irq_a, &rotary_encoder_irq, |
179 | IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE, | 179 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
180 | DRV_NAME, encoder); | 180 | DRV_NAME, encoder); |
181 | if (err) { | 181 | if (err) { |
182 | dev_err(&pdev->dev, "unable to request IRQ %d\n", | 182 | dev_err(&pdev->dev, "unable to request IRQ %d\n", |
@@ -185,7 +185,7 @@ static int __devinit rotary_encoder_probe(struct platform_device *pdev) | |||
185 | } | 185 | } |
186 | 186 | ||
187 | err = request_irq(encoder->irq_b, &rotary_encoder_irq, | 187 | err = request_irq(encoder->irq_b, &rotary_encoder_irq, |
188 | IORESOURCE_IRQ_HIGHEDGE | IORESOURCE_IRQ_LOWEDGE, | 188 | IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, |
189 | DRV_NAME, encoder); | 189 | DRV_NAME, encoder); |
190 | if (err) { | 190 | if (err) { |
191 | dev_err(&pdev->dev, "unable to request IRQ %d\n", | 191 | dev_err(&pdev->dev, "unable to request IRQ %d\n", |
diff --git a/drivers/input/serio/serio.c b/drivers/input/serio/serio.c index db5b0bca1a1a..7c38d1fbabf2 100644 --- a/drivers/input/serio/serio.c +++ b/drivers/input/serio/serio.c | |||
@@ -188,7 +188,8 @@ static void serio_free_event(struct serio_event *event) | |||
188 | kfree(event); | 188 | kfree(event); |
189 | } | 189 | } |
190 | 190 | ||
191 | static void serio_remove_duplicate_events(struct serio_event *event) | 191 | static void serio_remove_duplicate_events(void *object, |
192 | enum serio_event_type type) | ||
192 | { | 193 | { |
193 | struct serio_event *e, *next; | 194 | struct serio_event *e, *next; |
194 | unsigned long flags; | 195 | unsigned long flags; |
@@ -196,13 +197,13 @@ static void serio_remove_duplicate_events(struct serio_event *event) | |||
196 | spin_lock_irqsave(&serio_event_lock, flags); | 197 | spin_lock_irqsave(&serio_event_lock, flags); |
197 | 198 | ||
198 | list_for_each_entry_safe(e, next, &serio_event_list, node) { | 199 | list_for_each_entry_safe(e, next, &serio_event_list, node) { |
199 | if (event->object == e->object) { | 200 | if (object == e->object) { |
200 | /* | 201 | /* |
201 | * If this event is of different type we should not | 202 | * If this event is of different type we should not |
202 | * look further - we only suppress duplicate events | 203 | * look further - we only suppress duplicate events |
203 | * that were sent back-to-back. | 204 | * that were sent back-to-back. |
204 | */ | 205 | */ |
205 | if (event->type != e->type) | 206 | if (type != e->type) |
206 | break; | 207 | break; |
207 | 208 | ||
208 | list_del_init(&e->node); | 209 | list_del_init(&e->node); |
@@ -245,7 +246,7 @@ static void serio_handle_event(struct work_struct *work) | |||
245 | break; | 246 | break; |
246 | } | 247 | } |
247 | 248 | ||
248 | serio_remove_duplicate_events(event); | 249 | serio_remove_duplicate_events(event->object, event->type); |
249 | serio_free_event(event); | 250 | serio_free_event(event); |
250 | } | 251 | } |
251 | 252 | ||
@@ -436,10 +437,12 @@ static ssize_t serio_rebind_driver(struct device *dev, struct device_attribute * | |||
436 | } else if (!strncmp(buf, "rescan", count)) { | 437 | } else if (!strncmp(buf, "rescan", count)) { |
437 | serio_disconnect_port(serio); | 438 | serio_disconnect_port(serio); |
438 | serio_find_driver(serio); | 439 | serio_find_driver(serio); |
440 | serio_remove_duplicate_events(serio, SERIO_RESCAN_PORT); | ||
439 | } else if ((drv = driver_find(buf, &serio_bus)) != NULL) { | 441 | } else if ((drv = driver_find(buf, &serio_bus)) != NULL) { |
440 | serio_disconnect_port(serio); | 442 | serio_disconnect_port(serio); |
441 | error = serio_bind_driver(serio, to_serio_driver(drv)); | 443 | error = serio_bind_driver(serio, to_serio_driver(drv)); |
442 | put_driver(drv); | 444 | put_driver(drv); |
445 | serio_remove_duplicate_events(serio, SERIO_RESCAN_PORT); | ||
443 | } else { | 446 | } else { |
444 | error = -EINVAL; | 447 | error = -EINVAL; |
445 | } | 448 | } |
diff --git a/drivers/input/tablet/wacom_sys.c b/drivers/input/tablet/wacom_sys.c index fc381498b798..cf8fb9f5d4a8 100644 --- a/drivers/input/tablet/wacom_sys.c +++ b/drivers/input/tablet/wacom_sys.c | |||
@@ -519,7 +519,7 @@ static int wacom_probe(struct usb_interface *intf, const struct usb_device_id *i | |||
519 | /* Retrieve the physical and logical size for OEM devices */ | 519 | /* Retrieve the physical and logical size for OEM devices */ |
520 | error = wacom_retrieve_hid_descriptor(intf, features); | 520 | error = wacom_retrieve_hid_descriptor(intf, features); |
521 | if (error) | 521 | if (error) |
522 | goto fail2; | 522 | goto fail3; |
523 | 523 | ||
524 | wacom_setup_device_quirks(features); | 524 | wacom_setup_device_quirks(features); |
525 | 525 | ||
diff --git a/drivers/input/touchscreen/ads7846.c b/drivers/input/touchscreen/ads7846.c index 14ea54b78e46..4bf2316e3284 100644 --- a/drivers/input/touchscreen/ads7846.c +++ b/drivers/input/touchscreen/ads7846.c | |||
@@ -941,28 +941,29 @@ static int __devinit ads7846_setup_pendown(struct spi_device *spi, struct ads784 | |||
941 | struct ads7846_platform_data *pdata = spi->dev.platform_data; | 941 | struct ads7846_platform_data *pdata = spi->dev.platform_data; |
942 | int err; | 942 | int err; |
943 | 943 | ||
944 | /* REVISIT when the irq can be triggered active-low, or if for some | 944 | /* |
945 | * REVISIT when the irq can be triggered active-low, or if for some | ||
945 | * reason the touchscreen isn't hooked up, we don't need to access | 946 | * reason the touchscreen isn't hooked up, we don't need to access |
946 | * the pendown state. | 947 | * the pendown state. |
947 | */ | 948 | */ |
948 | if (!pdata->get_pendown_state && !gpio_is_valid(pdata->gpio_pendown)) { | ||
949 | dev_err(&spi->dev, "no get_pendown_state nor gpio_pendown?\n"); | ||
950 | return -EINVAL; | ||
951 | } | ||
952 | 949 | ||
953 | if (pdata->get_pendown_state) { | 950 | if (pdata->get_pendown_state) { |
954 | ts->get_pendown_state = pdata->get_pendown_state; | 951 | ts->get_pendown_state = pdata->get_pendown_state; |
955 | return 0; | 952 | } else if (gpio_is_valid(pdata->gpio_pendown)) { |
956 | } | ||
957 | 953 | ||
958 | err = gpio_request(pdata->gpio_pendown, "ads7846_pendown"); | 954 | err = gpio_request(pdata->gpio_pendown, "ads7846_pendown"); |
959 | if (err) { | 955 | if (err) { |
960 | dev_err(&spi->dev, "failed to request pendown GPIO%d\n", | 956 | dev_err(&spi->dev, "failed to request pendown GPIO%d\n", |
961 | pdata->gpio_pendown); | 957 | pdata->gpio_pendown); |
962 | return err; | 958 | return err; |
963 | } | 959 | } |
964 | 960 | ||
965 | ts->gpio_pendown = pdata->gpio_pendown; | 961 | ts->gpio_pendown = pdata->gpio_pendown; |
962 | |||
963 | } else { | ||
964 | dev_err(&spi->dev, "no get_pendown_state nor gpio_pendown?\n"); | ||
965 | return -EINVAL; | ||
966 | } | ||
966 | 967 | ||
967 | return 0; | 968 | return 0; |
968 | } | 969 | } |
@@ -1353,7 +1354,7 @@ static int __devinit ads7846_probe(struct spi_device *spi) | |||
1353 | err_put_regulator: | 1354 | err_put_regulator: |
1354 | regulator_put(ts->reg); | 1355 | regulator_put(ts->reg); |
1355 | err_free_gpio: | 1356 | err_free_gpio: |
1356 | if (ts->gpio_pendown != -1) | 1357 | if (!ts->get_pendown_state) |
1357 | gpio_free(ts->gpio_pendown); | 1358 | gpio_free(ts->gpio_pendown); |
1358 | err_cleanup_filter: | 1359 | err_cleanup_filter: |
1359 | if (ts->filter_cleanup) | 1360 | if (ts->filter_cleanup) |
@@ -1383,8 +1384,13 @@ static int __devexit ads7846_remove(struct spi_device *spi) | |||
1383 | regulator_disable(ts->reg); | 1384 | regulator_disable(ts->reg); |
1384 | regulator_put(ts->reg); | 1385 | regulator_put(ts->reg); |
1385 | 1386 | ||
1386 | if (ts->gpio_pendown != -1) | 1387 | if (!ts->get_pendown_state) { |
1388 | /* | ||
1389 | * If we are not using specialized pendown method we must | ||
1390 | * have been relying on gpio we set up ourselves. | ||
1391 | */ | ||
1387 | gpio_free(ts->gpio_pendown); | 1392 | gpio_free(ts->gpio_pendown); |
1393 | } | ||
1388 | 1394 | ||
1389 | if (ts->filter_cleanup) | 1395 | if (ts->filter_cleanup) |
1390 | ts->filter_cleanup(ts->filter_data); | 1396 | ts->filter_cleanup(ts->filter_data); |
diff --git a/drivers/input/touchscreen/wacom_w8001.c b/drivers/input/touchscreen/wacom_w8001.c index 5cb8449c909d..c14412ef4648 100644 --- a/drivers/input/touchscreen/wacom_w8001.c +++ b/drivers/input/touchscreen/wacom_w8001.c | |||
@@ -51,6 +51,10 @@ MODULE_LICENSE("GPL"); | |||
51 | #define W8001_PKTLEN_TPCCTL 11 /* control packet */ | 51 | #define W8001_PKTLEN_TPCCTL 11 /* control packet */ |
52 | #define W8001_PKTLEN_TOUCH2FG 13 | 52 | #define W8001_PKTLEN_TOUCH2FG 13 |
53 | 53 | ||
54 | /* resolution in points/mm */ | ||
55 | #define W8001_PEN_RESOLUTION 100 | ||
56 | #define W8001_TOUCH_RESOLUTION 10 | ||
57 | |||
54 | struct w8001_coord { | 58 | struct w8001_coord { |
55 | u8 rdy; | 59 | u8 rdy; |
56 | u8 tsw; | 60 | u8 tsw; |
@@ -198,7 +202,7 @@ static void parse_touchquery(u8 *data, struct w8001_touch_query *query) | |||
198 | query->y = 1024; | 202 | query->y = 1024; |
199 | if (query->panel_res) | 203 | if (query->panel_res) |
200 | query->x = query->y = (1 << query->panel_res); | 204 | query->x = query->y = (1 << query->panel_res); |
201 | query->panel_res = 10; | 205 | query->panel_res = W8001_TOUCH_RESOLUTION; |
202 | } | 206 | } |
203 | } | 207 | } |
204 | 208 | ||
@@ -394,6 +398,8 @@ static int w8001_setup(struct w8001 *w8001) | |||
394 | 398 | ||
395 | input_set_abs_params(dev, ABS_X, 0, coord.x, 0, 0); | 399 | input_set_abs_params(dev, ABS_X, 0, coord.x, 0, 0); |
396 | input_set_abs_params(dev, ABS_Y, 0, coord.y, 0, 0); | 400 | input_set_abs_params(dev, ABS_Y, 0, coord.y, 0, 0); |
401 | input_abs_set_res(dev, ABS_X, W8001_PEN_RESOLUTION); | ||
402 | input_abs_set_res(dev, ABS_Y, W8001_PEN_RESOLUTION); | ||
397 | input_set_abs_params(dev, ABS_PRESSURE, 0, coord.pen_pressure, 0, 0); | 403 | input_set_abs_params(dev, ABS_PRESSURE, 0, coord.pen_pressure, 0, 0); |
398 | if (coord.tilt_x && coord.tilt_y) { | 404 | if (coord.tilt_x && coord.tilt_y) { |
399 | input_set_abs_params(dev, ABS_TILT_X, 0, coord.tilt_x, 0, 0); | 405 | input_set_abs_params(dev, ABS_TILT_X, 0, coord.tilt_x, 0, 0); |
@@ -418,14 +424,17 @@ static int w8001_setup(struct w8001 *w8001) | |||
418 | w8001->max_touch_x = touch.x; | 424 | w8001->max_touch_x = touch.x; |
419 | w8001->max_touch_y = touch.y; | 425 | w8001->max_touch_y = touch.y; |
420 | 426 | ||
421 | /* scale to pen maximum */ | ||
422 | if (w8001->max_pen_x && w8001->max_pen_y) { | 427 | if (w8001->max_pen_x && w8001->max_pen_y) { |
428 | /* if pen is supported scale to pen maximum */ | ||
423 | touch.x = w8001->max_pen_x; | 429 | touch.x = w8001->max_pen_x; |
424 | touch.y = w8001->max_pen_y; | 430 | touch.y = w8001->max_pen_y; |
431 | touch.panel_res = W8001_PEN_RESOLUTION; | ||
425 | } | 432 | } |
426 | 433 | ||
427 | input_set_abs_params(dev, ABS_X, 0, touch.x, 0, 0); | 434 | input_set_abs_params(dev, ABS_X, 0, touch.x, 0, 0); |
428 | input_set_abs_params(dev, ABS_Y, 0, touch.y, 0, 0); | 435 | input_set_abs_params(dev, ABS_Y, 0, touch.y, 0, 0); |
436 | input_abs_set_res(dev, ABS_X, touch.panel_res); | ||
437 | input_abs_set_res(dev, ABS_Y, touch.panel_res); | ||
429 | 438 | ||
430 | switch (touch.sensor_id) { | 439 | switch (touch.sensor_id) { |
431 | case 0: | 440 | case 0: |
diff --git a/drivers/isdn/hysdn/hysdn_defs.h b/drivers/isdn/hysdn/hysdn_defs.h index 729df4089385..18b801ad97a4 100644 --- a/drivers/isdn/hysdn/hysdn_defs.h +++ b/drivers/isdn/hysdn/hysdn_defs.h | |||
@@ -227,7 +227,6 @@ extern hysdn_card *card_root; /* pointer to first card */ | |||
227 | /*************************/ | 227 | /*************************/ |
228 | /* im/exported functions */ | 228 | /* im/exported functions */ |
229 | /*************************/ | 229 | /*************************/ |
230 | extern char *hysdn_getrev(const char *); | ||
231 | 230 | ||
232 | /* hysdn_procconf.c */ | 231 | /* hysdn_procconf.c */ |
233 | extern int hysdn_procconf_init(void); /* init proc config filesys */ | 232 | extern int hysdn_procconf_init(void); /* init proc config filesys */ |
@@ -259,7 +258,6 @@ extern int hysdn_tx_cfgline(hysdn_card *, unsigned char *, | |||
259 | 258 | ||
260 | /* hysdn_net.c */ | 259 | /* hysdn_net.c */ |
261 | extern unsigned int hynet_enable; | 260 | extern unsigned int hynet_enable; |
262 | extern char *hysdn_net_revision; | ||
263 | extern int hysdn_net_create(hysdn_card *); /* create a new net device */ | 261 | extern int hysdn_net_create(hysdn_card *); /* create a new net device */ |
264 | extern int hysdn_net_release(hysdn_card *); /* delete the device */ | 262 | extern int hysdn_net_release(hysdn_card *); /* delete the device */ |
265 | extern char *hysdn_net_getname(hysdn_card *); /* get name of net interface */ | 263 | extern char *hysdn_net_getname(hysdn_card *); /* get name of net interface */ |
diff --git a/drivers/isdn/hysdn/hysdn_init.c b/drivers/isdn/hysdn/hysdn_init.c index b7cc5c2f08c6..0ab42ace1692 100644 --- a/drivers/isdn/hysdn/hysdn_init.c +++ b/drivers/isdn/hysdn/hysdn_init.c | |||
@@ -36,7 +36,6 @@ MODULE_DESCRIPTION("ISDN4Linux: Driver for HYSDN cards"); | |||
36 | MODULE_AUTHOR("Werner Cornelius"); | 36 | MODULE_AUTHOR("Werner Cornelius"); |
37 | MODULE_LICENSE("GPL"); | 37 | MODULE_LICENSE("GPL"); |
38 | 38 | ||
39 | static char *hysdn_init_revision = "$Revision: 1.6.6.6 $"; | ||
40 | static int cardmax; /* number of found cards */ | 39 | static int cardmax; /* number of found cards */ |
41 | hysdn_card *card_root = NULL; /* pointer to first card */ | 40 | hysdn_card *card_root = NULL; /* pointer to first card */ |
42 | static hysdn_card *card_last = NULL; /* pointer to first card */ | 41 | static hysdn_card *card_last = NULL; /* pointer to first card */ |
@@ -49,25 +48,6 @@ static hysdn_card *card_last = NULL; /* pointer to first card */ | |||
49 | /* Additionally newer versions may be activated without rebooting. */ | 48 | /* Additionally newer versions may be activated without rebooting. */ |
50 | /****************************************************************************/ | 49 | /****************************************************************************/ |
51 | 50 | ||
52 | /******************************************************/ | ||
53 | /* extract revision number from string for log output */ | ||
54 | /******************************************************/ | ||
55 | char * | ||
56 | hysdn_getrev(const char *revision) | ||
57 | { | ||
58 | char *rev; | ||
59 | char *p; | ||
60 | |||
61 | if ((p = strchr(revision, ':'))) { | ||
62 | rev = p + 2; | ||
63 | p = strchr(rev, '$'); | ||
64 | *--p = 0; | ||
65 | } else | ||
66 | rev = "???"; | ||
67 | return rev; | ||
68 | } | ||
69 | |||
70 | |||
71 | /****************************************************************************/ | 51 | /****************************************************************************/ |
72 | /* init_module is called once when the module is loaded to do all necessary */ | 52 | /* init_module is called once when the module is loaded to do all necessary */ |
73 | /* things like autodetect... */ | 53 | /* things like autodetect... */ |
@@ -175,13 +155,9 @@ static int hysdn_have_procfs; | |||
175 | static int __init | 155 | static int __init |
176 | hysdn_init(void) | 156 | hysdn_init(void) |
177 | { | 157 | { |
178 | char tmp[50]; | ||
179 | int rc; | 158 | int rc; |
180 | 159 | ||
181 | strcpy(tmp, hysdn_init_revision); | 160 | printk(KERN_NOTICE "HYSDN: module loaded\n"); |
182 | printk(KERN_NOTICE "HYSDN: module Rev: %s loaded\n", hysdn_getrev(tmp)); | ||
183 | strcpy(tmp, hysdn_net_revision); | ||
184 | printk(KERN_NOTICE "HYSDN: network interface Rev: %s \n", hysdn_getrev(tmp)); | ||
185 | 161 | ||
186 | rc = pci_register_driver(&hysdn_pci_driver); | 162 | rc = pci_register_driver(&hysdn_pci_driver); |
187 | if (rc) | 163 | if (rc) |
diff --git a/drivers/isdn/hysdn/hysdn_net.c b/drivers/isdn/hysdn/hysdn_net.c index feec8d89d719..11f2cce26005 100644 --- a/drivers/isdn/hysdn/hysdn_net.c +++ b/drivers/isdn/hysdn/hysdn_net.c | |||
@@ -26,9 +26,6 @@ | |||
26 | unsigned int hynet_enable = 0xffffffff; | 26 | unsigned int hynet_enable = 0xffffffff; |
27 | module_param(hynet_enable, uint, 0); | 27 | module_param(hynet_enable, uint, 0); |
28 | 28 | ||
29 | /* store the actual version for log reporting */ | ||
30 | char *hysdn_net_revision = "$Revision: 1.8.6.4 $"; | ||
31 | |||
32 | #define MAX_SKB_BUFFERS 20 /* number of buffers for keeping TX-data */ | 29 | #define MAX_SKB_BUFFERS 20 /* number of buffers for keeping TX-data */ |
33 | 30 | ||
34 | /****************************************************************************/ | 31 | /****************************************************************************/ |
diff --git a/drivers/isdn/hysdn/hysdn_procconf.c b/drivers/isdn/hysdn/hysdn_procconf.c index 96b3e39c3356..5fe83bd42061 100644 --- a/drivers/isdn/hysdn/hysdn_procconf.c +++ b/drivers/isdn/hysdn/hysdn_procconf.c | |||
@@ -23,7 +23,6 @@ | |||
23 | #include "hysdn_defs.h" | 23 | #include "hysdn_defs.h" |
24 | 24 | ||
25 | static DEFINE_MUTEX(hysdn_conf_mutex); | 25 | static DEFINE_MUTEX(hysdn_conf_mutex); |
26 | static char *hysdn_procconf_revision = "$Revision: 1.8.6.4 $"; | ||
27 | 26 | ||
28 | #define INFO_OUT_LEN 80 /* length of info line including lf */ | 27 | #define INFO_OUT_LEN 80 /* length of info line including lf */ |
29 | 28 | ||
@@ -404,7 +403,7 @@ hysdn_procconf_init(void) | |||
404 | card = card->next; /* next entry */ | 403 | card = card->next; /* next entry */ |
405 | } | 404 | } |
406 | 405 | ||
407 | printk(KERN_NOTICE "HYSDN: procfs Rev. %s initialised\n", hysdn_getrev(hysdn_procconf_revision)); | 406 | printk(KERN_NOTICE "HYSDN: procfs initialised\n"); |
408 | return (0); | 407 | return (0); |
409 | } /* hysdn_procconf_init */ | 408 | } /* hysdn_procconf_init */ |
410 | 409 | ||
diff --git a/drivers/md/md.c b/drivers/md/md.c index b76cfc89e1b5..0cc30ecda4c1 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -287,6 +287,7 @@ static int md_make_request(struct request_queue *q, struct bio *bio) | |||
287 | mddev_t *mddev = q->queuedata; | 287 | mddev_t *mddev = q->queuedata; |
288 | int rv; | 288 | int rv; |
289 | int cpu; | 289 | int cpu; |
290 | unsigned int sectors; | ||
290 | 291 | ||
291 | if (mddev == NULL || mddev->pers == NULL | 292 | if (mddev == NULL || mddev->pers == NULL |
292 | || !mddev->ready) { | 293 | || !mddev->ready) { |
@@ -311,12 +312,16 @@ static int md_make_request(struct request_queue *q, struct bio *bio) | |||
311 | atomic_inc(&mddev->active_io); | 312 | atomic_inc(&mddev->active_io); |
312 | rcu_read_unlock(); | 313 | rcu_read_unlock(); |
313 | 314 | ||
315 | /* | ||
316 | * save the sectors now since our bio can | ||
317 | * go away inside make_request | ||
318 | */ | ||
319 | sectors = bio_sectors(bio); | ||
314 | rv = mddev->pers->make_request(mddev, bio); | 320 | rv = mddev->pers->make_request(mddev, bio); |
315 | 321 | ||
316 | cpu = part_stat_lock(); | 322 | cpu = part_stat_lock(); |
317 | part_stat_inc(cpu, &mddev->gendisk->part0, ios[rw]); | 323 | part_stat_inc(cpu, &mddev->gendisk->part0, ios[rw]); |
318 | part_stat_add(cpu, &mddev->gendisk->part0, sectors[rw], | 324 | part_stat_add(cpu, &mddev->gendisk->part0, sectors[rw], sectors); |
319 | bio_sectors(bio)); | ||
320 | part_stat_unlock(); | 325 | part_stat_unlock(); |
321 | 326 | ||
322 | if (atomic_dec_and_test(&mddev->active_io) && mddev->suspended) | 327 | if (atomic_dec_and_test(&mddev->active_io) && mddev->suspended) |
@@ -1947,8 +1952,6 @@ static int lock_rdev(mdk_rdev_t *rdev, dev_t dev, int shared) | |||
1947 | __bdevname(dev, b)); | 1952 | __bdevname(dev, b)); |
1948 | return PTR_ERR(bdev); | 1953 | return PTR_ERR(bdev); |
1949 | } | 1954 | } |
1950 | if (!shared) | ||
1951 | set_bit(AllReserved, &rdev->flags); | ||
1952 | rdev->bdev = bdev; | 1955 | rdev->bdev = bdev; |
1953 | return err; | 1956 | return err; |
1954 | } | 1957 | } |
@@ -2465,6 +2468,9 @@ slot_store(mdk_rdev_t *rdev, const char *buf, size_t len) | |||
2465 | if (rdev->raid_disk != -1) | 2468 | if (rdev->raid_disk != -1) |
2466 | return -EBUSY; | 2469 | return -EBUSY; |
2467 | 2470 | ||
2471 | if (test_bit(MD_RECOVERY_RUNNING, &rdev->mddev->recovery)) | ||
2472 | return -EBUSY; | ||
2473 | |||
2468 | if (rdev->mddev->pers->hot_add_disk == NULL) | 2474 | if (rdev->mddev->pers->hot_add_disk == NULL) |
2469 | return -EINVAL; | 2475 | return -EINVAL; |
2470 | 2476 | ||
@@ -2610,12 +2616,11 @@ rdev_size_store(mdk_rdev_t *rdev, const char *buf, size_t len) | |||
2610 | 2616 | ||
2611 | mddev_lock(mddev); | 2617 | mddev_lock(mddev); |
2612 | list_for_each_entry(rdev2, &mddev->disks, same_set) | 2618 | list_for_each_entry(rdev2, &mddev->disks, same_set) |
2613 | if (test_bit(AllReserved, &rdev2->flags) || | 2619 | if (rdev->bdev == rdev2->bdev && |
2614 | (rdev->bdev == rdev2->bdev && | 2620 | rdev != rdev2 && |
2615 | rdev != rdev2 && | 2621 | overlaps(rdev->data_offset, rdev->sectors, |
2616 | overlaps(rdev->data_offset, rdev->sectors, | 2622 | rdev2->data_offset, |
2617 | rdev2->data_offset, | 2623 | rdev2->sectors)) { |
2618 | rdev2->sectors))) { | ||
2619 | overlap = 1; | 2624 | overlap = 1; |
2620 | break; | 2625 | break; |
2621 | } | 2626 | } |
@@ -5578,6 +5583,8 @@ static int update_raid_disks(mddev_t *mddev, int raid_disks) | |||
5578 | mddev->delta_disks = raid_disks - mddev->raid_disks; | 5583 | mddev->delta_disks = raid_disks - mddev->raid_disks; |
5579 | 5584 | ||
5580 | rv = mddev->pers->check_reshape(mddev); | 5585 | rv = mddev->pers->check_reshape(mddev); |
5586 | if (rv < 0) | ||
5587 | mddev->delta_disks = 0; | ||
5581 | return rv; | 5588 | return rv; |
5582 | } | 5589 | } |
5583 | 5590 | ||
@@ -6985,9 +6992,6 @@ void md_do_sync(mddev_t *mddev) | |||
6985 | } else if (test_bit(MD_RECOVERY_REQUESTED, &mddev->recovery)) | 6992 | } else if (test_bit(MD_RECOVERY_REQUESTED, &mddev->recovery)) |
6986 | mddev->resync_min = mddev->curr_resync_completed; | 6993 | mddev->resync_min = mddev->curr_resync_completed; |
6987 | mddev->curr_resync = 0; | 6994 | mddev->curr_resync = 0; |
6988 | if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery)) | ||
6989 | mddev->curr_resync_completed = 0; | ||
6990 | sysfs_notify(&mddev->kobj, NULL, "sync_completed"); | ||
6991 | wake_up(&resync_wait); | 6995 | wake_up(&resync_wait); |
6992 | set_bit(MD_RECOVERY_DONE, &mddev->recovery); | 6996 | set_bit(MD_RECOVERY_DONE, &mddev->recovery); |
6993 | md_wakeup_thread(mddev->thread); | 6997 | md_wakeup_thread(mddev->thread); |
@@ -7028,7 +7032,7 @@ static int remove_and_add_spares(mddev_t *mddev) | |||
7028 | } | 7032 | } |
7029 | } | 7033 | } |
7030 | 7034 | ||
7031 | if (mddev->degraded && ! mddev->ro && !mddev->recovery_disabled) { | 7035 | if (mddev->degraded && !mddev->recovery_disabled) { |
7032 | list_for_each_entry(rdev, &mddev->disks, same_set) { | 7036 | list_for_each_entry(rdev, &mddev->disks, same_set) { |
7033 | if (rdev->raid_disk >= 0 && | 7037 | if (rdev->raid_disk >= 0 && |
7034 | !test_bit(In_sync, &rdev->flags) && | 7038 | !test_bit(In_sync, &rdev->flags) && |
@@ -7151,7 +7155,20 @@ void md_check_recovery(mddev_t *mddev) | |||
7151 | /* Only thing we do on a ro array is remove | 7155 | /* Only thing we do on a ro array is remove |
7152 | * failed devices. | 7156 | * failed devices. |
7153 | */ | 7157 | */ |
7154 | remove_and_add_spares(mddev); | 7158 | mdk_rdev_t *rdev; |
7159 | list_for_each_entry(rdev, &mddev->disks, same_set) | ||
7160 | if (rdev->raid_disk >= 0 && | ||
7161 | !test_bit(Blocked, &rdev->flags) && | ||
7162 | test_bit(Faulty, &rdev->flags) && | ||
7163 | atomic_read(&rdev->nr_pending)==0) { | ||
7164 | if (mddev->pers->hot_remove_disk( | ||
7165 | mddev, rdev->raid_disk)==0) { | ||
7166 | char nm[20]; | ||
7167 | sprintf(nm,"rd%d", rdev->raid_disk); | ||
7168 | sysfs_remove_link(&mddev->kobj, nm); | ||
7169 | rdev->raid_disk = -1; | ||
7170 | } | ||
7171 | } | ||
7155 | clear_bit(MD_RECOVERY_NEEDED, &mddev->recovery); | 7172 | clear_bit(MD_RECOVERY_NEEDED, &mddev->recovery); |
7156 | goto unlock; | 7173 | goto unlock; |
7157 | } | 7174 | } |
diff --git a/drivers/md/md.h b/drivers/md/md.h index eec517ced31a..7e90b8593b2a 100644 --- a/drivers/md/md.h +++ b/drivers/md/md.h | |||
@@ -93,8 +93,6 @@ struct mdk_rdev_s | |||
93 | #define Faulty 1 /* device is known to have a fault */ | 93 | #define Faulty 1 /* device is known to have a fault */ |
94 | #define In_sync 2 /* device is in_sync with rest of array */ | 94 | #define In_sync 2 /* device is in_sync with rest of array */ |
95 | #define WriteMostly 4 /* Avoid reading if at all possible */ | 95 | #define WriteMostly 4 /* Avoid reading if at all possible */ |
96 | #define AllReserved 6 /* If whole device is reserved for | ||
97 | * one array */ | ||
98 | #define AutoDetected 7 /* added by auto-detect */ | 96 | #define AutoDetected 7 /* added by auto-detect */ |
99 | #define Blocked 8 /* An error occured on an externally | 97 | #define Blocked 8 /* An error occured on an externally |
100 | * managed array, don't allow writes | 98 | * managed array, don't allow writes |
diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c index a39f4c355e55..637a96855edb 100644 --- a/drivers/md/raid0.c +++ b/drivers/md/raid0.c | |||
@@ -179,6 +179,14 @@ static int create_strip_zones(mddev_t *mddev, raid0_conf_t **private_conf) | |||
179 | rdev1->new_raid_disk = j; | 179 | rdev1->new_raid_disk = j; |
180 | } | 180 | } |
181 | 181 | ||
182 | if (mddev->level == 1) { | ||
183 | /* taiking over a raid1 array- | ||
184 | * we have only one active disk | ||
185 | */ | ||
186 | j = 0; | ||
187 | rdev1->new_raid_disk = j; | ||
188 | } | ||
189 | |||
182 | if (j < 0 || j >= mddev->raid_disks) { | 190 | if (j < 0 || j >= mddev->raid_disks) { |
183 | printk(KERN_ERR "md/raid0:%s: bad disk number %d - " | 191 | printk(KERN_ERR "md/raid0:%s: bad disk number %d - " |
184 | "aborting!\n", mdname(mddev), j); | 192 | "aborting!\n", mdname(mddev), j); |
@@ -644,12 +652,38 @@ static void *raid0_takeover_raid10(mddev_t *mddev) | |||
644 | return priv_conf; | 652 | return priv_conf; |
645 | } | 653 | } |
646 | 654 | ||
655 | static void *raid0_takeover_raid1(mddev_t *mddev) | ||
656 | { | ||
657 | raid0_conf_t *priv_conf; | ||
658 | |||
659 | /* Check layout: | ||
660 | * - (N - 1) mirror drives must be already faulty | ||
661 | */ | ||
662 | if ((mddev->raid_disks - 1) != mddev->degraded) { | ||
663 | printk(KERN_ERR "md/raid0:%s: (N - 1) mirrors drives must be already faulty!\n", | ||
664 | mdname(mddev)); | ||
665 | return ERR_PTR(-EINVAL); | ||
666 | } | ||
667 | |||
668 | /* Set new parameters */ | ||
669 | mddev->new_level = 0; | ||
670 | mddev->new_layout = 0; | ||
671 | mddev->new_chunk_sectors = 128; /* by default set chunk size to 64k */ | ||
672 | mddev->delta_disks = 1 - mddev->raid_disks; | ||
673 | /* make sure it will be not marked as dirty */ | ||
674 | mddev->recovery_cp = MaxSector; | ||
675 | |||
676 | create_strip_zones(mddev, &priv_conf); | ||
677 | return priv_conf; | ||
678 | } | ||
679 | |||
647 | static void *raid0_takeover(mddev_t *mddev) | 680 | static void *raid0_takeover(mddev_t *mddev) |
648 | { | 681 | { |
649 | /* raid0 can take over: | 682 | /* raid0 can take over: |
650 | * raid4 - if all data disks are active. | 683 | * raid4 - if all data disks are active. |
651 | * raid5 - providing it is Raid4 layout and one disk is faulty | 684 | * raid5 - providing it is Raid4 layout and one disk is faulty |
652 | * raid10 - assuming we have all necessary active disks | 685 | * raid10 - assuming we have all necessary active disks |
686 | * raid1 - with (N -1) mirror drives faulty | ||
653 | */ | 687 | */ |
654 | if (mddev->level == 4) | 688 | if (mddev->level == 4) |
655 | return raid0_takeover_raid45(mddev); | 689 | return raid0_takeover_raid45(mddev); |
@@ -665,6 +699,12 @@ static void *raid0_takeover(mddev_t *mddev) | |||
665 | if (mddev->level == 10) | 699 | if (mddev->level == 10) |
666 | return raid0_takeover_raid10(mddev); | 700 | return raid0_takeover_raid10(mddev); |
667 | 701 | ||
702 | if (mddev->level == 1) | ||
703 | return raid0_takeover_raid1(mddev); | ||
704 | |||
705 | printk(KERN_ERR "Takeover from raid%i to raid0 not supported\n", | ||
706 | mddev->level); | ||
707 | |||
668 | return ERR_PTR(-EINVAL); | 708 | return ERR_PTR(-EINVAL); |
669 | } | 709 | } |
670 | 710 | ||
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index 69b659544390..3b607b28741b 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c | |||
@@ -2463,11 +2463,13 @@ static void *raid10_takeover_raid0(mddev_t *mddev) | |||
2463 | mddev->recovery_cp = MaxSector; | 2463 | mddev->recovery_cp = MaxSector; |
2464 | 2464 | ||
2465 | conf = setup_conf(mddev); | 2465 | conf = setup_conf(mddev); |
2466 | if (!IS_ERR(conf)) | 2466 | if (!IS_ERR(conf)) { |
2467 | list_for_each_entry(rdev, &mddev->disks, same_set) | 2467 | list_for_each_entry(rdev, &mddev->disks, same_set) |
2468 | if (rdev->raid_disk >= 0) | 2468 | if (rdev->raid_disk >= 0) |
2469 | rdev->new_raid_disk = rdev->raid_disk * 2; | 2469 | rdev->new_raid_disk = rdev->raid_disk * 2; |
2470 | 2470 | conf->barrier = 1; | |
2471 | } | ||
2472 | |||
2471 | return conf; | 2473 | return conf; |
2472 | } | 2474 | } |
2473 | 2475 | ||
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index 5044babfcda0..702812824195 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c | |||
@@ -5517,7 +5517,6 @@ static int raid5_start_reshape(mddev_t *mddev) | |||
5517 | raid5_conf_t *conf = mddev->private; | 5517 | raid5_conf_t *conf = mddev->private; |
5518 | mdk_rdev_t *rdev; | 5518 | mdk_rdev_t *rdev; |
5519 | int spares = 0; | 5519 | int spares = 0; |
5520 | int added_devices = 0; | ||
5521 | unsigned long flags; | 5520 | unsigned long flags; |
5522 | 5521 | ||
5523 | if (test_bit(MD_RECOVERY_RUNNING, &mddev->recovery)) | 5522 | if (test_bit(MD_RECOVERY_RUNNING, &mddev->recovery)) |
@@ -5527,8 +5526,8 @@ static int raid5_start_reshape(mddev_t *mddev) | |||
5527 | return -ENOSPC; | 5526 | return -ENOSPC; |
5528 | 5527 | ||
5529 | list_for_each_entry(rdev, &mddev->disks, same_set) | 5528 | list_for_each_entry(rdev, &mddev->disks, same_set) |
5530 | if ((rdev->raid_disk < 0 || rdev->raid_disk >= conf->raid_disks) | 5529 | if (!test_bit(In_sync, &rdev->flags) |
5531 | && !test_bit(Faulty, &rdev->flags)) | 5530 | && !test_bit(Faulty, &rdev->flags)) |
5532 | spares++; | 5531 | spares++; |
5533 | 5532 | ||
5534 | if (spares - mddev->degraded < mddev->delta_disks - conf->max_degraded) | 5533 | if (spares - mddev->degraded < mddev->delta_disks - conf->max_degraded) |
@@ -5571,34 +5570,35 @@ static int raid5_start_reshape(mddev_t *mddev) | |||
5571 | * to correctly record the "partially reconstructed" state of | 5570 | * to correctly record the "partially reconstructed" state of |
5572 | * such devices during the reshape and confusion could result. | 5571 | * such devices during the reshape and confusion could result. |
5573 | */ | 5572 | */ |
5574 | if (mddev->delta_disks >= 0) | 5573 | if (mddev->delta_disks >= 0) { |
5575 | list_for_each_entry(rdev, &mddev->disks, same_set) | 5574 | int added_devices = 0; |
5576 | if (rdev->raid_disk < 0 && | 5575 | list_for_each_entry(rdev, &mddev->disks, same_set) |
5577 | !test_bit(Faulty, &rdev->flags)) { | 5576 | if (rdev->raid_disk < 0 && |
5578 | if (raid5_add_disk(mddev, rdev) == 0) { | 5577 | !test_bit(Faulty, &rdev->flags)) { |
5579 | char nm[20]; | 5578 | if (raid5_add_disk(mddev, rdev) == 0) { |
5580 | if (rdev->raid_disk >= conf->previous_raid_disks) { | 5579 | char nm[20]; |
5581 | set_bit(In_sync, &rdev->flags); | 5580 | if (rdev->raid_disk |
5582 | added_devices++; | 5581 | >= conf->previous_raid_disks) { |
5583 | } else | 5582 | set_bit(In_sync, &rdev->flags); |
5584 | rdev->recovery_offset = 0; | 5583 | added_devices++; |
5585 | sprintf(nm, "rd%d", rdev->raid_disk); | 5584 | } else |
5586 | if (sysfs_create_link(&mddev->kobj, | 5585 | rdev->recovery_offset = 0; |
5587 | &rdev->kobj, nm)) | 5586 | sprintf(nm, "rd%d", rdev->raid_disk); |
5588 | /* Failure here is OK */; | 5587 | if (sysfs_create_link(&mddev->kobj, |
5589 | } else | 5588 | &rdev->kobj, nm)) |
5590 | break; | 5589 | /* Failure here is OK */; |
5591 | } else if (rdev->raid_disk >= conf->previous_raid_disks | 5590 | } |
5592 | && !test_bit(Faulty, &rdev->flags)) { | 5591 | } else if (rdev->raid_disk >= conf->previous_raid_disks |
5593 | /* This is a spare that was manually added */ | 5592 | && !test_bit(Faulty, &rdev->flags)) { |
5594 | set_bit(In_sync, &rdev->flags); | 5593 | /* This is a spare that was manually added */ |
5595 | added_devices++; | 5594 | set_bit(In_sync, &rdev->flags); |
5596 | } | 5595 | added_devices++; |
5596 | } | ||
5597 | 5597 | ||
5598 | /* When a reshape changes the number of devices, ->degraded | 5598 | /* When a reshape changes the number of devices, |
5599 | * is measured against the larger of the pre and post number of | 5599 | * ->degraded is measured against the larger of the |
5600 | * devices.*/ | 5600 | * pre and post number of devices. |
5601 | if (mddev->delta_disks > 0) { | 5601 | */ |
5602 | spin_lock_irqsave(&conf->device_lock, flags); | 5602 | spin_lock_irqsave(&conf->device_lock, flags); |
5603 | mddev->degraded += (conf->raid_disks - conf->previous_raid_disks) | 5603 | mddev->degraded += (conf->raid_disks - conf->previous_raid_disks) |
5604 | - added_devices; | 5604 | - added_devices; |
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index afe8c6fa166a..54f91321749a 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig | |||
@@ -225,7 +225,7 @@ config MMC_OMAP | |||
225 | 225 | ||
226 | config MMC_OMAP_HS | 226 | config MMC_OMAP_HS |
227 | tristate "TI OMAP High Speed Multimedia Card Interface support" | 227 | tristate "TI OMAP High Speed Multimedia Card Interface support" |
228 | depends on ARCH_OMAP2430 || ARCH_OMAP3 || ARCH_OMAP4 | 228 | depends on SOC_OMAP2430 || ARCH_OMAP3 || ARCH_OMAP4 |
229 | help | 229 | help |
230 | This selects the TI OMAP High Speed Multimedia card Interface. | 230 | This selects the TI OMAP High Speed Multimedia card Interface. |
231 | If you have an OMAP2430 or OMAP3 board or OMAP4 board with a | 231 | If you have an OMAP2430 or OMAP3 board or OMAP4 board with a |
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c index 0c7811faf72c..a179cc6d79f2 100644 --- a/drivers/net/benet/be_cmds.c +++ b/drivers/net/benet/be_cmds.c | |||
@@ -1786,6 +1786,10 @@ int be_cmd_get_seeprom_data(struct be_adapter *adapter, | |||
1786 | spin_lock_bh(&adapter->mcc_lock); | 1786 | spin_lock_bh(&adapter->mcc_lock); |
1787 | 1787 | ||
1788 | wrb = wrb_from_mccq(adapter); | 1788 | wrb = wrb_from_mccq(adapter); |
1789 | if (!wrb) { | ||
1790 | status = -EBUSY; | ||
1791 | goto err; | ||
1792 | } | ||
1789 | req = nonemb_cmd->va; | 1793 | req = nonemb_cmd->va; |
1790 | sge = nonembedded_sgl(wrb); | 1794 | sge = nonembedded_sgl(wrb); |
1791 | 1795 | ||
@@ -1801,6 +1805,7 @@ int be_cmd_get_seeprom_data(struct be_adapter *adapter, | |||
1801 | 1805 | ||
1802 | status = be_mcc_notify_wait(adapter); | 1806 | status = be_mcc_notify_wait(adapter); |
1803 | 1807 | ||
1808 | err: | ||
1804 | spin_unlock_bh(&adapter->mcc_lock); | 1809 | spin_unlock_bh(&adapter->mcc_lock); |
1805 | return status; | 1810 | return status; |
1806 | } | 1811 | } |
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index f40740e68ea5..d584d32c747d 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -4276,9 +4276,12 @@ void bnx2x_set_storm_rx_mode(struct bnx2x *bp) | |||
4276 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | | 4276 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | |
4277 | BNX2X_ACCEPT_MULTICAST; | 4277 | BNX2X_ACCEPT_MULTICAST; |
4278 | #ifdef BCM_CNIC | 4278 | #ifdef BCM_CNIC |
4279 | cl_id = bnx2x_fcoe(bp, cl_id); | 4279 | if (!NO_FCOE(bp)) { |
4280 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4280 | cl_id = bnx2x_fcoe(bp, cl_id); |
4281 | BNX2X_ACCEPT_MULTICAST); | 4281 | bnx2x_rxq_set_mac_filters(bp, cl_id, |
4282 | BNX2X_ACCEPT_UNICAST | | ||
4283 | BNX2X_ACCEPT_MULTICAST); | ||
4284 | } | ||
4282 | #endif | 4285 | #endif |
4283 | break; | 4286 | break; |
4284 | 4287 | ||
@@ -4286,18 +4289,29 @@ void bnx2x_set_storm_rx_mode(struct bnx2x *bp) | |||
4286 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | | 4289 | def_q_filters |= BNX2X_ACCEPT_UNICAST | BNX2X_ACCEPT_BROADCAST | |
4287 | BNX2X_ACCEPT_ALL_MULTICAST; | 4290 | BNX2X_ACCEPT_ALL_MULTICAST; |
4288 | #ifdef BCM_CNIC | 4291 | #ifdef BCM_CNIC |
4289 | cl_id = bnx2x_fcoe(bp, cl_id); | 4292 | /* |
4290 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4293 | * Prevent duplication of multicast packets by configuring FCoE |
4291 | BNX2X_ACCEPT_MULTICAST); | 4294 | * L2 Client to receive only matched unicast frames. |
4295 | */ | ||
4296 | if (!NO_FCOE(bp)) { | ||
4297 | cl_id = bnx2x_fcoe(bp, cl_id); | ||
4298 | bnx2x_rxq_set_mac_filters(bp, cl_id, | ||
4299 | BNX2X_ACCEPT_UNICAST); | ||
4300 | } | ||
4292 | #endif | 4301 | #endif |
4293 | break; | 4302 | break; |
4294 | 4303 | ||
4295 | case BNX2X_RX_MODE_PROMISC: | 4304 | case BNX2X_RX_MODE_PROMISC: |
4296 | def_q_filters |= BNX2X_PROMISCUOUS_MODE; | 4305 | def_q_filters |= BNX2X_PROMISCUOUS_MODE; |
4297 | #ifdef BCM_CNIC | 4306 | #ifdef BCM_CNIC |
4298 | cl_id = bnx2x_fcoe(bp, cl_id); | 4307 | /* |
4299 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_UNICAST | | 4308 | * Prevent packets duplication by configuring DROP_ALL for FCoE |
4300 | BNX2X_ACCEPT_MULTICAST); | 4309 | * L2 Client. |
4310 | */ | ||
4311 | if (!NO_FCOE(bp)) { | ||
4312 | cl_id = bnx2x_fcoe(bp, cl_id); | ||
4313 | bnx2x_rxq_set_mac_filters(bp, cl_id, BNX2X_ACCEPT_NONE); | ||
4314 | } | ||
4301 | #endif | 4315 | #endif |
4302 | /* pass management unicast packets as well */ | 4316 | /* pass management unicast packets as well */ |
4303 | llh_mask |= NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST; | 4317 | llh_mask |= NIG_LLH0_BRB1_DRV_MASK_REG_LLH0_BRB1_DRV_MASK_UNCST; |
diff --git a/drivers/net/can/mscan/Kconfig b/drivers/net/can/mscan/Kconfig index 27d1d398e25e..d38706958af6 100644 --- a/drivers/net/can/mscan/Kconfig +++ b/drivers/net/can/mscan/Kconfig | |||
@@ -1,5 +1,5 @@ | |||
1 | config CAN_MSCAN | 1 | config CAN_MSCAN |
2 | depends on CAN_DEV && (PPC || M68K || M68KNOMMU) | 2 | depends on CAN_DEV && (PPC || M68K) |
3 | tristate "Support for Freescale MSCAN based chips" | 3 | tristate "Support for Freescale MSCAN based chips" |
4 | ---help--- | 4 | ---help--- |
5 | The Motorola Scalable Controller Area Network (MSCAN) definition | 5 | The Motorola Scalable Controller Area Network (MSCAN) definition |
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c index c42e97268248..e54712b22c27 100644 --- a/drivers/net/can/pch_can.c +++ b/drivers/net/can/pch_can.c | |||
@@ -185,7 +185,7 @@ struct pch_can_priv { | |||
185 | 185 | ||
186 | static struct can_bittiming_const pch_can_bittiming_const = { | 186 | static struct can_bittiming_const pch_can_bittiming_const = { |
187 | .name = KBUILD_MODNAME, | 187 | .name = KBUILD_MODNAME, |
188 | .tseg1_min = 1, | 188 | .tseg1_min = 2, |
189 | .tseg1_max = 16, | 189 | .tseg1_max = 16, |
190 | .tseg2_min = 1, | 190 | .tseg2_min = 1, |
191 | .tseg2_max = 8, | 191 | .tseg2_max = 8, |
@@ -959,13 +959,13 @@ static void __devexit pch_can_remove(struct pci_dev *pdev) | |||
959 | struct pch_can_priv *priv = netdev_priv(ndev); | 959 | struct pch_can_priv *priv = netdev_priv(ndev); |
960 | 960 | ||
961 | unregister_candev(priv->ndev); | 961 | unregister_candev(priv->ndev); |
962 | pci_iounmap(pdev, priv->regs); | ||
963 | if (priv->use_msi) | 962 | if (priv->use_msi) |
964 | pci_disable_msi(priv->dev); | 963 | pci_disable_msi(priv->dev); |
965 | pci_release_regions(pdev); | 964 | pci_release_regions(pdev); |
966 | pci_disable_device(pdev); | 965 | pci_disable_device(pdev); |
967 | pci_set_drvdata(pdev, NULL); | 966 | pci_set_drvdata(pdev, NULL); |
968 | pch_can_reset(priv); | 967 | pch_can_reset(priv); |
968 | pci_iounmap(pdev, priv->regs); | ||
969 | free_candev(priv->ndev); | 969 | free_candev(priv->ndev); |
970 | } | 970 | } |
971 | 971 | ||
@@ -1238,6 +1238,7 @@ static int __devinit pch_can_probe(struct pci_dev *pdev, | |||
1238 | priv->use_msi = 0; | 1238 | priv->use_msi = 0; |
1239 | } else { | 1239 | } else { |
1240 | netdev_err(ndev, "PCH CAN opened with MSI\n"); | 1240 | netdev_err(ndev, "PCH CAN opened with MSI\n"); |
1241 | pci_set_master(pdev); | ||
1241 | priv->use_msi = 1; | 1242 | priv->use_msi = 1; |
1242 | } | 1243 | } |
1243 | 1244 | ||
diff --git a/drivers/net/can/softing/softing_cs.c b/drivers/net/can/softing/softing_cs.c index 300fe75dd1a7..c11bb4de8630 100644 --- a/drivers/net/can/softing/softing_cs.c +++ b/drivers/net/can/softing/softing_cs.c | |||
@@ -19,6 +19,7 @@ | |||
19 | 19 | ||
20 | #include <linux/module.h> | 20 | #include <linux/module.h> |
21 | #include <linux/kernel.h> | 21 | #include <linux/kernel.h> |
22 | #include <linux/slab.h> | ||
22 | 23 | ||
23 | #include <pcmcia/cistpl.h> | 24 | #include <pcmcia/cistpl.h> |
24 | #include <pcmcia/ds.h> | 25 | #include <pcmcia/ds.h> |
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index aed223b1b897..7501d977d992 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
@@ -124,6 +124,7 @@ static s32 e1000_set_phy_type(struct e1000_hw *hw) | |||
124 | case M88E1000_I_PHY_ID: | 124 | case M88E1000_I_PHY_ID: |
125 | case M88E1011_I_PHY_ID: | 125 | case M88E1011_I_PHY_ID: |
126 | case M88E1111_I_PHY_ID: | 126 | case M88E1111_I_PHY_ID: |
127 | case M88E1118_E_PHY_ID: | ||
127 | hw->phy_type = e1000_phy_m88; | 128 | hw->phy_type = e1000_phy_m88; |
128 | break; | 129 | break; |
129 | case IGP01E1000_I_PHY_ID: | 130 | case IGP01E1000_I_PHY_ID: |
@@ -3222,7 +3223,8 @@ static s32 e1000_detect_gig_phy(struct e1000_hw *hw) | |||
3222 | break; | 3223 | break; |
3223 | case e1000_ce4100: | 3224 | case e1000_ce4100: |
3224 | if ((hw->phy_id == RTL8211B_PHY_ID) || | 3225 | if ((hw->phy_id == RTL8211B_PHY_ID) || |
3225 | (hw->phy_id == RTL8201N_PHY_ID)) | 3226 | (hw->phy_id == RTL8201N_PHY_ID) || |
3227 | (hw->phy_id == M88E1118_E_PHY_ID)) | ||
3226 | match = true; | 3228 | match = true; |
3227 | break; | 3229 | break; |
3228 | case e1000_82541: | 3230 | case e1000_82541: |
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h index 196eeda2dd6c..c70b23d52284 100644 --- a/drivers/net/e1000/e1000_hw.h +++ b/drivers/net/e1000/e1000_hw.h | |||
@@ -2917,6 +2917,7 @@ struct e1000_host_command_info { | |||
2917 | #define M88E1000_14_PHY_ID M88E1000_E_PHY_ID | 2917 | #define M88E1000_14_PHY_ID M88E1000_E_PHY_ID |
2918 | #define M88E1011_I_REV_4 0x04 | 2918 | #define M88E1011_I_REV_4 0x04 |
2919 | #define M88E1111_I_PHY_ID 0x01410CC0 | 2919 | #define M88E1111_I_PHY_ID 0x01410CC0 |
2920 | #define M88E1118_E_PHY_ID 0x01410E40 | ||
2920 | #define L1LXT971A_PHY_ID 0x001378E0 | 2921 | #define L1LXT971A_PHY_ID 0x001378E0 |
2921 | 2922 | ||
2922 | #define RTL8211B_PHY_ID 0x001CC910 | 2923 | #define RTL8211B_PHY_ID 0x001CC910 |
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index 1c18f26b0812..3065870cf2a7 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -4309,7 +4309,6 @@ link_up: | |||
4309 | * to get done, so reset controller to flush Tx. | 4309 | * to get done, so reset controller to flush Tx. |
4310 | * (Do the reset outside of interrupt context). | 4310 | * (Do the reset outside of interrupt context). |
4311 | */ | 4311 | */ |
4312 | adapter->tx_timeout_count++; | ||
4313 | schedule_work(&adapter->reset_task); | 4312 | schedule_work(&adapter->reset_task); |
4314 | /* return immediately since reset is imminent */ | 4313 | /* return immediately since reset is imminent */ |
4315 | return; | 4314 | return; |
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c index d5ede2df3e42..ebbda7d15254 100644 --- a/drivers/net/ixgbe/ixgbe_common.c +++ b/drivers/net/ixgbe/ixgbe_common.c | |||
@@ -1370,6 +1370,9 @@ s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw) | |||
1370 | hw_dbg(hw, " New MAC Addr =%pM\n", hw->mac.addr); | 1370 | hw_dbg(hw, " New MAC Addr =%pM\n", hw->mac.addr); |
1371 | 1371 | ||
1372 | hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); | 1372 | hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0, IXGBE_RAH_AV); |
1373 | |||
1374 | /* clear VMDq pool/queue selection for RAR 0 */ | ||
1375 | hw->mac.ops.clear_vmdq(hw, 0, IXGBE_CLEAR_VMDQ_ALL); | ||
1373 | } | 1376 | } |
1374 | hw->addr_ctrl.overflow_promisc = 0; | 1377 | hw->addr_ctrl.overflow_promisc = 0; |
1375 | 1378 | ||
diff --git a/drivers/net/ixgbe/ixgbe_fcoe.c b/drivers/net/ixgbe/ixgbe_fcoe.c index 6342d4859790..8753980668c7 100644 --- a/drivers/net/ixgbe/ixgbe_fcoe.c +++ b/drivers/net/ixgbe/ixgbe_fcoe.c | |||
@@ -165,7 +165,7 @@ int ixgbe_fcoe_ddp_get(struct net_device *netdev, u16 xid, | |||
165 | unsigned int thisoff = 0; | 165 | unsigned int thisoff = 0; |
166 | unsigned int thislen = 0; | 166 | unsigned int thislen = 0; |
167 | u32 fcbuff, fcdmarw, fcfltrw; | 167 | u32 fcbuff, fcdmarw, fcfltrw; |
168 | dma_addr_t addr; | 168 | dma_addr_t addr = 0; |
169 | 169 | ||
170 | if (!netdev || !sgl) | 170 | if (!netdev || !sgl) |
171 | return 0; | 171 | return 0; |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 602078b84892..fbae703b46d7 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -52,7 +52,7 @@ char ixgbe_driver_name[] = "ixgbe"; | |||
52 | static const char ixgbe_driver_string[] = | 52 | static const char ixgbe_driver_string[] = |
53 | "Intel(R) 10 Gigabit PCI Express Network Driver"; | 53 | "Intel(R) 10 Gigabit PCI Express Network Driver"; |
54 | 54 | ||
55 | #define DRV_VERSION "3.0.12-k2" | 55 | #define DRV_VERSION "3.2.9-k2" |
56 | const char ixgbe_driver_version[] = DRV_VERSION; | 56 | const char ixgbe_driver_version[] = DRV_VERSION; |
57 | static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation."; | 57 | static char ixgbe_copyright[] = "Copyright (c) 1999-2010 Intel Corporation."; |
58 | 58 | ||
@@ -3176,9 +3176,16 @@ static void ixgbe_set_rx_buffer_len(struct ixgbe_adapter *adapter) | |||
3176 | u32 mhadd, hlreg0; | 3176 | u32 mhadd, hlreg0; |
3177 | 3177 | ||
3178 | /* Decide whether to use packet split mode or not */ | 3178 | /* Decide whether to use packet split mode or not */ |
3179 | /* On by default */ | ||
3180 | adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; | ||
3181 | |||
3179 | /* Do not use packet split if we're in SR-IOV Mode */ | 3182 | /* Do not use packet split if we're in SR-IOV Mode */ |
3180 | if (!adapter->num_vfs) | 3183 | if (adapter->num_vfs) |
3181 | adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED; | 3184 | adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; |
3185 | |||
3186 | /* Disable packet split due to 82599 erratum #45 */ | ||
3187 | if (hw->mac.type == ixgbe_mac_82599EB) | ||
3188 | adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED; | ||
3182 | 3189 | ||
3183 | /* Set the RX buffer length according to the mode */ | 3190 | /* Set the RX buffer length according to the mode */ |
3184 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { | 3191 | if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) { |
@@ -4863,16 +4870,13 @@ static int ixgbe_alloc_q_vectors(struct ixgbe_adapter *adapter) | |||
4863 | { | 4870 | { |
4864 | int q_idx, num_q_vectors; | 4871 | int q_idx, num_q_vectors; |
4865 | struct ixgbe_q_vector *q_vector; | 4872 | struct ixgbe_q_vector *q_vector; |
4866 | int napi_vectors; | ||
4867 | int (*poll)(struct napi_struct *, int); | 4873 | int (*poll)(struct napi_struct *, int); |
4868 | 4874 | ||
4869 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { | 4875 | if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED) { |
4870 | num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; | 4876 | num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS; |
4871 | napi_vectors = adapter->num_rx_queues; | ||
4872 | poll = &ixgbe_clean_rxtx_many; | 4877 | poll = &ixgbe_clean_rxtx_many; |
4873 | } else { | 4878 | } else { |
4874 | num_q_vectors = 1; | 4879 | num_q_vectors = 1; |
4875 | napi_vectors = 1; | ||
4876 | poll = &ixgbe_poll; | 4880 | poll = &ixgbe_poll; |
4877 | } | 4881 | } |
4878 | 4882 | ||
diff --git a/drivers/net/ixgbe/ixgbe_sriov.c b/drivers/net/ixgbe/ixgbe_sriov.c index 47b15738b009..187b3a16ec1f 100644 --- a/drivers/net/ixgbe/ixgbe_sriov.c +++ b/drivers/net/ixgbe/ixgbe_sriov.c | |||
@@ -110,12 +110,10 @@ static int ixgbe_set_vf_vlan(struct ixgbe_adapter *adapter, int add, int vid, | |||
110 | return adapter->hw.mac.ops.set_vfta(&adapter->hw, vid, vf, (bool)add); | 110 | return adapter->hw.mac.ops.set_vfta(&adapter->hw, vid, vf, (bool)add); |
111 | } | 111 | } |
112 | 112 | ||
113 | |||
114 | static void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe) | 113 | static void ixgbe_set_vmolr(struct ixgbe_hw *hw, u32 vf, bool aupe) |
115 | { | 114 | { |
116 | u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); | 115 | u32 vmolr = IXGBE_READ_REG(hw, IXGBE_VMOLR(vf)); |
117 | vmolr |= (IXGBE_VMOLR_ROMPE | | 116 | vmolr |= (IXGBE_VMOLR_ROMPE | |
118 | IXGBE_VMOLR_ROPE | | ||
119 | IXGBE_VMOLR_BAM); | 117 | IXGBE_VMOLR_BAM); |
120 | if (aupe) | 118 | if (aupe) |
121 | vmolr |= IXGBE_VMOLR_AUPE; | 119 | vmolr |= IXGBE_VMOLR_AUPE; |
diff --git a/drivers/net/ixgbe/ixgbe_x540.c b/drivers/net/ixgbe/ixgbe_x540.c index 3a8923993ce3..f2518b01067d 100644 --- a/drivers/net/ixgbe/ixgbe_x540.c +++ b/drivers/net/ixgbe/ixgbe_x540.c | |||
@@ -133,17 +133,17 @@ static s32 ixgbe_reset_hw_X540(struct ixgbe_hw *hw) | |||
133 | } | 133 | } |
134 | 134 | ||
135 | ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); | 135 | ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); |
136 | IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | IXGBE_CTRL_RST)); | 136 | IXGBE_WRITE_REG(hw, IXGBE_CTRL, (ctrl | reset_bit)); |
137 | IXGBE_WRITE_FLUSH(hw); | 137 | IXGBE_WRITE_FLUSH(hw); |
138 | 138 | ||
139 | /* Poll for reset bit to self-clear indicating reset is complete */ | 139 | /* Poll for reset bit to self-clear indicating reset is complete */ |
140 | for (i = 0; i < 10; i++) { | 140 | for (i = 0; i < 10; i++) { |
141 | udelay(1); | 141 | udelay(1); |
142 | ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); | 142 | ctrl = IXGBE_READ_REG(hw, IXGBE_CTRL); |
143 | if (!(ctrl & IXGBE_CTRL_RST)) | 143 | if (!(ctrl & reset_bit)) |
144 | break; | 144 | break; |
145 | } | 145 | } |
146 | if (ctrl & IXGBE_CTRL_RST) { | 146 | if (ctrl & reset_bit) { |
147 | status = IXGBE_ERR_RESET_FAILED; | 147 | status = IXGBE_ERR_RESET_FAILED; |
148 | hw_dbg(hw, "Reset polling failed to complete.\n"); | 148 | hw_dbg(hw, "Reset polling failed to complete.\n"); |
149 | } | 149 | } |
diff --git a/drivers/net/pch_gbe/pch_gbe_main.c b/drivers/net/pch_gbe/pch_gbe_main.c index 1bf12339441b..4c9a7d4f3fca 100644 --- a/drivers/net/pch_gbe/pch_gbe_main.c +++ b/drivers/net/pch_gbe/pch_gbe_main.c | |||
@@ -519,7 +519,9 @@ static void pch_gbe_reset_task(struct work_struct *work) | |||
519 | struct pch_gbe_adapter *adapter; | 519 | struct pch_gbe_adapter *adapter; |
520 | adapter = container_of(work, struct pch_gbe_adapter, reset_task); | 520 | adapter = container_of(work, struct pch_gbe_adapter, reset_task); |
521 | 521 | ||
522 | rtnl_lock(); | ||
522 | pch_gbe_reinit_locked(adapter); | 523 | pch_gbe_reinit_locked(adapter); |
524 | rtnl_unlock(); | ||
523 | } | 525 | } |
524 | 526 | ||
525 | /** | 527 | /** |
@@ -528,14 +530,8 @@ static void pch_gbe_reset_task(struct work_struct *work) | |||
528 | */ | 530 | */ |
529 | void pch_gbe_reinit_locked(struct pch_gbe_adapter *adapter) | 531 | void pch_gbe_reinit_locked(struct pch_gbe_adapter *adapter) |
530 | { | 532 | { |
531 | struct net_device *netdev = adapter->netdev; | 533 | pch_gbe_down(adapter); |
532 | 534 | pch_gbe_up(adapter); | |
533 | rtnl_lock(); | ||
534 | if (netif_running(netdev)) { | ||
535 | pch_gbe_down(adapter); | ||
536 | pch_gbe_up(adapter); | ||
537 | } | ||
538 | rtnl_unlock(); | ||
539 | } | 535 | } |
540 | 536 | ||
541 | /** | 537 | /** |
diff --git a/drivers/net/sis900.c b/drivers/net/sis900.c index 5976d1d51df1..640e368ebeee 100644 --- a/drivers/net/sis900.c +++ b/drivers/net/sis900.c | |||
@@ -1777,6 +1777,7 @@ static int sis900_rx(struct net_device *net_dev) | |||
1777 | "cur_rx:%4.4d, dirty_rx:%4.4d\n", | 1777 | "cur_rx:%4.4d, dirty_rx:%4.4d\n", |
1778 | net_dev->name, sis_priv->cur_rx, | 1778 | net_dev->name, sis_priv->cur_rx, |
1779 | sis_priv->dirty_rx); | 1779 | sis_priv->dirty_rx); |
1780 | dev_kfree_skb(skb); | ||
1780 | break; | 1781 | break; |
1781 | } | 1782 | } |
1782 | 1783 | ||
diff --git a/drivers/net/usb/cdc_ncm.c b/drivers/net/usb/cdc_ncm.c index 04e8ce14a1d0..7113168473cf 100644 --- a/drivers/net/usb/cdc_ncm.c +++ b/drivers/net/usb/cdc_ncm.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * cdc_ncm.c | 2 | * cdc_ncm.c |
3 | * | 3 | * |
4 | * Copyright (C) ST-Ericsson 2010 | 4 | * Copyright (C) ST-Ericsson 2010-2011 |
5 | * Contact: Alexey Orishko <alexey.orishko@stericsson.com> | 5 | * Contact: Alexey Orishko <alexey.orishko@stericsson.com> |
6 | * Original author: Hans Petter Selasky <hans.petter.selasky@stericsson.com> | 6 | * Original author: Hans Petter Selasky <hans.petter.selasky@stericsson.com> |
7 | * | 7 | * |
@@ -54,7 +54,7 @@ | |||
54 | #include <linux/usb/usbnet.h> | 54 | #include <linux/usb/usbnet.h> |
55 | #include <linux/usb/cdc.h> | 55 | #include <linux/usb/cdc.h> |
56 | 56 | ||
57 | #define DRIVER_VERSION "17-Jan-2011" | 57 | #define DRIVER_VERSION "7-Feb-2011" |
58 | 58 | ||
59 | /* CDC NCM subclass 3.2.1 */ | 59 | /* CDC NCM subclass 3.2.1 */ |
60 | #define USB_CDC_NCM_NDP16_LENGTH_MIN 0x10 | 60 | #define USB_CDC_NCM_NDP16_LENGTH_MIN 0x10 |
@@ -77,6 +77,9 @@ | |||
77 | */ | 77 | */ |
78 | #define CDC_NCM_DPT_DATAGRAMS_MAX 32 | 78 | #define CDC_NCM_DPT_DATAGRAMS_MAX 32 |
79 | 79 | ||
80 | /* Maximum amount of IN datagrams in NTB */ | ||
81 | #define CDC_NCM_DPT_DATAGRAMS_IN_MAX 0 /* unlimited */ | ||
82 | |||
80 | /* Restart the timer, if amount of datagrams is less than given value */ | 83 | /* Restart the timer, if amount of datagrams is less than given value */ |
81 | #define CDC_NCM_RESTART_TIMER_DATAGRAM_CNT 3 | 84 | #define CDC_NCM_RESTART_TIMER_DATAGRAM_CNT 3 |
82 | 85 | ||
@@ -85,11 +88,6 @@ | |||
85 | (sizeof(struct usb_cdc_ncm_nth16) + sizeof(struct usb_cdc_ncm_ndp16) + \ | 88 | (sizeof(struct usb_cdc_ncm_nth16) + sizeof(struct usb_cdc_ncm_ndp16) + \ |
86 | (CDC_NCM_DPT_DATAGRAMS_MAX + 1) * sizeof(struct usb_cdc_ncm_dpe16)) | 89 | (CDC_NCM_DPT_DATAGRAMS_MAX + 1) * sizeof(struct usb_cdc_ncm_dpe16)) |
87 | 90 | ||
88 | struct connection_speed_change { | ||
89 | __le32 USBitRate; /* holds 3GPP downlink value, bits per second */ | ||
90 | __le32 DSBitRate; /* holds 3GPP uplink value, bits per second */ | ||
91 | } __attribute__ ((packed)); | ||
92 | |||
93 | struct cdc_ncm_data { | 91 | struct cdc_ncm_data { |
94 | struct usb_cdc_ncm_nth16 nth16; | 92 | struct usb_cdc_ncm_nth16 nth16; |
95 | struct usb_cdc_ncm_ndp16 ndp16; | 93 | struct usb_cdc_ncm_ndp16 ndp16; |
@@ -198,10 +196,10 @@ static u8 cdc_ncm_setup(struct cdc_ncm_ctx *ctx) | |||
198 | { | 196 | { |
199 | struct usb_cdc_notification req; | 197 | struct usb_cdc_notification req; |
200 | u32 val; | 198 | u32 val; |
201 | __le16 max_datagram_size; | ||
202 | u8 flags; | 199 | u8 flags; |
203 | u8 iface_no; | 200 | u8 iface_no; |
204 | int err; | 201 | int err; |
202 | u16 ntb_fmt_supported; | ||
205 | 203 | ||
206 | iface_no = ctx->control->cur_altsetting->desc.bInterfaceNumber; | 204 | iface_no = ctx->control->cur_altsetting->desc.bInterfaceNumber; |
207 | 205 | ||
@@ -223,6 +221,9 @@ static u8 cdc_ncm_setup(struct cdc_ncm_ctx *ctx) | |||
223 | ctx->tx_remainder = le16_to_cpu(ctx->ncm_parm.wNdpOutPayloadRemainder); | 221 | ctx->tx_remainder = le16_to_cpu(ctx->ncm_parm.wNdpOutPayloadRemainder); |
224 | ctx->tx_modulus = le16_to_cpu(ctx->ncm_parm.wNdpOutDivisor); | 222 | ctx->tx_modulus = le16_to_cpu(ctx->ncm_parm.wNdpOutDivisor); |
225 | ctx->tx_ndp_modulus = le16_to_cpu(ctx->ncm_parm.wNdpOutAlignment); | 223 | ctx->tx_ndp_modulus = le16_to_cpu(ctx->ncm_parm.wNdpOutAlignment); |
224 | /* devices prior to NCM Errata shall set this field to zero */ | ||
225 | ctx->tx_max_datagrams = le16_to_cpu(ctx->ncm_parm.wNtbOutMaxDatagrams); | ||
226 | ntb_fmt_supported = le16_to_cpu(ctx->ncm_parm.bmNtbFormatsSupported); | ||
226 | 227 | ||
227 | if (ctx->func_desc != NULL) | 228 | if (ctx->func_desc != NULL) |
228 | flags = ctx->func_desc->bmNetworkCapabilities; | 229 | flags = ctx->func_desc->bmNetworkCapabilities; |
@@ -231,22 +232,58 @@ static u8 cdc_ncm_setup(struct cdc_ncm_ctx *ctx) | |||
231 | 232 | ||
232 | pr_debug("dwNtbInMaxSize=%u dwNtbOutMaxSize=%u " | 233 | pr_debug("dwNtbInMaxSize=%u dwNtbOutMaxSize=%u " |
233 | "wNdpOutPayloadRemainder=%u wNdpOutDivisor=%u " | 234 | "wNdpOutPayloadRemainder=%u wNdpOutDivisor=%u " |
234 | "wNdpOutAlignment=%u flags=0x%x\n", | 235 | "wNdpOutAlignment=%u wNtbOutMaxDatagrams=%u flags=0x%x\n", |
235 | ctx->rx_max, ctx->tx_max, ctx->tx_remainder, ctx->tx_modulus, | 236 | ctx->rx_max, ctx->tx_max, ctx->tx_remainder, ctx->tx_modulus, |
236 | ctx->tx_ndp_modulus, flags); | 237 | ctx->tx_ndp_modulus, ctx->tx_max_datagrams, flags); |
237 | 238 | ||
238 | /* max count of tx datagrams without terminating NULL entry */ | 239 | /* max count of tx datagrams */ |
239 | ctx->tx_max_datagrams = CDC_NCM_DPT_DATAGRAMS_MAX; | 240 | if ((ctx->tx_max_datagrams == 0) || |
241 | (ctx->tx_max_datagrams > CDC_NCM_DPT_DATAGRAMS_MAX)) | ||
242 | ctx->tx_max_datagrams = CDC_NCM_DPT_DATAGRAMS_MAX; | ||
240 | 243 | ||
241 | /* verify maximum size of received NTB in bytes */ | 244 | /* verify maximum size of received NTB in bytes */ |
242 | if ((ctx->rx_max < | 245 | if (ctx->rx_max < USB_CDC_NCM_NTB_MIN_IN_SIZE) { |
243 | (CDC_NCM_MIN_HDR_SIZE + CDC_NCM_MIN_DATAGRAM_SIZE)) || | 246 | pr_debug("Using min receive length=%d\n", |
244 | (ctx->rx_max > CDC_NCM_NTB_MAX_SIZE_RX)) { | 247 | USB_CDC_NCM_NTB_MIN_IN_SIZE); |
248 | ctx->rx_max = USB_CDC_NCM_NTB_MIN_IN_SIZE; | ||
249 | } | ||
250 | |||
251 | if (ctx->rx_max > CDC_NCM_NTB_MAX_SIZE_RX) { | ||
245 | pr_debug("Using default maximum receive length=%d\n", | 252 | pr_debug("Using default maximum receive length=%d\n", |
246 | CDC_NCM_NTB_MAX_SIZE_RX); | 253 | CDC_NCM_NTB_MAX_SIZE_RX); |
247 | ctx->rx_max = CDC_NCM_NTB_MAX_SIZE_RX; | 254 | ctx->rx_max = CDC_NCM_NTB_MAX_SIZE_RX; |
248 | } | 255 | } |
249 | 256 | ||
257 | /* inform device about NTB input size changes */ | ||
258 | if (ctx->rx_max != le32_to_cpu(ctx->ncm_parm.dwNtbInMaxSize)) { | ||
259 | req.bmRequestType = USB_TYPE_CLASS | USB_DIR_OUT | | ||
260 | USB_RECIP_INTERFACE; | ||
261 | req.bNotificationType = USB_CDC_SET_NTB_INPUT_SIZE; | ||
262 | req.wValue = 0; | ||
263 | req.wIndex = cpu_to_le16(iface_no); | ||
264 | |||
265 | if (flags & USB_CDC_NCM_NCAP_NTB_INPUT_SIZE) { | ||
266 | struct usb_cdc_ncm_ndp_input_size ndp_in_sz; | ||
267 | |||
268 | req.wLength = 8; | ||
269 | ndp_in_sz.dwNtbInMaxSize = cpu_to_le32(ctx->rx_max); | ||
270 | ndp_in_sz.wNtbInMaxDatagrams = | ||
271 | cpu_to_le16(CDC_NCM_DPT_DATAGRAMS_MAX); | ||
272 | ndp_in_sz.wReserved = 0; | ||
273 | err = cdc_ncm_do_request(ctx, &req, &ndp_in_sz, 0, NULL, | ||
274 | 1000); | ||
275 | } else { | ||
276 | __le32 dwNtbInMaxSize = cpu_to_le32(ctx->rx_max); | ||
277 | |||
278 | req.wLength = 4; | ||
279 | err = cdc_ncm_do_request(ctx, &req, &dwNtbInMaxSize, 0, | ||
280 | NULL, 1000); | ||
281 | } | ||
282 | |||
283 | if (err) | ||
284 | pr_debug("Setting NTB Input Size failed\n"); | ||
285 | } | ||
286 | |||
250 | /* verify maximum size of transmitted NTB in bytes */ | 287 | /* verify maximum size of transmitted NTB in bytes */ |
251 | if ((ctx->tx_max < | 288 | if ((ctx->tx_max < |
252 | (CDC_NCM_MIN_HDR_SIZE + CDC_NCM_MIN_DATAGRAM_SIZE)) || | 289 | (CDC_NCM_MIN_HDR_SIZE + CDC_NCM_MIN_DATAGRAM_SIZE)) || |
@@ -297,47 +334,84 @@ static u8 cdc_ncm_setup(struct cdc_ncm_ctx *ctx) | |||
297 | /* additional configuration */ | 334 | /* additional configuration */ |
298 | 335 | ||
299 | /* set CRC Mode */ | 336 | /* set CRC Mode */ |
300 | req.bmRequestType = USB_TYPE_CLASS | USB_DIR_OUT | USB_RECIP_INTERFACE; | 337 | if (flags & USB_CDC_NCM_NCAP_CRC_MODE) { |
301 | req.bNotificationType = USB_CDC_SET_CRC_MODE; | 338 | req.bmRequestType = USB_TYPE_CLASS | USB_DIR_OUT | |
302 | req.wValue = cpu_to_le16(USB_CDC_NCM_CRC_NOT_APPENDED); | 339 | USB_RECIP_INTERFACE; |
303 | req.wIndex = cpu_to_le16(iface_no); | 340 | req.bNotificationType = USB_CDC_SET_CRC_MODE; |
304 | req.wLength = 0; | 341 | req.wValue = cpu_to_le16(USB_CDC_NCM_CRC_NOT_APPENDED); |
305 | 342 | req.wIndex = cpu_to_le16(iface_no); | |
306 | err = cdc_ncm_do_request(ctx, &req, NULL, 0, NULL, 1000); | 343 | req.wLength = 0; |
307 | if (err) | 344 | |
308 | pr_debug("Setting CRC mode off failed\n"); | 345 | err = cdc_ncm_do_request(ctx, &req, NULL, 0, NULL, 1000); |
346 | if (err) | ||
347 | pr_debug("Setting CRC mode off failed\n"); | ||
348 | } | ||
309 | 349 | ||
310 | /* set NTB format */ | 350 | /* set NTB format, if both formats are supported */ |
311 | req.bmRequestType = USB_TYPE_CLASS | USB_DIR_OUT | USB_RECIP_INTERFACE; | 351 | if (ntb_fmt_supported & USB_CDC_NCM_NTH32_SIGN) { |
312 | req.bNotificationType = USB_CDC_SET_NTB_FORMAT; | 352 | req.bmRequestType = USB_TYPE_CLASS | USB_DIR_OUT | |
313 | req.wValue = cpu_to_le16(USB_CDC_NCM_NTB16_FORMAT); | 353 | USB_RECIP_INTERFACE; |
314 | req.wIndex = cpu_to_le16(iface_no); | 354 | req.bNotificationType = USB_CDC_SET_NTB_FORMAT; |
315 | req.wLength = 0; | 355 | req.wValue = cpu_to_le16(USB_CDC_NCM_NTB16_FORMAT); |
356 | req.wIndex = cpu_to_le16(iface_no); | ||
357 | req.wLength = 0; | ||
358 | |||
359 | err = cdc_ncm_do_request(ctx, &req, NULL, 0, NULL, 1000); | ||
360 | if (err) | ||
361 | pr_debug("Setting NTB format to 16-bit failed\n"); | ||
362 | } | ||
316 | 363 | ||
317 | err = cdc_ncm_do_request(ctx, &req, NULL, 0, NULL, 1000); | 364 | ctx->max_datagram_size = CDC_NCM_MIN_DATAGRAM_SIZE; |
318 | if (err) | ||
319 | pr_debug("Setting NTB format to 16-bit failed\n"); | ||
320 | 365 | ||
321 | /* set Max Datagram Size (MTU) */ | 366 | /* set Max Datagram Size (MTU) */ |
322 | req.bmRequestType = USB_TYPE_CLASS | USB_DIR_IN | USB_RECIP_INTERFACE; | 367 | if (flags & USB_CDC_NCM_NCAP_MAX_DATAGRAM_SIZE) { |
323 | req.bNotificationType = USB_CDC_GET_MAX_DATAGRAM_SIZE; | 368 | __le16 max_datagram_size; |
324 | req.wValue = 0; | 369 | u16 eth_max_sz = le16_to_cpu(ctx->ether_desc->wMaxSegmentSize); |
325 | req.wIndex = cpu_to_le16(iface_no); | 370 | |
326 | req.wLength = cpu_to_le16(2); | 371 | req.bmRequestType = USB_TYPE_CLASS | USB_DIR_IN | |
372 | USB_RECIP_INTERFACE; | ||
373 | req.bNotificationType = USB_CDC_GET_MAX_DATAGRAM_SIZE; | ||
374 | req.wValue = 0; | ||
375 | req.wIndex = cpu_to_le16(iface_no); | ||
376 | req.wLength = cpu_to_le16(2); | ||
377 | |||
378 | err = cdc_ncm_do_request(ctx, &req, &max_datagram_size, 0, NULL, | ||
379 | 1000); | ||
380 | if (err) { | ||
381 | pr_debug("GET_MAX_DATAGRAM_SIZE failed, use size=%u\n", | ||
382 | CDC_NCM_MIN_DATAGRAM_SIZE); | ||
383 | } else { | ||
384 | ctx->max_datagram_size = le16_to_cpu(max_datagram_size); | ||
385 | /* Check Eth descriptor value */ | ||
386 | if (eth_max_sz < CDC_NCM_MAX_DATAGRAM_SIZE) { | ||
387 | if (ctx->max_datagram_size > eth_max_sz) | ||
388 | ctx->max_datagram_size = eth_max_sz; | ||
389 | } else { | ||
390 | if (ctx->max_datagram_size > | ||
391 | CDC_NCM_MAX_DATAGRAM_SIZE) | ||
392 | ctx->max_datagram_size = | ||
393 | CDC_NCM_MAX_DATAGRAM_SIZE; | ||
394 | } | ||
327 | 395 | ||
328 | err = cdc_ncm_do_request(ctx, &req, &max_datagram_size, 0, NULL, 1000); | 396 | if (ctx->max_datagram_size < CDC_NCM_MIN_DATAGRAM_SIZE) |
329 | if (err) { | 397 | ctx->max_datagram_size = |
330 | pr_debug(" GET_MAX_DATAGRAM_SIZE failed, using size=%u\n", | 398 | CDC_NCM_MIN_DATAGRAM_SIZE; |
331 | CDC_NCM_MIN_DATAGRAM_SIZE); | 399 | |
332 | /* use default */ | 400 | /* if value changed, update device */ |
333 | ctx->max_datagram_size = CDC_NCM_MIN_DATAGRAM_SIZE; | 401 | req.bmRequestType = USB_TYPE_CLASS | USB_DIR_OUT | |
334 | } else { | 402 | USB_RECIP_INTERFACE; |
335 | ctx->max_datagram_size = le16_to_cpu(max_datagram_size); | 403 | req.bNotificationType = USB_CDC_SET_MAX_DATAGRAM_SIZE; |
404 | req.wValue = 0; | ||
405 | req.wIndex = cpu_to_le16(iface_no); | ||
406 | req.wLength = 2; | ||
407 | max_datagram_size = cpu_to_le16(ctx->max_datagram_size); | ||
408 | |||
409 | err = cdc_ncm_do_request(ctx, &req, &max_datagram_size, | ||
410 | 0, NULL, 1000); | ||
411 | if (err) | ||
412 | pr_debug("SET_MAX_DATAGRAM_SIZE failed\n"); | ||
413 | } | ||
336 | 414 | ||
337 | if (ctx->max_datagram_size < CDC_NCM_MIN_DATAGRAM_SIZE) | ||
338 | ctx->max_datagram_size = CDC_NCM_MIN_DATAGRAM_SIZE; | ||
339 | else if (ctx->max_datagram_size > CDC_NCM_MAX_DATAGRAM_SIZE) | ||
340 | ctx->max_datagram_size = CDC_NCM_MAX_DATAGRAM_SIZE; | ||
341 | } | 415 | } |
342 | 416 | ||
343 | if (ctx->netdev->mtu != (ctx->max_datagram_size - ETH_HLEN)) | 417 | if (ctx->netdev->mtu != (ctx->max_datagram_size - ETH_HLEN)) |
@@ -466,19 +540,13 @@ static int cdc_ncm_bind(struct usbnet *dev, struct usb_interface *intf) | |||
466 | 540 | ||
467 | ctx->ether_desc = | 541 | ctx->ether_desc = |
468 | (const struct usb_cdc_ether_desc *)buf; | 542 | (const struct usb_cdc_ether_desc *)buf; |
469 | |||
470 | dev->hard_mtu = | 543 | dev->hard_mtu = |
471 | le16_to_cpu(ctx->ether_desc->wMaxSegmentSize); | 544 | le16_to_cpu(ctx->ether_desc->wMaxSegmentSize); |
472 | 545 | ||
473 | if (dev->hard_mtu < | 546 | if (dev->hard_mtu < CDC_NCM_MIN_DATAGRAM_SIZE) |
474 | (CDC_NCM_MIN_DATAGRAM_SIZE - ETH_HLEN)) | 547 | dev->hard_mtu = CDC_NCM_MIN_DATAGRAM_SIZE; |
475 | dev->hard_mtu = | 548 | else if (dev->hard_mtu > CDC_NCM_MAX_DATAGRAM_SIZE) |
476 | CDC_NCM_MIN_DATAGRAM_SIZE - ETH_HLEN; | 549 | dev->hard_mtu = CDC_NCM_MAX_DATAGRAM_SIZE; |
477 | |||
478 | else if (dev->hard_mtu > | ||
479 | (CDC_NCM_MAX_DATAGRAM_SIZE - ETH_HLEN)) | ||
480 | dev->hard_mtu = | ||
481 | CDC_NCM_MAX_DATAGRAM_SIZE - ETH_HLEN; | ||
482 | break; | 550 | break; |
483 | 551 | ||
484 | case USB_CDC_NCM_TYPE: | 552 | case USB_CDC_NCM_TYPE: |
@@ -628,13 +696,13 @@ cdc_ncm_fill_tx_frame(struct cdc_ncm_ctx *ctx, struct sk_buff *skb) | |||
628 | u32 offset; | 696 | u32 offset; |
629 | u32 last_offset; | 697 | u32 last_offset; |
630 | u16 n = 0; | 698 | u16 n = 0; |
631 | u8 timeout = 0; | 699 | u8 ready2send = 0; |
632 | 700 | ||
633 | /* if there is a remaining skb, it gets priority */ | 701 | /* if there is a remaining skb, it gets priority */ |
634 | if (skb != NULL) | 702 | if (skb != NULL) |
635 | swap(skb, ctx->tx_rem_skb); | 703 | swap(skb, ctx->tx_rem_skb); |
636 | else | 704 | else |
637 | timeout = 1; | 705 | ready2send = 1; |
638 | 706 | ||
639 | /* | 707 | /* |
640 | * +----------------+ | 708 | * +----------------+ |
@@ -682,9 +750,10 @@ cdc_ncm_fill_tx_frame(struct cdc_ncm_ctx *ctx, struct sk_buff *skb) | |||
682 | 750 | ||
683 | for (; n < ctx->tx_max_datagrams; n++) { | 751 | for (; n < ctx->tx_max_datagrams; n++) { |
684 | /* check if end of transmit buffer is reached */ | 752 | /* check if end of transmit buffer is reached */ |
685 | if (offset >= ctx->tx_max) | 753 | if (offset >= ctx->tx_max) { |
754 | ready2send = 1; | ||
686 | break; | 755 | break; |
687 | 756 | } | |
688 | /* compute maximum buffer size */ | 757 | /* compute maximum buffer size */ |
689 | rem = ctx->tx_max - offset; | 758 | rem = ctx->tx_max - offset; |
690 | 759 | ||
@@ -711,9 +780,7 @@ cdc_ncm_fill_tx_frame(struct cdc_ncm_ctx *ctx, struct sk_buff *skb) | |||
711 | } | 780 | } |
712 | ctx->tx_rem_skb = skb; | 781 | ctx->tx_rem_skb = skb; |
713 | skb = NULL; | 782 | skb = NULL; |
714 | 783 | ready2send = 1; | |
715 | /* loop one more time */ | ||
716 | timeout = 1; | ||
717 | } | 784 | } |
718 | break; | 785 | break; |
719 | } | 786 | } |
@@ -756,7 +823,7 @@ cdc_ncm_fill_tx_frame(struct cdc_ncm_ctx *ctx, struct sk_buff *skb) | |||
756 | ctx->tx_curr_last_offset = last_offset; | 823 | ctx->tx_curr_last_offset = last_offset; |
757 | goto exit_no_skb; | 824 | goto exit_no_skb; |
758 | 825 | ||
759 | } else if ((n < ctx->tx_max_datagrams) && (timeout == 0)) { | 826 | } else if ((n < ctx->tx_max_datagrams) && (ready2send == 0)) { |
760 | /* wait for more frames */ | 827 | /* wait for more frames */ |
761 | /* push variables */ | 828 | /* push variables */ |
762 | ctx->tx_curr_skb = skb_out; | 829 | ctx->tx_curr_skb = skb_out; |
@@ -813,7 +880,7 @@ cdc_ncm_fill_tx_frame(struct cdc_ncm_ctx *ctx, struct sk_buff *skb) | |||
813 | cpu_to_le16(sizeof(ctx->tx_ncm.nth16)); | 880 | cpu_to_le16(sizeof(ctx->tx_ncm.nth16)); |
814 | ctx->tx_ncm.nth16.wSequence = cpu_to_le16(ctx->tx_seq); | 881 | ctx->tx_ncm.nth16.wSequence = cpu_to_le16(ctx->tx_seq); |
815 | ctx->tx_ncm.nth16.wBlockLength = cpu_to_le16(last_offset); | 882 | ctx->tx_ncm.nth16.wBlockLength = cpu_to_le16(last_offset); |
816 | ctx->tx_ncm.nth16.wFpIndex = ALIGN(sizeof(struct usb_cdc_ncm_nth16), | 883 | ctx->tx_ncm.nth16.wNdpIndex = ALIGN(sizeof(struct usb_cdc_ncm_nth16), |
817 | ctx->tx_ndp_modulus); | 884 | ctx->tx_ndp_modulus); |
818 | 885 | ||
819 | memcpy(skb_out->data, &(ctx->tx_ncm.nth16), sizeof(ctx->tx_ncm.nth16)); | 886 | memcpy(skb_out->data, &(ctx->tx_ncm.nth16), sizeof(ctx->tx_ncm.nth16)); |
@@ -825,13 +892,13 @@ cdc_ncm_fill_tx_frame(struct cdc_ncm_ctx *ctx, struct sk_buff *skb) | |||
825 | rem = sizeof(ctx->tx_ncm.ndp16) + ((ctx->tx_curr_frame_num + 1) * | 892 | rem = sizeof(ctx->tx_ncm.ndp16) + ((ctx->tx_curr_frame_num + 1) * |
826 | sizeof(struct usb_cdc_ncm_dpe16)); | 893 | sizeof(struct usb_cdc_ncm_dpe16)); |
827 | ctx->tx_ncm.ndp16.wLength = cpu_to_le16(rem); | 894 | ctx->tx_ncm.ndp16.wLength = cpu_to_le16(rem); |
828 | ctx->tx_ncm.ndp16.wNextFpIndex = 0; /* reserved */ | 895 | ctx->tx_ncm.ndp16.wNextNdpIndex = 0; /* reserved */ |
829 | 896 | ||
830 | memcpy(((u8 *)skb_out->data) + ctx->tx_ncm.nth16.wFpIndex, | 897 | memcpy(((u8 *)skb_out->data) + ctx->tx_ncm.nth16.wNdpIndex, |
831 | &(ctx->tx_ncm.ndp16), | 898 | &(ctx->tx_ncm.ndp16), |
832 | sizeof(ctx->tx_ncm.ndp16)); | 899 | sizeof(ctx->tx_ncm.ndp16)); |
833 | 900 | ||
834 | memcpy(((u8 *)skb_out->data) + ctx->tx_ncm.nth16.wFpIndex + | 901 | memcpy(((u8 *)skb_out->data) + ctx->tx_ncm.nth16.wNdpIndex + |
835 | sizeof(ctx->tx_ncm.ndp16), | 902 | sizeof(ctx->tx_ncm.ndp16), |
836 | &(ctx->tx_ncm.dpe16), | 903 | &(ctx->tx_ncm.dpe16), |
837 | (ctx->tx_curr_frame_num + 1) * | 904 | (ctx->tx_curr_frame_num + 1) * |
@@ -961,7 +1028,7 @@ static int cdc_ncm_rx_fixup(struct usbnet *dev, struct sk_buff *skb_in) | |||
961 | goto error; | 1028 | goto error; |
962 | } | 1029 | } |
963 | 1030 | ||
964 | temp = le16_to_cpu(ctx->rx_ncm.nth16.wFpIndex); | 1031 | temp = le16_to_cpu(ctx->rx_ncm.nth16.wNdpIndex); |
965 | if ((temp + sizeof(ctx->rx_ncm.ndp16)) > actlen) { | 1032 | if ((temp + sizeof(ctx->rx_ncm.ndp16)) > actlen) { |
966 | pr_debug("invalid DPT16 index\n"); | 1033 | pr_debug("invalid DPT16 index\n"); |
967 | goto error; | 1034 | goto error; |
@@ -1048,10 +1115,10 @@ error: | |||
1048 | 1115 | ||
1049 | static void | 1116 | static void |
1050 | cdc_ncm_speed_change(struct cdc_ncm_ctx *ctx, | 1117 | cdc_ncm_speed_change(struct cdc_ncm_ctx *ctx, |
1051 | struct connection_speed_change *data) | 1118 | struct usb_cdc_speed_change *data) |
1052 | { | 1119 | { |
1053 | uint32_t rx_speed = le32_to_cpu(data->USBitRate); | 1120 | uint32_t rx_speed = le32_to_cpu(data->DLBitRRate); |
1054 | uint32_t tx_speed = le32_to_cpu(data->DSBitRate); | 1121 | uint32_t tx_speed = le32_to_cpu(data->ULBitRate); |
1055 | 1122 | ||
1056 | /* | 1123 | /* |
1057 | * Currently the USB-NET API does not support reporting the actual | 1124 | * Currently the USB-NET API does not support reporting the actual |
@@ -1092,7 +1159,7 @@ static void cdc_ncm_status(struct usbnet *dev, struct urb *urb) | |||
1092 | /* test for split data in 8-byte chunks */ | 1159 | /* test for split data in 8-byte chunks */ |
1093 | if (test_and_clear_bit(EVENT_STS_SPLIT, &dev->flags)) { | 1160 | if (test_and_clear_bit(EVENT_STS_SPLIT, &dev->flags)) { |
1094 | cdc_ncm_speed_change(ctx, | 1161 | cdc_ncm_speed_change(ctx, |
1095 | (struct connection_speed_change *)urb->transfer_buffer); | 1162 | (struct usb_cdc_speed_change *)urb->transfer_buffer); |
1096 | return; | 1163 | return; |
1097 | } | 1164 | } |
1098 | 1165 | ||
@@ -1120,12 +1187,12 @@ static void cdc_ncm_status(struct usbnet *dev, struct urb *urb) | |||
1120 | break; | 1187 | break; |
1121 | 1188 | ||
1122 | case USB_CDC_NOTIFY_SPEED_CHANGE: | 1189 | case USB_CDC_NOTIFY_SPEED_CHANGE: |
1123 | if (urb->actual_length < | 1190 | if (urb->actual_length < (sizeof(*event) + |
1124 | (sizeof(*event) + sizeof(struct connection_speed_change))) | 1191 | sizeof(struct usb_cdc_speed_change))) |
1125 | set_bit(EVENT_STS_SPLIT, &dev->flags); | 1192 | set_bit(EVENT_STS_SPLIT, &dev->flags); |
1126 | else | 1193 | else |
1127 | cdc_ncm_speed_change(ctx, | 1194 | cdc_ncm_speed_change(ctx, |
1128 | (struct connection_speed_change *) &event[1]); | 1195 | (struct usb_cdc_speed_change *) &event[1]); |
1129 | break; | 1196 | break; |
1130 | 1197 | ||
1131 | default: | 1198 | default: |
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c index 90a23e410d1b..82dba5aaf423 100644 --- a/drivers/net/virtio_net.c +++ b/drivers/net/virtio_net.c | |||
@@ -446,6 +446,20 @@ static void skb_recv_done(struct virtqueue *rvq) | |||
446 | } | 446 | } |
447 | } | 447 | } |
448 | 448 | ||
449 | static void virtnet_napi_enable(struct virtnet_info *vi) | ||
450 | { | ||
451 | napi_enable(&vi->napi); | ||
452 | |||
453 | /* If all buffers were filled by other side before we napi_enabled, we | ||
454 | * won't get another interrupt, so process any outstanding packets | ||
455 | * now. virtnet_poll wants re-enable the queue, so we disable here. | ||
456 | * We synchronize against interrupts via NAPI_STATE_SCHED */ | ||
457 | if (napi_schedule_prep(&vi->napi)) { | ||
458 | virtqueue_disable_cb(vi->rvq); | ||
459 | __napi_schedule(&vi->napi); | ||
460 | } | ||
461 | } | ||
462 | |||
449 | static void refill_work(struct work_struct *work) | 463 | static void refill_work(struct work_struct *work) |
450 | { | 464 | { |
451 | struct virtnet_info *vi; | 465 | struct virtnet_info *vi; |
@@ -454,7 +468,7 @@ static void refill_work(struct work_struct *work) | |||
454 | vi = container_of(work, struct virtnet_info, refill.work); | 468 | vi = container_of(work, struct virtnet_info, refill.work); |
455 | napi_disable(&vi->napi); | 469 | napi_disable(&vi->napi); |
456 | still_empty = !try_fill_recv(vi, GFP_KERNEL); | 470 | still_empty = !try_fill_recv(vi, GFP_KERNEL); |
457 | napi_enable(&vi->napi); | 471 | virtnet_napi_enable(vi); |
458 | 472 | ||
459 | /* In theory, this can happen: if we don't get any buffers in | 473 | /* In theory, this can happen: if we don't get any buffers in |
460 | * we will *never* try to fill again. */ | 474 | * we will *never* try to fill again. */ |
@@ -638,16 +652,7 @@ static int virtnet_open(struct net_device *dev) | |||
638 | { | 652 | { |
639 | struct virtnet_info *vi = netdev_priv(dev); | 653 | struct virtnet_info *vi = netdev_priv(dev); |
640 | 654 | ||
641 | napi_enable(&vi->napi); | 655 | virtnet_napi_enable(vi); |
642 | |||
643 | /* If all buffers were filled by other side before we napi_enabled, we | ||
644 | * won't get another interrupt, so process any outstanding packets | ||
645 | * now. virtnet_poll wants re-enable the queue, so we disable here. | ||
646 | * We synchronize against interrupts via NAPI_STATE_SCHED */ | ||
647 | if (napi_schedule_prep(&vi->napi)) { | ||
648 | virtqueue_disable_cb(vi->rvq); | ||
649 | __napi_schedule(&vi->napi); | ||
650 | } | ||
651 | return 0; | 656 | return 0; |
652 | } | 657 | } |
653 | 658 | ||
diff --git a/drivers/net/wireless/ath/ath9k/ath9k.h b/drivers/net/wireless/ath/ath9k/ath9k.h index 3681caf54282..23838e37d45f 100644 --- a/drivers/net/wireless/ath/ath9k/ath9k.h +++ b/drivers/net/wireless/ath/ath9k/ath9k.h | |||
@@ -218,6 +218,7 @@ struct ath_frame_info { | |||
218 | struct ath_buf_state { | 218 | struct ath_buf_state { |
219 | u8 bf_type; | 219 | u8 bf_type; |
220 | u8 bfs_paprd; | 220 | u8 bfs_paprd; |
221 | unsigned long bfs_paprd_timestamp; | ||
221 | enum ath9k_internal_frame_type bfs_ftype; | 222 | enum ath9k_internal_frame_type bfs_ftype; |
222 | }; | 223 | }; |
223 | 224 | ||
@@ -593,7 +594,6 @@ struct ath_softc { | |||
593 | struct work_struct paprd_work; | 594 | struct work_struct paprd_work; |
594 | struct work_struct hw_check_work; | 595 | struct work_struct hw_check_work; |
595 | struct completion paprd_complete; | 596 | struct completion paprd_complete; |
596 | bool paprd_pending; | ||
597 | 597 | ||
598 | u32 intrstatus; | 598 | u32 intrstatus; |
599 | u32 sc_flags; /* SC_OP_* */ | 599 | u32 sc_flags; /* SC_OP_* */ |
diff --git a/drivers/net/wireless/ath/ath9k/main.c b/drivers/net/wireless/ath/ath9k/main.c index 9040c2ff1909..da5c64597c1f 100644 --- a/drivers/net/wireless/ath/ath9k/main.c +++ b/drivers/net/wireless/ath/ath9k/main.c | |||
@@ -342,7 +342,6 @@ static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int | |||
342 | tx_info->control.rates[1].idx = -1; | 342 | tx_info->control.rates[1].idx = -1; |
343 | 343 | ||
344 | init_completion(&sc->paprd_complete); | 344 | init_completion(&sc->paprd_complete); |
345 | sc->paprd_pending = true; | ||
346 | txctl.paprd = BIT(chain); | 345 | txctl.paprd = BIT(chain); |
347 | 346 | ||
348 | if (ath_tx_start(hw, skb, &txctl) != 0) { | 347 | if (ath_tx_start(hw, skb, &txctl) != 0) { |
@@ -353,7 +352,6 @@ static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int | |||
353 | 352 | ||
354 | time_left = wait_for_completion_timeout(&sc->paprd_complete, | 353 | time_left = wait_for_completion_timeout(&sc->paprd_complete, |
355 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); | 354 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT)); |
356 | sc->paprd_pending = false; | ||
357 | 355 | ||
358 | if (!time_left) | 356 | if (!time_left) |
359 | ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE, | 357 | ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CALIBRATE, |
diff --git a/drivers/net/wireless/ath/ath9k/xmit.c b/drivers/net/wireless/ath/ath9k/xmit.c index 33a37edbaf79..07b7804aec5b 100644 --- a/drivers/net/wireless/ath/ath9k/xmit.c +++ b/drivers/net/wireless/ath/ath9k/xmit.c | |||
@@ -1725,6 +1725,9 @@ static void ath_tx_start_dma(struct ath_softc *sc, struct ath_buf *bf, | |||
1725 | ar9003_hw_set_paprd_txdesc(sc->sc_ah, bf->bf_desc, | 1725 | ar9003_hw_set_paprd_txdesc(sc->sc_ah, bf->bf_desc, |
1726 | bf->bf_state.bfs_paprd); | 1726 | bf->bf_state.bfs_paprd); |
1727 | 1727 | ||
1728 | if (txctl->paprd) | ||
1729 | bf->bf_state.bfs_paprd_timestamp = jiffies; | ||
1730 | |||
1728 | ath_tx_send_normal(sc, txctl->txq, tid, &bf_head); | 1731 | ath_tx_send_normal(sc, txctl->txq, tid, &bf_head); |
1729 | } | 1732 | } |
1730 | 1733 | ||
@@ -1886,7 +1889,9 @@ static void ath_tx_complete_buf(struct ath_softc *sc, struct ath_buf *bf, | |||
1886 | bf->bf_buf_addr = 0; | 1889 | bf->bf_buf_addr = 0; |
1887 | 1890 | ||
1888 | if (bf->bf_state.bfs_paprd) { | 1891 | if (bf->bf_state.bfs_paprd) { |
1889 | if (!sc->paprd_pending) | 1892 | if (time_after(jiffies, |
1893 | bf->bf_state.bfs_paprd_timestamp + | ||
1894 | msecs_to_jiffies(ATH_PAPRD_TIMEOUT))) | ||
1890 | dev_kfree_skb_any(skb); | 1895 | dev_kfree_skb_any(skb); |
1891 | else | 1896 | else |
1892 | complete(&sc->paprd_complete); | 1897 | complete(&sc->paprd_complete); |
diff --git a/drivers/net/wireless/ath/carl9170/rx.c b/drivers/net/wireless/ath/carl9170/rx.c index 939a0e96ed1f..84866a4b8350 100644 --- a/drivers/net/wireless/ath/carl9170/rx.c +++ b/drivers/net/wireless/ath/carl9170/rx.c | |||
@@ -564,7 +564,7 @@ static void carl9170_ps_beacon(struct ar9170 *ar, void *data, unsigned int len) | |||
564 | cam = ieee80211_check_tim(tim_ie, tim_len, ar->common.curaid); | 564 | cam = ieee80211_check_tim(tim_ie, tim_len, ar->common.curaid); |
565 | 565 | ||
566 | /* 2. Maybe the AP wants to send multicast/broadcast data? */ | 566 | /* 2. Maybe the AP wants to send multicast/broadcast data? */ |
567 | cam = !!(tim_ie->bitmap_ctrl & 0x01); | 567 | cam |= !!(tim_ie->bitmap_ctrl & 0x01); |
568 | 568 | ||
569 | if (!cam) { | 569 | if (!cam) { |
570 | /* back to low-power land. */ | 570 | /* back to low-power land. */ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c index af505bcd7ae0..ef36aff1bb43 100644 --- a/drivers/net/wireless/iwlwifi/iwl-6000.c +++ b/drivers/net/wireless/iwlwifi/iwl-6000.c | |||
@@ -681,6 +681,8 @@ struct iwl_cfg iwl6000i_2bg_cfg = { | |||
681 | .fw_name_pre = IWL6050_FW_PRE, \ | 681 | .fw_name_pre = IWL6050_FW_PRE, \ |
682 | .ucode_api_max = IWL6050_UCODE_API_MAX, \ | 682 | .ucode_api_max = IWL6050_UCODE_API_MAX, \ |
683 | .ucode_api_min = IWL6050_UCODE_API_MIN, \ | 683 | .ucode_api_min = IWL6050_UCODE_API_MIN, \ |
684 | .valid_tx_ant = ANT_AB, /* .cfg overwrite */ \ | ||
685 | .valid_rx_ant = ANT_AB, /* .cfg overwrite */ \ | ||
684 | .ops = &iwl6050_ops, \ | 686 | .ops = &iwl6050_ops, \ |
685 | .eeprom_ver = EEPROM_6050_EEPROM_VERSION, \ | 687 | .eeprom_ver = EEPROM_6050_EEPROM_VERSION, \ |
686 | .eeprom_calib_ver = EEPROM_6050_TX_POWER_VERSION, \ | 688 | .eeprom_calib_ver = EEPROM_6050_TX_POWER_VERSION, \ |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index 36335b1b54d4..c1cfd9952e52 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -1157,6 +1157,9 @@ static void iwl_irq_tasklet_legacy(struct iwl_priv *priv) | |||
1157 | /* only Re-enable if disabled by irq */ | 1157 | /* only Re-enable if disabled by irq */ |
1158 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | 1158 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) |
1159 | iwl_enable_interrupts(priv); | 1159 | iwl_enable_interrupts(priv); |
1160 | /* Re-enable RF_KILL if it occurred */ | ||
1161 | else if (handled & CSR_INT_BIT_RF_KILL) | ||
1162 | iwl_enable_rfkill_int(priv); | ||
1160 | 1163 | ||
1161 | #ifdef CONFIG_IWLWIFI_DEBUG | 1164 | #ifdef CONFIG_IWLWIFI_DEBUG |
1162 | if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) { | 1165 | if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) { |
@@ -1371,6 +1374,9 @@ static void iwl_irq_tasklet(struct iwl_priv *priv) | |||
1371 | /* only Re-enable if disabled by irq */ | 1374 | /* only Re-enable if disabled by irq */ |
1372 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) | 1375 | if (test_bit(STATUS_INT_ENABLED, &priv->status)) |
1373 | iwl_enable_interrupts(priv); | 1376 | iwl_enable_interrupts(priv); |
1377 | /* Re-enable RF_KILL if it occurred */ | ||
1378 | else if (handled & CSR_INT_BIT_RF_KILL) | ||
1379 | iwl_enable_rfkill_int(priv); | ||
1374 | } | 1380 | } |
1375 | 1381 | ||
1376 | /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */ | 1382 | /* the threshold ratio of actual_ack_cnt to expected_ack_cnt in percent */ |
diff --git a/drivers/net/wireless/wl1251/main.c b/drivers/net/wireless/wl1251/main.c index 012e1a4016fe..40372bac9482 100644 --- a/drivers/net/wireless/wl1251/main.c +++ b/drivers/net/wireless/wl1251/main.c | |||
@@ -1039,6 +1039,9 @@ static void wl1251_op_bss_info_changed(struct ieee80211_hw *hw, | |||
1039 | 1039 | ||
1040 | if (changed & BSS_CHANGED_BEACON) { | 1040 | if (changed & BSS_CHANGED_BEACON) { |
1041 | beacon = ieee80211_beacon_get(hw, vif); | 1041 | beacon = ieee80211_beacon_get(hw, vif); |
1042 | if (!beacon) | ||
1043 | goto out_sleep; | ||
1044 | |||
1042 | ret = wl1251_cmd_template_set(wl, CMD_BEACON, beacon->data, | 1045 | ret = wl1251_cmd_template_set(wl, CMD_BEACON, beacon->data, |
1043 | beacon->len); | 1046 | beacon->len); |
1044 | 1047 | ||
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 8ecaac983923..ea25e5bfcf23 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c | |||
@@ -23,6 +23,7 @@ | |||
23 | #include <linux/mm.h> | 23 | #include <linux/mm.h> |
24 | #include <linux/fs.h> | 24 | #include <linux/fs.h> |
25 | #include <linux/capability.h> | 25 | #include <linux/capability.h> |
26 | #include <linux/security.h> | ||
26 | #include <linux/pci-aspm.h> | 27 | #include <linux/pci-aspm.h> |
27 | #include <linux/slab.h> | 28 | #include <linux/slab.h> |
28 | #include "pci.h" | 29 | #include "pci.h" |
@@ -368,7 +369,7 @@ pci_read_config(struct file *filp, struct kobject *kobj, | |||
368 | u8 *data = (u8*) buf; | 369 | u8 *data = (u8*) buf; |
369 | 370 | ||
370 | /* Several chips lock up trying to read undefined config space */ | 371 | /* Several chips lock up trying to read undefined config space */ |
371 | if (cap_raised(filp->f_cred->cap_effective, CAP_SYS_ADMIN)) { | 372 | if (security_capable(filp->f_cred, CAP_SYS_ADMIN) == 0) { |
372 | size = dev->cfg_size; | 373 | size = dev->cfg_size; |
373 | } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { | 374 | } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) { |
374 | size = 128; | 375 | size = 128; |
diff --git a/drivers/rtc/rtc-at32ap700x.c b/drivers/rtc/rtc-at32ap700x.c index b2752b6e7a2f..e725d51e773d 100644 --- a/drivers/rtc/rtc-at32ap700x.c +++ b/drivers/rtc/rtc-at32ap700x.c | |||
@@ -134,36 +134,29 @@ static int at32_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
134 | return ret; | 134 | return ret; |
135 | } | 135 | } |
136 | 136 | ||
137 | static int at32_rtc_ioctl(struct device *dev, unsigned int cmd, | 137 | static int at32_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
138 | unsigned long arg) | ||
139 | { | 138 | { |
140 | struct rtc_at32ap700x *rtc = dev_get_drvdata(dev); | 139 | struct rtc_at32ap700x *rtc = dev_get_drvdata(dev); |
141 | int ret = 0; | 140 | int ret = 0; |
142 | 141 | ||
143 | spin_lock_irq(&rtc->lock); | 142 | spin_lock_irq(&rtc->lock); |
144 | 143 | ||
145 | switch (cmd) { | 144 | if(enabled) { |
146 | case RTC_AIE_ON: | ||
147 | if (rtc_readl(rtc, VAL) > rtc->alarm_time) { | 145 | if (rtc_readl(rtc, VAL) > rtc->alarm_time) { |
148 | ret = -EINVAL; | 146 | ret = -EINVAL; |
149 | break; | 147 | goto out; |
150 | } | 148 | } |
151 | rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) | 149 | rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) |
152 | | RTC_BIT(CTRL_TOPEN)); | 150 | | RTC_BIT(CTRL_TOPEN)); |
153 | rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI)); | 151 | rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI)); |
154 | rtc_writel(rtc, IER, RTC_BIT(IER_TOPI)); | 152 | rtc_writel(rtc, IER, RTC_BIT(IER_TOPI)); |
155 | break; | 153 | } else { |
156 | case RTC_AIE_OFF: | ||
157 | rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) | 154 | rtc_writel(rtc, CTRL, rtc_readl(rtc, CTRL) |
158 | & ~RTC_BIT(CTRL_TOPEN)); | 155 | & ~RTC_BIT(CTRL_TOPEN)); |
159 | rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI)); | 156 | rtc_writel(rtc, IDR, RTC_BIT(IDR_TOPI)); |
160 | rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI)); | 157 | rtc_writel(rtc, ICR, RTC_BIT(ICR_TOPI)); |
161 | break; | ||
162 | default: | ||
163 | ret = -ENOIOCTLCMD; | ||
164 | break; | ||
165 | } | 158 | } |
166 | 159 | out: | |
167 | spin_unlock_irq(&rtc->lock); | 160 | spin_unlock_irq(&rtc->lock); |
168 | 161 | ||
169 | return ret; | 162 | return ret; |
@@ -195,11 +188,11 @@ static irqreturn_t at32_rtc_interrupt(int irq, void *dev_id) | |||
195 | } | 188 | } |
196 | 189 | ||
197 | static struct rtc_class_ops at32_rtc_ops = { | 190 | static struct rtc_class_ops at32_rtc_ops = { |
198 | .ioctl = at32_rtc_ioctl, | ||
199 | .read_time = at32_rtc_readtime, | 191 | .read_time = at32_rtc_readtime, |
200 | .set_time = at32_rtc_settime, | 192 | .set_time = at32_rtc_settime, |
201 | .read_alarm = at32_rtc_readalarm, | 193 | .read_alarm = at32_rtc_readalarm, |
202 | .set_alarm = at32_rtc_setalarm, | 194 | .set_alarm = at32_rtc_setalarm, |
195 | .alarm_irq_enable = at32_rtc_alarm_irq_enable, | ||
203 | }; | 196 | }; |
204 | 197 | ||
205 | static int __init at32_rtc_probe(struct platform_device *pdev) | 198 | static int __init at32_rtc_probe(struct platform_device *pdev) |
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c index bc8bbca9a2e2..26d1cf5d19ae 100644 --- a/drivers/rtc/rtc-at91rm9200.c +++ b/drivers/rtc/rtc-at91rm9200.c | |||
@@ -195,13 +195,6 @@ static int at91_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
195 | 195 | ||
196 | /* important: scrub old status before enabling IRQs */ | 196 | /* important: scrub old status before enabling IRQs */ |
197 | switch (cmd) { | 197 | switch (cmd) { |
198 | case RTC_AIE_OFF: /* alarm off */ | ||
199 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); | ||
200 | break; | ||
201 | case RTC_AIE_ON: /* alarm on */ | ||
202 | at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); | ||
203 | at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); | ||
204 | break; | ||
205 | case RTC_UIE_OFF: /* update off */ | 198 | case RTC_UIE_OFF: /* update off */ |
206 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_SECEV); | 199 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_SECEV); |
207 | break; | 200 | break; |
@@ -217,6 +210,18 @@ static int at91_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
217 | return ret; | 210 | return ret; |
218 | } | 211 | } |
219 | 212 | ||
213 | static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
214 | { | ||
215 | pr_debug("%s(): cmd=%08x\n", __func__, enabled); | ||
216 | |||
217 | if (enabled) { | ||
218 | at91_sys_write(AT91_RTC_SCCR, AT91_RTC_ALARM); | ||
219 | at91_sys_write(AT91_RTC_IER, AT91_RTC_ALARM); | ||
220 | } else | ||
221 | at91_sys_write(AT91_RTC_IDR, AT91_RTC_ALARM); | ||
222 | |||
223 | return 0; | ||
224 | } | ||
220 | /* | 225 | /* |
221 | * Provide additional RTC information in /proc/driver/rtc | 226 | * Provide additional RTC information in /proc/driver/rtc |
222 | */ | 227 | */ |
@@ -270,6 +275,7 @@ static const struct rtc_class_ops at91_rtc_ops = { | |||
270 | .read_alarm = at91_rtc_readalarm, | 275 | .read_alarm = at91_rtc_readalarm, |
271 | .set_alarm = at91_rtc_setalarm, | 276 | .set_alarm = at91_rtc_setalarm, |
272 | .proc = at91_rtc_proc, | 277 | .proc = at91_rtc_proc, |
278 | .alarm_irq_enable = at91_rtc_alarm_irq_enable, | ||
273 | }; | 279 | }; |
274 | 280 | ||
275 | /* | 281 | /* |
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c index f677e0710ca1..c36749e4c926 100644 --- a/drivers/rtc/rtc-at91sam9.c +++ b/drivers/rtc/rtc-at91sam9.c | |||
@@ -229,12 +229,6 @@ static int at91_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
229 | dev_dbg(dev, "ioctl: cmd=%08x, arg=%08lx, mr %08x\n", cmd, arg, mr); | 229 | dev_dbg(dev, "ioctl: cmd=%08x, arg=%08lx, mr %08x\n", cmd, arg, mr); |
230 | 230 | ||
231 | switch (cmd) { | 231 | switch (cmd) { |
232 | case RTC_AIE_OFF: /* alarm off */ | ||
233 | rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN); | ||
234 | break; | ||
235 | case RTC_AIE_ON: /* alarm on */ | ||
236 | rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN); | ||
237 | break; | ||
238 | case RTC_UIE_OFF: /* update off */ | 232 | case RTC_UIE_OFF: /* update off */ |
239 | rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN); | 233 | rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN); |
240 | break; | 234 | break; |
@@ -249,6 +243,19 @@ static int at91_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
249 | return ret; | 243 | return ret; |
250 | } | 244 | } |
251 | 245 | ||
246 | static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
247 | { | ||
248 | struct sam9_rtc *rtc = dev_get_drvdata(dev); | ||
249 | u32 mr = rtt_readl(rtc, MR); | ||
250 | |||
251 | dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr); | ||
252 | if (enabled) | ||
253 | rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN); | ||
254 | else | ||
255 | rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN); | ||
256 | return 0; | ||
257 | } | ||
258 | |||
252 | /* | 259 | /* |
253 | * Provide additional RTC information in /proc/driver/rtc | 260 | * Provide additional RTC information in /proc/driver/rtc |
254 | */ | 261 | */ |
@@ -302,6 +309,7 @@ static const struct rtc_class_ops at91_rtc_ops = { | |||
302 | .read_alarm = at91_rtc_readalarm, | 309 | .read_alarm = at91_rtc_readalarm, |
303 | .set_alarm = at91_rtc_setalarm, | 310 | .set_alarm = at91_rtc_setalarm, |
304 | .proc = at91_rtc_proc, | 311 | .proc = at91_rtc_proc, |
312 | .alarm_irq_enabled = at91_rtc_alarm_irq_enable, | ||
305 | }; | 313 | }; |
306 | 314 | ||
307 | /* | 315 | /* |
diff --git a/drivers/rtc/rtc-bfin.c b/drivers/rtc/rtc-bfin.c index b4b6087f2234..17971d93354d 100644 --- a/drivers/rtc/rtc-bfin.c +++ b/drivers/rtc/rtc-bfin.c | |||
@@ -259,15 +259,6 @@ static int bfin_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long ar | |||
259 | bfin_rtc_int_clear(~RTC_ISTAT_SEC); | 259 | bfin_rtc_int_clear(~RTC_ISTAT_SEC); |
260 | break; | 260 | break; |
261 | 261 | ||
262 | case RTC_AIE_ON: | ||
263 | dev_dbg_stamp(dev); | ||
264 | bfin_rtc_int_set_alarm(rtc); | ||
265 | break; | ||
266 | case RTC_AIE_OFF: | ||
267 | dev_dbg_stamp(dev); | ||
268 | bfin_rtc_int_clear(~(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)); | ||
269 | break; | ||
270 | |||
271 | default: | 262 | default: |
272 | dev_dbg_stamp(dev); | 263 | dev_dbg_stamp(dev); |
273 | ret = -ENOIOCTLCMD; | 264 | ret = -ENOIOCTLCMD; |
@@ -276,6 +267,17 @@ static int bfin_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long ar | |||
276 | return ret; | 267 | return ret; |
277 | } | 268 | } |
278 | 269 | ||
270 | static int bfin_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
271 | { | ||
272 | struct bfin_rtc *rtc = dev_get_drvdata(dev); | ||
273 | |||
274 | dev_dbg_stamp(dev); | ||
275 | if (enabled) | ||
276 | bfin_rtc_int_set_alarm(rtc); | ||
277 | else | ||
278 | bfin_rtc_int_clear(~(RTC_ISTAT_ALARM | RTC_ISTAT_ALARM_DAY)); | ||
279 | } | ||
280 | |||
279 | static int bfin_rtc_read_time(struct device *dev, struct rtc_time *tm) | 281 | static int bfin_rtc_read_time(struct device *dev, struct rtc_time *tm) |
280 | { | 282 | { |
281 | struct bfin_rtc *rtc = dev_get_drvdata(dev); | 283 | struct bfin_rtc *rtc = dev_get_drvdata(dev); |
@@ -362,6 +364,7 @@ static struct rtc_class_ops bfin_rtc_ops = { | |||
362 | .read_alarm = bfin_rtc_read_alarm, | 364 | .read_alarm = bfin_rtc_read_alarm, |
363 | .set_alarm = bfin_rtc_set_alarm, | 365 | .set_alarm = bfin_rtc_set_alarm, |
364 | .proc = bfin_rtc_proc, | 366 | .proc = bfin_rtc_proc, |
367 | .alarm_irq_enable = bfin_rtc_alarm_irq_enable, | ||
365 | }; | 368 | }; |
366 | 369 | ||
367 | static int __devinit bfin_rtc_probe(struct platform_device *pdev) | 370 | static int __devinit bfin_rtc_probe(struct platform_device *pdev) |
diff --git a/drivers/rtc/rtc-dev.c b/drivers/rtc/rtc-dev.c index 212b16edafc0..37c3cc1b3dd5 100644 --- a/drivers/rtc/rtc-dev.c +++ b/drivers/rtc/rtc-dev.c | |||
@@ -154,19 +154,7 @@ static long rtc_dev_ioctl(struct file *file, | |||
154 | if (err) | 154 | if (err) |
155 | goto done; | 155 | goto done; |
156 | 156 | ||
157 | /* try the driver's ioctl interface */ | 157 | /* |
158 | if (ops->ioctl) { | ||
159 | err = ops->ioctl(rtc->dev.parent, cmd, arg); | ||
160 | if (err != -ENOIOCTLCMD) { | ||
161 | mutex_unlock(&rtc->ops_lock); | ||
162 | return err; | ||
163 | } | ||
164 | } | ||
165 | |||
166 | /* if the driver does not provide the ioctl interface | ||
167 | * or if that particular ioctl was not implemented | ||
168 | * (-ENOIOCTLCMD), we will try to emulate here. | ||
169 | * | ||
170 | * Drivers *SHOULD NOT* provide ioctl implementations | 158 | * Drivers *SHOULD NOT* provide ioctl implementations |
171 | * for these requests. Instead, provide methods to | 159 | * for these requests. Instead, provide methods to |
172 | * support the following code, so that the RTC's main | 160 | * support the following code, so that the RTC's main |
@@ -329,7 +317,12 @@ static long rtc_dev_ioctl(struct file *file, | |||
329 | return err; | 317 | return err; |
330 | 318 | ||
331 | default: | 319 | default: |
332 | err = -ENOTTY; | 320 | /* Finally try the driver's ioctl interface */ |
321 | if (ops->ioctl) { | ||
322 | err = ops->ioctl(rtc->dev.parent, cmd, arg); | ||
323 | if (err == -ENOIOCTLCMD) | ||
324 | err = -ENOTTY; | ||
325 | } | ||
333 | break; | 326 | break; |
334 | } | 327 | } |
335 | 328 | ||
diff --git a/drivers/rtc/rtc-ds1286.c b/drivers/rtc/rtc-ds1286.c index bf430f9091ed..60ce69600828 100644 --- a/drivers/rtc/rtc-ds1286.c +++ b/drivers/rtc/rtc-ds1286.c | |||
@@ -40,6 +40,26 @@ static inline void ds1286_rtc_write(struct ds1286_priv *priv, u8 data, int reg) | |||
40 | __raw_writel(data, &priv->rtcregs[reg]); | 40 | __raw_writel(data, &priv->rtcregs[reg]); |
41 | } | 41 | } |
42 | 42 | ||
43 | |||
44 | static int ds1286_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
45 | { | ||
46 | struct ds1286_priv *priv = dev_get_drvdata(dev); | ||
47 | unsigned long flags; | ||
48 | unsigned char val; | ||
49 | |||
50 | /* Allow or mask alarm interrupts */ | ||
51 | spin_lock_irqsave(&priv->lock, flags); | ||
52 | val = ds1286_rtc_read(priv, RTC_CMD); | ||
53 | if (enabled) | ||
54 | val &= ~RTC_TDM; | ||
55 | else | ||
56 | val |= RTC_TDM; | ||
57 | ds1286_rtc_write(priv, val, RTC_CMD); | ||
58 | spin_unlock_irqrestore(&priv->lock, flags); | ||
59 | |||
60 | return 0; | ||
61 | } | ||
62 | |||
43 | #ifdef CONFIG_RTC_INTF_DEV | 63 | #ifdef CONFIG_RTC_INTF_DEV |
44 | 64 | ||
45 | static int ds1286_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | 65 | static int ds1286_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
@@ -49,22 +69,6 @@ static int ds1286_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
49 | unsigned char val; | 69 | unsigned char val; |
50 | 70 | ||
51 | switch (cmd) { | 71 | switch (cmd) { |
52 | case RTC_AIE_OFF: | ||
53 | /* Mask alarm int. enab. bit */ | ||
54 | spin_lock_irqsave(&priv->lock, flags); | ||
55 | val = ds1286_rtc_read(priv, RTC_CMD); | ||
56 | val |= RTC_TDM; | ||
57 | ds1286_rtc_write(priv, val, RTC_CMD); | ||
58 | spin_unlock_irqrestore(&priv->lock, flags); | ||
59 | break; | ||
60 | case RTC_AIE_ON: | ||
61 | /* Allow alarm interrupts. */ | ||
62 | spin_lock_irqsave(&priv->lock, flags); | ||
63 | val = ds1286_rtc_read(priv, RTC_CMD); | ||
64 | val &= ~RTC_TDM; | ||
65 | ds1286_rtc_write(priv, val, RTC_CMD); | ||
66 | spin_unlock_irqrestore(&priv->lock, flags); | ||
67 | break; | ||
68 | case RTC_WIE_OFF: | 72 | case RTC_WIE_OFF: |
69 | /* Mask watchdog int. enab. bit */ | 73 | /* Mask watchdog int. enab. bit */ |
70 | spin_lock_irqsave(&priv->lock, flags); | 74 | spin_lock_irqsave(&priv->lock, flags); |
@@ -316,12 +320,13 @@ static int ds1286_set_alarm(struct device *dev, struct rtc_wkalrm *alm) | |||
316 | } | 320 | } |
317 | 321 | ||
318 | static const struct rtc_class_ops ds1286_ops = { | 322 | static const struct rtc_class_ops ds1286_ops = { |
319 | .ioctl = ds1286_ioctl, | 323 | .ioctl = ds1286_ioctl, |
320 | .proc = ds1286_proc, | 324 | .proc = ds1286_proc, |
321 | .read_time = ds1286_read_time, | 325 | .read_time = ds1286_read_time, |
322 | .set_time = ds1286_set_time, | 326 | .set_time = ds1286_set_time, |
323 | .read_alarm = ds1286_read_alarm, | 327 | .read_alarm = ds1286_read_alarm, |
324 | .set_alarm = ds1286_set_alarm, | 328 | .set_alarm = ds1286_set_alarm, |
329 | .alarm_irq_enable = ds1286_alarm_irq_enable, | ||
325 | }; | 330 | }; |
326 | 331 | ||
327 | static int __devinit ds1286_probe(struct platform_device *pdev) | 332 | static int __devinit ds1286_probe(struct platform_device *pdev) |
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c index 077af1d7b9e4..57fbcc149ba7 100644 --- a/drivers/rtc/rtc-ds1305.c +++ b/drivers/rtc/rtc-ds1305.c | |||
@@ -139,49 +139,32 @@ static u8 hour2bcd(bool hr12, int hour) | |||
139 | * Interface to RTC framework | 139 | * Interface to RTC framework |
140 | */ | 140 | */ |
141 | 141 | ||
142 | #ifdef CONFIG_RTC_INTF_DEV | 142 | static int ds1305_alarm_irq_enable(struct device *dev, unsigned int enabled) |
143 | |||
144 | /* | ||
145 | * Context: caller holds rtc->ops_lock (to protect ds1305->ctrl) | ||
146 | */ | ||
147 | static int ds1305_ioctl(struct device *dev, unsigned cmd, unsigned long arg) | ||
148 | { | 143 | { |
149 | struct ds1305 *ds1305 = dev_get_drvdata(dev); | 144 | struct ds1305 *ds1305 = dev_get_drvdata(dev); |
150 | u8 buf[2]; | 145 | u8 buf[2]; |
151 | int status = -ENOIOCTLCMD; | 146 | long err = -EINVAL; |
152 | 147 | ||
153 | buf[0] = DS1305_WRITE | DS1305_CONTROL; | 148 | buf[0] = DS1305_WRITE | DS1305_CONTROL; |
154 | buf[1] = ds1305->ctrl[0]; | 149 | buf[1] = ds1305->ctrl[0]; |
155 | 150 | ||
156 | switch (cmd) { | 151 | if (enabled) { |
157 | case RTC_AIE_OFF: | ||
158 | status = 0; | ||
159 | if (!(buf[1] & DS1305_AEI0)) | ||
160 | goto done; | ||
161 | buf[1] &= ~DS1305_AEI0; | ||
162 | break; | ||
163 | |||
164 | case RTC_AIE_ON: | ||
165 | status = 0; | ||
166 | if (ds1305->ctrl[0] & DS1305_AEI0) | 152 | if (ds1305->ctrl[0] & DS1305_AEI0) |
167 | goto done; | 153 | goto done; |
168 | buf[1] |= DS1305_AEI0; | 154 | buf[1] |= DS1305_AEI0; |
169 | break; | 155 | } else { |
170 | } | 156 | if (!(buf[1] & DS1305_AEI0)) |
171 | if (status == 0) { | 157 | goto done; |
172 | status = spi_write_then_read(ds1305->spi, buf, sizeof buf, | 158 | buf[1] &= ~DS1305_AEI0; |
173 | NULL, 0); | ||
174 | if (status >= 0) | ||
175 | ds1305->ctrl[0] = buf[1]; | ||
176 | } | 159 | } |
177 | 160 | err = spi_write_then_read(ds1305->spi, buf, sizeof buf, NULL, 0); | |
161 | if (err >= 0) | ||
162 | ds1305->ctrl[0] = buf[1]; | ||
178 | done: | 163 | done: |
179 | return status; | 164 | return err; |
165 | |||
180 | } | 166 | } |
181 | 167 | ||
182 | #else | ||
183 | #define ds1305_ioctl NULL | ||
184 | #endif | ||
185 | 168 | ||
186 | /* | 169 | /* |
187 | * Get/set of date and time is pretty normal. | 170 | * Get/set of date and time is pretty normal. |
@@ -460,12 +443,12 @@ done: | |||
460 | #endif | 443 | #endif |
461 | 444 | ||
462 | static const struct rtc_class_ops ds1305_ops = { | 445 | static const struct rtc_class_ops ds1305_ops = { |
463 | .ioctl = ds1305_ioctl, | ||
464 | .read_time = ds1305_get_time, | 446 | .read_time = ds1305_get_time, |
465 | .set_time = ds1305_set_time, | 447 | .set_time = ds1305_set_time, |
466 | .read_alarm = ds1305_get_alarm, | 448 | .read_alarm = ds1305_get_alarm, |
467 | .set_alarm = ds1305_set_alarm, | 449 | .set_alarm = ds1305_set_alarm, |
468 | .proc = ds1305_proc, | 450 | .proc = ds1305_proc, |
451 | .alarm_irq_enable = ds1305_alarm_irq_enable, | ||
469 | }; | 452 | }; |
470 | 453 | ||
471 | static void ds1305_work(struct work_struct *work) | 454 | static void ds1305_work(struct work_struct *work) |
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c index 0d559b6416dd..4724ba3acf1a 100644 --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c | |||
@@ -495,50 +495,27 @@ static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t) | |||
495 | return 0; | 495 | return 0; |
496 | } | 496 | } |
497 | 497 | ||
498 | static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | 498 | static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled) |
499 | { | 499 | { |
500 | struct i2c_client *client = to_i2c_client(dev); | 500 | struct i2c_client *client = to_i2c_client(dev); |
501 | struct ds1307 *ds1307 = i2c_get_clientdata(client); | 501 | struct ds1307 *ds1307 = i2c_get_clientdata(client); |
502 | int ret; | 502 | int ret; |
503 | 503 | ||
504 | switch (cmd) { | 504 | if (!test_bit(HAS_ALARM, &ds1307->flags)) |
505 | case RTC_AIE_OFF: | 505 | return -ENOTTY; |
506 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | ||
507 | return -ENOTTY; | ||
508 | |||
509 | ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | ||
510 | if (ret < 0) | ||
511 | return ret; | ||
512 | |||
513 | ret &= ~DS1337_BIT_A1IE; | ||
514 | |||
515 | ret = i2c_smbus_write_byte_data(client, | ||
516 | DS1337_REG_CONTROL, ret); | ||
517 | if (ret < 0) | ||
518 | return ret; | ||
519 | |||
520 | break; | ||
521 | |||
522 | case RTC_AIE_ON: | ||
523 | if (!test_bit(HAS_ALARM, &ds1307->flags)) | ||
524 | return -ENOTTY; | ||
525 | 506 | ||
526 | ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); | 507 | ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL); |
527 | if (ret < 0) | 508 | if (ret < 0) |
528 | return ret; | 509 | return ret; |
529 | 510 | ||
511 | if (enabled) | ||
530 | ret |= DS1337_BIT_A1IE; | 512 | ret |= DS1337_BIT_A1IE; |
513 | else | ||
514 | ret &= ~DS1337_BIT_A1IE; | ||
531 | 515 | ||
532 | ret = i2c_smbus_write_byte_data(client, | 516 | ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret); |
533 | DS1337_REG_CONTROL, ret); | 517 | if (ret < 0) |
534 | if (ret < 0) | 518 | return ret; |
535 | return ret; | ||
536 | |||
537 | break; | ||
538 | |||
539 | default: | ||
540 | return -ENOIOCTLCMD; | ||
541 | } | ||
542 | 519 | ||
543 | return 0; | 520 | return 0; |
544 | } | 521 | } |
@@ -548,7 +525,7 @@ static const struct rtc_class_ops ds13xx_rtc_ops = { | |||
548 | .set_time = ds1307_set_time, | 525 | .set_time = ds1307_set_time, |
549 | .read_alarm = ds1337_read_alarm, | 526 | .read_alarm = ds1337_read_alarm, |
550 | .set_alarm = ds1337_set_alarm, | 527 | .set_alarm = ds1337_set_alarm, |
551 | .ioctl = ds1307_ioctl, | 528 | .alarm_irq_enable = ds1307_alarm_irq_enable, |
552 | }; | 529 | }; |
553 | 530 | ||
554 | /*----------------------------------------------------------------------*/ | 531 | /*----------------------------------------------------------------------*/ |
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c index 47fb6357c346..d834a63ec4b0 100644 --- a/drivers/rtc/rtc-ds1374.c +++ b/drivers/rtc/rtc-ds1374.c | |||
@@ -307,42 +307,25 @@ unlock: | |||
307 | mutex_unlock(&ds1374->mutex); | 307 | mutex_unlock(&ds1374->mutex); |
308 | } | 308 | } |
309 | 309 | ||
310 | static int ds1374_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | 310 | static int ds1374_alarm_irq_enable(struct device *dev, unsigned int enabled) |
311 | { | 311 | { |
312 | struct i2c_client *client = to_i2c_client(dev); | 312 | struct i2c_client *client = to_i2c_client(dev); |
313 | struct ds1374 *ds1374 = i2c_get_clientdata(client); | 313 | struct ds1374 *ds1374 = i2c_get_clientdata(client); |
314 | int ret = -ENOIOCTLCMD; | 314 | int ret; |
315 | 315 | ||
316 | mutex_lock(&ds1374->mutex); | 316 | mutex_lock(&ds1374->mutex); |
317 | 317 | ||
318 | switch (cmd) { | 318 | ret = i2c_smbus_read_byte_data(client, DS1374_REG_CR); |
319 | case RTC_AIE_OFF: | 319 | if (ret < 0) |
320 | ret = i2c_smbus_read_byte_data(client, DS1374_REG_CR); | 320 | goto out; |
321 | if (ret < 0) | ||
322 | goto out; | ||
323 | |||
324 | ret &= ~DS1374_REG_CR_WACE; | ||
325 | |||
326 | ret = i2c_smbus_write_byte_data(client, DS1374_REG_CR, ret); | ||
327 | if (ret < 0) | ||
328 | goto out; | ||
329 | |||
330 | break; | ||
331 | |||
332 | case RTC_AIE_ON: | ||
333 | ret = i2c_smbus_read_byte_data(client, DS1374_REG_CR); | ||
334 | if (ret < 0) | ||
335 | goto out; | ||
336 | 321 | ||
322 | if (enabled) { | ||
337 | ret |= DS1374_REG_CR_WACE | DS1374_REG_CR_AIE; | 323 | ret |= DS1374_REG_CR_WACE | DS1374_REG_CR_AIE; |
338 | ret &= ~DS1374_REG_CR_WDALM; | 324 | ret &= ~DS1374_REG_CR_WDALM; |
339 | 325 | } else { | |
340 | ret = i2c_smbus_write_byte_data(client, DS1374_REG_CR, ret); | 326 | ret &= ~DS1374_REG_CR_WACE; |
341 | if (ret < 0) | ||
342 | goto out; | ||
343 | |||
344 | break; | ||
345 | } | 327 | } |
328 | ret = i2c_smbus_write_byte_data(client, DS1374_REG_CR, ret); | ||
346 | 329 | ||
347 | out: | 330 | out: |
348 | mutex_unlock(&ds1374->mutex); | 331 | mutex_unlock(&ds1374->mutex); |
@@ -354,7 +337,7 @@ static const struct rtc_class_ops ds1374_rtc_ops = { | |||
354 | .set_time = ds1374_set_time, | 337 | .set_time = ds1374_set_time, |
355 | .read_alarm = ds1374_read_alarm, | 338 | .read_alarm = ds1374_read_alarm, |
356 | .set_alarm = ds1374_set_alarm, | 339 | .set_alarm = ds1374_set_alarm, |
357 | .ioctl = ds1374_ioctl, | 340 | .alarm_irq_enable = ds1374_alarm_irq_enable, |
358 | }; | 341 | }; |
359 | 342 | ||
360 | static int ds1374_probe(struct i2c_client *client, | 343 | static int ds1374_probe(struct i2c_client *client, |
diff --git a/drivers/rtc/rtc-m41t80.c b/drivers/rtc/rtc-m41t80.c index 5a8daa358066..69fe664a2228 100644 --- a/drivers/rtc/rtc-m41t80.c +++ b/drivers/rtc/rtc-m41t80.c | |||
@@ -213,41 +213,27 @@ static int m41t80_rtc_set_time(struct device *dev, struct rtc_time *tm) | |||
213 | return m41t80_set_datetime(to_i2c_client(dev), tm); | 213 | return m41t80_set_datetime(to_i2c_client(dev), tm); |
214 | } | 214 | } |
215 | 215 | ||
216 | #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) | 216 | static int m41t80_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
217 | static int | ||
218 | m41t80_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | ||
219 | { | 217 | { |
220 | struct i2c_client *client = to_i2c_client(dev); | 218 | struct i2c_client *client = to_i2c_client(dev); |
221 | int rc; | 219 | int rc; |
222 | 220 | ||
223 | switch (cmd) { | ||
224 | case RTC_AIE_OFF: | ||
225 | case RTC_AIE_ON: | ||
226 | break; | ||
227 | default: | ||
228 | return -ENOIOCTLCMD; | ||
229 | } | ||
230 | |||
231 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); | 221 | rc = i2c_smbus_read_byte_data(client, M41T80_REG_ALARM_MON); |
232 | if (rc < 0) | 222 | if (rc < 0) |
233 | goto err; | 223 | goto err; |
234 | switch (cmd) { | 224 | |
235 | case RTC_AIE_OFF: | 225 | if (enabled) |
236 | rc &= ~M41T80_ALMON_AFE; | ||
237 | break; | ||
238 | case RTC_AIE_ON: | ||
239 | rc |= M41T80_ALMON_AFE; | 226 | rc |= M41T80_ALMON_AFE; |
240 | break; | 227 | else |
241 | } | 228 | rc &= ~M41T80_ALMON_AFE; |
229 | |||
242 | if (i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, rc) < 0) | 230 | if (i2c_smbus_write_byte_data(client, M41T80_REG_ALARM_MON, rc) < 0) |
243 | goto err; | 231 | goto err; |
232 | |||
244 | return 0; | 233 | return 0; |
245 | err: | 234 | err: |
246 | return -EIO; | 235 | return -EIO; |
247 | } | 236 | } |
248 | #else | ||
249 | #define m41t80_rtc_ioctl NULL | ||
250 | #endif | ||
251 | 237 | ||
252 | static int m41t80_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *t) | 238 | static int m41t80_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *t) |
253 | { | 239 | { |
@@ -374,7 +360,7 @@ static struct rtc_class_ops m41t80_rtc_ops = { | |||
374 | .read_alarm = m41t80_rtc_read_alarm, | 360 | .read_alarm = m41t80_rtc_read_alarm, |
375 | .set_alarm = m41t80_rtc_set_alarm, | 361 | .set_alarm = m41t80_rtc_set_alarm, |
376 | .proc = m41t80_rtc_proc, | 362 | .proc = m41t80_rtc_proc, |
377 | .ioctl = m41t80_rtc_ioctl, | 363 | .alarm_irq_enable = m41t80_rtc_alarm_irq_enable, |
378 | }; | 364 | }; |
379 | 365 | ||
380 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | 366 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
diff --git a/drivers/rtc/rtc-m48t59.c b/drivers/rtc/rtc-m48t59.c index a99a0b554eb8..3978f4caf724 100644 --- a/drivers/rtc/rtc-m48t59.c +++ b/drivers/rtc/rtc-m48t59.c | |||
@@ -263,30 +263,21 @@ static int m48t59_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | |||
263 | /* | 263 | /* |
264 | * Handle commands from user-space | 264 | * Handle commands from user-space |
265 | */ | 265 | */ |
266 | static int m48t59_rtc_ioctl(struct device *dev, unsigned int cmd, | 266 | static int m48t59_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
267 | unsigned long arg) | ||
268 | { | 267 | { |
269 | struct platform_device *pdev = to_platform_device(dev); | 268 | struct platform_device *pdev = to_platform_device(dev); |
270 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; | 269 | struct m48t59_plat_data *pdata = pdev->dev.platform_data; |
271 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); | 270 | struct m48t59_private *m48t59 = platform_get_drvdata(pdev); |
272 | unsigned long flags; | 271 | unsigned long flags; |
273 | int ret = 0; | ||
274 | 272 | ||
275 | spin_lock_irqsave(&m48t59->lock, flags); | 273 | spin_lock_irqsave(&m48t59->lock, flags); |
276 | switch (cmd) { | 274 | if (enabled) |
277 | case RTC_AIE_OFF: /* alarm interrupt off */ | ||
278 | M48T59_WRITE(0x00, M48T59_INTR); | ||
279 | break; | ||
280 | case RTC_AIE_ON: /* alarm interrupt on */ | ||
281 | M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR); | 275 | M48T59_WRITE(M48T59_INTR_AFE, M48T59_INTR); |
282 | break; | 276 | else |
283 | default: | 277 | M48T59_WRITE(0x00, M48T59_INTR); |
284 | ret = -ENOIOCTLCMD; | ||
285 | break; | ||
286 | } | ||
287 | spin_unlock_irqrestore(&m48t59->lock, flags); | 278 | spin_unlock_irqrestore(&m48t59->lock, flags); |
288 | 279 | ||
289 | return ret; | 280 | return 0; |
290 | } | 281 | } |
291 | 282 | ||
292 | static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq) | 283 | static int m48t59_rtc_proc(struct device *dev, struct seq_file *seq) |
@@ -330,12 +321,12 @@ static irqreturn_t m48t59_rtc_interrupt(int irq, void *dev_id) | |||
330 | } | 321 | } |
331 | 322 | ||
332 | static const struct rtc_class_ops m48t59_rtc_ops = { | 323 | static const struct rtc_class_ops m48t59_rtc_ops = { |
333 | .ioctl = m48t59_rtc_ioctl, | ||
334 | .read_time = m48t59_rtc_read_time, | 324 | .read_time = m48t59_rtc_read_time, |
335 | .set_time = m48t59_rtc_set_time, | 325 | .set_time = m48t59_rtc_set_time, |
336 | .read_alarm = m48t59_rtc_readalarm, | 326 | .read_alarm = m48t59_rtc_readalarm, |
337 | .set_alarm = m48t59_rtc_setalarm, | 327 | .set_alarm = m48t59_rtc_setalarm, |
338 | .proc = m48t59_rtc_proc, | 328 | .proc = m48t59_rtc_proc, |
329 | .alarm_irq_enable = m48t59_rtc_alarm_irq_enable, | ||
339 | }; | 330 | }; |
340 | 331 | ||
341 | static const struct rtc_class_ops m48t02_rtc_ops = { | 332 | static const struct rtc_class_ops m48t02_rtc_ops = { |
diff --git a/drivers/rtc/rtc-mrst.c b/drivers/rtc/rtc-mrst.c index bcd0cf63eb16..1db62db8469d 100644 --- a/drivers/rtc/rtc-mrst.c +++ b/drivers/rtc/rtc-mrst.c | |||
@@ -255,42 +255,21 @@ static int mrst_irq_set_state(struct device *dev, int enabled) | |||
255 | return 0; | 255 | return 0; |
256 | } | 256 | } |
257 | 257 | ||
258 | #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE) | ||
259 | |||
260 | /* Currently, the vRTC doesn't support UIE ON/OFF */ | 258 | /* Currently, the vRTC doesn't support UIE ON/OFF */ |
261 | static int | 259 | static int mrst_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
262 | mrst_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | ||
263 | { | 260 | { |
264 | struct mrst_rtc *mrst = dev_get_drvdata(dev); | 261 | struct mrst_rtc *mrst = dev_get_drvdata(dev); |
265 | unsigned long flags; | 262 | unsigned long flags; |
266 | 263 | ||
267 | switch (cmd) { | ||
268 | case RTC_AIE_OFF: | ||
269 | case RTC_AIE_ON: | ||
270 | if (!mrst->irq) | ||
271 | return -EINVAL; | ||
272 | break; | ||
273 | default: | ||
274 | /* PIE ON/OFF is handled by mrst_irq_set_state() */ | ||
275 | return -ENOIOCTLCMD; | ||
276 | } | ||
277 | |||
278 | spin_lock_irqsave(&rtc_lock, flags); | 264 | spin_lock_irqsave(&rtc_lock, flags); |
279 | switch (cmd) { | 265 | if (enabled) |
280 | case RTC_AIE_OFF: /* alarm off */ | ||
281 | mrst_irq_disable(mrst, RTC_AIE); | ||
282 | break; | ||
283 | case RTC_AIE_ON: /* alarm on */ | ||
284 | mrst_irq_enable(mrst, RTC_AIE); | 266 | mrst_irq_enable(mrst, RTC_AIE); |
285 | break; | 267 | else |
286 | } | 268 | mrst_irq_disable(mrst, RTC_AIE); |
287 | spin_unlock_irqrestore(&rtc_lock, flags); | 269 | spin_unlock_irqrestore(&rtc_lock, flags); |
288 | return 0; | 270 | return 0; |
289 | } | 271 | } |
290 | 272 | ||
291 | #else | ||
292 | #define mrst_rtc_ioctl NULL | ||
293 | #endif | ||
294 | 273 | ||
295 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) | 274 | #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE) |
296 | 275 | ||
@@ -317,13 +296,13 @@ static int mrst_procfs(struct device *dev, struct seq_file *seq) | |||
317 | #endif | 296 | #endif |
318 | 297 | ||
319 | static const struct rtc_class_ops mrst_rtc_ops = { | 298 | static const struct rtc_class_ops mrst_rtc_ops = { |
320 | .ioctl = mrst_rtc_ioctl, | ||
321 | .read_time = mrst_read_time, | 299 | .read_time = mrst_read_time, |
322 | .set_time = mrst_set_time, | 300 | .set_time = mrst_set_time, |
323 | .read_alarm = mrst_read_alarm, | 301 | .read_alarm = mrst_read_alarm, |
324 | .set_alarm = mrst_set_alarm, | 302 | .set_alarm = mrst_set_alarm, |
325 | .proc = mrst_procfs, | 303 | .proc = mrst_procfs, |
326 | .irq_set_state = mrst_irq_set_state, | 304 | .irq_set_state = mrst_irq_set_state, |
305 | .alarm_irq_enable = mrst_rtc_alarm_irq_enable, | ||
327 | }; | 306 | }; |
328 | 307 | ||
329 | static struct mrst_rtc mrst_rtc; | 308 | static struct mrst_rtc mrst_rtc; |
diff --git a/drivers/rtc/rtc-msm6242.c b/drivers/rtc/rtc-msm6242.c index b2fff0ca49f8..67820626e18f 100644 --- a/drivers/rtc/rtc-msm6242.c +++ b/drivers/rtc/rtc-msm6242.c | |||
@@ -82,7 +82,7 @@ static inline unsigned int msm6242_read(struct msm6242_priv *priv, | |||
82 | static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val, | 82 | static inline void msm6242_write(struct msm6242_priv *priv, unsigned int val, |
83 | unsigned int reg) | 83 | unsigned int reg) |
84 | { | 84 | { |
85 | return __raw_writel(val, &priv->regs[reg]); | 85 | __raw_writel(val, &priv->regs[reg]); |
86 | } | 86 | } |
87 | 87 | ||
88 | static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val, | 88 | static inline void msm6242_set(struct msm6242_priv *priv, unsigned int val, |
diff --git a/drivers/rtc/rtc-mv.c b/drivers/rtc/rtc-mv.c index bcca47298554..60627a764514 100644 --- a/drivers/rtc/rtc-mv.c +++ b/drivers/rtc/rtc-mv.c | |||
@@ -169,25 +169,19 @@ static int mv_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm) | |||
169 | return 0; | 169 | return 0; |
170 | } | 170 | } |
171 | 171 | ||
172 | static int mv_rtc_ioctl(struct device *dev, unsigned int cmd, | 172 | static int mv_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) |
173 | unsigned long arg) | ||
174 | { | 173 | { |
175 | struct platform_device *pdev = to_platform_device(dev); | 174 | struct platform_device *pdev = to_platform_device(dev); |
176 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); | 175 | struct rtc_plat_data *pdata = platform_get_drvdata(pdev); |
177 | void __iomem *ioaddr = pdata->ioaddr; | 176 | void __iomem *ioaddr = pdata->ioaddr; |
178 | 177 | ||
179 | if (pdata->irq < 0) | 178 | if (pdata->irq < 0) |
180 | return -ENOIOCTLCMD; /* fall back into rtc-dev's emulation */ | 179 | return -EINVAL; /* fall back into rtc-dev's emulation */ |
181 | switch (cmd) { | 180 | |
182 | case RTC_AIE_OFF: | 181 | if (enabled) |
183 | writel(0, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS); | ||
184 | break; | ||
185 | case RTC_AIE_ON: | ||
186 | writel(1, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS); | 182 | writel(1, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS); |
187 | break; | 183 | else |
188 | default: | 184 | writel(0, ioaddr + RTC_ALARM_INTERRUPT_MASK_REG_OFFS); |
189 | return -ENOIOCTLCMD; | ||
190 | } | ||
191 | return 0; | 185 | return 0; |
192 | } | 186 | } |
193 | 187 | ||
@@ -216,7 +210,7 @@ static const struct rtc_class_ops mv_rtc_alarm_ops = { | |||
216 | .set_time = mv_rtc_set_time, | 210 | .set_time = mv_rtc_set_time, |
217 | .read_alarm = mv_rtc_read_alarm, | 211 | .read_alarm = mv_rtc_read_alarm, |
218 | .set_alarm = mv_rtc_set_alarm, | 212 | .set_alarm = mv_rtc_set_alarm, |
219 | .ioctl = mv_rtc_ioctl, | 213 | .alarm_irq_enable = mv_rtc_alarm_irq_enable, |
220 | }; | 214 | }; |
221 | 215 | ||
222 | static int __devinit mv_rtc_probe(struct platform_device *pdev) | 216 | static int __devinit mv_rtc_probe(struct platform_device *pdev) |
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index e72b523c79a5..b4dbf3a319b3 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c | |||
@@ -143,8 +143,6 @@ omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
143 | u8 reg; | 143 | u8 reg; |
144 | 144 | ||
145 | switch (cmd) { | 145 | switch (cmd) { |
146 | case RTC_AIE_OFF: | ||
147 | case RTC_AIE_ON: | ||
148 | case RTC_UIE_OFF: | 146 | case RTC_UIE_OFF: |
149 | case RTC_UIE_ON: | 147 | case RTC_UIE_ON: |
150 | break; | 148 | break; |
@@ -156,13 +154,6 @@ omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
156 | rtc_wait_not_busy(); | 154 | rtc_wait_not_busy(); |
157 | reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); | 155 | reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); |
158 | switch (cmd) { | 156 | switch (cmd) { |
159 | /* AIE = Alarm Interrupt Enable */ | ||
160 | case RTC_AIE_OFF: | ||
161 | reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; | ||
162 | break; | ||
163 | case RTC_AIE_ON: | ||
164 | reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; | ||
165 | break; | ||
166 | /* UIE = Update Interrupt Enable (1/second) */ | 157 | /* UIE = Update Interrupt Enable (1/second) */ |
167 | case RTC_UIE_OFF: | 158 | case RTC_UIE_OFF: |
168 | reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER; | 159 | reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER; |
@@ -182,6 +173,24 @@ omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
182 | #define omap_rtc_ioctl NULL | 173 | #define omap_rtc_ioctl NULL |
183 | #endif | 174 | #endif |
184 | 175 | ||
176 | static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
177 | { | ||
178 | u8 reg; | ||
179 | |||
180 | local_irq_disable(); | ||
181 | rtc_wait_not_busy(); | ||
182 | reg = rtc_read(OMAP_RTC_INTERRUPTS_REG); | ||
183 | if (enabled) | ||
184 | reg |= OMAP_RTC_INTERRUPTS_IT_ALARM; | ||
185 | else | ||
186 | reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM; | ||
187 | rtc_wait_not_busy(); | ||
188 | rtc_write(reg, OMAP_RTC_INTERRUPTS_REG); | ||
189 | local_irq_enable(); | ||
190 | |||
191 | return 0; | ||
192 | } | ||
193 | |||
185 | /* this hardware doesn't support "don't care" alarm fields */ | 194 | /* this hardware doesn't support "don't care" alarm fields */ |
186 | static int tm2bcd(struct rtc_time *tm) | 195 | static int tm2bcd(struct rtc_time *tm) |
187 | { | 196 | { |
@@ -309,6 +318,7 @@ static struct rtc_class_ops omap_rtc_ops = { | |||
309 | .set_time = omap_rtc_set_time, | 318 | .set_time = omap_rtc_set_time, |
310 | .read_alarm = omap_rtc_read_alarm, | 319 | .read_alarm = omap_rtc_read_alarm, |
311 | .set_alarm = omap_rtc_set_alarm, | 320 | .set_alarm = omap_rtc_set_alarm, |
321 | .alarm_irq_enable = omap_rtc_alarm_irq_enable, | ||
312 | }; | 322 | }; |
313 | 323 | ||
314 | static int omap_rtc_alarm; | 324 | static int omap_rtc_alarm; |
diff --git a/drivers/rtc/rtc-proc.c b/drivers/rtc/rtc-proc.c index c086fc30a84c..242bbf86c74a 100644 --- a/drivers/rtc/rtc-proc.c +++ b/drivers/rtc/rtc-proc.c | |||
@@ -81,12 +81,16 @@ static int rtc_proc_show(struct seq_file *seq, void *offset) | |||
81 | 81 | ||
82 | static int rtc_proc_open(struct inode *inode, struct file *file) | 82 | static int rtc_proc_open(struct inode *inode, struct file *file) |
83 | { | 83 | { |
84 | int ret; | ||
84 | struct rtc_device *rtc = PDE(inode)->data; | 85 | struct rtc_device *rtc = PDE(inode)->data; |
85 | 86 | ||
86 | if (!try_module_get(THIS_MODULE)) | 87 | if (!try_module_get(THIS_MODULE)) |
87 | return -ENODEV; | 88 | return -ENODEV; |
88 | 89 | ||
89 | return single_open(file, rtc_proc_show, rtc); | 90 | ret = single_open(file, rtc_proc_show, rtc); |
91 | if (ret) | ||
92 | module_put(THIS_MODULE); | ||
93 | return ret; | ||
90 | } | 94 | } |
91 | 95 | ||
92 | static int rtc_proc_release(struct inode *inode, struct file *file) | 96 | static int rtc_proc_release(struct inode *inode, struct file *file) |
diff --git a/drivers/rtc/rtc-rp5c01.c b/drivers/rtc/rtc-rp5c01.c index 36eb66184461..694da39b6dd2 100644 --- a/drivers/rtc/rtc-rp5c01.c +++ b/drivers/rtc/rtc-rp5c01.c | |||
@@ -76,7 +76,7 @@ static inline unsigned int rp5c01_read(struct rp5c01_priv *priv, | |||
76 | static inline void rp5c01_write(struct rp5c01_priv *priv, unsigned int val, | 76 | static inline void rp5c01_write(struct rp5c01_priv *priv, unsigned int val, |
77 | unsigned int reg) | 77 | unsigned int reg) |
78 | { | 78 | { |
79 | return __raw_writel(val, &priv->regs[reg]); | 79 | __raw_writel(val, &priv->regs[reg]); |
80 | } | 80 | } |
81 | 81 | ||
82 | static void rp5c01_lock(struct rp5c01_priv *priv) | 82 | static void rp5c01_lock(struct rp5c01_priv *priv) |
diff --git a/drivers/rtc/rtc-rs5c372.c b/drivers/rtc/rtc-rs5c372.c index dd14e202c2c8..6aaa1550e3b1 100644 --- a/drivers/rtc/rtc-rs5c372.c +++ b/drivers/rtc/rtc-rs5c372.c | |||
@@ -299,14 +299,6 @@ rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
299 | if (rs5c->type == rtc_rs5c372a | 299 | if (rs5c->type == rtc_rs5c372a |
300 | && (buf & RS5C372A_CTRL1_SL1)) | 300 | && (buf & RS5C372A_CTRL1_SL1)) |
301 | return -ENOIOCTLCMD; | 301 | return -ENOIOCTLCMD; |
302 | case RTC_AIE_OFF: | ||
303 | case RTC_AIE_ON: | ||
304 | /* these irq management calls only make sense for chips | ||
305 | * which are wired up to an IRQ. | ||
306 | */ | ||
307 | if (!rs5c->has_irq) | ||
308 | return -ENOIOCTLCMD; | ||
309 | break; | ||
310 | default: | 302 | default: |
311 | return -ENOIOCTLCMD; | 303 | return -ENOIOCTLCMD; |
312 | } | 304 | } |
@@ -317,12 +309,6 @@ rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
317 | 309 | ||
318 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | 310 | addr = RS5C_ADDR(RS5C_REG_CTRL1); |
319 | switch (cmd) { | 311 | switch (cmd) { |
320 | case RTC_AIE_OFF: /* alarm off */ | ||
321 | buf &= ~RS5C_CTRL1_AALE; | ||
322 | break; | ||
323 | case RTC_AIE_ON: /* alarm on */ | ||
324 | buf |= RS5C_CTRL1_AALE; | ||
325 | break; | ||
326 | case RTC_UIE_OFF: /* update off */ | 312 | case RTC_UIE_OFF: /* update off */ |
327 | buf &= ~RS5C_CTRL1_CT_MASK; | 313 | buf &= ~RS5C_CTRL1_CT_MASK; |
328 | break; | 314 | break; |
@@ -347,6 +333,39 @@ rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
347 | #endif | 333 | #endif |
348 | 334 | ||
349 | 335 | ||
336 | static int rs5c_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
337 | { | ||
338 | struct i2c_client *client = to_i2c_client(dev); | ||
339 | struct rs5c372 *rs5c = i2c_get_clientdata(client); | ||
340 | unsigned char buf; | ||
341 | int status, addr; | ||
342 | |||
343 | buf = rs5c->regs[RS5C_REG_CTRL1]; | ||
344 | |||
345 | if (!rs5c->has_irq) | ||
346 | return -EINVAL; | ||
347 | |||
348 | status = rs5c_get_regs(rs5c); | ||
349 | if (status < 0) | ||
350 | return status; | ||
351 | |||
352 | addr = RS5C_ADDR(RS5C_REG_CTRL1); | ||
353 | if (enabled) | ||
354 | buf |= RS5C_CTRL1_AALE; | ||
355 | else | ||
356 | buf &= ~RS5C_CTRL1_AALE; | ||
357 | |||
358 | if (i2c_smbus_write_byte_data(client, addr, buf) < 0) { | ||
359 | printk(KERN_WARNING "%s: can't update alarm\n", | ||
360 | rs5c->rtc->name); | ||
361 | status = -EIO; | ||
362 | } else | ||
363 | rs5c->regs[RS5C_REG_CTRL1] = buf; | ||
364 | |||
365 | return status; | ||
366 | } | ||
367 | |||
368 | |||
350 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, | 369 | /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI, |
351 | * which only exposes a polled programming interface; and since | 370 | * which only exposes a polled programming interface; and since |
352 | * these calls map directly to those EFI requests; we don't demand | 371 | * these calls map directly to those EFI requests; we don't demand |
@@ -466,6 +485,7 @@ static const struct rtc_class_ops rs5c372_rtc_ops = { | |||
466 | .set_time = rs5c372_rtc_set_time, | 485 | .set_time = rs5c372_rtc_set_time, |
467 | .read_alarm = rs5c_read_alarm, | 486 | .read_alarm = rs5c_read_alarm, |
468 | .set_alarm = rs5c_set_alarm, | 487 | .set_alarm = rs5c_set_alarm, |
488 | .alarm_irq_enable = rs5c_rtc_alarm_irq_enable, | ||
469 | }; | 489 | }; |
470 | 490 | ||
471 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) | 491 | #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE) |
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index 88ea52b8647a..5dfe5ffcb0d3 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c | |||
@@ -314,16 +314,6 @@ static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
314 | unsigned long arg) | 314 | unsigned long arg) |
315 | { | 315 | { |
316 | switch (cmd) { | 316 | switch (cmd) { |
317 | case RTC_AIE_OFF: | ||
318 | spin_lock_irq(&sa1100_rtc_lock); | ||
319 | RTSR &= ~RTSR_ALE; | ||
320 | spin_unlock_irq(&sa1100_rtc_lock); | ||
321 | return 0; | ||
322 | case RTC_AIE_ON: | ||
323 | spin_lock_irq(&sa1100_rtc_lock); | ||
324 | RTSR |= RTSR_ALE; | ||
325 | spin_unlock_irq(&sa1100_rtc_lock); | ||
326 | return 0; | ||
327 | case RTC_UIE_OFF: | 317 | case RTC_UIE_OFF: |
328 | spin_lock_irq(&sa1100_rtc_lock); | 318 | spin_lock_irq(&sa1100_rtc_lock); |
329 | RTSR &= ~RTSR_HZE; | 319 | RTSR &= ~RTSR_HZE; |
@@ -338,6 +328,17 @@ static int sa1100_rtc_ioctl(struct device *dev, unsigned int cmd, | |||
338 | return -ENOIOCTLCMD; | 328 | return -ENOIOCTLCMD; |
339 | } | 329 | } |
340 | 330 | ||
331 | static int sa1100_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
332 | { | ||
333 | spin_lock_irq(&sa1100_rtc_lock); | ||
334 | if (enabled) | ||
335 | RTSR |= RTSR_ALE; | ||
336 | else | ||
337 | RTSR &= ~RTSR_ALE; | ||
338 | spin_unlock_irq(&sa1100_rtc_lock); | ||
339 | return 0; | ||
340 | } | ||
341 | |||
341 | static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) | 342 | static int sa1100_rtc_read_time(struct device *dev, struct rtc_time *tm) |
342 | { | 343 | { |
343 | rtc_time_to_tm(RCNR, tm); | 344 | rtc_time_to_tm(RCNR, tm); |
@@ -410,6 +411,7 @@ static const struct rtc_class_ops sa1100_rtc_ops = { | |||
410 | .proc = sa1100_rtc_proc, | 411 | .proc = sa1100_rtc_proc, |
411 | .irq_set_freq = sa1100_irq_set_freq, | 412 | .irq_set_freq = sa1100_irq_set_freq, |
412 | .irq_set_state = sa1100_irq_set_state, | 413 | .irq_set_state = sa1100_irq_set_state, |
414 | .alarm_irq_enable = sa1100_rtc_alarm_irq_enable, | ||
413 | }; | 415 | }; |
414 | 416 | ||
415 | static int sa1100_rtc_probe(struct platform_device *pdev) | 417 | static int sa1100_rtc_probe(struct platform_device *pdev) |
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c index 06e41ed93230..93314a9e7fa9 100644 --- a/drivers/rtc/rtc-sh.c +++ b/drivers/rtc/rtc-sh.c | |||
@@ -350,10 +350,6 @@ static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
350 | unsigned int ret = 0; | 350 | unsigned int ret = 0; |
351 | 351 | ||
352 | switch (cmd) { | 352 | switch (cmd) { |
353 | case RTC_AIE_OFF: | ||
354 | case RTC_AIE_ON: | ||
355 | sh_rtc_setaie(dev, cmd == RTC_AIE_ON); | ||
356 | break; | ||
357 | case RTC_UIE_OFF: | 353 | case RTC_UIE_OFF: |
358 | rtc->periodic_freq &= ~PF_OXS; | 354 | rtc->periodic_freq &= ~PF_OXS; |
359 | sh_rtc_setcie(dev, 0); | 355 | sh_rtc_setcie(dev, 0); |
@@ -369,6 +365,12 @@ static int sh_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | |||
369 | return ret; | 365 | return ret; |
370 | } | 366 | } |
371 | 367 | ||
368 | static int sh_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
369 | { | ||
370 | sh_rtc_setaie(dev, enabled); | ||
371 | return 0; | ||
372 | } | ||
373 | |||
372 | static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm) | 374 | static int sh_rtc_read_time(struct device *dev, struct rtc_time *tm) |
373 | { | 375 | { |
374 | struct platform_device *pdev = to_platform_device(dev); | 376 | struct platform_device *pdev = to_platform_device(dev); |
@@ -604,6 +606,7 @@ static struct rtc_class_ops sh_rtc_ops = { | |||
604 | .irq_set_state = sh_rtc_irq_set_state, | 606 | .irq_set_state = sh_rtc_irq_set_state, |
605 | .irq_set_freq = sh_rtc_irq_set_freq, | 607 | .irq_set_freq = sh_rtc_irq_set_freq, |
606 | .proc = sh_rtc_proc, | 608 | .proc = sh_rtc_proc, |
609 | .alarm_irq_enable = sh_rtc_alarm_irq_enable, | ||
607 | }; | 610 | }; |
608 | 611 | ||
609 | static int __init sh_rtc_probe(struct platform_device *pdev) | 612 | static int __init sh_rtc_probe(struct platform_device *pdev) |
diff --git a/drivers/rtc/rtc-test.c b/drivers/rtc/rtc-test.c index 51725f7755b0..a82d6fe97076 100644 --- a/drivers/rtc/rtc-test.c +++ b/drivers/rtc/rtc-test.c | |||
@@ -50,24 +50,9 @@ static int test_rtc_proc(struct device *dev, struct seq_file *seq) | |||
50 | return 0; | 50 | return 0; |
51 | } | 51 | } |
52 | 52 | ||
53 | static int test_rtc_ioctl(struct device *dev, unsigned int cmd, | 53 | static int test_rtc_alarm_irq_enable(struct device *dev, unsigned int enable) |
54 | unsigned long arg) | ||
55 | { | 54 | { |
56 | /* We do support interrupts, they're generated | 55 | return 0; |
57 | * using the sysfs interface. | ||
58 | */ | ||
59 | switch (cmd) { | ||
60 | case RTC_PIE_ON: | ||
61 | case RTC_PIE_OFF: | ||
62 | case RTC_UIE_ON: | ||
63 | case RTC_UIE_OFF: | ||
64 | case RTC_AIE_ON: | ||
65 | case RTC_AIE_OFF: | ||
66 | return 0; | ||
67 | |||
68 | default: | ||
69 | return -ENOIOCTLCMD; | ||
70 | } | ||
71 | } | 56 | } |
72 | 57 | ||
73 | static const struct rtc_class_ops test_rtc_ops = { | 58 | static const struct rtc_class_ops test_rtc_ops = { |
@@ -76,7 +61,7 @@ static const struct rtc_class_ops test_rtc_ops = { | |||
76 | .read_alarm = test_rtc_read_alarm, | 61 | .read_alarm = test_rtc_read_alarm, |
77 | .set_alarm = test_rtc_set_alarm, | 62 | .set_alarm = test_rtc_set_alarm, |
78 | .set_mmss = test_rtc_set_mmss, | 63 | .set_mmss = test_rtc_set_mmss, |
79 | .ioctl = test_rtc_ioctl, | 64 | .alarm_irq_enable = test_rtc_alarm_irq_enable, |
80 | }; | 65 | }; |
81 | 66 | ||
82 | static ssize_t test_irq_show(struct device *dev, | 67 | static ssize_t test_irq_show(struct device *dev, |
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c index c3244244e8cf..769190ac6d11 100644 --- a/drivers/rtc/rtc-vr41xx.c +++ b/drivers/rtc/rtc-vr41xx.c | |||
@@ -240,26 +240,6 @@ static int vr41xx_rtc_irq_set_state(struct device *dev, int enabled) | |||
240 | static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | 240 | static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) |
241 | { | 241 | { |
242 | switch (cmd) { | 242 | switch (cmd) { |
243 | case RTC_AIE_ON: | ||
244 | spin_lock_irq(&rtc_lock); | ||
245 | |||
246 | if (!alarm_enabled) { | ||
247 | enable_irq(aie_irq); | ||
248 | alarm_enabled = 1; | ||
249 | } | ||
250 | |||
251 | spin_unlock_irq(&rtc_lock); | ||
252 | break; | ||
253 | case RTC_AIE_OFF: | ||
254 | spin_lock_irq(&rtc_lock); | ||
255 | |||
256 | if (alarm_enabled) { | ||
257 | disable_irq(aie_irq); | ||
258 | alarm_enabled = 0; | ||
259 | } | ||
260 | |||
261 | spin_unlock_irq(&rtc_lock); | ||
262 | break; | ||
263 | case RTC_EPOCH_READ: | 243 | case RTC_EPOCH_READ: |
264 | return put_user(epoch, (unsigned long __user *)arg); | 244 | return put_user(epoch, (unsigned long __user *)arg); |
265 | case RTC_EPOCH_SET: | 245 | case RTC_EPOCH_SET: |
@@ -275,6 +255,24 @@ static int vr41xx_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long | |||
275 | return 0; | 255 | return 0; |
276 | } | 256 | } |
277 | 257 | ||
258 | static int vr41xx_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled) | ||
259 | { | ||
260 | spin_lock_irq(&rtc_lock); | ||
261 | if (enabled) { | ||
262 | if (!alarm_enabled) { | ||
263 | enable_irq(aie_irq); | ||
264 | alarm_enabled = 1; | ||
265 | } | ||
266 | } else { | ||
267 | if (alarm_enabled) { | ||
268 | disable_irq(aie_irq); | ||
269 | alarm_enabled = 0; | ||
270 | } | ||
271 | } | ||
272 | spin_unlock_irq(&rtc_lock); | ||
273 | return 0; | ||
274 | } | ||
275 | |||
278 | static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id) | 276 | static irqreturn_t elapsedtime_interrupt(int irq, void *dev_id) |
279 | { | 277 | { |
280 | struct platform_device *pdev = (struct platform_device *)dev_id; | 278 | struct platform_device *pdev = (struct platform_device *)dev_id; |
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c index abb1ffbf3d20..f076cc5c6fb0 100644 --- a/drivers/spi/omap2_mcspi.c +++ b/drivers/spi/omap2_mcspi.c | |||
@@ -1111,7 +1111,7 @@ static u8 __initdata spi2_txdma_id[] = { | |||
1111 | OMAP24XX_DMA_SPI2_TX1, | 1111 | OMAP24XX_DMA_SPI2_TX1, |
1112 | }; | 1112 | }; |
1113 | 1113 | ||
1114 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \ | 1114 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \ |
1115 | || defined(CONFIG_ARCH_OMAP4) | 1115 | || defined(CONFIG_ARCH_OMAP4) |
1116 | static u8 __initdata spi3_rxdma_id[] = { | 1116 | static u8 __initdata spi3_rxdma_id[] = { |
1117 | OMAP24XX_DMA_SPI3_RX0, | 1117 | OMAP24XX_DMA_SPI3_RX0, |
@@ -1154,7 +1154,7 @@ static int __init omap2_mcspi_probe(struct platform_device *pdev) | |||
1154 | txdma_id = spi2_txdma_id; | 1154 | txdma_id = spi2_txdma_id; |
1155 | num_chipselect = 2; | 1155 | num_chipselect = 2; |
1156 | break; | 1156 | break; |
1157 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \ | 1157 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) \ |
1158 | || defined(CONFIG_ARCH_OMAP4) | 1158 | || defined(CONFIG_ARCH_OMAP4) |
1159 | case 3: | 1159 | case 3: |
1160 | rxdma_id = spi3_rxdma_id; | 1160 | rxdma_id = spi3_rxdma_id; |
diff --git a/drivers/spi/spi_sh_msiof.c b/drivers/spi/spi_sh_msiof.c index 56f60c8ea0ab..2c665fceaac7 100644 --- a/drivers/spi/spi_sh_msiof.c +++ b/drivers/spi/spi_sh_msiof.c | |||
@@ -509,9 +509,11 @@ static int sh_msiof_spi_txrx(struct spi_device *spi, struct spi_transfer *t) | |||
509 | bytes_done = 0; | 509 | bytes_done = 0; |
510 | 510 | ||
511 | while (bytes_done < t->len) { | 511 | while (bytes_done < t->len) { |
512 | void *rx_buf = t->rx_buf ? t->rx_buf + bytes_done : NULL; | ||
513 | const void *tx_buf = t->tx_buf ? t->tx_buf + bytes_done : NULL; | ||
512 | n = sh_msiof_spi_txrx_once(p, tx_fifo, rx_fifo, | 514 | n = sh_msiof_spi_txrx_once(p, tx_fifo, rx_fifo, |
513 | t->tx_buf + bytes_done, | 515 | tx_buf, |
514 | t->rx_buf + bytes_done, | 516 | rx_buf, |
515 | words, bits); | 517 | words, bits); |
516 | if (n < 0) | 518 | if (n < 0) |
517 | break; | 519 | break; |
diff --git a/drivers/ssb/pcmcia.c b/drivers/ssb/pcmcia.c index c7345dbf43fa..f8533795ee7f 100644 --- a/drivers/ssb/pcmcia.c +++ b/drivers/ssb/pcmcia.c | |||
@@ -733,7 +733,7 @@ int ssb_pcmcia_get_invariants(struct ssb_bus *bus, | |||
733 | 733 | ||
734 | /* Fetch the vendor specific tuples. */ | 734 | /* Fetch the vendor specific tuples. */ |
735 | res = pcmcia_loop_tuple(bus->host_pcmcia, SSB_PCMCIA_CIS, | 735 | res = pcmcia_loop_tuple(bus->host_pcmcia, SSB_PCMCIA_CIS, |
736 | ssb_pcmcia_do_get_invariants, sprom); | 736 | ssb_pcmcia_do_get_invariants, iv); |
737 | if ((res == 0) || (res == -ENOSPC)) | 737 | if ((res == 0) || (res == -ENOSPC)) |
738 | return 0; | 738 | return 0; |
739 | 739 | ||
diff --git a/drivers/staging/brcm80211/sys/wl_mac80211.c b/drivers/staging/brcm80211/sys/wl_mac80211.c index f1235884cc5d..cd8392badff0 100644 --- a/drivers/staging/brcm80211/sys/wl_mac80211.c +++ b/drivers/staging/brcm80211/sys/wl_mac80211.c | |||
@@ -263,9 +263,7 @@ ieee_set_channel(struct ieee80211_hw *hw, struct ieee80211_channel *chan, | |||
263 | switch (type) { | 263 | switch (type) { |
264 | case NL80211_CHAN_HT20: | 264 | case NL80211_CHAN_HT20: |
265 | case NL80211_CHAN_NO_HT: | 265 | case NL80211_CHAN_NO_HT: |
266 | WL_LOCK(wl); | ||
267 | err = wlc_set(wl->wlc, WLC_SET_CHANNEL, chan->hw_value); | 266 | err = wlc_set(wl->wlc, WLC_SET_CHANNEL, chan->hw_value); |
268 | WL_UNLOCK(wl); | ||
269 | break; | 267 | break; |
270 | case NL80211_CHAN_HT40MINUS: | 268 | case NL80211_CHAN_HT40MINUS: |
271 | case NL80211_CHAN_HT40PLUS: | 269 | case NL80211_CHAN_HT40PLUS: |
@@ -285,6 +283,7 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) | |||
285 | int err = 0; | 283 | int err = 0; |
286 | int new_int; | 284 | int new_int; |
287 | 285 | ||
286 | WL_LOCK(wl); | ||
288 | if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { | 287 | if (changed & IEEE80211_CONF_CHANGE_LISTEN_INTERVAL) { |
289 | WL_NONE("%s: Setting listen interval to %d\n", | 288 | WL_NONE("%s: Setting listen interval to %d\n", |
290 | __func__, conf->listen_interval); | 289 | __func__, conf->listen_interval); |
@@ -341,6 +340,7 @@ static int wl_ops_config(struct ieee80211_hw *hw, u32 changed) | |||
341 | } | 340 | } |
342 | 341 | ||
343 | config_out: | 342 | config_out: |
343 | WL_UNLOCK(wl); | ||
344 | return err; | 344 | return err; |
345 | } | 345 | } |
346 | 346 | ||
@@ -459,13 +459,21 @@ wl_ops_set_tim(struct ieee80211_hw *hw, struct ieee80211_sta *sta, bool set) | |||
459 | 459 | ||
460 | static void wl_ops_sw_scan_start(struct ieee80211_hw *hw) | 460 | static void wl_ops_sw_scan_start(struct ieee80211_hw *hw) |
461 | { | 461 | { |
462 | struct wl_info *wl = hw->priv; | ||
462 | WL_NONE("Scan Start\n"); | 463 | WL_NONE("Scan Start\n"); |
464 | WL_LOCK(wl); | ||
465 | wlc_scan_start(wl->wlc); | ||
466 | WL_UNLOCK(wl); | ||
463 | return; | 467 | return; |
464 | } | 468 | } |
465 | 469 | ||
466 | static void wl_ops_sw_scan_complete(struct ieee80211_hw *hw) | 470 | static void wl_ops_sw_scan_complete(struct ieee80211_hw *hw) |
467 | { | 471 | { |
472 | struct wl_info *wl = hw->priv; | ||
468 | WL_NONE("Scan Complete\n"); | 473 | WL_NONE("Scan Complete\n"); |
474 | WL_LOCK(wl); | ||
475 | wlc_scan_stop(wl->wlc); | ||
476 | WL_UNLOCK(wl); | ||
469 | return; | 477 | return; |
470 | } | 478 | } |
471 | 479 | ||
diff --git a/drivers/staging/brcm80211/sys/wlc_mac80211.c b/drivers/staging/brcm80211/sys/wlc_mac80211.c index a1303863686c..e37e8058e2b8 100644 --- a/drivers/staging/brcm80211/sys/wlc_mac80211.c +++ b/drivers/staging/brcm80211/sys/wlc_mac80211.c | |||
@@ -8461,3 +8461,16 @@ static void wlc_txq_free(struct wlc_info *wlc, struct osl_info *osh, | |||
8461 | 8461 | ||
8462 | kfree(qi); | 8462 | kfree(qi); |
8463 | } | 8463 | } |
8464 | |||
8465 | /* | ||
8466 | * Flag 'scan in progress' to withold dynamic phy calibration | ||
8467 | */ | ||
8468 | void wlc_scan_start(struct wlc_info *wlc) | ||
8469 | { | ||
8470 | wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, true); | ||
8471 | } | ||
8472 | |||
8473 | void wlc_scan_stop(struct wlc_info *wlc) | ||
8474 | { | ||
8475 | wlc_phy_hold_upd(wlc->band->pi, PHY_HOLD_FOR_SCAN, false); | ||
8476 | } | ||
diff --git a/drivers/staging/brcm80211/sys/wlc_pub.h b/drivers/staging/brcm80211/sys/wlc_pub.h index 146a6904a39b..aff413001b70 100644 --- a/drivers/staging/brcm80211/sys/wlc_pub.h +++ b/drivers/staging/brcm80211/sys/wlc_pub.h | |||
@@ -570,6 +570,8 @@ extern void wlc_enable_mac(struct wlc_info *wlc); | |||
570 | extern u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate); | 570 | extern u16 wlc_rate_shm_offset(struct wlc_info *wlc, u8 rate); |
571 | extern u32 wlc_get_rspec_history(struct wlc_bsscfg *cfg); | 571 | extern u32 wlc_get_rspec_history(struct wlc_bsscfg *cfg); |
572 | extern u32 wlc_get_current_highest_rate(struct wlc_bsscfg *cfg); | 572 | extern u32 wlc_get_current_highest_rate(struct wlc_bsscfg *cfg); |
573 | extern void wlc_scan_start(struct wlc_info *wlc); | ||
574 | extern void wlc_scan_stop(struct wlc_info *wlc); | ||
573 | 575 | ||
574 | static inline int wlc_iovar_getuint(struct wlc_info *wlc, const char *name, | 576 | static inline int wlc_iovar_getuint(struct wlc_info *wlc, const char *name, |
575 | uint *arg) | 577 | uint *arg) |
diff --git a/drivers/staging/comedi/Kconfig b/drivers/staging/comedi/Kconfig index aad47326d6dc..1502d80f6f78 100644 --- a/drivers/staging/comedi/Kconfig +++ b/drivers/staging/comedi/Kconfig | |||
@@ -439,6 +439,7 @@ config COMEDI_NI_AT_AO | |||
439 | config COMEDI_NI_ATMIO | 439 | config COMEDI_NI_ATMIO |
440 | tristate "NI AT-MIO E series ISA-PNP card support" | 440 | tristate "NI AT-MIO E series ISA-PNP card support" |
441 | depends on ISAPNP && COMEDI_NI_TIO && COMEDI_NI_COMMON | 441 | depends on ISAPNP && COMEDI_NI_TIO && COMEDI_NI_COMMON |
442 | select COMEDI_8255 | ||
442 | default N | 443 | default N |
443 | ---help--- | 444 | ---help--- |
444 | Enable support for National Instruments AT-MIO E series cards | 445 | Enable support for National Instruments AT-MIO E series cards |
@@ -1040,6 +1041,8 @@ config COMEDI_NI_PCIDIO | |||
1040 | config COMEDI_NI_PCIMIO | 1041 | config COMEDI_NI_PCIMIO |
1041 | tristate "NI PCI-MIO-E series and M series support" | 1042 | tristate "NI PCI-MIO-E series and M series support" |
1042 | depends on COMEDI_NI_TIO && COMEDI_NI_COMMON | 1043 | depends on COMEDI_NI_TIO && COMEDI_NI_COMMON |
1044 | select COMEDI_8255 | ||
1045 | select COMEDI_FC | ||
1043 | default N | 1046 | default N |
1044 | ---help--- | 1047 | ---help--- |
1045 | Enable support for National Instruments PCI-MIO-E series and M series | 1048 | Enable support for National Instruments PCI-MIO-E series and M series |
@@ -1164,6 +1167,7 @@ config COMEDI_NI_LABPC_CS | |||
1164 | config COMEDI_NI_MIO_CS | 1167 | config COMEDI_NI_MIO_CS |
1165 | tristate "NI DAQCard E series PCMCIA support" | 1168 | tristate "NI DAQCard E series PCMCIA support" |
1166 | depends on COMEDI_NI_TIO && COMEDI_NI_COMMON | 1169 | depends on COMEDI_NI_TIO && COMEDI_NI_COMMON |
1170 | select COMEDI_8255 | ||
1167 | select COMEDI_FC | 1171 | select COMEDI_FC |
1168 | default N | 1172 | default N |
1169 | ---help--- | 1173 | ---help--- |
@@ -1268,7 +1272,6 @@ config COMEDI_MITE | |||
1268 | config COMEDI_NI_TIO | 1272 | config COMEDI_NI_TIO |
1269 | tristate "NI general purpose counter support" | 1273 | tristate "NI general purpose counter support" |
1270 | depends on COMEDI_MITE | 1274 | depends on COMEDI_MITE |
1271 | select COMEDI_8255 | ||
1272 | default N | 1275 | default N |
1273 | ---help--- | 1276 | ---help--- |
1274 | Enable support for National Instruments general purpose counters. | 1277 | Enable support for National Instruments general purpose counters. |
diff --git a/drivers/staging/comedi/drivers/mite.c b/drivers/staging/comedi/drivers/mite.c index cd25b241cc1f..fd274e9c7b78 100644 --- a/drivers/staging/comedi/drivers/mite.c +++ b/drivers/staging/comedi/drivers/mite.c | |||
@@ -61,8 +61,6 @@ | |||
61 | #define PCI_DAQ_SIZE 4096 | 61 | #define PCI_DAQ_SIZE 4096 |
62 | #define PCI_DAQ_SIZE_660X 8192 | 62 | #define PCI_DAQ_SIZE_660X 8192 |
63 | 63 | ||
64 | MODULE_LICENSE("GPL"); | ||
65 | |||
66 | struct mite_struct *mite_devices; | 64 | struct mite_struct *mite_devices; |
67 | EXPORT_SYMBOL(mite_devices); | 65 | EXPORT_SYMBOL(mite_devices); |
68 | 66 | ||
diff --git a/drivers/staging/comedi/drivers/ni_6527.c b/drivers/staging/comedi/drivers/ni_6527.c index 14e716e99a5c..54741c9e1af5 100644 --- a/drivers/staging/comedi/drivers/ni_6527.c +++ b/drivers/staging/comedi/drivers/ni_6527.c | |||
@@ -527,3 +527,7 @@ static void __exit driver_ni6527_cleanup_module(void) | |||
527 | 527 | ||
528 | module_init(driver_ni6527_init_module); | 528 | module_init(driver_ni6527_init_module); |
529 | module_exit(driver_ni6527_cleanup_module); | 529 | module_exit(driver_ni6527_cleanup_module); |
530 | |||
531 | MODULE_AUTHOR("Comedi http://www.comedi.org"); | ||
532 | MODULE_DESCRIPTION("Comedi low-level driver"); | ||
533 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/staging/comedi/drivers/ni_65xx.c b/drivers/staging/comedi/drivers/ni_65xx.c index 8b8e2aaf77fb..403fc0997d37 100644 --- a/drivers/staging/comedi/drivers/ni_65xx.c +++ b/drivers/staging/comedi/drivers/ni_65xx.c | |||
@@ -871,3 +871,7 @@ static void __exit driver_ni_65xx_cleanup_module(void) | |||
871 | 871 | ||
872 | module_init(driver_ni_65xx_init_module); | 872 | module_init(driver_ni_65xx_init_module); |
873 | module_exit(driver_ni_65xx_cleanup_module); | 873 | module_exit(driver_ni_65xx_cleanup_module); |
874 | |||
875 | MODULE_AUTHOR("Comedi http://www.comedi.org"); | ||
876 | MODULE_DESCRIPTION("Comedi low-level driver"); | ||
877 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/staging/comedi/drivers/ni_660x.c b/drivers/staging/comedi/drivers/ni_660x.c index 6612b085c4ef..ca2aeaa9449c 100644 --- a/drivers/staging/comedi/drivers/ni_660x.c +++ b/drivers/staging/comedi/drivers/ni_660x.c | |||
@@ -1421,3 +1421,7 @@ static int ni_660x_dio_insn_config(struct comedi_device *dev, | |||
1421 | }; | 1421 | }; |
1422 | return 0; | 1422 | return 0; |
1423 | } | 1423 | } |
1424 | |||
1425 | MODULE_AUTHOR("Comedi http://www.comedi.org"); | ||
1426 | MODULE_DESCRIPTION("Comedi low-level driver"); | ||
1427 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/staging/comedi/drivers/ni_670x.c b/drivers/staging/comedi/drivers/ni_670x.c index e9f034efdc6f..d8d91f90060e 100644 --- a/drivers/staging/comedi/drivers/ni_670x.c +++ b/drivers/staging/comedi/drivers/ni_670x.c | |||
@@ -384,3 +384,7 @@ static int ni_670x_find_device(struct comedi_device *dev, int bus, int slot) | |||
384 | mite_list_devices(); | 384 | mite_list_devices(); |
385 | return -EIO; | 385 | return -EIO; |
386 | } | 386 | } |
387 | |||
388 | MODULE_AUTHOR("Comedi http://www.comedi.org"); | ||
389 | MODULE_DESCRIPTION("Comedi low-level driver"); | ||
390 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c index 84a15c34e484..005d2fe86ee4 100644 --- a/drivers/staging/comedi/drivers/ni_pcidio.c +++ b/drivers/staging/comedi/drivers/ni_pcidio.c | |||
@@ -1354,3 +1354,7 @@ static void __exit driver_pcidio_cleanup_module(void) | |||
1354 | 1354 | ||
1355 | module_init(driver_pcidio_init_module); | 1355 | module_init(driver_pcidio_init_module); |
1356 | module_exit(driver_pcidio_cleanup_module); | 1356 | module_exit(driver_pcidio_cleanup_module); |
1357 | |||
1358 | MODULE_AUTHOR("Comedi http://www.comedi.org"); | ||
1359 | MODULE_DESCRIPTION("Comedi low-level driver"); | ||
1360 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/staging/comedi/drivers/ni_pcimio.c b/drivers/staging/comedi/drivers/ni_pcimio.c index 23a381247285..9148abdad074 100644 --- a/drivers/staging/comedi/drivers/ni_pcimio.c +++ b/drivers/staging/comedi/drivers/ni_pcimio.c | |||
@@ -1853,3 +1853,7 @@ static int pcimio_dio_change(struct comedi_device *dev, | |||
1853 | 1853 | ||
1854 | return 0; | 1854 | return 0; |
1855 | } | 1855 | } |
1856 | |||
1857 | MODULE_AUTHOR("Comedi http://www.comedi.org"); | ||
1858 | MODULE_DESCRIPTION("Comedi low-level driver"); | ||
1859 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/staging/hv/netvsc_drv.c b/drivers/staging/hv/netvsc_drv.c index 54706a16dc0a..b41c9640b72d 100644 --- a/drivers/staging/hv/netvsc_drv.c +++ b/drivers/staging/hv/netvsc_drv.c | |||
@@ -236,6 +236,7 @@ static void netvsc_linkstatus_callback(struct hv_device *device_obj, | |||
236 | if (status == 1) { | 236 | if (status == 1) { |
237 | netif_carrier_on(net); | 237 | netif_carrier_on(net); |
238 | netif_wake_queue(net); | 238 | netif_wake_queue(net); |
239 | netif_notify_peers(net); | ||
239 | } else { | 240 | } else { |
240 | netif_carrier_off(net); | 241 | netif_carrier_off(net); |
241 | netif_stop_queue(net); | 242 | netif_stop_queue(net); |
diff --git a/drivers/staging/intel_sst/intelmid_v2_control.c b/drivers/staging/intel_sst/intelmid_v2_control.c index e38e89df6e84..e2f6d6a3c850 100644 --- a/drivers/staging/intel_sst/intelmid_v2_control.c +++ b/drivers/staging/intel_sst/intelmid_v2_control.c | |||
@@ -874,7 +874,10 @@ static int nc_set_selected_input_dev(u8 value) | |||
874 | sc_access[3].reg_addr = 0x109; | 874 | sc_access[3].reg_addr = 0x109; |
875 | sc_access[3].mask = MASK6; | 875 | sc_access[3].mask = MASK6; |
876 | sc_access[3].value = 0x00; | 876 | sc_access[3].value = 0x00; |
877 | num_val = 4; | 877 | sc_access[4].reg_addr = 0x104; |
878 | sc_access[4].value = 0x3C; | ||
879 | sc_access[4].mask = 0xff; | ||
880 | num_val = 5; | ||
878 | break; | 881 | break; |
879 | default: | 882 | default: |
880 | return -EINVAL; | 883 | return -EINVAL; |
diff --git a/drivers/staging/zram/zram_drv.c b/drivers/staging/zram/zram_drv.c index 5415712f01f8..4bd8cbdaee76 100644 --- a/drivers/staging/zram/zram_drv.c +++ b/drivers/staging/zram/zram_drv.c | |||
@@ -227,6 +227,7 @@ static int zram_read(struct zram *zram, struct bio *bio) | |||
227 | 227 | ||
228 | if (zram_test_flag(zram, index, ZRAM_ZERO)) { | 228 | if (zram_test_flag(zram, index, ZRAM_ZERO)) { |
229 | handle_zero_page(page); | 229 | handle_zero_page(page); |
230 | index++; | ||
230 | continue; | 231 | continue; |
231 | } | 232 | } |
232 | 233 | ||
@@ -235,12 +236,14 @@ static int zram_read(struct zram *zram, struct bio *bio) | |||
235 | pr_debug("Read before write: sector=%lu, size=%u", | 236 | pr_debug("Read before write: sector=%lu, size=%u", |
236 | (ulong)(bio->bi_sector), bio->bi_size); | 237 | (ulong)(bio->bi_sector), bio->bi_size); |
237 | /* Do nothing */ | 238 | /* Do nothing */ |
239 | index++; | ||
238 | continue; | 240 | continue; |
239 | } | 241 | } |
240 | 242 | ||
241 | /* Page is stored uncompressed since it's incompressible */ | 243 | /* Page is stored uncompressed since it's incompressible */ |
242 | if (unlikely(zram_test_flag(zram, index, ZRAM_UNCOMPRESSED))) { | 244 | if (unlikely(zram_test_flag(zram, index, ZRAM_UNCOMPRESSED))) { |
243 | handle_uncompressed_page(zram, page, index); | 245 | handle_uncompressed_page(zram, page, index); |
246 | index++; | ||
244 | continue; | 247 | continue; |
245 | } | 248 | } |
246 | 249 | ||
@@ -320,6 +323,7 @@ static int zram_write(struct zram *zram, struct bio *bio) | |||
320 | mutex_unlock(&zram->lock); | 323 | mutex_unlock(&zram->lock); |
321 | zram_stat_inc(&zram->stats.pages_zero); | 324 | zram_stat_inc(&zram->stats.pages_zero); |
322 | zram_set_flag(zram, index, ZRAM_ZERO); | 325 | zram_set_flag(zram, index, ZRAM_ZERO); |
326 | index++; | ||
323 | continue; | 327 | continue; |
324 | } | 328 | } |
325 | 329 | ||
diff --git a/drivers/tty/hvc/Makefile b/drivers/tty/hvc/Makefile index e6bed5f177ff..d79e7e9bf9d2 100644 --- a/drivers/tty/hvc/Makefile +++ b/drivers/tty/hvc/Makefile | |||
@@ -10,4 +10,3 @@ obj-$(CONFIG_HVC_XEN) += hvc_xen.o | |||
10 | obj-$(CONFIG_HVC_IUCV) += hvc_iucv.o | 10 | obj-$(CONFIG_HVC_IUCV) += hvc_iucv.o |
11 | obj-$(CONFIG_HVC_UDBG) += hvc_udbg.o | 11 | obj-$(CONFIG_HVC_UDBG) += hvc_udbg.o |
12 | obj-$(CONFIG_HVCS) += hvcs.o | 12 | obj-$(CONFIG_HVCS) += hvcs.o |
13 | obj-$(CONFIG_VIRTIO_CONSOLE) += virtio_console.o | ||
diff --git a/drivers/tty/n_gsm.c b/drivers/tty/n_gsm.c index 44b8412a04e8..aa2e5d3eb01a 100644 --- a/drivers/tty/n_gsm.c +++ b/drivers/tty/n_gsm.c | |||
@@ -2414,6 +2414,7 @@ static int gsmld_config(struct tty_struct *tty, struct gsm_mux *gsm, | |||
2414 | 2414 | ||
2415 | gsm->initiator = c->initiator; | 2415 | gsm->initiator = c->initiator; |
2416 | gsm->mru = c->mru; | 2416 | gsm->mru = c->mru; |
2417 | gsm->mtu = c->mtu; | ||
2417 | gsm->encoding = c->encapsulation; | 2418 | gsm->encoding = c->encapsulation; |
2418 | gsm->adaption = c->adaption; | 2419 | gsm->adaption = c->adaption; |
2419 | gsm->n2 = c->n2; | 2420 | gsm->n2 = c->n2; |
diff --git a/drivers/tty/serial/68328serial.c b/drivers/tty/serial/68328serial.c index be0ebce36e54..de0160e3f8c4 100644 --- a/drivers/tty/serial/68328serial.c +++ b/drivers/tty/serial/68328serial.c | |||
@@ -262,7 +262,7 @@ static void status_handle(struct m68k_serial *info, unsigned short status) | |||
262 | 262 | ||
263 | static void receive_chars(struct m68k_serial *info, unsigned short rx) | 263 | static void receive_chars(struct m68k_serial *info, unsigned short rx) |
264 | { | 264 | { |
265 | struct tty_struct *tty = info->port.tty; | 265 | struct tty_struct *tty = info->tty; |
266 | m68328_uart *uart = &uart_addr[info->line]; | 266 | m68328_uart *uart = &uart_addr[info->line]; |
267 | unsigned char ch, flag; | 267 | unsigned char ch, flag; |
268 | 268 | ||
@@ -329,7 +329,7 @@ static void transmit_chars(struct m68k_serial *info) | |||
329 | goto clear_and_return; | 329 | goto clear_and_return; |
330 | } | 330 | } |
331 | 331 | ||
332 | if((info->xmit_cnt <= 0) || info->port.tty->stopped) { | 332 | if((info->xmit_cnt <= 0) || info->tty->stopped) { |
333 | /* That's peculiar... TX ints off */ | 333 | /* That's peculiar... TX ints off */ |
334 | uart->ustcnt &= ~USTCNT_TX_INTR_MASK; | 334 | uart->ustcnt &= ~USTCNT_TX_INTR_MASK; |
335 | goto clear_and_return; | 335 | goto clear_and_return; |
@@ -383,7 +383,7 @@ static void do_softint(struct work_struct *work) | |||
383 | struct m68k_serial *info = container_of(work, struct m68k_serial, tqueue); | 383 | struct m68k_serial *info = container_of(work, struct m68k_serial, tqueue); |
384 | struct tty_struct *tty; | 384 | struct tty_struct *tty; |
385 | 385 | ||
386 | tty = info->port.tty; | 386 | tty = info->tty; |
387 | if (!tty) | 387 | if (!tty) |
388 | return; | 388 | return; |
389 | #if 0 | 389 | #if 0 |
@@ -407,7 +407,7 @@ static void do_serial_hangup(struct work_struct *work) | |||
407 | struct m68k_serial *info = container_of(work, struct m68k_serial, tqueue_hangup); | 407 | struct m68k_serial *info = container_of(work, struct m68k_serial, tqueue_hangup); |
408 | struct tty_struct *tty; | 408 | struct tty_struct *tty; |
409 | 409 | ||
410 | tty = info->port.tty; | 410 | tty = info->tty; |
411 | if (!tty) | 411 | if (!tty) |
412 | return; | 412 | return; |
413 | 413 | ||
@@ -451,8 +451,8 @@ static int startup(struct m68k_serial * info) | |||
451 | uart->ustcnt = USTCNT_UEN | USTCNT_RXEN | USTCNT_RX_INTR_MASK; | 451 | uart->ustcnt = USTCNT_UEN | USTCNT_RXEN | USTCNT_RX_INTR_MASK; |
452 | #endif | 452 | #endif |
453 | 453 | ||
454 | if (info->port.tty) | 454 | if (info->tty) |
455 | clear_bit(TTY_IO_ERROR, &info->port.tty->flags); | 455 | clear_bit(TTY_IO_ERROR, &info->tty->flags); |
456 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | 456 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; |
457 | 457 | ||
458 | /* | 458 | /* |
@@ -486,8 +486,8 @@ static void shutdown(struct m68k_serial * info) | |||
486 | info->xmit_buf = 0; | 486 | info->xmit_buf = 0; |
487 | } | 487 | } |
488 | 488 | ||
489 | if (info->port.tty) | 489 | if (info->tty) |
490 | set_bit(TTY_IO_ERROR, &info->port.tty->flags); | 490 | set_bit(TTY_IO_ERROR, &info->tty->flags); |
491 | 491 | ||
492 | info->flags &= ~S_INITIALIZED; | 492 | info->flags &= ~S_INITIALIZED; |
493 | local_irq_restore(flags); | 493 | local_irq_restore(flags); |
@@ -553,9 +553,9 @@ static void change_speed(struct m68k_serial *info) | |||
553 | unsigned cflag; | 553 | unsigned cflag; |
554 | int i; | 554 | int i; |
555 | 555 | ||
556 | if (!info->port.tty || !info->port.tty->termios) | 556 | if (!info->tty || !info->tty->termios) |
557 | return; | 557 | return; |
558 | cflag = info->port.tty->termios->c_cflag; | 558 | cflag = info->tty->termios->c_cflag; |
559 | if (!(port = info->port)) | 559 | if (!(port = info->port)) |
560 | return; | 560 | return; |
561 | 561 | ||
@@ -970,7 +970,6 @@ static void send_break(struct m68k_serial * info, unsigned int duration) | |||
970 | static int rs_ioctl(struct tty_struct *tty, struct file * file, | 970 | static int rs_ioctl(struct tty_struct *tty, struct file * file, |
971 | unsigned int cmd, unsigned long arg) | 971 | unsigned int cmd, unsigned long arg) |
972 | { | 972 | { |
973 | int error; | ||
974 | struct m68k_serial * info = (struct m68k_serial *)tty->driver_data; | 973 | struct m68k_serial * info = (struct m68k_serial *)tty->driver_data; |
975 | int retval; | 974 | int retval; |
976 | 975 | ||
@@ -1104,7 +1103,7 @@ static void rs_close(struct tty_struct *tty, struct file * filp) | |||
1104 | tty_ldisc_flush(tty); | 1103 | tty_ldisc_flush(tty); |
1105 | tty->closing = 0; | 1104 | tty->closing = 0; |
1106 | info->event = 0; | 1105 | info->event = 0; |
1107 | info->port.tty = NULL; | 1106 | info->tty = NULL; |
1108 | #warning "This is not and has never been valid so fix it" | 1107 | #warning "This is not and has never been valid so fix it" |
1109 | #if 0 | 1108 | #if 0 |
1110 | if (tty->ldisc.num != ldiscs[N_TTY].num) { | 1109 | if (tty->ldisc.num != ldiscs[N_TTY].num) { |
@@ -1142,7 +1141,7 @@ void rs_hangup(struct tty_struct *tty) | |||
1142 | info->event = 0; | 1141 | info->event = 0; |
1143 | info->count = 0; | 1142 | info->count = 0; |
1144 | info->flags &= ~S_NORMAL_ACTIVE; | 1143 | info->flags &= ~S_NORMAL_ACTIVE; |
1145 | info->port.tty = NULL; | 1144 | info->tty = NULL; |
1146 | wake_up_interruptible(&info->open_wait); | 1145 | wake_up_interruptible(&info->open_wait); |
1147 | } | 1146 | } |
1148 | 1147 | ||
@@ -1261,7 +1260,7 @@ int rs_open(struct tty_struct *tty, struct file * filp) | |||
1261 | 1260 | ||
1262 | info->count++; | 1261 | info->count++; |
1263 | tty->driver_data = info; | 1262 | tty->driver_data = info; |
1264 | info->port.tty = tty; | 1263 | info->tty = tty; |
1265 | 1264 | ||
1266 | /* | 1265 | /* |
1267 | * Start up serial port | 1266 | * Start up serial port |
@@ -1338,7 +1337,7 @@ rs68328_init(void) | |||
1338 | info = &m68k_soft[i]; | 1337 | info = &m68k_soft[i]; |
1339 | info->magic = SERIAL_MAGIC; | 1338 | info->magic = SERIAL_MAGIC; |
1340 | info->port = (int) &uart_addr[i]; | 1339 | info->port = (int) &uart_addr[i]; |
1341 | info->port.tty = NULL; | 1340 | info->tty = NULL; |
1342 | info->irq = uart_irqs[i]; | 1341 | info->irq = uart_irqs[i]; |
1343 | info->custom_divisor = 16; | 1342 | info->custom_divisor = 16; |
1344 | info->close_delay = 50; | 1343 | info->close_delay = 50; |
diff --git a/drivers/tty/serial/68360serial.c b/drivers/tty/serial/68360serial.c index 88b13356ec10..bc21eeae8fde 100644 --- a/drivers/tty/serial/68360serial.c +++ b/drivers/tty/serial/68360serial.c | |||
@@ -2428,6 +2428,7 @@ static const struct tty_operations rs_360_ops = { | |||
2428 | /* .read_proc = rs_360_read_proc, */ | 2428 | /* .read_proc = rs_360_read_proc, */ |
2429 | .tiocmget = rs_360_tiocmget, | 2429 | .tiocmget = rs_360_tiocmget, |
2430 | .tiocmset = rs_360_tiocmset, | 2430 | .tiocmset = rs_360_tiocmset, |
2431 | .get_icount = rs_360_get_icount, | ||
2431 | }; | 2432 | }; |
2432 | 2433 | ||
2433 | static int __init rs_360_init(void) | 2434 | static int __init rs_360_init(void) |
diff --git a/drivers/tty/serial/bfin_5xx.c b/drivers/tty/serial/bfin_5xx.c index e381b895b04d..9b1ff2b6bb37 100644 --- a/drivers/tty/serial/bfin_5xx.c +++ b/drivers/tty/serial/bfin_5xx.c | |||
@@ -370,10 +370,8 @@ static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id) | |||
370 | { | 370 | { |
371 | struct bfin_serial_port *uart = dev_id; | 371 | struct bfin_serial_port *uart = dev_id; |
372 | 372 | ||
373 | spin_lock(&uart->port.lock); | ||
374 | while (UART_GET_LSR(uart) & DR) | 373 | while (UART_GET_LSR(uart) & DR) |
375 | bfin_serial_rx_chars(uart); | 374 | bfin_serial_rx_chars(uart); |
376 | spin_unlock(&uart->port.lock); | ||
377 | 375 | ||
378 | return IRQ_HANDLED; | 376 | return IRQ_HANDLED; |
379 | } | 377 | } |
@@ -490,9 +488,8 @@ void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart) | |||
490 | { | 488 | { |
491 | int x_pos, pos; | 489 | int x_pos, pos; |
492 | 490 | ||
493 | dma_disable_irq(uart->tx_dma_channel); | 491 | dma_disable_irq_nosync(uart->rx_dma_channel); |
494 | dma_disable_irq(uart->rx_dma_channel); | 492 | spin_lock_bh(&uart->rx_lock); |
495 | spin_lock_bh(&uart->port.lock); | ||
496 | 493 | ||
497 | /* 2D DMA RX buffer ring is used. Because curr_y_count and | 494 | /* 2D DMA RX buffer ring is used. Because curr_y_count and |
498 | * curr_x_count can't be read as an atomic operation, | 495 | * curr_x_count can't be read as an atomic operation, |
@@ -523,8 +520,7 @@ void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart) | |||
523 | uart->rx_dma_buf.tail = uart->rx_dma_buf.head; | 520 | uart->rx_dma_buf.tail = uart->rx_dma_buf.head; |
524 | } | 521 | } |
525 | 522 | ||
526 | spin_unlock_bh(&uart->port.lock); | 523 | spin_unlock_bh(&uart->rx_lock); |
527 | dma_enable_irq(uart->tx_dma_channel); | ||
528 | dma_enable_irq(uart->rx_dma_channel); | 524 | dma_enable_irq(uart->rx_dma_channel); |
529 | 525 | ||
530 | mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES); | 526 | mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES); |
@@ -571,7 +567,7 @@ static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id) | |||
571 | unsigned short irqstat; | 567 | unsigned short irqstat; |
572 | int x_pos, pos; | 568 | int x_pos, pos; |
573 | 569 | ||
574 | spin_lock(&uart->port.lock); | 570 | spin_lock(&uart->rx_lock); |
575 | irqstat = get_dma_curr_irqstat(uart->rx_dma_channel); | 571 | irqstat = get_dma_curr_irqstat(uart->rx_dma_channel); |
576 | clear_dma_irqstat(uart->rx_dma_channel); | 572 | clear_dma_irqstat(uart->rx_dma_channel); |
577 | 573 | ||
@@ -589,7 +585,7 @@ static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id) | |||
589 | uart->rx_dma_buf.tail = uart->rx_dma_buf.head; | 585 | uart->rx_dma_buf.tail = uart->rx_dma_buf.head; |
590 | } | 586 | } |
591 | 587 | ||
592 | spin_unlock(&uart->port.lock); | 588 | spin_unlock(&uart->rx_lock); |
593 | 589 | ||
594 | return IRQ_HANDLED; | 590 | return IRQ_HANDLED; |
595 | } | 591 | } |
@@ -1332,6 +1328,7 @@ static int bfin_serial_probe(struct platform_device *pdev) | |||
1332 | } | 1328 | } |
1333 | 1329 | ||
1334 | #ifdef CONFIG_SERIAL_BFIN_DMA | 1330 | #ifdef CONFIG_SERIAL_BFIN_DMA |
1331 | spin_lock_init(&uart->rx_lock); | ||
1335 | uart->tx_done = 1; | 1332 | uart->tx_done = 1; |
1336 | uart->tx_count = 0; | 1333 | uart->tx_count = 0; |
1337 | 1334 | ||
diff --git a/drivers/tty/sysrq.c b/drivers/tty/sysrq.c index 8e0dd254eb11..81f13958e751 100644 --- a/drivers/tty/sysrq.c +++ b/drivers/tty/sysrq.c | |||
@@ -571,6 +571,7 @@ struct sysrq_state { | |||
571 | unsigned int alt_use; | 571 | unsigned int alt_use; |
572 | bool active; | 572 | bool active; |
573 | bool need_reinject; | 573 | bool need_reinject; |
574 | bool reinjecting; | ||
574 | }; | 575 | }; |
575 | 576 | ||
576 | static void sysrq_reinject_alt_sysrq(struct work_struct *work) | 577 | static void sysrq_reinject_alt_sysrq(struct work_struct *work) |
@@ -581,6 +582,10 @@ static void sysrq_reinject_alt_sysrq(struct work_struct *work) | |||
581 | unsigned int alt_code = sysrq->alt_use; | 582 | unsigned int alt_code = sysrq->alt_use; |
582 | 583 | ||
583 | if (sysrq->need_reinject) { | 584 | if (sysrq->need_reinject) { |
585 | /* we do not want the assignment to be reordered */ | ||
586 | sysrq->reinjecting = true; | ||
587 | mb(); | ||
588 | |||
584 | /* Simulate press and release of Alt + SysRq */ | 589 | /* Simulate press and release of Alt + SysRq */ |
585 | input_inject_event(handle, EV_KEY, alt_code, 1); | 590 | input_inject_event(handle, EV_KEY, alt_code, 1); |
586 | input_inject_event(handle, EV_KEY, KEY_SYSRQ, 1); | 591 | input_inject_event(handle, EV_KEY, KEY_SYSRQ, 1); |
@@ -589,6 +594,9 @@ static void sysrq_reinject_alt_sysrq(struct work_struct *work) | |||
589 | input_inject_event(handle, EV_KEY, KEY_SYSRQ, 0); | 594 | input_inject_event(handle, EV_KEY, KEY_SYSRQ, 0); |
590 | input_inject_event(handle, EV_KEY, alt_code, 0); | 595 | input_inject_event(handle, EV_KEY, alt_code, 0); |
591 | input_inject_event(handle, EV_SYN, SYN_REPORT, 1); | 596 | input_inject_event(handle, EV_SYN, SYN_REPORT, 1); |
597 | |||
598 | mb(); | ||
599 | sysrq->reinjecting = false; | ||
592 | } | 600 | } |
593 | } | 601 | } |
594 | 602 | ||
@@ -599,6 +607,13 @@ static bool sysrq_filter(struct input_handle *handle, | |||
599 | bool was_active = sysrq->active; | 607 | bool was_active = sysrq->active; |
600 | bool suppress; | 608 | bool suppress; |
601 | 609 | ||
610 | /* | ||
611 | * Do not filter anything if we are in the process of re-injecting | ||
612 | * Alt+SysRq combination. | ||
613 | */ | ||
614 | if (sysrq->reinjecting) | ||
615 | return false; | ||
616 | |||
602 | switch (type) { | 617 | switch (type) { |
603 | 618 | ||
604 | case EV_SYN: | 619 | case EV_SYN: |
@@ -629,7 +644,7 @@ static bool sysrq_filter(struct input_handle *handle, | |||
629 | sysrq->alt_use = sysrq->alt; | 644 | sysrq->alt_use = sysrq->alt; |
630 | /* | 645 | /* |
631 | * If nothing else will be pressed we'll need | 646 | * If nothing else will be pressed we'll need |
632 | * to * re-inject Alt-SysRq keysroke. | 647 | * to re-inject Alt-SysRq keysroke. |
633 | */ | 648 | */ |
634 | sysrq->need_reinject = true; | 649 | sysrq->need_reinject = true; |
635 | } | 650 | } |
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c index d6ede989ff22..4ab49d4eebf4 100644 --- a/drivers/usb/class/cdc-acm.c +++ b/drivers/usb/class/cdc-acm.c | |||
@@ -1607,6 +1607,7 @@ static const struct usb_device_id acm_ids[] = { | |||
1607 | { NOKIA_PCSUITE_ACM_INFO(0x0154), }, /* Nokia 5800 XpressMusic */ | 1607 | { NOKIA_PCSUITE_ACM_INFO(0x0154), }, /* Nokia 5800 XpressMusic */ |
1608 | { NOKIA_PCSUITE_ACM_INFO(0x04ce), }, /* Nokia E90 */ | 1608 | { NOKIA_PCSUITE_ACM_INFO(0x04ce), }, /* Nokia E90 */ |
1609 | { NOKIA_PCSUITE_ACM_INFO(0x01d4), }, /* Nokia E55 */ | 1609 | { NOKIA_PCSUITE_ACM_INFO(0x01d4), }, /* Nokia E55 */ |
1610 | { NOKIA_PCSUITE_ACM_INFO(0x0302), }, /* Nokia N8 */ | ||
1610 | { SAMSUNG_PCSUITE_ACM_INFO(0x6651), }, /* Samsung GTi8510 (INNOV8) */ | 1611 | { SAMSUNG_PCSUITE_ACM_INFO(0x6651), }, /* Samsung GTi8510 (INNOV8) */ |
1611 | 1612 | ||
1612 | /* NOTE: non-Nokia COMM/ACM/0xff is likely MSFT RNDIS... NOT a modem! */ | 1613 | /* NOTE: non-Nokia COMM/ACM/0xff is likely MSFT RNDIS... NOT a modem! */ |
diff --git a/drivers/usb/core/hcd.c b/drivers/usb/core/hcd.c index 6a95017fa62b..e935f71d7a34 100644 --- a/drivers/usb/core/hcd.c +++ b/drivers/usb/core/hcd.c | |||
@@ -1955,7 +1955,6 @@ int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg) | |||
1955 | 1955 | ||
1956 | dev_dbg(&rhdev->dev, "usb %s%s\n", | 1956 | dev_dbg(&rhdev->dev, "usb %s%s\n", |
1957 | (msg.event & PM_EVENT_AUTO ? "auto-" : ""), "resume"); | 1957 | (msg.event & PM_EVENT_AUTO ? "auto-" : ""), "resume"); |
1958 | clear_bit(HCD_FLAG_WAKEUP_PENDING, &hcd->flags); | ||
1959 | if (!hcd->driver->bus_resume) | 1958 | if (!hcd->driver->bus_resume) |
1960 | return -ENOENT; | 1959 | return -ENOENT; |
1961 | if (hcd->state == HC_STATE_RUNNING) | 1960 | if (hcd->state == HC_STATE_RUNNING) |
@@ -1963,6 +1962,7 @@ int hcd_bus_resume(struct usb_device *rhdev, pm_message_t msg) | |||
1963 | 1962 | ||
1964 | hcd->state = HC_STATE_RESUMING; | 1963 | hcd->state = HC_STATE_RESUMING; |
1965 | status = hcd->driver->bus_resume(hcd); | 1964 | status = hcd->driver->bus_resume(hcd); |
1965 | clear_bit(HCD_FLAG_WAKEUP_PENDING, &hcd->flags); | ||
1966 | if (status == 0) { | 1966 | if (status == 0) { |
1967 | /* TRSMRCY = 10 msec */ | 1967 | /* TRSMRCY = 10 msec */ |
1968 | msleep(10); | 1968 | msleep(10); |
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index 4310cc4b1cb5..d041c6826e43 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c | |||
@@ -2753,6 +2753,11 @@ hub_port_init (struct usb_hub *hub, struct usb_device *udev, int port1, | |||
2753 | udev->ttport = hdev->ttport; | 2753 | udev->ttport = hdev->ttport; |
2754 | } else if (udev->speed != USB_SPEED_HIGH | 2754 | } else if (udev->speed != USB_SPEED_HIGH |
2755 | && hdev->speed == USB_SPEED_HIGH) { | 2755 | && hdev->speed == USB_SPEED_HIGH) { |
2756 | if (!hub->tt.hub) { | ||
2757 | dev_err(&udev->dev, "parent hub has no TT\n"); | ||
2758 | retval = -EINVAL; | ||
2759 | goto fail; | ||
2760 | } | ||
2756 | udev->tt = &hub->tt; | 2761 | udev->tt = &hub->tt; |
2757 | udev->ttport = port1; | 2762 | udev->ttport = port1; |
2758 | } | 2763 | } |
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 06bb9d4587e9..d50099675f28 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig | |||
@@ -546,6 +546,8 @@ config USB_GADGET_CI13XXX_MSM | |||
546 | ci13xxx_udc core. | 546 | ci13xxx_udc core. |
547 | This driver depends on OTG driver for PHY initialization, | 547 | This driver depends on OTG driver for PHY initialization, |
548 | clock management, powering up VBUS, and power management. | 548 | clock management, powering up VBUS, and power management. |
549 | This driver is not supported on boards like trout which | ||
550 | has an external PHY. | ||
549 | 551 | ||
550 | Say "y" to link the driver statically, or "m" to build a | 552 | Say "y" to link the driver statically, or "m" to build a |
551 | dynamically linked module called "ci13xxx_msm" and force all | 553 | dynamically linked module called "ci13xxx_msm" and force all |
diff --git a/drivers/usb/gadget/f_mass_storage.c b/drivers/usb/gadget/f_mass_storage.c index b5dbb2308f56..6d8e533949eb 100644 --- a/drivers/usb/gadget/f_mass_storage.c +++ b/drivers/usb/gadget/f_mass_storage.c | |||
@@ -293,6 +293,7 @@ | |||
293 | 293 | ||
294 | #include <linux/usb/ch9.h> | 294 | #include <linux/usb/ch9.h> |
295 | #include <linux/usb/gadget.h> | 295 | #include <linux/usb/gadget.h> |
296 | #include <linux/usb/composite.h> | ||
296 | 297 | ||
297 | #include "gadget_chips.h" | 298 | #include "gadget_chips.h" |
298 | 299 | ||
@@ -2763,7 +2764,7 @@ static struct fsg_common *fsg_common_init(struct fsg_common *common, | |||
2763 | return ERR_PTR(-ENOMEM); | 2764 | return ERR_PTR(-ENOMEM); |
2764 | common->free_storage_on_release = 1; | 2765 | common->free_storage_on_release = 1; |
2765 | } else { | 2766 | } else { |
2766 | memset(common, 0, sizeof common); | 2767 | memset(common, 0, sizeof *common); |
2767 | common->free_storage_on_release = 0; | 2768 | common->free_storage_on_release = 0; |
2768 | } | 2769 | } |
2769 | 2770 | ||
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c index 20d43da319ae..015118535f77 100644 --- a/drivers/usb/gadget/r8a66597-udc.c +++ b/drivers/usb/gadget/r8a66597-udc.c | |||
@@ -258,7 +258,7 @@ static int pipe_buffer_setting(struct r8a66597 *r8a66597, | |||
258 | break; | 258 | break; |
259 | case R8A66597_BULK: | 259 | case R8A66597_BULK: |
260 | /* isochronous pipes may be used as bulk pipes */ | 260 | /* isochronous pipes may be used as bulk pipes */ |
261 | if (info->pipe > R8A66597_BASE_PIPENUM_BULK) | 261 | if (info->pipe >= R8A66597_BASE_PIPENUM_BULK) |
262 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; | 262 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_BULK; |
263 | else | 263 | else |
264 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; | 264 | bufnum = info->pipe - R8A66597_BASE_PIPENUM_ISOC; |
diff --git a/drivers/usb/host/Kconfig b/drivers/usb/host/Kconfig index 24046c0f5878..0e6afa260ed8 100644 --- a/drivers/usb/host/Kconfig +++ b/drivers/usb/host/Kconfig | |||
@@ -151,6 +151,8 @@ config USB_EHCI_MSM | |||
151 | Qualcomm chipsets. Root Hub has inbuilt TT. | 151 | Qualcomm chipsets. Root Hub has inbuilt TT. |
152 | This driver depends on OTG driver for PHY initialization, | 152 | This driver depends on OTG driver for PHY initialization, |
153 | clock management, powering up VBUS, and power management. | 153 | clock management, powering up VBUS, and power management. |
154 | This driver is not supported on boards like trout which | ||
155 | has an external PHY. | ||
154 | 156 | ||
155 | config USB_EHCI_HCD_PPC_OF | 157 | config USB_EHCI_HCD_PPC_OF |
156 | bool "EHCI support for PPC USB controller on OF platform bus" | 158 | bool "EHCI support for PPC USB controller on OF platform bus" |
diff --git a/drivers/usb/host/ehci-au1xxx.c b/drivers/usb/host/ehci-au1xxx.c index 2baf8a849086..a869e3c103d3 100644 --- a/drivers/usb/host/ehci-au1xxx.c +++ b/drivers/usb/host/ehci-au1xxx.c | |||
@@ -227,8 +227,8 @@ static int ehci_hcd_au1xxx_drv_suspend(struct device *dev) | |||
227 | * mark HW unaccessible. The PM and USB cores make sure that | 227 | * mark HW unaccessible. The PM and USB cores make sure that |
228 | * the root hub is either suspended or stopped. | 228 | * the root hub is either suspended or stopped. |
229 | */ | 229 | */ |
230 | spin_lock_irqsave(&ehci->lock, flags); | ||
231 | ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev)); | 230 | ehci_prepare_ports_for_controller_suspend(ehci, device_may_wakeup(dev)); |
231 | spin_lock_irqsave(&ehci->lock, flags); | ||
232 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); | 232 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
233 | (void)ehci_readl(ehci, &ehci->regs->intr_enable); | 233 | (void)ehci_readl(ehci, &ehci->regs->intr_enable); |
234 | 234 | ||
diff --git a/drivers/usb/host/ehci-hub.c b/drivers/usb/host/ehci-hub.c index 796ea0c8900f..8a515f0d5988 100644 --- a/drivers/usb/host/ehci-hub.c +++ b/drivers/usb/host/ehci-hub.c | |||
@@ -111,6 +111,7 @@ static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, | |||
111 | { | 111 | { |
112 | int port; | 112 | int port; |
113 | u32 temp; | 113 | u32 temp; |
114 | unsigned long flags; | ||
114 | 115 | ||
115 | /* If remote wakeup is enabled for the root hub but disabled | 116 | /* If remote wakeup is enabled for the root hub but disabled |
116 | * for the controller, we must adjust all the port wakeup flags | 117 | * for the controller, we must adjust all the port wakeup flags |
@@ -120,6 +121,8 @@ static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, | |||
120 | if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup) | 121 | if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup) |
121 | return; | 122 | return; |
122 | 123 | ||
124 | spin_lock_irqsave(&ehci->lock, flags); | ||
125 | |||
123 | /* clear phy low-power mode before changing wakeup flags */ | 126 | /* clear phy low-power mode before changing wakeup flags */ |
124 | if (ehci->has_hostpc) { | 127 | if (ehci->has_hostpc) { |
125 | port = HCS_N_PORTS(ehci->hcs_params); | 128 | port = HCS_N_PORTS(ehci->hcs_params); |
@@ -131,7 +134,9 @@ static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, | |||
131 | temp = ehci_readl(ehci, hostpc_reg); | 134 | temp = ehci_readl(ehci, hostpc_reg); |
132 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg); | 135 | ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg); |
133 | } | 136 | } |
137 | spin_unlock_irqrestore(&ehci->lock, flags); | ||
134 | msleep(5); | 138 | msleep(5); |
139 | spin_lock_irqsave(&ehci->lock, flags); | ||
135 | } | 140 | } |
136 | 141 | ||
137 | port = HCS_N_PORTS(ehci->hcs_params); | 142 | port = HCS_N_PORTS(ehci->hcs_params); |
@@ -170,6 +175,8 @@ static void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci, | |||
170 | /* Does the root hub have a port wakeup pending? */ | 175 | /* Does the root hub have a port wakeup pending? */ |
171 | if (!suspending && (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)) | 176 | if (!suspending && (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)) |
172 | usb_hcd_resume_root_hub(ehci_to_hcd(ehci)); | 177 | usb_hcd_resume_root_hub(ehci_to_hcd(ehci)); |
178 | |||
179 | spin_unlock_irqrestore(&ehci->lock, flags); | ||
173 | } | 180 | } |
174 | 181 | ||
175 | static int ehci_bus_suspend (struct usb_hcd *hcd) | 182 | static int ehci_bus_suspend (struct usb_hcd *hcd) |
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 680f2ef4e59f..f784ceb862a3 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c | |||
@@ -796,7 +796,7 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) | |||
796 | hcd = usb_create_hcd(&ehci_omap_hc_driver, &pdev->dev, | 796 | hcd = usb_create_hcd(&ehci_omap_hc_driver, &pdev->dev, |
797 | dev_name(&pdev->dev)); | 797 | dev_name(&pdev->dev)); |
798 | if (!hcd) { | 798 | if (!hcd) { |
799 | dev_dbg(&pdev->dev, "failed to create hcd with err %d\n", ret); | 799 | dev_err(&pdev->dev, "failed to create hcd with err %d\n", ret); |
800 | ret = -ENOMEM; | 800 | ret = -ENOMEM; |
801 | goto err_create_hcd; | 801 | goto err_create_hcd; |
802 | } | 802 | } |
@@ -864,7 +864,7 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) | |||
864 | 864 | ||
865 | ret = omap_start_ehc(omap, hcd); | 865 | ret = omap_start_ehc(omap, hcd); |
866 | if (ret) { | 866 | if (ret) { |
867 | dev_dbg(&pdev->dev, "failed to start ehci\n"); | 867 | dev_err(&pdev->dev, "failed to start ehci with err %d\n", ret); |
868 | goto err_start; | 868 | goto err_start; |
869 | } | 869 | } |
870 | 870 | ||
@@ -879,7 +879,7 @@ static int ehci_hcd_omap_probe(struct platform_device *pdev) | |||
879 | 879 | ||
880 | ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); | 880 | ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED); |
881 | if (ret) { | 881 | if (ret) { |
882 | dev_dbg(&pdev->dev, "failed to add hcd with err %d\n", ret); | 882 | dev_err(&pdev->dev, "failed to add hcd with err %d\n", ret); |
883 | goto err_add_hcd; | 883 | goto err_add_hcd; |
884 | } | 884 | } |
885 | 885 | ||
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c index bed07d4aab06..07bb982e59f6 100644 --- a/drivers/usb/host/ehci-pci.c +++ b/drivers/usb/host/ehci-pci.c | |||
@@ -367,8 +367,8 @@ static int ehci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup) | |||
367 | * mark HW unaccessible. The PM and USB cores make sure that | 367 | * mark HW unaccessible. The PM and USB cores make sure that |
368 | * the root hub is either suspended or stopped. | 368 | * the root hub is either suspended or stopped. |
369 | */ | 369 | */ |
370 | spin_lock_irqsave (&ehci->lock, flags); | ||
371 | ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup); | 370 | ehci_prepare_ports_for_controller_suspend(ehci, do_wakeup); |
371 | spin_lock_irqsave (&ehci->lock, flags); | ||
372 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); | 372 | ehci_writel(ehci, 0, &ehci->regs->intr_enable); |
373 | (void)ehci_readl(ehci, &ehci->regs->intr_enable); | 373 | (void)ehci_readl(ehci, &ehci->regs->intr_enable); |
374 | 374 | ||
diff --git a/drivers/usb/host/sl811-hcd.c b/drivers/usb/host/sl811-hcd.c index 990f06b89eaa..2e9602a10e9b 100644 --- a/drivers/usb/host/sl811-hcd.c +++ b/drivers/usb/host/sl811-hcd.c | |||
@@ -861,6 +861,7 @@ static int sl811h_urb_enqueue( | |||
861 | DBG("dev %d ep%d maxpacket %d\n", | 861 | DBG("dev %d ep%d maxpacket %d\n", |
862 | udev->devnum, epnum, ep->maxpacket); | 862 | udev->devnum, epnum, ep->maxpacket); |
863 | retval = -EINVAL; | 863 | retval = -EINVAL; |
864 | kfree(ep); | ||
864 | goto fail; | 865 | goto fail; |
865 | } | 866 | } |
866 | 867 | ||
diff --git a/drivers/usb/musb/blackfin.c b/drivers/usb/musb/blackfin.c index eeba228eb2af..9d49d1cd7ce2 100644 --- a/drivers/usb/musb/blackfin.c +++ b/drivers/usb/musb/blackfin.c | |||
@@ -404,6 +404,7 @@ static int bfin_musb_init(struct musb *musb) | |||
404 | musb->xceiv->set_power = bfin_musb_set_power; | 404 | musb->xceiv->set_power = bfin_musb_set_power; |
405 | 405 | ||
406 | musb->isr = blackfin_interrupt; | 406 | musb->isr = blackfin_interrupt; |
407 | musb->double_buffer_not_ok = true; | ||
407 | 408 | ||
408 | return 0; | 409 | return 0; |
409 | } | 410 | } |
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index 07cf394e491b..538fafa05b46 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c | |||
@@ -128,12 +128,7 @@ MODULE_ALIAS("platform:" MUSB_DRIVER_NAME); | |||
128 | 128 | ||
129 | static inline struct musb *dev_to_musb(struct device *dev) | 129 | static inline struct musb *dev_to_musb(struct device *dev) |
130 | { | 130 | { |
131 | #ifdef CONFIG_USB_MUSB_HDRC_HCD | ||
132 | /* usbcore insists dev->driver_data is a "struct hcd *" */ | ||
133 | return hcd_to_musb(dev_get_drvdata(dev)); | ||
134 | #else | ||
135 | return dev_get_drvdata(dev); | 131 | return dev_get_drvdata(dev); |
136 | #endif | ||
137 | } | 132 | } |
138 | 133 | ||
139 | /*-------------------------------------------------------------------------*/ | 134 | /*-------------------------------------------------------------------------*/ |
@@ -1535,7 +1530,7 @@ static int __init musb_core_init(u16 musb_type, struct musb *musb) | |||
1535 | 1530 | ||
1536 | /*-------------------------------------------------------------------------*/ | 1531 | /*-------------------------------------------------------------------------*/ |
1537 | 1532 | ||
1538 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430) || \ | 1533 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) || \ |
1539 | defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_U8500) || \ | 1534 | defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_ARCH_U8500) || \ |
1540 | defined(CONFIG_ARCH_U5500) | 1535 | defined(CONFIG_ARCH_U5500) |
1541 | 1536 | ||
@@ -1876,10 +1871,9 @@ allocate_instance(struct device *dev, | |||
1876 | musb = kzalloc(sizeof *musb, GFP_KERNEL); | 1871 | musb = kzalloc(sizeof *musb, GFP_KERNEL); |
1877 | if (!musb) | 1872 | if (!musb) |
1878 | return NULL; | 1873 | return NULL; |
1879 | dev_set_drvdata(dev, musb); | ||
1880 | 1874 | ||
1881 | #endif | 1875 | #endif |
1882 | 1876 | dev_set_drvdata(dev, musb); | |
1883 | musb->mregs = mbase; | 1877 | musb->mregs = mbase; |
1884 | musb->ctrl_base = mbase; | 1878 | musb->ctrl_base = mbase; |
1885 | musb->nIrq = -ENODEV; | 1879 | musb->nIrq = -ENODEV; |
@@ -2191,7 +2185,7 @@ static int __init musb_probe(struct platform_device *pdev) | |||
2191 | void __iomem *base; | 2185 | void __iomem *base; |
2192 | 2186 | ||
2193 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 2187 | iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
2194 | if (!iomem || irq == 0) | 2188 | if (!iomem || irq <= 0) |
2195 | return -ENODEV; | 2189 | return -ENODEV; |
2196 | 2190 | ||
2197 | base = ioremap(iomem->start, resource_size(iomem)); | 2191 | base = ioremap(iomem->start, resource_size(iomem)); |
diff --git a/drivers/usb/musb/musb_core.h b/drivers/usb/musb/musb_core.h index d0c236f8e191..07075c39a3d5 100644 --- a/drivers/usb/musb/musb_core.h +++ b/drivers/usb/musb/musb_core.h | |||
@@ -212,8 +212,8 @@ enum musb_g_ep0_state { | |||
212 | * directly with the "flat" model, or after setting up an index register. | 212 | * directly with the "flat" model, or after setting up an index register. |
213 | */ | 213 | */ |
214 | 214 | ||
215 | #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_ARCH_OMAP2430) \ | 215 | #if defined(CONFIG_ARCH_DAVINCI) || defined(CONFIG_SOC_OMAP2430) \ |
216 | || defined(CONFIG_ARCH_OMAP3430) || defined(CONFIG_BLACKFIN) \ | 216 | || defined(CONFIG_SOC_OMAP3430) || defined(CONFIG_BLACKFIN) \ |
217 | || defined(CONFIG_ARCH_OMAP4) | 217 | || defined(CONFIG_ARCH_OMAP4) |
218 | /* REVISIT indexed access seemed to | 218 | /* REVISIT indexed access seemed to |
219 | * misbehave (on DaVinci) for at least peripheral IN ... | 219 | * misbehave (on DaVinci) for at least peripheral IN ... |
@@ -358,7 +358,7 @@ struct musb_csr_regs { | |||
358 | 358 | ||
359 | struct musb_context_registers { | 359 | struct musb_context_registers { |
360 | 360 | ||
361 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ | 361 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \ |
362 | defined(CONFIG_ARCH_OMAP4) | 362 | defined(CONFIG_ARCH_OMAP4) |
363 | u32 otg_sysconfig, otg_forcestandby; | 363 | u32 otg_sysconfig, otg_forcestandby; |
364 | #endif | 364 | #endif |
@@ -488,6 +488,18 @@ struct musb { | |||
488 | unsigned set_address:1; | 488 | unsigned set_address:1; |
489 | unsigned test_mode:1; | 489 | unsigned test_mode:1; |
490 | unsigned softconnect:1; | 490 | unsigned softconnect:1; |
491 | /* | ||
492 | * FIXME: Remove this flag. | ||
493 | * | ||
494 | * This is only added to allow Blackfin to work | ||
495 | * with current driver. For some unknown reason | ||
496 | * Blackfin doesn't work with double buffering | ||
497 | * and that's enabled by default. | ||
498 | * | ||
499 | * We added this flag to forcefully disable double | ||
500 | * buffering until we get it working. | ||
501 | */ | ||
502 | unsigned double_buffer_not_ok:1 __deprecated; | ||
491 | 503 | ||
492 | u8 address; | 504 | u8 address; |
493 | u8 test_mode_nr; | 505 | u8 test_mode_nr; |
diff --git a/drivers/usb/musb/musb_dma.h b/drivers/usb/musb/musb_dma.h index 916065ba9e70..3a97c4e2d4f5 100644 --- a/drivers/usb/musb/musb_dma.h +++ b/drivers/usb/musb/musb_dma.h | |||
@@ -169,6 +169,9 @@ struct dma_controller { | |||
169 | dma_addr_t dma_addr, | 169 | dma_addr_t dma_addr, |
170 | u32 length); | 170 | u32 length); |
171 | int (*channel_abort)(struct dma_channel *); | 171 | int (*channel_abort)(struct dma_channel *); |
172 | int (*is_compatible)(struct dma_channel *channel, | ||
173 | u16 maxpacket, | ||
174 | void *buf, u32 length); | ||
172 | }; | 175 | }; |
173 | 176 | ||
174 | /* called after channel_program(), may indicate a fault */ | 177 | /* called after channel_program(), may indicate a fault */ |
diff --git a/drivers/usb/musb/musb_gadget.c b/drivers/usb/musb/musb_gadget.c index ed58c6c8f15c..2fe304611dcf 100644 --- a/drivers/usb/musb/musb_gadget.c +++ b/drivers/usb/musb/musb_gadget.c | |||
@@ -92,11 +92,33 @@ | |||
92 | 92 | ||
93 | /* ----------------------------------------------------------------------- */ | 93 | /* ----------------------------------------------------------------------- */ |
94 | 94 | ||
95 | #define is_buffer_mapped(req) (is_dma_capable() && \ | ||
96 | (req->map_state != UN_MAPPED)) | ||
97 | |||
95 | /* Maps the buffer to dma */ | 98 | /* Maps the buffer to dma */ |
96 | 99 | ||
97 | static inline void map_dma_buffer(struct musb_request *request, | 100 | static inline void map_dma_buffer(struct musb_request *request, |
98 | struct musb *musb) | 101 | struct musb *musb, struct musb_ep *musb_ep) |
99 | { | 102 | { |
103 | int compatible = true; | ||
104 | struct dma_controller *dma = musb->dma_controller; | ||
105 | |||
106 | request->map_state = UN_MAPPED; | ||
107 | |||
108 | if (!is_dma_capable() || !musb_ep->dma) | ||
109 | return; | ||
110 | |||
111 | /* Check if DMA engine can handle this request. | ||
112 | * DMA code must reject the USB request explicitly. | ||
113 | * Default behaviour is to map the request. | ||
114 | */ | ||
115 | if (dma->is_compatible) | ||
116 | compatible = dma->is_compatible(musb_ep->dma, | ||
117 | musb_ep->packet_sz, request->request.buf, | ||
118 | request->request.length); | ||
119 | if (!compatible) | ||
120 | return; | ||
121 | |||
100 | if (request->request.dma == DMA_ADDR_INVALID) { | 122 | if (request->request.dma == DMA_ADDR_INVALID) { |
101 | request->request.dma = dma_map_single( | 123 | request->request.dma = dma_map_single( |
102 | musb->controller, | 124 | musb->controller, |
@@ -105,7 +127,7 @@ static inline void map_dma_buffer(struct musb_request *request, | |||
105 | request->tx | 127 | request->tx |
106 | ? DMA_TO_DEVICE | 128 | ? DMA_TO_DEVICE |
107 | : DMA_FROM_DEVICE); | 129 | : DMA_FROM_DEVICE); |
108 | request->mapped = 1; | 130 | request->map_state = MUSB_MAPPED; |
109 | } else { | 131 | } else { |
110 | dma_sync_single_for_device(musb->controller, | 132 | dma_sync_single_for_device(musb->controller, |
111 | request->request.dma, | 133 | request->request.dma, |
@@ -113,7 +135,7 @@ static inline void map_dma_buffer(struct musb_request *request, | |||
113 | request->tx | 135 | request->tx |
114 | ? DMA_TO_DEVICE | 136 | ? DMA_TO_DEVICE |
115 | : DMA_FROM_DEVICE); | 137 | : DMA_FROM_DEVICE); |
116 | request->mapped = 0; | 138 | request->map_state = PRE_MAPPED; |
117 | } | 139 | } |
118 | } | 140 | } |
119 | 141 | ||
@@ -121,11 +143,14 @@ static inline void map_dma_buffer(struct musb_request *request, | |||
121 | static inline void unmap_dma_buffer(struct musb_request *request, | 143 | static inline void unmap_dma_buffer(struct musb_request *request, |
122 | struct musb *musb) | 144 | struct musb *musb) |
123 | { | 145 | { |
146 | if (!is_buffer_mapped(request)) | ||
147 | return; | ||
148 | |||
124 | if (request->request.dma == DMA_ADDR_INVALID) { | 149 | if (request->request.dma == DMA_ADDR_INVALID) { |
125 | DBG(20, "not unmapping a never mapped buffer\n"); | 150 | DBG(20, "not unmapping a never mapped buffer\n"); |
126 | return; | 151 | return; |
127 | } | 152 | } |
128 | if (request->mapped) { | 153 | if (request->map_state == MUSB_MAPPED) { |
129 | dma_unmap_single(musb->controller, | 154 | dma_unmap_single(musb->controller, |
130 | request->request.dma, | 155 | request->request.dma, |
131 | request->request.length, | 156 | request->request.length, |
@@ -133,16 +158,15 @@ static inline void unmap_dma_buffer(struct musb_request *request, | |||
133 | ? DMA_TO_DEVICE | 158 | ? DMA_TO_DEVICE |
134 | : DMA_FROM_DEVICE); | 159 | : DMA_FROM_DEVICE); |
135 | request->request.dma = DMA_ADDR_INVALID; | 160 | request->request.dma = DMA_ADDR_INVALID; |
136 | request->mapped = 0; | 161 | } else { /* PRE_MAPPED */ |
137 | } else { | ||
138 | dma_sync_single_for_cpu(musb->controller, | 162 | dma_sync_single_for_cpu(musb->controller, |
139 | request->request.dma, | 163 | request->request.dma, |
140 | request->request.length, | 164 | request->request.length, |
141 | request->tx | 165 | request->tx |
142 | ? DMA_TO_DEVICE | 166 | ? DMA_TO_DEVICE |
143 | : DMA_FROM_DEVICE); | 167 | : DMA_FROM_DEVICE); |
144 | |||
145 | } | 168 | } |
169 | request->map_state = UN_MAPPED; | ||
146 | } | 170 | } |
147 | 171 | ||
148 | /* | 172 | /* |
@@ -172,8 +196,7 @@ __acquires(ep->musb->lock) | |||
172 | 196 | ||
173 | ep->busy = 1; | 197 | ep->busy = 1; |
174 | spin_unlock(&musb->lock); | 198 | spin_unlock(&musb->lock); |
175 | if (is_dma_capable() && ep->dma) | 199 | unmap_dma_buffer(req, musb); |
176 | unmap_dma_buffer(req, musb); | ||
177 | if (request->status == 0) | 200 | if (request->status == 0) |
178 | DBG(5, "%s done request %p, %d/%d\n", | 201 | DBG(5, "%s done request %p, %d/%d\n", |
179 | ep->end_point.name, request, | 202 | ep->end_point.name, request, |
@@ -335,7 +358,7 @@ static void txstate(struct musb *musb, struct musb_request *req) | |||
335 | csr); | 358 | csr); |
336 | 359 | ||
337 | #ifndef CONFIG_MUSB_PIO_ONLY | 360 | #ifndef CONFIG_MUSB_PIO_ONLY |
338 | if (is_dma_capable() && musb_ep->dma) { | 361 | if (is_buffer_mapped(req)) { |
339 | struct dma_controller *c = musb->dma_controller; | 362 | struct dma_controller *c = musb->dma_controller; |
340 | size_t request_size; | 363 | size_t request_size; |
341 | 364 | ||
@@ -436,8 +459,7 @@ static void txstate(struct musb *musb, struct musb_request *req) | |||
436 | * Unmap the dma buffer back to cpu if dma channel | 459 | * Unmap the dma buffer back to cpu if dma channel |
437 | * programming fails | 460 | * programming fails |
438 | */ | 461 | */ |
439 | if (is_dma_capable() && musb_ep->dma) | 462 | unmap_dma_buffer(req, musb); |
440 | unmap_dma_buffer(req, musb); | ||
441 | 463 | ||
442 | musb_write_fifo(musb_ep->hw_ep, fifo_count, | 464 | musb_write_fifo(musb_ep->hw_ep, fifo_count, |
443 | (u8 *) (request->buf + request->actual)); | 465 | (u8 *) (request->buf + request->actual)); |
@@ -627,7 +649,7 @@ static void rxstate(struct musb *musb, struct musb_request *req) | |||
627 | return; | 649 | return; |
628 | } | 650 | } |
629 | 651 | ||
630 | if (is_cppi_enabled() && musb_ep->dma) { | 652 | if (is_cppi_enabled() && is_buffer_mapped(req)) { |
631 | struct dma_controller *c = musb->dma_controller; | 653 | struct dma_controller *c = musb->dma_controller; |
632 | struct dma_channel *channel = musb_ep->dma; | 654 | struct dma_channel *channel = musb_ep->dma; |
633 | 655 | ||
@@ -658,7 +680,7 @@ static void rxstate(struct musb *musb, struct musb_request *req) | |||
658 | len = musb_readw(epio, MUSB_RXCOUNT); | 680 | len = musb_readw(epio, MUSB_RXCOUNT); |
659 | if (request->actual < request->length) { | 681 | if (request->actual < request->length) { |
660 | #ifdef CONFIG_USB_INVENTRA_DMA | 682 | #ifdef CONFIG_USB_INVENTRA_DMA |
661 | if (is_dma_capable() && musb_ep->dma) { | 683 | if (is_buffer_mapped(req)) { |
662 | struct dma_controller *c; | 684 | struct dma_controller *c; |
663 | struct dma_channel *channel; | 685 | struct dma_channel *channel; |
664 | int use_dma = 0; | 686 | int use_dma = 0; |
@@ -742,7 +764,7 @@ static void rxstate(struct musb *musb, struct musb_request *req) | |||
742 | fifo_count = min_t(unsigned, len, fifo_count); | 764 | fifo_count = min_t(unsigned, len, fifo_count); |
743 | 765 | ||
744 | #ifdef CONFIG_USB_TUSB_OMAP_DMA | 766 | #ifdef CONFIG_USB_TUSB_OMAP_DMA |
745 | if (tusb_dma_omap() && musb_ep->dma) { | 767 | if (tusb_dma_omap() && is_buffer_mapped(req)) { |
746 | struct dma_controller *c = musb->dma_controller; | 768 | struct dma_controller *c = musb->dma_controller; |
747 | struct dma_channel *channel = musb_ep->dma; | 769 | struct dma_channel *channel = musb_ep->dma; |
748 | u32 dma_addr = request->dma + request->actual; | 770 | u32 dma_addr = request->dma + request->actual; |
@@ -762,7 +784,7 @@ static void rxstate(struct musb *musb, struct musb_request *req) | |||
762 | * programming fails. This buffer is mapped if the | 784 | * programming fails. This buffer is mapped if the |
763 | * channel allocation is successful | 785 | * channel allocation is successful |
764 | */ | 786 | */ |
765 | if (is_dma_capable() && musb_ep->dma) { | 787 | if (is_buffer_mapped(req)) { |
766 | unmap_dma_buffer(req, musb); | 788 | unmap_dma_buffer(req, musb); |
767 | 789 | ||
768 | /* | 790 | /* |
@@ -989,7 +1011,11 @@ static int musb_gadget_enable(struct usb_ep *ep, | |||
989 | /* Set TXMAXP with the FIFO size of the endpoint | 1011 | /* Set TXMAXP with the FIFO size of the endpoint |
990 | * to disable double buffering mode. | 1012 | * to disable double buffering mode. |
991 | */ | 1013 | */ |
992 | musb_writew(regs, MUSB_TXMAXP, musb_ep->packet_sz | (musb_ep->hb_mult << 11)); | 1014 | if (musb->double_buffer_not_ok) |
1015 | musb_writew(regs, MUSB_TXMAXP, hw_ep->max_packet_sz_tx); | ||
1016 | else | ||
1017 | musb_writew(regs, MUSB_TXMAXP, musb_ep->packet_sz | ||
1018 | | (musb_ep->hb_mult << 11)); | ||
993 | 1019 | ||
994 | csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG; | 1020 | csr = MUSB_TXCSR_MODE | MUSB_TXCSR_CLRDATATOG; |
995 | if (musb_readw(regs, MUSB_TXCSR) | 1021 | if (musb_readw(regs, MUSB_TXCSR) |
@@ -1025,7 +1051,11 @@ static int musb_gadget_enable(struct usb_ep *ep, | |||
1025 | /* Set RXMAXP with the FIFO size of the endpoint | 1051 | /* Set RXMAXP with the FIFO size of the endpoint |
1026 | * to disable double buffering mode. | 1052 | * to disable double buffering mode. |
1027 | */ | 1053 | */ |
1028 | musb_writew(regs, MUSB_RXMAXP, musb_ep->packet_sz | (musb_ep->hb_mult << 11)); | 1054 | if (musb->double_buffer_not_ok) |
1055 | musb_writew(regs, MUSB_RXMAXP, hw_ep->max_packet_sz_tx); | ||
1056 | else | ||
1057 | musb_writew(regs, MUSB_RXMAXP, musb_ep->packet_sz | ||
1058 | | (musb_ep->hb_mult << 11)); | ||
1029 | 1059 | ||
1030 | /* force shared fifo to OUT-only mode */ | 1060 | /* force shared fifo to OUT-only mode */ |
1031 | if (hw_ep->is_shared_fifo) { | 1061 | if (hw_ep->is_shared_fifo) { |
@@ -1214,10 +1244,7 @@ static int musb_gadget_queue(struct usb_ep *ep, struct usb_request *req, | |||
1214 | request->epnum = musb_ep->current_epnum; | 1244 | request->epnum = musb_ep->current_epnum; |
1215 | request->tx = musb_ep->is_in; | 1245 | request->tx = musb_ep->is_in; |
1216 | 1246 | ||
1217 | if (is_dma_capable() && musb_ep->dma) | 1247 | map_dma_buffer(request, musb, musb_ep); |
1218 | map_dma_buffer(request, musb); | ||
1219 | else | ||
1220 | request->mapped = 0; | ||
1221 | 1248 | ||
1222 | spin_lock_irqsave(&musb->lock, lockflags); | 1249 | spin_lock_irqsave(&musb->lock, lockflags); |
1223 | 1250 | ||
diff --git a/drivers/usb/musb/musb_gadget.h b/drivers/usb/musb/musb_gadget.h index dec8dc008191..a55354fbccf5 100644 --- a/drivers/usb/musb/musb_gadget.h +++ b/drivers/usb/musb/musb_gadget.h | |||
@@ -35,13 +35,19 @@ | |||
35 | #ifndef __MUSB_GADGET_H | 35 | #ifndef __MUSB_GADGET_H |
36 | #define __MUSB_GADGET_H | 36 | #define __MUSB_GADGET_H |
37 | 37 | ||
38 | enum buffer_map_state { | ||
39 | UN_MAPPED = 0, | ||
40 | PRE_MAPPED, | ||
41 | MUSB_MAPPED | ||
42 | }; | ||
43 | |||
38 | struct musb_request { | 44 | struct musb_request { |
39 | struct usb_request request; | 45 | struct usb_request request; |
40 | struct musb_ep *ep; | 46 | struct musb_ep *ep; |
41 | struct musb *musb; | 47 | struct musb *musb; |
42 | u8 tx; /* endpoint direction */ | 48 | u8 tx; /* endpoint direction */ |
43 | u8 epnum; | 49 | u8 epnum; |
44 | u8 mapped; | 50 | enum buffer_map_state map_state; |
45 | }; | 51 | }; |
46 | 52 | ||
47 | static inline struct musb_request *to_musb_request(struct usb_request *req) | 53 | static inline struct musb_request *to_musb_request(struct usb_request *req) |
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c index 4d5bcb4e14d2..0f523d7db57b 100644 --- a/drivers/usb/musb/musb_host.c +++ b/drivers/usb/musb/musb_host.c | |||
@@ -609,7 +609,7 @@ musb_rx_reinit(struct musb *musb, struct musb_qh *qh, struct musb_hw_ep *ep) | |||
609 | /* Set RXMAXP with the FIFO size of the endpoint | 609 | /* Set RXMAXP with the FIFO size of the endpoint |
610 | * to disable double buffer mode. | 610 | * to disable double buffer mode. |
611 | */ | 611 | */ |
612 | if (musb->hwvers < MUSB_HWVERS_2000) | 612 | if (musb->double_buffer_not_ok) |
613 | musb_writew(ep->regs, MUSB_RXMAXP, ep->max_packet_sz_rx); | 613 | musb_writew(ep->regs, MUSB_RXMAXP, ep->max_packet_sz_rx); |
614 | else | 614 | else |
615 | musb_writew(ep->regs, MUSB_RXMAXP, | 615 | musb_writew(ep->regs, MUSB_RXMAXP, |
@@ -784,14 +784,13 @@ static void musb_ep_program(struct musb *musb, u8 epnum, | |||
784 | /* protocol/endpoint/interval/NAKlimit */ | 784 | /* protocol/endpoint/interval/NAKlimit */ |
785 | if (epnum) { | 785 | if (epnum) { |
786 | musb_writeb(epio, MUSB_TXTYPE, qh->type_reg); | 786 | musb_writeb(epio, MUSB_TXTYPE, qh->type_reg); |
787 | if (can_bulk_split(musb, qh->type)) | 787 | if (musb->double_buffer_not_ok) |
788 | musb_writew(epio, MUSB_TXMAXP, | 788 | musb_writew(epio, MUSB_TXMAXP, |
789 | packet_sz | 789 | hw_ep->max_packet_sz_tx); |
790 | | ((hw_ep->max_packet_sz_tx / | ||
791 | packet_sz) - 1) << 11); | ||
792 | else | 790 | else |
793 | musb_writew(epio, MUSB_TXMAXP, | 791 | musb_writew(epio, MUSB_TXMAXP, |
794 | packet_sz); | 792 | qh->maxpacket | |
793 | ((qh->hb_mult - 1) << 11)); | ||
795 | musb_writeb(epio, MUSB_TXINTERVAL, qh->intv_reg); | 794 | musb_writeb(epio, MUSB_TXINTERVAL, qh->intv_reg); |
796 | } else { | 795 | } else { |
797 | musb_writeb(epio, MUSB_NAKLIMIT0, qh->intv_reg); | 796 | musb_writeb(epio, MUSB_NAKLIMIT0, qh->intv_reg); |
diff --git a/drivers/usb/musb/musbhsdma.h b/drivers/usb/musb/musbhsdma.h index f763d62f151c..320fd4afb93f 100644 --- a/drivers/usb/musb/musbhsdma.h +++ b/drivers/usb/musb/musbhsdma.h | |||
@@ -31,7 +31,7 @@ | |||
31 | * | 31 | * |
32 | */ | 32 | */ |
33 | 33 | ||
34 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430) | 34 | #if defined(CONFIG_SOC_OMAP2430) || defined(CONFIG_SOC_OMAP3430) |
35 | #include "omap2430.h" | 35 | #include "omap2430.h" |
36 | #endif | 36 | #endif |
37 | 37 | ||
@@ -94,24 +94,33 @@ static inline void musb_write_hsdma_addr(void __iomem *mbase, | |||
94 | { | 94 | { |
95 | musb_writew(mbase, | 95 | musb_writew(mbase, |
96 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDR_LOW), | 96 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDR_LOW), |
97 | ((u16)((u32) dma_addr & 0xFFFF))); | 97 | dma_addr); |
98 | musb_writew(mbase, | 98 | musb_writew(mbase, |
99 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDR_HIGH), | 99 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_ADDR_HIGH), |
100 | ((u16)(((u32) dma_addr >> 16) & 0xFFFF))); | 100 | (dma_addr >> 16)); |
101 | } | 101 | } |
102 | 102 | ||
103 | static inline u32 musb_read_hsdma_count(void __iomem *mbase, u8 bchannel) | 103 | static inline u32 musb_read_hsdma_count(void __iomem *mbase, u8 bchannel) |
104 | { | 104 | { |
105 | return musb_readl(mbase, | 105 | u32 count = musb_readw(mbase, |
106 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT_HIGH)); | 106 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT_HIGH)); |
107 | |||
108 | count = count << 16; | ||
109 | |||
110 | count |= musb_readw(mbase, | ||
111 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT_LOW)); | ||
112 | |||
113 | return count; | ||
107 | } | 114 | } |
108 | 115 | ||
109 | static inline void musb_write_hsdma_count(void __iomem *mbase, | 116 | static inline void musb_write_hsdma_count(void __iomem *mbase, |
110 | u8 bchannel, u32 len) | 117 | u8 bchannel, u32 len) |
111 | { | 118 | { |
112 | musb_writel(mbase, | 119 | musb_writew(mbase, |
120 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT_LOW),len); | ||
121 | musb_writew(mbase, | ||
113 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT_HIGH), | 122 | MUSB_HSDMA_CHANNEL_OFFSET(bchannel, MUSB_HSDMA_COUNT_HIGH), |
114 | len); | 123 | (len >> 16)); |
115 | } | 124 | } |
116 | 125 | ||
117 | #endif /* CONFIG_BLACKFIN */ | 126 | #endif /* CONFIG_BLACKFIN */ |
diff --git a/drivers/usb/otg/Kconfig b/drivers/usb/otg/Kconfig index 9fb875d5f09c..9ffc8237fb4b 100644 --- a/drivers/usb/otg/Kconfig +++ b/drivers/usb/otg/Kconfig | |||
@@ -103,6 +103,8 @@ config USB_MSM_OTG_72K | |||
103 | required after resetting the hardware and power management. | 103 | required after resetting the hardware and power management. |
104 | This driver is required even for peripheral only or host only | 104 | This driver is required even for peripheral only or host only |
105 | mode configurations. | 105 | mode configurations. |
106 | This driver is not supported on boards like trout which | ||
107 | has an external PHY. | ||
106 | 108 | ||
107 | config AB8500_USB | 109 | config AB8500_USB |
108 | tristate "AB8500 USB Transceiver Driver" | 110 | tristate "AB8500 USB Transceiver Driver" |
diff --git a/drivers/usb/otg/isp1301_omap.c b/drivers/usb/otg/isp1301_omap.c index e00fa1b22ecd..8c6fdef61d1c 100644 --- a/drivers/usb/otg/isp1301_omap.c +++ b/drivers/usb/otg/isp1301_omap.c | |||
@@ -1510,7 +1510,7 @@ isp1301_start_hnp(struct otg_transceiver *dev) | |||
1510 | 1510 | ||
1511 | /*-------------------------------------------------------------------------*/ | 1511 | /*-------------------------------------------------------------------------*/ |
1512 | 1512 | ||
1513 | static int __init | 1513 | static int __devinit |
1514 | isp1301_probe(struct i2c_client *i2c, const struct i2c_device_id *id) | 1514 | isp1301_probe(struct i2c_client *i2c, const struct i2c_device_id *id) |
1515 | { | 1515 | { |
1516 | int status; | 1516 | int status; |
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c index 4787c0cd063f..f349a3629d00 100644 --- a/drivers/usb/serial/ftdi_sio.c +++ b/drivers/usb/serial/ftdi_sio.c | |||
@@ -100,6 +100,7 @@ struct ftdi_sio_quirk { | |||
100 | static int ftdi_jtag_probe(struct usb_serial *serial); | 100 | static int ftdi_jtag_probe(struct usb_serial *serial); |
101 | static int ftdi_mtxorb_hack_setup(struct usb_serial *serial); | 101 | static int ftdi_mtxorb_hack_setup(struct usb_serial *serial); |
102 | static int ftdi_NDI_device_setup(struct usb_serial *serial); | 102 | static int ftdi_NDI_device_setup(struct usb_serial *serial); |
103 | static int ftdi_stmclite_probe(struct usb_serial *serial); | ||
103 | static void ftdi_USB_UIRT_setup(struct ftdi_private *priv); | 104 | static void ftdi_USB_UIRT_setup(struct ftdi_private *priv); |
104 | static void ftdi_HE_TIRA1_setup(struct ftdi_private *priv); | 105 | static void ftdi_HE_TIRA1_setup(struct ftdi_private *priv); |
105 | 106 | ||
@@ -123,6 +124,10 @@ static struct ftdi_sio_quirk ftdi_HE_TIRA1_quirk = { | |||
123 | .port_probe = ftdi_HE_TIRA1_setup, | 124 | .port_probe = ftdi_HE_TIRA1_setup, |
124 | }; | 125 | }; |
125 | 126 | ||
127 | static struct ftdi_sio_quirk ftdi_stmclite_quirk = { | ||
128 | .probe = ftdi_stmclite_probe, | ||
129 | }; | ||
130 | |||
126 | /* | 131 | /* |
127 | * The 8U232AM has the same API as the sio except for: | 132 | * The 8U232AM has the same API as the sio except for: |
128 | * - it can support MUCH higher baudrates; up to: | 133 | * - it can support MUCH higher baudrates; up to: |
@@ -616,6 +621,7 @@ static struct usb_device_id id_table_combined [] = { | |||
616 | { USB_DEVICE(FTDI_VID, FTDI_OCEANIC_PID) }, | 621 | { USB_DEVICE(FTDI_VID, FTDI_OCEANIC_PID) }, |
617 | { USB_DEVICE(TTI_VID, TTI_QL355P_PID) }, | 622 | { USB_DEVICE(TTI_VID, TTI_QL355P_PID) }, |
618 | { USB_DEVICE(FTDI_VID, FTDI_RM_CANVIEW_PID) }, | 623 | { USB_DEVICE(FTDI_VID, FTDI_RM_CANVIEW_PID) }, |
624 | { USB_DEVICE(ACTON_VID, ACTON_SPECTRAPRO_PID) }, | ||
619 | { USB_DEVICE(CONTEC_VID, CONTEC_COM1USBH_PID) }, | 625 | { USB_DEVICE(CONTEC_VID, CONTEC_COM1USBH_PID) }, |
620 | { USB_DEVICE(BANDB_VID, BANDB_USOTL4_PID) }, | 626 | { USB_DEVICE(BANDB_VID, BANDB_USOTL4_PID) }, |
621 | { USB_DEVICE(BANDB_VID, BANDB_USTL4_PID) }, | 627 | { USB_DEVICE(BANDB_VID, BANDB_USTL4_PID) }, |
@@ -810,6 +816,8 @@ static struct usb_device_id id_table_combined [] = { | |||
810 | { USB_DEVICE(FTDI_VID, FTDI_DOTEC_PID) }, | 816 | { USB_DEVICE(FTDI_VID, FTDI_DOTEC_PID) }, |
811 | { USB_DEVICE(QIHARDWARE_VID, MILKYMISTONE_JTAGSERIAL_PID), | 817 | { USB_DEVICE(QIHARDWARE_VID, MILKYMISTONE_JTAGSERIAL_PID), |
812 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, | 818 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, |
819 | { USB_DEVICE(ST_VID, ST_STMCLT1030_PID), | ||
820 | .driver_info = (kernel_ulong_t)&ftdi_stmclite_quirk }, | ||
813 | { }, /* Optional parameter entry */ | 821 | { }, /* Optional parameter entry */ |
814 | { } /* Terminating entry */ | 822 | { } /* Terminating entry */ |
815 | }; | 823 | }; |
@@ -1709,6 +1717,25 @@ static int ftdi_jtag_probe(struct usb_serial *serial) | |||
1709 | } | 1717 | } |
1710 | 1718 | ||
1711 | /* | 1719 | /* |
1720 | * First and second port on STMCLiteadaptors is reserved for JTAG interface | ||
1721 | * and the forth port for pio | ||
1722 | */ | ||
1723 | static int ftdi_stmclite_probe(struct usb_serial *serial) | ||
1724 | { | ||
1725 | struct usb_device *udev = serial->dev; | ||
1726 | struct usb_interface *interface = serial->interface; | ||
1727 | |||
1728 | dbg("%s", __func__); | ||
1729 | |||
1730 | if (interface == udev->actconfig->interface[2]) | ||
1731 | return 0; | ||
1732 | |||
1733 | dev_info(&udev->dev, "Ignoring serial port reserved for JTAG\n"); | ||
1734 | |||
1735 | return -ENODEV; | ||
1736 | } | ||
1737 | |||
1738 | /* | ||
1712 | * The Matrix Orbital VK204-25-USB has an invalid IN endpoint. | 1739 | * The Matrix Orbital VK204-25-USB has an invalid IN endpoint. |
1713 | * We have to correct it if we want to read from it. | 1740 | * We have to correct it if we want to read from it. |
1714 | */ | 1741 | */ |
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h index ed160def8584..117e8e6f93c6 100644 --- a/drivers/usb/serial/ftdi_sio_ids.h +++ b/drivers/usb/serial/ftdi_sio_ids.h | |||
@@ -518,6 +518,12 @@ | |||
518 | #define RATOC_PRODUCT_ID_USB60F 0xb020 | 518 | #define RATOC_PRODUCT_ID_USB60F 0xb020 |
519 | 519 | ||
520 | /* | 520 | /* |
521 | * Acton Research Corp. | ||
522 | */ | ||
523 | #define ACTON_VID 0x0647 /* Vendor ID */ | ||
524 | #define ACTON_SPECTRAPRO_PID 0x0100 | ||
525 | |||
526 | /* | ||
521 | * Contec products (http://www.contec.com) | 527 | * Contec products (http://www.contec.com) |
522 | * Submitted by Daniel Sangorrin | 528 | * Submitted by Daniel Sangorrin |
523 | */ | 529 | */ |
@@ -1034,6 +1040,12 @@ | |||
1034 | #define WHT_PID 0x0004 /* Wireless Handheld Terminal */ | 1040 | #define WHT_PID 0x0004 /* Wireless Handheld Terminal */ |
1035 | 1041 | ||
1036 | /* | 1042 | /* |
1043 | * STMicroelectonics | ||
1044 | */ | ||
1045 | #define ST_VID 0x0483 | ||
1046 | #define ST_STMCLT1030_PID 0x3747 /* ST Micro Connect Lite STMCLT1030 */ | ||
1047 | |||
1048 | /* | ||
1037 | * Papouch products (http://www.papouch.com/) | 1049 | * Papouch products (http://www.papouch.com/) |
1038 | * Submitted by Folkert van Heusden | 1050 | * Submitted by Folkert van Heusden |
1039 | */ | 1051 | */ |
diff --git a/drivers/usb/serial/io_edgeport.c b/drivers/usb/serial/io_edgeport.c index cd769ef24f8a..3b246d93cf22 100644 --- a/drivers/usb/serial/io_edgeport.c +++ b/drivers/usb/serial/io_edgeport.c | |||
@@ -2889,8 +2889,8 @@ static void load_application_firmware(struct edgeport_serial *edge_serial) | |||
2889 | 2889 | ||
2890 | dbg("%s %d.%d.%d", fw_info, rec->data[0], rec->data[1], build); | 2890 | dbg("%s %d.%d.%d", fw_info, rec->data[0], rec->data[1], build); |
2891 | 2891 | ||
2892 | edge_serial->product_info.FirmwareMajorVersion = fw->data[0]; | 2892 | edge_serial->product_info.FirmwareMajorVersion = rec->data[0]; |
2893 | edge_serial->product_info.FirmwareMinorVersion = fw->data[1]; | 2893 | edge_serial->product_info.FirmwareMinorVersion = rec->data[1]; |
2894 | edge_serial->product_info.FirmwareBuildNumber = cpu_to_le16(build); | 2894 | edge_serial->product_info.FirmwareBuildNumber = cpu_to_le16(build); |
2895 | 2895 | ||
2896 | for (rec = ihex_next_binrec(rec); rec; | 2896 | for (rec = ihex_next_binrec(rec); rec; |
diff --git a/drivers/usb/serial/ti_usb_3410_5052.c b/drivers/usb/serial/ti_usb_3410_5052.c index b2902f307b47..a910004f4079 100644 --- a/drivers/usb/serial/ti_usb_3410_5052.c +++ b/drivers/usb/serial/ti_usb_3410_5052.c | |||
@@ -369,9 +369,9 @@ failed_1port: | |||
369 | 369 | ||
370 | static void __exit ti_exit(void) | 370 | static void __exit ti_exit(void) |
371 | { | 371 | { |
372 | usb_deregister(&ti_usb_driver); | ||
372 | usb_serial_deregister(&ti_1port_device); | 373 | usb_serial_deregister(&ti_1port_device); |
373 | usb_serial_deregister(&ti_2port_device); | 374 | usb_serial_deregister(&ti_2port_device); |
374 | usb_deregister(&ti_usb_driver); | ||
375 | } | 375 | } |
376 | 376 | ||
377 | 377 | ||
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h index 24bd5d7c3deb..c1602b8c5594 100644 --- a/drivers/usb/storage/unusual_devs.h +++ b/drivers/usb/storage/unusual_devs.h | |||
@@ -1397,6 +1397,13 @@ UNUSUAL_DEV( 0x0f19, 0x0105, 0x0100, 0x0100, | |||
1397 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, | 1397 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
1398 | US_FL_IGNORE_RESIDUE ), | 1398 | US_FL_IGNORE_RESIDUE ), |
1399 | 1399 | ||
1400 | /* Submitted by Nick Holloway */ | ||
1401 | UNUSUAL_DEV( 0x0f88, 0x042e, 0x0100, 0x0100, | ||
1402 | "VTech", | ||
1403 | "Kidizoom", | ||
1404 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, | ||
1405 | US_FL_FIX_CAPACITY ), | ||
1406 | |||
1400 | /* Reported by Michael Stattmann <michael@stattmann.com> */ | 1407 | /* Reported by Michael Stattmann <michael@stattmann.com> */ |
1401 | UNUSUAL_DEV( 0x0fce, 0xd008, 0x0000, 0x0000, | 1408 | UNUSUAL_DEV( 0x0fce, 0xd008, 0x0000, 0x0000, |
1402 | "Sony Ericsson", | 1409 | "Sony Ericsson", |
@@ -1890,6 +1897,13 @@ UNUSUAL_DEV( 0x1e68, 0x001b, 0x0000, 0x0000, | |||
1890 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, | 1897 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
1891 | US_FL_IGNORE_RESIDUE | US_FL_SANE_SENSE ), | 1898 | US_FL_IGNORE_RESIDUE | US_FL_SANE_SENSE ), |
1892 | 1899 | ||
1900 | /* Reported by Jasper Mackenzie <scarletpimpernal@hotmail.com> */ | ||
1901 | UNUSUAL_DEV( 0x1e74, 0x4621, 0x0000, 0x0000, | ||
1902 | "Coby Electronics", | ||
1903 | "MP3 Player", | ||
1904 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, | ||
1905 | US_FL_BULK_IGNORE_TAG | US_FL_MAX_SECTORS_64 ), | ||
1906 | |||
1893 | UNUSUAL_DEV( 0x2116, 0x0320, 0x0001, 0x0001, | 1907 | UNUSUAL_DEV( 0x2116, 0x0320, 0x0001, 0x0001, |
1894 | "ST", | 1908 | "ST", |
1895 | "2A", | 1909 | "2A", |
diff --git a/drivers/w1/masters/Kconfig b/drivers/w1/masters/Kconfig index 80b3b123dd7f..7c608c5ccf84 100644 --- a/drivers/w1/masters/Kconfig +++ b/drivers/w1/masters/Kconfig | |||
@@ -60,7 +60,7 @@ config W1_MASTER_GPIO | |||
60 | 60 | ||
61 | config HDQ_MASTER_OMAP | 61 | config HDQ_MASTER_OMAP |
62 | tristate "OMAP HDQ driver" | 62 | tristate "OMAP HDQ driver" |
63 | depends on ARCH_OMAP2430 || ARCH_OMAP3 | 63 | depends on SOC_OMAP2430 || ARCH_OMAP3 |
64 | help | 64 | help |
65 | Say Y here if you want support for the 1-wire or HDQ Interface | 65 | Say Y here if you want support for the 1-wire or HDQ Interface |
66 | on an OMAP processor. | 66 | on an OMAP processor. |
diff --git a/drivers/w1/masters/omap_hdq.c b/drivers/w1/masters/omap_hdq.c index 3a7e9ff8a746..38e96ab90945 100644 --- a/drivers/w1/masters/omap_hdq.c +++ b/drivers/w1/masters/omap_hdq.c | |||
@@ -593,19 +593,17 @@ static int __devinit omap_hdq_probe(struct platform_device *pdev) | |||
593 | 593 | ||
594 | /* get interface & functional clock objects */ | 594 | /* get interface & functional clock objects */ |
595 | hdq_data->hdq_ick = clk_get(&pdev->dev, "ick"); | 595 | hdq_data->hdq_ick = clk_get(&pdev->dev, "ick"); |
596 | hdq_data->hdq_fck = clk_get(&pdev->dev, "fck"); | 596 | if (IS_ERR(hdq_data->hdq_ick)) { |
597 | dev_dbg(&pdev->dev, "Can't get HDQ ick clock object\n"); | ||
598 | ret = PTR_ERR(hdq_data->hdq_ick); | ||
599 | goto err_ick; | ||
600 | } | ||
597 | 601 | ||
598 | if (IS_ERR(hdq_data->hdq_ick) || IS_ERR(hdq_data->hdq_fck)) { | 602 | hdq_data->hdq_fck = clk_get(&pdev->dev, "fck"); |
599 | dev_dbg(&pdev->dev, "Can't get HDQ clock objects\n"); | 603 | if (IS_ERR(hdq_data->hdq_fck)) { |
600 | if (IS_ERR(hdq_data->hdq_ick)) { | 604 | dev_dbg(&pdev->dev, "Can't get HDQ fck clock object\n"); |
601 | ret = PTR_ERR(hdq_data->hdq_ick); | 605 | ret = PTR_ERR(hdq_data->hdq_fck); |
602 | goto err_clk; | 606 | goto err_fck; |
603 | } | ||
604 | if (IS_ERR(hdq_data->hdq_fck)) { | ||
605 | ret = PTR_ERR(hdq_data->hdq_fck); | ||
606 | clk_put(hdq_data->hdq_ick); | ||
607 | goto err_clk; | ||
608 | } | ||
609 | } | 607 | } |
610 | 608 | ||
611 | hdq_data->hdq_usecount = 0; | 609 | hdq_data->hdq_usecount = 0; |
@@ -665,10 +663,12 @@ err_fnclk: | |||
665 | clk_disable(hdq_data->hdq_ick); | 663 | clk_disable(hdq_data->hdq_ick); |
666 | 664 | ||
667 | err_intfclk: | 665 | err_intfclk: |
668 | clk_put(hdq_data->hdq_ick); | ||
669 | clk_put(hdq_data->hdq_fck); | 666 | clk_put(hdq_data->hdq_fck); |
670 | 667 | ||
671 | err_clk: | 668 | err_fck: |
669 | clk_put(hdq_data->hdq_ick); | ||
670 | |||
671 | err_ick: | ||
672 | iounmap(hdq_data->hdq_base); | 672 | iounmap(hdq_data->hdq_base); |
673 | 673 | ||
674 | err_ioremap: | 674 | err_ioremap: |
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 2e2400e7322e..31649b7b672f 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
@@ -862,12 +862,12 @@ config SBC_EPX_C3_WATCHDOG | |||
862 | 862 | ||
863 | # M68K Architecture | 863 | # M68K Architecture |
864 | 864 | ||
865 | config M548x_WATCHDOG | 865 | config M54xx_WATCHDOG |
866 | tristate "MCF548x watchdog support" | 866 | tristate "MCF54xx watchdog support" |
867 | depends on M548x | 867 | depends on M548x |
868 | help | 868 | help |
869 | To compile this driver as a module, choose M here: the | 869 | To compile this driver as a module, choose M here: the |
870 | module will be called m548x_wdt. | 870 | module will be called m54xx_wdt. |
871 | 871 | ||
872 | # MIPS Architecture | 872 | # MIPS Architecture |
873 | 873 | ||
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index dd776651917c..20e44c4782b3 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile | |||
@@ -106,7 +106,7 @@ obj-$(CONFIG_SBC_EPX_C3_WATCHDOG) += sbc_epx_c3.o | |||
106 | # M32R Architecture | 106 | # M32R Architecture |
107 | 107 | ||
108 | # M68K Architecture | 108 | # M68K Architecture |
109 | obj-$(CONFIG_M548x_WATCHDOG) += m548x_wdt.o | 109 | obj-$(CONFIG_M54xx_WATCHDOG) += m54xx_wdt.o |
110 | 110 | ||
111 | # MIPS Architecture | 111 | # MIPS Architecture |
112 | obj-$(CONFIG_ATH79_WDT) += ath79_wdt.o | 112 | obj-$(CONFIG_ATH79_WDT) += ath79_wdt.o |
diff --git a/drivers/watchdog/m548x_wdt.c b/drivers/watchdog/m54xx_wdt.c index cabbcfe1c847..4d43286074aa 100644 --- a/drivers/watchdog/m548x_wdt.c +++ b/drivers/watchdog/m54xx_wdt.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * drivers/watchdog/m548x_wdt.c | 2 | * drivers/watchdog/m54xx_wdt.c |
3 | * | 3 | * |
4 | * Watchdog driver for ColdFire MCF548x processors | 4 | * Watchdog driver for ColdFire MCF547x & MCF548x processors |
5 | * Copyright 2010 (c) Philippe De Muyter <phdm@macqel.be> | 5 | * Copyright 2010 (c) Philippe De Muyter <phdm@macqel.be> |
6 | * | 6 | * |
7 | * Adapted from the IXP4xx watchdog driver, which carries these notices: | 7 | * Adapted from the IXP4xx watchdog driver, which carries these notices: |
@@ -29,8 +29,8 @@ | |||
29 | #include <linux/uaccess.h> | 29 | #include <linux/uaccess.h> |
30 | 30 | ||
31 | #include <asm/coldfire.h> | 31 | #include <asm/coldfire.h> |
32 | #include <asm/m548xsim.h> | 32 | #include <asm/m54xxsim.h> |
33 | #include <asm/m548xgpt.h> | 33 | #include <asm/m54xxgpt.h> |
34 | 34 | ||
35 | static int nowayout = WATCHDOG_NOWAYOUT; | 35 | static int nowayout = WATCHDOG_NOWAYOUT; |
36 | static unsigned int heartbeat = 30; /* (secs) Default is 0.5 minute */ | 36 | static unsigned int heartbeat = 30; /* (secs) Default is 0.5 minute */ |
@@ -76,7 +76,7 @@ static void wdt_keepalive(void) | |||
76 | __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); | 76 | __raw_writel(gms0, MCF_MBAR + MCF_GPT_GMS0); |
77 | } | 77 | } |
78 | 78 | ||
79 | static int m548x_wdt_open(struct inode *inode, struct file *file) | 79 | static int m54xx_wdt_open(struct inode *inode, struct file *file) |
80 | { | 80 | { |
81 | if (test_and_set_bit(WDT_IN_USE, &wdt_status)) | 81 | if (test_and_set_bit(WDT_IN_USE, &wdt_status)) |
82 | return -EBUSY; | 82 | return -EBUSY; |
@@ -86,7 +86,7 @@ static int m548x_wdt_open(struct inode *inode, struct file *file) | |||
86 | return nonseekable_open(inode, file); | 86 | return nonseekable_open(inode, file); |
87 | } | 87 | } |
88 | 88 | ||
89 | static ssize_t m548x_wdt_write(struct file *file, const char *data, | 89 | static ssize_t m54xx_wdt_write(struct file *file, const char *data, |
90 | size_t len, loff_t *ppos) | 90 | size_t len, loff_t *ppos) |
91 | { | 91 | { |
92 | if (len) { | 92 | if (len) { |
@@ -112,10 +112,10 @@ static ssize_t m548x_wdt_write(struct file *file, const char *data, | |||
112 | static const struct watchdog_info ident = { | 112 | static const struct watchdog_info ident = { |
113 | .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | | 113 | .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | |
114 | WDIOF_KEEPALIVEPING, | 114 | WDIOF_KEEPALIVEPING, |
115 | .identity = "Coldfire M548x Watchdog", | 115 | .identity = "Coldfire M54xx Watchdog", |
116 | }; | 116 | }; |
117 | 117 | ||
118 | static long m548x_wdt_ioctl(struct file *file, unsigned int cmd, | 118 | static long m54xx_wdt_ioctl(struct file *file, unsigned int cmd, |
119 | unsigned long arg) | 119 | unsigned long arg) |
120 | { | 120 | { |
121 | int ret = -ENOTTY; | 121 | int ret = -ENOTTY; |
@@ -161,7 +161,7 @@ static long m548x_wdt_ioctl(struct file *file, unsigned int cmd, | |||
161 | return ret; | 161 | return ret; |
162 | } | 162 | } |
163 | 163 | ||
164 | static int m548x_wdt_release(struct inode *inode, struct file *file) | 164 | static int m54xx_wdt_release(struct inode *inode, struct file *file) |
165 | { | 165 | { |
166 | if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) | 166 | if (test_bit(WDT_OK_TO_CLOSE, &wdt_status)) |
167 | wdt_disable(); | 167 | wdt_disable(); |
@@ -177,45 +177,45 @@ static int m548x_wdt_release(struct inode *inode, struct file *file) | |||
177 | } | 177 | } |
178 | 178 | ||
179 | 179 | ||
180 | static const struct file_operations m548x_wdt_fops = { | 180 | static const struct file_operations m54xx_wdt_fops = { |
181 | .owner = THIS_MODULE, | 181 | .owner = THIS_MODULE, |
182 | .llseek = no_llseek, | 182 | .llseek = no_llseek, |
183 | .write = m548x_wdt_write, | 183 | .write = m54xx_wdt_write, |
184 | .unlocked_ioctl = m548x_wdt_ioctl, | 184 | .unlocked_ioctl = m54xx_wdt_ioctl, |
185 | .open = m548x_wdt_open, | 185 | .open = m54xx_wdt_open, |
186 | .release = m548x_wdt_release, | 186 | .release = m54xx_wdt_release, |
187 | }; | 187 | }; |
188 | 188 | ||
189 | static struct miscdevice m548x_wdt_miscdev = { | 189 | static struct miscdevice m54xx_wdt_miscdev = { |
190 | .minor = WATCHDOG_MINOR, | 190 | .minor = WATCHDOG_MINOR, |
191 | .name = "watchdog", | 191 | .name = "watchdog", |
192 | .fops = &m548x_wdt_fops, | 192 | .fops = &m54xx_wdt_fops, |
193 | }; | 193 | }; |
194 | 194 | ||
195 | static int __init m548x_wdt_init(void) | 195 | static int __init m54xx_wdt_init(void) |
196 | { | 196 | { |
197 | if (!request_mem_region(MCF_MBAR + MCF_GPT_GCIR0, 4, | 197 | if (!request_mem_region(MCF_MBAR + MCF_GPT_GCIR0, 4, |
198 | "Coldfire M548x Watchdog")) { | 198 | "Coldfire M54xx Watchdog")) { |
199 | printk(KERN_WARNING | 199 | printk(KERN_WARNING |
200 | "Coldfire M548x Watchdog : I/O region busy\n"); | 200 | "Coldfire M54xx Watchdog : I/O region busy\n"); |
201 | return -EBUSY; | 201 | return -EBUSY; |
202 | } | 202 | } |
203 | printk(KERN_INFO "ColdFire watchdog driver is loaded.\n"); | 203 | printk(KERN_INFO "ColdFire watchdog driver is loaded.\n"); |
204 | 204 | ||
205 | return misc_register(&m548x_wdt_miscdev); | 205 | return misc_register(&m54xx_wdt_miscdev); |
206 | } | 206 | } |
207 | 207 | ||
208 | static void __exit m548x_wdt_exit(void) | 208 | static void __exit m54xx_wdt_exit(void) |
209 | { | 209 | { |
210 | misc_deregister(&m548x_wdt_miscdev); | 210 | misc_deregister(&m54xx_wdt_miscdev); |
211 | release_mem_region(MCF_MBAR + MCF_GPT_GCIR0, 4); | 211 | release_mem_region(MCF_MBAR + MCF_GPT_GCIR0, 4); |
212 | } | 212 | } |
213 | 213 | ||
214 | module_init(m548x_wdt_init); | 214 | module_init(m54xx_wdt_init); |
215 | module_exit(m548x_wdt_exit); | 215 | module_exit(m54xx_wdt_exit); |
216 | 216 | ||
217 | MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>"); | 217 | MODULE_AUTHOR("Philippe De Muyter <phdm@macqel.be>"); |
218 | MODULE_DESCRIPTION("Coldfire M548x Watchdog"); | 218 | MODULE_DESCRIPTION("Coldfire M54xx Watchdog"); |
219 | 219 | ||
220 | module_param(heartbeat, int, 0); | 220 | module_param(heartbeat, int, 0); |
221 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds (default 30s)"); | 221 | MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds (default 30s)"); |