diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/memstick/core/memstick.c | 10 | ||||
-rw-r--r-- | drivers/memstick/core/mspro_block.c | 33 | ||||
-rw-r--r-- | drivers/memstick/host/jmb38x_ms.c | 39 | ||||
-rw-r--r-- | drivers/misc/sgi-gru/grufile.c | 3 | ||||
-rw-r--r-- | drivers/net/niu.c | 56 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/beacon.c | 13 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/core.h | 1 | ||||
-rw-r--r-- | drivers/net/wireless/ath9k/main.c | 14 | ||||
-rw-r--r-- | drivers/pci/hotplug/fakephp.c | 6 | ||||
-rw-r--r-- | drivers/pci/hotplug/pciehp_hpc.c | 2 | ||||
-rw-r--r-- | drivers/pci/intel-iommu.c | 23 | ||||
-rw-r--r-- | drivers/pci/probe.c | 18 | ||||
-rw-r--r-- | drivers/pci/setup-bus.c | 6 | ||||
-rw-r--r-- | drivers/spi/pxa2xx_spi.c | 116 | ||||
-rw-r--r-- | drivers/spi/spi_mpc83xx.c | 26 | ||||
-rw-r--r-- | drivers/spi/spi_s3c24xx.c | 6 | ||||
-rw-r--r-- | drivers/video/atmel_lcdfb.c | 84 |
17 files changed, 350 insertions, 106 deletions
diff --git a/drivers/memstick/core/memstick.c b/drivers/memstick/core/memstick.c index a38005008a20..cea46906408e 100644 --- a/drivers/memstick/core/memstick.c +++ b/drivers/memstick/core/memstick.c | |||
@@ -185,7 +185,7 @@ static void memstick_free(struct device *dev) | |||
185 | } | 185 | } |
186 | 186 | ||
187 | static struct class memstick_host_class = { | 187 | static struct class memstick_host_class = { |
188 | .name = "memstick_host", | 188 | .name = "memstick_host", |
189 | .dev_release = memstick_free | 189 | .dev_release = memstick_free |
190 | }; | 190 | }; |
191 | 191 | ||
@@ -264,7 +264,7 @@ EXPORT_SYMBOL(memstick_new_req); | |||
264 | * @sg - TPC argument | 264 | * @sg - TPC argument |
265 | */ | 265 | */ |
266 | void memstick_init_req_sg(struct memstick_request *mrq, unsigned char tpc, | 266 | void memstick_init_req_sg(struct memstick_request *mrq, unsigned char tpc, |
267 | struct scatterlist *sg) | 267 | const struct scatterlist *sg) |
268 | { | 268 | { |
269 | mrq->tpc = tpc; | 269 | mrq->tpc = tpc; |
270 | if (tpc & 8) | 270 | if (tpc & 8) |
@@ -294,7 +294,7 @@ EXPORT_SYMBOL(memstick_init_req_sg); | |||
294 | * user supplied buffer. | 294 | * user supplied buffer. |
295 | */ | 295 | */ |
296 | void memstick_init_req(struct memstick_request *mrq, unsigned char tpc, | 296 | void memstick_init_req(struct memstick_request *mrq, unsigned char tpc, |
297 | void *buf, size_t length) | 297 | const void *buf, size_t length) |
298 | { | 298 | { |
299 | mrq->tpc = tpc; | 299 | mrq->tpc = tpc; |
300 | if (tpc & 8) | 300 | if (tpc & 8) |
@@ -439,7 +439,7 @@ static void memstick_check(struct work_struct *work) | |||
439 | if (!host->card) { | 439 | if (!host->card) { |
440 | if (memstick_power_on(host)) | 440 | if (memstick_power_on(host)) |
441 | goto out_power_off; | 441 | goto out_power_off; |
442 | } else | 442 | } else if (host->card->stop) |
443 | host->card->stop(host->card); | 443 | host->card->stop(host->card); |
444 | 444 | ||
445 | card = memstick_alloc_card(host); | 445 | card = memstick_alloc_card(host); |
@@ -458,7 +458,7 @@ static void memstick_check(struct work_struct *work) | |||
458 | || !(host->card->check(host->card))) { | 458 | || !(host->card->check(host->card))) { |
459 | device_unregister(&host->card->dev); | 459 | device_unregister(&host->card->dev); |
460 | host->card = NULL; | 460 | host->card = NULL; |
461 | } else | 461 | } else if (host->card->start) |
462 | host->card->start(host->card); | 462 | host->card->start(host->card); |
463 | } | 463 | } |
464 | 464 | ||
diff --git a/drivers/memstick/core/mspro_block.c b/drivers/memstick/core/mspro_block.c index 44b1817f2f2f..d2d2318dafa4 100644 --- a/drivers/memstick/core/mspro_block.c +++ b/drivers/memstick/core/mspro_block.c | |||
@@ -30,6 +30,8 @@ module_param(major, int, 0644); | |||
30 | #define MSPRO_BLOCK_SIGNATURE 0xa5c3 | 30 | #define MSPRO_BLOCK_SIGNATURE 0xa5c3 |
31 | #define MSPRO_BLOCK_MAX_ATTRIBUTES 41 | 31 | #define MSPRO_BLOCK_MAX_ATTRIBUTES 41 |
32 | 32 | ||
33 | #define MSPRO_BLOCK_PART_SHIFT 3 | ||
34 | |||
33 | enum { | 35 | enum { |
34 | MSPRO_BLOCK_ID_SYSINFO = 0x10, | 36 | MSPRO_BLOCK_ID_SYSINFO = 0x10, |
35 | MSPRO_BLOCK_ID_MODELNAME = 0x15, | 37 | MSPRO_BLOCK_ID_MODELNAME = 0x15, |
@@ -195,7 +197,7 @@ static int mspro_block_bd_open(struct inode *inode, struct file *filp) | |||
195 | static int mspro_block_disk_release(struct gendisk *disk) | 197 | static int mspro_block_disk_release(struct gendisk *disk) |
196 | { | 198 | { |
197 | struct mspro_block_data *msb = disk->private_data; | 199 | struct mspro_block_data *msb = disk->private_data; |
198 | int disk_id = disk->first_minor >> MEMSTICK_PART_SHIFT; | 200 | int disk_id = disk->first_minor >> MSPRO_BLOCK_PART_SHIFT; |
199 | 201 | ||
200 | mutex_lock(&mspro_block_disk_lock); | 202 | mutex_lock(&mspro_block_disk_lock); |
201 | 203 | ||
@@ -877,6 +879,7 @@ static int mspro_block_switch_interface(struct memstick_dev *card) | |||
877 | struct mspro_block_data *msb = memstick_get_drvdata(card); | 879 | struct mspro_block_data *msb = memstick_get_drvdata(card); |
878 | int rc = 0; | 880 | int rc = 0; |
879 | 881 | ||
882 | try_again: | ||
880 | if (msb->caps & MEMSTICK_CAP_PAR4) | 883 | if (msb->caps & MEMSTICK_CAP_PAR4) |
881 | rc = mspro_block_set_interface(card, MEMSTICK_SYS_PAR4); | 884 | rc = mspro_block_set_interface(card, MEMSTICK_SYS_PAR4); |
882 | else | 885 | else |
@@ -930,6 +933,18 @@ static int mspro_block_switch_interface(struct memstick_dev *card) | |||
930 | rc = memstick_set_rw_addr(card); | 933 | rc = memstick_set_rw_addr(card); |
931 | if (!rc) | 934 | if (!rc) |
932 | rc = mspro_block_set_interface(card, msb->system); | 935 | rc = mspro_block_set_interface(card, msb->system); |
936 | |||
937 | if (!rc) { | ||
938 | msleep(150); | ||
939 | rc = mspro_block_wait_for_ced(card); | ||
940 | if (rc) | ||
941 | return rc; | ||
942 | |||
943 | if (msb->caps & MEMSTICK_CAP_PAR8) { | ||
944 | msb->caps &= ~MEMSTICK_CAP_PAR8; | ||
945 | goto try_again; | ||
946 | } | ||
947 | } | ||
933 | } | 948 | } |
934 | return rc; | 949 | return rc; |
935 | } | 950 | } |
@@ -1117,14 +1132,16 @@ static int mspro_block_init_card(struct memstick_dev *card) | |||
1117 | return -EIO; | 1132 | return -EIO; |
1118 | 1133 | ||
1119 | msb->caps = host->caps; | 1134 | msb->caps = host->caps; |
1120 | rc = mspro_block_switch_interface(card); | 1135 | |
1136 | msleep(150); | ||
1137 | rc = mspro_block_wait_for_ced(card); | ||
1121 | if (rc) | 1138 | if (rc) |
1122 | return rc; | 1139 | return rc; |
1123 | 1140 | ||
1124 | msleep(200); | 1141 | rc = mspro_block_switch_interface(card); |
1125 | rc = mspro_block_wait_for_ced(card); | ||
1126 | if (rc) | 1142 | if (rc) |
1127 | return rc; | 1143 | return rc; |
1144 | |||
1128 | dev_dbg(&card->dev, "card activated\n"); | 1145 | dev_dbg(&card->dev, "card activated\n"); |
1129 | if (msb->system != MEMSTICK_SYS_SERIAL) | 1146 | if (msb->system != MEMSTICK_SYS_SERIAL) |
1130 | msb->caps |= MEMSTICK_CAP_AUTO_GET_INT; | 1147 | msb->caps |= MEMSTICK_CAP_AUTO_GET_INT; |
@@ -1192,12 +1209,12 @@ static int mspro_block_init_disk(struct memstick_dev *card) | |||
1192 | if (rc) | 1209 | if (rc) |
1193 | return rc; | 1210 | return rc; |
1194 | 1211 | ||
1195 | if ((disk_id << MEMSTICK_PART_SHIFT) > 255) { | 1212 | if ((disk_id << MSPRO_BLOCK_PART_SHIFT) > 255) { |
1196 | rc = -ENOSPC; | 1213 | rc = -ENOSPC; |
1197 | goto out_release_id; | 1214 | goto out_release_id; |
1198 | } | 1215 | } |
1199 | 1216 | ||
1200 | msb->disk = alloc_disk(1 << MEMSTICK_PART_SHIFT); | 1217 | msb->disk = alloc_disk(1 << MSPRO_BLOCK_PART_SHIFT); |
1201 | if (!msb->disk) { | 1218 | if (!msb->disk) { |
1202 | rc = -ENOMEM; | 1219 | rc = -ENOMEM; |
1203 | goto out_release_id; | 1220 | goto out_release_id; |
@@ -1220,7 +1237,7 @@ static int mspro_block_init_disk(struct memstick_dev *card) | |||
1220 | MSPRO_BLOCK_MAX_PAGES * msb->page_size); | 1237 | MSPRO_BLOCK_MAX_PAGES * msb->page_size); |
1221 | 1238 | ||
1222 | msb->disk->major = major; | 1239 | msb->disk->major = major; |
1223 | msb->disk->first_minor = disk_id << MEMSTICK_PART_SHIFT; | 1240 | msb->disk->first_minor = disk_id << MSPRO_BLOCK_PART_SHIFT; |
1224 | msb->disk->fops = &ms_block_bdops; | 1241 | msb->disk->fops = &ms_block_bdops; |
1225 | msb->usage_count = 1; | 1242 | msb->usage_count = 1; |
1226 | msb->disk->private_data = msb; | 1243 | msb->disk->private_data = msb; |
@@ -1416,7 +1433,7 @@ out_unlock: | |||
1416 | 1433 | ||
1417 | static struct memstick_device_id mspro_block_id_tbl[] = { | 1434 | static struct memstick_device_id mspro_block_id_tbl[] = { |
1418 | {MEMSTICK_MATCH_ALL, MEMSTICK_TYPE_PRO, MEMSTICK_CATEGORY_STORAGE_DUO, | 1435 | {MEMSTICK_MATCH_ALL, MEMSTICK_TYPE_PRO, MEMSTICK_CATEGORY_STORAGE_DUO, |
1419 | MEMSTICK_CLASS_GENERIC_DUO}, | 1436 | MEMSTICK_CLASS_DUO}, |
1420 | {} | 1437 | {} |
1421 | }; | 1438 | }; |
1422 | 1439 | ||
diff --git a/drivers/memstick/host/jmb38x_ms.c b/drivers/memstick/host/jmb38x_ms.c index 3485c63d20b0..2fb95a5b72eb 100644 --- a/drivers/memstick/host/jmb38x_ms.c +++ b/drivers/memstick/host/jmb38x_ms.c | |||
@@ -81,6 +81,8 @@ struct jmb38x_ms { | |||
81 | #define TPC_CODE_SZ_MASK 0x00000700 | 81 | #define TPC_CODE_SZ_MASK 0x00000700 |
82 | #define TPC_DATA_SZ_MASK 0x00000007 | 82 | #define TPC_DATA_SZ_MASK 0x00000007 |
83 | 83 | ||
84 | #define HOST_CONTROL_TDELAY_EN 0x00040000 | ||
85 | #define HOST_CONTROL_HW_OC_P 0x00010000 | ||
84 | #define HOST_CONTROL_RESET_REQ 0x00008000 | 86 | #define HOST_CONTROL_RESET_REQ 0x00008000 |
85 | #define HOST_CONTROL_REI 0x00004000 | 87 | #define HOST_CONTROL_REI 0x00004000 |
86 | #define HOST_CONTROL_LED 0x00000400 | 88 | #define HOST_CONTROL_LED 0x00000400 |
@@ -88,6 +90,7 @@ struct jmb38x_ms { | |||
88 | #define HOST_CONTROL_RESET 0x00000100 | 90 | #define HOST_CONTROL_RESET 0x00000100 |
89 | #define HOST_CONTROL_POWER_EN 0x00000080 | 91 | #define HOST_CONTROL_POWER_EN 0x00000080 |
90 | #define HOST_CONTROL_CLOCK_EN 0x00000040 | 92 | #define HOST_CONTROL_CLOCK_EN 0x00000040 |
93 | #define HOST_CONTROL_REO 0x00000008 | ||
91 | #define HOST_CONTROL_IF_SHIFT 4 | 94 | #define HOST_CONTROL_IF_SHIFT 4 |
92 | 95 | ||
93 | #define HOST_CONTROL_IF_SERIAL 0x0 | 96 | #define HOST_CONTROL_IF_SERIAL 0x0 |
@@ -133,11 +136,15 @@ struct jmb38x_ms { | |||
133 | #define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000 | 136 | #define PAD_PU_PD_ON_MS_SOCK1 0x0f0f0000 |
134 | 137 | ||
135 | #define CLOCK_CONTROL_40MHZ 0x00000001 | 138 | #define CLOCK_CONTROL_40MHZ 0x00000001 |
136 | #define CLOCK_CONTROL_50MHZ 0x00000002 | 139 | #define CLOCK_CONTROL_50MHZ 0x0000000a |
137 | #define CLOCK_CONTROL_60MHZ 0x00000008 | 140 | #define CLOCK_CONTROL_60MHZ 0x00000008 |
138 | #define CLOCK_CONTROL_62_5MHZ 0x0000000c | 141 | #define CLOCK_CONTROL_62_5MHZ 0x0000000c |
139 | #define CLOCK_CONTROL_OFF 0x00000000 | 142 | #define CLOCK_CONTROL_OFF 0x00000000 |
140 | 143 | ||
144 | #define PCI_CTL_CLOCK_DLY_ADDR 0x000000b0 | ||
145 | #define PCI_CTL_CLOCK_DLY_MASK_A 0x00000f00 | ||
146 | #define PCI_CTL_CLOCK_DLY_MASK_B 0x0000f000 | ||
147 | |||
141 | enum { | 148 | enum { |
142 | CMD_READY = 0x01, | 149 | CMD_READY = 0x01, |
143 | FIFO_READY = 0x02, | 150 | FIFO_READY = 0x02, |
@@ -367,8 +374,7 @@ static int jmb38x_ms_issue_cmd(struct memstick_host *msh) | |||
367 | return host->req->error; | 374 | return host->req->error; |
368 | } | 375 | } |
369 | 376 | ||
370 | dev_dbg(&msh->dev, "control %08x\n", | 377 | dev_dbg(&msh->dev, "control %08x\n", readl(host->addr + HOST_CONTROL)); |
371 | readl(host->addr + HOST_CONTROL)); | ||
372 | dev_dbg(&msh->dev, "status %08x\n", readl(host->addr + INT_STATUS)); | 378 | dev_dbg(&msh->dev, "status %08x\n", readl(host->addr + INT_STATUS)); |
373 | dev_dbg(&msh->dev, "hstatus %08x\n", readl(host->addr + STATUS)); | 379 | dev_dbg(&msh->dev, "hstatus %08x\n", readl(host->addr + STATUS)); |
374 | 380 | ||
@@ -637,7 +643,7 @@ static int jmb38x_ms_reset(struct jmb38x_ms_host *host) | |||
637 | ndelay(20); | 643 | ndelay(20); |
638 | } | 644 | } |
639 | dev_dbg(&host->chip->pdev->dev, "reset_req timeout\n"); | 645 | dev_dbg(&host->chip->pdev->dev, "reset_req timeout\n"); |
640 | return -EIO; | 646 | /* return -EIO; */ |
641 | 647 | ||
642 | reset_next: | 648 | reset_next: |
643 | writel(HOST_CONTROL_RESET | HOST_CONTROL_CLOCK_EN | 649 | writel(HOST_CONTROL_RESET | HOST_CONTROL_CLOCK_EN |
@@ -680,7 +686,9 @@ static int jmb38x_ms_set_param(struct memstick_host *msh, | |||
680 | 686 | ||
681 | host_ctl = 7; | 687 | host_ctl = 7; |
682 | host_ctl |= HOST_CONTROL_POWER_EN | 688 | host_ctl |= HOST_CONTROL_POWER_EN |
683 | | HOST_CONTROL_CLOCK_EN; | 689 | | HOST_CONTROL_CLOCK_EN |
690 | | HOST_CONTROL_HW_OC_P | ||
691 | | HOST_CONTROL_TDELAY_EN; | ||
684 | writel(host_ctl, host->addr + HOST_CONTROL); | 692 | writel(host_ctl, host->addr + HOST_CONTROL); |
685 | 693 | ||
686 | writel(host->id ? PAD_PU_PD_ON_MS_SOCK1 | 694 | writel(host->id ? PAD_PU_PD_ON_MS_SOCK1 |
@@ -704,33 +712,40 @@ static int jmb38x_ms_set_param(struct memstick_host *msh, | |||
704 | break; | 712 | break; |
705 | case MEMSTICK_INTERFACE: | 713 | case MEMSTICK_INTERFACE: |
706 | host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT); | 714 | host_ctl &= ~(3 << HOST_CONTROL_IF_SHIFT); |
715 | pci_read_config_dword(host->chip->pdev, | ||
716 | PCI_CTL_CLOCK_DLY_ADDR, | ||
717 | &clock_delay); | ||
718 | clock_delay &= host->id ? ~PCI_CTL_CLOCK_DLY_MASK_B | ||
719 | : ~PCI_CTL_CLOCK_DLY_MASK_A; | ||
707 | 720 | ||
708 | if (value == MEMSTICK_SERIAL) { | 721 | if (value == MEMSTICK_SERIAL) { |
709 | host_ctl &= ~HOST_CONTROL_FAST_CLK; | 722 | host_ctl &= ~HOST_CONTROL_FAST_CLK; |
723 | host_ctl &= ~HOST_CONTROL_REO; | ||
710 | host_ctl |= HOST_CONTROL_IF_SERIAL | 724 | host_ctl |= HOST_CONTROL_IF_SERIAL |
711 | << HOST_CONTROL_IF_SHIFT; | 725 | << HOST_CONTROL_IF_SHIFT; |
712 | host_ctl |= HOST_CONTROL_REI; | 726 | host_ctl |= HOST_CONTROL_REI; |
713 | clock_ctl = CLOCK_CONTROL_40MHZ; | 727 | clock_ctl = CLOCK_CONTROL_40MHZ; |
714 | clock_delay = 0; | ||
715 | } else if (value == MEMSTICK_PAR4) { | 728 | } else if (value == MEMSTICK_PAR4) { |
716 | host_ctl |= HOST_CONTROL_FAST_CLK; | 729 | host_ctl |= HOST_CONTROL_FAST_CLK | HOST_CONTROL_REO; |
717 | host_ctl |= HOST_CONTROL_IF_PAR4 | 730 | host_ctl |= HOST_CONTROL_IF_PAR4 |
718 | << HOST_CONTROL_IF_SHIFT; | 731 | << HOST_CONTROL_IF_SHIFT; |
719 | host_ctl &= ~HOST_CONTROL_REI; | 732 | host_ctl &= ~HOST_CONTROL_REI; |
720 | clock_ctl = CLOCK_CONTROL_40MHZ; | 733 | clock_ctl = CLOCK_CONTROL_40MHZ; |
721 | clock_delay = 4; | 734 | clock_delay |= host->id ? (4 << 12) : (4 << 8); |
722 | } else if (value == MEMSTICK_PAR8) { | 735 | } else if (value == MEMSTICK_PAR8) { |
723 | host_ctl |= HOST_CONTROL_FAST_CLK; | 736 | host_ctl |= HOST_CONTROL_FAST_CLK; |
724 | host_ctl |= HOST_CONTROL_IF_PAR8 | 737 | host_ctl |= HOST_CONTROL_IF_PAR8 |
725 | << HOST_CONTROL_IF_SHIFT; | 738 | << HOST_CONTROL_IF_SHIFT; |
726 | host_ctl &= ~HOST_CONTROL_REI; | 739 | host_ctl &= ~(HOST_CONTROL_REI | HOST_CONTROL_REO); |
727 | clock_ctl = CLOCK_CONTROL_60MHZ; | 740 | clock_ctl = CLOCK_CONTROL_50MHZ; |
728 | clock_delay = 0; | ||
729 | } else | 741 | } else |
730 | return -EINVAL; | 742 | return -EINVAL; |
743 | |||
731 | writel(host_ctl, host->addr + HOST_CONTROL); | 744 | writel(host_ctl, host->addr + HOST_CONTROL); |
732 | writel(clock_ctl, host->addr + CLOCK_CONTROL); | 745 | writel(clock_ctl, host->addr + CLOCK_CONTROL); |
733 | writel(clock_delay, host->addr + CLOCK_DELAY); | 746 | pci_write_config_dword(host->chip->pdev, |
747 | PCI_CTL_CLOCK_DLY_ADDR, | ||
748 | clock_delay); | ||
734 | break; | 749 | break; |
735 | }; | 750 | }; |
736 | return 0; | 751 | return 0; |
diff --git a/drivers/misc/sgi-gru/grufile.c b/drivers/misc/sgi-gru/grufile.c index 23c91f5f6b61..d61cee796efd 100644 --- a/drivers/misc/sgi-gru/grufile.c +++ b/drivers/misc/sgi-gru/grufile.c | |||
@@ -445,6 +445,9 @@ static void __exit gru_exit(void) | |||
445 | int order = get_order(sizeof(struct gru_state) * | 445 | int order = get_order(sizeof(struct gru_state) * |
446 | GRU_CHIPLETS_PER_BLADE); | 446 | GRU_CHIPLETS_PER_BLADE); |
447 | 447 | ||
448 | if (!IS_UV()) | ||
449 | return; | ||
450 | |||
448 | for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++) | 451 | for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++) |
449 | free_irq(IRQ_GRU + i, NULL); | 452 | free_irq(IRQ_GRU + i, NULL); |
450 | 453 | ||
diff --git a/drivers/net/niu.c b/drivers/net/niu.c index e4765b713aba..e3be81eba8a4 100644 --- a/drivers/net/niu.c +++ b/drivers/net/niu.c | |||
@@ -5984,6 +5984,56 @@ static void niu_netif_start(struct niu *np) | |||
5984 | niu_enable_interrupts(np, 1); | 5984 | niu_enable_interrupts(np, 1); |
5985 | } | 5985 | } |
5986 | 5986 | ||
5987 | static void niu_reset_buffers(struct niu *np) | ||
5988 | { | ||
5989 | int i, j, k, err; | ||
5990 | |||
5991 | if (np->rx_rings) { | ||
5992 | for (i = 0; i < np->num_rx_rings; i++) { | ||
5993 | struct rx_ring_info *rp = &np->rx_rings[i]; | ||
5994 | |||
5995 | for (j = 0, k = 0; j < MAX_RBR_RING_SIZE; j++) { | ||
5996 | struct page *page; | ||
5997 | |||
5998 | page = rp->rxhash[j]; | ||
5999 | while (page) { | ||
6000 | struct page *next = | ||
6001 | (struct page *) page->mapping; | ||
6002 | u64 base = page->index; | ||
6003 | base = base >> RBR_DESCR_ADDR_SHIFT; | ||
6004 | rp->rbr[k++] = cpu_to_le32(base); | ||
6005 | page = next; | ||
6006 | } | ||
6007 | } | ||
6008 | for (; k < MAX_RBR_RING_SIZE; k++) { | ||
6009 | err = niu_rbr_add_page(np, rp, GFP_ATOMIC, k); | ||
6010 | if (unlikely(err)) | ||
6011 | break; | ||
6012 | } | ||
6013 | |||
6014 | rp->rbr_index = rp->rbr_table_size - 1; | ||
6015 | rp->rcr_index = 0; | ||
6016 | rp->rbr_pending = 0; | ||
6017 | rp->rbr_refill_pending = 0; | ||
6018 | } | ||
6019 | } | ||
6020 | if (np->tx_rings) { | ||
6021 | for (i = 0; i < np->num_tx_rings; i++) { | ||
6022 | struct tx_ring_info *rp = &np->tx_rings[i]; | ||
6023 | |||
6024 | for (j = 0; j < MAX_TX_RING_SIZE; j++) { | ||
6025 | if (rp->tx_buffs[j].skb) | ||
6026 | (void) release_tx_packet(np, rp, j); | ||
6027 | } | ||
6028 | |||
6029 | rp->pending = MAX_TX_RING_SIZE; | ||
6030 | rp->prod = 0; | ||
6031 | rp->cons = 0; | ||
6032 | rp->wrap_bit = 0; | ||
6033 | } | ||
6034 | } | ||
6035 | } | ||
6036 | |||
5987 | static void niu_reset_task(struct work_struct *work) | 6037 | static void niu_reset_task(struct work_struct *work) |
5988 | { | 6038 | { |
5989 | struct niu *np = container_of(work, struct niu, reset_task); | 6039 | struct niu *np = container_of(work, struct niu, reset_task); |
@@ -6006,6 +6056,12 @@ static void niu_reset_task(struct work_struct *work) | |||
6006 | 6056 | ||
6007 | niu_stop_hw(np); | 6057 | niu_stop_hw(np); |
6008 | 6058 | ||
6059 | spin_unlock_irqrestore(&np->lock, flags); | ||
6060 | |||
6061 | niu_reset_buffers(np); | ||
6062 | |||
6063 | spin_lock_irqsave(&np->lock, flags); | ||
6064 | |||
6009 | err = niu_init_hw(np); | 6065 | err = niu_init_hw(np); |
6010 | if (!err) { | 6066 | if (!err) { |
6011 | np->timer.expires = jiffies + HZ; | 6067 | np->timer.expires = jiffies + HZ; |
diff --git a/drivers/net/wireless/ath9k/beacon.c b/drivers/net/wireless/ath9k/beacon.c index caf569401a34..00a0eaa08866 100644 --- a/drivers/net/wireless/ath9k/beacon.c +++ b/drivers/net/wireless/ath9k/beacon.c | |||
@@ -209,6 +209,7 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) | |||
209 | unsigned int curlen; | 209 | unsigned int curlen; |
210 | struct ath_txq *cabq; | 210 | struct ath_txq *cabq; |
211 | struct ath_txq *mcastq; | 211 | struct ath_txq *mcastq; |
212 | struct ieee80211_tx_info *info; | ||
212 | avp = sc->sc_vaps[if_id]; | 213 | avp = sc->sc_vaps[if_id]; |
213 | 214 | ||
214 | mcastq = &avp->av_mcastq; | 215 | mcastq = &avp->av_mcastq; |
@@ -232,6 +233,18 @@ static struct ath_buf *ath_beacon_generate(struct ath_softc *sc, int if_id) | |||
232 | */ | 233 | */ |
233 | curlen = skb->len; | 234 | curlen = skb->len; |
234 | 235 | ||
236 | info = IEEE80211_SKB_CB(skb); | ||
237 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | ||
238 | /* | ||
239 | * TODO: make sure the seq# gets assigned properly (vs. other | ||
240 | * TX frames) | ||
241 | */ | ||
242 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; | ||
243 | sc->seq_no += 0x10; | ||
244 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | ||
245 | hdr->seq_ctrl |= cpu_to_le16(sc->seq_no); | ||
246 | } | ||
247 | |||
235 | /* XXX: spin_lock_bh should not be used here, but sparse bitches | 248 | /* XXX: spin_lock_bh should not be used here, but sparse bitches |
236 | * otherwise. We should fix sparse :) */ | 249 | * otherwise. We should fix sparse :) */ |
237 | spin_lock_bh(&mcastq->axq_lock); | 250 | spin_lock_bh(&mcastq->axq_lock); |
diff --git a/drivers/net/wireless/ath9k/core.h b/drivers/net/wireless/ath9k/core.h index 673b3d81133a..4ee695b76b88 100644 --- a/drivers/net/wireless/ath9k/core.h +++ b/drivers/net/wireless/ath9k/core.h | |||
@@ -992,6 +992,7 @@ struct ath_softc { | |||
992 | u32 sc_txintrperiod; /* tx interrupt batching */ | 992 | u32 sc_txintrperiod; /* tx interrupt batching */ |
993 | int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */ | 993 | int sc_haltype2q[ATH9K_WME_AC_VO+1]; /* HAL WME AC -> h/w qnum */ |
994 | u32 sc_ant_tx[8]; /* recent tx frames/antenna */ | 994 | u32 sc_ant_tx[8]; /* recent tx frames/antenna */ |
995 | u16 seq_no; /* TX sequence number */ | ||
995 | 996 | ||
996 | /* Beacon */ | 997 | /* Beacon */ |
997 | struct ath9k_tx_queue_info sc_beacon_qi; | 998 | struct ath9k_tx_queue_info sc_beacon_qi; |
diff --git a/drivers/net/wireless/ath9k/main.c b/drivers/net/wireless/ath9k/main.c index c5107f269f24..99badf1404c3 100644 --- a/drivers/net/wireless/ath9k/main.c +++ b/drivers/net/wireless/ath9k/main.c | |||
@@ -369,6 +369,20 @@ static int ath9k_tx(struct ieee80211_hw *hw, | |||
369 | { | 369 | { |
370 | struct ath_softc *sc = hw->priv; | 370 | struct ath_softc *sc = hw->priv; |
371 | int hdrlen, padsize; | 371 | int hdrlen, padsize; |
372 | struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); | ||
373 | |||
374 | /* | ||
375 | * As a temporary workaround, assign seq# here; this will likely need | ||
376 | * to be cleaned up to work better with Beacon transmission and virtual | ||
377 | * BSSes. | ||
378 | */ | ||
379 | if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) { | ||
380 | struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data; | ||
381 | if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) | ||
382 | sc->seq_no += 0x10; | ||
383 | hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG); | ||
384 | hdr->seq_ctrl |= cpu_to_le16(sc->seq_no); | ||
385 | } | ||
372 | 386 | ||
373 | /* Add the padding after the header if this is not already done */ | 387 | /* Add the padding after the header if this is not already done */ |
374 | hdrlen = ieee80211_get_hdrlen_from_skb(skb); | 388 | hdrlen = ieee80211_get_hdrlen_from_skb(skb); |
diff --git a/drivers/pci/hotplug/fakephp.c b/drivers/pci/hotplug/fakephp.c index 40337a06c18a..146ca9cd1567 100644 --- a/drivers/pci/hotplug/fakephp.c +++ b/drivers/pci/hotplug/fakephp.c | |||
@@ -320,15 +320,15 @@ static int disable_slot(struct hotplug_slot *slot) | |||
320 | return -ENODEV; | 320 | return -ENODEV; |
321 | } | 321 | } |
322 | 322 | ||
323 | /* remove the device from the pci core */ | ||
324 | pci_remove_bus_device(dev); | ||
325 | |||
323 | /* queue work item to blow away this sysfs entry and other | 326 | /* queue work item to blow away this sysfs entry and other |
324 | * parts. | 327 | * parts. |
325 | */ | 328 | */ |
326 | INIT_WORK(&dslot->remove_work, remove_slot_worker); | 329 | INIT_WORK(&dslot->remove_work, remove_slot_worker); |
327 | queue_work(dummyphp_wq, &dslot->remove_work); | 330 | queue_work(dummyphp_wq, &dslot->remove_work); |
328 | 331 | ||
329 | /* blow away this sysfs entry and other parts. */ | ||
330 | remove_slot(dslot); | ||
331 | |||
332 | pci_dev_put(dev); | 332 | pci_dev_put(dev); |
333 | } | 333 | } |
334 | return 0; | 334 | return 0; |
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c index ab31f5ba665d..9d934ddee956 100644 --- a/drivers/pci/hotplug/pciehp_hpc.c +++ b/drivers/pci/hotplug/pciehp_hpc.c | |||
@@ -258,7 +258,7 @@ static int pcie_poll_cmd(struct controller *ctrl) | |||
258 | return 1; | 258 | return 1; |
259 | } | 259 | } |
260 | } | 260 | } |
261 | while (timeout > 1000) { | 261 | while (timeout > 0) { |
262 | msleep(10); | 262 | msleep(10); |
263 | timeout -= 10; | 263 | timeout -= 10; |
264 | if (!pciehp_readw(ctrl, SLOTSTATUS, &slot_status)) { | 264 | if (!pciehp_readw(ctrl, SLOTSTATUS, &slot_status)) { |
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c index 8d0e60ac849c..c3edcdc08e72 100644 --- a/drivers/pci/intel-iommu.c +++ b/drivers/pci/intel-iommu.c | |||
@@ -2348,11 +2348,34 @@ static void __init iommu_exit_mempool(void) | |||
2348 | 2348 | ||
2349 | } | 2349 | } |
2350 | 2350 | ||
2351 | static int blacklist_iommu(const struct dmi_system_id *id) | ||
2352 | { | ||
2353 | printk(KERN_INFO "%s detected; disabling IOMMU\n", | ||
2354 | id->ident); | ||
2355 | dmar_disabled = 1; | ||
2356 | return 0; | ||
2357 | } | ||
2358 | |||
2359 | static struct dmi_system_id __initdata intel_iommu_dmi_table[] = { | ||
2360 | { /* Some DG33BU BIOS revisions advertised non-existent VT-d */ | ||
2361 | .callback = blacklist_iommu, | ||
2362 | .ident = "Intel DG33BU", | ||
2363 | { DMI_MATCH(DMI_BOARD_VENDOR, "Intel Corporation"), | ||
2364 | DMI_MATCH(DMI_BOARD_NAME, "DG33BU"), | ||
2365 | } | ||
2366 | }, | ||
2367 | { } | ||
2368 | }; | ||
2369 | |||
2370 | |||
2351 | void __init detect_intel_iommu(void) | 2371 | void __init detect_intel_iommu(void) |
2352 | { | 2372 | { |
2353 | if (swiotlb || no_iommu || iommu_detected || dmar_disabled) | 2373 | if (swiotlb || no_iommu || iommu_detected || dmar_disabled) |
2354 | return; | 2374 | return; |
2355 | if (early_dmar_detect()) { | 2375 | if (early_dmar_detect()) { |
2376 | dmi_check_system(intel_iommu_dmi_table); | ||
2377 | if (dmar_disabled) | ||
2378 | return; | ||
2356 | iommu_detected = 1; | 2379 | iommu_detected = 1; |
2357 | } | 2380 | } |
2358 | } | 2381 | } |
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c index cce2f4cb1fbf..36698e57b97f 100644 --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c | |||
@@ -304,6 +304,9 @@ static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, | |||
304 | } else { | 304 | } else { |
305 | res->start = l64; | 305 | res->start = l64; |
306 | res->end = l64 + sz64; | 306 | res->end = l64 + sz64; |
307 | printk(KERN_DEBUG "PCI: %s reg %x 64bit mmio: [%llx, %llx]\n", | ||
308 | pci_name(dev), pos, (unsigned long long)res->start, | ||
309 | (unsigned long long)res->end); | ||
307 | } | 310 | } |
308 | } else { | 311 | } else { |
309 | sz = pci_size(l, sz, mask); | 312 | sz = pci_size(l, sz, mask); |
@@ -313,6 +316,9 @@ static int __pci_read_base(struct pci_dev *dev, enum pci_bar_type type, | |||
313 | 316 | ||
314 | res->start = l; | 317 | res->start = l; |
315 | res->end = l + sz; | 318 | res->end = l + sz; |
319 | printk(KERN_DEBUG "PCI: %s reg %x %s: [%llx, %llx]\n", pci_name(dev), | ||
320 | pos, (res->flags & IORESOURCE_IO) ? "io port":"32bit mmio", | ||
321 | (unsigned long long)res->start, (unsigned long long)res->end); | ||
316 | } | 322 | } |
317 | 323 | ||
318 | out: | 324 | out: |
@@ -383,7 +389,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child) | |||
383 | res->start = base; | 389 | res->start = base; |
384 | if (!res->end) | 390 | if (!res->end) |
385 | res->end = limit + 0xfff; | 391 | res->end = limit + 0xfff; |
386 | printk(KERN_INFO "PCI: bridge %s io port: [%llx, %llx]\n", pci_name(dev), res->start, res->end); | 392 | printk(KERN_DEBUG "PCI: bridge %s io port: [%llx, %llx]\n", |
393 | pci_name(dev), (unsigned long long) res->start, | ||
394 | (unsigned long long) res->end); | ||
387 | } | 395 | } |
388 | 396 | ||
389 | res = child->resource[1]; | 397 | res = child->resource[1]; |
@@ -395,7 +403,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child) | |||
395 | res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM; | 403 | res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM; |
396 | res->start = base; | 404 | res->start = base; |
397 | res->end = limit + 0xfffff; | 405 | res->end = limit + 0xfffff; |
398 | printk(KERN_INFO "PCI: bridge %s 32bit mmio: [%llx, %llx]\n", pci_name(dev), res->start, res->end); | 406 | printk(KERN_DEBUG "PCI: bridge %s 32bit mmio: [%llx, %llx]\n", |
407 | pci_name(dev), (unsigned long long) res->start, | ||
408 | (unsigned long long) res->end); | ||
399 | } | 409 | } |
400 | 410 | ||
401 | res = child->resource[2]; | 411 | res = child->resource[2]; |
@@ -431,7 +441,9 @@ void __devinit pci_read_bridge_bases(struct pci_bus *child) | |||
431 | res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH; | 441 | res->flags = (mem_base_lo & PCI_MEMORY_RANGE_TYPE_MASK) | IORESOURCE_MEM | IORESOURCE_PREFETCH; |
432 | res->start = base; | 442 | res->start = base; |
433 | res->end = limit + 0xfffff; | 443 | res->end = limit + 0xfffff; |
434 | printk(KERN_INFO "PCI: bridge %s %sbit mmio pref: [%llx, %llx]\n", pci_name(dev), (res->flags & PCI_PREF_RANGE_TYPE_64)?"64":"32",res->start, res->end); | 444 | printk(KERN_DEBUG "PCI: bridge %s %sbit mmio pref: [%llx, %llx]\n", |
445 | pci_name(dev), (res->flags & PCI_PREF_RANGE_TYPE_64) ? "64" : "32", | ||
446 | (unsigned long long) res->start, (unsigned long long) res->end); | ||
435 | } | 447 | } |
436 | } | 448 | } |
437 | 449 | ||
diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 1aad599816f7..3abbfad9ddab 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c | |||
@@ -540,7 +540,11 @@ static void pci_bus_dump_res(struct pci_bus *bus) | |||
540 | if (!res) | 540 | if (!res) |
541 | continue; | 541 | continue; |
542 | 542 | ||
543 | printk(KERN_INFO "bus: %02x index %x %s: [%llx, %llx]\n", bus->number, i, (res->flags & IORESOURCE_IO)? "io port":"mmio", res->start, res->end); | 543 | printk(KERN_INFO "bus: %02x index %x %s: [%llx, %llx]\n", |
544 | bus->number, i, | ||
545 | (res->flags & IORESOURCE_IO) ? "io port" : "mmio", | ||
546 | (unsigned long long) res->start, | ||
547 | (unsigned long long) res->end); | ||
544 | } | 548 | } |
545 | } | 549 | } |
546 | 550 | ||
diff --git a/drivers/spi/pxa2xx_spi.c b/drivers/spi/pxa2xx_spi.c index 34c7c9875681..0e53354c1cfe 100644 --- a/drivers/spi/pxa2xx_spi.c +++ b/drivers/spi/pxa2xx_spi.c | |||
@@ -47,9 +47,10 @@ MODULE_ALIAS("platform:pxa2xx-spi"); | |||
47 | 47 | ||
48 | #define MAX_BUSES 3 | 48 | #define MAX_BUSES 3 |
49 | 49 | ||
50 | #define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR) | 50 | #define DMA_INT_MASK (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERR) |
51 | #define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK) | 51 | #define RESET_DMA_CHANNEL (DCSR_NODESC | DMA_INT_MASK) |
52 | #define IS_DMA_ALIGNED(x) (((u32)(x)&0x07)==0) | 52 | #define IS_DMA_ALIGNED(x) (((x) & 0x07) == 0) |
53 | #define MAX_DMA_LEN 8191 | ||
53 | 54 | ||
54 | /* | 55 | /* |
55 | * for testing SSCR1 changes that require SSP restart, basically | 56 | * for testing SSCR1 changes that require SSP restart, basically |
@@ -144,7 +145,6 @@ struct driver_data { | |||
144 | size_t tx_map_len; | 145 | size_t tx_map_len; |
145 | u8 n_bytes; | 146 | u8 n_bytes; |
146 | u32 dma_width; | 147 | u32 dma_width; |
147 | int cs_change; | ||
148 | int (*write)(struct driver_data *drv_data); | 148 | int (*write)(struct driver_data *drv_data); |
149 | int (*read)(struct driver_data *drv_data); | 149 | int (*read)(struct driver_data *drv_data); |
150 | irqreturn_t (*transfer_handler)(struct driver_data *drv_data); | 150 | irqreturn_t (*transfer_handler)(struct driver_data *drv_data); |
@@ -406,8 +406,45 @@ static void giveback(struct driver_data *drv_data) | |||
406 | struct spi_transfer, | 406 | struct spi_transfer, |
407 | transfer_list); | 407 | transfer_list); |
408 | 408 | ||
409 | /* Delay if requested before any change in chip select */ | ||
410 | if (last_transfer->delay_usecs) | ||
411 | udelay(last_transfer->delay_usecs); | ||
412 | |||
413 | /* Drop chip select UNLESS cs_change is true or we are returning | ||
414 | * a message with an error, or next message is for another chip | ||
415 | */ | ||
409 | if (!last_transfer->cs_change) | 416 | if (!last_transfer->cs_change) |
410 | drv_data->cs_control(PXA2XX_CS_DEASSERT); | 417 | drv_data->cs_control(PXA2XX_CS_DEASSERT); |
418 | else { | ||
419 | struct spi_message *next_msg; | ||
420 | |||
421 | /* Holding of cs was hinted, but we need to make sure | ||
422 | * the next message is for the same chip. Don't waste | ||
423 | * time with the following tests unless this was hinted. | ||
424 | * | ||
425 | * We cannot postpone this until pump_messages, because | ||
426 | * after calling msg->complete (below) the driver that | ||
427 | * sent the current message could be unloaded, which | ||
428 | * could invalidate the cs_control() callback... | ||
429 | */ | ||
430 | |||
431 | /* get a pointer to the next message, if any */ | ||
432 | spin_lock_irqsave(&drv_data->lock, flags); | ||
433 | if (list_empty(&drv_data->queue)) | ||
434 | next_msg = NULL; | ||
435 | else | ||
436 | next_msg = list_entry(drv_data->queue.next, | ||
437 | struct spi_message, queue); | ||
438 | spin_unlock_irqrestore(&drv_data->lock, flags); | ||
439 | |||
440 | /* see if the next and current messages point | ||
441 | * to the same chip | ||
442 | */ | ||
443 | if (next_msg && next_msg->spi != msg->spi) | ||
444 | next_msg = NULL; | ||
445 | if (!next_msg || msg->state == ERROR_STATE) | ||
446 | drv_data->cs_control(PXA2XX_CS_DEASSERT); | ||
447 | } | ||
411 | 448 | ||
412 | msg->state = NULL; | 449 | msg->state = NULL; |
413 | if (msg->complete) | 450 | if (msg->complete) |
@@ -490,10 +527,9 @@ static void dma_transfer_complete(struct driver_data *drv_data) | |||
490 | msg->actual_length += drv_data->len - | 527 | msg->actual_length += drv_data->len - |
491 | (drv_data->rx_end - drv_data->rx); | 528 | (drv_data->rx_end - drv_data->rx); |
492 | 529 | ||
493 | /* Release chip select if requested, transfer delays are | 530 | /* Transfer delays and chip select release are |
494 | * handled in pump_transfers */ | 531 | * handled in pump_transfers or giveback |
495 | if (drv_data->cs_change) | 532 | */ |
496 | drv_data->cs_control(PXA2XX_CS_DEASSERT); | ||
497 | 533 | ||
498 | /* Move to next transfer */ | 534 | /* Move to next transfer */ |
499 | msg->state = next_transfer(drv_data); | 535 | msg->state = next_transfer(drv_data); |
@@ -602,10 +638,9 @@ static void int_transfer_complete(struct driver_data *drv_data) | |||
602 | drv_data->cur_msg->actual_length += drv_data->len - | 638 | drv_data->cur_msg->actual_length += drv_data->len - |
603 | (drv_data->rx_end - drv_data->rx); | 639 | (drv_data->rx_end - drv_data->rx); |
604 | 640 | ||
605 | /* Release chip select if requested, transfer delays are | 641 | /* Transfer delays and chip select release are |
606 | * handled in pump_transfers */ | 642 | * handled in pump_transfers or giveback |
607 | if (drv_data->cs_change) | 643 | */ |
608 | drv_data->cs_control(PXA2XX_CS_DEASSERT); | ||
609 | 644 | ||
610 | /* Move to next transfer */ | 645 | /* Move to next transfer */ |
611 | drv_data->cur_msg->state = next_transfer(drv_data); | 646 | drv_data->cur_msg->state = next_transfer(drv_data); |
@@ -840,23 +875,40 @@ static void pump_transfers(unsigned long data) | |||
840 | return; | 875 | return; |
841 | } | 876 | } |
842 | 877 | ||
843 | /* Delay if requested at end of transfer*/ | 878 | /* Delay if requested at end of transfer before CS change */ |
844 | if (message->state == RUNNING_STATE) { | 879 | if (message->state == RUNNING_STATE) { |
845 | previous = list_entry(transfer->transfer_list.prev, | 880 | previous = list_entry(transfer->transfer_list.prev, |
846 | struct spi_transfer, | 881 | struct spi_transfer, |
847 | transfer_list); | 882 | transfer_list); |
848 | if (previous->delay_usecs) | 883 | if (previous->delay_usecs) |
849 | udelay(previous->delay_usecs); | 884 | udelay(previous->delay_usecs); |
885 | |||
886 | /* Drop chip select only if cs_change is requested */ | ||
887 | if (previous->cs_change) | ||
888 | drv_data->cs_control(PXA2XX_CS_DEASSERT); | ||
850 | } | 889 | } |
851 | 890 | ||
852 | /* Check transfer length */ | 891 | /* Check for transfers that need multiple DMA segments */ |
853 | if (transfer->len > 8191) | 892 | if (transfer->len > MAX_DMA_LEN && chip->enable_dma) { |
854 | { | 893 | |
855 | dev_warn(&drv_data->pdev->dev, "pump_transfers: transfer " | 894 | /* reject already-mapped transfers; PIO won't always work */ |
856 | "length greater than 8191\n"); | 895 | if (message->is_dma_mapped |
857 | message->status = -EINVAL; | 896 | || transfer->rx_dma || transfer->tx_dma) { |
858 | giveback(drv_data); | 897 | dev_err(&drv_data->pdev->dev, |
859 | return; | 898 | "pump_transfers: mapped transfer length " |
899 | "of %lu is greater than %d\n", | ||
900 | transfer->len, MAX_DMA_LEN); | ||
901 | message->status = -EINVAL; | ||
902 | giveback(drv_data); | ||
903 | return; | ||
904 | } | ||
905 | |||
906 | /* warn ... we force this to PIO mode */ | ||
907 | if (printk_ratelimit()) | ||
908 | dev_warn(&message->spi->dev, "pump_transfers: " | ||
909 | "DMA disabled for transfer length %ld " | ||
910 | "greater than %d\n", | ||
911 | (long)drv_data->len, MAX_DMA_LEN); | ||
860 | } | 912 | } |
861 | 913 | ||
862 | /* Setup the transfer state based on the type of transfer */ | 914 | /* Setup the transfer state based on the type of transfer */ |
@@ -878,7 +930,6 @@ static void pump_transfers(unsigned long data) | |||
878 | drv_data->len = transfer->len & DCMD_LENGTH; | 930 | drv_data->len = transfer->len & DCMD_LENGTH; |
879 | drv_data->write = drv_data->tx ? chip->write : null_writer; | 931 | drv_data->write = drv_data->tx ? chip->write : null_writer; |
880 | drv_data->read = drv_data->rx ? chip->read : null_reader; | 932 | drv_data->read = drv_data->rx ? chip->read : null_reader; |
881 | drv_data->cs_change = transfer->cs_change; | ||
882 | 933 | ||
883 | /* Change speed and bit per word on a per transfer */ | 934 | /* Change speed and bit per word on a per transfer */ |
884 | cr0 = chip->cr0; | 935 | cr0 = chip->cr0; |
@@ -925,7 +976,7 @@ static void pump_transfers(unsigned long data) | |||
925 | &dma_thresh)) | 976 | &dma_thresh)) |
926 | if (printk_ratelimit()) | 977 | if (printk_ratelimit()) |
927 | dev_warn(&message->spi->dev, | 978 | dev_warn(&message->spi->dev, |
928 | "pump_transfer: " | 979 | "pump_transfers: " |
929 | "DMA burst size reduced to " | 980 | "DMA burst size reduced to " |
930 | "match bits_per_word\n"); | 981 | "match bits_per_word\n"); |
931 | } | 982 | } |
@@ -939,8 +990,23 @@ static void pump_transfers(unsigned long data) | |||
939 | 990 | ||
940 | message->state = RUNNING_STATE; | 991 | message->state = RUNNING_STATE; |
941 | 992 | ||
942 | /* Try to map dma buffer and do a dma transfer if successful */ | 993 | /* Try to map dma buffer and do a dma transfer if successful, but |
943 | if ((drv_data->dma_mapped = map_dma_buffers(drv_data))) { | 994 | * only if the length is non-zero and less than MAX_DMA_LEN. |
995 | * | ||
996 | * Zero-length non-descriptor DMA is illegal on PXA2xx; force use | ||
997 | * of PIO instead. Care is needed above because the transfer may | ||
998 | * have have been passed with buffers that are already dma mapped. | ||
999 | * A zero-length transfer in PIO mode will not try to write/read | ||
1000 | * to/from the buffers | ||
1001 | * | ||
1002 | * REVISIT large transfers are exactly where we most want to be | ||
1003 | * using DMA. If this happens much, split those transfers into | ||
1004 | * multiple DMA segments rather than forcing PIO. | ||
1005 | */ | ||
1006 | drv_data->dma_mapped = 0; | ||
1007 | if (drv_data->len > 0 && drv_data->len <= MAX_DMA_LEN) | ||
1008 | drv_data->dma_mapped = map_dma_buffers(drv_data); | ||
1009 | if (drv_data->dma_mapped) { | ||
944 | 1010 | ||
945 | /* Ensure we have the correct interrupt handler */ | 1011 | /* Ensure we have the correct interrupt handler */ |
946 | drv_data->transfer_handler = dma_transfer; | 1012 | drv_data->transfer_handler = dma_transfer; |
diff --git a/drivers/spi/spi_mpc83xx.c b/drivers/spi/spi_mpc83xx.c index 070c6219e2d6..ac0e3e4b3c54 100644 --- a/drivers/spi/spi_mpc83xx.c +++ b/drivers/spi/spi_mpc83xx.c | |||
@@ -267,16 +267,13 @@ int mpc83xx_spi_setup_transfer(struct spi_device *spi, struct spi_transfer *t) | |||
267 | cs->hw_mode |= SPMODE_LEN(bits_per_word); | 267 | cs->hw_mode |= SPMODE_LEN(bits_per_word); |
268 | 268 | ||
269 | if ((mpc83xx_spi->spibrg / hz) > 64) { | 269 | if ((mpc83xx_spi->spibrg / hz) > 64) { |
270 | cs->hw_mode |= SPMODE_DIV16; | ||
270 | pm = mpc83xx_spi->spibrg / (hz * 64); | 271 | pm = mpc83xx_spi->spibrg / (hz * 64); |
271 | if (pm > 16) { | 272 | if (pm > 16) { |
272 | cs->hw_mode |= SPMODE_DIV16; | 273 | dev_err(&spi->dev, "Requested speed is too " |
273 | pm /= 16; | 274 | "low: %d Hz. Will use %d Hz instead.\n", |
274 | if (pm > 16) { | 275 | hz, mpc83xx_spi->spibrg / 1024); |
275 | dev_err(&spi->dev, "Requested speed is too " | 276 | pm = 16; |
276 | "low: %d Hz. Will use %d Hz instead.\n", | ||
277 | hz, mpc83xx_spi->spibrg / 1024); | ||
278 | pm = 16; | ||
279 | } | ||
280 | } | 277 | } |
281 | } else | 278 | } else |
282 | pm = mpc83xx_spi->spibrg / (hz * 4); | 279 | pm = mpc83xx_spi->spibrg / (hz * 4); |
@@ -315,11 +312,20 @@ static int mpc83xx_spi_bufs(struct spi_device *spi, struct spi_transfer *t) | |||
315 | if (t->bits_per_word) | 312 | if (t->bits_per_word) |
316 | bits_per_word = t->bits_per_word; | 313 | bits_per_word = t->bits_per_word; |
317 | len = t->len; | 314 | len = t->len; |
318 | if (bits_per_word > 8) | 315 | if (bits_per_word > 8) { |
316 | /* invalid length? */ | ||
317 | if (len & 1) | ||
318 | return -EINVAL; | ||
319 | len /= 2; | 319 | len /= 2; |
320 | if (bits_per_word > 16) | 320 | } |
321 | if (bits_per_word > 16) { | ||
322 | /* invalid length? */ | ||
323 | if (len & 1) | ||
324 | return -EINVAL; | ||
321 | len /= 2; | 325 | len /= 2; |
326 | } | ||
322 | mpc83xx_spi->count = len; | 327 | mpc83xx_spi->count = len; |
328 | |||
323 | INIT_COMPLETION(mpc83xx_spi->done); | 329 | INIT_COMPLETION(mpc83xx_spi->done); |
324 | 330 | ||
325 | /* enable rx ints */ | 331 | /* enable rx ints */ |
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c index 98abc73c1a1d..3eb414b84a9d 100644 --- a/drivers/spi/spi_s3c24xx.c +++ b/drivers/spi/spi_s3c24xx.c | |||
@@ -430,7 +430,7 @@ static int s3c24xx_spi_resume(struct platform_device *pdev) | |||
430 | #endif | 430 | #endif |
431 | 431 | ||
432 | MODULE_ALIAS("platform:s3c2410-spi"); | 432 | MODULE_ALIAS("platform:s3c2410-spi"); |
433 | static struct platform_driver s3c24xx_spidrv = { | 433 | static struct platform_driver s3c24xx_spi_driver = { |
434 | .remove = __exit_p(s3c24xx_spi_remove), | 434 | .remove = __exit_p(s3c24xx_spi_remove), |
435 | .suspend = s3c24xx_spi_suspend, | 435 | .suspend = s3c24xx_spi_suspend, |
436 | .resume = s3c24xx_spi_resume, | 436 | .resume = s3c24xx_spi_resume, |
@@ -442,12 +442,12 @@ static struct platform_driver s3c24xx_spidrv = { | |||
442 | 442 | ||
443 | static int __init s3c24xx_spi_init(void) | 443 | static int __init s3c24xx_spi_init(void) |
444 | { | 444 | { |
445 | return platform_driver_probe(&s3c24xx_spidrv, s3c24xx_spi_probe); | 445 | return platform_driver_probe(&s3c24xx_spi_driver, s3c24xx_spi_probe); |
446 | } | 446 | } |
447 | 447 | ||
448 | static void __exit s3c24xx_spi_exit(void) | 448 | static void __exit s3c24xx_spi_exit(void) |
449 | { | 449 | { |
450 | platform_driver_unregister(&s3c24xx_spidrv); | 450 | platform_driver_unregister(&s3c24xx_spi_driver); |
451 | } | 451 | } |
452 | 452 | ||
453 | module_init(s3c24xx_spi_init); | 453 | module_init(s3c24xx_spi_init); |
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c index 5a24c6411d34..75dac578104f 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c | |||
@@ -208,6 +208,36 @@ static unsigned long compute_hozval(unsigned long xres, unsigned long lcdcon2) | |||
208 | return value; | 208 | return value; |
209 | } | 209 | } |
210 | 210 | ||
211 | static void atmel_lcdfb_stop_nowait(struct atmel_lcdfb_info *sinfo) | ||
212 | { | ||
213 | /* Turn off the LCD controller and the DMA controller */ | ||
214 | lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, | ||
215 | sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET); | ||
216 | |||
217 | /* Wait for the LCDC core to become idle */ | ||
218 | while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) | ||
219 | msleep(10); | ||
220 | |||
221 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); | ||
222 | } | ||
223 | |||
224 | static void atmel_lcdfb_stop(struct atmel_lcdfb_info *sinfo) | ||
225 | { | ||
226 | atmel_lcdfb_stop_nowait(sinfo); | ||
227 | |||
228 | /* Wait for DMA engine to become idle... */ | ||
229 | while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) | ||
230 | msleep(10); | ||
231 | } | ||
232 | |||
233 | static void atmel_lcdfb_start(struct atmel_lcdfb_info *sinfo) | ||
234 | { | ||
235 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon); | ||
236 | lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, | ||
237 | (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ||
238 | | ATMEL_LCDC_PWR); | ||
239 | } | ||
240 | |||
211 | static void atmel_lcdfb_update_dma(struct fb_info *info, | 241 | static void atmel_lcdfb_update_dma(struct fb_info *info, |
212 | struct fb_var_screeninfo *var) | 242 | struct fb_var_screeninfo *var) |
213 | { | 243 | { |
@@ -420,26 +450,8 @@ static void atmel_lcdfb_reset(struct atmel_lcdfb_info *sinfo) | |||
420 | { | 450 | { |
421 | might_sleep(); | 451 | might_sleep(); |
422 | 452 | ||
423 | /* LCD power off */ | 453 | atmel_lcdfb_stop(sinfo); |
424 | lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET); | 454 | atmel_lcdfb_start(sinfo); |
425 | |||
426 | /* wait for the LCDC core to become idle */ | ||
427 | while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) | ||
428 | msleep(10); | ||
429 | |||
430 | /* DMA disable */ | ||
431 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); | ||
432 | |||
433 | /* wait for DMA engine to become idle */ | ||
434 | while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) | ||
435 | msleep(10); | ||
436 | |||
437 | /* LCD power on */ | ||
438 | lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, | ||
439 | (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR); | ||
440 | |||
441 | /* DMA enable */ | ||
442 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon); | ||
443 | } | 455 | } |
444 | 456 | ||
445 | /** | 457 | /** |
@@ -471,14 +483,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info) | |||
471 | info->var.xres, info->var.yres, | 483 | info->var.xres, info->var.yres, |
472 | info->var.xres_virtual, info->var.yres_virtual); | 484 | info->var.xres_virtual, info->var.yres_virtual); |
473 | 485 | ||
474 | /* Turn off the LCD controller and the DMA controller */ | 486 | atmel_lcdfb_stop_nowait(sinfo); |
475 | lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET); | ||
476 | |||
477 | /* Wait for the LCDC core to become idle */ | ||
478 | while (lcdc_readl(sinfo, ATMEL_LCDC_PWRCON) & ATMEL_LCDC_BUSY) | ||
479 | msleep(10); | ||
480 | |||
481 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, 0); | ||
482 | 487 | ||
483 | if (info->var.bits_per_pixel == 1) | 488 | if (info->var.bits_per_pixel == 1) |
484 | info->fix.visual = FB_VISUAL_MONO01; | 489 | info->fix.visual = FB_VISUAL_MONO01; |
@@ -583,13 +588,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info) | |||
583 | while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) | 588 | while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) |
584 | msleep(10); | 589 | msleep(10); |
585 | 590 | ||
586 | dev_dbg(info->device, " * re-enable DMA engine\n"); | 591 | atmel_lcdfb_start(sinfo); |
587 | /* ...and enable it with updated configuration */ | ||
588 | lcdc_writel(sinfo, ATMEL_LCDC_DMACON, sinfo->default_dmacon); | ||
589 | |||
590 | dev_dbg(info->device, " * re-enable LCDC core\n"); | ||
591 | lcdc_writel(sinfo, ATMEL_LCDC_PWRCON, | ||
592 | (sinfo->guard_time << ATMEL_LCDC_GUARDT_OFFSET) | ATMEL_LCDC_PWR); | ||
593 | 592 | ||
594 | dev_dbg(info->device, " * DONE\n"); | 593 | dev_dbg(info->device, " * DONE\n"); |
595 | 594 | ||
@@ -1032,11 +1031,20 @@ static int atmel_lcdfb_suspend(struct platform_device *pdev, pm_message_t mesg) | |||
1032 | struct fb_info *info = platform_get_drvdata(pdev); | 1031 | struct fb_info *info = platform_get_drvdata(pdev); |
1033 | struct atmel_lcdfb_info *sinfo = info->par; | 1032 | struct atmel_lcdfb_info *sinfo = info->par; |
1034 | 1033 | ||
1034 | /* | ||
1035 | * We don't want to handle interrupts while the clock is | ||
1036 | * stopped. It may take forever. | ||
1037 | */ | ||
1038 | lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); | ||
1039 | |||
1035 | sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); | 1040 | sinfo->saved_lcdcon = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); |
1036 | lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); | 1041 | lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, 0); |
1037 | if (sinfo->atmel_lcdfb_power_control) | 1042 | if (sinfo->atmel_lcdfb_power_control) |
1038 | sinfo->atmel_lcdfb_power_control(0); | 1043 | sinfo->atmel_lcdfb_power_control(0); |
1044 | |||
1045 | atmel_lcdfb_stop(sinfo); | ||
1039 | atmel_lcdfb_stop_clock(sinfo); | 1046 | atmel_lcdfb_stop_clock(sinfo); |
1047 | |||
1040 | return 0; | 1048 | return 0; |
1041 | } | 1049 | } |
1042 | 1050 | ||
@@ -1046,9 +1054,15 @@ static int atmel_lcdfb_resume(struct platform_device *pdev) | |||
1046 | struct atmel_lcdfb_info *sinfo = info->par; | 1054 | struct atmel_lcdfb_info *sinfo = info->par; |
1047 | 1055 | ||
1048 | atmel_lcdfb_start_clock(sinfo); | 1056 | atmel_lcdfb_start_clock(sinfo); |
1057 | atmel_lcdfb_start(sinfo); | ||
1049 | if (sinfo->atmel_lcdfb_power_control) | 1058 | if (sinfo->atmel_lcdfb_power_control) |
1050 | sinfo->atmel_lcdfb_power_control(1); | 1059 | sinfo->atmel_lcdfb_power_control(1); |
1051 | lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon); | 1060 | lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, sinfo->saved_lcdcon); |
1061 | |||
1062 | /* Enable FIFO & DMA errors */ | ||
1063 | lcdc_writel(sinfo, ATMEL_LCDC_IER, ATMEL_LCDC_UFLWI | ||
1064 | | ATMEL_LCDC_OWRI | ATMEL_LCDC_MERI); | ||
1065 | |||
1052 | return 0; | 1066 | return 0; |
1053 | } | 1067 | } |
1054 | 1068 | ||