aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/watchdog/Kconfig18
-rw-r--r--drivers/watchdog/Makefile2
-rw-r--r--drivers/watchdog/f71808e_wdt.c768
-rw-r--r--drivers/watchdog/hpwdt.c4
-rw-r--r--drivers/watchdog/s3c2410_wdt.c17
-rw-r--r--drivers/watchdog/sch311x_wdt.c4
-rw-r--r--drivers/watchdog/sp805_wdt.c387
-rw-r--r--drivers/watchdog/wdt_pci.c15
8 files changed, 1189 insertions, 26 deletions
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index b04b18468932..4d2992aadfb7 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -73,6 +73,13 @@ config WM8350_WATCHDOG
73 73
74# ARM Architecture 74# ARM Architecture
75 75
76config ARM_SP805_WATCHDOG
77 tristate "ARM SP805 Watchdog"
78 depends on ARM_AMBA
79 help
80 ARM Primecell SP805 Watchdog timer. This will reboot your system when
81 the timeout is reached.
82
76config AT91RM9200_WATCHDOG 83config AT91RM9200_WATCHDOG
77 tristate "AT91RM9200 watchdog" 84 tristate "AT91RM9200 watchdog"
78 depends on ARCH_AT91RM9200 85 depends on ARCH_AT91RM9200
@@ -401,6 +408,17 @@ config ALIM7101_WDT
401 408
402 Most people will say N. 409 Most people will say N.
403 410
411config F71808E_WDT
412 tristate "Fintek F71808E and F71882FG Watchdog"
413 depends on X86 && EXPERIMENTAL
414 help
415 This is the driver for the hardware watchdog on the Fintek
416 F71808E and F71882FG Super I/O controllers.
417
418 You can compile this driver directly into the kernel, or use
419 it as a module. The module will be called f71808e_wdt.
420
421
404config GEODE_WDT 422config GEODE_WDT
405 tristate "AMD Geode CS5535/CS5536 Watchdog" 423 tristate "AMD Geode CS5535/CS5536 Watchdog"
406 depends on CS5535_MFGPT 424 depends on CS5535_MFGPT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index e30289a5e367..8374503fcc6a 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -25,6 +25,7 @@ obj-$(CONFIG_USBPCWATCHDOG) += pcwd_usb.o
25# ALPHA Architecture 25# ALPHA Architecture
26 26
27# ARM Architecture 27# ARM Architecture
28obj-$(CONFIG_ARM_SP805_WATCHDOG) += sp805_wdt.o
28obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o 29obj-$(CONFIG_AT91RM9200_WATCHDOG) += at91rm9200_wdt.o
29obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o 30obj-$(CONFIG_AT91SAM9X_WATCHDOG) += at91sam9_wdt.o
30obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o 31obj-$(CONFIG_OMAP_WATCHDOG) += omap_wdt.o
@@ -66,6 +67,7 @@ obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o
66obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o 67obj-$(CONFIG_ADVANTECH_WDT) += advantechwdt.o
67obj-$(CONFIG_ALIM1535_WDT) += alim1535_wdt.o 68obj-$(CONFIG_ALIM1535_WDT) += alim1535_wdt.o
68obj-$(CONFIG_ALIM7101_WDT) += alim7101_wdt.o 69obj-$(CONFIG_ALIM7101_WDT) += alim7101_wdt.o
70obj-$(CONFIG_F71808E_WDT) += f71808e_wdt.o
69obj-$(CONFIG_GEODE_WDT) += geodewdt.o 71obj-$(CONFIG_GEODE_WDT) += geodewdt.o
70obj-$(CONFIG_SC520_WDT) += sc520_wdt.o 72obj-$(CONFIG_SC520_WDT) += sc520_wdt.o
71obj-$(CONFIG_SBC_FITPC2_WATCHDOG) += sbc_fitpc2_wdt.o 73obj-$(CONFIG_SBC_FITPC2_WATCHDOG) += sbc_fitpc2_wdt.o
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c
new file mode 100644
index 000000000000..7e5c266cda48
--- /dev/null
+++ b/drivers/watchdog/f71808e_wdt.c
@@ -0,0 +1,768 @@
1/***************************************************************************
2 * Copyright (C) 2006 by Hans Edgington <hans@edgington.nl> *
3 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
4 * Copyright (C) 2010 Giel van Schijndel <me@mortis.eu> *
5 * *
6 * This program is free software; you can redistribute it and/or modify *
7 * it under the terms of the GNU General Public License as published by *
8 * the Free Software Foundation; either version 2 of the License, or *
9 * (at your option) any later version. *
10 * *
11 * This program is distributed in the hope that it will be useful, *
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
14 * GNU General Public License for more details. *
15 * *
16 * You should have received a copy of the GNU General Public License *
17 * along with this program; if not, write to the *
18 * Free Software Foundation, Inc., *
19 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
20 ***************************************************************************/
21
22#include <linux/err.h>
23#include <linux/fs.h>
24#include <linux/init.h>
25#include <linux/io.h>
26#include <linux/ioport.h>
27#include <linux/miscdevice.h>
28#include <linux/module.h>
29#include <linux/mutex.h>
30#include <linux/notifier.h>
31#include <linux/reboot.h>
32#include <linux/uaccess.h>
33#include <linux/watchdog.h>
34
35#define DRVNAME "f71808e_wdt"
36
37#define SIO_F71808FG_LD_WDT 0x07 /* Watchdog timer logical device */
38#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
39#define SIO_LOCK_KEY 0xAA /* Key to diasble Super-I/O */
40
41#define SIO_REG_LDSEL 0x07 /* Logical device select */
42#define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
43#define SIO_REG_DEVREV 0x22 /* Device revision */
44#define SIO_REG_MANID 0x23 /* Fintek ID (2 bytes) */
45#define SIO_REG_ENABLE 0x30 /* Logical device enable */
46#define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
47
48#define SIO_FINTEK_ID 0x1934 /* Manufacturers ID */
49#define SIO_F71808_ID 0x0901 /* Chipset ID */
50#define SIO_F71858_ID 0x0507 /* Chipset ID */
51#define SIO_F71862_ID 0x0601 /* Chipset ID */
52#define SIO_F71882_ID 0x0541 /* Chipset ID */
53#define SIO_F71889_ID 0x0723 /* Chipset ID */
54
55#define F71882FG_REG_START 0x01
56
57#define F71808FG_REG_WDO_CONF 0xf0
58#define F71808FG_REG_WDT_CONF 0xf5
59#define F71808FG_REG_WD_TIME 0xf6
60
61#define F71808FG_FLAG_WDOUT_EN 7
62
63#define F71808FG_FLAG_WDTMOUT_STS 5
64#define F71808FG_FLAG_WD_EN 5
65#define F71808FG_FLAG_WD_PULSE 4
66#define F71808FG_FLAG_WD_UNIT 3
67
68/* Default values */
69#define WATCHDOG_TIMEOUT 60 /* 1 minute default timeout */
70#define WATCHDOG_MAX_TIMEOUT (60 * 255)
71#define WATCHDOG_PULSE_WIDTH 125 /* 125 ms, default pulse width for
72 watchdog signal */
73
74static unsigned short force_id;
75module_param(force_id, ushort, 0);
76MODULE_PARM_DESC(force_id, "Override the detected device ID");
77
78static const int max_timeout = WATCHDOG_MAX_TIMEOUT;
79static int timeout = 60; /* default timeout in seconds */
80module_param(timeout, int, 0);
81MODULE_PARM_DESC(timeout,
82 "Watchdog timeout in seconds. 1<= timeout <="
83 __MODULE_STRING(WATCHDOG_MAX_TIMEOUT) " (default="
84 __MODULE_STRING(WATCHDOG_TIMEOUT) ")");
85
86static unsigned int pulse_width = WATCHDOG_PULSE_WIDTH;
87module_param(pulse_width, uint, 0);
88MODULE_PARM_DESC(pulse_width,
89 "Watchdog signal pulse width. 0(=level), 1 ms, 25 ms, 125 ms or 5000 ms"
90 " (default=" __MODULE_STRING(WATCHDOG_PULSE_WIDTH) ")");
91
92static int nowayout = WATCHDOG_NOWAYOUT;
93module_param(nowayout, bool, 0444);
94MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close");
95
96static unsigned int start_withtimeout;
97module_param(start_withtimeout, uint, 0);
98MODULE_PARM_DESC(start_withtimeout, "Start watchdog timer on module load with"
99 " given initial timeout. Zero (default) disables this feature.");
100
101enum chips { f71808fg, f71858fg, f71862fg, f71882fg, f71889fg };
102
103static const char *f71808e_names[] = {
104 "f71808fg",
105 "f71858fg",
106 "f71862fg",
107 "f71882fg",
108 "f71889fg",
109};
110
111/* Super-I/O Function prototypes */
112static inline int superio_inb(int base, int reg);
113static inline int superio_inw(int base, int reg);
114static inline void superio_outb(int base, int reg, u8 val);
115static inline void superio_set_bit(int base, int reg, int bit);
116static inline void superio_clear_bit(int base, int reg, int bit);
117static inline int superio_enter(int base);
118static inline void superio_select(int base, int ld);
119static inline void superio_exit(int base);
120
121struct watchdog_data {
122 unsigned short sioaddr;
123 enum chips type;
124 unsigned long opened;
125 struct mutex lock;
126 char expect_close;
127 struct watchdog_info ident;
128
129 unsigned short timeout;
130 u8 timer_val; /* content for the wd_time register */
131 char minutes_mode;
132 u8 pulse_val; /* pulse width flag */
133 char pulse_mode; /* enable pulse output mode? */
134 char caused_reboot; /* last reboot was by the watchdog */
135};
136
137static struct watchdog_data watchdog = {
138 .lock = __MUTEX_INITIALIZER(watchdog.lock),
139};
140
141/* Super I/O functions */
142static inline int superio_inb(int base, int reg)
143{
144 outb(reg, base);
145 return inb(base + 1);
146}
147
148static int superio_inw(int base, int reg)
149{
150 int val;
151 val = superio_inb(base, reg) << 8;
152 val |= superio_inb(base, reg + 1);
153 return val;
154}
155
156static inline void superio_outb(int base, int reg, u8 val)
157{
158 outb(reg, base);
159 outb(val, base + 1);
160}
161
162static inline void superio_set_bit(int base, int reg, int bit)
163{
164 unsigned long val = superio_inb(base, reg);
165 __set_bit(bit, &val);
166 superio_outb(base, reg, val);
167}
168
169static inline void superio_clear_bit(int base, int reg, int bit)
170{
171 unsigned long val = superio_inb(base, reg);
172 __clear_bit(bit, &val);
173 superio_outb(base, reg, val);
174}
175
176static inline int superio_enter(int base)
177{
178 /* Don't step on other drivers' I/O space by accident */
179 if (!request_muxed_region(base, 2, DRVNAME)) {
180 printk(KERN_ERR DRVNAME ": I/O address 0x%04x already in use\n",
181 (int)base);
182 return -EBUSY;
183 }
184
185 /* according to the datasheet the key must be send twice! */
186 outb(SIO_UNLOCK_KEY, base);
187 outb(SIO_UNLOCK_KEY, base);
188
189 return 0;
190}
191
192static inline void superio_select(int base, int ld)
193{
194 outb(SIO_REG_LDSEL, base);
195 outb(ld, base + 1);
196}
197
198static inline void superio_exit(int base)
199{
200 outb(SIO_LOCK_KEY, base);
201 release_region(base, 2);
202}
203
204static int watchdog_set_timeout(int timeout)
205{
206 if (timeout <= 0
207 || timeout > max_timeout) {
208 printk(KERN_ERR DRVNAME ": watchdog timeout out of range\n");
209 return -EINVAL;
210 }
211
212 mutex_lock(&watchdog.lock);
213
214 watchdog.timeout = timeout;
215 if (timeout > 0xff) {
216 watchdog.timer_val = DIV_ROUND_UP(timeout, 60);
217 watchdog.minutes_mode = true;
218 } else {
219 watchdog.timer_val = timeout;
220 watchdog.minutes_mode = false;
221 }
222
223 mutex_unlock(&watchdog.lock);
224
225 return 0;
226}
227
228static int watchdog_set_pulse_width(unsigned int pw)
229{
230 int err = 0;
231
232 mutex_lock(&watchdog.lock);
233
234 if (pw <= 1) {
235 watchdog.pulse_val = 0;
236 } else if (pw <= 25) {
237 watchdog.pulse_val = 1;
238 } else if (pw <= 125) {
239 watchdog.pulse_val = 2;
240 } else if (pw <= 5000) {
241 watchdog.pulse_val = 3;
242 } else {
243 printk(KERN_ERR DRVNAME ": pulse width out of range\n");
244 err = -EINVAL;
245 goto exit_unlock;
246 }
247
248 watchdog.pulse_mode = pw;
249
250exit_unlock:
251 mutex_unlock(&watchdog.lock);
252 return err;
253}
254
255static int watchdog_keepalive(void)
256{
257 int err = 0;
258
259 mutex_lock(&watchdog.lock);
260 err = superio_enter(watchdog.sioaddr);
261 if (err)
262 goto exit_unlock;
263 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
264
265 if (watchdog.minutes_mode)
266 /* select minutes for timer units */
267 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
268 F71808FG_FLAG_WD_UNIT);
269 else
270 /* select seconds for timer units */
271 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
272 F71808FG_FLAG_WD_UNIT);
273
274 /* Set timer value */
275 superio_outb(watchdog.sioaddr, F71808FG_REG_WD_TIME,
276 watchdog.timer_val);
277
278 superio_exit(watchdog.sioaddr);
279
280exit_unlock:
281 mutex_unlock(&watchdog.lock);
282 return err;
283}
284
285static int watchdog_start(void)
286{
287 /* Make sure we don't die as soon as the watchdog is enabled below */
288 int err = watchdog_keepalive();
289 if (err)
290 return err;
291
292 mutex_lock(&watchdog.lock);
293 err = superio_enter(watchdog.sioaddr);
294 if (err)
295 goto exit_unlock;
296 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
297
298 /* Watchdog pin configuration */
299 switch (watchdog.type) {
300 case f71808fg:
301 /* Set pin 21 to GPIO23/WDTRST#, then to WDTRST# */
302 superio_clear_bit(watchdog.sioaddr, 0x2a, 3);
303 superio_clear_bit(watchdog.sioaddr, 0x2b, 3);
304 break;
305
306 case f71882fg:
307 /* Set pin 56 to WDTRST# */
308 superio_set_bit(watchdog.sioaddr, 0x29, 1);
309 break;
310
311 default:
312 /*
313 * 'default' label to shut up the compiler and catch
314 * programmer errors
315 */
316 err = -ENODEV;
317 goto exit_superio;
318 }
319
320 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
321 superio_set_bit(watchdog.sioaddr, SIO_REG_ENABLE, 0);
322 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDO_CONF,
323 F71808FG_FLAG_WDOUT_EN);
324
325 superio_set_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
326 F71808FG_FLAG_WD_EN);
327
328 if (watchdog.pulse_mode) {
329 /* Select "pulse" output mode with given duration */
330 u8 wdt_conf = superio_inb(watchdog.sioaddr,
331 F71808FG_REG_WDT_CONF);
332
333 /* Set WD_PSWIDTH bits (1:0) */
334 wdt_conf = (wdt_conf & 0xfc) | (watchdog.pulse_val & 0x03);
335 /* Set WD_PULSE to "pulse" mode */
336 wdt_conf |= BIT(F71808FG_FLAG_WD_PULSE);
337
338 superio_outb(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
339 wdt_conf);
340 } else {
341 /* Select "level" output mode */
342 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
343 F71808FG_FLAG_WD_PULSE);
344 }
345
346exit_superio:
347 superio_exit(watchdog.sioaddr);
348exit_unlock:
349 mutex_unlock(&watchdog.lock);
350
351 return err;
352}
353
354static int watchdog_stop(void)
355{
356 int err = 0;
357
358 mutex_lock(&watchdog.lock);
359 err = superio_enter(watchdog.sioaddr);
360 if (err)
361 goto exit_unlock;
362 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
363
364 superio_clear_bit(watchdog.sioaddr, F71808FG_REG_WDT_CONF,
365 F71808FG_FLAG_WD_EN);
366
367 superio_exit(watchdog.sioaddr);
368
369exit_unlock:
370 mutex_unlock(&watchdog.lock);
371
372 return err;
373}
374
375static int watchdog_get_status(void)
376{
377 int status = 0;
378
379 mutex_lock(&watchdog.lock);
380 status = (watchdog.caused_reboot) ? WDIOF_CARDRESET : 0;
381 mutex_unlock(&watchdog.lock);
382
383 return status;
384}
385
386static bool watchdog_is_running(void)
387{
388 /*
389 * if we fail to determine the watchdog's status assume it to be
390 * running to be on the safe side
391 */
392 bool is_running = true;
393
394 mutex_lock(&watchdog.lock);
395 if (superio_enter(watchdog.sioaddr))
396 goto exit_unlock;
397 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
398
399 is_running = (superio_inb(watchdog.sioaddr, SIO_REG_ENABLE) & BIT(0))
400 && (superio_inb(watchdog.sioaddr, F71808FG_REG_WDT_CONF)
401 & F71808FG_FLAG_WD_EN);
402
403 superio_exit(watchdog.sioaddr);
404
405exit_unlock:
406 mutex_unlock(&watchdog.lock);
407 return is_running;
408}
409
410/* /dev/watchdog api */
411
412static int watchdog_open(struct inode *inode, struct file *file)
413{
414 int err;
415
416 /* If the watchdog is alive we don't need to start it again */
417 if (test_and_set_bit(0, &watchdog.opened))
418 return -EBUSY;
419
420 err = watchdog_start();
421 if (err) {
422 clear_bit(0, &watchdog.opened);
423 return err;
424 }
425
426 if (nowayout)
427 __module_get(THIS_MODULE);
428
429 watchdog.expect_close = 0;
430 return nonseekable_open(inode, file);
431}
432
433static int watchdog_release(struct inode *inode, struct file *file)
434{
435 clear_bit(0, &watchdog.opened);
436
437 if (!watchdog.expect_close) {
438 watchdog_keepalive();
439 printk(KERN_CRIT DRVNAME
440 ": Unexpected close, not stopping watchdog!\n");
441 } else if (!nowayout) {
442 watchdog_stop();
443 }
444 return 0;
445}
446
447/*
448 * watchdog_write:
449 * @file: file handle to the watchdog
450 * @buf: buffer to write
451 * @count: count of bytes
452 * @ppos: pointer to the position to write. No seeks allowed
453 *
454 * A write to a watchdog device is defined as a keepalive signal. Any
455 * write of data will do, as we we don't define content meaning.
456 */
457
458static ssize_t watchdog_write(struct file *file, const char __user *buf,
459 size_t count, loff_t *ppos)
460{
461 if (count) {
462 if (!nowayout) {
463 size_t i;
464
465 /* In case it was set long ago */
466 bool expect_close = false;
467
468 for (i = 0; i != count; i++) {
469 char c;
470 if (get_user(c, buf + i))
471 return -EFAULT;
472 expect_close = (c == 'V');
473 }
474
475 /* Properly order writes across fork()ed processes */
476 mutex_lock(&watchdog.lock);
477 watchdog.expect_close = expect_close;
478 mutex_unlock(&watchdog.lock);
479 }
480
481 /* someone wrote to us, we should restart timer */
482 watchdog_keepalive();
483 }
484 return count;
485}
486
487/*
488 * watchdog_ioctl:
489 * @inode: inode of the device
490 * @file: file handle to the device
491 * @cmd: watchdog command
492 * @arg: argument pointer
493 *
494 * The watchdog API defines a common set of functions for all watchdogs
495 * according to their available features.
496 */
497static long watchdog_ioctl(struct file *file, unsigned int cmd,
498 unsigned long arg)
499{
500 int status;
501 int new_options;
502 int new_timeout;
503 union {
504 struct watchdog_info __user *ident;
505 int __user *i;
506 } uarg;
507
508 uarg.i = (int __user *)arg;
509
510 switch (cmd) {
511 case WDIOC_GETSUPPORT:
512 return copy_to_user(uarg.ident, &watchdog.ident,
513 sizeof(watchdog.ident)) ? -EFAULT : 0;
514
515 case WDIOC_GETSTATUS:
516 status = watchdog_get_status();
517 if (status < 0)
518 return status;
519 return put_user(status, uarg.i);
520
521 case WDIOC_GETBOOTSTATUS:
522 return put_user(0, uarg.i);
523
524 case WDIOC_SETOPTIONS:
525 if (get_user(new_options, uarg.i))
526 return -EFAULT;
527
528 if (new_options & WDIOS_DISABLECARD)
529 watchdog_stop();
530
531 if (new_options & WDIOS_ENABLECARD)
532 return watchdog_start();
533
534
535 case WDIOC_KEEPALIVE:
536 watchdog_keepalive();
537 return 0;
538
539 case WDIOC_SETTIMEOUT:
540 if (get_user(new_timeout, uarg.i))
541 return -EFAULT;
542
543 if (watchdog_set_timeout(new_timeout))
544 return -EINVAL;
545
546 watchdog_keepalive();
547 /* Fall */
548
549 case WDIOC_GETTIMEOUT:
550 return put_user(watchdog.timeout, uarg.i);
551
552 default:
553 return -ENOTTY;
554
555 }
556}
557
558static int watchdog_notify_sys(struct notifier_block *this, unsigned long code,
559 void *unused)
560{
561 if (code == SYS_DOWN || code == SYS_HALT)
562 watchdog_stop();
563 return NOTIFY_DONE;
564}
565
566static const struct file_operations watchdog_fops = {
567 .owner = THIS_MODULE,
568 .llseek = no_llseek,
569 .open = watchdog_open,
570 .release = watchdog_release,
571 .write = watchdog_write,
572 .unlocked_ioctl = watchdog_ioctl,
573};
574
575static struct miscdevice watchdog_miscdev = {
576 .minor = WATCHDOG_MINOR,
577 .name = "watchdog",
578 .fops = &watchdog_fops,
579};
580
581static struct notifier_block watchdog_notifier = {
582 .notifier_call = watchdog_notify_sys,
583};
584
585static int __init watchdog_init(int sioaddr)
586{
587 int wdt_conf, err = 0;
588
589 /* No need to lock watchdog.lock here because no entry points
590 * into the module have been registered yet.
591 */
592 watchdog.sioaddr = sioaddr;
593 watchdog.ident.options = WDIOC_SETTIMEOUT
594 | WDIOF_MAGICCLOSE
595 | WDIOF_KEEPALIVEPING;
596
597 snprintf(watchdog.ident.identity,
598 sizeof(watchdog.ident.identity), "%s watchdog",
599 f71808e_names[watchdog.type]);
600
601 err = superio_enter(sioaddr);
602 if (err)
603 return err;
604 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
605
606 wdt_conf = superio_inb(sioaddr, F71808FG_REG_WDT_CONF);
607 watchdog.caused_reboot = wdt_conf & F71808FG_FLAG_WDTMOUT_STS;
608
609 superio_exit(sioaddr);
610
611 err = watchdog_set_timeout(timeout);
612 if (err)
613 return err;
614 err = watchdog_set_pulse_width(pulse_width);
615 if (err)
616 return err;
617
618 err = register_reboot_notifier(&watchdog_notifier);
619 if (err)
620 return err;
621
622 err = misc_register(&watchdog_miscdev);
623 if (err) {
624 printk(KERN_ERR DRVNAME
625 ": cannot register miscdev on minor=%d\n",
626 watchdog_miscdev.minor);
627 goto exit_reboot;
628 }
629
630 if (start_withtimeout) {
631 if (start_withtimeout <= 0
632 || start_withtimeout > max_timeout) {
633 printk(KERN_ERR DRVNAME
634 ": starting timeout out of range\n");
635 err = -EINVAL;
636 goto exit_miscdev;
637 }
638
639 err = watchdog_start();
640 if (err) {
641 printk(KERN_ERR DRVNAME
642 ": cannot start watchdog timer\n");
643 goto exit_miscdev;
644 }
645
646 mutex_lock(&watchdog.lock);
647 err = superio_enter(sioaddr);
648 if (err)
649 goto exit_unlock;
650 superio_select(watchdog.sioaddr, SIO_F71808FG_LD_WDT);
651
652 if (start_withtimeout > 0xff) {
653 /* select minutes for timer units */
654 superio_set_bit(sioaddr, F71808FG_REG_WDT_CONF,
655 F71808FG_FLAG_WD_UNIT);
656 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
657 DIV_ROUND_UP(start_withtimeout, 60));
658 } else {
659 /* select seconds for timer units */
660 superio_clear_bit(sioaddr, F71808FG_REG_WDT_CONF,
661 F71808FG_FLAG_WD_UNIT);
662 superio_outb(sioaddr, F71808FG_REG_WD_TIME,
663 start_withtimeout);
664 }
665
666 superio_exit(sioaddr);
667 mutex_unlock(&watchdog.lock);
668
669 if (nowayout)
670 __module_get(THIS_MODULE);
671
672 printk(KERN_INFO DRVNAME
673 ": watchdog started with initial timeout of %u sec\n",
674 start_withtimeout);
675 }
676
677 return 0;
678
679exit_unlock:
680 mutex_unlock(&watchdog.lock);
681exit_miscdev:
682 misc_deregister(&watchdog_miscdev);
683exit_reboot:
684 unregister_reboot_notifier(&watchdog_notifier);
685
686 return err;
687}
688
689static int __init f71808e_find(int sioaddr)
690{
691 u16 devid;
692 int err = superio_enter(sioaddr);
693 if (err)
694 return err;
695
696 devid = superio_inw(sioaddr, SIO_REG_MANID);
697 if (devid != SIO_FINTEK_ID) {
698 pr_debug(DRVNAME ": Not a Fintek device\n");
699 err = -ENODEV;
700 goto exit;
701 }
702
703 devid = force_id ? force_id : superio_inw(sioaddr, SIO_REG_DEVID);
704 switch (devid) {
705 case SIO_F71808_ID:
706 watchdog.type = f71808fg;
707 break;
708 case SIO_F71882_ID:
709 watchdog.type = f71882fg;
710 break;
711 case SIO_F71862_ID:
712 case SIO_F71889_ID:
713 /* These have a watchdog, though it isn't implemented (yet). */
714 err = -ENOSYS;
715 goto exit;
716 case SIO_F71858_ID:
717 /* Confirmed (by datasheet) not to have a watchdog. */
718 err = -ENODEV;
719 goto exit;
720 default:
721 printk(KERN_INFO DRVNAME ": Unrecognized Fintek device: %04x\n",
722 (unsigned int)devid);
723 err = -ENODEV;
724 goto exit;
725 }
726
727 printk(KERN_INFO DRVNAME ": Found %s watchdog chip, revision %d\n",
728 f71808e_names[watchdog.type],
729 (int)superio_inb(sioaddr, SIO_REG_DEVREV));
730exit:
731 superio_exit(sioaddr);
732 return err;
733}
734
735static int __init f71808e_init(void)
736{
737 static const unsigned short addrs[] = { 0x2e, 0x4e };
738 int err = -ENODEV;
739 int i;
740
741 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
742 err = f71808e_find(addrs[i]);
743 if (err == 0)
744 break;
745 }
746 if (i == ARRAY_SIZE(addrs))
747 return err;
748
749 return watchdog_init(addrs[i]);
750}
751
752static void __exit f71808e_exit(void)
753{
754 if (watchdog_is_running()) {
755 printk(KERN_WARNING DRVNAME
756 ": Watchdog timer still running, stopping it\n");
757 watchdog_stop();
758 }
759 misc_deregister(&watchdog_miscdev);
760 unregister_reboot_notifier(&watchdog_notifier);
761}
762
763MODULE_DESCRIPTION("F71808E Watchdog Driver");
764MODULE_AUTHOR("Giel van Schijndel <me@mortis.eu>");
765MODULE_LICENSE("GPL");
766
767module_init(f71808e_init);
768module_exit(f71808e_exit);
diff --git a/drivers/watchdog/hpwdt.c b/drivers/watchdog/hpwdt.c
index 809e7167a624..fd312fc8940e 100644
--- a/drivers/watchdog/hpwdt.c
+++ b/drivers/watchdog/hpwdt.c
@@ -246,8 +246,8 @@ static int __devinit cru_detect(unsigned long map_entry,
246 physical_bios_offset); 246 physical_bios_offset);
247 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n", 247 printk(KERN_DEBUG "hpwdt: CRU Length: 0x%lx\n",
248 cru_length); 248 cru_length);
249 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: 0x%x\n", 249 printk(KERN_DEBUG "hpwdt: CRU Mapped Address: %p\n",
250 (unsigned int)&cru_rom_addr); 250 &cru_rom_addr);
251 } 251 }
252 iounmap(bios32_map); 252 iounmap(bios32_map);
253 return retval; 253 return retval;
diff --git a/drivers/watchdog/s3c2410_wdt.c b/drivers/watchdog/s3c2410_wdt.c
index 300932580ded..ae53662c29bc 100644
--- a/drivers/watchdog/s3c2410_wdt.c
+++ b/drivers/watchdog/s3c2410_wdt.c
@@ -532,21 +532,22 @@ static int __devinit s3c2410wdt_probe(struct platform_device *pdev)
532 532
533static int __devexit s3c2410wdt_remove(struct platform_device *dev) 533static int __devexit s3c2410wdt_remove(struct platform_device *dev)
534{ 534{
535 s3c2410wdt_cpufreq_deregister(); 535 misc_deregister(&s3c2410wdt_miscdev);
536
537 release_resource(wdt_mem);
538 kfree(wdt_mem);
539 wdt_mem = NULL;
540 536
541 free_irq(wdt_irq->start, dev); 537 s3c2410wdt_cpufreq_deregister();
542 wdt_irq = NULL;
543 538
544 clk_disable(wdt_clock); 539 clk_disable(wdt_clock);
545 clk_put(wdt_clock); 540 clk_put(wdt_clock);
546 wdt_clock = NULL; 541 wdt_clock = NULL;
547 542
543 free_irq(wdt_irq->start, dev);
544 wdt_irq = NULL;
545
548 iounmap(wdt_base); 546 iounmap(wdt_base);
549 misc_deregister(&s3c2410wdt_miscdev); 547
548 release_resource(wdt_mem);
549 kfree(wdt_mem);
550 wdt_mem = NULL;
550 return 0; 551 return 0;
551} 552}
552 553
diff --git a/drivers/watchdog/sch311x_wdt.c b/drivers/watchdog/sch311x_wdt.c
index 9c40f48804f5..0461858e07d0 100644
--- a/drivers/watchdog/sch311x_wdt.c
+++ b/drivers/watchdog/sch311x_wdt.c
@@ -425,6 +425,8 @@ static int __devinit sch311x_wdt_probe(struct platform_device *pdev)
425 val = therm_trip ? 0x06 : 0x04; 425 val = therm_trip ? 0x06 : 0x04;
426 outb(val, sch311x_wdt_data.runtime_reg + RESGEN); 426 outb(val, sch311x_wdt_data.runtime_reg + RESGEN);
427 427
428 sch311x_wdt_miscdev.parent = dev;
429
428 err = misc_register(&sch311x_wdt_miscdev); 430 err = misc_register(&sch311x_wdt_miscdev);
429 if (err != 0) { 431 if (err != 0) {
430 dev_err(dev, "cannot register miscdev on minor=%d (err=%d)\n", 432 dev_err(dev, "cannot register miscdev on minor=%d (err=%d)\n",
@@ -432,8 +434,6 @@ static int __devinit sch311x_wdt_probe(struct platform_device *pdev)
432 goto exit_release_region3; 434 goto exit_release_region3;
433 } 435 }
434 436
435 sch311x_wdt_miscdev.parent = dev;
436
437 dev_info(dev, 437 dev_info(dev,
438 "SMSC SCH311x WDT initialized. timeout=%d sec (nowayout=%d)\n", 438 "SMSC SCH311x WDT initialized. timeout=%d sec (nowayout=%d)\n",
439 timeout, nowayout); 439 timeout, nowayout);
diff --git a/drivers/watchdog/sp805_wdt.c b/drivers/watchdog/sp805_wdt.c
new file mode 100644
index 000000000000..9127eda2145b
--- /dev/null
+++ b/drivers/watchdog/sp805_wdt.c
@@ -0,0 +1,387 @@
1/*
2 * drivers/char/watchdog/sp805-wdt.c
3 *
4 * Watchdog driver for ARM SP805 watchdog module
5 *
6 * Copyright (C) 2010 ST Microelectronics
7 * Viresh Kumar<viresh.kumar@st.com>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2 or later. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14#include <linux/device.h>
15#include <linux/resource.h>
16#include <linux/amba/bus.h>
17#include <linux/bitops.h>
18#include <linux/clk.h>
19#include <linux/fs.h>
20#include <linux/init.h>
21#include <linux/io.h>
22#include <linux/ioport.h>
23#include <linux/kernel.h>
24#include <linux/math64.h>
25#include <linux/miscdevice.h>
26#include <linux/module.h>
27#include <linux/moduleparam.h>
28#include <linux/slab.h>
29#include <linux/spinlock.h>
30#include <linux/types.h>
31#include <linux/uaccess.h>
32#include <linux/watchdog.h>
33
34/* default timeout in seconds */
35#define DEFAULT_TIMEOUT 60
36
37#define MODULE_NAME "sp805-wdt"
38
39/* watchdog register offsets and masks */
40#define WDTLOAD 0x000
41 #define LOAD_MIN 0x00000001
42 #define LOAD_MAX 0xFFFFFFFF
43#define WDTVALUE 0x004
44#define WDTCONTROL 0x008
45 /* control register masks */
46 #define INT_ENABLE (1 << 0)
47 #define RESET_ENABLE (1 << 1)
48#define WDTINTCLR 0x00C
49#define WDTRIS 0x010
50#define WDTMIS 0x014
51 #define INT_MASK (1 << 0)
52#define WDTLOCK 0xC00
53 #define UNLOCK 0x1ACCE551
54 #define LOCK 0x00000001
55
56/**
57 * struct sp805_wdt: sp805 wdt device structure
58 *
59 * lock: spin lock protecting dev structure and io access
60 * base: base address of wdt
61 * clk: clock structure of wdt
62 * dev: amba device structure of wdt
63 * status: current status of wdt
64 * load_val: load value to be set for current timeout
65 * timeout: current programmed timeout
66 */
67struct sp805_wdt {
68 spinlock_t lock;
69 void __iomem *base;
70 struct clk *clk;
71 struct amba_device *adev;
72 unsigned long status;
73 #define WDT_BUSY 0
74 #define WDT_CAN_BE_CLOSED 1
75 unsigned int load_val;
76 unsigned int timeout;
77};
78
79/* local variables */
80static struct sp805_wdt *wdt;
81static int nowayout = WATCHDOG_NOWAYOUT;
82
83/* This routine finds load value that will reset system in required timout */
84static void wdt_setload(unsigned int timeout)
85{
86 u64 load, rate;
87
88 rate = clk_get_rate(wdt->clk);
89
90 /*
91 * sp805 runs counter with given value twice, after the end of first
92 * counter it gives an interrupt and then starts counter again. If
93 * interrupt already occured then it resets the system. This is why
94 * load is half of what should be required.
95 */
96 load = div_u64(rate, 2) * timeout - 1;
97
98 load = (load > LOAD_MAX) ? LOAD_MAX : load;
99 load = (load < LOAD_MIN) ? LOAD_MIN : load;
100
101 spin_lock(&wdt->lock);
102 wdt->load_val = load;
103 /* roundup timeout to closest positive integer value */
104 wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
105 spin_unlock(&wdt->lock);
106}
107
108/* returns number of seconds left for reset to occur */
109static u32 wdt_timeleft(void)
110{
111 u64 load, rate;
112
113 rate = clk_get_rate(wdt->clk);
114
115 spin_lock(&wdt->lock);
116 load = readl(wdt->base + WDTVALUE);
117
118 /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
119 if (!(readl(wdt->base + WDTRIS) & INT_MASK))
120 load += wdt->load_val + 1;
121 spin_unlock(&wdt->lock);
122
123 return div_u64(load, rate);
124}
125
126/* enables watchdog timers reset */
127static void wdt_enable(void)
128{
129 spin_lock(&wdt->lock);
130
131 writel(UNLOCK, wdt->base + WDTLOCK);
132 writel(wdt->load_val, wdt->base + WDTLOAD);
133 writel(INT_MASK, wdt->base + WDTINTCLR);
134 writel(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
135 writel(LOCK, wdt->base + WDTLOCK);
136
137 spin_unlock(&wdt->lock);
138}
139
140/* disables watchdog timers reset */
141static void wdt_disable(void)
142{
143 spin_lock(&wdt->lock);
144
145 writel(UNLOCK, wdt->base + WDTLOCK);
146 writel(0, wdt->base + WDTCONTROL);
147 writel(0, wdt->base + WDTLOAD);
148 writel(LOCK, wdt->base + WDTLOCK);
149
150 spin_unlock(&wdt->lock);
151}
152
153static ssize_t sp805_wdt_write(struct file *file, const char *data,
154 size_t len, loff_t *ppos)
155{
156 if (len) {
157 if (!nowayout) {
158 size_t i;
159
160 clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
161
162 for (i = 0; i != len; i++) {
163 char c;
164
165 if (get_user(c, data + i))
166 return -EFAULT;
167 /* Check for Magic Close character */
168 if (c == 'V') {
169 set_bit(WDT_CAN_BE_CLOSED,
170 &wdt->status);
171 break;
172 }
173 }
174 }
175 wdt_enable();
176 }
177 return len;
178}
179
180static const struct watchdog_info ident = {
181 .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
182 .identity = MODULE_NAME,
183};
184
185static long sp805_wdt_ioctl(struct file *file, unsigned int cmd,
186 unsigned long arg)
187{
188 int ret = -ENOTTY;
189 unsigned int timeout;
190
191 switch (cmd) {
192 case WDIOC_GETSUPPORT:
193 ret = copy_to_user((struct watchdog_info *)arg, &ident,
194 sizeof(ident)) ? -EFAULT : 0;
195 break;
196
197 case WDIOC_GETSTATUS:
198 ret = put_user(0, (int *)arg);
199 break;
200
201 case WDIOC_KEEPALIVE:
202 wdt_enable();
203 ret = 0;
204 break;
205
206 case WDIOC_SETTIMEOUT:
207 ret = get_user(timeout, (unsigned int *)arg);
208 if (ret)
209 break;
210
211 wdt_setload(timeout);
212
213 wdt_enable();
214 /* Fall through */
215
216 case WDIOC_GETTIMEOUT:
217 ret = put_user(wdt->timeout, (unsigned int *)arg);
218 break;
219 case WDIOC_GETTIMELEFT:
220 ret = put_user(wdt_timeleft(), (unsigned int *)arg);
221 break;
222 }
223 return ret;
224}
225
226static int sp805_wdt_open(struct inode *inode, struct file *file)
227{
228 int ret = 0;
229
230 if (test_and_set_bit(WDT_BUSY, &wdt->status))
231 return -EBUSY;
232
233 ret = clk_enable(wdt->clk);
234 if (ret) {
235 dev_err(&wdt->adev->dev, "clock enable fail");
236 goto err;
237 }
238
239 wdt_enable();
240
241 /* can not be closed, once enabled */
242 clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
243 return nonseekable_open(inode, file);
244
245err:
246 clear_bit(WDT_BUSY, &wdt->status);
247 return ret;
248}
249
250static int sp805_wdt_release(struct inode *inode, struct file *file)
251{
252 if (!test_bit(WDT_CAN_BE_CLOSED, &wdt->status)) {
253 clear_bit(WDT_BUSY, &wdt->status);
254 dev_warn(&wdt->adev->dev, "Device closed unexpectedly\n");
255 return 0;
256 }
257
258 wdt_disable();
259 clk_disable(wdt->clk);
260 clear_bit(WDT_BUSY, &wdt->status);
261
262 return 0;
263}
264
265static const struct file_operations sp805_wdt_fops = {
266 .owner = THIS_MODULE,
267 .llseek = no_llseek,
268 .write = sp805_wdt_write,
269 .unlocked_ioctl = sp805_wdt_ioctl,
270 .open = sp805_wdt_open,
271 .release = sp805_wdt_release,
272};
273
274static struct miscdevice sp805_wdt_miscdev = {
275 .minor = WATCHDOG_MINOR,
276 .name = "watchdog",
277 .fops = &sp805_wdt_fops,
278};
279
280static int __devinit
281sp805_wdt_probe(struct amba_device *adev, struct amba_id *id)
282{
283 int ret = 0;
284
285 if (!request_mem_region(adev->res.start, resource_size(&adev->res),
286 "sp805_wdt")) {
287 dev_warn(&adev->dev, "Failed to get memory region resource\n");
288 ret = -ENOENT;
289 goto err;
290 }
291
292 wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
293 if (!wdt) {
294 dev_warn(&adev->dev, "Kzalloc failed\n");
295 ret = -ENOMEM;
296 goto err_kzalloc;
297 }
298
299 wdt->clk = clk_get(&adev->dev, NULL);
300 if (IS_ERR(wdt->clk)) {
301 dev_warn(&adev->dev, "Clock not found\n");
302 ret = PTR_ERR(wdt->clk);
303 goto err_clk_get;
304 }
305
306 wdt->base = ioremap(adev->res.start, resource_size(&adev->res));
307 if (!wdt->base) {
308 ret = -ENOMEM;
309 dev_warn(&adev->dev, "ioremap fail\n");
310 goto err_ioremap;
311 }
312
313 wdt->adev = adev;
314 spin_lock_init(&wdt->lock);
315 wdt_setload(DEFAULT_TIMEOUT);
316
317 ret = misc_register(&sp805_wdt_miscdev);
318 if (ret < 0) {
319 dev_warn(&adev->dev, "cannot register misc device\n");
320 goto err_misc_register;
321 }
322
323 dev_info(&adev->dev, "registration successful\n");
324 return 0;
325
326err_misc_register:
327 iounmap(wdt->base);
328err_ioremap:
329 clk_put(wdt->clk);
330err_clk_get:
331 kfree(wdt);
332 wdt = NULL;
333err_kzalloc:
334 release_mem_region(adev->res.start, resource_size(&adev->res));
335err:
336 dev_err(&adev->dev, "Probe Failed!!!\n");
337 return ret;
338}
339
340static int __devexit sp805_wdt_remove(struct amba_device *adev)
341{
342 misc_deregister(&sp805_wdt_miscdev);
343 iounmap(wdt->base);
344 clk_put(wdt->clk);
345 kfree(wdt);
346 release_mem_region(adev->res.start, resource_size(&adev->res));
347
348 return 0;
349}
350
351static struct amba_id sp805_wdt_ids[] __initdata = {
352 {
353 .id = 0x00141805,
354 .mask = 0x00ffffff,
355 },
356 { 0, 0 },
357};
358
359static struct amba_driver sp805_wdt_driver = {
360 .drv = {
361 .name = MODULE_NAME,
362 },
363 .id_table = sp805_wdt_ids,
364 .probe = sp805_wdt_probe,
365 .remove = __devexit_p(sp805_wdt_remove),
366};
367
368static int __init sp805_wdt_init(void)
369{
370 return amba_driver_register(&sp805_wdt_driver);
371}
372module_init(sp805_wdt_init);
373
374static void __exit sp805_wdt_exit(void)
375{
376 amba_driver_unregister(&sp805_wdt_driver);
377}
378module_exit(sp805_wdt_exit);
379
380module_param(nowayout, int, 0);
381MODULE_PARM_DESC(nowayout,
382 "Set to 1 to keep watchdog running after device release");
383
384MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
385MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
386MODULE_LICENSE("GPL");
387MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);
diff --git a/drivers/watchdog/wdt_pci.c b/drivers/watchdog/wdt_pci.c
index 7b22e3cdbc81..6130c88fa5ac 100644
--- a/drivers/watchdog/wdt_pci.c
+++ b/drivers/watchdog/wdt_pci.c
@@ -60,19 +60,6 @@
60 60
61#define PFX "wdt_pci: " 61#define PFX "wdt_pci: "
62 62
63/*
64 * Until Access I/O gets their application for a PCI vendor ID approved,
65 * I don't think that it's appropriate to move these constants into the
66 * regular pci_ids.h file. -- JPN 2000/01/18
67 */
68
69#ifndef PCI_VENDOR_ID_ACCESSIO
70#define PCI_VENDOR_ID_ACCESSIO 0x494f
71#endif
72#ifndef PCI_DEVICE_ID_WDG_CSM
73#define PCI_DEVICE_ID_WDG_CSM 0x22c0
74#endif
75
76/* We can only use 1 card due to the /dev/watchdog restriction */ 63/* We can only use 1 card due to the /dev/watchdog restriction */
77static int dev_count; 64static int dev_count;
78 65
@@ -743,7 +730,7 @@ static void __devexit wdtpci_remove_one(struct pci_dev *pdev)
743static struct pci_device_id wdtpci_pci_tbl[] = { 730static struct pci_device_id wdtpci_pci_tbl[] = {
744 { 731 {
745 .vendor = PCI_VENDOR_ID_ACCESSIO, 732 .vendor = PCI_VENDOR_ID_ACCESSIO,
746 .device = PCI_DEVICE_ID_WDG_CSM, 733 .device = PCI_DEVICE_ID_ACCESSIO_WDG_CSM,
747 .subvendor = PCI_ANY_ID, 734 .subvendor = PCI_ANY_ID,
748 .subdevice = PCI_ANY_ID, 735 .subdevice = PCI_ANY_ID,
749 }, 736 },