diff options
Diffstat (limited to 'drivers')
63 files changed, 501 insertions, 278 deletions
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c index fb7b90b05922..cf26222a93c5 100644 --- a/drivers/ata/ahci.c +++ b/drivers/ata/ahci.c | |||
| @@ -390,6 +390,9 @@ static const struct pci_device_id ahci_pci_tbl[] = { | |||
| 390 | /* Promise */ | 390 | /* Promise */ |
| 391 | { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */ | 391 | { PCI_VDEVICE(PROMISE, 0x3f20), board_ahci }, /* PDC42819 */ |
| 392 | 392 | ||
| 393 | /* Asmedia */ | ||
| 394 | { PCI_VDEVICE(ASMEDIA, 0x0612), board_ahci }, /* ASM1061 */ | ||
| 395 | |||
| 393 | /* Generic, PCI class code for AHCI */ | 396 | /* Generic, PCI class code for AHCI */ |
| 394 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, | 397 | { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, |
| 395 | PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci }, | 398 | PCI_CLASS_STORAGE_SATA_AHCI, 0xffffff, board_ahci }, |
diff --git a/drivers/ata/ahci_platform.c b/drivers/ata/ahci_platform.c index 004f2ce3dc73..ec555951176e 100644 --- a/drivers/ata/ahci_platform.c +++ b/drivers/ata/ahci_platform.c | |||
| @@ -65,7 +65,7 @@ static struct scsi_host_template ahci_platform_sht = { | |||
| 65 | static int __init ahci_probe(struct platform_device *pdev) | 65 | static int __init ahci_probe(struct platform_device *pdev) |
| 66 | { | 66 | { |
| 67 | struct device *dev = &pdev->dev; | 67 | struct device *dev = &pdev->dev; |
| 68 | struct ahci_platform_data *pdata = dev->platform_data; | 68 | struct ahci_platform_data *pdata = dev_get_platdata(dev); |
| 69 | const struct platform_device_id *id = platform_get_device_id(pdev); | 69 | const struct platform_device_id *id = platform_get_device_id(pdev); |
| 70 | struct ata_port_info pi = ahci_port_info[id->driver_data]; | 70 | struct ata_port_info pi = ahci_port_info[id->driver_data]; |
| 71 | const struct ata_port_info *ppi[] = { &pi, NULL }; | 71 | const struct ata_port_info *ppi[] = { &pi, NULL }; |
| @@ -191,7 +191,7 @@ err0: | |||
| 191 | static int __devexit ahci_remove(struct platform_device *pdev) | 191 | static int __devexit ahci_remove(struct platform_device *pdev) |
| 192 | { | 192 | { |
| 193 | struct device *dev = &pdev->dev; | 193 | struct device *dev = &pdev->dev; |
| 194 | struct ahci_platform_data *pdata = dev->platform_data; | 194 | struct ahci_platform_data *pdata = dev_get_platdata(dev); |
| 195 | struct ata_host *host = dev_get_drvdata(dev); | 195 | struct ata_host *host = dev_get_drvdata(dev); |
| 196 | 196 | ||
| 197 | ata_host_detach(host); | 197 | ata_host_detach(host); |
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c index f22957c2769a..a9b282038000 100644 --- a/drivers/ata/libata-eh.c +++ b/drivers/ata/libata-eh.c | |||
| @@ -2883,7 +2883,7 @@ int ata_eh_reset(struct ata_link *link, int classify, | |||
| 2883 | sata_scr_read(link, SCR_STATUS, &sstatus)) | 2883 | sata_scr_read(link, SCR_STATUS, &sstatus)) |
| 2884 | rc = -ERESTART; | 2884 | rc = -ERESTART; |
| 2885 | 2885 | ||
| 2886 | if (rc == -ERESTART || try >= max_tries) { | 2886 | if (try >= max_tries) { |
| 2887 | /* | 2887 | /* |
| 2888 | * Thaw host port even if reset failed, so that the port | 2888 | * Thaw host port even if reset failed, so that the port |
| 2889 | * can be retried on the next phy event. This risks | 2889 | * can be retried on the next phy event. This risks |
| @@ -2909,6 +2909,16 @@ int ata_eh_reset(struct ata_link *link, int classify, | |||
| 2909 | ata_eh_acquire(ap); | 2909 | ata_eh_acquire(ap); |
| 2910 | } | 2910 | } |
| 2911 | 2911 | ||
| 2912 | /* | ||
| 2913 | * While disks spinup behind PMP, some controllers fail sending SRST. | ||
| 2914 | * They need to be reset - as well as the PMP - before retrying. | ||
| 2915 | */ | ||
| 2916 | if (rc == -ERESTART) { | ||
| 2917 | if (ata_is_host_link(link)) | ||
| 2918 | ata_eh_thaw_port(ap); | ||
| 2919 | goto out; | ||
| 2920 | } | ||
| 2921 | |||
| 2912 | if (try == max_tries - 1) { | 2922 | if (try == max_tries - 1) { |
| 2913 | sata_down_spd_limit(link, 0); | 2923 | sata_down_spd_limit(link, 0); |
| 2914 | if (slave) | 2924 | if (slave) |
diff --git a/drivers/ata/libata-pmp.c b/drivers/ata/libata-pmp.c index 104462dbc524..21b80c555c60 100644 --- a/drivers/ata/libata-pmp.c +++ b/drivers/ata/libata-pmp.c | |||
| @@ -389,12 +389,9 @@ static void sata_pmp_quirks(struct ata_port *ap) | |||
| 389 | /* link reports offline after LPM */ | 389 | /* link reports offline after LPM */ |
| 390 | link->flags |= ATA_LFLAG_NO_LPM; | 390 | link->flags |= ATA_LFLAG_NO_LPM; |
| 391 | 391 | ||
| 392 | /* Class code report is unreliable and SRST | 392 | /* Class code report is unreliable. */ |
| 393 | * times out under certain configurations. | ||
| 394 | */ | ||
| 395 | if (link->pmp < 5) | 393 | if (link->pmp < 5) |
| 396 | link->flags |= ATA_LFLAG_NO_SRST | | 394 | link->flags |= ATA_LFLAG_ASSUME_ATA; |
| 397 | ATA_LFLAG_ASSUME_ATA; | ||
| 398 | 395 | ||
| 399 | /* port 5 is for SEMB device and it doesn't like SRST */ | 396 | /* port 5 is for SEMB device and it doesn't like SRST */ |
| 400 | if (link->pmp == 5) | 397 | if (link->pmp == 5) |
diff --git a/drivers/ata/libata-scsi.c b/drivers/ata/libata-scsi.c index 72a9770ac42f..2a5412e7e9c1 100644 --- a/drivers/ata/libata-scsi.c +++ b/drivers/ata/libata-scsi.c | |||
| @@ -1217,6 +1217,10 @@ void ata_scsi_slave_destroy(struct scsi_device *sdev) | |||
| 1217 | 1217 | ||
| 1218 | /** | 1218 | /** |
| 1219 | * __ata_change_queue_depth - helper for ata_scsi_change_queue_depth | 1219 | * __ata_change_queue_depth - helper for ata_scsi_change_queue_depth |
| 1220 | * @ap: ATA port to which the device change the queue depth | ||
| 1221 | * @sdev: SCSI device to configure queue depth for | ||
| 1222 | * @queue_depth: new queue depth | ||
| 1223 | * @reason: calling context | ||
| 1220 | * | 1224 | * |
| 1221 | * libsas and libata have different approaches for associating a sdev to | 1225 | * libsas and libata have different approaches for associating a sdev to |
| 1222 | * its ata_port. | 1226 | * its ata_port. |
diff --git a/drivers/ata/pata_of_platform.c b/drivers/ata/pata_of_platform.c index a72ab0dde4e5..2a472c5bb7db 100644 --- a/drivers/ata/pata_of_platform.c +++ b/drivers/ata/pata_of_platform.c | |||
| @@ -52,7 +52,7 @@ static int __devinit pata_of_platform_probe(struct platform_device *ofdev) | |||
| 52 | } | 52 | } |
| 53 | 53 | ||
| 54 | ret = of_irq_to_resource(dn, 0, &irq_res); | 54 | ret = of_irq_to_resource(dn, 0, &irq_res); |
| 55 | if (ret == NO_IRQ) | 55 | if (!ret) |
| 56 | irq_res.start = irq_res.end = 0; | 56 | irq_res.start = irq_res.end = 0; |
| 57 | else | 57 | else |
| 58 | irq_res.flags = 0; | 58 | irq_res.flags = 0; |
diff --git a/drivers/ata/sata_sis.c b/drivers/ata/sata_sis.c index 447d9c05fb5a..95ec435f0eb4 100644 --- a/drivers/ata/sata_sis.c +++ b/drivers/ata/sata_sis.c | |||
| @@ -104,7 +104,7 @@ static const struct ata_port_info sis_port_info = { | |||
| 104 | }; | 104 | }; |
| 105 | 105 | ||
| 106 | MODULE_AUTHOR("Uwe Koziolek"); | 106 | MODULE_AUTHOR("Uwe Koziolek"); |
| 107 | MODULE_DESCRIPTION("low-level driver for Silicon Integratad Systems SATA controller"); | 107 | MODULE_DESCRIPTION("low-level driver for Silicon Integrated Systems SATA controller"); |
| 108 | MODULE_LICENSE("GPL"); | 108 | MODULE_LICENSE("GPL"); |
| 109 | MODULE_DEVICE_TABLE(pci, sis_pci_tbl); | 109 | MODULE_DEVICE_TABLE(pci, sis_pci_tbl); |
| 110 | MODULE_VERSION(DRV_VERSION); | 110 | MODULE_VERSION(DRV_VERSION); |
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 66cd0b8096ca..c92424ca1a55 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
| @@ -1186,10 +1186,11 @@ static void gen6_cleanup(void) | |||
| 1186 | /* Certain Gen5 chipsets require require idling the GPU before | 1186 | /* Certain Gen5 chipsets require require idling the GPU before |
| 1187 | * unmapping anything from the GTT when VT-d is enabled. | 1187 | * unmapping anything from the GTT when VT-d is enabled. |
| 1188 | */ | 1188 | */ |
| 1189 | extern int intel_iommu_gfx_mapped; | ||
| 1190 | static inline int needs_idle_maps(void) | 1189 | static inline int needs_idle_maps(void) |
| 1191 | { | 1190 | { |
| 1191 | #ifdef CONFIG_INTEL_IOMMU | ||
| 1192 | const unsigned short gpu_devid = intel_private.pcidev->device; | 1192 | const unsigned short gpu_devid = intel_private.pcidev->device; |
| 1193 | extern int intel_iommu_gfx_mapped; | ||
| 1193 | 1194 | ||
| 1194 | /* Query intel_iommu to see if we need the workaround. Presumably that | 1195 | /* Query intel_iommu to see if we need the workaround. Presumably that |
| 1195 | * was loaded first. | 1196 | * was loaded first. |
| @@ -1198,7 +1199,7 @@ static inline int needs_idle_maps(void) | |||
| 1198 | gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) && | 1199 | gpu_devid == PCI_DEVICE_ID_INTEL_IRONLAKE_M_IG) && |
| 1199 | intel_iommu_gfx_mapped) | 1200 | intel_iommu_gfx_mapped) |
| 1200 | return 1; | 1201 | return 1; |
| 1201 | 1202 | #endif | |
| 1202 | return 0; | 1203 | return 0; |
| 1203 | } | 1204 | } |
| 1204 | 1205 | ||
| @@ -1236,7 +1237,7 @@ static int i9xx_setup(void) | |||
| 1236 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; | 1237 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; |
| 1237 | } | 1238 | } |
| 1238 | 1239 | ||
| 1239 | if (needs_idle_maps()); | 1240 | if (needs_idle_maps()) |
| 1240 | intel_private.base.do_idle_maps = 1; | 1241 | intel_private.base.do_idle_maps = 1; |
| 1241 | 1242 | ||
| 1242 | intel_i9xx_setup_flush(); | 1243 | intel_i9xx_setup_flush(); |
diff --git a/drivers/cpufreq/db8500-cpufreq.c b/drivers/cpufreq/db8500-cpufreq.c index edaa987621ea..f5002015d82e 100644 --- a/drivers/cpufreq/db8500-cpufreq.c +++ b/drivers/cpufreq/db8500-cpufreq.c | |||
| @@ -109,7 +109,7 @@ static unsigned int db8500_cpufreq_getspeed(unsigned int cpu) | |||
| 109 | 109 | ||
| 110 | static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) | 110 | static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) |
| 111 | { | 111 | { |
| 112 | int res; | 112 | int i, res; |
| 113 | 113 | ||
| 114 | BUILD_BUG_ON(ARRAY_SIZE(idx2opp) + 1 != ARRAY_SIZE(freq_table)); | 114 | BUILD_BUG_ON(ARRAY_SIZE(idx2opp) + 1 != ARRAY_SIZE(freq_table)); |
| 115 | 115 | ||
| @@ -120,8 +120,8 @@ static int __cpuinit db8500_cpufreq_init(struct cpufreq_policy *policy) | |||
| 120 | freq_table[3].frequency = 1000000; | 120 | freq_table[3].frequency = 1000000; |
| 121 | } | 121 | } |
| 122 | pr_info("db8500-cpufreq : Available frequencies:\n"); | 122 | pr_info("db8500-cpufreq : Available frequencies:\n"); |
| 123 | while (freq_table[i].frequency != CPUFREQ_TABLE_END) | 123 | for (i = 0; freq_table[i].frequency != CPUFREQ_TABLE_END; i++) |
| 124 | pr_info(" %d Mhz\n", freq_table[i++].frequency/1000); | 124 | pr_info(" %d Mhz\n", freq_table[i].frequency/1000); |
| 125 | 125 | ||
| 126 | /* get policy fields based on the table */ | 126 | /* get policy fields based on the table */ |
| 127 | res = cpufreq_frequency_table_cpuinfo(policy, freq_table); | 127 | res = cpufreq_frequency_table_cpuinfo(policy, freq_table); |
diff --git a/drivers/gpu/drm/Kconfig b/drivers/gpu/drm/Kconfig index 785127cb281b..1368826ef284 100644 --- a/drivers/gpu/drm/Kconfig +++ b/drivers/gpu/drm/Kconfig | |||
| @@ -9,7 +9,6 @@ menuconfig DRM | |||
| 9 | depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU | 9 | depends on (AGP || AGP=n) && !EMULATED_CMPXCHG && MMU |
| 10 | select I2C | 10 | select I2C |
| 11 | select I2C_ALGOBIT | 11 | select I2C_ALGOBIT |
| 12 | select SLOW_WORK | ||
| 13 | help | 12 | help |
| 14 | Kernel-level support for the Direct Rendering Infrastructure (DRI) | 13 | Kernel-level support for the Direct Rendering Infrastructure (DRI) |
| 15 | introduced in XFree86 4.0. If you say Y here, you need to select | 14 | introduced in XFree86 4.0. If you say Y here, you need to select |
| @@ -96,6 +95,7 @@ config DRM_I915 | |||
| 96 | select FB_CFB_IMAGEBLIT | 95 | select FB_CFB_IMAGEBLIT |
| 97 | # i915 depends on ACPI_VIDEO when ACPI is enabled | 96 | # i915 depends on ACPI_VIDEO when ACPI is enabled |
| 98 | # but for select to work, need to select ACPI_VIDEO's dependencies, ick | 97 | # but for select to work, need to select ACPI_VIDEO's dependencies, ick |
| 98 | select BACKLIGHT_LCD_SUPPORT if ACPI | ||
| 99 | select BACKLIGHT_CLASS_DEVICE if ACPI | 99 | select BACKLIGHT_CLASS_DEVICE if ACPI |
| 100 | select VIDEO_OUTPUT_CONTROL if ACPI | 100 | select VIDEO_OUTPUT_CONTROL if ACPI |
| 101 | select INPUT if ACPI | 101 | select INPUT if ACPI |
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c index 9a2e2a14b3bb..405c63b9d539 100644 --- a/drivers/gpu/drm/drm_crtc.c +++ b/drivers/gpu/drm/drm_crtc.c | |||
| @@ -2118,8 +2118,10 @@ struct drm_property *drm_property_create(struct drm_device *dev, int flags, | |||
| 2118 | property->num_values = num_values; | 2118 | property->num_values = num_values; |
| 2119 | INIT_LIST_HEAD(&property->enum_blob_list); | 2119 | INIT_LIST_HEAD(&property->enum_blob_list); |
| 2120 | 2120 | ||
| 2121 | if (name) | 2121 | if (name) { |
| 2122 | strncpy(property->name, name, DRM_PROP_NAME_LEN); | 2122 | strncpy(property->name, name, DRM_PROP_NAME_LEN); |
| 2123 | property->name[DRM_PROP_NAME_LEN-1] = '\0'; | ||
| 2124 | } | ||
| 2123 | 2125 | ||
| 2124 | list_add_tail(&property->head, &dev->mode_config.property_list); | 2126 | list_add_tail(&property->head, &dev->mode_config.property_list); |
| 2125 | return property; | 2127 | return property; |
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c index 2957636161e8..3969f7553fe7 100644 --- a/drivers/gpu/drm/drm_crtc_helper.c +++ b/drivers/gpu/drm/drm_crtc_helper.c | |||
| @@ -484,6 +484,7 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) | |||
| 484 | struct drm_connector *save_connectors, *connector; | 484 | struct drm_connector *save_connectors, *connector; |
| 485 | int count = 0, ro, fail = 0; | 485 | int count = 0, ro, fail = 0; |
| 486 | struct drm_crtc_helper_funcs *crtc_funcs; | 486 | struct drm_crtc_helper_funcs *crtc_funcs; |
| 487 | struct drm_mode_set save_set; | ||
| 487 | int ret = 0; | 488 | int ret = 0; |
| 488 | int i; | 489 | int i; |
| 489 | 490 | ||
| @@ -556,6 +557,12 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set) | |||
| 556 | save_connectors[count++] = *connector; | 557 | save_connectors[count++] = *connector; |
| 557 | } | 558 | } |
| 558 | 559 | ||
| 560 | save_set.crtc = set->crtc; | ||
| 561 | save_set.mode = &set->crtc->mode; | ||
| 562 | save_set.x = set->crtc->x; | ||
| 563 | save_set.y = set->crtc->y; | ||
| 564 | save_set.fb = set->crtc->fb; | ||
| 565 | |||
| 559 | /* We should be able to check here if the fb has the same properties | 566 | /* We should be able to check here if the fb has the same properties |
| 560 | * and then just flip_or_move it */ | 567 | * and then just flip_or_move it */ |
| 561 | if (set->crtc->fb != set->fb) { | 568 | if (set->crtc->fb != set->fb) { |
| @@ -721,6 +728,12 @@ fail: | |||
| 721 | *connector = save_connectors[count++]; | 728 | *connector = save_connectors[count++]; |
| 722 | } | 729 | } |
| 723 | 730 | ||
| 731 | /* Try to restore the config */ | ||
| 732 | if (mode_changed && | ||
| 733 | !drm_crtc_helper_set_mode(save_set.crtc, save_set.mode, save_set.x, | ||
| 734 | save_set.y, save_set.fb)) | ||
| 735 | DRM_ERROR("failed to restore config after modeset failure\n"); | ||
| 736 | |||
| 724 | kfree(save_connectors); | 737 | kfree(save_connectors); |
| 725 | kfree(save_encoders); | 738 | kfree(save_encoders); |
| 726 | kfree(save_crtcs); | 739 | kfree(save_crtcs); |
diff --git a/drivers/gpu/drm/drm_debugfs.c b/drivers/gpu/drm/drm_debugfs.c index d067c12ba940..1c7a1c0d3edd 100644 --- a/drivers/gpu/drm/drm_debugfs.c +++ b/drivers/gpu/drm/drm_debugfs.c | |||
| @@ -118,7 +118,10 @@ int drm_debugfs_create_files(struct drm_info_list *files, int count, | |||
| 118 | tmp->minor = minor; | 118 | tmp->minor = minor; |
| 119 | tmp->dent = ent; | 119 | tmp->dent = ent; |
| 120 | tmp->info_ent = &files[i]; | 120 | tmp->info_ent = &files[i]; |
| 121 | list_add(&(tmp->list), &(minor->debugfs_nodes.list)); | 121 | |
| 122 | mutex_lock(&minor->debugfs_lock); | ||
| 123 | list_add(&tmp->list, &minor->debugfs_list); | ||
| 124 | mutex_unlock(&minor->debugfs_lock); | ||
| 122 | } | 125 | } |
| 123 | return 0; | 126 | return 0; |
| 124 | 127 | ||
| @@ -146,7 +149,8 @@ int drm_debugfs_init(struct drm_minor *minor, int minor_id, | |||
| 146 | char name[64]; | 149 | char name[64]; |
| 147 | int ret; | 150 | int ret; |
| 148 | 151 | ||
| 149 | INIT_LIST_HEAD(&minor->debugfs_nodes.list); | 152 | INIT_LIST_HEAD(&minor->debugfs_list); |
| 153 | mutex_init(&minor->debugfs_lock); | ||
| 150 | sprintf(name, "%d", minor_id); | 154 | sprintf(name, "%d", minor_id); |
| 151 | minor->debugfs_root = debugfs_create_dir(name, root); | 155 | minor->debugfs_root = debugfs_create_dir(name, root); |
| 152 | if (!minor->debugfs_root) { | 156 | if (!minor->debugfs_root) { |
| @@ -192,8 +196,9 @@ int drm_debugfs_remove_files(struct drm_info_list *files, int count, | |||
| 192 | struct drm_info_node *tmp; | 196 | struct drm_info_node *tmp; |
| 193 | int i; | 197 | int i; |
| 194 | 198 | ||
| 199 | mutex_lock(&minor->debugfs_lock); | ||
| 195 | for (i = 0; i < count; i++) { | 200 | for (i = 0; i < count; i++) { |
| 196 | list_for_each_safe(pos, q, &minor->debugfs_nodes.list) { | 201 | list_for_each_safe(pos, q, &minor->debugfs_list) { |
| 197 | tmp = list_entry(pos, struct drm_info_node, list); | 202 | tmp = list_entry(pos, struct drm_info_node, list); |
| 198 | if (tmp->info_ent == &files[i]) { | 203 | if (tmp->info_ent == &files[i]) { |
| 199 | debugfs_remove(tmp->dent); | 204 | debugfs_remove(tmp->dent); |
| @@ -202,6 +207,7 @@ int drm_debugfs_remove_files(struct drm_info_list *files, int count, | |||
| 202 | } | 207 | } |
| 203 | } | 208 | } |
| 204 | } | 209 | } |
| 210 | mutex_unlock(&minor->debugfs_lock); | ||
| 205 | return 0; | 211 | return 0; |
| 206 | } | 212 | } |
| 207 | EXPORT_SYMBOL(drm_debugfs_remove_files); | 213 | EXPORT_SYMBOL(drm_debugfs_remove_files); |
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index fc81af9dbf42..40c187c60f44 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c | |||
| @@ -125,7 +125,7 @@ static struct drm_ioctl_desc drm_ioctls[] = { | |||
| 125 | DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_sg_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 125 | DRM_IOCTL_DEF(DRM_IOCTL_SG_ALLOC, drm_sg_alloc_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 126 | DRM_IOCTL_DEF(DRM_IOCTL_SG_FREE, drm_sg_free, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 126 | DRM_IOCTL_DEF(DRM_IOCTL_SG_FREE, drm_sg_free, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
| 127 | 127 | ||
| 128 | DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank, 0), | 128 | DRM_IOCTL_DEF(DRM_IOCTL_WAIT_VBLANK, drm_wait_vblank, DRM_UNLOCKED), |
| 129 | 129 | ||
| 130 | DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, 0), | 130 | DRM_IOCTL_DEF(DRM_IOCTL_MODESET_CTL, drm_modeset_ctl, 0), |
| 131 | 131 | ||
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c index cb3794a00f98..68b756253f9f 100644 --- a/drivers/gpu/drm/drm_irq.c +++ b/drivers/gpu/drm/drm_irq.c | |||
| @@ -407,13 +407,16 @@ int drm_irq_uninstall(struct drm_device *dev) | |||
| 407 | /* | 407 | /* |
| 408 | * Wake up any waiters so they don't hang. | 408 | * Wake up any waiters so they don't hang. |
| 409 | */ | 409 | */ |
| 410 | spin_lock_irqsave(&dev->vbl_lock, irqflags); | 410 | if (dev->num_crtcs) { |
| 411 | for (i = 0; i < dev->num_crtcs; i++) { | 411 | spin_lock_irqsave(&dev->vbl_lock, irqflags); |
| 412 | DRM_WAKEUP(&dev->vbl_queue[i]); | 412 | for (i = 0; i < dev->num_crtcs; i++) { |
| 413 | dev->vblank_enabled[i] = 0; | 413 | DRM_WAKEUP(&dev->vbl_queue[i]); |
| 414 | dev->last_vblank[i] = dev->driver->get_vblank_counter(dev, i); | 414 | dev->vblank_enabled[i] = 0; |
| 415 | dev->last_vblank[i] = | ||
| 416 | dev->driver->get_vblank_counter(dev, i); | ||
| 417 | } | ||
| 418 | spin_unlock_irqrestore(&dev->vbl_lock, irqflags); | ||
| 415 | } | 419 | } |
| 416 | spin_unlock_irqrestore(&dev->vbl_lock, irqflags); | ||
| 417 | 420 | ||
| 418 | if (!irq_enabled) | 421 | if (!irq_enabled) |
| 419 | return -EINVAL; | 422 | return -EINVAL; |
| @@ -1125,6 +1128,7 @@ static int drm_queue_vblank_event(struct drm_device *dev, int pipe, | |||
| 1125 | trace_drm_vblank_event_delivered(current->pid, pipe, | 1128 | trace_drm_vblank_event_delivered(current->pid, pipe, |
| 1126 | vblwait->request.sequence); | 1129 | vblwait->request.sequence); |
| 1127 | } else { | 1130 | } else { |
| 1131 | /* drm_handle_vblank_events will call drm_vblank_put */ | ||
| 1128 | list_add_tail(&e->base.link, &dev->vblank_event_list); | 1132 | list_add_tail(&e->base.link, &dev->vblank_event_list); |
| 1129 | vblwait->reply.sequence = vblwait->request.sequence; | 1133 | vblwait->reply.sequence = vblwait->request.sequence; |
| 1130 | } | 1134 | } |
| @@ -1205,8 +1209,12 @@ int drm_wait_vblank(struct drm_device *dev, void *data, | |||
| 1205 | goto done; | 1209 | goto done; |
| 1206 | } | 1210 | } |
| 1207 | 1211 | ||
| 1208 | if (flags & _DRM_VBLANK_EVENT) | 1212 | if (flags & _DRM_VBLANK_EVENT) { |
| 1213 | /* must hold on to the vblank ref until the event fires | ||
| 1214 | * drm_vblank_put will be called asynchronously | ||
| 1215 | */ | ||
| 1209 | return drm_queue_vblank_event(dev, crtc, vblwait, file_priv); | 1216 | return drm_queue_vblank_event(dev, crtc, vblwait, file_priv); |
| 1217 | } | ||
| 1210 | 1218 | ||
| 1211 | if ((flags & _DRM_VBLANK_NEXTONMISS) && | 1219 | if ((flags & _DRM_VBLANK_NEXTONMISS) && |
| 1212 | (seq - vblwait->request.sequence) <= (1<<23)) { | 1220 | (seq - vblwait->request.sequence) <= (1<<23)) { |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index d14b44e13f51..4f40f1ce1d8e 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
| @@ -1506,7 +1506,10 @@ drm_add_fake_info_node(struct drm_minor *minor, | |||
| 1506 | node->minor = minor; | 1506 | node->minor = minor; |
| 1507 | node->dent = ent; | 1507 | node->dent = ent; |
| 1508 | node->info_ent = (void *) key; | 1508 | node->info_ent = (void *) key; |
| 1509 | list_add(&node->list, &minor->debugfs_nodes.list); | 1509 | |
| 1510 | mutex_lock(&minor->debugfs_lock); | ||
| 1511 | list_add(&node->list, &minor->debugfs_list); | ||
| 1512 | mutex_unlock(&minor->debugfs_lock); | ||
| 1510 | 1513 | ||
| 1511 | return 0; | 1514 | return 0; |
| 1512 | } | 1515 | } |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 6651c36b6e8a..d18b07adcffa 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
| @@ -1396,7 +1396,7 @@ i915_gem_mmap_gtt(struct drm_file *file, | |||
| 1396 | 1396 | ||
| 1397 | if (obj->base.size > dev_priv->mm.gtt_mappable_end) { | 1397 | if (obj->base.size > dev_priv->mm.gtt_mappable_end) { |
| 1398 | ret = -E2BIG; | 1398 | ret = -E2BIG; |
| 1399 | goto unlock; | 1399 | goto out; |
| 1400 | } | 1400 | } |
| 1401 | 1401 | ||
| 1402 | if (obj->madv != I915_MADV_WILLNEED) { | 1402 | if (obj->madv != I915_MADV_WILLNEED) { |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index 032a82098136..5fc201b49d30 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
| @@ -640,10 +640,9 @@ static int | |||
| 640 | nv50_pll_set(struct drm_device *dev, uint32_t reg, uint32_t clk) | 640 | nv50_pll_set(struct drm_device *dev, uint32_t reg, uint32_t clk) |
| 641 | { | 641 | { |
| 642 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 642 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 643 | uint32_t reg0 = nv_rd32(dev, reg + 0); | ||
| 644 | uint32_t reg1 = nv_rd32(dev, reg + 4); | ||
| 645 | struct nouveau_pll_vals pll; | 643 | struct nouveau_pll_vals pll; |
| 646 | struct pll_lims pll_limits; | 644 | struct pll_lims pll_limits; |
| 645 | u32 ctrl, mask, coef; | ||
| 647 | int ret; | 646 | int ret; |
| 648 | 647 | ||
| 649 | ret = get_pll_limits(dev, reg, &pll_limits); | 648 | ret = get_pll_limits(dev, reg, &pll_limits); |
| @@ -654,15 +653,20 @@ nv50_pll_set(struct drm_device *dev, uint32_t reg, uint32_t clk) | |||
| 654 | if (!clk) | 653 | if (!clk) |
| 655 | return -ERANGE; | 654 | return -ERANGE; |
| 656 | 655 | ||
| 657 | reg0 = (reg0 & 0xfff8ffff) | (pll.log2P << 16); | 656 | coef = pll.N1 << 8 | pll.M1; |
| 658 | reg1 = (reg1 & 0xffff0000) | (pll.N1 << 8) | pll.M1; | 657 | ctrl = pll.log2P << 16; |
| 659 | 658 | mask = 0x00070000; | |
| 660 | if (dev_priv->vbios.execute) { | 659 | if (reg == 0x004008) { |
| 661 | still_alive(); | 660 | mask |= 0x01f80000; |
| 662 | nv_wr32(dev, reg + 4, reg1); | 661 | ctrl |= (pll_limits.log2p_bias << 19); |
| 663 | nv_wr32(dev, reg + 0, reg0); | 662 | ctrl |= (pll.log2P << 22); |
| 664 | } | 663 | } |
| 665 | 664 | ||
| 665 | if (!dev_priv->vbios.execute) | ||
| 666 | return 0; | ||
| 667 | |||
| 668 | nv_mask(dev, reg + 0, mask, ctrl); | ||
| 669 | nv_wr32(dev, reg + 4, coef); | ||
| 666 | return 0; | 670 | return 0; |
| 667 | } | 671 | } |
| 668 | 672 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 7226f419e178..7cc37e690860 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
| @@ -148,7 +148,7 @@ set_placement_range(struct nouveau_bo *nvbo, uint32_t type) | |||
| 148 | 148 | ||
| 149 | if (dev_priv->card_type == NV_10 && | 149 | if (dev_priv->card_type == NV_10 && |
| 150 | nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) && | 150 | nvbo->tile_mode && (type & TTM_PL_FLAG_VRAM) && |
| 151 | nvbo->bo.mem.num_pages < vram_pages / 2) { | 151 | nvbo->bo.mem.num_pages < vram_pages / 4) { |
| 152 | /* | 152 | /* |
| 153 | * Make sure that the color and depth buffers are handled | 153 | * Make sure that the color and depth buffers are handled |
| 154 | * by independent memory controller units. Up to a 9x | 154 | * by independent memory controller units. Up to a 9x |
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index a319d5646ea9..bb6ec9ef8676 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c | |||
| @@ -158,6 +158,7 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret, | |||
| 158 | INIT_LIST_HEAD(&chan->nvsw.vbl_wait); | 158 | INIT_LIST_HEAD(&chan->nvsw.vbl_wait); |
| 159 | INIT_LIST_HEAD(&chan->nvsw.flip); | 159 | INIT_LIST_HEAD(&chan->nvsw.flip); |
| 160 | INIT_LIST_HEAD(&chan->fence.pending); | 160 | INIT_LIST_HEAD(&chan->fence.pending); |
| 161 | spin_lock_init(&chan->fence.lock); | ||
| 161 | 162 | ||
| 162 | /* setup channel's memory and vm */ | 163 | /* setup channel's memory and vm */ |
| 163 | ret = nouveau_gpuobj_channel_init(chan, vram_handle, gart_handle); | 164 | ret = nouveau_gpuobj_channel_init(chan, vram_handle, gart_handle); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index e0d275e1c96c..cea6696b1906 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
| @@ -710,7 +710,7 @@ nouveau_connector_mode_valid(struct drm_connector *connector, | |||
| 710 | case OUTPUT_DP: | 710 | case OUTPUT_DP: |
| 711 | max_clock = nv_encoder->dp.link_nr; | 711 | max_clock = nv_encoder->dp.link_nr; |
| 712 | max_clock *= nv_encoder->dp.link_bw; | 712 | max_clock *= nv_encoder->dp.link_bw; |
| 713 | clock = clock * nouveau_connector_bpp(connector) / 8; | 713 | clock = clock * nouveau_connector_bpp(connector) / 10; |
| 714 | break; | 714 | break; |
| 715 | default: | 715 | default: |
| 716 | BUG_ON(1); | 716 | BUG_ON(1); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c index 14a8627efe4d..3a4cc32b9e44 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c +++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c | |||
| @@ -487,6 +487,7 @@ int nouveau_fbcon_init(struct drm_device *dev) | |||
| 487 | { | 487 | { |
| 488 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 488 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
| 489 | struct nouveau_fbdev *nfbdev; | 489 | struct nouveau_fbdev *nfbdev; |
| 490 | int preferred_bpp; | ||
| 490 | int ret; | 491 | int ret; |
| 491 | 492 | ||
| 492 | nfbdev = kzalloc(sizeof(struct nouveau_fbdev), GFP_KERNEL); | 493 | nfbdev = kzalloc(sizeof(struct nouveau_fbdev), GFP_KERNEL); |
| @@ -505,7 +506,15 @@ int nouveau_fbcon_init(struct drm_device *dev) | |||
| 505 | } | 506 | } |
| 506 | 507 | ||
| 507 | drm_fb_helper_single_add_all_connectors(&nfbdev->helper); | 508 | drm_fb_helper_single_add_all_connectors(&nfbdev->helper); |
| 508 | drm_fb_helper_initial_config(&nfbdev->helper, 32); | 509 | |
| 510 | if (dev_priv->vram_size <= 32 * 1024 * 1024) | ||
| 511 | preferred_bpp = 8; | ||
| 512 | else if (dev_priv->vram_size <= 64 * 1024 * 1024) | ||
| 513 | preferred_bpp = 16; | ||
| 514 | else | ||
| 515 | preferred_bpp = 32; | ||
| 516 | |||
| 517 | drm_fb_helper_initial_config(&nfbdev->helper, preferred_bpp); | ||
| 509 | return 0; | 518 | return 0; |
| 510 | } | 519 | } |
| 511 | 520 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c index 81116cfea275..2f6daae68b9d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_fence.c +++ b/drivers/gpu/drm/nouveau/nouveau_fence.c | |||
| @@ -539,8 +539,6 @@ nouveau_fence_channel_init(struct nouveau_channel *chan) | |||
| 539 | return ret; | 539 | return ret; |
| 540 | } | 540 | } |
| 541 | 541 | ||
| 542 | INIT_LIST_HEAD(&chan->fence.pending); | ||
| 543 | spin_lock_init(&chan->fence.lock); | ||
| 544 | atomic_set(&chan->fence.last_sequence_irq, 0); | 542 | atomic_set(&chan->fence.last_sequence_irq, 0); |
| 545 | return 0; | 543 | return 0; |
| 546 | } | 544 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_i2c.c b/drivers/gpu/drm/nouveau/nouveau_i2c.c index c6143df48b9f..d39b2202b197 100644 --- a/drivers/gpu/drm/nouveau/nouveau_i2c.c +++ b/drivers/gpu/drm/nouveau/nouveau_i2c.c | |||
| @@ -333,7 +333,7 @@ nouveau_i2c_identify(struct drm_device *dev, const char *what, | |||
| 333 | 333 | ||
| 334 | NV_DEBUG(dev, "Probing %ss on I2C bus: %d\n", what, index); | 334 | NV_DEBUG(dev, "Probing %ss on I2C bus: %d\n", what, index); |
| 335 | 335 | ||
| 336 | for (i = 0; info[i].addr; i++) { | 336 | for (i = 0; i2c && info[i].addr; i++) { |
| 337 | if (nouveau_probe_i2c_addr(i2c, info[i].addr) && | 337 | if (nouveau_probe_i2c_addr(i2c, info[i].addr) && |
| 338 | (!match || match(i2c, &info[i]))) { | 338 | (!match || match(i2c, &info[i]))) { |
| 339 | NV_INFO(dev, "Detected %s: %s\n", what, info[i].type); | 339 | NV_INFO(dev, "Detected %s: %s\n", what, info[i].type); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_perf.c b/drivers/gpu/drm/nouveau/nouveau_perf.c index 9f178aa94162..33d03fbf00df 100644 --- a/drivers/gpu/drm/nouveau/nouveau_perf.c +++ b/drivers/gpu/drm/nouveau/nouveau_perf.c | |||
| @@ -239,7 +239,7 @@ nouveau_perf_init(struct drm_device *dev) | |||
| 239 | if(version == 0x15) { | 239 | if(version == 0x15) { |
| 240 | memtimings->timing = | 240 | memtimings->timing = |
| 241 | kcalloc(entries, sizeof(*memtimings->timing), GFP_KERNEL); | 241 | kcalloc(entries, sizeof(*memtimings->timing), GFP_KERNEL); |
| 242 | if(!memtimings) { | 242 | if (!memtimings->timing) { |
| 243 | NV_WARN(dev,"Could not allocate memtiming table\n"); | 243 | NV_WARN(dev,"Could not allocate memtiming table\n"); |
| 244 | return; | 244 | return; |
| 245 | } | 245 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 82478e0998e5..d8831ab42bb9 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c | |||
| @@ -579,6 +579,14 @@ nouveau_card_init(struct drm_device *dev) | |||
| 579 | if (ret) | 579 | if (ret) |
| 580 | goto out_display_early; | 580 | goto out_display_early; |
| 581 | 581 | ||
| 582 | /* workaround an odd issue on nvc1 by disabling the device's | ||
| 583 | * nosnoop capability. hopefully won't cause issues until a | ||
| 584 | * better fix is found - assuming there is one... | ||
| 585 | */ | ||
| 586 | if (dev_priv->chipset == 0xc1) { | ||
| 587 | nv_mask(dev, 0x00088080, 0x00000800, 0x00000000); | ||
| 588 | } | ||
| 589 | |||
| 582 | nouveau_pm_init(dev); | 590 | nouveau_pm_init(dev); |
| 583 | 591 | ||
| 584 | ret = engine->vram.init(dev); | 592 | ret = engine->vram.init(dev); |
| @@ -1102,12 +1110,13 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) | |||
| 1102 | dev_priv->noaccel = !!nouveau_noaccel; | 1110 | dev_priv->noaccel = !!nouveau_noaccel; |
| 1103 | if (nouveau_noaccel == -1) { | 1111 | if (nouveau_noaccel == -1) { |
| 1104 | switch (dev_priv->chipset) { | 1112 | switch (dev_priv->chipset) { |
| 1105 | case 0xc1: /* known broken */ | 1113 | #if 0 |
| 1106 | case 0xc8: /* never tested */ | 1114 | case 0xXX: /* known broken */ |
| 1107 | NV_INFO(dev, "acceleration disabled by default, pass " | 1115 | NV_INFO(dev, "acceleration disabled by default, pass " |
| 1108 | "noaccel=0 to force enable\n"); | 1116 | "noaccel=0 to force enable\n"); |
| 1109 | dev_priv->noaccel = true; | 1117 | dev_priv->noaccel = true; |
| 1110 | break; | 1118 | break; |
| 1119 | #endif | ||
| 1111 | default: | 1120 | default: |
| 1112 | dev_priv->noaccel = false; | 1121 | dev_priv->noaccel = false; |
| 1113 | break; | 1122 | break; |
diff --git a/drivers/gpu/drm/nouveau/nv40_pm.c b/drivers/gpu/drm/nouveau/nv40_pm.c index bbc0b9c7e1f7..e676b0d53478 100644 --- a/drivers/gpu/drm/nouveau/nv40_pm.c +++ b/drivers/gpu/drm/nouveau/nv40_pm.c | |||
| @@ -57,12 +57,14 @@ read_pll_2(struct drm_device *dev, u32 reg) | |||
| 57 | int P = (ctrl & 0x00070000) >> 16; | 57 | int P = (ctrl & 0x00070000) >> 16; |
| 58 | u32 ref = 27000, clk = 0; | 58 | u32 ref = 27000, clk = 0; |
| 59 | 59 | ||
| 60 | if (ctrl & 0x80000000) | 60 | if ((ctrl & 0x80000000) && M1) { |
| 61 | clk = ref * N1 / M1; | 61 | clk = ref * N1 / M1; |
| 62 | 62 | if ((ctrl & 0x40000100) == 0x40000000) { | |
| 63 | if (!(ctrl & 0x00000100)) { | 63 | if (M2) |
| 64 | if (ctrl & 0x40000000) | 64 | clk = clk * N2 / M2; |
| 65 | clk = clk * N2 / M2; | 65 | else |
| 66 | clk = 0; | ||
| 67 | } | ||
| 66 | } | 68 | } |
| 67 | 69 | ||
| 68 | return clk >> P; | 70 | return clk >> P; |
| @@ -177,6 +179,11 @@ nv40_pm_clocks_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl) | |||
| 177 | } | 179 | } |
| 178 | 180 | ||
| 179 | /* memory clock */ | 181 | /* memory clock */ |
| 182 | if (!perflvl->memory) { | ||
| 183 | info->mpll_ctrl = 0x00000000; | ||
| 184 | goto out; | ||
| 185 | } | ||
| 186 | |||
| 180 | ret = nv40_calc_pll(dev, 0x004020, &pll, perflvl->memory, | 187 | ret = nv40_calc_pll(dev, 0x004020, &pll, perflvl->memory, |
| 181 | &N1, &M1, &N2, &M2, &log2P); | 188 | &N1, &M1, &N2, &M2, &log2P); |
| 182 | if (ret < 0) | 189 | if (ret < 0) |
| @@ -264,6 +271,9 @@ nv40_pm_clocks_set(struct drm_device *dev, void *pre_state) | |||
| 264 | mdelay(5); | 271 | mdelay(5); |
| 265 | nv_mask(dev, 0x00c040, 0x00000333, info->ctrl); | 272 | nv_mask(dev, 0x00c040, 0x00000333, info->ctrl); |
| 266 | 273 | ||
| 274 | if (!info->mpll_ctrl) | ||
| 275 | goto resume; | ||
| 276 | |||
| 267 | /* wait for vblank start on active crtcs, disable memory access */ | 277 | /* wait for vblank start on active crtcs, disable memory access */ |
| 268 | for (i = 0; i < 2; i++) { | 278 | for (i = 0; i < 2; i++) { |
| 269 | if (!(crtc_mask & (1 << i))) | 279 | if (!(crtc_mask & (1 << i))) |
diff --git a/drivers/gpu/drm/nouveau/nv50_graph.c b/drivers/gpu/drm/nouveau/nv50_graph.c index 8c979b31ff61..ac601f7c4e1a 100644 --- a/drivers/gpu/drm/nouveau/nv50_graph.c +++ b/drivers/gpu/drm/nouveau/nv50_graph.c | |||
| @@ -131,8 +131,8 @@ nv50_graph_init(struct drm_device *dev, int engine) | |||
| 131 | NV_DEBUG(dev, "\n"); | 131 | NV_DEBUG(dev, "\n"); |
| 132 | 132 | ||
| 133 | /* master reset */ | 133 | /* master reset */ |
| 134 | nv_mask(dev, 0x000200, 0x00200100, 0x00000000); | 134 | nv_mask(dev, 0x000200, 0x00201000, 0x00000000); |
| 135 | nv_mask(dev, 0x000200, 0x00200100, 0x00200100); | 135 | nv_mask(dev, 0x000200, 0x00201000, 0x00201000); |
| 136 | nv_wr32(dev, 0x40008c, 0x00000004); /* HW_CTX_SWITCH_ENABLED */ | 136 | nv_wr32(dev, 0x40008c, 0x00000004); /* HW_CTX_SWITCH_ENABLED */ |
| 137 | 137 | ||
| 138 | /* reset/enable traps and interrupts */ | 138 | /* reset/enable traps and interrupts */ |
diff --git a/drivers/gpu/drm/nouveau/nv50_grctx.c b/drivers/gpu/drm/nouveau/nv50_grctx.c index d05c2c3b2444..4b46d6968566 100644 --- a/drivers/gpu/drm/nouveau/nv50_grctx.c +++ b/drivers/gpu/drm/nouveau/nv50_grctx.c | |||
| @@ -601,7 +601,7 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx) | |||
| 601 | gr_def(ctx, offset + 0x1c, 0x00880000); | 601 | gr_def(ctx, offset + 0x1c, 0x00880000); |
| 602 | break; | 602 | break; |
| 603 | case 0x86: | 603 | case 0x86: |
| 604 | gr_def(ctx, offset + 0x1c, 0x008c0000); | 604 | gr_def(ctx, offset + 0x1c, 0x018c0000); |
| 605 | break; | 605 | break; |
| 606 | case 0x92: | 606 | case 0x92: |
| 607 | case 0x96: | 607 | case 0x96: |
diff --git a/drivers/gpu/drm/nouveau/nv50_vram.c b/drivers/gpu/drm/nouveau/nv50_vram.c index 9da23838e63e..2e45e57fd869 100644 --- a/drivers/gpu/drm/nouveau/nv50_vram.c +++ b/drivers/gpu/drm/nouveau/nv50_vram.c | |||
| @@ -160,7 +160,7 @@ nv50_vram_rblock(struct drm_device *dev) | |||
| 160 | colbits = (r4 & 0x0000f000) >> 12; | 160 | colbits = (r4 & 0x0000f000) >> 12; |
| 161 | rowbitsa = ((r4 & 0x000f0000) >> 16) + 8; | 161 | rowbitsa = ((r4 & 0x000f0000) >> 16) + 8; |
| 162 | rowbitsb = ((r4 & 0x00f00000) >> 20) + 8; | 162 | rowbitsb = ((r4 & 0x00f00000) >> 20) + 8; |
| 163 | banks = ((r4 & 0x01000000) ? 8 : 4); | 163 | banks = 1 << (((r4 & 0x03000000) >> 24) + 2); |
| 164 | 164 | ||
| 165 | rowsize = parts * banks * (1 << colbits) * 8; | 165 | rowsize = parts * banks * (1 << colbits) * 8; |
| 166 | predicted = rowsize << rowbitsa; | 166 | predicted = rowsize << rowbitsa; |
diff --git a/drivers/gpu/drm/nouveau/nvc0_graph.c b/drivers/gpu/drm/nouveau/nvc0_graph.c index bbdbc51830c8..a74e501afd25 100644 --- a/drivers/gpu/drm/nouveau/nvc0_graph.c +++ b/drivers/gpu/drm/nouveau/nvc0_graph.c | |||
| @@ -157,8 +157,8 @@ nvc0_graph_create_context_mmio_list(struct nouveau_channel *chan) | |||
| 157 | struct nvc0_graph_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_GR); | 157 | struct nvc0_graph_priv *priv = nv_engine(chan->dev, NVOBJ_ENGINE_GR); |
| 158 | struct nvc0_graph_chan *grch = chan->engctx[NVOBJ_ENGINE_GR]; | 158 | struct nvc0_graph_chan *grch = chan->engctx[NVOBJ_ENGINE_GR]; |
| 159 | struct drm_device *dev = chan->dev; | 159 | struct drm_device *dev = chan->dev; |
| 160 | struct drm_nouveau_private *dev_priv = dev->dev_private; | ||
| 160 | int i = 0, gpc, tp, ret; | 161 | int i = 0, gpc, tp, ret; |
| 161 | u32 magic; | ||
| 162 | 162 | ||
| 163 | ret = nouveau_gpuobj_new(dev, chan, 0x2000, 256, NVOBJ_FLAG_VM, | 163 | ret = nouveau_gpuobj_new(dev, chan, 0x2000, 256, NVOBJ_FLAG_VM, |
| 164 | &grch->unk408004); | 164 | &grch->unk408004); |
| @@ -207,14 +207,37 @@ nvc0_graph_create_context_mmio_list(struct nouveau_channel *chan) | |||
| 207 | nv_wo32(grch->mmio, i++ * 4, 0x0041880c); | 207 | nv_wo32(grch->mmio, i++ * 4, 0x0041880c); |
| 208 | nv_wo32(grch->mmio, i++ * 4, 0x80000018); | 208 | nv_wo32(grch->mmio, i++ * 4, 0x80000018); |
| 209 | 209 | ||
| 210 | magic = 0x02180000; | 210 | if (dev_priv->chipset != 0xc1) { |
| 211 | nv_wo32(grch->mmio, i++ * 4, 0x00405830); | 211 | u32 magic = 0x02180000; |
| 212 | nv_wo32(grch->mmio, i++ * 4, magic); | 212 | nv_wo32(grch->mmio, i++ * 4, 0x00405830); |
| 213 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) { | 213 | nv_wo32(grch->mmio, i++ * 4, magic); |
| 214 | for (tp = 0; tp < priv->tp_nr[gpc]; tp++, magic += 0x0324) { | 214 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) { |
| 215 | u32 reg = 0x504520 + (gpc * 0x8000) + (tp * 0x0800); | 215 | for (tp = 0; tp < priv->tp_nr[gpc]; tp++) { |
| 216 | nv_wo32(grch->mmio, i++ * 4, reg); | 216 | u32 reg = TP_UNIT(gpc, tp, 0x520); |
| 217 | nv_wo32(grch->mmio, i++ * 4, magic); | 217 | nv_wo32(grch->mmio, i++ * 4, reg); |
| 218 | nv_wo32(grch->mmio, i++ * 4, magic); | ||
| 219 | magic += 0x0324; | ||
| 220 | } | ||
| 221 | } | ||
| 222 | } else { | ||
| 223 | u32 magic = 0x02180000; | ||
| 224 | nv_wo32(grch->mmio, i++ * 4, 0x00405830); | ||
| 225 | nv_wo32(grch->mmio, i++ * 4, magic | 0x0000218); | ||
| 226 | nv_wo32(grch->mmio, i++ * 4, 0x004064c4); | ||
| 227 | nv_wo32(grch->mmio, i++ * 4, 0x0086ffff); | ||
| 228 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) { | ||
| 229 | for (tp = 0; tp < priv->tp_nr[gpc]; tp++) { | ||
| 230 | u32 reg = TP_UNIT(gpc, tp, 0x520); | ||
| 231 | nv_wo32(grch->mmio, i++ * 4, reg); | ||
| 232 | nv_wo32(grch->mmio, i++ * 4, (1 << 28) | magic); | ||
| 233 | magic += 0x0324; | ||
| 234 | } | ||
| 235 | for (tp = 0; tp < priv->tp_nr[gpc]; tp++) { | ||
| 236 | u32 reg = TP_UNIT(gpc, tp, 0x544); | ||
| 237 | nv_wo32(grch->mmio, i++ * 4, reg); | ||
| 238 | nv_wo32(grch->mmio, i++ * 4, magic); | ||
| 239 | magic += 0x0324; | ||
| 240 | } | ||
| 218 | } | 241 | } |
| 219 | } | 242 | } |
| 220 | 243 | ||
diff --git a/drivers/gpu/drm/nouveau/nvc0_grctx.c b/drivers/gpu/drm/nouveau/nvc0_grctx.c index dd0e6a736b3b..96b0b93d94ca 100644 --- a/drivers/gpu/drm/nouveau/nvc0_grctx.c +++ b/drivers/gpu/drm/nouveau/nvc0_grctx.c | |||
| @@ -1812,6 +1812,7 @@ nvc0_grctx_generate(struct nouveau_channel *chan) | |||
| 1812 | /* calculate first set of magics */ | 1812 | /* calculate first set of magics */ |
| 1813 | memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr)); | 1813 | memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr)); |
| 1814 | 1814 | ||
| 1815 | gpc = -1; | ||
| 1815 | for (tp = 0; tp < priv->tp_total; tp++) { | 1816 | for (tp = 0; tp < priv->tp_total; tp++) { |
| 1816 | do { | 1817 | do { |
| 1817 | gpc = (gpc + 1) % priv->gpc_nr; | 1818 | gpc = (gpc + 1) % priv->gpc_nr; |
| @@ -1861,30 +1862,26 @@ nvc0_grctx_generate(struct nouveau_channel *chan) | |||
| 1861 | 1862 | ||
| 1862 | if (1) { | 1863 | if (1) { |
| 1863 | u32 tp_mask = 0, tp_set = 0; | 1864 | u32 tp_mask = 0, tp_set = 0; |
| 1864 | u8 tpnr[GPC_MAX]; | 1865 | u8 tpnr[GPC_MAX], a, b; |
| 1865 | 1866 | ||
| 1866 | memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr)); | 1867 | memcpy(tpnr, priv->tp_nr, sizeof(priv->tp_nr)); |
| 1867 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) | 1868 | for (gpc = 0; gpc < priv->gpc_nr; gpc++) |
| 1868 | tp_mask |= ((1 << priv->tp_nr[gpc]) - 1) << (gpc * 8); | 1869 | tp_mask |= ((1 << priv->tp_nr[gpc]) - 1) << (gpc * 8); |
| 1869 | 1870 | ||
| 1870 | gpc = -1; | 1871 | for (i = 0, gpc = -1, b = -1; i < 32; i++) { |
| 1871 | for (i = 0, gpc = -1; i < 32; i++) { | 1872 | a = (i * (priv->tp_total - 1)) / 32; |
| 1872 | int ltp = i * (priv->tp_total - 1) / 32; | 1873 | if (a != b) { |
| 1873 | 1874 | b = a; | |
| 1874 | do { | 1875 | do { |
| 1875 | gpc = (gpc + 1) % priv->gpc_nr; | 1876 | gpc = (gpc + 1) % priv->gpc_nr; |
| 1876 | } while (!tpnr[gpc]); | 1877 | } while (!tpnr[gpc]); |
| 1877 | tp = priv->tp_nr[gpc] - tpnr[gpc]--; | 1878 | tp = priv->tp_nr[gpc] - tpnr[gpc]--; |
| 1878 | 1879 | ||
| 1879 | tp_set |= 1 << ((gpc * 8) + tp); | 1880 | tp_set |= 1 << ((gpc * 8) + tp); |
| 1881 | } | ||
| 1880 | 1882 | ||
| 1881 | do { | 1883 | nv_wr32(dev, 0x406800 + (i * 0x20), tp_set); |
| 1882 | nv_wr32(dev, 0x406800 + (i * 0x20), tp_set); | 1884 | nv_wr32(dev, 0x406c00 + (i * 0x20), tp_set ^ tp_mask); |
| 1883 | tp_set ^= tp_mask; | ||
| 1884 | nv_wr32(dev, 0x406c00 + (i * 0x20), tp_set); | ||
| 1885 | tp_set ^= tp_mask; | ||
| 1886 | } while (ltp == (++i * (priv->tp_total - 1) / 32)); | ||
| 1887 | i--; | ||
| 1888 | } | 1885 | } |
| 1889 | } | 1886 | } |
| 1890 | 1887 | ||
diff --git a/drivers/gpu/drm/nouveau/nvc0_vram.c b/drivers/gpu/drm/nouveau/nvc0_vram.c index edbfe9360ae2..ce984d573a51 100644 --- a/drivers/gpu/drm/nouveau/nvc0_vram.c +++ b/drivers/gpu/drm/nouveau/nvc0_vram.c | |||
| @@ -43,7 +43,7 @@ static const u8 types[256] = { | |||
| 43 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, | 43 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, |
| 44 | 0, 0, 0, 3, 3, 3, 3, 1, 1, 1, 1, 0, 0, 0, 0, 0, | 44 | 0, 0, 0, 3, 3, 3, 3, 1, 1, 1, 1, 0, 0, 0, 0, 0, |
| 45 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, | 45 | 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3, |
| 46 | 3, 3, 3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 3, 3, | 46 | 3, 3, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 3, 3, 3, 3, |
| 47 | 3, 3, 0, 0, 0, 0, 0, 0, 3, 0, 0, 3, 0, 3, 0, 3, | 47 | 3, 3, 0, 0, 0, 0, 0, 0, 3, 0, 0, 3, 0, 3, 0, 3, |
| 48 | 3, 0, 3, 3, 3, 3, 3, 0, 0, 3, 0, 3, 0, 3, 3, 0, | 48 | 3, 0, 3, 3, 3, 3, 3, 0, 0, 3, 0, 3, 0, 3, 3, 0, |
| 49 | 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 0, 1, 1, 0 | 49 | 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 0, 1, 1, 0 |
| @@ -110,22 +110,26 @@ nvc0_vram_init(struct drm_device *dev) | |||
| 110 | u32 bsize = nv_rd32(dev, 0x10f20c); | 110 | u32 bsize = nv_rd32(dev, 0x10f20c); |
| 111 | u32 offset, length; | 111 | u32 offset, length; |
| 112 | bool uniform = true; | 112 | bool uniform = true; |
| 113 | int ret, i; | 113 | int ret, part; |
| 114 | 114 | ||
| 115 | NV_DEBUG(dev, "0x100800: 0x%08x\n", nv_rd32(dev, 0x100800)); | 115 | NV_DEBUG(dev, "0x100800: 0x%08x\n", nv_rd32(dev, 0x100800)); |
| 116 | NV_DEBUG(dev, "parts 0x%08x bcast_mem_amount 0x%08x\n", parts, bsize); | 116 | NV_DEBUG(dev, "parts 0x%08x bcast_mem_amount 0x%08x\n", parts, bsize); |
| 117 | 117 | ||
| 118 | /* read amount of vram attached to each memory controller */ | 118 | /* read amount of vram attached to each memory controller */ |
| 119 | for (i = 0; i < parts; i++) { | 119 | part = 0; |
| 120 | u32 psize = nv_rd32(dev, 0x11020c + (i * 0x1000)); | 120 | while (parts) { |
| 121 | u32 psize = nv_rd32(dev, 0x11020c + (part++ * 0x1000)); | ||
| 122 | if (psize == 0) | ||
| 123 | continue; | ||
| 124 | parts--; | ||
| 125 | |||
| 121 | if (psize != bsize) { | 126 | if (psize != bsize) { |
| 122 | if (psize < bsize) | 127 | if (psize < bsize) |
| 123 | bsize = psize; | 128 | bsize = psize; |
| 124 | uniform = false; | 129 | uniform = false; |
| 125 | } | 130 | } |
| 126 | 131 | ||
| 127 | NV_DEBUG(dev, "%d: mem_amount 0x%08x\n", i, psize); | 132 | NV_DEBUG(dev, "%d: mem_amount 0x%08x\n", part, psize); |
| 128 | |||
| 129 | dev_priv->vram_size += (u64)psize << 20; | 133 | dev_priv->vram_size += (u64)psize << 20; |
| 130 | } | 134 | } |
| 131 | 135 | ||
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 87921c88a95c..87631fede1f8 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
| @@ -1522,12 +1522,6 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc, | |||
| 1522 | struct drm_display_mode *mode, | 1522 | struct drm_display_mode *mode, |
| 1523 | struct drm_display_mode *adjusted_mode) | 1523 | struct drm_display_mode *adjusted_mode) |
| 1524 | { | 1524 | { |
| 1525 | struct drm_device *dev = crtc->dev; | ||
| 1526 | struct radeon_device *rdev = dev->dev_private; | ||
| 1527 | |||
| 1528 | /* adjust pm to upcoming mode change */ | ||
| 1529 | radeon_pm_compute_clocks(rdev); | ||
| 1530 | |||
| 1531 | if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) | 1525 | if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) |
| 1532 | return false; | 1526 | return false; |
| 1533 | return true; | 1527 | return true; |
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index a0de48542f71..6fb335a4fdda 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c | |||
| @@ -283,7 +283,7 @@ int radeon_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, | |||
| 283 | } | 283 | } |
| 284 | } | 284 | } |
| 285 | 285 | ||
| 286 | DRM_ERROR("aux i2c too many retries, giving up\n"); | 286 | DRM_DEBUG_KMS("aux i2c too many retries, giving up\n"); |
| 287 | return -EREMOTEIO; | 287 | return -EREMOTEIO; |
| 288 | } | 288 | } |
| 289 | 289 | ||
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index e4c384b9511c..1d603a3335db 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
| @@ -157,6 +157,57 @@ int sumo_get_temp(struct radeon_device *rdev) | |||
| 157 | return actual_temp * 1000; | 157 | return actual_temp * 1000; |
| 158 | } | 158 | } |
| 159 | 159 | ||
| 160 | void sumo_pm_init_profile(struct radeon_device *rdev) | ||
| 161 | { | ||
| 162 | int idx; | ||
| 163 | |||
| 164 | /* default */ | ||
| 165 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_ps_idx = rdev->pm.default_power_state_index; | ||
| 166 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_ps_idx = rdev->pm.default_power_state_index; | ||
| 167 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; | ||
| 168 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 0; | ||
| 169 | |||
| 170 | /* low,mid sh/mh */ | ||
| 171 | if (rdev->flags & RADEON_IS_MOBILITY) | ||
| 172 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | ||
| 173 | else | ||
| 174 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 175 | |||
| 176 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = idx; | ||
| 177 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = idx; | ||
| 178 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | ||
| 179 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | ||
| 180 | |||
| 181 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = idx; | ||
| 182 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = idx; | ||
| 183 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | ||
| 184 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | ||
| 185 | |||
| 186 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = idx; | ||
| 187 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = idx; | ||
| 188 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
| 189 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 0; | ||
| 190 | |||
| 191 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = idx; | ||
| 192 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = idx; | ||
| 193 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
| 194 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 0; | ||
| 195 | |||
| 196 | /* high sh/mh */ | ||
| 197 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 198 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = idx; | ||
| 199 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = idx; | ||
| 200 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; | ||
| 201 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = | ||
| 202 | rdev->pm.power_state[idx].num_clock_modes - 1; | ||
| 203 | |||
| 204 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = idx; | ||
| 205 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = idx; | ||
| 206 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; | ||
| 207 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = | ||
| 208 | rdev->pm.power_state[idx].num_clock_modes - 1; | ||
| 209 | } | ||
| 210 | |||
| 160 | void evergreen_pm_misc(struct radeon_device *rdev) | 211 | void evergreen_pm_misc(struct radeon_device *rdev) |
| 161 | { | 212 | { |
| 162 | int req_ps_idx = rdev->pm.requested_power_state_index; | 213 | int req_ps_idx = rdev->pm.requested_power_state_index; |
| @@ -1219,7 +1270,7 @@ void evergreen_mc_program(struct radeon_device *rdev) | |||
| 1219 | WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, | 1270 | WREG32(MC_VM_SYSTEM_APERTURE_HIGH_ADDR, |
| 1220 | rdev->mc.vram_end >> 12); | 1271 | rdev->mc.vram_end >> 12); |
| 1221 | } | 1272 | } |
| 1222 | WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, 0); | 1273 | WREG32(MC_VM_SYSTEM_APERTURE_DEFAULT_ADDR, rdev->vram_scratch.gpu_addr >> 12); |
| 1223 | if (rdev->flags & RADEON_IS_IGP) { | 1274 | if (rdev->flags & RADEON_IS_IGP) { |
| 1224 | tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF; | 1275 | tmp = RREG32(MC_FUS_VM_FB_OFFSET) & 0x000FFFFF; |
| 1225 | tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24; | 1276 | tmp |= ((rdev->mc.vram_end >> 20) & 0xF) << 24; |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 19afc43ad173..9cdda0b3b081 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
| @@ -288,24 +288,6 @@ void r600_pm_get_dynpm_state(struct radeon_device *rdev) | |||
| 288 | pcie_lanes); | 288 | pcie_lanes); |
| 289 | } | 289 | } |
| 290 | 290 | ||
| 291 | static int r600_pm_get_type_index(struct radeon_device *rdev, | ||
| 292 | enum radeon_pm_state_type ps_type, | ||
| 293 | int instance) | ||
| 294 | { | ||
| 295 | int i; | ||
| 296 | int found_instance = -1; | ||
| 297 | |||
| 298 | for (i = 0; i < rdev->pm.num_power_states; i++) { | ||
| 299 | if (rdev->pm.power_state[i].type == ps_type) { | ||
| 300 | found_instance++; | ||
| 301 | if (found_instance == instance) | ||
| 302 | return i; | ||
| 303 | } | ||
| 304 | } | ||
| 305 | /* return default if no match */ | ||
| 306 | return rdev->pm.default_power_state_index; | ||
| 307 | } | ||
| 308 | |||
| 309 | void rs780_pm_init_profile(struct radeon_device *rdev) | 291 | void rs780_pm_init_profile(struct radeon_device *rdev) |
| 310 | { | 292 | { |
| 311 | if (rdev->pm.num_power_states == 2) { | 293 | if (rdev->pm.num_power_states == 2) { |
| @@ -421,6 +403,8 @@ void rs780_pm_init_profile(struct radeon_device *rdev) | |||
| 421 | 403 | ||
| 422 | void r600_pm_init_profile(struct radeon_device *rdev) | 404 | void r600_pm_init_profile(struct radeon_device *rdev) |
| 423 | { | 405 | { |
| 406 | int idx; | ||
| 407 | |||
| 424 | if (rdev->family == CHIP_R600) { | 408 | if (rdev->family == CHIP_R600) { |
| 425 | /* XXX */ | 409 | /* XXX */ |
| 426 | /* default */ | 410 | /* default */ |
| @@ -502,81 +486,43 @@ void r600_pm_init_profile(struct radeon_device *rdev) | |||
| 502 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; | 486 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_off_cm_idx = 0; |
| 503 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 2; | 487 | rdev->pm.profiles[PM_PROFILE_DEFAULT_IDX].dpms_on_cm_idx = 2; |
| 504 | /* low sh */ | 488 | /* low sh */ |
| 505 | if (rdev->flags & RADEON_IS_MOBILITY) { | 489 | if (rdev->flags & RADEON_IS_MOBILITY) |
| 506 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = | 490 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); |
| 507 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | 491 | else |
| 508 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = | 492 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
| 509 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | 493 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = idx; |
| 510 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | 494 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = idx; |
| 511 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | 495 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; |
| 512 | } else { | 496 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; |
| 513 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_ps_idx = | ||
| 514 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 515 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_ps_idx = | ||
| 516 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 517 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_off_cm_idx = 0; | ||
| 518 | rdev->pm.profiles[PM_PROFILE_LOW_SH_IDX].dpms_on_cm_idx = 0; | ||
| 519 | } | ||
| 520 | /* mid sh */ | 497 | /* mid sh */ |
| 521 | if (rdev->flags & RADEON_IS_MOBILITY) { | 498 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = idx; |
| 522 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = | 499 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = idx; |
| 523 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | 500 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; |
| 524 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = | 501 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; |
| 525 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 0); | ||
| 526 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
| 527 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; | ||
| 528 | } else { | ||
| 529 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_ps_idx = | ||
| 530 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 531 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_ps_idx = | ||
| 532 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 533 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_off_cm_idx = 0; | ||
| 534 | rdev->pm.profiles[PM_PROFILE_MID_SH_IDX].dpms_on_cm_idx = 1; | ||
| 535 | } | ||
| 536 | /* high sh */ | 502 | /* high sh */ |
| 537 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = | 503 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); |
| 538 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | 504 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_ps_idx = idx; |
| 539 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = | 505 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_ps_idx = idx; |
| 540 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 0); | ||
| 541 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; | 506 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_off_cm_idx = 0; |
| 542 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 2; | 507 | rdev->pm.profiles[PM_PROFILE_HIGH_SH_IDX].dpms_on_cm_idx = 2; |
| 543 | /* low mh */ | 508 | /* low mh */ |
| 544 | if (rdev->flags & RADEON_IS_MOBILITY) { | 509 | if (rdev->flags & RADEON_IS_MOBILITY) |
| 545 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = | 510 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); |
| 546 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | 511 | else |
| 547 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = | 512 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
| 548 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | 513 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = idx; |
| 549 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | 514 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = idx; |
| 550 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | 515 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; |
| 551 | } else { | 516 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; |
| 552 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_ps_idx = | ||
| 553 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | ||
| 554 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_ps_idx = | ||
| 555 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | ||
| 556 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_off_cm_idx = 0; | ||
| 557 | rdev->pm.profiles[PM_PROFILE_LOW_MH_IDX].dpms_on_cm_idx = 0; | ||
| 558 | } | ||
| 559 | /* mid mh */ | 517 | /* mid mh */ |
| 560 | if (rdev->flags & RADEON_IS_MOBILITY) { | 518 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = idx; |
| 561 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = | 519 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = idx; |
| 562 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | 520 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; |
| 563 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = | 521 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; |
| 564 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_BATTERY, 1); | ||
| 565 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
| 566 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; | ||
| 567 | } else { | ||
| 568 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_ps_idx = | ||
| 569 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | ||
| 570 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_ps_idx = | ||
| 571 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | ||
| 572 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_off_cm_idx = 0; | ||
| 573 | rdev->pm.profiles[PM_PROFILE_MID_MH_IDX].dpms_on_cm_idx = 1; | ||
| 574 | } | ||
| 575 | /* high mh */ | 522 | /* high mh */ |
| 576 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = | 523 | idx = radeon_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); |
| 577 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | 524 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_ps_idx = idx; |
| 578 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = | 525 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_ps_idx = idx; |
| 579 | r600_pm_get_type_index(rdev, POWER_STATE_TYPE_PERFORMANCE, 1); | ||
| 580 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; | 526 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_off_cm_idx = 0; |
| 581 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 2; | 527 | rdev->pm.profiles[PM_PROFILE_HIGH_MH_IDX].dpms_on_cm_idx = 2; |
| 582 | } | 528 | } |
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h index b316b301152f..fc5a1d642cb5 100644 --- a/drivers/gpu/drm/radeon/radeon.h +++ b/drivers/gpu/drm/radeon/radeon.h | |||
| @@ -784,8 +784,7 @@ struct radeon_pm_clock_info { | |||
| 784 | 784 | ||
| 785 | struct radeon_power_state { | 785 | struct radeon_power_state { |
| 786 | enum radeon_pm_state_type type; | 786 | enum radeon_pm_state_type type; |
| 787 | /* XXX: use a define for num clock modes */ | 787 | struct radeon_pm_clock_info *clock_info; |
| 788 | struct radeon_pm_clock_info clock_info[8]; | ||
| 789 | /* number of valid clock modes in this power state */ | 788 | /* number of valid clock modes in this power state */ |
| 790 | int num_clock_modes; | 789 | int num_clock_modes; |
| 791 | struct radeon_pm_clock_info *default_clock_mode; | 790 | struct radeon_pm_clock_info *default_clock_mode; |
| @@ -855,6 +854,9 @@ struct radeon_pm { | |||
| 855 | struct device *int_hwmon_dev; | 854 | struct device *int_hwmon_dev; |
| 856 | }; | 855 | }; |
| 857 | 856 | ||
| 857 | int radeon_pm_get_type_index(struct radeon_device *rdev, | ||
| 858 | enum radeon_pm_state_type ps_type, | ||
| 859 | int instance); | ||
| 858 | 860 | ||
| 859 | /* | 861 | /* |
| 860 | * Benchmarking | 862 | * Benchmarking |
| @@ -1142,6 +1144,48 @@ struct r600_vram_scratch { | |||
| 1142 | u64 gpu_addr; | 1144 | u64 gpu_addr; |
| 1143 | }; | 1145 | }; |
| 1144 | 1146 | ||
| 1147 | |||
| 1148 | /* | ||
| 1149 | * Mutex which allows recursive locking from the same process. | ||
| 1150 | */ | ||
| 1151 | struct radeon_mutex { | ||
| 1152 | struct mutex mutex; | ||
| 1153 | struct task_struct *owner; | ||
| 1154 | int level; | ||
| 1155 | }; | ||
| 1156 | |||
| 1157 | static inline void radeon_mutex_init(struct radeon_mutex *mutex) | ||
| 1158 | { | ||
| 1159 | mutex_init(&mutex->mutex); | ||
| 1160 | mutex->owner = NULL; | ||
| 1161 | mutex->level = 0; | ||
| 1162 | } | ||
| 1163 | |||
| 1164 | static inline void radeon_mutex_lock(struct radeon_mutex *mutex) | ||
| 1165 | { | ||
| 1166 | if (mutex_trylock(&mutex->mutex)) { | ||
| 1167 | /* The mutex was unlocked before, so it's ours now */ | ||
| 1168 | mutex->owner = current; | ||
| 1169 | } else if (mutex->owner != current) { | ||
| 1170 | /* Another process locked the mutex, take it */ | ||
| 1171 | mutex_lock(&mutex->mutex); | ||
| 1172 | mutex->owner = current; | ||
| 1173 | } | ||
| 1174 | /* Otherwise the mutex was already locked by this process */ | ||
| 1175 | |||
| 1176 | mutex->level++; | ||
| 1177 | } | ||
| 1178 | |||
| 1179 | static inline void radeon_mutex_unlock(struct radeon_mutex *mutex) | ||
| 1180 | { | ||
| 1181 | if (--mutex->level > 0) | ||
| 1182 | return; | ||
| 1183 | |||
| 1184 | mutex->owner = NULL; | ||
| 1185 | mutex_unlock(&mutex->mutex); | ||
| 1186 | } | ||
| 1187 | |||
| 1188 | |||
| 1145 | /* | 1189 | /* |
| 1146 | * Core structure, functions and helpers. | 1190 | * Core structure, functions and helpers. |
| 1147 | */ | 1191 | */ |
| @@ -1197,7 +1241,7 @@ struct radeon_device { | |||
| 1197 | struct radeon_gem gem; | 1241 | struct radeon_gem gem; |
| 1198 | struct radeon_pm pm; | 1242 | struct radeon_pm pm; |
| 1199 | uint32_t bios_scratch[RADEON_BIOS_NUM_SCRATCH]; | 1243 | uint32_t bios_scratch[RADEON_BIOS_NUM_SCRATCH]; |
| 1200 | struct mutex cs_mutex; | 1244 | struct radeon_mutex cs_mutex; |
| 1201 | struct radeon_wb wb; | 1245 | struct radeon_wb wb; |
| 1202 | struct radeon_dummy_page dummy_page; | 1246 | struct radeon_dummy_page dummy_page; |
| 1203 | bool gpu_lockup; | 1247 | bool gpu_lockup; |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index e2944566ffea..a2e1eae114ef 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
| @@ -834,7 +834,7 @@ static struct radeon_asic sumo_asic = { | |||
| 834 | .pm_misc = &evergreen_pm_misc, | 834 | .pm_misc = &evergreen_pm_misc, |
| 835 | .pm_prepare = &evergreen_pm_prepare, | 835 | .pm_prepare = &evergreen_pm_prepare, |
| 836 | .pm_finish = &evergreen_pm_finish, | 836 | .pm_finish = &evergreen_pm_finish, |
| 837 | .pm_init_profile = &rs780_pm_init_profile, | 837 | .pm_init_profile = &sumo_pm_init_profile, |
| 838 | .pm_get_dynpm_state = &r600_pm_get_dynpm_state, | 838 | .pm_get_dynpm_state = &r600_pm_get_dynpm_state, |
| 839 | .pre_page_flip = &evergreen_pre_page_flip, | 839 | .pre_page_flip = &evergreen_pre_page_flip, |
| 840 | .page_flip = &evergreen_page_flip, | 840 | .page_flip = &evergreen_page_flip, |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h index 85f14f0337e4..59914842a729 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.h +++ b/drivers/gpu/drm/radeon/radeon_asic.h | |||
| @@ -413,6 +413,7 @@ extern int evergreen_cs_parse(struct radeon_cs_parser *p); | |||
| 413 | extern void evergreen_pm_misc(struct radeon_device *rdev); | 413 | extern void evergreen_pm_misc(struct radeon_device *rdev); |
| 414 | extern void evergreen_pm_prepare(struct radeon_device *rdev); | 414 | extern void evergreen_pm_prepare(struct radeon_device *rdev); |
| 415 | extern void evergreen_pm_finish(struct radeon_device *rdev); | 415 | extern void evergreen_pm_finish(struct radeon_device *rdev); |
| 416 | extern void sumo_pm_init_profile(struct radeon_device *rdev); | ||
| 416 | extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc); | 417 | extern void evergreen_pre_page_flip(struct radeon_device *rdev, int crtc); |
| 417 | extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); | 418 | extern u32 evergreen_page_flip(struct radeon_device *rdev, int crtc, u64 crtc_base); |
| 418 | extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc); | 419 | extern void evergreen_post_page_flip(struct radeon_device *rdev, int crtc); |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 08d0b94332e6..d2d179267af3 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
| @@ -1999,6 +1999,10 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) | |||
| 1999 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; | 1999 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; |
| 2000 | switch (frev) { | 2000 | switch (frev) { |
| 2001 | case 1: | 2001 | case 1: |
| 2002 | rdev->pm.power_state[state_index].clock_info = | ||
| 2003 | kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL); | ||
| 2004 | if (!rdev->pm.power_state[state_index].clock_info) | ||
| 2005 | return state_index; | ||
| 2002 | rdev->pm.power_state[state_index].num_clock_modes = 1; | 2006 | rdev->pm.power_state[state_index].num_clock_modes = 1; |
| 2003 | rdev->pm.power_state[state_index].clock_info[0].mclk = | 2007 | rdev->pm.power_state[state_index].clock_info[0].mclk = |
| 2004 | le16_to_cpu(power_info->info.asPowerPlayInfo[i].usMemoryClock); | 2008 | le16_to_cpu(power_info->info.asPowerPlayInfo[i].usMemoryClock); |
| @@ -2035,6 +2039,10 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) | |||
| 2035 | state_index++; | 2039 | state_index++; |
| 2036 | break; | 2040 | break; |
| 2037 | case 2: | 2041 | case 2: |
| 2042 | rdev->pm.power_state[state_index].clock_info = | ||
| 2043 | kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL); | ||
| 2044 | if (!rdev->pm.power_state[state_index].clock_info) | ||
| 2045 | return state_index; | ||
| 2038 | rdev->pm.power_state[state_index].num_clock_modes = 1; | 2046 | rdev->pm.power_state[state_index].num_clock_modes = 1; |
| 2039 | rdev->pm.power_state[state_index].clock_info[0].mclk = | 2047 | rdev->pm.power_state[state_index].clock_info[0].mclk = |
| 2040 | le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMemoryClock); | 2048 | le32_to_cpu(power_info->info_2.asPowerPlayInfo[i].ulMemoryClock); |
| @@ -2072,6 +2080,10 @@ static int radeon_atombios_parse_power_table_1_3(struct radeon_device *rdev) | |||
| 2072 | state_index++; | 2080 | state_index++; |
| 2073 | break; | 2081 | break; |
| 2074 | case 3: | 2082 | case 3: |
| 2083 | rdev->pm.power_state[state_index].clock_info = | ||
| 2084 | kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL); | ||
| 2085 | if (!rdev->pm.power_state[state_index].clock_info) | ||
| 2086 | return state_index; | ||
| 2075 | rdev->pm.power_state[state_index].num_clock_modes = 1; | 2087 | rdev->pm.power_state[state_index].num_clock_modes = 1; |
| 2076 | rdev->pm.power_state[state_index].clock_info[0].mclk = | 2088 | rdev->pm.power_state[state_index].clock_info[0].mclk = |
| 2077 | le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMemoryClock); | 2089 | le32_to_cpu(power_info->info_3.asPowerPlayInfo[i].ulMemoryClock); |
| @@ -2257,7 +2269,7 @@ static void radeon_atombios_parse_pplib_non_clock_info(struct radeon_device *rde | |||
| 2257 | rdev->pm.default_power_state_index = state_index; | 2269 | rdev->pm.default_power_state_index = state_index; |
| 2258 | rdev->pm.power_state[state_index].default_clock_mode = | 2270 | rdev->pm.power_state[state_index].default_clock_mode = |
| 2259 | &rdev->pm.power_state[state_index].clock_info[mode_index - 1]; | 2271 | &rdev->pm.power_state[state_index].clock_info[mode_index - 1]; |
| 2260 | if (ASIC_IS_DCE5(rdev)) { | 2272 | if (ASIC_IS_DCE5(rdev) && !(rdev->flags & RADEON_IS_IGP)) { |
| 2261 | /* NI chips post without MC ucode, so default clocks are strobe mode only */ | 2273 | /* NI chips post without MC ucode, so default clocks are strobe mode only */ |
| 2262 | rdev->pm.default_sclk = rdev->pm.power_state[state_index].clock_info[0].sclk; | 2274 | rdev->pm.default_sclk = rdev->pm.power_state[state_index].clock_info[0].sclk; |
| 2263 | rdev->pm.default_mclk = rdev->pm.power_state[state_index].clock_info[0].mclk; | 2275 | rdev->pm.default_mclk = rdev->pm.power_state[state_index].clock_info[0].mclk; |
| @@ -2377,17 +2389,31 @@ static int radeon_atombios_parse_power_table_4_5(struct radeon_device *rdev) | |||
| 2377 | le16_to_cpu(power_info->pplib.usNonClockInfoArrayOffset) + | 2389 | le16_to_cpu(power_info->pplib.usNonClockInfoArrayOffset) + |
| 2378 | (power_state->v1.ucNonClockStateIndex * | 2390 | (power_state->v1.ucNonClockStateIndex * |
| 2379 | power_info->pplib.ucNonClockSize)); | 2391 | power_info->pplib.ucNonClockSize)); |
| 2380 | for (j = 0; j < (power_info->pplib.ucStateEntrySize - 1); j++) { | 2392 | rdev->pm.power_state[i].clock_info = kzalloc(sizeof(struct radeon_pm_clock_info) * |
| 2381 | clock_info = (union pplib_clock_info *) | 2393 | ((power_info->pplib.ucStateEntrySize - 1) ? |
| 2382 | (mode_info->atom_context->bios + data_offset + | 2394 | (power_info->pplib.ucStateEntrySize - 1) : 1), |
| 2383 | le16_to_cpu(power_info->pplib.usClockInfoArrayOffset) + | 2395 | GFP_KERNEL); |
| 2384 | (power_state->v1.ucClockStateIndices[j] * | 2396 | if (!rdev->pm.power_state[i].clock_info) |
| 2385 | power_info->pplib.ucClockInfoSize)); | 2397 | return state_index; |
| 2386 | valid = radeon_atombios_parse_pplib_clock_info(rdev, | 2398 | if (power_info->pplib.ucStateEntrySize - 1) { |
| 2387 | state_index, mode_index, | 2399 | for (j = 0; j < (power_info->pplib.ucStateEntrySize - 1); j++) { |
| 2388 | clock_info); | 2400 | clock_info = (union pplib_clock_info *) |
| 2389 | if (valid) | 2401 | (mode_info->atom_context->bios + data_offset + |
| 2390 | mode_index++; | 2402 | le16_to_cpu(power_info->pplib.usClockInfoArrayOffset) + |
| 2403 | (power_state->v1.ucClockStateIndices[j] * | ||
| 2404 | power_info->pplib.ucClockInfoSize)); | ||
| 2405 | valid = radeon_atombios_parse_pplib_clock_info(rdev, | ||
| 2406 | state_index, mode_index, | ||
| 2407 | clock_info); | ||
| 2408 | if (valid) | ||
| 2409 | mode_index++; | ||
| 2410 | } | ||
| 2411 | } else { | ||
| 2412 | rdev->pm.power_state[state_index].clock_info[0].mclk = | ||
| 2413 | rdev->clock.default_mclk; | ||
| 2414 | rdev->pm.power_state[state_index].clock_info[0].sclk = | ||
| 2415 | rdev->clock.default_sclk; | ||
| 2416 | mode_index++; | ||
| 2391 | } | 2417 | } |
| 2392 | rdev->pm.power_state[state_index].num_clock_modes = mode_index; | 2418 | rdev->pm.power_state[state_index].num_clock_modes = mode_index; |
| 2393 | if (mode_index) { | 2419 | if (mode_index) { |
| @@ -2456,18 +2482,32 @@ static int radeon_atombios_parse_power_table_6(struct radeon_device *rdev) | |||
| 2456 | non_clock_array_index = i; /* power_state->v2.nonClockInfoIndex */ | 2482 | non_clock_array_index = i; /* power_state->v2.nonClockInfoIndex */ |
| 2457 | non_clock_info = (struct _ATOM_PPLIB_NONCLOCK_INFO *) | 2483 | non_clock_info = (struct _ATOM_PPLIB_NONCLOCK_INFO *) |
| 2458 | &non_clock_info_array->nonClockInfo[non_clock_array_index]; | 2484 | &non_clock_info_array->nonClockInfo[non_clock_array_index]; |
| 2459 | for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { | 2485 | rdev->pm.power_state[i].clock_info = kzalloc(sizeof(struct radeon_pm_clock_info) * |
| 2460 | clock_array_index = power_state->v2.clockInfoIndex[j]; | 2486 | (power_state->v2.ucNumDPMLevels ? |
| 2461 | /* XXX this might be an inagua bug... */ | 2487 | power_state->v2.ucNumDPMLevels : 1), |
| 2462 | if (clock_array_index >= clock_info_array->ucNumEntries) | 2488 | GFP_KERNEL); |
| 2463 | continue; | 2489 | if (!rdev->pm.power_state[i].clock_info) |
| 2464 | clock_info = (union pplib_clock_info *) | 2490 | return state_index; |
| 2465 | &clock_info_array->clockInfo[clock_array_index]; | 2491 | if (power_state->v2.ucNumDPMLevels) { |
| 2466 | valid = radeon_atombios_parse_pplib_clock_info(rdev, | 2492 | for (j = 0; j < power_state->v2.ucNumDPMLevels; j++) { |
| 2467 | state_index, mode_index, | 2493 | clock_array_index = power_state->v2.clockInfoIndex[j]; |
| 2468 | clock_info); | 2494 | /* XXX this might be an inagua bug... */ |
| 2469 | if (valid) | 2495 | if (clock_array_index >= clock_info_array->ucNumEntries) |
| 2470 | mode_index++; | 2496 | continue; |
| 2497 | clock_info = (union pplib_clock_info *) | ||
| 2498 | &clock_info_array->clockInfo[clock_array_index]; | ||
| 2499 | valid = radeon_atombios_parse_pplib_clock_info(rdev, | ||
| 2500 | state_index, mode_index, | ||
| 2501 | clock_info); | ||
| 2502 | if (valid) | ||
| 2503 | mode_index++; | ||
| 2504 | } | ||
| 2505 | } else { | ||
| 2506 | rdev->pm.power_state[state_index].clock_info[0].mclk = | ||
| 2507 | rdev->clock.default_mclk; | ||
| 2508 | rdev->pm.power_state[state_index].clock_info[0].sclk = | ||
| 2509 | rdev->clock.default_sclk; | ||
| 2510 | mode_index++; | ||
| 2471 | } | 2511 | } |
| 2472 | rdev->pm.power_state[state_index].num_clock_modes = mode_index; | 2512 | rdev->pm.power_state[state_index].num_clock_modes = mode_index; |
| 2473 | if (mode_index) { | 2513 | if (mode_index) { |
| @@ -2524,19 +2564,23 @@ void radeon_atombios_get_power_modes(struct radeon_device *rdev) | |||
| 2524 | } else { | 2564 | } else { |
| 2525 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state), GFP_KERNEL); | 2565 | rdev->pm.power_state = kzalloc(sizeof(struct radeon_power_state), GFP_KERNEL); |
| 2526 | if (rdev->pm.power_state) { | 2566 | if (rdev->pm.power_state) { |
| 2527 | /* add the default mode */ | 2567 | rdev->pm.power_state[0].clock_info = |
| 2528 | rdev->pm.power_state[state_index].type = | 2568 | kzalloc(sizeof(struct radeon_pm_clock_info) * 1, GFP_KERNEL); |
| 2529 | POWER_STATE_TYPE_DEFAULT; | 2569 | if (rdev->pm.power_state[0].clock_info) { |
| 2530 | rdev->pm.power_state[state_index].num_clock_modes = 1; | 2570 | /* add the default mode */ |
| 2531 | rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; | 2571 | rdev->pm.power_state[state_index].type = |
| 2532 | rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; | 2572 | POWER_STATE_TYPE_DEFAULT; |
| 2533 | rdev->pm.power_state[state_index].default_clock_mode = | 2573 | rdev->pm.power_state[state_index].num_clock_modes = 1; |
| 2534 | &rdev->pm.power_state[state_index].clock_info[0]; | 2574 | rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk; |
| 2535 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; | 2575 | rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk; |
| 2536 | rdev->pm.power_state[state_index].pcie_lanes = 16; | 2576 | rdev->pm.power_state[state_index].default_clock_mode = |
| 2537 | rdev->pm.default_power_state_index = state_index; | 2577 | &rdev->pm.power_state[state_index].clock_info[0]; |
| 2538 | rdev->pm.power_state[state_index].flags = 0; | 2578 | rdev->pm.power_state[state_index].clock_info[0].voltage.type = VOLTAGE_NONE; |
| 2539 | state_index++; | 2579 | rdev->pm.power_state[state_index].pcie_lanes = 16; |
| 2580 | rdev->pm.default_power_state_index = state_index; | ||
| 2581 | rdev->pm.power_state[state_index].flags = 0; | ||
| 2582 | state_index++; | ||
| 2583 | } | ||
| 2540 | } | 2584 | } |
| 2541 | } | 2585 | } |
| 2542 | 2586 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c index 5cafc90de7f8..17e1a9b2d8fb 100644 --- a/drivers/gpu/drm/radeon/radeon_benchmark.c +++ b/drivers/gpu/drm/radeon/radeon_benchmark.c | |||
| @@ -98,7 +98,7 @@ static void radeon_benchmark_move(struct radeon_device *rdev, unsigned size, | |||
| 98 | struct radeon_bo *sobj = NULL; | 98 | struct radeon_bo *sobj = NULL; |
| 99 | uint64_t saddr, daddr; | 99 | uint64_t saddr, daddr; |
| 100 | int r, n; | 100 | int r, n; |
| 101 | unsigned int time; | 101 | int time; |
| 102 | 102 | ||
| 103 | n = RADEON_BENCHMARK_ITERATIONS; | 103 | n = RADEON_BENCHMARK_ITERATIONS; |
| 104 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, &sobj); | 104 | r = radeon_bo_create(rdev, size, PAGE_SIZE, true, sdomain, &sobj); |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index fae00c0d75aa..ccaa243c1442 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
| @@ -222,7 +222,7 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
| 222 | struct radeon_cs_chunk *ib_chunk; | 222 | struct radeon_cs_chunk *ib_chunk; |
| 223 | int r; | 223 | int r; |
| 224 | 224 | ||
| 225 | mutex_lock(&rdev->cs_mutex); | 225 | radeon_mutex_lock(&rdev->cs_mutex); |
| 226 | /* initialize parser */ | 226 | /* initialize parser */ |
| 227 | memset(&parser, 0, sizeof(struct radeon_cs_parser)); | 227 | memset(&parser, 0, sizeof(struct radeon_cs_parser)); |
| 228 | parser.filp = filp; | 228 | parser.filp = filp; |
| @@ -233,14 +233,14 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
| 233 | if (r) { | 233 | if (r) { |
| 234 | DRM_ERROR("Failed to initialize parser !\n"); | 234 | DRM_ERROR("Failed to initialize parser !\n"); |
| 235 | radeon_cs_parser_fini(&parser, r); | 235 | radeon_cs_parser_fini(&parser, r); |
| 236 | mutex_unlock(&rdev->cs_mutex); | 236 | radeon_mutex_unlock(&rdev->cs_mutex); |
| 237 | return r; | 237 | return r; |
| 238 | } | 238 | } |
| 239 | r = radeon_ib_get(rdev, &parser.ib); | 239 | r = radeon_ib_get(rdev, &parser.ib); |
| 240 | if (r) { | 240 | if (r) { |
| 241 | DRM_ERROR("Failed to get ib !\n"); | 241 | DRM_ERROR("Failed to get ib !\n"); |
| 242 | radeon_cs_parser_fini(&parser, r); | 242 | radeon_cs_parser_fini(&parser, r); |
| 243 | mutex_unlock(&rdev->cs_mutex); | 243 | radeon_mutex_unlock(&rdev->cs_mutex); |
| 244 | return r; | 244 | return r; |
| 245 | } | 245 | } |
| 246 | r = radeon_cs_parser_relocs(&parser); | 246 | r = radeon_cs_parser_relocs(&parser); |
| @@ -248,7 +248,7 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
| 248 | if (r != -ERESTARTSYS) | 248 | if (r != -ERESTARTSYS) |
| 249 | DRM_ERROR("Failed to parse relocation %d!\n", r); | 249 | DRM_ERROR("Failed to parse relocation %d!\n", r); |
| 250 | radeon_cs_parser_fini(&parser, r); | 250 | radeon_cs_parser_fini(&parser, r); |
| 251 | mutex_unlock(&rdev->cs_mutex); | 251 | radeon_mutex_unlock(&rdev->cs_mutex); |
| 252 | return r; | 252 | return r; |
| 253 | } | 253 | } |
| 254 | /* Copy the packet into the IB, the parser will read from the | 254 | /* Copy the packet into the IB, the parser will read from the |
| @@ -260,14 +260,14 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
| 260 | if (r || parser.parser_error) { | 260 | if (r || parser.parser_error) { |
| 261 | DRM_ERROR("Invalid command stream !\n"); | 261 | DRM_ERROR("Invalid command stream !\n"); |
| 262 | radeon_cs_parser_fini(&parser, r); | 262 | radeon_cs_parser_fini(&parser, r); |
| 263 | mutex_unlock(&rdev->cs_mutex); | 263 | radeon_mutex_unlock(&rdev->cs_mutex); |
| 264 | return r; | 264 | return r; |
| 265 | } | 265 | } |
| 266 | r = radeon_cs_finish_pages(&parser); | 266 | r = radeon_cs_finish_pages(&parser); |
| 267 | if (r) { | 267 | if (r) { |
| 268 | DRM_ERROR("Invalid command stream !\n"); | 268 | DRM_ERROR("Invalid command stream !\n"); |
| 269 | radeon_cs_parser_fini(&parser, r); | 269 | radeon_cs_parser_fini(&parser, r); |
| 270 | mutex_unlock(&rdev->cs_mutex); | 270 | radeon_mutex_unlock(&rdev->cs_mutex); |
| 271 | return r; | 271 | return r; |
| 272 | } | 272 | } |
| 273 | r = radeon_ib_schedule(rdev, parser.ib); | 273 | r = radeon_ib_schedule(rdev, parser.ib); |
| @@ -275,7 +275,7 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
| 275 | DRM_ERROR("Failed to schedule IB !\n"); | 275 | DRM_ERROR("Failed to schedule IB !\n"); |
| 276 | } | 276 | } |
| 277 | radeon_cs_parser_fini(&parser, r); | 277 | radeon_cs_parser_fini(&parser, r); |
| 278 | mutex_unlock(&rdev->cs_mutex); | 278 | radeon_mutex_unlock(&rdev->cs_mutex); |
| 279 | return r; | 279 | return r; |
| 280 | } | 280 | } |
| 281 | 281 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index c33bc914d93d..c4d00a171411 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
| @@ -716,7 +716,7 @@ int radeon_device_init(struct radeon_device *rdev, | |||
| 716 | 716 | ||
| 717 | /* mutex initialization are all done here so we | 717 | /* mutex initialization are all done here so we |
| 718 | * can recall function without having locking issues */ | 718 | * can recall function without having locking issues */ |
| 719 | mutex_init(&rdev->cs_mutex); | 719 | radeon_mutex_init(&rdev->cs_mutex); |
| 720 | mutex_init(&rdev->ib_pool.mutex); | 720 | mutex_init(&rdev->ib_pool.mutex); |
| 721 | mutex_init(&rdev->cp.mutex); | 721 | mutex_init(&rdev->cp.mutex); |
| 722 | mutex_init(&rdev->dc_hw_i2c_mutex); | 722 | mutex_init(&rdev->dc_hw_i2c_mutex); |
| @@ -955,6 +955,9 @@ int radeon_gpu_reset(struct radeon_device *rdev) | |||
| 955 | int r; | 955 | int r; |
| 956 | int resched; | 956 | int resched; |
| 957 | 957 | ||
| 958 | /* Prevent CS ioctl from interfering */ | ||
| 959 | radeon_mutex_lock(&rdev->cs_mutex); | ||
| 960 | |||
| 958 | radeon_save_bios_scratch_regs(rdev); | 961 | radeon_save_bios_scratch_regs(rdev); |
| 959 | /* block TTM */ | 962 | /* block TTM */ |
| 960 | resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); | 963 | resched = ttm_bo_lock_delayed_workqueue(&rdev->mman.bdev); |
| @@ -967,10 +970,15 @@ int radeon_gpu_reset(struct radeon_device *rdev) | |||
| 967 | radeon_restore_bios_scratch_regs(rdev); | 970 | radeon_restore_bios_scratch_regs(rdev); |
| 968 | drm_helper_resume_force_mode(rdev->ddev); | 971 | drm_helper_resume_force_mode(rdev->ddev); |
| 969 | ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); | 972 | ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched); |
| 970 | return 0; | ||
| 971 | } | 973 | } |
| 972 | /* bad news, how to tell it to userspace ? */ | 974 | |
| 973 | dev_info(rdev->dev, "GPU reset failed\n"); | 975 | radeon_mutex_unlock(&rdev->cs_mutex); |
| 976 | |||
| 977 | if (r) { | ||
| 978 | /* bad news, how to tell it to userspace ? */ | ||
| 979 | dev_info(rdev->dev, "GPU reset failed\n"); | ||
| 980 | } | ||
| 981 | |||
| 974 | return r; | 982 | return r; |
| 975 | } | 983 | } |
| 976 | 984 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 41a5d48e657b..daadf2111040 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
| @@ -991,12 +991,6 @@ static bool radeon_crtc_mode_fixup(struct drm_crtc *crtc, | |||
| 991 | struct drm_display_mode *mode, | 991 | struct drm_display_mode *mode, |
| 992 | struct drm_display_mode *adjusted_mode) | 992 | struct drm_display_mode *adjusted_mode) |
| 993 | { | 993 | { |
| 994 | struct drm_device *dev = crtc->dev; | ||
| 995 | struct radeon_device *rdev = dev->dev_private; | ||
| 996 | |||
| 997 | /* adjust pm to upcoming mode change */ | ||
| 998 | radeon_pm_compute_clocks(rdev); | ||
| 999 | |||
| 1000 | if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) | 994 | if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode)) |
| 1001 | return false; | 995 | return false; |
| 1002 | return true; | 996 | return true; |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 6fabe89fa6a1..78a665bd9519 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
| @@ -53,6 +53,24 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev); | |||
| 53 | 53 | ||
| 54 | #define ACPI_AC_CLASS "ac_adapter" | 54 | #define ACPI_AC_CLASS "ac_adapter" |
| 55 | 55 | ||
| 56 | int radeon_pm_get_type_index(struct radeon_device *rdev, | ||
| 57 | enum radeon_pm_state_type ps_type, | ||
| 58 | int instance) | ||
| 59 | { | ||
| 60 | int i; | ||
| 61 | int found_instance = -1; | ||
| 62 | |||
| 63 | for (i = 0; i < rdev->pm.num_power_states; i++) { | ||
| 64 | if (rdev->pm.power_state[i].type == ps_type) { | ||
| 65 | found_instance++; | ||
| 66 | if (found_instance == instance) | ||
| 67 | return i; | ||
| 68 | } | ||
| 69 | } | ||
| 70 | /* return default if no match */ | ||
| 71 | return rdev->pm.default_power_state_index; | ||
| 72 | } | ||
| 73 | |||
| 56 | #ifdef CONFIG_ACPI | 74 | #ifdef CONFIG_ACPI |
| 57 | static int radeon_acpi_event(struct notifier_block *nb, | 75 | static int radeon_acpi_event(struct notifier_block *nb, |
| 58 | unsigned long val, | 76 | unsigned long val, |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c index 03daefa73397..880e285d7578 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c | |||
| @@ -105,6 +105,10 @@ int vmw_du_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, | |||
| 105 | struct vmw_dma_buffer *dmabuf = NULL; | 105 | struct vmw_dma_buffer *dmabuf = NULL; |
| 106 | int ret; | 106 | int ret; |
| 107 | 107 | ||
| 108 | /* A lot of the code assumes this */ | ||
| 109 | if (handle && (width != 64 || height != 64)) | ||
| 110 | return -EINVAL; | ||
| 111 | |||
| 108 | if (handle) { | 112 | if (handle) { |
| 109 | ret = vmw_user_surface_lookup_handle(dev_priv, tfile, | 113 | ret = vmw_user_surface_lookup_handle(dev_priv, tfile, |
| 110 | handle, &surface); | 114 | handle, &surface); |
| @@ -410,8 +414,9 @@ static int do_surface_dirty_sou(struct vmw_private *dev_priv, | |||
| 410 | top = clips->y1; | 414 | top = clips->y1; |
| 411 | bottom = clips->y2; | 415 | bottom = clips->y2; |
| 412 | 416 | ||
| 413 | clips_ptr = clips; | 417 | /* skip the first clip rect */ |
| 414 | for (i = 1; i < num_clips; i++, clips_ptr += inc) { | 418 | for (i = 1, clips_ptr = clips + inc; |
| 419 | i < num_clips; i++, clips_ptr += inc) { | ||
| 415 | left = min_t(int, left, (int)clips_ptr->x1); | 420 | left = min_t(int, left, (int)clips_ptr->x1); |
| 416 | right = max_t(int, right, (int)clips_ptr->x2); | 421 | right = max_t(int, right, (int)clips_ptr->x2); |
| 417 | top = min_t(int, top, (int)clips_ptr->y1); | 422 | top = min_t(int, top, (int)clips_ptr->y1); |
| @@ -1323,7 +1328,10 @@ int vmw_kms_close(struct vmw_private *dev_priv) | |||
| 1323 | * drm_encoder_cleanup which takes the lock we deadlock. | 1328 | * drm_encoder_cleanup which takes the lock we deadlock. |
| 1324 | */ | 1329 | */ |
| 1325 | drm_mode_config_cleanup(dev_priv->dev); | 1330 | drm_mode_config_cleanup(dev_priv->dev); |
| 1326 | vmw_kms_close_legacy_display_system(dev_priv); | 1331 | if (dev_priv->sou_priv) |
| 1332 | vmw_kms_close_screen_object_display(dev_priv); | ||
| 1333 | else | ||
| 1334 | vmw_kms_close_legacy_display_system(dev_priv); | ||
| 1327 | return 0; | 1335 | return 0; |
| 1328 | } | 1336 | } |
| 1329 | 1337 | ||
diff --git a/drivers/ide/ide-cd.c b/drivers/ide/ide-cd.c index 04b09564bfa9..8126824daccb 100644 --- a/drivers/ide/ide-cd.c +++ b/drivers/ide/ide-cd.c | |||
| @@ -43,7 +43,6 @@ | |||
| 43 | /* For SCSI -> ATAPI command conversion */ | 43 | /* For SCSI -> ATAPI command conversion */ |
| 44 | #include <scsi/scsi.h> | 44 | #include <scsi/scsi.h> |
| 45 | 45 | ||
| 46 | #include <linux/irq.h> | ||
| 47 | #include <linux/io.h> | 46 | #include <linux/io.h> |
| 48 | #include <asm/byteorder.h> | 47 | #include <asm/byteorder.h> |
| 49 | #include <linux/uaccess.h> | 48 | #include <linux/uaccess.h> |
diff --git a/drivers/ide/ide-floppy.c b/drivers/ide/ide-floppy.c index 61fdf544fbd6..3d42043fec51 100644 --- a/drivers/ide/ide-floppy.c +++ b/drivers/ide/ide-floppy.c | |||
| @@ -35,7 +35,6 @@ | |||
| 35 | #include <scsi/scsi_ioctl.h> | 35 | #include <scsi/scsi_ioctl.h> |
| 36 | 36 | ||
| 37 | #include <asm/byteorder.h> | 37 | #include <asm/byteorder.h> |
| 38 | #include <linux/irq.h> | ||
| 39 | #include <linux/uaccess.h> | 38 | #include <linux/uaccess.h> |
| 40 | #include <linux/io.h> | 39 | #include <linux/io.h> |
| 41 | #include <asm/unaligned.h> | 40 | #include <asm/unaligned.h> |
diff --git a/drivers/ide/ide-tape.c b/drivers/ide/ide-tape.c index 7ecb1ade8874..ce8237d36159 100644 --- a/drivers/ide/ide-tape.c +++ b/drivers/ide/ide-tape.c | |||
| @@ -41,7 +41,6 @@ | |||
| 41 | #include <scsi/scsi.h> | 41 | #include <scsi/scsi.h> |
| 42 | 42 | ||
| 43 | #include <asm/byteorder.h> | 43 | #include <asm/byteorder.h> |
| 44 | #include <linux/irq.h> | ||
| 45 | #include <linux/uaccess.h> | 44 | #include <linux/uaccess.h> |
| 46 | #include <linux/io.h> | 45 | #include <linux/io.h> |
| 47 | #include <asm/unaligned.h> | 46 | #include <asm/unaligned.h> |
diff --git a/drivers/macintosh/via-macii.c b/drivers/macintosh/via-macii.c index 817f37a875c9..c9570fcf1cce 100644 --- a/drivers/macintosh/via-macii.c +++ b/drivers/macintosh/via-macii.c | |||
| @@ -159,7 +159,7 @@ int macii_init(void) | |||
| 159 | err = macii_init_via(); | 159 | err = macii_init_via(); |
| 160 | if (err) goto out; | 160 | if (err) goto out; |
| 161 | 161 | ||
| 162 | err = request_irq(IRQ_MAC_ADB, macii_interrupt, IRQ_FLG_LOCK, "ADB", | 162 | err = request_irq(IRQ_MAC_ADB, macii_interrupt, 0, "ADB", |
| 163 | macii_interrupt); | 163 | macii_interrupt); |
| 164 | if (err) goto out; | 164 | if (err) goto out; |
| 165 | 165 | ||
diff --git a/drivers/macintosh/via-maciisi.c b/drivers/macintosh/via-maciisi.c index 9ab5b0c34f0d..34d02a91b29f 100644 --- a/drivers/macintosh/via-maciisi.c +++ b/drivers/macintosh/via-maciisi.c | |||
| @@ -122,8 +122,8 @@ maciisi_init(void) | |||
| 122 | return err; | 122 | return err; |
| 123 | } | 123 | } |
| 124 | 124 | ||
| 125 | if (request_irq(IRQ_MAC_ADB, maciisi_interrupt, IRQ_FLG_LOCK | IRQ_FLG_FAST, | 125 | if (request_irq(IRQ_MAC_ADB, maciisi_interrupt, 0, "ADB", |
| 126 | "ADB", maciisi_interrupt)) { | 126 | maciisi_interrupt)) { |
| 127 | printk(KERN_ERR "maciisi_init: can't get irq %d\n", IRQ_MAC_ADB); | 127 | printk(KERN_ERR "maciisi_init: can't get irq %d\n", IRQ_MAC_ADB); |
| 128 | return -EAGAIN; | 128 | return -EAGAIN; |
| 129 | } | 129 | } |
diff --git a/drivers/media/dvb/dvb-usb/mxl111sf-i2c.c b/drivers/media/dvb/dvb-usb/mxl111sf-i2c.c index 2e8c288258a9..34434557ef65 100644 --- a/drivers/media/dvb/dvb-usb/mxl111sf-i2c.c +++ b/drivers/media/dvb/dvb-usb/mxl111sf-i2c.c | |||
| @@ -398,7 +398,6 @@ static int mxl111sf_i2c_readagain(struct mxl111sf_state *state, | |||
| 398 | u8 i2c_r_data[24]; | 398 | u8 i2c_r_data[24]; |
| 399 | u8 i = 0; | 399 | u8 i = 0; |
| 400 | u8 fifo_status = 0; | 400 | u8 fifo_status = 0; |
| 401 | int ret; | ||
| 402 | int status = 0; | 401 | int status = 0; |
| 403 | 402 | ||
| 404 | mxl_i2c("read %d bytes", count); | 403 | mxl_i2c("read %d bytes", count); |
| @@ -418,7 +417,7 @@ static int mxl111sf_i2c_readagain(struct mxl111sf_state *state, | |||
| 418 | i2c_w_data[4+(i*3)] = 0x00; | 417 | i2c_w_data[4+(i*3)] = 0x00; |
| 419 | } | 418 | } |
| 420 | 419 | ||
| 421 | ret = mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data); | 420 | mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data); |
| 422 | 421 | ||
| 423 | /* Check for I2C NACK status */ | 422 | /* Check for I2C NACK status */ |
| 424 | if (mxl111sf_i2c_check_status(state) == 1) { | 423 | if (mxl111sf_i2c_check_status(state) == 1) { |
diff --git a/drivers/media/dvb/dvb-usb/mxl111sf-phy.c b/drivers/media/dvb/dvb-usb/mxl111sf-phy.c index 91dc1fc2825b..b741b3a7a325 100644 --- a/drivers/media/dvb/dvb-usb/mxl111sf-phy.c +++ b/drivers/media/dvb/dvb-usb/mxl111sf-phy.c | |||
| @@ -296,8 +296,7 @@ int mxl111sf_config_spi(struct mxl111sf_state *state, int onoff) | |||
| 296 | goto fail; | 296 | goto fail; |
| 297 | 297 | ||
| 298 | ret = mxl111sf_write_reg(state, 0x00, 0x00); | 298 | ret = mxl111sf_write_reg(state, 0x00, 0x00); |
| 299 | if (mxl_fail(ret)) | 299 | mxl_fail(ret); |
| 300 | goto fail; | ||
| 301 | fail: | 300 | fail: |
| 302 | return ret; | 301 | return ret; |
| 303 | } | 302 | } |
| @@ -328,11 +327,13 @@ int mxl111sf_idac_config(struct mxl111sf_state *state, | |||
| 328 | /* set hysteresis value reg: 0x0B<5:0> */ | 327 | /* set hysteresis value reg: 0x0B<5:0> */ |
| 329 | ret = mxl111sf_write_reg(state, V6_IDAC_HYSTERESIS_REG, | 328 | ret = mxl111sf_write_reg(state, V6_IDAC_HYSTERESIS_REG, |
| 330 | (hysteresis_value & 0x3F)); | 329 | (hysteresis_value & 0x3F)); |
| 330 | mxl_fail(ret); | ||
| 331 | } | 331 | } |
| 332 | 332 | ||
| 333 | ret = mxl111sf_write_reg(state, V6_IDAC_SETTINGS_REG, val); | 333 | ret = mxl111sf_write_reg(state, V6_IDAC_SETTINGS_REG, val); |
| 334 | mxl_fail(ret); | ||
| 334 | 335 | ||
| 335 | return val; | 336 | return ret; |
| 336 | } | 337 | } |
| 337 | 338 | ||
| 338 | /* | 339 | /* |
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_dec.c b/drivers/media/video/s5p-mfc/s5p_mfc_dec.c index 725634d9736d..844a4d7797bc 100644 --- a/drivers/media/video/s5p-mfc/s5p_mfc_dec.c +++ b/drivers/media/video/s5p-mfc/s5p_mfc_dec.c | |||
| @@ -220,8 +220,8 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 220 | strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1); | 220 | strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1); |
| 221 | cap->bus_info[0] = 0; | 221 | cap->bus_info[0] = 0; |
| 222 | cap->version = KERNEL_VERSION(1, 0, 0); | 222 | cap->version = KERNEL_VERSION(1, 0, 0); |
| 223 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT | 223 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE_MPLANE | |
| 224 | | V4L2_CAP_STREAMING; | 224 | V4L2_CAP_VIDEO_OUTPUT_MPLANE | V4L2_CAP_STREAMING; |
| 225 | return 0; | 225 | return 0; |
| 226 | } | 226 | } |
| 227 | 227 | ||
diff --git a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c index ecef127dbc66..1e8cdb77d4b8 100644 --- a/drivers/media/video/s5p-mfc/s5p_mfc_enc.c +++ b/drivers/media/video/s5p-mfc/s5p_mfc_enc.c | |||
| @@ -785,8 +785,8 @@ static int vidioc_querycap(struct file *file, void *priv, | |||
| 785 | strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1); | 785 | strncpy(cap->card, dev->plat_dev->name, sizeof(cap->card) - 1); |
| 786 | cap->bus_info[0] = 0; | 786 | cap->bus_info[0] = 0; |
| 787 | cap->version = KERNEL_VERSION(1, 0, 0); | 787 | cap->version = KERNEL_VERSION(1, 0, 0); |
| 788 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | 788 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE_MPLANE |
| 789 | | V4L2_CAP_VIDEO_OUTPUT | 789 | | V4L2_CAP_VIDEO_OUTPUT_MPLANE |
| 790 | | V4L2_CAP_STREAMING; | 790 | | V4L2_CAP_STREAMING; |
| 791 | return 0; | 791 | return 0; |
| 792 | } | 792 | } |
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c index 10c2364f3e8a..254d32688843 100644 --- a/drivers/media/video/uvc/uvc_ctrl.c +++ b/drivers/media/video/uvc/uvc_ctrl.c | |||
| @@ -1016,7 +1016,8 @@ int uvc_query_v4l2_menu(struct uvc_video_chain *chain, | |||
| 1016 | 1016 | ||
| 1017 | menu_info = &mapping->menu_info[query_menu->index]; | 1017 | menu_info = &mapping->menu_info[query_menu->index]; |
| 1018 | 1018 | ||
| 1019 | if (ctrl->info.flags & UVC_CTRL_FLAG_GET_RES) { | 1019 | if (mapping->data_type == UVC_CTRL_DATA_TYPE_BITMASK && |
| 1020 | (ctrl->info.flags & UVC_CTRL_FLAG_GET_RES)) { | ||
| 1020 | s32 bitmap; | 1021 | s32 bitmap; |
| 1021 | 1022 | ||
| 1022 | if (!ctrl->cached) { | 1023 | if (!ctrl->cached) { |
| @@ -1225,7 +1226,8 @@ int uvc_ctrl_set(struct uvc_video_chain *chain, | |||
| 1225 | /* Valid menu indices are reported by the GET_RES request for | 1226 | /* Valid menu indices are reported by the GET_RES request for |
| 1226 | * UVC controls that support it. | 1227 | * UVC controls that support it. |
| 1227 | */ | 1228 | */ |
| 1228 | if (ctrl->info.flags & UVC_CTRL_FLAG_GET_RES) { | 1229 | if (mapping->data_type == UVC_CTRL_DATA_TYPE_BITMASK && |
| 1230 | (ctrl->info.flags & UVC_CTRL_FLAG_GET_RES)) { | ||
| 1229 | if (!ctrl->cached) { | 1231 | if (!ctrl->cached) { |
| 1230 | ret = uvc_ctrl_populate_cache(chain, ctrl); | 1232 | ret = uvc_ctrl_populate_cache(chain, ctrl); |
| 1231 | if (ret < 0) | 1233 | if (ret < 0) |
diff --git a/drivers/media/video/v4l2-ctrls.c b/drivers/media/video/v4l2-ctrls.c index f17f92b86a30..0f415dade05a 100644 --- a/drivers/media/video/v4l2-ctrls.c +++ b/drivers/media/video/v4l2-ctrls.c | |||
| @@ -821,8 +821,8 @@ static void send_event(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl, u32 changes) | |||
| 821 | fill_event(&ev, ctrl, changes); | 821 | fill_event(&ev, ctrl, changes); |
| 822 | 822 | ||
| 823 | list_for_each_entry(sev, &ctrl->ev_subs, node) | 823 | list_for_each_entry(sev, &ctrl->ev_subs, node) |
| 824 | if (sev->fh && (sev->fh != fh || | 824 | if (sev->fh != fh || |
| 825 | (sev->flags & V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK))) | 825 | (sev->flags & V4L2_EVENT_SUB_FL_ALLOW_FEEDBACK)) |
| 826 | v4l2_event_queue_fh(sev->fh, &ev); | 826 | v4l2_event_queue_fh(sev->fh, &ev); |
| 827 | } | 827 | } |
| 828 | 828 | ||
| @@ -947,6 +947,7 @@ static void new_to_cur(struct v4l2_fh *fh, struct v4l2_ctrl *ctrl, | |||
| 947 | if (ctrl->cluster[0]->has_volatiles) | 947 | if (ctrl->cluster[0]->has_volatiles) |
| 948 | ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; | 948 | ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE; |
| 949 | } | 949 | } |
| 950 | fh = NULL; | ||
| 950 | } | 951 | } |
| 951 | if (changed || update_inactive) { | 952 | if (changed || update_inactive) { |
| 952 | /* If a control was changed that was not one of the controls | 953 | /* If a control was changed that was not one of the controls |
diff --git a/drivers/media/video/v4l2-event.c b/drivers/media/video/v4l2-event.c index 46037f225529..c26ad9637143 100644 --- a/drivers/media/video/v4l2-event.c +++ b/drivers/media/video/v4l2-event.c | |||
| @@ -216,6 +216,9 @@ int v4l2_event_subscribe(struct v4l2_fh *fh, | |||
| 216 | unsigned long flags; | 216 | unsigned long flags; |
| 217 | unsigned i; | 217 | unsigned i; |
| 218 | 218 | ||
| 219 | if (sub->type == V4L2_EVENT_ALL) | ||
| 220 | return -EINVAL; | ||
| 221 | |||
| 219 | if (elems < 1) | 222 | if (elems < 1) |
| 220 | elems = 1; | 223 | elems = 1; |
| 221 | if (sub->type == V4L2_EVENT_CTRL) { | 224 | if (sub->type == V4L2_EVENT_CTRL) { |
| @@ -283,6 +286,7 @@ int v4l2_event_unsubscribe(struct v4l2_fh *fh, | |||
| 283 | { | 286 | { |
| 284 | struct v4l2_subscribed_event *sev; | 287 | struct v4l2_subscribed_event *sev; |
| 285 | unsigned long flags; | 288 | unsigned long flags; |
| 289 | int i; | ||
| 286 | 290 | ||
| 287 | if (sub->type == V4L2_EVENT_ALL) { | 291 | if (sub->type == V4L2_EVENT_ALL) { |
| 288 | v4l2_event_unsubscribe_all(fh); | 292 | v4l2_event_unsubscribe_all(fh); |
| @@ -293,8 +297,12 @@ int v4l2_event_unsubscribe(struct v4l2_fh *fh, | |||
| 293 | 297 | ||
| 294 | sev = v4l2_event_subscribed(fh, sub->type, sub->id); | 298 | sev = v4l2_event_subscribed(fh, sub->type, sub->id); |
| 295 | if (sev != NULL) { | 299 | if (sev != NULL) { |
| 300 | /* Remove any pending events for this subscription */ | ||
| 301 | for (i = 0; i < sev->in_use; i++) { | ||
| 302 | list_del(&sev->events[sev_pos(sev, i)].list); | ||
| 303 | fh->navailable--; | ||
| 304 | } | ||
| 296 | list_del(&sev->list); | 305 | list_del(&sev->list); |
| 297 | sev->fh = NULL; | ||
| 298 | } | 306 | } |
| 299 | 307 | ||
| 300 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); | 308 | spin_unlock_irqrestore(&fh->vdev->fh_lock, flags); |
diff --git a/drivers/media/video/videobuf2-core.c b/drivers/media/video/videobuf2-core.c index 979e544388cb..95a3f5e82aef 100644 --- a/drivers/media/video/videobuf2-core.c +++ b/drivers/media/video/videobuf2-core.c | |||
| @@ -131,6 +131,7 @@ static void __setup_offsets(struct vb2_queue *q, unsigned int n) | |||
| 131 | continue; | 131 | continue; |
| 132 | 132 | ||
| 133 | for (plane = 0; plane < vb->num_planes; ++plane) { | 133 | for (plane = 0; plane < vb->num_planes; ++plane) { |
| 134 | vb->v4l2_planes[plane].length = q->plane_sizes[plane]; | ||
| 134 | vb->v4l2_planes[plane].m.mem_offset = off; | 135 | vb->v4l2_planes[plane].m.mem_offset = off; |
| 135 | 136 | ||
| 136 | dprintk(3, "Buffer %d, plane %d offset 0x%08lx\n", | 137 | dprintk(3, "Buffer %d, plane %d offset 0x%08lx\n", |
| @@ -264,6 +265,7 @@ static void __vb2_queue_free(struct vb2_queue *q, unsigned int buffers) | |||
| 264 | q->num_buffers -= buffers; | 265 | q->num_buffers -= buffers; |
| 265 | if (!q->num_buffers) | 266 | if (!q->num_buffers) |
| 266 | q->memory = 0; | 267 | q->memory = 0; |
| 268 | INIT_LIST_HEAD(&q->queued_list); | ||
| 267 | } | 269 | } |
| 268 | 270 | ||
| 269 | /** | 271 | /** |
| @@ -296,14 +298,14 @@ static bool __buffer_in_use(struct vb2_queue *q, struct vb2_buffer *vb) | |||
| 296 | { | 298 | { |
| 297 | unsigned int plane; | 299 | unsigned int plane; |
| 298 | for (plane = 0; plane < vb->num_planes; ++plane) { | 300 | for (plane = 0; plane < vb->num_planes; ++plane) { |
| 301 | void *mem_priv = vb->planes[plane].mem_priv; | ||
| 299 | /* | 302 | /* |
| 300 | * If num_users() has not been provided, call_memop | 303 | * If num_users() has not been provided, call_memop |
| 301 | * will return 0, apparently nobody cares about this | 304 | * will return 0, apparently nobody cares about this |
| 302 | * case anyway. If num_users() returns more than 1, | 305 | * case anyway. If num_users() returns more than 1, |
| 303 | * we are not the only user of the plane's memory. | 306 | * we are not the only user of the plane's memory. |
| 304 | */ | 307 | */ |
| 305 | if (call_memop(q, plane, num_users, | 308 | if (mem_priv && call_memop(q, plane, num_users, mem_priv) > 1) |
| 306 | vb->planes[plane].mem_priv) > 1) | ||
| 307 | return true; | 309 | return true; |
| 308 | } | 310 | } |
| 309 | return false; | 311 | return false; |
diff --git a/drivers/ps3/ps3-vuart.c b/drivers/ps3/ps3-vuart.c index d9fb729535a1..fb7300837fee 100644 --- a/drivers/ps3/ps3-vuart.c +++ b/drivers/ps3/ps3-vuart.c | |||
| @@ -952,7 +952,7 @@ static int ps3_vuart_bus_interrupt_get(void) | |||
| 952 | } | 952 | } |
| 953 | 953 | ||
| 954 | result = request_irq(vuart_bus_priv.virq, ps3_vuart_irq_handler, | 954 | result = request_irq(vuart_bus_priv.virq, ps3_vuart_irq_handler, |
| 955 | IRQF_DISABLED, "vuart", &vuart_bus_priv); | 955 | 0, "vuart", &vuart_bus_priv); |
| 956 | 956 | ||
| 957 | if (result) { | 957 | if (result) { |
| 958 | pr_debug("%s:%d: request_irq failed (%d)\n", | 958 | pr_debug("%s:%d: request_irq failed (%d)\n", |
diff --git a/drivers/ps3/ps3stor_lib.c b/drivers/ps3/ps3stor_lib.c index cc328dec946b..8c3f5adf1bc6 100644 --- a/drivers/ps3/ps3stor_lib.c +++ b/drivers/ps3/ps3stor_lib.c | |||
| @@ -167,7 +167,7 @@ int ps3stor_setup(struct ps3_storage_device *dev, irq_handler_t handler) | |||
| 167 | goto fail_close_device; | 167 | goto fail_close_device; |
| 168 | } | 168 | } |
| 169 | 169 | ||
| 170 | error = request_irq(dev->irq, handler, IRQF_DISABLED, | 170 | error = request_irq(dev->irq, handler, 0, |
| 171 | dev->sbd.core.driver->name, dev); | 171 | dev->sbd.core.driver->name, dev); |
| 172 | if (error) { | 172 | if (error) { |
| 173 | dev_err(&dev->sbd.core, "%s:%u: request_irq failed %d\n", | 173 | dev_err(&dev->sbd.core, "%s:%u: request_irq failed %d\n", |
diff --git a/drivers/rtc/rtc-mrst.c b/drivers/rtc/rtc-mrst.c index d33544802a2e..bb21f443fb70 100644 --- a/drivers/rtc/rtc-mrst.c +++ b/drivers/rtc/rtc-mrst.c | |||
| @@ -76,12 +76,15 @@ static inline unsigned char vrtc_is_updating(void) | |||
| 76 | /* | 76 | /* |
| 77 | * rtc_time's year contains the increment over 1900, but vRTC's YEAR | 77 | * rtc_time's year contains the increment over 1900, but vRTC's YEAR |
| 78 | * register can't be programmed to value larger than 0x64, so vRTC | 78 | * register can't be programmed to value larger than 0x64, so vRTC |
| 79 | * driver chose to use 1960 (1970 is UNIX time start point) as the base, | 79 | * driver chose to use 1972 (1970 is UNIX time start point) as the base, |
| 80 | * and does the translation at read/write time. | 80 | * and does the translation at read/write time. |
| 81 | * | 81 | * |
| 82 | * Why not just use 1970 as the offset? it's because using 1960 will | 82 | * Why not just use 1970 as the offset? it's because using 1972 will |
| 83 | * make it consistent in leap year setting for both vrtc and low-level | 83 | * make it consistent in leap year setting for both vrtc and low-level |
| 84 | * physical rtc devices. | 84 | * physical rtc devices. Then why not use 1960 as the offset? If we use |
| 85 | * 1960, for a device's first use, its YEAR register is 0 and the system | ||
| 86 | * year will be parsed as 1960 which is not a valid UNIX time and will | ||
| 87 | * cause many applications to fail mysteriously. | ||
| 85 | */ | 88 | */ |
| 86 | static int mrst_read_time(struct device *dev, struct rtc_time *time) | 89 | static int mrst_read_time(struct device *dev, struct rtc_time *time) |
| 87 | { | 90 | { |
| @@ -99,10 +102,10 @@ static int mrst_read_time(struct device *dev, struct rtc_time *time) | |||
| 99 | time->tm_year = vrtc_cmos_read(RTC_YEAR); | 102 | time->tm_year = vrtc_cmos_read(RTC_YEAR); |
| 100 | spin_unlock_irqrestore(&rtc_lock, flags); | 103 | spin_unlock_irqrestore(&rtc_lock, flags); |
| 101 | 104 | ||
| 102 | /* Adjust for the 1960/1900 */ | 105 | /* Adjust for the 1972/1900 */ |
| 103 | time->tm_year += 60; | 106 | time->tm_year += 72; |
| 104 | time->tm_mon--; | 107 | time->tm_mon--; |
| 105 | return RTC_24H; | 108 | return rtc_valid_tm(time); |
| 106 | } | 109 | } |
| 107 | 110 | ||
| 108 | static int mrst_set_time(struct device *dev, struct rtc_time *time) | 111 | static int mrst_set_time(struct device *dev, struct rtc_time *time) |
| @@ -119,9 +122,9 @@ static int mrst_set_time(struct device *dev, struct rtc_time *time) | |||
| 119 | min = time->tm_min; | 122 | min = time->tm_min; |
| 120 | sec = time->tm_sec; | 123 | sec = time->tm_sec; |
| 121 | 124 | ||
| 122 | if (yrs < 70 || yrs > 138) | 125 | if (yrs < 72 || yrs > 138) |
| 123 | return -EINVAL; | 126 | return -EINVAL; |
| 124 | yrs -= 60; | 127 | yrs -= 72; |
| 125 | 128 | ||
| 126 | spin_lock_irqsave(&rtc_lock, flags); | 129 | spin_lock_irqsave(&rtc_lock, flags); |
| 127 | 130 | ||
