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-rw-r--r--drivers/tty/hvc/hvc_console.c6
-rw-r--r--drivers/tty/n_tty.c11
-rw-r--r--drivers/tty/serial/Kconfig4
-rw-r--r--drivers/tty/serial/amba-pl011.c21
-rw-r--r--drivers/tty/serial/atmel_serial.c3
-rw-r--r--drivers/tty/serial/crisv10.c112
-rw-r--r--drivers/tty/serial/imx.c3
-rw-r--r--drivers/tty/serial/max310x.c416
-rw-r--r--drivers/tty/serial/msm_serial.c140
-rw-r--r--drivers/tty/serial/msm_serial.h9
-rw-r--r--drivers/tty/serial/pch_uart.c2
-rw-r--r--drivers/tty/serial/samsung.c40
-rw-r--r--drivers/tty/serial/sh-sci.c2
-rw-r--r--drivers/tty/serial/sirfsoc_uart.c195
-rw-r--r--drivers/tty/serial/sirfsoc_uart.h5
15 files changed, 481 insertions, 488 deletions
diff --git a/drivers/tty/hvc/hvc_console.c b/drivers/tty/hvc/hvc_console.c
index 50b46881b6ca..94f9e3a38412 100644
--- a/drivers/tty/hvc/hvc_console.c
+++ b/drivers/tty/hvc/hvc_console.c
@@ -31,6 +31,7 @@
31#include <linux/list.h> 31#include <linux/list.h>
32#include <linux/module.h> 32#include <linux/module.h>
33#include <linux/major.h> 33#include <linux/major.h>
34#include <linux/atomic.h>
34#include <linux/sysrq.h> 35#include <linux/sysrq.h>
35#include <linux/tty.h> 36#include <linux/tty.h>
36#include <linux/tty_flip.h> 37#include <linux/tty_flip.h>
@@ -70,6 +71,9 @@ static struct task_struct *hvc_task;
70/* Picks up late kicks after list walk but before schedule() */ 71/* Picks up late kicks after list walk but before schedule() */
71static int hvc_kicked; 72static int hvc_kicked;
72 73
74/* hvc_init is triggered from hvc_alloc, i.e. only when actually used */
75static atomic_t hvc_needs_init __read_mostly = ATOMIC_INIT(-1);
76
73static int hvc_init(void); 77static int hvc_init(void);
74 78
75#ifdef CONFIG_MAGIC_SYSRQ 79#ifdef CONFIG_MAGIC_SYSRQ
@@ -851,7 +855,7 @@ struct hvc_struct *hvc_alloc(uint32_t vtermno, int data,
851 int i; 855 int i;
852 856
853 /* We wait until a driver actually comes along */ 857 /* We wait until a driver actually comes along */
854 if (!hvc_driver) { 858 if (atomic_inc_not_zero(&hvc_needs_init)) {
855 int err = hvc_init(); 859 int err = hvc_init();
856 if (err) 860 if (err)
857 return ERR_PTR(err); 861 return ERR_PTR(err);
diff --git a/drivers/tty/n_tty.c b/drivers/tty/n_tty.c
index d15624c1b751..41fe8a047d37 100644
--- a/drivers/tty/n_tty.c
+++ b/drivers/tty/n_tty.c
@@ -1900,13 +1900,10 @@ static inline int input_available_p(struct tty_struct *tty, int poll)
1900 struct n_tty_data *ldata = tty->disc_data; 1900 struct n_tty_data *ldata = tty->disc_data;
1901 int amt = poll && !TIME_CHAR(tty) && MIN_CHAR(tty) ? MIN_CHAR(tty) : 1; 1901 int amt = poll && !TIME_CHAR(tty) && MIN_CHAR(tty) ? MIN_CHAR(tty) : 1;
1902 1902
1903 if (ldata->icanon && !L_EXTPROC(tty)) { 1903 if (ldata->icanon && !L_EXTPROC(tty))
1904 if (ldata->canon_head != ldata->read_tail) 1904 return ldata->canon_head != ldata->read_tail;
1905 return 1; 1905 else
1906 } else if (read_cnt(ldata) >= amt) 1906 return read_cnt(ldata) >= amt;
1907 return 1;
1908
1909 return 0;
1910} 1907}
1911 1908
1912/** 1909/**
diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
index a3815eaed421..2577d67bacb2 100644
--- a/drivers/tty/serial/Kconfig
+++ b/drivers/tty/serial/Kconfig
@@ -289,7 +289,7 @@ config SERIAL_MAX3100
289 MAX3100 chip support 289 MAX3100 chip support
290 290
291config SERIAL_MAX310X 291config SERIAL_MAX310X
292 bool "MAX310X support" 292 tristate "MAX310X support"
293 depends on SPI_MASTER 293 depends on SPI_MASTER
294 select SERIAL_CORE 294 select SERIAL_CORE
295 select REGMAP_SPI if SPI_MASTER 295 select REGMAP_SPI if SPI_MASTER
@@ -708,7 +708,7 @@ config SERIAL_IP22_ZILOG_CONSOLE
708 708
709config SERIAL_SH_SCI 709config SERIAL_SH_SCI
710 tristate "SuperH SCI(F) serial port support" 710 tristate "SuperH SCI(F) serial port support"
711 depends on HAVE_CLK && (SUPERH || ARM || COMPILE_TEST) 711 depends on SUPERH || ARCH_SHMOBILE || COMPILE_TEST
712 select SERIAL_CORE 712 select SERIAL_CORE
713 713
714config SERIAL_SH_SCI_NR_UARTS 714config SERIAL_SH_SCI_NR_UARTS
diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c
index d58783d364e3..d4eda24aa68b 100644
--- a/drivers/tty/serial/amba-pl011.c
+++ b/drivers/tty/serial/amba-pl011.c
@@ -2154,9 +2154,19 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
2154 amba_ports[i] = uap; 2154 amba_ports[i] = uap;
2155 2155
2156 amba_set_drvdata(dev, uap); 2156 amba_set_drvdata(dev, uap);
2157
2158 if (!amba_reg.state) {
2159 ret = uart_register_driver(&amba_reg);
2160 if (ret < 0) {
2161 pr_err("Failed to register AMBA-PL011 driver\n");
2162 return ret;
2163 }
2164 }
2165
2157 ret = uart_add_one_port(&amba_reg, &uap->port); 2166 ret = uart_add_one_port(&amba_reg, &uap->port);
2158 if (ret) { 2167 if (ret) {
2159 amba_ports[i] = NULL; 2168 amba_ports[i] = NULL;
2169 uart_unregister_driver(&amba_reg);
2160 pl011_dma_remove(uap); 2170 pl011_dma_remove(uap);
2161 } 2171 }
2162 out: 2172 out:
@@ -2175,6 +2185,7 @@ static int pl011_remove(struct amba_device *dev)
2175 amba_ports[i] = NULL; 2185 amba_ports[i] = NULL;
2176 2186
2177 pl011_dma_remove(uap); 2187 pl011_dma_remove(uap);
2188 uart_unregister_driver(&amba_reg);
2178 return 0; 2189 return 0;
2179} 2190}
2180 2191
@@ -2230,22 +2241,14 @@ static struct amba_driver pl011_driver = {
2230 2241
2231static int __init pl011_init(void) 2242static int __init pl011_init(void)
2232{ 2243{
2233 int ret;
2234 printk(KERN_INFO "Serial: AMBA PL011 UART driver\n"); 2244 printk(KERN_INFO "Serial: AMBA PL011 UART driver\n");
2235 2245
2236 ret = uart_register_driver(&amba_reg); 2246 return amba_driver_register(&pl011_driver);
2237 if (ret == 0) {
2238 ret = amba_driver_register(&pl011_driver);
2239 if (ret)
2240 uart_unregister_driver(&amba_reg);
2241 }
2242 return ret;
2243} 2247}
2244 2248
2245static void __exit pl011_exit(void) 2249static void __exit pl011_exit(void)
2246{ 2250{
2247 amba_driver_unregister(&pl011_driver); 2251 amba_driver_unregister(&pl011_driver);
2248 uart_unregister_driver(&amba_reg);
2249} 2252}
2250 2253
2251/* 2254/*
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index a49f10d269b2..3d7206fc532f 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -1853,13 +1853,10 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
1853 mode &= ~ATMEL_US_USMODE; 1853 mode &= ~ATMEL_US_USMODE;
1854 1854
1855 if (atmel_port->rs485.flags & SER_RS485_ENABLED) { 1855 if (atmel_port->rs485.flags & SER_RS485_ENABLED) {
1856 dev_dbg(port->dev, "Setting UART to RS485\n");
1857 if ((atmel_port->rs485.delay_rts_after_send) > 0) 1856 if ((atmel_port->rs485.delay_rts_after_send) > 0)
1858 UART_PUT_TTGR(port, 1857 UART_PUT_TTGR(port,
1859 atmel_port->rs485.delay_rts_after_send); 1858 atmel_port->rs485.delay_rts_after_send);
1860 mode |= ATMEL_US_USMODE_RS485; 1859 mode |= ATMEL_US_USMODE_RS485;
1861 } else {
1862 dev_dbg(port->dev, "Setting UART to RS232\n");
1863 } 1860 }
1864 1861
1865 /* set the parity, stop bits and data size */ 1862 /* set the parity, stop bits and data size */
diff --git a/drivers/tty/serial/crisv10.c b/drivers/tty/serial/crisv10.c
index 690bdea0a0c1..d567ac5d3af4 100644
--- a/drivers/tty/serial/crisv10.c
+++ b/drivers/tty/serial/crisv10.c
@@ -286,7 +286,6 @@ static struct e100_serial rs_table[] = {
286#endif 286#endif
287 287
288}, /* ttyS0 */ 288}, /* ttyS0 */
289#ifndef CONFIG_SVINTO_SIM
290 { .baud = DEF_BAUD, 289 { .baud = DEF_BAUD,
291 .ioport = (unsigned char *)R_SERIAL1_CTRL, 290 .ioport = (unsigned char *)R_SERIAL1_CTRL,
292 .irq = 1U << 16, /* uses DMA 8 and 9 */ 291 .irq = 1U << 16, /* uses DMA 8 and 9 */
@@ -447,7 +446,6 @@ static struct e100_serial rs_table[] = {
447 .dma_in_enabled = 0 446 .dma_in_enabled = 0
448#endif 447#endif
449 } /* ttyS3 */ 448 } /* ttyS3 */
450#endif
451}; 449};
452 450
453 451
@@ -1035,7 +1033,6 @@ cflag_to_etrax_baud(unsigned int cflag)
1035static inline void 1033static inline void
1036e100_dtr(struct e100_serial *info, int set) 1034e100_dtr(struct e100_serial *info, int set)
1037{ 1035{
1038#ifndef CONFIG_SVINTO_SIM
1039 unsigned char mask = e100_modem_pins[info->line].dtr_mask; 1036 unsigned char mask = e100_modem_pins[info->line].dtr_mask;
1040 1037
1041#ifdef SERIAL_DEBUG_IO 1038#ifdef SERIAL_DEBUG_IO
@@ -1060,7 +1057,6 @@ e100_dtr(struct e100_serial *info, int set)
1060 info->line, *e100_modem_pins[info->line].dtr_shadow, 1057 info->line, *e100_modem_pins[info->line].dtr_shadow,
1061 E100_DTR_GET(info)); 1058 E100_DTR_GET(info));
1062#endif 1059#endif
1063#endif
1064} 1060}
1065 1061
1066/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive 1062/* set = 0 means 3.3V on the pin, bitvalue: 0=active, 1=inactive
@@ -1069,7 +1065,6 @@ e100_dtr(struct e100_serial *info, int set)
1069static inline void 1065static inline void
1070e100_rts(struct e100_serial *info, int set) 1066e100_rts(struct e100_serial *info, int set)
1071{ 1067{
1072#ifndef CONFIG_SVINTO_SIM
1073 unsigned long flags; 1068 unsigned long flags;
1074 local_irq_save(flags); 1069 local_irq_save(flags);
1075 info->rx_ctrl &= ~E100_RTS_MASK; 1070 info->rx_ctrl &= ~E100_RTS_MASK;
@@ -1079,7 +1074,6 @@ e100_rts(struct e100_serial *info, int set)
1079#ifdef SERIAL_DEBUG_IO 1074#ifdef SERIAL_DEBUG_IO
1080 printk("ser%i rts %i\n", info->line, set); 1075 printk("ser%i rts %i\n", info->line, set);
1081#endif 1076#endif
1082#endif
1083} 1077}
1084 1078
1085 1079
@@ -1087,7 +1081,6 @@ e100_rts(struct e100_serial *info, int set)
1087static inline void 1081static inline void
1088e100_ri_out(struct e100_serial *info, int set) 1082e100_ri_out(struct e100_serial *info, int set)
1089{ 1083{
1090#ifndef CONFIG_SVINTO_SIM
1091 /* RI is active low */ 1084 /* RI is active low */
1092 { 1085 {
1093 unsigned char mask = e100_modem_pins[info->line].ri_mask; 1086 unsigned char mask = e100_modem_pins[info->line].ri_mask;
@@ -1099,12 +1092,10 @@ e100_ri_out(struct e100_serial *info, int set)
1099 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow; 1092 *e100_modem_pins[info->line].ri_port = *e100_modem_pins[info->line].ri_shadow;
1100 local_irq_restore(flags); 1093 local_irq_restore(flags);
1101 } 1094 }
1102#endif
1103} 1095}
1104static inline void 1096static inline void
1105e100_cd_out(struct e100_serial *info, int set) 1097e100_cd_out(struct e100_serial *info, int set)
1106{ 1098{
1107#ifndef CONFIG_SVINTO_SIM
1108 /* CD is active low */ 1099 /* CD is active low */
1109 { 1100 {
1110 unsigned char mask = e100_modem_pins[info->line].cd_mask; 1101 unsigned char mask = e100_modem_pins[info->line].cd_mask;
@@ -1116,27 +1107,22 @@ e100_cd_out(struct e100_serial *info, int set)
1116 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow; 1107 *e100_modem_pins[info->line].cd_port = *e100_modem_pins[info->line].cd_shadow;
1117 local_irq_restore(flags); 1108 local_irq_restore(flags);
1118 } 1109 }
1119#endif
1120} 1110}
1121 1111
1122static inline void 1112static inline void
1123e100_disable_rx(struct e100_serial *info) 1113e100_disable_rx(struct e100_serial *info)
1124{ 1114{
1125#ifndef CONFIG_SVINTO_SIM
1126 /* disable the receiver */ 1115 /* disable the receiver */
1127 info->ioport[REG_REC_CTRL] = 1116 info->ioport[REG_REC_CTRL] =
1128 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable)); 1117 (info->rx_ctrl &= ~IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1129#endif
1130} 1118}
1131 1119
1132static inline void 1120static inline void
1133e100_enable_rx(struct e100_serial *info) 1121e100_enable_rx(struct e100_serial *info)
1134{ 1122{
1135#ifndef CONFIG_SVINTO_SIM
1136 /* enable the receiver */ 1123 /* enable the receiver */
1137 info->ioport[REG_REC_CTRL] = 1124 info->ioport[REG_REC_CTRL] =
1138 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable)); 1125 (info->rx_ctrl |= IO_MASK(R_SERIAL0_REC_CTRL, rec_enable));
1139#endif
1140} 1126}
1141 1127
1142/* the rx DMA uses both the dma_descr and the dma_eop interrupts */ 1128/* the rx DMA uses both the dma_descr and the dma_eop interrupts */
@@ -1554,24 +1540,6 @@ transmit_chars_dma(struct e100_serial *info)
1554 unsigned int c, sentl; 1540 unsigned int c, sentl;
1555 struct etrax_dma_descr *descr; 1541 struct etrax_dma_descr *descr;
1556 1542
1557#ifdef CONFIG_SVINTO_SIM
1558 /* This will output too little if tail is not 0 always since
1559 * we don't reloop to send the other part. Anyway this SHOULD be a
1560 * no-op - transmit_chars_dma would never really be called during sim
1561 * since rs_write does not write into the xmit buffer then.
1562 */
1563 if (info->xmit.tail)
1564 printk("Error in serial.c:transmit_chars-dma(), tail!=0\n");
1565 if (info->xmit.head != info->xmit.tail) {
1566 SIMCOUT(info->xmit.buf + info->xmit.tail,
1567 CIRC_CNT(info->xmit.head,
1568 info->xmit.tail,
1569 SERIAL_XMIT_SIZE));
1570 info->xmit.head = info->xmit.tail; /* move back head */
1571 info->tr_running = 0;
1572 }
1573 return;
1574#endif
1575 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */ 1543 /* acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1576 *info->oclrintradr = 1544 *info->oclrintradr =
1577 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | 1545 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
@@ -1842,13 +1810,6 @@ static void receive_chars_dma(struct e100_serial *info)
1842 struct tty_struct *tty; 1810 struct tty_struct *tty;
1843 unsigned char rstat; 1811 unsigned char rstat;
1844 1812
1845#ifdef CONFIG_SVINTO_SIM
1846 /* No receive in the simulator. Will probably be when the rest of
1847 * the serial interface works, and this piece will just be removed.
1848 */
1849 return;
1850#endif
1851
1852 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */ 1813 /* Acknowledge both dma_descr and dma_eop irq in R_DMA_CHx_CLR_INTR */
1853 *info->iclrintradr = 1814 *info->iclrintradr =
1854 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) | 1815 IO_STATE(R_DMA_CH6_CLR_INTR, clr_descr, do) |
@@ -1934,12 +1895,6 @@ static int start_recv_dma(struct e100_serial *info)
1934static void 1895static void
1935start_receive(struct e100_serial *info) 1896start_receive(struct e100_serial *info)
1936{ 1897{
1937#ifdef CONFIG_SVINTO_SIM
1938 /* No receive in the simulator. Will probably be when the rest of
1939 * the serial interface works, and this piece will just be removed.
1940 */
1941 return;
1942#endif
1943 if (info->uses_dma_in) { 1898 if (info->uses_dma_in) {
1944 /* reset the input dma channel to be sure it works */ 1899 /* reset the input dma channel to be sure it works */
1945 1900
@@ -1972,17 +1927,6 @@ tr_interrupt(int irq, void *dev_id)
1972 int i; 1927 int i;
1973 int handled = 0; 1928 int handled = 0;
1974 1929
1975#ifdef CONFIG_SVINTO_SIM
1976 /* No receive in the simulator. Will probably be when the rest of
1977 * the serial interface works, and this piece will just be removed.
1978 */
1979 {
1980 const char *s = "What? tr_interrupt in simulator??\n";
1981 SIMCOUT(s,strlen(s));
1982 }
1983 return IRQ_HANDLED;
1984#endif
1985
1986 /* find out the line that caused this irq and get it from rs_table */ 1930 /* find out the line that caused this irq and get it from rs_table */
1987 1931
1988 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */ 1932 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
@@ -2021,17 +1965,6 @@ rec_interrupt(int irq, void *dev_id)
2021 int i; 1965 int i;
2022 int handled = 0; 1966 int handled = 0;
2023 1967
2024#ifdef CONFIG_SVINTO_SIM
2025 /* No receive in the simulator. Will probably be when the rest of
2026 * the serial interface works, and this piece will just be removed.
2027 */
2028 {
2029 const char *s = "What? rec_interrupt in simulator??\n";
2030 SIMCOUT(s,strlen(s));
2031 }
2032 return IRQ_HANDLED;
2033#endif
2034
2035 /* find out the line that caused this irq and get it from rs_table */ 1968 /* find out the line that caused this irq and get it from rs_table */
2036 1969
2037 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */ 1970 ireg = *R_IRQ_MASK2_RD; /* get the active irq bits for the dma channels */
@@ -2173,10 +2106,6 @@ timed_flush_handler(unsigned long ptr)
2173 struct e100_serial *info; 2106 struct e100_serial *info;
2174 int i; 2107 int i;
2175 2108
2176#ifdef CONFIG_SVINTO_SIM
2177 return;
2178#endif
2179
2180 for (i = 0; i < NR_PORTS; i++) { 2109 for (i = 0; i < NR_PORTS; i++) {
2181 info = rs_table + i; 2110 info = rs_table + i;
2182 if (info->uses_dma_in) 2111 if (info->uses_dma_in)
@@ -2729,25 +2658,6 @@ startup(struct e100_serial * info)
2729 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf); 2658 printk("starting up ttyS%d (xmit_buf 0x%p)...\n", info->line, info->xmit.buf);
2730#endif 2659#endif
2731 2660
2732#ifdef CONFIG_SVINTO_SIM
2733 /* Bits and pieces collected from below. Better to have them
2734 in one ifdef:ed clause than to mix in a lot of ifdefs,
2735 right? */
2736 if (info->port.tty)
2737 clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
2738
2739 info->xmit.head = info->xmit.tail = 0;
2740 info->first_recv_buffer = info->last_recv_buffer = NULL;
2741 info->recv_cnt = info->max_recv_cnt = 0;
2742
2743 for (i = 0; i < SERIAL_RECV_DESCRIPTORS; i++)
2744 info->rec_descr[i].buf = NULL;
2745
2746 /* No real action in the simulator, but may set info important
2747 to ioctl. */
2748 change_speed(info);
2749#else
2750
2751 /* 2661 /*
2752 * Clear the FIFO buffers and disable them 2662 * Clear the FIFO buffers and disable them
2753 * (they will be reenabled in change_speed()) 2663 * (they will be reenabled in change_speed())
@@ -2837,8 +2747,6 @@ startup(struct e100_serial * info)
2837 e100_rts(info, 1); 2747 e100_rts(info, 1);
2838 e100_dtr(info, 1); 2748 e100_dtr(info, 1);
2839 2749
2840#endif /* CONFIG_SVINTO_SIM */
2841
2842 info->port.flags |= ASYNC_INITIALIZED; 2750 info->port.flags |= ASYNC_INITIALIZED;
2843 2751
2844 local_irq_restore(flags); 2752 local_irq_restore(flags);
@@ -2857,7 +2765,6 @@ shutdown(struct e100_serial * info)
2857 struct etrax_recv_buffer *buffer; 2765 struct etrax_recv_buffer *buffer;
2858 int i; 2766 int i;
2859 2767
2860#ifndef CONFIG_SVINTO_SIM
2861 /* shut down the transmitter and receiver */ 2768 /* shut down the transmitter and receiver */
2862 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line)); 2769 DFLOW(DEBUG_LOG(info->line, "shutdown %i\n", info->line));
2863 e100_disable_rx(info); 2770 e100_disable_rx(info);
@@ -2882,8 +2789,6 @@ shutdown(struct e100_serial * info)
2882 info->tr_running = 0; 2789 info->tr_running = 0;
2883 } 2790 }
2884 2791
2885#endif /* CONFIG_SVINTO_SIM */
2886
2887 if (!(info->port.flags & ASYNC_INITIALIZED)) 2792 if (!(info->port.flags & ASYNC_INITIALIZED))
2888 return; 2793 return;
2889 2794
@@ -2995,17 +2900,12 @@ change_speed(struct e100_serial *info)
2995 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal); 2900 IO_STATE(R_ALT_SER_BAUDRATE, ser0_tr, normal);
2996 r_alt_ser_baudrate_shadow &= ~mask; 2901 r_alt_ser_baudrate_shadow &= ~mask;
2997 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8)); 2902 r_alt_ser_baudrate_shadow |= (alt_source << (info->line*8));
2998#ifndef CONFIG_SVINTO_SIM
2999 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow; 2903 *R_ALT_SER_BAUDRATE = r_alt_ser_baudrate_shadow;
3000#endif /* CONFIG_SVINTO_SIM */
3001 2904
3002 info->baud = cflag_to_baud(cflag); 2905 info->baud = cflag_to_baud(cflag);
3003#ifndef CONFIG_SVINTO_SIM
3004 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag); 2906 info->ioport[REG_BAUD] = cflag_to_etrax_baud(cflag);
3005#endif /* CONFIG_SVINTO_SIM */
3006 } 2907 }
3007 2908
3008#ifndef CONFIG_SVINTO_SIM
3009 /* start with default settings and then fill in changes */ 2909 /* start with default settings and then fill in changes */
3010 local_irq_save(flags); 2910 local_irq_save(flags);
3011 /* 8 bit, no/even parity */ 2911 /* 8 bit, no/even parity */
@@ -3073,7 +2973,6 @@ change_speed(struct e100_serial *info)
3073 2973
3074 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff; 2974 *((unsigned long *)&info->ioport[REG_XOFF]) = xoff;
3075 local_irq_restore(flags); 2975 local_irq_restore(flags);
3076#endif /* !CONFIG_SVINTO_SIM */
3077 2976
3078 update_char_time(info); 2977 update_char_time(info);
3079 2978
@@ -3122,11 +3021,6 @@ static int rs_raw_write(struct tty_struct *tty,
3122 count, info->ioport[REG_STATUS]); 3021 count, info->ioport[REG_STATUS]);
3123#endif 3022#endif
3124 3023
3125#ifdef CONFIG_SVINTO_SIM
3126 /* Really simple. The output is here and now. */
3127 SIMCOUT(buf, count);
3128 return count;
3129#endif
3130 local_save_flags(flags); 3024 local_save_flags(flags);
3131 DFLOW(DEBUG_LOG(info->line, "write count %i ", count)); 3025 DFLOW(DEBUG_LOG(info->line, "write count %i ", count));
3132 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty))); 3026 DFLOW(DEBUG_LOG(info->line, "ldisc %i\n", tty->ldisc.chars_in_buffer(tty)));
@@ -3463,7 +3357,6 @@ static int
3463get_lsr_info(struct e100_serial * info, unsigned int *value) 3357get_lsr_info(struct e100_serial * info, unsigned int *value)
3464{ 3358{
3465 unsigned int result = TIOCSER_TEMT; 3359 unsigned int result = TIOCSER_TEMT;
3466#ifndef CONFIG_SVINTO_SIM
3467 unsigned long curr_time = jiffies; 3360 unsigned long curr_time = jiffies;
3468 unsigned long curr_time_usec = GET_JIFFIES_USEC(); 3361 unsigned long curr_time_usec = GET_JIFFIES_USEC();
3469 unsigned long elapsed_usec = 3362 unsigned long elapsed_usec =
@@ -3474,7 +3367,6 @@ get_lsr_info(struct e100_serial * info, unsigned int *value)
3474 elapsed_usec < 2*info->char_time_usec) { 3367 elapsed_usec < 2*info->char_time_usec) {
3475 result = 0; 3368 result = 0;
3476 } 3369 }
3477#endif
3478 3370
3479 if (copy_to_user(value, &result, sizeof(int))) 3371 if (copy_to_user(value, &result, sizeof(int)))
3480 return -EFAULT; 3372 return -EFAULT;
@@ -3804,7 +3696,6 @@ rs_close(struct tty_struct *tty, struct file * filp)
3804 e100_disable_serial_data_irq(info); 3696 e100_disable_serial_data_irq(info);
3805#endif 3697#endif
3806 3698
3807#ifndef CONFIG_SVINTO_SIM
3808 e100_disable_rx(info); 3699 e100_disable_rx(info);
3809 e100_disable_rx_irq(info); 3700 e100_disable_rx_irq(info);
3810 3701
@@ -3816,7 +3707,6 @@ rs_close(struct tty_struct *tty, struct file * filp)
3816 */ 3707 */
3817 rs_wait_until_sent(tty, HZ); 3708 rs_wait_until_sent(tty, HZ);
3818 } 3709 }
3819#endif
3820 3710
3821 shutdown(info); 3711 shutdown(info);
3822 rs_flush_buffer(tty); 3712 rs_flush_buffer(tty);
@@ -4479,7 +4369,6 @@ static int __init rs_init(void)
4479 fast_timer_init(); 4369 fast_timer_init();
4480#endif 4370#endif
4481 4371
4482#ifndef CONFIG_SVINTO_SIM
4483#ifndef CONFIG_ETRAX_KGDB 4372#ifndef CONFIG_ETRAX_KGDB
4484 /* Not needed in simulator. May only complicate stuff. */ 4373 /* Not needed in simulator. May only complicate stuff. */
4485 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */ 4374 /* hook the irq's for DMA channel 6 and 7, serial output and input, and some more... */
@@ -4489,7 +4378,6 @@ static int __init rs_init(void)
4489 panic("%s: Failed to request irq8", __func__); 4378 panic("%s: Failed to request irq8", __func__);
4490 4379
4491#endif 4380#endif
4492#endif /* CONFIG_SVINTO_SIM */
4493 4381
4494 return 0; 4382 return 0;
4495} 4383}
diff --git a/drivers/tty/serial/imx.c b/drivers/tty/serial/imx.c
index d799140e53b6..dff0f0a472ea 100644
--- a/drivers/tty/serial/imx.c
+++ b/drivers/tty/serial/imx.c
@@ -496,8 +496,7 @@ static void dma_tx_callback(void *data)
496 496
497 dev_dbg(sport->port.dev, "we finish the TX DMA.\n"); 497 dev_dbg(sport->port.dev, "we finish the TX DMA.\n");
498 498
499 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 499 uart_write_wakeup(&sport->port);
500 uart_write_wakeup(&sport->port);
501 500
502 if (waitqueue_active(&sport->dma_wait)) { 501 if (waitqueue_active(&sport->dma_wait)) {
503 wake_up(&sport->dma_wait); 502 wake_up(&sport->dma_wait);
diff --git a/drivers/tty/serial/max310x.c b/drivers/tty/serial/max310x.c
index 8d71e4047bb3..471dbc1e2b58 100644
--- a/drivers/tty/serial/max310x.c
+++ b/drivers/tty/serial/max310x.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * Maxim (Dallas) MAX3107/8/9, MAX14830 serial driver 2 * Maxim (Dallas) MAX3107/8/9, MAX14830 serial driver
3 * 3 *
4 * Copyright (C) 2012-2013 Alexander Shiyan <shc_work@mail.ru> 4 * Copyright (C) 2012-2014 Alexander Shiyan <shc_work@mail.ru>
5 * 5 *
6 * Based on max3100.c, by Christian Pellegrin <chripell@evolware.org> 6 * Based on max3100.c, by Christian Pellegrin <chripell@evolware.org>
7 * Based on max3110.c, by Feng Tang <feng.tang@intel.com> 7 * Based on max3110.c, by Feng Tang <feng.tang@intel.com>
@@ -13,20 +13,21 @@
13 * (at your option) any later version. 13 * (at your option) any later version.
14 */ 14 */
15 15
16#include <linux/module.h> 16#include <linux/bitops.h>
17#include <linux/clk.h>
17#include <linux/delay.h> 18#include <linux/delay.h>
18#include <linux/device.h> 19#include <linux/device.h>
19#include <linux/bitops.h> 20#include <linux/gpio.h>
21#include <linux/module.h>
22#include <linux/of.h>
23#include <linux/of_device.h>
24#include <linux/regmap.h>
20#include <linux/serial_core.h> 25#include <linux/serial_core.h>
21#include <linux/serial.h> 26#include <linux/serial.h>
22#include <linux/tty.h> 27#include <linux/tty.h>
23#include <linux/tty_flip.h> 28#include <linux/tty_flip.h>
24#include <linux/regmap.h>
25#include <linux/gpio.h>
26#include <linux/spi/spi.h> 29#include <linux/spi/spi.h>
27 30
28#include <linux/platform_data/max310x.h>
29
30#define MAX310X_NAME "max310x" 31#define MAX310X_NAME "max310x"
31#define MAX310X_MAJOR 204 32#define MAX310X_MAJOR 204
32#define MAX310X_MINOR 209 33#define MAX310X_MINOR 209
@@ -161,10 +162,6 @@
161/* IRDA register bits */ 162/* IRDA register bits */
162#define MAX310X_IRDA_IRDAEN_BIT (1 << 0) /* IRDA mode enable */ 163#define MAX310X_IRDA_IRDAEN_BIT (1 << 0) /* IRDA mode enable */
163#define MAX310X_IRDA_SIR_BIT (1 << 1) /* SIR mode enable */ 164#define MAX310X_IRDA_SIR_BIT (1 << 1) /* SIR mode enable */
164#define MAX310X_IRDA_SHORTIR_BIT (1 << 2) /* Short SIR mode enable */
165#define MAX310X_IRDA_MIR_BIT (1 << 3) /* MIR mode enable */
166#define MAX310X_IRDA_RXINV_BIT (1 << 4) /* RX logic inversion enable */
167#define MAX310X_IRDA_TXINV_BIT (1 << 5) /* TX logic inversion enable */
168 165
169/* Flow control trigger level register masks */ 166/* Flow control trigger level register masks */
170#define MAX310X_FLOWLVL_HALT_MASK (0x000f) /* Flow control halt level */ 167#define MAX310X_FLOWLVL_HALT_MASK (0x000f) /* Flow control halt level */
@@ -220,26 +217,6 @@
220 * XOFF2 217 * XOFF2
221 */ 218 */
222 219
223/* GPIO configuration register bits */
224#define MAX310X_GPIOCFG_GP0OUT_BIT (1 << 0) /* GPIO 0 output enable */
225#define MAX310X_GPIOCFG_GP1OUT_BIT (1 << 1) /* GPIO 1 output enable */
226#define MAX310X_GPIOCFG_GP2OUT_BIT (1 << 2) /* GPIO 2 output enable */
227#define MAX310X_GPIOCFG_GP3OUT_BIT (1 << 3) /* GPIO 3 output enable */
228#define MAX310X_GPIOCFG_GP0OD_BIT (1 << 4) /* GPIO 0 open-drain enable */
229#define MAX310X_GPIOCFG_GP1OD_BIT (1 << 5) /* GPIO 1 open-drain enable */
230#define MAX310X_GPIOCFG_GP2OD_BIT (1 << 6) /* GPIO 2 open-drain enable */
231#define MAX310X_GPIOCFG_GP3OD_BIT (1 << 7) /* GPIO 3 open-drain enable */
232
233/* GPIO DATA register bits */
234#define MAX310X_GPIODATA_GP0OUT_BIT (1 << 0) /* GPIO 0 output value */
235#define MAX310X_GPIODATA_GP1OUT_BIT (1 << 1) /* GPIO 1 output value */
236#define MAX310X_GPIODATA_GP2OUT_BIT (1 << 2) /* GPIO 2 output value */
237#define MAX310X_GPIODATA_GP3OUT_BIT (1 << 3) /* GPIO 3 output value */
238#define MAX310X_GPIODATA_GP0IN_BIT (1 << 4) /* GPIO 0 input value */
239#define MAX310X_GPIODATA_GP1IN_BIT (1 << 5) /* GPIO 1 input value */
240#define MAX310X_GPIODATA_GP2IN_BIT (1 << 6) /* GPIO 2 input value */
241#define MAX310X_GPIODATA_GP3IN_BIT (1 << 7) /* GPIO 3 input value */
242
243/* PLL configuration register masks */ 220/* PLL configuration register masks */
244#define MAX310X_PLLCFG_PREDIV_MASK (0x3f) /* PLL predivision value */ 221#define MAX310X_PLLCFG_PREDIV_MASK (0x3f) /* PLL predivision value */
245#define MAX310X_PLLCFG_PLLFACTOR_MASK (0xc0) /* PLL multiplication factor */ 222#define MAX310X_PLLCFG_PLLFACTOR_MASK (0xc0) /* PLL multiplication factor */
@@ -283,16 +260,15 @@ struct max310x_devtype {
283struct max310x_one { 260struct max310x_one {
284 struct uart_port port; 261 struct uart_port port;
285 struct work_struct tx_work; 262 struct work_struct tx_work;
263 struct work_struct md_work;
286}; 264};
287 265
288struct max310x_port { 266struct max310x_port {
289 struct uart_driver uart; 267 struct uart_driver uart;
290 struct max310x_devtype *devtype; 268 struct max310x_devtype *devtype;
291 struct regmap *regmap; 269 struct regmap *regmap;
292 struct regmap_config regcfg;
293 struct mutex mutex; 270 struct mutex mutex;
294 struct max310x_pdata *pdata; 271 struct clk *clk;
295 int gpio_used;
296#ifdef CONFIG_GPIOLIB 272#ifdef CONFIG_GPIOLIB
297 struct gpio_chip gpio; 273 struct gpio_chip gpio;
298#endif 274#endif
@@ -504,25 +480,33 @@ static bool max310x_reg_precious(struct device *dev, unsigned int reg)
504 return false; 480 return false;
505} 481}
506 482
507static void max310x_set_baud(struct uart_port *port, int baud) 483static int max310x_set_baud(struct uart_port *port, int baud)
508{ 484{
509 unsigned int mode = 0, div = port->uartclk / baud; 485 unsigned int mode = 0, clk = port->uartclk, div = clk / baud;
510 486
511 if (!(div / 16)) { 487 /* Check for minimal value for divider */
488 if (div < 16)
489 div = 16;
490
491 if (clk % baud && (div / 16) < 0x8000) {
512 /* Mode x2 */ 492 /* Mode x2 */
513 mode = MAX310X_BRGCFG_2XMODE_BIT; 493 mode = MAX310X_BRGCFG_2XMODE_BIT;
514 div = (port->uartclk * 2) / baud; 494 clk = port->uartclk * 2;
515 } 495 div = clk / baud;
516 496
517 if (!(div / 16)) { 497 if (clk % baud && (div / 16) < 0x8000) {
518 /* Mode x4 */ 498 /* Mode x4 */
519 mode = MAX310X_BRGCFG_4XMODE_BIT; 499 mode = MAX310X_BRGCFG_4XMODE_BIT;
520 div = (port->uartclk * 4) / baud; 500 clk = port->uartclk * 4;
501 div = clk / baud;
502 }
521 } 503 }
522 504
523 max310x_port_write(port, MAX310X_BRGDIVMSB_REG, (div / 16) >> 8); 505 max310x_port_write(port, MAX310X_BRGDIVMSB_REG, (div / 16) >> 8);
524 max310x_port_write(port, MAX310X_BRGDIVLSB_REG, div / 16); 506 max310x_port_write(port, MAX310X_BRGDIVLSB_REG, div / 16);
525 max310x_port_write(port, MAX310X_BRGCFG_REG, (div % 16) | mode); 507 max310x_port_write(port, MAX310X_BRGCFG_REG, (div % 16) | mode);
508
509 return DIV_ROUND_CLOSEST(clk, div);
526} 510}
527 511
528static int max310x_update_best_err(unsigned long f, long *besterr) 512static int max310x_update_best_err(unsigned long f, long *besterr)
@@ -538,18 +522,19 @@ static int max310x_update_best_err(unsigned long f, long *besterr)
538 return 1; 522 return 1;
539} 523}
540 524
541static int max310x_set_ref_clk(struct max310x_port *s) 525static int max310x_set_ref_clk(struct max310x_port *s, unsigned long freq,
526 bool xtal)
542{ 527{
543 unsigned int div, clksrc, pllcfg = 0; 528 unsigned int div, clksrc, pllcfg = 0;
544 long besterr = -1; 529 long besterr = -1;
545 unsigned long fdiv, fmul, bestfreq = s->pdata->frequency; 530 unsigned long fdiv, fmul, bestfreq = freq;
546 531
547 /* First, update error without PLL */ 532 /* First, update error without PLL */
548 max310x_update_best_err(s->pdata->frequency, &besterr); 533 max310x_update_best_err(freq, &besterr);
549 534
550 /* Try all possible PLL dividers */ 535 /* Try all possible PLL dividers */
551 for (div = 1; (div <= 63) && besterr; div++) { 536 for (div = 1; (div <= 63) && besterr; div++) {
552 fdiv = DIV_ROUND_CLOSEST(s->pdata->frequency, div); 537 fdiv = DIV_ROUND_CLOSEST(freq, div);
553 538
554 /* Try multiplier 6 */ 539 /* Try multiplier 6 */
555 fmul = fdiv * 6; 540 fmul = fdiv * 6;
@@ -582,10 +567,7 @@ static int max310x_set_ref_clk(struct max310x_port *s)
582 } 567 }
583 568
584 /* Configure clock source */ 569 /* Configure clock source */
585 if (s->pdata->driver_flags & MAX310X_EXT_CLK) 570 clksrc = xtal ? MAX310X_CLKSRC_CRYST_BIT : MAX310X_CLKSRC_EXTCLK_BIT;
586 clksrc = MAX310X_CLKSRC_EXTCLK_BIT;
587 else
588 clksrc = MAX310X_CLKSRC_CRYST_BIT;
589 571
590 /* Configure PLL */ 572 /* Configure PLL */
591 if (pllcfg) { 573 if (pllcfg) {
@@ -597,7 +579,7 @@ static int max310x_set_ref_clk(struct max310x_port *s)
597 regmap_write(s->regmap, MAX310X_CLKSRC_REG, clksrc); 579 regmap_write(s->regmap, MAX310X_CLKSRC_REG, clksrc);
598 580
599 /* Wait for crystal */ 581 /* Wait for crystal */
600 if (pllcfg && !(s->pdata->driver_flags & MAX310X_EXT_CLK)) 582 if (pllcfg && xtal)
601 msleep(10); 583 msleep(10);
602 584
603 return (int)bestfreq; 585 return (int)bestfreq;
@@ -782,11 +764,21 @@ static unsigned int max310x_get_mctrl(struct uart_port *port)
782 return TIOCM_DSR | TIOCM_CAR; 764 return TIOCM_DSR | TIOCM_CAR;
783} 765}
784 766
767static void max310x_md_proc(struct work_struct *ws)
768{
769 struct max310x_one *one = container_of(ws, struct max310x_one, md_work);
770
771 max310x_port_update(&one->port, MAX310X_MODE2_REG,
772 MAX310X_MODE2_LOOPBACK_BIT,
773 (one->port.mctrl & TIOCM_LOOP) ?
774 MAX310X_MODE2_LOOPBACK_BIT : 0);
775}
776
785static void max310x_set_mctrl(struct uart_port *port, unsigned int mctrl) 777static void max310x_set_mctrl(struct uart_port *port, unsigned int mctrl)
786{ 778{
787 /* DCD and DSR are not wired and CTS/RTS is hadnled automatically 779 struct max310x_one *one = container_of(port, struct max310x_one, port);
788 * so do nothing 780
789 */ 781 schedule_work(&one->md_work);
790} 782}
791 783
792static void max310x_break_ctl(struct uart_port *port, int break_state) 784static void max310x_break_ctl(struct uart_port *port, int break_state)
@@ -875,40 +867,76 @@ static void max310x_set_termios(struct uart_port *port,
875 port->uartclk / 4); 867 port->uartclk / 4);
876 868
877 /* Setup baudrate generator */ 869 /* Setup baudrate generator */
878 max310x_set_baud(port, baud); 870 baud = max310x_set_baud(port, baud);
879 871
880 /* Update timeout according to new baud rate */ 872 /* Update timeout according to new baud rate */
881 uart_update_timeout(port, termios->c_cflag, baud); 873 uart_update_timeout(port, termios->c_cflag, baud);
882} 874}
883 875
876static int max310x_ioctl(struct uart_port *port, unsigned int cmd,
877 unsigned long arg)
878{
879#if defined(TIOCSRS485) && defined(TIOCGRS485)
880 struct serial_rs485 rs485;
881 unsigned int val;
882
883 switch (cmd) {
884 case TIOCSRS485:
885 if (copy_from_user(&rs485, (void __user *)arg, sizeof(rs485)))
886 return -EFAULT;
887 if (rs485.delay_rts_before_send > 0x0f ||
888 rs485.delay_rts_after_send > 0x0f)
889 return -ERANGE;
890 val = (rs485.delay_rts_before_send << 4) |
891 rs485.delay_rts_after_send;
892 max310x_port_write(port, MAX310X_HDPIXDELAY_REG, val);
893 if (rs485.flags & SER_RS485_ENABLED) {
894 max310x_port_update(port, MAX310X_MODE1_REG,
895 MAX310X_MODE1_TRNSCVCTRL_BIT,
896 MAX310X_MODE1_TRNSCVCTRL_BIT);
897 max310x_port_update(port, MAX310X_MODE2_REG,
898 MAX310X_MODE2_ECHOSUPR_BIT,
899 MAX310X_MODE2_ECHOSUPR_BIT);
900 } else {
901 max310x_port_update(port, MAX310X_MODE1_REG,
902 MAX310X_MODE1_TRNSCVCTRL_BIT, 0);
903 max310x_port_update(port, MAX310X_MODE2_REG,
904 MAX310X_MODE2_ECHOSUPR_BIT, 0);
905 }
906 return 0;
907 case TIOCGRS485:
908 memset(&rs485, 0, sizeof(rs485));
909 val = max310x_port_read(port, MAX310X_MODE1_REG);
910 rs485.flags = (val & MAX310X_MODE1_TRNSCVCTRL_BIT) ?
911 SER_RS485_ENABLED : 0;
912 rs485.flags |= SER_RS485_RTS_ON_SEND;
913 val = max310x_port_read(port, MAX310X_HDPIXDELAY_REG);
914 rs485.delay_rts_before_send = val >> 4;
915 rs485.delay_rts_after_send = val & 0x0f;
916 if (copy_to_user((void __user *)arg, &rs485, sizeof(rs485)))
917 return -EFAULT;
918 return 0;
919 default:
920 break;
921 }
922#endif
923
924 return -ENOIOCTLCMD;
925}
926
884static int max310x_startup(struct uart_port *port) 927static int max310x_startup(struct uart_port *port)
885{ 928{
886 unsigned int val, line = port->line;
887 struct max310x_port *s = dev_get_drvdata(port->dev); 929 struct max310x_port *s = dev_get_drvdata(port->dev);
930 unsigned int val;
888 931
889 s->devtype->power(port, 1); 932 s->devtype->power(port, 1);
890 933
891 /* Configure baud rate, 9600 as default */
892 max310x_set_baud(port, 9600);
893
894 /* Configure LCR register, 8N1 mode by default */
895 max310x_port_write(port, MAX310X_LCR_REG, MAX310X_LCR_WORD_LEN_8);
896
897 /* Configure MODE1 register */ 934 /* Configure MODE1 register */
898 max310x_port_update(port, MAX310X_MODE1_REG, 935 max310x_port_update(port, MAX310X_MODE1_REG,
899 MAX310X_MODE1_TRNSCVCTRL_BIT, 936 MAX310X_MODE1_TRNSCVCTRL_BIT, 0);
900 (s->pdata->uart_flags[line] & MAX310X_AUTO_DIR_CTRL) 937
901 ? MAX310X_MODE1_TRNSCVCTRL_BIT : 0); 938 /* Configure MODE2 register & Reset FIFOs*/
902 939 val = MAX310X_MODE2_RXEMPTINV_BIT | MAX310X_MODE2_FIFORST_BIT;
903 /* Configure MODE2 register */
904 val = MAX310X_MODE2_RXEMPTINV_BIT;
905 if (s->pdata->uart_flags[line] & MAX310X_LOOPBACK)
906 val |= MAX310X_MODE2_LOOPBACK_BIT;
907 if (s->pdata->uart_flags[line] & MAX310X_ECHO_SUPRESS)
908 val |= MAX310X_MODE2_ECHOSUPR_BIT;
909
910 /* Reset FIFOs */
911 val |= MAX310X_MODE2_FIFORST_BIT;
912 max310x_port_write(port, MAX310X_MODE2_REG, val); 940 max310x_port_write(port, MAX310X_MODE2_REG, val);
913 max310x_port_update(port, MAX310X_MODE2_REG, 941 max310x_port_update(port, MAX310X_MODE2_REG,
914 MAX310X_MODE2_FIFORST_BIT, 0); 942 MAX310X_MODE2_FIFORST_BIT, 0);
@@ -989,6 +1017,7 @@ static const struct uart_ops max310x_ops = {
989 .release_port = max310x_null_void, 1017 .release_port = max310x_null_void,
990 .config_port = max310x_config_port, 1018 .config_port = max310x_config_port,
991 .verify_port = max310x_verify_port, 1019 .verify_port = max310x_verify_port,
1020 .ioctl = max310x_ioctl,
992}; 1021};
993 1022
994static int __maybe_unused max310x_suspend(struct device *dev) 1023static int __maybe_unused max310x_suspend(struct device *dev)
@@ -1017,6 +1046,8 @@ static int __maybe_unused max310x_resume(struct device *dev)
1017 return 0; 1046 return 0;
1018} 1047}
1019 1048
1049static SIMPLE_DEV_PM_OPS(max310x_pm_ops, max310x_suspend, max310x_resume);
1050
1020#ifdef CONFIG_GPIOLIB 1051#ifdef CONFIG_GPIOLIB
1021static int max310x_gpio_get(struct gpio_chip *chip, unsigned offset) 1052static int max310x_gpio_get(struct gpio_chip *chip, unsigned offset)
1022{ 1053{
@@ -1063,23 +1094,16 @@ static int max310x_gpio_direction_output(struct gpio_chip *chip,
1063} 1094}
1064#endif 1095#endif
1065 1096
1066static int max310x_probe(struct device *dev, int is_spi, 1097static int max310x_probe(struct device *dev, struct max310x_devtype *devtype,
1067 struct max310x_devtype *devtype, int irq) 1098 struct regmap *regmap, int irq, unsigned long flags)
1068{ 1099{
1100 int i, ret, fmin, fmax, freq, uartclk;
1101 struct clk *clk_osc, *clk_xtal;
1069 struct max310x_port *s; 1102 struct max310x_port *s;
1070 struct max310x_pdata *pdata = dev_get_platdata(dev); 1103 bool xtal = false;
1071 int i, ret, uartclk;
1072
1073 /* Check for IRQ */
1074 if (irq <= 0) {
1075 dev_err(dev, "No IRQ specified\n");
1076 return -ENOTSUPP;
1077 }
1078 1104
1079 if (!pdata) { 1105 if (IS_ERR(regmap))
1080 dev_err(dev, "No platform data supplied\n"); 1106 return PTR_ERR(regmap);
1081 return -EINVAL;
1082 }
1083 1107
1084 /* Alloc port structure */ 1108 /* Alloc port structure */
1085 s = devm_kzalloc(dev, sizeof(*s) + 1109 s = devm_kzalloc(dev, sizeof(*s) +
@@ -1089,52 +1113,44 @@ static int max310x_probe(struct device *dev, int is_spi,
1089 return -ENOMEM; 1113 return -ENOMEM;
1090 } 1114 }
1091 1115
1092 /* Check input frequency */ 1116 clk_osc = devm_clk_get(dev, "osc");
1093 if ((pdata->driver_flags & MAX310X_EXT_CLK) && 1117 clk_xtal = devm_clk_get(dev, "xtal");
1094 ((pdata->frequency < 500000) || (pdata->frequency > 35000000))) 1118 if (!IS_ERR(clk_osc)) {
1095 goto err_freq; 1119 s->clk = clk_osc;
1096 /* Check frequency for quartz */ 1120 fmin = 500000;
1097 if (!(pdata->driver_flags & MAX310X_EXT_CLK) && 1121 fmax = 35000000;
1098 ((pdata->frequency < 1000000) || (pdata->frequency > 4000000))) 1122 } else if (!IS_ERR(clk_xtal)) {
1099 goto err_freq; 1123 s->clk = clk_xtal;
1100 1124 fmin = 1000000;
1101 s->pdata = pdata; 1125 fmax = 4000000;
1102 s->devtype = devtype; 1126 xtal = true;
1103 dev_set_drvdata(dev, s); 1127 } else if (PTR_ERR(clk_osc) == -EPROBE_DEFER ||
1104 1128 PTR_ERR(clk_xtal) == -EPROBE_DEFER) {
1105 mutex_init(&s->mutex); 1129 return -EPROBE_DEFER;
1130 } else {
1131 dev_err(dev, "Cannot get clock\n");
1132 return -EINVAL;
1133 }
1106 1134
1107 /* Setup regmap */ 1135 ret = clk_prepare_enable(s->clk);
1108 s->regcfg.reg_bits = 8; 1136 if (ret)
1109 s->regcfg.val_bits = 8; 1137 return ret;
1110 s->regcfg.read_flag_mask = 0x00;
1111 s->regcfg.write_flag_mask = 0x80;
1112 s->regcfg.cache_type = REGCACHE_RBTREE;
1113 s->regcfg.writeable_reg = max310x_reg_writeable;
1114 s->regcfg.volatile_reg = max310x_reg_volatile;
1115 s->regcfg.precious_reg = max310x_reg_precious;
1116 s->regcfg.max_register = devtype->nr * 0x20 - 1;
1117
1118 if (IS_ENABLED(CONFIG_SPI_MASTER) && is_spi) {
1119 struct spi_device *spi = to_spi_device(dev);
1120
1121 s->regmap = devm_regmap_init_spi(spi, &s->regcfg);
1122 } else
1123 return -ENOTSUPP;
1124 1138
1125 if (IS_ERR(s->regmap)) { 1139 freq = clk_get_rate(s->clk);
1126 dev_err(dev, "Failed to initialize register map\n"); 1140 /* Check frequency limits */
1127 return PTR_ERR(s->regmap); 1141 if (freq < fmin || freq > fmax) {
1142 ret = -ERANGE;
1143 goto out_clk;
1128 } 1144 }
1129 1145
1130 /* Board specific configure */ 1146 s->regmap = regmap;
1131 if (s->pdata->init) 1147 s->devtype = devtype;
1132 s->pdata->init(); 1148 dev_set_drvdata(dev, s);
1133 1149
1134 /* Check device to ensure we are talking to what we expect */ 1150 /* Check device to ensure we are talking to what we expect */
1135 ret = devtype->detect(dev); 1151 ret = devtype->detect(dev);
1136 if (ret) 1152 if (ret)
1137 return ret; 1153 goto out_clk;
1138 1154
1139 for (i = 0; i < devtype->nr; i++) { 1155 for (i = 0; i < devtype->nr; i++) {
1140 unsigned int offs = i << 5; 1156 unsigned int offs = i << 5;
@@ -1156,7 +1172,7 @@ static int max310x_probe(struct device *dev, int is_spi,
1156 MAX310X_MODE1_AUTOSLEEP_BIT); 1172 MAX310X_MODE1_AUTOSLEEP_BIT);
1157 } 1173 }
1158 1174
1159 uartclk = max310x_set_ref_clk(s); 1175 uartclk = max310x_set_ref_clk(s, freq, xtal);
1160 dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk); 1176 dev_dbg(dev, "Reference clock set to %i Hz\n", uartclk);
1161 1177
1162 /* Register UART driver */ 1178 /* Register UART driver */
@@ -1168,9 +1184,28 @@ static int max310x_probe(struct device *dev, int is_spi,
1168 ret = uart_register_driver(&s->uart); 1184 ret = uart_register_driver(&s->uart);
1169 if (ret) { 1185 if (ret) {
1170 dev_err(dev, "Registering UART driver failed\n"); 1186 dev_err(dev, "Registering UART driver failed\n");
1171 return ret; 1187 goto out_clk;
1172 } 1188 }
1173 1189
1190#ifdef CONFIG_GPIOLIB
1191 /* Setup GPIO cotroller */
1192 s->gpio.owner = THIS_MODULE;
1193 s->gpio.dev = dev;
1194 s->gpio.label = dev_name(dev);
1195 s->gpio.direction_input = max310x_gpio_direction_input;
1196 s->gpio.get = max310x_gpio_get;
1197 s->gpio.direction_output= max310x_gpio_direction_output;
1198 s->gpio.set = max310x_gpio_set;
1199 s->gpio.base = -1;
1200 s->gpio.ngpio = devtype->nr * 4;
1201 s->gpio.can_sleep = 1;
1202 ret = gpiochip_add(&s->gpio);
1203 if (ret)
1204 goto out_uart;
1205#endif
1206
1207 mutex_init(&s->mutex);
1208
1174 for (i = 0; i < devtype->nr; i++) { 1209 for (i = 0; i < devtype->nr; i++) {
1175 /* Initialize port data */ 1210 /* Initialize port data */
1176 s->p[i].port.line = i; 1211 s->p[i].port.line = i;
@@ -1178,8 +1213,7 @@ static int max310x_probe(struct device *dev, int is_spi,
1178 s->p[i].port.irq = irq; 1213 s->p[i].port.irq = irq;
1179 s->p[i].port.type = PORT_MAX310X; 1214 s->p[i].port.type = PORT_MAX310X;
1180 s->p[i].port.fifosize = MAX310X_FIFO_SIZE; 1215 s->p[i].port.fifosize = MAX310X_FIFO_SIZE;
1181 s->p[i].port.flags = UPF_SKIP_TEST | UPF_FIXED_TYPE | 1216 s->p[i].port.flags = UPF_FIXED_TYPE | UPF_LOW_LATENCY;
1182 UPF_LOW_LATENCY;
1183 s->p[i].port.iotype = UPIO_PORT; 1217 s->p[i].port.iotype = UPIO_PORT;
1184 s->p[i].port.iobase = i * 0x20; 1218 s->p[i].port.iobase = i * 0x20;
1185 s->p[i].port.membase = (void __iomem *)~0; 1219 s->p[i].port.membase = (void __iomem *)~0;
@@ -1195,48 +1229,35 @@ static int max310x_probe(struct device *dev, int is_spi,
1195 MAX310X_MODE1_IRQSEL_BIT); 1229 MAX310X_MODE1_IRQSEL_BIT);
1196 /* Initialize queue for start TX */ 1230 /* Initialize queue for start TX */
1197 INIT_WORK(&s->p[i].tx_work, max310x_wq_proc); 1231 INIT_WORK(&s->p[i].tx_work, max310x_wq_proc);
1232 /* Initialize queue for changing mode */
1233 INIT_WORK(&s->p[i].md_work, max310x_md_proc);
1198 /* Register port */ 1234 /* Register port */
1199 uart_add_one_port(&s->uart, &s->p[i].port); 1235 uart_add_one_port(&s->uart, &s->p[i].port);
1200 /* Go to suspend mode */ 1236 /* Go to suspend mode */
1201 devtype->power(&s->p[i].port, 0); 1237 devtype->power(&s->p[i].port, 0);
1202 } 1238 }
1203 1239
1204#ifdef CONFIG_GPIOLIB
1205 /* Setup GPIO cotroller */
1206 if (s->pdata->gpio_base) {
1207 s->gpio.owner = THIS_MODULE;
1208 s->gpio.dev = dev;
1209 s->gpio.label = dev_name(dev);
1210 s->gpio.direction_input = max310x_gpio_direction_input;
1211 s->gpio.get = max310x_gpio_get;
1212 s->gpio.direction_output= max310x_gpio_direction_output;
1213 s->gpio.set = max310x_gpio_set;
1214 s->gpio.base = s->pdata->gpio_base;
1215 s->gpio.ngpio = devtype->nr * 4;
1216 s->gpio.can_sleep = 1;
1217 if (!gpiochip_add(&s->gpio))
1218 s->gpio_used = 1;
1219 } else
1220 dev_info(dev, "GPIO support not enabled\n");
1221#endif
1222
1223 /* Setup interrupt */ 1240 /* Setup interrupt */
1224 ret = devm_request_threaded_irq(dev, irq, NULL, max310x_ist, 1241 ret = devm_request_threaded_irq(dev, irq, NULL, max310x_ist,
1225 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 1242 IRQF_ONESHOT | flags, dev_name(dev), s);
1226 dev_name(dev), s); 1243 if (!ret)
1227 if (ret) { 1244 return 0;
1228 dev_err(dev, "Unable to reguest IRQ %i\n", irq); 1245
1246 dev_err(dev, "Unable to reguest IRQ %i\n", irq);
1247
1248 mutex_destroy(&s->mutex);
1249
1229#ifdef CONFIG_GPIOLIB 1250#ifdef CONFIG_GPIOLIB
1230 if (s->gpio_used) 1251 WARN_ON(gpiochip_remove(&s->gpio));
1231 WARN_ON(gpiochip_remove(&s->gpio)); 1252
1253out_uart:
1232#endif 1254#endif
1233 } 1255 uart_unregister_driver(&s->uart);
1234 1256
1235 return ret; 1257out_clk:
1258 clk_disable_unprepare(s->clk);
1236 1259
1237err_freq: 1260 return ret;
1238 dev_err(dev, "Frequency parameter incorrect\n");
1239 return -EINVAL;
1240} 1261}
1241 1262
1242static int max310x_remove(struct device *dev) 1263static int max310x_remove(struct device *dev)
@@ -1244,30 +1265,51 @@ static int max310x_remove(struct device *dev)
1244 struct max310x_port *s = dev_get_drvdata(dev); 1265 struct max310x_port *s = dev_get_drvdata(dev);
1245 int i, ret = 0; 1266 int i, ret = 0;
1246 1267
1268#ifdef CONFIG_GPIOLIB
1269 ret = gpiochip_remove(&s->gpio);
1270 if (ret)
1271 return ret;
1272#endif
1273
1247 for (i = 0; i < s->uart.nr; i++) { 1274 for (i = 0; i < s->uart.nr; i++) {
1248 cancel_work_sync(&s->p[i].tx_work); 1275 cancel_work_sync(&s->p[i].tx_work);
1276 cancel_work_sync(&s->p[i].md_work);
1249 uart_remove_one_port(&s->uart, &s->p[i].port); 1277 uart_remove_one_port(&s->uart, &s->p[i].port);
1250 s->devtype->power(&s->p[i].port, 0); 1278 s->devtype->power(&s->p[i].port, 0);
1251 } 1279 }
1252 1280
1281 mutex_destroy(&s->mutex);
1253 uart_unregister_driver(&s->uart); 1282 uart_unregister_driver(&s->uart);
1254 1283 clk_disable_unprepare(s->clk);
1255#ifdef CONFIG_GPIOLIB
1256 if (s->gpio_used)
1257 ret = gpiochip_remove(&s->gpio);
1258#endif
1259
1260 if (s->pdata->exit)
1261 s->pdata->exit();
1262 1284
1263 return ret; 1285 return ret;
1264} 1286}
1265 1287
1288static const struct of_device_id __maybe_unused max310x_dt_ids[] = {
1289 { .compatible = "maxim,max3107", .data = &max3107_devtype, },
1290 { .compatible = "maxim,max3108", .data = &max3108_devtype, },
1291 { .compatible = "maxim,max3109", .data = &max3109_devtype, },
1292 { .compatible = "maxim,max14830", .data = &max14830_devtype },
1293 { }
1294};
1295MODULE_DEVICE_TABLE(of, max310x_dt_ids);
1296
1297static struct regmap_config regcfg = {
1298 .reg_bits = 8,
1299 .val_bits = 8,
1300 .write_flag_mask = 0x80,
1301 .cache_type = REGCACHE_RBTREE,
1302 .writeable_reg = max310x_reg_writeable,
1303 .volatile_reg = max310x_reg_volatile,
1304 .precious_reg = max310x_reg_precious,
1305};
1306
1266#ifdef CONFIG_SPI_MASTER 1307#ifdef CONFIG_SPI_MASTER
1267static int max310x_spi_probe(struct spi_device *spi) 1308static int max310x_spi_probe(struct spi_device *spi)
1268{ 1309{
1269 struct max310x_devtype *devtype = 1310 struct max310x_devtype *devtype;
1270 (struct max310x_devtype *)spi_get_device_id(spi)->driver_data; 1311 unsigned long flags = 0;
1312 struct regmap *regmap;
1271 int ret; 1313 int ret;
1272 1314
1273 /* Setup SPI bus */ 1315 /* Setup SPI bus */
@@ -1275,12 +1317,25 @@ static int max310x_spi_probe(struct spi_device *spi)
1275 spi->mode = spi->mode ? : SPI_MODE_0; 1317 spi->mode = spi->mode ? : SPI_MODE_0;
1276 spi->max_speed_hz = spi->max_speed_hz ? : 26000000; 1318 spi->max_speed_hz = spi->max_speed_hz ? : 26000000;
1277 ret = spi_setup(spi); 1319 ret = spi_setup(spi);
1278 if (ret) { 1320 if (ret)
1279 dev_err(&spi->dev, "SPI setup failed\n");
1280 return ret; 1321 return ret;
1322
1323 if (spi->dev.of_node) {
1324 const struct of_device_id *of_id =
1325 of_match_device(max310x_dt_ids, &spi->dev);
1326
1327 devtype = (struct max310x_devtype *)of_id->data;
1328 } else {
1329 const struct spi_device_id *id_entry = spi_get_device_id(spi);
1330
1331 devtype = (struct max310x_devtype *)id_entry->driver_data;
1332 flags = IRQF_TRIGGER_FALLING;
1281 } 1333 }
1282 1334
1283 return max310x_probe(&spi->dev, 1, devtype, spi->irq); 1335 regcfg.max_register = devtype->nr * 0x20 - 1;
1336 regmap = devm_regmap_init_spi(spi, &regcfg);
1337
1338 return max310x_probe(&spi->dev, devtype, regmap, spi->irq, flags);
1284} 1339}
1285 1340
1286static int max310x_spi_remove(struct spi_device *spi) 1341static int max310x_spi_remove(struct spi_device *spi)
@@ -1288,8 +1343,6 @@ static int max310x_spi_remove(struct spi_device *spi)
1288 return max310x_remove(&spi->dev); 1343 return max310x_remove(&spi->dev);
1289} 1344}
1290 1345
1291static SIMPLE_DEV_PM_OPS(max310x_pm_ops, max310x_suspend, max310x_resume);
1292
1293static const struct spi_device_id max310x_id_table[] = { 1346static const struct spi_device_id max310x_id_table[] = {
1294 { "max3107", (kernel_ulong_t)&max3107_devtype, }, 1347 { "max3107", (kernel_ulong_t)&max3107_devtype, },
1295 { "max3108", (kernel_ulong_t)&max3108_devtype, }, 1348 { "max3108", (kernel_ulong_t)&max3108_devtype, },
@@ -1301,9 +1354,10 @@ MODULE_DEVICE_TABLE(spi, max310x_id_table);
1301 1354
1302static struct spi_driver max310x_uart_driver = { 1355static struct spi_driver max310x_uart_driver = {
1303 .driver = { 1356 .driver = {
1304 .name = MAX310X_NAME, 1357 .name = MAX310X_NAME,
1305 .owner = THIS_MODULE, 1358 .owner = THIS_MODULE,
1306 .pm = &max310x_pm_ops, 1359 .of_match_table = of_match_ptr(max310x_dt_ids),
1360 .pm = &max310x_pm_ops,
1307 }, 1361 },
1308 .probe = max310x_spi_probe, 1362 .probe = max310x_spi_probe,
1309 .remove = max310x_spi_remove, 1363 .remove = max310x_spi_remove,
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index b5d779cd3c2b..053b98eb46c8 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -39,6 +39,13 @@
39 39
40#include "msm_serial.h" 40#include "msm_serial.h"
41 41
42enum {
43 UARTDM_1P1 = 1,
44 UARTDM_1P2,
45 UARTDM_1P3,
46 UARTDM_1P4,
47};
48
42struct msm_port { 49struct msm_port {
43 struct uart_port uart; 50 struct uart_port uart;
44 char name[16]; 51 char name[16];
@@ -309,6 +316,8 @@ static unsigned int msm_get_mctrl(struct uart_port *port)
309 316
310static void msm_reset(struct uart_port *port) 317static void msm_reset(struct uart_port *port)
311{ 318{
319 struct msm_port *msm_port = UART_TO_MSM(port);
320
312 /* reset everything */ 321 /* reset everything */
313 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR); 322 msm_write(port, UART_CR_CMD_RESET_RX, UART_CR);
314 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR); 323 msm_write(port, UART_CR_CMD_RESET_TX, UART_CR);
@@ -316,6 +325,10 @@ static void msm_reset(struct uart_port *port)
316 msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR); 325 msm_write(port, UART_CR_CMD_RESET_BREAK_INT, UART_CR);
317 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR); 326 msm_write(port, UART_CR_CMD_RESET_CTS, UART_CR);
318 msm_write(port, UART_CR_CMD_SET_RFR, UART_CR); 327 msm_write(port, UART_CR_CMD_SET_RFR, UART_CR);
328
329 /* Disable DM modes */
330 if (msm_port->is_uartdm)
331 msm_write(port, 0, UARTDM_DMEN);
319} 332}
320 333
321static void msm_set_mctrl(struct uart_port *port, unsigned int mctrl) 334static void msm_set_mctrl(struct uart_port *port, unsigned int mctrl)
@@ -711,6 +724,117 @@ static void msm_power(struct uart_port *port, unsigned int state,
711 } 724 }
712} 725}
713 726
727#ifdef CONFIG_CONSOLE_POLL
728static int msm_poll_init(struct uart_port *port)
729{
730 struct msm_port *msm_port = UART_TO_MSM(port);
731
732 /* Enable single character mode on RX FIFO */
733 if (msm_port->is_uartdm >= UARTDM_1P4)
734 msm_write(port, UARTDM_DMEN_RX_SC_ENABLE, UARTDM_DMEN);
735
736 return 0;
737}
738
739static int msm_poll_get_char_single(struct uart_port *port)
740{
741 struct msm_port *msm_port = UART_TO_MSM(port);
742 unsigned int rf_reg = msm_port->is_uartdm ? UARTDM_RF : UART_RF;
743
744 if (!(msm_read(port, UART_SR) & UART_SR_RX_READY))
745 return NO_POLL_CHAR;
746 else
747 return msm_read(port, rf_reg) & 0xff;
748}
749
750static int msm_poll_get_char_dm_1p3(struct uart_port *port)
751{
752 int c;
753 static u32 slop;
754 static int count;
755 unsigned char *sp = (unsigned char *)&slop;
756
757 /* Check if a previous read had more than one char */
758 if (count) {
759 c = sp[sizeof(slop) - count];
760 count--;
761 /* Or if FIFO is empty */
762 } else if (!(msm_read(port, UART_SR) & UART_SR_RX_READY)) {
763 /*
764 * If RX packing buffer has less than a word, force stale to
765 * push contents into RX FIFO
766 */
767 count = msm_read(port, UARTDM_RXFS);
768 count = (count >> UARTDM_RXFS_BUF_SHIFT) & UARTDM_RXFS_BUF_MASK;
769 if (count) {
770 msm_write(port, UART_CR_CMD_FORCE_STALE, UART_CR);
771 slop = msm_read(port, UARTDM_RF);
772 c = sp[0];
773 count--;
774 } else {
775 c = NO_POLL_CHAR;
776 }
777 /* FIFO has a word */
778 } else {
779 slop = msm_read(port, UARTDM_RF);
780 c = sp[0];
781 count = sizeof(slop) - 1;
782 }
783
784 return c;
785}
786
787static int msm_poll_get_char(struct uart_port *port)
788{
789 u32 imr;
790 int c;
791 struct msm_port *msm_port = UART_TO_MSM(port);
792
793 /* Disable all interrupts */
794 imr = msm_read(port, UART_IMR);
795 msm_write(port, 0, UART_IMR);
796
797 if (msm_port->is_uartdm == UARTDM_1P3)
798 c = msm_poll_get_char_dm_1p3(port);
799 else
800 c = msm_poll_get_char_single(port);
801
802 /* Enable interrupts */
803 msm_write(port, imr, UART_IMR);
804
805 return c;
806}
807
808static void msm_poll_put_char(struct uart_port *port, unsigned char c)
809{
810 u32 imr;
811 struct msm_port *msm_port = UART_TO_MSM(port);
812
813 /* Disable all interrupts */
814 imr = msm_read(port, UART_IMR);
815 msm_write(port, 0, UART_IMR);
816
817 if (msm_port->is_uartdm)
818 reset_dm_count(port, 1);
819
820 /* Wait until FIFO is empty */
821 while (!(msm_read(port, UART_SR) & UART_SR_TX_READY))
822 cpu_relax();
823
824 /* Write a character */
825 msm_write(port, c, msm_port->is_uartdm ? UARTDM_TF : UART_TF);
826
827 /* Wait until FIFO is empty */
828 while (!(msm_read(port, UART_SR) & UART_SR_TX_READY))
829 cpu_relax();
830
831 /* Enable interrupts */
832 msm_write(port, imr, UART_IMR);
833
834 return;
835}
836#endif
837
714static struct uart_ops msm_uart_pops = { 838static struct uart_ops msm_uart_pops = {
715 .tx_empty = msm_tx_empty, 839 .tx_empty = msm_tx_empty,
716 .set_mctrl = msm_set_mctrl, 840 .set_mctrl = msm_set_mctrl,
@@ -729,6 +853,11 @@ static struct uart_ops msm_uart_pops = {
729 .config_port = msm_config_port, 853 .config_port = msm_config_port,
730 .verify_port = msm_verify_port, 854 .verify_port = msm_verify_port,
731 .pm = msm_power, 855 .pm = msm_power,
856#ifdef CONFIG_CONSOLE_POLL
857 .poll_init = msm_poll_init,
858 .poll_get_char = msm_poll_get_char,
859 .poll_put_char = msm_poll_put_char,
860#endif
732}; 861};
733 862
734static struct msm_port msm_uart_ports[] = { 863static struct msm_port msm_uart_ports[] = {
@@ -900,7 +1029,10 @@ static struct uart_driver msm_uart_driver = {
900static atomic_t msm_uart_next_id = ATOMIC_INIT(0); 1029static atomic_t msm_uart_next_id = ATOMIC_INIT(0);
901 1030
902static const struct of_device_id msm_uartdm_table[] = { 1031static const struct of_device_id msm_uartdm_table[] = {
903 { .compatible = "qcom,msm-uartdm" }, 1032 { .compatible = "qcom,msm-uartdm-v1.1", .data = (void *)UARTDM_1P1 },
1033 { .compatible = "qcom,msm-uartdm-v1.2", .data = (void *)UARTDM_1P2 },
1034 { .compatible = "qcom,msm-uartdm-v1.3", .data = (void *)UARTDM_1P3 },
1035 { .compatible = "qcom,msm-uartdm-v1.4", .data = (void *)UARTDM_1P4 },
904 { } 1036 { }
905}; 1037};
906 1038
@@ -909,6 +1041,7 @@ static int __init msm_serial_probe(struct platform_device *pdev)
909 struct msm_port *msm_port; 1041 struct msm_port *msm_port;
910 struct resource *resource; 1042 struct resource *resource;
911 struct uart_port *port; 1043 struct uart_port *port;
1044 const struct of_device_id *id;
912 int irq; 1045 int irq;
913 1046
914 if (pdev->id == -1) 1047 if (pdev->id == -1)
@@ -923,8 +1056,9 @@ static int __init msm_serial_probe(struct platform_device *pdev)
923 port->dev = &pdev->dev; 1056 port->dev = &pdev->dev;
924 msm_port = UART_TO_MSM(port); 1057 msm_port = UART_TO_MSM(port);
925 1058
926 if (of_match_device(msm_uartdm_table, &pdev->dev)) 1059 id = of_match_device(msm_uartdm_table, &pdev->dev);
927 msm_port->is_uartdm = 1; 1060 if (id)
1061 msm_port->is_uartdm = (unsigned long)id->data;
928 else 1062 else
929 msm_port->is_uartdm = 0; 1063 msm_port->is_uartdm = 0;
930 1064
diff --git a/drivers/tty/serial/msm_serial.h b/drivers/tty/serial/msm_serial.h
index 469fda50ac63..1e9b68b6f9eb 100644
--- a/drivers/tty/serial/msm_serial.h
+++ b/drivers/tty/serial/msm_serial.h
@@ -59,6 +59,7 @@
59#define UART_CR_CMD_RESET_RFR (14 << 4) 59#define UART_CR_CMD_RESET_RFR (14 << 4)
60#define UART_CR_CMD_PROTECTION_EN (16 << 4) 60#define UART_CR_CMD_PROTECTION_EN (16 << 4)
61#define UART_CR_CMD_STALE_EVENT_ENABLE (80 << 4) 61#define UART_CR_CMD_STALE_EVENT_ENABLE (80 << 4)
62#define UART_CR_CMD_FORCE_STALE (4 << 8)
62#define UART_CR_CMD_RESET_TX_READY (3 << 8) 63#define UART_CR_CMD_RESET_TX_READY (3 << 8)
63#define UART_CR_TX_DISABLE (1 << 3) 64#define UART_CR_TX_DISABLE (1 << 3)
64#define UART_CR_TX_ENABLE (1 << 2) 65#define UART_CR_TX_ENABLE (1 << 2)
@@ -113,6 +114,14 @@
113#define GSBI_PROTOCOL_UART 0x40 114#define GSBI_PROTOCOL_UART 0x40
114#define GSBI_PROTOCOL_IDLE 0x0 115#define GSBI_PROTOCOL_IDLE 0x0
115 116
117#define UARTDM_RXFS 0x50
118#define UARTDM_RXFS_BUF_SHIFT 0x7
119#define UARTDM_RXFS_BUF_MASK 0x7
120
121#define UARTDM_DMEN 0x3C
122#define UARTDM_DMEN_RX_SC_ENABLE BIT(5)
123#define UARTDM_DMEN_TX_SC_ENABLE BIT(4)
124
116#define UARTDM_DMRX 0x34 125#define UARTDM_DMRX 0x34
117#define UARTDM_NCF_TX 0x40 126#define UARTDM_NCF_TX 0x40
118#define UARTDM_RX_TOTAL_SNAP 0x38 127#define UARTDM_RX_TOTAL_SNAP 0x38
diff --git a/drivers/tty/serial/pch_uart.c b/drivers/tty/serial/pch_uart.c
index 8fa1134e0051..0931b3fe9edf 100644
--- a/drivers/tty/serial/pch_uart.c
+++ b/drivers/tty/serial/pch_uart.c
@@ -1762,7 +1762,9 @@ static struct eg20t_port *pch_uart_init_port(struct pci_dev *pdev,
1762 int fifosize; 1762 int fifosize;
1763 int port_type; 1763 int port_type;
1764 struct pch_uart_driver_data *board; 1764 struct pch_uart_driver_data *board;
1765#ifdef CONFIG_DEBUG_FS
1765 char name[32]; /* for debugfs file name */ 1766 char name[32]; /* for debugfs file name */
1767#endif
1766 1768
1767 board = &drv_dat[id->driver_data]; 1769 board = &drv_dat[id->driver_data];
1768 port_type = board->port_type; 1770 port_type = board->port_type;
diff --git a/drivers/tty/serial/samsung.c b/drivers/tty/serial/samsung.c
index 9cd706df3b33..23f459600738 100644
--- a/drivers/tty/serial/samsung.c
+++ b/drivers/tty/serial/samsung.c
@@ -1282,6 +1282,14 @@ static int s3c24xx_serial_probe(struct platform_device *pdev)
1282 if (ret < 0) 1282 if (ret < 0)
1283 goto probe_err; 1283 goto probe_err;
1284 1284
1285 if (!s3c24xx_uart_drv.state) {
1286 ret = uart_register_driver(&s3c24xx_uart_drv);
1287 if (ret < 0) {
1288 pr_err("Failed to register Samsung UART driver\n");
1289 return ret;
1290 }
1291 }
1292
1285 dbg("%s: adding port\n", __func__); 1293 dbg("%s: adding port\n", __func__);
1286 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); 1294 uart_add_one_port(&s3c24xx_uart_drv, &ourport->port);
1287 platform_set_drvdata(pdev, &ourport->port); 1295 platform_set_drvdata(pdev, &ourport->port);
@@ -1321,6 +1329,8 @@ static int s3c24xx_serial_remove(struct platform_device *dev)
1321 uart_remove_one_port(&s3c24xx_uart_drv, port); 1329 uart_remove_one_port(&s3c24xx_uart_drv, port);
1322 } 1330 }
1323 1331
1332 uart_unregister_driver(&s3c24xx_uart_drv);
1333
1324 return 0; 1334 return 0;
1325} 1335}
1326 1336
@@ -1820,35 +1830,7 @@ static struct platform_driver samsung_serial_driver = {
1820 }, 1830 },
1821}; 1831};
1822 1832
1823/* module initialisation code */ 1833module_platform_driver(samsung_serial_driver);
1824
1825static int __init s3c24xx_serial_modinit(void)
1826{
1827 int ret;
1828
1829 ret = uart_register_driver(&s3c24xx_uart_drv);
1830 if (ret < 0) {
1831 pr_err("Failed to register Samsung UART driver\n");
1832 return ret;
1833 }
1834
1835 ret = platform_driver_register(&samsung_serial_driver);
1836 if (ret < 0) {
1837 pr_err("Failed to register platform driver\n");
1838 uart_unregister_driver(&s3c24xx_uart_drv);
1839 }
1840
1841 return ret;
1842}
1843
1844static void __exit s3c24xx_serial_modexit(void)
1845{
1846 platform_driver_unregister(&samsung_serial_driver);
1847 uart_unregister_driver(&s3c24xx_uart_drv);
1848}
1849
1850module_init(s3c24xx_serial_modinit);
1851module_exit(s3c24xx_serial_modexit);
1852 1834
1853MODULE_ALIAS("platform:samsung-uart"); 1835MODULE_ALIAS("platform:samsung-uart");
1854MODULE_DESCRIPTION("Samsung SoC Serial port driver"); 1836MODULE_DESCRIPTION("Samsung SoC Serial port driver");
diff --git a/drivers/tty/serial/sh-sci.c b/drivers/tty/serial/sh-sci.c
index be33d2b0613b..1668523d31fb 100644
--- a/drivers/tty/serial/sh-sci.c
+++ b/drivers/tty/serial/sh-sci.c
@@ -2018,7 +2018,7 @@ static int sci_remap_port(struct uart_port *port)
2018 * need to do any remapping, just cast the cookie 2018 * need to do any remapping, just cast the cookie
2019 * directly. 2019 * directly.
2020 */ 2020 */
2021 port->membase = (void __iomem *)port->mapbase; 2021 port->membase = (void __iomem *)(uintptr_t)port->mapbase;
2022 } 2022 }
2023 2023
2024 return 0; 2024 return 0;
diff --git a/drivers/tty/serial/sirfsoc_uart.c b/drivers/tty/serial/sirfsoc_uart.c
index b7bfe24d4ebc..68b0fd4b9a6a 100644
--- a/drivers/tty/serial/sirfsoc_uart.c
+++ b/drivers/tty/serial/sirfsoc_uart.c
@@ -24,7 +24,6 @@
24#include <linux/dmaengine.h> 24#include <linux/dmaengine.h>
25#include <linux/dma-direction.h> 25#include <linux/dma-direction.h>
26#include <linux/dma-mapping.h> 26#include <linux/dma-mapping.h>
27#include <linux/sirfsoc_dma.h>
28#include <asm/irq.h> 27#include <asm/irq.h>
29#include <asm/mach/irq.h> 28#include <asm/mach/irq.h>
30 29
@@ -173,7 +172,7 @@ static void sirfsoc_uart_stop_tx(struct uart_port *port)
173 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg; 172 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg;
174 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en; 173 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
175 174
176 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) { 175 if (sirfport->tx_dma_chan) {
177 if (sirfport->tx_dma_state == TX_DMA_RUNNING) { 176 if (sirfport->tx_dma_state == TX_DMA_RUNNING) {
178 dmaengine_pause(sirfport->tx_dma_chan); 177 dmaengine_pause(sirfport->tx_dma_chan);
179 sirfport->tx_dma_state = TX_DMA_PAUSE; 178 sirfport->tx_dma_state = TX_DMA_PAUSE;
@@ -288,7 +287,7 @@ static void sirfsoc_uart_start_tx(struct uart_port *port)
288 struct sirfsoc_uart_port *sirfport = to_sirfport(port); 287 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
289 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg; 288 struct sirfsoc_register *ureg = &sirfport->uart_reg->uart_reg;
290 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en; 289 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
291 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) 290 if (sirfport->tx_dma_chan)
292 sirfsoc_uart_tx_with_dma(sirfport); 291 sirfsoc_uart_tx_with_dma(sirfport);
293 else { 292 else {
294 sirfsoc_uart_pio_tx_chars(sirfport, 1); 293 sirfsoc_uart_pio_tx_chars(sirfport, 1);
@@ -310,7 +309,7 @@ static void sirfsoc_uart_stop_rx(struct uart_port *port)
310 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en; 309 struct sirfsoc_int_en *uint_en = &sirfport->uart_reg->uart_int_en;
311 310
312 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0); 311 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0);
313 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) { 312 if (sirfport->rx_dma_chan) {
314 if (!sirfport->is_marco) 313 if (!sirfport->is_marco)
315 wr_regl(port, ureg->sirfsoc_int_en_reg, 314 wr_regl(port, ureg->sirfsoc_int_en_reg,
316 rd_regl(port, ureg->sirfsoc_int_en_reg) & 315 rd_regl(port, ureg->sirfsoc_int_en_reg) &
@@ -675,7 +674,7 @@ recv_char:
675 uart_handle_cts_change(port, cts_status); 674 uart_handle_cts_change(port, cts_status);
676 wake_up_interruptible(&state->port.delta_msr_wait); 675 wake_up_interruptible(&state->port.delta_msr_wait);
677 } 676 }
678 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) { 677 if (sirfport->rx_dma_chan) {
679 if (intr_status & uint_st->sirfsoc_rx_timeout) 678 if (intr_status & uint_st->sirfsoc_rx_timeout)
680 sirfsoc_uart_handle_rx_tmo(sirfport); 679 sirfsoc_uart_handle_rx_tmo(sirfport);
681 if (intr_status & uint_st->sirfsoc_rx_done) 680 if (intr_status & uint_st->sirfsoc_rx_done)
@@ -686,7 +685,7 @@ recv_char:
686 SIRFSOC_UART_IO_RX_MAX_CNT); 685 SIRFSOC_UART_IO_RX_MAX_CNT);
687 } 686 }
688 if (intr_status & uint_st->sirfsoc_txfifo_empty) { 687 if (intr_status & uint_st->sirfsoc_txfifo_empty) {
689 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) 688 if (sirfport->tx_dma_chan)
690 sirfsoc_uart_tx_with_dma(sirfport); 689 sirfsoc_uart_tx_with_dma(sirfport);
691 else { 690 else {
692 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 691 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
@@ -778,7 +777,7 @@ static void sirfsoc_uart_start_rx(struct uart_port *port)
778 wr_regl(port, ureg->sirfsoc_rx_fifo_op, SIRFUART_FIFO_RESET); 777 wr_regl(port, ureg->sirfsoc_rx_fifo_op, SIRFUART_FIFO_RESET);
779 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0); 778 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0);
780 wr_regl(port, ureg->sirfsoc_rx_fifo_op, SIRFUART_FIFO_START); 779 wr_regl(port, ureg->sirfsoc_rx_fifo_op, SIRFUART_FIFO_START);
781 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) 780 if (sirfport->rx_dma_chan)
782 sirfsoc_uart_start_next_rx_dma(port); 781 sirfsoc_uart_start_next_rx_dma(port);
783 else { 782 else {
784 if (!sirfport->is_marco) 783 if (!sirfport->is_marco)
@@ -1014,11 +1013,11 @@ static void sirfsoc_uart_set_termios(struct uart_port *port,
1014 (sample_div_reg & SIRFSOC_USP_ASYNC_DIV2_MASK) << 1013 (sample_div_reg & SIRFSOC_USP_ASYNC_DIV2_MASK) <<
1015 SIRFSOC_USP_ASYNC_DIV2_OFFSET); 1014 SIRFSOC_USP_ASYNC_DIV2_OFFSET);
1016 } 1015 }
1017 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) 1016 if (sirfport->tx_dma_chan)
1018 wr_regl(port, ureg->sirfsoc_tx_dma_io_ctrl, SIRFUART_DMA_MODE); 1017 wr_regl(port, ureg->sirfsoc_tx_dma_io_ctrl, SIRFUART_DMA_MODE);
1019 else 1018 else
1020 wr_regl(port, ureg->sirfsoc_tx_dma_io_ctrl, SIRFUART_IO_MODE); 1019 wr_regl(port, ureg->sirfsoc_tx_dma_io_ctrl, SIRFUART_IO_MODE);
1021 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) 1020 if (sirfport->rx_dma_chan)
1022 wr_regl(port, ureg->sirfsoc_rx_dma_io_ctrl, SIRFUART_DMA_MODE); 1021 wr_regl(port, ureg->sirfsoc_rx_dma_io_ctrl, SIRFUART_DMA_MODE);
1023 else 1022 else
1024 wr_regl(port, ureg->sirfsoc_rx_dma_io_ctrl, SIRFUART_IO_MODE); 1023 wr_regl(port, ureg->sirfsoc_rx_dma_io_ctrl, SIRFUART_IO_MODE);
@@ -1049,93 +1048,6 @@ static void sirfsoc_uart_pm(struct uart_port *port, unsigned int state,
1049 clk_disable_unprepare(sirfport->clk); 1048 clk_disable_unprepare(sirfport->clk);
1050} 1049}
1051 1050
1052static unsigned int sirfsoc_uart_init_tx_dma(struct uart_port *port)
1053{
1054 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
1055 dma_cap_mask_t dma_mask;
1056 struct dma_slave_config tx_slv_cfg = {
1057 .dst_maxburst = 2,
1058 };
1059
1060 dma_cap_zero(dma_mask);
1061 dma_cap_set(DMA_SLAVE, dma_mask);
1062 sirfport->tx_dma_chan = dma_request_channel(dma_mask,
1063 (dma_filter_fn)sirfsoc_dma_filter_id,
1064 (void *)sirfport->tx_dma_no);
1065 if (!sirfport->tx_dma_chan) {
1066 dev_err(port->dev, "Uart Request Dma Channel Fail %d\n",
1067 sirfport->tx_dma_no);
1068 return -EPROBE_DEFER;
1069 }
1070 dmaengine_slave_config(sirfport->tx_dma_chan, &tx_slv_cfg);
1071
1072 return 0;
1073}
1074
1075static unsigned int sirfsoc_uart_init_rx_dma(struct uart_port *port)
1076{
1077 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
1078 dma_cap_mask_t dma_mask;
1079 int ret;
1080 int i, j;
1081 struct dma_slave_config slv_cfg = {
1082 .src_maxburst = 2,
1083 };
1084
1085 dma_cap_zero(dma_mask);
1086 dma_cap_set(DMA_SLAVE, dma_mask);
1087 sirfport->rx_dma_chan = dma_request_channel(dma_mask,
1088 (dma_filter_fn)sirfsoc_dma_filter_id,
1089 (void *)sirfport->rx_dma_no);
1090 if (!sirfport->rx_dma_chan) {
1091 dev_err(port->dev, "Uart Request Dma Channel Fail %d\n",
1092 sirfport->rx_dma_no);
1093 ret = -EPROBE_DEFER;
1094 goto request_err;
1095 }
1096 for (i = 0; i < SIRFSOC_RX_LOOP_BUF_CNT; i++) {
1097 sirfport->rx_dma_items[i].xmit.buf =
1098 dma_alloc_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1099 &sirfport->rx_dma_items[i].dma_addr, GFP_KERNEL);
1100 if (!sirfport->rx_dma_items[i].xmit.buf) {
1101 dev_err(port->dev, "Uart alloc bufa failed\n");
1102 ret = -ENOMEM;
1103 goto alloc_coherent_err;
1104 }
1105 sirfport->rx_dma_items[i].xmit.head =
1106 sirfport->rx_dma_items[i].xmit.tail = 0;
1107 }
1108 dmaengine_slave_config(sirfport->rx_dma_chan, &slv_cfg);
1109
1110 return 0;
1111alloc_coherent_err:
1112 for (j = 0; j < i; j++)
1113 dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1114 sirfport->rx_dma_items[j].xmit.buf,
1115 sirfport->rx_dma_items[j].dma_addr);
1116 dma_release_channel(sirfport->rx_dma_chan);
1117request_err:
1118 return ret;
1119}
1120
1121static void sirfsoc_uart_uninit_tx_dma(struct sirfsoc_uart_port *sirfport)
1122{
1123 dmaengine_terminate_all(sirfport->tx_dma_chan);
1124 dma_release_channel(sirfport->tx_dma_chan);
1125}
1126
1127static void sirfsoc_uart_uninit_rx_dma(struct sirfsoc_uart_port *sirfport)
1128{
1129 int i;
1130 struct uart_port *port = &sirfport->port;
1131 dmaengine_terminate_all(sirfport->rx_dma_chan);
1132 dma_release_channel(sirfport->rx_dma_chan);
1133 for (i = 0; i < SIRFSOC_RX_LOOP_BUF_CNT; i++)
1134 dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1135 sirfport->rx_dma_items[i].xmit.buf,
1136 sirfport->rx_dma_items[i].dma_addr);
1137}
1138
1139static int sirfsoc_uart_startup(struct uart_port *port) 1051static int sirfsoc_uart_startup(struct uart_port *port)
1140{ 1052{
1141 struct sirfsoc_uart_port *sirfport = to_sirfport(port); 1053 struct sirfsoc_uart_port *sirfport = to_sirfport(port);
@@ -1174,18 +1086,12 @@ static int sirfsoc_uart_startup(struct uart_port *port)
1174 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0); 1086 wr_regl(port, ureg->sirfsoc_rx_fifo_op, 0);
1175 wr_regl(port, ureg->sirfsoc_tx_fifo_ctrl, SIRFUART_FIFO_THD(port)); 1087 wr_regl(port, ureg->sirfsoc_tx_fifo_ctrl, SIRFUART_FIFO_THD(port));
1176 wr_regl(port, ureg->sirfsoc_rx_fifo_ctrl, SIRFUART_FIFO_THD(port)); 1088 wr_regl(port, ureg->sirfsoc_rx_fifo_ctrl, SIRFUART_FIFO_THD(port));
1177 1089 if (sirfport->rx_dma_chan)
1178 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) {
1179 ret = sirfsoc_uart_init_rx_dma(port);
1180 if (ret)
1181 goto init_rx_err;
1182 wr_regl(port, ureg->sirfsoc_rx_fifo_level_chk, 1090 wr_regl(port, ureg->sirfsoc_rx_fifo_level_chk,
1183 SIRFUART_RX_FIFO_CHK_SC(port->line, 0x4) | 1091 SIRFUART_RX_FIFO_CHK_SC(port->line, 0x4) |
1184 SIRFUART_RX_FIFO_CHK_LC(port->line, 0xe) | 1092 SIRFUART_RX_FIFO_CHK_LC(port->line, 0xe) |
1185 SIRFUART_RX_FIFO_CHK_HC(port->line, 0x1b)); 1093 SIRFUART_RX_FIFO_CHK_HC(port->line, 0x1b));
1186 } 1094 if (sirfport->tx_dma_chan) {
1187 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) {
1188 sirfsoc_uart_init_tx_dma(port);
1189 sirfport->tx_dma_state = TX_DMA_IDLE; 1095 sirfport->tx_dma_state = TX_DMA_IDLE;
1190 wr_regl(port, ureg->sirfsoc_tx_fifo_level_chk, 1096 wr_regl(port, ureg->sirfsoc_tx_fifo_level_chk,
1191 SIRFUART_TX_FIFO_CHK_SC(port->line, 0x1b) | 1097 SIRFUART_TX_FIFO_CHK_SC(port->line, 0x1b) |
@@ -1232,12 +1138,8 @@ static void sirfsoc_uart_shutdown(struct uart_port *port)
1232 gpio_set_value(sirfport->rts_gpio, 1); 1138 gpio_set_value(sirfport->rts_gpio, 1);
1233 free_irq(gpio_to_irq(sirfport->cts_gpio), sirfport); 1139 free_irq(gpio_to_irq(sirfport->cts_gpio), sirfport);
1234 } 1140 }
1235 if (IS_DMA_CHAN_VALID(sirfport->rx_dma_no)) 1141 if (sirfport->tx_dma_chan)
1236 sirfsoc_uart_uninit_rx_dma(sirfport);
1237 if (IS_DMA_CHAN_VALID(sirfport->tx_dma_no)) {
1238 sirfsoc_uart_uninit_tx_dma(sirfport);
1239 sirfport->tx_dma_state = TX_DMA_IDLE; 1142 sirfport->tx_dma_state = TX_DMA_IDLE;
1240 }
1241} 1143}
1242 1144
1243static const char *sirfsoc_uart_type(struct uart_port *port) 1145static const char *sirfsoc_uart_type(struct uart_port *port)
@@ -1313,8 +1215,8 @@ sirfsoc_uart_console_setup(struct console *co, char *options)
1313 port->cons = co; 1215 port->cons = co;
1314 1216
1315 /* default console tx/rx transfer using io mode */ 1217 /* default console tx/rx transfer using io mode */
1316 sirfport->rx_dma_no = UNVALID_DMA_CHAN; 1218 sirfport->rx_dma_chan = NULL;
1317 sirfport->tx_dma_no = UNVALID_DMA_CHAN; 1219 sirfport->tx_dma_chan = NULL;
1318 return uart_set_options(port, co, baud, parity, bits, flow); 1220 return uart_set_options(port, co, baud, parity, bits, flow);
1319} 1221}
1320 1222
@@ -1382,6 +1284,13 @@ static int sirfsoc_uart_probe(struct platform_device *pdev)
1382 struct uart_port *port; 1284 struct uart_port *port;
1383 struct resource *res; 1285 struct resource *res;
1384 int ret; 1286 int ret;
1287 int i, j;
1288 struct dma_slave_config slv_cfg = {
1289 .src_maxburst = 2,
1290 };
1291 struct dma_slave_config tx_slv_cfg = {
1292 .dst_maxburst = 2,
1293 };
1385 const struct of_device_id *match; 1294 const struct of_device_id *match;
1386 1295
1387 match = of_match_node(sirfsoc_uart_ids, pdev->dev.of_node); 1296 match = of_match_node(sirfsoc_uart_ids, pdev->dev.of_node);
@@ -1402,27 +1311,10 @@ static int sirfsoc_uart_probe(struct platform_device *pdev)
1402 1311
1403 sirfport->hw_flow_ctrl = of_property_read_bool(pdev->dev.of_node, 1312 sirfport->hw_flow_ctrl = of_property_read_bool(pdev->dev.of_node,
1404 "sirf,uart-has-rtscts"); 1313 "sirf,uart-has-rtscts");
1405 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart")) { 1314 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-uart"))
1406 sirfport->uart_reg->uart_type = SIRF_REAL_UART; 1315 sirfport->uart_reg->uart_type = SIRF_REAL_UART;
1407 if (of_property_read_u32(pdev->dev.of_node,
1408 "sirf,uart-dma-rx-channel",
1409 &sirfport->rx_dma_no))
1410 sirfport->rx_dma_no = UNVALID_DMA_CHAN;
1411 if (of_property_read_u32(pdev->dev.of_node,
1412 "sirf,uart-dma-tx-channel",
1413 &sirfport->tx_dma_no))
1414 sirfport->tx_dma_no = UNVALID_DMA_CHAN;
1415 }
1416 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) { 1316 if (of_device_is_compatible(pdev->dev.of_node, "sirf,prima2-usp-uart")) {
1417 sirfport->uart_reg->uart_type = SIRF_USP_UART; 1317 sirfport->uart_reg->uart_type = SIRF_USP_UART;
1418 if (of_property_read_u32(pdev->dev.of_node,
1419 "sirf,usp-dma-rx-channel",
1420 &sirfport->rx_dma_no))
1421 sirfport->rx_dma_no = UNVALID_DMA_CHAN;
1422 if (of_property_read_u32(pdev->dev.of_node,
1423 "sirf,usp-dma-tx-channel",
1424 &sirfport->tx_dma_no))
1425 sirfport->tx_dma_no = UNVALID_DMA_CHAN;
1426 if (!sirfport->hw_flow_ctrl) 1318 if (!sirfport->hw_flow_ctrl)
1427 goto usp_no_flow_control; 1319 goto usp_no_flow_control;
1428 if (of_find_property(pdev->dev.of_node, "cts-gpios", NULL)) 1320 if (of_find_property(pdev->dev.of_node, "cts-gpios", NULL))
@@ -1515,8 +1407,32 @@ usp_no_flow_control:
1515 goto port_err; 1407 goto port_err;
1516 } 1408 }
1517 1409
1518 return 0; 1410 sirfport->rx_dma_chan = dma_request_slave_channel(port->dev, "rx");
1411 for (i = 0; sirfport->rx_dma_chan && i < SIRFSOC_RX_LOOP_BUF_CNT; i++) {
1412 sirfport->rx_dma_items[i].xmit.buf =
1413 dma_alloc_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1414 &sirfport->rx_dma_items[i].dma_addr, GFP_KERNEL);
1415 if (!sirfport->rx_dma_items[i].xmit.buf) {
1416 dev_err(port->dev, "Uart alloc bufa failed\n");
1417 ret = -ENOMEM;
1418 goto alloc_coherent_err;
1419 }
1420 sirfport->rx_dma_items[i].xmit.head =
1421 sirfport->rx_dma_items[i].xmit.tail = 0;
1422 }
1423 if (sirfport->rx_dma_chan)
1424 dmaengine_slave_config(sirfport->rx_dma_chan, &slv_cfg);
1425 sirfport->tx_dma_chan = dma_request_slave_channel(port->dev, "tx");
1426 if (sirfport->tx_dma_chan)
1427 dmaengine_slave_config(sirfport->tx_dma_chan, &tx_slv_cfg);
1519 1428
1429 return 0;
1430alloc_coherent_err:
1431 for (j = 0; j < i; j++)
1432 dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1433 sirfport->rx_dma_items[j].xmit.buf,
1434 sirfport->rx_dma_items[j].dma_addr);
1435 dma_release_channel(sirfport->rx_dma_chan);
1520port_err: 1436port_err:
1521 clk_put(sirfport->clk); 1437 clk_put(sirfport->clk);
1522err: 1438err:
@@ -1529,6 +1445,19 @@ static int sirfsoc_uart_remove(struct platform_device *pdev)
1529 struct uart_port *port = &sirfport->port; 1445 struct uart_port *port = &sirfport->port;
1530 clk_put(sirfport->clk); 1446 clk_put(sirfport->clk);
1531 uart_remove_one_port(&sirfsoc_uart_drv, port); 1447 uart_remove_one_port(&sirfsoc_uart_drv, port);
1448 if (sirfport->rx_dma_chan) {
1449 int i;
1450 dmaengine_terminate_all(sirfport->rx_dma_chan);
1451 dma_release_channel(sirfport->rx_dma_chan);
1452 for (i = 0; i < SIRFSOC_RX_LOOP_BUF_CNT; i++)
1453 dma_free_coherent(port->dev, SIRFSOC_RX_DMA_BUF_SIZE,
1454 sirfport->rx_dma_items[i].xmit.buf,
1455 sirfport->rx_dma_items[i].dma_addr);
1456 }
1457 if (sirfport->tx_dma_chan) {
1458 dmaengine_terminate_all(sirfport->tx_dma_chan);
1459 dma_release_channel(sirfport->tx_dma_chan);
1460 }
1532 return 0; 1461 return 0;
1533} 1462}
1534 1463
diff --git a/drivers/tty/serial/sirfsoc_uart.h b/drivers/tty/serial/sirfsoc_uart.h
index b7d679c0881b..8a6eddad2f3c 100644
--- a/drivers/tty/serial/sirfsoc_uart.h
+++ b/drivers/tty/serial/sirfsoc_uart.h
@@ -392,9 +392,6 @@ struct sirfsoc_uart_register sirfsoc_uart = {
392/* Indicate how many buffers used */ 392/* Indicate how many buffers used */
393#define SIRFSOC_RX_LOOP_BUF_CNT 2 393#define SIRFSOC_RX_LOOP_BUF_CNT 2
394 394
395/* Indicate if DMA channel valid */
396#define IS_DMA_CHAN_VALID(x) ((x) != -1)
397#define UNVALID_DMA_CHAN -1
398/* For Fast Baud Rate Calculation */ 395/* For Fast Baud Rate Calculation */
399struct sirfsoc_baudrate_to_regv { 396struct sirfsoc_baudrate_to_regv {
400 unsigned int baud_rate; 397 unsigned int baud_rate;
@@ -423,8 +420,6 @@ struct sirfsoc_uart_port {
423 /* for SiRFmarco, there are SET/CLR for UART_INT_EN */ 420 /* for SiRFmarco, there are SET/CLR for UART_INT_EN */
424 bool is_marco; 421 bool is_marco;
425 struct sirfsoc_uart_register *uart_reg; 422 struct sirfsoc_uart_register *uart_reg;
426 int rx_dma_no;
427 int tx_dma_no;
428 struct dma_chan *rx_dma_chan; 423 struct dma_chan *rx_dma_chan;
429 struct dma_chan *tx_dma_chan; 424 struct dma_chan *tx_dma_chan;
430 dma_addr_t tx_dma_addr; 425 dma_addr_t tx_dma_addr;
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-08 05:54:53 -0500