diff options
Diffstat (limited to 'drivers')
119 files changed, 1880 insertions, 929 deletions
diff --git a/drivers/base/power/clock_ops.c b/drivers/base/power/clock_ops.c index c0dd09df7be8..eaa8a854af03 100644 --- a/drivers/base/power/clock_ops.c +++ b/drivers/base/power/clock_ops.c | |||
@@ -291,7 +291,7 @@ static int pm_runtime_clk_notify(struct notifier_block *nb, | |||
291 | { | 291 | { |
292 | struct pm_clk_notifier_block *clknb; | 292 | struct pm_clk_notifier_block *clknb; |
293 | struct device *dev = data; | 293 | struct device *dev = data; |
294 | char *con_id; | 294 | char **con_id; |
295 | int error; | 295 | int error; |
296 | 296 | ||
297 | dev_dbg(dev, "%s() %ld\n", __func__, action); | 297 | dev_dbg(dev, "%s() %ld\n", __func__, action); |
@@ -309,8 +309,8 @@ static int pm_runtime_clk_notify(struct notifier_block *nb, | |||
309 | 309 | ||
310 | dev->pwr_domain = clknb->pwr_domain; | 310 | dev->pwr_domain = clknb->pwr_domain; |
311 | if (clknb->con_ids[0]) { | 311 | if (clknb->con_ids[0]) { |
312 | for (con_id = clknb->con_ids[0]; *con_id; con_id++) | 312 | for (con_id = clknb->con_ids; *con_id; con_id++) |
313 | pm_runtime_clk_add(dev, con_id); | 313 | pm_runtime_clk_add(dev, *con_id); |
314 | } else { | 314 | } else { |
315 | pm_runtime_clk_add(dev, NULL); | 315 | pm_runtime_clk_add(dev, NULL); |
316 | } | 316 | } |
@@ -380,7 +380,7 @@ static int pm_runtime_clk_notify(struct notifier_block *nb, | |||
380 | { | 380 | { |
381 | struct pm_clk_notifier_block *clknb; | 381 | struct pm_clk_notifier_block *clknb; |
382 | struct device *dev = data; | 382 | struct device *dev = data; |
383 | char *con_id; | 383 | char **con_id; |
384 | 384 | ||
385 | dev_dbg(dev, "%s() %ld\n", __func__, action); | 385 | dev_dbg(dev, "%s() %ld\n", __func__, action); |
386 | 386 | ||
@@ -389,16 +389,16 @@ static int pm_runtime_clk_notify(struct notifier_block *nb, | |||
389 | switch (action) { | 389 | switch (action) { |
390 | case BUS_NOTIFY_ADD_DEVICE: | 390 | case BUS_NOTIFY_ADD_DEVICE: |
391 | if (clknb->con_ids[0]) { | 391 | if (clknb->con_ids[0]) { |
392 | for (con_id = clknb->con_ids[0]; *con_id; con_id++) | 392 | for (con_id = clknb->con_ids; *con_id; con_id++) |
393 | enable_clock(dev, con_id); | 393 | enable_clock(dev, *con_id); |
394 | } else { | 394 | } else { |
395 | enable_clock(dev, NULL); | 395 | enable_clock(dev, NULL); |
396 | } | 396 | } |
397 | break; | 397 | break; |
398 | case BUS_NOTIFY_DEL_DEVICE: | 398 | case BUS_NOTIFY_DEL_DEVICE: |
399 | if (clknb->con_ids[0]) { | 399 | if (clknb->con_ids[0]) { |
400 | for (con_id = clknb->con_ids[0]; *con_id; con_id++) | 400 | for (con_id = clknb->con_ids; *con_id; con_id++) |
401 | disable_clock(dev, con_id); | 401 | disable_clock(dev, *con_id); |
402 | } else { | 402 | } else { |
403 | disable_clock(dev, NULL); | 403 | disable_clock(dev, NULL); |
404 | } | 404 | } |
diff --git a/drivers/firmware/iscsi_ibft_find.c b/drivers/firmware/iscsi_ibft_find.c index f032e446fc11..bfe723266fd8 100644 --- a/drivers/firmware/iscsi_ibft_find.c +++ b/drivers/firmware/iscsi_ibft_find.c | |||
@@ -108,7 +108,9 @@ done: | |||
108 | */ | 108 | */ |
109 | unsigned long __init find_ibft_region(unsigned long *sizep) | 109 | unsigned long __init find_ibft_region(unsigned long *sizep) |
110 | { | 110 | { |
111 | #ifdef CONFIG_ACPI | ||
111 | int i; | 112 | int i; |
113 | #endif | ||
112 | ibft_addr = NULL; | 114 | ibft_addr = NULL; |
113 | 115 | ||
114 | #ifdef CONFIG_ACPI | 116 | #ifdef CONFIG_ACPI |
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 4a7f63143455..2967002a9f82 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -87,32 +87,20 @@ config GPIO_IT8761E | |||
87 | Say yes here to support GPIO functionality of IT8761E super I/O chip. | 87 | Say yes here to support GPIO functionality of IT8761E super I/O chip. |
88 | 88 | ||
89 | config GPIO_EXYNOS4 | 89 | config GPIO_EXYNOS4 |
90 | bool "Samsung Exynos4 GPIO library support" | 90 | def_bool y |
91 | default y if CPU_EXYNOS4210 | 91 | depends on CPU_EXYNOS4210 |
92 | depends on ARM | ||
93 | help | ||
94 | Say yes here to support Samsung Exynos4 series SoCs GPIO library | ||
95 | 92 | ||
96 | config GPIO_PLAT_SAMSUNG | 93 | config GPIO_PLAT_SAMSUNG |
97 | bool "Samsung SoCs GPIO library support" | 94 | def_bool y |
98 | default y if SAMSUNG_GPIOLIB_4BIT | 95 | depends on SAMSUNG_GPIOLIB_4BIT |
99 | depends on ARM | ||
100 | help | ||
101 | Say yes here to support Samsung SoCs GPIO library | ||
102 | 96 | ||
103 | config GPIO_S5PC100 | 97 | config GPIO_S5PC100 |
104 | bool "Samsung S5PC100 GPIO library support" | 98 | def_bool y |
105 | default y if CPU_S5PC100 | 99 | depends on CPU_S5PC100 |
106 | depends on ARM | ||
107 | help | ||
108 | Say yes here to support Samsung S5PC100 SoCs GPIO library | ||
109 | 100 | ||
110 | config GPIO_S5PV210 | 101 | config GPIO_S5PV210 |
111 | bool "Samsung S5PV210/S5PC110 GPIO library support" | 102 | def_bool y |
112 | default y if CPU_S5PV210 | 103 | depends on CPU_S5PV210 |
113 | depends on ARM | ||
114 | help | ||
115 | Say yes here to support Samsung S5PV210/S5PC110 SoCs GPIO library | ||
116 | 104 | ||
117 | config GPIO_PL061 | 105 | config GPIO_PL061 |
118 | bool "PrimeCell PL061 GPIO support" | 106 | bool "PrimeCell PL061 GPIO support" |
diff --git a/drivers/gpio/gpio-exynos4.c b/drivers/gpio/gpio-exynos4.c index d54ca6adb660..9029835112e7 100644 --- a/drivers/gpio/gpio-exynos4.c +++ b/drivers/gpio/gpio-exynos4.c | |||
@@ -21,16 +21,37 @@ | |||
21 | #include <plat/gpio-cfg.h> | 21 | #include <plat/gpio-cfg.h> |
22 | #include <plat/gpio-cfg-helpers.h> | 22 | #include <plat/gpio-cfg-helpers.h> |
23 | 23 | ||
24 | int s3c_gpio_setpull_exynos4(struct s3c_gpio_chip *chip, | ||
25 | unsigned int off, s3c_gpio_pull_t pull) | ||
26 | { | ||
27 | if (pull == S3C_GPIO_PULL_UP) | ||
28 | pull = 3; | ||
29 | |||
30 | return s3c_gpio_setpull_updown(chip, off, pull); | ||
31 | } | ||
32 | |||
33 | s3c_gpio_pull_t s3c_gpio_getpull_exynos4(struct s3c_gpio_chip *chip, | ||
34 | unsigned int off) | ||
35 | { | ||
36 | s3c_gpio_pull_t pull; | ||
37 | |||
38 | pull = s3c_gpio_getpull_updown(chip, off); | ||
39 | if (pull == 3) | ||
40 | pull = S3C_GPIO_PULL_UP; | ||
41 | |||
42 | return pull; | ||
43 | } | ||
44 | |||
24 | static struct s3c_gpio_cfg gpio_cfg = { | 45 | static struct s3c_gpio_cfg gpio_cfg = { |
25 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | 46 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, |
26 | .set_pull = s3c_gpio_setpull_updown, | 47 | .set_pull = s3c_gpio_setpull_exynos4, |
27 | .get_pull = s3c_gpio_getpull_updown, | 48 | .get_pull = s3c_gpio_getpull_exynos4, |
28 | }; | 49 | }; |
29 | 50 | ||
30 | static struct s3c_gpio_cfg gpio_cfg_noint = { | 51 | static struct s3c_gpio_cfg gpio_cfg_noint = { |
31 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, | 52 | .set_config = s3c_gpio_setcfg_s3c64xx_4bit, |
32 | .set_pull = s3c_gpio_setpull_updown, | 53 | .set_pull = s3c_gpio_setpull_exynos4, |
33 | .get_pull = s3c_gpio_getpull_updown, | 54 | .get_pull = s3c_gpio_getpull_exynos4, |
34 | }; | 55 | }; |
35 | 56 | ||
36 | /* | 57 | /* |
diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c index 6c51191da567..01f74a8459d9 100644 --- a/drivers/gpio/gpio-omap.c +++ b/drivers/gpio/gpio-omap.c | |||
@@ -432,7 +432,6 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | |||
432 | { | 432 | { |
433 | void __iomem *base = bank->base; | 433 | void __iomem *base = bank->base; |
434 | u32 gpio_bit = 1 << gpio; | 434 | u32 gpio_bit = 1 << gpio; |
435 | u32 val; | ||
436 | 435 | ||
437 | if (cpu_is_omap44xx()) { | 436 | if (cpu_is_omap44xx()) { |
438 | MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit, | 437 | MOD_REG_BIT(OMAP4_GPIO_LEVELDETECT0, gpio_bit, |
@@ -455,15 +454,8 @@ static inline void set_24xx_gpio_triggering(struct gpio_bank *bank, int gpio, | |||
455 | } | 454 | } |
456 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { | 455 | if (likely(!(bank->non_wakeup_gpios & gpio_bit))) { |
457 | if (cpu_is_omap44xx()) { | 456 | if (cpu_is_omap44xx()) { |
458 | if (trigger != 0) | 457 | MOD_REG_BIT(OMAP4_GPIO_IRQWAKEN0, gpio_bit, |
459 | __raw_writel(1 << gpio, bank->base+ | 458 | trigger != 0); |
460 | OMAP4_GPIO_IRQWAKEN0); | ||
461 | else { | ||
462 | val = __raw_readl(bank->base + | ||
463 | OMAP4_GPIO_IRQWAKEN0); | ||
464 | __raw_writel(val & (~(1 << gpio)), bank->base + | ||
465 | OMAP4_GPIO_IRQWAKEN0); | ||
466 | } | ||
467 | } else { | 459 | } else { |
468 | /* | 460 | /* |
469 | * GPIO wakeup request can only be generated on edge | 461 | * GPIO wakeup request can only be generated on edge |
@@ -1134,8 +1126,11 @@ static void gpio_irq_shutdown(struct irq_data *d) | |||
1134 | { | 1126 | { |
1135 | unsigned int gpio = d->irq - IH_GPIO_BASE; | 1127 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
1136 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); | 1128 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1129 | unsigned long flags; | ||
1137 | 1130 | ||
1131 | spin_lock_irqsave(&bank->lock, flags); | ||
1138 | _reset_gpio(bank, gpio); | 1132 | _reset_gpio(bank, gpio); |
1133 | spin_unlock_irqrestore(&bank->lock, flags); | ||
1139 | } | 1134 | } |
1140 | 1135 | ||
1141 | static void gpio_ack_irq(struct irq_data *d) | 1136 | static void gpio_ack_irq(struct irq_data *d) |
@@ -1150,9 +1145,12 @@ static void gpio_mask_irq(struct irq_data *d) | |||
1150 | { | 1145 | { |
1151 | unsigned int gpio = d->irq - IH_GPIO_BASE; | 1146 | unsigned int gpio = d->irq - IH_GPIO_BASE; |
1152 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); | 1147 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1148 | unsigned long flags; | ||
1153 | 1149 | ||
1150 | spin_lock_irqsave(&bank->lock, flags); | ||
1154 | _set_gpio_irqenable(bank, gpio, 0); | 1151 | _set_gpio_irqenable(bank, gpio, 0); |
1155 | _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); | 1152 | _set_gpio_triggering(bank, get_gpio_index(gpio), IRQ_TYPE_NONE); |
1153 | spin_unlock_irqrestore(&bank->lock, flags); | ||
1156 | } | 1154 | } |
1157 | 1155 | ||
1158 | static void gpio_unmask_irq(struct irq_data *d) | 1156 | static void gpio_unmask_irq(struct irq_data *d) |
@@ -1161,7 +1159,9 @@ static void gpio_unmask_irq(struct irq_data *d) | |||
1161 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); | 1159 | struct gpio_bank *bank = irq_data_get_irq_chip_data(d); |
1162 | unsigned int irq_mask = 1 << get_gpio_index(gpio); | 1160 | unsigned int irq_mask = 1 << get_gpio_index(gpio); |
1163 | u32 trigger = irqd_get_trigger_type(d); | 1161 | u32 trigger = irqd_get_trigger_type(d); |
1162 | unsigned long flags; | ||
1164 | 1163 | ||
1164 | spin_lock_irqsave(&bank->lock, flags); | ||
1165 | if (trigger) | 1165 | if (trigger) |
1166 | _set_gpio_triggering(bank, get_gpio_index(gpio), trigger); | 1166 | _set_gpio_triggering(bank, get_gpio_index(gpio), trigger); |
1167 | 1167 | ||
@@ -1173,6 +1173,7 @@ static void gpio_unmask_irq(struct irq_data *d) | |||
1173 | } | 1173 | } |
1174 | 1174 | ||
1175 | _set_gpio_irqenable(bank, gpio, 1); | 1175 | _set_gpio_irqenable(bank, gpio, 1); |
1176 | spin_unlock_irqrestore(&bank->lock, flags); | ||
1176 | } | 1177 | } |
1177 | 1178 | ||
1178 | static struct irq_chip gpio_irq_chip = { | 1179 | static struct irq_chip gpio_irq_chip = { |
@@ -1524,7 +1525,7 @@ static void omap_gpio_mod_init(struct gpio_bank *bank, int id) | |||
1524 | } | 1525 | } |
1525 | } | 1526 | } |
1526 | 1527 | ||
1527 | static void __init omap_gpio_chip_init(struct gpio_bank *bank) | 1528 | static void __devinit omap_gpio_chip_init(struct gpio_bank *bank) |
1528 | { | 1529 | { |
1529 | int j; | 1530 | int j; |
1530 | static int gpio; | 1531 | static int gpio; |
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 51c2257b11e6..4d46441cbe2d 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c | |||
@@ -776,7 +776,7 @@ static int i915_error_state(struct seq_file *m, void *unused) | |||
776 | seq_printf(m, " INSTPM: 0x%08x\n", error->instpm); | 776 | seq_printf(m, " INSTPM: 0x%08x\n", error->instpm); |
777 | seq_printf(m, " seqno: 0x%08x\n", error->seqno); | 777 | seq_printf(m, " seqno: 0x%08x\n", error->seqno); |
778 | 778 | ||
779 | for (i = 0; i < 16; i++) | 779 | for (i = 0; i < dev_priv->num_fence_regs; i++) |
780 | seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); | 780 | seq_printf(m, " fence[%d] = %08llx\n", i, error->fence[i]); |
781 | 781 | ||
782 | if (error->active_bo) | 782 | if (error->active_bo) |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ee660355ae68..f63ee162f124 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -716,6 +716,7 @@ typedef struct drm_i915_private { | |||
716 | struct intel_fbdev *fbdev; | 716 | struct intel_fbdev *fbdev; |
717 | 717 | ||
718 | struct drm_property *broadcast_rgb_property; | 718 | struct drm_property *broadcast_rgb_property; |
719 | struct drm_property *force_audio_property; | ||
719 | 720 | ||
720 | atomic_t forcewake_count; | 721 | atomic_t forcewake_count; |
721 | } drm_i915_private_t; | 722 | } drm_i915_private_t; |
@@ -909,13 +910,6 @@ struct drm_i915_file_private { | |||
909 | } mm; | 910 | } mm; |
910 | }; | 911 | }; |
911 | 912 | ||
912 | enum intel_chip_family { | ||
913 | CHIP_I8XX = 0x01, | ||
914 | CHIP_I9XX = 0x02, | ||
915 | CHIP_I915 = 0x04, | ||
916 | CHIP_I965 = 0x08, | ||
917 | }; | ||
918 | |||
919 | #define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info) | 913 | #define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info) |
920 | 914 | ||
921 | #define IS_I830(dev) ((dev)->pci_device == 0x3577) | 915 | #define IS_I830(dev) ((dev)->pci_device == 0x3577) |
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index 0b2e167d2bce..12d32579b951 100644 --- a/drivers/gpu/drm/i915/i915_gem.c +++ b/drivers/gpu/drm/i915/i915_gem.c | |||
@@ -354,7 +354,7 @@ i915_gem_shmem_pread_fast(struct drm_device *dev, | |||
354 | * page_offset = offset within page | 354 | * page_offset = offset within page |
355 | * page_length = bytes to copy for this page | 355 | * page_length = bytes to copy for this page |
356 | */ | 356 | */ |
357 | page_offset = offset & (PAGE_SIZE-1); | 357 | page_offset = offset_in_page(offset); |
358 | page_length = remain; | 358 | page_length = remain; |
359 | if ((page_offset + remain) > PAGE_SIZE) | 359 | if ((page_offset + remain) > PAGE_SIZE) |
360 | page_length = PAGE_SIZE - page_offset; | 360 | page_length = PAGE_SIZE - page_offset; |
@@ -453,9 +453,9 @@ i915_gem_shmem_pread_slow(struct drm_device *dev, | |||
453 | * data_page_offset = offset with data_page_index page. | 453 | * data_page_offset = offset with data_page_index page. |
454 | * page_length = bytes to copy for this page | 454 | * page_length = bytes to copy for this page |
455 | */ | 455 | */ |
456 | shmem_page_offset = offset & ~PAGE_MASK; | 456 | shmem_page_offset = offset_in_page(offset); |
457 | data_page_index = data_ptr / PAGE_SIZE - first_data_page; | 457 | data_page_index = data_ptr / PAGE_SIZE - first_data_page; |
458 | data_page_offset = data_ptr & ~PAGE_MASK; | 458 | data_page_offset = offset_in_page(data_ptr); |
459 | 459 | ||
460 | page_length = remain; | 460 | page_length = remain; |
461 | if ((shmem_page_offset + page_length) > PAGE_SIZE) | 461 | if ((shmem_page_offset + page_length) > PAGE_SIZE) |
@@ -638,8 +638,8 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, | |||
638 | * page_offset = offset within page | 638 | * page_offset = offset within page |
639 | * page_length = bytes to copy for this page | 639 | * page_length = bytes to copy for this page |
640 | */ | 640 | */ |
641 | page_base = (offset & ~(PAGE_SIZE-1)); | 641 | page_base = offset & PAGE_MASK; |
642 | page_offset = offset & (PAGE_SIZE-1); | 642 | page_offset = offset_in_page(offset); |
643 | page_length = remain; | 643 | page_length = remain; |
644 | if ((page_offset + remain) > PAGE_SIZE) | 644 | if ((page_offset + remain) > PAGE_SIZE) |
645 | page_length = PAGE_SIZE - page_offset; | 645 | page_length = PAGE_SIZE - page_offset; |
@@ -650,7 +650,6 @@ i915_gem_gtt_pwrite_fast(struct drm_device *dev, | |||
650 | */ | 650 | */ |
651 | if (fast_user_write(dev_priv->mm.gtt_mapping, page_base, | 651 | if (fast_user_write(dev_priv->mm.gtt_mapping, page_base, |
652 | page_offset, user_data, page_length)) | 652 | page_offset, user_data, page_length)) |
653 | |||
654 | return -EFAULT; | 653 | return -EFAULT; |
655 | 654 | ||
656 | remain -= page_length; | 655 | remain -= page_length; |
@@ -730,9 +729,9 @@ i915_gem_gtt_pwrite_slow(struct drm_device *dev, | |||
730 | * page_length = bytes to copy for this page | 729 | * page_length = bytes to copy for this page |
731 | */ | 730 | */ |
732 | gtt_page_base = offset & PAGE_MASK; | 731 | gtt_page_base = offset & PAGE_MASK; |
733 | gtt_page_offset = offset & ~PAGE_MASK; | 732 | gtt_page_offset = offset_in_page(offset); |
734 | data_page_index = data_ptr / PAGE_SIZE - first_data_page; | 733 | data_page_index = data_ptr / PAGE_SIZE - first_data_page; |
735 | data_page_offset = data_ptr & ~PAGE_MASK; | 734 | data_page_offset = offset_in_page(data_ptr); |
736 | 735 | ||
737 | page_length = remain; | 736 | page_length = remain; |
738 | if ((gtt_page_offset + page_length) > PAGE_SIZE) | 737 | if ((gtt_page_offset + page_length) > PAGE_SIZE) |
@@ -791,7 +790,7 @@ i915_gem_shmem_pwrite_fast(struct drm_device *dev, | |||
791 | * page_offset = offset within page | 790 | * page_offset = offset within page |
792 | * page_length = bytes to copy for this page | 791 | * page_length = bytes to copy for this page |
793 | */ | 792 | */ |
794 | page_offset = offset & (PAGE_SIZE-1); | 793 | page_offset = offset_in_page(offset); |
795 | page_length = remain; | 794 | page_length = remain; |
796 | if ((page_offset + remain) > PAGE_SIZE) | 795 | if ((page_offset + remain) > PAGE_SIZE) |
797 | page_length = PAGE_SIZE - page_offset; | 796 | page_length = PAGE_SIZE - page_offset; |
@@ -896,9 +895,9 @@ i915_gem_shmem_pwrite_slow(struct drm_device *dev, | |||
896 | * data_page_offset = offset with data_page_index page. | 895 | * data_page_offset = offset with data_page_index page. |
897 | * page_length = bytes to copy for this page | 896 | * page_length = bytes to copy for this page |
898 | */ | 897 | */ |
899 | shmem_page_offset = offset & ~PAGE_MASK; | 898 | shmem_page_offset = offset_in_page(offset); |
900 | data_page_index = data_ptr / PAGE_SIZE - first_data_page; | 899 | data_page_index = data_ptr / PAGE_SIZE - first_data_page; |
901 | data_page_offset = data_ptr & ~PAGE_MASK; | 900 | data_page_offset = offset_in_page(data_ptr); |
902 | 901 | ||
903 | page_length = remain; | 902 | page_length = remain; |
904 | if ((shmem_page_offset + page_length) > PAGE_SIZE) | 903 | if ((shmem_page_offset + page_length) > PAGE_SIZE) |
@@ -1450,8 +1449,9 @@ i915_gem_get_unfenced_gtt_alignment(struct drm_i915_gem_object *obj) | |||
1450 | * edge of an even tile row (where tile rows are counted as if the bo is | 1449 | * edge of an even tile row (where tile rows are counted as if the bo is |
1451 | * placed in a fenced gtt region). | 1450 | * placed in a fenced gtt region). |
1452 | */ | 1451 | */ |
1453 | if (IS_GEN2(dev) || | 1452 | if (IS_GEN2(dev)) |
1454 | (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev))) | 1453 | tile_height = 16; |
1454 | else if (obj->tiling_mode == I915_TILING_Y && HAS_128_BYTE_Y_TILING(dev)) | ||
1455 | tile_height = 32; | 1455 | tile_height = 32; |
1456 | else | 1456 | else |
1457 | tile_height = 8; | 1457 | tile_height = 8; |
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index b79619a7b788..b9fafe3b045b 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -517,7 +517,7 @@ irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS) | |||
517 | if (de_iir & DE_PIPEA_VBLANK_IVB) | 517 | if (de_iir & DE_PIPEA_VBLANK_IVB) |
518 | drm_handle_vblank(dev, 0); | 518 | drm_handle_vblank(dev, 0); |
519 | 519 | ||
520 | if (de_iir & DE_PIPEB_VBLANK_IVB); | 520 | if (de_iir & DE_PIPEB_VBLANK_IVB) |
521 | drm_handle_vblank(dev, 1); | 521 | drm_handle_vblank(dev, 1); |
522 | 522 | ||
523 | /* check event from PCH */ | 523 | /* check event from PCH */ |
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c index e93f93cc7e78..0979d8877880 100644 --- a/drivers/gpu/drm/i915/intel_crt.c +++ b/drivers/gpu/drm/i915/intel_crt.c | |||
@@ -288,6 +288,8 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector) | |||
288 | * This may be a DVI-I connector with a shared DDC | 288 | * This may be a DVI-I connector with a shared DDC |
289 | * link between analog and digital outputs, so we | 289 | * link between analog and digital outputs, so we |
290 | * have to check the EDID input spec of the attached device. | 290 | * have to check the EDID input spec of the attached device. |
291 | * | ||
292 | * On the other hand, what should we do if it is a broken EDID? | ||
291 | */ | 293 | */ |
292 | if (edid != NULL) { | 294 | if (edid != NULL) { |
293 | is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; | 295 | is_digital = edid->input & DRM_EDID_INPUT_DIGITAL; |
@@ -298,6 +300,8 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector) | |||
298 | if (!is_digital) { | 300 | if (!is_digital) { |
299 | DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); | 301 | DRM_DEBUG_KMS("CRT detected via DDC:0x50 [EDID]\n"); |
300 | return true; | 302 | return true; |
303 | } else { | ||
304 | DRM_DEBUG_KMS("CRT not detected via DDC:0x50 [EDID reports a digital panel]\n"); | ||
301 | } | 305 | } |
302 | } | 306 | } |
303 | 307 | ||
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index f553ddfdc168..81a9059b6a94 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -3983,54 +3983,6 @@ static void i830_update_wm(struct drm_device *dev) | |||
3983 | #define ILK_LP0_PLANE_LATENCY 700 | 3983 | #define ILK_LP0_PLANE_LATENCY 700 |
3984 | #define ILK_LP0_CURSOR_LATENCY 1300 | 3984 | #define ILK_LP0_CURSOR_LATENCY 1300 |
3985 | 3985 | ||
3986 | static bool ironlake_compute_wm0(struct drm_device *dev, | ||
3987 | int pipe, | ||
3988 | const struct intel_watermark_params *display, | ||
3989 | int display_latency_ns, | ||
3990 | const struct intel_watermark_params *cursor, | ||
3991 | int cursor_latency_ns, | ||
3992 | int *plane_wm, | ||
3993 | int *cursor_wm) | ||
3994 | { | ||
3995 | struct drm_crtc *crtc; | ||
3996 | int htotal, hdisplay, clock, pixel_size; | ||
3997 | int line_time_us, line_count; | ||
3998 | int entries, tlb_miss; | ||
3999 | |||
4000 | crtc = intel_get_crtc_for_pipe(dev, pipe); | ||
4001 | if (crtc->fb == NULL || !crtc->enabled) | ||
4002 | return false; | ||
4003 | |||
4004 | htotal = crtc->mode.htotal; | ||
4005 | hdisplay = crtc->mode.hdisplay; | ||
4006 | clock = crtc->mode.clock; | ||
4007 | pixel_size = crtc->fb->bits_per_pixel / 8; | ||
4008 | |||
4009 | /* Use the small buffer method to calculate plane watermark */ | ||
4010 | entries = ((clock * pixel_size / 1000) * display_latency_ns) / 1000; | ||
4011 | tlb_miss = display->fifo_size*display->cacheline_size - hdisplay * 8; | ||
4012 | if (tlb_miss > 0) | ||
4013 | entries += tlb_miss; | ||
4014 | entries = DIV_ROUND_UP(entries, display->cacheline_size); | ||
4015 | *plane_wm = entries + display->guard_size; | ||
4016 | if (*plane_wm > (int)display->max_wm) | ||
4017 | *plane_wm = display->max_wm; | ||
4018 | |||
4019 | /* Use the large buffer method to calculate cursor watermark */ | ||
4020 | line_time_us = ((htotal * 1000) / clock); | ||
4021 | line_count = (cursor_latency_ns / line_time_us + 1000) / 1000; | ||
4022 | entries = line_count * 64 * pixel_size; | ||
4023 | tlb_miss = cursor->fifo_size*cursor->cacheline_size - hdisplay * 8; | ||
4024 | if (tlb_miss > 0) | ||
4025 | entries += tlb_miss; | ||
4026 | entries = DIV_ROUND_UP(entries, cursor->cacheline_size); | ||
4027 | *cursor_wm = entries + cursor->guard_size; | ||
4028 | if (*cursor_wm > (int)cursor->max_wm) | ||
4029 | *cursor_wm = (int)cursor->max_wm; | ||
4030 | |||
4031 | return true; | ||
4032 | } | ||
4033 | |||
4034 | /* | 3986 | /* |
4035 | * Check the wm result. | 3987 | * Check the wm result. |
4036 | * | 3988 | * |
@@ -4139,12 +4091,12 @@ static void ironlake_update_wm(struct drm_device *dev) | |||
4139 | unsigned int enabled; | 4091 | unsigned int enabled; |
4140 | 4092 | ||
4141 | enabled = 0; | 4093 | enabled = 0; |
4142 | if (ironlake_compute_wm0(dev, 0, | 4094 | if (g4x_compute_wm0(dev, 0, |
4143 | &ironlake_display_wm_info, | 4095 | &ironlake_display_wm_info, |
4144 | ILK_LP0_PLANE_LATENCY, | 4096 | ILK_LP0_PLANE_LATENCY, |
4145 | &ironlake_cursor_wm_info, | 4097 | &ironlake_cursor_wm_info, |
4146 | ILK_LP0_CURSOR_LATENCY, | 4098 | ILK_LP0_CURSOR_LATENCY, |
4147 | &plane_wm, &cursor_wm)) { | 4099 | &plane_wm, &cursor_wm)) { |
4148 | I915_WRITE(WM0_PIPEA_ILK, | 4100 | I915_WRITE(WM0_PIPEA_ILK, |
4149 | (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); | 4101 | (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); |
4150 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" | 4102 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" |
@@ -4153,12 +4105,12 @@ static void ironlake_update_wm(struct drm_device *dev) | |||
4153 | enabled |= 1; | 4105 | enabled |= 1; |
4154 | } | 4106 | } |
4155 | 4107 | ||
4156 | if (ironlake_compute_wm0(dev, 1, | 4108 | if (g4x_compute_wm0(dev, 1, |
4157 | &ironlake_display_wm_info, | 4109 | &ironlake_display_wm_info, |
4158 | ILK_LP0_PLANE_LATENCY, | 4110 | ILK_LP0_PLANE_LATENCY, |
4159 | &ironlake_cursor_wm_info, | 4111 | &ironlake_cursor_wm_info, |
4160 | ILK_LP0_CURSOR_LATENCY, | 4112 | ILK_LP0_CURSOR_LATENCY, |
4161 | &plane_wm, &cursor_wm)) { | 4113 | &plane_wm, &cursor_wm)) { |
4162 | I915_WRITE(WM0_PIPEB_ILK, | 4114 | I915_WRITE(WM0_PIPEB_ILK, |
4163 | (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); | 4115 | (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); |
4164 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" | 4116 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" |
@@ -4223,10 +4175,10 @@ static void sandybridge_update_wm(struct drm_device *dev) | |||
4223 | unsigned int enabled; | 4175 | unsigned int enabled; |
4224 | 4176 | ||
4225 | enabled = 0; | 4177 | enabled = 0; |
4226 | if (ironlake_compute_wm0(dev, 0, | 4178 | if (g4x_compute_wm0(dev, 0, |
4227 | &sandybridge_display_wm_info, latency, | 4179 | &sandybridge_display_wm_info, latency, |
4228 | &sandybridge_cursor_wm_info, latency, | 4180 | &sandybridge_cursor_wm_info, latency, |
4229 | &plane_wm, &cursor_wm)) { | 4181 | &plane_wm, &cursor_wm)) { |
4230 | I915_WRITE(WM0_PIPEA_ILK, | 4182 | I915_WRITE(WM0_PIPEA_ILK, |
4231 | (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); | 4183 | (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); |
4232 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" | 4184 | DRM_DEBUG_KMS("FIFO watermarks For pipe A -" |
@@ -4235,10 +4187,10 @@ static void sandybridge_update_wm(struct drm_device *dev) | |||
4235 | enabled |= 1; | 4187 | enabled |= 1; |
4236 | } | 4188 | } |
4237 | 4189 | ||
4238 | if (ironlake_compute_wm0(dev, 1, | 4190 | if (g4x_compute_wm0(dev, 1, |
4239 | &sandybridge_display_wm_info, latency, | 4191 | &sandybridge_display_wm_info, latency, |
4240 | &sandybridge_cursor_wm_info, latency, | 4192 | &sandybridge_cursor_wm_info, latency, |
4241 | &plane_wm, &cursor_wm)) { | 4193 | &plane_wm, &cursor_wm)) { |
4242 | I915_WRITE(WM0_PIPEB_ILK, | 4194 | I915_WRITE(WM0_PIPEB_ILK, |
4243 | (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); | 4195 | (plane_wm << WM0_PIPE_PLANE_SHIFT) | cursor_wm); |
4244 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" | 4196 | DRM_DEBUG_KMS("FIFO watermarks For pipe B -" |
@@ -7675,6 +7627,7 @@ static void intel_init_display(struct drm_device *dev) | |||
7675 | dev_priv->display.update_wm = NULL; | 7627 | dev_priv->display.update_wm = NULL; |
7676 | } else | 7628 | } else |
7677 | dev_priv->display.update_wm = pineview_update_wm; | 7629 | dev_priv->display.update_wm = pineview_update_wm; |
7630 | dev_priv->display.init_clock_gating = gen3_init_clock_gating; | ||
7678 | } else if (IS_G4X(dev)) { | 7631 | } else if (IS_G4X(dev)) { |
7679 | dev_priv->display.update_wm = g4x_update_wm; | 7632 | dev_priv->display.update_wm = g4x_update_wm; |
7680 | dev_priv->display.init_clock_gating = g4x_init_clock_gating; | 7633 | dev_priv->display.init_clock_gating = g4x_init_clock_gating; |
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index a4d80314e7f8..391b55f1cc74 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c | |||
@@ -59,8 +59,6 @@ struct intel_dp { | |||
59 | bool is_pch_edp; | 59 | bool is_pch_edp; |
60 | uint8_t train_set[4]; | 60 | uint8_t train_set[4]; |
61 | uint8_t link_status[DP_LINK_STATUS_SIZE]; | 61 | uint8_t link_status[DP_LINK_STATUS_SIZE]; |
62 | |||
63 | struct drm_property *force_audio_property; | ||
64 | }; | 62 | }; |
65 | 63 | ||
66 | /** | 64 | /** |
@@ -1702,7 +1700,7 @@ intel_dp_set_property(struct drm_connector *connector, | |||
1702 | if (ret) | 1700 | if (ret) |
1703 | return ret; | 1701 | return ret; |
1704 | 1702 | ||
1705 | if (property == intel_dp->force_audio_property) { | 1703 | if (property == dev_priv->force_audio_property) { |
1706 | int i = val; | 1704 | int i = val; |
1707 | bool has_audio; | 1705 | bool has_audio; |
1708 | 1706 | ||
@@ -1841,16 +1839,7 @@ bool intel_dpd_is_edp(struct drm_device *dev) | |||
1841 | static void | 1839 | static void |
1842 | intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector) | 1840 | intel_dp_add_properties(struct intel_dp *intel_dp, struct drm_connector *connector) |
1843 | { | 1841 | { |
1844 | struct drm_device *dev = connector->dev; | 1842 | intel_attach_force_audio_property(connector); |
1845 | |||
1846 | intel_dp->force_audio_property = | ||
1847 | drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2); | ||
1848 | if (intel_dp->force_audio_property) { | ||
1849 | intel_dp->force_audio_property->values[0] = -1; | ||
1850 | intel_dp->force_audio_property->values[1] = 1; | ||
1851 | drm_connector_attach_property(connector, intel_dp->force_audio_property, 0); | ||
1852 | } | ||
1853 | |||
1854 | intel_attach_broadcast_rgb_property(connector); | 1843 | intel_attach_broadcast_rgb_property(connector); |
1855 | } | 1844 | } |
1856 | 1845 | ||
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index 831d7a4a0d18..9ffa61eb4d7e 100644 --- a/drivers/gpu/drm/i915/intel_drv.h +++ b/drivers/gpu/drm/i915/intel_drv.h | |||
@@ -236,6 +236,7 @@ struct intel_unpin_work { | |||
236 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); | 236 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); |
237 | extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus); | 237 | extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus); |
238 | 238 | ||
239 | extern void intel_attach_force_audio_property(struct drm_connector *connector); | ||
239 | extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); | 240 | extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); |
240 | 241 | ||
241 | extern void intel_crt_init(struct drm_device *dev); | 242 | extern void intel_crt_init(struct drm_device *dev); |
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c index f289b8642976..aa0a8e83142e 100644 --- a/drivers/gpu/drm/i915/intel_hdmi.c +++ b/drivers/gpu/drm/i915/intel_hdmi.c | |||
@@ -45,7 +45,6 @@ struct intel_hdmi { | |||
45 | bool has_hdmi_sink; | 45 | bool has_hdmi_sink; |
46 | bool has_audio; | 46 | bool has_audio; |
47 | int force_audio; | 47 | int force_audio; |
48 | struct drm_property *force_audio_property; | ||
49 | }; | 48 | }; |
50 | 49 | ||
51 | static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder) | 50 | static struct intel_hdmi *enc_to_intel_hdmi(struct drm_encoder *encoder) |
@@ -194,7 +193,7 @@ static int intel_hdmi_mode_valid(struct drm_connector *connector, | |||
194 | if (mode->clock > 165000) | 193 | if (mode->clock > 165000) |
195 | return MODE_CLOCK_HIGH; | 194 | return MODE_CLOCK_HIGH; |
196 | if (mode->clock < 20000) | 195 | if (mode->clock < 20000) |
197 | return MODE_CLOCK_HIGH; | 196 | return MODE_CLOCK_LOW; |
198 | 197 | ||
199 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) | 198 | if (mode->flags & DRM_MODE_FLAG_DBLSCAN) |
200 | return MODE_NO_DBLESCAN; | 199 | return MODE_NO_DBLESCAN; |
@@ -287,7 +286,7 @@ intel_hdmi_set_property(struct drm_connector *connector, | |||
287 | if (ret) | 286 | if (ret) |
288 | return ret; | 287 | return ret; |
289 | 288 | ||
290 | if (property == intel_hdmi->force_audio_property) { | 289 | if (property == dev_priv->force_audio_property) { |
291 | int i = val; | 290 | int i = val; |
292 | bool has_audio; | 291 | bool has_audio; |
293 | 292 | ||
@@ -365,16 +364,7 @@ static const struct drm_encoder_funcs intel_hdmi_enc_funcs = { | |||
365 | static void | 364 | static void |
366 | intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector) | 365 | intel_hdmi_add_properties(struct intel_hdmi *intel_hdmi, struct drm_connector *connector) |
367 | { | 366 | { |
368 | struct drm_device *dev = connector->dev; | 367 | intel_attach_force_audio_property(connector); |
369 | |||
370 | intel_hdmi->force_audio_property = | ||
371 | drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2); | ||
372 | if (intel_hdmi->force_audio_property) { | ||
373 | intel_hdmi->force_audio_property->values[0] = -1; | ||
374 | intel_hdmi->force_audio_property->values[1] = 1; | ||
375 | drm_connector_attach_property(connector, intel_hdmi->force_audio_property, 0); | ||
376 | } | ||
377 | |||
378 | intel_attach_broadcast_rgb_property(connector); | 368 | intel_attach_broadcast_rgb_property(connector); |
379 | } | 369 | } |
380 | 370 | ||
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c index 67cb076d271b..b28f7bd9f88a 100644 --- a/drivers/gpu/drm/i915/intel_lvds.c +++ b/drivers/gpu/drm/i915/intel_lvds.c | |||
@@ -727,6 +727,14 @@ static const struct dmi_system_id intel_no_lvds[] = { | |||
727 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), | 727 | DMI_MATCH(DMI_PRODUCT_NAME, "U800"), |
728 | }, | 728 | }, |
729 | }, | 729 | }, |
730 | { | ||
731 | .callback = intel_no_lvds_dmi_callback, | ||
732 | .ident = "Asus EeeBox PC EB1007", | ||
733 | .matches = { | ||
734 | DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer INC."), | ||
735 | DMI_MATCH(DMI_PRODUCT_NAME, "EB1007"), | ||
736 | }, | ||
737 | }, | ||
730 | 738 | ||
731 | { } /* terminating entry */ | 739 | { } /* terminating entry */ |
732 | }; | 740 | }; |
diff --git a/drivers/gpu/drm/i915/intel_modes.c b/drivers/gpu/drm/i915/intel_modes.c index 9034dd8f33c7..3b26a3ba02dd 100644 --- a/drivers/gpu/drm/i915/intel_modes.c +++ b/drivers/gpu/drm/i915/intel_modes.c | |||
@@ -81,6 +81,36 @@ int intel_ddc_get_modes(struct drm_connector *connector, | |||
81 | return ret; | 81 | return ret; |
82 | } | 82 | } |
83 | 83 | ||
84 | static const char *force_audio_names[] = { | ||
85 | "off", | ||
86 | "auto", | ||
87 | "on", | ||
88 | }; | ||
89 | |||
90 | void | ||
91 | intel_attach_force_audio_property(struct drm_connector *connector) | ||
92 | { | ||
93 | struct drm_device *dev = connector->dev; | ||
94 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
95 | struct drm_property *prop; | ||
96 | int i; | ||
97 | |||
98 | prop = dev_priv->force_audio_property; | ||
99 | if (prop == NULL) { | ||
100 | prop = drm_property_create(dev, DRM_MODE_PROP_ENUM, | ||
101 | "audio", | ||
102 | ARRAY_SIZE(force_audio_names)); | ||
103 | if (prop == NULL) | ||
104 | return; | ||
105 | |||
106 | for (i = 0; i < ARRAY_SIZE(force_audio_names); i++) | ||
107 | drm_property_add_enum(prop, i, i-1, force_audio_names[i]); | ||
108 | |||
109 | dev_priv->force_audio_property = prop; | ||
110 | } | ||
111 | drm_connector_attach_property(connector, prop, 0); | ||
112 | } | ||
113 | |||
84 | static const char *broadcast_rgb_names[] = { | 114 | static const char *broadcast_rgb_names[] = { |
85 | "Full", | 115 | "Full", |
86 | "Limited 16:235", | 116 | "Limited 16:235", |
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 754086f83941..30fe554d8936 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c | |||
@@ -148,8 +148,6 @@ struct intel_sdvo_connector { | |||
148 | int format_supported_num; | 148 | int format_supported_num; |
149 | struct drm_property *tv_format; | 149 | struct drm_property *tv_format; |
150 | 150 | ||
151 | struct drm_property *force_audio_property; | ||
152 | |||
153 | /* add the property for the SDVO-TV */ | 151 | /* add the property for the SDVO-TV */ |
154 | struct drm_property *left; | 152 | struct drm_property *left; |
155 | struct drm_property *right; | 153 | struct drm_property *right; |
@@ -1712,7 +1710,7 @@ intel_sdvo_set_property(struct drm_connector *connector, | |||
1712 | if (ret) | 1710 | if (ret) |
1713 | return ret; | 1711 | return ret; |
1714 | 1712 | ||
1715 | if (property == intel_sdvo_connector->force_audio_property) { | 1713 | if (property == dev_priv->force_audio_property) { |
1716 | int i = val; | 1714 | int i = val; |
1717 | bool has_audio; | 1715 | bool has_audio; |
1718 | 1716 | ||
@@ -2037,15 +2035,7 @@ intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector) | |||
2037 | { | 2035 | { |
2038 | struct drm_device *dev = connector->base.base.dev; | 2036 | struct drm_device *dev = connector->base.base.dev; |
2039 | 2037 | ||
2040 | connector->force_audio_property = | 2038 | intel_attach_force_audio_property(&connector->base.base); |
2041 | drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2); | ||
2042 | if (connector->force_audio_property) { | ||
2043 | connector->force_audio_property->values[0] = -1; | ||
2044 | connector->force_audio_property->values[1] = 1; | ||
2045 | drm_connector_attach_property(&connector->base.base, | ||
2046 | connector->force_audio_property, 0); | ||
2047 | } | ||
2048 | |||
2049 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) | 2039 | if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev)) |
2050 | intel_attach_broadcast_rgb_property(&connector->base.base); | 2040 | intel_attach_broadcast_rgb_property(&connector->base.base); |
2051 | } | 2041 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_hw.c b/drivers/gpu/drm/nouveau/nouveau_hw.c index 053edf9d2f67..ba896e54b799 100644 --- a/drivers/gpu/drm/nouveau/nouveau_hw.c +++ b/drivers/gpu/drm/nouveau/nouveau_hw.c | |||
@@ -900,6 +900,7 @@ nv_save_state_ext(struct drm_device *dev, int head, | |||
900 | } | 900 | } |
901 | /* NV11 and NV20 don't have this, they stop at 0x52. */ | 901 | /* NV11 and NV20 don't have this, they stop at 0x52. */ |
902 | if (nv_gf4_disp_arch(dev)) { | 902 | if (nv_gf4_disp_arch(dev)) { |
903 | rd_cio_state(dev, head, regp, NV_CIO_CRE_42); | ||
903 | rd_cio_state(dev, head, regp, NV_CIO_CRE_53); | 904 | rd_cio_state(dev, head, regp, NV_CIO_CRE_53); |
904 | rd_cio_state(dev, head, regp, NV_CIO_CRE_54); | 905 | rd_cio_state(dev, head, regp, NV_CIO_CRE_54); |
905 | 906 | ||
@@ -1003,6 +1004,7 @@ nv_load_state_ext(struct drm_device *dev, int head, | |||
1003 | nouveau_wait_eq(dev, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0); | 1004 | nouveau_wait_eq(dev, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0); |
1004 | } | 1005 | } |
1005 | 1006 | ||
1007 | wr_cio_state(dev, head, regp, NV_CIO_CRE_42); | ||
1006 | wr_cio_state(dev, head, regp, NV_CIO_CRE_53); | 1008 | wr_cio_state(dev, head, regp, NV_CIO_CRE_53); |
1007 | wr_cio_state(dev, head, regp, NV_CIO_CRE_54); | 1009 | wr_cio_state(dev, head, regp, NV_CIO_CRE_54); |
1008 | 1010 | ||
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c index 2960f583dc38..5ee14d216ce8 100644 --- a/drivers/gpu/drm/nouveau/nouveau_mem.c +++ b/drivers/gpu/drm/nouveau/nouveau_mem.c | |||
@@ -397,7 +397,7 @@ nouveau_mem_vram_init(struct drm_device *dev) | |||
397 | if (pci_dma_supported(dev->pdev, DMA_BIT_MASK(40))) | 397 | if (pci_dma_supported(dev->pdev, DMA_BIT_MASK(40))) |
398 | dma_bits = 40; | 398 | dma_bits = 40; |
399 | } else | 399 | } else |
400 | if (drm_pci_device_is_pcie(dev) && | 400 | if (0 && drm_pci_device_is_pcie(dev) && |
401 | dev_priv->chipset > 0x40 && | 401 | dev_priv->chipset > 0x40 && |
402 | dev_priv->chipset != 0x45) { | 402 | dev_priv->chipset != 0x45) { |
403 | if (pci_dma_supported(dev->pdev, DMA_BIT_MASK(39))) | 403 | if (pci_dma_supported(dev->pdev, DMA_BIT_MASK(39))) |
@@ -868,7 +868,9 @@ nouveau_gart_manager_del(struct ttm_mem_type_manager *man, | |||
868 | nouveau_vm_unmap(&node->tmp_vma); | 868 | nouveau_vm_unmap(&node->tmp_vma); |
869 | nouveau_vm_put(&node->tmp_vma); | 869 | nouveau_vm_put(&node->tmp_vma); |
870 | } | 870 | } |
871 | |||
871 | mem->mm_node = NULL; | 872 | mem->mm_node = NULL; |
873 | kfree(node); | ||
872 | } | 874 | } |
873 | 875 | ||
874 | static int | 876 | static int |
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c index c77111eca6ac..82fad914e648 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c | |||
@@ -458,7 +458,7 @@ nouveau_sgdma_init(struct drm_device *dev) | |||
458 | dev_priv->gart_info.type = NOUVEAU_GART_HW; | 458 | dev_priv->gart_info.type = NOUVEAU_GART_HW; |
459 | dev_priv->gart_info.func = &nv50_sgdma_backend; | 459 | dev_priv->gart_info.func = &nv50_sgdma_backend; |
460 | } else | 460 | } else |
461 | if (drm_pci_device_is_pcie(dev) && | 461 | if (0 && drm_pci_device_is_pcie(dev) && |
462 | dev_priv->chipset > 0x40 && dev_priv->chipset != 0x45) { | 462 | dev_priv->chipset > 0x40 && dev_priv->chipset != 0x45) { |
463 | if (nv44_graph_class(dev)) { | 463 | if (nv44_graph_class(dev)) { |
464 | dev_priv->gart_info.func = &nv44_sgdma_backend; | 464 | dev_priv->gart_info.func = &nv44_sgdma_backend; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c index 38ea662568c1..80218887e0a0 100644 --- a/drivers/gpu/drm/nouveau/nouveau_state.c +++ b/drivers/gpu/drm/nouveau/nouveau_state.c | |||
@@ -371,6 +371,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev) | |||
371 | engine->vram.flags_valid = nv50_vram_flags_valid; | 371 | engine->vram.flags_valid = nv50_vram_flags_valid; |
372 | break; | 372 | break; |
373 | case 0xC0: | 373 | case 0xC0: |
374 | case 0xD0: | ||
374 | engine->instmem.init = nvc0_instmem_init; | 375 | engine->instmem.init = nvc0_instmem_init; |
375 | engine->instmem.takedown = nvc0_instmem_takedown; | 376 | engine->instmem.takedown = nvc0_instmem_takedown; |
376 | engine->instmem.suspend = nvc0_instmem_suspend; | 377 | engine->instmem.suspend = nvc0_instmem_suspend; |
@@ -563,68 +564,68 @@ nouveau_card_init(struct drm_device *dev) | |||
563 | if (ret) | 564 | if (ret) |
564 | goto out_timer; | 565 | goto out_timer; |
565 | 566 | ||
566 | switch (dev_priv->card_type) { | 567 | if (!nouveau_noaccel) { |
567 | case NV_04: | 568 | switch (dev_priv->card_type) { |
568 | nv04_graph_create(dev); | 569 | case NV_04: |
569 | break; | 570 | nv04_graph_create(dev); |
570 | case NV_10: | 571 | break; |
571 | nv10_graph_create(dev); | 572 | case NV_10: |
572 | break; | 573 | nv10_graph_create(dev); |
573 | case NV_20: | 574 | break; |
574 | case NV_30: | 575 | case NV_20: |
575 | nv20_graph_create(dev); | 576 | case NV_30: |
576 | break; | 577 | nv20_graph_create(dev); |
577 | case NV_40: | 578 | break; |
578 | nv40_graph_create(dev); | 579 | case NV_40: |
579 | break; | 580 | nv40_graph_create(dev); |
580 | case NV_50: | 581 | break; |
581 | nv50_graph_create(dev); | 582 | case NV_50: |
582 | break; | 583 | nv50_graph_create(dev); |
583 | case NV_C0: | 584 | break; |
584 | nvc0_graph_create(dev); | 585 | case NV_C0: |
585 | break; | 586 | nvc0_graph_create(dev); |
586 | default: | 587 | break; |
587 | break; | 588 | default: |
588 | } | 589 | break; |
589 | 590 | } | |
590 | switch (dev_priv->chipset) { | ||
591 | case 0x84: | ||
592 | case 0x86: | ||
593 | case 0x92: | ||
594 | case 0x94: | ||
595 | case 0x96: | ||
596 | case 0xa0: | ||
597 | nv84_crypt_create(dev); | ||
598 | break; | ||
599 | } | ||
600 | 591 | ||
601 | switch (dev_priv->card_type) { | ||
602 | case NV_50: | ||
603 | switch (dev_priv->chipset) { | 592 | switch (dev_priv->chipset) { |
604 | case 0xa3: | 593 | case 0x84: |
605 | case 0xa5: | 594 | case 0x86: |
606 | case 0xa8: | 595 | case 0x92: |
607 | case 0xaf: | 596 | case 0x94: |
608 | nva3_copy_create(dev); | 597 | case 0x96: |
598 | case 0xa0: | ||
599 | nv84_crypt_create(dev); | ||
609 | break; | 600 | break; |
610 | } | 601 | } |
611 | break; | ||
612 | case NV_C0: | ||
613 | nvc0_copy_create(dev, 0); | ||
614 | nvc0_copy_create(dev, 1); | ||
615 | break; | ||
616 | default: | ||
617 | break; | ||
618 | } | ||
619 | 602 | ||
620 | if (dev_priv->card_type == NV_40) | 603 | switch (dev_priv->card_type) { |
621 | nv40_mpeg_create(dev); | 604 | case NV_50: |
622 | else | 605 | switch (dev_priv->chipset) { |
623 | if (dev_priv->card_type == NV_50 && | 606 | case 0xa3: |
624 | (dev_priv->chipset < 0x98 || dev_priv->chipset == 0xa0)) | 607 | case 0xa5: |
625 | nv50_mpeg_create(dev); | 608 | case 0xa8: |
609 | case 0xaf: | ||
610 | nva3_copy_create(dev); | ||
611 | break; | ||
612 | } | ||
613 | break; | ||
614 | case NV_C0: | ||
615 | nvc0_copy_create(dev, 0); | ||
616 | nvc0_copy_create(dev, 1); | ||
617 | break; | ||
618 | default: | ||
619 | break; | ||
620 | } | ||
621 | |||
622 | if (dev_priv->card_type == NV_40) | ||
623 | nv40_mpeg_create(dev); | ||
624 | else | ||
625 | if (dev_priv->card_type == NV_50 && | ||
626 | (dev_priv->chipset < 0x98 || dev_priv->chipset == 0xa0)) | ||
627 | nv50_mpeg_create(dev); | ||
626 | 628 | ||
627 | if (!nouveau_noaccel) { | ||
628 | for (e = 0; e < NVOBJ_ENGINE_NR; e++) { | 629 | for (e = 0; e < NVOBJ_ENGINE_NR; e++) { |
629 | if (dev_priv->eng[e]) { | 630 | if (dev_priv->eng[e]) { |
630 | ret = dev_priv->eng[e]->init(dev, e); | 631 | ret = dev_priv->eng[e]->init(dev, e); |
@@ -922,6 +923,7 @@ int nouveau_load(struct drm_device *dev, unsigned long flags) | |||
922 | dev_priv->card_type = NV_50; | 923 | dev_priv->card_type = NV_50; |
923 | break; | 924 | break; |
924 | case 0xc0: | 925 | case 0xc0: |
926 | case 0xd0: | ||
925 | dev_priv->card_type = NV_C0; | 927 | dev_priv->card_type = NV_C0; |
926 | break; | 928 | break; |
927 | default: | 929 | default: |
diff --git a/drivers/gpu/drm/nouveau/nouveau_vm.c b/drivers/gpu/drm/nouveau/nouveau_vm.c index 0059e6f58a8b..519a6b4bba46 100644 --- a/drivers/gpu/drm/nouveau/nouveau_vm.c +++ b/drivers/gpu/drm/nouveau/nouveau_vm.c | |||
@@ -58,6 +58,7 @@ nouveau_vm_map_at(struct nouveau_vma *vma, u64 delta, struct nouveau_mem *node) | |||
58 | num -= len; | 58 | num -= len; |
59 | pte += len; | 59 | pte += len; |
60 | if (unlikely(end >= max)) { | 60 | if (unlikely(end >= max)) { |
61 | phys += len << (bits + 12); | ||
61 | pde++; | 62 | pde++; |
62 | pte = 0; | 63 | pte = 0; |
63 | } | 64 | } |
diff --git a/drivers/gpu/drm/nouveau/nv04_crtc.c b/drivers/gpu/drm/nouveau/nv04_crtc.c index 3c78bc81357e..f1a3ae491995 100644 --- a/drivers/gpu/drm/nouveau/nv04_crtc.c +++ b/drivers/gpu/drm/nouveau/nv04_crtc.c | |||
@@ -376,7 +376,10 @@ nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode) | |||
376 | */ | 376 | */ |
377 | 377 | ||
378 | /* framebuffer can be larger than crtc scanout area. */ | 378 | /* framebuffer can be larger than crtc scanout area. */ |
379 | regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); | 379 | regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = |
380 | XLATE(fb->pitch / 8, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); | ||
381 | regp->CRTC[NV_CIO_CRE_42] = | ||
382 | XLATE(fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11); | ||
380 | regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ? | 383 | regp->CRTC[NV_CIO_CRE_RPC1_INDEX] = mode->crtc_hdisplay < 1280 ? |
381 | MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00; | 384 | MASK(NV_CIO_CRE_RPC1_LARGE) : 0x00; |
382 | regp->CRTC[NV_CIO_CRE_LSR_INDEX] = XLATE(horizBlankEnd, 6, NV_CIO_CRE_LSR_HBE_6) | | 385 | regp->CRTC[NV_CIO_CRE_LSR_INDEX] = XLATE(horizBlankEnd, 6, NV_CIO_CRE_LSR_HBE_6) | |
@@ -824,8 +827,11 @@ nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, | |||
824 | regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitch >> 3; | 827 | regp->CRTC[NV_CIO_CR_OFFSET_INDEX] = drm_fb->pitch >> 3; |
825 | regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = | 828 | regp->CRTC[NV_CIO_CRE_RPC0_INDEX] = |
826 | XLATE(drm_fb->pitch >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); | 829 | XLATE(drm_fb->pitch >> 3, 8, NV_CIO_CRE_RPC0_OFFSET_10_8); |
830 | regp->CRTC[NV_CIO_CRE_42] = | ||
831 | XLATE(drm_fb->pitch / 8, 11, NV_CIO_CRE_42_OFFSET_11); | ||
827 | crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX); | 832 | crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_RPC0_INDEX); |
828 | crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX); | 833 | crtc_wr_cio_state(crtc, regp, NV_CIO_CR_OFFSET_INDEX); |
834 | crtc_wr_cio_state(crtc, regp, NV_CIO_CRE_42); | ||
829 | 835 | ||
830 | /* Update the framebuffer location. */ | 836 | /* Update the framebuffer location. */ |
831 | regp->fb_start = nv_crtc->fb.offset & ~3; | 837 | regp->fb_start = nv_crtc->fb.offset & ~3; |
diff --git a/drivers/gpu/drm/nouveau/nvreg.h b/drivers/gpu/drm/nouveau/nvreg.h index fe0f253089ac..bbfb1a68fb11 100644 --- a/drivers/gpu/drm/nouveau/nvreg.h +++ b/drivers/gpu/drm/nouveau/nvreg.h | |||
@@ -277,6 +277,8 @@ | |||
277 | # define NV_CIO_CRE_EBR_VDE_11 2:2 | 277 | # define NV_CIO_CRE_EBR_VDE_11 2:2 |
278 | # define NV_CIO_CRE_EBR_VRS_11 4:4 | 278 | # define NV_CIO_CRE_EBR_VRS_11 4:4 |
279 | # define NV_CIO_CRE_EBR_VBS_11 6:6 | 279 | # define NV_CIO_CRE_EBR_VBS_11 6:6 |
280 | # define NV_CIO_CRE_42 0x42 | ||
281 | # define NV_CIO_CRE_42_OFFSET_11 6:6 | ||
280 | # define NV_CIO_CRE_43 0x43 | 282 | # define NV_CIO_CRE_43 0x43 |
281 | # define NV_CIO_CRE_44 0x44 /* head control */ | 283 | # define NV_CIO_CRE_44 0x44 /* head control */ |
282 | # define NV_CIO_CRE_CSB 0x45 /* colour saturation boost */ | 284 | # define NV_CIO_CRE_CSB 0x45 /* colour saturation boost */ |
diff --git a/drivers/gpu/drm/radeon/Kconfig b/drivers/gpu/drm/radeon/Kconfig index 9746fee59f56..ea92bbe3ed37 100644 --- a/drivers/gpu/drm/radeon/Kconfig +++ b/drivers/gpu/drm/radeon/Kconfig | |||
@@ -28,11 +28,4 @@ config DRM_RADEON_KMS | |||
28 | The kernel will also perform security check on command stream | 28 | The kernel will also perform security check on command stream |
29 | provided by the user, we want to catch and forbid any illegal use | 29 | provided by the user, we want to catch and forbid any illegal use |
30 | of the GPU such as DMA into random system memory or into memory | 30 | of the GPU such as DMA into random system memory or into memory |
31 | not owned by the process supplying the command stream. This part | 31 | not owned by the process supplying the command stream. |
32 | of the code is still incomplete and this why we propose that patch | ||
33 | as a staging driver addition, future security might forbid current | ||
34 | experimental userspace to run. | ||
35 | |||
36 | This code support the following hardware : R1XX,R2XX,R3XX,R4XX,R5XX | ||
37 | (radeon up to X1950). Works is underway to provide support for R6XX, | ||
38 | R7XX and newer hardware (radeon from HD2XXX to HD4XXX). | ||
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index ec848787d7d9..84a69e7fa11e 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -1045,7 +1045,7 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc, | |||
1045 | uint64_t fb_location; | 1045 | uint64_t fb_location; |
1046 | uint32_t fb_format, fb_pitch_pixels, tiling_flags; | 1046 | uint32_t fb_format, fb_pitch_pixels, tiling_flags; |
1047 | u32 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_NONE); | 1047 | u32 fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_NONE); |
1048 | u32 tmp; | 1048 | u32 tmp, viewport_w, viewport_h; |
1049 | int r; | 1049 | int r; |
1050 | 1050 | ||
1051 | /* no fb bound */ | 1051 | /* no fb bound */ |
@@ -1171,8 +1171,10 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc, | |||
1171 | y &= ~1; | 1171 | y &= ~1; |
1172 | WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset, | 1172 | WREG32(EVERGREEN_VIEWPORT_START + radeon_crtc->crtc_offset, |
1173 | (x << 16) | y); | 1173 | (x << 16) | y); |
1174 | viewport_w = crtc->mode.hdisplay; | ||
1175 | viewport_h = (crtc->mode.vdisplay + 1) & ~1; | ||
1174 | WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset, | 1176 | WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset, |
1175 | (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); | 1177 | (viewport_w << 16) | viewport_h); |
1176 | 1178 | ||
1177 | /* pageflip setup */ | 1179 | /* pageflip setup */ |
1178 | /* make sure flip is at vb rather than hb */ | 1180 | /* make sure flip is at vb rather than hb */ |
@@ -1213,7 +1215,7 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc, | |||
1213 | uint64_t fb_location; | 1215 | uint64_t fb_location; |
1214 | uint32_t fb_format, fb_pitch_pixels, tiling_flags; | 1216 | uint32_t fb_format, fb_pitch_pixels, tiling_flags; |
1215 | u32 fb_swap = R600_D1GRPH_SWAP_ENDIAN_NONE; | 1217 | u32 fb_swap = R600_D1GRPH_SWAP_ENDIAN_NONE; |
1216 | u32 tmp; | 1218 | u32 tmp, viewport_w, viewport_h; |
1217 | int r; | 1219 | int r; |
1218 | 1220 | ||
1219 | /* no fb bound */ | 1221 | /* no fb bound */ |
@@ -1338,8 +1340,10 @@ static int avivo_crtc_do_set_base(struct drm_crtc *crtc, | |||
1338 | y &= ~1; | 1340 | y &= ~1; |
1339 | WREG32(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset, | 1341 | WREG32(AVIVO_D1MODE_VIEWPORT_START + radeon_crtc->crtc_offset, |
1340 | (x << 16) | y); | 1342 | (x << 16) | y); |
1343 | viewport_w = crtc->mode.hdisplay; | ||
1344 | viewport_h = (crtc->mode.vdisplay + 1) & ~1; | ||
1341 | WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset, | 1345 | WREG32(AVIVO_D1MODE_VIEWPORT_SIZE + radeon_crtc->crtc_offset, |
1342 | (crtc->mode.hdisplay << 16) | crtc->mode.vdisplay); | 1346 | (viewport_w << 16) | viewport_h); |
1343 | 1347 | ||
1344 | /* pageflip setup */ | 1348 | /* pageflip setup */ |
1345 | /* make sure flip is at vb rather than hb */ | 1349 | /* make sure flip is at vb rather than hb */ |
diff --git a/drivers/gpu/drm/radeon/cayman_blit_shaders.c b/drivers/gpu/drm/radeon/cayman_blit_shaders.c index e148ab04b80b..7b4eeb7b4a8c 100644 --- a/drivers/gpu/drm/radeon/cayman_blit_shaders.c +++ b/drivers/gpu/drm/radeon/cayman_blit_shaders.c | |||
@@ -39,17 +39,335 @@ | |||
39 | 39 | ||
40 | const u32 cayman_default_state[] = | 40 | const u32 cayman_default_state[] = |
41 | { | 41 | { |
42 | /* XXX fill in additional blit state */ | 42 | 0xc0066900, |
43 | 0x00000000, | ||
44 | 0x00000060, /* DB_RENDER_CONTROL */ | ||
45 | 0x00000000, /* DB_COUNT_CONTROL */ | ||
46 | 0x00000000, /* DB_DEPTH_VIEW */ | ||
47 | 0x0000002a, /* DB_RENDER_OVERRIDE */ | ||
48 | 0x00000000, /* DB_RENDER_OVERRIDE2 */ | ||
49 | 0x00000000, /* DB_HTILE_DATA_BASE */ | ||
43 | 50 | ||
44 | 0xc0026900, | 51 | 0xc0026900, |
45 | 0x00000316, | 52 | 0x0000000a, |
46 | 0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */ | 53 | 0x00000000, /* DB_STENCIL_CLEAR */ |
47 | 0x00000010, /* */ | 54 | 0x00000000, /* DB_DEPTH_CLEAR */ |
55 | |||
56 | 0xc0036900, | ||
57 | 0x0000000f, | ||
58 | 0x00000000, /* DB_DEPTH_INFO */ | ||
59 | 0x00000000, /* DB_Z_INFO */ | ||
60 | 0x00000000, /* DB_STENCIL_INFO */ | ||
61 | |||
62 | 0xc0016900, | ||
63 | 0x00000080, | ||
64 | 0x00000000, /* PA_SC_WINDOW_OFFSET */ | ||
65 | |||
66 | 0xc00d6900, | ||
67 | 0x00000083, | ||
68 | 0x0000ffff, /* PA_SC_CLIPRECT_RULE */ | ||
69 | 0x00000000, /* PA_SC_CLIPRECT_0_TL */ | ||
70 | 0x20002000, /* PA_SC_CLIPRECT_0_BR */ | ||
71 | 0x00000000, | ||
72 | 0x20002000, | ||
73 | 0x00000000, | ||
74 | 0x20002000, | ||
75 | 0x00000000, | ||
76 | 0x20002000, | ||
77 | 0xaaaaaaaa, /* PA_SC_EDGERULE */ | ||
78 | 0x00000000, /* PA_SU_HARDWARE_SCREEN_OFFSET */ | ||
79 | 0x0000000f, /* CB_TARGET_MASK */ | ||
80 | 0x0000000f, /* CB_SHADER_MASK */ | ||
81 | |||
82 | 0xc0226900, | ||
83 | 0x00000094, | ||
84 | 0x80000000, /* PA_SC_VPORT_SCISSOR_0_TL */ | ||
85 | 0x20002000, /* PA_SC_VPORT_SCISSOR_0_BR */ | ||
86 | 0x80000000, | ||
87 | 0x20002000, | ||
88 | 0x80000000, | ||
89 | 0x20002000, | ||
90 | 0x80000000, | ||
91 | 0x20002000, | ||
92 | 0x80000000, | ||
93 | 0x20002000, | ||
94 | 0x80000000, | ||
95 | 0x20002000, | ||
96 | 0x80000000, | ||
97 | 0x20002000, | ||
98 | 0x80000000, | ||
99 | 0x20002000, | ||
100 | 0x80000000, | ||
101 | 0x20002000, | ||
102 | 0x80000000, | ||
103 | 0x20002000, | ||
104 | 0x80000000, | ||
105 | 0x20002000, | ||
106 | 0x80000000, | ||
107 | 0x20002000, | ||
108 | 0x80000000, | ||
109 | 0x20002000, | ||
110 | 0x80000000, | ||
111 | 0x20002000, | ||
112 | 0x80000000, | ||
113 | 0x20002000, | ||
114 | 0x80000000, | ||
115 | 0x20002000, | ||
116 | 0x00000000, /* PA_SC_VPORT_ZMIN_0 */ | ||
117 | 0x3f800000, /* PA_SC_VPORT_ZMAX_0 */ | ||
118 | |||
119 | 0xc0016900, | ||
120 | 0x000000d4, | ||
121 | 0x00000000, /* SX_MISC */ | ||
48 | 122 | ||
49 | 0xc0026900, | 123 | 0xc0026900, |
50 | 0x000000d9, | 124 | 0x000000d9, |
51 | 0x00000000, /* CP_RINGID */ | 125 | 0x00000000, /* CP_RINGID */ |
52 | 0x00000000, /* CP_VMID */ | 126 | 0x00000000, /* CP_VMID */ |
127 | |||
128 | 0xc0096900, | ||
129 | 0x00000100, | ||
130 | 0x00ffffff, /* VGT_MAX_VTX_INDX */ | ||
131 | 0x00000000, /* VGT_MIN_VTX_INDX */ | ||
132 | 0x00000000, /* VGT_INDX_OFFSET */ | ||
133 | 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_INDX */ | ||
134 | 0x00000000, /* SX_ALPHA_TEST_CONTROL */ | ||
135 | 0x00000000, /* CB_BLEND_RED */ | ||
136 | 0x00000000, /* CB_BLEND_GREEN */ | ||
137 | 0x00000000, /* CB_BLEND_BLUE */ | ||
138 | 0x00000000, /* CB_BLEND_ALPHA */ | ||
139 | |||
140 | 0xc0016900, | ||
141 | 0x00000187, | ||
142 | 0x00000100, /* SPI_VS_OUT_ID_0 */ | ||
143 | |||
144 | 0xc0026900, | ||
145 | 0x00000191, | ||
146 | 0x00000100, /* SPI_PS_INPUT_CNTL_0 */ | ||
147 | 0x00000101, /* SPI_PS_INPUT_CNTL_1 */ | ||
148 | |||
149 | 0xc0016900, | ||
150 | 0x000001b1, | ||
151 | 0x00000000, /* SPI_VS_OUT_CONFIG */ | ||
152 | |||
153 | 0xc0106900, | ||
154 | 0x000001b3, | ||
155 | 0x20000001, /* SPI_PS_IN_CONTROL_0 */ | ||
156 | 0x00000000, /* SPI_PS_IN_CONTROL_1 */ | ||
157 | 0x00000000, /* SPI_INTERP_CONTROL_0 */ | ||
158 | 0x00000000, /* SPI_INPUT_Z */ | ||
159 | 0x00000000, /* SPI_FOG_CNTL */ | ||
160 | 0x00100000, /* SPI_BARYC_CNTL */ | ||
161 | 0x00000000, /* SPI_PS_IN_CONTROL_2 */ | ||
162 | 0x00000000, /* SPI_COMPUTE_INPUT_CNTL */ | ||
163 | 0x00000000, /* SPI_COMPUTE_NUM_THREAD_X */ | ||
164 | 0x00000000, /* SPI_COMPUTE_NUM_THREAD_Y */ | ||
165 | 0x00000000, /* SPI_COMPUTE_NUM_THREAD_Z */ | ||
166 | 0x00000000, /* SPI_GPR_MGMT */ | ||
167 | 0x00000000, /* SPI_LDS_MGMT */ | ||
168 | 0x00000000, /* SPI_STACK_MGMT */ | ||
169 | 0x00000000, /* SPI_WAVE_MGMT_1 */ | ||
170 | 0x00000000, /* SPI_WAVE_MGMT_2 */ | ||
171 | |||
172 | 0xc0016900, | ||
173 | 0x000001e0, | ||
174 | 0x00000000, /* CB_BLEND0_CONTROL */ | ||
175 | |||
176 | 0xc00e6900, | ||
177 | 0x00000200, | ||
178 | 0x00000000, /* DB_DEPTH_CONTROL */ | ||
179 | 0x00000000, /* DB_EQAA */ | ||
180 | 0x00cc0010, /* CB_COLOR_CONTROL */ | ||
181 | 0x00000210, /* DB_SHADER_CONTROL */ | ||
182 | 0x00010000, /* PA_CL_CLIP_CNTL */ | ||
183 | 0x00000004, /* PA_SU_SC_MODE_CNTL */ | ||
184 | 0x00000100, /* PA_CL_VTE_CNTL */ | ||
185 | 0x00000000, /* PA_CL_VS_OUT_CNTL */ | ||
186 | 0x00000000, /* PA_CL_NANINF_CNTL */ | ||
187 | 0x00000000, /* PA_SU_LINE_STIPPLE_CNTL */ | ||
188 | 0x00000000, /* PA_SU_LINE_STIPPLE_SCALE */ | ||
189 | 0x00000000, /* PA_SU_PRIM_FILTER_CNTL */ | ||
190 | 0x00000000, /* */ | ||
191 | 0x00000000, /* */ | ||
192 | |||
193 | 0xc0026900, | ||
194 | 0x00000229, | ||
195 | 0x00000000, /* SQ_PGM_START_FS */ | ||
196 | 0x00000000, | ||
197 | |||
198 | 0xc0016900, | ||
199 | 0x0000023b, | ||
200 | 0x00000000, /* SQ_LDS_ALLOC_PS */ | ||
201 | |||
202 | 0xc0066900, | ||
203 | 0x00000240, | ||
204 | 0x00000000, /* SQ_ESGS_RING_ITEMSIZE */ | ||
205 | 0x00000000, | ||
206 | 0x00000000, | ||
207 | 0x00000000, | ||
208 | 0x00000000, | ||
209 | 0x00000000, | ||
210 | |||
211 | 0xc0046900, | ||
212 | 0x00000247, | ||
213 | 0x00000000, /* SQ_GS_VERT_ITEMSIZE */ | ||
214 | 0x00000000, | ||
215 | 0x00000000, | ||
216 | 0x00000000, | ||
217 | |||
218 | 0xc0116900, | ||
219 | 0x00000280, | ||
220 | 0x00000000, /* PA_SU_POINT_SIZE */ | ||
221 | 0x00000000, /* PA_SU_POINT_MINMAX */ | ||
222 | 0x00000008, /* PA_SU_LINE_CNTL */ | ||
223 | 0x00000000, /* PA_SC_LINE_STIPPLE */ | ||
224 | 0x00000000, /* VGT_OUTPUT_PATH_CNTL */ | ||
225 | 0x00000000, /* VGT_HOS_CNTL */ | ||
226 | 0x00000000, | ||
227 | 0x00000000, | ||
228 | 0x00000000, | ||
229 | 0x00000000, | ||
230 | 0x00000000, | ||
231 | 0x00000000, | ||
232 | 0x00000000, | ||
233 | 0x00000000, | ||
234 | 0x00000000, | ||
235 | 0x00000000, | ||
236 | 0x00000000, /* VGT_GS_MODE */ | ||
237 | |||
238 | 0xc0026900, | ||
239 | 0x00000292, | ||
240 | 0x00000000, /* PA_SC_MODE_CNTL_0 */ | ||
241 | 0x00000000, /* PA_SC_MODE_CNTL_1 */ | ||
242 | |||
243 | 0xc0016900, | ||
244 | 0x000002a1, | ||
245 | 0x00000000, /* VGT_PRIMITIVEID_EN */ | ||
246 | |||
247 | 0xc0016900, | ||
248 | 0x000002a5, | ||
249 | 0x00000000, /* VGT_MULTI_PRIM_IB_RESET_EN */ | ||
250 | |||
251 | 0xc0026900, | ||
252 | 0x000002a8, | ||
253 | 0x00000000, /* VGT_INSTANCE_STEP_RATE_0 */ | ||
254 | 0x00000000, | ||
255 | |||
256 | 0xc0026900, | ||
257 | 0x000002ad, | ||
258 | 0x00000000, /* VGT_REUSE_OFF */ | ||
259 | 0x00000000, | ||
260 | |||
261 | 0xc0016900, | ||
262 | 0x000002d5, | ||
263 | 0x00000000, /* VGT_SHADER_STAGES_EN */ | ||
264 | |||
265 | 0xc0016900, | ||
266 | 0x000002dc, | ||
267 | 0x0000aa00, /* DB_ALPHA_TO_MASK */ | ||
268 | |||
269 | 0xc0066900, | ||
270 | 0x000002de, | ||
271 | 0x00000000, /* PA_SU_POLY_OFFSET_DB_FMT_CNTL */ | ||
272 | 0x00000000, | ||
273 | 0x00000000, | ||
274 | 0x00000000, | ||
275 | 0x00000000, | ||
276 | 0x00000000, | ||
277 | |||
278 | 0xc0026900, | ||
279 | 0x000002e5, | ||
280 | 0x00000000, /* VGT_STRMOUT_CONFIG */ | ||
281 | 0x00000000, | ||
282 | |||
283 | 0xc01b6900, | ||
284 | 0x000002f5, | ||
285 | 0x76543210, /* PA_SC_CENTROID_PRIORITY_0 */ | ||
286 | 0xfedcba98, /* PA_SC_CENTROID_PRIORITY_1 */ | ||
287 | 0x00000000, /* PA_SC_LINE_CNTL */ | ||
288 | 0x00000000, /* PA_SC_AA_CONFIG */ | ||
289 | 0x00000005, /* PA_SU_VTX_CNTL */ | ||
290 | 0x3f800000, /* PA_CL_GB_VERT_CLIP_ADJ */ | ||
291 | 0x3f800000, /* PA_CL_GB_VERT_DISC_ADJ */ | ||
292 | 0x3f800000, /* PA_CL_GB_HORZ_CLIP_ADJ */ | ||
293 | 0x3f800000, /* PA_CL_GB_HORZ_DISC_ADJ */ | ||
294 | 0x00000000, /* PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 */ | ||
295 | 0x00000000, | ||
296 | 0x00000000, | ||
297 | 0x00000000, | ||
298 | 0x00000000, | ||
299 | 0x00000000, | ||
300 | 0x00000000, | ||
301 | 0x00000000, | ||
302 | 0x00000000, | ||
303 | 0x00000000, | ||
304 | 0x00000000, | ||
305 | 0x00000000, | ||
306 | 0x00000000, | ||
307 | 0x00000000, | ||
308 | 0x00000000, | ||
309 | 0x00000000, | ||
310 | 0xffffffff, /* PA_SC_AA_MASK_X0Y0_X1Y0 */ | ||
311 | 0xffffffff, | ||
312 | |||
313 | 0xc0026900, | ||
314 | 0x00000316, | ||
315 | 0x0000000e, /* VGT_VERTEX_REUSE_BLOCK_CNTL */ | ||
316 | 0x00000010, /* */ | ||
317 | }; | ||
318 | |||
319 | const u32 cayman_vs[] = | ||
320 | { | ||
321 | 0x00000004, | ||
322 | 0x80400400, | ||
323 | 0x0000a03c, | ||
324 | 0x95000688, | ||
325 | 0x00004000, | ||
326 | 0x15000688, | ||
327 | 0x00000000, | ||
328 | 0x88000000, | ||
329 | 0x04000000, | ||
330 | 0x67961001, | ||
331 | #ifdef __BIG_ENDIAN | ||
332 | 0x00020000, | ||
333 | #else | ||
334 | 0x00000000, | ||
335 | #endif | ||
336 | 0x00000000, | ||
337 | 0x04000000, | ||
338 | 0x67961000, | ||
339 | #ifdef __BIG_ENDIAN | ||
340 | 0x00020008, | ||
341 | #else | ||
342 | 0x00000008, | ||
343 | #endif | ||
344 | 0x00000000, | ||
345 | }; | ||
346 | |||
347 | const u32 cayman_ps[] = | ||
348 | { | ||
349 | 0x00000004, | ||
350 | 0xa00c0000, | ||
351 | 0x00000008, | ||
352 | 0x80400000, | ||
353 | 0x00000000, | ||
354 | 0x95000688, | ||
355 | 0x00000000, | ||
356 | 0x88000000, | ||
357 | 0x00380400, | ||
358 | 0x00146b10, | ||
359 | 0x00380000, | ||
360 | 0x20146b10, | ||
361 | 0x00380400, | ||
362 | 0x40146b00, | ||
363 | 0x80380000, | ||
364 | 0x60146b00, | ||
365 | 0x00000010, | ||
366 | 0x000d1000, | ||
367 | 0xb0800000, | ||
368 | 0x00000000, | ||
53 | }; | 369 | }; |
54 | 370 | ||
371 | const u32 cayman_ps_size = ARRAY_SIZE(cayman_ps); | ||
372 | const u32 cayman_vs_size = ARRAY_SIZE(cayman_vs); | ||
55 | const u32 cayman_default_size = ARRAY_SIZE(cayman_default_state); | 373 | const u32 cayman_default_size = ARRAY_SIZE(cayman_default_state); |
diff --git a/drivers/gpu/drm/radeon/cayman_blit_shaders.h b/drivers/gpu/drm/radeon/cayman_blit_shaders.h index 33b75e5d0fa4..f5d0e9a60267 100644 --- a/drivers/gpu/drm/radeon/cayman_blit_shaders.h +++ b/drivers/gpu/drm/radeon/cayman_blit_shaders.h | |||
@@ -25,8 +25,11 @@ | |||
25 | #ifndef CAYMAN_BLIT_SHADERS_H | 25 | #ifndef CAYMAN_BLIT_SHADERS_H |
26 | #define CAYMAN_BLIT_SHADERS_H | 26 | #define CAYMAN_BLIT_SHADERS_H |
27 | 27 | ||
28 | extern const u32 cayman_ps[]; | ||
29 | extern const u32 cayman_vs[]; | ||
28 | extern const u32 cayman_default_state[]; | 30 | extern const u32 cayman_default_state[]; |
29 | 31 | ||
32 | extern const u32 cayman_ps_size, cayman_vs_size; | ||
30 | extern const u32 cayman_default_size; | 33 | extern const u32 cayman_default_size; |
31 | 34 | ||
32 | #endif | 35 | #endif |
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c index 7c37638095f7..98ea597bc76d 100644 --- a/drivers/gpu/drm/radeon/evergreen.c +++ b/drivers/gpu/drm/radeon/evergreen.c | |||
@@ -88,21 +88,39 @@ u32 evergreen_page_flip(struct radeon_device *rdev, int crtc_id, u64 crtc_base) | |||
88 | /* get temperature in millidegrees */ | 88 | /* get temperature in millidegrees */ |
89 | int evergreen_get_temp(struct radeon_device *rdev) | 89 | int evergreen_get_temp(struct radeon_device *rdev) |
90 | { | 90 | { |
91 | u32 temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >> | 91 | u32 temp, toffset, actual_temp = 0; |
92 | ASIC_T_SHIFT; | 92 | |
93 | u32 actual_temp = 0; | 93 | if (rdev->family == CHIP_JUNIPER) { |
94 | 94 | toffset = (RREG32(CG_THERMAL_CTRL) & TOFFSET_MASK) >> | |
95 | if (temp & 0x400) | 95 | TOFFSET_SHIFT; |
96 | actual_temp = -256; | 96 | temp = (RREG32(CG_TS0_STATUS) & TS0_ADC_DOUT_MASK) >> |
97 | else if (temp & 0x200) | 97 | TS0_ADC_DOUT_SHIFT; |
98 | actual_temp = 255; | 98 | |
99 | else if (temp & 0x100) { | 99 | if (toffset & 0x100) |
100 | actual_temp = temp & 0x1ff; | 100 | actual_temp = temp / 2 - (0x200 - toffset); |
101 | actual_temp |= ~0x1ff; | 101 | else |
102 | } else | 102 | actual_temp = temp / 2 + toffset; |
103 | actual_temp = temp & 0xff; | 103 | |
104 | actual_temp = actual_temp * 1000; | ||
105 | |||
106 | } else { | ||
107 | temp = (RREG32(CG_MULT_THERMAL_STATUS) & ASIC_T_MASK) >> | ||
108 | ASIC_T_SHIFT; | ||
104 | 109 | ||
105 | return (actual_temp * 1000) / 2; | 110 | if (temp & 0x400) |
111 | actual_temp = -256; | ||
112 | else if (temp & 0x200) | ||
113 | actual_temp = 255; | ||
114 | else if (temp & 0x100) { | ||
115 | actual_temp = temp & 0x1ff; | ||
116 | actual_temp |= ~0x1ff; | ||
117 | } else | ||
118 | actual_temp = temp & 0xff; | ||
119 | |||
120 | actual_temp = (actual_temp * 1000) / 2; | ||
121 | } | ||
122 | |||
123 | return actual_temp; | ||
106 | } | 124 | } |
107 | 125 | ||
108 | int sumo_get_temp(struct radeon_device *rdev) | 126 | int sumo_get_temp(struct radeon_device *rdev) |
@@ -1415,6 +1433,8 @@ static u32 evergreen_get_tile_pipe_to_backend_map(struct radeon_device *rdev, | |||
1415 | case CHIP_CEDAR: | 1433 | case CHIP_CEDAR: |
1416 | case CHIP_REDWOOD: | 1434 | case CHIP_REDWOOD: |
1417 | case CHIP_PALM: | 1435 | case CHIP_PALM: |
1436 | case CHIP_SUMO: | ||
1437 | case CHIP_SUMO2: | ||
1418 | case CHIP_TURKS: | 1438 | case CHIP_TURKS: |
1419 | case CHIP_CAICOS: | 1439 | case CHIP_CAICOS: |
1420 | force_no_swizzle = false; | 1440 | force_no_swizzle = false; |
@@ -1544,6 +1564,8 @@ static void evergreen_program_channel_remap(struct radeon_device *rdev) | |||
1544 | case CHIP_REDWOOD: | 1564 | case CHIP_REDWOOD: |
1545 | case CHIP_CEDAR: | 1565 | case CHIP_CEDAR: |
1546 | case CHIP_PALM: | 1566 | case CHIP_PALM: |
1567 | case CHIP_SUMO: | ||
1568 | case CHIP_SUMO2: | ||
1547 | case CHIP_TURKS: | 1569 | case CHIP_TURKS: |
1548 | case CHIP_CAICOS: | 1570 | case CHIP_CAICOS: |
1549 | default: | 1571 | default: |
@@ -1689,6 +1711,54 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
1689 | rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; | 1711 | rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; |
1690 | rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; | 1712 | rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; |
1691 | break; | 1713 | break; |
1714 | case CHIP_SUMO: | ||
1715 | rdev->config.evergreen.num_ses = 1; | ||
1716 | rdev->config.evergreen.max_pipes = 4; | ||
1717 | rdev->config.evergreen.max_tile_pipes = 2; | ||
1718 | if (rdev->pdev->device == 0x9648) | ||
1719 | rdev->config.evergreen.max_simds = 3; | ||
1720 | else if ((rdev->pdev->device == 0x9647) || | ||
1721 | (rdev->pdev->device == 0x964a)) | ||
1722 | rdev->config.evergreen.max_simds = 4; | ||
1723 | else | ||
1724 | rdev->config.evergreen.max_simds = 5; | ||
1725 | rdev->config.evergreen.max_backends = 2 * rdev->config.evergreen.num_ses; | ||
1726 | rdev->config.evergreen.max_gprs = 256; | ||
1727 | rdev->config.evergreen.max_threads = 248; | ||
1728 | rdev->config.evergreen.max_gs_threads = 32; | ||
1729 | rdev->config.evergreen.max_stack_entries = 256; | ||
1730 | rdev->config.evergreen.sx_num_of_sets = 4; | ||
1731 | rdev->config.evergreen.sx_max_export_size = 256; | ||
1732 | rdev->config.evergreen.sx_max_export_pos_size = 64; | ||
1733 | rdev->config.evergreen.sx_max_export_smx_size = 192; | ||
1734 | rdev->config.evergreen.max_hw_contexts = 8; | ||
1735 | rdev->config.evergreen.sq_num_cf_insts = 2; | ||
1736 | |||
1737 | rdev->config.evergreen.sc_prim_fifo_size = 0x40; | ||
1738 | rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; | ||
1739 | rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; | ||
1740 | break; | ||
1741 | case CHIP_SUMO2: | ||
1742 | rdev->config.evergreen.num_ses = 1; | ||
1743 | rdev->config.evergreen.max_pipes = 4; | ||
1744 | rdev->config.evergreen.max_tile_pipes = 4; | ||
1745 | rdev->config.evergreen.max_simds = 2; | ||
1746 | rdev->config.evergreen.max_backends = 1 * rdev->config.evergreen.num_ses; | ||
1747 | rdev->config.evergreen.max_gprs = 256; | ||
1748 | rdev->config.evergreen.max_threads = 248; | ||
1749 | rdev->config.evergreen.max_gs_threads = 32; | ||
1750 | rdev->config.evergreen.max_stack_entries = 512; | ||
1751 | rdev->config.evergreen.sx_num_of_sets = 4; | ||
1752 | rdev->config.evergreen.sx_max_export_size = 256; | ||
1753 | rdev->config.evergreen.sx_max_export_pos_size = 64; | ||
1754 | rdev->config.evergreen.sx_max_export_smx_size = 192; | ||
1755 | rdev->config.evergreen.max_hw_contexts = 8; | ||
1756 | rdev->config.evergreen.sq_num_cf_insts = 2; | ||
1757 | |||
1758 | rdev->config.evergreen.sc_prim_fifo_size = 0x40; | ||
1759 | rdev->config.evergreen.sc_hiz_tile_fifo_size = 0x30; | ||
1760 | rdev->config.evergreen.sc_earlyz_tile_fifo_size = 0x130; | ||
1761 | break; | ||
1692 | case CHIP_BARTS: | 1762 | case CHIP_BARTS: |
1693 | rdev->config.evergreen.num_ses = 2; | 1763 | rdev->config.evergreen.num_ses = 2; |
1694 | rdev->config.evergreen.max_pipes = 4; | 1764 | rdev->config.evergreen.max_pipes = 4; |
@@ -2039,6 +2109,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
2039 | switch (rdev->family) { | 2109 | switch (rdev->family) { |
2040 | case CHIP_CEDAR: | 2110 | case CHIP_CEDAR: |
2041 | case CHIP_PALM: | 2111 | case CHIP_PALM: |
2112 | case CHIP_SUMO: | ||
2113 | case CHIP_SUMO2: | ||
2042 | case CHIP_CAICOS: | 2114 | case CHIP_CAICOS: |
2043 | /* no vertex cache */ | 2115 | /* no vertex cache */ |
2044 | sq_config &= ~VC_ENABLE; | 2116 | sq_config &= ~VC_ENABLE; |
@@ -2060,6 +2132,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
2060 | switch (rdev->family) { | 2132 | switch (rdev->family) { |
2061 | case CHIP_CEDAR: | 2133 | case CHIP_CEDAR: |
2062 | case CHIP_PALM: | 2134 | case CHIP_PALM: |
2135 | case CHIP_SUMO: | ||
2136 | case CHIP_SUMO2: | ||
2063 | ps_thread_count = 96; | 2137 | ps_thread_count = 96; |
2064 | break; | 2138 | break; |
2065 | default: | 2139 | default: |
@@ -2099,6 +2173,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev) | |||
2099 | switch (rdev->family) { | 2173 | switch (rdev->family) { |
2100 | case CHIP_CEDAR: | 2174 | case CHIP_CEDAR: |
2101 | case CHIP_PALM: | 2175 | case CHIP_PALM: |
2176 | case CHIP_SUMO: | ||
2177 | case CHIP_SUMO2: | ||
2102 | case CHIP_CAICOS: | 2178 | case CHIP_CAICOS: |
2103 | vgt_cache_invalidation = CACHE_INVALIDATION(TC_ONLY); | 2179 | vgt_cache_invalidation = CACHE_INVALIDATION(TC_ONLY); |
2104 | break; | 2180 | break; |
diff --git a/drivers/gpu/drm/radeon/evergreen_blit_kms.c b/drivers/gpu/drm/radeon/evergreen_blit_kms.c index ba06a69c6de8..57f3bc17b87e 100644 --- a/drivers/gpu/drm/radeon/evergreen_blit_kms.c +++ b/drivers/gpu/drm/radeon/evergreen_blit_kms.c | |||
@@ -31,6 +31,7 @@ | |||
31 | 31 | ||
32 | #include "evergreend.h" | 32 | #include "evergreend.h" |
33 | #include "evergreen_blit_shaders.h" | 33 | #include "evergreen_blit_shaders.h" |
34 | #include "cayman_blit_shaders.h" | ||
34 | 35 | ||
35 | #define DI_PT_RECTLIST 0x11 | 36 | #define DI_PT_RECTLIST 0x11 |
36 | #define DI_INDEX_SIZE_16_BIT 0x0 | 37 | #define DI_INDEX_SIZE_16_BIT 0x0 |
@@ -152,6 +153,8 @@ set_vtx_resource(struct radeon_device *rdev, u64 gpu_addr) | |||
152 | 153 | ||
153 | if ((rdev->family == CHIP_CEDAR) || | 154 | if ((rdev->family == CHIP_CEDAR) || |
154 | (rdev->family == CHIP_PALM) || | 155 | (rdev->family == CHIP_PALM) || |
156 | (rdev->family == CHIP_SUMO) || | ||
157 | (rdev->family == CHIP_SUMO2) || | ||
155 | (rdev->family == CHIP_CAICOS)) | 158 | (rdev->family == CHIP_CAICOS)) |
156 | cp_set_surface_sync(rdev, | 159 | cp_set_surface_sync(rdev, |
157 | PACKET3_TC_ACTION_ENA, 48, gpu_addr); | 160 | PACKET3_TC_ACTION_ENA, 48, gpu_addr); |
@@ -199,6 +202,16 @@ static void | |||
199 | set_scissors(struct radeon_device *rdev, int x1, int y1, | 202 | set_scissors(struct radeon_device *rdev, int x1, int y1, |
200 | int x2, int y2) | 203 | int x2, int y2) |
201 | { | 204 | { |
205 | /* workaround some hw bugs */ | ||
206 | if (x2 == 0) | ||
207 | x1 = 1; | ||
208 | if (y2 == 0) | ||
209 | y1 = 1; | ||
210 | if (rdev->family == CHIP_CAYMAN) { | ||
211 | if ((x2 == 1) && (y2 == 1)) | ||
212 | x2 = 2; | ||
213 | } | ||
214 | |||
202 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); | 215 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONTEXT_REG, 2)); |
203 | radeon_ring_write(rdev, (PA_SC_SCREEN_SCISSOR_TL - PACKET3_SET_CONTEXT_REG_START) >> 2); | 216 | radeon_ring_write(rdev, (PA_SC_SCREEN_SCISSOR_TL - PACKET3_SET_CONTEXT_REG_START) >> 2); |
204 | radeon_ring_write(rdev, (x1 << 0) | (y1 << 16)); | 217 | radeon_ring_write(rdev, (x1 << 0) | (y1 << 16)); |
@@ -255,238 +268,284 @@ set_default_state(struct radeon_device *rdev) | |||
255 | u64 gpu_addr; | 268 | u64 gpu_addr; |
256 | int dwords; | 269 | int dwords; |
257 | 270 | ||
258 | switch (rdev->family) { | ||
259 | case CHIP_CEDAR: | ||
260 | default: | ||
261 | num_ps_gprs = 93; | ||
262 | num_vs_gprs = 46; | ||
263 | num_temp_gprs = 4; | ||
264 | num_gs_gprs = 31; | ||
265 | num_es_gprs = 31; | ||
266 | num_hs_gprs = 23; | ||
267 | num_ls_gprs = 23; | ||
268 | num_ps_threads = 96; | ||
269 | num_vs_threads = 16; | ||
270 | num_gs_threads = 16; | ||
271 | num_es_threads = 16; | ||
272 | num_hs_threads = 16; | ||
273 | num_ls_threads = 16; | ||
274 | num_ps_stack_entries = 42; | ||
275 | num_vs_stack_entries = 42; | ||
276 | num_gs_stack_entries = 42; | ||
277 | num_es_stack_entries = 42; | ||
278 | num_hs_stack_entries = 42; | ||
279 | num_ls_stack_entries = 42; | ||
280 | break; | ||
281 | case CHIP_REDWOOD: | ||
282 | num_ps_gprs = 93; | ||
283 | num_vs_gprs = 46; | ||
284 | num_temp_gprs = 4; | ||
285 | num_gs_gprs = 31; | ||
286 | num_es_gprs = 31; | ||
287 | num_hs_gprs = 23; | ||
288 | num_ls_gprs = 23; | ||
289 | num_ps_threads = 128; | ||
290 | num_vs_threads = 20; | ||
291 | num_gs_threads = 20; | ||
292 | num_es_threads = 20; | ||
293 | num_hs_threads = 20; | ||
294 | num_ls_threads = 20; | ||
295 | num_ps_stack_entries = 42; | ||
296 | num_vs_stack_entries = 42; | ||
297 | num_gs_stack_entries = 42; | ||
298 | num_es_stack_entries = 42; | ||
299 | num_hs_stack_entries = 42; | ||
300 | num_ls_stack_entries = 42; | ||
301 | break; | ||
302 | case CHIP_JUNIPER: | ||
303 | num_ps_gprs = 93; | ||
304 | num_vs_gprs = 46; | ||
305 | num_temp_gprs = 4; | ||
306 | num_gs_gprs = 31; | ||
307 | num_es_gprs = 31; | ||
308 | num_hs_gprs = 23; | ||
309 | num_ls_gprs = 23; | ||
310 | num_ps_threads = 128; | ||
311 | num_vs_threads = 20; | ||
312 | num_gs_threads = 20; | ||
313 | num_es_threads = 20; | ||
314 | num_hs_threads = 20; | ||
315 | num_ls_threads = 20; | ||
316 | num_ps_stack_entries = 85; | ||
317 | num_vs_stack_entries = 85; | ||
318 | num_gs_stack_entries = 85; | ||
319 | num_es_stack_entries = 85; | ||
320 | num_hs_stack_entries = 85; | ||
321 | num_ls_stack_entries = 85; | ||
322 | break; | ||
323 | case CHIP_CYPRESS: | ||
324 | case CHIP_HEMLOCK: | ||
325 | num_ps_gprs = 93; | ||
326 | num_vs_gprs = 46; | ||
327 | num_temp_gprs = 4; | ||
328 | num_gs_gprs = 31; | ||
329 | num_es_gprs = 31; | ||
330 | num_hs_gprs = 23; | ||
331 | num_ls_gprs = 23; | ||
332 | num_ps_threads = 128; | ||
333 | num_vs_threads = 20; | ||
334 | num_gs_threads = 20; | ||
335 | num_es_threads = 20; | ||
336 | num_hs_threads = 20; | ||
337 | num_ls_threads = 20; | ||
338 | num_ps_stack_entries = 85; | ||
339 | num_vs_stack_entries = 85; | ||
340 | num_gs_stack_entries = 85; | ||
341 | num_es_stack_entries = 85; | ||
342 | num_hs_stack_entries = 85; | ||
343 | num_ls_stack_entries = 85; | ||
344 | break; | ||
345 | case CHIP_PALM: | ||
346 | num_ps_gprs = 93; | ||
347 | num_vs_gprs = 46; | ||
348 | num_temp_gprs = 4; | ||
349 | num_gs_gprs = 31; | ||
350 | num_es_gprs = 31; | ||
351 | num_hs_gprs = 23; | ||
352 | num_ls_gprs = 23; | ||
353 | num_ps_threads = 96; | ||
354 | num_vs_threads = 16; | ||
355 | num_gs_threads = 16; | ||
356 | num_es_threads = 16; | ||
357 | num_hs_threads = 16; | ||
358 | num_ls_threads = 16; | ||
359 | num_ps_stack_entries = 42; | ||
360 | num_vs_stack_entries = 42; | ||
361 | num_gs_stack_entries = 42; | ||
362 | num_es_stack_entries = 42; | ||
363 | num_hs_stack_entries = 42; | ||
364 | num_ls_stack_entries = 42; | ||
365 | break; | ||
366 | case CHIP_BARTS: | ||
367 | num_ps_gprs = 93; | ||
368 | num_vs_gprs = 46; | ||
369 | num_temp_gprs = 4; | ||
370 | num_gs_gprs = 31; | ||
371 | num_es_gprs = 31; | ||
372 | num_hs_gprs = 23; | ||
373 | num_ls_gprs = 23; | ||
374 | num_ps_threads = 128; | ||
375 | num_vs_threads = 20; | ||
376 | num_gs_threads = 20; | ||
377 | num_es_threads = 20; | ||
378 | num_hs_threads = 20; | ||
379 | num_ls_threads = 20; | ||
380 | num_ps_stack_entries = 85; | ||
381 | num_vs_stack_entries = 85; | ||
382 | num_gs_stack_entries = 85; | ||
383 | num_es_stack_entries = 85; | ||
384 | num_hs_stack_entries = 85; | ||
385 | num_ls_stack_entries = 85; | ||
386 | break; | ||
387 | case CHIP_TURKS: | ||
388 | num_ps_gprs = 93; | ||
389 | num_vs_gprs = 46; | ||
390 | num_temp_gprs = 4; | ||
391 | num_gs_gprs = 31; | ||
392 | num_es_gprs = 31; | ||
393 | num_hs_gprs = 23; | ||
394 | num_ls_gprs = 23; | ||
395 | num_ps_threads = 128; | ||
396 | num_vs_threads = 20; | ||
397 | num_gs_threads = 20; | ||
398 | num_es_threads = 20; | ||
399 | num_hs_threads = 20; | ||
400 | num_ls_threads = 20; | ||
401 | num_ps_stack_entries = 42; | ||
402 | num_vs_stack_entries = 42; | ||
403 | num_gs_stack_entries = 42; | ||
404 | num_es_stack_entries = 42; | ||
405 | num_hs_stack_entries = 42; | ||
406 | num_ls_stack_entries = 42; | ||
407 | break; | ||
408 | case CHIP_CAICOS: | ||
409 | num_ps_gprs = 93; | ||
410 | num_vs_gprs = 46; | ||
411 | num_temp_gprs = 4; | ||
412 | num_gs_gprs = 31; | ||
413 | num_es_gprs = 31; | ||
414 | num_hs_gprs = 23; | ||
415 | num_ls_gprs = 23; | ||
416 | num_ps_threads = 128; | ||
417 | num_vs_threads = 10; | ||
418 | num_gs_threads = 10; | ||
419 | num_es_threads = 10; | ||
420 | num_hs_threads = 10; | ||
421 | num_ls_threads = 10; | ||
422 | num_ps_stack_entries = 42; | ||
423 | num_vs_stack_entries = 42; | ||
424 | num_gs_stack_entries = 42; | ||
425 | num_es_stack_entries = 42; | ||
426 | num_hs_stack_entries = 42; | ||
427 | num_ls_stack_entries = 42; | ||
428 | break; | ||
429 | } | ||
430 | |||
431 | if ((rdev->family == CHIP_CEDAR) || | ||
432 | (rdev->family == CHIP_PALM) || | ||
433 | (rdev->family == CHIP_CAICOS)) | ||
434 | sq_config = 0; | ||
435 | else | ||
436 | sq_config = VC_ENABLE; | ||
437 | |||
438 | sq_config |= (EXPORT_SRC_C | | ||
439 | CS_PRIO(0) | | ||
440 | LS_PRIO(0) | | ||
441 | HS_PRIO(0) | | ||
442 | PS_PRIO(0) | | ||
443 | VS_PRIO(1) | | ||
444 | GS_PRIO(2) | | ||
445 | ES_PRIO(3)); | ||
446 | |||
447 | sq_gpr_resource_mgmt_1 = (NUM_PS_GPRS(num_ps_gprs) | | ||
448 | NUM_VS_GPRS(num_vs_gprs) | | ||
449 | NUM_CLAUSE_TEMP_GPRS(num_temp_gprs)); | ||
450 | sq_gpr_resource_mgmt_2 = (NUM_GS_GPRS(num_gs_gprs) | | ||
451 | NUM_ES_GPRS(num_es_gprs)); | ||
452 | sq_gpr_resource_mgmt_3 = (NUM_HS_GPRS(num_hs_gprs) | | ||
453 | NUM_LS_GPRS(num_ls_gprs)); | ||
454 | sq_thread_resource_mgmt = (NUM_PS_THREADS(num_ps_threads) | | ||
455 | NUM_VS_THREADS(num_vs_threads) | | ||
456 | NUM_GS_THREADS(num_gs_threads) | | ||
457 | NUM_ES_THREADS(num_es_threads)); | ||
458 | sq_thread_resource_mgmt_2 = (NUM_HS_THREADS(num_hs_threads) | | ||
459 | NUM_LS_THREADS(num_ls_threads)); | ||
460 | sq_stack_resource_mgmt_1 = (NUM_PS_STACK_ENTRIES(num_ps_stack_entries) | | ||
461 | NUM_VS_STACK_ENTRIES(num_vs_stack_entries)); | ||
462 | sq_stack_resource_mgmt_2 = (NUM_GS_STACK_ENTRIES(num_gs_stack_entries) | | ||
463 | NUM_ES_STACK_ENTRIES(num_es_stack_entries)); | ||
464 | sq_stack_resource_mgmt_3 = (NUM_HS_STACK_ENTRIES(num_hs_stack_entries) | | ||
465 | NUM_LS_STACK_ENTRIES(num_ls_stack_entries)); | ||
466 | |||
467 | /* set clear context state */ | 271 | /* set clear context state */ |
468 | radeon_ring_write(rdev, PACKET3(PACKET3_CLEAR_STATE, 0)); | 272 | radeon_ring_write(rdev, PACKET3(PACKET3_CLEAR_STATE, 0)); |
469 | radeon_ring_write(rdev, 0); | 273 | radeon_ring_write(rdev, 0); |
470 | 274 | ||
471 | /* disable dyn gprs */ | 275 | if (rdev->family < CHIP_CAYMAN) { |
472 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1)); | 276 | switch (rdev->family) { |
473 | radeon_ring_write(rdev, (SQ_DYN_GPR_CNTL_PS_FLUSH_REQ - PACKET3_SET_CONFIG_REG_START) >> 2); | 277 | case CHIP_CEDAR: |
474 | radeon_ring_write(rdev, 0); | 278 | default: |
279 | num_ps_gprs = 93; | ||
280 | num_vs_gprs = 46; | ||
281 | num_temp_gprs = 4; | ||
282 | num_gs_gprs = 31; | ||
283 | num_es_gprs = 31; | ||
284 | num_hs_gprs = 23; | ||
285 | num_ls_gprs = 23; | ||
286 | num_ps_threads = 96; | ||
287 | num_vs_threads = 16; | ||
288 | num_gs_threads = 16; | ||
289 | num_es_threads = 16; | ||
290 | num_hs_threads = 16; | ||
291 | num_ls_threads = 16; | ||
292 | num_ps_stack_entries = 42; | ||
293 | num_vs_stack_entries = 42; | ||
294 | num_gs_stack_entries = 42; | ||
295 | num_es_stack_entries = 42; | ||
296 | num_hs_stack_entries = 42; | ||
297 | num_ls_stack_entries = 42; | ||
298 | break; | ||
299 | case CHIP_REDWOOD: | ||
300 | num_ps_gprs = 93; | ||
301 | num_vs_gprs = 46; | ||
302 | num_temp_gprs = 4; | ||
303 | num_gs_gprs = 31; | ||
304 | num_es_gprs = 31; | ||
305 | num_hs_gprs = 23; | ||
306 | num_ls_gprs = 23; | ||
307 | num_ps_threads = 128; | ||
308 | num_vs_threads = 20; | ||
309 | num_gs_threads = 20; | ||
310 | num_es_threads = 20; | ||
311 | num_hs_threads = 20; | ||
312 | num_ls_threads = 20; | ||
313 | num_ps_stack_entries = 42; | ||
314 | num_vs_stack_entries = 42; | ||
315 | num_gs_stack_entries = 42; | ||
316 | num_es_stack_entries = 42; | ||
317 | num_hs_stack_entries = 42; | ||
318 | num_ls_stack_entries = 42; | ||
319 | break; | ||
320 | case CHIP_JUNIPER: | ||
321 | num_ps_gprs = 93; | ||
322 | num_vs_gprs = 46; | ||
323 | num_temp_gprs = 4; | ||
324 | num_gs_gprs = 31; | ||
325 | num_es_gprs = 31; | ||
326 | num_hs_gprs = 23; | ||
327 | num_ls_gprs = 23; | ||
328 | num_ps_threads = 128; | ||
329 | num_vs_threads = 20; | ||
330 | num_gs_threads = 20; | ||
331 | num_es_threads = 20; | ||
332 | num_hs_threads = 20; | ||
333 | num_ls_threads = 20; | ||
334 | num_ps_stack_entries = 85; | ||
335 | num_vs_stack_entries = 85; | ||
336 | num_gs_stack_entries = 85; | ||
337 | num_es_stack_entries = 85; | ||
338 | num_hs_stack_entries = 85; | ||
339 | num_ls_stack_entries = 85; | ||
340 | break; | ||
341 | case CHIP_CYPRESS: | ||
342 | case CHIP_HEMLOCK: | ||
343 | num_ps_gprs = 93; | ||
344 | num_vs_gprs = 46; | ||
345 | num_temp_gprs = 4; | ||
346 | num_gs_gprs = 31; | ||
347 | num_es_gprs = 31; | ||
348 | num_hs_gprs = 23; | ||
349 | num_ls_gprs = 23; | ||
350 | num_ps_threads = 128; | ||
351 | num_vs_threads = 20; | ||
352 | num_gs_threads = 20; | ||
353 | num_es_threads = 20; | ||
354 | num_hs_threads = 20; | ||
355 | num_ls_threads = 20; | ||
356 | num_ps_stack_entries = 85; | ||
357 | num_vs_stack_entries = 85; | ||
358 | num_gs_stack_entries = 85; | ||
359 | num_es_stack_entries = 85; | ||
360 | num_hs_stack_entries = 85; | ||
361 | num_ls_stack_entries = 85; | ||
362 | break; | ||
363 | case CHIP_PALM: | ||
364 | num_ps_gprs = 93; | ||
365 | num_vs_gprs = 46; | ||
366 | num_temp_gprs = 4; | ||
367 | num_gs_gprs = 31; | ||
368 | num_es_gprs = 31; | ||
369 | num_hs_gprs = 23; | ||
370 | num_ls_gprs = 23; | ||
371 | num_ps_threads = 96; | ||
372 | num_vs_threads = 16; | ||
373 | num_gs_threads = 16; | ||
374 | num_es_threads = 16; | ||
375 | num_hs_threads = 16; | ||
376 | num_ls_threads = 16; | ||
377 | num_ps_stack_entries = 42; | ||
378 | num_vs_stack_entries = 42; | ||
379 | num_gs_stack_entries = 42; | ||
380 | num_es_stack_entries = 42; | ||
381 | num_hs_stack_entries = 42; | ||
382 | num_ls_stack_entries = 42; | ||
383 | break; | ||
384 | case CHIP_SUMO: | ||
385 | num_ps_gprs = 93; | ||
386 | num_vs_gprs = 46; | ||
387 | num_temp_gprs = 4; | ||
388 | num_gs_gprs = 31; | ||
389 | num_es_gprs = 31; | ||
390 | num_hs_gprs = 23; | ||
391 | num_ls_gprs = 23; | ||
392 | num_ps_threads = 96; | ||
393 | num_vs_threads = 25; | ||
394 | num_gs_threads = 25; | ||
395 | num_es_threads = 25; | ||
396 | num_hs_threads = 25; | ||
397 | num_ls_threads = 25; | ||
398 | num_ps_stack_entries = 42; | ||
399 | num_vs_stack_entries = 42; | ||
400 | num_gs_stack_entries = 42; | ||
401 | num_es_stack_entries = 42; | ||
402 | num_hs_stack_entries = 42; | ||
403 | num_ls_stack_entries = 42; | ||
404 | break; | ||
405 | case CHIP_SUMO2: | ||
406 | num_ps_gprs = 93; | ||
407 | num_vs_gprs = 46; | ||
408 | num_temp_gprs = 4; | ||
409 | num_gs_gprs = 31; | ||
410 | num_es_gprs = 31; | ||
411 | num_hs_gprs = 23; | ||
412 | num_ls_gprs = 23; | ||
413 | num_ps_threads = 96; | ||
414 | num_vs_threads = 25; | ||
415 | num_gs_threads = 25; | ||
416 | num_es_threads = 25; | ||
417 | num_hs_threads = 25; | ||
418 | num_ls_threads = 25; | ||
419 | num_ps_stack_entries = 85; | ||
420 | num_vs_stack_entries = 85; | ||
421 | num_gs_stack_entries = 85; | ||
422 | num_es_stack_entries = 85; | ||
423 | num_hs_stack_entries = 85; | ||
424 | num_ls_stack_entries = 85; | ||
425 | break; | ||
426 | case CHIP_BARTS: | ||
427 | num_ps_gprs = 93; | ||
428 | num_vs_gprs = 46; | ||
429 | num_temp_gprs = 4; | ||
430 | num_gs_gprs = 31; | ||
431 | num_es_gprs = 31; | ||
432 | num_hs_gprs = 23; | ||
433 | num_ls_gprs = 23; | ||
434 | num_ps_threads = 128; | ||
435 | num_vs_threads = 20; | ||
436 | num_gs_threads = 20; | ||
437 | num_es_threads = 20; | ||
438 | num_hs_threads = 20; | ||
439 | num_ls_threads = 20; | ||
440 | num_ps_stack_entries = 85; | ||
441 | num_vs_stack_entries = 85; | ||
442 | num_gs_stack_entries = 85; | ||
443 | num_es_stack_entries = 85; | ||
444 | num_hs_stack_entries = 85; | ||
445 | num_ls_stack_entries = 85; | ||
446 | break; | ||
447 | case CHIP_TURKS: | ||
448 | num_ps_gprs = 93; | ||
449 | num_vs_gprs = 46; | ||
450 | num_temp_gprs = 4; | ||
451 | num_gs_gprs = 31; | ||
452 | num_es_gprs = 31; | ||
453 | num_hs_gprs = 23; | ||
454 | num_ls_gprs = 23; | ||
455 | num_ps_threads = 128; | ||
456 | num_vs_threads = 20; | ||
457 | num_gs_threads = 20; | ||
458 | num_es_threads = 20; | ||
459 | num_hs_threads = 20; | ||
460 | num_ls_threads = 20; | ||
461 | num_ps_stack_entries = 42; | ||
462 | num_vs_stack_entries = 42; | ||
463 | num_gs_stack_entries = 42; | ||
464 | num_es_stack_entries = 42; | ||
465 | num_hs_stack_entries = 42; | ||
466 | num_ls_stack_entries = 42; | ||
467 | break; | ||
468 | case CHIP_CAICOS: | ||
469 | num_ps_gprs = 93; | ||
470 | num_vs_gprs = 46; | ||
471 | num_temp_gprs = 4; | ||
472 | num_gs_gprs = 31; | ||
473 | num_es_gprs = 31; | ||
474 | num_hs_gprs = 23; | ||
475 | num_ls_gprs = 23; | ||
476 | num_ps_threads = 128; | ||
477 | num_vs_threads = 10; | ||
478 | num_gs_threads = 10; | ||
479 | num_es_threads = 10; | ||
480 | num_hs_threads = 10; | ||
481 | num_ls_threads = 10; | ||
482 | num_ps_stack_entries = 42; | ||
483 | num_vs_stack_entries = 42; | ||
484 | num_gs_stack_entries = 42; | ||
485 | num_es_stack_entries = 42; | ||
486 | num_hs_stack_entries = 42; | ||
487 | num_ls_stack_entries = 42; | ||
488 | break; | ||
489 | } | ||
475 | 490 | ||
476 | /* SQ config */ | 491 | if ((rdev->family == CHIP_CEDAR) || |
477 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 11)); | 492 | (rdev->family == CHIP_PALM) || |
478 | radeon_ring_write(rdev, (SQ_CONFIG - PACKET3_SET_CONFIG_REG_START) >> 2); | 493 | (rdev->family == CHIP_SUMO) || |
479 | radeon_ring_write(rdev, sq_config); | 494 | (rdev->family == CHIP_SUMO2) || |
480 | radeon_ring_write(rdev, sq_gpr_resource_mgmt_1); | 495 | (rdev->family == CHIP_CAICOS)) |
481 | radeon_ring_write(rdev, sq_gpr_resource_mgmt_2); | 496 | sq_config = 0; |
482 | radeon_ring_write(rdev, sq_gpr_resource_mgmt_3); | 497 | else |
483 | radeon_ring_write(rdev, 0); | 498 | sq_config = VC_ENABLE; |
484 | radeon_ring_write(rdev, 0); | 499 | |
485 | radeon_ring_write(rdev, sq_thread_resource_mgmt); | 500 | sq_config |= (EXPORT_SRC_C | |
486 | radeon_ring_write(rdev, sq_thread_resource_mgmt_2); | 501 | CS_PRIO(0) | |
487 | radeon_ring_write(rdev, sq_stack_resource_mgmt_1); | 502 | LS_PRIO(0) | |
488 | radeon_ring_write(rdev, sq_stack_resource_mgmt_2); | 503 | HS_PRIO(0) | |
489 | radeon_ring_write(rdev, sq_stack_resource_mgmt_3); | 504 | PS_PRIO(0) | |
505 | VS_PRIO(1) | | ||
506 | GS_PRIO(2) | | ||
507 | ES_PRIO(3)); | ||
508 | |||
509 | sq_gpr_resource_mgmt_1 = (NUM_PS_GPRS(num_ps_gprs) | | ||
510 | NUM_VS_GPRS(num_vs_gprs) | | ||
511 | NUM_CLAUSE_TEMP_GPRS(num_temp_gprs)); | ||
512 | sq_gpr_resource_mgmt_2 = (NUM_GS_GPRS(num_gs_gprs) | | ||
513 | NUM_ES_GPRS(num_es_gprs)); | ||
514 | sq_gpr_resource_mgmt_3 = (NUM_HS_GPRS(num_hs_gprs) | | ||
515 | NUM_LS_GPRS(num_ls_gprs)); | ||
516 | sq_thread_resource_mgmt = (NUM_PS_THREADS(num_ps_threads) | | ||
517 | NUM_VS_THREADS(num_vs_threads) | | ||
518 | NUM_GS_THREADS(num_gs_threads) | | ||
519 | NUM_ES_THREADS(num_es_threads)); | ||
520 | sq_thread_resource_mgmt_2 = (NUM_HS_THREADS(num_hs_threads) | | ||
521 | NUM_LS_THREADS(num_ls_threads)); | ||
522 | sq_stack_resource_mgmt_1 = (NUM_PS_STACK_ENTRIES(num_ps_stack_entries) | | ||
523 | NUM_VS_STACK_ENTRIES(num_vs_stack_entries)); | ||
524 | sq_stack_resource_mgmt_2 = (NUM_GS_STACK_ENTRIES(num_gs_stack_entries) | | ||
525 | NUM_ES_STACK_ENTRIES(num_es_stack_entries)); | ||
526 | sq_stack_resource_mgmt_3 = (NUM_HS_STACK_ENTRIES(num_hs_stack_entries) | | ||
527 | NUM_LS_STACK_ENTRIES(num_ls_stack_entries)); | ||
528 | |||
529 | /* disable dyn gprs */ | ||
530 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1)); | ||
531 | radeon_ring_write(rdev, (SQ_DYN_GPR_CNTL_PS_FLUSH_REQ - PACKET3_SET_CONFIG_REG_START) >> 2); | ||
532 | radeon_ring_write(rdev, 0); | ||
533 | |||
534 | /* SQ config */ | ||
535 | radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 11)); | ||
536 | radeon_ring_write(rdev, (SQ_CONFIG - PACKET3_SET_CONFIG_REG_START) >> 2); | ||
537 | radeon_ring_write(rdev, sq_config); | ||
538 | radeon_ring_write(rdev, sq_gpr_resource_mgmt_1); | ||
539 | radeon_ring_write(rdev, sq_gpr_resource_mgmt_2); | ||
540 | radeon_ring_write(rdev, sq_gpr_resource_mgmt_3); | ||
541 | radeon_ring_write(rdev, 0); | ||
542 | radeon_ring_write(rdev, 0); | ||
543 | radeon_ring_write(rdev, sq_thread_resource_mgmt); | ||
544 | radeon_ring_write(rdev, sq_thread_resource_mgmt_2); | ||
545 | radeon_ring_write(rdev, sq_stack_resource_mgmt_1); | ||
546 | radeon_ring_write(rdev, sq_stack_resource_mgmt_2); | ||
547 | radeon_ring_write(rdev, sq_stack_resource_mgmt_3); | ||
548 | } | ||
490 | 549 | ||
491 | /* CONTEXT_CONTROL */ | 550 | /* CONTEXT_CONTROL */ |
492 | radeon_ring_write(rdev, 0xc0012800); | 551 | radeon_ring_write(rdev, 0xc0012800); |
@@ -560,7 +619,10 @@ int evergreen_blit_init(struct radeon_device *rdev) | |||
560 | mutex_init(&rdev->r600_blit.mutex); | 619 | mutex_init(&rdev->r600_blit.mutex); |
561 | rdev->r600_blit.state_offset = 0; | 620 | rdev->r600_blit.state_offset = 0; |
562 | 621 | ||
563 | rdev->r600_blit.state_len = evergreen_default_size; | 622 | if (rdev->family < CHIP_CAYMAN) |
623 | rdev->r600_blit.state_len = evergreen_default_size; | ||
624 | else | ||
625 | rdev->r600_blit.state_len = cayman_default_size; | ||
564 | 626 | ||
565 | dwords = rdev->r600_blit.state_len; | 627 | dwords = rdev->r600_blit.state_len; |
566 | while (dwords & 0xf) { | 628 | while (dwords & 0xf) { |
@@ -572,11 +634,17 @@ int evergreen_blit_init(struct radeon_device *rdev) | |||
572 | obj_size = ALIGN(obj_size, 256); | 634 | obj_size = ALIGN(obj_size, 256); |
573 | 635 | ||
574 | rdev->r600_blit.vs_offset = obj_size; | 636 | rdev->r600_blit.vs_offset = obj_size; |
575 | obj_size += evergreen_vs_size * 4; | 637 | if (rdev->family < CHIP_CAYMAN) |
638 | obj_size += evergreen_vs_size * 4; | ||
639 | else | ||
640 | obj_size += cayman_vs_size * 4; | ||
576 | obj_size = ALIGN(obj_size, 256); | 641 | obj_size = ALIGN(obj_size, 256); |
577 | 642 | ||
578 | rdev->r600_blit.ps_offset = obj_size; | 643 | rdev->r600_blit.ps_offset = obj_size; |
579 | obj_size += evergreen_ps_size * 4; | 644 | if (rdev->family < CHIP_CAYMAN) |
645 | obj_size += evergreen_ps_size * 4; | ||
646 | else | ||
647 | obj_size += cayman_ps_size * 4; | ||
580 | obj_size = ALIGN(obj_size, 256); | 648 | obj_size = ALIGN(obj_size, 256); |
581 | 649 | ||
582 | r = radeon_bo_create(rdev, obj_size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, | 650 | r = radeon_bo_create(rdev, obj_size, PAGE_SIZE, true, RADEON_GEM_DOMAIN_VRAM, |
@@ -599,16 +667,29 @@ int evergreen_blit_init(struct radeon_device *rdev) | |||
599 | return r; | 667 | return r; |
600 | } | 668 | } |
601 | 669 | ||
602 | memcpy_toio(ptr + rdev->r600_blit.state_offset, | 670 | if (rdev->family < CHIP_CAYMAN) { |
603 | evergreen_default_state, rdev->r600_blit.state_len * 4); | 671 | memcpy_toio(ptr + rdev->r600_blit.state_offset, |
604 | 672 | evergreen_default_state, rdev->r600_blit.state_len * 4); | |
605 | if (num_packet2s) | 673 | |
606 | memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4), | 674 | if (num_packet2s) |
607 | packet2s, num_packet2s * 4); | 675 | memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4), |
608 | for (i = 0; i < evergreen_vs_size; i++) | 676 | packet2s, num_packet2s * 4); |
609 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.vs_offset + i * 4) = cpu_to_le32(evergreen_vs[i]); | 677 | for (i = 0; i < evergreen_vs_size; i++) |
610 | for (i = 0; i < evergreen_ps_size; i++) | 678 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.vs_offset + i * 4) = cpu_to_le32(evergreen_vs[i]); |
611 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.ps_offset + i * 4) = cpu_to_le32(evergreen_ps[i]); | 679 | for (i = 0; i < evergreen_ps_size; i++) |
680 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.ps_offset + i * 4) = cpu_to_le32(evergreen_ps[i]); | ||
681 | } else { | ||
682 | memcpy_toio(ptr + rdev->r600_blit.state_offset, | ||
683 | cayman_default_state, rdev->r600_blit.state_len * 4); | ||
684 | |||
685 | if (num_packet2s) | ||
686 | memcpy_toio(ptr + rdev->r600_blit.state_offset + (rdev->r600_blit.state_len * 4), | ||
687 | packet2s, num_packet2s * 4); | ||
688 | for (i = 0; i < cayman_vs_size; i++) | ||
689 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.vs_offset + i * 4) = cpu_to_le32(cayman_vs[i]); | ||
690 | for (i = 0; i < cayman_ps_size; i++) | ||
691 | *(u32 *)((unsigned long)ptr + rdev->r600_blit.ps_offset + i * 4) = cpu_to_le32(cayman_ps[i]); | ||
692 | } | ||
612 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); | 693 | radeon_bo_kunmap(rdev->r600_blit.shader_obj); |
613 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | 694 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
614 | 695 | ||
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h index f37e91ee8a11..1636e3449825 100644 --- a/drivers/gpu/drm/radeon/evergreend.h +++ b/drivers/gpu/drm/radeon/evergreend.h | |||
@@ -168,10 +168,16 @@ | |||
168 | #define SE_DB_BUSY (1 << 30) | 168 | #define SE_DB_BUSY (1 << 30) |
169 | #define SE_CB_BUSY (1 << 31) | 169 | #define SE_CB_BUSY (1 << 31) |
170 | /* evergreen */ | 170 | /* evergreen */ |
171 | #define CG_THERMAL_CTRL 0x72c | ||
172 | #define TOFFSET_MASK 0x00003FE0 | ||
173 | #define TOFFSET_SHIFT 5 | ||
171 | #define CG_MULT_THERMAL_STATUS 0x740 | 174 | #define CG_MULT_THERMAL_STATUS 0x740 |
172 | #define ASIC_T(x) ((x) << 16) | 175 | #define ASIC_T(x) ((x) << 16) |
173 | #define ASIC_T_MASK 0x7FF0000 | 176 | #define ASIC_T_MASK 0x07FF0000 |
174 | #define ASIC_T_SHIFT 16 | 177 | #define ASIC_T_SHIFT 16 |
178 | #define CG_TS0_STATUS 0x760 | ||
179 | #define TS0_ADC_DOUT_MASK 0x000003FF | ||
180 | #define TS0_ADC_DOUT_SHIFT 0 | ||
175 | /* APU */ | 181 | /* APU */ |
176 | #define CG_THERMAL_STATUS 0x678 | 182 | #define CG_THERMAL_STATUS 0x678 |
177 | 183 | ||
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c index b205ba1cdd8f..16caafeadf5e 100644 --- a/drivers/gpu/drm/radeon/ni.c +++ b/drivers/gpu/drm/radeon/ni.c | |||
@@ -1387,14 +1387,12 @@ static int cayman_startup(struct radeon_device *rdev) | |||
1387 | return r; | 1387 | return r; |
1388 | cayman_gpu_init(rdev); | 1388 | cayman_gpu_init(rdev); |
1389 | 1389 | ||
1390 | #if 0 | 1390 | r = evergreen_blit_init(rdev); |
1391 | r = cayman_blit_init(rdev); | ||
1392 | if (r) { | 1391 | if (r) { |
1393 | cayman_blit_fini(rdev); | 1392 | evergreen_blit_fini(rdev); |
1394 | rdev->asic->copy = NULL; | 1393 | rdev->asic->copy = NULL; |
1395 | dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); | 1394 | dev_warn(rdev->dev, "failed blitter (%d) falling back to memcpy\n", r); |
1396 | } | 1395 | } |
1397 | #endif | ||
1398 | 1396 | ||
1399 | /* allocate wb buffer */ | 1397 | /* allocate wb buffer */ |
1400 | r = radeon_wb_init(rdev); | 1398 | r = radeon_wb_init(rdev); |
@@ -1452,7 +1450,7 @@ int cayman_resume(struct radeon_device *rdev) | |||
1452 | 1450 | ||
1453 | int cayman_suspend(struct radeon_device *rdev) | 1451 | int cayman_suspend(struct radeon_device *rdev) |
1454 | { | 1452 | { |
1455 | /* int r; */ | 1453 | int r; |
1456 | 1454 | ||
1457 | /* FIXME: we should wait for ring to be empty */ | 1455 | /* FIXME: we should wait for ring to be empty */ |
1458 | cayman_cp_enable(rdev, false); | 1456 | cayman_cp_enable(rdev, false); |
@@ -1461,14 +1459,13 @@ int cayman_suspend(struct radeon_device *rdev) | |||
1461 | radeon_wb_disable(rdev); | 1459 | radeon_wb_disable(rdev); |
1462 | cayman_pcie_gart_disable(rdev); | 1460 | cayman_pcie_gart_disable(rdev); |
1463 | 1461 | ||
1464 | #if 0 | ||
1465 | /* unpin shaders bo */ | 1462 | /* unpin shaders bo */ |
1466 | r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); | 1463 | r = radeon_bo_reserve(rdev->r600_blit.shader_obj, false); |
1467 | if (likely(r == 0)) { | 1464 | if (likely(r == 0)) { |
1468 | radeon_bo_unpin(rdev->r600_blit.shader_obj); | 1465 | radeon_bo_unpin(rdev->r600_blit.shader_obj); |
1469 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); | 1466 | radeon_bo_unreserve(rdev->r600_blit.shader_obj); |
1470 | } | 1467 | } |
1471 | #endif | 1468 | |
1472 | return 0; | 1469 | return 0; |
1473 | } | 1470 | } |
1474 | 1471 | ||
@@ -1580,7 +1577,7 @@ int cayman_init(struct radeon_device *rdev) | |||
1580 | 1577 | ||
1581 | void cayman_fini(struct radeon_device *rdev) | 1578 | void cayman_fini(struct radeon_device *rdev) |
1582 | { | 1579 | { |
1583 | /* cayman_blit_fini(rdev); */ | 1580 | evergreen_blit_fini(rdev); |
1584 | cayman_cp_fini(rdev); | 1581 | cayman_cp_fini(rdev); |
1585 | r600_irq_fini(rdev); | 1582 | r600_irq_fini(rdev); |
1586 | radeon_wb_fini(rdev); | 1583 | radeon_wb_fini(rdev); |
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c index 6f27593901c7..d74d4d71437f 100644 --- a/drivers/gpu/drm/radeon/r600.c +++ b/drivers/gpu/drm/radeon/r600.c | |||
@@ -87,6 +87,10 @@ MODULE_FIRMWARE("radeon/CYPRESS_rlc.bin"); | |||
87 | MODULE_FIRMWARE("radeon/PALM_pfp.bin"); | 87 | MODULE_FIRMWARE("radeon/PALM_pfp.bin"); |
88 | MODULE_FIRMWARE("radeon/PALM_me.bin"); | 88 | MODULE_FIRMWARE("radeon/PALM_me.bin"); |
89 | MODULE_FIRMWARE("radeon/SUMO_rlc.bin"); | 89 | MODULE_FIRMWARE("radeon/SUMO_rlc.bin"); |
90 | MODULE_FIRMWARE("radeon/SUMO_pfp.bin"); | ||
91 | MODULE_FIRMWARE("radeon/SUMO_me.bin"); | ||
92 | MODULE_FIRMWARE("radeon/SUMO2_pfp.bin"); | ||
93 | MODULE_FIRMWARE("radeon/SUMO2_me.bin"); | ||
90 | 94 | ||
91 | int r600_debugfs_mc_info_init(struct radeon_device *rdev); | 95 | int r600_debugfs_mc_info_init(struct radeon_device *rdev); |
92 | 96 | ||
@@ -2024,6 +2028,14 @@ int r600_init_microcode(struct radeon_device *rdev) | |||
2024 | chip_name = "PALM"; | 2028 | chip_name = "PALM"; |
2025 | rlc_chip_name = "SUMO"; | 2029 | rlc_chip_name = "SUMO"; |
2026 | break; | 2030 | break; |
2031 | case CHIP_SUMO: | ||
2032 | chip_name = "SUMO"; | ||
2033 | rlc_chip_name = "SUMO"; | ||
2034 | break; | ||
2035 | case CHIP_SUMO2: | ||
2036 | chip_name = "SUMO2"; | ||
2037 | rlc_chip_name = "SUMO"; | ||
2038 | break; | ||
2027 | default: BUG(); | 2039 | default: BUG(); |
2028 | } | 2040 | } |
2029 | 2041 | ||
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c index fd18be9871ab..909bda8dd550 100644 --- a/drivers/gpu/drm/radeon/r600_cs.c +++ b/drivers/gpu/drm/radeon/r600_cs.c | |||
@@ -71,20 +71,21 @@ struct r600_cs_track { | |||
71 | u64 db_bo_mc; | 71 | u64 db_bo_mc; |
72 | }; | 72 | }; |
73 | 73 | ||
74 | #define FMT_8_BIT(fmt, vc) [fmt] = { 1, 1, 1, vc } | 74 | #define FMT_8_BIT(fmt, vc) [fmt] = { 1, 1, 1, vc, CHIP_R600 } |
75 | #define FMT_16_BIT(fmt, vc) [fmt] = { 1, 1, 2, vc } | 75 | #define FMT_16_BIT(fmt, vc) [fmt] = { 1, 1, 2, vc, CHIP_R600 } |
76 | #define FMT_24_BIT(fmt) [fmt] = { 1, 1, 3, 0 } | 76 | #define FMT_24_BIT(fmt) [fmt] = { 1, 1, 3, 0, CHIP_R600 } |
77 | #define FMT_32_BIT(fmt, vc) [fmt] = { 1, 1, 4, vc } | 77 | #define FMT_32_BIT(fmt, vc) [fmt] = { 1, 1, 4, vc, CHIP_R600 } |
78 | #define FMT_48_BIT(fmt) [fmt] = { 1, 1, 6, 0 } | 78 | #define FMT_48_BIT(fmt) [fmt] = { 1, 1, 6, 0, CHIP_R600 } |
79 | #define FMT_64_BIT(fmt, vc) [fmt] = { 1, 1, 8, vc } | 79 | #define FMT_64_BIT(fmt, vc) [fmt] = { 1, 1, 8, vc, CHIP_R600 } |
80 | #define FMT_96_BIT(fmt) [fmt] = { 1, 1, 12, 0 } | 80 | #define FMT_96_BIT(fmt) [fmt] = { 1, 1, 12, 0, CHIP_R600 } |
81 | #define FMT_128_BIT(fmt, vc) [fmt] = { 1, 1, 16, vc } | 81 | #define FMT_128_BIT(fmt, vc) [fmt] = { 1, 1, 16,vc, CHIP_R600 } |
82 | 82 | ||
83 | struct gpu_formats { | 83 | struct gpu_formats { |
84 | unsigned blockwidth; | 84 | unsigned blockwidth; |
85 | unsigned blockheight; | 85 | unsigned blockheight; |
86 | unsigned blocksize; | 86 | unsigned blocksize; |
87 | unsigned valid_color; | 87 | unsigned valid_color; |
88 | enum radeon_family min_family; | ||
88 | }; | 89 | }; |
89 | 90 | ||
90 | static const struct gpu_formats color_formats_table[] = { | 91 | static const struct gpu_formats color_formats_table[] = { |
@@ -154,7 +155,11 @@ static const struct gpu_formats color_formats_table[] = { | |||
154 | [V_038004_FMT_BC3] = { 4, 4, 16, 0 }, | 155 | [V_038004_FMT_BC3] = { 4, 4, 16, 0 }, |
155 | [V_038004_FMT_BC4] = { 4, 4, 8, 0 }, | 156 | [V_038004_FMT_BC4] = { 4, 4, 8, 0 }, |
156 | [V_038004_FMT_BC5] = { 4, 4, 16, 0}, | 157 | [V_038004_FMT_BC5] = { 4, 4, 16, 0}, |
158 | [V_038004_FMT_BC6] = { 4, 4, 16, 0, CHIP_CEDAR}, /* Evergreen-only */ | ||
159 | [V_038004_FMT_BC7] = { 4, 4, 16, 0, CHIP_CEDAR}, /* Evergreen-only */ | ||
157 | 160 | ||
161 | /* The other Evergreen formats */ | ||
162 | [V_038004_FMT_32_AS_32_32_32_32] = { 1, 1, 4, 0, CHIP_CEDAR}, | ||
158 | }; | 163 | }; |
159 | 164 | ||
160 | static inline bool fmt_is_valid_color(u32 format) | 165 | static inline bool fmt_is_valid_color(u32 format) |
@@ -168,11 +173,14 @@ static inline bool fmt_is_valid_color(u32 format) | |||
168 | return false; | 173 | return false; |
169 | } | 174 | } |
170 | 175 | ||
171 | static inline bool fmt_is_valid_texture(u32 format) | 176 | static inline bool fmt_is_valid_texture(u32 format, enum radeon_family family) |
172 | { | 177 | { |
173 | if (format >= ARRAY_SIZE(color_formats_table)) | 178 | if (format >= ARRAY_SIZE(color_formats_table)) |
174 | return false; | 179 | return false; |
175 | 180 | ||
181 | if (family < color_formats_table[format].min_family) | ||
182 | return false; | ||
183 | |||
176 | if (color_formats_table[format].blockwidth > 0) | 184 | if (color_formats_table[format].blockwidth > 0) |
177 | return true; | 185 | return true; |
178 | 186 | ||
@@ -1325,7 +1333,7 @@ static inline int r600_check_texture_resource(struct radeon_cs_parser *p, u32 i | |||
1325 | return -EINVAL; | 1333 | return -EINVAL; |
1326 | } | 1334 | } |
1327 | format = G_038004_DATA_FORMAT(word1); | 1335 | format = G_038004_DATA_FORMAT(word1); |
1328 | if (!fmt_is_valid_texture(format)) { | 1336 | if (!fmt_is_valid_texture(format, p->family)) { |
1329 | dev_warn(p->dev, "%s:%d texture invalid format %d\n", | 1337 | dev_warn(p->dev, "%s:%d texture invalid format %d\n", |
1330 | __func__, __LINE__, format); | 1338 | __func__, __LINE__, format); |
1331 | return -EINVAL; | 1339 | return -EINVAL; |
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h index b2b944bcd05a..f140a0d5cb54 100644 --- a/drivers/gpu/drm/radeon/r600d.h +++ b/drivers/gpu/drm/radeon/r600d.h | |||
@@ -1309,6 +1309,9 @@ | |||
1309 | #define V_038004_FMT_BC3 0x00000033 | 1309 | #define V_038004_FMT_BC3 0x00000033 |
1310 | #define V_038004_FMT_BC4 0x00000034 | 1310 | #define V_038004_FMT_BC4 0x00000034 |
1311 | #define V_038004_FMT_BC5 0x00000035 | 1311 | #define V_038004_FMT_BC5 0x00000035 |
1312 | #define V_038004_FMT_BC6 0x00000036 | ||
1313 | #define V_038004_FMT_BC7 0x00000037 | ||
1314 | #define V_038004_FMT_32_AS_32_32_32_32 0x00000038 | ||
1312 | #define R_038010_SQ_TEX_RESOURCE_WORD4_0 0x038010 | 1315 | #define R_038010_SQ_TEX_RESOURCE_WORD4_0 0x038010 |
1313 | #define S_038010_FORMAT_COMP_X(x) (((x) & 0x3) << 0) | 1316 | #define S_038010_FORMAT_COMP_X(x) (((x) & 0x3) << 0) |
1314 | #define G_038010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3) | 1317 | #define G_038010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3) |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index d948265db87e..9bd162fc9b0c 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -906,9 +906,9 @@ static struct radeon_asic cayman_asic = { | |||
906 | .get_vblank_counter = &evergreen_get_vblank_counter, | 906 | .get_vblank_counter = &evergreen_get_vblank_counter, |
907 | .fence_ring_emit = &r600_fence_ring_emit, | 907 | .fence_ring_emit = &r600_fence_ring_emit, |
908 | .cs_parse = &evergreen_cs_parse, | 908 | .cs_parse = &evergreen_cs_parse, |
909 | .copy_blit = NULL, | 909 | .copy_blit = &evergreen_copy_blit, |
910 | .copy_dma = NULL, | 910 | .copy_dma = &evergreen_copy_blit, |
911 | .copy = NULL, | 911 | .copy = &evergreen_copy_blit, |
912 | .get_engine_clock = &radeon_atom_get_engine_clock, | 912 | .get_engine_clock = &radeon_atom_get_engine_clock, |
913 | .set_engine_clock = &radeon_atom_set_engine_clock, | 913 | .set_engine_clock = &radeon_atom_set_engine_clock, |
914 | .get_memory_clock = &radeon_atom_get_memory_clock, | 914 | .get_memory_clock = &radeon_atom_get_memory_clock, |
@@ -1020,6 +1020,8 @@ int radeon_asic_init(struct radeon_device *rdev) | |||
1020 | rdev->asic = &evergreen_asic; | 1020 | rdev->asic = &evergreen_asic; |
1021 | break; | 1021 | break; |
1022 | case CHIP_PALM: | 1022 | case CHIP_PALM: |
1023 | case CHIP_SUMO: | ||
1024 | case CHIP_SUMO2: | ||
1023 | rdev->asic = &sumo_asic; | 1025 | rdev->asic = &sumo_asic; |
1024 | break; | 1026 | break; |
1025 | case CHIP_BARTS: | 1027 | case CHIP_BARTS: |
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c index 8c1916941871..fae00c0d75aa 100644 --- a/drivers/gpu/drm/radeon/radeon_cs.c +++ b/drivers/gpu/drm/radeon/radeon_cs.c | |||
@@ -228,6 +228,7 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
228 | parser.filp = filp; | 228 | parser.filp = filp; |
229 | parser.rdev = rdev; | 229 | parser.rdev = rdev; |
230 | parser.dev = rdev->dev; | 230 | parser.dev = rdev->dev; |
231 | parser.family = rdev->family; | ||
231 | r = radeon_cs_parser_init(&parser, data); | 232 | r = radeon_cs_parser_init(&parser, data); |
232 | if (r) { | 233 | if (r) { |
233 | DRM_ERROR("Failed to initialize parser !\n"); | 234 | DRM_ERROR("Failed to initialize parser !\n"); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 5b61364e31f4..e680501c78ea 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -82,6 +82,8 @@ static const char radeon_family_name[][16] = { | |||
82 | "CYPRESS", | 82 | "CYPRESS", |
83 | "HEMLOCK", | 83 | "HEMLOCK", |
84 | "PALM", | 84 | "PALM", |
85 | "SUMO", | ||
86 | "SUMO2", | ||
85 | "BARTS", | 87 | "BARTS", |
86 | "TURKS", | 88 | "TURKS", |
87 | "CAICOS", | 89 | "CAICOS", |
@@ -752,6 +754,7 @@ int radeon_device_init(struct radeon_device *rdev, | |||
752 | dma_bits = rdev->need_dma32 ? 32 : 40; | 754 | dma_bits = rdev->need_dma32 ? 32 : 40; |
753 | r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits)); | 755 | r = pci_set_dma_mask(rdev->pdev, DMA_BIT_MASK(dma_bits)); |
754 | if (r) { | 756 | if (r) { |
757 | rdev->need_dma32 = true; | ||
755 | printk(KERN_WARNING "radeon: No suitable DMA available.\n"); | 758 | printk(KERN_WARNING "radeon: No suitable DMA available.\n"); |
756 | } | 759 | } |
757 | 760 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index ae247eec87c0..292f73f0ddbd 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -264,6 +264,8 @@ static void radeon_unpin_work_func(struct work_struct *__work) | |||
264 | radeon_bo_unreserve(work->old_rbo); | 264 | radeon_bo_unreserve(work->old_rbo); |
265 | } else | 265 | } else |
266 | DRM_ERROR("failed to reserve buffer after flip\n"); | 266 | DRM_ERROR("failed to reserve buffer after flip\n"); |
267 | |||
268 | drm_gem_object_unreference_unlocked(&work->old_rbo->gem_base); | ||
267 | kfree(work); | 269 | kfree(work); |
268 | } | 270 | } |
269 | 271 | ||
@@ -371,6 +373,8 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc, | |||
371 | new_radeon_fb = to_radeon_framebuffer(fb); | 373 | new_radeon_fb = to_radeon_framebuffer(fb); |
372 | /* schedule unpin of the old buffer */ | 374 | /* schedule unpin of the old buffer */ |
373 | obj = old_radeon_fb->obj; | 375 | obj = old_radeon_fb->obj; |
376 | /* take a reference to the old object */ | ||
377 | drm_gem_object_reference(obj); | ||
374 | rbo = gem_to_radeon_bo(obj); | 378 | rbo = gem_to_radeon_bo(obj); |
375 | work->old_rbo = rbo; | 379 | work->old_rbo = rbo; |
376 | INIT_WORK(&work->work, radeon_unpin_work_func); | 380 | INIT_WORK(&work->work, radeon_unpin_work_func); |
@@ -378,12 +382,9 @@ static int radeon_crtc_page_flip(struct drm_crtc *crtc, | |||
378 | /* We borrow the event spin lock for protecting unpin_work */ | 382 | /* We borrow the event spin lock for protecting unpin_work */ |
379 | spin_lock_irqsave(&dev->event_lock, flags); | 383 | spin_lock_irqsave(&dev->event_lock, flags); |
380 | if (radeon_crtc->unpin_work) { | 384 | if (radeon_crtc->unpin_work) { |
381 | spin_unlock_irqrestore(&dev->event_lock, flags); | ||
382 | kfree(work); | ||
383 | radeon_fence_unref(&fence); | ||
384 | |||
385 | DRM_DEBUG_DRIVER("flip queue: crtc already busy\n"); | 385 | DRM_DEBUG_DRIVER("flip queue: crtc already busy\n"); |
386 | return -EBUSY; | 386 | r = -EBUSY; |
387 | goto unlock_free; | ||
387 | } | 388 | } |
388 | radeon_crtc->unpin_work = work; | 389 | radeon_crtc->unpin_work = work; |
389 | radeon_crtc->deferred_flip_completion = 0; | 390 | radeon_crtc->deferred_flip_completion = 0; |
@@ -497,6 +498,8 @@ pflip_cleanup1: | |||
497 | pflip_cleanup: | 498 | pflip_cleanup: |
498 | spin_lock_irqsave(&dev->event_lock, flags); | 499 | spin_lock_irqsave(&dev->event_lock, flags); |
499 | radeon_crtc->unpin_work = NULL; | 500 | radeon_crtc->unpin_work = NULL; |
501 | unlock_free: | ||
502 | drm_gem_object_unreference_unlocked(old_radeon_fb->obj); | ||
500 | spin_unlock_irqrestore(&dev->event_lock, flags); | 503 | spin_unlock_irqrestore(&dev->event_lock, flags); |
501 | radeon_fence_unref(&fence); | 504 | radeon_fence_unref(&fence); |
502 | kfree(work); | 505 | kfree(work); |
diff --git a/drivers/gpu/drm/radeon/radeon_drv.c b/drivers/gpu/drm/radeon/radeon_drv.c index 1d330606292f..73dfbe8e5f9e 100644 --- a/drivers/gpu/drm/radeon/radeon_drv.c +++ b/drivers/gpu/drm/radeon/radeon_drv.c | |||
@@ -113,7 +113,7 @@ int radeon_benchmarking = 0; | |||
113 | int radeon_testing = 0; | 113 | int radeon_testing = 0; |
114 | int radeon_connector_table = 0; | 114 | int radeon_connector_table = 0; |
115 | int radeon_tv = 1; | 115 | int radeon_tv = 1; |
116 | int radeon_audio = 1; | 116 | int radeon_audio = 0; |
117 | int radeon_disp_priority = 0; | 117 | int radeon_disp_priority = 0; |
118 | int radeon_hw_i2c = 0; | 118 | int radeon_hw_i2c = 0; |
119 | int radeon_pcie_gen2 = 0; | 119 | int radeon_pcie_gen2 = 0; |
@@ -151,7 +151,7 @@ module_param_named(connector_table, radeon_connector_table, int, 0444); | |||
151 | MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); | 151 | MODULE_PARM_DESC(tv, "TV enable (0 = disable)"); |
152 | module_param_named(tv, radeon_tv, int, 0444); | 152 | module_param_named(tv, radeon_tv, int, 0444); |
153 | 153 | ||
154 | MODULE_PARM_DESC(audio, "Audio enable (0 = disable)"); | 154 | MODULE_PARM_DESC(audio, "Audio enable (1 = enable)"); |
155 | module_param_named(audio, radeon_audio, int, 0444); | 155 | module_param_named(audio, radeon_audio, int, 0444); |
156 | 156 | ||
157 | MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); | 157 | MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)"); |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 1b557554696e..03f124d626c2 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -954,10 +954,15 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
954 | int dp_lane_count = 0; | 954 | int dp_lane_count = 0; |
955 | int connector_object_id = 0; | 955 | int connector_object_id = 0; |
956 | int igp_lane_info = 0; | 956 | int igp_lane_info = 0; |
957 | int dig_encoder = dig->dig_encoder; | ||
957 | 958 | ||
958 | if (action == ATOM_TRANSMITTER_ACTION_INIT) | 959 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { |
959 | connector = radeon_get_connector_for_encoder_init(encoder); | 960 | connector = radeon_get_connector_for_encoder_init(encoder); |
960 | else | 961 | /* just needed to avoid bailing in the encoder check. the encoder |
962 | * isn't used for init | ||
963 | */ | ||
964 | dig_encoder = 0; | ||
965 | } else | ||
961 | connector = radeon_get_connector_for_encoder(encoder); | 966 | connector = radeon_get_connector_for_encoder(encoder); |
962 | 967 | ||
963 | if (connector) { | 968 | if (connector) { |
@@ -973,7 +978,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
973 | } | 978 | } |
974 | 979 | ||
975 | /* no dig encoder assigned */ | 980 | /* no dig encoder assigned */ |
976 | if (dig->dig_encoder == -1) | 981 | if (dig_encoder == -1) |
977 | return; | 982 | return; |
978 | 983 | ||
979 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) | 984 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) |
@@ -1023,7 +1028,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
1023 | 1028 | ||
1024 | if (dig->linkb) | 1029 | if (dig->linkb) |
1025 | args.v3.acConfig.ucLinkSel = 1; | 1030 | args.v3.acConfig.ucLinkSel = 1; |
1026 | if (dig->dig_encoder & 1) | 1031 | if (dig_encoder & 1) |
1027 | args.v3.acConfig.ucEncoderSel = 1; | 1032 | args.v3.acConfig.ucEncoderSel = 1; |
1028 | 1033 | ||
1029 | /* Select the PLL for the PHY | 1034 | /* Select the PLL for the PHY |
@@ -1073,7 +1078,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
1073 | args.v3.acConfig.fDualLinkConnector = 1; | 1078 | args.v3.acConfig.fDualLinkConnector = 1; |
1074 | } | 1079 | } |
1075 | } else if (ASIC_IS_DCE32(rdev)) { | 1080 | } else if (ASIC_IS_DCE32(rdev)) { |
1076 | args.v2.acConfig.ucEncoderSel = dig->dig_encoder; | 1081 | args.v2.acConfig.ucEncoderSel = dig_encoder; |
1077 | if (dig->linkb) | 1082 | if (dig->linkb) |
1078 | args.v2.acConfig.ucLinkSel = 1; | 1083 | args.v2.acConfig.ucLinkSel = 1; |
1079 | 1084 | ||
@@ -1100,7 +1105,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
1100 | } else { | 1105 | } else { |
1101 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; | 1106 | args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; |
1102 | 1107 | ||
1103 | if (dig->dig_encoder) | 1108 | if (dig_encoder) |
1104 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; | 1109 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG2_ENCODER; |
1105 | else | 1110 | else |
1106 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; | 1111 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER; |
diff --git a/drivers/gpu/drm/radeon/radeon_family.h b/drivers/gpu/drm/radeon/radeon_family.h index 6f1d9e563e77..ec2f1ea84f81 100644 --- a/drivers/gpu/drm/radeon/radeon_family.h +++ b/drivers/gpu/drm/radeon/radeon_family.h | |||
@@ -81,6 +81,8 @@ enum radeon_family { | |||
81 | CHIP_CYPRESS, | 81 | CHIP_CYPRESS, |
82 | CHIP_HEMLOCK, | 82 | CHIP_HEMLOCK, |
83 | CHIP_PALM, | 83 | CHIP_PALM, |
84 | CHIP_SUMO, | ||
85 | CHIP_SUMO2, | ||
84 | CHIP_BARTS, | 86 | CHIP_BARTS, |
85 | CHIP_TURKS, | 87 | CHIP_TURKS, |
86 | CHIP_CAICOS, | 88 | CHIP_CAICOS, |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 86eda1ea94df..aaa19dc418a0 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -487,6 +487,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev) | |||
487 | case THERMAL_TYPE_RV6XX: | 487 | case THERMAL_TYPE_RV6XX: |
488 | case THERMAL_TYPE_RV770: | 488 | case THERMAL_TYPE_RV770: |
489 | case THERMAL_TYPE_EVERGREEN: | 489 | case THERMAL_TYPE_EVERGREEN: |
490 | case THERMAL_TYPE_NI: | ||
490 | case THERMAL_TYPE_SUMO: | 491 | case THERMAL_TYPE_SUMO: |
491 | rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); | 492 | rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); |
492 | if (IS_ERR(rdev->pm.int_hwmon_dev)) { | 493 | if (IS_ERR(rdev->pm.int_hwmon_dev)) { |
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r600 b/drivers/gpu/drm/radeon/reg_srcs/r600 index 92f1900dc7ca..ea49752ee99c 100644 --- a/drivers/gpu/drm/radeon/reg_srcs/r600 +++ b/drivers/gpu/drm/radeon/reg_srcs/r600 | |||
@@ -758,6 +758,5 @@ r600 0x9400 | |||
758 | 0x00009714 VC_ENHANCE | 758 | 0x00009714 VC_ENHANCE |
759 | 0x00009830 DB_DEBUG | 759 | 0x00009830 DB_DEBUG |
760 | 0x00009838 DB_WATERMARKS | 760 | 0x00009838 DB_WATERMARKS |
761 | 0x00028D28 DB_SRESULTS_COMPARE_STATE0 | ||
762 | 0x00028D44 DB_ALPHA_TO_MASK | 761 | 0x00028D44 DB_ALPHA_TO_MASK |
763 | 0x00009700 VC_CNTL | 762 | 0x00009700 VC_CNTL |
diff --git a/drivers/media/dvb/dvb-usb/anysee.c b/drivers/media/dvb/dvb-usb/anysee.c index 4dc1ca333236..7c327b54308e 100644 --- a/drivers/media/dvb/dvb-usb/anysee.c +++ b/drivers/media/dvb/dvb-usb/anysee.c | |||
@@ -60,8 +60,6 @@ static int anysee_ctrl_msg(struct dvb_usb_device *d, u8 *sbuf, u8 slen, | |||
60 | int act_len, ret; | 60 | int act_len, ret; |
61 | u8 buf[64]; | 61 | u8 buf[64]; |
62 | 62 | ||
63 | if (slen > sizeof(buf)) | ||
64 | slen = sizeof(buf); | ||
65 | memcpy(&buf[0], sbuf, slen); | 63 | memcpy(&buf[0], sbuf, slen); |
66 | buf[60] = state->seq++; | 64 | buf[60] = state->seq++; |
67 | 65 | ||
@@ -180,30 +178,37 @@ static int anysee_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msg, | |||
180 | { | 178 | { |
181 | struct dvb_usb_device *d = i2c_get_adapdata(adap); | 179 | struct dvb_usb_device *d = i2c_get_adapdata(adap); |
182 | int ret = 0, inc, i = 0; | 180 | int ret = 0, inc, i = 0; |
181 | u8 buf[52]; /* 4 + 48 (I2C WR USB command header + I2C WR max) */ | ||
183 | 182 | ||
184 | if (mutex_lock_interruptible(&d->i2c_mutex) < 0) | 183 | if (mutex_lock_interruptible(&d->i2c_mutex) < 0) |
185 | return -EAGAIN; | 184 | return -EAGAIN; |
186 | 185 | ||
187 | while (i < num) { | 186 | while (i < num) { |
188 | if (num > i + 1 && (msg[i+1].flags & I2C_M_RD)) { | 187 | if (num > i + 1 && (msg[i+1].flags & I2C_M_RD)) { |
189 | u8 buf[6]; | 188 | if (msg[i].len > 2 || msg[i+1].len > 60) { |
189 | ret = -EOPNOTSUPP; | ||
190 | break; | ||
191 | } | ||
190 | buf[0] = CMD_I2C_READ; | 192 | buf[0] = CMD_I2C_READ; |
191 | buf[1] = (msg[i].addr << 1) | 0x01; | 193 | buf[1] = (msg[i].addr << 1) | 0x01; |
192 | buf[2] = msg[i].buf[0]; | 194 | buf[2] = msg[i].buf[0]; |
193 | buf[3] = msg[i].buf[1]; | 195 | buf[3] = msg[i].buf[1]; |
194 | buf[4] = msg[i].len-1; | 196 | buf[4] = msg[i].len-1; |
195 | buf[5] = msg[i+1].len; | 197 | buf[5] = msg[i+1].len; |
196 | ret = anysee_ctrl_msg(d, buf, sizeof(buf), msg[i+1].buf, | 198 | ret = anysee_ctrl_msg(d, buf, 6, msg[i+1].buf, |
197 | msg[i+1].len); | 199 | msg[i+1].len); |
198 | inc = 2; | 200 | inc = 2; |
199 | } else { | 201 | } else { |
200 | u8 buf[4+msg[i].len]; | 202 | if (msg[i].len > 48) { |
203 | ret = -EOPNOTSUPP; | ||
204 | break; | ||
205 | } | ||
201 | buf[0] = CMD_I2C_WRITE; | 206 | buf[0] = CMD_I2C_WRITE; |
202 | buf[1] = (msg[i].addr << 1); | 207 | buf[1] = (msg[i].addr << 1); |
203 | buf[2] = msg[i].len; | 208 | buf[2] = msg[i].len; |
204 | buf[3] = 0x01; | 209 | buf[3] = 0x01; |
205 | memcpy(&buf[4], msg[i].buf, msg[i].len); | 210 | memcpy(&buf[4], msg[i].buf, msg[i].len); |
206 | ret = anysee_ctrl_msg(d, buf, sizeof(buf), NULL, 0); | 211 | ret = anysee_ctrl_msg(d, buf, 4 + msg[i].len, NULL, 0); |
207 | inc = 1; | 212 | inc = 1; |
208 | } | 213 | } |
209 | if (ret) | 214 | if (ret) |
diff --git a/drivers/media/media-devnode.c b/drivers/media/media-devnode.c index af5263c6625a..7b42ace419d9 100644 --- a/drivers/media/media-devnode.c +++ b/drivers/media/media-devnode.c | |||
@@ -213,14 +213,14 @@ int __must_check media_devnode_register(struct media_devnode *mdev) | |||
213 | 213 | ||
214 | /* Part 1: Find a free minor number */ | 214 | /* Part 1: Find a free minor number */ |
215 | mutex_lock(&media_devnode_lock); | 215 | mutex_lock(&media_devnode_lock); |
216 | minor = find_next_zero_bit(media_devnode_nums, 0, MEDIA_NUM_DEVICES); | 216 | minor = find_next_zero_bit(media_devnode_nums, MEDIA_NUM_DEVICES, 0); |
217 | if (minor == MEDIA_NUM_DEVICES) { | 217 | if (minor == MEDIA_NUM_DEVICES) { |
218 | mutex_unlock(&media_devnode_lock); | 218 | mutex_unlock(&media_devnode_lock); |
219 | printk(KERN_ERR "could not get a free minor\n"); | 219 | printk(KERN_ERR "could not get a free minor\n"); |
220 | return -ENFILE; | 220 | return -ENFILE; |
221 | } | 221 | } |
222 | 222 | ||
223 | set_bit(mdev->minor, media_devnode_nums); | 223 | set_bit(minor, media_devnode_nums); |
224 | mutex_unlock(&media_devnode_lock); | 224 | mutex_unlock(&media_devnode_lock); |
225 | 225 | ||
226 | mdev->minor = minor; | 226 | mdev->minor = minor; |
diff --git a/drivers/media/video/gspca/coarse_expo_autogain.h b/drivers/media/video/gspca/coarse_expo_autogain.h deleted file mode 100644 index 1cb9d941eaf6..000000000000 --- a/drivers/media/video/gspca/coarse_expo_autogain.h +++ /dev/null | |||
@@ -1,116 +0,0 @@ | |||
1 | /* | ||
2 | * Auto gain algorithm for camera's with a coarse exposure control | ||
3 | * | ||
4 | * Copyright (C) 2010 Hans de Goede <hdegoede@redhat.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | /* Autogain + exposure algorithm for cameras with a coarse exposure control | ||
22 | (usually this means we can only control the clockdiv to change exposure) | ||
23 | As changing the clockdiv so that the fps drops from 30 to 15 fps for | ||
24 | example, will lead to a huge exposure change (it effectively doubles), | ||
25 | this algorithm normally tries to only adjust the gain (between 40 and | ||
26 | 80 %) and if that does not help, only then changes exposure. This leads | ||
27 | to a much more stable image then using the knee algorithm which at | ||
28 | certain points of the knee graph will only try to adjust exposure, | ||
29 | which leads to oscilating as one exposure step is huge. | ||
30 | |||
31 | Note this assumes that the sd struct for the cam in question has | ||
32 | exp_too_high_cnt and exp_too_high_cnt int members for use by this function. | ||
33 | |||
34 | Returns 0 if no changes were made, 1 if the gain and or exposure settings | ||
35 | where changed. */ | ||
36 | static int gspca_coarse_grained_expo_autogain(struct gspca_dev *gspca_dev, | ||
37 | int avg_lum, int desired_avg_lum, int deadzone) | ||
38 | { | ||
39 | int i, steps, gain, orig_gain, exposure, orig_exposure; | ||
40 | int gain_low, gain_high; | ||
41 | const struct ctrl *gain_ctrl = NULL; | ||
42 | const struct ctrl *exposure_ctrl = NULL; | ||
43 | struct sd *sd = (struct sd *) gspca_dev; | ||
44 | int retval = 0; | ||
45 | |||
46 | for (i = 0; i < gspca_dev->sd_desc->nctrls; i++) { | ||
47 | if (gspca_dev->ctrl_dis & (1 << i)) | ||
48 | continue; | ||
49 | if (gspca_dev->sd_desc->ctrls[i].qctrl.id == V4L2_CID_GAIN) | ||
50 | gain_ctrl = &gspca_dev->sd_desc->ctrls[i]; | ||
51 | if (gspca_dev->sd_desc->ctrls[i].qctrl.id == V4L2_CID_EXPOSURE) | ||
52 | exposure_ctrl = &gspca_dev->sd_desc->ctrls[i]; | ||
53 | } | ||
54 | if (!gain_ctrl || !exposure_ctrl) { | ||
55 | PDEBUG(D_ERR, "Error: gspca_coarse_grained_expo_autogain " | ||
56 | "called on cam without gain or exposure"); | ||
57 | return 0; | ||
58 | } | ||
59 | |||
60 | if (gain_ctrl->get(gspca_dev, &gain) || | ||
61 | exposure_ctrl->get(gspca_dev, &exposure)) | ||
62 | return 0; | ||
63 | |||
64 | orig_gain = gain; | ||
65 | orig_exposure = exposure; | ||
66 | gain_low = | ||
67 | (gain_ctrl->qctrl.maximum - gain_ctrl->qctrl.minimum) / 5 * 2; | ||
68 | gain_low += gain_ctrl->qctrl.minimum; | ||
69 | gain_high = | ||
70 | (gain_ctrl->qctrl.maximum - gain_ctrl->qctrl.minimum) / 5 * 4; | ||
71 | gain_high += gain_ctrl->qctrl.minimum; | ||
72 | |||
73 | /* If we are of a multiple of deadzone, do multiple steps to reach the | ||
74 | desired lumination fast (with the risc of a slight overshoot) */ | ||
75 | steps = (desired_avg_lum - avg_lum) / deadzone; | ||
76 | |||
77 | PDEBUG(D_FRAM, "autogain: lum: %d, desired: %d, steps: %d", | ||
78 | avg_lum, desired_avg_lum, steps); | ||
79 | |||
80 | if ((gain + steps) > gain_high && | ||
81 | sd->exposure < exposure_ctrl->qctrl.maximum) { | ||
82 | gain = gain_high; | ||
83 | sd->exp_too_low_cnt++; | ||
84 | } else if ((gain + steps) < gain_low && | ||
85 | sd->exposure > exposure_ctrl->qctrl.minimum) { | ||
86 | gain = gain_low; | ||
87 | sd->exp_too_high_cnt++; | ||
88 | } else { | ||
89 | gain += steps; | ||
90 | if (gain > gain_ctrl->qctrl.maximum) | ||
91 | gain = gain_ctrl->qctrl.maximum; | ||
92 | else if (gain < gain_ctrl->qctrl.minimum) | ||
93 | gain = gain_ctrl->qctrl.minimum; | ||
94 | sd->exp_too_high_cnt = 0; | ||
95 | sd->exp_too_low_cnt = 0; | ||
96 | } | ||
97 | |||
98 | if (sd->exp_too_high_cnt > 3) { | ||
99 | exposure--; | ||
100 | sd->exp_too_high_cnt = 0; | ||
101 | } else if (sd->exp_too_low_cnt > 3) { | ||
102 | exposure++; | ||
103 | sd->exp_too_low_cnt = 0; | ||
104 | } | ||
105 | |||
106 | if (gain != orig_gain) { | ||
107 | gain_ctrl->set(gspca_dev, gain); | ||
108 | retval = 1; | ||
109 | } | ||
110 | if (exposure != orig_exposure) { | ||
111 | exposure_ctrl->set(gspca_dev, exposure); | ||
112 | retval = 1; | ||
113 | } | ||
114 | |||
115 | return retval; | ||
116 | } | ||
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c index 36a46fc78734..057e287b9152 100644 --- a/drivers/media/video/gspca/ov519.c +++ b/drivers/media/video/gspca/ov519.c | |||
@@ -609,7 +609,7 @@ static const struct v4l2_pix_format ovfx2_ov3610_mode[] = { | |||
609 | * buffers, there are some pretty strict real time constraints for | 609 | * buffers, there are some pretty strict real time constraints for |
610 | * isochronous transfer for larger frame sizes). | 610 | * isochronous transfer for larger frame sizes). |
611 | */ | 611 | */ |
612 | /*jfm: this value works well for 1600x1200, but not 800x600 - see isoc_init */ | 612 | /*jfm: this value does not work for 800x600 - see isoc_init */ |
613 | #define OVFX2_BULK_SIZE (13 * 4096) | 613 | #define OVFX2_BULK_SIZE (13 * 4096) |
614 | 614 | ||
615 | /* I2C registers */ | 615 | /* I2C registers */ |
@@ -3307,6 +3307,7 @@ static int sd_config(struct gspca_dev *gspca_dev, | |||
3307 | 3307 | ||
3308 | gspca_dev->cam.ctrls = sd->ctrls; | 3308 | gspca_dev->cam.ctrls = sd->ctrls; |
3309 | sd->quality = QUALITY_DEF; | 3309 | sd->quality = QUALITY_DEF; |
3310 | sd->frame_rate = 15; | ||
3310 | 3311 | ||
3311 | return 0; | 3312 | return 0; |
3312 | } | 3313 | } |
@@ -3469,7 +3470,6 @@ static int sd_init(struct gspca_dev *gspca_dev) | |||
3469 | ARRAY_SIZE(init_519_ov7660)); | 3470 | ARRAY_SIZE(init_519_ov7660)); |
3470 | write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660)); | 3471 | write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660)); |
3471 | sd->gspca_dev.curr_mode = 1; /* 640x480 */ | 3472 | sd->gspca_dev.curr_mode = 1; /* 640x480 */ |
3472 | sd->frame_rate = 15; | ||
3473 | ov519_set_mode(sd); | 3473 | ov519_set_mode(sd); |
3474 | ov519_set_fr(sd); | 3474 | ov519_set_fr(sd); |
3475 | sd->ctrls[COLORS].max = 4; /* 0..4 */ | 3475 | sd->ctrls[COLORS].max = 4; /* 0..4 */ |
@@ -3511,7 +3511,7 @@ static int sd_isoc_init(struct gspca_dev *gspca_dev) | |||
3511 | 3511 | ||
3512 | switch (sd->bridge) { | 3512 | switch (sd->bridge) { |
3513 | case BRIDGE_OVFX2: | 3513 | case BRIDGE_OVFX2: |
3514 | if (gspca_dev->width == 1600) | 3514 | if (gspca_dev->width != 800) |
3515 | gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE; | 3515 | gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE; |
3516 | else | 3516 | else |
3517 | gspca_dev->cam.bulk_size = 7 * 4096; | 3517 | gspca_dev->cam.bulk_size = 7 * 4096; |
@@ -4478,7 +4478,7 @@ static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev, | |||
4478 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); | 4478 | gspca_frame_add(gspca_dev, INTER_PACKET, data, len); |
4479 | 4479 | ||
4480 | /* A short read signals EOF */ | 4480 | /* A short read signals EOF */ |
4481 | if (len < OVFX2_BULK_SIZE) { | 4481 | if (len < gspca_dev->cam.bulk_size) { |
4482 | /* If the frame is short, and it is one of the first ones | 4482 | /* If the frame is short, and it is one of the first ones |
4483 | the sensor and bridge are still syncing, so drop it. */ | 4483 | the sensor and bridge are still syncing, so drop it. */ |
4484 | if (sd->first_frame) { | 4484 | if (sd->first_frame) { |
diff --git a/drivers/media/video/gspca/sonixj.c b/drivers/media/video/gspca/sonixj.c index 6415aff5cbd1..81b8a600783b 100644 --- a/drivers/media/video/gspca/sonixj.c +++ b/drivers/media/video/gspca/sonixj.c | |||
@@ -60,7 +60,7 @@ struct sd { | |||
60 | 60 | ||
61 | u32 pktsz; /* (used by pkt_scan) */ | 61 | u32 pktsz; /* (used by pkt_scan) */ |
62 | u16 npkt; | 62 | u16 npkt; |
63 | u8 nchg; | 63 | s8 nchg; |
64 | s8 short_mark; | 64 | s8 short_mark; |
65 | 65 | ||
66 | u8 quality; /* image quality */ | 66 | u8 quality; /* image quality */ |
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h b/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h index b538dce96f78..a14a84a5079b 100644 --- a/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h +++ b/drivers/media/video/gspca/stv06xx/stv06xx_hdcs.h | |||
@@ -125,7 +125,7 @@ | |||
125 | #define HDCS_SLEEP_MODE (1 << 1) | 125 | #define HDCS_SLEEP_MODE (1 << 1) |
126 | 126 | ||
127 | #define HDCS_DEFAULT_EXPOSURE 48 | 127 | #define HDCS_DEFAULT_EXPOSURE 48 |
128 | #define HDCS_DEFAULT_GAIN 128 | 128 | #define HDCS_DEFAULT_GAIN 50 |
129 | 129 | ||
130 | static int hdcs_probe_1x00(struct sd *sd); | 130 | static int hdcs_probe_1x00(struct sd *sd); |
131 | static int hdcs_probe_1020(struct sd *sd); | 131 | static int hdcs_probe_1020(struct sd *sd); |
diff --git a/drivers/media/video/ivtv/ivtv-driver.c b/drivers/media/video/ivtv/ivtv-driver.c index a4e4dfdbc2f2..0fb75524484d 100644 --- a/drivers/media/video/ivtv/ivtv-driver.c +++ b/drivers/media/video/ivtv/ivtv-driver.c | |||
@@ -1328,6 +1328,8 @@ int ivtv_init_on_first_open(struct ivtv *itv) | |||
1328 | if (!itv->has_cx23415) | 1328 | if (!itv->has_cx23415) |
1329 | write_reg_sync(0x03, IVTV_REG_DMACONTROL); | 1329 | write_reg_sync(0x03, IVTV_REG_DMACONTROL); |
1330 | 1330 | ||
1331 | ivtv_s_std_enc(itv, &itv->tuner_std); | ||
1332 | |||
1331 | /* Default interrupts enabled. For the PVR350 this includes the | 1333 | /* Default interrupts enabled. For the PVR350 this includes the |
1332 | decoder VSYNC interrupt, which is always on. It is not only used | 1334 | decoder VSYNC interrupt, which is always on. It is not only used |
1333 | during decoding but also by the OSD. | 1335 | during decoding but also by the OSD. |
@@ -1336,12 +1338,10 @@ int ivtv_init_on_first_open(struct ivtv *itv) | |||
1336 | if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) { | 1338 | if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) { |
1337 | ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_INIT | IVTV_IRQ_DEC_VSYNC); | 1339 | ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_INIT | IVTV_IRQ_DEC_VSYNC); |
1338 | ivtv_set_osd_alpha(itv); | 1340 | ivtv_set_osd_alpha(itv); |
1339 | } | 1341 | ivtv_s_std_dec(itv, &itv->tuner_std); |
1340 | else | 1342 | } else { |
1341 | ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_INIT); | 1343 | ivtv_clear_irq_mask(itv, IVTV_IRQ_MASK_INIT); |
1342 | 1344 | } | |
1343 | /* For cards with video out, this call needs interrupts enabled */ | ||
1344 | ivtv_s_std(NULL, &fh, &itv->tuner_std); | ||
1345 | 1345 | ||
1346 | /* Setup initial controls */ | 1346 | /* Setup initial controls */ |
1347 | cx2341x_handler_setup(&itv->cxhdl); | 1347 | cx2341x_handler_setup(&itv->cxhdl); |
diff --git a/drivers/media/video/ivtv/ivtv-firmware.c b/drivers/media/video/ivtv/ivtv-firmware.c index 14a1cea1d70d..02c5adebf517 100644 --- a/drivers/media/video/ivtv/ivtv-firmware.c +++ b/drivers/media/video/ivtv/ivtv-firmware.c | |||
@@ -280,8 +280,6 @@ int ivtv_firmware_restart(struct ivtv *itv) | |||
280 | { | 280 | { |
281 | int rc = 0; | 281 | int rc = 0; |
282 | v4l2_std_id std; | 282 | v4l2_std_id std; |
283 | struct ivtv_open_id fh; | ||
284 | fh.itv = itv; | ||
285 | 283 | ||
286 | if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) | 284 | if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) |
287 | /* Display test image during restart */ | 285 | /* Display test image during restart */ |
@@ -301,14 +299,19 @@ int ivtv_firmware_restart(struct ivtv *itv) | |||
301 | /* Allow settings to reload */ | 299 | /* Allow settings to reload */ |
302 | ivtv_mailbox_cache_invalidate(itv); | 300 | ivtv_mailbox_cache_invalidate(itv); |
303 | 301 | ||
304 | /* Restore video standard */ | 302 | /* Restore encoder video standard */ |
305 | std = itv->std; | 303 | std = itv->std; |
306 | itv->std = 0; | 304 | itv->std = 0; |
307 | ivtv_s_std(NULL, &fh, &std); | 305 | ivtv_s_std_enc(itv, &std); |
308 | 306 | ||
309 | if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) { | 307 | if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) { |
310 | ivtv_init_mpeg_decoder(itv); | 308 | ivtv_init_mpeg_decoder(itv); |
311 | 309 | ||
310 | /* Restore decoder video standard */ | ||
311 | std = itv->std_out; | ||
312 | itv->std_out = 0; | ||
313 | ivtv_s_std_dec(itv, &std); | ||
314 | |||
312 | /* Restore framebuffer if active */ | 315 | /* Restore framebuffer if active */ |
313 | if (itv->ivtvfb_restore) | 316 | if (itv->ivtvfb_restore) |
314 | itv->ivtvfb_restore(itv); | 317 | itv->ivtvfb_restore(itv); |
diff --git a/drivers/media/video/ivtv/ivtv-ioctl.c b/drivers/media/video/ivtv/ivtv-ioctl.c index 1689783cd19a..f9e347dae739 100644 --- a/drivers/media/video/ivtv/ivtv-ioctl.c +++ b/drivers/media/video/ivtv/ivtv-ioctl.c | |||
@@ -1071,28 +1071,8 @@ static int ivtv_g_std(struct file *file, void *fh, v4l2_std_id *std) | |||
1071 | return 0; | 1071 | return 0; |
1072 | } | 1072 | } |
1073 | 1073 | ||
1074 | int ivtv_s_std(struct file *file, void *fh, v4l2_std_id *std) | 1074 | void ivtv_s_std_enc(struct ivtv *itv, v4l2_std_id *std) |
1075 | { | 1075 | { |
1076 | DEFINE_WAIT(wait); | ||
1077 | struct ivtv *itv = fh2id(fh)->itv; | ||
1078 | struct yuv_playback_info *yi = &itv->yuv_info; | ||
1079 | int f; | ||
1080 | |||
1081 | if ((*std & V4L2_STD_ALL) == 0) | ||
1082 | return -EINVAL; | ||
1083 | |||
1084 | if (*std == itv->std) | ||
1085 | return 0; | ||
1086 | |||
1087 | if (test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags) || | ||
1088 | atomic_read(&itv->capturing) > 0 || | ||
1089 | atomic_read(&itv->decoding) > 0) { | ||
1090 | /* Switching standard would turn off the radio or mess | ||
1091 | with already running streams, prevent that by | ||
1092 | returning EBUSY. */ | ||
1093 | return -EBUSY; | ||
1094 | } | ||
1095 | |||
1096 | itv->std = *std; | 1076 | itv->std = *std; |
1097 | itv->is_60hz = (*std & V4L2_STD_525_60) ? 1 : 0; | 1077 | itv->is_60hz = (*std & V4L2_STD_525_60) ? 1 : 0; |
1098 | itv->is_50hz = !itv->is_60hz; | 1078 | itv->is_50hz = !itv->is_60hz; |
@@ -1106,48 +1086,79 @@ int ivtv_s_std(struct file *file, void *fh, v4l2_std_id *std) | |||
1106 | if (itv->hw_flags & IVTV_HW_CX25840) | 1086 | if (itv->hw_flags & IVTV_HW_CX25840) |
1107 | itv->vbi.sliced_decoder_line_size = itv->is_60hz ? 272 : 284; | 1087 | itv->vbi.sliced_decoder_line_size = itv->is_60hz ? 272 : 284; |
1108 | 1088 | ||
1109 | IVTV_DEBUG_INFO("Switching standard to %llx.\n", (unsigned long long)itv->std); | ||
1110 | |||
1111 | /* Tuner */ | 1089 | /* Tuner */ |
1112 | ivtv_call_all(itv, core, s_std, itv->std); | 1090 | ivtv_call_all(itv, core, s_std, itv->std); |
1091 | } | ||
1113 | 1092 | ||
1114 | if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) { | 1093 | void ivtv_s_std_dec(struct ivtv *itv, v4l2_std_id *std) |
1115 | /* set display standard */ | 1094 | { |
1116 | itv->std_out = *std; | 1095 | struct yuv_playback_info *yi = &itv->yuv_info; |
1117 | itv->is_out_60hz = itv->is_60hz; | 1096 | DEFINE_WAIT(wait); |
1118 | itv->is_out_50hz = itv->is_50hz; | 1097 | int f; |
1119 | ivtv_call_all(itv, video, s_std_output, itv->std_out); | 1098 | |
1120 | 1099 | /* set display standard */ | |
1121 | /* | 1100 | itv->std_out = *std; |
1122 | * The next firmware call is time sensitive. Time it to | 1101 | itv->is_out_60hz = (*std & V4L2_STD_525_60) ? 1 : 0; |
1123 | * avoid risk of a hard lock, by trying to ensure the call | 1102 | itv->is_out_50hz = !itv->is_out_60hz; |
1124 | * happens within the first 100 lines of the top field. | 1103 | ivtv_call_all(itv, video, s_std_output, itv->std_out); |
1125 | * Make 4 attempts to sync to the decoder before giving up. | 1104 | |
1126 | */ | 1105 | /* |
1127 | for (f = 0; f < 4; f++) { | 1106 | * The next firmware call is time sensitive. Time it to |
1128 | prepare_to_wait(&itv->vsync_waitq, &wait, | 1107 | * avoid risk of a hard lock, by trying to ensure the call |
1129 | TASK_UNINTERRUPTIBLE); | 1108 | * happens within the first 100 lines of the top field. |
1130 | if ((read_reg(IVTV_REG_DEC_LINE_FIELD) >> 16) < 100) | 1109 | * Make 4 attempts to sync to the decoder before giving up. |
1131 | break; | 1110 | */ |
1132 | schedule_timeout(msecs_to_jiffies(25)); | 1111 | for (f = 0; f < 4; f++) { |
1133 | } | 1112 | prepare_to_wait(&itv->vsync_waitq, &wait, |
1134 | finish_wait(&itv->vsync_waitq, &wait); | 1113 | TASK_UNINTERRUPTIBLE); |
1135 | 1114 | if ((read_reg(IVTV_REG_DEC_LINE_FIELD) >> 16) < 100) | |
1136 | if (f == 4) | 1115 | break; |
1137 | IVTV_WARN("Mode change failed to sync to decoder\n"); | 1116 | schedule_timeout(msecs_to_jiffies(25)); |
1138 | |||
1139 | ivtv_vapi(itv, CX2341X_DEC_SET_STANDARD, 1, itv->is_out_50hz); | ||
1140 | itv->main_rect.left = itv->main_rect.top = 0; | ||
1141 | itv->main_rect.width = 720; | ||
1142 | itv->main_rect.height = itv->cxhdl.height; | ||
1143 | ivtv_vapi(itv, CX2341X_OSD_SET_FRAMEBUFFER_WINDOW, 4, | ||
1144 | 720, itv->main_rect.height, 0, 0); | ||
1145 | yi->main_rect = itv->main_rect; | ||
1146 | if (!itv->osd_info) { | ||
1147 | yi->osd_full_w = 720; | ||
1148 | yi->osd_full_h = itv->is_out_50hz ? 576 : 480; | ||
1149 | } | ||
1150 | } | 1117 | } |
1118 | finish_wait(&itv->vsync_waitq, &wait); | ||
1119 | |||
1120 | if (f == 4) | ||
1121 | IVTV_WARN("Mode change failed to sync to decoder\n"); | ||
1122 | |||
1123 | ivtv_vapi(itv, CX2341X_DEC_SET_STANDARD, 1, itv->is_out_50hz); | ||
1124 | itv->main_rect.left = 0; | ||
1125 | itv->main_rect.top = 0; | ||
1126 | itv->main_rect.width = 720; | ||
1127 | itv->main_rect.height = itv->is_out_50hz ? 576 : 480; | ||
1128 | ivtv_vapi(itv, CX2341X_OSD_SET_FRAMEBUFFER_WINDOW, 4, | ||
1129 | 720, itv->main_rect.height, 0, 0); | ||
1130 | yi->main_rect = itv->main_rect; | ||
1131 | if (!itv->osd_info) { | ||
1132 | yi->osd_full_w = 720; | ||
1133 | yi->osd_full_h = itv->is_out_50hz ? 576 : 480; | ||
1134 | } | ||
1135 | } | ||
1136 | |||
1137 | int ivtv_s_std(struct file *file, void *fh, v4l2_std_id *std) | ||
1138 | { | ||
1139 | struct ivtv *itv = fh2id(fh)->itv; | ||
1140 | |||
1141 | if ((*std & V4L2_STD_ALL) == 0) | ||
1142 | return -EINVAL; | ||
1143 | |||
1144 | if (*std == itv->std) | ||
1145 | return 0; | ||
1146 | |||
1147 | if (test_bit(IVTV_F_I_RADIO_USER, &itv->i_flags) || | ||
1148 | atomic_read(&itv->capturing) > 0 || | ||
1149 | atomic_read(&itv->decoding) > 0) { | ||
1150 | /* Switching standard would mess with already running | ||
1151 | streams, prevent that by returning EBUSY. */ | ||
1152 | return -EBUSY; | ||
1153 | } | ||
1154 | |||
1155 | IVTV_DEBUG_INFO("Switching standard to %llx.\n", | ||
1156 | (unsigned long long)itv->std); | ||
1157 | |||
1158 | ivtv_s_std_enc(itv, std); | ||
1159 | if (itv->v4l2_cap & V4L2_CAP_VIDEO_OUTPUT) | ||
1160 | ivtv_s_std_dec(itv, std); | ||
1161 | |||
1151 | return 0; | 1162 | return 0; |
1152 | } | 1163 | } |
1153 | 1164 | ||
diff --git a/drivers/media/video/ivtv/ivtv-ioctl.h b/drivers/media/video/ivtv/ivtv-ioctl.h index 58f003412afd..89185caeafae 100644 --- a/drivers/media/video/ivtv/ivtv-ioctl.h +++ b/drivers/media/video/ivtv/ivtv-ioctl.h | |||
@@ -27,7 +27,8 @@ u16 ivtv_get_service_set(struct v4l2_sliced_vbi_format *fmt); | |||
27 | void ivtv_set_osd_alpha(struct ivtv *itv); | 27 | void ivtv_set_osd_alpha(struct ivtv *itv); |
28 | int ivtv_set_speed(struct ivtv *itv, int speed); | 28 | int ivtv_set_speed(struct ivtv *itv, int speed); |
29 | void ivtv_set_funcs(struct video_device *vdev); | 29 | void ivtv_set_funcs(struct video_device *vdev); |
30 | int ivtv_s_std(struct file *file, void *fh, v4l2_std_id *std); | 30 | void ivtv_s_std_enc(struct ivtv *itv, v4l2_std_id *std); |
31 | void ivtv_s_std_dec(struct ivtv *itv, v4l2_std_id *std); | ||
31 | int ivtv_s_frequency(struct file *file, void *fh, struct v4l2_frequency *vf); | 32 | int ivtv_s_frequency(struct file *file, void *fh, struct v4l2_frequency *vf); |
32 | int ivtv_s_input(struct file *file, void *fh, unsigned int inp); | 33 | int ivtv_s_input(struct file *file, void *fh, unsigned int inp); |
33 | long ivtv_v4l2_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); | 34 | long ivtv_v4l2_ioctl(struct file *filp, unsigned int cmd, unsigned long arg); |
diff --git a/drivers/media/video/ivtv/ivtv-streams.c b/drivers/media/video/ivtv/ivtv-streams.c index 942683336555..e7794dc1330e 100644 --- a/drivers/media/video/ivtv/ivtv-streams.c +++ b/drivers/media/video/ivtv/ivtv-streams.c | |||
@@ -589,7 +589,7 @@ int ivtv_start_v4l2_encode_stream(struct ivtv_stream *s) | |||
589 | v4l2_subdev_call(itv->sd_audio, audio, s_stream, 1); | 589 | v4l2_subdev_call(itv->sd_audio, audio, s_stream, 1); |
590 | /* Avoid unpredictable PCI bus hang - disable video clocks */ | 590 | /* Avoid unpredictable PCI bus hang - disable video clocks */ |
591 | v4l2_subdev_call(itv->sd_video, video, s_stream, 0); | 591 | v4l2_subdev_call(itv->sd_video, video, s_stream, 0); |
592 | ivtv_msleep_timeout(300, 1); | 592 | ivtv_msleep_timeout(300, 0); |
593 | ivtv_vapi(itv, CX2341X_ENC_INITIALIZE_INPUT, 0); | 593 | ivtv_vapi(itv, CX2341X_ENC_INITIALIZE_INPUT, 0); |
594 | v4l2_subdev_call(itv->sd_video, video, s_stream, 1); | 594 | v4l2_subdev_call(itv->sd_video, video, s_stream, 1); |
595 | } | 595 | } |
@@ -834,7 +834,7 @@ int ivtv_stop_v4l2_encode_stream(struct ivtv_stream *s, int gop_end) | |||
834 | } | 834 | } |
835 | 835 | ||
836 | /* Handle any pending interrupts */ | 836 | /* Handle any pending interrupts */ |
837 | ivtv_msleep_timeout(100, 1); | 837 | ivtv_msleep_timeout(100, 0); |
838 | } | 838 | } |
839 | 839 | ||
840 | atomic_dec(&itv->capturing); | 840 | atomic_dec(&itv->capturing); |
diff --git a/drivers/media/video/ivtv/ivtv-vbi.c b/drivers/media/video/ivtv/ivtv-vbi.c index b6eb51ce7735..293db806d936 100644 --- a/drivers/media/video/ivtv/ivtv-vbi.c +++ b/drivers/media/video/ivtv/ivtv-vbi.c | |||
@@ -71,7 +71,7 @@ static void ivtv_set_wss(struct ivtv *itv, int enabled, int mode) | |||
71 | Turning this signal on and off can confuse certain | 71 | Turning this signal on and off can confuse certain |
72 | TVs. As far as I can tell there is no reason not to | 72 | TVs. As far as I can tell there is no reason not to |
73 | transmit this signal. */ | 73 | transmit this signal. */ |
74 | if ((itv->std & V4L2_STD_625_50) && !enabled) { | 74 | if ((itv->std_out & V4L2_STD_625_50) && !enabled) { |
75 | enabled = 1; | 75 | enabled = 1; |
76 | mode = 0x08; /* 4x3 full format */ | 76 | mode = 0x08; /* 4x3 full format */ |
77 | } | 77 | } |
diff --git a/drivers/media/video/ivtv/ivtvfb.c b/drivers/media/video/ivtv/ivtvfb.c index 17247451c693..6b7c9c823330 100644 --- a/drivers/media/video/ivtv/ivtvfb.c +++ b/drivers/media/video/ivtv/ivtvfb.c | |||
@@ -247,7 +247,7 @@ static int ivtvfb_set_osd_coords(struct ivtv *itv, const struct ivtv_osd_coords | |||
247 | 247 | ||
248 | static int ivtvfb_set_display_window(struct ivtv *itv, struct v4l2_rect *ivtv_window) | 248 | static int ivtvfb_set_display_window(struct ivtv *itv, struct v4l2_rect *ivtv_window) |
249 | { | 249 | { |
250 | int osd_height_limit = itv->is_50hz ? 576 : 480; | 250 | int osd_height_limit = itv->is_out_50hz ? 576 : 480; |
251 | 251 | ||
252 | /* Only fail if resolution too high, otherwise fudge the start coords. */ | 252 | /* Only fail if resolution too high, otherwise fudge the start coords. */ |
253 | if ((ivtv_window->height > osd_height_limit) || (ivtv_window->width > IVTV_OSD_MAX_WIDTH)) | 253 | if ((ivtv_window->height > osd_height_limit) || (ivtv_window->width > IVTV_OSD_MAX_WIDTH)) |
@@ -471,9 +471,9 @@ static int ivtvfb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long ar | |||
471 | vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT | | 471 | vblank.flags = FB_VBLANK_HAVE_COUNT |FB_VBLANK_HAVE_VCOUNT | |
472 | FB_VBLANK_HAVE_VSYNC; | 472 | FB_VBLANK_HAVE_VSYNC; |
473 | trace = read_reg(IVTV_REG_DEC_LINE_FIELD) >> 16; | 473 | trace = read_reg(IVTV_REG_DEC_LINE_FIELD) >> 16; |
474 | if (itv->is_50hz && trace > 312) | 474 | if (itv->is_out_50hz && trace > 312) |
475 | trace -= 312; | 475 | trace -= 312; |
476 | else if (itv->is_60hz && trace > 262) | 476 | else if (itv->is_out_60hz && trace > 262) |
477 | trace -= 262; | 477 | trace -= 262; |
478 | if (trace == 1) | 478 | if (trace == 1) |
479 | vblank.flags |= FB_VBLANK_VSYNCING; | 479 | vblank.flags |= FB_VBLANK_VSYNCING; |
@@ -656,7 +656,7 @@ static int _ivtvfb_check_var(struct fb_var_screeninfo *var, struct ivtv *itv) | |||
656 | IVTVFB_DEBUG_INFO("ivtvfb_check_var\n"); | 656 | IVTVFB_DEBUG_INFO("ivtvfb_check_var\n"); |
657 | 657 | ||
658 | /* Set base references for mode calcs. */ | 658 | /* Set base references for mode calcs. */ |
659 | if (itv->is_50hz) { | 659 | if (itv->is_out_50hz) { |
660 | pixclock = 84316; | 660 | pixclock = 84316; |
661 | hlimit = 776; | 661 | hlimit = 776; |
662 | vlimit = 591; | 662 | vlimit = 591; |
@@ -784,12 +784,12 @@ static int _ivtvfb_check_var(struct fb_var_screeninfo *var, struct ivtv *itv) | |||
784 | If the margins are too large, just center the screen | 784 | If the margins are too large, just center the screen |
785 | (enforcing margins causes too many problems) */ | 785 | (enforcing margins causes too many problems) */ |
786 | 786 | ||
787 | if (var->left_margin + var->xres > IVTV_OSD_MAX_WIDTH + 1) { | 787 | if (var->left_margin + var->xres > IVTV_OSD_MAX_WIDTH + 1) |
788 | var->left_margin = 1 + ((IVTV_OSD_MAX_WIDTH - var->xres) / 2); | 788 | var->left_margin = 1 + ((IVTV_OSD_MAX_WIDTH - var->xres) / 2); |
789 | } | 789 | |
790 | if (var->upper_margin + var->yres > (itv->is_50hz ? 577 : 481)) { | 790 | if (var->upper_margin + var->yres > (itv->is_out_50hz ? 577 : 481)) |
791 | var->upper_margin = 1 + (((itv->is_50hz ? 576 : 480) - var->yres) / 2); | 791 | var->upper_margin = 1 + (((itv->is_out_50hz ? 576 : 480) - |
792 | } | 792 | var->yres) / 2); |
793 | 793 | ||
794 | /* Maintain overall 'size' for a constant refresh rate */ | 794 | /* Maintain overall 'size' for a constant refresh rate */ |
795 | var->right_margin = hlimit - var->left_margin - var->xres; | 795 | var->right_margin = hlimit - var->left_margin - var->xres; |
@@ -836,7 +836,12 @@ static int ivtvfb_pan_display(struct fb_var_screeninfo *var, struct fb_info *inf | |||
836 | u32 osd_pan_index; | 836 | u32 osd_pan_index; |
837 | struct ivtv *itv = (struct ivtv *) info->par; | 837 | struct ivtv *itv = (struct ivtv *) info->par; |
838 | 838 | ||
839 | osd_pan_index = (var->xoffset + (var->yoffset * var->xres_virtual))*var->bits_per_pixel/8; | 839 | if (var->yoffset + info->var.yres > info->var.yres_virtual || |
840 | var->xoffset + info->var.xres > info->var.xres_virtual) | ||
841 | return -EINVAL; | ||
842 | |||
843 | osd_pan_index = var->yoffset * info->fix.line_length | ||
844 | + var->xoffset * info->var.bits_per_pixel / 8; | ||
840 | write_reg(osd_pan_index, 0x02A0C); | 845 | write_reg(osd_pan_index, 0x02A0C); |
841 | 846 | ||
842 | /* Pass this info back the yuv handler */ | 847 | /* Pass this info back the yuv handler */ |
@@ -1003,19 +1008,21 @@ static int ivtvfb_init_vidmode(struct ivtv *itv) | |||
1003 | /* Hardware coords start at 0, user coords start at 1. */ | 1008 | /* Hardware coords start at 0, user coords start at 1. */ |
1004 | osd_left--; | 1009 | osd_left--; |
1005 | 1010 | ||
1006 | start_window.left = osd_left >= 0 ? osd_left : ((IVTV_OSD_MAX_WIDTH - start_window.width) / 2); | 1011 | start_window.left = osd_left >= 0 ? |
1012 | osd_left : ((IVTV_OSD_MAX_WIDTH - start_window.width) / 2); | ||
1007 | 1013 | ||
1008 | oi->display_byte_stride = | 1014 | oi->display_byte_stride = |
1009 | start_window.width * oi->bytes_per_pixel; | 1015 | start_window.width * oi->bytes_per_pixel; |
1010 | 1016 | ||
1011 | /* Vertical size & position */ | 1017 | /* Vertical size & position */ |
1012 | 1018 | ||
1013 | max_height = itv->is_50hz ? 576 : 480; | 1019 | max_height = itv->is_out_50hz ? 576 : 480; |
1014 | 1020 | ||
1015 | if (osd_yres > max_height) | 1021 | if (osd_yres > max_height) |
1016 | osd_yres = max_height; | 1022 | osd_yres = max_height; |
1017 | 1023 | ||
1018 | start_window.height = osd_yres ? osd_yres : itv->is_50hz ? 480 : 400; | 1024 | start_window.height = osd_yres ? |
1025 | osd_yres : itv->is_out_50hz ? 480 : 400; | ||
1019 | 1026 | ||
1020 | /* Check vertical start (osd_upper). */ | 1027 | /* Check vertical start (osd_upper). */ |
1021 | if (osd_upper + start_window.height > max_height + 1) { | 1028 | if (osd_upper + start_window.height > max_height + 1) { |
diff --git a/drivers/media/video/omap3isp/isp.c b/drivers/media/video/omap3isp/isp.c index 472a69359e60..c9fd04ee70a8 100644 --- a/drivers/media/video/omap3isp/isp.c +++ b/drivers/media/video/omap3isp/isp.c | |||
@@ -391,7 +391,7 @@ static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus) | |||
391 | }; | 391 | }; |
392 | int i; | 392 | int i; |
393 | 393 | ||
394 | dev_dbg(isp->dev, ""); | 394 | dev_dbg(isp->dev, "ISP IRQ: "); |
395 | 395 | ||
396 | for (i = 0; i < ARRAY_SIZE(name); i++) { | 396 | for (i = 0; i < ARRAY_SIZE(name); i++) { |
397 | if ((1 << i) & irqstatus) | 397 | if ((1 << i) & irqstatus) |
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c index 398864370267..4e4d4122d9a6 100644 --- a/drivers/media/video/soc_camera.c +++ b/drivers/media/video/soc_camera.c | |||
@@ -1512,7 +1512,7 @@ static int video_dev_create(struct soc_camera_device *icd) | |||
1512 | */ | 1512 | */ |
1513 | static int soc_camera_video_start(struct soc_camera_device *icd) | 1513 | static int soc_camera_video_start(struct soc_camera_device *icd) |
1514 | { | 1514 | { |
1515 | struct device_type *type = icd->vdev->dev.type; | 1515 | const struct device_type *type = icd->vdev->dev.type; |
1516 | int ret; | 1516 | int ret; |
1517 | 1517 | ||
1518 | if (!icd->dev.parent) | 1518 | if (!icd->dev.parent) |
diff --git a/drivers/media/video/uvc/uvc_entity.c b/drivers/media/video/uvc/uvc_entity.c index ede7852bb1df..c3ab0c813be2 100644 --- a/drivers/media/video/uvc/uvc_entity.c +++ b/drivers/media/video/uvc/uvc_entity.c | |||
@@ -30,7 +30,7 @@ static int uvc_mc_register_entity(struct uvc_video_chain *chain, | |||
30 | struct uvc_entity *remote; | 30 | struct uvc_entity *remote; |
31 | unsigned int i; | 31 | unsigned int i; |
32 | u8 remote_pad; | 32 | u8 remote_pad; |
33 | int ret; | 33 | int ret = 0; |
34 | 34 | ||
35 | for (i = 0; i < entity->num_pads; ++i) { | 35 | for (i = 0; i < entity->num_pads; ++i) { |
36 | struct media_entity *source; | 36 | struct media_entity *source; |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 259ece047afc..5b2e2155b413 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
@@ -435,6 +435,9 @@ static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) | |||
435 | reg = regulator_get(host->dev, "vmmc_aux"); | 435 | reg = regulator_get(host->dev, "vmmc_aux"); |
436 | host->vcc_aux = IS_ERR(reg) ? NULL : reg; | 436 | host->vcc_aux = IS_ERR(reg) ? NULL : reg; |
437 | 437 | ||
438 | /* For eMMC do not power off when not in sleep state */ | ||
439 | if (mmc_slot(host).no_regulator_off_init) | ||
440 | return 0; | ||
438 | /* | 441 | /* |
439 | * UGLY HACK: workaround regulator framework bugs. | 442 | * UGLY HACK: workaround regulator framework bugs. |
440 | * When the bootloader leaves a supply active, it's | 443 | * When the bootloader leaves a supply active, it's |
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c index 59f17acf7f68..f02c34d26d1b 100644 --- a/drivers/pci/intel-iommu.c +++ b/drivers/pci/intel-iommu.c | |||
@@ -3388,7 +3388,7 @@ static void __init init_iommu_pm_ops(void) | |||
3388 | } | 3388 | } |
3389 | 3389 | ||
3390 | #else | 3390 | #else |
3391 | static inline int init_iommu_pm_ops(void) { } | 3391 | static inline void init_iommu_pm_ops(void) {} |
3392 | #endif /* CONFIG_PM */ | 3392 | #endif /* CONFIG_PM */ |
3393 | 3393 | ||
3394 | /* | 3394 | /* |
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index f822e13dc04b..ce2aabf5c550 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
@@ -1051,4 +1051,13 @@ config RTC_DRV_TILE | |||
1051 | Enable support for the Linux driver side of the Tilera | 1051 | Enable support for the Linux driver side of the Tilera |
1052 | hypervisor's real-time clock interface. | 1052 | hypervisor's real-time clock interface. |
1053 | 1053 | ||
1054 | config RTC_DRV_PUV3 | ||
1055 | tristate "PKUnity v3 RTC support" | ||
1056 | depends on ARCH_PUV3 | ||
1057 | help | ||
1058 | This enables support for the RTC in the PKUnity-v3 SoCs. | ||
1059 | |||
1060 | This drive can also be built as a module. If so, the module | ||
1061 | will be called rtc-puv3. | ||
1062 | |||
1054 | endif # RTC_CLASS | 1063 | endif # RTC_CLASS |
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index 213d725f16d4..0ffefe877bfa 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile | |||
@@ -78,6 +78,7 @@ obj-$(CONFIG_RTC_DRV_PCF50633) += rtc-pcf50633.o | |||
78 | obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o | 78 | obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o |
79 | obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o | 79 | obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o |
80 | obj-$(CONFIG_RTC_DRV_PS3) += rtc-ps3.o | 80 | obj-$(CONFIG_RTC_DRV_PS3) += rtc-ps3.o |
81 | obj-$(CONFIG_RTC_DRV_PUV3) += rtc-puv3.o | ||
81 | obj-$(CONFIG_RTC_DRV_PXA) += rtc-pxa.o | 82 | obj-$(CONFIG_RTC_DRV_PXA) += rtc-pxa.o |
82 | obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o | 83 | obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o |
83 | obj-$(CONFIG_RTC_DRV_RP5C01) += rtc-rp5c01.o | 84 | obj-$(CONFIG_RTC_DRV_RP5C01) += rtc-rp5c01.o |
diff --git a/drivers/rtc/rtc-m41t93.c b/drivers/rtc/rtc-m41t93.c index 1a84b3e227d1..7317d3b9a3d5 100644 --- a/drivers/rtc/rtc-m41t93.c +++ b/drivers/rtc/rtc-m41t93.c | |||
@@ -189,7 +189,7 @@ static int __devinit m41t93_probe(struct spi_device *spi) | |||
189 | 189 | ||
190 | static int __devexit m41t93_remove(struct spi_device *spi) | 190 | static int __devexit m41t93_remove(struct spi_device *spi) |
191 | { | 191 | { |
192 | struct rtc_device *rtc = platform_get_drvdata(spi); | 192 | struct rtc_device *rtc = spi_get_drvdata(spi); |
193 | 193 | ||
194 | if (rtc) | 194 | if (rtc) |
195 | rtc_device_unregister(rtc); | 195 | rtc_device_unregister(rtc); |
diff --git a/drivers/rtc/rtc-puv3.c b/drivers/rtc/rtc-puv3.c new file mode 100644 index 000000000000..46f14b82f3ab --- /dev/null +++ b/drivers/rtc/rtc-puv3.c | |||
@@ -0,0 +1,359 @@ | |||
1 | /* | ||
2 | * RTC driver code specific to PKUnity SoC and UniCore ISA | ||
3 | * | ||
4 | * Maintained by GUAN Xue-tao <gxt@mprc.pku.edu.cn> | ||
5 | * Copyright (C) 2001-2010 Guan Xuetao | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | |||
12 | #include <linux/module.h> | ||
13 | #include <linux/fs.h> | ||
14 | #include <linux/string.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/rtc.h> | ||
19 | #include <linux/bcd.h> | ||
20 | #include <linux/clk.h> | ||
21 | #include <linux/log2.h> | ||
22 | #include <linux/slab.h> | ||
23 | #include <linux/uaccess.h> | ||
24 | #include <linux/io.h> | ||
25 | |||
26 | #include <asm/irq.h> | ||
27 | #include <mach/hardware.h> | ||
28 | |||
29 | static struct resource *puv3_rtc_mem; | ||
30 | |||
31 | static int puv3_rtc_alarmno = IRQ_RTCAlarm; | ||
32 | static int puv3_rtc_tickno = IRQ_RTC; | ||
33 | |||
34 | static DEFINE_SPINLOCK(puv3_rtc_pie_lock); | ||
35 | |||
36 | /* IRQ Handlers */ | ||
37 | static irqreturn_t puv3_rtc_alarmirq(int irq, void *id) | ||
38 | { | ||
39 | struct rtc_device *rdev = id; | ||
40 | |||
41 | writel(readl(RTC_RTSR) | RTC_RTSR_AL, RTC_RTSR); | ||
42 | rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF); | ||
43 | return IRQ_HANDLED; | ||
44 | } | ||
45 | |||
46 | static irqreturn_t puv3_rtc_tickirq(int irq, void *id) | ||
47 | { | ||
48 | struct rtc_device *rdev = id; | ||
49 | |||
50 | writel(readl(RTC_RTSR) | RTC_RTSR_HZ, RTC_RTSR); | ||
51 | rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF); | ||
52 | return IRQ_HANDLED; | ||
53 | } | ||
54 | |||
55 | /* Update control registers */ | ||
56 | static void puv3_rtc_setaie(int to) | ||
57 | { | ||
58 | unsigned int tmp; | ||
59 | |||
60 | pr_debug("%s: aie=%d\n", __func__, to); | ||
61 | |||
62 | tmp = readl(RTC_RTSR) & ~RTC_RTSR_ALE; | ||
63 | |||
64 | if (to) | ||
65 | tmp |= RTC_RTSR_ALE; | ||
66 | |||
67 | writel(tmp, RTC_RTSR); | ||
68 | } | ||
69 | |||
70 | static int puv3_rtc_setpie(struct device *dev, int enabled) | ||
71 | { | ||
72 | unsigned int tmp; | ||
73 | |||
74 | pr_debug("%s: pie=%d\n", __func__, enabled); | ||
75 | |||
76 | spin_lock_irq(&puv3_rtc_pie_lock); | ||
77 | tmp = readl(RTC_RTSR) & ~RTC_RTSR_HZE; | ||
78 | |||
79 | if (enabled) | ||
80 | tmp |= RTC_RTSR_HZE; | ||
81 | |||
82 | writel(tmp, RTC_RTSR); | ||
83 | spin_unlock_irq(&puv3_rtc_pie_lock); | ||
84 | |||
85 | return 0; | ||
86 | } | ||
87 | |||
88 | /* Time read/write */ | ||
89 | static int puv3_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm) | ||
90 | { | ||
91 | rtc_time_to_tm(readl(RTC_RCNR), rtc_tm); | ||
92 | |||
93 | pr_debug("read time %02x.%02x.%02x %02x/%02x/%02x\n", | ||
94 | rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday, | ||
95 | rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec); | ||
96 | |||
97 | return 0; | ||
98 | } | ||
99 | |||
100 | static int puv3_rtc_settime(struct device *dev, struct rtc_time *tm) | ||
101 | { | ||
102 | unsigned long rtc_count = 0; | ||
103 | |||
104 | pr_debug("set time %02d.%02d.%02d %02d/%02d/%02d\n", | ||
105 | tm->tm_year, tm->tm_mon, tm->tm_mday, | ||
106 | tm->tm_hour, tm->tm_min, tm->tm_sec); | ||
107 | |||
108 | rtc_tm_to_time(tm, &rtc_count); | ||
109 | writel(rtc_count, RTC_RCNR); | ||
110 | |||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | static int puv3_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm) | ||
115 | { | ||
116 | struct rtc_time *alm_tm = &alrm->time; | ||
117 | |||
118 | rtc_time_to_tm(readl(RTC_RTAR), alm_tm); | ||
119 | |||
120 | alrm->enabled = readl(RTC_RTSR) & RTC_RTSR_ALE; | ||
121 | |||
122 | pr_debug("read alarm %02x %02x.%02x.%02x %02x/%02x/%02x\n", | ||
123 | alrm->enabled, | ||
124 | alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday, | ||
125 | alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec); | ||
126 | |||
127 | return 0; | ||
128 | } | ||
129 | |||
130 | static int puv3_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm) | ||
131 | { | ||
132 | struct rtc_time *tm = &alrm->time; | ||
133 | unsigned long rtcalarm_count = 0; | ||
134 | |||
135 | pr_debug("puv3_rtc_setalarm: %d, %02x/%02x/%02x %02x.%02x.%02x\n", | ||
136 | alrm->enabled, | ||
137 | tm->tm_mday & 0xff, tm->tm_mon & 0xff, tm->tm_year & 0xff, | ||
138 | tm->tm_hour & 0xff, tm->tm_min & 0xff, tm->tm_sec); | ||
139 | |||
140 | rtc_tm_to_time(tm, &rtcalarm_count); | ||
141 | writel(rtcalarm_count, RTC_RTAR); | ||
142 | |||
143 | puv3_rtc_setaie(alrm->enabled); | ||
144 | |||
145 | if (alrm->enabled) | ||
146 | enable_irq_wake(puv3_rtc_alarmno); | ||
147 | else | ||
148 | disable_irq_wake(puv3_rtc_alarmno); | ||
149 | |||
150 | return 0; | ||
151 | } | ||
152 | |||
153 | static int puv3_rtc_proc(struct device *dev, struct seq_file *seq) | ||
154 | { | ||
155 | seq_printf(seq, "periodic_IRQ\t: %s\n", | ||
156 | (readl(RTC_RTSR) & RTC_RTSR_HZE) ? "yes" : "no"); | ||
157 | return 0; | ||
158 | } | ||
159 | |||
160 | static int puv3_rtc_open(struct device *dev) | ||
161 | { | ||
162 | struct platform_device *pdev = to_platform_device(dev); | ||
163 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | ||
164 | int ret; | ||
165 | |||
166 | ret = request_irq(puv3_rtc_alarmno, puv3_rtc_alarmirq, | ||
167 | IRQF_DISABLED, "pkunity-rtc alarm", rtc_dev); | ||
168 | |||
169 | if (ret) { | ||
170 | dev_err(dev, "IRQ%d error %d\n", puv3_rtc_alarmno, ret); | ||
171 | return ret; | ||
172 | } | ||
173 | |||
174 | ret = request_irq(puv3_rtc_tickno, puv3_rtc_tickirq, | ||
175 | IRQF_DISABLED, "pkunity-rtc tick", rtc_dev); | ||
176 | |||
177 | if (ret) { | ||
178 | dev_err(dev, "IRQ%d error %d\n", puv3_rtc_tickno, ret); | ||
179 | goto tick_err; | ||
180 | } | ||
181 | |||
182 | return ret; | ||
183 | |||
184 | tick_err: | ||
185 | free_irq(puv3_rtc_alarmno, rtc_dev); | ||
186 | return ret; | ||
187 | } | ||
188 | |||
189 | static void puv3_rtc_release(struct device *dev) | ||
190 | { | ||
191 | struct platform_device *pdev = to_platform_device(dev); | ||
192 | struct rtc_device *rtc_dev = platform_get_drvdata(pdev); | ||
193 | |||
194 | /* do not clear AIE here, it may be needed for wake */ | ||
195 | puv3_rtc_setpie(dev, 0); | ||
196 | free_irq(puv3_rtc_alarmno, rtc_dev); | ||
197 | free_irq(puv3_rtc_tickno, rtc_dev); | ||
198 | } | ||
199 | |||
200 | static const struct rtc_class_ops puv3_rtcops = { | ||
201 | .open = puv3_rtc_open, | ||
202 | .release = puv3_rtc_release, | ||
203 | .read_time = puv3_rtc_gettime, | ||
204 | .set_time = puv3_rtc_settime, | ||
205 | .read_alarm = puv3_rtc_getalarm, | ||
206 | .set_alarm = puv3_rtc_setalarm, | ||
207 | .proc = puv3_rtc_proc, | ||
208 | }; | ||
209 | |||
210 | static void puv3_rtc_enable(struct platform_device *pdev, int en) | ||
211 | { | ||
212 | if (!en) { | ||
213 | writel(readl(RTC_RTSR) & ~RTC_RTSR_HZE, RTC_RTSR); | ||
214 | } else { | ||
215 | /* re-enable the device, and check it is ok */ | ||
216 | if ((readl(RTC_RTSR) & RTC_RTSR_HZE) == 0) { | ||
217 | dev_info(&pdev->dev, "rtc disabled, re-enabling\n"); | ||
218 | writel(readl(RTC_RTSR) | RTC_RTSR_HZE, RTC_RTSR); | ||
219 | } | ||
220 | } | ||
221 | } | ||
222 | |||
223 | static int puv3_rtc_remove(struct platform_device *dev) | ||
224 | { | ||
225 | struct rtc_device *rtc = platform_get_drvdata(dev); | ||
226 | |||
227 | platform_set_drvdata(dev, NULL); | ||
228 | rtc_device_unregister(rtc); | ||
229 | |||
230 | puv3_rtc_setpie(&dev->dev, 0); | ||
231 | puv3_rtc_setaie(0); | ||
232 | |||
233 | release_resource(puv3_rtc_mem); | ||
234 | kfree(puv3_rtc_mem); | ||
235 | |||
236 | return 0; | ||
237 | } | ||
238 | |||
239 | static int puv3_rtc_probe(struct platform_device *pdev) | ||
240 | { | ||
241 | struct rtc_device *rtc; | ||
242 | struct resource *res; | ||
243 | int ret; | ||
244 | |||
245 | pr_debug("%s: probe=%p\n", __func__, pdev); | ||
246 | |||
247 | /* find the IRQs */ | ||
248 | puv3_rtc_tickno = platform_get_irq(pdev, 1); | ||
249 | if (puv3_rtc_tickno < 0) { | ||
250 | dev_err(&pdev->dev, "no irq for rtc tick\n"); | ||
251 | return -ENOENT; | ||
252 | } | ||
253 | |||
254 | puv3_rtc_alarmno = platform_get_irq(pdev, 0); | ||
255 | if (puv3_rtc_alarmno < 0) { | ||
256 | dev_err(&pdev->dev, "no irq for alarm\n"); | ||
257 | return -ENOENT; | ||
258 | } | ||
259 | |||
260 | pr_debug("PKUnity_rtc: tick irq %d, alarm irq %d\n", | ||
261 | puv3_rtc_tickno, puv3_rtc_alarmno); | ||
262 | |||
263 | /* get the memory region */ | ||
264 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
265 | if (res == NULL) { | ||
266 | dev_err(&pdev->dev, "failed to get memory region resource\n"); | ||
267 | return -ENOENT; | ||
268 | } | ||
269 | |||
270 | puv3_rtc_mem = request_mem_region(res->start, | ||
271 | res->end-res->start+1, | ||
272 | pdev->name); | ||
273 | |||
274 | if (puv3_rtc_mem == NULL) { | ||
275 | dev_err(&pdev->dev, "failed to reserve memory region\n"); | ||
276 | ret = -ENOENT; | ||
277 | goto err_nores; | ||
278 | } | ||
279 | |||
280 | puv3_rtc_enable(pdev, 1); | ||
281 | |||
282 | /* register RTC and exit */ | ||
283 | rtc = rtc_device_register("pkunity", &pdev->dev, &puv3_rtcops, | ||
284 | THIS_MODULE); | ||
285 | |||
286 | if (IS_ERR(rtc)) { | ||
287 | dev_err(&pdev->dev, "cannot attach rtc\n"); | ||
288 | ret = PTR_ERR(rtc); | ||
289 | goto err_nortc; | ||
290 | } | ||
291 | |||
292 | /* platform setup code should have handled this; sigh */ | ||
293 | if (!device_can_wakeup(&pdev->dev)) | ||
294 | device_init_wakeup(&pdev->dev, 1); | ||
295 | |||
296 | platform_set_drvdata(pdev, rtc); | ||
297 | return 0; | ||
298 | |||
299 | err_nortc: | ||
300 | puv3_rtc_enable(pdev, 0); | ||
301 | release_resource(puv3_rtc_mem); | ||
302 | |||
303 | err_nores: | ||
304 | return ret; | ||
305 | } | ||
306 | |||
307 | #ifdef CONFIG_PM | ||
308 | |||
309 | static int ticnt_save; | ||
310 | |||
311 | static int puv3_rtc_suspend(struct platform_device *pdev, pm_message_t state) | ||
312 | { | ||
313 | /* save RTAR for anyone using periodic interrupts */ | ||
314 | ticnt_save = readl(RTC_RTAR); | ||
315 | puv3_rtc_enable(pdev, 0); | ||
316 | return 0; | ||
317 | } | ||
318 | |||
319 | static int puv3_rtc_resume(struct platform_device *pdev) | ||
320 | { | ||
321 | puv3_rtc_enable(pdev, 1); | ||
322 | writel(ticnt_save, RTC_RTAR); | ||
323 | return 0; | ||
324 | } | ||
325 | #else | ||
326 | #define puv3_rtc_suspend NULL | ||
327 | #define puv3_rtc_resume NULL | ||
328 | #endif | ||
329 | |||
330 | static struct platform_driver puv3_rtcdrv = { | ||
331 | .probe = puv3_rtc_probe, | ||
332 | .remove = __devexit_p(puv3_rtc_remove), | ||
333 | .suspend = puv3_rtc_suspend, | ||
334 | .resume = puv3_rtc_resume, | ||
335 | .driver = { | ||
336 | .name = "PKUnity-v3-RTC", | ||
337 | .owner = THIS_MODULE, | ||
338 | } | ||
339 | }; | ||
340 | |||
341 | static char __initdata banner[] = "PKUnity-v3 RTC, (c) 2009 PKUnity Co.\n"; | ||
342 | |||
343 | static int __init puv3_rtc_init(void) | ||
344 | { | ||
345 | printk(banner); | ||
346 | return platform_driver_register(&puv3_rtcdrv); | ||
347 | } | ||
348 | |||
349 | static void __exit puv3_rtc_exit(void) | ||
350 | { | ||
351 | platform_driver_unregister(&puv3_rtcdrv); | ||
352 | } | ||
353 | |||
354 | module_init(puv3_rtc_init); | ||
355 | module_exit(puv3_rtc_exit); | ||
356 | |||
357 | MODULE_DESCRIPTION("RTC Driver for the PKUnity v3 chip"); | ||
358 | MODULE_AUTHOR("Hu Dongliang"); | ||
359 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c index 55e8f721e38a..570d4da10696 100644 --- a/drivers/s390/cio/qdio_main.c +++ b/drivers/s390/cio/qdio_main.c | |||
@@ -416,7 +416,7 @@ static void process_buffer_error(struct qdio_q *q, int count) | |||
416 | 416 | ||
417 | /* special handling for no target buffer empty */ | 417 | /* special handling for no target buffer empty */ |
418 | if ((!q->is_input_q && | 418 | if ((!q->is_input_q && |
419 | (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) { | 419 | (q->sbal[q->first_to_check]->element[15].sflags) == 0x10)) { |
420 | qperf_inc(q, target_full); | 420 | qperf_inc(q, target_full); |
421 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", | 421 | DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%02x", |
422 | q->first_to_check); | 422 | q->first_to_check); |
@@ -427,8 +427,8 @@ static void process_buffer_error(struct qdio_q *q, int count) | |||
427 | DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); | 427 | DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr); |
428 | DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count); | 428 | DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count); |
429 | DBF_ERROR("F14:%2x F15:%2x", | 429 | DBF_ERROR("F14:%2x F15:%2x", |
430 | q->sbal[q->first_to_check]->element[14].flags & 0xff, | 430 | q->sbal[q->first_to_check]->element[14].sflags, |
431 | q->sbal[q->first_to_check]->element[15].flags & 0xff); | 431 | q->sbal[q->first_to_check]->element[15].sflags); |
432 | 432 | ||
433 | /* | 433 | /* |
434 | * Interrupts may be avoided as long as the error is present | 434 | * Interrupts may be avoided as long as the error is present |
diff --git a/drivers/s390/net/qeth_core.h b/drivers/s390/net/qeth_core.h index 55c6aa1c9704..d3cee33e554c 100644 --- a/drivers/s390/net/qeth_core.h +++ b/drivers/s390/net/qeth_core.h | |||
@@ -361,7 +361,7 @@ enum qeth_header_ids { | |||
361 | 361 | ||
362 | static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale) | 362 | static inline int qeth_is_last_sbale(struct qdio_buffer_element *sbale) |
363 | { | 363 | { |
364 | return (sbale->flags & SBAL_FLAGS_LAST_ENTRY); | 364 | return (sbale->eflags & SBAL_EFLAGS_LAST_ENTRY); |
365 | } | 365 | } |
366 | 366 | ||
367 | enum qeth_qdio_buffer_states { | 367 | enum qeth_qdio_buffer_states { |
diff --git a/drivers/s390/net/qeth_core_main.c b/drivers/s390/net/qeth_core_main.c index 503678a30981..dd08f7b42fb8 100644 --- a/drivers/s390/net/qeth_core_main.c +++ b/drivers/s390/net/qeth_core_main.c | |||
@@ -890,7 +890,7 @@ static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, | |||
890 | struct sk_buff *skb; | 890 | struct sk_buff *skb; |
891 | 891 | ||
892 | /* is PCI flag set on buffer? */ | 892 | /* is PCI flag set on buffer? */ |
893 | if (buf->buffer->element[0].flags & 0x40) | 893 | if (buf->buffer->element[0].sflags & SBAL_SFLAGS0_PCI_REQ) |
894 | atomic_dec(&queue->set_pci_flags_count); | 894 | atomic_dec(&queue->set_pci_flags_count); |
895 | 895 | ||
896 | skb = skb_dequeue(&buf->skb_list); | 896 | skb = skb_dequeue(&buf->skb_list); |
@@ -906,9 +906,11 @@ static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue, | |||
906 | buf->is_header[i] = 0; | 906 | buf->is_header[i] = 0; |
907 | buf->buffer->element[i].length = 0; | 907 | buf->buffer->element[i].length = 0; |
908 | buf->buffer->element[i].addr = NULL; | 908 | buf->buffer->element[i].addr = NULL; |
909 | buf->buffer->element[i].flags = 0; | 909 | buf->buffer->element[i].eflags = 0; |
910 | buf->buffer->element[i].sflags = 0; | ||
910 | } | 911 | } |
911 | buf->buffer->element[15].flags = 0; | 912 | buf->buffer->element[15].eflags = 0; |
913 | buf->buffer->element[15].sflags = 0; | ||
912 | buf->next_element_to_fill = 0; | 914 | buf->next_element_to_fill = 0; |
913 | atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); | 915 | atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY); |
914 | } | 916 | } |
@@ -2368,9 +2370,10 @@ static int qeth_init_input_buffer(struct qeth_card *card, | |||
2368 | buf->buffer->element[i].length = PAGE_SIZE; | 2370 | buf->buffer->element[i].length = PAGE_SIZE; |
2369 | buf->buffer->element[i].addr = pool_entry->elements[i]; | 2371 | buf->buffer->element[i].addr = pool_entry->elements[i]; |
2370 | if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) | 2372 | if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1) |
2371 | buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY; | 2373 | buf->buffer->element[i].eflags = SBAL_EFLAGS_LAST_ENTRY; |
2372 | else | 2374 | else |
2373 | buf->buffer->element[i].flags = 0; | 2375 | buf->buffer->element[i].eflags = 0; |
2376 | buf->buffer->element[i].sflags = 0; | ||
2374 | } | 2377 | } |
2375 | return 0; | 2378 | return 0; |
2376 | } | 2379 | } |
@@ -2718,11 +2721,11 @@ int qeth_check_qdio_errors(struct qeth_card *card, struct qdio_buffer *buf, | |||
2718 | if (qdio_error) { | 2721 | if (qdio_error) { |
2719 | QETH_CARD_TEXT(card, 2, dbftext); | 2722 | QETH_CARD_TEXT(card, 2, dbftext); |
2720 | QETH_CARD_TEXT_(card, 2, " F15=%02X", | 2723 | QETH_CARD_TEXT_(card, 2, " F15=%02X", |
2721 | buf->element[15].flags & 0xff); | 2724 | buf->element[15].sflags); |
2722 | QETH_CARD_TEXT_(card, 2, " F14=%02X", | 2725 | QETH_CARD_TEXT_(card, 2, " F14=%02X", |
2723 | buf->element[14].flags & 0xff); | 2726 | buf->element[14].sflags); |
2724 | QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); | 2727 | QETH_CARD_TEXT_(card, 2, " qerr=%X", qdio_error); |
2725 | if ((buf->element[15].flags & 0xff) == 0x12) { | 2728 | if ((buf->element[15].sflags) == 0x12) { |
2726 | card->stats.rx_dropped++; | 2729 | card->stats.rx_dropped++; |
2727 | return 0; | 2730 | return 0; |
2728 | } else | 2731 | } else |
@@ -2798,7 +2801,7 @@ EXPORT_SYMBOL_GPL(qeth_queue_input_buffer); | |||
2798 | static int qeth_handle_send_error(struct qeth_card *card, | 2801 | static int qeth_handle_send_error(struct qeth_card *card, |
2799 | struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) | 2802 | struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err) |
2800 | { | 2803 | { |
2801 | int sbalf15 = buffer->buffer->element[15].flags & 0xff; | 2804 | int sbalf15 = buffer->buffer->element[15].sflags; |
2802 | 2805 | ||
2803 | QETH_CARD_TEXT(card, 6, "hdsnderr"); | 2806 | QETH_CARD_TEXT(card, 6, "hdsnderr"); |
2804 | if (card->info.type == QETH_CARD_TYPE_IQD) { | 2807 | if (card->info.type == QETH_CARD_TYPE_IQD) { |
@@ -2907,8 +2910,8 @@ static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, | |||
2907 | 2910 | ||
2908 | for (i = index; i < index + count; ++i) { | 2911 | for (i = index; i < index + count; ++i) { |
2909 | buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; | 2912 | buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q]; |
2910 | buf->buffer->element[buf->next_element_to_fill - 1].flags |= | 2913 | buf->buffer->element[buf->next_element_to_fill - 1].eflags |= |
2911 | SBAL_FLAGS_LAST_ENTRY; | 2914 | SBAL_EFLAGS_LAST_ENTRY; |
2912 | 2915 | ||
2913 | if (queue->card->info.type == QETH_CARD_TYPE_IQD) | 2916 | if (queue->card->info.type == QETH_CARD_TYPE_IQD) |
2914 | continue; | 2917 | continue; |
@@ -2921,7 +2924,7 @@ static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, | |||
2921 | /* it's likely that we'll go to packing | 2924 | /* it's likely that we'll go to packing |
2922 | * mode soon */ | 2925 | * mode soon */ |
2923 | atomic_inc(&queue->set_pci_flags_count); | 2926 | atomic_inc(&queue->set_pci_flags_count); |
2924 | buf->buffer->element[0].flags |= 0x40; | 2927 | buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; |
2925 | } | 2928 | } |
2926 | } else { | 2929 | } else { |
2927 | if (!atomic_read(&queue->set_pci_flags_count)) { | 2930 | if (!atomic_read(&queue->set_pci_flags_count)) { |
@@ -2934,7 +2937,7 @@ static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index, | |||
2934 | * further send was requested by the stack | 2937 | * further send was requested by the stack |
2935 | */ | 2938 | */ |
2936 | atomic_inc(&queue->set_pci_flags_count); | 2939 | atomic_inc(&queue->set_pci_flags_count); |
2937 | buf->buffer->element[0].flags |= 0x40; | 2940 | buf->buffer->element[0].sflags |= SBAL_SFLAGS0_PCI_REQ; |
2938 | } | 2941 | } |
2939 | } | 2942 | } |
2940 | } | 2943 | } |
@@ -3180,20 +3183,20 @@ static inline void __qeth_fill_buffer(struct sk_buff *skb, | |||
3180 | if (!length) { | 3183 | if (!length) { |
3181 | if (first_lap) | 3184 | if (first_lap) |
3182 | if (skb_shinfo(skb)->nr_frags) | 3185 | if (skb_shinfo(skb)->nr_frags) |
3183 | buffer->element[element].flags = | 3186 | buffer->element[element].eflags = |
3184 | SBAL_FLAGS_FIRST_FRAG; | 3187 | SBAL_EFLAGS_FIRST_FRAG; |
3185 | else | 3188 | else |
3186 | buffer->element[element].flags = 0; | 3189 | buffer->element[element].eflags = 0; |
3187 | else | 3190 | else |
3188 | buffer->element[element].flags = | 3191 | buffer->element[element].eflags = |
3189 | SBAL_FLAGS_MIDDLE_FRAG; | 3192 | SBAL_EFLAGS_MIDDLE_FRAG; |
3190 | } else { | 3193 | } else { |
3191 | if (first_lap) | 3194 | if (first_lap) |
3192 | buffer->element[element].flags = | 3195 | buffer->element[element].eflags = |
3193 | SBAL_FLAGS_FIRST_FRAG; | 3196 | SBAL_EFLAGS_FIRST_FRAG; |
3194 | else | 3197 | else |
3195 | buffer->element[element].flags = | 3198 | buffer->element[element].eflags = |
3196 | SBAL_FLAGS_MIDDLE_FRAG; | 3199 | SBAL_EFLAGS_MIDDLE_FRAG; |
3197 | } | 3200 | } |
3198 | data += length_here; | 3201 | data += length_here; |
3199 | element++; | 3202 | element++; |
@@ -3205,12 +3208,12 @@ static inline void __qeth_fill_buffer(struct sk_buff *skb, | |||
3205 | buffer->element[element].addr = (char *)page_to_phys(frag->page) | 3208 | buffer->element[element].addr = (char *)page_to_phys(frag->page) |
3206 | + frag->page_offset; | 3209 | + frag->page_offset; |
3207 | buffer->element[element].length = frag->size; | 3210 | buffer->element[element].length = frag->size; |
3208 | buffer->element[element].flags = SBAL_FLAGS_MIDDLE_FRAG; | 3211 | buffer->element[element].eflags = SBAL_EFLAGS_MIDDLE_FRAG; |
3209 | element++; | 3212 | element++; |
3210 | } | 3213 | } |
3211 | 3214 | ||
3212 | if (buffer->element[element - 1].flags) | 3215 | if (buffer->element[element - 1].eflags) |
3213 | buffer->element[element - 1].flags = SBAL_FLAGS_LAST_FRAG; | 3216 | buffer->element[element - 1].eflags = SBAL_EFLAGS_LAST_FRAG; |
3214 | *next_element_to_fill = element; | 3217 | *next_element_to_fill = element; |
3215 | } | 3218 | } |
3216 | 3219 | ||
@@ -3234,7 +3237,7 @@ static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, | |||
3234 | /*fill first buffer entry only with header information */ | 3237 | /*fill first buffer entry only with header information */ |
3235 | buffer->element[element].addr = skb->data; | 3238 | buffer->element[element].addr = skb->data; |
3236 | buffer->element[element].length = hdr_len; | 3239 | buffer->element[element].length = hdr_len; |
3237 | buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; | 3240 | buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; |
3238 | buf->next_element_to_fill++; | 3241 | buf->next_element_to_fill++; |
3239 | skb->data += hdr_len; | 3242 | skb->data += hdr_len; |
3240 | skb->len -= hdr_len; | 3243 | skb->len -= hdr_len; |
@@ -3246,7 +3249,7 @@ static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue, | |||
3246 | buffer->element[element].addr = hdr; | 3249 | buffer->element[element].addr = hdr; |
3247 | buffer->element[element].length = sizeof(struct qeth_hdr) + | 3250 | buffer->element[element].length = sizeof(struct qeth_hdr) + |
3248 | hd_len; | 3251 | hd_len; |
3249 | buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG; | 3252 | buffer->element[element].eflags = SBAL_EFLAGS_FIRST_FRAG; |
3250 | buf->is_header[element] = 1; | 3253 | buf->is_header[element] = 1; |
3251 | buf->next_element_to_fill++; | 3254 | buf->next_element_to_fill++; |
3252 | } | 3255 | } |
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c index 8512b5c0ef82..022fb6a8cb83 100644 --- a/drivers/s390/scsi/zfcp_fsf.c +++ b/drivers/s390/scsi/zfcp_fsf.c | |||
@@ -640,7 +640,7 @@ static struct fsf_qtcb *zfcp_qtcb_alloc(mempool_t *pool) | |||
640 | } | 640 | } |
641 | 641 | ||
642 | static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_qdio *qdio, | 642 | static struct zfcp_fsf_req *zfcp_fsf_req_create(struct zfcp_qdio *qdio, |
643 | u32 fsf_cmd, u32 sbtype, | 643 | u32 fsf_cmd, u8 sbtype, |
644 | mempool_t *pool) | 644 | mempool_t *pool) |
645 | { | 645 | { |
646 | struct zfcp_adapter *adapter = qdio->adapter; | 646 | struct zfcp_adapter *adapter = qdio->adapter; |
@@ -841,7 +841,7 @@ struct zfcp_fsf_req *zfcp_fsf_abort_fcp_cmnd(struct scsi_cmnd *scmnd) | |||
841 | if (zfcp_qdio_sbal_get(qdio)) | 841 | if (zfcp_qdio_sbal_get(qdio)) |
842 | goto out; | 842 | goto out; |
843 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_ABORT_FCP_CMND, | 843 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_ABORT_FCP_CMND, |
844 | SBAL_FLAGS0_TYPE_READ, | 844 | SBAL_SFLAGS0_TYPE_READ, |
845 | qdio->adapter->pool.scsi_abort); | 845 | qdio->adapter->pool.scsi_abort); |
846 | if (IS_ERR(req)) { | 846 | if (IS_ERR(req)) { |
847 | req = NULL; | 847 | req = NULL; |
@@ -1012,7 +1012,7 @@ int zfcp_fsf_send_ct(struct zfcp_fc_wka_port *wka_port, | |||
1012 | goto out; | 1012 | goto out; |
1013 | 1013 | ||
1014 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_SEND_GENERIC, | 1014 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_SEND_GENERIC, |
1015 | SBAL_FLAGS0_TYPE_WRITE_READ, pool); | 1015 | SBAL_SFLAGS0_TYPE_WRITE_READ, pool); |
1016 | 1016 | ||
1017 | if (IS_ERR(req)) { | 1017 | if (IS_ERR(req)) { |
1018 | ret = PTR_ERR(req); | 1018 | ret = PTR_ERR(req); |
@@ -1110,7 +1110,7 @@ int zfcp_fsf_send_els(struct zfcp_adapter *adapter, u32 d_id, | |||
1110 | goto out; | 1110 | goto out; |
1111 | 1111 | ||
1112 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_SEND_ELS, | 1112 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_SEND_ELS, |
1113 | SBAL_FLAGS0_TYPE_WRITE_READ, NULL); | 1113 | SBAL_SFLAGS0_TYPE_WRITE_READ, NULL); |
1114 | 1114 | ||
1115 | if (IS_ERR(req)) { | 1115 | if (IS_ERR(req)) { |
1116 | ret = PTR_ERR(req); | 1116 | ret = PTR_ERR(req); |
@@ -1156,7 +1156,7 @@ int zfcp_fsf_exchange_config_data(struct zfcp_erp_action *erp_action) | |||
1156 | goto out; | 1156 | goto out; |
1157 | 1157 | ||
1158 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_EXCHANGE_CONFIG_DATA, | 1158 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_EXCHANGE_CONFIG_DATA, |
1159 | SBAL_FLAGS0_TYPE_READ, | 1159 | SBAL_SFLAGS0_TYPE_READ, |
1160 | qdio->adapter->pool.erp_req); | 1160 | qdio->adapter->pool.erp_req); |
1161 | 1161 | ||
1162 | if (IS_ERR(req)) { | 1162 | if (IS_ERR(req)) { |
@@ -1198,7 +1198,7 @@ int zfcp_fsf_exchange_config_data_sync(struct zfcp_qdio *qdio, | |||
1198 | goto out_unlock; | 1198 | goto out_unlock; |
1199 | 1199 | ||
1200 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_EXCHANGE_CONFIG_DATA, | 1200 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_EXCHANGE_CONFIG_DATA, |
1201 | SBAL_FLAGS0_TYPE_READ, NULL); | 1201 | SBAL_SFLAGS0_TYPE_READ, NULL); |
1202 | 1202 | ||
1203 | if (IS_ERR(req)) { | 1203 | if (IS_ERR(req)) { |
1204 | retval = PTR_ERR(req); | 1204 | retval = PTR_ERR(req); |
@@ -1250,7 +1250,7 @@ int zfcp_fsf_exchange_port_data(struct zfcp_erp_action *erp_action) | |||
1250 | goto out; | 1250 | goto out; |
1251 | 1251 | ||
1252 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_EXCHANGE_PORT_DATA, | 1252 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_EXCHANGE_PORT_DATA, |
1253 | SBAL_FLAGS0_TYPE_READ, | 1253 | SBAL_SFLAGS0_TYPE_READ, |
1254 | qdio->adapter->pool.erp_req); | 1254 | qdio->adapter->pool.erp_req); |
1255 | 1255 | ||
1256 | if (IS_ERR(req)) { | 1256 | if (IS_ERR(req)) { |
@@ -1296,7 +1296,7 @@ int zfcp_fsf_exchange_port_data_sync(struct zfcp_qdio *qdio, | |||
1296 | goto out_unlock; | 1296 | goto out_unlock; |
1297 | 1297 | ||
1298 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_EXCHANGE_PORT_DATA, | 1298 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_EXCHANGE_PORT_DATA, |
1299 | SBAL_FLAGS0_TYPE_READ, NULL); | 1299 | SBAL_SFLAGS0_TYPE_READ, NULL); |
1300 | 1300 | ||
1301 | if (IS_ERR(req)) { | 1301 | if (IS_ERR(req)) { |
1302 | retval = PTR_ERR(req); | 1302 | retval = PTR_ERR(req); |
@@ -1412,7 +1412,7 @@ int zfcp_fsf_open_port(struct zfcp_erp_action *erp_action) | |||
1412 | goto out; | 1412 | goto out; |
1413 | 1413 | ||
1414 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_OPEN_PORT_WITH_DID, | 1414 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_OPEN_PORT_WITH_DID, |
1415 | SBAL_FLAGS0_TYPE_READ, | 1415 | SBAL_SFLAGS0_TYPE_READ, |
1416 | qdio->adapter->pool.erp_req); | 1416 | qdio->adapter->pool.erp_req); |
1417 | 1417 | ||
1418 | if (IS_ERR(req)) { | 1418 | if (IS_ERR(req)) { |
@@ -1478,7 +1478,7 @@ int zfcp_fsf_close_port(struct zfcp_erp_action *erp_action) | |||
1478 | goto out; | 1478 | goto out; |
1479 | 1479 | ||
1480 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_CLOSE_PORT, | 1480 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_CLOSE_PORT, |
1481 | SBAL_FLAGS0_TYPE_READ, | 1481 | SBAL_SFLAGS0_TYPE_READ, |
1482 | qdio->adapter->pool.erp_req); | 1482 | qdio->adapter->pool.erp_req); |
1483 | 1483 | ||
1484 | if (IS_ERR(req)) { | 1484 | if (IS_ERR(req)) { |
@@ -1553,7 +1553,7 @@ int zfcp_fsf_open_wka_port(struct zfcp_fc_wka_port *wka_port) | |||
1553 | goto out; | 1553 | goto out; |
1554 | 1554 | ||
1555 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_OPEN_PORT_WITH_DID, | 1555 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_OPEN_PORT_WITH_DID, |
1556 | SBAL_FLAGS0_TYPE_READ, | 1556 | SBAL_SFLAGS0_TYPE_READ, |
1557 | qdio->adapter->pool.erp_req); | 1557 | qdio->adapter->pool.erp_req); |
1558 | 1558 | ||
1559 | if (IS_ERR(req)) { | 1559 | if (IS_ERR(req)) { |
@@ -1606,7 +1606,7 @@ int zfcp_fsf_close_wka_port(struct zfcp_fc_wka_port *wka_port) | |||
1606 | goto out; | 1606 | goto out; |
1607 | 1607 | ||
1608 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_CLOSE_PORT, | 1608 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_CLOSE_PORT, |
1609 | SBAL_FLAGS0_TYPE_READ, | 1609 | SBAL_SFLAGS0_TYPE_READ, |
1610 | qdio->adapter->pool.erp_req); | 1610 | qdio->adapter->pool.erp_req); |
1611 | 1611 | ||
1612 | if (IS_ERR(req)) { | 1612 | if (IS_ERR(req)) { |
@@ -1698,7 +1698,7 @@ int zfcp_fsf_close_physical_port(struct zfcp_erp_action *erp_action) | |||
1698 | goto out; | 1698 | goto out; |
1699 | 1699 | ||
1700 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_CLOSE_PHYSICAL_PORT, | 1700 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_CLOSE_PHYSICAL_PORT, |
1701 | SBAL_FLAGS0_TYPE_READ, | 1701 | SBAL_SFLAGS0_TYPE_READ, |
1702 | qdio->adapter->pool.erp_req); | 1702 | qdio->adapter->pool.erp_req); |
1703 | 1703 | ||
1704 | if (IS_ERR(req)) { | 1704 | if (IS_ERR(req)) { |
@@ -1812,7 +1812,7 @@ int zfcp_fsf_open_lun(struct zfcp_erp_action *erp_action) | |||
1812 | goto out; | 1812 | goto out; |
1813 | 1813 | ||
1814 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_OPEN_LUN, | 1814 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_OPEN_LUN, |
1815 | SBAL_FLAGS0_TYPE_READ, | 1815 | SBAL_SFLAGS0_TYPE_READ, |
1816 | adapter->pool.erp_req); | 1816 | adapter->pool.erp_req); |
1817 | 1817 | ||
1818 | if (IS_ERR(req)) { | 1818 | if (IS_ERR(req)) { |
@@ -1901,7 +1901,7 @@ int zfcp_fsf_close_lun(struct zfcp_erp_action *erp_action) | |||
1901 | goto out; | 1901 | goto out; |
1902 | 1902 | ||
1903 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_CLOSE_LUN, | 1903 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_CLOSE_LUN, |
1904 | SBAL_FLAGS0_TYPE_READ, | 1904 | SBAL_SFLAGS0_TYPE_READ, |
1905 | qdio->adapter->pool.erp_req); | 1905 | qdio->adapter->pool.erp_req); |
1906 | 1906 | ||
1907 | if (IS_ERR(req)) { | 1907 | if (IS_ERR(req)) { |
@@ -2161,7 +2161,7 @@ int zfcp_fsf_fcp_cmnd(struct scsi_cmnd *scsi_cmnd) | |||
2161 | { | 2161 | { |
2162 | struct zfcp_fsf_req *req; | 2162 | struct zfcp_fsf_req *req; |
2163 | struct fcp_cmnd *fcp_cmnd; | 2163 | struct fcp_cmnd *fcp_cmnd; |
2164 | unsigned int sbtype = SBAL_FLAGS0_TYPE_READ; | 2164 | u8 sbtype = SBAL_SFLAGS0_TYPE_READ; |
2165 | int real_bytes, retval = -EIO, dix_bytes = 0; | 2165 | int real_bytes, retval = -EIO, dix_bytes = 0; |
2166 | struct scsi_device *sdev = scsi_cmnd->device; | 2166 | struct scsi_device *sdev = scsi_cmnd->device; |
2167 | struct zfcp_scsi_dev *zfcp_sdev = sdev_to_zfcp(sdev); | 2167 | struct zfcp_scsi_dev *zfcp_sdev = sdev_to_zfcp(sdev); |
@@ -2181,7 +2181,7 @@ int zfcp_fsf_fcp_cmnd(struct scsi_cmnd *scsi_cmnd) | |||
2181 | } | 2181 | } |
2182 | 2182 | ||
2183 | if (scsi_cmnd->sc_data_direction == DMA_TO_DEVICE) | 2183 | if (scsi_cmnd->sc_data_direction == DMA_TO_DEVICE) |
2184 | sbtype = SBAL_FLAGS0_TYPE_WRITE; | 2184 | sbtype = SBAL_SFLAGS0_TYPE_WRITE; |
2185 | 2185 | ||
2186 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_FCP_CMND, | 2186 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_FCP_CMND, |
2187 | sbtype, adapter->pool.scsi_req); | 2187 | sbtype, adapter->pool.scsi_req); |
@@ -2280,7 +2280,7 @@ struct zfcp_fsf_req *zfcp_fsf_fcp_task_mgmt(struct scsi_cmnd *scmnd, | |||
2280 | goto out; | 2280 | goto out; |
2281 | 2281 | ||
2282 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_FCP_CMND, | 2282 | req = zfcp_fsf_req_create(qdio, FSF_QTCB_FCP_CMND, |
2283 | SBAL_FLAGS0_TYPE_WRITE, | 2283 | SBAL_SFLAGS0_TYPE_WRITE, |
2284 | qdio->adapter->pool.scsi_req); | 2284 | qdio->adapter->pool.scsi_req); |
2285 | 2285 | ||
2286 | if (IS_ERR(req)) { | 2286 | if (IS_ERR(req)) { |
@@ -2328,17 +2328,18 @@ struct zfcp_fsf_req *zfcp_fsf_control_file(struct zfcp_adapter *adapter, | |||
2328 | struct zfcp_qdio *qdio = adapter->qdio; | 2328 | struct zfcp_qdio *qdio = adapter->qdio; |
2329 | struct zfcp_fsf_req *req = NULL; | 2329 | struct zfcp_fsf_req *req = NULL; |
2330 | struct fsf_qtcb_bottom_support *bottom; | 2330 | struct fsf_qtcb_bottom_support *bottom; |
2331 | int direction, retval = -EIO, bytes; | 2331 | int retval = -EIO, bytes; |
2332 | u8 direction; | ||
2332 | 2333 | ||
2333 | if (!(adapter->adapter_features & FSF_FEATURE_CFDC)) | 2334 | if (!(adapter->adapter_features & FSF_FEATURE_CFDC)) |
2334 | return ERR_PTR(-EOPNOTSUPP); | 2335 | return ERR_PTR(-EOPNOTSUPP); |
2335 | 2336 | ||
2336 | switch (fsf_cfdc->command) { | 2337 | switch (fsf_cfdc->command) { |
2337 | case FSF_QTCB_DOWNLOAD_CONTROL_FILE: | 2338 | case FSF_QTCB_DOWNLOAD_CONTROL_FILE: |
2338 | direction = SBAL_FLAGS0_TYPE_WRITE; | 2339 | direction = SBAL_SFLAGS0_TYPE_WRITE; |
2339 | break; | 2340 | break; |
2340 | case FSF_QTCB_UPLOAD_CONTROL_FILE: | 2341 | case FSF_QTCB_UPLOAD_CONTROL_FILE: |
2341 | direction = SBAL_FLAGS0_TYPE_READ; | 2342 | direction = SBAL_SFLAGS0_TYPE_READ; |
2342 | break; | 2343 | break; |
2343 | default: | 2344 | default: |
2344 | return ERR_PTR(-EINVAL); | 2345 | return ERR_PTR(-EINVAL); |
@@ -2413,7 +2414,7 @@ void zfcp_fsf_reqid_check(struct zfcp_qdio *qdio, int sbal_idx) | |||
2413 | fsf_req->qdio_req.sbal_response = sbal_idx; | 2414 | fsf_req->qdio_req.sbal_response = sbal_idx; |
2414 | zfcp_fsf_req_complete(fsf_req); | 2415 | zfcp_fsf_req_complete(fsf_req); |
2415 | 2416 | ||
2416 | if (likely(sbale->flags & SBAL_FLAGS_LAST_ENTRY)) | 2417 | if (likely(sbale->eflags & SBAL_EFLAGS_LAST_ENTRY)) |
2417 | break; | 2418 | break; |
2418 | } | 2419 | } |
2419 | } | 2420 | } |
diff --git a/drivers/s390/scsi/zfcp_qdio.c b/drivers/s390/scsi/zfcp_qdio.c index 98e97d90835b..d9c40ea73eef 100644 --- a/drivers/s390/scsi/zfcp_qdio.c +++ b/drivers/s390/scsi/zfcp_qdio.c | |||
@@ -124,7 +124,7 @@ zfcp_qdio_sbal_chain(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req) | |||
124 | 124 | ||
125 | /* set last entry flag in current SBALE of current SBAL */ | 125 | /* set last entry flag in current SBALE of current SBAL */ |
126 | sbale = zfcp_qdio_sbale_curr(qdio, q_req); | 126 | sbale = zfcp_qdio_sbale_curr(qdio, q_req); |
127 | sbale->flags |= SBAL_FLAGS_LAST_ENTRY; | 127 | sbale->eflags |= SBAL_EFLAGS_LAST_ENTRY; |
128 | 128 | ||
129 | /* don't exceed last allowed SBAL */ | 129 | /* don't exceed last allowed SBAL */ |
130 | if (q_req->sbal_last == q_req->sbal_limit) | 130 | if (q_req->sbal_last == q_req->sbal_limit) |
@@ -132,7 +132,7 @@ zfcp_qdio_sbal_chain(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req) | |||
132 | 132 | ||
133 | /* set chaining flag in first SBALE of current SBAL */ | 133 | /* set chaining flag in first SBALE of current SBAL */ |
134 | sbale = zfcp_qdio_sbale_req(qdio, q_req); | 134 | sbale = zfcp_qdio_sbale_req(qdio, q_req); |
135 | sbale->flags |= SBAL_FLAGS0_MORE_SBALS; | 135 | sbale->sflags |= SBAL_SFLAGS0_MORE_SBALS; |
136 | 136 | ||
137 | /* calculate index of next SBAL */ | 137 | /* calculate index of next SBAL */ |
138 | q_req->sbal_last++; | 138 | q_req->sbal_last++; |
@@ -147,7 +147,7 @@ zfcp_qdio_sbal_chain(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req) | |||
147 | 147 | ||
148 | /* set storage-block type for new SBAL */ | 148 | /* set storage-block type for new SBAL */ |
149 | sbale = zfcp_qdio_sbale_curr(qdio, q_req); | 149 | sbale = zfcp_qdio_sbale_curr(qdio, q_req); |
150 | sbale->flags |= q_req->sbtype; | 150 | sbale->sflags |= q_req->sbtype; |
151 | 151 | ||
152 | return sbale; | 152 | return sbale; |
153 | } | 153 | } |
@@ -177,7 +177,7 @@ int zfcp_qdio_sbals_from_sg(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req, | |||
177 | 177 | ||
178 | /* set storage-block type for this request */ | 178 | /* set storage-block type for this request */ |
179 | sbale = zfcp_qdio_sbale_req(qdio, q_req); | 179 | sbale = zfcp_qdio_sbale_req(qdio, q_req); |
180 | sbale->flags |= q_req->sbtype; | 180 | sbale->sflags |= q_req->sbtype; |
181 | 181 | ||
182 | for (; sg; sg = sg_next(sg)) { | 182 | for (; sg; sg = sg_next(sg)) { |
183 | sbale = zfcp_qdio_sbale_next(qdio, q_req); | 183 | sbale = zfcp_qdio_sbale_next(qdio, q_req); |
@@ -384,7 +384,8 @@ int zfcp_qdio_open(struct zfcp_qdio *qdio) | |||
384 | for (cc = 0; cc < QDIO_MAX_BUFFERS_PER_Q; cc++) { | 384 | for (cc = 0; cc < QDIO_MAX_BUFFERS_PER_Q; cc++) { |
385 | sbale = &(qdio->res_q[cc]->element[0]); | 385 | sbale = &(qdio->res_q[cc]->element[0]); |
386 | sbale->length = 0; | 386 | sbale->length = 0; |
387 | sbale->flags = SBAL_FLAGS_LAST_ENTRY; | 387 | sbale->eflags = SBAL_EFLAGS_LAST_ENTRY; |
388 | sbale->sflags = 0; | ||
388 | sbale->addr = NULL; | 389 | sbale->addr = NULL; |
389 | } | 390 | } |
390 | 391 | ||
diff --git a/drivers/s390/scsi/zfcp_qdio.h b/drivers/s390/scsi/zfcp_qdio.h index 2297d8d3e947..54e22ace012b 100644 --- a/drivers/s390/scsi/zfcp_qdio.h +++ b/drivers/s390/scsi/zfcp_qdio.h | |||
@@ -67,7 +67,7 @@ struct zfcp_qdio { | |||
67 | * @qdio_outb_usage: usage of outbound queue | 67 | * @qdio_outb_usage: usage of outbound queue |
68 | */ | 68 | */ |
69 | struct zfcp_qdio_req { | 69 | struct zfcp_qdio_req { |
70 | u32 sbtype; | 70 | u8 sbtype; |
71 | u8 sbal_number; | 71 | u8 sbal_number; |
72 | u8 sbal_first; | 72 | u8 sbal_first; |
73 | u8 sbal_last; | 73 | u8 sbal_last; |
@@ -116,7 +116,7 @@ zfcp_qdio_sbale_curr(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req) | |||
116 | */ | 116 | */ |
117 | static inline | 117 | static inline |
118 | void zfcp_qdio_req_init(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req, | 118 | void zfcp_qdio_req_init(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req, |
119 | unsigned long req_id, u32 sbtype, void *data, u32 len) | 119 | unsigned long req_id, u8 sbtype, void *data, u32 len) |
120 | { | 120 | { |
121 | struct qdio_buffer_element *sbale; | 121 | struct qdio_buffer_element *sbale; |
122 | int count = min(atomic_read(&qdio->req_q_free), | 122 | int count = min(atomic_read(&qdio->req_q_free), |
@@ -131,7 +131,8 @@ void zfcp_qdio_req_init(struct zfcp_qdio *qdio, struct zfcp_qdio_req *q_req, | |||
131 | 131 | ||
132 | sbale = zfcp_qdio_sbale_req(qdio, q_req); | 132 | sbale = zfcp_qdio_sbale_req(qdio, q_req); |
133 | sbale->addr = (void *) req_id; | 133 | sbale->addr = (void *) req_id; |
134 | sbale->flags = SBAL_FLAGS0_COMMAND | sbtype; | 134 | sbale->eflags = 0; |
135 | sbale->sflags = SBAL_SFLAGS0_COMMAND | sbtype; | ||
135 | 136 | ||
136 | if (unlikely(!data)) | 137 | if (unlikely(!data)) |
137 | return; | 138 | return; |
@@ -173,7 +174,7 @@ void zfcp_qdio_set_sbale_last(struct zfcp_qdio *qdio, | |||
173 | struct qdio_buffer_element *sbale; | 174 | struct qdio_buffer_element *sbale; |
174 | 175 | ||
175 | sbale = zfcp_qdio_sbale_curr(qdio, q_req); | 176 | sbale = zfcp_qdio_sbale_curr(qdio, q_req); |
176 | sbale->flags |= SBAL_FLAGS_LAST_ENTRY; | 177 | sbale->eflags |= SBAL_EFLAGS_LAST_ENTRY; |
177 | } | 178 | } |
178 | 179 | ||
179 | /** | 180 | /** |
diff --git a/drivers/spi/omap2_mcspi.c b/drivers/spi/omap2_mcspi.c index 6f86ba0175ac..969cdd2fe124 100644 --- a/drivers/spi/omap2_mcspi.c +++ b/drivers/spi/omap2_mcspi.c | |||
@@ -298,7 +298,7 @@ omap2_mcspi_txrx_dma(struct spi_device *spi, struct spi_transfer *xfer) | |||
298 | unsigned int count, c; | 298 | unsigned int count, c; |
299 | unsigned long base, tx_reg, rx_reg; | 299 | unsigned long base, tx_reg, rx_reg; |
300 | int word_len, data_type, element_count; | 300 | int word_len, data_type, element_count; |
301 | int elements; | 301 | int elements = 0; |
302 | u32 l; | 302 | u32 l; |
303 | u8 * rx; | 303 | u8 * rx; |
304 | const u8 * tx; | 304 | const u8 * tx; |
diff --git a/drivers/tty/tty_buffer.c b/drivers/tty/tty_buffer.c index f1a7918d71aa..6c9b7cd6778a 100644 --- a/drivers/tty/tty_buffer.c +++ b/drivers/tty/tty_buffer.c | |||
@@ -413,8 +413,7 @@ static void flush_to_ldisc(struct work_struct *work) | |||
413 | spin_lock_irqsave(&tty->buf.lock, flags); | 413 | spin_lock_irqsave(&tty->buf.lock, flags); |
414 | 414 | ||
415 | if (!test_and_set_bit(TTY_FLUSHING, &tty->flags)) { | 415 | if (!test_and_set_bit(TTY_FLUSHING, &tty->flags)) { |
416 | struct tty_buffer *head, *tail = tty->buf.tail; | 416 | struct tty_buffer *head; |
417 | int seen_tail = 0; | ||
418 | while ((head = tty->buf.head) != NULL) { | 417 | while ((head = tty->buf.head) != NULL) { |
419 | int count; | 418 | int count; |
420 | char *char_buf; | 419 | char *char_buf; |
@@ -424,15 +423,6 @@ static void flush_to_ldisc(struct work_struct *work) | |||
424 | if (!count) { | 423 | if (!count) { |
425 | if (head->next == NULL) | 424 | if (head->next == NULL) |
426 | break; | 425 | break; |
427 | /* | ||
428 | There's a possibility tty might get new buffer | ||
429 | added during the unlock window below. We could | ||
430 | end up spinning in here forever hogging the CPU | ||
431 | completely. To avoid this let's have a rest each | ||
432 | time we processed the tail buffer. | ||
433 | */ | ||
434 | if (tail == head) | ||
435 | seen_tail = 1; | ||
436 | tty->buf.head = head->next; | 426 | tty->buf.head = head->next; |
437 | tty_buffer_free(tty, head); | 427 | tty_buffer_free(tty, head); |
438 | continue; | 428 | continue; |
@@ -442,7 +432,7 @@ static void flush_to_ldisc(struct work_struct *work) | |||
442 | line discipline as we want to empty the queue */ | 432 | line discipline as we want to empty the queue */ |
443 | if (test_bit(TTY_FLUSHPENDING, &tty->flags)) | 433 | if (test_bit(TTY_FLUSHPENDING, &tty->flags)) |
444 | break; | 434 | break; |
445 | if (!tty->receive_room || seen_tail) | 435 | if (!tty->receive_room) |
446 | break; | 436 | break; |
447 | if (count > tty->receive_room) | 437 | if (count > tty->receive_room) |
448 | count = tty->receive_room; | 438 | count = tty->receive_room; |
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c index 395a347f2ebb..dac7676ce21b 100644 --- a/drivers/usb/class/cdc-acm.c +++ b/drivers/usb/class/cdc-acm.c | |||
@@ -1530,6 +1530,8 @@ static const struct usb_device_id acm_ids[] = { | |||
1530 | { NOKIA_PCSUITE_ACM_INFO(0x04ce), }, /* Nokia E90 */ | 1530 | { NOKIA_PCSUITE_ACM_INFO(0x04ce), }, /* Nokia E90 */ |
1531 | { NOKIA_PCSUITE_ACM_INFO(0x01d4), }, /* Nokia E55 */ | 1531 | { NOKIA_PCSUITE_ACM_INFO(0x01d4), }, /* Nokia E55 */ |
1532 | { NOKIA_PCSUITE_ACM_INFO(0x0302), }, /* Nokia N8 */ | 1532 | { NOKIA_PCSUITE_ACM_INFO(0x0302), }, /* Nokia N8 */ |
1533 | { NOKIA_PCSUITE_ACM_INFO(0x0335), }, /* Nokia E7 */ | ||
1534 | { NOKIA_PCSUITE_ACM_INFO(0x03cd), }, /* Nokia C7 */ | ||
1533 | { SAMSUNG_PCSUITE_ACM_INFO(0x6651), }, /* Samsung GTi8510 (INNOV8) */ | 1535 | { SAMSUNG_PCSUITE_ACM_INFO(0x6651), }, /* Samsung GTi8510 (INNOV8) */ |
1534 | 1536 | ||
1535 | /* NOTE: non-Nokia COMM/ACM/0xff is likely MSFT RNDIS... NOT a modem! */ | 1537 | /* NOTE: non-Nokia COMM/ACM/0xff is likely MSFT RNDIS... NOT a modem! */ |
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c index 79a58c3a2e2a..90ae1753dda1 100644 --- a/drivers/usb/core/hub.c +++ b/drivers/usb/core/hub.c | |||
@@ -339,7 +339,8 @@ static int get_hub_status(struct usb_device *hdev, | |||
339 | { | 339 | { |
340 | int i, status = -ETIMEDOUT; | 340 | int i, status = -ETIMEDOUT; |
341 | 341 | ||
342 | for (i = 0; i < USB_STS_RETRIES && status == -ETIMEDOUT; i++) { | 342 | for (i = 0; i < USB_STS_RETRIES && |
343 | (status == -ETIMEDOUT || status == -EPIPE); i++) { | ||
343 | status = usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0), | 344 | status = usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0), |
344 | USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_HUB, 0, 0, | 345 | USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_HUB, 0, 0, |
345 | data, sizeof(*data), USB_STS_TIMEOUT); | 346 | data, sizeof(*data), USB_STS_TIMEOUT); |
@@ -355,7 +356,8 @@ static int get_port_status(struct usb_device *hdev, int port1, | |||
355 | { | 356 | { |
356 | int i, status = -ETIMEDOUT; | 357 | int i, status = -ETIMEDOUT; |
357 | 358 | ||
358 | for (i = 0; i < USB_STS_RETRIES && status == -ETIMEDOUT; i++) { | 359 | for (i = 0; i < USB_STS_RETRIES && |
360 | (status == -ETIMEDOUT || status == -EPIPE); i++) { | ||
359 | status = usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0), | 361 | status = usb_control_msg(hdev, usb_rcvctrlpipe(hdev, 0), |
360 | USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port1, | 362 | USB_REQ_GET_STATUS, USB_DIR_IN | USB_RT_PORT, 0, port1, |
361 | data, sizeof(*data), USB_STS_TIMEOUT); | 363 | data, sizeof(*data), USB_STS_TIMEOUT); |
diff --git a/drivers/usb/core/inode.c b/drivers/usb/core/inode.c index 1b125c224dcf..2278dad886e2 100644 --- a/drivers/usb/core/inode.c +++ b/drivers/usb/core/inode.c | |||
@@ -389,7 +389,6 @@ static int usbfs_rmdir(struct inode *dir, struct dentry *dentry) | |||
389 | mutex_unlock(&inode->i_mutex); | 389 | mutex_unlock(&inode->i_mutex); |
390 | if (!error) | 390 | if (!error) |
391 | d_delete(dentry); | 391 | d_delete(dentry); |
392 | dput(dentry); | ||
393 | return error; | 392 | return error; |
394 | } | 393 | } |
395 | 394 | ||
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 58456d1aec21..029e288805b6 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig | |||
@@ -632,13 +632,10 @@ config USB_DUMMY_HCD | |||
632 | 632 | ||
633 | endchoice | 633 | endchoice |
634 | 634 | ||
635 | # Selected by UDC drivers that support high-speed operation. | ||
635 | config USB_GADGET_DUALSPEED | 636 | config USB_GADGET_DUALSPEED |
636 | bool | 637 | bool |
637 | depends on USB_GADGET | 638 | depends on USB_GADGET |
638 | default n | ||
639 | help | ||
640 | Means that gadget drivers should include extra descriptors | ||
641 | and code to handle dual-speed controllers. | ||
642 | 639 | ||
643 | # | 640 | # |
644 | # USB Gadget Drivers | 641 | # USB Gadget Drivers |
diff --git a/drivers/usb/gadget/amd5536udc.c b/drivers/usb/gadget/amd5536udc.c index 6e42aab75806..95e8138cd48f 100644 --- a/drivers/usb/gadget/amd5536udc.c +++ b/drivers/usb/gadget/amd5536udc.c | |||
@@ -60,6 +60,7 @@ | |||
60 | #include <linux/device.h> | 60 | #include <linux/device.h> |
61 | #include <linux/io.h> | 61 | #include <linux/io.h> |
62 | #include <linux/irq.h> | 62 | #include <linux/irq.h> |
63 | #include <linux/prefetch.h> | ||
63 | 64 | ||
64 | #include <asm/byteorder.h> | 65 | #include <asm/byteorder.h> |
65 | #include <asm/system.h> | 66 | #include <asm/system.h> |
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 41dc093c0a1b..f4690ffcb489 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c | |||
@@ -38,6 +38,7 @@ | |||
38 | #include <linux/clk.h> | 38 | #include <linux/clk.h> |
39 | #include <linux/usb/ch9.h> | 39 | #include <linux/usb/ch9.h> |
40 | #include <linux/usb/gadget.h> | 40 | #include <linux/usb/gadget.h> |
41 | #include <linux/prefetch.h> | ||
41 | 42 | ||
42 | #include <asm/byteorder.h> | 43 | #include <asm/byteorder.h> |
43 | #include <mach/hardware.h> | 44 | #include <mach/hardware.h> |
diff --git a/drivers/usb/gadget/dummy_hcd.c b/drivers/usb/gadget/dummy_hcd.c index 61ff927928ab..d3dcabc1a5fc 100644 --- a/drivers/usb/gadget/dummy_hcd.c +++ b/drivers/usb/gadget/dummy_hcd.c | |||
@@ -1906,6 +1906,7 @@ static int dummy_hcd_probe(struct platform_device *pdev) | |||
1906 | if (!hcd) | 1906 | if (!hcd) |
1907 | return -ENOMEM; | 1907 | return -ENOMEM; |
1908 | the_controller = hcd_to_dummy (hcd); | 1908 | the_controller = hcd_to_dummy (hcd); |
1909 | hcd->has_tt = 1; | ||
1909 | 1910 | ||
1910 | retval = usb_add_hcd(hcd, 0, 0); | 1911 | retval = usb_add_hcd(hcd, 0, 0); |
1911 | if (retval != 0) { | 1912 | if (retval != 0) { |
diff --git a/drivers/usb/gadget/inode.c b/drivers/usb/gadget/inode.c index a01383f71f38..a56876aaf76c 100644 --- a/drivers/usb/gadget/inode.c +++ b/drivers/usb/gadget/inode.c | |||
@@ -431,8 +431,10 @@ ep_write (struct file *fd, const char __user *buf, size_t len, loff_t *ptr) | |||
431 | 431 | ||
432 | /* halt any endpoint by doing a "wrong direction" i/o call */ | 432 | /* halt any endpoint by doing a "wrong direction" i/o call */ |
433 | if (!usb_endpoint_dir_in(&data->desc)) { | 433 | if (!usb_endpoint_dir_in(&data->desc)) { |
434 | if (usb_endpoint_xfer_isoc(&data->desc)) | 434 | if (usb_endpoint_xfer_isoc(&data->desc)) { |
435 | mutex_unlock(&data->lock); | ||
435 | return -EINVAL; | 436 | return -EINVAL; |
437 | } | ||
436 | DBG (data->dev, "%s halt\n", data->name); | 438 | DBG (data->dev, "%s halt\n", data->name); |
437 | spin_lock_irq (&data->dev->lock); | 439 | spin_lock_irq (&data->dev->lock); |
438 | if (likely (data->ep != NULL)) | 440 | if (likely (data->ep != NULL)) |
diff --git a/drivers/usb/gadget/mv_udc_core.c b/drivers/usb/gadget/mv_udc_core.c index b62b2640deb0..b1a8146b9d50 100644 --- a/drivers/usb/gadget/mv_udc_core.c +++ b/drivers/usb/gadget/mv_udc_core.c | |||
@@ -2083,7 +2083,7 @@ out: | |||
2083 | } | 2083 | } |
2084 | 2084 | ||
2085 | #ifdef CONFIG_PM | 2085 | #ifdef CONFIG_PM |
2086 | static int mv_udc_suspend(struct platform_device *_dev, pm_message_t state) | 2086 | static int mv_udc_suspend(struct device *_dev) |
2087 | { | 2087 | { |
2088 | struct mv_udc *udc = the_controller; | 2088 | struct mv_udc *udc = the_controller; |
2089 | 2089 | ||
@@ -2092,7 +2092,7 @@ static int mv_udc_suspend(struct platform_device *_dev, pm_message_t state) | |||
2092 | return 0; | 2092 | return 0; |
2093 | } | 2093 | } |
2094 | 2094 | ||
2095 | static int mv_udc_resume(struct platform_device *_dev) | 2095 | static int mv_udc_resume(struct device *_dev) |
2096 | { | 2096 | { |
2097 | struct mv_udc *udc = the_controller; | 2097 | struct mv_udc *udc = the_controller; |
2098 | int retval; | 2098 | int retval; |
@@ -2100,7 +2100,7 @@ static int mv_udc_resume(struct platform_device *_dev) | |||
2100 | retval = mv_udc_phy_init(udc->phy_regs); | 2100 | retval = mv_udc_phy_init(udc->phy_regs); |
2101 | if (retval) { | 2101 | if (retval) { |
2102 | dev_err(_dev, "phy initialization error %d\n", retval); | 2102 | dev_err(_dev, "phy initialization error %d\n", retval); |
2103 | goto error; | 2103 | return retval; |
2104 | } | 2104 | } |
2105 | udc_reset(udc); | 2105 | udc_reset(udc); |
2106 | ep0_reset(udc); | 2106 | ep0_reset(udc); |
@@ -2122,7 +2122,7 @@ static struct platform_driver udc_driver = { | |||
2122 | .owner = THIS_MODULE, | 2122 | .owner = THIS_MODULE, |
2123 | .name = "pxa-u2o", | 2123 | .name = "pxa-u2o", |
2124 | #ifdef CONFIG_PM | 2124 | #ifdef CONFIG_PM |
2125 | .pm = mv_udc_pm_ops, | 2125 | .pm = &mv_udc_pm_ops, |
2126 | #endif | 2126 | #endif |
2127 | }, | 2127 | }, |
2128 | }; | 2128 | }; |
diff --git a/drivers/usb/gadget/net2280.c b/drivers/usb/gadget/net2280.c index 24696f7fa6a9..476d88e1ae97 100644 --- a/drivers/usb/gadget/net2280.c +++ b/drivers/usb/gadget/net2280.c | |||
@@ -63,6 +63,7 @@ | |||
63 | #include <linux/device.h> | 63 | #include <linux/device.h> |
64 | #include <linux/usb/ch9.h> | 64 | #include <linux/usb/ch9.h> |
65 | #include <linux/usb/gadget.h> | 65 | #include <linux/usb/gadget.h> |
66 | #include <linux/prefetch.h> | ||
66 | 67 | ||
67 | #include <asm/byteorder.h> | 68 | #include <asm/byteorder.h> |
68 | #include <asm/io.h> | 69 | #include <asm/io.h> |
diff --git a/drivers/usb/gadget/pxa25x_udc.c b/drivers/usb/gadget/pxa25x_udc.c index 365c02fc25fc..774545494cf2 100644 --- a/drivers/usb/gadget/pxa25x_udc.c +++ b/drivers/usb/gadget/pxa25x_udc.c | |||
@@ -2216,7 +2216,6 @@ static int __init pxa25x_udc_probe(struct platform_device *pdev) | |||
2216 | if (retval != 0) { | 2216 | if (retval != 0) { |
2217 | pr_err("%s: can't get irq %i, err %d\n", | 2217 | pr_err("%s: can't get irq %i, err %d\n", |
2218 | driver_name, LUBBOCK_USB_DISC_IRQ, retval); | 2218 | driver_name, LUBBOCK_USB_DISC_IRQ, retval); |
2219 | lubbock_fail0: | ||
2220 | goto err_irq_lub; | 2219 | goto err_irq_lub; |
2221 | } | 2220 | } |
2222 | retval = request_irq(LUBBOCK_USB_IRQ, | 2221 | retval = request_irq(LUBBOCK_USB_IRQ, |
@@ -2226,7 +2225,6 @@ lubbock_fail0: | |||
2226 | if (retval != 0) { | 2225 | if (retval != 0) { |
2227 | pr_err("%s: can't get irq %i, err %d\n", | 2226 | pr_err("%s: can't get irq %i, err %d\n", |
2228 | driver_name, LUBBOCK_USB_IRQ, retval); | 2227 | driver_name, LUBBOCK_USB_IRQ, retval); |
2229 | free_irq(LUBBOCK_USB_DISC_IRQ, dev); | ||
2230 | goto lubbock_fail0; | 2228 | goto lubbock_fail0; |
2231 | } | 2229 | } |
2232 | } else | 2230 | } else |
@@ -2236,10 +2234,11 @@ lubbock_fail0: | |||
2236 | return 0; | 2234 | return 0; |
2237 | 2235 | ||
2238 | #ifdef CONFIG_ARCH_LUBBOCK | 2236 | #ifdef CONFIG_ARCH_LUBBOCK |
2237 | lubbock_fail0: | ||
2239 | free_irq(LUBBOCK_USB_DISC_IRQ, dev); | 2238 | free_irq(LUBBOCK_USB_DISC_IRQ, dev); |
2240 | err_irq_lub: | 2239 | err_irq_lub: |
2241 | #endif | ||
2242 | free_irq(irq, dev); | 2240 | free_irq(irq, dev); |
2241 | #endif | ||
2243 | err_irq1: | 2242 | err_irq1: |
2244 | if (gpio_is_valid(dev->mach->gpio_pullup)) | 2243 | if (gpio_is_valid(dev->mach->gpio_pullup)) |
2245 | gpio_free(dev->mach->gpio_pullup); | 2244 | gpio_free(dev->mach->gpio_pullup); |
diff --git a/drivers/usb/gadget/s3c-hsotg.c b/drivers/usb/gadget/s3c-hsotg.c index acb9cc418df9..0dfee282878a 100644 --- a/drivers/usb/gadget/s3c-hsotg.c +++ b/drivers/usb/gadget/s3c-hsotg.c | |||
@@ -2680,9 +2680,9 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver, | |||
2680 | 2680 | ||
2681 | writel(0, hsotg->regs + S3C_DAINTMSK); | 2681 | writel(0, hsotg->regs + S3C_DAINTMSK); |
2682 | 2682 | ||
2683 | dev_info(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", | 2683 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", |
2684 | readl(hsotg->regs + S3C_DIEPCTL0), | 2684 | readl(hsotg->regs + S3C_DIEPCTL0), |
2685 | readl(hsotg->regs + S3C_DOEPCTL0)); | 2685 | readl(hsotg->regs + S3C_DOEPCTL0)); |
2686 | 2686 | ||
2687 | /* enable in and out endpoint interrupts */ | 2687 | /* enable in and out endpoint interrupts */ |
2688 | s3c_hsotg_en_gsint(hsotg, S3C_GINTSTS_OEPInt | S3C_GINTSTS_IEPInt); | 2688 | s3c_hsotg_en_gsint(hsotg, S3C_GINTSTS_OEPInt | S3C_GINTSTS_IEPInt); |
@@ -2701,7 +2701,7 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver, | |||
2701 | udelay(10); /* see openiboot */ | 2701 | udelay(10); /* see openiboot */ |
2702 | __bic32(hsotg->regs + S3C_DCTL, S3C_DCTL_PWROnPrgDone); | 2702 | __bic32(hsotg->regs + S3C_DCTL, S3C_DCTL_PWROnPrgDone); |
2703 | 2703 | ||
2704 | dev_info(hsotg->dev, "DCTL=0x%08x\n", readl(hsotg->regs + S3C_DCTL)); | 2704 | dev_dbg(hsotg->dev, "DCTL=0x%08x\n", readl(hsotg->regs + S3C_DCTL)); |
2705 | 2705 | ||
2706 | /* S3C_DxEPCTL_USBActEp says RO in manual, but seems to be set by | 2706 | /* S3C_DxEPCTL_USBActEp says RO in manual, but seems to be set by |
2707 | writing to the EPCTL register.. */ | 2707 | writing to the EPCTL register.. */ |
@@ -2721,9 +2721,9 @@ int usb_gadget_probe_driver(struct usb_gadget_driver *driver, | |||
2721 | 2721 | ||
2722 | s3c_hsotg_enqueue_setup(hsotg); | 2722 | s3c_hsotg_enqueue_setup(hsotg); |
2723 | 2723 | ||
2724 | dev_info(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", | 2724 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", |
2725 | readl(hsotg->regs + S3C_DIEPCTL0), | 2725 | readl(hsotg->regs + S3C_DIEPCTL0), |
2726 | readl(hsotg->regs + S3C_DOEPCTL0)); | 2726 | readl(hsotg->regs + S3C_DOEPCTL0)); |
2727 | 2727 | ||
2728 | /* clear global NAKs */ | 2728 | /* clear global NAKs */ |
2729 | writel(S3C_DCTL_CGOUTNak | S3C_DCTL_CGNPInNAK, | 2729 | writel(S3C_DCTL_CGOUTNak | S3C_DCTL_CGNPInNAK, |
@@ -2921,9 +2921,9 @@ static void s3c_hsotg_init(struct s3c_hsotg *hsotg) | |||
2921 | 2921 | ||
2922 | /* setup fifos */ | 2922 | /* setup fifos */ |
2923 | 2923 | ||
2924 | dev_info(hsotg->dev, "GRXFSIZ=0x%08x, GNPTXFSIZ=0x%08x\n", | 2924 | dev_dbg(hsotg->dev, "GRXFSIZ=0x%08x, GNPTXFSIZ=0x%08x\n", |
2925 | readl(hsotg->regs + S3C_GRXFSIZ), | 2925 | readl(hsotg->regs + S3C_GRXFSIZ), |
2926 | readl(hsotg->regs + S3C_GNPTXFSIZ)); | 2926 | readl(hsotg->regs + S3C_GNPTXFSIZ)); |
2927 | 2927 | ||
2928 | s3c_hsotg_init_fifo(hsotg); | 2928 | s3c_hsotg_init_fifo(hsotg); |
2929 | 2929 | ||
@@ -2945,6 +2945,7 @@ static void s3c_hsotg_init(struct s3c_hsotg *hsotg) | |||
2945 | 2945 | ||
2946 | static void s3c_hsotg_dump(struct s3c_hsotg *hsotg) | 2946 | static void s3c_hsotg_dump(struct s3c_hsotg *hsotg) |
2947 | { | 2947 | { |
2948 | #ifdef DEBUG | ||
2948 | struct device *dev = hsotg->dev; | 2949 | struct device *dev = hsotg->dev; |
2949 | void __iomem *regs = hsotg->regs; | 2950 | void __iomem *regs = hsotg->regs; |
2950 | u32 val; | 2951 | u32 val; |
@@ -2987,6 +2988,7 @@ static void s3c_hsotg_dump(struct s3c_hsotg *hsotg) | |||
2987 | 2988 | ||
2988 | dev_info(dev, "DVBUSDIS=0x%08x, DVBUSPULSE=%08x\n", | 2989 | dev_info(dev, "DVBUSDIS=0x%08x, DVBUSPULSE=%08x\n", |
2989 | readl(regs + S3C_DVBUSDIS), readl(regs + S3C_DVBUSPULSE)); | 2990 | readl(regs + S3C_DVBUSDIS), readl(regs + S3C_DVBUSPULSE)); |
2991 | #endif | ||
2990 | } | 2992 | } |
2991 | 2993 | ||
2992 | 2994 | ||
diff --git a/drivers/usb/gadget/s3c-hsudc.c b/drivers/usb/gadget/s3c-hsudc.c index cfe3cf56d6bd..d5e3e1e58626 100644 --- a/drivers/usb/gadget/s3c-hsudc.c +++ b/drivers/usb/gadget/s3c-hsudc.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <linux/clk.h> | 26 | #include <linux/clk.h> |
27 | #include <linux/usb/ch9.h> | 27 | #include <linux/usb/ch9.h> |
28 | #include <linux/usb/gadget.h> | 28 | #include <linux/usb/gadget.h> |
29 | #include <linux/prefetch.h> | ||
29 | 30 | ||
30 | #include <mach/regs-s3c2443-clock.h> | 31 | #include <mach/regs-s3c2443-clock.h> |
31 | #include <plat/udc.h> | 32 | #include <plat/udc.h> |
@@ -1301,7 +1302,8 @@ static int s3c_hsudc_probe(struct platform_device *pdev) | |||
1301 | hsudc->uclk = clk_get(&pdev->dev, "usb-device"); | 1302 | hsudc->uclk = clk_get(&pdev->dev, "usb-device"); |
1302 | if (IS_ERR(hsudc->uclk)) { | 1303 | if (IS_ERR(hsudc->uclk)) { |
1303 | dev_err(dev, "failed to find usb-device clock source\n"); | 1304 | dev_err(dev, "failed to find usb-device clock source\n"); |
1304 | return PTR_ERR(hsudc->uclk); | 1305 | ret = PTR_ERR(hsudc->uclk); |
1306 | goto err_clk; | ||
1305 | } | 1307 | } |
1306 | clk_enable(hsudc->uclk); | 1308 | clk_enable(hsudc->uclk); |
1307 | 1309 | ||
@@ -1310,7 +1312,8 @@ static int s3c_hsudc_probe(struct platform_device *pdev) | |||
1310 | disable_irq(hsudc->irq); | 1312 | disable_irq(hsudc->irq); |
1311 | local_irq_enable(); | 1313 | local_irq_enable(); |
1312 | return 0; | 1314 | return 0; |
1313 | 1315 | err_clk: | |
1316 | free_irq(hsudc->irq, hsudc); | ||
1314 | err_irq: | 1317 | err_irq: |
1315 | iounmap(hsudc->regs); | 1318 | iounmap(hsudc->regs); |
1316 | 1319 | ||
diff --git a/drivers/usb/gadget/s3c2410_udc.c b/drivers/usb/gadget/s3c2410_udc.c index 6d8b04061d5d..100f2635cf0a 100644 --- a/drivers/usb/gadget/s3c2410_udc.c +++ b/drivers/usb/gadget/s3c2410_udc.c | |||
@@ -36,6 +36,7 @@ | |||
36 | #include <linux/platform_device.h> | 36 | #include <linux/platform_device.h> |
37 | #include <linux/clk.h> | 37 | #include <linux/clk.h> |
38 | #include <linux/gpio.h> | 38 | #include <linux/gpio.h> |
39 | #include <linux/prefetch.h> | ||
39 | 40 | ||
40 | #include <linux/debugfs.h> | 41 | #include <linux/debugfs.h> |
41 | #include <linux/seq_file.h> | 42 | #include <linux/seq_file.h> |
diff --git a/drivers/usb/host/ohci-pxa27x.c b/drivers/usb/host/ohci-pxa27x.c index afef7b0a4195..80be5472783a 100644 --- a/drivers/usb/host/ohci-pxa27x.c +++ b/drivers/usb/host/ohci-pxa27x.c | |||
@@ -312,8 +312,10 @@ int usb_hcd_pxa27x_probe (const struct hc_driver *driver, struct platform_device | |||
312 | return PTR_ERR(usb_clk); | 312 | return PTR_ERR(usb_clk); |
313 | 313 | ||
314 | hcd = usb_create_hcd (driver, &pdev->dev, "pxa27x"); | 314 | hcd = usb_create_hcd (driver, &pdev->dev, "pxa27x"); |
315 | if (!hcd) | 315 | if (!hcd) { |
316 | return -ENOMEM; | 316 | retval = -ENOMEM; |
317 | goto err0; | ||
318 | } | ||
317 | 319 | ||
318 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 320 | r = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
319 | if (!r) { | 321 | if (!r) { |
@@ -368,6 +370,7 @@ int usb_hcd_pxa27x_probe (const struct hc_driver *driver, struct platform_device | |||
368 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | 370 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
369 | err1: | 371 | err1: |
370 | usb_put_hcd(hcd); | 372 | usb_put_hcd(hcd); |
373 | err0: | ||
371 | clk_put(usb_clk); | 374 | clk_put(usb_clk); |
372 | return retval; | 375 | return retval; |
373 | } | 376 | } |
diff --git a/drivers/usb/host/xhci-dbg.c b/drivers/usb/host/xhci-dbg.c index 2e0486178dbe..1f50b4468e87 100644 --- a/drivers/usb/host/xhci-dbg.c +++ b/drivers/usb/host/xhci-dbg.c | |||
@@ -438,13 +438,13 @@ char *xhci_get_slot_state(struct xhci_hcd *xhci, | |||
438 | struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx); | 438 | struct xhci_slot_ctx *slot_ctx = xhci_get_slot_ctx(xhci, ctx); |
439 | 439 | ||
440 | switch (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state))) { | 440 | switch (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state))) { |
441 | case 0: | 441 | case SLOT_STATE_ENABLED: |
442 | return "enabled/disabled"; | 442 | return "enabled/disabled"; |
443 | case 1: | 443 | case SLOT_STATE_DEFAULT: |
444 | return "default"; | 444 | return "default"; |
445 | case 2: | 445 | case SLOT_STATE_ADDRESSED: |
446 | return "addressed"; | 446 | return "addressed"; |
447 | case 3: | 447 | case SLOT_STATE_CONFIGURED: |
448 | return "configured"; | 448 | return "configured"; |
449 | default: | 449 | default: |
450 | return "reserved"; | 450 | return "reserved"; |
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c index 26caba4c1950..0f8e1d29a858 100644 --- a/drivers/usb/host/xhci-mem.c +++ b/drivers/usb/host/xhci-mem.c | |||
@@ -985,9 +985,19 @@ static unsigned int xhci_parse_exponent_interval(struct usb_device *udev, | |||
985 | interval = clamp_val(ep->desc.bInterval, 1, 16) - 1; | 985 | interval = clamp_val(ep->desc.bInterval, 1, 16) - 1; |
986 | if (interval != ep->desc.bInterval - 1) | 986 | if (interval != ep->desc.bInterval - 1) |
987 | dev_warn(&udev->dev, | 987 | dev_warn(&udev->dev, |
988 | "ep %#x - rounding interval to %d microframes\n", | 988 | "ep %#x - rounding interval to %d %sframes\n", |
989 | ep->desc.bEndpointAddress, | 989 | ep->desc.bEndpointAddress, |
990 | 1 << interval); | 990 | 1 << interval, |
991 | udev->speed == USB_SPEED_FULL ? "" : "micro"); | ||
992 | |||
993 | if (udev->speed == USB_SPEED_FULL) { | ||
994 | /* | ||
995 | * Full speed isoc endpoints specify interval in frames, | ||
996 | * not microframes. We are using microframes everywhere, | ||
997 | * so adjust accordingly. | ||
998 | */ | ||
999 | interval += 3; /* 1 frame = 2^3 uframes */ | ||
1000 | } | ||
991 | 1001 | ||
992 | return interval; | 1002 | return interval; |
993 | } | 1003 | } |
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c index c408e9f6a707..17541d09eabb 100644 --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c | |||
@@ -106,12 +106,22 @@ static int xhci_pci_setup(struct usb_hcd *hcd) | |||
106 | 106 | ||
107 | /* Look for vendor-specific quirks */ | 107 | /* Look for vendor-specific quirks */ |
108 | if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && | 108 | if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC && |
109 | pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK && | 109 | pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK) { |
110 | pdev->revision == 0x0) { | 110 | if (pdev->revision == 0x0) { |
111 | xhci->quirks |= XHCI_RESET_EP_QUIRK; | 111 | xhci->quirks |= XHCI_RESET_EP_QUIRK; |
112 | xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure" | 112 | xhci_dbg(xhci, "QUIRK: Fresco Logic xHC needs configure" |
113 | " endpoint cmd after reset endpoint\n"); | 113 | " endpoint cmd after reset endpoint\n"); |
114 | } | ||
115 | /* Fresco Logic confirms: all revisions of this chip do not | ||
116 | * support MSI, even though some of them claim to in their PCI | ||
117 | * capabilities. | ||
118 | */ | ||
119 | xhci->quirks |= XHCI_BROKEN_MSI; | ||
120 | xhci_dbg(xhci, "QUIRK: Fresco Logic revision %u " | ||
121 | "has broken MSI implementation\n", | ||
122 | pdev->revision); | ||
114 | } | 123 | } |
124 | |||
115 | if (pdev->vendor == PCI_VENDOR_ID_NEC) | 125 | if (pdev->vendor == PCI_VENDOR_ID_NEC) |
116 | xhci->quirks |= XHCI_NEC_HOST; | 126 | xhci->quirks |= XHCI_NEC_HOST; |
117 | 127 | ||
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index cc1485bfed38..800f417c7309 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -1782,7 +1782,7 @@ static int skip_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td, | |||
1782 | struct usb_iso_packet_descriptor *frame; | 1782 | struct usb_iso_packet_descriptor *frame; |
1783 | int idx; | 1783 | int idx; |
1784 | 1784 | ||
1785 | ep_ring = xhci_dma_to_transfer_ring(ep, event->buffer); | 1785 | ep_ring = xhci_dma_to_transfer_ring(ep, le64_to_cpu(event->buffer)); |
1786 | urb_priv = td->urb->hcpriv; | 1786 | urb_priv = td->urb->hcpriv; |
1787 | idx = urb_priv->td_cnt; | 1787 | idx = urb_priv->td_cnt; |
1788 | frame = &td->urb->iso_frame_desc[idx]; | 1788 | frame = &td->urb->iso_frame_desc[idx]; |
diff --git a/drivers/usb/host/xhci.c b/drivers/usb/host/xhci.c index d9660eb97eb9..06e7023258d0 100644 --- a/drivers/usb/host/xhci.c +++ b/drivers/usb/host/xhci.c | |||
@@ -430,12 +430,19 @@ int xhci_run(struct usb_hcd *hcd) | |||
430 | free_irq(hcd->irq, hcd); | 430 | free_irq(hcd->irq, hcd); |
431 | hcd->irq = -1; | 431 | hcd->irq = -1; |
432 | 432 | ||
433 | /* Some Fresco Logic host controllers advertise MSI, but fail to | ||
434 | * generate interrupts. Don't even try to enable MSI. | ||
435 | */ | ||
436 | if (xhci->quirks & XHCI_BROKEN_MSI) | ||
437 | goto legacy_irq; | ||
438 | |||
433 | ret = xhci_setup_msix(xhci); | 439 | ret = xhci_setup_msix(xhci); |
434 | if (ret) | 440 | if (ret) |
435 | /* fall back to msi*/ | 441 | /* fall back to msi*/ |
436 | ret = xhci_setup_msi(xhci); | 442 | ret = xhci_setup_msi(xhci); |
437 | 443 | ||
438 | if (ret) { | 444 | if (ret) { |
445 | legacy_irq: | ||
439 | /* fall back to legacy interrupt*/ | 446 | /* fall back to legacy interrupt*/ |
440 | ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED, | 447 | ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED, |
441 | hcd->irq_descr, hcd); | 448 | hcd->irq_descr, hcd); |
@@ -1849,8 +1856,8 @@ int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev) | |||
1849 | 1856 | ||
1850 | /* Free any rings that were dropped, but not changed. */ | 1857 | /* Free any rings that were dropped, but not changed. */ |
1851 | for (i = 1; i < 31; ++i) { | 1858 | for (i = 1; i < 31; ++i) { |
1852 | if ((ctrl_ctx->drop_flags & (1 << (i + 1))) && | 1859 | if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) && |
1853 | !(ctrl_ctx->add_flags & (1 << (i + 1)))) | 1860 | !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) |
1854 | xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); | 1861 | xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i); |
1855 | } | 1862 | } |
1856 | xhci_zero_in_ctx(xhci, virt_dev); | 1863 | xhci_zero_in_ctx(xhci, virt_dev); |
@@ -2467,6 +2474,7 @@ int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev) | |||
2467 | struct xhci_command *reset_device_cmd; | 2474 | struct xhci_command *reset_device_cmd; |
2468 | int timeleft; | 2475 | int timeleft; |
2469 | int last_freed_endpoint; | 2476 | int last_freed_endpoint; |
2477 | struct xhci_slot_ctx *slot_ctx; | ||
2470 | 2478 | ||
2471 | ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__); | 2479 | ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__); |
2472 | if (ret <= 0) | 2480 | if (ret <= 0) |
@@ -2499,6 +2507,12 @@ int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev) | |||
2499 | return -EINVAL; | 2507 | return -EINVAL; |
2500 | } | 2508 | } |
2501 | 2509 | ||
2510 | /* If device is not setup, there is no point in resetting it */ | ||
2511 | slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx); | ||
2512 | if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) == | ||
2513 | SLOT_STATE_DISABLED) | ||
2514 | return 0; | ||
2515 | |||
2502 | xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id); | 2516 | xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id); |
2503 | /* Allocate the command structure that holds the struct completion. | 2517 | /* Allocate the command structure that holds the struct completion. |
2504 | * Assume we're in process context, since the normal device reset | 2518 | * Assume we're in process context, since the normal device reset |
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h index ac0196e7fcf1..7d1ea3bf5e1f 100644 --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h | |||
@@ -560,6 +560,11 @@ struct xhci_slot_ctx { | |||
560 | #define SLOT_STATE (0x1f << 27) | 560 | #define SLOT_STATE (0x1f << 27) |
561 | #define GET_SLOT_STATE(p) (((p) & (0x1f << 27)) >> 27) | 561 | #define GET_SLOT_STATE(p) (((p) & (0x1f << 27)) >> 27) |
562 | 562 | ||
563 | #define SLOT_STATE_DISABLED 0 | ||
564 | #define SLOT_STATE_ENABLED SLOT_STATE_DISABLED | ||
565 | #define SLOT_STATE_DEFAULT 1 | ||
566 | #define SLOT_STATE_ADDRESSED 2 | ||
567 | #define SLOT_STATE_CONFIGURED 3 | ||
563 | 568 | ||
564 | /** | 569 | /** |
565 | * struct xhci_ep_ctx | 570 | * struct xhci_ep_ctx |
@@ -1302,6 +1307,7 @@ struct xhci_hcd { | |||
1302 | * commands. | 1307 | * commands. |
1303 | */ | 1308 | */ |
1304 | #define XHCI_EP_LIMIT_QUIRK (1 << 5) | 1309 | #define XHCI_EP_LIMIT_QUIRK (1 << 5) |
1310 | #define XHCI_BROKEN_MSI (1 << 6) | ||
1305 | unsigned int num_active_eps; | 1311 | unsigned int num_active_eps; |
1306 | unsigned int limit_active_eps; | 1312 | unsigned int limit_active_eps; |
1307 | /* There are two roothubs to keep track of bus suspend info for */ | 1313 | /* There are two roothubs to keep track of bus suspend info for */ |
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c index ab8e1001e5e2..c71b0372786e 100644 --- a/drivers/usb/musb/musb_core.c +++ b/drivers/usb/musb/musb_core.c | |||
@@ -96,6 +96,7 @@ | |||
96 | #include <linux/init.h> | 96 | #include <linux/init.h> |
97 | #include <linux/list.h> | 97 | #include <linux/list.h> |
98 | #include <linux/kobject.h> | 98 | #include <linux/kobject.h> |
99 | #include <linux/prefetch.h> | ||
99 | #include <linux/platform_device.h> | 100 | #include <linux/platform_device.h> |
100 | #include <linux/io.h> | 101 | #include <linux/io.h> |
101 | 102 | ||
diff --git a/drivers/usb/renesas_usbhs/mod_gadget.c b/drivers/usb/renesas_usbhs/mod_gadget.c index 206cfabc9286..547486ccd059 100644 --- a/drivers/usb/renesas_usbhs/mod_gadget.c +++ b/drivers/usb/renesas_usbhs/mod_gadget.c | |||
@@ -1380,5 +1380,6 @@ void __devexit usbhs_mod_gadget_remove(struct usbhs_priv *priv) | |||
1380 | { | 1380 | { |
1381 | struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv); | 1381 | struct usbhsg_gpriv *gpriv = usbhsg_priv_to_gpriv(priv); |
1382 | 1382 | ||
1383 | kfree(gpriv->uep); | ||
1383 | kfree(gpriv); | 1384 | kfree(gpriv); |
1384 | } | 1385 | } |
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c index e8dbde55f6c5..162728977553 100644 --- a/drivers/usb/serial/ftdi_sio.c +++ b/drivers/usb/serial/ftdi_sio.c | |||
@@ -647,6 +647,7 @@ static struct usb_device_id id_table_combined [] = { | |||
647 | { USB_DEVICE(FTDI_VID, EVER_ECO_PRO_CDS) }, | 647 | { USB_DEVICE(FTDI_VID, EVER_ECO_PRO_CDS) }, |
648 | { USB_DEVICE(FTDI_VID, FTDI_4N_GALAXY_DE_1_PID) }, | 648 | { USB_DEVICE(FTDI_VID, FTDI_4N_GALAXY_DE_1_PID) }, |
649 | { USB_DEVICE(FTDI_VID, FTDI_4N_GALAXY_DE_2_PID) }, | 649 | { USB_DEVICE(FTDI_VID, FTDI_4N_GALAXY_DE_2_PID) }, |
650 | { USB_DEVICE(FTDI_VID, FTDI_4N_GALAXY_DE_3_PID) }, | ||
650 | { USB_DEVICE(FTDI_VID, XSENS_CONVERTER_0_PID) }, | 651 | { USB_DEVICE(FTDI_VID, XSENS_CONVERTER_0_PID) }, |
651 | { USB_DEVICE(FTDI_VID, XSENS_CONVERTER_1_PID) }, | 652 | { USB_DEVICE(FTDI_VID, XSENS_CONVERTER_1_PID) }, |
652 | { USB_DEVICE(FTDI_VID, XSENS_CONVERTER_2_PID) }, | 653 | { USB_DEVICE(FTDI_VID, XSENS_CONVERTER_2_PID) }, |
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h index 1d946cd238ba..ab1fcdf3c378 100644 --- a/drivers/usb/serial/ftdi_sio_ids.h +++ b/drivers/usb/serial/ftdi_sio_ids.h | |||
@@ -351,6 +351,7 @@ | |||
351 | */ | 351 | */ |
352 | #define FTDI_4N_GALAXY_DE_1_PID 0xF3C0 | 352 | #define FTDI_4N_GALAXY_DE_1_PID 0xF3C0 |
353 | #define FTDI_4N_GALAXY_DE_2_PID 0xF3C1 | 353 | #define FTDI_4N_GALAXY_DE_2_PID 0xF3C1 |
354 | #define FTDI_4N_GALAXY_DE_3_PID 0xF3C2 | ||
354 | 355 | ||
355 | /* | 356 | /* |
356 | * Linx Technologies product ids | 357 | * Linx Technologies product ids |
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index 318dd00040a3..60b25d8ea0e2 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c | |||
@@ -311,10 +311,6 @@ static void option_instat_callback(struct urb *urb); | |||
311 | #define ZTE_PRODUCT_AC2726 0xfff5 | 311 | #define ZTE_PRODUCT_AC2726 0xfff5 |
312 | #define ZTE_PRODUCT_AC8710T 0xffff | 312 | #define ZTE_PRODUCT_AC8710T 0xffff |
313 | 313 | ||
314 | /* ZTE PRODUCTS -- alternate vendor ID */ | ||
315 | #define ZTE_VENDOR_ID2 0x1d6b | ||
316 | #define ZTE_PRODUCT_MF_330 0x0002 | ||
317 | |||
318 | #define BENQ_VENDOR_ID 0x04a5 | 314 | #define BENQ_VENDOR_ID 0x04a5 |
319 | #define BENQ_PRODUCT_H10 0x4068 | 315 | #define BENQ_PRODUCT_H10 0x4068 |
320 | 316 | ||
@@ -340,11 +336,12 @@ static void option_instat_callback(struct urb *urb); | |||
340 | #define TOSHIBA_PRODUCT_G450 0x0d45 | 336 | #define TOSHIBA_PRODUCT_G450 0x0d45 |
341 | 337 | ||
342 | #define ALINK_VENDOR_ID 0x1e0e | 338 | #define ALINK_VENDOR_ID 0x1e0e |
339 | #define ALINK_PRODUCT_PH300 0x9100 | ||
343 | #define ALINK_PRODUCT_3GU 0x9200 | 340 | #define ALINK_PRODUCT_3GU 0x9200 |
344 | 341 | ||
345 | /* ALCATEL PRODUCTS */ | 342 | /* ALCATEL PRODUCTS */ |
346 | #define ALCATEL_VENDOR_ID 0x1bbb | 343 | #define ALCATEL_VENDOR_ID 0x1bbb |
347 | #define ALCATEL_PRODUCT_X060S 0x0000 | 344 | #define ALCATEL_PRODUCT_X060S_X200 0x0000 |
348 | 345 | ||
349 | #define PIRELLI_VENDOR_ID 0x1266 | 346 | #define PIRELLI_VENDOR_ID 0x1266 |
350 | #define PIRELLI_PRODUCT_C100_1 0x1002 | 347 | #define PIRELLI_PRODUCT_C100_1 0x1002 |
@@ -379,6 +376,9 @@ static void option_instat_callback(struct urb *urb); | |||
379 | * It seems to contain a Qualcomm QSC6240/6290 chipset */ | 376 | * It seems to contain a Qualcomm QSC6240/6290 chipset */ |
380 | #define FOUR_G_SYSTEMS_PRODUCT_W14 0x9603 | 377 | #define FOUR_G_SYSTEMS_PRODUCT_W14 0x9603 |
381 | 378 | ||
379 | /* Zoom */ | ||
380 | #define ZOOM_PRODUCT_4597 0x9607 | ||
381 | |||
382 | /* Haier products */ | 382 | /* Haier products */ |
383 | #define HAIER_VENDOR_ID 0x201e | 383 | #define HAIER_VENDOR_ID 0x201e |
384 | #define HAIER_PRODUCT_CE100 0x2009 | 384 | #define HAIER_PRODUCT_CE100 0x2009 |
@@ -432,6 +432,20 @@ static const struct option_blacklist_info four_g_w14_blacklist = { | |||
432 | .reason = OPTION_BLACKLIST_SENDSETUP | 432 | .reason = OPTION_BLACKLIST_SENDSETUP |
433 | }; | 433 | }; |
434 | 434 | ||
435 | static const u8 alcatel_x200_no_sendsetup[] = { 0, 1 }; | ||
436 | static const struct option_blacklist_info alcatel_x200_blacklist = { | ||
437 | .infolen = ARRAY_SIZE(alcatel_x200_no_sendsetup), | ||
438 | .ifaceinfo = alcatel_x200_no_sendsetup, | ||
439 | .reason = OPTION_BLACKLIST_SENDSETUP | ||
440 | }; | ||
441 | |||
442 | static const u8 zte_k3765_z_no_sendsetup[] = { 0, 1, 2 }; | ||
443 | static const struct option_blacklist_info zte_k3765_z_blacklist = { | ||
444 | .infolen = ARRAY_SIZE(zte_k3765_z_no_sendsetup), | ||
445 | .ifaceinfo = zte_k3765_z_no_sendsetup, | ||
446 | .reason = OPTION_BLACKLIST_SENDSETUP | ||
447 | }; | ||
448 | |||
435 | static const struct usb_device_id option_ids[] = { | 449 | static const struct usb_device_id option_ids[] = { |
436 | { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) }, | 450 | { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) }, |
437 | { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) }, | 451 | { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_RICOLA) }, |
@@ -916,13 +930,13 @@ static const struct usb_device_id option_ids[] = { | |||
916 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0073, 0xff, 0xff, 0xff) }, | 930 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0073, 0xff, 0xff, 0xff) }, |
917 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0130, 0xff, 0xff, 0xff) }, | 931 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0130, 0xff, 0xff, 0xff) }, |
918 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0141, 0xff, 0xff, 0xff) }, | 932 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x0141, 0xff, 0xff, 0xff) }, |
919 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2002, 0xff, 0xff, 0xff) }, | 933 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2002, 0xff, |
934 | 0xff, 0xff), .driver_info = (kernel_ulong_t)&zte_k3765_z_blacklist }, | ||
920 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2003, 0xff, 0xff, 0xff) }, | 935 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, 0x2003, 0xff, 0xff, 0xff) }, |
921 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_CDMA_TECH, 0xff, 0xff, 0xff) }, | 936 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_CDMA_TECH, 0xff, 0xff, 0xff) }, |
922 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC8710, 0xff, 0xff, 0xff) }, | 937 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC8710, 0xff, 0xff, 0xff) }, |
923 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) }, | 938 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) }, |
924 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC8710T, 0xff, 0xff, 0xff) }, | 939 | { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC8710T, 0xff, 0xff, 0xff) }, |
925 | { USB_DEVICE(ZTE_VENDOR_ID2, ZTE_PRODUCT_MF_330) }, | ||
926 | { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) }, | 940 | { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) }, |
927 | { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) }, | 941 | { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) }, |
928 | { USB_DEVICE(ALINK_VENDOR_ID, DLINK_PRODUCT_DWM_652_U5) }, /* Yes, ALINK_VENDOR_ID */ | 942 | { USB_DEVICE(ALINK_VENDOR_ID, DLINK_PRODUCT_DWM_652_U5) }, /* Yes, ALINK_VENDOR_ID */ |
@@ -935,13 +949,17 @@ static const struct usb_device_id option_ids[] = { | |||
935 | { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_G450) }, | 949 | { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_G450) }, |
936 | { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_HSDPA_MINICARD ) }, /* Toshiba 3G HSDPA == Novatel Expedite EU870D MiniCard */ | 950 | { USB_DEVICE(TOSHIBA_VENDOR_ID, TOSHIBA_PRODUCT_HSDPA_MINICARD ) }, /* Toshiba 3G HSDPA == Novatel Expedite EU870D MiniCard */ |
937 | { USB_DEVICE(ALINK_VENDOR_ID, 0x9000) }, | 951 | { USB_DEVICE(ALINK_VENDOR_ID, 0x9000) }, |
952 | { USB_DEVICE(ALINK_VENDOR_ID, ALINK_PRODUCT_PH300) }, | ||
938 | { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) }, | 953 | { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) }, |
939 | { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) }, | 954 | { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S_X200), |
955 | .driver_info = (kernel_ulong_t)&alcatel_x200_blacklist | ||
956 | }, | ||
940 | { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, | 957 | { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) }, |
941 | { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, | 958 | { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) }, |
942 | { USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14), | 959 | { USB_DEVICE(LONGCHEER_VENDOR_ID, FOUR_G_SYSTEMS_PRODUCT_W14), |
943 | .driver_info = (kernel_ulong_t)&four_g_w14_blacklist | 960 | .driver_info = (kernel_ulong_t)&four_g_w14_blacklist |
944 | }, | 961 | }, |
962 | { USB_DEVICE(LONGCHEER_VENDOR_ID, ZOOM_PRODUCT_4597) }, | ||
945 | { USB_DEVICE(HAIER_VENDOR_ID, HAIER_PRODUCT_CE100) }, | 963 | { USB_DEVICE(HAIER_VENDOR_ID, HAIER_PRODUCT_CE100) }, |
946 | /* Pirelli */ | 964 | /* Pirelli */ |
947 | { USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_C100_1)}, | 965 | { USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_C100_1)}, |
diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c index 00418995d8e9..e8ae21b2d387 100644 --- a/drivers/usb/storage/transport.c +++ b/drivers/usb/storage/transport.c | |||
@@ -819,6 +819,35 @@ Retry_Sense: | |||
819 | } | 819 | } |
820 | } | 820 | } |
821 | 821 | ||
822 | /* | ||
823 | * Some devices don't work or return incorrect data the first | ||
824 | * time they get a READ(10) command, or for the first READ(10) | ||
825 | * after a media change. If the INITIAL_READ10 flag is set, | ||
826 | * keep track of whether READ(10) commands succeed. If the | ||
827 | * previous one succeeded and this one failed, set the REDO_READ10 | ||
828 | * flag to force a retry. | ||
829 | */ | ||
830 | if (unlikely((us->fflags & US_FL_INITIAL_READ10) && | ||
831 | srb->cmnd[0] == READ_10)) { | ||
832 | if (srb->result == SAM_STAT_GOOD) { | ||
833 | set_bit(US_FLIDX_READ10_WORKED, &us->dflags); | ||
834 | } else if (test_bit(US_FLIDX_READ10_WORKED, &us->dflags)) { | ||
835 | clear_bit(US_FLIDX_READ10_WORKED, &us->dflags); | ||
836 | set_bit(US_FLIDX_REDO_READ10, &us->dflags); | ||
837 | } | ||
838 | |||
839 | /* | ||
840 | * Next, if the REDO_READ10 flag is set, return a result | ||
841 | * code that will cause the SCSI core to retry the READ(10) | ||
842 | * command immediately. | ||
843 | */ | ||
844 | if (test_bit(US_FLIDX_REDO_READ10, &us->dflags)) { | ||
845 | clear_bit(US_FLIDX_REDO_READ10, &us->dflags); | ||
846 | srb->result = DID_IMM_RETRY << 16; | ||
847 | srb->sense_buffer[0] = 0; | ||
848 | } | ||
849 | } | ||
850 | |||
822 | /* Did we transfer less than the minimum amount required? */ | 851 | /* Did we transfer less than the minimum amount required? */ |
823 | if ((srb->result == SAM_STAT_GOOD || srb->sense_buffer[2] == 0) && | 852 | if ((srb->result == SAM_STAT_GOOD || srb->sense_buffer[2] == 0) && |
824 | scsi_bufflen(srb) - scsi_get_resid(srb) < srb->underflow) | 853 | scsi_bufflen(srb) - scsi_get_resid(srb) < srb->underflow) |
diff --git a/drivers/usb/storage/unusual_devs.h b/drivers/usb/storage/unusual_devs.h index c1602b8c5594..ccff3483eebc 100644 --- a/drivers/usb/storage/unusual_devs.h +++ b/drivers/usb/storage/unusual_devs.h | |||
@@ -1114,6 +1114,16 @@ UNUSUAL_DEV( 0x090c, 0x1132, 0x0000, 0xffff, | |||
1114 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, | 1114 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
1115 | US_FL_FIX_CAPACITY ), | 1115 | US_FL_FIX_CAPACITY ), |
1116 | 1116 | ||
1117 | /* Reported by Paul Hartman <paul.hartman+linux@gmail.com> | ||
1118 | * This card reader returns "Illegal Request, Logical Block Address | ||
1119 | * Out of Range" for the first READ(10) after a new card is inserted. | ||
1120 | */ | ||
1121 | UNUSUAL_DEV( 0x090c, 0x6000, 0x0100, 0x0100, | ||
1122 | "Feiya", | ||
1123 | "SD/SDHC Card Reader", | ||
1124 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, | ||
1125 | US_FL_INITIAL_READ10 ), | ||
1126 | |||
1117 | /* This Pentax still camera is not conformant | 1127 | /* This Pentax still camera is not conformant |
1118 | * to the USB storage specification: - | 1128 | * to the USB storage specification: - |
1119 | * - It does not like the INQUIRY command. So we must handle this command | 1129 | * - It does not like the INQUIRY command. So we must handle this command |
@@ -1888,6 +1898,15 @@ UNUSUAL_DEV( 0x1908, 0x3335, 0x0200, 0x0200, | |||
1888 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, | 1898 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, |
1889 | US_FL_NO_READ_DISC_INFO ), | 1899 | US_FL_NO_READ_DISC_INFO ), |
1890 | 1900 | ||
1901 | /* Reported by Sven Geggus <sven-usbst@geggus.net> | ||
1902 | * This encrypted pen drive returns bogus data for the initial READ(10). | ||
1903 | */ | ||
1904 | UNUSUAL_DEV( 0x1b1c, 0x1ab5, 0x0200, 0x0200, | ||
1905 | "Corsair", | ||
1906 | "Padlock v2", | ||
1907 | USB_SC_DEVICE, USB_PR_DEVICE, NULL, | ||
1908 | US_FL_INITIAL_READ10 ), | ||
1909 | |||
1891 | /* Patch by Richard Schütz <r.schtz@t-online.de> | 1910 | /* Patch by Richard Schütz <r.schtz@t-online.de> |
1892 | * This external hard drive enclosure uses a JMicron chip which | 1911 | * This external hard drive enclosure uses a JMicron chip which |
1893 | * needs the US_FL_IGNORE_RESIDUE flag to work properly. */ | 1912 | * needs the US_FL_IGNORE_RESIDUE flag to work properly. */ |
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c index 5ee7ac42e08f..0ca095820f3e 100644 --- a/drivers/usb/storage/usb.c +++ b/drivers/usb/storage/usb.c | |||
@@ -440,7 +440,8 @@ static void adjust_quirks(struct us_data *us) | |||
440 | US_FL_NOT_LOCKABLE | US_FL_MAX_SECTORS_64 | | 440 | US_FL_NOT_LOCKABLE | US_FL_MAX_SECTORS_64 | |
441 | US_FL_CAPACITY_OK | US_FL_IGNORE_RESIDUE | | 441 | US_FL_CAPACITY_OK | US_FL_IGNORE_RESIDUE | |
442 | US_FL_SINGLE_LUN | US_FL_NO_WP_DETECT | | 442 | US_FL_SINGLE_LUN | US_FL_NO_WP_DETECT | |
443 | US_FL_NO_READ_DISC_INFO | US_FL_NO_READ_CAPACITY_16); | 443 | US_FL_NO_READ_DISC_INFO | US_FL_NO_READ_CAPACITY_16 | |
444 | US_FL_INITIAL_READ10); | ||
444 | 445 | ||
445 | p = quirks; | 446 | p = quirks; |
446 | while (*p) { | 447 | while (*p) { |
@@ -490,6 +491,9 @@ static void adjust_quirks(struct us_data *us) | |||
490 | case 'm': | 491 | case 'm': |
491 | f |= US_FL_MAX_SECTORS_64; | 492 | f |= US_FL_MAX_SECTORS_64; |
492 | break; | 493 | break; |
494 | case 'n': | ||
495 | f |= US_FL_INITIAL_READ10; | ||
496 | break; | ||
493 | case 'o': | 497 | case 'o': |
494 | f |= US_FL_CAPACITY_OK; | 498 | f |= US_FL_CAPACITY_OK; |
495 | break; | 499 | break; |
@@ -953,6 +957,13 @@ int usb_stor_probe2(struct us_data *us) | |||
953 | if (result) | 957 | if (result) |
954 | goto BadDevice; | 958 | goto BadDevice; |
955 | 959 | ||
960 | /* | ||
961 | * If the device returns invalid data for the first READ(10) | ||
962 | * command, indicate the command should be retried. | ||
963 | */ | ||
964 | if (us->fflags & US_FL_INITIAL_READ10) | ||
965 | set_bit(US_FLIDX_REDO_READ10, &us->dflags); | ||
966 | |||
956 | /* Acquire all the other resources and add the host */ | 967 | /* Acquire all the other resources and add the host */ |
957 | result = usb_stor_acquire_resources(us); | 968 | result = usb_stor_acquire_resources(us); |
958 | if (result) | 969 | if (result) |
diff --git a/drivers/usb/storage/usb.h b/drivers/usb/storage/usb.h index 89d3bfff98df..7b0f2113632e 100644 --- a/drivers/usb/storage/usb.h +++ b/drivers/usb/storage/usb.h | |||
@@ -73,6 +73,8 @@ struct us_unusual_dev { | |||
73 | #define US_FLIDX_RESETTING 4 /* device reset in progress */ | 73 | #define US_FLIDX_RESETTING 4 /* device reset in progress */ |
74 | #define US_FLIDX_TIMED_OUT 5 /* SCSI midlayer timed out */ | 74 | #define US_FLIDX_TIMED_OUT 5 /* SCSI midlayer timed out */ |
75 | #define US_FLIDX_DONT_SCAN 6 /* don't scan (disconnect) */ | 75 | #define US_FLIDX_DONT_SCAN 6 /* don't scan (disconnect) */ |
76 | #define US_FLIDX_REDO_READ10 7 /* redo READ(10) command */ | ||
77 | #define US_FLIDX_READ10_WORKED 8 /* previous READ(10) succeeded */ | ||
76 | 78 | ||
77 | #define USB_STOR_STRING_LEN 32 | 79 | #define USB_STOR_STRING_LEN 32 |
78 | 80 | ||
diff --git a/drivers/video/arcfb.c b/drivers/video/arcfb.c index 3ec4923c2d84..c22e8d39a2cb 100644 --- a/drivers/video/arcfb.c +++ b/drivers/video/arcfb.c | |||
@@ -515,11 +515,10 @@ static int __devinit arcfb_probe(struct platform_device *dev) | |||
515 | 515 | ||
516 | /* We need a flat backing store for the Arc's | 516 | /* We need a flat backing store for the Arc's |
517 | less-flat actual paged framebuffer */ | 517 | less-flat actual paged framebuffer */ |
518 | if (!(videomemory = vmalloc(videomemorysize))) | 518 | videomemory = vzalloc(videomemorysize); |
519 | if (!videomemory) | ||
519 | return retval; | 520 | return retval; |
520 | 521 | ||
521 | memset(videomemory, 0, videomemorysize); | ||
522 | |||
523 | info = framebuffer_alloc(sizeof(struct arcfb_par), &dev->dev); | 522 | info = framebuffer_alloc(sizeof(struct arcfb_par), &dev->dev); |
524 | if (!info) | 523 | if (!info) |
525 | goto err; | 524 | goto err; |
diff --git a/drivers/video/bf537-lq035.c b/drivers/video/bf537-lq035.c index 47c21fb2c82f..bea53c1a4950 100644 --- a/drivers/video/bf537-lq035.c +++ b/drivers/video/bf537-lq035.c | |||
@@ -789,6 +789,7 @@ static int __devinit bfin_lq035_probe(struct platform_device *pdev) | |||
789 | i2c_add_driver(&ad5280_driver); | 789 | i2c_add_driver(&ad5280_driver); |
790 | 790 | ||
791 | memset(&props, 0, sizeof(props)); | 791 | memset(&props, 0, sizeof(props)); |
792 | props.type = BACKLIGHT_RAW; | ||
792 | props.max_brightness = MAX_BRIGHENESS; | 793 | props.max_brightness = MAX_BRIGHENESS; |
793 | bl_dev = backlight_device_register("bf537-bl", NULL, NULL, | 794 | bl_dev = backlight_device_register("bf537-bl", NULL, NULL, |
794 | &bfin_lq035fb_bl_ops, &props); | 795 | &bfin_lq035fb_bl_ops, &props); |
diff --git a/drivers/video/broadsheetfb.c b/drivers/video/broadsheetfb.c index ebda6876d3a9..377dde3d5bfc 100644 --- a/drivers/video/broadsheetfb.c +++ b/drivers/video/broadsheetfb.c | |||
@@ -1101,12 +1101,10 @@ static int __devinit broadsheetfb_probe(struct platform_device *dev) | |||
1101 | 1101 | ||
1102 | videomemorysize = roundup((dpyw*dpyh), PAGE_SIZE); | 1102 | videomemorysize = roundup((dpyw*dpyh), PAGE_SIZE); |
1103 | 1103 | ||
1104 | videomemory = vmalloc(videomemorysize); | 1104 | videomemory = vzalloc(videomemorysize); |
1105 | if (!videomemory) | 1105 | if (!videomemory) |
1106 | goto err_fb_rel; | 1106 | goto err_fb_rel; |
1107 | 1107 | ||
1108 | memset(videomemory, 0, videomemorysize); | ||
1109 | |||
1110 | info->screen_base = (char *)videomemory; | 1108 | info->screen_base = (char *)videomemory; |
1111 | info->fbops = &broadsheetfb_ops; | 1109 | info->fbops = &broadsheetfb_ops; |
1112 | 1110 | ||
diff --git a/drivers/video/efifb.c b/drivers/video/efifb.c index fb205843c2c7..69c49dfce9cf 100644 --- a/drivers/video/efifb.c +++ b/drivers/video/efifb.c | |||
@@ -16,6 +16,8 @@ | |||
16 | #include <linux/pci.h> | 16 | #include <linux/pci.h> |
17 | #include <video/vga.h> | 17 | #include <video/vga.h> |
18 | 18 | ||
19 | static bool request_mem_succeeded = false; | ||
20 | |||
19 | static struct fb_var_screeninfo efifb_defined __devinitdata = { | 21 | static struct fb_var_screeninfo efifb_defined __devinitdata = { |
20 | .activate = FB_ACTIVATE_NOW, | 22 | .activate = FB_ACTIVATE_NOW, |
21 | .height = -1, | 23 | .height = -1, |
@@ -281,7 +283,9 @@ static void efifb_destroy(struct fb_info *info) | |||
281 | { | 283 | { |
282 | if (info->screen_base) | 284 | if (info->screen_base) |
283 | iounmap(info->screen_base); | 285 | iounmap(info->screen_base); |
284 | release_mem_region(info->apertures->ranges[0].base, info->apertures->ranges[0].size); | 286 | if (request_mem_succeeded) |
287 | release_mem_region(info->apertures->ranges[0].base, | ||
288 | info->apertures->ranges[0].size); | ||
285 | framebuffer_release(info); | 289 | framebuffer_release(info); |
286 | } | 290 | } |
287 | 291 | ||
@@ -326,14 +330,13 @@ static int __init efifb_setup(char *options) | |||
326 | return 0; | 330 | return 0; |
327 | } | 331 | } |
328 | 332 | ||
329 | static int __devinit efifb_probe(struct platform_device *dev) | 333 | static int __init efifb_probe(struct platform_device *dev) |
330 | { | 334 | { |
331 | struct fb_info *info; | 335 | struct fb_info *info; |
332 | int err; | 336 | int err; |
333 | unsigned int size_vmode; | 337 | unsigned int size_vmode; |
334 | unsigned int size_remap; | 338 | unsigned int size_remap; |
335 | unsigned int size_total; | 339 | unsigned int size_total; |
336 | int request_succeeded = 0; | ||
337 | 340 | ||
338 | if (!screen_info.lfb_depth) | 341 | if (!screen_info.lfb_depth) |
339 | screen_info.lfb_depth = 32; | 342 | screen_info.lfb_depth = 32; |
@@ -387,7 +390,7 @@ static int __devinit efifb_probe(struct platform_device *dev) | |||
387 | efifb_fix.smem_len = size_remap; | 390 | efifb_fix.smem_len = size_remap; |
388 | 391 | ||
389 | if (request_mem_region(efifb_fix.smem_start, size_remap, "efifb")) { | 392 | if (request_mem_region(efifb_fix.smem_start, size_remap, "efifb")) { |
390 | request_succeeded = 1; | 393 | request_mem_succeeded = true; |
391 | } else { | 394 | } else { |
392 | /* We cannot make this fatal. Sometimes this comes from magic | 395 | /* We cannot make this fatal. Sometimes this comes from magic |
393 | spaces our resource handlers simply don't know about */ | 396 | spaces our resource handlers simply don't know about */ |
@@ -413,7 +416,7 @@ static int __devinit efifb_probe(struct platform_device *dev) | |||
413 | info->apertures->ranges[0].base = efifb_fix.smem_start; | 416 | info->apertures->ranges[0].base = efifb_fix.smem_start; |
414 | info->apertures->ranges[0].size = size_remap; | 417 | info->apertures->ranges[0].size = size_remap; |
415 | 418 | ||
416 | info->screen_base = ioremap(efifb_fix.smem_start, efifb_fix.smem_len); | 419 | info->screen_base = ioremap_wc(efifb_fix.smem_start, efifb_fix.smem_len); |
417 | if (!info->screen_base) { | 420 | if (!info->screen_base) { |
418 | printk(KERN_ERR "efifb: abort, cannot ioremap video memory " | 421 | printk(KERN_ERR "efifb: abort, cannot ioremap video memory " |
419 | "0x%x @ 0x%lx\n", | 422 | "0x%x @ 0x%lx\n", |
@@ -491,13 +494,12 @@ err_unmap: | |||
491 | err_release_fb: | 494 | err_release_fb: |
492 | framebuffer_release(info); | 495 | framebuffer_release(info); |
493 | err_release_mem: | 496 | err_release_mem: |
494 | if (request_succeeded) | 497 | if (request_mem_succeeded) |
495 | release_mem_region(efifb_fix.smem_start, size_total); | 498 | release_mem_region(efifb_fix.smem_start, size_total); |
496 | return err; | 499 | return err; |
497 | } | 500 | } |
498 | 501 | ||
499 | static struct platform_driver efifb_driver = { | 502 | static struct platform_driver efifb_driver = { |
500 | .probe = efifb_probe, | ||
501 | .driver = { | 503 | .driver = { |
502 | .name = "efifb", | 504 | .name = "efifb", |
503 | }, | 505 | }, |
@@ -528,13 +530,21 @@ static int __init efifb_init(void) | |||
528 | if (!screen_info.lfb_linelength) | 530 | if (!screen_info.lfb_linelength) |
529 | return -ENODEV; | 531 | return -ENODEV; |
530 | 532 | ||
531 | ret = platform_driver_register(&efifb_driver); | 533 | ret = platform_device_register(&efifb_device); |
534 | if (ret) | ||
535 | return ret; | ||
532 | 536 | ||
533 | if (!ret) { | 537 | /* |
534 | ret = platform_device_register(&efifb_device); | 538 | * This is not just an optimization. We will interfere |
535 | if (ret) | 539 | * with a real driver if we get reprobed, so don't allow |
536 | platform_driver_unregister(&efifb_driver); | 540 | * it. |
541 | */ | ||
542 | ret = platform_driver_probe(&efifb_driver, efifb_probe); | ||
543 | if (ret) { | ||
544 | platform_device_unregister(&efifb_driver); | ||
545 | return ret; | ||
537 | } | 546 | } |
547 | |||
538 | return ret; | 548 | return ret; |
539 | } | 549 | } |
540 | module_init(efifb_init); | 550 | module_init(efifb_init); |
diff --git a/drivers/video/hecubafb.c b/drivers/video/hecubafb.c index 1b94643ecbcf..fbef15f7a218 100644 --- a/drivers/video/hecubafb.c +++ b/drivers/video/hecubafb.c | |||
@@ -231,11 +231,10 @@ static int __devinit hecubafb_probe(struct platform_device *dev) | |||
231 | 231 | ||
232 | videomemorysize = (DPY_W*DPY_H)/8; | 232 | videomemorysize = (DPY_W*DPY_H)/8; |
233 | 233 | ||
234 | if (!(videomemory = vmalloc(videomemorysize))) | 234 | videomemory = vzalloc(videomemorysize); |
235 | if (!videomemory) | ||
235 | return retval; | 236 | return retval; |
236 | 237 | ||
237 | memset(videomemory, 0, videomemorysize); | ||
238 | |||
239 | info = framebuffer_alloc(sizeof(struct hecubafb_par), &dev->dev); | 238 | info = framebuffer_alloc(sizeof(struct hecubafb_par), &dev->dev); |
240 | if (!info) | 239 | if (!info) |
241 | goto err_fballoc; | 240 | goto err_fballoc; |
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index d2ccfd6e662c..f135dbead07d 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c | |||
@@ -856,10 +856,10 @@ failed_platform_init: | |||
856 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, | 856 | dma_free_writecombine(&pdev->dev,fbi->map_size,fbi->map_cpu, |
857 | fbi->map_dma); | 857 | fbi->map_dma); |
858 | failed_map: | 858 | failed_map: |
859 | clk_put(fbi->clk); | ||
860 | failed_getclock: | ||
861 | iounmap(fbi->regs); | 859 | iounmap(fbi->regs); |
862 | failed_ioremap: | 860 | failed_ioremap: |
861 | clk_put(fbi->clk); | ||
862 | failed_getclock: | ||
863 | release_mem_region(res->start, resource_size(res)); | 863 | release_mem_region(res->start, resource_size(res)); |
864 | failed_req: | 864 | failed_req: |
865 | kfree(info->pseudo_palette); | 865 | kfree(info->pseudo_palette); |
diff --git a/drivers/video/metronomefb.c b/drivers/video/metronomefb.c index ed64edfd2c43..97d45e5115e2 100644 --- a/drivers/video/metronomefb.c +++ b/drivers/video/metronomefb.c | |||
@@ -628,12 +628,10 @@ static int __devinit metronomefb_probe(struct platform_device *dev) | |||
628 | /* we need to add a spare page because our csum caching scheme walks | 628 | /* we need to add a spare page because our csum caching scheme walks |
629 | * to the end of the page */ | 629 | * to the end of the page */ |
630 | videomemorysize = PAGE_SIZE + (fw * fh); | 630 | videomemorysize = PAGE_SIZE + (fw * fh); |
631 | videomemory = vmalloc(videomemorysize); | 631 | videomemory = vzalloc(videomemorysize); |
632 | if (!videomemory) | 632 | if (!videomemory) |
633 | goto err_fb_rel; | 633 | goto err_fb_rel; |
634 | 634 | ||
635 | memset(videomemory, 0, videomemorysize); | ||
636 | |||
637 | info->screen_base = (char __force __iomem *)videomemory; | 635 | info->screen_base = (char __force __iomem *)videomemory; |
638 | info->fbops = &metronomefb_ops; | 636 | info->fbops = &metronomefb_ops; |
639 | 637 | ||
diff --git a/drivers/video/modedb.c b/drivers/video/modedb.c index 48c3ea8652b6..cb175fe7abc0 100644 --- a/drivers/video/modedb.c +++ b/drivers/video/modedb.c | |||
@@ -1128,3 +1128,4 @@ EXPORT_SYMBOL(fb_find_best_mode); | |||
1128 | EXPORT_SYMBOL(fb_find_nearest_mode); | 1128 | EXPORT_SYMBOL(fb_find_nearest_mode); |
1129 | EXPORT_SYMBOL(fb_videomode_to_modelist); | 1129 | EXPORT_SYMBOL(fb_videomode_to_modelist); |
1130 | EXPORT_SYMBOL(fb_find_mode); | 1130 | EXPORT_SYMBOL(fb_find_mode); |
1131 | EXPORT_SYMBOL(fb_find_mode_cvt); | ||
diff --git a/drivers/video/pxa168fb.c b/drivers/video/pxa168fb.c index 35f61dd0cb3a..bb95ec56d25d 100644 --- a/drivers/video/pxa168fb.c +++ b/drivers/video/pxa168fb.c | |||
@@ -623,19 +623,21 @@ static int __devinit pxa168fb_probe(struct platform_device *pdev) | |||
623 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 623 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
624 | if (res == NULL) { | 624 | if (res == NULL) { |
625 | dev_err(&pdev->dev, "no IO memory defined\n"); | 625 | dev_err(&pdev->dev, "no IO memory defined\n"); |
626 | return -ENOENT; | 626 | ret = -ENOENT; |
627 | goto failed_put_clk; | ||
627 | } | 628 | } |
628 | 629 | ||
629 | irq = platform_get_irq(pdev, 0); | 630 | irq = platform_get_irq(pdev, 0); |
630 | if (irq < 0) { | 631 | if (irq < 0) { |
631 | dev_err(&pdev->dev, "no IRQ defined\n"); | 632 | dev_err(&pdev->dev, "no IRQ defined\n"); |
632 | return -ENOENT; | 633 | ret = -ENOENT; |
634 | goto failed_put_clk; | ||
633 | } | 635 | } |
634 | 636 | ||
635 | info = framebuffer_alloc(sizeof(struct pxa168fb_info), &pdev->dev); | 637 | info = framebuffer_alloc(sizeof(struct pxa168fb_info), &pdev->dev); |
636 | if (info == NULL) { | 638 | if (info == NULL) { |
637 | clk_put(clk); | 639 | ret = -ENOMEM; |
638 | return -ENOMEM; | 640 | goto failed_put_clk; |
639 | } | 641 | } |
640 | 642 | ||
641 | /* Initialize private data */ | 643 | /* Initialize private data */ |
@@ -671,7 +673,7 @@ static int __devinit pxa168fb_probe(struct platform_device *pdev) | |||
671 | fbi->reg_base = ioremap_nocache(res->start, resource_size(res)); | 673 | fbi->reg_base = ioremap_nocache(res->start, resource_size(res)); |
672 | if (fbi->reg_base == NULL) { | 674 | if (fbi->reg_base == NULL) { |
673 | ret = -ENOMEM; | 675 | ret = -ENOMEM; |
674 | goto failed; | 676 | goto failed_free_info; |
675 | } | 677 | } |
676 | 678 | ||
677 | /* | 679 | /* |
@@ -683,7 +685,7 @@ static int __devinit pxa168fb_probe(struct platform_device *pdev) | |||
683 | &fbi->fb_start_dma, GFP_KERNEL); | 685 | &fbi->fb_start_dma, GFP_KERNEL); |
684 | if (info->screen_base == NULL) { | 686 | if (info->screen_base == NULL) { |
685 | ret = -ENOMEM; | 687 | ret = -ENOMEM; |
686 | goto failed; | 688 | goto failed_free_info; |
687 | } | 689 | } |
688 | 690 | ||
689 | info->fix.smem_start = (unsigned long)fbi->fb_start_dma; | 691 | info->fix.smem_start = (unsigned long)fbi->fb_start_dma; |
@@ -772,8 +774,9 @@ failed_free_clk: | |||
772 | failed_free_fbmem: | 774 | failed_free_fbmem: |
773 | dma_free_coherent(fbi->dev, info->fix.smem_len, | 775 | dma_free_coherent(fbi->dev, info->fix.smem_len, |
774 | info->screen_base, fbi->fb_start_dma); | 776 | info->screen_base, fbi->fb_start_dma); |
775 | failed: | 777 | failed_free_info: |
776 | kfree(info); | 778 | kfree(info); |
779 | failed_put_clk: | ||
777 | clk_put(clk); | 780 | clk_put(clk); |
778 | 781 | ||
779 | dev_err(&pdev->dev, "frame buffer device init failed with %d\n", ret); | 782 | dev_err(&pdev->dev, "frame buffer device init failed with %d\n", ret); |
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c index 3b7f2f5bae71..4de541ca9c52 100644 --- a/drivers/video/savage/savagefb_driver.c +++ b/drivers/video/savage/savagefb_driver.c | |||
@@ -2237,6 +2237,22 @@ static int __devinit savagefb_probe(struct pci_dev* dev, | |||
2237 | &info->modelist); | 2237 | &info->modelist); |
2238 | #endif | 2238 | #endif |
2239 | info->var = savagefb_var800x600x8; | 2239 | info->var = savagefb_var800x600x8; |
2240 | /* if a panel was detected, default to a CVT mode instead */ | ||
2241 | if (par->SavagePanelWidth) { | ||
2242 | struct fb_videomode cvt_mode; | ||
2243 | |||
2244 | memset(&cvt_mode, 0, sizeof(cvt_mode)); | ||
2245 | cvt_mode.xres = par->SavagePanelWidth; | ||
2246 | cvt_mode.yres = par->SavagePanelHeight; | ||
2247 | cvt_mode.refresh = 60; | ||
2248 | /* FIXME: if we know there is only the panel | ||
2249 | * we can enable reduced blanking as well */ | ||
2250 | if (fb_find_mode_cvt(&cvt_mode, 0, 0)) | ||
2251 | printk(KERN_WARNING "No CVT mode found for panel\n"); | ||
2252 | else if (fb_find_mode(&info->var, info, NULL, NULL, 0, | ||
2253 | &cvt_mode, 0) != 3) | ||
2254 | info->var = savagefb_var800x600x8; | ||
2255 | } | ||
2240 | 2256 | ||
2241 | if (mode_option) { | 2257 | if (mode_option) { |
2242 | fb_find_mode(&info->var, info, mode_option, | 2258 | fb_find_mode(&info->var, info, mode_option, |
diff --git a/drivers/video/sh_mobile_lcdcfb.c b/drivers/video/sh_mobile_lcdcfb.c index 404c03b4b7c7..019dbd3f12b2 100644 --- a/drivers/video/sh_mobile_lcdcfb.c +++ b/drivers/video/sh_mobile_lcdcfb.c | |||
@@ -470,7 +470,7 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) | |||
470 | unsigned long tmp; | 470 | unsigned long tmp; |
471 | int bpp = 0; | 471 | int bpp = 0; |
472 | unsigned long ldddsr; | 472 | unsigned long ldddsr; |
473 | int k, m; | 473 | int k, m, ret; |
474 | 474 | ||
475 | /* enable clocks before accessing the hardware */ | 475 | /* enable clocks before accessing the hardware */ |
476 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { | 476 | for (k = 0; k < ARRAY_SIZE(priv->ch); k++) { |
@@ -540,7 +540,7 @@ static int sh_mobile_lcdc_start(struct sh_mobile_lcdc_priv *priv) | |||
540 | 540 | ||
541 | board_cfg = &ch->cfg.board_cfg; | 541 | board_cfg = &ch->cfg.board_cfg; |
542 | if (board_cfg->setup_sys) { | 542 | if (board_cfg->setup_sys) { |
543 | int ret = board_cfg->setup_sys(board_cfg->board_data, | 543 | ret = board_cfg->setup_sys(board_cfg->board_data, |
544 | ch, &sh_mobile_lcdc_sys_bus_ops); | 544 | ch, &sh_mobile_lcdc_sys_bus_ops); |
545 | if (ret) | 545 | if (ret) |
546 | return ret; | 546 | return ret; |
diff --git a/drivers/video/vga16fb.c b/drivers/video/vga16fb.c index 53b2c5aae067..305c975b1787 100644 --- a/drivers/video/vga16fb.c +++ b/drivers/video/vga16fb.c | |||
@@ -1265,9 +1265,11 @@ static void vga16fb_imageblit(struct fb_info *info, const struct fb_image *image | |||
1265 | 1265 | ||
1266 | static void vga16fb_destroy(struct fb_info *info) | 1266 | static void vga16fb_destroy(struct fb_info *info) |
1267 | { | 1267 | { |
1268 | struct platform_device *dev = container_of(info->device, struct platform_device, dev); | ||
1268 | iounmap(info->screen_base); | 1269 | iounmap(info->screen_base); |
1269 | fb_dealloc_cmap(&info->cmap); | 1270 | fb_dealloc_cmap(&info->cmap); |
1270 | /* XXX unshare VGA regions */ | 1271 | /* XXX unshare VGA regions */ |
1272 | platform_set_drvdata(dev, NULL); | ||
1271 | framebuffer_release(info); | 1273 | framebuffer_release(info); |
1272 | } | 1274 | } |
1273 | 1275 | ||
diff --git a/drivers/video/xen-fbfront.c b/drivers/video/xen-fbfront.c index a20218c2fda8..beac52fc1c0e 100644 --- a/drivers/video/xen-fbfront.c +++ b/drivers/video/xen-fbfront.c | |||
@@ -395,10 +395,9 @@ static int __devinit xenfb_probe(struct xenbus_device *dev, | |||
395 | spin_lock_init(&info->dirty_lock); | 395 | spin_lock_init(&info->dirty_lock); |
396 | spin_lock_init(&info->resize_lock); | 396 | spin_lock_init(&info->resize_lock); |
397 | 397 | ||
398 | info->fb = vmalloc(fb_size); | 398 | info->fb = vzalloc(fb_size); |
399 | if (info->fb == NULL) | 399 | if (info->fb == NULL) |
400 | goto error_nomem; | 400 | goto error_nomem; |
401 | memset(info->fb, 0, fb_size); | ||
402 | 401 | ||
403 | info->nr_pages = (fb_size + PAGE_SIZE - 1) >> PAGE_SHIFT; | 402 | info->nr_pages = (fb_size + PAGE_SIZE - 1) >> PAGE_SHIFT; |
404 | 403 | ||
diff --git a/drivers/xen/events.c b/drivers/xen/events.c index 3ff822b48145..553da68bd510 100644 --- a/drivers/xen/events.c +++ b/drivers/xen/events.c | |||
@@ -626,6 +626,9 @@ int xen_allocate_pirq_gsi(unsigned gsi) | |||
626 | * | 626 | * |
627 | * Note: We don't assign an event channel until the irq actually started | 627 | * Note: We don't assign an event channel until the irq actually started |
628 | * up. Return an existing irq if we've already got one for the gsi. | 628 | * up. Return an existing irq if we've already got one for the gsi. |
629 | * | ||
630 | * Shareable implies level triggered, not shareable implies edge | ||
631 | * triggered here. | ||
629 | */ | 632 | */ |
630 | int xen_bind_pirq_gsi_to_irq(unsigned gsi, | 633 | int xen_bind_pirq_gsi_to_irq(unsigned gsi, |
631 | unsigned pirq, int shareable, char *name) | 634 | unsigned pirq, int shareable, char *name) |
@@ -664,16 +667,13 @@ int xen_bind_pirq_gsi_to_irq(unsigned gsi, | |||
664 | 667 | ||
665 | pirq_query_unmask(irq); | 668 | pirq_query_unmask(irq); |
666 | /* We try to use the handler with the appropriate semantic for the | 669 | /* We try to use the handler with the appropriate semantic for the |
667 | * type of interrupt: if the interrupt doesn't need an eoi | 670 | * type of interrupt: if the interrupt is an edge triggered |
668 | * (pirq_needs_eoi returns false), we treat it like an edge | 671 | * interrupt we use handle_edge_irq. |
669 | * triggered interrupt so we use handle_edge_irq. | ||
670 | * As a matter of fact this only happens when the corresponding | ||
671 | * physical interrupt is edge triggered or an msi. | ||
672 | * | 672 | * |
673 | * On the other hand if the interrupt needs an eoi (pirq_needs_eoi | 673 | * On the other hand if the interrupt is level triggered we use |
674 | * returns true) we treat it like a level triggered interrupt so we | 674 | * handle_fasteoi_irq like the native code does for this kind of |
675 | * use handle_fasteoi_irq like the native code does for this kind of | ||
676 | * interrupts. | 675 | * interrupts. |
676 | * | ||
677 | * Depending on the Xen version, pirq_needs_eoi might return true | 677 | * Depending on the Xen version, pirq_needs_eoi might return true |
678 | * not only for level triggered interrupts but for edge triggered | 678 | * not only for level triggered interrupts but for edge triggered |
679 | * interrupts too. In any case Xen always honors the eoi mechanism, | 679 | * interrupts too. In any case Xen always honors the eoi mechanism, |
@@ -681,7 +681,7 @@ int xen_bind_pirq_gsi_to_irq(unsigned gsi, | |||
681 | * hasn't received an eoi yet. Therefore using the fasteoi handler | 681 | * hasn't received an eoi yet. Therefore using the fasteoi handler |
682 | * is the right choice either way. | 682 | * is the right choice either way. |
683 | */ | 683 | */ |
684 | if (pirq_needs_eoi(irq)) | 684 | if (shareable) |
685 | irq_set_chip_and_handler_name(irq, &xen_pirq_chip, | 685 | irq_set_chip_and_handler_name(irq, &xen_pirq_chip, |
686 | handle_fasteoi_irq, name); | 686 | handle_fasteoi_irq, name); |
687 | else | 687 | else |
diff --git a/drivers/xen/swiotlb-xen.c b/drivers/xen/swiotlb-xen.c index 65ea21a97492..6e8c15a23201 100644 --- a/drivers/xen/swiotlb-xen.c +++ b/drivers/xen/swiotlb-xen.c | |||
@@ -147,9 +147,15 @@ void __init xen_swiotlb_init(int verbose) | |||
147 | { | 147 | { |
148 | unsigned long bytes; | 148 | unsigned long bytes; |
149 | int rc; | 149 | int rc; |
150 | 150 | unsigned long nr_tbl; | |
151 | xen_io_tlb_nslabs = (64 * 1024 * 1024 >> IO_TLB_SHIFT); | 151 | |
152 | xen_io_tlb_nslabs = ALIGN(xen_io_tlb_nslabs, IO_TLB_SEGSIZE); | 152 | nr_tbl = swioltb_nr_tbl(); |
153 | if (nr_tbl) | ||
154 | xen_io_tlb_nslabs = nr_tbl; | ||
155 | else { | ||
156 | xen_io_tlb_nslabs = (64 * 1024 * 1024 >> IO_TLB_SHIFT); | ||
157 | xen_io_tlb_nslabs = ALIGN(xen_io_tlb_nslabs, IO_TLB_SEGSIZE); | ||
158 | } | ||
153 | 159 | ||
154 | bytes = xen_io_tlb_nslabs << IO_TLB_SHIFT; | 160 | bytes = xen_io_tlb_nslabs << IO_TLB_SHIFT; |
155 | 161 | ||