aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/nfc/Kconfig12
-rw-r--r--drivers/nfc/Makefile1
-rw-r--r--drivers/nfc/pn533.c28
-rw-r--r--drivers/nfc/pn544/i2c.c194
-rw-r--r--drivers/nfc/pn544/pn544.c2
-rw-r--r--drivers/nfc/pn544/pn544.h3
-rw-r--r--drivers/nfc/port100.c25
-rw-r--r--drivers/nfc/trf7970a.c1370
8 files changed, 1601 insertions, 34 deletions
diff --git a/drivers/nfc/Kconfig b/drivers/nfc/Kconfig
index fe20e1cc0545..65d4ca19d132 100644
--- a/drivers/nfc/Kconfig
+++ b/drivers/nfc/Kconfig
@@ -26,6 +26,18 @@ config NFC_WILINK
26 Say Y here to compile support for Texas Instrument's NFC WiLink driver 26 Say Y here to compile support for Texas Instrument's NFC WiLink driver
27 into the kernel or say M to compile it as module. 27 into the kernel or say M to compile it as module.
28 28
29config NFC_TRF7970A
30 tristate "Texas Instruments TRF7970a NFC driver"
31 depends on SPI && NFC_DIGITAL
32 help
33 This option enables the NFC driver for Texas Instruments' TRF7970a
34 device. Such device supports 5 different protocols: ISO14443A,
35 ISO14443B, FeLiCa, ISO15693 and ISO18000-3.
36
37 Say Y here to compile support for TRF7970a into the kernel or
38 say M to compile it as a module. The module will be called
39 trf7970a.ko.
40
29config NFC_MEI_PHY 41config NFC_MEI_PHY
30 tristate "MEI bus NFC device support" 42 tristate "MEI bus NFC device support"
31 depends on INTEL_MEI && NFC_HCI 43 depends on INTEL_MEI && NFC_HCI
diff --git a/drivers/nfc/Makefile b/drivers/nfc/Makefile
index 56ab822ba03d..ae42a3fa60c9 100644
--- a/drivers/nfc/Makefile
+++ b/drivers/nfc/Makefile
@@ -10,5 +10,6 @@ obj-$(CONFIG_NFC_MEI_PHY) += mei_phy.o
10obj-$(CONFIG_NFC_SIM) += nfcsim.o 10obj-$(CONFIG_NFC_SIM) += nfcsim.o
11obj-$(CONFIG_NFC_PORT100) += port100.o 11obj-$(CONFIG_NFC_PORT100) += port100.o
12obj-$(CONFIG_NFC_MRVL) += nfcmrvl/ 12obj-$(CONFIG_NFC_MRVL) += nfcmrvl/
13obj-$(CONFIG_NFC_TRF7970A) += trf7970a.o
13 14
14ccflags-$(CONFIG_NFC_DEBUG) := -DDEBUG 15ccflags-$(CONFIG_NFC_DEBUG) := -DDEBUG
diff --git a/drivers/nfc/pn533.c b/drivers/nfc/pn533.c
index cf1a87bb74f8..d46a700a9637 100644
--- a/drivers/nfc/pn533.c
+++ b/drivers/nfc/pn533.c
@@ -55,26 +55,14 @@
55 NFC_PROTO_NFC_DEP_MASK) 55 NFC_PROTO_NFC_DEP_MASK)
56 56
57static const struct usb_device_id pn533_table[] = { 57static const struct usb_device_id pn533_table[] = {
58 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE, 58 { USB_DEVICE(PN533_VENDOR_ID, PN533_PRODUCT_ID),
59 .idVendor = PN533_VENDOR_ID, 59 .driver_info = PN533_DEVICE_STD },
60 .idProduct = PN533_PRODUCT_ID, 60 { USB_DEVICE(SCM_VENDOR_ID, SCL3711_PRODUCT_ID),
61 .driver_info = PN533_DEVICE_STD, 61 .driver_info = PN533_DEVICE_STD },
62 }, 62 { USB_DEVICE(SONY_VENDOR_ID, PASORI_PRODUCT_ID),
63 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE, 63 .driver_info = PN533_DEVICE_PASORI },
64 .idVendor = SCM_VENDOR_ID, 64 { USB_DEVICE(ACS_VENDOR_ID, ACR122U_PRODUCT_ID),
65 .idProduct = SCL3711_PRODUCT_ID, 65 .driver_info = PN533_DEVICE_ACR122U },
66 .driver_info = PN533_DEVICE_STD,
67 },
68 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE,
69 .idVendor = SONY_VENDOR_ID,
70 .idProduct = PASORI_PRODUCT_ID,
71 .driver_info = PN533_DEVICE_PASORI,
72 },
73 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE,
74 .idVendor = ACS_VENDOR_ID,
75 .idProduct = ACR122U_PRODUCT_ID,
76 .driver_info = PN533_DEVICE_ACR122U,
77 },
78 { } 66 { }
79}; 67};
80MODULE_DEVICE_TABLE(usb, pn533_table); 68MODULE_DEVICE_TABLE(usb, pn533_table);
diff --git a/drivers/nfc/pn544/i2c.c b/drivers/nfc/pn544/i2c.c
index d6185ff2f87b..f2acd85be86e 100644
--- a/drivers/nfc/pn544/i2c.c
+++ b/drivers/nfc/pn544/i2c.c
@@ -58,8 +58,19 @@ MODULE_DEVICE_TABLE(i2c, pn544_hci_i2c_id_table);
58 58
59#define PN544_HCI_I2C_DRIVER_NAME "pn544_hci_i2c" 59#define PN544_HCI_I2C_DRIVER_NAME "pn544_hci_i2c"
60 60
61/*
62 * Exposed through the 4 most significant bytes
63 * from the HCI SW_VERSION first byte, a.k.a.
64 * SW RomLib.
65 */
66#define PN544_HW_VARIANT_C2 0xa
67#define PN544_HW_VARIANT_C3 0xb
68
69#define PN544_FW_CMD_RESET 0x01
61#define PN544_FW_CMD_WRITE 0x08 70#define PN544_FW_CMD_WRITE 0x08
62#define PN544_FW_CMD_CHECK 0x06 71#define PN544_FW_CMD_CHECK 0x06
72#define PN544_FW_CMD_SECURE_WRITE 0x0C
73#define PN544_FW_CMD_SECURE_CHUNK_WRITE 0x0D
63 74
64struct pn544_i2c_fw_frame_write { 75struct pn544_i2c_fw_frame_write {
65 u8 cmd; 76 u8 cmd;
@@ -88,13 +99,31 @@ struct pn544_i2c_fw_blob {
88 u8 data[]; 99 u8 data[];
89}; 100};
90 101
102struct pn544_i2c_fw_secure_frame {
103 u8 cmd;
104 u16 be_datalen;
105 u8 data[];
106} __packed;
107
108struct pn544_i2c_fw_secure_blob {
109 u64 header;
110 u8 data[];
111};
112
91#define PN544_FW_CMD_RESULT_TIMEOUT 0x01 113#define PN544_FW_CMD_RESULT_TIMEOUT 0x01
92#define PN544_FW_CMD_RESULT_BAD_CRC 0x02 114#define PN544_FW_CMD_RESULT_BAD_CRC 0x02
93#define PN544_FW_CMD_RESULT_ACCESS_DENIED 0x08 115#define PN544_FW_CMD_RESULT_ACCESS_DENIED 0x08
94#define PN544_FW_CMD_RESULT_PROTOCOL_ERROR 0x0B 116#define PN544_FW_CMD_RESULT_PROTOCOL_ERROR 0x0B
95#define PN544_FW_CMD_RESULT_INVALID_PARAMETER 0x11 117#define PN544_FW_CMD_RESULT_INVALID_PARAMETER 0x11
118#define PN544_FW_CMD_RESULT_UNSUPPORTED_COMMAND 0x13
96#define PN544_FW_CMD_RESULT_INVALID_LENGTH 0x18 119#define PN544_FW_CMD_RESULT_INVALID_LENGTH 0x18
120#define PN544_FW_CMD_RESULT_CRYPTOGRAPHIC_ERROR 0x19
121#define PN544_FW_CMD_RESULT_VERSION_CONDITIONS_ERROR 0x1D
122#define PN544_FW_CMD_RESULT_MEMORY_ERROR 0x20
123#define PN544_FW_CMD_RESULT_CHUNK_OK 0x21
97#define PN544_FW_CMD_RESULT_WRITE_FAILED 0x74 124#define PN544_FW_CMD_RESULT_WRITE_FAILED 0x74
125#define PN544_FW_CMD_RESULT_COMMAND_REJECTED 0xE0
126#define PN544_FW_CMD_RESULT_CHUNK_ERROR 0xE6
98 127
99#define MIN(X, Y) ((X) < (Y) ? (X) : (Y)) 128#define MIN(X, Y) ((X) < (Y) ? (X) : (Y))
100 129
@@ -104,11 +133,17 @@ struct pn544_i2c_fw_blob {
104#define PN544_FW_I2C_WRITE_DATA_MAX_LEN MIN((PN544_FW_I2C_MAX_PAYLOAD -\ 133#define PN544_FW_I2C_WRITE_DATA_MAX_LEN MIN((PN544_FW_I2C_MAX_PAYLOAD -\
105 PN544_FW_I2C_WRITE_FRAME_HEADER_LEN),\ 134 PN544_FW_I2C_WRITE_FRAME_HEADER_LEN),\
106 PN544_FW_WRITE_BUFFER_MAX_LEN) 135 PN544_FW_WRITE_BUFFER_MAX_LEN)
136#define PN544_FW_SECURE_CHUNK_WRITE_HEADER_LEN 3
137#define PN544_FW_SECURE_CHUNK_WRITE_DATA_MAX_LEN (PN544_FW_I2C_MAX_PAYLOAD -\
138 PN544_FW_SECURE_CHUNK_WRITE_HEADER_LEN)
139#define PN544_FW_SECURE_FRAME_HEADER_LEN 3
140#define PN544_FW_SECURE_BLOB_HEADER_LEN 8
107 141
108#define FW_WORK_STATE_IDLE 1 142#define FW_WORK_STATE_IDLE 1
109#define FW_WORK_STATE_START 2 143#define FW_WORK_STATE_START 2
110#define FW_WORK_STATE_WAIT_WRITE_ANSWER 3 144#define FW_WORK_STATE_WAIT_WRITE_ANSWER 3
111#define FW_WORK_STATE_WAIT_CHECK_ANSWER 4 145#define FW_WORK_STATE_WAIT_CHECK_ANSWER 4
146#define FW_WORK_STATE_WAIT_SECURE_WRITE_ANSWER 5
112 147
113struct pn544_i2c_phy { 148struct pn544_i2c_phy {
114 struct i2c_client *i2c_dev; 149 struct i2c_client *i2c_dev;
@@ -119,6 +154,8 @@ struct pn544_i2c_phy {
119 unsigned int gpio_fw; 154 unsigned int gpio_fw;
120 unsigned int en_polarity; 155 unsigned int en_polarity;
121 156
157 u8 hw_variant;
158
122 struct work_struct fw_work; 159 struct work_struct fw_work;
123 int fw_work_state; 160 int fw_work_state;
124 char firmware_name[NFC_FIRMWARE_NAME_MAXSIZE + 1]; 161 char firmware_name[NFC_FIRMWARE_NAME_MAXSIZE + 1];
@@ -127,6 +164,8 @@ struct pn544_i2c_phy {
127 size_t fw_blob_size; 164 size_t fw_blob_size;
128 const u8 *fw_blob_data; 165 const u8 *fw_blob_data;
129 size_t fw_written; 166 size_t fw_written;
167 size_t fw_size;
168
130 int fw_cmd_result; 169 int fw_cmd_result;
131 170
132 int powered; 171 int powered;
@@ -390,6 +429,8 @@ static int pn544_hci_i2c_fw_read_status(struct pn544_i2c_phy *phy)
390 switch (response.status) { 429 switch (response.status) {
391 case 0: 430 case 0:
392 return 0; 431 return 0;
432 case PN544_FW_CMD_RESULT_CHUNK_OK:
433 return response.status;
393 case PN544_FW_CMD_RESULT_TIMEOUT: 434 case PN544_FW_CMD_RESULT_TIMEOUT:
394 return -ETIMEDOUT; 435 return -ETIMEDOUT;
395 case PN544_FW_CMD_RESULT_BAD_CRC: 436 case PN544_FW_CMD_RESULT_BAD_CRC:
@@ -400,9 +441,20 @@ static int pn544_hci_i2c_fw_read_status(struct pn544_i2c_phy *phy)
400 return -EPROTO; 441 return -EPROTO;
401 case PN544_FW_CMD_RESULT_INVALID_PARAMETER: 442 case PN544_FW_CMD_RESULT_INVALID_PARAMETER:
402 return -EINVAL; 443 return -EINVAL;
444 case PN544_FW_CMD_RESULT_UNSUPPORTED_COMMAND:
445 return -ENOTSUPP;
403 case PN544_FW_CMD_RESULT_INVALID_LENGTH: 446 case PN544_FW_CMD_RESULT_INVALID_LENGTH:
404 return -EBADMSG; 447 return -EBADMSG;
448 case PN544_FW_CMD_RESULT_CRYPTOGRAPHIC_ERROR:
449 return -ENOKEY;
450 case PN544_FW_CMD_RESULT_VERSION_CONDITIONS_ERROR:
451 return -EINVAL;
452 case PN544_FW_CMD_RESULT_MEMORY_ERROR:
453 return -ENOMEM;
454 case PN544_FW_CMD_RESULT_COMMAND_REJECTED:
455 return -EACCES;
405 case PN544_FW_CMD_RESULT_WRITE_FAILED: 456 case PN544_FW_CMD_RESULT_WRITE_FAILED:
457 case PN544_FW_CMD_RESULT_CHUNK_ERROR:
406 return -EIO; 458 return -EIO;
407 default: 459 default:
408 return -EIO; 460 return -EIO;
@@ -469,7 +521,8 @@ static struct nfc_phy_ops i2c_phy_ops = {
469 .disable = pn544_hci_i2c_disable, 521 .disable = pn544_hci_i2c_disable,
470}; 522};
471 523
472static int pn544_hci_i2c_fw_download(void *phy_id, const char *firmware_name) 524static int pn544_hci_i2c_fw_download(void *phy_id, const char *firmware_name,
525 u8 hw_variant)
473{ 526{
474 struct pn544_i2c_phy *phy = phy_id; 527 struct pn544_i2c_phy *phy = phy_id;
475 528
@@ -477,6 +530,7 @@ static int pn544_hci_i2c_fw_download(void *phy_id, const char *firmware_name)
477 530
478 strcpy(phy->firmware_name, firmware_name); 531 strcpy(phy->firmware_name, firmware_name);
479 532
533 phy->hw_variant = hw_variant;
480 phy->fw_work_state = FW_WORK_STATE_START; 534 phy->fw_work_state = FW_WORK_STATE_START;
481 535
482 schedule_work(&phy->fw_work); 536 schedule_work(&phy->fw_work);
@@ -598,12 +652,93 @@ static int pn544_hci_i2c_fw_write_chunk(struct pn544_i2c_phy *phy)
598 return 0; 652 return 0;
599} 653}
600 654
655static int pn544_hci_i2c_fw_secure_write_frame_cmd(struct pn544_i2c_phy *phy,
656 const u8 *data, u16 datalen)
657{
658 u8 buf[PN544_FW_I2C_MAX_PAYLOAD];
659 struct pn544_i2c_fw_secure_frame *chunk;
660 int chunklen;
661 int r;
662
663 if (datalen > PN544_FW_SECURE_CHUNK_WRITE_DATA_MAX_LEN)
664 datalen = PN544_FW_SECURE_CHUNK_WRITE_DATA_MAX_LEN;
665
666 chunk = (struct pn544_i2c_fw_secure_frame *) buf;
667
668 chunk->cmd = PN544_FW_CMD_SECURE_CHUNK_WRITE;
669
670 put_unaligned_be16(datalen, &chunk->be_datalen);
671
672 memcpy(chunk->data, data, datalen);
673
674 chunklen = sizeof(chunk->cmd) + sizeof(chunk->be_datalen) + datalen;
675
676 r = i2c_master_send(phy->i2c_dev, buf, chunklen);
677
678 if (r == chunklen)
679 return datalen;
680 else if (r < 0)
681 return r;
682 else
683 return -EIO;
684
685}
686
687static int pn544_hci_i2c_fw_secure_write_frame(struct pn544_i2c_phy *phy)
688{
689 struct pn544_i2c_fw_secure_frame *framep;
690 int r;
691
692 framep = (struct pn544_i2c_fw_secure_frame *) phy->fw_blob_data;
693 if (phy->fw_written == 0)
694 phy->fw_blob_size = get_unaligned_be16(&framep->be_datalen)
695 + PN544_FW_SECURE_FRAME_HEADER_LEN;
696
697 /* Only secure write command can be chunked*/
698 if (phy->fw_blob_size > PN544_FW_I2C_MAX_PAYLOAD &&
699 framep->cmd != PN544_FW_CMD_SECURE_WRITE)
700 return -EINVAL;
701
702 /* The firmware also have other commands, we just send them directly */
703 if (phy->fw_blob_size < PN544_FW_I2C_MAX_PAYLOAD) {
704 r = i2c_master_send(phy->i2c_dev,
705 (const char *) phy->fw_blob_data, phy->fw_blob_size);
706
707 if (r == phy->fw_blob_size)
708 goto exit;
709 else if (r < 0)
710 return r;
711 else
712 return -EIO;
713 }
714
715 r = pn544_hci_i2c_fw_secure_write_frame_cmd(phy,
716 phy->fw_blob_data + phy->fw_written,
717 phy->fw_blob_size - phy->fw_written);
718 if (r < 0)
719 return r;
720
721exit:
722 phy->fw_written += r;
723 phy->fw_work_state = FW_WORK_STATE_WAIT_SECURE_WRITE_ANSWER;
724
725 /* SW reset command will not trig any response from PN544 */
726 if (framep->cmd == PN544_FW_CMD_RESET) {
727 pn544_hci_i2c_enable_mode(phy, PN544_FW_MODE);
728 phy->fw_cmd_result = 0;
729 schedule_work(&phy->fw_work);
730 }
731
732 return 0;
733}
734
601static void pn544_hci_i2c_fw_work(struct work_struct *work) 735static void pn544_hci_i2c_fw_work(struct work_struct *work)
602{ 736{
603 struct pn544_i2c_phy *phy = container_of(work, struct pn544_i2c_phy, 737 struct pn544_i2c_phy *phy = container_of(work, struct pn544_i2c_phy,
604 fw_work); 738 fw_work);
605 int r; 739 int r;
606 struct pn544_i2c_fw_blob *blob; 740 struct pn544_i2c_fw_blob *blob;
741 struct pn544_i2c_fw_secure_blob *secure_blob;
607 742
608 switch (phy->fw_work_state) { 743 switch (phy->fw_work_state) {
609 case FW_WORK_STATE_START: 744 case FW_WORK_STATE_START:
@@ -614,13 +749,29 @@ static void pn544_hci_i2c_fw_work(struct work_struct *work)
614 if (r < 0) 749 if (r < 0)
615 goto exit_state_start; 750 goto exit_state_start;
616 751
617 blob = (struct pn544_i2c_fw_blob *) phy->fw->data;
618 phy->fw_blob_size = get_unaligned_be32(&blob->be_size);
619 phy->fw_blob_dest_addr = get_unaligned_be32(&blob->be_destaddr);
620 phy->fw_blob_data = blob->data;
621
622 phy->fw_written = 0; 752 phy->fw_written = 0;
623 r = pn544_hci_i2c_fw_write_chunk(phy); 753
754 switch (phy->hw_variant) {
755 case PN544_HW_VARIANT_C2:
756 blob = (struct pn544_i2c_fw_blob *) phy->fw->data;
757 phy->fw_blob_size = get_unaligned_be32(&blob->be_size);
758 phy->fw_blob_dest_addr = get_unaligned_be32(
759 &blob->be_destaddr);
760 phy->fw_blob_data = blob->data;
761
762 r = pn544_hci_i2c_fw_write_chunk(phy);
763 break;
764 case PN544_HW_VARIANT_C3:
765 secure_blob = (struct pn544_i2c_fw_secure_blob *)
766 phy->fw->data;
767 phy->fw_blob_data = secure_blob->data;
768 phy->fw_size = phy->fw->size;
769 r = pn544_hci_i2c_fw_secure_write_frame(phy);
770 break;
771 default:
772 r = -ENOTSUPP;
773 break;
774 }
624 775
625exit_state_start: 776exit_state_start:
626 if (r < 0) 777 if (r < 0)
@@ -672,6 +823,35 @@ exit_state_wait_check_answer:
672 pn544_hci_i2c_fw_work_complete(phy, r); 823 pn544_hci_i2c_fw_work_complete(phy, r);
673 break; 824 break;
674 825
826 case FW_WORK_STATE_WAIT_SECURE_WRITE_ANSWER:
827 r = phy->fw_cmd_result;
828 if (r < 0)
829 goto exit_state_wait_secure_write_answer;
830
831 if (r == PN544_FW_CMD_RESULT_CHUNK_OK) {
832 r = pn544_hci_i2c_fw_secure_write_frame(phy);
833 goto exit_state_wait_secure_write_answer;
834 }
835
836 if (phy->fw_written == phy->fw_blob_size) {
837 secure_blob = (struct pn544_i2c_fw_secure_blob *)
838 (phy->fw_blob_data + phy->fw_blob_size);
839 phy->fw_size -= phy->fw_blob_size +
840 PN544_FW_SECURE_BLOB_HEADER_LEN;
841 if (phy->fw_size >= PN544_FW_SECURE_BLOB_HEADER_LEN
842 + PN544_FW_SECURE_FRAME_HEADER_LEN) {
843 phy->fw_blob_data = secure_blob->data;
844
845 phy->fw_written = 0;
846 r = pn544_hci_i2c_fw_secure_write_frame(phy);
847 }
848 }
849
850exit_state_wait_secure_write_answer:
851 if (r < 0 || phy->fw_size == 0)
852 pn544_hci_i2c_fw_work_complete(phy, r);
853 break;
854
675 default: 855 default:
676 break; 856 break;
677 } 857 }
diff --git a/drivers/nfc/pn544/pn544.c b/drivers/nfc/pn544/pn544.c
index 3df4a109cfad..9c8051d20cea 100644
--- a/drivers/nfc/pn544/pn544.c
+++ b/drivers/nfc/pn544/pn544.c
@@ -786,7 +786,7 @@ static int pn544_hci_fw_download(struct nfc_hci_dev *hdev,
786 if (info->fw_download == NULL) 786 if (info->fw_download == NULL)
787 return -ENOTSUPP; 787 return -ENOTSUPP;
788 788
789 return info->fw_download(info->phy_id, firmware_name); 789 return info->fw_download(info->phy_id, firmware_name, hdev->sw_romlib);
790} 790}
791 791
792static int pn544_hci_discover_se(struct nfc_hci_dev *hdev) 792static int pn544_hci_discover_se(struct nfc_hci_dev *hdev)
diff --git a/drivers/nfc/pn544/pn544.h b/drivers/nfc/pn544/pn544.h
index 491bf45da358..2aa9233e8086 100644
--- a/drivers/nfc/pn544/pn544.h
+++ b/drivers/nfc/pn544/pn544.h
@@ -25,7 +25,8 @@
25#define PN544_HCI_MODE 0 25#define PN544_HCI_MODE 0
26#define PN544_FW_MODE 1 26#define PN544_FW_MODE 1
27 27
28typedef int (*fw_download_t)(void *context, const char *firmware_name); 28typedef int (*fw_download_t)(void *context, const char *firmware_name,
29 u8 hw_variant);
29 30
30int pn544_hci_probe(void *phy_id, struct nfc_phy_ops *phy_ops, char *llc_name, 31int pn544_hci_probe(void *phy_id, struct nfc_phy_ops *phy_ops, char *llc_name,
31 int phy_headroom, int phy_tailroom, int phy_payload, 32 int phy_headroom, int phy_tailroom, int phy_payload,
diff --git a/drivers/nfc/port100.c b/drivers/nfc/port100.c
index a8555f81cbba..b7a372af5eb7 100644
--- a/drivers/nfc/port100.c
+++ b/drivers/nfc/port100.c
@@ -27,7 +27,8 @@
27#define PORT100_PROTOCOLS (NFC_PROTO_JEWEL_MASK | \ 27#define PORT100_PROTOCOLS (NFC_PROTO_JEWEL_MASK | \
28 NFC_PROTO_MIFARE_MASK | \ 28 NFC_PROTO_MIFARE_MASK | \
29 NFC_PROTO_FELICA_MASK | \ 29 NFC_PROTO_FELICA_MASK | \
30 NFC_PROTO_NFC_DEP_MASK) 30 NFC_PROTO_NFC_DEP_MASK | \
31 NFC_PROTO_ISO14443_MASK)
31 32
32#define PORT100_CAPABILITIES (NFC_DIGITAL_DRV_CAPS_IN_CRC | \ 33#define PORT100_CAPABILITIES (NFC_DIGITAL_DRV_CAPS_IN_CRC | \
33 NFC_DIGITAL_DRV_CAPS_TG_CRC) 34 NFC_DIGITAL_DRV_CAPS_TG_CRC)
@@ -139,6 +140,8 @@ static const struct port100_in_rf_setting in_rf_settings[] = {
139 .in_recv_set_number = 15, 140 .in_recv_set_number = 15,
140 .in_recv_comm_type = PORT100_COMM_TYPE_IN_106A, 141 .in_recv_comm_type = PORT100_COMM_TYPE_IN_106A,
141 }, 142 },
143 /* Ensures the array has NFC_DIGITAL_RF_TECH_LAST elements */
144 [NFC_DIGITAL_RF_TECH_LAST] = { 0 },
142}; 145};
143 146
144/** 147/**
@@ -174,6 +177,9 @@ static const struct port100_tg_rf_setting tg_rf_settings[] = {
174 .tg_set_number = 8, 177 .tg_set_number = 8,
175 .tg_comm_type = PORT100_COMM_TYPE_TG_424F, 178 .tg_comm_type = PORT100_COMM_TYPE_TG_424F,
176 }, 179 },
180 /* Ensures the array has NFC_DIGITAL_RF_TECH_LAST elements */
181 [NFC_DIGITAL_RF_TECH_LAST] = { 0 },
182
177}; 183};
178 184
179#define PORT100_IN_PROT_INITIAL_GUARD_TIME 0x00 185#define PORT100_IN_PROT_INITIAL_GUARD_TIME 0x00
@@ -293,6 +299,10 @@ in_protocols[][PORT100_IN_MAX_NUM_PROTOCOLS + 1] = {
293 { PORT100_IN_PROT_CHECK_CRC, 0 }, 299 { PORT100_IN_PROT_CHECK_CRC, 0 },
294 { PORT100_IN_PROT_END, 0 }, 300 { PORT100_IN_PROT_END, 0 },
295 }, 301 },
302 [NFC_DIGITAL_FRAMING_NFCA_T4T] = {
303 /* nfc_digital_framing_nfca_standard_with_crc_a */
304 { PORT100_IN_PROT_END, 0 },
305 },
296 [NFC_DIGITAL_FRAMING_NFCA_NFC_DEP] = { 306 [NFC_DIGITAL_FRAMING_NFCA_NFC_DEP] = {
297 /* nfc_digital_framing_nfca_standard */ 307 /* nfc_digital_framing_nfca_standard */
298 { PORT100_IN_PROT_END, 0 }, 308 { PORT100_IN_PROT_END, 0 },
@@ -330,6 +340,10 @@ in_protocols[][PORT100_IN_MAX_NUM_PROTOCOLS + 1] = {
330 [NFC_DIGITAL_FRAMING_NFC_DEP_ACTIVATED] = { 340 [NFC_DIGITAL_FRAMING_NFC_DEP_ACTIVATED] = {
331 { PORT100_IN_PROT_END, 0 }, 341 { PORT100_IN_PROT_END, 0 },
332 }, 342 },
343 /* Ensures the array has NFC_DIGITAL_FRAMING_LAST elements */
344 [NFC_DIGITAL_FRAMING_LAST] = {
345 { PORT100_IN_PROT_END, 0 },
346 },
333}; 347};
334 348
335static struct port100_protocol 349static struct port100_protocol
@@ -371,6 +385,10 @@ tg_protocols[][PORT100_TG_MAX_NUM_PROTOCOLS + 1] = {
371 { PORT100_TG_PROT_RF_OFF, 1 }, 385 { PORT100_TG_PROT_RF_OFF, 1 },
372 { PORT100_TG_PROT_END, 0 }, 386 { PORT100_TG_PROT_END, 0 },
373 }, 387 },
388 /* Ensures the array has NFC_DIGITAL_FRAMING_LAST elements */
389 [NFC_DIGITAL_FRAMING_LAST] = {
390 { PORT100_TG_PROT_END, 0 },
391 },
374}; 392};
375 393
376struct port100 { 394struct port100 {
@@ -1356,10 +1374,7 @@ static struct nfc_digital_ops port100_digital_ops = {
1356}; 1374};
1357 1375
1358static const struct usb_device_id port100_table[] = { 1376static const struct usb_device_id port100_table[] = {
1359 { .match_flags = USB_DEVICE_ID_MATCH_DEVICE, 1377 { USB_DEVICE(SONY_VENDOR_ID, RCS380_PRODUCT_ID), },
1360 .idVendor = SONY_VENDOR_ID,
1361 .idProduct = RCS380_PRODUCT_ID,
1362 },
1363 { } 1378 { }
1364}; 1379};
1365MODULE_DEVICE_TABLE(usb, port100_table); 1380MODULE_DEVICE_TABLE(usb, port100_table);
diff --git a/drivers/nfc/trf7970a.c b/drivers/nfc/trf7970a.c
new file mode 100644
index 000000000000..d9babe986473
--- /dev/null
+++ b/drivers/nfc/trf7970a.c
@@ -0,0 +1,1370 @@
1/*
2 * TI TRF7970a RFID/NFC Transceiver Driver
3 *
4 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com
5 *
6 * Author: Erick Macias <emacias@ti.com>
7 * Author: Felipe Balbi <balbi@ti.com>
8 * Author: Mark A. Greer <mgreer@animalcreek.com>
9 *
10 * This program is free software: you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 of
12 * the License as published by the Free Software Foundation.
13 */
14
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/netdevice.h>
18#include <linux/interrupt.h>
19#include <linux/nfc.h>
20#include <linux/skbuff.h>
21#include <linux/delay.h>
22#include <linux/gpio.h>
23#include <linux/of.h>
24#include <linux/of_gpio.h>
25#include <linux/spi/spi.h>
26#include <linux/regulator/consumer.h>
27
28#include <net/nfc/nfc.h>
29#include <net/nfc/digital.h>
30
31/* There are 3 ways the host can communicate with the trf7970a:
32 * parallel mode, SPI with Slave Select (SS) mode, and SPI without
33 * SS mode. The driver only supports the two SPI modes.
34 *
35 * The trf7970a is very timing sensitive and the VIN, EN2, and EN
36 * pins must asserted in that order and with specific delays in between.
37 * The delays used in the driver were provided by TI and have been
38 * confirmed to work with this driver.
39 *
40 * Timeouts are implemented using the delayed workqueue kernel facility.
41 * Timeouts are required so things don't hang when there is no response
42 * from the trf7970a (or tag). Using this mechanism creates a race with
43 * interrupts, however. That is, an interrupt and a timeout could occur
44 * closely enough together that one is blocked by the mutex while the other
45 * executes. When the timeout handler executes first and blocks the
46 * interrupt handler, it will eventually set the state to IDLE so the
47 * interrupt handler will check the state and exit with no harm done.
48 * When the interrupt handler executes first and blocks the timeout handler,
49 * the cancel_delayed_work() call will know that it didn't cancel the
50 * work item (i.e., timeout) and will return zero. That return code is
51 * used by the timer handler to indicate that it should ignore the timeout
52 * once its unblocked.
53 *
54 * Aborting an active command isn't as simple as it seems because the only
55 * way to abort a command that's already been sent to the tag is so turn
56 * off power to the tag. If we do that, though, we'd have to go through
57 * the entire anticollision procedure again but the digital layer doesn't
58 * support that. So, if an abort is received before trf7970a_in_send_cmd()
59 * has sent the command to the tag, it simply returns -ECANCELED. If the
60 * command has already been sent to the tag, then the driver continues
61 * normally and recieves the response data (or error) but just before
62 * sending the data upstream, it frees the rx_skb and sends -ECANCELED
63 * upstream instead. If the command failed, that error will be sent
64 * upstream.
65 *
66 * When recieving data from a tag and the interrupt status register has
67 * only the SRX bit set, it means that all of the data has been received
68 * (once what's in the fifo has been read). However, depending on timing
69 * an interrupt status with only the SRX bit set may not be recived. In
70 * those cases, the timeout mechanism is used to wait 5 ms in case more
71 * data arrives. After 5 ms, it is assumed that all of the data has been
72 * received and the accumulated rx data is sent upstream. The
73 * 'TRF7970A_ST_WAIT_FOR_RX_DATA_CONT' state is used for this purpose
74 * (i.e., it indicates that some data has been received but we're not sure
75 * if there is more coming so a timeout in this state means all data has
76 * been received and there isn't an error). The delay is 5 ms since delays
77 * over 2 ms have been observed during testing (a little extra just in case).
78 *
79 * Type 2 write and sector select commands respond with a 4-bit ACK or NACK.
80 * Having only 4 bits in the FIFO won't normally generate an interrupt so
81 * driver enables the '4_bit_RX' bit of the Special Functions register 1
82 * to cause an interrupt in that case. Leaving that bit for a read command
83 * messes up the data returned so it is only enabled when the framing is
84 * 'NFC_DIGITAL_FRAMING_NFCA_T2T' and the command is not a read command.
85 * Unfortunately, that means that the driver has to peek into tx frames
86 * when the framing is 'NFC_DIGITAL_FRAMING_NFCA_T2T'. This is done by
87 * the trf7970a_per_cmd_config() routine.
88 *
89 * ISO/IEC 15693 frames specify whether to use single or double sub-carrier
90 * frequencies and whether to use low or high data rates in the flags byte
91 * of the frame. This means that the driver has to peek at all 15693 frames
92 * to determine what speed to set the communication to. In addition, write
93 * and lock commands use the OPTION flag to indicate that an EOF must be
94 * sent to the tag before it will send its response. So the driver has to
95 * examine all frames for that reason too.
96 *
97 * It is unclear how long to wait before sending the EOF. According to the
98 * Note under Table 1-1 in section 1.6 of
99 * http://www.ti.com/lit/ug/scbu011/scbu011.pdf, that wait should be at least
100 * 10 ms for TI Tag-it HF-I tags; however testing has shown that is not long
101 * enough. For this reason, the driver waits 20 ms which seems to work
102 * reliably.
103 */
104
105#define TRF7970A_SUPPORTED_PROTOCOLS \
106 (NFC_PROTO_MIFARE_MASK | NFC_PROTO_ISO14443_MASK | \
107 NFC_PROTO_ISO15693_MASK)
108
109/* TX data must be prefixed with a FIFO reset cmd, a cmd that depends
110 * on what the current framing is, the address of the TX length byte 1
111 * register (0x1d), and the 2 byte length of the data to be transmitted.
112 * That totals 5 bytes.
113 */
114#define TRF7970A_TX_SKB_HEADROOM 5
115
116#define TRF7970A_RX_SKB_ALLOC_SIZE 256
117
118#define TRF7970A_FIFO_SIZE 128
119
120/* TX length is 3 nibbles long ==> 4KB - 1 bytes max */
121#define TRF7970A_TX_MAX (4096 - 1)
122
123#define TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT 5
124#define TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT 3
125#define TRF7970A_WAIT_TO_ISSUE_ISO15693_EOF 20
126
127/* Quirks */
128/* Erratum: When reading IRQ Status register on trf7970a, we must issue a
129 * read continuous command for IRQ Status and Collision Position registers.
130 */
131#define TRF7970A_QUIRK_IRQ_STATUS_READ_ERRATA BIT(0)
132
133/* Direct commands */
134#define TRF7970A_CMD_IDLE 0x00
135#define TRF7970A_CMD_SOFT_INIT 0x03
136#define TRF7970A_CMD_RF_COLLISION 0x04
137#define TRF7970A_CMD_RF_COLLISION_RESPONSE_N 0x05
138#define TRF7970A_CMD_RF_COLLISION_RESPONSE_0 0x06
139#define TRF7970A_CMD_FIFO_RESET 0x0f
140#define TRF7970A_CMD_TRANSMIT_NO_CRC 0x10
141#define TRF7970A_CMD_TRANSMIT 0x11
142#define TRF7970A_CMD_DELAY_TRANSMIT_NO_CRC 0x12
143#define TRF7970A_CMD_DELAY_TRANSMIT 0x13
144#define TRF7970A_CMD_EOF 0x14
145#define TRF7970A_CMD_CLOSE_SLOT 0x15
146#define TRF7970A_CMD_BLOCK_RX 0x16
147#define TRF7970A_CMD_ENABLE_RX 0x17
148#define TRF7970A_CMD_TEST_EXT_RF 0x18
149#define TRF7970A_CMD_TEST_INT_RF 0x19
150#define TRF7970A_CMD_RX_GAIN_ADJUST 0x1a
151
152/* Bits determining whether its a direct command or register R/W,
153 * whether to use a continuous SPI transaction or not, and the actual
154 * direct cmd opcode or regster address.
155 */
156#define TRF7970A_CMD_BIT_CTRL BIT(7)
157#define TRF7970A_CMD_BIT_RW BIT(6)
158#define TRF7970A_CMD_BIT_CONTINUOUS BIT(5)
159#define TRF7970A_CMD_BIT_OPCODE(opcode) ((opcode) & 0x1f)
160
161/* Registers addresses */
162#define TRF7970A_CHIP_STATUS_CTRL 0x00
163#define TRF7970A_ISO_CTRL 0x01
164#define TRF7970A_ISO14443B_TX_OPTIONS 0x02
165#define TRF7970A_ISO14443A_HIGH_BITRATE_OPTIONS 0x03
166#define TRF7970A_TX_TIMER_SETTING_H_BYTE 0x04
167#define TRF7970A_TX_TIMER_SETTING_L_BYTE 0x05
168#define TRF7970A_TX_PULSE_LENGTH_CTRL 0x06
169#define TRF7970A_RX_NO_RESPONSE_WAIT 0x07
170#define TRF7970A_RX_WAIT_TIME 0x08
171#define TRF7970A_MODULATOR_SYS_CLK_CTRL 0x09
172#define TRF7970A_RX_SPECIAL_SETTINGS 0x0a
173#define TRF7970A_REG_IO_CTRL 0x0b
174#define TRF7970A_IRQ_STATUS 0x0c
175#define TRF7970A_COLLISION_IRQ_MASK 0x0d
176#define TRF7970A_COLLISION_POSITION 0x0e
177#define TRF7970A_RSSI_OSC_STATUS 0x0f
178#define TRF7970A_SPECIAL_FCN_REG1 0x10
179#define TRF7970A_SPECIAL_FCN_REG2 0x11
180#define TRF7970A_RAM1 0x12
181#define TRF7970A_RAM2 0x13
182#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS 0x14
183#define TRF7970A_NFC_LOW_FIELD_LEVEL 0x16
184#define TRF7970A_NFCID1 0x17
185#define TRF7970A_NFC_TARGET_LEVEL 0x18
186#define TRF79070A_NFC_TARGET_PROTOCOL 0x19
187#define TRF7970A_TEST_REGISTER1 0x1a
188#define TRF7970A_TEST_REGISTER2 0x1b
189#define TRF7970A_FIFO_STATUS 0x1c
190#define TRF7970A_TX_LENGTH_BYTE1 0x1d
191#define TRF7970A_TX_LENGTH_BYTE2 0x1e
192#define TRF7970A_FIFO_IO_REGISTER 0x1f
193
194/* Chip Status Control Register Bits */
195#define TRF7970A_CHIP_STATUS_VRS5_3 BIT(0)
196#define TRF7970A_CHIP_STATUS_REC_ON BIT(1)
197#define TRF7970A_CHIP_STATUS_AGC_ON BIT(2)
198#define TRF7970A_CHIP_STATUS_PM_ON BIT(3)
199#define TRF7970A_CHIP_STATUS_RF_PWR BIT(4)
200#define TRF7970A_CHIP_STATUS_RF_ON BIT(5)
201#define TRF7970A_CHIP_STATUS_DIRECT BIT(6)
202#define TRF7970A_CHIP_STATUS_STBY BIT(7)
203
204/* ISO Control Register Bits */
205#define TRF7970A_ISO_CTRL_15693_SGL_1OF4_662 0x00
206#define TRF7970A_ISO_CTRL_15693_SGL_1OF256_662 0x01
207#define TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648 0x02
208#define TRF7970A_ISO_CTRL_15693_SGL_1OF256_2648 0x03
209#define TRF7970A_ISO_CTRL_15693_DBL_1OF4_667a 0x04
210#define TRF7970A_ISO_CTRL_15693_DBL_1OF256_667 0x05
211#define TRF7970A_ISO_CTRL_15693_DBL_1OF4_2669 0x06
212#define TRF7970A_ISO_CTRL_15693_DBL_1OF256_2669 0x07
213#define TRF7970A_ISO_CTRL_14443A_106 0x08
214#define TRF7970A_ISO_CTRL_14443A_212 0x09
215#define TRF7970A_ISO_CTRL_14443A_424 0x0a
216#define TRF7970A_ISO_CTRL_14443A_848 0x0b
217#define TRF7970A_ISO_CTRL_14443B_106 0x0c
218#define TRF7970A_ISO_CTRL_14443B_212 0x0d
219#define TRF7970A_ISO_CTRL_14443B_424 0x0e
220#define TRF7970A_ISO_CTRL_14443B_848 0x0f
221#define TRF7970A_ISO_CTRL_FELICA_212 0x1a
222#define TRF7970A_ISO_CTRL_FELICA_424 0x1b
223#define TRF7970A_ISO_CTRL_RFID BIT(5)
224#define TRF7970A_ISO_CTRL_DIR_MODE BIT(6)
225#define TRF7970A_ISO_CTRL_RX_CRC_N BIT(7) /* true == No CRC */
226
227#define TRF7970A_ISO_CTRL_RFID_SPEED_MASK 0x1f
228
229/* Modulator and SYS_CLK Control Register Bits */
230#define TRF7970A_MODULATOR_DEPTH(n) ((n) & 0x7)
231#define TRF7970A_MODULATOR_DEPTH_ASK10 (TRF7970A_MODULATOR_DEPTH(0))
232#define TRF7970A_MODULATOR_DEPTH_OOK (TRF7970A_MODULATOR_DEPTH(1))
233#define TRF7970A_MODULATOR_DEPTH_ASK7 (TRF7970A_MODULATOR_DEPTH(2))
234#define TRF7970A_MODULATOR_DEPTH_ASK8_5 (TRF7970A_MODULATOR_DEPTH(3))
235#define TRF7970A_MODULATOR_DEPTH_ASK13 (TRF7970A_MODULATOR_DEPTH(4))
236#define TRF7970A_MODULATOR_DEPTH_ASK16 (TRF7970A_MODULATOR_DEPTH(5))
237#define TRF7970A_MODULATOR_DEPTH_ASK22 (TRF7970A_MODULATOR_DEPTH(6))
238#define TRF7970A_MODULATOR_DEPTH_ASK30 (TRF7970A_MODULATOR_DEPTH(7))
239#define TRF7970A_MODULATOR_EN_ANA BIT(3)
240#define TRF7970A_MODULATOR_CLK(n) (((n) & 0x3) << 4)
241#define TRF7970A_MODULATOR_CLK_DISABLED (TRF7970A_MODULATOR_CLK(0))
242#define TRF7970A_MODULATOR_CLK_3_6 (TRF7970A_MODULATOR_CLK(1))
243#define TRF7970A_MODULATOR_CLK_6_13 (TRF7970A_MODULATOR_CLK(2))
244#define TRF7970A_MODULATOR_CLK_13_27 (TRF7970A_MODULATOR_CLK(3))
245#define TRF7970A_MODULATOR_EN_OOK BIT(6)
246#define TRF7970A_MODULATOR_27MHZ BIT(7)
247
248/* IRQ Status Register Bits */
249#define TRF7970A_IRQ_STATUS_NORESP BIT(0) /* ISO15693 only */
250#define TRF7970A_IRQ_STATUS_COL BIT(1)
251#define TRF7970A_IRQ_STATUS_FRAMING_EOF_ERROR BIT(2)
252#define TRF7970A_IRQ_STATUS_PARITY_ERROR BIT(3)
253#define TRF7970A_IRQ_STATUS_CRC_ERROR BIT(4)
254#define TRF7970A_IRQ_STATUS_FIFO BIT(5)
255#define TRF7970A_IRQ_STATUS_SRX BIT(6)
256#define TRF7970A_IRQ_STATUS_TX BIT(7)
257
258#define TRF7970A_IRQ_STATUS_ERROR \
259 (TRF7970A_IRQ_STATUS_COL | \
260 TRF7970A_IRQ_STATUS_FRAMING_EOF_ERROR | \
261 TRF7970A_IRQ_STATUS_PARITY_ERROR | \
262 TRF7970A_IRQ_STATUS_CRC_ERROR)
263
264#define TRF7970A_SPECIAL_FCN_REG1_COL_7_6 BIT(0)
265#define TRF7970A_SPECIAL_FCN_REG1_14_ANTICOLL BIT(1)
266#define TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX BIT(2)
267#define TRF7970A_SPECIAL_FCN_REG1_SP_DIR_MODE BIT(3)
268#define TRF7970A_SPECIAL_FCN_REG1_NEXT_SLOT_37US BIT(4)
269#define TRF7970A_SPECIAL_FCN_REG1_PAR43 BIT(5)
270
271#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_124 (0x0 << 2)
272#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_120 (0x1 << 2)
273#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_112 (0x2 << 2)
274#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_96 (0x3 << 2)
275#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_4 0x0
276#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_8 0x1
277#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_16 0x2
278#define TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_32 0x3
279
280#define TRF7970A_FIFO_STATUS_OVERFLOW BIT(7)
281
282/* NFC (ISO/IEC 14443A) Type 2 Tag commands */
283#define NFC_T2T_CMD_READ 0x30
284
285/* ISO 15693 commands codes */
286#define ISO15693_CMD_INVENTORY 0x01
287#define ISO15693_CMD_READ_SINGLE_BLOCK 0x20
288#define ISO15693_CMD_WRITE_SINGLE_BLOCK 0x21
289#define ISO15693_CMD_LOCK_BLOCK 0x22
290#define ISO15693_CMD_READ_MULTIPLE_BLOCK 0x23
291#define ISO15693_CMD_WRITE_MULTIPLE_BLOCK 0x24
292#define ISO15693_CMD_SELECT 0x25
293#define ISO15693_CMD_RESET_TO_READY 0x26
294#define ISO15693_CMD_WRITE_AFI 0x27
295#define ISO15693_CMD_LOCK_AFI 0x28
296#define ISO15693_CMD_WRITE_DSFID 0x29
297#define ISO15693_CMD_LOCK_DSFID 0x2a
298#define ISO15693_CMD_GET_SYSTEM_INFO 0x2b
299#define ISO15693_CMD_GET_MULTIPLE_BLOCK_SECURITY_STATUS 0x2c
300
301/* ISO 15693 request and response flags */
302#define ISO15693_REQ_FLAG_SUB_CARRIER BIT(0)
303#define ISO15693_REQ_FLAG_DATA_RATE BIT(1)
304#define ISO15693_REQ_FLAG_INVENTORY BIT(2)
305#define ISO15693_REQ_FLAG_PROTOCOL_EXT BIT(3)
306#define ISO15693_REQ_FLAG_SELECT BIT(4)
307#define ISO15693_REQ_FLAG_AFI BIT(4)
308#define ISO15693_REQ_FLAG_ADDRESS BIT(5)
309#define ISO15693_REQ_FLAG_NB_SLOTS BIT(5)
310#define ISO15693_REQ_FLAG_OPTION BIT(6)
311
312#define ISO15693_REQ_FLAG_SPEED_MASK \
313 (ISO15693_REQ_FLAG_SUB_CARRIER | ISO15693_REQ_FLAG_DATA_RATE)
314
315enum trf7970a_state {
316 TRF7970A_ST_OFF,
317 TRF7970A_ST_IDLE,
318 TRF7970A_ST_IDLE_RX_BLOCKED,
319 TRF7970A_ST_WAIT_FOR_TX_FIFO,
320 TRF7970A_ST_WAIT_FOR_RX_DATA,
321 TRF7970A_ST_WAIT_FOR_RX_DATA_CONT,
322 TRF7970A_ST_WAIT_TO_ISSUE_EOF,
323 TRF7970A_ST_MAX
324};
325
326struct trf7970a {
327 enum trf7970a_state state;
328 struct device *dev;
329 struct spi_device *spi;
330 struct regulator *regulator;
331 struct nfc_digital_dev *ddev;
332 u32 quirks;
333 bool powering_up;
334 bool aborting;
335 struct sk_buff *tx_skb;
336 struct sk_buff *rx_skb;
337 nfc_digital_cmd_complete_t cb;
338 void *cb_arg;
339 u8 iso_ctrl;
340 u8 special_fcn_reg1;
341 int technology;
342 int framing;
343 u8 tx_cmd;
344 bool issue_eof;
345 int en2_gpio;
346 int en_gpio;
347 struct mutex lock;
348 unsigned int timeout;
349 bool ignore_timeout;
350 struct delayed_work timeout_work;
351};
352
353
354static int trf7970a_cmd(struct trf7970a *trf, u8 opcode)
355{
356 u8 cmd = TRF7970A_CMD_BIT_CTRL | TRF7970A_CMD_BIT_OPCODE(opcode);
357 int ret;
358
359 dev_dbg(trf->dev, "cmd: 0x%x\n", cmd);
360
361 ret = spi_write(trf->spi, &cmd, 1);
362 if (ret)
363 dev_err(trf->dev, "%s - cmd: 0x%x, ret: %d\n", __func__, cmd,
364 ret);
365 return ret;
366}
367
368static int trf7970a_read(struct trf7970a *trf, u8 reg, u8 *val)
369{
370 u8 addr = TRF7970A_CMD_BIT_RW | reg;
371 int ret;
372
373 ret = spi_write_then_read(trf->spi, &addr, 1, val, 1);
374 if (ret)
375 dev_err(trf->dev, "%s - addr: 0x%x, ret: %d\n", __func__, addr,
376 ret);
377
378 dev_dbg(trf->dev, "read(0x%x): 0x%x\n", addr, *val);
379
380 return ret;
381}
382
383static int trf7970a_read_cont(struct trf7970a *trf, u8 reg,
384 u8 *buf, size_t len)
385{
386 u8 addr = reg | TRF7970A_CMD_BIT_RW | TRF7970A_CMD_BIT_CONTINUOUS;
387 int ret;
388
389 dev_dbg(trf->dev, "read_cont(0x%x, %zd)\n", addr, len);
390
391 ret = spi_write_then_read(trf->spi, &addr, 1, buf, len);
392 if (ret)
393 dev_err(trf->dev, "%s - addr: 0x%x, ret: %d\n", __func__, addr,
394 ret);
395 return ret;
396}
397
398static int trf7970a_write(struct trf7970a *trf, u8 reg, u8 val)
399{
400 u8 buf[2] = { reg, val };
401 int ret;
402
403 dev_dbg(trf->dev, "write(0x%x): 0x%x\n", reg, val);
404
405 ret = spi_write(trf->spi, buf, 2);
406 if (ret)
407 dev_err(trf->dev, "%s - write: 0x%x 0x%x, ret: %d\n", __func__,
408 buf[0], buf[1], ret);
409
410 return ret;
411}
412
413static int trf7970a_read_irqstatus(struct trf7970a *trf, u8 *status)
414{
415 int ret;
416 u8 buf[2];
417 u8 addr;
418
419 addr = TRF7970A_IRQ_STATUS | TRF7970A_CMD_BIT_RW;
420
421 if (trf->quirks & TRF7970A_QUIRK_IRQ_STATUS_READ_ERRATA) {
422 addr |= TRF7970A_CMD_BIT_CONTINUOUS;
423 ret = spi_write_then_read(trf->spi, &addr, 1, buf, 2);
424 } else {
425 ret = spi_write_then_read(trf->spi, &addr, 1, buf, 1);
426 }
427
428 if (ret)
429 dev_err(trf->dev, "%s - irqstatus: Status read failed: %d\n",
430 __func__, ret);
431 else
432 *status = buf[0];
433
434 return ret;
435}
436
437static void trf7970a_send_upstream(struct trf7970a *trf)
438{
439 u8 rssi;
440
441 dev_kfree_skb_any(trf->tx_skb);
442 trf->tx_skb = NULL;
443
444 if (trf->rx_skb && !IS_ERR(trf->rx_skb) && !trf->aborting)
445 print_hex_dump_debug("trf7970a rx data: ", DUMP_PREFIX_NONE,
446 16, 1, trf->rx_skb->data, trf->rx_skb->len,
447 false);
448
449 /* According to the manual it is "good form" to reset the fifo and
450 * read the RSSI levels & oscillator status register here. It doesn't
451 * explain why.
452 */
453 trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET);
454 trf7970a_read(trf, TRF7970A_RSSI_OSC_STATUS, &rssi);
455
456 trf->state = TRF7970A_ST_IDLE;
457
458 if (trf->aborting) {
459 dev_dbg(trf->dev, "Abort process complete\n");
460
461 if (!IS_ERR(trf->rx_skb)) {
462 kfree_skb(trf->rx_skb);
463 trf->rx_skb = ERR_PTR(-ECANCELED);
464 }
465
466 trf->aborting = false;
467 }
468
469 trf->cb(trf->ddev, trf->cb_arg, trf->rx_skb);
470
471 trf->rx_skb = NULL;
472}
473
474static void trf7970a_send_err_upstream(struct trf7970a *trf, int errno)
475{
476 dev_dbg(trf->dev, "Error - state: %d, errno: %d\n", trf->state, errno);
477
478 kfree_skb(trf->rx_skb);
479 trf->rx_skb = ERR_PTR(errno);
480
481 trf7970a_send_upstream(trf);
482}
483
484static int trf7970a_transmit(struct trf7970a *trf, struct sk_buff *skb,
485 unsigned int len)
486{
487 unsigned int timeout;
488 int ret;
489
490 print_hex_dump_debug("trf7970a tx data: ", DUMP_PREFIX_NONE,
491 16, 1, skb->data, len, false);
492
493 ret = spi_write(trf->spi, skb->data, len);
494 if (ret) {
495 dev_err(trf->dev, "%s - Can't send tx data: %d\n", __func__,
496 ret);
497 return ret;
498 }
499
500 skb_pull(skb, len);
501
502 if (skb->len > 0) {
503 trf->state = TRF7970A_ST_WAIT_FOR_TX_FIFO;
504 timeout = TRF7970A_WAIT_FOR_FIFO_DRAIN_TIMEOUT;
505 } else {
506 if (trf->issue_eof) {
507 trf->state = TRF7970A_ST_WAIT_TO_ISSUE_EOF;
508 timeout = TRF7970A_WAIT_TO_ISSUE_ISO15693_EOF;
509 } else {
510 trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA;
511 timeout = trf->timeout;
512 }
513 }
514
515 dev_dbg(trf->dev, "Setting timeout for %d ms, state: %d\n", timeout,
516 trf->state);
517
518 schedule_delayed_work(&trf->timeout_work, msecs_to_jiffies(timeout));
519
520 return 0;
521}
522
523static void trf7970a_fill_fifo(struct trf7970a *trf)
524{
525 struct sk_buff *skb = trf->tx_skb;
526 unsigned int len;
527 int ret;
528 u8 fifo_bytes;
529
530 ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, &fifo_bytes);
531 if (ret) {
532 trf7970a_send_err_upstream(trf, ret);
533 return;
534 }
535
536 dev_dbg(trf->dev, "Filling FIFO - fifo_bytes: 0x%x\n", fifo_bytes);
537
538 if (fifo_bytes & TRF7970A_FIFO_STATUS_OVERFLOW) {
539 dev_err(trf->dev, "%s - fifo overflow: 0x%x\n", __func__,
540 fifo_bytes);
541 trf7970a_send_err_upstream(trf, -EIO);
542 return;
543 }
544
545 /* Calculate how much more data can be written to the fifo */
546 len = TRF7970A_FIFO_SIZE - fifo_bytes;
547 len = min(skb->len, len);
548
549 ret = trf7970a_transmit(trf, skb, len);
550 if (ret)
551 trf7970a_send_err_upstream(trf, ret);
552}
553
554static void trf7970a_drain_fifo(struct trf7970a *trf, u8 status)
555{
556 struct sk_buff *skb = trf->rx_skb;
557 int ret;
558 u8 fifo_bytes;
559
560 if (status & TRF7970A_IRQ_STATUS_ERROR) {
561 trf7970a_send_err_upstream(trf, -EIO);
562 return;
563 }
564
565 ret = trf7970a_read(trf, TRF7970A_FIFO_STATUS, &fifo_bytes);
566 if (ret) {
567 trf7970a_send_err_upstream(trf, ret);
568 return;
569 }
570
571 dev_dbg(trf->dev, "Draining FIFO - fifo_bytes: 0x%x\n", fifo_bytes);
572
573 if (!fifo_bytes)
574 goto no_rx_data;
575
576 if (fifo_bytes & TRF7970A_FIFO_STATUS_OVERFLOW) {
577 dev_err(trf->dev, "%s - fifo overflow: 0x%x\n", __func__,
578 fifo_bytes);
579 trf7970a_send_err_upstream(trf, -EIO);
580 return;
581 }
582
583 if (fifo_bytes > skb_tailroom(skb)) {
584 skb = skb_copy_expand(skb, skb_headroom(skb),
585 max_t(int, fifo_bytes,
586 TRF7970A_RX_SKB_ALLOC_SIZE),
587 GFP_KERNEL);
588 if (!skb) {
589 trf7970a_send_err_upstream(trf, -ENOMEM);
590 return;
591 }
592
593 kfree_skb(trf->rx_skb);
594 trf->rx_skb = skb;
595 }
596
597 ret = trf7970a_read_cont(trf, TRF7970A_FIFO_IO_REGISTER,
598 skb_put(skb, fifo_bytes), fifo_bytes);
599 if (ret) {
600 trf7970a_send_err_upstream(trf, ret);
601 return;
602 }
603
604 /* If received Type 2 ACK/NACK, shift right 4 bits and pass up */
605 if ((trf->framing == NFC_DIGITAL_FRAMING_NFCA_T2T) && (skb->len == 1) &&
606 (trf->special_fcn_reg1 ==
607 TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX)) {
608 skb->data[0] >>= 4;
609 status = TRF7970A_IRQ_STATUS_SRX;
610 } else {
611 trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA_CONT;
612 }
613
614no_rx_data:
615 if (status == TRF7970A_IRQ_STATUS_SRX) { /* Receive complete */
616 trf7970a_send_upstream(trf);
617 return;
618 }
619
620 dev_dbg(trf->dev, "Setting timeout for %d ms\n",
621 TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT);
622
623 schedule_delayed_work(&trf->timeout_work,
624 msecs_to_jiffies(TRF7970A_WAIT_FOR_RX_DATA_TIMEOUT));
625}
626
627static irqreturn_t trf7970a_irq(int irq, void *dev_id)
628{
629 struct trf7970a *trf = dev_id;
630 int ret;
631 u8 status;
632
633 mutex_lock(&trf->lock);
634
635 if (trf->state == TRF7970A_ST_OFF) {
636 mutex_unlock(&trf->lock);
637 return IRQ_NONE;
638 }
639
640 ret = trf7970a_read_irqstatus(trf, &status);
641 if (ret) {
642 mutex_unlock(&trf->lock);
643 return IRQ_NONE;
644 }
645
646 dev_dbg(trf->dev, "IRQ - state: %d, status: 0x%x\n", trf->state,
647 status);
648
649 if (!status) {
650 mutex_unlock(&trf->lock);
651 return IRQ_NONE;
652 }
653
654 switch (trf->state) {
655 case TRF7970A_ST_IDLE:
656 case TRF7970A_ST_IDLE_RX_BLOCKED:
657 /* If getting interrupts caused by RF noise, turn off the
658 * receiver to avoid unnecessary interrupts. It will be
659 * turned back on in trf7970a_in_send_cmd() when the next
660 * command is issued.
661 */
662 if (status & TRF7970A_IRQ_STATUS_ERROR) {
663 trf7970a_cmd(trf, TRF7970A_CMD_BLOCK_RX);
664 trf->state = TRF7970A_ST_IDLE_RX_BLOCKED;
665 }
666
667 trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET);
668 break;
669 case TRF7970A_ST_WAIT_FOR_TX_FIFO:
670 if (status & TRF7970A_IRQ_STATUS_TX) {
671 trf->ignore_timeout =
672 !cancel_delayed_work(&trf->timeout_work);
673 trf7970a_fill_fifo(trf);
674 } else {
675 trf7970a_send_err_upstream(trf, -EIO);
676 }
677 break;
678 case TRF7970A_ST_WAIT_FOR_RX_DATA:
679 case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT:
680 if (status & TRF7970A_IRQ_STATUS_SRX) {
681 trf->ignore_timeout =
682 !cancel_delayed_work(&trf->timeout_work);
683 trf7970a_drain_fifo(trf, status);
684 } else if (!(status & TRF7970A_IRQ_STATUS_TX)) {
685 trf7970a_send_err_upstream(trf, -EIO);
686 }
687 break;
688 case TRF7970A_ST_WAIT_TO_ISSUE_EOF:
689 if (status != TRF7970A_IRQ_STATUS_TX)
690 trf7970a_send_err_upstream(trf, -EIO);
691 break;
692 default:
693 dev_err(trf->dev, "%s - Driver in invalid state: %d\n",
694 __func__, trf->state);
695 }
696
697 mutex_unlock(&trf->lock);
698 return IRQ_HANDLED;
699}
700
701static void trf7970a_issue_eof(struct trf7970a *trf)
702{
703 int ret;
704
705 dev_dbg(trf->dev, "Issuing EOF\n");
706
707 ret = trf7970a_cmd(trf, TRF7970A_CMD_FIFO_RESET);
708 if (ret)
709 trf7970a_send_err_upstream(trf, ret);
710
711 ret = trf7970a_cmd(trf, TRF7970A_CMD_EOF);
712 if (ret)
713 trf7970a_send_err_upstream(trf, ret);
714
715 trf->state = TRF7970A_ST_WAIT_FOR_RX_DATA;
716
717 dev_dbg(trf->dev, "Setting timeout for %d ms, state: %d\n",
718 trf->timeout, trf->state);
719
720 schedule_delayed_work(&trf->timeout_work,
721 msecs_to_jiffies(trf->timeout));
722}
723
724static void trf7970a_timeout_work_handler(struct work_struct *work)
725{
726 struct trf7970a *trf = container_of(work, struct trf7970a,
727 timeout_work.work);
728
729 dev_dbg(trf->dev, "Timeout - state: %d, ignore_timeout: %d\n",
730 trf->state, trf->ignore_timeout);
731
732 mutex_lock(&trf->lock);
733
734 if (trf->ignore_timeout)
735 trf->ignore_timeout = false;
736 else if (trf->state == TRF7970A_ST_WAIT_FOR_RX_DATA_CONT)
737 trf7970a_send_upstream(trf); /* No more rx data so send up */
738 else if (trf->state == TRF7970A_ST_WAIT_TO_ISSUE_EOF)
739 trf7970a_issue_eof(trf);
740 else
741 trf7970a_send_err_upstream(trf, -ETIMEDOUT);
742
743 mutex_unlock(&trf->lock);
744}
745
746static int trf7970a_init(struct trf7970a *trf)
747{
748 int ret;
749
750 dev_dbg(trf->dev, "Initializing device - state: %d\n", trf->state);
751
752 ret = trf7970a_cmd(trf, TRF7970A_CMD_SOFT_INIT);
753 if (ret)
754 goto err_out;
755
756 ret = trf7970a_cmd(trf, TRF7970A_CMD_IDLE);
757 if (ret)
758 goto err_out;
759
760 ret = trf7970a_write(trf, TRF7970A_MODULATOR_SYS_CLK_CTRL,
761 TRF7970A_MODULATOR_DEPTH_OOK);
762 if (ret)
763 goto err_out;
764
765 ret = trf7970a_write(trf, TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS,
766 TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLH_96 |
767 TRF7970A_ADJUTABLE_FIFO_IRQ_LEVELS_WLL_32);
768 if (ret)
769 goto err_out;
770
771 ret = trf7970a_write(trf, TRF7970A_SPECIAL_FCN_REG1, 0);
772 if (ret)
773 goto err_out;
774
775 trf->special_fcn_reg1 = 0;
776
777 ret = trf7970a_write(trf, TRF7970A_CHIP_STATUS_CTRL,
778 TRF7970A_CHIP_STATUS_RF_ON |
779 TRF7970A_CHIP_STATUS_VRS5_3);
780 if (ret)
781 goto err_out;
782
783 return 0;
784
785err_out:
786 dev_dbg(trf->dev, "Couldn't init device: %d\n", ret);
787 return ret;
788}
789
790static void trf7970a_switch_rf_off(struct trf7970a *trf)
791{
792 dev_dbg(trf->dev, "Switching rf off\n");
793
794 gpio_set_value(trf->en_gpio, 0);
795 gpio_set_value(trf->en2_gpio, 0);
796
797 trf->aborting = false;
798 trf->state = TRF7970A_ST_OFF;
799}
800
801static int trf7970a_switch_rf_on(struct trf7970a *trf)
802{
803 unsigned long delay;
804 int ret;
805
806 dev_dbg(trf->dev, "Switching rf on\n");
807
808 if (trf->powering_up)
809 usleep_range(5000, 6000);
810
811 gpio_set_value(trf->en2_gpio, 1);
812 usleep_range(1000, 2000);
813 gpio_set_value(trf->en_gpio, 1);
814
815 /* The delay between enabling the trf7970a and issuing the first
816 * command is significantly longer the very first time after powering
817 * up. Make sure the longer delay is only done the first time.
818 */
819 if (trf->powering_up) {
820 delay = 20000;
821 trf->powering_up = false;
822 } else {
823 delay = 5000;
824 }
825
826 usleep_range(delay, delay + 1000);
827
828 ret = trf7970a_init(trf);
829 if (ret)
830 trf7970a_switch_rf_off(trf);
831 else
832 trf->state = TRF7970A_ST_IDLE;
833
834 return ret;
835}
836
837static int trf7970a_switch_rf(struct nfc_digital_dev *ddev, bool on)
838{
839 struct trf7970a *trf = nfc_digital_get_drvdata(ddev);
840 int ret = 0;
841
842 dev_dbg(trf->dev, "Switching RF - state: %d, on: %d\n", trf->state, on);
843
844 mutex_lock(&trf->lock);
845
846 if (on) {
847 switch (trf->state) {
848 case TRF7970A_ST_OFF:
849 ret = trf7970a_switch_rf_on(trf);
850 break;
851 case TRF7970A_ST_IDLE:
852 case TRF7970A_ST_IDLE_RX_BLOCKED:
853 break;
854 default:
855 dev_err(trf->dev, "%s - Invalid request: %d %d\n",
856 __func__, trf->state, on);
857 trf7970a_switch_rf_off(trf);
858 }
859 } else {
860 switch (trf->state) {
861 case TRF7970A_ST_OFF:
862 break;
863 default:
864 dev_err(trf->dev, "%s - Invalid request: %d %d\n",
865 __func__, trf->state, on);
866 /* FALLTHROUGH */
867 case TRF7970A_ST_IDLE:
868 case TRF7970A_ST_IDLE_RX_BLOCKED:
869 trf7970a_switch_rf_off(trf);
870 }
871 }
872
873 mutex_unlock(&trf->lock);
874 return ret;
875}
876
877static int trf7970a_config_rf_tech(struct trf7970a *trf, int tech)
878{
879 int ret = 0;
880
881 dev_dbg(trf->dev, "rf technology: %d\n", tech);
882
883 switch (tech) {
884 case NFC_DIGITAL_RF_TECH_106A:
885 trf->iso_ctrl = TRF7970A_ISO_CTRL_14443A_106;
886 break;
887 case NFC_DIGITAL_RF_TECH_ISO15693:
888 trf->iso_ctrl = TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648;
889 break;
890 default:
891 dev_dbg(trf->dev, "Unsupported rf technology: %d\n", tech);
892 return -EINVAL;
893 }
894
895 trf->technology = tech;
896
897 return ret;
898}
899
900static int trf7970a_config_framing(struct trf7970a *trf, int framing)
901{
902 dev_dbg(trf->dev, "framing: %d\n", framing);
903
904 switch (framing) {
905 case NFC_DIGITAL_FRAMING_NFCA_SHORT:
906 case NFC_DIGITAL_FRAMING_NFCA_STANDARD:
907 trf->tx_cmd = TRF7970A_CMD_TRANSMIT_NO_CRC;
908 trf->iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N;
909 break;
910 case NFC_DIGITAL_FRAMING_NFCA_STANDARD_WITH_CRC_A:
911 case NFC_DIGITAL_FRAMING_NFCA_T4T:
912 case NFC_DIGITAL_FRAMING_ISO15693_INVENTORY:
913 case NFC_DIGITAL_FRAMING_ISO15693_T5T:
914 trf->tx_cmd = TRF7970A_CMD_TRANSMIT;
915 trf->iso_ctrl &= ~TRF7970A_ISO_CTRL_RX_CRC_N;
916 break;
917 case NFC_DIGITAL_FRAMING_NFCA_T2T:
918 trf->tx_cmd = TRF7970A_CMD_TRANSMIT;
919 trf->iso_ctrl |= TRF7970A_ISO_CTRL_RX_CRC_N;
920 break;
921 default:
922 dev_dbg(trf->dev, "Unsupported Framing: %d\n", framing);
923 return -EINVAL;
924 }
925
926 trf->framing = framing;
927
928 return trf7970a_write(trf, TRF7970A_ISO_CTRL, trf->iso_ctrl);
929}
930
931static int trf7970a_in_configure_hw(struct nfc_digital_dev *ddev, int type,
932 int param)
933{
934 struct trf7970a *trf = nfc_digital_get_drvdata(ddev);
935 int ret = 0;
936
937 dev_dbg(trf->dev, "Configure hw - type: %d, param: %d\n", type, param);
938
939 mutex_lock(&trf->lock);
940
941 if (trf->state == TRF7970A_ST_OFF) {
942 ret = trf7970a_switch_rf_on(trf);
943 if (ret)
944 goto err_out;
945 }
946
947 switch (type) {
948 case NFC_DIGITAL_CONFIG_RF_TECH:
949 ret = trf7970a_config_rf_tech(trf, param);
950 break;
951 case NFC_DIGITAL_CONFIG_FRAMING:
952 ret = trf7970a_config_framing(trf, param);
953 break;
954 default:
955 dev_dbg(trf->dev, "Unknown type: %d\n", type);
956 ret = -EINVAL;
957 }
958
959err_out:
960 mutex_unlock(&trf->lock);
961 return ret;
962}
963
964static int trf7970a_is_iso15693_write_or_lock(u8 cmd)
965{
966 switch (cmd) {
967 case ISO15693_CMD_WRITE_SINGLE_BLOCK:
968 case ISO15693_CMD_LOCK_BLOCK:
969 case ISO15693_CMD_WRITE_MULTIPLE_BLOCK:
970 case ISO15693_CMD_WRITE_AFI:
971 case ISO15693_CMD_LOCK_AFI:
972 case ISO15693_CMD_WRITE_DSFID:
973 case ISO15693_CMD_LOCK_DSFID:
974 return 1;
975 break;
976 default:
977 return 0;
978 }
979}
980
981static int trf7970a_per_cmd_config(struct trf7970a *trf, struct sk_buff *skb)
982{
983 u8 *req = skb->data;
984 u8 special_fcn_reg1, iso_ctrl;
985 int ret;
986
987 trf->issue_eof = false;
988
989 /* When issuing Type 2 read command, make sure the '4_bit_RX' bit in
990 * special functions register 1 is cleared; otherwise, its a write or
991 * sector select command and '4_bit_RX' must be set.
992 *
993 * When issuing an ISO 15693 command, inspect the flags byte to see
994 * what speed to use. Also, remember if the OPTION flag is set on
995 * a Type 5 write or lock command so the driver will know that it
996 * has to send an EOF in order to get a response.
997 */
998 if ((trf->technology == NFC_DIGITAL_RF_TECH_106A) &&
999 (trf->framing == NFC_DIGITAL_FRAMING_NFCA_T2T)) {
1000 if (req[0] == NFC_T2T_CMD_READ)
1001 special_fcn_reg1 = 0;
1002 else
1003 special_fcn_reg1 = TRF7970A_SPECIAL_FCN_REG1_4_BIT_RX;
1004
1005 if (special_fcn_reg1 != trf->special_fcn_reg1) {
1006 ret = trf7970a_write(trf, TRF7970A_SPECIAL_FCN_REG1,
1007 special_fcn_reg1);
1008 if (ret)
1009 return ret;
1010
1011 trf->special_fcn_reg1 = special_fcn_reg1;
1012 }
1013 } else if (trf->technology == NFC_DIGITAL_RF_TECH_ISO15693) {
1014 iso_ctrl = trf->iso_ctrl & ~TRF7970A_ISO_CTRL_RFID_SPEED_MASK;
1015
1016 switch (req[0] & ISO15693_REQ_FLAG_SPEED_MASK) {
1017 case 0x00:
1018 iso_ctrl |= TRF7970A_ISO_CTRL_15693_SGL_1OF4_662;
1019 break;
1020 case ISO15693_REQ_FLAG_SUB_CARRIER:
1021 iso_ctrl |= TRF7970A_ISO_CTRL_15693_DBL_1OF4_667a;
1022 break;
1023 case ISO15693_REQ_FLAG_DATA_RATE:
1024 iso_ctrl |= TRF7970A_ISO_CTRL_15693_SGL_1OF4_2648;
1025 break;
1026 case (ISO15693_REQ_FLAG_SUB_CARRIER |
1027 ISO15693_REQ_FLAG_DATA_RATE):
1028 iso_ctrl |= TRF7970A_ISO_CTRL_15693_DBL_1OF4_2669;
1029 break;
1030 }
1031
1032 if (iso_ctrl != trf->iso_ctrl) {
1033 ret = trf7970a_write(trf, TRF7970A_ISO_CTRL, iso_ctrl);
1034 if (ret)
1035 return ret;
1036
1037 trf->iso_ctrl = iso_ctrl;
1038 }
1039
1040 if ((trf->framing == NFC_DIGITAL_FRAMING_ISO15693_T5T) &&
1041 trf7970a_is_iso15693_write_or_lock(req[1]) &&
1042 (req[0] & ISO15693_REQ_FLAG_OPTION))
1043 trf->issue_eof = true;
1044 }
1045
1046 return 0;
1047}
1048
1049static int trf7970a_in_send_cmd(struct nfc_digital_dev *ddev,
1050 struct sk_buff *skb, u16 timeout,
1051 nfc_digital_cmd_complete_t cb, void *arg)
1052{
1053 struct trf7970a *trf = nfc_digital_get_drvdata(ddev);
1054 char *prefix;
1055 unsigned int len;
1056 int ret;
1057
1058 dev_dbg(trf->dev, "New request - state: %d, timeout: %d ms, len: %d\n",
1059 trf->state, timeout, skb->len);
1060
1061 if (skb->len > TRF7970A_TX_MAX)
1062 return -EINVAL;
1063
1064 mutex_lock(&trf->lock);
1065
1066 if ((trf->state != TRF7970A_ST_IDLE) &&
1067 (trf->state != TRF7970A_ST_IDLE_RX_BLOCKED)) {
1068 dev_err(trf->dev, "%s - Bogus state: %d\n", __func__,
1069 trf->state);
1070 ret = -EIO;
1071 goto out_err;
1072 }
1073
1074 if (trf->aborting) {
1075 dev_dbg(trf->dev, "Abort process complete\n");
1076 trf->aborting = false;
1077 ret = -ECANCELED;
1078 goto out_err;
1079 }
1080
1081 trf->rx_skb = nfc_alloc_recv_skb(TRF7970A_RX_SKB_ALLOC_SIZE,
1082 GFP_KERNEL);
1083 if (!trf->rx_skb) {
1084 dev_dbg(trf->dev, "Can't alloc rx_skb\n");
1085 ret = -ENOMEM;
1086 goto out_err;
1087 }
1088
1089 if (trf->state == TRF7970A_ST_IDLE_RX_BLOCKED) {
1090 ret = trf7970a_cmd(trf, TRF7970A_CMD_ENABLE_RX);
1091 if (ret)
1092 goto out_err;
1093
1094 trf->state = TRF7970A_ST_IDLE;
1095 }
1096
1097 ret = trf7970a_per_cmd_config(trf, skb);
1098 if (ret)
1099 goto out_err;
1100
1101 trf->ddev = ddev;
1102 trf->tx_skb = skb;
1103 trf->cb = cb;
1104 trf->cb_arg = arg;
1105 trf->timeout = timeout;
1106 trf->ignore_timeout = false;
1107
1108 len = skb->len;
1109 prefix = skb_push(skb, TRF7970A_TX_SKB_HEADROOM);
1110
1111 /* TX data must be prefixed with a FIFO reset cmd, a cmd that depends
1112 * on what the current framing is, the address of the TX length byte 1
1113 * register (0x1d), and the 2 byte length of the data to be transmitted.
1114 */
1115 prefix[0] = TRF7970A_CMD_BIT_CTRL |
1116 TRF7970A_CMD_BIT_OPCODE(TRF7970A_CMD_FIFO_RESET);
1117 prefix[1] = TRF7970A_CMD_BIT_CTRL |
1118 TRF7970A_CMD_BIT_OPCODE(trf->tx_cmd);
1119 prefix[2] = TRF7970A_CMD_BIT_CONTINUOUS | TRF7970A_TX_LENGTH_BYTE1;
1120
1121 if (trf->framing == NFC_DIGITAL_FRAMING_NFCA_SHORT) {
1122 prefix[3] = 0x00;
1123 prefix[4] = 0x0f; /* 7 bits */
1124 } else {
1125 prefix[3] = (len & 0xf00) >> 4;
1126 prefix[3] |= ((len & 0xf0) >> 4);
1127 prefix[4] = ((len & 0x0f) << 4);
1128 }
1129
1130 len = min_t(int, skb->len, TRF7970A_FIFO_SIZE);
1131
1132 usleep_range(1000, 2000);
1133
1134 ret = trf7970a_transmit(trf, skb, len);
1135 if (ret) {
1136 kfree_skb(trf->rx_skb);
1137 trf->rx_skb = NULL;
1138 }
1139
1140out_err:
1141 mutex_unlock(&trf->lock);
1142 return ret;
1143}
1144
1145static int trf7970a_tg_configure_hw(struct nfc_digital_dev *ddev,
1146 int type, int param)
1147{
1148 struct trf7970a *trf = nfc_digital_get_drvdata(ddev);
1149
1150 dev_dbg(trf->dev, "Unsupported interface\n");
1151
1152 return -EINVAL;
1153}
1154
1155static int trf7970a_tg_send_cmd(struct nfc_digital_dev *ddev,
1156 struct sk_buff *skb, u16 timeout,
1157 nfc_digital_cmd_complete_t cb, void *arg)
1158{
1159 struct trf7970a *trf = nfc_digital_get_drvdata(ddev);
1160
1161 dev_dbg(trf->dev, "Unsupported interface\n");
1162
1163 return -EINVAL;
1164}
1165
1166static int trf7970a_tg_listen(struct nfc_digital_dev *ddev,
1167 u16 timeout, nfc_digital_cmd_complete_t cb, void *arg)
1168{
1169 struct trf7970a *trf = nfc_digital_get_drvdata(ddev);
1170
1171 dev_dbg(trf->dev, "Unsupported interface\n");
1172
1173 return -EINVAL;
1174}
1175
1176static int trf7970a_tg_listen_mdaa(struct nfc_digital_dev *ddev,
1177 struct digital_tg_mdaa_params *mdaa_params,
1178 u16 timeout, nfc_digital_cmd_complete_t cb, void *arg)
1179{
1180 struct trf7970a *trf = nfc_digital_get_drvdata(ddev);
1181
1182 dev_dbg(trf->dev, "Unsupported interface\n");
1183
1184 return -EINVAL;
1185}
1186
1187static void trf7970a_abort_cmd(struct nfc_digital_dev *ddev)
1188{
1189 struct trf7970a *trf = nfc_digital_get_drvdata(ddev);
1190
1191 dev_dbg(trf->dev, "Abort process initiated\n");
1192
1193 mutex_lock(&trf->lock);
1194 trf->aborting = true;
1195 mutex_unlock(&trf->lock);
1196}
1197
1198static struct nfc_digital_ops trf7970a_nfc_ops = {
1199 .in_configure_hw = trf7970a_in_configure_hw,
1200 .in_send_cmd = trf7970a_in_send_cmd,
1201 .tg_configure_hw = trf7970a_tg_configure_hw,
1202 .tg_send_cmd = trf7970a_tg_send_cmd,
1203 .tg_listen = trf7970a_tg_listen,
1204 .tg_listen_mdaa = trf7970a_tg_listen_mdaa,
1205 .switch_rf = trf7970a_switch_rf,
1206 .abort_cmd = trf7970a_abort_cmd,
1207};
1208
1209static int trf7970a_probe(struct spi_device *spi)
1210{
1211 struct device_node *np = spi->dev.of_node;
1212 const struct spi_device_id *id = spi_get_device_id(spi);
1213 struct trf7970a *trf;
1214 int ret;
1215
1216 if (!np) {
1217 dev_err(&spi->dev, "No Device Tree entry\n");
1218 return -EINVAL;
1219 }
1220
1221 trf = devm_kzalloc(&spi->dev, sizeof(*trf), GFP_KERNEL);
1222 if (!trf)
1223 return -ENOMEM;
1224
1225 trf->state = TRF7970A_ST_OFF;
1226 trf->dev = &spi->dev;
1227 trf->spi = spi;
1228 trf->quirks = id->driver_data;
1229
1230 spi->mode = SPI_MODE_1;
1231 spi->bits_per_word = 8;
1232
1233 /* There are two enable pins - both must be present */
1234 trf->en_gpio = of_get_named_gpio(np, "ti,enable-gpios", 0);
1235 if (!gpio_is_valid(trf->en_gpio)) {
1236 dev_err(trf->dev, "No EN GPIO property\n");
1237 return trf->en_gpio;
1238 }
1239
1240 ret = devm_gpio_request_one(trf->dev, trf->en_gpio,
1241 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "EN");
1242 if (ret) {
1243 dev_err(trf->dev, "Can't request EN GPIO: %d\n", ret);
1244 return ret;
1245 }
1246
1247 trf->en2_gpio = of_get_named_gpio(np, "ti,enable-gpios", 1);
1248 if (!gpio_is_valid(trf->en2_gpio)) {
1249 dev_err(trf->dev, "No EN2 GPIO property\n");
1250 return trf->en2_gpio;
1251 }
1252
1253 ret = devm_gpio_request_one(trf->dev, trf->en2_gpio,
1254 GPIOF_DIR_OUT | GPIOF_INIT_LOW, "EN2");
1255 if (ret) {
1256 dev_err(trf->dev, "Can't request EN2 GPIO: %d\n", ret);
1257 return ret;
1258 }
1259
1260 ret = devm_request_threaded_irq(trf->dev, spi->irq, NULL,
1261 trf7970a_irq, IRQF_TRIGGER_RISING | IRQF_ONESHOT,
1262 "trf7970a", trf);
1263 if (ret) {
1264 dev_err(trf->dev, "Can't request IRQ#%d: %d\n", spi->irq, ret);
1265 return ret;
1266 }
1267
1268 mutex_init(&trf->lock);
1269 INIT_DELAYED_WORK(&trf->timeout_work, trf7970a_timeout_work_handler);
1270
1271 trf->regulator = devm_regulator_get(&spi->dev, "vin");
1272 if (IS_ERR(trf->regulator)) {
1273 ret = PTR_ERR(trf->regulator);
1274 dev_err(trf->dev, "Can't get VIN regulator: %d\n", ret);
1275 goto err_destroy_lock;
1276 }
1277
1278 ret = regulator_enable(trf->regulator);
1279 if (ret) {
1280 dev_err(trf->dev, "Can't enable VIN: %d\n", ret);
1281 goto err_destroy_lock;
1282 }
1283
1284 trf->powering_up = true;
1285
1286 trf->ddev = nfc_digital_allocate_device(&trf7970a_nfc_ops,
1287 TRF7970A_SUPPORTED_PROTOCOLS,
1288 NFC_DIGITAL_DRV_CAPS_IN_CRC, TRF7970A_TX_SKB_HEADROOM,
1289 0);
1290 if (!trf->ddev) {
1291 dev_err(trf->dev, "Can't allocate NFC digital device\n");
1292 ret = -ENOMEM;
1293 goto err_disable_regulator;
1294 }
1295
1296 nfc_digital_set_parent_dev(trf->ddev, trf->dev);
1297 nfc_digital_set_drvdata(trf->ddev, trf);
1298 spi_set_drvdata(spi, trf);
1299
1300 ret = nfc_digital_register_device(trf->ddev);
1301 if (ret) {
1302 dev_err(trf->dev, "Can't register NFC digital device: %d\n",
1303 ret);
1304 goto err_free_ddev;
1305 }
1306
1307 return 0;
1308
1309err_free_ddev:
1310 nfc_digital_free_device(trf->ddev);
1311err_disable_regulator:
1312 regulator_disable(trf->regulator);
1313err_destroy_lock:
1314 mutex_destroy(&trf->lock);
1315 return ret;
1316}
1317
1318static int trf7970a_remove(struct spi_device *spi)
1319{
1320 struct trf7970a *trf = spi_get_drvdata(spi);
1321
1322 mutex_lock(&trf->lock);
1323
1324 trf7970a_switch_rf_off(trf);
1325 trf7970a_init(trf);
1326
1327 switch (trf->state) {
1328 case TRF7970A_ST_WAIT_FOR_TX_FIFO:
1329 case TRF7970A_ST_WAIT_FOR_RX_DATA:
1330 case TRF7970A_ST_WAIT_FOR_RX_DATA_CONT:
1331 case TRF7970A_ST_WAIT_TO_ISSUE_EOF:
1332 trf7970a_send_err_upstream(trf, -ECANCELED);
1333 break;
1334 default:
1335 break;
1336 }
1337
1338 mutex_unlock(&trf->lock);
1339
1340 nfc_digital_unregister_device(trf->ddev);
1341 nfc_digital_free_device(trf->ddev);
1342
1343 regulator_disable(trf->regulator);
1344
1345 mutex_destroy(&trf->lock);
1346
1347 return 0;
1348}
1349
1350static const struct spi_device_id trf7970a_id_table[] = {
1351 { "trf7970a", TRF7970A_QUIRK_IRQ_STATUS_READ_ERRATA },
1352 { }
1353};
1354MODULE_DEVICE_TABLE(spi, trf7970a_id_table);
1355
1356static struct spi_driver trf7970a_spi_driver = {
1357 .probe = trf7970a_probe,
1358 .remove = trf7970a_remove,
1359 .id_table = trf7970a_id_table,
1360 .driver = {
1361 .name = "trf7970a",
1362 .owner = THIS_MODULE,
1363 },
1364};
1365
1366module_spi_driver(trf7970a_spi_driver);
1367
1368MODULE_AUTHOR("Mark A. Greer <mgreer@animalcreek.com>");
1369MODULE_LICENSE("GPL v2");
1370MODULE_DESCRIPTION("TI trf7970a RFID/NFC Transceiver Driver");
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-09 03:52:11 -0500