diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/clk/ux500/u8500_clk.c | 50 | ||||
| -rw-r--r-- | drivers/i2c/muxes/i2c-mux-pinctrl.c | 2 | ||||
| -rw-r--r-- | drivers/leds/ledtrig-cpu.c | 21 | ||||
| -rw-r--r-- | drivers/regulator/core.c | 33 |
4 files changed, 67 insertions, 39 deletions
diff --git a/drivers/clk/ux500/u8500_clk.c b/drivers/clk/ux500/u8500_clk.c index ca4a25ed844c..e2c17d187d98 100644 --- a/drivers/clk/ux500/u8500_clk.c +++ b/drivers/clk/ux500/u8500_clk.c | |||
| @@ -40,7 +40,7 @@ void u8500_clk_init(void) | |||
| 40 | CLK_IS_ROOT|CLK_IGNORE_UNUSED, | 40 | CLK_IS_ROOT|CLK_IGNORE_UNUSED, |
| 41 | 32768); | 41 | 32768); |
| 42 | clk_register_clkdev(clk, "clk32k", NULL); | 42 | clk_register_clkdev(clk, "clk32k", NULL); |
| 43 | clk_register_clkdev(clk, NULL, "rtc-pl031"); | 43 | clk_register_clkdev(clk, "apb_pclk", "rtc-pl031"); |
| 44 | 44 | ||
| 45 | /* PRCMU clocks */ | 45 | /* PRCMU clocks */ |
| 46 | fw_version = prcmu_get_fw_version(); | 46 | fw_version = prcmu_get_fw_version(); |
| @@ -228,10 +228,17 @@ void u8500_clk_init(void) | |||
| 228 | 228 | ||
| 229 | clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, | 229 | clk = clk_reg_prcc_pclk("p1_pclk2", "per1clk", U8500_CLKRST1_BASE, |
| 230 | BIT(2), 0); | 230 | BIT(2), 0); |
| 231 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.1"); | ||
| 232 | |||
| 231 | clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, | 233 | clk = clk_reg_prcc_pclk("p1_pclk3", "per1clk", U8500_CLKRST1_BASE, |
| 232 | BIT(3), 0); | 234 | BIT(3), 0); |
| 235 | clk_register_clkdev(clk, "apb_pclk", "msp0"); | ||
| 236 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.0"); | ||
| 237 | |||
| 233 | clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, | 238 | clk = clk_reg_prcc_pclk("p1_pclk4", "per1clk", U8500_CLKRST1_BASE, |
| 234 | BIT(4), 0); | 239 | BIT(4), 0); |
| 240 | clk_register_clkdev(clk, "apb_pclk", "msp1"); | ||
| 241 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.1"); | ||
| 235 | 242 | ||
| 236 | clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, | 243 | clk = clk_reg_prcc_pclk("p1_pclk5", "per1clk", U8500_CLKRST1_BASE, |
| 237 | BIT(5), 0); | 244 | BIT(5), 0); |
| @@ -239,6 +246,7 @@ void u8500_clk_init(void) | |||
| 239 | 246 | ||
| 240 | clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, | 247 | clk = clk_reg_prcc_pclk("p1_pclk6", "per1clk", U8500_CLKRST1_BASE, |
| 241 | BIT(6), 0); | 248 | BIT(6), 0); |
| 249 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.2"); | ||
| 242 | 250 | ||
| 243 | clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, | 251 | clk = clk_reg_prcc_pclk("p1_pclk7", "per1clk", U8500_CLKRST1_BASE, |
| 244 | BIT(7), 0); | 252 | BIT(7), 0); |
| @@ -246,6 +254,7 @@ void u8500_clk_init(void) | |||
| 246 | 254 | ||
| 247 | clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, | 255 | clk = clk_reg_prcc_pclk("p1_pclk8", "per1clk", U8500_CLKRST1_BASE, |
| 248 | BIT(8), 0); | 256 | BIT(8), 0); |
| 257 | clk_register_clkdev(clk, "apb_pclk", "slimbus0"); | ||
| 249 | 258 | ||
| 250 | clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, | 259 | clk = clk_reg_prcc_pclk("p1_pclk9", "per1clk", U8500_CLKRST1_BASE, |
| 251 | BIT(9), 0); | 260 | BIT(9), 0); |
| @@ -255,11 +264,16 @@ void u8500_clk_init(void) | |||
| 255 | 264 | ||
| 256 | clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, | 265 | clk = clk_reg_prcc_pclk("p1_pclk10", "per1clk", U8500_CLKRST1_BASE, |
| 257 | BIT(10), 0); | 266 | BIT(10), 0); |
| 267 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.4"); | ||
| 268 | |||
| 258 | clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, | 269 | clk = clk_reg_prcc_pclk("p1_pclk11", "per1clk", U8500_CLKRST1_BASE, |
| 259 | BIT(11), 0); | 270 | BIT(11), 0); |
| 271 | clk_register_clkdev(clk, "apb_pclk", "msp3"); | ||
| 272 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.3"); | ||
| 260 | 273 | ||
| 261 | clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, | 274 | clk = clk_reg_prcc_pclk("p2_pclk0", "per2clk", U8500_CLKRST2_BASE, |
| 262 | BIT(0), 0); | 275 | BIT(0), 0); |
| 276 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.3"); | ||
| 263 | 277 | ||
| 264 | clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, | 278 | clk = clk_reg_prcc_pclk("p2_pclk1", "per2clk", U8500_CLKRST2_BASE, |
| 265 | BIT(1), 0); | 279 | BIT(1), 0); |
| @@ -279,12 +293,13 @@ void u8500_clk_init(void) | |||
| 279 | 293 | ||
| 280 | clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, | 294 | clk = clk_reg_prcc_pclk("p2_pclk5", "per2clk", U8500_CLKRST2_BASE, |
| 281 | BIT(5), 0); | 295 | BIT(5), 0); |
| 296 | clk_register_clkdev(clk, "apb_pclk", "msp2"); | ||
| 297 | clk_register_clkdev(clk, "apb_pclk", "ux500-msp-i2s.2"); | ||
| 282 | 298 | ||
| 283 | clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, | 299 | clk = clk_reg_prcc_pclk("p2_pclk6", "per2clk", U8500_CLKRST2_BASE, |
| 284 | BIT(6), 0); | 300 | BIT(6), 0); |
| 285 | clk_register_clkdev(clk, "apb_pclk", "sdi1"); | 301 | clk_register_clkdev(clk, "apb_pclk", "sdi1"); |
| 286 | 302 | ||
| 287 | |||
| 288 | clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, | 303 | clk = clk_reg_prcc_pclk("p2_pclk7", "per2clk", U8500_CLKRST2_BASE, |
| 289 | BIT(7), 0); | 304 | BIT(7), 0); |
| 290 | clk_register_clkdev(clk, "apb_pclk", "sdi3"); | 305 | clk_register_clkdev(clk, "apb_pclk", "sdi3"); |
| @@ -316,10 +331,15 @@ void u8500_clk_init(void) | |||
| 316 | 331 | ||
| 317 | clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, | 332 | clk = clk_reg_prcc_pclk("p3_pclk1", "per3clk", U8500_CLKRST3_BASE, |
| 318 | BIT(1), 0); | 333 | BIT(1), 0); |
| 334 | clk_register_clkdev(clk, "apb_pclk", "ssp0"); | ||
| 335 | |||
| 319 | clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, | 336 | clk = clk_reg_prcc_pclk("p3_pclk2", "per3clk", U8500_CLKRST3_BASE, |
| 320 | BIT(2), 0); | 337 | BIT(2), 0); |
| 338 | clk_register_clkdev(clk, "apb_pclk", "ssp1"); | ||
| 339 | |||
| 321 | clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, | 340 | clk = clk_reg_prcc_pclk("p3_pclk3", "per3clk", U8500_CLKRST3_BASE, |
| 322 | BIT(3), 0); | 341 | BIT(3), 0); |
| 342 | clk_register_clkdev(clk, "apb_pclk", "nmk-i2c.0"); | ||
| 323 | 343 | ||
| 324 | clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, | 344 | clk = clk_reg_prcc_pclk("p3_pclk4", "per3clk", U8500_CLKRST3_BASE, |
| 325 | BIT(4), 0); | 345 | BIT(4), 0); |
| @@ -401,10 +421,17 @@ void u8500_clk_init(void) | |||
| 401 | 421 | ||
| 402 | clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", | 422 | clk = clk_reg_prcc_kclk("p1_i2c1_kclk", "i2cclk", |
| 403 | U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); | 423 | U8500_CLKRST1_BASE, BIT(2), CLK_SET_RATE_GATE); |
| 424 | clk_register_clkdev(clk, NULL, "nmk-i2c.1"); | ||
| 425 | |||
| 404 | clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", | 426 | clk = clk_reg_prcc_kclk("p1_msp0_kclk", "msp02clk", |
| 405 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); | 427 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); |
| 428 | clk_register_clkdev(clk, NULL, "msp0"); | ||
| 429 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.0"); | ||
| 430 | |||
| 406 | clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", | 431 | clk = clk_reg_prcc_kclk("p1_msp1_kclk", "msp1clk", |
| 407 | U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); | 432 | U8500_CLKRST1_BASE, BIT(4), CLK_SET_RATE_GATE); |
| 433 | clk_register_clkdev(clk, NULL, "msp1"); | ||
| 434 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.1"); | ||
| 408 | 435 | ||
| 409 | clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", | 436 | clk = clk_reg_prcc_kclk("p1_sdi0_kclk", "sdmmcclk", |
| 410 | U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); | 437 | U8500_CLKRST1_BASE, BIT(5), CLK_SET_RATE_GATE); |
| @@ -412,17 +439,25 @@ void u8500_clk_init(void) | |||
| 412 | 439 | ||
| 413 | clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", | 440 | clk = clk_reg_prcc_kclk("p1_i2c2_kclk", "i2cclk", |
| 414 | U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); | 441 | U8500_CLKRST1_BASE, BIT(6), CLK_SET_RATE_GATE); |
| 442 | clk_register_clkdev(clk, NULL, "nmk-i2c.2"); | ||
| 443 | |||
| 415 | clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", | 444 | clk = clk_reg_prcc_kclk("p1_slimbus0_kclk", "slimclk", |
| 416 | U8500_CLKRST1_BASE, BIT(3), CLK_SET_RATE_GATE); | 445 | U8500_CLKRST1_BASE, BIT(8), CLK_SET_RATE_GATE); |
| 417 | /* FIXME: Redefinition of BIT(3). */ | 446 | clk_register_clkdev(clk, NULL, "slimbus0"); |
| 447 | |||
| 418 | clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", | 448 | clk = clk_reg_prcc_kclk("p1_i2c4_kclk", "i2cclk", |
| 419 | U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); | 449 | U8500_CLKRST1_BASE, BIT(9), CLK_SET_RATE_GATE); |
| 450 | clk_register_clkdev(clk, NULL, "nmk-i2c.4"); | ||
| 451 | |||
| 420 | clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", | 452 | clk = clk_reg_prcc_kclk("p1_msp3_kclk", "msp1clk", |
| 421 | U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); | 453 | U8500_CLKRST1_BASE, BIT(10), CLK_SET_RATE_GATE); |
| 454 | clk_register_clkdev(clk, NULL, "msp3"); | ||
| 455 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.3"); | ||
| 422 | 456 | ||
| 423 | /* Periph2 */ | 457 | /* Periph2 */ |
| 424 | clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", | 458 | clk = clk_reg_prcc_kclk("p2_i2c3_kclk", "i2cclk", |
| 425 | U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); | 459 | U8500_CLKRST2_BASE, BIT(0), CLK_SET_RATE_GATE); |
| 460 | clk_register_clkdev(clk, NULL, "nmk-i2c.3"); | ||
| 426 | 461 | ||
| 427 | clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", | 462 | clk = clk_reg_prcc_kclk("p2_sdi4_kclk", "sdmmcclk", |
| 428 | U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); | 463 | U8500_CLKRST2_BASE, BIT(2), CLK_SET_RATE_GATE); |
| @@ -430,6 +465,8 @@ void u8500_clk_init(void) | |||
| 430 | 465 | ||
| 431 | clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", | 466 | clk = clk_reg_prcc_kclk("p2_msp2_kclk", "msp02clk", |
| 432 | U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); | 467 | U8500_CLKRST2_BASE, BIT(3), CLK_SET_RATE_GATE); |
| 468 | clk_register_clkdev(clk, NULL, "msp2"); | ||
| 469 | clk_register_clkdev(clk, NULL, "ux500-msp-i2s.2"); | ||
| 433 | 470 | ||
| 434 | clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", | 471 | clk = clk_reg_prcc_kclk("p2_sdi1_kclk", "sdmmcclk", |
| 435 | U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); | 472 | U8500_CLKRST2_BASE, BIT(4), CLK_SET_RATE_GATE); |
| @@ -450,10 +487,15 @@ void u8500_clk_init(void) | |||
| 450 | /* Periph3 */ | 487 | /* Periph3 */ |
| 451 | clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", | 488 | clk = clk_reg_prcc_kclk("p3_ssp0_kclk", "sspclk", |
| 452 | U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); | 489 | U8500_CLKRST3_BASE, BIT(1), CLK_SET_RATE_GATE); |
| 490 | clk_register_clkdev(clk, NULL, "ssp0"); | ||
| 491 | |||
| 453 | clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", | 492 | clk = clk_reg_prcc_kclk("p3_ssp1_kclk", "sspclk", |
| 454 | U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); | 493 | U8500_CLKRST3_BASE, BIT(2), CLK_SET_RATE_GATE); |
| 494 | clk_register_clkdev(clk, NULL, "ssp1"); | ||
| 495 | |||
| 455 | clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", | 496 | clk = clk_reg_prcc_kclk("p3_i2c0_kclk", "i2cclk", |
| 456 | U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); | 497 | U8500_CLKRST3_BASE, BIT(3), CLK_SET_RATE_GATE); |
| 498 | clk_register_clkdev(clk, NULL, "nmk-i2c.0"); | ||
| 457 | 499 | ||
| 458 | clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", | 500 | clk = clk_reg_prcc_kclk("p3_sdi2_kclk", "sdmmcclk", |
| 459 | U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); | 501 | U8500_CLKRST3_BASE, BIT(4), CLK_SET_RATE_GATE); |
diff --git a/drivers/i2c/muxes/i2c-mux-pinctrl.c b/drivers/i2c/muxes/i2c-mux-pinctrl.c index 5f097f309b9f..7fa5b24b16db 100644 --- a/drivers/i2c/muxes/i2c-mux-pinctrl.c +++ b/drivers/i2c/muxes/i2c-mux-pinctrl.c | |||
| @@ -169,7 +169,7 @@ static int __devinit i2c_mux_pinctrl_probe(struct platform_device *pdev) | |||
| 169 | mux->busses = devm_kzalloc(&pdev->dev, | 169 | mux->busses = devm_kzalloc(&pdev->dev, |
| 170 | sizeof(mux->busses) * mux->pdata->bus_count, | 170 | sizeof(mux->busses) * mux->pdata->bus_count, |
| 171 | GFP_KERNEL); | 171 | GFP_KERNEL); |
| 172 | if (!mux->states) { | 172 | if (!mux->busses) { |
| 173 | dev_err(&pdev->dev, "Cannot allocate busses\n"); | 173 | dev_err(&pdev->dev, "Cannot allocate busses\n"); |
| 174 | ret = -ENOMEM; | 174 | ret = -ENOMEM; |
| 175 | goto err; | 175 | goto err; |
diff --git a/drivers/leds/ledtrig-cpu.c b/drivers/leds/ledtrig-cpu.c index b312056da14d..4239b3955ff0 100644 --- a/drivers/leds/ledtrig-cpu.c +++ b/drivers/leds/ledtrig-cpu.c | |||
| @@ -33,8 +33,6 @@ | |||
| 33 | struct led_trigger_cpu { | 33 | struct led_trigger_cpu { |
| 34 | char name[MAX_NAME_LEN]; | 34 | char name[MAX_NAME_LEN]; |
| 35 | struct led_trigger *_trig; | 35 | struct led_trigger *_trig; |
| 36 | struct mutex lock; | ||
| 37 | int lock_is_inited; | ||
| 38 | }; | 36 | }; |
| 39 | 37 | ||
| 40 | static DEFINE_PER_CPU(struct led_trigger_cpu, cpu_trig); | 38 | static DEFINE_PER_CPU(struct led_trigger_cpu, cpu_trig); |
| @@ -50,12 +48,6 @@ void ledtrig_cpu(enum cpu_led_event ledevt) | |||
| 50 | { | 48 | { |
| 51 | struct led_trigger_cpu *trig = &__get_cpu_var(cpu_trig); | 49 | struct led_trigger_cpu *trig = &__get_cpu_var(cpu_trig); |
| 52 | 50 | ||
| 53 | /* mutex lock should be initialized before calling mutex_call() */ | ||
| 54 | if (!trig->lock_is_inited) | ||
| 55 | return; | ||
| 56 | |||
| 57 | mutex_lock(&trig->lock); | ||
| 58 | |||
| 59 | /* Locate the correct CPU LED */ | 51 | /* Locate the correct CPU LED */ |
| 60 | switch (ledevt) { | 52 | switch (ledevt) { |
| 61 | case CPU_LED_IDLE_END: | 53 | case CPU_LED_IDLE_END: |
| @@ -75,8 +67,6 @@ void ledtrig_cpu(enum cpu_led_event ledevt) | |||
| 75 | /* Will leave the LED as it is */ | 67 | /* Will leave the LED as it is */ |
| 76 | break; | 68 | break; |
| 77 | } | 69 | } |
| 78 | |||
| 79 | mutex_unlock(&trig->lock); | ||
| 80 | } | 70 | } |
| 81 | EXPORT_SYMBOL(ledtrig_cpu); | 71 | EXPORT_SYMBOL(ledtrig_cpu); |
| 82 | 72 | ||
| @@ -117,14 +107,9 @@ static int __init ledtrig_cpu_init(void) | |||
| 117 | for_each_possible_cpu(cpu) { | 107 | for_each_possible_cpu(cpu) { |
| 118 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); | 108 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); |
| 119 | 109 | ||
| 120 | mutex_init(&trig->lock); | ||
| 121 | |||
| 122 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); | 110 | snprintf(trig->name, MAX_NAME_LEN, "cpu%d", cpu); |
| 123 | 111 | ||
| 124 | mutex_lock(&trig->lock); | ||
| 125 | led_trigger_register_simple(trig->name, &trig->_trig); | 112 | led_trigger_register_simple(trig->name, &trig->_trig); |
| 126 | trig->lock_is_inited = 1; | ||
| 127 | mutex_unlock(&trig->lock); | ||
| 128 | } | 113 | } |
| 129 | 114 | ||
| 130 | register_syscore_ops(&ledtrig_cpu_syscore_ops); | 115 | register_syscore_ops(&ledtrig_cpu_syscore_ops); |
| @@ -142,15 +127,9 @@ static void __exit ledtrig_cpu_exit(void) | |||
| 142 | for_each_possible_cpu(cpu) { | 127 | for_each_possible_cpu(cpu) { |
| 143 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); | 128 | struct led_trigger_cpu *trig = &per_cpu(cpu_trig, cpu); |
| 144 | 129 | ||
| 145 | mutex_lock(&trig->lock); | ||
| 146 | |||
| 147 | led_trigger_unregister_simple(trig->_trig); | 130 | led_trigger_unregister_simple(trig->_trig); |
| 148 | trig->_trig = NULL; | 131 | trig->_trig = NULL; |
| 149 | memset(trig->name, 0, MAX_NAME_LEN); | 132 | memset(trig->name, 0, MAX_NAME_LEN); |
| 150 | trig->lock_is_inited = 0; | ||
| 151 | |||
| 152 | mutex_unlock(&trig->lock); | ||
| 153 | mutex_destroy(&trig->lock); | ||
| 154 | } | 133 | } |
| 155 | 134 | ||
| 156 | unregister_syscore_ops(&ledtrig_cpu_syscore_ops); | 135 | unregister_syscore_ops(&ledtrig_cpu_syscore_ops); |
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index 5c4829cba6a6..e872c8be080e 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c | |||
| @@ -1381,22 +1381,14 @@ struct regulator *regulator_get_exclusive(struct device *dev, const char *id) | |||
| 1381 | } | 1381 | } |
| 1382 | EXPORT_SYMBOL_GPL(regulator_get_exclusive); | 1382 | EXPORT_SYMBOL_GPL(regulator_get_exclusive); |
| 1383 | 1383 | ||
| 1384 | /** | 1384 | /* Locks held by regulator_put() */ |
| 1385 | * regulator_put - "free" the regulator source | 1385 | static void _regulator_put(struct regulator *regulator) |
| 1386 | * @regulator: regulator source | ||
| 1387 | * | ||
| 1388 | * Note: drivers must ensure that all regulator_enable calls made on this | ||
| 1389 | * regulator source are balanced by regulator_disable calls prior to calling | ||
| 1390 | * this function. | ||
| 1391 | */ | ||
| 1392 | void regulator_put(struct regulator *regulator) | ||
| 1393 | { | 1386 | { |
| 1394 | struct regulator_dev *rdev; | 1387 | struct regulator_dev *rdev; |
| 1395 | 1388 | ||
| 1396 | if (regulator == NULL || IS_ERR(regulator)) | 1389 | if (regulator == NULL || IS_ERR(regulator)) |
| 1397 | return; | 1390 | return; |
| 1398 | 1391 | ||
| 1399 | mutex_lock(®ulator_list_mutex); | ||
| 1400 | rdev = regulator->rdev; | 1392 | rdev = regulator->rdev; |
| 1401 | 1393 | ||
| 1402 | debugfs_remove_recursive(regulator->debugfs); | 1394 | debugfs_remove_recursive(regulator->debugfs); |
| @@ -1412,6 +1404,20 @@ void regulator_put(struct regulator *regulator) | |||
| 1412 | rdev->exclusive = 0; | 1404 | rdev->exclusive = 0; |
| 1413 | 1405 | ||
| 1414 | module_put(rdev->owner); | 1406 | module_put(rdev->owner); |
| 1407 | } | ||
| 1408 | |||
| 1409 | /** | ||
| 1410 | * regulator_put - "free" the regulator source | ||
| 1411 | * @regulator: regulator source | ||
| 1412 | * | ||
| 1413 | * Note: drivers must ensure that all regulator_enable calls made on this | ||
| 1414 | * regulator source are balanced by regulator_disable calls prior to calling | ||
| 1415 | * this function. | ||
| 1416 | */ | ||
| 1417 | void regulator_put(struct regulator *regulator) | ||
| 1418 | { | ||
| 1419 | mutex_lock(®ulator_list_mutex); | ||
| 1420 | _regulator_put(regulator); | ||
| 1415 | mutex_unlock(®ulator_list_mutex); | 1421 | mutex_unlock(®ulator_list_mutex); |
| 1416 | } | 1422 | } |
| 1417 | EXPORT_SYMBOL_GPL(regulator_put); | 1423 | EXPORT_SYMBOL_GPL(regulator_put); |
| @@ -1974,7 +1980,7 @@ int regulator_is_supported_voltage(struct regulator *regulator, | |||
| 1974 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { | 1980 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { |
| 1975 | ret = regulator_get_voltage(regulator); | 1981 | ret = regulator_get_voltage(regulator); |
| 1976 | if (ret >= 0) | 1982 | if (ret >= 0) |
| 1977 | return (min_uV >= ret && ret <= max_uV); | 1983 | return (min_uV <= ret && ret <= max_uV); |
| 1978 | else | 1984 | else |
| 1979 | return ret; | 1985 | return ret; |
| 1980 | } | 1986 | } |
| @@ -3365,7 +3371,7 @@ regulator_register(const struct regulator_desc *regulator_desc, | |||
| 3365 | if (ret != 0) { | 3371 | if (ret != 0) { |
| 3366 | rdev_err(rdev, "Failed to request enable GPIO%d: %d\n", | 3372 | rdev_err(rdev, "Failed to request enable GPIO%d: %d\n", |
| 3367 | config->ena_gpio, ret); | 3373 | config->ena_gpio, ret); |
| 3368 | goto clean; | 3374 | goto wash; |
| 3369 | } | 3375 | } |
| 3370 | 3376 | ||
| 3371 | rdev->ena_gpio = config->ena_gpio; | 3377 | rdev->ena_gpio = config->ena_gpio; |
| @@ -3445,10 +3451,11 @@ unset_supplies: | |||
| 3445 | 3451 | ||
| 3446 | scrub: | 3452 | scrub: |
| 3447 | if (rdev->supply) | 3453 | if (rdev->supply) |
| 3448 | regulator_put(rdev->supply); | 3454 | _regulator_put(rdev->supply); |
| 3449 | if (rdev->ena_gpio) | 3455 | if (rdev->ena_gpio) |
| 3450 | gpio_free(rdev->ena_gpio); | 3456 | gpio_free(rdev->ena_gpio); |
| 3451 | kfree(rdev->constraints); | 3457 | kfree(rdev->constraints); |
| 3458 | wash: | ||
| 3452 | device_unregister(&rdev->dev); | 3459 | device_unregister(&rdev->dev); |
| 3453 | /* device core frees rdev */ | 3460 | /* device core frees rdev */ |
| 3454 | rdev = ERR_PTR(ret); | 3461 | rdev = ERR_PTR(ret); |
