diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/amba/bus.c | 88 | ||||
-rw-r--r-- | drivers/gpio/pl061.c | 4 | ||||
-rw-r--r-- | drivers/leds/Kconfig | 9 | ||||
-rw-r--r-- | drivers/leds/Makefile | 1 | ||||
-rw-r--r-- | drivers/leds/leds-ns2.c | 338 | ||||
-rw-r--r-- | drivers/media/video/Kconfig | 13 | ||||
-rw-r--r-- | drivers/media/video/Makefile | 1 | ||||
-rw-r--r-- | drivers/media/video/mx2_camera.c | 1513 | ||||
-rw-r--r-- | drivers/misc/Kconfig | 10 | ||||
-rw-r--r-- | drivers/misc/Makefile | 1 | ||||
-rw-r--r-- | drivers/misc/arm-charlcd.c | 396 | ||||
-rw-r--r-- | drivers/mmc/host/mmci.c | 148 | ||||
-rw-r--r-- | drivers/mmc/host/mmci.h | 39 | ||||
-rw-r--r-- | drivers/mmc/host/mxcmmc.c | 48 | ||||
-rw-r--r-- | drivers/mtd/nand/mxc_nand.c | 33 | ||||
-rw-r--r-- | drivers/net/phy/marvell.c | 38 | ||||
-rw-r--r-- | drivers/rtc/rtc-pl031.c | 2 | ||||
-rw-r--r-- | drivers/serial/amba-pl010.c | 2 | ||||
-rw-r--r-- | drivers/serial/amba-pl011.c | 90 | ||||
-rw-r--r-- | drivers/usb/gadget/at91_udc.c | 205 | ||||
-rw-r--r-- | drivers/usb/gadget/at91_udc.h | 3 | ||||
-rw-r--r-- | drivers/usb/gadget/fsl_mxc_udc.c | 2 | ||||
-rw-r--r-- | drivers/usb/host/ehci-mxc.c | 2 | ||||
-rw-r--r-- | drivers/video/imxfb.c | 72 | ||||
-rw-r--r-- | drivers/video/omap2/vram.c | 33 |
25 files changed, 2817 insertions, 274 deletions
diff --git a/drivers/amba/bus.c b/drivers/amba/bus.c index f60b2b6a0931..d31590e7011b 100644 --- a/drivers/amba/bus.c +++ b/drivers/amba/bus.c | |||
@@ -122,6 +122,31 @@ static int __init amba_init(void) | |||
122 | 122 | ||
123 | postcore_initcall(amba_init); | 123 | postcore_initcall(amba_init); |
124 | 124 | ||
125 | static int amba_get_enable_pclk(struct amba_device *pcdev) | ||
126 | { | ||
127 | struct clk *pclk = clk_get(&pcdev->dev, "apb_pclk"); | ||
128 | int ret; | ||
129 | |||
130 | pcdev->pclk = pclk; | ||
131 | |||
132 | if (IS_ERR(pclk)) | ||
133 | return PTR_ERR(pclk); | ||
134 | |||
135 | ret = clk_enable(pclk); | ||
136 | if (ret) | ||
137 | clk_put(pclk); | ||
138 | |||
139 | return ret; | ||
140 | } | ||
141 | |||
142 | static void amba_put_disable_pclk(struct amba_device *pcdev) | ||
143 | { | ||
144 | struct clk *pclk = pcdev->pclk; | ||
145 | |||
146 | clk_disable(pclk); | ||
147 | clk_put(pclk); | ||
148 | } | ||
149 | |||
125 | /* | 150 | /* |
126 | * These are the device model conversion veneers; they convert the | 151 | * These are the device model conversion veneers; they convert the |
127 | * device model structures to our more specific structures. | 152 | * device model structures to our more specific structures. |
@@ -130,17 +155,33 @@ static int amba_probe(struct device *dev) | |||
130 | { | 155 | { |
131 | struct amba_device *pcdev = to_amba_device(dev); | 156 | struct amba_device *pcdev = to_amba_device(dev); |
132 | struct amba_driver *pcdrv = to_amba_driver(dev->driver); | 157 | struct amba_driver *pcdrv = to_amba_driver(dev->driver); |
133 | struct amba_id *id; | 158 | struct amba_id *id = amba_lookup(pcdrv->id_table, pcdev); |
159 | int ret; | ||
134 | 160 | ||
135 | id = amba_lookup(pcdrv->id_table, pcdev); | 161 | do { |
162 | ret = amba_get_enable_pclk(pcdev); | ||
163 | if (ret) | ||
164 | break; | ||
165 | |||
166 | ret = pcdrv->probe(pcdev, id); | ||
167 | if (ret == 0) | ||
168 | break; | ||
136 | 169 | ||
137 | return pcdrv->probe(pcdev, id); | 170 | amba_put_disable_pclk(pcdev); |
171 | } while (0); | ||
172 | |||
173 | return ret; | ||
138 | } | 174 | } |
139 | 175 | ||
140 | static int amba_remove(struct device *dev) | 176 | static int amba_remove(struct device *dev) |
141 | { | 177 | { |
178 | struct amba_device *pcdev = to_amba_device(dev); | ||
142 | struct amba_driver *drv = to_amba_driver(dev->driver); | 179 | struct amba_driver *drv = to_amba_driver(dev->driver); |
143 | return drv->remove(to_amba_device(dev)); | 180 | int ret = drv->remove(pcdev); |
181 | |||
182 | amba_put_disable_pclk(pcdev); | ||
183 | |||
184 | return ret; | ||
144 | } | 185 | } |
145 | 186 | ||
146 | static void amba_shutdown(struct device *dev) | 187 | static void amba_shutdown(struct device *dev) |
@@ -203,7 +244,6 @@ static void amba_device_release(struct device *dev) | |||
203 | */ | 244 | */ |
204 | int amba_device_register(struct amba_device *dev, struct resource *parent) | 245 | int amba_device_register(struct amba_device *dev, struct resource *parent) |
205 | { | 246 | { |
206 | u32 pid, cid; | ||
207 | u32 size; | 247 | u32 size; |
208 | void __iomem *tmp; | 248 | void __iomem *tmp; |
209 | int i, ret; | 249 | int i, ret; |
@@ -241,25 +281,35 @@ int amba_device_register(struct amba_device *dev, struct resource *parent) | |||
241 | goto err_release; | 281 | goto err_release; |
242 | } | 282 | } |
243 | 283 | ||
244 | /* | 284 | ret = amba_get_enable_pclk(dev); |
245 | * Read pid and cid based on size of resource | 285 | if (ret == 0) { |
246 | * they are located at end of region | 286 | u32 pid, cid; |
247 | */ | ||
248 | for (pid = 0, i = 0; i < 4; i++) | ||
249 | pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << (i * 8); | ||
250 | for (cid = 0, i = 0; i < 4; i++) | ||
251 | cid |= (readl(tmp + size - 0x10 + 4 * i) & 255) << (i * 8); | ||
252 | 287 | ||
253 | iounmap(tmp); | 288 | /* |
289 | * Read pid and cid based on size of resource | ||
290 | * they are located at end of region | ||
291 | */ | ||
292 | for (pid = 0, i = 0; i < 4; i++) | ||
293 | pid |= (readl(tmp + size - 0x20 + 4 * i) & 255) << | ||
294 | (i * 8); | ||
295 | for (cid = 0, i = 0; i < 4; i++) | ||
296 | cid |= (readl(tmp + size - 0x10 + 4 * i) & 255) << | ||
297 | (i * 8); | ||
254 | 298 | ||
255 | if (cid == 0xb105f00d) | 299 | amba_put_disable_pclk(dev); |
256 | dev->periphid = pid; | ||
257 | 300 | ||
258 | if (!dev->periphid) { | 301 | if (cid == 0xb105f00d) |
259 | ret = -ENODEV; | 302 | dev->periphid = pid; |
260 | goto err_release; | 303 | |
304 | if (!dev->periphid) | ||
305 | ret = -ENODEV; | ||
261 | } | 306 | } |
262 | 307 | ||
308 | iounmap(tmp); | ||
309 | |||
310 | if (ret) | ||
311 | goto err_release; | ||
312 | |||
263 | ret = device_add(&dev->dev); | 313 | ret = device_add(&dev->dev); |
264 | if (ret) | 314 | if (ret) |
265 | goto err_release; | 315 | goto err_release; |
diff --git a/drivers/gpio/pl061.c b/drivers/gpio/pl061.c index ee568c8fcbd0..5005990f751f 100644 --- a/drivers/gpio/pl061.c +++ b/drivers/gpio/pl061.c | |||
@@ -232,7 +232,7 @@ static void pl061_irq_handler(unsigned irq, struct irq_desc *desc) | |||
232 | desc->chip->unmask(irq); | 232 | desc->chip->unmask(irq); |
233 | } | 233 | } |
234 | 234 | ||
235 | static int __init pl061_probe(struct amba_device *dev, struct amba_id *id) | 235 | static int pl061_probe(struct amba_device *dev, struct amba_id *id) |
236 | { | 236 | { |
237 | struct pl061_platform_data *pdata; | 237 | struct pl061_platform_data *pdata; |
238 | struct pl061_gpio *chip; | 238 | struct pl061_gpio *chip; |
@@ -333,7 +333,7 @@ free_mem: | |||
333 | return ret; | 333 | return ret; |
334 | } | 334 | } |
335 | 335 | ||
336 | static struct amba_id pl061_ids[] __initdata = { | 336 | static struct amba_id pl061_ids[] = { |
337 | { | 337 | { |
338 | .id = 0x00041061, | 338 | .id = 0x00041061, |
339 | .mask = 0x000fffff, | 339 | .mask = 0x000fffff, |
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index 81bf25e67ce1..e4112622e5a2 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig | |||
@@ -302,6 +302,15 @@ config LEDS_MC13783 | |||
302 | This option enable support for on-chip LED drivers found | 302 | This option enable support for on-chip LED drivers found |
303 | on Freescale Semiconductor MC13783 PMIC. | 303 | on Freescale Semiconductor MC13783 PMIC. |
304 | 304 | ||
305 | config LEDS_NS2 | ||
306 | tristate "LED support for Network Space v2 GPIO LEDs" | ||
307 | depends on MACH_NETSPACE_V2 || MACH_INETSPACE_V2 || MACH_NETSPACE_MAX_V2 | ||
308 | default y | ||
309 | help | ||
310 | This option enable support for the dual-GPIO LED found on the | ||
311 | Network Space v2 board (and parents). This include Internet Space v2, | ||
312 | Network Space (Max) v2 and d2 Network v2 boards. | ||
313 | |||
305 | config LEDS_TRIGGERS | 314 | config LEDS_TRIGGERS |
306 | bool "LED Trigger support" | 315 | bool "LED Trigger support" |
307 | help | 316 | help |
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 2493de499374..7d6b95831f8e 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile | |||
@@ -37,6 +37,7 @@ obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o | |||
37 | obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o | 37 | obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o |
38 | obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o | 38 | obj-$(CONFIG_LEDS_DELL_NETBOOKS) += dell-led.o |
39 | obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o | 39 | obj-$(CONFIG_LEDS_MC13783) += leds-mc13783.o |
40 | obj-$(CONFIG_LEDS_NS2) += leds-ns2.o | ||
40 | 41 | ||
41 | # LED SPI Drivers | 42 | # LED SPI Drivers |
42 | obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o | 43 | obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o |
diff --git a/drivers/leds/leds-ns2.c b/drivers/leds/leds-ns2.c new file mode 100644 index 000000000000..74dce4ba0262 --- /dev/null +++ b/drivers/leds/leds-ns2.c | |||
@@ -0,0 +1,338 @@ | |||
1 | /* | ||
2 | * leds-ns2.c - Driver for the Network Space v2 (and parents) dual-GPIO LED | ||
3 | * | ||
4 | * Copyright (C) 2010 LaCie | ||
5 | * | ||
6 | * Author: Simon Guinot <sguinot@lacie.com> | ||
7 | * | ||
8 | * Based on leds-gpio.c by Raphael Assenat <raph@8d.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | */ | ||
24 | |||
25 | #include <linux/kernel.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/slab.h> | ||
29 | #include <linux/gpio.h> | ||
30 | #include <linux/leds.h> | ||
31 | #include <mach/leds-ns2.h> | ||
32 | |||
33 | /* | ||
34 | * The Network Space v2 dual-GPIO LED is wired to a CPLD and can blink in | ||
35 | * relation with the SATA activity. This capability is exposed through the | ||
36 | * "sata" sysfs attribute. | ||
37 | * | ||
38 | * The following array detail the different LED registers and the combination | ||
39 | * of their possible values: | ||
40 | * | ||
41 | * cmd_led | slow_led | /SATA active | LED state | ||
42 | * | | | | ||
43 | * 1 | 0 | x | off | ||
44 | * - | 1 | x | on | ||
45 | * 0 | 0 | 1 | on | ||
46 | * 0 | 0 | 0 | blink (rate 300ms) | ||
47 | */ | ||
48 | |||
49 | enum ns2_led_modes { | ||
50 | NS_V2_LED_OFF, | ||
51 | NS_V2_LED_ON, | ||
52 | NS_V2_LED_SATA, | ||
53 | }; | ||
54 | |||
55 | struct ns2_led_mode_value { | ||
56 | enum ns2_led_modes mode; | ||
57 | int cmd_level; | ||
58 | int slow_level; | ||
59 | }; | ||
60 | |||
61 | static struct ns2_led_mode_value ns2_led_modval[] = { | ||
62 | { NS_V2_LED_OFF , 1, 0 }, | ||
63 | { NS_V2_LED_ON , 0, 1 }, | ||
64 | { NS_V2_LED_ON , 1, 1 }, | ||
65 | { NS_V2_LED_SATA, 0, 0 }, | ||
66 | }; | ||
67 | |||
68 | struct ns2_led_data { | ||
69 | struct led_classdev cdev; | ||
70 | unsigned cmd; | ||
71 | unsigned slow; | ||
72 | unsigned char sata; /* True when SATA mode active. */ | ||
73 | rwlock_t rw_lock; /* Lock GPIOs. */ | ||
74 | }; | ||
75 | |||
76 | static int ns2_led_get_mode(struct ns2_led_data *led_dat, | ||
77 | enum ns2_led_modes *mode) | ||
78 | { | ||
79 | int i; | ||
80 | int ret = -EINVAL; | ||
81 | int cmd_level; | ||
82 | int slow_level; | ||
83 | |||
84 | read_lock(&led_dat->rw_lock); | ||
85 | |||
86 | cmd_level = gpio_get_value(led_dat->cmd); | ||
87 | slow_level = gpio_get_value(led_dat->slow); | ||
88 | |||
89 | for (i = 0; i < ARRAY_SIZE(ns2_led_modval); i++) { | ||
90 | if (cmd_level == ns2_led_modval[i].cmd_level && | ||
91 | slow_level == ns2_led_modval[i].slow_level) { | ||
92 | *mode = ns2_led_modval[i].mode; | ||
93 | ret = 0; | ||
94 | break; | ||
95 | } | ||
96 | } | ||
97 | |||
98 | read_unlock(&led_dat->rw_lock); | ||
99 | |||
100 | return ret; | ||
101 | } | ||
102 | |||
103 | static void ns2_led_set_mode(struct ns2_led_data *led_dat, | ||
104 | enum ns2_led_modes mode) | ||
105 | { | ||
106 | int i; | ||
107 | |||
108 | write_lock(&led_dat->rw_lock); | ||
109 | |||
110 | for (i = 0; i < ARRAY_SIZE(ns2_led_modval); i++) { | ||
111 | if (mode == ns2_led_modval[i].mode) { | ||
112 | gpio_set_value(led_dat->cmd, | ||
113 | ns2_led_modval[i].cmd_level); | ||
114 | gpio_set_value(led_dat->slow, | ||
115 | ns2_led_modval[i].slow_level); | ||
116 | } | ||
117 | } | ||
118 | |||
119 | write_unlock(&led_dat->rw_lock); | ||
120 | } | ||
121 | |||
122 | static void ns2_led_set(struct led_classdev *led_cdev, | ||
123 | enum led_brightness value) | ||
124 | { | ||
125 | struct ns2_led_data *led_dat = | ||
126 | container_of(led_cdev, struct ns2_led_data, cdev); | ||
127 | enum ns2_led_modes mode; | ||
128 | |||
129 | if (value == LED_OFF) | ||
130 | mode = NS_V2_LED_OFF; | ||
131 | else if (led_dat->sata) | ||
132 | mode = NS_V2_LED_SATA; | ||
133 | else | ||
134 | mode = NS_V2_LED_ON; | ||
135 | |||
136 | ns2_led_set_mode(led_dat, mode); | ||
137 | } | ||
138 | |||
139 | static ssize_t ns2_led_sata_store(struct device *dev, | ||
140 | struct device_attribute *attr, | ||
141 | const char *buff, size_t count) | ||
142 | { | ||
143 | int ret; | ||
144 | unsigned long enable; | ||
145 | enum ns2_led_modes mode; | ||
146 | struct ns2_led_data *led_dat = dev_get_drvdata(dev); | ||
147 | |||
148 | ret = strict_strtoul(buff, 10, &enable); | ||
149 | if (ret < 0) | ||
150 | return ret; | ||
151 | |||
152 | enable = !!enable; | ||
153 | |||
154 | if (led_dat->sata == enable) | ||
155 | return count; | ||
156 | |||
157 | ret = ns2_led_get_mode(led_dat, &mode); | ||
158 | if (ret < 0) | ||
159 | return ret; | ||
160 | |||
161 | if (enable && mode == NS_V2_LED_ON) | ||
162 | ns2_led_set_mode(led_dat, NS_V2_LED_SATA); | ||
163 | if (!enable && mode == NS_V2_LED_SATA) | ||
164 | ns2_led_set_mode(led_dat, NS_V2_LED_ON); | ||
165 | |||
166 | led_dat->sata = enable; | ||
167 | |||
168 | return count; | ||
169 | } | ||
170 | |||
171 | static ssize_t ns2_led_sata_show(struct device *dev, | ||
172 | struct device_attribute *attr, char *buf) | ||
173 | { | ||
174 | struct ns2_led_data *led_dat = dev_get_drvdata(dev); | ||
175 | |||
176 | return sprintf(buf, "%d\n", led_dat->sata); | ||
177 | } | ||
178 | |||
179 | static DEVICE_ATTR(sata, 0644, ns2_led_sata_show, ns2_led_sata_store); | ||
180 | |||
181 | static int __devinit | ||
182 | create_ns2_led(struct platform_device *pdev, struct ns2_led_data *led_dat, | ||
183 | const struct ns2_led *template) | ||
184 | { | ||
185 | int ret; | ||
186 | enum ns2_led_modes mode; | ||
187 | |||
188 | ret = gpio_request(template->cmd, template->name); | ||
189 | if (ret == 0) { | ||
190 | ret = gpio_direction_output(template->cmd, | ||
191 | gpio_get_value(template->cmd)); | ||
192 | if (ret) | ||
193 | gpio_free(template->cmd); | ||
194 | } | ||
195 | if (ret) { | ||
196 | dev_err(&pdev->dev, "%s: failed to setup command GPIO\n", | ||
197 | template->name); | ||
198 | } | ||
199 | |||
200 | ret = gpio_request(template->slow, template->name); | ||
201 | if (ret == 0) { | ||
202 | ret = gpio_direction_output(template->slow, | ||
203 | gpio_get_value(template->slow)); | ||
204 | if (ret) | ||
205 | gpio_free(template->slow); | ||
206 | } | ||
207 | if (ret) { | ||
208 | dev_err(&pdev->dev, "%s: failed to setup slow GPIO\n", | ||
209 | template->name); | ||
210 | goto err_free_cmd; | ||
211 | } | ||
212 | |||
213 | rwlock_init(&led_dat->rw_lock); | ||
214 | |||
215 | led_dat->cdev.name = template->name; | ||
216 | led_dat->cdev.default_trigger = template->default_trigger; | ||
217 | led_dat->cdev.blink_set = NULL; | ||
218 | led_dat->cdev.brightness_set = ns2_led_set; | ||
219 | led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME; | ||
220 | led_dat->cmd = template->cmd; | ||
221 | led_dat->slow = template->slow; | ||
222 | |||
223 | ret = ns2_led_get_mode(led_dat, &mode); | ||
224 | if (ret < 0) | ||
225 | goto err_free_slow; | ||
226 | |||
227 | /* Set LED initial state. */ | ||
228 | led_dat->sata = (mode == NS_V2_LED_SATA) ? 1 : 0; | ||
229 | led_dat->cdev.brightness = | ||
230 | (mode == NS_V2_LED_OFF) ? LED_OFF : LED_FULL; | ||
231 | |||
232 | ret = led_classdev_register(&pdev->dev, &led_dat->cdev); | ||
233 | if (ret < 0) | ||
234 | goto err_free_slow; | ||
235 | |||
236 | dev_set_drvdata(led_dat->cdev.dev, led_dat); | ||
237 | ret = device_create_file(led_dat->cdev.dev, &dev_attr_sata); | ||
238 | if (ret < 0) | ||
239 | goto err_free_cdev; | ||
240 | |||
241 | return 0; | ||
242 | |||
243 | err_free_cdev: | ||
244 | led_classdev_unregister(&led_dat->cdev); | ||
245 | err_free_slow: | ||
246 | gpio_free(led_dat->slow); | ||
247 | err_free_cmd: | ||
248 | gpio_free(led_dat->cmd); | ||
249 | |||
250 | return ret; | ||
251 | } | ||
252 | |||
253 | static void __devexit delete_ns2_led(struct ns2_led_data *led_dat) | ||
254 | { | ||
255 | device_remove_file(led_dat->cdev.dev, &dev_attr_sata); | ||
256 | led_classdev_unregister(&led_dat->cdev); | ||
257 | gpio_free(led_dat->cmd); | ||
258 | gpio_free(led_dat->slow); | ||
259 | } | ||
260 | |||
261 | static int __devinit ns2_led_probe(struct platform_device *pdev) | ||
262 | { | ||
263 | struct ns2_led_platform_data *pdata = pdev->dev.platform_data; | ||
264 | struct ns2_led_data *leds_data; | ||
265 | int i; | ||
266 | int ret; | ||
267 | |||
268 | if (!pdata) | ||
269 | return -EINVAL; | ||
270 | |||
271 | leds_data = kzalloc(sizeof(struct ns2_led_data) * | ||
272 | pdata->num_leds, GFP_KERNEL); | ||
273 | if (!leds_data) | ||
274 | return -ENOMEM; | ||
275 | |||
276 | for (i = 0; i < pdata->num_leds; i++) { | ||
277 | ret = create_ns2_led(pdev, &leds_data[i], &pdata->leds[i]); | ||
278 | if (ret < 0) | ||
279 | goto err; | ||
280 | |||
281 | } | ||
282 | |||
283 | platform_set_drvdata(pdev, leds_data); | ||
284 | |||
285 | return 0; | ||
286 | |||
287 | err: | ||
288 | for (i = i - 1; i >= 0; i--) | ||
289 | delete_ns2_led(&leds_data[i]); | ||
290 | |||
291 | kfree(leds_data); | ||
292 | |||
293 | return ret; | ||
294 | } | ||
295 | |||
296 | static int __devexit ns2_led_remove(struct platform_device *pdev) | ||
297 | { | ||
298 | int i; | ||
299 | struct ns2_led_platform_data *pdata = pdev->dev.platform_data; | ||
300 | struct ns2_led_data *leds_data; | ||
301 | |||
302 | leds_data = platform_get_drvdata(pdev); | ||
303 | |||
304 | for (i = 0; i < pdata->num_leds; i++) | ||
305 | delete_ns2_led(&leds_data[i]); | ||
306 | |||
307 | kfree(leds_data); | ||
308 | platform_set_drvdata(pdev, NULL); | ||
309 | |||
310 | return 0; | ||
311 | } | ||
312 | |||
313 | static struct platform_driver ns2_led_driver = { | ||
314 | .probe = ns2_led_probe, | ||
315 | .remove = __devexit_p(ns2_led_remove), | ||
316 | .driver = { | ||
317 | .name = "leds-ns2", | ||
318 | .owner = THIS_MODULE, | ||
319 | }, | ||
320 | }; | ||
321 | MODULE_ALIAS("platform:leds-ns2"); | ||
322 | |||
323 | static int __init ns2_led_init(void) | ||
324 | { | ||
325 | return platform_driver_register(&ns2_led_driver); | ||
326 | } | ||
327 | |||
328 | static void __exit ns2_led_exit(void) | ||
329 | { | ||
330 | platform_driver_unregister(&ns2_led_driver); | ||
331 | } | ||
332 | |||
333 | module_init(ns2_led_init); | ||
334 | module_exit(ns2_led_exit); | ||
335 | |||
336 | MODULE_AUTHOR("Simon Guinot <sguinot@lacie.com>"); | ||
337 | MODULE_DESCRIPTION("Network Space v2 LED driver"); | ||
338 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig index bdbc9d305419..27e2acce3c3a 100644 --- a/drivers/media/video/Kconfig +++ b/drivers/media/video/Kconfig | |||
@@ -969,6 +969,19 @@ config VIDEO_OMAP2 | |||
969 | ---help--- | 969 | ---help--- |
970 | This is a v4l2 driver for the TI OMAP2 camera capture interface | 970 | This is a v4l2 driver for the TI OMAP2 camera capture interface |
971 | 971 | ||
972 | config VIDEO_MX2_HOSTSUPPORT | ||
973 | bool | ||
974 | |||
975 | config VIDEO_MX2 | ||
976 | tristate "i.MX27/i.MX25 Camera Sensor Interface driver" | ||
977 | depends on VIDEO_DEV && SOC_CAMERA && (MACH_MX27 || ARCH_MX25) | ||
978 | select VIDEOBUF_DMA_CONTIG | ||
979 | select VIDEO_MX2_HOSTSUPPORT | ||
980 | ---help--- | ||
981 | This is a v4l2 driver for the i.MX27 and the i.MX25 Camera Sensor | ||
982 | Interface | ||
983 | |||
984 | |||
972 | # | 985 | # |
973 | # USB Multimedia device configuration | 986 | # USB Multimedia device configuration |
974 | # | 987 | # |
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile index cc93859d3164..b08bd2b65cd0 100644 --- a/drivers/media/video/Makefile +++ b/drivers/media/video/Makefile | |||
@@ -162,6 +162,7 @@ obj-$(CONFIG_SOC_CAMERA) += soc_camera.o soc_mediabus.o | |||
162 | obj-$(CONFIG_SOC_CAMERA_PLATFORM) += soc_camera_platform.o | 162 | obj-$(CONFIG_SOC_CAMERA_PLATFORM) += soc_camera_platform.o |
163 | # soc-camera host drivers have to be linked after camera drivers | 163 | # soc-camera host drivers have to be linked after camera drivers |
164 | obj-$(CONFIG_VIDEO_MX1) += mx1_camera.o | 164 | obj-$(CONFIG_VIDEO_MX1) += mx1_camera.o |
165 | obj-$(CONFIG_VIDEO_MX2) += mx2_camera.o | ||
165 | obj-$(CONFIG_VIDEO_MX3) += mx3_camera.o | 166 | obj-$(CONFIG_VIDEO_MX3) += mx3_camera.o |
166 | obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o | 167 | obj-$(CONFIG_VIDEO_PXA27x) += pxa_camera.o |
167 | obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o | 168 | obj-$(CONFIG_VIDEO_SH_MOBILE_CEU) += sh_mobile_ceu_camera.o |
diff --git a/drivers/media/video/mx2_camera.c b/drivers/media/video/mx2_camera.c new file mode 100644 index 000000000000..026bef0ba403 --- /dev/null +++ b/drivers/media/video/mx2_camera.c | |||
@@ -0,0 +1,1513 @@ | |||
1 | /* | ||
2 | * V4L2 Driver for i.MX27/i.MX25 camera host | ||
3 | * | ||
4 | * Copyright (C) 2008, Sascha Hauer, Pengutronix | ||
5 | * Copyright (C) 2010, Baruch Siach, Orex Computed Radiography | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/init.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/delay.h> | ||
17 | #include <linux/slab.h> | ||
18 | #include <linux/dma-mapping.h> | ||
19 | #include <linux/errno.h> | ||
20 | #include <linux/fs.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/mm.h> | ||
24 | #include <linux/moduleparam.h> | ||
25 | #include <linux/time.h> | ||
26 | #include <linux/version.h> | ||
27 | #include <linux/device.h> | ||
28 | #include <linux/platform_device.h> | ||
29 | #include <linux/mutex.h> | ||
30 | #include <linux/clk.h> | ||
31 | |||
32 | #include <media/v4l2-common.h> | ||
33 | #include <media/v4l2-dev.h> | ||
34 | #include <media/videobuf-dma-contig.h> | ||
35 | #include <media/soc_camera.h> | ||
36 | #include <media/soc_mediabus.h> | ||
37 | |||
38 | #include <linux/videodev2.h> | ||
39 | |||
40 | #include <mach/mx2_cam.h> | ||
41 | #ifdef CONFIG_MACH_MX27 | ||
42 | #include <mach/dma-mx1-mx2.h> | ||
43 | #endif | ||
44 | #include <mach/hardware.h> | ||
45 | |||
46 | #include <asm/dma.h> | ||
47 | |||
48 | #define MX2_CAM_DRV_NAME "mx2-camera" | ||
49 | #define MX2_CAM_VERSION_CODE KERNEL_VERSION(0, 0, 5) | ||
50 | #define MX2_CAM_DRIVER_DESCRIPTION "i.MX2x_Camera" | ||
51 | |||
52 | /* reset values */ | ||
53 | #define CSICR1_RESET_VAL 0x40000800 | ||
54 | #define CSICR2_RESET_VAL 0x0 | ||
55 | #define CSICR3_RESET_VAL 0x0 | ||
56 | |||
57 | /* csi control reg 1 */ | ||
58 | #define CSICR1_SWAP16_EN (1 << 31) | ||
59 | #define CSICR1_EXT_VSYNC (1 << 30) | ||
60 | #define CSICR1_EOF_INTEN (1 << 29) | ||
61 | #define CSICR1_PRP_IF_EN (1 << 28) | ||
62 | #define CSICR1_CCIR_MODE (1 << 27) | ||
63 | #define CSICR1_COF_INTEN (1 << 26) | ||
64 | #define CSICR1_SF_OR_INTEN (1 << 25) | ||
65 | #define CSICR1_RF_OR_INTEN (1 << 24) | ||
66 | #define CSICR1_STATFF_LEVEL (3 << 22) | ||
67 | #define CSICR1_STATFF_INTEN (1 << 21) | ||
68 | #define CSICR1_RXFF_LEVEL(l) (((l) & 3) << 19) /* MX27 */ | ||
69 | #define CSICR1_FB2_DMA_INTEN (1 << 20) /* MX25 */ | ||
70 | #define CSICR1_FB1_DMA_INTEN (1 << 19) /* MX25 */ | ||
71 | #define CSICR1_RXFF_INTEN (1 << 18) | ||
72 | #define CSICR1_SOF_POL (1 << 17) | ||
73 | #define CSICR1_SOF_INTEN (1 << 16) | ||
74 | #define CSICR1_MCLKDIV(d) (((d) & 0xF) << 12) | ||
75 | #define CSICR1_HSYNC_POL (1 << 11) | ||
76 | #define CSICR1_CCIR_EN (1 << 10) | ||
77 | #define CSICR1_MCLKEN (1 << 9) | ||
78 | #define CSICR1_FCC (1 << 8) | ||
79 | #define CSICR1_PACK_DIR (1 << 7) | ||
80 | #define CSICR1_CLR_STATFIFO (1 << 6) | ||
81 | #define CSICR1_CLR_RXFIFO (1 << 5) | ||
82 | #define CSICR1_GCLK_MODE (1 << 4) | ||
83 | #define CSICR1_INV_DATA (1 << 3) | ||
84 | #define CSICR1_INV_PCLK (1 << 2) | ||
85 | #define CSICR1_REDGE (1 << 1) | ||
86 | |||
87 | #define SHIFT_STATFF_LEVEL 22 | ||
88 | #define SHIFT_RXFF_LEVEL 19 | ||
89 | #define SHIFT_MCLKDIV 12 | ||
90 | |||
91 | /* control reg 3 */ | ||
92 | #define CSICR3_FRMCNT (0xFFFF << 16) | ||
93 | #define CSICR3_FRMCNT_RST (1 << 15) | ||
94 | #define CSICR3_DMA_REFLASH_RFF (1 << 14) | ||
95 | #define CSICR3_DMA_REFLASH_SFF (1 << 13) | ||
96 | #define CSICR3_DMA_REQ_EN_RFF (1 << 12) | ||
97 | #define CSICR3_DMA_REQ_EN_SFF (1 << 11) | ||
98 | #define CSICR3_RXFF_LEVEL(l) (((l) & 7) << 4) /* MX25 */ | ||
99 | #define CSICR3_CSI_SUP (1 << 3) | ||
100 | #define CSICR3_ZERO_PACK_EN (1 << 2) | ||
101 | #define CSICR3_ECC_INT_EN (1 << 1) | ||
102 | #define CSICR3_ECC_AUTO_EN (1 << 0) | ||
103 | |||
104 | #define SHIFT_FRMCNT 16 | ||
105 | |||
106 | /* csi status reg */ | ||
107 | #define CSISR_SFF_OR_INT (1 << 25) | ||
108 | #define CSISR_RFF_OR_INT (1 << 24) | ||
109 | #define CSISR_STATFF_INT (1 << 21) | ||
110 | #define CSISR_DMA_TSF_FB2_INT (1 << 20) /* MX25 */ | ||
111 | #define CSISR_DMA_TSF_FB1_INT (1 << 19) /* MX25 */ | ||
112 | #define CSISR_RXFF_INT (1 << 18) | ||
113 | #define CSISR_EOF_INT (1 << 17) | ||
114 | #define CSISR_SOF_INT (1 << 16) | ||
115 | #define CSISR_F2_INT (1 << 15) | ||
116 | #define CSISR_F1_INT (1 << 14) | ||
117 | #define CSISR_COF_INT (1 << 13) | ||
118 | #define CSISR_ECC_INT (1 << 1) | ||
119 | #define CSISR_DRDY (1 << 0) | ||
120 | |||
121 | #define CSICR1 0x00 | ||
122 | #define CSICR2 0x04 | ||
123 | #define CSISR (cpu_is_mx27() ? 0x08 : 0x18) | ||
124 | #define CSISTATFIFO 0x0c | ||
125 | #define CSIRFIFO 0x10 | ||
126 | #define CSIRXCNT 0x14 | ||
127 | #define CSICR3 (cpu_is_mx27() ? 0x1C : 0x08) | ||
128 | #define CSIDMASA_STATFIFO 0x20 | ||
129 | #define CSIDMATA_STATFIFO 0x24 | ||
130 | #define CSIDMASA_FB1 0x28 | ||
131 | #define CSIDMASA_FB2 0x2c | ||
132 | #define CSIFBUF_PARA 0x30 | ||
133 | #define CSIIMAG_PARA 0x34 | ||
134 | |||
135 | /* EMMA PrP */ | ||
136 | #define PRP_CNTL 0x00 | ||
137 | #define PRP_INTR_CNTL 0x04 | ||
138 | #define PRP_INTRSTATUS 0x08 | ||
139 | #define PRP_SOURCE_Y_PTR 0x0c | ||
140 | #define PRP_SOURCE_CB_PTR 0x10 | ||
141 | #define PRP_SOURCE_CR_PTR 0x14 | ||
142 | #define PRP_DEST_RGB1_PTR 0x18 | ||
143 | #define PRP_DEST_RGB2_PTR 0x1c | ||
144 | #define PRP_DEST_Y_PTR 0x20 | ||
145 | #define PRP_DEST_CB_PTR 0x24 | ||
146 | #define PRP_DEST_CR_PTR 0x28 | ||
147 | #define PRP_SRC_FRAME_SIZE 0x2c | ||
148 | #define PRP_DEST_CH1_LINE_STRIDE 0x30 | ||
149 | #define PRP_SRC_PIXEL_FORMAT_CNTL 0x34 | ||
150 | #define PRP_CH1_PIXEL_FORMAT_CNTL 0x38 | ||
151 | #define PRP_CH1_OUT_IMAGE_SIZE 0x3c | ||
152 | #define PRP_CH2_OUT_IMAGE_SIZE 0x40 | ||
153 | #define PRP_SRC_LINE_STRIDE 0x44 | ||
154 | #define PRP_CSC_COEF_012 0x48 | ||
155 | #define PRP_CSC_COEF_345 0x4c | ||
156 | #define PRP_CSC_COEF_678 0x50 | ||
157 | #define PRP_CH1_RZ_HORI_COEF1 0x54 | ||
158 | #define PRP_CH1_RZ_HORI_COEF2 0x58 | ||
159 | #define PRP_CH1_RZ_HORI_VALID 0x5c | ||
160 | #define PRP_CH1_RZ_VERT_COEF1 0x60 | ||
161 | #define PRP_CH1_RZ_VERT_COEF2 0x64 | ||
162 | #define PRP_CH1_RZ_VERT_VALID 0x68 | ||
163 | #define PRP_CH2_RZ_HORI_COEF1 0x6c | ||
164 | #define PRP_CH2_RZ_HORI_COEF2 0x70 | ||
165 | #define PRP_CH2_RZ_HORI_VALID 0x74 | ||
166 | #define PRP_CH2_RZ_VERT_COEF1 0x78 | ||
167 | #define PRP_CH2_RZ_VERT_COEF2 0x7c | ||
168 | #define PRP_CH2_RZ_VERT_VALID 0x80 | ||
169 | |||
170 | #define PRP_CNTL_CH1EN (1 << 0) | ||
171 | #define PRP_CNTL_CH2EN (1 << 1) | ||
172 | #define PRP_CNTL_CSIEN (1 << 2) | ||
173 | #define PRP_CNTL_DATA_IN_YUV420 (0 << 3) | ||
174 | #define PRP_CNTL_DATA_IN_YUV422 (1 << 3) | ||
175 | #define PRP_CNTL_DATA_IN_RGB16 (2 << 3) | ||
176 | #define PRP_CNTL_DATA_IN_RGB32 (3 << 3) | ||
177 | #define PRP_CNTL_CH1_OUT_RGB8 (0 << 5) | ||
178 | #define PRP_CNTL_CH1_OUT_RGB16 (1 << 5) | ||
179 | #define PRP_CNTL_CH1_OUT_RGB32 (2 << 5) | ||
180 | #define PRP_CNTL_CH1_OUT_YUV422 (3 << 5) | ||
181 | #define PRP_CNTL_CH2_OUT_YUV420 (0 << 7) | ||
182 | #define PRP_CNTL_CH2_OUT_YUV422 (1 << 7) | ||
183 | #define PRP_CNTL_CH2_OUT_YUV444 (2 << 7) | ||
184 | #define PRP_CNTL_CH1_LEN (1 << 9) | ||
185 | #define PRP_CNTL_CH2_LEN (1 << 10) | ||
186 | #define PRP_CNTL_SKIP_FRAME (1 << 11) | ||
187 | #define PRP_CNTL_SWRST (1 << 12) | ||
188 | #define PRP_CNTL_CLKEN (1 << 13) | ||
189 | #define PRP_CNTL_WEN (1 << 14) | ||
190 | #define PRP_CNTL_CH1BYP (1 << 15) | ||
191 | #define PRP_CNTL_IN_TSKIP(x) ((x) << 16) | ||
192 | #define PRP_CNTL_CH1_TSKIP(x) ((x) << 19) | ||
193 | #define PRP_CNTL_CH2_TSKIP(x) ((x) << 22) | ||
194 | #define PRP_CNTL_INPUT_FIFO_LEVEL(x) ((x) << 25) | ||
195 | #define PRP_CNTL_RZ_FIFO_LEVEL(x) ((x) << 27) | ||
196 | #define PRP_CNTL_CH2B1EN (1 << 29) | ||
197 | #define PRP_CNTL_CH2B2EN (1 << 30) | ||
198 | #define PRP_CNTL_CH2FEN (1 << 31) | ||
199 | |||
200 | /* IRQ Enable and status register */ | ||
201 | #define PRP_INTR_RDERR (1 << 0) | ||
202 | #define PRP_INTR_CH1WERR (1 << 1) | ||
203 | #define PRP_INTR_CH2WERR (1 << 2) | ||
204 | #define PRP_INTR_CH1FC (1 << 3) | ||
205 | #define PRP_INTR_CH2FC (1 << 5) | ||
206 | #define PRP_INTR_LBOVF (1 << 7) | ||
207 | #define PRP_INTR_CH2OVF (1 << 8) | ||
208 | |||
209 | #define mx27_camera_emma(pcdev) (cpu_is_mx27() && pcdev->use_emma) | ||
210 | |||
211 | #define MAX_VIDEO_MEM 16 | ||
212 | |||
213 | struct mx2_camera_dev { | ||
214 | struct device *dev; | ||
215 | struct soc_camera_host soc_host; | ||
216 | struct soc_camera_device *icd; | ||
217 | struct clk *clk_csi, *clk_emma; | ||
218 | |||
219 | unsigned int irq_csi, irq_emma; | ||
220 | void __iomem *base_csi, *base_emma; | ||
221 | unsigned long base_dma; | ||
222 | |||
223 | struct mx2_camera_platform_data *pdata; | ||
224 | struct resource *res_csi, *res_emma; | ||
225 | unsigned long platform_flags; | ||
226 | |||
227 | struct list_head capture; | ||
228 | struct list_head active_bufs; | ||
229 | |||
230 | spinlock_t lock; | ||
231 | |||
232 | int dma; | ||
233 | struct mx2_buffer *active; | ||
234 | struct mx2_buffer *fb1_active; | ||
235 | struct mx2_buffer *fb2_active; | ||
236 | |||
237 | int use_emma; | ||
238 | |||
239 | u32 csicr1; | ||
240 | |||
241 | void *discard_buffer; | ||
242 | dma_addr_t discard_buffer_dma; | ||
243 | size_t discard_size; | ||
244 | }; | ||
245 | |||
246 | /* buffer for one video frame */ | ||
247 | struct mx2_buffer { | ||
248 | /* common v4l buffer stuff -- must be first */ | ||
249 | struct videobuf_buffer vb; | ||
250 | |||
251 | enum v4l2_mbus_pixelcode code; | ||
252 | |||
253 | int bufnum; | ||
254 | }; | ||
255 | |||
256 | static void mx2_camera_deactivate(struct mx2_camera_dev *pcdev) | ||
257 | { | ||
258 | unsigned long flags; | ||
259 | |||
260 | clk_disable(pcdev->clk_csi); | ||
261 | writel(0, pcdev->base_csi + CSICR1); | ||
262 | if (mx27_camera_emma(pcdev)) { | ||
263 | writel(0, pcdev->base_emma + PRP_CNTL); | ||
264 | } else if (cpu_is_mx25()) { | ||
265 | spin_lock_irqsave(&pcdev->lock, flags); | ||
266 | pcdev->fb1_active = NULL; | ||
267 | pcdev->fb2_active = NULL; | ||
268 | writel(0, pcdev->base_csi + CSIDMASA_FB1); | ||
269 | writel(0, pcdev->base_csi + CSIDMASA_FB2); | ||
270 | spin_unlock_irqrestore(&pcdev->lock, flags); | ||
271 | } | ||
272 | } | ||
273 | |||
274 | /* | ||
275 | * The following two functions absolutely depend on the fact, that | ||
276 | * there can be only one camera on mx2 camera sensor interface | ||
277 | */ | ||
278 | static int mx2_camera_add_device(struct soc_camera_device *icd) | ||
279 | { | ||
280 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | ||
281 | struct mx2_camera_dev *pcdev = ici->priv; | ||
282 | int ret; | ||
283 | u32 csicr1; | ||
284 | |||
285 | if (pcdev->icd) | ||
286 | return -EBUSY; | ||
287 | |||
288 | ret = clk_enable(pcdev->clk_csi); | ||
289 | if (ret < 0) | ||
290 | return ret; | ||
291 | |||
292 | csicr1 = CSICR1_MCLKEN; | ||
293 | |||
294 | if (mx27_camera_emma(pcdev)) { | ||
295 | csicr1 |= CSICR1_PRP_IF_EN | CSICR1_FCC | | ||
296 | CSICR1_RXFF_LEVEL(0); | ||
297 | } else if (cpu_is_mx27()) | ||
298 | csicr1 |= CSICR1_SOF_INTEN | CSICR1_RXFF_LEVEL(2); | ||
299 | |||
300 | pcdev->csicr1 = csicr1; | ||
301 | writel(pcdev->csicr1, pcdev->base_csi + CSICR1); | ||
302 | |||
303 | pcdev->icd = icd; | ||
304 | |||
305 | dev_info(icd->dev.parent, "Camera driver attached to camera %d\n", | ||
306 | icd->devnum); | ||
307 | |||
308 | return 0; | ||
309 | } | ||
310 | |||
311 | static void mx2_camera_remove_device(struct soc_camera_device *icd) | ||
312 | { | ||
313 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | ||
314 | struct mx2_camera_dev *pcdev = ici->priv; | ||
315 | |||
316 | BUG_ON(icd != pcdev->icd); | ||
317 | |||
318 | dev_info(icd->dev.parent, "Camera driver detached from camera %d\n", | ||
319 | icd->devnum); | ||
320 | |||
321 | mx2_camera_deactivate(pcdev); | ||
322 | |||
323 | if (pcdev->discard_buffer) { | ||
324 | dma_free_coherent(ici->v4l2_dev.dev, pcdev->discard_size, | ||
325 | pcdev->discard_buffer, | ||
326 | pcdev->discard_buffer_dma); | ||
327 | pcdev->discard_buffer = NULL; | ||
328 | } | ||
329 | |||
330 | pcdev->icd = NULL; | ||
331 | } | ||
332 | |||
333 | #ifdef CONFIG_MACH_MX27 | ||
334 | static void mx27_camera_dma_enable(struct mx2_camera_dev *pcdev) | ||
335 | { | ||
336 | u32 tmp; | ||
337 | |||
338 | imx_dma_enable(pcdev->dma); | ||
339 | |||
340 | tmp = readl(pcdev->base_csi + CSICR1); | ||
341 | tmp |= CSICR1_RF_OR_INTEN; | ||
342 | writel(tmp, pcdev->base_csi + CSICR1); | ||
343 | } | ||
344 | |||
345 | static irqreturn_t mx27_camera_irq(int irq_csi, void *data) | ||
346 | { | ||
347 | struct mx2_camera_dev *pcdev = data; | ||
348 | u32 status = readl(pcdev->base_csi + CSISR); | ||
349 | |||
350 | if (status & CSISR_SOF_INT && pcdev->active) { | ||
351 | u32 tmp; | ||
352 | |||
353 | tmp = readl(pcdev->base_csi + CSICR1); | ||
354 | writel(tmp | CSICR1_CLR_RXFIFO, pcdev->base_csi + CSICR1); | ||
355 | mx27_camera_dma_enable(pcdev); | ||
356 | } | ||
357 | |||
358 | writel(CSISR_SOF_INT | CSISR_RFF_OR_INT, pcdev->base_csi + CSISR); | ||
359 | |||
360 | return IRQ_HANDLED; | ||
361 | } | ||
362 | #else | ||
363 | static irqreturn_t mx27_camera_irq(int irq_csi, void *data) | ||
364 | { | ||
365 | return IRQ_NONE; | ||
366 | } | ||
367 | #endif /* CONFIG_MACH_MX27 */ | ||
368 | |||
369 | static void mx25_camera_frame_done(struct mx2_camera_dev *pcdev, int fb, | ||
370 | int state) | ||
371 | { | ||
372 | struct videobuf_buffer *vb; | ||
373 | struct mx2_buffer *buf; | ||
374 | struct mx2_buffer **fb_active = fb == 1 ? &pcdev->fb1_active : | ||
375 | &pcdev->fb2_active; | ||
376 | u32 fb_reg = fb == 1 ? CSIDMASA_FB1 : CSIDMASA_FB2; | ||
377 | unsigned long flags; | ||
378 | |||
379 | spin_lock_irqsave(&pcdev->lock, flags); | ||
380 | |||
381 | vb = &(*fb_active)->vb; | ||
382 | dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | ||
383 | vb, vb->baddr, vb->bsize); | ||
384 | |||
385 | vb->state = state; | ||
386 | do_gettimeofday(&vb->ts); | ||
387 | vb->field_count++; | ||
388 | |||
389 | wake_up(&vb->done); | ||
390 | |||
391 | if (list_empty(&pcdev->capture)) { | ||
392 | buf = NULL; | ||
393 | writel(0, pcdev->base_csi + fb_reg); | ||
394 | } else { | ||
395 | buf = list_entry(pcdev->capture.next, struct mx2_buffer, | ||
396 | vb.queue); | ||
397 | vb = &buf->vb; | ||
398 | list_del(&vb->queue); | ||
399 | vb->state = VIDEOBUF_ACTIVE; | ||
400 | writel(videobuf_to_dma_contig(vb), pcdev->base_csi + fb_reg); | ||
401 | } | ||
402 | |||
403 | *fb_active = buf; | ||
404 | |||
405 | spin_unlock_irqrestore(&pcdev->lock, flags); | ||
406 | } | ||
407 | |||
408 | static irqreturn_t mx25_camera_irq(int irq_csi, void *data) | ||
409 | { | ||
410 | struct mx2_camera_dev *pcdev = data; | ||
411 | u32 status = readl(pcdev->base_csi + CSISR); | ||
412 | |||
413 | if (status & CSISR_DMA_TSF_FB1_INT) | ||
414 | mx25_camera_frame_done(pcdev, 1, VIDEOBUF_DONE); | ||
415 | else if (status & CSISR_DMA_TSF_FB2_INT) | ||
416 | mx25_camera_frame_done(pcdev, 2, VIDEOBUF_DONE); | ||
417 | |||
418 | /* FIXME: handle CSISR_RFF_OR_INT */ | ||
419 | |||
420 | writel(status, pcdev->base_csi + CSISR); | ||
421 | |||
422 | return IRQ_HANDLED; | ||
423 | } | ||
424 | |||
425 | /* | ||
426 | * Videobuf operations | ||
427 | */ | ||
428 | static int mx2_videobuf_setup(struct videobuf_queue *vq, unsigned int *count, | ||
429 | unsigned int *size) | ||
430 | { | ||
431 | struct soc_camera_device *icd = vq->priv_data; | ||
432 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | ||
433 | icd->current_fmt->host_fmt); | ||
434 | |||
435 | dev_dbg(&icd->dev, "count=%d, size=%d\n", *count, *size); | ||
436 | |||
437 | if (bytes_per_line < 0) | ||
438 | return bytes_per_line; | ||
439 | |||
440 | *size = bytes_per_line * icd->user_height; | ||
441 | |||
442 | if (0 == *count) | ||
443 | *count = 32; | ||
444 | if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024) | ||
445 | *count = (MAX_VIDEO_MEM * 1024 * 1024) / *size; | ||
446 | |||
447 | return 0; | ||
448 | } | ||
449 | |||
450 | static void free_buffer(struct videobuf_queue *vq, struct mx2_buffer *buf) | ||
451 | { | ||
452 | struct soc_camera_device *icd = vq->priv_data; | ||
453 | struct videobuf_buffer *vb = &buf->vb; | ||
454 | |||
455 | dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | ||
456 | vb, vb->baddr, vb->bsize); | ||
457 | |||
458 | /* | ||
459 | * This waits until this buffer is out of danger, i.e., until it is no | ||
460 | * longer in STATE_QUEUED or STATE_ACTIVE | ||
461 | */ | ||
462 | videobuf_waiton(vb, 0, 0); | ||
463 | |||
464 | videobuf_dma_contig_free(vq, vb); | ||
465 | dev_dbg(&icd->dev, "%s freed\n", __func__); | ||
466 | |||
467 | vb->state = VIDEOBUF_NEEDS_INIT; | ||
468 | } | ||
469 | |||
470 | static int mx2_videobuf_prepare(struct videobuf_queue *vq, | ||
471 | struct videobuf_buffer *vb, enum v4l2_field field) | ||
472 | { | ||
473 | struct soc_camera_device *icd = vq->priv_data; | ||
474 | struct mx2_buffer *buf = container_of(vb, struct mx2_buffer, vb); | ||
475 | int bytes_per_line = soc_mbus_bytes_per_line(icd->user_width, | ||
476 | icd->current_fmt->host_fmt); | ||
477 | int ret = 0; | ||
478 | |||
479 | dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | ||
480 | vb, vb->baddr, vb->bsize); | ||
481 | |||
482 | if (bytes_per_line < 0) | ||
483 | return bytes_per_line; | ||
484 | |||
485 | #ifdef DEBUG | ||
486 | /* | ||
487 | * This can be useful if you want to see if we actually fill | ||
488 | * the buffer with something | ||
489 | */ | ||
490 | memset((void *)vb->baddr, 0xaa, vb->bsize); | ||
491 | #endif | ||
492 | |||
493 | if (buf->code != icd->current_fmt->code || | ||
494 | vb->width != icd->user_width || | ||
495 | vb->height != icd->user_height || | ||
496 | vb->field != field) { | ||
497 | buf->code = icd->current_fmt->code; | ||
498 | vb->width = icd->user_width; | ||
499 | vb->height = icd->user_height; | ||
500 | vb->field = field; | ||
501 | vb->state = VIDEOBUF_NEEDS_INIT; | ||
502 | } | ||
503 | |||
504 | vb->size = bytes_per_line * vb->height; | ||
505 | if (vb->baddr && vb->bsize < vb->size) { | ||
506 | ret = -EINVAL; | ||
507 | goto out; | ||
508 | } | ||
509 | |||
510 | if (vb->state == VIDEOBUF_NEEDS_INIT) { | ||
511 | ret = videobuf_iolock(vq, vb, NULL); | ||
512 | if (ret) | ||
513 | goto fail; | ||
514 | |||
515 | vb->state = VIDEOBUF_PREPARED; | ||
516 | } | ||
517 | |||
518 | return 0; | ||
519 | |||
520 | fail: | ||
521 | free_buffer(vq, buf); | ||
522 | out: | ||
523 | return ret; | ||
524 | } | ||
525 | |||
526 | static void mx2_videobuf_queue(struct videobuf_queue *vq, | ||
527 | struct videobuf_buffer *vb) | ||
528 | { | ||
529 | struct soc_camera_device *icd = vq->priv_data; | ||
530 | struct soc_camera_host *ici = | ||
531 | to_soc_camera_host(icd->dev.parent); | ||
532 | struct mx2_camera_dev *pcdev = ici->priv; | ||
533 | struct mx2_buffer *buf = container_of(vb, struct mx2_buffer, vb); | ||
534 | unsigned long flags; | ||
535 | |||
536 | dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | ||
537 | vb, vb->baddr, vb->bsize); | ||
538 | |||
539 | spin_lock_irqsave(&pcdev->lock, flags); | ||
540 | |||
541 | vb->state = VIDEOBUF_QUEUED; | ||
542 | list_add_tail(&vb->queue, &pcdev->capture); | ||
543 | |||
544 | if (mx27_camera_emma(pcdev)) { | ||
545 | goto out; | ||
546 | #ifdef CONFIG_MACH_MX27 | ||
547 | } else if (cpu_is_mx27()) { | ||
548 | int ret; | ||
549 | |||
550 | if (pcdev->active == NULL) { | ||
551 | ret = imx_dma_setup_single(pcdev->dma, | ||
552 | videobuf_to_dma_contig(vb), vb->size, | ||
553 | (u32)pcdev->base_dma + 0x10, | ||
554 | DMA_MODE_READ); | ||
555 | if (ret) { | ||
556 | vb->state = VIDEOBUF_ERROR; | ||
557 | wake_up(&vb->done); | ||
558 | goto out; | ||
559 | } | ||
560 | |||
561 | vb->state = VIDEOBUF_ACTIVE; | ||
562 | pcdev->active = buf; | ||
563 | } | ||
564 | #endif | ||
565 | } else { /* cpu_is_mx25() */ | ||
566 | u32 csicr3, dma_inten = 0; | ||
567 | |||
568 | if (pcdev->fb1_active == NULL) { | ||
569 | writel(videobuf_to_dma_contig(vb), | ||
570 | pcdev->base_csi + CSIDMASA_FB1); | ||
571 | pcdev->fb1_active = buf; | ||
572 | dma_inten = CSICR1_FB1_DMA_INTEN; | ||
573 | } else if (pcdev->fb2_active == NULL) { | ||
574 | writel(videobuf_to_dma_contig(vb), | ||
575 | pcdev->base_csi + CSIDMASA_FB2); | ||
576 | pcdev->fb2_active = buf; | ||
577 | dma_inten = CSICR1_FB2_DMA_INTEN; | ||
578 | } | ||
579 | |||
580 | if (dma_inten) { | ||
581 | list_del(&vb->queue); | ||
582 | vb->state = VIDEOBUF_ACTIVE; | ||
583 | |||
584 | csicr3 = readl(pcdev->base_csi + CSICR3); | ||
585 | |||
586 | /* Reflash DMA */ | ||
587 | writel(csicr3 | CSICR3_DMA_REFLASH_RFF, | ||
588 | pcdev->base_csi + CSICR3); | ||
589 | |||
590 | /* clear & enable interrupts */ | ||
591 | writel(dma_inten, pcdev->base_csi + CSISR); | ||
592 | pcdev->csicr1 |= dma_inten; | ||
593 | writel(pcdev->csicr1, pcdev->base_csi + CSICR1); | ||
594 | |||
595 | /* enable DMA */ | ||
596 | csicr3 |= CSICR3_DMA_REQ_EN_RFF | CSICR3_RXFF_LEVEL(1); | ||
597 | writel(csicr3, pcdev->base_csi + CSICR3); | ||
598 | } | ||
599 | } | ||
600 | |||
601 | out: | ||
602 | spin_unlock_irqrestore(&pcdev->lock, flags); | ||
603 | } | ||
604 | |||
605 | static void mx2_videobuf_release(struct videobuf_queue *vq, | ||
606 | struct videobuf_buffer *vb) | ||
607 | { | ||
608 | struct soc_camera_device *icd = vq->priv_data; | ||
609 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | ||
610 | struct mx2_camera_dev *pcdev = ici->priv; | ||
611 | struct mx2_buffer *buf = container_of(vb, struct mx2_buffer, vb); | ||
612 | unsigned long flags; | ||
613 | |||
614 | #ifdef DEBUG | ||
615 | dev_dbg(&icd->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | ||
616 | vb, vb->baddr, vb->bsize); | ||
617 | |||
618 | switch (vb->state) { | ||
619 | case VIDEOBUF_ACTIVE: | ||
620 | dev_info(&icd->dev, "%s (active)\n", __func__); | ||
621 | break; | ||
622 | case VIDEOBUF_QUEUED: | ||
623 | dev_info(&icd->dev, "%s (queued)\n", __func__); | ||
624 | break; | ||
625 | case VIDEOBUF_PREPARED: | ||
626 | dev_info(&icd->dev, "%s (prepared)\n", __func__); | ||
627 | break; | ||
628 | default: | ||
629 | dev_info(&icd->dev, "%s (unknown) %d\n", __func__, | ||
630 | vb->state); | ||
631 | break; | ||
632 | } | ||
633 | #endif | ||
634 | |||
635 | /* | ||
636 | * Terminate only queued but inactive buffers. Active buffers are | ||
637 | * released when they become inactive after videobuf_waiton(). | ||
638 | * | ||
639 | * FIXME: implement forced termination of active buffers, so that the | ||
640 | * user won't get stuck in an uninterruptible state. This requires a | ||
641 | * specific handling for each of the three DMA types that this driver | ||
642 | * supports. | ||
643 | */ | ||
644 | spin_lock_irqsave(&pcdev->lock, flags); | ||
645 | if (vb->state == VIDEOBUF_QUEUED) { | ||
646 | list_del(&vb->queue); | ||
647 | vb->state = VIDEOBUF_ERROR; | ||
648 | } | ||
649 | spin_unlock_irqrestore(&pcdev->lock, flags); | ||
650 | |||
651 | free_buffer(vq, buf); | ||
652 | } | ||
653 | |||
654 | static struct videobuf_queue_ops mx2_videobuf_ops = { | ||
655 | .buf_setup = mx2_videobuf_setup, | ||
656 | .buf_prepare = mx2_videobuf_prepare, | ||
657 | .buf_queue = mx2_videobuf_queue, | ||
658 | .buf_release = mx2_videobuf_release, | ||
659 | }; | ||
660 | |||
661 | static void mx2_camera_init_videobuf(struct videobuf_queue *q, | ||
662 | struct soc_camera_device *icd) | ||
663 | { | ||
664 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | ||
665 | struct mx2_camera_dev *pcdev = ici->priv; | ||
666 | |||
667 | videobuf_queue_dma_contig_init(q, &mx2_videobuf_ops, pcdev->dev, | ||
668 | &pcdev->lock, V4L2_BUF_TYPE_VIDEO_CAPTURE, | ||
669 | V4L2_FIELD_NONE, sizeof(struct mx2_buffer), icd); | ||
670 | } | ||
671 | |||
672 | #define MX2_BUS_FLAGS (SOCAM_DATAWIDTH_8 | \ | ||
673 | SOCAM_MASTER | \ | ||
674 | SOCAM_VSYNC_ACTIVE_HIGH | \ | ||
675 | SOCAM_VSYNC_ACTIVE_LOW | \ | ||
676 | SOCAM_HSYNC_ACTIVE_HIGH | \ | ||
677 | SOCAM_HSYNC_ACTIVE_LOW | \ | ||
678 | SOCAM_PCLK_SAMPLE_RISING | \ | ||
679 | SOCAM_PCLK_SAMPLE_FALLING | \ | ||
680 | SOCAM_DATA_ACTIVE_HIGH | \ | ||
681 | SOCAM_DATA_ACTIVE_LOW) | ||
682 | |||
683 | static int mx27_camera_emma_prp_reset(struct mx2_camera_dev *pcdev) | ||
684 | { | ||
685 | u32 cntl; | ||
686 | int count = 0; | ||
687 | |||
688 | cntl = readl(pcdev->base_emma + PRP_CNTL); | ||
689 | writel(PRP_CNTL_SWRST, pcdev->base_emma + PRP_CNTL); | ||
690 | while (count++ < 100) { | ||
691 | if (!(readl(pcdev->base_emma + PRP_CNTL) & PRP_CNTL_SWRST)) | ||
692 | return 0; | ||
693 | barrier(); | ||
694 | udelay(1); | ||
695 | } | ||
696 | |||
697 | return -ETIMEDOUT; | ||
698 | } | ||
699 | |||
700 | static void mx27_camera_emma_buf_init(struct soc_camera_device *icd, | ||
701 | int bytesperline) | ||
702 | { | ||
703 | struct soc_camera_host *ici = | ||
704 | to_soc_camera_host(icd->dev.parent); | ||
705 | struct mx2_camera_dev *pcdev = ici->priv; | ||
706 | |||
707 | writel(pcdev->discard_buffer_dma, | ||
708 | pcdev->base_emma + PRP_DEST_RGB1_PTR); | ||
709 | writel(pcdev->discard_buffer_dma, | ||
710 | pcdev->base_emma + PRP_DEST_RGB2_PTR); | ||
711 | |||
712 | /* | ||
713 | * We only use the EMMA engine to get rid of the broken | ||
714 | * DMA Engine. No color space consversion at the moment. | ||
715 | * We adjust incoming and outgoing pixelformat to rgb16 | ||
716 | * and adjust the bytesperline accordingly. | ||
717 | */ | ||
718 | writel(PRP_CNTL_CH1EN | | ||
719 | PRP_CNTL_CSIEN | | ||
720 | PRP_CNTL_DATA_IN_RGB16 | | ||
721 | PRP_CNTL_CH1_OUT_RGB16 | | ||
722 | PRP_CNTL_CH1_LEN | | ||
723 | PRP_CNTL_CH1BYP | | ||
724 | PRP_CNTL_CH1_TSKIP(0) | | ||
725 | PRP_CNTL_IN_TSKIP(0), | ||
726 | pcdev->base_emma + PRP_CNTL); | ||
727 | |||
728 | writel(((bytesperline >> 1) << 16) | icd->user_height, | ||
729 | pcdev->base_emma + PRP_SRC_FRAME_SIZE); | ||
730 | writel(((bytesperline >> 1) << 16) | icd->user_height, | ||
731 | pcdev->base_emma + PRP_CH1_OUT_IMAGE_SIZE); | ||
732 | writel(bytesperline, | ||
733 | pcdev->base_emma + PRP_DEST_CH1_LINE_STRIDE); | ||
734 | writel(0x2ca00565, /* RGB565 */ | ||
735 | pcdev->base_emma + PRP_SRC_PIXEL_FORMAT_CNTL); | ||
736 | writel(0x2ca00565, /* RGB565 */ | ||
737 | pcdev->base_emma + PRP_CH1_PIXEL_FORMAT_CNTL); | ||
738 | |||
739 | /* Enable interrupts */ | ||
740 | writel(PRP_INTR_RDERR | | ||
741 | PRP_INTR_CH1WERR | | ||
742 | PRP_INTR_CH2WERR | | ||
743 | PRP_INTR_CH1FC | | ||
744 | PRP_INTR_CH2FC | | ||
745 | PRP_INTR_LBOVF | | ||
746 | PRP_INTR_CH2OVF, | ||
747 | pcdev->base_emma + PRP_INTR_CNTL); | ||
748 | } | ||
749 | |||
750 | static int mx2_camera_set_bus_param(struct soc_camera_device *icd, | ||
751 | __u32 pixfmt) | ||
752 | { | ||
753 | struct soc_camera_host *ici = | ||
754 | to_soc_camera_host(icd->dev.parent); | ||
755 | struct mx2_camera_dev *pcdev = ici->priv; | ||
756 | unsigned long camera_flags, common_flags; | ||
757 | int ret = 0; | ||
758 | int bytesperline; | ||
759 | u32 csicr1 = pcdev->csicr1; | ||
760 | |||
761 | camera_flags = icd->ops->query_bus_param(icd); | ||
762 | |||
763 | common_flags = soc_camera_bus_param_compatible(camera_flags, | ||
764 | MX2_BUS_FLAGS); | ||
765 | if (!common_flags) | ||
766 | return -EINVAL; | ||
767 | |||
768 | if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) && | ||
769 | (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) { | ||
770 | if (pcdev->platform_flags & MX2_CAMERA_HSYNC_HIGH) | ||
771 | common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW; | ||
772 | else | ||
773 | common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH; | ||
774 | } | ||
775 | |||
776 | if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) && | ||
777 | (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) { | ||
778 | if (pcdev->platform_flags & MX2_CAMERA_PCLK_SAMPLE_RISING) | ||
779 | common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING; | ||
780 | else | ||
781 | common_flags &= ~SOCAM_PCLK_SAMPLE_RISING; | ||
782 | } | ||
783 | |||
784 | ret = icd->ops->set_bus_param(icd, common_flags); | ||
785 | if (ret < 0) | ||
786 | return ret; | ||
787 | |||
788 | if (common_flags & SOCAM_PCLK_SAMPLE_FALLING) | ||
789 | csicr1 |= CSICR1_INV_PCLK; | ||
790 | if (common_flags & SOCAM_VSYNC_ACTIVE_HIGH) | ||
791 | csicr1 |= CSICR1_SOF_POL; | ||
792 | if (common_flags & SOCAM_HSYNC_ACTIVE_HIGH) | ||
793 | csicr1 |= CSICR1_HSYNC_POL; | ||
794 | if (pcdev->platform_flags & MX2_CAMERA_SWAP16) | ||
795 | csicr1 |= CSICR1_SWAP16_EN; | ||
796 | if (pcdev->platform_flags & MX2_CAMERA_EXT_VSYNC) | ||
797 | csicr1 |= CSICR1_EXT_VSYNC; | ||
798 | if (pcdev->platform_flags & MX2_CAMERA_CCIR) | ||
799 | csicr1 |= CSICR1_CCIR_EN; | ||
800 | if (pcdev->platform_flags & MX2_CAMERA_CCIR_INTERLACE) | ||
801 | csicr1 |= CSICR1_CCIR_MODE; | ||
802 | if (pcdev->platform_flags & MX2_CAMERA_GATED_CLOCK) | ||
803 | csicr1 |= CSICR1_GCLK_MODE; | ||
804 | if (pcdev->platform_flags & MX2_CAMERA_INV_DATA) | ||
805 | csicr1 |= CSICR1_INV_DATA; | ||
806 | if (pcdev->platform_flags & MX2_CAMERA_PACK_DIR_MSB) | ||
807 | csicr1 |= CSICR1_PACK_DIR; | ||
808 | |||
809 | pcdev->csicr1 = csicr1; | ||
810 | |||
811 | bytesperline = soc_mbus_bytes_per_line(icd->user_width, | ||
812 | icd->current_fmt->host_fmt); | ||
813 | if (bytesperline < 0) | ||
814 | return bytesperline; | ||
815 | |||
816 | if (mx27_camera_emma(pcdev)) { | ||
817 | ret = mx27_camera_emma_prp_reset(pcdev); | ||
818 | if (ret) | ||
819 | return ret; | ||
820 | |||
821 | if (pcdev->discard_buffer) | ||
822 | dma_free_coherent(ici->v4l2_dev.dev, | ||
823 | pcdev->discard_size, pcdev->discard_buffer, | ||
824 | pcdev->discard_buffer_dma); | ||
825 | |||
826 | /* | ||
827 | * I didn't manage to properly enable/disable the prp | ||
828 | * on a per frame basis during running transfers, | ||
829 | * thus we allocate a buffer here and use it to | ||
830 | * discard frames when no buffer is available. | ||
831 | * Feel free to work on this ;) | ||
832 | */ | ||
833 | pcdev->discard_size = icd->user_height * bytesperline; | ||
834 | pcdev->discard_buffer = dma_alloc_coherent(ici->v4l2_dev.dev, | ||
835 | pcdev->discard_size, &pcdev->discard_buffer_dma, | ||
836 | GFP_KERNEL); | ||
837 | if (!pcdev->discard_buffer) | ||
838 | return -ENOMEM; | ||
839 | |||
840 | mx27_camera_emma_buf_init(icd, bytesperline); | ||
841 | } else if (cpu_is_mx25()) { | ||
842 | writel((bytesperline * icd->user_height) >> 2, | ||
843 | pcdev->base_csi + CSIRXCNT); | ||
844 | writel((bytesperline << 16) | icd->user_height, | ||
845 | pcdev->base_csi + CSIIMAG_PARA); | ||
846 | } | ||
847 | |||
848 | writel(pcdev->csicr1, pcdev->base_csi + CSICR1); | ||
849 | |||
850 | return 0; | ||
851 | } | ||
852 | |||
853 | static int mx2_camera_set_crop(struct soc_camera_device *icd, | ||
854 | struct v4l2_crop *a) | ||
855 | { | ||
856 | struct v4l2_rect *rect = &a->c; | ||
857 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
858 | struct v4l2_mbus_framefmt mf; | ||
859 | int ret; | ||
860 | |||
861 | soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096); | ||
862 | soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096); | ||
863 | |||
864 | ret = v4l2_subdev_call(sd, video, s_crop, a); | ||
865 | if (ret < 0) | ||
866 | return ret; | ||
867 | |||
868 | /* The capture device might have changed its output */ | ||
869 | ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf); | ||
870 | if (ret < 0) | ||
871 | return ret; | ||
872 | |||
873 | dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n", | ||
874 | mf.width, mf.height); | ||
875 | |||
876 | icd->user_width = mf.width; | ||
877 | icd->user_height = mf.height; | ||
878 | |||
879 | return ret; | ||
880 | } | ||
881 | |||
882 | static int mx2_camera_set_fmt(struct soc_camera_device *icd, | ||
883 | struct v4l2_format *f) | ||
884 | { | ||
885 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | ||
886 | struct mx2_camera_dev *pcdev = ici->priv; | ||
887 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
888 | const struct soc_camera_format_xlate *xlate; | ||
889 | struct v4l2_pix_format *pix = &f->fmt.pix; | ||
890 | struct v4l2_mbus_framefmt mf; | ||
891 | int ret; | ||
892 | |||
893 | xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat); | ||
894 | if (!xlate) { | ||
895 | dev_warn(icd->dev.parent, "Format %x not found\n", | ||
896 | pix->pixelformat); | ||
897 | return -EINVAL; | ||
898 | } | ||
899 | |||
900 | /* eMMA can only do RGB565 */ | ||
901 | if (mx27_camera_emma(pcdev) && pix->pixelformat != V4L2_PIX_FMT_RGB565) | ||
902 | return -EINVAL; | ||
903 | |||
904 | mf.width = pix->width; | ||
905 | mf.height = pix->height; | ||
906 | mf.field = pix->field; | ||
907 | mf.colorspace = pix->colorspace; | ||
908 | mf.code = xlate->code; | ||
909 | |||
910 | ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf); | ||
911 | if (ret < 0 && ret != -ENOIOCTLCMD) | ||
912 | return ret; | ||
913 | |||
914 | if (mf.code != xlate->code) | ||
915 | return -EINVAL; | ||
916 | |||
917 | pix->width = mf.width; | ||
918 | pix->height = mf.height; | ||
919 | pix->field = mf.field; | ||
920 | pix->colorspace = mf.colorspace; | ||
921 | icd->current_fmt = xlate; | ||
922 | |||
923 | return 0; | ||
924 | } | ||
925 | |||
926 | static int mx2_camera_try_fmt(struct soc_camera_device *icd, | ||
927 | struct v4l2_format *f) | ||
928 | { | ||
929 | struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent); | ||
930 | struct mx2_camera_dev *pcdev = ici->priv; | ||
931 | struct v4l2_subdev *sd = soc_camera_to_subdev(icd); | ||
932 | const struct soc_camera_format_xlate *xlate; | ||
933 | struct v4l2_pix_format *pix = &f->fmt.pix; | ||
934 | struct v4l2_mbus_framefmt mf; | ||
935 | __u32 pixfmt = pix->pixelformat; | ||
936 | unsigned int width_limit; | ||
937 | int ret; | ||
938 | |||
939 | xlate = soc_camera_xlate_by_fourcc(icd, pixfmt); | ||
940 | if (pixfmt && !xlate) { | ||
941 | dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt); | ||
942 | return -EINVAL; | ||
943 | } | ||
944 | |||
945 | /* FIXME: implement MX27 limits */ | ||
946 | |||
947 | /* eMMA can only do RGB565 */ | ||
948 | if (mx27_camera_emma(pcdev) && pixfmt != V4L2_PIX_FMT_RGB565) | ||
949 | return -EINVAL; | ||
950 | |||
951 | /* limit to MX25 hardware capabilities */ | ||
952 | if (cpu_is_mx25()) { | ||
953 | if (xlate->host_fmt->bits_per_sample <= 8) | ||
954 | width_limit = 0xffff * 4; | ||
955 | else | ||
956 | width_limit = 0xffff * 2; | ||
957 | /* CSIIMAG_PARA limit */ | ||
958 | if (pix->width > width_limit) | ||
959 | pix->width = width_limit; | ||
960 | if (pix->height > 0xffff) | ||
961 | pix->height = 0xffff; | ||
962 | |||
963 | pix->bytesperline = soc_mbus_bytes_per_line(pix->width, | ||
964 | xlate->host_fmt); | ||
965 | if (pix->bytesperline < 0) | ||
966 | return pix->bytesperline; | ||
967 | pix->sizeimage = pix->height * pix->bytesperline; | ||
968 | if (pix->sizeimage > (4 * 0x3ffff)) { /* CSIRXCNT limit */ | ||
969 | dev_warn(icd->dev.parent, | ||
970 | "Image size (%u) above limit\n", | ||
971 | pix->sizeimage); | ||
972 | return -EINVAL; | ||
973 | } | ||
974 | } | ||
975 | |||
976 | /* limit to sensor capabilities */ | ||
977 | mf.width = pix->width; | ||
978 | mf.height = pix->height; | ||
979 | mf.field = pix->field; | ||
980 | mf.colorspace = pix->colorspace; | ||
981 | mf.code = xlate->code; | ||
982 | |||
983 | ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf); | ||
984 | if (ret < 0) | ||
985 | return ret; | ||
986 | |||
987 | if (mf.field == V4L2_FIELD_ANY) | ||
988 | mf.field = V4L2_FIELD_NONE; | ||
989 | if (mf.field != V4L2_FIELD_NONE) { | ||
990 | dev_err(icd->dev.parent, "Field type %d unsupported.\n", | ||
991 | mf.field); | ||
992 | return -EINVAL; | ||
993 | } | ||
994 | |||
995 | pix->width = mf.width; | ||
996 | pix->height = mf.height; | ||
997 | pix->field = mf.field; | ||
998 | pix->colorspace = mf.colorspace; | ||
999 | |||
1000 | return 0; | ||
1001 | } | ||
1002 | |||
1003 | static int mx2_camera_querycap(struct soc_camera_host *ici, | ||
1004 | struct v4l2_capability *cap) | ||
1005 | { | ||
1006 | /* cap->name is set by the friendly caller:-> */ | ||
1007 | strlcpy(cap->card, MX2_CAM_DRIVER_DESCRIPTION, sizeof(cap->card)); | ||
1008 | cap->version = MX2_CAM_VERSION_CODE; | ||
1009 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING; | ||
1010 | |||
1011 | return 0; | ||
1012 | } | ||
1013 | |||
1014 | static int mx2_camera_reqbufs(struct soc_camera_file *icf, | ||
1015 | struct v4l2_requestbuffers *p) | ||
1016 | { | ||
1017 | int i; | ||
1018 | |||
1019 | for (i = 0; i < p->count; i++) { | ||
1020 | struct mx2_buffer *buf = container_of(icf->vb_vidq.bufs[i], | ||
1021 | struct mx2_buffer, vb); | ||
1022 | INIT_LIST_HEAD(&buf->vb.queue); | ||
1023 | } | ||
1024 | |||
1025 | return 0; | ||
1026 | } | ||
1027 | |||
1028 | #ifdef CONFIG_MACH_MX27 | ||
1029 | static void mx27_camera_frame_done(struct mx2_camera_dev *pcdev, int state) | ||
1030 | { | ||
1031 | struct videobuf_buffer *vb; | ||
1032 | struct mx2_buffer *buf; | ||
1033 | unsigned long flags; | ||
1034 | int ret; | ||
1035 | |||
1036 | spin_lock_irqsave(&pcdev->lock, flags); | ||
1037 | |||
1038 | if (!pcdev->active) { | ||
1039 | dev_err(pcdev->dev, "%s called with no active buffer!\n", | ||
1040 | __func__); | ||
1041 | goto out; | ||
1042 | } | ||
1043 | |||
1044 | vb = &pcdev->active->vb; | ||
1045 | buf = container_of(vb, struct mx2_buffer, vb); | ||
1046 | WARN_ON(list_empty(&vb->queue)); | ||
1047 | dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, | ||
1048 | vb, vb->baddr, vb->bsize); | ||
1049 | |||
1050 | /* _init is used to debug races, see comment in pxa_camera_reqbufs() */ | ||
1051 | list_del_init(&vb->queue); | ||
1052 | vb->state = state; | ||
1053 | do_gettimeofday(&vb->ts); | ||
1054 | vb->field_count++; | ||
1055 | |||
1056 | wake_up(&vb->done); | ||
1057 | |||
1058 | if (list_empty(&pcdev->capture)) { | ||
1059 | pcdev->active = NULL; | ||
1060 | goto out; | ||
1061 | } | ||
1062 | |||
1063 | pcdev->active = list_entry(pcdev->capture.next, | ||
1064 | struct mx2_buffer, vb.queue); | ||
1065 | |||
1066 | vb = &pcdev->active->vb; | ||
1067 | vb->state = VIDEOBUF_ACTIVE; | ||
1068 | |||
1069 | ret = imx_dma_setup_single(pcdev->dma, videobuf_to_dma_contig(vb), | ||
1070 | vb->size, (u32)pcdev->base_dma + 0x10, DMA_MODE_READ); | ||
1071 | |||
1072 | if (ret) { | ||
1073 | vb->state = VIDEOBUF_ERROR; | ||
1074 | pcdev->active = NULL; | ||
1075 | wake_up(&vb->done); | ||
1076 | } | ||
1077 | |||
1078 | out: | ||
1079 | spin_unlock_irqrestore(&pcdev->lock, flags); | ||
1080 | } | ||
1081 | |||
1082 | static void mx27_camera_dma_err_callback(int channel, void *data, int err) | ||
1083 | { | ||
1084 | struct mx2_camera_dev *pcdev = data; | ||
1085 | |||
1086 | mx27_camera_frame_done(pcdev, VIDEOBUF_ERROR); | ||
1087 | } | ||
1088 | |||
1089 | static void mx27_camera_dma_callback(int channel, void *data) | ||
1090 | { | ||
1091 | struct mx2_camera_dev *pcdev = data; | ||
1092 | |||
1093 | mx27_camera_frame_done(pcdev, VIDEOBUF_DONE); | ||
1094 | } | ||
1095 | |||
1096 | #define DMA_REQ_CSI_RX 31 /* FIXME: Add this to a resource */ | ||
1097 | |||
1098 | static int __devinit mx27_camera_dma_init(struct platform_device *pdev, | ||
1099 | struct mx2_camera_dev *pcdev) | ||
1100 | { | ||
1101 | int err; | ||
1102 | |||
1103 | pcdev->dma = imx_dma_request_by_prio("CSI RX DMA", DMA_PRIO_HIGH); | ||
1104 | if (pcdev->dma < 0) { | ||
1105 | dev_err(&pdev->dev, "%s failed to request DMA channel\n", | ||
1106 | __func__); | ||
1107 | return pcdev->dma; | ||
1108 | } | ||
1109 | |||
1110 | err = imx_dma_setup_handlers(pcdev->dma, mx27_camera_dma_callback, | ||
1111 | mx27_camera_dma_err_callback, pcdev); | ||
1112 | if (err) { | ||
1113 | dev_err(&pdev->dev, "%s failed to set DMA callback\n", | ||
1114 | __func__); | ||
1115 | goto err_out; | ||
1116 | } | ||
1117 | |||
1118 | err = imx_dma_config_channel(pcdev->dma, | ||
1119 | IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_FIFO, | ||
1120 | IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, | ||
1121 | DMA_REQ_CSI_RX, 1); | ||
1122 | if (err) { | ||
1123 | dev_err(&pdev->dev, "%s failed to config DMA channel\n", | ||
1124 | __func__); | ||
1125 | goto err_out; | ||
1126 | } | ||
1127 | |||
1128 | imx_dma_config_burstlen(pcdev->dma, 64); | ||
1129 | |||
1130 | return 0; | ||
1131 | |||
1132 | err_out: | ||
1133 | imx_dma_free(pcdev->dma); | ||
1134 | |||
1135 | return err; | ||
1136 | } | ||
1137 | #endif /* CONFIG_MACH_MX27 */ | ||
1138 | |||
1139 | static unsigned int mx2_camera_poll(struct file *file, poll_table *pt) | ||
1140 | { | ||
1141 | struct soc_camera_file *icf = file->private_data; | ||
1142 | |||
1143 | return videobuf_poll_stream(file, &icf->vb_vidq, pt); | ||
1144 | } | ||
1145 | |||
1146 | static struct soc_camera_host_ops mx2_soc_camera_host_ops = { | ||
1147 | .owner = THIS_MODULE, | ||
1148 | .add = mx2_camera_add_device, | ||
1149 | .remove = mx2_camera_remove_device, | ||
1150 | .set_fmt = mx2_camera_set_fmt, | ||
1151 | .set_crop = mx2_camera_set_crop, | ||
1152 | .try_fmt = mx2_camera_try_fmt, | ||
1153 | .init_videobuf = mx2_camera_init_videobuf, | ||
1154 | .reqbufs = mx2_camera_reqbufs, | ||
1155 | .poll = mx2_camera_poll, | ||
1156 | .querycap = mx2_camera_querycap, | ||
1157 | .set_bus_param = mx2_camera_set_bus_param, | ||
1158 | }; | ||
1159 | |||
1160 | static void mx27_camera_frame_done_emma(struct mx2_camera_dev *pcdev, | ||
1161 | int bufnum, int state) | ||
1162 | { | ||
1163 | struct mx2_buffer *buf; | ||
1164 | struct videobuf_buffer *vb; | ||
1165 | unsigned long phys; | ||
1166 | |||
1167 | if (!list_empty(&pcdev->active_bufs)) { | ||
1168 | buf = list_entry(pcdev->active_bufs.next, | ||
1169 | struct mx2_buffer, vb.queue); | ||
1170 | |||
1171 | BUG_ON(buf->bufnum != bufnum); | ||
1172 | |||
1173 | vb = &buf->vb; | ||
1174 | #ifdef DEBUG | ||
1175 | phys = videobuf_to_dma_contig(vb); | ||
1176 | if (readl(pcdev->base_emma + PRP_DEST_RGB1_PTR + 4 * bufnum) | ||
1177 | != phys) { | ||
1178 | dev_err(pcdev->dev, "%p != %p\n", phys, | ||
1179 | readl(pcdev->base_emma + | ||
1180 | PRP_DEST_RGB1_PTR + | ||
1181 | 4 * bufnum)); | ||
1182 | } | ||
1183 | #endif | ||
1184 | dev_dbg(pcdev->dev, "%s (vb=0x%p) 0x%08lx %d\n", __func__, vb, | ||
1185 | vb->baddr, vb->bsize); | ||
1186 | |||
1187 | list_del(&vb->queue); | ||
1188 | vb->state = state; | ||
1189 | do_gettimeofday(&vb->ts); | ||
1190 | vb->field_count++; | ||
1191 | |||
1192 | wake_up(&vb->done); | ||
1193 | } | ||
1194 | |||
1195 | if (list_empty(&pcdev->capture)) { | ||
1196 | writel(pcdev->discard_buffer_dma, pcdev->base_emma + | ||
1197 | PRP_DEST_RGB1_PTR + 4 * bufnum); | ||
1198 | return; | ||
1199 | } | ||
1200 | |||
1201 | buf = list_entry(pcdev->capture.next, | ||
1202 | struct mx2_buffer, vb.queue); | ||
1203 | |||
1204 | buf->bufnum = bufnum; | ||
1205 | |||
1206 | list_move_tail(pcdev->capture.next, &pcdev->active_bufs); | ||
1207 | |||
1208 | vb = &buf->vb; | ||
1209 | vb->state = VIDEOBUF_ACTIVE; | ||
1210 | |||
1211 | phys = videobuf_to_dma_contig(vb); | ||
1212 | writel(phys, pcdev->base_emma + PRP_DEST_RGB1_PTR + 4 * bufnum); | ||
1213 | } | ||
1214 | |||
1215 | static irqreturn_t mx27_camera_emma_irq(int irq_emma, void *data) | ||
1216 | { | ||
1217 | struct mx2_camera_dev *pcdev = data; | ||
1218 | unsigned int status = readl(pcdev->base_emma + PRP_INTRSTATUS); | ||
1219 | struct mx2_buffer *buf; | ||
1220 | |||
1221 | if (status & (1 << 7)) { /* overflow */ | ||
1222 | u32 cntl; | ||
1223 | /* | ||
1224 | * We only disable channel 1 here since this is the only | ||
1225 | * enabled channel | ||
1226 | * | ||
1227 | * FIXME: the correct DMA overflow handling should be resetting | ||
1228 | * the buffer, returning an error frame, and continuing with | ||
1229 | * the next one. | ||
1230 | */ | ||
1231 | cntl = readl(pcdev->base_emma + PRP_CNTL); | ||
1232 | writel(cntl & ~PRP_CNTL_CH1EN, pcdev->base_emma + PRP_CNTL); | ||
1233 | writel(cntl, pcdev->base_emma + PRP_CNTL); | ||
1234 | } | ||
1235 | if ((status & (3 << 5)) == (3 << 5) | ||
1236 | && !list_empty(&pcdev->active_bufs)) { | ||
1237 | /* | ||
1238 | * Both buffers have triggered, process the one we're expecting | ||
1239 | * to first | ||
1240 | */ | ||
1241 | buf = list_entry(pcdev->active_bufs.next, | ||
1242 | struct mx2_buffer, vb.queue); | ||
1243 | mx27_camera_frame_done_emma(pcdev, buf->bufnum, VIDEOBUF_DONE); | ||
1244 | status &= ~(1 << (6 - buf->bufnum)); /* mark processed */ | ||
1245 | } | ||
1246 | if (status & (1 << 6)) | ||
1247 | mx27_camera_frame_done_emma(pcdev, 0, VIDEOBUF_DONE); | ||
1248 | if (status & (1 << 5)) | ||
1249 | mx27_camera_frame_done_emma(pcdev, 1, VIDEOBUF_DONE); | ||
1250 | |||
1251 | writel(status, pcdev->base_emma + PRP_INTRSTATUS); | ||
1252 | |||
1253 | return IRQ_HANDLED; | ||
1254 | } | ||
1255 | |||
1256 | static int __devinit mx27_camera_emma_init(struct mx2_camera_dev *pcdev) | ||
1257 | { | ||
1258 | struct resource *res_emma = pcdev->res_emma; | ||
1259 | int err = 0; | ||
1260 | |||
1261 | if (!request_mem_region(res_emma->start, resource_size(res_emma), | ||
1262 | MX2_CAM_DRV_NAME)) { | ||
1263 | err = -EBUSY; | ||
1264 | goto out; | ||
1265 | } | ||
1266 | |||
1267 | pcdev->base_emma = ioremap(res_emma->start, resource_size(res_emma)); | ||
1268 | if (!pcdev->base_emma) { | ||
1269 | err = -ENOMEM; | ||
1270 | goto exit_release; | ||
1271 | } | ||
1272 | |||
1273 | err = request_irq(pcdev->irq_emma, mx27_camera_emma_irq, 0, | ||
1274 | MX2_CAM_DRV_NAME, pcdev); | ||
1275 | if (err) { | ||
1276 | dev_err(pcdev->dev, "Camera EMMA interrupt register failed \n"); | ||
1277 | goto exit_iounmap; | ||
1278 | } | ||
1279 | |||
1280 | pcdev->clk_emma = clk_get(NULL, "emma"); | ||
1281 | if (IS_ERR(pcdev->clk_emma)) { | ||
1282 | err = PTR_ERR(pcdev->clk_emma); | ||
1283 | goto exit_free_irq; | ||
1284 | } | ||
1285 | |||
1286 | clk_enable(pcdev->clk_emma); | ||
1287 | |||
1288 | err = mx27_camera_emma_prp_reset(pcdev); | ||
1289 | if (err) | ||
1290 | goto exit_clk_emma_put; | ||
1291 | |||
1292 | return err; | ||
1293 | |||
1294 | exit_clk_emma_put: | ||
1295 | clk_disable(pcdev->clk_emma); | ||
1296 | clk_put(pcdev->clk_emma); | ||
1297 | exit_free_irq: | ||
1298 | free_irq(pcdev->irq_emma, pcdev); | ||
1299 | exit_iounmap: | ||
1300 | iounmap(pcdev->base_emma); | ||
1301 | exit_release: | ||
1302 | release_mem_region(res_emma->start, resource_size(res_emma)); | ||
1303 | out: | ||
1304 | return err; | ||
1305 | } | ||
1306 | |||
1307 | static int __devinit mx2_camera_probe(struct platform_device *pdev) | ||
1308 | { | ||
1309 | struct mx2_camera_dev *pcdev; | ||
1310 | struct resource *res_csi, *res_emma; | ||
1311 | void __iomem *base_csi; | ||
1312 | int irq_csi, irq_emma; | ||
1313 | irq_handler_t mx2_cam_irq_handler = cpu_is_mx25() ? mx25_camera_irq | ||
1314 | : mx27_camera_irq; | ||
1315 | int err = 0; | ||
1316 | |||
1317 | dev_dbg(&pdev->dev, "initialising\n"); | ||
1318 | |||
1319 | res_csi = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1320 | irq_csi = platform_get_irq(pdev, 0); | ||
1321 | if (res_csi == NULL || irq_csi < 0) { | ||
1322 | dev_err(&pdev->dev, "Missing platform resources data\n"); | ||
1323 | err = -ENODEV; | ||
1324 | goto exit; | ||
1325 | } | ||
1326 | |||
1327 | pcdev = kzalloc(sizeof(*pcdev), GFP_KERNEL); | ||
1328 | if (!pcdev) { | ||
1329 | dev_err(&pdev->dev, "Could not allocate pcdev\n"); | ||
1330 | err = -ENOMEM; | ||
1331 | goto exit; | ||
1332 | } | ||
1333 | |||
1334 | pcdev->clk_csi = clk_get(&pdev->dev, NULL); | ||
1335 | if (IS_ERR(pcdev->clk_csi)) { | ||
1336 | err = PTR_ERR(pcdev->clk_csi); | ||
1337 | goto exit_kfree; | ||
1338 | } | ||
1339 | |||
1340 | dev_dbg(&pdev->dev, "Camera clock frequency: %ld\n", | ||
1341 | clk_get_rate(pcdev->clk_csi)); | ||
1342 | |||
1343 | /* Initialize DMA */ | ||
1344 | #ifdef CONFIG_MACH_MX27 | ||
1345 | if (cpu_is_mx27()) { | ||
1346 | err = mx27_camera_dma_init(pdev, pcdev); | ||
1347 | if (err) | ||
1348 | goto exit_clk_put; | ||
1349 | } | ||
1350 | #endif /* CONFIG_MACH_MX27 */ | ||
1351 | |||
1352 | pcdev->res_csi = res_csi; | ||
1353 | pcdev->pdata = pdev->dev.platform_data; | ||
1354 | if (pcdev->pdata) { | ||
1355 | long rate; | ||
1356 | |||
1357 | pcdev->platform_flags = pcdev->pdata->flags; | ||
1358 | |||
1359 | rate = clk_round_rate(pcdev->clk_csi, pcdev->pdata->clk * 2); | ||
1360 | if (rate <= 0) { | ||
1361 | err = -ENODEV; | ||
1362 | goto exit_dma_free; | ||
1363 | } | ||
1364 | err = clk_set_rate(pcdev->clk_csi, rate); | ||
1365 | if (err < 0) | ||
1366 | goto exit_dma_free; | ||
1367 | } | ||
1368 | |||
1369 | INIT_LIST_HEAD(&pcdev->capture); | ||
1370 | INIT_LIST_HEAD(&pcdev->active_bufs); | ||
1371 | spin_lock_init(&pcdev->lock); | ||
1372 | |||
1373 | /* | ||
1374 | * Request the regions. | ||
1375 | */ | ||
1376 | if (!request_mem_region(res_csi->start, resource_size(res_csi), | ||
1377 | MX2_CAM_DRV_NAME)) { | ||
1378 | err = -EBUSY; | ||
1379 | goto exit_dma_free; | ||
1380 | } | ||
1381 | |||
1382 | base_csi = ioremap(res_csi->start, resource_size(res_csi)); | ||
1383 | if (!base_csi) { | ||
1384 | err = -ENOMEM; | ||
1385 | goto exit_release; | ||
1386 | } | ||
1387 | pcdev->irq_csi = irq_csi; | ||
1388 | pcdev->base_csi = base_csi; | ||
1389 | pcdev->base_dma = res_csi->start; | ||
1390 | pcdev->dev = &pdev->dev; | ||
1391 | |||
1392 | err = request_irq(pcdev->irq_csi, mx2_cam_irq_handler, 0, | ||
1393 | MX2_CAM_DRV_NAME, pcdev); | ||
1394 | if (err) { | ||
1395 | dev_err(pcdev->dev, "Camera interrupt register failed \n"); | ||
1396 | goto exit_iounmap; | ||
1397 | } | ||
1398 | |||
1399 | if (cpu_is_mx27()) { | ||
1400 | /* EMMA support */ | ||
1401 | res_emma = platform_get_resource(pdev, IORESOURCE_MEM, 1); | ||
1402 | irq_emma = platform_get_irq(pdev, 1); | ||
1403 | |||
1404 | if (res_emma && irq_emma >= 0) { | ||
1405 | dev_info(&pdev->dev, "Using EMMA\n"); | ||
1406 | pcdev->use_emma = 1; | ||
1407 | pcdev->res_emma = res_emma; | ||
1408 | pcdev->irq_emma = irq_emma; | ||
1409 | if (mx27_camera_emma_init(pcdev)) | ||
1410 | goto exit_free_irq; | ||
1411 | } | ||
1412 | } | ||
1413 | |||
1414 | pcdev->soc_host.drv_name = MX2_CAM_DRV_NAME, | ||
1415 | pcdev->soc_host.ops = &mx2_soc_camera_host_ops, | ||
1416 | pcdev->soc_host.priv = pcdev; | ||
1417 | pcdev->soc_host.v4l2_dev.dev = &pdev->dev; | ||
1418 | pcdev->soc_host.nr = pdev->id; | ||
1419 | err = soc_camera_host_register(&pcdev->soc_host); | ||
1420 | if (err) | ||
1421 | goto exit_free_emma; | ||
1422 | |||
1423 | return 0; | ||
1424 | |||
1425 | exit_free_emma: | ||
1426 | if (mx27_camera_emma(pcdev)) { | ||
1427 | free_irq(pcdev->irq_emma, pcdev); | ||
1428 | clk_disable(pcdev->clk_emma); | ||
1429 | clk_put(pcdev->clk_emma); | ||
1430 | iounmap(pcdev->base_emma); | ||
1431 | release_mem_region(res_emma->start, resource_size(res_emma)); | ||
1432 | } | ||
1433 | exit_free_irq: | ||
1434 | free_irq(pcdev->irq_csi, pcdev); | ||
1435 | exit_iounmap: | ||
1436 | iounmap(base_csi); | ||
1437 | exit_release: | ||
1438 | release_mem_region(res_csi->start, resource_size(res_csi)); | ||
1439 | exit_dma_free: | ||
1440 | #ifdef CONFIG_MACH_MX27 | ||
1441 | if (cpu_is_mx27()) | ||
1442 | imx_dma_free(pcdev->dma); | ||
1443 | exit_clk_put: | ||
1444 | clk_put(pcdev->clk_csi); | ||
1445 | #endif /* CONFIG_MACH_MX27 */ | ||
1446 | exit_kfree: | ||
1447 | kfree(pcdev); | ||
1448 | exit: | ||
1449 | return err; | ||
1450 | } | ||
1451 | |||
1452 | static int __devexit mx2_camera_remove(struct platform_device *pdev) | ||
1453 | { | ||
1454 | struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev); | ||
1455 | struct mx2_camera_dev *pcdev = container_of(soc_host, | ||
1456 | struct mx2_camera_dev, soc_host); | ||
1457 | struct resource *res; | ||
1458 | |||
1459 | clk_put(pcdev->clk_csi); | ||
1460 | #ifdef CONFIG_MACH_MX27 | ||
1461 | if (cpu_is_mx27()) | ||
1462 | imx_dma_free(pcdev->dma); | ||
1463 | #endif /* CONFIG_MACH_MX27 */ | ||
1464 | free_irq(pcdev->irq_csi, pcdev); | ||
1465 | if (mx27_camera_emma(pcdev)) | ||
1466 | free_irq(pcdev->irq_emma, pcdev); | ||
1467 | |||
1468 | soc_camera_host_unregister(&pcdev->soc_host); | ||
1469 | |||
1470 | iounmap(pcdev->base_csi); | ||
1471 | |||
1472 | if (mx27_camera_emma(pcdev)) { | ||
1473 | clk_disable(pcdev->clk_emma); | ||
1474 | clk_put(pcdev->clk_emma); | ||
1475 | iounmap(pcdev->base_emma); | ||
1476 | res = pcdev->res_emma; | ||
1477 | release_mem_region(res->start, resource_size(res)); | ||
1478 | } | ||
1479 | |||
1480 | res = pcdev->res_csi; | ||
1481 | release_mem_region(res->start, resource_size(res)); | ||
1482 | |||
1483 | kfree(pcdev); | ||
1484 | |||
1485 | dev_info(&pdev->dev, "MX2 Camera driver unloaded\n"); | ||
1486 | |||
1487 | return 0; | ||
1488 | } | ||
1489 | |||
1490 | static struct platform_driver mx2_camera_driver = { | ||
1491 | .driver = { | ||
1492 | .name = MX2_CAM_DRV_NAME, | ||
1493 | }, | ||
1494 | .remove = __devexit_p(mx2_camera_remove), | ||
1495 | }; | ||
1496 | |||
1497 | |||
1498 | static int __init mx2_camera_init(void) | ||
1499 | { | ||
1500 | return platform_driver_probe(&mx2_camera_driver, &mx2_camera_probe); | ||
1501 | } | ||
1502 | |||
1503 | static void __exit mx2_camera_exit(void) | ||
1504 | { | ||
1505 | return platform_driver_unregister(&mx2_camera_driver); | ||
1506 | } | ||
1507 | |||
1508 | module_init(mx2_camera_init); | ||
1509 | module_exit(mx2_camera_exit); | ||
1510 | |||
1511 | MODULE_DESCRIPTION("i.MX27/i.MX25 SoC Camera Host driver"); | ||
1512 | MODULE_AUTHOR("Sascha Hauer <sha@pengutronix.de>"); | ||
1513 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 26386a92f5aa..9b089dfb173e 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig | |||
@@ -353,6 +353,16 @@ config VMWARE_BALLOON | |||
353 | To compile this driver as a module, choose M here: the | 353 | To compile this driver as a module, choose M here: the |
354 | module will be called vmware_balloon. | 354 | module will be called vmware_balloon. |
355 | 355 | ||
356 | config ARM_CHARLCD | ||
357 | bool "ARM Ltd. Character LCD Driver" | ||
358 | depends on PLAT_VERSATILE | ||
359 | help | ||
360 | This is a driver for the character LCD found on the ARM Ltd. | ||
361 | Versatile and RealView Platform Baseboards. It doesn't do | ||
362 | very much more than display the text "ARM Linux" on the first | ||
363 | line and the Linux version on the second line, but that's | ||
364 | still useful. | ||
365 | |||
356 | source "drivers/misc/c2port/Kconfig" | 366 | source "drivers/misc/c2port/Kconfig" |
357 | source "drivers/misc/eeprom/Kconfig" | 367 | source "drivers/misc/eeprom/Kconfig" |
358 | source "drivers/misc/cb710/Kconfig" | 368 | source "drivers/misc/cb710/Kconfig" |
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile index 6ed06a19474a..67552d6e9327 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile | |||
@@ -31,3 +31,4 @@ obj-$(CONFIG_IWMC3200TOP) += iwmc3200top/ | |||
31 | obj-y += eeprom/ | 31 | obj-y += eeprom/ |
32 | obj-y += cb710/ | 32 | obj-y += cb710/ |
33 | obj-$(CONFIG_VMWARE_BALLOON) += vmware_balloon.o | 33 | obj-$(CONFIG_VMWARE_BALLOON) += vmware_balloon.o |
34 | obj-$(CONFIG_ARM_CHARLCD) += arm-charlcd.o | ||
diff --git a/drivers/misc/arm-charlcd.c b/drivers/misc/arm-charlcd.c new file mode 100644 index 000000000000..9e3879ef58f2 --- /dev/null +++ b/drivers/misc/arm-charlcd.c | |||
@@ -0,0 +1,396 @@ | |||
1 | /* | ||
2 | * Driver for the on-board character LCD found on some ARM reference boards | ||
3 | * This is basically an Hitachi HD44780 LCD with a custom IP block to drive it | ||
4 | * http://en.wikipedia.org/wiki/HD44780_Character_LCD | ||
5 | * Currently it will just display the text "ARM Linux" and the linux version | ||
6 | * | ||
7 | * License terms: GNU General Public License (GPL) version 2 | ||
8 | * Author: Linus Walleij <triad@df.lth.se> | ||
9 | */ | ||
10 | #include <linux/init.h> | ||
11 | #include <linux/module.h> | ||
12 | #include <linux/interrupt.h> | ||
13 | #include <linux/platform_device.h> | ||
14 | #include <linux/completion.h> | ||
15 | #include <linux/delay.h> | ||
16 | #include <linux/io.h> | ||
17 | #include <linux/slab.h> | ||
18 | #include <linux/workqueue.h> | ||
19 | #include <generated/utsrelease.h> | ||
20 | |||
21 | #define DRIVERNAME "arm-charlcd" | ||
22 | #define CHARLCD_TIMEOUT (msecs_to_jiffies(1000)) | ||
23 | |||
24 | /* Offsets to registers */ | ||
25 | #define CHAR_COM 0x00U | ||
26 | #define CHAR_DAT 0x04U | ||
27 | #define CHAR_RD 0x08U | ||
28 | #define CHAR_RAW 0x0CU | ||
29 | #define CHAR_MASK 0x10U | ||
30 | #define CHAR_STAT 0x14U | ||
31 | |||
32 | #define CHAR_RAW_CLEAR 0x00000000U | ||
33 | #define CHAR_RAW_VALID 0x00000100U | ||
34 | |||
35 | /* Hitachi HD44780 display commands */ | ||
36 | #define HD_CLEAR 0x01U | ||
37 | #define HD_HOME 0x02U | ||
38 | #define HD_ENTRYMODE 0x04U | ||
39 | #define HD_ENTRYMODE_INCREMENT 0x02U | ||
40 | #define HD_ENTRYMODE_SHIFT 0x01U | ||
41 | #define HD_DISPCTRL 0x08U | ||
42 | #define HD_DISPCTRL_ON 0x04U | ||
43 | #define HD_DISPCTRL_CURSOR_ON 0x02U | ||
44 | #define HD_DISPCTRL_CURSOR_BLINK 0x01U | ||
45 | #define HD_CRSR_SHIFT 0x10U | ||
46 | #define HD_CRSR_SHIFT_DISPLAY 0x08U | ||
47 | #define HD_CRSR_SHIFT_DISPLAY_RIGHT 0x04U | ||
48 | #define HD_FUNCSET 0x20U | ||
49 | #define HD_FUNCSET_8BIT 0x10U | ||
50 | #define HD_FUNCSET_2_LINES 0x08U | ||
51 | #define HD_FUNCSET_FONT_5X10 0x04U | ||
52 | #define HD_SET_CGRAM 0x40U | ||
53 | #define HD_SET_DDRAM 0x80U | ||
54 | #define HD_BUSY_FLAG 0x80U | ||
55 | |||
56 | /** | ||
57 | * @dev: a pointer back to containing device | ||
58 | * @phybase: the offset to the controller in physical memory | ||
59 | * @physize: the size of the physical page | ||
60 | * @virtbase: the offset to the controller in virtual memory | ||
61 | * @irq: reserved interrupt number | ||
62 | * @complete: completion structure for the last LCD command | ||
63 | */ | ||
64 | struct charlcd { | ||
65 | struct device *dev; | ||
66 | u32 phybase; | ||
67 | u32 physize; | ||
68 | void __iomem *virtbase; | ||
69 | int irq; | ||
70 | struct completion complete; | ||
71 | struct delayed_work init_work; | ||
72 | }; | ||
73 | |||
74 | static irqreturn_t charlcd_interrupt(int irq, void *data) | ||
75 | { | ||
76 | struct charlcd *lcd = data; | ||
77 | u8 status; | ||
78 | |||
79 | status = readl(lcd->virtbase + CHAR_STAT) & 0x01; | ||
80 | /* Clear IRQ */ | ||
81 | writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); | ||
82 | if (status) | ||
83 | complete(&lcd->complete); | ||
84 | else | ||
85 | dev_info(lcd->dev, "Spurious IRQ (%02x)\n", status); | ||
86 | return IRQ_HANDLED; | ||
87 | } | ||
88 | |||
89 | |||
90 | static void charlcd_wait_complete_irq(struct charlcd *lcd) | ||
91 | { | ||
92 | int ret; | ||
93 | |||
94 | ret = wait_for_completion_interruptible_timeout(&lcd->complete, | ||
95 | CHARLCD_TIMEOUT); | ||
96 | /* Disable IRQ after completion */ | ||
97 | writel(0x00, lcd->virtbase + CHAR_MASK); | ||
98 | |||
99 | if (ret < 0) { | ||
100 | dev_err(lcd->dev, | ||
101 | "wait_for_completion_interruptible_timeout() " | ||
102 | "returned %d waiting for ready\n", ret); | ||
103 | return; | ||
104 | } | ||
105 | |||
106 | if (ret == 0) { | ||
107 | dev_err(lcd->dev, "charlcd controller timed out " | ||
108 | "waiting for ready\n"); | ||
109 | return; | ||
110 | } | ||
111 | } | ||
112 | |||
113 | static u8 charlcd_4bit_read_char(struct charlcd *lcd) | ||
114 | { | ||
115 | u8 data; | ||
116 | u32 val; | ||
117 | int i; | ||
118 | |||
119 | /* If we can, use an IRQ to wait for the data, else poll */ | ||
120 | if (lcd->irq >= 0) | ||
121 | charlcd_wait_complete_irq(lcd); | ||
122 | else { | ||
123 | i = 0; | ||
124 | val = 0; | ||
125 | while (!(val & CHAR_RAW_VALID) && i < 10) { | ||
126 | udelay(100); | ||
127 | val = readl(lcd->virtbase + CHAR_RAW); | ||
128 | i++; | ||
129 | } | ||
130 | |||
131 | writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); | ||
132 | } | ||
133 | msleep(1); | ||
134 | |||
135 | /* Read the 4 high bits of the data */ | ||
136 | data = readl(lcd->virtbase + CHAR_RD) & 0xf0; | ||
137 | |||
138 | /* | ||
139 | * The second read for the low bits does not trigger an IRQ | ||
140 | * so in this case we have to poll for the 4 lower bits | ||
141 | */ | ||
142 | i = 0; | ||
143 | val = 0; | ||
144 | while (!(val & CHAR_RAW_VALID) && i < 10) { | ||
145 | udelay(100); | ||
146 | val = readl(lcd->virtbase + CHAR_RAW); | ||
147 | i++; | ||
148 | } | ||
149 | writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); | ||
150 | msleep(1); | ||
151 | |||
152 | /* Read the 4 low bits of the data */ | ||
153 | data |= (readl(lcd->virtbase + CHAR_RD) >> 4) & 0x0f; | ||
154 | |||
155 | return data; | ||
156 | } | ||
157 | |||
158 | static bool charlcd_4bit_read_bf(struct charlcd *lcd) | ||
159 | { | ||
160 | if (lcd->irq >= 0) { | ||
161 | /* | ||
162 | * If we'll use IRQs to wait for the busyflag, clear any | ||
163 | * pending flag and enable IRQ | ||
164 | */ | ||
165 | writel(CHAR_RAW_CLEAR, lcd->virtbase + CHAR_RAW); | ||
166 | init_completion(&lcd->complete); | ||
167 | writel(0x01, lcd->virtbase + CHAR_MASK); | ||
168 | } | ||
169 | readl(lcd->virtbase + CHAR_COM); | ||
170 | return charlcd_4bit_read_char(lcd) & HD_BUSY_FLAG ? true : false; | ||
171 | } | ||
172 | |||
173 | static void charlcd_4bit_wait_busy(struct charlcd *lcd) | ||
174 | { | ||
175 | int retries = 50; | ||
176 | |||
177 | udelay(100); | ||
178 | while (charlcd_4bit_read_bf(lcd) && retries) | ||
179 | retries--; | ||
180 | if (!retries) | ||
181 | dev_err(lcd->dev, "timeout waiting for busyflag\n"); | ||
182 | } | ||
183 | |||
184 | static void charlcd_4bit_command(struct charlcd *lcd, u8 cmd) | ||
185 | { | ||
186 | u32 cmdlo = (cmd << 4) & 0xf0; | ||
187 | u32 cmdhi = (cmd & 0xf0); | ||
188 | |||
189 | writel(cmdhi, lcd->virtbase + CHAR_COM); | ||
190 | udelay(10); | ||
191 | writel(cmdlo, lcd->virtbase + CHAR_COM); | ||
192 | charlcd_4bit_wait_busy(lcd); | ||
193 | } | ||
194 | |||
195 | static void charlcd_4bit_char(struct charlcd *lcd, u8 ch) | ||
196 | { | ||
197 | u32 chlo = (ch << 4) & 0xf0; | ||
198 | u32 chhi = (ch & 0xf0); | ||
199 | |||
200 | writel(chhi, lcd->virtbase + CHAR_DAT); | ||
201 | udelay(10); | ||
202 | writel(chlo, lcd->virtbase + CHAR_DAT); | ||
203 | charlcd_4bit_wait_busy(lcd); | ||
204 | } | ||
205 | |||
206 | static void charlcd_4bit_print(struct charlcd *lcd, int line, const char *str) | ||
207 | { | ||
208 | u8 offset; | ||
209 | int i; | ||
210 | |||
211 | /* | ||
212 | * We support line 0, 1 | ||
213 | * Line 1 runs from 0x00..0x27 | ||
214 | * Line 2 runs from 0x28..0x4f | ||
215 | */ | ||
216 | if (line == 0) | ||
217 | offset = 0; | ||
218 | else if (line == 1) | ||
219 | offset = 0x28; | ||
220 | else | ||
221 | return; | ||
222 | |||
223 | /* Set offset */ | ||
224 | charlcd_4bit_command(lcd, HD_SET_DDRAM | offset); | ||
225 | |||
226 | /* Send string */ | ||
227 | for (i = 0; i < strlen(str) && i < 0x28; i++) | ||
228 | charlcd_4bit_char(lcd, str[i]); | ||
229 | } | ||
230 | |||
231 | static void charlcd_4bit_init(struct charlcd *lcd) | ||
232 | { | ||
233 | /* These commands cannot be checked with the busy flag */ | ||
234 | writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM); | ||
235 | msleep(5); | ||
236 | writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM); | ||
237 | udelay(100); | ||
238 | writel(HD_FUNCSET | HD_FUNCSET_8BIT, lcd->virtbase + CHAR_COM); | ||
239 | udelay(100); | ||
240 | /* Go to 4bit mode */ | ||
241 | writel(HD_FUNCSET, lcd->virtbase + CHAR_COM); | ||
242 | udelay(100); | ||
243 | /* | ||
244 | * 4bit mode, 2 lines, 5x8 font, after this the number of lines | ||
245 | * and the font cannot be changed until the next initialization sequence | ||
246 | */ | ||
247 | charlcd_4bit_command(lcd, HD_FUNCSET | HD_FUNCSET_2_LINES); | ||
248 | charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON); | ||
249 | charlcd_4bit_command(lcd, HD_ENTRYMODE | HD_ENTRYMODE_INCREMENT); | ||
250 | charlcd_4bit_command(lcd, HD_CLEAR); | ||
251 | charlcd_4bit_command(lcd, HD_HOME); | ||
252 | /* Put something useful in the display */ | ||
253 | charlcd_4bit_print(lcd, 0, "ARM Linux"); | ||
254 | charlcd_4bit_print(lcd, 1, UTS_RELEASE); | ||
255 | } | ||
256 | |||
257 | static void charlcd_init_work(struct work_struct *work) | ||
258 | { | ||
259 | struct charlcd *lcd = | ||
260 | container_of(work, struct charlcd, init_work.work); | ||
261 | |||
262 | charlcd_4bit_init(lcd); | ||
263 | } | ||
264 | |||
265 | static int __init charlcd_probe(struct platform_device *pdev) | ||
266 | { | ||
267 | int ret; | ||
268 | struct charlcd *lcd; | ||
269 | struct resource *res; | ||
270 | |||
271 | lcd = kzalloc(sizeof(struct charlcd), GFP_KERNEL); | ||
272 | if (!lcd) | ||
273 | return -ENOMEM; | ||
274 | |||
275 | lcd->dev = &pdev->dev; | ||
276 | |||
277 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
278 | if (!res) { | ||
279 | ret = -ENOENT; | ||
280 | goto out_no_resource; | ||
281 | } | ||
282 | lcd->phybase = res->start; | ||
283 | lcd->physize = resource_size(res); | ||
284 | |||
285 | if (request_mem_region(lcd->phybase, lcd->physize, | ||
286 | DRIVERNAME) == NULL) { | ||
287 | ret = -EBUSY; | ||
288 | goto out_no_memregion; | ||
289 | } | ||
290 | |||
291 | lcd->virtbase = ioremap(lcd->phybase, lcd->physize); | ||
292 | if (!lcd->virtbase) { | ||
293 | ret = -ENOMEM; | ||
294 | goto out_no_remap; | ||
295 | } | ||
296 | |||
297 | lcd->irq = platform_get_irq(pdev, 0); | ||
298 | /* If no IRQ is supplied, we'll survive without it */ | ||
299 | if (lcd->irq >= 0) { | ||
300 | if (request_irq(lcd->irq, charlcd_interrupt, IRQF_DISABLED, | ||
301 | DRIVERNAME, lcd)) { | ||
302 | ret = -EIO; | ||
303 | goto out_no_irq; | ||
304 | } | ||
305 | } | ||
306 | |||
307 | platform_set_drvdata(pdev, lcd); | ||
308 | |||
309 | /* | ||
310 | * Initialize the display in a delayed work, because | ||
311 | * it is VERY slow and would slow down the boot of the system. | ||
312 | */ | ||
313 | INIT_DELAYED_WORK(&lcd->init_work, charlcd_init_work); | ||
314 | schedule_delayed_work(&lcd->init_work, 0); | ||
315 | |||
316 | dev_info(&pdev->dev, "initalized ARM character LCD at %08x\n", | ||
317 | lcd->phybase); | ||
318 | |||
319 | return 0; | ||
320 | |||
321 | out_no_irq: | ||
322 | iounmap(lcd->virtbase); | ||
323 | out_no_remap: | ||
324 | platform_set_drvdata(pdev, NULL); | ||
325 | out_no_memregion: | ||
326 | release_mem_region(lcd->phybase, SZ_4K); | ||
327 | out_no_resource: | ||
328 | kfree(lcd); | ||
329 | return ret; | ||
330 | } | ||
331 | |||
332 | static int __exit charlcd_remove(struct platform_device *pdev) | ||
333 | { | ||
334 | struct charlcd *lcd = platform_get_drvdata(pdev); | ||
335 | |||
336 | if (lcd) { | ||
337 | free_irq(lcd->irq, lcd); | ||
338 | iounmap(lcd->virtbase); | ||
339 | release_mem_region(lcd->phybase, lcd->physize); | ||
340 | platform_set_drvdata(pdev, NULL); | ||
341 | kfree(lcd); | ||
342 | } | ||
343 | |||
344 | return 0; | ||
345 | } | ||
346 | |||
347 | static int charlcd_suspend(struct device *dev) | ||
348 | { | ||
349 | struct platform_device *pdev = to_platform_device(dev); | ||
350 | struct charlcd *lcd = platform_get_drvdata(pdev); | ||
351 | |||
352 | /* Power the display off */ | ||
353 | charlcd_4bit_command(lcd, HD_DISPCTRL); | ||
354 | return 0; | ||
355 | } | ||
356 | |||
357 | static int charlcd_resume(struct device *dev) | ||
358 | { | ||
359 | struct platform_device *pdev = to_platform_device(dev); | ||
360 | struct charlcd *lcd = platform_get_drvdata(pdev); | ||
361 | |||
362 | /* Turn the display back on */ | ||
363 | charlcd_4bit_command(lcd, HD_DISPCTRL | HD_DISPCTRL_ON); | ||
364 | return 0; | ||
365 | } | ||
366 | |||
367 | static const struct dev_pm_ops charlcd_pm_ops = { | ||
368 | .suspend = charlcd_suspend, | ||
369 | .resume = charlcd_resume, | ||
370 | }; | ||
371 | |||
372 | static struct platform_driver charlcd_driver = { | ||
373 | .driver = { | ||
374 | .name = DRIVERNAME, | ||
375 | .owner = THIS_MODULE, | ||
376 | .pm = &charlcd_pm_ops, | ||
377 | }, | ||
378 | .remove = __exit_p(charlcd_remove), | ||
379 | }; | ||
380 | |||
381 | static int __init charlcd_init(void) | ||
382 | { | ||
383 | return platform_driver_probe(&charlcd_driver, charlcd_probe); | ||
384 | } | ||
385 | |||
386 | static void __exit charlcd_exit(void) | ||
387 | { | ||
388 | platform_driver_unregister(&charlcd_driver); | ||
389 | } | ||
390 | |||
391 | module_init(charlcd_init); | ||
392 | module_exit(charlcd_exit); | ||
393 | |||
394 | MODULE_AUTHOR("Linus Walleij <triad@df.lth.se>"); | ||
395 | MODULE_DESCRIPTION("ARM Character LCD Driver"); | ||
396 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index 2ed435bd4b6c..840b301b5671 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c | |||
@@ -26,7 +26,6 @@ | |||
26 | #include <linux/amba/mmci.h> | 26 | #include <linux/amba/mmci.h> |
27 | #include <linux/regulator/consumer.h> | 27 | #include <linux/regulator/consumer.h> |
28 | 28 | ||
29 | #include <asm/cacheflush.h> | ||
30 | #include <asm/div64.h> | 29 | #include <asm/div64.h> |
31 | #include <asm/io.h> | 30 | #include <asm/io.h> |
32 | #include <asm/sizes.h> | 31 | #include <asm/sizes.h> |
@@ -37,12 +36,39 @@ | |||
37 | 36 | ||
38 | static unsigned int fmax = 515633; | 37 | static unsigned int fmax = 515633; |
39 | 38 | ||
39 | /** | ||
40 | * struct variant_data - MMCI variant-specific quirks | ||
41 | * @clkreg: default value for MCICLOCK register | ||
42 | * @clkreg_enable: enable value for MMCICLOCK register | ||
43 | * @datalength_bits: number of bits in the MMCIDATALENGTH register | ||
44 | */ | ||
45 | struct variant_data { | ||
46 | unsigned int clkreg; | ||
47 | unsigned int clkreg_enable; | ||
48 | unsigned int datalength_bits; | ||
49 | }; | ||
50 | |||
51 | static struct variant_data variant_arm = { | ||
52 | .datalength_bits = 16, | ||
53 | }; | ||
54 | |||
55 | static struct variant_data variant_u300 = { | ||
56 | .clkreg_enable = 1 << 13, /* HWFCEN */ | ||
57 | .datalength_bits = 16, | ||
58 | }; | ||
59 | |||
60 | static struct variant_data variant_ux500 = { | ||
61 | .clkreg = MCI_CLK_ENABLE, | ||
62 | .clkreg_enable = 1 << 14, /* HWFCEN */ | ||
63 | .datalength_bits = 24, | ||
64 | }; | ||
40 | /* | 65 | /* |
41 | * This must be called with host->lock held | 66 | * This must be called with host->lock held |
42 | */ | 67 | */ |
43 | static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) | 68 | static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) |
44 | { | 69 | { |
45 | u32 clk = 0; | 70 | struct variant_data *variant = host->variant; |
71 | u32 clk = variant->clkreg; | ||
46 | 72 | ||
47 | if (desired) { | 73 | if (desired) { |
48 | if (desired >= host->mclk) { | 74 | if (desired >= host->mclk) { |
@@ -54,8 +80,8 @@ static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) | |||
54 | clk = 255; | 80 | clk = 255; |
55 | host->cclk = host->mclk / (2 * (clk + 1)); | 81 | host->cclk = host->mclk / (2 * (clk + 1)); |
56 | } | 82 | } |
57 | if (host->hw_designer == AMBA_VENDOR_ST) | 83 | |
58 | clk |= MCI_ST_FCEN; /* Bug fix in ST IP block */ | 84 | clk |= variant->clkreg_enable; |
59 | clk |= MCI_CLK_ENABLE; | 85 | clk |= MCI_CLK_ENABLE; |
60 | /* This hasn't proven to be worthwhile */ | 86 | /* This hasn't proven to be worthwhile */ |
61 | /* clk |= MCI_CLK_PWRSAVE; */ | 87 | /* clk |= MCI_CLK_PWRSAVE; */ |
@@ -98,6 +124,18 @@ static void mmci_stop_data(struct mmci_host *host) | |||
98 | host->data = NULL; | 124 | host->data = NULL; |
99 | } | 125 | } |
100 | 126 | ||
127 | static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) | ||
128 | { | ||
129 | unsigned int flags = SG_MITER_ATOMIC; | ||
130 | |||
131 | if (data->flags & MMC_DATA_READ) | ||
132 | flags |= SG_MITER_TO_SG; | ||
133 | else | ||
134 | flags |= SG_MITER_FROM_SG; | ||
135 | |||
136 | sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); | ||
137 | } | ||
138 | |||
101 | static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) | 139 | static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) |
102 | { | 140 | { |
103 | unsigned int datactrl, timeout, irqmask; | 141 | unsigned int datactrl, timeout, irqmask; |
@@ -109,7 +147,7 @@ static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) | |||
109 | data->blksz, data->blocks, data->flags); | 147 | data->blksz, data->blocks, data->flags); |
110 | 148 | ||
111 | host->data = data; | 149 | host->data = data; |
112 | host->size = data->blksz; | 150 | host->size = data->blksz * data->blocks; |
113 | host->data_xfered = 0; | 151 | host->data_xfered = 0; |
114 | 152 | ||
115 | mmci_init_sg(host, data); | 153 | mmci_init_sg(host, data); |
@@ -210,8 +248,17 @@ mmci_data_irq(struct mmci_host *host, struct mmc_data *data, | |||
210 | * We hit an error condition. Ensure that any data | 248 | * We hit an error condition. Ensure that any data |
211 | * partially written to a page is properly coherent. | 249 | * partially written to a page is properly coherent. |
212 | */ | 250 | */ |
213 | if (host->sg_len && data->flags & MMC_DATA_READ) | 251 | if (data->flags & MMC_DATA_READ) { |
214 | flush_dcache_page(sg_page(host->sg_ptr)); | 252 | struct sg_mapping_iter *sg_miter = &host->sg_miter; |
253 | unsigned long flags; | ||
254 | |||
255 | local_irq_save(flags); | ||
256 | if (sg_miter_next(sg_miter)) { | ||
257 | flush_dcache_page(sg_miter->page); | ||
258 | sg_miter_stop(sg_miter); | ||
259 | } | ||
260 | local_irq_restore(flags); | ||
261 | } | ||
215 | } | 262 | } |
216 | if (status & MCI_DATAEND) { | 263 | if (status & MCI_DATAEND) { |
217 | mmci_stop_data(host); | 264 | mmci_stop_data(host); |
@@ -314,15 +361,18 @@ static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int rem | |||
314 | static irqreturn_t mmci_pio_irq(int irq, void *dev_id) | 361 | static irqreturn_t mmci_pio_irq(int irq, void *dev_id) |
315 | { | 362 | { |
316 | struct mmci_host *host = dev_id; | 363 | struct mmci_host *host = dev_id; |
364 | struct sg_mapping_iter *sg_miter = &host->sg_miter; | ||
317 | void __iomem *base = host->base; | 365 | void __iomem *base = host->base; |
366 | unsigned long flags; | ||
318 | u32 status; | 367 | u32 status; |
319 | 368 | ||
320 | status = readl(base + MMCISTATUS); | 369 | status = readl(base + MMCISTATUS); |
321 | 370 | ||
322 | dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); | 371 | dev_dbg(mmc_dev(host->mmc), "irq1 (pio) %08x\n", status); |
323 | 372 | ||
373 | local_irq_save(flags); | ||
374 | |||
324 | do { | 375 | do { |
325 | unsigned long flags; | ||
326 | unsigned int remain, len; | 376 | unsigned int remain, len; |
327 | char *buffer; | 377 | char *buffer; |
328 | 378 | ||
@@ -336,11 +386,11 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) | |||
336 | if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL))) | 386 | if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL))) |
337 | break; | 387 | break; |
338 | 388 | ||
339 | /* | 389 | if (!sg_miter_next(sg_miter)) |
340 | * Map the current scatter buffer. | 390 | break; |
341 | */ | 391 | |
342 | buffer = mmci_kmap_atomic(host, &flags) + host->sg_off; | 392 | buffer = sg_miter->addr; |
343 | remain = host->sg_ptr->length - host->sg_off; | 393 | remain = sg_miter->length; |
344 | 394 | ||
345 | len = 0; | 395 | len = 0; |
346 | if (status & MCI_RXACTIVE) | 396 | if (status & MCI_RXACTIVE) |
@@ -348,31 +398,24 @@ static irqreturn_t mmci_pio_irq(int irq, void *dev_id) | |||
348 | if (status & MCI_TXACTIVE) | 398 | if (status & MCI_TXACTIVE) |
349 | len = mmci_pio_write(host, buffer, remain, status); | 399 | len = mmci_pio_write(host, buffer, remain, status); |
350 | 400 | ||
351 | /* | 401 | sg_miter->consumed = len; |
352 | * Unmap the buffer. | ||
353 | */ | ||
354 | mmci_kunmap_atomic(host, buffer, &flags); | ||
355 | 402 | ||
356 | host->sg_off += len; | ||
357 | host->size -= len; | 403 | host->size -= len; |
358 | remain -= len; | 404 | remain -= len; |
359 | 405 | ||
360 | if (remain) | 406 | if (remain) |
361 | break; | 407 | break; |
362 | 408 | ||
363 | /* | ||
364 | * If we were reading, and we have completed this | ||
365 | * page, ensure that the data cache is coherent. | ||
366 | */ | ||
367 | if (status & MCI_RXACTIVE) | 409 | if (status & MCI_RXACTIVE) |
368 | flush_dcache_page(sg_page(host->sg_ptr)); | 410 | flush_dcache_page(sg_miter->page); |
369 | |||
370 | if (!mmci_next_sg(host)) | ||
371 | break; | ||
372 | 411 | ||
373 | status = readl(base + MMCISTATUS); | 412 | status = readl(base + MMCISTATUS); |
374 | } while (1); | 413 | } while (1); |
375 | 414 | ||
415 | sg_miter_stop(sg_miter); | ||
416 | |||
417 | local_irq_restore(flags); | ||
418 | |||
376 | /* | 419 | /* |
377 | * If we're nearing the end of the read, switch to | 420 | * If we're nearing the end of the read, switch to |
378 | * "any data available" mode. | 421 | * "any data available" mode. |
@@ -477,16 +520,9 @@ static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | |||
477 | /* This implicitly enables the regulator */ | 520 | /* This implicitly enables the regulator */ |
478 | mmc_regulator_set_ocr(host->vcc, ios->vdd); | 521 | mmc_regulator_set_ocr(host->vcc, ios->vdd); |
479 | #endif | 522 | #endif |
480 | /* | 523 | if (host->plat->vdd_handler) |
481 | * The translate_vdd function is not used if you have | 524 | pwr |= host->plat->vdd_handler(mmc_dev(mmc), ios->vdd, |
482 | * an external regulator, or your design is really weird. | 525 | ios->power_mode); |
483 | * Using it would mean sending in power control BOTH using | ||
484 | * a regulator AND the 4 MMCIPWR bits. If we don't have | ||
485 | * a regulator, we might have some other platform specific | ||
486 | * power control behind this translate function. | ||
487 | */ | ||
488 | if (!host->vcc && host->plat->translate_vdd) | ||
489 | pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd); | ||
490 | /* The ST version does not have this, fall through to POWER_ON */ | 526 | /* The ST version does not have this, fall through to POWER_ON */ |
491 | if (host->hw_designer != AMBA_VENDOR_ST) { | 527 | if (host->hw_designer != AMBA_VENDOR_ST) { |
492 | pwr |= MCI_PWR_UP; | 528 | pwr |= MCI_PWR_UP; |
@@ -555,21 +591,10 @@ static const struct mmc_host_ops mmci_ops = { | |||
555 | .get_cd = mmci_get_cd, | 591 | .get_cd = mmci_get_cd, |
556 | }; | 592 | }; |
557 | 593 | ||
558 | static void mmci_check_status(unsigned long data) | ||
559 | { | ||
560 | struct mmci_host *host = (struct mmci_host *)data; | ||
561 | unsigned int status = mmci_get_cd(host->mmc); | ||
562 | |||
563 | if (status ^ host->oldstat) | ||
564 | mmc_detect_change(host->mmc, 0); | ||
565 | |||
566 | host->oldstat = status; | ||
567 | mod_timer(&host->timer, jiffies + HZ); | ||
568 | } | ||
569 | |||
570 | static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) | 594 | static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) |
571 | { | 595 | { |
572 | struct mmci_platform_data *plat = dev->dev.platform_data; | 596 | struct mmci_platform_data *plat = dev->dev.platform_data; |
597 | struct variant_data *variant = id->data; | ||
573 | struct mmci_host *host; | 598 | struct mmci_host *host; |
574 | struct mmc_host *mmc; | 599 | struct mmc_host *mmc; |
575 | int ret; | 600 | int ret; |
@@ -613,6 +638,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) | |||
613 | goto clk_free; | 638 | goto clk_free; |
614 | 639 | ||
615 | host->plat = plat; | 640 | host->plat = plat; |
641 | host->variant = variant; | ||
616 | host->mclk = clk_get_rate(host->clk); | 642 | host->mclk = clk_get_rate(host->clk); |
617 | /* | 643 | /* |
618 | * According to the spec, mclk is max 100 MHz, | 644 | * According to the spec, mclk is max 100 MHz, |
@@ -673,6 +699,7 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) | |||
673 | if (host->vcc == NULL) | 699 | if (host->vcc == NULL) |
674 | mmc->ocr_avail = plat->ocr_mask; | 700 | mmc->ocr_avail = plat->ocr_mask; |
675 | mmc->caps = plat->capabilities; | 701 | mmc->caps = plat->capabilities; |
702 | mmc->caps |= MMC_CAP_NEEDS_POLL; | ||
676 | 703 | ||
677 | /* | 704 | /* |
678 | * We can do SGIO | 705 | * We can do SGIO |
@@ -681,10 +708,11 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) | |||
681 | mmc->max_phys_segs = NR_SG; | 708 | mmc->max_phys_segs = NR_SG; |
682 | 709 | ||
683 | /* | 710 | /* |
684 | * Since we only have a 16-bit data length register, we must | 711 | * Since only a certain number of bits are valid in the data length |
685 | * ensure that we don't exceed 2^16-1 bytes in a single request. | 712 | * register, we must ensure that we don't exceed 2^num-1 bytes in a |
713 | * single request. | ||
686 | */ | 714 | */ |
687 | mmc->max_req_size = 65535; | 715 | mmc->max_req_size = (1 << variant->datalength_bits) - 1; |
688 | 716 | ||
689 | /* | 717 | /* |
690 | * Set the maximum segment size. Since we aren't doing DMA | 718 | * Set the maximum segment size. Since we aren't doing DMA |
@@ -738,7 +766,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) | |||
738 | writel(MCI_IRQENABLE, host->base + MMCIMASK0); | 766 | writel(MCI_IRQENABLE, host->base + MMCIMASK0); |
739 | 767 | ||
740 | amba_set_drvdata(dev, mmc); | 768 | amba_set_drvdata(dev, mmc); |
741 | host->oldstat = mmci_get_cd(host->mmc); | ||
742 | 769 | ||
743 | mmc_add_host(mmc); | 770 | mmc_add_host(mmc); |
744 | 771 | ||
@@ -746,12 +773,6 @@ static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) | |||
746 | mmc_hostname(mmc), amba_rev(dev), amba_config(dev), | 773 | mmc_hostname(mmc), amba_rev(dev), amba_config(dev), |
747 | (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]); | 774 | (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]); |
748 | 775 | ||
749 | init_timer(&host->timer); | ||
750 | host->timer.data = (unsigned long)host; | ||
751 | host->timer.function = mmci_check_status; | ||
752 | host->timer.expires = jiffies + HZ; | ||
753 | add_timer(&host->timer); | ||
754 | |||
755 | return 0; | 776 | return 0; |
756 | 777 | ||
757 | irq0_free: | 778 | irq0_free: |
@@ -785,8 +806,6 @@ static int __devexit mmci_remove(struct amba_device *dev) | |||
785 | if (mmc) { | 806 | if (mmc) { |
786 | struct mmci_host *host = mmc_priv(mmc); | 807 | struct mmci_host *host = mmc_priv(mmc); |
787 | 808 | ||
788 | del_timer_sync(&host->timer); | ||
789 | |||
790 | mmc_remove_host(mmc); | 809 | mmc_remove_host(mmc); |
791 | 810 | ||
792 | writel(0, host->base + MMCIMASK0); | 811 | writel(0, host->base + MMCIMASK0); |
@@ -860,19 +879,28 @@ static struct amba_id mmci_ids[] = { | |||
860 | { | 879 | { |
861 | .id = 0x00041180, | 880 | .id = 0x00041180, |
862 | .mask = 0x000fffff, | 881 | .mask = 0x000fffff, |
882 | .data = &variant_arm, | ||
863 | }, | 883 | }, |
864 | { | 884 | { |
865 | .id = 0x00041181, | 885 | .id = 0x00041181, |
866 | .mask = 0x000fffff, | 886 | .mask = 0x000fffff, |
887 | .data = &variant_arm, | ||
867 | }, | 888 | }, |
868 | /* ST Micro variants */ | 889 | /* ST Micro variants */ |
869 | { | 890 | { |
870 | .id = 0x00180180, | 891 | .id = 0x00180180, |
871 | .mask = 0x00ffffff, | 892 | .mask = 0x00ffffff, |
893 | .data = &variant_u300, | ||
872 | }, | 894 | }, |
873 | { | 895 | { |
874 | .id = 0x00280180, | 896 | .id = 0x00280180, |
875 | .mask = 0x00ffffff, | 897 | .mask = 0x00ffffff, |
898 | .data = &variant_u300, | ||
899 | }, | ||
900 | { | ||
901 | .id = 0x00480180, | ||
902 | .mask = 0x00ffffff, | ||
903 | .data = &variant_ux500, | ||
876 | }, | 904 | }, |
877 | { 0, 0 }, | 905 | { 0, 0 }, |
878 | }; | 906 | }; |
diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index d77062e5e3af..68970cfb81e1 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h | |||
@@ -28,8 +28,6 @@ | |||
28 | #define MCI_4BIT_BUS (1 << 11) | 28 | #define MCI_4BIT_BUS (1 << 11) |
29 | /* 8bit wide buses supported in ST Micro versions */ | 29 | /* 8bit wide buses supported in ST Micro versions */ |
30 | #define MCI_ST_8BIT_BUS (1 << 12) | 30 | #define MCI_ST_8BIT_BUS (1 << 12) |
31 | /* HW flow control on the ST Micro version */ | ||
32 | #define MCI_ST_FCEN (1 << 13) | ||
33 | 31 | ||
34 | #define MMCIARGUMENT 0x008 | 32 | #define MMCIARGUMENT 0x008 |
35 | #define MMCICOMMAND 0x00c | 33 | #define MMCICOMMAND 0x00c |
@@ -145,6 +143,7 @@ | |||
145 | #define NR_SG 16 | 143 | #define NR_SG 16 |
146 | 144 | ||
147 | struct clk; | 145 | struct clk; |
146 | struct variant_data; | ||
148 | 147 | ||
149 | struct mmci_host { | 148 | struct mmci_host { |
150 | void __iomem *base; | 149 | void __iomem *base; |
@@ -164,6 +163,7 @@ struct mmci_host { | |||
164 | unsigned int cclk; | 163 | unsigned int cclk; |
165 | u32 pwr; | 164 | u32 pwr; |
166 | struct mmci_platform_data *plat; | 165 | struct mmci_platform_data *plat; |
166 | struct variant_data *variant; | ||
167 | 167 | ||
168 | u8 hw_designer; | 168 | u8 hw_designer; |
169 | u8 hw_revision:4; | 169 | u8 hw_revision:4; |
@@ -171,42 +171,9 @@ struct mmci_host { | |||
171 | struct timer_list timer; | 171 | struct timer_list timer; |
172 | unsigned int oldstat; | 172 | unsigned int oldstat; |
173 | 173 | ||
174 | unsigned int sg_len; | ||
175 | |||
176 | /* pio stuff */ | 174 | /* pio stuff */ |
177 | struct scatterlist *sg_ptr; | 175 | struct sg_mapping_iter sg_miter; |
178 | unsigned int sg_off; | ||
179 | unsigned int size; | 176 | unsigned int size; |
180 | struct regulator *vcc; | 177 | struct regulator *vcc; |
181 | }; | 178 | }; |
182 | 179 | ||
183 | static inline void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) | ||
184 | { | ||
185 | /* | ||
186 | * Ideally, we want the higher levels to pass us a scatter list. | ||
187 | */ | ||
188 | host->sg_len = data->sg_len; | ||
189 | host->sg_ptr = data->sg; | ||
190 | host->sg_off = 0; | ||
191 | } | ||
192 | |||
193 | static inline int mmci_next_sg(struct mmci_host *host) | ||
194 | { | ||
195 | host->sg_ptr++; | ||
196 | host->sg_off = 0; | ||
197 | return --host->sg_len; | ||
198 | } | ||
199 | |||
200 | static inline char *mmci_kmap_atomic(struct mmci_host *host, unsigned long *flags) | ||
201 | { | ||
202 | struct scatterlist *sg = host->sg_ptr; | ||
203 | |||
204 | local_irq_save(*flags); | ||
205 | return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset; | ||
206 | } | ||
207 | |||
208 | static inline void mmci_kunmap_atomic(struct mmci_host *host, void *buffer, unsigned long *flags) | ||
209 | { | ||
210 | kunmap_atomic(buffer, KM_BIO_SRC_IRQ); | ||
211 | local_irq_restore(*flags); | ||
212 | } | ||
diff --git a/drivers/mmc/host/mxcmmc.c b/drivers/mmc/host/mxcmmc.c index d9d4a72e0ec7..350f78e86245 100644 --- a/drivers/mmc/host/mxcmmc.c +++ b/drivers/mmc/host/mxcmmc.c | |||
@@ -119,6 +119,7 @@ struct mxcmci_host { | |||
119 | int detect_irq; | 119 | int detect_irq; |
120 | int dma; | 120 | int dma; |
121 | int do_dma; | 121 | int do_dma; |
122 | int default_irq_mask; | ||
122 | int use_sdio; | 123 | int use_sdio; |
123 | unsigned int power_mode; | 124 | unsigned int power_mode; |
124 | struct imxmmc_platform_data *pdata; | 125 | struct imxmmc_platform_data *pdata; |
@@ -228,7 +229,7 @@ static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) | |||
228 | static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd, | 229 | static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd, |
229 | unsigned int cmdat) | 230 | unsigned int cmdat) |
230 | { | 231 | { |
231 | u32 int_cntr; | 232 | u32 int_cntr = host->default_irq_mask; |
232 | unsigned long flags; | 233 | unsigned long flags; |
233 | 234 | ||
234 | WARN_ON(host->cmd != NULL); | 235 | WARN_ON(host->cmd != NULL); |
@@ -275,7 +276,7 @@ static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd, | |||
275 | static void mxcmci_finish_request(struct mxcmci_host *host, | 276 | static void mxcmci_finish_request(struct mxcmci_host *host, |
276 | struct mmc_request *req) | 277 | struct mmc_request *req) |
277 | { | 278 | { |
278 | u32 int_cntr = 0; | 279 | u32 int_cntr = host->default_irq_mask; |
279 | unsigned long flags; | 280 | unsigned long flags; |
280 | 281 | ||
281 | spin_lock_irqsave(&host->lock, flags); | 282 | spin_lock_irqsave(&host->lock, flags); |
@@ -585,6 +586,9 @@ static irqreturn_t mxcmci_irq(int irq, void *devid) | |||
585 | (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE))) | 586 | (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE))) |
586 | mxcmci_data_done(host, stat); | 587 | mxcmci_data_done(host, stat); |
587 | #endif | 588 | #endif |
589 | if (host->default_irq_mask && | ||
590 | (stat & (STATUS_CARD_INSERTION | STATUS_CARD_REMOVAL))) | ||
591 | mmc_detect_change(host->mmc, msecs_to_jiffies(200)); | ||
588 | return IRQ_HANDLED; | 592 | return IRQ_HANDLED; |
589 | } | 593 | } |
590 | 594 | ||
@@ -809,6 +813,12 @@ static int mxcmci_probe(struct platform_device *pdev) | |||
809 | else | 813 | else |
810 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; | 814 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
811 | 815 | ||
816 | if (host->pdata && host->pdata->dat3_card_detect) | ||
817 | host->default_irq_mask = | ||
818 | INT_CARD_INSERTION_EN | INT_CARD_REMOVAL_EN; | ||
819 | else | ||
820 | host->default_irq_mask = 0; | ||
821 | |||
812 | host->res = r; | 822 | host->res = r; |
813 | host->irq = irq; | 823 | host->irq = irq; |
814 | 824 | ||
@@ -835,7 +845,7 @@ static int mxcmci_probe(struct platform_device *pdev) | |||
835 | /* recommended in data sheet */ | 845 | /* recommended in data sheet */ |
836 | writew(0x2db4, host->base + MMC_REG_READ_TO); | 846 | writew(0x2db4, host->base + MMC_REG_READ_TO); |
837 | 847 | ||
838 | writel(0, host->base + MMC_REG_INT_CNTR); | 848 | writel(host->default_irq_mask, host->base + MMC_REG_INT_CNTR); |
839 | 849 | ||
840 | #ifdef HAS_DMA | 850 | #ifdef HAS_DMA |
841 | host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW); | 851 | host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW); |
@@ -926,43 +936,47 @@ static int mxcmci_remove(struct platform_device *pdev) | |||
926 | } | 936 | } |
927 | 937 | ||
928 | #ifdef CONFIG_PM | 938 | #ifdef CONFIG_PM |
929 | static int mxcmci_suspend(struct platform_device *dev, pm_message_t state) | 939 | static int mxcmci_suspend(struct device *dev) |
930 | { | 940 | { |
931 | struct mmc_host *mmc = platform_get_drvdata(dev); | 941 | struct mmc_host *mmc = dev_get_drvdata(dev); |
942 | struct mxcmci_host *host = mmc_priv(mmc); | ||
932 | int ret = 0; | 943 | int ret = 0; |
933 | 944 | ||
934 | if (mmc) | 945 | if (mmc) |
935 | ret = mmc_suspend_host(mmc); | 946 | ret = mmc_suspend_host(mmc); |
947 | clk_disable(host->clk); | ||
936 | 948 | ||
937 | return ret; | 949 | return ret; |
938 | } | 950 | } |
939 | 951 | ||
940 | static int mxcmci_resume(struct platform_device *dev) | 952 | static int mxcmci_resume(struct device *dev) |
941 | { | 953 | { |
942 | struct mmc_host *mmc = platform_get_drvdata(dev); | 954 | struct mmc_host *mmc = dev_get_drvdata(dev); |
943 | struct mxcmci_host *host; | 955 | struct mxcmci_host *host = mmc_priv(mmc); |
944 | int ret = 0; | 956 | int ret = 0; |
945 | 957 | ||
946 | if (mmc) { | 958 | clk_enable(host->clk); |
947 | host = mmc_priv(mmc); | 959 | if (mmc) |
948 | ret = mmc_resume_host(mmc); | 960 | ret = mmc_resume_host(mmc); |
949 | } | ||
950 | 961 | ||
951 | return ret; | 962 | return ret; |
952 | } | 963 | } |
953 | #else | 964 | |
954 | #define mxcmci_suspend NULL | 965 | static const struct dev_pm_ops mxcmci_pm_ops = { |
955 | #define mxcmci_resume NULL | 966 | .suspend = mxcmci_suspend, |
956 | #endif /* CONFIG_PM */ | 967 | .resume = mxcmci_resume, |
968 | }; | ||
969 | #endif | ||
957 | 970 | ||
958 | static struct platform_driver mxcmci_driver = { | 971 | static struct platform_driver mxcmci_driver = { |
959 | .probe = mxcmci_probe, | 972 | .probe = mxcmci_probe, |
960 | .remove = mxcmci_remove, | 973 | .remove = mxcmci_remove, |
961 | .suspend = mxcmci_suspend, | ||
962 | .resume = mxcmci_resume, | ||
963 | .driver = { | 974 | .driver = { |
964 | .name = DRIVER_NAME, | 975 | .name = DRIVER_NAME, |
965 | .owner = THIS_MODULE, | 976 | .owner = THIS_MODULE, |
977 | #ifdef CONFIG_PM | ||
978 | .pm = &mxcmci_pm_ops, | ||
979 | #endif | ||
966 | } | 980 | } |
967 | }; | 981 | }; |
968 | 982 | ||
diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 82e94389824e..0d76b169482f 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c | |||
@@ -623,8 +623,7 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, | |||
623 | else | 623 | else |
624 | host->buf_start = column + mtd->writesize; | 624 | host->buf_start = column + mtd->writesize; |
625 | 625 | ||
626 | if (mtd->writesize > 512) | 626 | command = NAND_CMD_READ0; /* only READ0 is valid */ |
627 | command = NAND_CMD_READ0; /* only READ0 is valid */ | ||
628 | 627 | ||
629 | send_cmd(host, command, false); | 628 | send_cmd(host, command, false); |
630 | mxc_do_addr_cycle(mtd, column, page_addr); | 629 | mxc_do_addr_cycle(mtd, column, page_addr); |
@@ -639,31 +638,11 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, | |||
639 | break; | 638 | break; |
640 | 639 | ||
641 | case NAND_CMD_SEQIN: | 640 | case NAND_CMD_SEQIN: |
642 | if (column >= mtd->writesize) { | 641 | if (column >= mtd->writesize) |
643 | /* | 642 | /* call ourself to read a page */ |
644 | * FIXME: before send SEQIN command for write OOB, | 643 | mxc_nand_command(mtd, NAND_CMD_READ0, 0, page_addr); |
645 | * We must read one page out. | ||
646 | * For K9F1GXX has no READ1 command to set current HW | ||
647 | * pointer to spare area, we must write the whole page | ||
648 | * including OOB together. | ||
649 | */ | ||
650 | if (mtd->writesize > 512) | ||
651 | /* call ourself to read a page */ | ||
652 | mxc_nand_command(mtd, NAND_CMD_READ0, 0, | ||
653 | page_addr); | ||
654 | |||
655 | host->buf_start = column; | ||
656 | |||
657 | /* Set program pointer to spare region */ | ||
658 | if (mtd->writesize == 512) | ||
659 | send_cmd(host, NAND_CMD_READOOB, false); | ||
660 | } else { | ||
661 | host->buf_start = column; | ||
662 | 644 | ||
663 | /* Set program pointer to page start */ | 645 | host->buf_start = column; |
664 | if (mtd->writesize == 512) | ||
665 | send_cmd(host, NAND_CMD_READ0, false); | ||
666 | } | ||
667 | 646 | ||
668 | send_cmd(host, command, false); | 647 | send_cmd(host, command, false); |
669 | mxc_do_addr_cycle(mtd, column, page_addr); | 648 | mxc_do_addr_cycle(mtd, column, page_addr); |
@@ -853,6 +832,8 @@ static int __init mxcnd_probe(struct platform_device *pdev) | |||
853 | parse_mtd_partitions(mtd, part_probes, &host->parts, 0); | 832 | parse_mtd_partitions(mtd, part_probes, &host->parts, 0); |
854 | if (nr_parts > 0) | 833 | if (nr_parts > 0) |
855 | add_mtd_partitions(mtd, host->parts, nr_parts); | 834 | add_mtd_partitions(mtd, host->parts, nr_parts); |
835 | else if (pdata->parts) | ||
836 | add_mtd_partitions(mtd, pdata->parts, pdata->nr_parts); | ||
856 | else | 837 | else |
857 | #endif | 838 | #endif |
858 | { | 839 | { |
diff --git a/drivers/net/phy/marvell.c b/drivers/net/phy/marvell.c index 78b74e83ce5d..5a1bd5db2a93 100644 --- a/drivers/net/phy/marvell.c +++ b/drivers/net/phy/marvell.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/mii.h> | 29 | #include <linux/mii.h> |
30 | #include <linux/ethtool.h> | 30 | #include <linux/ethtool.h> |
31 | #include <linux/phy.h> | 31 | #include <linux/phy.h> |
32 | #include <linux/marvell_phy.h> | ||
32 | 33 | ||
33 | #include <asm/io.h> | 34 | #include <asm/io.h> |
34 | #include <asm/irq.h> | 35 | #include <asm/irq.h> |
@@ -48,8 +49,6 @@ | |||
48 | #define MII_M1145_RGMII_RX_DELAY 0x0080 | 49 | #define MII_M1145_RGMII_RX_DELAY 0x0080 |
49 | #define MII_M1145_RGMII_TX_DELAY 0x0002 | 50 | #define MII_M1145_RGMII_TX_DELAY 0x0002 |
50 | 51 | ||
51 | #define M1145_DEV_FLAGS_RESISTANCE 0x00000001 | ||
52 | |||
53 | #define MII_M1111_PHY_LED_CONTROL 0x18 | 52 | #define MII_M1111_PHY_LED_CONTROL 0x18 |
54 | #define MII_M1111_PHY_LED_DIRECT 0x4100 | 53 | #define MII_M1111_PHY_LED_DIRECT 0x4100 |
55 | #define MII_M1111_PHY_LED_COMBINE 0x411c | 54 | #define MII_M1111_PHY_LED_COMBINE 0x411c |
@@ -350,7 +349,10 @@ static int m88e1118_config_init(struct phy_device *phydev) | |||
350 | return err; | 349 | return err; |
351 | 350 | ||
352 | /* Adjust LED Control */ | 351 | /* Adjust LED Control */ |
353 | err = phy_write(phydev, 0x10, 0x021e); | 352 | if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS) |
353 | err = phy_write(phydev, 0x10, 0x1100); | ||
354 | else | ||
355 | err = phy_write(phydev, 0x10, 0x021e); | ||
354 | if (err < 0) | 356 | if (err < 0) |
355 | return err; | 357 | return err; |
356 | 358 | ||
@@ -398,7 +400,7 @@ static int m88e1145_config_init(struct phy_device *phydev) | |||
398 | if (err < 0) | 400 | if (err < 0) |
399 | return err; | 401 | return err; |
400 | 402 | ||
401 | if (phydev->dev_flags & M1145_DEV_FLAGS_RESISTANCE) { | 403 | if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) { |
402 | err = phy_write(phydev, 0x1d, 0x0012); | 404 | err = phy_write(phydev, 0x1d, 0x0012); |
403 | if (err < 0) | 405 | if (err < 0) |
404 | return err; | 406 | return err; |
@@ -529,8 +531,8 @@ static int m88e1121_did_interrupt(struct phy_device *phydev) | |||
529 | 531 | ||
530 | static struct phy_driver marvell_drivers[] = { | 532 | static struct phy_driver marvell_drivers[] = { |
531 | { | 533 | { |
532 | .phy_id = 0x01410c60, | 534 | .phy_id = MARVELL_PHY_ID_88E1101, |
533 | .phy_id_mask = 0xfffffff0, | 535 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
534 | .name = "Marvell 88E1101", | 536 | .name = "Marvell 88E1101", |
535 | .features = PHY_GBIT_FEATURES, | 537 | .features = PHY_GBIT_FEATURES, |
536 | .flags = PHY_HAS_INTERRUPT, | 538 | .flags = PHY_HAS_INTERRUPT, |
@@ -541,8 +543,8 @@ static struct phy_driver marvell_drivers[] = { | |||
541 | .driver = { .owner = THIS_MODULE }, | 543 | .driver = { .owner = THIS_MODULE }, |
542 | }, | 544 | }, |
543 | { | 545 | { |
544 | .phy_id = 0x01410c90, | 546 | .phy_id = MARVELL_PHY_ID_88E1112, |
545 | .phy_id_mask = 0xfffffff0, | 547 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
546 | .name = "Marvell 88E1112", | 548 | .name = "Marvell 88E1112", |
547 | .features = PHY_GBIT_FEATURES, | 549 | .features = PHY_GBIT_FEATURES, |
548 | .flags = PHY_HAS_INTERRUPT, | 550 | .flags = PHY_HAS_INTERRUPT, |
@@ -554,8 +556,8 @@ static struct phy_driver marvell_drivers[] = { | |||
554 | .driver = { .owner = THIS_MODULE }, | 556 | .driver = { .owner = THIS_MODULE }, |
555 | }, | 557 | }, |
556 | { | 558 | { |
557 | .phy_id = 0x01410cc0, | 559 | .phy_id = MARVELL_PHY_ID_88E1111, |
558 | .phy_id_mask = 0xfffffff0, | 560 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
559 | .name = "Marvell 88E1111", | 561 | .name = "Marvell 88E1111", |
560 | .features = PHY_GBIT_FEATURES, | 562 | .features = PHY_GBIT_FEATURES, |
561 | .flags = PHY_HAS_INTERRUPT, | 563 | .flags = PHY_HAS_INTERRUPT, |
@@ -567,8 +569,8 @@ static struct phy_driver marvell_drivers[] = { | |||
567 | .driver = { .owner = THIS_MODULE }, | 569 | .driver = { .owner = THIS_MODULE }, |
568 | }, | 570 | }, |
569 | { | 571 | { |
570 | .phy_id = 0x01410e10, | 572 | .phy_id = MARVELL_PHY_ID_88E1118, |
571 | .phy_id_mask = 0xfffffff0, | 573 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
572 | .name = "Marvell 88E1118", | 574 | .name = "Marvell 88E1118", |
573 | .features = PHY_GBIT_FEATURES, | 575 | .features = PHY_GBIT_FEATURES, |
574 | .flags = PHY_HAS_INTERRUPT, | 576 | .flags = PHY_HAS_INTERRUPT, |
@@ -580,8 +582,8 @@ static struct phy_driver marvell_drivers[] = { | |||
580 | .driver = {.owner = THIS_MODULE,}, | 582 | .driver = {.owner = THIS_MODULE,}, |
581 | }, | 583 | }, |
582 | { | 584 | { |
583 | .phy_id = 0x01410cb0, | 585 | .phy_id = MARVELL_PHY_ID_88E1121R, |
584 | .phy_id_mask = 0xfffffff0, | 586 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
585 | .name = "Marvell 88E1121R", | 587 | .name = "Marvell 88E1121R", |
586 | .features = PHY_GBIT_FEATURES, | 588 | .features = PHY_GBIT_FEATURES, |
587 | .flags = PHY_HAS_INTERRUPT, | 589 | .flags = PHY_HAS_INTERRUPT, |
@@ -593,8 +595,8 @@ static struct phy_driver marvell_drivers[] = { | |||
593 | .driver = { .owner = THIS_MODULE }, | 595 | .driver = { .owner = THIS_MODULE }, |
594 | }, | 596 | }, |
595 | { | 597 | { |
596 | .phy_id = 0x01410cd0, | 598 | .phy_id = MARVELL_PHY_ID_88E1145, |
597 | .phy_id_mask = 0xfffffff0, | 599 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
598 | .name = "Marvell 88E1145", | 600 | .name = "Marvell 88E1145", |
599 | .features = PHY_GBIT_FEATURES, | 601 | .features = PHY_GBIT_FEATURES, |
600 | .flags = PHY_HAS_INTERRUPT, | 602 | .flags = PHY_HAS_INTERRUPT, |
@@ -606,8 +608,8 @@ static struct phy_driver marvell_drivers[] = { | |||
606 | .driver = { .owner = THIS_MODULE }, | 608 | .driver = { .owner = THIS_MODULE }, |
607 | }, | 609 | }, |
608 | { | 610 | { |
609 | .phy_id = 0x01410e30, | 611 | .phy_id = MARVELL_PHY_ID_88E1240, |
610 | .phy_id_mask = 0xfffffff0, | 612 | .phy_id_mask = MARVELL_PHY_ID_MASK, |
611 | .name = "Marvell 88E1240", | 613 | .name = "Marvell 88E1240", |
612 | .features = PHY_GBIT_FEATURES, | 614 | .features = PHY_GBIT_FEATURES, |
613 | .flags = PHY_HAS_INTERRUPT, | 615 | .flags = PHY_HAS_INTERRUPT, |
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c index 3587d9922f28..71bbefc3544e 100644 --- a/drivers/rtc/rtc-pl031.c +++ b/drivers/rtc/rtc-pl031.c | |||
@@ -456,7 +456,7 @@ static struct rtc_class_ops stv2_pl031_ops = { | |||
456 | .irq_set_freq = pl031_irq_set_freq, | 456 | .irq_set_freq = pl031_irq_set_freq, |
457 | }; | 457 | }; |
458 | 458 | ||
459 | static struct amba_id pl031_ids[] __initdata = { | 459 | static struct amba_id pl031_ids[] = { |
460 | { | 460 | { |
461 | .id = 0x00041031, | 461 | .id = 0x00041031, |
462 | .mask = 0x000fffff, | 462 | .mask = 0x000fffff, |
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c index b09a638d051f..50441ffe8e38 100644 --- a/drivers/serial/amba-pl010.c +++ b/drivers/serial/amba-pl010.c | |||
@@ -782,7 +782,7 @@ static int pl010_resume(struct amba_device *dev) | |||
782 | return 0; | 782 | return 0; |
783 | } | 783 | } |
784 | 784 | ||
785 | static struct amba_id pl010_ids[] __initdata = { | 785 | static struct amba_id pl010_ids[] = { |
786 | { | 786 | { |
787 | .id = 0x00041010, | 787 | .id = 0x00041010, |
788 | .mask = 0x000fffff, | 788 | .mask = 0x000fffff, |
diff --git a/drivers/serial/amba-pl011.c b/drivers/serial/amba-pl011.c index eb4cb480b93e..6ca7a44f29c2 100644 --- a/drivers/serial/amba-pl011.c +++ b/drivers/serial/amba-pl011.c | |||
@@ -69,9 +69,12 @@ | |||
69 | struct uart_amba_port { | 69 | struct uart_amba_port { |
70 | struct uart_port port; | 70 | struct uart_port port; |
71 | struct clk *clk; | 71 | struct clk *clk; |
72 | unsigned int im; /* interrupt mask */ | 72 | unsigned int im; /* interrupt mask */ |
73 | unsigned int old_status; | 73 | unsigned int old_status; |
74 | unsigned int ifls; /* vendor-specific */ | 74 | unsigned int ifls; /* vendor-specific */ |
75 | unsigned int lcrh_tx; /* vendor-specific */ | ||
76 | unsigned int lcrh_rx; /* vendor-specific */ | ||
77 | bool oversampling; /* vendor-specific */ | ||
75 | bool autorts; | 78 | bool autorts; |
76 | }; | 79 | }; |
77 | 80 | ||
@@ -79,16 +82,25 @@ struct uart_amba_port { | |||
79 | struct vendor_data { | 82 | struct vendor_data { |
80 | unsigned int ifls; | 83 | unsigned int ifls; |
81 | unsigned int fifosize; | 84 | unsigned int fifosize; |
85 | unsigned int lcrh_tx; | ||
86 | unsigned int lcrh_rx; | ||
87 | bool oversampling; | ||
82 | }; | 88 | }; |
83 | 89 | ||
84 | static struct vendor_data vendor_arm = { | 90 | static struct vendor_data vendor_arm = { |
85 | .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, | 91 | .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, |
86 | .fifosize = 16, | 92 | .fifosize = 16, |
93 | .lcrh_tx = UART011_LCRH, | ||
94 | .lcrh_rx = UART011_LCRH, | ||
95 | .oversampling = false, | ||
87 | }; | 96 | }; |
88 | 97 | ||
89 | static struct vendor_data vendor_st = { | 98 | static struct vendor_data vendor_st = { |
90 | .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF, | 99 | .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF, |
91 | .fifosize = 64, | 100 | .fifosize = 64, |
101 | .lcrh_tx = ST_UART011_LCRH_TX, | ||
102 | .lcrh_rx = ST_UART011_LCRH_RX, | ||
103 | .oversampling = true, | ||
92 | }; | 104 | }; |
93 | 105 | ||
94 | static void pl011_stop_tx(struct uart_port *port) | 106 | static void pl011_stop_tx(struct uart_port *port) |
@@ -327,12 +339,12 @@ static void pl011_break_ctl(struct uart_port *port, int break_state) | |||
327 | unsigned int lcr_h; | 339 | unsigned int lcr_h; |
328 | 340 | ||
329 | spin_lock_irqsave(&uap->port.lock, flags); | 341 | spin_lock_irqsave(&uap->port.lock, flags); |
330 | lcr_h = readw(uap->port.membase + UART011_LCRH); | 342 | lcr_h = readw(uap->port.membase + uap->lcrh_tx); |
331 | if (break_state == -1) | 343 | if (break_state == -1) |
332 | lcr_h |= UART01x_LCRH_BRK; | 344 | lcr_h |= UART01x_LCRH_BRK; |
333 | else | 345 | else |
334 | lcr_h &= ~UART01x_LCRH_BRK; | 346 | lcr_h &= ~UART01x_LCRH_BRK; |
335 | writew(lcr_h, uap->port.membase + UART011_LCRH); | 347 | writew(lcr_h, uap->port.membase + uap->lcrh_tx); |
336 | spin_unlock_irqrestore(&uap->port.lock, flags); | 348 | spin_unlock_irqrestore(&uap->port.lock, flags); |
337 | } | 349 | } |
338 | 350 | ||
@@ -393,7 +405,17 @@ static int pl011_startup(struct uart_port *port) | |||
393 | writew(cr, uap->port.membase + UART011_CR); | 405 | writew(cr, uap->port.membase + UART011_CR); |
394 | writew(0, uap->port.membase + UART011_FBRD); | 406 | writew(0, uap->port.membase + UART011_FBRD); |
395 | writew(1, uap->port.membase + UART011_IBRD); | 407 | writew(1, uap->port.membase + UART011_IBRD); |
396 | writew(0, uap->port.membase + UART011_LCRH); | 408 | writew(0, uap->port.membase + uap->lcrh_rx); |
409 | if (uap->lcrh_tx != uap->lcrh_rx) { | ||
410 | int i; | ||
411 | /* | ||
412 | * Wait 10 PCLKs before writing LCRH_TX register, | ||
413 | * to get this delay write read only register 10 times | ||
414 | */ | ||
415 | for (i = 0; i < 10; ++i) | ||
416 | writew(0xff, uap->port.membase + UART011_MIS); | ||
417 | writew(0, uap->port.membase + uap->lcrh_tx); | ||
418 | } | ||
397 | writew(0, uap->port.membase + UART01x_DR); | 419 | writew(0, uap->port.membase + UART01x_DR); |
398 | while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) | 420 | while (readw(uap->port.membase + UART01x_FR) & UART01x_FR_BUSY) |
399 | barrier(); | 421 | barrier(); |
@@ -422,10 +444,19 @@ static int pl011_startup(struct uart_port *port) | |||
422 | return retval; | 444 | return retval; |
423 | } | 445 | } |
424 | 446 | ||
447 | static void pl011_shutdown_channel(struct uart_amba_port *uap, | ||
448 | unsigned int lcrh) | ||
449 | { | ||
450 | unsigned long val; | ||
451 | |||
452 | val = readw(uap->port.membase + lcrh); | ||
453 | val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN); | ||
454 | writew(val, uap->port.membase + lcrh); | ||
455 | } | ||
456 | |||
425 | static void pl011_shutdown(struct uart_port *port) | 457 | static void pl011_shutdown(struct uart_port *port) |
426 | { | 458 | { |
427 | struct uart_amba_port *uap = (struct uart_amba_port *)port; | 459 | struct uart_amba_port *uap = (struct uart_amba_port *)port; |
428 | unsigned long val; | ||
429 | 460 | ||
430 | /* | 461 | /* |
431 | * disable all interrupts | 462 | * disable all interrupts |
@@ -450,9 +481,9 @@ static void pl011_shutdown(struct uart_port *port) | |||
450 | /* | 481 | /* |
451 | * disable break condition and fifos | 482 | * disable break condition and fifos |
452 | */ | 483 | */ |
453 | val = readw(uap->port.membase + UART011_LCRH); | 484 | pl011_shutdown_channel(uap, uap->lcrh_rx); |
454 | val &= ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN); | 485 | if (uap->lcrh_rx != uap->lcrh_tx) |
455 | writew(val, uap->port.membase + UART011_LCRH); | 486 | pl011_shutdown_channel(uap, uap->lcrh_tx); |
456 | 487 | ||
457 | /* | 488 | /* |
458 | * Shut down the clock producer | 489 | * Shut down the clock producer |
@@ -472,8 +503,13 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, | |||
472 | /* | 503 | /* |
473 | * Ask the core to calculate the divisor for us. | 504 | * Ask the core to calculate the divisor for us. |
474 | */ | 505 | */ |
475 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); | 506 | baud = uart_get_baud_rate(port, termios, old, 0, |
476 | quot = port->uartclk * 4 / baud; | 507 | port->uartclk/(uap->oversampling ? 8 : 16)); |
508 | |||
509 | if (baud > port->uartclk/16) | ||
510 | quot = DIV_ROUND_CLOSEST(port->uartclk * 8, baud); | ||
511 | else | ||
512 | quot = DIV_ROUND_CLOSEST(port->uartclk * 4, baud); | ||
477 | 513 | ||
478 | switch (termios->c_cflag & CSIZE) { | 514 | switch (termios->c_cflag & CSIZE) { |
479 | case CS5: | 515 | case CS5: |
@@ -552,6 +588,13 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, | |||
552 | uap->autorts = false; | 588 | uap->autorts = false; |
553 | } | 589 | } |
554 | 590 | ||
591 | if (uap->oversampling) { | ||
592 | if (baud > port->uartclk/16) | ||
593 | old_cr |= ST_UART011_CR_OVSFACT; | ||
594 | else | ||
595 | old_cr &= ~ST_UART011_CR_OVSFACT; | ||
596 | } | ||
597 | |||
555 | /* Set baud rate */ | 598 | /* Set baud rate */ |
556 | writew(quot & 0x3f, port->membase + UART011_FBRD); | 599 | writew(quot & 0x3f, port->membase + UART011_FBRD); |
557 | writew(quot >> 6, port->membase + UART011_IBRD); | 600 | writew(quot >> 6, port->membase + UART011_IBRD); |
@@ -561,7 +604,17 @@ pl011_set_termios(struct uart_port *port, struct ktermios *termios, | |||
561 | * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L | 604 | * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L |
562 | * ----------^----------^----------^----------^----- | 605 | * ----------^----------^----------^----------^----- |
563 | */ | 606 | */ |
564 | writew(lcr_h, port->membase + UART011_LCRH); | 607 | writew(lcr_h, port->membase + uap->lcrh_rx); |
608 | if (uap->lcrh_rx != uap->lcrh_tx) { | ||
609 | int i; | ||
610 | /* | ||
611 | * Wait 10 PCLKs before writing LCRH_TX register, | ||
612 | * to get this delay write read only register 10 times | ||
613 | */ | ||
614 | for (i = 0; i < 10; ++i) | ||
615 | writew(0xff, uap->port.membase + UART011_MIS); | ||
616 | writew(lcr_h, port->membase + uap->lcrh_tx); | ||
617 | } | ||
565 | writew(old_cr, port->membase + UART011_CR); | 618 | writew(old_cr, port->membase + UART011_CR); |
566 | 619 | ||
567 | spin_unlock_irqrestore(&port->lock, flags); | 620 | spin_unlock_irqrestore(&port->lock, flags); |
@@ -688,7 +741,7 @@ pl011_console_get_options(struct uart_amba_port *uap, int *baud, | |||
688 | if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) { | 741 | if (readw(uap->port.membase + UART011_CR) & UART01x_CR_UARTEN) { |
689 | unsigned int lcr_h, ibrd, fbrd; | 742 | unsigned int lcr_h, ibrd, fbrd; |
690 | 743 | ||
691 | lcr_h = readw(uap->port.membase + UART011_LCRH); | 744 | lcr_h = readw(uap->port.membase + uap->lcrh_tx); |
692 | 745 | ||
693 | *parity = 'n'; | 746 | *parity = 'n'; |
694 | if (lcr_h & UART01x_LCRH_PEN) { | 747 | if (lcr_h & UART01x_LCRH_PEN) { |
@@ -707,6 +760,12 @@ pl011_console_get_options(struct uart_amba_port *uap, int *baud, | |||
707 | fbrd = readw(uap->port.membase + UART011_FBRD); | 760 | fbrd = readw(uap->port.membase + UART011_FBRD); |
708 | 761 | ||
709 | *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); | 762 | *baud = uap->port.uartclk * 4 / (64 * ibrd + fbrd); |
763 | |||
764 | if (uap->oversampling) { | ||
765 | if (readw(uap->port.membase + UART011_CR) | ||
766 | & ST_UART011_CR_OVSFACT) | ||
767 | *baud *= 2; | ||
768 | } | ||
710 | } | 769 | } |
711 | } | 770 | } |
712 | 771 | ||
@@ -800,6 +859,9 @@ static int pl011_probe(struct amba_device *dev, struct amba_id *id) | |||
800 | } | 859 | } |
801 | 860 | ||
802 | uap->ifls = vendor->ifls; | 861 | uap->ifls = vendor->ifls; |
862 | uap->lcrh_rx = vendor->lcrh_rx; | ||
863 | uap->lcrh_tx = vendor->lcrh_tx; | ||
864 | uap->oversampling = vendor->oversampling; | ||
803 | uap->port.dev = &dev->dev; | 865 | uap->port.dev = &dev->dev; |
804 | uap->port.mapbase = dev->res.start; | 866 | uap->port.mapbase = dev->res.start; |
805 | uap->port.membase = base; | 867 | uap->port.membase = base; |
@@ -868,7 +930,7 @@ static int pl011_resume(struct amba_device *dev) | |||
868 | } | 930 | } |
869 | #endif | 931 | #endif |
870 | 932 | ||
871 | static struct amba_id pl011_ids[] __initdata = { | 933 | static struct amba_id pl011_ids[] = { |
872 | { | 934 | { |
873 | .id = 0x00041011, | 935 | .id = 0x00041011, |
874 | .mask = 0x000fffff, | 936 | .mask = 0x000fffff, |
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index eaa79c8a9b8c..93ead19507b6 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c | |||
@@ -76,11 +76,12 @@ | |||
76 | static const char driver_name [] = "at91_udc"; | 76 | static const char driver_name [] = "at91_udc"; |
77 | static const char ep0name[] = "ep0"; | 77 | static const char ep0name[] = "ep0"; |
78 | 78 | ||
79 | #define VBUS_POLL_TIMEOUT msecs_to_jiffies(1000) | ||
79 | 80 | ||
80 | #define at91_udp_read(dev, reg) \ | 81 | #define at91_udp_read(udc, reg) \ |
81 | __raw_readl((dev)->udp_baseaddr + (reg)) | 82 | __raw_readl((udc)->udp_baseaddr + (reg)) |
82 | #define at91_udp_write(dev, reg, val) \ | 83 | #define at91_udp_write(udc, reg, val) \ |
83 | __raw_writel((val), (dev)->udp_baseaddr + (reg)) | 84 | __raw_writel((val), (udc)->udp_baseaddr + (reg)) |
84 | 85 | ||
85 | /*-------------------------------------------------------------------------*/ | 86 | /*-------------------------------------------------------------------------*/ |
86 | 87 | ||
@@ -102,8 +103,9 @@ static void proc_ep_show(struct seq_file *s, struct at91_ep *ep) | |||
102 | u32 csr; | 103 | u32 csr; |
103 | struct at91_request *req; | 104 | struct at91_request *req; |
104 | unsigned long flags; | 105 | unsigned long flags; |
106 | struct at91_udc *udc = ep->udc; | ||
105 | 107 | ||
106 | local_irq_save(flags); | 108 | spin_lock_irqsave(&udc->lock, flags); |
107 | 109 | ||
108 | csr = __raw_readl(ep->creg); | 110 | csr = __raw_readl(ep->creg); |
109 | 111 | ||
@@ -147,7 +149,7 @@ static void proc_ep_show(struct seq_file *s, struct at91_ep *ep) | |||
147 | &req->req, length, | 149 | &req->req, length, |
148 | req->req.length, req->req.buf); | 150 | req->req.length, req->req.buf); |
149 | } | 151 | } |
150 | local_irq_restore(flags); | 152 | spin_unlock_irqrestore(&udc->lock, flags); |
151 | } | 153 | } |
152 | 154 | ||
153 | static void proc_irq_show(struct seq_file *s, const char *label, u32 mask) | 155 | static void proc_irq_show(struct seq_file *s, const char *label, u32 mask) |
@@ -272,7 +274,9 @@ static void done(struct at91_ep *ep, struct at91_request *req, int status) | |||
272 | VDBG("%s done %p, status %d\n", ep->ep.name, req, status); | 274 | VDBG("%s done %p, status %d\n", ep->ep.name, req, status); |
273 | 275 | ||
274 | ep->stopped = 1; | 276 | ep->stopped = 1; |
277 | spin_unlock(&udc->lock); | ||
275 | req->req.complete(&ep->ep, &req->req); | 278 | req->req.complete(&ep->ep, &req->req); |
279 | spin_lock(&udc->lock); | ||
276 | ep->stopped = stopped; | 280 | ep->stopped = stopped; |
277 | 281 | ||
278 | /* ep0 is always ready; other endpoints need a non-empty queue */ | 282 | /* ep0 is always ready; other endpoints need a non-empty queue */ |
@@ -472,7 +476,7 @@ static int at91_ep_enable(struct usb_ep *_ep, | |||
472 | const struct usb_endpoint_descriptor *desc) | 476 | const struct usb_endpoint_descriptor *desc) |
473 | { | 477 | { |
474 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); | 478 | struct at91_ep *ep = container_of(_ep, struct at91_ep, ep); |
475 | struct at91_udc *dev = ep->udc; | 479 | struct at91_udc *udc = ep->udc; |
476 | u16 maxpacket; | 480 | u16 maxpacket; |
477 | u32 tmp; | 481 | u32 tmp; |
478 | unsigned long flags; | 482 | unsigned long flags; |
@@ -487,7 +491,7 @@ static int at91_ep_enable(struct usb_ep *_ep, | |||
487 | return -EINVAL; | 491 | return -EINVAL; |
488 | } | 492 | } |
489 | 493 | ||
490 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { | 494 | if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
491 | DBG("bogus device state\n"); | 495 | DBG("bogus device state\n"); |
492 | return -ESHUTDOWN; | 496 | return -ESHUTDOWN; |
493 | } | 497 | } |
@@ -521,7 +525,7 @@ bogus_max: | |||
521 | } | 525 | } |
522 | 526 | ||
523 | ok: | 527 | ok: |
524 | local_irq_save(flags); | 528 | spin_lock_irqsave(&udc->lock, flags); |
525 | 529 | ||
526 | /* initialize endpoint to match this descriptor */ | 530 | /* initialize endpoint to match this descriptor */ |
527 | ep->is_in = usb_endpoint_dir_in(desc); | 531 | ep->is_in = usb_endpoint_dir_in(desc); |
@@ -540,10 +544,10 @@ ok: | |||
540 | * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, | 544 | * reset/init endpoint fifo. NOTE: leaves fifo_bank alone, |
541 | * since endpoint resets don't reset hw pingpong state. | 545 | * since endpoint resets don't reset hw pingpong state. |
542 | */ | 546 | */ |
543 | at91_udp_write(dev, AT91_UDP_RST_EP, ep->int_mask); | 547 | at91_udp_write(udc, AT91_UDP_RST_EP, ep->int_mask); |
544 | at91_udp_write(dev, AT91_UDP_RST_EP, 0); | 548 | at91_udp_write(udc, AT91_UDP_RST_EP, 0); |
545 | 549 | ||
546 | local_irq_restore(flags); | 550 | spin_unlock_irqrestore(&udc->lock, flags); |
547 | return 0; | 551 | return 0; |
548 | } | 552 | } |
549 | 553 | ||
@@ -556,7 +560,7 @@ static int at91_ep_disable (struct usb_ep * _ep) | |||
556 | if (ep == &ep->udc->ep[0]) | 560 | if (ep == &ep->udc->ep[0]) |
557 | return -EINVAL; | 561 | return -EINVAL; |
558 | 562 | ||
559 | local_irq_save(flags); | 563 | spin_lock_irqsave(&udc->lock, flags); |
560 | 564 | ||
561 | nuke(ep, -ESHUTDOWN); | 565 | nuke(ep, -ESHUTDOWN); |
562 | 566 | ||
@@ -571,7 +575,7 @@ static int at91_ep_disable (struct usb_ep * _ep) | |||
571 | __raw_writel(0, ep->creg); | 575 | __raw_writel(0, ep->creg); |
572 | } | 576 | } |
573 | 577 | ||
574 | local_irq_restore(flags); | 578 | spin_unlock_irqrestore(&udc->lock, flags); |
575 | return 0; | 579 | return 0; |
576 | } | 580 | } |
577 | 581 | ||
@@ -607,7 +611,7 @@ static int at91_ep_queue(struct usb_ep *_ep, | |||
607 | { | 611 | { |
608 | struct at91_request *req; | 612 | struct at91_request *req; |
609 | struct at91_ep *ep; | 613 | struct at91_ep *ep; |
610 | struct at91_udc *dev; | 614 | struct at91_udc *udc; |
611 | int status; | 615 | int status; |
612 | unsigned long flags; | 616 | unsigned long flags; |
613 | 617 | ||
@@ -625,9 +629,9 @@ static int at91_ep_queue(struct usb_ep *_ep, | |||
625 | return -EINVAL; | 629 | return -EINVAL; |
626 | } | 630 | } |
627 | 631 | ||
628 | dev = ep->udc; | 632 | udc = ep->udc; |
629 | 633 | ||
630 | if (!dev || !dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { | 634 | if (!udc || !udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN) { |
631 | DBG("invalid device\n"); | 635 | DBG("invalid device\n"); |
632 | return -EINVAL; | 636 | return -EINVAL; |
633 | } | 637 | } |
@@ -635,7 +639,7 @@ static int at91_ep_queue(struct usb_ep *_ep, | |||
635 | _req->status = -EINPROGRESS; | 639 | _req->status = -EINPROGRESS; |
636 | _req->actual = 0; | 640 | _req->actual = 0; |
637 | 641 | ||
638 | local_irq_save(flags); | 642 | spin_lock_irqsave(&udc->lock, flags); |
639 | 643 | ||
640 | /* try to kickstart any empty and idle queue */ | 644 | /* try to kickstart any empty and idle queue */ |
641 | if (list_empty(&ep->queue) && !ep->stopped) { | 645 | if (list_empty(&ep->queue) && !ep->stopped) { |
@@ -653,7 +657,7 @@ static int at91_ep_queue(struct usb_ep *_ep, | |||
653 | if (is_ep0) { | 657 | if (is_ep0) { |
654 | u32 tmp; | 658 | u32 tmp; |
655 | 659 | ||
656 | if (!dev->req_pending) { | 660 | if (!udc->req_pending) { |
657 | status = -EINVAL; | 661 | status = -EINVAL; |
658 | goto done; | 662 | goto done; |
659 | } | 663 | } |
@@ -662,11 +666,11 @@ static int at91_ep_queue(struct usb_ep *_ep, | |||
662 | * defer changing CONFG until after the gadget driver | 666 | * defer changing CONFG until after the gadget driver |
663 | * reconfigures the endpoints. | 667 | * reconfigures the endpoints. |
664 | */ | 668 | */ |
665 | if (dev->wait_for_config_ack) { | 669 | if (udc->wait_for_config_ack) { |
666 | tmp = at91_udp_read(dev, AT91_UDP_GLB_STAT); | 670 | tmp = at91_udp_read(udc, AT91_UDP_GLB_STAT); |
667 | tmp ^= AT91_UDP_CONFG; | 671 | tmp ^= AT91_UDP_CONFG; |
668 | VDBG("toggle config\n"); | 672 | VDBG("toggle config\n"); |
669 | at91_udp_write(dev, AT91_UDP_GLB_STAT, tmp); | 673 | at91_udp_write(udc, AT91_UDP_GLB_STAT, tmp); |
670 | } | 674 | } |
671 | if (req->req.length == 0) { | 675 | if (req->req.length == 0) { |
672 | ep0_in_status: | 676 | ep0_in_status: |
@@ -676,7 +680,7 @@ ep0_in_status: | |||
676 | tmp &= ~SET_FX; | 680 | tmp &= ~SET_FX; |
677 | tmp |= CLR_FX | AT91_UDP_TXPKTRDY; | 681 | tmp |= CLR_FX | AT91_UDP_TXPKTRDY; |
678 | __raw_writel(tmp, ep->creg); | 682 | __raw_writel(tmp, ep->creg); |
679 | dev->req_pending = 0; | 683 | udc->req_pending = 0; |
680 | goto done; | 684 | goto done; |
681 | } | 685 | } |
682 | } | 686 | } |
@@ -695,31 +699,40 @@ ep0_in_status: | |||
695 | 699 | ||
696 | if (req && !status) { | 700 | if (req && !status) { |
697 | list_add_tail (&req->queue, &ep->queue); | 701 | list_add_tail (&req->queue, &ep->queue); |
698 | at91_udp_write(dev, AT91_UDP_IER, ep->int_mask); | 702 | at91_udp_write(udc, AT91_UDP_IER, ep->int_mask); |
699 | } | 703 | } |
700 | done: | 704 | done: |
701 | local_irq_restore(flags); | 705 | spin_unlock_irqrestore(&udc->lock, flags); |
702 | return (status < 0) ? status : 0; | 706 | return (status < 0) ? status : 0; |
703 | } | 707 | } |
704 | 708 | ||
705 | static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) | 709 | static int at91_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) |
706 | { | 710 | { |
707 | struct at91_ep *ep; | 711 | struct at91_ep *ep; |
708 | struct at91_request *req; | 712 | struct at91_request *req; |
713 | unsigned long flags; | ||
714 | struct at91_udc *udc; | ||
709 | 715 | ||
710 | ep = container_of(_ep, struct at91_ep, ep); | 716 | ep = container_of(_ep, struct at91_ep, ep); |
711 | if (!_ep || ep->ep.name == ep0name) | 717 | if (!_ep || ep->ep.name == ep0name) |
712 | return -EINVAL; | 718 | return -EINVAL; |
713 | 719 | ||
720 | udc = ep->udc; | ||
721 | |||
722 | spin_lock_irqsave(&udc->lock, flags); | ||
723 | |||
714 | /* make sure it's actually queued on this endpoint */ | 724 | /* make sure it's actually queued on this endpoint */ |
715 | list_for_each_entry (req, &ep->queue, queue) { | 725 | list_for_each_entry (req, &ep->queue, queue) { |
716 | if (&req->req == _req) | 726 | if (&req->req == _req) |
717 | break; | 727 | break; |
718 | } | 728 | } |
719 | if (&req->req != _req) | 729 | if (&req->req != _req) { |
730 | spin_unlock_irqrestore(&udc->lock, flags); | ||
720 | return -EINVAL; | 731 | return -EINVAL; |
732 | } | ||
721 | 733 | ||
722 | done(ep, req, -ECONNRESET); | 734 | done(ep, req, -ECONNRESET); |
735 | spin_unlock_irqrestore(&udc->lock, flags); | ||
723 | return 0; | 736 | return 0; |
724 | } | 737 | } |
725 | 738 | ||
@@ -736,7 +749,7 @@ static int at91_ep_set_halt(struct usb_ep *_ep, int value) | |||
736 | return -EINVAL; | 749 | return -EINVAL; |
737 | 750 | ||
738 | creg = ep->creg; | 751 | creg = ep->creg; |
739 | local_irq_save(flags); | 752 | spin_lock_irqsave(&udc->lock, flags); |
740 | 753 | ||
741 | csr = __raw_readl(creg); | 754 | csr = __raw_readl(creg); |
742 | 755 | ||
@@ -761,7 +774,7 @@ static int at91_ep_set_halt(struct usb_ep *_ep, int value) | |||
761 | __raw_writel(csr, creg); | 774 | __raw_writel(csr, creg); |
762 | } | 775 | } |
763 | 776 | ||
764 | local_irq_restore(flags); | 777 | spin_unlock_irqrestore(&udc->lock, flags); |
765 | return status; | 778 | return status; |
766 | } | 779 | } |
767 | 780 | ||
@@ -795,7 +808,7 @@ static int at91_wakeup(struct usb_gadget *gadget) | |||
795 | unsigned long flags; | 808 | unsigned long flags; |
796 | 809 | ||
797 | DBG("%s\n", __func__ ); | 810 | DBG("%s\n", __func__ ); |
798 | local_irq_save(flags); | 811 | spin_lock_irqsave(&udc->lock, flags); |
799 | 812 | ||
800 | if (!udc->clocked || !udc->suspended) | 813 | if (!udc->clocked || !udc->suspended) |
801 | goto done; | 814 | goto done; |
@@ -809,7 +822,7 @@ static int at91_wakeup(struct usb_gadget *gadget) | |||
809 | at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); | 822 | at91_udp_write(udc, AT91_UDP_GLB_STAT, glbstate); |
810 | 823 | ||
811 | done: | 824 | done: |
812 | local_irq_restore(flags); | 825 | spin_unlock_irqrestore(&udc->lock, flags); |
813 | return status; | 826 | return status; |
814 | } | 827 | } |
815 | 828 | ||
@@ -851,8 +864,11 @@ static void stop_activity(struct at91_udc *udc) | |||
851 | ep->stopped = 1; | 864 | ep->stopped = 1; |
852 | nuke(ep, -ESHUTDOWN); | 865 | nuke(ep, -ESHUTDOWN); |
853 | } | 866 | } |
854 | if (driver) | 867 | if (driver) { |
868 | spin_unlock(&udc->lock); | ||
855 | driver->disconnect(&udc->gadget); | 869 | driver->disconnect(&udc->gadget); |
870 | spin_lock(&udc->lock); | ||
871 | } | ||
856 | 872 | ||
857 | udc_reinit(udc); | 873 | udc_reinit(udc); |
858 | } | 874 | } |
@@ -935,13 +951,13 @@ static int at91_vbus_session(struct usb_gadget *gadget, int is_active) | |||
935 | unsigned long flags; | 951 | unsigned long flags; |
936 | 952 | ||
937 | // VDBG("vbus %s\n", is_active ? "on" : "off"); | 953 | // VDBG("vbus %s\n", is_active ? "on" : "off"); |
938 | local_irq_save(flags); | 954 | spin_lock_irqsave(&udc->lock, flags); |
939 | udc->vbus = (is_active != 0); | 955 | udc->vbus = (is_active != 0); |
940 | if (udc->driver) | 956 | if (udc->driver) |
941 | pullup(udc, is_active); | 957 | pullup(udc, is_active); |
942 | else | 958 | else |
943 | pullup(udc, 0); | 959 | pullup(udc, 0); |
944 | local_irq_restore(flags); | 960 | spin_unlock_irqrestore(&udc->lock, flags); |
945 | return 0; | 961 | return 0; |
946 | } | 962 | } |
947 | 963 | ||
@@ -950,10 +966,10 @@ static int at91_pullup(struct usb_gadget *gadget, int is_on) | |||
950 | struct at91_udc *udc = to_udc(gadget); | 966 | struct at91_udc *udc = to_udc(gadget); |
951 | unsigned long flags; | 967 | unsigned long flags; |
952 | 968 | ||
953 | local_irq_save(flags); | 969 | spin_lock_irqsave(&udc->lock, flags); |
954 | udc->enabled = is_on = !!is_on; | 970 | udc->enabled = is_on = !!is_on; |
955 | pullup(udc, is_on); | 971 | pullup(udc, is_on); |
956 | local_irq_restore(flags); | 972 | spin_unlock_irqrestore(&udc->lock, flags); |
957 | return 0; | 973 | return 0; |
958 | } | 974 | } |
959 | 975 | ||
@@ -962,9 +978,9 @@ static int at91_set_selfpowered(struct usb_gadget *gadget, int is_on) | |||
962 | struct at91_udc *udc = to_udc(gadget); | 978 | struct at91_udc *udc = to_udc(gadget); |
963 | unsigned long flags; | 979 | unsigned long flags; |
964 | 980 | ||
965 | local_irq_save(flags); | 981 | spin_lock_irqsave(&udc->lock, flags); |
966 | udc->selfpowered = (is_on != 0); | 982 | udc->selfpowered = (is_on != 0); |
967 | local_irq_restore(flags); | 983 | spin_unlock_irqrestore(&udc->lock, flags); |
968 | return 0; | 984 | return 0; |
969 | } | 985 | } |
970 | 986 | ||
@@ -1226,8 +1242,11 @@ static void handle_setup(struct at91_udc *udc, struct at91_ep *ep, u32 csr) | |||
1226 | #undef w_length | 1242 | #undef w_length |
1227 | 1243 | ||
1228 | /* pass request up to the gadget driver */ | 1244 | /* pass request up to the gadget driver */ |
1229 | if (udc->driver) | 1245 | if (udc->driver) { |
1246 | spin_unlock(&udc->lock); | ||
1230 | status = udc->driver->setup(&udc->gadget, &pkt.r); | 1247 | status = udc->driver->setup(&udc->gadget, &pkt.r); |
1248 | spin_lock(&udc->lock); | ||
1249 | } | ||
1231 | else | 1250 | else |
1232 | status = -ENODEV; | 1251 | status = -ENODEV; |
1233 | if (status < 0) { | 1252 | if (status < 0) { |
@@ -1378,6 +1397,9 @@ static irqreturn_t at91_udc_irq (int irq, void *_udc) | |||
1378 | struct at91_udc *udc = _udc; | 1397 | struct at91_udc *udc = _udc; |
1379 | u32 rescans = 5; | 1398 | u32 rescans = 5; |
1380 | int disable_clock = 0; | 1399 | int disable_clock = 0; |
1400 | unsigned long flags; | ||
1401 | |||
1402 | spin_lock_irqsave(&udc->lock, flags); | ||
1381 | 1403 | ||
1382 | if (!udc->clocked) { | 1404 | if (!udc->clocked) { |
1383 | clk_on(udc); | 1405 | clk_on(udc); |
@@ -1433,8 +1455,11 @@ static irqreturn_t at91_udc_irq (int irq, void *_udc) | |||
1433 | * and then into standby to avoid drawing more than | 1455 | * and then into standby to avoid drawing more than |
1434 | * 500uA power (2500uA for some high-power configs). | 1456 | * 500uA power (2500uA for some high-power configs). |
1435 | */ | 1457 | */ |
1436 | if (udc->driver && udc->driver->suspend) | 1458 | if (udc->driver && udc->driver->suspend) { |
1459 | spin_unlock(&udc->lock); | ||
1437 | udc->driver->suspend(&udc->gadget); | 1460 | udc->driver->suspend(&udc->gadget); |
1461 | spin_lock(&udc->lock); | ||
1462 | } | ||
1438 | 1463 | ||
1439 | /* host initiated resume */ | 1464 | /* host initiated resume */ |
1440 | } else if (status & AT91_UDP_RXRSM) { | 1465 | } else if (status & AT91_UDP_RXRSM) { |
@@ -1451,8 +1476,11 @@ static irqreturn_t at91_udc_irq (int irq, void *_udc) | |||
1451 | * would normally want to switch out of slow clock | 1476 | * would normally want to switch out of slow clock |
1452 | * mode into normal mode. | 1477 | * mode into normal mode. |
1453 | */ | 1478 | */ |
1454 | if (udc->driver && udc->driver->resume) | 1479 | if (udc->driver && udc->driver->resume) { |
1480 | spin_unlock(&udc->lock); | ||
1455 | udc->driver->resume(&udc->gadget); | 1481 | udc->driver->resume(&udc->gadget); |
1482 | spin_lock(&udc->lock); | ||
1483 | } | ||
1456 | 1484 | ||
1457 | /* endpoint IRQs are cleared by handling them */ | 1485 | /* endpoint IRQs are cleared by handling them */ |
1458 | } else { | 1486 | } else { |
@@ -1474,6 +1502,8 @@ static irqreturn_t at91_udc_irq (int irq, void *_udc) | |||
1474 | if (disable_clock) | 1502 | if (disable_clock) |
1475 | clk_off(udc); | 1503 | clk_off(udc); |
1476 | 1504 | ||
1505 | spin_unlock_irqrestore(&udc->lock, flags); | ||
1506 | |||
1477 | return IRQ_HANDLED; | 1507 | return IRQ_HANDLED; |
1478 | } | 1508 | } |
1479 | 1509 | ||
@@ -1556,24 +1586,53 @@ static struct at91_udc controller = { | |||
1556 | /* ep6 and ep7 are also reserved (custom silicon might use them) */ | 1586 | /* ep6 and ep7 are also reserved (custom silicon might use them) */ |
1557 | }; | 1587 | }; |
1558 | 1588 | ||
1589 | static void at91_vbus_update(struct at91_udc *udc, unsigned value) | ||
1590 | { | ||
1591 | value ^= udc->board.vbus_active_low; | ||
1592 | if (value != udc->vbus) | ||
1593 | at91_vbus_session(&udc->gadget, value); | ||
1594 | } | ||
1595 | |||
1559 | static irqreturn_t at91_vbus_irq(int irq, void *_udc) | 1596 | static irqreturn_t at91_vbus_irq(int irq, void *_udc) |
1560 | { | 1597 | { |
1561 | struct at91_udc *udc = _udc; | 1598 | struct at91_udc *udc = _udc; |
1562 | unsigned value; | ||
1563 | 1599 | ||
1564 | /* vbus needs at least brief debouncing */ | 1600 | /* vbus needs at least brief debouncing */ |
1565 | udelay(10); | 1601 | udelay(10); |
1566 | value = gpio_get_value(udc->board.vbus_pin); | 1602 | at91_vbus_update(udc, gpio_get_value(udc->board.vbus_pin)); |
1567 | if (value != udc->vbus) | ||
1568 | at91_vbus_session(&udc->gadget, value); | ||
1569 | 1603 | ||
1570 | return IRQ_HANDLED; | 1604 | return IRQ_HANDLED; |
1571 | } | 1605 | } |
1572 | 1606 | ||
1607 | static void at91_vbus_timer_work(struct work_struct *work) | ||
1608 | { | ||
1609 | struct at91_udc *udc = container_of(work, struct at91_udc, | ||
1610 | vbus_timer_work); | ||
1611 | |||
1612 | at91_vbus_update(udc, gpio_get_value_cansleep(udc->board.vbus_pin)); | ||
1613 | |||
1614 | if (!timer_pending(&udc->vbus_timer)) | ||
1615 | mod_timer(&udc->vbus_timer, jiffies + VBUS_POLL_TIMEOUT); | ||
1616 | } | ||
1617 | |||
1618 | static void at91_vbus_timer(unsigned long data) | ||
1619 | { | ||
1620 | struct at91_udc *udc = (struct at91_udc *)data; | ||
1621 | |||
1622 | /* | ||
1623 | * If we are polling vbus it is likely that the gpio is on an | ||
1624 | * bus such as i2c or spi which may sleep, so schedule some work | ||
1625 | * to read the vbus gpio | ||
1626 | */ | ||
1627 | if (!work_pending(&udc->vbus_timer_work)) | ||
1628 | schedule_work(&udc->vbus_timer_work); | ||
1629 | } | ||
1630 | |||
1573 | int usb_gadget_register_driver (struct usb_gadget_driver *driver) | 1631 | int usb_gadget_register_driver (struct usb_gadget_driver *driver) |
1574 | { | 1632 | { |
1575 | struct at91_udc *udc = &controller; | 1633 | struct at91_udc *udc = &controller; |
1576 | int retval; | 1634 | int retval; |
1635 | unsigned long flags; | ||
1577 | 1636 | ||
1578 | if (!driver | 1637 | if (!driver |
1579 | || driver->speed < USB_SPEED_FULL | 1638 | || driver->speed < USB_SPEED_FULL |
@@ -1605,9 +1664,9 @@ int usb_gadget_register_driver (struct usb_gadget_driver *driver) | |||
1605 | return retval; | 1664 | return retval; |
1606 | } | 1665 | } |
1607 | 1666 | ||
1608 | local_irq_disable(); | 1667 | spin_lock_irqsave(&udc->lock, flags); |
1609 | pullup(udc, 1); | 1668 | pullup(udc, 1); |
1610 | local_irq_enable(); | 1669 | spin_unlock_irqrestore(&udc->lock, flags); |
1611 | 1670 | ||
1612 | DBG("bound to %s\n", driver->driver.name); | 1671 | DBG("bound to %s\n", driver->driver.name); |
1613 | return 0; | 1672 | return 0; |
@@ -1617,15 +1676,16 @@ EXPORT_SYMBOL (usb_gadget_register_driver); | |||
1617 | int usb_gadget_unregister_driver (struct usb_gadget_driver *driver) | 1676 | int usb_gadget_unregister_driver (struct usb_gadget_driver *driver) |
1618 | { | 1677 | { |
1619 | struct at91_udc *udc = &controller; | 1678 | struct at91_udc *udc = &controller; |
1679 | unsigned long flags; | ||
1620 | 1680 | ||
1621 | if (!driver || driver != udc->driver || !driver->unbind) | 1681 | if (!driver || driver != udc->driver || !driver->unbind) |
1622 | return -EINVAL; | 1682 | return -EINVAL; |
1623 | 1683 | ||
1624 | local_irq_disable(); | 1684 | spin_lock_irqsave(&udc->lock, flags); |
1625 | udc->enabled = 0; | 1685 | udc->enabled = 0; |
1626 | at91_udp_write(udc, AT91_UDP_IDR, ~0); | 1686 | at91_udp_write(udc, AT91_UDP_IDR, ~0); |
1627 | pullup(udc, 0); | 1687 | pullup(udc, 0); |
1628 | local_irq_enable(); | 1688 | spin_unlock_irqrestore(&udc->lock, flags); |
1629 | 1689 | ||
1630 | driver->unbind(&udc->gadget); | 1690 | driver->unbind(&udc->gadget); |
1631 | udc->gadget.dev.driver = NULL; | 1691 | udc->gadget.dev.driver = NULL; |
@@ -1641,8 +1701,13 @@ EXPORT_SYMBOL (usb_gadget_unregister_driver); | |||
1641 | 1701 | ||
1642 | static void at91udc_shutdown(struct platform_device *dev) | 1702 | static void at91udc_shutdown(struct platform_device *dev) |
1643 | { | 1703 | { |
1704 | struct at91_udc *udc = platform_get_drvdata(dev); | ||
1705 | unsigned long flags; | ||
1706 | |||
1644 | /* force disconnect on reboot */ | 1707 | /* force disconnect on reboot */ |
1708 | spin_lock_irqsave(&udc->lock, flags); | ||
1645 | pullup(platform_get_drvdata(dev), 0); | 1709 | pullup(platform_get_drvdata(dev), 0); |
1710 | spin_unlock_irqrestore(&udc->lock, flags); | ||
1646 | } | 1711 | } |
1647 | 1712 | ||
1648 | static int __init at91udc_probe(struct platform_device *pdev) | 1713 | static int __init at91udc_probe(struct platform_device *pdev) |
@@ -1683,6 +1748,7 @@ static int __init at91udc_probe(struct platform_device *pdev) | |||
1683 | udc->board = *(struct at91_udc_data *) dev->platform_data; | 1748 | udc->board = *(struct at91_udc_data *) dev->platform_data; |
1684 | udc->pdev = pdev; | 1749 | udc->pdev = pdev; |
1685 | udc->enabled = 0; | 1750 | udc->enabled = 0; |
1751 | spin_lock_init(&udc->lock); | ||
1686 | 1752 | ||
1687 | /* rm9200 needs manual D+ pullup; off by default */ | 1753 | /* rm9200 needs manual D+ pullup; off by default */ |
1688 | if (cpu_is_at91rm9200()) { | 1754 | if (cpu_is_at91rm9200()) { |
@@ -1763,13 +1829,23 @@ static int __init at91udc_probe(struct platform_device *pdev) | |||
1763 | * Get the initial state of VBUS - we cannot expect | 1829 | * Get the initial state of VBUS - we cannot expect |
1764 | * a pending interrupt. | 1830 | * a pending interrupt. |
1765 | */ | 1831 | */ |
1766 | udc->vbus = gpio_get_value(udc->board.vbus_pin); | 1832 | udc->vbus = gpio_get_value_cansleep(udc->board.vbus_pin) ^ |
1767 | if (request_irq(udc->board.vbus_pin, at91_vbus_irq, | 1833 | udc->board.vbus_active_low; |
1768 | IRQF_DISABLED, driver_name, udc)) { | 1834 | |
1769 | DBG("request vbus irq %d failed\n", | 1835 | if (udc->board.vbus_polled) { |
1770 | udc->board.vbus_pin); | 1836 | INIT_WORK(&udc->vbus_timer_work, at91_vbus_timer_work); |
1771 | retval = -EBUSY; | 1837 | setup_timer(&udc->vbus_timer, at91_vbus_timer, |
1772 | goto fail3; | 1838 | (unsigned long)udc); |
1839 | mod_timer(&udc->vbus_timer, | ||
1840 | jiffies + VBUS_POLL_TIMEOUT); | ||
1841 | } else { | ||
1842 | if (request_irq(udc->board.vbus_pin, at91_vbus_irq, | ||
1843 | IRQF_DISABLED, driver_name, udc)) { | ||
1844 | DBG("request vbus irq %d failed\n", | ||
1845 | udc->board.vbus_pin); | ||
1846 | retval = -EBUSY; | ||
1847 | goto fail3; | ||
1848 | } | ||
1773 | } | 1849 | } |
1774 | } else { | 1850 | } else { |
1775 | DBG("no VBUS detection, assuming always-on\n"); | 1851 | DBG("no VBUS detection, assuming always-on\n"); |
@@ -1804,13 +1880,16 @@ static int __exit at91udc_remove(struct platform_device *pdev) | |||
1804 | { | 1880 | { |
1805 | struct at91_udc *udc = platform_get_drvdata(pdev); | 1881 | struct at91_udc *udc = platform_get_drvdata(pdev); |
1806 | struct resource *res; | 1882 | struct resource *res; |
1883 | unsigned long flags; | ||
1807 | 1884 | ||
1808 | DBG("remove\n"); | 1885 | DBG("remove\n"); |
1809 | 1886 | ||
1810 | if (udc->driver) | 1887 | if (udc->driver) |
1811 | return -EBUSY; | 1888 | return -EBUSY; |
1812 | 1889 | ||
1890 | spin_lock_irqsave(&udc->lock, flags); | ||
1813 | pullup(udc, 0); | 1891 | pullup(udc, 0); |
1892 | spin_unlock_irqrestore(&udc->lock, flags); | ||
1814 | 1893 | ||
1815 | device_init_wakeup(&pdev->dev, 0); | 1894 | device_init_wakeup(&pdev->dev, 0); |
1816 | remove_debug_file(udc); | 1895 | remove_debug_file(udc); |
@@ -1840,6 +1919,7 @@ static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) | |||
1840 | { | 1919 | { |
1841 | struct at91_udc *udc = platform_get_drvdata(pdev); | 1920 | struct at91_udc *udc = platform_get_drvdata(pdev); |
1842 | int wake = udc->driver && device_may_wakeup(&pdev->dev); | 1921 | int wake = udc->driver && device_may_wakeup(&pdev->dev); |
1922 | unsigned long flags; | ||
1843 | 1923 | ||
1844 | /* Unless we can act normally to the host (letting it wake us up | 1924 | /* Unless we can act normally to the host (letting it wake us up |
1845 | * whenever it has work for us) force disconnect. Wakeup requires | 1925 | * whenever it has work for us) force disconnect. Wakeup requires |
@@ -1849,13 +1929,15 @@ static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) | |||
1849 | if ((!udc->suspended && udc->addr) | 1929 | if ((!udc->suspended && udc->addr) |
1850 | || !wake | 1930 | || !wake |
1851 | || at91_suspend_entering_slow_clock()) { | 1931 | || at91_suspend_entering_slow_clock()) { |
1932 | spin_lock_irqsave(&udc->lock, flags); | ||
1852 | pullup(udc, 0); | 1933 | pullup(udc, 0); |
1853 | wake = 0; | 1934 | wake = 0; |
1935 | spin_unlock_irqrestore(&udc->lock, flags); | ||
1854 | } else | 1936 | } else |
1855 | enable_irq_wake(udc->udp_irq); | 1937 | enable_irq_wake(udc->udp_irq); |
1856 | 1938 | ||
1857 | udc->active_suspend = wake; | 1939 | udc->active_suspend = wake; |
1858 | if (udc->board.vbus_pin > 0 && wake) | 1940 | if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && wake) |
1859 | enable_irq_wake(udc->board.vbus_pin); | 1941 | enable_irq_wake(udc->board.vbus_pin); |
1860 | return 0; | 1942 | return 0; |
1861 | } | 1943 | } |
@@ -1863,15 +1945,20 @@ static int at91udc_suspend(struct platform_device *pdev, pm_message_t mesg) | |||
1863 | static int at91udc_resume(struct platform_device *pdev) | 1945 | static int at91udc_resume(struct platform_device *pdev) |
1864 | { | 1946 | { |
1865 | struct at91_udc *udc = platform_get_drvdata(pdev); | 1947 | struct at91_udc *udc = platform_get_drvdata(pdev); |
1948 | unsigned long flags; | ||
1866 | 1949 | ||
1867 | if (udc->board.vbus_pin > 0 && udc->active_suspend) | 1950 | if (udc->board.vbus_pin > 0 && !udc->board.vbus_polled && |
1951 | udc->active_suspend) | ||
1868 | disable_irq_wake(udc->board.vbus_pin); | 1952 | disable_irq_wake(udc->board.vbus_pin); |
1869 | 1953 | ||
1870 | /* maybe reconnect to host; if so, clocks on */ | 1954 | /* maybe reconnect to host; if so, clocks on */ |
1871 | if (udc->active_suspend) | 1955 | if (udc->active_suspend) |
1872 | disable_irq_wake(udc->udp_irq); | 1956 | disable_irq_wake(udc->udp_irq); |
1873 | else | 1957 | else { |
1958 | spin_lock_irqsave(&udc->lock, flags); | ||
1874 | pullup(udc, 1); | 1959 | pullup(udc, 1); |
1960 | spin_unlock_irqrestore(&udc->lock, flags); | ||
1961 | } | ||
1875 | return 0; | 1962 | return 0; |
1876 | } | 1963 | } |
1877 | #else | 1964 | #else |
diff --git a/drivers/usb/gadget/at91_udc.h b/drivers/usb/gadget/at91_udc.h index c65d62295890..108ca54f9092 100644 --- a/drivers/usb/gadget/at91_udc.h +++ b/drivers/usb/gadget/at91_udc.h | |||
@@ -144,6 +144,9 @@ struct at91_udc { | |||
144 | struct proc_dir_entry *pde; | 144 | struct proc_dir_entry *pde; |
145 | void __iomem *udp_baseaddr; | 145 | void __iomem *udp_baseaddr; |
146 | int udp_irq; | 146 | int udp_irq; |
147 | spinlock_t lock; | ||
148 | struct timer_list vbus_timer; | ||
149 | struct work_struct vbus_timer_work; | ||
147 | }; | 150 | }; |
148 | 151 | ||
149 | static inline struct at91_udc *to_udc(struct usb_gadget *g) | 152 | static inline struct at91_udc *to_udc(struct usb_gadget *g) |
diff --git a/drivers/usb/gadget/fsl_mxc_udc.c b/drivers/usb/gadget/fsl_mxc_udc.c index d0b8bde59e59..eafa6d2c5ed7 100644 --- a/drivers/usb/gadget/fsl_mxc_udc.c +++ b/drivers/usb/gadget/fsl_mxc_udc.c | |||
@@ -30,7 +30,7 @@ int fsl_udc_clk_init(struct platform_device *pdev) | |||
30 | 30 | ||
31 | pdata = pdev->dev.platform_data; | 31 | pdata = pdev->dev.platform_data; |
32 | 32 | ||
33 | if (!cpu_is_mx35()) { | 33 | if (!cpu_is_mx35() && !cpu_is_mx25()) { |
34 | mxc_ahb_clk = clk_get(&pdev->dev, "usb_ahb"); | 34 | mxc_ahb_clk = clk_get(&pdev->dev, "usb_ahb"); |
35 | if (IS_ERR(mxc_ahb_clk)) | 35 | if (IS_ERR(mxc_ahb_clk)) |
36 | return PTR_ERR(mxc_ahb_clk); | 36 | return PTR_ERR(mxc_ahb_clk); |
diff --git a/drivers/usb/host/ehci-mxc.c b/drivers/usb/host/ehci-mxc.c index bd4027745aa7..a8ad8ac120a2 100644 --- a/drivers/usb/host/ehci-mxc.c +++ b/drivers/usb/host/ehci-mxc.c | |||
@@ -182,7 +182,7 @@ static int ehci_mxc_drv_probe(struct platform_device *pdev) | |||
182 | } | 182 | } |
183 | clk_enable(priv->usbclk); | 183 | clk_enable(priv->usbclk); |
184 | 184 | ||
185 | if (!cpu_is_mx35()) { | 185 | if (!cpu_is_mx35() && !cpu_is_mx25()) { |
186 | priv->ahbclk = clk_get(dev, "usb_ahb"); | 186 | priv->ahbclk = clk_get(dev, "usb_ahb"); |
187 | if (IS_ERR(priv->ahbclk)) { | 187 | if (IS_ERR(priv->ahbclk)) { |
188 | ret = PTR_ERR(priv->ahbclk); | 188 | ret = PTR_ERR(priv->ahbclk); |
diff --git a/drivers/video/imxfb.c b/drivers/video/imxfb.c index b4b6deceed15..43f0639b1c10 100644 --- a/drivers/video/imxfb.c +++ b/drivers/video/imxfb.c | |||
@@ -175,6 +175,7 @@ struct imxfb_info { | |||
175 | 175 | ||
176 | struct imx_fb_videomode *mode; | 176 | struct imx_fb_videomode *mode; |
177 | int num_modes; | 177 | int num_modes; |
178 | struct backlight_device *bl; | ||
178 | 179 | ||
179 | void (*lcd_power)(int); | 180 | void (*lcd_power)(int); |
180 | void (*backlight_power)(int); | 181 | void (*backlight_power)(int); |
@@ -449,6 +450,73 @@ static int imxfb_set_par(struct fb_info *info) | |||
449 | return 0; | 450 | return 0; |
450 | } | 451 | } |
451 | 452 | ||
453 | |||
454 | |||
455 | static int imxfb_bl_get_brightness(struct backlight_device *bl) | ||
456 | { | ||
457 | struct imxfb_info *fbi = bl_get_data(bl); | ||
458 | |||
459 | return readl(fbi->regs + LCDC_PWMR) & 0xFF; | ||
460 | } | ||
461 | |||
462 | static int imxfb_bl_update_status(struct backlight_device *bl) | ||
463 | { | ||
464 | struct imxfb_info *fbi = bl_get_data(bl); | ||
465 | int brightness = bl->props.brightness; | ||
466 | |||
467 | if (bl->props.power != FB_BLANK_UNBLANK) | ||
468 | brightness = 0; | ||
469 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | ||
470 | brightness = 0; | ||
471 | |||
472 | fbi->pwmr = (fbi->pwmr & ~0xFF) | brightness; | ||
473 | |||
474 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | ||
475 | clk_enable(fbi->clk); | ||
476 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | ||
477 | if (bl->props.fb_blank != FB_BLANK_UNBLANK) | ||
478 | clk_disable(fbi->clk); | ||
479 | |||
480 | return 0; | ||
481 | } | ||
482 | |||
483 | static const struct backlight_ops imxfb_lcdc_bl_ops = { | ||
484 | .update_status = imxfb_bl_update_status, | ||
485 | .get_brightness = imxfb_bl_get_brightness, | ||
486 | }; | ||
487 | |||
488 | static void imxfb_init_backlight(struct imxfb_info *fbi) | ||
489 | { | ||
490 | struct backlight_properties props; | ||
491 | struct backlight_device *bl; | ||
492 | |||
493 | if (fbi->bl) | ||
494 | return; | ||
495 | |||
496 | memset(&props, 0, sizeof(struct backlight_properties)); | ||
497 | props.max_brightness = 0xff; | ||
498 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | ||
499 | |||
500 | bl = backlight_device_register("imxfb-bl", &fbi->pdev->dev, fbi, | ||
501 | &imxfb_lcdc_bl_ops, &props); | ||
502 | if (IS_ERR(bl)) { | ||
503 | dev_err(&fbi->pdev->dev, "error %ld on backlight register\n", | ||
504 | PTR_ERR(bl)); | ||
505 | return; | ||
506 | } | ||
507 | |||
508 | fbi->bl = bl; | ||
509 | bl->props.power = FB_BLANK_UNBLANK; | ||
510 | bl->props.fb_blank = FB_BLANK_UNBLANK; | ||
511 | bl->props.brightness = imxfb_bl_get_brightness(bl); | ||
512 | } | ||
513 | |||
514 | static void imxfb_exit_backlight(struct imxfb_info *fbi) | ||
515 | { | ||
516 | if (fbi->bl) | ||
517 | backlight_device_unregister(fbi->bl); | ||
518 | } | ||
519 | |||
452 | static void imxfb_enable_controller(struct imxfb_info *fbi) | 520 | static void imxfb_enable_controller(struct imxfb_info *fbi) |
453 | { | 521 | { |
454 | pr_debug("Enabling LCD controller\n"); | 522 | pr_debug("Enabling LCD controller\n"); |
@@ -579,7 +647,6 @@ static int imxfb_activate_var(struct fb_var_screeninfo *var, struct fb_info *inf | |||
579 | fbi->regs + LCDC_SIZE); | 647 | fbi->regs + LCDC_SIZE); |
580 | 648 | ||
581 | writel(fbi->pcr, fbi->regs + LCDC_PCR); | 649 | writel(fbi->pcr, fbi->regs + LCDC_PCR); |
582 | writel(fbi->pwmr, fbi->regs + LCDC_PWMR); | ||
583 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); | 650 | writel(fbi->lscr1, fbi->regs + LCDC_LSCR1); |
584 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); | 651 | writel(fbi->dmacr, fbi->regs + LCDC_DMACR); |
585 | 652 | ||
@@ -779,6 +846,8 @@ static int __init imxfb_probe(struct platform_device *pdev) | |||
779 | } | 846 | } |
780 | 847 | ||
781 | imxfb_enable_controller(fbi); | 848 | imxfb_enable_controller(fbi); |
849 | fbi->pdev = pdev; | ||
850 | imxfb_init_backlight(fbi); | ||
782 | 851 | ||
783 | return 0; | 852 | return 0; |
784 | 853 | ||
@@ -816,6 +885,7 @@ static int __devexit imxfb_remove(struct platform_device *pdev) | |||
816 | 885 | ||
817 | imxfb_disable_controller(fbi); | 886 | imxfb_disable_controller(fbi); |
818 | 887 | ||
888 | imxfb_exit_backlight(fbi); | ||
819 | unregister_framebuffer(info); | 889 | unregister_framebuffer(info); |
820 | 890 | ||
821 | pdata = pdev->dev.platform_data; | 891 | pdata = pdev->dev.platform_data; |
diff --git a/drivers/video/omap2/vram.c b/drivers/video/omap2/vram.c index 3b1237ad85ed..f6fdc2085f3e 100644 --- a/drivers/video/omap2/vram.c +++ b/drivers/video/omap2/vram.c | |||
@@ -25,7 +25,7 @@ | |||
25 | #include <linux/list.h> | 25 | #include <linux/list.h> |
26 | #include <linux/slab.h> | 26 | #include <linux/slab.h> |
27 | #include <linux/seq_file.h> | 27 | #include <linux/seq_file.h> |
28 | #include <linux/bootmem.h> | 28 | #include <linux/memblock.h> |
29 | #include <linux/completion.h> | 29 | #include <linux/completion.h> |
30 | #include <linux/debugfs.h> | 30 | #include <linux/debugfs.h> |
31 | #include <linux/jiffies.h> | 31 | #include <linux/jiffies.h> |
@@ -525,10 +525,8 @@ early_param("vram", omap_vram_early_vram); | |||
525 | * Called from map_io. We need to call to this early enough so that we | 525 | * Called from map_io. We need to call to this early enough so that we |
526 | * can reserve the fixed SDRAM regions before VM could get hold of them. | 526 | * can reserve the fixed SDRAM regions before VM could get hold of them. |
527 | */ | 527 | */ |
528 | void __init omap_vram_reserve_sdram(void) | 528 | void __init omap_vram_reserve_sdram_memblock(void) |
529 | { | 529 | { |
530 | struct bootmem_data *bdata; | ||
531 | unsigned long sdram_start, sdram_size; | ||
532 | u32 paddr; | 530 | u32 paddr; |
533 | u32 size = 0; | 531 | u32 size = 0; |
534 | 532 | ||
@@ -555,29 +553,28 @@ void __init omap_vram_reserve_sdram(void) | |||
555 | 553 | ||
556 | size = PAGE_ALIGN(size); | 554 | size = PAGE_ALIGN(size); |
557 | 555 | ||
558 | bdata = NODE_DATA(0)->bdata; | ||
559 | sdram_start = bdata->node_min_pfn << PAGE_SHIFT; | ||
560 | sdram_size = (bdata->node_low_pfn << PAGE_SHIFT) - sdram_start; | ||
561 | |||
562 | if (paddr) { | 556 | if (paddr) { |
563 | if ((paddr & ~PAGE_MASK) || paddr < sdram_start || | 557 | struct memblock_property res; |
564 | paddr + size > sdram_start + sdram_size) { | 558 | |
559 | res.base = paddr; | ||
560 | res.size = size; | ||
561 | if ((paddr & ~PAGE_MASK) || memblock_find(&res) || | ||
562 | res.base != paddr || res.size != size) { | ||
565 | pr_err("Illegal SDRAM region for VRAM\n"); | 563 | pr_err("Illegal SDRAM region for VRAM\n"); |
566 | return; | 564 | return; |
567 | } | 565 | } |
568 | 566 | ||
569 | if (reserve_bootmem(paddr, size, BOOTMEM_EXCLUSIVE) < 0) { | 567 | if (memblock_is_region_reserved(paddr, size)) { |
570 | pr_err("FB: failed to reserve VRAM\n"); | 568 | pr_err("FB: failed to reserve VRAM - busy\n"); |
571 | return; | 569 | return; |
572 | } | 570 | } |
573 | } else { | 571 | |
574 | if (size > sdram_size) { | 572 | if (memblock_reserve(paddr, size) < 0) { |
575 | pr_err("Illegal SDRAM size for VRAM\n"); | 573 | pr_err("FB: failed to reserve VRAM - no memory\n"); |
576 | return; | 574 | return; |
577 | } | 575 | } |
578 | 576 | } else { | |
579 | paddr = virt_to_phys(alloc_bootmem_pages(size)); | 577 | paddr = memblock_alloc_base(size, PAGE_SIZE, MEMBLOCK_REAL_LIMIT); |
580 | BUG_ON(paddr & ~PAGE_MASK); | ||
581 | } | 578 | } |
582 | 579 | ||
583 | omap_vram_add_region(paddr, size); | 580 | omap_vram_add_region(paddr, size); |