diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/serial/mpc52xx_uart.c | 251 |
1 files changed, 236 insertions, 15 deletions
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c index 7ce9e9f567a3..3119fddaedb5 100644 --- a/drivers/serial/mpc52xx_uart.c +++ b/drivers/serial/mpc52xx_uart.c | |||
@@ -74,6 +74,7 @@ | |||
74 | #include <linux/io.h> | 74 | #include <linux/io.h> |
75 | #include <linux/of.h> | 75 | #include <linux/of.h> |
76 | #include <linux/of_platform.h> | 76 | #include <linux/of_platform.h> |
77 | #include <linux/clk.h> | ||
77 | 78 | ||
78 | #include <asm/mpc52xx.h> | 79 | #include <asm/mpc52xx.h> |
79 | #include <asm/mpc52xx_psc.h> | 80 | #include <asm/mpc52xx_psc.h> |
@@ -113,6 +114,7 @@ static void mpc52xx_uart_of_enumerate(void); | |||
113 | 114 | ||
114 | /* Forward declaration of the interruption handling routine */ | 115 | /* Forward declaration of the interruption handling routine */ |
115 | static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id); | 116 | static irqreturn_t mpc52xx_uart_int(int irq, void *dev_id); |
117 | static irqreturn_t mpc5xxx_uart_process_int(struct uart_port *port); | ||
116 | 118 | ||
117 | 119 | ||
118 | /* Simple macro to test if a port is console or not. This one is taken | 120 | /* Simple macro to test if a port is console or not. This one is taken |
@@ -145,6 +147,11 @@ struct psc_ops { | |||
145 | void (*cw_disable_ints)(struct uart_port *port); | 147 | void (*cw_disable_ints)(struct uart_port *port); |
146 | void (*cw_restore_ints)(struct uart_port *port); | 148 | void (*cw_restore_ints)(struct uart_port *port); |
147 | unsigned long (*getuartclk)(void *p); | 149 | unsigned long (*getuartclk)(void *p); |
150 | int (*clock)(struct uart_port *port, int enable); | ||
151 | int (*fifoc_init)(void); | ||
152 | void (*fifoc_uninit)(void); | ||
153 | void (*get_irq)(struct uart_port *, struct device_node *); | ||
154 | irqreturn_t (*handle_irq)(struct uart_port *port); | ||
148 | }; | 155 | }; |
149 | 156 | ||
150 | #ifdef CONFIG_PPC_MPC52xx | 157 | #ifdef CONFIG_PPC_MPC52xx |
@@ -256,6 +263,18 @@ static unsigned long mpc52xx_getuartclk(void *p) | |||
256 | return mpc5xxx_get_bus_frequency(p) / 2; | 263 | return mpc5xxx_get_bus_frequency(p) / 2; |
257 | } | 264 | } |
258 | 265 | ||
266 | static void mpc52xx_psc_get_irq(struct uart_port *port, struct device_node *np) | ||
267 | { | ||
268 | port->irqflags = IRQF_DISABLED; | ||
269 | port->irq = irq_of_parse_and_map(np, 0); | ||
270 | } | ||
271 | |||
272 | /* 52xx specific interrupt handler. The caller holds the port lock */ | ||
273 | static irqreturn_t mpc52xx_psc_handle_irq(struct uart_port *port) | ||
274 | { | ||
275 | return mpc5xxx_uart_process_int(port); | ||
276 | } | ||
277 | |||
259 | static struct psc_ops mpc52xx_psc_ops = { | 278 | static struct psc_ops mpc52xx_psc_ops = { |
260 | .fifo_init = mpc52xx_psc_fifo_init, | 279 | .fifo_init = mpc52xx_psc_fifo_init, |
261 | .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, | 280 | .raw_rx_rdy = mpc52xx_psc_raw_rx_rdy, |
@@ -273,14 +292,32 @@ static struct psc_ops mpc52xx_psc_ops = { | |||
273 | .cw_disable_ints = mpc52xx_psc_cw_disable_ints, | 292 | .cw_disable_ints = mpc52xx_psc_cw_disable_ints, |
274 | .cw_restore_ints = mpc52xx_psc_cw_restore_ints, | 293 | .cw_restore_ints = mpc52xx_psc_cw_restore_ints, |
275 | .getuartclk = mpc52xx_getuartclk, | 294 | .getuartclk = mpc52xx_getuartclk, |
295 | .get_irq = mpc52xx_psc_get_irq, | ||
296 | .handle_irq = mpc52xx_psc_handle_irq, | ||
276 | }; | 297 | }; |
277 | 298 | ||
278 | #endif /* CONFIG_MPC52xx */ | 299 | #endif /* CONFIG_MPC52xx */ |
279 | 300 | ||
280 | #ifdef CONFIG_PPC_MPC512x | 301 | #ifdef CONFIG_PPC_MPC512x |
281 | #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1)) | 302 | #define FIFO_512x(port) ((struct mpc512x_psc_fifo __iomem *)(PSC(port)+1)) |
303 | |||
304 | /* PSC FIFO Controller for mpc512x */ | ||
305 | struct psc_fifoc { | ||
306 | u32 fifoc_cmd; | ||
307 | u32 fifoc_int; | ||
308 | u32 fifoc_dma; | ||
309 | u32 fifoc_axe; | ||
310 | u32 fifoc_debug; | ||
311 | }; | ||
312 | |||
313 | static struct psc_fifoc __iomem *psc_fifoc; | ||
314 | static unsigned int psc_fifoc_irq; | ||
315 | |||
282 | static void mpc512x_psc_fifo_init(struct uart_port *port) | 316 | static void mpc512x_psc_fifo_init(struct uart_port *port) |
283 | { | 317 | { |
318 | /* /32 prescaler */ | ||
319 | out_be16(&PSC(port)->mpc52xx_psc_clock_select, 0xdd00); | ||
320 | |||
284 | out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE); | 321 | out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_RESET_SLICE); |
285 | out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); | 322 | out_be32(&FIFO_512x(port)->txcmd, MPC512x_PSC_FIFO_ENABLE_SLICE); |
286 | out_be32(&FIFO_512x(port)->txalarm, 1); | 323 | out_be32(&FIFO_512x(port)->txalarm, 1); |
@@ -393,6 +430,160 @@ static unsigned long mpc512x_getuartclk(void *p) | |||
393 | return mpc5xxx_get_bus_frequency(p); | 430 | return mpc5xxx_get_bus_frequency(p); |
394 | } | 431 | } |
395 | 432 | ||
433 | #define DEFAULT_FIFO_SIZE 16 | ||
434 | |||
435 | static unsigned int __init get_fifo_size(struct device_node *np, | ||
436 | char *fifo_name) | ||
437 | { | ||
438 | const unsigned int *fp; | ||
439 | |||
440 | fp = of_get_property(np, fifo_name, NULL); | ||
441 | if (fp) | ||
442 | return *fp; | ||
443 | |||
444 | pr_warning("no %s property in %s node, defaulting to %d\n", | ||
445 | fifo_name, np->full_name, DEFAULT_FIFO_SIZE); | ||
446 | |||
447 | return DEFAULT_FIFO_SIZE; | ||
448 | } | ||
449 | |||
450 | #define FIFOC(_base) ((struct mpc512x_psc_fifo __iomem *) \ | ||
451 | ((u32)(_base) + sizeof(struct mpc52xx_psc))) | ||
452 | |||
453 | /* Init PSC FIFO Controller */ | ||
454 | static int __init mpc512x_psc_fifoc_init(void) | ||
455 | { | ||
456 | struct device_node *np; | ||
457 | void __iomem *psc; | ||
458 | unsigned int tx_fifo_size; | ||
459 | unsigned int rx_fifo_size; | ||
460 | int fifobase = 0; /* current fifo address in 32 bit words */ | ||
461 | |||
462 | np = of_find_compatible_node(NULL, NULL, | ||
463 | "fsl,mpc5121-psc-fifo"); | ||
464 | if (!np) { | ||
465 | pr_err("%s: Can't find FIFOC node\n", __func__); | ||
466 | return -ENODEV; | ||
467 | } | ||
468 | |||
469 | psc_fifoc = of_iomap(np, 0); | ||
470 | if (!psc_fifoc) { | ||
471 | pr_err("%s: Can't map FIFOC\n", __func__); | ||
472 | return -ENODEV; | ||
473 | } | ||
474 | |||
475 | psc_fifoc_irq = irq_of_parse_and_map(np, 0); | ||
476 | of_node_put(np); | ||
477 | if (psc_fifoc_irq == NO_IRQ) { | ||
478 | pr_err("%s: Can't get FIFOC irq\n", __func__); | ||
479 | iounmap(psc_fifoc); | ||
480 | return -ENODEV; | ||
481 | } | ||
482 | |||
483 | for_each_compatible_node(np, NULL, "fsl,mpc5121-psc-uart") { | ||
484 | tx_fifo_size = get_fifo_size(np, "fsl,tx-fifo-size"); | ||
485 | rx_fifo_size = get_fifo_size(np, "fsl,rx-fifo-size"); | ||
486 | |||
487 | /* size in register is in 4 byte units */ | ||
488 | tx_fifo_size /= 4; | ||
489 | rx_fifo_size /= 4; | ||
490 | if (!tx_fifo_size) | ||
491 | tx_fifo_size = 1; | ||
492 | if (!rx_fifo_size) | ||
493 | rx_fifo_size = 1; | ||
494 | |||
495 | psc = of_iomap(np, 0); | ||
496 | if (!psc) { | ||
497 | pr_err("%s: Can't map %s device\n", | ||
498 | __func__, np->full_name); | ||
499 | continue; | ||
500 | } | ||
501 | |||
502 | /* FIFO space is 4KiB, check if requested size is available */ | ||
503 | if ((fifobase + tx_fifo_size + rx_fifo_size) > 0x1000) { | ||
504 | pr_err("%s: no fifo space available for %s\n", | ||
505 | __func__, np->full_name); | ||
506 | iounmap(psc); | ||
507 | /* | ||
508 | * chances are that another device requests less | ||
509 | * fifo space, so we continue. | ||
510 | */ | ||
511 | continue; | ||
512 | } | ||
513 | /* set tx and rx fifo size registers */ | ||
514 | out_be32(&FIFOC(psc)->txsz, (fifobase << 16) | tx_fifo_size); | ||
515 | fifobase += tx_fifo_size; | ||
516 | out_be32(&FIFOC(psc)->rxsz, (fifobase << 16) | rx_fifo_size); | ||
517 | fifobase += rx_fifo_size; | ||
518 | |||
519 | /* reset and enable the slices */ | ||
520 | out_be32(&FIFOC(psc)->txcmd, 0x80); | ||
521 | out_be32(&FIFOC(psc)->txcmd, 0x01); | ||
522 | out_be32(&FIFOC(psc)->rxcmd, 0x80); | ||
523 | out_be32(&FIFOC(psc)->rxcmd, 0x01); | ||
524 | |||
525 | iounmap(psc); | ||
526 | } | ||
527 | |||
528 | return 0; | ||
529 | } | ||
530 | |||
531 | static void __exit mpc512x_psc_fifoc_uninit(void) | ||
532 | { | ||
533 | iounmap(psc_fifoc); | ||
534 | } | ||
535 | |||
536 | /* 512x specific interrupt handler. The caller holds the port lock */ | ||
537 | static irqreturn_t mpc512x_psc_handle_irq(struct uart_port *port) | ||
538 | { | ||
539 | unsigned long fifoc_int; | ||
540 | int psc_num; | ||
541 | |||
542 | /* Read pending PSC FIFOC interrupts */ | ||
543 | fifoc_int = in_be32(&psc_fifoc->fifoc_int); | ||
544 | |||
545 | /* Check if it is an interrupt for this port */ | ||
546 | psc_num = (port->mapbase & 0xf00) >> 8; | ||
547 | if (test_bit(psc_num, &fifoc_int) || | ||
548 | test_bit(psc_num + 16, &fifoc_int)) | ||
549 | return mpc5xxx_uart_process_int(port); | ||
550 | |||
551 | return IRQ_NONE; | ||
552 | } | ||
553 | |||
554 | static int mpc512x_psc_clock(struct uart_port *port, int enable) | ||
555 | { | ||
556 | struct clk *psc_clk; | ||
557 | int psc_num; | ||
558 | char clk_name[10]; | ||
559 | |||
560 | if (uart_console(port)) | ||
561 | return 0; | ||
562 | |||
563 | psc_num = (port->mapbase & 0xf00) >> 8; | ||
564 | snprintf(clk_name, sizeof(clk_name), "psc%d_clk", psc_num); | ||
565 | psc_clk = clk_get(port->dev, clk_name); | ||
566 | if (IS_ERR(psc_clk)) { | ||
567 | dev_err(port->dev, "Failed to get PSC clock entry!\n"); | ||
568 | return -ENODEV; | ||
569 | } | ||
570 | |||
571 | dev_dbg(port->dev, "%s %sable\n", clk_name, enable ? "en" : "dis"); | ||
572 | |||
573 | if (enable) | ||
574 | clk_enable(psc_clk); | ||
575 | else | ||
576 | clk_disable(psc_clk); | ||
577 | |||
578 | return 0; | ||
579 | } | ||
580 | |||
581 | static void mpc512x_psc_get_irq(struct uart_port *port, struct device_node *np) | ||
582 | { | ||
583 | port->irqflags = IRQF_SHARED; | ||
584 | port->irq = psc_fifoc_irq; | ||
585 | } | ||
586 | |||
396 | static struct psc_ops mpc512x_psc_ops = { | 587 | static struct psc_ops mpc512x_psc_ops = { |
397 | .fifo_init = mpc512x_psc_fifo_init, | 588 | .fifo_init = mpc512x_psc_fifo_init, |
398 | .raw_rx_rdy = mpc512x_psc_raw_rx_rdy, | 589 | .raw_rx_rdy = mpc512x_psc_raw_rx_rdy, |
@@ -410,6 +601,11 @@ static struct psc_ops mpc512x_psc_ops = { | |||
410 | .cw_disable_ints = mpc512x_psc_cw_disable_ints, | 601 | .cw_disable_ints = mpc512x_psc_cw_disable_ints, |
411 | .cw_restore_ints = mpc512x_psc_cw_restore_ints, | 602 | .cw_restore_ints = mpc512x_psc_cw_restore_ints, |
412 | .getuartclk = mpc512x_getuartclk, | 603 | .getuartclk = mpc512x_getuartclk, |
604 | .clock = mpc512x_psc_clock, | ||
605 | .fifoc_init = mpc512x_psc_fifoc_init, | ||
606 | .fifoc_uninit = mpc512x_psc_fifoc_uninit, | ||
607 | .get_irq = mpc512x_psc_get_irq, | ||
608 | .handle_irq = mpc512x_psc_handle_irq, | ||
413 | }; | 609 | }; |
414 | #endif | 610 | #endif |
415 | 611 | ||
@@ -519,10 +715,15 @@ mpc52xx_uart_startup(struct uart_port *port) | |||
519 | struct mpc52xx_psc __iomem *psc = PSC(port); | 715 | struct mpc52xx_psc __iomem *psc = PSC(port); |
520 | int ret; | 716 | int ret; |
521 | 717 | ||
718 | if (psc_ops->clock) { | ||
719 | ret = psc_ops->clock(port, 1); | ||
720 | if (ret) | ||
721 | return ret; | ||
722 | } | ||
723 | |||
522 | /* Request IRQ */ | 724 | /* Request IRQ */ |
523 | ret = request_irq(port->irq, mpc52xx_uart_int, | 725 | ret = request_irq(port->irq, mpc52xx_uart_int, |
524 | IRQF_DISABLED | IRQF_SAMPLE_RANDOM, | 726 | port->irqflags, "mpc52xx_psc_uart", port); |
525 | "mpc52xx_psc_uart", port); | ||
526 | if (ret) | 727 | if (ret) |
527 | return ret; | 728 | return ret; |
528 | 729 | ||
@@ -553,6 +754,9 @@ mpc52xx_uart_shutdown(struct uart_port *port) | |||
553 | port->read_status_mask = 0; | 754 | port->read_status_mask = 0; |
554 | out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); | 755 | out_be16(&psc->mpc52xx_psc_imr, port->read_status_mask); |
555 | 756 | ||
757 | if (psc_ops->clock) | ||
758 | psc_ops->clock(port, 0); | ||
759 | |||
556 | /* Release interrupt */ | 760 | /* Release interrupt */ |
557 | free_irq(port->irq, port); | 761 | free_irq(port->irq, port); |
558 | } | 762 | } |
@@ -851,15 +1055,12 @@ mpc52xx_uart_int_tx_chars(struct uart_port *port) | |||
851 | } | 1055 | } |
852 | 1056 | ||
853 | static irqreturn_t | 1057 | static irqreturn_t |
854 | mpc52xx_uart_int(int irq, void *dev_id) | 1058 | mpc5xxx_uart_process_int(struct uart_port *port) |
855 | { | 1059 | { |
856 | struct uart_port *port = dev_id; | ||
857 | unsigned long pass = ISR_PASS_LIMIT; | 1060 | unsigned long pass = ISR_PASS_LIMIT; |
858 | unsigned int keepgoing; | 1061 | unsigned int keepgoing; |
859 | u8 status; | 1062 | u8 status; |
860 | 1063 | ||
861 | spin_lock(&port->lock); | ||
862 | |||
863 | /* While we have stuff to do, we continue */ | 1064 | /* While we have stuff to do, we continue */ |
864 | do { | 1065 | do { |
865 | /* If we don't find anything to do, we stop */ | 1066 | /* If we don't find anything to do, we stop */ |
@@ -886,11 +1087,23 @@ mpc52xx_uart_int(int irq, void *dev_id) | |||
886 | 1087 | ||
887 | } while (keepgoing); | 1088 | } while (keepgoing); |
888 | 1089 | ||
889 | spin_unlock(&port->lock); | ||
890 | |||
891 | return IRQ_HANDLED; | 1090 | return IRQ_HANDLED; |
892 | } | 1091 | } |
893 | 1092 | ||
1093 | static irqreturn_t | ||
1094 | mpc52xx_uart_int(int irq, void *dev_id) | ||
1095 | { | ||
1096 | struct uart_port *port = dev_id; | ||
1097 | irqreturn_t ret; | ||
1098 | |||
1099 | spin_lock(&port->lock); | ||
1100 | |||
1101 | ret = psc_ops->handle_irq(port); | ||
1102 | |||
1103 | spin_unlock(&port->lock); | ||
1104 | |||
1105 | return ret; | ||
1106 | } | ||
894 | 1107 | ||
895 | /* ======================================================================== */ | 1108 | /* ======================================================================== */ |
896 | /* Console ( if applicable ) */ | 1109 | /* Console ( if applicable ) */ |
@@ -1152,7 +1365,7 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match) | |||
1152 | return -EINVAL; | 1365 | return -EINVAL; |
1153 | } | 1366 | } |
1154 | 1367 | ||
1155 | port->irq = irq_of_parse_and_map(op->node, 0); | 1368 | psc_ops->get_irq(port, op->node); |
1156 | if (port->irq == NO_IRQ) { | 1369 | if (port->irq == NO_IRQ) { |
1157 | dev_dbg(&op->dev, "Could not get irq\n"); | 1370 | dev_dbg(&op->dev, "Could not get irq\n"); |
1158 | return -EINVAL; | 1371 | return -EINVAL; |
@@ -1163,10 +1376,8 @@ mpc52xx_uart_of_probe(struct of_device *op, const struct of_device_id *match) | |||
1163 | 1376 | ||
1164 | /* Add the port to the uart sub-system */ | 1377 | /* Add the port to the uart sub-system */ |
1165 | ret = uart_add_one_port(&mpc52xx_uart_driver, port); | 1378 | ret = uart_add_one_port(&mpc52xx_uart_driver, port); |
1166 | if (ret) { | 1379 | if (ret) |
1167 | irq_dispose_mapping(port->irq); | ||
1168 | return ret; | 1380 | return ret; |
1169 | } | ||
1170 | 1381 | ||
1171 | dev_set_drvdata(&op->dev, (void *)port); | 1382 | dev_set_drvdata(&op->dev, (void *)port); |
1172 | return 0; | 1383 | return 0; |
@@ -1178,10 +1389,8 @@ mpc52xx_uart_of_remove(struct of_device *op) | |||
1178 | struct uart_port *port = dev_get_drvdata(&op->dev); | 1389 | struct uart_port *port = dev_get_drvdata(&op->dev); |
1179 | dev_set_drvdata(&op->dev, NULL); | 1390 | dev_set_drvdata(&op->dev, NULL); |
1180 | 1391 | ||
1181 | if (port) { | 1392 | if (port) |
1182 | uart_remove_one_port(&mpc52xx_uart_driver, port); | 1393 | uart_remove_one_port(&mpc52xx_uart_driver, port); |
1183 | irq_dispose_mapping(port->irq); | ||
1184 | } | ||
1185 | 1394 | ||
1186 | return 0; | 1395 | return 0; |
1187 | } | 1396 | } |
@@ -1288,6 +1497,15 @@ mpc52xx_uart_init(void) | |||
1288 | 1497 | ||
1289 | mpc52xx_uart_of_enumerate(); | 1498 | mpc52xx_uart_of_enumerate(); |
1290 | 1499 | ||
1500 | /* | ||
1501 | * Map the PSC FIFO Controller and init if on MPC512x. | ||
1502 | */ | ||
1503 | if (psc_ops->fifoc_init) { | ||
1504 | ret = psc_ops->fifoc_init(); | ||
1505 | if (ret) | ||
1506 | return ret; | ||
1507 | } | ||
1508 | |||
1291 | ret = of_register_platform_driver(&mpc52xx_uart_of_driver); | 1509 | ret = of_register_platform_driver(&mpc52xx_uart_of_driver); |
1292 | if (ret) { | 1510 | if (ret) { |
1293 | printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n", | 1511 | printk(KERN_ERR "%s: of_register_platform_driver failed (%i)\n", |
@@ -1302,6 +1520,9 @@ mpc52xx_uart_init(void) | |||
1302 | static void __exit | 1520 | static void __exit |
1303 | mpc52xx_uart_exit(void) | 1521 | mpc52xx_uart_exit(void) |
1304 | { | 1522 | { |
1523 | if (psc_ops->fifoc_uninit) | ||
1524 | psc_ops->fifoc_uninit(); | ||
1525 | |||
1305 | of_unregister_platform_driver(&mpc52xx_uart_of_driver); | 1526 | of_unregister_platform_driver(&mpc52xx_uart_of_driver); |
1306 | uart_unregister_driver(&mpc52xx_uart_driver); | 1527 | uart_unregister_driver(&mpc52xx_uart_driver); |
1307 | } | 1528 | } |