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-rw-r--r--drivers/video/via/chip.h6
-rw-r--r--drivers/video/via/dvi.c160
-rw-r--r--drivers/video/via/dvi.h2
-rw-r--r--drivers/video/via/global.c4
-rw-r--r--drivers/video/via/global.h2
-rw-r--r--drivers/video/via/hw.c101
-rw-r--r--drivers/video/via/hw.h1
-rw-r--r--drivers/video/via/lcd.c16
-rw-r--r--drivers/video/via/lcd.h2
-rw-r--r--drivers/video/via/share.h9
-rw-r--r--drivers/video/via/viafbdev.c23
-rw-r--r--drivers/video/via/viafbdev.h4
-rw-r--r--drivers/video/via/viamode.c21
13 files changed, 97 insertions, 254 deletions
diff --git a/drivers/video/via/chip.h b/drivers/video/via/chip.h
index 29d70244a21f..3ebf20c06eef 100644
--- a/drivers/video/via/chip.h
+++ b/drivers/video/via/chip.h
@@ -137,17 +137,11 @@ struct chip_information {
137 struct lvds_chip_information lvds_chip_info2; 137 struct lvds_chip_information lvds_chip_info2;
138}; 138};
139 139
140struct crt_setting_information {
141 int iga_path;
142};
143
144struct tmds_setting_information { 140struct tmds_setting_information {
145 int iga_path; 141 int iga_path;
146 int h_active; 142 int h_active;
147 int v_active; 143 int v_active;
148 int max_pixel_clock; 144 int max_pixel_clock;
149 int max_hres;
150 int max_vres;
151}; 145};
152 146
153struct lvds_setting_information { 147struct lvds_setting_information {
diff --git a/drivers/video/via/dvi.c b/drivers/video/via/dvi.c
index 41ca198b5098..b1f364745ca0 100644
--- a/drivers/video/via/dvi.c
+++ b/drivers/video/via/dvi.c
@@ -28,17 +28,11 @@ static int tmds_register_read_bytes(int index, u8 *buff, int buff_len);
28static void __devinit dvi_get_panel_size_from_DDCv1( 28static void __devinit dvi_get_panel_size_from_DDCv1(
29 struct tmds_chip_information *tmds_chip, 29 struct tmds_chip_information *tmds_chip,
30 struct tmds_setting_information *tmds_setting); 30 struct tmds_setting_information *tmds_setting);
31static void __devinit dvi_get_panel_size_from_DDCv2(
32 struct tmds_chip_information *tmds_chip,
33 struct tmds_setting_information *tmds_setting);
34static int viafb_dvi_query_EDID(void); 31static int viafb_dvi_query_EDID(void);
35 32
36static int check_tmds_chip(int device_id_subaddr, int device_id) 33static inline bool check_tmds_chip(int device_id_subaddr, int device_id)
37{ 34{
38 if (tmds_register_read(device_id_subaddr) == device_id) 35 return tmds_register_read(device_id_subaddr) == device_id;
39 return OK;
40 else
41 return FAIL;
42} 36}
43 37
44void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip, 38void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
@@ -47,22 +41,13 @@ void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
47 DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n"); 41 DEBUG_MSG(KERN_INFO "viafb_init_dvi_size()\n");
48 42
49 viafb_dvi_sense(); 43 viafb_dvi_sense();
50 switch (viafb_dvi_query_EDID()) { 44 if (viafb_dvi_query_EDID() == 1)
51 case 1:
52 dvi_get_panel_size_from_DDCv1(tmds_chip, tmds_setting); 45 dvi_get_panel_size_from_DDCv1(tmds_chip, tmds_setting);
53 break;
54 case 2:
55 dvi_get_panel_size_from_DDCv2(tmds_chip, tmds_setting);
56 break;
57 default:
58 printk(KERN_WARNING "viafb_init_dvi_size: DVI panel size undetected!\n");
59 break;
60 }
61 46
62 return; 47 return;
63} 48}
64 49
65int __devinit viafb_tmds_trasmitter_identify(void) 50bool __devinit viafb_tmds_trasmitter_identify(void)
66{ 51{
67 unsigned char sr2a = 0, sr1e = 0, sr3e = 0; 52 unsigned char sr2a = 0, sr1e = 0, sr3e = 0;
68 53
@@ -101,7 +86,7 @@ int __devinit viafb_tmds_trasmitter_identify(void)
101 viaparinfo->chip_info-> 86 viaparinfo->chip_info->
102 tmds_chip_info.tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR; 87 tmds_chip_info.tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR;
103 viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_31; 88 viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_31;
104 if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID) != FAIL) { 89 if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) {
105 /* 90 /*
106 * Currently only support 12bits,dual edge,add 24bits mode later 91 * Currently only support 12bits,dual edge,add 24bits mode later
107 */ 92 */
@@ -112,11 +97,10 @@ int __devinit viafb_tmds_trasmitter_identify(void)
112 viaparinfo->chip_info->tmds_chip_info.tmds_chip_name); 97 viaparinfo->chip_info->tmds_chip_info.tmds_chip_name);
113 DEBUG_MSG(KERN_INFO "\n %2d", 98 DEBUG_MSG(KERN_INFO "\n %2d",
114 viaparinfo->chip_info->tmds_chip_info.i2c_port); 99 viaparinfo->chip_info->tmds_chip_info.i2c_port);
115 return OK; 100 return true;
116 } else { 101 } else {
117 viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_2C; 102 viaparinfo->chip_info->tmds_chip_info.i2c_port = VIA_PORT_2C;
118 if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID) 103 if (check_tmds_chip(VT1632_DEVICE_ID_REG, VT1632_DEVICE_ID)) {
119 != FAIL) {
120 tmds_register_write(0x08, 0x3b); 104 tmds_register_write(0x08, 0x3b);
121 DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n"); 105 DEBUG_MSG(KERN_INFO "\n VT1632 TMDS ! \n");
122 DEBUG_MSG(KERN_INFO "\n %2d", 106 DEBUG_MSG(KERN_INFO "\n %2d",
@@ -125,7 +109,7 @@ int __devinit viafb_tmds_trasmitter_identify(void)
125 DEBUG_MSG(KERN_INFO "\n %2d", 109 DEBUG_MSG(KERN_INFO "\n %2d",
126 viaparinfo->chip_info-> 110 viaparinfo->chip_info->
127 tmds_chip_info.i2c_port); 111 tmds_chip_info.i2c_port);
128 return OK; 112 return true;
129 } 113 }
130 } 114 }
131 115
@@ -135,7 +119,7 @@ int __devinit viafb_tmds_trasmitter_identify(void)
135 ((viafb_display_hardware_layout == HW_LAYOUT_DVI_ONLY) || 119 ((viafb_display_hardware_layout == HW_LAYOUT_DVI_ONLY) ||
136 (viafb_display_hardware_layout == HW_LAYOUT_LCD_DVI))) { 120 (viafb_display_hardware_layout == HW_LAYOUT_LCD_DVI))) {
137 DEBUG_MSG(KERN_INFO "\n Integrated TMDS ! \n"); 121 DEBUG_MSG(KERN_INFO "\n Integrated TMDS ! \n");
138 return OK; 122 return true;
139 } 123 }
140 124
141 switch (viaparinfo->chip_info->gfx_chip_name) { 125 switch (viaparinfo->chip_info->gfx_chip_name) {
@@ -159,7 +143,7 @@ int __devinit viafb_tmds_trasmitter_identify(void)
159 tmds_chip_info.tmds_chip_name = NON_TMDS_TRANSMITTER; 143 tmds_chip_info.tmds_chip_name = NON_TMDS_TRANSMITTER;
160 viaparinfo->chip_info->tmds_chip_info. 144 viaparinfo->chip_info->tmds_chip_info.
161 tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR; 145 tmds_chip_slave_addr = VT1632_TMDS_I2C_ADDR;
162 return FAIL; 146 return false;
163} 147}
164 148
165static void tmds_register_write(int index, u8 data) 149static void tmds_register_write(int index, u8 data)
@@ -306,12 +290,7 @@ static int viafb_dvi_query_EDID(void)
306 return EDID_VERSION_1; /* Found EDID1 Table */ 290 return EDID_VERSION_1; /* Found EDID1 Table */
307 } 291 }
308 292
309 data0 = (u8) tmds_register_read(0x00); 293 return false;
310 viaparinfo->chip_info->tmds_chip_info.tmds_chip_slave_addr = restore;
311 if (data0 == 0x20)
312 return EDID_VERSION_2; /* Found EDID2 Table */
313 else
314 return false;
315} 294}
316 295
317/* Get Panel Size Using EDID1 Table */ 296/* Get Panel Size Using EDID1 Table */
@@ -319,50 +298,15 @@ static void __devinit dvi_get_panel_size_from_DDCv1(
319 struct tmds_chip_information *tmds_chip, 298 struct tmds_chip_information *tmds_chip,
320 struct tmds_setting_information *tmds_setting) 299 struct tmds_setting_information *tmds_setting)
321{ 300{
322 int i, max_h = 0, tmp, restore; 301 int i, restore;
323 unsigned char rData;
324 unsigned char EDID_DATA[18]; 302 unsigned char EDID_DATA[18];
325 303
326 DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n"); 304 DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv1 \n");
327 305
328 restore = tmds_chip->tmds_chip_slave_addr; 306 restore = tmds_chip->tmds_chip_slave_addr;
329 tmds_chip->tmds_chip_slave_addr = 0xA0; 307 tmds_chip->tmds_chip_slave_addr = 0xA0;
330
331 rData = tmds_register_read(0x23);
332 if (rData & 0x3C)
333 max_h = 640;
334 if (rData & 0xC0)
335 max_h = 720;
336 if (rData & 0x03)
337 max_h = 800;
338
339 rData = tmds_register_read(0x24);
340 if (rData & 0xC0)
341 max_h = 800;
342 if (rData & 0x1E)
343 max_h = 1024;
344 if (rData & 0x01)
345 max_h = 1280;
346
347 for (i = 0x25; i < 0x6D; i++) { 308 for (i = 0x25; i < 0x6D; i++) {
348 switch (i) { 309 switch (i) {
349 case 0x26:
350 case 0x28:
351 case 0x2A:
352 case 0x2C:
353 case 0x2E:
354 case 0x30:
355 case 0x32:
356 case 0x34:
357 rData = tmds_register_read(i);
358 if (rData == 1)
359 break;
360 /* data = (data + 31) * 8 */
361 tmp = (rData + 31) << 3;
362 if (tmp > max_h)
363 max_h = tmp;
364 break;
365
366 case 0x36: 310 case 0x36:
367 case 0x48: 311 case 0x48:
368 case 0x5A: 312 case 0x5A:
@@ -383,91 +327,11 @@ static void __devinit dvi_get_panel_size_from_DDCv1(
383 } 327 }
384 } 328 }
385 329
386 tmds_setting->max_hres = max_h;
387 switch (max_h) {
388 case 640:
389 tmds_setting->max_vres = 480;
390 break;
391 case 800:
392 tmds_setting->max_vres = 600;
393 break;
394 case 1024:
395 tmds_setting->max_vres = 768;
396 break;
397 case 1280:
398 tmds_setting->max_vres = 1024;
399 break;
400 case 1400:
401 tmds_setting->max_vres = 1050;
402 break;
403 case 1440:
404 tmds_setting->max_vres = 1050;
405 break;
406 case 1600:
407 tmds_setting->max_vres = 1200;
408 break;
409 case 1920:
410 tmds_setting->max_vres = 1080;
411 break;
412 default:
413 DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d ! "
414 "set default panel size.\n", max_h);
415 break;
416 }
417
418 DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n", 330 DEBUG_MSG(KERN_INFO "DVI max pixelclock = %d\n",
419 tmds_setting->max_pixel_clock); 331 tmds_setting->max_pixel_clock);
420 tmds_chip->tmds_chip_slave_addr = restore; 332 tmds_chip->tmds_chip_slave_addr = restore;
421} 333}
422 334
423/* Get Panel Size Using EDID2 Table */
424static void __devinit dvi_get_panel_size_from_DDCv2(
425 struct tmds_chip_information *tmds_chip,
426 struct tmds_setting_information *tmds_setting)
427{
428 int restore;
429 unsigned char R_Buffer[2];
430
431 DEBUG_MSG(KERN_INFO "\n dvi_get_panel_size_from_DDCv2 \n");
432
433 restore = tmds_chip->tmds_chip_slave_addr;
434 tmds_chip->tmds_chip_slave_addr = 0xA2;
435
436 /* Horizontal: 0x76, 0x77 */
437 tmds_register_read_bytes(0x76, R_Buffer, 2);
438 tmds_setting->max_hres = R_Buffer[0] + (R_Buffer[1] << 8);
439
440 switch (tmds_setting->max_hres) {
441 case 640:
442 tmds_setting->max_vres = 480;
443 break;
444 case 800:
445 tmds_setting->max_vres = 600;
446 break;
447 case 1024:
448 tmds_setting->max_vres = 768;
449 break;
450 case 1280:
451 tmds_setting->max_vres = 1024;
452 break;
453 case 1400:
454 tmds_setting->max_vres = 1050;
455 break;
456 case 1440:
457 tmds_setting->max_vres = 1050;
458 break;
459 case 1600:
460 tmds_setting->max_vres = 1200;
461 break;
462 default:
463 DEBUG_MSG(KERN_INFO "Unknown panel size max resolution = %d! "
464 "set default panel size.\n", tmds_setting->max_hres);
465 break;
466 }
467
468 tmds_chip->tmds_chip_slave_addr = restore;
469}
470
471/* If Disable DVI, turn off pad */ 335/* If Disable DVI, turn off pad */
472void viafb_dvi_disable(void) 336void viafb_dvi_disable(void)
473{ 337{
diff --git a/drivers/video/via/dvi.h b/drivers/video/via/dvi.h
index 2c525c0c1adb..f473dd010977 100644
--- a/drivers/video/via/dvi.h
+++ b/drivers/video/via/dvi.h
@@ -56,7 +56,7 @@
56int viafb_dvi_sense(void); 56int viafb_dvi_sense(void);
57void viafb_dvi_disable(void); 57void viafb_dvi_disable(void);
58void viafb_dvi_enable(void); 58void viafb_dvi_enable(void);
59int __devinit viafb_tmds_trasmitter_identify(void); 59bool __devinit viafb_tmds_trasmitter_identify(void);
60void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip, 60void __devinit viafb_init_dvi_size(struct tmds_chip_information *tmds_chip,
61 struct tmds_setting_information *tmds_setting); 61 struct tmds_setting_information *tmds_setting);
62void viafb_dvi_set_mode(struct VideoModeTable *videoMode, int mode_bpp, 62void viafb_dvi_set_mode(struct VideoModeTable *videoMode, int mode_bpp,
diff --git a/drivers/video/via/global.c b/drivers/video/via/global.c
index 1ee511b73307..e10d8249534c 100644
--- a/drivers/video/via/global.c
+++ b/drivers/video/via/global.c
@@ -40,10 +40,6 @@ int viafb_hotplug_Yres = 480;
40int viafb_hotplug_bpp = 32; 40int viafb_hotplug_bpp = 32;
41int viafb_hotplug_refresh = 60; 41int viafb_hotplug_refresh = 60;
42int viafb_primary_dev = None_Device; 42int viafb_primary_dev = None_Device;
43unsigned int viafb_second_xres = 640;
44unsigned int viafb_second_yres = 480;
45unsigned int viafb_second_virtual_xres;
46unsigned int viafb_second_virtual_yres;
47int viafb_lcd_panel_id = LCD_PANEL_ID_MAXIMUM + 1; 43int viafb_lcd_panel_id = LCD_PANEL_ID_MAXIMUM + 1;
48struct fb_info *viafbinfo; 44struct fb_info *viafbinfo;
49struct fb_info *viafbinfo1; 45struct fb_info *viafbinfo1;
diff --git a/drivers/video/via/global.h b/drivers/video/via/global.h
index 38ef5ac66953..ff969dc34593 100644
--- a/drivers/video/via/global.h
+++ b/drivers/video/via/global.h
@@ -73,8 +73,6 @@ extern int viafb_hotplug_bpp;
73extern int viafb_hotplug_refresh; 73extern int viafb_hotplug_refresh;
74extern int viafb_primary_dev; 74extern int viafb_primary_dev;
75 75
76extern unsigned int viafb_second_xres;
77extern unsigned int viafb_second_yres;
78extern int viafb_lcd_panel_id; 76extern int viafb_lcd_panel_id;
79 77
80#endif /* __GLOBAL_H__ */ 78#endif /* __GLOBAL_H__ */
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index 104f3e16010f..47b13535ed2b 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -20,6 +20,7 @@
20 */ 20 */
21 21
22#include <linux/via-core.h> 22#include <linux/via-core.h>
23#include <asm/olpc.h>
23#include "global.h" 24#include "global.h"
24#include "via_clock.h" 25#include "via_clock.h"
25 26
@@ -117,6 +118,42 @@ static struct io_reg scaling_parameters[] = {
117 {VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */ 118 {VIACR, CR87, 0xFF, 0x1F}, /* LCD Scaling Parameter 14 */
118}; 119};
119 120
121static struct io_reg common_vga[] = {
122 {VIACR, CR07, 0x10, 0x10}, /* [0] vertical total (bit 8)
123 [1] vertical display end (bit 8)
124 [2] vertical retrace start (bit 8)
125 [3] start vertical blanking (bit 8)
126 [4] line compare (bit 8)
127 [5] vertical total (bit 9)
128 [6] vertical display end (bit 9)
129 [7] vertical retrace start (bit 9) */
130 {VIACR, CR08, 0xFF, 0x00}, /* [0-4] preset row scan
131 [5-6] byte panning */
132 {VIACR, CR09, 0xDF, 0x40}, /* [0-4] max scan line
133 [5] start vertical blanking (bit 9)
134 [6] line compare (bit 9)
135 [7] scan doubling */
136 {VIACR, CR0A, 0xFF, 0x1E}, /* [0-4] cursor start
137 [5] cursor disable */
138 {VIACR, CR0B, 0xFF, 0x00}, /* [0-4] cursor end
139 [5-6] cursor skew */
140 {VIACR, CR0E, 0xFF, 0x00}, /* [0-7] cursor location (high) */
141 {VIACR, CR0F, 0xFF, 0x00}, /* [0-7] cursor location (low) */
142 {VIACR, CR11, 0xF0, 0x80}, /* [0-3] vertical retrace end
143 [6] memory refresh bandwidth
144 [7] CRTC register protect enable */
145 {VIACR, CR14, 0xFF, 0x00}, /* [0-4] underline location
146 [5] divide memory address clock by 4
147 [6] double word addressing */
148 {VIACR, CR17, 0xFF, 0x63}, /* [0-1] mapping of display address 13-14
149 [2] divide scan line clock by 2
150 [3] divide memory address clock by 2
151 [5] address wrap
152 [6] byte mode select
153 [7] sync enable */
154 {VIACR, CR18, 0xFF, 0xFF}, /* [0-7] line compare */
155};
156
120static struct fifo_depth_select display_fifo_depth_reg = { 157static struct fifo_depth_select display_fifo_depth_reg = {
121 /* IGA1 FIFO Depth_Select */ 158 /* IGA1 FIFO Depth_Select */
122 {IGA1_FIFO_DEPTH_SELECT_REG_NUM, {{SR17, 0, 7} } }, 159 {IGA1_FIFO_DEPTH_SELECT_REG_NUM, {{SR17, 0, 7} } },
@@ -582,13 +619,14 @@ static u32 get_lcd_devices(int output_interface)
582/*Set IGA path for each device*/ 619/*Set IGA path for each device*/
583void viafb_set_iga_path(void) 620void viafb_set_iga_path(void)
584{ 621{
622 int crt_iga_path = 0;
585 623
586 if (viafb_SAMM_ON == 1) { 624 if (viafb_SAMM_ON == 1) {
587 if (viafb_CRT_ON) { 625 if (viafb_CRT_ON) {
588 if (viafb_primary_dev == CRT_Device) 626 if (viafb_primary_dev == CRT_Device)
589 viaparinfo->crt_setting_info->iga_path = IGA1; 627 crt_iga_path = IGA1;
590 else 628 else
591 viaparinfo->crt_setting_info->iga_path = IGA2; 629 crt_iga_path = IGA2;
592 } 630 }
593 631
594 if (viafb_DVI_ON) { 632 if (viafb_DVI_ON) {
@@ -605,8 +643,7 @@ void viafb_set_iga_path(void)
605 UNICHROME_CLE266)) { 643 UNICHROME_CLE266)) {
606 viaparinfo-> 644 viaparinfo->
607 lvds_setting_info->iga_path = IGA2; 645 lvds_setting_info->iga_path = IGA2;
608 viaparinfo-> 646 crt_iga_path = IGA1;
609 crt_setting_info->iga_path = IGA1;
610 viaparinfo-> 647 viaparinfo->
611 tmds_setting_info->iga_path = IGA1; 648 tmds_setting_info->iga_path = IGA1;
612 } else 649 } else
@@ -626,10 +663,10 @@ void viafb_set_iga_path(void)
626 viafb_SAMM_ON = 0; 663 viafb_SAMM_ON = 0;
627 664
628 if (viafb_CRT_ON && viafb_LCD_ON) { 665 if (viafb_CRT_ON && viafb_LCD_ON) {
629 viaparinfo->crt_setting_info->iga_path = IGA1; 666 crt_iga_path = IGA1;
630 viaparinfo->lvds_setting_info->iga_path = IGA2; 667 viaparinfo->lvds_setting_info->iga_path = IGA2;
631 } else if (viafb_CRT_ON && viafb_DVI_ON) { 668 } else if (viafb_CRT_ON && viafb_DVI_ON) {
632 viaparinfo->crt_setting_info->iga_path = IGA1; 669 crt_iga_path = IGA1;
633 viaparinfo->tmds_setting_info->iga_path = IGA2; 670 viaparinfo->tmds_setting_info->iga_path = IGA2;
634 } else if (viafb_LCD_ON && viafb_DVI_ON) { 671 } else if (viafb_LCD_ON && viafb_DVI_ON) {
635 viaparinfo->tmds_setting_info->iga_path = IGA1; 672 viaparinfo->tmds_setting_info->iga_path = IGA1;
@@ -638,7 +675,7 @@ void viafb_set_iga_path(void)
638 viaparinfo->lvds_setting_info->iga_path = IGA2; 675 viaparinfo->lvds_setting_info->iga_path = IGA2;
639 viaparinfo->lvds_setting_info2->iga_path = IGA2; 676 viaparinfo->lvds_setting_info2->iga_path = IGA2;
640 } else if (viafb_CRT_ON) { 677 } else if (viafb_CRT_ON) {
641 viaparinfo->crt_setting_info->iga_path = IGA1; 678 crt_iga_path = IGA1;
642 } else if (viafb_LCD_ON) { 679 } else if (viafb_LCD_ON) {
643 viaparinfo->lvds_setting_info->iga_path = IGA2; 680 viaparinfo->lvds_setting_info->iga_path = IGA2;
644 } else if (viafb_DVI_ON) { 681 } else if (viafb_DVI_ON) {
@@ -649,7 +686,7 @@ void viafb_set_iga_path(void)
649 viaparinfo->shared->iga1_devices = 0; 686 viaparinfo->shared->iga1_devices = 0;
650 viaparinfo->shared->iga2_devices = 0; 687 viaparinfo->shared->iga2_devices = 0;
651 if (viafb_CRT_ON) { 688 if (viafb_CRT_ON) {
652 if (viaparinfo->crt_setting_info->iga_path == IGA1) 689 if (crt_iga_path == IGA1)
653 viaparinfo->shared->iga1_devices |= VIA_CRT; 690 viaparinfo->shared->iga1_devices |= VIA_CRT;
654 else 691 else
655 viaparinfo->shared->iga2_devices |= VIA_CRT; 692 viaparinfo->shared->iga2_devices |= VIA_CRT;
@@ -687,6 +724,10 @@ void viafb_set_iga_path(void)
687 viaparinfo->chip_info-> 724 viaparinfo->chip_info->
688 lvds_chip_info2.output_interface); 725 lvds_chip_info2.output_interface);
689 } 726 }
727
728 /* looks like the OLPC has its display wired to DVP1 and LVDS2 */
729 if (machine_is_olpc())
730 viaparinfo->shared->iga2_devices = VIA_DVP1 | VIA_LVDS2;
690} 731}
691 732
692static void set_color_register(u8 index, u8 red, u8 green, u8 blue) 733static void set_color_register(u8 index, u8 red, u8 green, u8 blue)
@@ -974,25 +1015,17 @@ void via_odev_to_seq(struct seq_file *m, u32 odev)
974 1015
975static void load_fix_bit_crtc_reg(void) 1016static void load_fix_bit_crtc_reg(void)
976{ 1017{
1018 viafb_unlock_crt();
1019
977 /* always set to 1 */ 1020 /* always set to 1 */
978 viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7); 1021 viafb_write_reg_mask(CR03, VIACR, 0x80, BIT7);
979 /* line compare should set all bits = 1 (extend modes) */ 1022 /* line compare should set all bits = 1 (extend modes) */
980 viafb_write_reg(CR18, VIACR, 0xff);
981 /* line compare should set all bits = 1 (extend modes) */
982 viafb_write_reg_mask(CR07, VIACR, 0x10, BIT4);
983 /* line compare should set all bits = 1 (extend modes) */
984 viafb_write_reg_mask(CR09, VIACR, 0x40, BIT6);
985 /* line compare should set all bits = 1 (extend modes) */
986 viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4); 1023 viafb_write_reg_mask(CR35, VIACR, 0x10, BIT4);
987 /* line compare should set all bits = 1 (extend modes) */ 1024 /* line compare should set all bits = 1 (extend modes) */
988 viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2); 1025 viafb_write_reg_mask(CR33, VIACR, 0x06, BIT0 + BIT1 + BIT2);
989 /*viafb_write_reg_mask(CR32, VIACR, 0x01, BIT0); */ 1026 /*viafb_write_reg_mask(CR32, VIACR, 0x01, BIT0); */
990 /* extend mode always set to e3h */ 1027
991 viafb_write_reg(CR17, VIACR, 0xe3); 1028 viafb_lock_crt();
992 /* extend mode always set to 0h */
993 viafb_write_reg(CR08, VIACR, 0x00);
994 /* extend mode always set to 0h */
995 viafb_write_reg(CR14, VIACR, 0x00);
996 1029
997 /* If K8M800, enable Prefetch Mode. */ 1030 /* If K8M800, enable Prefetch Mode. */
998 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800) 1031 if ((viaparinfo->chip_info->gfx_chip_name == UNICHROME_K800)
@@ -1766,8 +1799,6 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
1766 v_addr = crt_reg.ver_addr; 1799 v_addr = crt_reg.ver_addr;
1767 if (set_iga == IGA1) { 1800 if (set_iga == IGA1) {
1768 viafb_unlock_crt(); 1801 viafb_unlock_crt();
1769 viafb_write_reg(CR09, VIACR, 0x00); /*initial CR09=0 */
1770 viafb_write_reg_mask(CR11, VIACR, 0x00, BIT4 + BIT5 + BIT6);
1771 viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7); 1802 viafb_write_reg_mask(CR17, VIACR, 0x00, BIT7);
1772 } 1803 }
1773 1804
@@ -1780,7 +1811,6 @@ void viafb_fill_crtc_timing(struct crt_mode_table *crt_table,
1780 break; 1811 break;
1781 } 1812 }
1782 1813
1783 load_fix_bit_crtc_reg();
1784 viafb_lock_crt(); 1814 viafb_lock_crt();
1785 viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7); 1815 viafb_write_reg_mask(CR17, VIACR, 0x80, BIT7);
1786 viafb_load_fetch_count_reg(h_addr, bpp_byte, set_iga); 1816 viafb_load_fetch_count_reg(h_addr, bpp_byte, set_iga);
@@ -1803,8 +1833,6 @@ void __devinit viafb_init_chip_info(int chip_type)
1803 init_tmds_chip_info(); 1833 init_tmds_chip_info();
1804 init_lvds_chip_info(); 1834 init_lvds_chip_info();
1805 1835
1806 viaparinfo->crt_setting_info->iga_path = IGA1;
1807
1808 /*Set IGA path for each device */ 1836 /*Set IGA path for each device */
1809 viafb_set_iga_path(); 1837 viafb_set_iga_path();
1810 1838
@@ -2086,6 +2114,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2086 outb(0x00, VIAAR); 2114 outb(0x00, VIAAR);
2087 2115
2088 /* Write Common Setting for Video Mode */ 2116 /* Write Common Setting for Video Mode */
2117 viafb_write_regx(common_vga, ARRAY_SIZE(common_vga));
2089 switch (viaparinfo->chip_info->gfx_chip_name) { 2118 switch (viaparinfo->chip_info->gfx_chip_name) {
2090 case UNICHROME_CLE266: 2119 case UNICHROME_CLE266:
2091 viafb_write_regx(CLE266_ModeXregs, NUM_TOTAL_CLE266_ModeXregs); 2120 viafb_write_regx(CLE266_ModeXregs, NUM_TOTAL_CLE266_ModeXregs);
@@ -2132,9 +2161,6 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2132 2161
2133 viafb_write_reg_mask(0x15, VIASR, 0xA2, 0xA2); 2162 viafb_write_reg_mask(0x15, VIASR, 0xA2, 0xA2);
2134 2163
2135 /* Write CRTC */
2136 viafb_fill_crtc_timing(crt_timing, vmode_tbl, video_bpp / 8, IGA1);
2137
2138 /* Write Graphic Controller */ 2164 /* Write Graphic Controller */
2139 for (i = 0; i < StdGR; i++) 2165 for (i = 0; i < StdGR; i++)
2140 via_write_reg(VIAGR, i, VPIT.GR[i]); 2166 via_write_reg(VIAGR, i, VPIT.GR[i]);
@@ -2164,6 +2190,7 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2164 } 2190 }
2165 } 2191 }
2166 2192
2193 load_fix_bit_crtc_reg();
2167 via_set_primary_pitch(viafbinfo->fix.line_length); 2194 via_set_primary_pitch(viafbinfo->fix.line_length);
2168 via_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length 2195 via_set_secondary_pitch(viafb_dual_fb ? viafbinfo1->fix.line_length
2169 : viafbinfo->fix.line_length); 2196 : viafbinfo->fix.line_length);
@@ -2183,15 +2210,15 @@ int viafb_setmode(struct VideoModeTable *vmode_tbl, int video_bpp,
2183 2210
2184 /* CRT set mode */ 2211 /* CRT set mode */
2185 if (viafb_CRT_ON) { 2212 if (viafb_CRT_ON) {
2186 if (viafb_SAMM_ON && (viaparinfo->crt_setting_info->iga_path == 2213 if (viafb_SAMM_ON &&
2187 IGA2)) { 2214 viaparinfo->shared->iga2_devices & VIA_CRT) {
2188 viafb_fill_crtc_timing(crt_timing1, vmode_tbl1, 2215 viafb_fill_crtc_timing(crt_timing1, vmode_tbl1,
2189 video_bpp1 / 8, 2216 video_bpp1 / 8, IGA2);
2190 viaparinfo->crt_setting_info->iga_path);
2191 } else { 2217 } else {
2192 viafb_fill_crtc_timing(crt_timing, vmode_tbl, 2218 viafb_fill_crtc_timing(crt_timing, vmode_tbl,
2193 video_bpp / 8, 2219 video_bpp / 8,
2194 viaparinfo->crt_setting_info->iga_path); 2220 (viaparinfo->shared->iga1_devices & VIA_CRT)
2221 ? IGA1 : IGA2);
2195 } 2222 }
2196 2223
2197 /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode 2224 /* Patch if set_hres is not 8 alignment (1366) to viafb_setmode
@@ -2357,8 +2384,12 @@ int viafb_get_refresh(int hres, int vres, u32 long_refresh)
2357 best = &vmode->crtc[i]; 2384 best = &vmode->crtc[i];
2358 } 2385 }
2359 2386
2360 if (abs(best->refresh_rate - long_refresh) > 3) 2387 if (abs(best->refresh_rate - long_refresh) > 3) {
2361 return 60; 2388 if (hres == 1200 && vres == 900)
2389 return 49; /* OLPC DCON only supports 50 Hz */
2390 else
2391 return 60;
2392 }
2362 2393
2363 return best->refresh_rate; 2394 return best->refresh_rate;
2364} 2395}
diff --git a/drivers/video/via/hw.h b/drivers/video/via/hw.h
index 7e9f51a83126..c7239eb83bae 100644
--- a/drivers/video/via/hw.h
+++ b/drivers/video/via/hw.h
@@ -903,7 +903,6 @@ struct via_device_mapping {
903 const char *name; 903 const char *name;
904}; 904};
905 905
906extern unsigned int viafb_second_virtual_xres;
907extern int viafb_SAMM_ON; 906extern int viafb_SAMM_ON;
908extern int viafb_dual_fb; 907extern int viafb_dual_fb;
909extern int viafb_LCD2_ON; 908extern int viafb_LCD2_ON;
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index 284e681cc22c..6e06981d638b 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -48,7 +48,6 @@ static struct _lcd_scaling_factor lcd_scaling_factor_CLE = {
48 {LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } } 48 {LCD_VER_SCALING_FACTOR_REG_NUM_CLE, {{CR78, 0, 7}, {CR79, 6, 7} } }
49}; 49};
50 50
51static int check_lvds_chip(int device_id_subaddr, int device_id);
52static bool lvds_identify_integratedlvds(void); 51static bool lvds_identify_integratedlvds(void);
53static void __devinit fp_id_to_vindex(int panel_id); 52static void __devinit fp_id_to_vindex(int panel_id);
54static int lvds_register_read(int index); 53static int lvds_register_read(int index);
@@ -84,12 +83,9 @@ static struct display_timing lcd_centering_timging(struct display_timing
84 mode_crt_reg, 83 mode_crt_reg,
85 struct display_timing panel_crt_reg); 84 struct display_timing panel_crt_reg);
86 85
87static int check_lvds_chip(int device_id_subaddr, int device_id) 86static inline bool check_lvds_chip(int device_id_subaddr, int device_id)
88{ 87{
89 if (lvds_register_read(device_id_subaddr) == device_id) 88 return lvds_register_read(device_id_subaddr) == device_id;
90 return OK;
91 else
92 return FAIL;
93} 89}
94 90
95void __devinit viafb_init_lcd_size(void) 91void __devinit viafb_init_lcd_size(void)
@@ -150,7 +146,7 @@ static bool lvds_identify_integratedlvds(void)
150 return true; 146 return true;
151} 147}
152 148
153int __devinit viafb_lvds_trasmitter_identify(void) 149bool __devinit viafb_lvds_trasmitter_identify(void)
154{ 150{
155 if (viafb_lvds_identify_vt1636(VIA_PORT_31)) { 151 if (viafb_lvds_identify_vt1636(VIA_PORT_31)) {
156 viaparinfo->chip_info->lvds_chip_info.i2c_port = VIA_PORT_31; 152 viaparinfo->chip_info->lvds_chip_info.i2c_port = VIA_PORT_31;
@@ -175,20 +171,20 @@ int __devinit viafb_lvds_trasmitter_identify(void)
175 viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr = 171 viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
176 VT1631_LVDS_I2C_ADDR; 172 VT1631_LVDS_I2C_ADDR;
177 173
178 if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID) != FAIL) { 174 if (check_lvds_chip(VT1631_DEVICE_ID_REG, VT1631_DEVICE_ID)) {
179 DEBUG_MSG(KERN_INFO "\n VT1631 LVDS ! \n"); 175 DEBUG_MSG(KERN_INFO "\n VT1631 LVDS ! \n");
180 DEBUG_MSG(KERN_INFO "\n %2d", 176 DEBUG_MSG(KERN_INFO "\n %2d",
181 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name); 177 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
182 DEBUG_MSG(KERN_INFO "\n %2d", 178 DEBUG_MSG(KERN_INFO "\n %2d",
183 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name); 179 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name);
184 return OK; 180 return true;
185 } 181 }
186 182
187 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name = 183 viaparinfo->chip_info->lvds_chip_info.lvds_chip_name =
188 NON_LVDS_TRANSMITTER; 184 NON_LVDS_TRANSMITTER;
189 viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr = 185 viaparinfo->chip_info->lvds_chip_info.lvds_chip_slave_addr =
190 VT1631_LVDS_I2C_ADDR; 186 VT1631_LVDS_I2C_ADDR;
191 return FAIL; 187 return false;
192} 188}
193 189
194static void __devinit fp_id_to_vindex(int panel_id) 190static void __devinit fp_id_to_vindex(int panel_id)
diff --git a/drivers/video/via/lcd.h b/drivers/video/via/lcd.h
index c7909fe29550..75f60a655b0e 100644
--- a/drivers/video/via/lcd.h
+++ b/drivers/video/via/lcd.h
@@ -79,7 +79,7 @@ void __devinit viafb_init_lvds_output_interface(struct lvds_chip_information
79void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table, 79void viafb_lcd_set_mode(struct crt_mode_table *mode_crt_table,
80 struct lvds_setting_information *plvds_setting_info, 80 struct lvds_setting_information *plvds_setting_info,
81 struct lvds_chip_information *plvds_chip_info); 81 struct lvds_chip_information *plvds_chip_info);
82int __devinit viafb_lvds_trasmitter_identify(void); 82bool __devinit viafb_lvds_trasmitter_identify(void);
83void viafb_init_lvds_output_interface(struct lvds_chip_information 83void viafb_init_lvds_output_interface(struct lvds_chip_information
84 *plvds_chip_info, 84 *plvds_chip_info,
85 struct lvds_setting_information 85 struct lvds_setting_information
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index 4b7831f0d012..8b93e2f6fea2 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -22,14 +22,6 @@
22#ifndef __SHARE_H__ 22#ifndef __SHARE_H__
23#define __SHARE_H__ 23#define __SHARE_H__
24 24
25/* Define Return Value */
26#define FAIL -1
27#define OK 1
28
29#ifndef NULL
30#define NULL 0
31#endif
32
33/* Define Bit Field */ 25/* Define Bit Field */
34#define BIT0 0x01 26#define BIT0 0x01
35#define BIT1 0x02 27#define BIT1 0x02
@@ -290,6 +282,7 @@
290#define HW_LAYOUT_LCD_EXTERNAL_LCD2 0x10 282#define HW_LAYOUT_LCD_EXTERNAL_LCD2 0x10
291 283
292/* Definition Refresh Rate */ 284/* Definition Refresh Rate */
285#define REFRESH_49 49
293#define REFRESH_50 50 286#define REFRESH_50 50
294#define REFRESH_60 60 287#define REFRESH_60 60
295#define REFRESH_75 75 288#define REFRESH_75 75
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index 9d9bb9b4ed3f..eace9a4257f4 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -37,6 +37,8 @@ static char *viafb_mode1;
37static int viafb_bpp = 32; 37static int viafb_bpp = 32;
38static int viafb_bpp1 = 32; 38static int viafb_bpp1 = 32;
39 39
40static unsigned int viafb_second_xres = 640;
41static unsigned int viafb_second_yres = 480;
40static unsigned int viafb_second_offset; 42static unsigned int viafb_second_offset;
41static int viafb_second_size; 43static int viafb_second_size;
42 44
@@ -440,8 +442,8 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
440 if (viafb_SAMM_ON == 1) { 442 if (viafb_SAMM_ON == 1) {
441 u.viamode.xres_sec = viafb_second_xres; 443 u.viamode.xres_sec = viafb_second_xres;
442 u.viamode.yres_sec = viafb_second_yres; 444 u.viamode.yres_sec = viafb_second_yres;
443 u.viamode.virtual_xres_sec = viafb_second_virtual_xres; 445 u.viamode.virtual_xres_sec = viafb_dual_fb ? viafbinfo1->var.xres_virtual : viafbinfo->var.xres_virtual;
444 u.viamode.virtual_yres_sec = viafb_second_virtual_yres; 446 u.viamode.virtual_yres_sec = viafb_dual_fb ? viafbinfo1->var.yres_virtual : viafbinfo->var.yres_virtual;
445 u.viamode.refresh_sec = viafb_refresh1; 447 u.viamode.refresh_sec = viafb_refresh1;
446 u.viamode.bpp_sec = viafb_bpp1; 448 u.viamode.bpp_sec = viafb_bpp1;
447 } else { 449 } else {
@@ -930,10 +932,8 @@ static int get_primary_device(void)
930 /* Rule: device on iga1 path are the primary device. */ 932 /* Rule: device on iga1 path are the primary device. */
931 if (viafb_SAMM_ON) { 933 if (viafb_SAMM_ON) {
932 if (viafb_CRT_ON) { 934 if (viafb_CRT_ON) {
933 if (viaparinfo->crt_setting_info->iga_path == IGA1) { 935 if (viaparinfo->shared->iga1_devices & VIA_CRT) {
934 DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n", 936 DEBUG_MSG(KERN_INFO "CRT IGA Path:%d\n", IGA1);
935 viaparinfo->
936 crt_setting_info->iga_path);
937 primary_device = CRT_Device; 937 primary_device = CRT_Device;
938 } 938 }
939 } 939 }
@@ -1746,7 +1746,6 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev)
1746 viaparinfo->lvds_setting_info = &viaparinfo->shared->lvds_setting_info; 1746 viaparinfo->lvds_setting_info = &viaparinfo->shared->lvds_setting_info;
1747 viaparinfo->lvds_setting_info2 = 1747 viaparinfo->lvds_setting_info2 =
1748 &viaparinfo->shared->lvds_setting_info2; 1748 &viaparinfo->shared->lvds_setting_info2;
1749 viaparinfo->crt_setting_info = &viaparinfo->shared->crt_setting_info;
1750 viaparinfo->chip_info = &viaparinfo->shared->chip_info; 1749 viaparinfo->chip_info = &viaparinfo->shared->chip_info;
1751 1750
1752 if (viafb_dual_fb) 1751 if (viafb_dual_fb)
@@ -1793,14 +1792,10 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev)
1793 1792
1794 parse_mode(viafb_mode, &default_xres, &default_yres); 1793 parse_mode(viafb_mode, &default_xres, &default_yres);
1795 vmode_entry = viafb_get_mode(default_xres, default_yres); 1794 vmode_entry = viafb_get_mode(default_xres, default_yres);
1796 if (viafb_SAMM_ON == 1) { 1795 if (viafb_SAMM_ON == 1)
1797 parse_mode(viafb_mode1, &viafb_second_xres, 1796 parse_mode(viafb_mode1, &viafb_second_xres,
1798 &viafb_second_yres); 1797 &viafb_second_yres);
1799 1798
1800 viafb_second_virtual_xres = viafb_second_xres;
1801 viafb_second_virtual_yres = viafb_second_yres;
1802 }
1803
1804 default_var.xres = default_xres; 1799 default_var.xres = default_xres;
1805 default_var.yres = default_yres; 1800 default_var.yres = default_yres;
1806 default_var.xres_virtual = default_xres; 1801 default_var.xres_virtual = default_xres;
@@ -1844,8 +1839,8 @@ int __devinit via_fb_pci_probe(struct viafb_dev *vdev)
1844 1839
1845 default_var.xres = viafb_second_xres; 1840 default_var.xres = viafb_second_xres;
1846 default_var.yres = viafb_second_yres; 1841 default_var.yres = viafb_second_yres;
1847 default_var.xres_virtual = viafb_second_virtual_xres; 1842 default_var.xres_virtual = viafb_second_xres;
1848 default_var.yres_virtual = viafb_second_virtual_yres; 1843 default_var.yres_virtual = viafb_second_yres;
1849 default_var.bits_per_pixel = viafb_bpp1; 1844 default_var.bits_per_pixel = viafb_bpp1;
1850 viafb_fill_var_timing_info(&default_var, viafb_get_refresh( 1845 viafb_fill_var_timing_info(&default_var, viafb_get_refresh(
1851 default_var.xres, default_var.yres, viafb_refresh1), 1846 default_var.xres, default_var.yres, viafb_refresh1),
diff --git a/drivers/video/via/viafbdev.h b/drivers/video/via/viafbdev.h
index d66f963e930e..59e40d1bd614 100644
--- a/drivers/video/via/viafbdev.h
+++ b/drivers/video/via/viafbdev.h
@@ -50,7 +50,6 @@ struct viafb_shared {
50 50
51 /* All the information will be needed to set engine */ 51 /* All the information will be needed to set engine */
52 struct tmds_setting_information tmds_setting_info; 52 struct tmds_setting_information tmds_setting_info;
53 struct crt_setting_information crt_setting_info;
54 struct lvds_setting_information lvds_setting_info; 53 struct lvds_setting_information lvds_setting_info;
55 struct lvds_setting_information lvds_setting_info2; 54 struct lvds_setting_information lvds_setting_info2;
56 struct chip_information chip_info; 55 struct chip_information chip_info;
@@ -79,14 +78,11 @@ struct viafb_par {
79 /* All the information will be needed to set engine */ 78 /* All the information will be needed to set engine */
80 /* depreciated, use the ones in shared directly */ 79 /* depreciated, use the ones in shared directly */
81 struct tmds_setting_information *tmds_setting_info; 80 struct tmds_setting_information *tmds_setting_info;
82 struct crt_setting_information *crt_setting_info;
83 struct lvds_setting_information *lvds_setting_info; 81 struct lvds_setting_information *lvds_setting_info;
84 struct lvds_setting_information *lvds_setting_info2; 82 struct lvds_setting_information *lvds_setting_info2;
85 struct chip_information *chip_info; 83 struct chip_information *chip_info;
86}; 84};
87 85
88extern unsigned int viafb_second_virtual_yres;
89extern unsigned int viafb_second_virtual_xres;
90extern int viafb_SAMM_ON; 86extern int viafb_SAMM_ON;
91extern int viafb_dual_fb; 87extern int viafb_dual_fb;
92extern int viafb_LCD2_ON; 88extern int viafb_LCD2_ON;
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c
index e550063b89b1..50de07f27a6c 100644
--- a/drivers/video/via/viamode.c
+++ b/drivers/video/via/viamode.c
@@ -30,10 +30,6 @@ struct io_reg CN400_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
30{VIASR, SR1A, 0xFB, 0x08}, 30{VIASR, SR1A, 0xFB, 0x08},
31{VIASR, SR1E, 0x0F, 0x01}, 31{VIASR, SR1E, 0x0F, 0x01},
32{VIASR, SR2A, 0xFF, 0x00}, 32{VIASR, SR2A, 0xFF, 0x00},
33{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
34{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
35{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
36{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
37{VIACR, CR32, 0xFF, 0x00}, 33{VIACR, CR32, 0xFF, 0x00},
38{VIACR, CR33, 0xFF, 0x00}, 34{VIACR, CR33, 0xFF, 0x00},
39{VIACR, CR35, 0xFF, 0x00}, 35{VIACR, CR35, 0xFF, 0x00},
@@ -123,10 +119,6 @@ struct io_reg KM400_ModeXregs[] = {
123 {VIASR, SR2A, 0xFF, 0x00}, /* Power Management Control 5 */ 119 {VIASR, SR2A, 0xFF, 0x00}, /* Power Management Control 5 */
124 {VIASR, SR2D, 0xFF, 0xFF}, /* Power Management Control 1 */ 120 {VIASR, SR2D, 0xFF, 0xFF}, /* Power Management Control 1 */
125 {VIASR, SR2E, 0xFF, 0xFF}, /* Power Management Control 2 */ 121 {VIASR, SR2E, 0xFF, 0xFF}, /* Power Management Control 2 */
126 {VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
127 {VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
128 {VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
129 {VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
130 {VIACR, CR33, 0xFF, 0x00}, 122 {VIACR, CR33, 0xFF, 0x00},
131 {VIACR, CR55, 0x80, 0x00}, 123 {VIACR, CR55, 0x80, 0x00},
132 {VIACR, CR5D, 0x80, 0x00}, 124 {VIACR, CR5D, 0x80, 0x00},
@@ -160,10 +152,6 @@ struct io_reg CX700_ModeXregs[] = { {VIASR, SR10, 0xFF, 0x01},
160{VIASR, SR1E, 0xFF, 0x01}, 152{VIASR, SR1E, 0xFF, 0x01},
161{VIASR, SR2A, 0xFF, 0x00}, 153{VIASR, SR2A, 0xFF, 0x00},
162{VIASR, SR2D, 0xC0, 0xC0}, /* delayed E3_ECK */ 154{VIASR, SR2D, 0xC0, 0xC0}, /* delayed E3_ECK */
163{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
164{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
165{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
166{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
167{VIACR, CR32, 0xFF, 0x00}, 155{VIACR, CR32, 0xFF, 0x00},
168{VIACR, CR33, 0xFF, 0x00}, 156{VIACR, CR33, 0xFF, 0x00},
169{VIACR, CR35, 0xFF, 0x00}, 157{VIACR, CR35, 0xFF, 0x00},
@@ -202,13 +190,6 @@ struct io_reg VX855_ModeXregs[] = {
202{VIASR, SR58, 0xFF, 0x00}, 190{VIASR, SR58, 0xFF, 0x00},
203{VIASR, SR59, 0xFF, 0x00}, 191{VIASR, SR59, 0xFF, 0x00},
204{VIASR, SR2D, 0xC0, 0xC0}, /* delayed E3_ECK */ 192{VIASR, SR2D, 0xC0, 0xC0}, /* delayed E3_ECK */
205{VIACR, CR09, 0xFF, 0x00}, /* Initial CR09=0*/
206{VIACR, CR11, 0x8F, 0x00}, /* IGA1 initial Vertical end */
207{VIACR, CR17, 0x7F, 0x00}, /* IGA1 CRT Mode control init */
208{VIACR, CR0A, 0xFF, 0x1E}, /* Cursor Start */
209{VIACR, CR0B, 0xFF, 0x00}, /* Cursor End */
210{VIACR, CR0E, 0xFF, 0x00}, /* Cursor Location High */
211{VIACR, CR0F, 0xFF, 0x00}, /* Cursor Localtion Low */
212{VIACR, CR32, 0xFF, 0x00}, 193{VIACR, CR32, 0xFF, 0x00},
213{VIACR, CR33, 0x7F, 0x00}, 194{VIACR, CR33, 0x7F, 0x00},
214{VIACR, CR35, 0xFF, 0x00}, 195{VIACR, CR35, 0xFF, 0x00},
@@ -602,7 +583,7 @@ static struct crt_mode_table CRTM1200x720[] = {
602/* 1200x900 (DCON) */ 583/* 1200x900 (DCON) */
603static struct crt_mode_table DCON1200x900[] = { 584static struct crt_mode_table DCON1200x900[] = {
604 /* r_rate, hsp, vsp */ 585 /* r_rate, hsp, vsp */
605 {REFRESH_60, M1200X900_R60_HSP, M1200X900_R60_VSP, 586 {REFRESH_49, M1200X900_R60_HSP, M1200X900_R60_VSP,
606 /* The correct htotal is 1240, but this doesn't raster on VX855. */ 587 /* The correct htotal is 1240, but this doesn't raster on VX855. */
607 /* Via suggested changing to a multiple of 16, hence 1264. */ 588 /* Via suggested changing to a multiple of 16, hence 1264. */
608 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */ 589 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-29 05:12:27 -0500