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-rw-r--r--drivers/net/gianfar.c364
-rw-r--r--drivers/net/gianfar.h38
-rw-r--r--drivers/net/gianfar_ethtool.c14
-rw-r--r--drivers/net/gianfar_sysfs.c34
4 files changed, 250 insertions, 200 deletions
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 354b2b5936ea..fa0188ea9233 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -151,7 +151,6 @@ MODULE_LICENSE("GPL");
151static void gfar_init_rxbdp(struct gfar_priv_rx_q *rx_queue, struct rxbd8 *bdp, 151static void gfar_init_rxbdp(struct gfar_priv_rx_q *rx_queue, struct rxbd8 *bdp,
152 dma_addr_t buf) 152 dma_addr_t buf)
153{ 153{
154 struct net_device *dev = rx_queue->dev;
155 u32 lstatus; 154 u32 lstatus;
156 155
157 bdp->bufPtr = buf; 156 bdp->bufPtr = buf;
@@ -290,9 +289,9 @@ cleanup:
290static void gfar_init_mac(struct net_device *ndev) 289static void gfar_init_mac(struct net_device *ndev)
291{ 290{
292 struct gfar_private *priv = netdev_priv(ndev); 291 struct gfar_private *priv = netdev_priv(ndev);
293 struct gfar __iomem *regs = priv->regs;
294 struct gfar_priv_tx_q *tx_queue = NULL; 292 struct gfar_priv_tx_q *tx_queue = NULL;
295 struct gfar_priv_rx_q *rx_queue = NULL; 293 struct gfar_priv_rx_q *rx_queue = NULL;
294 struct gfar __iomem *regs = priv->gfargrp.regs;
296 u32 rctrl = 0; 295 u32 rctrl = 0;
297 u32 tctrl = 0; 296 u32 tctrl = 0;
298 u32 attrs = 0; 297 u32 attrs = 0;
@@ -407,24 +406,25 @@ static int gfar_of_init(struct net_device *dev)
407 406
408 /* get a pointer to the register memory */ 407 /* get a pointer to the register memory */
409 addr = of_translate_address(np, of_get_address(np, 0, &size, NULL)); 408 addr = of_translate_address(np, of_get_address(np, 0, &size, NULL));
410 priv->regs = ioremap(addr, size); 409 priv->gfargrp.regs = ioremap(addr, size);
411 410
412 if (priv->regs == NULL) 411 if (priv->gfargrp.regs == NULL)
413 return -ENOMEM; 412 return -ENOMEM;
414 413
415 priv->interruptTransmit = irq_of_parse_and_map(np, 0); 414 priv->gfargrp.priv = priv; /* back pointer from group to priv */
415 priv->gfargrp.interruptTransmit = irq_of_parse_and_map(np, 0);
416 416
417 model = of_get_property(np, "model", NULL); 417 model = of_get_property(np, "model", NULL);
418 418
419 /* If we aren't the FEC we have multiple interrupts */ 419 /* If we aren't the FEC we have multiple interrupts */
420 if (model && strcasecmp(model, "FEC")) { 420 if (model && strcasecmp(model, "FEC")) {
421 priv->interruptReceive = irq_of_parse_and_map(np, 1); 421 priv->gfargrp.interruptReceive = irq_of_parse_and_map(np, 1);
422 422
423 priv->interruptError = irq_of_parse_and_map(np, 2); 423 priv->gfargrp.interruptError = irq_of_parse_and_map(np, 2);
424 424
425 if (priv->interruptTransmit < 0 || 425 if (priv->gfargrp.interruptTransmit < 0 ||
426 priv->interruptReceive < 0 || 426 priv->gfargrp.interruptReceive < 0 ||
427 priv->interruptError < 0) { 427 priv->gfargrp.interruptError < 0) {
428 err = -EINVAL; 428 err = -EINVAL;
429 goto err_out; 429 goto err_out;
430 } 430 }
@@ -491,7 +491,7 @@ static int gfar_of_init(struct net_device *dev)
491 return 0; 491 return 0;
492 492
493err_out: 493err_out:
494 iounmap(priv->regs); 494 iounmap(priv->gfargrp.regs);
495 return err; 495 return err;
496} 496}
497 497
@@ -517,6 +517,7 @@ static int gfar_probe(struct of_device *ofdev,
517 u32 tempval; 517 u32 tempval;
518 struct net_device *dev = NULL; 518 struct net_device *dev = NULL;
519 struct gfar_private *priv = NULL; 519 struct gfar_private *priv = NULL;
520 struct gfar __iomem *regs = NULL;
520 int err = 0; 521 int err = 0;
521 int len_devname; 522 int len_devname;
522 523
@@ -549,32 +550,34 @@ static int gfar_probe(struct of_device *ofdev,
549 550
550 spin_lock_init(&priv->tx_queue->txlock); 551 spin_lock_init(&priv->tx_queue->txlock);
551 spin_lock_init(&priv->rx_queue->rxlock); 552 spin_lock_init(&priv->rx_queue->rxlock);
553 spin_lock_init(&priv->gfargrp.grplock);
552 spin_lock_init(&priv->bflock); 554 spin_lock_init(&priv->bflock);
553 INIT_WORK(&priv->reset_task, gfar_reset_task); 555 INIT_WORK(&priv->reset_task, gfar_reset_task);
554 556
555 dev_set_drvdata(&ofdev->dev, priv); 557 dev_set_drvdata(&ofdev->dev, priv);
558 regs = priv->gfargrp.regs;
556 559
557 /* Stop the DMA engine now, in case it was running before */ 560 /* Stop the DMA engine now, in case it was running before */
558 /* (The firmware could have used it, and left it running). */ 561 /* (The firmware could have used it, and left it running). */
559 gfar_halt(dev); 562 gfar_halt(dev);
560 563
561 /* Reset MAC layer */ 564 /* Reset MAC layer */
562 gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET); 565 gfar_write(&regs->maccfg1, MACCFG1_SOFT_RESET);
563 566
564 /* We need to delay at least 3 TX clocks */ 567 /* We need to delay at least 3 TX clocks */
565 udelay(2); 568 udelay(2);
566 569
567 tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW); 570 tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
568 gfar_write(&priv->regs->maccfg1, tempval); 571 gfar_write(&regs->maccfg1, tempval);
569 572
570 /* Initialize MACCFG2. */ 573 /* Initialize MACCFG2. */
571 gfar_write(&priv->regs->maccfg2, MACCFG2_INIT_SETTINGS); 574 gfar_write(&regs->maccfg2, MACCFG2_INIT_SETTINGS);
572 575
573 /* Initialize ECNTRL */ 576 /* Initialize ECNTRL */
574 gfar_write(&priv->regs->ecntrl, ECNTRL_INIT_SETTINGS); 577 gfar_write(&regs->ecntrl, ECNTRL_INIT_SETTINGS);
575 578
576 /* Set the dev->base_addr to the gfar reg region */ 579 /* Set the dev->base_addr to the gfar reg region */
577 dev->base_addr = (unsigned long) (priv->regs); 580 dev->base_addr = (unsigned long) regs;
578 581
579 SET_NETDEV_DEV(dev, &ofdev->dev); 582 SET_NETDEV_DEV(dev, &ofdev->dev);
580 583
@@ -602,35 +605,35 @@ static int gfar_probe(struct of_device *ofdev,
602 priv->extended_hash = 1; 605 priv->extended_hash = 1;
603 priv->hash_width = 9; 606 priv->hash_width = 9;
604 607
605 priv->hash_regs[0] = &priv->regs->igaddr0; 608 priv->hash_regs[0] = &regs->igaddr0;
606 priv->hash_regs[1] = &priv->regs->igaddr1; 609 priv->hash_regs[1] = &regs->igaddr1;
607 priv->hash_regs[2] = &priv->regs->igaddr2; 610 priv->hash_regs[2] = &regs->igaddr2;
608 priv->hash_regs[3] = &priv->regs->igaddr3; 611 priv->hash_regs[3] = &regs->igaddr3;
609 priv->hash_regs[4] = &priv->regs->igaddr4; 612 priv->hash_regs[4] = &regs->igaddr4;
610 priv->hash_regs[5] = &priv->regs->igaddr5; 613 priv->hash_regs[5] = &regs->igaddr5;
611 priv->hash_regs[6] = &priv->regs->igaddr6; 614 priv->hash_regs[6] = &regs->igaddr6;
612 priv->hash_regs[7] = &priv->regs->igaddr7; 615 priv->hash_regs[7] = &regs->igaddr7;
613 priv->hash_regs[8] = &priv->regs->gaddr0; 616 priv->hash_regs[8] = &regs->gaddr0;
614 priv->hash_regs[9] = &priv->regs->gaddr1; 617 priv->hash_regs[9] = &regs->gaddr1;
615 priv->hash_regs[10] = &priv->regs->gaddr2; 618 priv->hash_regs[10] = &regs->gaddr2;
616 priv->hash_regs[11] = &priv->regs->gaddr3; 619 priv->hash_regs[11] = &regs->gaddr3;
617 priv->hash_regs[12] = &priv->regs->gaddr4; 620 priv->hash_regs[12] = &regs->gaddr4;
618 priv->hash_regs[13] = &priv->regs->gaddr5; 621 priv->hash_regs[13] = &regs->gaddr5;
619 priv->hash_regs[14] = &priv->regs->gaddr6; 622 priv->hash_regs[14] = &regs->gaddr6;
620 priv->hash_regs[15] = &priv->regs->gaddr7; 623 priv->hash_regs[15] = &regs->gaddr7;
621 624
622 } else { 625 } else {
623 priv->extended_hash = 0; 626 priv->extended_hash = 0;
624 priv->hash_width = 8; 627 priv->hash_width = 8;
625 628
626 priv->hash_regs[0] = &priv->regs->gaddr0; 629 priv->hash_regs[0] = &regs->gaddr0;
627 priv->hash_regs[1] = &priv->regs->gaddr1; 630 priv->hash_regs[1] = &regs->gaddr1;
628 priv->hash_regs[2] = &priv->regs->gaddr2; 631 priv->hash_regs[2] = &regs->gaddr2;
629 priv->hash_regs[3] = &priv->regs->gaddr3; 632 priv->hash_regs[3] = &regs->gaddr3;
630 priv->hash_regs[4] = &priv->regs->gaddr4; 633 priv->hash_regs[4] = &regs->gaddr4;
631 priv->hash_regs[5] = &priv->regs->gaddr5; 634 priv->hash_regs[5] = &regs->gaddr5;
632 priv->hash_regs[6] = &priv->regs->gaddr6; 635 priv->hash_regs[6] = &regs->gaddr6;
633 priv->hash_regs[7] = &priv->regs->gaddr7; 636 priv->hash_regs[7] = &regs->gaddr7;
634 } 637 }
635 638
636 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_PADDING) 639 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_PADDING)
@@ -672,20 +675,20 @@ static int gfar_probe(struct of_device *ofdev,
672 675
673 /* fill out IRQ number and name fields */ 676 /* fill out IRQ number and name fields */
674 len_devname = strlen(dev->name); 677 len_devname = strlen(dev->name);
675 strncpy(&priv->int_name_tx[0], dev->name, len_devname); 678 strncpy(&priv->gfargrp.int_name_tx[0], dev->name, len_devname);
676 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { 679 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
677 strncpy(&priv->int_name_tx[len_devname], 680 strncpy(&priv->gfargrp.int_name_tx[len_devname],
678 "_tx", sizeof("_tx") + 1); 681 "_tx", sizeof("_tx") + 1);
679 682
680 strncpy(&priv->int_name_rx[0], dev->name, len_devname); 683 strncpy(&priv->gfargrp.int_name_rx[0], dev->name, len_devname);
681 strncpy(&priv->int_name_rx[len_devname], 684 strncpy(&priv->gfargrp.int_name_rx[len_devname],
682 "_rx", sizeof("_rx") + 1); 685 "_rx", sizeof("_rx") + 1);
683 686
684 strncpy(&priv->int_name_er[0], dev->name, len_devname); 687 strncpy(&priv->gfargrp.int_name_er[0], dev->name, len_devname);
685 strncpy(&priv->int_name_er[len_devname], 688 strncpy(&priv->gfargrp.int_name_er[len_devname],
686 "_er", sizeof("_er") + 1); 689 "_er", sizeof("_er") + 1);
687 } else 690 } else
688 priv->int_name_tx[len_devname] = '\0'; 691 priv->gfargrp.int_name_tx[len_devname] = '\0';
689 692
690 /* Create all the sysfs files */ 693 /* Create all the sysfs files */
691 gfar_init_sysfs(dev); 694 gfar_init_sysfs(dev);
@@ -702,7 +705,7 @@ static int gfar_probe(struct of_device *ofdev,
702 return 0; 705 return 0;
703 706
704register_fail: 707register_fail:
705 iounmap(priv->regs); 708 iounmap(priv->gfargrp.regs);
706 kfree(priv->rx_queue); 709 kfree(priv->rx_queue);
707rx_queue_fail: 710rx_queue_fail:
708 kfree(priv->tx_queue); 711 kfree(priv->tx_queue);
@@ -727,7 +730,7 @@ static int gfar_remove(struct of_device *ofdev)
727 dev_set_drvdata(&ofdev->dev, NULL); 730 dev_set_drvdata(&ofdev->dev, NULL);
728 731
729 unregister_netdev(priv->ndev); 732 unregister_netdev(priv->ndev);
730 iounmap(priv->regs); 733 iounmap(priv->gfargrp.regs);
731 free_netdev(priv->ndev); 734 free_netdev(priv->ndev);
732 735
733 return 0; 736 return 0;
@@ -741,6 +744,7 @@ static int gfar_suspend(struct device *dev)
741 struct net_device *ndev = priv->ndev; 744 struct net_device *ndev = priv->ndev;
742 struct gfar_priv_tx_q *tx_queue = NULL; 745 struct gfar_priv_tx_q *tx_queue = NULL;
743 struct gfar_priv_rx_q *rx_queue = NULL; 746 struct gfar_priv_rx_q *rx_queue = NULL;
747 struct gfar __iomem *regs = NULL;
744 unsigned long flags; 748 unsigned long flags;
745 u32 tempval; 749 u32 tempval;
746 750
@@ -750,6 +754,7 @@ static int gfar_suspend(struct device *dev)
750 netif_device_detach(ndev); 754 netif_device_detach(ndev);
751 tx_queue = priv->tx_queue; 755 tx_queue = priv->tx_queue;
752 rx_queue = priv->rx_queue; 756 rx_queue = priv->rx_queue;
757 regs = priv->gfargrp.regs;
753 758
754 if (netif_running(ndev)) { 759 if (netif_running(ndev)) {
755 spin_lock_irqsave(&tx_queue->txlock, flags); 760 spin_lock_irqsave(&tx_queue->txlock, flags);
@@ -758,14 +763,14 @@ static int gfar_suspend(struct device *dev)
758 gfar_halt_nodisable(ndev); 763 gfar_halt_nodisable(ndev);
759 764
760 /* Disable Tx, and Rx if wake-on-LAN is disabled. */ 765 /* Disable Tx, and Rx if wake-on-LAN is disabled. */
761 tempval = gfar_read(&priv->regs->maccfg1); 766 tempval = gfar_read(&regs->maccfg1);
762 767
763 tempval &= ~MACCFG1_TX_EN; 768 tempval &= ~MACCFG1_TX_EN;
764 769
765 if (!magic_packet) 770 if (!magic_packet)
766 tempval &= ~MACCFG1_RX_EN; 771 tempval &= ~MACCFG1_RX_EN;
767 772
768 gfar_write(&priv->regs->maccfg1, tempval); 773 gfar_write(&regs->maccfg1, tempval);
769 774
770 spin_unlock(&rx_queue->rxlock); 775 spin_unlock(&rx_queue->rxlock);
771 spin_unlock_irqrestore(&tx_queue->txlock, flags); 776 spin_unlock_irqrestore(&tx_queue->txlock, flags);
@@ -774,12 +779,12 @@ static int gfar_suspend(struct device *dev)
774 779
775 if (magic_packet) { 780 if (magic_packet) {
776 /* Enable interrupt on Magic Packet */ 781 /* Enable interrupt on Magic Packet */
777 gfar_write(&priv->regs->imask, IMASK_MAG); 782 gfar_write(&regs->imask, IMASK_MAG);
778 783
779 /* Enable Magic Packet mode */ 784 /* Enable Magic Packet mode */
780 tempval = gfar_read(&priv->regs->maccfg2); 785 tempval = gfar_read(&regs->maccfg2);
781 tempval |= MACCFG2_MPEN; 786 tempval |= MACCFG2_MPEN;
782 gfar_write(&priv->regs->maccfg2, tempval); 787 gfar_write(&regs->maccfg2, tempval);
783 } else { 788 } else {
784 phy_stop(priv->phydev); 789 phy_stop(priv->phydev);
785 } 790 }
@@ -794,6 +799,7 @@ static int gfar_resume(struct device *dev)
794 struct net_device *ndev = priv->ndev; 799 struct net_device *ndev = priv->ndev;
795 struct gfar_priv_tx_q *tx_queue = NULL; 800 struct gfar_priv_tx_q *tx_queue = NULL;
796 struct gfar_priv_rx_q *rx_queue = NULL; 801 struct gfar_priv_rx_q *rx_queue = NULL;
802 struct gfar __iomem *regs = NULL;
797 unsigned long flags; 803 unsigned long flags;
798 u32 tempval; 804 u32 tempval;
799 int magic_packet = priv->wol_en && 805 int magic_packet = priv->wol_en &&
@@ -812,13 +818,14 @@ static int gfar_resume(struct device *dev)
812 */ 818 */
813 rx_queue = priv->rx_queue; 819 rx_queue = priv->rx_queue;
814 tx_queue = priv->tx_queue; 820 tx_queue = priv->tx_queue;
821 regs = priv->gfargrp.regs;
815 822
816 spin_lock_irqsave(&tx_queue->txlock, flags); 823 spin_lock_irqsave(&tx_queue->txlock, flags);
817 spin_lock(&rx_queue->rxlock); 824 spin_lock(&rx_queue->rxlock);
818 825
819 tempval = gfar_read(&priv->regs->maccfg2); 826 tempval = gfar_read(&regs->maccfg2);
820 tempval &= ~MACCFG2_MPEN; 827 tempval &= ~MACCFG2_MPEN;
821 gfar_write(&priv->regs->maccfg2, tempval); 828 gfar_write(&regs->maccfg2, tempval);
822 829
823 gfar_start(ndev); 830 gfar_start(ndev);
824 831
@@ -893,7 +900,11 @@ static int gfar_legacy_resume(struct of_device *ofdev)
893static phy_interface_t gfar_get_interface(struct net_device *dev) 900static phy_interface_t gfar_get_interface(struct net_device *dev)
894{ 901{
895 struct gfar_private *priv = netdev_priv(dev); 902 struct gfar_private *priv = netdev_priv(dev);
896 u32 ecntrl = gfar_read(&priv->regs->ecntrl); 903 struct gfar __iomem *regs = NULL;
904 u32 ecntrl;
905
906 regs = priv->gfargrp.regs;
907 ecntrl = gfar_read(&regs->ecntrl);
897 908
898 if (ecntrl & ECNTRL_SGMII_MODE) 909 if (ecntrl & ECNTRL_SGMII_MODE)
899 return PHY_INTERFACE_MODE_SGMII; 910 return PHY_INTERFACE_MODE_SGMII;
@@ -1015,46 +1026,48 @@ static void gfar_configure_serdes(struct net_device *dev)
1015static void init_registers(struct net_device *dev) 1026static void init_registers(struct net_device *dev)
1016{ 1027{
1017 struct gfar_private *priv = netdev_priv(dev); 1028 struct gfar_private *priv = netdev_priv(dev);
1029 struct gfar __iomem *regs = NULL;
1018 1030
1031 regs = priv->gfargrp.regs;
1019 /* Clear IEVENT */ 1032 /* Clear IEVENT */
1020 gfar_write(&priv->regs->ievent, IEVENT_INIT_CLEAR); 1033 gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
1021 1034
1022 /* Initialize IMASK */ 1035 /* Initialize IMASK */
1023 gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR); 1036 gfar_write(&regs->imask, IMASK_INIT_CLEAR);
1024 1037
1025 /* Init hash registers to zero */ 1038 /* Init hash registers to zero */
1026 gfar_write(&priv->regs->igaddr0, 0); 1039 gfar_write(&regs->igaddr0, 0);
1027 gfar_write(&priv->regs->igaddr1, 0); 1040 gfar_write(&regs->igaddr1, 0);
1028 gfar_write(&priv->regs->igaddr2, 0); 1041 gfar_write(&regs->igaddr2, 0);
1029 gfar_write(&priv->regs->igaddr3, 0); 1042 gfar_write(&regs->igaddr3, 0);
1030 gfar_write(&priv->regs->igaddr4, 0); 1043 gfar_write(&regs->igaddr4, 0);
1031 gfar_write(&priv->regs->igaddr5, 0); 1044 gfar_write(&regs->igaddr5, 0);
1032 gfar_write(&priv->regs->igaddr6, 0); 1045 gfar_write(&regs->igaddr6, 0);
1033 gfar_write(&priv->regs->igaddr7, 0); 1046 gfar_write(&regs->igaddr7, 0);
1034 1047
1035 gfar_write(&priv->regs->gaddr0, 0); 1048 gfar_write(&regs->gaddr0, 0);
1036 gfar_write(&priv->regs->gaddr1, 0); 1049 gfar_write(&regs->gaddr1, 0);
1037 gfar_write(&priv->regs->gaddr2, 0); 1050 gfar_write(&regs->gaddr2, 0);
1038 gfar_write(&priv->regs->gaddr3, 0); 1051 gfar_write(&regs->gaddr3, 0);
1039 gfar_write(&priv->regs->gaddr4, 0); 1052 gfar_write(&regs->gaddr4, 0);
1040 gfar_write(&priv->regs->gaddr5, 0); 1053 gfar_write(&regs->gaddr5, 0);
1041 gfar_write(&priv->regs->gaddr6, 0); 1054 gfar_write(&regs->gaddr6, 0);
1042 gfar_write(&priv->regs->gaddr7, 0); 1055 gfar_write(&regs->gaddr7, 0);
1043 1056
1044 /* Zero out the rmon mib registers if it has them */ 1057 /* Zero out the rmon mib registers if it has them */
1045 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) { 1058 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
1046 memset_io(&(priv->regs->rmon), 0, sizeof (struct rmon_mib)); 1059 memset_io(&(regs->rmon), 0, sizeof (struct rmon_mib));
1047 1060
1048 /* Mask off the CAM interrupts */ 1061 /* Mask off the CAM interrupts */
1049 gfar_write(&priv->regs->rmon.cam1, 0xffffffff); 1062 gfar_write(&regs->rmon.cam1, 0xffffffff);
1050 gfar_write(&priv->regs->rmon.cam2, 0xffffffff); 1063 gfar_write(&regs->rmon.cam2, 0xffffffff);
1051 } 1064 }
1052 1065
1053 /* Initialize the max receive buffer length */ 1066 /* Initialize the max receive buffer length */
1054 gfar_write(&priv->regs->mrblr, priv->rx_buffer_size); 1067 gfar_write(&regs->mrblr, priv->rx_buffer_size);
1055 1068
1056 /* Initialize the Minimum Frame Length Register */ 1069 /* Initialize the Minimum Frame Length Register */
1057 gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS); 1070 gfar_write(&regs->minflr, MINFLR_INIT_SETTINGS);
1058} 1071}
1059 1072
1060 1073
@@ -1062,7 +1075,7 @@ static void init_registers(struct net_device *dev)
1062static void gfar_halt_nodisable(struct net_device *dev) 1075static void gfar_halt_nodisable(struct net_device *dev)
1063{ 1076{
1064 struct gfar_private *priv = netdev_priv(dev); 1077 struct gfar_private *priv = netdev_priv(dev);
1065 struct gfar __iomem *regs = priv->regs; 1078 struct gfar __iomem *regs = priv->gfargrp.regs;
1066 u32 tempval; 1079 u32 tempval;
1067 1080
1068 /* Mask all interrupts */ 1081 /* Mask all interrupts */
@@ -1072,13 +1085,13 @@ static void gfar_halt_nodisable(struct net_device *dev)
1072 gfar_write(&regs->ievent, IEVENT_INIT_CLEAR); 1085 gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
1073 1086
1074 /* Stop the DMA, and wait for it to stop */ 1087 /* Stop the DMA, and wait for it to stop */
1075 tempval = gfar_read(&priv->regs->dmactrl); 1088 tempval = gfar_read(&regs->dmactrl);
1076 if ((tempval & (DMACTRL_GRS | DMACTRL_GTS)) 1089 if ((tempval & (DMACTRL_GRS | DMACTRL_GTS))
1077 != (DMACTRL_GRS | DMACTRL_GTS)) { 1090 != (DMACTRL_GRS | DMACTRL_GTS)) {
1078 tempval |= (DMACTRL_GRS | DMACTRL_GTS); 1091 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
1079 gfar_write(&priv->regs->dmactrl, tempval); 1092 gfar_write(&regs->dmactrl, tempval);
1080 1093
1081 while (!(gfar_read(&priv->regs->ievent) & 1094 while (!(gfar_read(&regs->ievent) &
1082 (IEVENT_GRSC | IEVENT_GTSC))) 1095 (IEVENT_GRSC | IEVENT_GTSC)))
1083 cpu_relax(); 1096 cpu_relax();
1084 } 1097 }
@@ -1088,7 +1101,7 @@ static void gfar_halt_nodisable(struct net_device *dev)
1088void gfar_halt(struct net_device *dev) 1101void gfar_halt(struct net_device *dev)
1089{ 1102{
1090 struct gfar_private *priv = netdev_priv(dev); 1103 struct gfar_private *priv = netdev_priv(dev);
1091 struct gfar __iomem *regs = priv->regs; 1104 struct gfar __iomem *regs = priv->gfargrp.regs;
1092 u32 tempval; 1105 u32 tempval;
1093 1106
1094 gfar_halt_nodisable(dev); 1107 gfar_halt_nodisable(dev);
@@ -1122,11 +1135,11 @@ void stop_gfar(struct net_device *dev)
1122 1135
1123 /* Free the IRQs */ 1136 /* Free the IRQs */
1124 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { 1137 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1125 free_irq(priv->interruptError, dev); 1138 free_irq(priv->gfargrp.interruptError, &priv->gfargrp);
1126 free_irq(priv->interruptTransmit, dev); 1139 free_irq(priv->gfargrp.interruptTransmit, &priv->gfargrp);
1127 free_irq(priv->interruptReceive, dev); 1140 free_irq(priv->gfargrp.interruptReceive, &priv->gfargrp);
1128 } else { 1141 } else {
1129 free_irq(priv->interruptTransmit, dev); 1142 free_irq(priv->gfargrp.interruptTransmit, &priv->gfargrp);
1130 } 1143 }
1131 1144
1132 free_skb_resources(priv); 1145 free_skb_resources(priv);
@@ -1201,9 +1214,7 @@ skip_rx_skbuff:
1201void gfar_start(struct net_device *dev) 1214void gfar_start(struct net_device *dev)
1202{ 1215{
1203 struct gfar_private *priv = netdev_priv(dev); 1216 struct gfar_private *priv = netdev_priv(dev);
1204 struct gfar_priv_tx_q *tx_queue; 1217 struct gfar __iomem *regs = priv->gfargrp.regs;
1205 struct gfar_priv_rx_q *rx_queue;
1206 struct gfar __iomem *regs = priv->regs;
1207 u32 tempval; 1218 u32 tempval;
1208 1219
1209 /* Enable Rx and Tx in MACCFG1 */ 1220 /* Enable Rx and Tx in MACCFG1 */
@@ -1212,14 +1223,14 @@ void gfar_start(struct net_device *dev)
1212 gfar_write(&regs->maccfg1, tempval); 1223 gfar_write(&regs->maccfg1, tempval);
1213 1224
1214 /* Initialize DMACTRL to have WWR and WOP */ 1225 /* Initialize DMACTRL to have WWR and WOP */
1215 tempval = gfar_read(&priv->regs->dmactrl); 1226 tempval = gfar_read(&regs->dmactrl);
1216 tempval |= DMACTRL_INIT_SETTINGS; 1227 tempval |= DMACTRL_INIT_SETTINGS;
1217 gfar_write(&priv->regs->dmactrl, tempval); 1228 gfar_write(&regs->dmactrl, tempval);
1218 1229
1219 /* Make sure we aren't stopped */ 1230 /* Make sure we aren't stopped */
1220 tempval = gfar_read(&priv->regs->dmactrl); 1231 tempval = gfar_read(&regs->dmactrl);
1221 tempval &= ~(DMACTRL_GRS | DMACTRL_GTS); 1232 tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
1222 gfar_write(&priv->regs->dmactrl, tempval); 1233 gfar_write(&regs->dmactrl, tempval);
1223 1234
1224 /* Clear THLT/RHLT, so that the DMA starts polling now */ 1235 /* Clear THLT/RHLT, so that the DMA starts polling now */
1225 gfar_write(&regs->tstat, TSTAT_CLEAR_THALT); 1236 gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
@@ -1235,7 +1246,7 @@ void gfar_start(struct net_device *dev)
1235int startup_gfar(struct net_device *ndev) 1246int startup_gfar(struct net_device *ndev)
1236{ 1247{
1237 struct gfar_private *priv = netdev_priv(ndev); 1248 struct gfar_private *priv = netdev_priv(ndev);
1238 struct gfar __iomem *regs = priv->regs; 1249 struct gfar __iomem *regs = priv->gfargrp.regs;
1239 int err; 1250 int err;
1240 1251
1241 gfar_write(&regs->imask, IMASK_INIT_CLEAR); 1252 gfar_write(&regs->imask, IMASK_INIT_CLEAR);
@@ -1251,39 +1262,46 @@ int startup_gfar(struct net_device *ndev)
1251 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { 1262 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
1252 /* Install our interrupt handlers for Error, 1263 /* Install our interrupt handlers for Error,
1253 * Transmit, and Receive */ 1264 * Transmit, and Receive */
1254 err = request_irq(priv->interruptError, gfar_error, 0, 1265 err = request_irq(priv->gfargrp.interruptError, gfar_error, 0,
1255 priv->int_name_er, ndev); 1266 priv->gfargrp.int_name_er, &priv->gfargrp);
1256 if (err) { 1267 if (err) {
1257 if (netif_msg_intr(priv)) 1268 if (netif_msg_intr(priv))
1258 pr_err("%s: Can't get IRQ %d\n", ndev->name, 1269 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1259 priv->interruptError); 1270 priv->gfargrp.interruptError);
1260 goto err_irq_fail; 1271 goto err_irq_fail;
1261 } 1272 }
1262 1273
1263 err = request_irq(priv->interruptTransmit, gfar_transmit, 0, 1274 err = request_irq(priv->gfargrp.interruptTransmit,
1264 priv->int_name_tx, ndev); 1275 gfar_transmit, 0,
1276 priv->gfargrp.int_name_tx,
1277 &priv->gfargrp);
1265 if (err) { 1278 if (err) {
1266 if (netif_msg_intr(priv)) 1279 if (netif_msg_intr(priv))
1267 pr_err("%s: Can't get IRQ %d\n", ndev->name, 1280 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1268 priv->interruptTransmit); 1281 priv->gfargrp.interruptTransmit);
1269 goto tx_irq_fail; 1282 goto tx_irq_fail;
1270 } 1283 }
1271 1284
1272 err = request_irq(priv->interruptReceive, gfar_receive, 0, 1285 err = request_irq(priv->gfargrp.interruptReceive,
1273 priv->int_name_rx, ndev); 1286 gfar_receive, 0,
1287 priv->gfargrp.int_name_rx,
1288 &priv->gfargrp);
1274 if (err) { 1289 if (err) {
1275 if (netif_msg_intr(priv)) 1290 if (netif_msg_intr(priv))
1276 pr_err("%s: Can't get IRQ %d (receive0)\n", 1291 pr_err("%s: Can't get IRQ %d (receive0)\n",
1277 ndev->name, priv->interruptReceive); 1292 ndev->name,
1293 priv->gfargrp.interruptReceive);
1278 goto rx_irq_fail; 1294 goto rx_irq_fail;
1279 } 1295 }
1280 } else { 1296 } else {
1281 err = request_irq(priv->interruptTransmit, gfar_interrupt, 1297 err = request_irq(priv->gfargrp.interruptTransmit,
1282 0, priv->int_name_tx, ndev); 1298 gfar_interrupt, 0,
1299 priv->gfargrp.int_name_tx,
1300 &priv->gfargrp);
1283 if (err) { 1301 if (err) {
1284 if (netif_msg_intr(priv)) 1302 if (netif_msg_intr(priv))
1285 pr_err("%s: Can't get IRQ %d\n", ndev->name, 1303 pr_err("%s: Can't get IRQ %d\n", ndev->name,
1286 priv->interruptTransmit); 1304 priv->gfargrp.interruptTransmit);
1287 goto err_irq_fail; 1305 goto err_irq_fail;
1288 } 1306 }
1289 } 1307 }
@@ -1296,9 +1314,9 @@ int startup_gfar(struct net_device *ndev)
1296 return 0; 1314 return 0;
1297 1315
1298rx_irq_fail: 1316rx_irq_fail:
1299 free_irq(priv->interruptTransmit, ndev); 1317 free_irq(priv->gfargrp.interruptTransmit, &priv->gfargrp);
1300tx_irq_fail: 1318tx_irq_fail:
1301 free_irq(priv->interruptError, ndev); 1319 free_irq(priv->gfargrp.interruptError, &priv->gfargrp);
1302err_irq_fail: 1320err_irq_fail:
1303 free_skb_resources(priv); 1321 free_skb_resources(priv);
1304 return err; 1322 return err;
@@ -1403,6 +1421,7 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1403{ 1421{
1404 struct gfar_private *priv = netdev_priv(dev); 1422 struct gfar_private *priv = netdev_priv(dev);
1405 struct gfar_priv_tx_q *tx_queue = NULL; 1423 struct gfar_priv_tx_q *tx_queue = NULL;
1424 struct gfar __iomem *regs = NULL;
1406 struct txfcb *fcb = NULL; 1425 struct txfcb *fcb = NULL;
1407 struct txbd8 *txbdp, *txbdp_start, *base; 1426 struct txbd8 *txbdp, *txbdp_start, *base;
1408 u32 lstatus; 1427 u32 lstatus;
@@ -1413,6 +1432,7 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1413 1432
1414 tx_queue = priv->tx_queue; 1433 tx_queue = priv->tx_queue;
1415 base = tx_queue->tx_bd_base; 1434 base = tx_queue->tx_bd_base;
1435 regs = priv->gfargrp.regs;
1416 1436
1417 /* make space for additional header when fcb is needed */ 1437 /* make space for additional header when fcb is needed */
1418 if (((skb->ip_summed == CHECKSUM_PARTIAL) || 1438 if (((skb->ip_summed == CHECKSUM_PARTIAL) ||
@@ -1536,7 +1556,7 @@ static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
1536 } 1556 }
1537 1557
1538 /* Tell the DMA to go go go */ 1558 /* Tell the DMA to go go go */
1539 gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); 1559 gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
1540 1560
1541 /* Unlock priv */ 1561 /* Unlock priv */
1542 spin_unlock_irqrestore(&tx_queue->txlock, flags); 1562 spin_unlock_irqrestore(&tx_queue->txlock, flags);
@@ -1579,40 +1599,42 @@ static void gfar_vlan_rx_register(struct net_device *dev,
1579{ 1599{
1580 struct gfar_private *priv = netdev_priv(dev); 1600 struct gfar_private *priv = netdev_priv(dev);
1581 struct gfar_priv_rx_q *rx_queue = NULL; 1601 struct gfar_priv_rx_q *rx_queue = NULL;
1602 struct gfar __iomem *regs = NULL;
1582 unsigned long flags; 1603 unsigned long flags;
1583 u32 tempval; 1604 u32 tempval;
1584 1605
1585 rx_queue = priv->rx_queue; 1606 rx_queue = priv->rx_queue;
1607 regs = priv->gfargrp.regs;
1586 spin_lock_irqsave(&rx_queue->rxlock, flags); 1608 spin_lock_irqsave(&rx_queue->rxlock, flags);
1587 1609
1588 priv->vlgrp = grp; 1610 priv->vlgrp = grp;
1589 1611
1590 if (grp) { 1612 if (grp) {
1591 /* Enable VLAN tag insertion */ 1613 /* Enable VLAN tag insertion */
1592 tempval = gfar_read(&priv->regs->tctrl); 1614 tempval = gfar_read(&regs->tctrl);
1593 tempval |= TCTRL_VLINS; 1615 tempval |= TCTRL_VLINS;
1594 1616
1595 gfar_write(&priv->regs->tctrl, tempval); 1617 gfar_write(&regs->tctrl, tempval);
1596 1618
1597 /* Enable VLAN tag extraction */ 1619 /* Enable VLAN tag extraction */
1598 tempval = gfar_read(&priv->regs->rctrl); 1620 tempval = gfar_read(&regs->rctrl);
1599 tempval |= (RCTRL_VLEX | RCTRL_PRSDEP_INIT); 1621 tempval |= (RCTRL_VLEX | RCTRL_PRSDEP_INIT);
1600 gfar_write(&priv->regs->rctrl, tempval); 1622 gfar_write(&regs->rctrl, tempval);
1601 } else { 1623 } else {
1602 /* Disable VLAN tag insertion */ 1624 /* Disable VLAN tag insertion */
1603 tempval = gfar_read(&priv->regs->tctrl); 1625 tempval = gfar_read(&regs->tctrl);
1604 tempval &= ~TCTRL_VLINS; 1626 tempval &= ~TCTRL_VLINS;
1605 gfar_write(&priv->regs->tctrl, tempval); 1627 gfar_write(&regs->tctrl, tempval);
1606 1628
1607 /* Disable VLAN tag extraction */ 1629 /* Disable VLAN tag extraction */
1608 tempval = gfar_read(&priv->regs->rctrl); 1630 tempval = gfar_read(&regs->rctrl);
1609 tempval &= ~RCTRL_VLEX; 1631 tempval &= ~RCTRL_VLEX;
1610 /* If parse is no longer required, then disable parser */ 1632 /* If parse is no longer required, then disable parser */
1611 if (tempval & RCTRL_REQ_PARSER) 1633 if (tempval & RCTRL_REQ_PARSER)
1612 tempval |= RCTRL_PRSDEP_INIT; 1634 tempval |= RCTRL_PRSDEP_INIT;
1613 else 1635 else
1614 tempval &= ~RCTRL_PRSDEP_INIT; 1636 tempval &= ~RCTRL_PRSDEP_INIT;
1615 gfar_write(&priv->regs->rctrl, tempval); 1637 gfar_write(&regs->rctrl, tempval);
1616 } 1638 }
1617 1639
1618 gfar_change_mtu(dev, dev->mtu); 1640 gfar_change_mtu(dev, dev->mtu);
@@ -1624,6 +1646,7 @@ static int gfar_change_mtu(struct net_device *dev, int new_mtu)
1624{ 1646{
1625 int tempsize, tempval; 1647 int tempsize, tempval;
1626 struct gfar_private *priv = netdev_priv(dev); 1648 struct gfar_private *priv = netdev_priv(dev);
1649 struct gfar __iomem *regs = priv->gfargrp.regs;
1627 int oldsize = priv->rx_buffer_size; 1650 int oldsize = priv->rx_buffer_size;
1628 int frame_size = new_mtu + ETH_HLEN; 1651 int frame_size = new_mtu + ETH_HLEN;
1629 1652
@@ -1655,20 +1678,20 @@ static int gfar_change_mtu(struct net_device *dev, int new_mtu)
1655 1678
1656 dev->mtu = new_mtu; 1679 dev->mtu = new_mtu;
1657 1680
1658 gfar_write(&priv->regs->mrblr, priv->rx_buffer_size); 1681 gfar_write(&regs->mrblr, priv->rx_buffer_size);
1659 gfar_write(&priv->regs->maxfrm, priv->rx_buffer_size); 1682 gfar_write(&regs->maxfrm, priv->rx_buffer_size);
1660 1683
1661 /* If the mtu is larger than the max size for standard 1684 /* If the mtu is larger than the max size for standard
1662 * ethernet frames (ie, a jumbo frame), then set maccfg2 1685 * ethernet frames (ie, a jumbo frame), then set maccfg2
1663 * to allow huge frames, and to check the length */ 1686 * to allow huge frames, and to check the length */
1664 tempval = gfar_read(&priv->regs->maccfg2); 1687 tempval = gfar_read(&regs->maccfg2);
1665 1688
1666 if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE) 1689 if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE)
1667 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK); 1690 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1668 else 1691 else
1669 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK); 1692 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1670 1693
1671 gfar_write(&priv->regs->maccfg2, tempval); 1694 gfar_write(&regs->maccfg2, tempval);
1672 1695
1673 if ((oldsize != tempsize) && (dev->flags & IFF_UP)) 1696 if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1674 startup_gfar(dev); 1697 startup_gfar(dev);
@@ -1787,9 +1810,9 @@ static int gfar_clean_tx_ring(struct gfar_priv_tx_q *tx_queue)
1787 return howmany; 1810 return howmany;
1788} 1811}
1789 1812
1790static void gfar_schedule_cleanup(struct net_device *dev) 1813static void gfar_schedule_cleanup(struct gfar_priv_grp *gfargrp)
1791{ 1814{
1792 struct gfar_private *priv = netdev_priv(dev); 1815 struct gfar_private *priv = gfargrp->priv;
1793 struct gfar_priv_tx_q *tx_queue = NULL; 1816 struct gfar_priv_tx_q *tx_queue = NULL;
1794 struct gfar_priv_rx_q *rx_queue = NULL; 1817 struct gfar_priv_rx_q *rx_queue = NULL;
1795 unsigned long flags; 1818 unsigned long flags;
@@ -1800,14 +1823,14 @@ static void gfar_schedule_cleanup(struct net_device *dev)
1800 spin_lock(&rx_queue->rxlock); 1823 spin_lock(&rx_queue->rxlock);
1801 1824
1802 if (napi_schedule_prep(&rx_queue->napi)) { 1825 if (napi_schedule_prep(&rx_queue->napi)) {
1803 gfar_write(&priv->regs->imask, IMASK_RTX_DISABLED); 1826 gfar_write(&gfargrp->regs->imask, IMASK_RTX_DISABLED);
1804 __napi_schedule(&rx_queue->napi); 1827 __napi_schedule(&rx_queue->napi);
1805 } else { 1828 } else {
1806 /* 1829 /*
1807 * Clear IEVENT, so interrupts aren't called again 1830 * Clear IEVENT, so interrupts aren't called again
1808 * because of the packets that have already arrived. 1831 * because of the packets that have already arrived.
1809 */ 1832 */
1810 gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK); 1833 gfar_write(&gfargrp->regs->ievent, IEVENT_RTX_MASK);
1811 } 1834 }
1812 1835
1813 spin_unlock(&rx_queue->rxlock); 1836 spin_unlock(&rx_queue->rxlock);
@@ -1815,9 +1838,9 @@ static void gfar_schedule_cleanup(struct net_device *dev)
1815} 1838}
1816 1839
1817/* Interrupt Handler for Transmit complete */ 1840/* Interrupt Handler for Transmit complete */
1818static irqreturn_t gfar_transmit(int irq, void *dev_id) 1841static irqreturn_t gfar_transmit(int irq, void *grp_id)
1819{ 1842{
1820 gfar_schedule_cleanup((struct net_device *)dev_id); 1843 gfar_schedule_cleanup((struct gfar_priv_grp *)grp_id);
1821 return IRQ_HANDLED; 1844 return IRQ_HANDLED;
1822} 1845}
1823 1846
@@ -1897,9 +1920,9 @@ static inline void count_errors(unsigned short status, struct net_device *dev)
1897 } 1920 }
1898} 1921}
1899 1922
1900irqreturn_t gfar_receive(int irq, void *dev_id) 1923irqreturn_t gfar_receive(int irq, void *grp_id)
1901{ 1924{
1902 gfar_schedule_cleanup((struct net_device *)dev_id); 1925 gfar_schedule_cleanup((struct gfar_priv_grp *)grp_id);
1903 return IRQ_HANDLED; 1926 return IRQ_HANDLED;
1904} 1927}
1905 1928
@@ -2053,6 +2076,7 @@ static int gfar_poll(struct napi_struct *napi, int budget)
2053 struct gfar_priv_rx_q, napi); 2076 struct gfar_priv_rx_q, napi);
2054 struct net_device *dev = rx_queue->dev; 2077 struct net_device *dev = rx_queue->dev;
2055 struct gfar_private *priv = netdev_priv(dev); 2078 struct gfar_private *priv = netdev_priv(dev);
2079 struct gfar __iomem *regs = priv->gfargrp.regs;
2056 struct gfar_priv_tx_q *tx_queue = NULL; 2080 struct gfar_priv_tx_q *tx_queue = NULL;
2057 int tx_cleaned = 0; 2081 int tx_cleaned = 0;
2058 int rx_cleaned = 0; 2082 int rx_cleaned = 0;
@@ -2060,7 +2084,7 @@ static int gfar_poll(struct napi_struct *napi, int budget)
2060 2084
2061 /* Clear IEVENT, so interrupts aren't called again 2085 /* Clear IEVENT, so interrupts aren't called again
2062 * because of the packets that have already arrived */ 2086 * because of the packets that have already arrived */
2063 gfar_write(&priv->regs->ievent, IEVENT_RTX_MASK); 2087 gfar_write(&regs->ievent, IEVENT_RTX_MASK);
2064 tx_queue = priv->tx_queue; 2088 tx_queue = priv->tx_queue;
2065 2089
2066 /* If we fail to get the lock, don't bother with the TX BDs */ 2090 /* If we fail to get the lock, don't bother with the TX BDs */
@@ -2078,19 +2102,19 @@ static int gfar_poll(struct napi_struct *napi, int budget)
2078 napi_complete(napi); 2102 napi_complete(napi);
2079 2103
2080 /* Clear the halt bit in RSTAT */ 2104 /* Clear the halt bit in RSTAT */
2081 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT); 2105 gfar_write(&regs->rstat, RSTAT_CLEAR_RHALT);
2082 2106
2083 gfar_write(&priv->regs->imask, IMASK_DEFAULT); 2107 gfar_write(&regs->imask, IMASK_DEFAULT);
2084 2108
2085 /* If we are coalescing interrupts, update the timer */ 2109 /* If we are coalescing interrupts, update the timer */
2086 /* Otherwise, clear it */ 2110 /* Otherwise, clear it */
2087 if (likely(rx_queue->rxcoalescing)) { 2111 if (likely(rx_queue->rxcoalescing)) {
2088 gfar_write(&priv->regs->rxic, 0); 2112 gfar_write(&regs->rxic, 0);
2089 gfar_write(&priv->regs->rxic, rx_queue->rxic); 2113 gfar_write(&regs->rxic, rx_queue->rxic);
2090 } 2114 }
2091 if (likely(tx_queue->txcoalescing)) { 2115 if (likely(tx_queue->txcoalescing)) {
2092 gfar_write(&priv->regs->txic, 0); 2116 gfar_write(&regs->txic, 0);
2093 gfar_write(&priv->regs->txic, tx_queue->txic); 2117 gfar_write(&regs->txic, tx_queue->txic);
2094 } 2118 }
2095 } 2119 }
2096 2120
@@ -2109,41 +2133,40 @@ static void gfar_netpoll(struct net_device *dev)
2109 2133
2110 /* If the device has multiple interrupts, run tx/rx */ 2134 /* If the device has multiple interrupts, run tx/rx */
2111 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) { 2135 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
2112 disable_irq(priv->interruptTransmit); 2136 disable_irq(priv->gfargrp.interruptTransmit);
2113 disable_irq(priv->interruptReceive); 2137 disable_irq(priv->gfargrp.interruptReceive);
2114 disable_irq(priv->interruptError); 2138 disable_irq(priv->gfargrp.interruptError);
2115 gfar_interrupt(priv->interruptTransmit, dev); 2139 gfar_interrupt(priv->gfargrp.interruptTransmit, &priv->gfargrp);
2116 enable_irq(priv->interruptError); 2140 enable_irq(priv->gfargrp.interruptError);
2117 enable_irq(priv->interruptReceive); 2141 enable_irq(priv->gfargrp.interruptReceive);
2118 enable_irq(priv->interruptTransmit); 2142 enable_irq(priv->gfargrp.interruptTransmit);
2119 } else { 2143 } else {
2120 disable_irq(priv->interruptTransmit); 2144 disable_irq(priv->gfargrp.interruptTransmit);
2121 gfar_interrupt(priv->interruptTransmit, dev); 2145 gfar_interrupt(priv->gfargrp.interruptTransmit, &priv->gfargrp);
2122 enable_irq(priv->interruptTransmit); 2146 enable_irq(priv->gfargrp.interruptTransmit);
2123 } 2147 }
2124} 2148}
2125#endif 2149#endif
2126 2150
2127/* The interrupt handler for devices with one interrupt */ 2151/* The interrupt handler for devices with one interrupt */
2128static irqreturn_t gfar_interrupt(int irq, void *dev_id) 2152static irqreturn_t gfar_interrupt(int irq, void *grp_id)
2129{ 2153{
2130 struct net_device *dev = dev_id; 2154 struct gfar_priv_grp *gfargrp = grp_id;
2131 struct gfar_private *priv = netdev_priv(dev);
2132 2155
2133 /* Save ievent for future reference */ 2156 /* Save ievent for future reference */
2134 u32 events = gfar_read(&priv->regs->ievent); 2157 u32 events = gfar_read(&gfargrp->regs->ievent);
2135 2158
2136 /* Check for reception */ 2159 /* Check for reception */
2137 if (events & IEVENT_RX_MASK) 2160 if (events & IEVENT_RX_MASK)
2138 gfar_receive(irq, dev_id); 2161 gfar_receive(irq, grp_id);
2139 2162
2140 /* Check for transmit completion */ 2163 /* Check for transmit completion */
2141 if (events & IEVENT_TX_MASK) 2164 if (events & IEVENT_TX_MASK)
2142 gfar_transmit(irq, dev_id); 2165 gfar_transmit(irq, grp_id);
2143 2166
2144 /* Check for errors */ 2167 /* Check for errors */
2145 if (events & IEVENT_ERR_MASK) 2168 if (events & IEVENT_ERR_MASK)
2146 gfar_error(irq, dev_id); 2169 gfar_error(irq, grp_id);
2147 2170
2148 return IRQ_HANDLED; 2171 return IRQ_HANDLED;
2149} 2172}
@@ -2158,7 +2181,7 @@ static void adjust_link(struct net_device *dev)
2158{ 2181{
2159 struct gfar_private *priv = netdev_priv(dev); 2182 struct gfar_private *priv = netdev_priv(dev);
2160 struct gfar_priv_tx_q *tx_queue = NULL; 2183 struct gfar_priv_tx_q *tx_queue = NULL;
2161 struct gfar __iomem *regs = priv->regs; 2184 struct gfar __iomem *regs = priv->gfargrp.regs;
2162 unsigned long flags; 2185 unsigned long flags;
2163 struct phy_device *phydev = priv->phydev; 2186 struct phy_device *phydev = priv->phydev;
2164 int new_state = 0; 2187 int new_state = 0;
@@ -2241,7 +2264,7 @@ static void gfar_set_multi(struct net_device *dev)
2241{ 2264{
2242 struct dev_mc_list *mc_ptr; 2265 struct dev_mc_list *mc_ptr;
2243 struct gfar_private *priv = netdev_priv(dev); 2266 struct gfar_private *priv = netdev_priv(dev);
2244 struct gfar __iomem *regs = priv->regs; 2267 struct gfar __iomem *regs = priv->gfargrp.regs;
2245 u32 tempval; 2268 u32 tempval;
2246 2269
2247 if (dev->flags & IFF_PROMISC) { 2270 if (dev->flags & IFF_PROMISC) {
@@ -2374,10 +2397,11 @@ static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr)
2374static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr) 2397static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr)
2375{ 2398{
2376 struct gfar_private *priv = netdev_priv(dev); 2399 struct gfar_private *priv = netdev_priv(dev);
2400 struct gfar __iomem *regs = priv->gfargrp.regs;
2377 int idx; 2401 int idx;
2378 char tmpbuf[MAC_ADDR_LEN]; 2402 char tmpbuf[MAC_ADDR_LEN];
2379 u32 tempval; 2403 u32 tempval;
2380 u32 __iomem *macptr = &priv->regs->macstnaddr1; 2404 u32 __iomem *macptr = &regs->macstnaddr1;
2381 2405
2382 macptr += num*2; 2406 macptr += num*2;
2383 2407
@@ -2394,16 +2418,18 @@ static void gfar_set_mac_for_addr(struct net_device *dev, int num, u8 *addr)
2394} 2418}
2395 2419
2396/* GFAR error interrupt handler */ 2420/* GFAR error interrupt handler */
2397static irqreturn_t gfar_error(int irq, void *dev_id) 2421static irqreturn_t gfar_error(int irq, void *grp_id)
2398{ 2422{
2399 struct net_device *dev = dev_id; 2423 struct gfar_priv_grp *gfargrp = grp_id;
2400 struct gfar_private *priv = netdev_priv(dev); 2424 struct gfar __iomem *regs = gfargrp->regs;
2425 struct gfar_private *priv= gfargrp->priv;
2426 struct net_device *dev = priv->ndev;
2401 2427
2402 /* Save ievent for future reference */ 2428 /* Save ievent for future reference */
2403 u32 events = gfar_read(&priv->regs->ievent); 2429 u32 events = gfar_read(&regs->ievent);
2404 2430
2405 /* Clear IEVENT */ 2431 /* Clear IEVENT */
2406 gfar_write(&priv->regs->ievent, events & IEVENT_ERR_MASK); 2432 gfar_write(&regs->ievent, events & IEVENT_ERR_MASK);
2407 2433
2408 /* Magic Packet is not an error. */ 2434 /* Magic Packet is not an error. */
2409 if ((priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) && 2435 if ((priv->device_flags & FSL_GIANFAR_DEV_HAS_MAGIC_PACKET) &&
@@ -2413,7 +2439,7 @@ static irqreturn_t gfar_error(int irq, void *dev_id)
2413 /* Hmm... */ 2439 /* Hmm... */
2414 if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv)) 2440 if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv))
2415 printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n", 2441 printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n",
2416 dev->name, events, gfar_read(&priv->regs->imask)); 2442 dev->name, events, gfar_read(&regs->imask));
2417 2443
2418 /* Update the error counters */ 2444 /* Update the error counters */
2419 if (events & IEVENT_TXE) { 2445 if (events & IEVENT_TXE) {
@@ -2431,7 +2457,7 @@ static irqreturn_t gfar_error(int irq, void *dev_id)
2431 priv->extra_stats.tx_underrun++; 2457 priv->extra_stats.tx_underrun++;
2432 2458
2433 /* Reactivate the Tx Queues */ 2459 /* Reactivate the Tx Queues */
2434 gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT); 2460 gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
2435 } 2461 }
2436 if (netif_msg_tx_err(priv)) 2462 if (netif_msg_tx_err(priv))
2437 printk(KERN_DEBUG "%s: Transmit Error\n", dev->name); 2463 printk(KERN_DEBUG "%s: Transmit Error\n", dev->name);
@@ -2440,11 +2466,11 @@ static irqreturn_t gfar_error(int irq, void *dev_id)
2440 dev->stats.rx_errors++; 2466 dev->stats.rx_errors++;
2441 priv->extra_stats.rx_bsy++; 2467 priv->extra_stats.rx_bsy++;
2442 2468
2443 gfar_receive(irq, dev_id); 2469 gfar_receive(irq, grp_id);
2444 2470
2445 if (netif_msg_rx_err(priv)) 2471 if (netif_msg_rx_err(priv))
2446 printk(KERN_DEBUG "%s: busy error (rstat: %x)\n", 2472 printk(KERN_DEBUG "%s: busy error (rstat: %x)\n",
2447 dev->name, gfar_read(&priv->regs->rstat)); 2473 dev->name, gfar_read(&regs->rstat));
2448 } 2474 }
2449 if (events & IEVENT_BABR) { 2475 if (events & IEVENT_BABR) {
2450 dev->stats.rx_errors++; 2476 dev->stats.rx_errors++;
diff --git a/drivers/net/gianfar.h b/drivers/net/gianfar.h
index a60f93f1ae07..79e8471584ea 100644
--- a/drivers/net/gianfar.h
+++ b/drivers/net/gianfar.h
@@ -770,6 +770,32 @@ struct gfar_priv_rx_q {
770 unsigned long rxic; 770 unsigned long rxic;
771}; 771};
772 772
773/**
774 * struct gfar_priv_grp - per group structure
775 * @priv: back pointer to the priv structure
776 * @regs: the ioremapped register space for this group
777 * @grp_id: group id for this group
778 * @interruptTransmit: The TX interrupt number for this group
779 * @interruptReceive: The RX interrupt number for this group
780 * @interruptError: The ERROR interrupt number for this group
781 * @int_name_tx: tx interrupt name for this group
782 * @int_name_rx: rx interrupt name for this group
783 * @int_name_er: er interrupt name for this group
784 */
785
786struct gfar_priv_grp {
787 spinlock_t grplock __attribute__ ((aligned (SMP_CACHE_BYTES)));
788 struct gfar_private *priv;
789 struct gfar __iomem *regs;
790 unsigned int interruptTransmit;
791 unsigned int interruptReceive;
792 unsigned int interruptError;
793
794 char int_name_tx[GFAR_INT_NAME_MAX];
795 char int_name_rx[GFAR_INT_NAME_MAX];
796 char int_name_er[GFAR_INT_NAME_MAX];
797};
798
773/* Struct stolen almost completely (and shamelessly) from the FCC enet source 799/* Struct stolen almost completely (and shamelessly) from the FCC enet source
774 * (Ok, that's not so true anymore, but there is a family resemblence) 800 * (Ok, that's not so true anymore, but there is a family resemblence)
775 * The GFAR buffer descriptors track the ring buffers. The rx_bd_base 801 * The GFAR buffer descriptors track the ring buffers. The rx_bd_base
@@ -785,6 +811,7 @@ struct gfar_private {
785 struct net_device *ndev; 811 struct net_device *ndev;
786 struct of_device *ofdev; 812 struct of_device *ofdev;
787 813
814 struct gfar_priv_grp gfargrp;
788 struct gfar_priv_tx_q *tx_queue; 815 struct gfar_priv_tx_q *tx_queue;
789 struct gfar_priv_rx_q *rx_queue; 816 struct gfar_priv_rx_q *rx_queue;
790 817
@@ -797,9 +824,6 @@ struct gfar_private {
797 824
798 struct vlan_group *vlgrp; 825 struct vlan_group *vlgrp;
799 826
800 /* Unprotected fields */
801 /* Pointer to the GFAR memory mapped Registers */
802 struct gfar __iomem *regs;
803 827
804 /* Hash registers and their width */ 828 /* Hash registers and their width */
805 u32 __iomem *hash_regs[16]; 829 u32 __iomem *hash_regs[16];
@@ -823,10 +847,6 @@ struct gfar_private {
823 wol_en:1; /* Wake-on-LAN enabled */ 847 wol_en:1; /* Wake-on-LAN enabled */
824 unsigned short padding; 848 unsigned short padding;
825 849
826 unsigned int interruptTransmit;
827 unsigned int interruptReceive;
828 unsigned int interruptError;
829
830 /* PHY stuff */ 850 /* PHY stuff */
831 struct phy_device *phydev; 851 struct phy_device *phydev;
832 struct mii_bus *mii_bus; 852 struct mii_bus *mii_bus;
@@ -838,10 +858,6 @@ struct gfar_private {
838 858
839 struct work_struct reset_task; 859 struct work_struct reset_task;
840 860
841 char int_name_tx[GFAR_INT_NAME_MAX];
842 char int_name_rx[GFAR_INT_NAME_MAX];
843 char int_name_er[GFAR_INT_NAME_MAX];
844
845 /* Network Statistics */ 861 /* Network Statistics */
846 struct gfar_extra_stats extra_stats; 862 struct gfar_extra_stats extra_stats;
847}; 863};
diff --git a/drivers/net/gianfar_ethtool.c b/drivers/net/gianfar_ethtool.c
index 6d0d1714c2f2..c681b414767a 100644
--- a/drivers/net/gianfar_ethtool.c
+++ b/drivers/net/gianfar_ethtool.c
@@ -137,10 +137,11 @@ static void gfar_fill_stats(struct net_device *dev, struct ethtool_stats *dummy,
137{ 137{
138 int i; 138 int i;
139 struct gfar_private *priv = netdev_priv(dev); 139 struct gfar_private *priv = netdev_priv(dev);
140 struct gfar __iomem *regs = priv->gfargrp.regs;
140 u64 *extra = (u64 *) & priv->extra_stats; 141 u64 *extra = (u64 *) & priv->extra_stats;
141 142
142 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) { 143 if (priv->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
143 u32 __iomem *rmon = (u32 __iomem *) & priv->regs->rmon; 144 u32 __iomem *rmon = (u32 __iomem *) &regs->rmon;
144 struct gfar_stats *stats = (struct gfar_stats *) buf; 145 struct gfar_stats *stats = (struct gfar_stats *) buf;
145 146
146 for (i = 0; i < GFAR_RMON_LEN; i++) 147 for (i = 0; i < GFAR_RMON_LEN; i++)
@@ -223,7 +224,7 @@ static void gfar_get_regs(struct net_device *dev, struct ethtool_regs *regs, voi
223{ 224{
224 int i; 225 int i;
225 struct gfar_private *priv = netdev_priv(dev); 226 struct gfar_private *priv = netdev_priv(dev);
226 u32 __iomem *theregs = (u32 __iomem *) priv->regs; 227 u32 __iomem *theregs = (u32 __iomem *) priv->gfargrp.regs;
227 u32 *buf = (u32 *) regbuf; 228 u32 *buf = (u32 *) regbuf;
228 229
229 for (i = 0; i < sizeof (struct gfar) / sizeof (u32); i++) 230 for (i = 0; i < sizeof (struct gfar) / sizeof (u32); i++)
@@ -349,6 +350,7 @@ static int gfar_gcoalesce(struct net_device *dev, struct ethtool_coalesce *cvals
349static int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals) 350static int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals)
350{ 351{
351 struct gfar_private *priv = netdev_priv(dev); 352 struct gfar_private *priv = netdev_priv(dev);
353 struct gfar __iomem *regs = priv->gfargrp.regs;
352 struct gfar_priv_tx_q *tx_queue = NULL; 354 struct gfar_priv_tx_q *tx_queue = NULL;
353 struct gfar_priv_rx_q *rx_queue = NULL; 355 struct gfar_priv_rx_q *rx_queue = NULL;
354 356
@@ -407,13 +409,13 @@ static int gfar_scoalesce(struct net_device *dev, struct ethtool_coalesce *cvals
407 tx_queue->txic = mk_ic_value(cvals->tx_max_coalesced_frames, 409 tx_queue->txic = mk_ic_value(cvals->tx_max_coalesced_frames,
408 gfar_usecs2ticks(priv, cvals->tx_coalesce_usecs)); 410 gfar_usecs2ticks(priv, cvals->tx_coalesce_usecs));
409 411
410 gfar_write(&priv->regs->rxic, 0); 412 gfar_write(&regs->rxic, 0);
411 if (rx_queue->rxcoalescing) 413 if (rx_queue->rxcoalescing)
412 gfar_write(&priv->regs->rxic, rx_queue->rxic); 414 gfar_write(&regs->rxic, rx_queue->rxic);
413 415
414 gfar_write(&priv->regs->txic, 0); 416 gfar_write(&regs->txic, 0);
415 if (tx_queue->txcoalescing) 417 if (tx_queue->txcoalescing)
416 gfar_write(&priv->regs->txic, tx_queue->txic); 418 gfar_write(&regs->txic, tx_queue->txic);
417 419
418 return 0; 420 return 0;
419} 421}
diff --git a/drivers/net/gianfar_sysfs.c b/drivers/net/gianfar_sysfs.c
index 9c664f85705c..adea11ea4038 100644
--- a/drivers/net/gianfar_sysfs.c
+++ b/drivers/net/gianfar_sysfs.c
@@ -50,6 +50,7 @@ static ssize_t gfar_set_bd_stash(struct device *dev,
50 const char *buf, size_t count) 50 const char *buf, size_t count)
51{ 51{
52 struct gfar_private *priv = netdev_priv(to_net_dev(dev)); 52 struct gfar_private *priv = netdev_priv(to_net_dev(dev));
53 struct gfar __iomem *regs = priv->gfargrp.regs;
53 struct gfar_priv_rx_q *rx_queue = NULL; 54 struct gfar_priv_rx_q *rx_queue = NULL;
54 int new_setting = 0; 55 int new_setting = 0;
55 u32 temp; 56 u32 temp;
@@ -74,14 +75,14 @@ static ssize_t gfar_set_bd_stash(struct device *dev,
74 /* Set the new stashing value */ 75 /* Set the new stashing value */
75 priv->bd_stash_en = new_setting; 76 priv->bd_stash_en = new_setting;
76 77
77 temp = gfar_read(&priv->regs->attr); 78 temp = gfar_read(&regs->attr);
78 79
79 if (new_setting) 80 if (new_setting)
80 temp |= ATTR_BDSTASH; 81 temp |= ATTR_BDSTASH;
81 else 82 else
82 temp &= ~(ATTR_BDSTASH); 83 temp &= ~(ATTR_BDSTASH);
83 84
84 gfar_write(&priv->regs->attr, temp); 85 gfar_write(&regs->attr, temp);
85 86
86 spin_unlock_irqrestore(&rx_queue->rxlock, flags); 87 spin_unlock_irqrestore(&rx_queue->rxlock, flags);
87 88
@@ -103,6 +104,7 @@ static ssize_t gfar_set_rx_stash_size(struct device *dev,
103 const char *buf, size_t count) 104 const char *buf, size_t count)
104{ 105{
105 struct gfar_private *priv = netdev_priv(to_net_dev(dev)); 106 struct gfar_private *priv = netdev_priv(to_net_dev(dev));
107 struct gfar __iomem *regs = priv->gfargrp.regs;
106 struct gfar_priv_rx_q *rx_queue = NULL; 108 struct gfar_priv_rx_q *rx_queue = NULL;
107 unsigned int length = simple_strtoul(buf, NULL, 0); 109 unsigned int length = simple_strtoul(buf, NULL, 0);
108 u32 temp; 110 u32 temp;
@@ -122,20 +124,20 @@ static ssize_t gfar_set_rx_stash_size(struct device *dev,
122 124
123 priv->rx_stash_size = length; 125 priv->rx_stash_size = length;
124 126
125 temp = gfar_read(&priv->regs->attreli); 127 temp = gfar_read(&regs->attreli);
126 temp &= ~ATTRELI_EL_MASK; 128 temp &= ~ATTRELI_EL_MASK;
127 temp |= ATTRELI_EL(length); 129 temp |= ATTRELI_EL(length);
128 gfar_write(&priv->regs->attreli, temp); 130 gfar_write(&regs->attreli, temp);
129 131
130 /* Turn stashing on/off as appropriate */ 132 /* Turn stashing on/off as appropriate */
131 temp = gfar_read(&priv->regs->attr); 133 temp = gfar_read(&regs->attr);
132 134
133 if (length) 135 if (length)
134 temp |= ATTR_BUFSTASH; 136 temp |= ATTR_BUFSTASH;
135 else 137 else
136 temp &= ~(ATTR_BUFSTASH); 138 temp &= ~(ATTR_BUFSTASH);
137 139
138 gfar_write(&priv->regs->attr, temp); 140 gfar_write(&regs->attr, temp);
139 141
140out: 142out:
141 spin_unlock_irqrestore(&rx_queue->rxlock, flags); 143 spin_unlock_irqrestore(&rx_queue->rxlock, flags);
@@ -161,6 +163,7 @@ static ssize_t gfar_set_rx_stash_index(struct device *dev,
161 const char *buf, size_t count) 163 const char *buf, size_t count)
162{ 164{
163 struct gfar_private *priv = netdev_priv(to_net_dev(dev)); 165 struct gfar_private *priv = netdev_priv(to_net_dev(dev));
166 struct gfar __iomem *regs = priv->gfargrp.regs;
164 struct gfar_priv_rx_q *rx_queue = NULL; 167 struct gfar_priv_rx_q *rx_queue = NULL;
165 unsigned short index = simple_strtoul(buf, NULL, 0); 168 unsigned short index = simple_strtoul(buf, NULL, 0);
166 u32 temp; 169 u32 temp;
@@ -180,10 +183,10 @@ static ssize_t gfar_set_rx_stash_index(struct device *dev,
180 183
181 priv->rx_stash_index = index; 184 priv->rx_stash_index = index;
182 185
183 temp = gfar_read(&priv->regs->attreli); 186 temp = gfar_read(&regs->attreli);
184 temp &= ~ATTRELI_EI_MASK; 187 temp &= ~ATTRELI_EI_MASK;
185 temp |= ATTRELI_EI(index); 188 temp |= ATTRELI_EI(index);
186 gfar_write(&priv->regs->attreli, flags); 189 gfar_write(&regs->attreli, flags);
187 190
188out: 191out:
189 spin_unlock_irqrestore(&rx_queue->rxlock, flags); 192 spin_unlock_irqrestore(&rx_queue->rxlock, flags);
@@ -208,6 +211,7 @@ static ssize_t gfar_set_fifo_threshold(struct device *dev,
208 const char *buf, size_t count) 211 const char *buf, size_t count)
209{ 212{
210 struct gfar_private *priv = netdev_priv(to_net_dev(dev)); 213 struct gfar_private *priv = netdev_priv(to_net_dev(dev));
214 struct gfar __iomem *regs = priv->gfargrp.regs;
211 struct gfar_priv_tx_q *tx_queue = NULL; 215 struct gfar_priv_tx_q *tx_queue = NULL;
212 unsigned int length = simple_strtoul(buf, NULL, 0); 216 unsigned int length = simple_strtoul(buf, NULL, 0);
213 u32 temp; 217 u32 temp;
@@ -222,10 +226,10 @@ static ssize_t gfar_set_fifo_threshold(struct device *dev,
222 226
223 priv->fifo_threshold = length; 227 priv->fifo_threshold = length;
224 228
225 temp = gfar_read(&priv->regs->fifo_tx_thr); 229 temp = gfar_read(&regs->fifo_tx_thr);
226 temp &= ~FIFO_TX_THR_MASK; 230 temp &= ~FIFO_TX_THR_MASK;
227 temp |= length; 231 temp |= length;
228 gfar_write(&priv->regs->fifo_tx_thr, temp); 232 gfar_write(&regs->fifo_tx_thr, temp);
229 233
230 spin_unlock_irqrestore(&tx_queue->txlock, flags); 234 spin_unlock_irqrestore(&tx_queue->txlock, flags);
231 235
@@ -248,6 +252,7 @@ static ssize_t gfar_set_fifo_starve(struct device *dev,
248 const char *buf, size_t count) 252 const char *buf, size_t count)
249{ 253{
250 struct gfar_private *priv = netdev_priv(to_net_dev(dev)); 254 struct gfar_private *priv = netdev_priv(to_net_dev(dev));
255 struct gfar __iomem *regs = priv->gfargrp.regs;
251 struct gfar_priv_tx_q *tx_queue = NULL; 256 struct gfar_priv_tx_q *tx_queue = NULL;
252 unsigned int num = simple_strtoul(buf, NULL, 0); 257 unsigned int num = simple_strtoul(buf, NULL, 0);
253 u32 temp; 258 u32 temp;
@@ -261,10 +266,10 @@ static ssize_t gfar_set_fifo_starve(struct device *dev,
261 266
262 priv->fifo_starve = num; 267 priv->fifo_starve = num;
263 268
264 temp = gfar_read(&priv->regs->fifo_tx_starve); 269 temp = gfar_read(&regs->fifo_tx_starve);
265 temp &= ~FIFO_TX_STARVE_MASK; 270 temp &= ~FIFO_TX_STARVE_MASK;
266 temp |= num; 271 temp |= num;
267 gfar_write(&priv->regs->fifo_tx_starve, temp); 272 gfar_write(&regs->fifo_tx_starve, temp);
268 273
269 spin_unlock_irqrestore(&tx_queue->txlock, flags); 274 spin_unlock_irqrestore(&tx_queue->txlock, flags);
270 275
@@ -288,6 +293,7 @@ static ssize_t gfar_set_fifo_starve_off(struct device *dev,
288 const char *buf, size_t count) 293 const char *buf, size_t count)
289{ 294{
290 struct gfar_private *priv = netdev_priv(to_net_dev(dev)); 295 struct gfar_private *priv = netdev_priv(to_net_dev(dev));
296 struct gfar __iomem *regs = priv->gfargrp.regs;
291 struct gfar_priv_tx_q *tx_queue = NULL; 297 struct gfar_priv_tx_q *tx_queue = NULL;
292 unsigned int num = simple_strtoul(buf, NULL, 0); 298 unsigned int num = simple_strtoul(buf, NULL, 0);
293 u32 temp; 299 u32 temp;
@@ -301,10 +307,10 @@ static ssize_t gfar_set_fifo_starve_off(struct device *dev,
301 307
302 priv->fifo_starve_off = num; 308 priv->fifo_starve_off = num;
303 309
304 temp = gfar_read(&priv->regs->fifo_tx_starve_shutoff); 310 temp = gfar_read(&regs->fifo_tx_starve_shutoff);
305 temp &= ~FIFO_TX_STARVE_OFF_MASK; 311 temp &= ~FIFO_TX_STARVE_OFF_MASK;
306 temp |= num; 312 temp |= num;
307 gfar_write(&priv->regs->fifo_tx_starve_shutoff, temp); 313 gfar_write(&regs->fifo_tx_starve_shutoff, temp);
308 314
309 spin_unlock_irqrestore(&tx_queue->txlock, flags); 315 spin_unlock_irqrestore(&tx_queue->txlock, flags);
310 316