diff options
Diffstat (limited to 'drivers')
147 files changed, 10851 insertions, 3573 deletions
diff --git a/drivers/acorn/char/Makefile b/drivers/acorn/char/Makefile deleted file mode 100644 index d006c9f168d2..000000000000 --- a/drivers/acorn/char/Makefile +++ /dev/null | |||
@@ -1,5 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for the acorn character device drivers. | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_L7200_KEYB) += defkeymap-l7200.o keyb_l7200.o | ||
diff --git a/drivers/acorn/char/defkeymap-l7200.c b/drivers/acorn/char/defkeymap-l7200.c deleted file mode 100644 index 93d80a1c36f9..000000000000 --- a/drivers/acorn/char/defkeymap-l7200.c +++ /dev/null | |||
@@ -1,386 +0,0 @@ | |||
1 | /* | ||
2 | * linux/drivers/acorn/char/defkeymap-l7200.c | ||
3 | * | ||
4 | * Default keyboard maps for LinkUp Systems L7200 board | ||
5 | * | ||
6 | * Copyright (C) 2000 Steve Hill (sjhill@cotw.com) | ||
7 | * | ||
8 | * Changelog: | ||
9 | * 08-04-2000 SJH Created file | ||
10 | */ | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <linux/keyboard.h> | ||
14 | #include <linux/kd.h> | ||
15 | |||
16 | /* Normal (maps 1:1 with no processing) */ | ||
17 | #define KTn 0xF0 | ||
18 | /* Function keys */ | ||
19 | #define KTf 0xF1 | ||
20 | /* Special (Performs special house-keeping funcs) */ | ||
21 | #define KTs 0xF2 | ||
22 | #define KIGNORE K(KTs, 0) /* Ignore */ | ||
23 | #define KENTER K(KTs, 1) /* Enter */ | ||
24 | #define KREGS K(KTs, 2) /* Regs */ | ||
25 | #define KMEM K(KTs, 3) /* Mem */ | ||
26 | #define KSTAT K(KTs, 4) /* State */ | ||
27 | #define KINTR K(KTs, 5) /* Intr */ | ||
28 | #define Ksl 6 /* Last console */ | ||
29 | #define KCAPSLK K(KTs, 7) /* Caps lock */ | ||
30 | #define KNUMLK K(KTs, 8) /* Num-lock */ | ||
31 | #define KSCRLLK K(KTs, 9) /* Scroll-lock */ | ||
32 | #define KSCRLFOR K(KTs,10) /* Scroll forward */ | ||
33 | #define KSCRLBAK K(KTs,11) /* Scroll back */ | ||
34 | #define KREBOOT K(KTs,12) /* Reboot */ | ||
35 | #define KCAPSON K(KTs,13) /* Caps on */ | ||
36 | #define KCOMPOSE K(KTs,14) /* Compose */ | ||
37 | #define KSAK K(KTs,15) /* SAK */ | ||
38 | #define CONS_DEC K(KTs,16) /* Dec console */ | ||
39 | #define CONS_INC K(KTs,17) /* Incr console */ | ||
40 | #define KFLOPPY K(KTs,18) /* Floppy */ | ||
41 | /* Key pad (0-9 = digits, 10=+, 11=-, 12=*, 13=/, 14=enter, 16=., 17=# */ | ||
42 | #define KTp 0xF3 | ||
43 | #define KPAD_0 K(KTp, 0 ) | ||
44 | #define KPAD_1 K(KTp, 1 ) | ||
45 | #define KPAD_2 K(KTp, 2 ) | ||
46 | #define KPAD_3 K(KTp, 3 ) | ||
47 | #define KPAD_4 K(KTp, 4 ) | ||
48 | #define KPAD_5 K(KTp, 5 ) | ||
49 | #define KPAD_6 K(KTp, 6 ) | ||
50 | #define KPAD_7 K(KTp, 7 ) | ||
51 | #define KPAD_8 K(KTp, 8 ) | ||
52 | #define KPAD_9 K(KTp, 9 ) | ||
53 | #define KPAD_PL K(KTp,10 ) | ||
54 | #define KPAD_MI K(KTp,11 ) | ||
55 | #define KPAD_ML K(KTp,12 ) | ||
56 | #define KPAD_DV K(KTp,13 ) | ||
57 | #define KPAD_EN K(KTp,14 ) | ||
58 | #define KPAD_DT K(KTp,16 ) | ||
59 | #define KPAD_HS K(KTp,20 ) | ||
60 | /* Console switching */ | ||
61 | #define KCn 0xF5 | ||
62 | /* Cursor */ | ||
63 | #define KTc 0xF6 | ||
64 | #define Kcd 0 /* Cursor down */ | ||
65 | #define Kcl 1 /* Cursor left */ | ||
66 | #define Kcr 2 /* Cursor right */ | ||
67 | #define Kcu 3 /* Cursor up */ | ||
68 | /* Shift/alt modifiers etc */ | ||
69 | #define KMd 0xF7 | ||
70 | #define KSHIFT K(KMd, 0 ) | ||
71 | #define KALTGR K(KMd, 1 ) | ||
72 | #define KCTRL K(KMd, 2 ) | ||
73 | #define KALT K(KMd, 3 ) | ||
74 | /* Meta */ | ||
75 | #define KMt 0xF8 | ||
76 | #define KAs 0xF9 | ||
77 | #define KPADA_0 K(KAs, 0 ) | ||
78 | #define KPADA_1 K(KAs, 1 ) | ||
79 | #define KPADA_2 K(KAs, 2 ) | ||
80 | #define KPADA_3 K(KAs, 3 ) | ||
81 | #define KPADA_4 K(KAs, 4 ) | ||
82 | #define KPADA_5 K(KAs, 5 ) | ||
83 | #define KPADA_6 K(KAs, 6 ) | ||
84 | #define KPADA_7 K(KAs, 7 ) | ||
85 | #define KPADA_8 K(KAs, 8 ) | ||
86 | #define KPADA_9 K(KAs, 9 ) | ||
87 | #define KPADB_0 K(KAs,10 ) | ||
88 | #define KPADB_1 K(KAs,11 ) | ||
89 | #define KPADB_2 K(KAs,12 ) | ||
90 | #define KPADB_3 K(KAs,13 ) | ||
91 | #define KPADB_4 K(KAs,14 ) | ||
92 | #define KPADB_5 K(KAs,15 ) | ||
93 | #define KPADB_6 K(KAs,16 ) | ||
94 | #define KPADB_7 K(KAs,17 ) | ||
95 | #define KPADB_8 K(KAs,18 ) | ||
96 | #define KPADB_9 K(KAs,19 ) | ||
97 | /* Locking keys */ | ||
98 | #define KLk 0xFA | ||
99 | /* Letters */ | ||
100 | #define KTl 0xFB | ||
101 | |||
102 | /* | ||
103 | * Here is the layout of the keys for the Fujitsu QWERTY | ||
104 | * style keyboard: | ||
105 | * | ||
106 | * static char Fujitsu_Key_Table[] = | ||
107 | * { | ||
108 | * KALT, '`' , KNUL, KCTL, KFUN, KESC, '1' , '2' , | ||
109 | * '9' , '0' , '-' , '=' , KNUL, KBSP, KNUL, KNUL, | ||
110 | * KNUL, KBSL, KSHF, KNUL, KNUL, KDEL, KNUL, 't' , | ||
111 | * 'y' , 'u' , 'i' , KRET, KSHF, KPGD, KNUL, KNUL, | ||
112 | * KNUL, KTAB, KNUL, KNUL, KNUL, 'q' , 'w' , 'e' , | ||
113 | * 'r' , 'o' , 'p' , '[' , KNUL, ']' , KNUL, KNUL, | ||
114 | * KNUL, 'z' , KNUL, KNUL, KNUL, KSHL, KNUL, KNUL, | ||
115 | * 'k' , 'l' , ';' , KSQT, KNUL, KPGU, KNUL, KNUL, | ||
116 | * KNUL, 'a' , KNUL, KNUL, KNUL, 's' , 'd' , 'f' , | ||
117 | * 'g' , 'h' , 'j' , '/' , KNUL, KHME, KNUL, KNUL, | ||
118 | * KNUL, 'x' , KNUL, KNUL, KNUL, 'c' , 'v' , 'b' , | ||
119 | * 'n' , 'm' , ',' , '.' , KNUL, ' ' , KNUL, KNUL, | ||
120 | * KNUL, KNUL, KNUL, KNUL, KNUL, '3' , '4' , '5' , | ||
121 | * '6' , '7' , '8' , KNUL, KPRG, KNUL, KEND, KNUL, | ||
122 | * }; | ||
123 | */ | ||
124 | |||
125 | u_short plain_map[NR_KEYS]= | ||
126 | { | ||
127 | 0xf703, 0xf060, 0xf200, 0xf702, 0xf200, 0xf01b, 0xf031, 0xf032, | ||
128 | 0xf039, 0xf030, 0xf02d, 0xf03d, 0xf200, 0xf07f, 0xf200, 0xf200, | ||
129 | 0xf200, 0xf05c, 0xf700, 0xf200, 0xf200, 0xf116, 0xf000, 0xfb74, | ||
130 | 0xfb79, 0xfb75, 0xfb69, 0xf201, 0xf700, 0xf600, 0xf200, 0xf200, | ||
131 | 0xf200, 0xf009, 0xf200, 0xf200, 0xf200, 0xfb71, 0xfb77, 0xfb65, | ||
132 | 0xfb72, 0xfb6f, 0xfb70, 0xf05b, 0xf200, 0xf05d, 0xf200, 0xf200, | ||
133 | 0xf200, 0xfb7a, 0xf200, 0xf200, 0xf200, 0xf207, 0xf200, 0xf200, | ||
134 | 0xfb6b, 0xfb6c, 0xf03b, 0xf027, 0xf200, 0xf603, 0xf200, 0xf200, | ||
135 | 0xf200, 0xfb61, 0xf200, 0xf200, 0xf200, 0xfb73, 0xfb64, 0xfb66, | ||
136 | 0xfb67, 0xfb68, 0xfb6a, 0xf02f, 0xf200, 0xf601, 0xf200, 0xf200, | ||
137 | 0xf200, 0xfb78, 0xf200, 0xf200, 0xf200, 0xfb63, 0xfb76, 0xfb62, | ||
138 | 0xfb6e, 0xfb6d, 0xf02c, 0xf02e, 0xf200, 0xf020, 0xf200, 0xf200, | ||
139 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf033, 0xf034, 0xf035, | ||
140 | 0xf036, 0xf037, 0xf038, 0xf200, 0xf200, 0xf200, 0xf602, 0xf200, | ||
141 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, | ||
142 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, | ||
143 | }; | ||
144 | |||
145 | u_short shift_map[NR_KEYS]= | ||
146 | { | ||
147 | 0xf703, 0xf07e, 0xf200, 0xf702, 0xf200, 0xf01b, 0xf021, 0xf040, | ||
148 | 0xf028, 0xf029, 0xf05f, 0xf02b, 0xf200, 0xf07f, 0xf200, 0xf200, | ||
149 | 0xf200, 0xf07c, 0xf700, 0xf200, 0xf200, 0xf116, 0xf000, 0xfb54, | ||
150 | 0xfb59, 0xfb55, 0xfb49, 0xf201, 0xf700, 0xf600, 0xf200, 0xf200, | ||
151 | 0xf200, 0xf009, 0xf200, 0xf200, 0xf200, 0xfb51, 0xfb57, 0xfb45, | ||
152 | 0xfb52, 0xfb4f, 0xfb50, 0xf07b, 0xf200, 0xf07d, 0xf200, 0xf200, | ||
153 | 0xf200, 0xfb5a, 0xf200, 0xf200, 0xf200, 0xf207, 0xf200, 0xf200, | ||
154 | 0xfb4b, 0xfb4c, 0xf03a, 0xf022, 0xf200, 0xf603, 0xf200, 0xf200, | ||
155 | 0xf200, 0xfb41, 0xf200, 0xf200, 0xf200, 0xfb53, 0xfb44, 0xfb46, | ||
156 | 0xfb47, 0xfb48, 0xfb4a, 0xf03f, 0xf200, 0xf601, 0xf200, 0xf200, | ||
157 | 0xf200, 0xfb58, 0xf200, 0xf200, 0xf200, 0xfb43, 0xfb56, 0xfb42, | ||
158 | 0xfb4e, 0xfb4d, 0xf03c, 0xf03e, 0xf200, 0xf020, 0xf200, 0xf200, | ||
159 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf023, 0xf024, 0xf025, | ||
160 | 0xf05e, 0xf026, 0xf02a, 0xf200, 0xf200, 0xf200, 0xf602, 0xf200, | ||
161 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, | ||
162 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, | ||
163 | }; | ||
164 | |||
165 | u_short altgr_map[NR_KEYS]= | ||
166 | { | ||
167 | KIGNORE ,K(KCn,12 ),K(KCn,13 ),K(KCn,14 ),K(KCn,15 ),K(KCn,16 ),K(KCn,17 ),K(KCn, 18), | ||
168 | K(KCn, 19),K(KCn,20 ),K(KCn,21 ),K(KCn,22 ),K(KCn,23 ),KIGNORE ,KREGS ,KINTR , | ||
169 | KIGNORE ,KIGNORE ,K(KTn,'@'),KIGNORE ,K(KTn,'$'),KIGNORE ,KIGNORE ,K(KTn,'{'), | ||
170 | K(KTn,'['),K(KTn,']'),K(KTn,'}'),K(KTn,'\\'),KIGNORE ,KIGNORE ,KIGNORE ,K(KTf,21 ), | ||
171 | K(KTf,20 ),K(KTf,24 ),KNUMLK ,KPAD_DV ,KPAD_ML ,KPAD_HS ,KIGNORE ,K(KTl,'q'), | ||
172 | K(KTl,'w'),K(KTl,'e'),K(KTl,'r'),K(KTl,'t' ),K(KTl,'y'),K(KTl,'u'),K(KTl,'i' ),K(KTl,'o'), | ||
173 | K(KTl,'p'),KIGNORE ,K(KTn,'~'),KIGNORE ,K(KTf,22 ),K(KTf,23 ),K(KTf,25 ),KPADB_7 , | ||
174 | KPADB_8 ,KPADB_9 ,KPAD_MI ,KCTRL ,K(KAs,20 ),K(KTl,'s'),K(KAs,23 ),K(KAs,25 ), | ||
175 | K(KTl,'g'),K(KTl,'h'),K(KTl,'j'),K(KTl,'k' ),K(KTl,'l'),KIGNORE ,KIGNORE ,KENTER , | ||
176 | KPADB_4 ,KPADB_5 ,KPADB_6 ,KPAD_PL ,KSHIFT ,KIGNORE ,K(KTl,'z' ),K(KTl,'x'), | ||
177 | K(KAs,22 ),K(KTl,'v'),K(KTl,21 ),K(KTl,'n' ),K(KTl,'m'),KIGNORE ,KIGNORE ,KIGNORE , | ||
178 | KSHIFT ,K(KTc,Kcu),KPADB_1 ,KPADB_2 ,KPADB_3 ,KCAPSLK ,KALT ,KIGNORE , | ||
179 | KALTGR ,KCTRL ,K(KTc,Kcl),K(KTc,Kcd ),K(KTc,Kcr),KPADB_0 ,KPAD_DT ,KPAD_EN , | ||
180 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
181 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
182 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
183 | }; | ||
184 | |||
185 | u_short ctrl_map[NR_KEYS]= | ||
186 | { | ||
187 | 0xf703, 0xf200, 0xf200, 0xf702, 0xf200, 0xf200, 0xf001, 0xf002, | ||
188 | 0xf009, 0xf000, 0xf031, 0xf200, 0xf200, 0xf07f, 0xf200, 0xf200, | ||
189 | 0xf200, 0xf01c, 0xf700, 0xf200, 0xf200, 0xf116, 0xf000, 0xf020, | ||
190 | 0xf019, 0xf015, 0xf009, 0xf201, 0xf700, 0xf600, 0xf200, 0xf200, | ||
191 | 0xf200, 0xf009, 0xf200, 0xf200, 0xf200, 0xf011, 0xf017, 0xf005, | ||
192 | 0xf012, 0xf00f, 0xf010, 0xf01b, 0xf200, 0xf01d, 0xf200, 0xf200, | ||
193 | 0xf200, 0xf01a, 0xf200, 0xf200, 0xf200, 0xf207, 0xf200, 0xf200, | ||
194 | 0xf00b, 0xf00c, 0xf200, 0xf007, 0xf200, 0xf603, 0xf200, 0xf200, | ||
195 | 0xf200, 0xf001, 0xf200, 0xf200, 0xf200, 0xf001, 0xf013, 0xf006, | ||
196 | 0xf007, 0xf008, 0xf00a, 0xf07f, 0xf200, 0xf601, 0xf200, 0xf200, | ||
197 | 0xf200, 0xf018, 0xf200, 0xf200, 0xf200, 0xf003, 0xf016, 0xf002, | ||
198 | 0xf00e, 0xf00d, 0xf200, 0xf200, 0xf200, 0xf000, 0xf200, 0xf200, | ||
199 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf01b, 0xf01c, 0xf01d, | ||
200 | 0xf036, 0xf037, 0xf038, 0xf200, 0xf200, 0xf200, 0xf602, 0xf200, | ||
201 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, | ||
202 | 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf200, 0xf602, 0xf200, | ||
203 | }; | ||
204 | |||
205 | u_short shift_ctrl_map[NR_KEYS]= | ||
206 | { | ||
207 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
208 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KFLOPPY ,KINTR , | ||
209 | KIGNORE ,KIGNORE ,K(KTn, 0 ),KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
210 | KIGNORE ,KIGNORE ,KIGNORE ,K(KTn,31 ),KIGNORE ,KIGNORE ,KIGNORE ,K(KTf,21 ), | ||
211 | K(KTf,20 ),K(KTf,24 ),KNUMLK ,KPAD_DV ,KPAD_ML ,KPAD_HS ,KIGNORE ,K(KTn,17 ), | ||
212 | K(KTn,23 ),K(KTn, 5 ),K(KTn,18 ),K(KTn,20 ),K(KTn,25 ),K(KTn,21 ),K(KTn, 9 ),K(KTn,15 ), | ||
213 | K(KTn,16 ),KIGNORE ,KIGNORE ,KIGNORE ,K(KTf,22 ),K(KTf,23 ),K(KTf,25 ),KPAD_7 , | ||
214 | KPAD_8 ,KPAD_9 ,KPAD_MI ,KCTRL ,K(KTn, 1 ),K(KTn,19 ),K(KTn, 4 ),K(KTn, 6 ), | ||
215 | K(KTn, 7 ),K(KTn, 8 ),K(KTn,10 ),K(KTn,11 ),K(KTn,12 ),KIGNORE ,K(KTn, 7 ),KENTER , | ||
216 | KPAD_4 ,KPAD_5 ,KPAD_6 ,KPAD_PL ,KSHIFT ,KIGNORE ,K(KTn,26 ),K(KTn,24 ), | ||
217 | K(KTn, 3 ),K(KTn,22 ),K(KTn, 2 ),K(KTn,14 ),K(KTn,13 ),KIGNORE ,KIGNORE ,KIGNORE , | ||
218 | KSHIFT ,K(KTc,Kcu),KPAD_1 ,KPAD_2 ,KPAD_3 ,KCAPSLK ,KALT ,K(KTn, 0 ), | ||
219 | KALTGR ,KCTRL ,K(KTc,Kcl),K(KTc,Kcd ),K(KTc,Kcr),KPAD_0 ,KPAD_DT ,KPAD_EN , | ||
220 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
221 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
222 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
223 | }; | ||
224 | |||
225 | u_short alt_map[NR_KEYS]= | ||
226 | { | ||
227 | K(KMt,27 ),K(KCn, 0 ),K(KCn, 1 ),K(KCn, 2 ),K(KCn, 3 ),K(KCn, 4 ),K(KCn, 5 ),K(KCn, 6 ), | ||
228 | K(KCn, 7 ),K(KCn, 8 ),K(KCn, 9 ),K(KCn,10 ),K(KCn,11 ),KIGNORE ,KSCRLLK ,KINTR , | ||
229 | K(KMt,'`'),K(KMt,'1'),K(KMt,'2'),K(KMt,'3' ),K(KMt,'4'),K(KMt,'5'),K(KMt,'6' ),K(KMt,'7'), | ||
230 | K(KMt,'8'),K(KMt,'9'),K(KMt,'0'),K(KMt,'-' ),K(KMt,'='),K(KMt,'£'),K(KMt,127 ),K(KTf,21 ), | ||
231 | K(KTf,20 ),K(KTf,24 ),KNUMLK ,KPAD_DV ,KPAD_ML ,KPAD_HS ,K(KMt, 9 ),K(KMt,'q'), | ||
232 | K(KMt,'w'),K(KMt,'e'),K(KMt,'r'),K(KMt,'t' ),K(KMt,'y'),K(KMt,'u'),K(KMt,'i' ),K(KMt,'o'), | ||
233 | K(KMt,'p'),K(KMt,'['),K(KMt,']'),K(KMt,'\\'),K(KTf,22 ),K(KTf,23 ),K(KTf,25 ),KPADA_7 , | ||
234 | KPADA_8 ,KPADA_9 ,KPAD_MI ,KCTRL ,K(KMt,'a'),K(KMt,'s'),K(KMt,'d' ),K(KMt,'f'), | ||
235 | K(KMt,'g'),K(KMt,'h'),K(KMt,'j'),K(KMt,'k' ),K(KMt,'l'),K(KMt,';'),K(KMt,'\''),K(KMt,13 ), | ||
236 | KPADA_4 ,KPADA_5 ,KPADA_6 ,KPAD_PL ,KSHIFT ,KIGNORE ,K(KMt,'z' ),K(KMt,'x'), | ||
237 | K(KMt,'c'),K(KMt,'v'),K(KMt,'b'),K(KMt,'n' ),K(KMt,'m'),K(KMt,','),K(KMt,'.' ),KIGNORE , | ||
238 | KSHIFT ,K(KTc,Kcu),KPADA_1 ,KPADA_2 ,KPADA_3 ,KCAPSLK ,KALT ,K(KMt,' '), | ||
239 | KALTGR ,KCTRL ,CONS_DEC ,K(KTc,Kcd ),CONS_INC ,KPADA_0 ,KPAD_DT ,KPAD_EN , | ||
240 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
241 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
242 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
243 | }; | ||
244 | |||
245 | u_short ctrl_alt_map[NR_KEYS]= | ||
246 | { | ||
247 | KIGNORE ,K(KCn, 0 ),K(KCn, 1 ),K(KCn, 2 ),K(KCn, 3 ),K(KCn, 4 ),K(KCn, 5 ),K(KCn, 6 ), | ||
248 | K(KCn, 7 ),K(KCn, 8 ),K(KCn, 9 ),K(KCn,10 ),K(KCn,11 ),KIGNORE ,KIGNORE ,KINTR , | ||
249 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
250 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,K(KTf,21 ), | ||
251 | K(KTf,20 ),K(KTf,24 ),KNUMLK ,KPAD_DV ,KPAD_ML ,KPAD_HS ,KIGNORE ,K(KMt,17 ), | ||
252 | K(KMt,23 ),K(KMt, 5 ),K(KMt,18 ),K(KMt,20 ),K(KMt,25 ),K(KMt,21 ),K(KMt, 9 ),K(KMt,15 ), | ||
253 | K(KMt,16 ),KIGNORE ,KIGNORE ,KIGNORE ,KREBOOT ,K(KTf,23 ),K(KTf,25 ),KPAD_7 , | ||
254 | KPAD_8 ,KPAD_9 ,KPAD_MI ,KCTRL ,K(KMt, 1 ),K(KMt,19 ),K(KMt, 4 ),K(KMt, 6 ), | ||
255 | K(KMt, 7 ),K(KMt, 8 ),K(KMt,10 ),K(KMt,11 ),K(KMt,12 ),KIGNORE ,KIGNORE ,KENTER , | ||
256 | KPAD_4 ,KPAD_5 ,KPAD_6 ,KPAD_PL ,KSHIFT ,KIGNORE ,K(KMt,26 ),K(KMt,24 ), | ||
257 | K(KMt, 3 ),K(KMt,22 ),K(KMt, 2 ),K(KMt,14 ),K(KMt,13 ),KIGNORE ,KIGNORE ,KIGNORE , | ||
258 | KSHIFT ,K(KTc,Kcu),KPAD_1 ,KPAD_2 ,KPAD_3 ,KCAPSLK ,KALT ,KIGNORE , | ||
259 | KALTGR ,KCTRL ,K(KTc,Kcl),K(KTc,Kcd ),K(KTc,Kcr),KPAD_0 ,KREBOOT ,KPAD_EN , | ||
260 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
261 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
262 | KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE ,KIGNORE , | ||
263 | }; | ||
264 | |||
265 | ushort *key_maps[MAX_NR_KEYMAPS] = { | ||
266 | plain_map, shift_map, altgr_map, 0, | ||
267 | ctrl_map, shift_ctrl_map, 0, 0, | ||
268 | alt_map, 0, 0, 0, | ||
269 | ctrl_alt_map, 0 | ||
270 | }; | ||
271 | |||
272 | unsigned int keymap_count = 7; | ||
273 | |||
274 | /* | ||
275 | * Philosophy: most people do not define more strings, but they who do | ||
276 | * often want quite a lot of string space. So, we statically allocate | ||
277 | * the default and allocate dynamically in chunks of 512 bytes. | ||
278 | */ | ||
279 | |||
280 | char func_buf[] = { | ||
281 | '\033', '[', '[', 'A', 0, | ||
282 | '\033', '[', '[', 'B', 0, | ||
283 | '\033', '[', '[', 'C', 0, | ||
284 | '\033', '[', '[', 'D', 0, | ||
285 | '\033', '[', '[', 'E', 0, | ||
286 | '\033', '[', '1', '7', '~', 0, | ||
287 | '\033', '[', '1', '8', '~', 0, | ||
288 | '\033', '[', '1', '9', '~', 0, | ||
289 | '\033', '[', '2', '0', '~', 0, | ||
290 | '\033', '[', '2', '1', '~', 0, | ||
291 | '\033', '[', '2', '3', '~', 0, | ||
292 | '\033', '[', '2', '4', '~', 0, | ||
293 | '\033', '[', '2', '5', '~', 0, | ||
294 | '\033', '[', '2', '6', '~', 0, | ||
295 | '\033', '[', '2', '8', '~', 0, | ||
296 | '\033', '[', '2', '9', '~', 0, | ||
297 | '\033', '[', '3', '1', '~', 0, | ||
298 | '\033', '[', '3', '2', '~', 0, | ||
299 | '\033', '[', '3', '3', '~', 0, | ||
300 | '\033', '[', '3', '4', '~', 0, | ||
301 | '\033', '[', '1', '~', 0, | ||
302 | '\033', '[', '2', '~', 0, | ||
303 | '\033', '[', '3', '~', 0, | ||
304 | '\033', '[', '4', '~', 0, | ||
305 | '\033', '[', '5', '~', 0, | ||
306 | '\033', '[', '6', '~', 0, | ||
307 | '\033', '[', 'M', 0, | ||
308 | '\033', '[', 'P', 0, | ||
309 | }; | ||
310 | |||
311 | char *funcbufptr = func_buf; | ||
312 | int funcbufsize = sizeof(func_buf); | ||
313 | int funcbufleft = 0; /* space left */ | ||
314 | |||
315 | char *func_table[MAX_NR_FUNC] = { | ||
316 | func_buf + 0, | ||
317 | func_buf + 5, | ||
318 | func_buf + 10, | ||
319 | func_buf + 15, | ||
320 | func_buf + 20, | ||
321 | func_buf + 25, | ||
322 | func_buf + 31, | ||
323 | func_buf + 37, | ||
324 | func_buf + 43, | ||
325 | func_buf + 49, | ||
326 | func_buf + 55, | ||
327 | func_buf + 61, | ||
328 | func_buf + 67, | ||
329 | func_buf + 73, | ||
330 | func_buf + 79, | ||
331 | func_buf + 85, | ||
332 | func_buf + 91, | ||
333 | func_buf + 97, | ||
334 | func_buf + 103, | ||
335 | func_buf + 109, | ||
336 | func_buf + 115, | ||
337 | func_buf + 120, | ||
338 | func_buf + 125, | ||
339 | func_buf + 130, | ||
340 | func_buf + 135, | ||
341 | func_buf + 140, | ||
342 | func_buf + 145, | ||
343 | 0, | ||
344 | 0, | ||
345 | func_buf + 149, | ||
346 | 0, | ||
347 | }; | ||
348 | |||
349 | struct kbdiacruc accent_table[MAX_DIACR] = { | ||
350 | {'`', 'A', 0300}, {'`', 'a', 0340}, | ||
351 | {'\'', 'A', 0301}, {'\'', 'a', 0341}, | ||
352 | {'^', 'A', 0302}, {'^', 'a', 0342}, | ||
353 | {'~', 'A', 0303}, {'~', 'a', 0343}, | ||
354 | {'"', 'A', 0304}, {'"', 'a', 0344}, | ||
355 | {'O', 'A', 0305}, {'o', 'a', 0345}, | ||
356 | {'0', 'A', 0305}, {'0', 'a', 0345}, | ||
357 | {'A', 'A', 0305}, {'a', 'a', 0345}, | ||
358 | {'A', 'E', 0306}, {'a', 'e', 0346}, | ||
359 | {',', 'C', 0307}, {',', 'c', 0347}, | ||
360 | {'`', 'E', 0310}, {'`', 'e', 0350}, | ||
361 | {'\'', 'E', 0311}, {'\'', 'e', 0351}, | ||
362 | {'^', 'E', 0312}, {'^', 'e', 0352}, | ||
363 | {'"', 'E', 0313}, {'"', 'e', 0353}, | ||
364 | {'`', 'I', 0314}, {'`', 'i', 0354}, | ||
365 | {'\'', 'I', 0315}, {'\'', 'i', 0355}, | ||
366 | {'^', 'I', 0316}, {'^', 'i', 0356}, | ||
367 | {'"', 'I', 0317}, {'"', 'i', 0357}, | ||
368 | {'-', 'D', 0320}, {'-', 'd', 0360}, | ||
369 | {'~', 'N', 0321}, {'~', 'n', 0361}, | ||
370 | {'`', 'O', 0322}, {'`', 'o', 0362}, | ||
371 | {'\'', 'O', 0323}, {'\'', 'o', 0363}, | ||
372 | {'^', 'O', 0324}, {'^', 'o', 0364}, | ||
373 | {'~', 'O', 0325}, {'~', 'o', 0365}, | ||
374 | {'"', 'O', 0326}, {'"', 'o', 0366}, | ||
375 | {'/', 'O', 0330}, {'/', 'o', 0370}, | ||
376 | {'`', 'U', 0331}, {'`', 'u', 0371}, | ||
377 | {'\'', 'U', 0332}, {'\'', 'u', 0372}, | ||
378 | {'^', 'U', 0333}, {'^', 'u', 0373}, | ||
379 | {'"', 'U', 0334}, {'"', 'u', 0374}, | ||
380 | {'\'', 'Y', 0335}, {'\'', 'y', 0375}, | ||
381 | {'T', 'H', 0336}, {'t', 'h', 0376}, | ||
382 | {'s', 's', 0337}, {'"', 'y', 0377}, | ||
383 | {'s', 'z', 0337}, {'i', 'j', 0377}, | ||
384 | }; | ||
385 | |||
386 | unsigned int accent_table_size = 68; | ||
diff --git a/drivers/acpi/bay.c b/drivers/acpi/bay.c index 26038c2a2a71..61b6c5beb2d3 100644 --- a/drivers/acpi/bay.c +++ b/drivers/acpi/bay.c | |||
@@ -377,6 +377,9 @@ static int __init bay_init(void) | |||
377 | 377 | ||
378 | INIT_LIST_HEAD(&drive_bays); | 378 | INIT_LIST_HEAD(&drive_bays); |
379 | 379 | ||
380 | if (acpi_disabled) | ||
381 | return -ENODEV; | ||
382 | |||
380 | /* look for dockable drive bays */ | 383 | /* look for dockable drive bays */ |
381 | acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, | 384 | acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, |
382 | ACPI_UINT32_MAX, find_bay, &bays, NULL); | 385 | ACPI_UINT32_MAX, find_bay, &bays, NULL); |
diff --git a/drivers/acpi/dock.c b/drivers/acpi/dock.c index 96c542f7fded..bb7c51f712bd 100644 --- a/drivers/acpi/dock.c +++ b/drivers/acpi/dock.c | |||
@@ -917,6 +917,9 @@ static int __init dock_init(void) | |||
917 | 917 | ||
918 | dock_station = NULL; | 918 | dock_station = NULL; |
919 | 919 | ||
920 | if (acpi_disabled) | ||
921 | return 0; | ||
922 | |||
920 | /* look for a dock station */ | 923 | /* look for a dock station */ |
921 | acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, | 924 | acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, |
922 | ACPI_UINT32_MAX, find_dock, &num, NULL); | 925 | ACPI_UINT32_MAX, find_dock, &num, NULL); |
diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c index 2808dc60fd67..9b227d4dc9c9 100644 --- a/drivers/acpi/glue.c +++ b/drivers/acpi/glue.c | |||
@@ -333,6 +333,9 @@ static int __init acpi_rtc_init(void) | |||
333 | { | 333 | { |
334 | struct device *dev = get_rtc_dev(); | 334 | struct device *dev = get_rtc_dev(); |
335 | 335 | ||
336 | if (acpi_disabled) | ||
337 | return 0; | ||
338 | |||
336 | if (dev) { | 339 | if (dev) { |
337 | rtc_wake_setup(); | 340 | rtc_wake_setup(); |
338 | rtc_info.wake_on = rtc_wake_on; | 341 | rtc_info.wake_on = rtc_wake_on; |
diff --git a/drivers/char/drm/i915_irq.c b/drivers/char/drm/i915_irq.c index f7f16e7a8bf3..df036118b8b1 100644 --- a/drivers/char/drm/i915_irq.c +++ b/drivers/char/drm/i915_irq.c | |||
@@ -62,11 +62,11 @@ static void i915_vblank_tasklet(struct drm_device *dev) | |||
62 | u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24); | 62 | u32 ropcpp = (0xcc << 16) | ((cpp - 1) << 24); |
63 | RING_LOCALS; | 63 | RING_LOCALS; |
64 | 64 | ||
65 | if (sarea_priv->front_tiled) { | 65 | if (IS_I965G(dev) && sarea_priv->front_tiled) { |
66 | cmd |= XY_SRC_COPY_BLT_DST_TILED; | 66 | cmd |= XY_SRC_COPY_BLT_DST_TILED; |
67 | dst_pitch >>= 2; | 67 | dst_pitch >>= 2; |
68 | } | 68 | } |
69 | if (sarea_priv->back_tiled) { | 69 | if (IS_I965G(dev) && sarea_priv->back_tiled) { |
70 | cmd |= XY_SRC_COPY_BLT_SRC_TILED; | 70 | cmd |= XY_SRC_COPY_BLT_SRC_TILED; |
71 | src_pitch >>= 2; | 71 | src_pitch >>= 2; |
72 | } | 72 | } |
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c index e94bee032314..750131010af0 100644 --- a/drivers/char/tty_io.c +++ b/drivers/char/tty_io.c | |||
@@ -3322,7 +3322,7 @@ static int send_break(struct tty_struct *tty, unsigned int duration) | |||
3322 | msleep_interruptible(duration); | 3322 | msleep_interruptible(duration); |
3323 | tty->ops->break_ctl(tty, 0); | 3323 | tty->ops->break_ctl(tty, 0); |
3324 | tty_write_unlock(tty); | 3324 | tty_write_unlock(tty); |
3325 | if (!signal_pending(current)) | 3325 | if (signal_pending(current)) |
3326 | return -EINTR; | 3326 | return -EINTR; |
3327 | return 0; | 3327 | return 0; |
3328 | } | 3328 | } |
diff --git a/drivers/connector/connector.c b/drivers/connector/connector.c index 85e2ba7fcfba..bf4830082a13 100644 --- a/drivers/connector/connector.c +++ b/drivers/connector/connector.c | |||
@@ -27,6 +27,8 @@ | |||
27 | #include <linux/moduleparam.h> | 27 | #include <linux/moduleparam.h> |
28 | #include <linux/connector.h> | 28 | #include <linux/connector.h> |
29 | #include <linux/mutex.h> | 29 | #include <linux/mutex.h> |
30 | #include <linux/proc_fs.h> | ||
31 | #include <linux/spinlock.h> | ||
30 | 32 | ||
31 | #include <net/sock.h> | 33 | #include <net/sock.h> |
32 | 34 | ||
@@ -403,6 +405,40 @@ static void cn_callback(void *data) | |||
403 | mutex_unlock(¬ify_lock); | 405 | mutex_unlock(¬ify_lock); |
404 | } | 406 | } |
405 | 407 | ||
408 | static int cn_proc_show(struct seq_file *m, void *v) | ||
409 | { | ||
410 | struct cn_queue_dev *dev = cdev.cbdev; | ||
411 | struct cn_callback_entry *cbq; | ||
412 | |||
413 | seq_printf(m, "Name ID\n"); | ||
414 | |||
415 | spin_lock_bh(&dev->queue_lock); | ||
416 | |||
417 | list_for_each_entry(cbq, &dev->queue_list, callback_entry) { | ||
418 | seq_printf(m, "%-15s %u:%u\n", | ||
419 | cbq->id.name, | ||
420 | cbq->id.id.idx, | ||
421 | cbq->id.id.val); | ||
422 | } | ||
423 | |||
424 | spin_unlock_bh(&dev->queue_lock); | ||
425 | |||
426 | return 0; | ||
427 | } | ||
428 | |||
429 | static int cn_proc_open(struct inode *inode, struct file *file) | ||
430 | { | ||
431 | return single_open(file, cn_proc_show, NULL); | ||
432 | } | ||
433 | |||
434 | static const struct file_operations cn_file_ops = { | ||
435 | .owner = THIS_MODULE, | ||
436 | .open = cn_proc_open, | ||
437 | .read = seq_read, | ||
438 | .llseek = seq_lseek, | ||
439 | .release = single_release | ||
440 | }; | ||
441 | |||
406 | static int __devinit cn_init(void) | 442 | static int __devinit cn_init(void) |
407 | { | 443 | { |
408 | struct cn_dev *dev = &cdev; | 444 | struct cn_dev *dev = &cdev; |
@@ -434,6 +470,8 @@ static int __devinit cn_init(void) | |||
434 | return -EINVAL; | 470 | return -EINVAL; |
435 | } | 471 | } |
436 | 472 | ||
473 | proc_net_fops_create(&init_net, "connector", S_IRUGO, &cn_file_ops); | ||
474 | |||
437 | return 0; | 475 | return 0; |
438 | } | 476 | } |
439 | 477 | ||
@@ -443,6 +481,8 @@ static void __devexit cn_fini(void) | |||
443 | 481 | ||
444 | cn_already_initialized = 0; | 482 | cn_already_initialized = 0; |
445 | 483 | ||
484 | proc_net_remove(&init_net, "connector"); | ||
485 | |||
446 | cn_del_callback(&dev->id); | 486 | cn_del_callback(&dev->id); |
447 | cn_queue_free_dev(dev->cbdev); | 487 | cn_queue_free_dev(dev->cbdev); |
448 | netlink_kernel_release(dev->nls); | 488 | netlink_kernel_release(dev->nls); |
diff --git a/drivers/firewire/fw-sbp2.c b/drivers/firewire/fw-sbp2.c index b2458bb8e9ca..227d2e036cd8 100644 --- a/drivers/firewire/fw-sbp2.c +++ b/drivers/firewire/fw-sbp2.c | |||
@@ -1051,7 +1051,8 @@ static int sbp2_scan_unit_dir(struct sbp2_target *tgt, u32 *directory, | |||
1051 | break; | 1051 | break; |
1052 | 1052 | ||
1053 | case SBP2_CSR_LOGICAL_UNIT_DIRECTORY: | 1053 | case SBP2_CSR_LOGICAL_UNIT_DIRECTORY: |
1054 | if (sbp2_scan_logical_unit_dir(tgt, ci.p + value) < 0) | 1054 | /* Adjust for the increment in the iterator */ |
1055 | if (sbp2_scan_logical_unit_dir(tgt, ci.p - 1 + value) < 0) | ||
1055 | return -ENOMEM; | 1056 | return -ENOMEM; |
1056 | break; | 1057 | break; |
1057 | } | 1058 | } |
diff --git a/drivers/i2c/busses/i2c-s3c2410.c b/drivers/i2c/busses/i2c-s3c2410.c index 1305ef190fc1..9e8c875437be 100644 --- a/drivers/i2c/busses/i2c-s3c2410.c +++ b/drivers/i2c/busses/i2c-s3c2410.c | |||
@@ -290,12 +290,12 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) | |||
290 | * bus, or started a new i2c message | 290 | * bus, or started a new i2c message |
291 | */ | 291 | */ |
292 | 292 | ||
293 | if (iicstat & S3C2410_IICSTAT_LASTBIT && | 293 | if (iicstat & S3C2410_IICSTAT_LASTBIT && |
294 | !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { | 294 | !(i2c->msg->flags & I2C_M_IGNORE_NAK)) { |
295 | /* ack was not received... */ | 295 | /* ack was not received... */ |
296 | 296 | ||
297 | dev_dbg(i2c->dev, "ack was not received\n"); | 297 | dev_dbg(i2c->dev, "ack was not received\n"); |
298 | s3c24xx_i2c_stop(i2c, -EREMOTEIO); | 298 | s3c24xx_i2c_stop(i2c, -ENXIO); |
299 | goto out_ack; | 299 | goto out_ack; |
300 | } | 300 | } |
301 | 301 | ||
@@ -305,7 +305,7 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) | |||
305 | i2c->state = STATE_WRITE; | 305 | i2c->state = STATE_WRITE; |
306 | 306 | ||
307 | /* terminate the transfer if there is nothing to do | 307 | /* terminate the transfer if there is nothing to do |
308 | * (used by the i2c probe to find devices */ | 308 | * as this is used by the i2c probe to find devices. */ |
309 | 309 | ||
310 | if (is_lastmsg(i2c) && i2c->msg->len == 0) { | 310 | if (is_lastmsg(i2c) && i2c->msg->len == 0) { |
311 | s3c24xx_i2c_stop(i2c, 0); | 311 | s3c24xx_i2c_stop(i2c, 0); |
@@ -323,7 +323,17 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) | |||
323 | * end of the message, and if so, work out what to do | 323 | * end of the message, and if so, work out what to do |
324 | */ | 324 | */ |
325 | 325 | ||
326 | if (!(i2c->msg->flags & I2C_M_IGNORE_NAK)) { | ||
327 | if (iicstat & S3C2410_IICSTAT_LASTBIT) { | ||
328 | dev_dbg(i2c->dev, "WRITE: No Ack\n"); | ||
329 | |||
330 | s3c24xx_i2c_stop(i2c, -ECONNREFUSED); | ||
331 | goto out_ack; | ||
332 | } | ||
333 | } | ||
334 | |||
326 | retry_write: | 335 | retry_write: |
336 | |||
327 | if (!is_msgend(i2c)) { | 337 | if (!is_msgend(i2c)) { |
328 | byte = i2c->msg->buf[i2c->msg_ptr++]; | 338 | byte = i2c->msg->buf[i2c->msg_ptr++]; |
329 | writeb(byte, i2c->regs + S3C2410_IICDS); | 339 | writeb(byte, i2c->regs + S3C2410_IICDS); |
@@ -377,17 +387,6 @@ static int i2s_s3c_irq_nextbyte(struct s3c24xx_i2c *i2c, unsigned long iicstat) | |||
377 | * going to do any more read/write | 387 | * going to do any more read/write |
378 | */ | 388 | */ |
379 | 389 | ||
380 | if (!(i2c->msg->flags & I2C_M_IGNORE_NAK) && | ||
381 | !(is_msglast(i2c) && is_lastmsg(i2c))) { | ||
382 | |||
383 | if (iicstat & S3C2410_IICSTAT_LASTBIT) { | ||
384 | dev_dbg(i2c->dev, "READ: No Ack\n"); | ||
385 | |||
386 | s3c24xx_i2c_stop(i2c, -ECONNREFUSED); | ||
387 | goto out_ack; | ||
388 | } | ||
389 | } | ||
390 | |||
391 | byte = readb(i2c->regs + S3C2410_IICDS); | 390 | byte = readb(i2c->regs + S3C2410_IICDS); |
392 | i2c->msg->buf[i2c->msg_ptr++] = byte; | 391 | i2c->msg->buf[i2c->msg_ptr++] = byte; |
393 | 392 | ||
@@ -949,3 +948,4 @@ MODULE_DESCRIPTION("S3C24XX I2C Bus driver"); | |||
949 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); | 948 | MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>"); |
950 | MODULE_LICENSE("GPL"); | 949 | MODULE_LICENSE("GPL"); |
951 | MODULE_ALIAS("platform:s3c2410-i2c"); | 950 | MODULE_ALIAS("platform:s3c2410-i2c"); |
951 | MODULE_ALIAS("platform:s3c2440-i2c"); | ||
diff --git a/drivers/i2c/chips/isp1301_omap.c b/drivers/i2c/chips/isp1301_omap.c index b1b45dddb17e..03a33f1b9cd3 100644 --- a/drivers/i2c/chips/isp1301_omap.c +++ b/drivers/i2c/chips/isp1301_omap.c | |||
@@ -72,7 +72,7 @@ struct isp1301 { | |||
72 | }; | 72 | }; |
73 | 73 | ||
74 | 74 | ||
75 | /* bits in OTG_CTRL_REG */ | 75 | /* bits in OTG_CTRL */ |
76 | 76 | ||
77 | #define OTG_XCEIV_OUTPUTS \ | 77 | #define OTG_XCEIV_OUTPUTS \ |
78 | (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID) | 78 | (OTG_ASESSVLD|OTG_BSESSEND|OTG_BSESSVLD|OTG_VBUSVLD|OTG_ID) |
@@ -186,8 +186,8 @@ isp1301_clear_bits(struct isp1301 *isp, u8 reg, u8 bits) | |||
186 | 186 | ||
187 | /* operational registers */ | 187 | /* operational registers */ |
188 | #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */ | 188 | #define ISP1301_MODE_CONTROL_1 0x04 /* u8 read, set, +1 clear */ |
189 | # define MC1_SPEED_REG (1 << 0) | 189 | # define MC1_SPEED (1 << 0) |
190 | # define MC1_SUSPEND_REG (1 << 1) | 190 | # define MC1_SUSPEND (1 << 1) |
191 | # define MC1_DAT_SE0 (1 << 2) | 191 | # define MC1_DAT_SE0 (1 << 2) |
192 | # define MC1_TRANSPARENT (1 << 3) | 192 | # define MC1_TRANSPARENT (1 << 3) |
193 | # define MC1_BDIS_ACON_EN (1 << 4) | 193 | # define MC1_BDIS_ACON_EN (1 << 4) |
@@ -274,7 +274,7 @@ static void power_down(struct isp1301 *isp) | |||
274 | isp->otg.state = OTG_STATE_UNDEFINED; | 274 | isp->otg.state = OTG_STATE_UNDEFINED; |
275 | 275 | ||
276 | // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); | 276 | // isp1301_set_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); |
277 | isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND_REG); | 277 | isp1301_set_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); |
278 | 278 | ||
279 | isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_ID_PULLDOWN); | 279 | isp1301_clear_bits(isp, ISP1301_OTG_CONTROL_1, OTG1_ID_PULLDOWN); |
280 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); | 280 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_DAT_SE0); |
@@ -283,7 +283,7 @@ static void power_down(struct isp1301 *isp) | |||
283 | static void power_up(struct isp1301 *isp) | 283 | static void power_up(struct isp1301 *isp) |
284 | { | 284 | { |
285 | // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); | 285 | // isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_2, MC2_GLOBAL_PWR_DN); |
286 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND_REG); | 286 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, MC1_SUSPEND); |
287 | 287 | ||
288 | /* do this only when cpu is driving transceiver, | 288 | /* do this only when cpu is driving transceiver, |
289 | * so host won't see a low speed device... | 289 | * so host won't see a low speed device... |
@@ -360,6 +360,8 @@ isp1301_defer_work(struct isp1301 *isp, int work) | |||
360 | /* called from irq handlers */ | 360 | /* called from irq handlers */ |
361 | static void a_idle(struct isp1301 *isp, const char *tag) | 361 | static void a_idle(struct isp1301 *isp, const char *tag) |
362 | { | 362 | { |
363 | u32 l; | ||
364 | |||
363 | if (isp->otg.state == OTG_STATE_A_IDLE) | 365 | if (isp->otg.state == OTG_STATE_A_IDLE) |
364 | return; | 366 | return; |
365 | 367 | ||
@@ -373,13 +375,17 @@ static void a_idle(struct isp1301 *isp, const char *tag) | |||
373 | gadget_suspend(isp); | 375 | gadget_suspend(isp); |
374 | } | 376 | } |
375 | isp->otg.state = OTG_STATE_A_IDLE; | 377 | isp->otg.state = OTG_STATE_A_IDLE; |
376 | isp->last_otg_ctrl = OTG_CTRL_REG = OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; | 378 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; |
379 | omap_writel(l, OTG_CTRL); | ||
380 | isp->last_otg_ctrl = l; | ||
377 | pr_debug(" --> %s/%s\n", state_name(isp), tag); | 381 | pr_debug(" --> %s/%s\n", state_name(isp), tag); |
378 | } | 382 | } |
379 | 383 | ||
380 | /* called from irq handlers */ | 384 | /* called from irq handlers */ |
381 | static void b_idle(struct isp1301 *isp, const char *tag) | 385 | static void b_idle(struct isp1301 *isp, const char *tag) |
382 | { | 386 | { |
387 | u32 l; | ||
388 | |||
383 | if (isp->otg.state == OTG_STATE_B_IDLE) | 389 | if (isp->otg.state == OTG_STATE_B_IDLE) |
384 | return; | 390 | return; |
385 | 391 | ||
@@ -393,7 +399,9 @@ static void b_idle(struct isp1301 *isp, const char *tag) | |||
393 | gadget_suspend(isp); | 399 | gadget_suspend(isp); |
394 | } | 400 | } |
395 | isp->otg.state = OTG_STATE_B_IDLE; | 401 | isp->otg.state = OTG_STATE_B_IDLE; |
396 | isp->last_otg_ctrl = OTG_CTRL_REG = OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; | 402 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; |
403 | omap_writel(l, OTG_CTRL); | ||
404 | isp->last_otg_ctrl = l; | ||
397 | pr_debug(" --> %s/%s\n", state_name(isp), tag); | 405 | pr_debug(" --> %s/%s\n", state_name(isp), tag); |
398 | } | 406 | } |
399 | 407 | ||
@@ -406,7 +414,7 @@ dump_regs(struct isp1301 *isp, const char *label) | |||
406 | u8 src = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE); | 414 | u8 src = isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE); |
407 | 415 | ||
408 | pr_debug("otg: %06x, %s %s, otg/%02x stat/%02x.%02x\n", | 416 | pr_debug("otg: %06x, %s %s, otg/%02x stat/%02x.%02x\n", |
409 | OTG_CTRL_REG, label, state_name(isp), | 417 | omap_readl(OTG_CTRL), label, state_name(isp), |
410 | ctrl, status, src); | 418 | ctrl, status, src); |
411 | /* mode control and irq enables don't change much */ | 419 | /* mode control and irq enables don't change much */ |
412 | #endif | 420 | #endif |
@@ -429,7 +437,7 @@ dump_regs(struct isp1301 *isp, const char *label) | |||
429 | static void check_state(struct isp1301 *isp, const char *tag) | 437 | static void check_state(struct isp1301 *isp, const char *tag) |
430 | { | 438 | { |
431 | enum usb_otg_state state = OTG_STATE_UNDEFINED; | 439 | enum usb_otg_state state = OTG_STATE_UNDEFINED; |
432 | u8 fsm = OTG_TEST_REG & 0x0ff; | 440 | u8 fsm = omap_readw(OTG_TEST) & 0x0ff; |
433 | unsigned extra = 0; | 441 | unsigned extra = 0; |
434 | 442 | ||
435 | switch (fsm) { | 443 | switch (fsm) { |
@@ -494,7 +502,8 @@ static void check_state(struct isp1301 *isp, const char *tag) | |||
494 | if (isp->otg.state == state && !extra) | 502 | if (isp->otg.state == state && !extra) |
495 | return; | 503 | return; |
496 | pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag, | 504 | pr_debug("otg: %s FSM %s/%02x, %s, %06x\n", tag, |
497 | state_string(state), fsm, state_name(isp), OTG_CTRL_REG); | 505 | state_string(state), fsm, state_name(isp), |
506 | omap_readl(OTG_CTRL)); | ||
498 | } | 507 | } |
499 | 508 | ||
500 | #else | 509 | #else |
@@ -508,10 +517,11 @@ static void update_otg1(struct isp1301 *isp, u8 int_src) | |||
508 | { | 517 | { |
509 | u32 otg_ctrl; | 518 | u32 otg_ctrl; |
510 | 519 | ||
511 | otg_ctrl = OTG_CTRL_REG | 520 | otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
512 | & OTG_CTRL_MASK | 521 | otg_ctrl &= ~OTG_XCEIV_INPUTS; |
513 | & ~OTG_XCEIV_INPUTS | 522 | otg_ctrl &= ~(OTG_ID|OTG_ASESSVLD|OTG_VBUSVLD); |
514 | & ~(OTG_ID|OTG_ASESSVLD|OTG_VBUSVLD); | 523 | |
524 | |||
515 | if (int_src & INTR_SESS_VLD) | 525 | if (int_src & INTR_SESS_VLD) |
516 | otg_ctrl |= OTG_ASESSVLD; | 526 | otg_ctrl |= OTG_ASESSVLD; |
517 | else if (isp->otg.state == OTG_STATE_A_WAIT_VFALL) { | 527 | else if (isp->otg.state == OTG_STATE_A_WAIT_VFALL) { |
@@ -534,7 +544,7 @@ static void update_otg1(struct isp1301 *isp, u8 int_src) | |||
534 | return; | 544 | return; |
535 | } | 545 | } |
536 | } | 546 | } |
537 | OTG_CTRL_REG = otg_ctrl; | 547 | omap_writel(otg_ctrl, OTG_CTRL); |
538 | } | 548 | } |
539 | 549 | ||
540 | /* outputs from ISP1301_OTG_STATUS */ | 550 | /* outputs from ISP1301_OTG_STATUS */ |
@@ -542,15 +552,14 @@ static void update_otg2(struct isp1301 *isp, u8 otg_status) | |||
542 | { | 552 | { |
543 | u32 otg_ctrl; | 553 | u32 otg_ctrl; |
544 | 554 | ||
545 | otg_ctrl = OTG_CTRL_REG | 555 | otg_ctrl = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
546 | & OTG_CTRL_MASK | 556 | otg_ctrl &= ~OTG_XCEIV_INPUTS; |
547 | & ~OTG_XCEIV_INPUTS | 557 | otg_ctrl &= ~(OTG_BSESSVLD | OTG_BSESSEND); |
548 | & ~(OTG_BSESSVLD|OTG_BSESSEND); | ||
549 | if (otg_status & OTG_B_SESS_VLD) | 558 | if (otg_status & OTG_B_SESS_VLD) |
550 | otg_ctrl |= OTG_BSESSVLD; | 559 | otg_ctrl |= OTG_BSESSVLD; |
551 | else if (otg_status & OTG_B_SESS_END) | 560 | else if (otg_status & OTG_B_SESS_END) |
552 | otg_ctrl |= OTG_BSESSEND; | 561 | otg_ctrl |= OTG_BSESSEND; |
553 | OTG_CTRL_REG = otg_ctrl; | 562 | omap_writel(otg_ctrl, OTG_CTRL); |
554 | } | 563 | } |
555 | 564 | ||
556 | /* inputs going to ISP1301 */ | 565 | /* inputs going to ISP1301 */ |
@@ -559,7 +568,7 @@ static void otg_update_isp(struct isp1301 *isp) | |||
559 | u32 otg_ctrl, otg_change; | 568 | u32 otg_ctrl, otg_change; |
560 | u8 set = OTG1_DM_PULLDOWN, clr = OTG1_DM_PULLUP; | 569 | u8 set = OTG1_DM_PULLDOWN, clr = OTG1_DM_PULLUP; |
561 | 570 | ||
562 | otg_ctrl = OTG_CTRL_REG; | 571 | otg_ctrl = omap_readl(OTG_CTRL); |
563 | otg_change = otg_ctrl ^ isp->last_otg_ctrl; | 572 | otg_change = otg_ctrl ^ isp->last_otg_ctrl; |
564 | isp->last_otg_ctrl = otg_ctrl; | 573 | isp->last_otg_ctrl = otg_ctrl; |
565 | otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS; | 574 | otg_ctrl = otg_ctrl & OTG_XCEIV_INPUTS; |
@@ -639,6 +648,8 @@ pulldown: | |||
639 | 648 | ||
640 | /* HNP switch to host or peripheral; and SRP */ | 649 | /* HNP switch to host or peripheral; and SRP */ |
641 | if (otg_change & OTG_PULLUP) { | 650 | if (otg_change & OTG_PULLUP) { |
651 | u32 l; | ||
652 | |||
642 | switch (isp->otg.state) { | 653 | switch (isp->otg.state) { |
643 | case OTG_STATE_B_IDLE: | 654 | case OTG_STATE_B_IDLE: |
644 | if (clr & OTG1_DP_PULLUP) | 655 | if (clr & OTG1_DP_PULLUP) |
@@ -655,7 +666,9 @@ pulldown: | |||
655 | default: | 666 | default: |
656 | break; | 667 | break; |
657 | } | 668 | } |
658 | OTG_CTRL_REG |= OTG_PULLUP; | 669 | l = omap_readl(OTG_CTRL); |
670 | l |= OTG_PULLUP; | ||
671 | omap_writel(l, OTG_CTRL); | ||
659 | } | 672 | } |
660 | 673 | ||
661 | check_state(isp, __func__); | 674 | check_state(isp, __func__); |
@@ -664,20 +677,20 @@ pulldown: | |||
664 | 677 | ||
665 | static irqreturn_t omap_otg_irq(int irq, void *_isp) | 678 | static irqreturn_t omap_otg_irq(int irq, void *_isp) |
666 | { | 679 | { |
667 | u16 otg_irq = OTG_IRQ_SRC_REG; | 680 | u16 otg_irq = omap_readw(OTG_IRQ_SRC); |
668 | u32 otg_ctrl; | 681 | u32 otg_ctrl; |
669 | int ret = IRQ_NONE; | 682 | int ret = IRQ_NONE; |
670 | struct isp1301 *isp = _isp; | 683 | struct isp1301 *isp = _isp; |
671 | 684 | ||
672 | /* update ISP1301 transciever from OTG controller */ | 685 | /* update ISP1301 transciever from OTG controller */ |
673 | if (otg_irq & OPRT_CHG) { | 686 | if (otg_irq & OPRT_CHG) { |
674 | OTG_IRQ_SRC_REG = OPRT_CHG; | 687 | omap_writew(OPRT_CHG, OTG_IRQ_SRC); |
675 | isp1301_defer_work(isp, WORK_UPDATE_ISP); | 688 | isp1301_defer_work(isp, WORK_UPDATE_ISP); |
676 | ret = IRQ_HANDLED; | 689 | ret = IRQ_HANDLED; |
677 | 690 | ||
678 | /* SRP to become b_peripheral failed */ | 691 | /* SRP to become b_peripheral failed */ |
679 | } else if (otg_irq & B_SRP_TMROUT) { | 692 | } else if (otg_irq & B_SRP_TMROUT) { |
680 | pr_debug("otg: B_SRP_TIMEOUT, %06x\n", OTG_CTRL_REG); | 693 | pr_debug("otg: B_SRP_TIMEOUT, %06x\n", omap_readl(OTG_CTRL)); |
681 | notresponding(isp); | 694 | notresponding(isp); |
682 | 695 | ||
683 | /* gadget drivers that care should monitor all kinds of | 696 | /* gadget drivers that care should monitor all kinds of |
@@ -687,31 +700,31 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
687 | if (isp->otg.state == OTG_STATE_B_SRP_INIT) | 700 | if (isp->otg.state == OTG_STATE_B_SRP_INIT) |
688 | b_idle(isp, "srp_timeout"); | 701 | b_idle(isp, "srp_timeout"); |
689 | 702 | ||
690 | OTG_IRQ_SRC_REG = B_SRP_TMROUT; | 703 | omap_writew(B_SRP_TMROUT, OTG_IRQ_SRC); |
691 | ret = IRQ_HANDLED; | 704 | ret = IRQ_HANDLED; |
692 | 705 | ||
693 | /* HNP to become b_host failed */ | 706 | /* HNP to become b_host failed */ |
694 | } else if (otg_irq & B_HNP_FAIL) { | 707 | } else if (otg_irq & B_HNP_FAIL) { |
695 | pr_debug("otg: %s B_HNP_FAIL, %06x\n", | 708 | pr_debug("otg: %s B_HNP_FAIL, %06x\n", |
696 | state_name(isp), OTG_CTRL_REG); | 709 | state_name(isp), omap_readl(OTG_CTRL)); |
697 | notresponding(isp); | 710 | notresponding(isp); |
698 | 711 | ||
699 | otg_ctrl = OTG_CTRL_REG; | 712 | otg_ctrl = omap_readl(OTG_CTRL); |
700 | otg_ctrl |= OTG_BUSDROP; | 713 | otg_ctrl |= OTG_BUSDROP; |
701 | otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 714 | otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
702 | OTG_CTRL_REG = otg_ctrl; | 715 | omap_writel(otg_ctrl, OTG_CTRL); |
703 | 716 | ||
704 | /* subset of b_peripheral()... */ | 717 | /* subset of b_peripheral()... */ |
705 | isp->otg.state = OTG_STATE_B_PERIPHERAL; | 718 | isp->otg.state = OTG_STATE_B_PERIPHERAL; |
706 | pr_debug(" --> b_peripheral\n"); | 719 | pr_debug(" --> b_peripheral\n"); |
707 | 720 | ||
708 | OTG_IRQ_SRC_REG = B_HNP_FAIL; | 721 | omap_writew(B_HNP_FAIL, OTG_IRQ_SRC); |
709 | ret = IRQ_HANDLED; | 722 | ret = IRQ_HANDLED; |
710 | 723 | ||
711 | /* detect SRP from B-device ... */ | 724 | /* detect SRP from B-device ... */ |
712 | } else if (otg_irq & A_SRP_DETECT) { | 725 | } else if (otg_irq & A_SRP_DETECT) { |
713 | pr_debug("otg: %s SRP_DETECT, %06x\n", | 726 | pr_debug("otg: %s SRP_DETECT, %06x\n", |
714 | state_name(isp), OTG_CTRL_REG); | 727 | state_name(isp), omap_readl(OTG_CTRL)); |
715 | 728 | ||
716 | isp1301_defer_work(isp, WORK_UPDATE_OTG); | 729 | isp1301_defer_work(isp, WORK_UPDATE_OTG); |
717 | switch (isp->otg.state) { | 730 | switch (isp->otg.state) { |
@@ -719,49 +732,49 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
719 | if (!isp->otg.host) | 732 | if (!isp->otg.host) |
720 | break; | 733 | break; |
721 | isp1301_defer_work(isp, WORK_HOST_RESUME); | 734 | isp1301_defer_work(isp, WORK_HOST_RESUME); |
722 | otg_ctrl = OTG_CTRL_REG; | 735 | otg_ctrl = omap_readl(OTG_CTRL); |
723 | otg_ctrl |= OTG_A_BUSREQ; | 736 | otg_ctrl |= OTG_A_BUSREQ; |
724 | otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) | 737 | otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) |
725 | & ~OTG_XCEIV_INPUTS | 738 | & ~OTG_XCEIV_INPUTS |
726 | & OTG_CTRL_MASK; | 739 | & OTG_CTRL_MASK; |
727 | OTG_CTRL_REG = otg_ctrl; | 740 | omap_writel(otg_ctrl, OTG_CTRL); |
728 | break; | 741 | break; |
729 | default: | 742 | default: |
730 | break; | 743 | break; |
731 | } | 744 | } |
732 | 745 | ||
733 | OTG_IRQ_SRC_REG = A_SRP_DETECT; | 746 | omap_writew(A_SRP_DETECT, OTG_IRQ_SRC); |
734 | ret = IRQ_HANDLED; | 747 | ret = IRQ_HANDLED; |
735 | 748 | ||
736 | /* timer expired: T(a_wait_bcon) and maybe T(a_wait_vrise) | 749 | /* timer expired: T(a_wait_bcon) and maybe T(a_wait_vrise) |
737 | * we don't track them separately | 750 | * we don't track them separately |
738 | */ | 751 | */ |
739 | } else if (otg_irq & A_REQ_TMROUT) { | 752 | } else if (otg_irq & A_REQ_TMROUT) { |
740 | otg_ctrl = OTG_CTRL_REG; | 753 | otg_ctrl = omap_readl(OTG_CTRL); |
741 | pr_info("otg: BCON_TMOUT from %s, %06x\n", | 754 | pr_info("otg: BCON_TMOUT from %s, %06x\n", |
742 | state_name(isp), otg_ctrl); | 755 | state_name(isp), otg_ctrl); |
743 | notresponding(isp); | 756 | notresponding(isp); |
744 | 757 | ||
745 | otg_ctrl |= OTG_BUSDROP; | 758 | otg_ctrl |= OTG_BUSDROP; |
746 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 759 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
747 | OTG_CTRL_REG = otg_ctrl; | 760 | omap_writel(otg_ctrl, OTG_CTRL); |
748 | isp->otg.state = OTG_STATE_A_WAIT_VFALL; | 761 | isp->otg.state = OTG_STATE_A_WAIT_VFALL; |
749 | 762 | ||
750 | OTG_IRQ_SRC_REG = A_REQ_TMROUT; | 763 | omap_writew(A_REQ_TMROUT, OTG_IRQ_SRC); |
751 | ret = IRQ_HANDLED; | 764 | ret = IRQ_HANDLED; |
752 | 765 | ||
753 | /* A-supplied voltage fell too low; overcurrent */ | 766 | /* A-supplied voltage fell too low; overcurrent */ |
754 | } else if (otg_irq & A_VBUS_ERR) { | 767 | } else if (otg_irq & A_VBUS_ERR) { |
755 | otg_ctrl = OTG_CTRL_REG; | 768 | otg_ctrl = omap_readl(OTG_CTRL); |
756 | printk(KERN_ERR "otg: %s, VBUS_ERR %04x ctrl %06x\n", | 769 | printk(KERN_ERR "otg: %s, VBUS_ERR %04x ctrl %06x\n", |
757 | state_name(isp), otg_irq, otg_ctrl); | 770 | state_name(isp), otg_irq, otg_ctrl); |
758 | 771 | ||
759 | otg_ctrl |= OTG_BUSDROP; | 772 | otg_ctrl |= OTG_BUSDROP; |
760 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 773 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
761 | OTG_CTRL_REG = otg_ctrl; | 774 | omap_writel(otg_ctrl, OTG_CTRL); |
762 | isp->otg.state = OTG_STATE_A_VBUS_ERR; | 775 | isp->otg.state = OTG_STATE_A_VBUS_ERR; |
763 | 776 | ||
764 | OTG_IRQ_SRC_REG = A_VBUS_ERR; | 777 | omap_writew(A_VBUS_ERR, OTG_IRQ_SRC); |
765 | ret = IRQ_HANDLED; | 778 | ret = IRQ_HANDLED; |
766 | 779 | ||
767 | /* switch driver; the transciever code activates it, | 780 | /* switch driver; the transciever code activates it, |
@@ -770,7 +783,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
770 | } else if (otg_irq & DRIVER_SWITCH) { | 783 | } else if (otg_irq & DRIVER_SWITCH) { |
771 | int kick = 0; | 784 | int kick = 0; |
772 | 785 | ||
773 | otg_ctrl = OTG_CTRL_REG; | 786 | otg_ctrl = omap_readl(OTG_CTRL); |
774 | printk(KERN_NOTICE "otg: %s, SWITCH to %s, ctrl %06x\n", | 787 | printk(KERN_NOTICE "otg: %s, SWITCH to %s, ctrl %06x\n", |
775 | state_name(isp), | 788 | state_name(isp), |
776 | (otg_ctrl & OTG_DRIVER_SEL) | 789 | (otg_ctrl & OTG_DRIVER_SEL) |
@@ -793,7 +806,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
793 | } else { | 806 | } else { |
794 | if (!(otg_ctrl & OTG_ID)) { | 807 | if (!(otg_ctrl & OTG_ID)) { |
795 | otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; | 808 | otg_ctrl &= OTG_CTRL_MASK & ~OTG_XCEIV_INPUTS; |
796 | OTG_CTRL_REG = otg_ctrl | OTG_A_BUSREQ; | 809 | omap_writel(otg_ctrl | OTG_A_BUSREQ, OTG_CTRL); |
797 | } | 810 | } |
798 | 811 | ||
799 | if (isp->otg.host) { | 812 | if (isp->otg.host) { |
@@ -818,7 +831,7 @@ static irqreturn_t omap_otg_irq(int irq, void *_isp) | |||
818 | } | 831 | } |
819 | } | 832 | } |
820 | 833 | ||
821 | OTG_IRQ_SRC_REG = DRIVER_SWITCH; | 834 | omap_writew(DRIVER_SWITCH, OTG_IRQ_SRC); |
822 | ret = IRQ_HANDLED; | 835 | ret = IRQ_HANDLED; |
823 | 836 | ||
824 | if (kick) | 837 | if (kick) |
@@ -834,12 +847,15 @@ static struct platform_device *otg_dev; | |||
834 | 847 | ||
835 | static int otg_init(struct isp1301 *isp) | 848 | static int otg_init(struct isp1301 *isp) |
836 | { | 849 | { |
850 | u32 l; | ||
851 | |||
837 | if (!otg_dev) | 852 | if (!otg_dev) |
838 | return -ENODEV; | 853 | return -ENODEV; |
839 | 854 | ||
840 | dump_regs(isp, __func__); | 855 | dump_regs(isp, __func__); |
841 | /* some of these values are board-specific... */ | 856 | /* some of these values are board-specific... */ |
842 | OTG_SYSCON_2_REG |= OTG_EN | 857 | l = omap_readl(OTG_SYSCON_2); |
858 | l |= OTG_EN | ||
843 | /* for B-device: */ | 859 | /* for B-device: */ |
844 | | SRP_GPDATA /* 9msec Bdev D+ pulse */ | 860 | | SRP_GPDATA /* 9msec Bdev D+ pulse */ |
845 | | SRP_GPDVBUS /* discharge after VBUS pulse */ | 861 | | SRP_GPDVBUS /* discharge after VBUS pulse */ |
@@ -849,18 +865,22 @@ static int otg_init(struct isp1301 *isp) | |||
849 | | SRP_DPW /* detect 167+ns SRP pulses */ | 865 | | SRP_DPW /* detect 167+ns SRP pulses */ |
850 | | SRP_DATA | SRP_VBUS /* accept both kinds of SRP pulse */ | 866 | | SRP_DATA | SRP_VBUS /* accept both kinds of SRP pulse */ |
851 | ; | 867 | ; |
868 | omap_writel(l, OTG_SYSCON_2); | ||
852 | 869 | ||
853 | update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE)); | 870 | update_otg1(isp, isp1301_get_u8(isp, ISP1301_INTERRUPT_SOURCE)); |
854 | update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS)); | 871 | update_otg2(isp, isp1301_get_u8(isp, ISP1301_OTG_STATUS)); |
855 | 872 | ||
856 | check_state(isp, __func__); | 873 | check_state(isp, __func__); |
857 | pr_debug("otg: %s, %s %06x\n", | 874 | pr_debug("otg: %s, %s %06x\n", |
858 | state_name(isp), __func__, OTG_CTRL_REG); | 875 | state_name(isp), __func__, omap_readl(OTG_CTRL)); |
859 | 876 | ||
860 | OTG_IRQ_EN_REG = DRIVER_SWITCH | OPRT_CHG | 877 | omap_writew(DRIVER_SWITCH | OPRT_CHG |
861 | | B_SRP_TMROUT | B_HNP_FAIL | 878 | | B_SRP_TMROUT | B_HNP_FAIL |
862 | | A_VBUS_ERR | A_SRP_DETECT | A_REQ_TMROUT; | 879 | | A_VBUS_ERR | A_SRP_DETECT | A_REQ_TMROUT, OTG_IRQ_EN); |
863 | OTG_SYSCON_2_REG |= OTG_EN; | 880 | |
881 | l = omap_readl(OTG_SYSCON_2); | ||
882 | l |= OTG_EN; | ||
883 | omap_writel(l, OTG_SYSCON_2); | ||
864 | 884 | ||
865 | return 0; | 885 | return 0; |
866 | } | 886 | } |
@@ -927,7 +947,11 @@ static void otg_unbind(struct isp1301 *isp) | |||
927 | 947 | ||
928 | static void b_peripheral(struct isp1301 *isp) | 948 | static void b_peripheral(struct isp1301 *isp) |
929 | { | 949 | { |
930 | OTG_CTRL_REG = OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; | 950 | u32 l; |
951 | |||
952 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; | ||
953 | omap_writel(l, OTG_CTRL); | ||
954 | |||
931 | usb_gadget_vbus_connect(isp->otg.gadget); | 955 | usb_gadget_vbus_connect(isp->otg.gadget); |
932 | 956 | ||
933 | #ifdef CONFIG_USB_OTG | 957 | #ifdef CONFIG_USB_OTG |
@@ -999,6 +1023,8 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
999 | isp_bstat = 0; | 1023 | isp_bstat = 0; |
1000 | } | 1024 | } |
1001 | } else { | 1025 | } else { |
1026 | u32 l; | ||
1027 | |||
1002 | /* if user unplugged mini-A end of cable, | 1028 | /* if user unplugged mini-A end of cable, |
1003 | * don't bypass A_WAIT_VFALL. | 1029 | * don't bypass A_WAIT_VFALL. |
1004 | */ | 1030 | */ |
@@ -1019,8 +1045,9 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
1019 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, | 1045 | isp1301_clear_bits(isp, ISP1301_MODE_CONTROL_1, |
1020 | MC1_BDIS_ACON_EN); | 1046 | MC1_BDIS_ACON_EN); |
1021 | isp->otg.state = OTG_STATE_B_IDLE; | 1047 | isp->otg.state = OTG_STATE_B_IDLE; |
1022 | OTG_CTRL_REG &= OTG_CTRL_REG & OTG_CTRL_MASK | 1048 | l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
1023 | & ~OTG_CTRL_BITS; | 1049 | l &= ~OTG_CTRL_BITS; |
1050 | omap_writel(l, OTG_CTRL); | ||
1024 | break; | 1051 | break; |
1025 | case OTG_STATE_B_IDLE: | 1052 | case OTG_STATE_B_IDLE: |
1026 | break; | 1053 | break; |
@@ -1046,7 +1073,8 @@ static void isp_update_otg(struct isp1301 *isp, u8 stat) | |||
1046 | /* FALLTHROUGH */ | 1073 | /* FALLTHROUGH */ |
1047 | case OTG_STATE_B_SRP_INIT: | 1074 | case OTG_STATE_B_SRP_INIT: |
1048 | b_idle(isp, __func__); | 1075 | b_idle(isp, __func__); |
1049 | OTG_CTRL_REG &= OTG_CTRL_REG & OTG_XCEIV_OUTPUTS; | 1076 | l = omap_readl(OTG_CTRL) & OTG_XCEIV_OUTPUTS; |
1077 | omap_writel(l, OTG_CTRL); | ||
1050 | /* FALLTHROUGH */ | 1078 | /* FALLTHROUGH */ |
1051 | case OTG_STATE_B_IDLE: | 1079 | case OTG_STATE_B_IDLE: |
1052 | if (isp->otg.gadget && (isp_bstat & OTG_B_SESS_VLD)) { | 1080 | if (isp->otg.gadget && (isp_bstat & OTG_B_SESS_VLD)) { |
@@ -1130,11 +1158,11 @@ isp1301_work(struct work_struct *work) | |||
1130 | case OTG_STATE_A_WAIT_VRISE: | 1158 | case OTG_STATE_A_WAIT_VRISE: |
1131 | isp->otg.state = OTG_STATE_A_HOST; | 1159 | isp->otg.state = OTG_STATE_A_HOST; |
1132 | pr_debug(" --> a_host\n"); | 1160 | pr_debug(" --> a_host\n"); |
1133 | otg_ctrl = OTG_CTRL_REG; | 1161 | otg_ctrl = omap_readl(OTG_CTRL); |
1134 | otg_ctrl |= OTG_A_BUSREQ; | 1162 | otg_ctrl |= OTG_A_BUSREQ; |
1135 | otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) | 1163 | otg_ctrl &= ~(OTG_BUSDROP|OTG_B_BUSREQ) |
1136 | & OTG_CTRL_MASK; | 1164 | & OTG_CTRL_MASK; |
1137 | OTG_CTRL_REG = otg_ctrl; | 1165 | omap_writel(otg_ctrl, OTG_CTRL); |
1138 | break; | 1166 | break; |
1139 | case OTG_STATE_B_WAIT_ACON: | 1167 | case OTG_STATE_B_WAIT_ACON: |
1140 | isp->otg.state = OTG_STATE_B_HOST; | 1168 | isp->otg.state = OTG_STATE_B_HOST; |
@@ -1274,7 +1302,7 @@ isp1301_set_host(struct otg_transceiver *otg, struct usb_bus *host) | |||
1274 | return -ENODEV; | 1302 | return -ENODEV; |
1275 | 1303 | ||
1276 | if (!host) { | 1304 | if (!host) { |
1277 | OTG_IRQ_EN_REG = 0; | 1305 | omap_writew(0, OTG_IRQ_EN); |
1278 | power_down(isp); | 1306 | power_down(isp); |
1279 | isp->otg.host = 0; | 1307 | isp->otg.host = 0; |
1280 | return 0; | 1308 | return 0; |
@@ -1325,12 +1353,13 @@ static int | |||
1325 | isp1301_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget) | 1353 | isp1301_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget) |
1326 | { | 1354 | { |
1327 | struct isp1301 *isp = container_of(otg, struct isp1301, otg); | 1355 | struct isp1301 *isp = container_of(otg, struct isp1301, otg); |
1356 | u32 l; | ||
1328 | 1357 | ||
1329 | if (!otg || isp != the_transceiver) | 1358 | if (!otg || isp != the_transceiver) |
1330 | return -ENODEV; | 1359 | return -ENODEV; |
1331 | 1360 | ||
1332 | if (!gadget) { | 1361 | if (!gadget) { |
1333 | OTG_IRQ_EN_REG = 0; | 1362 | omap_writew(0, OTG_IRQ_EN); |
1334 | if (!isp->otg.default_a) | 1363 | if (!isp->otg.default_a) |
1335 | enable_vbus_draw(isp, 0); | 1364 | enable_vbus_draw(isp, 0); |
1336 | usb_gadget_vbus_disconnect(isp->otg.gadget); | 1365 | usb_gadget_vbus_disconnect(isp->otg.gadget); |
@@ -1351,9 +1380,11 @@ isp1301_set_peripheral(struct otg_transceiver *otg, struct usb_gadget *gadget) | |||
1351 | isp->otg.gadget = gadget; | 1380 | isp->otg.gadget = gadget; |
1352 | // FIXME update its refcount | 1381 | // FIXME update its refcount |
1353 | 1382 | ||
1354 | OTG_CTRL_REG = (OTG_CTRL_REG & OTG_CTRL_MASK | 1383 | l = omap_readl(OTG_CTRL) & OTG_CTRL_MASK; |
1355 | & ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS)) | 1384 | l &= ~(OTG_XCEIV_OUTPUTS|OTG_CTRL_BITS); |
1356 | | OTG_ID; | 1385 | l |= OTG_ID; |
1386 | omap_writel(l, OTG_CTRL); | ||
1387 | |||
1357 | power_up(isp); | 1388 | power_up(isp); |
1358 | isp->otg.state = OTG_STATE_B_IDLE; | 1389 | isp->otg.state = OTG_STATE_B_IDLE; |
1359 | 1390 | ||
@@ -1405,16 +1436,17 @@ isp1301_start_srp(struct otg_transceiver *dev) | |||
1405 | || isp->otg.state != OTG_STATE_B_IDLE) | 1436 | || isp->otg.state != OTG_STATE_B_IDLE) |
1406 | return -ENODEV; | 1437 | return -ENODEV; |
1407 | 1438 | ||
1408 | otg_ctrl = OTG_CTRL_REG; | 1439 | otg_ctrl = omap_readl(OTG_CTRL); |
1409 | if (!(otg_ctrl & OTG_BSESSEND)) | 1440 | if (!(otg_ctrl & OTG_BSESSEND)) |
1410 | return -EINVAL; | 1441 | return -EINVAL; |
1411 | 1442 | ||
1412 | otg_ctrl |= OTG_B_BUSREQ; | 1443 | otg_ctrl |= OTG_B_BUSREQ; |
1413 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK; | 1444 | otg_ctrl &= ~OTG_A_BUSREQ & OTG_CTRL_MASK; |
1414 | OTG_CTRL_REG = otg_ctrl; | 1445 | omap_writel(otg_ctrl, OTG_CTRL); |
1415 | isp->otg.state = OTG_STATE_B_SRP_INIT; | 1446 | isp->otg.state = OTG_STATE_B_SRP_INIT; |
1416 | 1447 | ||
1417 | pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), OTG_CTRL_REG); | 1448 | pr_debug("otg: SRP, %s ... %06x\n", state_name(isp), |
1449 | omap_readl(OTG_CTRL)); | ||
1418 | #ifdef CONFIG_USB_OTG | 1450 | #ifdef CONFIG_USB_OTG |
1419 | check_state(isp, __func__); | 1451 | check_state(isp, __func__); |
1420 | #endif | 1452 | #endif |
@@ -1426,6 +1458,7 @@ isp1301_start_hnp(struct otg_transceiver *dev) | |||
1426 | { | 1458 | { |
1427 | #ifdef CONFIG_USB_OTG | 1459 | #ifdef CONFIG_USB_OTG |
1428 | struct isp1301 *isp = container_of(dev, struct isp1301, otg); | 1460 | struct isp1301 *isp = container_of(dev, struct isp1301, otg); |
1461 | u32 l; | ||
1429 | 1462 | ||
1430 | if (!dev || isp != the_transceiver) | 1463 | if (!dev || isp != the_transceiver) |
1431 | return -ENODEV; | 1464 | return -ENODEV; |
@@ -1452,7 +1485,9 @@ isp1301_start_hnp(struct otg_transceiver *dev) | |||
1452 | #endif | 1485 | #endif |
1453 | /* caller must suspend then clear A_BUSREQ */ | 1486 | /* caller must suspend then clear A_BUSREQ */ |
1454 | usb_gadget_vbus_connect(isp->otg.gadget); | 1487 | usb_gadget_vbus_connect(isp->otg.gadget); |
1455 | OTG_CTRL_REG |= OTG_A_SETB_HNPEN; | 1488 | l = omap_readl(OTG_CTRL); |
1489 | l |= OTG_A_SETB_HNPEN; | ||
1490 | omap_writel(l, OTG_CTRL); | ||
1456 | 1491 | ||
1457 | break; | 1492 | break; |
1458 | case OTG_STATE_A_PERIPHERAL: | 1493 | case OTG_STATE_A_PERIPHERAL: |
@@ -1462,7 +1497,7 @@ isp1301_start_hnp(struct otg_transceiver *dev) | |||
1462 | return -EILSEQ; | 1497 | return -EILSEQ; |
1463 | } | 1498 | } |
1464 | pr_debug("otg: HNP %s, %06x ...\n", | 1499 | pr_debug("otg: HNP %s, %06x ...\n", |
1465 | state_name(isp), OTG_CTRL_REG); | 1500 | state_name(isp), omap_readl(OTG_CTRL)); |
1466 | check_state(isp, __func__); | 1501 | check_state(isp, __func__); |
1467 | return 0; | 1502 | return 0; |
1468 | #else | 1503 | #else |
diff --git a/drivers/ide/Kconfig b/drivers/ide/Kconfig index 8e07de23d220..1607536ff5fb 100644 --- a/drivers/ide/Kconfig +++ b/drivers/ide/Kconfig | |||
@@ -823,6 +823,13 @@ config BLK_DEV_IDE_RAPIDE | |||
823 | Say Y here if you want to support the Yellowstone RapIDE controller | 823 | Say Y here if you want to support the Yellowstone RapIDE controller |
824 | manufactured for use with Acorn computers. | 824 | manufactured for use with Acorn computers. |
825 | 825 | ||
826 | config BLK_DEV_IDE_BAST | ||
827 | tristate "Simtec BAST / Thorcom VR1000 IDE support" | ||
828 | depends on ARM && (ARCH_BAST || MACH_VR1000) | ||
829 | help | ||
830 | Say Y here if you want to support the onboard IDE channels on the | ||
831 | Simtec BAST or the Thorcom VR1000 | ||
832 | |||
826 | config IDE_H8300 | 833 | config IDE_H8300 |
827 | tristate "H8300 IDE support" | 834 | tristate "H8300 IDE support" |
828 | depends on H8300 | 835 | depends on H8300 |
diff --git a/drivers/ide/arm/Makefile b/drivers/ide/arm/Makefile index 5bc26053afa6..936e7b0237f5 100644 --- a/drivers/ide/arm/Makefile +++ b/drivers/ide/arm/Makefile | |||
@@ -1,6 +1,7 @@ | |||
1 | 1 | ||
2 | obj-$(CONFIG_BLK_DEV_IDE_ICSIDE) += icside.o | 2 | obj-$(CONFIG_BLK_DEV_IDE_ICSIDE) += icside.o |
3 | obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapide.o | 3 | obj-$(CONFIG_BLK_DEV_IDE_RAPIDE) += rapide.o |
4 | obj-$(CONFIG_BLK_DEV_IDE_BAST) += bast-ide.o | ||
4 | obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710) += palm_bk3710.o | 5 | obj-$(CONFIG_BLK_DEV_PALMCHIP_BK3710) += palm_bk3710.o |
5 | 6 | ||
6 | ifeq ($(CONFIG_IDE_ARM), m) | 7 | ifeq ($(CONFIG_IDE_ARM), m) |
diff --git a/drivers/ide/arm/bast-ide.c b/drivers/ide/arm/bast-ide.c new file mode 100644 index 000000000000..8e8c28104b45 --- /dev/null +++ b/drivers/ide/arm/bast-ide.c | |||
@@ -0,0 +1,90 @@ | |||
1 | /* | ||
2 | * Copyright (c) 2003-2004 Simtec Electronics | ||
3 | * Ben Dooks <ben@simtec.co.uk> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License version 2 as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | */ | ||
10 | |||
11 | #include <linux/module.h> | ||
12 | #include <linux/errno.h> | ||
13 | #include <linux/ide.h> | ||
14 | #include <linux/init.h> | ||
15 | |||
16 | #include <asm/mach-types.h> | ||
17 | |||
18 | #include <asm/io.h> | ||
19 | #include <asm/irq.h> | ||
20 | #include <asm/arch/map.h> | ||
21 | #include <asm/arch/bast-map.h> | ||
22 | #include <asm/arch/bast-irq.h> | ||
23 | |||
24 | #define DRV_NAME "bast-ide" | ||
25 | |||
26 | static int __init bastide_register(unsigned int base, unsigned int aux, int irq) | ||
27 | { | ||
28 | ide_hwif_t *hwif; | ||
29 | hw_regs_t hw; | ||
30 | int i; | ||
31 | u8 idx[4] = { 0xff, 0xff, 0xff, 0xff }; | ||
32 | |||
33 | memset(&hw, 0, sizeof(hw)); | ||
34 | |||
35 | base += BAST_IDE_CS; | ||
36 | aux += BAST_IDE_CS; | ||
37 | |||
38 | for (i = 0; i <= 7; i++) { | ||
39 | hw.io_ports_array[i] = (unsigned long)base; | ||
40 | base += 0x20; | ||
41 | } | ||
42 | |||
43 | hw.io_ports.ctl_addr = aux + (6 * 0x20); | ||
44 | hw.irq = irq; | ||
45 | hw.chipset = ide_generic; | ||
46 | |||
47 | hwif = ide_find_port(); | ||
48 | if (hwif == NULL) | ||
49 | goto out; | ||
50 | |||
51 | i = hwif->index; | ||
52 | |||
53 | ide_init_port_data(hwif, i); | ||
54 | ide_init_port_hw(hwif, &hw); | ||
55 | hwif->port_ops = NULL; | ||
56 | |||
57 | idx[0] = i; | ||
58 | |||
59 | ide_device_add(idx, NULL); | ||
60 | out: | ||
61 | return 0; | ||
62 | } | ||
63 | |||
64 | static int __init bastide_init(void) | ||
65 | { | ||
66 | unsigned long base = BAST_VA_IDEPRI + BAST_IDE_CS; | ||
67 | |||
68 | /* we can treat the VR1000 and the BAST the same */ | ||
69 | |||
70 | if (!(machine_is_bast() || machine_is_vr1000())) | ||
71 | return 0; | ||
72 | |||
73 | printk("BAST: IDE driver, (c) 2003-2004 Simtec Electronics\n"); | ||
74 | |||
75 | if (!request_mem_region(base, 0x400000, DRV_NAME)) { | ||
76 | printk(KERN_ERR "%s: resources busy\n", DRV_NAME); | ||
77 | return -EBUSY; | ||
78 | } | ||
79 | |||
80 | bastide_register(BAST_VA_IDEPRI, BAST_VA_IDEPRIAUX, IRQ_IDE0); | ||
81 | bastide_register(BAST_VA_IDESEC, BAST_VA_IDESECAUX, IRQ_IDE1); | ||
82 | |||
83 | return 0; | ||
84 | } | ||
85 | |||
86 | module_init(bastide_init); | ||
87 | |||
88 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
89 | MODULE_LICENSE("GPL"); | ||
90 | MODULE_DESCRIPTION("Simtec BAST / Thorcom VR1000 IDE driver"); | ||
diff --git a/drivers/ide/ide-proc.c b/drivers/ide/ide-proc.c index 55ec7f798772..8af88bf0969b 100644 --- a/drivers/ide/ide-proc.c +++ b/drivers/ide/ide-proc.c | |||
@@ -76,7 +76,7 @@ static int proc_ide_read_mate | |||
76 | ide_hwif_t *hwif = (ide_hwif_t *) data; | 76 | ide_hwif_t *hwif = (ide_hwif_t *) data; |
77 | int len; | 77 | int len; |
78 | 78 | ||
79 | if (hwif && hwif->mate && hwif->mate->present) | 79 | if (hwif && hwif->mate) |
80 | len = sprintf(page, "%s\n", hwif->mate->name); | 80 | len = sprintf(page, "%s\n", hwif->mate->name); |
81 | else | 81 | else |
82 | len = sprintf(page, "(none)\n"); | 82 | len = sprintf(page, "(none)\n"); |
diff --git a/drivers/input/ff-core.c b/drivers/input/ff-core.c index eebc72465fc9..72c63e5dd630 100644 --- a/drivers/input/ff-core.c +++ b/drivers/input/ff-core.c | |||
@@ -28,6 +28,7 @@ | |||
28 | #include <linux/input.h> | 28 | #include <linux/input.h> |
29 | #include <linux/module.h> | 29 | #include <linux/module.h> |
30 | #include <linux/mutex.h> | 30 | #include <linux/mutex.h> |
31 | #include <linux/sched.h> | ||
31 | 32 | ||
32 | /* | 33 | /* |
33 | * Check that the effect_id is a valid effect and whether the user | 34 | * Check that the effect_id is a valid effect and whether the user |
@@ -166,8 +167,10 @@ int input_ff_upload(struct input_dev *dev, struct ff_effect *effect, | |||
166 | if (ret) | 167 | if (ret) |
167 | goto out; | 168 | goto out; |
168 | 169 | ||
170 | spin_lock_irq(&dev->event_lock); | ||
169 | ff->effects[id] = *effect; | 171 | ff->effects[id] = *effect; |
170 | ff->effect_owners[id] = file; | 172 | ff->effect_owners[id] = file; |
173 | spin_unlock_irq(&dev->event_lock); | ||
171 | 174 | ||
172 | out: | 175 | out: |
173 | mutex_unlock(&ff->mutex); | 176 | mutex_unlock(&ff->mutex); |
@@ -189,16 +192,22 @@ static int erase_effect(struct input_dev *dev, int effect_id, | |||
189 | if (error) | 192 | if (error) |
190 | return error; | 193 | return error; |
191 | 194 | ||
195 | spin_lock_irq(&dev->event_lock); | ||
192 | ff->playback(dev, effect_id, 0); | 196 | ff->playback(dev, effect_id, 0); |
197 | ff->effect_owners[effect_id] = NULL; | ||
198 | spin_unlock_irq(&dev->event_lock); | ||
193 | 199 | ||
194 | if (ff->erase) { | 200 | if (ff->erase) { |
195 | error = ff->erase(dev, effect_id); | 201 | error = ff->erase(dev, effect_id); |
196 | if (error) | 202 | if (error) { |
203 | spin_lock_irq(&dev->event_lock); | ||
204 | ff->effect_owners[effect_id] = file; | ||
205 | spin_unlock_irq(&dev->event_lock); | ||
206 | |||
197 | return error; | 207 | return error; |
208 | } | ||
198 | } | 209 | } |
199 | 210 | ||
200 | ff->effect_owners[effect_id] = NULL; | ||
201 | |||
202 | return 0; | 211 | return 0; |
203 | } | 212 | } |
204 | 213 | ||
@@ -263,8 +272,6 @@ int input_ff_event(struct input_dev *dev, unsigned int type, | |||
263 | if (type != EV_FF) | 272 | if (type != EV_FF) |
264 | return 0; | 273 | return 0; |
265 | 274 | ||
266 | mutex_lock(&ff->mutex); | ||
267 | |||
268 | switch (code) { | 275 | switch (code) { |
269 | case FF_GAIN: | 276 | case FF_GAIN: |
270 | if (!test_bit(FF_GAIN, dev->ffbit) || value > 0xffff) | 277 | if (!test_bit(FF_GAIN, dev->ffbit) || value > 0xffff) |
@@ -286,7 +293,6 @@ int input_ff_event(struct input_dev *dev, unsigned int type, | |||
286 | break; | 293 | break; |
287 | } | 294 | } |
288 | 295 | ||
289 | mutex_unlock(&ff->mutex); | ||
290 | return 0; | 296 | return 0; |
291 | } | 297 | } |
292 | EXPORT_SYMBOL_GPL(input_ff_event); | 298 | EXPORT_SYMBOL_GPL(input_ff_event); |
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c index 835def11419d..ab6a61db63ce 100644 --- a/drivers/md/dm-crypt.c +++ b/drivers/md/dm-crypt.c | |||
@@ -432,6 +432,7 @@ static int crypt_convert(struct crypt_config *cc, | |||
432 | case 0: | 432 | case 0: |
433 | atomic_dec(&ctx->pending); | 433 | atomic_dec(&ctx->pending); |
434 | ctx->sector++; | 434 | ctx->sector++; |
435 | cond_resched(); | ||
435 | continue; | 436 | continue; |
436 | 437 | ||
437 | /* error */ | 438 | /* error */ |
diff --git a/drivers/md/md.c b/drivers/md/md.c index 7cf512a34ccf..2580ac1b9b0f 100644 --- a/drivers/md/md.c +++ b/drivers/md/md.c | |||
@@ -3897,8 +3897,10 @@ static void autorun_devices(int part) | |||
3897 | 3897 | ||
3898 | md_probe(dev, NULL, NULL); | 3898 | md_probe(dev, NULL, NULL); |
3899 | mddev = mddev_find(dev); | 3899 | mddev = mddev_find(dev); |
3900 | if (!mddev) { | 3900 | if (!mddev || !mddev->gendisk) { |
3901 | printk(KERN_ERR | 3901 | if (mddev) |
3902 | mddev_put(mddev); | ||
3903 | printk(KERN_ERR | ||
3902 | "md: cannot allocate memory for md drive.\n"); | 3904 | "md: cannot allocate memory for md drive.\n"); |
3903 | break; | 3905 | break; |
3904 | } | 3906 | } |
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c index 1de17da34a95..a71277b640ab 100644 --- a/drivers/md/raid10.c +++ b/drivers/md/raid10.c | |||
@@ -2137,6 +2137,8 @@ static int run(mddev_t *mddev) | |||
2137 | !test_bit(In_sync, &disk->rdev->flags)) { | 2137 | !test_bit(In_sync, &disk->rdev->flags)) { |
2138 | disk->head_position = 0; | 2138 | disk->head_position = 0; |
2139 | mddev->degraded++; | 2139 | mddev->degraded++; |
2140 | if (disk->rdev) | ||
2141 | conf->fullsync = 1; | ||
2140 | } | 2142 | } |
2141 | } | 2143 | } |
2142 | 2144 | ||
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c index c37e256b1176..54c8ee28fcc4 100644 --- a/drivers/md/raid5.c +++ b/drivers/md/raid5.c | |||
@@ -2898,6 +2898,8 @@ static void handle_stripe5(struct stripe_head *sh) | |||
2898 | 2898 | ||
2899 | for (i = conf->raid_disks; i--; ) { | 2899 | for (i = conf->raid_disks; i--; ) { |
2900 | set_bit(R5_Wantwrite, &sh->dev[i].flags); | 2900 | set_bit(R5_Wantwrite, &sh->dev[i].flags); |
2901 | set_bit(R5_LOCKED, &dev->flags); | ||
2902 | s.locked++; | ||
2901 | if (!test_and_set_bit(STRIPE_OP_IO, &sh->ops.pending)) | 2903 | if (!test_and_set_bit(STRIPE_OP_IO, &sh->ops.pending)) |
2902 | sh->ops.count++; | 2904 | sh->ops.count++; |
2903 | } | 2905 | } |
@@ -2911,6 +2913,7 @@ static void handle_stripe5(struct stripe_head *sh) | |||
2911 | conf->raid_disks); | 2913 | conf->raid_disks); |
2912 | s.locked += handle_write_operations5(sh, 1, 1); | 2914 | s.locked += handle_write_operations5(sh, 1, 1); |
2913 | } else if (s.expanded && | 2915 | } else if (s.expanded && |
2916 | s.locked == 0 && | ||
2914 | !test_bit(STRIPE_OP_POSTXOR, &sh->ops.pending)) { | 2917 | !test_bit(STRIPE_OP_POSTXOR, &sh->ops.pending)) { |
2915 | clear_bit(STRIPE_EXPAND_READY, &sh->state); | 2918 | clear_bit(STRIPE_EXPAND_READY, &sh->state); |
2916 | atomic_dec(&conf->reshape_stripes); | 2919 | atomic_dec(&conf->reshape_stripes); |
@@ -4305,7 +4308,9 @@ static int run(mddev_t *mddev) | |||
4305 | " disk %d\n", bdevname(rdev->bdev,b), | 4308 | " disk %d\n", bdevname(rdev->bdev,b), |
4306 | raid_disk); | 4309 | raid_disk); |
4307 | working_disks++; | 4310 | working_disks++; |
4308 | } | 4311 | } else |
4312 | /* Cannot rely on bitmap to complete recovery */ | ||
4313 | conf->fullsync = 1; | ||
4309 | } | 4314 | } |
4310 | 4315 | ||
4311 | /* | 4316 | /* |
diff --git a/drivers/media/common/ir-keymaps.c b/drivers/media/common/ir-keymaps.c index a3485817e46c..8fa91f846d59 100644 --- a/drivers/media/common/ir-keymaps.c +++ b/drivers/media/common/ir-keymaps.c | |||
@@ -2201,3 +2201,41 @@ IR_KEYTAB_TYPE ir_codes_powercolor_real_angel[IR_KEYTAB_SIZE] = { | |||
2201 | [0x25] = KEY_POWER, /* power */ | 2201 | [0x25] = KEY_POWER, /* power */ |
2202 | }; | 2202 | }; |
2203 | EXPORT_SYMBOL_GPL(ir_codes_powercolor_real_angel); | 2203 | EXPORT_SYMBOL_GPL(ir_codes_powercolor_real_angel); |
2204 | |||
2205 | IR_KEYTAB_TYPE ir_codes_avermedia_a16d[IR_KEYTAB_SIZE] = { | ||
2206 | [0x20] = KEY_LIST, | ||
2207 | [0x00] = KEY_POWER, | ||
2208 | [0x28] = KEY_1, | ||
2209 | [0x18] = KEY_2, | ||
2210 | [0x38] = KEY_3, | ||
2211 | [0x24] = KEY_4, | ||
2212 | [0x14] = KEY_5, | ||
2213 | [0x34] = KEY_6, | ||
2214 | [0x2c] = KEY_7, | ||
2215 | [0x1c] = KEY_8, | ||
2216 | [0x3c] = KEY_9, | ||
2217 | [0x12] = KEY_SUBTITLE, | ||
2218 | [0x22] = KEY_0, | ||
2219 | [0x32] = KEY_REWIND, | ||
2220 | [0x3a] = KEY_SHUFFLE, | ||
2221 | [0x02] = KEY_PRINT, | ||
2222 | [0x11] = KEY_CHANNELDOWN, | ||
2223 | [0x31] = KEY_CHANNELUP, | ||
2224 | [0x0c] = KEY_ZOOM, | ||
2225 | [0x1e] = KEY_VOLUMEDOWN, | ||
2226 | [0x3e] = KEY_VOLUMEUP, | ||
2227 | [0x0a] = KEY_MUTE, | ||
2228 | [0x04] = KEY_AUDIO, | ||
2229 | [0x26] = KEY_RECORD, | ||
2230 | [0x06] = KEY_PLAY, | ||
2231 | [0x36] = KEY_STOP, | ||
2232 | [0x16] = KEY_PAUSE, | ||
2233 | [0x2e] = KEY_REWIND, | ||
2234 | [0x0e] = KEY_FASTFORWARD, | ||
2235 | [0x30] = KEY_TEXT, | ||
2236 | [0x21] = KEY_GREEN, | ||
2237 | [0x01] = KEY_BLUE, | ||
2238 | [0x08] = KEY_EPG, | ||
2239 | [0x2a] = KEY_MENU, | ||
2240 | }; | ||
2241 | EXPORT_SYMBOL_GPL(ir_codes_avermedia_a16d); | ||
diff --git a/drivers/media/common/tuners/tda18271-common.c b/drivers/media/common/tuners/tda18271-common.c index f1894fec32b9..6fb5b4586569 100644 --- a/drivers/media/common/tuners/tda18271-common.c +++ b/drivers/media/common/tuners/tda18271-common.c | |||
@@ -649,9 +649,17 @@ int tda18271_calc_rf_cal(struct dvb_frontend *fe, u32 *freq) | |||
649 | u8 val; | 649 | u8 val; |
650 | 650 | ||
651 | int ret = tda18271_lookup_map(fe, RF_CAL, freq, &val); | 651 | int ret = tda18271_lookup_map(fe, RF_CAL, freq, &val); |
652 | /* The TDA18271HD/C1 rf_cal map lookup is expected to go out of range | ||
653 | * for frequencies above 61.1 MHz. In these cases, the internal RF | ||
654 | * tracking filters calibration mechanism is used. | ||
655 | * | ||
656 | * There is no need to warn the user about this. | ||
657 | */ | ||
658 | if (ret < 0) | ||
659 | goto fail; | ||
652 | 660 | ||
653 | regs[R_EB14] = val; | 661 | regs[R_EB14] = val; |
654 | 662 | fail: | |
655 | return ret; | 663 | return ret; |
656 | } | 664 | } |
657 | 665 | ||
diff --git a/drivers/media/common/tuners/tda18271-fe.c b/drivers/media/common/tuners/tda18271-fe.c index 89c01fb1f859..93063c6fbbf6 100644 --- a/drivers/media/common/tuners/tda18271-fe.c +++ b/drivers/media/common/tuners/tda18271-fe.c | |||
@@ -45,6 +45,21 @@ static inline int charge_pump_source(struct dvb_frontend *fe, int force) | |||
45 | TDA18271_MAIN_PLL, force); | 45 | TDA18271_MAIN_PLL, force); |
46 | } | 46 | } |
47 | 47 | ||
48 | static inline void tda18271_set_if_notch(struct dvb_frontend *fe) | ||
49 | { | ||
50 | struct tda18271_priv *priv = fe->tuner_priv; | ||
51 | unsigned char *regs = priv->tda18271_regs; | ||
52 | |||
53 | switch (priv->mode) { | ||
54 | case TDA18271_ANALOG: | ||
55 | regs[R_MPD] &= ~0x80; /* IF notch = 0 */ | ||
56 | break; | ||
57 | case TDA18271_DIGITAL: | ||
58 | regs[R_MPD] |= 0x80; /* IF notch = 1 */ | ||
59 | break; | ||
60 | } | ||
61 | } | ||
62 | |||
48 | static int tda18271_channel_configuration(struct dvb_frontend *fe, | 63 | static int tda18271_channel_configuration(struct dvb_frontend *fe, |
49 | struct tda18271_std_map_item *map, | 64 | struct tda18271_std_map_item *map, |
50 | u32 freq, u32 bw) | 65 | u32 freq, u32 bw) |
@@ -60,25 +75,18 @@ static int tda18271_channel_configuration(struct dvb_frontend *fe, | |||
60 | regs[R_EP3] &= ~0x1f; /* clear std bits */ | 75 | regs[R_EP3] &= ~0x1f; /* clear std bits */ |
61 | regs[R_EP3] |= (map->agc_mode << 3) | map->std; | 76 | regs[R_EP3] |= (map->agc_mode << 3) | map->std; |
62 | 77 | ||
63 | /* set rfagc to high speed mode */ | 78 | if (priv->id == TDA18271HDC2) { |
64 | regs[R_EP3] &= ~0x04; | 79 | /* set rfagc to high speed mode */ |
80 | regs[R_EP3] &= ~0x04; | ||
81 | } | ||
65 | 82 | ||
66 | /* set cal mode to normal */ | 83 | /* set cal mode to normal */ |
67 | regs[R_EP4] &= ~0x03; | 84 | regs[R_EP4] &= ~0x03; |
68 | 85 | ||
69 | /* update IF output level & IF notch frequency */ | 86 | /* update IF output level */ |
70 | regs[R_EP4] &= ~0x1c; /* clear if level bits */ | 87 | regs[R_EP4] &= ~0x1c; /* clear if level bits */ |
71 | regs[R_EP4] |= (map->if_lvl << 2); | 88 | regs[R_EP4] |= (map->if_lvl << 2); |
72 | 89 | ||
73 | switch (priv->mode) { | ||
74 | case TDA18271_ANALOG: | ||
75 | regs[R_MPD] &= ~0x80; /* IF notch = 0 */ | ||
76 | break; | ||
77 | case TDA18271_DIGITAL: | ||
78 | regs[R_MPD] |= 0x80; /* IF notch = 1 */ | ||
79 | break; | ||
80 | } | ||
81 | |||
82 | /* update FM_RFn */ | 90 | /* update FM_RFn */ |
83 | regs[R_EP4] &= ~0x80; | 91 | regs[R_EP4] &= ~0x80; |
84 | regs[R_EP4] |= map->fm_rfn << 7; | 92 | regs[R_EP4] |= map->fm_rfn << 7; |
@@ -95,6 +103,9 @@ static int tda18271_channel_configuration(struct dvb_frontend *fe, | |||
95 | /* disable Power Level Indicator */ | 103 | /* disable Power Level Indicator */ |
96 | regs[R_EP1] |= 0x40; | 104 | regs[R_EP1] |= 0x40; |
97 | 105 | ||
106 | /* make sure thermometer is off */ | ||
107 | regs[R_TM] &= ~0x10; | ||
108 | |||
98 | /* frequency dependent parameters */ | 109 | /* frequency dependent parameters */ |
99 | 110 | ||
100 | tda18271_calc_ir_measure(fe, &freq); | 111 | tda18271_calc_ir_measure(fe, &freq); |
@@ -135,6 +146,7 @@ static int tda18271_channel_configuration(struct dvb_frontend *fe, | |||
135 | switch (priv->role) { | 146 | switch (priv->role) { |
136 | case TDA18271_MASTER: | 147 | case TDA18271_MASTER: |
137 | tda18271_calc_main_pll(fe, N); | 148 | tda18271_calc_main_pll(fe, N); |
149 | tda18271_set_if_notch(fe); | ||
138 | tda18271_write_regs(fe, R_MPD, 4); | 150 | tda18271_write_regs(fe, R_MPD, 4); |
139 | break; | 151 | break; |
140 | case TDA18271_SLAVE: | 152 | case TDA18271_SLAVE: |
@@ -142,6 +154,7 @@ static int tda18271_channel_configuration(struct dvb_frontend *fe, | |||
142 | tda18271_write_regs(fe, R_CPD, 4); | 154 | tda18271_write_regs(fe, R_CPD, 4); |
143 | 155 | ||
144 | regs[R_MPD] = regs[R_CPD] & 0x7f; | 156 | regs[R_MPD] = regs[R_CPD] & 0x7f; |
157 | tda18271_set_if_notch(fe); | ||
145 | tda18271_write_regs(fe, R_MPD, 1); | 158 | tda18271_write_regs(fe, R_MPD, 1); |
146 | break; | 159 | break; |
147 | } | 160 | } |
@@ -160,12 +173,14 @@ static int tda18271_channel_configuration(struct dvb_frontend *fe, | |||
160 | 173 | ||
161 | msleep(20); | 174 | msleep(20); |
162 | 175 | ||
163 | /* set rfagc to normal speed mode */ | 176 | if (priv->id == TDA18271HDC2) { |
164 | if (map->fm_rfn) | 177 | /* set rfagc to normal speed mode */ |
165 | regs[R_EP3] &= ~0x04; | 178 | if (map->fm_rfn) |
166 | else | 179 | regs[R_EP3] &= ~0x04; |
167 | regs[R_EP3] |= 0x04; | 180 | else |
168 | ret = tda18271_write_regs(fe, R_EP3, 1); | 181 | regs[R_EP3] |= 0x04; |
182 | ret = tda18271_write_regs(fe, R_EP3, 1); | ||
183 | } | ||
169 | fail: | 184 | fail: |
170 | return ret; | 185 | return ret; |
171 | } | 186 | } |
@@ -507,7 +522,7 @@ static int tda18271_powerscan_init(struct dvb_frontend *fe) | |||
507 | /* set cal mode to normal */ | 522 | /* set cal mode to normal */ |
508 | regs[R_EP4] &= ~0x03; | 523 | regs[R_EP4] &= ~0x03; |
509 | 524 | ||
510 | /* update IF output level & IF notch frequency */ | 525 | /* update IF output level */ |
511 | regs[R_EP4] &= ~0x1c; /* clear if level bits */ | 526 | regs[R_EP4] &= ~0x1c; /* clear if level bits */ |
512 | 527 | ||
513 | ret = tda18271_write_regs(fe, R_EP3, 2); | 528 | ret = tda18271_write_regs(fe, R_EP3, 2); |
diff --git a/drivers/media/common/tuners/xc5000.c b/drivers/media/common/tuners/xc5000.c index ceae6db901ec..7cf4f5bdb2ec 100644 --- a/drivers/media/common/tuners/xc5000.c +++ b/drivers/media/common/tuners/xc5000.c | |||
@@ -177,6 +177,7 @@ static XC_TV_STANDARD XC5000_Standard[MAX_TV_STANDARD] = { | |||
177 | {"FM Radio-INPUT1", 0x0208, 0x9002} | 177 | {"FM Radio-INPUT1", 0x0208, 0x9002} |
178 | }; | 178 | }; |
179 | 179 | ||
180 | static int xc5000_is_firmware_loaded(struct dvb_frontend *fe); | ||
180 | static int xc5000_writeregs(struct xc5000_priv *priv, u8 *buf, u8 len); | 181 | static int xc5000_writeregs(struct xc5000_priv *priv, u8 *buf, u8 len); |
181 | static int xc5000_readregs(struct xc5000_priv *priv, u8 *buf, u8 len); | 182 | static int xc5000_readregs(struct xc5000_priv *priv, u8 *buf, u8 len); |
182 | static void xc5000_TunerReset(struct dvb_frontend *fe); | 183 | static void xc5000_TunerReset(struct dvb_frontend *fe); |
@@ -352,7 +353,7 @@ static int xc_SetTVStandard(struct xc5000_priv *priv, | |||
352 | 353 | ||
353 | static int xc_shutdown(struct xc5000_priv *priv) | 354 | static int xc_shutdown(struct xc5000_priv *priv) |
354 | { | 355 | { |
355 | return 0; | 356 | return XC_RESULT_SUCCESS; |
356 | /* Fixme: cannot bring tuner back alive once shutdown | 357 | /* Fixme: cannot bring tuner back alive once shutdown |
357 | * without reloading the driver modules. | 358 | * without reloading the driver modules. |
358 | * return xc_write_reg(priv, XREG_POWER_DOWN, 0); | 359 | * return xc_write_reg(priv, XREG_POWER_DOWN, 0); |
@@ -685,6 +686,25 @@ static int xc5000_set_params(struct dvb_frontend *fe, | |||
685 | return 0; | 686 | return 0; |
686 | } | 687 | } |
687 | 688 | ||
689 | static int xc5000_is_firmware_loaded(struct dvb_frontend *fe) | ||
690 | { | ||
691 | struct xc5000_priv *priv = fe->tuner_priv; | ||
692 | int ret; | ||
693 | u16 id; | ||
694 | |||
695 | ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id); | ||
696 | if (ret == XC_RESULT_SUCCESS) { | ||
697 | if (id == XC_PRODUCT_ID_FW_NOT_LOADED) | ||
698 | ret = XC_RESULT_RESET_FAILURE; | ||
699 | else | ||
700 | ret = XC_RESULT_SUCCESS; | ||
701 | } | ||
702 | |||
703 | dprintk(1, "%s() returns %s id = 0x%x\n", __func__, | ||
704 | ret == XC_RESULT_SUCCESS ? "True" : "False", id); | ||
705 | return ret; | ||
706 | } | ||
707 | |||
688 | static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe); | 708 | static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe); |
689 | 709 | ||
690 | static int xc5000_set_analog_params(struct dvb_frontend *fe, | 710 | static int xc5000_set_analog_params(struct dvb_frontend *fe, |
@@ -693,7 +713,7 @@ static int xc5000_set_analog_params(struct dvb_frontend *fe, | |||
693 | struct xc5000_priv *priv = fe->tuner_priv; | 713 | struct xc5000_priv *priv = fe->tuner_priv; |
694 | int ret; | 714 | int ret; |
695 | 715 | ||
696 | if(priv->fwloaded == 0) | 716 | if (xc5000_is_firmware_loaded(fe) != XC_RESULT_SUCCESS) |
697 | xc_load_fw_and_init_tuner(fe); | 717 | xc_load_fw_and_init_tuner(fe); |
698 | 718 | ||
699 | dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", | 719 | dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", |
@@ -808,11 +828,10 @@ static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe) | |||
808 | struct xc5000_priv *priv = fe->tuner_priv; | 828 | struct xc5000_priv *priv = fe->tuner_priv; |
809 | int ret = 0; | 829 | int ret = 0; |
810 | 830 | ||
811 | if (priv->fwloaded == 0) { | 831 | if (xc5000_is_firmware_loaded(fe) != XC_RESULT_SUCCESS) { |
812 | ret = xc5000_fwupload(fe); | 832 | ret = xc5000_fwupload(fe); |
813 | if (ret != XC_RESULT_SUCCESS) | 833 | if (ret != XC_RESULT_SUCCESS) |
814 | return ret; | 834 | return ret; |
815 | priv->fwloaded = 1; | ||
816 | } | 835 | } |
817 | 836 | ||
818 | /* Start the tuner self-calibration process */ | 837 | /* Start the tuner self-calibration process */ |
@@ -852,7 +871,6 @@ static int xc5000_sleep(struct dvb_frontend *fe) | |||
852 | return -EREMOTEIO; | 871 | return -EREMOTEIO; |
853 | } | 872 | } |
854 | else { | 873 | else { |
855 | /* priv->fwloaded = 0; */ | ||
856 | return XC_RESULT_SUCCESS; | 874 | return XC_RESULT_SUCCESS; |
857 | } | 875 | } |
858 | } | 876 | } |
@@ -933,7 +951,6 @@ struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe, | |||
933 | cfg->i2c_address); | 951 | cfg->i2c_address); |
934 | printk(KERN_INFO | 952 | printk(KERN_INFO |
935 | "xc5000: Firmware has been loaded previously\n"); | 953 | "xc5000: Firmware has been loaded previously\n"); |
936 | priv->fwloaded = 1; | ||
937 | break; | 954 | break; |
938 | case XC_PRODUCT_ID_FW_NOT_LOADED: | 955 | case XC_PRODUCT_ID_FW_NOT_LOADED: |
939 | printk(KERN_INFO | 956 | printk(KERN_INFO |
@@ -941,7 +958,6 @@ struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe, | |||
941 | cfg->i2c_address); | 958 | cfg->i2c_address); |
942 | printk(KERN_INFO | 959 | printk(KERN_INFO |
943 | "xc5000: Firmware has not been loaded previously\n"); | 960 | "xc5000: Firmware has not been loaded previously\n"); |
944 | priv->fwloaded = 0; | ||
945 | break; | 961 | break; |
946 | default: | 962 | default: |
947 | printk(KERN_ERR | 963 | printk(KERN_ERR |
diff --git a/drivers/media/common/tuners/xc5000_priv.h b/drivers/media/common/tuners/xc5000_priv.h index ecebfe4745ad..a72a9887fe7f 100644 --- a/drivers/media/common/tuners/xc5000_priv.h +++ b/drivers/media/common/tuners/xc5000_priv.h | |||
@@ -30,7 +30,6 @@ struct xc5000_priv { | |||
30 | u32 bandwidth; | 30 | u32 bandwidth; |
31 | u8 video_standard; | 31 | u8 video_standard; |
32 | u8 rf_mode; | 32 | u8 rf_mode; |
33 | u8 fwloaded; | ||
34 | 33 | ||
35 | void *devptr; | 34 | void *devptr; |
36 | }; | 35 | }; |
diff --git a/drivers/media/dvb/dvb-usb/gl861.c b/drivers/media/dvb/dvb-usb/gl861.c index 0a8ac64a4e33..037f7ffb47b2 100644 --- a/drivers/media/dvb/dvb-usb/gl861.c +++ b/drivers/media/dvb/dvb-usb/gl861.c | |||
@@ -47,6 +47,8 @@ static int gl861_i2c_msg(struct dvb_usb_device *d, u8 addr, | |||
47 | return -EINVAL; | 47 | return -EINVAL; |
48 | } | 48 | } |
49 | 49 | ||
50 | msleep(1); /* avoid I2C errors */ | ||
51 | |||
50 | return usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0), req, type, | 52 | return usb_control_msg(d->udev, usb_rcvctrlpipe(d->udev, 0), req, type, |
51 | value, index, rbuf, rlen, 2000); | 53 | value, index, rbuf, rlen, 2000); |
52 | } | 54 | } |
@@ -92,16 +94,6 @@ static struct i2c_algorithm gl861_i2c_algo = { | |||
92 | }; | 94 | }; |
93 | 95 | ||
94 | /* Callbacks for DVB USB */ | 96 | /* Callbacks for DVB USB */ |
95 | static int gl861_identify_state(struct usb_device *udev, | ||
96 | struct dvb_usb_device_properties *props, | ||
97 | struct dvb_usb_device_description **desc, | ||
98 | int *cold) | ||
99 | { | ||
100 | *cold = 0; | ||
101 | |||
102 | return 0; | ||
103 | } | ||
104 | |||
105 | static struct zl10353_config gl861_zl10353_config = { | 97 | static struct zl10353_config gl861_zl10353_config = { |
106 | .demod_address = 0x0f, | 98 | .demod_address = 0x0f, |
107 | .no_tuner = 1, | 99 | .no_tuner = 1, |
@@ -172,7 +164,6 @@ static struct dvb_usb_device_properties gl861_properties = { | |||
172 | 164 | ||
173 | .size_of_priv = 0, | 165 | .size_of_priv = 0, |
174 | 166 | ||
175 | .identify_state = gl861_identify_state, | ||
176 | .num_adapters = 1, | 167 | .num_adapters = 1, |
177 | .adapter = {{ | 168 | .adapter = {{ |
178 | 169 | ||
@@ -194,13 +185,15 @@ static struct dvb_usb_device_properties gl861_properties = { | |||
194 | 185 | ||
195 | .num_device_descs = 2, | 186 | .num_device_descs = 2, |
196 | .devices = { | 187 | .devices = { |
197 | { "MSI Mega Sky 55801 DVB-T USB2.0", | 188 | { |
198 | { &gl861_table[0], NULL }, | 189 | .name = "MSI Mega Sky 55801 DVB-T USB2.0", |
199 | { NULL }, | 190 | .cold_ids = { NULL }, |
191 | .warm_ids = { &gl861_table[0], NULL }, | ||
200 | }, | 192 | }, |
201 | { "A-LINK DTU DVB-T USB2.0", | 193 | { |
202 | { &gl861_table[1], NULL }, | 194 | .name = "A-LINK DTU DVB-T USB2.0", |
203 | { NULL }, | 195 | .cold_ids = { NULL }, |
196 | .warm_ids = { &gl861_table[1], NULL }, | ||
204 | }, | 197 | }, |
205 | } | 198 | } |
206 | }; | 199 | }; |
diff --git a/drivers/media/dvb/dvb-usb/umt-010.c b/drivers/media/dvb/dvb-usb/umt-010.c index 9e7653bb3b66..118aab1a3e54 100644 --- a/drivers/media/dvb/dvb-usb/umt-010.c +++ b/drivers/media/dvb/dvb-usb/umt-010.c | |||
@@ -107,7 +107,7 @@ static struct dvb_usb_device_properties umt_properties = { | |||
107 | /* parameter for the MPEG2-data transfer */ | 107 | /* parameter for the MPEG2-data transfer */ |
108 | .stream = { | 108 | .stream = { |
109 | .type = USB_BULK, | 109 | .type = USB_BULK, |
110 | .count = 20, | 110 | .count = MAX_NO_URBS_FOR_DATA_STREAM, |
111 | .endpoint = 0x06, | 111 | .endpoint = 0x06, |
112 | .u = { | 112 | .u = { |
113 | .bulk = { | 113 | .bulk = { |
diff --git a/drivers/media/dvb/frontends/au8522.c b/drivers/media/dvb/frontends/au8522.c index 084a280c2d7f..03900d241a76 100644 --- a/drivers/media/dvb/frontends/au8522.c +++ b/drivers/media/dvb/frontends/au8522.c | |||
@@ -463,10 +463,13 @@ static int au8522_set_frontend(struct dvb_frontend *fe, | |||
463 | struct dvb_frontend_parameters *p) | 463 | struct dvb_frontend_parameters *p) |
464 | { | 464 | { |
465 | struct au8522_state *state = fe->demodulator_priv; | 465 | struct au8522_state *state = fe->demodulator_priv; |
466 | int ret = -EINVAL; | ||
466 | 467 | ||
467 | dprintk("%s(frequency=%d)\n", __func__, p->frequency); | 468 | dprintk("%s(frequency=%d)\n", __func__, p->frequency); |
468 | 469 | ||
469 | state->current_frequency = p->frequency; | 470 | if ((state->current_frequency == p->frequency) && |
471 | (state->current_modulation == p->u.vsb.modulation)) | ||
472 | return 0; | ||
470 | 473 | ||
471 | au8522_enable_modulation(fe, p->u.vsb.modulation); | 474 | au8522_enable_modulation(fe, p->u.vsb.modulation); |
472 | 475 | ||
@@ -476,11 +479,16 @@ static int au8522_set_frontend(struct dvb_frontend *fe, | |||
476 | if (fe->ops.tuner_ops.set_params) { | 479 | if (fe->ops.tuner_ops.set_params) { |
477 | if (fe->ops.i2c_gate_ctrl) | 480 | if (fe->ops.i2c_gate_ctrl) |
478 | fe->ops.i2c_gate_ctrl(fe, 1); | 481 | fe->ops.i2c_gate_ctrl(fe, 1); |
479 | fe->ops.tuner_ops.set_params(fe, p); | 482 | ret = fe->ops.tuner_ops.set_params(fe, p); |
480 | if (fe->ops.i2c_gate_ctrl) | 483 | if (fe->ops.i2c_gate_ctrl) |
481 | fe->ops.i2c_gate_ctrl(fe, 0); | 484 | fe->ops.i2c_gate_ctrl(fe, 0); |
482 | } | 485 | } |
483 | 486 | ||
487 | if (ret < 0) | ||
488 | return ret; | ||
489 | |||
490 | state->current_frequency = p->frequency; | ||
491 | |||
484 | return 0; | 492 | return 0; |
485 | } | 493 | } |
486 | 494 | ||
@@ -498,6 +506,16 @@ static int au8522_init(struct dvb_frontend *fe) | |||
498 | return 0; | 506 | return 0; |
499 | } | 507 | } |
500 | 508 | ||
509 | static int au8522_sleep(struct dvb_frontend *fe) | ||
510 | { | ||
511 | struct au8522_state *state = fe->demodulator_priv; | ||
512 | dprintk("%s()\n", __func__); | ||
513 | |||
514 | state->current_frequency = 0; | ||
515 | |||
516 | return 0; | ||
517 | } | ||
518 | |||
501 | static int au8522_read_status(struct dvb_frontend *fe, fe_status_t *status) | 519 | static int au8522_read_status(struct dvb_frontend *fe, fe_status_t *status) |
502 | { | 520 | { |
503 | struct au8522_state *state = fe->demodulator_priv; | 521 | struct au8522_state *state = fe->demodulator_priv; |
@@ -509,10 +527,8 @@ static int au8522_read_status(struct dvb_frontend *fe, fe_status_t *status) | |||
509 | if (state->current_modulation == VSB_8) { | 527 | if (state->current_modulation == VSB_8) { |
510 | dprintk("%s() Checking VSB_8\n", __func__); | 528 | dprintk("%s() Checking VSB_8\n", __func__); |
511 | reg = au8522_readreg(state, 0x4088); | 529 | reg = au8522_readreg(state, 0x4088); |
512 | if (reg & 0x01) | 530 | if ((reg & 0x03) == 0x03) |
513 | *status |= FE_HAS_VITERBI; | 531 | *status |= FE_HAS_LOCK | FE_HAS_SYNC | FE_HAS_VITERBI; |
514 | if (reg & 0x02) | ||
515 | *status |= FE_HAS_LOCK | FE_HAS_SYNC; | ||
516 | } else { | 532 | } else { |
517 | dprintk("%s() Checking QAM\n", __func__); | 533 | dprintk("%s() Checking QAM\n", __func__); |
518 | reg = au8522_readreg(state, 0x4541); | 534 | reg = au8522_readreg(state, 0x4541); |
@@ -672,6 +688,7 @@ static struct dvb_frontend_ops au8522_ops = { | |||
672 | }, | 688 | }, |
673 | 689 | ||
674 | .init = au8522_init, | 690 | .init = au8522_init, |
691 | .sleep = au8522_sleep, | ||
675 | .i2c_gate_ctrl = au8522_i2c_gate_ctrl, | 692 | .i2c_gate_ctrl = au8522_i2c_gate_ctrl, |
676 | .set_frontend = au8522_set_frontend, | 693 | .set_frontend = au8522_set_frontend, |
677 | .get_frontend = au8522_get_frontend, | 694 | .get_frontend = au8522_get_frontend, |
diff --git a/drivers/media/dvb/frontends/stv0299.c b/drivers/media/dvb/frontends/stv0299.c index 17556183e871..35435bef8e79 100644 --- a/drivers/media/dvb/frontends/stv0299.c +++ b/drivers/media/dvb/frontends/stv0299.c | |||
@@ -63,6 +63,7 @@ struct stv0299_state { | |||
63 | u32 symbol_rate; | 63 | u32 symbol_rate; |
64 | fe_code_rate_t fec_inner; | 64 | fe_code_rate_t fec_inner; |
65 | int errmode; | 65 | int errmode; |
66 | u32 ucblocks; | ||
66 | }; | 67 | }; |
67 | 68 | ||
68 | #define STATUS_BER 0 | 69 | #define STATUS_BER 0 |
@@ -501,8 +502,10 @@ static int stv0299_read_ber(struct dvb_frontend* fe, u32* ber) | |||
501 | { | 502 | { |
502 | struct stv0299_state* state = fe->demodulator_priv; | 503 | struct stv0299_state* state = fe->demodulator_priv; |
503 | 504 | ||
504 | if (state->errmode != STATUS_BER) return 0; | 505 | if (state->errmode != STATUS_BER) |
505 | *ber = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e); | 506 | return -ENOSYS; |
507 | |||
508 | *ber = stv0299_readreg(state, 0x1e) | (stv0299_readreg(state, 0x1d) << 8); | ||
506 | 509 | ||
507 | return 0; | 510 | return 0; |
508 | } | 511 | } |
@@ -540,8 +543,12 @@ static int stv0299_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |||
540 | { | 543 | { |
541 | struct stv0299_state* state = fe->demodulator_priv; | 544 | struct stv0299_state* state = fe->demodulator_priv; |
542 | 545 | ||
543 | if (state->errmode != STATUS_UCBLOCKS) *ucblocks = 0; | 546 | if (state->errmode != STATUS_UCBLOCKS) |
544 | else *ucblocks = (stv0299_readreg (state, 0x1d) << 8) | stv0299_readreg (state, 0x1e); | 547 | return -ENOSYS; |
548 | |||
549 | state->ucblocks += stv0299_readreg(state, 0x1e); | ||
550 | state->ucblocks += (stv0299_readreg(state, 0x1d) << 8); | ||
551 | *ucblocks = state->ucblocks; | ||
545 | 552 | ||
546 | return 0; | 553 | return 0; |
547 | } | 554 | } |
diff --git a/drivers/media/dvb/frontends/tda10023.c b/drivers/media/dvb/frontends/tda10023.c index 0727b80bc4d2..c6ff5b82ff80 100644 --- a/drivers/media/dvb/frontends/tda10023.c +++ b/drivers/media/dvb/frontends/tda10023.c | |||
@@ -116,9 +116,12 @@ static u8 tda10023_readreg (struct tda10023_state* state, u8 reg) | |||
116 | int ret; | 116 | int ret; |
117 | 117 | ||
118 | ret = i2c_transfer (state->i2c, msg, 2); | 118 | ret = i2c_transfer (state->i2c, msg, 2); |
119 | if (ret != 2) | 119 | if (ret != 2) { |
120 | printk("DVB: TDA10023: %s: readreg error (ret == %i)\n", | 120 | int num = state->frontend.dvb ? state->frontend.dvb->num : -1; |
121 | __func__, ret); | 121 | printk(KERN_ERR "DVB: TDA10023(%d): %s: readreg error " |
122 | "(reg == 0x%02x, ret == %i)\n", | ||
123 | num, __func__, reg, ret); | ||
124 | } | ||
122 | return b1[0]; | 125 | return b1[0]; |
123 | } | 126 | } |
124 | 127 | ||
@@ -129,11 +132,12 @@ static int tda10023_writereg (struct tda10023_state* state, u8 reg, u8 data) | |||
129 | int ret; | 132 | int ret; |
130 | 133 | ||
131 | ret = i2c_transfer (state->i2c, &msg, 1); | 134 | ret = i2c_transfer (state->i2c, &msg, 1); |
132 | if (ret != 1) | 135 | if (ret != 1) { |
133 | printk("DVB: TDA10023(%d): %s, writereg error " | 136 | int num = state->frontend.dvb ? state->frontend.dvb->num : -1; |
137 | printk(KERN_ERR "DVB: TDA10023(%d): %s, writereg error " | ||
134 | "(reg == 0x%02x, val == 0x%02x, ret == %i)\n", | 138 | "(reg == 0x%02x, val == 0x%02x, ret == %i)\n", |
135 | state->frontend.dvb->num, __func__, reg, data, ret); | 139 | num, __func__, reg, data, ret); |
136 | 140 | } | |
137 | return (ret != 1) ? -EREMOTEIO : 0; | 141 | return (ret != 1) ? -EREMOTEIO : 0; |
138 | } | 142 | } |
139 | 143 | ||
@@ -464,7 +468,7 @@ struct dvb_frontend* tda10023_attach(const struct tda1002x_config* config, | |||
464 | int i; | 468 | int i; |
465 | 469 | ||
466 | /* allocate memory for the internal state */ | 470 | /* allocate memory for the internal state */ |
467 | state = kmalloc(sizeof(struct tda10023_state), GFP_KERNEL); | 471 | state = kzalloc(sizeof(struct tda10023_state), GFP_KERNEL); |
468 | if (state == NULL) goto error; | 472 | if (state == NULL) goto error; |
469 | 473 | ||
470 | /* setup the state */ | 474 | /* setup the state */ |
diff --git a/drivers/media/dvb/frontends/tda1004x.c b/drivers/media/dvb/frontends/tda1004x.c index 49973846373e..a0d638653567 100644 --- a/drivers/media/dvb/frontends/tda1004x.c +++ b/drivers/media/dvb/frontends/tda1004x.c | |||
@@ -1248,11 +1248,14 @@ struct dvb_frontend* tda10045_attach(const struct tda1004x_config* config, | |||
1248 | struct i2c_adapter* i2c) | 1248 | struct i2c_adapter* i2c) |
1249 | { | 1249 | { |
1250 | struct tda1004x_state *state; | 1250 | struct tda1004x_state *state; |
1251 | int id; | ||
1251 | 1252 | ||
1252 | /* allocate memory for the internal state */ | 1253 | /* allocate memory for the internal state */ |
1253 | state = kmalloc(sizeof(struct tda1004x_state), GFP_KERNEL); | 1254 | state = kmalloc(sizeof(struct tda1004x_state), GFP_KERNEL); |
1254 | if (!state) | 1255 | if (!state) { |
1256 | printk(KERN_ERR "Can't alocate memory for tda10045 state\n"); | ||
1255 | return NULL; | 1257 | return NULL; |
1258 | } | ||
1256 | 1259 | ||
1257 | /* setup the state */ | 1260 | /* setup the state */ |
1258 | state->config = config; | 1261 | state->config = config; |
@@ -1260,7 +1263,15 @@ struct dvb_frontend* tda10045_attach(const struct tda1004x_config* config, | |||
1260 | state->demod_type = TDA1004X_DEMOD_TDA10045; | 1263 | state->demod_type = TDA1004X_DEMOD_TDA10045; |
1261 | 1264 | ||
1262 | /* check if the demod is there */ | 1265 | /* check if the demod is there */ |
1263 | if (tda1004x_read_byte(state, TDA1004X_CHIPID) != 0x25) { | 1266 | id = tda1004x_read_byte(state, TDA1004X_CHIPID); |
1267 | if (id < 0) { | ||
1268 | printk(KERN_ERR "tda10045: chip is not answering. Giving up.\n"); | ||
1269 | kfree(state); | ||
1270 | return NULL; | ||
1271 | } | ||
1272 | |||
1273 | if (id != 0x25) { | ||
1274 | printk(KERN_ERR "Invalid tda1004x ID = 0x%02x. Can't proceed\n", id); | ||
1264 | kfree(state); | 1275 | kfree(state); |
1265 | return NULL; | 1276 | return NULL; |
1266 | } | 1277 | } |
@@ -1307,11 +1318,14 @@ struct dvb_frontend* tda10046_attach(const struct tda1004x_config* config, | |||
1307 | struct i2c_adapter* i2c) | 1318 | struct i2c_adapter* i2c) |
1308 | { | 1319 | { |
1309 | struct tda1004x_state *state; | 1320 | struct tda1004x_state *state; |
1321 | int id; | ||
1310 | 1322 | ||
1311 | /* allocate memory for the internal state */ | 1323 | /* allocate memory for the internal state */ |
1312 | state = kmalloc(sizeof(struct tda1004x_state), GFP_KERNEL); | 1324 | state = kmalloc(sizeof(struct tda1004x_state), GFP_KERNEL); |
1313 | if (!state) | 1325 | if (!state) { |
1326 | printk(KERN_ERR "Can't alocate memory for tda10046 state\n"); | ||
1314 | return NULL; | 1327 | return NULL; |
1328 | } | ||
1315 | 1329 | ||
1316 | /* setup the state */ | 1330 | /* setup the state */ |
1317 | state->config = config; | 1331 | state->config = config; |
@@ -1319,7 +1333,14 @@ struct dvb_frontend* tda10046_attach(const struct tda1004x_config* config, | |||
1319 | state->demod_type = TDA1004X_DEMOD_TDA10046; | 1333 | state->demod_type = TDA1004X_DEMOD_TDA10046; |
1320 | 1334 | ||
1321 | /* check if the demod is there */ | 1335 | /* check if the demod is there */ |
1322 | if (tda1004x_read_byte(state, TDA1004X_CHIPID) != 0x46) { | 1336 | id = tda1004x_read_byte(state, TDA1004X_CHIPID); |
1337 | if (id < 0) { | ||
1338 | printk(KERN_ERR "tda10046: chip is not answering. Giving up.\n"); | ||
1339 | kfree(state); | ||
1340 | return NULL; | ||
1341 | } | ||
1342 | if (id != 0x46) { | ||
1343 | printk(KERN_ERR "Invalid tda1004x ID = 0x%02x. Can't proceed\n", id); | ||
1323 | kfree(state); | 1344 | kfree(state); |
1324 | return NULL; | 1345 | return NULL; |
1325 | } | 1346 | } |
diff --git a/drivers/media/dvb/ttpci/Kconfig b/drivers/media/dvb/ttpci/Kconfig index d4339b1b3b68..07643e010093 100644 --- a/drivers/media/dvb/ttpci/Kconfig +++ b/drivers/media/dvb/ttpci/Kconfig | |||
@@ -101,6 +101,7 @@ config DVB_BUDGET | |||
101 | config DVB_BUDGET_CI | 101 | config DVB_BUDGET_CI |
102 | tristate "Budget cards with onboard CI connector" | 102 | tristate "Budget cards with onboard CI connector" |
103 | depends on DVB_BUDGET_CORE && I2C | 103 | depends on DVB_BUDGET_CORE && I2C |
104 | depends on INPUT # due to IR | ||
104 | select DVB_STV0297 if !DVB_FE_CUSTOMISE | 105 | select DVB_STV0297 if !DVB_FE_CUSTOMISE |
105 | select DVB_STV0299 if !DVB_FE_CUSTOMISE | 106 | select DVB_STV0299 if !DVB_FE_CUSTOMISE |
106 | select DVB_TDA1004X if !DVB_FE_CUSTOMISE | 107 | select DVB_TDA1004X if !DVB_FE_CUSTOMISE |
diff --git a/drivers/media/dvb/ttpci/av7110_hw.c b/drivers/media/dvb/ttpci/av7110_hw.c index 9d81074b31df..3a3f5279e927 100644 --- a/drivers/media/dvb/ttpci/av7110_hw.c +++ b/drivers/media/dvb/ttpci/av7110_hw.c | |||
@@ -427,6 +427,7 @@ static int __av7110_send_fw_cmd(struct av7110 *av7110, u16* buf, int length) | |||
427 | if (err) { | 427 | if (err) { |
428 | printk(KERN_ERR "%s: timeout waiting on busy %s QUEUE\n", | 428 | printk(KERN_ERR "%s: timeout waiting on busy %s QUEUE\n", |
429 | __func__, type); | 429 | __func__, type); |
430 | av7110->arm_errors++; | ||
430 | return -ETIMEDOUT; | 431 | return -ETIMEDOUT; |
431 | } | 432 | } |
432 | msleep(1); | 433 | msleep(1); |
@@ -853,10 +854,8 @@ static osd_raw_window_t bpp2bit[8] = { | |||
853 | 854 | ||
854 | static inline int WaitUntilBmpLoaded(struct av7110 *av7110) | 855 | static inline int WaitUntilBmpLoaded(struct av7110 *av7110) |
855 | { | 856 | { |
856 | int ret = wait_event_interruptible_timeout(av7110->bmpq, | 857 | int ret = wait_event_timeout(av7110->bmpq, |
857 | av7110->bmp_state != BMP_LOADING, 10*HZ); | 858 | av7110->bmp_state != BMP_LOADING, 10*HZ); |
858 | if (ret == -ERESTARTSYS) | ||
859 | return ret; | ||
860 | if (ret == 0) { | 859 | if (ret == 0) { |
861 | printk("dvb-ttpci: warning: timeout waiting in LoadBitmap: %d, %d\n", | 860 | printk("dvb-ttpci: warning: timeout waiting in LoadBitmap: %d, %d\n", |
862 | ret, av7110->bmp_state); | 861 | ret, av7110->bmp_state); |
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig index 3b26fbd3e558..5ccb0aeca8cc 100644 --- a/drivers/media/video/Kconfig +++ b/drivers/media/video/Kconfig | |||
@@ -793,6 +793,14 @@ menuconfig V4L_USB_DRIVERS | |||
793 | 793 | ||
794 | if V4L_USB_DRIVERS && USB | 794 | if V4L_USB_DRIVERS && USB |
795 | 795 | ||
796 | config USB_VIDEO_CLASS | ||
797 | tristate "USB Video Class (UVC)" | ||
798 | ---help--- | ||
799 | Support for the USB Video Class (UVC). Currently only video | ||
800 | input devices, such as webcams, are supported. | ||
801 | |||
802 | For more information see: <http://linux-uvc.berlios.de/> | ||
803 | |||
796 | source "drivers/media/video/pvrusb2/Kconfig" | 804 | source "drivers/media/video/pvrusb2/Kconfig" |
797 | 805 | ||
798 | source "drivers/media/video/em28xx/Kconfig" | 806 | source "drivers/media/video/em28xx/Kconfig" |
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile index dff0d6abe917..ecbbfaab24d5 100644 --- a/drivers/media/video/Makefile +++ b/drivers/media/video/Makefile | |||
@@ -136,6 +136,8 @@ obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o | |||
136 | 136 | ||
137 | obj-$(CONFIG_VIDEO_AU0828) += au0828/ | 137 | obj-$(CONFIG_VIDEO_AU0828) += au0828/ |
138 | 138 | ||
139 | obj-$(CONFIG_USB_VIDEO_CLASS) += uvc/ | ||
140 | |||
139 | EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core | 141 | EXTRA_CFLAGS += -Idrivers/media/dvb/dvb-core |
140 | EXTRA_CFLAGS += -Idrivers/media/dvb/frontends | 142 | EXTRA_CFLAGS += -Idrivers/media/dvb/frontends |
141 | EXTRA_CFLAGS += -Idrivers/media/common/tuners | 143 | EXTRA_CFLAGS += -Idrivers/media/common/tuners |
diff --git a/drivers/media/video/au0828/au0828-cards.c b/drivers/media/video/au0828/au0828-cards.c index a2a6983444fa..898e12395e7c 100644 --- a/drivers/media/video/au0828/au0828-cards.c +++ b/drivers/media/video/au0828/au0828-cards.c | |||
@@ -77,8 +77,14 @@ static void hauppauge_eeprom(struct au0828_dev *dev, u8 *eeprom_data) | |||
77 | 77 | ||
78 | /* Make sure we support the board model */ | 78 | /* Make sure we support the board model */ |
79 | switch (tv.model) { | 79 | switch (tv.model) { |
80 | case 72000: /* WinTV-HVR950q (Retail, IR, ATSC/QAM */ | ||
80 | case 72001: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and basic analog video */ | 81 | case 72001: /* WinTV-HVR950q (Retail, IR, ATSC/QAM and basic analog video */ |
82 | case 72211: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and basic analog video */ | ||
83 | case 72221: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and basic analog video */ | ||
84 | case 72231: /* WinTV-HVR950q (OEM, IR, ATSC/QAM and basic analog video */ | ||
85 | case 72241: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM and basic analog video */ | ||
81 | case 72301: /* WinTV-HVR850 (Retail, IR, ATSC and basic analog video */ | 86 | case 72301: /* WinTV-HVR850 (Retail, IR, ATSC and basic analog video */ |
87 | case 72500: /* WinTV-HVR950q (OEM, No IR, ATSC/QAM */ | ||
82 | break; | 88 | break; |
83 | default: | 89 | default: |
84 | printk(KERN_WARNING "%s: warning: " | 90 | printk(KERN_WARNING "%s: warning: " |
@@ -175,6 +181,18 @@ struct usb_device_id au0828_usb_id_table [] = { | |||
175 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR850 }, | 181 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR850 }, |
176 | { USB_DEVICE(0x0fe9, 0xd620), | 182 | { USB_DEVICE(0x0fe9, 0xd620), |
177 | .driver_info = AU0828_BOARD_DVICO_FUSIONHDTV7 }, | 183 | .driver_info = AU0828_BOARD_DVICO_FUSIONHDTV7 }, |
184 | { USB_DEVICE(0x2040, 0x7210), | ||
185 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, | ||
186 | { USB_DEVICE(0x2040, 0x7217), | ||
187 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, | ||
188 | { USB_DEVICE(0x2040, 0x721b), | ||
189 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, | ||
190 | { USB_DEVICE(0x2040, 0x721f), | ||
191 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, | ||
192 | { USB_DEVICE(0x2040, 0x7280), | ||
193 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, | ||
194 | { USB_DEVICE(0x0fd9, 0x0008), | ||
195 | .driver_info = AU0828_BOARD_HAUPPAUGE_HVR950Q }, | ||
178 | { }, | 196 | { }, |
179 | }; | 197 | }; |
180 | 198 | ||
diff --git a/drivers/media/video/cx18/Kconfig b/drivers/media/video/cx18/Kconfig index 5f942690570c..9aefdc5ea79a 100644 --- a/drivers/media/video/cx18/Kconfig +++ b/drivers/media/video/cx18/Kconfig | |||
@@ -10,8 +10,8 @@ config VIDEO_CX18 | |||
10 | select VIDEO_TVEEPROM | 10 | select VIDEO_TVEEPROM |
11 | select VIDEO_CX2341X | 11 | select VIDEO_CX2341X |
12 | select VIDEO_CS5345 | 12 | select VIDEO_CS5345 |
13 | select DVB_S5H1409 | 13 | select DVB_S5H1409 if !DVB_FE_CUSTOMISE |
14 | select MEDIA_TUNER_MXL5005S | 14 | select MEDIA_TUNER_MXL5005S if !DVB_FE_CUSTOMISE |
15 | ---help--- | 15 | ---help--- |
16 | This is a video4linux driver for Conexant cx23418 based | 16 | This is a video4linux driver for Conexant cx23418 based |
17 | PCI combo video recorder devices. | 17 | PCI combo video recorder devices. |
diff --git a/drivers/media/video/cx18/cx18-av-core.c b/drivers/media/video/cx18/cx18-av-core.c index 9a26751615c6..faca43eb940f 100644 --- a/drivers/media/video/cx18/cx18-av-core.c +++ b/drivers/media/video/cx18/cx18-av-core.c | |||
@@ -69,6 +69,58 @@ int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 and_mask, | |||
69 | or_value); | 69 | or_value); |
70 | } | 70 | } |
71 | 71 | ||
72 | int cx18_av_write_no_acfg(struct cx18 *cx, u16 addr, u8 value, int no_acfg_mask) | ||
73 | { | ||
74 | int retval; | ||
75 | u32 saved_reg[8] = {0}; | ||
76 | |||
77 | if (no_acfg_mask & CXADEC_NO_ACFG_AFE) { | ||
78 | saved_reg[0] = cx18_av_read4(cx, CXADEC_CHIP_CTRL); | ||
79 | saved_reg[1] = cx18_av_read4(cx, CXADEC_AFE_CTRL); | ||
80 | } | ||
81 | |||
82 | if (no_acfg_mask & CXADEC_NO_ACFG_PLL) { | ||
83 | saved_reg[2] = cx18_av_read4(cx, CXADEC_PLL_CTRL1); | ||
84 | saved_reg[3] = cx18_av_read4(cx, CXADEC_VID_PLL_FRAC); | ||
85 | } | ||
86 | |||
87 | if (no_acfg_mask & CXADEC_NO_ACFG_VID) { | ||
88 | saved_reg[4] = cx18_av_read4(cx, CXADEC_HORIZ_TIM_CTRL); | ||
89 | saved_reg[5] = cx18_av_read4(cx, CXADEC_VERT_TIM_CTRL); | ||
90 | saved_reg[6] = cx18_av_read4(cx, CXADEC_SRC_COMB_CFG); | ||
91 | saved_reg[7] = cx18_av_read4(cx, CXADEC_CHROMA_VBIOFF_CFG); | ||
92 | } | ||
93 | |||
94 | retval = cx18_av_write(cx, addr, value); | ||
95 | |||
96 | if (no_acfg_mask & CXADEC_NO_ACFG_AFE) { | ||
97 | cx18_av_write4(cx, CXADEC_CHIP_CTRL, saved_reg[0]); | ||
98 | cx18_av_write4(cx, CXADEC_AFE_CTRL, saved_reg[1]); | ||
99 | } | ||
100 | |||
101 | if (no_acfg_mask & CXADEC_NO_ACFG_PLL) { | ||
102 | cx18_av_write4(cx, CXADEC_PLL_CTRL1, saved_reg[2]); | ||
103 | cx18_av_write4(cx, CXADEC_VID_PLL_FRAC, saved_reg[3]); | ||
104 | } | ||
105 | |||
106 | if (no_acfg_mask & CXADEC_NO_ACFG_VID) { | ||
107 | cx18_av_write4(cx, CXADEC_HORIZ_TIM_CTRL, saved_reg[4]); | ||
108 | cx18_av_write4(cx, CXADEC_VERT_TIM_CTRL, saved_reg[5]); | ||
109 | cx18_av_write4(cx, CXADEC_SRC_COMB_CFG, saved_reg[6]); | ||
110 | cx18_av_write4(cx, CXADEC_CHROMA_VBIOFF_CFG, saved_reg[7]); | ||
111 | } | ||
112 | |||
113 | return retval; | ||
114 | } | ||
115 | |||
116 | int cx18_av_and_or_no_acfg(struct cx18 *cx, u16 addr, unsigned and_mask, | ||
117 | u8 or_value, int no_acfg_mask) | ||
118 | { | ||
119 | return cx18_av_write_no_acfg(cx, addr, | ||
120 | (cx18_av_read(cx, addr) & and_mask) | | ||
121 | or_value, no_acfg_mask); | ||
122 | } | ||
123 | |||
72 | /* ----------------------------------------------------------------------- */ | 124 | /* ----------------------------------------------------------------------- */ |
73 | 125 | ||
74 | static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input, | 126 | static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input, |
@@ -170,13 +222,15 @@ static void input_change(struct cx18 *cx) | |||
170 | 222 | ||
171 | /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */ | 223 | /* Follow step 8c and 8d of section 3.16 in the cx18_av datasheet */ |
172 | if (std & V4L2_STD_SECAM) | 224 | if (std & V4L2_STD_SECAM) |
173 | cx18_av_write(cx, 0x402, 0); | 225 | cx18_av_write_no_acfg(cx, 0x402, 0, CXADEC_NO_ACFG_ALL); |
174 | else { | 226 | else { |
175 | cx18_av_write(cx, 0x402, 0x04); | 227 | cx18_av_write_no_acfg(cx, 0x402, 0x04, CXADEC_NO_ACFG_ALL); |
176 | cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11); | 228 | cx18_av_write(cx, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11); |
177 | } | 229 | } |
178 | cx18_av_and_or(cx, 0x401, ~0x60, 0); | 230 | cx18_av_and_or_no_acfg(cx, 0x401, ~0x60, 0, |
179 | cx18_av_and_or(cx, 0x401, ~0x60, 0x60); | 231 | CXADEC_NO_ACFG_PLL | CXADEC_NO_ACFG_VID); |
232 | cx18_av_and_or_no_acfg(cx, 0x401, ~0x60, 0x60, | ||
233 | CXADEC_NO_ACFG_PLL | CXADEC_NO_ACFG_VID); | ||
180 | 234 | ||
181 | if (std & V4L2_STD_525_60) { | 235 | if (std & V4L2_STD_525_60) { |
182 | if (std == V4L2_STD_NTSC_M_JP) { | 236 | if (std == V4L2_STD_NTSC_M_JP) { |
@@ -228,7 +282,7 @@ static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input, | |||
228 | 282 | ||
229 | if ((vid_input & ~0xff0) || | 283 | if ((vid_input & ~0xff0) || |
230 | luma < CX18_AV_SVIDEO_LUMA1 || | 284 | luma < CX18_AV_SVIDEO_LUMA1 || |
231 | luma > CX18_AV_SVIDEO_LUMA4 || | 285 | luma > CX18_AV_SVIDEO_LUMA8 || |
232 | chroma < CX18_AV_SVIDEO_CHROMA4 || | 286 | chroma < CX18_AV_SVIDEO_CHROMA4 || |
233 | chroma > CX18_AV_SVIDEO_CHROMA8) { | 287 | chroma > CX18_AV_SVIDEO_CHROMA8) { |
234 | CX18_ERR("0x%04x is not a valid video input!\n", | 288 | CX18_ERR("0x%04x is not a valid video input!\n", |
@@ -262,7 +316,8 @@ static int set_input(struct cx18 *cx, enum cx18_av_video_input vid_input, | |||
262 | 316 | ||
263 | cx18_av_write(cx, 0x103, reg); | 317 | cx18_av_write(cx, 0x103, reg); |
264 | /* Set INPUT_MODE to Composite (0) or S-Video (1) */ | 318 | /* Set INPUT_MODE to Composite (0) or S-Video (1) */ |
265 | cx18_av_and_or(cx, 0x401, ~0x6, is_composite ? 0 : 0x02); | 319 | cx18_av_and_or_no_acfg(cx, 0x401, ~0x6, is_composite ? 0 : 0x02, |
320 | CXADEC_NO_ACFG_PLL | CXADEC_NO_ACFG_VID); | ||
266 | /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */ | 321 | /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */ |
267 | cx18_av_and_or(cx, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0); | 322 | cx18_av_and_or(cx, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0); |
268 | /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */ | 323 | /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2 and CH3 */ |
@@ -318,12 +373,12 @@ static int set_v4lstd(struct cx18 *cx) | |||
318 | This happens for example with the Yuan MPC622. */ | 373 | This happens for example with the Yuan MPC622. */ |
319 | if (fmt >= 4 && fmt < 8) { | 374 | if (fmt >= 4 && fmt < 8) { |
320 | /* Set format to NTSC-M */ | 375 | /* Set format to NTSC-M */ |
321 | cx18_av_and_or(cx, 0x400, ~0xf, 1); | 376 | cx18_av_and_or_no_acfg(cx, 0x400, ~0xf, 1, CXADEC_NO_ACFG_AFE); |
322 | /* Turn off LCOMB */ | 377 | /* Turn off LCOMB */ |
323 | cx18_av_and_or(cx, 0x47b, ~6, 0); | 378 | cx18_av_and_or(cx, 0x47b, ~6, 0); |
324 | } | 379 | } |
325 | cx18_av_and_or(cx, 0x400, ~0xf, fmt); | 380 | cx18_av_and_or_no_acfg(cx, 0x400, ~0xf, fmt, CXADEC_NO_ACFG_AFE); |
326 | cx18_av_and_or(cx, 0x403, ~0x3, pal_m); | 381 | cx18_av_and_or_no_acfg(cx, 0x403, ~0x3, pal_m, CXADEC_NO_ACFG_ALL); |
327 | cx18_av_vbi_setup(cx); | 382 | cx18_av_vbi_setup(cx); |
328 | input_change(cx); | 383 | input_change(cx); |
329 | return 0; | 384 | return 0; |
diff --git a/drivers/media/video/cx18/cx18-av-core.h b/drivers/media/video/cx18/cx18-av-core.h index 786901d72e9a..c172823ce1d8 100644 --- a/drivers/media/video/cx18/cx18-av-core.h +++ b/drivers/media/video/cx18/cx18-av-core.h | |||
@@ -37,12 +37,16 @@ enum cx18_av_video_input { | |||
37 | CX18_AV_COMPOSITE7, | 37 | CX18_AV_COMPOSITE7, |
38 | CX18_AV_COMPOSITE8, | 38 | CX18_AV_COMPOSITE8, |
39 | 39 | ||
40 | /* S-Video inputs consist of one luma input (In1-In4) ORed with one | 40 | /* S-Video inputs consist of one luma input (In1-In8) ORed with one |
41 | chroma input (In5-In8) */ | 41 | chroma input (In5-In8) */ |
42 | CX18_AV_SVIDEO_LUMA1 = 0x10, | 42 | CX18_AV_SVIDEO_LUMA1 = 0x10, |
43 | CX18_AV_SVIDEO_LUMA2 = 0x20, | 43 | CX18_AV_SVIDEO_LUMA2 = 0x20, |
44 | CX18_AV_SVIDEO_LUMA3 = 0x30, | 44 | CX18_AV_SVIDEO_LUMA3 = 0x30, |
45 | CX18_AV_SVIDEO_LUMA4 = 0x40, | 45 | CX18_AV_SVIDEO_LUMA4 = 0x40, |
46 | CX18_AV_SVIDEO_LUMA5 = 0x50, | ||
47 | CX18_AV_SVIDEO_LUMA6 = 0x60, | ||
48 | CX18_AV_SVIDEO_LUMA7 = 0x70, | ||
49 | CX18_AV_SVIDEO_LUMA8 = 0x80, | ||
46 | CX18_AV_SVIDEO_CHROMA4 = 0x400, | 50 | CX18_AV_SVIDEO_CHROMA4 = 0x400, |
47 | CX18_AV_SVIDEO_CHROMA5 = 0x500, | 51 | CX18_AV_SVIDEO_CHROMA5 = 0x500, |
48 | CX18_AV_SVIDEO_CHROMA6 = 0x600, | 52 | CX18_AV_SVIDEO_CHROMA6 = 0x600, |
@@ -291,14 +295,24 @@ struct cx18_av_state { | |||
291 | #define CXADEC_SELECT_AUDIO_STANDARD_FM 0xF9 /* FM radio */ | 295 | #define CXADEC_SELECT_AUDIO_STANDARD_FM 0xF9 /* FM radio */ |
292 | #define CXADEC_SELECT_AUDIO_STANDARD_AUTO 0xFF /* Auto detect */ | 296 | #define CXADEC_SELECT_AUDIO_STANDARD_AUTO 0xFF /* Auto detect */ |
293 | 297 | ||
298 | /* Flags on what to preserve on write to 0x400-0x403 with cx18_av_.*_no_acfg()*/ | ||
299 | #define CXADEC_NO_ACFG_AFE 0x01 /* Preserve 0x100-0x107 */ | ||
300 | #define CXADEC_NO_ACFG_PLL 0x02 /* Preserve 0x108-0x10f */ | ||
301 | #define CXADEC_NO_ACFG_VID 0x04 /* Preserve 0x470-0x47f */ | ||
302 | #define CXADEC_NO_ACFG_ALL 0x07 | ||
303 | |||
294 | /* ----------------------------------------------------------------------- */ | 304 | /* ----------------------------------------------------------------------- */ |
295 | /* cx18_av-core.c */ | 305 | /* cx18_av-core.c */ |
296 | int cx18_av_write(struct cx18 *cx, u16 addr, u8 value); | 306 | int cx18_av_write(struct cx18 *cx, u16 addr, u8 value); |
297 | int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value); | 307 | int cx18_av_write4(struct cx18 *cx, u16 addr, u32 value); |
308 | int cx18_av_write_no_acfg(struct cx18 *cx, u16 addr, u8 value, | ||
309 | int no_acfg_mask); | ||
298 | u8 cx18_av_read(struct cx18 *cx, u16 addr); | 310 | u8 cx18_av_read(struct cx18 *cx, u16 addr); |
299 | u32 cx18_av_read4(struct cx18 *cx, u16 addr); | 311 | u32 cx18_av_read4(struct cx18 *cx, u16 addr); |
300 | int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned mask, u8 value); | 312 | int cx18_av_and_or(struct cx18 *cx, u16 addr, unsigned mask, u8 value); |
301 | int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 mask, u32 value); | 313 | int cx18_av_and_or4(struct cx18 *cx, u16 addr, u32 mask, u32 value); |
314 | int cx18_av_and_or_no_acfg(struct cx18 *cx, u16 addr, unsigned mask, u8 value, | ||
315 | int no_acfg_mask); | ||
302 | int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg); | 316 | int cx18_av_cmd(struct cx18 *cx, unsigned int cmd, void *arg); |
303 | 317 | ||
304 | /* ----------------------------------------------------------------------- */ | 318 | /* ----------------------------------------------------------------------- */ |
diff --git a/drivers/media/video/cx18/cx18-cards.c b/drivers/media/video/cx18/cx18-cards.c index baccd079243d..c26e0ef5b075 100644 --- a/drivers/media/video/cx18/cx18-cards.c +++ b/drivers/media/video/cx18/cx18-cards.c | |||
@@ -23,6 +23,7 @@ | |||
23 | 23 | ||
24 | #include "cx18-driver.h" | 24 | #include "cx18-driver.h" |
25 | #include "cx18-cards.h" | 25 | #include "cx18-cards.h" |
26 | #include "cx18-av-core.h" | ||
26 | #include "cx18-i2c.h" | 27 | #include "cx18-i2c.h" |
27 | #include <media/cs5345.h> | 28 | #include <media/cs5345.h> |
28 | 29 | ||
@@ -54,22 +55,22 @@ static const struct cx18_card cx18_card_hvr1600_esmt = { | |||
54 | .hw_all = CX18_HW_TVEEPROM | CX18_HW_TUNER | | 55 | .hw_all = CX18_HW_TVEEPROM | CX18_HW_TUNER | |
55 | CX18_HW_CS5345 | CX18_HW_DVB, | 56 | CX18_HW_CS5345 | CX18_HW_DVB, |
56 | .video_inputs = { | 57 | .video_inputs = { |
57 | { CX18_CARD_INPUT_VID_TUNER, 0, CX23418_COMPOSITE7 }, | 58 | { CX18_CARD_INPUT_VID_TUNER, 0, CX18_AV_COMPOSITE7 }, |
58 | { CX18_CARD_INPUT_SVIDEO1, 1, CX23418_SVIDEO1 }, | 59 | { CX18_CARD_INPUT_SVIDEO1, 1, CX18_AV_SVIDEO1 }, |
59 | { CX18_CARD_INPUT_COMPOSITE1, 1, CX23418_COMPOSITE3 }, | 60 | { CX18_CARD_INPUT_COMPOSITE1, 1, CX18_AV_COMPOSITE3 }, |
60 | { CX18_CARD_INPUT_SVIDEO2, 2, CX23418_SVIDEO2 }, | 61 | { CX18_CARD_INPUT_SVIDEO2, 2, CX18_AV_SVIDEO2 }, |
61 | { CX18_CARD_INPUT_COMPOSITE2, 2, CX23418_COMPOSITE4 }, | 62 | { CX18_CARD_INPUT_COMPOSITE2, 2, CX18_AV_COMPOSITE4 }, |
62 | }, | 63 | }, |
63 | .audio_inputs = { | 64 | .audio_inputs = { |
64 | { CX18_CARD_INPUT_AUD_TUNER, | 65 | { CX18_CARD_INPUT_AUD_TUNER, |
65 | CX23418_AUDIO8, CS5345_IN_1 | CS5345_MCLK_1_5 }, | 66 | CX18_AV_AUDIO8, CS5345_IN_1 | CS5345_MCLK_1_5 }, |
66 | { CX18_CARD_INPUT_LINE_IN1, | 67 | { CX18_CARD_INPUT_LINE_IN1, |
67 | CX23418_AUDIO_SERIAL, CS5345_IN_2 }, | 68 | CX18_AV_AUDIO_SERIAL, CS5345_IN_2 }, |
68 | { CX18_CARD_INPUT_LINE_IN2, | 69 | { CX18_CARD_INPUT_LINE_IN2, |
69 | CX23418_AUDIO_SERIAL, CS5345_IN_2 }, | 70 | CX18_AV_AUDIO_SERIAL, CS5345_IN_3 }, |
70 | }, | 71 | }, |
71 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, | 72 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, |
72 | CX23418_AUDIO_SERIAL, 0 }, | 73 | CX18_AV_AUDIO_SERIAL, CS5345_IN_4 }, |
73 | .ddr = { | 74 | .ddr = { |
74 | /* ESMT M13S128324A-5B memory */ | 75 | /* ESMT M13S128324A-5B memory */ |
75 | .chip_config = 0x003, | 76 | .chip_config = 0x003, |
@@ -81,6 +82,11 @@ static const struct cx18_card cx18_card_hvr1600_esmt = { | |||
81 | }, | 82 | }, |
82 | .gpio_init.initial_value = 0x3001, | 83 | .gpio_init.initial_value = 0x3001, |
83 | .gpio_init.direction = 0x3001, | 84 | .gpio_init.direction = 0x3001, |
85 | .gpio_i2c_slave_reset = { | ||
86 | .active_lo_mask = 0x3001, | ||
87 | .msecs_asserted = 10, | ||
88 | .msecs_recovery = 40, | ||
89 | }, | ||
84 | .i2c = &cx18_i2c_std, | 90 | .i2c = &cx18_i2c_std, |
85 | }; | 91 | }; |
86 | 92 | ||
@@ -94,22 +100,22 @@ static const struct cx18_card cx18_card_hvr1600_samsung = { | |||
94 | .hw_all = CX18_HW_TVEEPROM | CX18_HW_TUNER | | 100 | .hw_all = CX18_HW_TVEEPROM | CX18_HW_TUNER | |
95 | CX18_HW_CS5345 | CX18_HW_DVB, | 101 | CX18_HW_CS5345 | CX18_HW_DVB, |
96 | .video_inputs = { | 102 | .video_inputs = { |
97 | { CX18_CARD_INPUT_VID_TUNER, 0, CX23418_COMPOSITE7 }, | 103 | { CX18_CARD_INPUT_VID_TUNER, 0, CX18_AV_COMPOSITE7 }, |
98 | { CX18_CARD_INPUT_SVIDEO1, 1, CX23418_SVIDEO1 }, | 104 | { CX18_CARD_INPUT_SVIDEO1, 1, CX18_AV_SVIDEO1 }, |
99 | { CX18_CARD_INPUT_COMPOSITE1, 1, CX23418_COMPOSITE3 }, | 105 | { CX18_CARD_INPUT_COMPOSITE1, 1, CX18_AV_COMPOSITE3 }, |
100 | { CX18_CARD_INPUT_SVIDEO2, 2, CX23418_SVIDEO2 }, | 106 | { CX18_CARD_INPUT_SVIDEO2, 2, CX18_AV_SVIDEO2 }, |
101 | { CX18_CARD_INPUT_COMPOSITE2, 2, CX23418_COMPOSITE4 }, | 107 | { CX18_CARD_INPUT_COMPOSITE2, 2, CX18_AV_COMPOSITE4 }, |
102 | }, | 108 | }, |
103 | .audio_inputs = { | 109 | .audio_inputs = { |
104 | { CX18_CARD_INPUT_AUD_TUNER, | 110 | { CX18_CARD_INPUT_AUD_TUNER, |
105 | CX23418_AUDIO8, CS5345_IN_1 | CS5345_MCLK_1_5 }, | 111 | CX18_AV_AUDIO8, CS5345_IN_1 | CS5345_MCLK_1_5 }, |
106 | { CX18_CARD_INPUT_LINE_IN1, | 112 | { CX18_CARD_INPUT_LINE_IN1, |
107 | CX23418_AUDIO_SERIAL, CS5345_IN_2 }, | 113 | CX18_AV_AUDIO_SERIAL, CS5345_IN_2 }, |
108 | { CX18_CARD_INPUT_LINE_IN2, | 114 | { CX18_CARD_INPUT_LINE_IN2, |
109 | CX23418_AUDIO_SERIAL, CS5345_IN_2 }, | 115 | CX18_AV_AUDIO_SERIAL, CS5345_IN_3 }, |
110 | }, | 116 | }, |
111 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, | 117 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, |
112 | CX23418_AUDIO_SERIAL, 0 }, | 118 | CX18_AV_AUDIO_SERIAL, CS5345_IN_4 }, |
113 | .ddr = { | 119 | .ddr = { |
114 | /* Samsung K4D263238G-VC33 memory */ | 120 | /* Samsung K4D263238G-VC33 memory */ |
115 | .chip_config = 0x003, | 121 | .chip_config = 0x003, |
@@ -121,6 +127,11 @@ static const struct cx18_card cx18_card_hvr1600_samsung = { | |||
121 | }, | 127 | }, |
122 | .gpio_init.initial_value = 0x3001, | 128 | .gpio_init.initial_value = 0x3001, |
123 | .gpio_init.direction = 0x3001, | 129 | .gpio_init.direction = 0x3001, |
130 | .gpio_i2c_slave_reset = { | ||
131 | .active_lo_mask = 0x3001, | ||
132 | .msecs_asserted = 10, | ||
133 | .msecs_recovery = 40, | ||
134 | }, | ||
124 | .i2c = &cx18_i2c_std, | 135 | .i2c = &cx18_i2c_std, |
125 | }; | 136 | }; |
126 | 137 | ||
@@ -141,19 +152,19 @@ static const struct cx18_card cx18_card_h900 = { | |||
141 | .hw_audio_ctrl = CX18_HW_CX23418, | 152 | .hw_audio_ctrl = CX18_HW_CX23418, |
142 | .hw_all = CX18_HW_TUNER, | 153 | .hw_all = CX18_HW_TUNER, |
143 | .video_inputs = { | 154 | .video_inputs = { |
144 | { CX18_CARD_INPUT_VID_TUNER, 0, CX23418_COMPOSITE2 }, | 155 | { CX18_CARD_INPUT_VID_TUNER, 0, CX18_AV_COMPOSITE2 }, |
145 | { CX18_CARD_INPUT_SVIDEO1, 1, | 156 | { CX18_CARD_INPUT_SVIDEO1, 1, |
146 | CX23418_SVIDEO_LUMA3 | CX23418_SVIDEO_CHROMA4 }, | 157 | CX18_AV_SVIDEO_LUMA3 | CX18_AV_SVIDEO_CHROMA4 }, |
147 | { CX18_CARD_INPUT_COMPOSITE1, 1, CX23418_COMPOSITE1 }, | 158 | { CX18_CARD_INPUT_COMPOSITE1, 1, CX18_AV_COMPOSITE1 }, |
148 | }, | 159 | }, |
149 | .audio_inputs = { | 160 | .audio_inputs = { |
150 | { CX18_CARD_INPUT_AUD_TUNER, | 161 | { CX18_CARD_INPUT_AUD_TUNER, |
151 | CX23418_AUDIO8, 0 }, | 162 | CX18_AV_AUDIO8, 0 }, |
152 | { CX18_CARD_INPUT_LINE_IN1, | 163 | { CX18_CARD_INPUT_LINE_IN1, |
153 | CX23418_AUDIO_SERIAL, 0 }, | 164 | CX18_AV_AUDIO_SERIAL, 0 }, |
154 | }, | 165 | }, |
155 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, | 166 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, |
156 | CX23418_AUDIO_SERIAL, 0 }, | 167 | CX18_AV_AUDIO_SERIAL, 0 }, |
157 | .tuners = { | 168 | .tuners = { |
158 | { .std = V4L2_STD_ALL, .tuner = TUNER_XC2028 }, | 169 | { .std = V4L2_STD_ALL, .tuner = TUNER_XC2028 }, |
159 | }, | 170 | }, |
@@ -183,23 +194,26 @@ static const struct cx18_card_pci_info cx18_pci_mpc718[] = { | |||
183 | static const struct cx18_card cx18_card_mpc718 = { | 194 | static const struct cx18_card cx18_card_mpc718 = { |
184 | .type = CX18_CARD_YUAN_MPC718, | 195 | .type = CX18_CARD_YUAN_MPC718, |
185 | .name = "Yuan MPC718", | 196 | .name = "Yuan MPC718", |
186 | .comment = "Not yet supported!\n", | 197 | .comment = "Some Composite and S-Video inputs are currently working.\n", |
187 | .v4l2_capabilities = 0, | 198 | .v4l2_capabilities = CX18_CAP_ENCODER, |
188 | .hw_audio_ctrl = CX18_HW_CX23418, | 199 | .hw_audio_ctrl = CX18_HW_CX23418, |
189 | .hw_all = CX18_HW_TUNER, | 200 | .hw_all = CX18_HW_TUNER, |
190 | .video_inputs = { | 201 | .video_inputs = { |
191 | { CX18_CARD_INPUT_VID_TUNER, 0, CX23418_COMPOSITE7 }, | 202 | { CX18_CARD_INPUT_VID_TUNER, 0, CX18_AV_COMPOSITE2 }, |
192 | { CX18_CARD_INPUT_SVIDEO1, 1, CX23418_SVIDEO1 }, | 203 | { CX18_CARD_INPUT_SVIDEO1, 1, |
193 | { CX18_CARD_INPUT_COMPOSITE1, 1, CX23418_COMPOSITE3 }, | 204 | CX18_AV_SVIDEO_LUMA3 | CX18_AV_SVIDEO_CHROMA4 }, |
205 | { CX18_CARD_INPUT_COMPOSITE1, 1, CX18_AV_COMPOSITE1 }, | ||
206 | { CX18_CARD_INPUT_SVIDEO2, 2, | ||
207 | CX18_AV_SVIDEO_LUMA7 | CX18_AV_SVIDEO_CHROMA8 }, | ||
208 | { CX18_CARD_INPUT_COMPOSITE2, 2, CX18_AV_COMPOSITE6 }, | ||
209 | { CX18_CARD_INPUT_COMPOSITE3, 2, CX18_AV_COMPOSITE3 }, | ||
194 | }, | 210 | }, |
195 | .audio_inputs = { | 211 | .audio_inputs = { |
196 | { CX18_CARD_INPUT_AUD_TUNER, | 212 | { CX18_CARD_INPUT_AUD_TUNER, CX18_AV_AUDIO5, 0 }, |
197 | CX23418_AUDIO8, 0 }, | 213 | { CX18_CARD_INPUT_LINE_IN1, CX18_AV_AUDIO_SERIAL, 0 }, |
198 | { CX18_CARD_INPUT_LINE_IN1, | 214 | { CX18_CARD_INPUT_LINE_IN2, CX18_AV_AUDIO_SERIAL, 0 }, |
199 | CX23418_AUDIO_SERIAL, 0 }, | ||
200 | }, | 215 | }, |
201 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, | 216 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, CX18_AV_AUDIO_SERIAL, 0 }, |
202 | CX23418_AUDIO_SERIAL, 0 }, | ||
203 | .tuners = { | 217 | .tuners = { |
204 | /* XC3028 tuner */ | 218 | /* XC3028 tuner */ |
205 | { .std = V4L2_STD_ALL, .tuner = TUNER_XC2028 }, | 219 | { .std = V4L2_STD_ALL, .tuner = TUNER_XC2028 }, |
diff --git a/drivers/media/video/cx18/cx18-cards.h b/drivers/media/video/cx18/cx18-cards.h index bccb67f0db16..dc2dd945d4c3 100644 --- a/drivers/media/video/cx18/cx18-cards.h +++ b/drivers/media/video/cx18/cx18-cards.h | |||
@@ -36,36 +36,6 @@ | |||
36 | #define CX18_CARD_INPUT_COMPOSITE2 5 | 36 | #define CX18_CARD_INPUT_COMPOSITE2 5 |
37 | #define CX18_CARD_INPUT_COMPOSITE3 6 | 37 | #define CX18_CARD_INPUT_COMPOSITE3 6 |
38 | 38 | ||
39 | enum cx34180_video_input { | ||
40 | /* Composite video inputs In1-In8 */ | ||
41 | CX23418_COMPOSITE1 = 1, | ||
42 | CX23418_COMPOSITE2, | ||
43 | CX23418_COMPOSITE3, | ||
44 | CX23418_COMPOSITE4, | ||
45 | CX23418_COMPOSITE5, | ||
46 | CX23418_COMPOSITE6, | ||
47 | CX23418_COMPOSITE7, | ||
48 | CX23418_COMPOSITE8, | ||
49 | |||
50 | /* S-Video inputs consist of one luma input (In1-In4) ORed with one | ||
51 | chroma input (In5-In8) */ | ||
52 | CX23418_SVIDEO_LUMA1 = 0x10, | ||
53 | CX23418_SVIDEO_LUMA2 = 0x20, | ||
54 | CX23418_SVIDEO_LUMA3 = 0x30, | ||
55 | CX23418_SVIDEO_LUMA4 = 0x40, | ||
56 | CX23418_SVIDEO_CHROMA4 = 0x400, | ||
57 | CX23418_SVIDEO_CHROMA5 = 0x500, | ||
58 | CX23418_SVIDEO_CHROMA6 = 0x600, | ||
59 | CX23418_SVIDEO_CHROMA7 = 0x700, | ||
60 | CX23418_SVIDEO_CHROMA8 = 0x800, | ||
61 | |||
62 | /* S-Video aliases for common luma/chroma combinations */ | ||
63 | CX23418_SVIDEO1 = 0x510, | ||
64 | CX23418_SVIDEO2 = 0x620, | ||
65 | CX23418_SVIDEO3 = 0x730, | ||
66 | CX23418_SVIDEO4 = 0x840, | ||
67 | }; | ||
68 | |||
69 | /* audio inputs */ | 39 | /* audio inputs */ |
70 | #define CX18_CARD_INPUT_AUD_TUNER 1 | 40 | #define CX18_CARD_INPUT_AUD_TUNER 1 |
71 | #define CX18_CARD_INPUT_LINE_IN1 2 | 41 | #define CX18_CARD_INPUT_LINE_IN1 2 |
@@ -75,16 +45,6 @@ enum cx34180_video_input { | |||
75 | #define CX18_CARD_MAX_AUDIO_INPUTS 3 | 45 | #define CX18_CARD_MAX_AUDIO_INPUTS 3 |
76 | #define CX18_CARD_MAX_TUNERS 2 | 46 | #define CX18_CARD_MAX_TUNERS 2 |
77 | 47 | ||
78 | enum cx23418_audio_input { | ||
79 | /* Audio inputs: serial or In4-In8 */ | ||
80 | CX23418_AUDIO_SERIAL, | ||
81 | CX23418_AUDIO4 = 4, | ||
82 | CX23418_AUDIO5, | ||
83 | CX23418_AUDIO6, | ||
84 | CX23418_AUDIO7, | ||
85 | CX23418_AUDIO8, | ||
86 | }; | ||
87 | |||
88 | /* V4L2 capability aliases */ | 48 | /* V4L2 capability aliases */ |
89 | #define CX18_CAP_ENCODER (V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER | \ | 49 | #define CX18_CAP_ENCODER (V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_TUNER | \ |
90 | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE) | 50 | V4L2_CAP_AUDIO | V4L2_CAP_READWRITE) |
@@ -118,6 +78,13 @@ struct cx18_gpio_init { /* set initial GPIO DIR and OUT values */ | |||
118 | u32 initial_value; | 78 | u32 initial_value; |
119 | }; | 79 | }; |
120 | 80 | ||
81 | struct cx18_gpio_i2c_slave_reset { | ||
82 | u32 active_lo_mask; /* GPIO outputs that reset i2c chips when low */ | ||
83 | u32 active_hi_mask; /* GPIO outputs that reset i2c chips when high */ | ||
84 | int msecs_asserted; /* time period reset must remain asserted */ | ||
85 | int msecs_recovery; /* time after deassert for chips to be ready */ | ||
86 | }; | ||
87 | |||
121 | struct cx18_card_tuner { | 88 | struct cx18_card_tuner { |
122 | v4l2_std_id std; /* standard for which the tuner is suitable */ | 89 | v4l2_std_id std; /* standard for which the tuner is suitable */ |
123 | int tuner; /* tuner ID (from tuner.h) */ | 90 | int tuner; /* tuner ID (from tuner.h) */ |
@@ -154,7 +121,8 @@ struct cx18_card { | |||
154 | 121 | ||
155 | /* GPIO card-specific settings */ | 122 | /* GPIO card-specific settings */ |
156 | u8 xceive_pin; /* XCeive tuner GPIO reset pin */ | 123 | u8 xceive_pin; /* XCeive tuner GPIO reset pin */ |
157 | struct cx18_gpio_init gpio_init; | 124 | struct cx18_gpio_init gpio_init; |
125 | struct cx18_gpio_i2c_slave_reset gpio_i2c_slave_reset; | ||
158 | 126 | ||
159 | struct cx18_card_tuner tuners[CX18_CARD_MAX_TUNERS]; | 127 | struct cx18_card_tuner tuners[CX18_CARD_MAX_TUNERS]; |
160 | struct cx18_card_tuner_i2c *i2c; | 128 | struct cx18_card_tuner_i2c *i2c; |
diff --git a/drivers/media/video/cx18/cx18-dvb.c b/drivers/media/video/cx18/cx18-dvb.c index c9744173f969..cae38985b131 100644 --- a/drivers/media/video/cx18/cx18-dvb.c +++ b/drivers/media/video/cx18/cx18-dvb.c | |||
@@ -69,11 +69,21 @@ static int cx18_dvb_start_feed(struct dvb_demux_feed *feed) | |||
69 | struct dvb_demux *demux = feed->demux; | 69 | struct dvb_demux *demux = feed->demux; |
70 | struct cx18_stream *stream = (struct cx18_stream *) demux->priv; | 70 | struct cx18_stream *stream = (struct cx18_stream *) demux->priv; |
71 | struct cx18 *cx = stream->cx; | 71 | struct cx18 *cx = stream->cx; |
72 | int ret = -EINVAL; | 72 | int ret; |
73 | u32 v; | 73 | u32 v; |
74 | 74 | ||
75 | CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n", | 75 | CX18_DEBUG_INFO("Start feed: pid = 0x%x index = %d\n", |
76 | feed->pid, feed->index); | 76 | feed->pid, feed->index); |
77 | |||
78 | mutex_lock(&cx->serialize_lock); | ||
79 | ret = cx18_init_on_first_open(cx); | ||
80 | mutex_unlock(&cx->serialize_lock); | ||
81 | if (ret) { | ||
82 | CX18_ERR("Failed to initialize firmware starting DVB feed\n"); | ||
83 | return ret; | ||
84 | } | ||
85 | ret = -EINVAL; | ||
86 | |||
77 | switch (cx->card->type) { | 87 | switch (cx->card->type) { |
78 | case CX18_CARD_HVR_1600_ESMT: | 88 | case CX18_CARD_HVR_1600_ESMT: |
79 | case CX18_CARD_HVR_1600_SAMSUNG: | 89 | case CX18_CARD_HVR_1600_SAMSUNG: |
@@ -101,6 +111,11 @@ static int cx18_dvb_start_feed(struct dvb_demux_feed *feed) | |||
101 | if (stream->dvb.feeding++ == 0) { | 111 | if (stream->dvb.feeding++ == 0) { |
102 | CX18_DEBUG_INFO("Starting Transport DMA\n"); | 112 | CX18_DEBUG_INFO("Starting Transport DMA\n"); |
103 | ret = cx18_start_v4l2_encode_stream(stream); | 113 | ret = cx18_start_v4l2_encode_stream(stream); |
114 | if (ret < 0) { | ||
115 | CX18_DEBUG_INFO( | ||
116 | "Failed to start Transport DMA\n"); | ||
117 | stream->dvb.feeding--; | ||
118 | } | ||
104 | } else | 119 | } else |
105 | ret = 0; | 120 | ret = 0; |
106 | mutex_unlock(&stream->dvb.feedlock); | 121 | mutex_unlock(&stream->dvb.feedlock); |
diff --git a/drivers/media/video/cx18/cx18-gpio.c b/drivers/media/video/cx18/cx18-gpio.c index ceb63653c926..b302833f6f9d 100644 --- a/drivers/media/video/cx18/cx18-gpio.c +++ b/drivers/media/video/cx18/cx18-gpio.c | |||
@@ -53,10 +53,34 @@ static void gpio_write(struct cx18 *cx) | |||
53 | write_reg(((dir & 0xffff) << 16) | (val & 0xffff), | 53 | write_reg(((dir & 0xffff) << 16) | (val & 0xffff), |
54 | CX18_REG_GPIO_OUT1); | 54 | CX18_REG_GPIO_OUT1); |
55 | write_reg(dir & 0xffff0000, CX18_REG_GPIO_DIR2); | 55 | write_reg(dir & 0xffff0000, CX18_REG_GPIO_DIR2); |
56 | write_reg((dir & 0xffff0000) | ((val & 0xffff0000) >> 16), | 56 | write_reg_sync((dir & 0xffff0000) | ((val & 0xffff0000) >> 16), |
57 | CX18_REG_GPIO_OUT2); | 57 | CX18_REG_GPIO_OUT2); |
58 | } | 58 | } |
59 | 59 | ||
60 | void cx18_reset_i2c_slaves_gpio(struct cx18 *cx) | ||
61 | { | ||
62 | const struct cx18_gpio_i2c_slave_reset *p; | ||
63 | |||
64 | p = &cx->card->gpio_i2c_slave_reset; | ||
65 | |||
66 | if ((p->active_lo_mask | p->active_hi_mask) == 0) | ||
67 | return; | ||
68 | |||
69 | /* Assuming that the masks are a subset of the bits in gpio_dir */ | ||
70 | |||
71 | /* Assert */ | ||
72 | cx->gpio_val = | ||
73 | (cx->gpio_val | p->active_hi_mask) & ~(p->active_lo_mask); | ||
74 | gpio_write(cx); | ||
75 | schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_asserted)); | ||
76 | |||
77 | /* Deassert */ | ||
78 | cx->gpio_val = | ||
79 | (cx->gpio_val | p->active_lo_mask) & ~(p->active_hi_mask); | ||
80 | gpio_write(cx); | ||
81 | schedule_timeout_uninterruptible(msecs_to_jiffies(p->msecs_recovery)); | ||
82 | } | ||
83 | |||
60 | void cx18_gpio_init(struct cx18 *cx) | 84 | void cx18_gpio_init(struct cx18 *cx) |
61 | { | 85 | { |
62 | cx->gpio_dir = cx->card->gpio_init.direction; | 86 | cx->gpio_dir = cx->card->gpio_init.direction; |
diff --git a/drivers/media/video/cx18/cx18-gpio.h b/drivers/media/video/cx18/cx18-gpio.h index 41bac8856b50..525c328f748a 100644 --- a/drivers/media/video/cx18/cx18-gpio.h +++ b/drivers/media/video/cx18/cx18-gpio.h | |||
@@ -21,4 +21,5 @@ | |||
21 | */ | 21 | */ |
22 | 22 | ||
23 | void cx18_gpio_init(struct cx18 *cx); | 23 | void cx18_gpio_init(struct cx18 *cx); |
24 | void cx18_reset_i2c_slaves_gpio(struct cx18 *cx); | ||
24 | int cx18_reset_tuner_gpio(void *dev, int cmd, int value); | 25 | int cx18_reset_tuner_gpio(void *dev, int cmd, int value); |
diff --git a/drivers/media/video/cx18/cx18-i2c.c b/drivers/media/video/cx18/cx18-i2c.c index 1d6c51a75313..680bc4e35b79 100644 --- a/drivers/media/video/cx18/cx18-i2c.c +++ b/drivers/media/video/cx18/cx18-i2c.c | |||
@@ -405,6 +405,8 @@ int init_cx18_i2c(struct cx18 *cx) | |||
405 | cx18_setscl(&cx->i2c_algo_cb_data[1], 1); | 405 | cx18_setscl(&cx->i2c_algo_cb_data[1], 1); |
406 | cx18_setsda(&cx->i2c_algo_cb_data[1], 1); | 406 | cx18_setsda(&cx->i2c_algo_cb_data[1], 1); |
407 | 407 | ||
408 | cx18_reset_i2c_slaves_gpio(cx); | ||
409 | |||
408 | return i2c_bit_add_bus(&cx->i2c_adap[0]) || | 410 | return i2c_bit_add_bus(&cx->i2c_adap[0]) || |
409 | i2c_bit_add_bus(&cx->i2c_adap[1]); | 411 | i2c_bit_add_bus(&cx->i2c_adap[1]); |
410 | } | 412 | } |
diff --git a/drivers/media/video/cx25840/cx25840-core.c b/drivers/media/video/cx25840/cx25840-core.c index 607efdcd22f8..1da6f134888d 100644 --- a/drivers/media/video/cx25840/cx25840-core.c +++ b/drivers/media/video/cx25840/cx25840-core.c | |||
@@ -433,7 +433,7 @@ static int set_input(struct i2c_client *client, enum cx25840_video_input vid_inp | |||
433 | int chroma = vid_input & 0xf00; | 433 | int chroma = vid_input & 0xf00; |
434 | 434 | ||
435 | if ((vid_input & ~0xff0) || | 435 | if ((vid_input & ~0xff0) || |
436 | luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA4 || | 436 | luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA8 || |
437 | chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) { | 437 | chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) { |
438 | v4l_err(client, "0x%04x is not a valid video input!\n", | 438 | v4l_err(client, "0x%04x is not a valid video input!\n", |
439 | vid_input); | 439 | vid_input); |
diff --git a/drivers/media/video/cx88/cx88-alsa.c b/drivers/media/video/cx88/cx88-alsa.c index e976fc6bef7c..80c8883e54b5 100644 --- a/drivers/media/video/cx88/cx88-alsa.c +++ b/drivers/media/video/cx88/cx88-alsa.c | |||
@@ -332,6 +332,12 @@ static int snd_cx88_pcm_open(struct snd_pcm_substream *substream) | |||
332 | struct snd_pcm_runtime *runtime = substream->runtime; | 332 | struct snd_pcm_runtime *runtime = substream->runtime; |
333 | int err; | 333 | int err; |
334 | 334 | ||
335 | if (!chip) { | ||
336 | printk(KERN_ERR "BUG: cx88 can't find device struct." | ||
337 | " Can't proceed with open\n"); | ||
338 | return -ENODEV; | ||
339 | } | ||
340 | |||
335 | err = snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_PERIODS); | 341 | err = snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_PERIODS); |
336 | if (err < 0) | 342 | if (err < 0) |
337 | goto _error; | 343 | goto _error; |
diff --git a/drivers/media/video/em28xx/em28xx-audio.c b/drivers/media/video/em28xx/em28xx-audio.c index 92b2a6db4fdc..3c006103c1eb 100644 --- a/drivers/media/video/em28xx/em28xx-audio.c +++ b/drivers/media/video/em28xx/em28xx-audio.c | |||
@@ -268,6 +268,12 @@ static int snd_em28xx_capture_open(struct snd_pcm_substream *substream) | |||
268 | 268 | ||
269 | dprintk("opening device and trying to acquire exclusive lock\n"); | 269 | dprintk("opening device and trying to acquire exclusive lock\n"); |
270 | 270 | ||
271 | if (!dev) { | ||
272 | printk(KERN_ERR "BUG: em28xx can't find device struct." | ||
273 | " Can't proceed with open\n"); | ||
274 | return -ENODEV; | ||
275 | } | ||
276 | |||
271 | /* Sets volume, mute, etc */ | 277 | /* Sets volume, mute, etc */ |
272 | 278 | ||
273 | dev->mute = 0; | 279 | dev->mute = 0; |
@@ -415,6 +421,12 @@ static int em28xx_audio_init(struct em28xx *dev) | |||
415 | static int devnr; | 421 | static int devnr; |
416 | int ret, err; | 422 | int ret, err; |
417 | 423 | ||
424 | if (dev->has_audio_class) { | ||
425 | /* This device does not support the extension (in this case | ||
426 | the device is expecting the snd-usb-audio module */ | ||
427 | return 0; | ||
428 | } | ||
429 | |||
418 | printk(KERN_INFO "em28xx-audio.c: probing for em28x1 " | 430 | printk(KERN_INFO "em28xx-audio.c: probing for em28x1 " |
419 | "non standard usbaudio\n"); | 431 | "non standard usbaudio\n"); |
420 | printk(KERN_INFO "em28xx-audio.c: Copyright (C) 2006 Markus " | 432 | printk(KERN_INFO "em28xx-audio.c: Copyright (C) 2006 Markus " |
@@ -458,6 +470,12 @@ static int em28xx_audio_fini(struct em28xx *dev) | |||
458 | if (dev == NULL) | 470 | if (dev == NULL) |
459 | return 0; | 471 | return 0; |
460 | 472 | ||
473 | if (dev->has_audio_class) { | ||
474 | /* This device does not support the extension (in this case | ||
475 | the device is expecting the snd-usb-audio module */ | ||
476 | return 0; | ||
477 | } | ||
478 | |||
461 | if (dev->adev) { | 479 | if (dev->adev) { |
462 | snd_card_free(dev->adev->sndcard); | 480 | snd_card_free(dev->adev->sndcard); |
463 | kfree(dev->adev); | 481 | kfree(dev->adev); |
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c index 3e4f3c7e92e7..8cbda43727c3 100644 --- a/drivers/media/video/em28xx/em28xx-cards.c +++ b/drivers/media/video/em28xx/em28xx-cards.c | |||
@@ -157,6 +157,7 @@ struct em28xx_board em28xx_boards[] = { | |||
157 | .tda9887_conf = TDA9887_PRESENT, | 157 | .tda9887_conf = TDA9887_PRESENT, |
158 | .tuner_type = TUNER_XC2028, | 158 | .tuner_type = TUNER_XC2028, |
159 | .mts_firmware = 1, | 159 | .mts_firmware = 1, |
160 | .has_dvb = 1, | ||
160 | .decoder = EM28XX_TVP5150, | 161 | .decoder = EM28XX_TVP5150, |
161 | .input = { { | 162 | .input = { { |
162 | .type = EM28XX_VMUX_TELEVISION, | 163 | .type = EM28XX_VMUX_TELEVISION, |
@@ -524,6 +525,9 @@ void em28xx_pre_card_setup(struct em28xx *dev) | |||
524 | rc = em28xx_read_reg(dev, EM28XX_R0A_CHIPID); | 525 | rc = em28xx_read_reg(dev, EM28XX_R0A_CHIPID); |
525 | if (rc > 0) { | 526 | if (rc > 0) { |
526 | switch (rc) { | 527 | switch (rc) { |
528 | case CHIP_ID_EM2860: | ||
529 | em28xx_info("chip ID is em2860\n"); | ||
530 | break; | ||
527 | case CHIP_ID_EM2883: | 531 | case CHIP_ID_EM2883: |
528 | em28xx_info("chip ID is em2882/em2883\n"); | 532 | em28xx_info("chip ID is em2882/em2883\n"); |
529 | dev->wait_after_write = 0; | 533 | dev->wait_after_write = 0; |
diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c index 8cf4983f0039..0b2333ee07f8 100644 --- a/drivers/media/video/em28xx/em28xx-dvb.c +++ b/drivers/media/video/em28xx/em28xx-dvb.c | |||
@@ -382,6 +382,11 @@ static int dvb_init(struct em28xx *dev) | |||
382 | int result = 0; | 382 | int result = 0; |
383 | struct em28xx_dvb *dvb; | 383 | struct em28xx_dvb *dvb; |
384 | 384 | ||
385 | if (!dev->has_dvb) { | ||
386 | /* This device does not support the extension */ | ||
387 | return 0; | ||
388 | } | ||
389 | |||
385 | dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL); | 390 | dvb = kzalloc(sizeof(struct em28xx_dvb), GFP_KERNEL); |
386 | 391 | ||
387 | if (dvb == NULL) { | 392 | if (dvb == NULL) { |
@@ -444,6 +449,11 @@ out_free: | |||
444 | 449 | ||
445 | static int dvb_fini(struct em28xx *dev) | 450 | static int dvb_fini(struct em28xx *dev) |
446 | { | 451 | { |
452 | if (!dev->has_dvb) { | ||
453 | /* This device does not support the extension */ | ||
454 | return 0; | ||
455 | } | ||
456 | |||
447 | if (dev->dvb) { | 457 | if (dev->dvb) { |
448 | unregister_dvb(dev->dvb); | 458 | unregister_dvb(dev->dvb); |
449 | dev->dvb = NULL; | 459 | dev->dvb = NULL; |
diff --git a/drivers/media/video/em28xx/em28xx-reg.h b/drivers/media/video/em28xx/em28xx-reg.h index 9058bed07953..fac1ab23f621 100644 --- a/drivers/media/video/em28xx/em28xx-reg.h +++ b/drivers/media/video/em28xx/em28xx-reg.h | |||
@@ -84,5 +84,6 @@ | |||
84 | 84 | ||
85 | /* FIXME: Need to be populated with the other chip ID's */ | 85 | /* FIXME: Need to be populated with the other chip ID's */ |
86 | enum em28xx_chip_id { | 86 | enum em28xx_chip_id { |
87 | CHIP_ID_EM2860 = 34, | ||
87 | CHIP_ID_EM2883 = 36, | 88 | CHIP_ID_EM2883 = 36, |
88 | }; | 89 | }; |
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c index fb163ecd9216..285bc62bbe46 100644 --- a/drivers/media/video/em28xx/em28xx-video.c +++ b/drivers/media/video/em28xx/em28xx-video.c | |||
@@ -1848,32 +1848,28 @@ static DEFINE_MUTEX(em28xx_extension_devlist_lock); | |||
1848 | 1848 | ||
1849 | int em28xx_register_extension(struct em28xx_ops *ops) | 1849 | int em28xx_register_extension(struct em28xx_ops *ops) |
1850 | { | 1850 | { |
1851 | struct em28xx *h, *dev = NULL; | 1851 | struct em28xx *dev = NULL; |
1852 | |||
1853 | list_for_each_entry(h, &em28xx_devlist, devlist) | ||
1854 | dev = h; | ||
1855 | 1852 | ||
1856 | mutex_lock(&em28xx_extension_devlist_lock); | 1853 | mutex_lock(&em28xx_extension_devlist_lock); |
1857 | list_add_tail(&ops->next, &em28xx_extension_devlist); | 1854 | list_add_tail(&ops->next, &em28xx_extension_devlist); |
1858 | if (dev) | 1855 | list_for_each_entry(dev, &em28xx_devlist, devlist) { |
1859 | ops->init(dev); | 1856 | if (dev) |
1860 | 1857 | ops->init(dev); | |
1858 | } | ||
1861 | printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name); | 1859 | printk(KERN_INFO "Em28xx: Initialized (%s) extension\n", ops->name); |
1862 | mutex_unlock(&em28xx_extension_devlist_lock); | 1860 | mutex_unlock(&em28xx_extension_devlist_lock); |
1863 | |||
1864 | return 0; | 1861 | return 0; |
1865 | } | 1862 | } |
1866 | EXPORT_SYMBOL(em28xx_register_extension); | 1863 | EXPORT_SYMBOL(em28xx_register_extension); |
1867 | 1864 | ||
1868 | void em28xx_unregister_extension(struct em28xx_ops *ops) | 1865 | void em28xx_unregister_extension(struct em28xx_ops *ops) |
1869 | { | 1866 | { |
1870 | struct em28xx *h, *dev = NULL; | 1867 | struct em28xx *dev = NULL; |
1871 | |||
1872 | list_for_each_entry(h, &em28xx_devlist, devlist) | ||
1873 | dev = h; | ||
1874 | 1868 | ||
1875 | if (dev) | 1869 | list_for_each_entry(dev, &em28xx_devlist, devlist) { |
1876 | ops->fini(dev); | 1870 | if (dev) |
1871 | ops->fini(dev); | ||
1872 | } | ||
1877 | 1873 | ||
1878 | mutex_lock(&em28xx_extension_devlist_lock); | 1874 | mutex_lock(&em28xx_extension_devlist_lock); |
1879 | printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name); | 1875 | printk(KERN_INFO "Em28xx: Removed (%s) extension\n", ops->name); |
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c index 7cc8e9b19fb7..5ec5bb9a94d2 100644 --- a/drivers/media/video/pxa_camera.c +++ b/drivers/media/video/pxa_camera.c | |||
@@ -1019,12 +1019,12 @@ static int pxa_camera_probe(struct platform_device *pdev) | |||
1019 | struct pxa_camera_dev *pcdev; | 1019 | struct pxa_camera_dev *pcdev; |
1020 | struct resource *res; | 1020 | struct resource *res; |
1021 | void __iomem *base; | 1021 | void __iomem *base; |
1022 | unsigned int irq; | 1022 | int irq; |
1023 | int err = 0; | 1023 | int err = 0; |
1024 | 1024 | ||
1025 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1025 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
1026 | irq = platform_get_irq(pdev, 0); | 1026 | irq = platform_get_irq(pdev, 0); |
1027 | if (!res || !irq) { | 1027 | if (!res || irq < 0) { |
1028 | err = -ENODEV; | 1028 | err = -ENODEV; |
1029 | goto exit; | 1029 | goto exit; |
1030 | } | 1030 | } |
diff --git a/drivers/media/video/saa7134/saa7134-alsa.c b/drivers/media/video/saa7134/saa7134-alsa.c index ba3082422a01..f118de6e3672 100644 --- a/drivers/media/video/saa7134/saa7134-alsa.c +++ b/drivers/media/video/saa7134/saa7134-alsa.c | |||
@@ -613,9 +613,15 @@ static int snd_card_saa7134_capture_open(struct snd_pcm_substream * substream) | |||
613 | struct snd_pcm_runtime *runtime = substream->runtime; | 613 | struct snd_pcm_runtime *runtime = substream->runtime; |
614 | snd_card_saa7134_pcm_t *pcm; | 614 | snd_card_saa7134_pcm_t *pcm; |
615 | snd_card_saa7134_t *saa7134 = snd_pcm_substream_chip(substream); | 615 | snd_card_saa7134_t *saa7134 = snd_pcm_substream_chip(substream); |
616 | struct saa7134_dev *dev = saa7134->dev; | 616 | struct saa7134_dev *dev; |
617 | int amux, err; | 617 | int amux, err; |
618 | 618 | ||
619 | if (!saa7134) { | ||
620 | printk(KERN_ERR "BUG: saa7134 can't find device struct." | ||
621 | " Can't proceed with open\n"); | ||
622 | return -ENODEV; | ||
623 | } | ||
624 | dev = saa7134->dev; | ||
619 | mutex_lock(&dev->dmasound.lock); | 625 | mutex_lock(&dev->dmasound.lock); |
620 | 626 | ||
621 | dev->dmasound.read_count = 0; | 627 | dev->dmasound.read_count = 0; |
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c index b111903aa322..2618cfa592e7 100644 --- a/drivers/media/video/saa7134/saa7134-cards.c +++ b/drivers/media/video/saa7134/saa7134-cards.c | |||
@@ -4114,11 +4114,7 @@ struct saa7134_board saa7134_boards[] = { | |||
4114 | .radio_type = UNSET, | 4114 | .radio_type = UNSET, |
4115 | .tuner_addr = ADDR_UNSET, | 4115 | .tuner_addr = ADDR_UNSET, |
4116 | .radio_addr = ADDR_UNSET, | 4116 | .radio_addr = ADDR_UNSET, |
4117 | /* | ||
4118 | TODO: | ||
4119 | .mpeg = SAA7134_MPEG_DVB, | 4117 | .mpeg = SAA7134_MPEG_DVB, |
4120 | */ | ||
4121 | |||
4122 | .inputs = {{ | 4118 | .inputs = {{ |
4123 | .name = name_tv, | 4119 | .name = name_tv, |
4124 | .vmux = 1, | 4120 | .vmux = 1, |
@@ -4157,7 +4153,7 @@ struct saa7134_board saa7134_boards[] = { | |||
4157 | } }, | 4153 | } }, |
4158 | .radio = { | 4154 | .radio = { |
4159 | .name = name_radio, | 4155 | .name = name_radio, |
4160 | .amux = LINE1, | 4156 | .amux = TV, |
4161 | }, | 4157 | }, |
4162 | }, | 4158 | }, |
4163 | [SAA7134_BOARD_AVERMEDIA_M115] = { | 4159 | [SAA7134_BOARD_AVERMEDIA_M115] = { |
@@ -4167,6 +4163,7 @@ struct saa7134_board saa7134_boards[] = { | |||
4167 | .radio_type = UNSET, | 4163 | .radio_type = UNSET, |
4168 | .tuner_addr = ADDR_UNSET, | 4164 | .tuner_addr = ADDR_UNSET, |
4169 | .radio_addr = ADDR_UNSET, | 4165 | .radio_addr = ADDR_UNSET, |
4166 | .mpeg = SAA7134_MPEG_DVB, | ||
4170 | .inputs = {{ | 4167 | .inputs = {{ |
4171 | .name = name_tv, | 4168 | .name = name_tv, |
4172 | .vmux = 1, | 4169 | .vmux = 1, |
@@ -5351,22 +5348,21 @@ static int saa7134_xc2028_callback(struct saa7134_dev *dev, | |||
5351 | { | 5348 | { |
5352 | switch (command) { | 5349 | switch (command) { |
5353 | case XC2028_TUNER_RESET: | 5350 | case XC2028_TUNER_RESET: |
5354 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x06e20000, 0x06e20000); | 5351 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x00008000, 0x00000000); |
5355 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x06a20000, 0x06a20000); | 5352 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x00008000, 0x00008000); |
5356 | mdelay(250); | 5353 | switch (dev->board) { |
5357 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x06e20000, 0); | 5354 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
5358 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x06a20000, 0); | 5355 | saa7134_set_gpio(dev, 23, 0); |
5359 | mdelay(250); | 5356 | msleep(10); |
5360 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x06e20000, 0x06e20000); | 5357 | saa7134_set_gpio(dev, 23, 1); |
5361 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x06a20000, 0x06a20000); | 5358 | break; |
5362 | mdelay(250); | 5359 | case SAA7134_BOARD_AVERMEDIA_A16D: |
5363 | saa_andorl(SAA7133_ANALOG_IO_SELECT >> 2, 0x02, 0x02); | 5360 | saa7134_set_gpio(dev, 21, 0); |
5364 | saa_andorl(SAA7134_ANALOG_IN_CTRL1 >> 2, 0x81, 0x81); | 5361 | msleep(10); |
5365 | saa_andorl(SAA7134_AUDIO_CLOCK0 >> 2, 0x03187de7, 0x03187de7); | 5362 | saa7134_set_gpio(dev, 21, 1); |
5366 | saa_andorl(SAA7134_AUDIO_PLL_CTRL >> 2, 0x03, 0x03); | 5363 | break; |
5367 | saa_andorl(SAA7134_AUDIO_CLOCKS_PER_FIELD0 >> 2, | 5364 | } |
5368 | 0x0001e000, 0x0001e000); | 5365 | return 0; |
5369 | return 0; | ||
5370 | } | 5366 | } |
5371 | return -EINVAL; | 5367 | return -EINVAL; |
5372 | } | 5368 | } |
@@ -5553,9 +5549,7 @@ int saa7134_board_init1(struct saa7134_dev *dev) | |||
5553 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x08000000, 0x00000000); | 5549 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x08000000, 0x00000000); |
5554 | break; | 5550 | break; |
5555 | case SAA7134_BOARD_AVERMEDIA_CARDBUS: | 5551 | case SAA7134_BOARD_AVERMEDIA_CARDBUS: |
5556 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: | ||
5557 | case SAA7134_BOARD_AVERMEDIA_M115: | 5552 | case SAA7134_BOARD_AVERMEDIA_M115: |
5558 | case SAA7134_BOARD_AVERMEDIA_A16D: | ||
5559 | /* power-down tuner chip */ | 5553 | /* power-down tuner chip */ |
5560 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0xffffffff, 0); | 5554 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0xffffffff, 0); |
5561 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0xffffffff, 0); | 5555 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0xffffffff, 0); |
@@ -5565,6 +5559,18 @@ int saa7134_board_init1(struct saa7134_dev *dev) | |||
5565 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0xffffffff, 0xffffffff); | 5559 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0xffffffff, 0xffffffff); |
5566 | msleep(10); | 5560 | msleep(10); |
5567 | break; | 5561 | break; |
5562 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: | ||
5563 | saa7134_set_gpio(dev, 23, 0); | ||
5564 | msleep(10); | ||
5565 | saa7134_set_gpio(dev, 23, 1); | ||
5566 | break; | ||
5567 | case SAA7134_BOARD_AVERMEDIA_A16D: | ||
5568 | saa7134_set_gpio(dev, 21, 0); | ||
5569 | msleep(10); | ||
5570 | saa7134_set_gpio(dev, 21, 1); | ||
5571 | msleep(1); | ||
5572 | dev->has_remote = SAA7134_REMOTE_GPIO; | ||
5573 | break; | ||
5568 | case SAA7134_BOARD_BEHOLD_COLUMBUS_TVFM: | 5574 | case SAA7134_BOARD_BEHOLD_COLUMBUS_TVFM: |
5569 | /* power-down tuner chip */ | 5575 | /* power-down tuner chip */ |
5570 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x000A8004, 0x000A8004); | 5576 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x000A8004, 0x000A8004); |
@@ -5615,7 +5621,8 @@ int saa7134_board_init1(struct saa7134_dev *dev) | |||
5615 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x80040100, 0x80040100); | 5621 | saa_andorl(SAA7134_GPIO_GPMODE0 >> 2, 0x80040100, 0x80040100); |
5616 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x80040100, 0x00040100); | 5622 | saa_andorl(SAA7134_GPIO_GPSTATUS0 >> 2, 0x80040100, 0x00040100); |
5617 | printk("%s: %s: hybrid analog/dvb card\n" | 5623 | printk("%s: %s: hybrid analog/dvb card\n" |
5618 | "%s: Sorry, only the analog inputs are supported for now.\n", | 5624 | "%s: Sorry, only analog s-video and composite input " |
5625 | "are supported for now.\n", | ||
5619 | dev->name, card(dev).name, dev->name); | 5626 | dev->name, card(dev).name, dev->name); |
5620 | break; | 5627 | break; |
5621 | } | 5628 | } |
@@ -5675,6 +5682,7 @@ static void saa7134_tuner_setup(struct saa7134_dev *dev) | |||
5675 | 5682 | ||
5676 | switch (dev->board) { | 5683 | switch (dev->board) { |
5677 | case SAA7134_BOARD_AVERMEDIA_A16D: | 5684 | case SAA7134_BOARD_AVERMEDIA_A16D: |
5685 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: | ||
5678 | ctl.demod = XC3028_FE_ZARLINK456; | 5686 | ctl.demod = XC3028_FE_ZARLINK456; |
5679 | break; | 5687 | break; |
5680 | default: | 5688 | default: |
diff --git a/drivers/media/video/saa7134/saa7134-dvb.c b/drivers/media/video/saa7134/saa7134-dvb.c index 469f93aac008..341b101b0357 100644 --- a/drivers/media/video/saa7134/saa7134-dvb.c +++ b/drivers/media/video/saa7134/saa7134-dvb.c | |||
@@ -153,12 +153,12 @@ static int mt352_aver777_init(struct dvb_frontend* fe) | |||
153 | return 0; | 153 | return 0; |
154 | } | 154 | } |
155 | 155 | ||
156 | static int mt352_aver_a16d_init(struct dvb_frontend *fe) | 156 | static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe) |
157 | { | 157 | { |
158 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; | 158 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d }; |
159 | static u8 reset [] = { RESET, 0x80 }; | 159 | static u8 reset [] = { RESET, 0x80 }; |
160 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | 160 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; |
161 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 }; | 161 | static u8 agc_cfg [] = { AGC_TARGET, 0xe }; |
162 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; | 162 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 }; |
163 | 163 | ||
164 | mt352_write(fe, clock_config, sizeof(clock_config)); | 164 | mt352_write(fe, clock_config, sizeof(clock_config)); |
@@ -167,12 +167,9 @@ static int mt352_aver_a16d_init(struct dvb_frontend *fe) | |||
167 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | 167 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); |
168 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | 168 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); |
169 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | 169 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); |
170 | |||
171 | return 0; | 170 | return 0; |
172 | } | 171 | } |
173 | 172 | ||
174 | |||
175 | |||
176 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, | 173 | static int mt352_pinnacle_tuner_set_params(struct dvb_frontend* fe, |
177 | struct dvb_frontend_parameters* params) | 174 | struct dvb_frontend_parameters* params) |
178 | { | 175 | { |
@@ -215,14 +212,10 @@ static struct mt352_config avermedia_777 = { | |||
215 | .demod_init = mt352_aver777_init, | 212 | .demod_init = mt352_aver777_init, |
216 | }; | 213 | }; |
217 | 214 | ||
218 | static struct mt352_config avermedia_16d = { | 215 | static struct mt352_config avermedia_xc3028_mt352_dev = { |
219 | .demod_address = 0xf, | ||
220 | .demod_init = mt352_aver_a16d_init, | ||
221 | }; | ||
222 | |||
223 | static struct mt352_config avermedia_e506r_mt352_dev = { | ||
224 | .demod_address = (0x1e >> 1), | 216 | .demod_address = (0x1e >> 1), |
225 | .no_tuner = 1, | 217 | .no_tuner = 1, |
218 | .demod_init = mt352_avermedia_xc3028_init, | ||
226 | }; | 219 | }; |
227 | 220 | ||
228 | /* ================================================================== | 221 | /* ================================================================== |
@@ -975,9 +968,10 @@ static int dvb_init(struct saa7134_dev *dev) | |||
975 | } | 968 | } |
976 | break; | 969 | break; |
977 | case SAA7134_BOARD_AVERMEDIA_A16D: | 970 | case SAA7134_BOARD_AVERMEDIA_A16D: |
978 | dprintk("avertv A16D dvb setup\n"); | 971 | dprintk("AverMedia A16D dvb setup\n"); |
979 | dev->dvb.frontend = dvb_attach(mt352_attach, &avermedia_16d, | 972 | dev->dvb.frontend = dvb_attach(mt352_attach, |
980 | &dev->i2c_adap); | 973 | &avermedia_xc3028_mt352_dev, |
974 | &dev->i2c_adap); | ||
981 | attach_xc3028 = 1; | 975 | attach_xc3028 = 1; |
982 | break; | 976 | break; |
983 | case SAA7134_BOARD_MD7134: | 977 | case SAA7134_BOARD_MD7134: |
@@ -1091,7 +1085,8 @@ static int dvb_init(struct saa7134_dev *dev) | |||
1091 | ads_tech_duo_config.tuner_address); | 1085 | ads_tech_duo_config.tuner_address); |
1092 | goto dettach_frontend; | 1086 | goto dettach_frontend; |
1093 | } | 1087 | } |
1094 | } | 1088 | } else |
1089 | wprintk("failed to attach tda10046\n"); | ||
1095 | break; | 1090 | break; |
1096 | case SAA7134_BOARD_TEVION_DVBT_220RF: | 1091 | case SAA7134_BOARD_TEVION_DVBT_220RF: |
1097 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, | 1092 | if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config, |
@@ -1260,11 +1255,14 @@ static int dvb_init(struct saa7134_dev *dev) | |||
1260 | goto dettach_frontend; | 1255 | goto dettach_frontend; |
1261 | break; | 1256 | break; |
1262 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: | 1257 | case SAA7134_BOARD_AVERMEDIA_CARDBUS_506: |
1258 | dprintk("AverMedia E506R dvb setup\n"); | ||
1259 | saa7134_set_gpio(dev, 25, 0); | ||
1260 | msleep(10); | ||
1261 | saa7134_set_gpio(dev, 25, 1); | ||
1263 | dev->dvb.frontend = dvb_attach(mt352_attach, | 1262 | dev->dvb.frontend = dvb_attach(mt352_attach, |
1264 | &avermedia_e506r_mt352_dev, | 1263 | &avermedia_xc3028_mt352_dev, |
1265 | &dev->i2c_adap); | 1264 | &dev->i2c_adap); |
1266 | attach_xc3028 = 1; | 1265 | attach_xc3028 = 1; |
1267 | break; | ||
1268 | case SAA7134_BOARD_MD7134_BRIDGE_2: | 1266 | case SAA7134_BOARD_MD7134_BRIDGE_2: |
1269 | dev->dvb.frontend = dvb_attach(tda10086_attach, | 1267 | dev->dvb.frontend = dvb_attach(tda10086_attach, |
1270 | &sd1878_4m, &dev->i2c_adap); | 1268 | &sd1878_4m, &dev->i2c_adap); |
@@ -1338,7 +1336,8 @@ static int dvb_init(struct saa7134_dev *dev) | |||
1338 | return ret; | 1336 | return ret; |
1339 | 1337 | ||
1340 | dettach_frontend: | 1338 | dettach_frontend: |
1341 | dvb_frontend_detach(dev->dvb.frontend); | 1339 | if (dev->dvb.frontend) |
1340 | dvb_frontend_detach(dev->dvb.frontend); | ||
1342 | dev->dvb.frontend = NULL; | 1341 | dev->dvb.frontend = NULL; |
1343 | 1342 | ||
1344 | return -1; | 1343 | return -1; |
diff --git a/drivers/media/video/saa7134/saa7134-empress.c b/drivers/media/video/saa7134/saa7134-empress.c index 81431ee41842..3ae71a340822 100644 --- a/drivers/media/video/saa7134/saa7134-empress.c +++ b/drivers/media/video/saa7134/saa7134-empress.c | |||
@@ -110,9 +110,10 @@ static int ts_release(struct inode *inode, struct file *file) | |||
110 | { | 110 | { |
111 | struct saa7134_dev *dev = file->private_data; | 111 | struct saa7134_dev *dev = file->private_data; |
112 | 112 | ||
113 | mutex_lock(&dev->empress_tsq.vb_lock); | ||
114 | |||
113 | videobuf_stop(&dev->empress_tsq); | 115 | videobuf_stop(&dev->empress_tsq); |
114 | videobuf_mmap_free(&dev->empress_tsq); | 116 | videobuf_mmap_free(&dev->empress_tsq); |
115 | dev->empress_users--; | ||
116 | 117 | ||
117 | /* stop the encoder */ | 118 | /* stop the encoder */ |
118 | ts_reset_encoder(dev); | 119 | ts_reset_encoder(dev); |
@@ -121,6 +122,10 @@ static int ts_release(struct inode *inode, struct file *file) | |||
121 | saa_writeb(SAA7134_AUDIO_MUTE_CTRL, | 122 | saa_writeb(SAA7134_AUDIO_MUTE_CTRL, |
122 | saa_readb(SAA7134_AUDIO_MUTE_CTRL) | (1 << 6)); | 123 | saa_readb(SAA7134_AUDIO_MUTE_CTRL) | (1 << 6)); |
123 | 124 | ||
125 | dev->empress_users--; | ||
126 | |||
127 | mutex_unlock(&dev->empress_tsq.vb_lock); | ||
128 | |||
124 | return 0; | 129 | return 0; |
125 | } | 130 | } |
126 | 131 | ||
@@ -218,8 +223,7 @@ static int empress_enum_fmt_cap(struct file *file, void *priv, | |||
218 | static int empress_g_fmt_cap(struct file *file, void *priv, | 223 | static int empress_g_fmt_cap(struct file *file, void *priv, |
219 | struct v4l2_format *f) | 224 | struct v4l2_format *f) |
220 | { | 225 | { |
221 | struct saa7134_fh *fh = priv; | 226 | struct saa7134_dev *dev = file->private_data; |
222 | struct saa7134_dev *dev = fh->dev; | ||
223 | 227 | ||
224 | saa7134_i2c_call_clients(dev, VIDIOC_G_FMT, f); | 228 | saa7134_i2c_call_clients(dev, VIDIOC_G_FMT, f); |
225 | 229 | ||
@@ -232,8 +236,7 @@ static int empress_g_fmt_cap(struct file *file, void *priv, | |||
232 | static int empress_s_fmt_cap(struct file *file, void *priv, | 236 | static int empress_s_fmt_cap(struct file *file, void *priv, |
233 | struct v4l2_format *f) | 237 | struct v4l2_format *f) |
234 | { | 238 | { |
235 | struct saa7134_fh *fh = priv; | 239 | struct saa7134_dev *dev = file->private_data; |
236 | struct saa7134_dev *dev = fh->dev; | ||
237 | 240 | ||
238 | saa7134_i2c_call_clients(dev, VIDIOC_S_FMT, f); | 241 | saa7134_i2c_call_clients(dev, VIDIOC_S_FMT, f); |
239 | 242 | ||
@@ -247,8 +250,7 @@ static int empress_s_fmt_cap(struct file *file, void *priv, | |||
247 | static int empress_reqbufs(struct file *file, void *priv, | 250 | static int empress_reqbufs(struct file *file, void *priv, |
248 | struct v4l2_requestbuffers *p) | 251 | struct v4l2_requestbuffers *p) |
249 | { | 252 | { |
250 | struct saa7134_fh *fh = priv; | 253 | struct saa7134_dev *dev = file->private_data; |
251 | struct saa7134_dev *dev = fh->dev; | ||
252 | 254 | ||
253 | return videobuf_reqbufs(&dev->empress_tsq, p); | 255 | return videobuf_reqbufs(&dev->empress_tsq, p); |
254 | } | 256 | } |
@@ -256,24 +258,21 @@ static int empress_reqbufs(struct file *file, void *priv, | |||
256 | static int empress_querybuf(struct file *file, void *priv, | 258 | static int empress_querybuf(struct file *file, void *priv, |
257 | struct v4l2_buffer *b) | 259 | struct v4l2_buffer *b) |
258 | { | 260 | { |
259 | struct saa7134_fh *fh = priv; | 261 | struct saa7134_dev *dev = file->private_data; |
260 | struct saa7134_dev *dev = fh->dev; | ||
261 | 262 | ||
262 | return videobuf_querybuf(&dev->empress_tsq, b); | 263 | return videobuf_querybuf(&dev->empress_tsq, b); |
263 | } | 264 | } |
264 | 265 | ||
265 | static int empress_qbuf(struct file *file, void *priv, struct v4l2_buffer *b) | 266 | static int empress_qbuf(struct file *file, void *priv, struct v4l2_buffer *b) |
266 | { | 267 | { |
267 | struct saa7134_fh *fh = priv; | 268 | struct saa7134_dev *dev = file->private_data; |
268 | struct saa7134_dev *dev = fh->dev; | ||
269 | 269 | ||
270 | return videobuf_qbuf(&dev->empress_tsq, b); | 270 | return videobuf_qbuf(&dev->empress_tsq, b); |
271 | } | 271 | } |
272 | 272 | ||
273 | static int empress_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b) | 273 | static int empress_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b) |
274 | { | 274 | { |
275 | struct saa7134_fh *fh = priv; | 275 | struct saa7134_dev *dev = file->private_data; |
276 | struct saa7134_dev *dev = fh->dev; | ||
277 | 276 | ||
278 | return videobuf_dqbuf(&dev->empress_tsq, b, | 277 | return videobuf_dqbuf(&dev->empress_tsq, b, |
279 | file->f_flags & O_NONBLOCK); | 278 | file->f_flags & O_NONBLOCK); |
@@ -282,8 +281,7 @@ static int empress_dqbuf(struct file *file, void *priv, struct v4l2_buffer *b) | |||
282 | static int empress_streamon(struct file *file, void *priv, | 281 | static int empress_streamon(struct file *file, void *priv, |
283 | enum v4l2_buf_type type) | 282 | enum v4l2_buf_type type) |
284 | { | 283 | { |
285 | struct saa7134_fh *fh = priv; | 284 | struct saa7134_dev *dev = file->private_data; |
286 | struct saa7134_dev *dev = fh->dev; | ||
287 | 285 | ||
288 | return videobuf_streamon(&dev->empress_tsq); | 286 | return videobuf_streamon(&dev->empress_tsq); |
289 | } | 287 | } |
@@ -291,8 +289,7 @@ static int empress_streamon(struct file *file, void *priv, | |||
291 | static int empress_streamoff(struct file *file, void *priv, | 289 | static int empress_streamoff(struct file *file, void *priv, |
292 | enum v4l2_buf_type type) | 290 | enum v4l2_buf_type type) |
293 | { | 291 | { |
294 | struct saa7134_fh *fh = priv; | 292 | struct saa7134_dev *dev = file->private_data; |
295 | struct saa7134_dev *dev = fh->dev; | ||
296 | 293 | ||
297 | return videobuf_streamoff(&dev->empress_tsq); | 294 | return videobuf_streamoff(&dev->empress_tsq); |
298 | } | 295 | } |
@@ -300,8 +297,7 @@ static int empress_streamoff(struct file *file, void *priv, | |||
300 | static int empress_s_ext_ctrls(struct file *file, void *priv, | 297 | static int empress_s_ext_ctrls(struct file *file, void *priv, |
301 | struct v4l2_ext_controls *ctrls) | 298 | struct v4l2_ext_controls *ctrls) |
302 | { | 299 | { |
303 | struct saa7134_fh *fh = priv; | 300 | struct saa7134_dev *dev = file->private_data; |
304 | struct saa7134_dev *dev = fh->dev; | ||
305 | 301 | ||
306 | /* count == 0 is abused in saa6752hs.c, so that special | 302 | /* count == 0 is abused in saa6752hs.c, so that special |
307 | case is handled here explicitly. */ | 303 | case is handled here explicitly. */ |
@@ -320,8 +316,7 @@ static int empress_s_ext_ctrls(struct file *file, void *priv, | |||
320 | static int empress_g_ext_ctrls(struct file *file, void *priv, | 316 | static int empress_g_ext_ctrls(struct file *file, void *priv, |
321 | struct v4l2_ext_controls *ctrls) | 317 | struct v4l2_ext_controls *ctrls) |
322 | { | 318 | { |
323 | struct saa7134_fh *fh = priv; | 319 | struct saa7134_dev *dev = file->private_data; |
324 | struct saa7134_dev *dev = fh->dev; | ||
325 | 320 | ||
326 | if (ctrls->ctrl_class != V4L2_CTRL_CLASS_MPEG) | 321 | if (ctrls->ctrl_class != V4L2_CTRL_CLASS_MPEG) |
327 | return -EINVAL; | 322 | return -EINVAL; |
diff --git a/drivers/media/video/saa7134/saa7134-input.c b/drivers/media/video/saa7134/saa7134-input.c index 919632b10aae..76e6501d238d 100644 --- a/drivers/media/video/saa7134/saa7134-input.c +++ b/drivers/media/video/saa7134/saa7134-input.c | |||
@@ -323,6 +323,15 @@ int saa7134_input_init1(struct saa7134_dev *dev) | |||
323 | saa_setb(SAA7134_GPIO_GPMODE1, 0x1); | 323 | saa_setb(SAA7134_GPIO_GPMODE1, 0x1); |
324 | saa_setb(SAA7134_GPIO_GPSTATUS1, 0x1); | 324 | saa_setb(SAA7134_GPIO_GPSTATUS1, 0x1); |
325 | break; | 325 | break; |
326 | case SAA7134_BOARD_AVERMEDIA_A16D: | ||
327 | ir_codes = ir_codes_avermedia_a16d; | ||
328 | mask_keycode = 0x02F200; | ||
329 | mask_keydown = 0x000400; | ||
330 | polling = 50; /* ms */ | ||
331 | /* Without this we won't receive key up events */ | ||
332 | saa_setb(SAA7134_GPIO_GPMODE1, 0x1); | ||
333 | saa_setb(SAA7134_GPIO_GPSTATUS1, 0x1); | ||
334 | break; | ||
326 | case SAA7134_BOARD_KWORLD_TERMINATOR: | 335 | case SAA7134_BOARD_KWORLD_TERMINATOR: |
327 | ir_codes = ir_codes_pixelview; | 336 | ir_codes = ir_codes_pixelview; |
328 | mask_keycode = 0x00001f; | 337 | mask_keycode = 0x00001f; |
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c index a1b92446c8b4..d015bfe00950 100644 --- a/drivers/media/video/soc_camera.c +++ b/drivers/media/video/soc_camera.c | |||
@@ -763,15 +763,6 @@ static struct device_driver ic_drv = { | |||
763 | .owner = THIS_MODULE, | 763 | .owner = THIS_MODULE, |
764 | }; | 764 | }; |
765 | 765 | ||
766 | /* | ||
767 | * Image capture host - this is a host device, not a bus device, so, | ||
768 | * no bus reference, no probing. | ||
769 | */ | ||
770 | static struct class soc_camera_host_class = { | ||
771 | .owner = THIS_MODULE, | ||
772 | .name = "camera_host", | ||
773 | }; | ||
774 | |||
775 | static void dummy_release(struct device *dev) | 766 | static void dummy_release(struct device *dev) |
776 | { | 767 | { |
777 | } | 768 | } |
@@ -801,7 +792,6 @@ int soc_camera_host_register(struct soc_camera_host *ici) | |||
801 | 792 | ||
802 | /* Number might be equal to the platform device ID */ | 793 | /* Number might be equal to the platform device ID */ |
803 | sprintf(ici->dev.bus_id, "camera_host%d", ici->nr); | 794 | sprintf(ici->dev.bus_id, "camera_host%d", ici->nr); |
804 | ici->dev.class = &soc_camera_host_class; | ||
805 | 795 | ||
806 | mutex_lock(&list_lock); | 796 | mutex_lock(&list_lock); |
807 | list_for_each_entry(ix, &hosts, list) { | 797 | list_for_each_entry(ix, &hosts, list) { |
@@ -1003,14 +993,9 @@ static int __init soc_camera_init(void) | |||
1003 | ret = driver_register(&ic_drv); | 993 | ret = driver_register(&ic_drv); |
1004 | if (ret) | 994 | if (ret) |
1005 | goto edrvr; | 995 | goto edrvr; |
1006 | ret = class_register(&soc_camera_host_class); | ||
1007 | if (ret) | ||
1008 | goto eclr; | ||
1009 | 996 | ||
1010 | return 0; | 997 | return 0; |
1011 | 998 | ||
1012 | eclr: | ||
1013 | driver_unregister(&ic_drv); | ||
1014 | edrvr: | 999 | edrvr: |
1015 | bus_unregister(&soc_camera_bus_type); | 1000 | bus_unregister(&soc_camera_bus_type); |
1016 | return ret; | 1001 | return ret; |
@@ -1018,7 +1003,6 @@ edrvr: | |||
1018 | 1003 | ||
1019 | static void __exit soc_camera_exit(void) | 1004 | static void __exit soc_camera_exit(void) |
1020 | { | 1005 | { |
1021 | class_unregister(&soc_camera_host_class); | ||
1022 | driver_unregister(&ic_drv); | 1006 | driver_unregister(&ic_drv); |
1023 | bus_unregister(&soc_camera_bus_type); | 1007 | bus_unregister(&soc_camera_bus_type); |
1024 | } | 1008 | } |
diff --git a/drivers/media/video/uvc/Makefile b/drivers/media/video/uvc/Makefile new file mode 100644 index 000000000000..968c1994eda0 --- /dev/null +++ b/drivers/media/video/uvc/Makefile | |||
@@ -0,0 +1,3 @@ | |||
1 | uvcvideo-objs := uvc_driver.o uvc_queue.o uvc_v4l2.o uvc_video.o uvc_ctrl.o \ | ||
2 | uvc_status.o uvc_isight.o | ||
3 | obj-$(CONFIG_USB_VIDEO_CLASS) += uvcvideo.o | ||
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c new file mode 100644 index 000000000000..f0ee46d15540 --- /dev/null +++ b/drivers/media/video/uvc/uvc_ctrl.c | |||
@@ -0,0 +1,1256 @@ | |||
1 | /* | ||
2 | * uvc_ctrl.c -- USB Video Class driver - Controls | ||
3 | * | ||
4 | * Copyright (C) 2005-2008 | ||
5 | * Laurent Pinchart (laurent.pinchart@skynet.be) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/version.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/uaccess.h> | ||
19 | #include <linux/usb.h> | ||
20 | #include <linux/videodev2.h> | ||
21 | #include <linux/vmalloc.h> | ||
22 | #include <linux/wait.h> | ||
23 | #include <asm/atomic.h> | ||
24 | |||
25 | #include "uvcvideo.h" | ||
26 | |||
27 | #define UVC_CTRL_NDATA 2 | ||
28 | #define UVC_CTRL_DATA_CURRENT 0 | ||
29 | #define UVC_CTRL_DATA_BACKUP 1 | ||
30 | |||
31 | /* ------------------------------------------------------------------------ | ||
32 | * Control, formats, ... | ||
33 | */ | ||
34 | |||
35 | static struct uvc_control_info uvc_ctrls[] = { | ||
36 | { | ||
37 | .entity = UVC_GUID_UVC_PROCESSING, | ||
38 | .selector = PU_BRIGHTNESS_CONTROL, | ||
39 | .index = 0, | ||
40 | .size = 2, | ||
41 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
42 | | UVC_CONTROL_RESTORE, | ||
43 | }, | ||
44 | { | ||
45 | .entity = UVC_GUID_UVC_PROCESSING, | ||
46 | .selector = PU_CONTRAST_CONTROL, | ||
47 | .index = 1, | ||
48 | .size = 2, | ||
49 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
50 | | UVC_CONTROL_RESTORE, | ||
51 | }, | ||
52 | { | ||
53 | .entity = UVC_GUID_UVC_PROCESSING, | ||
54 | .selector = PU_HUE_CONTROL, | ||
55 | .index = 2, | ||
56 | .size = 2, | ||
57 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
58 | | UVC_CONTROL_RESTORE | UVC_CONTROL_AUTO_UPDATE, | ||
59 | }, | ||
60 | { | ||
61 | .entity = UVC_GUID_UVC_PROCESSING, | ||
62 | .selector = PU_SATURATION_CONTROL, | ||
63 | .index = 3, | ||
64 | .size = 2, | ||
65 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
66 | | UVC_CONTROL_RESTORE, | ||
67 | }, | ||
68 | { | ||
69 | .entity = UVC_GUID_UVC_PROCESSING, | ||
70 | .selector = PU_SHARPNESS_CONTROL, | ||
71 | .index = 4, | ||
72 | .size = 2, | ||
73 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
74 | | UVC_CONTROL_RESTORE, | ||
75 | }, | ||
76 | { | ||
77 | .entity = UVC_GUID_UVC_PROCESSING, | ||
78 | .selector = PU_GAMMA_CONTROL, | ||
79 | .index = 5, | ||
80 | .size = 2, | ||
81 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
82 | | UVC_CONTROL_RESTORE, | ||
83 | }, | ||
84 | { | ||
85 | .entity = UVC_GUID_UVC_PROCESSING, | ||
86 | .selector = PU_BACKLIGHT_COMPENSATION_CONTROL, | ||
87 | .index = 8, | ||
88 | .size = 2, | ||
89 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
90 | | UVC_CONTROL_RESTORE, | ||
91 | }, | ||
92 | { | ||
93 | .entity = UVC_GUID_UVC_PROCESSING, | ||
94 | .selector = PU_GAIN_CONTROL, | ||
95 | .index = 9, | ||
96 | .size = 2, | ||
97 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
98 | | UVC_CONTROL_RESTORE, | ||
99 | }, | ||
100 | { | ||
101 | .entity = UVC_GUID_UVC_PROCESSING, | ||
102 | .selector = PU_POWER_LINE_FREQUENCY_CONTROL, | ||
103 | .index = 10, | ||
104 | .size = 1, | ||
105 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
106 | | UVC_CONTROL_RESTORE, | ||
107 | }, | ||
108 | { | ||
109 | .entity = UVC_GUID_UVC_PROCESSING, | ||
110 | .selector = PU_HUE_AUTO_CONTROL, | ||
111 | .index = 11, | ||
112 | .size = 1, | ||
113 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_CUR | ||
114 | | UVC_CONTROL_GET_DEF | UVC_CONTROL_RESTORE, | ||
115 | }, | ||
116 | { | ||
117 | .entity = UVC_GUID_UVC_CAMERA, | ||
118 | .selector = CT_AE_MODE_CONTROL, | ||
119 | .index = 1, | ||
120 | .size = 1, | ||
121 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_CUR | ||
122 | | UVC_CONTROL_GET_DEF | UVC_CONTROL_GET_RES | ||
123 | | UVC_CONTROL_RESTORE, | ||
124 | }, | ||
125 | { | ||
126 | .entity = UVC_GUID_UVC_CAMERA, | ||
127 | .selector = CT_AE_PRIORITY_CONTROL, | ||
128 | .index = 2, | ||
129 | .size = 1, | ||
130 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_CUR | ||
131 | | UVC_CONTROL_RESTORE, | ||
132 | }, | ||
133 | { | ||
134 | .entity = UVC_GUID_UVC_CAMERA, | ||
135 | .selector = CT_EXPOSURE_TIME_ABSOLUTE_CONTROL, | ||
136 | .index = 3, | ||
137 | .size = 4, | ||
138 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
139 | | UVC_CONTROL_RESTORE, | ||
140 | }, | ||
141 | { | ||
142 | .entity = UVC_GUID_UVC_CAMERA, | ||
143 | .selector = CT_FOCUS_ABSOLUTE_CONTROL, | ||
144 | .index = 5, | ||
145 | .size = 2, | ||
146 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
147 | | UVC_CONTROL_RESTORE | UVC_CONTROL_AUTO_UPDATE, | ||
148 | }, | ||
149 | { | ||
150 | .entity = UVC_GUID_UVC_CAMERA, | ||
151 | .selector = CT_FOCUS_AUTO_CONTROL, | ||
152 | .index = 17, | ||
153 | .size = 1, | ||
154 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_CUR | ||
155 | | UVC_CONTROL_GET_DEF | UVC_CONTROL_RESTORE, | ||
156 | }, | ||
157 | { | ||
158 | .entity = UVC_GUID_UVC_PROCESSING, | ||
159 | .selector = PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL, | ||
160 | .index = 12, | ||
161 | .size = 1, | ||
162 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_CUR | ||
163 | | UVC_CONTROL_GET_DEF | UVC_CONTROL_RESTORE, | ||
164 | }, | ||
165 | { | ||
166 | .entity = UVC_GUID_UVC_PROCESSING, | ||
167 | .selector = PU_WHITE_BALANCE_TEMPERATURE_CONTROL, | ||
168 | .index = 6, | ||
169 | .size = 2, | ||
170 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
171 | | UVC_CONTROL_RESTORE | UVC_CONTROL_AUTO_UPDATE, | ||
172 | }, | ||
173 | { | ||
174 | .entity = UVC_GUID_UVC_PROCESSING, | ||
175 | .selector = PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL, | ||
176 | .index = 13, | ||
177 | .size = 1, | ||
178 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_CUR | ||
179 | | UVC_CONTROL_GET_DEF | UVC_CONTROL_RESTORE, | ||
180 | }, | ||
181 | { | ||
182 | .entity = UVC_GUID_UVC_PROCESSING, | ||
183 | .selector = PU_WHITE_BALANCE_COMPONENT_CONTROL, | ||
184 | .index = 7, | ||
185 | .size = 4, | ||
186 | .flags = UVC_CONTROL_SET_CUR | UVC_CONTROL_GET_RANGE | ||
187 | | UVC_CONTROL_RESTORE | UVC_CONTROL_AUTO_UPDATE, | ||
188 | }, | ||
189 | }; | ||
190 | |||
191 | static struct uvc_menu_info power_line_frequency_controls[] = { | ||
192 | { 0, "Disabled" }, | ||
193 | { 1, "50 Hz" }, | ||
194 | { 2, "60 Hz" }, | ||
195 | }; | ||
196 | |||
197 | static struct uvc_menu_info exposure_auto_controls[] = { | ||
198 | { 1, "Manual Mode" }, | ||
199 | { 2, "Auto Mode" }, | ||
200 | { 4, "Shutter Priority Mode" }, | ||
201 | { 8, "Aperture Priority Mode" }, | ||
202 | }; | ||
203 | |||
204 | static struct uvc_control_mapping uvc_ctrl_mappings[] = { | ||
205 | { | ||
206 | .id = V4L2_CID_BRIGHTNESS, | ||
207 | .name = "Brightness", | ||
208 | .entity = UVC_GUID_UVC_PROCESSING, | ||
209 | .selector = PU_BRIGHTNESS_CONTROL, | ||
210 | .size = 16, | ||
211 | .offset = 0, | ||
212 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
213 | .data_type = UVC_CTRL_DATA_TYPE_SIGNED, | ||
214 | }, | ||
215 | { | ||
216 | .id = V4L2_CID_CONTRAST, | ||
217 | .name = "Contrast", | ||
218 | .entity = UVC_GUID_UVC_PROCESSING, | ||
219 | .selector = PU_CONTRAST_CONTROL, | ||
220 | .size = 16, | ||
221 | .offset = 0, | ||
222 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
223 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
224 | }, | ||
225 | { | ||
226 | .id = V4L2_CID_HUE, | ||
227 | .name = "Hue", | ||
228 | .entity = UVC_GUID_UVC_PROCESSING, | ||
229 | .selector = PU_HUE_CONTROL, | ||
230 | .size = 16, | ||
231 | .offset = 0, | ||
232 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
233 | .data_type = UVC_CTRL_DATA_TYPE_SIGNED, | ||
234 | }, | ||
235 | { | ||
236 | .id = V4L2_CID_SATURATION, | ||
237 | .name = "Saturation", | ||
238 | .entity = UVC_GUID_UVC_PROCESSING, | ||
239 | .selector = PU_SATURATION_CONTROL, | ||
240 | .size = 16, | ||
241 | .offset = 0, | ||
242 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
243 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
244 | }, | ||
245 | { | ||
246 | .id = V4L2_CID_SHARPNESS, | ||
247 | .name = "Sharpness", | ||
248 | .entity = UVC_GUID_UVC_PROCESSING, | ||
249 | .selector = PU_SHARPNESS_CONTROL, | ||
250 | .size = 16, | ||
251 | .offset = 0, | ||
252 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
253 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
254 | }, | ||
255 | { | ||
256 | .id = V4L2_CID_GAMMA, | ||
257 | .name = "Gamma", | ||
258 | .entity = UVC_GUID_UVC_PROCESSING, | ||
259 | .selector = PU_GAMMA_CONTROL, | ||
260 | .size = 16, | ||
261 | .offset = 0, | ||
262 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
263 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
264 | }, | ||
265 | { | ||
266 | .id = V4L2_CID_BACKLIGHT_COMPENSATION, | ||
267 | .name = "Backlight Compensation", | ||
268 | .entity = UVC_GUID_UVC_PROCESSING, | ||
269 | .selector = PU_BACKLIGHT_COMPENSATION_CONTROL, | ||
270 | .size = 16, | ||
271 | .offset = 0, | ||
272 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
273 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
274 | }, | ||
275 | { | ||
276 | .id = V4L2_CID_GAIN, | ||
277 | .name = "Gain", | ||
278 | .entity = UVC_GUID_UVC_PROCESSING, | ||
279 | .selector = PU_GAIN_CONTROL, | ||
280 | .size = 16, | ||
281 | .offset = 0, | ||
282 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
283 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
284 | }, | ||
285 | { | ||
286 | .id = V4L2_CID_POWER_LINE_FREQUENCY, | ||
287 | .name = "Power Line Frequency", | ||
288 | .entity = UVC_GUID_UVC_PROCESSING, | ||
289 | .selector = PU_POWER_LINE_FREQUENCY_CONTROL, | ||
290 | .size = 2, | ||
291 | .offset = 0, | ||
292 | .v4l2_type = V4L2_CTRL_TYPE_MENU, | ||
293 | .data_type = UVC_CTRL_DATA_TYPE_ENUM, | ||
294 | .menu_info = power_line_frequency_controls, | ||
295 | .menu_count = ARRAY_SIZE(power_line_frequency_controls), | ||
296 | }, | ||
297 | { | ||
298 | .id = V4L2_CID_HUE_AUTO, | ||
299 | .name = "Hue, Auto", | ||
300 | .entity = UVC_GUID_UVC_PROCESSING, | ||
301 | .selector = PU_HUE_AUTO_CONTROL, | ||
302 | .size = 1, | ||
303 | .offset = 0, | ||
304 | .v4l2_type = V4L2_CTRL_TYPE_BOOLEAN, | ||
305 | .data_type = UVC_CTRL_DATA_TYPE_BOOLEAN, | ||
306 | }, | ||
307 | { | ||
308 | .id = V4L2_CID_EXPOSURE_AUTO, | ||
309 | .name = "Exposure, Auto", | ||
310 | .entity = UVC_GUID_UVC_CAMERA, | ||
311 | .selector = CT_AE_MODE_CONTROL, | ||
312 | .size = 4, | ||
313 | .offset = 0, | ||
314 | .v4l2_type = V4L2_CTRL_TYPE_MENU, | ||
315 | .data_type = UVC_CTRL_DATA_TYPE_BITMASK, | ||
316 | .menu_info = exposure_auto_controls, | ||
317 | .menu_count = ARRAY_SIZE(exposure_auto_controls), | ||
318 | }, | ||
319 | { | ||
320 | .id = V4L2_CID_EXPOSURE_AUTO_PRIORITY, | ||
321 | .name = "Exposure, Auto Priority", | ||
322 | .entity = UVC_GUID_UVC_CAMERA, | ||
323 | .selector = CT_AE_PRIORITY_CONTROL, | ||
324 | .size = 1, | ||
325 | .offset = 0, | ||
326 | .v4l2_type = V4L2_CTRL_TYPE_BOOLEAN, | ||
327 | .data_type = UVC_CTRL_DATA_TYPE_BOOLEAN, | ||
328 | }, | ||
329 | { | ||
330 | .id = V4L2_CID_EXPOSURE_ABSOLUTE, | ||
331 | .name = "Exposure (Absolute)", | ||
332 | .entity = UVC_GUID_UVC_CAMERA, | ||
333 | .selector = CT_EXPOSURE_TIME_ABSOLUTE_CONTROL, | ||
334 | .size = 32, | ||
335 | .offset = 0, | ||
336 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
337 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
338 | }, | ||
339 | { | ||
340 | .id = V4L2_CID_AUTO_WHITE_BALANCE, | ||
341 | .name = "White Balance Temperature, Auto", | ||
342 | .entity = UVC_GUID_UVC_PROCESSING, | ||
343 | .selector = PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL, | ||
344 | .size = 1, | ||
345 | .offset = 0, | ||
346 | .v4l2_type = V4L2_CTRL_TYPE_BOOLEAN, | ||
347 | .data_type = UVC_CTRL_DATA_TYPE_BOOLEAN, | ||
348 | }, | ||
349 | { | ||
350 | .id = V4L2_CID_WHITE_BALANCE_TEMPERATURE, | ||
351 | .name = "White Balance Temperature", | ||
352 | .entity = UVC_GUID_UVC_PROCESSING, | ||
353 | .selector = PU_WHITE_BALANCE_TEMPERATURE_CONTROL, | ||
354 | .size = 16, | ||
355 | .offset = 0, | ||
356 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
357 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
358 | }, | ||
359 | { | ||
360 | .id = V4L2_CID_AUTO_WHITE_BALANCE, | ||
361 | .name = "White Balance Component, Auto", | ||
362 | .entity = UVC_GUID_UVC_PROCESSING, | ||
363 | .selector = PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL, | ||
364 | .size = 1, | ||
365 | .offset = 0, | ||
366 | .v4l2_type = V4L2_CTRL_TYPE_BOOLEAN, | ||
367 | .data_type = UVC_CTRL_DATA_TYPE_BOOLEAN, | ||
368 | }, | ||
369 | { | ||
370 | .id = V4L2_CID_BLUE_BALANCE, | ||
371 | .name = "White Balance Blue Component", | ||
372 | .entity = UVC_GUID_UVC_PROCESSING, | ||
373 | .selector = PU_WHITE_BALANCE_COMPONENT_CONTROL, | ||
374 | .size = 16, | ||
375 | .offset = 0, | ||
376 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
377 | .data_type = UVC_CTRL_DATA_TYPE_SIGNED, | ||
378 | }, | ||
379 | { | ||
380 | .id = V4L2_CID_RED_BALANCE, | ||
381 | .name = "White Balance Red Component", | ||
382 | .entity = UVC_GUID_UVC_PROCESSING, | ||
383 | .selector = PU_WHITE_BALANCE_COMPONENT_CONTROL, | ||
384 | .size = 16, | ||
385 | .offset = 16, | ||
386 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
387 | .data_type = UVC_CTRL_DATA_TYPE_SIGNED, | ||
388 | }, | ||
389 | { | ||
390 | .id = V4L2_CID_FOCUS_ABSOLUTE, | ||
391 | .name = "Focus (absolute)", | ||
392 | .entity = UVC_GUID_UVC_CAMERA, | ||
393 | .selector = CT_FOCUS_ABSOLUTE_CONTROL, | ||
394 | .size = 16, | ||
395 | .offset = 0, | ||
396 | .v4l2_type = V4L2_CTRL_TYPE_INTEGER, | ||
397 | .data_type = UVC_CTRL_DATA_TYPE_UNSIGNED, | ||
398 | }, | ||
399 | { | ||
400 | .id = V4L2_CID_FOCUS_AUTO, | ||
401 | .name = "Focus, Auto", | ||
402 | .entity = UVC_GUID_UVC_CAMERA, | ||
403 | .selector = CT_FOCUS_AUTO_CONTROL, | ||
404 | .size = 1, | ||
405 | .offset = 0, | ||
406 | .v4l2_type = V4L2_CTRL_TYPE_BOOLEAN, | ||
407 | .data_type = UVC_CTRL_DATA_TYPE_BOOLEAN, | ||
408 | }, | ||
409 | }; | ||
410 | |||
411 | /* ------------------------------------------------------------------------ | ||
412 | * Utility functions | ||
413 | */ | ||
414 | |||
415 | static inline __u8 *uvc_ctrl_data(struct uvc_control *ctrl, int id) | ||
416 | { | ||
417 | return ctrl->data + id * ctrl->info->size; | ||
418 | } | ||
419 | |||
420 | static inline int uvc_get_bit(const __u8 *data, int bit) | ||
421 | { | ||
422 | return (data[bit >> 3] >> (bit & 7)) & 1; | ||
423 | } | ||
424 | |||
425 | /* Extract the bit string specified by mapping->offset and mapping->size | ||
426 | * from the little-endian data stored at 'data' and return the result as | ||
427 | * a signed 32bit integer. Sign extension will be performed if the mapping | ||
428 | * references a signed data type. | ||
429 | */ | ||
430 | static __s32 uvc_get_le_value(const __u8 *data, | ||
431 | struct uvc_control_mapping *mapping) | ||
432 | { | ||
433 | int bits = mapping->size; | ||
434 | int offset = mapping->offset; | ||
435 | __s32 value = 0; | ||
436 | __u8 mask; | ||
437 | |||
438 | data += offset / 8; | ||
439 | offset &= 7; | ||
440 | mask = ((1LL << bits) - 1) << offset; | ||
441 | |||
442 | for (; bits > 0; data++) { | ||
443 | __u8 byte = *data & mask; | ||
444 | value |= offset > 0 ? (byte >> offset) : (byte << (-offset)); | ||
445 | bits -= 8 - (offset > 0 ? offset : 0); | ||
446 | offset -= 8; | ||
447 | mask = (1 << bits) - 1; | ||
448 | } | ||
449 | |||
450 | /* Sign-extend the value if needed */ | ||
451 | if (mapping->data_type == UVC_CTRL_DATA_TYPE_SIGNED) | ||
452 | value |= -(value & (1 << (mapping->size - 1))); | ||
453 | |||
454 | return value; | ||
455 | } | ||
456 | |||
457 | /* Set the bit string specified by mapping->offset and mapping->size | ||
458 | * in the little-endian data stored at 'data' to the value 'value'. | ||
459 | */ | ||
460 | static void uvc_set_le_value(__s32 value, __u8 *data, | ||
461 | struct uvc_control_mapping *mapping) | ||
462 | { | ||
463 | int bits = mapping->size; | ||
464 | int offset = mapping->offset; | ||
465 | __u8 mask; | ||
466 | |||
467 | data += offset / 8; | ||
468 | offset &= 7; | ||
469 | |||
470 | for (; bits > 0; data++) { | ||
471 | mask = ((1LL << bits) - 1) << offset; | ||
472 | *data = (*data & ~mask) | ((value << offset) & mask); | ||
473 | value >>= offset ? offset : 8; | ||
474 | bits -= 8 - offset; | ||
475 | offset = 0; | ||
476 | } | ||
477 | } | ||
478 | |||
479 | /* ------------------------------------------------------------------------ | ||
480 | * Terminal and unit management | ||
481 | */ | ||
482 | |||
483 | static const __u8 uvc_processing_guid[16] = UVC_GUID_UVC_PROCESSING; | ||
484 | static const __u8 uvc_camera_guid[16] = UVC_GUID_UVC_CAMERA; | ||
485 | static const __u8 uvc_media_transport_input_guid[16] = | ||
486 | UVC_GUID_UVC_MEDIA_TRANSPORT_INPUT; | ||
487 | |||
488 | static int uvc_entity_match_guid(struct uvc_entity *entity, __u8 guid[16]) | ||
489 | { | ||
490 | switch (UVC_ENTITY_TYPE(entity)) { | ||
491 | case ITT_CAMERA: | ||
492 | return memcmp(uvc_camera_guid, guid, 16) == 0; | ||
493 | |||
494 | case ITT_MEDIA_TRANSPORT_INPUT: | ||
495 | return memcmp(uvc_media_transport_input_guid, guid, 16) == 0; | ||
496 | |||
497 | case VC_PROCESSING_UNIT: | ||
498 | return memcmp(uvc_processing_guid, guid, 16) == 0; | ||
499 | |||
500 | case VC_EXTENSION_UNIT: | ||
501 | return memcmp(entity->extension.guidExtensionCode, | ||
502 | guid, 16) == 0; | ||
503 | |||
504 | default: | ||
505 | return 0; | ||
506 | } | ||
507 | } | ||
508 | |||
509 | /* ------------------------------------------------------------------------ | ||
510 | * UVC Controls | ||
511 | */ | ||
512 | |||
513 | static void __uvc_find_control(struct uvc_entity *entity, __u32 v4l2_id, | ||
514 | struct uvc_control_mapping **mapping, struct uvc_control **control, | ||
515 | int next) | ||
516 | { | ||
517 | struct uvc_control *ctrl; | ||
518 | struct uvc_control_mapping *map; | ||
519 | unsigned int i; | ||
520 | |||
521 | if (entity == NULL) | ||
522 | return; | ||
523 | |||
524 | for (i = 0; i < entity->ncontrols; ++i) { | ||
525 | ctrl = &entity->controls[i]; | ||
526 | if (ctrl->info == NULL) | ||
527 | continue; | ||
528 | |||
529 | list_for_each_entry(map, &ctrl->info->mappings, list) { | ||
530 | if ((map->id == v4l2_id) && !next) { | ||
531 | *control = ctrl; | ||
532 | *mapping = map; | ||
533 | return; | ||
534 | } | ||
535 | |||
536 | if ((*mapping == NULL || (*mapping)->id > map->id) && | ||
537 | (map->id > v4l2_id) && next) { | ||
538 | *control = ctrl; | ||
539 | *mapping = map; | ||
540 | } | ||
541 | } | ||
542 | } | ||
543 | } | ||
544 | |||
545 | struct uvc_control *uvc_find_control(struct uvc_video_device *video, | ||
546 | __u32 v4l2_id, struct uvc_control_mapping **mapping) | ||
547 | { | ||
548 | struct uvc_control *ctrl = NULL; | ||
549 | struct uvc_entity *entity; | ||
550 | int next = v4l2_id & V4L2_CTRL_FLAG_NEXT_CTRL; | ||
551 | |||
552 | *mapping = NULL; | ||
553 | |||
554 | /* Mask the query flags. */ | ||
555 | v4l2_id &= V4L2_CTRL_ID_MASK; | ||
556 | |||
557 | /* Find the control. */ | ||
558 | __uvc_find_control(video->processing, v4l2_id, mapping, &ctrl, next); | ||
559 | if (ctrl && !next) | ||
560 | return ctrl; | ||
561 | |||
562 | list_for_each_entry(entity, &video->iterms, chain) { | ||
563 | __uvc_find_control(entity, v4l2_id, mapping, &ctrl, next); | ||
564 | if (ctrl && !next) | ||
565 | return ctrl; | ||
566 | } | ||
567 | |||
568 | list_for_each_entry(entity, &video->extensions, chain) { | ||
569 | __uvc_find_control(entity, v4l2_id, mapping, &ctrl, next); | ||
570 | if (ctrl && !next) | ||
571 | return ctrl; | ||
572 | } | ||
573 | |||
574 | if (ctrl == NULL && !next) | ||
575 | uvc_trace(UVC_TRACE_CONTROL, "Control 0x%08x not found.\n", | ||
576 | v4l2_id); | ||
577 | |||
578 | return ctrl; | ||
579 | } | ||
580 | |||
581 | int uvc_query_v4l2_ctrl(struct uvc_video_device *video, | ||
582 | struct v4l2_queryctrl *v4l2_ctrl) | ||
583 | { | ||
584 | struct uvc_control *ctrl; | ||
585 | struct uvc_control_mapping *mapping; | ||
586 | struct uvc_menu_info *menu; | ||
587 | unsigned int i; | ||
588 | __u8 data[8]; | ||
589 | int ret; | ||
590 | |||
591 | ctrl = uvc_find_control(video, v4l2_ctrl->id, &mapping); | ||
592 | if (ctrl == NULL) | ||
593 | return -EINVAL; | ||
594 | |||
595 | v4l2_ctrl->id = mapping->id; | ||
596 | v4l2_ctrl->type = mapping->v4l2_type; | ||
597 | strncpy(v4l2_ctrl->name, mapping->name, sizeof v4l2_ctrl->name); | ||
598 | v4l2_ctrl->flags = 0; | ||
599 | |||
600 | if (!(ctrl->info->flags & UVC_CONTROL_SET_CUR)) | ||
601 | v4l2_ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY; | ||
602 | |||
603 | if (ctrl->info->flags & UVC_CONTROL_GET_DEF) { | ||
604 | if ((ret = uvc_query_ctrl(video->dev, GET_DEF, ctrl->entity->id, | ||
605 | video->dev->intfnum, ctrl->info->selector, | ||
606 | &data, ctrl->info->size)) < 0) | ||
607 | return ret; | ||
608 | v4l2_ctrl->default_value = uvc_get_le_value(data, mapping); | ||
609 | } | ||
610 | |||
611 | if (mapping->v4l2_type == V4L2_CTRL_TYPE_MENU) { | ||
612 | v4l2_ctrl->minimum = 0; | ||
613 | v4l2_ctrl->maximum = mapping->menu_count - 1; | ||
614 | v4l2_ctrl->step = 1; | ||
615 | |||
616 | menu = mapping->menu_info; | ||
617 | for (i = 0; i < mapping->menu_count; ++i, ++menu) { | ||
618 | if (menu->value == v4l2_ctrl->default_value) { | ||
619 | v4l2_ctrl->default_value = i; | ||
620 | break; | ||
621 | } | ||
622 | } | ||
623 | |||
624 | return 0; | ||
625 | } | ||
626 | |||
627 | if (ctrl->info->flags & UVC_CONTROL_GET_MIN) { | ||
628 | if ((ret = uvc_query_ctrl(video->dev, GET_MIN, ctrl->entity->id, | ||
629 | video->dev->intfnum, ctrl->info->selector, | ||
630 | &data, ctrl->info->size)) < 0) | ||
631 | return ret; | ||
632 | v4l2_ctrl->minimum = uvc_get_le_value(data, mapping); | ||
633 | } | ||
634 | if (ctrl->info->flags & UVC_CONTROL_GET_MAX) { | ||
635 | if ((ret = uvc_query_ctrl(video->dev, GET_MAX, ctrl->entity->id, | ||
636 | video->dev->intfnum, ctrl->info->selector, | ||
637 | &data, ctrl->info->size)) < 0) | ||
638 | return ret; | ||
639 | v4l2_ctrl->maximum = uvc_get_le_value(data, mapping); | ||
640 | } | ||
641 | if (ctrl->info->flags & UVC_CONTROL_GET_RES) { | ||
642 | if ((ret = uvc_query_ctrl(video->dev, GET_RES, ctrl->entity->id, | ||
643 | video->dev->intfnum, ctrl->info->selector, | ||
644 | &data, ctrl->info->size)) < 0) | ||
645 | return ret; | ||
646 | v4l2_ctrl->step = uvc_get_le_value(data, mapping); | ||
647 | } | ||
648 | |||
649 | return 0; | ||
650 | } | ||
651 | |||
652 | |||
653 | /* -------------------------------------------------------------------------- | ||
654 | * Control transactions | ||
655 | * | ||
656 | * To make extended set operations as atomic as the hardware allows, controls | ||
657 | * are handled using begin/commit/rollback operations. | ||
658 | * | ||
659 | * At the beginning of a set request, uvc_ctrl_begin should be called to | ||
660 | * initialize the request. This function acquires the control lock. | ||
661 | * | ||
662 | * When setting a control, the new value is stored in the control data field | ||
663 | * at position UVC_CTRL_DATA_CURRENT. The control is then marked as dirty for | ||
664 | * later processing. If the UVC and V4L2 control sizes differ, the current | ||
665 | * value is loaded from the hardware before storing the new value in the data | ||
666 | * field. | ||
667 | * | ||
668 | * After processing all controls in the transaction, uvc_ctrl_commit or | ||
669 | * uvc_ctrl_rollback must be called to apply the pending changes to the | ||
670 | * hardware or revert them. When applying changes, all controls marked as | ||
671 | * dirty will be modified in the UVC device, and the dirty flag will be | ||
672 | * cleared. When reverting controls, the control data field | ||
673 | * UVC_CTRL_DATA_CURRENT is reverted to its previous value | ||
674 | * (UVC_CTRL_DATA_BACKUP) for all dirty controls. Both functions release the | ||
675 | * control lock. | ||
676 | */ | ||
677 | int uvc_ctrl_begin(struct uvc_video_device *video) | ||
678 | { | ||
679 | return mutex_lock_interruptible(&video->ctrl_mutex) ? -ERESTARTSYS : 0; | ||
680 | } | ||
681 | |||
682 | static int uvc_ctrl_commit_entity(struct uvc_device *dev, | ||
683 | struct uvc_entity *entity, int rollback) | ||
684 | { | ||
685 | struct uvc_control *ctrl; | ||
686 | unsigned int i; | ||
687 | int ret; | ||
688 | |||
689 | if (entity == NULL) | ||
690 | return 0; | ||
691 | |||
692 | for (i = 0; i < entity->ncontrols; ++i) { | ||
693 | ctrl = &entity->controls[i]; | ||
694 | if (ctrl->info == NULL || !ctrl->dirty) | ||
695 | continue; | ||
696 | |||
697 | if (!rollback) | ||
698 | ret = uvc_query_ctrl(dev, SET_CUR, ctrl->entity->id, | ||
699 | dev->intfnum, ctrl->info->selector, | ||
700 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), | ||
701 | ctrl->info->size); | ||
702 | else | ||
703 | ret = 0; | ||
704 | |||
705 | if (rollback || ret < 0) | ||
706 | memcpy(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), | ||
707 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_BACKUP), | ||
708 | ctrl->info->size); | ||
709 | |||
710 | if ((ctrl->info->flags & UVC_CONTROL_GET_CUR) == 0) | ||
711 | ctrl->loaded = 0; | ||
712 | |||
713 | ctrl->dirty = 0; | ||
714 | |||
715 | if (ret < 0) | ||
716 | return ret; | ||
717 | } | ||
718 | |||
719 | return 0; | ||
720 | } | ||
721 | |||
722 | int __uvc_ctrl_commit(struct uvc_video_device *video, int rollback) | ||
723 | { | ||
724 | struct uvc_entity *entity; | ||
725 | int ret = 0; | ||
726 | |||
727 | /* Find the control. */ | ||
728 | ret = uvc_ctrl_commit_entity(video->dev, video->processing, rollback); | ||
729 | if (ret < 0) | ||
730 | goto done; | ||
731 | |||
732 | list_for_each_entry(entity, &video->iterms, chain) { | ||
733 | ret = uvc_ctrl_commit_entity(video->dev, entity, rollback); | ||
734 | if (ret < 0) | ||
735 | goto done; | ||
736 | } | ||
737 | |||
738 | list_for_each_entry(entity, &video->extensions, chain) { | ||
739 | ret = uvc_ctrl_commit_entity(video->dev, entity, rollback); | ||
740 | if (ret < 0) | ||
741 | goto done; | ||
742 | } | ||
743 | |||
744 | done: | ||
745 | mutex_unlock(&video->ctrl_mutex); | ||
746 | return ret; | ||
747 | } | ||
748 | |||
749 | int uvc_ctrl_get(struct uvc_video_device *video, | ||
750 | struct v4l2_ext_control *xctrl) | ||
751 | { | ||
752 | struct uvc_control *ctrl; | ||
753 | struct uvc_control_mapping *mapping; | ||
754 | struct uvc_menu_info *menu; | ||
755 | unsigned int i; | ||
756 | int ret; | ||
757 | |||
758 | ctrl = uvc_find_control(video, xctrl->id, &mapping); | ||
759 | if (ctrl == NULL || (ctrl->info->flags & UVC_CONTROL_GET_CUR) == 0) | ||
760 | return -EINVAL; | ||
761 | |||
762 | if (!ctrl->loaded) { | ||
763 | ret = uvc_query_ctrl(video->dev, GET_CUR, ctrl->entity->id, | ||
764 | video->dev->intfnum, ctrl->info->selector, | ||
765 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), | ||
766 | ctrl->info->size); | ||
767 | if (ret < 0) | ||
768 | return ret; | ||
769 | |||
770 | if ((ctrl->info->flags & UVC_CONTROL_AUTO_UPDATE) == 0) | ||
771 | ctrl->loaded = 1; | ||
772 | } | ||
773 | |||
774 | xctrl->value = uvc_get_le_value( | ||
775 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), mapping); | ||
776 | |||
777 | if (mapping->v4l2_type == V4L2_CTRL_TYPE_MENU) { | ||
778 | menu = mapping->menu_info; | ||
779 | for (i = 0; i < mapping->menu_count; ++i, ++menu) { | ||
780 | if (menu->value == xctrl->value) { | ||
781 | xctrl->value = i; | ||
782 | break; | ||
783 | } | ||
784 | } | ||
785 | } | ||
786 | |||
787 | return 0; | ||
788 | } | ||
789 | |||
790 | int uvc_ctrl_set(struct uvc_video_device *video, | ||
791 | struct v4l2_ext_control *xctrl) | ||
792 | { | ||
793 | struct uvc_control *ctrl; | ||
794 | struct uvc_control_mapping *mapping; | ||
795 | s32 value = xctrl->value; | ||
796 | int ret; | ||
797 | |||
798 | ctrl = uvc_find_control(video, xctrl->id, &mapping); | ||
799 | if (ctrl == NULL || (ctrl->info->flags & UVC_CONTROL_SET_CUR) == 0) | ||
800 | return -EINVAL; | ||
801 | |||
802 | if (mapping->v4l2_type == V4L2_CTRL_TYPE_MENU) { | ||
803 | if (value < 0 || value >= mapping->menu_count) | ||
804 | return -EINVAL; | ||
805 | value = mapping->menu_info[value].value; | ||
806 | } | ||
807 | |||
808 | if (!ctrl->loaded && (ctrl->info->size * 8) != mapping->size) { | ||
809 | if ((ctrl->info->flags & UVC_CONTROL_GET_CUR) == 0) { | ||
810 | memset(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), | ||
811 | 0, ctrl->info->size); | ||
812 | } else { | ||
813 | ret = uvc_query_ctrl(video->dev, GET_CUR, | ||
814 | ctrl->entity->id, video->dev->intfnum, | ||
815 | ctrl->info->selector, | ||
816 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), | ||
817 | ctrl->info->size); | ||
818 | if (ret < 0) | ||
819 | return ret; | ||
820 | } | ||
821 | |||
822 | if ((ctrl->info->flags & UVC_CONTROL_AUTO_UPDATE) == 0) | ||
823 | ctrl->loaded = 1; | ||
824 | } | ||
825 | |||
826 | if (!ctrl->dirty) { | ||
827 | memcpy(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_BACKUP), | ||
828 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), | ||
829 | ctrl->info->size); | ||
830 | } | ||
831 | |||
832 | uvc_set_le_value(value, | ||
833 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), mapping); | ||
834 | |||
835 | ctrl->dirty = 1; | ||
836 | ctrl->modified = 1; | ||
837 | return 0; | ||
838 | } | ||
839 | |||
840 | /* -------------------------------------------------------------------------- | ||
841 | * Dynamic controls | ||
842 | */ | ||
843 | |||
844 | int uvc_xu_ctrl_query(struct uvc_video_device *video, | ||
845 | struct uvc_xu_control *xctrl, int set) | ||
846 | { | ||
847 | struct uvc_entity *entity; | ||
848 | struct uvc_control *ctrl = NULL; | ||
849 | unsigned int i, found = 0; | ||
850 | __u8 *data; | ||
851 | int ret; | ||
852 | |||
853 | /* Find the extension unit. */ | ||
854 | list_for_each_entry(entity, &video->extensions, chain) { | ||
855 | if (entity->id == xctrl->unit) | ||
856 | break; | ||
857 | } | ||
858 | |||
859 | if (entity->id != xctrl->unit) { | ||
860 | uvc_trace(UVC_TRACE_CONTROL, "Extension unit %u not found.\n", | ||
861 | xctrl->unit); | ||
862 | return -EINVAL; | ||
863 | } | ||
864 | |||
865 | /* Find the control. */ | ||
866 | for (i = 0; i < entity->ncontrols; ++i) { | ||
867 | ctrl = &entity->controls[i]; | ||
868 | if (ctrl->info == NULL) | ||
869 | continue; | ||
870 | |||
871 | if (ctrl->info->selector == xctrl->selector) { | ||
872 | found = 1; | ||
873 | break; | ||
874 | } | ||
875 | } | ||
876 | |||
877 | if (!found) { | ||
878 | uvc_trace(UVC_TRACE_CONTROL, | ||
879 | "Control " UVC_GUID_FORMAT "/%u not found.\n", | ||
880 | UVC_GUID_ARGS(entity->extension.guidExtensionCode), | ||
881 | xctrl->selector); | ||
882 | return -EINVAL; | ||
883 | } | ||
884 | |||
885 | /* Validate control data size. */ | ||
886 | if (ctrl->info->size != xctrl->size) | ||
887 | return -EINVAL; | ||
888 | |||
889 | if ((set && !(ctrl->info->flags & UVC_CONTROL_SET_CUR)) || | ||
890 | (!set && !(ctrl->info->flags & UVC_CONTROL_GET_CUR))) | ||
891 | return -EINVAL; | ||
892 | |||
893 | if (mutex_lock_interruptible(&video->ctrl_mutex)) | ||
894 | return -ERESTARTSYS; | ||
895 | |||
896 | memcpy(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_BACKUP), | ||
897 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), | ||
898 | xctrl->size); | ||
899 | data = uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT); | ||
900 | |||
901 | if (set && copy_from_user(data, xctrl->data, xctrl->size)) { | ||
902 | ret = -EFAULT; | ||
903 | goto out; | ||
904 | } | ||
905 | |||
906 | ret = uvc_query_ctrl(video->dev, set ? SET_CUR : GET_CUR, xctrl->unit, | ||
907 | video->dev->intfnum, xctrl->selector, data, | ||
908 | xctrl->size); | ||
909 | if (ret < 0) | ||
910 | goto out; | ||
911 | |||
912 | if (!set && copy_to_user(xctrl->data, data, xctrl->size)) { | ||
913 | ret = -EFAULT; | ||
914 | goto out; | ||
915 | } | ||
916 | |||
917 | out: | ||
918 | if (ret) | ||
919 | memcpy(uvc_ctrl_data(ctrl, UVC_CTRL_DATA_CURRENT), | ||
920 | uvc_ctrl_data(ctrl, UVC_CTRL_DATA_BACKUP), | ||
921 | xctrl->size); | ||
922 | |||
923 | mutex_unlock(&video->ctrl_mutex); | ||
924 | return ret; | ||
925 | } | ||
926 | |||
927 | /* -------------------------------------------------------------------------- | ||
928 | * Suspend/resume | ||
929 | */ | ||
930 | |||
931 | /* | ||
932 | * Restore control values after resume, skipping controls that haven't been | ||
933 | * changed. | ||
934 | * | ||
935 | * TODO | ||
936 | * - Don't restore modified controls that are back to their default value. | ||
937 | * - Handle restore order (Auto-Exposure Mode should be restored before | ||
938 | * Exposure Time). | ||
939 | */ | ||
940 | int uvc_ctrl_resume_device(struct uvc_device *dev) | ||
941 | { | ||
942 | struct uvc_control *ctrl; | ||
943 | struct uvc_entity *entity; | ||
944 | unsigned int i; | ||
945 | int ret; | ||
946 | |||
947 | /* Walk the entities list and restore controls when possible. */ | ||
948 | list_for_each_entry(entity, &dev->entities, list) { | ||
949 | |||
950 | for (i = 0; i < entity->ncontrols; ++i) { | ||
951 | ctrl = &entity->controls[i]; | ||
952 | |||
953 | if (ctrl->info == NULL || !ctrl->modified || | ||
954 | (ctrl->info->flags & UVC_CONTROL_RESTORE) == 0) | ||
955 | continue; | ||
956 | |||
957 | printk(KERN_INFO "restoring control " UVC_GUID_FORMAT | ||
958 | "/%u/%u\n", UVC_GUID_ARGS(ctrl->info->entity), | ||
959 | ctrl->info->index, ctrl->info->selector); | ||
960 | ctrl->dirty = 1; | ||
961 | } | ||
962 | |||
963 | ret = uvc_ctrl_commit_entity(dev, entity, 0); | ||
964 | if (ret < 0) | ||
965 | return ret; | ||
966 | } | ||
967 | |||
968 | return 0; | ||
969 | } | ||
970 | |||
971 | /* -------------------------------------------------------------------------- | ||
972 | * Control and mapping handling | ||
973 | */ | ||
974 | |||
975 | static void uvc_ctrl_add_ctrl(struct uvc_device *dev, | ||
976 | struct uvc_control_info *info) | ||
977 | { | ||
978 | struct uvc_entity *entity; | ||
979 | struct uvc_control *ctrl = NULL; | ||
980 | int ret, found = 0; | ||
981 | unsigned int i; | ||
982 | |||
983 | list_for_each_entry(entity, &dev->entities, list) { | ||
984 | if (!uvc_entity_match_guid(entity, info->entity)) | ||
985 | continue; | ||
986 | |||
987 | for (i = 0; i < entity->ncontrols; ++i) { | ||
988 | ctrl = &entity->controls[i]; | ||
989 | if (ctrl->index == info->index) { | ||
990 | found = 1; | ||
991 | break; | ||
992 | } | ||
993 | } | ||
994 | |||
995 | if (found) | ||
996 | break; | ||
997 | } | ||
998 | |||
999 | if (!found) | ||
1000 | return; | ||
1001 | |||
1002 | if (UVC_ENTITY_TYPE(entity) == VC_EXTENSION_UNIT) { | ||
1003 | /* Check if the device control information and length match | ||
1004 | * the user supplied information. | ||
1005 | */ | ||
1006 | __u32 flags; | ||
1007 | __le16 size; | ||
1008 | __u8 inf; | ||
1009 | |||
1010 | if ((ret = uvc_query_ctrl(dev, GET_LEN, ctrl->entity->id, | ||
1011 | dev->intfnum, info->selector, (__u8 *)&size, 2)) < 0) { | ||
1012 | uvc_trace(UVC_TRACE_CONTROL, "GET_LEN failed on " | ||
1013 | "control " UVC_GUID_FORMAT "/%u (%d).\n", | ||
1014 | UVC_GUID_ARGS(info->entity), info->selector, | ||
1015 | ret); | ||
1016 | return; | ||
1017 | } | ||
1018 | |||
1019 | if (info->size != le16_to_cpu(size)) { | ||
1020 | uvc_trace(UVC_TRACE_CONTROL, "Control " UVC_GUID_FORMAT | ||
1021 | "/%u size doesn't match user supplied " | ||
1022 | "value.\n", UVC_GUID_ARGS(info->entity), | ||
1023 | info->selector); | ||
1024 | return; | ||
1025 | } | ||
1026 | |||
1027 | if ((ret = uvc_query_ctrl(dev, GET_INFO, ctrl->entity->id, | ||
1028 | dev->intfnum, info->selector, &inf, 1)) < 0) { | ||
1029 | uvc_trace(UVC_TRACE_CONTROL, "GET_INFO failed on " | ||
1030 | "control " UVC_GUID_FORMAT "/%u (%d).\n", | ||
1031 | UVC_GUID_ARGS(info->entity), info->selector, | ||
1032 | ret); | ||
1033 | return; | ||
1034 | } | ||
1035 | |||
1036 | flags = info->flags; | ||
1037 | if (((flags & UVC_CONTROL_GET_CUR) && !(inf & (1 << 0))) || | ||
1038 | ((flags & UVC_CONTROL_SET_CUR) && !(inf & (1 << 1)))) { | ||
1039 | uvc_trace(UVC_TRACE_CONTROL, "Control " | ||
1040 | UVC_GUID_FORMAT "/%u flags don't match " | ||
1041 | "supported operations.\n", | ||
1042 | UVC_GUID_ARGS(info->entity), info->selector); | ||
1043 | return; | ||
1044 | } | ||
1045 | } | ||
1046 | |||
1047 | ctrl->info = info; | ||
1048 | ctrl->data = kmalloc(ctrl->info->size * UVC_CTRL_NDATA, GFP_KERNEL); | ||
1049 | uvc_trace(UVC_TRACE_CONTROL, "Added control " UVC_GUID_FORMAT "/%u " | ||
1050 | "to device %s entity %u\n", UVC_GUID_ARGS(ctrl->info->entity), | ||
1051 | ctrl->info->selector, dev->udev->devpath, entity->id); | ||
1052 | } | ||
1053 | |||
1054 | /* | ||
1055 | * Add an item to the UVC control information list, and instantiate a control | ||
1056 | * structure for each device that supports the control. | ||
1057 | */ | ||
1058 | int uvc_ctrl_add_info(struct uvc_control_info *info) | ||
1059 | { | ||
1060 | struct uvc_control_info *ctrl; | ||
1061 | struct uvc_device *dev; | ||
1062 | int ret = 0; | ||
1063 | |||
1064 | /* Find matching controls by walking the devices, entities and | ||
1065 | * controls list. | ||
1066 | */ | ||
1067 | mutex_lock(&uvc_driver.ctrl_mutex); | ||
1068 | |||
1069 | /* First check if the list contains a control matching the new one. | ||
1070 | * Bail out if it does. | ||
1071 | */ | ||
1072 | list_for_each_entry(ctrl, &uvc_driver.controls, list) { | ||
1073 | if (memcmp(ctrl->entity, info->entity, 16)) | ||
1074 | continue; | ||
1075 | |||
1076 | if (ctrl->selector == info->selector) { | ||
1077 | uvc_trace(UVC_TRACE_CONTROL, "Control " | ||
1078 | UVC_GUID_FORMAT "/%u is already defined.\n", | ||
1079 | UVC_GUID_ARGS(info->entity), info->selector); | ||
1080 | ret = -EEXIST; | ||
1081 | goto end; | ||
1082 | } | ||
1083 | if (ctrl->index == info->index) { | ||
1084 | uvc_trace(UVC_TRACE_CONTROL, "Control " | ||
1085 | UVC_GUID_FORMAT "/%u would overwrite index " | ||
1086 | "%d.\n", UVC_GUID_ARGS(info->entity), | ||
1087 | info->selector, info->index); | ||
1088 | ret = -EEXIST; | ||
1089 | goto end; | ||
1090 | } | ||
1091 | } | ||
1092 | |||
1093 | list_for_each_entry(dev, &uvc_driver.devices, list) | ||
1094 | uvc_ctrl_add_ctrl(dev, info); | ||
1095 | |||
1096 | INIT_LIST_HEAD(&info->mappings); | ||
1097 | list_add_tail(&info->list, &uvc_driver.controls); | ||
1098 | end: | ||
1099 | mutex_unlock(&uvc_driver.ctrl_mutex); | ||
1100 | return ret; | ||
1101 | } | ||
1102 | |||
1103 | int uvc_ctrl_add_mapping(struct uvc_control_mapping *mapping) | ||
1104 | { | ||
1105 | struct uvc_control_info *info; | ||
1106 | struct uvc_control_mapping *map; | ||
1107 | int ret = -EINVAL; | ||
1108 | |||
1109 | if (mapping->id & ~V4L2_CTRL_ID_MASK) { | ||
1110 | uvc_trace(UVC_TRACE_CONTROL, "Can't add mapping '%s' with " | ||
1111 | "invalid control id 0x%08x\n", mapping->name, | ||
1112 | mapping->id); | ||
1113 | return -EINVAL; | ||
1114 | } | ||
1115 | |||
1116 | mutex_lock(&uvc_driver.ctrl_mutex); | ||
1117 | list_for_each_entry(info, &uvc_driver.controls, list) { | ||
1118 | if (memcmp(info->entity, mapping->entity, 16) || | ||
1119 | info->selector != mapping->selector) | ||
1120 | continue; | ||
1121 | |||
1122 | if (info->size * 8 < mapping->size + mapping->offset) { | ||
1123 | uvc_trace(UVC_TRACE_CONTROL, "Mapping '%s' would " | ||
1124 | "overflow control " UVC_GUID_FORMAT "/%u\n", | ||
1125 | mapping->name, UVC_GUID_ARGS(info->entity), | ||
1126 | info->selector); | ||
1127 | ret = -EOVERFLOW; | ||
1128 | goto end; | ||
1129 | } | ||
1130 | |||
1131 | /* Check if the list contains a mapping matching the new one. | ||
1132 | * Bail out if it does. | ||
1133 | */ | ||
1134 | list_for_each_entry(map, &info->mappings, list) { | ||
1135 | if (map->id == mapping->id) { | ||
1136 | uvc_trace(UVC_TRACE_CONTROL, "Mapping '%s' is " | ||
1137 | "already defined.\n", mapping->name); | ||
1138 | ret = -EEXIST; | ||
1139 | goto end; | ||
1140 | } | ||
1141 | } | ||
1142 | |||
1143 | mapping->ctrl = info; | ||
1144 | list_add_tail(&mapping->list, &info->mappings); | ||
1145 | uvc_trace(UVC_TRACE_CONTROL, "Adding mapping %s to control " | ||
1146 | UVC_GUID_FORMAT "/%u.\n", mapping->name, | ||
1147 | UVC_GUID_ARGS(info->entity), info->selector); | ||
1148 | |||
1149 | ret = 0; | ||
1150 | break; | ||
1151 | } | ||
1152 | end: | ||
1153 | mutex_unlock(&uvc_driver.ctrl_mutex); | ||
1154 | return ret; | ||
1155 | } | ||
1156 | |||
1157 | /* | ||
1158 | * Initialize device controls. | ||
1159 | */ | ||
1160 | int uvc_ctrl_init_device(struct uvc_device *dev) | ||
1161 | { | ||
1162 | struct uvc_control_info *info; | ||
1163 | struct uvc_control *ctrl; | ||
1164 | struct uvc_entity *entity; | ||
1165 | unsigned int i; | ||
1166 | |||
1167 | /* Walk the entities list and instantiate controls */ | ||
1168 | list_for_each_entry(entity, &dev->entities, list) { | ||
1169 | unsigned int bControlSize = 0, ncontrols = 0; | ||
1170 | __u8 *bmControls = NULL; | ||
1171 | |||
1172 | if (UVC_ENTITY_TYPE(entity) == VC_EXTENSION_UNIT) { | ||
1173 | bmControls = entity->extension.bmControls; | ||
1174 | bControlSize = entity->extension.bControlSize; | ||
1175 | } else if (UVC_ENTITY_TYPE(entity) == VC_PROCESSING_UNIT) { | ||
1176 | bmControls = entity->processing.bmControls; | ||
1177 | bControlSize = entity->processing.bControlSize; | ||
1178 | } else if (UVC_ENTITY_TYPE(entity) == ITT_CAMERA) { | ||
1179 | bmControls = entity->camera.bmControls; | ||
1180 | bControlSize = entity->camera.bControlSize; | ||
1181 | } | ||
1182 | |||
1183 | for (i = 0; i < bControlSize; ++i) | ||
1184 | ncontrols += hweight8(bmControls[i]); | ||
1185 | |||
1186 | if (ncontrols == 0) | ||
1187 | continue; | ||
1188 | |||
1189 | entity->controls = kzalloc(ncontrols*sizeof *ctrl, GFP_KERNEL); | ||
1190 | if (entity->controls == NULL) | ||
1191 | return -ENOMEM; | ||
1192 | |||
1193 | entity->ncontrols = ncontrols; | ||
1194 | |||
1195 | ctrl = entity->controls; | ||
1196 | for (i = 0; i < bControlSize * 8; ++i) { | ||
1197 | if (uvc_get_bit(bmControls, i) == 0) | ||
1198 | continue; | ||
1199 | |||
1200 | ctrl->entity = entity; | ||
1201 | ctrl->index = i; | ||
1202 | ctrl++; | ||
1203 | } | ||
1204 | } | ||
1205 | |||
1206 | /* Walk the controls info list and associate them with the device | ||
1207 | * controls, then add the device to the global device list. This has | ||
1208 | * to be done while holding the controls lock, to make sure | ||
1209 | * uvc_ctrl_add_info() will not get called in-between. | ||
1210 | */ | ||
1211 | mutex_lock(&uvc_driver.ctrl_mutex); | ||
1212 | list_for_each_entry(info, &uvc_driver.controls, list) | ||
1213 | uvc_ctrl_add_ctrl(dev, info); | ||
1214 | |||
1215 | list_add_tail(&dev->list, &uvc_driver.devices); | ||
1216 | mutex_unlock(&uvc_driver.ctrl_mutex); | ||
1217 | |||
1218 | return 0; | ||
1219 | } | ||
1220 | |||
1221 | /* | ||
1222 | * Cleanup device controls. | ||
1223 | */ | ||
1224 | void uvc_ctrl_cleanup_device(struct uvc_device *dev) | ||
1225 | { | ||
1226 | struct uvc_entity *entity; | ||
1227 | unsigned int i; | ||
1228 | |||
1229 | /* Remove the device from the global devices list */ | ||
1230 | mutex_lock(&uvc_driver.ctrl_mutex); | ||
1231 | if (dev->list.next != NULL) | ||
1232 | list_del(&dev->list); | ||
1233 | mutex_unlock(&uvc_driver.ctrl_mutex); | ||
1234 | |||
1235 | list_for_each_entry(entity, &dev->entities, list) { | ||
1236 | for (i = 0; i < entity->ncontrols; ++i) | ||
1237 | kfree(entity->controls[i].data); | ||
1238 | |||
1239 | kfree(entity->controls); | ||
1240 | } | ||
1241 | } | ||
1242 | |||
1243 | void uvc_ctrl_init(void) | ||
1244 | { | ||
1245 | struct uvc_control_info *ctrl = uvc_ctrls; | ||
1246 | struct uvc_control_info *cend = ctrl + ARRAY_SIZE(uvc_ctrls); | ||
1247 | struct uvc_control_mapping *mapping = uvc_ctrl_mappings; | ||
1248 | struct uvc_control_mapping *mend = | ||
1249 | mapping + ARRAY_SIZE(uvc_ctrl_mappings); | ||
1250 | |||
1251 | for (; ctrl < cend; ++ctrl) | ||
1252 | uvc_ctrl_add_info(ctrl); | ||
1253 | |||
1254 | for (; mapping < mend; ++mapping) | ||
1255 | uvc_ctrl_add_mapping(mapping); | ||
1256 | } | ||
diff --git a/drivers/media/video/uvc/uvc_driver.c b/drivers/media/video/uvc/uvc_driver.c new file mode 100644 index 000000000000..60ced589f898 --- /dev/null +++ b/drivers/media/video/uvc/uvc_driver.c | |||
@@ -0,0 +1,1955 @@ | |||
1 | /* | ||
2 | * uvc_driver.c -- USB Video Class driver | ||
3 | * | ||
4 | * Copyright (C) 2005-2008 | ||
5 | * Laurent Pinchart (laurent.pinchart@skynet.be) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | /* | ||
15 | * This driver aims to support video input devices compliant with the 'USB | ||
16 | * Video Class' specification. | ||
17 | * | ||
18 | * The driver doesn't support the deprecated v4l1 interface. It implements the | ||
19 | * mmap capture method only, and doesn't do any image format conversion in | ||
20 | * software. If your user-space application doesn't support YUYV or MJPEG, fix | ||
21 | * it :-). Please note that the MJPEG data have been stripped from their | ||
22 | * Huffman tables (DHT marker), you will need to add it back if your JPEG | ||
23 | * codec can't handle MJPEG data. | ||
24 | */ | ||
25 | |||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/version.h> | ||
28 | #include <linux/list.h> | ||
29 | #include <linux/module.h> | ||
30 | #include <linux/usb.h> | ||
31 | #include <linux/videodev2.h> | ||
32 | #include <linux/vmalloc.h> | ||
33 | #include <linux/wait.h> | ||
34 | #include <asm/atomic.h> | ||
35 | |||
36 | #include <media/v4l2-common.h> | ||
37 | |||
38 | #include "uvcvideo.h" | ||
39 | |||
40 | #define DRIVER_AUTHOR "Laurent Pinchart <laurent.pinchart@skynet.be>" | ||
41 | #define DRIVER_DESC "USB Video Class driver" | ||
42 | #ifndef DRIVER_VERSION | ||
43 | #define DRIVER_VERSION "v0.1.0" | ||
44 | #endif | ||
45 | |||
46 | static unsigned int uvc_quirks_param; | ||
47 | unsigned int uvc_trace_param; | ||
48 | |||
49 | /* ------------------------------------------------------------------------ | ||
50 | * Control, formats, ... | ||
51 | */ | ||
52 | |||
53 | static struct uvc_format_desc uvc_fmts[] = { | ||
54 | { | ||
55 | .name = "YUV 4:2:2 (YUYV)", | ||
56 | .guid = UVC_GUID_FORMAT_YUY2, | ||
57 | .fcc = V4L2_PIX_FMT_YUYV, | ||
58 | }, | ||
59 | { | ||
60 | .name = "YUV 4:2:0 (NV12)", | ||
61 | .guid = UVC_GUID_FORMAT_NV12, | ||
62 | .fcc = V4L2_PIX_FMT_NV12, | ||
63 | }, | ||
64 | { | ||
65 | .name = "MJPEG", | ||
66 | .guid = UVC_GUID_FORMAT_MJPEG, | ||
67 | .fcc = V4L2_PIX_FMT_MJPEG, | ||
68 | }, | ||
69 | { | ||
70 | .name = "YVU 4:2:0 (YV12)", | ||
71 | .guid = UVC_GUID_FORMAT_YV12, | ||
72 | .fcc = V4L2_PIX_FMT_YVU420, | ||
73 | }, | ||
74 | { | ||
75 | .name = "YUV 4:2:0 (I420)", | ||
76 | .guid = UVC_GUID_FORMAT_I420, | ||
77 | .fcc = V4L2_PIX_FMT_YUV420, | ||
78 | }, | ||
79 | { | ||
80 | .name = "YUV 4:2:2 (UYVY)", | ||
81 | .guid = UVC_GUID_FORMAT_UYVY, | ||
82 | .fcc = V4L2_PIX_FMT_UYVY, | ||
83 | }, | ||
84 | { | ||
85 | .name = "Greyscale", | ||
86 | .guid = UVC_GUID_FORMAT_Y800, | ||
87 | .fcc = V4L2_PIX_FMT_GREY, | ||
88 | }, | ||
89 | { | ||
90 | .name = "RGB Bayer", | ||
91 | .guid = UVC_GUID_FORMAT_BY8, | ||
92 | .fcc = V4L2_PIX_FMT_SBGGR8, | ||
93 | }, | ||
94 | }; | ||
95 | |||
96 | /* ------------------------------------------------------------------------ | ||
97 | * Utility functions | ||
98 | */ | ||
99 | |||
100 | struct usb_host_endpoint *uvc_find_endpoint(struct usb_host_interface *alts, | ||
101 | __u8 epaddr) | ||
102 | { | ||
103 | struct usb_host_endpoint *ep; | ||
104 | unsigned int i; | ||
105 | |||
106 | for (i = 0; i < alts->desc.bNumEndpoints; ++i) { | ||
107 | ep = &alts->endpoint[i]; | ||
108 | if (ep->desc.bEndpointAddress == epaddr) | ||
109 | return ep; | ||
110 | } | ||
111 | |||
112 | return NULL; | ||
113 | } | ||
114 | |||
115 | static struct uvc_format_desc *uvc_format_by_guid(const __u8 guid[16]) | ||
116 | { | ||
117 | unsigned int len = ARRAY_SIZE(uvc_fmts); | ||
118 | unsigned int i; | ||
119 | |||
120 | for (i = 0; i < len; ++i) { | ||
121 | if (memcmp(guid, uvc_fmts[i].guid, 16) == 0) | ||
122 | return &uvc_fmts[i]; | ||
123 | } | ||
124 | |||
125 | return NULL; | ||
126 | } | ||
127 | |||
128 | static __u32 uvc_colorspace(const __u8 primaries) | ||
129 | { | ||
130 | static const __u8 colorprimaries[] = { | ||
131 | 0, | ||
132 | V4L2_COLORSPACE_SRGB, | ||
133 | V4L2_COLORSPACE_470_SYSTEM_M, | ||
134 | V4L2_COLORSPACE_470_SYSTEM_BG, | ||
135 | V4L2_COLORSPACE_SMPTE170M, | ||
136 | V4L2_COLORSPACE_SMPTE240M, | ||
137 | }; | ||
138 | |||
139 | if (primaries < ARRAY_SIZE(colorprimaries)) | ||
140 | return colorprimaries[primaries]; | ||
141 | |||
142 | return 0; | ||
143 | } | ||
144 | |||
145 | /* Simplify a fraction using a simple continued fraction decomposition. The | ||
146 | * idea here is to convert fractions such as 333333/10000000 to 1/30 using | ||
147 | * 32 bit arithmetic only. The algorithm is not perfect and relies upon two | ||
148 | * arbitrary parameters to remove non-significative terms from the simple | ||
149 | * continued fraction decomposition. Using 8 and 333 for n_terms and threshold | ||
150 | * respectively seems to give nice results. | ||
151 | */ | ||
152 | void uvc_simplify_fraction(uint32_t *numerator, uint32_t *denominator, | ||
153 | unsigned int n_terms, unsigned int threshold) | ||
154 | { | ||
155 | uint32_t *an; | ||
156 | uint32_t x, y, r; | ||
157 | unsigned int i, n; | ||
158 | |||
159 | an = kmalloc(n_terms * sizeof *an, GFP_KERNEL); | ||
160 | if (an == NULL) | ||
161 | return; | ||
162 | |||
163 | /* Convert the fraction to a simple continued fraction. See | ||
164 | * http://mathforum.org/dr.math/faq/faq.fractions.html | ||
165 | * Stop if the current term is bigger than or equal to the given | ||
166 | * threshold. | ||
167 | */ | ||
168 | x = *numerator; | ||
169 | y = *denominator; | ||
170 | |||
171 | for (n = 0; n < n_terms && y != 0; ++n) { | ||
172 | an[n] = x / y; | ||
173 | if (an[n] >= threshold) { | ||
174 | if (n < 2) | ||
175 | n++; | ||
176 | break; | ||
177 | } | ||
178 | |||
179 | r = x - an[n] * y; | ||
180 | x = y; | ||
181 | y = r; | ||
182 | } | ||
183 | |||
184 | /* Expand the simple continued fraction back to an integer fraction. */ | ||
185 | x = 0; | ||
186 | y = 1; | ||
187 | |||
188 | for (i = n; i > 0; --i) { | ||
189 | r = y; | ||
190 | y = an[i-1] * y + x; | ||
191 | x = r; | ||
192 | } | ||
193 | |||
194 | *numerator = y; | ||
195 | *denominator = x; | ||
196 | kfree(an); | ||
197 | } | ||
198 | |||
199 | /* Convert a fraction to a frame interval in 100ns multiples. The idea here is | ||
200 | * to compute numerator / denominator * 10000000 using 32 bit fixed point | ||
201 | * arithmetic only. | ||
202 | */ | ||
203 | uint32_t uvc_fraction_to_interval(uint32_t numerator, uint32_t denominator) | ||
204 | { | ||
205 | uint32_t multiplier; | ||
206 | |||
207 | /* Saturate the result if the operation would overflow. */ | ||
208 | if (denominator == 0 || | ||
209 | numerator/denominator >= ((uint32_t)-1)/10000000) | ||
210 | return (uint32_t)-1; | ||
211 | |||
212 | /* Divide both the denominator and the multiplier by two until | ||
213 | * numerator * multiplier doesn't overflow. If anyone knows a better | ||
214 | * algorithm please let me know. | ||
215 | */ | ||
216 | multiplier = 10000000; | ||
217 | while (numerator > ((uint32_t)-1)/multiplier) { | ||
218 | multiplier /= 2; | ||
219 | denominator /= 2; | ||
220 | } | ||
221 | |||
222 | return denominator ? numerator * multiplier / denominator : 0; | ||
223 | } | ||
224 | |||
225 | /* ------------------------------------------------------------------------ | ||
226 | * Terminal and unit management | ||
227 | */ | ||
228 | |||
229 | static struct uvc_entity *uvc_entity_by_id(struct uvc_device *dev, int id) | ||
230 | { | ||
231 | struct uvc_entity *entity; | ||
232 | |||
233 | list_for_each_entry(entity, &dev->entities, list) { | ||
234 | if (entity->id == id) | ||
235 | return entity; | ||
236 | } | ||
237 | |||
238 | return NULL; | ||
239 | } | ||
240 | |||
241 | static struct uvc_entity *uvc_entity_by_reference(struct uvc_device *dev, | ||
242 | int id, struct uvc_entity *entity) | ||
243 | { | ||
244 | unsigned int i; | ||
245 | |||
246 | if (entity == NULL) | ||
247 | entity = list_entry(&dev->entities, struct uvc_entity, list); | ||
248 | |||
249 | list_for_each_entry_continue(entity, &dev->entities, list) { | ||
250 | switch (UVC_ENTITY_TYPE(entity)) { | ||
251 | case TT_STREAMING: | ||
252 | if (entity->output.bSourceID == id) | ||
253 | return entity; | ||
254 | break; | ||
255 | |||
256 | case VC_PROCESSING_UNIT: | ||
257 | if (entity->processing.bSourceID == id) | ||
258 | return entity; | ||
259 | break; | ||
260 | |||
261 | case VC_SELECTOR_UNIT: | ||
262 | for (i = 0; i < entity->selector.bNrInPins; ++i) | ||
263 | if (entity->selector.baSourceID[i] == id) | ||
264 | return entity; | ||
265 | break; | ||
266 | |||
267 | case VC_EXTENSION_UNIT: | ||
268 | for (i = 0; i < entity->extension.bNrInPins; ++i) | ||
269 | if (entity->extension.baSourceID[i] == id) | ||
270 | return entity; | ||
271 | break; | ||
272 | } | ||
273 | } | ||
274 | |||
275 | return NULL; | ||
276 | } | ||
277 | |||
278 | /* ------------------------------------------------------------------------ | ||
279 | * Descriptors handling | ||
280 | */ | ||
281 | |||
282 | static int uvc_parse_format(struct uvc_device *dev, | ||
283 | struct uvc_streaming *streaming, struct uvc_format *format, | ||
284 | __u32 **intervals, unsigned char *buffer, int buflen) | ||
285 | { | ||
286 | struct usb_interface *intf = streaming->intf; | ||
287 | struct usb_host_interface *alts = intf->cur_altsetting; | ||
288 | struct uvc_format_desc *fmtdesc; | ||
289 | struct uvc_frame *frame; | ||
290 | const unsigned char *start = buffer; | ||
291 | unsigned int interval; | ||
292 | unsigned int i, n; | ||
293 | __u8 ftype; | ||
294 | |||
295 | format->type = buffer[2]; | ||
296 | format->index = buffer[3]; | ||
297 | |||
298 | switch (buffer[2]) { | ||
299 | case VS_FORMAT_UNCOMPRESSED: | ||
300 | case VS_FORMAT_FRAME_BASED: | ||
301 | if (buflen < 27) { | ||
302 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming" | ||
303 | "interface %d FORMAT error\n", | ||
304 | dev->udev->devnum, | ||
305 | alts->desc.bInterfaceNumber); | ||
306 | return -EINVAL; | ||
307 | } | ||
308 | |||
309 | /* Find the format descriptor from its GUID. */ | ||
310 | fmtdesc = uvc_format_by_guid(&buffer[5]); | ||
311 | |||
312 | if (fmtdesc != NULL) { | ||
313 | strncpy(format->name, fmtdesc->name, | ||
314 | sizeof format->name); | ||
315 | format->fcc = fmtdesc->fcc; | ||
316 | } else { | ||
317 | uvc_printk(KERN_INFO, "Unknown video format " | ||
318 | UVC_GUID_FORMAT "\n", | ||
319 | UVC_GUID_ARGS(&buffer[5])); | ||
320 | snprintf(format->name, sizeof format->name, | ||
321 | UVC_GUID_FORMAT, UVC_GUID_ARGS(&buffer[5])); | ||
322 | format->fcc = 0; | ||
323 | } | ||
324 | |||
325 | format->bpp = buffer[21]; | ||
326 | if (buffer[2] == VS_FORMAT_UNCOMPRESSED) { | ||
327 | ftype = VS_FRAME_UNCOMPRESSED; | ||
328 | } else { | ||
329 | ftype = VS_FRAME_FRAME_BASED; | ||
330 | if (buffer[27]) | ||
331 | format->flags = UVC_FMT_FLAG_COMPRESSED; | ||
332 | } | ||
333 | break; | ||
334 | |||
335 | case VS_FORMAT_MJPEG: | ||
336 | if (buflen < 11) { | ||
337 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming" | ||
338 | "interface %d FORMAT error\n", | ||
339 | dev->udev->devnum, | ||
340 | alts->desc.bInterfaceNumber); | ||
341 | return -EINVAL; | ||
342 | } | ||
343 | |||
344 | strncpy(format->name, "MJPEG", sizeof format->name); | ||
345 | format->fcc = V4L2_PIX_FMT_MJPEG; | ||
346 | format->flags = UVC_FMT_FLAG_COMPRESSED; | ||
347 | format->bpp = 0; | ||
348 | ftype = VS_FRAME_MJPEG; | ||
349 | break; | ||
350 | |||
351 | case VS_FORMAT_DV: | ||
352 | if (buflen < 9) { | ||
353 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming" | ||
354 | "interface %d FORMAT error\n", | ||
355 | dev->udev->devnum, | ||
356 | alts->desc.bInterfaceNumber); | ||
357 | return -EINVAL; | ||
358 | } | ||
359 | |||
360 | switch (buffer[8] & 0x7f) { | ||
361 | case 0: | ||
362 | strncpy(format->name, "SD-DV", sizeof format->name); | ||
363 | break; | ||
364 | case 1: | ||
365 | strncpy(format->name, "SDL-DV", sizeof format->name); | ||
366 | break; | ||
367 | case 2: | ||
368 | strncpy(format->name, "HD-DV", sizeof format->name); | ||
369 | break; | ||
370 | default: | ||
371 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming" | ||
372 | "interface %d: unknown DV format %u\n", | ||
373 | dev->udev->devnum, | ||
374 | alts->desc.bInterfaceNumber, buffer[8]); | ||
375 | return -EINVAL; | ||
376 | } | ||
377 | |||
378 | strncat(format->name, buffer[8] & (1 << 7) ? " 60Hz" : " 50Hz", | ||
379 | sizeof format->name); | ||
380 | |||
381 | format->fcc = V4L2_PIX_FMT_DV; | ||
382 | format->flags = UVC_FMT_FLAG_COMPRESSED | UVC_FMT_FLAG_STREAM; | ||
383 | format->bpp = 0; | ||
384 | ftype = 0; | ||
385 | |||
386 | /* Create a dummy frame descriptor. */ | ||
387 | frame = &format->frame[0]; | ||
388 | memset(&format->frame[0], 0, sizeof format->frame[0]); | ||
389 | frame->bFrameIntervalType = 1; | ||
390 | frame->dwDefaultFrameInterval = 1; | ||
391 | frame->dwFrameInterval = *intervals; | ||
392 | *(*intervals)++ = 1; | ||
393 | format->nframes = 1; | ||
394 | break; | ||
395 | |||
396 | case VS_FORMAT_MPEG2TS: | ||
397 | case VS_FORMAT_STREAM_BASED: | ||
398 | /* Not supported yet. */ | ||
399 | default: | ||
400 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming" | ||
401 | "interface %d unsupported format %u\n", | ||
402 | dev->udev->devnum, alts->desc.bInterfaceNumber, | ||
403 | buffer[2]); | ||
404 | return -EINVAL; | ||
405 | } | ||
406 | |||
407 | uvc_trace(UVC_TRACE_DESCR, "Found format %s.\n", format->name); | ||
408 | |||
409 | buflen -= buffer[0]; | ||
410 | buffer += buffer[0]; | ||
411 | |||
412 | /* Parse the frame descriptors. Only uncompressed, MJPEG and frame | ||
413 | * based formats have frame descriptors. | ||
414 | */ | ||
415 | while (buflen > 2 && buffer[2] == ftype) { | ||
416 | frame = &format->frame[format->nframes]; | ||
417 | |||
418 | if (ftype != VS_FRAME_FRAME_BASED) | ||
419 | n = buflen > 25 ? buffer[25] : 0; | ||
420 | else | ||
421 | n = buflen > 21 ? buffer[21] : 0; | ||
422 | |||
423 | n = n ? n : 3; | ||
424 | |||
425 | if (buflen < 26 + 4*n) { | ||
426 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming" | ||
427 | "interface %d FRAME error\n", dev->udev->devnum, | ||
428 | alts->desc.bInterfaceNumber); | ||
429 | return -EINVAL; | ||
430 | } | ||
431 | |||
432 | frame->bFrameIndex = buffer[3]; | ||
433 | frame->bmCapabilities = buffer[4]; | ||
434 | frame->wWidth = le16_to_cpup((__le16 *)&buffer[5]); | ||
435 | frame->wHeight = le16_to_cpup((__le16 *)&buffer[7]); | ||
436 | frame->dwMinBitRate = le32_to_cpup((__le32 *)&buffer[9]); | ||
437 | frame->dwMaxBitRate = le32_to_cpup((__le32 *)&buffer[13]); | ||
438 | if (ftype != VS_FRAME_FRAME_BASED) { | ||
439 | frame->dwMaxVideoFrameBufferSize = | ||
440 | le32_to_cpup((__le32 *)&buffer[17]); | ||
441 | frame->dwDefaultFrameInterval = | ||
442 | le32_to_cpup((__le32 *)&buffer[21]); | ||
443 | frame->bFrameIntervalType = buffer[25]; | ||
444 | } else { | ||
445 | frame->dwMaxVideoFrameBufferSize = 0; | ||
446 | frame->dwDefaultFrameInterval = | ||
447 | le32_to_cpup((__le32 *)&buffer[17]); | ||
448 | frame->bFrameIntervalType = buffer[21]; | ||
449 | } | ||
450 | frame->dwFrameInterval = *intervals; | ||
451 | |||
452 | /* Several UVC chipsets screw up dwMaxVideoFrameBufferSize | ||
453 | * completely. Observed behaviours range from setting the | ||
454 | * value to 1.1x the actual frame size of hardwiring the | ||
455 | * 16 low bits to 0. This results in a higher than necessary | ||
456 | * memory usage as well as a wrong image size information. For | ||
457 | * uncompressed formats this can be fixed by computing the | ||
458 | * value from the frame size. | ||
459 | */ | ||
460 | if (!(format->flags & UVC_FMT_FLAG_COMPRESSED)) | ||
461 | frame->dwMaxVideoFrameBufferSize = format->bpp | ||
462 | * frame->wWidth * frame->wHeight / 8; | ||
463 | |||
464 | /* Some bogus devices report dwMinFrameInterval equal to | ||
465 | * dwMaxFrameInterval and have dwFrameIntervalStep set to | ||
466 | * zero. Setting all null intervals to 1 fixes the problem and | ||
467 | * some other divisions by zero which could happen. | ||
468 | */ | ||
469 | for (i = 0; i < n; ++i) { | ||
470 | interval = le32_to_cpup((__le32 *)&buffer[26+4*i]); | ||
471 | *(*intervals)++ = interval ? interval : 1; | ||
472 | } | ||
473 | |||
474 | /* Make sure that the default frame interval stays between | ||
475 | * the boundaries. | ||
476 | */ | ||
477 | n -= frame->bFrameIntervalType ? 1 : 2; | ||
478 | frame->dwDefaultFrameInterval = | ||
479 | min(frame->dwFrameInterval[n], | ||
480 | max(frame->dwFrameInterval[0], | ||
481 | frame->dwDefaultFrameInterval)); | ||
482 | |||
483 | uvc_trace(UVC_TRACE_DESCR, "- %ux%u (%u.%u fps)\n", | ||
484 | frame->wWidth, frame->wHeight, | ||
485 | 10000000/frame->dwDefaultFrameInterval, | ||
486 | (100000000/frame->dwDefaultFrameInterval)%10); | ||
487 | |||
488 | format->nframes++; | ||
489 | buflen -= buffer[0]; | ||
490 | buffer += buffer[0]; | ||
491 | } | ||
492 | |||
493 | if (buflen > 2 && buffer[2] == VS_STILL_IMAGE_FRAME) { | ||
494 | buflen -= buffer[0]; | ||
495 | buffer += buffer[0]; | ||
496 | } | ||
497 | |||
498 | if (buflen > 2 && buffer[2] == VS_COLORFORMAT) { | ||
499 | if (buflen < 6) { | ||
500 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming" | ||
501 | "interface %d COLORFORMAT error\n", | ||
502 | dev->udev->devnum, | ||
503 | alts->desc.bInterfaceNumber); | ||
504 | return -EINVAL; | ||
505 | } | ||
506 | |||
507 | format->colorspace = uvc_colorspace(buffer[3]); | ||
508 | |||
509 | buflen -= buffer[0]; | ||
510 | buffer += buffer[0]; | ||
511 | } | ||
512 | |||
513 | return buffer - start; | ||
514 | } | ||
515 | |||
516 | static int uvc_parse_streaming(struct uvc_device *dev, | ||
517 | struct usb_interface *intf) | ||
518 | { | ||
519 | struct uvc_streaming *streaming = NULL; | ||
520 | struct uvc_format *format; | ||
521 | struct uvc_frame *frame; | ||
522 | struct usb_host_interface *alts = &intf->altsetting[0]; | ||
523 | unsigned char *_buffer, *buffer = alts->extra; | ||
524 | int _buflen, buflen = alts->extralen; | ||
525 | unsigned int nformats = 0, nframes = 0, nintervals = 0; | ||
526 | unsigned int size, i, n, p; | ||
527 | __u32 *interval; | ||
528 | __u16 psize; | ||
529 | int ret = -EINVAL; | ||
530 | |||
531 | if (intf->cur_altsetting->desc.bInterfaceSubClass | ||
532 | != SC_VIDEOSTREAMING) { | ||
533 | uvc_trace(UVC_TRACE_DESCR, "device %d interface %d isn't a " | ||
534 | "video streaming interface\n", dev->udev->devnum, | ||
535 | intf->altsetting[0].desc.bInterfaceNumber); | ||
536 | return -EINVAL; | ||
537 | } | ||
538 | |||
539 | if (usb_driver_claim_interface(&uvc_driver.driver, intf, dev)) { | ||
540 | uvc_trace(UVC_TRACE_DESCR, "device %d interface %d is already " | ||
541 | "claimed\n", dev->udev->devnum, | ||
542 | intf->altsetting[0].desc.bInterfaceNumber); | ||
543 | return -EINVAL; | ||
544 | } | ||
545 | |||
546 | streaming = kzalloc(sizeof *streaming, GFP_KERNEL); | ||
547 | if (streaming == NULL) { | ||
548 | usb_driver_release_interface(&uvc_driver.driver, intf); | ||
549 | return -EINVAL; | ||
550 | } | ||
551 | |||
552 | mutex_init(&streaming->mutex); | ||
553 | streaming->intf = usb_get_intf(intf); | ||
554 | streaming->intfnum = intf->cur_altsetting->desc.bInterfaceNumber; | ||
555 | |||
556 | /* The Pico iMage webcam has its class-specific interface descriptors | ||
557 | * after the endpoint descriptors. | ||
558 | */ | ||
559 | if (buflen == 0) { | ||
560 | for (i = 0; i < alts->desc.bNumEndpoints; ++i) { | ||
561 | struct usb_host_endpoint *ep = &alts->endpoint[i]; | ||
562 | |||
563 | if (ep->extralen == 0) | ||
564 | continue; | ||
565 | |||
566 | if (ep->extralen > 2 && | ||
567 | ep->extra[1] == USB_DT_CS_INTERFACE) { | ||
568 | uvc_trace(UVC_TRACE_DESCR, "trying extra data " | ||
569 | "from endpoint %u.\n", i); | ||
570 | buffer = alts->endpoint[i].extra; | ||
571 | buflen = alts->endpoint[i].extralen; | ||
572 | break; | ||
573 | } | ||
574 | } | ||
575 | } | ||
576 | |||
577 | /* Skip the standard interface descriptors. */ | ||
578 | while (buflen > 2 && buffer[1] != USB_DT_CS_INTERFACE) { | ||
579 | buflen -= buffer[0]; | ||
580 | buffer += buffer[0]; | ||
581 | } | ||
582 | |||
583 | if (buflen <= 2) { | ||
584 | uvc_trace(UVC_TRACE_DESCR, "no class-specific streaming " | ||
585 | "interface descriptors found.\n"); | ||
586 | goto error; | ||
587 | } | ||
588 | |||
589 | /* Parse the header descriptor. */ | ||
590 | if (buffer[2] == VS_OUTPUT_HEADER) { | ||
591 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming interface " | ||
592 | "%d OUTPUT HEADER descriptor is not supported.\n", | ||
593 | dev->udev->devnum, alts->desc.bInterfaceNumber); | ||
594 | goto error; | ||
595 | } else if (buffer[2] == VS_INPUT_HEADER) { | ||
596 | p = buflen >= 5 ? buffer[3] : 0; | ||
597 | n = buflen >= 12 ? buffer[12] : 0; | ||
598 | |||
599 | if (buflen < 13 + p*n || buffer[2] != VS_INPUT_HEADER) { | ||
600 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming " | ||
601 | "interface %d INPUT HEADER descriptor is " | ||
602 | "invalid.\n", dev->udev->devnum, | ||
603 | alts->desc.bInterfaceNumber); | ||
604 | goto error; | ||
605 | } | ||
606 | |||
607 | streaming->header.bNumFormats = p; | ||
608 | streaming->header.bEndpointAddress = buffer[6]; | ||
609 | streaming->header.bmInfo = buffer[7]; | ||
610 | streaming->header.bTerminalLink = buffer[8]; | ||
611 | streaming->header.bStillCaptureMethod = buffer[9]; | ||
612 | streaming->header.bTriggerSupport = buffer[10]; | ||
613 | streaming->header.bTriggerUsage = buffer[11]; | ||
614 | streaming->header.bControlSize = n; | ||
615 | |||
616 | streaming->header.bmaControls = kmalloc(p*n, GFP_KERNEL); | ||
617 | if (streaming->header.bmaControls == NULL) { | ||
618 | ret = -ENOMEM; | ||
619 | goto error; | ||
620 | } | ||
621 | |||
622 | memcpy(streaming->header.bmaControls, &buffer[13], p*n); | ||
623 | } else { | ||
624 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming interface " | ||
625 | "%d HEADER descriptor not found.\n", dev->udev->devnum, | ||
626 | alts->desc.bInterfaceNumber); | ||
627 | goto error; | ||
628 | } | ||
629 | |||
630 | buflen -= buffer[0]; | ||
631 | buffer += buffer[0]; | ||
632 | |||
633 | _buffer = buffer; | ||
634 | _buflen = buflen; | ||
635 | |||
636 | /* Count the format and frame descriptors. */ | ||
637 | while (_buflen > 2) { | ||
638 | switch (_buffer[2]) { | ||
639 | case VS_FORMAT_UNCOMPRESSED: | ||
640 | case VS_FORMAT_MJPEG: | ||
641 | case VS_FORMAT_FRAME_BASED: | ||
642 | nformats++; | ||
643 | break; | ||
644 | |||
645 | case VS_FORMAT_DV: | ||
646 | /* DV format has no frame descriptor. We will create a | ||
647 | * dummy frame descriptor with a dummy frame interval. | ||
648 | */ | ||
649 | nformats++; | ||
650 | nframes++; | ||
651 | nintervals++; | ||
652 | break; | ||
653 | |||
654 | case VS_FORMAT_MPEG2TS: | ||
655 | case VS_FORMAT_STREAM_BASED: | ||
656 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming " | ||
657 | "interface %d FORMAT %u is not supported.\n", | ||
658 | dev->udev->devnum, | ||
659 | alts->desc.bInterfaceNumber, _buffer[2]); | ||
660 | break; | ||
661 | |||
662 | case VS_FRAME_UNCOMPRESSED: | ||
663 | case VS_FRAME_MJPEG: | ||
664 | nframes++; | ||
665 | if (_buflen > 25) | ||
666 | nintervals += _buffer[25] ? _buffer[25] : 3; | ||
667 | break; | ||
668 | |||
669 | case VS_FRAME_FRAME_BASED: | ||
670 | nframes++; | ||
671 | if (_buflen > 21) | ||
672 | nintervals += _buffer[21] ? _buffer[21] : 3; | ||
673 | break; | ||
674 | } | ||
675 | |||
676 | _buflen -= _buffer[0]; | ||
677 | _buffer += _buffer[0]; | ||
678 | } | ||
679 | |||
680 | if (nformats == 0) { | ||
681 | uvc_trace(UVC_TRACE_DESCR, "device %d videostreaming interface " | ||
682 | "%d has no supported formats defined.\n", | ||
683 | dev->udev->devnum, alts->desc.bInterfaceNumber); | ||
684 | goto error; | ||
685 | } | ||
686 | |||
687 | size = nformats * sizeof *format + nframes * sizeof *frame | ||
688 | + nintervals * sizeof *interval; | ||
689 | format = kzalloc(size, GFP_KERNEL); | ||
690 | if (format == NULL) { | ||
691 | ret = -ENOMEM; | ||
692 | goto error; | ||
693 | } | ||
694 | |||
695 | frame = (struct uvc_frame *)&format[nformats]; | ||
696 | interval = (__u32 *)&frame[nframes]; | ||
697 | |||
698 | streaming->format = format; | ||
699 | streaming->nformats = nformats; | ||
700 | |||
701 | /* Parse the format descriptors. */ | ||
702 | while (buflen > 2) { | ||
703 | switch (buffer[2]) { | ||
704 | case VS_FORMAT_UNCOMPRESSED: | ||
705 | case VS_FORMAT_MJPEG: | ||
706 | case VS_FORMAT_DV: | ||
707 | case VS_FORMAT_FRAME_BASED: | ||
708 | format->frame = frame; | ||
709 | ret = uvc_parse_format(dev, streaming, format, | ||
710 | &interval, buffer, buflen); | ||
711 | if (ret < 0) | ||
712 | goto error; | ||
713 | |||
714 | frame += format->nframes; | ||
715 | format++; | ||
716 | |||
717 | buflen -= ret; | ||
718 | buffer += ret; | ||
719 | continue; | ||
720 | |||
721 | default: | ||
722 | break; | ||
723 | } | ||
724 | |||
725 | buflen -= buffer[0]; | ||
726 | buffer += buffer[0]; | ||
727 | } | ||
728 | |||
729 | /* Parse the alternate settings to find the maximum bandwidth. */ | ||
730 | for (i = 0; i < intf->num_altsetting; ++i) { | ||
731 | struct usb_host_endpoint *ep; | ||
732 | alts = &intf->altsetting[i]; | ||
733 | ep = uvc_find_endpoint(alts, | ||
734 | streaming->header.bEndpointAddress); | ||
735 | if (ep == NULL) | ||
736 | continue; | ||
737 | |||
738 | psize = le16_to_cpu(ep->desc.wMaxPacketSize); | ||
739 | psize = (psize & 0x07ff) * (1 + ((psize >> 11) & 3)); | ||
740 | if (psize > streaming->maxpsize) | ||
741 | streaming->maxpsize = psize; | ||
742 | } | ||
743 | |||
744 | list_add_tail(&streaming->list, &dev->streaming); | ||
745 | return 0; | ||
746 | |||
747 | error: | ||
748 | usb_driver_release_interface(&uvc_driver.driver, intf); | ||
749 | usb_put_intf(intf); | ||
750 | kfree(streaming->format); | ||
751 | kfree(streaming->header.bmaControls); | ||
752 | kfree(streaming); | ||
753 | return ret; | ||
754 | } | ||
755 | |||
756 | /* Parse vendor-specific extensions. */ | ||
757 | static int uvc_parse_vendor_control(struct uvc_device *dev, | ||
758 | const unsigned char *buffer, int buflen) | ||
759 | { | ||
760 | struct usb_device *udev = dev->udev; | ||
761 | struct usb_host_interface *alts = dev->intf->cur_altsetting; | ||
762 | struct uvc_entity *unit; | ||
763 | unsigned int n, p; | ||
764 | int handled = 0; | ||
765 | |||
766 | switch (le16_to_cpu(dev->udev->descriptor.idVendor)) { | ||
767 | case 0x046d: /* Logitech */ | ||
768 | if (buffer[1] != 0x41 || buffer[2] != 0x01) | ||
769 | break; | ||
770 | |||
771 | /* Logitech implements several vendor specific functions | ||
772 | * through vendor specific extension units (LXU). | ||
773 | * | ||
774 | * The LXU descriptors are similar to XU descriptors | ||
775 | * (see "USB Device Video Class for Video Devices", section | ||
776 | * 3.7.2.6 "Extension Unit Descriptor") with the following | ||
777 | * differences: | ||
778 | * | ||
779 | * ---------------------------------------------------------- | ||
780 | * 0 bLength 1 Number | ||
781 | * Size of this descriptor, in bytes: 24+p+n*2 | ||
782 | * ---------------------------------------------------------- | ||
783 | * 23+p+n bmControlsType N Bitmap | ||
784 | * Individual bits in the set are defined: | ||
785 | * 0: Absolute | ||
786 | * 1: Relative | ||
787 | * | ||
788 | * This bitset is mapped exactly the same as bmControls. | ||
789 | * ---------------------------------------------------------- | ||
790 | * 23+p+n*2 bReserved 1 Boolean | ||
791 | * ---------------------------------------------------------- | ||
792 | * 24+p+n*2 iExtension 1 Index | ||
793 | * Index of a string descriptor that describes this | ||
794 | * extension unit. | ||
795 | * ---------------------------------------------------------- | ||
796 | */ | ||
797 | p = buflen >= 22 ? buffer[21] : 0; | ||
798 | n = buflen >= 25 + p ? buffer[22+p] : 0; | ||
799 | |||
800 | if (buflen < 25 + p + 2*n) { | ||
801 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
802 | "interface %d EXTENSION_UNIT error\n", | ||
803 | udev->devnum, alts->desc.bInterfaceNumber); | ||
804 | break; | ||
805 | } | ||
806 | |||
807 | unit = kzalloc(sizeof *unit + p + 2*n, GFP_KERNEL); | ||
808 | if (unit == NULL) | ||
809 | return -ENOMEM; | ||
810 | |||
811 | unit->id = buffer[3]; | ||
812 | unit->type = VC_EXTENSION_UNIT; | ||
813 | memcpy(unit->extension.guidExtensionCode, &buffer[4], 16); | ||
814 | unit->extension.bNumControls = buffer[20]; | ||
815 | unit->extension.bNrInPins = | ||
816 | le16_to_cpup((__le16 *)&buffer[21]); | ||
817 | unit->extension.baSourceID = (__u8 *)unit + sizeof *unit; | ||
818 | memcpy(unit->extension.baSourceID, &buffer[22], p); | ||
819 | unit->extension.bControlSize = buffer[22+p]; | ||
820 | unit->extension.bmControls = (__u8 *)unit + sizeof *unit + p; | ||
821 | unit->extension.bmControlsType = (__u8 *)unit + sizeof *unit | ||
822 | + p + n; | ||
823 | memcpy(unit->extension.bmControls, &buffer[23+p], 2*n); | ||
824 | |||
825 | if (buffer[24+p+2*n] != 0) | ||
826 | usb_string(udev, buffer[24+p+2*n], unit->name, | ||
827 | sizeof unit->name); | ||
828 | else | ||
829 | sprintf(unit->name, "Extension %u", buffer[3]); | ||
830 | |||
831 | list_add_tail(&unit->list, &dev->entities); | ||
832 | handled = 1; | ||
833 | break; | ||
834 | } | ||
835 | |||
836 | return handled; | ||
837 | } | ||
838 | |||
839 | static int uvc_parse_standard_control(struct uvc_device *dev, | ||
840 | const unsigned char *buffer, int buflen) | ||
841 | { | ||
842 | struct usb_device *udev = dev->udev; | ||
843 | struct uvc_entity *unit, *term; | ||
844 | struct usb_interface *intf; | ||
845 | struct usb_host_interface *alts = dev->intf->cur_altsetting; | ||
846 | unsigned int i, n, p, len; | ||
847 | __u16 type; | ||
848 | |||
849 | switch (buffer[2]) { | ||
850 | case VC_HEADER: | ||
851 | n = buflen >= 12 ? buffer[11] : 0; | ||
852 | |||
853 | if (buflen < 12 || buflen < 12 + n) { | ||
854 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
855 | "interface %d HEADER error\n", udev->devnum, | ||
856 | alts->desc.bInterfaceNumber); | ||
857 | return -EINVAL; | ||
858 | } | ||
859 | |||
860 | dev->uvc_version = le16_to_cpup((__le16 *)&buffer[3]); | ||
861 | dev->clock_frequency = le32_to_cpup((__le32 *)&buffer[7]); | ||
862 | |||
863 | /* Parse all USB Video Streaming interfaces. */ | ||
864 | for (i = 0; i < n; ++i) { | ||
865 | intf = usb_ifnum_to_if(udev, buffer[12+i]); | ||
866 | if (intf == NULL) { | ||
867 | uvc_trace(UVC_TRACE_DESCR, "device %d " | ||
868 | "interface %d doesn't exists\n", | ||
869 | udev->devnum, i); | ||
870 | continue; | ||
871 | } | ||
872 | |||
873 | uvc_parse_streaming(dev, intf); | ||
874 | } | ||
875 | break; | ||
876 | |||
877 | case VC_INPUT_TERMINAL: | ||
878 | if (buflen < 8) { | ||
879 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
880 | "interface %d INPUT_TERMINAL error\n", | ||
881 | udev->devnum, alts->desc.bInterfaceNumber); | ||
882 | return -EINVAL; | ||
883 | } | ||
884 | |||
885 | /* Make sure the terminal type MSB is not null, otherwise it | ||
886 | * could be confused with a unit. | ||
887 | */ | ||
888 | type = le16_to_cpup((__le16 *)&buffer[4]); | ||
889 | if ((type & 0xff00) == 0) { | ||
890 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
891 | "interface %d INPUT_TERMINAL %d has invalid " | ||
892 | "type 0x%04x, skipping\n", udev->devnum, | ||
893 | alts->desc.bInterfaceNumber, | ||
894 | buffer[3], type); | ||
895 | return 0; | ||
896 | } | ||
897 | |||
898 | n = 0; | ||
899 | p = 0; | ||
900 | len = 8; | ||
901 | |||
902 | if (type == ITT_CAMERA) { | ||
903 | n = buflen >= 15 ? buffer[14] : 0; | ||
904 | len = 15; | ||
905 | |||
906 | } else if (type == ITT_MEDIA_TRANSPORT_INPUT) { | ||
907 | n = buflen >= 9 ? buffer[8] : 0; | ||
908 | p = buflen >= 10 + n ? buffer[9+n] : 0; | ||
909 | len = 10; | ||
910 | } | ||
911 | |||
912 | if (buflen < len + n + p) { | ||
913 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
914 | "interface %d INPUT_TERMINAL error\n", | ||
915 | udev->devnum, alts->desc.bInterfaceNumber); | ||
916 | return -EINVAL; | ||
917 | } | ||
918 | |||
919 | term = kzalloc(sizeof *term + n + p, GFP_KERNEL); | ||
920 | if (term == NULL) | ||
921 | return -ENOMEM; | ||
922 | |||
923 | term->id = buffer[3]; | ||
924 | term->type = type | UVC_TERM_INPUT; | ||
925 | |||
926 | if (UVC_ENTITY_TYPE(term) == ITT_CAMERA) { | ||
927 | term->camera.bControlSize = n; | ||
928 | term->camera.bmControls = (__u8 *)term + sizeof *term; | ||
929 | term->camera.wObjectiveFocalLengthMin = | ||
930 | le16_to_cpup((__le16 *)&buffer[8]); | ||
931 | term->camera.wObjectiveFocalLengthMax = | ||
932 | le16_to_cpup((__le16 *)&buffer[10]); | ||
933 | term->camera.wOcularFocalLength = | ||
934 | le16_to_cpup((__le16 *)&buffer[12]); | ||
935 | memcpy(term->camera.bmControls, &buffer[15], n); | ||
936 | } else if (UVC_ENTITY_TYPE(term) == ITT_MEDIA_TRANSPORT_INPUT) { | ||
937 | term->media.bControlSize = n; | ||
938 | term->media.bmControls = (__u8 *)term + sizeof *term; | ||
939 | term->media.bTransportModeSize = p; | ||
940 | term->media.bmTransportModes = (__u8 *)term | ||
941 | + sizeof *term + n; | ||
942 | memcpy(term->media.bmControls, &buffer[9], n); | ||
943 | memcpy(term->media.bmTransportModes, &buffer[10+n], p); | ||
944 | } | ||
945 | |||
946 | if (buffer[7] != 0) | ||
947 | usb_string(udev, buffer[7], term->name, | ||
948 | sizeof term->name); | ||
949 | else if (UVC_ENTITY_TYPE(term) == ITT_CAMERA) | ||
950 | sprintf(term->name, "Camera %u", buffer[3]); | ||
951 | else if (UVC_ENTITY_TYPE(term) == ITT_MEDIA_TRANSPORT_INPUT) | ||
952 | sprintf(term->name, "Media %u", buffer[3]); | ||
953 | else | ||
954 | sprintf(term->name, "Input %u", buffer[3]); | ||
955 | |||
956 | list_add_tail(&term->list, &dev->entities); | ||
957 | break; | ||
958 | |||
959 | case VC_OUTPUT_TERMINAL: | ||
960 | if (buflen < 9) { | ||
961 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
962 | "interface %d OUTPUT_TERMINAL error\n", | ||
963 | udev->devnum, alts->desc.bInterfaceNumber); | ||
964 | return -EINVAL; | ||
965 | } | ||
966 | |||
967 | /* Make sure the terminal type MSB is not null, otherwise it | ||
968 | * could be confused with a unit. | ||
969 | */ | ||
970 | type = le16_to_cpup((__le16 *)&buffer[4]); | ||
971 | if ((type & 0xff00) == 0) { | ||
972 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
973 | "interface %d OUTPUT_TERMINAL %d has invalid " | ||
974 | "type 0x%04x, skipping\n", udev->devnum, | ||
975 | alts->desc.bInterfaceNumber, buffer[3], type); | ||
976 | return 0; | ||
977 | } | ||
978 | |||
979 | term = kzalloc(sizeof *term, GFP_KERNEL); | ||
980 | if (term == NULL) | ||
981 | return -ENOMEM; | ||
982 | |||
983 | term->id = buffer[3]; | ||
984 | term->type = type | UVC_TERM_OUTPUT; | ||
985 | term->output.bSourceID = buffer[7]; | ||
986 | |||
987 | if (buffer[8] != 0) | ||
988 | usb_string(udev, buffer[8], term->name, | ||
989 | sizeof term->name); | ||
990 | else | ||
991 | sprintf(term->name, "Output %u", buffer[3]); | ||
992 | |||
993 | list_add_tail(&term->list, &dev->entities); | ||
994 | break; | ||
995 | |||
996 | case VC_SELECTOR_UNIT: | ||
997 | p = buflen >= 5 ? buffer[4] : 0; | ||
998 | |||
999 | if (buflen < 5 || buflen < 6 + p) { | ||
1000 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
1001 | "interface %d SELECTOR_UNIT error\n", | ||
1002 | udev->devnum, alts->desc.bInterfaceNumber); | ||
1003 | return -EINVAL; | ||
1004 | } | ||
1005 | |||
1006 | unit = kzalloc(sizeof *unit + p, GFP_KERNEL); | ||
1007 | if (unit == NULL) | ||
1008 | return -ENOMEM; | ||
1009 | |||
1010 | unit->id = buffer[3]; | ||
1011 | unit->type = buffer[2]; | ||
1012 | unit->selector.bNrInPins = buffer[4]; | ||
1013 | unit->selector.baSourceID = (__u8 *)unit + sizeof *unit; | ||
1014 | memcpy(unit->selector.baSourceID, &buffer[5], p); | ||
1015 | |||
1016 | if (buffer[5+p] != 0) | ||
1017 | usb_string(udev, buffer[5+p], unit->name, | ||
1018 | sizeof unit->name); | ||
1019 | else | ||
1020 | sprintf(unit->name, "Selector %u", buffer[3]); | ||
1021 | |||
1022 | list_add_tail(&unit->list, &dev->entities); | ||
1023 | break; | ||
1024 | |||
1025 | case VC_PROCESSING_UNIT: | ||
1026 | n = buflen >= 8 ? buffer[7] : 0; | ||
1027 | p = dev->uvc_version >= 0x0110 ? 10 : 9; | ||
1028 | |||
1029 | if (buflen < p + n) { | ||
1030 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
1031 | "interface %d PROCESSING_UNIT error\n", | ||
1032 | udev->devnum, alts->desc.bInterfaceNumber); | ||
1033 | return -EINVAL; | ||
1034 | } | ||
1035 | |||
1036 | unit = kzalloc(sizeof *unit + n, GFP_KERNEL); | ||
1037 | if (unit == NULL) | ||
1038 | return -ENOMEM; | ||
1039 | |||
1040 | unit->id = buffer[3]; | ||
1041 | unit->type = buffer[2]; | ||
1042 | unit->processing.bSourceID = buffer[4]; | ||
1043 | unit->processing.wMaxMultiplier = | ||
1044 | le16_to_cpup((__le16 *)&buffer[5]); | ||
1045 | unit->processing.bControlSize = buffer[7]; | ||
1046 | unit->processing.bmControls = (__u8 *)unit + sizeof *unit; | ||
1047 | memcpy(unit->processing.bmControls, &buffer[8], n); | ||
1048 | if (dev->uvc_version >= 0x0110) | ||
1049 | unit->processing.bmVideoStandards = buffer[9+n]; | ||
1050 | |||
1051 | if (buffer[8+n] != 0) | ||
1052 | usb_string(udev, buffer[8+n], unit->name, | ||
1053 | sizeof unit->name); | ||
1054 | else | ||
1055 | sprintf(unit->name, "Processing %u", buffer[3]); | ||
1056 | |||
1057 | list_add_tail(&unit->list, &dev->entities); | ||
1058 | break; | ||
1059 | |||
1060 | case VC_EXTENSION_UNIT: | ||
1061 | p = buflen >= 22 ? buffer[21] : 0; | ||
1062 | n = buflen >= 24 + p ? buffer[22+p] : 0; | ||
1063 | |||
1064 | if (buflen < 24 + p + n) { | ||
1065 | uvc_trace(UVC_TRACE_DESCR, "device %d videocontrol " | ||
1066 | "interface %d EXTENSION_UNIT error\n", | ||
1067 | udev->devnum, alts->desc.bInterfaceNumber); | ||
1068 | return -EINVAL; | ||
1069 | } | ||
1070 | |||
1071 | unit = kzalloc(sizeof *unit + p + n, GFP_KERNEL); | ||
1072 | if (unit == NULL) | ||
1073 | return -ENOMEM; | ||
1074 | |||
1075 | unit->id = buffer[3]; | ||
1076 | unit->type = buffer[2]; | ||
1077 | memcpy(unit->extension.guidExtensionCode, &buffer[4], 16); | ||
1078 | unit->extension.bNumControls = buffer[20]; | ||
1079 | unit->extension.bNrInPins = | ||
1080 | le16_to_cpup((__le16 *)&buffer[21]); | ||
1081 | unit->extension.baSourceID = (__u8 *)unit + sizeof *unit; | ||
1082 | memcpy(unit->extension.baSourceID, &buffer[22], p); | ||
1083 | unit->extension.bControlSize = buffer[22+p]; | ||
1084 | unit->extension.bmControls = (__u8 *)unit + sizeof *unit + p; | ||
1085 | memcpy(unit->extension.bmControls, &buffer[23+p], n); | ||
1086 | |||
1087 | if (buffer[23+p+n] != 0) | ||
1088 | usb_string(udev, buffer[23+p+n], unit->name, | ||
1089 | sizeof unit->name); | ||
1090 | else | ||
1091 | sprintf(unit->name, "Extension %u", buffer[3]); | ||
1092 | |||
1093 | list_add_tail(&unit->list, &dev->entities); | ||
1094 | break; | ||
1095 | |||
1096 | default: | ||
1097 | uvc_trace(UVC_TRACE_DESCR, "Found an unknown CS_INTERFACE " | ||
1098 | "descriptor (%u)\n", buffer[2]); | ||
1099 | break; | ||
1100 | } | ||
1101 | |||
1102 | return 0; | ||
1103 | } | ||
1104 | |||
1105 | static int uvc_parse_control(struct uvc_device *dev) | ||
1106 | { | ||
1107 | struct usb_host_interface *alts = dev->intf->cur_altsetting; | ||
1108 | unsigned char *buffer = alts->extra; | ||
1109 | int buflen = alts->extralen; | ||
1110 | int ret; | ||
1111 | |||
1112 | /* Parse the default alternate setting only, as the UVC specification | ||
1113 | * defines a single alternate setting, the default alternate setting | ||
1114 | * zero. | ||
1115 | */ | ||
1116 | |||
1117 | while (buflen > 2) { | ||
1118 | if (uvc_parse_vendor_control(dev, buffer, buflen) || | ||
1119 | buffer[1] != USB_DT_CS_INTERFACE) | ||
1120 | goto next_descriptor; | ||
1121 | |||
1122 | if ((ret = uvc_parse_standard_control(dev, buffer, buflen)) < 0) | ||
1123 | return ret; | ||
1124 | |||
1125 | next_descriptor: | ||
1126 | buflen -= buffer[0]; | ||
1127 | buffer += buffer[0]; | ||
1128 | } | ||
1129 | |||
1130 | /* Check if the optional status endpoint is present. */ | ||
1131 | if (alts->desc.bNumEndpoints == 1) { | ||
1132 | struct usb_host_endpoint *ep = &alts->endpoint[0]; | ||
1133 | struct usb_endpoint_descriptor *desc = &ep->desc; | ||
1134 | |||
1135 | if (usb_endpoint_is_int_in(desc) && | ||
1136 | le16_to_cpu(desc->wMaxPacketSize) >= 8 && | ||
1137 | desc->bInterval != 0) { | ||
1138 | uvc_trace(UVC_TRACE_DESCR, "Found a Status endpoint " | ||
1139 | "(addr %02x).\n", desc->bEndpointAddress); | ||
1140 | dev->int_ep = ep; | ||
1141 | } | ||
1142 | } | ||
1143 | |||
1144 | return 0; | ||
1145 | } | ||
1146 | |||
1147 | /* ------------------------------------------------------------------------ | ||
1148 | * USB probe and disconnect | ||
1149 | */ | ||
1150 | |||
1151 | /* | ||
1152 | * Unregister the video devices. | ||
1153 | */ | ||
1154 | static void uvc_unregister_video(struct uvc_device *dev) | ||
1155 | { | ||
1156 | if (dev->video.vdev) { | ||
1157 | if (dev->video.vdev->minor == -1) | ||
1158 | video_device_release(dev->video.vdev); | ||
1159 | else | ||
1160 | video_unregister_device(dev->video.vdev); | ||
1161 | dev->video.vdev = NULL; | ||
1162 | } | ||
1163 | } | ||
1164 | |||
1165 | /* | ||
1166 | * Scan the UVC descriptors to locate a chain starting at an Output Terminal | ||
1167 | * and containing the following units: | ||
1168 | * | ||
1169 | * - a USB Streaming Output Terminal | ||
1170 | * - zero or one Processing Unit | ||
1171 | * - zero, one or mode single-input Selector Units | ||
1172 | * - zero or one multiple-input Selector Units, provided all inputs are | ||
1173 | * connected to input terminals | ||
1174 | * - zero, one or mode single-input Extension Units | ||
1175 | * - one Camera Input Terminal, or one or more External terminals. | ||
1176 | * | ||
1177 | * A side forward scan is made on each detected entity to check for additional | ||
1178 | * extension units. | ||
1179 | */ | ||
1180 | static int uvc_scan_chain_entity(struct uvc_video_device *video, | ||
1181 | struct uvc_entity *entity) | ||
1182 | { | ||
1183 | switch (UVC_ENTITY_TYPE(entity)) { | ||
1184 | case VC_EXTENSION_UNIT: | ||
1185 | if (uvc_trace_param & UVC_TRACE_PROBE) | ||
1186 | printk(" <- XU %d", entity->id); | ||
1187 | |||
1188 | if (entity->extension.bNrInPins != 1) { | ||
1189 | uvc_trace(UVC_TRACE_DESCR, "Extension unit %d has more " | ||
1190 | "than 1 input pin.\n", entity->id); | ||
1191 | return -1; | ||
1192 | } | ||
1193 | |||
1194 | list_add_tail(&entity->chain, &video->extensions); | ||
1195 | break; | ||
1196 | |||
1197 | case VC_PROCESSING_UNIT: | ||
1198 | if (uvc_trace_param & UVC_TRACE_PROBE) | ||
1199 | printk(" <- PU %d", entity->id); | ||
1200 | |||
1201 | if (video->processing != NULL) { | ||
1202 | uvc_trace(UVC_TRACE_DESCR, "Found multiple " | ||
1203 | "Processing Units in chain.\n"); | ||
1204 | return -1; | ||
1205 | } | ||
1206 | |||
1207 | video->processing = entity; | ||
1208 | break; | ||
1209 | |||
1210 | case VC_SELECTOR_UNIT: | ||
1211 | if (uvc_trace_param & UVC_TRACE_PROBE) | ||
1212 | printk(" <- SU %d", entity->id); | ||
1213 | |||
1214 | /* Single-input selector units are ignored. */ | ||
1215 | if (entity->selector.bNrInPins == 1) | ||
1216 | break; | ||
1217 | |||
1218 | if (video->selector != NULL) { | ||
1219 | uvc_trace(UVC_TRACE_DESCR, "Found multiple Selector " | ||
1220 | "Units in chain.\n"); | ||
1221 | return -1; | ||
1222 | } | ||
1223 | |||
1224 | video->selector = entity; | ||
1225 | break; | ||
1226 | |||
1227 | case ITT_VENDOR_SPECIFIC: | ||
1228 | case ITT_CAMERA: | ||
1229 | case ITT_MEDIA_TRANSPORT_INPUT: | ||
1230 | if (uvc_trace_param & UVC_TRACE_PROBE) | ||
1231 | printk(" <- IT %d\n", entity->id); | ||
1232 | |||
1233 | list_add_tail(&entity->chain, &video->iterms); | ||
1234 | break; | ||
1235 | |||
1236 | default: | ||
1237 | uvc_trace(UVC_TRACE_DESCR, "Unsupported entity type " | ||
1238 | "0x%04x found in chain.\n", UVC_ENTITY_TYPE(entity)); | ||
1239 | return -1; | ||
1240 | } | ||
1241 | |||
1242 | return 0; | ||
1243 | } | ||
1244 | |||
1245 | static int uvc_scan_chain_forward(struct uvc_video_device *video, | ||
1246 | struct uvc_entity *entity, struct uvc_entity *prev) | ||
1247 | { | ||
1248 | struct uvc_entity *forward; | ||
1249 | int found; | ||
1250 | |||
1251 | /* Forward scan */ | ||
1252 | forward = NULL; | ||
1253 | found = 0; | ||
1254 | |||
1255 | while (1) { | ||
1256 | forward = uvc_entity_by_reference(video->dev, entity->id, | ||
1257 | forward); | ||
1258 | if (forward == NULL) | ||
1259 | break; | ||
1260 | |||
1261 | if (UVC_ENTITY_TYPE(forward) != VC_EXTENSION_UNIT || | ||
1262 | forward == prev) | ||
1263 | continue; | ||
1264 | |||
1265 | if (forward->extension.bNrInPins != 1) { | ||
1266 | uvc_trace(UVC_TRACE_DESCR, "Extension unit %d has" | ||
1267 | "more than 1 input pin.\n", entity->id); | ||
1268 | return -1; | ||
1269 | } | ||
1270 | |||
1271 | list_add_tail(&forward->chain, &video->extensions); | ||
1272 | if (uvc_trace_param & UVC_TRACE_PROBE) { | ||
1273 | if (!found) | ||
1274 | printk(" (-> XU"); | ||
1275 | |||
1276 | printk(" %d", forward->id); | ||
1277 | found = 1; | ||
1278 | } | ||
1279 | } | ||
1280 | if (found) | ||
1281 | printk(")"); | ||
1282 | |||
1283 | return 0; | ||
1284 | } | ||
1285 | |||
1286 | static int uvc_scan_chain_backward(struct uvc_video_device *video, | ||
1287 | struct uvc_entity *entity) | ||
1288 | { | ||
1289 | struct uvc_entity *term; | ||
1290 | int id = -1, i; | ||
1291 | |||
1292 | switch (UVC_ENTITY_TYPE(entity)) { | ||
1293 | case VC_EXTENSION_UNIT: | ||
1294 | id = entity->extension.baSourceID[0]; | ||
1295 | break; | ||
1296 | |||
1297 | case VC_PROCESSING_UNIT: | ||
1298 | id = entity->processing.bSourceID; | ||
1299 | break; | ||
1300 | |||
1301 | case VC_SELECTOR_UNIT: | ||
1302 | /* Single-input selector units are ignored. */ | ||
1303 | if (entity->selector.bNrInPins == 1) { | ||
1304 | id = entity->selector.baSourceID[0]; | ||
1305 | break; | ||
1306 | } | ||
1307 | |||
1308 | if (uvc_trace_param & UVC_TRACE_PROBE) | ||
1309 | printk(" <- IT"); | ||
1310 | |||
1311 | video->selector = entity; | ||
1312 | for (i = 0; i < entity->selector.bNrInPins; ++i) { | ||
1313 | id = entity->selector.baSourceID[i]; | ||
1314 | term = uvc_entity_by_id(video->dev, id); | ||
1315 | if (term == NULL || !UVC_ENTITY_IS_ITERM(term)) { | ||
1316 | uvc_trace(UVC_TRACE_DESCR, "Selector unit %d " | ||
1317 | "input %d isn't connected to an " | ||
1318 | "input terminal\n", entity->id, i); | ||
1319 | return -1; | ||
1320 | } | ||
1321 | |||
1322 | if (uvc_trace_param & UVC_TRACE_PROBE) | ||
1323 | printk(" %d", term->id); | ||
1324 | |||
1325 | list_add_tail(&term->chain, &video->iterms); | ||
1326 | uvc_scan_chain_forward(video, term, entity); | ||
1327 | } | ||
1328 | |||
1329 | if (uvc_trace_param & UVC_TRACE_PROBE) | ||
1330 | printk("\n"); | ||
1331 | |||
1332 | id = 0; | ||
1333 | break; | ||
1334 | } | ||
1335 | |||
1336 | return id; | ||
1337 | } | ||
1338 | |||
1339 | static int uvc_scan_chain(struct uvc_video_device *video) | ||
1340 | { | ||
1341 | struct uvc_entity *entity, *prev; | ||
1342 | int id; | ||
1343 | |||
1344 | entity = video->oterm; | ||
1345 | uvc_trace(UVC_TRACE_PROBE, "Scanning UVC chain: OT %d", entity->id); | ||
1346 | id = entity->output.bSourceID; | ||
1347 | while (id != 0) { | ||
1348 | prev = entity; | ||
1349 | entity = uvc_entity_by_id(video->dev, id); | ||
1350 | if (entity == NULL) { | ||
1351 | uvc_trace(UVC_TRACE_DESCR, "Found reference to " | ||
1352 | "unknown entity %d.\n", id); | ||
1353 | return -1; | ||
1354 | } | ||
1355 | |||
1356 | /* Process entity */ | ||
1357 | if (uvc_scan_chain_entity(video, entity) < 0) | ||
1358 | return -1; | ||
1359 | |||
1360 | /* Forward scan */ | ||
1361 | if (uvc_scan_chain_forward(video, entity, prev) < 0) | ||
1362 | return -1; | ||
1363 | |||
1364 | /* Stop when a terminal is found. */ | ||
1365 | if (!UVC_ENTITY_IS_UNIT(entity)) | ||
1366 | break; | ||
1367 | |||
1368 | /* Backward scan */ | ||
1369 | id = uvc_scan_chain_backward(video, entity); | ||
1370 | if (id < 0) | ||
1371 | return id; | ||
1372 | } | ||
1373 | |||
1374 | /* Initialize the video buffers queue. */ | ||
1375 | uvc_queue_init(&video->queue); | ||
1376 | |||
1377 | return 0; | ||
1378 | } | ||
1379 | |||
1380 | /* | ||
1381 | * Register the video devices. | ||
1382 | * | ||
1383 | * The driver currently supports a single video device per control interface | ||
1384 | * only. The terminal and units must match the following structure: | ||
1385 | * | ||
1386 | * ITT_CAMERA -> VC_PROCESSING_UNIT -> VC_EXTENSION_UNIT{0,n} -> TT_STREAMING | ||
1387 | * | ||
1388 | * The Extension Units, if present, must have a single input pin. The | ||
1389 | * Processing Unit and Extension Units can be in any order. Additional | ||
1390 | * Extension Units connected to the main chain as single-unit branches are | ||
1391 | * also supported. | ||
1392 | */ | ||
1393 | static int uvc_register_video(struct uvc_device *dev) | ||
1394 | { | ||
1395 | struct video_device *vdev; | ||
1396 | struct uvc_entity *term; | ||
1397 | int found = 0, ret; | ||
1398 | |||
1399 | /* Check if the control interface matches the structure we expect. */ | ||
1400 | list_for_each_entry(term, &dev->entities, list) { | ||
1401 | struct uvc_streaming *streaming; | ||
1402 | |||
1403 | if (UVC_ENTITY_TYPE(term) != TT_STREAMING) | ||
1404 | continue; | ||
1405 | |||
1406 | memset(&dev->video, 0, sizeof dev->video); | ||
1407 | mutex_init(&dev->video.ctrl_mutex); | ||
1408 | INIT_LIST_HEAD(&dev->video.iterms); | ||
1409 | INIT_LIST_HEAD(&dev->video.extensions); | ||
1410 | dev->video.oterm = term; | ||
1411 | dev->video.dev = dev; | ||
1412 | if (uvc_scan_chain(&dev->video) < 0) | ||
1413 | continue; | ||
1414 | |||
1415 | list_for_each_entry(streaming, &dev->streaming, list) { | ||
1416 | if (streaming->header.bTerminalLink == term->id) { | ||
1417 | dev->video.streaming = streaming; | ||
1418 | found = 1; | ||
1419 | break; | ||
1420 | } | ||
1421 | } | ||
1422 | |||
1423 | if (found) | ||
1424 | break; | ||
1425 | } | ||
1426 | |||
1427 | if (!found) { | ||
1428 | uvc_printk(KERN_INFO, "No valid video chain found.\n"); | ||
1429 | return -1; | ||
1430 | } | ||
1431 | |||
1432 | if (uvc_trace_param & UVC_TRACE_PROBE) { | ||
1433 | uvc_printk(KERN_INFO, "Found a valid video chain ("); | ||
1434 | list_for_each_entry(term, &dev->video.iterms, chain) { | ||
1435 | printk("%d", term->id); | ||
1436 | if (term->chain.next != &dev->video.iterms) | ||
1437 | printk(","); | ||
1438 | } | ||
1439 | printk(" -> %d).\n", dev->video.oterm->id); | ||
1440 | } | ||
1441 | |||
1442 | /* Initialize the streaming interface with default streaming | ||
1443 | * parameters. | ||
1444 | */ | ||
1445 | if ((ret = uvc_video_init(&dev->video)) < 0) { | ||
1446 | uvc_printk(KERN_ERR, "Failed to initialize the device " | ||
1447 | "(%d).\n", ret); | ||
1448 | return ret; | ||
1449 | } | ||
1450 | |||
1451 | /* Register the device with V4L. */ | ||
1452 | vdev = video_device_alloc(); | ||
1453 | if (vdev == NULL) | ||
1454 | return -1; | ||
1455 | |||
1456 | /* We already hold a reference to dev->udev. The video device will be | ||
1457 | * unregistered before the reference is released, so we don't need to | ||
1458 | * get another one. | ||
1459 | */ | ||
1460 | vdev->dev = &dev->intf->dev; | ||
1461 | vdev->type = 0; | ||
1462 | vdev->type2 = 0; | ||
1463 | vdev->minor = -1; | ||
1464 | vdev->fops = &uvc_fops; | ||
1465 | vdev->release = video_device_release; | ||
1466 | strncpy(vdev->name, dev->name, sizeof vdev->name); | ||
1467 | |||
1468 | /* Set the driver data before calling video_register_device, otherwise | ||
1469 | * uvc_v4l2_open might race us. | ||
1470 | * | ||
1471 | * FIXME: usb_set_intfdata hasn't been called so far. Is that a | ||
1472 | * problem ? Does any function which could be called here get | ||
1473 | * a pointer to the usb_interface ? | ||
1474 | */ | ||
1475 | dev->video.vdev = vdev; | ||
1476 | video_set_drvdata(vdev, &dev->video); | ||
1477 | |||
1478 | if (video_register_device(vdev, VFL_TYPE_GRABBER, -1) < 0) { | ||
1479 | dev->video.vdev = NULL; | ||
1480 | video_device_release(vdev); | ||
1481 | return -1; | ||
1482 | } | ||
1483 | |||
1484 | return 0; | ||
1485 | } | ||
1486 | |||
1487 | /* | ||
1488 | * Delete the UVC device. | ||
1489 | * | ||
1490 | * Called by the kernel when the last reference to the uvc_device structure | ||
1491 | * is released. | ||
1492 | * | ||
1493 | * Unregistering the video devices is done here because every opened instance | ||
1494 | * must be closed before the device can be unregistered. An alternative would | ||
1495 | * have been to use another reference count for uvc_v4l2_open/uvc_release, and | ||
1496 | * unregister the video devices on disconnect when that reference count drops | ||
1497 | * to zero. | ||
1498 | * | ||
1499 | * As this function is called after or during disconnect(), all URBs have | ||
1500 | * already been canceled by the USB core. There is no need to kill the | ||
1501 | * interrupt URB manually. | ||
1502 | */ | ||
1503 | void uvc_delete(struct kref *kref) | ||
1504 | { | ||
1505 | struct uvc_device *dev = container_of(kref, struct uvc_device, kref); | ||
1506 | struct list_head *p, *n; | ||
1507 | |||
1508 | /* Unregister the video device */ | ||
1509 | uvc_unregister_video(dev); | ||
1510 | usb_put_intf(dev->intf); | ||
1511 | usb_put_dev(dev->udev); | ||
1512 | |||
1513 | uvc_status_cleanup(dev); | ||
1514 | uvc_ctrl_cleanup_device(dev); | ||
1515 | |||
1516 | list_for_each_safe(p, n, &dev->entities) { | ||
1517 | struct uvc_entity *entity; | ||
1518 | entity = list_entry(p, struct uvc_entity, list); | ||
1519 | kfree(entity); | ||
1520 | } | ||
1521 | |||
1522 | list_for_each_safe(p, n, &dev->streaming) { | ||
1523 | struct uvc_streaming *streaming; | ||
1524 | streaming = list_entry(p, struct uvc_streaming, list); | ||
1525 | usb_driver_release_interface(&uvc_driver.driver, | ||
1526 | streaming->intf); | ||
1527 | usb_put_intf(streaming->intf); | ||
1528 | kfree(streaming->format); | ||
1529 | kfree(streaming->header.bmaControls); | ||
1530 | kfree(streaming); | ||
1531 | } | ||
1532 | |||
1533 | kfree(dev); | ||
1534 | } | ||
1535 | |||
1536 | static int uvc_probe(struct usb_interface *intf, | ||
1537 | const struct usb_device_id *id) | ||
1538 | { | ||
1539 | struct usb_device *udev = interface_to_usbdev(intf); | ||
1540 | struct uvc_device *dev; | ||
1541 | int ret; | ||
1542 | |||
1543 | if (id->idVendor && id->idProduct) | ||
1544 | uvc_trace(UVC_TRACE_PROBE, "Probing known UVC device %s " | ||
1545 | "(%04x:%04x)\n", udev->devpath, id->idVendor, | ||
1546 | id->idProduct); | ||
1547 | else | ||
1548 | uvc_trace(UVC_TRACE_PROBE, "Probing generic UVC device %s\n", | ||
1549 | udev->devpath); | ||
1550 | |||
1551 | /* Allocate memory for the device and initialize it */ | ||
1552 | if ((dev = kzalloc(sizeof *dev, GFP_KERNEL)) == NULL) | ||
1553 | return -ENOMEM; | ||
1554 | |||
1555 | INIT_LIST_HEAD(&dev->entities); | ||
1556 | INIT_LIST_HEAD(&dev->streaming); | ||
1557 | kref_init(&dev->kref); | ||
1558 | |||
1559 | dev->udev = usb_get_dev(udev); | ||
1560 | dev->intf = usb_get_intf(intf); | ||
1561 | dev->intfnum = intf->cur_altsetting->desc.bInterfaceNumber; | ||
1562 | dev->quirks = id->driver_info | uvc_quirks_param; | ||
1563 | |||
1564 | if (udev->product != NULL) | ||
1565 | strncpy(dev->name, udev->product, sizeof dev->name); | ||
1566 | else | ||
1567 | snprintf(dev->name, sizeof dev->name, | ||
1568 | "UVC Camera (%04x:%04x)", | ||
1569 | le16_to_cpu(udev->descriptor.idVendor), | ||
1570 | le16_to_cpu(udev->descriptor.idProduct)); | ||
1571 | |||
1572 | /* Parse the Video Class control descriptor */ | ||
1573 | if (uvc_parse_control(dev) < 0) { | ||
1574 | uvc_trace(UVC_TRACE_PROBE, "Unable to parse UVC " | ||
1575 | "descriptors.\n"); | ||
1576 | goto error; | ||
1577 | } | ||
1578 | |||
1579 | uvc_printk(KERN_INFO, "Found UVC %u.%02u device %s (%04x:%04x)\n", | ||
1580 | dev->uvc_version >> 8, dev->uvc_version & 0xff, | ||
1581 | udev->product ? udev->product : "<unnamed>", | ||
1582 | le16_to_cpu(udev->descriptor.idVendor), | ||
1583 | le16_to_cpu(udev->descriptor.idProduct)); | ||
1584 | |||
1585 | if (uvc_quirks_param != 0) { | ||
1586 | uvc_printk(KERN_INFO, "Forcing device quirks 0x%x by module " | ||
1587 | "parameter for testing purpose.\n", uvc_quirks_param); | ||
1588 | uvc_printk(KERN_INFO, "Please report required quirks to the " | ||
1589 | "linux-uvc-devel mailing list.\n"); | ||
1590 | } | ||
1591 | |||
1592 | /* Initialize controls */ | ||
1593 | if (uvc_ctrl_init_device(dev) < 0) | ||
1594 | goto error; | ||
1595 | |||
1596 | /* Register the video devices */ | ||
1597 | if (uvc_register_video(dev) < 0) | ||
1598 | goto error; | ||
1599 | |||
1600 | /* Save our data pointer in the interface data */ | ||
1601 | usb_set_intfdata(intf, dev); | ||
1602 | |||
1603 | /* Initialize the interrupt URB */ | ||
1604 | if ((ret = uvc_status_init(dev)) < 0) { | ||
1605 | uvc_printk(KERN_INFO, "Unable to initialize the status " | ||
1606 | "endpoint (%d), status interrupt will not be " | ||
1607 | "supported.\n", ret); | ||
1608 | } | ||
1609 | |||
1610 | uvc_trace(UVC_TRACE_PROBE, "UVC device initialized.\n"); | ||
1611 | return 0; | ||
1612 | |||
1613 | error: | ||
1614 | kref_put(&dev->kref, uvc_delete); | ||
1615 | return -ENODEV; | ||
1616 | } | ||
1617 | |||
1618 | static void uvc_disconnect(struct usb_interface *intf) | ||
1619 | { | ||
1620 | struct uvc_device *dev = usb_get_intfdata(intf); | ||
1621 | |||
1622 | /* Set the USB interface data to NULL. This can be done outside the | ||
1623 | * lock, as there's no other reader. | ||
1624 | */ | ||
1625 | usb_set_intfdata(intf, NULL); | ||
1626 | |||
1627 | if (intf->cur_altsetting->desc.bInterfaceSubClass == SC_VIDEOSTREAMING) | ||
1628 | return; | ||
1629 | |||
1630 | /* uvc_v4l2_open() might race uvc_disconnect(). A static driver-wide | ||
1631 | * lock is needed to prevent uvc_disconnect from releasing its | ||
1632 | * reference to the uvc_device instance after uvc_v4l2_open() received | ||
1633 | * the pointer to the device (video_devdata) but before it got the | ||
1634 | * chance to increase the reference count (kref_get). | ||
1635 | */ | ||
1636 | mutex_lock(&uvc_driver.open_mutex); | ||
1637 | |||
1638 | dev->state |= UVC_DEV_DISCONNECTED; | ||
1639 | kref_put(&dev->kref, uvc_delete); | ||
1640 | |||
1641 | mutex_unlock(&uvc_driver.open_mutex); | ||
1642 | } | ||
1643 | |||
1644 | static int uvc_suspend(struct usb_interface *intf, pm_message_t message) | ||
1645 | { | ||
1646 | struct uvc_device *dev = usb_get_intfdata(intf); | ||
1647 | |||
1648 | uvc_trace(UVC_TRACE_SUSPEND, "Suspending interface %u\n", | ||
1649 | intf->cur_altsetting->desc.bInterfaceNumber); | ||
1650 | |||
1651 | /* Controls are cached on the fly so they don't need to be saved. */ | ||
1652 | if (intf->cur_altsetting->desc.bInterfaceSubClass == SC_VIDEOCONTROL) | ||
1653 | return uvc_status_suspend(dev); | ||
1654 | |||
1655 | if (dev->video.streaming->intf != intf) { | ||
1656 | uvc_trace(UVC_TRACE_SUSPEND, "Suspend: video streaming USB " | ||
1657 | "interface mismatch.\n"); | ||
1658 | return -EINVAL; | ||
1659 | } | ||
1660 | |||
1661 | return uvc_video_suspend(&dev->video); | ||
1662 | } | ||
1663 | |||
1664 | static int uvc_resume(struct usb_interface *intf) | ||
1665 | { | ||
1666 | struct uvc_device *dev = usb_get_intfdata(intf); | ||
1667 | int ret; | ||
1668 | |||
1669 | uvc_trace(UVC_TRACE_SUSPEND, "Resuming interface %u\n", | ||
1670 | intf->cur_altsetting->desc.bInterfaceNumber); | ||
1671 | |||
1672 | if (intf->cur_altsetting->desc.bInterfaceSubClass == SC_VIDEOCONTROL) { | ||
1673 | if ((ret = uvc_ctrl_resume_device(dev)) < 0) | ||
1674 | return ret; | ||
1675 | |||
1676 | return uvc_status_resume(dev); | ||
1677 | } | ||
1678 | |||
1679 | if (dev->video.streaming->intf != intf) { | ||
1680 | uvc_trace(UVC_TRACE_SUSPEND, "Resume: video streaming USB " | ||
1681 | "interface mismatch.\n"); | ||
1682 | return -EINVAL; | ||
1683 | } | ||
1684 | |||
1685 | return uvc_video_resume(&dev->video); | ||
1686 | } | ||
1687 | |||
1688 | /* ------------------------------------------------------------------------ | ||
1689 | * Driver initialization and cleanup | ||
1690 | */ | ||
1691 | |||
1692 | /* | ||
1693 | * The Logitech cameras listed below have their interface class set to | ||
1694 | * VENDOR_SPEC because they don't announce themselves as UVC devices, even | ||
1695 | * though they are compliant. | ||
1696 | */ | ||
1697 | static struct usb_device_id uvc_ids[] = { | ||
1698 | /* ALi M5606 (Clevo M540SR) */ | ||
1699 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1700 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1701 | .idVendor = 0x0402, | ||
1702 | .idProduct = 0x5606, | ||
1703 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1704 | .bInterfaceSubClass = 1, | ||
1705 | .bInterfaceProtocol = 0, | ||
1706 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1707 | /* Creative Live! Optia */ | ||
1708 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1709 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1710 | .idVendor = 0x041e, | ||
1711 | .idProduct = 0x4057, | ||
1712 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1713 | .bInterfaceSubClass = 1, | ||
1714 | .bInterfaceProtocol = 0, | ||
1715 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1716 | /* Microsoft Lifecam NX-6000 */ | ||
1717 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1718 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1719 | .idVendor = 0x045e, | ||
1720 | .idProduct = 0x00f8, | ||
1721 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1722 | .bInterfaceSubClass = 1, | ||
1723 | .bInterfaceProtocol = 0, | ||
1724 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1725 | /* Microsoft Lifecam VX-7000 */ | ||
1726 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1727 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1728 | .idVendor = 0x045e, | ||
1729 | .idProduct = 0x0723, | ||
1730 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1731 | .bInterfaceSubClass = 1, | ||
1732 | .bInterfaceProtocol = 0, | ||
1733 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1734 | /* Logitech Quickcam Fusion */ | ||
1735 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1736 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1737 | .idVendor = 0x046d, | ||
1738 | .idProduct = 0x08c1, | ||
1739 | .bInterfaceClass = USB_CLASS_VENDOR_SPEC, | ||
1740 | .bInterfaceSubClass = 1, | ||
1741 | .bInterfaceProtocol = 0 }, | ||
1742 | /* Logitech Quickcam Orbit MP */ | ||
1743 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1744 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1745 | .idVendor = 0x046d, | ||
1746 | .idProduct = 0x08c2, | ||
1747 | .bInterfaceClass = USB_CLASS_VENDOR_SPEC, | ||
1748 | .bInterfaceSubClass = 1, | ||
1749 | .bInterfaceProtocol = 0 }, | ||
1750 | /* Logitech Quickcam Pro for Notebook */ | ||
1751 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1752 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1753 | .idVendor = 0x046d, | ||
1754 | .idProduct = 0x08c3, | ||
1755 | .bInterfaceClass = USB_CLASS_VENDOR_SPEC, | ||
1756 | .bInterfaceSubClass = 1, | ||
1757 | .bInterfaceProtocol = 0 }, | ||
1758 | /* Logitech Quickcam Pro 5000 */ | ||
1759 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1760 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1761 | .idVendor = 0x046d, | ||
1762 | .idProduct = 0x08c5, | ||
1763 | .bInterfaceClass = USB_CLASS_VENDOR_SPEC, | ||
1764 | .bInterfaceSubClass = 1, | ||
1765 | .bInterfaceProtocol = 0 }, | ||
1766 | /* Logitech Quickcam OEM Dell Notebook */ | ||
1767 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1768 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1769 | .idVendor = 0x046d, | ||
1770 | .idProduct = 0x08c6, | ||
1771 | .bInterfaceClass = USB_CLASS_VENDOR_SPEC, | ||
1772 | .bInterfaceSubClass = 1, | ||
1773 | .bInterfaceProtocol = 0 }, | ||
1774 | /* Logitech Quickcam OEM Cisco VT Camera II */ | ||
1775 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1776 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1777 | .idVendor = 0x046d, | ||
1778 | .idProduct = 0x08c7, | ||
1779 | .bInterfaceClass = USB_CLASS_VENDOR_SPEC, | ||
1780 | .bInterfaceSubClass = 1, | ||
1781 | .bInterfaceProtocol = 0 }, | ||
1782 | /* Apple Built-In iSight */ | ||
1783 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1784 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1785 | .idVendor = 0x05ac, | ||
1786 | .idProduct = 0x8501, | ||
1787 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1788 | .bInterfaceSubClass = 1, | ||
1789 | .bInterfaceProtocol = 0, | ||
1790 | .driver_info = UVC_QUIRK_PROBE_MINMAX | ||
1791 | | UVC_QUIRK_BUILTIN_ISIGHT }, | ||
1792 | /* Genesys Logic USB 2.0 PC Camera */ | ||
1793 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1794 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1795 | .idVendor = 0x05e3, | ||
1796 | .idProduct = 0x0505, | ||
1797 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1798 | .bInterfaceSubClass = 1, | ||
1799 | .bInterfaceProtocol = 0, | ||
1800 | .driver_info = UVC_QUIRK_STREAM_NO_FID }, | ||
1801 | /* Silicon Motion SM371 */ | ||
1802 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1803 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1804 | .idVendor = 0x090c, | ||
1805 | .idProduct = 0xb371, | ||
1806 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1807 | .bInterfaceSubClass = 1, | ||
1808 | .bInterfaceProtocol = 0, | ||
1809 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1810 | /* MT6227 */ | ||
1811 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1812 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1813 | .idVendor = 0x0e8d, | ||
1814 | .idProduct = 0x0004, | ||
1815 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1816 | .bInterfaceSubClass = 1, | ||
1817 | .bInterfaceProtocol = 0, | ||
1818 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1819 | /* Syntek (HP Spartan) */ | ||
1820 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1821 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1822 | .idVendor = 0x174f, | ||
1823 | .idProduct = 0x5212, | ||
1824 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1825 | .bInterfaceSubClass = 1, | ||
1826 | .bInterfaceProtocol = 0, | ||
1827 | .driver_info = UVC_QUIRK_STREAM_NO_FID }, | ||
1828 | /* Syntek (Asus U3S) */ | ||
1829 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1830 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1831 | .idVendor = 0x174f, | ||
1832 | .idProduct = 0x8a33, | ||
1833 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1834 | .bInterfaceSubClass = 1, | ||
1835 | .bInterfaceProtocol = 0, | ||
1836 | .driver_info = UVC_QUIRK_STREAM_NO_FID }, | ||
1837 | /* Ecamm Pico iMage */ | ||
1838 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1839 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1840 | .idVendor = 0x18cd, | ||
1841 | .idProduct = 0xcafe, | ||
1842 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1843 | .bInterfaceSubClass = 1, | ||
1844 | .bInterfaceProtocol = 0, | ||
1845 | .driver_info = UVC_QUIRK_PROBE_EXTRAFIELDS }, | ||
1846 | /* Bodelin ProScopeHR */ | ||
1847 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1848 | | USB_DEVICE_ID_MATCH_DEV_HI | ||
1849 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1850 | .idVendor = 0x19ab, | ||
1851 | .idProduct = 0x1000, | ||
1852 | .bcdDevice_hi = 0x0126, | ||
1853 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1854 | .bInterfaceSubClass = 1, | ||
1855 | .bInterfaceProtocol = 0, | ||
1856 | .driver_info = UVC_QUIRK_STATUS_INTERVAL }, | ||
1857 | /* SiGma Micro USB Web Camera */ | ||
1858 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1859 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1860 | .idVendor = 0x1c4f, | ||
1861 | .idProduct = 0x3000, | ||
1862 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1863 | .bInterfaceSubClass = 1, | ||
1864 | .bInterfaceProtocol = 0, | ||
1865 | .driver_info = UVC_QUIRK_PROBE_MINMAX | ||
1866 | | UVC_QUIRK_IGNORE_SELECTOR_UNIT}, | ||
1867 | /* Acer OEM Webcam - Unknown vendor */ | ||
1868 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1869 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1870 | .idVendor = 0x5986, | ||
1871 | .idProduct = 0x0100, | ||
1872 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1873 | .bInterfaceSubClass = 1, | ||
1874 | .bInterfaceProtocol = 0, | ||
1875 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1876 | /* Packard Bell OEM Webcam */ | ||
1877 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1878 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1879 | .idVendor = 0x5986, | ||
1880 | .idProduct = 0x0101, | ||
1881 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1882 | .bInterfaceSubClass = 1, | ||
1883 | .bInterfaceProtocol = 0, | ||
1884 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1885 | /* Acer Crystal Eye webcam */ | ||
1886 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1887 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1888 | .idVendor = 0x5986, | ||
1889 | .idProduct = 0x0102, | ||
1890 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1891 | .bInterfaceSubClass = 1, | ||
1892 | .bInterfaceProtocol = 0, | ||
1893 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1894 | /* Acer OrbiCam - Unknown vendor */ | ||
1895 | { .match_flags = USB_DEVICE_ID_MATCH_DEVICE | ||
1896 | | USB_DEVICE_ID_MATCH_INT_INFO, | ||
1897 | .idVendor = 0x5986, | ||
1898 | .idProduct = 0x0200, | ||
1899 | .bInterfaceClass = USB_CLASS_VIDEO, | ||
1900 | .bInterfaceSubClass = 1, | ||
1901 | .bInterfaceProtocol = 0, | ||
1902 | .driver_info = UVC_QUIRK_PROBE_MINMAX }, | ||
1903 | /* Generic USB Video Class */ | ||
1904 | { USB_INTERFACE_INFO(USB_CLASS_VIDEO, 1, 0) }, | ||
1905 | {} | ||
1906 | }; | ||
1907 | |||
1908 | MODULE_DEVICE_TABLE(usb, uvc_ids); | ||
1909 | |||
1910 | struct uvc_driver uvc_driver = { | ||
1911 | .driver = { | ||
1912 | .name = "uvcvideo", | ||
1913 | .probe = uvc_probe, | ||
1914 | .disconnect = uvc_disconnect, | ||
1915 | .suspend = uvc_suspend, | ||
1916 | .resume = uvc_resume, | ||
1917 | .id_table = uvc_ids, | ||
1918 | .supports_autosuspend = 1, | ||
1919 | }, | ||
1920 | }; | ||
1921 | |||
1922 | static int __init uvc_init(void) | ||
1923 | { | ||
1924 | int result; | ||
1925 | |||
1926 | INIT_LIST_HEAD(&uvc_driver.devices); | ||
1927 | INIT_LIST_HEAD(&uvc_driver.controls); | ||
1928 | mutex_init(&uvc_driver.open_mutex); | ||
1929 | mutex_init(&uvc_driver.ctrl_mutex); | ||
1930 | |||
1931 | uvc_ctrl_init(); | ||
1932 | |||
1933 | result = usb_register(&uvc_driver.driver); | ||
1934 | if (result == 0) | ||
1935 | printk(KERN_INFO DRIVER_DESC " (" DRIVER_VERSION ")\n"); | ||
1936 | return result; | ||
1937 | } | ||
1938 | |||
1939 | static void __exit uvc_cleanup(void) | ||
1940 | { | ||
1941 | usb_deregister(&uvc_driver.driver); | ||
1942 | } | ||
1943 | |||
1944 | module_init(uvc_init); | ||
1945 | module_exit(uvc_cleanup); | ||
1946 | |||
1947 | module_param_named(quirks, uvc_quirks_param, uint, S_IRUGO|S_IWUSR); | ||
1948 | MODULE_PARM_DESC(quirks, "Forced device quirks"); | ||
1949 | module_param_named(trace, uvc_trace_param, uint, S_IRUGO|S_IWUSR); | ||
1950 | MODULE_PARM_DESC(trace, "Trace level bitmask"); | ||
1951 | |||
1952 | MODULE_AUTHOR(DRIVER_AUTHOR); | ||
1953 | MODULE_DESCRIPTION(DRIVER_DESC); | ||
1954 | MODULE_LICENSE("GPL"); | ||
1955 | MODULE_VERSION(DRIVER_VERSION); | ||
diff --git a/drivers/media/video/uvc/uvc_isight.c b/drivers/media/video/uvc/uvc_isight.c new file mode 100644 index 000000000000..37bdefdbead5 --- /dev/null +++ b/drivers/media/video/uvc/uvc_isight.c | |||
@@ -0,0 +1,134 @@ | |||
1 | /* | ||
2 | * uvc_isight.c -- USB Video Class driver - iSight support | ||
3 | * | ||
4 | * Copyright (C) 2006-2007 | ||
5 | * Ivan N. Zlatev <contact@i-nz.net> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/usb.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/mm.h> | ||
17 | |||
18 | #include "uvcvideo.h" | ||
19 | |||
20 | /* Built-in iSight webcams implements most of UVC 1.0 except a | ||
21 | * different packet format. Instead of sending a header at the | ||
22 | * beginning of each isochronous transfer payload, the webcam sends a | ||
23 | * single header per image (on its own in a packet), followed by | ||
24 | * packets containing data only. | ||
25 | * | ||
26 | * Offset Size (bytes) Description | ||
27 | * ------------------------------------------------------------------ | ||
28 | * 0x00 1 Header length | ||
29 | * 0x01 1 Flags (UVC-compliant) | ||
30 | * 0x02 4 Always equal to '11223344' | ||
31 | * 0x06 8 Always equal to 'deadbeefdeadface' | ||
32 | * 0x0e 16 Unknown | ||
33 | * | ||
34 | * The header can be prefixed by an optional, unknown-purpose byte. | ||
35 | */ | ||
36 | |||
37 | static int isight_decode(struct uvc_video_queue *queue, struct uvc_buffer *buf, | ||
38 | const __u8 *data, unsigned int len) | ||
39 | { | ||
40 | static const __u8 hdr[] = { | ||
41 | 0x11, 0x22, 0x33, 0x44, | ||
42 | 0xde, 0xad, 0xbe, 0xef, | ||
43 | 0xde, 0xad, 0xfa, 0xce | ||
44 | }; | ||
45 | |||
46 | unsigned int maxlen, nbytes; | ||
47 | __u8 *mem; | ||
48 | int is_header = 0; | ||
49 | |||
50 | if (buf == NULL) | ||
51 | return 0; | ||
52 | |||
53 | if ((len >= 14 && memcmp(&data[2], hdr, 12) == 0) || | ||
54 | (len >= 15 && memcmp(&data[3], hdr, 12) == 0)) { | ||
55 | uvc_trace(UVC_TRACE_FRAME, "iSight header found\n"); | ||
56 | is_header = 1; | ||
57 | } | ||
58 | |||
59 | /* Synchronize to the input stream by waiting for a header packet. */ | ||
60 | if (buf->state != UVC_BUF_STATE_ACTIVE) { | ||
61 | if (!is_header) { | ||
62 | uvc_trace(UVC_TRACE_FRAME, "Dropping packet (out of " | ||
63 | "sync).\n"); | ||
64 | return 0; | ||
65 | } | ||
66 | |||
67 | buf->state = UVC_BUF_STATE_ACTIVE; | ||
68 | } | ||
69 | |||
70 | /* Mark the buffer as done if we're at the beginning of a new frame. | ||
71 | * | ||
72 | * Empty buffers (bytesused == 0) don't trigger end of frame detection | ||
73 | * as it doesn't make sense to return an empty buffer. | ||
74 | */ | ||
75 | if (is_header && buf->buf.bytesused != 0) { | ||
76 | buf->state = UVC_BUF_STATE_DONE; | ||
77 | return -EAGAIN; | ||
78 | } | ||
79 | |||
80 | /* Copy the video data to the buffer. Skip header packets, as they | ||
81 | * contain no data. | ||
82 | */ | ||
83 | if (!is_header) { | ||
84 | maxlen = buf->buf.length - buf->buf.bytesused; | ||
85 | mem = queue->mem + buf->buf.m.offset + buf->buf.bytesused; | ||
86 | nbytes = min(len, maxlen); | ||
87 | memcpy(mem, data, nbytes); | ||
88 | buf->buf.bytesused += nbytes; | ||
89 | |||
90 | if (len > maxlen || buf->buf.bytesused == buf->buf.length) { | ||
91 | uvc_trace(UVC_TRACE_FRAME, "Frame complete " | ||
92 | "(overflow).\n"); | ||
93 | buf->state = UVC_BUF_STATE_DONE; | ||
94 | } | ||
95 | } | ||
96 | |||
97 | return 0; | ||
98 | } | ||
99 | |||
100 | void uvc_video_decode_isight(struct urb *urb, struct uvc_video_device *video, | ||
101 | struct uvc_buffer *buf) | ||
102 | { | ||
103 | int ret, i; | ||
104 | |||
105 | for (i = 0; i < urb->number_of_packets; ++i) { | ||
106 | if (urb->iso_frame_desc[i].status < 0) { | ||
107 | uvc_trace(UVC_TRACE_FRAME, "USB isochronous frame " | ||
108 | "lost (%d).\n", | ||
109 | urb->iso_frame_desc[i].status); | ||
110 | } | ||
111 | |||
112 | /* Decode the payload packet. | ||
113 | * uvc_video_decode is entered twice when a frame transition | ||
114 | * has been detected because the end of frame can only be | ||
115 | * reliably detected when the first packet of the new frame | ||
116 | * is processed. The first pass detects the transition and | ||
117 | * closes the previous frame's buffer, the second pass | ||
118 | * processes the data of the first payload of the new frame. | ||
119 | */ | ||
120 | do { | ||
121 | ret = isight_decode(&video->queue, buf, | ||
122 | urb->transfer_buffer + | ||
123 | urb->iso_frame_desc[i].offset, | ||
124 | urb->iso_frame_desc[i].actual_length); | ||
125 | |||
126 | if (buf == NULL) | ||
127 | break; | ||
128 | |||
129 | if (buf->state == UVC_BUF_STATE_DONE || | ||
130 | buf->state == UVC_BUF_STATE_ERROR) | ||
131 | buf = uvc_queue_next_buffer(&video->queue, buf); | ||
132 | } while (ret == -EAGAIN); | ||
133 | } | ||
134 | } | ||
diff --git a/drivers/media/video/uvc/uvc_queue.c b/drivers/media/video/uvc/uvc_queue.c new file mode 100644 index 000000000000..0923f0e3b3d4 --- /dev/null +++ b/drivers/media/video/uvc/uvc_queue.c | |||
@@ -0,0 +1,477 @@ | |||
1 | /* | ||
2 | * uvc_queue.c -- USB Video Class driver - Buffers management | ||
3 | * | ||
4 | * Copyright (C) 2005-2008 | ||
5 | * Laurent Pinchart (laurent.pinchart@skynet.be) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/version.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/usb.h> | ||
19 | #include <linux/videodev2.h> | ||
20 | #include <linux/vmalloc.h> | ||
21 | #include <linux/wait.h> | ||
22 | #include <asm/atomic.h> | ||
23 | |||
24 | #include "uvcvideo.h" | ||
25 | |||
26 | /* ------------------------------------------------------------------------ | ||
27 | * Video buffers queue management. | ||
28 | * | ||
29 | * Video queues is initialized by uvc_queue_init(). The function performs | ||
30 | * basic initialization of the uvc_video_queue struct and never fails. | ||
31 | * | ||
32 | * Video buffer allocation and freeing are performed by uvc_alloc_buffers and | ||
33 | * uvc_free_buffers respectively. The former acquires the video queue lock, | ||
34 | * while the later must be called with the lock held (so that allocation can | ||
35 | * free previously allocated buffers). Trying to free buffers that are mapped | ||
36 | * to user space will return -EBUSY. | ||
37 | * | ||
38 | * Video buffers are managed using two queues. However, unlike most USB video | ||
39 | * drivers which use an in queue and an out queue, we use a main queue which | ||
40 | * holds all queued buffers (both 'empty' and 'done' buffers), and an irq | ||
41 | * queue which holds empty buffers. This design (copied from video-buf) | ||
42 | * minimizes locking in interrupt, as only one queue is shared between | ||
43 | * interrupt and user contexts. | ||
44 | * | ||
45 | * Use cases | ||
46 | * --------- | ||
47 | * | ||
48 | * Unless stated otherwise, all operations which modify the irq buffers queue | ||
49 | * are protected by the irq spinlock. | ||
50 | * | ||
51 | * 1. The user queues the buffers, starts streaming and dequeues a buffer. | ||
52 | * | ||
53 | * The buffers are added to the main and irq queues. Both operations are | ||
54 | * protected by the queue lock, and the latert is protected by the irq | ||
55 | * spinlock as well. | ||
56 | * | ||
57 | * The completion handler fetches a buffer from the irq queue and fills it | ||
58 | * with video data. If no buffer is available (irq queue empty), the handler | ||
59 | * returns immediately. | ||
60 | * | ||
61 | * When the buffer is full, the completion handler removes it from the irq | ||
62 | * queue, marks it as ready (UVC_BUF_STATE_DONE) and wake its wait queue. | ||
63 | * At that point, any process waiting on the buffer will be woken up. If a | ||
64 | * process tries to dequeue a buffer after it has been marked ready, the | ||
65 | * dequeing will succeed immediately. | ||
66 | * | ||
67 | * 2. Buffers are queued, user is waiting on a buffer and the device gets | ||
68 | * disconnected. | ||
69 | * | ||
70 | * When the device is disconnected, the kernel calls the completion handler | ||
71 | * with an appropriate status code. The handler marks all buffers in the | ||
72 | * irq queue as being erroneous (UVC_BUF_STATE_ERROR) and wakes them up so | ||
73 | * that any process waiting on a buffer gets woken up. | ||
74 | * | ||
75 | * Waking up up the first buffer on the irq list is not enough, as the | ||
76 | * process waiting on the buffer might restart the dequeue operation | ||
77 | * immediately. | ||
78 | * | ||
79 | */ | ||
80 | |||
81 | void uvc_queue_init(struct uvc_video_queue *queue) | ||
82 | { | ||
83 | mutex_init(&queue->mutex); | ||
84 | spin_lock_init(&queue->irqlock); | ||
85 | INIT_LIST_HEAD(&queue->mainqueue); | ||
86 | INIT_LIST_HEAD(&queue->irqqueue); | ||
87 | } | ||
88 | |||
89 | /* | ||
90 | * Allocate the video buffers. | ||
91 | * | ||
92 | * Pages are reserved to make sure they will not be swaped, as they will be | ||
93 | * filled in URB completion handler. | ||
94 | * | ||
95 | * Buffers will be individually mapped, so they must all be page aligned. | ||
96 | */ | ||
97 | int uvc_alloc_buffers(struct uvc_video_queue *queue, unsigned int nbuffers, | ||
98 | unsigned int buflength) | ||
99 | { | ||
100 | unsigned int bufsize = PAGE_ALIGN(buflength); | ||
101 | unsigned int i; | ||
102 | void *mem = NULL; | ||
103 | int ret; | ||
104 | |||
105 | if (nbuffers > UVC_MAX_VIDEO_BUFFERS) | ||
106 | nbuffers = UVC_MAX_VIDEO_BUFFERS; | ||
107 | |||
108 | mutex_lock(&queue->mutex); | ||
109 | |||
110 | if ((ret = uvc_free_buffers(queue)) < 0) | ||
111 | goto done; | ||
112 | |||
113 | /* Bail out if no buffers should be allocated. */ | ||
114 | if (nbuffers == 0) | ||
115 | goto done; | ||
116 | |||
117 | /* Decrement the number of buffers until allocation succeeds. */ | ||
118 | for (; nbuffers > 0; --nbuffers) { | ||
119 | mem = vmalloc_32(nbuffers * bufsize); | ||
120 | if (mem != NULL) | ||
121 | break; | ||
122 | } | ||
123 | |||
124 | if (mem == NULL) { | ||
125 | ret = -ENOMEM; | ||
126 | goto done; | ||
127 | } | ||
128 | |||
129 | for (i = 0; i < nbuffers; ++i) { | ||
130 | memset(&queue->buffer[i], 0, sizeof queue->buffer[i]); | ||
131 | queue->buffer[i].buf.index = i; | ||
132 | queue->buffer[i].buf.m.offset = i * bufsize; | ||
133 | queue->buffer[i].buf.length = buflength; | ||
134 | queue->buffer[i].buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
135 | queue->buffer[i].buf.sequence = 0; | ||
136 | queue->buffer[i].buf.field = V4L2_FIELD_NONE; | ||
137 | queue->buffer[i].buf.memory = V4L2_MEMORY_MMAP; | ||
138 | queue->buffer[i].buf.flags = 0; | ||
139 | init_waitqueue_head(&queue->buffer[i].wait); | ||
140 | } | ||
141 | |||
142 | queue->mem = mem; | ||
143 | queue->count = nbuffers; | ||
144 | queue->buf_size = bufsize; | ||
145 | ret = nbuffers; | ||
146 | |||
147 | done: | ||
148 | mutex_unlock(&queue->mutex); | ||
149 | return ret; | ||
150 | } | ||
151 | |||
152 | /* | ||
153 | * Free the video buffers. | ||
154 | * | ||
155 | * This function must be called with the queue lock held. | ||
156 | */ | ||
157 | int uvc_free_buffers(struct uvc_video_queue *queue) | ||
158 | { | ||
159 | unsigned int i; | ||
160 | |||
161 | for (i = 0; i < queue->count; ++i) { | ||
162 | if (queue->buffer[i].vma_use_count != 0) | ||
163 | return -EBUSY; | ||
164 | } | ||
165 | |||
166 | if (queue->count) { | ||
167 | vfree(queue->mem); | ||
168 | queue->count = 0; | ||
169 | } | ||
170 | |||
171 | return 0; | ||
172 | } | ||
173 | |||
174 | static void __uvc_query_buffer(struct uvc_buffer *buf, | ||
175 | struct v4l2_buffer *v4l2_buf) | ||
176 | { | ||
177 | memcpy(v4l2_buf, &buf->buf, sizeof *v4l2_buf); | ||
178 | |||
179 | if (buf->vma_use_count) | ||
180 | v4l2_buf->flags |= V4L2_BUF_FLAG_MAPPED; | ||
181 | |||
182 | switch (buf->state) { | ||
183 | case UVC_BUF_STATE_ERROR: | ||
184 | case UVC_BUF_STATE_DONE: | ||
185 | v4l2_buf->flags |= V4L2_BUF_FLAG_DONE; | ||
186 | break; | ||
187 | case UVC_BUF_STATE_QUEUED: | ||
188 | case UVC_BUF_STATE_ACTIVE: | ||
189 | v4l2_buf->flags |= V4L2_BUF_FLAG_QUEUED; | ||
190 | break; | ||
191 | case UVC_BUF_STATE_IDLE: | ||
192 | default: | ||
193 | break; | ||
194 | } | ||
195 | } | ||
196 | |||
197 | int uvc_query_buffer(struct uvc_video_queue *queue, | ||
198 | struct v4l2_buffer *v4l2_buf) | ||
199 | { | ||
200 | int ret = 0; | ||
201 | |||
202 | mutex_lock(&queue->mutex); | ||
203 | if (v4l2_buf->index >= queue->count) { | ||
204 | ret = -EINVAL; | ||
205 | goto done; | ||
206 | } | ||
207 | |||
208 | __uvc_query_buffer(&queue->buffer[v4l2_buf->index], v4l2_buf); | ||
209 | |||
210 | done: | ||
211 | mutex_unlock(&queue->mutex); | ||
212 | return ret; | ||
213 | } | ||
214 | |||
215 | /* | ||
216 | * Queue a video buffer. Attempting to queue a buffer that has already been | ||
217 | * queued will return -EINVAL. | ||
218 | */ | ||
219 | int uvc_queue_buffer(struct uvc_video_queue *queue, | ||
220 | struct v4l2_buffer *v4l2_buf) | ||
221 | { | ||
222 | struct uvc_buffer *buf; | ||
223 | unsigned long flags; | ||
224 | int ret = 0; | ||
225 | |||
226 | uvc_trace(UVC_TRACE_CAPTURE, "Queuing buffer %u.\n", v4l2_buf->index); | ||
227 | |||
228 | if (v4l2_buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || | ||
229 | v4l2_buf->memory != V4L2_MEMORY_MMAP) { | ||
230 | uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer type (%u) " | ||
231 | "and/or memory (%u).\n", v4l2_buf->type, | ||
232 | v4l2_buf->memory); | ||
233 | return -EINVAL; | ||
234 | } | ||
235 | |||
236 | mutex_lock(&queue->mutex); | ||
237 | if (v4l2_buf->index >= queue->count) { | ||
238 | uvc_trace(UVC_TRACE_CAPTURE, "[E] Out of range index.\n"); | ||
239 | ret = -EINVAL; | ||
240 | goto done; | ||
241 | } | ||
242 | |||
243 | buf = &queue->buffer[v4l2_buf->index]; | ||
244 | if (buf->state != UVC_BUF_STATE_IDLE) { | ||
245 | uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer state " | ||
246 | "(%u).\n", buf->state); | ||
247 | ret = -EINVAL; | ||
248 | goto done; | ||
249 | } | ||
250 | |||
251 | spin_lock_irqsave(&queue->irqlock, flags); | ||
252 | if (queue->flags & UVC_QUEUE_DISCONNECTED) { | ||
253 | spin_unlock_irqrestore(&queue->irqlock, flags); | ||
254 | ret = -ENODEV; | ||
255 | goto done; | ||
256 | } | ||
257 | buf->state = UVC_BUF_STATE_QUEUED; | ||
258 | buf->buf.bytesused = 0; | ||
259 | list_add_tail(&buf->stream, &queue->mainqueue); | ||
260 | list_add_tail(&buf->queue, &queue->irqqueue); | ||
261 | spin_unlock_irqrestore(&queue->irqlock, flags); | ||
262 | |||
263 | done: | ||
264 | mutex_unlock(&queue->mutex); | ||
265 | return ret; | ||
266 | } | ||
267 | |||
268 | static int uvc_queue_waiton(struct uvc_buffer *buf, int nonblocking) | ||
269 | { | ||
270 | if (nonblocking) { | ||
271 | return (buf->state != UVC_BUF_STATE_QUEUED && | ||
272 | buf->state != UVC_BUF_STATE_ACTIVE) | ||
273 | ? 0 : -EAGAIN; | ||
274 | } | ||
275 | |||
276 | return wait_event_interruptible(buf->wait, | ||
277 | buf->state != UVC_BUF_STATE_QUEUED && | ||
278 | buf->state != UVC_BUF_STATE_ACTIVE); | ||
279 | } | ||
280 | |||
281 | /* | ||
282 | * Dequeue a video buffer. If nonblocking is false, block until a buffer is | ||
283 | * available. | ||
284 | */ | ||
285 | int uvc_dequeue_buffer(struct uvc_video_queue *queue, | ||
286 | struct v4l2_buffer *v4l2_buf, int nonblocking) | ||
287 | { | ||
288 | struct uvc_buffer *buf; | ||
289 | int ret = 0; | ||
290 | |||
291 | if (v4l2_buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || | ||
292 | v4l2_buf->memory != V4L2_MEMORY_MMAP) { | ||
293 | uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer type (%u) " | ||
294 | "and/or memory (%u).\n", v4l2_buf->type, | ||
295 | v4l2_buf->memory); | ||
296 | return -EINVAL; | ||
297 | } | ||
298 | |||
299 | mutex_lock(&queue->mutex); | ||
300 | if (list_empty(&queue->mainqueue)) { | ||
301 | uvc_trace(UVC_TRACE_CAPTURE, "[E] Empty buffer queue.\n"); | ||
302 | ret = -EINVAL; | ||
303 | goto done; | ||
304 | } | ||
305 | |||
306 | buf = list_first_entry(&queue->mainqueue, struct uvc_buffer, stream); | ||
307 | if ((ret = uvc_queue_waiton(buf, nonblocking)) < 0) | ||
308 | goto done; | ||
309 | |||
310 | uvc_trace(UVC_TRACE_CAPTURE, "Dequeuing buffer %u (%u, %u bytes).\n", | ||
311 | buf->buf.index, buf->state, buf->buf.bytesused); | ||
312 | |||
313 | switch (buf->state) { | ||
314 | case UVC_BUF_STATE_ERROR: | ||
315 | uvc_trace(UVC_TRACE_CAPTURE, "[W] Corrupted data " | ||
316 | "(transmission error).\n"); | ||
317 | ret = -EIO; | ||
318 | case UVC_BUF_STATE_DONE: | ||
319 | buf->state = UVC_BUF_STATE_IDLE; | ||
320 | break; | ||
321 | |||
322 | case UVC_BUF_STATE_IDLE: | ||
323 | case UVC_BUF_STATE_QUEUED: | ||
324 | case UVC_BUF_STATE_ACTIVE: | ||
325 | default: | ||
326 | uvc_trace(UVC_TRACE_CAPTURE, "[E] Invalid buffer state %u " | ||
327 | "(driver bug?).\n", buf->state); | ||
328 | ret = -EINVAL; | ||
329 | goto done; | ||
330 | } | ||
331 | |||
332 | list_del(&buf->stream); | ||
333 | __uvc_query_buffer(buf, v4l2_buf); | ||
334 | |||
335 | done: | ||
336 | mutex_unlock(&queue->mutex); | ||
337 | return ret; | ||
338 | } | ||
339 | |||
340 | /* | ||
341 | * Poll the video queue. | ||
342 | * | ||
343 | * This function implements video queue polling and is intended to be used by | ||
344 | * the device poll handler. | ||
345 | */ | ||
346 | unsigned int uvc_queue_poll(struct uvc_video_queue *queue, struct file *file, | ||
347 | poll_table *wait) | ||
348 | { | ||
349 | struct uvc_buffer *buf; | ||
350 | unsigned int mask = 0; | ||
351 | |||
352 | mutex_lock(&queue->mutex); | ||
353 | if (list_empty(&queue->mainqueue)) { | ||
354 | mask |= POLLERR; | ||
355 | goto done; | ||
356 | } | ||
357 | buf = list_first_entry(&queue->mainqueue, struct uvc_buffer, stream); | ||
358 | |||
359 | poll_wait(file, &buf->wait, wait); | ||
360 | if (buf->state == UVC_BUF_STATE_DONE || | ||
361 | buf->state == UVC_BUF_STATE_ERROR) | ||
362 | mask |= POLLIN | POLLRDNORM; | ||
363 | |||
364 | done: | ||
365 | mutex_unlock(&queue->mutex); | ||
366 | return mask; | ||
367 | } | ||
368 | |||
369 | /* | ||
370 | * Enable or disable the video buffers queue. | ||
371 | * | ||
372 | * The queue must be enabled before starting video acquisition and must be | ||
373 | * disabled after stopping it. This ensures that the video buffers queue | ||
374 | * state can be properly initialized before buffers are accessed from the | ||
375 | * interrupt handler. | ||
376 | * | ||
377 | * Enabling the video queue initializes parameters (such as sequence number, | ||
378 | * sync pattern, ...). If the queue is already enabled, return -EBUSY. | ||
379 | * | ||
380 | * Disabling the video queue cancels the queue and removes all buffers from | ||
381 | * the main queue. | ||
382 | * | ||
383 | * This function can't be called from interrupt context. Use | ||
384 | * uvc_queue_cancel() instead. | ||
385 | */ | ||
386 | int uvc_queue_enable(struct uvc_video_queue *queue, int enable) | ||
387 | { | ||
388 | unsigned int i; | ||
389 | int ret = 0; | ||
390 | |||
391 | mutex_lock(&queue->mutex); | ||
392 | if (enable) { | ||
393 | if (uvc_queue_streaming(queue)) { | ||
394 | ret = -EBUSY; | ||
395 | goto done; | ||
396 | } | ||
397 | queue->sequence = 0; | ||
398 | queue->flags |= UVC_QUEUE_STREAMING; | ||
399 | } else { | ||
400 | uvc_queue_cancel(queue, 0); | ||
401 | INIT_LIST_HEAD(&queue->mainqueue); | ||
402 | |||
403 | for (i = 0; i < queue->count; ++i) | ||
404 | queue->buffer[i].state = UVC_BUF_STATE_IDLE; | ||
405 | |||
406 | queue->flags &= ~UVC_QUEUE_STREAMING; | ||
407 | } | ||
408 | |||
409 | done: | ||
410 | mutex_unlock(&queue->mutex); | ||
411 | return ret; | ||
412 | } | ||
413 | |||
414 | /* | ||
415 | * Cancel the video buffers queue. | ||
416 | * | ||
417 | * Cancelling the queue marks all buffers on the irq queue as erroneous, | ||
418 | * wakes them up and remove them from the queue. | ||
419 | * | ||
420 | * If the disconnect parameter is set, further calls to uvc_queue_buffer will | ||
421 | * fail with -ENODEV. | ||
422 | * | ||
423 | * This function acquires the irq spinlock and can be called from interrupt | ||
424 | * context. | ||
425 | */ | ||
426 | void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect) | ||
427 | { | ||
428 | struct uvc_buffer *buf; | ||
429 | unsigned long flags; | ||
430 | |||
431 | spin_lock_irqsave(&queue->irqlock, flags); | ||
432 | while (!list_empty(&queue->irqqueue)) { | ||
433 | buf = list_first_entry(&queue->irqqueue, struct uvc_buffer, | ||
434 | queue); | ||
435 | list_del(&buf->queue); | ||
436 | buf->state = UVC_BUF_STATE_ERROR; | ||
437 | wake_up(&buf->wait); | ||
438 | } | ||
439 | /* This must be protected by the irqlock spinlock to avoid race | ||
440 | * conditions between uvc_queue_buffer and the disconnection event that | ||
441 | * could result in an interruptible wait in uvc_dequeue_buffer. Do not | ||
442 | * blindly replace this logic by checking for the UVC_DEV_DISCONNECTED | ||
443 | * state outside the queue code. | ||
444 | */ | ||
445 | if (disconnect) | ||
446 | queue->flags |= UVC_QUEUE_DISCONNECTED; | ||
447 | spin_unlock_irqrestore(&queue->irqlock, flags); | ||
448 | } | ||
449 | |||
450 | struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue, | ||
451 | struct uvc_buffer *buf) | ||
452 | { | ||
453 | struct uvc_buffer *nextbuf; | ||
454 | unsigned long flags; | ||
455 | |||
456 | if ((queue->flags & UVC_QUEUE_DROP_INCOMPLETE) && | ||
457 | buf->buf.length != buf->buf.bytesused) { | ||
458 | buf->state = UVC_BUF_STATE_QUEUED; | ||
459 | buf->buf.bytesused = 0; | ||
460 | return buf; | ||
461 | } | ||
462 | |||
463 | spin_lock_irqsave(&queue->irqlock, flags); | ||
464 | list_del(&buf->queue); | ||
465 | if (!list_empty(&queue->irqqueue)) | ||
466 | nextbuf = list_first_entry(&queue->irqqueue, struct uvc_buffer, | ||
467 | queue); | ||
468 | else | ||
469 | nextbuf = NULL; | ||
470 | spin_unlock_irqrestore(&queue->irqlock, flags); | ||
471 | |||
472 | buf->buf.sequence = queue->sequence++; | ||
473 | do_gettimeofday(&buf->buf.timestamp); | ||
474 | |||
475 | wake_up(&buf->wait); | ||
476 | return nextbuf; | ||
477 | } | ||
diff --git a/drivers/media/video/uvc/uvc_status.c b/drivers/media/video/uvc/uvc_status.c new file mode 100644 index 000000000000..be9084e5eace --- /dev/null +++ b/drivers/media/video/uvc/uvc_status.c | |||
@@ -0,0 +1,207 @@ | |||
1 | /* | ||
2 | * uvc_status.c -- USB Video Class driver - Status endpoint | ||
3 | * | ||
4 | * Copyright (C) 2007-2008 | ||
5 | * Laurent Pinchart (laurent.pinchart@skynet.be) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/version.h> | ||
16 | #include <linux/input.h> | ||
17 | #include <linux/usb.h> | ||
18 | #include <linux/usb/input.h> | ||
19 | |||
20 | #include "uvcvideo.h" | ||
21 | |||
22 | /* -------------------------------------------------------------------------- | ||
23 | * Input device | ||
24 | */ | ||
25 | static int uvc_input_init(struct uvc_device *dev) | ||
26 | { | ||
27 | struct usb_device *udev = dev->udev; | ||
28 | struct input_dev *input; | ||
29 | char *phys = NULL; | ||
30 | int ret; | ||
31 | |||
32 | input = input_allocate_device(); | ||
33 | if (input == NULL) | ||
34 | return -ENOMEM; | ||
35 | |||
36 | phys = kmalloc(6 + strlen(udev->bus->bus_name) + strlen(udev->devpath), | ||
37 | GFP_KERNEL); | ||
38 | if (phys == NULL) { | ||
39 | ret = -ENOMEM; | ||
40 | goto error; | ||
41 | } | ||
42 | sprintf(phys, "usb-%s-%s", udev->bus->bus_name, udev->devpath); | ||
43 | |||
44 | input->name = dev->name; | ||
45 | input->phys = phys; | ||
46 | usb_to_input_id(udev, &input->id); | ||
47 | input->dev.parent = &dev->intf->dev; | ||
48 | |||
49 | set_bit(EV_KEY, input->evbit); | ||
50 | set_bit(BTN_0, input->keybit); | ||
51 | |||
52 | if ((ret = input_register_device(input)) < 0) | ||
53 | goto error; | ||
54 | |||
55 | dev->input = input; | ||
56 | return 0; | ||
57 | |||
58 | error: | ||
59 | input_free_device(input); | ||
60 | kfree(phys); | ||
61 | return ret; | ||
62 | } | ||
63 | |||
64 | static void uvc_input_cleanup(struct uvc_device *dev) | ||
65 | { | ||
66 | if (dev->input) | ||
67 | input_unregister_device(dev->input); | ||
68 | } | ||
69 | |||
70 | /* -------------------------------------------------------------------------- | ||
71 | * Status interrupt endpoint | ||
72 | */ | ||
73 | static void uvc_event_streaming(struct uvc_device *dev, __u8 *data, int len) | ||
74 | { | ||
75 | if (len < 3) { | ||
76 | uvc_trace(UVC_TRACE_STATUS, "Invalid streaming status event " | ||
77 | "received.\n"); | ||
78 | return; | ||
79 | } | ||
80 | |||
81 | if (data[2] == 0) { | ||
82 | if (len < 4) | ||
83 | return; | ||
84 | uvc_trace(UVC_TRACE_STATUS, "Button (intf %u) %s len %d\n", | ||
85 | data[1], data[3] ? "pressed" : "released", len); | ||
86 | if (dev->input) | ||
87 | input_report_key(dev->input, BTN_0, data[3]); | ||
88 | } else { | ||
89 | uvc_trace(UVC_TRACE_STATUS, "Stream %u error event %02x %02x " | ||
90 | "len %d.\n", data[1], data[2], data[3], len); | ||
91 | } | ||
92 | } | ||
93 | |||
94 | static void uvc_event_control(struct uvc_device *dev, __u8 *data, int len) | ||
95 | { | ||
96 | char *attrs[3] = { "value", "info", "failure" }; | ||
97 | |||
98 | if (len < 6 || data[2] != 0 || data[4] > 2) { | ||
99 | uvc_trace(UVC_TRACE_STATUS, "Invalid control status event " | ||
100 | "received.\n"); | ||
101 | return; | ||
102 | } | ||
103 | |||
104 | uvc_trace(UVC_TRACE_STATUS, "Control %u/%u %s change len %d.\n", | ||
105 | data[1], data[3], attrs[data[4]], len); | ||
106 | } | ||
107 | |||
108 | static void uvc_status_complete(struct urb *urb) | ||
109 | { | ||
110 | struct uvc_device *dev = urb->context; | ||
111 | int len, ret; | ||
112 | |||
113 | switch (urb->status) { | ||
114 | case 0: | ||
115 | break; | ||
116 | |||
117 | case -ENOENT: /* usb_kill_urb() called. */ | ||
118 | case -ECONNRESET: /* usb_unlink_urb() called. */ | ||
119 | case -ESHUTDOWN: /* The endpoint is being disabled. */ | ||
120 | case -EPROTO: /* Device is disconnected (reported by some | ||
121 | * host controller). */ | ||
122 | return; | ||
123 | |||
124 | default: | ||
125 | uvc_printk(KERN_WARNING, "Non-zero status (%d) in status " | ||
126 | "completion handler.\n", urb->status); | ||
127 | return; | ||
128 | } | ||
129 | |||
130 | len = urb->actual_length; | ||
131 | if (len > 0) { | ||
132 | switch (dev->status[0] & 0x0f) { | ||
133 | case UVC_STATUS_TYPE_CONTROL: | ||
134 | uvc_event_control(dev, dev->status, len); | ||
135 | break; | ||
136 | |||
137 | case UVC_STATUS_TYPE_STREAMING: | ||
138 | uvc_event_streaming(dev, dev->status, len); | ||
139 | break; | ||
140 | |||
141 | default: | ||
142 | uvc_printk(KERN_INFO, "unknown event type %u.\n", | ||
143 | dev->status[0]); | ||
144 | break; | ||
145 | } | ||
146 | } | ||
147 | |||
148 | /* Resubmit the URB. */ | ||
149 | urb->interval = dev->int_ep->desc.bInterval; | ||
150 | if ((ret = usb_submit_urb(urb, GFP_ATOMIC)) < 0) { | ||
151 | uvc_printk(KERN_ERR, "Failed to resubmit status URB (%d).\n", | ||
152 | ret); | ||
153 | } | ||
154 | } | ||
155 | |||
156 | int uvc_status_init(struct uvc_device *dev) | ||
157 | { | ||
158 | struct usb_host_endpoint *ep = dev->int_ep; | ||
159 | unsigned int pipe; | ||
160 | int interval; | ||
161 | |||
162 | if (ep == NULL) | ||
163 | return 0; | ||
164 | |||
165 | uvc_input_init(dev); | ||
166 | |||
167 | dev->int_urb = usb_alloc_urb(0, GFP_KERNEL); | ||
168 | if (dev->int_urb == NULL) | ||
169 | return -ENOMEM; | ||
170 | |||
171 | pipe = usb_rcvintpipe(dev->udev, ep->desc.bEndpointAddress); | ||
172 | |||
173 | /* For high-speed interrupt endpoints, the bInterval value is used as | ||
174 | * an exponent of two. Some developers forgot about it. | ||
175 | */ | ||
176 | interval = ep->desc.bInterval; | ||
177 | if (interval > 16 && dev->udev->speed == USB_SPEED_HIGH && | ||
178 | (dev->quirks & UVC_QUIRK_STATUS_INTERVAL)) | ||
179 | interval = fls(interval) - 1; | ||
180 | |||
181 | usb_fill_int_urb(dev->int_urb, dev->udev, pipe, | ||
182 | dev->status, sizeof dev->status, uvc_status_complete, | ||
183 | dev, interval); | ||
184 | |||
185 | return usb_submit_urb(dev->int_urb, GFP_KERNEL); | ||
186 | } | ||
187 | |||
188 | void uvc_status_cleanup(struct uvc_device *dev) | ||
189 | { | ||
190 | usb_kill_urb(dev->int_urb); | ||
191 | usb_free_urb(dev->int_urb); | ||
192 | uvc_input_cleanup(dev); | ||
193 | } | ||
194 | |||
195 | int uvc_status_suspend(struct uvc_device *dev) | ||
196 | { | ||
197 | usb_kill_urb(dev->int_urb); | ||
198 | return 0; | ||
199 | } | ||
200 | |||
201 | int uvc_status_resume(struct uvc_device *dev) | ||
202 | { | ||
203 | if (dev->int_urb == NULL) | ||
204 | return 0; | ||
205 | |||
206 | return usb_submit_urb(dev->int_urb, GFP_KERNEL); | ||
207 | } | ||
diff --git a/drivers/media/video/uvc/uvc_v4l2.c b/drivers/media/video/uvc/uvc_v4l2.c new file mode 100644 index 000000000000..2e0a66575bb4 --- /dev/null +++ b/drivers/media/video/uvc/uvc_v4l2.c | |||
@@ -0,0 +1,1105 @@ | |||
1 | /* | ||
2 | * uvc_v4l2.c -- USB Video Class driver - V4L2 API | ||
3 | * | ||
4 | * Copyright (C) 2005-2008 | ||
5 | * Laurent Pinchart (laurent.pinchart@skynet.be) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/version.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/usb.h> | ||
19 | #include <linux/videodev2.h> | ||
20 | #include <linux/vmalloc.h> | ||
21 | #include <linux/mm.h> | ||
22 | #include <linux/wait.h> | ||
23 | #include <asm/atomic.h> | ||
24 | |||
25 | #include <media/v4l2-common.h> | ||
26 | |||
27 | #include "uvcvideo.h" | ||
28 | |||
29 | /* ------------------------------------------------------------------------ | ||
30 | * V4L2 interface | ||
31 | */ | ||
32 | |||
33 | /* | ||
34 | * Mapping V4L2 controls to UVC controls can be straighforward if done well. | ||
35 | * Most of the UVC controls exist in V4L2, and can be mapped directly. Some | ||
36 | * must be grouped (for instance the Red Balance, Blue Balance and Do White | ||
37 | * Balance V4L2 controls use the White Balance Component UVC control) or | ||
38 | * otherwise translated. The approach we take here is to use a translation | ||
39 | * table for the controls which can be mapped directly, and handle the others | ||
40 | * manually. | ||
41 | */ | ||
42 | static int uvc_v4l2_query_menu(struct uvc_video_device *video, | ||
43 | struct v4l2_querymenu *query_menu) | ||
44 | { | ||
45 | struct uvc_menu_info *menu_info; | ||
46 | struct uvc_control_mapping *mapping; | ||
47 | struct uvc_control *ctrl; | ||
48 | |||
49 | ctrl = uvc_find_control(video, query_menu->id, &mapping); | ||
50 | if (ctrl == NULL || mapping->v4l2_type != V4L2_CTRL_TYPE_MENU) | ||
51 | return -EINVAL; | ||
52 | |||
53 | if (query_menu->index >= mapping->menu_count) | ||
54 | return -EINVAL; | ||
55 | |||
56 | menu_info = &mapping->menu_info[query_menu->index]; | ||
57 | strncpy(query_menu->name, menu_info->name, 32); | ||
58 | return 0; | ||
59 | } | ||
60 | |||
61 | /* | ||
62 | * Find the frame interval closest to the requested frame interval for the | ||
63 | * given frame format and size. This should be done by the device as part of | ||
64 | * the Video Probe and Commit negotiation, but some hardware don't implement | ||
65 | * that feature. | ||
66 | */ | ||
67 | static __u32 uvc_try_frame_interval(struct uvc_frame *frame, __u32 interval) | ||
68 | { | ||
69 | unsigned int i; | ||
70 | |||
71 | if (frame->bFrameIntervalType) { | ||
72 | __u32 best = -1, dist; | ||
73 | |||
74 | for (i = 0; i < frame->bFrameIntervalType; ++i) { | ||
75 | dist = interval > frame->dwFrameInterval[i] | ||
76 | ? interval - frame->dwFrameInterval[i] | ||
77 | : frame->dwFrameInterval[i] - interval; | ||
78 | |||
79 | if (dist > best) | ||
80 | break; | ||
81 | |||
82 | best = dist; | ||
83 | } | ||
84 | |||
85 | interval = frame->dwFrameInterval[i-1]; | ||
86 | } else { | ||
87 | const __u32 min = frame->dwFrameInterval[0]; | ||
88 | const __u32 max = frame->dwFrameInterval[1]; | ||
89 | const __u32 step = frame->dwFrameInterval[2]; | ||
90 | |||
91 | interval = min + (interval - min + step/2) / step * step; | ||
92 | if (interval > max) | ||
93 | interval = max; | ||
94 | } | ||
95 | |||
96 | return interval; | ||
97 | } | ||
98 | |||
99 | static int uvc_v4l2_try_format(struct uvc_video_device *video, | ||
100 | struct v4l2_format *fmt, struct uvc_streaming_control *probe, | ||
101 | struct uvc_format **uvc_format, struct uvc_frame **uvc_frame) | ||
102 | { | ||
103 | struct uvc_format *format = NULL; | ||
104 | struct uvc_frame *frame = NULL; | ||
105 | __u16 rw, rh; | ||
106 | unsigned int d, maxd; | ||
107 | unsigned int i; | ||
108 | __u32 interval; | ||
109 | int ret = 0; | ||
110 | __u8 *fcc; | ||
111 | |||
112 | if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
113 | return -EINVAL; | ||
114 | |||
115 | fcc = (__u8 *)&fmt->fmt.pix.pixelformat; | ||
116 | uvc_trace(UVC_TRACE_FORMAT, "Trying format 0x%08x (%c%c%c%c): %ux%u.\n", | ||
117 | fmt->fmt.pix.pixelformat, | ||
118 | fcc[0], fcc[1], fcc[2], fcc[3], | ||
119 | fmt->fmt.pix.width, fmt->fmt.pix.height); | ||
120 | |||
121 | /* Check if the hardware supports the requested format. */ | ||
122 | for (i = 0; i < video->streaming->nformats; ++i) { | ||
123 | format = &video->streaming->format[i]; | ||
124 | if (format->fcc == fmt->fmt.pix.pixelformat) | ||
125 | break; | ||
126 | } | ||
127 | |||
128 | if (format == NULL || format->fcc != fmt->fmt.pix.pixelformat) { | ||
129 | uvc_trace(UVC_TRACE_FORMAT, "Unsupported format 0x%08x.\n", | ||
130 | fmt->fmt.pix.pixelformat); | ||
131 | return -EINVAL; | ||
132 | } | ||
133 | |||
134 | /* Find the closest image size. The distance between image sizes is | ||
135 | * the size in pixels of the non-overlapping regions between the | ||
136 | * requested size and the frame-specified size. | ||
137 | */ | ||
138 | rw = fmt->fmt.pix.width; | ||
139 | rh = fmt->fmt.pix.height; | ||
140 | maxd = (unsigned int)-1; | ||
141 | |||
142 | for (i = 0; i < format->nframes; ++i) { | ||
143 | __u16 w = format->frame[i].wWidth; | ||
144 | __u16 h = format->frame[i].wHeight; | ||
145 | |||
146 | d = min(w, rw) * min(h, rh); | ||
147 | d = w*h + rw*rh - 2*d; | ||
148 | if (d < maxd) { | ||
149 | maxd = d; | ||
150 | frame = &format->frame[i]; | ||
151 | } | ||
152 | |||
153 | if (maxd == 0) | ||
154 | break; | ||
155 | } | ||
156 | |||
157 | if (frame == NULL) { | ||
158 | uvc_trace(UVC_TRACE_FORMAT, "Unsupported size %ux%u.\n", | ||
159 | fmt->fmt.pix.width, fmt->fmt.pix.height); | ||
160 | return -EINVAL; | ||
161 | } | ||
162 | |||
163 | /* Use the default frame interval. */ | ||
164 | interval = frame->dwDefaultFrameInterval; | ||
165 | uvc_trace(UVC_TRACE_FORMAT, "Using default frame interval %u.%u us " | ||
166 | "(%u.%u fps).\n", interval/10, interval%10, 10000000/interval, | ||
167 | (100000000/interval)%10); | ||
168 | |||
169 | /* Set the format index, frame index and frame interval. */ | ||
170 | memset(probe, 0, sizeof *probe); | ||
171 | probe->bmHint = 1; /* dwFrameInterval */ | ||
172 | probe->bFormatIndex = format->index; | ||
173 | probe->bFrameIndex = frame->bFrameIndex; | ||
174 | probe->dwFrameInterval = uvc_try_frame_interval(frame, interval); | ||
175 | /* Some webcams stall the probe control set request when the | ||
176 | * dwMaxVideoFrameSize field is set to zero. The UVC specification | ||
177 | * clearly states that the field is read-only from the host, so this | ||
178 | * is a webcam bug. Set dwMaxVideoFrameSize to the value reported by | ||
179 | * the webcam to work around the problem. | ||
180 | * | ||
181 | * The workaround could probably be enabled for all webcams, so the | ||
182 | * quirk can be removed if needed. It's currently useful to detect | ||
183 | * webcam bugs and fix them before they hit the market (providing | ||
184 | * developers test their webcams with the Linux driver as well as with | ||
185 | * the Windows driver). | ||
186 | */ | ||
187 | if (video->dev->quirks & UVC_QUIRK_PROBE_EXTRAFIELDS) | ||
188 | probe->dwMaxVideoFrameSize = | ||
189 | video->streaming->ctrl.dwMaxVideoFrameSize; | ||
190 | |||
191 | /* Probe the device */ | ||
192 | if ((ret = uvc_probe_video(video, probe)) < 0) | ||
193 | goto done; | ||
194 | |||
195 | fmt->fmt.pix.width = frame->wWidth; | ||
196 | fmt->fmt.pix.height = frame->wHeight; | ||
197 | fmt->fmt.pix.field = V4L2_FIELD_NONE; | ||
198 | fmt->fmt.pix.bytesperline = format->bpp * frame->wWidth / 8; | ||
199 | fmt->fmt.pix.sizeimage = probe->dwMaxVideoFrameSize; | ||
200 | fmt->fmt.pix.colorspace = format->colorspace; | ||
201 | fmt->fmt.pix.priv = 0; | ||
202 | |||
203 | if (uvc_format != NULL) | ||
204 | *uvc_format = format; | ||
205 | if (uvc_frame != NULL) | ||
206 | *uvc_frame = frame; | ||
207 | |||
208 | done: | ||
209 | return ret; | ||
210 | } | ||
211 | |||
212 | static int uvc_v4l2_get_format(struct uvc_video_device *video, | ||
213 | struct v4l2_format *fmt) | ||
214 | { | ||
215 | struct uvc_format *format = video->streaming->cur_format; | ||
216 | struct uvc_frame *frame = video->streaming->cur_frame; | ||
217 | |||
218 | if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
219 | return -EINVAL; | ||
220 | |||
221 | if (format == NULL || frame == NULL) | ||
222 | return -EINVAL; | ||
223 | |||
224 | fmt->fmt.pix.pixelformat = format->fcc; | ||
225 | fmt->fmt.pix.width = frame->wWidth; | ||
226 | fmt->fmt.pix.height = frame->wHeight; | ||
227 | fmt->fmt.pix.field = V4L2_FIELD_NONE; | ||
228 | fmt->fmt.pix.bytesperline = format->bpp * frame->wWidth / 8; | ||
229 | fmt->fmt.pix.sizeimage = video->streaming->ctrl.dwMaxVideoFrameSize; | ||
230 | fmt->fmt.pix.colorspace = format->colorspace; | ||
231 | fmt->fmt.pix.priv = 0; | ||
232 | |||
233 | return 0; | ||
234 | } | ||
235 | |||
236 | static int uvc_v4l2_set_format(struct uvc_video_device *video, | ||
237 | struct v4l2_format *fmt) | ||
238 | { | ||
239 | struct uvc_streaming_control probe; | ||
240 | struct uvc_format *format; | ||
241 | struct uvc_frame *frame; | ||
242 | int ret; | ||
243 | |||
244 | if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
245 | return -EINVAL; | ||
246 | |||
247 | if (uvc_queue_streaming(&video->queue)) | ||
248 | return -EBUSY; | ||
249 | |||
250 | ret = uvc_v4l2_try_format(video, fmt, &probe, &format, &frame); | ||
251 | if (ret < 0) | ||
252 | return ret; | ||
253 | |||
254 | if ((ret = uvc_set_video_ctrl(video, &probe, 0)) < 0) | ||
255 | return ret; | ||
256 | |||
257 | memcpy(&video->streaming->ctrl, &probe, sizeof probe); | ||
258 | video->streaming->cur_format = format; | ||
259 | video->streaming->cur_frame = frame; | ||
260 | |||
261 | return 0; | ||
262 | } | ||
263 | |||
264 | static int uvc_v4l2_get_streamparm(struct uvc_video_device *video, | ||
265 | struct v4l2_streamparm *parm) | ||
266 | { | ||
267 | uint32_t numerator, denominator; | ||
268 | |||
269 | if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
270 | return -EINVAL; | ||
271 | |||
272 | numerator = video->streaming->ctrl.dwFrameInterval; | ||
273 | denominator = 10000000; | ||
274 | uvc_simplify_fraction(&numerator, &denominator, 8, 333); | ||
275 | |||
276 | memset(parm, 0, sizeof *parm); | ||
277 | parm->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | ||
278 | parm->parm.capture.capability = V4L2_CAP_TIMEPERFRAME; | ||
279 | parm->parm.capture.capturemode = 0; | ||
280 | parm->parm.capture.timeperframe.numerator = numerator; | ||
281 | parm->parm.capture.timeperframe.denominator = denominator; | ||
282 | parm->parm.capture.extendedmode = 0; | ||
283 | parm->parm.capture.readbuffers = 0; | ||
284 | |||
285 | return 0; | ||
286 | } | ||
287 | |||
288 | static int uvc_v4l2_set_streamparm(struct uvc_video_device *video, | ||
289 | struct v4l2_streamparm *parm) | ||
290 | { | ||
291 | struct uvc_frame *frame = video->streaming->cur_frame; | ||
292 | struct uvc_streaming_control probe; | ||
293 | uint32_t interval; | ||
294 | int ret; | ||
295 | |||
296 | if (parm->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
297 | return -EINVAL; | ||
298 | |||
299 | if (uvc_queue_streaming(&video->queue)) | ||
300 | return -EBUSY; | ||
301 | |||
302 | memcpy(&probe, &video->streaming->ctrl, sizeof probe); | ||
303 | interval = uvc_fraction_to_interval( | ||
304 | parm->parm.capture.timeperframe.numerator, | ||
305 | parm->parm.capture.timeperframe.denominator); | ||
306 | |||
307 | uvc_trace(UVC_TRACE_FORMAT, "Setting frame interval to %u/%u (%u).\n", | ||
308 | parm->parm.capture.timeperframe.numerator, | ||
309 | parm->parm.capture.timeperframe.denominator, | ||
310 | interval); | ||
311 | probe.dwFrameInterval = uvc_try_frame_interval(frame, interval); | ||
312 | |||
313 | /* Probe the device with the new settings. */ | ||
314 | if ((ret = uvc_probe_video(video, &probe)) < 0) | ||
315 | return ret; | ||
316 | |||
317 | /* Commit the new settings. */ | ||
318 | if ((ret = uvc_set_video_ctrl(video, &probe, 0)) < 0) | ||
319 | return ret; | ||
320 | |||
321 | memcpy(&video->streaming->ctrl, &probe, sizeof probe); | ||
322 | |||
323 | /* Return the actual frame period. */ | ||
324 | parm->parm.capture.timeperframe.numerator = probe.dwFrameInterval; | ||
325 | parm->parm.capture.timeperframe.denominator = 10000000; | ||
326 | uvc_simplify_fraction(&parm->parm.capture.timeperframe.numerator, | ||
327 | &parm->parm.capture.timeperframe.denominator, | ||
328 | 8, 333); | ||
329 | |||
330 | return 0; | ||
331 | } | ||
332 | |||
333 | /* ------------------------------------------------------------------------ | ||
334 | * Privilege management | ||
335 | */ | ||
336 | |||
337 | /* | ||
338 | * Privilege management is the multiple-open implementation basis. The current | ||
339 | * implementation is completely transparent for the end-user and doesn't | ||
340 | * require explicit use of the VIDIOC_G_PRIORITY and VIDIOC_S_PRIORITY ioctls. | ||
341 | * Those ioctls enable finer control on the device (by making possible for a | ||
342 | * user to request exclusive access to a device), but are not mature yet. | ||
343 | * Switching to the V4L2 priority mechanism might be considered in the future | ||
344 | * if this situation changes. | ||
345 | * | ||
346 | * Each open instance of a UVC device can either be in a privileged or | ||
347 | * unprivileged state. Only a single instance can be in a privileged state at | ||
348 | * a given time. Trying to perform an operation which requires privileges will | ||
349 | * automatically acquire the required privileges if possible, or return -EBUSY | ||
350 | * otherwise. Privileges are dismissed when closing the instance. | ||
351 | * | ||
352 | * Operations which require privileges are: | ||
353 | * | ||
354 | * - VIDIOC_S_INPUT | ||
355 | * - VIDIOC_S_PARM | ||
356 | * - VIDIOC_S_FMT | ||
357 | * - VIDIOC_TRY_FMT | ||
358 | * - VIDIOC_REQBUFS | ||
359 | */ | ||
360 | static int uvc_acquire_privileges(struct uvc_fh *handle) | ||
361 | { | ||
362 | int ret = 0; | ||
363 | |||
364 | /* Always succeed if the handle is already privileged. */ | ||
365 | if (handle->state == UVC_HANDLE_ACTIVE) | ||
366 | return 0; | ||
367 | |||
368 | /* Check if the device already has a privileged handle. */ | ||
369 | mutex_lock(&uvc_driver.open_mutex); | ||
370 | if (atomic_inc_return(&handle->device->active) != 1) { | ||
371 | atomic_dec(&handle->device->active); | ||
372 | ret = -EBUSY; | ||
373 | goto done; | ||
374 | } | ||
375 | |||
376 | handle->state = UVC_HANDLE_ACTIVE; | ||
377 | |||
378 | done: | ||
379 | mutex_unlock(&uvc_driver.open_mutex); | ||
380 | return ret; | ||
381 | } | ||
382 | |||
383 | static void uvc_dismiss_privileges(struct uvc_fh *handle) | ||
384 | { | ||
385 | if (handle->state == UVC_HANDLE_ACTIVE) | ||
386 | atomic_dec(&handle->device->active); | ||
387 | |||
388 | handle->state = UVC_HANDLE_PASSIVE; | ||
389 | } | ||
390 | |||
391 | static int uvc_has_privileges(struct uvc_fh *handle) | ||
392 | { | ||
393 | return handle->state == UVC_HANDLE_ACTIVE; | ||
394 | } | ||
395 | |||
396 | /* ------------------------------------------------------------------------ | ||
397 | * V4L2 file operations | ||
398 | */ | ||
399 | |||
400 | static int uvc_v4l2_open(struct inode *inode, struct file *file) | ||
401 | { | ||
402 | struct video_device *vdev; | ||
403 | struct uvc_video_device *video; | ||
404 | struct uvc_fh *handle; | ||
405 | int ret = 0; | ||
406 | |||
407 | uvc_trace(UVC_TRACE_CALLS, "uvc_v4l2_open\n"); | ||
408 | mutex_lock(&uvc_driver.open_mutex); | ||
409 | vdev = video_devdata(file); | ||
410 | video = video_get_drvdata(vdev); | ||
411 | |||
412 | if (video->dev->state & UVC_DEV_DISCONNECTED) { | ||
413 | ret = -ENODEV; | ||
414 | goto done; | ||
415 | } | ||
416 | |||
417 | ret = usb_autopm_get_interface(video->dev->intf); | ||
418 | if (ret < 0) | ||
419 | goto done; | ||
420 | |||
421 | /* Create the device handle. */ | ||
422 | handle = kzalloc(sizeof *handle, GFP_KERNEL); | ||
423 | if (handle == NULL) { | ||
424 | usb_autopm_put_interface(video->dev->intf); | ||
425 | ret = -ENOMEM; | ||
426 | goto done; | ||
427 | } | ||
428 | |||
429 | handle->device = video; | ||
430 | handle->state = UVC_HANDLE_PASSIVE; | ||
431 | file->private_data = handle; | ||
432 | |||
433 | kref_get(&video->dev->kref); | ||
434 | |||
435 | done: | ||
436 | mutex_unlock(&uvc_driver.open_mutex); | ||
437 | return ret; | ||
438 | } | ||
439 | |||
440 | static int uvc_v4l2_release(struct inode *inode, struct file *file) | ||
441 | { | ||
442 | struct video_device *vdev = video_devdata(file); | ||
443 | struct uvc_video_device *video = video_get_drvdata(vdev); | ||
444 | struct uvc_fh *handle = (struct uvc_fh *)file->private_data; | ||
445 | |||
446 | uvc_trace(UVC_TRACE_CALLS, "uvc_v4l2_release\n"); | ||
447 | |||
448 | /* Only free resources if this is a privileged handle. */ | ||
449 | if (uvc_has_privileges(handle)) { | ||
450 | uvc_video_enable(video, 0); | ||
451 | |||
452 | mutex_lock(&video->queue.mutex); | ||
453 | if (uvc_free_buffers(&video->queue) < 0) | ||
454 | uvc_printk(KERN_ERR, "uvc_v4l2_release: Unable to " | ||
455 | "free buffers.\n"); | ||
456 | mutex_unlock(&video->queue.mutex); | ||
457 | } | ||
458 | |||
459 | /* Release the file handle. */ | ||
460 | uvc_dismiss_privileges(handle); | ||
461 | kfree(handle); | ||
462 | file->private_data = NULL; | ||
463 | |||
464 | usb_autopm_put_interface(video->dev->intf); | ||
465 | kref_put(&video->dev->kref, uvc_delete); | ||
466 | return 0; | ||
467 | } | ||
468 | |||
469 | static int uvc_v4l2_do_ioctl(struct inode *inode, struct file *file, | ||
470 | unsigned int cmd, void *arg) | ||
471 | { | ||
472 | struct video_device *vdev = video_devdata(file); | ||
473 | struct uvc_video_device *video = video_get_drvdata(vdev); | ||
474 | struct uvc_fh *handle = (struct uvc_fh *)file->private_data; | ||
475 | int ret = 0; | ||
476 | |||
477 | if (uvc_trace_param & UVC_TRACE_IOCTL) | ||
478 | v4l_printk_ioctl(cmd); | ||
479 | |||
480 | switch (cmd) { | ||
481 | /* Query capabilities */ | ||
482 | case VIDIOC_QUERYCAP: | ||
483 | { | ||
484 | struct v4l2_capability *cap = arg; | ||
485 | |||
486 | memset(cap, 0, sizeof *cap); | ||
487 | strncpy(cap->driver, "uvcvideo", sizeof cap->driver); | ||
488 | strncpy(cap->card, vdev->name, 32); | ||
489 | strncpy(cap->bus_info, video->dev->udev->bus->bus_name, | ||
490 | sizeof cap->bus_info); | ||
491 | cap->version = DRIVER_VERSION_NUMBER; | ||
492 | cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | ||
493 | | V4L2_CAP_STREAMING; | ||
494 | break; | ||
495 | } | ||
496 | |||
497 | /* Get, Set & Query control */ | ||
498 | case VIDIOC_QUERYCTRL: | ||
499 | return uvc_query_v4l2_ctrl(video, arg); | ||
500 | |||
501 | case VIDIOC_G_CTRL: | ||
502 | { | ||
503 | struct v4l2_control *ctrl = arg; | ||
504 | struct v4l2_ext_control xctrl; | ||
505 | |||
506 | memset(&xctrl, 0, sizeof xctrl); | ||
507 | xctrl.id = ctrl->id; | ||
508 | |||
509 | uvc_ctrl_begin(video); | ||
510 | ret = uvc_ctrl_get(video, &xctrl); | ||
511 | uvc_ctrl_rollback(video); | ||
512 | if (ret >= 0) | ||
513 | ctrl->value = xctrl.value; | ||
514 | break; | ||
515 | } | ||
516 | |||
517 | case VIDIOC_S_CTRL: | ||
518 | { | ||
519 | struct v4l2_control *ctrl = arg; | ||
520 | struct v4l2_ext_control xctrl; | ||
521 | |||
522 | memset(&xctrl, 0, sizeof xctrl); | ||
523 | xctrl.id = ctrl->id; | ||
524 | xctrl.value = ctrl->value; | ||
525 | |||
526 | uvc_ctrl_begin(video); | ||
527 | ret = uvc_ctrl_set(video, &xctrl); | ||
528 | if (ret < 0) { | ||
529 | uvc_ctrl_rollback(video); | ||
530 | return ret; | ||
531 | } | ||
532 | ret = uvc_ctrl_commit(video); | ||
533 | break; | ||
534 | } | ||
535 | |||
536 | case VIDIOC_QUERYMENU: | ||
537 | return uvc_v4l2_query_menu(video, arg); | ||
538 | |||
539 | case VIDIOC_G_EXT_CTRLS: | ||
540 | { | ||
541 | struct v4l2_ext_controls *ctrls = arg; | ||
542 | struct v4l2_ext_control *ctrl = ctrls->controls; | ||
543 | unsigned int i; | ||
544 | |||
545 | uvc_ctrl_begin(video); | ||
546 | for (i = 0; i < ctrls->count; ++ctrl, ++i) { | ||
547 | ret = uvc_ctrl_get(video, ctrl); | ||
548 | if (ret < 0) { | ||
549 | uvc_ctrl_rollback(video); | ||
550 | ctrls->error_idx = i; | ||
551 | return ret; | ||
552 | } | ||
553 | } | ||
554 | ctrls->error_idx = 0; | ||
555 | ret = uvc_ctrl_rollback(video); | ||
556 | break; | ||
557 | } | ||
558 | |||
559 | case VIDIOC_S_EXT_CTRLS: | ||
560 | case VIDIOC_TRY_EXT_CTRLS: | ||
561 | { | ||
562 | struct v4l2_ext_controls *ctrls = arg; | ||
563 | struct v4l2_ext_control *ctrl = ctrls->controls; | ||
564 | unsigned int i; | ||
565 | |||
566 | ret = uvc_ctrl_begin(video); | ||
567 | if (ret < 0) | ||
568 | return ret; | ||
569 | |||
570 | for (i = 0; i < ctrls->count; ++ctrl, ++i) { | ||
571 | ret = uvc_ctrl_set(video, ctrl); | ||
572 | if (ret < 0) { | ||
573 | uvc_ctrl_rollback(video); | ||
574 | ctrls->error_idx = i; | ||
575 | return ret; | ||
576 | } | ||
577 | } | ||
578 | |||
579 | ctrls->error_idx = 0; | ||
580 | |||
581 | if (cmd == VIDIOC_S_EXT_CTRLS) | ||
582 | ret = uvc_ctrl_commit(video); | ||
583 | else | ||
584 | ret = uvc_ctrl_rollback(video); | ||
585 | break; | ||
586 | } | ||
587 | |||
588 | /* Get, Set & Enum input */ | ||
589 | case VIDIOC_ENUMINPUT: | ||
590 | { | ||
591 | const struct uvc_entity *selector = video->selector; | ||
592 | struct v4l2_input *input = arg; | ||
593 | struct uvc_entity *iterm = NULL; | ||
594 | u32 index = input->index; | ||
595 | int pin = 0; | ||
596 | |||
597 | if (selector == NULL || | ||
598 | (video->dev->quirks & UVC_QUIRK_IGNORE_SELECTOR_UNIT)) { | ||
599 | if (index != 0) | ||
600 | return -EINVAL; | ||
601 | iterm = list_first_entry(&video->iterms, | ||
602 | struct uvc_entity, chain); | ||
603 | pin = iterm->id; | ||
604 | } else if (pin < selector->selector.bNrInPins) { | ||
605 | pin = selector->selector.baSourceID[index]; | ||
606 | list_for_each_entry(iterm, video->iterms.next, chain) { | ||
607 | if (iterm->id == pin) | ||
608 | break; | ||
609 | } | ||
610 | } | ||
611 | |||
612 | if (iterm == NULL || iterm->id != pin) | ||
613 | return -EINVAL; | ||
614 | |||
615 | memset(input, 0, sizeof *input); | ||
616 | input->index = index; | ||
617 | strncpy(input->name, iterm->name, sizeof input->name); | ||
618 | if (UVC_ENTITY_TYPE(iterm) == ITT_CAMERA) | ||
619 | input->type = V4L2_INPUT_TYPE_CAMERA; | ||
620 | break; | ||
621 | } | ||
622 | |||
623 | case VIDIOC_G_INPUT: | ||
624 | { | ||
625 | u8 input; | ||
626 | |||
627 | if (video->selector == NULL || | ||
628 | (video->dev->quirks & UVC_QUIRK_IGNORE_SELECTOR_UNIT)) { | ||
629 | *(int *)arg = 0; | ||
630 | break; | ||
631 | } | ||
632 | |||
633 | ret = uvc_query_ctrl(video->dev, GET_CUR, video->selector->id, | ||
634 | video->dev->intfnum, SU_INPUT_SELECT_CONTROL, | ||
635 | &input, 1); | ||
636 | if (ret < 0) | ||
637 | return ret; | ||
638 | |||
639 | *(int *)arg = input - 1; | ||
640 | break; | ||
641 | } | ||
642 | |||
643 | case VIDIOC_S_INPUT: | ||
644 | { | ||
645 | u8 input = *(u32 *)arg + 1; | ||
646 | |||
647 | if ((ret = uvc_acquire_privileges(handle)) < 0) | ||
648 | return ret; | ||
649 | |||
650 | if (video->selector == NULL || | ||
651 | (video->dev->quirks & UVC_QUIRK_IGNORE_SELECTOR_UNIT)) { | ||
652 | if (input != 1) | ||
653 | return -EINVAL; | ||
654 | break; | ||
655 | } | ||
656 | |||
657 | if (input > video->selector->selector.bNrInPins) | ||
658 | return -EINVAL; | ||
659 | |||
660 | return uvc_query_ctrl(video->dev, SET_CUR, video->selector->id, | ||
661 | video->dev->intfnum, SU_INPUT_SELECT_CONTROL, | ||
662 | &input, 1); | ||
663 | } | ||
664 | |||
665 | /* Try, Get, Set & Enum format */ | ||
666 | case VIDIOC_ENUM_FMT: | ||
667 | { | ||
668 | struct v4l2_fmtdesc *fmt = arg; | ||
669 | struct uvc_format *format; | ||
670 | |||
671 | if (fmt->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || | ||
672 | fmt->index >= video->streaming->nformats) | ||
673 | return -EINVAL; | ||
674 | |||
675 | format = &video->streaming->format[fmt->index]; | ||
676 | fmt->flags = 0; | ||
677 | if (format->flags & UVC_FMT_FLAG_COMPRESSED) | ||
678 | fmt->flags |= V4L2_FMT_FLAG_COMPRESSED; | ||
679 | strncpy(fmt->description, format->name, | ||
680 | sizeof fmt->description); | ||
681 | fmt->description[sizeof fmt->description - 1] = 0; | ||
682 | fmt->pixelformat = format->fcc; | ||
683 | break; | ||
684 | } | ||
685 | |||
686 | case VIDIOC_TRY_FMT: | ||
687 | { | ||
688 | struct uvc_streaming_control probe; | ||
689 | |||
690 | if ((ret = uvc_acquire_privileges(handle)) < 0) | ||
691 | return ret; | ||
692 | |||
693 | return uvc_v4l2_try_format(video, arg, &probe, NULL, NULL); | ||
694 | } | ||
695 | |||
696 | case VIDIOC_S_FMT: | ||
697 | if ((ret = uvc_acquire_privileges(handle)) < 0) | ||
698 | return ret; | ||
699 | |||
700 | return uvc_v4l2_set_format(video, arg); | ||
701 | |||
702 | case VIDIOC_G_FMT: | ||
703 | return uvc_v4l2_get_format(video, arg); | ||
704 | |||
705 | /* Frame size enumeration */ | ||
706 | case VIDIOC_ENUM_FRAMESIZES: | ||
707 | { | ||
708 | struct v4l2_frmsizeenum *fsize = arg; | ||
709 | struct uvc_format *format = NULL; | ||
710 | struct uvc_frame *frame; | ||
711 | int i; | ||
712 | |||
713 | /* Look for the given pixel format */ | ||
714 | for (i = 0; i < video->streaming->nformats; i++) { | ||
715 | if (video->streaming->format[i].fcc == | ||
716 | fsize->pixel_format) { | ||
717 | format = &video->streaming->format[i]; | ||
718 | break; | ||
719 | } | ||
720 | } | ||
721 | if (format == NULL) | ||
722 | return -EINVAL; | ||
723 | |||
724 | if (fsize->index >= format->nframes) | ||
725 | return -EINVAL; | ||
726 | |||
727 | frame = &format->frame[fsize->index]; | ||
728 | fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE; | ||
729 | fsize->discrete.width = frame->wWidth; | ||
730 | fsize->discrete.height = frame->wHeight; | ||
731 | break; | ||
732 | } | ||
733 | |||
734 | /* Frame interval enumeration */ | ||
735 | case VIDIOC_ENUM_FRAMEINTERVALS: | ||
736 | { | ||
737 | struct v4l2_frmivalenum *fival = arg; | ||
738 | struct uvc_format *format = NULL; | ||
739 | struct uvc_frame *frame = NULL; | ||
740 | int i; | ||
741 | |||
742 | /* Look for the given pixel format and frame size */ | ||
743 | for (i = 0; i < video->streaming->nformats; i++) { | ||
744 | if (video->streaming->format[i].fcc == | ||
745 | fival->pixel_format) { | ||
746 | format = &video->streaming->format[i]; | ||
747 | break; | ||
748 | } | ||
749 | } | ||
750 | if (format == NULL) | ||
751 | return -EINVAL; | ||
752 | |||
753 | for (i = 0; i < format->nframes; i++) { | ||
754 | if (format->frame[i].wWidth == fival->width && | ||
755 | format->frame[i].wHeight == fival->height) { | ||
756 | frame = &format->frame[i]; | ||
757 | break; | ||
758 | } | ||
759 | } | ||
760 | if (frame == NULL) | ||
761 | return -EINVAL; | ||
762 | |||
763 | if (frame->bFrameIntervalType) { | ||
764 | if (fival->index >= frame->bFrameIntervalType) | ||
765 | return -EINVAL; | ||
766 | |||
767 | fival->type = V4L2_FRMIVAL_TYPE_DISCRETE; | ||
768 | fival->discrete.numerator = | ||
769 | frame->dwFrameInterval[fival->index]; | ||
770 | fival->discrete.denominator = 10000000; | ||
771 | uvc_simplify_fraction(&fival->discrete.numerator, | ||
772 | &fival->discrete.denominator, 8, 333); | ||
773 | } else { | ||
774 | fival->type = V4L2_FRMIVAL_TYPE_STEPWISE; | ||
775 | fival->stepwise.min.numerator = | ||
776 | frame->dwFrameInterval[0]; | ||
777 | fival->stepwise.min.denominator = 10000000; | ||
778 | fival->stepwise.max.numerator = | ||
779 | frame->dwFrameInterval[1]; | ||
780 | fival->stepwise.max.denominator = 10000000; | ||
781 | fival->stepwise.step.numerator = | ||
782 | frame->dwFrameInterval[2]; | ||
783 | fival->stepwise.step.denominator = 10000000; | ||
784 | uvc_simplify_fraction(&fival->stepwise.min.numerator, | ||
785 | &fival->stepwise.min.denominator, 8, 333); | ||
786 | uvc_simplify_fraction(&fival->stepwise.max.numerator, | ||
787 | &fival->stepwise.max.denominator, 8, 333); | ||
788 | uvc_simplify_fraction(&fival->stepwise.step.numerator, | ||
789 | &fival->stepwise.step.denominator, 8, 333); | ||
790 | } | ||
791 | break; | ||
792 | } | ||
793 | |||
794 | /* Get & Set streaming parameters */ | ||
795 | case VIDIOC_G_PARM: | ||
796 | return uvc_v4l2_get_streamparm(video, arg); | ||
797 | |||
798 | case VIDIOC_S_PARM: | ||
799 | if ((ret = uvc_acquire_privileges(handle)) < 0) | ||
800 | return ret; | ||
801 | |||
802 | return uvc_v4l2_set_streamparm(video, arg); | ||
803 | |||
804 | /* Cropping and scaling */ | ||
805 | case VIDIOC_CROPCAP: | ||
806 | { | ||
807 | struct v4l2_cropcap *ccap = arg; | ||
808 | struct uvc_frame *frame = video->streaming->cur_frame; | ||
809 | |||
810 | if (ccap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
811 | return -EINVAL; | ||
812 | |||
813 | ccap->bounds.left = 0; | ||
814 | ccap->bounds.top = 0; | ||
815 | ccap->bounds.width = frame->wWidth; | ||
816 | ccap->bounds.height = frame->wHeight; | ||
817 | |||
818 | ccap->defrect = ccap->bounds; | ||
819 | |||
820 | ccap->pixelaspect.numerator = 1; | ||
821 | ccap->pixelaspect.denominator = 1; | ||
822 | break; | ||
823 | } | ||
824 | |||
825 | case VIDIOC_G_CROP: | ||
826 | case VIDIOC_S_CROP: | ||
827 | return -EINVAL; | ||
828 | |||
829 | /* Buffers & streaming */ | ||
830 | case VIDIOC_REQBUFS: | ||
831 | { | ||
832 | struct v4l2_requestbuffers *rb = arg; | ||
833 | unsigned int bufsize = | ||
834 | video->streaming->ctrl.dwMaxVideoFrameSize; | ||
835 | |||
836 | if (rb->type != V4L2_BUF_TYPE_VIDEO_CAPTURE || | ||
837 | rb->memory != V4L2_MEMORY_MMAP) | ||
838 | return -EINVAL; | ||
839 | |||
840 | if ((ret = uvc_acquire_privileges(handle)) < 0) | ||
841 | return ret; | ||
842 | |||
843 | ret = uvc_alloc_buffers(&video->queue, rb->count, bufsize); | ||
844 | if (ret < 0) | ||
845 | return ret; | ||
846 | |||
847 | if (!(video->streaming->cur_format->flags & | ||
848 | UVC_FMT_FLAG_COMPRESSED)) | ||
849 | video->queue.flags |= UVC_QUEUE_DROP_INCOMPLETE; | ||
850 | |||
851 | rb->count = ret; | ||
852 | ret = 0; | ||
853 | break; | ||
854 | } | ||
855 | |||
856 | case VIDIOC_QUERYBUF: | ||
857 | { | ||
858 | struct v4l2_buffer *buf = arg; | ||
859 | |||
860 | if (buf->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
861 | return -EINVAL; | ||
862 | |||
863 | if (!uvc_has_privileges(handle)) | ||
864 | return -EBUSY; | ||
865 | |||
866 | return uvc_query_buffer(&video->queue, buf); | ||
867 | } | ||
868 | |||
869 | case VIDIOC_QBUF: | ||
870 | if (!uvc_has_privileges(handle)) | ||
871 | return -EBUSY; | ||
872 | |||
873 | return uvc_queue_buffer(&video->queue, arg); | ||
874 | |||
875 | case VIDIOC_DQBUF: | ||
876 | if (!uvc_has_privileges(handle)) | ||
877 | return -EBUSY; | ||
878 | |||
879 | return uvc_dequeue_buffer(&video->queue, arg, | ||
880 | file->f_flags & O_NONBLOCK); | ||
881 | |||
882 | case VIDIOC_STREAMON: | ||
883 | { | ||
884 | int *type = arg; | ||
885 | |||
886 | if (*type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
887 | return -EINVAL; | ||
888 | |||
889 | if (!uvc_has_privileges(handle)) | ||
890 | return -EBUSY; | ||
891 | |||
892 | if ((ret = uvc_video_enable(video, 1)) < 0) | ||
893 | return ret; | ||
894 | break; | ||
895 | } | ||
896 | |||
897 | case VIDIOC_STREAMOFF: | ||
898 | { | ||
899 | int *type = arg; | ||
900 | |||
901 | if (*type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | ||
902 | return -EINVAL; | ||
903 | |||
904 | if (!uvc_has_privileges(handle)) | ||
905 | return -EBUSY; | ||
906 | |||
907 | return uvc_video_enable(video, 0); | ||
908 | } | ||
909 | |||
910 | /* Analog video standards make no sense for digital cameras. */ | ||
911 | case VIDIOC_ENUMSTD: | ||
912 | case VIDIOC_QUERYSTD: | ||
913 | case VIDIOC_G_STD: | ||
914 | case VIDIOC_S_STD: | ||
915 | |||
916 | case VIDIOC_OVERLAY: | ||
917 | |||
918 | case VIDIOC_ENUMAUDIO: | ||
919 | case VIDIOC_ENUMAUDOUT: | ||
920 | |||
921 | case VIDIOC_ENUMOUTPUT: | ||
922 | uvc_trace(UVC_TRACE_IOCTL, "Unsupported ioctl 0x%08x\n", cmd); | ||
923 | return -EINVAL; | ||
924 | |||
925 | /* Dynamic controls. */ | ||
926 | case UVCIOC_CTRL_ADD: | ||
927 | { | ||
928 | struct uvc_xu_control_info *xinfo = arg; | ||
929 | struct uvc_control_info *info; | ||
930 | |||
931 | if (!capable(CAP_SYS_ADMIN)) | ||
932 | return -EPERM; | ||
933 | |||
934 | info = kmalloc(sizeof *info, GFP_KERNEL); | ||
935 | if (info == NULL) | ||
936 | return -ENOMEM; | ||
937 | |||
938 | memcpy(info->entity, xinfo->entity, sizeof info->entity); | ||
939 | info->index = xinfo->index; | ||
940 | info->selector = xinfo->selector; | ||
941 | info->size = xinfo->size; | ||
942 | info->flags = xinfo->flags; | ||
943 | |||
944 | info->flags |= UVC_CONTROL_GET_MIN | UVC_CONTROL_GET_MAX | | ||
945 | UVC_CONTROL_GET_RES | UVC_CONTROL_GET_DEF; | ||
946 | |||
947 | ret = uvc_ctrl_add_info(info); | ||
948 | if (ret < 0) | ||
949 | kfree(info); | ||
950 | break; | ||
951 | } | ||
952 | |||
953 | case UVCIOC_CTRL_MAP: | ||
954 | { | ||
955 | struct uvc_xu_control_mapping *xmap = arg; | ||
956 | struct uvc_control_mapping *map; | ||
957 | |||
958 | if (!capable(CAP_SYS_ADMIN)) | ||
959 | return -EPERM; | ||
960 | |||
961 | map = kmalloc(sizeof *map, GFP_KERNEL); | ||
962 | if (map == NULL) | ||
963 | return -ENOMEM; | ||
964 | |||
965 | map->id = xmap->id; | ||
966 | memcpy(map->name, xmap->name, sizeof map->name); | ||
967 | memcpy(map->entity, xmap->entity, sizeof map->entity); | ||
968 | map->selector = xmap->selector; | ||
969 | map->size = xmap->size; | ||
970 | map->offset = xmap->offset; | ||
971 | map->v4l2_type = xmap->v4l2_type; | ||
972 | map->data_type = xmap->data_type; | ||
973 | |||
974 | ret = uvc_ctrl_add_mapping(map); | ||
975 | if (ret < 0) | ||
976 | kfree(map); | ||
977 | break; | ||
978 | } | ||
979 | |||
980 | case UVCIOC_CTRL_GET: | ||
981 | return uvc_xu_ctrl_query(video, arg, 0); | ||
982 | |||
983 | case UVCIOC_CTRL_SET: | ||
984 | return uvc_xu_ctrl_query(video, arg, 1); | ||
985 | |||
986 | default: | ||
987 | if ((ret = v4l_compat_translate_ioctl(inode, file, cmd, arg, | ||
988 | uvc_v4l2_do_ioctl)) == -ENOIOCTLCMD) | ||
989 | uvc_trace(UVC_TRACE_IOCTL, "Unknown ioctl 0x%08x\n", | ||
990 | cmd); | ||
991 | return ret; | ||
992 | } | ||
993 | |||
994 | return ret; | ||
995 | } | ||
996 | |||
997 | static int uvc_v4l2_ioctl(struct inode *inode, struct file *file, | ||
998 | unsigned int cmd, unsigned long arg) | ||
999 | { | ||
1000 | uvc_trace(UVC_TRACE_CALLS, "uvc_v4l2_ioctl\n"); | ||
1001 | return video_usercopy(inode, file, cmd, arg, uvc_v4l2_do_ioctl); | ||
1002 | } | ||
1003 | |||
1004 | static ssize_t uvc_v4l2_read(struct file *file, char __user *data, | ||
1005 | size_t count, loff_t *ppos) | ||
1006 | { | ||
1007 | uvc_trace(UVC_TRACE_CALLS, "uvc_v4l2_read: not implemented.\n"); | ||
1008 | return -ENODEV; | ||
1009 | } | ||
1010 | |||
1011 | /* | ||
1012 | * VMA operations. | ||
1013 | */ | ||
1014 | static void uvc_vm_open(struct vm_area_struct *vma) | ||
1015 | { | ||
1016 | struct uvc_buffer *buffer = vma->vm_private_data; | ||
1017 | buffer->vma_use_count++; | ||
1018 | } | ||
1019 | |||
1020 | static void uvc_vm_close(struct vm_area_struct *vma) | ||
1021 | { | ||
1022 | struct uvc_buffer *buffer = vma->vm_private_data; | ||
1023 | buffer->vma_use_count--; | ||
1024 | } | ||
1025 | |||
1026 | static struct vm_operations_struct uvc_vm_ops = { | ||
1027 | .open = uvc_vm_open, | ||
1028 | .close = uvc_vm_close, | ||
1029 | }; | ||
1030 | |||
1031 | static int uvc_v4l2_mmap(struct file *file, struct vm_area_struct *vma) | ||
1032 | { | ||
1033 | struct video_device *vdev = video_devdata(file); | ||
1034 | struct uvc_video_device *video = video_get_drvdata(vdev); | ||
1035 | struct uvc_buffer *buffer; | ||
1036 | struct page *page; | ||
1037 | unsigned long addr, start, size; | ||
1038 | unsigned int i; | ||
1039 | int ret = 0; | ||
1040 | |||
1041 | uvc_trace(UVC_TRACE_CALLS, "uvc_v4l2_mmap\n"); | ||
1042 | |||
1043 | start = vma->vm_start; | ||
1044 | size = vma->vm_end - vma->vm_start; | ||
1045 | |||
1046 | mutex_lock(&video->queue.mutex); | ||
1047 | |||
1048 | for (i = 0; i < video->queue.count; ++i) { | ||
1049 | buffer = &video->queue.buffer[i]; | ||
1050 | if ((buffer->buf.m.offset >> PAGE_SHIFT) == vma->vm_pgoff) | ||
1051 | break; | ||
1052 | } | ||
1053 | |||
1054 | if (i == video->queue.count || size != video->queue.buf_size) { | ||
1055 | ret = -EINVAL; | ||
1056 | goto done; | ||
1057 | } | ||
1058 | |||
1059 | /* | ||
1060 | * VM_IO marks the area as being an mmaped region for I/O to a | ||
1061 | * device. It also prevents the region from being core dumped. | ||
1062 | */ | ||
1063 | vma->vm_flags |= VM_IO; | ||
1064 | |||
1065 | addr = (unsigned long)video->queue.mem + buffer->buf.m.offset; | ||
1066 | while (size > 0) { | ||
1067 | page = vmalloc_to_page((void *)addr); | ||
1068 | if ((ret = vm_insert_page(vma, start, page)) < 0) | ||
1069 | goto done; | ||
1070 | |||
1071 | start += PAGE_SIZE; | ||
1072 | addr += PAGE_SIZE; | ||
1073 | size -= PAGE_SIZE; | ||
1074 | } | ||
1075 | |||
1076 | vma->vm_ops = &uvc_vm_ops; | ||
1077 | vma->vm_private_data = buffer; | ||
1078 | uvc_vm_open(vma); | ||
1079 | |||
1080 | done: | ||
1081 | mutex_unlock(&video->queue.mutex); | ||
1082 | return ret; | ||
1083 | } | ||
1084 | |||
1085 | static unsigned int uvc_v4l2_poll(struct file *file, poll_table *wait) | ||
1086 | { | ||
1087 | struct video_device *vdev = video_devdata(file); | ||
1088 | struct uvc_video_device *video = video_get_drvdata(vdev); | ||
1089 | |||
1090 | uvc_trace(UVC_TRACE_CALLS, "uvc_v4l2_poll\n"); | ||
1091 | |||
1092 | return uvc_queue_poll(&video->queue, file, wait); | ||
1093 | } | ||
1094 | |||
1095 | struct file_operations uvc_fops = { | ||
1096 | .owner = THIS_MODULE, | ||
1097 | .open = uvc_v4l2_open, | ||
1098 | .release = uvc_v4l2_release, | ||
1099 | .ioctl = uvc_v4l2_ioctl, | ||
1100 | .compat_ioctl = v4l_compat_ioctl32, | ||
1101 | .llseek = no_llseek, | ||
1102 | .read = uvc_v4l2_read, | ||
1103 | .mmap = uvc_v4l2_mmap, | ||
1104 | .poll = uvc_v4l2_poll, | ||
1105 | }; | ||
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c new file mode 100644 index 000000000000..6faf1fb21614 --- /dev/null +++ b/drivers/media/video/uvc/uvc_video.c | |||
@@ -0,0 +1,934 @@ | |||
1 | /* | ||
2 | * uvc_video.c -- USB Video Class driver - Video handling | ||
3 | * | ||
4 | * Copyright (C) 2005-2008 | ||
5 | * Laurent Pinchart (laurent.pinchart@skynet.be) | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/version.h> | ||
16 | #include <linux/list.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/usb.h> | ||
19 | #include <linux/videodev2.h> | ||
20 | #include <linux/vmalloc.h> | ||
21 | #include <linux/wait.h> | ||
22 | #include <asm/atomic.h> | ||
23 | #include <asm/unaligned.h> | ||
24 | |||
25 | #include <media/v4l2-common.h> | ||
26 | |||
27 | #include "uvcvideo.h" | ||
28 | |||
29 | /* ------------------------------------------------------------------------ | ||
30 | * UVC Controls | ||
31 | */ | ||
32 | |||
33 | static int __uvc_query_ctrl(struct uvc_device *dev, __u8 query, __u8 unit, | ||
34 | __u8 intfnum, __u8 cs, void *data, __u16 size, | ||
35 | int timeout) | ||
36 | { | ||
37 | __u8 type = USB_TYPE_CLASS | USB_RECIP_INTERFACE; | ||
38 | unsigned int pipe; | ||
39 | int ret; | ||
40 | |||
41 | pipe = (query & 0x80) ? usb_rcvctrlpipe(dev->udev, 0) | ||
42 | : usb_sndctrlpipe(dev->udev, 0); | ||
43 | type |= (query & 0x80) ? USB_DIR_IN : USB_DIR_OUT; | ||
44 | |||
45 | ret = usb_control_msg(dev->udev, pipe, query, type, cs << 8, | ||
46 | unit << 8 | intfnum, data, size, timeout); | ||
47 | |||
48 | if (ret != size) { | ||
49 | uvc_printk(KERN_ERR, "Failed to query (%u) UVC control %u " | ||
50 | "(unit %u) : %d (exp. %u).\n", query, cs, unit, ret, | ||
51 | size); | ||
52 | return -EIO; | ||
53 | } | ||
54 | |||
55 | return 0; | ||
56 | } | ||
57 | |||
58 | int uvc_query_ctrl(struct uvc_device *dev, __u8 query, __u8 unit, | ||
59 | __u8 intfnum, __u8 cs, void *data, __u16 size) | ||
60 | { | ||
61 | return __uvc_query_ctrl(dev, query, unit, intfnum, cs, data, size, | ||
62 | UVC_CTRL_CONTROL_TIMEOUT); | ||
63 | } | ||
64 | |||
65 | static void uvc_fixup_buffer_size(struct uvc_video_device *video, | ||
66 | struct uvc_streaming_control *ctrl) | ||
67 | { | ||
68 | struct uvc_format *format; | ||
69 | struct uvc_frame *frame; | ||
70 | |||
71 | if (ctrl->bFormatIndex <= 0 || | ||
72 | ctrl->bFormatIndex > video->streaming->nformats) | ||
73 | return; | ||
74 | |||
75 | format = &video->streaming->format[ctrl->bFormatIndex - 1]; | ||
76 | |||
77 | if (ctrl->bFrameIndex <= 0 || | ||
78 | ctrl->bFrameIndex > format->nframes) | ||
79 | return; | ||
80 | |||
81 | frame = &format->frame[ctrl->bFrameIndex - 1]; | ||
82 | |||
83 | if (!(format->flags & UVC_FMT_FLAG_COMPRESSED) || | ||
84 | (ctrl->dwMaxVideoFrameSize == 0 && | ||
85 | video->dev->uvc_version < 0x0110)) | ||
86 | ctrl->dwMaxVideoFrameSize = | ||
87 | frame->dwMaxVideoFrameBufferSize; | ||
88 | } | ||
89 | |||
90 | static int uvc_get_video_ctrl(struct uvc_video_device *video, | ||
91 | struct uvc_streaming_control *ctrl, int probe, __u8 query) | ||
92 | { | ||
93 | __u8 data[34]; | ||
94 | __u8 size; | ||
95 | int ret; | ||
96 | |||
97 | size = video->dev->uvc_version >= 0x0110 ? 34 : 26; | ||
98 | ret = __uvc_query_ctrl(video->dev, query, 0, video->streaming->intfnum, | ||
99 | probe ? VS_PROBE_CONTROL : VS_COMMIT_CONTROL, &data, size, | ||
100 | UVC_CTRL_STREAMING_TIMEOUT); | ||
101 | |||
102 | if (ret < 0) | ||
103 | return ret; | ||
104 | |||
105 | ctrl->bmHint = le16_to_cpup((__le16 *)&data[0]); | ||
106 | ctrl->bFormatIndex = data[2]; | ||
107 | ctrl->bFrameIndex = data[3]; | ||
108 | ctrl->dwFrameInterval = le32_to_cpup((__le32 *)&data[4]); | ||
109 | ctrl->wKeyFrameRate = le16_to_cpup((__le16 *)&data[8]); | ||
110 | ctrl->wPFrameRate = le16_to_cpup((__le16 *)&data[10]); | ||
111 | ctrl->wCompQuality = le16_to_cpup((__le16 *)&data[12]); | ||
112 | ctrl->wCompWindowSize = le16_to_cpup((__le16 *)&data[14]); | ||
113 | ctrl->wDelay = le16_to_cpup((__le16 *)&data[16]); | ||
114 | ctrl->dwMaxVideoFrameSize = | ||
115 | le32_to_cpu(get_unaligned((__le32 *)&data[18])); | ||
116 | ctrl->dwMaxPayloadTransferSize = | ||
117 | le32_to_cpu(get_unaligned((__le32 *)&data[22])); | ||
118 | |||
119 | if (size == 34) { | ||
120 | ctrl->dwClockFrequency = | ||
121 | le32_to_cpu(get_unaligned((__le32 *)&data[26])); | ||
122 | ctrl->bmFramingInfo = data[30]; | ||
123 | ctrl->bPreferedVersion = data[31]; | ||
124 | ctrl->bMinVersion = data[32]; | ||
125 | ctrl->bMaxVersion = data[33]; | ||
126 | } else { | ||
127 | ctrl->dwClockFrequency = video->dev->clock_frequency; | ||
128 | ctrl->bmFramingInfo = 0; | ||
129 | ctrl->bPreferedVersion = 0; | ||
130 | ctrl->bMinVersion = 0; | ||
131 | ctrl->bMaxVersion = 0; | ||
132 | } | ||
133 | |||
134 | /* Some broken devices return a null or wrong dwMaxVideoFrameSize. | ||
135 | * Try to get the value from the format and frame descriptor. | ||
136 | */ | ||
137 | uvc_fixup_buffer_size(video, ctrl); | ||
138 | |||
139 | return 0; | ||
140 | } | ||
141 | |||
142 | int uvc_set_video_ctrl(struct uvc_video_device *video, | ||
143 | struct uvc_streaming_control *ctrl, int probe) | ||
144 | { | ||
145 | __u8 data[34]; | ||
146 | __u8 size; | ||
147 | |||
148 | size = video->dev->uvc_version >= 0x0110 ? 34 : 26; | ||
149 | memset(data, 0, sizeof data); | ||
150 | |||
151 | *(__le16 *)&data[0] = cpu_to_le16(ctrl->bmHint); | ||
152 | data[2] = ctrl->bFormatIndex; | ||
153 | data[3] = ctrl->bFrameIndex; | ||
154 | *(__le32 *)&data[4] = cpu_to_le32(ctrl->dwFrameInterval); | ||
155 | *(__le16 *)&data[8] = cpu_to_le16(ctrl->wKeyFrameRate); | ||
156 | *(__le16 *)&data[10] = cpu_to_le16(ctrl->wPFrameRate); | ||
157 | *(__le16 *)&data[12] = cpu_to_le16(ctrl->wCompQuality); | ||
158 | *(__le16 *)&data[14] = cpu_to_le16(ctrl->wCompWindowSize); | ||
159 | *(__le16 *)&data[16] = cpu_to_le16(ctrl->wDelay); | ||
160 | /* Note: Some of the fields below are not required for IN devices (see | ||
161 | * UVC spec, 4.3.1.1), but we still copy them in case support for OUT | ||
162 | * devices is added in the future. */ | ||
163 | put_unaligned(cpu_to_le32(ctrl->dwMaxVideoFrameSize), | ||
164 | (__le32 *)&data[18]); | ||
165 | put_unaligned(cpu_to_le32(ctrl->dwMaxPayloadTransferSize), | ||
166 | (__le32 *)&data[22]); | ||
167 | |||
168 | if (size == 34) { | ||
169 | put_unaligned(cpu_to_le32(ctrl->dwClockFrequency), | ||
170 | (__le32 *)&data[26]); | ||
171 | data[30] = ctrl->bmFramingInfo; | ||
172 | data[31] = ctrl->bPreferedVersion; | ||
173 | data[32] = ctrl->bMinVersion; | ||
174 | data[33] = ctrl->bMaxVersion; | ||
175 | } | ||
176 | |||
177 | return __uvc_query_ctrl(video->dev, SET_CUR, 0, | ||
178 | video->streaming->intfnum, | ||
179 | probe ? VS_PROBE_CONTROL : VS_COMMIT_CONTROL, &data, size, | ||
180 | UVC_CTRL_STREAMING_TIMEOUT); | ||
181 | } | ||
182 | |||
183 | int uvc_probe_video(struct uvc_video_device *video, | ||
184 | struct uvc_streaming_control *probe) | ||
185 | { | ||
186 | struct uvc_streaming_control probe_min, probe_max; | ||
187 | __u16 bandwidth; | ||
188 | unsigned int i; | ||
189 | int ret; | ||
190 | |||
191 | mutex_lock(&video->streaming->mutex); | ||
192 | |||
193 | /* Perform probing. The device should adjust the requested values | ||
194 | * according to its capabilities. However, some devices, namely the | ||
195 | * first generation UVC Logitech webcams, don't implement the Video | ||
196 | * Probe control properly, and just return the needed bandwidth. For | ||
197 | * that reason, if the needed bandwidth exceeds the maximum available | ||
198 | * bandwidth, try to lower the quality. | ||
199 | */ | ||
200 | if ((ret = uvc_set_video_ctrl(video, probe, 1)) < 0) | ||
201 | goto done; | ||
202 | |||
203 | /* Get the minimum and maximum values for compression settings. */ | ||
204 | if (!(video->dev->quirks & UVC_QUIRK_PROBE_MINMAX)) { | ||
205 | ret = uvc_get_video_ctrl(video, &probe_min, 1, GET_MIN); | ||
206 | if (ret < 0) | ||
207 | goto done; | ||
208 | ret = uvc_get_video_ctrl(video, &probe_max, 1, GET_MAX); | ||
209 | if (ret < 0) | ||
210 | goto done; | ||
211 | |||
212 | probe->wCompQuality = probe_max.wCompQuality; | ||
213 | } | ||
214 | |||
215 | for (i = 0; i < 2; ++i) { | ||
216 | if ((ret = uvc_set_video_ctrl(video, probe, 1)) < 0 || | ||
217 | (ret = uvc_get_video_ctrl(video, probe, 1, GET_CUR)) < 0) | ||
218 | goto done; | ||
219 | |||
220 | if (video->streaming->intf->num_altsetting == 1) | ||
221 | break; | ||
222 | |||
223 | bandwidth = probe->dwMaxPayloadTransferSize; | ||
224 | if (bandwidth <= video->streaming->maxpsize) | ||
225 | break; | ||
226 | |||
227 | if (video->dev->quirks & UVC_QUIRK_PROBE_MINMAX) { | ||
228 | ret = -ENOSPC; | ||
229 | goto done; | ||
230 | } | ||
231 | |||
232 | /* TODO: negotiate compression parameters */ | ||
233 | probe->wKeyFrameRate = probe_min.wKeyFrameRate; | ||
234 | probe->wPFrameRate = probe_min.wPFrameRate; | ||
235 | probe->wCompQuality = probe_max.wCompQuality; | ||
236 | probe->wCompWindowSize = probe_min.wCompWindowSize; | ||
237 | } | ||
238 | |||
239 | done: | ||
240 | mutex_unlock(&video->streaming->mutex); | ||
241 | return ret; | ||
242 | } | ||
243 | |||
244 | /* ------------------------------------------------------------------------ | ||
245 | * Video codecs | ||
246 | */ | ||
247 | |||
248 | /* Values for bmHeaderInfo (Video and Still Image Payload Headers, 2.4.3.3) */ | ||
249 | #define UVC_STREAM_EOH (1 << 7) | ||
250 | #define UVC_STREAM_ERR (1 << 6) | ||
251 | #define UVC_STREAM_STI (1 << 5) | ||
252 | #define UVC_STREAM_RES (1 << 4) | ||
253 | #define UVC_STREAM_SCR (1 << 3) | ||
254 | #define UVC_STREAM_PTS (1 << 2) | ||
255 | #define UVC_STREAM_EOF (1 << 1) | ||
256 | #define UVC_STREAM_FID (1 << 0) | ||
257 | |||
258 | /* Video payload decoding is handled by uvc_video_decode_start(), | ||
259 | * uvc_video_decode_data() and uvc_video_decode_end(). | ||
260 | * | ||
261 | * uvc_video_decode_start is called with URB data at the start of a bulk or | ||
262 | * isochronous payload. It processes header data and returns the header size | ||
263 | * in bytes if successful. If an error occurs, it returns a negative error | ||
264 | * code. The following error codes have special meanings. | ||
265 | * | ||
266 | * - EAGAIN informs the caller that the current video buffer should be marked | ||
267 | * as done, and that the function should be called again with the same data | ||
268 | * and a new video buffer. This is used when end of frame conditions can be | ||
269 | * reliably detected at the beginning of the next frame only. | ||
270 | * | ||
271 | * If an error other than -EAGAIN is returned, the caller will drop the current | ||
272 | * payload. No call to uvc_video_decode_data and uvc_video_decode_end will be | ||
273 | * made until the next payload. -ENODATA can be used to drop the current | ||
274 | * payload if no other error code is appropriate. | ||
275 | * | ||
276 | * uvc_video_decode_data is called for every URB with URB data. It copies the | ||
277 | * data to the video buffer. | ||
278 | * | ||
279 | * uvc_video_decode_end is called with header data at the end of a bulk or | ||
280 | * isochronous payload. It performs any additional header data processing and | ||
281 | * returns 0 or a negative error code if an error occured. As header data have | ||
282 | * already been processed by uvc_video_decode_start, this functions isn't | ||
283 | * required to perform sanity checks a second time. | ||
284 | * | ||
285 | * For isochronous transfers where a payload is always transfered in a single | ||
286 | * URB, the three functions will be called in a row. | ||
287 | * | ||
288 | * To let the decoder process header data and update its internal state even | ||
289 | * when no video buffer is available, uvc_video_decode_start must be prepared | ||
290 | * to be called with a NULL buf parameter. uvc_video_decode_data and | ||
291 | * uvc_video_decode_end will never be called with a NULL buffer. | ||
292 | */ | ||
293 | static int uvc_video_decode_start(struct uvc_video_device *video, | ||
294 | struct uvc_buffer *buf, const __u8 *data, int len) | ||
295 | { | ||
296 | __u8 fid; | ||
297 | |||
298 | /* Sanity checks: | ||
299 | * - packet must be at least 2 bytes long | ||
300 | * - bHeaderLength value must be at least 2 bytes (see above) | ||
301 | * - bHeaderLength value can't be larger than the packet size. | ||
302 | */ | ||
303 | if (len < 2 || data[0] < 2 || data[0] > len) | ||
304 | return -EINVAL; | ||
305 | |||
306 | /* Skip payloads marked with the error bit ("error frames"). */ | ||
307 | if (data[1] & UVC_STREAM_ERR) { | ||
308 | uvc_trace(UVC_TRACE_FRAME, "Dropping payload (error bit " | ||
309 | "set).\n"); | ||
310 | return -ENODATA; | ||
311 | } | ||
312 | |||
313 | fid = data[1] & UVC_STREAM_FID; | ||
314 | |||
315 | /* Store the payload FID bit and return immediately when the buffer is | ||
316 | * NULL. | ||
317 | */ | ||
318 | if (buf == NULL) { | ||
319 | video->last_fid = fid; | ||
320 | return -ENODATA; | ||
321 | } | ||
322 | |||
323 | /* Synchronize to the input stream by waiting for the FID bit to be | ||
324 | * toggled when the the buffer state is not UVC_BUF_STATE_ACTIVE. | ||
325 | * queue->last_fid is initialized to -1, so the first isochronous | ||
326 | * frame will always be in sync. | ||
327 | * | ||
328 | * If the device doesn't toggle the FID bit, invert video->last_fid | ||
329 | * when the EOF bit is set to force synchronisation on the next packet. | ||
330 | */ | ||
331 | if (buf->state != UVC_BUF_STATE_ACTIVE) { | ||
332 | if (fid == video->last_fid) { | ||
333 | uvc_trace(UVC_TRACE_FRAME, "Dropping payload (out of " | ||
334 | "sync).\n"); | ||
335 | if ((video->dev->quirks & UVC_QUIRK_STREAM_NO_FID) && | ||
336 | (data[1] & UVC_STREAM_EOF)) | ||
337 | video->last_fid ^= UVC_STREAM_FID; | ||
338 | return -ENODATA; | ||
339 | } | ||
340 | |||
341 | /* TODO: Handle PTS and SCR. */ | ||
342 | buf->state = UVC_BUF_STATE_ACTIVE; | ||
343 | } | ||
344 | |||
345 | /* Mark the buffer as done if we're at the beginning of a new frame. | ||
346 | * End of frame detection is better implemented by checking the EOF | ||
347 | * bit (FID bit toggling is delayed by one frame compared to the EOF | ||
348 | * bit), but some devices don't set the bit at end of frame (and the | ||
349 | * last payload can be lost anyway). We thus must check if the FID has | ||
350 | * been toggled. | ||
351 | * | ||
352 | * queue->last_fid is initialized to -1, so the first isochronous | ||
353 | * frame will never trigger an end of frame detection. | ||
354 | * | ||
355 | * Empty buffers (bytesused == 0) don't trigger end of frame detection | ||
356 | * as it doesn't make sense to return an empty buffer. This also | ||
357 | * avoids detecting and of frame conditions at FID toggling if the | ||
358 | * previous payload had the EOF bit set. | ||
359 | */ | ||
360 | if (fid != video->last_fid && buf->buf.bytesused != 0) { | ||
361 | uvc_trace(UVC_TRACE_FRAME, "Frame complete (FID bit " | ||
362 | "toggled).\n"); | ||
363 | buf->state = UVC_BUF_STATE_DONE; | ||
364 | return -EAGAIN; | ||
365 | } | ||
366 | |||
367 | video->last_fid = fid; | ||
368 | |||
369 | return data[0]; | ||
370 | } | ||
371 | |||
372 | static void uvc_video_decode_data(struct uvc_video_device *video, | ||
373 | struct uvc_buffer *buf, const __u8 *data, int len) | ||
374 | { | ||
375 | struct uvc_video_queue *queue = &video->queue; | ||
376 | unsigned int maxlen, nbytes; | ||
377 | void *mem; | ||
378 | |||
379 | if (len <= 0) | ||
380 | return; | ||
381 | |||
382 | /* Copy the video data to the buffer. */ | ||
383 | maxlen = buf->buf.length - buf->buf.bytesused; | ||
384 | mem = queue->mem + buf->buf.m.offset + buf->buf.bytesused; | ||
385 | nbytes = min((unsigned int)len, maxlen); | ||
386 | memcpy(mem, data, nbytes); | ||
387 | buf->buf.bytesused += nbytes; | ||
388 | |||
389 | /* Complete the current frame if the buffer size was exceeded. */ | ||
390 | if (len > maxlen) { | ||
391 | uvc_trace(UVC_TRACE_FRAME, "Frame complete (overflow).\n"); | ||
392 | buf->state = UVC_BUF_STATE_DONE; | ||
393 | } | ||
394 | } | ||
395 | |||
396 | static void uvc_video_decode_end(struct uvc_video_device *video, | ||
397 | struct uvc_buffer *buf, const __u8 *data, int len) | ||
398 | { | ||
399 | /* Mark the buffer as done if the EOF marker is set. */ | ||
400 | if (data[1] & UVC_STREAM_EOF && buf->buf.bytesused != 0) { | ||
401 | uvc_trace(UVC_TRACE_FRAME, "Frame complete (EOF found).\n"); | ||
402 | if (data[0] == len) | ||
403 | uvc_trace(UVC_TRACE_FRAME, "EOF in empty payload.\n"); | ||
404 | buf->state = UVC_BUF_STATE_DONE; | ||
405 | if (video->dev->quirks & UVC_QUIRK_STREAM_NO_FID) | ||
406 | video->last_fid ^= UVC_STREAM_FID; | ||
407 | } | ||
408 | } | ||
409 | |||
410 | /* ------------------------------------------------------------------------ | ||
411 | * URB handling | ||
412 | */ | ||
413 | |||
414 | /* | ||
415 | * Completion handler for video URBs. | ||
416 | */ | ||
417 | static void uvc_video_decode_isoc(struct urb *urb, | ||
418 | struct uvc_video_device *video, struct uvc_buffer *buf) | ||
419 | { | ||
420 | u8 *mem; | ||
421 | int ret, i; | ||
422 | |||
423 | for (i = 0; i < urb->number_of_packets; ++i) { | ||
424 | if (urb->iso_frame_desc[i].status < 0) { | ||
425 | uvc_trace(UVC_TRACE_FRAME, "USB isochronous frame " | ||
426 | "lost (%d).\n", urb->iso_frame_desc[i].status); | ||
427 | continue; | ||
428 | } | ||
429 | |||
430 | /* Decode the payload header. */ | ||
431 | mem = urb->transfer_buffer + urb->iso_frame_desc[i].offset; | ||
432 | do { | ||
433 | ret = uvc_video_decode_start(video, buf, mem, | ||
434 | urb->iso_frame_desc[i].actual_length); | ||
435 | if (ret == -EAGAIN) | ||
436 | buf = uvc_queue_next_buffer(&video->queue, buf); | ||
437 | } while (ret == -EAGAIN); | ||
438 | |||
439 | if (ret < 0) | ||
440 | continue; | ||
441 | |||
442 | /* Decode the payload data. */ | ||
443 | uvc_video_decode_data(video, buf, mem + ret, | ||
444 | urb->iso_frame_desc[i].actual_length - ret); | ||
445 | |||
446 | /* Process the header again. */ | ||
447 | uvc_video_decode_end(video, buf, mem, ret); | ||
448 | |||
449 | if (buf->state == UVC_BUF_STATE_DONE || | ||
450 | buf->state == UVC_BUF_STATE_ERROR) | ||
451 | buf = uvc_queue_next_buffer(&video->queue, buf); | ||
452 | } | ||
453 | } | ||
454 | |||
455 | static void uvc_video_decode_bulk(struct urb *urb, | ||
456 | struct uvc_video_device *video, struct uvc_buffer *buf) | ||
457 | { | ||
458 | u8 *mem; | ||
459 | int len, ret; | ||
460 | |||
461 | mem = urb->transfer_buffer; | ||
462 | len = urb->actual_length; | ||
463 | video->bulk.payload_size += len; | ||
464 | |||
465 | /* If the URB is the first of its payload, decode and save the | ||
466 | * header. | ||
467 | */ | ||
468 | if (video->bulk.header_size == 0) { | ||
469 | do { | ||
470 | ret = uvc_video_decode_start(video, buf, mem, len); | ||
471 | if (ret == -EAGAIN) | ||
472 | buf = uvc_queue_next_buffer(&video->queue, buf); | ||
473 | } while (ret == -EAGAIN); | ||
474 | |||
475 | /* If an error occured skip the rest of the payload. */ | ||
476 | if (ret < 0 || buf == NULL) { | ||
477 | video->bulk.skip_payload = 1; | ||
478 | return; | ||
479 | } | ||
480 | |||
481 | video->bulk.header_size = ret; | ||
482 | memcpy(video->bulk.header, mem, video->bulk.header_size); | ||
483 | |||
484 | mem += ret; | ||
485 | len -= ret; | ||
486 | } | ||
487 | |||
488 | /* The buffer queue might have been cancelled while a bulk transfer | ||
489 | * was in progress, so we can reach here with buf equal to NULL. Make | ||
490 | * sure buf is never dereferenced if NULL. | ||
491 | */ | ||
492 | |||
493 | /* Process video data. */ | ||
494 | if (!video->bulk.skip_payload && buf != NULL) | ||
495 | uvc_video_decode_data(video, buf, mem, len); | ||
496 | |||
497 | /* Detect the payload end by a URB smaller than the maximum size (or | ||
498 | * a payload size equal to the maximum) and process the header again. | ||
499 | */ | ||
500 | if (urb->actual_length < urb->transfer_buffer_length || | ||
501 | video->bulk.payload_size >= video->bulk.max_payload_size) { | ||
502 | if (!video->bulk.skip_payload && buf != NULL) { | ||
503 | uvc_video_decode_end(video, buf, video->bulk.header, | ||
504 | video->bulk.header_size); | ||
505 | if (buf->state == UVC_BUF_STATE_DONE || | ||
506 | buf->state == UVC_BUF_STATE_ERROR) | ||
507 | buf = uvc_queue_next_buffer(&video->queue, buf); | ||
508 | } | ||
509 | |||
510 | video->bulk.header_size = 0; | ||
511 | video->bulk.skip_payload = 0; | ||
512 | video->bulk.payload_size = 0; | ||
513 | } | ||
514 | } | ||
515 | |||
516 | static void uvc_video_complete(struct urb *urb) | ||
517 | { | ||
518 | struct uvc_video_device *video = urb->context; | ||
519 | struct uvc_video_queue *queue = &video->queue; | ||
520 | struct uvc_buffer *buf = NULL; | ||
521 | unsigned long flags; | ||
522 | int ret; | ||
523 | |||
524 | switch (urb->status) { | ||
525 | case 0: | ||
526 | break; | ||
527 | |||
528 | default: | ||
529 | uvc_printk(KERN_WARNING, "Non-zero status (%d) in video " | ||
530 | "completion handler.\n", urb->status); | ||
531 | |||
532 | case -ENOENT: /* usb_kill_urb() called. */ | ||
533 | if (video->frozen) | ||
534 | return; | ||
535 | |||
536 | case -ECONNRESET: /* usb_unlink_urb() called. */ | ||
537 | case -ESHUTDOWN: /* The endpoint is being disabled. */ | ||
538 | uvc_queue_cancel(queue, urb->status == -ESHUTDOWN); | ||
539 | return; | ||
540 | } | ||
541 | |||
542 | spin_lock_irqsave(&queue->irqlock, flags); | ||
543 | if (!list_empty(&queue->irqqueue)) | ||
544 | buf = list_first_entry(&queue->irqqueue, struct uvc_buffer, | ||
545 | queue); | ||
546 | spin_unlock_irqrestore(&queue->irqlock, flags); | ||
547 | |||
548 | video->decode(urb, video, buf); | ||
549 | |||
550 | if ((ret = usb_submit_urb(urb, GFP_ATOMIC)) < 0) { | ||
551 | uvc_printk(KERN_ERR, "Failed to resubmit video URB (%d).\n", | ||
552 | ret); | ||
553 | } | ||
554 | } | ||
555 | |||
556 | /* | ||
557 | * Uninitialize isochronous/bulk URBs and free transfer buffers. | ||
558 | */ | ||
559 | static void uvc_uninit_video(struct uvc_video_device *video) | ||
560 | { | ||
561 | struct urb *urb; | ||
562 | unsigned int i; | ||
563 | |||
564 | for (i = 0; i < UVC_URBS; ++i) { | ||
565 | if ((urb = video->urb[i]) == NULL) | ||
566 | continue; | ||
567 | |||
568 | usb_kill_urb(urb); | ||
569 | /* urb->transfer_buffer_length is not touched by USB core, so | ||
570 | * we can use it here as the buffer length. | ||
571 | */ | ||
572 | if (video->urb_buffer[i]) { | ||
573 | usb_buffer_free(video->dev->udev, | ||
574 | urb->transfer_buffer_length, | ||
575 | video->urb_buffer[i], urb->transfer_dma); | ||
576 | video->urb_buffer[i] = NULL; | ||
577 | } | ||
578 | |||
579 | usb_free_urb(urb); | ||
580 | video->urb[i] = NULL; | ||
581 | } | ||
582 | } | ||
583 | |||
584 | /* | ||
585 | * Initialize isochronous URBs and allocate transfer buffers. The packet size | ||
586 | * is given by the endpoint. | ||
587 | */ | ||
588 | static int uvc_init_video_isoc(struct uvc_video_device *video, | ||
589 | struct usb_host_endpoint *ep) | ||
590 | { | ||
591 | struct urb *urb; | ||
592 | unsigned int npackets, i, j; | ||
593 | __u16 psize; | ||
594 | __u32 size; | ||
595 | |||
596 | /* Compute the number of isochronous packets to allocate by dividing | ||
597 | * the maximum video frame size by the packet size. Limit the result | ||
598 | * to UVC_MAX_ISO_PACKETS. | ||
599 | */ | ||
600 | psize = le16_to_cpu(ep->desc.wMaxPacketSize); | ||
601 | psize = (psize & 0x07ff) * (1 + ((psize >> 11) & 3)); | ||
602 | |||
603 | size = video->streaming->ctrl.dwMaxVideoFrameSize; | ||
604 | if (size > UVC_MAX_FRAME_SIZE) | ||
605 | return -EINVAL; | ||
606 | |||
607 | npackets = (size + psize - 1) / psize; | ||
608 | if (npackets > UVC_MAX_ISO_PACKETS) | ||
609 | npackets = UVC_MAX_ISO_PACKETS; | ||
610 | |||
611 | size = npackets * psize; | ||
612 | |||
613 | for (i = 0; i < UVC_URBS; ++i) { | ||
614 | urb = usb_alloc_urb(npackets, GFP_KERNEL); | ||
615 | if (urb == NULL) { | ||
616 | uvc_uninit_video(video); | ||
617 | return -ENOMEM; | ||
618 | } | ||
619 | |||
620 | video->urb_buffer[i] = usb_buffer_alloc(video->dev->udev, | ||
621 | size, GFP_KERNEL, &urb->transfer_dma); | ||
622 | if (video->urb_buffer[i] == NULL) { | ||
623 | usb_free_urb(urb); | ||
624 | uvc_uninit_video(video); | ||
625 | return -ENOMEM; | ||
626 | } | ||
627 | |||
628 | urb->dev = video->dev->udev; | ||
629 | urb->context = video; | ||
630 | urb->pipe = usb_rcvisocpipe(video->dev->udev, | ||
631 | ep->desc.bEndpointAddress); | ||
632 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; | ||
633 | urb->interval = ep->desc.bInterval; | ||
634 | urb->transfer_buffer = video->urb_buffer[i]; | ||
635 | urb->complete = uvc_video_complete; | ||
636 | urb->number_of_packets = npackets; | ||
637 | urb->transfer_buffer_length = size; | ||
638 | |||
639 | for (j = 0; j < npackets; ++j) { | ||
640 | urb->iso_frame_desc[j].offset = j * psize; | ||
641 | urb->iso_frame_desc[j].length = psize; | ||
642 | } | ||
643 | |||
644 | video->urb[i] = urb; | ||
645 | } | ||
646 | |||
647 | return 0; | ||
648 | } | ||
649 | |||
650 | /* | ||
651 | * Initialize bulk URBs and allocate transfer buffers. The packet size is | ||
652 | * given by the endpoint. | ||
653 | */ | ||
654 | static int uvc_init_video_bulk(struct uvc_video_device *video, | ||
655 | struct usb_host_endpoint *ep) | ||
656 | { | ||
657 | struct urb *urb; | ||
658 | unsigned int pipe, i; | ||
659 | __u16 psize; | ||
660 | __u32 size; | ||
661 | |||
662 | /* Compute the bulk URB size. Some devices set the maximum payload | ||
663 | * size to a value too high for memory-constrained devices. We must | ||
664 | * then transfer the payload accross multiple URBs. To be consistant | ||
665 | * with isochronous mode, allocate maximum UVC_MAX_ISO_PACKETS per bulk | ||
666 | * URB. | ||
667 | */ | ||
668 | psize = le16_to_cpu(ep->desc.wMaxPacketSize) & 0x07ff; | ||
669 | size = video->streaming->ctrl.dwMaxPayloadTransferSize; | ||
670 | video->bulk.max_payload_size = size; | ||
671 | if (size > psize * UVC_MAX_ISO_PACKETS) | ||
672 | size = psize * UVC_MAX_ISO_PACKETS; | ||
673 | |||
674 | pipe = usb_rcvbulkpipe(video->dev->udev, ep->desc.bEndpointAddress); | ||
675 | |||
676 | for (i = 0; i < UVC_URBS; ++i) { | ||
677 | urb = usb_alloc_urb(0, GFP_KERNEL); | ||
678 | if (urb == NULL) { | ||
679 | uvc_uninit_video(video); | ||
680 | return -ENOMEM; | ||
681 | } | ||
682 | |||
683 | video->urb_buffer[i] = usb_buffer_alloc(video->dev->udev, | ||
684 | size, GFP_KERNEL, &urb->transfer_dma); | ||
685 | if (video->urb_buffer[i] == NULL) { | ||
686 | usb_free_urb(urb); | ||
687 | uvc_uninit_video(video); | ||
688 | return -ENOMEM; | ||
689 | } | ||
690 | |||
691 | usb_fill_bulk_urb(urb, video->dev->udev, pipe, | ||
692 | video->urb_buffer[i], size, uvc_video_complete, | ||
693 | video); | ||
694 | urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; | ||
695 | |||
696 | video->urb[i] = urb; | ||
697 | } | ||
698 | |||
699 | return 0; | ||
700 | } | ||
701 | |||
702 | /* | ||
703 | * Initialize isochronous/bulk URBs and allocate transfer buffers. | ||
704 | */ | ||
705 | static int uvc_init_video(struct uvc_video_device *video) | ||
706 | { | ||
707 | struct usb_interface *intf = video->streaming->intf; | ||
708 | struct usb_host_interface *alts; | ||
709 | struct usb_host_endpoint *ep = NULL; | ||
710 | int intfnum = video->streaming->intfnum; | ||
711 | unsigned int bandwidth, psize, i; | ||
712 | int ret; | ||
713 | |||
714 | video->last_fid = -1; | ||
715 | video->bulk.header_size = 0; | ||
716 | video->bulk.skip_payload = 0; | ||
717 | video->bulk.payload_size = 0; | ||
718 | |||
719 | if (intf->num_altsetting > 1) { | ||
720 | /* Isochronous endpoint, select the alternate setting. */ | ||
721 | bandwidth = video->streaming->ctrl.dwMaxPayloadTransferSize; | ||
722 | |||
723 | if (bandwidth == 0) { | ||
724 | uvc_printk(KERN_WARNING, "device %s requested null " | ||
725 | "bandwidth, defaulting to lowest.\n", | ||
726 | video->vdev->name); | ||
727 | bandwidth = 1; | ||
728 | } | ||
729 | |||
730 | for (i = 0; i < intf->num_altsetting; ++i) { | ||
731 | alts = &intf->altsetting[i]; | ||
732 | ep = uvc_find_endpoint(alts, | ||
733 | video->streaming->header.bEndpointAddress); | ||
734 | if (ep == NULL) | ||
735 | continue; | ||
736 | |||
737 | /* Check if the bandwidth is high enough. */ | ||
738 | psize = le16_to_cpu(ep->desc.wMaxPacketSize); | ||
739 | psize = (psize & 0x07ff) * (1 + ((psize >> 11) & 3)); | ||
740 | if (psize >= bandwidth) | ||
741 | break; | ||
742 | } | ||
743 | |||
744 | if (i >= intf->num_altsetting) | ||
745 | return -EIO; | ||
746 | |||
747 | if ((ret = usb_set_interface(video->dev->udev, intfnum, i)) < 0) | ||
748 | return ret; | ||
749 | |||
750 | ret = uvc_init_video_isoc(video, ep); | ||
751 | } else { | ||
752 | /* Bulk endpoint, proceed to URB initialization. */ | ||
753 | ep = uvc_find_endpoint(&intf->altsetting[0], | ||
754 | video->streaming->header.bEndpointAddress); | ||
755 | if (ep == NULL) | ||
756 | return -EIO; | ||
757 | |||
758 | ret = uvc_init_video_bulk(video, ep); | ||
759 | } | ||
760 | |||
761 | if (ret < 0) | ||
762 | return ret; | ||
763 | |||
764 | /* Submit the URBs. */ | ||
765 | for (i = 0; i < UVC_URBS; ++i) { | ||
766 | if ((ret = usb_submit_urb(video->urb[i], GFP_KERNEL)) < 0) { | ||
767 | uvc_printk(KERN_ERR, "Failed to submit URB %u " | ||
768 | "(%d).\n", i, ret); | ||
769 | uvc_uninit_video(video); | ||
770 | return ret; | ||
771 | } | ||
772 | } | ||
773 | |||
774 | return 0; | ||
775 | } | ||
776 | |||
777 | /* -------------------------------------------------------------------------- | ||
778 | * Suspend/resume | ||
779 | */ | ||
780 | |||
781 | /* | ||
782 | * Stop streaming without disabling the video queue. | ||
783 | * | ||
784 | * To let userspace applications resume without trouble, we must not touch the | ||
785 | * video buffers in any way. We mark the device as frozen to make sure the URB | ||
786 | * completion handler won't try to cancel the queue when we kill the URBs. | ||
787 | */ | ||
788 | int uvc_video_suspend(struct uvc_video_device *video) | ||
789 | { | ||
790 | if (!uvc_queue_streaming(&video->queue)) | ||
791 | return 0; | ||
792 | |||
793 | video->frozen = 1; | ||
794 | uvc_uninit_video(video); | ||
795 | usb_set_interface(video->dev->udev, video->streaming->intfnum, 0); | ||
796 | return 0; | ||
797 | } | ||
798 | |||
799 | /* | ||
800 | * Reconfigure the video interface and restart streaming if it was enable | ||
801 | * before suspend. | ||
802 | * | ||
803 | * If an error occurs, disable the video queue. This will wake all pending | ||
804 | * buffers, making sure userspace applications are notified of the problem | ||
805 | * instead of waiting forever. | ||
806 | */ | ||
807 | int uvc_video_resume(struct uvc_video_device *video) | ||
808 | { | ||
809 | int ret; | ||
810 | |||
811 | video->frozen = 0; | ||
812 | |||
813 | if ((ret = uvc_set_video_ctrl(video, &video->streaming->ctrl, 0)) < 0) { | ||
814 | uvc_queue_enable(&video->queue, 0); | ||
815 | return ret; | ||
816 | } | ||
817 | |||
818 | if (!uvc_queue_streaming(&video->queue)) | ||
819 | return 0; | ||
820 | |||
821 | if ((ret = uvc_init_video(video)) < 0) | ||
822 | uvc_queue_enable(&video->queue, 0); | ||
823 | |||
824 | return ret; | ||
825 | } | ||
826 | |||
827 | /* ------------------------------------------------------------------------ | ||
828 | * Video device | ||
829 | */ | ||
830 | |||
831 | /* | ||
832 | * Initialize the UVC video device by retrieving the default format and | ||
833 | * committing it. | ||
834 | * | ||
835 | * Some cameras (namely the Fuji Finepix) set the format and frame | ||
836 | * indexes to zero. The UVC standard doesn't clearly make this a spec | ||
837 | * violation, so try to silently fix the values if possible. | ||
838 | * | ||
839 | * This function is called before registering the device with V4L. | ||
840 | */ | ||
841 | int uvc_video_init(struct uvc_video_device *video) | ||
842 | { | ||
843 | struct uvc_streaming_control *probe = &video->streaming->ctrl; | ||
844 | struct uvc_format *format = NULL; | ||
845 | struct uvc_frame *frame = NULL; | ||
846 | unsigned int i; | ||
847 | int ret; | ||
848 | |||
849 | if (video->streaming->nformats == 0) { | ||
850 | uvc_printk(KERN_INFO, "No supported video formats found.\n"); | ||
851 | return -EINVAL; | ||
852 | } | ||
853 | |||
854 | /* Alternate setting 0 should be the default, yet the XBox Live Vision | ||
855 | * Cam (and possibly other devices) crash or otherwise misbehave if | ||
856 | * they don't receive a SET_INTERFACE request before any other video | ||
857 | * control request. | ||
858 | */ | ||
859 | usb_set_interface(video->dev->udev, video->streaming->intfnum, 0); | ||
860 | |||
861 | /* Some webcams don't suport GET_DEF request on the probe control. We | ||
862 | * fall back to GET_CUR if GET_DEF fails. | ||
863 | */ | ||
864 | if ((ret = uvc_get_video_ctrl(video, probe, 1, GET_DEF)) < 0 && | ||
865 | (ret = uvc_get_video_ctrl(video, probe, 1, GET_CUR)) < 0) | ||
866 | return ret; | ||
867 | |||
868 | /* Check if the default format descriptor exists. Use the first | ||
869 | * available format otherwise. | ||
870 | */ | ||
871 | for (i = video->streaming->nformats; i > 0; --i) { | ||
872 | format = &video->streaming->format[i-1]; | ||
873 | if (format->index == probe->bFormatIndex) | ||
874 | break; | ||
875 | } | ||
876 | |||
877 | if (format->nframes == 0) { | ||
878 | uvc_printk(KERN_INFO, "No frame descriptor found for the " | ||
879 | "default format.\n"); | ||
880 | return -EINVAL; | ||
881 | } | ||
882 | |||
883 | /* Zero bFrameIndex might be correct. Stream-based formats (including | ||
884 | * MPEG-2 TS and DV) do not support frames but have a dummy frame | ||
885 | * descriptor with bFrameIndex set to zero. If the default frame | ||
886 | * descriptor is not found, use the first avalable frame. | ||
887 | */ | ||
888 | for (i = format->nframes; i > 0; --i) { | ||
889 | frame = &format->frame[i-1]; | ||
890 | if (frame->bFrameIndex == probe->bFrameIndex) | ||
891 | break; | ||
892 | } | ||
893 | |||
894 | /* Commit the default settings. */ | ||
895 | probe->bFormatIndex = format->index; | ||
896 | probe->bFrameIndex = frame->bFrameIndex; | ||
897 | if ((ret = uvc_set_video_ctrl(video, probe, 0)) < 0) | ||
898 | return ret; | ||
899 | |||
900 | video->streaming->cur_format = format; | ||
901 | video->streaming->cur_frame = frame; | ||
902 | atomic_set(&video->active, 0); | ||
903 | |||
904 | /* Select the video decoding function */ | ||
905 | if (video->dev->quirks & UVC_QUIRK_BUILTIN_ISIGHT) | ||
906 | video->decode = uvc_video_decode_isight; | ||
907 | else if (video->streaming->intf->num_altsetting > 1) | ||
908 | video->decode = uvc_video_decode_isoc; | ||
909 | else | ||
910 | video->decode = uvc_video_decode_bulk; | ||
911 | |||
912 | return 0; | ||
913 | } | ||
914 | |||
915 | /* | ||
916 | * Enable or disable the video stream. | ||
917 | */ | ||
918 | int uvc_video_enable(struct uvc_video_device *video, int enable) | ||
919 | { | ||
920 | int ret; | ||
921 | |||
922 | if (!enable) { | ||
923 | uvc_uninit_video(video); | ||
924 | usb_set_interface(video->dev->udev, | ||
925 | video->streaming->intfnum, 0); | ||
926 | uvc_queue_enable(&video->queue, 0); | ||
927 | return 0; | ||
928 | } | ||
929 | |||
930 | if ((ret = uvc_queue_enable(&video->queue, 1)) < 0) | ||
931 | return ret; | ||
932 | |||
933 | return uvc_init_video(video); | ||
934 | } | ||
diff --git a/drivers/media/video/uvc/uvcvideo.h b/drivers/media/video/uvc/uvcvideo.h new file mode 100644 index 000000000000..a995a780db1c --- /dev/null +++ b/drivers/media/video/uvc/uvcvideo.h | |||
@@ -0,0 +1,796 @@ | |||
1 | #ifndef _USB_VIDEO_H_ | ||
2 | #define _USB_VIDEO_H_ | ||
3 | |||
4 | #include <linux/kernel.h> | ||
5 | #include <linux/videodev2.h> | ||
6 | |||
7 | |||
8 | /* | ||
9 | * Dynamic controls | ||
10 | */ | ||
11 | |||
12 | /* Data types for UVC control data */ | ||
13 | #define UVC_CTRL_DATA_TYPE_RAW 0 | ||
14 | #define UVC_CTRL_DATA_TYPE_SIGNED 1 | ||
15 | #define UVC_CTRL_DATA_TYPE_UNSIGNED 2 | ||
16 | #define UVC_CTRL_DATA_TYPE_BOOLEAN 3 | ||
17 | #define UVC_CTRL_DATA_TYPE_ENUM 4 | ||
18 | #define UVC_CTRL_DATA_TYPE_BITMASK 5 | ||
19 | |||
20 | /* Control flags */ | ||
21 | #define UVC_CONTROL_SET_CUR (1 << 0) | ||
22 | #define UVC_CONTROL_GET_CUR (1 << 1) | ||
23 | #define UVC_CONTROL_GET_MIN (1 << 2) | ||
24 | #define UVC_CONTROL_GET_MAX (1 << 3) | ||
25 | #define UVC_CONTROL_GET_RES (1 << 4) | ||
26 | #define UVC_CONTROL_GET_DEF (1 << 5) | ||
27 | /* Control should be saved at suspend and restored at resume. */ | ||
28 | #define UVC_CONTROL_RESTORE (1 << 6) | ||
29 | /* Control can be updated by the camera. */ | ||
30 | #define UVC_CONTROL_AUTO_UPDATE (1 << 7) | ||
31 | |||
32 | #define UVC_CONTROL_GET_RANGE (UVC_CONTROL_GET_CUR | UVC_CONTROL_GET_MIN | \ | ||
33 | UVC_CONTROL_GET_MAX | UVC_CONTROL_GET_RES | \ | ||
34 | UVC_CONTROL_GET_DEF) | ||
35 | |||
36 | struct uvc_xu_control_info { | ||
37 | __u8 entity[16]; | ||
38 | __u8 index; | ||
39 | __u8 selector; | ||
40 | __u16 size; | ||
41 | __u32 flags; | ||
42 | }; | ||
43 | |||
44 | struct uvc_xu_control_mapping { | ||
45 | __u32 id; | ||
46 | __u8 name[32]; | ||
47 | __u8 entity[16]; | ||
48 | __u8 selector; | ||
49 | |||
50 | __u8 size; | ||
51 | __u8 offset; | ||
52 | enum v4l2_ctrl_type v4l2_type; | ||
53 | __u32 data_type; | ||
54 | }; | ||
55 | |||
56 | struct uvc_xu_control { | ||
57 | __u8 unit; | ||
58 | __u8 selector; | ||
59 | __u16 size; | ||
60 | __u8 __user *data; | ||
61 | }; | ||
62 | |||
63 | #define UVCIOC_CTRL_ADD _IOW('U', 1, struct uvc_xu_control_info) | ||
64 | #define UVCIOC_CTRL_MAP _IOWR('U', 2, struct uvc_xu_control_mapping) | ||
65 | #define UVCIOC_CTRL_GET _IOWR('U', 3, struct uvc_xu_control) | ||
66 | #define UVCIOC_CTRL_SET _IOW('U', 4, struct uvc_xu_control) | ||
67 | |||
68 | #ifdef __KERNEL__ | ||
69 | |||
70 | #include <linux/poll.h> | ||
71 | |||
72 | /* -------------------------------------------------------------------------- | ||
73 | * UVC constants | ||
74 | */ | ||
75 | |||
76 | #define SC_UNDEFINED 0x00 | ||
77 | #define SC_VIDEOCONTROL 0x01 | ||
78 | #define SC_VIDEOSTREAMING 0x02 | ||
79 | #define SC_VIDEO_INTERFACE_COLLECTION 0x03 | ||
80 | |||
81 | #define PC_PROTOCOL_UNDEFINED 0x00 | ||
82 | |||
83 | #define CS_UNDEFINED 0x20 | ||
84 | #define CS_DEVICE 0x21 | ||
85 | #define CS_CONFIGURATION 0x22 | ||
86 | #define CS_STRING 0x23 | ||
87 | #define CS_INTERFACE 0x24 | ||
88 | #define CS_ENDPOINT 0x25 | ||
89 | |||
90 | /* VideoControl class specific interface descriptor */ | ||
91 | #define VC_DESCRIPTOR_UNDEFINED 0x00 | ||
92 | #define VC_HEADER 0x01 | ||
93 | #define VC_INPUT_TERMINAL 0x02 | ||
94 | #define VC_OUTPUT_TERMINAL 0x03 | ||
95 | #define VC_SELECTOR_UNIT 0x04 | ||
96 | #define VC_PROCESSING_UNIT 0x05 | ||
97 | #define VC_EXTENSION_UNIT 0x06 | ||
98 | |||
99 | /* VideoStreaming class specific interface descriptor */ | ||
100 | #define VS_UNDEFINED 0x00 | ||
101 | #define VS_INPUT_HEADER 0x01 | ||
102 | #define VS_OUTPUT_HEADER 0x02 | ||
103 | #define VS_STILL_IMAGE_FRAME 0x03 | ||
104 | #define VS_FORMAT_UNCOMPRESSED 0x04 | ||
105 | #define VS_FRAME_UNCOMPRESSED 0x05 | ||
106 | #define VS_FORMAT_MJPEG 0x06 | ||
107 | #define VS_FRAME_MJPEG 0x07 | ||
108 | #define VS_FORMAT_MPEG2TS 0x0a | ||
109 | #define VS_FORMAT_DV 0x0c | ||
110 | #define VS_COLORFORMAT 0x0d | ||
111 | #define VS_FORMAT_FRAME_BASED 0x10 | ||
112 | #define VS_FRAME_FRAME_BASED 0x11 | ||
113 | #define VS_FORMAT_STREAM_BASED 0x12 | ||
114 | |||
115 | /* Endpoint type */ | ||
116 | #define EP_UNDEFINED 0x00 | ||
117 | #define EP_GENERAL 0x01 | ||
118 | #define EP_ENDPOINT 0x02 | ||
119 | #define EP_INTERRUPT 0x03 | ||
120 | |||
121 | /* Request codes */ | ||
122 | #define RC_UNDEFINED 0x00 | ||
123 | #define SET_CUR 0x01 | ||
124 | #define GET_CUR 0x81 | ||
125 | #define GET_MIN 0x82 | ||
126 | #define GET_MAX 0x83 | ||
127 | #define GET_RES 0x84 | ||
128 | #define GET_LEN 0x85 | ||
129 | #define GET_INFO 0x86 | ||
130 | #define GET_DEF 0x87 | ||
131 | |||
132 | /* VideoControl interface controls */ | ||
133 | #define VC_CONTROL_UNDEFINED 0x00 | ||
134 | #define VC_VIDEO_POWER_MODE_CONTROL 0x01 | ||
135 | #define VC_REQUEST_ERROR_CODE_CONTROL 0x02 | ||
136 | |||
137 | /* Terminal controls */ | ||
138 | #define TE_CONTROL_UNDEFINED 0x00 | ||
139 | |||
140 | /* Selector Unit controls */ | ||
141 | #define SU_CONTROL_UNDEFINED 0x00 | ||
142 | #define SU_INPUT_SELECT_CONTROL 0x01 | ||
143 | |||
144 | /* Camera Terminal controls */ | ||
145 | #define CT_CONTROL_UNDEFINED 0x00 | ||
146 | #define CT_SCANNING_MODE_CONTROL 0x01 | ||
147 | #define CT_AE_MODE_CONTROL 0x02 | ||
148 | #define CT_AE_PRIORITY_CONTROL 0x03 | ||
149 | #define CT_EXPOSURE_TIME_ABSOLUTE_CONTROL 0x04 | ||
150 | #define CT_EXPOSURE_TIME_RELATIVE_CONTROL 0x05 | ||
151 | #define CT_FOCUS_ABSOLUTE_CONTROL 0x06 | ||
152 | #define CT_FOCUS_RELATIVE_CONTROL 0x07 | ||
153 | #define CT_FOCUS_AUTO_CONTROL 0x08 | ||
154 | #define CT_IRIS_ABSOLUTE_CONTROL 0x09 | ||
155 | #define CT_IRIS_RELATIVE_CONTROL 0x0a | ||
156 | #define CT_ZOOM_ABSOLUTE_CONTROL 0x0b | ||
157 | #define CT_ZOOM_RELATIVE_CONTROL 0x0c | ||
158 | #define CT_PANTILT_ABSOLUTE_CONTROL 0x0d | ||
159 | #define CT_PANTILT_RELATIVE_CONTROL 0x0e | ||
160 | #define CT_ROLL_ABSOLUTE_CONTROL 0x0f | ||
161 | #define CT_ROLL_RELATIVE_CONTROL 0x10 | ||
162 | #define CT_PRIVACY_CONTROL 0x11 | ||
163 | |||
164 | /* Processing Unit controls */ | ||
165 | #define PU_CONTROL_UNDEFINED 0x00 | ||
166 | #define PU_BACKLIGHT_COMPENSATION_CONTROL 0x01 | ||
167 | #define PU_BRIGHTNESS_CONTROL 0x02 | ||
168 | #define PU_CONTRAST_CONTROL 0x03 | ||
169 | #define PU_GAIN_CONTROL 0x04 | ||
170 | #define PU_POWER_LINE_FREQUENCY_CONTROL 0x05 | ||
171 | #define PU_HUE_CONTROL 0x06 | ||
172 | #define PU_SATURATION_CONTROL 0x07 | ||
173 | #define PU_SHARPNESS_CONTROL 0x08 | ||
174 | #define PU_GAMMA_CONTROL 0x09 | ||
175 | #define PU_WHITE_BALANCE_TEMPERATURE_CONTROL 0x0a | ||
176 | #define PU_WHITE_BALANCE_TEMPERATURE_AUTO_CONTROL 0x0b | ||
177 | #define PU_WHITE_BALANCE_COMPONENT_CONTROL 0x0c | ||
178 | #define PU_WHITE_BALANCE_COMPONENT_AUTO_CONTROL 0x0d | ||
179 | #define PU_DIGITAL_MULTIPLIER_CONTROL 0x0e | ||
180 | #define PU_DIGITAL_MULTIPLIER_LIMIT_CONTROL 0x0f | ||
181 | #define PU_HUE_AUTO_CONTROL 0x10 | ||
182 | #define PU_ANALOG_VIDEO_STANDARD_CONTROL 0x11 | ||
183 | #define PU_ANALOG_LOCK_STATUS_CONTROL 0x12 | ||
184 | |||
185 | #define LXU_MOTOR_PANTILT_RELATIVE_CONTROL 0x01 | ||
186 | #define LXU_MOTOR_PANTILT_RESET_CONTROL 0x02 | ||
187 | #define LXU_MOTOR_FOCUS_MOTOR_CONTROL 0x03 | ||
188 | |||
189 | /* VideoStreaming interface controls */ | ||
190 | #define VS_CONTROL_UNDEFINED 0x00 | ||
191 | #define VS_PROBE_CONTROL 0x01 | ||
192 | #define VS_COMMIT_CONTROL 0x02 | ||
193 | #define VS_STILL_PROBE_CONTROL 0x03 | ||
194 | #define VS_STILL_COMMIT_CONTROL 0x04 | ||
195 | #define VS_STILL_IMAGE_TRIGGER_CONTROL 0x05 | ||
196 | #define VS_STREAM_ERROR_CODE_CONTROL 0x06 | ||
197 | #define VS_GENERATE_KEY_FRAME_CONTROL 0x07 | ||
198 | #define VS_UPDATE_FRAME_SEGMENT_CONTROL 0x08 | ||
199 | #define VS_SYNC_DELAY_CONTROL 0x09 | ||
200 | |||
201 | #define TT_VENDOR_SPECIFIC 0x0100 | ||
202 | #define TT_STREAMING 0x0101 | ||
203 | |||
204 | /* Input Terminal types */ | ||
205 | #define ITT_VENDOR_SPECIFIC 0x0200 | ||
206 | #define ITT_CAMERA 0x0201 | ||
207 | #define ITT_MEDIA_TRANSPORT_INPUT 0x0202 | ||
208 | |||
209 | /* Output Terminal types */ | ||
210 | #define OTT_VENDOR_SPECIFIC 0x0300 | ||
211 | #define OTT_DISPLAY 0x0301 | ||
212 | #define OTT_MEDIA_TRANSPORT_OUTPUT 0x0302 | ||
213 | |||
214 | /* External Terminal types */ | ||
215 | #define EXTERNAL_VENDOR_SPECIFIC 0x0400 | ||
216 | #define COMPOSITE_CONNECTOR 0x0401 | ||
217 | #define SVIDEO_CONNECTOR 0x0402 | ||
218 | #define COMPONENT_CONNECTOR 0x0403 | ||
219 | |||
220 | #define UVC_TERM_INPUT 0x0000 | ||
221 | #define UVC_TERM_OUTPUT 0x8000 | ||
222 | |||
223 | #define UVC_ENTITY_TYPE(entity) ((entity)->type & 0x7fff) | ||
224 | #define UVC_ENTITY_IS_UNIT(entity) (((entity)->type & 0xff00) == 0) | ||
225 | #define UVC_ENTITY_IS_TERM(entity) (((entity)->type & 0xff00) != 0) | ||
226 | #define UVC_ENTITY_IS_ITERM(entity) \ | ||
227 | (((entity)->type & 0x8000) == UVC_TERM_INPUT) | ||
228 | #define UVC_ENTITY_IS_OTERM(entity) \ | ||
229 | (((entity)->type & 0x8000) == UVC_TERM_OUTPUT) | ||
230 | |||
231 | #define UVC_STATUS_TYPE_CONTROL 1 | ||
232 | #define UVC_STATUS_TYPE_STREAMING 2 | ||
233 | |||
234 | /* ------------------------------------------------------------------------ | ||
235 | * GUIDs | ||
236 | */ | ||
237 | #define UVC_GUID_UVC_CAMERA \ | ||
238 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ | ||
239 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01} | ||
240 | #define UVC_GUID_UVC_OUTPUT \ | ||
241 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ | ||
242 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02} | ||
243 | #define UVC_GUID_UVC_MEDIA_TRANSPORT_INPUT \ | ||
244 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ | ||
245 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03} | ||
246 | #define UVC_GUID_UVC_PROCESSING \ | ||
247 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ | ||
248 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x01} | ||
249 | #define UVC_GUID_UVC_SELECTOR \ | ||
250 | {0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, \ | ||
251 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x02} | ||
252 | |||
253 | #define UVC_GUID_LOGITECH_DEV_INFO \ | ||
254 | {0x82, 0x06, 0x61, 0x63, 0x70, 0x50, 0xab, 0x49, \ | ||
255 | 0xb8, 0xcc, 0xb3, 0x85, 0x5e, 0x8d, 0x22, 0x1e} | ||
256 | #define UVC_GUID_LOGITECH_USER_HW \ | ||
257 | {0x82, 0x06, 0x61, 0x63, 0x70, 0x50, 0xab, 0x49, \ | ||
258 | 0xb8, 0xcc, 0xb3, 0x85, 0x5e, 0x8d, 0x22, 0x1f} | ||
259 | #define UVC_GUID_LOGITECH_VIDEO \ | ||
260 | {0x82, 0x06, 0x61, 0x63, 0x70, 0x50, 0xab, 0x49, \ | ||
261 | 0xb8, 0xcc, 0xb3, 0x85, 0x5e, 0x8d, 0x22, 0x50} | ||
262 | #define UVC_GUID_LOGITECH_MOTOR \ | ||
263 | {0x82, 0x06, 0x61, 0x63, 0x70, 0x50, 0xab, 0x49, \ | ||
264 | 0xb8, 0xcc, 0xb3, 0x85, 0x5e, 0x8d, 0x22, 0x56} | ||
265 | |||
266 | #define UVC_GUID_FORMAT_MJPEG \ | ||
267 | { 'M', 'J', 'P', 'G', 0x00, 0x00, 0x10, 0x00, \ | ||
268 | 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} | ||
269 | #define UVC_GUID_FORMAT_YUY2 \ | ||
270 | { 'Y', 'U', 'Y', '2', 0x00, 0x00, 0x10, 0x00, \ | ||
271 | 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} | ||
272 | #define UVC_GUID_FORMAT_NV12 \ | ||
273 | { 'N', 'V', '1', '2', 0x00, 0x00, 0x10, 0x00, \ | ||
274 | 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} | ||
275 | #define UVC_GUID_FORMAT_YV12 \ | ||
276 | { 'Y', 'V', '1', '2', 0x00, 0x00, 0x10, 0x00, \ | ||
277 | 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} | ||
278 | #define UVC_GUID_FORMAT_I420 \ | ||
279 | { 'I', '4', '2', '0', 0x00, 0x00, 0x10, 0x00, \ | ||
280 | 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} | ||
281 | #define UVC_GUID_FORMAT_UYVY \ | ||
282 | { 'U', 'Y', 'V', 'Y', 0x00, 0x00, 0x10, 0x00, \ | ||
283 | 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} | ||
284 | #define UVC_GUID_FORMAT_Y800 \ | ||
285 | { 'Y', '8', '0', '0', 0x00, 0x00, 0x10, 0x00, \ | ||
286 | 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} | ||
287 | #define UVC_GUID_FORMAT_BY8 \ | ||
288 | { 'B', 'Y', '8', ' ', 0x00, 0x00, 0x10, 0x00, \ | ||
289 | 0x80, 0x00, 0x00, 0xaa, 0x00, 0x38, 0x9b, 0x71} | ||
290 | |||
291 | |||
292 | /* ------------------------------------------------------------------------ | ||
293 | * Driver specific constants. | ||
294 | */ | ||
295 | |||
296 | #define DRIVER_VERSION_NUMBER KERNEL_VERSION(0, 1, 0) | ||
297 | |||
298 | /* Number of isochronous URBs. */ | ||
299 | #define UVC_URBS 5 | ||
300 | /* Maximum number of packets per isochronous URB. */ | ||
301 | #define UVC_MAX_ISO_PACKETS 40 | ||
302 | /* Maximum frame size in bytes, for sanity checking. */ | ||
303 | #define UVC_MAX_FRAME_SIZE (16*1024*1024) | ||
304 | /* Maximum number of video buffers. */ | ||
305 | #define UVC_MAX_VIDEO_BUFFERS 32 | ||
306 | |||
307 | #define UVC_CTRL_CONTROL_TIMEOUT 300 | ||
308 | #define UVC_CTRL_STREAMING_TIMEOUT 1000 | ||
309 | |||
310 | /* Devices quirks */ | ||
311 | #define UVC_QUIRK_STATUS_INTERVAL 0x00000001 | ||
312 | #define UVC_QUIRK_PROBE_MINMAX 0x00000002 | ||
313 | #define UVC_QUIRK_PROBE_EXTRAFIELDS 0x00000004 | ||
314 | #define UVC_QUIRK_BUILTIN_ISIGHT 0x00000008 | ||
315 | #define UVC_QUIRK_STREAM_NO_FID 0x00000010 | ||
316 | #define UVC_QUIRK_IGNORE_SELECTOR_UNIT 0x00000020 | ||
317 | |||
318 | /* Format flags */ | ||
319 | #define UVC_FMT_FLAG_COMPRESSED 0x00000001 | ||
320 | #define UVC_FMT_FLAG_STREAM 0x00000002 | ||
321 | |||
322 | /* ------------------------------------------------------------------------ | ||
323 | * Structures. | ||
324 | */ | ||
325 | |||
326 | struct uvc_device; | ||
327 | |||
328 | /* TODO: Put the most frequently accessed fields at the beginning of | ||
329 | * structures to maximize cache efficiency. | ||
330 | */ | ||
331 | struct uvc_streaming_control { | ||
332 | __u16 bmHint; | ||
333 | __u8 bFormatIndex; | ||
334 | __u8 bFrameIndex; | ||
335 | __u32 dwFrameInterval; | ||
336 | __u16 wKeyFrameRate; | ||
337 | __u16 wPFrameRate; | ||
338 | __u16 wCompQuality; | ||
339 | __u16 wCompWindowSize; | ||
340 | __u16 wDelay; | ||
341 | __u32 dwMaxVideoFrameSize; | ||
342 | __u32 dwMaxPayloadTransferSize; | ||
343 | __u32 dwClockFrequency; | ||
344 | __u8 bmFramingInfo; | ||
345 | __u8 bPreferedVersion; | ||
346 | __u8 bMinVersion; | ||
347 | __u8 bMaxVersion; | ||
348 | }; | ||
349 | |||
350 | struct uvc_menu_info { | ||
351 | __u32 value; | ||
352 | __u8 name[32]; | ||
353 | }; | ||
354 | |||
355 | struct uvc_control_info { | ||
356 | struct list_head list; | ||
357 | struct list_head mappings; | ||
358 | |||
359 | __u8 entity[16]; | ||
360 | __u8 index; | ||
361 | __u8 selector; | ||
362 | |||
363 | __u16 size; | ||
364 | __u32 flags; | ||
365 | }; | ||
366 | |||
367 | struct uvc_control_mapping { | ||
368 | struct list_head list; | ||
369 | |||
370 | struct uvc_control_info *ctrl; | ||
371 | |||
372 | __u32 id; | ||
373 | __u8 name[32]; | ||
374 | __u8 entity[16]; | ||
375 | __u8 selector; | ||
376 | |||
377 | __u8 size; | ||
378 | __u8 offset; | ||
379 | enum v4l2_ctrl_type v4l2_type; | ||
380 | __u32 data_type; | ||
381 | |||
382 | struct uvc_menu_info *menu_info; | ||
383 | __u32 menu_count; | ||
384 | }; | ||
385 | |||
386 | struct uvc_control { | ||
387 | struct uvc_entity *entity; | ||
388 | struct uvc_control_info *info; | ||
389 | |||
390 | __u8 index; /* Used to match the uvc_control entry with a | ||
391 | uvc_control_info. */ | ||
392 | __u8 dirty : 1, | ||
393 | loaded : 1, | ||
394 | modified : 1; | ||
395 | |||
396 | __u8 *data; | ||
397 | }; | ||
398 | |||
399 | struct uvc_format_desc { | ||
400 | char *name; | ||
401 | __u8 guid[16]; | ||
402 | __u32 fcc; | ||
403 | }; | ||
404 | |||
405 | /* The term 'entity' refers to both UVC units and UVC terminals. | ||
406 | * | ||
407 | * The type field is either the terminal type (wTerminalType in the terminal | ||
408 | * descriptor), or the unit type (bDescriptorSubtype in the unit descriptor). | ||
409 | * As the bDescriptorSubtype field is one byte long, the type value will | ||
410 | * always have a null MSB for units. All terminal types defined by the UVC | ||
411 | * specification have a non-null MSB, so it is safe to use the MSB to | ||
412 | * differentiate between units and terminals as long as the descriptor parsing | ||
413 | * code makes sure terminal types have a non-null MSB. | ||
414 | * | ||
415 | * For terminals, the type's most significant bit stores the terminal | ||
416 | * direction (either UVC_TERM_INPUT or UVC_TERM_OUTPUT). The type field should | ||
417 | * always be accessed with the UVC_ENTITY_* macros and never directly. | ||
418 | */ | ||
419 | |||
420 | struct uvc_entity { | ||
421 | struct list_head list; /* Entity as part of a UVC device. */ | ||
422 | struct list_head chain; /* Entity as part of a video device | ||
423 | * chain. */ | ||
424 | __u8 id; | ||
425 | __u16 type; | ||
426 | char name[64]; | ||
427 | |||
428 | union { | ||
429 | struct { | ||
430 | __u16 wObjectiveFocalLengthMin; | ||
431 | __u16 wObjectiveFocalLengthMax; | ||
432 | __u16 wOcularFocalLength; | ||
433 | __u8 bControlSize; | ||
434 | __u8 *bmControls; | ||
435 | } camera; | ||
436 | |||
437 | struct { | ||
438 | __u8 bControlSize; | ||
439 | __u8 *bmControls; | ||
440 | __u8 bTransportModeSize; | ||
441 | __u8 *bmTransportModes; | ||
442 | } media; | ||
443 | |||
444 | struct { | ||
445 | __u8 bSourceID; | ||
446 | } output; | ||
447 | |||
448 | struct { | ||
449 | __u8 bSourceID; | ||
450 | __u16 wMaxMultiplier; | ||
451 | __u8 bControlSize; | ||
452 | __u8 *bmControls; | ||
453 | __u8 bmVideoStandards; | ||
454 | } processing; | ||
455 | |||
456 | struct { | ||
457 | __u8 bNrInPins; | ||
458 | __u8 *baSourceID; | ||
459 | } selector; | ||
460 | |||
461 | struct { | ||
462 | __u8 guidExtensionCode[16]; | ||
463 | __u8 bNumControls; | ||
464 | __u8 bNrInPins; | ||
465 | __u8 *baSourceID; | ||
466 | __u8 bControlSize; | ||
467 | __u8 *bmControls; | ||
468 | __u8 *bmControlsType; | ||
469 | } extension; | ||
470 | }; | ||
471 | |||
472 | unsigned int ncontrols; | ||
473 | struct uvc_control *controls; | ||
474 | }; | ||
475 | |||
476 | struct uvc_frame { | ||
477 | __u8 bFrameIndex; | ||
478 | __u8 bmCapabilities; | ||
479 | __u16 wWidth; | ||
480 | __u16 wHeight; | ||
481 | __u32 dwMinBitRate; | ||
482 | __u32 dwMaxBitRate; | ||
483 | __u32 dwMaxVideoFrameBufferSize; | ||
484 | __u8 bFrameIntervalType; | ||
485 | __u32 dwDefaultFrameInterval; | ||
486 | __u32 *dwFrameInterval; | ||
487 | }; | ||
488 | |||
489 | struct uvc_format { | ||
490 | __u8 type; | ||
491 | __u8 index; | ||
492 | __u8 bpp; | ||
493 | __u8 colorspace; | ||
494 | __u32 fcc; | ||
495 | __u32 flags; | ||
496 | |||
497 | char name[32]; | ||
498 | |||
499 | unsigned int nframes; | ||
500 | struct uvc_frame *frame; | ||
501 | }; | ||
502 | |||
503 | struct uvc_streaming_header { | ||
504 | __u8 bNumFormats; | ||
505 | __u8 bEndpointAddress; | ||
506 | __u8 bTerminalLink; | ||
507 | __u8 bControlSize; | ||
508 | __u8 *bmaControls; | ||
509 | /* The following fields are used by input headers only. */ | ||
510 | __u8 bmInfo; | ||
511 | __u8 bStillCaptureMethod; | ||
512 | __u8 bTriggerSupport; | ||
513 | __u8 bTriggerUsage; | ||
514 | }; | ||
515 | |||
516 | struct uvc_streaming { | ||
517 | struct list_head list; | ||
518 | |||
519 | struct usb_interface *intf; | ||
520 | int intfnum; | ||
521 | __u16 maxpsize; | ||
522 | |||
523 | struct uvc_streaming_header header; | ||
524 | |||
525 | unsigned int nformats; | ||
526 | struct uvc_format *format; | ||
527 | |||
528 | struct uvc_streaming_control ctrl; | ||
529 | struct uvc_format *cur_format; | ||
530 | struct uvc_frame *cur_frame; | ||
531 | |||
532 | struct mutex mutex; | ||
533 | }; | ||
534 | |||
535 | enum uvc_buffer_state { | ||
536 | UVC_BUF_STATE_IDLE = 0, | ||
537 | UVC_BUF_STATE_QUEUED = 1, | ||
538 | UVC_BUF_STATE_ACTIVE = 2, | ||
539 | UVC_BUF_STATE_DONE = 3, | ||
540 | UVC_BUF_STATE_ERROR = 4, | ||
541 | }; | ||
542 | |||
543 | struct uvc_buffer { | ||
544 | unsigned long vma_use_count; | ||
545 | struct list_head stream; | ||
546 | |||
547 | /* Touched by interrupt handler. */ | ||
548 | struct v4l2_buffer buf; | ||
549 | struct list_head queue; | ||
550 | wait_queue_head_t wait; | ||
551 | enum uvc_buffer_state state; | ||
552 | }; | ||
553 | |||
554 | #define UVC_QUEUE_STREAMING (1 << 0) | ||
555 | #define UVC_QUEUE_DISCONNECTED (1 << 1) | ||
556 | #define UVC_QUEUE_DROP_INCOMPLETE (1 << 2) | ||
557 | |||
558 | struct uvc_video_queue { | ||
559 | void *mem; | ||
560 | unsigned int flags; | ||
561 | __u32 sequence; | ||
562 | |||
563 | unsigned int count; | ||
564 | unsigned int buf_size; | ||
565 | struct uvc_buffer buffer[UVC_MAX_VIDEO_BUFFERS]; | ||
566 | struct mutex mutex; /* protects buffers and mainqueue */ | ||
567 | spinlock_t irqlock; /* protects irqqueue */ | ||
568 | |||
569 | struct list_head mainqueue; | ||
570 | struct list_head irqqueue; | ||
571 | }; | ||
572 | |||
573 | struct uvc_video_device { | ||
574 | struct uvc_device *dev; | ||
575 | struct video_device *vdev; | ||
576 | atomic_t active; | ||
577 | unsigned int frozen : 1; | ||
578 | |||
579 | struct list_head iterms; | ||
580 | struct uvc_entity *oterm; | ||
581 | struct uvc_entity *processing; | ||
582 | struct uvc_entity *selector; | ||
583 | struct list_head extensions; | ||
584 | struct mutex ctrl_mutex; | ||
585 | |||
586 | struct uvc_video_queue queue; | ||
587 | |||
588 | /* Video streaming object, must always be non-NULL. */ | ||
589 | struct uvc_streaming *streaming; | ||
590 | |||
591 | void (*decode) (struct urb *urb, struct uvc_video_device *video, | ||
592 | struct uvc_buffer *buf); | ||
593 | |||
594 | /* Context data used by the bulk completion handler. */ | ||
595 | struct { | ||
596 | __u8 header[256]; | ||
597 | unsigned int header_size; | ||
598 | int skip_payload; | ||
599 | __u32 payload_size; | ||
600 | __u32 max_payload_size; | ||
601 | } bulk; | ||
602 | |||
603 | struct urb *urb[UVC_URBS]; | ||
604 | char *urb_buffer[UVC_URBS]; | ||
605 | |||
606 | __u8 last_fid; | ||
607 | }; | ||
608 | |||
609 | enum uvc_device_state { | ||
610 | UVC_DEV_DISCONNECTED = 1, | ||
611 | }; | ||
612 | |||
613 | struct uvc_device { | ||
614 | struct usb_device *udev; | ||
615 | struct usb_interface *intf; | ||
616 | __u32 quirks; | ||
617 | int intfnum; | ||
618 | char name[32]; | ||
619 | |||
620 | enum uvc_device_state state; | ||
621 | struct kref kref; | ||
622 | struct list_head list; | ||
623 | |||
624 | /* Video control interface */ | ||
625 | __u16 uvc_version; | ||
626 | __u32 clock_frequency; | ||
627 | |||
628 | struct list_head entities; | ||
629 | |||
630 | struct uvc_video_device video; | ||
631 | |||
632 | /* Status Interrupt Endpoint */ | ||
633 | struct usb_host_endpoint *int_ep; | ||
634 | struct urb *int_urb; | ||
635 | __u8 status[16]; | ||
636 | struct input_dev *input; | ||
637 | |||
638 | /* Video Streaming interfaces */ | ||
639 | struct list_head streaming; | ||
640 | }; | ||
641 | |||
642 | enum uvc_handle_state { | ||
643 | UVC_HANDLE_PASSIVE = 0, | ||
644 | UVC_HANDLE_ACTIVE = 1, | ||
645 | }; | ||
646 | |||
647 | struct uvc_fh { | ||
648 | struct uvc_video_device *device; | ||
649 | enum uvc_handle_state state; | ||
650 | }; | ||
651 | |||
652 | struct uvc_driver { | ||
653 | struct usb_driver driver; | ||
654 | |||
655 | struct mutex open_mutex; /* protects from open/disconnect race */ | ||
656 | |||
657 | struct list_head devices; /* struct uvc_device list */ | ||
658 | struct list_head controls; /* struct uvc_control_info list */ | ||
659 | struct mutex ctrl_mutex; /* protects controls and devices | ||
660 | lists */ | ||
661 | }; | ||
662 | |||
663 | /* ------------------------------------------------------------------------ | ||
664 | * Debugging, printing and logging | ||
665 | */ | ||
666 | |||
667 | #define UVC_TRACE_PROBE (1 << 0) | ||
668 | #define UVC_TRACE_DESCR (1 << 1) | ||
669 | #define UVC_TRACE_CONTROL (1 << 2) | ||
670 | #define UVC_TRACE_FORMAT (1 << 3) | ||
671 | #define UVC_TRACE_CAPTURE (1 << 4) | ||
672 | #define UVC_TRACE_CALLS (1 << 5) | ||
673 | #define UVC_TRACE_IOCTL (1 << 6) | ||
674 | #define UVC_TRACE_FRAME (1 << 7) | ||
675 | #define UVC_TRACE_SUSPEND (1 << 8) | ||
676 | #define UVC_TRACE_STATUS (1 << 9) | ||
677 | |||
678 | extern unsigned int uvc_trace_param; | ||
679 | |||
680 | #define uvc_trace(flag, msg...) \ | ||
681 | do { \ | ||
682 | if (uvc_trace_param & flag) \ | ||
683 | printk(KERN_DEBUG "uvcvideo: " msg); \ | ||
684 | } while (0) | ||
685 | |||
686 | #define uvc_printk(level, msg...) \ | ||
687 | printk(level "uvcvideo: " msg) | ||
688 | |||
689 | #define UVC_GUID_FORMAT "%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-" \ | ||
690 | "%02x%02x%02x%02x%02x%02x" | ||
691 | #define UVC_GUID_ARGS(guid) \ | ||
692 | (guid)[3], (guid)[2], (guid)[1], (guid)[0], \ | ||
693 | (guid)[5], (guid)[4], \ | ||
694 | (guid)[7], (guid)[6], \ | ||
695 | (guid)[8], (guid)[9], \ | ||
696 | (guid)[10], (guid)[11], (guid)[12], \ | ||
697 | (guid)[13], (guid)[14], (guid)[15] | ||
698 | |||
699 | /* -------------------------------------------------------------------------- | ||
700 | * Internal functions. | ||
701 | */ | ||
702 | |||
703 | /* Core driver */ | ||
704 | extern struct uvc_driver uvc_driver; | ||
705 | extern void uvc_delete(struct kref *kref); | ||
706 | |||
707 | /* Video buffers queue management. */ | ||
708 | extern void uvc_queue_init(struct uvc_video_queue *queue); | ||
709 | extern int uvc_alloc_buffers(struct uvc_video_queue *queue, | ||
710 | unsigned int nbuffers, unsigned int buflength); | ||
711 | extern int uvc_free_buffers(struct uvc_video_queue *queue); | ||
712 | extern int uvc_query_buffer(struct uvc_video_queue *queue, | ||
713 | struct v4l2_buffer *v4l2_buf); | ||
714 | extern int uvc_queue_buffer(struct uvc_video_queue *queue, | ||
715 | struct v4l2_buffer *v4l2_buf); | ||
716 | extern int uvc_dequeue_buffer(struct uvc_video_queue *queue, | ||
717 | struct v4l2_buffer *v4l2_buf, int nonblocking); | ||
718 | extern int uvc_queue_enable(struct uvc_video_queue *queue, int enable); | ||
719 | extern void uvc_queue_cancel(struct uvc_video_queue *queue, int disconnect); | ||
720 | extern struct uvc_buffer *uvc_queue_next_buffer(struct uvc_video_queue *queue, | ||
721 | struct uvc_buffer *buf); | ||
722 | extern unsigned int uvc_queue_poll(struct uvc_video_queue *queue, | ||
723 | struct file *file, poll_table *wait); | ||
724 | static inline int uvc_queue_streaming(struct uvc_video_queue *queue) | ||
725 | { | ||
726 | return queue->flags & UVC_QUEUE_STREAMING; | ||
727 | } | ||
728 | |||
729 | /* V4L2 interface */ | ||
730 | extern struct file_operations uvc_fops; | ||
731 | |||
732 | /* Video */ | ||
733 | extern int uvc_video_init(struct uvc_video_device *video); | ||
734 | extern int uvc_video_suspend(struct uvc_video_device *video); | ||
735 | extern int uvc_video_resume(struct uvc_video_device *video); | ||
736 | extern int uvc_video_enable(struct uvc_video_device *video, int enable); | ||
737 | extern int uvc_probe_video(struct uvc_video_device *video, | ||
738 | struct uvc_streaming_control *probe); | ||
739 | extern int uvc_query_ctrl(struct uvc_device *dev, __u8 query, __u8 unit, | ||
740 | __u8 intfnum, __u8 cs, void *data, __u16 size); | ||
741 | extern int uvc_set_video_ctrl(struct uvc_video_device *video, | ||
742 | struct uvc_streaming_control *ctrl, int probe); | ||
743 | |||
744 | /* Status */ | ||
745 | extern int uvc_status_init(struct uvc_device *dev); | ||
746 | extern void uvc_status_cleanup(struct uvc_device *dev); | ||
747 | extern int uvc_status_suspend(struct uvc_device *dev); | ||
748 | extern int uvc_status_resume(struct uvc_device *dev); | ||
749 | |||
750 | /* Controls */ | ||
751 | extern struct uvc_control *uvc_find_control(struct uvc_video_device *video, | ||
752 | __u32 v4l2_id, struct uvc_control_mapping **mapping); | ||
753 | extern int uvc_query_v4l2_ctrl(struct uvc_video_device *video, | ||
754 | struct v4l2_queryctrl *v4l2_ctrl); | ||
755 | |||
756 | extern int uvc_ctrl_add_info(struct uvc_control_info *info); | ||
757 | extern int uvc_ctrl_add_mapping(struct uvc_control_mapping *mapping); | ||
758 | extern int uvc_ctrl_init_device(struct uvc_device *dev); | ||
759 | extern void uvc_ctrl_cleanup_device(struct uvc_device *dev); | ||
760 | extern int uvc_ctrl_resume_device(struct uvc_device *dev); | ||
761 | extern void uvc_ctrl_init(void); | ||
762 | |||
763 | extern int uvc_ctrl_begin(struct uvc_video_device *video); | ||
764 | extern int __uvc_ctrl_commit(struct uvc_video_device *video, int rollback); | ||
765 | static inline int uvc_ctrl_commit(struct uvc_video_device *video) | ||
766 | { | ||
767 | return __uvc_ctrl_commit(video, 0); | ||
768 | } | ||
769 | static inline int uvc_ctrl_rollback(struct uvc_video_device *video) | ||
770 | { | ||
771 | return __uvc_ctrl_commit(video, 1); | ||
772 | } | ||
773 | |||
774 | extern int uvc_ctrl_get(struct uvc_video_device *video, | ||
775 | struct v4l2_ext_control *xctrl); | ||
776 | extern int uvc_ctrl_set(struct uvc_video_device *video, | ||
777 | struct v4l2_ext_control *xctrl); | ||
778 | |||
779 | extern int uvc_xu_ctrl_query(struct uvc_video_device *video, | ||
780 | struct uvc_xu_control *ctrl, int set); | ||
781 | |||
782 | /* Utility functions */ | ||
783 | extern void uvc_simplify_fraction(uint32_t *numerator, uint32_t *denominator, | ||
784 | unsigned int n_terms, unsigned int threshold); | ||
785 | extern uint32_t uvc_fraction_to_interval(uint32_t numerator, | ||
786 | uint32_t denominator); | ||
787 | extern struct usb_host_endpoint *uvc_find_endpoint( | ||
788 | struct usb_host_interface *alts, __u8 epaddr); | ||
789 | |||
790 | /* Quirks support */ | ||
791 | void uvc_video_decode_isight(struct urb *urb, struct uvc_video_device *video, | ||
792 | struct uvc_buffer *buf); | ||
793 | |||
794 | #endif /* __KERNEL__ */ | ||
795 | |||
796 | #endif | ||
diff --git a/drivers/media/video/videodev.c b/drivers/media/video/videodev.c index 31e8af0ba278..67a661cf5219 100644 --- a/drivers/media/video/videodev.c +++ b/drivers/media/video/videodev.c | |||
@@ -51,12 +51,51 @@ | |||
51 | #define VIDEO_NUM_DEVICES 256 | 51 | #define VIDEO_NUM_DEVICES 256 |
52 | #define VIDEO_NAME "video4linux" | 52 | #define VIDEO_NAME "video4linux" |
53 | 53 | ||
54 | struct std_descr { | ||
55 | v4l2_std_id std; | ||
56 | const char *descr; | ||
57 | }; | ||
58 | |||
59 | static const struct std_descr standards[] = { | ||
60 | { V4L2_STD_NTSC, "NTSC" }, | ||
61 | { V4L2_STD_NTSC_M, "NTSC-M" }, | ||
62 | { V4L2_STD_NTSC_M_JP, "NTSC-M-JP" }, | ||
63 | { V4L2_STD_NTSC_M_KR, "NTSC-M-KR" }, | ||
64 | { V4L2_STD_NTSC_443, "NTSC-443" }, | ||
65 | { V4L2_STD_PAL, "PAL" }, | ||
66 | { V4L2_STD_PAL_BG, "PAL-BG" }, | ||
67 | { V4L2_STD_PAL_B, "PAL-B" }, | ||
68 | { V4L2_STD_PAL_B1, "PAL-B1" }, | ||
69 | { V4L2_STD_PAL_G, "PAL-G" }, | ||
70 | { V4L2_STD_PAL_H, "PAL-H" }, | ||
71 | { V4L2_STD_PAL_I, "PAL-I" }, | ||
72 | { V4L2_STD_PAL_DK, "PAL-DK" }, | ||
73 | { V4L2_STD_PAL_D, "PAL-D" }, | ||
74 | { V4L2_STD_PAL_D1, "PAL-D1" }, | ||
75 | { V4L2_STD_PAL_K, "PAL-K" }, | ||
76 | { V4L2_STD_PAL_M, "PAL-M" }, | ||
77 | { V4L2_STD_PAL_N, "PAL-N" }, | ||
78 | { V4L2_STD_PAL_Nc, "PAL-Nc" }, | ||
79 | { V4L2_STD_PAL_60, "PAL-60" }, | ||
80 | { V4L2_STD_SECAM, "SECAM" }, | ||
81 | { V4L2_STD_SECAM_B, "SECAM-B" }, | ||
82 | { V4L2_STD_SECAM_G, "SECAM-G" }, | ||
83 | { V4L2_STD_SECAM_H, "SECAM-H" }, | ||
84 | { V4L2_STD_SECAM_DK, "SECAM-DK" }, | ||
85 | { V4L2_STD_SECAM_D, "SECAM-D" }, | ||
86 | { V4L2_STD_SECAM_K, "SECAM-K" }, | ||
87 | { V4L2_STD_SECAM_K1, "SECAM-K1" }, | ||
88 | { V4L2_STD_SECAM_L, "SECAM-L" }, | ||
89 | { V4L2_STD_SECAM_LC, "SECAM-Lc" }, | ||
90 | { 0, "Unknown" } | ||
91 | }; | ||
92 | |||
54 | /* video4linux standard ID conversion to standard name | 93 | /* video4linux standard ID conversion to standard name |
55 | */ | 94 | */ |
56 | char *v4l2_norm_to_name(v4l2_std_id id) | 95 | const char *v4l2_norm_to_name(v4l2_std_id id) |
57 | { | 96 | { |
58 | char *name; | ||
59 | u32 myid = id; | 97 | u32 myid = id; |
98 | int i; | ||
60 | 99 | ||
61 | /* HACK: ppc32 architecture doesn't have __ucmpdi2 function to handle | 100 | /* HACK: ppc32 architecture doesn't have __ucmpdi2 function to handle |
62 | 64 bit comparations. So, on that architecture, with some gcc | 101 | 64 bit comparations. So, on that architecture, with some gcc |
@@ -64,110 +103,17 @@ char *v4l2_norm_to_name(v4l2_std_id id) | |||
64 | */ | 103 | */ |
65 | BUG_ON(myid != id); | 104 | BUG_ON(myid != id); |
66 | 105 | ||
67 | switch (myid) { | 106 | for (i = 0; standards[i].std; i++) |
68 | case V4L2_STD_PAL: | 107 | if (myid == standards[i].std) |
69 | name = "PAL"; | 108 | break; |
70 | break; | 109 | return standards[i].descr; |
71 | case V4L2_STD_PAL_BG: | ||
72 | name = "PAL-BG"; | ||
73 | break; | ||
74 | case V4L2_STD_PAL_DK: | ||
75 | name = "PAL-DK"; | ||
76 | break; | ||
77 | case V4L2_STD_PAL_B: | ||
78 | name = "PAL-B"; | ||
79 | break; | ||
80 | case V4L2_STD_PAL_B1: | ||
81 | name = "PAL-B1"; | ||
82 | break; | ||
83 | case V4L2_STD_PAL_G: | ||
84 | name = "PAL-G"; | ||
85 | break; | ||
86 | case V4L2_STD_PAL_H: | ||
87 | name = "PAL-H"; | ||
88 | break; | ||
89 | case V4L2_STD_PAL_I: | ||
90 | name = "PAL-I"; | ||
91 | break; | ||
92 | case V4L2_STD_PAL_D: | ||
93 | name = "PAL-D"; | ||
94 | break; | ||
95 | case V4L2_STD_PAL_D1: | ||
96 | name = "PAL-D1"; | ||
97 | break; | ||
98 | case V4L2_STD_PAL_K: | ||
99 | name = "PAL-K"; | ||
100 | break; | ||
101 | case V4L2_STD_PAL_M: | ||
102 | name = "PAL-M"; | ||
103 | break; | ||
104 | case V4L2_STD_PAL_N: | ||
105 | name = "PAL-N"; | ||
106 | break; | ||
107 | case V4L2_STD_PAL_Nc: | ||
108 | name = "PAL-Nc"; | ||
109 | break; | ||
110 | case V4L2_STD_PAL_60: | ||
111 | name = "PAL-60"; | ||
112 | break; | ||
113 | case V4L2_STD_NTSC: | ||
114 | name = "NTSC"; | ||
115 | break; | ||
116 | case V4L2_STD_NTSC_M: | ||
117 | name = "NTSC-M"; | ||
118 | break; | ||
119 | case V4L2_STD_NTSC_M_JP: | ||
120 | name = "NTSC-M-JP"; | ||
121 | break; | ||
122 | case V4L2_STD_NTSC_443: | ||
123 | name = "NTSC-443"; | ||
124 | break; | ||
125 | case V4L2_STD_NTSC_M_KR: | ||
126 | name = "NTSC-M-KR"; | ||
127 | break; | ||
128 | case V4L2_STD_SECAM: | ||
129 | name = "SECAM"; | ||
130 | break; | ||
131 | case V4L2_STD_SECAM_DK: | ||
132 | name = "SECAM-DK"; | ||
133 | break; | ||
134 | case V4L2_STD_SECAM_B: | ||
135 | name = "SECAM-B"; | ||
136 | break; | ||
137 | case V4L2_STD_SECAM_D: | ||
138 | name = "SECAM-D"; | ||
139 | break; | ||
140 | case V4L2_STD_SECAM_G: | ||
141 | name = "SECAM-G"; | ||
142 | break; | ||
143 | case V4L2_STD_SECAM_H: | ||
144 | name = "SECAM-H"; | ||
145 | break; | ||
146 | case V4L2_STD_SECAM_K: | ||
147 | name = "SECAM-K"; | ||
148 | break; | ||
149 | case V4L2_STD_SECAM_K1: | ||
150 | name = "SECAM-K1"; | ||
151 | break; | ||
152 | case V4L2_STD_SECAM_L: | ||
153 | name = "SECAM-L"; | ||
154 | break; | ||
155 | case V4L2_STD_SECAM_LC: | ||
156 | name = "SECAM-LC"; | ||
157 | break; | ||
158 | default: | ||
159 | name = "Unknown"; | ||
160 | break; | ||
161 | } | ||
162 | |||
163 | return name; | ||
164 | } | 110 | } |
165 | EXPORT_SYMBOL(v4l2_norm_to_name); | 111 | EXPORT_SYMBOL(v4l2_norm_to_name); |
166 | 112 | ||
167 | /* Fill in the fields of a v4l2_standard structure according to the | 113 | /* Fill in the fields of a v4l2_standard structure according to the |
168 | 'id' and 'transmission' parameters. Returns negative on error. */ | 114 | 'id' and 'transmission' parameters. Returns negative on error. */ |
169 | int v4l2_video_std_construct(struct v4l2_standard *vs, | 115 | int v4l2_video_std_construct(struct v4l2_standard *vs, |
170 | int id, char *name) | 116 | int id, const char *name) |
171 | { | 117 | { |
172 | u32 index = vs->index; | 118 | u32 index = vs->index; |
173 | 119 | ||
@@ -1218,95 +1164,40 @@ static int __video_do_ioctl(struct inode *inode, struct file *file, | |||
1218 | case VIDIOC_ENUMSTD: | 1164 | case VIDIOC_ENUMSTD: |
1219 | { | 1165 | { |
1220 | struct v4l2_standard *p = arg; | 1166 | struct v4l2_standard *p = arg; |
1221 | v4l2_std_id id = vfd->tvnorms,curr_id=0; | 1167 | v4l2_std_id id = vfd->tvnorms, curr_id = 0; |
1222 | unsigned int index = p->index,i; | 1168 | unsigned int index = p->index, i, j = 0; |
1223 | 1169 | const char *descr = ""; | |
1224 | if (index<0) { | 1170 | |
1225 | ret=-EINVAL; | 1171 | /* Return norm array in a canonical way */ |
1226 | break; | 1172 | for (i = 0; i <= index && id; i++) { |
1227 | } | 1173 | /* last std value in the standards array is 0, so this |
1228 | 1174 | while always ends there since (id & 0) == 0. */ | |
1229 | /* Return norm array on a canonical way */ | 1175 | while ((id & standards[j].std) != standards[j].std) |
1230 | for (i=0;i<= index && id; i++) { | 1176 | j++; |
1231 | if ( (id & V4L2_STD_PAL) == V4L2_STD_PAL) { | 1177 | curr_id = standards[j].std; |
1232 | curr_id = V4L2_STD_PAL; | 1178 | descr = standards[j].descr; |
1233 | } else if ( (id & V4L2_STD_PAL_BG) == V4L2_STD_PAL_BG) { | 1179 | j++; |
1234 | curr_id = V4L2_STD_PAL_BG; | 1180 | if (curr_id == 0) |
1235 | } else if ( (id & V4L2_STD_PAL_DK) == V4L2_STD_PAL_DK) { | ||
1236 | curr_id = V4L2_STD_PAL_DK; | ||
1237 | } else if ( (id & V4L2_STD_PAL_B) == V4L2_STD_PAL_B) { | ||
1238 | curr_id = V4L2_STD_PAL_B; | ||
1239 | } else if ( (id & V4L2_STD_PAL_B1) == V4L2_STD_PAL_B1) { | ||
1240 | curr_id = V4L2_STD_PAL_B1; | ||
1241 | } else if ( (id & V4L2_STD_PAL_G) == V4L2_STD_PAL_G) { | ||
1242 | curr_id = V4L2_STD_PAL_G; | ||
1243 | } else if ( (id & V4L2_STD_PAL_H) == V4L2_STD_PAL_H) { | ||
1244 | curr_id = V4L2_STD_PAL_H; | ||
1245 | } else if ( (id & V4L2_STD_PAL_I) == V4L2_STD_PAL_I) { | ||
1246 | curr_id = V4L2_STD_PAL_I; | ||
1247 | } else if ( (id & V4L2_STD_PAL_D) == V4L2_STD_PAL_D) { | ||
1248 | curr_id = V4L2_STD_PAL_D; | ||
1249 | } else if ( (id & V4L2_STD_PAL_D1) == V4L2_STD_PAL_D1) { | ||
1250 | curr_id = V4L2_STD_PAL_D1; | ||
1251 | } else if ( (id & V4L2_STD_PAL_K) == V4L2_STD_PAL_K) { | ||
1252 | curr_id = V4L2_STD_PAL_K; | ||
1253 | } else if ( (id & V4L2_STD_PAL_M) == V4L2_STD_PAL_M) { | ||
1254 | curr_id = V4L2_STD_PAL_M; | ||
1255 | } else if ( (id & V4L2_STD_PAL_N) == V4L2_STD_PAL_N) { | ||
1256 | curr_id = V4L2_STD_PAL_N; | ||
1257 | } else if ( (id & V4L2_STD_PAL_Nc) == V4L2_STD_PAL_Nc) { | ||
1258 | curr_id = V4L2_STD_PAL_Nc; | ||
1259 | } else if ( (id & V4L2_STD_PAL_60) == V4L2_STD_PAL_60) { | ||
1260 | curr_id = V4L2_STD_PAL_60; | ||
1261 | } else if ( (id & V4L2_STD_NTSC) == V4L2_STD_NTSC) { | ||
1262 | curr_id = V4L2_STD_NTSC; | ||
1263 | } else if ( (id & V4L2_STD_NTSC_M) == V4L2_STD_NTSC_M) { | ||
1264 | curr_id = V4L2_STD_NTSC_M; | ||
1265 | } else if ( (id & V4L2_STD_NTSC_M_JP) == V4L2_STD_NTSC_M_JP) { | ||
1266 | curr_id = V4L2_STD_NTSC_M_JP; | ||
1267 | } else if ( (id & V4L2_STD_NTSC_443) == V4L2_STD_NTSC_443) { | ||
1268 | curr_id = V4L2_STD_NTSC_443; | ||
1269 | } else if ( (id & V4L2_STD_NTSC_M_KR) == V4L2_STD_NTSC_M_KR) { | ||
1270 | curr_id = V4L2_STD_NTSC_M_KR; | ||
1271 | } else if ( (id & V4L2_STD_SECAM) == V4L2_STD_SECAM) { | ||
1272 | curr_id = V4L2_STD_SECAM; | ||
1273 | } else if ( (id & V4L2_STD_SECAM_DK) == V4L2_STD_SECAM_DK) { | ||
1274 | curr_id = V4L2_STD_SECAM_DK; | ||
1275 | } else if ( (id & V4L2_STD_SECAM_B) == V4L2_STD_SECAM_B) { | ||
1276 | curr_id = V4L2_STD_SECAM_B; | ||
1277 | } else if ( (id & V4L2_STD_SECAM_D) == V4L2_STD_SECAM_D) { | ||
1278 | curr_id = V4L2_STD_SECAM_D; | ||
1279 | } else if ( (id & V4L2_STD_SECAM_G) == V4L2_STD_SECAM_G) { | ||
1280 | curr_id = V4L2_STD_SECAM_G; | ||
1281 | } else if ( (id & V4L2_STD_SECAM_H) == V4L2_STD_SECAM_H) { | ||
1282 | curr_id = V4L2_STD_SECAM_H; | ||
1283 | } else if ( (id & V4L2_STD_SECAM_K) == V4L2_STD_SECAM_K) { | ||
1284 | curr_id = V4L2_STD_SECAM_K; | ||
1285 | } else if ( (id & V4L2_STD_SECAM_K1) == V4L2_STD_SECAM_K1) { | ||
1286 | curr_id = V4L2_STD_SECAM_K1; | ||
1287 | } else if ( (id & V4L2_STD_SECAM_L) == V4L2_STD_SECAM_L) { | ||
1288 | curr_id = V4L2_STD_SECAM_L; | ||
1289 | } else if ( (id & V4L2_STD_SECAM_LC) == V4L2_STD_SECAM_LC) { | ||
1290 | curr_id = V4L2_STD_SECAM_LC; | ||
1291 | } else { | ||
1292 | break; | 1181 | break; |
1293 | } | 1182 | if (curr_id != V4L2_STD_PAL && |
1294 | id &= ~curr_id; | 1183 | curr_id != V4L2_STD_SECAM && |
1184 | curr_id != V4L2_STD_NTSC) | ||
1185 | id &= ~curr_id; | ||
1295 | } | 1186 | } |
1296 | if (i<=index) | 1187 | if (i <= index) |
1297 | return -EINVAL; | 1188 | return -EINVAL; |
1298 | 1189 | ||
1299 | v4l2_video_std_construct(p, curr_id,v4l2_norm_to_name(curr_id)); | 1190 | v4l2_video_std_construct(p, curr_id, descr); |
1300 | p->index = index; | 1191 | p->index = index; |
1301 | 1192 | ||
1302 | dbgarg (cmd, "index=%d, id=%Ld, name=%s, fps=%d/%d, " | 1193 | dbgarg(cmd, "index=%d, id=%Ld, name=%s, fps=%d/%d, " |
1303 | "framelines=%d\n", p->index, | 1194 | "framelines=%d\n", p->index, |
1304 | (unsigned long long)p->id, p->name, | 1195 | (unsigned long long)p->id, p->name, |
1305 | p->frameperiod.numerator, | 1196 | p->frameperiod.numerator, |
1306 | p->frameperiod.denominator, | 1197 | p->frameperiod.denominator, |
1307 | p->framelines); | 1198 | p->framelines); |
1308 | 1199 | ||
1309 | ret=0; | 1200 | ret = 0; |
1310 | break; | 1201 | break; |
1311 | } | 1202 | } |
1312 | case VIDIOC_G_STD: | 1203 | case VIDIOC_G_STD: |
diff --git a/drivers/media/video/vivi.c b/drivers/media/video/vivi.c index 845be1864f68..5ff9a58b6135 100644 --- a/drivers/media/video/vivi.c +++ b/drivers/media/video/vivi.c | |||
@@ -327,13 +327,14 @@ static void vivi_fillbuff(struct vivi_dev *dev, struct vivi_buffer *buf) | |||
327 | int hmax = buf->vb.height; | 327 | int hmax = buf->vb.height; |
328 | int wmax = buf->vb.width; | 328 | int wmax = buf->vb.width; |
329 | struct timeval ts; | 329 | struct timeval ts; |
330 | char *tmpbuf = kmalloc(wmax * 2, GFP_ATOMIC); | 330 | char *tmpbuf; |
331 | void *vbuf = videobuf_to_vmalloc(&buf->vb); | 331 | void *vbuf = videobuf_to_vmalloc(&buf->vb); |
332 | 332 | ||
333 | if (!tmpbuf) | 333 | if (!vbuf) |
334 | return; | 334 | return; |
335 | 335 | ||
336 | if (!vbuf) | 336 | tmpbuf = kmalloc(wmax * 2, GFP_ATOMIC); |
337 | if (!tmpbuf) | ||
337 | return; | 338 | return; |
338 | 339 | ||
339 | for (h = 0; h < hmax; h++) { | 340 | for (h = 0; h < hmax; h++) { |
diff --git a/drivers/mmc/host/imxmmc.c b/drivers/mmc/host/imxmmc.c index 95f33e87a99c..c4349c746cb3 100644 --- a/drivers/mmc/host/imxmmc.c +++ b/drivers/mmc/host/imxmmc.c | |||
@@ -1017,8 +1017,8 @@ static int imxmci_probe(struct platform_device *pdev) | |||
1017 | host->imask = IMXMCI_INT_MASK_DEFAULT; | 1017 | host->imask = IMXMCI_INT_MASK_DEFAULT; |
1018 | MMC_INT_MASK = host->imask; | 1018 | MMC_INT_MASK = host->imask; |
1019 | 1019 | ||
1020 | 1020 | host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW); | |
1021 | if(imx_dma_request_by_prio(&host->dma, DRIVER_NAME, DMA_PRIO_LOW)<0){ | 1021 | if(host->dma < 0) { |
1022 | dev_err(mmc_dev(host->mmc), "imx_dma_request_by_prio failed\n"); | 1022 | dev_err(mmc_dev(host->mmc), "imx_dma_request_by_prio failed\n"); |
1023 | ret = -EBUSY; | 1023 | ret = -EBUSY; |
1024 | goto out; | 1024 | goto out; |
diff --git a/drivers/mtd/maps/omap_nor.c b/drivers/mtd/maps/omap_nor.c index c12d8056bebd..68eec6c6c517 100644 --- a/drivers/mtd/maps/omap_nor.c +++ b/drivers/mtd/maps/omap_nor.c | |||
@@ -60,13 +60,22 @@ struct omapflash_info { | |||
60 | static void omap_set_vpp(struct map_info *map, int enable) | 60 | static void omap_set_vpp(struct map_info *map, int enable) |
61 | { | 61 | { |
62 | static int count; | 62 | static int count; |
63 | 63 | u32 l; | |
64 | if (enable) { | 64 | |
65 | if (count++ == 0) | 65 | if (cpu_class_is_omap1()) { |
66 | OMAP_EMIFS_CONFIG_REG |= OMAP_EMIFS_CONFIG_WP; | 66 | if (enable) { |
67 | } else { | 67 | if (count++ == 0) { |
68 | if (count && (--count == 0)) | 68 | l = omap_readl(EMIFS_CONFIG); |
69 | OMAP_EMIFS_CONFIG_REG &= ~OMAP_EMIFS_CONFIG_WP; | 69 | l |= OMAP_EMIFS_CONFIG_WP; |
70 | omap_writel(l, EMIFS_CONFIG); | ||
71 | } | ||
72 | } else { | ||
73 | if (count && (--count == 0)) { | ||
74 | l = omap_readl(EMIFS_CONFIG); | ||
75 | l &= ~OMAP_EMIFS_CONFIG_WP; | ||
76 | omap_writel(l, EMIFS_CONFIG); | ||
77 | } | ||
78 | } | ||
70 | } | 79 | } |
71 | } | 80 | } |
72 | 81 | ||
diff --git a/drivers/mtd/nand/orion_nand.c b/drivers/mtd/nand/orion_nand.c index 59e05a1c50cf..ee2ac3948cd8 100644 --- a/drivers/mtd/nand/orion_nand.c +++ b/drivers/mtd/nand/orion_nand.c | |||
@@ -85,6 +85,9 @@ static int __init orion_nand_probe(struct platform_device *pdev) | |||
85 | nc->cmd_ctrl = orion_nand_cmd_ctrl; | 85 | nc->cmd_ctrl = orion_nand_cmd_ctrl; |
86 | nc->ecc.mode = NAND_ECC_SOFT; | 86 | nc->ecc.mode = NAND_ECC_SOFT; |
87 | 87 | ||
88 | if (board->chip_delay) | ||
89 | nc->chip_delay = board->chip_delay; | ||
90 | |||
88 | if (board->width == 16) | 91 | if (board->width == 16) |
89 | nc->options |= NAND_BUSWIDTH_16; | 92 | nc->options |= NAND_BUSWIDTH_16; |
90 | 93 | ||
diff --git a/drivers/net/3c59x.c b/drivers/net/3c59x.c index 2edda8cc7f99..aabad8ce7458 100644 --- a/drivers/net/3c59x.c +++ b/drivers/net/3c59x.c | |||
@@ -1768,9 +1768,10 @@ vortex_timer(unsigned long data) | |||
1768 | case XCVR_MII: case XCVR_NWAY: | 1768 | case XCVR_MII: case XCVR_NWAY: |
1769 | { | 1769 | { |
1770 | ok = 1; | 1770 | ok = 1; |
1771 | spin_lock_bh(&vp->lock); | 1771 | /* Interrupts are already disabled */ |
1772 | spin_lock(&vp->lock); | ||
1772 | vortex_check_media(dev, 0); | 1773 | vortex_check_media(dev, 0); |
1773 | spin_unlock_bh(&vp->lock); | 1774 | spin_unlock(&vp->lock); |
1774 | } | 1775 | } |
1775 | break; | 1776 | break; |
1776 | default: /* Other media types handled by Tx timeouts. */ | 1777 | default: /* Other media types handled by Tx timeouts. */ |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index f4182cfffe9d..45a41b597da9 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -217,7 +217,7 @@ config MII | |||
217 | 217 | ||
218 | config MACB | 218 | config MACB |
219 | tristate "Atmel MACB support" | 219 | tristate "Atmel MACB support" |
220 | depends on AVR32 || ARCH_AT91SAM9260 || ARCH_AT91SAM9263 || ARCH_AT91CAP9 | 220 | depends on AVR32 || ARCH_AT91SAM9260 || ARCH_AT91SAM9263 || ARCH_AT91SAM9G20 || ARCH_AT91CAP9 |
221 | select PHYLIB | 221 | select PHYLIB |
222 | help | 222 | help |
223 | The Atmel MACB ethernet interface is found on many AT32 and AT91 | 223 | The Atmel MACB ethernet interface is found on many AT32 and AT91 |
diff --git a/drivers/net/arm/etherh.c b/drivers/net/arm/etherh.c index 00081d2b9cd5..e9d15eccad08 100644 --- a/drivers/net/arm/etherh.c +++ b/drivers/net/arm/etherh.c | |||
@@ -647,7 +647,7 @@ etherh_probe(struct expansion_card *ec, const struct ecard_id *id) | |||
647 | struct ei_device *ei_local; | 647 | struct ei_device *ei_local; |
648 | struct net_device *dev; | 648 | struct net_device *dev; |
649 | struct etherh_priv *eh; | 649 | struct etherh_priv *eh; |
650 | int i, ret; | 650 | int ret; |
651 | DECLARE_MAC_BUF(mac); | 651 | DECLARE_MAC_BUF(mac); |
652 | 652 | ||
653 | etherh_banner(); | 653 | etherh_banner(); |
diff --git a/drivers/net/e100.c b/drivers/net/e100.c index f3cba5e24ec5..1037b1332312 100644 --- a/drivers/net/e100.c +++ b/drivers/net/e100.c | |||
@@ -1803,6 +1803,8 @@ static int e100_rx_alloc_skb(struct nic *nic, struct rx *rx) | |||
1803 | if (rx->prev->skb) { | 1803 | if (rx->prev->skb) { |
1804 | struct rfd *prev_rfd = (struct rfd *)rx->prev->skb->data; | 1804 | struct rfd *prev_rfd = (struct rfd *)rx->prev->skb->data; |
1805 | put_unaligned_le32(rx->dma_addr, &prev_rfd->link); | 1805 | put_unaligned_le32(rx->dma_addr, &prev_rfd->link); |
1806 | pci_dma_sync_single_for_device(nic->pdev, rx->prev->dma_addr, | ||
1807 | sizeof(struct rfd), PCI_DMA_TODEVICE); | ||
1806 | } | 1808 | } |
1807 | 1809 | ||
1808 | return 0; | 1810 | return 0; |
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c index 701531e72e7b..a3f6a9c72ec8 100644 --- a/drivers/net/e1000/e1000_ethtool.c +++ b/drivers/net/e1000/e1000_ethtool.c | |||
@@ -347,7 +347,7 @@ e1000_set_tso(struct net_device *netdev, u32 data) | |||
347 | else | 347 | else |
348 | netdev->features &= ~NETIF_F_TSO; | 348 | netdev->features &= ~NETIF_F_TSO; |
349 | 349 | ||
350 | if (data) | 350 | if (data && (adapter->hw.mac_type > e1000_82547_rev_2)) |
351 | netdev->features |= NETIF_F_TSO6; | 351 | netdev->features |= NETIF_F_TSO6; |
352 | else | 352 | else |
353 | netdev->features &= ~NETIF_F_TSO6; | 353 | netdev->features &= ~NETIF_F_TSO6; |
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index cab1835173cd..648a87bbf467 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -2535,7 +2535,8 @@ void e1000e_down(struct e1000_adapter *adapter) | |||
2535 | adapter->link_speed = 0; | 2535 | adapter->link_speed = 0; |
2536 | adapter->link_duplex = 0; | 2536 | adapter->link_duplex = 0; |
2537 | 2537 | ||
2538 | e1000e_reset(adapter); | 2538 | if (!pci_channel_offline(adapter->pdev)) |
2539 | e1000e_reset(adapter); | ||
2539 | e1000_clean_tx_ring(adapter); | 2540 | e1000_clean_tx_ring(adapter); |
2540 | e1000_clean_rx_ring(adapter); | 2541 | e1000_clean_rx_ring(adapter); |
2541 | 2542 | ||
diff --git a/drivers/net/hamradio/dmascc.c b/drivers/net/hamradio/dmascc.c index 0b94833e23f7..e8cfadefa4b6 100644 --- a/drivers/net/hamradio/dmascc.c +++ b/drivers/net/hamradio/dmascc.c | |||
@@ -1077,8 +1077,6 @@ static inline void rx_off(struct scc_priv *priv) | |||
1077 | 1077 | ||
1078 | static void start_timer(struct scc_priv *priv, int t, int r15) | 1078 | static void start_timer(struct scc_priv *priv, int t, int r15) |
1079 | { | 1079 | { |
1080 | unsigned long flags; | ||
1081 | |||
1082 | outb(priv->tmr_mode, priv->tmr_ctrl); | 1080 | outb(priv->tmr_mode, priv->tmr_ctrl); |
1083 | if (t == 0) { | 1081 | if (t == 0) { |
1084 | tm_isr(priv); | 1082 | tm_isr(priv); |
diff --git a/drivers/net/igb/igb_main.c b/drivers/net/igb/igb_main.c index ae398f04c7b4..e79a26a886c8 100644 --- a/drivers/net/igb/igb_main.c +++ b/drivers/net/igb/igb_main.c | |||
@@ -718,7 +718,8 @@ void igb_down(struct igb_adapter *adapter) | |||
718 | adapter->link_speed = 0; | 718 | adapter->link_speed = 0; |
719 | adapter->link_duplex = 0; | 719 | adapter->link_duplex = 0; |
720 | 720 | ||
721 | igb_reset(adapter); | 721 | if (!pci_channel_offline(adapter->pdev)) |
722 | igb_reset(adapter); | ||
722 | igb_clean_all_tx_rings(adapter); | 723 | igb_clean_all_tx_rings(adapter); |
723 | igb_clean_all_rx_rings(adapter); | 724 | igb_clean_all_rx_rings(adapter); |
724 | } | 725 | } |
diff --git a/drivers/net/ipg.c b/drivers/net/ipg.c index 679a0826780e..2c03f4e2ccc4 100644 --- a/drivers/net/ipg.c +++ b/drivers/net/ipg.c | |||
@@ -1271,7 +1271,7 @@ static void ipg_nic_rx_with_end(struct net_device *dev, | |||
1271 | 1271 | ||
1272 | framelen = le64_to_cpu(rxfd->rfs) & IPG_RFS_RXFRAMELEN; | 1272 | framelen = le64_to_cpu(rxfd->rfs) & IPG_RFS_RXFRAMELEN; |
1273 | 1273 | ||
1274 | endframeLen = framelen - jumbo->current_size; | 1274 | endframelen = framelen - jumbo->current_size; |
1275 | /* | 1275 | /* |
1276 | if (framelen > IPG_RXFRAG_SIZE) | 1276 | if (framelen > IPG_RXFRAG_SIZE) |
1277 | framelen=IPG_RXFRAG_SIZE; | 1277 | framelen=IPG_RXFRAG_SIZE; |
@@ -1279,8 +1279,8 @@ static void ipg_nic_rx_with_end(struct net_device *dev, | |||
1279 | if (framelen > IPG_RXSUPPORT_SIZE) | 1279 | if (framelen > IPG_RXSUPPORT_SIZE) |
1280 | dev_kfree_skb_irq(jumbo->skb); | 1280 | dev_kfree_skb_irq(jumbo->skb); |
1281 | else { | 1281 | else { |
1282 | memcpy(skb_put(jumbo->skb, endframeLen), | 1282 | memcpy(skb_put(jumbo->skb, endframelen), |
1283 | skb->data, endframeLen); | 1283 | skb->data, endframelen); |
1284 | 1284 | ||
1285 | jumbo->skb->protocol = | 1285 | jumbo->skb->protocol = |
1286 | eth_type_trans(jumbo->skb, dev); | 1286 | eth_type_trans(jumbo->skb, dev); |
@@ -1352,16 +1352,16 @@ static int ipg_nic_rx(struct net_device *dev) | |||
1352 | 1352 | ||
1353 | switch (ipg_nic_rx_check_frame_type(dev)) { | 1353 | switch (ipg_nic_rx_check_frame_type(dev)) { |
1354 | case FRAME_WITH_START_WITH_END: | 1354 | case FRAME_WITH_START_WITH_END: |
1355 | ipg_nic_rx_with_start_and_end(dev, tp, rxfd, entry); | 1355 | ipg_nic_rx_with_start_and_end(dev, sp, rxfd, entry); |
1356 | break; | 1356 | break; |
1357 | case FRAME_WITH_START: | 1357 | case FRAME_WITH_START: |
1358 | ipg_nic_rx_with_start(dev, tp, rxfd, entry); | 1358 | ipg_nic_rx_with_start(dev, sp, rxfd, entry); |
1359 | break; | 1359 | break; |
1360 | case FRAME_WITH_END: | 1360 | case FRAME_WITH_END: |
1361 | ipg_nic_rx_with_end(dev, tp, rxfd, entry); | 1361 | ipg_nic_rx_with_end(dev, sp, rxfd, entry); |
1362 | break; | 1362 | break; |
1363 | case FRAME_NO_START_NO_END: | 1363 | case FRAME_NO_START_NO_END: |
1364 | ipg_nic_rx_no_start_no_end(dev, tp, rxfd, entry); | 1364 | ipg_nic_rx_no_start_no_end(dev, sp, rxfd, entry); |
1365 | break; | 1365 | break; |
1366 | } | 1366 | } |
1367 | } | 1367 | } |
@@ -1808,7 +1808,7 @@ static int ipg_nic_open(struct net_device *dev) | |||
1808 | /* initialize JUMBO Frame control variable */ | 1808 | /* initialize JUMBO Frame control variable */ |
1809 | sp->jumbo.found_start = 0; | 1809 | sp->jumbo.found_start = 0; |
1810 | sp->jumbo.current_size = 0; | 1810 | sp->jumbo.current_size = 0; |
1811 | sp->jumbo.skb = 0; | 1811 | sp->jumbo.skb = NULL; |
1812 | dev->mtu = IPG_TXFRAG_SIZE; | 1812 | dev->mtu = IPG_TXFRAG_SIZE; |
1813 | #endif | 1813 | #endif |
1814 | 1814 | ||
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index 7b859220c255..8f0460901153 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -1969,7 +1969,8 @@ void ixgbe_down(struct ixgbe_adapter *adapter) | |||
1969 | netif_carrier_off(netdev); | 1969 | netif_carrier_off(netdev); |
1970 | netif_stop_queue(netdev); | 1970 | netif_stop_queue(netdev); |
1971 | 1971 | ||
1972 | ixgbe_reset(adapter); | 1972 | if (!pci_channel_offline(adapter->pdev)) |
1973 | ixgbe_reset(adapter); | ||
1973 | ixgbe_clean_all_tx_rings(adapter); | 1974 | ixgbe_clean_all_tx_rings(adapter); |
1974 | ixgbe_clean_all_rx_rings(adapter); | 1975 | ixgbe_clean_all_rx_rings(adapter); |
1975 | 1976 | ||
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c index 6797ed069f1f..63cd67b931e7 100644 --- a/drivers/net/netxen/netxen_nic_main.c +++ b/drivers/net/netxen/netxen_nic_main.c | |||
@@ -71,14 +71,18 @@ static irqreturn_t netxen_intr(int irq, void *data); | |||
71 | static irqreturn_t netxen_msi_intr(int irq, void *data); | 71 | static irqreturn_t netxen_msi_intr(int irq, void *data); |
72 | 72 | ||
73 | /* PCI Device ID Table */ | 73 | /* PCI Device ID Table */ |
74 | #define ENTRY(device) \ | ||
75 | {PCI_DEVICE(0x4040, (device)), \ | ||
76 | .class = PCI_CLASS_NETWORK_ETHERNET << 8, .class_mask = ~0} | ||
77 | |||
74 | static struct pci_device_id netxen_pci_tbl[] __devinitdata = { | 78 | static struct pci_device_id netxen_pci_tbl[] __devinitdata = { |
75 | {PCI_DEVICE(0x4040, 0x0001), PCI_DEVICE_CLASS(0x020000, ~0)}, | 79 | ENTRY(0x0001), |
76 | {PCI_DEVICE(0x4040, 0x0002), PCI_DEVICE_CLASS(0x020000, ~0)}, | 80 | ENTRY(0x0002), |
77 | {PCI_DEVICE(0x4040, 0x0003), PCI_DEVICE_CLASS(0x020000, ~0)}, | 81 | ENTRY(0x0003), |
78 | {PCI_DEVICE(0x4040, 0x0004), PCI_DEVICE_CLASS(0x020000, ~0)}, | 82 | ENTRY(0x0004), |
79 | {PCI_DEVICE(0x4040, 0x0005), PCI_DEVICE_CLASS(0x020000, ~0)}, | 83 | ENTRY(0x0005), |
80 | {PCI_DEVICE(0x4040, 0x0024), PCI_DEVICE_CLASS(0x020000, ~0)}, | 84 | ENTRY(0x0024), |
81 | {PCI_DEVICE(0x4040, 0x0025), PCI_DEVICE_CLASS(0x020000, ~0)}, | 85 | ENTRY(0x0025), |
82 | {0,} | 86 | {0,} |
83 | }; | 87 | }; |
84 | 88 | ||
diff --git a/drivers/net/pcmcia/axnet_cs.c b/drivers/net/pcmcia/axnet_cs.c index ce95c5d168fe..70d012e90dcf 100644 --- a/drivers/net/pcmcia/axnet_cs.c +++ b/drivers/net/pcmcia/axnet_cs.c | |||
@@ -525,12 +525,14 @@ static int axnet_open(struct net_device *dev) | |||
525 | int ret; | 525 | int ret; |
526 | axnet_dev_t *info = PRIV(dev); | 526 | axnet_dev_t *info = PRIV(dev); |
527 | struct pcmcia_device *link = info->p_dev; | 527 | struct pcmcia_device *link = info->p_dev; |
528 | unsigned int nic_base = dev->base_addr; | ||
528 | 529 | ||
529 | DEBUG(2, "axnet_open('%s')\n", dev->name); | 530 | DEBUG(2, "axnet_open('%s')\n", dev->name); |
530 | 531 | ||
531 | if (!pcmcia_dev_present(link)) | 532 | if (!pcmcia_dev_present(link)) |
532 | return -ENODEV; | 533 | return -ENODEV; |
533 | 534 | ||
535 | outb_p(0xFF, nic_base + EN0_ISR); /* Clear bogus intr. */ | ||
534 | ret = request_irq(dev->irq, ei_irq_wrapper, IRQF_SHARED, "axnet_cs", dev); | 536 | ret = request_irq(dev->irq, ei_irq_wrapper, IRQF_SHARED, "axnet_cs", dev); |
535 | if (ret) | 537 | if (ret) |
536 | return ret; | 538 | return ret; |
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c index fd8158a86f64..2d4c4ad89b8d 100644 --- a/drivers/net/pcmcia/pcnet_cs.c +++ b/drivers/net/pcmcia/pcnet_cs.c | |||
@@ -969,6 +969,7 @@ static int pcnet_open(struct net_device *dev) | |||
969 | int ret; | 969 | int ret; |
970 | pcnet_dev_t *info = PRIV(dev); | 970 | pcnet_dev_t *info = PRIV(dev); |
971 | struct pcmcia_device *link = info->p_dev; | 971 | struct pcmcia_device *link = info->p_dev; |
972 | unsigned int nic_base = dev->base_addr; | ||
972 | 973 | ||
973 | DEBUG(2, "pcnet_open('%s')\n", dev->name); | 974 | DEBUG(2, "pcnet_open('%s')\n", dev->name); |
974 | 975 | ||
@@ -976,6 +977,8 @@ static int pcnet_open(struct net_device *dev) | |||
976 | return -ENODEV; | 977 | return -ENODEV; |
977 | 978 | ||
978 | set_misc_reg(dev); | 979 | set_misc_reg(dev); |
980 | |||
981 | outb_p(0xFF, nic_base + EN0_ISR); /* Clear bogus intr. */ | ||
979 | ret = request_irq(dev->irq, ei_irq_wrapper, IRQF_SHARED, dev_info, dev); | 982 | ret = request_irq(dev->irq, ei_irq_wrapper, IRQF_SHARED, dev_info, dev); |
980 | if (ret) | 983 | if (ret) |
981 | return ret; | 984 | return ret; |
diff --git a/drivers/net/qla3xxx.c b/drivers/net/qla3xxx.c index b7f7b2227d56..bccee68bd48a 100644 --- a/drivers/net/qla3xxx.c +++ b/drivers/net/qla3xxx.c | |||
@@ -3701,7 +3701,9 @@ static int ql_cycle_adapter(struct ql3_adapter *qdev, int reset) | |||
3701 | printk(KERN_ERR PFX | 3701 | printk(KERN_ERR PFX |
3702 | "%s: Driver up/down cycle failed, " | 3702 | "%s: Driver up/down cycle failed, " |
3703 | "closing device\n",qdev->ndev->name); | 3703 | "closing device\n",qdev->ndev->name); |
3704 | rtnl_lock(); | ||
3704 | dev_close(qdev->ndev); | 3705 | dev_close(qdev->ndev); |
3706 | rtnl_unlock(); | ||
3705 | return -1; | 3707 | return -1; |
3706 | } | 3708 | } |
3707 | return 0; | 3709 | return 0; |
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c index 858b191517b3..504a48ff73c8 100644 --- a/drivers/net/r6040.c +++ b/drivers/net/r6040.c | |||
@@ -273,7 +273,7 @@ static void r6040_init_ring_desc(struct r6040_descriptor *desc_ring, | |||
273 | dma_addr_t mapping = desc_dma; | 273 | dma_addr_t mapping = desc_dma; |
274 | 274 | ||
275 | while (size-- > 0) { | 275 | while (size-- > 0) { |
276 | mapping += sizeof(sizeof(*desc)); | 276 | mapping += sizeof(*desc); |
277 | desc->ndesc = cpu_to_le32(mapping); | 277 | desc->ndesc = cpu_to_le32(mapping); |
278 | desc->vndescp = desc + 1; | 278 | desc->vndescp = desc + 1; |
279 | desc++; | 279 | desc++; |
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c index b5c1e663417d..ae7b697456b4 100644 --- a/drivers/net/s2io.c +++ b/drivers/net/s2io.c | |||
@@ -2625,9 +2625,7 @@ static int fill_rx_buffers(struct ring_info *ring) | |||
2625 | rxdp1->Buffer0_ptr = pci_map_single | 2625 | rxdp1->Buffer0_ptr = pci_map_single |
2626 | (ring->pdev, skb->data, size - NET_IP_ALIGN, | 2626 | (ring->pdev, skb->data, size - NET_IP_ALIGN, |
2627 | PCI_DMA_FROMDEVICE); | 2627 | PCI_DMA_FROMDEVICE); |
2628 | if( (rxdp1->Buffer0_ptr == 0) || | 2628 | if(pci_dma_mapping_error(rxdp1->Buffer0_ptr)) |
2629 | (rxdp1->Buffer0_ptr == | ||
2630 | DMA_ERROR_CODE)) | ||
2631 | goto pci_map_failed; | 2629 | goto pci_map_failed; |
2632 | 2630 | ||
2633 | rxdp->Control_2 = | 2631 | rxdp->Control_2 = |
@@ -2657,6 +2655,7 @@ static int fill_rx_buffers(struct ring_info *ring) | |||
2657 | skb->data = (void *) (unsigned long)tmp; | 2655 | skb->data = (void *) (unsigned long)tmp; |
2658 | skb_reset_tail_pointer(skb); | 2656 | skb_reset_tail_pointer(skb); |
2659 | 2657 | ||
2658 | /* AK: check is wrong. 0 can be valid dma address */ | ||
2660 | if (!(rxdp3->Buffer0_ptr)) | 2659 | if (!(rxdp3->Buffer0_ptr)) |
2661 | rxdp3->Buffer0_ptr = | 2660 | rxdp3->Buffer0_ptr = |
2662 | pci_map_single(ring->pdev, ba->ba_0, | 2661 | pci_map_single(ring->pdev, ba->ba_0, |
@@ -2665,8 +2664,7 @@ static int fill_rx_buffers(struct ring_info *ring) | |||
2665 | pci_dma_sync_single_for_device(ring->pdev, | 2664 | pci_dma_sync_single_for_device(ring->pdev, |
2666 | (dma_addr_t) rxdp3->Buffer0_ptr, | 2665 | (dma_addr_t) rxdp3->Buffer0_ptr, |
2667 | BUF0_LEN, PCI_DMA_FROMDEVICE); | 2666 | BUF0_LEN, PCI_DMA_FROMDEVICE); |
2668 | if( (rxdp3->Buffer0_ptr == 0) || | 2667 | if (pci_dma_mapping_error(rxdp3->Buffer0_ptr)) |
2669 | (rxdp3->Buffer0_ptr == DMA_ERROR_CODE)) | ||
2670 | goto pci_map_failed; | 2668 | goto pci_map_failed; |
2671 | 2669 | ||
2672 | rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN); | 2670 | rxdp->Control_2 = SET_BUFFER0_SIZE_3(BUF0_LEN); |
@@ -2681,18 +2679,17 @@ static int fill_rx_buffers(struct ring_info *ring) | |||
2681 | (ring->pdev, skb->data, ring->mtu + 4, | 2679 | (ring->pdev, skb->data, ring->mtu + 4, |
2682 | PCI_DMA_FROMDEVICE); | 2680 | PCI_DMA_FROMDEVICE); |
2683 | 2681 | ||
2684 | if( (rxdp3->Buffer2_ptr == 0) || | 2682 | if (pci_dma_mapping_error(rxdp3->Buffer2_ptr)) |
2685 | (rxdp3->Buffer2_ptr == DMA_ERROR_CODE)) | ||
2686 | goto pci_map_failed; | 2683 | goto pci_map_failed; |
2687 | 2684 | ||
2685 | /* AK: check is wrong */ | ||
2688 | if (!rxdp3->Buffer1_ptr) | 2686 | if (!rxdp3->Buffer1_ptr) |
2689 | rxdp3->Buffer1_ptr = | 2687 | rxdp3->Buffer1_ptr = |
2690 | pci_map_single(ring->pdev, | 2688 | pci_map_single(ring->pdev, |
2691 | ba->ba_1, BUF1_LEN, | 2689 | ba->ba_1, BUF1_LEN, |
2692 | PCI_DMA_FROMDEVICE); | 2690 | PCI_DMA_FROMDEVICE); |
2693 | 2691 | ||
2694 | if( (rxdp3->Buffer1_ptr == 0) || | 2692 | if (pci_dma_mapping_error(rxdp3->Buffer1_ptr)) { |
2695 | (rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) { | ||
2696 | pci_unmap_single | 2693 | pci_unmap_single |
2697 | (ring->pdev, | 2694 | (ring->pdev, |
2698 | (dma_addr_t)(unsigned long) | 2695 | (dma_addr_t)(unsigned long) |
@@ -4264,16 +4261,14 @@ static int s2io_xmit(struct sk_buff *skb, struct net_device *dev) | |||
4264 | txdp->Buffer_Pointer = pci_map_single(sp->pdev, | 4261 | txdp->Buffer_Pointer = pci_map_single(sp->pdev, |
4265 | fifo->ufo_in_band_v, | 4262 | fifo->ufo_in_band_v, |
4266 | sizeof(u64), PCI_DMA_TODEVICE); | 4263 | sizeof(u64), PCI_DMA_TODEVICE); |
4267 | if((txdp->Buffer_Pointer == 0) || | 4264 | if (pci_dma_mapping_error(txdp->Buffer_Pointer)) |
4268 | (txdp->Buffer_Pointer == DMA_ERROR_CODE)) | ||
4269 | goto pci_map_failed; | 4265 | goto pci_map_failed; |
4270 | txdp++; | 4266 | txdp++; |
4271 | } | 4267 | } |
4272 | 4268 | ||
4273 | txdp->Buffer_Pointer = pci_map_single | 4269 | txdp->Buffer_Pointer = pci_map_single |
4274 | (sp->pdev, skb->data, frg_len, PCI_DMA_TODEVICE); | 4270 | (sp->pdev, skb->data, frg_len, PCI_DMA_TODEVICE); |
4275 | if((txdp->Buffer_Pointer == 0) || | 4271 | if (pci_dma_mapping_error(txdp->Buffer_Pointer)) |
4276 | (txdp->Buffer_Pointer == DMA_ERROR_CODE)) | ||
4277 | goto pci_map_failed; | 4272 | goto pci_map_failed; |
4278 | 4273 | ||
4279 | txdp->Host_Control = (unsigned long) skb; | 4274 | txdp->Host_Control = (unsigned long) skb; |
@@ -6884,10 +6879,8 @@ static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp, | |||
6884 | pci_map_single( sp->pdev, (*skb)->data, | 6879 | pci_map_single( sp->pdev, (*skb)->data, |
6885 | size - NET_IP_ALIGN, | 6880 | size - NET_IP_ALIGN, |
6886 | PCI_DMA_FROMDEVICE); | 6881 | PCI_DMA_FROMDEVICE); |
6887 | if( (rxdp1->Buffer0_ptr == 0) || | 6882 | if (pci_dma_mapping_error(rxdp1->Buffer0_ptr)) |
6888 | (rxdp1->Buffer0_ptr == DMA_ERROR_CODE)) { | ||
6889 | goto memalloc_failed; | 6883 | goto memalloc_failed; |
6890 | } | ||
6891 | rxdp->Host_Control = (unsigned long) (*skb); | 6884 | rxdp->Host_Control = (unsigned long) (*skb); |
6892 | } | 6885 | } |
6893 | } else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) { | 6886 | } else if ((sp->rxd_mode == RXD_MODE_3B) && (rxdp->Host_Control == 0)) { |
@@ -6913,15 +6906,12 @@ static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp, | |||
6913 | pci_map_single(sp->pdev, (*skb)->data, | 6906 | pci_map_single(sp->pdev, (*skb)->data, |
6914 | dev->mtu + 4, | 6907 | dev->mtu + 4, |
6915 | PCI_DMA_FROMDEVICE); | 6908 | PCI_DMA_FROMDEVICE); |
6916 | if( (rxdp3->Buffer2_ptr == 0) || | 6909 | if (pci_dma_mapping_error(rxdp3->Buffer2_ptr)) |
6917 | (rxdp3->Buffer2_ptr == DMA_ERROR_CODE)) { | ||
6918 | goto memalloc_failed; | 6910 | goto memalloc_failed; |
6919 | } | ||
6920 | rxdp3->Buffer0_ptr = *temp0 = | 6911 | rxdp3->Buffer0_ptr = *temp0 = |
6921 | pci_map_single( sp->pdev, ba->ba_0, BUF0_LEN, | 6912 | pci_map_single( sp->pdev, ba->ba_0, BUF0_LEN, |
6922 | PCI_DMA_FROMDEVICE); | 6913 | PCI_DMA_FROMDEVICE); |
6923 | if( (rxdp3->Buffer0_ptr == 0) || | 6914 | if (pci_dma_mapping_error(rxdp3->Buffer0_ptr)) { |
6924 | (rxdp3->Buffer0_ptr == DMA_ERROR_CODE)) { | ||
6925 | pci_unmap_single (sp->pdev, | 6915 | pci_unmap_single (sp->pdev, |
6926 | (dma_addr_t)rxdp3->Buffer2_ptr, | 6916 | (dma_addr_t)rxdp3->Buffer2_ptr, |
6927 | dev->mtu + 4, PCI_DMA_FROMDEVICE); | 6917 | dev->mtu + 4, PCI_DMA_FROMDEVICE); |
@@ -6933,8 +6923,7 @@ static int set_rxd_buffer_pointer(struct s2io_nic *sp, struct RxD_t *rxdp, | |||
6933 | rxdp3->Buffer1_ptr = *temp1 = | 6923 | rxdp3->Buffer1_ptr = *temp1 = |
6934 | pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN, | 6924 | pci_map_single(sp->pdev, ba->ba_1, BUF1_LEN, |
6935 | PCI_DMA_FROMDEVICE); | 6925 | PCI_DMA_FROMDEVICE); |
6936 | if( (rxdp3->Buffer1_ptr == 0) || | 6926 | if (pci_dma_mapping_error(rxdp3->Buffer1_ptr)) { |
6937 | (rxdp3->Buffer1_ptr == DMA_ERROR_CODE)) { | ||
6938 | pci_unmap_single (sp->pdev, | 6927 | pci_unmap_single (sp->pdev, |
6939 | (dma_addr_t)rxdp3->Buffer0_ptr, | 6928 | (dma_addr_t)rxdp3->Buffer0_ptr, |
6940 | BUF0_LEN, PCI_DMA_FROMDEVICE); | 6929 | BUF0_LEN, PCI_DMA_FROMDEVICE); |
diff --git a/drivers/net/s2io.h b/drivers/net/s2io.h index 4706f7f9acb6..1827b6686c98 100644 --- a/drivers/net/s2io.h +++ b/drivers/net/s2io.h | |||
@@ -75,10 +75,6 @@ static int debug_level = ERR_DBG; | |||
75 | /* DEBUG message print. */ | 75 | /* DEBUG message print. */ |
76 | #define DBG_PRINT(dbg_level, args...) if(!(debug_level<dbg_level)) printk(args) | 76 | #define DBG_PRINT(dbg_level, args...) if(!(debug_level<dbg_level)) printk(args) |
77 | 77 | ||
78 | #ifndef DMA_ERROR_CODE | ||
79 | #define DMA_ERROR_CODE (~(dma_addr_t)0x0) | ||
80 | #endif | ||
81 | |||
82 | /* Protocol assist features of the NIC */ | 78 | /* Protocol assist features of the NIC */ |
83 | #define L3_CKSUM_OK 0xFFFF | 79 | #define L3_CKSUM_OK 0xFFFF |
84 | #define L4_CKSUM_OK 0xFFFF | 80 | #define L4_CKSUM_OK 0xFFFF |
diff --git a/drivers/net/tc35815.c b/drivers/net/tc35815.c index 10e4e85da3fc..b07b8cbadeaf 100644 --- a/drivers/net/tc35815.c +++ b/drivers/net/tc35815.c | |||
@@ -1394,6 +1394,7 @@ tc35815_open(struct net_device *dev) | |||
1394 | tc35815_chip_init(dev); | 1394 | tc35815_chip_init(dev); |
1395 | spin_unlock_irq(&lp->lock); | 1395 | spin_unlock_irq(&lp->lock); |
1396 | 1396 | ||
1397 | netif_carrier_off(dev); | ||
1397 | /* schedule a link state check */ | 1398 | /* schedule a link state check */ |
1398 | phy_start(lp->phy_dev); | 1399 | phy_start(lp->phy_dev); |
1399 | 1400 | ||
@@ -1735,7 +1736,6 @@ tc35815_rx(struct net_device *dev) | |||
1735 | skb = lp->rx_skbs[cur_bd].skb; | 1736 | skb = lp->rx_skbs[cur_bd].skb; |
1736 | prefetch(skb->data); | 1737 | prefetch(skb->data); |
1737 | lp->rx_skbs[cur_bd].skb = NULL; | 1738 | lp->rx_skbs[cur_bd].skb = NULL; |
1738 | lp->fbl_count--; | ||
1739 | pci_unmap_single(lp->pci_dev, | 1739 | pci_unmap_single(lp->pci_dev, |
1740 | lp->rx_skbs[cur_bd].skb_dma, | 1740 | lp->rx_skbs[cur_bd].skb_dma, |
1741 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); | 1741 | RX_BUF_SIZE, PCI_DMA_FROMDEVICE); |
@@ -1791,6 +1791,7 @@ tc35815_rx(struct net_device *dev) | |||
1791 | #ifdef TC35815_USE_PACKEDBUFFER | 1791 | #ifdef TC35815_USE_PACKEDBUFFER |
1792 | while (lp->fbl_curid != id) | 1792 | while (lp->fbl_curid != id) |
1793 | #else | 1793 | #else |
1794 | lp->fbl_count--; | ||
1794 | while (lp->fbl_count < RX_BUF_NUM) | 1795 | while (lp->fbl_count < RX_BUF_NUM) |
1795 | #endif | 1796 | #endif |
1796 | { | 1797 | { |
@@ -2453,6 +2454,7 @@ static int tc35815_resume(struct pci_dev *pdev) | |||
2453 | return 0; | 2454 | return 0; |
2454 | pci_set_power_state(pdev, PCI_D0); | 2455 | pci_set_power_state(pdev, PCI_D0); |
2455 | tc35815_restart(dev); | 2456 | tc35815_restart(dev); |
2457 | netif_carrier_off(dev); | ||
2456 | if (lp->phy_dev) | 2458 | if (lp->phy_dev) |
2457 | phy_start(lp->phy_dev); | 2459 | phy_start(lp->phy_dev); |
2458 | netif_device_attach(dev); | 2460 | netif_device_attach(dev); |
diff --git a/drivers/net/wan/x25_asy.c b/drivers/net/wan/x25_asy.c index 249e18053d5f..069f8bb0a99f 100644 --- a/drivers/net/wan/x25_asy.c +++ b/drivers/net/wan/x25_asy.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/x25.h> | 32 | #include <linux/x25.h> |
33 | #include <linux/lapb.h> | 33 | #include <linux/lapb.h> |
34 | #include <linux/init.h> | 34 | #include <linux/init.h> |
35 | #include <linux/rtnetlink.h> | ||
35 | #include "x25_asy.h" | 36 | #include "x25_asy.h" |
36 | 37 | ||
37 | #include <net/x25device.h> | 38 | #include <net/x25device.h> |
@@ -601,8 +602,10 @@ static void x25_asy_close_tty(struct tty_struct *tty) | |||
601 | if (!sl || sl->magic != X25_ASY_MAGIC) | 602 | if (!sl || sl->magic != X25_ASY_MAGIC) |
602 | return; | 603 | return; |
603 | 604 | ||
605 | rtnl_lock(); | ||
604 | if (sl->dev->flags & IFF_UP) | 606 | if (sl->dev->flags & IFF_UP) |
605 | dev_close(sl->dev); | 607 | dev_close(sl->dev); |
608 | rtnl_unlock(); | ||
606 | 609 | ||
607 | tty->disc_data = NULL; | 610 | tty->disc_data = NULL; |
608 | sl->tty = NULL; | 611 | sl->tty = NULL; |
diff --git a/drivers/net/wireless/b43/leds.c b/drivers/net/wireless/b43/leds.c index 36a9c42df835..76f4c7bad8b8 100644 --- a/drivers/net/wireless/b43/leds.c +++ b/drivers/net/wireless/b43/leds.c | |||
@@ -72,6 +72,9 @@ static void b43_led_brightness_set(struct led_classdev *led_dev, | |||
72 | struct b43_wldev *dev = led->dev; | 72 | struct b43_wldev *dev = led->dev; |
73 | bool radio_enabled; | 73 | bool radio_enabled; |
74 | 74 | ||
75 | if (unlikely(b43_status(dev) < B43_STAT_INITIALIZED)) | ||
76 | return; | ||
77 | |||
75 | /* Checking the radio-enabled status here is slightly racy, | 78 | /* Checking the radio-enabled status here is slightly racy, |
76 | * but we want to avoid the locking overhead and we don't care | 79 | * but we want to avoid the locking overhead and we don't care |
77 | * whether the LED has the wrong state for a second. */ | 80 | * whether the LED has the wrong state for a second. */ |
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c index fa4b0d8b74a2..a70827793086 100644 --- a/drivers/net/wireless/b43/main.c +++ b/drivers/net/wireless/b43/main.c | |||
@@ -2883,12 +2883,11 @@ static int b43_op_tx(struct ieee80211_hw *hw, | |||
2883 | 2883 | ||
2884 | if (unlikely(skb->len < 2 + 2 + 6)) { | 2884 | if (unlikely(skb->len < 2 + 2 + 6)) { |
2885 | /* Too short, this can't be a valid frame. */ | 2885 | /* Too short, this can't be a valid frame. */ |
2886 | dev_kfree_skb_any(skb); | 2886 | goto drop_packet; |
2887 | return NETDEV_TX_OK; | ||
2888 | } | 2887 | } |
2889 | B43_WARN_ON(skb_shinfo(skb)->nr_frags); | 2888 | B43_WARN_ON(skb_shinfo(skb)->nr_frags); |
2890 | if (unlikely(!dev)) | 2889 | if (unlikely(!dev)) |
2891 | return NETDEV_TX_BUSY; | 2890 | goto drop_packet; |
2892 | 2891 | ||
2893 | /* Transmissions on seperate queues can run concurrently. */ | 2892 | /* Transmissions on seperate queues can run concurrently. */ |
2894 | read_lock_irqsave(&wl->tx_lock, flags); | 2893 | read_lock_irqsave(&wl->tx_lock, flags); |
@@ -2904,7 +2903,12 @@ static int b43_op_tx(struct ieee80211_hw *hw, | |||
2904 | read_unlock_irqrestore(&wl->tx_lock, flags); | 2903 | read_unlock_irqrestore(&wl->tx_lock, flags); |
2905 | 2904 | ||
2906 | if (unlikely(err)) | 2905 | if (unlikely(err)) |
2907 | return NETDEV_TX_BUSY; | 2906 | goto drop_packet; |
2907 | return NETDEV_TX_OK; | ||
2908 | |||
2909 | drop_packet: | ||
2910 | /* We can not transmit this packet. Drop it. */ | ||
2911 | dev_kfree_skb_any(skb); | ||
2908 | return NETDEV_TX_OK; | 2912 | return NETDEV_TX_OK; |
2909 | } | 2913 | } |
2910 | 2914 | ||
diff --git a/drivers/net/wireless/b43legacy/dma.c b/drivers/net/wireless/b43legacy/dma.c index c990f87b107a..93ddc1cbcc8b 100644 --- a/drivers/net/wireless/b43legacy/dma.c +++ b/drivers/net/wireless/b43legacy/dma.c | |||
@@ -876,6 +876,7 @@ struct b43legacy_dmaring *b43legacy_setup_dmaring(struct b43legacy_wldev *dev, | |||
876 | if (!ring) | 876 | if (!ring) |
877 | goto out; | 877 | goto out; |
878 | ring->type = type; | 878 | ring->type = type; |
879 | ring->dev = dev; | ||
879 | 880 | ||
880 | nr_slots = B43legacy_RXRING_SLOTS; | 881 | nr_slots = B43legacy_RXRING_SLOTS; |
881 | if (for_tx) | 882 | if (for_tx) |
@@ -922,7 +923,6 @@ struct b43legacy_dmaring *b43legacy_setup_dmaring(struct b43legacy_wldev *dev, | |||
922 | DMA_TO_DEVICE); | 923 | DMA_TO_DEVICE); |
923 | } | 924 | } |
924 | 925 | ||
925 | ring->dev = dev; | ||
926 | ring->nr_slots = nr_slots; | 926 | ring->nr_slots = nr_slots; |
927 | ring->mmio_base = b43legacy_dmacontroller_base(type, controller_index); | 927 | ring->mmio_base = b43legacy_dmacontroller_base(type, controller_index); |
928 | ring->index = controller_index; | 928 | ring->index = controller_index; |
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c index 204077c13870..3e612d0a13e8 100644 --- a/drivers/net/wireless/b43legacy/main.c +++ b/drivers/net/wireless/b43legacy/main.c | |||
@@ -2378,8 +2378,10 @@ static int b43legacy_op_tx(struct ieee80211_hw *hw, | |||
2378 | } else | 2378 | } else |
2379 | err = b43legacy_dma_tx(dev, skb, ctl); | 2379 | err = b43legacy_dma_tx(dev, skb, ctl); |
2380 | out: | 2380 | out: |
2381 | if (unlikely(err)) | 2381 | if (unlikely(err)) { |
2382 | return NETDEV_TX_BUSY; | 2382 | /* Drop the packet. */ |
2383 | dev_kfree_skb_any(skb); | ||
2384 | } | ||
2383 | return NETDEV_TX_OK; | 2385 | return NETDEV_TX_OK; |
2384 | } | 2386 | } |
2385 | 2387 | ||
diff --git a/drivers/net/wireless/hostap/hostap_80211_rx.c b/drivers/net/wireless/hostap/hostap_80211_rx.c index 4fd73809602e..020f450e9dba 100644 --- a/drivers/net/wireless/hostap/hostap_80211_rx.c +++ b/drivers/net/wireless/hostap/hostap_80211_rx.c | |||
@@ -64,7 +64,7 @@ int prism2_rx_80211(struct net_device *dev, struct sk_buff *skb, | |||
64 | int hdrlen, phdrlen, head_need, tail_need; | 64 | int hdrlen, phdrlen, head_need, tail_need; |
65 | u16 fc; | 65 | u16 fc; |
66 | int prism_header, ret; | 66 | int prism_header, ret; |
67 | struct ieee80211_hdr_4addr *hdr; | 67 | struct ieee80211_hdr_4addr *fhdr; |
68 | 68 | ||
69 | iface = netdev_priv(dev); | 69 | iface = netdev_priv(dev); |
70 | local = iface->local; | 70 | local = iface->local; |
@@ -83,8 +83,8 @@ int prism2_rx_80211(struct net_device *dev, struct sk_buff *skb, | |||
83 | phdrlen = 0; | 83 | phdrlen = 0; |
84 | } | 84 | } |
85 | 85 | ||
86 | hdr = (struct ieee80211_hdr_4addr *) skb->data; | 86 | fhdr = (struct ieee80211_hdr_4addr *) skb->data; |
87 | fc = le16_to_cpu(hdr->frame_ctl); | 87 | fc = le16_to_cpu(fhdr->frame_ctl); |
88 | 88 | ||
89 | if (type == PRISM2_RX_MGMT && (fc & IEEE80211_FCTL_VERS)) { | 89 | if (type == PRISM2_RX_MGMT && (fc & IEEE80211_FCTL_VERS)) { |
90 | printk(KERN_DEBUG "%s: dropped management frame with header " | 90 | printk(KERN_DEBUG "%s: dropped management frame with header " |
@@ -551,7 +551,7 @@ hostap_rx_frame_wds(local_info_t *local, struct ieee80211_hdr_4addr *hdr, | |||
551 | hdr->addr1[2] != 0xff || hdr->addr1[3] != 0xff || | 551 | hdr->addr1[2] != 0xff || hdr->addr1[3] != 0xff || |
552 | hdr->addr1[4] != 0xff || hdr->addr1[5] != 0xff)) { | 552 | hdr->addr1[4] != 0xff || hdr->addr1[5] != 0xff)) { |
553 | /* RA (or BSSID) is not ours - drop */ | 553 | /* RA (or BSSID) is not ours - drop */ |
554 | PDEBUG(DEBUG_EXTRA, "%s: received WDS frame with " | 554 | PDEBUG(DEBUG_EXTRA2, "%s: received WDS frame with " |
555 | "not own or broadcast %s=%s\n", | 555 | "not own or broadcast %s=%s\n", |
556 | local->dev->name, | 556 | local->dev->name, |
557 | fc & IEEE80211_FCTL_FROMDS ? "RA" : "BSSID", | 557 | fc & IEEE80211_FCTL_FROMDS ? "RA" : "BSSID", |
diff --git a/drivers/net/wireless/hostap/hostap_ap.c b/drivers/net/wireless/hostap/hostap_ap.c index 0acd9589c48c..ab981afd481d 100644 --- a/drivers/net/wireless/hostap/hostap_ap.c +++ b/drivers/net/wireless/hostap/hostap_ap.c | |||
@@ -1930,7 +1930,7 @@ static void handle_pspoll(local_info_t *local, | |||
1930 | PDEBUG(DEBUG_PS, " PSPOLL and AID[15:14] not set\n"); | 1930 | PDEBUG(DEBUG_PS, " PSPOLL and AID[15:14] not set\n"); |
1931 | return; | 1931 | return; |
1932 | } | 1932 | } |
1933 | aid &= ~BIT(15) & ~BIT(14); | 1933 | aid &= ~(BIT(15) | BIT(14)); |
1934 | if (aid == 0 || aid > MAX_AID_TABLE_SIZE) { | 1934 | if (aid == 0 || aid > MAX_AID_TABLE_SIZE) { |
1935 | PDEBUG(DEBUG_PS, " invalid aid=%d\n", aid); | 1935 | PDEBUG(DEBUG_PS, " invalid aid=%d\n", aid); |
1936 | return; | 1936 | return; |
diff --git a/drivers/net/wireless/hostap/hostap_cs.c b/drivers/net/wireless/hostap/hostap_cs.c index ed4317a17cbb..80039a0ae027 100644 --- a/drivers/net/wireless/hostap/hostap_cs.c +++ b/drivers/net/wireless/hostap/hostap_cs.c | |||
@@ -533,10 +533,10 @@ static void prism2_detach(struct pcmcia_device *link) | |||
533 | do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) | 533 | do { last_fn = (fn); if ((last_ret = (ret)) != 0) goto cs_failed; } while (0) |
534 | 534 | ||
535 | #define CFG_CHECK2(fn, retf) \ | 535 | #define CFG_CHECK2(fn, retf) \ |
536 | do { int ret = (retf); \ | 536 | do { int _ret = (retf); \ |
537 | if (ret != 0) { \ | 537 | if (_ret != 0) { \ |
538 | PDEBUG(DEBUG_EXTRA, "CardServices(" #fn ") returned %d\n", ret); \ | 538 | PDEBUG(DEBUG_EXTRA, "CardServices(" #fn ") returned %d\n", _ret); \ |
539 | cs_error(link, fn, ret); \ | 539 | cs_error(link, fn, _ret); \ |
540 | goto next_entry; \ | 540 | goto next_entry; \ |
541 | } \ | 541 | } \ |
542 | } while (0) | 542 | } while (0) |
diff --git a/drivers/net/wireless/hostap/hostap_hw.c b/drivers/net/wireless/hostap/hostap_hw.c index cdf90c40f11b..936f52e3d95c 100644 --- a/drivers/net/wireless/hostap/hostap_hw.c +++ b/drivers/net/wireless/hostap/hostap_hw.c | |||
@@ -2835,7 +2835,7 @@ static void hostap_passive_scan(unsigned long data) | |||
2835 | { | 2835 | { |
2836 | local_info_t *local = (local_info_t *) data; | 2836 | local_info_t *local = (local_info_t *) data; |
2837 | struct net_device *dev = local->dev; | 2837 | struct net_device *dev = local->dev; |
2838 | u16 channel; | 2838 | u16 chan; |
2839 | 2839 | ||
2840 | if (local->passive_scan_interval <= 0) | 2840 | if (local->passive_scan_interval <= 0) |
2841 | return; | 2841 | return; |
@@ -2872,11 +2872,11 @@ static void hostap_passive_scan(unsigned long data) | |||
2872 | 2872 | ||
2873 | printk(KERN_DEBUG "%s: passive scan channel %d\n", | 2873 | printk(KERN_DEBUG "%s: passive scan channel %d\n", |
2874 | dev->name, local->passive_scan_channel); | 2874 | dev->name, local->passive_scan_channel); |
2875 | channel = local->passive_scan_channel; | 2875 | chan = local->passive_scan_channel; |
2876 | local->passive_scan_state = PASSIVE_SCAN_WAIT; | 2876 | local->passive_scan_state = PASSIVE_SCAN_WAIT; |
2877 | local->passive_scan_timer.expires = jiffies + HZ / 10; | 2877 | local->passive_scan_timer.expires = jiffies + HZ / 10; |
2878 | } else { | 2878 | } else { |
2879 | channel = local->channel; | 2879 | chan = local->channel; |
2880 | local->passive_scan_state = PASSIVE_SCAN_LISTEN; | 2880 | local->passive_scan_state = PASSIVE_SCAN_LISTEN; |
2881 | local->passive_scan_timer.expires = jiffies + | 2881 | local->passive_scan_timer.expires = jiffies + |
2882 | local->passive_scan_interval * HZ; | 2882 | local->passive_scan_interval * HZ; |
@@ -2884,9 +2884,9 @@ static void hostap_passive_scan(unsigned long data) | |||
2884 | 2884 | ||
2885 | if (hfa384x_cmd_callback(dev, HFA384X_CMDCODE_TEST | | 2885 | if (hfa384x_cmd_callback(dev, HFA384X_CMDCODE_TEST | |
2886 | (HFA384X_TEST_CHANGE_CHANNEL << 8), | 2886 | (HFA384X_TEST_CHANGE_CHANNEL << 8), |
2887 | channel, NULL, 0)) | 2887 | chan, NULL, 0)) |
2888 | printk(KERN_ERR "%s: passive scan channel set %d " | 2888 | printk(KERN_ERR "%s: passive scan channel set %d " |
2889 | "failed\n", dev->name, channel); | 2889 | "failed\n", dev->name, chan); |
2890 | 2890 | ||
2891 | add_timer(&local->passive_scan_timer); | 2891 | add_timer(&local->passive_scan_timer); |
2892 | } | 2892 | } |
diff --git a/drivers/net/wireless/hostap/hostap_main.c b/drivers/net/wireless/hostap/hostap_main.c index f7aec9309d04..a38e85f334df 100644 --- a/drivers/net/wireless/hostap/hostap_main.c +++ b/drivers/net/wireless/hostap/hostap_main.c | |||
@@ -594,7 +594,8 @@ void hostap_dump_tx_header(const char *name, const struct hfa384x_tx_frame *tx) | |||
594 | } | 594 | } |
595 | 595 | ||
596 | 596 | ||
597 | int hostap_80211_header_parse(const struct sk_buff *skb, unsigned char *haddr) | 597 | static int hostap_80211_header_parse(const struct sk_buff *skb, |
598 | unsigned char *haddr) | ||
598 | { | 599 | { |
599 | struct hostap_interface *iface = netdev_priv(skb->dev); | 600 | struct hostap_interface *iface = netdev_priv(skb->dev); |
600 | local_info_t *local = iface->local; | 601 | local_info_t *local = iface->local; |
@@ -857,7 +858,6 @@ const struct header_ops hostap_80211_ops = { | |||
857 | .rebuild = eth_rebuild_header, | 858 | .rebuild = eth_rebuild_header, |
858 | .cache = eth_header_cache, | 859 | .cache = eth_header_cache, |
859 | .cache_update = eth_header_cache_update, | 860 | .cache_update = eth_header_cache_update, |
860 | |||
861 | .parse = hostap_80211_header_parse, | 861 | .parse = hostap_80211_header_parse, |
862 | }; | 862 | }; |
863 | EXPORT_SYMBOL(hostap_80211_ops); | 863 | EXPORT_SYMBOL(hostap_80211_ops); |
@@ -1150,7 +1150,6 @@ EXPORT_SYMBOL(hostap_set_roaming); | |||
1150 | EXPORT_SYMBOL(hostap_set_auth_algs); | 1150 | EXPORT_SYMBOL(hostap_set_auth_algs); |
1151 | EXPORT_SYMBOL(hostap_dump_rx_header); | 1151 | EXPORT_SYMBOL(hostap_dump_rx_header); |
1152 | EXPORT_SYMBOL(hostap_dump_tx_header); | 1152 | EXPORT_SYMBOL(hostap_dump_tx_header); |
1153 | EXPORT_SYMBOL(hostap_80211_header_parse); | ||
1154 | EXPORT_SYMBOL(hostap_80211_get_hdrlen); | 1153 | EXPORT_SYMBOL(hostap_80211_get_hdrlen); |
1155 | EXPORT_SYMBOL(hostap_get_stats); | 1154 | EXPORT_SYMBOL(hostap_get_stats); |
1156 | EXPORT_SYMBOL(hostap_setup_dev); | 1155 | EXPORT_SYMBOL(hostap_setup_dev); |
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 13925b627e3b..b1b3c523185d 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -2227,7 +2227,10 @@ static int iwl3945_scan_initiate(struct iwl3945_priv *priv) | |||
2227 | } | 2227 | } |
2228 | 2228 | ||
2229 | IWL_DEBUG_INFO("Starting scan...\n"); | 2229 | IWL_DEBUG_INFO("Starting scan...\n"); |
2230 | priv->scan_bands = 2; | 2230 | if (priv->cfg->sku & IWL_SKU_G) |
2231 | priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ); | ||
2232 | if (priv->cfg->sku & IWL_SKU_A) | ||
2233 | priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ); | ||
2231 | set_bit(STATUS_SCANNING, &priv->status); | 2234 | set_bit(STATUS_SCANNING, &priv->status); |
2232 | priv->scan_start = jiffies; | 2235 | priv->scan_start = jiffies; |
2233 | priv->scan_pass_start = priv->scan_start; | 2236 | priv->scan_pass_start = priv->scan_start; |
@@ -3352,13 +3355,18 @@ static void iwl3945_rx_scan_complete_notif(struct iwl3945_priv *priv, | |||
3352 | cancel_delayed_work(&priv->scan_check); | 3355 | cancel_delayed_work(&priv->scan_check); |
3353 | 3356 | ||
3354 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", | 3357 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", |
3355 | (priv->scan_bands == 2) ? "2.4" : "5.2", | 3358 | (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ? |
3359 | "2.4" : "5.2", | ||
3356 | jiffies_to_msecs(elapsed_jiffies | 3360 | jiffies_to_msecs(elapsed_jiffies |
3357 | (priv->scan_pass_start, jiffies))); | 3361 | (priv->scan_pass_start, jiffies))); |
3358 | 3362 | ||
3359 | /* Remove this scanned band from the list | 3363 | /* Remove this scanned band from the list of pending |
3360 | * of pending bands to scan */ | 3364 | * bands to scan, band G precedes A in order of scanning |
3361 | priv->scan_bands--; | 3365 | * as seen in iwl3945_bg_request_scan */ |
3366 | if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) | ||
3367 | priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ); | ||
3368 | else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) | ||
3369 | priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ); | ||
3362 | 3370 | ||
3363 | /* If a request to abort was given, or the scan did not succeed | 3371 | /* If a request to abort was given, or the scan did not succeed |
3364 | * then we reset the scan state machine and terminate, | 3372 | * then we reset the scan state machine and terminate, |
@@ -4972,7 +4980,7 @@ static int iwl3945_get_channels_for_scan(struct iwl3945_priv *priv, | |||
4972 | 4980 | ||
4973 | ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel); | 4981 | ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel); |
4974 | if (!is_channel_valid(ch_info)) { | 4982 | if (!is_channel_valid(ch_info)) { |
4975 | IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n", | 4983 | IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n", |
4976 | scan_ch->channel); | 4984 | scan_ch->channel); |
4977 | continue; | 4985 | continue; |
4978 | } | 4986 | } |
@@ -6315,21 +6323,16 @@ static void iwl3945_bg_request_scan(struct work_struct *data) | |||
6315 | 6323 | ||
6316 | /* flags + rate selection */ | 6324 | /* flags + rate selection */ |
6317 | 6325 | ||
6318 | switch (priv->scan_bands) { | 6326 | if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) { |
6319 | case 2: | ||
6320 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | 6327 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; |
6321 | scan->tx_cmd.rate = IWL_RATE_1M_PLCP; | 6328 | scan->tx_cmd.rate = IWL_RATE_1M_PLCP; |
6322 | scan->good_CRC_th = 0; | 6329 | scan->good_CRC_th = 0; |
6323 | band = IEEE80211_BAND_2GHZ; | 6330 | band = IEEE80211_BAND_2GHZ; |
6324 | break; | 6331 | } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) { |
6325 | |||
6326 | case 1: | ||
6327 | scan->tx_cmd.rate = IWL_RATE_6M_PLCP; | 6332 | scan->tx_cmd.rate = IWL_RATE_6M_PLCP; |
6328 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | 6333 | scan->good_CRC_th = IWL_GOOD_CRC_TH; |
6329 | band = IEEE80211_BAND_5GHZ; | 6334 | band = IEEE80211_BAND_5GHZ; |
6330 | break; | 6335 | } else { |
6331 | |||
6332 | default: | ||
6333 | IWL_WARNING("Invalid scan band count\n"); | 6336 | IWL_WARNING("Invalid scan band count\n"); |
6334 | goto done; | 6337 | goto done; |
6335 | } | 6338 | } |
@@ -6770,7 +6773,7 @@ static int iwl3945_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *co | |||
6770 | ch_info = iwl3945_get_channel_info(priv, conf->channel->band, | 6773 | ch_info = iwl3945_get_channel_info(priv, conf->channel->band, |
6771 | conf->channel->hw_value); | 6774 | conf->channel->hw_value); |
6772 | if (!is_channel_valid(ch_info)) { | 6775 | if (!is_channel_valid(ch_info)) { |
6773 | IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this SKU.\n", | 6776 | IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n", |
6774 | conf->channel->hw_value, conf->channel->band); | 6777 | conf->channel->hw_value, conf->channel->band); |
6775 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); | 6778 | IWL_DEBUG_MAC80211("leave - invalid channel\n"); |
6776 | spin_unlock_irqrestore(&priv->lock, flags); | 6779 | spin_unlock_irqrestore(&priv->lock, flags); |
diff --git a/drivers/net/wireless/iwlwifi/iwl4965-base.c b/drivers/net/wireless/iwlwifi/iwl4965-base.c index 883b42f7e998..5ed16ce78468 100644 --- a/drivers/net/wireless/iwlwifi/iwl4965-base.c +++ b/drivers/net/wireless/iwlwifi/iwl4965-base.c | |||
@@ -1774,7 +1774,10 @@ static int iwl4965_scan_initiate(struct iwl_priv *priv) | |||
1774 | } | 1774 | } |
1775 | 1775 | ||
1776 | IWL_DEBUG_INFO("Starting scan...\n"); | 1776 | IWL_DEBUG_INFO("Starting scan...\n"); |
1777 | priv->scan_bands = 2; | 1777 | if (priv->cfg->sku & IWL_SKU_G) |
1778 | priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ); | ||
1779 | if (priv->cfg->sku & IWL_SKU_A) | ||
1780 | priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ); | ||
1778 | set_bit(STATUS_SCANNING, &priv->status); | 1781 | set_bit(STATUS_SCANNING, &priv->status); |
1779 | priv->scan_start = jiffies; | 1782 | priv->scan_start = jiffies; |
1780 | priv->scan_pass_start = priv->scan_start; | 1783 | priv->scan_pass_start = priv->scan_start; |
@@ -3023,8 +3026,9 @@ static void iwl4965_rx_reply_tx(struct iwl_priv *priv, | |||
3023 | 3026 | ||
3024 | IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index); | 3027 | IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index); |
3025 | if (index != -1) { | 3028 | if (index != -1) { |
3026 | int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); | ||
3027 | #ifdef CONFIG_IWL4965_HT | 3029 | #ifdef CONFIG_IWL4965_HT |
3030 | int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index); | ||
3031 | |||
3028 | if (tid != MAX_TID_COUNT) | 3032 | if (tid != MAX_TID_COUNT) |
3029 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; | 3033 | priv->stations[sta_id].tid[tid].tfds_in_queue -= freed; |
3030 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && | 3034 | if (iwl4965_queue_space(&txq->q) > txq->q.low_mark && |
@@ -3276,13 +3280,18 @@ static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv, | |||
3276 | cancel_delayed_work(&priv->scan_check); | 3280 | cancel_delayed_work(&priv->scan_check); |
3277 | 3281 | ||
3278 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", | 3282 | IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n", |
3279 | (priv->scan_bands == 2) ? "2.4" : "5.2", | 3283 | (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ? |
3284 | "2.4" : "5.2", | ||
3280 | jiffies_to_msecs(elapsed_jiffies | 3285 | jiffies_to_msecs(elapsed_jiffies |
3281 | (priv->scan_pass_start, jiffies))); | 3286 | (priv->scan_pass_start, jiffies))); |
3282 | 3287 | ||
3283 | /* Remove this scanned band from the list | 3288 | /* Remove this scanned band from the list of pending |
3284 | * of pending bands to scan */ | 3289 | * bands to scan, band G precedes A in order of scanning |
3285 | priv->scan_bands--; | 3290 | * as seen in iwl_bg_request_scan */ |
3291 | if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) | ||
3292 | priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ); | ||
3293 | else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) | ||
3294 | priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ); | ||
3286 | 3295 | ||
3287 | /* If a request to abort was given, or the scan did not succeed | 3296 | /* If a request to abort was given, or the scan did not succeed |
3288 | * then we reset the scan state machine and terminate, | 3297 | * then we reset the scan state machine and terminate, |
@@ -3292,7 +3301,7 @@ static void iwl4965_rx_scan_complete_notif(struct iwl_priv *priv, | |||
3292 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); | 3301 | clear_bit(STATUS_SCAN_ABORTING, &priv->status); |
3293 | } else { | 3302 | } else { |
3294 | /* If there are more bands on this scan pass reschedule */ | 3303 | /* If there are more bands on this scan pass reschedule */ |
3295 | if (priv->scan_bands > 0) | 3304 | if (priv->scan_bands) |
3296 | goto reschedule; | 3305 | goto reschedule; |
3297 | } | 3306 | } |
3298 | 3307 | ||
@@ -4635,10 +4644,9 @@ static int iwl4965_get_channels_for_scan(struct iwl_priv *priv, | |||
4635 | 4644 | ||
4636 | scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq); | 4645 | scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq); |
4637 | 4646 | ||
4638 | ch_info = iwl_get_channel_info(priv, band, | 4647 | ch_info = iwl_get_channel_info(priv, band, scan_ch->channel); |
4639 | scan_ch->channel); | ||
4640 | if (!is_channel_valid(ch_info)) { | 4648 | if (!is_channel_valid(ch_info)) { |
4641 | IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n", | 4649 | IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n", |
4642 | scan_ch->channel); | 4650 | scan_ch->channel); |
4643 | continue; | 4651 | continue; |
4644 | } | 4652 | } |
@@ -5830,8 +5838,7 @@ static void iwl4965_bg_request_scan(struct work_struct *data) | |||
5830 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; | 5838 | scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE; |
5831 | 5839 | ||
5832 | 5840 | ||
5833 | switch (priv->scan_bands) { | 5841 | if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) { |
5834 | case 2: | ||
5835 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; | 5842 | scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK; |
5836 | scan->tx_cmd.rate_n_flags = | 5843 | scan->tx_cmd.rate_n_flags = |
5837 | iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP, | 5844 | iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP, |
@@ -5839,17 +5846,13 @@ static void iwl4965_bg_request_scan(struct work_struct *data) | |||
5839 | 5846 | ||
5840 | scan->good_CRC_th = 0; | 5847 | scan->good_CRC_th = 0; |
5841 | band = IEEE80211_BAND_2GHZ; | 5848 | band = IEEE80211_BAND_2GHZ; |
5842 | break; | 5849 | } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) { |
5843 | |||
5844 | case 1: | ||
5845 | scan->tx_cmd.rate_n_flags = | 5850 | scan->tx_cmd.rate_n_flags = |
5846 | iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP, | 5851 | iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP, |
5847 | RATE_MCS_ANT_B_MSK); | 5852 | RATE_MCS_ANT_B_MSK); |
5848 | scan->good_CRC_th = IWL_GOOD_CRC_TH; | 5853 | scan->good_CRC_th = IWL_GOOD_CRC_TH; |
5849 | band = IEEE80211_BAND_5GHZ; | 5854 | band = IEEE80211_BAND_5GHZ; |
5850 | break; | 5855 | } else { |
5851 | |||
5852 | default: | ||
5853 | IWL_WARNING("Invalid scan band count\n"); | 5856 | IWL_WARNING("Invalid scan band count\n"); |
5854 | goto done; | 5857 | goto done; |
5855 | } | 5858 | } |
diff --git a/drivers/net/wireless/prism54/islpci_eth.c b/drivers/net/wireless/prism54/islpci_eth.c index 762e85bef55d..e43bae97ed8f 100644 --- a/drivers/net/wireless/prism54/islpci_eth.c +++ b/drivers/net/wireless/prism54/islpci_eth.c | |||
@@ -290,7 +290,7 @@ islpci_monitor_rx(islpci_private *priv, struct sk_buff **skb) | |||
290 | 290 | ||
291 | avs->version = cpu_to_be32(P80211CAPTURE_VERSION); | 291 | avs->version = cpu_to_be32(P80211CAPTURE_VERSION); |
292 | avs->length = cpu_to_be32(sizeof (struct avs_80211_1_header)); | 292 | avs->length = cpu_to_be32(sizeof (struct avs_80211_1_header)); |
293 | avs->mactime = cpu_to_be64(le64_to_cpu(clock)); | 293 | avs->mactime = cpu_to_be64(clock); |
294 | avs->hosttime = cpu_to_be64(jiffies); | 294 | avs->hosttime = cpu_to_be64(jiffies); |
295 | avs->phytype = cpu_to_be32(6); /*OFDM: 6 for (g), 8 for (a) */ | 295 | avs->phytype = cpu_to_be32(6); /*OFDM: 6 for (g), 8 for (a) */ |
296 | avs->channel = cpu_to_be32(channel_of_freq(freq)); | 296 | avs->channel = cpu_to_be32(channel_of_freq(freq)); |
diff --git a/drivers/net/wireless/rt2x00/rt2500usb.c b/drivers/net/wireless/rt2x00/rt2500usb.c index fdbd0ef2be4b..61e59c17a60a 100644 --- a/drivers/net/wireless/rt2x00/rt2500usb.c +++ b/drivers/net/wireless/rt2x00/rt2500usb.c | |||
@@ -138,11 +138,8 @@ static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, | |||
138 | * Wait until the BBP becomes ready. | 138 | * Wait until the BBP becomes ready. |
139 | */ | 139 | */ |
140 | reg = rt2500usb_bbp_check(rt2x00dev); | 140 | reg = rt2500usb_bbp_check(rt2x00dev); |
141 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) { | 141 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) |
142 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n"); | 142 | goto exit_fail; |
143 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
144 | return; | ||
145 | } | ||
146 | 143 | ||
147 | /* | 144 | /* |
148 | * Write the data into the BBP. | 145 | * Write the data into the BBP. |
@@ -155,6 +152,13 @@ static void rt2500usb_bbp_write(struct rt2x00_dev *rt2x00dev, | |||
155 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); | 152 | rt2500usb_register_write_lock(rt2x00dev, PHY_CSR7, reg); |
156 | 153 | ||
157 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | 154 | mutex_unlock(&rt2x00dev->usb_cache_mutex); |
155 | |||
156 | return; | ||
157 | |||
158 | exit_fail: | ||
159 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
160 | |||
161 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Write failed.\n"); | ||
158 | } | 162 | } |
159 | 163 | ||
160 | static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, | 164 | static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, |
@@ -168,10 +172,8 @@ static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, | |||
168 | * Wait until the BBP becomes ready. | 172 | * Wait until the BBP becomes ready. |
169 | */ | 173 | */ |
170 | reg = rt2500usb_bbp_check(rt2x00dev); | 174 | reg = rt2500usb_bbp_check(rt2x00dev); |
171 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) { | 175 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) |
172 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n"); | 176 | goto exit_fail; |
173 | return; | ||
174 | } | ||
175 | 177 | ||
176 | /* | 178 | /* |
177 | * Write the request into the BBP. | 179 | * Write the request into the BBP. |
@@ -186,17 +188,21 @@ static void rt2500usb_bbp_read(struct rt2x00_dev *rt2x00dev, | |||
186 | * Wait until the BBP becomes ready. | 188 | * Wait until the BBP becomes ready. |
187 | */ | 189 | */ |
188 | reg = rt2500usb_bbp_check(rt2x00dev); | 190 | reg = rt2500usb_bbp_check(rt2x00dev); |
189 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) { | 191 | if (rt2x00_get_field16(reg, PHY_CSR8_BUSY)) |
190 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n"); | 192 | goto exit_fail; |
191 | *value = 0xff; | ||
192 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
193 | return; | ||
194 | } | ||
195 | 193 | ||
196 | rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); | 194 | rt2500usb_register_read_lock(rt2x00dev, PHY_CSR7, ®); |
197 | *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); | 195 | *value = rt2x00_get_field16(reg, PHY_CSR7_DATA); |
198 | 196 | ||
199 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | 197 | mutex_unlock(&rt2x00dev->usb_cache_mutex); |
198 | |||
199 | return; | ||
200 | |||
201 | exit_fail: | ||
202 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
203 | |||
204 | ERROR(rt2x00dev, "PHY_CSR8 register busy. Read failed.\n"); | ||
205 | *value = 0xff; | ||
200 | } | 206 | } |
201 | 207 | ||
202 | static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, | 208 | static void rt2500usb_rf_write(struct rt2x00_dev *rt2x00dev, |
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h index 611d98320593..b4bf1e09cf9a 100644 --- a/drivers/net/wireless/rt2x00/rt2x00.h +++ b/drivers/net/wireless/rt2x00/rt2x00.h | |||
@@ -821,6 +821,7 @@ struct rt2x00_dev { | |||
821 | /* | 821 | /* |
822 | * Scheduled work. | 822 | * Scheduled work. |
823 | */ | 823 | */ |
824 | struct workqueue_struct *workqueue; | ||
824 | struct work_struct intf_work; | 825 | struct work_struct intf_work; |
825 | struct work_struct filter_work; | 826 | struct work_struct filter_work; |
826 | 827 | ||
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c index 2673d568bcac..c997d4f28ab3 100644 --- a/drivers/net/wireless/rt2x00/rt2x00dev.c +++ b/drivers/net/wireless/rt2x00/rt2x00dev.c | |||
@@ -75,7 +75,7 @@ static void rt2x00lib_start_link_tuner(struct rt2x00_dev *rt2x00dev) | |||
75 | 75 | ||
76 | rt2x00lib_reset_link_tuner(rt2x00dev); | 76 | rt2x00lib_reset_link_tuner(rt2x00dev); |
77 | 77 | ||
78 | queue_delayed_work(rt2x00dev->hw->workqueue, | 78 | queue_delayed_work(rt2x00dev->workqueue, |
79 | &rt2x00dev->link.work, LINK_TUNE_INTERVAL); | 79 | &rt2x00dev->link.work, LINK_TUNE_INTERVAL); |
80 | } | 80 | } |
81 | 81 | ||
@@ -137,14 +137,6 @@ void rt2x00lib_disable_radio(struct rt2x00_dev *rt2x00dev) | |||
137 | return; | 137 | return; |
138 | 138 | ||
139 | /* | 139 | /* |
140 | * Stop all scheduled work. | ||
141 | */ | ||
142 | if (work_pending(&rt2x00dev->intf_work)) | ||
143 | cancel_work_sync(&rt2x00dev->intf_work); | ||
144 | if (work_pending(&rt2x00dev->filter_work)) | ||
145 | cancel_work_sync(&rt2x00dev->filter_work); | ||
146 | |||
147 | /* | ||
148 | * Stop the TX queues. | 140 | * Stop the TX queues. |
149 | */ | 141 | */ |
150 | ieee80211_stop_queues(rt2x00dev->hw); | 142 | ieee80211_stop_queues(rt2x00dev->hw); |
@@ -398,8 +390,8 @@ static void rt2x00lib_link_tuner(struct work_struct *work) | |||
398 | * Increase tuner counter, and reschedule the next link tuner run. | 390 | * Increase tuner counter, and reschedule the next link tuner run. |
399 | */ | 391 | */ |
400 | rt2x00dev->link.count++; | 392 | rt2x00dev->link.count++; |
401 | queue_delayed_work(rt2x00dev->hw->workqueue, &rt2x00dev->link.work, | 393 | queue_delayed_work(rt2x00dev->workqueue, |
402 | LINK_TUNE_INTERVAL); | 394 | &rt2x00dev->link.work, LINK_TUNE_INTERVAL); |
403 | } | 395 | } |
404 | 396 | ||
405 | static void rt2x00lib_packetfilter_scheduled(struct work_struct *work) | 397 | static void rt2x00lib_packetfilter_scheduled(struct work_struct *work) |
@@ -433,6 +425,15 @@ static void rt2x00lib_intf_scheduled_iter(void *data, u8 *mac, | |||
433 | 425 | ||
434 | spin_unlock(&intf->lock); | 426 | spin_unlock(&intf->lock); |
435 | 427 | ||
428 | /* | ||
429 | * It is possible the radio was disabled while the work had been | ||
430 | * scheduled. If that happens we should return here immediately, | ||
431 | * note that in the spinlock protected area above the delayed_flags | ||
432 | * have been cleared correctly. | ||
433 | */ | ||
434 | if (!test_bit(DEVICE_ENABLED_RADIO, &rt2x00dev->flags)) | ||
435 | return; | ||
436 | |||
436 | if (delayed_flags & DELAYED_UPDATE_BEACON) { | 437 | if (delayed_flags & DELAYED_UPDATE_BEACON) { |
437 | skb = ieee80211_beacon_get(rt2x00dev->hw, vif, &control); | 438 | skb = ieee80211_beacon_get(rt2x00dev->hw, vif, &control); |
438 | if (skb && rt2x00dev->ops->hw->beacon_update(rt2x00dev->hw, | 439 | if (skb && rt2x00dev->ops->hw->beacon_update(rt2x00dev->hw, |
@@ -441,7 +442,7 @@ static void rt2x00lib_intf_scheduled_iter(void *data, u8 *mac, | |||
441 | } | 442 | } |
442 | 443 | ||
443 | if (delayed_flags & DELAYED_CONFIG_ERP) | 444 | if (delayed_flags & DELAYED_CONFIG_ERP) |
444 | rt2x00lib_config_erp(rt2x00dev, intf, &intf->conf); | 445 | rt2x00lib_config_erp(rt2x00dev, intf, &conf); |
445 | 446 | ||
446 | if (delayed_flags & DELAYED_LED_ASSOC) | 447 | if (delayed_flags & DELAYED_LED_ASSOC) |
447 | rt2x00leds_led_assoc(rt2x00dev, !!rt2x00dev->intf_associated); | 448 | rt2x00leds_led_assoc(rt2x00dev, !!rt2x00dev->intf_associated); |
@@ -487,7 +488,7 @@ void rt2x00lib_beacondone(struct rt2x00_dev *rt2x00dev) | |||
487 | rt2x00lib_beacondone_iter, | 488 | rt2x00lib_beacondone_iter, |
488 | rt2x00dev); | 489 | rt2x00dev); |
489 | 490 | ||
490 | queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->intf_work); | 491 | queue_work(rt2x00dev->workqueue, &rt2x00dev->intf_work); |
491 | } | 492 | } |
492 | EXPORT_SYMBOL_GPL(rt2x00lib_beacondone); | 493 | EXPORT_SYMBOL_GPL(rt2x00lib_beacondone); |
493 | 494 | ||
@@ -1130,6 +1131,10 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev) | |||
1130 | /* | 1131 | /* |
1131 | * Initialize configuration work. | 1132 | * Initialize configuration work. |
1132 | */ | 1133 | */ |
1134 | rt2x00dev->workqueue = create_singlethread_workqueue("rt2x00lib"); | ||
1135 | if (!rt2x00dev->workqueue) | ||
1136 | goto exit; | ||
1137 | |||
1133 | INIT_WORK(&rt2x00dev->intf_work, rt2x00lib_intf_scheduled); | 1138 | INIT_WORK(&rt2x00dev->intf_work, rt2x00lib_intf_scheduled); |
1134 | INIT_WORK(&rt2x00dev->filter_work, rt2x00lib_packetfilter_scheduled); | 1139 | INIT_WORK(&rt2x00dev->filter_work, rt2x00lib_packetfilter_scheduled); |
1135 | INIT_DELAYED_WORK(&rt2x00dev->link.work, rt2x00lib_link_tuner); | 1140 | INIT_DELAYED_WORK(&rt2x00dev->link.work, rt2x00lib_link_tuner); |
@@ -1190,6 +1195,13 @@ void rt2x00lib_remove_dev(struct rt2x00_dev *rt2x00dev) | |||
1190 | rt2x00leds_unregister(rt2x00dev); | 1195 | rt2x00leds_unregister(rt2x00dev); |
1191 | 1196 | ||
1192 | /* | 1197 | /* |
1198 | * Stop all queued work. Note that most tasks will already be halted | ||
1199 | * during rt2x00lib_disable_radio() and rt2x00lib_uninitialize(). | ||
1200 | */ | ||
1201 | flush_workqueue(rt2x00dev->workqueue); | ||
1202 | destroy_workqueue(rt2x00dev->workqueue); | ||
1203 | |||
1204 | /* | ||
1193 | * Free ieee80211_hw memory. | 1205 | * Free ieee80211_hw memory. |
1194 | */ | 1206 | */ |
1195 | rt2x00lib_remove_hw(rt2x00dev); | 1207 | rt2x00lib_remove_hw(rt2x00dev); |
diff --git a/drivers/net/wireless/rt2x00/rt2x00mac.c b/drivers/net/wireless/rt2x00/rt2x00mac.c index 87e280a21971..9cb023edd2e9 100644 --- a/drivers/net/wireless/rt2x00/rt2x00mac.c +++ b/drivers/net/wireless/rt2x00/rt2x00mac.c | |||
@@ -428,7 +428,7 @@ void rt2x00mac_configure_filter(struct ieee80211_hw *hw, | |||
428 | if (!test_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags)) | 428 | if (!test_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags)) |
429 | rt2x00dev->ops->lib->config_filter(rt2x00dev, *total_flags); | 429 | rt2x00dev->ops->lib->config_filter(rt2x00dev, *total_flags); |
430 | else | 430 | else |
431 | queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work); | 431 | queue_work(rt2x00dev->workqueue, &rt2x00dev->filter_work); |
432 | } | 432 | } |
433 | EXPORT_SYMBOL_GPL(rt2x00mac_configure_filter); | 433 | EXPORT_SYMBOL_GPL(rt2x00mac_configure_filter); |
434 | 434 | ||
@@ -509,7 +509,7 @@ void rt2x00mac_bss_info_changed(struct ieee80211_hw *hw, | |||
509 | memcpy(&intf->conf, bss_conf, sizeof(*bss_conf)); | 509 | memcpy(&intf->conf, bss_conf, sizeof(*bss_conf)); |
510 | if (delayed) { | 510 | if (delayed) { |
511 | intf->delayed_flags |= delayed; | 511 | intf->delayed_flags |= delayed; |
512 | queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->intf_work); | 512 | queue_work(rt2x00dev->workqueue, &rt2x00dev->intf_work); |
513 | } | 513 | } |
514 | spin_unlock(&intf->lock); | 514 | spin_unlock(&intf->lock); |
515 | } | 515 | } |
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c index fff8386e816b..83cc0147f698 100644 --- a/drivers/net/wireless/rt2x00/rt73usb.c +++ b/drivers/net/wireless/rt2x00/rt73usb.c | |||
@@ -134,11 +134,8 @@ static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev, | |||
134 | * Wait until the BBP becomes ready. | 134 | * Wait until the BBP becomes ready. |
135 | */ | 135 | */ |
136 | reg = rt73usb_bbp_check(rt2x00dev); | 136 | reg = rt73usb_bbp_check(rt2x00dev); |
137 | if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) { | 137 | if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) |
138 | ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n"); | 138 | goto exit_fail; |
139 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
140 | return; | ||
141 | } | ||
142 | 139 | ||
143 | /* | 140 | /* |
144 | * Write the data into the BBP. | 141 | * Write the data into the BBP. |
@@ -151,6 +148,13 @@ static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev, | |||
151 | 148 | ||
152 | rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg); | 149 | rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg); |
153 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | 150 | mutex_unlock(&rt2x00dev->usb_cache_mutex); |
151 | |||
152 | return; | ||
153 | |||
154 | exit_fail: | ||
155 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
156 | |||
157 | ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n"); | ||
154 | } | 158 | } |
155 | 159 | ||
156 | static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, | 160 | static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, |
@@ -164,11 +168,8 @@ static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, | |||
164 | * Wait until the BBP becomes ready. | 168 | * Wait until the BBP becomes ready. |
165 | */ | 169 | */ |
166 | reg = rt73usb_bbp_check(rt2x00dev); | 170 | reg = rt73usb_bbp_check(rt2x00dev); |
167 | if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) { | 171 | if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) |
168 | ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n"); | 172 | goto exit_fail; |
169 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
170 | return; | ||
171 | } | ||
172 | 173 | ||
173 | /* | 174 | /* |
174 | * Write the request into the BBP. | 175 | * Write the request into the BBP. |
@@ -184,14 +185,19 @@ static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev, | |||
184 | * Wait until the BBP becomes ready. | 185 | * Wait until the BBP becomes ready. |
185 | */ | 186 | */ |
186 | reg = rt73usb_bbp_check(rt2x00dev); | 187 | reg = rt73usb_bbp_check(rt2x00dev); |
187 | if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) { | 188 | if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) |
188 | ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n"); | 189 | goto exit_fail; |
189 | *value = 0xff; | ||
190 | return; | ||
191 | } | ||
192 | 190 | ||
193 | *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE); | 191 | *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE); |
194 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | 192 | mutex_unlock(&rt2x00dev->usb_cache_mutex); |
193 | |||
194 | return; | ||
195 | |||
196 | exit_fail: | ||
197 | mutex_unlock(&rt2x00dev->usb_cache_mutex); | ||
198 | |||
199 | ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n"); | ||
200 | *value = 0xff; | ||
195 | } | 201 | } |
196 | 202 | ||
197 | static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev, | 203 | static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev, |
diff --git a/drivers/pci/access.c b/drivers/pci/access.c index ec8f7002b09d..39bb96b413ef 100644 --- a/drivers/pci/access.c +++ b/drivers/pci/access.c | |||
@@ -178,8 +178,7 @@ static int pci_vpd_pci22_read(struct pci_dev *dev, int pos, int size, | |||
178 | int ret; | 178 | int ret; |
179 | int begin, end, i; | 179 | int begin, end, i; |
180 | 180 | ||
181 | if (pos < 0 || pos > PCI_VPD_PCI22_SIZE || | 181 | if (pos < 0 || pos > vpd->base.len || size > vpd->base.len - pos) |
182 | size > PCI_VPD_PCI22_SIZE - pos) | ||
183 | return -EINVAL; | 182 | return -EINVAL; |
184 | if (size == 0) | 183 | if (size == 0) |
185 | return 0; | 184 | return 0; |
@@ -223,8 +222,8 @@ static int pci_vpd_pci22_write(struct pci_dev *dev, int pos, int size, | |||
223 | u32 val; | 222 | u32 val; |
224 | int ret; | 223 | int ret; |
225 | 224 | ||
226 | if (pos < 0 || pos > PCI_VPD_PCI22_SIZE || pos & 3 || | 225 | if (pos < 0 || pos > vpd->base.len || pos & 3 || |
227 | size > PCI_VPD_PCI22_SIZE - pos || size < 4) | 226 | size > vpd->base.len - pos || size < 4) |
228 | return -EINVAL; | 227 | return -EINVAL; |
229 | 228 | ||
230 | val = (u8) *buf++; | 229 | val = (u8) *buf++; |
@@ -255,11 +254,6 @@ out: | |||
255 | return 4; | 254 | return 4; |
256 | } | 255 | } |
257 | 256 | ||
258 | static int pci_vpd_pci22_get_size(struct pci_dev *dev) | ||
259 | { | ||
260 | return PCI_VPD_PCI22_SIZE; | ||
261 | } | ||
262 | |||
263 | static void pci_vpd_pci22_release(struct pci_dev *dev) | 257 | static void pci_vpd_pci22_release(struct pci_dev *dev) |
264 | { | 258 | { |
265 | kfree(container_of(dev->vpd, struct pci_vpd_pci22, base)); | 259 | kfree(container_of(dev->vpd, struct pci_vpd_pci22, base)); |
@@ -268,7 +262,6 @@ static void pci_vpd_pci22_release(struct pci_dev *dev) | |||
268 | static struct pci_vpd_ops pci_vpd_pci22_ops = { | 262 | static struct pci_vpd_ops pci_vpd_pci22_ops = { |
269 | .read = pci_vpd_pci22_read, | 263 | .read = pci_vpd_pci22_read, |
270 | .write = pci_vpd_pci22_write, | 264 | .write = pci_vpd_pci22_write, |
271 | .get_size = pci_vpd_pci22_get_size, | ||
272 | .release = pci_vpd_pci22_release, | 265 | .release = pci_vpd_pci22_release, |
273 | }; | 266 | }; |
274 | 267 | ||
@@ -284,6 +277,7 @@ int pci_vpd_pci22_init(struct pci_dev *dev) | |||
284 | if (!vpd) | 277 | if (!vpd) |
285 | return -ENOMEM; | 278 | return -ENOMEM; |
286 | 279 | ||
280 | vpd->base.len = PCI_VPD_PCI22_SIZE; | ||
287 | vpd->base.ops = &pci_vpd_pci22_ops; | 281 | vpd->base.ops = &pci_vpd_pci22_ops; |
288 | spin_lock_init(&vpd->lock); | 282 | spin_lock_init(&vpd->lock); |
289 | vpd->cap = cap; | 283 | vpd->cap = cap; |
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c index 648596d469f6..91156f85a926 100644 --- a/drivers/pci/hotplug/acpiphp_glue.c +++ b/drivers/pci/hotplug/acpiphp_glue.c | |||
@@ -700,9 +700,10 @@ cleanup_p2p_bridge(acpi_handle handle, u32 lvl, void *context, void **rv) | |||
700 | acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, (u32)1, | 700 | acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, (u32)1, |
701 | cleanup_p2p_bridge, NULL, NULL); | 701 | cleanup_p2p_bridge, NULL, NULL); |
702 | 702 | ||
703 | if (!(bridge = acpiphp_handle_to_bridge(handle))) | 703 | bridge = acpiphp_handle_to_bridge(handle); |
704 | return AE_OK; | 704 | if (bridge) |
705 | cleanup_bridge(bridge); | 705 | cleanup_bridge(bridge); |
706 | |||
706 | return AE_OK; | 707 | return AE_OK; |
707 | } | 708 | } |
708 | 709 | ||
@@ -715,9 +716,19 @@ static void remove_bridge(acpi_handle handle) | |||
715 | acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, | 716 | acpi_walk_namespace(ACPI_TYPE_DEVICE, handle, |
716 | (u32)1, cleanup_p2p_bridge, NULL, NULL); | 717 | (u32)1, cleanup_p2p_bridge, NULL, NULL); |
717 | 718 | ||
719 | /* | ||
720 | * On root bridges with hotplug slots directly underneath (ie, | ||
721 | * no p2p bridge inbetween), we call cleanup_bridge(). | ||
722 | * | ||
723 | * The else clause cleans up root bridges that either had no | ||
724 | * hotplug slots at all, or had a p2p bridge underneath. | ||
725 | */ | ||
718 | bridge = acpiphp_handle_to_bridge(handle); | 726 | bridge = acpiphp_handle_to_bridge(handle); |
719 | if (bridge) | 727 | if (bridge) |
720 | cleanup_bridge(bridge); | 728 | cleanup_bridge(bridge); |
729 | else | ||
730 | acpi_remove_notify_handler(handle, ACPI_SYSTEM_NOTIFY, | ||
731 | handle_hotplug_event_bridge); | ||
721 | } | 732 | } |
722 | 733 | ||
723 | static struct pci_dev * get_apic_pci_info(acpi_handle handle) | 734 | static struct pci_dev * get_apic_pci_info(acpi_handle handle) |
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c index 6f3c7446c329..9c718583a237 100644 --- a/drivers/pci/pci-sysfs.c +++ b/drivers/pci/pci-sysfs.c | |||
@@ -736,9 +736,9 @@ int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev) | |||
736 | attr = kzalloc(sizeof(*attr), GFP_ATOMIC); | 736 | attr = kzalloc(sizeof(*attr), GFP_ATOMIC); |
737 | if (attr) { | 737 | if (attr) { |
738 | pdev->vpd->attr = attr; | 738 | pdev->vpd->attr = attr; |
739 | attr->size = pdev->vpd->ops->get_size(pdev); | 739 | attr->size = pdev->vpd->len; |
740 | attr->attr.name = "vpd"; | 740 | attr->attr.name = "vpd"; |
741 | attr->attr.mode = S_IRUGO | S_IWUSR; | 741 | attr->attr.mode = S_IRUSR | S_IWUSR; |
742 | attr->read = pci_read_vpd; | 742 | attr->read = pci_read_vpd; |
743 | attr->write = pci_write_vpd; | 743 | attr->write = pci_write_vpd; |
744 | retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); | 744 | retval = sysfs_create_bin_file(&pdev->dev.kobj, attr); |
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h index 0a497c1b4227..00408c97e5fc 100644 --- a/drivers/pci/pci.h +++ b/drivers/pci/pci.h | |||
@@ -21,11 +21,11 @@ extern int pci_user_write_config_dword(struct pci_dev *dev, int where, u32 val); | |||
21 | struct pci_vpd_ops { | 21 | struct pci_vpd_ops { |
22 | int (*read)(struct pci_dev *dev, int pos, int size, char *buf); | 22 | int (*read)(struct pci_dev *dev, int pos, int size, char *buf); |
23 | int (*write)(struct pci_dev *dev, int pos, int size, const char *buf); | 23 | int (*write)(struct pci_dev *dev, int pos, int size, const char *buf); |
24 | int (*get_size)(struct pci_dev *dev); | ||
25 | void (*release)(struct pci_dev *dev); | 24 | void (*release)(struct pci_dev *dev); |
26 | }; | 25 | }; |
27 | 26 | ||
28 | struct pci_vpd { | 27 | struct pci_vpd { |
28 | unsigned int len; | ||
29 | struct pci_vpd_ops *ops; | 29 | struct pci_vpd_ops *ops; |
30 | struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ | 30 | struct bin_attribute *attr; /* descriptor for sysfs VPD entry */ |
31 | }; | 31 | }; |
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index dabb563f51d9..a3497dc6ebcf 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -1670,6 +1670,48 @@ static void __devinit quirk_via_cx700_pci_parking_caching(struct pci_dev *dev) | |||
1670 | } | 1670 | } |
1671 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching); | 1671 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, 0x324e, quirk_via_cx700_pci_parking_caching); |
1672 | 1672 | ||
1673 | /* | ||
1674 | * For Broadcom 5706, 5708, 5709 rev. A nics, any read beyond the | ||
1675 | * VPD end tag will hang the device. This problem was initially | ||
1676 | * observed when a vpd entry was created in sysfs | ||
1677 | * ('/sys/bus/pci/devices/<id>/vpd'). A read to this sysfs entry | ||
1678 | * will dump 32k of data. Reading a full 32k will cause an access | ||
1679 | * beyond the VPD end tag causing the device to hang. Once the device | ||
1680 | * is hung, the bnx2 driver will not be able to reset the device. | ||
1681 | * We believe that it is legal to read beyond the end tag and | ||
1682 | * therefore the solution is to limit the read/write length. | ||
1683 | */ | ||
1684 | static void __devinit quirk_brcm_570x_limit_vpd(struct pci_dev *dev) | ||
1685 | { | ||
1686 | /* Only disable the VPD capability for 5706, 5708, and 5709 rev. A */ | ||
1687 | if ((dev->device == PCI_DEVICE_ID_NX2_5706) || | ||
1688 | (dev->device == PCI_DEVICE_ID_NX2_5708) || | ||
1689 | ((dev->device == PCI_DEVICE_ID_NX2_5709) && | ||
1690 | (dev->revision & 0xf0) == 0x0)) { | ||
1691 | if (dev->vpd) | ||
1692 | dev->vpd->len = 0x80; | ||
1693 | } | ||
1694 | } | ||
1695 | |||
1696 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, | ||
1697 | PCI_DEVICE_ID_NX2_5706, | ||
1698 | quirk_brcm_570x_limit_vpd); | ||
1699 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, | ||
1700 | PCI_DEVICE_ID_NX2_5706S, | ||
1701 | quirk_brcm_570x_limit_vpd); | ||
1702 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, | ||
1703 | PCI_DEVICE_ID_NX2_5708, | ||
1704 | quirk_brcm_570x_limit_vpd); | ||
1705 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, | ||
1706 | PCI_DEVICE_ID_NX2_5708S, | ||
1707 | quirk_brcm_570x_limit_vpd); | ||
1708 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, | ||
1709 | PCI_DEVICE_ID_NX2_5709, | ||
1710 | quirk_brcm_570x_limit_vpd); | ||
1711 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_BROADCOM, | ||
1712 | PCI_DEVICE_ID_NX2_5709S, | ||
1713 | quirk_brcm_570x_limit_vpd); | ||
1714 | |||
1673 | #ifdef CONFIG_PCI_MSI | 1715 | #ifdef CONFIG_PCI_MSI |
1674 | /* Some chipsets do not support MSI. We cannot easily rely on setting | 1716 | /* Some chipsets do not support MSI. We cannot easily rely on setting |
1675 | * PCI_BUS_FLAGS_NO_MSI in its bus flags because there are actually | 1717 | * PCI_BUS_FLAGS_NO_MSI in its bus flags because there are actually |
diff --git a/drivers/pcmcia/omap_cf.c b/drivers/pcmcia/omap_cf.c index 46314b420765..569b746b5731 100644 --- a/drivers/pcmcia/omap_cf.c +++ b/drivers/pcmcia/omap_cf.c | |||
@@ -38,19 +38,19 @@ | |||
38 | #define CF_BASE 0xfffe2800 | 38 | #define CF_BASE 0xfffe2800 |
39 | 39 | ||
40 | /* status; read after IRQ */ | 40 | /* status; read after IRQ */ |
41 | #define CF_STATUS_REG __REG16(CF_BASE + 0x00) | 41 | #define CF_STATUS (CF_BASE + 0x00) |
42 | # define CF_STATUS_BAD_READ (1 << 2) | 42 | # define CF_STATUS_BAD_READ (1 << 2) |
43 | # define CF_STATUS_BAD_WRITE (1 << 1) | 43 | # define CF_STATUS_BAD_WRITE (1 << 1) |
44 | # define CF_STATUS_CARD_DETECT (1 << 0) | 44 | # define CF_STATUS_CARD_DETECT (1 << 0) |
45 | 45 | ||
46 | /* which chipselect (CS0..CS3) is used for CF (active low) */ | 46 | /* which chipselect (CS0..CS3) is used for CF (active low) */ |
47 | #define CF_CFG_REG __REG16(CF_BASE + 0x02) | 47 | #define CF_CFG (CF_BASE + 0x02) |
48 | 48 | ||
49 | /* card reset */ | 49 | /* card reset */ |
50 | #define CF_CONTROL_REG __REG16(CF_BASE + 0x04) | 50 | #define CF_CONTROL (CF_BASE + 0x04) |
51 | # define CF_CONTROL_RESET (1 << 0) | 51 | # define CF_CONTROL_RESET (1 << 0) |
52 | 52 | ||
53 | #define omap_cf_present() (!(CF_STATUS_REG & CF_STATUS_CARD_DETECT)) | 53 | #define omap_cf_present() (!(omap_readw(CF_STATUS) & CF_STATUS_CARD_DETECT)) |
54 | 54 | ||
55 | /*--------------------------------------------------------------------------*/ | 55 | /*--------------------------------------------------------------------------*/ |
56 | 56 | ||
@@ -139,11 +139,11 @@ omap_cf_set_socket(struct pcmcia_socket *sock, struct socket_state_t *s) | |||
139 | return -EINVAL; | 139 | return -EINVAL; |
140 | } | 140 | } |
141 | 141 | ||
142 | control = CF_CONTROL_REG; | 142 | control = omap_readw(CF_CONTROL); |
143 | if (s->flags & SS_RESET) | 143 | if (s->flags & SS_RESET) |
144 | CF_CONTROL_REG = CF_CONTROL_RESET; | 144 | omap_writew(CF_CONTROL_RESET, CF_CONTROL); |
145 | else | 145 | else |
146 | CF_CONTROL_REG = 0; | 146 | omap_writew(0, CF_CONTROL); |
147 | 147 | ||
148 | pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n", | 148 | pr_debug("%s: Vcc %d, io_irq %d, flags %04x csc %04x\n", |
149 | driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask); | 149 | driver_name, s->Vcc, s->io_irq, s->flags, s->csc_mask); |
@@ -270,7 +270,7 @@ static int __init omap_cf_probe(struct platform_device *pdev) | |||
270 | omap_cfg_reg(V10_1610_CF_IREQ); | 270 | omap_cfg_reg(V10_1610_CF_IREQ); |
271 | omap_cfg_reg(W10_1610_CF_RESET); | 271 | omap_cfg_reg(W10_1610_CF_RESET); |
272 | 272 | ||
273 | CF_CFG_REG = ~(1 << seg); | 273 | omap_writew(~(1 << seg), CF_CFG); |
274 | 274 | ||
275 | pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq); | 275 | pr_info("%s: cs%d on irq %d\n", driver_name, seg, irq); |
276 | 276 | ||
@@ -279,14 +279,15 @@ static int __init omap_cf_probe(struct platform_device *pdev) | |||
279 | * CF/PCMCIA variants... | 279 | * CF/PCMCIA variants... |
280 | */ | 280 | */ |
281 | pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name, | 281 | pr_debug("%s: cs%d, previous ccs %08x acs %08x\n", driver_name, |
282 | seg, EMIFS_CCS(seg), EMIFS_ACS(seg)); | 282 | seg, omap_readl(EMIFS_CCS(seg)), omap_readl(EMIFS_ACS(seg))); |
283 | EMIFS_CCS(seg) = 0x0004a1b3; /* synch mode 4 etc */ | 283 | omap_writel(0x0004a1b3, EMIFS_CCS(seg)); /* synch mode 4 etc */ |
284 | EMIFS_ACS(seg) = 0x00000000; /* OE hold/setup */ | 284 | omap_writel(0x00000000, EMIFS_ACS(seg)); /* OE hold/setup */ |
285 | 285 | ||
286 | /* CF uses armxor_ck, which is "always" available */ | 286 | /* CF uses armxor_ck, which is "always" available */ |
287 | 287 | ||
288 | pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name, | 288 | pr_debug("%s: sts %04x cfg %04x control %04x %s\n", driver_name, |
289 | CF_STATUS_REG, CF_CFG_REG, CF_CONTROL_REG, | 289 | omap_readw(CF_STATUS), omap_readw(CF_CFG), |
290 | omap_readw(CF_CONTROL), | ||
290 | omap_cf_present() ? "present" : "(not present)"); | 291 | omap_cf_present() ? "present" : "(not present)"); |
291 | 292 | ||
292 | cf->socket.owner = THIS_MODULE; | 293 | cf->socket.owner = THIS_MODULE; |
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index 4949dc4859be..fc85bf2e4a97 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig | |||
@@ -469,6 +469,16 @@ config RTC_DRV_VR41XX | |||
469 | To compile this driver as a module, choose M here: the | 469 | To compile this driver as a module, choose M here: the |
470 | module will be called rtc-vr41xx. | 470 | module will be called rtc-vr41xx. |
471 | 471 | ||
472 | config RTC_DRV_PL030 | ||
473 | tristate "ARM AMBA PL030 RTC" | ||
474 | depends on ARM_AMBA | ||
475 | help | ||
476 | If you say Y here you will get access to ARM AMBA | ||
477 | PrimeCell PL030 RTC found on certain ARM SOCs. | ||
478 | |||
479 | To compile this driver as a module, choose M here: the | ||
480 | module will be called rtc-pl030. | ||
481 | |||
472 | config RTC_DRV_PL031 | 482 | config RTC_DRV_PL031 |
473 | tristate "ARM AMBA PL031 RTC" | 483 | tristate "ARM AMBA PL031 RTC" |
474 | depends on ARM_AMBA | 484 | depends on ARM_AMBA |
@@ -495,12 +505,13 @@ config RTC_DRV_AT91RM9200 | |||
495 | this is powered by the backup power supply. | 505 | this is powered by the backup power supply. |
496 | 506 | ||
497 | config RTC_DRV_AT91SAM9 | 507 | config RTC_DRV_AT91SAM9 |
498 | tristate "AT91SAM9x" | 508 | tristate "AT91SAM9x/AT91CAP9" |
499 | depends on ARCH_AT91 && !(ARCH_AT91RM9200 || ARCH_AT91X40) | 509 | depends on ARCH_AT91 && !(ARCH_AT91RM9200 || ARCH_AT91X40) |
500 | help | 510 | help |
501 | RTC driver for the Atmel AT91SAM9x internal RTT (Real Time Timer). | 511 | RTC driver for the Atmel AT91SAM9x and AT91CAP9 internal RTT |
502 | These timers are powered by the backup power supply (such as a | 512 | (Real Time Timer). These timers are powered by the backup power |
503 | small coin cell battery), but do not need to be used as RTCs. | 513 | supply (such as a small coin cell battery), but do not need to |
514 | be used as RTCs. | ||
504 | 515 | ||
505 | (On AT91SAM9rl chips you probably want to use the dedicated RTC | 516 | (On AT91SAM9rl chips you probably want to use the dedicated RTC |
506 | module and leave the RTT available for other uses.) | 517 | module and leave the RTT available for other uses.) |
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index b6e14d51670b..b5d9d67df887 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile | |||
@@ -41,6 +41,7 @@ obj-$(CONFIG_RTC_DRV_MAX6902) += rtc-max6902.o | |||
41 | obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o | 41 | obj-$(CONFIG_RTC_DRV_OMAP) += rtc-omap.o |
42 | obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o | 42 | obj-$(CONFIG_RTC_DRV_PCF8563) += rtc-pcf8563.o |
43 | obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o | 43 | obj-$(CONFIG_RTC_DRV_PCF8583) += rtc-pcf8583.o |
44 | obj-$(CONFIG_RTC_DRV_PL030) += rtc-pl030.o | ||
44 | obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o | 45 | obj-$(CONFIG_RTC_DRV_PL031) += rtc-pl031.o |
45 | obj-$(CONFIG_RTC_DRV_PPC) += rtc-ppc.o | 46 | obj-$(CONFIG_RTC_DRV_PPC) += rtc-ppc.o |
46 | obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o | 47 | obj-$(CONFIG_RTC_DRV_R9701) += rtc-r9701.o |
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c index 39e64ab1ecb7..9c3db934cc24 100644 --- a/drivers/rtc/rtc-at91rm9200.c +++ b/drivers/rtc/rtc-at91rm9200.c | |||
@@ -29,10 +29,6 @@ | |||
29 | #include <linux/completion.h> | 29 | #include <linux/completion.h> |
30 | 30 | ||
31 | #include <asm/uaccess.h> | 31 | #include <asm/uaccess.h> |
32 | #include <asm/rtc.h> | ||
33 | |||
34 | #include <asm/mach/time.h> | ||
35 | |||
36 | #include <asm/arch/at91_rtc.h> | 32 | #include <asm/arch/at91_rtc.h> |
37 | 33 | ||
38 | 34 | ||
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c index 38d8742a4bdf..f0246ef413a4 100644 --- a/drivers/rtc/rtc-at91sam9.c +++ b/drivers/rtc/rtc-at91sam9.c | |||
@@ -19,7 +19,6 @@ | |||
19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
20 | #include <linux/ioctl.h> | 20 | #include <linux/ioctl.h> |
21 | 21 | ||
22 | #include <asm/mach/time.h> | ||
23 | #include <asm/arch/board.h> | 22 | #include <asm/arch/board.h> |
24 | #include <asm/arch/at91_rtt.h> | 23 | #include <asm/arch/at91_rtt.h> |
25 | 24 | ||
diff --git a/drivers/rtc/rtc-omap.c b/drivers/rtc/rtc-omap.c index 58f81c774943..eb23d8423f42 100644 --- a/drivers/rtc/rtc-omap.c +++ b/drivers/rtc/rtc-omap.c | |||
@@ -22,7 +22,6 @@ | |||
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | 23 | ||
24 | #include <asm/io.h> | 24 | #include <asm/io.h> |
25 | #include <asm/mach/time.h> | ||
26 | 25 | ||
27 | 26 | ||
28 | /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock | 27 | /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock |
diff --git a/drivers/rtc/rtc-pl030.c b/drivers/rtc/rtc-pl030.c new file mode 100644 index 000000000000..8448eeb9d675 --- /dev/null +++ b/drivers/rtc/rtc-pl030.c | |||
@@ -0,0 +1,217 @@ | |||
1 | /* | ||
2 | * linux/drivers/rtc/rtc-pl030.c | ||
3 | * | ||
4 | * Copyright (C) 2000-2001 Deep Blue Solutions Ltd. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/rtc.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/amba/bus.h> | ||
15 | #include <linux/io.h> | ||
16 | |||
17 | #define RTC_DR (0) | ||
18 | #define RTC_MR (4) | ||
19 | #define RTC_STAT (8) | ||
20 | #define RTC_EOI (8) | ||
21 | #define RTC_LR (12) | ||
22 | #define RTC_CR (16) | ||
23 | #define RTC_CR_MIE (1 << 0) | ||
24 | |||
25 | struct pl030_rtc { | ||
26 | struct rtc_device *rtc; | ||
27 | void __iomem *base; | ||
28 | }; | ||
29 | |||
30 | static irqreturn_t pl030_interrupt(int irq, void *dev_id) | ||
31 | { | ||
32 | struct pl030_rtc *rtc = dev_id; | ||
33 | writel(0, rtc->base + RTC_EOI); | ||
34 | return IRQ_HANDLED; | ||
35 | } | ||
36 | |||
37 | static int pl030_open(struct device *dev) | ||
38 | { | ||
39 | return 0; | ||
40 | } | ||
41 | |||
42 | static void pl030_release(struct device *dev) | ||
43 | { | ||
44 | } | ||
45 | |||
46 | static int pl030_ioctl(struct device *dev, unsigned int cmd, unsigned long arg) | ||
47 | { | ||
48 | return -ENOIOCTLCMD; | ||
49 | } | ||
50 | |||
51 | static int pl030_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) | ||
52 | { | ||
53 | struct pl030_rtc *rtc = dev_get_drvdata(dev); | ||
54 | |||
55 | rtc_time_to_tm(readl(rtc->base + RTC_MR), &alrm->time); | ||
56 | return 0; | ||
57 | } | ||
58 | |||
59 | static int pl030_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) | ||
60 | { | ||
61 | struct pl030_rtc *rtc = dev_get_drvdata(dev); | ||
62 | unsigned long time; | ||
63 | int ret; | ||
64 | |||
65 | /* | ||
66 | * At the moment, we can only deal with non-wildcarded alarm times. | ||
67 | */ | ||
68 | ret = rtc_valid_tm(&alrm->time); | ||
69 | if (ret == 0) | ||
70 | ret = rtc_tm_to_time(&alrm->time, &time); | ||
71 | if (ret == 0) | ||
72 | writel(time, rtc->base + RTC_MR); | ||
73 | return ret; | ||
74 | } | ||
75 | |||
76 | static int pl030_read_time(struct device *dev, struct rtc_time *tm) | ||
77 | { | ||
78 | struct pl030_rtc *rtc = dev_get_drvdata(dev); | ||
79 | |||
80 | rtc_time_to_tm(readl(rtc->base + RTC_DR), tm); | ||
81 | |||
82 | return 0; | ||
83 | } | ||
84 | |||
85 | /* | ||
86 | * Set the RTC time. Unfortunately, we can't accurately set | ||
87 | * the point at which the counter updates. | ||
88 | * | ||
89 | * Also, since RTC_LR is transferred to RTC_CR on next rising | ||
90 | * edge of the 1Hz clock, we must write the time one second | ||
91 | * in advance. | ||
92 | */ | ||
93 | static int pl030_set_time(struct device *dev, struct rtc_time *tm) | ||
94 | { | ||
95 | struct pl030_rtc *rtc = dev_get_drvdata(dev); | ||
96 | unsigned long time; | ||
97 | int ret; | ||
98 | |||
99 | ret = rtc_tm_to_time(tm, &time); | ||
100 | if (ret == 0) | ||
101 | writel(time + 1, rtc->base + RTC_LR); | ||
102 | |||
103 | return ret; | ||
104 | } | ||
105 | |||
106 | static const struct rtc_class_ops pl030_ops = { | ||
107 | .open = pl030_open, | ||
108 | .release = pl030_release, | ||
109 | .ioctl = pl030_ioctl, | ||
110 | .read_time = pl030_read_time, | ||
111 | .set_time = pl030_set_time, | ||
112 | .read_alarm = pl030_read_alarm, | ||
113 | .set_alarm = pl030_set_alarm, | ||
114 | }; | ||
115 | |||
116 | static int pl030_probe(struct amba_device *dev, void *id) | ||
117 | { | ||
118 | struct pl030_rtc *rtc; | ||
119 | int ret; | ||
120 | |||
121 | ret = amba_request_regions(dev, NULL); | ||
122 | if (ret) | ||
123 | goto err_req; | ||
124 | |||
125 | rtc = kmalloc(sizeof(*rtc), GFP_KERNEL); | ||
126 | if (!rtc) { | ||
127 | ret = -ENOMEM; | ||
128 | goto err_rtc; | ||
129 | } | ||
130 | |||
131 | rtc->base = ioremap(dev->res.start, SZ_4K); | ||
132 | if (!rtc->base) { | ||
133 | ret = -ENOMEM; | ||
134 | goto err_map; | ||
135 | } | ||
136 | |||
137 | __raw_writel(0, rtc->base + RTC_CR); | ||
138 | __raw_writel(0, rtc->base + RTC_EOI); | ||
139 | |||
140 | amba_set_drvdata(dev, rtc); | ||
141 | |||
142 | ret = request_irq(dev->irq[0], pl030_interrupt, IRQF_DISABLED, | ||
143 | "rtc-pl030", rtc); | ||
144 | if (ret) | ||
145 | goto err_irq; | ||
146 | |||
147 | rtc->rtc = rtc_device_register("pl030", &dev->dev, &pl030_ops, | ||
148 | THIS_MODULE); | ||
149 | if (IS_ERR(rtc->rtc)) { | ||
150 | ret = PTR_ERR(rtc->rtc); | ||
151 | goto err_reg; | ||
152 | } | ||
153 | |||
154 | return 0; | ||
155 | |||
156 | err_reg: | ||
157 | free_irq(dev->irq[0], rtc); | ||
158 | err_irq: | ||
159 | iounmap(rtc->base); | ||
160 | err_map: | ||
161 | kfree(rtc); | ||
162 | err_rtc: | ||
163 | amba_release_regions(dev); | ||
164 | err_req: | ||
165 | return ret; | ||
166 | } | ||
167 | |||
168 | static int pl030_remove(struct amba_device *dev) | ||
169 | { | ||
170 | struct pl030_rtc *rtc = amba_get_drvdata(dev); | ||
171 | |||
172 | amba_set_drvdata(dev, NULL); | ||
173 | |||
174 | writel(0, rtc->base + RTC_CR); | ||
175 | |||
176 | free_irq(dev->irq[0], rtc); | ||
177 | rtc_device_unregister(rtc->rtc); | ||
178 | iounmap(rtc->base); | ||
179 | kfree(rtc); | ||
180 | amba_release_regions(dev); | ||
181 | |||
182 | return 0; | ||
183 | } | ||
184 | |||
185 | static struct amba_id pl030_ids[] = { | ||
186 | { | ||
187 | .id = 0x00041030, | ||
188 | .mask = 0x000fffff, | ||
189 | }, | ||
190 | { 0, 0 }, | ||
191 | }; | ||
192 | |||
193 | static struct amba_driver pl030_driver = { | ||
194 | .drv = { | ||
195 | .name = "rtc-pl030", | ||
196 | }, | ||
197 | .probe = pl030_probe, | ||
198 | .remove = pl030_remove, | ||
199 | .id_table = pl030_ids, | ||
200 | }; | ||
201 | |||
202 | static int __init pl030_init(void) | ||
203 | { | ||
204 | return amba_driver_register(&pl030_driver); | ||
205 | } | ||
206 | |||
207 | static void __exit pl030_exit(void) | ||
208 | { | ||
209 | amba_driver_unregister(&pl030_driver); | ||
210 | } | ||
211 | |||
212 | module_init(pl030_init); | ||
213 | module_exit(pl030_exit); | ||
214 | |||
215 | MODULE_AUTHOR("Russell King <rmk@arm.linux.org.uk>"); | ||
216 | MODULE_DESCRIPTION("ARM AMBA PL030 RTC Driver"); | ||
217 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c index 2fd49edcc712..08b4610ec5a6 100644 --- a/drivers/rtc/rtc-pl031.c +++ b/drivers/rtc/rtc-pl031.c | |||
@@ -12,23 +12,12 @@ | |||
12 | * as published by the Free Software Foundation; either version | 12 | * as published by the Free Software Foundation; either version |
13 | * 2 of the License, or (at your option) any later version. | 13 | * 2 of the License, or (at your option) any later version. |
14 | */ | 14 | */ |
15 | |||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/module.h> | 15 | #include <linux/module.h> |
18 | #include <linux/rtc.h> | 16 | #include <linux/rtc.h> |
19 | #include <linux/init.h> | 17 | #include <linux/init.h> |
20 | #include <linux/fs.h> | ||
21 | #include <linux/interrupt.h> | 18 | #include <linux/interrupt.h> |
22 | #include <linux/string.h> | ||
23 | #include <linux/pm.h> | ||
24 | #include <linux/bitops.h> | ||
25 | |||
26 | #include <linux/amba/bus.h> | 19 | #include <linux/amba/bus.h> |
27 | 20 | #include <linux/io.h> | |
28 | #include <asm/io.h> | ||
29 | #include <asm/hardware.h> | ||
30 | #include <asm/irq.h> | ||
31 | #include <asm/rtc.h> | ||
32 | 21 | ||
33 | /* | 22 | /* |
34 | * Register definitions | 23 | * Register definitions |
@@ -142,13 +131,12 @@ static int pl031_remove(struct amba_device *adev) | |||
142 | { | 131 | { |
143 | struct pl031_local *ldata = dev_get_drvdata(&adev->dev); | 132 | struct pl031_local *ldata = dev_get_drvdata(&adev->dev); |
144 | 133 | ||
145 | if (ldata) { | 134 | amba_set_drvdata(adev, NULL); |
146 | dev_set_drvdata(&adev->dev, NULL); | 135 | free_irq(adev->irq[0], ldata->rtc); |
147 | free_irq(adev->irq[0], ldata->rtc); | 136 | rtc_device_unregister(ldata->rtc); |
148 | rtc_device_unregister(ldata->rtc); | 137 | iounmap(ldata->base); |
149 | iounmap(ldata->base); | 138 | kfree(ldata); |
150 | kfree(ldata); | 139 | amba_release_regions(adev); |
151 | } | ||
152 | 140 | ||
153 | return 0; | 141 | return 0; |
154 | } | 142 | } |
@@ -158,13 +146,15 @@ static int pl031_probe(struct amba_device *adev, void *id) | |||
158 | int ret; | 146 | int ret; |
159 | struct pl031_local *ldata; | 147 | struct pl031_local *ldata; |
160 | 148 | ||
149 | ret = amba_request_regions(adev, NULL); | ||
150 | if (ret) | ||
151 | goto err_req; | ||
161 | 152 | ||
162 | ldata = kmalloc(sizeof(struct pl031_local), GFP_KERNEL); | 153 | ldata = kmalloc(sizeof(struct pl031_local), GFP_KERNEL); |
163 | if (!ldata) { | 154 | if (!ldata) { |
164 | ret = -ENOMEM; | 155 | ret = -ENOMEM; |
165 | goto out; | 156 | goto out; |
166 | } | 157 | } |
167 | dev_set_drvdata(&adev->dev, ldata); | ||
168 | 158 | ||
169 | ldata->base = ioremap(adev->res.start, | 159 | ldata->base = ioremap(adev->res.start, |
170 | adev->res.end - adev->res.start + 1); | 160 | adev->res.end - adev->res.start + 1); |
@@ -173,6 +163,8 @@ static int pl031_probe(struct amba_device *adev, void *id) | |||
173 | goto out_no_remap; | 163 | goto out_no_remap; |
174 | } | 164 | } |
175 | 165 | ||
166 | amba_set_drvdata(adev, ldata); | ||
167 | |||
176 | if (request_irq(adev->irq[0], pl031_interrupt, IRQF_DISABLED, | 168 | if (request_irq(adev->irq[0], pl031_interrupt, IRQF_DISABLED, |
177 | "rtc-pl031", ldata->rtc)) { | 169 | "rtc-pl031", ldata->rtc)) { |
178 | ret = -EIO; | 170 | ret = -EIO; |
@@ -192,10 +184,12 @@ out_no_rtc: | |||
192 | free_irq(adev->irq[0], ldata->rtc); | 184 | free_irq(adev->irq[0], ldata->rtc); |
193 | out_no_irq: | 185 | out_no_irq: |
194 | iounmap(ldata->base); | 186 | iounmap(ldata->base); |
187 | amba_set_drvdata(adev, NULL); | ||
195 | out_no_remap: | 188 | out_no_remap: |
196 | dev_set_drvdata(&adev->dev, NULL); | ||
197 | kfree(ldata); | 189 | kfree(ldata); |
198 | out: | 190 | out: |
191 | amba_release_regions(adev); | ||
192 | err_req: | ||
199 | return ret; | 193 | return ret; |
200 | } | 194 | } |
201 | 195 | ||
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c index f26e0cad8f16..fed86e507fdf 100644 --- a/drivers/rtc/rtc-s3c.c +++ b/drivers/rtc/rtc-s3c.c | |||
@@ -26,10 +26,6 @@ | |||
26 | #include <asm/uaccess.h> | 26 | #include <asm/uaccess.h> |
27 | #include <asm/io.h> | 27 | #include <asm/io.h> |
28 | #include <asm/irq.h> | 28 | #include <asm/irq.h> |
29 | #include <asm/rtc.h> | ||
30 | |||
31 | #include <asm/mach/time.h> | ||
32 | |||
33 | #include <asm/plat-s3c/regs-rtc.h> | 29 | #include <asm/plat-s3c/regs-rtc.h> |
34 | 30 | ||
35 | /* I have yet to find an S3C implementation with more than one | 31 | /* I have yet to find an S3C implementation with more than one |
diff --git a/drivers/rtc/rtc-sa1100.c b/drivers/rtc/rtc-sa1100.c index 82f62d25f921..f47294c60148 100644 --- a/drivers/rtc/rtc-sa1100.c +++ b/drivers/rtc/rtc-sa1100.c | |||
@@ -33,7 +33,6 @@ | |||
33 | 33 | ||
34 | #include <asm/hardware.h> | 34 | #include <asm/hardware.h> |
35 | #include <asm/irq.h> | 35 | #include <asm/irq.h> |
36 | #include <asm/rtc.h> | ||
37 | 36 | ||
38 | #ifdef CONFIG_ARCH_PXA | 37 | #ifdef CONFIG_ARCH_PXA |
39 | #include <asm/arch/pxa-regs.h> | 38 | #include <asm/arch/pxa-regs.h> |
@@ -47,6 +46,42 @@ static unsigned long rtc_freq = 1024; | |||
47 | static struct rtc_time rtc_alarm; | 46 | static struct rtc_time rtc_alarm; |
48 | static DEFINE_SPINLOCK(sa1100_rtc_lock); | 47 | static DEFINE_SPINLOCK(sa1100_rtc_lock); |
49 | 48 | ||
49 | static inline int rtc_periodic_alarm(struct rtc_time *tm) | ||
50 | { | ||
51 | return (tm->tm_year == -1) || | ||
52 | ((unsigned)tm->tm_mon >= 12) || | ||
53 | ((unsigned)(tm->tm_mday - 1) >= 31) || | ||
54 | ((unsigned)tm->tm_hour > 23) || | ||
55 | ((unsigned)tm->tm_min > 59) || | ||
56 | ((unsigned)tm->tm_sec > 59); | ||
57 | } | ||
58 | |||
59 | /* | ||
60 | * Calculate the next alarm time given the requested alarm time mask | ||
61 | * and the current time. | ||
62 | */ | ||
63 | static void rtc_next_alarm_time(struct rtc_time *next, struct rtc_time *now, struct rtc_time *alrm) | ||
64 | { | ||
65 | unsigned long next_time; | ||
66 | unsigned long now_time; | ||
67 | |||
68 | next->tm_year = now->tm_year; | ||
69 | next->tm_mon = now->tm_mon; | ||
70 | next->tm_mday = now->tm_mday; | ||
71 | next->tm_hour = alrm->tm_hour; | ||
72 | next->tm_min = alrm->tm_min; | ||
73 | next->tm_sec = alrm->tm_sec; | ||
74 | |||
75 | rtc_tm_to_time(now, &now_time); | ||
76 | rtc_tm_to_time(next, &next_time); | ||
77 | |||
78 | if (next_time < now_time) { | ||
79 | /* Advance one day */ | ||
80 | next_time += 60 * 60 * 24; | ||
81 | rtc_time_to_tm(next_time, next); | ||
82 | } | ||
83 | } | ||
84 | |||
50 | static int rtc_update_alarm(struct rtc_time *alrm) | 85 | static int rtc_update_alarm(struct rtc_time *alrm) |
51 | { | 86 | { |
52 | struct rtc_time alarm_tm, now_tm; | 87 | struct rtc_time alarm_tm, now_tm; |
@@ -331,14 +366,14 @@ static int sa1100_rtc_probe(struct platform_device *pdev) | |||
331 | RCNR = 0; | 366 | RCNR = 0; |
332 | } | 367 | } |
333 | 368 | ||
369 | device_init_wakeup(&pdev->dev, 1); | ||
370 | |||
334 | rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops, | 371 | rtc = rtc_device_register(pdev->name, &pdev->dev, &sa1100_rtc_ops, |
335 | THIS_MODULE); | 372 | THIS_MODULE); |
336 | 373 | ||
337 | if (IS_ERR(rtc)) | 374 | if (IS_ERR(rtc)) |
338 | return PTR_ERR(rtc); | 375 | return PTR_ERR(rtc); |
339 | 376 | ||
340 | device_init_wakeup(&pdev->dev, 1); | ||
341 | |||
342 | platform_set_drvdata(pdev, rtc); | 377 | platform_set_drvdata(pdev, rtc); |
343 | 378 | ||
344 | return 0; | 379 | return 0; |
diff --git a/drivers/scsi/arm/Kconfig b/drivers/scsi/arm/Kconfig index 7236143941f3..a8587f1f5e7e 100644 --- a/drivers/scsi/arm/Kconfig +++ b/drivers/scsi/arm/Kconfig | |||
@@ -3,7 +3,7 @@ | |||
3 | # | 3 | # |
4 | config SCSI_ACORNSCSI_3 | 4 | config SCSI_ACORNSCSI_3 |
5 | tristate "Acorn SCSI card (aka30) support" | 5 | tristate "Acorn SCSI card (aka30) support" |
6 | depends on ARCH_ACORN && SCSI && BROKEN | 6 | depends on ARCH_ACORN && SCSI |
7 | select SCSI_SPI_ATTRS | 7 | select SCSI_SPI_ATTRS |
8 | help | 8 | help |
9 | This enables support for the Acorn SCSI card (aka30). If you have an | 9 | This enables support for the Acorn SCSI card (aka30). If you have an |
diff --git a/drivers/scsi/arm/acornscsi-io.S b/drivers/scsi/arm/acornscsi-io.S index 93467e6ac923..5cebe3105260 100644 --- a/drivers/scsi/arm/acornscsi-io.S +++ b/drivers/scsi/arm/acornscsi-io.S | |||
@@ -10,17 +10,10 @@ | |||
10 | #include <asm/assembler.h> | 10 | #include <asm/assembler.h> |
11 | #include <asm/hardware.h> | 11 | #include <asm/hardware.h> |
12 | 12 | ||
13 | #if (IO_BASE == (PCIO_BASE & 0xff000000)) | 13 | #if defined(__APCS_32__) |
14 | #define ADDR(off,reg) \ | 14 | #define LOADREGS(t,r,l...) ldm##t r, l |
15 | tst off, $0x80000000 ;\ | 15 | #elif defined(__APCS_26__) |
16 | mov reg, $IO_BASE ;\ | 16 | #define LOADREGS(t,r,l...) ldm##t r, l##^ |
17 | orreq reg, reg, $(PCIO_BASE & 0x00ff0000) | ||
18 | #else | ||
19 | #define ADDR(off,reg) \ | ||
20 | tst off, $0x80000000 ;\ | ||
21 | movne reg, $IO_BASE ;\ | ||
22 | moveq reg, $(PCIO_BASE & 0xff000000) ;\ | ||
23 | orreq reg, reg, $(PCIO_BASE & 0x00ff0000) | ||
24 | #endif | 17 | #endif |
25 | 18 | ||
26 | @ Purpose: transfer a block of data from the acorn scsi card to memory | 19 | @ Purpose: transfer a block of data from the acorn scsi card to memory |
diff --git a/drivers/scsi/arm/acornscsi.c b/drivers/scsi/arm/acornscsi.c index 8e53f02cc311..918ccf818757 100644 --- a/drivers/scsi/arm/acornscsi.c +++ b/drivers/scsi/arm/acornscsi.c | |||
@@ -123,12 +123,6 @@ | |||
123 | #define DBG(cmd,xxx...) xxx | 123 | #define DBG(cmd,xxx...) xxx |
124 | #endif | 124 | #endif |
125 | 125 | ||
126 | #ifndef STRINGIFY | ||
127 | #define STRINGIFY(x) #x | ||
128 | #endif | ||
129 | #define STRx(x) STRINGIFY(x) | ||
130 | #define NO_WRITE_STR STRx(NO_WRITE) | ||
131 | |||
132 | #include <linux/module.h> | 126 | #include <linux/module.h> |
133 | #include <linux/kernel.h> | 127 | #include <linux/kernel.h> |
134 | #include <linux/string.h> | 128 | #include <linux/string.h> |
@@ -141,9 +135,10 @@ | |||
141 | #include <linux/interrupt.h> | 135 | #include <linux/interrupt.h> |
142 | #include <linux/init.h> | 136 | #include <linux/init.h> |
143 | #include <linux/bitops.h> | 137 | #include <linux/bitops.h> |
138 | #include <linux/stringify.h> | ||
139 | #include <linux/io.h> | ||
144 | 140 | ||
145 | #include <asm/system.h> | 141 | #include <asm/system.h> |
146 | #include <asm/io.h> | ||
147 | #include <asm/ecard.h> | 142 | #include <asm/ecard.h> |
148 | 143 | ||
149 | #include "../scsi.h" | 144 | #include "../scsi.h" |
@@ -203,44 +198,46 @@ static void acornscsi_abortcmd(AS_Host *host, unsigned char tag); | |||
203 | * Miscellaneous | 198 | * Miscellaneous |
204 | */ | 199 | */ |
205 | 200 | ||
206 | static inline void | 201 | /* Offsets from MEMC base */ |
207 | sbic_arm_write(unsigned int io_port, int reg, int value) | 202 | #define SBIC_REGIDX 0x2000 |
203 | #define SBIC_REGVAL 0x2004 | ||
204 | #define DMAC_OFFSET 0x3000 | ||
205 | |||
206 | /* Offsets from FAST IOC base */ | ||
207 | #define INT_REG 0x2000 | ||
208 | #define PAGE_REG 0x3000 | ||
209 | |||
210 | static inline void sbic_arm_write(AS_Host *host, unsigned int reg, unsigned int value) | ||
208 | { | 211 | { |
209 | __raw_writeb(reg, io_port); | 212 | writeb(reg, host->base + SBIC_REGIDX); |
210 | __raw_writeb(value, io_port + 4); | 213 | writeb(value, host->base + SBIC_REGVAL); |
211 | } | 214 | } |
212 | 215 | ||
213 | #define sbic_arm_writenext(io,val) \ | 216 | static inline int sbic_arm_read(AS_Host *host, unsigned int reg) |
214 | __raw_writeb((val), (io) + 4) | ||
215 | |||
216 | static inline | ||
217 | int sbic_arm_read(unsigned int io_port, int reg) | ||
218 | { | 217 | { |
219 | if(reg == SBIC_ASR) | 218 | if(reg == SBIC_ASR) |
220 | return __raw_readl(io_port) & 255; | 219 | return readl(host->base + SBIC_REGIDX) & 255; |
221 | __raw_writeb(reg, io_port); | 220 | writeb(reg, host->base + SBIC_REGIDX); |
222 | return __raw_readl(io_port + 4) & 255; | 221 | return readl(host->base + SBIC_REGVAL) & 255; |
223 | } | 222 | } |
224 | 223 | ||
225 | #define sbic_arm_readnext(io) \ | 224 | #define sbic_arm_writenext(host, val) writeb((val), (host)->base + SBIC_REGVAL) |
226 | __raw_readb((io) + 4) | 225 | #define sbic_arm_readnext(host) readb((host)->base + SBIC_REGVAL) |
227 | 226 | ||
228 | #ifdef USE_DMAC | 227 | #ifdef USE_DMAC |
229 | #define dmac_read(io_port,reg) \ | 228 | #define dmac_read(host,reg) \ |
230 | inb((io_port) + (reg)) | 229 | readb((host)->base + DMAC_OFFSET + ((reg) << 2)) |
231 | 230 | ||
232 | #define dmac_write(io_port,reg,value) \ | 231 | #define dmac_write(host,reg,value) \ |
233 | ({ outb((value), (io_port) + (reg)); }) | 232 | ({ writeb((value), (host)->base + DMAC_OFFSET + ((reg) << 2)); }) |
234 | 233 | ||
235 | #define dmac_clearintr(io_port) \ | 234 | #define dmac_clearintr(host) writeb(0, (host)->fast + INT_REG) |
236 | ({ outb(0, (io_port)); }) | ||
237 | 235 | ||
238 | static inline | 236 | static inline unsigned int dmac_address(AS_Host *host) |
239 | unsigned int dmac_address(unsigned int io_port) | ||
240 | { | 237 | { |
241 | return dmac_read(io_port, DMAC_TXADRHI) << 16 | | 238 | return dmac_read(host, DMAC_TXADRHI) << 16 | |
242 | dmac_read(io_port, DMAC_TXADRMD) << 8 | | 239 | dmac_read(host, DMAC_TXADRMD) << 8 | |
243 | dmac_read(io_port, DMAC_TXADRLO); | 240 | dmac_read(host, DMAC_TXADRLO); |
244 | } | 241 | } |
245 | 242 | ||
246 | static | 243 | static |
@@ -248,15 +245,15 @@ void acornscsi_dumpdma(AS_Host *host, char *where) | |||
248 | { | 245 | { |
249 | unsigned int mode, addr, len; | 246 | unsigned int mode, addr, len; |
250 | 247 | ||
251 | mode = dmac_read(host->dma.io_port, DMAC_MODECON); | 248 | mode = dmac_read(host, DMAC_MODECON); |
252 | addr = dmac_address(host->dma.io_port); | 249 | addr = dmac_address(host); |
253 | len = dmac_read(host->dma.io_port, DMAC_TXCNTHI) << 8 | | 250 | len = dmac_read(host, DMAC_TXCNTHI) << 8 | |
254 | dmac_read(host->dma.io_port, DMAC_TXCNTLO); | 251 | dmac_read(host, DMAC_TXCNTLO); |
255 | 252 | ||
256 | printk("scsi%d: %s: DMAC %02x @%06x+%04x msk %02x, ", | 253 | printk("scsi%d: %s: DMAC %02x @%06x+%04x msk %02x, ", |
257 | host->host->host_no, where, | 254 | host->host->host_no, where, |
258 | mode, addr, (len + 1) & 0xffff, | 255 | mode, addr, (len + 1) & 0xffff, |
259 | dmac_read(host->dma.io_port, DMAC_MASKREG)); | 256 | dmac_read(host, DMAC_MASKREG)); |
260 | 257 | ||
261 | printk("DMA @%06x, ", host->dma.start_addr); | 258 | printk("DMA @%06x, ", host->dma.start_addr); |
262 | printk("BH @%p +%04x, ", host->scsi.SCp.ptr, | 259 | printk("BH @%p +%04x, ", host->scsi.SCp.ptr, |
@@ -272,9 +269,9 @@ unsigned long acornscsi_sbic_xfcount(AS_Host *host) | |||
272 | { | 269 | { |
273 | unsigned long length; | 270 | unsigned long length; |
274 | 271 | ||
275 | length = sbic_arm_read(host->scsi.io_port, SBIC_TRANSCNTH) << 16; | 272 | length = sbic_arm_read(host, SBIC_TRANSCNTH) << 16; |
276 | length |= sbic_arm_readnext(host->scsi.io_port) << 8; | 273 | length |= sbic_arm_readnext(host) << 8; |
277 | length |= sbic_arm_readnext(host->scsi.io_port); | 274 | length |= sbic_arm_readnext(host); |
278 | 275 | ||
279 | return length; | 276 | return length; |
280 | } | 277 | } |
@@ -285,7 +282,7 @@ acornscsi_sbic_wait(AS_Host *host, int stat_mask, int stat, int timeout, char *m | |||
285 | int asr; | 282 | int asr; |
286 | 283 | ||
287 | do { | 284 | do { |
288 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 285 | asr = sbic_arm_read(host, SBIC_ASR); |
289 | 286 | ||
290 | if ((asr & stat_mask) == stat) | 287 | if ((asr & stat_mask) == stat) |
291 | return 0; | 288 | return 0; |
@@ -304,7 +301,7 @@ int acornscsi_sbic_issuecmd(AS_Host *host, int command) | |||
304 | if (acornscsi_sbic_wait(host, ASR_CIP, 0, 1000, "issuing command")) | 301 | if (acornscsi_sbic_wait(host, ASR_CIP, 0, 1000, "issuing command")) |
305 | return -1; | 302 | return -1; |
306 | 303 | ||
307 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, command); | 304 | sbic_arm_write(host, SBIC_CMND, command); |
308 | 305 | ||
309 | return 0; | 306 | return 0; |
310 | } | 307 | } |
@@ -331,20 +328,20 @@ void acornscsi_resetcard(AS_Host *host) | |||
331 | 328 | ||
332 | /* assert reset line */ | 329 | /* assert reset line */ |
333 | host->card.page_reg = 0x80; | 330 | host->card.page_reg = 0x80; |
334 | outb(host->card.page_reg, host->card.io_page); | 331 | writeb(host->card.page_reg, host->fast + PAGE_REG); |
335 | 332 | ||
336 | /* wait 3 cs. SCSI standard says 25ms. */ | 333 | /* wait 3 cs. SCSI standard says 25ms. */ |
337 | acornscsi_csdelay(3); | 334 | acornscsi_csdelay(3); |
338 | 335 | ||
339 | host->card.page_reg = 0; | 336 | host->card.page_reg = 0; |
340 | outb(host->card.page_reg, host->card.io_page); | 337 | writeb(host->card.page_reg, host->fast + PAGE_REG); |
341 | 338 | ||
342 | /* | 339 | /* |
343 | * Should get a reset from the card | 340 | * Should get a reset from the card |
344 | */ | 341 | */ |
345 | timeout = 1000; | 342 | timeout = 1000; |
346 | do { | 343 | do { |
347 | if (inb(host->card.io_intr) & 8) | 344 | if (readb(host->fast + INT_REG) & 8) |
348 | break; | 345 | break; |
349 | udelay(1); | 346 | udelay(1); |
350 | } while (--timeout); | 347 | } while (--timeout); |
@@ -353,19 +350,19 @@ void acornscsi_resetcard(AS_Host *host) | |||
353 | printk("scsi%d: timeout while resetting card\n", | 350 | printk("scsi%d: timeout while resetting card\n", |
354 | host->host->host_no); | 351 | host->host->host_no); |
355 | 352 | ||
356 | sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 353 | sbic_arm_read(host, SBIC_ASR); |
357 | sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 354 | sbic_arm_read(host, SBIC_SSR); |
358 | 355 | ||
359 | /* setup sbic - WD33C93A */ | 356 | /* setup sbic - WD33C93A */ |
360 | sbic_arm_write(host->scsi.io_port, SBIC_OWNID, OWNID_EAF | host->host->this_id); | 357 | sbic_arm_write(host, SBIC_OWNID, OWNID_EAF | host->host->this_id); |
361 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_RESET); | 358 | sbic_arm_write(host, SBIC_CMND, CMND_RESET); |
362 | 359 | ||
363 | /* | 360 | /* |
364 | * Command should cause a reset interrupt | 361 | * Command should cause a reset interrupt |
365 | */ | 362 | */ |
366 | timeout = 1000; | 363 | timeout = 1000; |
367 | do { | 364 | do { |
368 | if (inb(host->card.io_intr) & 8) | 365 | if (readb(host->fast + INT_REG) & 8) |
369 | break; | 366 | break; |
370 | udelay(1); | 367 | udelay(1); |
371 | } while (--timeout); | 368 | } while (--timeout); |
@@ -374,26 +371,26 @@ void acornscsi_resetcard(AS_Host *host) | |||
374 | printk("scsi%d: timeout while resetting card\n", | 371 | printk("scsi%d: timeout while resetting card\n", |
375 | host->host->host_no); | 372 | host->host->host_no); |
376 | 373 | ||
377 | sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 374 | sbic_arm_read(host, SBIC_ASR); |
378 | if (sbic_arm_read(host->scsi.io_port, SBIC_SSR) != 0x01) | 375 | if (sbic_arm_read(host, SBIC_SSR) != 0x01) |
379 | printk(KERN_CRIT "scsi%d: WD33C93A didn't give enhanced reset interrupt\n", | 376 | printk(KERN_CRIT "scsi%d: WD33C93A didn't give enhanced reset interrupt\n", |
380 | host->host->host_no); | 377 | host->host->host_no); |
381 | 378 | ||
382 | sbic_arm_write(host->scsi.io_port, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI); | 379 | sbic_arm_write(host, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI); |
383 | sbic_arm_write(host->scsi.io_port, SBIC_TIMEOUT, TIMEOUT_TIME); | 380 | sbic_arm_write(host, SBIC_TIMEOUT, TIMEOUT_TIME); |
384 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA); | 381 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA); |
385 | sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); | 382 | sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); |
386 | 383 | ||
387 | host->card.page_reg = 0x40; | 384 | host->card.page_reg = 0x40; |
388 | outb(host->card.page_reg, host->card.io_page); | 385 | writeb(host->card.page_reg, host->fast + PAGE_REG); |
389 | 386 | ||
390 | /* setup dmac - uPC71071 */ | 387 | /* setup dmac - uPC71071 */ |
391 | dmac_write(host->dma.io_port, DMAC_INIT, 0); | 388 | dmac_write(host, DMAC_INIT, 0); |
392 | #ifdef USE_DMAC | 389 | #ifdef USE_DMAC |
393 | dmac_write(host->dma.io_port, DMAC_INIT, INIT_8BIT); | 390 | dmac_write(host, DMAC_INIT, INIT_8BIT); |
394 | dmac_write(host->dma.io_port, DMAC_CHANNEL, CHANNEL_0); | 391 | dmac_write(host, DMAC_CHANNEL, CHANNEL_0); |
395 | dmac_write(host->dma.io_port, DMAC_DEVCON0, INIT_DEVCON0); | 392 | dmac_write(host, DMAC_DEVCON0, INIT_DEVCON0); |
396 | dmac_write(host->dma.io_port, DMAC_DEVCON1, INIT_DEVCON1); | 393 | dmac_write(host, DMAC_DEVCON1, INIT_DEVCON1); |
397 | #endif | 394 | #endif |
398 | 395 | ||
399 | host->SCpnt = NULL; | 396 | host->SCpnt = NULL; |
@@ -741,9 +738,9 @@ intr_ret_t acornscsi_kick(AS_Host *host) | |||
741 | * If we have an interrupt pending, then we may have been reselected. | 738 | * If we have an interrupt pending, then we may have been reselected. |
742 | * In this case, we don't want to write to the registers | 739 | * In this case, we don't want to write to the registers |
743 | */ | 740 | */ |
744 | if (!(sbic_arm_read(host->scsi.io_port, SBIC_ASR) & (ASR_INT|ASR_BSY|ASR_CIP))) { | 741 | if (!(sbic_arm_read(host, SBIC_ASR) & (ASR_INT|ASR_BSY|ASR_CIP))) { |
745 | sbic_arm_write(host->scsi.io_port, SBIC_DESTID, SCpnt->device->id); | 742 | sbic_arm_write(host, SBIC_DESTID, SCpnt->device->id); |
746 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_SELWITHATN); | 743 | sbic_arm_write(host, SBIC_CMND, CMND_SELWITHATN); |
747 | } | 744 | } |
748 | 745 | ||
749 | /* | 746 | /* |
@@ -807,7 +804,7 @@ static void acornscsi_done(AS_Host *host, struct scsi_cmnd **SCpntp, | |||
807 | struct scsi_cmnd *SCpnt = *SCpntp; | 804 | struct scsi_cmnd *SCpnt = *SCpntp; |
808 | 805 | ||
809 | /* clean up */ | 806 | /* clean up */ |
810 | sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); | 807 | sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); |
811 | 808 | ||
812 | host->stats.fins += 1; | 809 | host->stats.fins += 1; |
813 | 810 | ||
@@ -918,13 +915,13 @@ static | |||
918 | void acornscsi_data_read(AS_Host *host, char *ptr, | 915 | void acornscsi_data_read(AS_Host *host, char *ptr, |
919 | unsigned int start_addr, unsigned int length) | 916 | unsigned int start_addr, unsigned int length) |
920 | { | 917 | { |
921 | extern void __acornscsi_in(int port, char *buf, int len); | 918 | extern void __acornscsi_in(void __iomem *, char *buf, int len); |
922 | unsigned int page, offset, len = length; | 919 | unsigned int page, offset, len = length; |
923 | 920 | ||
924 | page = (start_addr >> 12); | 921 | page = (start_addr >> 12); |
925 | offset = start_addr & ((1 << 12) - 1); | 922 | offset = start_addr & ((1 << 12) - 1); |
926 | 923 | ||
927 | outb((page & 0x3f) | host->card.page_reg, host->card.io_page); | 924 | writeb((page & 0x3f) | host->card.page_reg, host->fast + PAGE_REG); |
928 | 925 | ||
929 | while (len > 0) { | 926 | while (len > 0) { |
930 | unsigned int this_len; | 927 | unsigned int this_len; |
@@ -934,7 +931,7 @@ void acornscsi_data_read(AS_Host *host, char *ptr, | |||
934 | else | 931 | else |
935 | this_len = len; | 932 | this_len = len; |
936 | 933 | ||
937 | __acornscsi_in(host->card.io_ram + (offset << 1), ptr, this_len); | 934 | __acornscsi_in(host->base + (offset << 1), ptr, this_len); |
938 | 935 | ||
939 | offset += this_len; | 936 | offset += this_len; |
940 | ptr += this_len; | 937 | ptr += this_len; |
@@ -943,10 +940,10 @@ void acornscsi_data_read(AS_Host *host, char *ptr, | |||
943 | if (offset == (1 << 12)) { | 940 | if (offset == (1 << 12)) { |
944 | offset = 0; | 941 | offset = 0; |
945 | page ++; | 942 | page ++; |
946 | outb((page & 0x3f) | host->card.page_reg, host->card.io_page); | 943 | writeb((page & 0x3f) | host->card.page_reg, host->fast + PAGE_REG); |
947 | } | 944 | } |
948 | } | 945 | } |
949 | outb(host->card.page_reg, host->card.io_page); | 946 | writeb(host->card.page_reg, host->fast + PAGE_REG); |
950 | } | 947 | } |
951 | 948 | ||
952 | /* | 949 | /* |
@@ -963,13 +960,13 @@ static | |||
963 | void acornscsi_data_write(AS_Host *host, char *ptr, | 960 | void acornscsi_data_write(AS_Host *host, char *ptr, |
964 | unsigned int start_addr, unsigned int length) | 961 | unsigned int start_addr, unsigned int length) |
965 | { | 962 | { |
966 | extern void __acornscsi_out(int port, char *buf, int len); | 963 | extern void __acornscsi_out(void __iomem *, char *buf, int len); |
967 | unsigned int page, offset, len = length; | 964 | unsigned int page, offset, len = length; |
968 | 965 | ||
969 | page = (start_addr >> 12); | 966 | page = (start_addr >> 12); |
970 | offset = start_addr & ((1 << 12) - 1); | 967 | offset = start_addr & ((1 << 12) - 1); |
971 | 968 | ||
972 | outb((page & 0x3f) | host->card.page_reg, host->card.io_page); | 969 | writeb((page & 0x3f) | host->card.page_reg, host->fast + PAGE_REG); |
973 | 970 | ||
974 | while (len > 0) { | 971 | while (len > 0) { |
975 | unsigned int this_len; | 972 | unsigned int this_len; |
@@ -979,7 +976,7 @@ void acornscsi_data_write(AS_Host *host, char *ptr, | |||
979 | else | 976 | else |
980 | this_len = len; | 977 | this_len = len; |
981 | 978 | ||
982 | __acornscsi_out(host->card.io_ram + (offset << 1), ptr, this_len); | 979 | __acornscsi_out(host->base + (offset << 1), ptr, this_len); |
983 | 980 | ||
984 | offset += this_len; | 981 | offset += this_len; |
985 | ptr += this_len; | 982 | ptr += this_len; |
@@ -988,10 +985,10 @@ void acornscsi_data_write(AS_Host *host, char *ptr, | |||
988 | if (offset == (1 << 12)) { | 985 | if (offset == (1 << 12)) { |
989 | offset = 0; | 986 | offset = 0; |
990 | page ++; | 987 | page ++; |
991 | outb((page & 0x3f) | host->card.page_reg, host->card.io_page); | 988 | writeb((page & 0x3f) | host->card.page_reg, host->fast + PAGE_REG); |
992 | } | 989 | } |
993 | } | 990 | } |
994 | outb(host->card.page_reg, host->card.io_page); | 991 | writeb(host->card.page_reg, host->fast + PAGE_REG); |
995 | } | 992 | } |
996 | 993 | ||
997 | /* ========================================================================================= | 994 | /* ========================================================================================= |
@@ -1008,8 +1005,8 @@ void acornscsi_data_write(AS_Host *host, char *ptr, | |||
1008 | static inline | 1005 | static inline |
1009 | void acornscsi_dma_stop(AS_Host *host) | 1006 | void acornscsi_dma_stop(AS_Host *host) |
1010 | { | 1007 | { |
1011 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON); | 1008 | dmac_write(host, DMAC_MASKREG, MASK_ON); |
1012 | dmac_clearintr(host->dma.io_intr_clear); | 1009 | dmac_clearintr(host); |
1013 | 1010 | ||
1014 | #if (DEBUG & DEBUG_DMA) | 1011 | #if (DEBUG & DEBUG_DMA) |
1015 | DBG(host->SCpnt, acornscsi_dumpdma(host, "stop")); | 1012 | DBG(host->SCpnt, acornscsi_dumpdma(host, "stop")); |
@@ -1031,7 +1028,7 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction) | |||
1031 | 1028 | ||
1032 | host->dma.direction = direction; | 1029 | host->dma.direction = direction; |
1033 | 1030 | ||
1034 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON); | 1031 | dmac_write(host, DMAC_MASKREG, MASK_ON); |
1035 | 1032 | ||
1036 | if (direction == DMA_OUT) { | 1033 | if (direction == DMA_OUT) { |
1037 | #if (DEBUG & DEBUG_NO_WRITE) | 1034 | #if (DEBUG & DEBUG_NO_WRITE) |
@@ -1062,13 +1059,13 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction) | |||
1062 | length); | 1059 | length); |
1063 | 1060 | ||
1064 | length -= 1; | 1061 | length -= 1; |
1065 | dmac_write(host->dma.io_port, DMAC_TXCNTLO, length); | 1062 | dmac_write(host, DMAC_TXCNTLO, length); |
1066 | dmac_write(host->dma.io_port, DMAC_TXCNTHI, length >> 8); | 1063 | dmac_write(host, DMAC_TXCNTHI, length >> 8); |
1067 | dmac_write(host->dma.io_port, DMAC_TXADRLO, address); | 1064 | dmac_write(host, DMAC_TXADRLO, address); |
1068 | dmac_write(host->dma.io_port, DMAC_TXADRMD, address >> 8); | 1065 | dmac_write(host, DMAC_TXADRMD, address >> 8); |
1069 | dmac_write(host->dma.io_port, DMAC_TXADRHI, 0); | 1066 | dmac_write(host, DMAC_TXADRHI, 0); |
1070 | dmac_write(host->dma.io_port, DMAC_MODECON, mode); | 1067 | dmac_write(host, DMAC_MODECON, mode); |
1071 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF); | 1068 | dmac_write(host, DMAC_MASKREG, MASK_OFF); |
1072 | 1069 | ||
1073 | #if (DEBUG & DEBUG_DMA) | 1070 | #if (DEBUG & DEBUG_DMA) |
1074 | DBG(host->SCpnt, acornscsi_dumpdma(host, "strt")); | 1071 | DBG(host->SCpnt, acornscsi_dumpdma(host, "strt")); |
@@ -1088,8 +1085,8 @@ void acornscsi_dma_setup(AS_Host *host, dmadir_t direction) | |||
1088 | static | 1085 | static |
1089 | void acornscsi_dma_cleanup(AS_Host *host) | 1086 | void acornscsi_dma_cleanup(AS_Host *host) |
1090 | { | 1087 | { |
1091 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON); | 1088 | dmac_write(host, DMAC_MASKREG, MASK_ON); |
1092 | dmac_clearintr(host->dma.io_intr_clear); | 1089 | dmac_clearintr(host); |
1093 | 1090 | ||
1094 | /* | 1091 | /* |
1095 | * Check for a pending transfer | 1092 | * Check for a pending transfer |
@@ -1116,7 +1113,7 @@ void acornscsi_dma_cleanup(AS_Host *host) | |||
1116 | /* | 1113 | /* |
1117 | * Calculate number of bytes transferred from DMA. | 1114 | * Calculate number of bytes transferred from DMA. |
1118 | */ | 1115 | */ |
1119 | transferred = dmac_address(host->dma.io_port) - host->dma.start_addr; | 1116 | transferred = dmac_address(host) - host->dma.start_addr; |
1120 | host->dma.transferred += transferred; | 1117 | host->dma.transferred += transferred; |
1121 | 1118 | ||
1122 | if (host->dma.direction == DMA_IN) | 1119 | if (host->dma.direction == DMA_IN) |
@@ -1152,13 +1149,13 @@ void acornscsi_dma_intr(AS_Host *host) | |||
1152 | DBG(host->SCpnt, acornscsi_dumpdma(host, "inti")); | 1149 | DBG(host->SCpnt, acornscsi_dumpdma(host, "inti")); |
1153 | #endif | 1150 | #endif |
1154 | 1151 | ||
1155 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_ON); | 1152 | dmac_write(host, DMAC_MASKREG, MASK_ON); |
1156 | dmac_clearintr(host->dma.io_intr_clear); | 1153 | dmac_clearintr(host); |
1157 | 1154 | ||
1158 | /* | 1155 | /* |
1159 | * Calculate amount transferred via DMA | 1156 | * Calculate amount transferred via DMA |
1160 | */ | 1157 | */ |
1161 | transferred = dmac_address(host->dma.io_port) - host->dma.start_addr; | 1158 | transferred = dmac_address(host) - host->dma.start_addr; |
1162 | host->dma.transferred += transferred; | 1159 | host->dma.transferred += transferred; |
1163 | 1160 | ||
1164 | /* | 1161 | /* |
@@ -1190,12 +1187,12 @@ void acornscsi_dma_intr(AS_Host *host) | |||
1190 | length); | 1187 | length); |
1191 | 1188 | ||
1192 | length -= 1; | 1189 | length -= 1; |
1193 | dmac_write(host->dma.io_port, DMAC_TXCNTLO, length); | 1190 | dmac_write(host, DMAC_TXCNTLO, length); |
1194 | dmac_write(host->dma.io_port, DMAC_TXCNTHI, length >> 8); | 1191 | dmac_write(host, DMAC_TXCNTHI, length >> 8); |
1195 | dmac_write(host->dma.io_port, DMAC_TXADRLO, address); | 1192 | dmac_write(host, DMAC_TXADRLO, address); |
1196 | dmac_write(host->dma.io_port, DMAC_TXADRMD, address >> 8); | 1193 | dmac_write(host, DMAC_TXADRMD, address >> 8); |
1197 | dmac_write(host->dma.io_port, DMAC_TXADRHI, 0); | 1194 | dmac_write(host, DMAC_TXADRHI, 0); |
1198 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF); | 1195 | dmac_write(host, DMAC_MASKREG, MASK_OFF); |
1199 | 1196 | ||
1200 | #if (DEBUG & DEBUG_DMA) | 1197 | #if (DEBUG & DEBUG_DMA) |
1201 | DBG(host->SCpnt, acornscsi_dumpdma(host, "into")); | 1198 | DBG(host->SCpnt, acornscsi_dumpdma(host, "into")); |
@@ -1209,15 +1206,15 @@ void acornscsi_dma_intr(AS_Host *host) | |||
1209 | * attention condition. We continue giving one byte until | 1206 | * attention condition. We continue giving one byte until |
1210 | * the device recognises the attention. | 1207 | * the device recognises the attention. |
1211 | */ | 1208 | */ |
1212 | if (dmac_read(host->dma.io_port, DMAC_STATUS) & STATUS_RQ0) { | 1209 | if (dmac_read(host, DMAC_STATUS) & STATUS_RQ0) { |
1213 | acornscsi_abortcmd(host, host->SCpnt->tag); | 1210 | acornscsi_abortcmd(host, host->SCpnt->tag); |
1214 | 1211 | ||
1215 | dmac_write(host->dma.io_port, DMAC_TXCNTLO, 0); | 1212 | dmac_write(host, DMAC_TXCNTLO, 0); |
1216 | dmac_write(host->dma.io_port, DMAC_TXCNTHI, 0); | 1213 | dmac_write(host, DMAC_TXCNTHI, 0); |
1217 | dmac_write(host->dma.io_port, DMAC_TXADRLO, 0); | 1214 | dmac_write(host, DMAC_TXADRLO, 0); |
1218 | dmac_write(host->dma.io_port, DMAC_TXADRMD, 0); | 1215 | dmac_write(host, DMAC_TXADRMD, 0); |
1219 | dmac_write(host->dma.io_port, DMAC_TXADRHI, 0); | 1216 | dmac_write(host, DMAC_TXADRHI, 0); |
1220 | dmac_write(host->dma.io_port, DMAC_MASKREG, MASK_OFF); | 1217 | dmac_write(host, DMAC_MASKREG, MASK_OFF); |
1221 | } | 1218 | } |
1222 | #endif | 1219 | #endif |
1223 | } | 1220 | } |
@@ -1271,9 +1268,9 @@ void acornscsi_dma_adjust(AS_Host *host) | |||
1271 | host->dma.xfer_setup = 0; | 1268 | host->dma.xfer_setup = 0; |
1272 | else { | 1269 | else { |
1273 | transferred += host->dma.start_addr; | 1270 | transferred += host->dma.start_addr; |
1274 | dmac_write(host->dma.io_port, DMAC_TXADRLO, transferred); | 1271 | dmac_write(host, DMAC_TXADRLO, transferred); |
1275 | dmac_write(host->dma.io_port, DMAC_TXADRMD, transferred >> 8); | 1272 | dmac_write(host, DMAC_TXADRMD, transferred >> 8); |
1276 | dmac_write(host->dma.io_port, DMAC_TXADRHI, transferred >> 16); | 1273 | dmac_write(host, DMAC_TXADRHI, transferred >> 16); |
1277 | #if (DEBUG & (DEBUG_DMA|DEBUG_WRITE)) | 1274 | #if (DEBUG & (DEBUG_DMA|DEBUG_WRITE)) |
1278 | DBG(host->SCpnt, acornscsi_dumpdma(host, "adjo")); | 1275 | DBG(host->SCpnt, acornscsi_dumpdma(host, "adjo")); |
1279 | #endif | 1276 | #endif |
@@ -1292,12 +1289,12 @@ acornscsi_write_pio(AS_Host *host, char *bytes, int *ptr, int len, unsigned int | |||
1292 | int my_ptr = *ptr; | 1289 | int my_ptr = *ptr; |
1293 | 1290 | ||
1294 | while (my_ptr < len) { | 1291 | while (my_ptr < len) { |
1295 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 1292 | asr = sbic_arm_read(host, SBIC_ASR); |
1296 | 1293 | ||
1297 | if (asr & ASR_DBR) { | 1294 | if (asr & ASR_DBR) { |
1298 | timeout = max_timeout; | 1295 | timeout = max_timeout; |
1299 | 1296 | ||
1300 | sbic_arm_write(host->scsi.io_port, SBIC_DATA, bytes[my_ptr++]); | 1297 | sbic_arm_write(host, SBIC_DATA, bytes[my_ptr++]); |
1301 | } else if (asr & ASR_INT) | 1298 | } else if (asr & ASR_INT) |
1302 | break; | 1299 | break; |
1303 | else if (--timeout == 0) | 1300 | else if (--timeout == 0) |
@@ -1320,9 +1317,9 @@ acornscsi_sendcommand(AS_Host *host) | |||
1320 | { | 1317 | { |
1321 | struct scsi_cmnd *SCpnt = host->SCpnt; | 1318 | struct scsi_cmnd *SCpnt = host->SCpnt; |
1322 | 1319 | ||
1323 | sbic_arm_write(host->scsi.io_port, SBIC_TRANSCNTH, 0); | 1320 | sbic_arm_write(host, SBIC_TRANSCNTH, 0); |
1324 | sbic_arm_writenext(host->scsi.io_port, 0); | 1321 | sbic_arm_writenext(host, 0); |
1325 | sbic_arm_writenext(host->scsi.io_port, SCpnt->cmd_len - host->scsi.SCp.sent_command); | 1322 | sbic_arm_writenext(host, SCpnt->cmd_len - host->scsi.SCp.sent_command); |
1326 | 1323 | ||
1327 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); | 1324 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); |
1328 | 1325 | ||
@@ -1351,7 +1348,7 @@ void acornscsi_sendmessage(AS_Host *host) | |||
1351 | 1348 | ||
1352 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 1"); | 1349 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 1"); |
1353 | 1350 | ||
1354 | sbic_arm_write(host->scsi.io_port, SBIC_DATA, NOP); | 1351 | sbic_arm_write(host, SBIC_DATA, NOP); |
1355 | 1352 | ||
1356 | host->scsi.last_message = NOP; | 1353 | host->scsi.last_message = NOP; |
1357 | #if (DEBUG & DEBUG_MESSAGES) | 1354 | #if (DEBUG & DEBUG_MESSAGES) |
@@ -1365,7 +1362,7 @@ void acornscsi_sendmessage(AS_Host *host) | |||
1365 | 1362 | ||
1366 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 2"); | 1363 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "sending message 2"); |
1367 | 1364 | ||
1368 | sbic_arm_write(host->scsi.io_port, SBIC_DATA, msg->msg[0]); | 1365 | sbic_arm_write(host, SBIC_DATA, msg->msg[0]); |
1369 | 1366 | ||
1370 | host->scsi.last_message = msg->msg[0]; | 1367 | host->scsi.last_message = msg->msg[0]; |
1371 | #if (DEBUG & DEBUG_MESSAGES) | 1368 | #if (DEBUG & DEBUG_MESSAGES) |
@@ -1382,9 +1379,9 @@ void acornscsi_sendmessage(AS_Host *host) | |||
1382 | * initiator. This provides an interlock so that the | 1379 | * initiator. This provides an interlock so that the |
1383 | * initiator can determine which message byte is rejected. | 1380 | * initiator can determine which message byte is rejected. |
1384 | */ | 1381 | */ |
1385 | sbic_arm_write(host->scsi.io_port, SBIC_TRANSCNTH, 0); | 1382 | sbic_arm_write(host, SBIC_TRANSCNTH, 0); |
1386 | sbic_arm_writenext(host->scsi.io_port, 0); | 1383 | sbic_arm_writenext(host, 0); |
1387 | sbic_arm_writenext(host->scsi.io_port, message_length); | 1384 | sbic_arm_writenext(host, message_length); |
1388 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); | 1385 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); |
1389 | 1386 | ||
1390 | msgnr = 0; | 1387 | msgnr = 0; |
@@ -1421,7 +1418,7 @@ void acornscsi_readstatusbyte(AS_Host *host) | |||
1421 | { | 1418 | { |
1422 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO|CMND_SBT); | 1419 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO|CMND_SBT); |
1423 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "reading status byte"); | 1420 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "reading status byte"); |
1424 | host->scsi.SCp.Status = sbic_arm_read(host->scsi.io_port, SBIC_DATA); | 1421 | host->scsi.SCp.Status = sbic_arm_read(host, SBIC_DATA); |
1425 | } | 1422 | } |
1426 | 1423 | ||
1427 | /* | 1424 | /* |
@@ -1438,12 +1435,12 @@ unsigned char acornscsi_readmessagebyte(AS_Host *host) | |||
1438 | 1435 | ||
1439 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "for message byte"); | 1436 | acornscsi_sbic_wait(host, ASR_DBR, ASR_DBR, 1000, "for message byte"); |
1440 | 1437 | ||
1441 | message = sbic_arm_read(host->scsi.io_port, SBIC_DATA); | 1438 | message = sbic_arm_read(host, SBIC_DATA); |
1442 | 1439 | ||
1443 | /* wait for MSGIN-XFER-PAUSED */ | 1440 | /* wait for MSGIN-XFER-PAUSED */ |
1444 | acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after message byte"); | 1441 | acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after message byte"); |
1445 | 1442 | ||
1446 | sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 1443 | sbic_arm_read(host, SBIC_SSR); |
1447 | 1444 | ||
1448 | return message; | 1445 | return message; |
1449 | } | 1446 | } |
@@ -1480,7 +1477,7 @@ void acornscsi_message(AS_Host *host) | |||
1480 | 1477 | ||
1481 | /* wait for next msg-in */ | 1478 | /* wait for next msg-in */ |
1482 | acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after negate ack"); | 1479 | acornscsi_sbic_wait(host, ASR_INT, ASR_INT, 1000, "for interrupt after negate ack"); |
1483 | sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 1480 | sbic_arm_read(host, SBIC_SSR); |
1484 | } | 1481 | } |
1485 | } while (msgidx < msglen); | 1482 | } while (msgidx < msglen); |
1486 | 1483 | ||
@@ -1602,7 +1599,7 @@ void acornscsi_message(AS_Host *host) | |||
1602 | host->host->host_no, acornscsi_target(host)); | 1599 | host->host->host_no, acornscsi_target(host)); |
1603 | host->device[host->SCpnt->device->id].sync_xfer = SYNCHTRANSFER_2DBA; | 1600 | host->device[host->SCpnt->device->id].sync_xfer = SYNCHTRANSFER_2DBA; |
1604 | host->device[host->SCpnt->device->id].sync_state = SYNC_ASYNCHRONOUS; | 1601 | host->device[host->SCpnt->device->id].sync_state = SYNC_ASYNCHRONOUS; |
1605 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); | 1602 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); |
1606 | break; | 1603 | break; |
1607 | 1604 | ||
1608 | default: | 1605 | default: |
@@ -1652,7 +1649,7 @@ void acornscsi_message(AS_Host *host) | |||
1652 | host->device[host->SCpnt->device->id].sync_xfer = | 1649 | host->device[host->SCpnt->device->id].sync_xfer = |
1653 | calc_sync_xfer(period * 4, length); | 1650 | calc_sync_xfer(period * 4, length); |
1654 | } | 1651 | } |
1655 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); | 1652 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); |
1656 | break; | 1653 | break; |
1657 | #else | 1654 | #else |
1658 | /* We do not accept synchronous transfers. Respond with a | 1655 | /* We do not accept synchronous transfers. Respond with a |
@@ -1792,10 +1789,10 @@ int acornscsi_starttransfer(AS_Host *host) | |||
1792 | 1789 | ||
1793 | residual = scsi_bufflen(host->SCpnt) - host->scsi.SCp.scsi_xferred; | 1790 | residual = scsi_bufflen(host->SCpnt) - host->scsi.SCp.scsi_xferred; |
1794 | 1791 | ||
1795 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); | 1792 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, host->device[host->SCpnt->device->id].sync_xfer); |
1796 | sbic_arm_writenext(host->scsi.io_port, residual >> 16); | 1793 | sbic_arm_writenext(host, residual >> 16); |
1797 | sbic_arm_writenext(host->scsi.io_port, residual >> 8); | 1794 | sbic_arm_writenext(host, residual >> 8); |
1798 | sbic_arm_writenext(host->scsi.io_port, residual); | 1795 | sbic_arm_writenext(host, residual); |
1799 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); | 1796 | acornscsi_sbic_issuecmd(host, CMND_XFERINFO); |
1800 | return 1; | 1797 | return 1; |
1801 | } | 1798 | } |
@@ -1816,7 +1813,7 @@ int acornscsi_reconnect(AS_Host *host) | |||
1816 | { | 1813 | { |
1817 | unsigned int target, lun, ok = 0; | 1814 | unsigned int target, lun, ok = 0; |
1818 | 1815 | ||
1819 | target = sbic_arm_read(host->scsi.io_port, SBIC_SOURCEID); | 1816 | target = sbic_arm_read(host, SBIC_SOURCEID); |
1820 | 1817 | ||
1821 | if (!(target & 8)) | 1818 | if (!(target & 8)) |
1822 | printk(KERN_ERR "scsi%d: invalid source id after reselection " | 1819 | printk(KERN_ERR "scsi%d: invalid source id after reselection " |
@@ -1832,7 +1829,7 @@ int acornscsi_reconnect(AS_Host *host) | |||
1832 | host->SCpnt = NULL; | 1829 | host->SCpnt = NULL; |
1833 | } | 1830 | } |
1834 | 1831 | ||
1835 | lun = sbic_arm_read(host->scsi.io_port, SBIC_DATA) & 7; | 1832 | lun = sbic_arm_read(host, SBIC_DATA) & 7; |
1836 | 1833 | ||
1837 | host->scsi.reconnected.target = target; | 1834 | host->scsi.reconnected.target = target; |
1838 | host->scsi.reconnected.lun = lun; | 1835 | host->scsi.reconnected.lun = lun; |
@@ -1952,7 +1949,7 @@ static | |||
1952 | void acornscsi_abortcmd(AS_Host *host, unsigned char tag) | 1949 | void acornscsi_abortcmd(AS_Host *host, unsigned char tag) |
1953 | { | 1950 | { |
1954 | host->scsi.phase = PHASE_ABORTED; | 1951 | host->scsi.phase = PHASE_ABORTED; |
1955 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_ASSERTATN); | 1952 | sbic_arm_write(host, SBIC_CMND, CMND_ASSERTATN); |
1956 | 1953 | ||
1957 | msgqueue_flush(&host->scsi.msgs); | 1954 | msgqueue_flush(&host->scsi.msgs); |
1958 | #ifdef CONFIG_SCSI_ACORNSCSI_TAGGED_QUEUE | 1955 | #ifdef CONFIG_SCSI_ACORNSCSI_TAGGED_QUEUE |
@@ -1979,11 +1976,11 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq) | |||
1979 | { | 1976 | { |
1980 | unsigned int asr, ssr; | 1977 | unsigned int asr, ssr; |
1981 | 1978 | ||
1982 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 1979 | asr = sbic_arm_read(host, SBIC_ASR); |
1983 | if (!(asr & ASR_INT)) | 1980 | if (!(asr & ASR_INT)) |
1984 | return INTR_IDLE; | 1981 | return INTR_IDLE; |
1985 | 1982 | ||
1986 | ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 1983 | ssr = sbic_arm_read(host, SBIC_SSR); |
1987 | 1984 | ||
1988 | #if (DEBUG & DEBUG_PHASES) | 1985 | #if (DEBUG & DEBUG_PHASES) |
1989 | print_sbic_status(asr, ssr, host->scsi.phase); | 1986 | print_sbic_status(asr, ssr, host->scsi.phase); |
@@ -1999,15 +1996,15 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq) | |||
1999 | printk(KERN_ERR "scsi%d: reset in standard mode but wanted advanced mode.\n", | 1996 | printk(KERN_ERR "scsi%d: reset in standard mode but wanted advanced mode.\n", |
2000 | host->host->host_no); | 1997 | host->host->host_no); |
2001 | /* setup sbic - WD33C93A */ | 1998 | /* setup sbic - WD33C93A */ |
2002 | sbic_arm_write(host->scsi.io_port, SBIC_OWNID, OWNID_EAF | host->host->this_id); | 1999 | sbic_arm_write(host, SBIC_OWNID, OWNID_EAF | host->host->this_id); |
2003 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_RESET); | 2000 | sbic_arm_write(host, SBIC_CMND, CMND_RESET); |
2004 | return INTR_IDLE; | 2001 | return INTR_IDLE; |
2005 | 2002 | ||
2006 | case 0x01: /* reset state - advanced */ | 2003 | case 0x01: /* reset state - advanced */ |
2007 | sbic_arm_write(host->scsi.io_port, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI); | 2004 | sbic_arm_write(host, SBIC_CTRL, INIT_SBICDMA | CTRL_IDI); |
2008 | sbic_arm_write(host->scsi.io_port, SBIC_TIMEOUT, TIMEOUT_TIME); | 2005 | sbic_arm_write(host, SBIC_TIMEOUT, TIMEOUT_TIME); |
2009 | sbic_arm_write(host->scsi.io_port, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA); | 2006 | sbic_arm_write(host, SBIC_SYNCHTRANSFER, SYNCHTRANSFER_2DBA); |
2010 | sbic_arm_write(host->scsi.io_port, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); | 2007 | sbic_arm_write(host, SBIC_SOURCEID, SOURCEID_ER | SOURCEID_DSP); |
2011 | msgqueue_flush(&host->scsi.msgs); | 2008 | msgqueue_flush(&host->scsi.msgs); |
2012 | return INTR_IDLE; | 2009 | return INTR_IDLE; |
2013 | 2010 | ||
@@ -2025,10 +2022,10 @@ intr_ret_t acornscsi_sbicintr(AS_Host *host, int in_irq) | |||
2025 | msgqueue_flush(&host->scsi.msgs); | 2022 | msgqueue_flush(&host->scsi.msgs); |
2026 | host->dma.transferred = host->scsi.SCp.scsi_xferred; | 2023 | host->dma.transferred = host->scsi.SCp.scsi_xferred; |
2027 | /* 33C93 gives next interrupt indicating bus phase */ | 2024 | /* 33C93 gives next interrupt indicating bus phase */ |
2028 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 2025 | asr = sbic_arm_read(host, SBIC_ASR); |
2029 | if (!(asr & ASR_INT)) | 2026 | if (!(asr & ASR_INT)) |
2030 | break; | 2027 | break; |
2031 | ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 2028 | ssr = sbic_arm_read(host, SBIC_SSR); |
2032 | ADD_STATUS(8, ssr, host->scsi.phase, 1); | 2029 | ADD_STATUS(8, ssr, host->scsi.phase, 1); |
2033 | ADD_STATUS(host->SCpnt->device->id, ssr, host->scsi.phase, 1); | 2030 | ADD_STATUS(host->SCpnt->device->id, ssr, host->scsi.phase, 1); |
2034 | goto connected; | 2031 | goto connected; |
@@ -2476,11 +2473,11 @@ acornscsi_intr(int irq, void *dev_id) | |||
2476 | do { | 2473 | do { |
2477 | ret = INTR_IDLE; | 2474 | ret = INTR_IDLE; |
2478 | 2475 | ||
2479 | iostatus = inb(host->card.io_intr); | 2476 | iostatus = readb(host->fast + INT_REG); |
2480 | 2477 | ||
2481 | if (iostatus & 2) { | 2478 | if (iostatus & 2) { |
2482 | acornscsi_dma_intr(host); | 2479 | acornscsi_dma_intr(host); |
2483 | iostatus = inb(host->card.io_intr); | 2480 | iostatus = readb(host->fast + INT_REG); |
2484 | } | 2481 | } |
2485 | 2482 | ||
2486 | if (iostatus & 8) | 2483 | if (iostatus & 8) |
@@ -2655,7 +2652,7 @@ static enum res_abort acornscsi_do_abort(AS_Host *host, struct scsi_cmnd *SCpnt) | |||
2655 | * busylun bit. | 2652 | * busylun bit. |
2656 | */ | 2653 | */ |
2657 | case PHASE_CONNECTED: | 2654 | case PHASE_CONNECTED: |
2658 | sbic_arm_write(host->scsi.io_port, SBIC_CMND, CMND_DISCONNECT); | 2655 | sbic_arm_write(host, SBIC_CMND, CMND_DISCONNECT); |
2659 | host->SCpnt = NULL; | 2656 | host->SCpnt = NULL; |
2660 | res = res_success_clear; | 2657 | res = res_success_clear; |
2661 | break; | 2658 | break; |
@@ -2699,8 +2696,8 @@ int acornscsi_abort(struct scsi_cmnd *SCpnt) | |||
2699 | #if (DEBUG & DEBUG_ABORT) | 2696 | #if (DEBUG & DEBUG_ABORT) |
2700 | { | 2697 | { |
2701 | int asr, ssr; | 2698 | int asr, ssr; |
2702 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 2699 | asr = sbic_arm_read(host, SBIC_ASR); |
2703 | ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 2700 | ssr = sbic_arm_read(host, SBIC_SSR); |
2704 | 2701 | ||
2705 | printk(KERN_WARNING "acornscsi_abort: "); | 2702 | printk(KERN_WARNING "acornscsi_abort: "); |
2706 | print_sbic_status(asr, ssr, host->scsi.phase); | 2703 | print_sbic_status(asr, ssr, host->scsi.phase); |
@@ -2731,9 +2728,7 @@ int acornscsi_abort(struct scsi_cmnd *SCpnt) | |||
2731 | //#if (DEBUG & DEBUG_ABORT) | 2728 | //#if (DEBUG & DEBUG_ABORT) |
2732 | printk("success\n"); | 2729 | printk("success\n"); |
2733 | //#endif | 2730 | //#endif |
2734 | SCpnt->result = DID_ABORT << 16; | 2731 | result = SUCCESS; |
2735 | SCpnt->scsi_done(SCpnt); | ||
2736 | result = SCSI_ABORT_SUCCESS; | ||
2737 | break; | 2732 | break; |
2738 | 2733 | ||
2739 | /* | 2734 | /* |
@@ -2745,7 +2740,7 @@ int acornscsi_abort(struct scsi_cmnd *SCpnt) | |||
2745 | //#if (DEBUG & DEBUG_ABORT) | 2740 | //#if (DEBUG & DEBUG_ABORT) |
2746 | printk("snooze\n"); | 2741 | printk("snooze\n"); |
2747 | //#endif | 2742 | //#endif |
2748 | result = SCSI_ABORT_SNOOZE; | 2743 | result = FAILED; |
2749 | break; | 2744 | break; |
2750 | 2745 | ||
2751 | /* | 2746 | /* |
@@ -2755,11 +2750,7 @@ int acornscsi_abort(struct scsi_cmnd *SCpnt) | |||
2755 | default: | 2750 | default: |
2756 | case res_not_running: | 2751 | case res_not_running: |
2757 | acornscsi_dumplog(host, SCpnt->device->id); | 2752 | acornscsi_dumplog(host, SCpnt->device->id); |
2758 | #if (DEBUG & DEBUG_ABORT) | 2753 | result = FAILED; |
2759 | result = SCSI_ABORT_SNOOZE; | ||
2760 | #else | ||
2761 | result = SCSI_ABORT_NOT_RUNNING; | ||
2762 | #endif | ||
2763 | //#if (DEBUG & DEBUG_ABORT) | 2754 | //#if (DEBUG & DEBUG_ABORT) |
2764 | printk("not running\n"); | 2755 | printk("not running\n"); |
2765 | //#endif | 2756 | //#endif |
@@ -2770,13 +2761,12 @@ int acornscsi_abort(struct scsi_cmnd *SCpnt) | |||
2770 | } | 2761 | } |
2771 | 2762 | ||
2772 | /* | 2763 | /* |
2773 | * Prototype: int acornscsi_reset(struct scsi_cmnd *SCpnt, unsigned int reset_flags) | 2764 | * Prototype: int acornscsi_reset(struct scsi_cmnd *SCpnt) |
2774 | * Purpose : reset a command on this host/reset this host | 2765 | * Purpose : reset a command on this host/reset this host |
2775 | * Params : SCpnt - command causing reset | 2766 | * Params : SCpnt - command causing reset |
2776 | * result - what type of reset to perform | ||
2777 | * Returns : one of SCSI_RESET_ macros | 2767 | * Returns : one of SCSI_RESET_ macros |
2778 | */ | 2768 | */ |
2779 | int acornscsi_reset(struct scsi_cmnd *SCpnt, unsigned int reset_flags) | 2769 | int acornscsi_bus_reset(struct scsi_cmnd *SCpnt) |
2780 | { | 2770 | { |
2781 | AS_Host *host = (AS_Host *)SCpnt->device->host->hostdata; | 2771 | AS_Host *host = (AS_Host *)SCpnt->device->host->hostdata; |
2782 | struct scsi_cmnd *SCptr; | 2772 | struct scsi_cmnd *SCptr; |
@@ -2787,8 +2777,8 @@ int acornscsi_reset(struct scsi_cmnd *SCpnt, unsigned int reset_flags) | |||
2787 | { | 2777 | { |
2788 | int asr, ssr; | 2778 | int asr, ssr; |
2789 | 2779 | ||
2790 | asr = sbic_arm_read(host->scsi.io_port, SBIC_ASR); | 2780 | asr = sbic_arm_read(host, SBIC_ASR); |
2791 | ssr = sbic_arm_read(host->scsi.io_port, SBIC_SSR); | 2781 | ssr = sbic_arm_read(host, SBIC_SSR); |
2792 | 2782 | ||
2793 | printk(KERN_WARNING "acornscsi_reset: "); | 2783 | printk(KERN_WARNING "acornscsi_reset: "); |
2794 | print_sbic_status(asr, ssr, host->scsi.phase); | 2784 | print_sbic_status(asr, ssr, host->scsi.phase); |
@@ -2798,28 +2788,16 @@ int acornscsi_reset(struct scsi_cmnd *SCpnt, unsigned int reset_flags) | |||
2798 | 2788 | ||
2799 | acornscsi_dma_stop(host); | 2789 | acornscsi_dma_stop(host); |
2800 | 2790 | ||
2801 | SCptr = host->SCpnt; | ||
2802 | |||
2803 | /* | 2791 | /* |
2804 | * do hard reset. This resets all devices on this host, and so we | 2792 | * do hard reset. This resets all devices on this host, and so we |
2805 | * must set the reset status on all commands. | 2793 | * must set the reset status on all commands. |
2806 | */ | 2794 | */ |
2807 | acornscsi_resetcard(host); | 2795 | acornscsi_resetcard(host); |
2808 | 2796 | ||
2809 | /* | ||
2810 | * report reset on commands current connected/disconnected | ||
2811 | */ | ||
2812 | acornscsi_reportstatus(&host->SCpnt, &SCptr, DID_RESET); | ||
2813 | |||
2814 | while ((SCptr = queue_remove(&host->queues.disconnected)) != NULL) | 2797 | while ((SCptr = queue_remove(&host->queues.disconnected)) != NULL) |
2815 | acornscsi_reportstatus(&SCptr, &SCpnt, DID_RESET); | 2798 | ; |
2816 | |||
2817 | if (SCpnt) { | ||
2818 | SCpnt->result = DID_RESET << 16; | ||
2819 | SCpnt->scsi_done(SCpnt); | ||
2820 | } | ||
2821 | 2799 | ||
2822 | return SCSI_RESET_BUS_RESET | SCSI_RESET_HOST_RESET | SCSI_RESET_SUCCESS; | 2800 | return SUCCESS; |
2823 | } | 2801 | } |
2824 | 2802 | ||
2825 | /*============================================================================================== | 2803 | /*============================================================================================== |
@@ -2850,7 +2828,7 @@ char *acornscsi_info(struct Scsi_Host *host) | |||
2850 | " LINK" | 2828 | " LINK" |
2851 | #endif | 2829 | #endif |
2852 | #if (DEBUG & DEBUG_NO_WRITE) | 2830 | #if (DEBUG & DEBUG_NO_WRITE) |
2853 | " NOWRITE ("NO_WRITE_STR")" | 2831 | " NOWRITE (" __stringify(NO_WRITE) ")" |
2854 | #endif | 2832 | #endif |
2855 | , host->hostt->name, host->io_port, host->irq, | 2833 | , host->hostt->name, host->io_port, host->irq, |
2856 | VER_MAJOR, VER_MINOR, VER_PATCH); | 2834 | VER_MAJOR, VER_MINOR, VER_PATCH); |
@@ -2881,15 +2859,15 @@ int acornscsi_proc_info(struct Scsi_Host *instance, char *buffer, char **start, | |||
2881 | " LINK" | 2859 | " LINK" |
2882 | #endif | 2860 | #endif |
2883 | #if (DEBUG & DEBUG_NO_WRITE) | 2861 | #if (DEBUG & DEBUG_NO_WRITE) |
2884 | " NOWRITE ("NO_WRITE_STR")" | 2862 | " NOWRITE (" __stringify(NO_WRITE) ")" |
2885 | #endif | 2863 | #endif |
2886 | "\n\n", VER_MAJOR, VER_MINOR, VER_PATCH); | 2864 | "\n\n", VER_MAJOR, VER_MINOR, VER_PATCH); |
2887 | 2865 | ||
2888 | p += sprintf(p, "SBIC: WD33C93A Address: %08X IRQ : %d\n", | 2866 | p += sprintf(p, "SBIC: WD33C93A Address: %p IRQ : %d\n", |
2889 | host->scsi.io_port, host->scsi.irq); | 2867 | host->base + SBIC_REGIDX, host->scsi.irq); |
2890 | #ifdef USE_DMAC | 2868 | #ifdef USE_DMAC |
2891 | p += sprintf(p, "DMAC: uPC71071 Address: %08X IRQ : %d\n\n", | 2869 | p += sprintf(p, "DMAC: uPC71071 Address: %p IRQ : %d\n\n", |
2892 | host->dma.io_port, host->scsi.irq); | 2870 | host->base + DMAC_OFFSET, host->scsi.irq); |
2893 | #endif | 2871 | #endif |
2894 | 2872 | ||
2895 | p += sprintf(p, "Statistics:\n" | 2873 | p += sprintf(p, "Statistics:\n" |
@@ -2976,9 +2954,8 @@ static struct scsi_host_template acornscsi_template = { | |||
2976 | .name = "AcornSCSI", | 2954 | .name = "AcornSCSI", |
2977 | .info = acornscsi_info, | 2955 | .info = acornscsi_info, |
2978 | .queuecommand = acornscsi_queuecmd, | 2956 | .queuecommand = acornscsi_queuecmd, |
2979 | #warning fixme | 2957 | .eh_abort_handler = acornscsi_abort, |
2980 | .abort = acornscsi_abort, | 2958 | .eh_bus_reset_handler = acornscsi_bus_reset, |
2981 | .reset = acornscsi_reset, | ||
2982 | .can_queue = 16, | 2959 | .can_queue = 16, |
2983 | .this_id = 7, | 2960 | .this_id = 7, |
2984 | .sg_tablesize = SG_ALL, | 2961 | .sg_tablesize = SG_ALL, |
@@ -2992,48 +2969,37 @@ acornscsi_probe(struct expansion_card *ec, const struct ecard_id *id) | |||
2992 | { | 2969 | { |
2993 | struct Scsi_Host *host; | 2970 | struct Scsi_Host *host; |
2994 | AS_Host *ashost; | 2971 | AS_Host *ashost; |
2995 | int ret = -ENOMEM; | 2972 | int ret; |
2996 | 2973 | ||
2997 | host = scsi_host_alloc(&acornscsi_template, sizeof(AS_Host)); | 2974 | ret = ecard_request_resources(ec); |
2998 | if (!host) | 2975 | if (ret) |
2999 | goto out; | 2976 | goto out; |
3000 | 2977 | ||
2978 | host = scsi_host_alloc(&acornscsi_template, sizeof(AS_Host)); | ||
2979 | if (!host) { | ||
2980 | ret = -ENOMEM; | ||
2981 | goto out_release; | ||
2982 | } | ||
2983 | |||
3001 | ashost = (AS_Host *)host->hostdata; | 2984 | ashost = (AS_Host *)host->hostdata; |
3002 | 2985 | ||
3003 | host->io_port = ecard_address(ec, ECARD_MEMC, 0); | 2986 | ashost->base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0); |
3004 | host->irq = ec->irq; | 2987 | ashost->fast = ecardm_iomap(ec, ECARD_RES_IOCFAST, 0, 0); |
2988 | if (!ashost->base || !ashost->fast) | ||
2989 | goto out_put; | ||
3005 | 2990 | ||
3006 | ashost->host = host; | 2991 | host->irq = ec->irq; |
3007 | ashost->scsi.io_port = ioaddr(host->io_port + 0x800); | 2992 | ashost->host = host; |
3008 | ashost->scsi.irq = host->irq; | 2993 | ashost->scsi.irq = host->irq; |
3009 | ashost->card.io_intr = POD_SPACE(host->io_port) + 0x800; | ||
3010 | ashost->card.io_page = POD_SPACE(host->io_port) + 0xc00; | ||
3011 | ashost->card.io_ram = ioaddr(host->io_port); | ||
3012 | ashost->dma.io_port = host->io_port + 0xc00; | ||
3013 | ashost->dma.io_intr_clear = POD_SPACE(host->io_port) + 0x800; | ||
3014 | 2994 | ||
3015 | ec->irqaddr = (char *)ioaddr(ashost->card.io_intr); | 2995 | ec->irqaddr = ashost->fast + INT_REG; |
3016 | ec->irqmask = 0x0a; | 2996 | ec->irqmask = 0x0a; |
3017 | 2997 | ||
3018 | ret = -EBUSY; | ||
3019 | if (!request_region(host->io_port + 0x800, 2, "acornscsi(sbic)")) | ||
3020 | goto err_1; | ||
3021 | if (!request_region(ashost->card.io_intr, 1, "acornscsi(intr)")) | ||
3022 | goto err_2; | ||
3023 | if (!request_region(ashost->card.io_page, 1, "acornscsi(page)")) | ||
3024 | goto err_3; | ||
3025 | #ifdef USE_DMAC | ||
3026 | if (!request_region(ashost->dma.io_port, 256, "acornscsi(dmac)")) | ||
3027 | goto err_4; | ||
3028 | #endif | ||
3029 | if (!request_region(host->io_port, 2048, "acornscsi(ram)")) | ||
3030 | goto err_5; | ||
3031 | |||
3032 | ret = request_irq(host->irq, acornscsi_intr, IRQF_DISABLED, "acornscsi", ashost); | 2998 | ret = request_irq(host->irq, acornscsi_intr, IRQF_DISABLED, "acornscsi", ashost); |
3033 | if (ret) { | 2999 | if (ret) { |
3034 | printk(KERN_CRIT "scsi%d: IRQ%d not free: %d\n", | 3000 | printk(KERN_CRIT "scsi%d: IRQ%d not free: %d\n", |
3035 | host->host_no, ashost->scsi.irq, ret); | 3001 | host->host_no, ashost->scsi.irq, ret); |
3036 | goto err_6; | 3002 | goto out_put; |
3037 | } | 3003 | } |
3038 | 3004 | ||
3039 | memset(&ashost->stats, 0, sizeof (ashost->stats)); | 3005 | memset(&ashost->stats, 0, sizeof (ashost->stats)); |
@@ -3045,27 +3011,22 @@ acornscsi_probe(struct expansion_card *ec, const struct ecard_id *id) | |||
3045 | 3011 | ||
3046 | ret = scsi_add_host(host, &ec->dev); | 3012 | ret = scsi_add_host(host, &ec->dev); |
3047 | if (ret) | 3013 | if (ret) |
3048 | goto err_7; | 3014 | goto out_irq; |
3049 | 3015 | ||
3050 | scsi_scan_host(host); | 3016 | scsi_scan_host(host); |
3051 | goto out; | 3017 | goto out; |
3052 | 3018 | ||
3053 | err_7: | 3019 | out_irq: |
3054 | free_irq(host->irq, ashost); | 3020 | free_irq(host->irq, ashost); |
3055 | err_6: | 3021 | msgqueue_free(&ashost->scsi.msgs); |
3056 | release_region(host->io_port, 2048); | 3022 | queue_free(&ashost->queues.disconnected); |
3057 | err_5: | 3023 | queue_free(&ashost->queues.issue); |
3058 | #ifdef USE_DMAC | 3024 | out_put: |
3059 | release_region(ashost->dma.io_port, 256); | 3025 | ecardm_iounmap(ec, ashost->fast); |
3060 | #endif | 3026 | ecardm_iounmap(ec, ashost->base); |
3061 | err_4: | ||
3062 | release_region(ashost->card.io_page, 1); | ||
3063 | err_3: | ||
3064 | release_region(ashost->card.io_intr, 1); | ||
3065 | err_2: | ||
3066 | release_region(host->io_port + 0x800, 2); | ||
3067 | err_1: | ||
3068 | scsi_host_put(host); | 3027 | scsi_host_put(host); |
3028 | out_release: | ||
3029 | ecard_release_resources(ec); | ||
3069 | out: | 3030 | out: |
3070 | return ret; | 3031 | return ret; |
3071 | } | 3032 | } |
@@ -3081,20 +3042,17 @@ static void __devexit acornscsi_remove(struct expansion_card *ec) | |||
3081 | /* | 3042 | /* |
3082 | * Put card into RESET state | 3043 | * Put card into RESET state |
3083 | */ | 3044 | */ |
3084 | outb(0x80, ashost->card.io_page); | 3045 | writeb(0x80, ashost->fast + PAGE_REG); |
3085 | 3046 | ||
3086 | free_irq(host->irq, ashost); | 3047 | free_irq(host->irq, ashost); |
3087 | 3048 | ||
3088 | release_region(host->io_port + 0x800, 2); | ||
3089 | release_region(ashost->card.io_intr, 1); | ||
3090 | release_region(ashost->card.io_page, 1); | ||
3091 | release_region(ashost->dma.io_port, 256); | ||
3092 | release_region(host->io_port, 2048); | ||
3093 | |||
3094 | msgqueue_free(&ashost->scsi.msgs); | 3049 | msgqueue_free(&ashost->scsi.msgs); |
3095 | queue_free(&ashost->queues.disconnected); | 3050 | queue_free(&ashost->queues.disconnected); |
3096 | queue_free(&ashost->queues.issue); | 3051 | queue_free(&ashost->queues.issue); |
3052 | ecardm_iounmap(ec, ashost->fast); | ||
3053 | ecardm_iounmap(ec, ashost->base); | ||
3097 | scsi_host_put(host); | 3054 | scsi_host_put(host); |
3055 | ecard_release_resources(ec); | ||
3098 | } | 3056 | } |
3099 | 3057 | ||
3100 | static const struct ecard_id acornscsi_cids[] = { | 3058 | static const struct ecard_id acornscsi_cids[] = { |
diff --git a/drivers/scsi/arm/acornscsi.h b/drivers/scsi/arm/acornscsi.h index d11424b89f42..8d2172a0b351 100644 --- a/drivers/scsi/arm/acornscsi.h +++ b/drivers/scsi/arm/acornscsi.h | |||
@@ -179,7 +179,6 @@ | |||
179 | 179 | ||
180 | /* miscellaneous internal variables */ | 180 | /* miscellaneous internal variables */ |
181 | 181 | ||
182 | #define POD_SPACE(x) ((x) + 0xd0000) | ||
183 | #define MASK_ON (MASKREG_M3|MASKREG_M2|MASKREG_M1|MASKREG_M0) | 182 | #define MASK_ON (MASKREG_M3|MASKREG_M2|MASKREG_M1|MASKREG_M0) |
184 | #define MASK_OFF (MASKREG_M3|MASKREG_M2|MASKREG_M1) | 183 | #define MASK_OFF (MASKREG_M3|MASKREG_M2|MASKREG_M1) |
185 | 184 | ||
@@ -279,10 +278,11 @@ typedef struct acornscsi_hostdata { | |||
279 | struct Scsi_Host *host; /* host */ | 278 | struct Scsi_Host *host; /* host */ |
280 | struct scsi_cmnd *SCpnt; /* currently processing command */ | 279 | struct scsi_cmnd *SCpnt; /* currently processing command */ |
281 | struct scsi_cmnd *origSCpnt; /* original connecting command */ | 280 | struct scsi_cmnd *origSCpnt; /* original connecting command */ |
281 | void __iomem *base; /* memc base address */ | ||
282 | void __iomem *fast; /* fast ioc base address */ | ||
282 | 283 | ||
283 | /* driver information */ | 284 | /* driver information */ |
284 | struct { | 285 | struct { |
285 | unsigned int io_port; /* base address of WD33C93 */ | ||
286 | unsigned int irq; /* interrupt */ | 286 | unsigned int irq; /* interrupt */ |
287 | phase_t phase; /* current phase */ | 287 | phase_t phase; /* current phase */ |
288 | 288 | ||
@@ -329,8 +329,6 @@ typedef struct acornscsi_hostdata { | |||
329 | 329 | ||
330 | /* DMA info */ | 330 | /* DMA info */ |
331 | struct { | 331 | struct { |
332 | unsigned int io_port; /* base address of DMA controller */ | ||
333 | unsigned int io_intr_clear; /* address of DMA interrupt clear */ | ||
334 | unsigned int free_addr; /* next free address */ | 332 | unsigned int free_addr; /* next free address */ |
335 | unsigned int start_addr; /* start address of current transfer */ | 333 | unsigned int start_addr; /* start address of current transfer */ |
336 | dmadir_t direction; /* dma direction */ | 334 | dmadir_t direction; /* dma direction */ |
@@ -345,9 +343,6 @@ typedef struct acornscsi_hostdata { | |||
345 | 343 | ||
346 | /* card info */ | 344 | /* card info */ |
347 | struct { | 345 | struct { |
348 | unsigned int io_intr; /* base address of interrupt id reg */ | ||
349 | unsigned int io_page; /* base address of page reg */ | ||
350 | unsigned int io_ram; /* base address of RAM access */ | ||
351 | unsigned char page_reg; /* current setting of page reg */ | 346 | unsigned char page_reg; /* current setting of page reg */ |
352 | } card; | 347 | } card; |
353 | 348 | ||
diff --git a/drivers/scsi/esp_scsi.c b/drivers/scsi/esp_scsi.c index a0b6d414953d..59fbef08d690 100644 --- a/drivers/scsi/esp_scsi.c +++ b/drivers/scsi/esp_scsi.c | |||
@@ -2359,6 +2359,24 @@ void scsi_esp_unregister(struct esp *esp) | |||
2359 | } | 2359 | } |
2360 | EXPORT_SYMBOL(scsi_esp_unregister); | 2360 | EXPORT_SYMBOL(scsi_esp_unregister); |
2361 | 2361 | ||
2362 | static int esp_target_alloc(struct scsi_target *starget) | ||
2363 | { | ||
2364 | struct esp *esp = shost_priv(dev_to_shost(&starget->dev)); | ||
2365 | struct esp_target_data *tp = &esp->target[starget->id]; | ||
2366 | |||
2367 | tp->starget = starget; | ||
2368 | |||
2369 | return 0; | ||
2370 | } | ||
2371 | |||
2372 | static void esp_target_destroy(struct scsi_target *starget) | ||
2373 | { | ||
2374 | struct esp *esp = shost_priv(dev_to_shost(&starget->dev)); | ||
2375 | struct esp_target_data *tp = &esp->target[starget->id]; | ||
2376 | |||
2377 | tp->starget = NULL; | ||
2378 | } | ||
2379 | |||
2362 | static int esp_slave_alloc(struct scsi_device *dev) | 2380 | static int esp_slave_alloc(struct scsi_device *dev) |
2363 | { | 2381 | { |
2364 | struct esp *esp = shost_priv(dev->host); | 2382 | struct esp *esp = shost_priv(dev->host); |
@@ -2370,8 +2388,6 @@ static int esp_slave_alloc(struct scsi_device *dev) | |||
2370 | return -ENOMEM; | 2388 | return -ENOMEM; |
2371 | dev->hostdata = lp; | 2389 | dev->hostdata = lp; |
2372 | 2390 | ||
2373 | tp->starget = dev->sdev_target; | ||
2374 | |||
2375 | spi_min_period(tp->starget) = esp->min_period; | 2391 | spi_min_period(tp->starget) = esp->min_period; |
2376 | spi_max_offset(tp->starget) = 15; | 2392 | spi_max_offset(tp->starget) = 15; |
2377 | 2393 | ||
@@ -2608,6 +2624,8 @@ struct scsi_host_template scsi_esp_template = { | |||
2608 | .name = "esp", | 2624 | .name = "esp", |
2609 | .info = esp_info, | 2625 | .info = esp_info, |
2610 | .queuecommand = esp_queuecommand, | 2626 | .queuecommand = esp_queuecommand, |
2627 | .target_alloc = esp_target_alloc, | ||
2628 | .target_destroy = esp_target_destroy, | ||
2611 | .slave_alloc = esp_slave_alloc, | 2629 | .slave_alloc = esp_slave_alloc, |
2612 | .slave_configure = esp_slave_configure, | 2630 | .slave_configure = esp_slave_configure, |
2613 | .slave_destroy = esp_slave_destroy, | 2631 | .slave_destroy = esp_slave_destroy, |
diff --git a/drivers/scsi/ses.c b/drivers/scsi/ses.c index 45df83b9d847..0fe031f003e7 100644 --- a/drivers/scsi/ses.c +++ b/drivers/scsi/ses.c | |||
@@ -61,7 +61,7 @@ static int ses_probe(struct device *dev) | |||
61 | return err; | 61 | return err; |
62 | } | 62 | } |
63 | 63 | ||
64 | #define SES_TIMEOUT 30 | 64 | #define SES_TIMEOUT (30 * HZ) |
65 | #define SES_RETRIES 3 | 65 | #define SES_RETRIES 3 |
66 | 66 | ||
67 | static int ses_recv_diag(struct scsi_device *sdev, int page_code, | 67 | static int ses_recv_diag(struct scsi_device *sdev, int page_code, |
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig index 9bc42763623c..5a9754455eed 100644 --- a/drivers/serial/Kconfig +++ b/drivers/serial/Kconfig | |||
@@ -448,22 +448,27 @@ config SERIAL_CLPS711X_CONSOLE | |||
448 | your boot loader (lilo or loadlin) about how to pass options to the | 448 | your boot loader (lilo or loadlin) about how to pass options to the |
449 | kernel at boot time.) | 449 | kernel at boot time.) |
450 | 450 | ||
451 | config SERIAL_S3C2410 | 451 | config SERIAL_SAMSUNG |
452 | tristate "Samsung S3C2410/S3C2440/S3C2442/S3C2412 Serial port support" | 452 | tristate "Samsung SoC serial support" |
453 | depends on ARM && ARCH_S3C2410 | 453 | depends on ARM && PLAT_S3C24XX |
454 | select SERIAL_CORE | ||
455 | help | 454 | help |
456 | Support for the on-chip UARTs on the Samsung S3C24XX series CPUs, | 455 | Support for the on-chip UARTs on the Samsung S3C24XX series CPUs, |
457 | providing /dev/ttySAC0, 1 and 2 (note, some machines may not | 456 | providing /dev/ttySAC0, 1 and 2 (note, some machines may not |
458 | provide all of these ports, depending on how the serial port | 457 | provide all of these ports, depending on how the serial port |
459 | pins are configured. | 458 | pins are configured. |
460 | 459 | ||
461 | Currently this driver supports the UARTS on the S3C2410, S3C2440, | 460 | config SERIAL_SAMSUNG_DEBUG |
462 | S3C2442, S3C2412 and S3C2413 CPUs. | 461 | bool "Samsung SoC serial debug" |
462 | depends on SERIAL_SAMSUNG | ||
463 | help | ||
464 | Add support for debugging the serial driver. Since this is | ||
465 | generally being used as a console, we use our own output | ||
466 | routines that go via the low-level debug printascii() | ||
467 | function. | ||
463 | 468 | ||
464 | config SERIAL_S3C2410_CONSOLE | 469 | config SERIAL_SAMSUNG_CONSOLE |
465 | bool "Support for console on S3C2410 serial port" | 470 | bool "Support for console on Samsung SoC serial port" |
466 | depends on SERIAL_S3C2410=y | 471 | depends on SERIAL_SAMSUNG=y |
467 | select SERIAL_CORE_CONSOLE | 472 | select SERIAL_CORE_CONSOLE |
468 | help | 473 | help |
469 | Allow selection of the S3C24XX on-board serial ports for use as | 474 | Allow selection of the S3C24XX on-board serial ports for use as |
@@ -476,6 +481,37 @@ config SERIAL_S3C2410_CONSOLE | |||
476 | your boot loader about how to pass options to the kernel at | 481 | your boot loader about how to pass options to the kernel at |
477 | boot time.) | 482 | boot time.) |
478 | 483 | ||
484 | config SERIAL_S3C2400 | ||
485 | tristate "Samsung S3C2410 Serial port support" | ||
486 | depends on ARM && SERIAL_SAMSUNG && CPU_S3C2400 | ||
487 | default y if CPU_S3C2400 | ||
488 | help | ||
489 | Serial port support for the Samsung S3C2400 SoC | ||
490 | |||
491 | config SERIAL_S3C2410 | ||
492 | tristate "Samsung S3C2410 Serial port support" | ||
493 | depends on SERIAL_SAMSUNG && CPU_S3C2410 | ||
494 | default y if CPU_S3C2410 | ||
495 | help | ||
496 | Serial port support for the Samsung S3C2410 SoC | ||
497 | |||
498 | config SERIAL_S3C2412 | ||
499 | tristate "Samsung S3C2412/S3C2413 Serial port support" | ||
500 | depends on SERIAL_SAMSUNG && CPU_S3C2412 | ||
501 | default y if CPU_S3C2412 | ||
502 | help | ||
503 | Serial port support for the Samsung S3C2412 and S3C2413 SoC | ||
504 | |||
505 | config SERIAL_S3C2440 | ||
506 | tristate "Samsung S3C2440/S3C2442 Serial port support" | ||
507 | depends on SERIAL_SAMSUNG && (CPU_S3C2440 || CPU_S3C2442) | ||
508 | default y if CPU_S3C2440 | ||
509 | default y if CPU_S3C2442 | ||
510 | help | ||
511 | Serial port support for the Samsung S3C2440 and S3C2442 SoC | ||
512 | |||
513 | |||
514 | |||
479 | config SERIAL_DZ | 515 | config SERIAL_DZ |
480 | bool "DECstation DZ serial driver" | 516 | bool "DECstation DZ serial driver" |
481 | depends on MACH_DECSTATION && 32BIT | 517 | depends on MACH_DECSTATION && 32BIT |
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile index 0d9c09b1e836..7d85c1fbe7e0 100644 --- a/drivers/serial/Makefile +++ b/drivers/serial/Makefile | |||
@@ -28,7 +28,11 @@ obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o | |||
28 | obj-$(CONFIG_SERIAL_SA1100) += sa1100.o | 28 | obj-$(CONFIG_SERIAL_SA1100) += sa1100.o |
29 | obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o | 29 | obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o |
30 | obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o | 30 | obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o |
31 | obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o | ||
32 | obj-$(CONFIG_SERIAL_S3C2400) += s3c2400.o | ||
31 | obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o | 33 | obj-$(CONFIG_SERIAL_S3C2410) += s3c2410.o |
34 | obj-$(CONFIG_SERIAL_S3C2412) += s3c2412.o | ||
35 | obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o | ||
32 | obj-$(CONFIG_SERIAL_SUNCORE) += suncore.o | 36 | obj-$(CONFIG_SERIAL_SUNCORE) += suncore.o |
33 | obj-$(CONFIG_SERIAL_SUNHV) += sunhv.o | 37 | obj-$(CONFIG_SERIAL_SUNHV) += sunhv.o |
34 | obj-$(CONFIG_SERIAL_SUNZILOG) += sunzilog.o | 38 | obj-$(CONFIG_SERIAL_SUNZILOG) += sunzilog.o |
diff --git a/drivers/serial/s3c2400.c b/drivers/serial/s3c2400.c new file mode 100644 index 000000000000..a1102053e553 --- /dev/null +++ b/drivers/serial/s3c2400.c | |||
@@ -0,0 +1,106 @@ | |||
1 | /* linux/drivers/serial/s3c240.c | ||
2 | * | ||
3 | * Driver for Samsung SoC onboard UARTs. | ||
4 | * | ||
5 | * Ben Dooks, Copyright (c) 2003-2005 Simtec Electronics | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/ioport.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | |||
18 | #include <asm/irq.h> | ||
19 | |||
20 | #include <asm/hardware.h> | ||
21 | |||
22 | #include <asm/plat-s3c/regs-serial.h> | ||
23 | #include <asm/arch/regs-gpio.h> | ||
24 | |||
25 | #include "samsung.h" | ||
26 | |||
27 | static int s3c2400_serial_getsource(struct uart_port *port, | ||
28 | struct s3c24xx_uart_clksrc *clk) | ||
29 | { | ||
30 | clk->divisor = 1; | ||
31 | clk->name = "pclk"; | ||
32 | |||
33 | return 0; | ||
34 | } | ||
35 | |||
36 | static int s3c2400_serial_setsource(struct uart_port *port, | ||
37 | struct s3c24xx_uart_clksrc *clk) | ||
38 | { | ||
39 | return 0; | ||
40 | } | ||
41 | |||
42 | static int s3c2400_serial_resetport(struct uart_port *port, | ||
43 | struct s3c2410_uartcfg *cfg) | ||
44 | { | ||
45 | dbg("s3c2400_serial_resetport: port=%p (%08lx), cfg=%p\n", | ||
46 | port, port->mapbase, cfg); | ||
47 | |||
48 | wr_regl(port, S3C2410_UCON, cfg->ucon); | ||
49 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
50 | |||
51 | /* reset both fifos */ | ||
52 | |||
53 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
54 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
55 | |||
56 | return 0; | ||
57 | } | ||
58 | |||
59 | static struct s3c24xx_uart_info s3c2400_uart_inf = { | ||
60 | .name = "Samsung S3C2400 UART", | ||
61 | .type = PORT_S3C2400, | ||
62 | .fifosize = 16, | ||
63 | .rx_fifomask = S3C2410_UFSTAT_RXMASK, | ||
64 | .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, | ||
65 | .rx_fifofull = S3C2410_UFSTAT_RXFULL, | ||
66 | .tx_fifofull = S3C2410_UFSTAT_TXFULL, | ||
67 | .tx_fifomask = S3C2410_UFSTAT_TXMASK, | ||
68 | .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT, | ||
69 | .get_clksrc = s3c2400_serial_getsource, | ||
70 | .set_clksrc = s3c2400_serial_setsource, | ||
71 | .reset_port = s3c2400_serial_resetport, | ||
72 | }; | ||
73 | |||
74 | static int s3c2400_serial_probe(struct platform_device *dev) | ||
75 | { | ||
76 | return s3c24xx_serial_probe(dev, &s3c2400_uart_inf); | ||
77 | } | ||
78 | |||
79 | static struct platform_driver s3c2400_serial_drv = { | ||
80 | .probe = s3c2400_serial_probe, | ||
81 | .remove = s3c24xx_serial_remove, | ||
82 | .driver = { | ||
83 | .name = "s3c2400-uart", | ||
84 | .owner = THIS_MODULE, | ||
85 | }, | ||
86 | }; | ||
87 | |||
88 | s3c24xx_console_init(&s3c2400_serial_drv, &s3c2400_uart_inf); | ||
89 | |||
90 | static inline int s3c2400_serial_init(void) | ||
91 | { | ||
92 | return s3c24xx_serial_init(&s3c2400_serial_drv, &s3c2400_uart_inf); | ||
93 | } | ||
94 | |||
95 | static inline void s3c2400_serial_exit(void) | ||
96 | { | ||
97 | platform_driver_unregister(&s3c2400_serial_drv); | ||
98 | } | ||
99 | |||
100 | module_init(s3c2400_serial_init); | ||
101 | module_exit(s3c2400_serial_exit); | ||
102 | |||
103 | MODULE_LICENSE("GPL v2"); | ||
104 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
105 | MODULE_DESCRIPTION("Samsung S3C2400 SoC Serial port driver"); | ||
106 | MODULE_ALIAS("platform:s3c2400-uart"); | ||
diff --git a/drivers/serial/s3c2410.c b/drivers/serial/s3c2410.c index 2b6a013639e6..c5f03f41686f 100644 --- a/drivers/serial/s3c2410.c +++ b/drivers/serial/s3c2410.c | |||
@@ -1,1270 +1,30 @@ | |||
1 | /* | 1 | /* linux/drivers/serial/s3c2410.c |
2 | * linux/drivers/serial/s3c2410.c | ||
3 | * | 2 | * |
4 | * Driver for onboard UARTs on the Samsung S3C24XX | 3 | * Driver for Samsung S3C2410 SoC onboard UARTs. |
5 | * | 4 | * |
6 | * Based on drivers/char/serial.c and drivers/char/21285.c | 5 | * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics |
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | 7 | * |
8 | * Ben Dooks, (c) 2003-2005 Simtec Electronics | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * http://www.simtec.co.uk/products/SWLINUX/ | 9 | * it under the terms of the GNU General Public License version 2 as |
10 | * | 10 | * published by the Free Software Foundation. |
11 | * Changelog: | ||
12 | * | ||
13 | * 22-Jul-2004 BJD Finished off device rewrite | ||
14 | * | ||
15 | * 21-Jul-2004 BJD Thanks to <herbet@13thfloor.at> for pointing out | ||
16 | * problems with baud rate and loss of IR settings. Update | ||
17 | * to add configuration via platform_device structure | ||
18 | * | ||
19 | * 28-Sep-2004 BJD Re-write for the following items | ||
20 | * - S3C2410 and S3C2440 serial support | ||
21 | * - Power Management support | ||
22 | * - Fix console via IrDA devices | ||
23 | * - SysReq (Herbert Pötzl) | ||
24 | * - Break character handling (Herbert Pötzl) | ||
25 | * - spin-lock initialisation (Dimitry Andric) | ||
26 | * - added clock control | ||
27 | * - updated init code to use platform_device info | ||
28 | * | ||
29 | * 06-Mar-2005 BJD Add s3c2440 fclk clock source | ||
30 | * | ||
31 | * 09-Mar-2005 BJD Add s3c2400 support | ||
32 | * | ||
33 | * 10-Mar-2005 LCVR Changed S3C2410_VA_UART to S3C24XX_VA_UART | ||
34 | */ | ||
35 | |||
36 | /* Note on 2440 fclk clock source handling | ||
37 | * | ||
38 | * Whilst it is possible to use the fclk as clock source, the method | ||
39 | * of properly switching too/from this is currently un-implemented, so | ||
40 | * whichever way is configured at startup is the one that will be used. | ||
41 | */ | ||
42 | |||
43 | /* Hote on 2410 error handling | ||
44 | * | ||
45 | * The s3c2410 manual has a love/hate affair with the contents of the | ||
46 | * UERSTAT register in the UART blocks, and keeps marking some of the | ||
47 | * error bits as reserved. Having checked with the s3c2410x01, | ||
48 | * it copes with BREAKs properly, so I am happy to ignore the RESERVED | ||
49 | * feature from the latter versions of the manual. | ||
50 | * | ||
51 | * If it becomes aparrent that latter versions of the 2410 remove these | ||
52 | * bits, then action will have to be taken to differentiate the versions | ||
53 | * and change the policy on BREAK | ||
54 | * | ||
55 | * BJD, 04-Nov-2004 | ||
56 | */ | 11 | */ |
57 | 12 | ||
58 | |||
59 | #if defined(CONFIG_SERIAL_S3C2410_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | ||
60 | #define SUPPORT_SYSRQ | ||
61 | #endif | ||
62 | |||
63 | #include <linux/module.h> | 13 | #include <linux/module.h> |
64 | #include <linux/ioport.h> | 14 | #include <linux/ioport.h> |
15 | #include <linux/io.h> | ||
65 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
66 | #include <linux/init.h> | 17 | #include <linux/init.h> |
67 | #include <linux/sysrq.h> | ||
68 | #include <linux/console.h> | ||
69 | #include <linux/tty.h> | ||
70 | #include <linux/tty_flip.h> | ||
71 | #include <linux/serial_core.h> | 18 | #include <linux/serial_core.h> |
72 | #include <linux/serial.h> | 19 | #include <linux/serial.h> |
73 | #include <linux/delay.h> | ||
74 | #include <linux/clk.h> | ||
75 | 20 | ||
76 | #include <asm/io.h> | ||
77 | #include <asm/irq.h> | 21 | #include <asm/irq.h> |
78 | |||
79 | #include <asm/hardware.h> | 22 | #include <asm/hardware.h> |
80 | 23 | ||
81 | #include <asm/plat-s3c/regs-serial.h> | 24 | #include <asm/plat-s3c/regs-serial.h> |
82 | #include <asm/arch/regs-gpio.h> | 25 | #include <asm/arch/regs-gpio.h> |
83 | 26 | ||
84 | /* structures */ | 27 | #include "samsung.h" |
85 | |||
86 | struct s3c24xx_uart_info { | ||
87 | char *name; | ||
88 | unsigned int type; | ||
89 | unsigned int fifosize; | ||
90 | unsigned long rx_fifomask; | ||
91 | unsigned long rx_fifoshift; | ||
92 | unsigned long rx_fifofull; | ||
93 | unsigned long tx_fifomask; | ||
94 | unsigned long tx_fifoshift; | ||
95 | unsigned long tx_fifofull; | ||
96 | |||
97 | /* clock source control */ | ||
98 | |||
99 | int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); | ||
100 | int (*set_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); | ||
101 | |||
102 | /* uart controls */ | ||
103 | int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); | ||
104 | }; | ||
105 | |||
106 | struct s3c24xx_uart_port { | ||
107 | unsigned char rx_claimed; | ||
108 | unsigned char tx_claimed; | ||
109 | |||
110 | struct s3c24xx_uart_info *info; | ||
111 | struct s3c24xx_uart_clksrc *clksrc; | ||
112 | struct clk *clk; | ||
113 | struct clk *baudclk; | ||
114 | struct uart_port port; | ||
115 | }; | ||
116 | |||
117 | |||
118 | /* configuration defines */ | ||
119 | |||
120 | #if 0 | ||
121 | #if 1 | ||
122 | /* send debug to the low-level output routines */ | ||
123 | |||
124 | extern void printascii(const char *); | ||
125 | |||
126 | static void | ||
127 | s3c24xx_serial_dbg(const char *fmt, ...) | ||
128 | { | ||
129 | va_list va; | ||
130 | char buff[256]; | ||
131 | |||
132 | va_start(va, fmt); | ||
133 | vsprintf(buff, fmt, va); | ||
134 | va_end(va); | ||
135 | |||
136 | printascii(buff); | ||
137 | } | ||
138 | |||
139 | #define dbg(x...) s3c24xx_serial_dbg(x) | ||
140 | |||
141 | #else | ||
142 | #define dbg(x...) printk(KERN_DEBUG "s3c24xx: "); | ||
143 | #endif | ||
144 | #else /* no debug */ | ||
145 | #define dbg(x...) do {} while(0) | ||
146 | #endif | ||
147 | |||
148 | /* UART name and device definitions */ | ||
149 | |||
150 | #define S3C24XX_SERIAL_NAME "ttySAC" | ||
151 | #define S3C24XX_SERIAL_MAJOR 204 | ||
152 | #define S3C24XX_SERIAL_MINOR 64 | ||
153 | |||
154 | |||
155 | /* conversion functions */ | ||
156 | |||
157 | #define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) | ||
158 | #define s3c24xx_dev_to_cfg(__dev) (struct s3c2410_uartcfg *)((__dev)->platform_data) | ||
159 | |||
160 | /* we can support 3 uarts, but not always use them */ | ||
161 | |||
162 | #ifdef CONFIG_CPU_S3C2400 | ||
163 | #define NR_PORTS (2) | ||
164 | #else | ||
165 | #define NR_PORTS (3) | ||
166 | #endif | ||
167 | |||
168 | /* port irq numbers */ | ||
169 | |||
170 | #define TX_IRQ(port) ((port)->irq + 1) | ||
171 | #define RX_IRQ(port) ((port)->irq) | ||
172 | |||
173 | /* register access controls */ | ||
174 | |||
175 | #define portaddr(port, reg) ((port)->membase + (reg)) | ||
176 | |||
177 | #define rd_regb(port, reg) (__raw_readb(portaddr(port, reg))) | ||
178 | #define rd_regl(port, reg) (__raw_readl(portaddr(port, reg))) | ||
179 | |||
180 | #define wr_regb(port, reg, val) \ | ||
181 | do { __raw_writeb(val, portaddr(port, reg)); } while(0) | ||
182 | |||
183 | #define wr_regl(port, reg, val) \ | ||
184 | do { __raw_writel(val, portaddr(port, reg)); } while(0) | ||
185 | |||
186 | /* macros to change one thing to another */ | ||
187 | |||
188 | #define tx_enabled(port) ((port)->unused[0]) | ||
189 | #define rx_enabled(port) ((port)->unused[1]) | ||
190 | |||
191 | /* flag to ignore all characters comming in */ | ||
192 | #define RXSTAT_DUMMY_READ (0x10000000) | ||
193 | |||
194 | static inline struct s3c24xx_uart_port *to_ourport(struct uart_port *port) | ||
195 | { | ||
196 | return container_of(port, struct s3c24xx_uart_port, port); | ||
197 | } | ||
198 | |||
199 | /* translate a port to the device name */ | ||
200 | |||
201 | static inline const char *s3c24xx_serial_portname(struct uart_port *port) | ||
202 | { | ||
203 | return to_platform_device(port->dev)->name; | ||
204 | } | ||
205 | |||
206 | static int s3c24xx_serial_txempty_nofifo(struct uart_port *port) | ||
207 | { | ||
208 | return (rd_regl(port, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE); | ||
209 | } | ||
210 | |||
211 | static void s3c24xx_serial_rx_enable(struct uart_port *port) | ||
212 | { | ||
213 | unsigned long flags; | ||
214 | unsigned int ucon, ufcon; | ||
215 | int count = 10000; | ||
216 | |||
217 | spin_lock_irqsave(&port->lock, flags); | ||
218 | |||
219 | while (--count && !s3c24xx_serial_txempty_nofifo(port)) | ||
220 | udelay(100); | ||
221 | |||
222 | ufcon = rd_regl(port, S3C2410_UFCON); | ||
223 | ufcon |= S3C2410_UFCON_RESETRX; | ||
224 | wr_regl(port, S3C2410_UFCON, ufcon); | ||
225 | |||
226 | ucon = rd_regl(port, S3C2410_UCON); | ||
227 | ucon |= S3C2410_UCON_RXIRQMODE; | ||
228 | wr_regl(port, S3C2410_UCON, ucon); | ||
229 | |||
230 | rx_enabled(port) = 1; | ||
231 | spin_unlock_irqrestore(&port->lock, flags); | ||
232 | } | ||
233 | |||
234 | static void s3c24xx_serial_rx_disable(struct uart_port *port) | ||
235 | { | ||
236 | unsigned long flags; | ||
237 | unsigned int ucon; | ||
238 | |||
239 | spin_lock_irqsave(&port->lock, flags); | ||
240 | |||
241 | ucon = rd_regl(port, S3C2410_UCON); | ||
242 | ucon &= ~S3C2410_UCON_RXIRQMODE; | ||
243 | wr_regl(port, S3C2410_UCON, ucon); | ||
244 | |||
245 | rx_enabled(port) = 0; | ||
246 | spin_unlock_irqrestore(&port->lock, flags); | ||
247 | } | ||
248 | |||
249 | static void s3c24xx_serial_stop_tx(struct uart_port *port) | ||
250 | { | ||
251 | if (tx_enabled(port)) { | ||
252 | disable_irq(TX_IRQ(port)); | ||
253 | tx_enabled(port) = 0; | ||
254 | if (port->flags & UPF_CONS_FLOW) | ||
255 | s3c24xx_serial_rx_enable(port); | ||
256 | } | ||
257 | } | ||
258 | |||
259 | static void s3c24xx_serial_start_tx(struct uart_port *port) | ||
260 | { | ||
261 | if (!tx_enabled(port)) { | ||
262 | if (port->flags & UPF_CONS_FLOW) | ||
263 | s3c24xx_serial_rx_disable(port); | ||
264 | |||
265 | enable_irq(TX_IRQ(port)); | ||
266 | tx_enabled(port) = 1; | ||
267 | } | ||
268 | } | ||
269 | |||
270 | |||
271 | static void s3c24xx_serial_stop_rx(struct uart_port *port) | ||
272 | { | ||
273 | if (rx_enabled(port)) { | ||
274 | dbg("s3c24xx_serial_stop_rx: port=%p\n", port); | ||
275 | disable_irq(RX_IRQ(port)); | ||
276 | rx_enabled(port) = 0; | ||
277 | } | ||
278 | } | ||
279 | |||
280 | static void s3c24xx_serial_enable_ms(struct uart_port *port) | ||
281 | { | ||
282 | } | ||
283 | |||
284 | static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port) | ||
285 | { | ||
286 | return to_ourport(port)->info; | ||
287 | } | ||
288 | |||
289 | static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) | ||
290 | { | ||
291 | if (port->dev == NULL) | ||
292 | return NULL; | ||
293 | |||
294 | return (struct s3c2410_uartcfg *)port->dev->platform_data; | ||
295 | } | ||
296 | |||
297 | static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, | ||
298 | unsigned long ufstat) | ||
299 | { | ||
300 | struct s3c24xx_uart_info *info = ourport->info; | ||
301 | |||
302 | if (ufstat & info->rx_fifofull) | ||
303 | return info->fifosize; | ||
304 | |||
305 | return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; | ||
306 | } | ||
307 | |||
308 | |||
309 | /* ? - where has parity gone?? */ | ||
310 | #define S3C2410_UERSTAT_PARITY (0x1000) | ||
311 | |||
312 | static irqreturn_t | ||
313 | s3c24xx_serial_rx_chars(int irq, void *dev_id) | ||
314 | { | ||
315 | struct s3c24xx_uart_port *ourport = dev_id; | ||
316 | struct uart_port *port = &ourport->port; | ||
317 | struct tty_struct *tty = port->info->tty; | ||
318 | unsigned int ufcon, ch, flag, ufstat, uerstat; | ||
319 | int max_count = 64; | ||
320 | |||
321 | while (max_count-- > 0) { | ||
322 | ufcon = rd_regl(port, S3C2410_UFCON); | ||
323 | ufstat = rd_regl(port, S3C2410_UFSTAT); | ||
324 | |||
325 | if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0) | ||
326 | break; | ||
327 | |||
328 | uerstat = rd_regl(port, S3C2410_UERSTAT); | ||
329 | ch = rd_regb(port, S3C2410_URXH); | ||
330 | |||
331 | if (port->flags & UPF_CONS_FLOW) { | ||
332 | int txe = s3c24xx_serial_txempty_nofifo(port); | ||
333 | |||
334 | if (rx_enabled(port)) { | ||
335 | if (!txe) { | ||
336 | rx_enabled(port) = 0; | ||
337 | continue; | ||
338 | } | ||
339 | } else { | ||
340 | if (txe) { | ||
341 | ufcon |= S3C2410_UFCON_RESETRX; | ||
342 | wr_regl(port, S3C2410_UFCON, ufcon); | ||
343 | rx_enabled(port) = 1; | ||
344 | goto out; | ||
345 | } | ||
346 | continue; | ||
347 | } | ||
348 | } | ||
349 | |||
350 | /* insert the character into the buffer */ | ||
351 | |||
352 | flag = TTY_NORMAL; | ||
353 | port->icount.rx++; | ||
354 | |||
355 | if (unlikely(uerstat & S3C2410_UERSTAT_ANY)) { | ||
356 | dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n", | ||
357 | ch, uerstat); | ||
358 | |||
359 | /* check for break */ | ||
360 | if (uerstat & S3C2410_UERSTAT_BREAK) { | ||
361 | dbg("break!\n"); | ||
362 | port->icount.brk++; | ||
363 | if (uart_handle_break(port)) | ||
364 | goto ignore_char; | ||
365 | } | ||
366 | |||
367 | if (uerstat & S3C2410_UERSTAT_FRAME) | ||
368 | port->icount.frame++; | ||
369 | if (uerstat & S3C2410_UERSTAT_OVERRUN) | ||
370 | port->icount.overrun++; | ||
371 | |||
372 | uerstat &= port->read_status_mask; | ||
373 | |||
374 | if (uerstat & S3C2410_UERSTAT_BREAK) | ||
375 | flag = TTY_BREAK; | ||
376 | else if (uerstat & S3C2410_UERSTAT_PARITY) | ||
377 | flag = TTY_PARITY; | ||
378 | else if (uerstat & ( S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_OVERRUN)) | ||
379 | flag = TTY_FRAME; | ||
380 | } | ||
381 | |||
382 | if (uart_handle_sysrq_char(port, ch)) | ||
383 | goto ignore_char; | ||
384 | |||
385 | uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, ch, flag); | ||
386 | |||
387 | ignore_char: | ||
388 | continue; | ||
389 | } | ||
390 | tty_flip_buffer_push(tty); | ||
391 | |||
392 | out: | ||
393 | return IRQ_HANDLED; | ||
394 | } | ||
395 | |||
396 | static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) | ||
397 | { | ||
398 | struct s3c24xx_uart_port *ourport = id; | ||
399 | struct uart_port *port = &ourport->port; | ||
400 | struct circ_buf *xmit = &port->info->xmit; | ||
401 | int count = 256; | ||
402 | |||
403 | if (port->x_char) { | ||
404 | wr_regb(port, S3C2410_UTXH, port->x_char); | ||
405 | port->icount.tx++; | ||
406 | port->x_char = 0; | ||
407 | goto out; | ||
408 | } | ||
409 | |||
410 | /* if there isnt anything more to transmit, or the uart is now | ||
411 | * stopped, disable the uart and exit | ||
412 | */ | ||
413 | |||
414 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | ||
415 | s3c24xx_serial_stop_tx(port); | ||
416 | goto out; | ||
417 | } | ||
418 | |||
419 | /* try and drain the buffer... */ | ||
420 | |||
421 | while (!uart_circ_empty(xmit) && count-- > 0) { | ||
422 | if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) | ||
423 | break; | ||
424 | |||
425 | wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); | ||
426 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | ||
427 | port->icount.tx++; | ||
428 | } | ||
429 | |||
430 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
431 | uart_write_wakeup(port); | ||
432 | |||
433 | if (uart_circ_empty(xmit)) | ||
434 | s3c24xx_serial_stop_tx(port); | ||
435 | |||
436 | out: | ||
437 | return IRQ_HANDLED; | ||
438 | } | ||
439 | |||
440 | static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) | ||
441 | { | ||
442 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
443 | unsigned long ufstat = rd_regl(port, S3C2410_UFSTAT); | ||
444 | unsigned long ufcon = rd_regl(port, S3C2410_UFCON); | ||
445 | |||
446 | if (ufcon & S3C2410_UFCON_FIFOMODE) { | ||
447 | if ((ufstat & info->tx_fifomask) != 0 || | ||
448 | (ufstat & info->tx_fifofull)) | ||
449 | return 0; | ||
450 | |||
451 | return 1; | ||
452 | } | ||
453 | |||
454 | return s3c24xx_serial_txempty_nofifo(port); | ||
455 | } | ||
456 | |||
457 | /* no modem control lines */ | ||
458 | static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) | ||
459 | { | ||
460 | unsigned int umstat = rd_regb(port,S3C2410_UMSTAT); | ||
461 | |||
462 | if (umstat & S3C2410_UMSTAT_CTS) | ||
463 | return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; | ||
464 | else | ||
465 | return TIOCM_CAR | TIOCM_DSR; | ||
466 | } | ||
467 | |||
468 | static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
469 | { | ||
470 | /* todo - possibly remove AFC and do manual CTS */ | ||
471 | } | ||
472 | |||
473 | static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state) | ||
474 | { | ||
475 | unsigned long flags; | ||
476 | unsigned int ucon; | ||
477 | |||
478 | spin_lock_irqsave(&port->lock, flags); | ||
479 | |||
480 | ucon = rd_regl(port, S3C2410_UCON); | ||
481 | |||
482 | if (break_state) | ||
483 | ucon |= S3C2410_UCON_SBREAK; | ||
484 | else | ||
485 | ucon &= ~S3C2410_UCON_SBREAK; | ||
486 | |||
487 | wr_regl(port, S3C2410_UCON, ucon); | ||
488 | |||
489 | spin_unlock_irqrestore(&port->lock, flags); | ||
490 | } | ||
491 | |||
492 | static void s3c24xx_serial_shutdown(struct uart_port *port) | ||
493 | { | ||
494 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
495 | |||
496 | if (ourport->tx_claimed) { | ||
497 | free_irq(TX_IRQ(port), ourport); | ||
498 | tx_enabled(port) = 0; | ||
499 | ourport->tx_claimed = 0; | ||
500 | } | ||
501 | |||
502 | if (ourport->rx_claimed) { | ||
503 | free_irq(RX_IRQ(port), ourport); | ||
504 | ourport->rx_claimed = 0; | ||
505 | rx_enabled(port) = 0; | ||
506 | } | ||
507 | } | ||
508 | |||
509 | |||
510 | static int s3c24xx_serial_startup(struct uart_port *port) | ||
511 | { | ||
512 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
513 | int ret; | ||
514 | |||
515 | dbg("s3c24xx_serial_startup: port=%p (%08lx,%p)\n", | ||
516 | port->mapbase, port->membase); | ||
517 | |||
518 | rx_enabled(port) = 1; | ||
519 | |||
520 | ret = request_irq(RX_IRQ(port), | ||
521 | s3c24xx_serial_rx_chars, 0, | ||
522 | s3c24xx_serial_portname(port), ourport); | ||
523 | |||
524 | if (ret != 0) { | ||
525 | printk(KERN_ERR "cannot get irq %d\n", RX_IRQ(port)); | ||
526 | return ret; | ||
527 | } | ||
528 | |||
529 | ourport->rx_claimed = 1; | ||
530 | |||
531 | dbg("requesting tx irq...\n"); | ||
532 | |||
533 | tx_enabled(port) = 1; | ||
534 | |||
535 | ret = request_irq(TX_IRQ(port), | ||
536 | s3c24xx_serial_tx_chars, 0, | ||
537 | s3c24xx_serial_portname(port), ourport); | ||
538 | |||
539 | if (ret) { | ||
540 | printk(KERN_ERR "cannot get irq %d\n", TX_IRQ(port)); | ||
541 | goto err; | ||
542 | } | ||
543 | |||
544 | ourport->tx_claimed = 1; | ||
545 | |||
546 | dbg("s3c24xx_serial_startup ok\n"); | ||
547 | |||
548 | /* the port reset code should have done the correct | ||
549 | * register setup for the port controls */ | ||
550 | |||
551 | return ret; | ||
552 | |||
553 | err: | ||
554 | s3c24xx_serial_shutdown(port); | ||
555 | return ret; | ||
556 | } | ||
557 | |||
558 | /* power power management control */ | ||
559 | |||
560 | static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, | ||
561 | unsigned int old) | ||
562 | { | ||
563 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
564 | |||
565 | switch (level) { | ||
566 | case 3: | ||
567 | if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) | ||
568 | clk_disable(ourport->baudclk); | ||
569 | |||
570 | clk_disable(ourport->clk); | ||
571 | break; | ||
572 | |||
573 | case 0: | ||
574 | clk_enable(ourport->clk); | ||
575 | |||
576 | if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) | ||
577 | clk_enable(ourport->baudclk); | ||
578 | |||
579 | break; | ||
580 | default: | ||
581 | printk(KERN_ERR "s3c24xx_serial: unknown pm %d\n", level); | ||
582 | } | ||
583 | } | ||
584 | |||
585 | /* baud rate calculation | ||
586 | * | ||
587 | * The UARTs on the S3C2410/S3C2440 can take their clocks from a number | ||
588 | * of different sources, including the peripheral clock ("pclk") and an | ||
589 | * external clock ("uclk"). The S3C2440 also adds the core clock ("fclk") | ||
590 | * with a programmable extra divisor. | ||
591 | * | ||
592 | * The following code goes through the clock sources, and calculates the | ||
593 | * baud clocks (and the resultant actual baud rates) and then tries to | ||
594 | * pick the closest one and select that. | ||
595 | * | ||
596 | */ | ||
597 | |||
598 | |||
599 | #define MAX_CLKS (8) | ||
600 | |||
601 | static struct s3c24xx_uart_clksrc tmp_clksrc = { | ||
602 | .name = "pclk", | ||
603 | .min_baud = 0, | ||
604 | .max_baud = 0, | ||
605 | .divisor = 1, | ||
606 | }; | ||
607 | |||
608 | static inline int | ||
609 | s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c) | ||
610 | { | ||
611 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
612 | |||
613 | return (info->get_clksrc)(port, c); | ||
614 | } | ||
615 | |||
616 | static inline int | ||
617 | s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c) | ||
618 | { | ||
619 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
620 | |||
621 | return (info->set_clksrc)(port, c); | ||
622 | } | ||
623 | |||
624 | struct baud_calc { | ||
625 | struct s3c24xx_uart_clksrc *clksrc; | ||
626 | unsigned int calc; | ||
627 | unsigned int quot; | ||
628 | struct clk *src; | ||
629 | }; | ||
630 | |||
631 | static int s3c24xx_serial_calcbaud(struct baud_calc *calc, | ||
632 | struct uart_port *port, | ||
633 | struct s3c24xx_uart_clksrc *clksrc, | ||
634 | unsigned int baud) | ||
635 | { | ||
636 | unsigned long rate; | ||
637 | |||
638 | calc->src = clk_get(port->dev, clksrc->name); | ||
639 | if (calc->src == NULL || IS_ERR(calc->src)) | ||
640 | return 0; | ||
641 | |||
642 | rate = clk_get_rate(calc->src); | ||
643 | rate /= clksrc->divisor; | ||
644 | |||
645 | calc->clksrc = clksrc; | ||
646 | calc->quot = (rate + (8 * baud)) / (16 * baud); | ||
647 | calc->calc = (rate / (calc->quot * 16)); | ||
648 | |||
649 | calc->quot--; | ||
650 | return 1; | ||
651 | } | ||
652 | |||
653 | static unsigned int s3c24xx_serial_getclk(struct uart_port *port, | ||
654 | struct s3c24xx_uart_clksrc **clksrc, | ||
655 | struct clk **clk, | ||
656 | unsigned int baud) | ||
657 | { | ||
658 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); | ||
659 | struct s3c24xx_uart_clksrc *clkp; | ||
660 | struct baud_calc res[MAX_CLKS]; | ||
661 | struct baud_calc *resptr, *best, *sptr; | ||
662 | int i; | ||
663 | |||
664 | clkp = cfg->clocks; | ||
665 | best = NULL; | ||
666 | |||
667 | if (cfg->clocks_size < 2) { | ||
668 | if (cfg->clocks_size == 0) | ||
669 | clkp = &tmp_clksrc; | ||
670 | |||
671 | /* check to see if we're sourcing fclk, and if so we're | ||
672 | * going to have to update the clock source | ||
673 | */ | ||
674 | |||
675 | if (strcmp(clkp->name, "fclk") == 0) { | ||
676 | struct s3c24xx_uart_clksrc src; | ||
677 | |||
678 | s3c24xx_serial_getsource(port, &src); | ||
679 | |||
680 | /* check that the port already using fclk, and if | ||
681 | * not, then re-select fclk | ||
682 | */ | ||
683 | |||
684 | if (strcmp(src.name, clkp->name) == 0) { | ||
685 | s3c24xx_serial_setsource(port, clkp); | ||
686 | s3c24xx_serial_getsource(port, &src); | ||
687 | } | ||
688 | |||
689 | clkp->divisor = src.divisor; | ||
690 | } | ||
691 | |||
692 | s3c24xx_serial_calcbaud(res, port, clkp, baud); | ||
693 | best = res; | ||
694 | resptr = best + 1; | ||
695 | } else { | ||
696 | resptr = res; | ||
697 | |||
698 | for (i = 0; i < cfg->clocks_size; i++, clkp++) { | ||
699 | if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud)) | ||
700 | resptr++; | ||
701 | } | ||
702 | } | ||
703 | |||
704 | /* ok, we now need to select the best clock we found */ | ||
705 | |||
706 | if (!best) { | ||
707 | unsigned int deviation = (1<<30)|((1<<30)-1); | ||
708 | int calc_deviation; | ||
709 | |||
710 | for (sptr = res; sptr < resptr; sptr++) { | ||
711 | printk(KERN_DEBUG | ||
712 | "found clk %p (%s) quot %d, calc %d\n", | ||
713 | sptr->clksrc, sptr->clksrc->name, | ||
714 | sptr->quot, sptr->calc); | ||
715 | |||
716 | calc_deviation = baud - sptr->calc; | ||
717 | if (calc_deviation < 0) | ||
718 | calc_deviation = -calc_deviation; | ||
719 | |||
720 | if (calc_deviation < deviation) { | ||
721 | best = sptr; | ||
722 | deviation = calc_deviation; | ||
723 | } | ||
724 | } | ||
725 | |||
726 | printk(KERN_DEBUG "best %p (deviation %d)\n", best, deviation); | ||
727 | } | ||
728 | |||
729 | printk(KERN_DEBUG "selected clock %p (%s) quot %d, calc %d\n", | ||
730 | best->clksrc, best->clksrc->name, best->quot, best->calc); | ||
731 | |||
732 | /* store results to pass back */ | ||
733 | |||
734 | *clksrc = best->clksrc; | ||
735 | *clk = best->src; | ||
736 | |||
737 | return best->quot; | ||
738 | } | ||
739 | |||
740 | static void s3c24xx_serial_set_termios(struct uart_port *port, | ||
741 | struct ktermios *termios, | ||
742 | struct ktermios *old) | ||
743 | { | ||
744 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); | ||
745 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
746 | struct s3c24xx_uart_clksrc *clksrc = NULL; | ||
747 | struct clk *clk = NULL; | ||
748 | unsigned long flags; | ||
749 | unsigned int baud, quot; | ||
750 | unsigned int ulcon; | ||
751 | unsigned int umcon; | ||
752 | |||
753 | /* | ||
754 | * We don't support modem control lines. | ||
755 | */ | ||
756 | termios->c_cflag &= ~(HUPCL | CMSPAR); | ||
757 | termios->c_cflag |= CLOCAL; | ||
758 | |||
759 | /* | ||
760 | * Ask the core to calculate the divisor for us. | ||
761 | */ | ||
762 | |||
763 | baud = uart_get_baud_rate(port, termios, old, 0, 115200*8); | ||
764 | |||
765 | if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) | ||
766 | quot = port->custom_divisor; | ||
767 | else | ||
768 | quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud); | ||
769 | |||
770 | /* check to see if we need to change clock source */ | ||
771 | |||
772 | if (ourport->clksrc != clksrc || ourport->baudclk != clk) { | ||
773 | s3c24xx_serial_setsource(port, clksrc); | ||
774 | |||
775 | if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) { | ||
776 | clk_disable(ourport->baudclk); | ||
777 | ourport->baudclk = NULL; | ||
778 | } | ||
779 | |||
780 | clk_enable(clk); | ||
781 | |||
782 | ourport->clksrc = clksrc; | ||
783 | ourport->baudclk = clk; | ||
784 | } | ||
785 | |||
786 | switch (termios->c_cflag & CSIZE) { | ||
787 | case CS5: | ||
788 | dbg("config: 5bits/char\n"); | ||
789 | ulcon = S3C2410_LCON_CS5; | ||
790 | break; | ||
791 | case CS6: | ||
792 | dbg("config: 6bits/char\n"); | ||
793 | ulcon = S3C2410_LCON_CS6; | ||
794 | break; | ||
795 | case CS7: | ||
796 | dbg("config: 7bits/char\n"); | ||
797 | ulcon = S3C2410_LCON_CS7; | ||
798 | break; | ||
799 | case CS8: | ||
800 | default: | ||
801 | dbg("config: 8bits/char\n"); | ||
802 | ulcon = S3C2410_LCON_CS8; | ||
803 | break; | ||
804 | } | ||
805 | |||
806 | /* preserve original lcon IR settings */ | ||
807 | ulcon |= (cfg->ulcon & S3C2410_LCON_IRM); | ||
808 | |||
809 | if (termios->c_cflag & CSTOPB) | ||
810 | ulcon |= S3C2410_LCON_STOPB; | ||
811 | |||
812 | umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0; | ||
813 | |||
814 | if (termios->c_cflag & PARENB) { | ||
815 | if (termios->c_cflag & PARODD) | ||
816 | ulcon |= S3C2410_LCON_PODD; | ||
817 | else | ||
818 | ulcon |= S3C2410_LCON_PEVEN; | ||
819 | } else { | ||
820 | ulcon |= S3C2410_LCON_PNONE; | ||
821 | } | ||
822 | |||
823 | spin_lock_irqsave(&port->lock, flags); | ||
824 | |||
825 | dbg("setting ulcon to %08x, brddiv to %d\n", ulcon, quot); | ||
826 | |||
827 | wr_regl(port, S3C2410_ULCON, ulcon); | ||
828 | wr_regl(port, S3C2410_UBRDIV, quot); | ||
829 | wr_regl(port, S3C2410_UMCON, umcon); | ||
830 | |||
831 | dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", | ||
832 | rd_regl(port, S3C2410_ULCON), | ||
833 | rd_regl(port, S3C2410_UCON), | ||
834 | rd_regl(port, S3C2410_UFCON)); | ||
835 | |||
836 | /* | ||
837 | * Update the per-port timeout. | ||
838 | */ | ||
839 | uart_update_timeout(port, termios->c_cflag, baud); | ||
840 | |||
841 | /* | ||
842 | * Which character status flags are we interested in? | ||
843 | */ | ||
844 | port->read_status_mask = S3C2410_UERSTAT_OVERRUN; | ||
845 | if (termios->c_iflag & INPCK) | ||
846 | port->read_status_mask |= S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_PARITY; | ||
847 | |||
848 | /* | ||
849 | * Which character status flags should we ignore? | ||
850 | */ | ||
851 | port->ignore_status_mask = 0; | ||
852 | if (termios->c_iflag & IGNPAR) | ||
853 | port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN; | ||
854 | if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR) | ||
855 | port->ignore_status_mask |= S3C2410_UERSTAT_FRAME; | ||
856 | |||
857 | /* | ||
858 | * Ignore all characters if CREAD is not set. | ||
859 | */ | ||
860 | if ((termios->c_cflag & CREAD) == 0) | ||
861 | port->ignore_status_mask |= RXSTAT_DUMMY_READ; | ||
862 | |||
863 | spin_unlock_irqrestore(&port->lock, flags); | ||
864 | } | ||
865 | |||
866 | static const char *s3c24xx_serial_type(struct uart_port *port) | ||
867 | { | ||
868 | switch (port->type) { | ||
869 | case PORT_S3C2410: | ||
870 | return "S3C2410"; | ||
871 | case PORT_S3C2440: | ||
872 | return "S3C2440"; | ||
873 | case PORT_S3C2412: | ||
874 | return "S3C2412"; | ||
875 | default: | ||
876 | return NULL; | ||
877 | } | ||
878 | } | ||
879 | |||
880 | #define MAP_SIZE (0x100) | ||
881 | |||
882 | static void s3c24xx_serial_release_port(struct uart_port *port) | ||
883 | { | ||
884 | release_mem_region(port->mapbase, MAP_SIZE); | ||
885 | } | ||
886 | |||
887 | static int s3c24xx_serial_request_port(struct uart_port *port) | ||
888 | { | ||
889 | const char *name = s3c24xx_serial_portname(port); | ||
890 | return request_mem_region(port->mapbase, MAP_SIZE, name) ? 0 : -EBUSY; | ||
891 | } | ||
892 | |||
893 | static void s3c24xx_serial_config_port(struct uart_port *port, int flags) | ||
894 | { | ||
895 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
896 | |||
897 | if (flags & UART_CONFIG_TYPE && | ||
898 | s3c24xx_serial_request_port(port) == 0) | ||
899 | port->type = info->type; | ||
900 | } | ||
901 | |||
902 | /* | ||
903 | * verify the new serial_struct (for TIOCSSERIAL). | ||
904 | */ | ||
905 | static int | ||
906 | s3c24xx_serial_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
907 | { | ||
908 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
909 | |||
910 | if (ser->type != PORT_UNKNOWN && ser->type != info->type) | ||
911 | return -EINVAL; | ||
912 | |||
913 | return 0; | ||
914 | } | ||
915 | |||
916 | |||
917 | #ifdef CONFIG_SERIAL_S3C2410_CONSOLE | ||
918 | |||
919 | static struct console s3c24xx_serial_console; | ||
920 | |||
921 | #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console | ||
922 | #else | ||
923 | #define S3C24XX_SERIAL_CONSOLE NULL | ||
924 | #endif | ||
925 | |||
926 | static struct uart_ops s3c24xx_serial_ops = { | ||
927 | .pm = s3c24xx_serial_pm, | ||
928 | .tx_empty = s3c24xx_serial_tx_empty, | ||
929 | .get_mctrl = s3c24xx_serial_get_mctrl, | ||
930 | .set_mctrl = s3c24xx_serial_set_mctrl, | ||
931 | .stop_tx = s3c24xx_serial_stop_tx, | ||
932 | .start_tx = s3c24xx_serial_start_tx, | ||
933 | .stop_rx = s3c24xx_serial_stop_rx, | ||
934 | .enable_ms = s3c24xx_serial_enable_ms, | ||
935 | .break_ctl = s3c24xx_serial_break_ctl, | ||
936 | .startup = s3c24xx_serial_startup, | ||
937 | .shutdown = s3c24xx_serial_shutdown, | ||
938 | .set_termios = s3c24xx_serial_set_termios, | ||
939 | .type = s3c24xx_serial_type, | ||
940 | .release_port = s3c24xx_serial_release_port, | ||
941 | .request_port = s3c24xx_serial_request_port, | ||
942 | .config_port = s3c24xx_serial_config_port, | ||
943 | .verify_port = s3c24xx_serial_verify_port, | ||
944 | }; | ||
945 | |||
946 | |||
947 | static struct uart_driver s3c24xx_uart_drv = { | ||
948 | .owner = THIS_MODULE, | ||
949 | .dev_name = "s3c2410_serial", | ||
950 | .nr = 3, | ||
951 | .cons = S3C24XX_SERIAL_CONSOLE, | ||
952 | .driver_name = S3C24XX_SERIAL_NAME, | ||
953 | .major = S3C24XX_SERIAL_MAJOR, | ||
954 | .minor = S3C24XX_SERIAL_MINOR, | ||
955 | }; | ||
956 | |||
957 | static struct s3c24xx_uart_port s3c24xx_serial_ports[NR_PORTS] = { | ||
958 | [0] = { | ||
959 | .port = { | ||
960 | .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock), | ||
961 | .iotype = UPIO_MEM, | ||
962 | .irq = IRQ_S3CUART_RX0, | ||
963 | .uartclk = 0, | ||
964 | .fifosize = 16, | ||
965 | .ops = &s3c24xx_serial_ops, | ||
966 | .flags = UPF_BOOT_AUTOCONF, | ||
967 | .line = 0, | ||
968 | } | ||
969 | }, | ||
970 | [1] = { | ||
971 | .port = { | ||
972 | .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[1].port.lock), | ||
973 | .iotype = UPIO_MEM, | ||
974 | .irq = IRQ_S3CUART_RX1, | ||
975 | .uartclk = 0, | ||
976 | .fifosize = 16, | ||
977 | .ops = &s3c24xx_serial_ops, | ||
978 | .flags = UPF_BOOT_AUTOCONF, | ||
979 | .line = 1, | ||
980 | } | ||
981 | }, | ||
982 | #if NR_PORTS > 2 | ||
983 | |||
984 | [2] = { | ||
985 | .port = { | ||
986 | .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[2].port.lock), | ||
987 | .iotype = UPIO_MEM, | ||
988 | .irq = IRQ_S3CUART_RX2, | ||
989 | .uartclk = 0, | ||
990 | .fifosize = 16, | ||
991 | .ops = &s3c24xx_serial_ops, | ||
992 | .flags = UPF_BOOT_AUTOCONF, | ||
993 | .line = 2, | ||
994 | } | ||
995 | } | ||
996 | #endif | ||
997 | }; | ||
998 | |||
999 | /* s3c24xx_serial_resetport | ||
1000 | * | ||
1001 | * wrapper to call the specific reset for this port (reset the fifos | ||
1002 | * and the settings) | ||
1003 | */ | ||
1004 | |||
1005 | static inline int s3c24xx_serial_resetport(struct uart_port * port, | ||
1006 | struct s3c2410_uartcfg *cfg) | ||
1007 | { | ||
1008 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
1009 | |||
1010 | return (info->reset_port)(port, cfg); | ||
1011 | } | ||
1012 | |||
1013 | /* s3c24xx_serial_init_port | ||
1014 | * | ||
1015 | * initialise a single serial port from the platform device given | ||
1016 | */ | ||
1017 | |||
1018 | static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, | ||
1019 | struct s3c24xx_uart_info *info, | ||
1020 | struct platform_device *platdev) | ||
1021 | { | ||
1022 | struct uart_port *port = &ourport->port; | ||
1023 | struct s3c2410_uartcfg *cfg; | ||
1024 | struct resource *res; | ||
1025 | int ret; | ||
1026 | |||
1027 | dbg("s3c24xx_serial_init_port: port=%p, platdev=%p\n", port, platdev); | ||
1028 | |||
1029 | if (platdev == NULL) | ||
1030 | return -ENODEV; | ||
1031 | |||
1032 | cfg = s3c24xx_dev_to_cfg(&platdev->dev); | ||
1033 | |||
1034 | if (port->mapbase != 0) | ||
1035 | return 0; | ||
1036 | |||
1037 | if (cfg->hwport > 3) | ||
1038 | return -EINVAL; | ||
1039 | |||
1040 | /* setup info for port */ | ||
1041 | port->dev = &platdev->dev; | ||
1042 | ourport->info = info; | ||
1043 | |||
1044 | /* copy the info in from provided structure */ | ||
1045 | ourport->port.fifosize = info->fifosize; | ||
1046 | |||
1047 | dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport); | ||
1048 | |||
1049 | port->uartclk = 1; | ||
1050 | |||
1051 | if (cfg->uart_flags & UPF_CONS_FLOW) { | ||
1052 | dbg("s3c24xx_serial_init_port: enabling flow control\n"); | ||
1053 | port->flags |= UPF_CONS_FLOW; | ||
1054 | } | ||
1055 | |||
1056 | /* sort our the physical and virtual addresses for each UART */ | ||
1057 | |||
1058 | res = platform_get_resource(platdev, IORESOURCE_MEM, 0); | ||
1059 | if (res == NULL) { | ||
1060 | printk(KERN_ERR "failed to find memory resource for uart\n"); | ||
1061 | return -EINVAL; | ||
1062 | } | ||
1063 | |||
1064 | dbg("resource %p (%lx..%lx)\n", res, res->start, res->end); | ||
1065 | |||
1066 | port->mapbase = res->start; | ||
1067 | port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART); | ||
1068 | ret = platform_get_irq(platdev, 0); | ||
1069 | if (ret < 0) | ||
1070 | port->irq = 0; | ||
1071 | else | ||
1072 | port->irq = ret; | ||
1073 | |||
1074 | ourport->clk = clk_get(&platdev->dev, "uart"); | ||
1075 | |||
1076 | dbg("port: map=%08x, mem=%08x, irq=%d, clock=%ld\n", | ||
1077 | port->mapbase, port->membase, port->irq, port->uartclk); | ||
1078 | |||
1079 | /* reset the fifos (and setup the uart) */ | ||
1080 | s3c24xx_serial_resetport(port, cfg); | ||
1081 | return 0; | ||
1082 | } | ||
1083 | |||
1084 | /* Device driver serial port probe */ | ||
1085 | |||
1086 | static int probe_index = 0; | ||
1087 | |||
1088 | static int s3c24xx_serial_probe(struct platform_device *dev, | ||
1089 | struct s3c24xx_uart_info *info) | ||
1090 | { | ||
1091 | struct s3c24xx_uart_port *ourport; | ||
1092 | int ret; | ||
1093 | |||
1094 | dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index); | ||
1095 | |||
1096 | ourport = &s3c24xx_serial_ports[probe_index]; | ||
1097 | probe_index++; | ||
1098 | |||
1099 | dbg("%s: initialising port %p...\n", __func__, ourport); | ||
1100 | |||
1101 | ret = s3c24xx_serial_init_port(ourport, info, dev); | ||
1102 | if (ret < 0) | ||
1103 | goto probe_err; | ||
1104 | |||
1105 | dbg("%s: adding port\n", __func__); | ||
1106 | uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); | ||
1107 | platform_set_drvdata(dev, &ourport->port); | ||
1108 | |||
1109 | return 0; | ||
1110 | |||
1111 | probe_err: | ||
1112 | return ret; | ||
1113 | } | ||
1114 | |||
1115 | static int s3c24xx_serial_remove(struct platform_device *dev) | ||
1116 | { | ||
1117 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | ||
1118 | |||
1119 | if (port) | ||
1120 | uart_remove_one_port(&s3c24xx_uart_drv, port); | ||
1121 | |||
1122 | return 0; | ||
1123 | } | ||
1124 | |||
1125 | /* UART power management code */ | ||
1126 | |||
1127 | #ifdef CONFIG_PM | ||
1128 | |||
1129 | static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state) | ||
1130 | { | ||
1131 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | ||
1132 | |||
1133 | if (port) | ||
1134 | uart_suspend_port(&s3c24xx_uart_drv, port); | ||
1135 | |||
1136 | return 0; | ||
1137 | } | ||
1138 | |||
1139 | static int s3c24xx_serial_resume(struct platform_device *dev) | ||
1140 | { | ||
1141 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | ||
1142 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
1143 | |||
1144 | if (port) { | ||
1145 | clk_enable(ourport->clk); | ||
1146 | s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port)); | ||
1147 | clk_disable(ourport->clk); | ||
1148 | |||
1149 | uart_resume_port(&s3c24xx_uart_drv, port); | ||
1150 | } | ||
1151 | |||
1152 | return 0; | ||
1153 | } | ||
1154 | |||
1155 | #else | ||
1156 | #define s3c24xx_serial_suspend NULL | ||
1157 | #define s3c24xx_serial_resume NULL | ||
1158 | #endif | ||
1159 | |||
1160 | static int s3c24xx_serial_init(struct platform_driver *drv, | ||
1161 | struct s3c24xx_uart_info *info) | ||
1162 | { | ||
1163 | dbg("s3c24xx_serial_init(%p,%p)\n", drv, info); | ||
1164 | return platform_driver_register(drv); | ||
1165 | } | ||
1166 | |||
1167 | |||
1168 | /* now comes the code to initialise either the s3c2410 or s3c2440 serial | ||
1169 | * port information | ||
1170 | */ | ||
1171 | |||
1172 | /* cpu specific variations on the serial port support */ | ||
1173 | |||
1174 | #ifdef CONFIG_CPU_S3C2400 | ||
1175 | |||
1176 | static int s3c2400_serial_getsource(struct uart_port *port, | ||
1177 | struct s3c24xx_uart_clksrc *clk) | ||
1178 | { | ||
1179 | clk->divisor = 1; | ||
1180 | clk->name = "pclk"; | ||
1181 | |||
1182 | return 0; | ||
1183 | } | ||
1184 | |||
1185 | static int s3c2400_serial_setsource(struct uart_port *port, | ||
1186 | struct s3c24xx_uart_clksrc *clk) | ||
1187 | { | ||
1188 | return 0; | ||
1189 | } | ||
1190 | |||
1191 | static int s3c2400_serial_resetport(struct uart_port *port, | ||
1192 | struct s3c2410_uartcfg *cfg) | ||
1193 | { | ||
1194 | dbg("s3c2400_serial_resetport: port=%p (%08lx), cfg=%p\n", | ||
1195 | port, port->mapbase, cfg); | ||
1196 | |||
1197 | wr_regl(port, S3C2410_UCON, cfg->ucon); | ||
1198 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
1199 | |||
1200 | /* reset both fifos */ | ||
1201 | |||
1202 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
1203 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
1204 | |||
1205 | return 0; | ||
1206 | } | ||
1207 | |||
1208 | static struct s3c24xx_uart_info s3c2400_uart_inf = { | ||
1209 | .name = "Samsung S3C2400 UART", | ||
1210 | .type = PORT_S3C2400, | ||
1211 | .fifosize = 16, | ||
1212 | .rx_fifomask = S3C2410_UFSTAT_RXMASK, | ||
1213 | .rx_fifoshift = S3C2410_UFSTAT_RXSHIFT, | ||
1214 | .rx_fifofull = S3C2410_UFSTAT_RXFULL, | ||
1215 | .tx_fifofull = S3C2410_UFSTAT_TXFULL, | ||
1216 | .tx_fifomask = S3C2410_UFSTAT_TXMASK, | ||
1217 | .tx_fifoshift = S3C2410_UFSTAT_TXSHIFT, | ||
1218 | .get_clksrc = s3c2400_serial_getsource, | ||
1219 | .set_clksrc = s3c2400_serial_setsource, | ||
1220 | .reset_port = s3c2400_serial_resetport, | ||
1221 | }; | ||
1222 | |||
1223 | static int s3c2400_serial_probe(struct platform_device *dev) | ||
1224 | { | ||
1225 | return s3c24xx_serial_probe(dev, &s3c2400_uart_inf); | ||
1226 | } | ||
1227 | |||
1228 | static struct platform_driver s3c2400_serial_drv = { | ||
1229 | .probe = s3c2400_serial_probe, | ||
1230 | .remove = s3c24xx_serial_remove, | ||
1231 | .suspend = s3c24xx_serial_suspend, | ||
1232 | .resume = s3c24xx_serial_resume, | ||
1233 | .driver = { | ||
1234 | .name = "s3c2400-uart", | ||
1235 | .owner = THIS_MODULE, | ||
1236 | }, | ||
1237 | }; | ||
1238 | |||
1239 | static inline int s3c2400_serial_init(void) | ||
1240 | { | ||
1241 | return s3c24xx_serial_init(&s3c2400_serial_drv, &s3c2400_uart_inf); | ||
1242 | } | ||
1243 | |||
1244 | static inline void s3c2400_serial_exit(void) | ||
1245 | { | ||
1246 | platform_driver_unregister(&s3c2400_serial_drv); | ||
1247 | } | ||
1248 | |||
1249 | #define s3c2400_uart_inf_at &s3c2400_uart_inf | ||
1250 | #else | ||
1251 | |||
1252 | static inline int s3c2400_serial_init(void) | ||
1253 | { | ||
1254 | return 0; | ||
1255 | } | ||
1256 | |||
1257 | static inline void s3c2400_serial_exit(void) | ||
1258 | { | ||
1259 | } | ||
1260 | |||
1261 | #define s3c2400_uart_inf_at NULL | ||
1262 | |||
1263 | #endif /* CONFIG_CPU_S3C2400 */ | ||
1264 | |||
1265 | /* S3C2410 support */ | ||
1266 | |||
1267 | #ifdef CONFIG_CPU_S3C2410 | ||
1268 | 28 | ||
1269 | static int s3c2410_serial_setsource(struct uart_port *port, | 29 | static int s3c2410_serial_setsource(struct uart_port *port, |
1270 | struct s3c24xx_uart_clksrc *clk) | 30 | struct s3c24xx_uart_clksrc *clk) |
@@ -1323,8 +83,6 @@ static struct s3c24xx_uart_info s3c2410_uart_inf = { | |||
1323 | .reset_port = s3c2410_serial_resetport, | 83 | .reset_port = s3c2410_serial_resetport, |
1324 | }; | 84 | }; |
1325 | 85 | ||
1326 | /* device management */ | ||
1327 | |||
1328 | static int s3c2410_serial_probe(struct platform_device *dev) | 86 | static int s3c2410_serial_probe(struct platform_device *dev) |
1329 | { | 87 | { |
1330 | return s3c24xx_serial_probe(dev, &s3c2410_uart_inf); | 88 | return s3c24xx_serial_probe(dev, &s3c2410_uart_inf); |
@@ -1333,612 +91,28 @@ static int s3c2410_serial_probe(struct platform_device *dev) | |||
1333 | static struct platform_driver s3c2410_serial_drv = { | 91 | static struct platform_driver s3c2410_serial_drv = { |
1334 | .probe = s3c2410_serial_probe, | 92 | .probe = s3c2410_serial_probe, |
1335 | .remove = s3c24xx_serial_remove, | 93 | .remove = s3c24xx_serial_remove, |
1336 | .suspend = s3c24xx_serial_suspend, | ||
1337 | .resume = s3c24xx_serial_resume, | ||
1338 | .driver = { | 94 | .driver = { |
1339 | .name = "s3c2410-uart", | 95 | .name = "s3c2410-uart", |
1340 | .owner = THIS_MODULE, | 96 | .owner = THIS_MODULE, |
1341 | }, | 97 | }, |
1342 | }; | 98 | }; |
1343 | 99 | ||
1344 | static inline int s3c2410_serial_init(void) | 100 | s3c24xx_console_init(&s3c2410_serial_drv, &s3c2410_uart_inf); |
101 | |||
102 | static int __init s3c2410_serial_init(void) | ||
1345 | { | 103 | { |
1346 | return s3c24xx_serial_init(&s3c2410_serial_drv, &s3c2410_uart_inf); | 104 | return s3c24xx_serial_init(&s3c2410_serial_drv, &s3c2410_uart_inf); |
1347 | } | 105 | } |
1348 | 106 | ||
1349 | static inline void s3c2410_serial_exit(void) | 107 | static void __exit s3c2410_serial_exit(void) |
1350 | { | 108 | { |
1351 | platform_driver_unregister(&s3c2410_serial_drv); | 109 | platform_driver_unregister(&s3c2410_serial_drv); |
1352 | } | 110 | } |
1353 | 111 | ||
1354 | #define s3c2410_uart_inf_at &s3c2410_uart_inf | 112 | module_init(s3c2410_serial_init); |
1355 | #else | 113 | module_exit(s3c2410_serial_exit); |
1356 | |||
1357 | static inline int s3c2410_serial_init(void) | ||
1358 | { | ||
1359 | return 0; | ||
1360 | } | ||
1361 | |||
1362 | static inline void s3c2410_serial_exit(void) | ||
1363 | { | ||
1364 | } | ||
1365 | |||
1366 | #define s3c2410_uart_inf_at NULL | ||
1367 | |||
1368 | #endif /* CONFIG_CPU_S3C2410 */ | ||
1369 | |||
1370 | #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) | ||
1371 | |||
1372 | static int s3c2440_serial_setsource(struct uart_port *port, | ||
1373 | struct s3c24xx_uart_clksrc *clk) | ||
1374 | { | ||
1375 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
1376 | |||
1377 | // todo - proper fclk<>nonfclk switch // | ||
1378 | |||
1379 | ucon &= ~S3C2440_UCON_CLKMASK; | ||
1380 | |||
1381 | if (strcmp(clk->name, "uclk") == 0) | ||
1382 | ucon |= S3C2440_UCON_UCLK; | ||
1383 | else if (strcmp(clk->name, "pclk") == 0) | ||
1384 | ucon |= S3C2440_UCON_PCLK; | ||
1385 | else if (strcmp(clk->name, "fclk") == 0) | ||
1386 | ucon |= S3C2440_UCON_FCLK; | ||
1387 | else { | ||
1388 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
1389 | return -EINVAL; | ||
1390 | } | ||
1391 | |||
1392 | wr_regl(port, S3C2410_UCON, ucon); | ||
1393 | return 0; | ||
1394 | } | ||
1395 | |||
1396 | |||
1397 | static int s3c2440_serial_getsource(struct uart_port *port, | ||
1398 | struct s3c24xx_uart_clksrc *clk) | ||
1399 | { | ||
1400 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
1401 | unsigned long ucon0, ucon1, ucon2; | ||
1402 | |||
1403 | switch (ucon & S3C2440_UCON_CLKMASK) { | ||
1404 | case S3C2440_UCON_UCLK: | ||
1405 | clk->divisor = 1; | ||
1406 | clk->name = "uclk"; | ||
1407 | break; | ||
1408 | |||
1409 | case S3C2440_UCON_PCLK: | ||
1410 | case S3C2440_UCON_PCLK2: | ||
1411 | clk->divisor = 1; | ||
1412 | clk->name = "pclk"; | ||
1413 | break; | ||
1414 | |||
1415 | case S3C2440_UCON_FCLK: | ||
1416 | /* the fun of calculating the uart divisors on | ||
1417 | * the s3c2440 */ | ||
1418 | |||
1419 | ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON); | ||
1420 | ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON); | ||
1421 | ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON); | ||
1422 | |||
1423 | printk("ucons: %08lx, %08lx, %08lx\n", ucon0, ucon1, ucon2); | ||
1424 | |||
1425 | ucon0 &= S3C2440_UCON0_DIVMASK; | ||
1426 | ucon1 &= S3C2440_UCON1_DIVMASK; | ||
1427 | ucon2 &= S3C2440_UCON2_DIVMASK; | ||
1428 | |||
1429 | if (ucon0 != 0) { | ||
1430 | clk->divisor = ucon0 >> S3C2440_UCON_DIVSHIFT; | ||
1431 | clk->divisor += 6; | ||
1432 | } else if (ucon1 != 0) { | ||
1433 | clk->divisor = ucon1 >> S3C2440_UCON_DIVSHIFT; | ||
1434 | clk->divisor += 21; | ||
1435 | } else if (ucon2 != 0) { | ||
1436 | clk->divisor = ucon2 >> S3C2440_UCON_DIVSHIFT; | ||
1437 | clk->divisor += 36; | ||
1438 | } else { | ||
1439 | /* manual calims 44, seems to be 9 */ | ||
1440 | clk->divisor = 9; | ||
1441 | } | ||
1442 | |||
1443 | clk->name = "fclk"; | ||
1444 | break; | ||
1445 | } | ||
1446 | |||
1447 | return 0; | ||
1448 | } | ||
1449 | |||
1450 | static int s3c2440_serial_resetport(struct uart_port *port, | ||
1451 | struct s3c2410_uartcfg *cfg) | ||
1452 | { | ||
1453 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
1454 | |||
1455 | dbg("s3c2440_serial_resetport: port=%p (%08lx), cfg=%p\n", | ||
1456 | port, port->mapbase, cfg); | ||
1457 | |||
1458 | /* ensure we don't change the clock settings... */ | ||
1459 | |||
1460 | ucon &= (S3C2440_UCON0_DIVMASK | (3<<10)); | ||
1461 | |||
1462 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
1463 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
1464 | |||
1465 | /* reset both fifos */ | ||
1466 | |||
1467 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
1468 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
1469 | |||
1470 | return 0; | ||
1471 | } | ||
1472 | |||
1473 | static struct s3c24xx_uart_info s3c2440_uart_inf = { | ||
1474 | .name = "Samsung S3C2440 UART", | ||
1475 | .type = PORT_S3C2440, | ||
1476 | .fifosize = 64, | ||
1477 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
1478 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
1479 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
1480 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
1481 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
1482 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
1483 | .get_clksrc = s3c2440_serial_getsource, | ||
1484 | .set_clksrc = s3c2440_serial_setsource, | ||
1485 | .reset_port = s3c2440_serial_resetport, | ||
1486 | }; | ||
1487 | |||
1488 | /* device management */ | ||
1489 | |||
1490 | static int s3c2440_serial_probe(struct platform_device *dev) | ||
1491 | { | ||
1492 | dbg("s3c2440_serial_probe: dev=%p\n", dev); | ||
1493 | return s3c24xx_serial_probe(dev, &s3c2440_uart_inf); | ||
1494 | } | ||
1495 | |||
1496 | static struct platform_driver s3c2440_serial_drv = { | ||
1497 | .probe = s3c2440_serial_probe, | ||
1498 | .remove = s3c24xx_serial_remove, | ||
1499 | .suspend = s3c24xx_serial_suspend, | ||
1500 | .resume = s3c24xx_serial_resume, | ||
1501 | .driver = { | ||
1502 | .name = "s3c2440-uart", | ||
1503 | .owner = THIS_MODULE, | ||
1504 | }, | ||
1505 | }; | ||
1506 | |||
1507 | |||
1508 | static inline int s3c2440_serial_init(void) | ||
1509 | { | ||
1510 | return s3c24xx_serial_init(&s3c2440_serial_drv, &s3c2440_uart_inf); | ||
1511 | } | ||
1512 | |||
1513 | static inline void s3c2440_serial_exit(void) | ||
1514 | { | ||
1515 | platform_driver_unregister(&s3c2440_serial_drv); | ||
1516 | } | ||
1517 | |||
1518 | #define s3c2440_uart_inf_at &s3c2440_uart_inf | ||
1519 | #else | ||
1520 | |||
1521 | static inline int s3c2440_serial_init(void) | ||
1522 | { | ||
1523 | return 0; | ||
1524 | } | ||
1525 | |||
1526 | static inline void s3c2440_serial_exit(void) | ||
1527 | { | ||
1528 | } | ||
1529 | |||
1530 | #define s3c2440_uart_inf_at NULL | ||
1531 | #endif /* CONFIG_CPU_S3C2440 */ | ||
1532 | |||
1533 | #if defined(CONFIG_CPU_S3C2412) | ||
1534 | |||
1535 | static int s3c2412_serial_setsource(struct uart_port *port, | ||
1536 | struct s3c24xx_uart_clksrc *clk) | ||
1537 | { | ||
1538 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
1539 | |||
1540 | ucon &= ~S3C2412_UCON_CLKMASK; | ||
1541 | |||
1542 | if (strcmp(clk->name, "uclk") == 0) | ||
1543 | ucon |= S3C2440_UCON_UCLK; | ||
1544 | else if (strcmp(clk->name, "pclk") == 0) | ||
1545 | ucon |= S3C2440_UCON_PCLK; | ||
1546 | else if (strcmp(clk->name, "usysclk") == 0) | ||
1547 | ucon |= S3C2412_UCON_USYSCLK; | ||
1548 | else { | ||
1549 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
1550 | return -EINVAL; | ||
1551 | } | ||
1552 | |||
1553 | wr_regl(port, S3C2410_UCON, ucon); | ||
1554 | return 0; | ||
1555 | } | ||
1556 | |||
1557 | |||
1558 | static int s3c2412_serial_getsource(struct uart_port *port, | ||
1559 | struct s3c24xx_uart_clksrc *clk) | ||
1560 | { | ||
1561 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
1562 | |||
1563 | switch (ucon & S3C2412_UCON_CLKMASK) { | ||
1564 | case S3C2412_UCON_UCLK: | ||
1565 | clk->divisor = 1; | ||
1566 | clk->name = "uclk"; | ||
1567 | break; | ||
1568 | |||
1569 | case S3C2412_UCON_PCLK: | ||
1570 | case S3C2412_UCON_PCLK2: | ||
1571 | clk->divisor = 1; | ||
1572 | clk->name = "pclk"; | ||
1573 | break; | ||
1574 | |||
1575 | case S3C2412_UCON_USYSCLK: | ||
1576 | clk->divisor = 1; | ||
1577 | clk->name = "usysclk"; | ||
1578 | break; | ||
1579 | } | ||
1580 | |||
1581 | return 0; | ||
1582 | } | ||
1583 | |||
1584 | static int s3c2412_serial_resetport(struct uart_port *port, | ||
1585 | struct s3c2410_uartcfg *cfg) | ||
1586 | { | ||
1587 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
1588 | |||
1589 | dbg("%s: port=%p (%08lx), cfg=%p\n", | ||
1590 | __func__, port, port->mapbase, cfg); | ||
1591 | |||
1592 | /* ensure we don't change the clock settings... */ | ||
1593 | |||
1594 | ucon &= S3C2412_UCON_CLKMASK; | ||
1595 | |||
1596 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
1597 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
1598 | |||
1599 | /* reset both fifos */ | ||
1600 | |||
1601 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
1602 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
1603 | |||
1604 | return 0; | ||
1605 | } | ||
1606 | |||
1607 | static struct s3c24xx_uart_info s3c2412_uart_inf = { | ||
1608 | .name = "Samsung S3C2412 UART", | ||
1609 | .type = PORT_S3C2412, | ||
1610 | .fifosize = 64, | ||
1611 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
1612 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
1613 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
1614 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
1615 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
1616 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
1617 | .get_clksrc = s3c2412_serial_getsource, | ||
1618 | .set_clksrc = s3c2412_serial_setsource, | ||
1619 | .reset_port = s3c2412_serial_resetport, | ||
1620 | }; | ||
1621 | |||
1622 | /* device management */ | ||
1623 | |||
1624 | static int s3c2412_serial_probe(struct platform_device *dev) | ||
1625 | { | ||
1626 | dbg("s3c2440_serial_probe: dev=%p\n", dev); | ||
1627 | return s3c24xx_serial_probe(dev, &s3c2412_uart_inf); | ||
1628 | } | ||
1629 | |||
1630 | static struct platform_driver s3c2412_serial_drv = { | ||
1631 | .probe = s3c2412_serial_probe, | ||
1632 | .remove = s3c24xx_serial_remove, | ||
1633 | .suspend = s3c24xx_serial_suspend, | ||
1634 | .resume = s3c24xx_serial_resume, | ||
1635 | .driver = { | ||
1636 | .name = "s3c2412-uart", | ||
1637 | .owner = THIS_MODULE, | ||
1638 | }, | ||
1639 | }; | ||
1640 | |||
1641 | |||
1642 | static inline int s3c2412_serial_init(void) | ||
1643 | { | ||
1644 | return s3c24xx_serial_init(&s3c2412_serial_drv, &s3c2412_uart_inf); | ||
1645 | } | ||
1646 | |||
1647 | static inline void s3c2412_serial_exit(void) | ||
1648 | { | ||
1649 | platform_driver_unregister(&s3c2412_serial_drv); | ||
1650 | } | ||
1651 | |||
1652 | #define s3c2412_uart_inf_at &s3c2412_uart_inf | ||
1653 | #else | ||
1654 | |||
1655 | static inline int s3c2412_serial_init(void) | ||
1656 | { | ||
1657 | return 0; | ||
1658 | } | ||
1659 | |||
1660 | static inline void s3c2412_serial_exit(void) | ||
1661 | { | ||
1662 | } | ||
1663 | |||
1664 | #define s3c2412_uart_inf_at NULL | ||
1665 | #endif /* CONFIG_CPU_S3C2440 */ | ||
1666 | |||
1667 | |||
1668 | /* module initialisation code */ | ||
1669 | |||
1670 | static int __init s3c24xx_serial_modinit(void) | ||
1671 | { | ||
1672 | int ret; | ||
1673 | |||
1674 | ret = uart_register_driver(&s3c24xx_uart_drv); | ||
1675 | if (ret < 0) { | ||
1676 | printk(KERN_ERR "failed to register UART driver\n"); | ||
1677 | return -1; | ||
1678 | } | ||
1679 | |||
1680 | s3c2400_serial_init(); | ||
1681 | s3c2410_serial_init(); | ||
1682 | s3c2412_serial_init(); | ||
1683 | s3c2440_serial_init(); | ||
1684 | |||
1685 | return 0; | ||
1686 | } | ||
1687 | |||
1688 | static void __exit s3c24xx_serial_modexit(void) | ||
1689 | { | ||
1690 | s3c2400_serial_exit(); | ||
1691 | s3c2410_serial_exit(); | ||
1692 | s3c2412_serial_exit(); | ||
1693 | s3c2440_serial_exit(); | ||
1694 | |||
1695 | uart_unregister_driver(&s3c24xx_uart_drv); | ||
1696 | } | ||
1697 | |||
1698 | |||
1699 | module_init(s3c24xx_serial_modinit); | ||
1700 | module_exit(s3c24xx_serial_modexit); | ||
1701 | |||
1702 | /* Console code */ | ||
1703 | |||
1704 | #ifdef CONFIG_SERIAL_S3C2410_CONSOLE | ||
1705 | |||
1706 | static struct uart_port *cons_uart; | ||
1707 | |||
1708 | static int | ||
1709 | s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon) | ||
1710 | { | ||
1711 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
1712 | unsigned long ufstat, utrstat; | ||
1713 | |||
1714 | if (ufcon & S3C2410_UFCON_FIFOMODE) { | ||
1715 | /* fifo mode - check ammount of data in fifo registers... */ | ||
1716 | |||
1717 | ufstat = rd_regl(port, S3C2410_UFSTAT); | ||
1718 | return (ufstat & info->tx_fifofull) ? 0 : 1; | ||
1719 | } | ||
1720 | |||
1721 | /* in non-fifo mode, we go and use the tx buffer empty */ | ||
1722 | |||
1723 | utrstat = rd_regl(port, S3C2410_UTRSTAT); | ||
1724 | return (utrstat & S3C2410_UTRSTAT_TXE) ? 1 : 0; | ||
1725 | } | ||
1726 | |||
1727 | static void | ||
1728 | s3c24xx_serial_console_putchar(struct uart_port *port, int ch) | ||
1729 | { | ||
1730 | unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON); | ||
1731 | while (!s3c24xx_serial_console_txrdy(port, ufcon)) | ||
1732 | barrier(); | ||
1733 | wr_regb(cons_uart, S3C2410_UTXH, ch); | ||
1734 | } | ||
1735 | |||
1736 | static void | ||
1737 | s3c24xx_serial_console_write(struct console *co, const char *s, | ||
1738 | unsigned int count) | ||
1739 | { | ||
1740 | uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar); | ||
1741 | } | ||
1742 | |||
1743 | static void __init | ||
1744 | s3c24xx_serial_get_options(struct uart_port *port, int *baud, | ||
1745 | int *parity, int *bits) | ||
1746 | { | ||
1747 | struct s3c24xx_uart_clksrc clksrc; | ||
1748 | struct clk *clk; | ||
1749 | unsigned int ulcon; | ||
1750 | unsigned int ucon; | ||
1751 | unsigned int ubrdiv; | ||
1752 | unsigned long rate; | ||
1753 | |||
1754 | ulcon = rd_regl(port, S3C2410_ULCON); | ||
1755 | ucon = rd_regl(port, S3C2410_UCON); | ||
1756 | ubrdiv = rd_regl(port, S3C2410_UBRDIV); | ||
1757 | |||
1758 | dbg("s3c24xx_serial_get_options: port=%p\n" | ||
1759 | "registers: ulcon=%08x, ucon=%08x, ubdriv=%08x\n", | ||
1760 | port, ulcon, ucon, ubrdiv); | ||
1761 | |||
1762 | if ((ucon & 0xf) != 0) { | ||
1763 | /* consider the serial port configured if the tx/rx mode set */ | ||
1764 | |||
1765 | switch (ulcon & S3C2410_LCON_CSMASK) { | ||
1766 | case S3C2410_LCON_CS5: | ||
1767 | *bits = 5; | ||
1768 | break; | ||
1769 | case S3C2410_LCON_CS6: | ||
1770 | *bits = 6; | ||
1771 | break; | ||
1772 | case S3C2410_LCON_CS7: | ||
1773 | *bits = 7; | ||
1774 | break; | ||
1775 | default: | ||
1776 | case S3C2410_LCON_CS8: | ||
1777 | *bits = 8; | ||
1778 | break; | ||
1779 | } | ||
1780 | |||
1781 | switch (ulcon & S3C2410_LCON_PMASK) { | ||
1782 | case S3C2410_LCON_PEVEN: | ||
1783 | *parity = 'e'; | ||
1784 | break; | ||
1785 | |||
1786 | case S3C2410_LCON_PODD: | ||
1787 | *parity = 'o'; | ||
1788 | break; | ||
1789 | |||
1790 | case S3C2410_LCON_PNONE: | ||
1791 | default: | ||
1792 | *parity = 'n'; | ||
1793 | } | ||
1794 | |||
1795 | /* now calculate the baud rate */ | ||
1796 | |||
1797 | s3c24xx_serial_getsource(port, &clksrc); | ||
1798 | |||
1799 | clk = clk_get(port->dev, clksrc.name); | ||
1800 | if (!IS_ERR(clk) && clk != NULL) | ||
1801 | rate = clk_get_rate(clk) / clksrc.divisor; | ||
1802 | else | ||
1803 | rate = 1; | ||
1804 | |||
1805 | |||
1806 | *baud = rate / ( 16 * (ubrdiv + 1)); | ||
1807 | dbg("calculated baud %d\n", *baud); | ||
1808 | } | ||
1809 | |||
1810 | } | ||
1811 | |||
1812 | /* s3c24xx_serial_init_ports | ||
1813 | * | ||
1814 | * initialise the serial ports from the machine provided initialisation | ||
1815 | * data. | ||
1816 | */ | ||
1817 | |||
1818 | static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info) | ||
1819 | { | ||
1820 | struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports; | ||
1821 | struct platform_device **platdev_ptr; | ||
1822 | int i; | ||
1823 | |||
1824 | dbg("s3c24xx_serial_init_ports: initialising ports...\n"); | ||
1825 | |||
1826 | platdev_ptr = s3c24xx_uart_devs; | ||
1827 | |||
1828 | for (i = 0; i < NR_PORTS; i++, ptr++, platdev_ptr++) { | ||
1829 | s3c24xx_serial_init_port(ptr, info, *platdev_ptr); | ||
1830 | } | ||
1831 | |||
1832 | return 0; | ||
1833 | } | ||
1834 | |||
1835 | static int __init | ||
1836 | s3c24xx_serial_console_setup(struct console *co, char *options) | ||
1837 | { | ||
1838 | struct uart_port *port; | ||
1839 | int baud = 9600; | ||
1840 | int bits = 8; | ||
1841 | int parity = 'n'; | ||
1842 | int flow = 'n'; | ||
1843 | |||
1844 | dbg("s3c24xx_serial_console_setup: co=%p (%d), %s\n", | ||
1845 | co, co->index, options); | ||
1846 | |||
1847 | /* is this a valid port */ | ||
1848 | |||
1849 | if (co->index == -1 || co->index >= NR_PORTS) | ||
1850 | co->index = 0; | ||
1851 | |||
1852 | port = &s3c24xx_serial_ports[co->index].port; | ||
1853 | |||
1854 | /* is the port configured? */ | ||
1855 | |||
1856 | if (port->mapbase == 0x0) { | ||
1857 | co->index = 0; | ||
1858 | port = &s3c24xx_serial_ports[co->index].port; | ||
1859 | } | ||
1860 | |||
1861 | cons_uart = port; | ||
1862 | |||
1863 | dbg("s3c24xx_serial_console_setup: port=%p (%d)\n", port, co->index); | ||
1864 | |||
1865 | /* | ||
1866 | * Check whether an invalid uart number has been specified, and | ||
1867 | * if so, search for the first available port that does have | ||
1868 | * console support. | ||
1869 | */ | ||
1870 | if (options) | ||
1871 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
1872 | else | ||
1873 | s3c24xx_serial_get_options(port, &baud, &parity, &bits); | ||
1874 | |||
1875 | dbg("s3c24xx_serial_console_setup: baud %d\n", baud); | ||
1876 | |||
1877 | return uart_set_options(port, co, baud, parity, bits, flow); | ||
1878 | } | ||
1879 | |||
1880 | /* s3c24xx_serial_initconsole | ||
1881 | * | ||
1882 | * initialise the console from one of the uart drivers | ||
1883 | */ | ||
1884 | |||
1885 | static struct console s3c24xx_serial_console = | ||
1886 | { | ||
1887 | .name = S3C24XX_SERIAL_NAME, | ||
1888 | .device = uart_console_device, | ||
1889 | .flags = CON_PRINTBUFFER, | ||
1890 | .index = -1, | ||
1891 | .write = s3c24xx_serial_console_write, | ||
1892 | .setup = s3c24xx_serial_console_setup | ||
1893 | }; | ||
1894 | |||
1895 | static int s3c24xx_serial_initconsole(void) | ||
1896 | { | ||
1897 | struct s3c24xx_uart_info *info; | ||
1898 | struct platform_device *dev = s3c24xx_uart_devs[0]; | ||
1899 | |||
1900 | dbg("s3c24xx_serial_initconsole\n"); | ||
1901 | |||
1902 | /* select driver based on the cpu */ | ||
1903 | |||
1904 | if (dev == NULL) { | ||
1905 | printk(KERN_ERR "s3c24xx: no devices for console init\n"); | ||
1906 | return 0; | ||
1907 | } | ||
1908 | |||
1909 | if (strcmp(dev->name, "s3c2400-uart") == 0) { | ||
1910 | info = s3c2400_uart_inf_at; | ||
1911 | } else if (strcmp(dev->name, "s3c2410-uart") == 0) { | ||
1912 | info = s3c2410_uart_inf_at; | ||
1913 | } else if (strcmp(dev->name, "s3c2440-uart") == 0) { | ||
1914 | info = s3c2440_uart_inf_at; | ||
1915 | } else if (strcmp(dev->name, "s3c2412-uart") == 0) { | ||
1916 | info = s3c2412_uart_inf_at; | ||
1917 | } else { | ||
1918 | printk(KERN_ERR "s3c24xx: no driver for %s\n", dev->name); | ||
1919 | return 0; | ||
1920 | } | ||
1921 | |||
1922 | if (info == NULL) { | ||
1923 | printk(KERN_ERR "s3c24xx: no driver for console\n"); | ||
1924 | return 0; | ||
1925 | } | ||
1926 | |||
1927 | s3c24xx_serial_console.data = &s3c24xx_uart_drv; | ||
1928 | s3c24xx_serial_init_ports(info); | ||
1929 | |||
1930 | register_console(&s3c24xx_serial_console); | ||
1931 | return 0; | ||
1932 | } | ||
1933 | |||
1934 | console_initcall(s3c24xx_serial_initconsole); | ||
1935 | |||
1936 | #endif /* CONFIG_SERIAL_S3C2410_CONSOLE */ | ||
1937 | 114 | ||
1938 | MODULE_LICENSE("GPL"); | 115 | MODULE_LICENSE("GPL v2"); |
1939 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | 116 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); |
1940 | MODULE_DESCRIPTION("Samsung S3C2410/S3C2440/S3C2412 Serial port driver"); | 117 | MODULE_DESCRIPTION("Samsung S3C2410 SoC Serial port driver"); |
1941 | MODULE_ALIAS("platform:s3c2400-uart"); | ||
1942 | MODULE_ALIAS("platform:s3c2410-uart"); | 118 | MODULE_ALIAS("platform:s3c2410-uart"); |
1943 | MODULE_ALIAS("platform:s3c2412-uart"); | ||
1944 | MODULE_ALIAS("platform:s3c2440-uart"); | ||
diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c new file mode 100644 index 000000000000..ce0c220e3e92 --- /dev/null +++ b/drivers/serial/s3c2412.c | |||
@@ -0,0 +1,151 @@ | |||
1 | /* linux/drivers/serial/s3c2412.c | ||
2 | * | ||
3 | * Driver for Samsung S3C2412 and S3C2413 SoC onboard UARTs. | ||
4 | * | ||
5 | * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/ioport.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/serial_core.h> | ||
19 | #include <linux/serial.h> | ||
20 | |||
21 | #include <asm/irq.h> | ||
22 | #include <asm/hardware.h> | ||
23 | |||
24 | #include <asm/plat-s3c/regs-serial.h> | ||
25 | #include <asm/arch/regs-gpio.h> | ||
26 | |||
27 | #include "samsung.h" | ||
28 | |||
29 | static int s3c2412_serial_setsource(struct uart_port *port, | ||
30 | struct s3c24xx_uart_clksrc *clk) | ||
31 | { | ||
32 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
33 | |||
34 | ucon &= ~S3C2412_UCON_CLKMASK; | ||
35 | |||
36 | if (strcmp(clk->name, "uclk") == 0) | ||
37 | ucon |= S3C2440_UCON_UCLK; | ||
38 | else if (strcmp(clk->name, "pclk") == 0) | ||
39 | ucon |= S3C2440_UCON_PCLK; | ||
40 | else if (strcmp(clk->name, "usysclk") == 0) | ||
41 | ucon |= S3C2412_UCON_USYSCLK; | ||
42 | else { | ||
43 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
44 | return -EINVAL; | ||
45 | } | ||
46 | |||
47 | wr_regl(port, S3C2410_UCON, ucon); | ||
48 | return 0; | ||
49 | } | ||
50 | |||
51 | |||
52 | static int s3c2412_serial_getsource(struct uart_port *port, | ||
53 | struct s3c24xx_uart_clksrc *clk) | ||
54 | { | ||
55 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
56 | |||
57 | switch (ucon & S3C2412_UCON_CLKMASK) { | ||
58 | case S3C2412_UCON_UCLK: | ||
59 | clk->divisor = 1; | ||
60 | clk->name = "uclk"; | ||
61 | break; | ||
62 | |||
63 | case S3C2412_UCON_PCLK: | ||
64 | case S3C2412_UCON_PCLK2: | ||
65 | clk->divisor = 1; | ||
66 | clk->name = "pclk"; | ||
67 | break; | ||
68 | |||
69 | case S3C2412_UCON_USYSCLK: | ||
70 | clk->divisor = 1; | ||
71 | clk->name = "usysclk"; | ||
72 | break; | ||
73 | } | ||
74 | |||
75 | return 0; | ||
76 | } | ||
77 | |||
78 | static int s3c2412_serial_resetport(struct uart_port *port, | ||
79 | struct s3c2410_uartcfg *cfg) | ||
80 | { | ||
81 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
82 | |||
83 | dbg("%s: port=%p (%08lx), cfg=%p\n", | ||
84 | __func__, port, port->mapbase, cfg); | ||
85 | |||
86 | /* ensure we don't change the clock settings... */ | ||
87 | |||
88 | ucon &= S3C2412_UCON_CLKMASK; | ||
89 | |||
90 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
91 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
92 | |||
93 | /* reset both fifos */ | ||
94 | |||
95 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
96 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
97 | |||
98 | return 0; | ||
99 | } | ||
100 | |||
101 | static struct s3c24xx_uart_info s3c2412_uart_inf = { | ||
102 | .name = "Samsung S3C2412 UART", | ||
103 | .type = PORT_S3C2412, | ||
104 | .fifosize = 64, | ||
105 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
106 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
107 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
108 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
109 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
110 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
111 | .get_clksrc = s3c2412_serial_getsource, | ||
112 | .set_clksrc = s3c2412_serial_setsource, | ||
113 | .reset_port = s3c2412_serial_resetport, | ||
114 | }; | ||
115 | |||
116 | /* device management */ | ||
117 | |||
118 | static int s3c2412_serial_probe(struct platform_device *dev) | ||
119 | { | ||
120 | dbg("s3c2440_serial_probe: dev=%p\n", dev); | ||
121 | return s3c24xx_serial_probe(dev, &s3c2412_uart_inf); | ||
122 | } | ||
123 | |||
124 | static struct platform_driver s3c2412_serial_drv = { | ||
125 | .probe = s3c2412_serial_probe, | ||
126 | .remove = s3c24xx_serial_remove, | ||
127 | .driver = { | ||
128 | .name = "s3c2412-uart", | ||
129 | .owner = THIS_MODULE, | ||
130 | }, | ||
131 | }; | ||
132 | |||
133 | s3c24xx_console_init(&s3c2412_serial_drv, &s3c2412_uart_inf); | ||
134 | |||
135 | static inline int s3c2412_serial_init(void) | ||
136 | { | ||
137 | return s3c24xx_serial_init(&s3c2412_serial_drv, &s3c2412_uart_inf); | ||
138 | } | ||
139 | |||
140 | static inline void s3c2412_serial_exit(void) | ||
141 | { | ||
142 | platform_driver_unregister(&s3c2412_serial_drv); | ||
143 | } | ||
144 | |||
145 | module_init(s3c2412_serial_init); | ||
146 | module_exit(s3c2412_serial_exit); | ||
147 | |||
148 | MODULE_DESCRIPTION("Samsung S3C2412,S3C2413 SoC Serial port driver"); | ||
149 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
150 | MODULE_LICENSE("GPL v2"); | ||
151 | MODULE_ALIAS("platform:s3c2412-uart"); | ||
diff --git a/drivers/serial/s3c2440.c b/drivers/serial/s3c2440.c new file mode 100644 index 000000000000..38f954bd39c6 --- /dev/null +++ b/drivers/serial/s3c2440.c | |||
@@ -0,0 +1,181 @@ | |||
1 | /* linux/drivers/serial/s3c2440.c | ||
2 | * | ||
3 | * Driver for Samsung S3C2440 and S3C2442 SoC onboard UARTs. | ||
4 | * | ||
5 | * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/ioport.h> | ||
15 | #include <linux/io.h> | ||
16 | #include <linux/platform_device.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/serial_core.h> | ||
19 | #include <linux/serial.h> | ||
20 | |||
21 | #include <asm/irq.h> | ||
22 | #include <asm/hardware.h> | ||
23 | |||
24 | #include <asm/plat-s3c/regs-serial.h> | ||
25 | #include <asm/arch/regs-gpio.h> | ||
26 | |||
27 | #include "samsung.h" | ||
28 | |||
29 | |||
30 | static int s3c2440_serial_setsource(struct uart_port *port, | ||
31 | struct s3c24xx_uart_clksrc *clk) | ||
32 | { | ||
33 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
34 | |||
35 | /* todo - proper fclk<>nonfclk switch. */ | ||
36 | |||
37 | ucon &= ~S3C2440_UCON_CLKMASK; | ||
38 | |||
39 | if (strcmp(clk->name, "uclk") == 0) | ||
40 | ucon |= S3C2440_UCON_UCLK; | ||
41 | else if (strcmp(clk->name, "pclk") == 0) | ||
42 | ucon |= S3C2440_UCON_PCLK; | ||
43 | else if (strcmp(clk->name, "fclk") == 0) | ||
44 | ucon |= S3C2440_UCON_FCLK; | ||
45 | else { | ||
46 | printk(KERN_ERR "unknown clock source %s\n", clk->name); | ||
47 | return -EINVAL; | ||
48 | } | ||
49 | |||
50 | wr_regl(port, S3C2410_UCON, ucon); | ||
51 | return 0; | ||
52 | } | ||
53 | |||
54 | |||
55 | static int s3c2440_serial_getsource(struct uart_port *port, | ||
56 | struct s3c24xx_uart_clksrc *clk) | ||
57 | { | ||
58 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
59 | unsigned long ucon0, ucon1, ucon2; | ||
60 | |||
61 | switch (ucon & S3C2440_UCON_CLKMASK) { | ||
62 | case S3C2440_UCON_UCLK: | ||
63 | clk->divisor = 1; | ||
64 | clk->name = "uclk"; | ||
65 | break; | ||
66 | |||
67 | case S3C2440_UCON_PCLK: | ||
68 | case S3C2440_UCON_PCLK2: | ||
69 | clk->divisor = 1; | ||
70 | clk->name = "pclk"; | ||
71 | break; | ||
72 | |||
73 | case S3C2440_UCON_FCLK: | ||
74 | /* the fun of calculating the uart divisors on | ||
75 | * the s3c2440 */ | ||
76 | |||
77 | ucon0 = __raw_readl(S3C24XX_VA_UART0 + S3C2410_UCON); | ||
78 | ucon1 = __raw_readl(S3C24XX_VA_UART1 + S3C2410_UCON); | ||
79 | ucon2 = __raw_readl(S3C24XX_VA_UART2 + S3C2410_UCON); | ||
80 | |||
81 | printk("ucons: %08lx, %08lx, %08lx\n", ucon0, ucon1, ucon2); | ||
82 | |||
83 | ucon0 &= S3C2440_UCON0_DIVMASK; | ||
84 | ucon1 &= S3C2440_UCON1_DIVMASK; | ||
85 | ucon2 &= S3C2440_UCON2_DIVMASK; | ||
86 | |||
87 | if (ucon0 != 0) { | ||
88 | clk->divisor = ucon0 >> S3C2440_UCON_DIVSHIFT; | ||
89 | clk->divisor += 6; | ||
90 | } else if (ucon1 != 0) { | ||
91 | clk->divisor = ucon1 >> S3C2440_UCON_DIVSHIFT; | ||
92 | clk->divisor += 21; | ||
93 | } else if (ucon2 != 0) { | ||
94 | clk->divisor = ucon2 >> S3C2440_UCON_DIVSHIFT; | ||
95 | clk->divisor += 36; | ||
96 | } else { | ||
97 | /* manual calims 44, seems to be 9 */ | ||
98 | clk->divisor = 9; | ||
99 | } | ||
100 | |||
101 | clk->name = "fclk"; | ||
102 | break; | ||
103 | } | ||
104 | |||
105 | return 0; | ||
106 | } | ||
107 | |||
108 | static int s3c2440_serial_resetport(struct uart_port *port, | ||
109 | struct s3c2410_uartcfg *cfg) | ||
110 | { | ||
111 | unsigned long ucon = rd_regl(port, S3C2410_UCON); | ||
112 | |||
113 | dbg("s3c2440_serial_resetport: port=%p (%08lx), cfg=%p\n", | ||
114 | port, port->mapbase, cfg); | ||
115 | |||
116 | /* ensure we don't change the clock settings... */ | ||
117 | |||
118 | ucon &= (S3C2440_UCON0_DIVMASK | (3<<10)); | ||
119 | |||
120 | wr_regl(port, S3C2410_UCON, ucon | cfg->ucon); | ||
121 | wr_regl(port, S3C2410_ULCON, cfg->ulcon); | ||
122 | |||
123 | /* reset both fifos */ | ||
124 | |||
125 | wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH); | ||
126 | wr_regl(port, S3C2410_UFCON, cfg->ufcon); | ||
127 | |||
128 | return 0; | ||
129 | } | ||
130 | |||
131 | static struct s3c24xx_uart_info s3c2440_uart_inf = { | ||
132 | .name = "Samsung S3C2440 UART", | ||
133 | .type = PORT_S3C2440, | ||
134 | .fifosize = 64, | ||
135 | .rx_fifomask = S3C2440_UFSTAT_RXMASK, | ||
136 | .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, | ||
137 | .rx_fifofull = S3C2440_UFSTAT_RXFULL, | ||
138 | .tx_fifofull = S3C2440_UFSTAT_TXFULL, | ||
139 | .tx_fifomask = S3C2440_UFSTAT_TXMASK, | ||
140 | .tx_fifoshift = S3C2440_UFSTAT_TXSHIFT, | ||
141 | .get_clksrc = s3c2440_serial_getsource, | ||
142 | .set_clksrc = s3c2440_serial_setsource, | ||
143 | .reset_port = s3c2440_serial_resetport, | ||
144 | }; | ||
145 | |||
146 | /* device management */ | ||
147 | |||
148 | static int s3c2440_serial_probe(struct platform_device *dev) | ||
149 | { | ||
150 | dbg("s3c2440_serial_probe: dev=%p\n", dev); | ||
151 | return s3c24xx_serial_probe(dev, &s3c2440_uart_inf); | ||
152 | } | ||
153 | |||
154 | static struct platform_driver s3c2440_serial_drv = { | ||
155 | .probe = s3c2440_serial_probe, | ||
156 | .remove = s3c24xx_serial_remove, | ||
157 | .driver = { | ||
158 | .name = "s3c2440-uart", | ||
159 | .owner = THIS_MODULE, | ||
160 | }, | ||
161 | }; | ||
162 | |||
163 | s3c24xx_console_init(&s3c2440_serial_drv, &s3c2440_uart_inf); | ||
164 | |||
165 | static int __init s3c2440_serial_init(void) | ||
166 | { | ||
167 | return s3c24xx_serial_init(&s3c2440_serial_drv, &s3c2440_uart_inf); | ||
168 | } | ||
169 | |||
170 | static void __exit s3c2440_serial_exit(void) | ||
171 | { | ||
172 | platform_driver_unregister(&s3c2440_serial_drv); | ||
173 | } | ||
174 | |||
175 | module_init(s3c2440_serial_init); | ||
176 | module_exit(s3c2440_serial_exit); | ||
177 | |||
178 | MODULE_DESCRIPTION("Samsung S3C2440,S3C2442 SoC Serial port driver"); | ||
179 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
180 | MODULE_LICENSE("GPLi v2"); | ||
181 | MODULE_ALIAS("platform:s3c2440-uart"); | ||
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c new file mode 100644 index 000000000000..4a3ecaa629e6 --- /dev/null +++ b/drivers/serial/samsung.c | |||
@@ -0,0 +1,1317 @@ | |||
1 | /* linux/drivers/serial/samsuing.c | ||
2 | * | ||
3 | * Driver core for Samsung SoC onboard UARTs. | ||
4 | * | ||
5 | * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* Hote on 2410 error handling | ||
14 | * | ||
15 | * The s3c2410 manual has a love/hate affair with the contents of the | ||
16 | * UERSTAT register in the UART blocks, and keeps marking some of the | ||
17 | * error bits as reserved. Having checked with the s3c2410x01, | ||
18 | * it copes with BREAKs properly, so I am happy to ignore the RESERVED | ||
19 | * feature from the latter versions of the manual. | ||
20 | * | ||
21 | * If it becomes aparrent that latter versions of the 2410 remove these | ||
22 | * bits, then action will have to be taken to differentiate the versions | ||
23 | * and change the policy on BREAK | ||
24 | * | ||
25 | * BJD, 04-Nov-2004 | ||
26 | */ | ||
27 | |||
28 | #if defined(CONFIG_SERIAL_SAMSUNG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | ||
29 | #define SUPPORT_SYSRQ | ||
30 | #endif | ||
31 | |||
32 | #include <linux/module.h> | ||
33 | #include <linux/ioport.h> | ||
34 | #include <linux/io.h> | ||
35 | #include <linux/platform_device.h> | ||
36 | #include <linux/init.h> | ||
37 | #include <linux/sysrq.h> | ||
38 | #include <linux/console.h> | ||
39 | #include <linux/tty.h> | ||
40 | #include <linux/tty_flip.h> | ||
41 | #include <linux/serial_core.h> | ||
42 | #include <linux/serial.h> | ||
43 | #include <linux/delay.h> | ||
44 | #include <linux/clk.h> | ||
45 | |||
46 | #include <asm/irq.h> | ||
47 | |||
48 | #include <asm/hardware.h> | ||
49 | |||
50 | #include <asm/plat-s3c/regs-serial.h> | ||
51 | #include <asm/arch/regs-gpio.h> | ||
52 | |||
53 | #include "samsung.h" | ||
54 | |||
55 | /* UART name and device definitions */ | ||
56 | |||
57 | #define S3C24XX_SERIAL_NAME "ttySAC" | ||
58 | #define S3C24XX_SERIAL_MAJOR 204 | ||
59 | #define S3C24XX_SERIAL_MINOR 64 | ||
60 | |||
61 | /* we can support 3 uarts, but not always use them */ | ||
62 | |||
63 | #ifdef CONFIG_CPU_S3C2400 | ||
64 | #define NR_PORTS (2) | ||
65 | #else | ||
66 | #define NR_PORTS (3) | ||
67 | #endif | ||
68 | |||
69 | /* port irq numbers */ | ||
70 | |||
71 | #define TX_IRQ(port) ((port)->irq + 1) | ||
72 | #define RX_IRQ(port) ((port)->irq) | ||
73 | |||
74 | /* macros to change one thing to another */ | ||
75 | |||
76 | #define tx_enabled(port) ((port)->unused[0]) | ||
77 | #define rx_enabled(port) ((port)->unused[1]) | ||
78 | |||
79 | /* flag to ignore all characters comming in */ | ||
80 | #define RXSTAT_DUMMY_READ (0x10000000) | ||
81 | |||
82 | static inline struct s3c24xx_uart_port *to_ourport(struct uart_port *port) | ||
83 | { | ||
84 | return container_of(port, struct s3c24xx_uart_port, port); | ||
85 | } | ||
86 | |||
87 | /* translate a port to the device name */ | ||
88 | |||
89 | static inline const char *s3c24xx_serial_portname(struct uart_port *port) | ||
90 | { | ||
91 | return to_platform_device(port->dev)->name; | ||
92 | } | ||
93 | |||
94 | static int s3c24xx_serial_txempty_nofifo(struct uart_port *port) | ||
95 | { | ||
96 | return (rd_regl(port, S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE); | ||
97 | } | ||
98 | |||
99 | static void s3c24xx_serial_rx_enable(struct uart_port *port) | ||
100 | { | ||
101 | unsigned long flags; | ||
102 | unsigned int ucon, ufcon; | ||
103 | int count = 10000; | ||
104 | |||
105 | spin_lock_irqsave(&port->lock, flags); | ||
106 | |||
107 | while (--count && !s3c24xx_serial_txempty_nofifo(port)) | ||
108 | udelay(100); | ||
109 | |||
110 | ufcon = rd_regl(port, S3C2410_UFCON); | ||
111 | ufcon |= S3C2410_UFCON_RESETRX; | ||
112 | wr_regl(port, S3C2410_UFCON, ufcon); | ||
113 | |||
114 | ucon = rd_regl(port, S3C2410_UCON); | ||
115 | ucon |= S3C2410_UCON_RXIRQMODE; | ||
116 | wr_regl(port, S3C2410_UCON, ucon); | ||
117 | |||
118 | rx_enabled(port) = 1; | ||
119 | spin_unlock_irqrestore(&port->lock, flags); | ||
120 | } | ||
121 | |||
122 | static void s3c24xx_serial_rx_disable(struct uart_port *port) | ||
123 | { | ||
124 | unsigned long flags; | ||
125 | unsigned int ucon; | ||
126 | |||
127 | spin_lock_irqsave(&port->lock, flags); | ||
128 | |||
129 | ucon = rd_regl(port, S3C2410_UCON); | ||
130 | ucon &= ~S3C2410_UCON_RXIRQMODE; | ||
131 | wr_regl(port, S3C2410_UCON, ucon); | ||
132 | |||
133 | rx_enabled(port) = 0; | ||
134 | spin_unlock_irqrestore(&port->lock, flags); | ||
135 | } | ||
136 | |||
137 | static void s3c24xx_serial_stop_tx(struct uart_port *port) | ||
138 | { | ||
139 | if (tx_enabled(port)) { | ||
140 | disable_irq(TX_IRQ(port)); | ||
141 | tx_enabled(port) = 0; | ||
142 | if (port->flags & UPF_CONS_FLOW) | ||
143 | s3c24xx_serial_rx_enable(port); | ||
144 | } | ||
145 | } | ||
146 | |||
147 | static void s3c24xx_serial_start_tx(struct uart_port *port) | ||
148 | { | ||
149 | if (!tx_enabled(port)) { | ||
150 | if (port->flags & UPF_CONS_FLOW) | ||
151 | s3c24xx_serial_rx_disable(port); | ||
152 | |||
153 | enable_irq(TX_IRQ(port)); | ||
154 | tx_enabled(port) = 1; | ||
155 | } | ||
156 | } | ||
157 | |||
158 | |||
159 | static void s3c24xx_serial_stop_rx(struct uart_port *port) | ||
160 | { | ||
161 | if (rx_enabled(port)) { | ||
162 | dbg("s3c24xx_serial_stop_rx: port=%p\n", port); | ||
163 | disable_irq(RX_IRQ(port)); | ||
164 | rx_enabled(port) = 0; | ||
165 | } | ||
166 | } | ||
167 | |||
168 | static void s3c24xx_serial_enable_ms(struct uart_port *port) | ||
169 | { | ||
170 | } | ||
171 | |||
172 | static inline struct s3c24xx_uart_info *s3c24xx_port_to_info(struct uart_port *port) | ||
173 | { | ||
174 | return to_ourport(port)->info; | ||
175 | } | ||
176 | |||
177 | static inline struct s3c2410_uartcfg *s3c24xx_port_to_cfg(struct uart_port *port) | ||
178 | { | ||
179 | if (port->dev == NULL) | ||
180 | return NULL; | ||
181 | |||
182 | return (struct s3c2410_uartcfg *)port->dev->platform_data; | ||
183 | } | ||
184 | |||
185 | static int s3c24xx_serial_rx_fifocnt(struct s3c24xx_uart_port *ourport, | ||
186 | unsigned long ufstat) | ||
187 | { | ||
188 | struct s3c24xx_uart_info *info = ourport->info; | ||
189 | |||
190 | if (ufstat & info->rx_fifofull) | ||
191 | return info->fifosize; | ||
192 | |||
193 | return (ufstat & info->rx_fifomask) >> info->rx_fifoshift; | ||
194 | } | ||
195 | |||
196 | |||
197 | /* ? - where has parity gone?? */ | ||
198 | #define S3C2410_UERSTAT_PARITY (0x1000) | ||
199 | |||
200 | static irqreturn_t | ||
201 | s3c24xx_serial_rx_chars(int irq, void *dev_id) | ||
202 | { | ||
203 | struct s3c24xx_uart_port *ourport = dev_id; | ||
204 | struct uart_port *port = &ourport->port; | ||
205 | struct tty_struct *tty = port->info->tty; | ||
206 | unsigned int ufcon, ch, flag, ufstat, uerstat; | ||
207 | int max_count = 64; | ||
208 | |||
209 | while (max_count-- > 0) { | ||
210 | ufcon = rd_regl(port, S3C2410_UFCON); | ||
211 | ufstat = rd_regl(port, S3C2410_UFSTAT); | ||
212 | |||
213 | if (s3c24xx_serial_rx_fifocnt(ourport, ufstat) == 0) | ||
214 | break; | ||
215 | |||
216 | uerstat = rd_regl(port, S3C2410_UERSTAT); | ||
217 | ch = rd_regb(port, S3C2410_URXH); | ||
218 | |||
219 | if (port->flags & UPF_CONS_FLOW) { | ||
220 | int txe = s3c24xx_serial_txempty_nofifo(port); | ||
221 | |||
222 | if (rx_enabled(port)) { | ||
223 | if (!txe) { | ||
224 | rx_enabled(port) = 0; | ||
225 | continue; | ||
226 | } | ||
227 | } else { | ||
228 | if (txe) { | ||
229 | ufcon |= S3C2410_UFCON_RESETRX; | ||
230 | wr_regl(port, S3C2410_UFCON, ufcon); | ||
231 | rx_enabled(port) = 1; | ||
232 | goto out; | ||
233 | } | ||
234 | continue; | ||
235 | } | ||
236 | } | ||
237 | |||
238 | /* insert the character into the buffer */ | ||
239 | |||
240 | flag = TTY_NORMAL; | ||
241 | port->icount.rx++; | ||
242 | |||
243 | if (unlikely(uerstat & S3C2410_UERSTAT_ANY)) { | ||
244 | dbg("rxerr: port ch=0x%02x, rxs=0x%08x\n", | ||
245 | ch, uerstat); | ||
246 | |||
247 | /* check for break */ | ||
248 | if (uerstat & S3C2410_UERSTAT_BREAK) { | ||
249 | dbg("break!\n"); | ||
250 | port->icount.brk++; | ||
251 | if (uart_handle_break(port)) | ||
252 | goto ignore_char; | ||
253 | } | ||
254 | |||
255 | if (uerstat & S3C2410_UERSTAT_FRAME) | ||
256 | port->icount.frame++; | ||
257 | if (uerstat & S3C2410_UERSTAT_OVERRUN) | ||
258 | port->icount.overrun++; | ||
259 | |||
260 | uerstat &= port->read_status_mask; | ||
261 | |||
262 | if (uerstat & S3C2410_UERSTAT_BREAK) | ||
263 | flag = TTY_BREAK; | ||
264 | else if (uerstat & S3C2410_UERSTAT_PARITY) | ||
265 | flag = TTY_PARITY; | ||
266 | else if (uerstat & (S3C2410_UERSTAT_FRAME | | ||
267 | S3C2410_UERSTAT_OVERRUN)) | ||
268 | flag = TTY_FRAME; | ||
269 | } | ||
270 | |||
271 | if (uart_handle_sysrq_char(port, ch)) | ||
272 | goto ignore_char; | ||
273 | |||
274 | uart_insert_char(port, uerstat, S3C2410_UERSTAT_OVERRUN, | ||
275 | ch, flag); | ||
276 | |||
277 | ignore_char: | ||
278 | continue; | ||
279 | } | ||
280 | tty_flip_buffer_push(tty); | ||
281 | |||
282 | out: | ||
283 | return IRQ_HANDLED; | ||
284 | } | ||
285 | |||
286 | static irqreturn_t s3c24xx_serial_tx_chars(int irq, void *id) | ||
287 | { | ||
288 | struct s3c24xx_uart_port *ourport = id; | ||
289 | struct uart_port *port = &ourport->port; | ||
290 | struct circ_buf *xmit = &port->info->xmit; | ||
291 | int count = 256; | ||
292 | |||
293 | if (port->x_char) { | ||
294 | wr_regb(port, S3C2410_UTXH, port->x_char); | ||
295 | port->icount.tx++; | ||
296 | port->x_char = 0; | ||
297 | goto out; | ||
298 | } | ||
299 | |||
300 | /* if there isnt anything more to transmit, or the uart is now | ||
301 | * stopped, disable the uart and exit | ||
302 | */ | ||
303 | |||
304 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | ||
305 | s3c24xx_serial_stop_tx(port); | ||
306 | goto out; | ||
307 | } | ||
308 | |||
309 | /* try and drain the buffer... */ | ||
310 | |||
311 | while (!uart_circ_empty(xmit) && count-- > 0) { | ||
312 | if (rd_regl(port, S3C2410_UFSTAT) & ourport->info->tx_fifofull) | ||
313 | break; | ||
314 | |||
315 | wr_regb(port, S3C2410_UTXH, xmit->buf[xmit->tail]); | ||
316 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | ||
317 | port->icount.tx++; | ||
318 | } | ||
319 | |||
320 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | ||
321 | uart_write_wakeup(port); | ||
322 | |||
323 | if (uart_circ_empty(xmit)) | ||
324 | s3c24xx_serial_stop_tx(port); | ||
325 | |||
326 | out: | ||
327 | return IRQ_HANDLED; | ||
328 | } | ||
329 | |||
330 | static unsigned int s3c24xx_serial_tx_empty(struct uart_port *port) | ||
331 | { | ||
332 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
333 | unsigned long ufstat = rd_regl(port, S3C2410_UFSTAT); | ||
334 | unsigned long ufcon = rd_regl(port, S3C2410_UFCON); | ||
335 | |||
336 | if (ufcon & S3C2410_UFCON_FIFOMODE) { | ||
337 | if ((ufstat & info->tx_fifomask) != 0 || | ||
338 | (ufstat & info->tx_fifofull)) | ||
339 | return 0; | ||
340 | |||
341 | return 1; | ||
342 | } | ||
343 | |||
344 | return s3c24xx_serial_txempty_nofifo(port); | ||
345 | } | ||
346 | |||
347 | /* no modem control lines */ | ||
348 | static unsigned int s3c24xx_serial_get_mctrl(struct uart_port *port) | ||
349 | { | ||
350 | unsigned int umstat = rd_regb(port, S3C2410_UMSTAT); | ||
351 | |||
352 | if (umstat & S3C2410_UMSTAT_CTS) | ||
353 | return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; | ||
354 | else | ||
355 | return TIOCM_CAR | TIOCM_DSR; | ||
356 | } | ||
357 | |||
358 | static void s3c24xx_serial_set_mctrl(struct uart_port *port, unsigned int mctrl) | ||
359 | { | ||
360 | /* todo - possibly remove AFC and do manual CTS */ | ||
361 | } | ||
362 | |||
363 | static void s3c24xx_serial_break_ctl(struct uart_port *port, int break_state) | ||
364 | { | ||
365 | unsigned long flags; | ||
366 | unsigned int ucon; | ||
367 | |||
368 | spin_lock_irqsave(&port->lock, flags); | ||
369 | |||
370 | ucon = rd_regl(port, S3C2410_UCON); | ||
371 | |||
372 | if (break_state) | ||
373 | ucon |= S3C2410_UCON_SBREAK; | ||
374 | else | ||
375 | ucon &= ~S3C2410_UCON_SBREAK; | ||
376 | |||
377 | wr_regl(port, S3C2410_UCON, ucon); | ||
378 | |||
379 | spin_unlock_irqrestore(&port->lock, flags); | ||
380 | } | ||
381 | |||
382 | static void s3c24xx_serial_shutdown(struct uart_port *port) | ||
383 | { | ||
384 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
385 | |||
386 | if (ourport->tx_claimed) { | ||
387 | free_irq(TX_IRQ(port), ourport); | ||
388 | tx_enabled(port) = 0; | ||
389 | ourport->tx_claimed = 0; | ||
390 | } | ||
391 | |||
392 | if (ourport->rx_claimed) { | ||
393 | free_irq(RX_IRQ(port), ourport); | ||
394 | ourport->rx_claimed = 0; | ||
395 | rx_enabled(port) = 0; | ||
396 | } | ||
397 | } | ||
398 | |||
399 | |||
400 | static int s3c24xx_serial_startup(struct uart_port *port) | ||
401 | { | ||
402 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
403 | int ret; | ||
404 | |||
405 | dbg("s3c24xx_serial_startup: port=%p (%08lx,%p)\n", | ||
406 | port->mapbase, port->membase); | ||
407 | |||
408 | rx_enabled(port) = 1; | ||
409 | |||
410 | ret = request_irq(RX_IRQ(port), | ||
411 | s3c24xx_serial_rx_chars, 0, | ||
412 | s3c24xx_serial_portname(port), ourport); | ||
413 | |||
414 | if (ret != 0) { | ||
415 | printk(KERN_ERR "cannot get irq %d\n", RX_IRQ(port)); | ||
416 | return ret; | ||
417 | } | ||
418 | |||
419 | ourport->rx_claimed = 1; | ||
420 | |||
421 | dbg("requesting tx irq...\n"); | ||
422 | |||
423 | tx_enabled(port) = 1; | ||
424 | |||
425 | ret = request_irq(TX_IRQ(port), | ||
426 | s3c24xx_serial_tx_chars, 0, | ||
427 | s3c24xx_serial_portname(port), ourport); | ||
428 | |||
429 | if (ret) { | ||
430 | printk(KERN_ERR "cannot get irq %d\n", TX_IRQ(port)); | ||
431 | goto err; | ||
432 | } | ||
433 | |||
434 | ourport->tx_claimed = 1; | ||
435 | |||
436 | dbg("s3c24xx_serial_startup ok\n"); | ||
437 | |||
438 | /* the port reset code should have done the correct | ||
439 | * register setup for the port controls */ | ||
440 | |||
441 | return ret; | ||
442 | |||
443 | err: | ||
444 | s3c24xx_serial_shutdown(port); | ||
445 | return ret; | ||
446 | } | ||
447 | |||
448 | /* power power management control */ | ||
449 | |||
450 | static void s3c24xx_serial_pm(struct uart_port *port, unsigned int level, | ||
451 | unsigned int old) | ||
452 | { | ||
453 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
454 | |||
455 | switch (level) { | ||
456 | case 3: | ||
457 | if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) | ||
458 | clk_disable(ourport->baudclk); | ||
459 | |||
460 | clk_disable(ourport->clk); | ||
461 | break; | ||
462 | |||
463 | case 0: | ||
464 | clk_enable(ourport->clk); | ||
465 | |||
466 | if (!IS_ERR(ourport->baudclk) && ourport->baudclk != NULL) | ||
467 | clk_enable(ourport->baudclk); | ||
468 | |||
469 | break; | ||
470 | default: | ||
471 | printk(KERN_ERR "s3c24xx_serial: unknown pm %d\n", level); | ||
472 | } | ||
473 | } | ||
474 | |||
475 | /* baud rate calculation | ||
476 | * | ||
477 | * The UARTs on the S3C2410/S3C2440 can take their clocks from a number | ||
478 | * of different sources, including the peripheral clock ("pclk") and an | ||
479 | * external clock ("uclk"). The S3C2440 also adds the core clock ("fclk") | ||
480 | * with a programmable extra divisor. | ||
481 | * | ||
482 | * The following code goes through the clock sources, and calculates the | ||
483 | * baud clocks (and the resultant actual baud rates) and then tries to | ||
484 | * pick the closest one and select that. | ||
485 | * | ||
486 | */ | ||
487 | |||
488 | |||
489 | #define MAX_CLKS (8) | ||
490 | |||
491 | static struct s3c24xx_uart_clksrc tmp_clksrc = { | ||
492 | .name = "pclk", | ||
493 | .min_baud = 0, | ||
494 | .max_baud = 0, | ||
495 | .divisor = 1, | ||
496 | }; | ||
497 | |||
498 | static inline int | ||
499 | s3c24xx_serial_getsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c) | ||
500 | { | ||
501 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
502 | |||
503 | return (info->get_clksrc)(port, c); | ||
504 | } | ||
505 | |||
506 | static inline int | ||
507 | s3c24xx_serial_setsource(struct uart_port *port, struct s3c24xx_uart_clksrc *c) | ||
508 | { | ||
509 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
510 | |||
511 | return (info->set_clksrc)(port, c); | ||
512 | } | ||
513 | |||
514 | struct baud_calc { | ||
515 | struct s3c24xx_uart_clksrc *clksrc; | ||
516 | unsigned int calc; | ||
517 | unsigned int quot; | ||
518 | struct clk *src; | ||
519 | }; | ||
520 | |||
521 | static int s3c24xx_serial_calcbaud(struct baud_calc *calc, | ||
522 | struct uart_port *port, | ||
523 | struct s3c24xx_uart_clksrc *clksrc, | ||
524 | unsigned int baud) | ||
525 | { | ||
526 | unsigned long rate; | ||
527 | |||
528 | calc->src = clk_get(port->dev, clksrc->name); | ||
529 | if (calc->src == NULL || IS_ERR(calc->src)) | ||
530 | return 0; | ||
531 | |||
532 | rate = clk_get_rate(calc->src); | ||
533 | rate /= clksrc->divisor; | ||
534 | |||
535 | calc->clksrc = clksrc; | ||
536 | calc->quot = (rate + (8 * baud)) / (16 * baud); | ||
537 | calc->calc = (rate / (calc->quot * 16)); | ||
538 | |||
539 | calc->quot--; | ||
540 | return 1; | ||
541 | } | ||
542 | |||
543 | static unsigned int s3c24xx_serial_getclk(struct uart_port *port, | ||
544 | struct s3c24xx_uart_clksrc **clksrc, | ||
545 | struct clk **clk, | ||
546 | unsigned int baud) | ||
547 | { | ||
548 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); | ||
549 | struct s3c24xx_uart_clksrc *clkp; | ||
550 | struct baud_calc res[MAX_CLKS]; | ||
551 | struct baud_calc *resptr, *best, *sptr; | ||
552 | int i; | ||
553 | |||
554 | clkp = cfg->clocks; | ||
555 | best = NULL; | ||
556 | |||
557 | if (cfg->clocks_size < 2) { | ||
558 | if (cfg->clocks_size == 0) | ||
559 | clkp = &tmp_clksrc; | ||
560 | |||
561 | /* check to see if we're sourcing fclk, and if so we're | ||
562 | * going to have to update the clock source | ||
563 | */ | ||
564 | |||
565 | if (strcmp(clkp->name, "fclk") == 0) { | ||
566 | struct s3c24xx_uart_clksrc src; | ||
567 | |||
568 | s3c24xx_serial_getsource(port, &src); | ||
569 | |||
570 | /* check that the port already using fclk, and if | ||
571 | * not, then re-select fclk | ||
572 | */ | ||
573 | |||
574 | if (strcmp(src.name, clkp->name) == 0) { | ||
575 | s3c24xx_serial_setsource(port, clkp); | ||
576 | s3c24xx_serial_getsource(port, &src); | ||
577 | } | ||
578 | |||
579 | clkp->divisor = src.divisor; | ||
580 | } | ||
581 | |||
582 | s3c24xx_serial_calcbaud(res, port, clkp, baud); | ||
583 | best = res; | ||
584 | resptr = best + 1; | ||
585 | } else { | ||
586 | resptr = res; | ||
587 | |||
588 | for (i = 0; i < cfg->clocks_size; i++, clkp++) { | ||
589 | if (s3c24xx_serial_calcbaud(resptr, port, clkp, baud)) | ||
590 | resptr++; | ||
591 | } | ||
592 | } | ||
593 | |||
594 | /* ok, we now need to select the best clock we found */ | ||
595 | |||
596 | if (!best) { | ||
597 | unsigned int deviation = (1<<30)|((1<<30)-1); | ||
598 | int calc_deviation; | ||
599 | |||
600 | for (sptr = res; sptr < resptr; sptr++) { | ||
601 | calc_deviation = baud - sptr->calc; | ||
602 | if (calc_deviation < 0) | ||
603 | calc_deviation = -calc_deviation; | ||
604 | |||
605 | if (calc_deviation < deviation) { | ||
606 | best = sptr; | ||
607 | deviation = calc_deviation; | ||
608 | } | ||
609 | } | ||
610 | } | ||
611 | |||
612 | /* store results to pass back */ | ||
613 | |||
614 | *clksrc = best->clksrc; | ||
615 | *clk = best->src; | ||
616 | |||
617 | return best->quot; | ||
618 | } | ||
619 | |||
620 | static void s3c24xx_serial_set_termios(struct uart_port *port, | ||
621 | struct ktermios *termios, | ||
622 | struct ktermios *old) | ||
623 | { | ||
624 | struct s3c2410_uartcfg *cfg = s3c24xx_port_to_cfg(port); | ||
625 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
626 | struct s3c24xx_uart_clksrc *clksrc = NULL; | ||
627 | struct clk *clk = NULL; | ||
628 | unsigned long flags; | ||
629 | unsigned int baud, quot; | ||
630 | unsigned int ulcon; | ||
631 | unsigned int umcon; | ||
632 | |||
633 | /* | ||
634 | * We don't support modem control lines. | ||
635 | */ | ||
636 | termios->c_cflag &= ~(HUPCL | CMSPAR); | ||
637 | termios->c_cflag |= CLOCAL; | ||
638 | |||
639 | /* | ||
640 | * Ask the core to calculate the divisor for us. | ||
641 | */ | ||
642 | |||
643 | baud = uart_get_baud_rate(port, termios, old, 0, 115200*8); | ||
644 | |||
645 | if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) | ||
646 | quot = port->custom_divisor; | ||
647 | else | ||
648 | quot = s3c24xx_serial_getclk(port, &clksrc, &clk, baud); | ||
649 | |||
650 | /* check to see if we need to change clock source */ | ||
651 | |||
652 | if (ourport->clksrc != clksrc || ourport->baudclk != clk) { | ||
653 | s3c24xx_serial_setsource(port, clksrc); | ||
654 | |||
655 | if (ourport->baudclk != NULL && !IS_ERR(ourport->baudclk)) { | ||
656 | clk_disable(ourport->baudclk); | ||
657 | ourport->baudclk = NULL; | ||
658 | } | ||
659 | |||
660 | clk_enable(clk); | ||
661 | |||
662 | ourport->clksrc = clksrc; | ||
663 | ourport->baudclk = clk; | ||
664 | } | ||
665 | |||
666 | switch (termios->c_cflag & CSIZE) { | ||
667 | case CS5: | ||
668 | dbg("config: 5bits/char\n"); | ||
669 | ulcon = S3C2410_LCON_CS5; | ||
670 | break; | ||
671 | case CS6: | ||
672 | dbg("config: 6bits/char\n"); | ||
673 | ulcon = S3C2410_LCON_CS6; | ||
674 | break; | ||
675 | case CS7: | ||
676 | dbg("config: 7bits/char\n"); | ||
677 | ulcon = S3C2410_LCON_CS7; | ||
678 | break; | ||
679 | case CS8: | ||
680 | default: | ||
681 | dbg("config: 8bits/char\n"); | ||
682 | ulcon = S3C2410_LCON_CS8; | ||
683 | break; | ||
684 | } | ||
685 | |||
686 | /* preserve original lcon IR settings */ | ||
687 | ulcon |= (cfg->ulcon & S3C2410_LCON_IRM); | ||
688 | |||
689 | if (termios->c_cflag & CSTOPB) | ||
690 | ulcon |= S3C2410_LCON_STOPB; | ||
691 | |||
692 | umcon = (termios->c_cflag & CRTSCTS) ? S3C2410_UMCOM_AFC : 0; | ||
693 | |||
694 | if (termios->c_cflag & PARENB) { | ||
695 | if (termios->c_cflag & PARODD) | ||
696 | ulcon |= S3C2410_LCON_PODD; | ||
697 | else | ||
698 | ulcon |= S3C2410_LCON_PEVEN; | ||
699 | } else { | ||
700 | ulcon |= S3C2410_LCON_PNONE; | ||
701 | } | ||
702 | |||
703 | spin_lock_irqsave(&port->lock, flags); | ||
704 | |||
705 | dbg("setting ulcon to %08x, brddiv to %d\n", ulcon, quot); | ||
706 | |||
707 | wr_regl(port, S3C2410_ULCON, ulcon); | ||
708 | wr_regl(port, S3C2410_UBRDIV, quot); | ||
709 | wr_regl(port, S3C2410_UMCON, umcon); | ||
710 | |||
711 | dbg("uart: ulcon = 0x%08x, ucon = 0x%08x, ufcon = 0x%08x\n", | ||
712 | rd_regl(port, S3C2410_ULCON), | ||
713 | rd_regl(port, S3C2410_UCON), | ||
714 | rd_regl(port, S3C2410_UFCON)); | ||
715 | |||
716 | /* | ||
717 | * Update the per-port timeout. | ||
718 | */ | ||
719 | uart_update_timeout(port, termios->c_cflag, baud); | ||
720 | |||
721 | /* | ||
722 | * Which character status flags are we interested in? | ||
723 | */ | ||
724 | port->read_status_mask = S3C2410_UERSTAT_OVERRUN; | ||
725 | if (termios->c_iflag & INPCK) | ||
726 | port->read_status_mask |= S3C2410_UERSTAT_FRAME | S3C2410_UERSTAT_PARITY; | ||
727 | |||
728 | /* | ||
729 | * Which character status flags should we ignore? | ||
730 | */ | ||
731 | port->ignore_status_mask = 0; | ||
732 | if (termios->c_iflag & IGNPAR) | ||
733 | port->ignore_status_mask |= S3C2410_UERSTAT_OVERRUN; | ||
734 | if (termios->c_iflag & IGNBRK && termios->c_iflag & IGNPAR) | ||
735 | port->ignore_status_mask |= S3C2410_UERSTAT_FRAME; | ||
736 | |||
737 | /* | ||
738 | * Ignore all characters if CREAD is not set. | ||
739 | */ | ||
740 | if ((termios->c_cflag & CREAD) == 0) | ||
741 | port->ignore_status_mask |= RXSTAT_DUMMY_READ; | ||
742 | |||
743 | spin_unlock_irqrestore(&port->lock, flags); | ||
744 | } | ||
745 | |||
746 | static const char *s3c24xx_serial_type(struct uart_port *port) | ||
747 | { | ||
748 | switch (port->type) { | ||
749 | case PORT_S3C2410: | ||
750 | return "S3C2410"; | ||
751 | case PORT_S3C2440: | ||
752 | return "S3C2440"; | ||
753 | case PORT_S3C2412: | ||
754 | return "S3C2412"; | ||
755 | default: | ||
756 | return NULL; | ||
757 | } | ||
758 | } | ||
759 | |||
760 | #define MAP_SIZE (0x100) | ||
761 | |||
762 | static void s3c24xx_serial_release_port(struct uart_port *port) | ||
763 | { | ||
764 | release_mem_region(port->mapbase, MAP_SIZE); | ||
765 | } | ||
766 | |||
767 | static int s3c24xx_serial_request_port(struct uart_port *port) | ||
768 | { | ||
769 | const char *name = s3c24xx_serial_portname(port); | ||
770 | return request_mem_region(port->mapbase, MAP_SIZE, name) ? 0 : -EBUSY; | ||
771 | } | ||
772 | |||
773 | static void s3c24xx_serial_config_port(struct uart_port *port, int flags) | ||
774 | { | ||
775 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
776 | |||
777 | if (flags & UART_CONFIG_TYPE && | ||
778 | s3c24xx_serial_request_port(port) == 0) | ||
779 | port->type = info->type; | ||
780 | } | ||
781 | |||
782 | /* | ||
783 | * verify the new serial_struct (for TIOCSSERIAL). | ||
784 | */ | ||
785 | static int | ||
786 | s3c24xx_serial_verify_port(struct uart_port *port, struct serial_struct *ser) | ||
787 | { | ||
788 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
789 | |||
790 | if (ser->type != PORT_UNKNOWN && ser->type != info->type) | ||
791 | return -EINVAL; | ||
792 | |||
793 | return 0; | ||
794 | } | ||
795 | |||
796 | |||
797 | #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE | ||
798 | |||
799 | static struct console s3c24xx_serial_console; | ||
800 | |||
801 | #define S3C24XX_SERIAL_CONSOLE &s3c24xx_serial_console | ||
802 | #else | ||
803 | #define S3C24XX_SERIAL_CONSOLE NULL | ||
804 | #endif | ||
805 | |||
806 | static struct uart_ops s3c24xx_serial_ops = { | ||
807 | .pm = s3c24xx_serial_pm, | ||
808 | .tx_empty = s3c24xx_serial_tx_empty, | ||
809 | .get_mctrl = s3c24xx_serial_get_mctrl, | ||
810 | .set_mctrl = s3c24xx_serial_set_mctrl, | ||
811 | .stop_tx = s3c24xx_serial_stop_tx, | ||
812 | .start_tx = s3c24xx_serial_start_tx, | ||
813 | .stop_rx = s3c24xx_serial_stop_rx, | ||
814 | .enable_ms = s3c24xx_serial_enable_ms, | ||
815 | .break_ctl = s3c24xx_serial_break_ctl, | ||
816 | .startup = s3c24xx_serial_startup, | ||
817 | .shutdown = s3c24xx_serial_shutdown, | ||
818 | .set_termios = s3c24xx_serial_set_termios, | ||
819 | .type = s3c24xx_serial_type, | ||
820 | .release_port = s3c24xx_serial_release_port, | ||
821 | .request_port = s3c24xx_serial_request_port, | ||
822 | .config_port = s3c24xx_serial_config_port, | ||
823 | .verify_port = s3c24xx_serial_verify_port, | ||
824 | }; | ||
825 | |||
826 | |||
827 | static struct uart_driver s3c24xx_uart_drv = { | ||
828 | .owner = THIS_MODULE, | ||
829 | .dev_name = "s3c2410_serial", | ||
830 | .nr = 3, | ||
831 | .cons = S3C24XX_SERIAL_CONSOLE, | ||
832 | .driver_name = S3C24XX_SERIAL_NAME, | ||
833 | .major = S3C24XX_SERIAL_MAJOR, | ||
834 | .minor = S3C24XX_SERIAL_MINOR, | ||
835 | }; | ||
836 | |||
837 | static struct s3c24xx_uart_port s3c24xx_serial_ports[NR_PORTS] = { | ||
838 | [0] = { | ||
839 | .port = { | ||
840 | .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[0].port.lock), | ||
841 | .iotype = UPIO_MEM, | ||
842 | .irq = IRQ_S3CUART_RX0, | ||
843 | .uartclk = 0, | ||
844 | .fifosize = 16, | ||
845 | .ops = &s3c24xx_serial_ops, | ||
846 | .flags = UPF_BOOT_AUTOCONF, | ||
847 | .line = 0, | ||
848 | } | ||
849 | }, | ||
850 | [1] = { | ||
851 | .port = { | ||
852 | .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[1].port.lock), | ||
853 | .iotype = UPIO_MEM, | ||
854 | .irq = IRQ_S3CUART_RX1, | ||
855 | .uartclk = 0, | ||
856 | .fifosize = 16, | ||
857 | .ops = &s3c24xx_serial_ops, | ||
858 | .flags = UPF_BOOT_AUTOCONF, | ||
859 | .line = 1, | ||
860 | } | ||
861 | }, | ||
862 | #if NR_PORTS > 2 | ||
863 | |||
864 | [2] = { | ||
865 | .port = { | ||
866 | .lock = __SPIN_LOCK_UNLOCKED(s3c24xx_serial_ports[2].port.lock), | ||
867 | .iotype = UPIO_MEM, | ||
868 | .irq = IRQ_S3CUART_RX2, | ||
869 | .uartclk = 0, | ||
870 | .fifosize = 16, | ||
871 | .ops = &s3c24xx_serial_ops, | ||
872 | .flags = UPF_BOOT_AUTOCONF, | ||
873 | .line = 2, | ||
874 | } | ||
875 | } | ||
876 | #endif | ||
877 | }; | ||
878 | |||
879 | /* s3c24xx_serial_resetport | ||
880 | * | ||
881 | * wrapper to call the specific reset for this port (reset the fifos | ||
882 | * and the settings) | ||
883 | */ | ||
884 | |||
885 | static inline int s3c24xx_serial_resetport(struct uart_port *port, | ||
886 | struct s3c2410_uartcfg *cfg) | ||
887 | { | ||
888 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
889 | |||
890 | return (info->reset_port)(port, cfg); | ||
891 | } | ||
892 | |||
893 | /* s3c24xx_serial_init_port | ||
894 | * | ||
895 | * initialise a single serial port from the platform device given | ||
896 | */ | ||
897 | |||
898 | static int s3c24xx_serial_init_port(struct s3c24xx_uart_port *ourport, | ||
899 | struct s3c24xx_uart_info *info, | ||
900 | struct platform_device *platdev) | ||
901 | { | ||
902 | struct uart_port *port = &ourport->port; | ||
903 | struct s3c2410_uartcfg *cfg; | ||
904 | struct resource *res; | ||
905 | int ret; | ||
906 | |||
907 | dbg("s3c24xx_serial_init_port: port=%p, platdev=%p\n", port, platdev); | ||
908 | |||
909 | if (platdev == NULL) | ||
910 | return -ENODEV; | ||
911 | |||
912 | cfg = s3c24xx_dev_to_cfg(&platdev->dev); | ||
913 | |||
914 | if (port->mapbase != 0) | ||
915 | return 0; | ||
916 | |||
917 | if (cfg->hwport > 3) | ||
918 | return -EINVAL; | ||
919 | |||
920 | /* setup info for port */ | ||
921 | port->dev = &platdev->dev; | ||
922 | ourport->info = info; | ||
923 | |||
924 | /* copy the info in from provided structure */ | ||
925 | ourport->port.fifosize = info->fifosize; | ||
926 | |||
927 | dbg("s3c24xx_serial_init_port: %p (hw %d)...\n", port, cfg->hwport); | ||
928 | |||
929 | port->uartclk = 1; | ||
930 | |||
931 | if (cfg->uart_flags & UPF_CONS_FLOW) { | ||
932 | dbg("s3c24xx_serial_init_port: enabling flow control\n"); | ||
933 | port->flags |= UPF_CONS_FLOW; | ||
934 | } | ||
935 | |||
936 | /* sort our the physical and virtual addresses for each UART */ | ||
937 | |||
938 | res = platform_get_resource(platdev, IORESOURCE_MEM, 0); | ||
939 | if (res == NULL) { | ||
940 | printk(KERN_ERR "failed to find memory resource for uart\n"); | ||
941 | return -EINVAL; | ||
942 | } | ||
943 | |||
944 | dbg("resource %p (%lx..%lx)\n", res, res->start, res->end); | ||
945 | |||
946 | port->mapbase = res->start; | ||
947 | port->membase = S3C24XX_VA_UART + (res->start - S3C24XX_PA_UART); | ||
948 | ret = platform_get_irq(platdev, 0); | ||
949 | if (ret < 0) | ||
950 | port->irq = 0; | ||
951 | else | ||
952 | port->irq = ret; | ||
953 | |||
954 | ourport->clk = clk_get(&platdev->dev, "uart"); | ||
955 | |||
956 | dbg("port: map=%08x, mem=%08x, irq=%d, clock=%ld\n", | ||
957 | port->mapbase, port->membase, port->irq, port->uartclk); | ||
958 | |||
959 | /* reset the fifos (and setup the uart) */ | ||
960 | s3c24xx_serial_resetport(port, cfg); | ||
961 | return 0; | ||
962 | } | ||
963 | |||
964 | static ssize_t s3c24xx_serial_show_clksrc(struct device *dev, | ||
965 | struct device_attribute *attr, | ||
966 | char *buf) | ||
967 | { | ||
968 | struct uart_port *port = s3c24xx_dev_to_port(dev); | ||
969 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
970 | |||
971 | return snprintf(buf, PAGE_SIZE, "* %s\n", ourport->clksrc->name); | ||
972 | } | ||
973 | |||
974 | static DEVICE_ATTR(clock_source, S_IRUGO, s3c24xx_serial_show_clksrc, NULL); | ||
975 | |||
976 | /* Device driver serial port probe */ | ||
977 | |||
978 | static int probe_index; | ||
979 | |||
980 | int s3c24xx_serial_probe(struct platform_device *dev, | ||
981 | struct s3c24xx_uart_info *info) | ||
982 | { | ||
983 | struct s3c24xx_uart_port *ourport; | ||
984 | int ret; | ||
985 | |||
986 | dbg("s3c24xx_serial_probe(%p, %p) %d\n", dev, info, probe_index); | ||
987 | |||
988 | ourport = &s3c24xx_serial_ports[probe_index]; | ||
989 | probe_index++; | ||
990 | |||
991 | dbg("%s: initialising port %p...\n", __func__, ourport); | ||
992 | |||
993 | ret = s3c24xx_serial_init_port(ourport, info, dev); | ||
994 | if (ret < 0) | ||
995 | goto probe_err; | ||
996 | |||
997 | dbg("%s: adding port\n", __func__); | ||
998 | uart_add_one_port(&s3c24xx_uart_drv, &ourport->port); | ||
999 | platform_set_drvdata(dev, &ourport->port); | ||
1000 | |||
1001 | ret = device_create_file(&dev->dev, &dev_attr_clock_source); | ||
1002 | if (ret < 0) | ||
1003 | printk(KERN_ERR "%s: failed to add clksrc attr.\n", __func__); | ||
1004 | |||
1005 | return 0; | ||
1006 | |||
1007 | probe_err: | ||
1008 | return ret; | ||
1009 | } | ||
1010 | |||
1011 | EXPORT_SYMBOL_GPL(s3c24xx_serial_probe); | ||
1012 | |||
1013 | int s3c24xx_serial_remove(struct platform_device *dev) | ||
1014 | { | ||
1015 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | ||
1016 | |||
1017 | if (port) { | ||
1018 | device_remove_file(&dev->dev, &dev_attr_clock_source); | ||
1019 | uart_remove_one_port(&s3c24xx_uart_drv, port); | ||
1020 | } | ||
1021 | |||
1022 | return 0; | ||
1023 | } | ||
1024 | |||
1025 | EXPORT_SYMBOL_GPL(s3c24xx_serial_remove); | ||
1026 | |||
1027 | /* UART power management code */ | ||
1028 | |||
1029 | #ifdef CONFIG_PM | ||
1030 | |||
1031 | static int s3c24xx_serial_suspend(struct platform_device *dev, pm_message_t state) | ||
1032 | { | ||
1033 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | ||
1034 | |||
1035 | if (port) | ||
1036 | uart_suspend_port(&s3c24xx_uart_drv, port); | ||
1037 | |||
1038 | return 0; | ||
1039 | } | ||
1040 | |||
1041 | static int s3c24xx_serial_resume(struct platform_device *dev) | ||
1042 | { | ||
1043 | struct uart_port *port = s3c24xx_dev_to_port(&dev->dev); | ||
1044 | struct s3c24xx_uart_port *ourport = to_ourport(port); | ||
1045 | |||
1046 | if (port) { | ||
1047 | clk_enable(ourport->clk); | ||
1048 | s3c24xx_serial_resetport(port, s3c24xx_port_to_cfg(port)); | ||
1049 | clk_disable(ourport->clk); | ||
1050 | |||
1051 | uart_resume_port(&s3c24xx_uart_drv, port); | ||
1052 | } | ||
1053 | |||
1054 | return 0; | ||
1055 | } | ||
1056 | #endif | ||
1057 | |||
1058 | int s3c24xx_serial_init(struct platform_driver *drv, | ||
1059 | struct s3c24xx_uart_info *info) | ||
1060 | { | ||
1061 | dbg("s3c24xx_serial_init(%p,%p)\n", drv, info); | ||
1062 | |||
1063 | #ifdef CONFIG_PM | ||
1064 | drv->suspend = s3c24xx_serial_suspend; | ||
1065 | drv->resume = s3c24xx_serial_resume; | ||
1066 | #endif | ||
1067 | |||
1068 | return platform_driver_register(drv); | ||
1069 | } | ||
1070 | |||
1071 | EXPORT_SYMBOL_GPL(s3c24xx_serial_init); | ||
1072 | |||
1073 | /* module initialisation code */ | ||
1074 | |||
1075 | static int __init s3c24xx_serial_modinit(void) | ||
1076 | { | ||
1077 | int ret; | ||
1078 | |||
1079 | ret = uart_register_driver(&s3c24xx_uart_drv); | ||
1080 | if (ret < 0) { | ||
1081 | printk(KERN_ERR "failed to register UART driver\n"); | ||
1082 | return -1; | ||
1083 | } | ||
1084 | |||
1085 | return 0; | ||
1086 | } | ||
1087 | |||
1088 | static void __exit s3c24xx_serial_modexit(void) | ||
1089 | { | ||
1090 | uart_unregister_driver(&s3c24xx_uart_drv); | ||
1091 | } | ||
1092 | |||
1093 | module_init(s3c24xx_serial_modinit); | ||
1094 | module_exit(s3c24xx_serial_modexit); | ||
1095 | |||
1096 | /* Console code */ | ||
1097 | |||
1098 | #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE | ||
1099 | |||
1100 | static struct uart_port *cons_uart; | ||
1101 | |||
1102 | static int | ||
1103 | s3c24xx_serial_console_txrdy(struct uart_port *port, unsigned int ufcon) | ||
1104 | { | ||
1105 | struct s3c24xx_uart_info *info = s3c24xx_port_to_info(port); | ||
1106 | unsigned long ufstat, utrstat; | ||
1107 | |||
1108 | if (ufcon & S3C2410_UFCON_FIFOMODE) { | ||
1109 | /* fifo mode - check ammount of data in fifo registers... */ | ||
1110 | |||
1111 | ufstat = rd_regl(port, S3C2410_UFSTAT); | ||
1112 | return (ufstat & info->tx_fifofull) ? 0 : 1; | ||
1113 | } | ||
1114 | |||
1115 | /* in non-fifo mode, we go and use the tx buffer empty */ | ||
1116 | |||
1117 | utrstat = rd_regl(port, S3C2410_UTRSTAT); | ||
1118 | return (utrstat & S3C2410_UTRSTAT_TXE) ? 1 : 0; | ||
1119 | } | ||
1120 | |||
1121 | static void | ||
1122 | s3c24xx_serial_console_putchar(struct uart_port *port, int ch) | ||
1123 | { | ||
1124 | unsigned int ufcon = rd_regl(cons_uart, S3C2410_UFCON); | ||
1125 | while (!s3c24xx_serial_console_txrdy(port, ufcon)) | ||
1126 | barrier(); | ||
1127 | wr_regb(cons_uart, S3C2410_UTXH, ch); | ||
1128 | } | ||
1129 | |||
1130 | static void | ||
1131 | s3c24xx_serial_console_write(struct console *co, const char *s, | ||
1132 | unsigned int count) | ||
1133 | { | ||
1134 | uart_console_write(cons_uart, s, count, s3c24xx_serial_console_putchar); | ||
1135 | } | ||
1136 | |||
1137 | static void __init | ||
1138 | s3c24xx_serial_get_options(struct uart_port *port, int *baud, | ||
1139 | int *parity, int *bits) | ||
1140 | { | ||
1141 | struct s3c24xx_uart_clksrc clksrc; | ||
1142 | struct clk *clk; | ||
1143 | unsigned int ulcon; | ||
1144 | unsigned int ucon; | ||
1145 | unsigned int ubrdiv; | ||
1146 | unsigned long rate; | ||
1147 | |||
1148 | ulcon = rd_regl(port, S3C2410_ULCON); | ||
1149 | ucon = rd_regl(port, S3C2410_UCON); | ||
1150 | ubrdiv = rd_regl(port, S3C2410_UBRDIV); | ||
1151 | |||
1152 | dbg("s3c24xx_serial_get_options: port=%p\n" | ||
1153 | "registers: ulcon=%08x, ucon=%08x, ubdriv=%08x\n", | ||
1154 | port, ulcon, ucon, ubrdiv); | ||
1155 | |||
1156 | if ((ucon & 0xf) != 0) { | ||
1157 | /* consider the serial port configured if the tx/rx mode set */ | ||
1158 | |||
1159 | switch (ulcon & S3C2410_LCON_CSMASK) { | ||
1160 | case S3C2410_LCON_CS5: | ||
1161 | *bits = 5; | ||
1162 | break; | ||
1163 | case S3C2410_LCON_CS6: | ||
1164 | *bits = 6; | ||
1165 | break; | ||
1166 | case S3C2410_LCON_CS7: | ||
1167 | *bits = 7; | ||
1168 | break; | ||
1169 | default: | ||
1170 | case S3C2410_LCON_CS8: | ||
1171 | *bits = 8; | ||
1172 | break; | ||
1173 | } | ||
1174 | |||
1175 | switch (ulcon & S3C2410_LCON_PMASK) { | ||
1176 | case S3C2410_LCON_PEVEN: | ||
1177 | *parity = 'e'; | ||
1178 | break; | ||
1179 | |||
1180 | case S3C2410_LCON_PODD: | ||
1181 | *parity = 'o'; | ||
1182 | break; | ||
1183 | |||
1184 | case S3C2410_LCON_PNONE: | ||
1185 | default: | ||
1186 | *parity = 'n'; | ||
1187 | } | ||
1188 | |||
1189 | /* now calculate the baud rate */ | ||
1190 | |||
1191 | s3c24xx_serial_getsource(port, &clksrc); | ||
1192 | |||
1193 | clk = clk_get(port->dev, clksrc.name); | ||
1194 | if (!IS_ERR(clk) && clk != NULL) | ||
1195 | rate = clk_get_rate(clk) / clksrc.divisor; | ||
1196 | else | ||
1197 | rate = 1; | ||
1198 | |||
1199 | |||
1200 | *baud = rate / (16 * (ubrdiv + 1)); | ||
1201 | dbg("calculated baud %d\n", *baud); | ||
1202 | } | ||
1203 | |||
1204 | } | ||
1205 | |||
1206 | /* s3c24xx_serial_init_ports | ||
1207 | * | ||
1208 | * initialise the serial ports from the machine provided initialisation | ||
1209 | * data. | ||
1210 | */ | ||
1211 | |||
1212 | static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info) | ||
1213 | { | ||
1214 | struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports; | ||
1215 | struct platform_device **platdev_ptr; | ||
1216 | int i; | ||
1217 | |||
1218 | dbg("s3c24xx_serial_init_ports: initialising ports...\n"); | ||
1219 | |||
1220 | platdev_ptr = s3c24xx_uart_devs; | ||
1221 | |||
1222 | for (i = 0; i < NR_PORTS; i++, ptr++, platdev_ptr++) { | ||
1223 | s3c24xx_serial_init_port(ptr, info, *platdev_ptr); | ||
1224 | } | ||
1225 | |||
1226 | return 0; | ||
1227 | } | ||
1228 | |||
1229 | static int __init | ||
1230 | s3c24xx_serial_console_setup(struct console *co, char *options) | ||
1231 | { | ||
1232 | struct uart_port *port; | ||
1233 | int baud = 9600; | ||
1234 | int bits = 8; | ||
1235 | int parity = 'n'; | ||
1236 | int flow = 'n'; | ||
1237 | |||
1238 | dbg("s3c24xx_serial_console_setup: co=%p (%d), %s\n", | ||
1239 | co, co->index, options); | ||
1240 | |||
1241 | /* is this a valid port */ | ||
1242 | |||
1243 | if (co->index == -1 || co->index >= NR_PORTS) | ||
1244 | co->index = 0; | ||
1245 | |||
1246 | port = &s3c24xx_serial_ports[co->index].port; | ||
1247 | |||
1248 | /* is the port configured? */ | ||
1249 | |||
1250 | if (port->mapbase == 0x0) { | ||
1251 | co->index = 0; | ||
1252 | port = &s3c24xx_serial_ports[co->index].port; | ||
1253 | } | ||
1254 | |||
1255 | cons_uart = port; | ||
1256 | |||
1257 | dbg("s3c24xx_serial_console_setup: port=%p (%d)\n", port, co->index); | ||
1258 | |||
1259 | /* | ||
1260 | * Check whether an invalid uart number has been specified, and | ||
1261 | * if so, search for the first available port that does have | ||
1262 | * console support. | ||
1263 | */ | ||
1264 | if (options) | ||
1265 | uart_parse_options(options, &baud, &parity, &bits, &flow); | ||
1266 | else | ||
1267 | s3c24xx_serial_get_options(port, &baud, &parity, &bits); | ||
1268 | |||
1269 | dbg("s3c24xx_serial_console_setup: baud %d\n", baud); | ||
1270 | |||
1271 | return uart_set_options(port, co, baud, parity, bits, flow); | ||
1272 | } | ||
1273 | |||
1274 | /* s3c24xx_serial_initconsole | ||
1275 | * | ||
1276 | * initialise the console from one of the uart drivers | ||
1277 | */ | ||
1278 | |||
1279 | static struct console s3c24xx_serial_console = { | ||
1280 | .name = S3C24XX_SERIAL_NAME, | ||
1281 | .device = uart_console_device, | ||
1282 | .flags = CON_PRINTBUFFER, | ||
1283 | .index = -1, | ||
1284 | .write = s3c24xx_serial_console_write, | ||
1285 | .setup = s3c24xx_serial_console_setup | ||
1286 | }; | ||
1287 | |||
1288 | int s3c24xx_serial_initconsole(struct platform_driver *drv, | ||
1289 | struct s3c24xx_uart_info *info) | ||
1290 | |||
1291 | { | ||
1292 | struct platform_device *dev = s3c24xx_uart_devs[0]; | ||
1293 | |||
1294 | dbg("s3c24xx_serial_initconsole\n"); | ||
1295 | |||
1296 | /* select driver based on the cpu */ | ||
1297 | |||
1298 | if (dev == NULL) { | ||
1299 | printk(KERN_ERR "s3c24xx: no devices for console init\n"); | ||
1300 | return 0; | ||
1301 | } | ||
1302 | |||
1303 | if (strcmp(dev->name, drv->driver.name) != 0) | ||
1304 | return 0; | ||
1305 | |||
1306 | s3c24xx_serial_console.data = &s3c24xx_uart_drv; | ||
1307 | s3c24xx_serial_init_ports(info); | ||
1308 | |||
1309 | register_console(&s3c24xx_serial_console); | ||
1310 | return 0; | ||
1311 | } | ||
1312 | |||
1313 | #endif /* CONFIG_SERIAL_SAMSUNG_CONSOLE */ | ||
1314 | |||
1315 | MODULE_DESCRIPTION("Samsung SoC Serial port driver"); | ||
1316 | MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>"); | ||
1317 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/serial/samsung.h b/drivers/serial/samsung.h new file mode 100644 index 000000000000..5c92ebbe7d9e --- /dev/null +++ b/drivers/serial/samsung.h | |||
@@ -0,0 +1,102 @@ | |||
1 | /* linux/drivers/serial/samsung.h | ||
2 | * | ||
3 | * Driver for Samsung SoC onboard UARTs. | ||
4 | * | ||
5 | * Ben Dooks, Copyright (c) 2003-2005,2008 Simtec Electronics | ||
6 | * http://armlinux.simtec.co.uk/ | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | struct s3c24xx_uart_info { | ||
14 | char *name; | ||
15 | unsigned int type; | ||
16 | unsigned int fifosize; | ||
17 | unsigned long rx_fifomask; | ||
18 | unsigned long rx_fifoshift; | ||
19 | unsigned long rx_fifofull; | ||
20 | unsigned long tx_fifomask; | ||
21 | unsigned long tx_fifoshift; | ||
22 | unsigned long tx_fifofull; | ||
23 | |||
24 | /* clock source control */ | ||
25 | |||
26 | int (*get_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); | ||
27 | int (*set_clksrc)(struct uart_port *, struct s3c24xx_uart_clksrc *clk); | ||
28 | |||
29 | /* uart controls */ | ||
30 | int (*reset_port)(struct uart_port *, struct s3c2410_uartcfg *); | ||
31 | }; | ||
32 | |||
33 | struct s3c24xx_uart_port { | ||
34 | unsigned char rx_claimed; | ||
35 | unsigned char tx_claimed; | ||
36 | |||
37 | struct s3c24xx_uart_info *info; | ||
38 | struct s3c24xx_uart_clksrc *clksrc; | ||
39 | struct clk *clk; | ||
40 | struct clk *baudclk; | ||
41 | struct uart_port port; | ||
42 | }; | ||
43 | |||
44 | /* conversion functions */ | ||
45 | |||
46 | #define s3c24xx_dev_to_port(__dev) (struct uart_port *)dev_get_drvdata(__dev) | ||
47 | #define s3c24xx_dev_to_cfg(__dev) (struct s3c2410_uartcfg *)((__dev)->platform_data) | ||
48 | |||
49 | /* register access controls */ | ||
50 | |||
51 | #define portaddr(port, reg) ((port)->membase + (reg)) | ||
52 | |||
53 | #define rd_regb(port, reg) (__raw_readb(portaddr(port, reg))) | ||
54 | #define rd_regl(port, reg) (__raw_readl(portaddr(port, reg))) | ||
55 | |||
56 | #define wr_regb(port, reg, val) __raw_writeb(val, portaddr(port, reg)) | ||
57 | #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) | ||
58 | |||
59 | extern int s3c24xx_serial_probe(struct platform_device *dev, | ||
60 | struct s3c24xx_uart_info *uart); | ||
61 | |||
62 | extern int s3c24xx_serial_remove(struct platform_device *dev); | ||
63 | |||
64 | extern int s3c24xx_serial_initconsole(struct platform_driver *drv, | ||
65 | struct s3c24xx_uart_info *uart); | ||
66 | |||
67 | extern int s3c24xx_serial_init(struct platform_driver *drv, | ||
68 | struct s3c24xx_uart_info *info); | ||
69 | |||
70 | #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE | ||
71 | |||
72 | #define s3c24xx_console_init(__drv, __inf) \ | ||
73 | static int __init s3c_serial_console_init(void) \ | ||
74 | { \ | ||
75 | return s3c24xx_serial_initconsole(__drv, __inf); \ | ||
76 | } \ | ||
77 | \ | ||
78 | console_initcall(s3c_serial_console_init) | ||
79 | |||
80 | #else | ||
81 | #define s3c24xx_console_init(drv, inf) extern void no_console(void) | ||
82 | #endif | ||
83 | |||
84 | #ifdef CONFIG_SERIAL_SAMSUNG_DEBUG | ||
85 | |||
86 | extern void printascii(const char *); | ||
87 | |||
88 | static void dbg(const char *fmt, ...) | ||
89 | { | ||
90 | va_list va; | ||
91 | char buff[256]; | ||
92 | |||
93 | va_start(va, fmt); | ||
94 | vsprintf(buff, fmt, va); | ||
95 | va_end(va); | ||
96 | |||
97 | printascii(buff); | ||
98 | } | ||
99 | |||
100 | #else | ||
101 | #define dbg(x...) do { } while (0) | ||
102 | #endif | ||
diff --git a/drivers/spi/spi_imx.c b/drivers/spi/spi_imx.c index c730d05bfeb6..547e30298278 100644 --- a/drivers/spi/spi_imx.c +++ b/drivers/spi/spi_imx.c | |||
@@ -1526,24 +1526,24 @@ static int __init spi_imx_probe(struct platform_device *pdev) | |||
1526 | drv_data->rx_channel = -1; | 1526 | drv_data->rx_channel = -1; |
1527 | if (platform_info->enable_dma) { | 1527 | if (platform_info->enable_dma) { |
1528 | /* Get rx DMA channel */ | 1528 | /* Get rx DMA channel */ |
1529 | status = imx_dma_request_by_prio(&drv_data->rx_channel, | 1529 | drv_data->rx_channel = imx_dma_request_by_prio("spi_imx_rx", |
1530 | "spi_imx_rx", DMA_PRIO_HIGH); | 1530 | DMA_PRIO_HIGH); |
1531 | if (status < 0) { | 1531 | if (drv_data->rx_channel < 0) { |
1532 | dev_err(dev, | 1532 | dev_err(dev, |
1533 | "probe - problem (%d) requesting rx channel\n", | 1533 | "probe - problem (%d) requesting rx channel\n", |
1534 | status); | 1534 | drv_data->rx_channel); |
1535 | goto err_no_rxdma; | 1535 | goto err_no_rxdma; |
1536 | } else | 1536 | } else |
1537 | imx_dma_setup_handlers(drv_data->rx_channel, NULL, | 1537 | imx_dma_setup_handlers(drv_data->rx_channel, NULL, |
1538 | dma_err_handler, drv_data); | 1538 | dma_err_handler, drv_data); |
1539 | 1539 | ||
1540 | /* Get tx DMA channel */ | 1540 | /* Get tx DMA channel */ |
1541 | status = imx_dma_request_by_prio(&drv_data->tx_channel, | 1541 | drv_data->tx_channel = imx_dma_request_by_prio("spi_imx_tx", |
1542 | "spi_imx_tx", DMA_PRIO_MEDIUM); | 1542 | DMA_PRIO_MEDIUM); |
1543 | if (status < 0) { | 1543 | if (drv_data->tx_channel < 0) { |
1544 | dev_err(dev, | 1544 | dev_err(dev, |
1545 | "probe - problem (%d) requesting tx channel\n", | 1545 | "probe - problem (%d) requesting tx channel\n", |
1546 | status); | 1546 | drv_data->tx_channel); |
1547 | imx_dma_free(drv_data->rx_channel); | 1547 | imx_dma_free(drv_data->rx_channel); |
1548 | goto err_no_txdma; | 1548 | goto err_no_txdma; |
1549 | } else | 1549 | } else |
diff --git a/drivers/thermal/Kconfig b/drivers/thermal/Kconfig index 4b628526df09..a86e952ed4ca 100644 --- a/drivers/thermal/Kconfig +++ b/drivers/thermal/Kconfig | |||
@@ -12,3 +12,12 @@ menuconfig THERMAL | |||
12 | cooling devices. | 12 | cooling devices. |
13 | All platforms with ACPI thermal support can use this driver. | 13 | All platforms with ACPI thermal support can use this driver. |
14 | If you want this support, you should say Y or M here. | 14 | If you want this support, you should say Y or M here. |
15 | |||
16 | config THERMAL_HWMON | ||
17 | bool "Hardware monitoring support" | ||
18 | depends on HWMON=y || HWMON=THERMAL | ||
19 | help | ||
20 | The generic thermal sysfs driver's hardware monitoring support | ||
21 | requires a 2.10.7/3.0.2 or later lm-sensors userspace. | ||
22 | |||
23 | Say Y if your user-space is new enough. | ||
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c index 6098787341f3..fe07462d5947 100644 --- a/drivers/thermal/thermal_sys.c +++ b/drivers/thermal/thermal_sys.c | |||
@@ -295,8 +295,8 @@ thermal_cooling_device_trip_point_show(struct device *dev, | |||
295 | 295 | ||
296 | /* Device management */ | 296 | /* Device management */ |
297 | 297 | ||
298 | #if defined(CONFIG_HWMON) || \ | 298 | #if defined(CONFIG_THERMAL_HWMON) |
299 | (defined(CONFIG_HWMON_MODULE) && defined(CONFIG_THERMAL_MODULE)) | 299 | |
300 | /* hwmon sys I/F */ | 300 | /* hwmon sys I/F */ |
301 | #include <linux/hwmon.h> | 301 | #include <linux/hwmon.h> |
302 | static LIST_HEAD(thermal_hwmon_list); | 302 | static LIST_HEAD(thermal_hwmon_list); |
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig index 6e784d2db423..3565d4352826 100644 --- a/drivers/usb/gadget/Kconfig +++ b/drivers/usb/gadget/Kconfig | |||
@@ -118,10 +118,10 @@ config USB_AMD5536UDC | |||
118 | config USB_GADGET_ATMEL_USBA | 118 | config USB_GADGET_ATMEL_USBA |
119 | boolean "Atmel USBA" | 119 | boolean "Atmel USBA" |
120 | select USB_GADGET_DUALSPEED | 120 | select USB_GADGET_DUALSPEED |
121 | depends on AVR32 || ARCH_AT91CAP9 | 121 | depends on AVR32 || ARCH_AT91CAP9 || ARCH_AT91SAM9RL |
122 | help | 122 | help |
123 | USBA is the integrated high-speed USB Device controller on | 123 | USBA is the integrated high-speed USB Device controller on |
124 | the AT32AP700x and AT91CAP9 processors from Atmel. | 124 | the AT32AP700x, some AT91SAM9 and AT91CAP9 processors from Atmel. |
125 | 125 | ||
126 | config USB_ATMEL_USBA | 126 | config USB_ATMEL_USBA |
127 | tristate | 127 | tristate |
diff --git a/drivers/usb/gadget/at91_udc.c b/drivers/usb/gadget/at91_udc.c index 274c60a970cd..b6b2a0a5ba37 100644 --- a/drivers/usb/gadget/at91_udc.c +++ b/drivers/usb/gadget/at91_udc.c | |||
@@ -888,7 +888,7 @@ static void pullup(struct at91_udc *udc, int is_on) | |||
888 | at91_udp_write(udc, AT91_UDP_TXVC, 0); | 888 | at91_udp_write(udc, AT91_UDP_TXVC, 0); |
889 | if (cpu_is_at91rm9200()) | 889 | if (cpu_is_at91rm9200()) |
890 | gpio_set_value(udc->board.pullup_pin, active); | 890 | gpio_set_value(udc->board.pullup_pin, active); |
891 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263()) { | 891 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { |
892 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); | 892 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
893 | 893 | ||
894 | txvc |= AT91_UDP_TXVC_PUON; | 894 | txvc |= AT91_UDP_TXVC_PUON; |
@@ -906,7 +906,7 @@ static void pullup(struct at91_udc *udc, int is_on) | |||
906 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); | 906 | at91_udp_write(udc, AT91_UDP_TXVC, AT91_UDP_TXVC_TXVDIS); |
907 | if (cpu_is_at91rm9200()) | 907 | if (cpu_is_at91rm9200()) |
908 | gpio_set_value(udc->board.pullup_pin, !active); | 908 | gpio_set_value(udc->board.pullup_pin, !active); |
909 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263()) { | 909 | else if (cpu_is_at91sam9260() || cpu_is_at91sam9263() || cpu_is_at91sam9g20()) { |
910 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); | 910 | u32 txvc = at91_udp_read(udc, AT91_UDP_TXVC); |
911 | 911 | ||
912 | txvc &= ~AT91_UDP_TXVC_PUON; | 912 | txvc &= ~AT91_UDP_TXVC_PUON; |
diff --git a/drivers/usb/gadget/omap_udc.c b/drivers/usb/gadget/omap_udc.c index 881d74c3d964..03a7f49d207d 100644 --- a/drivers/usb/gadget/omap_udc.c +++ b/drivers/usb/gadget/omap_udc.c | |||
@@ -135,13 +135,17 @@ static void use_ep(struct omap_ep *ep, u16 select) | |||
135 | 135 | ||
136 | if (ep->bEndpointAddress & USB_DIR_IN) | 136 | if (ep->bEndpointAddress & USB_DIR_IN) |
137 | num |= UDC_EP_DIR; | 137 | num |= UDC_EP_DIR; |
138 | UDC_EP_NUM_REG = num | select; | 138 | omap_writew(num | select, UDC_EP_NUM); |
139 | /* when select, MUST deselect later !! */ | 139 | /* when select, MUST deselect later !! */ |
140 | } | 140 | } |
141 | 141 | ||
142 | static inline void deselect_ep(void) | 142 | static inline void deselect_ep(void) |
143 | { | 143 | { |
144 | UDC_EP_NUM_REG &= ~UDC_EP_SEL; | 144 | u16 w; |
145 | |||
146 | w = omap_readw(UDC_EP_NUM); | ||
147 | w &= ~UDC_EP_SEL; | ||
148 | omap_writew(w, UDC_EP_NUM); | ||
145 | /* 6 wait states before TX will happen */ | 149 | /* 6 wait states before TX will happen */ |
146 | } | 150 | } |
147 | 151 | ||
@@ -216,7 +220,7 @@ static int omap_ep_enable(struct usb_ep *_ep, | |||
216 | ep->has_dma = 0; | 220 | ep->has_dma = 0; |
217 | ep->lch = -1; | 221 | ep->lch = -1; |
218 | use_ep(ep, UDC_EP_SEL); | 222 | use_ep(ep, UDC_EP_SEL); |
219 | UDC_CTRL_REG = udc->clr_halt; | 223 | omap_writew(udc->clr_halt, UDC_CTRL); |
220 | ep->ackwait = 0; | 224 | ep->ackwait = 0; |
221 | deselect_ep(); | 225 | deselect_ep(); |
222 | 226 | ||
@@ -232,7 +236,7 @@ static int omap_ep_enable(struct usb_ep *_ep, | |||
232 | if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC | 236 | if (desc->bmAttributes != USB_ENDPOINT_XFER_ISOC |
233 | && !ep->has_dma | 237 | && !ep->has_dma |
234 | && !(ep->bEndpointAddress & USB_DIR_IN)) { | 238 | && !(ep->bEndpointAddress & USB_DIR_IN)) { |
235 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 239 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
236 | ep->ackwait = 1 + ep->double_buf; | 240 | ep->ackwait = 1 + ep->double_buf; |
237 | } | 241 | } |
238 | 242 | ||
@@ -259,7 +263,7 @@ static int omap_ep_disable(struct usb_ep *_ep) | |||
259 | nuke (ep, -ESHUTDOWN); | 263 | nuke (ep, -ESHUTDOWN); |
260 | ep->ep.maxpacket = ep->maxpacket; | 264 | ep->ep.maxpacket = ep->maxpacket; |
261 | ep->has_dma = 0; | 265 | ep->has_dma = 0; |
262 | UDC_CTRL_REG = UDC_SET_HALT; | 266 | omap_writew(UDC_SET_HALT, UDC_CTRL); |
263 | list_del_init(&ep->iso); | 267 | list_del_init(&ep->iso); |
264 | del_timer(&ep->timer); | 268 | del_timer(&ep->timer); |
265 | 269 | ||
@@ -360,13 +364,13 @@ write_packet(u8 *buf, struct omap_req *req, unsigned max) | |||
360 | if (likely((((int)buf) & 1) == 0)) { | 364 | if (likely((((int)buf) & 1) == 0)) { |
361 | wp = (u16 *)buf; | 365 | wp = (u16 *)buf; |
362 | while (max >= 2) { | 366 | while (max >= 2) { |
363 | UDC_DATA_REG = *wp++; | 367 | omap_writew(*wp++, UDC_DATA); |
364 | max -= 2; | 368 | max -= 2; |
365 | } | 369 | } |
366 | buf = (u8 *)wp; | 370 | buf = (u8 *)wp; |
367 | } | 371 | } |
368 | while (max--) | 372 | while (max--) |
369 | *(volatile u8 *)&UDC_DATA_REG = *buf++; | 373 | omap_writeb(*buf++, UDC_DATA); |
370 | return len; | 374 | return len; |
371 | } | 375 | } |
372 | 376 | ||
@@ -385,13 +389,13 @@ static int write_fifo(struct omap_ep *ep, struct omap_req *req) | |||
385 | prefetch(buf); | 389 | prefetch(buf); |
386 | 390 | ||
387 | /* PIO-IN isn't double buffered except for iso */ | 391 | /* PIO-IN isn't double buffered except for iso */ |
388 | ep_stat = UDC_STAT_FLG_REG; | 392 | ep_stat = omap_readw(UDC_STAT_FLG); |
389 | if (ep_stat & UDC_FIFO_UNWRITABLE) | 393 | if (ep_stat & UDC_FIFO_UNWRITABLE) |
390 | return 0; | 394 | return 0; |
391 | 395 | ||
392 | count = ep->ep.maxpacket; | 396 | count = ep->ep.maxpacket; |
393 | count = write_packet(buf, req, count); | 397 | count = write_packet(buf, req, count); |
394 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 398 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
395 | ep->ackwait = 1; | 399 | ep->ackwait = 1; |
396 | 400 | ||
397 | /* last packet is often short (sometimes a zlp) */ | 401 | /* last packet is often short (sometimes a zlp) */ |
@@ -425,13 +429,13 @@ read_packet(u8 *buf, struct omap_req *req, unsigned avail) | |||
425 | if (likely((((int)buf) & 1) == 0)) { | 429 | if (likely((((int)buf) & 1) == 0)) { |
426 | wp = (u16 *)buf; | 430 | wp = (u16 *)buf; |
427 | while (avail >= 2) { | 431 | while (avail >= 2) { |
428 | *wp++ = UDC_DATA_REG; | 432 | *wp++ = omap_readw(UDC_DATA); |
429 | avail -= 2; | 433 | avail -= 2; |
430 | } | 434 | } |
431 | buf = (u8 *)wp; | 435 | buf = (u8 *)wp; |
432 | } | 436 | } |
433 | while (avail--) | 437 | while (avail--) |
434 | *buf++ = *(volatile u8 *)&UDC_DATA_REG; | 438 | *buf++ = omap_readb(UDC_DATA); |
435 | return len; | 439 | return len; |
436 | } | 440 | } |
437 | 441 | ||
@@ -446,7 +450,7 @@ static int read_fifo(struct omap_ep *ep, struct omap_req *req) | |||
446 | prefetchw(buf); | 450 | prefetchw(buf); |
447 | 451 | ||
448 | for (;;) { | 452 | for (;;) { |
449 | u16 ep_stat = UDC_STAT_FLG_REG; | 453 | u16 ep_stat = omap_readw(UDC_STAT_FLG); |
450 | 454 | ||
451 | is_last = 0; | 455 | is_last = 0; |
452 | if (ep_stat & FIFO_EMPTY) { | 456 | if (ep_stat & FIFO_EMPTY) { |
@@ -460,7 +464,7 @@ static int read_fifo(struct omap_ep *ep, struct omap_req *req) | |||
460 | if (ep_stat & UDC_FIFO_FULL) | 464 | if (ep_stat & UDC_FIFO_FULL) |
461 | avail = ep->ep.maxpacket; | 465 | avail = ep->ep.maxpacket; |
462 | else { | 466 | else { |
463 | avail = UDC_RXFSTAT_REG; | 467 | avail = omap_readw(UDC_RXFSTAT); |
464 | ep->fnf = ep->double_buf; | 468 | ep->fnf = ep->double_buf; |
465 | } | 469 | } |
466 | count = read_packet(buf, req, avail); | 470 | count = read_packet(buf, req, avail); |
@@ -473,7 +477,7 @@ static int read_fifo(struct omap_ep *ep, struct omap_req *req) | |||
473 | req->req.status = -EOVERFLOW; | 477 | req->req.status = -EOVERFLOW; |
474 | avail -= count; | 478 | avail -= count; |
475 | while (avail--) | 479 | while (avail--) |
476 | (void) *(volatile u8 *)&UDC_DATA_REG; | 480 | omap_readw(UDC_DATA); |
477 | } | 481 | } |
478 | } else if (req->req.length == req->req.actual) | 482 | } else if (req->req.length == req->req.actual) |
479 | is_last = 1; | 483 | is_last = 1; |
@@ -491,32 +495,6 @@ static int read_fifo(struct omap_ep *ep, struct omap_req *req) | |||
491 | 495 | ||
492 | /*-------------------------------------------------------------------------*/ | 496 | /*-------------------------------------------------------------------------*/ |
493 | 497 | ||
494 | static inline dma_addr_t dma_csac(unsigned lch) | ||
495 | { | ||
496 | dma_addr_t csac; | ||
497 | |||
498 | /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is | ||
499 | * read before the DMA controller finished disabling the channel. | ||
500 | */ | ||
501 | csac = OMAP_DMA_CSAC_REG(lch); | ||
502 | if (csac == 0) | ||
503 | csac = OMAP_DMA_CSAC_REG(lch); | ||
504 | return csac; | ||
505 | } | ||
506 | |||
507 | static inline dma_addr_t dma_cdac(unsigned lch) | ||
508 | { | ||
509 | dma_addr_t cdac; | ||
510 | |||
511 | /* omap 3.2/3.3 erratum: sometimes 0 is returned if CSAC/CDAC is | ||
512 | * read before the DMA controller finished disabling the channel. | ||
513 | */ | ||
514 | cdac = OMAP_DMA_CDAC_REG(lch); | ||
515 | if (cdac == 0) | ||
516 | cdac = OMAP_DMA_CDAC_REG(lch); | ||
517 | return cdac; | ||
518 | } | ||
519 | |||
520 | static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start) | 498 | static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start) |
521 | { | 499 | { |
522 | dma_addr_t end; | 500 | dma_addr_t end; |
@@ -527,7 +505,7 @@ static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start) | |||
527 | if (cpu_is_omap15xx()) | 505 | if (cpu_is_omap15xx()) |
528 | return 0; | 506 | return 0; |
529 | 507 | ||
530 | end = dma_csac(ep->lch); | 508 | end = omap_get_dma_src_pos(ep->lch); |
531 | if (end == ep->dma_counter) | 509 | if (end == ep->dma_counter) |
532 | return 0; | 510 | return 0; |
533 | 511 | ||
@@ -537,15 +515,11 @@ static u16 dma_src_len(struct omap_ep *ep, dma_addr_t start) | |||
537 | return end - start; | 515 | return end - start; |
538 | } | 516 | } |
539 | 517 | ||
540 | #define DMA_DEST_LAST(x) (cpu_is_omap15xx() \ | ||
541 | ? OMAP_DMA_CSAC_REG(x) /* really: CPC */ \ | ||
542 | : dma_cdac(x)) | ||
543 | |||
544 | static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start) | 518 | static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start) |
545 | { | 519 | { |
546 | dma_addr_t end; | 520 | dma_addr_t end; |
547 | 521 | ||
548 | end = DMA_DEST_LAST(ep->lch); | 522 | end = omap_get_dma_dst_pos(ep->lch); |
549 | if (end == ep->dma_counter) | 523 | if (end == ep->dma_counter) |
550 | return 0; | 524 | return 0; |
551 | 525 | ||
@@ -565,7 +539,7 @@ static u16 dma_dest_len(struct omap_ep *ep, dma_addr_t start) | |||
565 | 539 | ||
566 | static void next_in_dma(struct omap_ep *ep, struct omap_req *req) | 540 | static void next_in_dma(struct omap_ep *ep, struct omap_req *req) |
567 | { | 541 | { |
568 | u16 txdma_ctrl; | 542 | u16 txdma_ctrl, w; |
569 | unsigned length = req->req.length - req->req.actual; | 543 | unsigned length = req->req.length - req->req.actual; |
570 | const int sync_mode = cpu_is_omap15xx() | 544 | const int sync_mode = cpu_is_omap15xx() |
571 | ? OMAP_DMA_SYNC_FRAME | 545 | ? OMAP_DMA_SYNC_FRAME |
@@ -596,14 +570,18 @@ static void next_in_dma(struct omap_ep *ep, struct omap_req *req) | |||
596 | 0, 0); | 570 | 0, 0); |
597 | 571 | ||
598 | omap_start_dma(ep->lch); | 572 | omap_start_dma(ep->lch); |
599 | ep->dma_counter = dma_csac(ep->lch); | 573 | ep->dma_counter = omap_get_dma_src_pos(ep->lch); |
600 | UDC_DMA_IRQ_EN_REG |= UDC_TX_DONE_IE(ep->dma_channel); | 574 | w = omap_readw(UDC_DMA_IRQ_EN); |
601 | UDC_TXDMA_REG(ep->dma_channel) = UDC_TXN_START | txdma_ctrl; | 575 | w |= UDC_TX_DONE_IE(ep->dma_channel); |
576 | omap_writew(w, UDC_DMA_IRQ_EN); | ||
577 | omap_writew(UDC_TXN_START | txdma_ctrl, UDC_TXDMA(ep->dma_channel)); | ||
602 | req->dma_bytes = length; | 578 | req->dma_bytes = length; |
603 | } | 579 | } |
604 | 580 | ||
605 | static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status) | 581 | static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status) |
606 | { | 582 | { |
583 | u16 w; | ||
584 | |||
607 | if (status == 0) { | 585 | if (status == 0) { |
608 | req->req.actual += req->dma_bytes; | 586 | req->req.actual += req->dma_bytes; |
609 | 587 | ||
@@ -620,7 +598,9 @@ static void finish_in_dma(struct omap_ep *ep, struct omap_req *req, int status) | |||
620 | 598 | ||
621 | /* tx completion */ | 599 | /* tx completion */ |
622 | omap_stop_dma(ep->lch); | 600 | omap_stop_dma(ep->lch); |
623 | UDC_DMA_IRQ_EN_REG &= ~UDC_TX_DONE_IE(ep->dma_channel); | 601 | w = omap_readw(UDC_DMA_IRQ_EN); |
602 | w &= ~UDC_TX_DONE_IE(ep->dma_channel); | ||
603 | omap_writew(w, UDC_DMA_IRQ_EN); | ||
624 | done(ep, req, status); | 604 | done(ep, req, status); |
625 | } | 605 | } |
626 | 606 | ||
@@ -628,6 +608,7 @@ static void next_out_dma(struct omap_ep *ep, struct omap_req *req) | |||
628 | { | 608 | { |
629 | unsigned packets = req->req.length - req->req.actual; | 609 | unsigned packets = req->req.length - req->req.actual; |
630 | int dma_trigger = 0; | 610 | int dma_trigger = 0; |
611 | u16 w; | ||
631 | 612 | ||
632 | if (cpu_is_omap24xx()) | 613 | if (cpu_is_omap24xx()) |
633 | dma_trigger = OMAP24XX_DMA(USB_W2FC_RX0, ep->dma_channel); | 614 | dma_trigger = OMAP24XX_DMA(USB_W2FC_RX0, ep->dma_channel); |
@@ -654,12 +635,14 @@ static void next_out_dma(struct omap_ep *ep, struct omap_req *req) | |||
654 | omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF, | 635 | omap_set_dma_dest_params(ep->lch, OMAP_DMA_PORT_EMIFF, |
655 | OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual, | 636 | OMAP_DMA_AMODE_POST_INC, req->req.dma + req->req.actual, |
656 | 0, 0); | 637 | 0, 0); |
657 | ep->dma_counter = DMA_DEST_LAST(ep->lch); | 638 | ep->dma_counter = omap_get_dma_dst_pos(ep->lch); |
658 | 639 | ||
659 | UDC_RXDMA_REG(ep->dma_channel) = UDC_RXN_STOP | (packets - 1); | 640 | omap_writew(UDC_RXN_STOP | (packets - 1), UDC_RXDMA(ep->dma_channel)); |
660 | UDC_DMA_IRQ_EN_REG |= UDC_RX_EOT_IE(ep->dma_channel); | 641 | w = omap_readw(UDC_DMA_IRQ_EN); |
661 | UDC_EP_NUM_REG = (ep->bEndpointAddress & 0xf); | 642 | w |= UDC_RX_EOT_IE(ep->dma_channel); |
662 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 643 | omap_writew(w, UDC_DMA_IRQ_EN); |
644 | omap_writew(ep->bEndpointAddress & 0xf, UDC_EP_NUM); | ||
645 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); | ||
663 | 646 | ||
664 | omap_start_dma(ep->lch); | 647 | omap_start_dma(ep->lch); |
665 | } | 648 | } |
@@ -667,7 +650,7 @@ static void next_out_dma(struct omap_ep *ep, struct omap_req *req) | |||
667 | static void | 650 | static void |
668 | finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one) | 651 | finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one) |
669 | { | 652 | { |
670 | u16 count; | 653 | u16 count, w; |
671 | 654 | ||
672 | if (status == 0) | 655 | if (status == 0) |
673 | ep->dma_counter = (u16) (req->req.dma + req->req.actual); | 656 | ep->dma_counter = (u16) (req->req.dma + req->req.actual); |
@@ -686,13 +669,15 @@ finish_out_dma(struct omap_ep *ep, struct omap_req *req, int status, int one) | |||
686 | return; | 669 | return; |
687 | 670 | ||
688 | /* rx completion */ | 671 | /* rx completion */ |
689 | UDC_DMA_IRQ_EN_REG &= ~UDC_RX_EOT_IE(ep->dma_channel); | 672 | w = omap_readw(UDC_DMA_IRQ_EN); |
673 | w &= ~UDC_RX_EOT_IE(ep->dma_channel); | ||
674 | omap_writew(w, UDC_DMA_IRQ_EN); | ||
690 | done(ep, req, status); | 675 | done(ep, req, status); |
691 | } | 676 | } |
692 | 677 | ||
693 | static void dma_irq(struct omap_udc *udc, u16 irq_src) | 678 | static void dma_irq(struct omap_udc *udc, u16 irq_src) |
694 | { | 679 | { |
695 | u16 dman_stat = UDC_DMAN_STAT_REG; | 680 | u16 dman_stat = omap_readw(UDC_DMAN_STAT); |
696 | struct omap_ep *ep; | 681 | struct omap_ep *ep; |
697 | struct omap_req *req; | 682 | struct omap_req *req; |
698 | 683 | ||
@@ -706,7 +691,7 @@ static void dma_irq(struct omap_udc *udc, u16 irq_src) | |||
706 | struct omap_req, queue); | 691 | struct omap_req, queue); |
707 | finish_in_dma(ep, req, 0); | 692 | finish_in_dma(ep, req, 0); |
708 | } | 693 | } |
709 | UDC_IRQ_SRC_REG = UDC_TXN_DONE; | 694 | omap_writew(UDC_TXN_DONE, UDC_IRQ_SRC); |
710 | 695 | ||
711 | if (!list_empty (&ep->queue)) { | 696 | if (!list_empty (&ep->queue)) { |
712 | req = container_of(ep->queue.next, | 697 | req = container_of(ep->queue.next, |
@@ -725,7 +710,7 @@ static void dma_irq(struct omap_udc *udc, u16 irq_src) | |||
725 | struct omap_req, queue); | 710 | struct omap_req, queue); |
726 | finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB); | 711 | finish_out_dma(ep, req, 0, dman_stat & UDC_DMA_RX_SB); |
727 | } | 712 | } |
728 | UDC_IRQ_SRC_REG = UDC_RXN_EOT; | 713 | omap_writew(UDC_RXN_EOT, UDC_IRQ_SRC); |
729 | 714 | ||
730 | if (!list_empty (&ep->queue)) { | 715 | if (!list_empty (&ep->queue)) { |
731 | req = container_of(ep->queue.next, | 716 | req = container_of(ep->queue.next, |
@@ -739,7 +724,7 @@ static void dma_irq(struct omap_udc *udc, u16 irq_src) | |||
739 | ep->irqs++; | 724 | ep->irqs++; |
740 | /* omap15xx does this unasked... */ | 725 | /* omap15xx does this unasked... */ |
741 | VDBG("%s, RX_CNT irq?\n", ep->ep.name); | 726 | VDBG("%s, RX_CNT irq?\n", ep->ep.name); |
742 | UDC_IRQ_SRC_REG = UDC_RXN_CNT; | 727 | omap_writew(UDC_RXN_CNT, UDC_IRQ_SRC); |
743 | } | 728 | } |
744 | } | 729 | } |
745 | 730 | ||
@@ -762,9 +747,9 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel) | |||
762 | 747 | ||
763 | is_in = ep->bEndpointAddress & USB_DIR_IN; | 748 | is_in = ep->bEndpointAddress & USB_DIR_IN; |
764 | if (is_in) | 749 | if (is_in) |
765 | reg = UDC_TXDMA_CFG_REG; | 750 | reg = omap_readw(UDC_TXDMA_CFG); |
766 | else | 751 | else |
767 | reg = UDC_RXDMA_CFG_REG; | 752 | reg = omap_readw(UDC_RXDMA_CFG); |
768 | reg |= UDC_DMA_REQ; /* "pulse" activated */ | 753 | reg |= UDC_DMA_REQ; /* "pulse" activated */ |
769 | 754 | ||
770 | ep->dma_channel = 0; | 755 | ep->dma_channel = 0; |
@@ -792,7 +777,7 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel) | |||
792 | status = omap_request_dma(dma_channel, | 777 | status = omap_request_dma(dma_channel, |
793 | ep->ep.name, dma_error, ep, &ep->lch); | 778 | ep->ep.name, dma_error, ep, &ep->lch); |
794 | if (status == 0) { | 779 | if (status == 0) { |
795 | UDC_TXDMA_CFG_REG = reg; | 780 | omap_writew(reg, UDC_TXDMA_CFG); |
796 | /* EMIFF or SDRC */ | 781 | /* EMIFF or SDRC */ |
797 | omap_set_dma_src_burst_mode(ep->lch, | 782 | omap_set_dma_src_burst_mode(ep->lch, |
798 | OMAP_DMA_DATA_BURST_4); | 783 | OMAP_DMA_DATA_BURST_4); |
@@ -801,7 +786,7 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel) | |||
801 | omap_set_dma_dest_params(ep->lch, | 786 | omap_set_dma_dest_params(ep->lch, |
802 | OMAP_DMA_PORT_TIPB, | 787 | OMAP_DMA_PORT_TIPB, |
803 | OMAP_DMA_AMODE_CONSTANT, | 788 | OMAP_DMA_AMODE_CONSTANT, |
804 | (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG), | 789 | (unsigned long) io_v2p(UDC_DATA_DMA), |
805 | 0, 0); | 790 | 0, 0); |
806 | } | 791 | } |
807 | } else { | 792 | } else { |
@@ -813,12 +798,12 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel) | |||
813 | status = omap_request_dma(dma_channel, | 798 | status = omap_request_dma(dma_channel, |
814 | ep->ep.name, dma_error, ep, &ep->lch); | 799 | ep->ep.name, dma_error, ep, &ep->lch); |
815 | if (status == 0) { | 800 | if (status == 0) { |
816 | UDC_RXDMA_CFG_REG = reg; | 801 | omap_writew(reg, UDC_RXDMA_CFG); |
817 | /* TIPB */ | 802 | /* TIPB */ |
818 | omap_set_dma_src_params(ep->lch, | 803 | omap_set_dma_src_params(ep->lch, |
819 | OMAP_DMA_PORT_TIPB, | 804 | OMAP_DMA_PORT_TIPB, |
820 | OMAP_DMA_AMODE_CONSTANT, | 805 | OMAP_DMA_AMODE_CONSTANT, |
821 | (unsigned long) io_v2p((u32)&UDC_DATA_DMA_REG), | 806 | (unsigned long) io_v2p(UDC_DATA_DMA), |
822 | 0, 0); | 807 | 0, 0); |
823 | /* EMIFF or SDRC */ | 808 | /* EMIFF or SDRC */ |
824 | omap_set_dma_dest_burst_mode(ep->lch, | 809 | omap_set_dma_dest_burst_mode(ep->lch, |
@@ -834,7 +819,7 @@ static void dma_channel_claim(struct omap_ep *ep, unsigned channel) | |||
834 | 819 | ||
835 | /* channel type P: hw synch (fifo) */ | 820 | /* channel type P: hw synch (fifo) */ |
836 | if (cpu_class_is_omap1() && !cpu_is_omap15xx()) | 821 | if (cpu_class_is_omap1() && !cpu_is_omap15xx()) |
837 | OMAP1_DMA_LCH_CTRL_REG(ep->lch) = 2; | 822 | omap_set_dma_channel_mode(ep->lch, OMAP_DMA_LCH_P); |
838 | } | 823 | } |
839 | 824 | ||
840 | just_restart: | 825 | just_restart: |
@@ -860,7 +845,7 @@ just_restart: | |||
860 | (is_in ? write_fifo : read_fifo)(ep, req); | 845 | (is_in ? write_fifo : read_fifo)(ep, req); |
861 | deselect_ep(); | 846 | deselect_ep(); |
862 | if (!is_in) { | 847 | if (!is_in) { |
863 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 848 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
864 | ep->ackwait = 1 + ep->double_buf; | 849 | ep->ackwait = 1 + ep->double_buf; |
865 | } | 850 | } |
866 | /* IN: 6 wait states before it'll tx */ | 851 | /* IN: 6 wait states before it'll tx */ |
@@ -881,7 +866,7 @@ static void dma_channel_release(struct omap_ep *ep) | |||
881 | else | 866 | else |
882 | req = NULL; | 867 | req = NULL; |
883 | 868 | ||
884 | active = ((1 << 7) & OMAP_DMA_CCR_REG(ep->lch)) != 0; | 869 | active = omap_get_dma_active_status(ep->lch); |
885 | 870 | ||
886 | DBG("%s release %s %cxdma%d %p\n", ep->ep.name, | 871 | DBG("%s release %s %cxdma%d %p\n", ep->ep.name, |
887 | active ? "active" : "idle", | 872 | active ? "active" : "idle", |
@@ -894,23 +879,25 @@ static void dma_channel_release(struct omap_ep *ep) | |||
894 | 879 | ||
895 | /* wait till current packet DMA finishes, and fifo empties */ | 880 | /* wait till current packet DMA finishes, and fifo empties */ |
896 | if (ep->bEndpointAddress & USB_DIR_IN) { | 881 | if (ep->bEndpointAddress & USB_DIR_IN) { |
897 | UDC_TXDMA_CFG_REG = (UDC_TXDMA_CFG_REG & ~mask) | UDC_DMA_REQ; | 882 | omap_writew((omap_readw(UDC_TXDMA_CFG) & ~mask) | UDC_DMA_REQ, |
883 | UDC_TXDMA_CFG); | ||
898 | 884 | ||
899 | if (req) { | 885 | if (req) { |
900 | finish_in_dma(ep, req, -ECONNRESET); | 886 | finish_in_dma(ep, req, -ECONNRESET); |
901 | 887 | ||
902 | /* clear FIFO; hosts probably won't empty it */ | 888 | /* clear FIFO; hosts probably won't empty it */ |
903 | use_ep(ep, UDC_EP_SEL); | 889 | use_ep(ep, UDC_EP_SEL); |
904 | UDC_CTRL_REG = UDC_CLR_EP; | 890 | omap_writew(UDC_CLR_EP, UDC_CTRL); |
905 | deselect_ep(); | 891 | deselect_ep(); |
906 | } | 892 | } |
907 | while (UDC_TXDMA_CFG_REG & mask) | 893 | while (omap_readw(UDC_TXDMA_CFG) & mask) |
908 | udelay(10); | 894 | udelay(10); |
909 | } else { | 895 | } else { |
910 | UDC_RXDMA_CFG_REG = (UDC_RXDMA_CFG_REG & ~mask) | UDC_DMA_REQ; | 896 | omap_writew((omap_readw(UDC_RXDMA_CFG) & ~mask) | UDC_DMA_REQ, |
897 | UDC_RXDMA_CFG); | ||
911 | 898 | ||
912 | /* dma empties the fifo */ | 899 | /* dma empties the fifo */ |
913 | while (UDC_RXDMA_CFG_REG & mask) | 900 | while (omap_readw(UDC_RXDMA_CFG) & mask) |
914 | udelay(10); | 901 | udelay(10); |
915 | if (req) | 902 | if (req) |
916 | finish_out_dma(ep, req, -ECONNRESET, 0); | 903 | finish_out_dma(ep, req, -ECONNRESET, 0); |
@@ -997,9 +984,13 @@ omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) | |||
997 | req->req.actual = 0; | 984 | req->req.actual = 0; |
998 | 985 | ||
999 | /* maybe kickstart non-iso i/o queues */ | 986 | /* maybe kickstart non-iso i/o queues */ |
1000 | if (is_iso) | 987 | if (is_iso) { |
1001 | UDC_IRQ_EN_REG |= UDC_SOF_IE; | 988 | u16 w; |
1002 | else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) { | 989 | |
990 | w = omap_readw(UDC_IRQ_EN); | ||
991 | w |= UDC_SOF_IE; | ||
992 | omap_writew(w, UDC_IRQ_EN); | ||
993 | } else if (list_empty(&ep->queue) && !ep->stopped && !ep->ackwait) { | ||
1003 | int is_in; | 994 | int is_in; |
1004 | 995 | ||
1005 | if (ep->bEndpointAddress == 0) { | 996 | if (ep->bEndpointAddress == 0) { |
@@ -1017,23 +1008,23 @@ omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) | |||
1017 | * requests to non-control endpoints | 1008 | * requests to non-control endpoints |
1018 | */ | 1009 | */ |
1019 | if (udc->ep0_set_config) { | 1010 | if (udc->ep0_set_config) { |
1020 | u16 irq_en = UDC_IRQ_EN_REG; | 1011 | u16 irq_en = omap_readw(UDC_IRQ_EN); |
1021 | 1012 | ||
1022 | irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE; | 1013 | irq_en |= UDC_DS_CHG_IE | UDC_EP0_IE; |
1023 | if (!udc->ep0_reset_config) | 1014 | if (!udc->ep0_reset_config) |
1024 | irq_en |= UDC_EPN_RX_IE | 1015 | irq_en |= UDC_EPN_RX_IE |
1025 | | UDC_EPN_TX_IE; | 1016 | | UDC_EPN_TX_IE; |
1026 | UDC_IRQ_EN_REG = irq_en; | 1017 | omap_writew(irq_en, UDC_IRQ_EN); |
1027 | } | 1018 | } |
1028 | 1019 | ||
1029 | /* STATUS for zero length DATA stages is | 1020 | /* STATUS for zero length DATA stages is |
1030 | * always an IN ... even for IN transfers, | 1021 | * always an IN ... even for IN transfers, |
1031 | * a weird case which seem to stall OMAP. | 1022 | * a weird case which seem to stall OMAP. |
1032 | */ | 1023 | */ |
1033 | UDC_EP_NUM_REG = (UDC_EP_SEL|UDC_EP_DIR); | 1024 | omap_writew(UDC_EP_SEL | UDC_EP_DIR, UDC_EP_NUM); |
1034 | UDC_CTRL_REG = UDC_CLR_EP; | 1025 | omap_writew(UDC_CLR_EP, UDC_CTRL); |
1035 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1026 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1036 | UDC_EP_NUM_REG = UDC_EP_DIR; | 1027 | omap_writew(UDC_EP_DIR, UDC_EP_NUM); |
1037 | 1028 | ||
1038 | /* cleanup */ | 1029 | /* cleanup */ |
1039 | udc->ep0_pending = 0; | 1030 | udc->ep0_pending = 0; |
@@ -1042,11 +1033,11 @@ omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) | |||
1042 | 1033 | ||
1043 | /* non-empty DATA stage */ | 1034 | /* non-empty DATA stage */ |
1044 | } else if (is_in) { | 1035 | } else if (is_in) { |
1045 | UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; | 1036 | omap_writew(UDC_EP_SEL | UDC_EP_DIR, UDC_EP_NUM); |
1046 | } else { | 1037 | } else { |
1047 | if (udc->ep0_setup) | 1038 | if (udc->ep0_setup) |
1048 | goto irq_wait; | 1039 | goto irq_wait; |
1049 | UDC_EP_NUM_REG = UDC_EP_SEL; | 1040 | omap_writew(UDC_EP_SEL, UDC_EP_NUM); |
1050 | } | 1041 | } |
1051 | } else { | 1042 | } else { |
1052 | is_in = ep->bEndpointAddress & USB_DIR_IN; | 1043 | is_in = ep->bEndpointAddress & USB_DIR_IN; |
@@ -1062,7 +1053,7 @@ omap_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) | |||
1062 | req = NULL; | 1053 | req = NULL; |
1063 | deselect_ep(); | 1054 | deselect_ep(); |
1064 | if (!is_in) { | 1055 | if (!is_in) { |
1065 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1056 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1066 | ep->ackwait = 1 + ep->double_buf; | 1057 | ep->ackwait = 1 + ep->double_buf; |
1067 | } | 1058 | } |
1068 | /* IN: 6 wait states before it'll tx */ | 1059 | /* IN: 6 wait states before it'll tx */ |
@@ -1130,9 +1121,9 @@ static int omap_ep_set_halt(struct usb_ep *_ep, int value) | |||
1130 | else if (value) { | 1121 | else if (value) { |
1131 | if (ep->udc->ep0_set_config) { | 1122 | if (ep->udc->ep0_set_config) { |
1132 | WARN("error changing config?\n"); | 1123 | WARN("error changing config?\n"); |
1133 | UDC_SYSCON2_REG = UDC_CLR_CFG; | 1124 | omap_writew(UDC_CLR_CFG, UDC_SYSCON2); |
1134 | } | 1125 | } |
1135 | UDC_SYSCON2_REG = UDC_STALL_CMD; | 1126 | omap_writew(UDC_STALL_CMD, UDC_SYSCON2); |
1136 | ep->udc->ep0_pending = 0; | 1127 | ep->udc->ep0_pending = 0; |
1137 | status = 0; | 1128 | status = 0; |
1138 | } else /* NOP */ | 1129 | } else /* NOP */ |
@@ -1159,8 +1150,8 @@ static int omap_ep_set_halt(struct usb_ep *_ep, int value) | |||
1159 | channel = 0; | 1150 | channel = 0; |
1160 | 1151 | ||
1161 | use_ep(ep, UDC_EP_SEL); | 1152 | use_ep(ep, UDC_EP_SEL); |
1162 | if (UDC_STAT_FLG_REG & UDC_NON_ISO_FIFO_EMPTY) { | 1153 | if (omap_readw(UDC_STAT_FLG) & UDC_NON_ISO_FIFO_EMPTY) { |
1163 | UDC_CTRL_REG = UDC_SET_HALT; | 1154 | omap_writew(UDC_SET_HALT, UDC_CTRL); |
1164 | status = 0; | 1155 | status = 0; |
1165 | } else | 1156 | } else |
1166 | status = -EAGAIN; | 1157 | status = -EAGAIN; |
@@ -1170,10 +1161,10 @@ static int omap_ep_set_halt(struct usb_ep *_ep, int value) | |||
1170 | dma_channel_claim(ep, channel); | 1161 | dma_channel_claim(ep, channel); |
1171 | } else { | 1162 | } else { |
1172 | use_ep(ep, 0); | 1163 | use_ep(ep, 0); |
1173 | UDC_CTRL_REG = ep->udc->clr_halt; | 1164 | omap_writew(ep->udc->clr_halt, UDC_CTRL); |
1174 | ep->ackwait = 0; | 1165 | ep->ackwait = 0; |
1175 | if (!(ep->bEndpointAddress & USB_DIR_IN)) { | 1166 | if (!(ep->bEndpointAddress & USB_DIR_IN)) { |
1176 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1167 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1177 | ep->ackwait = 1 + ep->double_buf; | 1168 | ep->ackwait = 1 + ep->double_buf; |
1178 | } | 1169 | } |
1179 | } | 1170 | } |
@@ -1205,7 +1196,7 @@ static struct usb_ep_ops omap_ep_ops = { | |||
1205 | 1196 | ||
1206 | static int omap_get_frame(struct usb_gadget *gadget) | 1197 | static int omap_get_frame(struct usb_gadget *gadget) |
1207 | { | 1198 | { |
1208 | u16 sof = UDC_SOF_REG; | 1199 | u16 sof = omap_readw(UDC_SOF); |
1209 | return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC; | 1200 | return (sof & UDC_TS_OK) ? (sof & UDC_TS) : -EL2NSYNC; |
1210 | } | 1201 | } |
1211 | 1202 | ||
@@ -1224,7 +1215,7 @@ static int omap_wakeup(struct usb_gadget *gadget) | |||
1224 | */ | 1215 | */ |
1225 | if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) { | 1216 | if (udc->devstat & (UDC_B_HNP_ENABLE|UDC_R_WK_OK)) { |
1226 | DBG("remote wakeup...\n"); | 1217 | DBG("remote wakeup...\n"); |
1227 | UDC_SYSCON2_REG = UDC_RMT_WKP; | 1218 | omap_writew(UDC_RMT_WKP, UDC_SYSCON2); |
1228 | retval = 0; | 1219 | retval = 0; |
1229 | } | 1220 | } |
1230 | 1221 | ||
@@ -1247,12 +1238,12 @@ omap_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered) | |||
1247 | 1238 | ||
1248 | udc = container_of(gadget, struct omap_udc, gadget); | 1239 | udc = container_of(gadget, struct omap_udc, gadget); |
1249 | spin_lock_irqsave(&udc->lock, flags); | 1240 | spin_lock_irqsave(&udc->lock, flags); |
1250 | syscon1 = UDC_SYSCON1_REG; | 1241 | syscon1 = omap_readw(UDC_SYSCON1); |
1251 | if (is_selfpowered) | 1242 | if (is_selfpowered) |
1252 | syscon1 |= UDC_SELF_PWR; | 1243 | syscon1 |= UDC_SELF_PWR; |
1253 | else | 1244 | else |
1254 | syscon1 &= ~UDC_SELF_PWR; | 1245 | syscon1 &= ~UDC_SELF_PWR; |
1255 | UDC_SYSCON1_REG = syscon1; | 1246 | omap_writew(syscon1, UDC_SYSCON1); |
1256 | spin_unlock_irqrestore(&udc->lock, flags); | 1247 | spin_unlock_irqrestore(&udc->lock, flags); |
1257 | 1248 | ||
1258 | return 0; | 1249 | return 0; |
@@ -1265,18 +1256,36 @@ static int can_pullup(struct omap_udc *udc) | |||
1265 | 1256 | ||
1266 | static void pullup_enable(struct omap_udc *udc) | 1257 | static void pullup_enable(struct omap_udc *udc) |
1267 | { | 1258 | { |
1268 | UDC_SYSCON1_REG |= UDC_PULLUP_EN; | 1259 | u16 w; |
1269 | if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) | 1260 | |
1270 | OTG_CTRL_REG |= OTG_BSESSVLD; | 1261 | w = omap_readw(UDC_SYSCON1); |
1271 | UDC_IRQ_EN_REG = UDC_DS_CHG_IE; | 1262 | w |= UDC_PULLUP_EN; |
1263 | omap_writew(w, UDC_SYSCON1); | ||
1264 | if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) { | ||
1265 | u32 l; | ||
1266 | |||
1267 | l = omap_readl(OTG_CTRL); | ||
1268 | l |= OTG_BSESSVLD; | ||
1269 | omap_writel(l, OTG_CTRL); | ||
1270 | } | ||
1271 | omap_writew(UDC_DS_CHG_IE, UDC_IRQ_EN); | ||
1272 | } | 1272 | } |
1273 | 1273 | ||
1274 | static void pullup_disable(struct omap_udc *udc) | 1274 | static void pullup_disable(struct omap_udc *udc) |
1275 | { | 1275 | { |
1276 | if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) | 1276 | u16 w; |
1277 | OTG_CTRL_REG &= ~OTG_BSESSVLD; | 1277 | |
1278 | UDC_IRQ_EN_REG = UDC_DS_CHG_IE; | 1278 | if (!gadget_is_otg(&udc->gadget) && !cpu_is_omap15xx()) { |
1279 | UDC_SYSCON1_REG &= ~UDC_PULLUP_EN; | 1279 | u32 l; |
1280 | |||
1281 | l = omap_readl(OTG_CTRL); | ||
1282 | l &= ~OTG_BSESSVLD; | ||
1283 | omap_writel(l, OTG_CTRL); | ||
1284 | } | ||
1285 | omap_writew(UDC_DS_CHG_IE, UDC_IRQ_EN); | ||
1286 | w = omap_readw(UDC_SYSCON1); | ||
1287 | w &= ~UDC_PULLUP_EN; | ||
1288 | omap_writew(w, UDC_SYSCON1); | ||
1280 | } | 1289 | } |
1281 | 1290 | ||
1282 | static struct omap_udc *udc; | 1291 | static struct omap_udc *udc; |
@@ -1304,6 +1313,7 @@ static int omap_vbus_session(struct usb_gadget *gadget, int is_active) | |||
1304 | { | 1313 | { |
1305 | struct omap_udc *udc; | 1314 | struct omap_udc *udc; |
1306 | unsigned long flags; | 1315 | unsigned long flags; |
1316 | u32 l; | ||
1307 | 1317 | ||
1308 | udc = container_of(gadget, struct omap_udc, gadget); | 1318 | udc = container_of(gadget, struct omap_udc, gadget); |
1309 | spin_lock_irqsave(&udc->lock, flags); | 1319 | spin_lock_irqsave(&udc->lock, flags); |
@@ -1311,10 +1321,12 @@ static int omap_vbus_session(struct usb_gadget *gadget, int is_active) | |||
1311 | udc->vbus_active = (is_active != 0); | 1321 | udc->vbus_active = (is_active != 0); |
1312 | if (cpu_is_omap15xx()) { | 1322 | if (cpu_is_omap15xx()) { |
1313 | /* "software" detect, ignored if !VBUS_MODE_1510 */ | 1323 | /* "software" detect, ignored if !VBUS_MODE_1510 */ |
1324 | l = omap_readl(FUNC_MUX_CTRL_0); | ||
1314 | if (is_active) | 1325 | if (is_active) |
1315 | FUNC_MUX_CTRL_0_REG |= VBUS_CTRL_1510; | 1326 | l |= VBUS_CTRL_1510; |
1316 | else | 1327 | else |
1317 | FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510; | 1328 | l &= ~VBUS_CTRL_1510; |
1329 | omap_writel(l, FUNC_MUX_CTRL_0); | ||
1318 | } | 1330 | } |
1319 | if (udc->dc_clk != NULL && is_active) { | 1331 | if (udc->dc_clk != NULL && is_active) { |
1320 | if (!udc->clk_requested) { | 1332 | if (!udc->clk_requested) { |
@@ -1384,9 +1396,9 @@ static void nuke(struct omap_ep *ep, int status) | |||
1384 | dma_channel_release(ep); | 1396 | dma_channel_release(ep); |
1385 | 1397 | ||
1386 | use_ep(ep, 0); | 1398 | use_ep(ep, 0); |
1387 | UDC_CTRL_REG = UDC_CLR_EP; | 1399 | omap_writew(UDC_CLR_EP, UDC_CTRL); |
1388 | if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC) | 1400 | if (ep->bEndpointAddress && ep->bmAttributes != USB_ENDPOINT_XFER_ISOC) |
1389 | UDC_CTRL_REG = UDC_SET_HALT; | 1401 | omap_writew(UDC_SET_HALT, UDC_CTRL); |
1390 | 1402 | ||
1391 | while (!list_empty(&ep->queue)) { | 1403 | while (!list_empty(&ep->queue)) { |
1392 | req = list_entry(ep->queue.next, struct omap_req, queue); | 1404 | req = list_entry(ep->queue.next, struct omap_req, queue); |
@@ -1414,8 +1426,8 @@ static void update_otg(struct omap_udc *udc) | |||
1414 | if (!gadget_is_otg(&udc->gadget)) | 1426 | if (!gadget_is_otg(&udc->gadget)) |
1415 | return; | 1427 | return; |
1416 | 1428 | ||
1417 | if (OTG_CTRL_REG & OTG_ID) | 1429 | if (omap_readl(OTG_CTRL) & OTG_ID) |
1418 | devstat = UDC_DEVSTAT_REG; | 1430 | devstat = omap_readw(UDC_DEVSTAT); |
1419 | else | 1431 | else |
1420 | devstat = 0; | 1432 | devstat = 0; |
1421 | 1433 | ||
@@ -1426,9 +1438,14 @@ static void update_otg(struct omap_udc *udc) | |||
1426 | /* Enable HNP early, avoiding races on suspend irq path. | 1438 | /* Enable HNP early, avoiding races on suspend irq path. |
1427 | * ASSUMES OTG state machine B_BUS_REQ input is true. | 1439 | * ASSUMES OTG state machine B_BUS_REQ input is true. |
1428 | */ | 1440 | */ |
1429 | if (udc->gadget.b_hnp_enable) | 1441 | if (udc->gadget.b_hnp_enable) { |
1430 | OTG_CTRL_REG = (OTG_CTRL_REG | OTG_B_HNPEN | OTG_B_BUSREQ) | 1442 | u32 l; |
1431 | & ~OTG_PULLUP; | 1443 | |
1444 | l = omap_readl(OTG_CTRL); | ||
1445 | l |= OTG_B_HNPEN | OTG_B_BUSREQ; | ||
1446 | l &= ~OTG_PULLUP; | ||
1447 | omap_writel(l, OTG_CTRL); | ||
1448 | } | ||
1432 | } | 1449 | } |
1433 | 1450 | ||
1434 | static void ep0_irq(struct omap_udc *udc, u16 irq_src) | 1451 | static void ep0_irq(struct omap_udc *udc, u16 irq_src) |
@@ -1446,7 +1463,7 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1446 | 1463 | ||
1447 | nuke(ep0, 0); | 1464 | nuke(ep0, 0); |
1448 | if (ack) { | 1465 | if (ack) { |
1449 | UDC_IRQ_SRC_REG = ack; | 1466 | omap_writew(ack, UDC_IRQ_SRC); |
1450 | irq_src = UDC_SETUP; | 1467 | irq_src = UDC_SETUP; |
1451 | } | 1468 | } |
1452 | } | 1469 | } |
@@ -1466,9 +1483,9 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1466 | if (irq_src & UDC_EP0_TX) { | 1483 | if (irq_src & UDC_EP0_TX) { |
1467 | int stat; | 1484 | int stat; |
1468 | 1485 | ||
1469 | UDC_IRQ_SRC_REG = UDC_EP0_TX; | 1486 | omap_writew(UDC_EP0_TX, UDC_IRQ_SRC); |
1470 | UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; | 1487 | omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM); |
1471 | stat = UDC_STAT_FLG_REG; | 1488 | stat = omap_readw(UDC_STAT_FLG); |
1472 | if (stat & UDC_ACK) { | 1489 | if (stat & UDC_ACK) { |
1473 | if (udc->ep0_in) { | 1490 | if (udc->ep0_in) { |
1474 | /* write next IN packet from response, | 1491 | /* write next IN packet from response, |
@@ -1476,26 +1493,26 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1476 | */ | 1493 | */ |
1477 | if (req) | 1494 | if (req) |
1478 | stat = write_fifo(ep0, req); | 1495 | stat = write_fifo(ep0, req); |
1479 | UDC_EP_NUM_REG = UDC_EP_DIR; | 1496 | omap_writew(UDC_EP_DIR, UDC_EP_NUM); |
1480 | if (!req && udc->ep0_pending) { | 1497 | if (!req && udc->ep0_pending) { |
1481 | UDC_EP_NUM_REG = UDC_EP_SEL; | 1498 | omap_writew(UDC_EP_SEL, UDC_EP_NUM); |
1482 | UDC_CTRL_REG = UDC_CLR_EP; | 1499 | omap_writew(UDC_CLR_EP, UDC_CTRL); |
1483 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1500 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1484 | UDC_EP_NUM_REG = 0; | 1501 | omap_writew(0, UDC_EP_NUM); |
1485 | udc->ep0_pending = 0; | 1502 | udc->ep0_pending = 0; |
1486 | } /* else: 6 wait states before it'll tx */ | 1503 | } /* else: 6 wait states before it'll tx */ |
1487 | } else { | 1504 | } else { |
1488 | /* ack status stage of OUT transfer */ | 1505 | /* ack status stage of OUT transfer */ |
1489 | UDC_EP_NUM_REG = UDC_EP_DIR; | 1506 | omap_writew(UDC_EP_DIR, UDC_EP_NUM); |
1490 | if (req) | 1507 | if (req) |
1491 | done(ep0, req, 0); | 1508 | done(ep0, req, 0); |
1492 | } | 1509 | } |
1493 | req = NULL; | 1510 | req = NULL; |
1494 | } else if (stat & UDC_STALL) { | 1511 | } else if (stat & UDC_STALL) { |
1495 | UDC_CTRL_REG = UDC_CLR_HALT; | 1512 | omap_writew(UDC_CLR_HALT, UDC_CTRL); |
1496 | UDC_EP_NUM_REG = UDC_EP_DIR; | 1513 | omap_writew(UDC_EP_DIR, UDC_EP_NUM); |
1497 | } else { | 1514 | } else { |
1498 | UDC_EP_NUM_REG = UDC_EP_DIR; | 1515 | omap_writew(UDC_EP_DIR, UDC_EP_NUM); |
1499 | } | 1516 | } |
1500 | } | 1517 | } |
1501 | 1518 | ||
@@ -1503,9 +1520,9 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1503 | if (irq_src & UDC_EP0_RX) { | 1520 | if (irq_src & UDC_EP0_RX) { |
1504 | int stat; | 1521 | int stat; |
1505 | 1522 | ||
1506 | UDC_IRQ_SRC_REG = UDC_EP0_RX; | 1523 | omap_writew(UDC_EP0_RX, UDC_IRQ_SRC); |
1507 | UDC_EP_NUM_REG = UDC_EP_SEL; | 1524 | omap_writew(UDC_EP_SEL, UDC_EP_NUM); |
1508 | stat = UDC_STAT_FLG_REG; | 1525 | stat = omap_readw(UDC_STAT_FLG); |
1509 | if (stat & UDC_ACK) { | 1526 | if (stat & UDC_ACK) { |
1510 | if (!udc->ep0_in) { | 1527 | if (!udc->ep0_in) { |
1511 | stat = 0; | 1528 | stat = 0; |
@@ -1513,34 +1530,35 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1513 | * reactiviting the fifo; stall on errors. | 1530 | * reactiviting the fifo; stall on errors. |
1514 | */ | 1531 | */ |
1515 | if (!req || (stat = read_fifo(ep0, req)) < 0) { | 1532 | if (!req || (stat = read_fifo(ep0, req)) < 0) { |
1516 | UDC_SYSCON2_REG = UDC_STALL_CMD; | 1533 | omap_writew(UDC_STALL_CMD, UDC_SYSCON2); |
1517 | udc->ep0_pending = 0; | 1534 | udc->ep0_pending = 0; |
1518 | stat = 0; | 1535 | stat = 0; |
1519 | } else if (stat == 0) | 1536 | } else if (stat == 0) |
1520 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1537 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1521 | UDC_EP_NUM_REG = 0; | 1538 | omap_writew(0, UDC_EP_NUM); |
1522 | 1539 | ||
1523 | /* activate status stage */ | 1540 | /* activate status stage */ |
1524 | if (stat == 1) { | 1541 | if (stat == 1) { |
1525 | done(ep0, req, 0); | 1542 | done(ep0, req, 0); |
1526 | /* that may have STALLed ep0... */ | 1543 | /* that may have STALLed ep0... */ |
1527 | UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; | 1544 | omap_writew(UDC_EP_SEL | UDC_EP_DIR, |
1528 | UDC_CTRL_REG = UDC_CLR_EP; | 1545 | UDC_EP_NUM); |
1529 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1546 | omap_writew(UDC_CLR_EP, UDC_CTRL); |
1530 | UDC_EP_NUM_REG = UDC_EP_DIR; | 1547 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1548 | omap_writew(UDC_EP_DIR, UDC_EP_NUM); | ||
1531 | udc->ep0_pending = 0; | 1549 | udc->ep0_pending = 0; |
1532 | } | 1550 | } |
1533 | } else { | 1551 | } else { |
1534 | /* ack status stage of IN transfer */ | 1552 | /* ack status stage of IN transfer */ |
1535 | UDC_EP_NUM_REG = 0; | 1553 | omap_writew(0, UDC_EP_NUM); |
1536 | if (req) | 1554 | if (req) |
1537 | done(ep0, req, 0); | 1555 | done(ep0, req, 0); |
1538 | } | 1556 | } |
1539 | } else if (stat & UDC_STALL) { | 1557 | } else if (stat & UDC_STALL) { |
1540 | UDC_CTRL_REG = UDC_CLR_HALT; | 1558 | omap_writew(UDC_CLR_HALT, UDC_CTRL); |
1541 | UDC_EP_NUM_REG = 0; | 1559 | omap_writew(0, UDC_EP_NUM); |
1542 | } else { | 1560 | } else { |
1543 | UDC_EP_NUM_REG = 0; | 1561 | omap_writew(0, UDC_EP_NUM); |
1544 | } | 1562 | } |
1545 | } | 1563 | } |
1546 | 1564 | ||
@@ -1555,14 +1573,14 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1555 | 1573 | ||
1556 | /* read the (latest) SETUP message */ | 1574 | /* read the (latest) SETUP message */ |
1557 | do { | 1575 | do { |
1558 | UDC_EP_NUM_REG = UDC_SETUP_SEL; | 1576 | omap_writew(UDC_SETUP_SEL, UDC_EP_NUM); |
1559 | /* two bytes at a time */ | 1577 | /* two bytes at a time */ |
1560 | u.word[0] = UDC_DATA_REG; | 1578 | u.word[0] = omap_readw(UDC_DATA); |
1561 | u.word[1] = UDC_DATA_REG; | 1579 | u.word[1] = omap_readw(UDC_DATA); |
1562 | u.word[2] = UDC_DATA_REG; | 1580 | u.word[2] = omap_readw(UDC_DATA); |
1563 | u.word[3] = UDC_DATA_REG; | 1581 | u.word[3] = omap_readw(UDC_DATA); |
1564 | UDC_EP_NUM_REG = 0; | 1582 | omap_writew(0, UDC_EP_NUM); |
1565 | } while (UDC_IRQ_SRC_REG & UDC_SETUP); | 1583 | } while (omap_readw(UDC_IRQ_SRC) & UDC_SETUP); |
1566 | 1584 | ||
1567 | #define w_value le16_to_cpu(u.r.wValue) | 1585 | #define w_value le16_to_cpu(u.r.wValue) |
1568 | #define w_index le16_to_cpu(u.r.wIndex) | 1586 | #define w_index le16_to_cpu(u.r.wIndex) |
@@ -1593,9 +1611,9 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1593 | * later if it fails the request. | 1611 | * later if it fails the request. |
1594 | */ | 1612 | */ |
1595 | if (udc->ep0_reset_config) | 1613 | if (udc->ep0_reset_config) |
1596 | UDC_SYSCON2_REG = UDC_CLR_CFG; | 1614 | omap_writew(UDC_CLR_CFG, UDC_SYSCON2); |
1597 | else | 1615 | else |
1598 | UDC_SYSCON2_REG = UDC_DEV_CFG; | 1616 | omap_writew(UDC_DEV_CFG, UDC_SYSCON2); |
1599 | update_otg(udc); | 1617 | update_otg(udc); |
1600 | goto delegate; | 1618 | goto delegate; |
1601 | case USB_REQ_CLEAR_FEATURE: | 1619 | case USB_REQ_CLEAR_FEATURE: |
@@ -1613,10 +1631,10 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1613 | || !ep->desc) | 1631 | || !ep->desc) |
1614 | goto do_stall; | 1632 | goto do_stall; |
1615 | use_ep(ep, 0); | 1633 | use_ep(ep, 0); |
1616 | UDC_CTRL_REG = udc->clr_halt; | 1634 | omap_writew(udc->clr_halt, UDC_CTRL); |
1617 | ep->ackwait = 0; | 1635 | ep->ackwait = 0; |
1618 | if (!(ep->bEndpointAddress & USB_DIR_IN)) { | 1636 | if (!(ep->bEndpointAddress & USB_DIR_IN)) { |
1619 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1637 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1620 | ep->ackwait = 1 + ep->double_buf; | 1638 | ep->ackwait = 1 + ep->double_buf; |
1621 | } | 1639 | } |
1622 | /* NOTE: assumes the host behaves sanely, | 1640 | /* NOTE: assumes the host behaves sanely, |
@@ -1649,15 +1667,15 @@ static void ep0_irq(struct omap_udc *udc, u16 irq_src) | |||
1649 | } | 1667 | } |
1650 | use_ep(ep, 0); | 1668 | use_ep(ep, 0); |
1651 | /* can't halt if fifo isn't empty... */ | 1669 | /* can't halt if fifo isn't empty... */ |
1652 | UDC_CTRL_REG = UDC_CLR_EP; | 1670 | omap_writew(UDC_CLR_EP, UDC_CTRL); |
1653 | UDC_CTRL_REG = UDC_SET_HALT; | 1671 | omap_writew(UDC_SET_HALT, UDC_CTRL); |
1654 | VDBG("%s halted by host\n", ep->name); | 1672 | VDBG("%s halted by host\n", ep->name); |
1655 | ep0out_status_stage: | 1673 | ep0out_status_stage: |
1656 | status = 0; | 1674 | status = 0; |
1657 | UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; | 1675 | omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM); |
1658 | UDC_CTRL_REG = UDC_CLR_EP; | 1676 | omap_writew(UDC_CLR_EP, UDC_CTRL); |
1659 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1677 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1660 | UDC_EP_NUM_REG = UDC_EP_DIR; | 1678 | omap_writew(UDC_EP_DIR, UDC_EP_NUM); |
1661 | udc->ep0_pending = 0; | 1679 | udc->ep0_pending = 0; |
1662 | break; | 1680 | break; |
1663 | case USB_REQ_GET_STATUS: | 1681 | case USB_REQ_GET_STATUS: |
@@ -1694,10 +1712,10 @@ intf_status: | |||
1694 | 1712 | ||
1695 | zero_status: | 1713 | zero_status: |
1696 | /* return two zero bytes */ | 1714 | /* return two zero bytes */ |
1697 | UDC_EP_NUM_REG = UDC_EP_SEL|UDC_EP_DIR; | 1715 | omap_writew(UDC_EP_SEL|UDC_EP_DIR, UDC_EP_NUM); |
1698 | UDC_DATA_REG = 0; | 1716 | omap_writew(0, UDC_DATA); |
1699 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1717 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1700 | UDC_EP_NUM_REG = UDC_EP_DIR; | 1718 | omap_writew(UDC_EP_DIR, UDC_EP_NUM); |
1701 | status = 0; | 1719 | status = 0; |
1702 | VDBG("GET_STATUS, interface %d\n", w_index); | 1720 | VDBG("GET_STATUS, interface %d\n", w_index); |
1703 | /* next, status stage */ | 1721 | /* next, status stage */ |
@@ -1706,8 +1724,8 @@ zero_status: | |||
1706 | delegate: | 1724 | delegate: |
1707 | /* activate the ep0out fifo right away */ | 1725 | /* activate the ep0out fifo right away */ |
1708 | if (!udc->ep0_in && w_length) { | 1726 | if (!udc->ep0_in && w_length) { |
1709 | UDC_EP_NUM_REG = 0; | 1727 | omap_writew(0, UDC_EP_NUM); |
1710 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1728 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1711 | } | 1729 | } |
1712 | 1730 | ||
1713 | /* gadget drivers see class/vendor specific requests, | 1731 | /* gadget drivers see class/vendor specific requests, |
@@ -1748,9 +1766,9 @@ do_stall: | |||
1748 | if (udc->ep0_reset_config) | 1766 | if (udc->ep0_reset_config) |
1749 | WARN("error resetting config?\n"); | 1767 | WARN("error resetting config?\n"); |
1750 | else | 1768 | else |
1751 | UDC_SYSCON2_REG = UDC_CLR_CFG; | 1769 | omap_writew(UDC_CLR_CFG, UDC_SYSCON2); |
1752 | } | 1770 | } |
1753 | UDC_SYSCON2_REG = UDC_STALL_CMD; | 1771 | omap_writew(UDC_STALL_CMD, UDC_SYSCON2); |
1754 | udc->ep0_pending = 0; | 1772 | udc->ep0_pending = 0; |
1755 | } | 1773 | } |
1756 | } | 1774 | } |
@@ -1764,7 +1782,7 @@ static void devstate_irq(struct omap_udc *udc, u16 irq_src) | |||
1764 | { | 1782 | { |
1765 | u16 devstat, change; | 1783 | u16 devstat, change; |
1766 | 1784 | ||
1767 | devstat = UDC_DEVSTAT_REG; | 1785 | devstat = omap_readw(UDC_DEVSTAT); |
1768 | change = devstat ^ udc->devstat; | 1786 | change = devstat ^ udc->devstat; |
1769 | udc->devstat = devstat; | 1787 | udc->devstat = devstat; |
1770 | 1788 | ||
@@ -1804,7 +1822,8 @@ static void devstate_irq(struct omap_udc *udc, u16 irq_src) | |||
1804 | INFO("USB reset done, gadget %s\n", | 1822 | INFO("USB reset done, gadget %s\n", |
1805 | udc->driver->driver.name); | 1823 | udc->driver->driver.name); |
1806 | /* ep0 traffic is legal from now on */ | 1824 | /* ep0 traffic is legal from now on */ |
1807 | UDC_IRQ_EN_REG = UDC_DS_CHG_IE | UDC_EP0_IE; | 1825 | omap_writew(UDC_DS_CHG_IE | UDC_EP0_IE, |
1826 | UDC_IRQ_EN); | ||
1808 | } | 1827 | } |
1809 | change &= ~UDC_USB_RESET; | 1828 | change &= ~UDC_USB_RESET; |
1810 | } | 1829 | } |
@@ -1848,7 +1867,7 @@ static void devstate_irq(struct omap_udc *udc, u16 irq_src) | |||
1848 | VDBG("devstat %03x, ignore change %03x\n", | 1867 | VDBG("devstat %03x, ignore change %03x\n", |
1849 | devstat, change); | 1868 | devstat, change); |
1850 | 1869 | ||
1851 | UDC_IRQ_SRC_REG = UDC_DS_CHG; | 1870 | omap_writew(UDC_DS_CHG, UDC_IRQ_SRC); |
1852 | } | 1871 | } |
1853 | 1872 | ||
1854 | static irqreturn_t omap_udc_irq(int irq, void *_udc) | 1873 | static irqreturn_t omap_udc_irq(int irq, void *_udc) |
@@ -1859,7 +1878,7 @@ static irqreturn_t omap_udc_irq(int irq, void *_udc) | |||
1859 | unsigned long flags; | 1878 | unsigned long flags; |
1860 | 1879 | ||
1861 | spin_lock_irqsave(&udc->lock, flags); | 1880 | spin_lock_irqsave(&udc->lock, flags); |
1862 | irq_src = UDC_IRQ_SRC_REG; | 1881 | irq_src = omap_readw(UDC_IRQ_SRC); |
1863 | 1882 | ||
1864 | /* Device state change (usb ch9 stuff) */ | 1883 | /* Device state change (usb ch9 stuff) */ |
1865 | if (irq_src & UDC_DS_CHG) { | 1884 | if (irq_src & UDC_DS_CHG) { |
@@ -1882,7 +1901,7 @@ static irqreturn_t omap_udc_irq(int irq, void *_udc) | |||
1882 | irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT); | 1901 | irq_src &= ~(UDC_TXN_DONE|UDC_RXN_CNT|UDC_RXN_EOT); |
1883 | } | 1902 | } |
1884 | 1903 | ||
1885 | irq_src &= ~(UDC_SOF|UDC_EPN_TX|UDC_EPN_RX); | 1904 | irq_src &= ~(UDC_IRQ_SOF | UDC_EPN_TX|UDC_EPN_RX); |
1886 | if (irq_src) | 1905 | if (irq_src) |
1887 | DBG("udc_irq, unhandled %03x\n", irq_src); | 1906 | DBG("udc_irq, unhandled %03x\n", irq_src); |
1888 | spin_unlock_irqrestore(&udc->lock, flags); | 1907 | spin_unlock_irqrestore(&udc->lock, flags); |
@@ -1903,7 +1922,7 @@ static void pio_out_timer(unsigned long _ep) | |||
1903 | spin_lock_irqsave(&ep->udc->lock, flags); | 1922 | spin_lock_irqsave(&ep->udc->lock, flags); |
1904 | if (!list_empty(&ep->queue) && ep->ackwait) { | 1923 | if (!list_empty(&ep->queue) && ep->ackwait) { |
1905 | use_ep(ep, UDC_EP_SEL); | 1924 | use_ep(ep, UDC_EP_SEL); |
1906 | stat_flg = UDC_STAT_FLG_REG; | 1925 | stat_flg = omap_readw(UDC_STAT_FLG); |
1907 | 1926 | ||
1908 | if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN) | 1927 | if ((stat_flg & UDC_ACK) && (!(stat_flg & UDC_FIFO_EN) |
1909 | || (ep->double_buf && HALF_FULL(stat_flg)))) { | 1928 | || (ep->double_buf && HALF_FULL(stat_flg)))) { |
@@ -1913,8 +1932,8 @@ static void pio_out_timer(unsigned long _ep) | |||
1913 | req = container_of(ep->queue.next, | 1932 | req = container_of(ep->queue.next, |
1914 | struct omap_req, queue); | 1933 | struct omap_req, queue); |
1915 | (void) read_fifo(ep, req); | 1934 | (void) read_fifo(ep, req); |
1916 | UDC_EP_NUM_REG = ep->bEndpointAddress; | 1935 | omap_writew(ep->bEndpointAddress, UDC_EP_NUM); |
1917 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1936 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1918 | ep->ackwait = 1 + ep->double_buf; | 1937 | ep->ackwait = 1 + ep->double_buf; |
1919 | } else | 1938 | } else |
1920 | deselect_ep(); | 1939 | deselect_ep(); |
@@ -1934,20 +1953,20 @@ static irqreturn_t omap_udc_pio_irq(int irq, void *_dev) | |||
1934 | unsigned long flags; | 1953 | unsigned long flags; |
1935 | 1954 | ||
1936 | spin_lock_irqsave(&udc->lock, flags); | 1955 | spin_lock_irqsave(&udc->lock, flags); |
1937 | epn_stat = UDC_EPN_STAT_REG; | 1956 | epn_stat = omap_readw(UDC_EPN_STAT); |
1938 | irq_src = UDC_IRQ_SRC_REG; | 1957 | irq_src = omap_readw(UDC_IRQ_SRC); |
1939 | 1958 | ||
1940 | /* handle OUT first, to avoid some wasteful NAKs */ | 1959 | /* handle OUT first, to avoid some wasteful NAKs */ |
1941 | if (irq_src & UDC_EPN_RX) { | 1960 | if (irq_src & UDC_EPN_RX) { |
1942 | epnum = (epn_stat >> 8) & 0x0f; | 1961 | epnum = (epn_stat >> 8) & 0x0f; |
1943 | UDC_IRQ_SRC_REG = UDC_EPN_RX; | 1962 | omap_writew(UDC_EPN_RX, UDC_IRQ_SRC); |
1944 | status = IRQ_HANDLED; | 1963 | status = IRQ_HANDLED; |
1945 | ep = &udc->ep[epnum]; | 1964 | ep = &udc->ep[epnum]; |
1946 | ep->irqs++; | 1965 | ep->irqs++; |
1947 | 1966 | ||
1948 | UDC_EP_NUM_REG = epnum | UDC_EP_SEL; | 1967 | omap_writew(epnum | UDC_EP_SEL, UDC_EP_NUM); |
1949 | ep->fnf = 0; | 1968 | ep->fnf = 0; |
1950 | if ((UDC_STAT_FLG_REG & UDC_ACK)) { | 1969 | if (omap_readw(UDC_STAT_FLG) & UDC_ACK) { |
1951 | ep->ackwait--; | 1970 | ep->ackwait--; |
1952 | if (!list_empty(&ep->queue)) { | 1971 | if (!list_empty(&ep->queue)) { |
1953 | int stat; | 1972 | int stat; |
@@ -1959,15 +1978,15 @@ static irqreturn_t omap_udc_pio_irq(int irq, void *_dev) | |||
1959 | } | 1978 | } |
1960 | } | 1979 | } |
1961 | /* min 6 clock delay before clearing EP_SEL ... */ | 1980 | /* min 6 clock delay before clearing EP_SEL ... */ |
1962 | epn_stat = UDC_EPN_STAT_REG; | 1981 | epn_stat = omap_readw(UDC_EPN_STAT); |
1963 | epn_stat = UDC_EPN_STAT_REG; | 1982 | epn_stat = omap_readw(UDC_EPN_STAT); |
1964 | UDC_EP_NUM_REG = epnum; | 1983 | omap_writew(epnum, UDC_EP_NUM); |
1965 | 1984 | ||
1966 | /* enabling fifo _after_ clearing ACK, contrary to docs, | 1985 | /* enabling fifo _after_ clearing ACK, contrary to docs, |
1967 | * reduces lossage; timer still needed though (sigh). | 1986 | * reduces lossage; timer still needed though (sigh). |
1968 | */ | 1987 | */ |
1969 | if (ep->fnf) { | 1988 | if (ep->fnf) { |
1970 | UDC_CTRL_REG = UDC_SET_FIFO_EN; | 1989 | omap_writew(UDC_SET_FIFO_EN, UDC_CTRL); |
1971 | ep->ackwait = 1 + ep->double_buf; | 1990 | ep->ackwait = 1 + ep->double_buf; |
1972 | } | 1991 | } |
1973 | mod_timer(&ep->timer, PIO_OUT_TIMEOUT); | 1992 | mod_timer(&ep->timer, PIO_OUT_TIMEOUT); |
@@ -1976,13 +1995,13 @@ static irqreturn_t omap_udc_pio_irq(int irq, void *_dev) | |||
1976 | /* then IN transfers */ | 1995 | /* then IN transfers */ |
1977 | else if (irq_src & UDC_EPN_TX) { | 1996 | else if (irq_src & UDC_EPN_TX) { |
1978 | epnum = epn_stat & 0x0f; | 1997 | epnum = epn_stat & 0x0f; |
1979 | UDC_IRQ_SRC_REG = UDC_EPN_TX; | 1998 | omap_writew(UDC_EPN_TX, UDC_IRQ_SRC); |
1980 | status = IRQ_HANDLED; | 1999 | status = IRQ_HANDLED; |
1981 | ep = &udc->ep[16 + epnum]; | 2000 | ep = &udc->ep[16 + epnum]; |
1982 | ep->irqs++; | 2001 | ep->irqs++; |
1983 | 2002 | ||
1984 | UDC_EP_NUM_REG = epnum | UDC_EP_DIR | UDC_EP_SEL; | 2003 | omap_writew(epnum | UDC_EP_DIR | UDC_EP_SEL, UDC_EP_NUM); |
1985 | if ((UDC_STAT_FLG_REG & UDC_ACK)) { | 2004 | if (omap_readw(UDC_STAT_FLG) & UDC_ACK) { |
1986 | ep->ackwait = 0; | 2005 | ep->ackwait = 0; |
1987 | if (!list_empty(&ep->queue)) { | 2006 | if (!list_empty(&ep->queue)) { |
1988 | req = container_of(ep->queue.next, | 2007 | req = container_of(ep->queue.next, |
@@ -1991,9 +2010,9 @@ static irqreturn_t omap_udc_pio_irq(int irq, void *_dev) | |||
1991 | } | 2010 | } |
1992 | } | 2011 | } |
1993 | /* min 6 clock delay before clearing EP_SEL ... */ | 2012 | /* min 6 clock delay before clearing EP_SEL ... */ |
1994 | epn_stat = UDC_EPN_STAT_REG; | 2013 | epn_stat = omap_readw(UDC_EPN_STAT); |
1995 | epn_stat = UDC_EPN_STAT_REG; | 2014 | epn_stat = omap_readw(UDC_EPN_STAT); |
1996 | UDC_EP_NUM_REG = epnum | UDC_EP_DIR; | 2015 | omap_writew(epnum | UDC_EP_DIR, UDC_EP_NUM); |
1997 | /* then 6 clocks before it'd tx */ | 2016 | /* then 6 clocks before it'd tx */ |
1998 | } | 2017 | } |
1999 | 2018 | ||
@@ -2021,7 +2040,7 @@ static irqreturn_t omap_udc_iso_irq(int irq, void *_dev) | |||
2021 | req = list_entry(ep->queue.next, struct omap_req, queue); | 2040 | req = list_entry(ep->queue.next, struct omap_req, queue); |
2022 | 2041 | ||
2023 | use_ep(ep, UDC_EP_SEL); | 2042 | use_ep(ep, UDC_EP_SEL); |
2024 | stat = UDC_STAT_FLG_REG; | 2043 | stat = omap_readw(UDC_STAT_FLG); |
2025 | 2044 | ||
2026 | /* NOTE: like the other controller drivers, this isn't | 2045 | /* NOTE: like the other controller drivers, this isn't |
2027 | * currently reporting lost or damaged frames. | 2046 | * currently reporting lost or damaged frames. |
@@ -2053,9 +2072,14 @@ static irqreturn_t omap_udc_iso_irq(int irq, void *_dev) | |||
2053 | if (!list_empty(&ep->queue)) | 2072 | if (!list_empty(&ep->queue)) |
2054 | pending = 1; | 2073 | pending = 1; |
2055 | } | 2074 | } |
2056 | if (!pending) | 2075 | if (!pending) { |
2057 | UDC_IRQ_EN_REG &= ~UDC_SOF_IE; | 2076 | u16 w; |
2058 | UDC_IRQ_SRC_REG = UDC_SOF; | 2077 | |
2078 | w = omap_readw(UDC_IRQ_EN); | ||
2079 | w &= ~UDC_SOF_IE; | ||
2080 | omap_writew(w, UDC_IRQ_EN); | ||
2081 | } | ||
2082 | omap_writew(UDC_IRQ_SOF, UDC_IRQ_SRC); | ||
2059 | 2083 | ||
2060 | spin_unlock_irqrestore(&udc->lock, flags); | 2084 | spin_unlock_irqrestore(&udc->lock, flags); |
2061 | return IRQ_HANDLED; | 2085 | return IRQ_HANDLED; |
@@ -2104,7 +2128,7 @@ int usb_gadget_register_driver (struct usb_gadget_driver *driver) | |||
2104 | if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) | 2128 | if (ep->bmAttributes == USB_ENDPOINT_XFER_ISOC) |
2105 | continue; | 2129 | continue; |
2106 | use_ep(ep, 0); | 2130 | use_ep(ep, 0); |
2107 | UDC_CTRL_REG = UDC_SET_HALT; | 2131 | omap_writew(UDC_SET_HALT, UDC_CTRL); |
2108 | } | 2132 | } |
2109 | udc->ep0_pending = 0; | 2133 | udc->ep0_pending = 0; |
2110 | udc->ep[0].irqs = 0; | 2134 | udc->ep[0].irqs = 0; |
@@ -2128,7 +2152,7 @@ int usb_gadget_register_driver (struct usb_gadget_driver *driver) | |||
2128 | } | 2152 | } |
2129 | DBG("bound to driver %s\n", driver->driver.name); | 2153 | DBG("bound to driver %s\n", driver->driver.name); |
2130 | 2154 | ||
2131 | UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK; | 2155 | omap_writew(UDC_IRQ_SRC_MASK, UDC_IRQ_SRC); |
2132 | 2156 | ||
2133 | /* connect to bus through transceiver */ | 2157 | /* connect to bus through transceiver */ |
2134 | if (udc->transceiver) { | 2158 | if (udc->transceiver) { |
@@ -2225,7 +2249,7 @@ static void proc_ep_show(struct seq_file *s, struct omap_ep *ep) | |||
2225 | else | 2249 | else |
2226 | buf[0] = 0; | 2250 | buf[0] = 0; |
2227 | 2251 | ||
2228 | stat_flg = UDC_STAT_FLG_REG; | 2252 | stat_flg = omap_readw(UDC_STAT_FLG); |
2229 | seq_printf(s, | 2253 | seq_printf(s, |
2230 | "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n", | 2254 | "\n%s %s%s%sirqs %ld stat %04x " EIGHTBITS FOURBITS "%s\n", |
2231 | ep->name, buf, | 2255 | ep->name, buf, |
@@ -2292,11 +2316,11 @@ static int proc_otg_show(struct seq_file *s) | |||
2292 | trans = CONTROL_DEVCONF_REG; | 2316 | trans = CONTROL_DEVCONF_REG; |
2293 | } else { | 2317 | } else { |
2294 | ctrl_name = "tranceiver_ctrl"; | 2318 | ctrl_name = "tranceiver_ctrl"; |
2295 | trans = USB_TRANSCEIVER_CTRL_REG; | 2319 | trans = omap_readw(USB_TRANSCEIVER_CTRL); |
2296 | } | 2320 | } |
2297 | seq_printf(s, "\nOTG rev %d.%d, %s %05x\n", | 2321 | seq_printf(s, "\nOTG rev %d.%d, %s %05x\n", |
2298 | tmp >> 4, tmp & 0xf, ctrl_name, trans); | 2322 | tmp >> 4, tmp & 0xf, ctrl_name, trans); |
2299 | tmp = OTG_SYSCON_1_REG; | 2323 | tmp = omap_readw(OTG_SYSCON_1); |
2300 | seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s," | 2324 | seq_printf(s, "otg_syscon1 %08x usb2 %s, usb1 %s, usb0 %s," |
2301 | FOURBITS "\n", tmp, | 2325 | FOURBITS "\n", tmp, |
2302 | trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R), | 2326 | trx_mode(USB2_TRX_MODE(tmp), trans & CONF_USB2_UNI_R), |
@@ -2308,7 +2332,7 @@ static int proc_otg_show(struct seq_file *s) | |||
2308 | (tmp & HST_IDLE_EN) ? " !host" : "", | 2332 | (tmp & HST_IDLE_EN) ? " !host" : "", |
2309 | (tmp & DEV_IDLE_EN) ? " !dev" : "", | 2333 | (tmp & DEV_IDLE_EN) ? " !dev" : "", |
2310 | (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active"); | 2334 | (tmp & OTG_RESET_DONE) ? " reset_done" : " reset_active"); |
2311 | tmp = OTG_SYSCON_2_REG; | 2335 | tmp = omap_readl(OTG_SYSCON_2); |
2312 | seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS | 2336 | seq_printf(s, "otg_syscon2 %08x%s" EIGHTBITS |
2313 | " b_ase_brst=%d hmc=%d\n", tmp, | 2337 | " b_ase_brst=%d hmc=%d\n", tmp, |
2314 | (tmp & OTG_EN) ? " otg_en" : "", | 2338 | (tmp & OTG_EN) ? " otg_en" : "", |
@@ -2323,7 +2347,7 @@ static int proc_otg_show(struct seq_file *s) | |||
2323 | (tmp & HMC_TLLATTACH) ? " tllattach" : "", | 2347 | (tmp & HMC_TLLATTACH) ? " tllattach" : "", |
2324 | B_ASE_BRST(tmp), | 2348 | B_ASE_BRST(tmp), |
2325 | OTG_HMC(tmp)); | 2349 | OTG_HMC(tmp)); |
2326 | tmp = OTG_CTRL_REG; | 2350 | tmp = omap_readl(OTG_CTRL); |
2327 | seq_printf(s, "otg_ctrl %06x" EIGHTBITS EIGHTBITS "%s\n", tmp, | 2351 | seq_printf(s, "otg_ctrl %06x" EIGHTBITS EIGHTBITS "%s\n", tmp, |
2328 | (tmp & OTG_ASESSVLD) ? " asess" : "", | 2352 | (tmp & OTG_ASESSVLD) ? " asess" : "", |
2329 | (tmp & OTG_BSESSEND) ? " bsess_end" : "", | 2353 | (tmp & OTG_BSESSEND) ? " bsess_end" : "", |
@@ -2343,13 +2367,13 @@ static int proc_otg_show(struct seq_file *s) | |||
2343 | (tmp & OTG_PU_VBUS) ? " pu_vb" : "", | 2367 | (tmp & OTG_PU_VBUS) ? " pu_vb" : "", |
2344 | (tmp & OTG_PU_ID) ? " pu_id" : "" | 2368 | (tmp & OTG_PU_ID) ? " pu_id" : "" |
2345 | ); | 2369 | ); |
2346 | tmp = OTG_IRQ_EN_REG; | 2370 | tmp = omap_readw(OTG_IRQ_EN); |
2347 | seq_printf(s, "otg_irq_en %04x" "\n", tmp); | 2371 | seq_printf(s, "otg_irq_en %04x" "\n", tmp); |
2348 | tmp = OTG_IRQ_SRC_REG; | 2372 | tmp = omap_readw(OTG_IRQ_SRC); |
2349 | seq_printf(s, "otg_irq_src %04x" "\n", tmp); | 2373 | seq_printf(s, "otg_irq_src %04x" "\n", tmp); |
2350 | tmp = OTG_OUTCTRL_REG; | 2374 | tmp = omap_readw(OTG_OUTCTRL); |
2351 | seq_printf(s, "otg_outctrl %04x" "\n", tmp); | 2375 | seq_printf(s, "otg_outctrl %04x" "\n", tmp); |
2352 | tmp = OTG_TEST_REG; | 2376 | tmp = omap_readw(OTG_TEST); |
2353 | seq_printf(s, "otg_test %04x" "\n", tmp); | 2377 | seq_printf(s, "otg_test %04x" "\n", tmp); |
2354 | return 0; | 2378 | return 0; |
2355 | } | 2379 | } |
@@ -2370,7 +2394,7 @@ static int proc_udc_show(struct seq_file *s, void *_) | |||
2370 | driver_desc, | 2394 | driver_desc, |
2371 | use_dma ? " (dma)" : ""); | 2395 | use_dma ? " (dma)" : ""); |
2372 | 2396 | ||
2373 | tmp = UDC_REV_REG & 0xff; | 2397 | tmp = omap_readw(UDC_REV) & 0xff; |
2374 | seq_printf(s, | 2398 | seq_printf(s, |
2375 | "UDC rev %d.%d, fifo mode %d, gadget %s\n" | 2399 | "UDC rev %d.%d, fifo mode %d, gadget %s\n" |
2376 | "hmc %d, transceiver %s\n", | 2400 | "hmc %d, transceiver %s\n", |
@@ -2384,16 +2408,16 @@ static int proc_udc_show(struct seq_file *s, void *_) | |||
2384 | ? "external" : "(none)")); | 2408 | ? "external" : "(none)")); |
2385 | if (cpu_class_is_omap1()) { | 2409 | if (cpu_class_is_omap1()) { |
2386 | seq_printf(s, "ULPD control %04x req %04x status %04x\n", | 2410 | seq_printf(s, "ULPD control %04x req %04x status %04x\n", |
2387 | __REG16(ULPD_CLOCK_CTRL), | 2411 | omap_readw(ULPD_CLOCK_CTRL), |
2388 | __REG16(ULPD_SOFT_REQ), | 2412 | omap_readw(ULPD_SOFT_REQ), |
2389 | __REG16(ULPD_STATUS_REQ)); | 2413 | omap_readw(ULPD_STATUS_REQ)); |
2390 | } | 2414 | } |
2391 | 2415 | ||
2392 | /* OTG controller registers */ | 2416 | /* OTG controller registers */ |
2393 | if (!cpu_is_omap15xx()) | 2417 | if (!cpu_is_omap15xx()) |
2394 | proc_otg_show(s); | 2418 | proc_otg_show(s); |
2395 | 2419 | ||
2396 | tmp = UDC_SYSCON1_REG; | 2420 | tmp = omap_readw(UDC_SYSCON1); |
2397 | seq_printf(s, "\nsyscon1 %04x" EIGHTBITS "\n", tmp, | 2421 | seq_printf(s, "\nsyscon1 %04x" EIGHTBITS "\n", tmp, |
2398 | (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "", | 2422 | (tmp & UDC_CFG_LOCK) ? " cfg_lock" : "", |
2399 | (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "", | 2423 | (tmp & UDC_DATA_ENDIAN) ? " data_endian" : "", |
@@ -2412,7 +2436,7 @@ static int proc_udc_show(struct seq_file *s, void *_) | |||
2412 | return 0; | 2436 | return 0; |
2413 | } | 2437 | } |
2414 | 2438 | ||
2415 | tmp = UDC_DEVSTAT_REG; | 2439 | tmp = omap_readw(UDC_DEVSTAT); |
2416 | seq_printf(s, "devstat %04x" EIGHTBITS "%s%s\n", tmp, | 2440 | seq_printf(s, "devstat %04x" EIGHTBITS "%s%s\n", tmp, |
2417 | (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "", | 2441 | (tmp & UDC_B_HNP_ENABLE) ? " b_hnp" : "", |
2418 | (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "", | 2442 | (tmp & UDC_A_HNP_SUPPORT) ? " a_hnp" : "", |
@@ -2424,20 +2448,20 @@ static int proc_udc_show(struct seq_file *s, void *_) | |||
2424 | (tmp & UDC_ADD) ? " ADD" : "", | 2448 | (tmp & UDC_ADD) ? " ADD" : "", |
2425 | (tmp & UDC_DEF) ? " DEF" : "", | 2449 | (tmp & UDC_DEF) ? " DEF" : "", |
2426 | (tmp & UDC_ATT) ? " ATT" : ""); | 2450 | (tmp & UDC_ATT) ? " ATT" : ""); |
2427 | seq_printf(s, "sof %04x\n", UDC_SOF_REG); | 2451 | seq_printf(s, "sof %04x\n", omap_readw(UDC_SOF)); |
2428 | tmp = UDC_IRQ_EN_REG; | 2452 | tmp = omap_readw(UDC_IRQ_EN); |
2429 | seq_printf(s, "irq_en %04x" FOURBITS "%s\n", tmp, | 2453 | seq_printf(s, "irq_en %04x" FOURBITS "%s\n", tmp, |
2430 | (tmp & UDC_SOF_IE) ? " sof" : "", | 2454 | (tmp & UDC_SOF_IE) ? " sof" : "", |
2431 | (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "", | 2455 | (tmp & UDC_EPN_RX_IE) ? " epn_rx" : "", |
2432 | (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "", | 2456 | (tmp & UDC_EPN_TX_IE) ? " epn_tx" : "", |
2433 | (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "", | 2457 | (tmp & UDC_DS_CHG_IE) ? " ds_chg" : "", |
2434 | (tmp & UDC_EP0_IE) ? " ep0" : ""); | 2458 | (tmp & UDC_EP0_IE) ? " ep0" : ""); |
2435 | tmp = UDC_IRQ_SRC_REG; | 2459 | tmp = omap_readw(UDC_IRQ_SRC); |
2436 | seq_printf(s, "irq_src %04x" EIGHTBITS "%s%s\n", tmp, | 2460 | seq_printf(s, "irq_src %04x" EIGHTBITS "%s%s\n", tmp, |
2437 | (tmp & UDC_TXN_DONE) ? " txn_done" : "", | 2461 | (tmp & UDC_TXN_DONE) ? " txn_done" : "", |
2438 | (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "", | 2462 | (tmp & UDC_RXN_CNT) ? " rxn_cnt" : "", |
2439 | (tmp & UDC_RXN_EOT) ? " rxn_eot" : "", | 2463 | (tmp & UDC_RXN_EOT) ? " rxn_eot" : "", |
2440 | (tmp & UDC_SOF) ? " sof" : "", | 2464 | (tmp & UDC_IRQ_SOF) ? " sof" : "", |
2441 | (tmp & UDC_EPN_RX) ? " epn_rx" : "", | 2465 | (tmp & UDC_EPN_RX) ? " epn_rx" : "", |
2442 | (tmp & UDC_EPN_TX) ? " epn_tx" : "", | 2466 | (tmp & UDC_EPN_TX) ? " epn_tx" : "", |
2443 | (tmp & UDC_DS_CHG) ? " ds_chg" : "", | 2467 | (tmp & UDC_DS_CHG) ? " ds_chg" : "", |
@@ -2447,7 +2471,7 @@ static int proc_udc_show(struct seq_file *s, void *_) | |||
2447 | if (use_dma) { | 2471 | if (use_dma) { |
2448 | unsigned i; | 2472 | unsigned i; |
2449 | 2473 | ||
2450 | tmp = UDC_DMA_IRQ_EN_REG; | 2474 | tmp = omap_readw(UDC_DMA_IRQ_EN); |
2451 | seq_printf(s, "dma_irq_en %04x%s" EIGHTBITS "\n", tmp, | 2475 | seq_printf(s, "dma_irq_en %04x%s" EIGHTBITS "\n", tmp, |
2452 | (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "", | 2476 | (tmp & UDC_TX_DONE_IE(3)) ? " tx2_done" : "", |
2453 | (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "", | 2477 | (tmp & UDC_RX_CNT_IE(3)) ? " rx2_cnt" : "", |
@@ -2461,29 +2485,29 @@ static int proc_udc_show(struct seq_file *s, void *_) | |||
2461 | (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "", | 2485 | (tmp & UDC_RX_CNT_IE(1)) ? " rx0_cnt" : "", |
2462 | (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : ""); | 2486 | (tmp & UDC_RX_EOT_IE(1)) ? " rx0_eot" : ""); |
2463 | 2487 | ||
2464 | tmp = UDC_RXDMA_CFG_REG; | 2488 | tmp = omap_readw(UDC_RXDMA_CFG); |
2465 | seq_printf(s, "rxdma_cfg %04x\n", tmp); | 2489 | seq_printf(s, "rxdma_cfg %04x\n", tmp); |
2466 | if (tmp) { | 2490 | if (tmp) { |
2467 | for (i = 0; i < 3; i++) { | 2491 | for (i = 0; i < 3; i++) { |
2468 | if ((tmp & (0x0f << (i * 4))) == 0) | 2492 | if ((tmp & (0x0f << (i * 4))) == 0) |
2469 | continue; | 2493 | continue; |
2470 | seq_printf(s, "rxdma[%d] %04x\n", i, | 2494 | seq_printf(s, "rxdma[%d] %04x\n", i, |
2471 | UDC_RXDMA_REG(i + 1)); | 2495 | omap_readw(UDC_RXDMA(i + 1))); |
2472 | } | 2496 | } |
2473 | } | 2497 | } |
2474 | tmp = UDC_TXDMA_CFG_REG; | 2498 | tmp = omap_readw(UDC_TXDMA_CFG); |
2475 | seq_printf(s, "txdma_cfg %04x\n", tmp); | 2499 | seq_printf(s, "txdma_cfg %04x\n", tmp); |
2476 | if (tmp) { | 2500 | if (tmp) { |
2477 | for (i = 0; i < 3; i++) { | 2501 | for (i = 0; i < 3; i++) { |
2478 | if (!(tmp & (0x0f << (i * 4)))) | 2502 | if (!(tmp & (0x0f << (i * 4)))) |
2479 | continue; | 2503 | continue; |
2480 | seq_printf(s, "txdma[%d] %04x\n", i, | 2504 | seq_printf(s, "txdma[%d] %04x\n", i, |
2481 | UDC_TXDMA_REG(i + 1)); | 2505 | omap_readw(UDC_TXDMA(i + 1))); |
2482 | } | 2506 | } |
2483 | } | 2507 | } |
2484 | } | 2508 | } |
2485 | 2509 | ||
2486 | tmp = UDC_DEVSTAT_REG; | 2510 | tmp = omap_readw(UDC_DEVSTAT); |
2487 | if (tmp & UDC_ATT) { | 2511 | if (tmp & UDC_ATT) { |
2488 | proc_ep_show(s, &udc->ep[0]); | 2512 | proc_ep_show(s, &udc->ep[0]); |
2489 | if (tmp & UDC_ADD) { | 2513 | if (tmp & UDC_ADD) { |
@@ -2535,7 +2559,7 @@ static inline void remove_proc_file(void) {} | |||
2535 | * buffer space among the endpoints we'll be operating. | 2559 | * buffer space among the endpoints we'll be operating. |
2536 | * | 2560 | * |
2537 | * NOTE: as of OMAP 1710 ES2.0, writing a new endpoint config when | 2561 | * NOTE: as of OMAP 1710 ES2.0, writing a new endpoint config when |
2538 | * UDC_SYSCON_1_REG.CFG_LOCK is set can now work. We won't use that | 2562 | * UDC_SYSCON_1.CFG_LOCK is set can now work. We won't use that |
2539 | * capability yet though. | 2563 | * capability yet though. |
2540 | */ | 2564 | */ |
2541 | static unsigned __init | 2565 | static unsigned __init |
@@ -2597,9 +2621,9 @@ omap_ep_setup(char *name, u8 addr, u8 type, | |||
2597 | name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf); | 2621 | name, addr, epn_rxtx, maxp, dbuf ? "x2" : "", buf); |
2598 | 2622 | ||
2599 | if (addr & USB_DIR_IN) | 2623 | if (addr & USB_DIR_IN) |
2600 | UDC_EP_TX_REG(addr & 0xf) = epn_rxtx; | 2624 | omap_writew(epn_rxtx, UDC_EP_TX(addr & 0xf)); |
2601 | else | 2625 | else |
2602 | UDC_EP_RX_REG(addr) = epn_rxtx; | 2626 | omap_writew(epn_rxtx, UDC_EP_RX(addr)); |
2603 | 2627 | ||
2604 | /* next endpoint's buffer starts after this one's */ | 2628 | /* next endpoint's buffer starts after this one's */ |
2605 | buf += maxp; | 2629 | buf += maxp; |
@@ -2638,15 +2662,15 @@ omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv) | |||
2638 | unsigned tmp, buf; | 2662 | unsigned tmp, buf; |
2639 | 2663 | ||
2640 | /* abolish any previous hardware state */ | 2664 | /* abolish any previous hardware state */ |
2641 | UDC_SYSCON1_REG = 0; | 2665 | omap_writew(0, UDC_SYSCON1); |
2642 | UDC_IRQ_EN_REG = 0; | 2666 | omap_writew(0, UDC_IRQ_EN); |
2643 | UDC_IRQ_SRC_REG = UDC_IRQ_SRC_MASK; | 2667 | omap_writew(UDC_IRQ_SRC_MASK, UDC_IRQ_SRC); |
2644 | UDC_DMA_IRQ_EN_REG = 0; | 2668 | omap_writew(0, UDC_DMA_IRQ_EN); |
2645 | UDC_RXDMA_CFG_REG = 0; | 2669 | omap_writew(0, UDC_RXDMA_CFG); |
2646 | UDC_TXDMA_CFG_REG = 0; | 2670 | omap_writew(0, UDC_TXDMA_CFG); |
2647 | 2671 | ||
2648 | /* UDC_PULLUP_EN gates the chip clock */ | 2672 | /* UDC_PULLUP_EN gates the chip clock */ |
2649 | // OTG_SYSCON_1_REG |= DEV_IDLE_EN; | 2673 | // OTG_SYSCON_1 |= DEV_IDLE_EN; |
2650 | 2674 | ||
2651 | udc = kzalloc(sizeof(*udc), GFP_KERNEL); | 2675 | udc = kzalloc(sizeof(*udc), GFP_KERNEL); |
2652 | if (!udc) | 2676 | if (!udc) |
@@ -2677,8 +2701,8 @@ omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv) | |||
2677 | 2701 | ||
2678 | /* initially disable all non-ep0 endpoints */ | 2702 | /* initially disable all non-ep0 endpoints */ |
2679 | for (tmp = 1; tmp < 15; tmp++) { | 2703 | for (tmp = 1; tmp < 15; tmp++) { |
2680 | UDC_EP_RX_REG(tmp) = 0; | 2704 | omap_writew(0, UDC_EP_RX(tmp)); |
2681 | UDC_EP_TX_REG(tmp) = 0; | 2705 | omap_writew(0, UDC_EP_TX(tmp)); |
2682 | } | 2706 | } |
2683 | 2707 | ||
2684 | #define OMAP_BULK_EP(name,addr) \ | 2708 | #define OMAP_BULK_EP(name,addr) \ |
@@ -2763,7 +2787,7 @@ omap_udc_setup(struct platform_device *odev, struct otg_transceiver *xceiv) | |||
2763 | ERR("unsupported fifo_mode #%d\n", fifo_mode); | 2787 | ERR("unsupported fifo_mode #%d\n", fifo_mode); |
2764 | return -ENODEV; | 2788 | return -ENODEV; |
2765 | } | 2789 | } |
2766 | UDC_SYSCON1_REG = UDC_CFG_LOCK|UDC_SELF_PWR; | 2790 | omap_writew(UDC_CFG_LOCK|UDC_SELF_PWR, UDC_SYSCON1); |
2767 | INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf); | 2791 | INFO("fifo mode %d, %d bytes not used\n", fifo_mode, 2048 - buf); |
2768 | return 0; | 2792 | return 0; |
2769 | } | 2793 | } |
@@ -2807,7 +2831,7 @@ static int __init omap_udc_probe(struct platform_device *pdev) | |||
2807 | } | 2831 | } |
2808 | 2832 | ||
2809 | INFO("OMAP UDC rev %d.%d%s\n", | 2833 | INFO("OMAP UDC rev %d.%d%s\n", |
2810 | UDC_REV_REG >> 4, UDC_REV_REG & 0xf, | 2834 | omap_readw(UDC_REV) >> 4, omap_readw(UDC_REV) & 0xf, |
2811 | config->otg ? ", Mini-AB" : ""); | 2835 | config->otg ? ", Mini-AB" : ""); |
2812 | 2836 | ||
2813 | /* use the mode given to us by board init code */ | 2837 | /* use the mode given to us by board init code */ |
@@ -2822,12 +2846,12 @@ static int __init omap_udc_probe(struct platform_device *pdev) | |||
2822 | * know when to turn PULLUP_EN on/off; and that | 2846 | * know when to turn PULLUP_EN on/off; and that |
2823 | * means we always "need" the 48MHz clock. | 2847 | * means we always "need" the 48MHz clock. |
2824 | */ | 2848 | */ |
2825 | u32 tmp = FUNC_MUX_CTRL_0_REG; | 2849 | u32 tmp = omap_readl(FUNC_MUX_CTRL_0); |
2826 | 2850 | tmp &= ~VBUS_CTRL_1510; | |
2827 | FUNC_MUX_CTRL_0_REG &= ~VBUS_CTRL_1510; | 2851 | omap_writel(tmp, FUNC_MUX_CTRL_0); |
2828 | tmp |= VBUS_MODE_1510; | 2852 | tmp |= VBUS_MODE_1510; |
2829 | tmp &= ~VBUS_CTRL_1510; | 2853 | tmp &= ~VBUS_CTRL_1510; |
2830 | FUNC_MUX_CTRL_0_REG = tmp; | 2854 | omap_writel(tmp, FUNC_MUX_CTRL_0); |
2831 | } | 2855 | } |
2832 | } else { | 2856 | } else { |
2833 | /* The transceiver may package some GPIO logic or handle | 2857 | /* The transceiver may package some GPIO logic or handle |
@@ -2907,7 +2931,7 @@ known: | |||
2907 | #endif | 2931 | #endif |
2908 | 2932 | ||
2909 | /* starting with omap1710 es2.0, clear toggle is a separate bit */ | 2933 | /* starting with omap1710 es2.0, clear toggle is a separate bit */ |
2910 | if (UDC_REV_REG >= 0x61) | 2934 | if (omap_readw(UDC_REV) >= 0x61) |
2911 | udc->clr_halt = UDC_RESET_EP | UDC_CLRDATA_TOGGLE; | 2935 | udc->clr_halt = UDC_RESET_EP | UDC_CLRDATA_TOGGLE; |
2912 | else | 2936 | else |
2913 | udc->clr_halt = UDC_RESET_EP; | 2937 | udc->clr_halt = UDC_RESET_EP; |
@@ -3005,7 +3029,7 @@ static int __exit omap_udc_remove(struct platform_device *pdev) | |||
3005 | put_device(udc->transceiver->dev); | 3029 | put_device(udc->transceiver->dev); |
3006 | udc->transceiver = NULL; | 3030 | udc->transceiver = NULL; |
3007 | } | 3031 | } |
3008 | UDC_SYSCON1_REG = 0; | 3032 | omap_writew(0, UDC_SYSCON1); |
3009 | 3033 | ||
3010 | remove_proc_file(); | 3034 | remove_proc_file(); |
3011 | 3035 | ||
@@ -3036,7 +3060,7 @@ static int __exit omap_udc_remove(struct platform_device *pdev) | |||
3036 | * | 3060 | * |
3037 | * REVISIT we should probably reject suspend requests when there's a host | 3061 | * REVISIT we should probably reject suspend requests when there's a host |
3038 | * session active, rather than disconnecting, at least on boards that can | 3062 | * session active, rather than disconnecting, at least on boards that can |
3039 | * report VBUS irqs (UDC_DEVSTAT_REG.UDC_ATT). And in any case, we need to | 3063 | * report VBUS irqs (UDC_DEVSTAT.UDC_ATT). And in any case, we need to |
3040 | * make host resumes and VBUS detection trigger OMAP wakeup events; that | 3064 | * make host resumes and VBUS detection trigger OMAP wakeup events; that |
3041 | * may involve talking to an external transceiver (e.g. isp1301). | 3065 | * may involve talking to an external transceiver (e.g. isp1301). |
3042 | */ | 3066 | */ |
@@ -3045,7 +3069,7 @@ static int omap_udc_suspend(struct platform_device *dev, pm_message_t message) | |||
3045 | { | 3069 | { |
3046 | u32 devstat; | 3070 | u32 devstat; |
3047 | 3071 | ||
3048 | devstat = UDC_DEVSTAT_REG; | 3072 | devstat = omap_readw(UDC_DEVSTAT); |
3049 | 3073 | ||
3050 | /* we're requesting 48 MHz clock if the pullup is enabled | 3074 | /* we're requesting 48 MHz clock if the pullup is enabled |
3051 | * (== we're attached to the host) and we're not suspended, | 3075 | * (== we're attached to the host) and we're not suspended, |
diff --git a/drivers/usb/gadget/omap_udc.h b/drivers/usb/gadget/omap_udc.h index c6b9cbc7230a..8522bbb12278 100644 --- a/drivers/usb/gadget/omap_udc.h +++ b/drivers/usb/gadget/omap_udc.h | |||
@@ -8,23 +8,22 @@ | |||
8 | /* | 8 | /* |
9 | * USB device/endpoint management registers | 9 | * USB device/endpoint management registers |
10 | */ | 10 | */ |
11 | #define UDC_REG(offset) __REG16(UDC_BASE + (offset)) | ||
12 | 11 | ||
13 | #define UDC_REV_REG UDC_REG(0x0) /* Revision */ | 12 | #define UDC_REV (UDC_BASE + 0x0) /* Revision */ |
14 | #define UDC_EP_NUM_REG UDC_REG(0x4) /* Which endpoint */ | 13 | #define UDC_EP_NUM (UDC_BASE + 0x4) /* Which endpoint */ |
15 | # define UDC_SETUP_SEL (1 << 6) | 14 | # define UDC_SETUP_SEL (1 << 6) |
16 | # define UDC_EP_SEL (1 << 5) | 15 | # define UDC_EP_SEL (1 << 5) |
17 | # define UDC_EP_DIR (1 << 4) | 16 | # define UDC_EP_DIR (1 << 4) |
18 | /* low 4 bits for endpoint number */ | 17 | /* low 4 bits for endpoint number */ |
19 | #define UDC_DATA_REG UDC_REG(0x08) /* Endpoint FIFO */ | 18 | #define UDC_DATA (UDC_BASE + 0x08) /* Endpoint FIFO */ |
20 | #define UDC_CTRL_REG UDC_REG(0x0C) /* Endpoint control */ | 19 | #define UDC_CTRL (UDC_BASE + 0x0C) /* Endpoint control */ |
21 | # define UDC_CLR_HALT (1 << 7) | 20 | # define UDC_CLR_HALT (1 << 7) |
22 | # define UDC_SET_HALT (1 << 6) | 21 | # define UDC_SET_HALT (1 << 6) |
23 | # define UDC_CLRDATA_TOGGLE (1 << 3) | 22 | # define UDC_CLRDATA_TOGGLE (1 << 3) |
24 | # define UDC_SET_FIFO_EN (1 << 2) | 23 | # define UDC_SET_FIFO_EN (1 << 2) |
25 | # define UDC_CLR_EP (1 << 1) | 24 | # define UDC_CLR_EP (1 << 1) |
26 | # define UDC_RESET_EP (1 << 0) | 25 | # define UDC_RESET_EP (1 << 0) |
27 | #define UDC_STAT_FLG_REG UDC_REG(0x10) /* Endpoint status */ | 26 | #define UDC_STAT_FLG (UDC_BASE + 0x10) /* Endpoint status */ |
28 | # define UDC_NO_RXPACKET (1 << 15) | 27 | # define UDC_NO_RXPACKET (1 << 15) |
29 | # define UDC_MISS_IN (1 << 14) | 28 | # define UDC_MISS_IN (1 << 14) |
30 | # define UDC_DATA_FLUSH (1 << 13) | 29 | # define UDC_DATA_FLUSH (1 << 13) |
@@ -38,8 +37,8 @@ | |||
38 | # define UDC_FIFO_EN (1 << 2) | 37 | # define UDC_FIFO_EN (1 << 2) |
39 | # define UDC_NON_ISO_FIFO_EMPTY (1 << 1) | 38 | # define UDC_NON_ISO_FIFO_EMPTY (1 << 1) |
40 | # define UDC_NON_ISO_FIFO_FULL (1 << 0) | 39 | # define UDC_NON_ISO_FIFO_FULL (1 << 0) |
41 | #define UDC_RXFSTAT_REG UDC_REG(0x14) /* OUT bytecount */ | 40 | #define UDC_RXFSTAT (UDC_BASE + 0x14) /* OUT bytecount */ |
42 | #define UDC_SYSCON1_REG UDC_REG(0x18) /* System config 1 */ | 41 | #define UDC_SYSCON1 (UDC_BASE + 0x18) /* System config 1 */ |
43 | # define UDC_CFG_LOCK (1 << 8) | 42 | # define UDC_CFG_LOCK (1 << 8) |
44 | # define UDC_DATA_ENDIAN (1 << 7) | 43 | # define UDC_DATA_ENDIAN (1 << 7) |
45 | # define UDC_DMA_ENDIAN (1 << 6) | 44 | # define UDC_DMA_ENDIAN (1 << 6) |
@@ -48,12 +47,12 @@ | |||
48 | # define UDC_SELF_PWR (1 << 2) | 47 | # define UDC_SELF_PWR (1 << 2) |
49 | # define UDC_SOFF_DIS (1 << 1) | 48 | # define UDC_SOFF_DIS (1 << 1) |
50 | # define UDC_PULLUP_EN (1 << 0) | 49 | # define UDC_PULLUP_EN (1 << 0) |
51 | #define UDC_SYSCON2_REG UDC_REG(0x1C) /* System config 2 */ | 50 | #define UDC_SYSCON2 (UDC_BASE + 0x1C) /* System config 2 */ |
52 | # define UDC_RMT_WKP (1 << 6) | 51 | # define UDC_RMT_WKP (1 << 6) |
53 | # define UDC_STALL_CMD (1 << 5) | 52 | # define UDC_STALL_CMD (1 << 5) |
54 | # define UDC_DEV_CFG (1 << 3) | 53 | # define UDC_DEV_CFG (1 << 3) |
55 | # define UDC_CLR_CFG (1 << 2) | 54 | # define UDC_CLR_CFG (1 << 2) |
56 | #define UDC_DEVSTAT_REG UDC_REG(0x20) /* Device status */ | 55 | #define UDC_DEVSTAT (UDC_BASE + 0x20) /* Device status */ |
57 | # define UDC_B_HNP_ENABLE (1 << 9) | 56 | # define UDC_B_HNP_ENABLE (1 << 9) |
58 | # define UDC_A_HNP_SUPPORT (1 << 8) | 57 | # define UDC_A_HNP_SUPPORT (1 << 8) |
59 | # define UDC_A_ALT_HNP_SUPPORT (1 << 7) | 58 | # define UDC_A_ALT_HNP_SUPPORT (1 << 7) |
@@ -64,26 +63,26 @@ | |||
64 | # define UDC_ADD (1 << 2) | 63 | # define UDC_ADD (1 << 2) |
65 | # define UDC_DEF (1 << 1) | 64 | # define UDC_DEF (1 << 1) |
66 | # define UDC_ATT (1 << 0) | 65 | # define UDC_ATT (1 << 0) |
67 | #define UDC_SOF_REG UDC_REG(0x24) /* Start of frame */ | 66 | #define UDC_SOF (UDC_BASE + 0x24) /* Start of frame */ |
68 | # define UDC_FT_LOCK (1 << 12) | 67 | # define UDC_FT_LOCK (1 << 12) |
69 | # define UDC_TS_OK (1 << 11) | 68 | # define UDC_TS_OK (1 << 11) |
70 | # define UDC_TS 0x03ff | 69 | # define UDC_TS 0x03ff |
71 | #define UDC_IRQ_EN_REG UDC_REG(0x28) /* Interrupt enable */ | 70 | #define UDC_IRQ_EN (UDC_BASE + 0x28) /* Interrupt enable */ |
72 | # define UDC_SOF_IE (1 << 7) | 71 | # define UDC_SOF_IE (1 << 7) |
73 | # define UDC_EPN_RX_IE (1 << 5) | 72 | # define UDC_EPN_RX_IE (1 << 5) |
74 | # define UDC_EPN_TX_IE (1 << 4) | 73 | # define UDC_EPN_TX_IE (1 << 4) |
75 | # define UDC_DS_CHG_IE (1 << 3) | 74 | # define UDC_DS_CHG_IE (1 << 3) |
76 | # define UDC_EP0_IE (1 << 0) | 75 | # define UDC_EP0_IE (1 << 0) |
77 | #define UDC_DMA_IRQ_EN_REG UDC_REG(0x2C) /* DMA irq enable */ | 76 | #define UDC_DMA_IRQ_EN (UDC_BASE + 0x2C) /* DMA irq enable */ |
78 | /* rx/tx dma channels numbered 1-3 not 0-2 */ | 77 | /* rx/tx dma channels numbered 1-3 not 0-2 */ |
79 | # define UDC_TX_DONE_IE(n) (1 << (4 * (n) - 2)) | 78 | # define UDC_TX_DONE_IE(n) (1 << (4 * (n) - 2)) |
80 | # define UDC_RX_CNT_IE(n) (1 << (4 * (n) - 3)) | 79 | # define UDC_RX_CNT_IE(n) (1 << (4 * (n) - 3)) |
81 | # define UDC_RX_EOT_IE(n) (1 << (4 * (n) - 4)) | 80 | # define UDC_RX_EOT_IE(n) (1 << (4 * (n) - 4)) |
82 | #define UDC_IRQ_SRC_REG UDC_REG(0x30) /* Interrupt source */ | 81 | #define UDC_IRQ_SRC (UDC_BASE + 0x30) /* Interrupt source */ |
83 | # define UDC_TXN_DONE (1 << 10) | 82 | # define UDC_TXN_DONE (1 << 10) |
84 | # define UDC_RXN_CNT (1 << 9) | 83 | # define UDC_RXN_CNT (1 << 9) |
85 | # define UDC_RXN_EOT (1 << 8) | 84 | # define UDC_RXN_EOT (1 << 8) |
86 | # define UDC_SOF (1 << 7) | 85 | # define UDC_IRQ_SOF (1 << 7) |
87 | # define UDC_EPN_RX (1 << 5) | 86 | # define UDC_EPN_RX (1 << 5) |
88 | # define UDC_EPN_TX (1 << 4) | 87 | # define UDC_EPN_TX (1 << 4) |
89 | # define UDC_DS_CHG (1 << 3) | 88 | # define UDC_DS_CHG (1 << 3) |
@@ -91,41 +90,41 @@ | |||
91 | # define UDC_EP0_RX (1 << 1) | 90 | # define UDC_EP0_RX (1 << 1) |
92 | # define UDC_EP0_TX (1 << 0) | 91 | # define UDC_EP0_TX (1 << 0) |
93 | # define UDC_IRQ_SRC_MASK 0x7bf | 92 | # define UDC_IRQ_SRC_MASK 0x7bf |
94 | #define UDC_EPN_STAT_REG UDC_REG(0x34) /* EP irq status */ | 93 | #define UDC_EPN_STAT (UDC_BASE + 0x34) /* EP irq status */ |
95 | #define UDC_DMAN_STAT_REG UDC_REG(0x38) /* DMA irq status */ | 94 | #define UDC_DMAN_STAT (UDC_BASE + 0x38) /* DMA irq status */ |
96 | # define UDC_DMA_RX_SB (1 << 12) | 95 | # define UDC_DMA_RX_SB (1 << 12) |
97 | # define UDC_DMA_RX_SRC(x) (((x)>>8) & 0xf) | 96 | # define UDC_DMA_RX_SRC(x) (((x)>>8) & 0xf) |
98 | # define UDC_DMA_TX_SRC(x) (((x)>>0) & 0xf) | 97 | # define UDC_DMA_TX_SRC(x) (((x)>>0) & 0xf) |
99 | 98 | ||
100 | 99 | ||
101 | /* DMA configuration registers: up to three channels in each direction. */ | 100 | /* DMA configuration registers: up to three channels in each direction. */ |
102 | #define UDC_RXDMA_CFG_REG UDC_REG(0x40) /* 3 eps for RX DMA */ | 101 | #define UDC_RXDMA_CFG (UDC_BASE + 0x40) /* 3 eps for RX DMA */ |
103 | # define UDC_DMA_REQ (1 << 12) | 102 | # define UDC_DMA_REQ (1 << 12) |
104 | #define UDC_TXDMA_CFG_REG UDC_REG(0x44) /* 3 eps for TX DMA */ | 103 | #define UDC_TXDMA_CFG (UDC_BASE + 0x44) /* 3 eps for TX DMA */ |
105 | #define UDC_DATA_DMA_REG UDC_REG(0x48) /* rx/tx fifo addr */ | 104 | #define UDC_DATA_DMA (UDC_BASE + 0x48) /* rx/tx fifo addr */ |
106 | 105 | ||
107 | /* rx/tx dma control, numbering channels 1-3 not 0-2 */ | 106 | /* rx/tx dma control, numbering channels 1-3 not 0-2 */ |
108 | #define UDC_TXDMA_REG(chan) UDC_REG(0x50 - 4 + 4 * (chan)) | 107 | #define UDC_TXDMA(chan) (UDC_BASE + 0x50 - 4 + 4 * (chan)) |
109 | # define UDC_TXN_EOT (1 << 15) /* bytes vs packets */ | 108 | # define UDC_TXN_EOT (1 << 15) /* bytes vs packets */ |
110 | # define UDC_TXN_START (1 << 14) /* start transfer */ | 109 | # define UDC_TXN_START (1 << 14) /* start transfer */ |
111 | # define UDC_TXN_TSC 0x03ff /* units in xfer */ | 110 | # define UDC_TXN_TSC 0x03ff /* units in xfer */ |
112 | #define UDC_RXDMA_REG(chan) UDC_REG(0x60 - 4 + 4 * (chan)) | 111 | #define UDC_RXDMA(chan) (UDC_BASE + 0x60 - 4 + 4 * (chan)) |
113 | # define UDC_RXN_STOP (1 << 15) /* enable EOT irq */ | 112 | # define UDC_RXN_STOP (1 << 15) /* enable EOT irq */ |
114 | # define UDC_RXN_TC 0x00ff /* packets in xfer */ | 113 | # define UDC_RXN_TC 0x00ff /* packets in xfer */ |
115 | 114 | ||
116 | 115 | ||
117 | /* | 116 | /* |
118 | * Endpoint configuration registers (used before CFG_LOCK is set) | 117 | * Endpoint configuration registers (used before CFG_LOCK is set) |
119 | * UDC_EP_TX_REG(0) is unused | 118 | * UDC_EP_TX(0) is unused |
120 | */ | 119 | */ |
121 | #define UDC_EP_RX_REG(endpoint) UDC_REG(0x80 + (endpoint)*4) | 120 | #define UDC_EP_RX(endpoint) (UDC_BASE + 0x80 + (endpoint)*4) |
122 | # define UDC_EPN_RX_VALID (1 << 15) | 121 | # define UDC_EPN_RX_VALID (1 << 15) |
123 | # define UDC_EPN_RX_DB (1 << 14) | 122 | # define UDC_EPN_RX_DB (1 << 14) |
124 | /* buffer size in bits 13, 12 */ | 123 | /* buffer size in bits 13, 12 */ |
125 | # define UDC_EPN_RX_ISO (1 << 11) | 124 | # define UDC_EPN_RX_ISO (1 << 11) |
126 | /* buffer pointer in low 11 bits */ | 125 | /* buffer pointer in low 11 bits */ |
127 | #define UDC_EP_TX_REG(endpoint) UDC_REG(0xc0 + (endpoint)*4) | 126 | #define UDC_EP_TX(endpoint) (UDC_BASE + 0xc0 + (endpoint)*4) |
128 | /* same bitfields as in RX_REG */ | 127 | /* same bitfields as in RX */ |
129 | 128 | ||
130 | /*-------------------------------------------------------------------------*/ | 129 | /*-------------------------------------------------------------------------*/ |
131 | 130 | ||
@@ -195,14 +194,14 @@ struct omap_udc { | |||
195 | 194 | ||
196 | /*-------------------------------------------------------------------------*/ | 195 | /*-------------------------------------------------------------------------*/ |
197 | 196 | ||
198 | #define MOD_CONF_CTRL_0_REG __REG32(MOD_CONF_CTRL_0) | 197 | /* MOD_CONF_CTRL_0 */ |
199 | #define VBUS_W2FC_1510 (1 << 17) /* 0 gpio0, 1 dvdd2 pin */ | 198 | #define VBUS_W2FC_1510 (1 << 17) /* 0 gpio0, 1 dvdd2 pin */ |
200 | 199 | ||
201 | #define FUNC_MUX_CTRL_0_REG __REG32(FUNC_MUX_CTRL_0) | 200 | /* FUNC_MUX_CTRL_0 */ |
202 | #define VBUS_CTRL_1510 (1 << 19) /* 1 connected (software) */ | 201 | #define VBUS_CTRL_1510 (1 << 19) /* 1 connected (software) */ |
203 | #define VBUS_MODE_1510 (1 << 18) /* 0 hardware, 1 software */ | 202 | #define VBUS_MODE_1510 (1 << 18) /* 0 hardware, 1 software */ |
204 | 203 | ||
205 | #define HMC_1510 ((MOD_CONF_CTRL_0_REG >> 1) & 0x3f) | 204 | #define HMC_1510 ((omap_readl(MOD_CONF_CTRL_0) >> 1) & 0x3f) |
206 | #define HMC_1610 (OTG_SYSCON_2_REG & 0x3f) | 205 | #define HMC_1610 (omap_readl(OTG_SYSCON_2) & 0x3f) |
207 | #define HMC (cpu_is_omap15xx() ? HMC_1510 : HMC_1610) | 206 | #define HMC (cpu_is_omap15xx() ? HMC_1510 : HMC_1610) |
208 | 207 | ||
diff --git a/drivers/usb/host/ohci-omap.c b/drivers/usb/host/ohci-omap.c index 6859fb5f1d6f..2b7c04079d56 100644 --- a/drivers/usb/host/ohci-omap.c +++ b/drivers/usb/host/ohci-omap.c | |||
@@ -169,13 +169,16 @@ static void start_hnp(struct ohci_hcd *ohci) | |||
169 | { | 169 | { |
170 | const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1; | 170 | const unsigned port = ohci_to_hcd(ohci)->self.otg_port - 1; |
171 | unsigned long flags; | 171 | unsigned long flags; |
172 | u32 l; | ||
172 | 173 | ||
173 | otg_start_hnp(ohci->transceiver); | 174 | otg_start_hnp(ohci->transceiver); |
174 | 175 | ||
175 | local_irq_save(flags); | 176 | local_irq_save(flags); |
176 | ohci->transceiver->state = OTG_STATE_A_SUSPEND; | 177 | ohci->transceiver->state = OTG_STATE_A_SUSPEND; |
177 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); | 178 | writel (RH_PS_PSS, &ohci->regs->roothub.portstatus [port]); |
178 | OTG_CTRL_REG &= ~OTG_A_BUSREQ; | 179 | l = omap_readl(OTG_CTRL); |
180 | l &= ~OTG_A_BUSREQ; | ||
181 | omap_writel(l, OTG_CTRL); | ||
179 | local_irq_restore(flags); | 182 | local_irq_restore(flags); |
180 | } | 183 | } |
181 | 184 | ||
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c index 7dcda187d9ba..fafe7db20d6d 100644 --- a/drivers/video/pxafb.c +++ b/drivers/video/pxafb.c | |||
@@ -1246,7 +1246,7 @@ static int pxafb_resume(struct platform_device *dev) | |||
1246 | * cache. Once this area is remapped, all virtual memory | 1246 | * cache. Once this area is remapped, all virtual memory |
1247 | * access to the video memory should occur at the new region. | 1247 | * access to the video memory should occur at the new region. |
1248 | */ | 1248 | */ |
1249 | static int __init pxafb_map_video_memory(struct pxafb_info *fbi) | 1249 | static int __devinit pxafb_map_video_memory(struct pxafb_info *fbi) |
1250 | { | 1250 | { |
1251 | /* | 1251 | /* |
1252 | * We reserve one page for the palette, plus the size | 1252 | * We reserve one page for the palette, plus the size |
@@ -1348,7 +1348,7 @@ decode_mode: | |||
1348 | pxafb_decode_mode_info(fbi, inf->modes, inf->num_modes); | 1348 | pxafb_decode_mode_info(fbi, inf->modes, inf->num_modes); |
1349 | } | 1349 | } |
1350 | 1350 | ||
1351 | static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev) | 1351 | static struct pxafb_info * __devinit pxafb_init_fbinfo(struct device *dev) |
1352 | { | 1352 | { |
1353 | struct pxafb_info *fbi; | 1353 | struct pxafb_info *fbi; |
1354 | void *addr; | 1354 | void *addr; |
@@ -1410,7 +1410,7 @@ static struct pxafb_info * __init pxafb_init_fbinfo(struct device *dev) | |||
1410 | } | 1410 | } |
1411 | 1411 | ||
1412 | #ifdef CONFIG_FB_PXA_PARAMETERS | 1412 | #ifdef CONFIG_FB_PXA_PARAMETERS |
1413 | static int __init parse_opt_mode(struct device *dev, const char *this_opt) | 1413 | static int __devinit parse_opt_mode(struct device *dev, const char *this_opt) |
1414 | { | 1414 | { |
1415 | struct pxafb_mach_info *inf = dev->platform_data; | 1415 | struct pxafb_mach_info *inf = dev->platform_data; |
1416 | 1416 | ||
@@ -1469,7 +1469,7 @@ done: | |||
1469 | return 0; | 1469 | return 0; |
1470 | } | 1470 | } |
1471 | 1471 | ||
1472 | static int __init parse_opt(struct device *dev, char *this_opt) | 1472 | static int __devinit parse_opt(struct device *dev, char *this_opt) |
1473 | { | 1473 | { |
1474 | struct pxafb_mach_info *inf = dev->platform_data; | 1474 | struct pxafb_mach_info *inf = dev->platform_data; |
1475 | struct pxafb_mode_info *mode = &inf->modes[0]; | 1475 | struct pxafb_mode_info *mode = &inf->modes[0]; |
@@ -1567,7 +1567,7 @@ static int __init parse_opt(struct device *dev, char *this_opt) | |||
1567 | return 0; | 1567 | return 0; |
1568 | } | 1568 | } |
1569 | 1569 | ||
1570 | static int __init pxafb_parse_options(struct device *dev, char *options) | 1570 | static int __devinit pxafb_parse_options(struct device *dev, char *options) |
1571 | { | 1571 | { |
1572 | char *this_opt; | 1572 | char *this_opt; |
1573 | int ret; | 1573 | int ret; |
@@ -1588,8 +1588,8 @@ static int __init pxafb_parse_options(struct device *dev, char *options) | |||
1588 | 1588 | ||
1589 | static char g_options[256] __devinitdata = ""; | 1589 | static char g_options[256] __devinitdata = ""; |
1590 | 1590 | ||
1591 | #ifndef CONFIG_MODULES | 1591 | #ifndef MODULE |
1592 | static int __devinit pxafb_setup_options(void) | 1592 | static int __init pxafb_setup_options(void) |
1593 | { | 1593 | { |
1594 | char *options = NULL; | 1594 | char *options = NULL; |
1595 | 1595 | ||
@@ -1613,7 +1613,7 @@ MODULE_PARM_DESC(options, "LCD parameters (see Documentation/fb/pxafb.txt)"); | |||
1613 | #define pxafb_setup_options() (0) | 1613 | #define pxafb_setup_options() (0) |
1614 | #endif | 1614 | #endif |
1615 | 1615 | ||
1616 | static int __init pxafb_probe(struct platform_device *dev) | 1616 | static int __devinit pxafb_probe(struct platform_device *dev) |
1617 | { | 1617 | { |
1618 | struct pxafb_info *fbi; | 1618 | struct pxafb_info *fbi; |
1619 | struct pxafb_mach_info *inf; | 1619 | struct pxafb_mach_info *inf; |
@@ -1685,14 +1685,14 @@ static int __init pxafb_probe(struct platform_device *dev) | |||
1685 | if (r == NULL) { | 1685 | if (r == NULL) { |
1686 | dev_err(&dev->dev, "no I/O memory resource defined\n"); | 1686 | dev_err(&dev->dev, "no I/O memory resource defined\n"); |
1687 | ret = -ENODEV; | 1687 | ret = -ENODEV; |
1688 | goto failed; | 1688 | goto failed_fbi; |
1689 | } | 1689 | } |
1690 | 1690 | ||
1691 | r = request_mem_region(r->start, r->end - r->start + 1, dev->name); | 1691 | r = request_mem_region(r->start, r->end - r->start + 1, dev->name); |
1692 | if (r == NULL) { | 1692 | if (r == NULL) { |
1693 | dev_err(&dev->dev, "failed to request I/O memory\n"); | 1693 | dev_err(&dev->dev, "failed to request I/O memory\n"); |
1694 | ret = -EBUSY; | 1694 | ret = -EBUSY; |
1695 | goto failed; | 1695 | goto failed_fbi; |
1696 | } | 1696 | } |
1697 | 1697 | ||
1698 | fbi->mmio_base = ioremap(r->start, r->end - r->start + 1); | 1698 | fbi->mmio_base = ioremap(r->start, r->end - r->start + 1); |
@@ -1735,8 +1735,17 @@ static int __init pxafb_probe(struct platform_device *dev) | |||
1735 | * This makes sure that our colour bitfield | 1735 | * This makes sure that our colour bitfield |
1736 | * descriptors are correctly initialised. | 1736 | * descriptors are correctly initialised. |
1737 | */ | 1737 | */ |
1738 | pxafb_check_var(&fbi->fb.var, &fbi->fb); | 1738 | ret = pxafb_check_var(&fbi->fb.var, &fbi->fb); |
1739 | pxafb_set_par(&fbi->fb); | 1739 | if (ret) { |
1740 | dev_err(&dev->dev, "failed to get suitable mode\n"); | ||
1741 | goto failed_free_irq; | ||
1742 | } | ||
1743 | |||
1744 | ret = pxafb_set_par(&fbi->fb); | ||
1745 | if (ret) { | ||
1746 | dev_err(&dev->dev, "Failed to set parameters\n"); | ||
1747 | goto failed_free_irq; | ||
1748 | } | ||
1740 | 1749 | ||
1741 | platform_set_drvdata(dev, fbi); | 1750 | platform_set_drvdata(dev, fbi); |
1742 | 1751 | ||
@@ -1744,7 +1753,7 @@ static int __init pxafb_probe(struct platform_device *dev) | |||
1744 | if (ret < 0) { | 1753 | if (ret < 0) { |
1745 | dev_err(&dev->dev, | 1754 | dev_err(&dev->dev, |
1746 | "Failed to register framebuffer device: %d\n", ret); | 1755 | "Failed to register framebuffer device: %d\n", ret); |
1747 | goto failed_free_irq; | 1756 | goto failed_free_cmap; |
1748 | } | 1757 | } |
1749 | 1758 | ||
1750 | #ifdef CONFIG_CPU_FREQ | 1759 | #ifdef CONFIG_CPU_FREQ |
@@ -1763,18 +1772,23 @@ static int __init pxafb_probe(struct platform_device *dev) | |||
1763 | 1772 | ||
1764 | return 0; | 1773 | return 0; |
1765 | 1774 | ||
1775 | failed_free_cmap: | ||
1776 | if (fbi->fb.cmap.len) | ||
1777 | fb_dealloc_cmap(&fbi->fb.cmap); | ||
1766 | failed_free_irq: | 1778 | failed_free_irq: |
1767 | free_irq(irq, fbi); | 1779 | free_irq(irq, fbi); |
1768 | failed_free_res: | ||
1769 | release_mem_region(r->start, r->end - r->start + 1); | ||
1770 | failed_free_io: | ||
1771 | iounmap(fbi->mmio_base); | ||
1772 | failed_free_mem: | 1780 | failed_free_mem: |
1773 | dma_free_writecombine(&dev->dev, fbi->map_size, | 1781 | dma_free_writecombine(&dev->dev, fbi->map_size, |
1774 | fbi->map_cpu, fbi->map_dma); | 1782 | fbi->map_cpu, fbi->map_dma); |
1775 | failed: | 1783 | failed_free_io: |
1784 | iounmap(fbi->mmio_base); | ||
1785 | failed_free_res: | ||
1786 | release_mem_region(r->start, r->end - r->start + 1); | ||
1787 | failed_fbi: | ||
1788 | clk_put(fbi->clk); | ||
1776 | platform_set_drvdata(dev, NULL); | 1789 | platform_set_drvdata(dev, NULL); |
1777 | kfree(fbi); | 1790 | kfree(fbi); |
1791 | failed: | ||
1778 | return ret; | 1792 | return ret; |
1779 | } | 1793 | } |
1780 | 1794 | ||
@@ -1787,7 +1801,7 @@ static struct platform_driver pxafb_driver = { | |||
1787 | }, | 1801 | }, |
1788 | }; | 1802 | }; |
1789 | 1803 | ||
1790 | static int __devinit pxafb_init(void) | 1804 | static int __init pxafb_init(void) |
1791 | { | 1805 | { |
1792 | if (pxafb_setup_options()) | 1806 | if (pxafb_setup_options()) |
1793 | return -EINVAL; | 1807 | return -EINVAL; |