1 files changed, 7 insertions, 7 deletions

diff --git a/drivers/gpio/gpio-omap.c b/drivers/gpio/gpio-omap.c
index 405ce6fd2e5c..f46b600e5e56 100644
--- a/drivers/gpio/gpio-omap.c
+++ b/drivers/gpio/gpio-omap.c
@@ -689,7 +689,7 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
 {
         void __iomem *isr_reg = NULL;
         u32 isr;
-        unsigned int i;
+        unsigned int bit;
         struct gpio_bank *bank;
         int unmasked = 0;
         struct irq_chip *chip = irq_desc_get_chip(desc);
@@ -730,9 +730,9 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                 if (!isr)
                         break;
 
-                for (i = 0; isr != 0; isr >>= 1, i++) {
-                        if (!(isr & 1))
-                                continue;
+                while (isr) {
+                        bit = __ffs(isr);
+                        isr &= ~(1 << bit);
 
                         /*
                          * Some chips can't respond to both rising and falling
@@ -741,10 +741,10 @@ static void gpio_irq_handler(unsigned int irq, struct irq_desc *desc)
                          * to respond to the IRQ for the opposite direction.
                          * This will be indicated in the bank toggle_mask.
                          */
-                        if (bank->toggle_mask & (1 << i))
-                                _toggle_gpio_edge_triggering(bank, i);
+                        if (bank->toggle_mask & (1 << bit))
+                                _toggle_gpio_edge_triggering(bank, bit);
 
-                        generic_handle_irq(irq_find_mapping(bank->domain, i));
+                        generic_handle_irq(irq_find_mapping(bank->domain, bit));
                 }
         }
         /* if bank has any level sensitive GPIO pin interrupt