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-rw-r--r--drivers/usb/chipidea/Kconfig20
-rw-r--r--drivers/usb/chipidea/Makefile4
-rw-r--r--drivers/usb/chipidea/bits.h71
-rw-r--r--drivers/usb/chipidea/ci.h204
-rw-r--r--drivers/usb/chipidea/ci13xxx_msm.c3
-rw-r--r--drivers/usb/chipidea/ci13xxx_pci.c3
-rw-r--r--drivers/usb/chipidea/ci13xxx_udc.h248
-rw-r--r--drivers/usb/chipidea/core.c324
-rw-r--r--drivers/usb/chipidea/debug.c804
-rw-r--r--drivers/usb/chipidea/debug.h56
-rw-r--r--drivers/usb/chipidea/udc.c (renamed from drivers/usb/chipidea/ci13xxx_udc.c)1182
-rw-r--r--drivers/usb/chipidea/udc.h96
12 files changed, 1597 insertions, 1418 deletions
diff --git a/drivers/usb/chipidea/Kconfig b/drivers/usb/chipidea/Kconfig
index 71725ddc8f25..553c1976a66e 100644
--- a/drivers/usb/chipidea/Kconfig
+++ b/drivers/usb/chipidea/Kconfig
@@ -1,10 +1,26 @@
1config USB_CHIPIDEA 1config USB_CHIPIDEA
2 tristate "ChipIdea Highspeed Dual Role Controller" 2 tristate "ChipIdea Highspeed Dual Role Controller"
3 depends on USB && USB_GADGET 3 depends on USB
4 select USB_GADGET_DUALSPEED
5 help 4 help
6 Say Y here if your system has a dual role high speed USB 5 Say Y here if your system has a dual role high speed USB
7 controller based on ChipIdea silicon IP. Currently, only the 6 controller based on ChipIdea silicon IP. Currently, only the
8 peripheral mode is supported. 7 peripheral mode is supported.
9 8
10 When compiled dynamically, the module will be called ci-hdrc.ko. 9 When compiled dynamically, the module will be called ci-hdrc.ko.
10
11if USB_CHIPIDEA
12
13config USB_CHIPIDEA_UDC
14 bool "ChipIdea device controller"
15 depends on USB_GADGET
16 select USB_GADGET_DUALSPEED
17 help
18 Say Y here to enable device controller functionality of the
19 ChipIdea driver.
20
21config USB_CHIPIDEA_DEBUG
22 bool "ChipIdea driver debug"
23 help
24 Say Y here to enable debugging output of the ChipIdea driver.
25
26endif
diff --git a/drivers/usb/chipidea/Makefile b/drivers/usb/chipidea/Makefile
index e56bedbf9da2..a8279aac6a4a 100644
--- a/drivers/usb/chipidea/Makefile
+++ b/drivers/usb/chipidea/Makefile
@@ -1,6 +1,8 @@
1obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc.o 1obj-$(CONFIG_USB_CHIPIDEA) += ci_hdrc.o
2 2
3ci_hdrc-y := ci13xxx_udc.o 3ci_hdrc-y := core.o
4ci_hdrc-$(CONFIG_USB_CHIPIDEA_UDC) += udc.o
5ci_hdrc-$(CONFIG_USB_CHIPIDEA_DEBUG) += debug.o
4 6
5ifneq ($(CONFIG_PCI),) 7ifneq ($(CONFIG_PCI),)
6 obj-$(CONFIG_USB_CHIPIDEA) += ci13xxx_pci.o 8 obj-$(CONFIG_USB_CHIPIDEA) += ci13xxx_pci.o
diff --git a/drivers/usb/chipidea/bits.h b/drivers/usb/chipidea/bits.h
new file mode 100644
index 000000000000..5fbff11cf220
--- /dev/null
+++ b/drivers/usb/chipidea/bits.h
@@ -0,0 +1,71 @@
1/*
2 * bits.h - register bits of the ChipIdea USB IP core
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_BITS_H
14#define __DRIVERS_USB_CHIPIDEA_BITS_H
15
16/* HCCPARAMS */
17#define HCCPARAMS_LEN BIT(17)
18
19/* DCCPARAMS */
20#define DCCPARAMS_DEN (0x1F << 0)
21#define DCCPARAMS_DC BIT(7)
22
23/* TESTMODE */
24#define TESTMODE_FORCE BIT(0)
25
26/* USBCMD */
27#define USBCMD_RS BIT(0)
28#define USBCMD_RST BIT(1)
29#define USBCMD_SUTW BIT(13)
30#define USBCMD_ATDTW BIT(14)
31
32/* USBSTS & USBINTR */
33#define USBi_UI BIT(0)
34#define USBi_UEI BIT(1)
35#define USBi_PCI BIT(2)
36#define USBi_URI BIT(6)
37#define USBi_SLI BIT(8)
38
39/* DEVICEADDR */
40#define DEVICEADDR_USBADRA BIT(24)
41#define DEVICEADDR_USBADR (0x7FUL << 25)
42
43/* PORTSC */
44#define PORTSC_FPR BIT(6)
45#define PORTSC_SUSP BIT(7)
46#define PORTSC_HSP BIT(9)
47#define PORTSC_PTC (0x0FUL << 16)
48
49/* DEVLC */
50#define DEVLC_PSPD (0x03UL << 25)
51#define DEVLC_PSPD_HS (0x02UL << 25)
52
53/* USBMODE */
54#define USBMODE_CM (0x03UL << 0)
55#define USBMODE_CM_IDLE (0x00UL << 0)
56#define USBMODE_CM_DEVICE (0x02UL << 0)
57#define USBMODE_CM_HOST (0x03UL << 0)
58#define USBMODE_SLOM BIT(3)
59#define USBMODE_SDIS BIT(4)
60
61/* ENDPTCTRL */
62#define ENDPTCTRL_RXS BIT(0)
63#define ENDPTCTRL_RXT (0x03UL << 2)
64#define ENDPTCTRL_RXR BIT(6) /* reserved for port 0 */
65#define ENDPTCTRL_RXE BIT(7)
66#define ENDPTCTRL_TXS BIT(16)
67#define ENDPTCTRL_TXT (0x03UL << 18)
68#define ENDPTCTRL_TXR BIT(22) /* reserved for port 0 */
69#define ENDPTCTRL_TXE BIT(23)
70
71#endif /* __DRIVERS_USB_CHIPIDEA_BITS_H */
diff --git a/drivers/usb/chipidea/ci.h b/drivers/usb/chipidea/ci.h
new file mode 100644
index 000000000000..f5b3b8538a3b
--- /dev/null
+++ b/drivers/usb/chipidea/ci.h
@@ -0,0 +1,204 @@
1/*
2 * ci.h - common structures, functions, and macros of the ChipIdea driver
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_CI_H
14#define __DRIVERS_USB_CHIPIDEA_CI_H
15
16#include <linux/list.h>
17#include <linux/usb/gadget.h>
18
19/******************************************************************************
20 * DEFINE
21 *****************************************************************************/
22#define DMA_ADDR_INVALID (~(dma_addr_t)0)
23#define CI13XXX_PAGE_SIZE 4096ul /* page size for TD's */
24#define ENDPT_MAX 32
25
26/******************************************************************************
27 * STRUCTURES
28 *****************************************************************************/
29/* Extension of usb_ep */
30struct ci13xxx_ep {
31 struct usb_ep ep;
32 u8 dir;
33 u8 num;
34 u8 type;
35 char name[16];
36 struct {
37 struct list_head queue;
38 struct ci13xxx_qh *ptr;
39 dma_addr_t dma;
40 } qh;
41 int wedge;
42
43 /* global resources */
44 struct ci13xxx *udc;
45 spinlock_t *lock;
46 struct device *device;
47 struct dma_pool *td_pool;
48};
49
50struct hw_bank {
51 unsigned lpm; /* is LPM? */
52 void __iomem *abs; /* bus map offset */
53 void __iomem *cap; /* bus map offset + CAP offset */
54 void __iomem *op; /* bus map offset + OP offset */
55 size_t size; /* bank size */
56 void __iomem **regmap;
57};
58
59/* CI13XXX UDC descriptor & global resources */
60struct ci13xxx {
61 spinlock_t lock; /* ctrl register bank access */
62 void __iomem *regs; /* registers address space */
63
64 struct dma_pool *qh_pool; /* DMA pool for queue heads */
65 struct dma_pool *td_pool; /* DMA pool for transfer descs */
66 struct usb_request *status; /* ep0 status request */
67
68 struct device *dev;
69 struct usb_gadget gadget; /* USB slave device */
70 struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */
71 u32 ep0_dir; /* ep0 direction */
72 struct ci13xxx_ep *ep0out, *ep0in;
73 unsigned hw_ep_max; /* number of hw endpoints */
74
75 bool setaddr;
76 u8 address;
77 u8 remote_wakeup; /* Is remote wakeup feature
78 enabled by the host? */
79 u8 suspended; /* suspended by the host */
80 u8 test_mode; /* the selected test mode */
81
82 struct hw_bank hw_bank;
83 int irq;
84 struct usb_gadget_driver *driver; /* 3rd party gadget driver */
85 struct ci13xxx_udc_driver *udc_driver; /* device controller driver */
86 int vbus_active; /* is VBUS active */
87 struct usb_phy *transceiver; /* Transceiver struct */
88};
89
90/******************************************************************************
91 * REGISTERS
92 *****************************************************************************/
93/* register size */
94#define REG_BITS (32)
95
96/* register indices */
97enum ci13xxx_regs {
98 CAP_CAPLENGTH,
99 CAP_HCCPARAMS,
100 CAP_DCCPARAMS,
101 CAP_TESTMODE,
102 CAP_LAST = CAP_TESTMODE,
103 OP_USBCMD,
104 OP_USBSTS,
105 OP_USBINTR,
106 OP_DEVICEADDR,
107 OP_ENDPTLISTADDR,
108 OP_PORTSC,
109 OP_DEVLC,
110 OP_USBMODE,
111 OP_ENDPTSETUPSTAT,
112 OP_ENDPTPRIME,
113 OP_ENDPTFLUSH,
114 OP_ENDPTSTAT,
115 OP_ENDPTCOMPLETE,
116 OP_ENDPTCTRL,
117 /* endptctrl1..15 follow */
118 OP_LAST = OP_ENDPTCTRL + ENDPT_MAX / 2,
119};
120
121
122/**
123 * ffs_nr: find first (least significant) bit set
124 * @x: the word to search
125 *
126 * This function returns bit number (instead of position)
127 */
128static inline int ffs_nr(u32 x)
129{
130 int n = ffs(x);
131
132 return n ? n-1 : 32;
133}
134
135/**
136 * hw_read: reads from a hw register
137 * @reg: register index
138 * @mask: bitfield mask
139 *
140 * This function returns register contents
141 */
142static inline u32 hw_read(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask)
143{
144 return ioread32(udc->hw_bank.regmap[reg]) & mask;
145}
146
147/**
148 * hw_write: writes to a hw register
149 * @reg: register index
150 * @mask: bitfield mask
151 * @data: new value
152 */
153static inline void hw_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
154 u32 mask, u32 data)
155{
156 if (~mask)
157 data = (ioread32(udc->hw_bank.regmap[reg]) & ~mask)
158 | (data & mask);
159
160 iowrite32(data, udc->hw_bank.regmap[reg]);
161}
162
163/**
164 * hw_test_and_clear: tests & clears a hw register
165 * @reg: register index
166 * @mask: bitfield mask
167 *
168 * This function returns register contents
169 */
170static inline u32 hw_test_and_clear(struct ci13xxx *udc, enum ci13xxx_regs reg,
171 u32 mask)
172{
173 u32 val = ioread32(udc->hw_bank.regmap[reg]) & mask;
174
175 iowrite32(val, udc->hw_bank.regmap[reg]);
176 return val;
177}
178
179/**
180 * hw_test_and_write: tests & writes a hw register
181 * @reg: register index
182 * @mask: bitfield mask
183 * @data: new value
184 *
185 * This function returns register contents
186 */
187static inline u32 hw_test_and_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
188 u32 mask, u32 data)
189{
190 u32 val = hw_read(udc, reg, ~0);
191
192 hw_write(udc, reg, mask, data);
193 return (val & mask) >> ffs_nr(mask);
194}
195
196int hw_device_init(struct ci13xxx *udc, void __iomem *base,
197 uintptr_t cap_offset);
198int hw_device_reset(struct ci13xxx *ci);
199
200int hw_port_test_set(struct ci13xxx *ci, u8 mode);
201
202u8 hw_port_test_get(struct ci13xxx *ci);
203
204#endif /* __DRIVERS_USB_CHIPIDEA_CI_H */
diff --git a/drivers/usb/chipidea/ci13xxx_msm.c b/drivers/usb/chipidea/ci13xxx_msm.c
index 418de0e61c5a..27427931b681 100644
--- a/drivers/usb/chipidea/ci13xxx_msm.c
+++ b/drivers/usb/chipidea/ci13xxx_msm.c
@@ -11,8 +11,9 @@
11#include <linux/usb/msm_hsusb_hw.h> 11#include <linux/usb/msm_hsusb_hw.h>
12#include <linux/usb/ulpi.h> 12#include <linux/usb/ulpi.h>
13#include <linux/usb/gadget.h> 13#include <linux/usb/gadget.h>
14#include <linux/usb/chipidea.h>
14 15
15#include "ci13xxx_udc.h" 16#include "ci.h"
16 17
17#define MSM_USB_BASE (udc->regs) 18#define MSM_USB_BASE (udc->regs)
18 19
diff --git a/drivers/usb/chipidea/ci13xxx_pci.c b/drivers/usb/chipidea/ci13xxx_pci.c
index f075ef33834f..84e8ab8d4f47 100644
--- a/drivers/usb/chipidea/ci13xxx_pci.c
+++ b/drivers/usb/chipidea/ci13xxx_pci.c
@@ -15,8 +15,7 @@
15#include <linux/pci.h> 15#include <linux/pci.h>
16#include <linux/interrupt.h> 16#include <linux/interrupt.h>
17#include <linux/usb/gadget.h> 17#include <linux/usb/gadget.h>
18 18#include <linux/usb/chipidea.h>
19#include "ci13xxx_udc.h"
20 19
21/* driver name */ 20/* driver name */
22#define UDC_DRIVER_NAME "ci13xxx_pci" 21#define UDC_DRIVER_NAME "ci13xxx_pci"
diff --git a/drivers/usb/chipidea/ci13xxx_udc.h b/drivers/usb/chipidea/ci13xxx_udc.h
deleted file mode 100644
index a8aa1a70dec4..000000000000
--- a/drivers/usb/chipidea/ci13xxx_udc.h
+++ /dev/null
@@ -1,248 +0,0 @@
1/*
2 * ci13xxx_udc.h - structures, registers, and macros MIPS USB IP core
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * Description: MIPS USB IP core family device controller
13 * Structures, registers and logging macros
14 */
15
16#ifndef _CI13XXX_h_
17#define _CI13XXX_h_
18
19/******************************************************************************
20 * DEFINE
21 *****************************************************************************/
22#define CI13XXX_PAGE_SIZE 4096ul /* page size for TD's */
23#define ENDPT_MAX 32
24#define CTRL_PAYLOAD_MAX 64
25#define RX 0 /* similar to USB_DIR_OUT but can be used as an index */
26#define TX 1 /* similar to USB_DIR_IN but can be used as an index */
27
28/******************************************************************************
29 * STRUCTURES
30 *****************************************************************************/
31/* DMA layout of transfer descriptors */
32struct ci13xxx_td {
33 /* 0 */
34 u32 next;
35#define TD_TERMINATE BIT(0)
36#define TD_ADDR_MASK (0xFFFFFFEUL << 5)
37 /* 1 */
38 u32 token;
39#define TD_STATUS (0x00FFUL << 0)
40#define TD_STATUS_TR_ERR BIT(3)
41#define TD_STATUS_DT_ERR BIT(5)
42#define TD_STATUS_HALTED BIT(6)
43#define TD_STATUS_ACTIVE BIT(7)
44#define TD_MULTO (0x0003UL << 10)
45#define TD_IOC BIT(15)
46#define TD_TOTAL_BYTES (0x7FFFUL << 16)
47 /* 2 */
48 u32 page[5];
49#define TD_CURR_OFFSET (0x0FFFUL << 0)
50#define TD_FRAME_NUM (0x07FFUL << 0)
51#define TD_RESERVED_MASK (0x0FFFUL << 0)
52} __attribute__ ((packed));
53
54/* DMA layout of queue heads */
55struct ci13xxx_qh {
56 /* 0 */
57 u32 cap;
58#define QH_IOS BIT(15)
59#define QH_MAX_PKT (0x07FFUL << 16)
60#define QH_ZLT BIT(29)
61#define QH_MULT (0x0003UL << 30)
62 /* 1 */
63 u32 curr;
64 /* 2 - 8 */
65 struct ci13xxx_td td;
66 /* 9 */
67 u32 RESERVED;
68 struct usb_ctrlrequest setup;
69} __attribute__ ((packed));
70
71/* Extension of usb_request */
72struct ci13xxx_req {
73 struct usb_request req;
74 unsigned map;
75 struct list_head queue;
76 struct ci13xxx_td *ptr;
77 dma_addr_t dma;
78 struct ci13xxx_td *zptr;
79 dma_addr_t zdma;
80};
81
82/* Extension of usb_ep */
83struct ci13xxx_ep {
84 struct usb_ep ep;
85 u8 dir;
86 u8 num;
87 u8 type;
88 char name[16];
89 struct {
90 struct list_head queue;
91 struct ci13xxx_qh *ptr;
92 dma_addr_t dma;
93 } qh;
94 int wedge;
95
96 /* global resources */
97 struct ci13xxx *udc;
98 spinlock_t *lock;
99 struct device *device;
100 struct dma_pool *td_pool;
101};
102
103struct ci13xxx;
104struct ci13xxx_udc_driver {
105 const char *name;
106 /* offset of the capability registers */
107 uintptr_t capoffset;
108 unsigned long flags;
109#define CI13XXX_REGS_SHARED BIT(0)
110#define CI13XXX_REQUIRE_TRANSCEIVER BIT(1)
111#define CI13XXX_PULLUP_ON_VBUS BIT(2)
112#define CI13XXX_DISABLE_STREAMING BIT(3)
113
114#define CI13XXX_CONTROLLER_RESET_EVENT 0
115#define CI13XXX_CONTROLLER_STOPPED_EVENT 1
116 void (*notify_event) (struct ci13xxx *udc, unsigned event);
117};
118
119struct hw_bank {
120 unsigned lpm; /* is LPM? */
121 void __iomem *abs; /* bus map offset */
122 void __iomem *cap; /* bus map offset + CAP offset */
123 void __iomem *op; /* bus map offset + OP offset */
124 size_t size; /* bank size */
125 void __iomem **regmap;
126};
127
128/* CI13XXX UDC descriptor & global resources */
129struct ci13xxx {
130 spinlock_t lock; /* ctrl register bank access */
131 void __iomem *regs; /* registers address space */
132
133 struct dma_pool *qh_pool; /* DMA pool for queue heads */
134 struct dma_pool *td_pool; /* DMA pool for transfer descs */
135 struct usb_request *status; /* ep0 status request */
136
137 struct device *dev;
138 struct usb_gadget gadget; /* USB slave device */
139 struct ci13xxx_ep ci13xxx_ep[ENDPT_MAX]; /* extended endpts */
140 u32 ep0_dir; /* ep0 direction */
141 struct ci13xxx_ep *ep0out, *ep0in;
142 unsigned hw_ep_max; /* number of hw endpoints */
143
144 bool setaddr;
145 u8 address;
146 u8 remote_wakeup; /* Is remote wakeup feature
147 enabled by the host? */
148 u8 suspended; /* suspended by the host */
149 u8 test_mode; /* the selected test mode */
150
151 struct hw_bank hw_bank;
152 int irq;
153 struct usb_gadget_driver *driver; /* 3rd party gadget driver */
154 struct ci13xxx_udc_driver *udc_driver; /* device controller driver */
155 int vbus_active; /* is VBUS active */
156 struct usb_phy *transceiver; /* Transceiver struct */
157};
158
159/******************************************************************************
160 * REGISTERS
161 *****************************************************************************/
162/* Default offset of capability registers */
163#define DEF_CAPOFFSET 0x100
164
165/* register size */
166#define REG_BITS (32)
167
168/* register indices */
169enum ci13xxx_regs {
170 CAP_CAPLENGTH,
171 CAP_HCCPARAMS,
172 CAP_DCCPARAMS,
173 CAP_TESTMODE,
174 CAP_LAST = CAP_TESTMODE,
175 OP_USBCMD,
176 OP_USBSTS,
177 OP_USBINTR,
178 OP_DEVICEADDR,
179 OP_ENDPTLISTADDR,
180 OP_PORTSC,
181 OP_DEVLC,
182 OP_USBMODE,
183 OP_ENDPTSETUPSTAT,
184 OP_ENDPTPRIME,
185 OP_ENDPTFLUSH,
186 OP_ENDPTSTAT,
187 OP_ENDPTCOMPLETE,
188 OP_ENDPTCTRL,
189 /* endptctrl1..15 follow */
190 OP_LAST = OP_ENDPTCTRL + ENDPT_MAX / 2,
191};
192
193/* HCCPARAMS */
194#define HCCPARAMS_LEN BIT(17)
195
196/* DCCPARAMS */
197#define DCCPARAMS_DEN (0x1F << 0)
198#define DCCPARAMS_DC BIT(7)
199
200/* TESTMODE */
201#define TESTMODE_FORCE BIT(0)
202
203/* USBCMD */
204#define USBCMD_RS BIT(0)
205#define USBCMD_RST BIT(1)
206#define USBCMD_SUTW BIT(13)
207#define USBCMD_ATDTW BIT(14)
208
209/* USBSTS & USBINTR */
210#define USBi_UI BIT(0)
211#define USBi_UEI BIT(1)
212#define USBi_PCI BIT(2)
213#define USBi_URI BIT(6)
214#define USBi_SLI BIT(8)
215
216/* DEVICEADDR */
217#define DEVICEADDR_USBADRA BIT(24)
218#define DEVICEADDR_USBADR (0x7FUL << 25)
219
220/* PORTSC */
221#define PORTSC_FPR BIT(6)
222#define PORTSC_SUSP BIT(7)
223#define PORTSC_HSP BIT(9)
224#define PORTSC_PTC (0x0FUL << 16)
225
226/* DEVLC */
227#define DEVLC_PSPD (0x03UL << 25)
228#define DEVLC_PSPD_HS (0x02UL << 25)
229
230/* USBMODE */
231#define USBMODE_CM (0x03UL << 0)
232#define USBMODE_CM_IDLE (0x00UL << 0)
233#define USBMODE_CM_DEVICE (0x02UL << 0)
234#define USBMODE_CM_HOST (0x03UL << 0)
235#define USBMODE_SLOM BIT(3)
236#define USBMODE_SDIS BIT(4)
237
238/* ENDPTCTRL */
239#define ENDPTCTRL_RXS BIT(0)
240#define ENDPTCTRL_RXT (0x03UL << 2)
241#define ENDPTCTRL_RXR BIT(6) /* reserved for port 0 */
242#define ENDPTCTRL_RXE BIT(7)
243#define ENDPTCTRL_TXS BIT(16)
244#define ENDPTCTRL_TXT (0x03UL << 18)
245#define ENDPTCTRL_TXR BIT(22) /* reserved for port 0 */
246#define ENDPTCTRL_TXE BIT(23)
247
248#endif /* _CI13XXX_h_ */
diff --git a/drivers/usb/chipidea/core.c b/drivers/usb/chipidea/core.c
new file mode 100644
index 000000000000..f6eab327ffea
--- /dev/null
+++ b/drivers/usb/chipidea/core.c
@@ -0,0 +1,324 @@
1/*
2 * core.c - ChipIdea USB IP core family device controller
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13/*
14 * Description: ChipIdea USB IP core family device controller
15 *
16 * This driver is composed of several blocks:
17 * - HW: hardware interface
18 * - DBG: debug facilities (optional)
19 * - UTIL: utilities
20 * - ISR: interrupts handling
21 * - ENDPT: endpoint operations (Gadget API)
22 * - GADGET: gadget operations (Gadget API)
23 * - BUS: bus glue code, bus abstraction layer
24 *
25 * Compile Options
26 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
27 * - STALL_IN: non-empty bulk-in pipes cannot be halted
28 * if defined mass storage compliance succeeds but with warnings
29 * => case 4: Hi > Dn
30 * => case 5: Hi > Di
31 * => case 8: Hi <> Do
32 * if undefined usbtest 13 fails
33 * - TRACE: enable function tracing (depends on DEBUG)
34 *
35 * Main Features
36 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
37 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
38 * - Normal & LPM support
39 *
40 * USBTEST Report
41 * - OK: 0-12, 13 (STALL_IN defined) & 14
42 * - Not Supported: 15 & 16 (ISO)
43 *
44 * TODO List
45 * - OTG
46 * - Isochronous & Interrupt Traffic
47 * - Handle requests which spawns into several TDs
48 * - GET_STATUS(device) - always reports 0
49 * - Gadget API (majority of optional features)
50 * - Suspend & Remote Wakeup
51 */
52#include <linux/delay.h>
53#include <linux/device.h>
54#include <linux/dmapool.h>
55#include <linux/dma-mapping.h>
56#include <linux/init.h>
57#include <linux/platform_device.h>
58#include <linux/module.h>
59#include <linux/interrupt.h>
60#include <linux/io.h>
61#include <linux/irq.h>
62#include <linux/kernel.h>
63#include <linux/slab.h>
64#include <linux/pm_runtime.h>
65#include <linux/usb/ch9.h>
66#include <linux/usb/gadget.h>
67#include <linux/usb/otg.h>
68#include <linux/usb/chipidea.h>
69
70#include "ci.h"
71#include "udc.h"
72#include "bits.h"
73#include "debug.h"
74
75/* MSM specific */
76#define ABS_AHBBURST (0x0090UL)
77#define ABS_AHBMODE (0x0098UL)
78/* UDC register map */
79static uintptr_t ci_regs_nolpm[] = {
80 [CAP_CAPLENGTH] = 0x000UL,
81 [CAP_HCCPARAMS] = 0x008UL,
82 [CAP_DCCPARAMS] = 0x024UL,
83 [CAP_TESTMODE] = 0x038UL,
84 [OP_USBCMD] = 0x000UL,
85 [OP_USBSTS] = 0x004UL,
86 [OP_USBINTR] = 0x008UL,
87 [OP_DEVICEADDR] = 0x014UL,
88 [OP_ENDPTLISTADDR] = 0x018UL,
89 [OP_PORTSC] = 0x044UL,
90 [OP_DEVLC] = 0x084UL,
91 [OP_USBMODE] = 0x068UL,
92 [OP_ENDPTSETUPSTAT] = 0x06CUL,
93 [OP_ENDPTPRIME] = 0x070UL,
94 [OP_ENDPTFLUSH] = 0x074UL,
95 [OP_ENDPTSTAT] = 0x078UL,
96 [OP_ENDPTCOMPLETE] = 0x07CUL,
97 [OP_ENDPTCTRL] = 0x080UL,
98};
99
100static uintptr_t ci_regs_lpm[] = {
101 [CAP_CAPLENGTH] = 0x000UL,
102 [CAP_HCCPARAMS] = 0x008UL,
103 [CAP_DCCPARAMS] = 0x024UL,
104 [CAP_TESTMODE] = 0x0FCUL,
105 [OP_USBCMD] = 0x000UL,
106 [OP_USBSTS] = 0x004UL,
107 [OP_USBINTR] = 0x008UL,
108 [OP_DEVICEADDR] = 0x014UL,
109 [OP_ENDPTLISTADDR] = 0x018UL,
110 [OP_PORTSC] = 0x044UL,
111 [OP_DEVLC] = 0x084UL,
112 [OP_USBMODE] = 0x0C8UL,
113 [OP_ENDPTSETUPSTAT] = 0x0D8UL,
114 [OP_ENDPTPRIME] = 0x0DCUL,
115 [OP_ENDPTFLUSH] = 0x0E0UL,
116 [OP_ENDPTSTAT] = 0x0E4UL,
117 [OP_ENDPTCOMPLETE] = 0x0E8UL,
118 [OP_ENDPTCTRL] = 0x0ECUL,
119};
120
121static int hw_alloc_regmap(struct ci13xxx *udc, bool is_lpm)
122{
123 int i;
124
125 kfree(udc->hw_bank.regmap);
126
127 udc->hw_bank.regmap = kzalloc((OP_LAST + 1) * sizeof(void *),
128 GFP_KERNEL);
129 if (!udc->hw_bank.regmap)
130 return -ENOMEM;
131
132 for (i = 0; i < OP_ENDPTCTRL; i++)
133 udc->hw_bank.regmap[i] =
134 (i <= CAP_LAST ? udc->hw_bank.cap : udc->hw_bank.op) +
135 (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
136
137 for (; i <= OP_LAST; i++)
138 udc->hw_bank.regmap[i] = udc->hw_bank.op +
139 4 * (i - OP_ENDPTCTRL) +
140 (is_lpm
141 ? ci_regs_lpm[OP_ENDPTCTRL]
142 : ci_regs_nolpm[OP_ENDPTCTRL]);
143
144 return 0;
145}
146
147/**
148 * hw_port_test_set: writes port test mode (execute without interruption)
149 * @mode: new value
150 *
151 * This function returns an error code
152 */
153int hw_port_test_set(struct ci13xxx *ci, u8 mode)
154{
155 const u8 TEST_MODE_MAX = 7;
156
157 if (mode > TEST_MODE_MAX)
158 return -EINVAL;
159
160 hw_write(ci, OP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
161 return 0;
162}
163
164/**
165 * hw_port_test_get: reads port test mode value
166 *
167 * This function returns port test mode value
168 */
169u8 hw_port_test_get(struct ci13xxx *ci)
170{
171 return hw_read(ci, OP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
172}
173
174int hw_device_init(struct ci13xxx *udc, void __iomem *base,
175 uintptr_t cap_offset)
176{
177 u32 reg;
178
179 /* bank is a module variable */
180 udc->hw_bank.abs = base;
181
182 udc->hw_bank.cap = udc->hw_bank.abs;
183 udc->hw_bank.cap += cap_offset;
184 udc->hw_bank.op = udc->hw_bank.cap + ioread8(udc->hw_bank.cap);
185
186 hw_alloc_regmap(udc, false);
187 reg = hw_read(udc, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
188 ffs_nr(HCCPARAMS_LEN);
189 udc->hw_bank.lpm = reg;
190 hw_alloc_regmap(udc, !!reg);
191 udc->hw_bank.size = udc->hw_bank.op - udc->hw_bank.abs;
192 udc->hw_bank.size += OP_LAST;
193 udc->hw_bank.size /= sizeof(u32);
194
195 reg = hw_read(udc, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
196 ffs_nr(DCCPARAMS_DEN);
197 udc->hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
198
199 if (udc->hw_ep_max == 0 || udc->hw_ep_max > ENDPT_MAX)
200 return -ENODEV;
201
202 dev_dbg(udc->dev, "ChipIdea UDC found, lpm: %d; cap: %p op: %p\n",
203 udc->hw_bank.lpm, udc->hw_bank.cap, udc->hw_bank.op);
204
205 /* setup lock mode ? */
206
207 /* ENDPTSETUPSTAT is '0' by default */
208
209 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
210
211 return 0;
212}
213
214/**
215 * hw_device_reset: resets chip (execute without interruption)
216 * @ci: the controller
217 *
218 * This function returns an error code
219 */
220int hw_device_reset(struct ci13xxx *ci)
221{
222 /* should flush & stop before reset */
223 hw_write(ci, OP_ENDPTFLUSH, ~0, ~0);
224 hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
225
226 hw_write(ci, OP_USBCMD, USBCMD_RST, USBCMD_RST);
227 while (hw_read(ci, OP_USBCMD, USBCMD_RST))
228 udelay(10); /* not RTOS friendly */
229
230
231 if (ci->udc_driver->notify_event)
232 ci->udc_driver->notify_event(ci,
233 CI13XXX_CONTROLLER_RESET_EVENT);
234
235 if (ci->udc_driver->flags & CI13XXX_DISABLE_STREAMING)
236 hw_write(ci, OP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
237
238 /* USBMODE should be configured step by step */
239 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
240 hw_write(ci, OP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
241 /* HW >= 2.3 */
242 hw_write(ci, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
243
244 if (hw_read(ci, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
245 pr_err("cannot enter in device mode");
246 pr_err("lpm = %i", ci->hw_bank.lpm);
247 return -ENODEV;
248 }
249
250 return 0;
251}
252
253static int __devinit ci_udc_probe(struct platform_device *pdev)
254{
255 struct device *dev = &pdev->dev;
256 struct ci13xxx_udc_driver *driver = dev->platform_data;
257 struct ci13xxx *udc;
258 struct resource *res;
259 void __iomem *base;
260 int ret;
261
262 if (!driver) {
263 dev_err(dev, "platform data missing\n");
264 return -ENODEV;
265 }
266
267 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
268 if (!res) {
269 dev_err(dev, "missing resource\n");
270 return -ENODEV;
271 }
272
273 base = devm_request_and_ioremap(dev, res);
274 if (!res) {
275 dev_err(dev, "can't request and ioremap resource\n");
276 return -ENOMEM;
277 }
278
279 ret = udc_probe(driver, dev, base, &udc);
280 if (ret)
281 return ret;
282
283 udc->irq = platform_get_irq(pdev, 0);
284 if (udc->irq < 0) {
285 dev_err(dev, "missing IRQ\n");
286 ret = -ENODEV;
287 goto out;
288 }
289
290 platform_set_drvdata(pdev, udc);
291 ret = request_irq(udc->irq, udc_irq, IRQF_SHARED, driver->name, udc);
292
293out:
294 if (ret)
295 udc_remove(udc);
296
297 return ret;
298}
299
300static int __devexit ci_udc_remove(struct platform_device *pdev)
301{
302 struct ci13xxx *udc = platform_get_drvdata(pdev);
303
304 free_irq(udc->irq, udc);
305 udc_remove(udc);
306
307 return 0;
308}
309
310static struct platform_driver ci_udc_driver = {
311 .probe = ci_udc_probe,
312 .remove = __devexit_p(ci_udc_remove),
313 .driver = {
314 .name = "ci_udc",
315 },
316};
317
318module_platform_driver(ci_udc_driver);
319
320MODULE_ALIAS("platform:ci_udc");
321MODULE_ALIAS("platform:ci13xxx");
322MODULE_LICENSE("GPL v2");
323MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
324MODULE_DESCRIPTION("ChipIdea UDC Driver");
diff --git a/drivers/usb/chipidea/debug.c b/drivers/usb/chipidea/debug.c
new file mode 100644
index 000000000000..c4b3e15532db
--- /dev/null
+++ b/drivers/usb/chipidea/debug.c
@@ -0,0 +1,804 @@
1#include <linux/delay.h>
2#include <linux/device.h>
3#include <linux/dmapool.h>
4#include <linux/dma-mapping.h>
5#include <linux/init.h>
6#include <linux/platform_device.h>
7#include <linux/module.h>
8#include <linux/interrupt.h>
9#include <linux/io.h>
10#include <linux/irq.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/pm_runtime.h>
14#include <linux/usb/ch9.h>
15#include <linux/usb/gadget.h>
16#include <linux/usb/otg.h>
17#include <linux/usb/chipidea.h>
18
19#include "ci.h"
20#include "udc.h"
21#include "bits.h"
22#include "debug.h"
23
24/* Interrupt statistics */
25#define ISR_MASK 0x1F
26static struct isr_statistics {
27 u32 test;
28 u32 ui;
29 u32 uei;
30 u32 pci;
31 u32 uri;
32 u32 sli;
33 u32 none;
34 struct {
35 u32 cnt;
36 u32 buf[ISR_MASK+1];
37 u32 idx;
38 } hndl;
39} isr_statistics;
40
41void dbg_interrupt(u32 intmask)
42{
43 if (!intmask) {
44 isr_statistics.none++;
45 return;
46 }
47
48 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intmask;
49 isr_statistics.hndl.idx &= ISR_MASK;
50 isr_statistics.hndl.cnt++;
51
52 if (USBi_URI & intmask)
53 isr_statistics.uri++;
54 if (USBi_PCI & intmask)
55 isr_statistics.pci++;
56 if (USBi_UEI & intmask)
57 isr_statistics.uei++;
58 if (USBi_UI & intmask)
59 isr_statistics.ui++;
60 if (USBi_SLI & intmask)
61 isr_statistics.sli++;
62}
63
64/**
65 * hw_register_read: reads all device registers (execute without interruption)
66 * @buf: destination buffer
67 * @size: buffer size
68 *
69 * This function returns number of registers read
70 */
71static size_t hw_register_read(struct ci13xxx *udc, u32 *buf, size_t size)
72{
73 unsigned i;
74
75 if (size > udc->hw_bank.size)
76 size = udc->hw_bank.size;
77
78 for (i = 0; i < size; i++)
79 buf[i] = hw_read(udc, i * sizeof(u32), ~0);
80
81 return size;
82}
83
84/**
85 * hw_register_write: writes to register
86 * @addr: register address
87 * @data: register value
88 *
89 * This function returns an error code
90 */
91static int hw_register_write(struct ci13xxx *udc, u16 addr, u32 data)
92{
93 /* align */
94 addr /= sizeof(u32);
95
96 if (addr >= udc->hw_bank.size)
97 return -EINVAL;
98
99 /* align */
100 addr *= sizeof(u32);
101
102 hw_write(udc, addr, ~0, data);
103 return 0;
104}
105
106/**
107 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
108 * interruption)
109 * @n: interrupt bit
110 *
111 * This function returns an error code
112 */
113static int hw_intr_clear(struct ci13xxx *udc, int n)
114{
115 if (n >= REG_BITS)
116 return -EINVAL;
117
118 hw_write(udc, OP_USBINTR, BIT(n), 0);
119 hw_write(udc, OP_USBSTS, BIT(n), BIT(n));
120 return 0;
121}
122
123/**
124 * hw_intr_force: enables interrupt & forces interrupt status (execute without
125 * interruption)
126 * @n: interrupt bit
127 *
128 * This function returns an error code
129 */
130static int hw_intr_force(struct ci13xxx *udc, int n)
131{
132 if (n >= REG_BITS)
133 return -EINVAL;
134
135 hw_write(udc, CAP_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
136 hw_write(udc, OP_USBINTR, BIT(n), BIT(n));
137 hw_write(udc, OP_USBSTS, BIT(n), BIT(n));
138 hw_write(udc, CAP_TESTMODE, TESTMODE_FORCE, 0);
139 return 0;
140}
141
142/**
143 * show_device: prints information about device capabilities and status
144 *
145 * Check "device.h" for details
146 */
147static ssize_t show_device(struct device *dev, struct device_attribute *attr,
148 char *buf)
149{
150 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
151 struct usb_gadget *gadget = &udc->gadget;
152 int n = 0;
153
154 if (attr == NULL || buf == NULL) {
155 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
156 return 0;
157 }
158
159 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
160 gadget->speed);
161 n += scnprintf(buf + n, PAGE_SIZE - n, "max_speed = %d\n",
162 gadget->max_speed);
163 /* TODO: Scheduled for removal in 3.8. */
164 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
165 gadget_is_dualspeed(gadget));
166 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
167 gadget->is_otg);
168 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
169 gadget->is_a_peripheral);
170 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
171 gadget->b_hnp_enable);
172 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
173 gadget->a_hnp_support);
174 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
175 gadget->a_alt_hnp_support);
176 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
177 (gadget->name ? gadget->name : ""));
178
179 return n;
180}
181static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
182
183/**
184 * show_driver: prints information about attached gadget (if any)
185 *
186 * Check "device.h" for details
187 */
188static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
189 char *buf)
190{
191 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
192 struct usb_gadget_driver *driver = udc->driver;
193 int n = 0;
194
195 if (attr == NULL || buf == NULL) {
196 dev_err(dev, "[%s] EINVAL\n", __func__);
197 return 0;
198 }
199
200 if (driver == NULL)
201 return scnprintf(buf, PAGE_SIZE,
202 "There is no gadget attached!\n");
203
204 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
205 (driver->function ? driver->function : ""));
206 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
207 driver->max_speed);
208
209 return n;
210}
211static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
212
213/* Maximum event message length */
214#define DBG_DATA_MSG 64UL
215
216/* Maximum event messages */
217#define DBG_DATA_MAX 128UL
218
219/* Event buffer descriptor */
220static struct {
221 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
222 unsigned idx; /* index */
223 unsigned tty; /* print to console? */
224 rwlock_t lck; /* lock */
225} dbg_data = {
226 .idx = 0,
227 .tty = 0,
228 .lck = __RW_LOCK_UNLOCKED(lck)
229};
230
231/**
232 * dbg_dec: decrements debug event index
233 * @idx: buffer index
234 */
235static void dbg_dec(unsigned *idx)
236{
237 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
238}
239
240/**
241 * dbg_inc: increments debug event index
242 * @idx: buffer index
243 */
244static void dbg_inc(unsigned *idx)
245{
246 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
247}
248
249/**
250 * dbg_print: prints the common part of the event
251 * @addr: endpoint address
252 * @name: event name
253 * @status: status
254 * @extra: extra information
255 */
256static void dbg_print(u8 addr, const char *name, int status, const char *extra)
257{
258 struct timeval tval;
259 unsigned int stamp;
260 unsigned long flags;
261
262 write_lock_irqsave(&dbg_data.lck, flags);
263
264 do_gettimeofday(&tval);
265 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
266 stamp = stamp * 1000000 + tval.tv_usec;
267
268 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
269 "%04X\t? %02X %-7.7s %4i ?\t%s\n",
270 stamp, addr, name, status, extra);
271
272 dbg_inc(&dbg_data.idx);
273
274 write_unlock_irqrestore(&dbg_data.lck, flags);
275
276 if (dbg_data.tty != 0)
277 pr_notice("%04X\t? %02X %-7.7s %4i ?\t%s\n",
278 stamp, addr, name, status, extra);
279}
280
281/**
282 * dbg_done: prints a DONE event
283 * @addr: endpoint address
284 * @td: transfer descriptor
285 * @status: status
286 */
287void dbg_done(u8 addr, const u32 token, int status)
288{
289 char msg[DBG_DATA_MSG];
290
291 scnprintf(msg, sizeof(msg), "%d %02X",
292 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
293 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
294 dbg_print(addr, "DONE", status, msg);
295}
296
297/**
298 * dbg_event: prints a generic event
299 * @addr: endpoint address
300 * @name: event name
301 * @status: status
302 */
303void dbg_event(u8 addr, const char *name, int status)
304{
305 if (name != NULL)
306 dbg_print(addr, name, status, "");
307}
308
309/*
310 * dbg_queue: prints a QUEUE event
311 * @addr: endpoint address
312 * @req: USB request
313 * @status: status
314 */
315void dbg_queue(u8 addr, const struct usb_request *req, int status)
316{
317 char msg[DBG_DATA_MSG];
318
319 if (req != NULL) {
320 scnprintf(msg, sizeof(msg),
321 "%d %d", !req->no_interrupt, req->length);
322 dbg_print(addr, "QUEUE", status, msg);
323 }
324}
325
326/**
327 * dbg_setup: prints a SETUP event
328 * @addr: endpoint address
329 * @req: setup request
330 */
331void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
332{
333 char msg[DBG_DATA_MSG];
334
335 if (req != NULL) {
336 scnprintf(msg, sizeof(msg),
337 "%02X %02X %04X %04X %d", req->bRequestType,
338 req->bRequest, le16_to_cpu(req->wValue),
339 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
340 dbg_print(addr, "SETUP", 0, msg);
341 }
342}
343
344/**
345 * show_events: displays the event buffer
346 *
347 * Check "device.h" for details
348 */
349static ssize_t show_events(struct device *dev, struct device_attribute *attr,
350 char *buf)
351{
352 unsigned long flags;
353 unsigned i, j, n = 0;
354
355 if (attr == NULL || buf == NULL) {
356 dev_err(dev->parent, "[%s] EINVAL\n", __func__);
357 return 0;
358 }
359
360 read_lock_irqsave(&dbg_data.lck, flags);
361
362 i = dbg_data.idx;
363 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
364 n += strlen(dbg_data.buf[i]);
365 if (n >= PAGE_SIZE) {
366 n -= strlen(dbg_data.buf[i]);
367 break;
368 }
369 }
370 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
371 j += scnprintf(buf + j, PAGE_SIZE - j,
372 "%s", dbg_data.buf[i]);
373
374 read_unlock_irqrestore(&dbg_data.lck, flags);
375
376 return n;
377}
378
379/**
380 * store_events: configure if events are going to be also printed to console
381 *
382 * Check "device.h" for details
383 */
384static ssize_t store_events(struct device *dev, struct device_attribute *attr,
385 const char *buf, size_t count)
386{
387 unsigned tty;
388
389 if (attr == NULL || buf == NULL) {
390 dev_err(dev, "[%s] EINVAL\n", __func__);
391 goto done;
392 }
393
394 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
395 dev_err(dev, "<1|0>: enable|disable console log\n");
396 goto done;
397 }
398
399 dbg_data.tty = tty;
400 dev_info(dev, "tty = %u", dbg_data.tty);
401
402 done:
403 return count;
404}
405static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
406
407/**
408 * show_inters: interrupt status, enable status and historic
409 *
410 * Check "device.h" for details
411 */
412static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
413 char *buf)
414{
415 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
416 unsigned long flags;
417 u32 intr;
418 unsigned i, j, n = 0;
419
420 if (attr == NULL || buf == NULL) {
421 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
422 return 0;
423 }
424
425 spin_lock_irqsave(&udc->lock, flags);
426
427 /*n += scnprintf(buf + n, PAGE_SIZE - n,
428 "status = %08x\n", hw_read_intr_status(udc));
429 n += scnprintf(buf + n, PAGE_SIZE - n,
430 "enable = %08x\n", hw_read_intr_enable(udc));*/
431
432 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
433 isr_statistics.test);
434 n += scnprintf(buf + n, PAGE_SIZE - n, "? ui = %d\n",
435 isr_statistics.ui);
436 n += scnprintf(buf + n, PAGE_SIZE - n, "? uei = %d\n",
437 isr_statistics.uei);
438 n += scnprintf(buf + n, PAGE_SIZE - n, "? pci = %d\n",
439 isr_statistics.pci);
440 n += scnprintf(buf + n, PAGE_SIZE - n, "? uri = %d\n",
441 isr_statistics.uri);
442 n += scnprintf(buf + n, PAGE_SIZE - n, "? sli = %d\n",
443 isr_statistics.sli);
444 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
445 isr_statistics.none);
446 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
447 isr_statistics.hndl.cnt);
448
449 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
450 i &= ISR_MASK;
451 intr = isr_statistics.hndl.buf[i];
452
453 if (USBi_UI & intr)
454 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
455 intr &= ~USBi_UI;
456 if (USBi_UEI & intr)
457 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
458 intr &= ~USBi_UEI;
459 if (USBi_PCI & intr)
460 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
461 intr &= ~USBi_PCI;
462 if (USBi_URI & intr)
463 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
464 intr &= ~USBi_URI;
465 if (USBi_SLI & intr)
466 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
467 intr &= ~USBi_SLI;
468 if (intr)
469 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
470 if (isr_statistics.hndl.buf[i])
471 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
472 }
473
474 spin_unlock_irqrestore(&udc->lock, flags);
475
476 return n;
477}
478
479/**
480 * store_inters: enable & force or disable an individual interrutps
481 * (to be used for test purposes only)
482 *
483 * Check "device.h" for details
484 */
485static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
486 const char *buf, size_t count)
487{
488 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
489 unsigned long flags;
490 unsigned en, bit;
491
492 if (attr == NULL || buf == NULL) {
493 dev_err(udc->dev, "EINVAL\n");
494 goto done;
495 }
496
497 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
498 dev_err(udc->dev, "<1|0> <bit>: enable|disable interrupt\n");
499 goto done;
500 }
501
502 spin_lock_irqsave(&udc->lock, flags);
503 if (en) {
504 if (hw_intr_force(udc, bit))
505 dev_err(dev, "invalid bit number\n");
506 else
507 isr_statistics.test++;
508 } else {
509 if (hw_intr_clear(udc, bit))
510 dev_err(dev, "invalid bit number\n");
511 }
512 spin_unlock_irqrestore(&udc->lock, flags);
513
514 done:
515 return count;
516}
517static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
518
519/**
520 * show_port_test: reads port test mode
521 *
522 * Check "device.h" for details
523 */
524static ssize_t show_port_test(struct device *dev,
525 struct device_attribute *attr, char *buf)
526{
527 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
528 unsigned long flags;
529 unsigned mode;
530
531 if (attr == NULL || buf == NULL) {
532 dev_err(udc->dev, "EINVAL\n");
533 return 0;
534 }
535
536 spin_lock_irqsave(&udc->lock, flags);
537 mode = hw_port_test_get(udc);
538 spin_unlock_irqrestore(&udc->lock, flags);
539
540 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
541}
542
543/**
544 * store_port_test: writes port test mode
545 *
546 * Check "device.h" for details
547 */
548static ssize_t store_port_test(struct device *dev,
549 struct device_attribute *attr,
550 const char *buf, size_t count)
551{
552 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
553 unsigned long flags;
554 unsigned mode;
555
556 if (attr == NULL || buf == NULL) {
557 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
558 goto done;
559 }
560
561 if (sscanf(buf, "%u", &mode) != 1) {
562 dev_err(udc->dev, "<mode>: set port test mode");
563 goto done;
564 }
565
566 spin_lock_irqsave(&udc->lock, flags);
567 if (hw_port_test_set(udc, mode))
568 dev_err(udc->dev, "invalid mode\n");
569 spin_unlock_irqrestore(&udc->lock, flags);
570
571 done:
572 return count;
573}
574static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
575 show_port_test, store_port_test);
576
577/**
578 * show_qheads: DMA contents of all queue heads
579 *
580 * Check "device.h" for details
581 */
582static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
583 char *buf)
584{
585 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
586 unsigned long flags;
587 unsigned i, j, n = 0;
588
589 if (attr == NULL || buf == NULL) {
590 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
591 return 0;
592 }
593
594 spin_lock_irqsave(&udc->lock, flags);
595 for (i = 0; i < udc->hw_ep_max/2; i++) {
596 struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
597 struct ci13xxx_ep *mEpTx =
598 &udc->ci13xxx_ep[i + udc->hw_ep_max/2];
599 n += scnprintf(buf + n, PAGE_SIZE - n,
600 "EP=%02i: RX=%08X TX=%08X\n",
601 i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
602 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
603 n += scnprintf(buf + n, PAGE_SIZE - n,
604 " %04X: %08X %08X\n", j,
605 *((u32 *)mEpRx->qh.ptr + j),
606 *((u32 *)mEpTx->qh.ptr + j));
607 }
608 }
609 spin_unlock_irqrestore(&udc->lock, flags);
610
611 return n;
612}
613static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
614
615/**
616 * show_registers: dumps all registers
617 *
618 * Check "device.h" for details
619 */
620#define DUMP_ENTRIES 512
621static ssize_t show_registers(struct device *dev,
622 struct device_attribute *attr, char *buf)
623{
624 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
625 unsigned long flags;
626 u32 *dump;
627 unsigned i, k, n = 0;
628
629 if (attr == NULL || buf == NULL) {
630 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
631 return 0;
632 }
633
634 dump = kmalloc(sizeof(u32) * DUMP_ENTRIES, GFP_KERNEL);
635 if (!dump) {
636 dev_err(udc->dev, "%s: out of memory\n", __func__);
637 return 0;
638 }
639
640 spin_lock_irqsave(&udc->lock, flags);
641 k = hw_register_read(udc, dump, DUMP_ENTRIES);
642 spin_unlock_irqrestore(&udc->lock, flags);
643
644 for (i = 0; i < k; i++) {
645 n += scnprintf(buf + n, PAGE_SIZE - n,
646 "reg[0x%04X] = 0x%08X\n",
647 i * (unsigned)sizeof(u32), dump[i]);
648 }
649 kfree(dump);
650
651 return n;
652}
653
654/**
655 * store_registers: writes value to register address
656 *
657 * Check "device.h" for details
658 */
659static ssize_t store_registers(struct device *dev,
660 struct device_attribute *attr,
661 const char *buf, size_t count)
662{
663 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
664 unsigned long addr, data, flags;
665
666 if (attr == NULL || buf == NULL) {
667 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
668 goto done;
669 }
670
671 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
672 dev_err(udc->dev,
673 "<addr> <data>: write data to register address\n");
674 goto done;
675 }
676
677 spin_lock_irqsave(&udc->lock, flags);
678 if (hw_register_write(udc, addr, data))
679 dev_err(udc->dev, "invalid address range\n");
680 spin_unlock_irqrestore(&udc->lock, flags);
681
682 done:
683 return count;
684}
685static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
686 show_registers, store_registers);
687
688/**
689 * show_requests: DMA contents of all requests currently queued (all endpts)
690 *
691 * Check "device.h" for details
692 */
693static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
694 char *buf)
695{
696 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
697 unsigned long flags;
698 struct list_head *ptr = NULL;
699 struct ci13xxx_req *req = NULL;
700 unsigned i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
701
702 if (attr == NULL || buf == NULL) {
703 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
704 return 0;
705 }
706
707 spin_lock_irqsave(&udc->lock, flags);
708 for (i = 0; i < udc->hw_ep_max; i++)
709 list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
710 {
711 req = list_entry(ptr, struct ci13xxx_req, queue);
712
713 n += scnprintf(buf + n, PAGE_SIZE - n,
714 "EP=%02i: TD=%08X %s\n",
715 i % udc->hw_ep_max/2, (u32)req->dma,
716 ((i < udc->hw_ep_max/2) ? "RX" : "TX"));
717
718 for (j = 0; j < qSize; j++)
719 n += scnprintf(buf + n, PAGE_SIZE - n,
720 " %04X: %08X\n", j,
721 *((u32 *)req->ptr + j));
722 }
723 spin_unlock_irqrestore(&udc->lock, flags);
724
725 return n;
726}
727static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
728
729/**
730 * dbg_create_files: initializes the attribute interface
731 * @dev: device
732 *
733 * This function returns an error code
734 */
735int dbg_create_files(struct device *dev)
736{
737 int retval = 0;
738
739 if (dev == NULL)
740 return -EINVAL;
741 retval = device_create_file(dev, &dev_attr_device);
742 if (retval)
743 goto done;
744 retval = device_create_file(dev, &dev_attr_driver);
745 if (retval)
746 goto rm_device;
747 retval = device_create_file(dev, &dev_attr_events);
748 if (retval)
749 goto rm_driver;
750 retval = device_create_file(dev, &dev_attr_inters);
751 if (retval)
752 goto rm_events;
753 retval = device_create_file(dev, &dev_attr_port_test);
754 if (retval)
755 goto rm_inters;
756 retval = device_create_file(dev, &dev_attr_qheads);
757 if (retval)
758 goto rm_port_test;
759 retval = device_create_file(dev, &dev_attr_registers);
760 if (retval)
761 goto rm_qheads;
762 retval = device_create_file(dev, &dev_attr_requests);
763 if (retval)
764 goto rm_registers;
765 return 0;
766
767 rm_registers:
768 device_remove_file(dev, &dev_attr_registers);
769 rm_qheads:
770 device_remove_file(dev, &dev_attr_qheads);
771 rm_port_test:
772 device_remove_file(dev, &dev_attr_port_test);
773 rm_inters:
774 device_remove_file(dev, &dev_attr_inters);
775 rm_events:
776 device_remove_file(dev, &dev_attr_events);
777 rm_driver:
778 device_remove_file(dev, &dev_attr_driver);
779 rm_device:
780 device_remove_file(dev, &dev_attr_device);
781 done:
782 return retval;
783}
784
785/**
786 * dbg_remove_files: destroys the attribute interface
787 * @dev: device
788 *
789 * This function returns an error code
790 */
791int dbg_remove_files(struct device *dev)
792{
793 if (dev == NULL)
794 return -EINVAL;
795 device_remove_file(dev, &dev_attr_requests);
796 device_remove_file(dev, &dev_attr_registers);
797 device_remove_file(dev, &dev_attr_qheads);
798 device_remove_file(dev, &dev_attr_port_test);
799 device_remove_file(dev, &dev_attr_inters);
800 device_remove_file(dev, &dev_attr_events);
801 device_remove_file(dev, &dev_attr_driver);
802 device_remove_file(dev, &dev_attr_device);
803 return 0;
804}
diff --git a/drivers/usb/chipidea/debug.h b/drivers/usb/chipidea/debug.h
new file mode 100644
index 000000000000..80d96865775c
--- /dev/null
+++ b/drivers/usb/chipidea/debug.h
@@ -0,0 +1,56 @@
1/*
2 * debug.h - ChipIdea USB driver debug interfaces
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_DEBUG_H
14#define __DRIVERS_USB_CHIPIDEA_DEBUG_H
15
16#ifdef CONFIG_USB_CHIPIDEA_DEBUG
17void dbg_interrupt(u32 intmask);
18void dbg_done(u8 addr, const u32 token, int status);
19void dbg_event(u8 addr, const char *name, int status);
20void dbg_queue(u8 addr, const struct usb_request *req, int status);
21void dbg_setup(u8 addr, const struct usb_ctrlrequest *req);
22int dbg_create_files(struct device *dev);
23int dbg_remove_files(struct device *dev);
24#else
25static inline void dbg_interrupt(u32 intmask)
26{
27}
28
29static inline void dbg_done(u8 addr, const u32 token, int status)
30{
31}
32
33static inline void dbg_event(u8 addr, const char *name, int status)
34{
35}
36
37static inline void dbg_queue(u8 addr, const struct usb_request *req, int status)
38{
39}
40
41static inline void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
42{
43}
44
45static inline int dbg_create_files(struct device *dev)
46{
47 return 0;
48}
49
50static inline int dbg_remove_files(struct device *dev)
51{
52 return 0;
53}
54#endif
55
56#endif /* __DRIVERS_USB_CHIPIDEA_DEBUG_H */
diff --git a/drivers/usb/chipidea/ci13xxx_udc.c b/drivers/usb/chipidea/udc.c
index 819636a19186..6866ef085397 100644
--- a/drivers/usb/chipidea/ci13xxx_udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * ci13xxx_udc.c - MIPS USB IP core family device controller 2 * udc.h - ChipIdea UDC driver
3 * 3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. 4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 * 5 *
@@ -10,46 +10,6 @@
10 * published by the Free Software Foundation. 10 * published by the Free Software Foundation.
11 */ 11 */
12 12
13/*
14 * Description: MIPS USB IP core family device controller
15 * Currently it only supports IP part number CI13412
16 *
17 * This driver is composed of several blocks:
18 * - HW: hardware interface
19 * - DBG: debug facilities (optional)
20 * - UTIL: utilities
21 * - ISR: interrupts handling
22 * - ENDPT: endpoint operations (Gadget API)
23 * - GADGET: gadget operations (Gadget API)
24 * - BUS: bus glue code, bus abstraction layer
25 *
26 * Compile Options
27 * - CONFIG_USB_GADGET_DEBUG_FILES: enable debug facilities
28 * - STALL_IN: non-empty bulk-in pipes cannot be halted
29 * if defined mass storage compliance succeeds but with warnings
30 * => case 4: Hi > Dn
31 * => case 5: Hi > Di
32 * => case 8: Hi <> Do
33 * if undefined usbtest 13 fails
34 * - TRACE: enable function tracing (depends on DEBUG)
35 *
36 * Main Features
37 * - Chapter 9 & Mass Storage Compliance with Gadget File Storage
38 * - Chapter 9 Compliance with Gadget Zero (STALL_IN undefined)
39 * - Normal & LPM support
40 *
41 * USBTEST Report
42 * - OK: 0-12, 13 (STALL_IN defined) & 14
43 * - Not Supported: 15 & 16 (ISO)
44 *
45 * TODO List
46 * - OTG
47 * - Isochronous & Interrupt Traffic
48 * - Handle requests which spawns into several TDs
49 * - GET_STATUS(device) - always reports 0
50 * - Gadget API (majority of optional features)
51 * - Suspend & Remote Wakeup
52 */
53#include <linux/delay.h> 13#include <linux/delay.h>
54#include <linux/device.h> 14#include <linux/device.h>
55#include <linux/dmapool.h> 15#include <linux/dmapool.h>
@@ -66,14 +26,12 @@
66#include <linux/usb/ch9.h> 26#include <linux/usb/ch9.h>
67#include <linux/usb/gadget.h> 27#include <linux/usb/gadget.h>
68#include <linux/usb/otg.h> 28#include <linux/usb/otg.h>
29#include <linux/usb/chipidea.h>
69 30
70#include "ci13xxx_udc.h" 31#include "ci.h"
71 32#include "udc.h"
72/****************************************************************************** 33#include "bits.h"
73 * DEFINE 34#include "debug.h"
74 *****************************************************************************/
75
76#define DMA_ADDR_INVALID (~(dma_addr_t)0)
77 35
78/* control endpoint description */ 36/* control endpoint description */
79static const struct usb_endpoint_descriptor 37static const struct usb_endpoint_descriptor
@@ -96,112 +54,6 @@ ctrl_endpt_in_desc = {
96 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), 54 .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX),
97}; 55};
98 56
99/* Interrupt statistics */
100#define ISR_MASK 0x1F
101static struct {
102 u32 test;
103 u32 ui;
104 u32 uei;
105 u32 pci;
106 u32 uri;
107 u32 sli;
108 u32 none;
109 struct {
110 u32 cnt;
111 u32 buf[ISR_MASK+1];
112 u32 idx;
113 } hndl;
114} isr_statistics;
115
116/**
117 * ffs_nr: find first (least significant) bit set
118 * @x: the word to search
119 *
120 * This function returns bit number (instead of position)
121 */
122static int ffs_nr(u32 x)
123{
124 int n = ffs(x);
125
126 return n ? n-1 : 32;
127}
128
129/******************************************************************************
130 * HW block
131 *****************************************************************************/
132
133/* MSM specific */
134#define ABS_AHBBURST (0x0090UL)
135#define ABS_AHBMODE (0x0098UL)
136/* UDC register map */
137static uintptr_t ci_regs_nolpm[] = {
138 [CAP_CAPLENGTH] = 0x000UL,
139 [CAP_HCCPARAMS] = 0x008UL,
140 [CAP_DCCPARAMS] = 0x024UL,
141 [CAP_TESTMODE] = 0x038UL,
142 [OP_USBCMD] = 0x000UL,
143 [OP_USBSTS] = 0x004UL,
144 [OP_USBINTR] = 0x008UL,
145 [OP_DEVICEADDR] = 0x014UL,
146 [OP_ENDPTLISTADDR] = 0x018UL,
147 [OP_PORTSC] = 0x044UL,
148 [OP_DEVLC] = 0x084UL,
149 [OP_USBMODE] = 0x068UL,
150 [OP_ENDPTSETUPSTAT] = 0x06CUL,
151 [OP_ENDPTPRIME] = 0x070UL,
152 [OP_ENDPTFLUSH] = 0x074UL,
153 [OP_ENDPTSTAT] = 0x078UL,
154 [OP_ENDPTCOMPLETE] = 0x07CUL,
155 [OP_ENDPTCTRL] = 0x080UL,
156};
157
158static uintptr_t ci_regs_lpm[] = {
159 [CAP_CAPLENGTH] = 0x000UL,
160 [CAP_HCCPARAMS] = 0x008UL,
161 [CAP_DCCPARAMS] = 0x024UL,
162 [CAP_TESTMODE] = 0x0FCUL,
163 [OP_USBCMD] = 0x000UL,
164 [OP_USBSTS] = 0x004UL,
165 [OP_USBINTR] = 0x008UL,
166 [OP_DEVICEADDR] = 0x014UL,
167 [OP_ENDPTLISTADDR] = 0x018UL,
168 [OP_PORTSC] = 0x044UL,
169 [OP_DEVLC] = 0x084UL,
170 [OP_USBMODE] = 0x0C8UL,
171 [OP_ENDPTSETUPSTAT] = 0x0D8UL,
172 [OP_ENDPTPRIME] = 0x0DCUL,
173 [OP_ENDPTFLUSH] = 0x0E0UL,
174 [OP_ENDPTSTAT] = 0x0E4UL,
175 [OP_ENDPTCOMPLETE] = 0x0E8UL,
176 [OP_ENDPTCTRL] = 0x0ECUL,
177};
178
179static int hw_alloc_regmap(struct ci13xxx *udc, bool is_lpm)
180{
181 int i;
182
183 kfree(udc->hw_bank.regmap);
184
185 udc->hw_bank.regmap = kzalloc((OP_LAST + 1) * sizeof(void *),
186 GFP_KERNEL);
187 if (!udc->hw_bank.regmap)
188 return -ENOMEM;
189
190 for (i = 0; i < OP_ENDPTCTRL; i++)
191 udc->hw_bank.regmap[i] =
192 (i <= CAP_LAST ? udc->hw_bank.cap : udc->hw_bank.op) +
193 (is_lpm ? ci_regs_lpm[i] : ci_regs_nolpm[i]);
194
195 for (; i <= OP_LAST; i++)
196 udc->hw_bank.regmap[i] = udc->hw_bank.op +
197 4 * (i - OP_ENDPTCTRL) +
198 (is_lpm
199 ? ci_regs_lpm[OP_ENDPTCTRL]
200 : ci_regs_nolpm[OP_ENDPTCTRL]);
201
202 return 0;
203}
204
205/** 57/**
206 * hw_ep_bit: calculates the bit number 58 * hw_ep_bit: calculates the bit number
207 * @num: endpoint number 59 * @num: endpoint number
@@ -214,7 +66,7 @@ static inline int hw_ep_bit(int num, int dir)
214 return num + (dir ? 16 : 0); 66 return num + (dir ? 16 : 0);
215} 67}
216 68
217static int ep_to_bit(struct ci13xxx *udc, int n) 69static inline int ep_to_bit(struct ci13xxx *udc, int n)
218{ 70{
219 int fill = 16 - udc->hw_ep_max / 2; 71 int fill = 16 - udc->hw_ep_max / 2;
220 72
@@ -225,145 +77,6 @@ static int ep_to_bit(struct ci13xxx *udc, int n)
225} 77}
226 78
227/** 79/**
228 * hw_read: reads from a hw register
229 * @reg: register index
230 * @mask: bitfield mask
231 *
232 * This function returns register contents
233 */
234static u32 hw_read(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask)
235{
236 return ioread32(udc->hw_bank.regmap[reg]) & mask;
237}
238
239/**
240 * hw_write: writes to a hw register
241 * @reg: register index
242 * @mask: bitfield mask
243 * @data: new value
244 */
245static void hw_write(struct ci13xxx *udc, enum ci13xxx_regs reg, u32 mask,
246 u32 data)
247{
248 if (~mask)
249 data = (ioread32(udc->hw_bank.regmap[reg]) & ~mask)
250 | (data & mask);
251
252 iowrite32(data, udc->hw_bank.regmap[reg]);
253}
254
255/**
256 * hw_test_and_clear: tests & clears a hw register
257 * @reg: register index
258 * @mask: bitfield mask
259 *
260 * This function returns register contents
261 */
262static u32 hw_test_and_clear(struct ci13xxx *udc, enum ci13xxx_regs reg,
263 u32 mask)
264{
265 u32 val = ioread32(udc->hw_bank.regmap[reg]) & mask;
266
267 iowrite32(val, udc->hw_bank.regmap[reg]);
268 return val;
269}
270
271/**
272 * hw_test_and_write: tests & writes a hw register
273 * @reg: register index
274 * @mask: bitfield mask
275 * @data: new value
276 *
277 * This function returns register contents
278 */
279static u32 hw_test_and_write(struct ci13xxx *udc, enum ci13xxx_regs reg,
280 u32 mask, u32 data)
281{
282 u32 val = hw_read(udc, reg, ~0);
283
284 hw_write(udc, reg, mask, data);
285 return (val & mask) >> ffs_nr(mask);
286}
287
288static int hw_device_init(struct ci13xxx *udc, void __iomem *base,
289 uintptr_t cap_offset)
290{
291 u32 reg;
292
293 /* bank is a module variable */
294 udc->hw_bank.abs = base;
295
296 udc->hw_bank.cap = udc->hw_bank.abs;
297 udc->hw_bank.cap += cap_offset;
298 udc->hw_bank.op = udc->hw_bank.cap + ioread8(udc->hw_bank.cap);
299
300 hw_alloc_regmap(udc, false);
301 reg = hw_read(udc, CAP_HCCPARAMS, HCCPARAMS_LEN) >>
302 ffs_nr(HCCPARAMS_LEN);
303 udc->hw_bank.lpm = reg;
304 hw_alloc_regmap(udc, !!reg);
305 udc->hw_bank.size = udc->hw_bank.op - udc->hw_bank.abs;
306 udc->hw_bank.size += OP_LAST;
307 udc->hw_bank.size /= sizeof(u32);
308
309 reg = hw_read(udc, CAP_DCCPARAMS, DCCPARAMS_DEN) >>
310 ffs_nr(DCCPARAMS_DEN);
311 udc->hw_ep_max = reg * 2; /* cache hw ENDPT_MAX */
312
313 if (udc->hw_ep_max == 0 || udc->hw_ep_max > ENDPT_MAX)
314 return -ENODEV;
315
316 dev_dbg(udc->dev, "ChipIdea UDC found, lpm: %d; cap: %p op: %p\n",
317 udc->hw_bank.lpm, udc->hw_bank.cap, udc->hw_bank.op);
318
319 /* setup lock mode ? */
320
321 /* ENDPTSETUPSTAT is '0' by default */
322
323 /* HCSPARAMS.bf.ppc SHOULD BE zero for device */
324
325 return 0;
326}
327/**
328 * hw_device_reset: resets chip (execute without interruption)
329 * @base: register base address
330 *
331 * This function returns an error code
332 */
333static int hw_device_reset(struct ci13xxx *udc)
334{
335 /* should flush & stop before reset */
336 hw_write(udc, OP_ENDPTFLUSH, ~0, ~0);
337 hw_write(udc, OP_USBCMD, USBCMD_RS, 0);
338
339 hw_write(udc, OP_USBCMD, USBCMD_RST, USBCMD_RST);
340 while (hw_read(udc, OP_USBCMD, USBCMD_RST))
341 udelay(10); /* not RTOS friendly */
342
343
344 if (udc->udc_driver->notify_event)
345 udc->udc_driver->notify_event(udc,
346 CI13XXX_CONTROLLER_RESET_EVENT);
347
348 if (udc->udc_driver->flags & CI13XXX_DISABLE_STREAMING)
349 hw_write(udc, OP_USBMODE, USBMODE_SDIS, USBMODE_SDIS);
350
351 /* USBMODE should be configured step by step */
352 hw_write(udc, OP_USBMODE, USBMODE_CM, USBMODE_CM_IDLE);
353 hw_write(udc, OP_USBMODE, USBMODE_CM, USBMODE_CM_DEVICE);
354 /* HW >= 2.3 */
355 hw_write(udc, OP_USBMODE, USBMODE_SLOM, USBMODE_SLOM);
356
357 if (hw_read(udc, OP_USBMODE, USBMODE_CM) != USBMODE_CM_DEVICE) {
358 pr_err("cannot enter in device mode");
359 pr_err("lpm = %i", udc->hw_bank.lpm);
360 return -ENODEV;
361 }
362
363 return 0;
364}
365
366/**
367 * hw_device_state: enables/disables interrupts & starts/stops device (execute 80 * hw_device_state: enables/disables interrupts & starts/stops device (execute
368 * without interruption) 81 * without interruption)
369 * @dma: 0 => disable, !0 => enable and set dma engine 82 * @dma: 0 => disable, !0 => enable and set dma engine
@@ -537,42 +250,6 @@ static int hw_ep_set_halt(struct ci13xxx *udc, int num, int dir, int value)
537} 250}
538 251
539/** 252/**
540 * hw_intr_clear: disables interrupt & clears interrupt status (execute without
541 * interruption)
542 * @n: interrupt bit
543 *
544 * This function returns an error code
545 */
546static int hw_intr_clear(struct ci13xxx *udc, int n)
547{
548 if (n >= REG_BITS)
549 return -EINVAL;
550
551 hw_write(udc, OP_USBINTR, BIT(n), 0);
552 hw_write(udc, OP_USBSTS, BIT(n), BIT(n));
553 return 0;
554}
555
556/**
557 * hw_intr_force: enables interrupt & forces interrupt status (execute without
558 * interruption)
559 * @n: interrupt bit
560 *
561 * This function returns an error code
562 */
563static int hw_intr_force(struct ci13xxx *udc, int n)
564{
565 if (n >= REG_BITS)
566 return -EINVAL;
567
568 hw_write(udc, CAP_TESTMODE, TESTMODE_FORCE, TESTMODE_FORCE);
569 hw_write(udc, OP_USBINTR, BIT(n), BIT(n));
570 hw_write(udc, OP_USBSTS, BIT(n), BIT(n));
571 hw_write(udc, CAP_TESTMODE, TESTMODE_FORCE, 0);
572 return 0;
573}
574
575/**
576 * hw_is_port_high_speed: test if port is high speed 253 * hw_is_port_high_speed: test if port is high speed
577 * 254 *
578 * This function returns true if high speed port 255 * This function returns true if high speed port
@@ -584,33 +261,6 @@ static int hw_port_is_high_speed(struct ci13xxx *udc)
584} 261}
585 262
586/** 263/**
587 * hw_port_test_get: reads port test mode value
588 *
589 * This function returns port test mode value
590 */
591static u8 hw_port_test_get(struct ci13xxx *udc)
592{
593 return hw_read(udc, OP_PORTSC, PORTSC_PTC) >> ffs_nr(PORTSC_PTC);
594}
595
596/**
597 * hw_port_test_set: writes port test mode (execute without interruption)
598 * @mode: new value
599 *
600 * This function returns an error code
601 */
602static int hw_port_test_set(struct ci13xxx *udc, u8 mode)
603{
604 const u8 TEST_MODE_MAX = 7;
605
606 if (mode > TEST_MODE_MAX)
607 return -EINVAL;
608
609 hw_write(udc, OP_PORTSC, PORTSC_PTC, mode << ffs_nr(PORTSC_PTC));
610 return 0;
611}
612
613/**
614 * hw_read_intr_enable: returns interrupt enable register 264 * hw_read_intr_enable: returns interrupt enable register
615 * 265 *
616 * This function returns register data 266 * This function returns register data
@@ -631,48 +281,6 @@ static u32 hw_read_intr_status(struct ci13xxx *udc)
631} 281}
632 282
633/** 283/**
634 * hw_register_read: reads all device registers (execute without interruption)
635 * @buf: destination buffer
636 * @size: buffer size
637 *
638 * This function returns number of registers read
639 */
640static size_t hw_register_read(struct ci13xxx *udc, u32 *buf, size_t size)
641{
642 unsigned i;
643
644 if (size > udc->hw_bank.size)
645 size = udc->hw_bank.size;
646
647 for (i = 0; i < size; i++)
648 buf[i] = hw_read(udc, i * sizeof(u32), ~0);
649
650 return size;
651}
652
653/**
654 * hw_register_write: writes to register
655 * @addr: register address
656 * @data: register value
657 *
658 * This function returns an error code
659 */
660static int hw_register_write(struct ci13xxx *udc, u16 addr, u32 data)
661{
662 /* align */
663 addr /= sizeof(u32);
664
665 if (addr >= udc->hw_bank.size)
666 return -EINVAL;
667
668 /* align */
669 addr *= sizeof(u32);
670
671 hw_write(udc, addr, ~0, data);
672 return 0;
673}
674
675/**
676 * hw_test_and_clear_complete: test & clear complete status (execute without 284 * hw_test_and_clear_complete: test & clear complete status (execute without
677 * interruption) 285 * interruption)
678 * @n: endpoint number 286 * @n: endpoint number
@@ -766,673 +374,6 @@ static int hw_usb_reset(struct ci13xxx *udc)
766} 374}
767 375
768/****************************************************************************** 376/******************************************************************************
769 * DBG block
770 *****************************************************************************/
771/**
772 * show_device: prints information about device capabilities and status
773 *
774 * Check "device.h" for details
775 */
776static ssize_t show_device(struct device *dev, struct device_attribute *attr,
777 char *buf)
778{
779 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
780 struct usb_gadget *gadget = &udc->gadget;
781 int n = 0;
782
783 if (attr == NULL || buf == NULL) {
784 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
785 return 0;
786 }
787
788 n += scnprintf(buf + n, PAGE_SIZE - n, "speed = %d\n",
789 gadget->speed);
790 n += scnprintf(buf + n, PAGE_SIZE - n, "max_speed = %d\n",
791 gadget->max_speed);
792 /* TODO: Scheduled for removal in 3.8. */
793 n += scnprintf(buf + n, PAGE_SIZE - n, "is_dualspeed = %d\n",
794 gadget_is_dualspeed(gadget));
795 n += scnprintf(buf + n, PAGE_SIZE - n, "is_otg = %d\n",
796 gadget->is_otg);
797 n += scnprintf(buf + n, PAGE_SIZE - n, "is_a_peripheral = %d\n",
798 gadget->is_a_peripheral);
799 n += scnprintf(buf + n, PAGE_SIZE - n, "b_hnp_enable = %d\n",
800 gadget->b_hnp_enable);
801 n += scnprintf(buf + n, PAGE_SIZE - n, "a_hnp_support = %d\n",
802 gadget->a_hnp_support);
803 n += scnprintf(buf + n, PAGE_SIZE - n, "a_alt_hnp_support = %d\n",
804 gadget->a_alt_hnp_support);
805 n += scnprintf(buf + n, PAGE_SIZE - n, "name = %s\n",
806 (gadget->name ? gadget->name : ""));
807
808 return n;
809}
810static DEVICE_ATTR(device, S_IRUSR, show_device, NULL);
811
812/**
813 * show_driver: prints information about attached gadget (if any)
814 *
815 * Check "device.h" for details
816 */
817static ssize_t show_driver(struct device *dev, struct device_attribute *attr,
818 char *buf)
819{
820 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
821 struct usb_gadget_driver *driver = udc->driver;
822 int n = 0;
823
824 if (attr == NULL || buf == NULL) {
825 dev_err(dev, "[%s] EINVAL\n", __func__);
826 return 0;
827 }
828
829 if (driver == NULL)
830 return scnprintf(buf, PAGE_SIZE,
831 "There is no gadget attached!\n");
832
833 n += scnprintf(buf + n, PAGE_SIZE - n, "function = %s\n",
834 (driver->function ? driver->function : ""));
835 n += scnprintf(buf + n, PAGE_SIZE - n, "max speed = %d\n",
836 driver->max_speed);
837
838 return n;
839}
840static DEVICE_ATTR(driver, S_IRUSR, show_driver, NULL);
841
842/* Maximum event message length */
843#define DBG_DATA_MSG 64UL
844
845/* Maximum event messages */
846#define DBG_DATA_MAX 128UL
847
848/* Event buffer descriptor */
849static struct {
850 char (buf[DBG_DATA_MAX])[DBG_DATA_MSG]; /* buffer */
851 unsigned idx; /* index */
852 unsigned tty; /* print to console? */
853 rwlock_t lck; /* lock */
854} dbg_data = {
855 .idx = 0,
856 .tty = 0,
857 .lck = __RW_LOCK_UNLOCKED(lck)
858};
859
860/**
861 * dbg_dec: decrements debug event index
862 * @idx: buffer index
863 */
864static void dbg_dec(unsigned *idx)
865{
866 *idx = (*idx - 1) & (DBG_DATA_MAX-1);
867}
868
869/**
870 * dbg_inc: increments debug event index
871 * @idx: buffer index
872 */
873static void dbg_inc(unsigned *idx)
874{
875 *idx = (*idx + 1) & (DBG_DATA_MAX-1);
876}
877
878/**
879 * dbg_print: prints the common part of the event
880 * @addr: endpoint address
881 * @name: event name
882 * @status: status
883 * @extra: extra information
884 */
885static void dbg_print(u8 addr, const char *name, int status, const char *extra)
886{
887 struct timeval tval;
888 unsigned int stamp;
889 unsigned long flags;
890
891 write_lock_irqsave(&dbg_data.lck, flags);
892
893 do_gettimeofday(&tval);
894 stamp = tval.tv_sec & 0xFFFF; /* 2^32 = 4294967296. Limit to 4096s */
895 stamp = stamp * 1000000 + tval.tv_usec;
896
897 scnprintf(dbg_data.buf[dbg_data.idx], DBG_DATA_MSG,
898 "%04X\t? %02X %-7.7s %4i ?\t%s\n",
899 stamp, addr, name, status, extra);
900
901 dbg_inc(&dbg_data.idx);
902
903 write_unlock_irqrestore(&dbg_data.lck, flags);
904
905 if (dbg_data.tty != 0)
906 pr_notice("%04X\t? %02X %-7.7s %4i ?\t%s\n",
907 stamp, addr, name, status, extra);
908}
909
910/**
911 * dbg_done: prints a DONE event
912 * @addr: endpoint address
913 * @td: transfer descriptor
914 * @status: status
915 */
916static void dbg_done(u8 addr, const u32 token, int status)
917{
918 char msg[DBG_DATA_MSG];
919
920 scnprintf(msg, sizeof(msg), "%d %02X",
921 (int)(token & TD_TOTAL_BYTES) >> ffs_nr(TD_TOTAL_BYTES),
922 (int)(token & TD_STATUS) >> ffs_nr(TD_STATUS));
923 dbg_print(addr, "DONE", status, msg);
924}
925
926/**
927 * dbg_event: prints a generic event
928 * @addr: endpoint address
929 * @name: event name
930 * @status: status
931 */
932static void dbg_event(u8 addr, const char *name, int status)
933{
934 if (name != NULL)
935 dbg_print(addr, name, status, "");
936}
937
938/*
939 * dbg_queue: prints a QUEUE event
940 * @addr: endpoint address
941 * @req: USB request
942 * @status: status
943 */
944static void dbg_queue(u8 addr, const struct usb_request *req, int status)
945{
946 char msg[DBG_DATA_MSG];
947
948 if (req != NULL) {
949 scnprintf(msg, sizeof(msg),
950 "%d %d", !req->no_interrupt, req->length);
951 dbg_print(addr, "QUEUE", status, msg);
952 }
953}
954
955/**
956 * dbg_setup: prints a SETUP event
957 * @addr: endpoint address
958 * @req: setup request
959 */
960static void dbg_setup(u8 addr, const struct usb_ctrlrequest *req)
961{
962 char msg[DBG_DATA_MSG];
963
964 if (req != NULL) {
965 scnprintf(msg, sizeof(msg),
966 "%02X %02X %04X %04X %d", req->bRequestType,
967 req->bRequest, le16_to_cpu(req->wValue),
968 le16_to_cpu(req->wIndex), le16_to_cpu(req->wLength));
969 dbg_print(addr, "SETUP", 0, msg);
970 }
971}
972
973/**
974 * show_events: displays the event buffer
975 *
976 * Check "device.h" for details
977 */
978static ssize_t show_events(struct device *dev, struct device_attribute *attr,
979 char *buf)
980{
981 unsigned long flags;
982 unsigned i, j, n = 0;
983
984 if (attr == NULL || buf == NULL) {
985 dev_err(dev->parent, "[%s] EINVAL\n", __func__);
986 return 0;
987 }
988
989 read_lock_irqsave(&dbg_data.lck, flags);
990
991 i = dbg_data.idx;
992 for (dbg_dec(&i); i != dbg_data.idx; dbg_dec(&i)) {
993 n += strlen(dbg_data.buf[i]);
994 if (n >= PAGE_SIZE) {
995 n -= strlen(dbg_data.buf[i]);
996 break;
997 }
998 }
999 for (j = 0, dbg_inc(&i); j < n; dbg_inc(&i))
1000 j += scnprintf(buf + j, PAGE_SIZE - j,
1001 "%s", dbg_data.buf[i]);
1002
1003 read_unlock_irqrestore(&dbg_data.lck, flags);
1004
1005 return n;
1006}
1007
1008/**
1009 * store_events: configure if events are going to be also printed to console
1010 *
1011 * Check "device.h" for details
1012 */
1013static ssize_t store_events(struct device *dev, struct device_attribute *attr,
1014 const char *buf, size_t count)
1015{
1016 unsigned tty;
1017
1018 if (attr == NULL || buf == NULL) {
1019 dev_err(dev, "[%s] EINVAL\n", __func__);
1020 goto done;
1021 }
1022
1023 if (sscanf(buf, "%u", &tty) != 1 || tty > 1) {
1024 dev_err(dev, "<1|0>: enable|disable console log\n");
1025 goto done;
1026 }
1027
1028 dbg_data.tty = tty;
1029 dev_info(dev, "tty = %u", dbg_data.tty);
1030
1031 done:
1032 return count;
1033}
1034static DEVICE_ATTR(events, S_IRUSR | S_IWUSR, show_events, store_events);
1035
1036/**
1037 * show_inters: interrupt status, enable status and historic
1038 *
1039 * Check "device.h" for details
1040 */
1041static ssize_t show_inters(struct device *dev, struct device_attribute *attr,
1042 char *buf)
1043{
1044 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1045 unsigned long flags;
1046 u32 intr;
1047 unsigned i, j, n = 0;
1048
1049 if (attr == NULL || buf == NULL) {
1050 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1051 return 0;
1052 }
1053
1054 spin_lock_irqsave(&udc->lock, flags);
1055
1056 n += scnprintf(buf + n, PAGE_SIZE - n,
1057 "status = %08x\n", hw_read_intr_status(udc));
1058 n += scnprintf(buf + n, PAGE_SIZE - n,
1059 "enable = %08x\n", hw_read_intr_enable(udc));
1060
1061 n += scnprintf(buf + n, PAGE_SIZE - n, "*test = %d\n",
1062 isr_statistics.test);
1063 n += scnprintf(buf + n, PAGE_SIZE - n, "? ui = %d\n",
1064 isr_statistics.ui);
1065 n += scnprintf(buf + n, PAGE_SIZE - n, "? uei = %d\n",
1066 isr_statistics.uei);
1067 n += scnprintf(buf + n, PAGE_SIZE - n, "? pci = %d\n",
1068 isr_statistics.pci);
1069 n += scnprintf(buf + n, PAGE_SIZE - n, "? uri = %d\n",
1070 isr_statistics.uri);
1071 n += scnprintf(buf + n, PAGE_SIZE - n, "? sli = %d\n",
1072 isr_statistics.sli);
1073 n += scnprintf(buf + n, PAGE_SIZE - n, "*none = %d\n",
1074 isr_statistics.none);
1075 n += scnprintf(buf + n, PAGE_SIZE - n, "*hndl = %d\n",
1076 isr_statistics.hndl.cnt);
1077
1078 for (i = isr_statistics.hndl.idx, j = 0; j <= ISR_MASK; j++, i++) {
1079 i &= ISR_MASK;
1080 intr = isr_statistics.hndl.buf[i];
1081
1082 if (USBi_UI & intr)
1083 n += scnprintf(buf + n, PAGE_SIZE - n, "ui ");
1084 intr &= ~USBi_UI;
1085 if (USBi_UEI & intr)
1086 n += scnprintf(buf + n, PAGE_SIZE - n, "uei ");
1087 intr &= ~USBi_UEI;
1088 if (USBi_PCI & intr)
1089 n += scnprintf(buf + n, PAGE_SIZE - n, "pci ");
1090 intr &= ~USBi_PCI;
1091 if (USBi_URI & intr)
1092 n += scnprintf(buf + n, PAGE_SIZE - n, "uri ");
1093 intr &= ~USBi_URI;
1094 if (USBi_SLI & intr)
1095 n += scnprintf(buf + n, PAGE_SIZE - n, "sli ");
1096 intr &= ~USBi_SLI;
1097 if (intr)
1098 n += scnprintf(buf + n, PAGE_SIZE - n, "??? ");
1099 if (isr_statistics.hndl.buf[i])
1100 n += scnprintf(buf + n, PAGE_SIZE - n, "\n");
1101 }
1102
1103 spin_unlock_irqrestore(&udc->lock, flags);
1104
1105 return n;
1106}
1107
1108/**
1109 * store_inters: enable & force or disable an individual interrutps
1110 * (to be used for test purposes only)
1111 *
1112 * Check "device.h" for details
1113 */
1114static ssize_t store_inters(struct device *dev, struct device_attribute *attr,
1115 const char *buf, size_t count)
1116{
1117 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1118 unsigned long flags;
1119 unsigned en, bit;
1120
1121 if (attr == NULL || buf == NULL) {
1122 dev_err(udc->dev, "EINVAL\n");
1123 goto done;
1124 }
1125
1126 if (sscanf(buf, "%u %u", &en, &bit) != 2 || en > 1) {
1127 dev_err(udc->dev, "<1|0> <bit>: enable|disable interrupt\n");
1128 goto done;
1129 }
1130
1131 spin_lock_irqsave(&udc->lock, flags);
1132 if (en) {
1133 if (hw_intr_force(udc, bit))
1134 dev_err(dev, "invalid bit number\n");
1135 else
1136 isr_statistics.test++;
1137 } else {
1138 if (hw_intr_clear(udc, bit))
1139 dev_err(dev, "invalid bit number\n");
1140 }
1141 spin_unlock_irqrestore(&udc->lock, flags);
1142
1143 done:
1144 return count;
1145}
1146static DEVICE_ATTR(inters, S_IRUSR | S_IWUSR, show_inters, store_inters);
1147
1148/**
1149 * show_port_test: reads port test mode
1150 *
1151 * Check "device.h" for details
1152 */
1153static ssize_t show_port_test(struct device *dev,
1154 struct device_attribute *attr, char *buf)
1155{
1156 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1157 unsigned long flags;
1158 unsigned mode;
1159
1160 if (attr == NULL || buf == NULL) {
1161 dev_err(udc->dev, "EINVAL\n");
1162 return 0;
1163 }
1164
1165 spin_lock_irqsave(&udc->lock, flags);
1166 mode = hw_port_test_get(udc);
1167 spin_unlock_irqrestore(&udc->lock, flags);
1168
1169 return scnprintf(buf, PAGE_SIZE, "mode = %u\n", mode);
1170}
1171
1172/**
1173 * store_port_test: writes port test mode
1174 *
1175 * Check "device.h" for details
1176 */
1177static ssize_t store_port_test(struct device *dev,
1178 struct device_attribute *attr,
1179 const char *buf, size_t count)
1180{
1181 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1182 unsigned long flags;
1183 unsigned mode;
1184
1185 if (attr == NULL || buf == NULL) {
1186 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1187 goto done;
1188 }
1189
1190 if (sscanf(buf, "%u", &mode) != 1) {
1191 dev_err(udc->dev, "<mode>: set port test mode");
1192 goto done;
1193 }
1194
1195 spin_lock_irqsave(&udc->lock, flags);
1196 if (hw_port_test_set(udc, mode))
1197 dev_err(udc->dev, "invalid mode\n");
1198 spin_unlock_irqrestore(&udc->lock, flags);
1199
1200 done:
1201 return count;
1202}
1203static DEVICE_ATTR(port_test, S_IRUSR | S_IWUSR,
1204 show_port_test, store_port_test);
1205
1206/**
1207 * show_qheads: DMA contents of all queue heads
1208 *
1209 * Check "device.h" for details
1210 */
1211static ssize_t show_qheads(struct device *dev, struct device_attribute *attr,
1212 char *buf)
1213{
1214 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1215 unsigned long flags;
1216 unsigned i, j, n = 0;
1217
1218 if (attr == NULL || buf == NULL) {
1219 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1220 return 0;
1221 }
1222
1223 spin_lock_irqsave(&udc->lock, flags);
1224 for (i = 0; i < udc->hw_ep_max/2; i++) {
1225 struct ci13xxx_ep *mEpRx = &udc->ci13xxx_ep[i];
1226 struct ci13xxx_ep *mEpTx =
1227 &udc->ci13xxx_ep[i + udc->hw_ep_max/2];
1228 n += scnprintf(buf + n, PAGE_SIZE - n,
1229 "EP=%02i: RX=%08X TX=%08X\n",
1230 i, (u32)mEpRx->qh.dma, (u32)mEpTx->qh.dma);
1231 for (j = 0; j < (sizeof(struct ci13xxx_qh)/sizeof(u32)); j++) {
1232 n += scnprintf(buf + n, PAGE_SIZE - n,
1233 " %04X: %08X %08X\n", j,
1234 *((u32 *)mEpRx->qh.ptr + j),
1235 *((u32 *)mEpTx->qh.ptr + j));
1236 }
1237 }
1238 spin_unlock_irqrestore(&udc->lock, flags);
1239
1240 return n;
1241}
1242static DEVICE_ATTR(qheads, S_IRUSR, show_qheads, NULL);
1243
1244/**
1245 * show_registers: dumps all registers
1246 *
1247 * Check "device.h" for details
1248 */
1249#define DUMP_ENTRIES 512
1250static ssize_t show_registers(struct device *dev,
1251 struct device_attribute *attr, char *buf)
1252{
1253 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1254 unsigned long flags;
1255 u32 *dump;
1256 unsigned i, k, n = 0;
1257
1258 if (attr == NULL || buf == NULL) {
1259 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1260 return 0;
1261 }
1262
1263 dump = kmalloc(sizeof(u32) * DUMP_ENTRIES, GFP_KERNEL);
1264 if (!dump) {
1265 dev_err(udc->dev, "%s: out of memory\n", __func__);
1266 return 0;
1267 }
1268
1269 spin_lock_irqsave(&udc->lock, flags);
1270 k = hw_register_read(udc, dump, DUMP_ENTRIES);
1271 spin_unlock_irqrestore(&udc->lock, flags);
1272
1273 for (i = 0; i < k; i++) {
1274 n += scnprintf(buf + n, PAGE_SIZE - n,
1275 "reg[0x%04X] = 0x%08X\n",
1276 i * (unsigned)sizeof(u32), dump[i]);
1277 }
1278 kfree(dump);
1279
1280 return n;
1281}
1282
1283/**
1284 * store_registers: writes value to register address
1285 *
1286 * Check "device.h" for details
1287 */
1288static ssize_t store_registers(struct device *dev,
1289 struct device_attribute *attr,
1290 const char *buf, size_t count)
1291{
1292 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1293 unsigned long addr, data, flags;
1294
1295 if (attr == NULL || buf == NULL) {
1296 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1297 goto done;
1298 }
1299
1300 if (sscanf(buf, "%li %li", &addr, &data) != 2) {
1301 dev_err(udc->dev,
1302 "<addr> <data>: write data to register address\n");
1303 goto done;
1304 }
1305
1306 spin_lock_irqsave(&udc->lock, flags);
1307 if (hw_register_write(udc, addr, data))
1308 dev_err(udc->dev, "invalid address range\n");
1309 spin_unlock_irqrestore(&udc->lock, flags);
1310
1311 done:
1312 return count;
1313}
1314static DEVICE_ATTR(registers, S_IRUSR | S_IWUSR,
1315 show_registers, store_registers);
1316
1317/**
1318 * show_requests: DMA contents of all requests currently queued (all endpts)
1319 *
1320 * Check "device.h" for details
1321 */
1322static ssize_t show_requests(struct device *dev, struct device_attribute *attr,
1323 char *buf)
1324{
1325 struct ci13xxx *udc = container_of(dev, struct ci13xxx, gadget.dev);
1326 unsigned long flags;
1327 struct list_head *ptr = NULL;
1328 struct ci13xxx_req *req = NULL;
1329 unsigned i, j, n = 0, qSize = sizeof(struct ci13xxx_td)/sizeof(u32);
1330
1331 if (attr == NULL || buf == NULL) {
1332 dev_err(udc->dev, "[%s] EINVAL\n", __func__);
1333 return 0;
1334 }
1335
1336 spin_lock_irqsave(&udc->lock, flags);
1337 for (i = 0; i < udc->hw_ep_max; i++)
1338 list_for_each(ptr, &udc->ci13xxx_ep[i].qh.queue)
1339 {
1340 req = list_entry(ptr, struct ci13xxx_req, queue);
1341
1342 n += scnprintf(buf + n, PAGE_SIZE - n,
1343 "EP=%02i: TD=%08X %s\n",
1344 i % udc->hw_ep_max/2, (u32)req->dma,
1345 ((i < udc->hw_ep_max/2) ? "RX" : "TX"));
1346
1347 for (j = 0; j < qSize; j++)
1348 n += scnprintf(buf + n, PAGE_SIZE - n,
1349 " %04X: %08X\n", j,
1350 *((u32 *)req->ptr + j));
1351 }
1352 spin_unlock_irqrestore(&udc->lock, flags);
1353
1354 return n;
1355}
1356static DEVICE_ATTR(requests, S_IRUSR, show_requests, NULL);
1357
1358/**
1359 * dbg_create_files: initializes the attribute interface
1360 * @dev: device
1361 *
1362 * This function returns an error code
1363 */
1364__maybe_unused static int dbg_create_files(struct device *dev)
1365{
1366 int retval = 0;
1367
1368 if (dev == NULL)
1369 return -EINVAL;
1370 retval = device_create_file(dev, &dev_attr_device);
1371 if (retval)
1372 goto done;
1373 retval = device_create_file(dev, &dev_attr_driver);
1374 if (retval)
1375 goto rm_device;
1376 retval = device_create_file(dev, &dev_attr_events);
1377 if (retval)
1378 goto rm_driver;
1379 retval = device_create_file(dev, &dev_attr_inters);
1380 if (retval)
1381 goto rm_events;
1382 retval = device_create_file(dev, &dev_attr_port_test);
1383 if (retval)
1384 goto rm_inters;
1385 retval = device_create_file(dev, &dev_attr_qheads);
1386 if (retval)
1387 goto rm_port_test;
1388 retval = device_create_file(dev, &dev_attr_registers);
1389 if (retval)
1390 goto rm_qheads;
1391 retval = device_create_file(dev, &dev_attr_requests);
1392 if (retval)
1393 goto rm_registers;
1394 return 0;
1395
1396 rm_registers:
1397 device_remove_file(dev, &dev_attr_registers);
1398 rm_qheads:
1399 device_remove_file(dev, &dev_attr_qheads);
1400 rm_port_test:
1401 device_remove_file(dev, &dev_attr_port_test);
1402 rm_inters:
1403 device_remove_file(dev, &dev_attr_inters);
1404 rm_events:
1405 device_remove_file(dev, &dev_attr_events);
1406 rm_driver:
1407 device_remove_file(dev, &dev_attr_driver);
1408 rm_device:
1409 device_remove_file(dev, &dev_attr_device);
1410 done:
1411 return retval;
1412}
1413
1414/**
1415 * dbg_remove_files: destroys the attribute interface
1416 * @dev: device
1417 *
1418 * This function returns an error code
1419 */
1420__maybe_unused static int dbg_remove_files(struct device *dev)
1421{
1422 if (dev == NULL)
1423 return -EINVAL;
1424 device_remove_file(dev, &dev_attr_requests);
1425 device_remove_file(dev, &dev_attr_registers);
1426 device_remove_file(dev, &dev_attr_qheads);
1427 device_remove_file(dev, &dev_attr_port_test);
1428 device_remove_file(dev, &dev_attr_inters);
1429 device_remove_file(dev, &dev_attr_events);
1430 device_remove_file(dev, &dev_attr_driver);
1431 device_remove_file(dev, &dev_attr_device);
1432 return 0;
1433}
1434
1435/******************************************************************************
1436 * UTIL block 377 * UTIL block
1437 *****************************************************************************/ 378 *****************************************************************************/
1438/** 379/**
@@ -2656,7 +1597,7 @@ static int ci13xxx_stop(struct usb_gadget *gadget,
2656 * This function returns IRQ_HANDLED if the IRQ has been handled 1597 * This function returns IRQ_HANDLED if the IRQ has been handled
2657 * It locks access to registers 1598 * It locks access to registers
2658 */ 1599 */
2659static irqreturn_t udc_irq(int irq, void *data) 1600irqreturn_t udc_irq(int irq, void *data)
2660{ 1601{
2661 struct ci13xxx *udc = data; 1602 struct ci13xxx *udc = data;
2662 irqreturn_t retval; 1603 irqreturn_t retval;
@@ -2675,18 +1616,14 @@ static irqreturn_t udc_irq(int irq, void *data)
2675 } 1616 }
2676 } 1617 }
2677 intr = hw_test_and_clear_intr_active(udc); 1618 intr = hw_test_and_clear_intr_active(udc);
2678 if (intr) { 1619 dbg_interrupt(intr);
2679 isr_statistics.hndl.buf[isr_statistics.hndl.idx++] = intr;
2680 isr_statistics.hndl.idx &= ISR_MASK;
2681 isr_statistics.hndl.cnt++;
2682 1620
1621 if (intr) {
2683 /* order defines priority - do NOT change it */ 1622 /* order defines priority - do NOT change it */
2684 if (USBi_URI & intr) { 1623 if (USBi_URI & intr)
2685 isr_statistics.uri++;
2686 isr_reset_handler(udc); 1624 isr_reset_handler(udc);
2687 } 1625
2688 if (USBi_PCI & intr) { 1626 if (USBi_PCI & intr) {
2689 isr_statistics.pci++;
2690 udc->gadget.speed = hw_port_is_high_speed(udc) ? 1627 udc->gadget.speed = hw_port_is_high_speed(udc) ?
2691 USB_SPEED_HIGH : USB_SPEED_FULL; 1628 USB_SPEED_HIGH : USB_SPEED_FULL;
2692 if (udc->suspended && udc->driver->resume) { 1629 if (udc->suspended && udc->driver->resume) {
@@ -2696,12 +1633,10 @@ static irqreturn_t udc_irq(int irq, void *data)
2696 udc->suspended = 0; 1633 udc->suspended = 0;
2697 } 1634 }
2698 } 1635 }
2699 if (USBi_UEI & intr) 1636
2700 isr_statistics.uei++; 1637 if (USBi_UI & intr)
2701 if (USBi_UI & intr) {
2702 isr_statistics.ui++;
2703 isr_tr_complete_handler(udc); 1638 isr_tr_complete_handler(udc);
2704 } 1639
2705 if (USBi_SLI & intr) { 1640 if (USBi_SLI & intr) {
2706 if (udc->gadget.speed != USB_SPEED_UNKNOWN && 1641 if (udc->gadget.speed != USB_SPEED_UNKNOWN &&
2707 udc->driver->suspend) { 1642 udc->driver->suspend) {
@@ -2710,11 +1645,9 @@ static irqreturn_t udc_irq(int irq, void *data)
2710 udc->driver->suspend(&udc->gadget); 1645 udc->driver->suspend(&udc->gadget);
2711 spin_lock(&udc->lock); 1646 spin_lock(&udc->lock);
2712 } 1647 }
2713 isr_statistics.sli++;
2714 } 1648 }
2715 retval = IRQ_HANDLED; 1649 retval = IRQ_HANDLED;
2716 } else { 1650 } else {
2717 isr_statistics.none++;
2718 retval = IRQ_NONE; 1651 retval = IRQ_NONE;
2719 } 1652 }
2720 spin_unlock(&udc->lock); 1653 spin_unlock(&udc->lock);
@@ -2742,8 +1675,8 @@ static void udc_release(struct device *dev)
2742 * No interrupts active, the IRQ has not been requested yet 1675 * No interrupts active, the IRQ has not been requested yet
2743 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask 1676 * Kernel assumes 32-bit DMA operations by default, no need to dma_set_mask
2744 */ 1677 */
2745static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev, 1678int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
2746 void __iomem *regs, struct ci13xxx **_udc) 1679 void __iomem *regs, struct ci13xxx **_udc)
2747{ 1680{
2748 struct ci13xxx *udc; 1681 struct ci13xxx *udc;
2749 int retval = 0; 1682 int retval = 0;
@@ -2824,9 +1757,7 @@ static int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
2824 goto put_transceiver; 1757 goto put_transceiver;
2825 } 1758 }
2826 1759
2827#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2828 retval = dbg_create_files(&udc->gadget.dev); 1760 retval = dbg_create_files(&udc->gadget.dev);
2829#endif
2830 if (retval) 1761 if (retval)
2831 goto unreg_device; 1762 goto unreg_device;
2832 1763
@@ -2855,9 +1786,7 @@ remove_trans:
2855 1786
2856 dev_err(dev, "error = %i\n", retval); 1787 dev_err(dev, "error = %i\n", retval);
2857remove_dbg: 1788remove_dbg:
2858#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2859 dbg_remove_files(&udc->gadget.dev); 1789 dbg_remove_files(&udc->gadget.dev);
2860#endif
2861unreg_device: 1790unreg_device:
2862 device_unregister(&udc->gadget.dev); 1791 device_unregister(&udc->gadget.dev);
2863put_transceiver: 1792put_transceiver:
@@ -2878,7 +1807,7 @@ free_udc:
2878 * 1807 *
2879 * No interrupts active, the IRQ has been released 1808 * No interrupts active, the IRQ has been released
2880 */ 1809 */
2881static void udc_remove(struct ci13xxx *udc) 1810void udc_remove(struct ci13xxx *udc)
2882{ 1811{
2883 int i; 1812 int i;
2884 1813
@@ -2900,84 +1829,9 @@ static void udc_remove(struct ci13xxx *udc)
2900 otg_set_peripheral(udc->transceiver->otg, &udc->gadget); 1829 otg_set_peripheral(udc->transceiver->otg, &udc->gadget);
2901 usb_put_transceiver(udc->transceiver); 1830 usb_put_transceiver(udc->transceiver);
2902 } 1831 }
2903#ifdef CONFIG_USB_GADGET_DEBUG_FILES
2904 dbg_remove_files(&udc->gadget.dev); 1832 dbg_remove_files(&udc->gadget.dev);
2905#endif
2906 device_unregister(&udc->gadget.dev); 1833 device_unregister(&udc->gadget.dev);
2907 1834
2908 kfree(udc->hw_bank.regmap); 1835 kfree(udc->hw_bank.regmap);
2909 kfree(udc); 1836 kfree(udc);
2910} 1837}
2911
2912static int __devinit ci_udc_probe(struct platform_device *pdev)
2913{
2914 struct device *dev = &pdev->dev;
2915 struct ci13xxx_udc_driver *driver = dev->platform_data;
2916 struct ci13xxx *udc;
2917 struct resource *res;
2918 void __iomem *base;
2919 int ret;
2920
2921 if (!driver) {
2922 dev_err(dev, "platform data missing\n");
2923 return -ENODEV;
2924 }
2925
2926 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2927 if (!res) {
2928 dev_err(dev, "missing resource\n");
2929 return -ENODEV;
2930 }
2931
2932 base = devm_request_and_ioremap(dev, res);
2933 if (!res) {
2934 dev_err(dev, "can't request and ioremap resource\n");
2935 return -ENOMEM;
2936 }
2937
2938 ret = udc_probe(driver, dev, base, &udc);
2939 if (ret)
2940 return ret;
2941
2942 udc->irq = platform_get_irq(pdev, 0);
2943 if (udc->irq < 0) {
2944 dev_err(dev, "missing IRQ\n");
2945 ret = -ENODEV;
2946 goto out;
2947 }
2948
2949 platform_set_drvdata(pdev, udc);
2950 ret = request_irq(udc->irq, udc_irq, IRQF_SHARED, driver->name, udc);
2951
2952out:
2953 if (ret)
2954 udc_remove(udc);
2955
2956 return ret;
2957}
2958
2959static int __devexit ci_udc_remove(struct platform_device *pdev)
2960{
2961 struct ci13xxx *udc = platform_get_drvdata(pdev);
2962
2963 free_irq(udc->irq, udc);
2964 udc_remove(udc);
2965
2966 return 0;
2967}
2968
2969static struct platform_driver ci_udc_driver = {
2970 .probe = ci_udc_probe,
2971 .remove = __devexit_p(ci_udc_remove),
2972 .driver = {
2973 .name = "ci_udc",
2974 },
2975};
2976
2977module_platform_driver(ci_udc_driver);
2978
2979MODULE_ALIAS("platform:ci_udc");
2980MODULE_ALIAS("platform:ci13xxx");
2981MODULE_LICENSE("GPL v2");
2982MODULE_AUTHOR("David Lopo <dlopo@chipidea.mips.com>");
2983MODULE_DESCRIPTION("ChipIdea UDC Driver");
diff --git a/drivers/usb/chipidea/udc.h b/drivers/usb/chipidea/udc.h
new file mode 100644
index 000000000000..82c9e3e772f7
--- /dev/null
+++ b/drivers/usb/chipidea/udc.h
@@ -0,0 +1,96 @@
1/*
2 * udc.h - ChipIdea UDC structures
3 *
4 * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
5 *
6 * Author: David Lopo
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#ifndef __DRIVERS_USB_CHIPIDEA_UDC_H
14#define __DRIVERS_USB_CHIPIDEA_UDC_H
15
16#include <linux/list.h>
17
18#define CTRL_PAYLOAD_MAX 64
19#define RX 0 /* similar to USB_DIR_OUT but can be used as an index */
20#define TX 1 /* similar to USB_DIR_IN but can be used as an index */
21
22/* DMA layout of transfer descriptors */
23struct ci13xxx_td {
24 /* 0 */
25 u32 next;
26#define TD_TERMINATE BIT(0)
27#define TD_ADDR_MASK (0xFFFFFFEUL << 5)
28 /* 1 */
29 u32 token;
30#define TD_STATUS (0x00FFUL << 0)
31#define TD_STATUS_TR_ERR BIT(3)
32#define TD_STATUS_DT_ERR BIT(5)
33#define TD_STATUS_HALTED BIT(6)
34#define TD_STATUS_ACTIVE BIT(7)
35#define TD_MULTO (0x0003UL << 10)
36#define TD_IOC BIT(15)
37#define TD_TOTAL_BYTES (0x7FFFUL << 16)
38 /* 2 */
39 u32 page[5];
40#define TD_CURR_OFFSET (0x0FFFUL << 0)
41#define TD_FRAME_NUM (0x07FFUL << 0)
42#define TD_RESERVED_MASK (0x0FFFUL << 0)
43} __attribute__ ((packed));
44
45/* DMA layout of queue heads */
46struct ci13xxx_qh {
47 /* 0 */
48 u32 cap;
49#define QH_IOS BIT(15)
50#define QH_MAX_PKT (0x07FFUL << 16)
51#define QH_ZLT BIT(29)
52#define QH_MULT (0x0003UL << 30)
53 /* 1 */
54 u32 curr;
55 /* 2 - 8 */
56 struct ci13xxx_td td;
57 /* 9 */
58 u32 RESERVED;
59 struct usb_ctrlrequest setup;
60} __attribute__ ((packed));
61
62/* Extension of usb_request */
63struct ci13xxx_req {
64 struct usb_request req;
65 unsigned map;
66 struct list_head queue;
67 struct ci13xxx_td *ptr;
68 dma_addr_t dma;
69 struct ci13xxx_td *zptr;
70 dma_addr_t zdma;
71};
72
73#ifdef CONFIG_USB_CHIPIDEA_UDC
74irqreturn_t udc_irq(int irq, void *data);
75int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
76 void __iomem *regs, struct ci13xxx **_udc);
77void udc_remove(struct ci13xxx *udc);
78#else
79static inline irqreturn_t udc_irq(int irq, void *data)
80{
81 return IRQ_NONE;
82}
83
84static inline
85int udc_probe(struct ci13xxx_udc_driver *driver, struct device *dev,
86 void __iomem *regs, struct ci13xxx **_udc)
87{
88 return -ENODEV;
89}
90
91static inline void udc_remove(struct ci13xxx *udc)
92{
93}
94#endif
95
96#endif /* __DRIVERS_USB_CHIPIDEA_UDC_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-12 16:44:50 -0500