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-rw-r--r--drivers/pci/pci-sysfs.c42
-rw-r--r--drivers/pci/pcie/portdrv_pci.c9
2 files changed, 51 insertions, 0 deletions
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index 6869009c7393..02d107b15281 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -458,6 +458,40 @@ boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
458} 458}
459struct device_attribute vga_attr = __ATTR_RO(boot_vga); 459struct device_attribute vga_attr = __ATTR_RO(boot_vga);
460 460
461static void
462pci_config_pm_runtime_get(struct pci_dev *pdev)
463{
464 struct device *dev = &pdev->dev;
465 struct device *parent = dev->parent;
466
467 if (parent)
468 pm_runtime_get_sync(parent);
469 pm_runtime_get_noresume(dev);
470 /*
471 * pdev->current_state is set to PCI_D3cold during suspending,
472 * so wait until suspending completes
473 */
474 pm_runtime_barrier(dev);
475 /*
476 * Only need to resume devices in D3cold, because config
477 * registers are still accessible for devices suspended but
478 * not in D3cold.
479 */
480 if (pdev->current_state == PCI_D3cold)
481 pm_runtime_resume(dev);
482}
483
484static void
485pci_config_pm_runtime_put(struct pci_dev *pdev)
486{
487 struct device *dev = &pdev->dev;
488 struct device *parent = dev->parent;
489
490 pm_runtime_put(dev);
491 if (parent)
492 pm_runtime_put_sync(parent);
493}
494
461static ssize_t 495static ssize_t
462pci_read_config(struct file *filp, struct kobject *kobj, 496pci_read_config(struct file *filp, struct kobject *kobj,
463 struct bin_attribute *bin_attr, 497 struct bin_attribute *bin_attr,
@@ -484,6 +518,8 @@ pci_read_config(struct file *filp, struct kobject *kobj,
484 size = count; 518 size = count;
485 } 519 }
486 520
521 pci_config_pm_runtime_get(dev);
522
487 if ((off & 1) && size) { 523 if ((off & 1) && size) {
488 u8 val; 524 u8 val;
489 pci_user_read_config_byte(dev, off, &val); 525 pci_user_read_config_byte(dev, off, &val);
@@ -529,6 +565,8 @@ pci_read_config(struct file *filp, struct kobject *kobj,
529 --size; 565 --size;
530 } 566 }
531 567
568 pci_config_pm_runtime_put(dev);
569
532 return count; 570 return count;
533} 571}
534 572
@@ -549,6 +587,8 @@ pci_write_config(struct file* filp, struct kobject *kobj,
549 count = size; 587 count = size;
550 } 588 }
551 589
590 pci_config_pm_runtime_get(dev);
591
552 if ((off & 1) && size) { 592 if ((off & 1) && size) {
553 pci_user_write_config_byte(dev, off, data[off - init_off]); 593 pci_user_write_config_byte(dev, off, data[off - init_off]);
554 off++; 594 off++;
@@ -587,6 +627,8 @@ pci_write_config(struct file* filp, struct kobject *kobj,
587 --size; 627 --size;
588 } 628 }
589 629
630 pci_config_pm_runtime_put(dev);
631
590 return count; 632 return count;
591} 633}
592 634
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 62f5a76c8f80..e76b44777dbf 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -140,9 +140,17 @@ static int pcie_port_runtime_resume(struct device *dev)
140{ 140{
141 return 0; 141 return 0;
142} 142}
143
144static int pcie_port_runtime_idle(struct device *dev)
145{
146 /* Delay for a short while to prevent too frequent suspend/resume */
147 pm_schedule_suspend(dev, 10);
148 return -EBUSY;
149}
143#else 150#else
144#define pcie_port_runtime_suspend NULL 151#define pcie_port_runtime_suspend NULL
145#define pcie_port_runtime_resume NULL 152#define pcie_port_runtime_resume NULL
153#define pcie_port_runtime_idle NULL
146#endif 154#endif
147 155
148static const struct dev_pm_ops pcie_portdrv_pm_ops = { 156static const struct dev_pm_ops pcie_portdrv_pm_ops = {
@@ -155,6 +163,7 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = {
155 .resume_noirq = pcie_port_resume_noirq, 163 .resume_noirq = pcie_port_resume_noirq,
156 .runtime_suspend = pcie_port_runtime_suspend, 164 .runtime_suspend = pcie_port_runtime_suspend,
157 .runtime_resume = pcie_port_runtime_resume, 165 .runtime_resume = pcie_port_runtime_resume,
166 .runtime_idle = pcie_port_runtime_idle,
158}; 167};
159 168
160#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops) 169#define PCIE_PORTDRV_PM_OPS (&pcie_portdrv_pm_ops)