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-rw-r--r--drivers/net/wireless/b43legacy/b43legacy.h31
-rw-r--r--drivers/net/wireless/b43legacy/main.c124
-rw-r--r--drivers/net/wireless/b43legacy/phy.c14
-rw-r--r--drivers/net/wireless/b43legacy/pio.c6
-rw-r--r--drivers/net/wireless/b43legacy/radio.c16
5 files changed, 110 insertions, 81 deletions
diff --git a/drivers/net/wireless/b43legacy/b43legacy.h b/drivers/net/wireless/b43legacy/b43legacy.h
index 93419adb925e..c80edd2b9044 100644
--- a/drivers/net/wireless/b43legacy/b43legacy.h
+++ b/drivers/net/wireless/b43legacy/b43legacy.h
@@ -23,7 +23,7 @@
23#include "phy.h" 23#include "phy.h"
24 24
25 25
26#define B43legacy_IRQWAIT_MAX_RETRIES 100 26#define B43legacy_IRQWAIT_MAX_RETRIES 20
27 27
28#define B43legacy_RX_MAX_SSI 60 /* best guess at max ssi */ 28#define B43legacy_RX_MAX_SSI 60 /* best guess at max ssi */
29 29
@@ -40,9 +40,8 @@
40#define B43legacy_MMIO_DMA4_IRQ_MASK 0x44 40#define B43legacy_MMIO_DMA4_IRQ_MASK 0x44
41#define B43legacy_MMIO_DMA5_REASON 0x48 41#define B43legacy_MMIO_DMA5_REASON 0x48
42#define B43legacy_MMIO_DMA5_IRQ_MASK 0x4C 42#define B43legacy_MMIO_DMA5_IRQ_MASK 0x4C
43#define B43legacy_MMIO_MACCTL 0x120 43#define B43legacy_MMIO_MACCTL 0x120 /* MAC control */
44#define B43legacy_MMIO_STATUS_BITFIELD 0x120 44#define B43legacy_MMIO_MACCMD 0x124 /* MAC command */
45#define B43legacy_MMIO_STATUS2_BITFIELD 0x124
46#define B43legacy_MMIO_GEN_IRQ_REASON 0x128 45#define B43legacy_MMIO_GEN_IRQ_REASON 0x128
47#define B43legacy_MMIO_GEN_IRQ_MASK 0x12C 46#define B43legacy_MMIO_GEN_IRQ_MASK 0x12C
48#define B43legacy_MMIO_RAM_CONTROL 0x130 47#define B43legacy_MMIO_RAM_CONTROL 0x130
@@ -177,31 +176,25 @@
177#define B43legacy_RADIOCTL_ID 0x01 176#define B43legacy_RADIOCTL_ID 0x01
178 177
179/* MAC Control bitfield */ 178/* MAC Control bitfield */
179#define B43legacy_MACCTL_ENABLED 0x00000001 /* MAC Enabled */
180#define B43legacy_MACCTL_PSM_RUN 0x00000002 /* Run Microcode */
181#define B43legacy_MACCTL_PSM_JMP0 0x00000004 /* Microcode jump to 0 */
182#define B43legacy_MACCTL_SHM_ENABLED 0x00000100 /* SHM Enabled */
180#define B43legacy_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */ 183#define B43legacy_MACCTL_IHR_ENABLED 0x00000400 /* IHR Region Enabled */
184#define B43legacy_MACCTL_BE 0x00010000 /* Big Endian mode */
181#define B43legacy_MACCTL_INFRA 0x00020000 /* Infrastructure mode */ 185#define B43legacy_MACCTL_INFRA 0x00020000 /* Infrastructure mode */
182#define B43legacy_MACCTL_AP 0x00040000 /* AccessPoint mode */ 186#define B43legacy_MACCTL_AP 0x00040000 /* AccessPoint mode */
187#define B43legacy_MACCTL_RADIOLOCK 0x00080000 /* Radio lock */
183#define B43legacy_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */ 188#define B43legacy_MACCTL_BEACPROMISC 0x00100000 /* Beacon Promiscuous */
184#define B43legacy_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep bad PLCP frames */ 189#define B43legacy_MACCTL_KEEP_BADPLCP 0x00200000 /* Keep bad PLCP frames */
185#define B43legacy_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */ 190#define B43legacy_MACCTL_KEEP_CTL 0x00400000 /* Keep control frames */
186#define B43legacy_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */ 191#define B43legacy_MACCTL_KEEP_BAD 0x00800000 /* Keep bad frames (FCS) */
187#define B43legacy_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */ 192#define B43legacy_MACCTL_PROMISC 0x01000000 /* Promiscuous mode */
193#define B43legacy_MACCTL_HWPS 0x02000000 /* Hardware Power Saving */
194#define B43legacy_MACCTL_AWAKE 0x04000000 /* Device is awake */
195#define B43legacy_MACCTL_TBTTHOLD 0x10000000 /* TBTT Hold */
188#define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */ 196#define B43legacy_MACCTL_GMODE 0x80000000 /* G Mode */
189 197
190/* StatusBitField */
191#define B43legacy_SBF_MAC_ENABLED 0x00000001
192#define B43legacy_SBF_CORE_READY 0x00000004
193#define B43legacy_SBF_400 0x00000400 /*FIXME: fix name*/
194#define B43legacy_SBF_XFER_REG_BYTESWAP 0x00010000
195#define B43legacy_SBF_MODE_NOTADHOC 0x00020000
196#define B43legacy_SBF_MODE_AP 0x00040000
197#define B43legacy_SBF_RADIOREG_LOCK 0x00080000
198#define B43legacy_SBF_MODE_MONITOR 0x00400000
199#define B43legacy_SBF_MODE_PROMISC 0x01000000
200#define B43legacy_SBF_PS1 0x02000000
201#define B43legacy_SBF_PS2 0x04000000
202#define B43legacy_SBF_NO_SSID_BCAST 0x08000000
203#define B43legacy_SBF_TIME_UPDATE 0x10000000
204
205/* 802.11 core specific TM State Low flags */ 198/* 802.11 core specific TM State Low flags */
206#define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */ 199#define B43legacy_TMSLOW_GMODE 0x20000000 /* G Mode Enable */
207#define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */ 200#define B43legacy_TMSLOW_PLLREFSEL 0x00200000 /* PLL Freq Ref Select */
diff --git a/drivers/net/wireless/b43legacy/main.c b/drivers/net/wireless/b43legacy/main.c
index b9a046ff6dc6..aa20d5d56e2f 100644
--- a/drivers/net/wireless/b43legacy/main.c
+++ b/drivers/net/wireless/b43legacy/main.c
@@ -225,8 +225,8 @@ static void b43legacy_ram_write(struct b43legacy_wldev *dev, u16 offset,
225 225
226 B43legacy_WARN_ON(offset % 4 != 0); 226 B43legacy_WARN_ON(offset % 4 != 0);
227 227
228 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 228 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
229 if (status & B43legacy_SBF_XFER_REG_BYTESWAP) 229 if (status & B43legacy_MACCTL_BE)
230 val = swab32(val); 230 val = swab32(val);
231 231
232 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset); 232 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset);
@@ -434,9 +434,9 @@ static void b43legacy_time_lock(struct b43legacy_wldev *dev)
434{ 434{
435 u32 status; 435 u32 status;
436 436
437 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 437 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
438 status |= B43legacy_SBF_TIME_UPDATE; 438 status |= B43legacy_MACCTL_TBTTHOLD;
439 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); 439 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
440 mmiowb(); 440 mmiowb();
441} 441}
442 442
@@ -444,9 +444,9 @@ static void b43legacy_time_unlock(struct b43legacy_wldev *dev)
444{ 444{
445 u32 status; 445 u32 status;
446 446
447 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 447 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
448 status &= ~B43legacy_SBF_TIME_UPDATE; 448 status &= ~B43legacy_MACCTL_TBTTHOLD;
449 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); 449 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
450} 450}
451 451
452static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf) 452static void b43legacy_tsf_write_locked(struct b43legacy_wldev *dev, u64 tsf)
@@ -647,7 +647,7 @@ void b43legacy_dummy_transmission(struct b43legacy_wldev *dev)
647 b43legacy_ram_write(dev, i * 4, buffer[i]); 647 b43legacy_ram_write(dev, i * 4, buffer[i]);
648 648
649 /* dummy read follows */ 649 /* dummy read follows */
650 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 650 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
651 651
652 b43legacy_write16(dev, 0x0568, 0x0000); 652 b43legacy_write16(dev, 0x0568, 0x0000);
653 b43legacy_write16(dev, 0x07C0, 0x0000); 653 b43legacy_write16(dev, 0x07C0, 0x0000);
@@ -794,9 +794,9 @@ static void b43legacy_jssi_write(struct b43legacy_wldev *dev, u32 jssi)
794static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev) 794static void b43legacy_generate_noise_sample(struct b43legacy_wldev *dev)
795{ 795{
796 b43legacy_jssi_write(dev, 0x7F7F7F7F); 796 b43legacy_jssi_write(dev, 0x7F7F7F7F);
797 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, 797 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
798 b43legacy_read32(dev, 798 b43legacy_read32(dev,
799 B43legacy_MMIO_STATUS2_BITFIELD) 799 B43legacy_MMIO_MACCMD)
800 | (1 << 4)); 800 | (1 << 4));
801 B43legacy_WARN_ON(dev->noisecalc.channel_at_start != 801 B43legacy_WARN_ON(dev->noisecalc.channel_at_start !=
802 dev->phy.channel); 802 dev->phy.channel);
@@ -895,8 +895,8 @@ static void handle_irq_atim_end(struct b43legacy_wldev *dev)
895{ 895{
896 if (!dev->reg124_set_0x4) /*FIXME rename this variable*/ 896 if (!dev->reg124_set_0x4) /*FIXME rename this variable*/
897 return; 897 return;
898 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, 898 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
899 b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD) 899 b43legacy_read32(dev, B43legacy_MMIO_MACCMD)
900 | 0x4); 900 | 0x4);
901} 901}
902 902
@@ -1106,9 +1106,9 @@ static void b43legacy_update_templates(struct b43legacy_wldev *dev)
1106 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A, 1106 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A,
1107 B43legacy_CCK_RATE_11MB); 1107 B43legacy_CCK_RATE_11MB);
1108 1108
1109 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD); 1109 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1110 status |= 0x03; 1110 status |= 0x03;
1111 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, status); 1111 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, status);
1112} 1112}
1113 1113
1114static void b43legacy_refresh_templates(struct b43legacy_wldev *dev, 1114static void b43legacy_refresh_templates(struct b43legacy_wldev *dev,
@@ -1166,7 +1166,7 @@ static void handle_irq_beacon(struct b43legacy_wldev *dev)
1166 return; 1166 return;
1167 1167
1168 dev->irq_savedstate &= ~B43legacy_IRQ_BEACON; 1168 dev->irq_savedstate &= ~B43legacy_IRQ_BEACON;
1169 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS2_BITFIELD); 1169 status = b43legacy_read32(dev, B43legacy_MMIO_MACCMD);
1170 1170
1171 if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) { 1171 if (!dev->cached_beacon || ((status & 0x1) && (status & 0x2))) {
1172 /* ACK beacon IRQ. */ 1172 /* ACK beacon IRQ. */
@@ -1182,14 +1182,14 @@ static void handle_irq_beacon(struct b43legacy_wldev *dev)
1182 b43legacy_write_beacon_template(dev, 0x68, 0x18, 1182 b43legacy_write_beacon_template(dev, 0x68, 0x18,
1183 B43legacy_CCK_RATE_1MB); 1183 B43legacy_CCK_RATE_1MB);
1184 status |= 0x1; 1184 status |= 0x1;
1185 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, 1185 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1186 status); 1186 status);
1187 } 1187 }
1188 if (!(status & 0x2)) { 1188 if (!(status & 0x2)) {
1189 b43legacy_write_beacon_template(dev, 0x468, 0x1A, 1189 b43legacy_write_beacon_template(dev, 0x468, 0x1A,
1190 B43legacy_CCK_RATE_1MB); 1190 B43legacy_CCK_RATE_1MB);
1191 status |= 0x2; 1191 status |= 0x2;
1192 b43legacy_write32(dev, B43legacy_MMIO_STATUS2_BITFIELD, 1192 b43legacy_write32(dev, B43legacy_MMIO_MACCMD,
1193 status); 1193 status);
1194 } 1194 }
1195} 1195}
@@ -1548,9 +1548,20 @@ static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1548 u16 fwpatch; 1548 u16 fwpatch;
1549 u16 fwdate; 1549 u16 fwdate;
1550 u16 fwtime; 1550 u16 fwtime;
1551 u32 tmp; 1551 u32 tmp, macctl;
1552 int err = 0; 1552 int err = 0;
1553 1553
1554 /* Jump the microcode PSM to offset 0 */
1555 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1556 B43legacy_WARN_ON(macctl & B43legacy_MACCTL_PSM_RUN);
1557 macctl |= B43legacy_MACCTL_PSM_JMP0;
1558 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1559 /* Zero out all microcode PSM registers and shared memory. */
1560 for (i = 0; i < 64; i++)
1561 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0);
1562 for (i = 0; i < 4096; i += 2)
1563 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0);
1564
1554 /* Upload Microcode. */ 1565 /* Upload Microcode. */
1555 data = (__be32 *) (dev->fw.ucode->data + hdr_len); 1566 data = (__be32 *) (dev->fw.ucode->data + hdr_len);
1556 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32); 1567 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32);
@@ -1581,7 +1592,12 @@ static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1581 1592
1582 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 1593 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1583 B43legacy_IRQ_ALL); 1594 B43legacy_IRQ_ALL);
1584 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0x00020402); 1595
1596 /* Start the microcode PSM */
1597 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1598 macctl &= ~B43legacy_MACCTL_PSM_JMP0;
1599 macctl |= B43legacy_MACCTL_PSM_RUN;
1600 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1585 1601
1586 /* Wait for the microcode to load and respond */ 1602 /* Wait for the microcode to load and respond */
1587 i = 0; 1603 i = 0;
@@ -1594,9 +1610,13 @@ static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1594 b43legacyerr(dev->wl, "Microcode not responding\n"); 1610 b43legacyerr(dev->wl, "Microcode not responding\n");
1595 b43legacy_print_fw_helptext(dev->wl); 1611 b43legacy_print_fw_helptext(dev->wl);
1596 err = -ENODEV; 1612 err = -ENODEV;
1597 goto out; 1613 goto error;
1614 }
1615 msleep_interruptible(50);
1616 if (signal_pending(current)) {
1617 err = -EINTR;
1618 goto error;
1598 } 1619 }
1599 udelay(10);
1600 } 1620 }
1601 /* dummy read follows */ 1621 /* dummy read follows */
1602 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1622 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
@@ -1617,9 +1637,8 @@ static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1617 " is supported. You must change your firmware" 1637 " is supported. You must change your firmware"
1618 " files.\n"); 1638 " files.\n");
1619 b43legacy_print_fw_helptext(dev->wl); 1639 b43legacy_print_fw_helptext(dev->wl);
1620 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 0);
1621 err = -EOPNOTSUPP; 1640 err = -EOPNOTSUPP;
1622 goto out; 1641 goto error;
1623 } 1642 }
1624 b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u " 1643 b43legacydbg(dev->wl, "Loading firmware version 0x%X, patch level %u "
1625 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch, 1644 "(20%.2i-%.2i-%.2i %.2i:%.2i:%.2i)\n", fwrev, fwpatch,
@@ -1629,7 +1648,14 @@ static int b43legacy_upload_microcode(struct b43legacy_wldev *dev)
1629 dev->fw.rev = fwrev; 1648 dev->fw.rev = fwrev;
1630 dev->fw.patch = fwpatch; 1649 dev->fw.patch = fwpatch;
1631 1650
1632out: 1651 return 0;
1652
1653error:
1654 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1655 macctl &= ~B43legacy_MACCTL_PSM_RUN;
1656 macctl |= B43legacy_MACCTL_PSM_JMP0;
1657 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
1658
1633 return err; 1659 return err;
1634} 1660}
1635 1661
@@ -1736,9 +1762,9 @@ static int b43legacy_gpio_init(struct b43legacy_wldev *dev)
1736 u32 mask; 1762 u32 mask;
1737 u32 set; 1763 u32 set;
1738 1764
1739 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 1765 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1740 b43legacy_read32(dev, 1766 b43legacy_read32(dev,
1741 B43legacy_MMIO_STATUS_BITFIELD) 1767 B43legacy_MMIO_MACCTL)
1742 & 0xFFFF3FFF); 1768 & 0xFFFF3FFF);
1743 1769
1744 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, 1770 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK,
@@ -1798,14 +1824,14 @@ void b43legacy_mac_enable(struct b43legacy_wldev *dev)
1798 B43legacy_WARN_ON(dev->mac_suspended < 0); 1824 B43legacy_WARN_ON(dev->mac_suspended < 0);
1799 B43legacy_WARN_ON(irqs_disabled()); 1825 B43legacy_WARN_ON(irqs_disabled());
1800 if (dev->mac_suspended == 0) { 1826 if (dev->mac_suspended == 0) {
1801 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 1827 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1802 b43legacy_read32(dev, 1828 b43legacy_read32(dev,
1803 B43legacy_MMIO_STATUS_BITFIELD) 1829 B43legacy_MMIO_MACCTL)
1804 | B43legacy_SBF_MAC_ENABLED); 1830 | B43legacy_MACCTL_ENABLED);
1805 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 1831 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON,
1806 B43legacy_IRQ_MAC_SUSPENDED); 1832 B43legacy_IRQ_MAC_SUSPENDED);
1807 /* the next two are dummy reads */ 1833 /* the next two are dummy reads */
1808 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 1834 b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
1809 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1835 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1810 b43legacy_power_saving_ctl_bits(dev, -1, -1); 1836 b43legacy_power_saving_ctl_bits(dev, -1, -1);
1811 1837
@@ -1836,10 +1862,10 @@ void b43legacy_mac_suspend(struct b43legacy_wldev *dev)
1836 dev->irq_savedstate = tmp; 1862 dev->irq_savedstate = tmp;
1837 1863
1838 b43legacy_power_saving_ctl_bits(dev, -1, 1); 1864 b43legacy_power_saving_ctl_bits(dev, -1, 1);
1839 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 1865 b43legacy_write32(dev, B43legacy_MMIO_MACCTL,
1840 b43legacy_read32(dev, 1866 b43legacy_read32(dev,
1841 B43legacy_MMIO_STATUS_BITFIELD) 1867 B43legacy_MMIO_MACCTL)
1842 & ~B43legacy_SBF_MAC_ENABLED); 1868 & ~B43legacy_MACCTL_ENABLED);
1843 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); 1869 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON);
1844 for (i = 40; i; i--) { 1870 for (i = 40; i; i--) {
1845 tmp = b43legacy_read32(dev, 1871 tmp = b43legacy_read32(dev,
@@ -2007,12 +2033,15 @@ static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2007 struct b43legacy_phy *phy = &dev->phy; 2033 struct b43legacy_phy *phy = &dev->phy;
2008 int err; 2034 int err;
2009 int tmp; 2035 int tmp;
2010 u32 value32; 2036 u32 value32, macctl;
2011 u16 value16; 2037 u16 value16;
2012 2038
2013 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, 2039 /* Initialize the MAC control */
2014 B43legacy_SBF_CORE_READY 2040 macctl = B43legacy_MACCTL_IHR_ENABLED | B43legacy_MACCTL_SHM_ENABLED;
2015 | B43legacy_SBF_400); 2041 if (dev->phy.gmode)
2042 macctl |= B43legacy_MACCTL_GMODE;
2043 macctl |= B43legacy_MACCTL_INFRA;
2044 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2016 2045
2017 err = b43legacy_request_firmware(dev); 2046 err = b43legacy_request_firmware(dev);
2018 if (err) 2047 if (err)
@@ -2052,12 +2081,12 @@ static int b43legacy_chip_init(struct b43legacy_wldev *dev)
2052 if (dev->dev->id.revision < 5) 2081 if (dev->dev->id.revision < 5)
2053 b43legacy_write32(dev, 0x010C, 0x01000000); 2082 b43legacy_write32(dev, 0x010C, 0x01000000);
2054 2083
2055 value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 2084 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2056 value32 &= ~B43legacy_SBF_MODE_NOTADHOC; 2085 value32 &= ~B43legacy_MACCTL_INFRA;
2057 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32); 2086 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2058 value32 = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 2087 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2059 value32 |= B43legacy_SBF_MODE_NOTADHOC; 2088 value32 |= B43legacy_MACCTL_INFRA;
2060 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value32); 2089 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32);
2061 2090
2062 if (b43legacy_using_pio(dev)) { 2091 if (b43legacy_using_pio(dev)) {
2063 b43legacy_write32(dev, 0x0210, 0x00000100); 2092 b43legacy_write32(dev, 0x0210, 0x00000100);
@@ -2951,12 +2980,19 @@ static void b43legacy_wireless_core_exit(struct b43legacy_wldev *dev)
2951{ 2980{
2952 struct b43legacy_wl *wl = dev->wl; 2981 struct b43legacy_wl *wl = dev->wl;
2953 struct b43legacy_phy *phy = &dev->phy; 2982 struct b43legacy_phy *phy = &dev->phy;
2983 u32 macctl;
2954 2984
2955 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED); 2985 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED);
2956 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED) 2986 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED)
2957 return; 2987 return;
2958 b43legacy_set_status(dev, B43legacy_STAT_UNINIT); 2988 b43legacy_set_status(dev, B43legacy_STAT_UNINIT);
2959 2989
2990 /* Stop the microcode PSM. */
2991 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2992 macctl &= ~B43legacy_MACCTL_PSM_RUN;
2993 macctl |= B43legacy_MACCTL_PSM_JMP0;
2994 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl);
2995
2960 mutex_unlock(&wl->mutex); 2996 mutex_unlock(&wl->mutex);
2961 /* Must unlock as it would otherwise deadlock. No races here. 2997 /* Must unlock as it would otherwise deadlock. No races here.
2962 * Cancel possibly pending workqueues. */ 2998 * Cancel possibly pending workqueues. */
diff --git a/drivers/net/wireless/b43legacy/phy.c b/drivers/net/wireless/b43legacy/phy.c
index c16febbdbf5d..8e5c09b81871 100644
--- a/drivers/net/wireless/b43legacy/phy.c
+++ b/drivers/net/wireless/b43legacy/phy.c
@@ -140,7 +140,7 @@ void b43legacy_phy_calibrate(struct b43legacy_wldev *dev)
140{ 140{
141 struct b43legacy_phy *phy = &dev->phy; 141 struct b43legacy_phy *phy = &dev->phy;
142 142
143 b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); /* Dummy read. */ 143 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); /* Dummy read. */
144 if (phy->calibrated) 144 if (phy->calibrated)
145 return; 145 return;
146 if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) { 146 if (phy->type == B43legacy_PHYTYPE_G && phy->rev == 1) {
@@ -2231,16 +2231,16 @@ bit26 = 1;
2231 * or the latest PS-Poll packet sent was successful, 2231 * or the latest PS-Poll packet sent was successful,
2232 * set bit26 */ 2232 * set bit26 */
2233 } 2233 }
2234 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 2234 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
2235 if (bit25) 2235 if (bit25)
2236 status |= B43legacy_SBF_PS1; 2236 status |= B43legacy_MACCTL_HWPS;
2237 else 2237 else
2238 status &= ~B43legacy_SBF_PS1; 2238 status &= ~B43legacy_MACCTL_HWPS;
2239 if (bit26) 2239 if (bit26)
2240 status |= B43legacy_SBF_PS2; 2240 status |= B43legacy_MACCTL_AWAKE;
2241 else 2241 else
2242 status &= ~B43legacy_SBF_PS2; 2242 status &= ~B43legacy_MACCTL_AWAKE;
2243 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); 2243 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
2244 if (bit26 && dev->dev->id.revision >= 5) { 2244 if (bit26 && dev->dev->id.revision >= 5) {
2245 for (i = 0; i < 100; i++) { 2245 for (i = 0; i < 100; i++) {
2246 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 2246 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED,
diff --git a/drivers/net/wireless/b43legacy/pio.c b/drivers/net/wireless/b43legacy/pio.c
index de843ac147ae..e4f4c5c39e33 100644
--- a/drivers/net/wireless/b43legacy/pio.c
+++ b/drivers/net/wireless/b43legacy/pio.c
@@ -334,9 +334,9 @@ struct b43legacy_pioqueue *b43legacy_setup_pioqueue(struct b43legacy_wldev *dev,
334 tasklet_init(&queue->txtask, tx_tasklet, 334 tasklet_init(&queue->txtask, tx_tasklet,
335 (unsigned long)queue); 335 (unsigned long)queue);
336 336
337 value = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 337 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
338 value &= ~B43legacy_SBF_XFER_REG_BYTESWAP; 338 value &= ~B43legacy_MACCTL_BE;
339 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, value); 339 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value);
340 340
341 qsize = b43legacy_read16(dev, queue->mmio_base 341 qsize = b43legacy_read16(dev, queue->mmio_base
342 + B43legacy_PIO_TXQBUFSIZE); 342 + B43legacy_PIO_TXQBUFSIZE);
diff --git a/drivers/net/wireless/b43legacy/radio.c b/drivers/net/wireless/b43legacy/radio.c
index 318a270cf9b4..955832e8654f 100644
--- a/drivers/net/wireless/b43legacy/radio.c
+++ b/drivers/net/wireless/b43legacy/radio.c
@@ -91,10 +91,10 @@ void b43legacy_radio_lock(struct b43legacy_wldev *dev)
91{ 91{
92 u32 status; 92 u32 status;
93 93
94 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 94 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
95 B43legacy_WARN_ON(status & B43legacy_SBF_RADIOREG_LOCK); 95 B43legacy_WARN_ON(status & B43legacy_MACCTL_RADIOLOCK);
96 status |= B43legacy_SBF_RADIOREG_LOCK; 96 status |= B43legacy_MACCTL_RADIOLOCK;
97 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); 97 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
98 mmiowb(); 98 mmiowb();
99 udelay(10); 99 udelay(10);
100} 100}
@@ -104,10 +104,10 @@ void b43legacy_radio_unlock(struct b43legacy_wldev *dev)
104 u32 status; 104 u32 status;
105 105
106 b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); /* dummy read */ 106 b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); /* dummy read */
107 status = b43legacy_read32(dev, B43legacy_MMIO_STATUS_BITFIELD); 107 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL);
108 B43legacy_WARN_ON(!(status & B43legacy_SBF_RADIOREG_LOCK)); 108 B43legacy_WARN_ON(!(status & B43legacy_MACCTL_RADIOLOCK));
109 status &= ~B43legacy_SBF_RADIOREG_LOCK; 109 status &= ~B43legacy_MACCTL_RADIOLOCK;
110 b43legacy_write32(dev, B43legacy_MMIO_STATUS_BITFIELD, status); 110 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status);
111 mmiowb(); 111 mmiowb();
112} 112}
113 113