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-rw-r--r--drivers/acpi/Kconfig4
-rw-r--r--drivers/acpi/ac.c1
-rw-r--r--drivers/acpi/acpica/acconfig.h4
-rw-r--r--drivers/acpi/acpica/exregion.c35
-rw-r--r--drivers/acpi/button.c3
-rw-r--r--drivers/acpi/pci_root.c11
-rw-r--r--drivers/acpi/power_meter.c6
-rw-r--r--drivers/acpi/proc.c2
-rw-r--r--drivers/acpi/processor_core.c2
-rw-r--r--drivers/acpi/processor_throttling.c6
-rw-r--r--drivers/acpi/sleep.c24
-rw-r--r--drivers/acpi/video.c15
-rw-r--r--drivers/acpi/video_detect.c2
-rw-r--r--drivers/ata/ahci.c43
-rw-r--r--drivers/ata/libata-core.c21
-rw-r--r--drivers/ata/libata-eh.c6
-rw-r--r--drivers/ata/pata_atiixp.c2
-rw-r--r--drivers/ata/pata_sc1200.c3
-rw-r--r--drivers/ata/pata_via.c2
-rw-r--r--drivers/ata/sata_mv.c29
-rw-r--r--drivers/ata/sata_nv.c18
-rw-r--r--drivers/ata/sata_via.c1
-rw-r--r--drivers/base/bus.c17
-rw-r--r--drivers/base/driver.c2
-rw-r--r--drivers/base/platform.c6
-rw-r--r--drivers/base/power/main.c1
-rw-r--r--drivers/base/power/runtime.c4
-rw-r--r--drivers/block/cciss.c79
-rw-r--r--drivers/block/loop.c2
-rw-r--r--drivers/block/virtio_blk.c39
-rw-r--r--drivers/bluetooth/btusb.c5
-rw-r--r--drivers/char/Kconfig6
-rw-r--r--drivers/char/agp/intel-agp.c11
-rw-r--r--drivers/char/genrtc.c1
-rw-r--r--drivers/char/hvc_xen.c25
-rw-r--r--drivers/char/hw_random/virtio-rng.c3
-rw-r--r--drivers/char/rtc.c1
-rw-r--r--drivers/char/sonypi.c1
-rw-r--r--drivers/char/tty_buffer.c31
-rw-r--r--drivers/char/tty_port.c3
-rw-r--r--drivers/char/virtio_console.c1
-rw-r--r--drivers/char/vt_ioctl.c8
-rw-r--r--drivers/cpufreq/cpufreq.c48
-rw-r--r--drivers/cpufreq/cpufreq_conservative.c4
-rw-r--r--drivers/cpufreq/cpufreq_ondemand.c4
-rw-r--r--drivers/cpuidle/cpuidle.c5
-rw-r--r--drivers/crypto/padlock-sha.c14
-rw-r--r--drivers/edac/amd64_edac.c14
-rw-r--r--drivers/edac/i5000_edac.c7
-rw-r--r--drivers/edac/i5400_edac.c89
-rw-r--r--drivers/edac/mpc85xx_edac.c2
-rw-r--r--drivers/firewire/sbp2.c39
-rw-r--r--drivers/gpio/gpiolib.c8
-rw-r--r--drivers/gpio/twl4030-gpio.c5
-rw-r--r--drivers/gpu/drm/drm_crtc_helper.c1
-rw-r--r--drivers/gpu/drm/drm_edid.c15
-rw-r--r--drivers/gpu/drm/drm_fb_helper.c44
-rw-r--r--drivers/gpu/drm/i915/i915_dma.c3
-rw-r--r--drivers/gpu/drm/i915/i915_drv.c5
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h41
-rw-r--r--drivers/gpu/drm/i915/i915_reg.h30
-rw-r--r--drivers/gpu/drm/i915/i915_suspend.c305
-rw-r--r--drivers/gpu/drm/i915/intel_bios.c14
-rw-r--r--drivers/gpu/drm/i915/intel_display.c178
-rw-r--r--drivers/gpu/drm/i915/intel_dp.c2
-rw-r--r--drivers/gpu/drm/i915/intel_lvds.c35
-rw-r--r--drivers/gpu/drm/radeon/Makefile2
-rw-r--r--drivers/gpu/drm/radeon/atombios.h2
-rw-r--r--drivers/gpu/drm/radeon/atombios_crtc.c357
-rw-r--r--drivers/gpu/drm/radeon/mkregtable.c12
-rw-r--r--drivers/gpu/drm/radeon/r100.c42
-rw-r--r--drivers/gpu/drm/radeon/r300.c2
-rw-r--r--drivers/gpu/drm/radeon/r420.c2
-rw-r--r--drivers/gpu/drm/radeon/r500_reg.h9
-rw-r--r--drivers/gpu/drm/radeon/r520.c2
-rw-r--r--drivers/gpu/drm/radeon/r600.c108
-rw-r--r--drivers/gpu/drm/radeon/r600_blit.c58
-rw-r--r--drivers/gpu/drm/radeon/r600_blit_kms.c5
-rw-r--r--drivers/gpu/drm/radeon/r600_cs.c18
-rw-r--r--drivers/gpu/drm/radeon/r600d.h14
-rw-r--r--drivers/gpu/drm/radeon/radeon.h11
-rw-r--r--drivers/gpu/drm/radeon/radeon_asic.h23
-rw-r--r--drivers/gpu/drm/radeon/radeon_atombios.c282
-rw-r--r--drivers/gpu/drm/radeon/radeon_benchmark.c4
-rw-r--r--drivers/gpu/drm/radeon/radeon_bios.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_clocks.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_combios.c287
-rw-r--r--drivers/gpu/drm/radeon/radeon_connectors.c199
-rw-r--r--drivers/gpu/drm/radeon/radeon_cursor.c10
-rw-r--r--drivers/gpu/drm/radeon/radeon_device.c36
-rw-r--r--drivers/gpu/drm/radeon/radeon_display.c28
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c125
-rw-r--r--drivers/gpu/drm/radeon/radeon_gart.c20
-rw-r--r--drivers/gpu/drm/radeon/radeon_irq_kms.c9
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_crtc.c40
-rw-r--r--drivers/gpu/drm/radeon/radeon_legacy_encoders.c27
-rw-r--r--drivers/gpu/drm/radeon/radeon_mode.h34
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c65
-rw-r--r--drivers/gpu/drm/radeon/radeon_reg.h6
-rw-r--r--drivers/gpu/drm/radeon/radeon_test.c6
-rw-r--r--drivers/gpu/drm/radeon/radeon_ttm.c6
-rw-r--r--drivers/gpu/drm/radeon/rs400.c2
-rw-r--r--drivers/gpu/drm/radeon/rs600.c20
-rw-r--r--drivers/gpu/drm/radeon/rs690.c2
-rw-r--r--drivers/gpu/drm/radeon/rv515.c4
-rw-r--r--drivers/gpu/drm/radeon/rv770.c59
-rw-r--r--drivers/gpu/drm/radeon/rv770d.h5
-rw-r--r--drivers/gpu/drm/ttm/ttm_tt.c1
-rw-r--r--drivers/hid/hid-core.c2
-rw-r--r--drivers/hid/hid-twinhan.c4
-rw-r--r--drivers/hid/hidraw.c5
-rw-r--r--drivers/hwmon/adt7475.c17
-rw-r--r--drivers/hwmon/dme1737.c29
-rw-r--r--drivers/hwmon/fschmd.c2
-rw-r--r--drivers/hwmon/hp_accel.c5
-rw-r--r--drivers/hwmon/it87.c5
-rw-r--r--drivers/hwmon/s3c-hwmon.c11
-rw-r--r--drivers/i2c/busses/Kconfig2
-rw-r--r--drivers/i2c/busses/i2c-imx.c86
-rw-r--r--drivers/i2c/busses/i2c-mpc.c10
-rw-r--r--drivers/i2c/busses/i2c-piix4.c8
-rw-r--r--drivers/ide/atiixp.c2
-rw-r--r--drivers/ide/cmd64x.c6
-rw-r--r--drivers/ide/ide-probe.c9
-rw-r--r--drivers/input/ff-core.c20
-rw-r--r--drivers/input/ff-memless.c26
-rw-r--r--drivers/input/input.c94
-rw-r--r--drivers/input/keyboard/atkbd.c145
-rw-r--r--drivers/input/keyboard/gpio_keys.c1
-rw-r--r--drivers/input/misc/Kconfig1
-rw-r--r--drivers/input/misc/hp_sdc_rtc.c2
-rw-r--r--drivers/input/mouse/lifebook.c3
-rw-r--r--drivers/input/mouse/logips2pp.c2
-rw-r--r--drivers/input/mouse/psmouse-base.c4
-rw-r--r--drivers/input/mouse/synaptics.c10
-rw-r--r--drivers/input/serio/i8042-x86ia64io.h13
-rw-r--r--drivers/input/serio/i8042.c35
-rw-r--r--drivers/isdn/hardware/eicon/maintidi.c5
-rw-r--r--drivers/isdn/hardware/eicon/message.c18
-rw-r--r--drivers/isdn/hardware/mISDN/hfcmulti.c2
-rw-r--r--drivers/isdn/hisax/amd7930_fn.c1
-rw-r--r--drivers/isdn/hisax/diva.c2
-rw-r--r--drivers/isdn/hisax/elsa_ser.c22
-rw-r--r--drivers/isdn/hisax/hfc_usb.c4
-rw-r--r--drivers/isdn/hisax/hscx_irq.c2
-rw-r--r--drivers/isdn/hisax/icc.c1
-rw-r--r--drivers/isdn/i4l/isdn_net.h6
-rw-r--r--drivers/isdn/i4l/isdn_ppp.c352
-rw-r--r--drivers/isdn/mISDN/stack.c2
-rw-r--r--drivers/leds/leds-gpio.c2
-rw-r--r--drivers/macintosh/via-pmu.c40
-rw-r--r--drivers/md/Makefile22
-rw-r--r--drivers/md/bitmap.c9
-rw-r--r--drivers/md/dm-exception-store.c38
-rw-r--r--drivers/md/dm-exception-store.h8
-rw-r--r--drivers/md/dm-log-userspace-base.c2
-rw-r--r--drivers/md/dm-snap-persistent.c16
-rw-r--r--drivers/md/dm-snap.c25
-rw-r--r--drivers/md/dm.c27
-rw-r--r--drivers/md/md.c48
-rw-r--r--drivers/md/raid1.c6
-rw-r--r--drivers/md/raid10.c5
-rw-r--r--drivers/md/raid5.c269
-rw-r--r--drivers/md/raid5.h14
-rw-r--r--drivers/md/raid6altivec.uc2
-rw-r--r--drivers/md/raid6int.uc2
-rw-r--r--drivers/md/raid6test/Makefile42
-rw-r--r--drivers/md/unroll.awk20
-rw-r--r--drivers/md/unroll.pl24
-rw-r--r--drivers/media/common/tuners/tda18271-fe.c8
-rw-r--r--drivers/media/dvb/dvb-usb/Kconfig2
-rw-r--r--drivers/media/dvb/dvb-usb/ce6230.c2
-rw-r--r--drivers/media/dvb/dvb-usb/dib0700_devices.c15
-rw-r--r--drivers/media/dvb/firewire/firedtv-avc.c38
-rw-r--r--drivers/media/dvb/firewire/firedtv-fe.c8
-rw-r--r--drivers/media/dvb/frontends/dib0070.h7
-rw-r--r--drivers/media/dvb/frontends/dib7000p.c5
-rw-r--r--drivers/media/dvb/pt1/pt1.c1
-rw-r--r--drivers/media/dvb/siano/smsusb.c6
-rw-r--r--drivers/media/video/bt8xx/bttv-driver.c33
-rw-r--r--drivers/media/video/em28xx/em28xx-audio.c5
-rw-r--r--drivers/media/video/gspca/m5602/m5602_s5k4aa.c20
-rw-r--r--drivers/media/video/gspca/mr97310a.c2
-rw-r--r--drivers/media/video/gspca/ov519.c2
-rw-r--r--drivers/media/video/gspca/stv06xx/stv06xx.c3
-rw-r--r--drivers/media/video/pxa_camera.c5
-rw-r--r--drivers/media/video/s2255drv.c5
-rw-r--r--drivers/media/video/saa7134/saa7134-cards.c1
-rw-r--r--drivers/media/video/saa7134/saa7134-ts.c6
-rw-r--r--drivers/media/video/saa7134/saa7134.h1
-rw-r--r--drivers/media/video/saa7164/saa7164-cmd.c2
-rw-r--r--drivers/media/video/sh_mobile_ceu_camera.c4
-rw-r--r--drivers/media/video/soc_camera.c16
-rw-r--r--drivers/media/video/uvc/uvc_ctrl.c2
-rw-r--r--drivers/media/video/uvc/uvc_video.c3
-rw-r--r--drivers/mfd/twl4030-core.c91
-rw-r--r--drivers/mfd/wm831x-irq.c3
-rw-r--r--drivers/misc/sgi-gru/gruprocfs.c13
-rw-r--r--drivers/mmc/host/at91_mci.c1
-rw-r--r--drivers/mmc/host/omap.c1
-rw-r--r--drivers/mmc/host/omap_hsmmc.c2
-rw-r--r--drivers/mmc/host/pxamci.c4
-rw-r--r--drivers/mtd/maps/Kconfig1
-rw-r--r--drivers/mtd/maps/Makefile2
-rw-r--r--drivers/mtd/maps/gpio-addr-flash.c5
-rw-r--r--drivers/mtd/maps/sa1100-flash.c4
-rw-r--r--drivers/mtd/nand/nand_base.c6
-rw-r--r--drivers/mtd/ubi/build.c3
-rw-r--r--drivers/mtd/ubi/scan.c7
-rw-r--r--drivers/mtd/ubi/scan.h2
-rw-r--r--drivers/net/Kconfig11
-rw-r--r--drivers/net/Makefile10
-rw-r--r--drivers/net/acenic.c3
-rw-r--r--drivers/net/au1000_eth.c1
-rw-r--r--drivers/net/benet/be.h2
-rw-r--r--drivers/net/benet/be_cmds.c33
-rw-r--r--drivers/net/benet/be_cmds.h7
-rw-r--r--drivers/net/benet/be_ethtool.c8
-rw-r--r--drivers/net/benet/be_main.c55
-rw-r--r--drivers/net/bnx2.h9
-rw-r--r--drivers/net/bonding/bond_main.c10
-rw-r--r--drivers/net/can/Kconfig60
-rw-r--r--drivers/net/can/dev.c23
-rw-r--r--drivers/net/can/sja1000/Kconfig47
-rw-r--r--drivers/net/can/sja1000/sja1000_of_platform.c1
-rw-r--r--drivers/net/can/usb/Kconfig10
-rw-r--r--drivers/net/can/usb/Makefile2
-rw-r--r--drivers/net/can/usb/ems_usb.c5
-rw-r--r--drivers/net/cassini.c5
-rw-r--r--drivers/net/cnic.c6
-rw-r--r--drivers/net/cxgb3/sge.c4
-rw-r--r--drivers/net/davinci_emac.c41
-rw-r--r--drivers/net/dm9000.h2
-rw-r--r--drivers/net/e100.c26
-rw-r--r--drivers/net/e1000e/defines.h2
-rw-r--r--drivers/net/e1000e/e1000.h26
-rw-r--r--drivers/net/e1000e/hw.h3
-rw-r--r--drivers/net/e1000e/ich8lan.c628
-rw-r--r--drivers/net/e1000e/phy.c476
-rw-r--r--drivers/net/ethoc.c24
-rw-r--r--drivers/net/fec.c2
-rw-r--r--drivers/net/fec_mpc52xx.c6
-rw-r--r--drivers/net/fec_mpc52xx_phy.c1
-rw-r--r--drivers/net/forcedeth.c5
-rw-r--r--drivers/net/fs_enet/fs_enet-main.c1
-rw-r--r--drivers/net/fs_enet/mii-bitbang.c1
-rw-r--r--drivers/net/fs_enet/mii-fec.c1
-rw-r--r--drivers/net/fsl_pq_mdio.c2
-rw-r--r--drivers/net/gianfar.c4
-rw-r--r--drivers/net/ibm_newemac/core.c9
-rw-r--r--drivers/net/ibm_newemac/emac.h5
-rw-r--r--drivers/net/ifb.c3
-rw-r--r--drivers/net/igb/igb_ethtool.c35
-rw-r--r--drivers/net/igbvf/ethtool.c30
-rw-r--r--drivers/net/irda/sa1100_ir.c7
-rw-r--r--drivers/net/ixgbe/ixgbe_ethtool.c22
-rw-r--r--drivers/net/ixgbe/ixgbe_main.c85
-rw-r--r--drivers/net/ixp2000/enp2611.c18
-rw-r--r--drivers/net/ixp2000/ixpdev.c11
-rw-r--r--drivers/net/ks8851.c42
-rw-r--r--drivers/net/ks8851.h1
-rw-r--r--drivers/net/macsonic.c117
-rw-r--r--drivers/net/mlx4/main.c1
-rw-r--r--drivers/net/myri10ge/myri10ge.c17
-rw-r--r--drivers/net/netxen/netxen_nic_hdr.h1
-rw-r--r--drivers/net/netxen/netxen_nic_hw.c14
-rw-r--r--drivers/net/netxen/netxen_nic_init.c8
-rw-r--r--drivers/net/netxen/netxen_nic_main.c4
-rw-r--r--drivers/net/niu.c2
-rw-r--r--drivers/net/pcmcia/3c574_cs.c13
-rw-r--r--drivers/net/pcmcia/pcnet_cs.c2
-rw-r--r--drivers/net/phy/mdio-gpio.c3
-rw-r--r--drivers/net/ppp_generic.c11
-rw-r--r--drivers/net/pppoe.c129
-rw-r--r--drivers/net/qlge/qlge.h11
-rw-r--r--drivers/net/qlge/qlge_main.c177
-rw-r--r--drivers/net/qlge/qlge_mpi.c118
-rw-r--r--drivers/net/r6040.c2
-rw-r--r--drivers/net/r8169.c1006
-rw-r--r--drivers/net/s2io.c1
-rw-r--r--drivers/net/sfc/rx.c9
-rw-r--r--drivers/net/sfc/sfe4001.c4
-rw-r--r--drivers/net/sh_eth.c1
-rw-r--r--drivers/net/sky2.c2
-rw-r--r--drivers/net/smsc911x.c2
-rw-r--r--drivers/net/stmmac/Kconfig53
-rw-r--r--drivers/net/stmmac/Makefile4
-rw-r--r--drivers/net/stmmac/common.h330
-rw-r--r--drivers/net/stmmac/descs.h163
-rw-r--r--drivers/net/stmmac/gmac.c693
-rw-r--r--drivers/net/stmmac/gmac.h204
-rw-r--r--drivers/net/stmmac/mac100.c517
-rw-r--r--drivers/net/stmmac/mac100.h116
-rw-r--r--drivers/net/stmmac/stmmac.h98
-rw-r--r--drivers/net/stmmac/stmmac_ethtool.c395
-rw-r--r--drivers/net/stmmac/stmmac_main.c2204
-rw-r--r--drivers/net/stmmac/stmmac_mdio.c217
-rw-r--r--drivers/net/stmmac/stmmac_timer.c140
-rw-r--r--drivers/net/stmmac/stmmac_timer.h41
-rw-r--r--drivers/net/sungem.c10
-rw-r--r--drivers/net/tokenring/ibmtr.c11
-rw-r--r--drivers/net/usb/Kconfig2
-rw-r--r--drivers/net/usb/cdc_ether.c42
-rw-r--r--drivers/net/usb/dm9601.c4
-rw-r--r--drivers/net/usb/pegasus.c13
-rw-r--r--drivers/net/usb/pegasus.h6
-rw-r--r--drivers/net/usb/rndis_host.c6
-rw-r--r--drivers/net/virtio_net.c23
-rw-r--r--drivers/net/vmxnet3/Makefile35
-rw-r--r--drivers/net/vmxnet3/upt1_defs.h96
-rw-r--r--drivers/net/vmxnet3/vmxnet3_defs.h535
-rw-r--r--drivers/net/vmxnet3/vmxnet3_drv.c2574
-rw-r--r--drivers/net/vmxnet3/vmxnet3_ethtool.c566
-rw-r--r--drivers/net/vmxnet3/vmxnet3_int.h389
-rw-r--r--drivers/net/wan/c101.c1
-rw-r--r--drivers/net/wan/hdlc_cisco.c18
-rw-r--r--drivers/net/wan/n2.c1
-rw-r--r--drivers/net/wan/pci200syn.c1
-rw-r--r--drivers/net/wireless/adm8211.h2
-rw-r--r--drivers/net/wireless/airo.c5
-rw-r--r--drivers/net/wireless/ath/ath5k/base.c1
-rw-r--r--drivers/net/wireless/ath/ath5k/led.c4
-rw-r--r--drivers/net/wireless/ath/ath9k/rc.c2
-rw-r--r--drivers/net/wireless/b43/b43.h168
-rw-r--r--drivers/net/wireless/b43/dma.c15
-rw-r--r--drivers/net/wireless/b43/leds.c4
-rw-r--r--drivers/net/wireless/b43/leds.h5
-rw-r--r--drivers/net/wireless/b43/main.c9
-rw-r--r--drivers/net/wireless/b43/pio.c78
-rw-r--r--drivers/net/wireless/b43/rfkill.c3
-rw-r--r--drivers/net/wireless/b43/xmit.c5
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2100.c6
-rw-r--r--drivers/net/wireless/ipw2x00/ipw2200.c141
-rw-r--r--drivers/net/wireless/ipw2x00/libipw.h8
-rw-r--r--drivers/net/wireless/ipw2x00/libipw_module.c42
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-1000.c1
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945-rs.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-3945.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-5000.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-6000.c5
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn-rs.c9
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-agn.c12
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-commands.h2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-core.h2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.c23
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-eeprom.h20
-rw-r--r--drivers/net/wireless/iwlwifi/iwl-rx.c2
-rw-r--r--drivers/net/wireless/iwlwifi/iwl3945-base.c2
-rw-r--r--drivers/net/wireless/libertas/cmdresp.c1
-rw-r--r--drivers/net/wireless/libertas/ethtool.c17
-rw-r--r--drivers/net/wireless/libertas/if_spi.c10
-rw-r--r--drivers/net/wireless/libertas/if_usb.c2
-rw-r--r--drivers/net/wireless/p54/p54usb.c10
-rw-r--r--drivers/net/wireless/ray_cs.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c2
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00dev.c4
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00link.c11
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00usb.c9
-rw-r--r--drivers/net/wireless/rt2x00/rt73usb.c5
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_leds.c4
-rw-r--r--drivers/net/wireless/rtl818x/rtl8187_rfkill.c1
-rw-r--r--drivers/net/znet.c8
-rw-r--r--drivers/oprofile/event_buffer.c35
-rw-r--r--drivers/pci/dmar.c65
-rw-r--r--drivers/pci/hotplug/cpqphp.h1
-rw-r--r--drivers/pci/intel-iommu.c121
-rw-r--r--drivers/pci/pci.c27
-rw-r--r--drivers/pci/pcie/aer/aerdrv.c2
-rw-r--r--drivers/pci/pcie/aspm.c6
-rw-r--r--drivers/pci/pcie/portdrv_pci.c3
-rw-r--r--drivers/pci/quirks.c38
-rw-r--r--drivers/pci/setup-res.c37
-rw-r--r--drivers/pcmcia/cistpl.c20
-rw-r--r--drivers/pcmcia/cs.c69
-rw-r--r--drivers/pcmcia/cs_internal.h3
-rw-r--r--drivers/pcmcia/ds.c8
-rw-r--r--drivers/pcmcia/i82365.c4
-rw-r--r--drivers/pcmcia/m32r_cfc.c10
-rw-r--r--drivers/pcmcia/m32r_pcc.c10
-rw-r--r--drivers/pcmcia/m8xx_pcmcia.c15
-rw-r--r--drivers/pcmcia/pcmcia_ioctl.c2
-rw-r--r--drivers/pcmcia/pd6729.c6
-rw-r--r--drivers/pcmcia/rsrc_nonstatic.c3
-rw-r--r--drivers/pcmcia/soc_common.c5
-rw-r--r--drivers/pcmcia/socket_sysfs.c2
-rw-r--r--drivers/pcmcia/tcic.c4
-rw-r--r--drivers/pcmcia/yenta_socket.c12
-rw-r--r--drivers/platform/x86/eeepc-laptop.c7
-rw-r--r--drivers/platform/x86/fujitsu-laptop.c2
-rw-r--r--drivers/pps/kapi.c20
-rw-r--r--drivers/pps/pps.c11
-rw-r--r--drivers/regulator/core.c3
-rw-r--r--drivers/regulator/fixed.c5
-rw-r--r--drivers/regulator/wm831x-ldo.c6
-rw-r--r--drivers/rtc/rtc-coh901331.c11
-rw-r--r--drivers/rtc/rtc-pcf50633.c7
-rw-r--r--drivers/rtc/rtc-v3020.c2
-rw-r--r--drivers/rtc/rtc-vr41xx.c9
-rw-r--r--drivers/s390/block/dasd.c13
-rw-r--r--drivers/s390/block/dasd_eckd.c8
-rw-r--r--drivers/s390/char/monreader.c1
-rw-r--r--drivers/s390/char/sclp_async.c51
-rw-r--r--drivers/s390/char/sclp_quiesce.c48
-rw-r--r--drivers/s390/char/sclp_vt220.c30
-rw-r--r--drivers/s390/char/tape_block.c3
-rw-r--r--drivers/s390/cio/device.c9
-rw-r--r--drivers/s390/net/smsgiucv.c7
-rw-r--r--drivers/s390/scsi/zfcp_aux.c11
-rw-r--r--drivers/s390/scsi/zfcp_erp.c22
-rw-r--r--drivers/s390/scsi/zfcp_ext.h1
-rw-r--r--drivers/s390/scsi/zfcp_fc.c11
-rw-r--r--drivers/s390/scsi/zfcp_fsf.c13
-rw-r--r--drivers/s390/scsi/zfcp_sysfs.c1
-rw-r--r--drivers/scsi/bfa/bfad_fwimg.c2
-rw-r--r--drivers/scsi/bfa/bfad_im.c2
-rw-r--r--drivers/scsi/dpt_i2o.c4
-rw-r--r--drivers/scsi/gdth.c2
-rw-r--r--drivers/scsi/ipr.c42
-rw-r--r--drivers/scsi/ipr.h1
-rw-r--r--drivers/scsi/libsas/sas_expander.c1
-rw-r--r--drivers/scsi/pmcraid.c10
-rw-r--r--drivers/scsi/scsi_scan.c2
-rw-r--r--drivers/scsi/scsi_sysfs.c7
-rw-r--r--drivers/scsi/scsi_transport_fc.c3
-rw-r--r--drivers/serial/8250.c2
-rw-r--r--drivers/serial/8250_pci.c86
-rw-r--r--drivers/serial/atmel_serial.c2
-rw-r--r--drivers/serial/serial_core.c7
-rw-r--r--drivers/serial/serial_cs.c8
-rw-r--r--drivers/serial/sh-sci.c2
-rw-r--r--drivers/spi/amba-pl022.c2
-rw-r--r--drivers/spi/spi_stmp.c2
-rw-r--r--drivers/ssb/scan.c6
-rw-r--r--drivers/staging/Kconfig2
-rw-r--r--drivers/staging/Makefile1
-rw-r--r--drivers/staging/android/Kconfig1
-rw-r--r--drivers/staging/b3dfg/b3dfg.c1
-rw-r--r--drivers/staging/comedi/drivers/me_daq.c1
-rw-r--r--drivers/staging/comedi/drivers/ni_mio_common.c1
-rw-r--r--drivers/staging/comedi/drivers/ni_pcidio.c1
-rw-r--r--drivers/staging/et131x/et1310_address_map.h2
-rw-r--r--drivers/staging/et131x/et1310_rx.c20
-rw-r--r--drivers/staging/hv/ChannelMgmt.h3
-rw-r--r--drivers/staging/hv/NetVsc.c10
-rw-r--r--drivers/staging/hv/TODO6
-rw-r--r--drivers/staging/hv/osd.c1
-rw-r--r--drivers/staging/hv/osd.h1
-rw-r--r--drivers/staging/hv/vmbus_drv.c28
-rw-r--r--drivers/staging/iio/industrialio-core.c2
-rw-r--r--drivers/staging/otus/Kconfig2
-rw-r--r--drivers/staging/panel/panel.c13
-rw-r--r--drivers/staging/poch/poch.c1
-rw-r--r--drivers/staging/rt2860/Kconfig2
-rw-r--r--drivers/staging/rt2860/common/cmm_data_2860.c2
-rw-r--r--drivers/staging/rt2860/common/cmm_info.c1
-rw-r--r--drivers/staging/rt2860/rt_linux.c1
-rw-r--r--drivers/staging/rt2870/Kconfig2
-rw-r--r--drivers/staging/rt3090/Kconfig2
-rw-r--r--drivers/staging/rt3090/common/cmm_info.c1
-rw-r--r--drivers/staging/rt3090/rt_linux.c1
-rw-r--r--drivers/staging/rtl8187se/Kconfig2
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c4
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_module.c4
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c12
-rw-r--r--drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c17
-rw-r--r--drivers/staging/rtl8192e/Kconfig2
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c8
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_module.c8
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c19
-rw-r--r--drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c21
-rw-r--r--drivers/staging/rtl8192su/Kconfig2
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c4
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_module.c4
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c15
-rw-r--r--drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c17
-rw-r--r--drivers/staging/sep/sep_driver.c1
-rw-r--r--drivers/staging/stlc45xx/Kconfig8
-rw-r--r--drivers/staging/stlc45xx/Makefile1
-rw-r--r--drivers/staging/stlc45xx/stlc45xx.c2594
-rw-r--r--drivers/staging/stlc45xx/stlc45xx.h283
-rw-r--r--drivers/staging/stlc45xx/stlc45xx_lmac.h434
-rw-r--r--drivers/staging/vme/bridges/vme_ca91cx42.c1
-rw-r--r--drivers/staging/vme/bridges/vme_tsi148.c1
-rw-r--r--drivers/staging/vt6656/main_usb.c1
-rw-r--r--drivers/staging/winbond/Kconfig2
-rw-r--r--drivers/staging/wlan-ng/Kconfig2
-rw-r--r--drivers/thermal/thermal_sys.c10
-rw-r--r--drivers/uio/uio_pdrv_genirq.c1
-rw-r--r--drivers/usb/class/cdc-acm.c18
-rw-r--r--drivers/usb/gadget/Kconfig1
-rw-r--r--drivers/usb/gadget/ether.c9
-rw-r--r--drivers/usb/gadget/fsl_udc_core.c2
-rw-r--r--drivers/usb/host/ehci-sched.c12
-rw-r--r--drivers/usb/host/ohci-hcd.c5
-rw-r--r--drivers/usb/host/ohci-pci.c20
-rw-r--r--drivers/usb/host/ohci-q.c18
-rw-r--r--drivers/usb/host/ohci.h9
-rw-r--r--drivers/usb/host/pci-quirks.c2
-rw-r--r--drivers/usb/host/r8a66597-hcd.c23
-rw-r--r--drivers/usb/host/whci/asl.c23
-rw-r--r--drivers/usb/host/whci/pzl.c24
-rw-r--r--drivers/usb/host/xhci-mem.c10
-rw-r--r--drivers/usb/host/xhci-ring.c7
-rw-r--r--drivers/usb/mon/mon_bin.c11
-rw-r--r--drivers/usb/musb/Kconfig2
-rw-r--r--drivers/usb/serial/cp210x.c21
-rw-r--r--drivers/usb/serial/option.c10
-rw-r--r--drivers/usb/serial/sierra.c38
-rw-r--r--drivers/usb/storage/transport.c17
-rw-r--r--drivers/usb/wusbcore/security.c41
-rw-r--r--drivers/video/Kconfig2
-rw-r--r--drivers/video/atafb.c6
-rw-r--r--drivers/video/atmel_lcdfb.c11
-rw-r--r--drivers/video/backlight/corgi_lcd.c5
-rw-r--r--drivers/video/backlight/lcd.c2
-rw-r--r--drivers/video/console/fbcon.c5
-rw-r--r--drivers/video/da8xx-fb.c2
-rw-r--r--drivers/video/msm/mddi.c1
-rw-r--r--drivers/video/msm/mddi_client_nt35399.c1
-rw-r--r--drivers/video/msm/mddi_client_toshiba.c1
-rw-r--r--drivers/video/msm/mdp.c18
-rw-r--r--drivers/video/msm/mdp_ppp.c20
-rw-r--r--drivers/video/savage/savagefb_driver.c20
-rw-r--r--drivers/video/uvesafb.c28
-rw-r--r--drivers/virtio/virtio_balloon.c3
-rw-r--r--drivers/virtio/virtio_pci.c27
-rw-r--r--drivers/virtio/virtio_ring.c3
-rw-r--r--drivers/watchdog/riowd.c2
-rw-r--r--drivers/watchdog/sbc_fitpc2_wdt.c2
529 files changed, 17023 insertions, 7012 deletions
diff --git a/drivers/acpi/Kconfig b/drivers/acpi/Kconfig
index 0ed42d8870c7..93d2c7971df6 100644
--- a/drivers/acpi/Kconfig
+++ b/drivers/acpi/Kconfig
@@ -218,10 +218,10 @@ config ACPI_PROCESSOR_AGGREGATOR
218 depends on X86 218 depends on X86
219 help 219 help
220 ACPI 4.0 defines processor Aggregator, which enables OS to perform 220 ACPI 4.0 defines processor Aggregator, which enables OS to perform
221 specfic processor configuration and control that applies to all 221 specific processor configuration and control that applies to all
222 processors in the platform. Currently only logical processor idling 222 processors in the platform. Currently only logical processor idling
223 is defined, which is to reduce power consumption. This driver 223 is defined, which is to reduce power consumption. This driver
224 support the new device. 224 supports the new device.
225 225
226config ACPI_THERMAL 226config ACPI_THERMAL
227 tristate "Thermal Zone" 227 tristate "Thermal Zone"
diff --git a/drivers/acpi/ac.c b/drivers/acpi/ac.c
index 98b9690b0159..b6ed60b57b0d 100644
--- a/drivers/acpi/ac.c
+++ b/drivers/acpi/ac.c
@@ -245,6 +245,7 @@ static void acpi_ac_notify(struct acpi_device *device, u32 event)
245 acpi_bus_generate_netlink_event(device->pnp.device_class, 245 acpi_bus_generate_netlink_event(device->pnp.device_class,
246 dev_name(&device->dev), event, 246 dev_name(&device->dev), event,
247 (u32) ac->state); 247 (u32) ac->state);
248 acpi_notifier_call_chain(device, event, (u32) ac->state);
248#ifdef CONFIG_ACPI_SYSFS_POWER 249#ifdef CONFIG_ACPI_SYSFS_POWER
249 kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE); 250 kobject_uevent(&ac->charger.dev->kobj, KOBJ_CHANGE);
250#endif 251#endif
diff --git a/drivers/acpi/acpica/acconfig.h b/drivers/acpi/acpica/acconfig.h
index 8e679ef5b231..a4471e3d3853 100644
--- a/drivers/acpi/acpica/acconfig.h
+++ b/drivers/acpi/acpica/acconfig.h
@@ -103,9 +103,9 @@
103 103
104#define ACPI_MAX_REFERENCE_COUNT 0x1000 104#define ACPI_MAX_REFERENCE_COUNT 0x1000
105 105
106/* Size of cached memory mapping for system memory operation region */ 106/* Default page size for use in mapping memory for operation regions */
107 107
108#define ACPI_SYSMEM_REGION_WINDOW_SIZE 4096 108#define ACPI_DEFAULT_PAGE_SIZE 4096 /* Must be power of 2 */
109 109
110/* owner_id tracking. 8 entries allows for 255 owner_ids */ 110/* owner_id tracking. 8 entries allows for 255 owner_ids */
111 111
diff --git a/drivers/acpi/acpica/exregion.c b/drivers/acpi/acpica/exregion.c
index 3a54b737d2da..2bd83ac57c3a 100644
--- a/drivers/acpi/acpica/exregion.c
+++ b/drivers/acpi/acpica/exregion.c
@@ -77,7 +77,8 @@ acpi_ex_system_memory_space_handler(u32 function,
77 void *logical_addr_ptr = NULL; 77 void *logical_addr_ptr = NULL;
78 struct acpi_mem_space_context *mem_info = region_context; 78 struct acpi_mem_space_context *mem_info = region_context;
79 u32 length; 79 u32 length;
80 acpi_size window_size; 80 acpi_size map_length;
81 acpi_size page_boundary_map_length;
81#ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED 82#ifdef ACPI_MISALIGNMENT_NOT_SUPPORTED
82 u32 remainder; 83 u32 remainder;
83#endif 84#endif
@@ -144,25 +145,39 @@ acpi_ex_system_memory_space_handler(u32 function,
144 } 145 }
145 146
146 /* 147 /*
147 * Don't attempt to map memory beyond the end of the region, and 148 * Attempt to map from the requested address to the end of the region.
148 * constrain the maximum mapping size to something reasonable. 149 * However, we will never map more than one page, nor will we cross
150 * a page boundary.
149 */ 151 */
150 window_size = (acpi_size) 152 map_length = (acpi_size)
151 ((mem_info->address + mem_info->length) - address); 153 ((mem_info->address + mem_info->length) - address);
152 154
153 if (window_size > ACPI_SYSMEM_REGION_WINDOW_SIZE) { 155 /*
154 window_size = ACPI_SYSMEM_REGION_WINDOW_SIZE; 156 * If mapping the entire remaining portion of the region will cross
157 * a page boundary, just map up to the page boundary, do not cross.
158 * On some systems, crossing a page boundary while mapping regions
159 * can cause warnings if the pages have different attributes
160 * due to resource management
161 */
162 page_boundary_map_length =
163 ACPI_ROUND_UP(address, ACPI_DEFAULT_PAGE_SIZE) - address;
164
165 if (!page_boundary_map_length) {
166 page_boundary_map_length = ACPI_DEFAULT_PAGE_SIZE;
167 }
168
169 if (map_length > page_boundary_map_length) {
170 map_length = page_boundary_map_length;
155 } 171 }
156 172
157 /* Create a new mapping starting at the address given */ 173 /* Create a new mapping starting at the address given */
158 174
159 mem_info->mapped_logical_address = 175 mem_info->mapped_logical_address = acpi_os_map_memory((acpi_physical_address) address, map_length);
160 acpi_os_map_memory((acpi_physical_address) address, window_size);
161 if (!mem_info->mapped_logical_address) { 176 if (!mem_info->mapped_logical_address) {
162 ACPI_ERROR((AE_INFO, 177 ACPI_ERROR((AE_INFO,
163 "Could not map memory at %8.8X%8.8X, size %X", 178 "Could not map memory at %8.8X%8.8X, size %X",
164 ACPI_FORMAT_NATIVE_UINT(address), 179 ACPI_FORMAT_NATIVE_UINT(address),
165 (u32) window_size)); 180 (u32) map_length));
166 mem_info->mapped_length = 0; 181 mem_info->mapped_length = 0;
167 return_ACPI_STATUS(AE_NO_MEMORY); 182 return_ACPI_STATUS(AE_NO_MEMORY);
168 } 183 }
@@ -170,7 +185,7 @@ acpi_ex_system_memory_space_handler(u32 function,
170 /* Save the physical address and mapping size */ 185 /* Save the physical address and mapping size */
171 186
172 mem_info->mapped_physical_address = address; 187 mem_info->mapped_physical_address = address;
173 mem_info->mapped_length = window_size; 188 mem_info->mapped_length = map_length;
174 } 189 }
175 190
176 /* 191 /*
diff --git a/drivers/acpi/button.c b/drivers/acpi/button.c
index 9335b87c5174..0c9c6a9a002c 100644
--- a/drivers/acpi/button.c
+++ b/drivers/acpi/button.c
@@ -251,6 +251,9 @@ int acpi_lid_open(void)
251 acpi_status status; 251 acpi_status status;
252 unsigned long long state; 252 unsigned long long state;
253 253
254 if (!lid_device)
255 return -ENODEV;
256
254 status = acpi_evaluate_integer(lid_device->handle, "_LID", NULL, 257 status = acpi_evaluate_integer(lid_device->handle, "_LID", NULL,
255 &state); 258 &state);
256 if (ACPI_FAILURE(status)) 259 if (ACPI_FAILURE(status))
diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
index 31122214e0ec..1af808171d46 100644
--- a/drivers/acpi/pci_root.c
+++ b/drivers/acpi/pci_root.c
@@ -389,6 +389,17 @@ struct pci_dev *acpi_get_pci_dev(acpi_handle handle)
389 389
390 pbus = pdev->subordinate; 390 pbus = pdev->subordinate;
391 pci_dev_put(pdev); 391 pci_dev_put(pdev);
392
393 /*
394 * This function may be called for a non-PCI device that has a
395 * PCI parent (eg. a disk under a PCI SATA controller). In that
396 * case pdev->subordinate will be NULL for the parent.
397 */
398 if (!pbus) {
399 dev_dbg(&pdev->dev, "Not a PCI-to-PCI bridge\n");
400 pdev = NULL;
401 break;
402 }
392 } 403 }
393out: 404out:
394 list_for_each_entry_safe(node, tmp, &device_list, node) 405 list_for_each_entry_safe(node, tmp, &device_list, node)
diff --git a/drivers/acpi/power_meter.c b/drivers/acpi/power_meter.c
index e6bfd77986b8..2ef7030a0c28 100644
--- a/drivers/acpi/power_meter.c
+++ b/drivers/acpi/power_meter.c
@@ -294,7 +294,11 @@ static int set_acpi_trip(struct acpi_power_meter_resource *resource)
294 return -EINVAL; 294 return -EINVAL;
295 } 295 }
296 296
297 return data; 297 /* _PTP returns 0 on success, nonzero otherwise */
298 if (data)
299 return -EINVAL;
300
301 return 0;
298} 302}
299 303
300static ssize_t set_trip(struct device *dev, struct device_attribute *devattr, 304static ssize_t set_trip(struct device *dev, struct device_attribute *devattr,
diff --git a/drivers/acpi/proc.c b/drivers/acpi/proc.c
index f8b6f555ba52..d0d25e2e1ced 100644
--- a/drivers/acpi/proc.c
+++ b/drivers/acpi/proc.c
@@ -393,7 +393,7 @@ acpi_system_write_wakeup_device(struct file *file,
393 struct list_head *node, *next; 393 struct list_head *node, *next;
394 char strbuf[5]; 394 char strbuf[5];
395 char str[5] = ""; 395 char str[5] = "";
396 int len = count; 396 unsigned int len = count;
397 struct acpi_device *found_dev = NULL; 397 struct acpi_device *found_dev = NULL;
398 398
399 if (len > 4) 399 if (len > 4)
diff --git a/drivers/acpi/processor_core.c b/drivers/acpi/processor_core.c
index c567b46dfa0f..ec742a4e5635 100644
--- a/drivers/acpi/processor_core.c
+++ b/drivers/acpi/processor_core.c
@@ -770,7 +770,7 @@ static struct notifier_block acpi_cpu_notifier =
770 .notifier_call = acpi_cpu_soft_notify, 770 .notifier_call = acpi_cpu_soft_notify,
771}; 771};
772 772
773static int acpi_processor_add(struct acpi_device *device) 773static int __cpuinit acpi_processor_add(struct acpi_device *device)
774{ 774{
775 struct acpi_processor *pr = NULL; 775 struct acpi_processor *pr = NULL;
776 int result = 0; 776 int result = 0;
diff --git a/drivers/acpi/processor_throttling.c b/drivers/acpi/processor_throttling.c
index 4c6c14c1e307..1c5d7a8b2fdf 100644
--- a/drivers/acpi/processor_throttling.c
+++ b/drivers/acpi/processor_throttling.c
@@ -1133,15 +1133,15 @@ int acpi_processor_get_throttling_info(struct acpi_processor *pr)
1133 int result = 0; 1133 int result = 0;
1134 struct acpi_processor_throttling *pthrottling; 1134 struct acpi_processor_throttling *pthrottling;
1135 1135
1136 if (!pr)
1137 return -EINVAL;
1138
1136 ACPI_DEBUG_PRINT((ACPI_DB_INFO, 1139 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
1137 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n", 1140 "pblk_address[0x%08x] duty_offset[%d] duty_width[%d]\n",
1138 pr->throttling.address, 1141 pr->throttling.address,
1139 pr->throttling.duty_offset, 1142 pr->throttling.duty_offset,
1140 pr->throttling.duty_width)); 1143 pr->throttling.duty_width));
1141 1144
1142 if (!pr)
1143 return -EINVAL;
1144
1145 /* 1145 /*
1146 * Evaluate _PTC, _TSS and _TPC 1146 * Evaluate _PTC, _TSS and _TPC
1147 * They must all be present or none of them can be used. 1147 * They must all be present or none of them can be used.
diff --git a/drivers/acpi/sleep.c b/drivers/acpi/sleep.c
index a90afcc723ab..4cc1b8116e76 100644
--- a/drivers/acpi/sleep.c
+++ b/drivers/acpi/sleep.c
@@ -413,6 +413,30 @@ static struct dmi_system_id __initdata acpisleep_dmi_table[] = {
413 }, 413 },
414 }, 414 },
415 { 415 {
416 .callback = init_set_sci_en_on_resume,
417 .ident = "Hewlett-Packard Pavilion dv4",
418 .matches = {
419 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
420 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv4"),
421 },
422 },
423 {
424 .callback = init_set_sci_en_on_resume,
425 .ident = "Hewlett-Packard Pavilion dv7",
426 .matches = {
427 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
428 DMI_MATCH(DMI_PRODUCT_NAME, "HP Pavilion dv7"),
429 },
430 },
431 {
432 .callback = init_set_sci_en_on_resume,
433 .ident = "Hewlett-Packard Compaq Presario CQ40 Notebook PC",
434 .matches = {
435 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
436 DMI_MATCH(DMI_PRODUCT_NAME, "Compaq Presario CQ40 Notebook PC"),
437 },
438 },
439 {
416 .callback = init_old_suspend_ordering, 440 .callback = init_old_suspend_ordering,
417 .ident = "Panasonic CF51-2L", 441 .ident = "Panasonic CF51-2L",
418 .matches = { 442 .matches = {
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index f6e54bf8dd96..05dff631591c 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -1109,7 +1109,12 @@ static int acpi_video_bus_check(struct acpi_video_bus *video)
1109 */ 1109 */
1110 1110
1111 /* Does this device support video switching? */ 1111 /* Does this device support video switching? */
1112 if (video->cap._DOS) { 1112 if (video->cap._DOS || video->cap._DOD) {
1113 if (!video->cap._DOS) {
1114 printk(KERN_WARNING FW_BUG
1115 "ACPI(%s) defines _DOD but not _DOS\n",
1116 acpi_device_bid(video->device));
1117 }
1113 video->flags.multihead = 1; 1118 video->flags.multihead = 1;
1114 status = 0; 1119 status = 0;
1115 } 1120 }
@@ -1218,7 +1223,7 @@ acpi_video_device_write_state(struct file *file,
1218 u32 state = 0; 1223 u32 state = 0;
1219 1224
1220 1225
1221 if (!dev || count + 1 > sizeof str) 1226 if (!dev || count >= sizeof(str))
1222 return -EINVAL; 1227 return -EINVAL;
1223 1228
1224 if (copy_from_user(str, buffer, count)) 1229 if (copy_from_user(str, buffer, count))
@@ -1275,7 +1280,7 @@ acpi_video_device_write_brightness(struct file *file,
1275 int i; 1280 int i;
1276 1281
1277 1282
1278 if (!dev || !dev->brightness || count + 1 > sizeof str) 1283 if (!dev || !dev->brightness || count >= sizeof(str))
1279 return -EINVAL; 1284 return -EINVAL;
1280 1285
1281 if (copy_from_user(str, buffer, count)) 1286 if (copy_from_user(str, buffer, count))
@@ -1557,7 +1562,7 @@ acpi_video_bus_write_POST(struct file *file,
1557 unsigned long long opt, options; 1562 unsigned long long opt, options;
1558 1563
1559 1564
1560 if (!video || count + 1 > sizeof str) 1565 if (!video || count >= sizeof(str))
1561 return -EINVAL; 1566 return -EINVAL;
1562 1567
1563 status = acpi_video_bus_POST_options(video, &options); 1568 status = acpi_video_bus_POST_options(video, &options);
@@ -1597,7 +1602,7 @@ acpi_video_bus_write_DOS(struct file *file,
1597 unsigned long opt; 1602 unsigned long opt;
1598 1603
1599 1604
1600 if (!video || count + 1 > sizeof str) 1605 if (!video || count >= sizeof(str))
1601 return -EINVAL; 1606 return -EINVAL;
1602 1607
1603 if (copy_from_user(str, buffer, count)) 1608 if (copy_from_user(str, buffer, count))
diff --git a/drivers/acpi/video_detect.c b/drivers/acpi/video_detect.c
index 7032f25da9b5..575593a8b4e6 100644
--- a/drivers/acpi/video_detect.c
+++ b/drivers/acpi/video_detect.c
@@ -84,7 +84,7 @@ long acpi_is_video_device(struct acpi_device *device)
84 return 0; 84 return 0;
85 85
86 /* Does this device able to support video switching ? */ 86 /* Does this device able to support video switching ? */
87 if (ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOD", &h_dummy)) && 87 if (ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOD", &h_dummy)) ||
88 ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOS", &h_dummy))) 88 ACPI_SUCCESS(acpi_get_handle(device->handle, "_DOS", &h_dummy)))
89 video_caps |= ACPI_VIDEO_OUTPUT_SWITCHING; 89 video_caps |= ACPI_VIDEO_OUTPUT_SWITCHING;
90 90
diff --git a/drivers/ata/ahci.c b/drivers/ata/ahci.c
index b1a257746a19..a3241a1a710b 100644
--- a/drivers/ata/ahci.c
+++ b/drivers/ata/ahci.c
@@ -575,7 +575,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
575 { PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700 }, /* ATI SB700/800 */ 575 { PCI_VDEVICE(ATI, 0x4395), board_ahci_sb700 }, /* ATI SB700/800 */
576 576
577 /* AMD */ 577 /* AMD */
578 { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD SB900 */ 578 { PCI_VDEVICE(AMD, 0x7800), board_ahci }, /* AMD Hudson-2 */
579 /* AMD is using RAID class only for ahci controllers */ 579 /* AMD is using RAID class only for ahci controllers */
580 { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 580 { PCI_VENDOR_ID_AMD, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
581 PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci }, 581 PCI_CLASS_STORAGE_RAID << 8, 0xffffff, board_ahci },
@@ -605,6 +605,7 @@ static const struct pci_device_id ahci_pci_tbl[] = {
605 { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq }, /* MCP67 */ 605 { PCI_VDEVICE(NVIDIA, 0x0559), board_ahci_yesncq }, /* MCP67 */
606 { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq }, /* MCP67 */ 606 { PCI_VDEVICE(NVIDIA, 0x055a), board_ahci_yesncq }, /* MCP67 */
607 { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq }, /* MCP67 */ 607 { PCI_VDEVICE(NVIDIA, 0x055b), board_ahci_yesncq }, /* MCP67 */
608 { PCI_VDEVICE(NVIDIA, 0x0580), board_ahci_yesncq }, /* Linux ID */
608 { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq }, /* MCP73 */ 609 { PCI_VDEVICE(NVIDIA, 0x07f0), board_ahci_yesncq }, /* MCP73 */
609 { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq }, /* MCP73 */ 610 { PCI_VDEVICE(NVIDIA, 0x07f1), board_ahci_yesncq }, /* MCP73 */
610 { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq }, /* MCP73 */ 611 { PCI_VDEVICE(NVIDIA, 0x07f2), board_ahci_yesncq }, /* MCP73 */
@@ -2717,6 +2718,30 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
2717 }, 2718 },
2718 .driver_data = "20071026", /* yyyymmdd */ 2719 .driver_data = "20071026", /* yyyymmdd */
2719 }, 2720 },
2721 /*
2722 * All BIOS versions for the MSI K9A2 Platinum (MS-7376)
2723 * support 64bit DMA.
2724 *
2725 * BIOS versions earlier than 1.5 had the Manufacturer DMI
2726 * fields as "MICRO-STAR INTERANTIONAL CO.,LTD".
2727 * This spelling mistake was fixed in BIOS version 1.5, so
2728 * 1.5 and later have the Manufacturer as
2729 * "MICRO-STAR INTERNATIONAL CO.,LTD".
2730 * So try to match on DMI_BOARD_VENDOR of "MICRO-STAR INTER".
2731 *
2732 * BIOS versions earlier than 1.9 had a Board Product Name
2733 * DMI field of "MS-7376". This was changed to be
2734 * "K9A2 Platinum (MS-7376)" in version 1.9, but we can still
2735 * match on DMI_BOARD_NAME of "MS-7376".
2736 */
2737 {
2738 .ident = "MSI K9A2 Platinum",
2739 .matches = {
2740 DMI_MATCH(DMI_BOARD_VENDOR,
2741 "MICRO-STAR INTER"),
2742 DMI_MATCH(DMI_BOARD_NAME, "MS-7376"),
2743 },
2744 },
2720 { } 2745 { }
2721 }; 2746 };
2722 const struct dmi_system_id *match; 2747 const struct dmi_system_id *match;
@@ -2728,18 +2753,24 @@ static bool ahci_sb600_enable_64bit(struct pci_dev *pdev)
2728 !match) 2753 !match)
2729 return false; 2754 return false;
2730 2755
2756 if (!match->driver_data)
2757 goto enable_64bit;
2758
2731 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date); 2759 dmi_get_date(DMI_BIOS_DATE, &year, &month, &date);
2732 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date); 2760 snprintf(buf, sizeof(buf), "%04d%02d%02d", year, month, date);
2733 2761
2734 if (strcmp(buf, match->driver_data) >= 0) { 2762 if (strcmp(buf, match->driver_data) >= 0)
2735 dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n", 2763 goto enable_64bit;
2736 match->ident); 2764 else {
2737 return true;
2738 } else {
2739 dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, " 2765 dev_printk(KERN_WARNING, &pdev->dev, "%s: BIOS too old, "
2740 "forcing 32bit DMA, update BIOS\n", match->ident); 2766 "forcing 32bit DMA, update BIOS\n", match->ident);
2741 return false; 2767 return false;
2742 } 2768 }
2769
2770enable_64bit:
2771 dev_printk(KERN_WARNING, &pdev->dev, "%s: enabling 64bit DMA\n",
2772 match->ident);
2773 return true;
2743} 2774}
2744 2775
2745static bool ahci_broken_system_poweroff(struct pci_dev *pdev) 2776static bool ahci_broken_system_poweroff(struct pci_dev *pdev)
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index b525a0981348..dc72690ed5db 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -4919,10 +4919,11 @@ struct ata_queued_cmd *ata_qc_new_init(struct ata_device *dev)
4919 */ 4919 */
4920void ata_qc_free(struct ata_queued_cmd *qc) 4920void ata_qc_free(struct ata_queued_cmd *qc)
4921{ 4921{
4922 struct ata_port *ap = qc->ap; 4922 struct ata_port *ap;
4923 unsigned int tag; 4923 unsigned int tag;
4924 4924
4925 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4925 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4926 ap = qc->ap;
4926 4927
4927 qc->flags = 0; 4928 qc->flags = 0;
4928 tag = qc->tag; 4929 tag = qc->tag;
@@ -4934,11 +4935,13 @@ void ata_qc_free(struct ata_queued_cmd *qc)
4934 4935
4935void __ata_qc_complete(struct ata_queued_cmd *qc) 4936void __ata_qc_complete(struct ata_queued_cmd *qc)
4936{ 4937{
4937 struct ata_port *ap = qc->ap; 4938 struct ata_port *ap;
4938 struct ata_link *link = qc->dev->link; 4939 struct ata_link *link;
4939 4940
4940 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */ 4941 WARN_ON_ONCE(qc == NULL); /* ata_qc_from_tag _might_ return NULL */
4941 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE)); 4942 WARN_ON_ONCE(!(qc->flags & ATA_QCFLAG_ACTIVE));
4943 ap = qc->ap;
4944 link = qc->dev->link;
4942 4945
4943 if (likely(qc->flags & ATA_QCFLAG_DMAMAP)) 4946 if (likely(qc->flags & ATA_QCFLAG_DMAMAP))
4944 ata_sg_clean(qc); 4947 ata_sg_clean(qc);
@@ -5028,12 +5031,14 @@ void ata_qc_complete(struct ata_queued_cmd *qc)
5028 qc->flags |= ATA_QCFLAG_FAILED; 5031 qc->flags |= ATA_QCFLAG_FAILED;
5029 5032
5030 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) { 5033 if (unlikely(qc->flags & ATA_QCFLAG_FAILED)) {
5031 if (!ata_tag_internal(qc->tag)) { 5034 /* always fill result TF for failed qc */
5032 /* always fill result TF for failed qc */ 5035 fill_result_tf(qc);
5033 fill_result_tf(qc); 5036
5037 if (!ata_tag_internal(qc->tag))
5034 ata_qc_schedule_eh(qc); 5038 ata_qc_schedule_eh(qc);
5035 return; 5039 else
5036 } 5040 __ata_qc_complete(qc);
5041 return;
5037 } 5042 }
5038 5043
5039 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN); 5044 WARN_ON_ONCE(ap->pflags & ATA_PFLAG_FROZEN);
diff --git a/drivers/ata/libata-eh.c b/drivers/ata/libata-eh.c
index 0a97822da211..bba2ae5df1c2 100644
--- a/drivers/ata/libata-eh.c
+++ b/drivers/ata/libata-eh.c
@@ -2981,12 +2981,14 @@ static int ata_eh_revalidate_and_attach(struct ata_link *link,
2981 * device detection messages backwards. 2981 * device detection messages backwards.
2982 */ 2982 */
2983 ata_for_each_dev(dev, link, ALL) { 2983 ata_for_each_dev(dev, link, ALL) {
2984 if (!(new_mask & (1 << dev->devno)) || 2984 if (!(new_mask & (1 << dev->devno)))
2985 dev->class == ATA_DEV_PMP)
2986 continue; 2985 continue;
2987 2986
2988 dev->class = ehc->classes[dev->devno]; 2987 dev->class = ehc->classes[dev->devno];
2989 2988
2989 if (dev->class == ATA_DEV_PMP)
2990 continue;
2991
2990 ehc->i.flags |= ATA_EHI_PRINTINFO; 2992 ehc->i.flags |= ATA_EHI_PRINTINFO;
2991 rc = ata_dev_configure(dev); 2993 rc = ata_dev_configure(dev);
2992 ehc->i.flags &= ~ATA_EHI_PRINTINFO; 2994 ehc->i.flags &= ~ATA_EHI_PRINTINFO;
diff --git a/drivers/ata/pata_atiixp.c b/drivers/ata/pata_atiixp.c
index aa4b3f6ae771..ae4454d4e955 100644
--- a/drivers/ata/pata_atiixp.c
+++ b/drivers/ata/pata_atiixp.c
@@ -246,7 +246,7 @@ static const struct pci_device_id atiixp[] = {
246 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), }, 246 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), },
247 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), }, 247 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), },
248 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), }, 248 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), },
249 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_SB900_IDE), }, 249 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), },
250 250
251 { }, 251 { },
252}; 252};
diff --git a/drivers/ata/pata_sc1200.c b/drivers/ata/pata_sc1200.c
index f49814d6fd2e..3bbed8322ecf 100644
--- a/drivers/ata/pata_sc1200.c
+++ b/drivers/ata/pata_sc1200.c
@@ -235,8 +235,7 @@ static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
235 .udma_mask = ATA_UDMA2, 235 .udma_mask = ATA_UDMA2,
236 .port_ops = &sc1200_port_ops 236 .port_ops = &sc1200_port_ops
237 }; 237 };
238 /* Can't enable port 2 yet, see top comments */ 238 const struct ata_port_info *ppi[] = { &info, NULL };
239 const struct ata_port_info *ppi[] = { &info, };
240 239
241 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL); 240 return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL);
242} 241}
diff --git a/drivers/ata/pata_via.c b/drivers/ata/pata_via.c
index 45657cacec43..88984b803d6d 100644
--- a/drivers/ata/pata_via.c
+++ b/drivers/ata/pata_via.c
@@ -111,7 +111,7 @@ static const struct via_isa_bridge {
111 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 111 { "vt8251", PCI_DEVICE_ID_VIA_8251, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
112 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA }, 112 { "cx700", PCI_DEVICE_ID_VIA_CX700, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_SATA_PATA },
113 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, 113 { "vt6410", PCI_DEVICE_ID_VIA_6410, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
114 { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES }, 114 { "vt6415", PCI_DEVICE_ID_VIA_6415, 0x00, 0xff, VIA_UDMA_133 | VIA_BAD_AST | VIA_NO_ENABLES },
115 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 115 { "vt8237a", PCI_DEVICE_ID_VIA_8237A, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
116 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 116 { "vt8237", PCI_DEVICE_ID_VIA_8237, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
117 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST }, 117 { "vt8235", PCI_DEVICE_ID_VIA_8235, 0x00, 0x2f, VIA_UDMA_133 | VIA_BAD_AST },
diff --git a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
index 17f9ff9067a2..6f5093b7c8c5 100644
--- a/drivers/ata/sata_mv.c
+++ b/drivers/ata/sata_mv.c
@@ -1382,6 +1382,25 @@ static int mv_qc_defer(struct ata_queued_cmd *qc)
1382 */ 1382 */
1383 if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH) 1383 if (pp->pp_flags & MV_PP_FLAG_DELAYED_EH)
1384 return ATA_DEFER_PORT; 1384 return ATA_DEFER_PORT;
1385
1386 /* PIO commands need exclusive link: no other commands [DMA or PIO]
1387 * can run concurrently.
1388 * set excl_link when we want to send a PIO command in DMA mode
1389 * or a non-NCQ command in NCQ mode.
1390 * When we receive a command from that link, and there are no
1391 * outstanding commands, mark a flag to clear excl_link and let
1392 * the command go through.
1393 */
1394 if (unlikely(ap->excl_link)) {
1395 if (link == ap->excl_link) {
1396 if (ap->nr_active_links)
1397 return ATA_DEFER_PORT;
1398 qc->flags |= ATA_QCFLAG_CLEAR_EXCL;
1399 return 0;
1400 } else
1401 return ATA_DEFER_PORT;
1402 }
1403
1385 /* 1404 /*
1386 * If the port is completely idle, then allow the new qc. 1405 * If the port is completely idle, then allow the new qc.
1387 */ 1406 */
@@ -1395,8 +1414,14 @@ static int mv_qc_defer(struct ata_queued_cmd *qc)
1395 * doesn't allow it. 1414 * doesn't allow it.
1396 */ 1415 */
1397 if ((pp->pp_flags & MV_PP_FLAG_EDMA_EN) && 1416 if ((pp->pp_flags & MV_PP_FLAG_EDMA_EN) &&
1398 (pp->pp_flags & MV_PP_FLAG_NCQ_EN) && ata_is_ncq(qc->tf.protocol)) 1417 (pp->pp_flags & MV_PP_FLAG_NCQ_EN)) {
1399 return 0; 1418 if (ata_is_ncq(qc->tf.protocol))
1419 return 0;
1420 else {
1421 ap->excl_link = link;
1422 return ATA_DEFER_PORT;
1423 }
1424 }
1400 1425
1401 return ATA_DEFER_PORT; 1426 return ATA_DEFER_PORT;
1402} 1427}
diff --git a/drivers/ata/sata_nv.c b/drivers/ata/sata_nv.c
index 86a40582999c..1eb4e020eb5c 100644
--- a/drivers/ata/sata_nv.c
+++ b/drivers/ata/sata_nv.c
@@ -1594,9 +1594,21 @@ static int nv_hardreset(struct ata_link *link, unsigned int *class,
1594 !ata_dev_enabled(link->device)) 1594 !ata_dev_enabled(link->device))
1595 sata_link_hardreset(link, sata_deb_timing_hotplug, deadline, 1595 sata_link_hardreset(link, sata_deb_timing_hotplug, deadline,
1596 NULL, NULL); 1596 NULL, NULL);
1597 else if (!(ehc->i.flags & ATA_EHI_QUIET)) 1597 else {
1598 ata_link_printk(link, KERN_INFO, 1598 const unsigned long *timing = sata_ehc_deb_timing(ehc);
1599 "nv: skipping hardreset on occupied port\n"); 1599 int rc;
1600
1601 if (!(ehc->i.flags & ATA_EHI_QUIET))
1602 ata_link_printk(link, KERN_INFO, "nv: skipping "
1603 "hardreset on occupied port\n");
1604
1605 /* make sure the link is online */
1606 rc = sata_link_resume(link, timing, deadline);
1607 /* whine about phy resume failure but proceed */
1608 if (rc && rc != -EOPNOTSUPP)
1609 ata_link_printk(link, KERN_WARNING, "failed to resume "
1610 "link (errno=%d)\n", rc);
1611 }
1600 1612
1601 /* device signature acquisition is unreliable */ 1613 /* device signature acquisition is unreliable */
1602 return -EAGAIN; 1614 return -EAGAIN;
diff --git a/drivers/ata/sata_via.c b/drivers/ata/sata_via.c
index bdd43c7f432e..02efd9a83d26 100644
--- a/drivers/ata/sata_via.c
+++ b/drivers/ata/sata_via.c
@@ -93,7 +93,6 @@ static const struct pci_device_id svia_pci_tbl[] = {
93 { PCI_VDEVICE(VIA, 0x7372), vt6420 }, 93 { PCI_VDEVICE(VIA, 0x7372), vt6420 },
94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */ 94 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */
95 { PCI_VDEVICE(VIA, 0x9000), vt8251 }, 95 { PCI_VDEVICE(VIA, 0x9000), vt8251 },
96 { PCI_VDEVICE(VIA, 0x9040), vt8251 },
97 96
98 { } /* terminate list */ 97 { } /* terminate list */
99}; 98};
diff --git a/drivers/base/bus.c b/drivers/base/bus.c
index 973bf2ad4e0d..63c143e54a57 100644
--- a/drivers/base/bus.c
+++ b/drivers/base/bus.c
@@ -689,15 +689,19 @@ int bus_add_driver(struct device_driver *drv)
689 printk(KERN_ERR "%s: driver_add_attrs(%s) failed\n", 689 printk(KERN_ERR "%s: driver_add_attrs(%s) failed\n",
690 __func__, drv->name); 690 __func__, drv->name);
691 } 691 }
692 error = add_bind_files(drv); 692
693 if (error) { 693 if (!drv->suppress_bind_attrs) {
694 /* Ditto */ 694 error = add_bind_files(drv);
695 printk(KERN_ERR "%s: add_bind_files(%s) failed\n", 695 if (error) {
696 __func__, drv->name); 696 /* Ditto */
697 printk(KERN_ERR "%s: add_bind_files(%s) failed\n",
698 __func__, drv->name);
699 }
697 } 700 }
698 701
699 kobject_uevent(&priv->kobj, KOBJ_ADD); 702 kobject_uevent(&priv->kobj, KOBJ_ADD);
700 return 0; 703 return 0;
704
701out_unregister: 705out_unregister:
702 kfree(drv->p); 706 kfree(drv->p);
703 drv->p = NULL; 707 drv->p = NULL;
@@ -720,7 +724,8 @@ void bus_remove_driver(struct device_driver *drv)
720 if (!drv->bus) 724 if (!drv->bus)
721 return; 725 return;
722 726
723 remove_bind_files(drv); 727 if (!drv->suppress_bind_attrs)
728 remove_bind_files(drv);
724 driver_remove_attrs(drv->bus, drv); 729 driver_remove_attrs(drv->bus, drv);
725 driver_remove_file(drv, &driver_attr_uevent); 730 driver_remove_file(drv, &driver_attr_uevent);
726 klist_remove(&drv->p->knode_bus); 731 klist_remove(&drv->p->knode_bus);
diff --git a/drivers/base/driver.c b/drivers/base/driver.c
index ed2ebd3c287d..f367885a7646 100644
--- a/drivers/base/driver.c
+++ b/drivers/base/driver.c
@@ -236,7 +236,7 @@ int driver_register(struct device_driver *drv)
236 put_driver(other); 236 put_driver(other);
237 printk(KERN_ERR "Error: Driver '%s' is already registered, " 237 printk(KERN_ERR "Error: Driver '%s' is already registered, "
238 "aborting...\n", drv->name); 238 "aborting...\n", drv->name);
239 return -EEXIST; 239 return -EBUSY;
240 } 240 }
241 241
242 ret = bus_add_driver(drv); 242 ret = bus_add_driver(drv);
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index ed156a13aa40..4fa954b07ac4 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -521,11 +521,15 @@ int __init_or_module platform_driver_probe(struct platform_driver *drv,
521{ 521{
522 int retval, code; 522 int retval, code;
523 523
524 /* make sure driver won't have bind/unbind attributes */
525 drv->driver.suppress_bind_attrs = true;
526
524 /* temporary section violation during probe() */ 527 /* temporary section violation during probe() */
525 drv->probe = probe; 528 drv->probe = probe;
526 retval = code = platform_driver_register(drv); 529 retval = code = platform_driver_register(drv);
527 530
528 /* Fixup that section violation, being paranoid about code scanning 531 /*
532 * Fixup that section violation, being paranoid about code scanning
529 * the list of drivers in order to probe new devices. Check to see 533 * the list of drivers in order to probe new devices. Check to see
530 * if the probe was successful, and make sure any forced probes of 534 * if the probe was successful, and make sure any forced probes of
531 * new devices fail. 535 * new devices fail.
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index e0dc4071e088..8aa2443182d5 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -511,6 +511,7 @@ static void dpm_complete(pm_message_t state)
511 511
512 INIT_LIST_HEAD(&list); 512 INIT_LIST_HEAD(&list);
513 mutex_lock(&dpm_list_mtx); 513 mutex_lock(&dpm_list_mtx);
514 transition_started = false;
514 while (!list_empty(&dpm_list)) { 515 while (!list_empty(&dpm_list)) {
515 struct device *dev = to_device(dpm_list.prev); 516 struct device *dev = to_device(dpm_list.prev);
516 517
diff --git a/drivers/base/power/runtime.c b/drivers/base/power/runtime.c
index 38556f6cc22d..a770498a74ec 100644
--- a/drivers/base/power/runtime.c
+++ b/drivers/base/power/runtime.c
@@ -51,8 +51,6 @@ static int __pm_runtime_idle(struct device *dev)
51{ 51{
52 int retval = 0; 52 int retval = 0;
53 53
54 dev_dbg(dev, "__pm_runtime_idle()!\n");
55
56 if (dev->power.runtime_error) 54 if (dev->power.runtime_error)
57 retval = -EINVAL; 55 retval = -EINVAL;
58 else if (dev->power.idle_notification) 56 else if (dev->power.idle_notification)
@@ -93,8 +91,6 @@ static int __pm_runtime_idle(struct device *dev)
93 wake_up_all(&dev->power.wait_queue); 91 wake_up_all(&dev->power.wait_queue);
94 92
95 out: 93 out:
96 dev_dbg(dev, "__pm_runtime_idle() returns %d!\n", retval);
97
98 return retval; 94 return retval;
99} 95}
100 96
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c
index fb5be2d95d52..6399e5090df4 100644
--- a/drivers/block/cciss.c
+++ b/drivers/block/cciss.c
@@ -68,6 +68,12 @@ MODULE_SUPPORTED_DEVICE("HP SA5i SA5i+ SA532 SA5300 SA5312 SA641 SA642 SA6400"
68MODULE_VERSION("3.6.20"); 68MODULE_VERSION("3.6.20");
69MODULE_LICENSE("GPL"); 69MODULE_LICENSE("GPL");
70 70
71static int cciss_allow_hpsa;
72module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
73MODULE_PARM_DESC(cciss_allow_hpsa,
74 "Prevent cciss driver from accessing hardware known to be "
75 " supported by the hpsa driver");
76
71#include "cciss_cmd.h" 77#include "cciss_cmd.h"
72#include "cciss.h" 78#include "cciss.h"
73#include <linux/cciss_ioctl.h> 79#include <linux/cciss_ioctl.h>
@@ -101,8 +107,6 @@ static const struct pci_device_id cciss_pci_device_id[] = {
101 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, 107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A}, 108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324A},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B}, 109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324B},
104 {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID,
105 PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0},
106 {0,} 110 {0,}
107}; 111};
108 112
@@ -123,8 +127,6 @@ static struct board_type products[] = {
123 {0x409D0E11, "Smart Array 6400 EM", &SA5_access}, 127 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
124 {0x40910E11, "Smart Array 6i", &SA5_access}, 128 {0x40910E11, "Smart Array 6i", &SA5_access},
125 {0x3225103C, "Smart Array P600", &SA5_access}, 129 {0x3225103C, "Smart Array P600", &SA5_access},
126 {0x3223103C, "Smart Array P800", &SA5_access},
127 {0x3234103C, "Smart Array P400", &SA5_access},
128 {0x3235103C, "Smart Array P400i", &SA5_access}, 130 {0x3235103C, "Smart Array P400i", &SA5_access},
129 {0x3211103C, "Smart Array E200i", &SA5_access}, 131 {0x3211103C, "Smart Array E200i", &SA5_access},
130 {0x3212103C, "Smart Array E200", &SA5_access}, 132 {0x3212103C, "Smart Array E200", &SA5_access},
@@ -132,6 +134,10 @@ static struct board_type products[] = {
132 {0x3214103C, "Smart Array E200i", &SA5_access}, 134 {0x3214103C, "Smart Array E200i", &SA5_access},
133 {0x3215103C, "Smart Array E200i", &SA5_access}, 135 {0x3215103C, "Smart Array E200i", &SA5_access},
134 {0x3237103C, "Smart Array E500", &SA5_access}, 136 {0x3237103C, "Smart Array E500", &SA5_access},
137/* controllers below this line are also supported by the hpsa driver. */
138#define HPSA_BOUNDARY 0x3223103C
139 {0x3223103C, "Smart Array P800", &SA5_access},
140 {0x3234103C, "Smart Array P400", &SA5_access},
135 {0x323D103C, "Smart Array P700m", &SA5_access}, 141 {0x323D103C, "Smart Array P700m", &SA5_access},
136 {0x3241103C, "Smart Array P212", &SA5_access}, 142 {0x3241103C, "Smart Array P212", &SA5_access},
137 {0x3243103C, "Smart Array P410", &SA5_access}, 143 {0x3243103C, "Smart Array P410", &SA5_access},
@@ -140,7 +146,6 @@ static struct board_type products[] = {
140 {0x3249103C, "Smart Array P812", &SA5_access}, 146 {0x3249103C, "Smart Array P812", &SA5_access},
141 {0x324A103C, "Smart Array P712m", &SA5_access}, 147 {0x324A103C, "Smart Array P712m", &SA5_access},
142 {0x324B103C, "Smart Array P711m", &SA5_access}, 148 {0x324B103C, "Smart Array P711m", &SA5_access},
143 {0xFFFF103C, "Unknown Smart Array", &SA5_access},
144}; 149};
145 150
146/* How long to wait (in milliseconds) for board to go into simple mode */ 151/* How long to wait (in milliseconds) for board to go into simple mode */
@@ -3754,7 +3759,27 @@ static int __devinit cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
3754 __u64 cfg_offset; 3759 __u64 cfg_offset;
3755 __u32 cfg_base_addr; 3760 __u32 cfg_base_addr;
3756 __u64 cfg_base_addr_index; 3761 __u64 cfg_base_addr_index;
3757 int i, err; 3762 int i, prod_index, err;
3763
3764 subsystem_vendor_id = pdev->subsystem_vendor;
3765 subsystem_device_id = pdev->subsystem_device;
3766 board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) |
3767 subsystem_vendor_id);
3768
3769 for (i = 0; i < ARRAY_SIZE(products); i++) {
3770 /* Stand aside for hpsa driver on request */
3771 if (cciss_allow_hpsa && products[i].board_id == HPSA_BOUNDARY)
3772 return -ENODEV;
3773 if (board_id == products[i].board_id)
3774 break;
3775 }
3776 prod_index = i;
3777 if (prod_index == ARRAY_SIZE(products)) {
3778 dev_warn(&pdev->dev,
3779 "unrecognized board ID: 0x%08lx, ignoring.\n",
3780 (unsigned long) board_id);
3781 return -ENODEV;
3782 }
3758 3783
3759 /* check to see if controller has been disabled */ 3784 /* check to see if controller has been disabled */
3760 /* BEFORE trying to enable it */ 3785 /* BEFORE trying to enable it */
@@ -3778,11 +3803,6 @@ static int __devinit cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
3778 return err; 3803 return err;
3779 } 3804 }
3780 3805
3781 subsystem_vendor_id = pdev->subsystem_vendor;
3782 subsystem_device_id = pdev->subsystem_device;
3783 board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) |
3784 subsystem_vendor_id);
3785
3786#ifdef CCISS_DEBUG 3806#ifdef CCISS_DEBUG
3787 printk("command = %x\n", command); 3807 printk("command = %x\n", command);
3788 printk("irq = %x\n", pdev->irq); 3808 printk("irq = %x\n", pdev->irq);
@@ -3868,14 +3888,9 @@ static int __devinit cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
3868 * leave a little room for ioctl calls. 3888 * leave a little room for ioctl calls.
3869 */ 3889 */
3870 c->max_commands = readl(&(c->cfgtable->CmdsOutMax)); 3890 c->max_commands = readl(&(c->cfgtable->CmdsOutMax));
3871 for (i = 0; i < ARRAY_SIZE(products); i++) { 3891 c->product_name = products[prod_index].product_name;
3872 if (board_id == products[i].board_id) { 3892 c->access = *(products[prod_index].access);
3873 c->product_name = products[i].product_name; 3893 c->nr_cmds = c->max_commands - 4;
3874 c->access = *(products[i].access);
3875 c->nr_cmds = c->max_commands - 4;
3876 break;
3877 }
3878 }
3879 if ((readb(&c->cfgtable->Signature[0]) != 'C') || 3894 if ((readb(&c->cfgtable->Signature[0]) != 'C') ||
3880 (readb(&c->cfgtable->Signature[1]) != 'I') || 3895 (readb(&c->cfgtable->Signature[1]) != 'I') ||
3881 (readb(&c->cfgtable->Signature[2]) != 'S') || 3896 (readb(&c->cfgtable->Signature[2]) != 'S') ||
@@ -3884,27 +3899,6 @@ static int __devinit cciss_pci_init(ctlr_info_t *c, struct pci_dev *pdev)
3884 err = -ENODEV; 3899 err = -ENODEV;
3885 goto err_out_free_res; 3900 goto err_out_free_res;
3886 } 3901 }
3887 /* We didn't find the controller in our list. We know the
3888 * signature is valid. If it's an HP device let's try to
3889 * bind to the device and fire it up. Otherwise we bail.
3890 */
3891 if (i == ARRAY_SIZE(products)) {
3892 if (subsystem_vendor_id == PCI_VENDOR_ID_HP) {
3893 c->product_name = products[i-1].product_name;
3894 c->access = *(products[i-1].access);
3895 c->nr_cmds = c->max_commands - 4;
3896 printk(KERN_WARNING "cciss: This is an unknown "
3897 "Smart Array controller.\n"
3898 "cciss: Please update to the latest driver "
3899 "available from www.hp.com.\n");
3900 } else {
3901 printk(KERN_WARNING "cciss: Sorry, I don't know how"
3902 " to access the Smart Array controller %08lx\n"
3903 , (unsigned long)board_id);
3904 err = -ENODEV;
3905 goto err_out_free_res;
3906 }
3907 }
3908#ifdef CONFIG_X86 3902#ifdef CONFIG_X86
3909 { 3903 {
3910 /* Need to enable prefetch in the SCSI core for 6400 in x86 */ 3904 /* Need to enable prefetch in the SCSI core for 6400 in x86 */
@@ -4254,7 +4248,7 @@ static int __devinit cciss_init_one(struct pci_dev *pdev,
4254 mutex_init(&hba[i]->busy_shutting_down); 4248 mutex_init(&hba[i]->busy_shutting_down);
4255 4249
4256 if (cciss_pci_init(hba[i], pdev) != 0) 4250 if (cciss_pci_init(hba[i], pdev) != 0)
4257 goto clean0; 4251 goto clean_no_release_regions;
4258 4252
4259 sprintf(hba[i]->devname, "cciss%d", i); 4253 sprintf(hba[i]->devname, "cciss%d", i);
4260 hba[i]->ctlr = i; 4254 hba[i]->ctlr = i;
@@ -4391,13 +4385,14 @@ clean2:
4391clean1: 4385clean1:
4392 cciss_destroy_hba_sysfs_entry(hba[i]); 4386 cciss_destroy_hba_sysfs_entry(hba[i]);
4393clean0: 4387clean0:
4388 pci_release_regions(pdev);
4389clean_no_release_regions:
4394 hba[i]->busy_initializing = 0; 4390 hba[i]->busy_initializing = 0;
4395 4391
4396 /* 4392 /*
4397 * Deliberately omit pci_disable_device(): it does something nasty to 4393 * Deliberately omit pci_disable_device(): it does something nasty to
4398 * Smart Array controllers that pci_enable_device does not undo 4394 * Smart Array controllers that pci_enable_device does not undo
4399 */ 4395 */
4400 pci_release_regions(pdev);
4401 pci_set_drvdata(pdev, NULL); 4396 pci_set_drvdata(pdev, NULL);
4402 free_hba(i); 4397 free_hba(i);
4403 return -1; 4398 return -1;
diff --git a/drivers/block/loop.c b/drivers/block/loop.c
index edda9ea7c626..bd112c8c7bcd 100644
--- a/drivers/block/loop.c
+++ b/drivers/block/loop.c
@@ -949,7 +949,7 @@ static int loop_clr_fd(struct loop_device *lo, struct block_device *bdev)
949 lo->lo_state = Lo_unbound; 949 lo->lo_state = Lo_unbound;
950 /* This is safe: open() is still holding a reference. */ 950 /* This is safe: open() is still holding a reference. */
951 module_put(THIS_MODULE); 951 module_put(THIS_MODULE);
952 if (max_part > 0) 952 if (max_part > 0 && bdev)
953 ioctl_by_bdev(bdev, BLKRRPART, 0); 953 ioctl_by_bdev(bdev, BLKRRPART, 0);
954 mutex_unlock(&lo->lo_ctl_mutex); 954 mutex_unlock(&lo->lo_ctl_mutex);
955 /* 955 /*
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
index 43f19389647a..51042f0ba7e1 100644
--- a/drivers/block/virtio_blk.c
+++ b/drivers/block/virtio_blk.c
@@ -3,7 +3,6 @@
3#include <linux/blkdev.h> 3#include <linux/blkdev.h>
4#include <linux/hdreg.h> 4#include <linux/hdreg.h>
5#include <linux/virtio.h> 5#include <linux/virtio.h>
6#include <linux/virtio_ids.h>
7#include <linux/virtio_blk.h> 6#include <linux/virtio_blk.h>
8#include <linux/scatterlist.h> 7#include <linux/scatterlist.h>
9 8
@@ -183,34 +182,6 @@ static void do_virtblk_request(struct request_queue *q)
183 vblk->vq->vq_ops->kick(vblk->vq); 182 vblk->vq->vq_ops->kick(vblk->vq);
184} 183}
185 184
186/* return ATA identify data
187 */
188static int virtblk_identify(struct gendisk *disk, void *argp)
189{
190 struct virtio_blk *vblk = disk->private_data;
191 void *opaque;
192 int err = -ENOMEM;
193
194 opaque = kmalloc(VIRTIO_BLK_ID_BYTES, GFP_KERNEL);
195 if (!opaque)
196 goto out;
197
198 err = virtio_config_buf(vblk->vdev, VIRTIO_BLK_F_IDENTIFY,
199 offsetof(struct virtio_blk_config, identify), opaque,
200 VIRTIO_BLK_ID_BYTES);
201
202 if (err)
203 goto out_kfree;
204
205 if (copy_to_user(argp, opaque, VIRTIO_BLK_ID_BYTES))
206 err = -EFAULT;
207
208out_kfree:
209 kfree(opaque);
210out:
211 return err;
212}
213
214static void virtblk_prepare_flush(struct request_queue *q, struct request *req) 185static void virtblk_prepare_flush(struct request_queue *q, struct request *req)
215{ 186{
216 req->cmd_type = REQ_TYPE_LINUX_BLOCK; 187 req->cmd_type = REQ_TYPE_LINUX_BLOCK;
@@ -222,10 +193,6 @@ static int virtblk_ioctl(struct block_device *bdev, fmode_t mode,
222{ 193{
223 struct gendisk *disk = bdev->bd_disk; 194 struct gendisk *disk = bdev->bd_disk;
224 struct virtio_blk *vblk = disk->private_data; 195 struct virtio_blk *vblk = disk->private_data;
225 void __user *argp = (void __user *)data;
226
227 if (cmd == HDIO_GET_IDENTITY)
228 return virtblk_identify(disk, argp);
229 196
230 /* 197 /*
231 * Only allow the generic SCSI ioctls if the host can support it. 198 * Only allow the generic SCSI ioctls if the host can support it.
@@ -233,7 +200,8 @@ static int virtblk_ioctl(struct block_device *bdev, fmode_t mode,
233 if (!virtio_has_feature(vblk->vdev, VIRTIO_BLK_F_SCSI)) 200 if (!virtio_has_feature(vblk->vdev, VIRTIO_BLK_F_SCSI))
234 return -ENOTTY; 201 return -ENOTTY;
235 202
236 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd, argp); 203 return scsi_cmd_ioctl(disk->queue, disk, mode, cmd,
204 (void __user *)data);
237} 205}
238 206
239/* We provide getgeo only to please some old bootloader/partitioning tools */ 207/* We provide getgeo only to please some old bootloader/partitioning tools */
@@ -332,7 +300,6 @@ static int __devinit virtblk_probe(struct virtio_device *vdev)
332 } 300 }
333 301
334 vblk->disk->queue->queuedata = vblk; 302 vblk->disk->queue->queuedata = vblk;
335 queue_flag_set_unlocked(QUEUE_FLAG_VIRT, vblk->disk->queue);
336 303
337 if (index < 26) { 304 if (index < 26) {
338 sprintf(vblk->disk->disk_name, "vd%c", 'a' + index % 26); 305 sprintf(vblk->disk->disk_name, "vd%c", 'a' + index % 26);
@@ -445,7 +412,7 @@ static struct virtio_device_id id_table[] = {
445static unsigned int features[] = { 412static unsigned int features[] = {
446 VIRTIO_BLK_F_BARRIER, VIRTIO_BLK_F_SEG_MAX, VIRTIO_BLK_F_SIZE_MAX, 413 VIRTIO_BLK_F_BARRIER, VIRTIO_BLK_F_SEG_MAX, VIRTIO_BLK_F_SIZE_MAX,
447 VIRTIO_BLK_F_GEOMETRY, VIRTIO_BLK_F_RO, VIRTIO_BLK_F_BLK_SIZE, 414 VIRTIO_BLK_F_GEOMETRY, VIRTIO_BLK_F_RO, VIRTIO_BLK_F_BLK_SIZE,
448 VIRTIO_BLK_F_SCSI, VIRTIO_BLK_F_IDENTIFY, VIRTIO_BLK_F_FLUSH 415 VIRTIO_BLK_F_SCSI, VIRTIO_BLK_F_FLUSH
449}; 416};
450 417
451/* 418/*
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index 7ba91aa3fe8b..44bc8bbabf54 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -591,6 +591,7 @@ static int btusb_close(struct hci_dev *hdev)
591 return 0; 591 return 0;
592 592
593 cancel_work_sync(&data->work); 593 cancel_work_sync(&data->work);
594 cancel_work_sync(&data->waker);
594 595
595 clear_bit(BTUSB_ISOC_RUNNING, &data->flags); 596 clear_bit(BTUSB_ISOC_RUNNING, &data->flags);
596 clear_bit(BTUSB_BULK_RUNNING, &data->flags); 597 clear_bit(BTUSB_BULK_RUNNING, &data->flags);
@@ -599,11 +600,13 @@ static int btusb_close(struct hci_dev *hdev)
599 btusb_stop_traffic(data); 600 btusb_stop_traffic(data);
600 err = usb_autopm_get_interface(data->intf); 601 err = usb_autopm_get_interface(data->intf);
601 if (err < 0) 602 if (err < 0)
602 return 0; 603 goto failed;
603 604
604 data->intf->needs_remote_wakeup = 0; 605 data->intf->needs_remote_wakeup = 0;
605 usb_autopm_put_interface(data->intf); 606 usb_autopm_put_interface(data->intf);
606 607
608failed:
609 usb_scuttle_anchored_urbs(&data->deferred);
607 return 0; 610 return 0;
608} 611}
609 612
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index 08a6f50ae791..6aad99ec4e0f 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -323,7 +323,7 @@ config SPECIALIX
323 323
324config SX 324config SX
325 tristate "Specialix SX (and SI) card support" 325 tristate "Specialix SX (and SI) card support"
326 depends on SERIAL_NONSTANDARD && (PCI || EISA || ISA) 326 depends on SERIAL_NONSTANDARD && (PCI || EISA || ISA) && BROKEN
327 help 327 help
328 This is a driver for the SX and SI multiport serial cards. 328 This is a driver for the SX and SI multiport serial cards.
329 Please read the file <file:Documentation/serial/sx.txt> for details. 329 Please read the file <file:Documentation/serial/sx.txt> for details.
@@ -334,7 +334,7 @@ config SX
334 334
335config RIO 335config RIO
336 tristate "Specialix RIO system support" 336 tristate "Specialix RIO system support"
337 depends on SERIAL_NONSTANDARD 337 depends on SERIAL_NONSTANDARD && BROKEN
338 help 338 help
339 This is a driver for the Specialix RIO, a smart serial card which 339 This is a driver for the Specialix RIO, a smart serial card which
340 drives an outboard box that can support up to 128 ports. Product 340 drives an outboard box that can support up to 128 ports. Product
@@ -395,7 +395,7 @@ config NOZOMI
395 395
396config A2232 396config A2232
397 tristate "Commodore A2232 serial support (EXPERIMENTAL)" 397 tristate "Commodore A2232 serial support (EXPERIMENTAL)"
398 depends on EXPERIMENTAL && ZORRO && BROKEN_ON_SMP 398 depends on EXPERIMENTAL && ZORRO && BROKEN
399 ---help--- 399 ---help---
400 This option supports the 2232 7-port serial card shipped with the 400 This option supports the 2232 7-port serial card shipped with the
401 Amiga 2000 and other Zorro-bus machines, dating from 1989. At 401 Amiga 2000 and other Zorro-bus machines, dating from 1989. At
diff --git a/drivers/char/agp/intel-agp.c b/drivers/char/agp/intel-agp.c
index 4068467ce7b9..10e1f0390bbb 100644
--- a/drivers/char/agp/intel-agp.c
+++ b/drivers/char/agp/intel-agp.c
@@ -1161,12 +1161,6 @@ static int intel_i915_configure(void)
1161 1161
1162 intel_i9xx_setup_flush(); 1162 intel_i9xx_setup_flush();
1163 1163
1164#ifdef USE_PCI_DMA_API
1165 if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
1166 dev_err(&intel_private.pcidev->dev,
1167 "set gfx device dma mask 36bit failed!\n");
1168#endif
1169
1170 return 0; 1164 return 0;
1171} 1165}
1172 1166
@@ -2456,6 +2450,11 @@ static int __devinit agp_intel_probe(struct pci_dev *pdev,
2456 &bridge->mode); 2450 &bridge->mode);
2457 } 2451 }
2458 2452
2453 if (bridge->driver->mask_memory == intel_i965_mask_memory)
2454 if (pci_set_dma_mask(intel_private.pcidev, DMA_BIT_MASK(36)))
2455 dev_err(&intel_private.pcidev->dev,
2456 "set gfx device dma mask 36bit failed!\n");
2457
2459 pci_set_drvdata(pdev, bridge); 2458 pci_set_drvdata(pdev, bridge);
2460 return agp_add_bridge(bridge); 2459 return agp_add_bridge(bridge);
2461} 2460}
diff --git a/drivers/char/genrtc.c b/drivers/char/genrtc.c
index aac0985a572b..31e7c91c2d9d 100644
--- a/drivers/char/genrtc.c
+++ b/drivers/char/genrtc.c
@@ -43,6 +43,7 @@
43#define RTC_VERSION "1.07" 43#define RTC_VERSION "1.07"
44 44
45#include <linux/module.h> 45#include <linux/module.h>
46#include <linux/sched.h>
46#include <linux/errno.h> 47#include <linux/errno.h>
47#include <linux/miscdevice.h> 48#include <linux/miscdevice.h>
48#include <linux/fcntl.h> 49#include <linux/fcntl.h>
diff --git a/drivers/char/hvc_xen.c b/drivers/char/hvc_xen.c
index eba999f8598d..a6ee32b599a8 100644
--- a/drivers/char/hvc_xen.c
+++ b/drivers/char/hvc_xen.c
@@ -55,7 +55,7 @@ static inline void notify_daemon(void)
55 notify_remote_via_evtchn(xen_start_info->console.domU.evtchn); 55 notify_remote_via_evtchn(xen_start_info->console.domU.evtchn);
56} 56}
57 57
58static int write_console(uint32_t vtermno, const char *data, int len) 58static int __write_console(const char *data, int len)
59{ 59{
60 struct xencons_interface *intf = xencons_interface(); 60 struct xencons_interface *intf = xencons_interface();
61 XENCONS_RING_IDX cons, prod; 61 XENCONS_RING_IDX cons, prod;
@@ -76,6 +76,29 @@ static int write_console(uint32_t vtermno, const char *data, int len)
76 return sent; 76 return sent;
77} 77}
78 78
79static int write_console(uint32_t vtermno, const char *data, int len)
80{
81 int ret = len;
82
83 /*
84 * Make sure the whole buffer is emitted, polling if
85 * necessary. We don't ever want to rely on the hvc daemon
86 * because the most interesting console output is when the
87 * kernel is crippled.
88 */
89 while (len) {
90 int sent = __write_console(data, len);
91
92 data += sent;
93 len -= sent;
94
95 if (unlikely(len))
96 HYPERVISOR_sched_op(SCHEDOP_yield, NULL);
97 }
98
99 return ret;
100}
101
79static int read_console(uint32_t vtermno, char *buf, int len) 102static int read_console(uint32_t vtermno, char *buf, int len)
80{ 103{
81 struct xencons_interface *intf = xencons_interface(); 104 struct xencons_interface *intf = xencons_interface();
diff --git a/drivers/char/hw_random/virtio-rng.c b/drivers/char/hw_random/virtio-rng.c
index 962968f05b94..915157fcff98 100644
--- a/drivers/char/hw_random/virtio-rng.c
+++ b/drivers/char/hw_random/virtio-rng.c
@@ -21,7 +21,6 @@
21#include <linux/scatterlist.h> 21#include <linux/scatterlist.h>
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/virtio.h> 23#include <linux/virtio.h>
24#include <linux/virtio_ids.h>
25#include <linux/virtio_rng.h> 24#include <linux/virtio_rng.h>
26 25
27/* The host will fill any buffer we give it with sweet, sweet randomness. We 26/* The host will fill any buffer we give it with sweet, sweet randomness. We
@@ -117,7 +116,7 @@ static int virtrng_probe(struct virtio_device *vdev)
117 return 0; 116 return 0;
118} 117}
119 118
120static void virtrng_remove(struct virtio_device *vdev) 119static void __devexit virtrng_remove(struct virtio_device *vdev)
121{ 120{
122 vdev->config->reset(vdev); 121 vdev->config->reset(vdev);
123 hwrng_unregister(&virtio_hwrng); 122 hwrng_unregister(&virtio_hwrng);
diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c
index e0d0f8b2696b..bc4ab3e54550 100644
--- a/drivers/char/rtc.c
+++ b/drivers/char/rtc.c
@@ -74,6 +74,7 @@
74#include <linux/proc_fs.h> 74#include <linux/proc_fs.h>
75#include <linux/seq_file.h> 75#include <linux/seq_file.h>
76#include <linux/spinlock.h> 76#include <linux/spinlock.h>
77#include <linux/sched.h>
77#include <linux/sysctl.h> 78#include <linux/sysctl.h>
78#include <linux/wait.h> 79#include <linux/wait.h>
79#include <linux/bcd.h> 80#include <linux/bcd.h>
diff --git a/drivers/char/sonypi.c b/drivers/char/sonypi.c
index fd3dced97776..8c262aaf7c26 100644
--- a/drivers/char/sonypi.c
+++ b/drivers/char/sonypi.c
@@ -36,6 +36,7 @@
36 */ 36 */
37 37
38#include <linux/module.h> 38#include <linux/module.h>
39#include <linux/sched.h>
39#include <linux/input.h> 40#include <linux/input.h>
40#include <linux/pci.h> 41#include <linux/pci.h>
41#include <linux/init.h> 42#include <linux/init.h>
diff --git a/drivers/char/tty_buffer.c b/drivers/char/tty_buffer.c
index 3108991c5c8b..66fa4e10d76b 100644
--- a/drivers/char/tty_buffer.c
+++ b/drivers/char/tty_buffer.c
@@ -402,28 +402,26 @@ static void flush_to_ldisc(struct work_struct *work)
402 container_of(work, struct tty_struct, buf.work.work); 402 container_of(work, struct tty_struct, buf.work.work);
403 unsigned long flags; 403 unsigned long flags;
404 struct tty_ldisc *disc; 404 struct tty_ldisc *disc;
405 struct tty_buffer *tbuf, *head;
406 char *char_buf;
407 unsigned char *flag_buf;
408 405
409 disc = tty_ldisc_ref(tty); 406 disc = tty_ldisc_ref(tty);
410 if (disc == NULL) /* !TTY_LDISC */ 407 if (disc == NULL) /* !TTY_LDISC */
411 return; 408 return;
412 409
413 spin_lock_irqsave(&tty->buf.lock, flags); 410 spin_lock_irqsave(&tty->buf.lock, flags);
414 /* So we know a flush is running */ 411
415 set_bit(TTY_FLUSHING, &tty->flags); 412 if (!test_and_set_bit(TTY_FLUSHING, &tty->flags)) {
416 head = tty->buf.head; 413 struct tty_buffer *head;
417 if (head != NULL) { 414 while ((head = tty->buf.head) != NULL) {
418 tty->buf.head = NULL; 415 int count;
419 for (;;) { 416 char *char_buf;
420 int count = head->commit - head->read; 417 unsigned char *flag_buf;
418
419 count = head->commit - head->read;
421 if (!count) { 420 if (!count) {
422 if (head->next == NULL) 421 if (head->next == NULL)
423 break; 422 break;
424 tbuf = head; 423 tty->buf.head = head->next;
425 head = head->next; 424 tty_buffer_free(tty, head);
426 tty_buffer_free(tty, tbuf);
427 continue; 425 continue;
428 } 426 }
429 /* Ldisc or user is trying to flush the buffers 427 /* Ldisc or user is trying to flush the buffers
@@ -445,9 +443,9 @@ static void flush_to_ldisc(struct work_struct *work)
445 flag_buf, count); 443 flag_buf, count);
446 spin_lock_irqsave(&tty->buf.lock, flags); 444 spin_lock_irqsave(&tty->buf.lock, flags);
447 } 445 }
448 /* Restore the queue head */ 446 clear_bit(TTY_FLUSHING, &tty->flags);
449 tty->buf.head = head;
450 } 447 }
448
451 /* We may have a deferred request to flush the input buffer, 449 /* We may have a deferred request to flush the input buffer,
452 if so pull the chain under the lock and empty the queue */ 450 if so pull the chain under the lock and empty the queue */
453 if (test_bit(TTY_FLUSHPENDING, &tty->flags)) { 451 if (test_bit(TTY_FLUSHPENDING, &tty->flags)) {
@@ -455,7 +453,6 @@ static void flush_to_ldisc(struct work_struct *work)
455 clear_bit(TTY_FLUSHPENDING, &tty->flags); 453 clear_bit(TTY_FLUSHPENDING, &tty->flags);
456 wake_up(&tty->read_wait); 454 wake_up(&tty->read_wait);
457 } 455 }
458 clear_bit(TTY_FLUSHING, &tty->flags);
459 spin_unlock_irqrestore(&tty->buf.lock, flags); 456 spin_unlock_irqrestore(&tty->buf.lock, flags);
460 457
461 tty_ldisc_deref(disc); 458 tty_ldisc_deref(disc);
@@ -471,7 +468,7 @@ static void flush_to_ldisc(struct work_struct *work)
471 */ 468 */
472void tty_flush_to_ldisc(struct tty_struct *tty) 469void tty_flush_to_ldisc(struct tty_struct *tty)
473{ 470{
474 flush_to_ldisc(&tty->buf.work.work); 471 flush_delayed_work(&tty->buf.work);
475} 472}
476 473
477/** 474/**
diff --git a/drivers/char/tty_port.c b/drivers/char/tty_port.c
index a4bbb28f10be..2e8552dc5eda 100644
--- a/drivers/char/tty_port.c
+++ b/drivers/char/tty_port.c
@@ -221,6 +221,9 @@ int tty_port_block_til_ready(struct tty_port *port,
221 the port has just hung up or is in another error state */ 221 the port has just hung up or is in another error state */
222 if ((filp->f_flags & O_NONBLOCK) || 222 if ((filp->f_flags & O_NONBLOCK) ||
223 (tty->flags & (1 << TTY_IO_ERROR))) { 223 (tty->flags & (1 << TTY_IO_ERROR))) {
224 /* Indicate we are open */
225 if (tty->termios->c_cflag & CBAUD)
226 tty_port_raise_dtr_rts(port);
224 port->flags |= ASYNC_NORMAL_ACTIVE; 227 port->flags |= ASYNC_NORMAL_ACTIVE;
225 return 0; 228 return 0;
226 } 229 }
diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c
index 0d328b59568d..a035ae39a359 100644
--- a/drivers/char/virtio_console.c
+++ b/drivers/char/virtio_console.c
@@ -31,7 +31,6 @@
31#include <linux/err.h> 31#include <linux/err.h>
32#include <linux/init.h> 32#include <linux/init.h>
33#include <linux/virtio.h> 33#include <linux/virtio.h>
34#include <linux/virtio_ids.h>
35#include <linux/virtio_console.h> 34#include <linux/virtio_console.h>
36#include "hvc_console.h" 35#include "hvc_console.h"
37 36
diff --git a/drivers/char/vt_ioctl.c b/drivers/char/vt_ioctl.c
index 6b36ee56e6fe..6aa10284104a 100644
--- a/drivers/char/vt_ioctl.c
+++ b/drivers/char/vt_ioctl.c
@@ -103,8 +103,8 @@ void vt_event_post(unsigned int event, unsigned int old, unsigned int new)
103 ve->event.event = event; 103 ve->event.event = event;
104 /* kernel view is consoles 0..n-1, user space view is 104 /* kernel view is consoles 0..n-1, user space view is
105 console 1..n with 0 meaning current, so we must bias */ 105 console 1..n with 0 meaning current, so we must bias */
106 ve->event.old = old + 1; 106 ve->event.oldev = old + 1;
107 ve->event.new = new + 1; 107 ve->event.newev = new + 1;
108 wake = 1; 108 wake = 1;
109 ve->done = 1; 109 ve->done = 1;
110 } 110 }
@@ -186,7 +186,7 @@ int vt_waitactive(int n)
186 vt_event_wait(&vw); 186 vt_event_wait(&vw);
187 if (vw.done == 0) 187 if (vw.done == 0)
188 return -EINTR; 188 return -EINTR;
189 } while (vw.event.new != n); 189 } while (vw.event.newev != n);
190 return 0; 190 return 0;
191} 191}
192 192
@@ -1532,7 +1532,7 @@ long vt_compat_ioctl(struct tty_struct *tty, struct file * file,
1532 1532
1533 case PIO_UNIMAP: 1533 case PIO_UNIMAP:
1534 case GIO_UNIMAP: 1534 case GIO_UNIMAP:
1535 ret = do_unimap_ioctl(cmd, up, perm, vc); 1535 ret = compat_unimap_ioctl(cmd, up, perm, vc);
1536 break; 1536 break;
1537 1537
1538 /* 1538 /*
diff --git a/drivers/cpufreq/cpufreq.c b/drivers/cpufreq/cpufreq.c
index 3938c7817095..ff57c40e9b8b 100644
--- a/drivers/cpufreq/cpufreq.c
+++ b/drivers/cpufreq/cpufreq.c
@@ -41,7 +41,7 @@ static struct cpufreq_driver *cpufreq_driver;
41static DEFINE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_data); 41static DEFINE_PER_CPU(struct cpufreq_policy *, cpufreq_cpu_data);
42#ifdef CONFIG_HOTPLUG_CPU 42#ifdef CONFIG_HOTPLUG_CPU
43/* This one keeps track of the previously set governor of a removed CPU */ 43/* This one keeps track of the previously set governor of a removed CPU */
44static DEFINE_PER_CPU(struct cpufreq_governor *, cpufreq_cpu_governor); 44static DEFINE_PER_CPU(char[CPUFREQ_NAME_LEN], cpufreq_cpu_governor);
45#endif 45#endif
46static DEFINE_SPINLOCK(cpufreq_driver_lock); 46static DEFINE_SPINLOCK(cpufreq_driver_lock);
47 47
@@ -774,10 +774,12 @@ int cpufreq_add_dev_policy(unsigned int cpu, struct cpufreq_policy *policy,
774#ifdef CONFIG_SMP 774#ifdef CONFIG_SMP
775 unsigned long flags; 775 unsigned long flags;
776 unsigned int j; 776 unsigned int j;
777
778#ifdef CONFIG_HOTPLUG_CPU 777#ifdef CONFIG_HOTPLUG_CPU
779 if (per_cpu(cpufreq_cpu_governor, cpu)) { 778 struct cpufreq_governor *gov;
780 policy->governor = per_cpu(cpufreq_cpu_governor, cpu); 779
780 gov = __find_governor(per_cpu(cpufreq_cpu_governor, cpu));
781 if (gov) {
782 policy->governor = gov;
781 dprintk("Restoring governor %s for cpu %d\n", 783 dprintk("Restoring governor %s for cpu %d\n",
782 policy->governor->name, cpu); 784 policy->governor->name, cpu);
783 } 785 }
@@ -949,10 +951,13 @@ err_out_kobj_put:
949static int cpufreq_add_dev(struct sys_device *sys_dev) 951static int cpufreq_add_dev(struct sys_device *sys_dev)
950{ 952{
951 unsigned int cpu = sys_dev->id; 953 unsigned int cpu = sys_dev->id;
952 int ret = 0; 954 int ret = 0, found = 0;
953 struct cpufreq_policy *policy; 955 struct cpufreq_policy *policy;
954 unsigned long flags; 956 unsigned long flags;
955 unsigned int j; 957 unsigned int j;
958#ifdef CONFIG_HOTPLUG_CPU
959 int sibling;
960#endif
956 961
957 if (cpu_is_offline(cpu)) 962 if (cpu_is_offline(cpu))
958 return 0; 963 return 0;
@@ -999,7 +1004,19 @@ static int cpufreq_add_dev(struct sys_device *sys_dev)
999 INIT_WORK(&policy->update, handle_update); 1004 INIT_WORK(&policy->update, handle_update);
1000 1005
1001 /* Set governor before ->init, so that driver could check it */ 1006 /* Set governor before ->init, so that driver could check it */
1002 policy->governor = CPUFREQ_DEFAULT_GOVERNOR; 1007#ifdef CONFIG_HOTPLUG_CPU
1008 for_each_online_cpu(sibling) {
1009 struct cpufreq_policy *cp = per_cpu(cpufreq_cpu_data, sibling);
1010 if (cp && cp->governor &&
1011 (cpumask_test_cpu(cpu, cp->related_cpus))) {
1012 policy->governor = cp->governor;
1013 found = 1;
1014 break;
1015 }
1016 }
1017#endif
1018 if (!found)
1019 policy->governor = CPUFREQ_DEFAULT_GOVERNOR;
1003 /* call driver. From then on the cpufreq must be able 1020 /* call driver. From then on the cpufreq must be able
1004 * to accept all calls to ->verify and ->setpolicy for this CPU 1021 * to accept all calls to ->verify and ->setpolicy for this CPU
1005 */ 1022 */
@@ -1111,7 +1128,8 @@ static int __cpufreq_remove_dev(struct sys_device *sys_dev)
1111#ifdef CONFIG_SMP 1128#ifdef CONFIG_SMP
1112 1129
1113#ifdef CONFIG_HOTPLUG_CPU 1130#ifdef CONFIG_HOTPLUG_CPU
1114 per_cpu(cpufreq_cpu_governor, cpu) = data->governor; 1131 strncpy(per_cpu(cpufreq_cpu_governor, cpu), data->governor->name,
1132 CPUFREQ_NAME_LEN);
1115#endif 1133#endif
1116 1134
1117 /* if we have other CPUs still registered, we need to unlink them, 1135 /* if we have other CPUs still registered, we need to unlink them,
@@ -1135,7 +1153,8 @@ static int __cpufreq_remove_dev(struct sys_device *sys_dev)
1135 continue; 1153 continue;
1136 dprintk("removing link for cpu %u\n", j); 1154 dprintk("removing link for cpu %u\n", j);
1137#ifdef CONFIG_HOTPLUG_CPU 1155#ifdef CONFIG_HOTPLUG_CPU
1138 per_cpu(cpufreq_cpu_governor, j) = data->governor; 1156 strncpy(per_cpu(cpufreq_cpu_governor, j),
1157 data->governor->name, CPUFREQ_NAME_LEN);
1139#endif 1158#endif
1140 cpu_sys_dev = get_cpu_sysdev(j); 1159 cpu_sys_dev = get_cpu_sysdev(j);
1141 sysfs_remove_link(&cpu_sys_dev->kobj, "cpufreq"); 1160 sysfs_remove_link(&cpu_sys_dev->kobj, "cpufreq");
@@ -1606,9 +1625,22 @@ EXPORT_SYMBOL_GPL(cpufreq_register_governor);
1606 1625
1607void cpufreq_unregister_governor(struct cpufreq_governor *governor) 1626void cpufreq_unregister_governor(struct cpufreq_governor *governor)
1608{ 1627{
1628#ifdef CONFIG_HOTPLUG_CPU
1629 int cpu;
1630#endif
1631
1609 if (!governor) 1632 if (!governor)
1610 return; 1633 return;
1611 1634
1635#ifdef CONFIG_HOTPLUG_CPU
1636 for_each_present_cpu(cpu) {
1637 if (cpu_online(cpu))
1638 continue;
1639 if (!strcmp(per_cpu(cpufreq_cpu_governor, cpu), governor->name))
1640 strcpy(per_cpu(cpufreq_cpu_governor, cpu), "\0");
1641 }
1642#endif
1643
1612 mutex_lock(&cpufreq_governor_mutex); 1644 mutex_lock(&cpufreq_governor_mutex);
1613 list_del(&governor->governor_list); 1645 list_del(&governor->governor_list);
1614 mutex_unlock(&cpufreq_governor_mutex); 1646 mutex_unlock(&cpufreq_governor_mutex);
diff --git a/drivers/cpufreq/cpufreq_conservative.c b/drivers/cpufreq/cpufreq_conservative.c
index bc33ddc9c97c..c7b081b839ff 100644
--- a/drivers/cpufreq/cpufreq_conservative.c
+++ b/drivers/cpufreq/cpufreq_conservative.c
@@ -116,9 +116,9 @@ static inline cputime64_t get_cpu_idle_time_jiffy(unsigned int cpu,
116 116
117 idle_time = cputime64_sub(cur_wall_time, busy_time); 117 idle_time = cputime64_sub(cur_wall_time, busy_time);
118 if (wall) 118 if (wall)
119 *wall = cur_wall_time; 119 *wall = (cputime64_t)jiffies_to_usecs(cur_wall_time);
120 120
121 return idle_time; 121 return (cputime64_t)jiffies_to_usecs(idle_time);;
122} 122}
123 123
124static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) 124static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall)
diff --git a/drivers/cpufreq/cpufreq_ondemand.c b/drivers/cpufreq/cpufreq_ondemand.c
index 071699de50ee..4b34ade2332b 100644
--- a/drivers/cpufreq/cpufreq_ondemand.c
+++ b/drivers/cpufreq/cpufreq_ondemand.c
@@ -133,9 +133,9 @@ static inline cputime64_t get_cpu_idle_time_jiffy(unsigned int cpu,
133 133
134 idle_time = cputime64_sub(cur_wall_time, busy_time); 134 idle_time = cputime64_sub(cur_wall_time, busy_time);
135 if (wall) 135 if (wall)
136 *wall = cur_wall_time; 136 *wall = (cputime64_t)jiffies_to_usecs(cur_wall_time);
137 137
138 return idle_time; 138 return (cputime64_t)jiffies_to_usecs(idle_time);
139} 139}
140 140
141static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall) 141static inline cputime64_t get_cpu_idle_time(unsigned int cpu, cputime64_t *wall)
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index ad41f19b8e3f..12fdd3987a36 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -76,8 +76,11 @@ static void cpuidle_idle_call(void)
76#endif 76#endif
77 /* ask the governor for the next state */ 77 /* ask the governor for the next state */
78 next_state = cpuidle_curr_governor->select(dev); 78 next_state = cpuidle_curr_governor->select(dev);
79 if (need_resched()) 79 if (need_resched()) {
80 local_irq_enable();
80 return; 81 return;
82 }
83
81 target_state = &dev->states[next_state]; 84 target_state = &dev->states[next_state];
82 85
83 /* enter the state and update stats */ 86 /* enter the state and update stats */
diff --git a/drivers/crypto/padlock-sha.c b/drivers/crypto/padlock-sha.c
index 76cb6b345e7b..0af80577dc7b 100644
--- a/drivers/crypto/padlock-sha.c
+++ b/drivers/crypto/padlock-sha.c
@@ -24,6 +24,12 @@
24#include <asm/i387.h> 24#include <asm/i387.h>
25#include "padlock.h" 25#include "padlock.h"
26 26
27#ifdef CONFIG_64BIT
28#define STACK_ALIGN 16
29#else
30#define STACK_ALIGN 4
31#endif
32
27struct padlock_sha_desc { 33struct padlock_sha_desc {
28 struct shash_desc fallback; 34 struct shash_desc fallback;
29}; 35};
@@ -64,7 +70,9 @@ static int padlock_sha1_finup(struct shash_desc *desc, const u8 *in,
64 /* We can't store directly to *out as it may be unaligned. */ 70 /* We can't store directly to *out as it may be unaligned. */
65 /* BTW Don't reduce the buffer size below 128 Bytes! 71 /* BTW Don't reduce the buffer size below 128 Bytes!
66 * PadLock microcode needs it that big. */ 72 * PadLock microcode needs it that big. */
67 char result[128] __attribute__ ((aligned(PADLOCK_ALIGNMENT))); 73 char buf[128 + PADLOCK_ALIGNMENT - STACK_ALIGN] __attribute__
74 ((aligned(STACK_ALIGN)));
75 char *result = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);
68 struct padlock_sha_desc *dctx = shash_desc_ctx(desc); 76 struct padlock_sha_desc *dctx = shash_desc_ctx(desc);
69 struct sha1_state state; 77 struct sha1_state state;
70 unsigned int space; 78 unsigned int space;
@@ -128,7 +136,9 @@ static int padlock_sha256_finup(struct shash_desc *desc, const u8 *in,
128 /* We can't store directly to *out as it may be unaligned. */ 136 /* We can't store directly to *out as it may be unaligned. */
129 /* BTW Don't reduce the buffer size below 128 Bytes! 137 /* BTW Don't reduce the buffer size below 128 Bytes!
130 * PadLock microcode needs it that big. */ 138 * PadLock microcode needs it that big. */
131 char result[128] __attribute__ ((aligned(PADLOCK_ALIGNMENT))); 139 char buf[128 + PADLOCK_ALIGNMENT - STACK_ALIGN] __attribute__
140 ((aligned(STACK_ALIGN)));
141 char *result = PTR_ALIGN(&buf[0], PADLOCK_ALIGNMENT);
132 struct padlock_sha_desc *dctx = shash_desc_ctx(desc); 142 struct padlock_sha_desc *dctx = shash_desc_ctx(desc);
133 struct sha256_state state; 143 struct sha256_state state;
134 unsigned int space; 144 unsigned int space;
diff --git a/drivers/edac/amd64_edac.c b/drivers/edac/amd64_edac.c
index 4f4ac82382f7..a38831c82649 100644
--- a/drivers/edac/amd64_edac.c
+++ b/drivers/edac/amd64_edac.c
@@ -1122,7 +1122,7 @@ static void k8_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
1122 debugf0("Reading K8_DRAM_BASE_LOW failed\n"); 1122 debugf0("Reading K8_DRAM_BASE_LOW failed\n");
1123 1123
1124 /* Extract parts into separate data entries */ 1124 /* Extract parts into separate data entries */
1125 pvt->dram_base[dram] = ((u64) low & 0xFFFF0000) << 24; 1125 pvt->dram_base[dram] = ((u64) low & 0xFFFF0000) << 8;
1126 pvt->dram_IntlvEn[dram] = (low >> 8) & 0x7; 1126 pvt->dram_IntlvEn[dram] = (low >> 8) & 0x7;
1127 pvt->dram_rw_en[dram] = (low & 0x3); 1127 pvt->dram_rw_en[dram] = (low & 0x3);
1128 1128
@@ -1135,7 +1135,7 @@ static void k8_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
1135 * Extract parts into separate data entries. Limit is the HIGHEST memory 1135 * Extract parts into separate data entries. Limit is the HIGHEST memory
1136 * location of the region, so lower 24 bits need to be all ones 1136 * location of the region, so lower 24 bits need to be all ones
1137 */ 1137 */
1138 pvt->dram_limit[dram] = (((u64) low & 0xFFFF0000) << 24) | 0x00FFFFFF; 1138 pvt->dram_limit[dram] = (((u64) low & 0xFFFF0000) << 8) | 0x00FFFFFF;
1139 pvt->dram_IntlvSel[dram] = (low >> 8) & 0x7; 1139 pvt->dram_IntlvSel[dram] = (low >> 8) & 0x7;
1140 pvt->dram_DstNode[dram] = (low & 0x7); 1140 pvt->dram_DstNode[dram] = (low & 0x7);
1141} 1141}
@@ -1369,7 +1369,7 @@ static void f10_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
1369 pvt->dram_IntlvEn[dram] = (low_base >> 8) & 0x7; 1369 pvt->dram_IntlvEn[dram] = (low_base >> 8) & 0x7;
1370 1370
1371 pvt->dram_base[dram] = (((u64)high_base & 0x000000FF) << 40) | 1371 pvt->dram_base[dram] = (((u64)high_base & 0x000000FF) << 40) |
1372 (((u64)low_base & 0xFFFF0000) << 24); 1372 (((u64)low_base & 0xFFFF0000) << 8);
1373 1373
1374 low_offset = K8_DRAM_LIMIT_LOW + (dram << 3); 1374 low_offset = K8_DRAM_LIMIT_LOW + (dram << 3);
1375 high_offset = F10_DRAM_LIMIT_HIGH + (dram << 3); 1375 high_offset = F10_DRAM_LIMIT_HIGH + (dram << 3);
@@ -1391,7 +1391,7 @@ static void f10_read_dram_base_limit(struct amd64_pvt *pvt, int dram)
1391 * memory location of the region, so low 24 bits need to be all ones. 1391 * memory location of the region, so low 24 bits need to be all ones.
1392 */ 1392 */
1393 pvt->dram_limit[dram] = (((u64)high_limit & 0x000000FF) << 40) | 1393 pvt->dram_limit[dram] = (((u64)high_limit & 0x000000FF) << 40) |
1394 (((u64) low_limit & 0xFFFF0000) << 24) | 1394 (((u64) low_limit & 0xFFFF0000) << 8) |
1395 0x00FFFFFF; 1395 0x00FFFFFF;
1396} 1396}
1397 1397
@@ -2254,7 +2254,7 @@ static inline void __amd64_decode_bus_error(struct mem_ctl_info *mci,
2254{ 2254{
2255 u32 ec = ERROR_CODE(info->nbsl); 2255 u32 ec = ERROR_CODE(info->nbsl);
2256 u32 xec = EXT_ERROR_CODE(info->nbsl); 2256 u32 xec = EXT_ERROR_CODE(info->nbsl);
2257 int ecc_type = info->nbsh & (0x3 << 13); 2257 int ecc_type = (info->nbsh >> 13) & 0x3;
2258 2258
2259 /* Bail early out if this was an 'observed' error */ 2259 /* Bail early out if this was an 'observed' error */
2260 if (PP(ec) == K8_NBSL_PP_OBS) 2260 if (PP(ec) == K8_NBSL_PP_OBS)
@@ -3163,7 +3163,7 @@ static int __init amd64_edac_init(void)
3163 opstate_init(); 3163 opstate_init();
3164 3164
3165 if (cache_k8_northbridges() < 0) 3165 if (cache_k8_northbridges() < 0)
3166 goto err_exit; 3166 return err;
3167 3167
3168 err = pci_register_driver(&amd64_pci_driver); 3168 err = pci_register_driver(&amd64_pci_driver);
3169 if (err) 3169 if (err)
@@ -3189,8 +3189,6 @@ static int __init amd64_edac_init(void)
3189 3189
3190err_2nd_stage: 3190err_2nd_stage:
3191 debugf0("2nd stage failed\n"); 3191 debugf0("2nd stage failed\n");
3192
3193err_exit:
3194 pci_unregister_driver(&amd64_pci_driver); 3192 pci_unregister_driver(&amd64_pci_driver);
3195 3193
3196 return err; 3194 return err;
diff --git a/drivers/edac/i5000_edac.c b/drivers/edac/i5000_edac.c
index d335086f4a26..77a9579d7167 100644
--- a/drivers/edac/i5000_edac.c
+++ b/drivers/edac/i5000_edac.c
@@ -1173,7 +1173,7 @@ static void i5000_get_mc_regs(struct mem_ctl_info *mci)
1173 pci_read_config_word(pvt->branch_1, where, 1173 pci_read_config_word(pvt->branch_1, where,
1174 &pvt->b1_mtr[slot_row]); 1174 &pvt->b1_mtr[slot_row]);
1175 debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row, 1175 debugf2("MTR%d where=0x%x B1 value=0x%x\n", slot_row,
1176 where, pvt->b0_mtr[slot_row]); 1176 where, pvt->b1_mtr[slot_row]);
1177 } else { 1177 } else {
1178 pvt->b1_mtr[slot_row] = 0; 1178 pvt->b1_mtr[slot_row] = 0;
1179 } 1179 }
@@ -1232,7 +1232,7 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)
1232 struct csrow_info *p_csrow; 1232 struct csrow_info *p_csrow;
1233 int empty, channel_count; 1233 int empty, channel_count;
1234 int max_csrows; 1234 int max_csrows;
1235 int mtr; 1235 int mtr, mtr1;
1236 int csrow_megs; 1236 int csrow_megs;
1237 int channel; 1237 int channel;
1238 int csrow; 1238 int csrow;
@@ -1251,9 +1251,10 @@ static int i5000_init_csrows(struct mem_ctl_info *mci)
1251 1251
1252 /* use branch 0 for the basis */ 1252 /* use branch 0 for the basis */
1253 mtr = pvt->b0_mtr[csrow >> 1]; 1253 mtr = pvt->b0_mtr[csrow >> 1];
1254 mtr1 = pvt->b1_mtr[csrow >> 1];
1254 1255
1255 /* if no DIMMS on this row, continue */ 1256 /* if no DIMMS on this row, continue */
1256 if (!MTR_DIMMS_PRESENT(mtr)) 1257 if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1))
1257 continue; 1258 continue;
1258 1259
1259 /* FAKE OUT VALUES, FIXME */ 1260 /* FAKE OUT VALUES, FIXME */
diff --git a/drivers/edac/i5400_edac.c b/drivers/edac/i5400_edac.c
index b08b6d8e2dc7..f99d10655ed4 100644
--- a/drivers/edac/i5400_edac.c
+++ b/drivers/edac/i5400_edac.c
@@ -46,9 +46,10 @@
46/* Limits for i5400 */ 46/* Limits for i5400 */
47#define NUM_MTRS_PER_BRANCH 4 47#define NUM_MTRS_PER_BRANCH 4
48#define CHANNELS_PER_BRANCH 2 48#define CHANNELS_PER_BRANCH 2
49#define MAX_DIMMS_PER_CHANNEL NUM_MTRS_PER_BRANCH
49#define MAX_CHANNELS 4 50#define MAX_CHANNELS 4
50#define MAX_DIMMS (MAX_CHANNELS * 4) /* Up to 4 DIMM's per channel */ 51/* max possible csrows per channel */
51#define MAX_CSROWS (MAX_DIMMS * 2) /* max possible csrows per channel */ 52#define MAX_CSROWS (MAX_DIMMS_PER_CHANNEL)
52 53
53/* Device 16, 54/* Device 16,
54 * Function 0: System Address 55 * Function 0: System Address
@@ -331,7 +332,6 @@ static const struct i5400_dev_info i5400_devs[] = {
331 332
332struct i5400_dimm_info { 333struct i5400_dimm_info {
333 int megabytes; /* size, 0 means not present */ 334 int megabytes; /* size, 0 means not present */
334 int dual_rank;
335}; 335};
336 336
337/* driver private data structure */ 337/* driver private data structure */
@@ -849,11 +849,9 @@ static int determine_mtr(struct i5400_pvt *pvt, int csrow, int channel)
849 int n; 849 int n;
850 850
851 /* There is one MTR for each slot pair of FB-DIMMs, 851 /* There is one MTR for each slot pair of FB-DIMMs,
852 Each slot may have one or two ranks (2 csrows),
853 Each slot pair may be at branch 0 or branch 1. 852 Each slot pair may be at branch 0 or branch 1.
854 So, csrow should be divided by eight
855 */ 853 */
856 n = csrow >> 3; 854 n = csrow;
857 855
858 if (n >= NUM_MTRS_PER_BRANCH) { 856 if (n >= NUM_MTRS_PER_BRANCH) {
859 debugf0("ERROR: trying to access an invalid csrow: %d\n", 857 debugf0("ERROR: trying to access an invalid csrow: %d\n",
@@ -905,25 +903,22 @@ static void handle_channel(struct i5400_pvt *pvt, int csrow, int channel,
905 amb_present_reg = determine_amb_present_reg(pvt, channel); 903 amb_present_reg = determine_amb_present_reg(pvt, channel);
906 904
907 /* Determine if there is a DIMM present in this DIMM slot */ 905 /* Determine if there is a DIMM present in this DIMM slot */
908 if (amb_present_reg & (1 << (csrow >> 1))) { 906 if (amb_present_reg & (1 << csrow)) {
909 dinfo->dual_rank = MTR_DIMM_RANK(mtr); 907 /* Start with the number of bits for a Bank
910 908 * on the DRAM */
911 if (!((dinfo->dual_rank == 0) && 909 addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr);
912 ((csrow & 0x1) == 0x1))) { 910 /* Add thenumber of ROW bits */
913 /* Start with the number of bits for a Bank 911 addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr);
914 * on the DRAM */ 912 /* add the number of COLUMN bits */
915 addrBits = MTR_DRAM_BANKS_ADDR_BITS(mtr); 913 addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr);
916 /* Add thenumber of ROW bits */ 914 /* add the number of RANK bits */
917 addrBits += MTR_DIMM_ROWS_ADDR_BITS(mtr); 915 addrBits += MTR_DIMM_RANK(mtr);
918 /* add the number of COLUMN bits */ 916
919 addrBits += MTR_DIMM_COLS_ADDR_BITS(mtr); 917 addrBits += 6; /* add 64 bits per DIMM */
920 918 addrBits -= 20; /* divide by 2^^20 */
921 addrBits += 6; /* add 64 bits per DIMM */ 919 addrBits -= 3; /* 8 bits per bytes */
922 addrBits -= 20; /* divide by 2^^20 */ 920
923 addrBits -= 3; /* 8 bits per bytes */ 921 dinfo->megabytes = 1 << addrBits;
924
925 dinfo->megabytes = 1 << addrBits;
926 }
927 } 922 }
928 } 923 }
929} 924}
@@ -951,12 +946,12 @@ static void calculate_dimm_size(struct i5400_pvt *pvt)
951 return; 946 return;
952 } 947 }
953 948
954 /* Scan all the actual CSROWS (which is # of DIMMS * 2) 949 /* Scan all the actual CSROWS
955 * and calculate the information for each DIMM 950 * and calculate the information for each DIMM
956 * Start with the highest csrow first, to display it first 951 * Start with the highest csrow first, to display it first
957 * and work toward the 0th csrow 952 * and work toward the 0th csrow
958 */ 953 */
959 max_csrows = pvt->maxdimmperch * 2; 954 max_csrows = pvt->maxdimmperch;
960 for (csrow = max_csrows - 1; csrow >= 0; csrow--) { 955 for (csrow = max_csrows - 1; csrow >= 0; csrow--) {
961 956
962 /* on an odd csrow, first output a 'boundary' marker, 957 /* on an odd csrow, first output a 'boundary' marker,
@@ -1064,7 +1059,7 @@ static void i5400_get_mc_regs(struct mem_ctl_info *mci)
1064 1059
1065 /* Get the set of MTR[0-3] regs by each branch */ 1060 /* Get the set of MTR[0-3] regs by each branch */
1066 for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) { 1061 for (slot_row = 0; slot_row < NUM_MTRS_PER_BRANCH; slot_row++) {
1067 int where = MTR0 + (slot_row * sizeof(u32)); 1062 int where = MTR0 + (slot_row * sizeof(u16));
1068 1063
1069 /* Branch 0 set of MTR registers */ 1064 /* Branch 0 set of MTR registers */
1070 pci_read_config_word(pvt->branch_0, where, 1065 pci_read_config_word(pvt->branch_0, where,
@@ -1146,7 +1141,7 @@ static int i5400_init_csrows(struct mem_ctl_info *mci)
1146 pvt = mci->pvt_info; 1141 pvt = mci->pvt_info;
1147 1142
1148 channel_count = pvt->maxch; 1143 channel_count = pvt->maxch;
1149 max_csrows = pvt->maxdimmperch * 2; 1144 max_csrows = pvt->maxdimmperch;
1150 1145
1151 empty = 1; /* Assume NO memory */ 1146 empty = 1; /* Assume NO memory */
1152 1147
@@ -1215,28 +1210,6 @@ static void i5400_enable_error_reporting(struct mem_ctl_info *mci)
1215} 1210}
1216 1211
1217/* 1212/*
1218 * i5400_get_dimm_and_channel_counts(pdev, &num_csrows, &num_channels)
1219 *
1220 * ask the device how many channels are present and how many CSROWS
1221 * as well
1222 */
1223static void i5400_get_dimm_and_channel_counts(struct pci_dev *pdev,
1224 int *num_dimms_per_channel,
1225 int *num_channels)
1226{
1227 u8 value;
1228
1229 /* Need to retrieve just how many channels and dimms per channel are
1230 * supported on this memory controller
1231 */
1232 pci_read_config_byte(pdev, MAXDIMMPERCH, &value);
1233 *num_dimms_per_channel = (int)value * 2;
1234
1235 pci_read_config_byte(pdev, MAXCH, &value);
1236 *num_channels = (int)value;
1237}
1238
1239/*
1240 * i5400_probe1 Probe for ONE instance of device to see if it is 1213 * i5400_probe1 Probe for ONE instance of device to see if it is
1241 * present. 1214 * present.
1242 * return: 1215 * return:
@@ -1263,22 +1236,16 @@ static int i5400_probe1(struct pci_dev *pdev, int dev_idx)
1263 if (PCI_FUNC(pdev->devfn) != 0) 1236 if (PCI_FUNC(pdev->devfn) != 0)
1264 return -ENODEV; 1237 return -ENODEV;
1265 1238
1266 /* Ask the devices for the number of CSROWS and CHANNELS so 1239 /* As we don't have a motherboard identification routine to determine
1267 * that we can calculate the memory resources, etc
1268 *
1269 * The Chipset will report what it can handle which will be greater
1270 * or equal to what the motherboard manufacturer will implement.
1271 *
1272 * As we don't have a motherboard identification routine to determine
1273 * actual number of slots/dimms per channel, we thus utilize the 1240 * actual number of slots/dimms per channel, we thus utilize the
1274 * resource as specified by the chipset. Thus, we might have 1241 * resource as specified by the chipset. Thus, we might have
1275 * have more DIMMs per channel than actually on the mobo, but this 1242 * have more DIMMs per channel than actually on the mobo, but this
1276 * allows the driver to support upto the chipset max, without 1243 * allows the driver to support upto the chipset max, without
1277 * some fancy mobo determination. 1244 * some fancy mobo determination.
1278 */ 1245 */
1279 i5400_get_dimm_and_channel_counts(pdev, &num_dimms_per_channel, 1246 num_dimms_per_channel = MAX_DIMMS_PER_CHANNEL;
1280 &num_channels); 1247 num_channels = MAX_CHANNELS;
1281 num_csrows = num_dimms_per_channel * 2; 1248 num_csrows = num_dimms_per_channel;
1282 1249
1283 debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n", 1250 debugf0("MC: %s(): Number of - Channels= %d DIMMS= %d CSROWS= %d\n",
1284 __func__, num_channels, num_dimms_per_channel, num_csrows); 1251 __func__, num_channels, num_dimms_per_channel, num_csrows);
diff --git a/drivers/edac/mpc85xx_edac.c b/drivers/edac/mpc85xx_edac.c
index 157f6504f25e..cf27402af97b 100644
--- a/drivers/edac/mpc85xx_edac.c
+++ b/drivers/edac/mpc85xx_edac.c
@@ -26,7 +26,9 @@
26#include "mpc85xx_edac.h" 26#include "mpc85xx_edac.h"
27 27
28static int edac_dev_idx; 28static int edac_dev_idx;
29#ifdef CONFIG_PCI
29static int edac_pci_idx; 30static int edac_pci_idx;
31#endif
30static int edac_mc_idx; 32static int edac_mc_idx;
31 33
32static u32 orig_ddr_err_disable; 34static u32 orig_ddr_err_disable;
diff --git a/drivers/firewire/sbp2.c b/drivers/firewire/sbp2.c
index 50f0176de615..98dbbda3ad41 100644
--- a/drivers/firewire/sbp2.c
+++ b/drivers/firewire/sbp2.c
@@ -188,14 +188,7 @@ static struct fw_device *target_device(struct sbp2_target *tgt)
188/* Impossible login_id, to detect logout attempt before successful login */ 188/* Impossible login_id, to detect logout attempt before successful login */
189#define INVALID_LOGIN_ID 0x10000 189#define INVALID_LOGIN_ID 0x10000
190 190
191/* 191#define SBP2_ORB_TIMEOUT 2000U /* Timeout in ms */
192 * Per section 7.4.8 of the SBP-2 spec, a mgt_ORB_timeout value can be
193 * provided in the config rom. Most devices do provide a value, which
194 * we'll use for login management orbs, but with some sane limits.
195 */
196#define SBP2_MIN_LOGIN_ORB_TIMEOUT 5000U /* Timeout in ms */
197#define SBP2_MAX_LOGIN_ORB_TIMEOUT 40000U /* Timeout in ms */
198#define SBP2_ORB_TIMEOUT 2000U /* Timeout in ms */
199#define SBP2_ORB_NULL 0x80000000 192#define SBP2_ORB_NULL 0x80000000
200#define SBP2_RETRY_LIMIT 0xf /* 15 retries */ 193#define SBP2_RETRY_LIMIT 0xf /* 15 retries */
201#define SBP2_CYCLE_LIMIT (0xc8 << 12) /* 200 125us cycles */ 194#define SBP2_CYCLE_LIMIT (0xc8 << 12) /* 200 125us cycles */
@@ -1034,7 +1027,6 @@ static int sbp2_scan_unit_dir(struct sbp2_target *tgt, u32 *directory,
1034{ 1027{
1035 struct fw_csr_iterator ci; 1028 struct fw_csr_iterator ci;
1036 int key, value; 1029 int key, value;
1037 unsigned int timeout;
1038 1030
1039 fw_csr_iterator_init(&ci, directory); 1031 fw_csr_iterator_init(&ci, directory);
1040 while (fw_csr_iterator_next(&ci, &key, &value)) { 1032 while (fw_csr_iterator_next(&ci, &key, &value)) {
@@ -1059,17 +1051,7 @@ static int sbp2_scan_unit_dir(struct sbp2_target *tgt, u32 *directory,
1059 1051
1060 case SBP2_CSR_UNIT_CHARACTERISTICS: 1052 case SBP2_CSR_UNIT_CHARACTERISTICS:
1061 /* the timeout value is stored in 500ms units */ 1053 /* the timeout value is stored in 500ms units */
1062 timeout = ((unsigned int) value >> 8 & 0xff) * 500; 1054 tgt->mgt_orb_timeout = (value >> 8 & 0xff) * 500;
1063 timeout = max(timeout, SBP2_MIN_LOGIN_ORB_TIMEOUT);
1064 tgt->mgt_orb_timeout =
1065 min(timeout, SBP2_MAX_LOGIN_ORB_TIMEOUT);
1066
1067 if (timeout > tgt->mgt_orb_timeout)
1068 fw_notify("%s: config rom contains %ds "
1069 "management ORB timeout, limiting "
1070 "to %ds\n", tgt->bus_id,
1071 timeout / 1000,
1072 tgt->mgt_orb_timeout / 1000);
1073 break; 1055 break;
1074 1056
1075 case SBP2_CSR_LOGICAL_UNIT_NUMBER: 1057 case SBP2_CSR_LOGICAL_UNIT_NUMBER:
@@ -1087,6 +1069,22 @@ static int sbp2_scan_unit_dir(struct sbp2_target *tgt, u32 *directory,
1087 return 0; 1069 return 0;
1088} 1070}
1089 1071
1072/*
1073 * Per section 7.4.8 of the SBP-2 spec, a mgt_ORB_timeout value can be
1074 * provided in the config rom. Most devices do provide a value, which
1075 * we'll use for login management orbs, but with some sane limits.
1076 */
1077static void sbp2_clamp_management_orb_timeout(struct sbp2_target *tgt)
1078{
1079 unsigned int timeout = tgt->mgt_orb_timeout;
1080
1081 if (timeout > 40000)
1082 fw_notify("%s: %ds mgt_ORB_timeout limited to 40s\n",
1083 tgt->bus_id, timeout / 1000);
1084
1085 tgt->mgt_orb_timeout = clamp_val(timeout, 5000, 40000);
1086}
1087
1090static void sbp2_init_workarounds(struct sbp2_target *tgt, u32 model, 1088static void sbp2_init_workarounds(struct sbp2_target *tgt, u32 model,
1091 u32 firmware_revision) 1089 u32 firmware_revision)
1092{ 1090{
@@ -1171,6 +1169,7 @@ static int sbp2_probe(struct device *dev)
1171 &firmware_revision) < 0) 1169 &firmware_revision) < 0)
1172 goto fail_tgt_put; 1170 goto fail_tgt_put;
1173 1171
1172 sbp2_clamp_management_orb_timeout(tgt);
1174 sbp2_init_workarounds(tgt, model, firmware_revision); 1173 sbp2_init_workarounds(tgt, model, firmware_revision);
1175 1174
1176 /* 1175 /*
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index 662ed923d9eb..50de0f5750d8 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -661,7 +661,7 @@ int gpio_export(unsigned gpio, bool direction_may_change)
661 661
662 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0), 662 dev = device_create(&gpio_class, desc->chip->dev, MKDEV(0, 0),
663 desc, ioname ? ioname : "gpio%d", gpio); 663 desc, ioname ? ioname : "gpio%d", gpio);
664 if (dev) { 664 if (!IS_ERR(dev)) {
665 if (direction_may_change) 665 if (direction_may_change)
666 status = sysfs_create_group(&dev->kobj, 666 status = sysfs_create_group(&dev->kobj,
667 &gpio_attr_group); 667 &gpio_attr_group);
@@ -679,7 +679,7 @@ int gpio_export(unsigned gpio, bool direction_may_change)
679 if (status != 0) 679 if (status != 0)
680 device_unregister(dev); 680 device_unregister(dev);
681 } else 681 } else
682 status = -ENODEV; 682 status = PTR_ERR(dev);
683 if (status == 0) 683 if (status == 0)
684 set_bit(FLAG_EXPORT, &desc->flags); 684 set_bit(FLAG_EXPORT, &desc->flags);
685 } 685 }
@@ -800,11 +800,11 @@ static int gpiochip_export(struct gpio_chip *chip)
800 mutex_lock(&sysfs_lock); 800 mutex_lock(&sysfs_lock);
801 dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip, 801 dev = device_create(&gpio_class, chip->dev, MKDEV(0, 0), chip,
802 "gpiochip%d", chip->base); 802 "gpiochip%d", chip->base);
803 if (dev) { 803 if (!IS_ERR(dev)) {
804 status = sysfs_create_group(&dev->kobj, 804 status = sysfs_create_group(&dev->kobj,
805 &gpiochip_attr_group); 805 &gpiochip_attr_group);
806 } else 806 } else
807 status = -ENODEV; 807 status = PTR_ERR(dev);
808 chip->exported = (status == 0); 808 chip->exported = (status == 0);
809 mutex_unlock(&sysfs_lock); 809 mutex_unlock(&sysfs_lock);
810 810
diff --git a/drivers/gpio/twl4030-gpio.c b/drivers/gpio/twl4030-gpio.c
index afad14792141..49384a7c5492 100644
--- a/drivers/gpio/twl4030-gpio.c
+++ b/drivers/gpio/twl4030-gpio.c
@@ -460,7 +460,8 @@ no_irqs:
460 return ret; 460 return ret;
461} 461}
462 462
463static int __devexit gpio_twl4030_remove(struct platform_device *pdev) 463/* Cannot use __devexit as gpio_twl4030_probe() calls us */
464static int gpio_twl4030_remove(struct platform_device *pdev)
464{ 465{
465 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data; 466 struct twl4030_gpio_platform_data *pdata = pdev->dev.platform_data;
466 int status; 467 int status;
@@ -493,7 +494,7 @@ static struct platform_driver gpio_twl4030_driver = {
493 .driver.name = "twl4030_gpio", 494 .driver.name = "twl4030_gpio",
494 .driver.owner = THIS_MODULE, 495 .driver.owner = THIS_MODULE,
495 .probe = gpio_twl4030_probe, 496 .probe = gpio_twl4030_probe,
496 .remove = __devexit_p(gpio_twl4030_remove), 497 .remove = gpio_twl4030_remove,
497}; 498};
498 499
499static int __init gpio_twl4030_init(void) 500static int __init gpio_twl4030_init(void)
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 1fe4e1d344fd..bbfd110a7168 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -331,6 +331,7 @@ create_mode:
331 cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60, 331 cmdline_mode->refresh_specified ? cmdline_mode->refresh : 60,
332 cmdline_mode->rb, cmdline_mode->interlace, 332 cmdline_mode->rb, cmdline_mode->interlace,
333 cmdline_mode->margins); 333 cmdline_mode->margins);
334 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
334 list_add(&mode->head, &connector->modes); 335 list_add(&mode->head, &connector->modes);
335 return mode; 336 return mode;
336} 337}
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 3c0d2b3aed76..cea665d86dd3 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -626,6 +626,12 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
626 return NULL; 626 return NULL;
627 } 627 }
628 628
629 /* it is incorrect if hsync/vsync width is zero */
630 if (!hsync_pulse_width || !vsync_pulse_width) {
631 DRM_DEBUG_KMS("Incorrect Detailed timing. "
632 "Wrong Hsync/Vsync pulse width\n");
633 return NULL;
634 }
629 mode = drm_mode_create(dev); 635 mode = drm_mode_create(dev);
630 if (!mode) 636 if (!mode)
631 return NULL; 637 return NULL;
@@ -647,6 +653,15 @@ static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
647 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 653 mode->vsync_end = mode->vsync_start + vsync_pulse_width;
648 mode->vtotal = mode->vdisplay + vblank; 654 mode->vtotal = mode->vdisplay + vblank;
649 655
656 /* perform the basic check for the detailed timing */
657 if (mode->hsync_end > mode->htotal ||
658 mode->vsync_end > mode->vtotal) {
659 drm_mode_destroy(dev, mode);
660 DRM_DEBUG_KMS("Incorrect detailed timing. "
661 "Sync is beyond the blank.\n");
662 return NULL;
663 }
664
650 drm_mode_set_name(mode); 665 drm_mode_set_name(mode);
651 666
652 if (pt->misc & DRM_EDID_PT_INTERLACED) 667 if (pt->misc & DRM_EDID_PT_INTERLACED)
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 23dc9c115fd9..dc8e374a0b55 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -454,22 +454,39 @@ out_free:
454} 454}
455EXPORT_SYMBOL(drm_fb_helper_init_crtc_count); 455EXPORT_SYMBOL(drm_fb_helper_init_crtc_count);
456 456
457static void setcolreg(struct drm_crtc *crtc, u16 red, u16 green, 457static int setcolreg(struct drm_crtc *crtc, u16 red, u16 green,
458 u16 blue, u16 regno, struct fb_info *info) 458 u16 blue, u16 regno, struct fb_info *info)
459{ 459{
460 struct drm_fb_helper *fb_helper = info->par; 460 struct drm_fb_helper *fb_helper = info->par;
461 struct drm_framebuffer *fb = fb_helper->fb; 461 struct drm_framebuffer *fb = fb_helper->fb;
462 int pindex; 462 int pindex;
463 463
464 if (info->fix.visual == FB_VISUAL_TRUECOLOR) {
465 u32 *palette;
466 u32 value;
467 /* place color in psuedopalette */
468 if (regno > 16)
469 return -EINVAL;
470 palette = (u32 *)info->pseudo_palette;
471 red >>= (16 - info->var.red.length);
472 green >>= (16 - info->var.green.length);
473 blue >>= (16 - info->var.blue.length);
474 value = (red << info->var.red.offset) |
475 (green << info->var.green.offset) |
476 (blue << info->var.blue.offset);
477 palette[regno] = value;
478 return 0;
479 }
480
464 pindex = regno; 481 pindex = regno;
465 482
466 if (fb->bits_per_pixel == 16) { 483 if (fb->bits_per_pixel == 16) {
467 pindex = regno << 3; 484 pindex = regno << 3;
468 485
469 if (fb->depth == 16 && regno > 63) 486 if (fb->depth == 16 && regno > 63)
470 return; 487 return -EINVAL;
471 if (fb->depth == 15 && regno > 31) 488 if (fb->depth == 15 && regno > 31)
472 return; 489 return -EINVAL;
473 490
474 if (fb->depth == 16) { 491 if (fb->depth == 16) {
475 u16 r, g, b; 492 u16 r, g, b;
@@ -493,13 +510,7 @@ static void setcolreg(struct drm_crtc *crtc, u16 red, u16 green,
493 510
494 if (fb->depth != 16) 511 if (fb->depth != 16)
495 fb_helper->funcs->gamma_set(crtc, red, green, blue, pindex); 512 fb_helper->funcs->gamma_set(crtc, red, green, blue, pindex);
496 513 return 0;
497 if (regno < 16 && info->fix.visual == FB_VISUAL_DIRECTCOLOR) {
498 ((u32 *) fb->pseudo_palette)[regno] =
499 (regno << info->var.red.offset) |
500 (regno << info->var.green.offset) |
501 (regno << info->var.blue.offset);
502 }
503} 514}
504 515
505int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info) 516int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info)
@@ -536,7 +547,9 @@ int drm_fb_helper_setcmap(struct fb_cmap *cmap, struct fb_info *info)
536 if (transp) 547 if (transp)
537 htransp = *transp++; 548 htransp = *transp++;
538 549
539 setcolreg(crtc, hred, hgreen, hblue, start++, info); 550 rc = setcolreg(crtc, hred, hgreen, hblue, start++, info);
551 if (rc)
552 return rc;
540 } 553 }
541 crtc_funcs->load_lut(crtc); 554 crtc_funcs->load_lut(crtc);
542 } 555 }
@@ -555,6 +568,7 @@ int drm_fb_helper_setcolreg(unsigned regno,
555 struct drm_device *dev = fb_helper->dev; 568 struct drm_device *dev = fb_helper->dev;
556 struct drm_crtc *crtc; 569 struct drm_crtc *crtc;
557 int i; 570 int i;
571 int ret;
558 572
559 if (regno > 255) 573 if (regno > 255)
560 return 1; 574 return 1;
@@ -568,8 +582,10 @@ int drm_fb_helper_setcolreg(unsigned regno,
568 if (i == fb_helper->crtc_count) 582 if (i == fb_helper->crtc_count)
569 continue; 583 continue;
570 584
585 ret = setcolreg(crtc, red, green, blue, regno, info);
586 if (ret)
587 return ret;
571 588
572 setcolreg(crtc, red, green, blue, regno, info);
573 crtc_funcs->load_lut(crtc); 589 crtc_funcs->load_lut(crtc);
574 } 590 }
575 return 0; 591 return 0;
@@ -691,7 +707,7 @@ int drm_fb_helper_set_par(struct fb_info *info)
691 707
692 if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) { 708 if (crtc->fb == fb_helper->crtc_info[i].mode_set.fb) {
693 mutex_lock(&dev->mode_config.mutex); 709 mutex_lock(&dev->mode_config.mutex);
694 ret = crtc->funcs->set_config(&fb_helper->crtc_info->mode_set); 710 ret = crtc->funcs->set_config(&fb_helper->crtc_info[i].mode_set);
695 mutex_unlock(&dev->mode_config.mutex); 711 mutex_unlock(&dev->mode_config.mutex);
696 if (ret) 712 if (ret)
697 return ret; 713 return ret;
@@ -928,7 +944,7 @@ void drm_fb_helper_fill_fix(struct fb_info *info, uint32_t pitch,
928{ 944{
929 info->fix.type = FB_TYPE_PACKED_PIXELS; 945 info->fix.type = FB_TYPE_PACKED_PIXELS;
930 info->fix.visual = depth == 8 ? FB_VISUAL_PSEUDOCOLOR : 946 info->fix.visual = depth == 8 ? FB_VISUAL_PSEUDOCOLOR :
931 FB_VISUAL_DIRECTCOLOR; 947 FB_VISUAL_TRUECOLOR;
932 info->fix.type_aux = 0; 948 info->fix.type_aux = 0;
933 info->fix.xpanstep = 1; /* doing it in hw */ 949 info->fix.xpanstep = 1; /* doing it in hw */
934 info->fix.ypanstep = 1; /* doing it in hw */ 950 info->fix.ypanstep = 1; /* doing it in hw */
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 92aeb918e0c0..e5b138be45fa 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -1227,8 +1227,7 @@ static int i915_load_modeset_init(struct drm_device *dev,
1227 goto out; 1227 goto out;
1228 1228
1229 /* Try to set up FBC with a reasonable compressed buffer size */ 1229 /* Try to set up FBC with a reasonable compressed buffer size */
1230 if (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev) || IS_GM45(dev)) && 1230 if (I915_HAS_FBC(dev) && i915_powersave) {
1231 i915_powersave) {
1232 int cfb_size; 1231 int cfb_size;
1233 1232
1234 /* Try to get an 8M buffer... */ 1233 /* Try to get an 8M buffer... */
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b93814c0d3e2..7f436ec075f6 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -89,7 +89,8 @@ static int i915_suspend(struct drm_device *dev, pm_message_t state)
89 pci_set_power_state(dev->pdev, PCI_D3hot); 89 pci_set_power_state(dev->pdev, PCI_D3hot);
90 } 90 }
91 91
92 dev_priv->suspended = 1; 92 /* Modeset on resume, not lid events */
93 dev_priv->modeset_on_lid = 0;
93 94
94 return 0; 95 return 0;
95} 96}
@@ -124,7 +125,7 @@ static int i915_resume(struct drm_device *dev)
124 drm_helper_resume_force_mode(dev); 125 drm_helper_resume_force_mode(dev);
125 } 126 }
126 127
127 dev_priv->suspended = 0; 128 dev_priv->modeset_on_lid = 0;
128 129
129 return ret; 130 return ret;
130} 131}
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 6035d3dae851..57204e298975 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -274,7 +274,7 @@ typedef struct drm_i915_private {
274 struct drm_i915_display_funcs display; 274 struct drm_i915_display_funcs display;
275 275
276 /* Register state */ 276 /* Register state */
277 bool suspended; 277 bool modeset_on_lid;
278 u8 saveLBB; 278 u8 saveLBB;
279 u32 saveDSPACNTR; 279 u32 saveDSPACNTR;
280 u32 saveDSPBCNTR; 280 u32 saveDSPBCNTR;
@@ -296,6 +296,12 @@ typedef struct drm_i915_private {
296 u32 saveVBLANK_A; 296 u32 saveVBLANK_A;
297 u32 saveVSYNC_A; 297 u32 saveVSYNC_A;
298 u32 saveBCLRPAT_A; 298 u32 saveBCLRPAT_A;
299 u32 saveTRANS_HTOTAL_A;
300 u32 saveTRANS_HBLANK_A;
301 u32 saveTRANS_HSYNC_A;
302 u32 saveTRANS_VTOTAL_A;
303 u32 saveTRANS_VBLANK_A;
304 u32 saveTRANS_VSYNC_A;
299 u32 savePIPEASTAT; 305 u32 savePIPEASTAT;
300 u32 saveDSPASTRIDE; 306 u32 saveDSPASTRIDE;
301 u32 saveDSPASIZE; 307 u32 saveDSPASIZE;
@@ -304,8 +310,11 @@ typedef struct drm_i915_private {
304 u32 saveDSPASURF; 310 u32 saveDSPASURF;
305 u32 saveDSPATILEOFF; 311 u32 saveDSPATILEOFF;
306 u32 savePFIT_PGM_RATIOS; 312 u32 savePFIT_PGM_RATIOS;
313 u32 saveBLC_HIST_CTL;
307 u32 saveBLC_PWM_CTL; 314 u32 saveBLC_PWM_CTL;
308 u32 saveBLC_PWM_CTL2; 315 u32 saveBLC_PWM_CTL2;
316 u32 saveBLC_CPU_PWM_CTL;
317 u32 saveBLC_CPU_PWM_CTL2;
309 u32 saveFPB0; 318 u32 saveFPB0;
310 u32 saveFPB1; 319 u32 saveFPB1;
311 u32 saveDPLL_B; 320 u32 saveDPLL_B;
@@ -317,6 +326,12 @@ typedef struct drm_i915_private {
317 u32 saveVBLANK_B; 326 u32 saveVBLANK_B;
318 u32 saveVSYNC_B; 327 u32 saveVSYNC_B;
319 u32 saveBCLRPAT_B; 328 u32 saveBCLRPAT_B;
329 u32 saveTRANS_HTOTAL_B;
330 u32 saveTRANS_HBLANK_B;
331 u32 saveTRANS_HSYNC_B;
332 u32 saveTRANS_VTOTAL_B;
333 u32 saveTRANS_VBLANK_B;
334 u32 saveTRANS_VSYNC_B;
320 u32 savePIPEBSTAT; 335 u32 savePIPEBSTAT;
321 u32 saveDSPBSTRIDE; 336 u32 saveDSPBSTRIDE;
322 u32 saveDSPBSIZE; 337 u32 saveDSPBSIZE;
@@ -342,6 +357,7 @@ typedef struct drm_i915_private {
342 u32 savePFIT_CONTROL; 357 u32 savePFIT_CONTROL;
343 u32 save_palette_a[256]; 358 u32 save_palette_a[256];
344 u32 save_palette_b[256]; 359 u32 save_palette_b[256];
360 u32 saveDPFC_CB_BASE;
345 u32 saveFBC_CFB_BASE; 361 u32 saveFBC_CFB_BASE;
346 u32 saveFBC_LL_BASE; 362 u32 saveFBC_LL_BASE;
347 u32 saveFBC_CONTROL; 363 u32 saveFBC_CONTROL;
@@ -349,6 +365,12 @@ typedef struct drm_i915_private {
349 u32 saveIER; 365 u32 saveIER;
350 u32 saveIIR; 366 u32 saveIIR;
351 u32 saveIMR; 367 u32 saveIMR;
368 u32 saveDEIER;
369 u32 saveDEIMR;
370 u32 saveGTIER;
371 u32 saveGTIMR;
372 u32 saveFDI_RXA_IMR;
373 u32 saveFDI_RXB_IMR;
352 u32 saveCACHE_MODE_0; 374 u32 saveCACHE_MODE_0;
353 u32 saveD_STATE; 375 u32 saveD_STATE;
354 u32 saveDSPCLK_GATE_D; 376 u32 saveDSPCLK_GATE_D;
@@ -382,6 +404,16 @@ typedef struct drm_i915_private {
382 u32 savePIPEB_DP_LINK_M; 404 u32 savePIPEB_DP_LINK_M;
383 u32 savePIPEA_DP_LINK_N; 405 u32 savePIPEA_DP_LINK_N;
384 u32 savePIPEB_DP_LINK_N; 406 u32 savePIPEB_DP_LINK_N;
407 u32 saveFDI_RXA_CTL;
408 u32 saveFDI_TXA_CTL;
409 u32 saveFDI_RXB_CTL;
410 u32 saveFDI_TXB_CTL;
411 u32 savePFA_CTL_1;
412 u32 savePFB_CTL_1;
413 u32 savePFA_WIN_SZ;
414 u32 savePFB_WIN_SZ;
415 u32 savePFA_WIN_POS;
416 u32 savePFB_WIN_POS;
385 417
386 struct { 418 struct {
387 struct drm_mm gtt_space; 419 struct drm_mm gtt_space;
@@ -492,6 +524,8 @@ typedef struct drm_i915_private {
492 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT]; 524 struct drm_i915_gem_phys_object *phys_objs[I915_MAX_PHYS_OBJECT];
493 } mm; 525 } mm;
494 struct sdvo_device_mapping sdvo_mappings[2]; 526 struct sdvo_device_mapping sdvo_mappings[2];
527 /* indicate whether the LVDS_BORDER should be enabled or not */
528 unsigned int lvds_border_bits;
495 529
496 /* Reclocking support */ 530 /* Reclocking support */
497 bool render_reclock_avail; 531 bool render_reclock_avail;
@@ -981,7 +1015,10 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
981 1015
982#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev)) 1016#define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IGDNG(dev))
983#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev)) 1017#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IGDNG(dev))
984#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && (IS_I9XX(dev) || IS_I965G(dev))) 1018#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
1019 (IS_I9XX(dev) || IS_GM45(dev)) && \
1020 !IS_IGD(dev) && \
1021 !IS_IGDNG(dev))
985 1022
986#define PRIMARY_RINGBUFFER_SIZE (128*1024) 1023#define PRIMARY_RINGBUFFER_SIZE (128*1024)
987 1024
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 0466ddbeba32..1687edf68795 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -968,6 +968,8 @@
968#define LVDS_PORT_EN (1 << 31) 968#define LVDS_PORT_EN (1 << 31)
969/* Selects pipe B for LVDS data. Must be set on pre-965. */ 969/* Selects pipe B for LVDS data. Must be set on pre-965. */
970#define LVDS_PIPEB_SELECT (1 << 30) 970#define LVDS_PIPEB_SELECT (1 << 30)
971/* Enable border for unscaled (or aspect-scaled) display */
972#define LVDS_BORDER_ENABLE (1 << 15)
971/* 973/*
972 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per 974 * Enables the A0-A2 data pairs and CLKA, containing 18 bits of color data per
973 * pixel. 975 * pixel.
@@ -1078,6 +1080,8 @@
1078#define BACKLIGHT_DUTY_CYCLE_SHIFT (0) 1080#define BACKLIGHT_DUTY_CYCLE_SHIFT (0)
1079#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff) 1081#define BACKLIGHT_DUTY_CYCLE_MASK (0xffff)
1080 1082
1083#define BLC_HIST_CTL 0x61260
1084
1081/* TV port control */ 1085/* TV port control */
1082#define TV_CTL 0x68000 1086#define TV_CTL 0x68000
1083/** Enables the TV encoder */ 1087/** Enables the TV encoder */
@@ -1780,6 +1784,11 @@
1780#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */ 1784#define PIPE_START_VBLANK_INTERRUPT_STATUS (1UL<<2) /* 965 or later */
1781#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1) 1785#define PIPE_VBLANK_INTERRUPT_STATUS (1UL<<1)
1782#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0) 1786#define PIPE_OVERLAY_UPDATED_STATUS (1UL<<0)
1787#define PIPE_BPC_MASK (7 << 5) /* Ironlake */
1788#define PIPE_8BPC (0 << 5)
1789#define PIPE_10BPC (1 << 5)
1790#define PIPE_6BPC (2 << 5)
1791#define PIPE_12BPC (3 << 5)
1783 1792
1784#define DSPARB 0x70030 1793#define DSPARB 0x70030
1785#define DSPARB_CSTART_MASK (0x7f << 7) 1794#define DSPARB_CSTART_MASK (0x7f << 7)
@@ -1790,17 +1799,29 @@
1790#define DSPARB_AEND_SHIFT 0 1799#define DSPARB_AEND_SHIFT 0
1791 1800
1792#define DSPFW1 0x70034 1801#define DSPFW1 0x70034
1802#define DSPFW_SR_SHIFT 23
1803#define DSPFW_CURSORB_SHIFT 16
1804#define DSPFW_PLANEB_SHIFT 8
1793#define DSPFW2 0x70038 1805#define DSPFW2 0x70038
1806#define DSPFW_CURSORA_MASK 0x00003f00
1807#define DSPFW_CURSORA_SHIFT 16
1794#define DSPFW3 0x7003c 1808#define DSPFW3 0x7003c
1809#define DSPFW_HPLL_SR_EN (1<<31)
1810#define DSPFW_CURSOR_SR_SHIFT 24
1795#define IGD_SELF_REFRESH_EN (1<<30) 1811#define IGD_SELF_REFRESH_EN (1<<30)
1796 1812
1797/* FIFO watermark sizes etc */ 1813/* FIFO watermark sizes etc */
1814#define G4X_FIFO_LINE_SIZE 64
1798#define I915_FIFO_LINE_SIZE 64 1815#define I915_FIFO_LINE_SIZE 64
1799#define I830_FIFO_LINE_SIZE 32 1816#define I830_FIFO_LINE_SIZE 32
1817
1818#define G4X_FIFO_SIZE 127
1800#define I945_FIFO_SIZE 127 /* 945 & 965 */ 1819#define I945_FIFO_SIZE 127 /* 945 & 965 */
1801#define I915_FIFO_SIZE 95 1820#define I915_FIFO_SIZE 95
1802#define I855GM_FIFO_SIZE 127 /* In cachelines */ 1821#define I855GM_FIFO_SIZE 127 /* In cachelines */
1803#define I830_FIFO_SIZE 95 1822#define I830_FIFO_SIZE 95
1823
1824#define G4X_MAX_WM 0x3f
1804#define I915_MAX_WM 0x3f 1825#define I915_MAX_WM 0x3f
1805 1826
1806#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */ 1827#define IGD_DISPLAY_FIFO 512 /* in 64byte unit */
@@ -2030,6 +2051,11 @@
2030#define PFA_CTL_1 0x68080 2051#define PFA_CTL_1 0x68080
2031#define PFB_CTL_1 0x68880 2052#define PFB_CTL_1 0x68880
2032#define PF_ENABLE (1<<31) 2053#define PF_ENABLE (1<<31)
2054#define PF_FILTER_MASK (3<<23)
2055#define PF_FILTER_PROGRAMMED (0<<23)
2056#define PF_FILTER_MED_3x3 (1<<23)
2057#define PF_FILTER_EDGE_ENHANCE (2<<23)
2058#define PF_FILTER_EDGE_SOFTEN (3<<23)
2033#define PFA_WIN_SZ 0x68074 2059#define PFA_WIN_SZ 0x68074
2034#define PFB_WIN_SZ 0x68874 2060#define PFB_WIN_SZ 0x68874
2035#define PFA_WIN_POS 0x68070 2061#define PFA_WIN_POS 0x68070
@@ -2149,11 +2175,11 @@
2149#define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13) 2175#define DREF_CPU_SOURCE_OUTPUT_MASK (3<<13)
2150#define DREF_SSC_SOURCE_DISABLE (0<<11) 2176#define DREF_SSC_SOURCE_DISABLE (0<<11)
2151#define DREF_SSC_SOURCE_ENABLE (2<<11) 2177#define DREF_SSC_SOURCE_ENABLE (2<<11)
2152#define DREF_SSC_SOURCE_MASK (2<<11) 2178#define DREF_SSC_SOURCE_MASK (3<<11)
2153#define DREF_NONSPREAD_SOURCE_DISABLE (0<<9) 2179#define DREF_NONSPREAD_SOURCE_DISABLE (0<<9)
2154#define DREF_NONSPREAD_CK505_ENABLE (1<<9) 2180#define DREF_NONSPREAD_CK505_ENABLE (1<<9)
2155#define DREF_NONSPREAD_SOURCE_ENABLE (2<<9) 2181#define DREF_NONSPREAD_SOURCE_ENABLE (2<<9)
2156#define DREF_NONSPREAD_SOURCE_MASK (2<<9) 2182#define DREF_NONSPREAD_SOURCE_MASK (3<<9)
2157#define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7) 2183#define DREF_SUPERSPREAD_SOURCE_DISABLE (0<<7)
2158#define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7) 2184#define DREF_SUPERSPREAD_SOURCE_ENABLE (2<<7)
2159#define DREF_SSC4_DOWNSPREAD (0<<6) 2185#define DREF_SSC4_DOWNSPREAD (0<<6)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index bd6d8d91ca9f..992d5617e798 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -32,11 +32,15 @@
32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe) 32static bool i915_pipe_enabled(struct drm_device *dev, enum pipe pipe)
33{ 33{
34 struct drm_i915_private *dev_priv = dev->dev_private; 34 struct drm_i915_private *dev_priv = dev->dev_private;
35 u32 dpll_reg;
35 36
36 if (pipe == PIPE_A) 37 if (IS_IGDNG(dev)) {
37 return (I915_READ(DPLL_A) & DPLL_VCO_ENABLE); 38 dpll_reg = (pipe == PIPE_A) ? PCH_DPLL_A: PCH_DPLL_B;
38 else 39 } else {
39 return (I915_READ(DPLL_B) & DPLL_VCO_ENABLE); 40 dpll_reg = (pipe == PIPE_A) ? DPLL_A: DPLL_B;
41 }
42
43 return (I915_READ(dpll_reg) & DPLL_VCO_ENABLE);
40} 44}
41 45
42static void i915_save_palette(struct drm_device *dev, enum pipe pipe) 46static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
@@ -49,6 +53,9 @@ static void i915_save_palette(struct drm_device *dev, enum pipe pipe)
49 if (!i915_pipe_enabled(dev, pipe)) 53 if (!i915_pipe_enabled(dev, pipe))
50 return; 54 return;
51 55
56 if (IS_IGDNG(dev))
57 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
58
52 if (pipe == PIPE_A) 59 if (pipe == PIPE_A)
53 array = dev_priv->save_palette_a; 60 array = dev_priv->save_palette_a;
54 else 61 else
@@ -68,6 +75,9 @@ static void i915_restore_palette(struct drm_device *dev, enum pipe pipe)
68 if (!i915_pipe_enabled(dev, pipe)) 75 if (!i915_pipe_enabled(dev, pipe))
69 return; 76 return;
70 77
78 if (IS_IGDNG(dev))
79 reg = (pipe == PIPE_A) ? LGC_PALETTE_A : LGC_PALETTE_B;
80
71 if (pipe == PIPE_A) 81 if (pipe == PIPE_A)
72 array = dev_priv->save_palette_a; 82 array = dev_priv->save_palette_a;
73 else 83 else
@@ -232,10 +242,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
232 /* Pipe & plane A info */ 242 /* Pipe & plane A info */
233 dev_priv->savePIPEACONF = I915_READ(PIPEACONF); 243 dev_priv->savePIPEACONF = I915_READ(PIPEACONF);
234 dev_priv->savePIPEASRC = I915_READ(PIPEASRC); 244 dev_priv->savePIPEASRC = I915_READ(PIPEASRC);
235 dev_priv->saveFPA0 = I915_READ(FPA0); 245 if (IS_IGDNG(dev)) {
236 dev_priv->saveFPA1 = I915_READ(FPA1); 246 dev_priv->saveFPA0 = I915_READ(PCH_FPA0);
237 dev_priv->saveDPLL_A = I915_READ(DPLL_A); 247 dev_priv->saveFPA1 = I915_READ(PCH_FPA1);
238 if (IS_I965G(dev)) 248 dev_priv->saveDPLL_A = I915_READ(PCH_DPLL_A);
249 } else {
250 dev_priv->saveFPA0 = I915_READ(FPA0);
251 dev_priv->saveFPA1 = I915_READ(FPA1);
252 dev_priv->saveDPLL_A = I915_READ(DPLL_A);
253 }
254 if (IS_I965G(dev) && !IS_IGDNG(dev))
239 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD); 255 dev_priv->saveDPLL_A_MD = I915_READ(DPLL_A_MD);
240 dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A); 256 dev_priv->saveHTOTAL_A = I915_READ(HTOTAL_A);
241 dev_priv->saveHBLANK_A = I915_READ(HBLANK_A); 257 dev_priv->saveHBLANK_A = I915_READ(HBLANK_A);
@@ -243,7 +259,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
243 dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A); 259 dev_priv->saveVTOTAL_A = I915_READ(VTOTAL_A);
244 dev_priv->saveVBLANK_A = I915_READ(VBLANK_A); 260 dev_priv->saveVBLANK_A = I915_READ(VBLANK_A);
245 dev_priv->saveVSYNC_A = I915_READ(VSYNC_A); 261 dev_priv->saveVSYNC_A = I915_READ(VSYNC_A);
246 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); 262 if (!IS_IGDNG(dev))
263 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A);
264
265 if (IS_IGDNG(dev)) {
266 dev_priv->saveFDI_TXA_CTL = I915_READ(FDI_TXA_CTL);
267 dev_priv->saveFDI_RXA_CTL = I915_READ(FDI_RXA_CTL);
268
269 dev_priv->savePFA_CTL_1 = I915_READ(PFA_CTL_1);
270 dev_priv->savePFA_WIN_SZ = I915_READ(PFA_WIN_SZ);
271 dev_priv->savePFA_WIN_POS = I915_READ(PFA_WIN_POS);
272
273 dev_priv->saveTRANS_HTOTAL_A = I915_READ(TRANS_HTOTAL_A);
274 dev_priv->saveTRANS_HBLANK_A = I915_READ(TRANS_HBLANK_A);
275 dev_priv->saveTRANS_HSYNC_A = I915_READ(TRANS_HSYNC_A);
276 dev_priv->saveTRANS_VTOTAL_A = I915_READ(TRANS_VTOTAL_A);
277 dev_priv->saveTRANS_VBLANK_A = I915_READ(TRANS_VBLANK_A);
278 dev_priv->saveTRANS_VSYNC_A = I915_READ(TRANS_VSYNC_A);
279 }
247 280
248 dev_priv->saveDSPACNTR = I915_READ(DSPACNTR); 281 dev_priv->saveDSPACNTR = I915_READ(DSPACNTR);
249 dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE); 282 dev_priv->saveDSPASTRIDE = I915_READ(DSPASTRIDE);
@@ -260,10 +293,16 @@ static void i915_save_modeset_reg(struct drm_device *dev)
260 /* Pipe & plane B info */ 293 /* Pipe & plane B info */
261 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF); 294 dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF);
262 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC); 295 dev_priv->savePIPEBSRC = I915_READ(PIPEBSRC);
263 dev_priv->saveFPB0 = I915_READ(FPB0); 296 if (IS_IGDNG(dev)) {
264 dev_priv->saveFPB1 = I915_READ(FPB1); 297 dev_priv->saveFPB0 = I915_READ(PCH_FPB0);
265 dev_priv->saveDPLL_B = I915_READ(DPLL_B); 298 dev_priv->saveFPB1 = I915_READ(PCH_FPB1);
266 if (IS_I965G(dev)) 299 dev_priv->saveDPLL_B = I915_READ(PCH_DPLL_B);
300 } else {
301 dev_priv->saveFPB0 = I915_READ(FPB0);
302 dev_priv->saveFPB1 = I915_READ(FPB1);
303 dev_priv->saveDPLL_B = I915_READ(DPLL_B);
304 }
305 if (IS_I965G(dev) && !IS_IGDNG(dev))
267 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD); 306 dev_priv->saveDPLL_B_MD = I915_READ(DPLL_B_MD);
268 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B); 307 dev_priv->saveHTOTAL_B = I915_READ(HTOTAL_B);
269 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B); 308 dev_priv->saveHBLANK_B = I915_READ(HBLANK_B);
@@ -271,7 +310,24 @@ static void i915_save_modeset_reg(struct drm_device *dev)
271 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B); 310 dev_priv->saveVTOTAL_B = I915_READ(VTOTAL_B);
272 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B); 311 dev_priv->saveVBLANK_B = I915_READ(VBLANK_B);
273 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B); 312 dev_priv->saveVSYNC_B = I915_READ(VSYNC_B);
274 dev_priv->saveBCLRPAT_A = I915_READ(BCLRPAT_A); 313 if (!IS_IGDNG(dev))
314 dev_priv->saveBCLRPAT_B = I915_READ(BCLRPAT_B);
315
316 if (IS_IGDNG(dev)) {
317 dev_priv->saveFDI_TXB_CTL = I915_READ(FDI_TXB_CTL);
318 dev_priv->saveFDI_RXB_CTL = I915_READ(FDI_RXB_CTL);
319
320 dev_priv->savePFB_CTL_1 = I915_READ(PFB_CTL_1);
321 dev_priv->savePFB_WIN_SZ = I915_READ(PFB_WIN_SZ);
322 dev_priv->savePFB_WIN_POS = I915_READ(PFB_WIN_POS);
323
324 dev_priv->saveTRANS_HTOTAL_B = I915_READ(TRANS_HTOTAL_B);
325 dev_priv->saveTRANS_HBLANK_B = I915_READ(TRANS_HBLANK_B);
326 dev_priv->saveTRANS_HSYNC_B = I915_READ(TRANS_HSYNC_B);
327 dev_priv->saveTRANS_VTOTAL_B = I915_READ(TRANS_VTOTAL_B);
328 dev_priv->saveTRANS_VBLANK_B = I915_READ(TRANS_VBLANK_B);
329 dev_priv->saveTRANS_VSYNC_B = I915_READ(TRANS_VSYNC_B);
330 }
275 331
276 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR); 332 dev_priv->saveDSPBCNTR = I915_READ(DSPBCNTR);
277 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE); 333 dev_priv->saveDSPBSTRIDE = I915_READ(DSPBSTRIDE);
@@ -290,23 +346,41 @@ static void i915_save_modeset_reg(struct drm_device *dev)
290static void i915_restore_modeset_reg(struct drm_device *dev) 346static void i915_restore_modeset_reg(struct drm_device *dev)
291{ 347{
292 struct drm_i915_private *dev_priv = dev->dev_private; 348 struct drm_i915_private *dev_priv = dev->dev_private;
349 int dpll_a_reg, fpa0_reg, fpa1_reg;
350 int dpll_b_reg, fpb0_reg, fpb1_reg;
293 351
294 if (drm_core_check_feature(dev, DRIVER_MODESET)) 352 if (drm_core_check_feature(dev, DRIVER_MODESET))
295 return; 353 return;
296 354
355 if (IS_IGDNG(dev)) {
356 dpll_a_reg = PCH_DPLL_A;
357 dpll_b_reg = PCH_DPLL_B;
358 fpa0_reg = PCH_FPA0;
359 fpb0_reg = PCH_FPB0;
360 fpa1_reg = PCH_FPA1;
361 fpb1_reg = PCH_FPB1;
362 } else {
363 dpll_a_reg = DPLL_A;
364 dpll_b_reg = DPLL_B;
365 fpa0_reg = FPA0;
366 fpb0_reg = FPB0;
367 fpa1_reg = FPA1;
368 fpb1_reg = FPB1;
369 }
370
297 /* Pipe & plane A info */ 371 /* Pipe & plane A info */
298 /* Prime the clock */ 372 /* Prime the clock */
299 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) { 373 if (dev_priv->saveDPLL_A & DPLL_VCO_ENABLE) {
300 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A & 374 I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A &
301 ~DPLL_VCO_ENABLE); 375 ~DPLL_VCO_ENABLE);
302 DRM_UDELAY(150); 376 DRM_UDELAY(150);
303 } 377 }
304 I915_WRITE(FPA0, dev_priv->saveFPA0); 378 I915_WRITE(fpa0_reg, dev_priv->saveFPA0);
305 I915_WRITE(FPA1, dev_priv->saveFPA1); 379 I915_WRITE(fpa1_reg, dev_priv->saveFPA1);
306 /* Actually enable it */ 380 /* Actually enable it */
307 I915_WRITE(DPLL_A, dev_priv->saveDPLL_A); 381 I915_WRITE(dpll_a_reg, dev_priv->saveDPLL_A);
308 DRM_UDELAY(150); 382 DRM_UDELAY(150);
309 if (IS_I965G(dev)) 383 if (IS_I965G(dev) && !IS_IGDNG(dev))
310 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD); 384 I915_WRITE(DPLL_A_MD, dev_priv->saveDPLL_A_MD);
311 DRM_UDELAY(150); 385 DRM_UDELAY(150);
312 386
@@ -317,7 +391,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
317 I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A); 391 I915_WRITE(VTOTAL_A, dev_priv->saveVTOTAL_A);
318 I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A); 392 I915_WRITE(VBLANK_A, dev_priv->saveVBLANK_A);
319 I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A); 393 I915_WRITE(VSYNC_A, dev_priv->saveVSYNC_A);
320 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A); 394 if (!IS_IGDNG(dev))
395 I915_WRITE(BCLRPAT_A, dev_priv->saveBCLRPAT_A);
396
397 if (IS_IGDNG(dev)) {
398 I915_WRITE(FDI_RXA_CTL, dev_priv->saveFDI_RXA_CTL);
399 I915_WRITE(FDI_TXA_CTL, dev_priv->saveFDI_TXA_CTL);
400
401 I915_WRITE(PFA_CTL_1, dev_priv->savePFA_CTL_1);
402 I915_WRITE(PFA_WIN_SZ, dev_priv->savePFA_WIN_SZ);
403 I915_WRITE(PFA_WIN_POS, dev_priv->savePFA_WIN_POS);
404
405 I915_WRITE(TRANS_HTOTAL_A, dev_priv->saveTRANS_HTOTAL_A);
406 I915_WRITE(TRANS_HBLANK_A, dev_priv->saveTRANS_HBLANK_A);
407 I915_WRITE(TRANS_HSYNC_A, dev_priv->saveTRANS_HSYNC_A);
408 I915_WRITE(TRANS_VTOTAL_A, dev_priv->saveTRANS_VTOTAL_A);
409 I915_WRITE(TRANS_VBLANK_A, dev_priv->saveTRANS_VBLANK_A);
410 I915_WRITE(TRANS_VSYNC_A, dev_priv->saveTRANS_VSYNC_A);
411 }
321 412
322 /* Restore plane info */ 413 /* Restore plane info */
323 I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE); 414 I915_WRITE(DSPASIZE, dev_priv->saveDSPASIZE);
@@ -339,14 +430,14 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
339 430
340 /* Pipe & plane B info */ 431 /* Pipe & plane B info */
341 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) { 432 if (dev_priv->saveDPLL_B & DPLL_VCO_ENABLE) {
342 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B & 433 I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B &
343 ~DPLL_VCO_ENABLE); 434 ~DPLL_VCO_ENABLE);
344 DRM_UDELAY(150); 435 DRM_UDELAY(150);
345 } 436 }
346 I915_WRITE(FPB0, dev_priv->saveFPB0); 437 I915_WRITE(fpb0_reg, dev_priv->saveFPB0);
347 I915_WRITE(FPB1, dev_priv->saveFPB1); 438 I915_WRITE(fpb1_reg, dev_priv->saveFPB1);
348 /* Actually enable it */ 439 /* Actually enable it */
349 I915_WRITE(DPLL_B, dev_priv->saveDPLL_B); 440 I915_WRITE(dpll_b_reg, dev_priv->saveDPLL_B);
350 DRM_UDELAY(150); 441 DRM_UDELAY(150);
351 if (IS_I965G(dev)) 442 if (IS_I965G(dev))
352 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD); 443 I915_WRITE(DPLL_B_MD, dev_priv->saveDPLL_B_MD);
@@ -359,7 +450,24 @@ static void i915_restore_modeset_reg(struct drm_device *dev)
359 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B); 450 I915_WRITE(VTOTAL_B, dev_priv->saveVTOTAL_B);
360 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B); 451 I915_WRITE(VBLANK_B, dev_priv->saveVBLANK_B);
361 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B); 452 I915_WRITE(VSYNC_B, dev_priv->saveVSYNC_B);
362 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B); 453 if (!IS_IGDNG(dev))
454 I915_WRITE(BCLRPAT_B, dev_priv->saveBCLRPAT_B);
455
456 if (IS_IGDNG(dev)) {
457 I915_WRITE(FDI_RXB_CTL, dev_priv->saveFDI_RXB_CTL);
458 I915_WRITE(FDI_TXB_CTL, dev_priv->saveFDI_TXB_CTL);
459
460 I915_WRITE(PFB_CTL_1, dev_priv->savePFB_CTL_1);
461 I915_WRITE(PFB_WIN_SZ, dev_priv->savePFB_WIN_SZ);
462 I915_WRITE(PFB_WIN_POS, dev_priv->savePFB_WIN_POS);
463
464 I915_WRITE(TRANS_HTOTAL_B, dev_priv->saveTRANS_HTOTAL_B);
465 I915_WRITE(TRANS_HBLANK_B, dev_priv->saveTRANS_HBLANK_B);
466 I915_WRITE(TRANS_HSYNC_B, dev_priv->saveTRANS_HSYNC_B);
467 I915_WRITE(TRANS_VTOTAL_B, dev_priv->saveTRANS_VTOTAL_B);
468 I915_WRITE(TRANS_VBLANK_B, dev_priv->saveTRANS_VBLANK_B);
469 I915_WRITE(TRANS_VSYNC_B, dev_priv->saveTRANS_VSYNC_B);
470 }
363 471
364 /* Restore plane info */ 472 /* Restore plane info */
365 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE); 473 I915_WRITE(DSPBSIZE, dev_priv->saveDSPBSIZE);
@@ -404,21 +512,43 @@ void i915_save_display(struct drm_device *dev)
404 dev_priv->saveCURSIZE = I915_READ(CURSIZE); 512 dev_priv->saveCURSIZE = I915_READ(CURSIZE);
405 513
406 /* CRT state */ 514 /* CRT state */
407 dev_priv->saveADPA = I915_READ(ADPA); 515 if (IS_IGDNG(dev)) {
516 dev_priv->saveADPA = I915_READ(PCH_ADPA);
517 } else {
518 dev_priv->saveADPA = I915_READ(ADPA);
519 }
408 520
409 /* LVDS state */ 521 /* LVDS state */
410 dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL); 522 if (IS_IGDNG(dev)) {
411 dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS); 523 dev_priv->savePP_CONTROL = I915_READ(PCH_PP_CONTROL);
412 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL); 524 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_PCH_CTL1);
413 if (IS_I965G(dev)) 525 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_PCH_CTL2);
414 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2); 526 dev_priv->saveBLC_CPU_PWM_CTL = I915_READ(BLC_PWM_CPU_CTL);
415 if (IS_MOBILE(dev) && !IS_I830(dev)) 527 dev_priv->saveBLC_CPU_PWM_CTL2 = I915_READ(BLC_PWM_CPU_CTL2);
416 dev_priv->saveLVDS = I915_READ(LVDS); 528 dev_priv->saveLVDS = I915_READ(PCH_LVDS);
417 if (!IS_I830(dev) && !IS_845G(dev)) 529 } else {
530 dev_priv->savePP_CONTROL = I915_READ(PP_CONTROL);
531 dev_priv->savePFIT_PGM_RATIOS = I915_READ(PFIT_PGM_RATIOS);
532 dev_priv->saveBLC_PWM_CTL = I915_READ(BLC_PWM_CTL);
533 dev_priv->saveBLC_HIST_CTL = I915_READ(BLC_HIST_CTL);
534 if (IS_I965G(dev))
535 dev_priv->saveBLC_PWM_CTL2 = I915_READ(BLC_PWM_CTL2);
536 if (IS_MOBILE(dev) && !IS_I830(dev))
537 dev_priv->saveLVDS = I915_READ(LVDS);
538 }
539
540 if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
418 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL); 541 dev_priv->savePFIT_CONTROL = I915_READ(PFIT_CONTROL);
419 dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); 542
420 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS); 543 if (IS_IGDNG(dev)) {
421 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR); 544 dev_priv->savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);
545 dev_priv->savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);
546 dev_priv->savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);
547 } else {
548 dev_priv->savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);
549 dev_priv->savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);
550 dev_priv->savePP_DIVISOR = I915_READ(PP_DIVISOR);
551 }
422 552
423 /* Display Port state */ 553 /* Display Port state */
424 if (SUPPORTS_INTEGRATED_DP(dev)) { 554 if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -437,16 +567,23 @@ void i915_save_display(struct drm_device *dev)
437 /* FIXME: save TV & SDVO state */ 567 /* FIXME: save TV & SDVO state */
438 568
439 /* FBC state */ 569 /* FBC state */
440 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE); 570 if (IS_GM45(dev)) {
441 dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE); 571 dev_priv->saveDPFC_CB_BASE = I915_READ(DPFC_CB_BASE);
442 dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2); 572 } else {
443 dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL); 573 dev_priv->saveFBC_CFB_BASE = I915_READ(FBC_CFB_BASE);
574 dev_priv->saveFBC_LL_BASE = I915_READ(FBC_LL_BASE);
575 dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2);
576 dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL);
577 }
444 578
445 /* VGA state */ 579 /* VGA state */
446 dev_priv->saveVGA0 = I915_READ(VGA0); 580 dev_priv->saveVGA0 = I915_READ(VGA0);
447 dev_priv->saveVGA1 = I915_READ(VGA1); 581 dev_priv->saveVGA1 = I915_READ(VGA1);
448 dev_priv->saveVGA_PD = I915_READ(VGA_PD); 582 dev_priv->saveVGA_PD = I915_READ(VGA_PD);
449 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL); 583 if (IS_IGDNG(dev))
584 dev_priv->saveVGACNTRL = I915_READ(CPU_VGACNTRL);
585 else
586 dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
450 587
451 i915_save_vga(dev); 588 i915_save_vga(dev);
452} 589}
@@ -485,22 +622,41 @@ void i915_restore_display(struct drm_device *dev)
485 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE); 622 I915_WRITE(CURSIZE, dev_priv->saveCURSIZE);
486 623
487 /* CRT state */ 624 /* CRT state */
488 I915_WRITE(ADPA, dev_priv->saveADPA); 625 if (IS_IGDNG(dev))
626 I915_WRITE(PCH_ADPA, dev_priv->saveADPA);
627 else
628 I915_WRITE(ADPA, dev_priv->saveADPA);
489 629
490 /* LVDS state */ 630 /* LVDS state */
491 if (IS_I965G(dev)) 631 if (IS_I965G(dev) && !IS_IGDNG(dev))
492 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2); 632 I915_WRITE(BLC_PWM_CTL2, dev_priv->saveBLC_PWM_CTL2);
493 if (IS_MOBILE(dev) && !IS_I830(dev)) 633
634 if (IS_IGDNG(dev)) {
635 I915_WRITE(PCH_LVDS, dev_priv->saveLVDS);
636 } else if (IS_MOBILE(dev) && !IS_I830(dev))
494 I915_WRITE(LVDS, dev_priv->saveLVDS); 637 I915_WRITE(LVDS, dev_priv->saveLVDS);
495 if (!IS_I830(dev) && !IS_845G(dev)) 638
639 if (!IS_I830(dev) && !IS_845G(dev) && !IS_IGDNG(dev))
496 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL); 640 I915_WRITE(PFIT_CONTROL, dev_priv->savePFIT_CONTROL);
497 641
498 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS); 642 if (IS_IGDNG(dev)) {
499 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL); 643 I915_WRITE(BLC_PWM_PCH_CTL1, dev_priv->saveBLC_PWM_CTL);
500 I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS); 644 I915_WRITE(BLC_PWM_PCH_CTL2, dev_priv->saveBLC_PWM_CTL2);
501 I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS); 645 I915_WRITE(BLC_PWM_CPU_CTL, dev_priv->saveBLC_CPU_PWM_CTL);
502 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR); 646 I915_WRITE(BLC_PWM_CPU_CTL2, dev_priv->saveBLC_CPU_PWM_CTL2);
503 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL); 647 I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
648 I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
649 I915_WRITE(PCH_PP_DIVISOR, dev_priv->savePP_DIVISOR);
650 I915_WRITE(PCH_PP_CONTROL, dev_priv->savePP_CONTROL);
651 } else {
652 I915_WRITE(PFIT_PGM_RATIOS, dev_priv->savePFIT_PGM_RATIOS);
653 I915_WRITE(BLC_PWM_CTL, dev_priv->saveBLC_PWM_CTL);
654 I915_WRITE(BLC_HIST_CTL, dev_priv->saveBLC_HIST_CTL);
655 I915_WRITE(PP_ON_DELAYS, dev_priv->savePP_ON_DELAYS);
656 I915_WRITE(PP_OFF_DELAYS, dev_priv->savePP_OFF_DELAYS);
657 I915_WRITE(PP_DIVISOR, dev_priv->savePP_DIVISOR);
658 I915_WRITE(PP_CONTROL, dev_priv->savePP_CONTROL);
659 }
504 660
505 /* Display Port state */ 661 /* Display Port state */
506 if (SUPPORTS_INTEGRATED_DP(dev)) { 662 if (SUPPORTS_INTEGRATED_DP(dev)) {
@@ -511,13 +667,22 @@ void i915_restore_display(struct drm_device *dev)
511 /* FIXME: restore TV & SDVO state */ 667 /* FIXME: restore TV & SDVO state */
512 668
513 /* FBC info */ 669 /* FBC info */
514 I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); 670 if (IS_GM45(dev)) {
515 I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); 671 g4x_disable_fbc(dev);
516 I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); 672 I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE);
517 I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL); 673 } else {
674 i8xx_disable_fbc(dev);
675 I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE);
676 I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE);
677 I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2);
678 I915_WRITE(FBC_CONTROL, dev_priv->saveFBC_CONTROL);
679 }
518 680
519 /* VGA state */ 681 /* VGA state */
520 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL); 682 if (IS_IGDNG(dev))
683 I915_WRITE(CPU_VGACNTRL, dev_priv->saveVGACNTRL);
684 else
685 I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
521 I915_WRITE(VGA0, dev_priv->saveVGA0); 686 I915_WRITE(VGA0, dev_priv->saveVGA0);
522 I915_WRITE(VGA1, dev_priv->saveVGA1); 687 I915_WRITE(VGA1, dev_priv->saveVGA1);
523 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD); 688 I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
@@ -543,8 +708,17 @@ int i915_save_state(struct drm_device *dev)
543 i915_save_display(dev); 708 i915_save_display(dev);
544 709
545 /* Interrupt state */ 710 /* Interrupt state */
546 dev_priv->saveIER = I915_READ(IER); 711 if (IS_IGDNG(dev)) {
547 dev_priv->saveIMR = I915_READ(IMR); 712 dev_priv->saveDEIER = I915_READ(DEIER);
713 dev_priv->saveDEIMR = I915_READ(DEIMR);
714 dev_priv->saveGTIER = I915_READ(GTIER);
715 dev_priv->saveGTIMR = I915_READ(GTIMR);
716 dev_priv->saveFDI_RXA_IMR = I915_READ(FDI_RXA_IMR);
717 dev_priv->saveFDI_RXB_IMR = I915_READ(FDI_RXB_IMR);
718 } else {
719 dev_priv->saveIER = I915_READ(IER);
720 dev_priv->saveIMR = I915_READ(IMR);
721 }
548 722
549 /* Clock gating state */ 723 /* Clock gating state */
550 dev_priv->saveD_STATE = I915_READ(D_STATE); 724 dev_priv->saveD_STATE = I915_READ(D_STATE);
@@ -609,8 +783,17 @@ int i915_restore_state(struct drm_device *dev)
609 i915_restore_display(dev); 783 i915_restore_display(dev);
610 784
611 /* Interrupt state */ 785 /* Interrupt state */
612 I915_WRITE (IER, dev_priv->saveIER); 786 if (IS_IGDNG(dev)) {
613 I915_WRITE (IMR, dev_priv->saveIMR); 787 I915_WRITE(DEIER, dev_priv->saveDEIER);
788 I915_WRITE(DEIMR, dev_priv->saveDEIMR);
789 I915_WRITE(GTIER, dev_priv->saveGTIER);
790 I915_WRITE(GTIMR, dev_priv->saveGTIMR);
791 I915_WRITE(FDI_RXA_IMR, dev_priv->saveFDI_RXA_IMR);
792 I915_WRITE(FDI_RXB_IMR, dev_priv->saveFDI_RXB_IMR);
793 } else {
794 I915_WRITE (IER, dev_priv->saveIER);
795 I915_WRITE (IMR, dev_priv->saveIMR);
796 }
614 797
615 /* Clock gating state */ 798 /* Clock gating state */
616 I915_WRITE (D_STATE, dev_priv->saveD_STATE); 799 I915_WRITE (D_STATE, dev_priv->saveD_STATE);
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 4337414846b6..96cd256e60e6 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -351,20 +351,18 @@ parse_driver_features(struct drm_i915_private *dev_priv,
351 struct drm_device *dev = dev_priv->dev; 351 struct drm_device *dev = dev_priv->dev;
352 struct bdb_driver_features *driver; 352 struct bdb_driver_features *driver;
353 353
354 /* set default for chips without eDP */
355 if (!SUPPORTS_EDP(dev)) {
356 dev_priv->edp_support = 0;
357 return;
358 }
359
360 driver = find_section(bdb, BDB_DRIVER_FEATURES); 354 driver = find_section(bdb, BDB_DRIVER_FEATURES);
361 if (!driver) 355 if (!driver)
362 return; 356 return;
363 357
364 if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP) 358 if (driver && SUPPORTS_EDP(dev) &&
359 driver->lvds_config == BDB_DRIVER_FEATURE_EDP) {
365 dev_priv->edp_support = 1; 360 dev_priv->edp_support = 1;
361 } else {
362 dev_priv->edp_support = 0;
363 }
366 364
367 if (driver->dual_frequency) 365 if (driver && driver->dual_frequency)
368 dev_priv->render_reclock_avail = true; 366 dev_priv->render_reclock_avail = true;
369} 367}
370 368
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3c14240cc002..3ba6546b7c7f 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -943,6 +943,7 @@ intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
943 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2); 943 clock.m = 5 * (clock.m1 + 2) + (clock.m2 + 2);
944 clock.p = (clock.p1 * clock.p2); 944 clock.p = (clock.p1 * clock.p2);
945 clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p; 945 clock.dot = 96000 * clock.m / (clock.n + 2) / clock.p;
946 clock.vco = 0;
946 memcpy(best_clock, &clock, sizeof(intel_clock_t)); 947 memcpy(best_clock, &clock, sizeof(intel_clock_t));
947 return true; 948 return true;
948} 949}
@@ -1260,9 +1261,11 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
1260 return ret; 1261 return ret;
1261 } 1262 }
1262 1263
1263 /* Pre-i965 needs to install a fence for tiled scan-out */ 1264 /* Install a fence for tiled scan-out. Pre-i965 always needs a fence,
1264 if (!IS_I965G(dev) && 1265 * whereas 965+ only requires a fence if using framebuffer compression.
1265 obj_priv->fence_reg == I915_FENCE_REG_NONE && 1266 * For simplicity, we always install a fence as the cost is not that onerous.
1267 */
1268 if (obj_priv->fence_reg == I915_FENCE_REG_NONE &&
1266 obj_priv->tiling_mode != I915_TILING_NONE) { 1269 obj_priv->tiling_mode != I915_TILING_NONE) {
1267 ret = i915_gem_object_get_fence_reg(obj); 1270 ret = i915_gem_object_get_fence_reg(obj);
1268 if (ret != 0) { 1271 if (ret != 0) {
@@ -1513,7 +1516,7 @@ static void igdng_crtc_dpms(struct drm_crtc *crtc, int mode)
1513 /* Enable panel fitting for LVDS */ 1516 /* Enable panel fitting for LVDS */
1514 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) { 1517 if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
1515 temp = I915_READ(pf_ctl_reg); 1518 temp = I915_READ(pf_ctl_reg);
1516 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE); 1519 I915_WRITE(pf_ctl_reg, temp | PF_ENABLE | PF_FILTER_MED_3x3);
1517 1520
1518 /* currently full aspect */ 1521 /* currently full aspect */
1519 I915_WRITE(pf_win_pos, 0); 1522 I915_WRITE(pf_win_pos, 0);
@@ -1801,6 +1804,8 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1801 case DRM_MODE_DPMS_ON: 1804 case DRM_MODE_DPMS_ON:
1802 case DRM_MODE_DPMS_STANDBY: 1805 case DRM_MODE_DPMS_STANDBY:
1803 case DRM_MODE_DPMS_SUSPEND: 1806 case DRM_MODE_DPMS_SUSPEND:
1807 intel_update_watermarks(dev);
1808
1804 /* Enable the DPLL */ 1809 /* Enable the DPLL */
1805 temp = I915_READ(dpll_reg); 1810 temp = I915_READ(dpll_reg);
1806 if ((temp & DPLL_VCO_ENABLE) == 0) { 1811 if ((temp & DPLL_VCO_ENABLE) == 0) {
@@ -1838,7 +1843,6 @@ static void i9xx_crtc_dpms(struct drm_crtc *crtc, int mode)
1838 1843
1839 /* Give the overlay scaler a chance to enable if it's on this pipe */ 1844 /* Give the overlay scaler a chance to enable if it's on this pipe */
1840 //intel_crtc_dpms_video(crtc, true); TODO 1845 //intel_crtc_dpms_video(crtc, true); TODO
1841 intel_update_watermarks(dev);
1842 break; 1846 break;
1843 case DRM_MODE_DPMS_OFF: 1847 case DRM_MODE_DPMS_OFF:
1844 intel_update_watermarks(dev); 1848 intel_update_watermarks(dev);
@@ -2082,7 +2086,7 @@ fdi_reduce_ratio(u32 *num, u32 *den)
2082#define LINK_N 0x80000 2086#define LINK_N 0x80000
2083 2087
2084static void 2088static void
2085igdng_compute_m_n(int bytes_per_pixel, int nlanes, 2089igdng_compute_m_n(int bits_per_pixel, int nlanes,
2086 int pixel_clock, int link_clock, 2090 int pixel_clock, int link_clock,
2087 struct fdi_m_n *m_n) 2091 struct fdi_m_n *m_n)
2088{ 2092{
@@ -2092,7 +2096,8 @@ igdng_compute_m_n(int bytes_per_pixel, int nlanes,
2092 2096
2093 temp = (u64) DATA_N * pixel_clock; 2097 temp = (u64) DATA_N * pixel_clock;
2094 temp = div_u64(temp, link_clock); 2098 temp = div_u64(temp, link_clock);
2095 m_n->gmch_m = div_u64(temp * bytes_per_pixel, nlanes); 2099 m_n->gmch_m = div_u64(temp * bits_per_pixel, nlanes);
2100 m_n->gmch_m >>= 3; /* convert to bytes_per_pixel */
2096 m_n->gmch_n = DATA_N; 2101 m_n->gmch_n = DATA_N;
2097 fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n); 2102 fdi_reduce_ratio(&m_n->gmch_m, &m_n->gmch_n);
2098 2103
@@ -2140,6 +2145,13 @@ static struct intel_watermark_params igd_cursor_hplloff_wm = {
2140 IGD_CURSOR_GUARD_WM, 2145 IGD_CURSOR_GUARD_WM,
2141 IGD_FIFO_LINE_SIZE 2146 IGD_FIFO_LINE_SIZE
2142}; 2147};
2148static struct intel_watermark_params g4x_wm_info = {
2149 G4X_FIFO_SIZE,
2150 G4X_MAX_WM,
2151 G4X_MAX_WM,
2152 2,
2153 G4X_FIFO_LINE_SIZE,
2154};
2143static struct intel_watermark_params i945_wm_info = { 2155static struct intel_watermark_params i945_wm_info = {
2144 I945_FIFO_SIZE, 2156 I945_FIFO_SIZE,
2145 I915_MAX_WM, 2157 I915_MAX_WM,
@@ -2430,17 +2442,74 @@ static int i830_get_fifo_size(struct drm_device *dev, int plane)
2430 return size; 2442 return size;
2431} 2443}
2432 2444
2433static void g4x_update_wm(struct drm_device *dev, int unused, int unused2, 2445static void g4x_update_wm(struct drm_device *dev, int planea_clock,
2434 int unused3, int unused4) 2446 int planeb_clock, int sr_hdisplay, int pixel_size)
2435{ 2447{
2436 struct drm_i915_private *dev_priv = dev->dev_private; 2448 struct drm_i915_private *dev_priv = dev->dev_private;
2437 u32 fw_blc_self = I915_READ(FW_BLC_SELF); 2449 int total_size, cacheline_size;
2450 int planea_wm, planeb_wm, cursora_wm, cursorb_wm, cursor_sr;
2451 struct intel_watermark_params planea_params, planeb_params;
2452 unsigned long line_time_us;
2453 int sr_clock, sr_entries = 0, entries_required;
2438 2454
2439 if (i915_powersave) 2455 /* Create copies of the base settings for each pipe */
2440 fw_blc_self |= FW_BLC_SELF_EN; 2456 planea_params = planeb_params = g4x_wm_info;
2441 else 2457
2442 fw_blc_self &= ~FW_BLC_SELF_EN; 2458 /* Grab a couple of global values before we overwrite them */
2443 I915_WRITE(FW_BLC_SELF, fw_blc_self); 2459 total_size = planea_params.fifo_size;
2460 cacheline_size = planea_params.cacheline_size;
2461
2462 /*
2463 * Note: we need to make sure we don't overflow for various clock &
2464 * latency values.
2465 * clocks go from a few thousand to several hundred thousand.
2466 * latency is usually a few thousand
2467 */
2468 entries_required = ((planea_clock / 1000) * pixel_size * latency_ns) /
2469 1000;
2470 entries_required /= G4X_FIFO_LINE_SIZE;
2471 planea_wm = entries_required + planea_params.guard_size;
2472
2473 entries_required = ((planeb_clock / 1000) * pixel_size * latency_ns) /
2474 1000;
2475 entries_required /= G4X_FIFO_LINE_SIZE;
2476 planeb_wm = entries_required + planeb_params.guard_size;
2477
2478 cursora_wm = cursorb_wm = 16;
2479 cursor_sr = 32;
2480
2481 DRM_DEBUG("FIFO watermarks - A: %d, B: %d\n", planea_wm, planeb_wm);
2482
2483 /* Calc sr entries for one plane configs */
2484 if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
2485 /* self-refresh has much higher latency */
2486 const static int sr_latency_ns = 12000;
2487
2488 sr_clock = planea_clock ? planea_clock : planeb_clock;
2489 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
2490
2491 /* Use ns/us then divide to preserve precision */
2492 sr_entries = (((sr_latency_ns / line_time_us) + 1) *
2493 pixel_size * sr_hdisplay) / 1000;
2494 sr_entries = roundup(sr_entries / cacheline_size, 1);
2495 DRM_DEBUG("self-refresh entries: %d\n", sr_entries);
2496 I915_WRITE(FW_BLC_SELF, FW_BLC_SELF_EN);
2497 }
2498
2499 DRM_DEBUG("Setting FIFO watermarks - A: %d, B: %d, SR %d\n",
2500 planea_wm, planeb_wm, sr_entries);
2501
2502 planea_wm &= 0x3f;
2503 planeb_wm &= 0x3f;
2504
2505 I915_WRITE(DSPFW1, (sr_entries << DSPFW_SR_SHIFT) |
2506 (cursorb_wm << DSPFW_CURSORB_SHIFT) |
2507 (planeb_wm << DSPFW_PLANEB_SHIFT) | planea_wm);
2508 I915_WRITE(DSPFW2, (I915_READ(DSPFW2) & DSPFW_CURSORA_MASK) |
2509 (cursora_wm << DSPFW_CURSORA_SHIFT));
2510 /* HPLL off in SR has some issues on G4x... disable it */
2511 I915_WRITE(DSPFW3, (I915_READ(DSPFW3) & ~DSPFW_HPLL_SR_EN) |
2512 (cursor_sr << DSPFW_CURSOR_SR_SHIFT));
2444} 2513}
2445 2514
2446static void i965_update_wm(struct drm_device *dev, int unused, int unused2, 2515static void i965_update_wm(struct drm_device *dev, int unused, int unused2,
@@ -2586,6 +2655,9 @@ static void intel_update_watermarks(struct drm_device *dev)
2586 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0; 2655 unsigned long planea_clock = 0, planeb_clock = 0, sr_clock = 0;
2587 int enabled = 0, pixel_size = 0; 2656 int enabled = 0, pixel_size = 0;
2588 2657
2658 if (!dev_priv->display.update_wm)
2659 return;
2660
2589 /* Get the clock config from both planes */ 2661 /* Get the clock config from both planes */
2590 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 2662 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
2591 intel_crtc = to_intel_crtc(crtc); 2663 intel_crtc = to_intel_crtc(crtc);
@@ -2763,7 +2835,7 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2763 2835
2764 /* FDI link */ 2836 /* FDI link */
2765 if (IS_IGDNG(dev)) { 2837 if (IS_IGDNG(dev)) {
2766 int lane, link_bw; 2838 int lane, link_bw, bpp;
2767 /* eDP doesn't require FDI link, so just set DP M/N 2839 /* eDP doesn't require FDI link, so just set DP M/N
2768 according to current link config */ 2840 according to current link config */
2769 if (is_edp) { 2841 if (is_edp) {
@@ -2782,10 +2854,72 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2782 lane = 4; 2854 lane = 4;
2783 link_bw = 270000; 2855 link_bw = 270000;
2784 } 2856 }
2785 igdng_compute_m_n(3, lane, target_clock, 2857
2858 /* determine panel color depth */
2859 temp = I915_READ(pipeconf_reg);
2860
2861 switch (temp & PIPE_BPC_MASK) {
2862 case PIPE_8BPC:
2863 bpp = 24;
2864 break;
2865 case PIPE_10BPC:
2866 bpp = 30;
2867 break;
2868 case PIPE_6BPC:
2869 bpp = 18;
2870 break;
2871 case PIPE_12BPC:
2872 bpp = 36;
2873 break;
2874 default:
2875 DRM_ERROR("unknown pipe bpc value\n");
2876 bpp = 24;
2877 }
2878
2879 igdng_compute_m_n(bpp, lane, target_clock,
2786 link_bw, &m_n); 2880 link_bw, &m_n);
2787 } 2881 }
2788 2882
2883 /* Ironlake: try to setup display ref clock before DPLL
2884 * enabling. This is only under driver's control after
2885 * PCH B stepping, previous chipset stepping should be
2886 * ignoring this setting.
2887 */
2888 if (IS_IGDNG(dev)) {
2889 temp = I915_READ(PCH_DREF_CONTROL);
2890 /* Always enable nonspread source */
2891 temp &= ~DREF_NONSPREAD_SOURCE_MASK;
2892 temp |= DREF_NONSPREAD_SOURCE_ENABLE;
2893 I915_WRITE(PCH_DREF_CONTROL, temp);
2894 POSTING_READ(PCH_DREF_CONTROL);
2895
2896 temp &= ~DREF_SSC_SOURCE_MASK;
2897 temp |= DREF_SSC_SOURCE_ENABLE;
2898 I915_WRITE(PCH_DREF_CONTROL, temp);
2899 POSTING_READ(PCH_DREF_CONTROL);
2900
2901 udelay(200);
2902
2903 if (is_edp) {
2904 if (dev_priv->lvds_use_ssc) {
2905 temp |= DREF_SSC1_ENABLE;
2906 I915_WRITE(PCH_DREF_CONTROL, temp);
2907 POSTING_READ(PCH_DREF_CONTROL);
2908
2909 udelay(200);
2910
2911 temp &= ~DREF_CPU_SOURCE_OUTPUT_MASK;
2912 temp |= DREF_CPU_SOURCE_OUTPUT_DOWNSPREAD;
2913 I915_WRITE(PCH_DREF_CONTROL, temp);
2914 POSTING_READ(PCH_DREF_CONTROL);
2915 } else {
2916 temp |= DREF_CPU_SOURCE_OUTPUT_NONSPREAD;
2917 I915_WRITE(PCH_DREF_CONTROL, temp);
2918 POSTING_READ(PCH_DREF_CONTROL);
2919 }
2920 }
2921 }
2922
2789 if (IS_IGD(dev)) { 2923 if (IS_IGD(dev)) {
2790 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2; 2924 fp = (1 << clock.n) << 16 | clock.m1 << 8 | clock.m2;
2791 if (has_reduced_clock) 2925 if (has_reduced_clock)
@@ -2936,6 +3070,8 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
2936 3070
2937 lvds = I915_READ(lvds_reg); 3071 lvds = I915_READ(lvds_reg);
2938 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT; 3072 lvds |= LVDS_PORT_EN | LVDS_A0A2_CLKA_POWER_UP | LVDS_PIPEB_SELECT;
3073 /* set the corresponsding LVDS_BORDER bit */
3074 lvds |= dev_priv->lvds_border_bits;
2939 /* Set the B0-B3 data pairs corresponding to whether we're going to 3075 /* Set the B0-B3 data pairs corresponding to whether we're going to
2940 * set the DPLLs for dual-channel mode or not. 3076 * set the DPLLs for dual-channel mode or not.
2941 */ 3077 */
@@ -4124,7 +4260,9 @@ void intel_init_clock_gating(struct drm_device *dev)
4124 * Disable clock gating reported to work incorrectly according to the 4260 * Disable clock gating reported to work incorrectly according to the
4125 * specs, but enable as much else as we can. 4261 * specs, but enable as much else as we can.
4126 */ 4262 */
4127 if (IS_G4X(dev)) { 4263 if (IS_IGDNG(dev)) {
4264 return;
4265 } else if (IS_G4X(dev)) {
4128 uint32_t dspclk_gate; 4266 uint32_t dspclk_gate;
4129 I915_WRITE(RENCLK_GATE_D1, 0); 4267 I915_WRITE(RENCLK_GATE_D1, 0);
4130 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE | 4268 I915_WRITE(RENCLK_GATE_D2, VF_UNIT_CLOCK_GATE_DISABLE |
@@ -4212,7 +4350,9 @@ static void intel_init_display(struct drm_device *dev)
4212 i830_get_display_clock_speed; 4350 i830_get_display_clock_speed;
4213 4351
4214 /* For FIFO watermark updates */ 4352 /* For FIFO watermark updates */
4215 if (IS_G4X(dev)) 4353 if (IS_IGDNG(dev))
4354 dev_priv->display.update_wm = NULL;
4355 else if (IS_G4X(dev))
4216 dev_priv->display.update_wm = g4x_update_wm; 4356 dev_priv->display.update_wm = g4x_update_wm;
4217 else if (IS_I965G(dev)) 4357 else if (IS_I965G(dev))
4218 dev_priv->display.update_wm = i965_update_wm; 4358 dev_priv->display.update_wm = i965_update_wm;
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index f4856a510476..d83447557f9b 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -400,7 +400,7 @@ intel_dp_i2c_init(struct intel_output *intel_output, const char *name)
400{ 400{
401 struct intel_dp_priv *dp_priv = intel_output->dev_priv; 401 struct intel_dp_priv *dp_priv = intel_output->dev_priv;
402 402
403 DRM_ERROR("i2c_init %s\n", name); 403 DRM_DEBUG_KMS("i2c_init %s\n", name);
404 dp_priv->algo.running = false; 404 dp_priv->algo.running = false;
405 dp_priv->algo.address = 0; 405 dp_priv->algo.address = 0;
406 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch; 406 dp_priv->algo.aux_ch = intel_dp_i2c_aux_ch;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 98ae3d73577e..05598ae10c4b 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -380,7 +380,7 @@ static bool intel_lvds_mode_fixup(struct drm_encoder *encoder,
380 adjusted_mode->crtc_vblank_start + vsync_pos; 380 adjusted_mode->crtc_vblank_start + vsync_pos;
381 /* keep the vsync width constant */ 381 /* keep the vsync width constant */
382 adjusted_mode->crtc_vsync_end = 382 adjusted_mode->crtc_vsync_end =
383 adjusted_mode->crtc_vblank_start + vsync_width; 383 adjusted_mode->crtc_vsync_start + vsync_width;
384 border = 1; 384 border = 1;
385 break; 385 break;
386 case DRM_MODE_SCALE_ASPECT: 386 case DRM_MODE_SCALE_ASPECT:
@@ -526,6 +526,14 @@ out:
526 lvds_priv->pfit_control = pfit_control; 526 lvds_priv->pfit_control = pfit_control;
527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; 527 lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios;
528 /* 528 /*
529 * When there exists the border, it means that the LVDS_BORDR
530 * should be enabled.
531 */
532 if (border)
533 dev_priv->lvds_border_bits |= LVDS_BORDER_ENABLE;
534 else
535 dev_priv->lvds_border_bits &= ~(LVDS_BORDER_ENABLE);
536 /*
529 * XXX: It would be nice to support lower refresh rates on the 537 * XXX: It would be nice to support lower refresh rates on the
530 * panels to reduce power consumption, and perhaps match the 538 * panels to reduce power consumption, and perhaps match the
531 * user's requested refresh rate. 539 * user's requested refresh rate.
@@ -656,6 +664,15 @@ static int intel_lvds_get_modes(struct drm_connector *connector)
656 return 0; 664 return 0;
657} 665}
658 666
667/*
668 * Lid events. Note the use of 'modeset_on_lid':
669 * - we set it on lid close, and reset it on open
670 * - we use it as a "only once" bit (ie we ignore
671 * duplicate events where it was already properly
672 * set/reset)
673 * - the suspend/resume paths will also set it to
674 * zero, since they restore the mode ("lid open").
675 */
659static int intel_lid_notify(struct notifier_block *nb, unsigned long val, 676static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
660 void *unused) 677 void *unused)
661{ 678{
@@ -663,13 +680,19 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
663 container_of(nb, struct drm_i915_private, lid_notifier); 680 container_of(nb, struct drm_i915_private, lid_notifier);
664 struct drm_device *dev = dev_priv->dev; 681 struct drm_device *dev = dev_priv->dev;
665 682
666 if (acpi_lid_open() && !dev_priv->suspended) { 683 if (!acpi_lid_open()) {
667 mutex_lock(&dev->mode_config.mutex); 684 dev_priv->modeset_on_lid = 1;
668 drm_helper_resume_force_mode(dev); 685 return NOTIFY_OK;
669 mutex_unlock(&dev->mode_config.mutex);
670 } 686 }
671 687
672 drm_sysfs_hotplug_event(dev_priv->dev); 688 if (!dev_priv->modeset_on_lid)
689 return NOTIFY_OK;
690
691 dev_priv->modeset_on_lid = 0;
692
693 mutex_lock(&dev->mode_config.mutex);
694 drm_helper_resume_force_mode(dev);
695 mutex_unlock(&dev->mode_config.mutex);
673 696
674 return NOTIFY_OK; 697 return NOTIFY_OK;
675} 698}
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index 09a28923f46e..b5713eedd6e1 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -49,7 +49,7 @@ radeon-y += radeon_device.o radeon_kms.o \
49 radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \ 49 radeon_cs.o radeon_bios.o radeon_benchmark.o r100.o r300.o r420.o \
50 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \ 50 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
51 r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \ 51 r200.o radeon_legacy_tv.o r600_cs.o r600_blit.o r600_blit_shaders.o \
52 r600_blit_kms.o 52 r600_blit_kms.o radeon_pm.o
53 53
54radeon-$(CONFIG_COMPAT) += radeon_ioc32.o 54radeon-$(CONFIG_COMPAT) += radeon_ioc32.o
55 55
diff --git a/drivers/gpu/drm/radeon/atombios.h b/drivers/gpu/drm/radeon/atombios.h
index 5d402086bc47..c11ddddfb3b6 100644
--- a/drivers/gpu/drm/radeon/atombios.h
+++ b/drivers/gpu/drm/radeon/atombios.h
@@ -2314,7 +2314,7 @@ typedef struct _ATOM_SPREAD_SPECTRUM_ASSIGNMENT {
2314 UCHAR ucSS_Step; 2314 UCHAR ucSS_Step;
2315 UCHAR ucSS_Delay; 2315 UCHAR ucSS_Delay;
2316 UCHAR ucSS_Id; 2316 UCHAR ucSS_Id;
2317 UCHAR ucRecommandedRef_Div; 2317 UCHAR ucRecommendedRef_Div;
2318 UCHAR ucSS_Range; /* it was reserved for V11 */ 2318 UCHAR ucSS_Range; /* it was reserved for V11 */
2319} ATOM_SPREAD_SPECTRUM_ASSIGNMENT; 2319} ATOM_SPREAD_SPECTRUM_ASSIGNMENT;
2320 2320
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 14fa9701aeb3..c15287a590ff 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -31,10 +31,6 @@
31#include "atom.h" 31#include "atom.h"
32#include "atom-bits.h" 32#include "atom-bits.h"
33 33
34/* evil but including atombios.h is much worse */
35bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
36 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing,
37 int32_t *pixel_clock);
38static void atombios_overscan_setup(struct drm_crtc *crtc, 34static void atombios_overscan_setup(struct drm_crtc *crtc,
39 struct drm_display_mode *mode, 35 struct drm_display_mode *mode,
40 struct drm_display_mode *adjusted_mode) 36 struct drm_display_mode *adjusted_mode)
@@ -248,18 +244,18 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
248 244
249 switch (mode) { 245 switch (mode) {
250 case DRM_MODE_DPMS_ON: 246 case DRM_MODE_DPMS_ON:
247 atombios_enable_crtc(crtc, 1);
251 if (ASIC_IS_DCE3(rdev)) 248 if (ASIC_IS_DCE3(rdev))
252 atombios_enable_crtc_memreq(crtc, 1); 249 atombios_enable_crtc_memreq(crtc, 1);
253 atombios_enable_crtc(crtc, 1);
254 atombios_blank_crtc(crtc, 0); 250 atombios_blank_crtc(crtc, 0);
255 break; 251 break;
256 case DRM_MODE_DPMS_STANDBY: 252 case DRM_MODE_DPMS_STANDBY:
257 case DRM_MODE_DPMS_SUSPEND: 253 case DRM_MODE_DPMS_SUSPEND:
258 case DRM_MODE_DPMS_OFF: 254 case DRM_MODE_DPMS_OFF:
259 atombios_blank_crtc(crtc, 1); 255 atombios_blank_crtc(crtc, 1);
260 atombios_enable_crtc(crtc, 0);
261 if (ASIC_IS_DCE3(rdev)) 256 if (ASIC_IS_DCE3(rdev))
262 atombios_enable_crtc_memreq(crtc, 0); 257 atombios_enable_crtc_memreq(crtc, 0);
258 atombios_enable_crtc(crtc, 0);
263 break; 259 break;
264 } 260 }
265 261
@@ -270,59 +266,147 @@ void atombios_crtc_dpms(struct drm_crtc *crtc, int mode)
270 266
271static void 267static void
272atombios_set_crtc_dtd_timing(struct drm_crtc *crtc, 268atombios_set_crtc_dtd_timing(struct drm_crtc *crtc,
273 SET_CRTC_USING_DTD_TIMING_PARAMETERS * crtc_param) 269 struct drm_display_mode *mode)
274{ 270{
271 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
275 struct drm_device *dev = crtc->dev; 272 struct drm_device *dev = crtc->dev;
276 struct radeon_device *rdev = dev->dev_private; 273 struct radeon_device *rdev = dev->dev_private;
277 SET_CRTC_USING_DTD_TIMING_PARAMETERS conv_param; 274 SET_CRTC_USING_DTD_TIMING_PARAMETERS args;
278 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_UsingDTDTiming); 275 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_UsingDTDTiming);
276 u16 misc = 0;
279 277
280 conv_param.usH_Size = cpu_to_le16(crtc_param->usH_Size); 278 memset(&args, 0, sizeof(args));
281 conv_param.usH_Blanking_Time = 279 args.usH_Size = cpu_to_le16(mode->crtc_hdisplay);
282 cpu_to_le16(crtc_param->usH_Blanking_Time); 280 args.usH_Blanking_Time =
283 conv_param.usV_Size = cpu_to_le16(crtc_param->usV_Size); 281 cpu_to_le16(mode->crtc_hblank_end - mode->crtc_hdisplay);
284 conv_param.usV_Blanking_Time = 282 args.usV_Size = cpu_to_le16(mode->crtc_vdisplay);
285 cpu_to_le16(crtc_param->usV_Blanking_Time); 283 args.usV_Blanking_Time =
286 conv_param.usH_SyncOffset = cpu_to_le16(crtc_param->usH_SyncOffset); 284 cpu_to_le16(mode->crtc_vblank_end - mode->crtc_vdisplay);
287 conv_param.usH_SyncWidth = cpu_to_le16(crtc_param->usH_SyncWidth); 285 args.usH_SyncOffset =
288 conv_param.usV_SyncOffset = cpu_to_le16(crtc_param->usV_SyncOffset); 286 cpu_to_le16(mode->crtc_hsync_start - mode->crtc_hdisplay);
289 conv_param.usV_SyncWidth = cpu_to_le16(crtc_param->usV_SyncWidth); 287 args.usH_SyncWidth =
290 conv_param.susModeMiscInfo.usAccess = 288 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start);
291 cpu_to_le16(crtc_param->susModeMiscInfo.usAccess); 289 args.usV_SyncOffset =
292 conv_param.ucCRTC = crtc_param->ucCRTC; 290 cpu_to_le16(mode->crtc_vsync_start - mode->crtc_vdisplay);
291 args.usV_SyncWidth =
292 cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start);
293 /*args.ucH_Border = mode->hborder;*/
294 /*args.ucV_Border = mode->vborder;*/
295
296 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
297 misc |= ATOM_VSYNC_POLARITY;
298 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
299 misc |= ATOM_HSYNC_POLARITY;
300 if (mode->flags & DRM_MODE_FLAG_CSYNC)
301 misc |= ATOM_COMPOSITESYNC;
302 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
303 misc |= ATOM_INTERLACE;
304 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
305 misc |= ATOM_DOUBLE_CLOCK_MODE;
306
307 args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
308 args.ucCRTC = radeon_crtc->crtc_id;
293 309
294 printk("executing set crtc dtd timing\n"); 310 printk("executing set crtc dtd timing\n");
295 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&conv_param); 311 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
296} 312}
297 313
298void atombios_crtc_set_timing(struct drm_crtc *crtc, 314static void atombios_crtc_set_timing(struct drm_crtc *crtc,
299 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION * 315 struct drm_display_mode *mode)
300 crtc_param)
301{ 316{
317 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
302 struct drm_device *dev = crtc->dev; 318 struct drm_device *dev = crtc->dev;
303 struct radeon_device *rdev = dev->dev_private; 319 struct radeon_device *rdev = dev->dev_private;
304 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION conv_param; 320 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION args;
305 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing); 321 int index = GetIndexIntoMasterTable(COMMAND, SetCRTC_Timing);
322 u16 misc = 0;
306 323
307 conv_param.usH_Total = cpu_to_le16(crtc_param->usH_Total); 324 memset(&args, 0, sizeof(args));
308 conv_param.usH_Disp = cpu_to_le16(crtc_param->usH_Disp); 325 args.usH_Total = cpu_to_le16(mode->crtc_htotal);
309 conv_param.usH_SyncStart = cpu_to_le16(crtc_param->usH_SyncStart); 326 args.usH_Disp = cpu_to_le16(mode->crtc_hdisplay);
310 conv_param.usH_SyncWidth = cpu_to_le16(crtc_param->usH_SyncWidth); 327 args.usH_SyncStart = cpu_to_le16(mode->crtc_hsync_start);
311 conv_param.usV_Total = cpu_to_le16(crtc_param->usV_Total); 328 args.usH_SyncWidth =
312 conv_param.usV_Disp = cpu_to_le16(crtc_param->usV_Disp); 329 cpu_to_le16(mode->crtc_hsync_end - mode->crtc_hsync_start);
313 conv_param.usV_SyncStart = cpu_to_le16(crtc_param->usV_SyncStart); 330 args.usV_Total = cpu_to_le16(mode->crtc_vtotal);
314 conv_param.usV_SyncWidth = cpu_to_le16(crtc_param->usV_SyncWidth); 331 args.usV_Disp = cpu_to_le16(mode->crtc_vdisplay);
315 conv_param.susModeMiscInfo.usAccess = 332 args.usV_SyncStart = cpu_to_le16(mode->crtc_vsync_start);
316 cpu_to_le16(crtc_param->susModeMiscInfo.usAccess); 333 args.usV_SyncWidth =
317 conv_param.ucCRTC = crtc_param->ucCRTC; 334 cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start);
318 conv_param.ucOverscanRight = crtc_param->ucOverscanRight; 335
319 conv_param.ucOverscanLeft = crtc_param->ucOverscanLeft; 336 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
320 conv_param.ucOverscanBottom = crtc_param->ucOverscanBottom; 337 misc |= ATOM_VSYNC_POLARITY;
321 conv_param.ucOverscanTop = crtc_param->ucOverscanTop; 338 if (mode->flags & DRM_MODE_FLAG_NHSYNC)
322 conv_param.ucReserved = crtc_param->ucReserved; 339 misc |= ATOM_HSYNC_POLARITY;
340 if (mode->flags & DRM_MODE_FLAG_CSYNC)
341 misc |= ATOM_COMPOSITESYNC;
342 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
343 misc |= ATOM_INTERLACE;
344 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
345 misc |= ATOM_DOUBLE_CLOCK_MODE;
346
347 args.susModeMiscInfo.usAccess = cpu_to_le16(misc);
348 args.ucCRTC = radeon_crtc->crtc_id;
323 349
324 printk("executing set crtc timing\n"); 350 printk("executing set crtc timing\n");
325 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&conv_param); 351 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
352}
353
354static void atombios_set_ss(struct drm_crtc *crtc, int enable)
355{
356 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
357 struct drm_device *dev = crtc->dev;
358 struct radeon_device *rdev = dev->dev_private;
359 struct drm_encoder *encoder = NULL;
360 struct radeon_encoder *radeon_encoder = NULL;
361 struct radeon_encoder_atom_dig *dig = NULL;
362 int index = GetIndexIntoMasterTable(COMMAND, EnableSpreadSpectrumOnPPLL);
363 ENABLE_SPREAD_SPECTRUM_ON_PPLL_PS_ALLOCATION args;
364 ENABLE_LVDS_SS_PARAMETERS legacy_args;
365 uint16_t percentage = 0;
366 uint8_t type = 0, step = 0, delay = 0, range = 0;
367
368 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
369 if (encoder->crtc == crtc) {
370 radeon_encoder = to_radeon_encoder(encoder);
371 /* only enable spread spectrum on LVDS */
372 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
373 dig = radeon_encoder->enc_priv;
374 if (dig && dig->ss) {
375 percentage = dig->ss->percentage;
376 type = dig->ss->type;
377 step = dig->ss->step;
378 delay = dig->ss->delay;
379 range = dig->ss->range;
380 } else if (enable)
381 return;
382 } else if (enable)
383 return;
384 break;
385 }
386 }
387
388 if (!radeon_encoder)
389 return;
390
391 if (ASIC_IS_AVIVO(rdev)) {
392 memset(&args, 0, sizeof(args));
393 args.usSpreadSpectrumPercentage = cpu_to_le16(percentage);
394 args.ucSpreadSpectrumType = type;
395 args.ucSpreadSpectrumStep = step;
396 args.ucSpreadSpectrumDelay = delay;
397 args.ucSpreadSpectrumRange = range;
398 args.ucPpll = radeon_crtc->crtc_id ? ATOM_PPLL2 : ATOM_PPLL1;
399 args.ucEnable = enable;
400 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
401 } else {
402 memset(&legacy_args, 0, sizeof(legacy_args));
403 legacy_args.usSpreadSpectrumPercentage = cpu_to_le16(percentage);
404 legacy_args.ucSpreadSpectrumType = type;
405 legacy_args.ucSpreadSpectrumStepSize_Delay = (step & 3) << 2;
406 legacy_args.ucSpreadSpectrumStepSize_Delay |= (delay & 7) << 4;
407 legacy_args.ucEnable = enable;
408 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&legacy_args);
409 }
326} 410}
327 411
328void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode) 412void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
@@ -333,12 +417,13 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
333 struct drm_encoder *encoder = NULL; 417 struct drm_encoder *encoder = NULL;
334 struct radeon_encoder *radeon_encoder = NULL; 418 struct radeon_encoder *radeon_encoder = NULL;
335 uint8_t frev, crev; 419 uint8_t frev, crev;
336 int index = GetIndexIntoMasterTable(COMMAND, SetPixelClock); 420 int index;
337 SET_PIXEL_CLOCK_PS_ALLOCATION args; 421 SET_PIXEL_CLOCK_PS_ALLOCATION args;
338 PIXEL_CLOCK_PARAMETERS *spc1_ptr; 422 PIXEL_CLOCK_PARAMETERS *spc1_ptr;
339 PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr; 423 PIXEL_CLOCK_PARAMETERS_V2 *spc2_ptr;
340 PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr; 424 PIXEL_CLOCK_PARAMETERS_V3 *spc3_ptr;
341 uint32_t sclock = mode->clock; 425 uint32_t pll_clock = mode->clock;
426 uint32_t adjusted_clock;
342 uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0; 427 uint32_t ref_div = 0, fb_div = 0, frac_fb_div = 0, post_div = 0;
343 struct radeon_pll *pll; 428 struct radeon_pll *pll;
344 int pll_flags = 0; 429 int pll_flags = 0;
@@ -346,8 +431,6 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
346 memset(&args, 0, sizeof(args)); 431 memset(&args, 0, sizeof(args));
347 432
348 if (ASIC_IS_AVIVO(rdev)) { 433 if (ASIC_IS_AVIVO(rdev)) {
349 uint32_t ss_cntl;
350
351 if ((rdev->family == CHIP_RS600) || 434 if ((rdev->family == CHIP_RS600) ||
352 (rdev->family == CHIP_RS690) || 435 (rdev->family == CHIP_RS690) ||
353 (rdev->family == CHIP_RS740)) 436 (rdev->family == CHIP_RS740))
@@ -358,15 +441,6 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
358 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV; 441 pll_flags |= RADEON_PLL_PREFER_HIGH_FB_DIV;
359 else 442 else
360 pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV; 443 pll_flags |= RADEON_PLL_PREFER_LOW_REF_DIV;
361
362 /* disable spread spectrum clocking for now -- thanks Hedy Lamarr */
363 if (radeon_crtc->crtc_id == 0) {
364 ss_cntl = RREG32(AVIVO_P1PLL_INT_SS_CNTL);
365 WREG32(AVIVO_P1PLL_INT_SS_CNTL, ss_cntl & ~1);
366 } else {
367 ss_cntl = RREG32(AVIVO_P2PLL_INT_SS_CNTL);
368 WREG32(AVIVO_P2PLL_INT_SS_CNTL, ss_cntl & ~1);
369 }
370 } else { 444 } else {
371 pll_flags |= RADEON_PLL_LEGACY; 445 pll_flags |= RADEON_PLL_LEGACY;
372 446
@@ -393,14 +467,43 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
393 } 467 }
394 } 468 }
395 469
470 /* DCE3+ has an AdjustDisplayPll that will adjust the pixel clock
471 * accordingly based on the encoder/transmitter to work around
472 * special hw requirements.
473 */
474 if (ASIC_IS_DCE3(rdev)) {
475 ADJUST_DISPLAY_PLL_PS_ALLOCATION adjust_pll_args;
476
477 if (!encoder)
478 return;
479
480 memset(&adjust_pll_args, 0, sizeof(adjust_pll_args));
481 adjust_pll_args.usPixelClock = cpu_to_le16(mode->clock / 10);
482 adjust_pll_args.ucTransmitterID = radeon_encoder->encoder_id;
483 adjust_pll_args.ucEncodeMode = atombios_get_encoder_mode(encoder);
484
485 index = GetIndexIntoMasterTable(COMMAND, AdjustDisplayPll);
486 atom_execute_table(rdev->mode_info.atom_context,
487 index, (uint32_t *)&adjust_pll_args);
488 adjusted_clock = le16_to_cpu(adjust_pll_args.usPixelClock) * 10;
489 } else {
490 /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */
491 if (ASIC_IS_AVIVO(rdev) &&
492 (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1))
493 adjusted_clock = mode->clock * 2;
494 else
495 adjusted_clock = mode->clock;
496 }
497
396 if (radeon_crtc->crtc_id == 0) 498 if (radeon_crtc->crtc_id == 0)
397 pll = &rdev->clock.p1pll; 499 pll = &rdev->clock.p1pll;
398 else 500 else
399 pll = &rdev->clock.p2pll; 501 pll = &rdev->clock.p2pll;
400 502
401 radeon_compute_pll(pll, mode->clock, &sclock, &fb_div, &frac_fb_div, 503 radeon_compute_pll(pll, adjusted_clock, &pll_clock, &fb_div, &frac_fb_div,
402 &ref_div, &post_div, pll_flags); 504 &ref_div, &post_div, pll_flags);
403 505
506 index = GetIndexIntoMasterTable(COMMAND, SetPixelClock);
404 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, 507 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev,
405 &crev); 508 &crev);
406 509
@@ -409,7 +512,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
409 switch (crev) { 512 switch (crev) {
410 case 1: 513 case 1:
411 spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput; 514 spc1_ptr = (PIXEL_CLOCK_PARAMETERS *) & args.sPCLKInput;
412 spc1_ptr->usPixelClock = cpu_to_le16(sclock); 515 spc1_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
413 spc1_ptr->usRefDiv = cpu_to_le16(ref_div); 516 spc1_ptr->usRefDiv = cpu_to_le16(ref_div);
414 spc1_ptr->usFbDiv = cpu_to_le16(fb_div); 517 spc1_ptr->usFbDiv = cpu_to_le16(fb_div);
415 spc1_ptr->ucFracFbDiv = frac_fb_div; 518 spc1_ptr->ucFracFbDiv = frac_fb_div;
@@ -422,7 +525,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
422 case 2: 525 case 2:
423 spc2_ptr = 526 spc2_ptr =
424 (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput; 527 (PIXEL_CLOCK_PARAMETERS_V2 *) & args.sPCLKInput;
425 spc2_ptr->usPixelClock = cpu_to_le16(sclock); 528 spc2_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
426 spc2_ptr->usRefDiv = cpu_to_le16(ref_div); 529 spc2_ptr->usRefDiv = cpu_to_le16(ref_div);
427 spc2_ptr->usFbDiv = cpu_to_le16(fb_div); 530 spc2_ptr->usFbDiv = cpu_to_le16(fb_div);
428 spc2_ptr->ucFracFbDiv = frac_fb_div; 531 spc2_ptr->ucFracFbDiv = frac_fb_div;
@@ -437,7 +540,7 @@ void atombios_crtc_set_pll(struct drm_crtc *crtc, struct drm_display_mode *mode)
437 return; 540 return;
438 spc3_ptr = 541 spc3_ptr =
439 (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput; 542 (PIXEL_CLOCK_PARAMETERS_V3 *) & args.sPCLKInput;
440 spc3_ptr->usPixelClock = cpu_to_le16(sclock); 543 spc3_ptr->usPixelClock = cpu_to_le16(mode->clock / 10);
441 spc3_ptr->usRefDiv = cpu_to_le16(ref_div); 544 spc3_ptr->usRefDiv = cpu_to_le16(ref_div);
442 spc3_ptr->usFbDiv = cpu_to_le16(fb_div); 545 spc3_ptr->usFbDiv = cpu_to_le16(fb_div);
443 spc3_ptr->ucFracFbDiv = frac_fb_div; 546 spc3_ptr->ucFracFbDiv = frac_fb_div;
@@ -527,6 +630,16 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
527 WREG32(AVIVO_D1VGA_CONTROL, 0); 630 WREG32(AVIVO_D1VGA_CONTROL, 0);
528 else 631 else
529 WREG32(AVIVO_D2VGA_CONTROL, 0); 632 WREG32(AVIVO_D2VGA_CONTROL, 0);
633
634 if (rdev->family >= CHIP_RV770) {
635 if (radeon_crtc->crtc_id) {
636 WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0);
637 WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0);
638 } else {
639 WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0);
640 WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0);
641 }
642 }
530 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset, 643 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
531 (u32) fb_location); 644 (u32) fb_location);
532 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + 645 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS +
@@ -563,6 +676,10 @@ int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
563 radeon_fb = to_radeon_framebuffer(old_fb); 676 radeon_fb = to_radeon_framebuffer(old_fb);
564 radeon_gem_object_unpin(radeon_fb->obj); 677 radeon_gem_object_unpin(radeon_fb->obj);
565 } 678 }
679
680 /* Bytes per pixel may have changed */
681 radeon_bandwidth_update(rdev);
682
566 return 0; 683 return 0;
567} 684}
568 685
@@ -574,134 +691,24 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc,
574 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 691 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
575 struct drm_device *dev = crtc->dev; 692 struct drm_device *dev = crtc->dev;
576 struct radeon_device *rdev = dev->dev_private; 693 struct radeon_device *rdev = dev->dev_private;
577 struct drm_encoder *encoder;
578 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION crtc_timing;
579 int need_tv_timings = 0;
580 bool ret;
581 694
582 /* TODO color tiling */ 695 /* TODO color tiling */
583 memset(&crtc_timing, 0, sizeof(crtc_timing));
584
585 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
586 /* find tv std */
587 if (encoder->crtc == crtc) {
588 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
589
590 if (radeon_encoder->active_device & ATOM_DEVICE_TV_SUPPORT) {
591 struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
592 if (tv_dac) {
593 if (tv_dac->tv_std == TV_STD_NTSC ||
594 tv_dac->tv_std == TV_STD_NTSC_J ||
595 tv_dac->tv_std == TV_STD_PAL_M)
596 need_tv_timings = 1;
597 else
598 need_tv_timings = 2;
599 break;
600 }
601 }
602 }
603 }
604
605 crtc_timing.ucCRTC = radeon_crtc->crtc_id;
606 if (need_tv_timings) {
607 ret = radeon_atom_get_tv_timings(rdev, need_tv_timings - 1,
608 &crtc_timing, &adjusted_mode->clock);
609 if (ret == false)
610 need_tv_timings = 0;
611 }
612
613 if (!need_tv_timings) {
614 crtc_timing.usH_Total = adjusted_mode->crtc_htotal;
615 crtc_timing.usH_Disp = adjusted_mode->crtc_hdisplay;
616 crtc_timing.usH_SyncStart = adjusted_mode->crtc_hsync_start;
617 crtc_timing.usH_SyncWidth =
618 adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
619
620 crtc_timing.usV_Total = adjusted_mode->crtc_vtotal;
621 crtc_timing.usV_Disp = adjusted_mode->crtc_vdisplay;
622 crtc_timing.usV_SyncStart = adjusted_mode->crtc_vsync_start;
623 crtc_timing.usV_SyncWidth =
624 adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
625
626 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
627 crtc_timing.susModeMiscInfo.usAccess |= ATOM_VSYNC_POLARITY;
628
629 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
630 crtc_timing.susModeMiscInfo.usAccess |= ATOM_HSYNC_POLARITY;
631
632 if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC)
633 crtc_timing.susModeMiscInfo.usAccess |= ATOM_COMPOSITESYNC;
634
635 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
636 crtc_timing.susModeMiscInfo.usAccess |= ATOM_INTERLACE;
637
638 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
639 crtc_timing.susModeMiscInfo.usAccess |= ATOM_DOUBLE_CLOCK_MODE;
640 }
641 696
697 atombios_set_ss(crtc, 0);
642 atombios_crtc_set_pll(crtc, adjusted_mode); 698 atombios_crtc_set_pll(crtc, adjusted_mode);
643 atombios_crtc_set_timing(crtc, &crtc_timing); 699 atombios_set_ss(crtc, 1);
700 atombios_crtc_set_timing(crtc, adjusted_mode);
644 701
645 if (ASIC_IS_AVIVO(rdev)) 702 if (ASIC_IS_AVIVO(rdev))
646 atombios_crtc_set_base(crtc, x, y, old_fb); 703 atombios_crtc_set_base(crtc, x, y, old_fb);
647 else { 704 else {
648 if (radeon_crtc->crtc_id == 0) { 705 if (radeon_crtc->crtc_id == 0)
649 SET_CRTC_USING_DTD_TIMING_PARAMETERS crtc_dtd_timing; 706 atombios_set_crtc_dtd_timing(crtc, adjusted_mode);
650 memset(&crtc_dtd_timing, 0, sizeof(crtc_dtd_timing));
651
652 /* setup FP shadow regs on R4xx */
653 crtc_dtd_timing.ucCRTC = radeon_crtc->crtc_id;
654 crtc_dtd_timing.usH_Size = adjusted_mode->crtc_hdisplay;
655 crtc_dtd_timing.usV_Size = adjusted_mode->crtc_vdisplay;
656 crtc_dtd_timing.usH_Blanking_Time =
657 adjusted_mode->crtc_hblank_end -
658 adjusted_mode->crtc_hdisplay;
659 crtc_dtd_timing.usV_Blanking_Time =
660 adjusted_mode->crtc_vblank_end -
661 adjusted_mode->crtc_vdisplay;
662 crtc_dtd_timing.usH_SyncOffset =
663 adjusted_mode->crtc_hsync_start -
664 adjusted_mode->crtc_hdisplay;
665 crtc_dtd_timing.usV_SyncOffset =
666 adjusted_mode->crtc_vsync_start -
667 adjusted_mode->crtc_vdisplay;
668 crtc_dtd_timing.usH_SyncWidth =
669 adjusted_mode->crtc_hsync_end -
670 adjusted_mode->crtc_hsync_start;
671 crtc_dtd_timing.usV_SyncWidth =
672 adjusted_mode->crtc_vsync_end -
673 adjusted_mode->crtc_vsync_start;
674 /* crtc_dtd_timing.ucH_Border = adjusted_mode->crtc_hborder; */
675 /* crtc_dtd_timing.ucV_Border = adjusted_mode->crtc_vborder; */
676
677 if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
678 crtc_dtd_timing.susModeMiscInfo.usAccess |=
679 ATOM_VSYNC_POLARITY;
680
681 if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
682 crtc_dtd_timing.susModeMiscInfo.usAccess |=
683 ATOM_HSYNC_POLARITY;
684
685 if (adjusted_mode->flags & DRM_MODE_FLAG_CSYNC)
686 crtc_dtd_timing.susModeMiscInfo.usAccess |=
687 ATOM_COMPOSITESYNC;
688
689 if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE)
690 crtc_dtd_timing.susModeMiscInfo.usAccess |=
691 ATOM_INTERLACE;
692
693 if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
694 crtc_dtd_timing.susModeMiscInfo.usAccess |=
695 ATOM_DOUBLE_CLOCK_MODE;
696
697 atombios_set_crtc_dtd_timing(crtc, &crtc_dtd_timing);
698 }
699 radeon_crtc_set_base(crtc, x, y, old_fb); 707 radeon_crtc_set_base(crtc, x, y, old_fb);
700 radeon_legacy_atom_set_surface(crtc); 708 radeon_legacy_atom_set_surface(crtc);
701 } 709 }
702 atombios_overscan_setup(crtc, mode, adjusted_mode); 710 atombios_overscan_setup(crtc, mode, adjusted_mode);
703 atombios_scaler_setup(crtc); 711 atombios_scaler_setup(crtc);
704 radeon_bandwidth_update(rdev);
705 return 0; 712 return 0;
706} 713}
707 714
diff --git a/drivers/gpu/drm/radeon/mkregtable.c b/drivers/gpu/drm/radeon/mkregtable.c
index fb211e585dea..0d79577c1576 100644
--- a/drivers/gpu/drm/radeon/mkregtable.c
+++ b/drivers/gpu/drm/radeon/mkregtable.c
@@ -561,7 +561,7 @@ struct table {
561 char *gpu_prefix; 561 char *gpu_prefix;
562}; 562};
563 563
564struct offset *offset_new(unsigned o) 564static struct offset *offset_new(unsigned o)
565{ 565{
566 struct offset *offset; 566 struct offset *offset;
567 567
@@ -573,12 +573,12 @@ struct offset *offset_new(unsigned o)
573 return offset; 573 return offset;
574} 574}
575 575
576void table_offset_add(struct table *t, struct offset *offset) 576static void table_offset_add(struct table *t, struct offset *offset)
577{ 577{
578 list_add_tail(&offset->list, &t->offsets); 578 list_add_tail(&offset->list, &t->offsets);
579} 579}
580 580
581void table_init(struct table *t) 581static void table_init(struct table *t)
582{ 582{
583 INIT_LIST_HEAD(&t->offsets); 583 INIT_LIST_HEAD(&t->offsets);
584 t->offset_max = 0; 584 t->offset_max = 0;
@@ -586,7 +586,7 @@ void table_init(struct table *t)
586 t->table = NULL; 586 t->table = NULL;
587} 587}
588 588
589void table_print(struct table *t) 589static void table_print(struct table *t)
590{ 590{
591 unsigned nlloop, i, j, n, c, id; 591 unsigned nlloop, i, j, n, c, id;
592 592
@@ -611,7 +611,7 @@ void table_print(struct table *t)
611 printf("};\n"); 611 printf("};\n");
612} 612}
613 613
614int table_build(struct table *t) 614static int table_build(struct table *t)
615{ 615{
616 struct offset *offset; 616 struct offset *offset;
617 unsigned i, m; 617 unsigned i, m;
@@ -631,7 +631,7 @@ int table_build(struct table *t)
631} 631}
632 632
633static char gpu_name[10]; 633static char gpu_name[10];
634int parser_auth(struct table *t, const char *filename) 634static int parser_auth(struct table *t, const char *filename)
635{ 635{
636 FILE *file; 636 FILE *file;
637 regex_t mask_rex; 637 regex_t mask_rex;
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 161094c07d94..c9e93eabcf16 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -186,7 +186,7 @@ static inline uint32_t r100_irq_ack(struct radeon_device *rdev)
186 186
187int r100_irq_process(struct radeon_device *rdev) 187int r100_irq_process(struct radeon_device *rdev)
188{ 188{
189 uint32_t status; 189 uint32_t status, msi_rearm;
190 190
191 status = r100_irq_ack(rdev); 191 status = r100_irq_ack(rdev);
192 if (!status) { 192 if (!status) {
@@ -209,6 +209,21 @@ int r100_irq_process(struct radeon_device *rdev)
209 } 209 }
210 status = r100_irq_ack(rdev); 210 status = r100_irq_ack(rdev);
211 } 211 }
212 if (rdev->msi_enabled) {
213 switch (rdev->family) {
214 case CHIP_RS400:
215 case CHIP_RS480:
216 msi_rearm = RREG32(RADEON_AIC_CNTL) & ~RS400_MSI_REARM;
217 WREG32(RADEON_AIC_CNTL, msi_rearm);
218 WREG32(RADEON_AIC_CNTL, msi_rearm | RS400_MSI_REARM);
219 break;
220 default:
221 msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
222 WREG32(RADEON_MSI_REARM_EN, msi_rearm);
223 WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
224 break;
225 }
226 }
212 return IRQ_HANDLED; 227 return IRQ_HANDLED;
213} 228}
214 229
@@ -240,7 +255,7 @@ int r100_wb_init(struct radeon_device *rdev)
240 int r; 255 int r;
241 256
242 if (rdev->wb.wb_obj == NULL) { 257 if (rdev->wb.wb_obj == NULL) {
243 r = radeon_object_create(rdev, NULL, 4096, 258 r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE,
244 true, 259 true,
245 RADEON_GEM_DOMAIN_GTT, 260 RADEON_GEM_DOMAIN_GTT,
246 false, &rdev->wb.wb_obj); 261 false, &rdev->wb.wb_obj);
@@ -563,19 +578,19 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
563 indirect1_start = 16; 578 indirect1_start = 16;
564 /* cp setup */ 579 /* cp setup */
565 WREG32(0x718, pre_write_timer | (pre_write_limit << 28)); 580 WREG32(0x718, pre_write_timer | (pre_write_limit << 28));
566 WREG32(RADEON_CP_RB_CNTL, 581 tmp = (REG_SET(RADEON_RB_BUFSZ, rb_bufsz) |
567#ifdef __BIG_ENDIAN
568 RADEON_BUF_SWAP_32BIT |
569#endif
570 REG_SET(RADEON_RB_BUFSZ, rb_bufsz) |
571 REG_SET(RADEON_RB_BLKSZ, rb_blksz) | 582 REG_SET(RADEON_RB_BLKSZ, rb_blksz) |
572 REG_SET(RADEON_MAX_FETCH, max_fetch) | 583 REG_SET(RADEON_MAX_FETCH, max_fetch) |
573 RADEON_RB_NO_UPDATE); 584 RADEON_RB_NO_UPDATE);
585#ifdef __BIG_ENDIAN
586 tmp |= RADEON_BUF_SWAP_32BIT;
587#endif
588 WREG32(RADEON_CP_RB_CNTL, tmp);
589
574 /* Set ring address */ 590 /* Set ring address */
575 DRM_INFO("radeon: ring at 0x%016lX\n", (unsigned long)rdev->cp.gpu_addr); 591 DRM_INFO("radeon: ring at 0x%016lX\n", (unsigned long)rdev->cp.gpu_addr);
576 WREG32(RADEON_CP_RB_BASE, rdev->cp.gpu_addr); 592 WREG32(RADEON_CP_RB_BASE, rdev->cp.gpu_addr);
577 /* Force read & write ptr to 0 */ 593 /* Force read & write ptr to 0 */
578 tmp = RREG32(RADEON_CP_RB_CNTL);
579 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA); 594 WREG32(RADEON_CP_RB_CNTL, tmp | RADEON_RB_RPTR_WR_ENA);
580 WREG32(RADEON_CP_RB_RPTR_WR, 0); 595 WREG32(RADEON_CP_RB_RPTR_WR, 0);
581 WREG32(RADEON_CP_RB_WPTR, 0); 596 WREG32(RADEON_CP_RB_WPTR, 0);
@@ -2364,7 +2379,7 @@ void r100_bandwidth_update(struct radeon_device *rdev)
2364 /* 2379 /*
2365 Find the total latency for the display data. 2380 Find the total latency for the display data.
2366 */ 2381 */
2367 disp_latency_overhead.full = rfixed_const(80); 2382 disp_latency_overhead.full = rfixed_const(8);
2368 disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff); 2383 disp_latency_overhead.full = rfixed_div(disp_latency_overhead, sclk_ff);
2369 mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full; 2384 mc_latency_mclk.full += disp_latency_overhead.full + cur_latency_mclk.full;
2370 mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full; 2385 mc_latency_sclk.full += disp_latency_overhead.full + cur_latency_sclk.full;
@@ -2562,8 +2577,11 @@ void r100_bandwidth_update(struct radeon_device *rdev)
2562static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t) 2577static inline void r100_cs_track_texture_print(struct r100_cs_track_texture *t)
2563{ 2578{
2564 DRM_ERROR("pitch %d\n", t->pitch); 2579 DRM_ERROR("pitch %d\n", t->pitch);
2580 DRM_ERROR("use_pitch %d\n", t->use_pitch);
2565 DRM_ERROR("width %d\n", t->width); 2581 DRM_ERROR("width %d\n", t->width);
2582 DRM_ERROR("width_11 %d\n", t->width_11);
2566 DRM_ERROR("height %d\n", t->height); 2583 DRM_ERROR("height %d\n", t->height);
2584 DRM_ERROR("height_11 %d\n", t->height_11);
2567 DRM_ERROR("num levels %d\n", t->num_levels); 2585 DRM_ERROR("num levels %d\n", t->num_levels);
2568 DRM_ERROR("depth %d\n", t->txdepth); 2586 DRM_ERROR("depth %d\n", t->txdepth);
2569 DRM_ERROR("bpp %d\n", t->cpp); 2587 DRM_ERROR("bpp %d\n", t->cpp);
@@ -2623,15 +2641,17 @@ static int r100_cs_track_texture_check(struct radeon_device *rdev,
2623 else 2641 else
2624 w = track->textures[u].pitch / (1 << i); 2642 w = track->textures[u].pitch / (1 << i);
2625 } else { 2643 } else {
2626 w = track->textures[u].width / (1 << i); 2644 w = track->textures[u].width;
2627 if (rdev->family >= CHIP_RV515) 2645 if (rdev->family >= CHIP_RV515)
2628 w |= track->textures[u].width_11; 2646 w |= track->textures[u].width_11;
2647 w = w / (1 << i);
2629 if (track->textures[u].roundup_w) 2648 if (track->textures[u].roundup_w)
2630 w = roundup_pow_of_two(w); 2649 w = roundup_pow_of_two(w);
2631 } 2650 }
2632 h = track->textures[u].height / (1 << i); 2651 h = track->textures[u].height;
2633 if (rdev->family >= CHIP_RV515) 2652 if (rdev->family >= CHIP_RV515)
2634 h |= track->textures[u].height_11; 2653 h |= track->textures[u].height_11;
2654 h = h / (1 << i);
2635 if (track->textures[u].roundup_h) 2655 if (track->textures[u].roundup_h)
2636 h = roundup_pow_of_two(h); 2656 h = roundup_pow_of_two(h);
2637 size += w * h; 2657 size += w * h;
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index e08c4a8974ca..2f43ee8e4048 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -113,7 +113,7 @@ int rv370_pcie_gart_enable(struct radeon_device *rdev)
113 tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD; 113 tmp = RADEON_PCIE_TX_GART_UNMAPPED_ACCESS_DISCARD;
114 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp); 114 WREG32_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp);
115 WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location); 115 WREG32_PCIE(RADEON_PCIE_TX_GART_START_LO, rdev->mc.gtt_location);
116 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - 4096; 116 tmp = rdev->mc.gtt_location + rdev->mc.gtt_size - RADEON_GPU_PAGE_SIZE;
117 WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp); 117 WREG32_PCIE(RADEON_PCIE_TX_GART_END_LO, tmp);
118 WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0); 118 WREG32_PCIE(RADEON_PCIE_TX_GART_START_HI, 0);
119 WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0); 119 WREG32_PCIE(RADEON_PCIE_TX_GART_END_HI, 0);
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 5c7fe52de30e..1cefdbcc0850 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -311,6 +311,8 @@ int r420_init(struct radeon_device *rdev)
311 } 311 }
312 /* Initialize clocks */ 312 /* Initialize clocks */
313 radeon_get_clock_info(rdev->ddev); 313 radeon_get_clock_info(rdev->ddev);
314 /* Initialize power management */
315 radeon_pm_init(rdev);
314 /* Get vram informations */ 316 /* Get vram informations */
315 r300_vram_info(rdev); 317 r300_vram_info(rdev);
316 /* Initialize memory controller (also test AGP) */ 318 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/r500_reg.h b/drivers/gpu/drm/radeon/r500_reg.h
index 868add6e166d..7baa73955563 100644
--- a/drivers/gpu/drm/radeon/r500_reg.h
+++ b/drivers/gpu/drm/radeon/r500_reg.h
@@ -384,9 +384,16 @@
384# define AVIVO_D1GRPH_TILED (1 << 20) 384# define AVIVO_D1GRPH_TILED (1 << 20)
385# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21) 385# define AVIVO_D1GRPH_MACRO_ADDRESS_MODE (1 << 21)
386 386
387/* The R7xx *_HIGH surface regs are backwards; the D1 regs are in the D2
388 * block and vice versa. This applies to GRPH, CUR, etc.
389 */
387#define AVIVO_D1GRPH_LUT_SEL 0x6108 390#define AVIVO_D1GRPH_LUT_SEL 0x6108
388#define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110 391#define AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS 0x6110
392#define R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6914
393#define R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x6114
389#define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118 394#define AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS 0x6118
395#define R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x691c
396#define R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x611c
390#define AVIVO_D1GRPH_PITCH 0x6120 397#define AVIVO_D1GRPH_PITCH 0x6120
391#define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124 398#define AVIVO_D1GRPH_SURFACE_OFFSET_X 0x6124
392#define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128 399#define AVIVO_D1GRPH_SURFACE_OFFSET_Y 0x6128
@@ -404,6 +411,8 @@
404# define AVIVO_D1CURSOR_MODE_MASK (3 << 8) 411# define AVIVO_D1CURSOR_MODE_MASK (3 << 8)
405# define AVIVO_D1CURSOR_MODE_24BPP 2 412# define AVIVO_D1CURSOR_MODE_24BPP 2
406#define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408 413#define AVIVO_D1CUR_SURFACE_ADDRESS 0x6408
414#define R700_D1CUR_SURFACE_ADDRESS_HIGH 0x6c0c
415#define R700_D2CUR_SURFACE_ADDRESS_HIGH 0x640c
407#define AVIVO_D1CUR_SIZE 0x6410 416#define AVIVO_D1CUR_SIZE 0x6410
408#define AVIVO_D1CUR_POSITION 0x6414 417#define AVIVO_D1CUR_POSITION 0x6414
409#define AVIVO_D1CUR_HOT_SPOT 0x6418 418#define AVIVO_D1CUR_HOT_SPOT 0x6418
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index a555b7b19b48..f7435185c0a6 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -260,6 +260,8 @@ int r520_init(struct radeon_device *rdev)
260 } 260 }
261 /* Initialize clocks */ 261 /* Initialize clocks */
262 radeon_get_clock_info(rdev->ddev); 262 radeon_get_clock_info(rdev->ddev);
263 /* Initialize power management */
264 radeon_pm_init(rdev);
263 /* Get vram informations */ 265 /* Get vram informations */
264 r520_vram_info(rdev); 266 r520_vram_info(rdev);
265 /* Initialize memory controller (also test AGP) */ 267 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 609719490ec2..278f646bc18e 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -339,11 +339,10 @@ int r600_mc_init(struct radeon_device *rdev)
339{ 339{
340 fixed20_12 a; 340 fixed20_12 a;
341 u32 tmp; 341 u32 tmp;
342 int chansize; 342 int chansize, numchan;
343 int r; 343 int r;
344 344
345 /* Get VRAM informations */ 345 /* Get VRAM informations */
346 rdev->mc.vram_width = 128;
347 rdev->mc.vram_is_ddr = true; 346 rdev->mc.vram_is_ddr = true;
348 tmp = RREG32(RAMCFG); 347 tmp = RREG32(RAMCFG);
349 if (tmp & CHANSIZE_OVERRIDE) { 348 if (tmp & CHANSIZE_OVERRIDE) {
@@ -353,17 +352,23 @@ int r600_mc_init(struct radeon_device *rdev)
353 } else { 352 } else {
354 chansize = 32; 353 chansize = 32;
355 } 354 }
356 if (rdev->family == CHIP_R600) { 355 tmp = RREG32(CHMAP);
357 rdev->mc.vram_width = 8 * chansize; 356 switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) {
358 } else if (rdev->family == CHIP_RV670) { 357 case 0:
359 rdev->mc.vram_width = 4 * chansize; 358 default:
360 } else if ((rdev->family == CHIP_RV610) || 359 numchan = 1;
361 (rdev->family == CHIP_RV620)) { 360 break;
362 rdev->mc.vram_width = chansize; 361 case 1:
363 } else if ((rdev->family == CHIP_RV630) || 362 numchan = 2;
364 (rdev->family == CHIP_RV635)) { 363 break;
365 rdev->mc.vram_width = 2 * chansize; 364 case 2:
365 numchan = 4;
366 break;
367 case 3:
368 numchan = 8;
369 break;
366 } 370 }
371 rdev->mc.vram_width = numchan * chansize;
367 /* Could aper size report 0 ? */ 372 /* Could aper size report 0 ? */
368 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 373 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
369 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 374 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
@@ -404,35 +409,29 @@ int r600_mc_init(struct radeon_device *rdev)
404 rdev->mc.gtt_location = rdev->mc.mc_vram_size; 409 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
405 } 410 }
406 } else { 411 } else {
407 if (rdev->family == CHIP_RS780 || rdev->family == CHIP_RS880) { 412 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
408 rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) & 413 rdev->mc.vram_location = (RREG32(MC_VM_FB_LOCATION) &
409 0xFFFF) << 24; 414 0xFFFF) << 24;
410 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024; 415 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size;
411 tmp = rdev->mc.vram_location + rdev->mc.mc_vram_size; 416 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) {
412 if ((0xFFFFFFFFUL - tmp) >= rdev->mc.gtt_size) { 417 /* Enough place after vram */
413 /* Enough place after vram */ 418 rdev->mc.gtt_location = tmp;
414 rdev->mc.gtt_location = tmp; 419 } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) {
415 } else if (rdev->mc.vram_location >= rdev->mc.gtt_size) { 420 /* Enough place before vram */
416 /* Enough place before vram */ 421 rdev->mc.gtt_location = 0;
422 } else {
423 /* Not enough place after or before shrink
424 * gart size
425 */
426 if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) {
417 rdev->mc.gtt_location = 0; 427 rdev->mc.gtt_location = 0;
428 rdev->mc.gtt_size = rdev->mc.vram_location;
418 } else { 429 } else {
419 /* Not enough place after or before shrink 430 rdev->mc.gtt_location = tmp;
420 * gart size 431 rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp;
421 */
422 if (rdev->mc.vram_location > (0xFFFFFFFFUL - tmp)) {
423 rdev->mc.gtt_location = 0;
424 rdev->mc.gtt_size = rdev->mc.vram_location;
425 } else {
426 rdev->mc.gtt_location = tmp;
427 rdev->mc.gtt_size = 0xFFFFFFFFUL - tmp;
428 }
429 } 432 }
430 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
431 } else {
432 rdev->mc.vram_location = 0x00000000UL;
433 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
434 rdev->mc.gtt_size = radeon_gart_size * 1024 * 1024;
435 } 433 }
434 rdev->mc.gtt_location = rdev->mc.mc_vram_size;
436 } 435 }
437 rdev->mc.vram_start = rdev->mc.vram_location; 436 rdev->mc.vram_start = rdev->mc.vram_location;
438 rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1; 437 rdev->mc.vram_end = rdev->mc.vram_location + rdev->mc.mc_vram_size - 1;
@@ -859,7 +858,8 @@ void r600_gpu_init(struct radeon_device *rdev)
859 ((rdev->family) == CHIP_RV630) || 858 ((rdev->family) == CHIP_RV630) ||
860 ((rdev->family) == CHIP_RV610) || 859 ((rdev->family) == CHIP_RV610) ||
861 ((rdev->family) == CHIP_RV620) || 860 ((rdev->family) == CHIP_RV620) ||
862 ((rdev->family) == CHIP_RS780)) { 861 ((rdev->family) == CHIP_RS780) ||
862 ((rdev->family) == CHIP_RS880)) {
863 WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE); 863 WREG32(DB_DEBUG, PREZ_MUST_WAIT_FOR_POSTZ_DONE);
864 } else { 864 } else {
865 WREG32(DB_DEBUG, 0); 865 WREG32(DB_DEBUG, 0);
@@ -876,7 +876,8 @@ void r600_gpu_init(struct radeon_device *rdev)
876 tmp = RREG32(SQ_MS_FIFO_SIZES); 876 tmp = RREG32(SQ_MS_FIFO_SIZES);
877 if (((rdev->family) == CHIP_RV610) || 877 if (((rdev->family) == CHIP_RV610) ||
878 ((rdev->family) == CHIP_RV620) || 878 ((rdev->family) == CHIP_RV620) ||
879 ((rdev->family) == CHIP_RS780)) { 879 ((rdev->family) == CHIP_RS780) ||
880 ((rdev->family) == CHIP_RS880)) {
880 tmp = (CACHE_FIFO_SIZE(0xa) | 881 tmp = (CACHE_FIFO_SIZE(0xa) |
881 FETCH_FIFO_HIWATER(0xa) | 882 FETCH_FIFO_HIWATER(0xa) |
882 DONE_FIFO_HIWATER(0xe0) | 883 DONE_FIFO_HIWATER(0xe0) |
@@ -919,7 +920,8 @@ void r600_gpu_init(struct radeon_device *rdev)
919 NUM_ES_STACK_ENTRIES(0)); 920 NUM_ES_STACK_ENTRIES(0));
920 } else if (((rdev->family) == CHIP_RV610) || 921 } else if (((rdev->family) == CHIP_RV610) ||
921 ((rdev->family) == CHIP_RV620) || 922 ((rdev->family) == CHIP_RV620) ||
922 ((rdev->family) == CHIP_RS780)) { 923 ((rdev->family) == CHIP_RS780) ||
924 ((rdev->family) == CHIP_RS880)) {
923 /* no vertex cache */ 925 /* no vertex cache */
924 sq_config &= ~VC_ENABLE; 926 sq_config &= ~VC_ENABLE;
925 927
@@ -976,7 +978,8 @@ void r600_gpu_init(struct radeon_device *rdev)
976 978
977 if (((rdev->family) == CHIP_RV610) || 979 if (((rdev->family) == CHIP_RV610) ||
978 ((rdev->family) == CHIP_RV620) || 980 ((rdev->family) == CHIP_RV620) ||
979 ((rdev->family) == CHIP_RS780)) { 981 ((rdev->family) == CHIP_RS780) ||
982 ((rdev->family) == CHIP_RS880)) {
980 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY)); 983 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(TC_ONLY));
981 } else { 984 } else {
982 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC)); 985 WREG32(VGT_CACHE_INVALIDATION, CACHE_INVALIDATION(VC_AND_TC));
@@ -1002,8 +1005,9 @@ void r600_gpu_init(struct radeon_device *rdev)
1002 tmp = rdev->config.r600.max_pipes * 16; 1005 tmp = rdev->config.r600.max_pipes * 16;
1003 switch (rdev->family) { 1006 switch (rdev->family) {
1004 case CHIP_RV610: 1007 case CHIP_RV610:
1005 case CHIP_RS780:
1006 case CHIP_RV620: 1008 case CHIP_RV620:
1009 case CHIP_RS780:
1010 case CHIP_RS880:
1007 tmp += 32; 1011 tmp += 32;
1008 break; 1012 break;
1009 case CHIP_RV670: 1013 case CHIP_RV670:
@@ -1044,8 +1048,9 @@ void r600_gpu_init(struct radeon_device *rdev)
1044 1048
1045 switch (rdev->family) { 1049 switch (rdev->family) {
1046 case CHIP_RV610: 1050 case CHIP_RV610:
1047 case CHIP_RS780:
1048 case CHIP_RV620: 1051 case CHIP_RV620:
1052 case CHIP_RS780:
1053 case CHIP_RS880:
1049 tmp = TC_L2_SIZE(8); 1054 tmp = TC_L2_SIZE(8);
1050 break; 1055 break;
1051 case CHIP_RV630: 1056 case CHIP_RV630:
@@ -1267,19 +1272,17 @@ int r600_cp_resume(struct radeon_device *rdev)
1267 1272
1268 /* Set ring buffer size */ 1273 /* Set ring buffer size */
1269 rb_bufsz = drm_order(rdev->cp.ring_size / 8); 1274 rb_bufsz = drm_order(rdev->cp.ring_size / 8);
1275 tmp = RB_NO_UPDATE | (drm_order(RADEON_GPU_PAGE_SIZE/8) << 8) | rb_bufsz;
1270#ifdef __BIG_ENDIAN 1276#ifdef __BIG_ENDIAN
1271 WREG32(CP_RB_CNTL, BUF_SWAP_32BIT | RB_NO_UPDATE | 1277 tmp |= BUF_SWAP_32BIT;
1272 (drm_order(4096/8) << 8) | rb_bufsz);
1273#else
1274 WREG32(CP_RB_CNTL, RB_NO_UPDATE | (drm_order(4096/8) << 8) | rb_bufsz);
1275#endif 1278#endif
1279 WREG32(CP_RB_CNTL, tmp);
1276 WREG32(CP_SEM_WAIT_TIMER, 0x4); 1280 WREG32(CP_SEM_WAIT_TIMER, 0x4);
1277 1281
1278 /* Set the write pointer delay */ 1282 /* Set the write pointer delay */
1279 WREG32(CP_RB_WPTR_DELAY, 0); 1283 WREG32(CP_RB_WPTR_DELAY, 0);
1280 1284
1281 /* Initialize the ring buffer's read and write pointers */ 1285 /* Initialize the ring buffer's read and write pointers */
1282 tmp = RREG32(CP_RB_CNTL);
1283 WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); 1286 WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA);
1284 WREG32(CP_RB_RPTR_WR, 0); 1287 WREG32(CP_RB_RPTR_WR, 0);
1285 WREG32(CP_RB_WPTR, 0); 1288 WREG32(CP_RB_WPTR, 0);
@@ -1400,7 +1403,7 @@ int r600_wb_enable(struct radeon_device *rdev)
1400 int r; 1403 int r;
1401 1404
1402 if (rdev->wb.wb_obj == NULL) { 1405 if (rdev->wb.wb_obj == NULL) {
1403 r = radeon_object_create(rdev, NULL, 4096, true, 1406 r = radeon_object_create(rdev, NULL, RADEON_GPU_PAGE_SIZE, true,
1404 RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj); 1407 RADEON_GEM_DOMAIN_GTT, false, &rdev->wb.wb_obj);
1405 if (r) { 1408 if (r) {
1406 dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r); 1409 dev_warn(rdev->dev, "failed to create WB buffer (%d).\n", r);
@@ -1450,8 +1453,8 @@ int r600_copy_blit(struct radeon_device *rdev,
1450 uint64_t src_offset, uint64_t dst_offset, 1453 uint64_t src_offset, uint64_t dst_offset,
1451 unsigned num_pages, struct radeon_fence *fence) 1454 unsigned num_pages, struct radeon_fence *fence)
1452{ 1455{
1453 r600_blit_prepare_copy(rdev, num_pages * 4096); 1456 r600_blit_prepare_copy(rdev, num_pages * RADEON_GPU_PAGE_SIZE);
1454 r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * 4096); 1457 r600_kms_blit_copy(rdev, src_offset, dst_offset, num_pages * RADEON_GPU_PAGE_SIZE);
1455 r600_blit_done_copy(rdev, fence); 1458 r600_blit_done_copy(rdev, fence);
1456 return 0; 1459 return 0;
1457} 1460}
@@ -1632,10 +1635,13 @@ int r600_init(struct radeon_device *rdev)
1632 r600_scratch_init(rdev); 1635 r600_scratch_init(rdev);
1633 /* Initialize surface registers */ 1636 /* Initialize surface registers */
1634 radeon_surface_init(rdev); 1637 radeon_surface_init(rdev);
1638 /* Initialize clocks */
1635 radeon_get_clock_info(rdev->ddev); 1639 radeon_get_clock_info(rdev->ddev);
1636 r = radeon_clocks_init(rdev); 1640 r = radeon_clocks_init(rdev);
1637 if (r) 1641 if (r)
1638 return r; 1642 return r;
1643 /* Initialize power management */
1644 radeon_pm_init(rdev);
1639 /* Fence driver */ 1645 /* Fence driver */
1640 r = radeon_fence_driver_init(rdev); 1646 r = radeon_fence_driver_init(rdev);
1641 if (r) 1647 if (r)
diff --git a/drivers/gpu/drm/radeon/r600_blit.c b/drivers/gpu/drm/radeon/r600_blit.c
index dec501081608..5ea432347589 100644
--- a/drivers/gpu/drm/radeon/r600_blit.c
+++ b/drivers/gpu/drm/radeon/r600_blit.c
@@ -582,6 +582,8 @@ r600_blit_copy(struct drm_device *dev,
582 u64 vb_addr; 582 u64 vb_addr;
583 u32 *vb; 583 u32 *vb;
584 584
585 vb = r600_nomm_get_vb_ptr(dev);
586
585 if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { 587 if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
586 max_bytes = 8192; 588 max_bytes = 8192;
587 589
@@ -617,8 +619,8 @@ r600_blit_copy(struct drm_device *dev,
617 if (!dev_priv->blit_vb) 619 if (!dev_priv->blit_vb)
618 return; 620 return;
619 set_shaders(dev); 621 set_shaders(dev);
622 vb = r600_nomm_get_vb_ptr(dev);
620 } 623 }
621 vb = r600_nomm_get_vb_ptr(dev);
622 624
623 vb[0] = i2f(dst_x); 625 vb[0] = i2f(dst_x);
624 vb[1] = 0; 626 vb[1] = 0;
@@ -706,8 +708,8 @@ r600_blit_copy(struct drm_device *dev,
706 return; 708 return;
707 709
708 set_shaders(dev); 710 set_shaders(dev);
711 vb = r600_nomm_get_vb_ptr(dev);
709 } 712 }
710 vb = r600_nomm_get_vb_ptr(dev);
711 713
712 vb[0] = i2f(dst_x / 4); 714 vb[0] = i2f(dst_x / 4);
713 vb[1] = 0; 715 vb[1] = 0;
@@ -772,6 +774,7 @@ r600_blit_swap(struct drm_device *dev,
772{ 774{
773 drm_radeon_private_t *dev_priv = dev->dev_private; 775 drm_radeon_private_t *dev_priv = dev->dev_private;
774 int cb_format, tex_format; 776 int cb_format, tex_format;
777 int sx2, sy2, dx2, dy2;
775 u64 vb_addr; 778 u64 vb_addr;
776 u32 *vb; 779 u32 *vb;
777 780
@@ -786,16 +789,10 @@ r600_blit_swap(struct drm_device *dev,
786 } 789 }
787 vb = r600_nomm_get_vb_ptr(dev); 790 vb = r600_nomm_get_vb_ptr(dev);
788 791
789 if (cpp == 4) { 792 sx2 = sx + w;
790 cb_format = COLOR_8_8_8_8; 793 sy2 = sy + h;
791 tex_format = FMT_8_8_8_8; 794 dx2 = dx + w;
792 } else if (cpp == 2) { 795 dy2 = dy + h;
793 cb_format = COLOR_5_6_5;
794 tex_format = FMT_5_6_5;
795 } else {
796 cb_format = COLOR_8;
797 tex_format = FMT_8;
798 }
799 796
800 vb[0] = i2f(dx); 797 vb[0] = i2f(dx);
801 vb[1] = i2f(dy); 798 vb[1] = i2f(dy);
@@ -803,31 +800,46 @@ r600_blit_swap(struct drm_device *dev,
803 vb[3] = i2f(sy); 800 vb[3] = i2f(sy);
804 801
805 vb[4] = i2f(dx); 802 vb[4] = i2f(dx);
806 vb[5] = i2f(dy + h); 803 vb[5] = i2f(dy2);
807 vb[6] = i2f(sx); 804 vb[6] = i2f(sx);
808 vb[7] = i2f(sy + h); 805 vb[7] = i2f(sy2);
806
807 vb[8] = i2f(dx2);
808 vb[9] = i2f(dy2);
809 vb[10] = i2f(sx2);
810 vb[11] = i2f(sy2);
809 811
810 vb[8] = i2f(dx + w); 812 switch(cpp) {
811 vb[9] = i2f(dy + h); 813 case 4:
812 vb[10] = i2f(sx + w); 814 cb_format = COLOR_8_8_8_8;
813 vb[11] = i2f(sy + h); 815 tex_format = FMT_8_8_8_8;
816 break;
817 case 2:
818 cb_format = COLOR_5_6_5;
819 tex_format = FMT_5_6_5;
820 break;
821 default:
822 cb_format = COLOR_8;
823 tex_format = FMT_8;
824 break;
825 }
814 826
815 /* src */ 827 /* src */
816 set_tex_resource(dev_priv, tex_format, 828 set_tex_resource(dev_priv, tex_format,
817 src_pitch / cpp, 829 src_pitch / cpp,
818 sy + h, src_pitch / cpp, 830 sy2, src_pitch / cpp,
819 src_gpu_addr); 831 src_gpu_addr);
820 832
821 cp_set_surface_sync(dev_priv, 833 cp_set_surface_sync(dev_priv,
822 R600_TC_ACTION_ENA, (src_pitch * (sy + h)), src_gpu_addr); 834 R600_TC_ACTION_ENA, src_pitch * sy2, src_gpu_addr);
823 835
824 /* dst */ 836 /* dst */
825 set_render_target(dev_priv, cb_format, 837 set_render_target(dev_priv, cb_format,
826 dst_pitch / cpp, dy + h, 838 dst_pitch / cpp, dy2,
827 dst_gpu_addr); 839 dst_gpu_addr);
828 840
829 /* scissors */ 841 /* scissors */
830 set_scissors(dev_priv, dx, dy, dx + w, dy + h); 842 set_scissors(dev_priv, dx, dy, dx2, dy2);
831 843
832 /* Vertex buffer setup */ 844 /* Vertex buffer setup */
833 vb_addr = dev_priv->gart_buffers_offset + 845 vb_addr = dev_priv->gart_buffers_offset +
@@ -840,7 +852,7 @@ r600_blit_swap(struct drm_device *dev,
840 852
841 cp_set_surface_sync(dev_priv, 853 cp_set_surface_sync(dev_priv,
842 R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA, 854 R600_CB_ACTION_ENA | R600_CB0_DEST_BASE_ENA,
843 dst_pitch * (dy + h), dst_gpu_addr); 855 dst_pitch * dy2, dst_gpu_addr);
844 856
845 dev_priv->blit_vb->used += 12 * 4; 857 dev_priv->blit_vb->used += 12 * 4;
846} 858}
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index 93108bb31d1d..dbf716e1fbf3 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -368,7 +368,7 @@ set_default_state(struct radeon_device *rdev)
368 if ((rdev->family == CHIP_RV610) || 368 if ((rdev->family == CHIP_RV610) ||
369 (rdev->family == CHIP_RV620) || 369 (rdev->family == CHIP_RV620) ||
370 (rdev->family == CHIP_RS780) || 370 (rdev->family == CHIP_RS780) ||
371 (rdev->family == CHIP_RS780) || 371 (rdev->family == CHIP_RS880) ||
372 (rdev->family == CHIP_RV710)) 372 (rdev->family == CHIP_RV710))
373 sq_config = 0; 373 sq_config = 0;
374 else 374 else
@@ -610,6 +610,7 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
610 610
611 DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr, 611 DRM_DEBUG("emitting copy %16llx %16llx %d %d\n", src_gpu_addr, dst_gpu_addr,
612 size_bytes, rdev->r600_blit.vb_used); 612 size_bytes, rdev->r600_blit.vb_used);
613 vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used);
613 if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) { 614 if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
614 max_bytes = 8192; 615 max_bytes = 8192;
615 616
@@ -652,7 +653,6 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
652 vb = r600_nomm_get_vb_ptr(dev); 653 vb = r600_nomm_get_vb_ptr(dev);
653#endif 654#endif
654 } 655 }
655 vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used);
656 656
657 vb[0] = i2f(dst_x); 657 vb[0] = i2f(dst_x);
658 vb[1] = 0; 658 vb[1] = 0;
@@ -747,7 +747,6 @@ void r600_kms_blit_copy(struct radeon_device *rdev,
747 vb = r600_nomm_get_vb_ptr(dev); 747 vb = r600_nomm_get_vb_ptr(dev);
748 } 748 }
749#endif 749#endif
750 vb = (u32 *)(rdev->r600_blit.vb_ib->ptr + rdev->r600_blit.vb_used);
751 750
752 vb[0] = i2f(dst_x / 4); 751 vb[0] = i2f(dst_x / 4);
753 vb[1] = 0; 752 vb[1] = 0;
diff --git a/drivers/gpu/drm/radeon/r600_cs.c b/drivers/gpu/drm/radeon/r600_cs.c
index 17e42195c632..0d820764f340 100644
--- a/drivers/gpu/drm/radeon/r600_cs.c
+++ b/drivers/gpu/drm/radeon/r600_cs.c
@@ -466,6 +466,23 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
466 for (i = 0; i < pkt->count; i++) { 466 for (i = 0; i < pkt->count; i++) {
467 reg = start_reg + (4 * i); 467 reg = start_reg + (4 * i);
468 switch (reg) { 468 switch (reg) {
469 case SQ_ESGS_RING_BASE:
470 case SQ_GSVS_RING_BASE:
471 case SQ_ESTMP_RING_BASE:
472 case SQ_GSTMP_RING_BASE:
473 case SQ_VSTMP_RING_BASE:
474 case SQ_PSTMP_RING_BASE:
475 case SQ_FBUF_RING_BASE:
476 case SQ_REDUC_RING_BASE:
477 case SX_MEMORY_EXPORT_BASE:
478 r = r600_cs_packet_next_reloc(p, &reloc);
479 if (r) {
480 DRM_ERROR("bad SET_CONFIG_REG "
481 "0x%04X\n", reg);
482 return -EINVAL;
483 }
484 ib[idx+1+i] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);
485 break;
469 case CP_COHER_BASE: 486 case CP_COHER_BASE:
470 /* use PACKET3_SURFACE_SYNC */ 487 /* use PACKET3_SURFACE_SYNC */
471 return -EINVAL; 488 return -EINVAL;
@@ -487,6 +504,7 @@ static int r600_packet3_check(struct radeon_cs_parser *p,
487 reg = start_reg + (4 * i); 504 reg = start_reg + (4 * i);
488 switch (reg) { 505 switch (reg) {
489 case DB_DEPTH_BASE: 506 case DB_DEPTH_BASE:
507 case DB_HTILE_DATA_BASE:
490 case CB_COLOR0_BASE: 508 case CB_COLOR0_BASE:
491 case CB_COLOR1_BASE: 509 case CB_COLOR1_BASE:
492 case CB_COLOR2_BASE: 510 case CB_COLOR2_BASE:
diff --git a/drivers/gpu/drm/radeon/r600d.h b/drivers/gpu/drm/radeon/r600d.h
index 9b64d47f1f82..27ab428b149b 100644
--- a/drivers/gpu/drm/radeon/r600d.h
+++ b/drivers/gpu/drm/radeon/r600d.h
@@ -119,6 +119,7 @@
119#define DB_DEBUG 0x9830 119#define DB_DEBUG 0x9830
120#define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31) 120#define PREZ_MUST_WAIT_FOR_POSTZ_DONE (1 << 31)
121#define DB_DEPTH_BASE 0x2800C 121#define DB_DEPTH_BASE 0x2800C
122#define DB_HTILE_DATA_BASE 0x28014
122#define DB_WATERMARKS 0x9838 123#define DB_WATERMARKS 0x9838
123#define DEPTH_FREE(x) ((x) << 0) 124#define DEPTH_FREE(x) ((x) << 0)
124#define DEPTH_FLUSH(x) ((x) << 5) 125#define DEPTH_FLUSH(x) ((x) << 5)
@@ -171,6 +172,14 @@
171#define SQ_STACK_RESOURCE_MGMT_2 0x8c14 172#define SQ_STACK_RESOURCE_MGMT_2 0x8c14
172# define NUM_GS_STACK_ENTRIES(x) ((x) << 0) 173# define NUM_GS_STACK_ENTRIES(x) ((x) << 0)
173# define NUM_ES_STACK_ENTRIES(x) ((x) << 16) 174# define NUM_ES_STACK_ENTRIES(x) ((x) << 16)
175#define SQ_ESGS_RING_BASE 0x8c40
176#define SQ_GSVS_RING_BASE 0x8c48
177#define SQ_ESTMP_RING_BASE 0x8c50
178#define SQ_GSTMP_RING_BASE 0x8c58
179#define SQ_VSTMP_RING_BASE 0x8c60
180#define SQ_PSTMP_RING_BASE 0x8c68
181#define SQ_FBUF_RING_BASE 0x8c70
182#define SQ_REDUC_RING_BASE 0x8c78
174 183
175#define GRBM_CNTL 0x8000 184#define GRBM_CNTL 0x8000
176# define GRBM_READ_TIMEOUT(x) ((x) << 0) 185# define GRBM_READ_TIMEOUT(x) ((x) << 0)
@@ -271,6 +280,10 @@
271#define PCIE_PORT_INDEX 0x0038 280#define PCIE_PORT_INDEX 0x0038
272#define PCIE_PORT_DATA 0x003C 281#define PCIE_PORT_DATA 0x003C
273 282
283#define CHMAP 0x2004
284#define NOOFCHAN_SHIFT 12
285#define NOOFCHAN_MASK 0x00003000
286
274#define RAMCFG 0x2408 287#define RAMCFG 0x2408
275#define NOOFBANK_SHIFT 0 288#define NOOFBANK_SHIFT 0
276#define NOOFBANK_MASK 0x00000001 289#define NOOFBANK_MASK 0x00000001
@@ -352,6 +365,7 @@
352 365
353 366
354#define SX_MISC 0x28350 367#define SX_MISC 0x28350
368#define SX_MEMORY_EXPORT_BASE 0x9010
355#define SX_DEBUG_1 0x9054 369#define SX_DEBUG_1 0x9054
356#define SMX_EVENT_RELEASE (1 << 0) 370#define SMX_EVENT_RELEASE (1 << 0)
357#define ENABLE_NEW_SMX_ADDRESS (1 << 16) 371#define ENABLE_NEW_SMX_ADDRESS (1 << 16)
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5ab35b81c86b..757f5cd37744 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -139,6 +139,10 @@ struct radeon_clock {
139 uint32_t default_sclk; 139 uint32_t default_sclk;
140}; 140};
141 141
142/*
143 * Power management
144 */
145int radeon_pm_init(struct radeon_device *rdev);
142 146
143/* 147/*
144 * Fences. 148 * Fences.
@@ -276,6 +280,8 @@ union radeon_gart_table {
276 struct radeon_gart_table_vram vram; 280 struct radeon_gart_table_vram vram;
277}; 281};
278 282
283#define RADEON_GPU_PAGE_SIZE 4096
284
279struct radeon_gart { 285struct radeon_gart {
280 dma_addr_t table_addr; 286 dma_addr_t table_addr;
281 unsigned num_gpu_pages; 287 unsigned num_gpu_pages;
@@ -621,7 +627,9 @@ struct radeon_asic {
621 uint64_t dst_offset, 627 uint64_t dst_offset,
622 unsigned num_pages, 628 unsigned num_pages,
623 struct radeon_fence *fence); 629 struct radeon_fence *fence);
630 uint32_t (*get_engine_clock)(struct radeon_device *rdev);
624 void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock); 631 void (*set_engine_clock)(struct radeon_device *rdev, uint32_t eng_clock);
632 uint32_t (*get_memory_clock)(struct radeon_device *rdev);
625 void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock); 633 void (*set_memory_clock)(struct radeon_device *rdev, uint32_t mem_clock);
626 void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes); 634 void (*set_pcie_lanes)(struct radeon_device *rdev, int lanes);
627 void (*set_clock_gating)(struct radeon_device *rdev, int enable); 635 void (*set_clock_gating)(struct radeon_device *rdev, int enable);
@@ -783,6 +791,7 @@ struct radeon_device {
783 const struct firmware *me_fw; /* all family ME firmware */ 791 const struct firmware *me_fw; /* all family ME firmware */
784 const struct firmware *pfp_fw; /* r6/700 PFP firmware */ 792 const struct firmware *pfp_fw; /* r6/700 PFP firmware */
785 struct r600_blit r600_blit; 793 struct r600_blit r600_blit;
794 int msi_enabled; /* msi enabled */
786}; 795};
787 796
788int radeon_device_init(struct radeon_device *rdev, 797int radeon_device_init(struct radeon_device *rdev,
@@ -952,7 +961,9 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
952#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f)) 961#define radeon_copy_blit(rdev, s, d, np, f) (rdev)->asic->copy_blit((rdev), (s), (d), (np), (f))
953#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f)) 962#define radeon_copy_dma(rdev, s, d, np, f) (rdev)->asic->copy_dma((rdev), (s), (d), (np), (f))
954#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f)) 963#define radeon_copy(rdev, s, d, np, f) (rdev)->asic->copy((rdev), (s), (d), (np), (f))
964#define radeon_get_engine_clock(rdev) (rdev)->asic->get_engine_clock((rdev))
955#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) 965#define radeon_set_engine_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
966#define radeon_get_memory_clock(rdev) (rdev)->asic->get_memory_clock((rdev))
956#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e)) 967#define radeon_set_memory_clock(rdev, e) (rdev)->asic->set_engine_clock((rdev), (e))
957#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l)) 968#define radeon_set_pcie_lanes(rdev, l) (rdev)->asic->set_pcie_lanes((rdev), (l))
958#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e)) 969#define radeon_set_clock_gating(rdev, e) (rdev)->asic->set_clock_gating((rdev), (e))
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index c3532c7a6f3f..c18fbee387d7 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -31,10 +31,13 @@
31/* 31/*
32 * common functions 32 * common functions
33 */ 33 */
34uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
34void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); 35void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
35void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable); 36void radeon_legacy_set_clock_gating(struct radeon_device *rdev, int enable);
36 37
38uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
37void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock); 39void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
40uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev);
38void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock); 41void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock);
39void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable); 42void radeon_atom_set_clock_gating(struct radeon_device *rdev, int enable);
40 43
@@ -95,7 +98,9 @@ static struct radeon_asic r100_asic = {
95 .copy_blit = &r100_copy_blit, 98 .copy_blit = &r100_copy_blit,
96 .copy_dma = NULL, 99 .copy_dma = NULL,
97 .copy = &r100_copy_blit, 100 .copy = &r100_copy_blit,
101 .get_engine_clock = &radeon_legacy_get_engine_clock,
98 .set_engine_clock = &radeon_legacy_set_engine_clock, 102 .set_engine_clock = &radeon_legacy_set_engine_clock,
103 .get_memory_clock = NULL,
99 .set_memory_clock = NULL, 104 .set_memory_clock = NULL,
100 .set_pcie_lanes = NULL, 105 .set_pcie_lanes = NULL,
101 .set_clock_gating = &radeon_legacy_set_clock_gating, 106 .set_clock_gating = &radeon_legacy_set_clock_gating,
@@ -148,7 +153,9 @@ static struct radeon_asic r300_asic = {
148 .copy_blit = &r100_copy_blit, 153 .copy_blit = &r100_copy_blit,
149 .copy_dma = &r300_copy_dma, 154 .copy_dma = &r300_copy_dma,
150 .copy = &r100_copy_blit, 155 .copy = &r100_copy_blit,
156 .get_engine_clock = &radeon_legacy_get_engine_clock,
151 .set_engine_clock = &radeon_legacy_set_engine_clock, 157 .set_engine_clock = &radeon_legacy_set_engine_clock,
158 .get_memory_clock = NULL,
152 .set_memory_clock = NULL, 159 .set_memory_clock = NULL,
153 .set_pcie_lanes = &rv370_set_pcie_lanes, 160 .set_pcie_lanes = &rv370_set_pcie_lanes,
154 .set_clock_gating = &radeon_legacy_set_clock_gating, 161 .set_clock_gating = &radeon_legacy_set_clock_gating,
@@ -185,7 +192,9 @@ static struct radeon_asic r420_asic = {
185 .copy_blit = &r100_copy_blit, 192 .copy_blit = &r100_copy_blit,
186 .copy_dma = &r300_copy_dma, 193 .copy_dma = &r300_copy_dma,
187 .copy = &r100_copy_blit, 194 .copy = &r100_copy_blit,
195 .get_engine_clock = &radeon_atom_get_engine_clock,
188 .set_engine_clock = &radeon_atom_set_engine_clock, 196 .set_engine_clock = &radeon_atom_set_engine_clock,
197 .get_memory_clock = &radeon_atom_get_memory_clock,
189 .set_memory_clock = &radeon_atom_set_memory_clock, 198 .set_memory_clock = &radeon_atom_set_memory_clock,
190 .set_pcie_lanes = &rv370_set_pcie_lanes, 199 .set_pcie_lanes = &rv370_set_pcie_lanes,
191 .set_clock_gating = &radeon_atom_set_clock_gating, 200 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -227,7 +236,9 @@ static struct radeon_asic rs400_asic = {
227 .copy_blit = &r100_copy_blit, 236 .copy_blit = &r100_copy_blit,
228 .copy_dma = &r300_copy_dma, 237 .copy_dma = &r300_copy_dma,
229 .copy = &r100_copy_blit, 238 .copy = &r100_copy_blit,
239 .get_engine_clock = &radeon_legacy_get_engine_clock,
230 .set_engine_clock = &radeon_legacy_set_engine_clock, 240 .set_engine_clock = &radeon_legacy_set_engine_clock,
241 .get_memory_clock = NULL,
231 .set_memory_clock = NULL, 242 .set_memory_clock = NULL,
232 .set_pcie_lanes = NULL, 243 .set_pcie_lanes = NULL,
233 .set_clock_gating = &radeon_legacy_set_clock_gating, 244 .set_clock_gating = &radeon_legacy_set_clock_gating,
@@ -273,7 +284,9 @@ static struct radeon_asic rs600_asic = {
273 .copy_blit = &r100_copy_blit, 284 .copy_blit = &r100_copy_blit,
274 .copy_dma = &r300_copy_dma, 285 .copy_dma = &r300_copy_dma,
275 .copy = &r100_copy_blit, 286 .copy = &r100_copy_blit,
287 .get_engine_clock = &radeon_atom_get_engine_clock,
276 .set_engine_clock = &radeon_atom_set_engine_clock, 288 .set_engine_clock = &radeon_atom_set_engine_clock,
289 .get_memory_clock = &radeon_atom_get_memory_clock,
277 .set_memory_clock = &radeon_atom_set_memory_clock, 290 .set_memory_clock = &radeon_atom_set_memory_clock,
278 .set_pcie_lanes = NULL, 291 .set_pcie_lanes = NULL,
279 .set_clock_gating = &radeon_atom_set_clock_gating, 292 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -312,7 +325,9 @@ static struct radeon_asic rs690_asic = {
312 .copy_blit = &r100_copy_blit, 325 .copy_blit = &r100_copy_blit,
313 .copy_dma = &r300_copy_dma, 326 .copy_dma = &r300_copy_dma,
314 .copy = &r300_copy_dma, 327 .copy = &r300_copy_dma,
328 .get_engine_clock = &radeon_atom_get_engine_clock,
315 .set_engine_clock = &radeon_atom_set_engine_clock, 329 .set_engine_clock = &radeon_atom_set_engine_clock,
330 .get_memory_clock = &radeon_atom_get_memory_clock,
316 .set_memory_clock = &radeon_atom_set_memory_clock, 331 .set_memory_clock = &radeon_atom_set_memory_clock,
317 .set_pcie_lanes = NULL, 332 .set_pcie_lanes = NULL,
318 .set_clock_gating = &radeon_atom_set_clock_gating, 333 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -357,7 +372,9 @@ static struct radeon_asic rv515_asic = {
357 .copy_blit = &r100_copy_blit, 372 .copy_blit = &r100_copy_blit,
358 .copy_dma = &r300_copy_dma, 373 .copy_dma = &r300_copy_dma,
359 .copy = &r100_copy_blit, 374 .copy = &r100_copy_blit,
375 .get_engine_clock = &radeon_atom_get_engine_clock,
360 .set_engine_clock = &radeon_atom_set_engine_clock, 376 .set_engine_clock = &radeon_atom_set_engine_clock,
377 .get_memory_clock = &radeon_atom_get_memory_clock,
361 .set_memory_clock = &radeon_atom_set_memory_clock, 378 .set_memory_clock = &radeon_atom_set_memory_clock,
362 .set_pcie_lanes = &rv370_set_pcie_lanes, 379 .set_pcie_lanes = &rv370_set_pcie_lanes,
363 .set_clock_gating = &radeon_atom_set_clock_gating, 380 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -393,7 +410,9 @@ static struct radeon_asic r520_asic = {
393 .copy_blit = &r100_copy_blit, 410 .copy_blit = &r100_copy_blit,
394 .copy_dma = &r300_copy_dma, 411 .copy_dma = &r300_copy_dma,
395 .copy = &r100_copy_blit, 412 .copy = &r100_copy_blit,
413 .get_engine_clock = &radeon_atom_get_engine_clock,
396 .set_engine_clock = &radeon_atom_set_engine_clock, 414 .set_engine_clock = &radeon_atom_set_engine_clock,
415 .get_memory_clock = &radeon_atom_get_memory_clock,
397 .set_memory_clock = &radeon_atom_set_memory_clock, 416 .set_memory_clock = &radeon_atom_set_memory_clock,
398 .set_pcie_lanes = &rv370_set_pcie_lanes, 417 .set_pcie_lanes = &rv370_set_pcie_lanes,
399 .set_clock_gating = &radeon_atom_set_clock_gating, 418 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -456,7 +475,9 @@ static struct radeon_asic r600_asic = {
456 .copy_blit = &r600_copy_blit, 475 .copy_blit = &r600_copy_blit,
457 .copy_dma = &r600_copy_blit, 476 .copy_dma = &r600_copy_blit,
458 .copy = &r600_copy_blit, 477 .copy = &r600_copy_blit,
478 .get_engine_clock = &radeon_atom_get_engine_clock,
459 .set_engine_clock = &radeon_atom_set_engine_clock, 479 .set_engine_clock = &radeon_atom_set_engine_clock,
480 .get_memory_clock = &radeon_atom_get_memory_clock,
460 .set_memory_clock = &radeon_atom_set_memory_clock, 481 .set_memory_clock = &radeon_atom_set_memory_clock,
461 .set_pcie_lanes = NULL, 482 .set_pcie_lanes = NULL,
462 .set_clock_gating = &radeon_atom_set_clock_gating, 483 .set_clock_gating = &radeon_atom_set_clock_gating,
@@ -493,7 +514,9 @@ static struct radeon_asic rv770_asic = {
493 .copy_blit = &r600_copy_blit, 514 .copy_blit = &r600_copy_blit,
494 .copy_dma = &r600_copy_blit, 515 .copy_dma = &r600_copy_blit,
495 .copy = &r600_copy_blit, 516 .copy = &r600_copy_blit,
517 .get_engine_clock = &radeon_atom_get_engine_clock,
496 .set_engine_clock = &radeon_atom_set_engine_clock, 518 .set_engine_clock = &radeon_atom_set_engine_clock,
519 .get_memory_clock = &radeon_atom_get_memory_clock,
497 .set_memory_clock = &radeon_atom_set_memory_clock, 520 .set_memory_clock = &radeon_atom_set_memory_clock,
498 .set_pcie_lanes = NULL, 521 .set_pcie_lanes = NULL,
499 .set_clock_gating = &radeon_atom_set_clock_gating, 522 .set_clock_gating = &radeon_atom_set_clock_gating,
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 5b6c08cee40e..2ed88a820935 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -46,7 +46,8 @@ radeon_add_atom_connector(struct drm_device *dev,
46 uint32_t supported_device, 46 uint32_t supported_device,
47 int connector_type, 47 int connector_type,
48 struct radeon_i2c_bus_rec *i2c_bus, 48 struct radeon_i2c_bus_rec *i2c_bus,
49 bool linkb, uint32_t igp_lane_info); 49 bool linkb, uint32_t igp_lane_info,
50 uint16_t connector_object_id);
50 51
51/* from radeon_legacy_encoder.c */ 52/* from radeon_legacy_encoder.c */
52extern void 53extern void
@@ -193,6 +194,23 @@ const int supported_devices_connector_convert[] = {
193 DRM_MODE_CONNECTOR_DisplayPort 194 DRM_MODE_CONNECTOR_DisplayPort
194}; 195};
195 196
197const uint16_t supported_devices_connector_object_id_convert[] = {
198 CONNECTOR_OBJECT_ID_NONE,
199 CONNECTOR_OBJECT_ID_VGA,
200 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I, /* not all boards support DL */
201 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D, /* not all boards support DL */
202 CONNECTOR_OBJECT_ID_VGA, /* technically DVI-A */
203 CONNECTOR_OBJECT_ID_COMPOSITE,
204 CONNECTOR_OBJECT_ID_SVIDEO,
205 CONNECTOR_OBJECT_ID_LVDS,
206 CONNECTOR_OBJECT_ID_9PIN_DIN,
207 CONNECTOR_OBJECT_ID_9PIN_DIN,
208 CONNECTOR_OBJECT_ID_DISPLAYPORT,
209 CONNECTOR_OBJECT_ID_HDMI_TYPE_A,
210 CONNECTOR_OBJECT_ID_HDMI_TYPE_B,
211 CONNECTOR_OBJECT_ID_SVIDEO
212};
213
196const int object_connector_convert[] = { 214const int object_connector_convert[] = {
197 DRM_MODE_CONNECTOR_Unknown, 215 DRM_MODE_CONNECTOR_Unknown,
198 DRM_MODE_CONNECTOR_DVII, 216 DRM_MODE_CONNECTOR_DVII,
@@ -229,7 +247,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
229 ATOM_OBJECT_HEADER *obj_header; 247 ATOM_OBJECT_HEADER *obj_header;
230 int i, j, path_size, device_support; 248 int i, j, path_size, device_support;
231 int connector_type; 249 int connector_type;
232 uint16_t igp_lane_info, conn_id; 250 uint16_t igp_lane_info, conn_id, connector_object_id;
233 bool linkb; 251 bool linkb;
234 struct radeon_i2c_bus_rec ddc_bus; 252 struct radeon_i2c_bus_rec ddc_bus;
235 253
@@ -277,7 +295,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
277 ATOM_DEVICE_CV_SUPPORT) 295 ATOM_DEVICE_CV_SUPPORT)
278 continue; 296 continue;
279 297
280 if ((rdev->family == CHIP_RS780) && 298 /* IGP chips */
299 if ((rdev->flags & RADEON_IS_IGP) &&
281 (con_obj_id == 300 (con_obj_id ==
282 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) { 301 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR)) {
283 uint16_t igp_offset = 0; 302 uint16_t igp_offset = 0;
@@ -311,6 +330,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
311 connector_type = 330 connector_type =
312 object_connector_convert 331 object_connector_convert
313 [ct]; 332 [ct];
333 connector_object_id = ct;
314 igp_lane_info = 334 igp_lane_info =
315 slot_config & 0xffff; 335 slot_config & 0xffff;
316 } else 336 } else
@@ -321,6 +341,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
321 igp_lane_info = 0; 341 igp_lane_info = 0;
322 connector_type = 342 connector_type =
323 object_connector_convert[con_obj_id]; 343 object_connector_convert[con_obj_id];
344 connector_object_id = con_obj_id;
324 } 345 }
325 346
326 if (connector_type == DRM_MODE_CONNECTOR_Unknown) 347 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
@@ -425,7 +446,8 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
425 le16_to_cpu(path-> 446 le16_to_cpu(path->
426 usDeviceTag), 447 usDeviceTag),
427 connector_type, &ddc_bus, 448 connector_type, &ddc_bus,
428 linkb, igp_lane_info); 449 linkb, igp_lane_info,
450 connector_object_id);
429 451
430 } 452 }
431 } 453 }
@@ -435,6 +457,45 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
435 return true; 457 return true;
436} 458}
437 459
460static uint16_t atombios_get_connector_object_id(struct drm_device *dev,
461 int connector_type,
462 uint16_t devices)
463{
464 struct radeon_device *rdev = dev->dev_private;
465
466 if (rdev->flags & RADEON_IS_IGP) {
467 return supported_devices_connector_object_id_convert
468 [connector_type];
469 } else if (((connector_type == DRM_MODE_CONNECTOR_DVII) ||
470 (connector_type == DRM_MODE_CONNECTOR_DVID)) &&
471 (devices & ATOM_DEVICE_DFP2_SUPPORT)) {
472 struct radeon_mode_info *mode_info = &rdev->mode_info;
473 struct atom_context *ctx = mode_info->atom_context;
474 int index = GetIndexIntoMasterTable(DATA, XTMDS_Info);
475 uint16_t size, data_offset;
476 uint8_t frev, crev;
477 ATOM_XTMDS_INFO *xtmds;
478
479 atom_parse_data_header(ctx, index, &size, &frev, &crev, &data_offset);
480 xtmds = (ATOM_XTMDS_INFO *)(ctx->bios + data_offset);
481
482 if (xtmds->ucSupportedLink & ATOM_XTMDS_SUPPORTED_DUALLINK) {
483 if (connector_type == DRM_MODE_CONNECTOR_DVII)
484 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I;
485 else
486 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D;
487 } else {
488 if (connector_type == DRM_MODE_CONNECTOR_DVII)
489 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
490 else
491 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D;
492 }
493 } else {
494 return supported_devices_connector_object_id_convert
495 [connector_type];
496 }
497}
498
438struct bios_connector { 499struct bios_connector {
439 bool valid; 500 bool valid;
440 uint16_t line_mux; 501 uint16_t line_mux;
@@ -593,14 +654,20 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct
593 654
594 /* add the connectors */ 655 /* add the connectors */
595 for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) { 656 for (i = 0; i < ATOM_MAX_SUPPORTED_DEVICE; i++) {
596 if (bios_connectors[i].valid) 657 if (bios_connectors[i].valid) {
658 uint16_t connector_object_id =
659 atombios_get_connector_object_id(dev,
660 bios_connectors[i].connector_type,
661 bios_connectors[i].devices);
597 radeon_add_atom_connector(dev, 662 radeon_add_atom_connector(dev,
598 bios_connectors[i].line_mux, 663 bios_connectors[i].line_mux,
599 bios_connectors[i].devices, 664 bios_connectors[i].devices,
600 bios_connectors[i]. 665 bios_connectors[i].
601 connector_type, 666 connector_type,
602 &bios_connectors[i].ddc_bus, 667 &bios_connectors[i].ddc_bus,
603 false, 0); 668 false, 0,
669 connector_object_id);
670 }
604 } 671 }
605 672
606 radeon_link_encoder_connector(dev); 673 radeon_link_encoder_connector(dev);
@@ -641,8 +708,12 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
641 le16_to_cpu(firmware_info->info.usReferenceClock); 708 le16_to_cpu(firmware_info->info.usReferenceClock);
642 p1pll->reference_div = 0; 709 p1pll->reference_div = 0;
643 710
644 p1pll->pll_out_min = 711 if (crev < 2)
645 le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output); 712 p1pll->pll_out_min =
713 le16_to_cpu(firmware_info->info.usMinPixelClockPLL_Output);
714 else
715 p1pll->pll_out_min =
716 le32_to_cpu(firmware_info->info_12.ulMinPixelClockPLL_Output);
646 p1pll->pll_out_max = 717 p1pll->pll_out_max =
647 le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output); 718 le32_to_cpu(firmware_info->info.ulMaxPixelClockPLL_Output);
648 719
@@ -651,6 +722,16 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
651 p1pll->pll_out_min = 64800; 722 p1pll->pll_out_min = 64800;
652 else 723 else
653 p1pll->pll_out_min = 20000; 724 p1pll->pll_out_min = 20000;
725 } else if (p1pll->pll_out_min > 64800) {
726 /* Limiting the pll output range is a good thing generally as
727 * it limits the number of possible pll combinations for a given
728 * frequency presumably to the ones that work best on each card.
729 * However, certain duallink DVI monitors seem to like
730 * pll combinations that would be limited by this at least on
731 * pre-DCE 3.0 r6xx hardware. This might need to be adjusted per
732 * family.
733 */
734 p1pll->pll_out_min = 64800;
654 } 735 }
655 736
656 p1pll->pll_in_min = 737 p1pll->pll_in_min =
@@ -767,6 +848,46 @@ bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
767 return false; 848 return false;
768} 849}
769 850
851static struct radeon_atom_ss *radeon_atombios_get_ss_info(struct
852 radeon_encoder
853 *encoder,
854 int id)
855{
856 struct drm_device *dev = encoder->base.dev;
857 struct radeon_device *rdev = dev->dev_private;
858 struct radeon_mode_info *mode_info = &rdev->mode_info;
859 int index = GetIndexIntoMasterTable(DATA, PPLL_SS_Info);
860 uint16_t data_offset;
861 struct _ATOM_SPREAD_SPECTRUM_INFO *ss_info;
862 uint8_t frev, crev;
863 struct radeon_atom_ss *ss = NULL;
864
865 if (id > ATOM_MAX_SS_ENTRY)
866 return NULL;
867
868 atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
869 &crev, &data_offset);
870
871 ss_info =
872 (struct _ATOM_SPREAD_SPECTRUM_INFO *)(mode_info->atom_context->bios + data_offset);
873
874 if (ss_info) {
875 ss =
876 kzalloc(sizeof(struct radeon_atom_ss), GFP_KERNEL);
877
878 if (!ss)
879 return NULL;
880
881 ss->percentage = le16_to_cpu(ss_info->asSS_Info[id].usSpreadSpectrumPercentage);
882 ss->type = ss_info->asSS_Info[id].ucSpreadSpectrumType;
883 ss->step = ss_info->asSS_Info[id].ucSS_Step;
884 ss->delay = ss_info->asSS_Info[id].ucSS_Delay;
885 ss->range = ss_info->asSS_Info[id].ucSS_Range;
886 ss->refdiv = ss_info->asSS_Info[id].ucRecommendedRef_Div;
887 }
888 return ss;
889}
890
770union lvds_info { 891union lvds_info {
771 struct _ATOM_LVDS_INFO info; 892 struct _ATOM_LVDS_INFO info;
772 struct _ATOM_LVDS_INFO_V12 info_12; 893 struct _ATOM_LVDS_INFO_V12 info_12;
@@ -798,27 +919,31 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct
798 if (!lvds) 919 if (!lvds)
799 return NULL; 920 return NULL;
800 921
801 lvds->native_mode.dotclock = 922 lvds->native_mode.clock =
802 le16_to_cpu(lvds_info->info.sLCDTiming.usPixClk) * 10; 923 le16_to_cpu(lvds_info->info.sLCDTiming.usPixClk) * 10;
803 lvds->native_mode.panel_xres = 924 lvds->native_mode.hdisplay =
804 le16_to_cpu(lvds_info->info.sLCDTiming.usHActive); 925 le16_to_cpu(lvds_info->info.sLCDTiming.usHActive);
805 lvds->native_mode.panel_yres = 926 lvds->native_mode.vdisplay =
806 le16_to_cpu(lvds_info->info.sLCDTiming.usVActive); 927 le16_to_cpu(lvds_info->info.sLCDTiming.usVActive);
807 lvds->native_mode.hblank = 928 lvds->native_mode.htotal = lvds->native_mode.hdisplay +
808 le16_to_cpu(lvds_info->info.sLCDTiming.usHBlanking_Time); 929 le16_to_cpu(lvds_info->info.sLCDTiming.usHBlanking_Time);
809 lvds->native_mode.hoverplus = 930 lvds->native_mode.hsync_start = lvds->native_mode.hdisplay +
810 le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncOffset); 931 le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncOffset);
811 lvds->native_mode.hsync_width = 932 lvds->native_mode.hsync_end = lvds->native_mode.hsync_start +
812 le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncWidth); 933 le16_to_cpu(lvds_info->info.sLCDTiming.usHSyncWidth);
813 lvds->native_mode.vblank = 934 lvds->native_mode.vtotal = lvds->native_mode.vdisplay +
814 le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time); 935 le16_to_cpu(lvds_info->info.sLCDTiming.usVBlanking_Time);
815 lvds->native_mode.voverplus = 936 lvds->native_mode.vsync_start = lvds->native_mode.vdisplay +
816 le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncOffset); 937 le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth);
817 lvds->native_mode.vsync_width = 938 lvds->native_mode.vsync_end = lvds->native_mode.vsync_start +
818 le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth); 939 le16_to_cpu(lvds_info->info.sLCDTiming.usVSyncWidth);
819 lvds->panel_pwr_delay = 940 lvds->panel_pwr_delay =
820 le16_to_cpu(lvds_info->info.usOffDelayInMs); 941 le16_to_cpu(lvds_info->info.usOffDelayInMs);
821 lvds->lvds_misc = lvds_info->info.ucLVDS_Misc; 942 lvds->lvds_misc = lvds_info->info.ucLVDS_Misc;
943 /* set crtc values */
944 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
945
946 lvds->ss = radeon_atombios_get_ss_info(encoder, lvds_info->info.ucSS_Id);
822 947
823 encoder->native_mode = lvds->native_mode; 948 encoder->native_mode = lvds->native_mode;
824 } 949 }
@@ -857,8 +982,7 @@ radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder)
857} 982}
858 983
859bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index, 984bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
860 SET_CRTC_TIMING_PARAMETERS_PS_ALLOCATION *crtc_timing, 985 struct drm_display_mode *mode)
861 int32_t *pixel_clock)
862{ 986{
863 struct radeon_mode_info *mode_info = &rdev->mode_info; 987 struct radeon_mode_info *mode_info = &rdev->mode_info;
864 ATOM_ANALOG_TV_INFO *tv_info; 988 ATOM_ANALOG_TV_INFO *tv_info;
@@ -866,7 +990,7 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
866 ATOM_DTD_FORMAT *dtd_timings; 990 ATOM_DTD_FORMAT *dtd_timings;
867 int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info); 991 int data_index = GetIndexIntoMasterTable(DATA, AnalogTV_Info);
868 u8 frev, crev; 992 u8 frev, crev;
869 uint16_t data_offset; 993 u16 data_offset, misc;
870 994
871 atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset); 995 atom_parse_data_header(mode_info->atom_context, data_index, NULL, &frev, &crev, &data_offset);
872 996
@@ -876,28 +1000,37 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
876 if (index > MAX_SUPPORTED_TV_TIMING) 1000 if (index > MAX_SUPPORTED_TV_TIMING)
877 return false; 1001 return false;
878 1002
879 crtc_timing->usH_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total); 1003 mode->crtc_htotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Total);
880 crtc_timing->usH_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp); 1004 mode->crtc_hdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_Disp);
881 crtc_timing->usH_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart); 1005 mode->crtc_hsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart);
882 crtc_timing->usH_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth); 1006 mode->crtc_hsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncStart) +
883 1007 le16_to_cpu(tv_info->aModeTimings[index].usCRTC_H_SyncWidth);
884 crtc_timing->usV_Total = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total); 1008
885 crtc_timing->usV_Disp = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp); 1009 mode->crtc_vtotal = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Total);
886 crtc_timing->usV_SyncStart = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart); 1010 mode->crtc_vdisplay = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_Disp);
887 crtc_timing->usV_SyncWidth = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth); 1011 mode->crtc_vsync_start = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart);
888 1012 mode->crtc_vsync_end = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncStart) +
889 crtc_timing->susModeMiscInfo = tv_info->aModeTimings[index].susModeMiscInfo; 1013 le16_to_cpu(tv_info->aModeTimings[index].usCRTC_V_SyncWidth);
890 1014
891 crtc_timing->ucOverscanRight = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanRight); 1015 mode->flags = 0;
892 crtc_timing->ucOverscanLeft = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanLeft); 1016 misc = le16_to_cpu(tv_info->aModeTimings[index].susModeMiscInfo.usAccess);
893 crtc_timing->ucOverscanBottom = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanBottom); 1017 if (misc & ATOM_VSYNC_POLARITY)
894 crtc_timing->ucOverscanTop = le16_to_cpu(tv_info->aModeTimings[index].usCRTC_OverscanTop); 1018 mode->flags |= DRM_MODE_FLAG_NVSYNC;
895 *pixel_clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10; 1019 if (misc & ATOM_HSYNC_POLARITY)
1020 mode->flags |= DRM_MODE_FLAG_NHSYNC;
1021 if (misc & ATOM_COMPOSITESYNC)
1022 mode->flags |= DRM_MODE_FLAG_CSYNC;
1023 if (misc & ATOM_INTERLACE)
1024 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1025 if (misc & ATOM_DOUBLE_CLOCK_MODE)
1026 mode->flags |= DRM_MODE_FLAG_DBLSCAN;
1027
1028 mode->clock = le16_to_cpu(tv_info->aModeTimings[index].usPixelClock) * 10;
896 1029
897 if (index == 1) { 1030 if (index == 1) {
898 /* PAL timings appear to have wrong values for totals */ 1031 /* PAL timings appear to have wrong values for totals */
899 crtc_timing->usH_Total -= 1; 1032 mode->crtc_htotal -= 1;
900 crtc_timing->usV_Total -= 1; 1033 mode->crtc_vtotal -= 1;
901 } 1034 }
902 break; 1035 break;
903 case 2: 1036 case 2:
@@ -906,17 +1039,36 @@ bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
906 return false; 1039 return false;
907 1040
908 dtd_timings = &tv_info_v1_2->aModeTimings[index]; 1041 dtd_timings = &tv_info_v1_2->aModeTimings[index];
909 crtc_timing->usH_Total = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHBlanking_Time); 1042 mode->crtc_htotal = le16_to_cpu(dtd_timings->usHActive) +
910 crtc_timing->usH_Disp = le16_to_cpu(dtd_timings->usHActive); 1043 le16_to_cpu(dtd_timings->usHBlanking_Time);
911 crtc_timing->usH_SyncStart = le16_to_cpu(dtd_timings->usHActive) + le16_to_cpu(dtd_timings->usHSyncOffset); 1044 mode->crtc_hdisplay = le16_to_cpu(dtd_timings->usHActive);
912 crtc_timing->usH_SyncWidth = le16_to_cpu(dtd_timings->usHSyncWidth); 1045 mode->crtc_hsync_start = le16_to_cpu(dtd_timings->usHActive) +
913 crtc_timing->usV_Total = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVBlanking_Time); 1046 le16_to_cpu(dtd_timings->usHSyncOffset);
914 crtc_timing->usV_Disp = le16_to_cpu(dtd_timings->usVActive); 1047 mode->crtc_hsync_end = mode->crtc_hsync_start +
915 crtc_timing->usV_SyncStart = le16_to_cpu(dtd_timings->usVActive) + le16_to_cpu(dtd_timings->usVSyncOffset); 1048 le16_to_cpu(dtd_timings->usHSyncWidth);
916 crtc_timing->usV_SyncWidth = le16_to_cpu(dtd_timings->usVSyncWidth); 1049
917 1050 mode->crtc_vtotal = le16_to_cpu(dtd_timings->usVActive) +
918 crtc_timing->susModeMiscInfo.usAccess = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess); 1051 le16_to_cpu(dtd_timings->usVBlanking_Time);
919 *pixel_clock = le16_to_cpu(dtd_timings->usPixClk) * 10; 1052 mode->crtc_vdisplay = le16_to_cpu(dtd_timings->usVActive);
1053 mode->crtc_vsync_start = le16_to_cpu(dtd_timings->usVActive) +
1054 le16_to_cpu(dtd_timings->usVSyncOffset);
1055 mode->crtc_vsync_end = mode->crtc_vsync_start +
1056 le16_to_cpu(dtd_timings->usVSyncWidth);
1057
1058 mode->flags = 0;
1059 misc = le16_to_cpu(dtd_timings->susModeMiscInfo.usAccess);
1060 if (misc & ATOM_VSYNC_POLARITY)
1061 mode->flags |= DRM_MODE_FLAG_NVSYNC;
1062 if (misc & ATOM_HSYNC_POLARITY)
1063 mode->flags |= DRM_MODE_FLAG_NHSYNC;
1064 if (misc & ATOM_COMPOSITESYNC)
1065 mode->flags |= DRM_MODE_FLAG_CSYNC;
1066 if (misc & ATOM_INTERLACE)
1067 mode->flags |= DRM_MODE_FLAG_INTERLACE;
1068 if (misc & ATOM_DOUBLE_CLOCK_MODE)
1069 mode->flags |= DRM_MODE_FLAG_DBLSCAN;
1070
1071 mode->clock = le16_to_cpu(dtd_timings->usPixClk) * 10;
920 break; 1072 break;
921 } 1073 }
922 return true; 1074 return true;
@@ -981,6 +1133,24 @@ void radeon_atom_static_pwrmgt_setup(struct radeon_device *rdev, int enable)
981 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args); 1133 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
982} 1134}
983 1135
1136uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev)
1137{
1138 GET_ENGINE_CLOCK_PS_ALLOCATION args;
1139 int index = GetIndexIntoMasterTable(COMMAND, GetEngineClock);
1140
1141 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1142 return args.ulReturnEngineClock;
1143}
1144
1145uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev)
1146{
1147 GET_MEMORY_CLOCK_PS_ALLOCATION args;
1148 int index = GetIndexIntoMasterTable(COMMAND, GetMemoryClock);
1149
1150 atom_execute_table(rdev->mode_info.atom_context, index, (uint32_t *)&args);
1151 return args.ulReturnMemoryClock;
1152}
1153
984void radeon_atom_set_engine_clock(struct radeon_device *rdev, 1154void radeon_atom_set_engine_clock(struct radeon_device *rdev,
985 uint32_t eng_clock) 1155 uint32_t eng_clock)
986{ 1156{
diff --git a/drivers/gpu/drm/radeon/radeon_benchmark.c b/drivers/gpu/drm/radeon/radeon_benchmark.c
index 2e938f7496fb..10bd50a7db87 100644
--- a/drivers/gpu/drm/radeon/radeon_benchmark.c
+++ b/drivers/gpu/drm/radeon/radeon_benchmark.c
@@ -63,7 +63,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize,
63 if (r) { 63 if (r) {
64 goto out_cleanup; 64 goto out_cleanup;
65 } 65 }
66 r = radeon_copy_dma(rdev, saddr, daddr, size / 4096, fence); 66 r = radeon_copy_dma(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence);
67 if (r) { 67 if (r) {
68 goto out_cleanup; 68 goto out_cleanup;
69 } 69 }
@@ -88,7 +88,7 @@ void radeon_benchmark_move(struct radeon_device *rdev, unsigned bsize,
88 if (r) { 88 if (r) {
89 goto out_cleanup; 89 goto out_cleanup;
90 } 90 }
91 r = radeon_copy_blit(rdev, saddr, daddr, size / 4096, fence); 91 r = radeon_copy_blit(rdev, saddr, daddr, size / RADEON_GPU_PAGE_SIZE, fence);
92 if (r) { 92 if (r) {
93 goto out_cleanup; 93 goto out_cleanup;
94 } 94 }
diff --git a/drivers/gpu/drm/radeon/radeon_bios.c b/drivers/gpu/drm/radeon/radeon_bios.c
index 34a9b9119518..906921740c60 100644
--- a/drivers/gpu/drm/radeon/radeon_bios.c
+++ b/drivers/gpu/drm/radeon/radeon_bios.c
@@ -50,19 +50,16 @@ static bool igp_read_bios_from_vram(struct radeon_device *rdev)
50 vram_base = drm_get_resource_start(rdev->ddev, 0); 50 vram_base = drm_get_resource_start(rdev->ddev, 0);
51 bios = ioremap(vram_base, size); 51 bios = ioremap(vram_base, size);
52 if (!bios) { 52 if (!bios) {
53 DRM_ERROR("Unable to mmap vram\n");
54 return false; 53 return false;
55 } 54 }
56 55
57 if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) { 56 if (size == 0 || bios[0] != 0x55 || bios[1] != 0xaa) {
58 iounmap(bios); 57 iounmap(bios);
59 DRM_ERROR("bad rom signature\n");
60 return false; 58 return false;
61 } 59 }
62 rdev->bios = kmalloc(size, GFP_KERNEL); 60 rdev->bios = kmalloc(size, GFP_KERNEL);
63 if (rdev->bios == NULL) { 61 if (rdev->bios == NULL) {
64 iounmap(bios); 62 iounmap(bios);
65 DRM_ERROR("kmalloc failed\n");
66 return false; 63 return false;
67 } 64 }
68 memcpy(rdev->bios, bios, size); 65 memcpy(rdev->bios, bios, size);
diff --git a/drivers/gpu/drm/radeon/radeon_clocks.c b/drivers/gpu/drm/radeon/radeon_clocks.c
index f5c32a766b10..a81354167621 100644
--- a/drivers/gpu/drm/radeon/radeon_clocks.c
+++ b/drivers/gpu/drm/radeon/radeon_clocks.c
@@ -32,7 +32,7 @@
32#include "atom.h" 32#include "atom.h"
33 33
34/* 10 khz */ 34/* 10 khz */
35static uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev) 35uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev)
36{ 36{
37 struct radeon_pll *spll = &rdev->clock.spll; 37 struct radeon_pll *spll = &rdev->clock.spll;
38 uint32_t fb_div, ref_div, post_div, sclk; 38 uint32_t fb_div, ref_div, post_div, sclk;
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index 748265a105b3..5253cbf6db1f 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -49,7 +49,8 @@ radeon_add_legacy_connector(struct drm_device *dev,
49 uint32_t connector_id, 49 uint32_t connector_id,
50 uint32_t supported_device, 50 uint32_t supported_device,
51 int connector_type, 51 int connector_type,
52 struct radeon_i2c_bus_rec *i2c_bus); 52 struct radeon_i2c_bus_rec *i2c_bus,
53 uint16_t connector_object_id);
53 54
54/* from radeon_legacy_encoder.c */ 55/* from radeon_legacy_encoder.c */
55extern void 56extern void
@@ -808,25 +809,25 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct
808 lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf; 809 lvds->panel_blon_delay = (lvds_ss_gen_cntl >> RADEON_LVDS_PWRSEQ_DELAY2_SHIFT) & 0xf;
809 810
810 if (fp_vert_stretch & RADEON_VERT_STRETCH_ENABLE) 811 if (fp_vert_stretch & RADEON_VERT_STRETCH_ENABLE)
811 lvds->native_mode.panel_yres = 812 lvds->native_mode.vdisplay =
812 ((fp_vert_stretch & RADEON_VERT_PANEL_SIZE) >> 813 ((fp_vert_stretch & RADEON_VERT_PANEL_SIZE) >>
813 RADEON_VERT_PANEL_SHIFT) + 1; 814 RADEON_VERT_PANEL_SHIFT) + 1;
814 else 815 else
815 lvds->native_mode.panel_yres = 816 lvds->native_mode.vdisplay =
816 (RREG32(RADEON_CRTC_V_TOTAL_DISP) >> 16) + 1; 817 (RREG32(RADEON_CRTC_V_TOTAL_DISP) >> 16) + 1;
817 818
818 if (fp_horz_stretch & RADEON_HORZ_STRETCH_ENABLE) 819 if (fp_horz_stretch & RADEON_HORZ_STRETCH_ENABLE)
819 lvds->native_mode.panel_xres = 820 lvds->native_mode.hdisplay =
820 (((fp_horz_stretch & RADEON_HORZ_PANEL_SIZE) >> 821 (((fp_horz_stretch & RADEON_HORZ_PANEL_SIZE) >>
821 RADEON_HORZ_PANEL_SHIFT) + 1) * 8; 822 RADEON_HORZ_PANEL_SHIFT) + 1) * 8;
822 else 823 else
823 lvds->native_mode.panel_xres = 824 lvds->native_mode.hdisplay =
824 ((RREG32(RADEON_CRTC_H_TOTAL_DISP) >> 16) + 1) * 8; 825 ((RREG32(RADEON_CRTC_H_TOTAL_DISP) >> 16) + 1) * 8;
825 826
826 if ((lvds->native_mode.panel_xres < 640) || 827 if ((lvds->native_mode.hdisplay < 640) ||
827 (lvds->native_mode.panel_yres < 480)) { 828 (lvds->native_mode.vdisplay < 480)) {
828 lvds->native_mode.panel_xres = 640; 829 lvds->native_mode.hdisplay = 640;
829 lvds->native_mode.panel_yres = 480; 830 lvds->native_mode.vdisplay = 480;
830 } 831 }
831 832
832 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3; 833 ppll_div_sel = RREG8(RADEON_CLOCK_CNTL_INDEX + 1) & 0x3;
@@ -846,8 +847,8 @@ static struct radeon_encoder_lvds *radeon_legacy_get_lvds_info_from_regs(struct
846 lvds->panel_vcc_delay = 200; 847 lvds->panel_vcc_delay = 200;
847 848
848 DRM_INFO("Panel info derived from registers\n"); 849 DRM_INFO("Panel info derived from registers\n");
849 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.panel_xres, 850 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay,
850 lvds->native_mode.panel_yres); 851 lvds->native_mode.vdisplay);
851 852
852 return lvds; 853 return lvds;
853} 854}
@@ -882,11 +883,11 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
882 883
883 DRM_INFO("Panel ID String: %s\n", stmp); 884 DRM_INFO("Panel ID String: %s\n", stmp);
884 885
885 lvds->native_mode.panel_xres = RBIOS16(lcd_info + 0x19); 886 lvds->native_mode.hdisplay = RBIOS16(lcd_info + 0x19);
886 lvds->native_mode.panel_yres = RBIOS16(lcd_info + 0x1b); 887 lvds->native_mode.vdisplay = RBIOS16(lcd_info + 0x1b);
887 888
888 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.panel_xres, 889 DRM_INFO("Panel Size %dx%d\n", lvds->native_mode.hdisplay,
889 lvds->native_mode.panel_yres); 890 lvds->native_mode.vdisplay);
890 891
891 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c); 892 lvds->panel_vcc_delay = RBIOS16(lcd_info + 0x2c);
892 if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0) 893 if (lvds->panel_vcc_delay > 2000 || lvds->panel_vcc_delay < 0)
@@ -944,27 +945,25 @@ struct radeon_encoder_lvds *radeon_combios_get_lvds_info(struct radeon_encoder
944 if (tmp == 0) 945 if (tmp == 0)
945 break; 946 break;
946 947
947 if ((RBIOS16(tmp) == lvds->native_mode.panel_xres) && 948 if ((RBIOS16(tmp) == lvds->native_mode.hdisplay) &&
948 (RBIOS16(tmp + 2) == 949 (RBIOS16(tmp + 2) ==
949 lvds->native_mode.panel_yres)) { 950 lvds->native_mode.vdisplay)) {
950 lvds->native_mode.hblank = 951 lvds->native_mode.htotal = RBIOS16(tmp + 17) * 8;
951 (RBIOS16(tmp + 17) - RBIOS16(tmp + 19)) * 8; 952 lvds->native_mode.hsync_start = RBIOS16(tmp + 21) * 8;
952 lvds->native_mode.hoverplus = 953 lvds->native_mode.hsync_end = (RBIOS8(tmp + 23) +
953 (RBIOS16(tmp + 21) - RBIOS16(tmp + 19) - 954 RBIOS16(tmp + 21)) * 8;
954 1) * 8; 955
955 lvds->native_mode.hsync_width = 956 lvds->native_mode.vtotal = RBIOS16(tmp + 24);
956 RBIOS8(tmp + 23) * 8; 957 lvds->native_mode.vsync_start = RBIOS16(tmp + 28) & 0x7ff;
957 958 lvds->native_mode.vsync_end =
958 lvds->native_mode.vblank = (RBIOS16(tmp + 24) - 959 ((RBIOS16(tmp + 28) & 0xf800) >> 11) +
959 RBIOS16(tmp + 26)); 960 (RBIOS16(tmp + 28) & 0x7ff);
960 lvds->native_mode.voverplus = 961
961 ((RBIOS16(tmp + 28) & 0x7ff) - 962 lvds->native_mode.clock = RBIOS16(tmp + 9) * 10;
962 RBIOS16(tmp + 26));
963 lvds->native_mode.vsync_width =
964 ((RBIOS16(tmp + 28) & 0xf800) >> 11);
965 lvds->native_mode.dotclock =
966 RBIOS16(tmp + 9) * 10;
967 lvds->native_mode.flags = 0; 963 lvds->native_mode.flags = 0;
964 /* set crtc values */
965 drm_mode_set_crtcinfo(&lvds->native_mode, CRTC_INTERLACE_HALVE_V);
966
968 } 967 }
969 } 968 }
970 } else { 969 } else {
@@ -1178,7 +1177,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1178 radeon_add_legacy_connector(dev, 0, 1177 radeon_add_legacy_connector(dev, 0,
1179 ATOM_DEVICE_CRT1_SUPPORT, 1178 ATOM_DEVICE_CRT1_SUPPORT,
1180 DRM_MODE_CONNECTOR_VGA, 1179 DRM_MODE_CONNECTOR_VGA,
1181 &ddc_i2c); 1180 &ddc_i2c,
1181 CONNECTOR_OBJECT_ID_VGA);
1182 } else if (rdev->flags & RADEON_IS_MOBILITY) { 1182 } else if (rdev->flags & RADEON_IS_MOBILITY) {
1183 /* LVDS */ 1183 /* LVDS */
1184 ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK); 1184 ddc_i2c = combios_setup_i2c_bus(RADEON_LCD_GPIO_MASK);
@@ -1190,7 +1190,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1190 radeon_add_legacy_connector(dev, 0, 1190 radeon_add_legacy_connector(dev, 0,
1191 ATOM_DEVICE_LCD1_SUPPORT, 1191 ATOM_DEVICE_LCD1_SUPPORT,
1192 DRM_MODE_CONNECTOR_LVDS, 1192 DRM_MODE_CONNECTOR_LVDS,
1193 &ddc_i2c); 1193 &ddc_i2c,
1194 CONNECTOR_OBJECT_ID_LVDS);
1194 1195
1195 /* VGA - primary dac */ 1196 /* VGA - primary dac */
1196 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1197 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
@@ -1202,7 +1203,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1202 radeon_add_legacy_connector(dev, 1, 1203 radeon_add_legacy_connector(dev, 1,
1203 ATOM_DEVICE_CRT1_SUPPORT, 1204 ATOM_DEVICE_CRT1_SUPPORT,
1204 DRM_MODE_CONNECTOR_VGA, 1205 DRM_MODE_CONNECTOR_VGA,
1205 &ddc_i2c); 1206 &ddc_i2c,
1207 CONNECTOR_OBJECT_ID_VGA);
1206 } else { 1208 } else {
1207 /* DVI-I - tv dac, int tmds */ 1209 /* DVI-I - tv dac, int tmds */
1208 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1210 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
@@ -1220,7 +1222,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1220 ATOM_DEVICE_DFP1_SUPPORT | 1222 ATOM_DEVICE_DFP1_SUPPORT |
1221 ATOM_DEVICE_CRT2_SUPPORT, 1223 ATOM_DEVICE_CRT2_SUPPORT,
1222 DRM_MODE_CONNECTOR_DVII, 1224 DRM_MODE_CONNECTOR_DVII,
1223 &ddc_i2c); 1225 &ddc_i2c,
1226 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1224 1227
1225 /* VGA - primary dac */ 1228 /* VGA - primary dac */
1226 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1229 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
@@ -1232,7 +1235,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1232 radeon_add_legacy_connector(dev, 1, 1235 radeon_add_legacy_connector(dev, 1,
1233 ATOM_DEVICE_CRT1_SUPPORT, 1236 ATOM_DEVICE_CRT1_SUPPORT,
1234 DRM_MODE_CONNECTOR_VGA, 1237 DRM_MODE_CONNECTOR_VGA,
1235 &ddc_i2c); 1238 &ddc_i2c,
1239 CONNECTOR_OBJECT_ID_VGA);
1236 } 1240 }
1237 1241
1238 if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) { 1242 if (rdev->family != CHIP_R100 && rdev->family != CHIP_R200) {
@@ -1245,7 +1249,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1245 radeon_add_legacy_connector(dev, 2, 1249 radeon_add_legacy_connector(dev, 2,
1246 ATOM_DEVICE_TV1_SUPPORT, 1250 ATOM_DEVICE_TV1_SUPPORT,
1247 DRM_MODE_CONNECTOR_SVIDEO, 1251 DRM_MODE_CONNECTOR_SVIDEO,
1248 &ddc_i2c); 1252 &ddc_i2c,
1253 CONNECTOR_OBJECT_ID_SVIDEO);
1249 } 1254 }
1250 break; 1255 break;
1251 case CT_IBOOK: 1256 case CT_IBOOK:
@@ -1259,7 +1264,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1259 0), 1264 0),
1260 ATOM_DEVICE_LCD1_SUPPORT); 1265 ATOM_DEVICE_LCD1_SUPPORT);
1261 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1266 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1262 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); 1267 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1268 CONNECTOR_OBJECT_ID_LVDS);
1263 /* VGA - TV DAC */ 1269 /* VGA - TV DAC */
1264 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1270 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1265 radeon_add_legacy_encoder(dev, 1271 radeon_add_legacy_encoder(dev,
@@ -1268,7 +1274,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1268 2), 1274 2),
1269 ATOM_DEVICE_CRT2_SUPPORT); 1275 ATOM_DEVICE_CRT2_SUPPORT);
1270 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1276 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1271 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1277 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1278 CONNECTOR_OBJECT_ID_VGA);
1272 /* TV - TV DAC */ 1279 /* TV - TV DAC */
1273 radeon_add_legacy_encoder(dev, 1280 radeon_add_legacy_encoder(dev,
1274 radeon_get_encoder_id(dev, 1281 radeon_get_encoder_id(dev,
@@ -1277,7 +1284,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1277 ATOM_DEVICE_TV1_SUPPORT); 1284 ATOM_DEVICE_TV1_SUPPORT);
1278 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1285 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1279 DRM_MODE_CONNECTOR_SVIDEO, 1286 DRM_MODE_CONNECTOR_SVIDEO,
1280 &ddc_i2c); 1287 &ddc_i2c,
1288 CONNECTOR_OBJECT_ID_SVIDEO);
1281 break; 1289 break;
1282 case CT_POWERBOOK_EXTERNAL: 1290 case CT_POWERBOOK_EXTERNAL:
1283 DRM_INFO("Connector Table: %d (powerbook external tmds)\n", 1291 DRM_INFO("Connector Table: %d (powerbook external tmds)\n",
@@ -1290,7 +1298,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1290 0), 1298 0),
1291 ATOM_DEVICE_LCD1_SUPPORT); 1299 ATOM_DEVICE_LCD1_SUPPORT);
1292 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1300 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1293 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); 1301 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1302 CONNECTOR_OBJECT_ID_LVDS);
1294 /* DVI-I - primary dac, ext tmds */ 1303 /* DVI-I - primary dac, ext tmds */
1295 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1304 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1296 radeon_add_legacy_encoder(dev, 1305 radeon_add_legacy_encoder(dev,
@@ -1303,10 +1312,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1303 ATOM_DEVICE_CRT1_SUPPORT, 1312 ATOM_DEVICE_CRT1_SUPPORT,
1304 1), 1313 1),
1305 ATOM_DEVICE_CRT1_SUPPORT); 1314 ATOM_DEVICE_CRT1_SUPPORT);
1315 /* XXX some are SL */
1306 radeon_add_legacy_connector(dev, 1, 1316 radeon_add_legacy_connector(dev, 1,
1307 ATOM_DEVICE_DFP2_SUPPORT | 1317 ATOM_DEVICE_DFP2_SUPPORT |
1308 ATOM_DEVICE_CRT1_SUPPORT, 1318 ATOM_DEVICE_CRT1_SUPPORT,
1309 DRM_MODE_CONNECTOR_DVII, &ddc_i2c); 1319 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1320 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I);
1310 /* TV - TV DAC */ 1321 /* TV - TV DAC */
1311 radeon_add_legacy_encoder(dev, 1322 radeon_add_legacy_encoder(dev,
1312 radeon_get_encoder_id(dev, 1323 radeon_get_encoder_id(dev,
@@ -1315,7 +1326,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1315 ATOM_DEVICE_TV1_SUPPORT); 1326 ATOM_DEVICE_TV1_SUPPORT);
1316 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1327 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1317 DRM_MODE_CONNECTOR_SVIDEO, 1328 DRM_MODE_CONNECTOR_SVIDEO,
1318 &ddc_i2c); 1329 &ddc_i2c,
1330 CONNECTOR_OBJECT_ID_SVIDEO);
1319 break; 1331 break;
1320 case CT_POWERBOOK_INTERNAL: 1332 case CT_POWERBOOK_INTERNAL:
1321 DRM_INFO("Connector Table: %d (powerbook internal tmds)\n", 1333 DRM_INFO("Connector Table: %d (powerbook internal tmds)\n",
@@ -1328,7 +1340,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1328 0), 1340 0),
1329 ATOM_DEVICE_LCD1_SUPPORT); 1341 ATOM_DEVICE_LCD1_SUPPORT);
1330 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1342 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1331 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); 1343 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1344 CONNECTOR_OBJECT_ID_LVDS);
1332 /* DVI-I - primary dac, int tmds */ 1345 /* DVI-I - primary dac, int tmds */
1333 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1346 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1334 radeon_add_legacy_encoder(dev, 1347 radeon_add_legacy_encoder(dev,
@@ -1344,7 +1357,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1344 radeon_add_legacy_connector(dev, 1, 1357 radeon_add_legacy_connector(dev, 1,
1345 ATOM_DEVICE_DFP1_SUPPORT | 1358 ATOM_DEVICE_DFP1_SUPPORT |
1346 ATOM_DEVICE_CRT1_SUPPORT, 1359 ATOM_DEVICE_CRT1_SUPPORT,
1347 DRM_MODE_CONNECTOR_DVII, &ddc_i2c); 1360 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1361 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1348 /* TV - TV DAC */ 1362 /* TV - TV DAC */
1349 radeon_add_legacy_encoder(dev, 1363 radeon_add_legacy_encoder(dev,
1350 radeon_get_encoder_id(dev, 1364 radeon_get_encoder_id(dev,
@@ -1353,7 +1367,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1353 ATOM_DEVICE_TV1_SUPPORT); 1367 ATOM_DEVICE_TV1_SUPPORT);
1354 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1368 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1355 DRM_MODE_CONNECTOR_SVIDEO, 1369 DRM_MODE_CONNECTOR_SVIDEO,
1356 &ddc_i2c); 1370 &ddc_i2c,
1371 CONNECTOR_OBJECT_ID_SVIDEO);
1357 break; 1372 break;
1358 case CT_POWERBOOK_VGA: 1373 case CT_POWERBOOK_VGA:
1359 DRM_INFO("Connector Table: %d (powerbook vga)\n", 1374 DRM_INFO("Connector Table: %d (powerbook vga)\n",
@@ -1366,7 +1381,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1366 0), 1381 0),
1367 ATOM_DEVICE_LCD1_SUPPORT); 1382 ATOM_DEVICE_LCD1_SUPPORT);
1368 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT, 1383 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_LCD1_SUPPORT,
1369 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c); 1384 DRM_MODE_CONNECTOR_LVDS, &ddc_i2c,
1385 CONNECTOR_OBJECT_ID_LVDS);
1370 /* VGA - primary dac */ 1386 /* VGA - primary dac */
1371 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC); 1387 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1372 radeon_add_legacy_encoder(dev, 1388 radeon_add_legacy_encoder(dev,
@@ -1375,7 +1391,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1375 1), 1391 1),
1376 ATOM_DEVICE_CRT1_SUPPORT); 1392 ATOM_DEVICE_CRT1_SUPPORT);
1377 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT, 1393 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT1_SUPPORT,
1378 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1394 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1395 CONNECTOR_OBJECT_ID_VGA);
1379 /* TV - TV DAC */ 1396 /* TV - TV DAC */
1380 radeon_add_legacy_encoder(dev, 1397 radeon_add_legacy_encoder(dev,
1381 radeon_get_encoder_id(dev, 1398 radeon_get_encoder_id(dev,
@@ -1384,7 +1401,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1384 ATOM_DEVICE_TV1_SUPPORT); 1401 ATOM_DEVICE_TV1_SUPPORT);
1385 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1402 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1386 DRM_MODE_CONNECTOR_SVIDEO, 1403 DRM_MODE_CONNECTOR_SVIDEO,
1387 &ddc_i2c); 1404 &ddc_i2c,
1405 CONNECTOR_OBJECT_ID_SVIDEO);
1388 break; 1406 break;
1389 case CT_MINI_EXTERNAL: 1407 case CT_MINI_EXTERNAL:
1390 DRM_INFO("Connector Table: %d (mini external tmds)\n", 1408 DRM_INFO("Connector Table: %d (mini external tmds)\n",
@@ -1401,10 +1419,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1401 ATOM_DEVICE_CRT2_SUPPORT, 1419 ATOM_DEVICE_CRT2_SUPPORT,
1402 2), 1420 2),
1403 ATOM_DEVICE_CRT2_SUPPORT); 1421 ATOM_DEVICE_CRT2_SUPPORT);
1422 /* XXX are any DL? */
1404 radeon_add_legacy_connector(dev, 0, 1423 radeon_add_legacy_connector(dev, 0,
1405 ATOM_DEVICE_DFP2_SUPPORT | 1424 ATOM_DEVICE_DFP2_SUPPORT |
1406 ATOM_DEVICE_CRT2_SUPPORT, 1425 ATOM_DEVICE_CRT2_SUPPORT,
1407 DRM_MODE_CONNECTOR_DVII, &ddc_i2c); 1426 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1427 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1408 /* TV - TV DAC */ 1428 /* TV - TV DAC */
1409 radeon_add_legacy_encoder(dev, 1429 radeon_add_legacy_encoder(dev,
1410 radeon_get_encoder_id(dev, 1430 radeon_get_encoder_id(dev,
@@ -1413,7 +1433,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1413 ATOM_DEVICE_TV1_SUPPORT); 1433 ATOM_DEVICE_TV1_SUPPORT);
1414 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, 1434 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT,
1415 DRM_MODE_CONNECTOR_SVIDEO, 1435 DRM_MODE_CONNECTOR_SVIDEO,
1416 &ddc_i2c); 1436 &ddc_i2c,
1437 CONNECTOR_OBJECT_ID_SVIDEO);
1417 break; 1438 break;
1418 case CT_MINI_INTERNAL: 1439 case CT_MINI_INTERNAL:
1419 DRM_INFO("Connector Table: %d (mini internal tmds)\n", 1440 DRM_INFO("Connector Table: %d (mini internal tmds)\n",
@@ -1433,7 +1454,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1433 radeon_add_legacy_connector(dev, 0, 1454 radeon_add_legacy_connector(dev, 0,
1434 ATOM_DEVICE_DFP1_SUPPORT | 1455 ATOM_DEVICE_DFP1_SUPPORT |
1435 ATOM_DEVICE_CRT2_SUPPORT, 1456 ATOM_DEVICE_CRT2_SUPPORT,
1436 DRM_MODE_CONNECTOR_DVII, &ddc_i2c); 1457 DRM_MODE_CONNECTOR_DVII, &ddc_i2c,
1458 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1437 /* TV - TV DAC */ 1459 /* TV - TV DAC */
1438 radeon_add_legacy_encoder(dev, 1460 radeon_add_legacy_encoder(dev,
1439 radeon_get_encoder_id(dev, 1461 radeon_get_encoder_id(dev,
@@ -1442,7 +1464,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1442 ATOM_DEVICE_TV1_SUPPORT); 1464 ATOM_DEVICE_TV1_SUPPORT);
1443 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT, 1465 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_TV1_SUPPORT,
1444 DRM_MODE_CONNECTOR_SVIDEO, 1466 DRM_MODE_CONNECTOR_SVIDEO,
1445 &ddc_i2c); 1467 &ddc_i2c,
1468 CONNECTOR_OBJECT_ID_SVIDEO);
1446 break; 1469 break;
1447 case CT_IMAC_G5_ISIGHT: 1470 case CT_IMAC_G5_ISIGHT:
1448 DRM_INFO("Connector Table: %d (imac g5 isight)\n", 1471 DRM_INFO("Connector Table: %d (imac g5 isight)\n",
@@ -1455,7 +1478,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1455 0), 1478 0),
1456 ATOM_DEVICE_DFP1_SUPPORT); 1479 ATOM_DEVICE_DFP1_SUPPORT);
1457 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT, 1480 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_DFP1_SUPPORT,
1458 DRM_MODE_CONNECTOR_DVID, &ddc_i2c); 1481 DRM_MODE_CONNECTOR_DVID, &ddc_i2c,
1482 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D);
1459 /* VGA - tv dac */ 1483 /* VGA - tv dac */
1460 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC); 1484 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_DVI_DDC);
1461 radeon_add_legacy_encoder(dev, 1485 radeon_add_legacy_encoder(dev,
@@ -1464,7 +1488,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1464 2), 1488 2),
1465 ATOM_DEVICE_CRT2_SUPPORT); 1489 ATOM_DEVICE_CRT2_SUPPORT);
1466 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1490 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1467 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1491 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1492 CONNECTOR_OBJECT_ID_VGA);
1468 /* TV - TV DAC */ 1493 /* TV - TV DAC */
1469 radeon_add_legacy_encoder(dev, 1494 radeon_add_legacy_encoder(dev,
1470 radeon_get_encoder_id(dev, 1495 radeon_get_encoder_id(dev,
@@ -1473,7 +1498,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1473 ATOM_DEVICE_TV1_SUPPORT); 1498 ATOM_DEVICE_TV1_SUPPORT);
1474 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1499 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1475 DRM_MODE_CONNECTOR_SVIDEO, 1500 DRM_MODE_CONNECTOR_SVIDEO,
1476 &ddc_i2c); 1501 &ddc_i2c,
1502 CONNECTOR_OBJECT_ID_SVIDEO);
1477 break; 1503 break;
1478 case CT_EMAC: 1504 case CT_EMAC:
1479 DRM_INFO("Connector Table: %d (emac)\n", 1505 DRM_INFO("Connector Table: %d (emac)\n",
@@ -1486,7 +1512,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1486 1), 1512 1),
1487 ATOM_DEVICE_CRT1_SUPPORT); 1513 ATOM_DEVICE_CRT1_SUPPORT);
1488 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT, 1514 radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT,
1489 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1515 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1516 CONNECTOR_OBJECT_ID_VGA);
1490 /* VGA - tv dac */ 1517 /* VGA - tv dac */
1491 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC); 1518 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_CRT2_DDC);
1492 radeon_add_legacy_encoder(dev, 1519 radeon_add_legacy_encoder(dev,
@@ -1495,7 +1522,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1495 2), 1522 2),
1496 ATOM_DEVICE_CRT2_SUPPORT); 1523 ATOM_DEVICE_CRT2_SUPPORT);
1497 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT, 1524 radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
1498 DRM_MODE_CONNECTOR_VGA, &ddc_i2c); 1525 DRM_MODE_CONNECTOR_VGA, &ddc_i2c,
1526 CONNECTOR_OBJECT_ID_VGA);
1499 /* TV - TV DAC */ 1527 /* TV - TV DAC */
1500 radeon_add_legacy_encoder(dev, 1528 radeon_add_legacy_encoder(dev,
1501 radeon_get_encoder_id(dev, 1529 radeon_get_encoder_id(dev,
@@ -1504,7 +1532,8 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev)
1504 ATOM_DEVICE_TV1_SUPPORT); 1532 ATOM_DEVICE_TV1_SUPPORT);
1505 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT, 1533 radeon_add_legacy_connector(dev, 2, ATOM_DEVICE_TV1_SUPPORT,
1506 DRM_MODE_CONNECTOR_SVIDEO, 1534 DRM_MODE_CONNECTOR_SVIDEO,
1507 &ddc_i2c); 1535 &ddc_i2c,
1536 CONNECTOR_OBJECT_ID_SVIDEO);
1508 break; 1537 break;
1509 default: 1538 default:
1510 DRM_INFO("Connector table: %d (invalid)\n", 1539 DRM_INFO("Connector table: %d (invalid)\n",
@@ -1581,11 +1610,63 @@ static bool radeon_apply_legacy_quirks(struct drm_device *dev,
1581 return true; 1610 return true;
1582} 1611}
1583 1612
1613static bool radeon_apply_legacy_tv_quirks(struct drm_device *dev)
1614{
1615 /* Acer 5102 has non-existent TV port */
1616 if (dev->pdev->device == 0x5975 &&
1617 dev->pdev->subsystem_vendor == 0x1025 &&
1618 dev->pdev->subsystem_device == 0x009f)
1619 return false;
1620
1621 /* HP dc5750 has non-existent TV port */
1622 if (dev->pdev->device == 0x5974 &&
1623 dev->pdev->subsystem_vendor == 0x103c &&
1624 dev->pdev->subsystem_device == 0x280a)
1625 return false;
1626
1627 return true;
1628}
1629
1630static uint16_t combios_check_dl_dvi(struct drm_device *dev, int is_dvi_d)
1631{
1632 struct radeon_device *rdev = dev->dev_private;
1633 uint32_t ext_tmds_info;
1634
1635 if (rdev->flags & RADEON_IS_IGP) {
1636 if (is_dvi_d)
1637 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D;
1638 else
1639 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
1640 }
1641 ext_tmds_info = combios_get_table_offset(dev, COMBIOS_EXT_TMDS_INFO_TABLE);
1642 if (ext_tmds_info) {
1643 uint8_t rev = RBIOS8(ext_tmds_info);
1644 uint8_t flags = RBIOS8(ext_tmds_info + 4 + 5);
1645 if (rev >= 3) {
1646 if (is_dvi_d)
1647 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D;
1648 else
1649 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I;
1650 } else {
1651 if (flags & 1) {
1652 if (is_dvi_d)
1653 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D;
1654 else
1655 return CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I;
1656 }
1657 }
1658 }
1659 if (is_dvi_d)
1660 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D;
1661 else
1662 return CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
1663}
1664
1584bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) 1665bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1585{ 1666{
1586 struct radeon_device *rdev = dev->dev_private; 1667 struct radeon_device *rdev = dev->dev_private;
1587 uint32_t conn_info, entry, devices; 1668 uint32_t conn_info, entry, devices;
1588 uint16_t tmp; 1669 uint16_t tmp, connector_object_id;
1589 enum radeon_combios_ddc ddc_type; 1670 enum radeon_combios_ddc ddc_type;
1590 enum radeon_combios_connector connector; 1671 enum radeon_combios_connector connector;
1591 int i = 0; 1672 int i = 0;
@@ -1628,8 +1709,9 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1628 break; 1709 break;
1629 } 1710 }
1630 1711
1631 radeon_apply_legacy_quirks(dev, i, &connector, 1712 if (!radeon_apply_legacy_quirks(dev, i, &connector,
1632 &ddc_i2c); 1713 &ddc_i2c))
1714 continue;
1633 1715
1634 switch (connector) { 1716 switch (connector) {
1635 case CONNECTOR_PROPRIETARY_LEGACY: 1717 case CONNECTOR_PROPRIETARY_LEGACY:
@@ -1644,7 +1726,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1644 radeon_add_legacy_connector(dev, i, devices, 1726 radeon_add_legacy_connector(dev, i, devices,
1645 legacy_connector_convert 1727 legacy_connector_convert
1646 [connector], 1728 [connector],
1647 &ddc_i2c); 1729 &ddc_i2c,
1730 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D);
1648 break; 1731 break;
1649 case CONNECTOR_CRT_LEGACY: 1732 case CONNECTOR_CRT_LEGACY:
1650 if (tmp & 0x1) { 1733 if (tmp & 0x1) {
@@ -1669,7 +1752,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1669 devices, 1752 devices,
1670 legacy_connector_convert 1753 legacy_connector_convert
1671 [connector], 1754 [connector],
1672 &ddc_i2c); 1755 &ddc_i2c,
1756 CONNECTOR_OBJECT_ID_VGA);
1673 break; 1757 break;
1674 case CONNECTOR_DVI_I_LEGACY: 1758 case CONNECTOR_DVI_I_LEGACY:
1675 devices = 0; 1759 devices = 0;
@@ -1698,6 +1782,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1698 ATOM_DEVICE_DFP2_SUPPORT, 1782 ATOM_DEVICE_DFP2_SUPPORT,
1699 0), 1783 0),
1700 ATOM_DEVICE_DFP2_SUPPORT); 1784 ATOM_DEVICE_DFP2_SUPPORT);
1785 connector_object_id = combios_check_dl_dvi(dev, 0);
1701 } else { 1786 } else {
1702 devices |= ATOM_DEVICE_DFP1_SUPPORT; 1787 devices |= ATOM_DEVICE_DFP1_SUPPORT;
1703 radeon_add_legacy_encoder(dev, 1788 radeon_add_legacy_encoder(dev,
@@ -1706,19 +1791,24 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1706 ATOM_DEVICE_DFP1_SUPPORT, 1791 ATOM_DEVICE_DFP1_SUPPORT,
1707 0), 1792 0),
1708 ATOM_DEVICE_DFP1_SUPPORT); 1793 ATOM_DEVICE_DFP1_SUPPORT);
1794 connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
1709 } 1795 }
1710 radeon_add_legacy_connector(dev, 1796 radeon_add_legacy_connector(dev,
1711 i, 1797 i,
1712 devices, 1798 devices,
1713 legacy_connector_convert 1799 legacy_connector_convert
1714 [connector], 1800 [connector],
1715 &ddc_i2c); 1801 &ddc_i2c,
1802 connector_object_id);
1716 break; 1803 break;
1717 case CONNECTOR_DVI_D_LEGACY: 1804 case CONNECTOR_DVI_D_LEGACY:
1718 if ((tmp >> 4) & 0x1) 1805 if ((tmp >> 4) & 0x1) {
1719 devices = ATOM_DEVICE_DFP2_SUPPORT; 1806 devices = ATOM_DEVICE_DFP2_SUPPORT;
1720 else 1807 connector_object_id = combios_check_dl_dvi(dev, 1);
1808 } else {
1721 devices = ATOM_DEVICE_DFP1_SUPPORT; 1809 devices = ATOM_DEVICE_DFP1_SUPPORT;
1810 connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I;
1811 }
1722 radeon_add_legacy_encoder(dev, 1812 radeon_add_legacy_encoder(dev,
1723 radeon_get_encoder_id 1813 radeon_get_encoder_id
1724 (dev, devices, 0), 1814 (dev, devices, 0),
@@ -1726,7 +1816,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1726 radeon_add_legacy_connector(dev, i, devices, 1816 radeon_add_legacy_connector(dev, i, devices,
1727 legacy_connector_convert 1817 legacy_connector_convert
1728 [connector], 1818 [connector],
1729 &ddc_i2c); 1819 &ddc_i2c,
1820 connector_object_id);
1730 break; 1821 break;
1731 case CONNECTOR_CTV_LEGACY: 1822 case CONNECTOR_CTV_LEGACY:
1732 case CONNECTOR_STV_LEGACY: 1823 case CONNECTOR_STV_LEGACY:
@@ -1740,7 +1831,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1740 ATOM_DEVICE_TV1_SUPPORT, 1831 ATOM_DEVICE_TV1_SUPPORT,
1741 legacy_connector_convert 1832 legacy_connector_convert
1742 [connector], 1833 [connector],
1743 &ddc_i2c); 1834 &ddc_i2c,
1835 CONNECTOR_OBJECT_ID_SVIDEO);
1744 break; 1836 break;
1745 default: 1837 default:
1746 DRM_ERROR("Unknown connector type: %d\n", 1838 DRM_ERROR("Unknown connector type: %d\n",
@@ -1772,10 +1864,29 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1772 ATOM_DEVICE_CRT1_SUPPORT | 1864 ATOM_DEVICE_CRT1_SUPPORT |
1773 ATOM_DEVICE_DFP1_SUPPORT, 1865 ATOM_DEVICE_DFP1_SUPPORT,
1774 DRM_MODE_CONNECTOR_DVII, 1866 DRM_MODE_CONNECTOR_DVII,
1775 &ddc_i2c); 1867 &ddc_i2c,
1868 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I);
1776 } else { 1869 } else {
1777 DRM_DEBUG("No connector info found\n"); 1870 uint16_t crt_info =
1778 return false; 1871 combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
1872 DRM_DEBUG("Found CRT table, assuming VGA connector\n");
1873 if (crt_info) {
1874 radeon_add_legacy_encoder(dev,
1875 radeon_get_encoder_id(dev,
1876 ATOM_DEVICE_CRT1_SUPPORT,
1877 1),
1878 ATOM_DEVICE_CRT1_SUPPORT);
1879 ddc_i2c = combios_setup_i2c_bus(RADEON_GPIO_VGA_DDC);
1880 radeon_add_legacy_connector(dev,
1881 0,
1882 ATOM_DEVICE_CRT1_SUPPORT,
1883 DRM_MODE_CONNECTOR_VGA,
1884 &ddc_i2c,
1885 CONNECTOR_OBJECT_ID_VGA);
1886 } else {
1887 DRM_DEBUG("No connector info found\n");
1888 return false;
1889 }
1779 } 1890 }
1780 } 1891 }
1781 1892
@@ -1870,7 +1981,8 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1870 5, 1981 5,
1871 ATOM_DEVICE_LCD1_SUPPORT, 1982 ATOM_DEVICE_LCD1_SUPPORT,
1872 DRM_MODE_CONNECTOR_LVDS, 1983 DRM_MODE_CONNECTOR_LVDS,
1873 &ddc_i2c); 1984 &ddc_i2c,
1985 CONNECTOR_OBJECT_ID_LVDS);
1874 } 1986 }
1875 } 1987 }
1876 1988
@@ -1880,16 +1992,19 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev)
1880 combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE); 1992 combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE);
1881 if (tv_info) { 1993 if (tv_info) {
1882 if (RBIOS8(tv_info + 6) == 'T') { 1994 if (RBIOS8(tv_info + 6) == 'T') {
1883 radeon_add_legacy_encoder(dev, 1995 if (radeon_apply_legacy_tv_quirks(dev)) {
1884 radeon_get_encoder_id 1996 radeon_add_legacy_encoder(dev,
1885 (dev, 1997 radeon_get_encoder_id
1886 ATOM_DEVICE_TV1_SUPPORT, 1998 (dev,
1887 2), 1999 ATOM_DEVICE_TV1_SUPPORT,
1888 ATOM_DEVICE_TV1_SUPPORT); 2000 2),
1889 radeon_add_legacy_connector(dev, 6, 2001 ATOM_DEVICE_TV1_SUPPORT);
1890 ATOM_DEVICE_TV1_SUPPORT, 2002 radeon_add_legacy_connector(dev, 6,
1891 DRM_MODE_CONNECTOR_SVIDEO, 2003 ATOM_DEVICE_TV1_SUPPORT,
1892 &ddc_i2c); 2004 DRM_MODE_CONNECTOR_SVIDEO,
2005 &ddc_i2c,
2006 CONNECTOR_OBJECT_ID_SVIDEO);
2007 }
1893 } 2008 }
1894 } 2009 }
1895 } 2010 }
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index e376be47a4a0..fce4c4087fda 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -178,25 +178,12 @@ static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encode
178 struct drm_device *dev = encoder->dev; 178 struct drm_device *dev = encoder->dev;
179 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 179 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
180 struct drm_display_mode *mode = NULL; 180 struct drm_display_mode *mode = NULL;
181 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; 181 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
182
183 if (native_mode->panel_xres != 0 &&
184 native_mode->panel_yres != 0 &&
185 native_mode->dotclock != 0) {
186 mode = drm_mode_create(dev);
187
188 mode->hdisplay = native_mode->panel_xres;
189 mode->vdisplay = native_mode->panel_yres;
190
191 mode->htotal = mode->hdisplay + native_mode->hblank;
192 mode->hsync_start = mode->hdisplay + native_mode->hoverplus;
193 mode->hsync_end = mode->hsync_start + native_mode->hsync_width;
194 mode->vtotal = mode->vdisplay + native_mode->vblank;
195 mode->vsync_start = mode->vdisplay + native_mode->voverplus;
196 mode->vsync_end = mode->vsync_start + native_mode->vsync_width;
197 mode->clock = native_mode->dotclock;
198 mode->flags = 0;
199 182
183 if (native_mode->hdisplay != 0 &&
184 native_mode->vdisplay != 0 &&
185 native_mode->clock != 0) {
186 mode = drm_mode_duplicate(dev, native_mode);
200 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER; 187 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
201 drm_mode_set_name(mode); 188 drm_mode_set_name(mode);
202 189
@@ -210,7 +197,7 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn
210 struct drm_device *dev = encoder->dev; 197 struct drm_device *dev = encoder->dev;
211 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 198 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
212 struct drm_display_mode *mode = NULL; 199 struct drm_display_mode *mode = NULL;
213 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; 200 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
214 int i; 201 int i;
215 struct mode_size { 202 struct mode_size {
216 int w; 203 int w;
@@ -236,11 +223,16 @@ static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_conn
236 }; 223 };
237 224
238 for (i = 0; i < 17; i++) { 225 for (i = 0; i < 17; i++) {
226 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
227 if (common_modes[i].w > 1024 ||
228 common_modes[i].h > 768)
229 continue;
230 }
239 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 231 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
240 if (common_modes[i].w > native_mode->panel_xres || 232 if (common_modes[i].w > native_mode->hdisplay ||
241 common_modes[i].h > native_mode->panel_yres || 233 common_modes[i].h > native_mode->vdisplay ||
242 (common_modes[i].w == native_mode->panel_xres && 234 (common_modes[i].w == native_mode->hdisplay &&
243 common_modes[i].h == native_mode->panel_yres)) 235 common_modes[i].h == native_mode->vdisplay))
244 continue; 236 continue;
245 } 237 }
246 if (common_modes[i].w < 320 || common_modes[i].h < 200) 238 if (common_modes[i].w < 320 || common_modes[i].h < 200)
@@ -344,28 +336,23 @@ static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
344 struct drm_connector *connector) 336 struct drm_connector *connector)
345{ 337{
346 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 338 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
347 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; 339 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
348 340
349 /* Try to get native mode details from EDID if necessary */ 341 /* Try to get native mode details from EDID if necessary */
350 if (!native_mode->dotclock) { 342 if (!native_mode->clock) {
351 struct drm_display_mode *t, *mode; 343 struct drm_display_mode *t, *mode;
352 344
353 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) { 345 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
354 if (mode->hdisplay == native_mode->panel_xres && 346 if (mode->hdisplay == native_mode->hdisplay &&
355 mode->vdisplay == native_mode->panel_yres) { 347 mode->vdisplay == native_mode->vdisplay) {
356 native_mode->hblank = mode->htotal - mode->hdisplay; 348 *native_mode = *mode;
357 native_mode->hoverplus = mode->hsync_start - mode->hdisplay; 349 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
358 native_mode->hsync_width = mode->hsync_end - mode->hsync_start;
359 native_mode->vblank = mode->vtotal - mode->vdisplay;
360 native_mode->voverplus = mode->vsync_start - mode->vdisplay;
361 native_mode->vsync_width = mode->vsync_end - mode->vsync_start;
362 native_mode->dotclock = mode->clock;
363 DRM_INFO("Determined LVDS native mode details from EDID\n"); 350 DRM_INFO("Determined LVDS native mode details from EDID\n");
364 break; 351 break;
365 } 352 }
366 } 353 }
367 } 354 }
368 if (!native_mode->dotclock) { 355 if (!native_mode->clock) {
369 DRM_INFO("No LVDS native mode details, disabling RMX\n"); 356 DRM_INFO("No LVDS native mode details, disabling RMX\n");
370 radeon_encoder->rmx_type = RMX_OFF; 357 radeon_encoder->rmx_type = RMX_OFF;
371 } 358 }
@@ -410,13 +397,64 @@ static int radeon_lvds_get_modes(struct drm_connector *connector)
410static int radeon_lvds_mode_valid(struct drm_connector *connector, 397static int radeon_lvds_mode_valid(struct drm_connector *connector,
411 struct drm_display_mode *mode) 398 struct drm_display_mode *mode)
412{ 399{
400 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
401
402 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
403 return MODE_PANEL;
404
405 if (encoder) {
406 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
407 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
408
409 /* AVIVO hardware supports downscaling modes larger than the panel
410 * to the panel size, but I'm not sure this is desirable.
411 */
412 if ((mode->hdisplay > native_mode->hdisplay) ||
413 (mode->vdisplay > native_mode->vdisplay))
414 return MODE_PANEL;
415
416 /* if scaling is disabled, block non-native modes */
417 if (radeon_encoder->rmx_type == RMX_OFF) {
418 if ((mode->hdisplay != native_mode->hdisplay) ||
419 (mode->vdisplay != native_mode->vdisplay))
420 return MODE_PANEL;
421 }
422 }
423
413 return MODE_OK; 424 return MODE_OK;
414} 425}
415 426
416static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector) 427static enum drm_connector_status radeon_lvds_detect(struct drm_connector *connector)
417{ 428{
418 enum drm_connector_status ret = connector_status_connected; 429 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
430 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
431 enum drm_connector_status ret = connector_status_disconnected;
432
433 if (encoder) {
434 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
435 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
436
437 /* check if panel is valid */
438 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
439 ret = connector_status_connected;
440
441 }
442
443 /* check for edid as well */
444 if (radeon_connector->edid)
445 ret = connector_status_connected;
446 else {
447 if (radeon_connector->ddc_bus) {
448 radeon_i2c_do_lock(radeon_connector, 1);
449 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
450 &radeon_connector->ddc_bus->adapter);
451 radeon_i2c_do_lock(radeon_connector, 0);
452 if (radeon_connector->edid)
453 ret = connector_status_connected;
454 }
455 }
419 /* check acpi lid status ??? */ 456 /* check acpi lid status ??? */
457
420 radeon_connector_update_scratch_regs(connector, ret); 458 radeon_connector_update_scratch_regs(connector, ret);
421 return ret; 459 return ret;
422} 460}
@@ -427,6 +465,8 @@ static void radeon_connector_destroy(struct drm_connector *connector)
427 465
428 if (radeon_connector->ddc_bus) 466 if (radeon_connector->ddc_bus)
429 radeon_i2c_destroy(radeon_connector->ddc_bus); 467 radeon_i2c_destroy(radeon_connector->ddc_bus);
468 if (radeon_connector->edid)
469 kfree(radeon_connector->edid);
430 kfree(radeon_connector->con_priv); 470 kfree(radeon_connector->con_priv);
431 drm_sysfs_connector_remove(connector); 471 drm_sysfs_connector_remove(connector);
432 drm_connector_cleanup(connector); 472 drm_connector_cleanup(connector);
@@ -496,6 +536,8 @@ static int radeon_vga_get_modes(struct drm_connector *connector)
496static int radeon_vga_mode_valid(struct drm_connector *connector, 536static int radeon_vga_mode_valid(struct drm_connector *connector,
497 struct drm_display_mode *mode) 537 struct drm_display_mode *mode)
498{ 538{
539 /* XXX check mode bandwidth */
540 /* XXX verify against max DAC output frequency */
499 return MODE_OK; 541 return MODE_OK;
500} 542}
501 543
@@ -514,9 +556,32 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect
514 radeon_i2c_do_lock(radeon_connector, 1); 556 radeon_i2c_do_lock(radeon_connector, 1);
515 dret = radeon_ddc_probe(radeon_connector); 557 dret = radeon_ddc_probe(radeon_connector);
516 radeon_i2c_do_lock(radeon_connector, 0); 558 radeon_i2c_do_lock(radeon_connector, 0);
517 if (dret) 559 if (dret) {
518 ret = connector_status_connected; 560 if (radeon_connector->edid) {
519 else { 561 kfree(radeon_connector->edid);
562 radeon_connector->edid = NULL;
563 }
564 radeon_i2c_do_lock(radeon_connector, 1);
565 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
566 radeon_i2c_do_lock(radeon_connector, 0);
567
568 if (!radeon_connector->edid) {
569 DRM_ERROR("DDC responded but not EDID found for %s\n",
570 drm_get_connector_name(connector));
571 } else {
572 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
573
574 /* some oems have boards with separate digital and analog connectors
575 * with a shared ddc line (often vga + hdmi)
576 */
577 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
578 kfree(radeon_connector->edid);
579 radeon_connector->edid = NULL;
580 ret = connector_status_disconnected;
581 } else
582 ret = connector_status_connected;
583 }
584 } else {
520 if (radeon_connector->dac_load_detect) { 585 if (radeon_connector->dac_load_detect) {
521 encoder_funcs = encoder->helper_private; 586 encoder_funcs = encoder->helper_private;
522 ret = encoder_funcs->detect(encoder, connector); 587 ret = encoder_funcs->detect(encoder, connector);
@@ -570,6 +635,8 @@ static int radeon_tv_get_modes(struct drm_connector *connector)
570static int radeon_tv_mode_valid(struct drm_connector *connector, 635static int radeon_tv_mode_valid(struct drm_connector *connector,
571 struct drm_display_mode *mode) 636 struct drm_display_mode *mode)
572{ 637{
638 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
639 return MODE_CLOCK_RANGE;
573 return MODE_OK; 640 return MODE_OK;
574} 641}
575 642
@@ -644,6 +711,10 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
644 dret = radeon_ddc_probe(radeon_connector); 711 dret = radeon_ddc_probe(radeon_connector);
645 radeon_i2c_do_lock(radeon_connector, 0); 712 radeon_i2c_do_lock(radeon_connector, 0);
646 if (dret) { 713 if (dret) {
714 if (radeon_connector->edid) {
715 kfree(radeon_connector->edid);
716 radeon_connector->edid = NULL;
717 }
647 radeon_i2c_do_lock(radeon_connector, 1); 718 radeon_i2c_do_lock(radeon_connector, 1);
648 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); 719 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
649 radeon_i2c_do_lock(radeon_connector, 0); 720 radeon_i2c_do_lock(radeon_connector, 0);
@@ -654,10 +725,15 @@ static enum drm_connector_status radeon_dvi_detect(struct drm_connector *connect
654 } else { 725 } else {
655 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL); 726 radeon_connector->use_digital = !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
656 727
657 /* if this isn't a digital monitor 728 /* some oems have boards with separate digital and analog connectors
658 then we need to make sure we don't have any 729 * with a shared ddc line (often vga + hdmi)
659 TV conflicts */ 730 */
660 ret = connector_status_connected; 731 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
732 kfree(radeon_connector->edid);
733 radeon_connector->edid = NULL;
734 ret = connector_status_disconnected;
735 } else
736 ret = connector_status_connected;
661 } 737 }
662 } 738 }
663 739
@@ -753,9 +829,27 @@ static void radeon_dvi_force(struct drm_connector *connector)
753 radeon_connector->use_digital = true; 829 radeon_connector->use_digital = true;
754} 830}
755 831
832static int radeon_dvi_mode_valid(struct drm_connector *connector,
833 struct drm_display_mode *mode)
834{
835 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
836
837 /* XXX check mode bandwidth */
838
839 if (radeon_connector->use_digital && (mode->clock > 165000)) {
840 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
841 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
842 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
843 return MODE_OK;
844 else
845 return MODE_CLOCK_HIGH;
846 }
847 return MODE_OK;
848}
849
756struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = { 850struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
757 .get_modes = radeon_dvi_get_modes, 851 .get_modes = radeon_dvi_get_modes,
758 .mode_valid = radeon_vga_mode_valid, 852 .mode_valid = radeon_dvi_mode_valid,
759 .best_encoder = radeon_dvi_encoder, 853 .best_encoder = radeon_dvi_encoder,
760}; 854};
761 855
@@ -775,13 +869,15 @@ radeon_add_atom_connector(struct drm_device *dev,
775 int connector_type, 869 int connector_type,
776 struct radeon_i2c_bus_rec *i2c_bus, 870 struct radeon_i2c_bus_rec *i2c_bus,
777 bool linkb, 871 bool linkb,
778 uint32_t igp_lane_info) 872 uint32_t igp_lane_info,
873 uint16_t connector_object_id)
779{ 874{
780 struct radeon_device *rdev = dev->dev_private; 875 struct radeon_device *rdev = dev->dev_private;
781 struct drm_connector *connector; 876 struct drm_connector *connector;
782 struct radeon_connector *radeon_connector; 877 struct radeon_connector *radeon_connector;
783 struct radeon_connector_atom_dig *radeon_dig_connector; 878 struct radeon_connector_atom_dig *radeon_dig_connector;
784 uint32_t subpixel_order = SubPixelNone; 879 uint32_t subpixel_order = SubPixelNone;
880 bool shared_ddc = false;
785 int ret; 881 int ret;
786 882
787 /* fixme - tv/cv/din */ 883 /* fixme - tv/cv/din */
@@ -795,6 +891,13 @@ radeon_add_atom_connector(struct drm_device *dev,
795 radeon_connector->devices |= supported_device; 891 radeon_connector->devices |= supported_device;
796 return; 892 return;
797 } 893 }
894 if (radeon_connector->ddc_bus && i2c_bus->valid) {
895 if (memcmp(&radeon_connector->ddc_bus->rec, i2c_bus,
896 sizeof(struct radeon_i2c_bus_rec)) == 0) {
897 radeon_connector->shared_ddc = true;
898 shared_ddc = true;
899 }
900 }
798 } 901 }
799 902
800 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL); 903 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
@@ -805,6 +908,8 @@ radeon_add_atom_connector(struct drm_device *dev,
805 908
806 radeon_connector->connector_id = connector_id; 909 radeon_connector->connector_id = connector_id;
807 radeon_connector->devices = supported_device; 910 radeon_connector->devices = supported_device;
911 radeon_connector->shared_ddc = shared_ddc;
912 radeon_connector->connector_object_id = connector_object_id;
808 switch (connector_type) { 913 switch (connector_type) {
809 case DRM_MODE_CONNECTOR_VGA: 914 case DRM_MODE_CONNECTOR_VGA:
810 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); 915 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
@@ -956,7 +1061,8 @@ radeon_add_legacy_connector(struct drm_device *dev,
956 uint32_t connector_id, 1061 uint32_t connector_id,
957 uint32_t supported_device, 1062 uint32_t supported_device,
958 int connector_type, 1063 int connector_type,
959 struct radeon_i2c_bus_rec *i2c_bus) 1064 struct radeon_i2c_bus_rec *i2c_bus,
1065 uint16_t connector_object_id)
960{ 1066{
961 struct radeon_device *rdev = dev->dev_private; 1067 struct radeon_device *rdev = dev->dev_private;
962 struct drm_connector *connector; 1068 struct drm_connector *connector;
@@ -985,6 +1091,7 @@ radeon_add_legacy_connector(struct drm_device *dev,
985 1091
986 radeon_connector->connector_id = connector_id; 1092 radeon_connector->connector_id = connector_id;
987 radeon_connector->devices = supported_device; 1093 radeon_connector->devices = supported_device;
1094 radeon_connector->connector_object_id = connector_object_id;
988 switch (connector_type) { 1095 switch (connector_type) {
989 case DRM_MODE_CONNECTOR_VGA: 1096 case DRM_MODE_CONNECTOR_VGA:
990 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type); 1097 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
diff --git a/drivers/gpu/drm/radeon/radeon_cursor.c b/drivers/gpu/drm/radeon/radeon_cursor.c
index b13c79e38bc0..28772a37009c 100644
--- a/drivers/gpu/drm/radeon/radeon_cursor.c
+++ b/drivers/gpu/drm/radeon/radeon_cursor.c
@@ -109,9 +109,15 @@ static void radeon_set_cursor(struct drm_crtc *crtc, struct drm_gem_object *obj,
109 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 109 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
110 struct radeon_device *rdev = crtc->dev->dev_private; 110 struct radeon_device *rdev = crtc->dev->dev_private;
111 111
112 if (ASIC_IS_AVIVO(rdev)) 112 if (ASIC_IS_AVIVO(rdev)) {
113 if (rdev->family >= CHIP_RV770) {
114 if (radeon_crtc->crtc_id)
115 WREG32(R700_D2CUR_SURFACE_ADDRESS_HIGH, 0);
116 else
117 WREG32(R700_D1CUR_SURFACE_ADDRESS_HIGH, 0);
118 }
113 WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr); 119 WREG32(AVIVO_D1CUR_SURFACE_ADDRESS + radeon_crtc->crtc_offset, gpu_addr);
114 else { 120 } else {
115 radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr; 121 radeon_crtc->legacy_cursor_offset = gpu_addr - radeon_crtc->legacy_display_base_addr;
116 /* offset is from DISP(2)_BASE_ADDRESS */ 122 /* offset is from DISP(2)_BASE_ADDRESS */
117 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset); 123 WREG32(RADEON_CUR_OFFSET + radeon_crtc->crtc_offset, radeon_crtc->legacy_cursor_offset);
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 3d667031de6e..e3f9edfa40fe 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -444,20 +444,24 @@ static uint32_t cail_reg_read(struct card_info *info, uint32_t reg)
444 return r; 444 return r;
445} 445}
446 446
447static struct card_info atom_card_info = {
448 .dev = NULL,
449 .reg_read = cail_reg_read,
450 .reg_write = cail_reg_write,
451 .mc_read = cail_mc_read,
452 .mc_write = cail_mc_write,
453 .pll_read = cail_pll_read,
454 .pll_write = cail_pll_write,
455};
456
457int radeon_atombios_init(struct radeon_device *rdev) 447int radeon_atombios_init(struct radeon_device *rdev)
458{ 448{
459 atom_card_info.dev = rdev->ddev; 449 struct card_info *atom_card_info =
460 rdev->mode_info.atom_context = atom_parse(&atom_card_info, rdev->bios); 450 kzalloc(sizeof(struct card_info), GFP_KERNEL);
451
452 if (!atom_card_info)
453 return -ENOMEM;
454
455 rdev->mode_info.atom_card_info = atom_card_info;
456 atom_card_info->dev = rdev->ddev;
457 atom_card_info->reg_read = cail_reg_read;
458 atom_card_info->reg_write = cail_reg_write;
459 atom_card_info->mc_read = cail_mc_read;
460 atom_card_info->mc_write = cail_mc_write;
461 atom_card_info->pll_read = cail_pll_read;
462 atom_card_info->pll_write = cail_pll_write;
463
464 rdev->mode_info.atom_context = atom_parse(atom_card_info, rdev->bios);
461 radeon_atom_initialize_bios_scratch_regs(rdev->ddev); 465 radeon_atom_initialize_bios_scratch_regs(rdev->ddev);
462 return 0; 466 return 0;
463} 467}
@@ -465,6 +469,7 @@ int radeon_atombios_init(struct radeon_device *rdev)
465void radeon_atombios_fini(struct radeon_device *rdev) 469void radeon_atombios_fini(struct radeon_device *rdev)
466{ 470{
467 kfree(rdev->mode_info.atom_context); 471 kfree(rdev->mode_info.atom_context);
472 kfree(rdev->mode_info.atom_card_info);
468} 473}
469 474
470int radeon_combios_init(struct radeon_device *rdev) 475int radeon_combios_init(struct radeon_device *rdev)
@@ -582,10 +587,9 @@ int radeon_device_init(struct radeon_device *rdev,
582 DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size); 587 DRM_INFO("register mmio size: %u\n", (unsigned)rdev->rmmio_size);
583 588
584 /* if we have > 1 VGA cards, then disable the radeon VGA resources */ 589 /* if we have > 1 VGA cards, then disable the radeon VGA resources */
585 r = vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode); 590 /* this will fail for cards that aren't VGA class devices, just
586 if (r) { 591 * ignore it */
587 return -EINVAL; 592 vga_client_register(rdev->pdev, rdev, NULL, radeon_vga_set_decode);
588 }
589 593
590 r = radeon_init(rdev); 594 r = radeon_init(rdev);
591 if (r) 595 if (r)
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 3655d91993a6..c85df4afcb7a 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -137,9 +137,6 @@ static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
137 if (size != 256) { 137 if (size != 256) {
138 return; 138 return;
139 } 139 }
140 if (crtc->fb == NULL) {
141 return;
142 }
143 140
144 /* userspace palettes are always correct as is */ 141 /* userspace palettes are always correct as is */
145 for (i = 0; i < 256; i++) { 142 for (i = 0; i < 256; i++) {
@@ -147,7 +144,6 @@ static void radeon_crtc_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green,
147 radeon_crtc->lut_g[i] = green[i] >> 6; 144 radeon_crtc->lut_g[i] = green[i] >> 6;
148 radeon_crtc->lut_b[i] = blue[i] >> 6; 145 radeon_crtc->lut_b[i] = blue[i] >> 6;
149 } 146 }
150
151 radeon_crtc_load_lut(crtc); 147 radeon_crtc_load_lut(crtc);
152} 148}
153 149
@@ -338,27 +334,19 @@ static bool radeon_setup_enc_conn(struct drm_device *dev)
338 334
339int radeon_ddc_get_modes(struct radeon_connector *radeon_connector) 335int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
340{ 336{
341 struct edid *edid;
342 int ret = 0; 337 int ret = 0;
343 338
344 if (!radeon_connector->ddc_bus) 339 if (!radeon_connector->ddc_bus)
345 return -1; 340 return -1;
346 if (!radeon_connector->edid) { 341 if (!radeon_connector->edid) {
347 radeon_i2c_do_lock(radeon_connector, 1); 342 radeon_i2c_do_lock(radeon_connector, 1);
348 edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter); 343 radeon_connector->edid = drm_get_edid(&radeon_connector->base, &radeon_connector->ddc_bus->adapter);
349 radeon_i2c_do_lock(radeon_connector, 0); 344 radeon_i2c_do_lock(radeon_connector, 0);
350 } else 345 }
351 edid = radeon_connector->edid;
352 346
353 if (edid) { 347 if (radeon_connector->edid) {
354 /* update digital bits here */ 348 drm_mode_connector_update_edid_property(&radeon_connector->base, radeon_connector->edid);
355 if (edid->input & DRM_EDID_INPUT_DIGITAL) 349 ret = drm_add_edid_modes(&radeon_connector->base, radeon_connector->edid);
356 radeon_connector->use_digital = 1;
357 else
358 radeon_connector->use_digital = 0;
359 drm_mode_connector_update_edid_property(&radeon_connector->base, edid);
360 ret = drm_add_edid_modes(&radeon_connector->base, edid);
361 kfree(edid);
362 return ret; 350 return ret;
363 } 351 }
364 drm_mode_connector_update_edid_property(&radeon_connector->base, NULL); 352 drm_mode_connector_update_edid_property(&radeon_connector->base, NULL);
@@ -765,7 +753,7 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
765 radeon_crtc->rmx_type = radeon_encoder->rmx_type; 753 radeon_crtc->rmx_type = radeon_encoder->rmx_type;
766 memcpy(&radeon_crtc->native_mode, 754 memcpy(&radeon_crtc->native_mode,
767 &radeon_encoder->native_mode, 755 &radeon_encoder->native_mode,
768 sizeof(struct radeon_native_mode)); 756 sizeof(struct drm_display_mode));
769 first = false; 757 first = false;
770 } else { 758 } else {
771 if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) { 759 if (radeon_crtc->rmx_type != radeon_encoder->rmx_type) {
@@ -783,10 +771,10 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc,
783 if (radeon_crtc->rmx_type != RMX_OFF) { 771 if (radeon_crtc->rmx_type != RMX_OFF) {
784 fixed20_12 a, b; 772 fixed20_12 a, b;
785 a.full = rfixed_const(crtc->mode.vdisplay); 773 a.full = rfixed_const(crtc->mode.vdisplay);
786 b.full = rfixed_const(radeon_crtc->native_mode.panel_xres); 774 b.full = rfixed_const(radeon_crtc->native_mode.hdisplay);
787 radeon_crtc->vsc.full = rfixed_div(a, b); 775 radeon_crtc->vsc.full = rfixed_div(a, b);
788 a.full = rfixed_const(crtc->mode.hdisplay); 776 a.full = rfixed_const(crtc->mode.hdisplay);
789 b.full = rfixed_const(radeon_crtc->native_mode.panel_yres); 777 b.full = rfixed_const(radeon_crtc->native_mode.vdisplay);
790 radeon_crtc->hsc.full = rfixed_div(a, b); 778 radeon_crtc->hsc.full = rfixed_div(a, b);
791 } else { 779 } else {
792 radeon_crtc->vsc.full = rfixed_const(1); 780 radeon_crtc->vsc.full = rfixed_const(1);
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index a65ab1a0dad2..d42bc512d75a 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -31,6 +31,10 @@
31 31
32extern int atom_debug; 32extern int atom_debug;
33 33
34/* evil but including atombios.h is much worse */
35bool radeon_atom_get_tv_timings(struct radeon_device *rdev, int index,
36 struct drm_display_mode *mode);
37
34uint32_t 38uint32_t
35radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac) 39radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac)
36{ 40{
@@ -167,49 +171,17 @@ void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
167 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 171 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
168 struct drm_device *dev = encoder->dev; 172 struct drm_device *dev = encoder->dev;
169 struct radeon_device *rdev = dev->dev_private; 173 struct radeon_device *rdev = dev->dev_private;
170 struct radeon_native_mode *native_mode = &radeon_encoder->native_mode; 174 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
171 175
172 if (mode->hdisplay < native_mode->panel_xres || 176 if (mode->hdisplay < native_mode->hdisplay ||
173 mode->vdisplay < native_mode->panel_yres) { 177 mode->vdisplay < native_mode->vdisplay) {
174 if (ASIC_IS_AVIVO(rdev)) { 178 int mode_id = adjusted_mode->base.id;
175 adjusted_mode->hdisplay = native_mode->panel_xres; 179 *adjusted_mode = *native_mode;
176 adjusted_mode->vdisplay = native_mode->panel_yres; 180 if (!ASIC_IS_AVIVO(rdev)) {
177 adjusted_mode->htotal = native_mode->panel_xres + native_mode->hblank; 181 adjusted_mode->hdisplay = mode->hdisplay;
178 adjusted_mode->hsync_start = native_mode->panel_xres + native_mode->hoverplus; 182 adjusted_mode->vdisplay = mode->vdisplay;
179 adjusted_mode->hsync_end = adjusted_mode->hsync_start + native_mode->hsync_width;
180 adjusted_mode->vtotal = native_mode->panel_yres + native_mode->vblank;
181 adjusted_mode->vsync_start = native_mode->panel_yres + native_mode->voverplus;
182 adjusted_mode->vsync_end = adjusted_mode->vsync_start + native_mode->vsync_width;
183 /* update crtc values */
184 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
185 /* adjust crtc values */
186 adjusted_mode->crtc_hdisplay = native_mode->panel_xres;
187 adjusted_mode->crtc_vdisplay = native_mode->panel_yres;
188 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + native_mode->hblank;
189 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + native_mode->hoverplus;
190 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + native_mode->hsync_width;
191 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + native_mode->vblank;
192 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + native_mode->voverplus;
193 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + native_mode->vsync_width;
194 } else {
195 adjusted_mode->htotal = native_mode->panel_xres + native_mode->hblank;
196 adjusted_mode->hsync_start = native_mode->panel_xres + native_mode->hoverplus;
197 adjusted_mode->hsync_end = adjusted_mode->hsync_start + native_mode->hsync_width;
198 adjusted_mode->vtotal = native_mode->panel_yres + native_mode->vblank;
199 adjusted_mode->vsync_start = native_mode->panel_yres + native_mode->voverplus;
200 adjusted_mode->vsync_end = adjusted_mode->vsync_start + native_mode->vsync_width;
201 /* update crtc values */
202 drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
203 /* adjust crtc values */
204 adjusted_mode->crtc_htotal = adjusted_mode->crtc_hdisplay + native_mode->hblank;
205 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hdisplay + native_mode->hoverplus;
206 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + native_mode->hsync_width;
207 adjusted_mode->crtc_vtotal = adjusted_mode->crtc_vdisplay + native_mode->vblank;
208 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + native_mode->voverplus;
209 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + native_mode->vsync_width;
210 } 183 }
211 adjusted_mode->flags = native_mode->flags; 184 adjusted_mode->base.id = mode_id;
212 adjusted_mode->clock = native_mode->dotclock;
213 } 185 }
214} 186}
215 187
@@ -219,7 +191,11 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
219 struct drm_display_mode *adjusted_mode) 191 struct drm_display_mode *adjusted_mode)
220{ 192{
221 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 193 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
194 struct drm_device *dev = encoder->dev;
195 struct radeon_device *rdev = dev->dev_private;
222 196
197 /* set the active encoder to connector routing */
198 radeon_encoder_set_active_device(encoder);
223 drm_mode_set_crtcinfo(adjusted_mode, 0); 199 drm_mode_set_crtcinfo(adjusted_mode, 0);
224 200
225 if (radeon_encoder->rmx_type != RMX_OFF) 201 if (radeon_encoder->rmx_type != RMX_OFF)
@@ -230,6 +206,18 @@ static bool radeon_atom_mode_fixup(struct drm_encoder *encoder,
230 && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2))) 206 && (mode->crtc_vsync_start < (mode->crtc_vdisplay + 2)))
231 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2; 207 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vdisplay + 2;
232 208
209 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)) {
210 struct radeon_encoder_atom_dac *tv_dac = radeon_encoder->enc_priv;
211 if (tv_dac) {
212 if (tv_dac->tv_std == TV_STD_NTSC ||
213 tv_dac->tv_std == TV_STD_NTSC_J ||
214 tv_dac->tv_std == TV_STD_PAL_M)
215 radeon_atom_get_tv_timings(rdev, 0, adjusted_mode);
216 else
217 radeon_atom_get_tv_timings(rdev, 1, adjusted_mode);
218 }
219 }
220
233 return true; 221 return true;
234} 222}
235 223
@@ -461,7 +449,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
461 case 1: 449 case 1:
462 args.v1.ucMisc = 0; 450 args.v1.ucMisc = 0;
463 args.v1.ucAction = action; 451 args.v1.ucAction = action;
464 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 452 if (drm_detect_hdmi_monitor(radeon_connector->edid))
465 args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; 453 args.v1.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
466 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 454 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
467 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { 455 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
@@ -486,7 +474,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action)
486 if (dig->coherent_mode) 474 if (dig->coherent_mode)
487 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT; 475 args.v2.ucMisc |= PANEL_ENCODER_MISC_COHERENT;
488 } 476 }
489 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 477 if (drm_detect_hdmi_monitor(radeon_connector->edid))
490 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE; 478 args.v2.ucMisc |= PANEL_ENCODER_MISC_HDMI_TYPE;
491 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); 479 args.v2.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
492 args.v2.ucTruncate = 0; 480 args.v2.ucTruncate = 0;
@@ -544,7 +532,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
544 switch (connector->connector_type) { 532 switch (connector->connector_type) {
545 case DRM_MODE_CONNECTOR_DVII: 533 case DRM_MODE_CONNECTOR_DVII:
546 case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ 534 case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */
547 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 535 if (drm_detect_hdmi_monitor(radeon_connector->edid))
548 return ATOM_ENCODER_MODE_HDMI; 536 return ATOM_ENCODER_MODE_HDMI;
549 else if (radeon_connector->use_digital) 537 else if (radeon_connector->use_digital)
550 return ATOM_ENCODER_MODE_DVI; 538 return ATOM_ENCODER_MODE_DVI;
@@ -554,7 +542,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
554 case DRM_MODE_CONNECTOR_DVID: 542 case DRM_MODE_CONNECTOR_DVID:
555 case DRM_MODE_CONNECTOR_HDMIA: 543 case DRM_MODE_CONNECTOR_HDMIA:
556 default: 544 default:
557 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 545 if (drm_detect_hdmi_monitor(radeon_connector->edid))
558 return ATOM_ENCODER_MODE_HDMI; 546 return ATOM_ENCODER_MODE_HDMI;
559 else 547 else
560 return ATOM_ENCODER_MODE_DVI; 548 return ATOM_ENCODER_MODE_DVI;
@@ -566,7 +554,7 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
566 /*if (radeon_output->MonType == MT_DP) 554 /*if (radeon_output->MonType == MT_DP)
567 return ATOM_ENCODER_MODE_DP; 555 return ATOM_ENCODER_MODE_DP;
568 else*/ 556 else*/
569 if (drm_detect_hdmi_monitor((struct edid *)connector->edid_blob_ptr)) 557 if (drm_detect_hdmi_monitor(radeon_connector->edid))
570 return ATOM_ENCODER_MODE_HDMI; 558 return ATOM_ENCODER_MODE_HDMI;
571 else 559 else
572 return ATOM_ENCODER_MODE_DVI; 560 return ATOM_ENCODER_MODE_DVI;
@@ -734,14 +722,17 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
734 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev); 722 atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev);
735 723
736 args.v1.ucAction = action; 724 args.v1.ucAction = action;
737 725 if (action == ATOM_TRANSMITTER_ACTION_INIT) {
726 args.v1.usInitInfo = radeon_connector->connector_object_id;
727 } else {
728 if (radeon_encoder->pixel_clock > 165000)
729 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
730 else
731 args.v1.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10);
732 }
738 if (ASIC_IS_DCE32(rdev)) { 733 if (ASIC_IS_DCE32(rdev)) {
739 if (radeon_encoder->pixel_clock > 165000) { 734 if (radeon_encoder->pixel_clock > 165000)
740 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock * 10 * 2) / 100); 735 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10);
741 args.v2.acConfig.fDualLinkConnector = 1;
742 } else {
743 args.v2.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock * 10 * 4) / 100);
744 }
745 if (dig->dig_block) 736 if (dig->dig_block)
746 args.v2.acConfig.ucEncoderSel = 1; 737 args.v2.acConfig.ucEncoderSel = 1;
747 738
@@ -766,7 +757,6 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action)
766 } 757 }
767 } else { 758 } else {
768 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL; 759 args.v1.ucConfig = ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL;
769 args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock) / 10);
770 760
771 switch (radeon_encoder->encoder_id) { 761 switch (radeon_encoder->encoder_id) {
772 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: 762 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY:
@@ -874,16 +864,9 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
874 DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args; 864 DISPLAY_DEVICE_OUTPUT_CONTROL_PS_ALLOCATION args;
875 int index = 0; 865 int index = 0;
876 bool is_dig = false; 866 bool is_dig = false;
877 int devices;
878 867
879 memset(&args, 0, sizeof(args)); 868 memset(&args, 0, sizeof(args));
880 869
881 /* on DPMS off we have no idea if active device is meaningful */
882 if (mode != DRM_MODE_DPMS_ON && !radeon_encoder->active_device)
883 devices = radeon_encoder->devices;
884 else
885 devices = radeon_encoder->active_device;
886
887 DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", 870 DRM_DEBUG("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n",
888 radeon_encoder->encoder_id, mode, radeon_encoder->devices, 871 radeon_encoder->encoder_id, mode, radeon_encoder->devices,
889 radeon_encoder->active_device); 872 radeon_encoder->active_device);
@@ -914,18 +897,18 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
914 break; 897 break;
915 case ENCODER_OBJECT_ID_INTERNAL_DAC1: 898 case ENCODER_OBJECT_ID_INTERNAL_DAC1:
916 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1: 899 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1:
917 if (devices & (ATOM_DEVICE_TV_SUPPORT)) 900 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
918 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); 901 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
919 else if (devices & (ATOM_DEVICE_CV_SUPPORT)) 902 else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
920 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); 903 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
921 else 904 else
922 index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl); 905 index = GetIndexIntoMasterTable(COMMAND, DAC1OutputControl);
923 break; 906 break;
924 case ENCODER_OBJECT_ID_INTERNAL_DAC2: 907 case ENCODER_OBJECT_ID_INTERNAL_DAC2:
925 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2: 908 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2:
926 if (devices & (ATOM_DEVICE_TV_SUPPORT)) 909 if (radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))
927 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl); 910 index = GetIndexIntoMasterTable(COMMAND, TV1OutputControl);
928 else if (devices & (ATOM_DEVICE_CV_SUPPORT)) 911 else if (radeon_encoder->active_device & (ATOM_DEVICE_CV_SUPPORT))
929 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl); 912 index = GetIndexIntoMasterTable(COMMAND, CV1OutputControl);
930 else 913 else
931 index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl); 914 index = GetIndexIntoMasterTable(COMMAND, DAC2OutputControl);
@@ -1104,8 +1087,11 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder,
1104 } 1087 }
1105 1088
1106 /* set scaler clears this on some chips */ 1089 /* set scaler clears this on some chips */
1107 if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE)) 1090 if (!(radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT))) {
1108 WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset, AVIVO_D1MODE_INTERLEAVE_EN); 1091 if (ASIC_IS_AVIVO(rdev) && (mode->flags & DRM_MODE_FLAG_INTERLACE))
1092 WREG32(AVIVO_D1MODE_DATA_FORMAT + radeon_crtc->crtc_offset,
1093 AVIVO_D1MODE_INTERLEAVE_EN);
1094 }
1109} 1095}
1110 1096
1111static void 1097static void
@@ -1153,6 +1139,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
1153 1139
1154 /* setup and enable the encoder and transmitter */ 1140 /* setup and enable the encoder and transmitter */
1155 atombios_dig_encoder_setup(encoder, ATOM_ENABLE); 1141 atombios_dig_encoder_setup(encoder, ATOM_ENABLE);
1142 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_INIT);
1156 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP); 1143 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_SETUP);
1157 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE); 1144 atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE);
1158 break; 1145 break;
@@ -1268,8 +1255,6 @@ static void radeon_atom_encoder_prepare(struct drm_encoder *encoder)
1268{ 1255{
1269 radeon_atom_output_lock(encoder, true); 1256 radeon_atom_output_lock(encoder, true);
1270 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF); 1257 radeon_atom_encoder_dpms(encoder, DRM_MODE_DPMS_OFF);
1271
1272 radeon_encoder_set_active_device(encoder);
1273} 1258}
1274 1259
1275static void radeon_atom_encoder_commit(struct drm_encoder *encoder) 1260static void radeon_atom_encoder_commit(struct drm_encoder *encoder)
diff --git a/drivers/gpu/drm/radeon/radeon_gart.c b/drivers/gpu/drm/radeon/radeon_gart.c
index a931af065dd4..a68d7566178c 100644
--- a/drivers/gpu/drm/radeon/radeon_gart.c
+++ b/drivers/gpu/drm/radeon/radeon_gart.c
@@ -140,15 +140,15 @@ void radeon_gart_unbind(struct radeon_device *rdev, unsigned offset,
140 WARN(1, "trying to unbind memory to unitialized GART !\n"); 140 WARN(1, "trying to unbind memory to unitialized GART !\n");
141 return; 141 return;
142 } 142 }
143 t = offset / 4096; 143 t = offset / RADEON_GPU_PAGE_SIZE;
144 p = t / (PAGE_SIZE / 4096); 144 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
145 for (i = 0; i < pages; i++, p++) { 145 for (i = 0; i < pages; i++, p++) {
146 if (rdev->gart.pages[p]) { 146 if (rdev->gart.pages[p]) {
147 pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p], 147 pci_unmap_page(rdev->pdev, rdev->gart.pages_addr[p],
148 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); 148 PAGE_SIZE, PCI_DMA_BIDIRECTIONAL);
149 rdev->gart.pages[p] = NULL; 149 rdev->gart.pages[p] = NULL;
150 rdev->gart.pages_addr[p] = 0; 150 rdev->gart.pages_addr[p] = 0;
151 for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { 151 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
152 radeon_gart_set_page(rdev, t, 0); 152 radeon_gart_set_page(rdev, t, 0);
153 } 153 }
154 } 154 }
@@ -169,8 +169,8 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
169 DRM_ERROR("trying to bind memory to unitialized GART !\n"); 169 DRM_ERROR("trying to bind memory to unitialized GART !\n");
170 return -EINVAL; 170 return -EINVAL;
171 } 171 }
172 t = offset / 4096; 172 t = offset / RADEON_GPU_PAGE_SIZE;
173 p = t / (PAGE_SIZE / 4096); 173 p = t / (PAGE_SIZE / RADEON_GPU_PAGE_SIZE);
174 174
175 for (i = 0; i < pages; i++, p++) { 175 for (i = 0; i < pages; i++, p++) {
176 /* we need to support large memory configurations */ 176 /* we need to support large memory configurations */
@@ -185,9 +185,9 @@ int radeon_gart_bind(struct radeon_device *rdev, unsigned offset,
185 } 185 }
186 rdev->gart.pages[p] = pagelist[i]; 186 rdev->gart.pages[p] = pagelist[i];
187 page_base = rdev->gart.pages_addr[p]; 187 page_base = rdev->gart.pages_addr[p];
188 for (j = 0; j < (PAGE_SIZE / 4096); j++, t++) { 188 for (j = 0; j < (PAGE_SIZE / RADEON_GPU_PAGE_SIZE); j++, t++) {
189 radeon_gart_set_page(rdev, t, page_base); 189 radeon_gart_set_page(rdev, t, page_base);
190 page_base += 4096; 190 page_base += RADEON_GPU_PAGE_SIZE;
191 } 191 }
192 } 192 }
193 mb(); 193 mb();
@@ -200,14 +200,14 @@ int radeon_gart_init(struct radeon_device *rdev)
200 if (rdev->gart.pages) { 200 if (rdev->gart.pages) {
201 return 0; 201 return 0;
202 } 202 }
203 /* We need PAGE_SIZE >= 4096 */ 203 /* We need PAGE_SIZE >= RADEON_GPU_PAGE_SIZE */
204 if (PAGE_SIZE < 4096) { 204 if (PAGE_SIZE < RADEON_GPU_PAGE_SIZE) {
205 DRM_ERROR("Page size is smaller than GPU page size!\n"); 205 DRM_ERROR("Page size is smaller than GPU page size!\n");
206 return -EINVAL; 206 return -EINVAL;
207 } 207 }
208 /* Compute table size */ 208 /* Compute table size */
209 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE; 209 rdev->gart.num_cpu_pages = rdev->mc.gtt_size / PAGE_SIZE;
210 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / 4096; 210 rdev->gart.num_gpu_pages = rdev->mc.gtt_size / RADEON_GPU_PAGE_SIZE;
211 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n", 211 DRM_INFO("GART: num cpu pages %u, num gpu pages %u\n",
212 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); 212 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages);
213 /* Allocate pages table */ 213 /* Allocate pages table */
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 8e0a8759e428..a0fe6232dcb6 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -92,6 +92,13 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
92 if (r) { 92 if (r) {
93 return r; 93 return r;
94 } 94 }
95 /* enable msi */
96 rdev->msi_enabled = 0;
97 if (rdev->family >= CHIP_RV380) {
98 int ret = pci_enable_msi(rdev->pdev);
99 if (!ret)
100 rdev->msi_enabled = 1;
101 }
95 drm_irq_install(rdev->ddev); 102 drm_irq_install(rdev->ddev);
96 rdev->irq.installed = true; 103 rdev->irq.installed = true;
97 DRM_INFO("radeon: irq initialized.\n"); 104 DRM_INFO("radeon: irq initialized.\n");
@@ -103,5 +110,7 @@ void radeon_irq_kms_fini(struct radeon_device *rdev)
103 if (rdev->irq.installed) { 110 if (rdev->irq.installed) {
104 rdev->irq.installed = false; 111 rdev->irq.installed = false;
105 drm_irq_uninstall(rdev->ddev); 112 drm_irq_uninstall(rdev->ddev);
113 if (rdev->msi_enabled)
114 pci_disable_msi(rdev->pdev);
106 } 115 }
107} 116}
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
index 36410f85d705..8d0b7aa87fa4 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c
@@ -48,7 +48,7 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
48 u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active; 48 u32 fp_horz_stretch, fp_vert_stretch, fp_horz_vert_active;
49 u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp; 49 u32 fp_h_sync_strt_wid, fp_crtc_h_total_disp;
50 u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp; 50 u32 fp_v_sync_strt_wid, fp_crtc_v_total_disp;
51 struct radeon_native_mode *native_mode = &radeon_crtc->native_mode; 51 struct drm_display_mode *native_mode = &radeon_crtc->native_mode;
52 52
53 fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) & 53 fp_vert_stretch = RREG32(RADEON_FP_VERT_STRETCH) &
54 (RADEON_VERT_STRETCH_RESERVED | 54 (RADEON_VERT_STRETCH_RESERVED |
@@ -95,19 +95,19 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
95 95
96 fp_horz_vert_active = 0; 96 fp_horz_vert_active = 0;
97 97
98 if (native_mode->panel_xres == 0 || 98 if (native_mode->hdisplay == 0 ||
99 native_mode->panel_yres == 0) { 99 native_mode->vdisplay == 0) {
100 hscale = false; 100 hscale = false;
101 vscale = false; 101 vscale = false;
102 } else { 102 } else {
103 if (xres > native_mode->panel_xres) 103 if (xres > native_mode->hdisplay)
104 xres = native_mode->panel_xres; 104 xres = native_mode->hdisplay;
105 if (yres > native_mode->panel_yres) 105 if (yres > native_mode->vdisplay)
106 yres = native_mode->panel_yres; 106 yres = native_mode->vdisplay;
107 107
108 if (xres == native_mode->panel_xres) 108 if (xres == native_mode->hdisplay)
109 hscale = false; 109 hscale = false;
110 if (yres == native_mode->panel_yres) 110 if (yres == native_mode->vdisplay)
111 vscale = false; 111 vscale = false;
112 } 112 }
113 113
@@ -119,11 +119,11 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
119 else { 119 else {
120 inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0; 120 inc = (fp_horz_stretch & RADEON_HORZ_AUTO_RATIO_INC) ? 1 : 0;
121 scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX) 121 scale = ((xres + inc) * RADEON_HORZ_STRETCH_RATIO_MAX)
122 / native_mode->panel_xres + 1; 122 / native_mode->hdisplay + 1;
123 fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) | 123 fp_horz_stretch |= (((scale) & RADEON_HORZ_STRETCH_RATIO_MASK) |
124 RADEON_HORZ_STRETCH_BLEND | 124 RADEON_HORZ_STRETCH_BLEND |
125 RADEON_HORZ_STRETCH_ENABLE | 125 RADEON_HORZ_STRETCH_ENABLE |
126 ((native_mode->panel_xres/8-1) << 16)); 126 ((native_mode->hdisplay/8-1) << 16));
127 } 127 }
128 128
129 if (!vscale) 129 if (!vscale)
@@ -131,11 +131,11 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
131 else { 131 else {
132 inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0; 132 inc = (fp_vert_stretch & RADEON_VERT_AUTO_RATIO_INC) ? 1 : 0;
133 scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX) 133 scale = ((yres + inc) * RADEON_VERT_STRETCH_RATIO_MAX)
134 / native_mode->panel_yres + 1; 134 / native_mode->vdisplay + 1;
135 fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) | 135 fp_vert_stretch |= (((scale) & RADEON_VERT_STRETCH_RATIO_MASK) |
136 RADEON_VERT_STRETCH_ENABLE | 136 RADEON_VERT_STRETCH_ENABLE |
137 RADEON_VERT_STRETCH_BLEND | 137 RADEON_VERT_STRETCH_BLEND |
138 ((native_mode->panel_yres-1) << 12)); 138 ((native_mode->vdisplay-1) << 12));
139 } 139 }
140 break; 140 break;
141 case RMX_CENTER: 141 case RMX_CENTER:
@@ -175,8 +175,8 @@ static void radeon_legacy_rmx_mode_set(struct drm_crtc *crtc,
175 ? RADEON_CRTC_V_SYNC_POL 175 ? RADEON_CRTC_V_SYNC_POL
176 : 0))); 176 : 0)));
177 177
178 fp_horz_vert_active = (((native_mode->panel_yres) & 0xfff) | 178 fp_horz_vert_active = (((native_mode->vdisplay) & 0xfff) |
179 (((native_mode->panel_xres / 8) & 0x1ff) << 16)); 179 (((native_mode->hdisplay / 8) & 0x1ff) << 16));
180 break; 180 break;
181 case RMX_OFF: 181 case RMX_OFF:
182 default: 182 default:
@@ -532,6 +532,10 @@ int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
532 radeon_fb = to_radeon_framebuffer(old_fb); 532 radeon_fb = to_radeon_framebuffer(old_fb);
533 radeon_gem_object_unpin(radeon_fb->obj); 533 radeon_gem_object_unpin(radeon_fb->obj);
534 } 534 }
535
536 /* Bytes per pixel may have changed */
537 radeon_bandwidth_update(rdev);
538
535 return 0; 539 return 0;
536} 540}
537 541
@@ -664,6 +668,9 @@ static bool radeon_set_crtc_timing(struct drm_crtc *crtc, struct drm_display_mod
664 668
665 WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl); 669 WREG32(RADEON_DISP2_MERGE_CNTL, disp2_merge_cntl);
666 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl); 670 WREG32(RADEON_CRTC2_GEN_CNTL, crtc2_gen_cntl);
671
672 WREG32(RADEON_FP_H2_SYNC_STRT_WID, crtc_h_sync_strt_wid);
673 WREG32(RADEON_FP_V2_SYNC_STRT_WID, crtc_v_sync_strt_wid);
667 } else { 674 } else {
668 uint32_t crtc_gen_cntl; 675 uint32_t crtc_gen_cntl;
669 uint32_t crtc_ext_cntl; 676 uint32_t crtc_ext_cntl;
@@ -1015,14 +1022,11 @@ static int radeon_crtc_mode_set(struct drm_crtc *crtc,
1015 int x, int y, struct drm_framebuffer *old_fb) 1022 int x, int y, struct drm_framebuffer *old_fb)
1016{ 1023{
1017 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc); 1024 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
1018 struct drm_device *dev = crtc->dev;
1019 struct radeon_device *rdev = dev->dev_private;
1020 1025
1021 /* TODO TV */ 1026 /* TODO TV */
1022 radeon_crtc_set_base(crtc, x, y, old_fb); 1027 radeon_crtc_set_base(crtc, x, y, old_fb);
1023 radeon_set_crtc_timing(crtc, adjusted_mode); 1028 radeon_set_crtc_timing(crtc, adjusted_mode);
1024 radeon_set_pll(crtc, adjusted_mode); 1029 radeon_set_pll(crtc, adjusted_mode);
1025 radeon_bandwidth_update(rdev);
1026 if (radeon_crtc->crtc_id == 0) { 1030 if (radeon_crtc->crtc_id == 0) {
1027 radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode); 1031 radeon_legacy_rmx_mode_set(crtc, mode, adjusted_mode);
1028 } else { 1032 } else {
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 6ceb958fd194..00382122869b 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -107,8 +107,6 @@ static void radeon_legacy_lvds_prepare(struct drm_encoder *encoder)
107 else 107 else
108 radeon_combios_output_lock(encoder, true); 108 radeon_combios_output_lock(encoder, true);
109 radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF); 109 radeon_legacy_lvds_dpms(encoder, DRM_MODE_DPMS_OFF);
110
111 radeon_encoder_set_active_device(encoder);
112} 110}
113 111
114static void radeon_legacy_lvds_commit(struct drm_encoder *encoder) 112static void radeon_legacy_lvds_commit(struct drm_encoder *encoder)
@@ -192,6 +190,8 @@ static bool radeon_legacy_lvds_mode_fixup(struct drm_encoder *encoder,
192{ 190{
193 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 191 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
194 192
193 /* set the active encoder to connector routing */
194 radeon_encoder_set_active_device(encoder);
195 drm_mode_set_crtcinfo(adjusted_mode, 0); 195 drm_mode_set_crtcinfo(adjusted_mode, 0);
196 196
197 if (radeon_encoder->rmx_type != RMX_OFF) 197 if (radeon_encoder->rmx_type != RMX_OFF)
@@ -218,7 +218,8 @@ static bool radeon_legacy_primary_dac_mode_fixup(struct drm_encoder *encoder,
218 struct drm_display_mode *mode, 218 struct drm_display_mode *mode,
219 struct drm_display_mode *adjusted_mode) 219 struct drm_display_mode *adjusted_mode)
220{ 220{
221 221 /* set the active encoder to connector routing */
222 radeon_encoder_set_active_device(encoder);
222 drm_mode_set_crtcinfo(adjusted_mode, 0); 223 drm_mode_set_crtcinfo(adjusted_mode, 0);
223 224
224 return true; 225 return true;
@@ -272,7 +273,6 @@ static void radeon_legacy_primary_dac_prepare(struct drm_encoder *encoder)
272 else 273 else
273 radeon_combios_output_lock(encoder, true); 274 radeon_combios_output_lock(encoder, true);
274 radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF); 275 radeon_legacy_primary_dac_dpms(encoder, DRM_MODE_DPMS_OFF);
275 radeon_encoder_set_active_device(encoder);
276} 276}
277 277
278static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder) 278static void radeon_legacy_primary_dac_commit(struct drm_encoder *encoder)
@@ -468,7 +468,6 @@ static void radeon_legacy_tmds_int_prepare(struct drm_encoder *encoder)
468 else 468 else
469 radeon_combios_output_lock(encoder, true); 469 radeon_combios_output_lock(encoder, true);
470 radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF); 470 radeon_legacy_tmds_int_dpms(encoder, DRM_MODE_DPMS_OFF);
471 radeon_encoder_set_active_device(encoder);
472} 471}
473 472
474static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder) 473static void radeon_legacy_tmds_int_commit(struct drm_encoder *encoder)
@@ -543,6 +542,14 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder,
543 542
544 fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN); 543 fp_gen_cntl &= ~(RADEON_FP_FPON | RADEON_FP_TMDS_EN);
545 544
545 fp_gen_cntl &= ~(RADEON_FP_RMX_HVSYNC_CONTROL_EN |
546 RADEON_FP_DFP_SYNC_SEL |
547 RADEON_FP_CRT_SYNC_SEL |
548 RADEON_FP_CRTC_LOCK_8DOT |
549 RADEON_FP_USE_SHADOW_EN |
550 RADEON_FP_CRTC_USE_SHADOW_VEND |
551 RADEON_FP_CRT_SYNC_ALT);
552
546 if (1) /* FIXME rgbBits == 8 */ 553 if (1) /* FIXME rgbBits == 8 */
547 fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */ 554 fp_gen_cntl |= RADEON_FP_PANEL_FORMAT; /* 24 bit format */
548 else 555 else
@@ -556,7 +563,7 @@ static void radeon_legacy_tmds_int_mode_set(struct drm_encoder *encoder,
556 else 563 else
557 fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1; 564 fp_gen_cntl |= R200_FP_SOURCE_SEL_CRTC1;
558 } else 565 } else
559 fp_gen_cntl |= RADEON_FP_SEL_CRTC1; 566 fp_gen_cntl &= ~RADEON_FP_SEL_CRTC2;
560 } else { 567 } else {
561 if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) { 568 if (ASIC_IS_R300(rdev) || rdev->family == CHIP_R200) {
562 fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK; 569 fp_gen_cntl &= ~R200_FP_SOURCE_SEL_MASK;
@@ -593,7 +600,8 @@ static bool radeon_legacy_tmds_ext_mode_fixup(struct drm_encoder *encoder,
593 struct drm_display_mode *mode, 600 struct drm_display_mode *mode,
594 struct drm_display_mode *adjusted_mode) 601 struct drm_display_mode *adjusted_mode)
595{ 602{
596 603 /* set the active encoder to connector routing */
604 radeon_encoder_set_active_device(encoder);
597 drm_mode_set_crtcinfo(adjusted_mode, 0); 605 drm_mode_set_crtcinfo(adjusted_mode, 0);
598 606
599 return true; 607 return true;
@@ -636,7 +644,6 @@ static void radeon_legacy_tmds_ext_prepare(struct drm_encoder *encoder)
636 else 644 else
637 radeon_combios_output_lock(encoder, true); 645 radeon_combios_output_lock(encoder, true);
638 radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF); 646 radeon_legacy_tmds_ext_dpms(encoder, DRM_MODE_DPMS_OFF);
639 radeon_encoder_set_active_device(encoder);
640} 647}
641 648
642static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder) 649static void radeon_legacy_tmds_ext_commit(struct drm_encoder *encoder)
@@ -735,7 +742,8 @@ static bool radeon_legacy_tv_dac_mode_fixup(struct drm_encoder *encoder,
735 struct drm_display_mode *mode, 742 struct drm_display_mode *mode,
736 struct drm_display_mode *adjusted_mode) 743 struct drm_display_mode *adjusted_mode)
737{ 744{
738 745 /* set the active encoder to connector routing */
746 radeon_encoder_set_active_device(encoder);
739 drm_mode_set_crtcinfo(adjusted_mode, 0); 747 drm_mode_set_crtcinfo(adjusted_mode, 0);
740 748
741 return true; 749 return true;
@@ -839,7 +847,6 @@ static void radeon_legacy_tv_dac_prepare(struct drm_encoder *encoder)
839 else 847 else
840 radeon_combios_output_lock(encoder, true); 848 radeon_combios_output_lock(encoder, true);
841 radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF); 849 radeon_legacy_tv_dac_dpms(encoder, DRM_MODE_DPMS_OFF);
842 radeon_encoder_set_active_device(encoder);
843} 850}
844 851
845static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder) 852static void radeon_legacy_tv_dac_commit(struct drm_encoder *encoder)
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index e61226817ccf..ace726aa0d76 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -172,6 +172,7 @@ enum radeon_connector_table {
172 172
173struct radeon_mode_info { 173struct radeon_mode_info {
174 struct atom_context *atom_context; 174 struct atom_context *atom_context;
175 struct card_info *atom_card_info;
175 enum radeon_connector_table connector_table; 176 enum radeon_connector_table connector_table;
176 bool mode_config_initialized; 177 bool mode_config_initialized;
177 struct radeon_crtc *crtcs[2]; 178 struct radeon_crtc *crtcs[2];
@@ -186,17 +187,6 @@ struct radeon_mode_info {
186 187
187}; 188};
188 189
189struct radeon_native_mode {
190 /* preferred mode */
191 uint32_t panel_xres, panel_yres;
192 uint32_t hoverplus, hsync_width;
193 uint32_t hblank;
194 uint32_t voverplus, vsync_width;
195 uint32_t vblank;
196 uint32_t dotclock;
197 uint32_t flags;
198};
199
200#define MAX_H_CODE_TIMING_LEN 32 190#define MAX_H_CODE_TIMING_LEN 32
201#define MAX_V_CODE_TIMING_LEN 32 191#define MAX_V_CODE_TIMING_LEN 32
202 192
@@ -228,7 +218,7 @@ struct radeon_crtc {
228 enum radeon_rmx_type rmx_type; 218 enum radeon_rmx_type rmx_type;
229 fixed20_12 vsc; 219 fixed20_12 vsc;
230 fixed20_12 hsc; 220 fixed20_12 hsc;
231 struct radeon_native_mode native_mode; 221 struct drm_display_mode native_mode;
232}; 222};
233 223
234struct radeon_encoder_primary_dac { 224struct radeon_encoder_primary_dac {
@@ -248,7 +238,7 @@ struct radeon_encoder_lvds {
248 bool use_bios_dividers; 238 bool use_bios_dividers;
249 uint32_t lvds_gen_cntl; 239 uint32_t lvds_gen_cntl;
250 /* panel mode */ 240 /* panel mode */
251 struct radeon_native_mode native_mode; 241 struct drm_display_mode native_mode;
252}; 242};
253 243
254struct radeon_encoder_tv_dac { 244struct radeon_encoder_tv_dac {
@@ -271,6 +261,16 @@ struct radeon_encoder_int_tmds {
271 struct radeon_tmds_pll tmds_pll[4]; 261 struct radeon_tmds_pll tmds_pll[4];
272}; 262};
273 263
264/* spread spectrum */
265struct radeon_atom_ss {
266 uint16_t percentage;
267 uint8_t type;
268 uint8_t step;
269 uint8_t delay;
270 uint8_t range;
271 uint8_t refdiv;
272};
273
274struct radeon_encoder_atom_dig { 274struct radeon_encoder_atom_dig {
275 /* atom dig */ 275 /* atom dig */
276 bool coherent_mode; 276 bool coherent_mode;
@@ -278,8 +278,9 @@ struct radeon_encoder_atom_dig {
278 /* atom lvds */ 278 /* atom lvds */
279 uint32_t lvds_misc; 279 uint32_t lvds_misc;
280 uint16_t panel_pwr_delay; 280 uint16_t panel_pwr_delay;
281 struct radeon_atom_ss *ss;
281 /* panel mode */ 282 /* panel mode */
282 struct radeon_native_mode native_mode; 283 struct drm_display_mode native_mode;
283}; 284};
284 285
285struct radeon_encoder_atom_dac { 286struct radeon_encoder_atom_dac {
@@ -294,7 +295,7 @@ struct radeon_encoder {
294 uint32_t flags; 295 uint32_t flags;
295 uint32_t pixel_clock; 296 uint32_t pixel_clock;
296 enum radeon_rmx_type rmx_type; 297 enum radeon_rmx_type rmx_type;
297 struct radeon_native_mode native_mode; 298 struct drm_display_mode native_mode;
298 void *enc_priv; 299 void *enc_priv;
299}; 300};
300 301
@@ -308,12 +309,15 @@ struct radeon_connector {
308 uint32_t connector_id; 309 uint32_t connector_id;
309 uint32_t devices; 310 uint32_t devices;
310 struct radeon_i2c_chan *ddc_bus; 311 struct radeon_i2c_chan *ddc_bus;
312 /* some systems have a an hdmi and vga port with a shared ddc line */
313 bool shared_ddc;
311 bool use_digital; 314 bool use_digital;
312 /* we need to mind the EDID between detect 315 /* we need to mind the EDID between detect
313 and get modes due to analog/digital/tvencoder */ 316 and get modes due to analog/digital/tvencoder */
314 struct edid *edid; 317 struct edid *edid;
315 void *con_priv; 318 void *con_priv;
316 bool dac_load_detect; 319 bool dac_load_detect;
320 uint16_t connector_object_id;
317}; 321};
318 322
319struct radeon_framebuffer { 323struct radeon_framebuffer {
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
new file mode 100644
index 000000000000..46146c6a2a06
--- /dev/null
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -0,0 +1,65 @@
1/*
2 * Permission is hereby granted, free of charge, to any person obtaining a
3 * copy of this software and associated documentation files (the "Software"),
4 * to deal in the Software without restriction, including without limitation
5 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
6 * and/or sell copies of the Software, and to permit persons to whom the
7 * Software is furnished to do so, subject to the following conditions:
8 *
9 * The above copyright notice and this permission notice shall be included in
10 * all copies or substantial portions of the Software.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
16 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
17 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
18 * OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * Authors: Rafał Miłecki <zajec5@gmail.com>
21 */
22#include "drmP.h"
23#include "radeon.h"
24
25int radeon_debugfs_pm_init(struct radeon_device *rdev);
26
27int radeon_pm_init(struct radeon_device *rdev)
28{
29 if (radeon_debugfs_pm_init(rdev)) {
30 DRM_ERROR("Failed to register debugfs file for CP !\n");
31 }
32
33 return 0;
34}
35
36/*
37 * Debugfs info
38 */
39#if defined(CONFIG_DEBUG_FS)
40
41static int radeon_debugfs_pm_info(struct seq_file *m, void *data)
42{
43 struct drm_info_node *node = (struct drm_info_node *) m->private;
44 struct drm_device *dev = node->minor->dev;
45 struct radeon_device *rdev = dev->dev_private;
46
47 seq_printf(m, "engine clock: %u0 Hz\n", radeon_get_engine_clock(rdev));
48 seq_printf(m, "memory clock: %u0 Hz\n", radeon_get_memory_clock(rdev));
49
50 return 0;
51}
52
53static struct drm_info_list radeon_pm_info_list[] = {
54 {"radeon_pm_info", radeon_debugfs_pm_info, 0, NULL},
55};
56#endif
57
58int radeon_debugfs_pm_init(struct radeon_device *rdev)
59{
60#if defined(CONFIG_DEBUG_FS)
61 return radeon_debugfs_add_files(rdev, radeon_pm_info_list, ARRAY_SIZE(radeon_pm_info_list));
62#else
63 return 0;
64#endif
65}
diff --git a/drivers/gpu/drm/radeon/radeon_reg.h b/drivers/gpu/drm/radeon/radeon_reg.h
index bfa1ab9c93e1..29ab75903ec1 100644
--- a/drivers/gpu/drm/radeon/radeon_reg.h
+++ b/drivers/gpu/drm/radeon/radeon_reg.h
@@ -290,6 +290,8 @@
290#define RADEON_BUS_CNTL 0x0030 290#define RADEON_BUS_CNTL 0x0030
291# define RADEON_BUS_MASTER_DIS (1 << 6) 291# define RADEON_BUS_MASTER_DIS (1 << 6)
292# define RADEON_BUS_BIOS_DIS_ROM (1 << 12) 292# define RADEON_BUS_BIOS_DIS_ROM (1 << 12)
293# define RS600_BUS_MASTER_DIS (1 << 14)
294# define RS600_MSI_REARM (1 << 20) /* rs600/rs690/rs740 */
293# define RADEON_BUS_RD_DISCARD_EN (1 << 24) 295# define RADEON_BUS_RD_DISCARD_EN (1 << 24)
294# define RADEON_BUS_RD_ABORT_EN (1 << 25) 296# define RADEON_BUS_RD_ABORT_EN (1 << 25)
295# define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28) 297# define RADEON_BUS_MSTR_DISCONNECT_EN (1 << 28)
@@ -297,6 +299,9 @@
297# define RADEON_BUS_READ_BURST (1 << 30) 299# define RADEON_BUS_READ_BURST (1 << 30)
298#define RADEON_BUS_CNTL1 0x0034 300#define RADEON_BUS_CNTL1 0x0034
299# define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4) 301# define RADEON_BUS_WAIT_ON_LOCK_EN (1 << 4)
302/* rv370/rv380, rv410, r423/r430/r480, r5xx */
303#define RADEON_MSI_REARM_EN 0x0160
304# define RV370_MSI_REARM_EN (1 << 0)
300 305
301/* #define RADEON_PCIE_INDEX 0x0030 */ 306/* #define RADEON_PCIE_INDEX 0x0030 */
302/* #define RADEON_PCIE_DATA 0x0034 */ 307/* #define RADEON_PCIE_DATA 0x0034 */
@@ -3311,6 +3316,7 @@
3311#define RADEON_AIC_CNTL 0x01d0 3316#define RADEON_AIC_CNTL 0x01d0
3312# define RADEON_PCIGART_TRANSLATE_EN (1 << 0) 3317# define RADEON_PCIGART_TRANSLATE_EN (1 << 0)
3313# define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1) 3318# define RADEON_DIS_OUT_OF_PCI_GART_ACCESS (1 << 1)
3319# define RS400_MSI_REARM (1 << 3) /* rs400/rs480 */
3314#define RADEON_AIC_LO_ADDR 0x01dc 3320#define RADEON_AIC_LO_ADDR 0x01dc
3315#define RADEON_AIC_PT_BASE 0x01d8 3321#define RADEON_AIC_PT_BASE 0x01d8
3316#define RADEON_AIC_HI_ADDR 0x01e0 3322#define RADEON_AIC_HI_ADDR 0x01e0
diff --git a/drivers/gpu/drm/radeon/radeon_test.c b/drivers/gpu/drm/radeon/radeon_test.c
index 03c33cf4e14c..f8a465d9a1cf 100644
--- a/drivers/gpu/drm/radeon/radeon_test.c
+++ b/drivers/gpu/drm/radeon/radeon_test.c
@@ -42,7 +42,7 @@ void radeon_test_moves(struct radeon_device *rdev)
42 /* Number of tests = 42 /* Number of tests =
43 * (Total GTT - IB pool - writeback page - ring buffer) / test size 43 * (Total GTT - IB pool - writeback page - ring buffer) / test size
44 */ 44 */
45 n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - 4096 - 45 n = (rdev->mc.gtt_size - RADEON_IB_POOL_SIZE*64*1024 - RADEON_GPU_PAGE_SIZE -
46 rdev->cp.ring_size) / size; 46 rdev->cp.ring_size) / size;
47 47
48 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL); 48 gtt_obj = kzalloc(n * sizeof(*gtt_obj), GFP_KERNEL);
@@ -102,7 +102,7 @@ void radeon_test_moves(struct radeon_device *rdev)
102 goto out_cleanup; 102 goto out_cleanup;
103 } 103 }
104 104
105 r = radeon_copy(rdev, gtt_addr, vram_addr, size / 4096, fence); 105 r = radeon_copy(rdev, gtt_addr, vram_addr, size / RADEON_GPU_PAGE_SIZE, fence);
106 if (r) { 106 if (r) {
107 DRM_ERROR("Failed GTT->VRAM copy %d\n", i); 107 DRM_ERROR("Failed GTT->VRAM copy %d\n", i);
108 goto out_cleanup; 108 goto out_cleanup;
@@ -145,7 +145,7 @@ void radeon_test_moves(struct radeon_device *rdev)
145 goto out_cleanup; 145 goto out_cleanup;
146 } 146 }
147 147
148 r = radeon_copy(rdev, vram_addr, gtt_addr, size / 4096, fence); 148 r = radeon_copy(rdev, vram_addr, gtt_addr, size / RADEON_GPU_PAGE_SIZE, fence);
149 if (r) { 149 if (r) {
150 DRM_ERROR("Failed VRAM->GTT copy %d\n", i); 150 DRM_ERROR("Failed VRAM->GTT copy %d\n", i);
151 goto out_cleanup; 151 goto out_cleanup;
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 765bd184b6fc..1381e06d6af3 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -295,6 +295,12 @@ static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
295 if (unlikely(r)) { 295 if (unlikely(r)) {
296 return r; 296 return r;
297 } 297 }
298
299 r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
300 if (unlikely(r)) {
301 goto out_cleanup;
302 }
303
298 r = ttm_tt_bind(bo->ttm, &tmp_mem); 304 r = ttm_tt_bind(bo->ttm, &tmp_mem);
299 if (unlikely(r)) { 305 if (unlikely(r)) {
300 goto out_cleanup; 306 goto out_cleanup;
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index a769c296f6a6..ca037160a582 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -418,6 +418,8 @@ int rs400_resume(struct radeon_device *rdev)
418 rs400_gart_disable(rdev); 418 rs400_gart_disable(rdev);
419 /* Resume clock before doing reset */ 419 /* Resume clock before doing reset */
420 r300_clock_startup(rdev); 420 r300_clock_startup(rdev);
421 /* setup MC before calling post tables */
422 rs400_mc_program(rdev);
421 /* Reset gpu before posting otherwise ATOM will enter infinite loop */ 423 /* Reset gpu before posting otherwise ATOM will enter infinite loop */
422 if (radeon_gpu_reset(rdev)) { 424 if (radeon_gpu_reset(rdev)) {
423 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n", 425 dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 10dfa78762da..5f117cd8736a 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -242,7 +242,7 @@ void rs600_irq_disable(struct radeon_device *rdev)
242 242
243int rs600_irq_process(struct radeon_device *rdev) 243int rs600_irq_process(struct radeon_device *rdev)
244{ 244{
245 uint32_t status; 245 uint32_t status, msi_rearm;
246 uint32_t r500_disp_int; 246 uint32_t r500_disp_int;
247 247
248 status = rs600_irq_ack(rdev, &r500_disp_int); 248 status = rs600_irq_ack(rdev, &r500_disp_int);
@@ -260,6 +260,22 @@ int rs600_irq_process(struct radeon_device *rdev)
260 drm_handle_vblank(rdev->ddev, 1); 260 drm_handle_vblank(rdev->ddev, 1);
261 status = rs600_irq_ack(rdev, &r500_disp_int); 261 status = rs600_irq_ack(rdev, &r500_disp_int);
262 } 262 }
263 if (rdev->msi_enabled) {
264 switch (rdev->family) {
265 case CHIP_RS600:
266 case CHIP_RS690:
267 case CHIP_RS740:
268 msi_rearm = RREG32(RADEON_BUS_CNTL) & ~RS600_MSI_REARM;
269 WREG32(RADEON_BUS_CNTL, msi_rearm);
270 WREG32(RADEON_BUS_CNTL, msi_rearm | RS600_MSI_REARM);
271 break;
272 default:
273 msi_rearm = RREG32(RADEON_MSI_REARM_EN) & ~RV370_MSI_REARM_EN;
274 WREG32(RADEON_MSI_REARM_EN, msi_rearm);
275 WREG32(RADEON_MSI_REARM_EN, msi_rearm | RV370_MSI_REARM_EN);
276 break;
277 }
278 }
263 return IRQ_HANDLED; 279 return IRQ_HANDLED;
264} 280}
265 281
@@ -472,6 +488,8 @@ int rs600_init(struct radeon_device *rdev)
472 } 488 }
473 /* Initialize clocks */ 489 /* Initialize clocks */
474 radeon_get_clock_info(rdev->ddev); 490 radeon_get_clock_info(rdev->ddev);
491 /* Initialize power management */
492 radeon_pm_init(rdev);
475 /* Get vram informations */ 493 /* Get vram informations */
476 rs600_vram_info(rdev); 494 rs600_vram_info(rdev);
477 /* Initialize memory controller (also test AGP) */ 495 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 025e3225346c..27547175cf93 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -706,6 +706,8 @@ int rs690_init(struct radeon_device *rdev)
706 } 706 }
707 /* Initialize clocks */ 707 /* Initialize clocks */
708 radeon_get_clock_info(rdev->ddev); 708 radeon_get_clock_info(rdev->ddev);
709 /* Initialize power management */
710 radeon_pm_init(rdev);
709 /* Get vram informations */ 711 /* Get vram informations */
710 rs690_vram_info(rdev); 712 rs690_vram_info(rdev);
711 /* Initialize memory controller (also test AGP) */ 713 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 41a34c23e6d8..7935f793bf62 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -137,6 +137,8 @@ int rv515_mc_wait_for_idle(struct radeon_device *rdev)
137 137
138void rv515_vga_render_disable(struct radeon_device *rdev) 138void rv515_vga_render_disable(struct radeon_device *rdev)
139{ 139{
140 WREG32(R_000330_D1VGA_CONTROL, 0);
141 WREG32(R_000338_D2VGA_CONTROL, 0);
140 WREG32(R_000300_VGA_RENDER_CONTROL, 142 WREG32(R_000300_VGA_RENDER_CONTROL,
141 RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL); 143 RREG32(R_000300_VGA_RENDER_CONTROL) & C_000300_VGA_VSTATUS_CNTL);
142} 144}
@@ -585,6 +587,8 @@ int rv515_init(struct radeon_device *rdev)
585 } 587 }
586 /* Initialize clocks */ 588 /* Initialize clocks */
587 radeon_get_clock_info(rdev->ddev); 589 radeon_get_clock_info(rdev->ddev);
590 /* Initialize power management */
591 radeon_pm_init(rdev);
588 /* Get vram informations */ 592 /* Get vram informations */
589 rv515_vram_info(rdev); 593 rv515_vram_info(rdev);
590 /* Initialize memory controller (also test AGP) */ 594 /* Initialize memory controller (also test AGP) */
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 595ac638039d..b0efd0ddae7a 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -529,11 +529,11 @@ static void rv770_gpu_init(struct radeon_device *rdev)
529 if (rdev->family == CHIP_RV770) 529 if (rdev->family == CHIP_RV770)
530 gb_tiling_config |= BANK_TILING(1); 530 gb_tiling_config |= BANK_TILING(1);
531 else 531 else
532 gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_SHIFT) >> NOOFBANK_MASK); 532 gb_tiling_config |= BANK_TILING((mc_arb_ramcfg & NOOFBANK_MASK) >> NOOFBANK_SHIFT);
533 533
534 gb_tiling_config |= GROUP_SIZE(0); 534 gb_tiling_config |= GROUP_SIZE(0);
535 535
536 if (((mc_arb_ramcfg & NOOFROWS_MASK) & NOOFROWS_SHIFT) > 3) { 536 if (((mc_arb_ramcfg & NOOFROWS_MASK) >> NOOFROWS_SHIFT) > 3) {
537 gb_tiling_config |= ROW_TILING(3); 537 gb_tiling_config |= ROW_TILING(3);
538 gb_tiling_config |= SAMPLE_SPLIT(3); 538 gb_tiling_config |= SAMPLE_SPLIT(3);
539 } else { 539 } else {
@@ -579,14 +579,14 @@ static void rv770_gpu_init(struct radeon_device *rdev)
579 579
580 /* set HW defaults for 3D engine */ 580 /* set HW defaults for 3D engine */
581 WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) | 581 WREG32(CP_QUEUE_THRESHOLDS, (ROQ_IB1_START(0x16) |
582 ROQ_IB2_START(0x2b))); 582 ROQ_IB2_START(0x2b)));
583 583
584 WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30)); 584 WREG32(CP_MEQ_THRESHOLDS, STQ_SPLIT(0x30));
585 585
586 WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO | 586 WREG32(TA_CNTL_AUX, (DISABLE_CUBE_ANISO |
587 SYNC_GRADIENT | 587 SYNC_GRADIENT |
588 SYNC_WALKER | 588 SYNC_WALKER |
589 SYNC_ALIGNER)); 589 SYNC_ALIGNER));
590 590
591 sx_debug_1 = RREG32(SX_DEBUG_1); 591 sx_debug_1 = RREG32(SX_DEBUG_1);
592 sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS; 592 sx_debug_1 |= ENABLE_NEW_SMX_ADDRESS;
@@ -598,9 +598,9 @@ static void rv770_gpu_init(struct radeon_device *rdev)
598 WREG32(SMX_DC_CTL0, smx_dc_ctl0); 598 WREG32(SMX_DC_CTL0, smx_dc_ctl0);
599 599
600 WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) | 600 WREG32(SMX_EVENT_CTL, (ES_FLUSH_CTL(4) |
601 GS_FLUSH_CTL(4) | 601 GS_FLUSH_CTL(4) |
602 ACK_FLUSH_CTL(3) | 602 ACK_FLUSH_CTL(3) |
603 SYNC_FLUSH_CTL)); 603 SYNC_FLUSH_CTL));
604 604
605 if (rdev->family == CHIP_RV770) 605 if (rdev->family == CHIP_RV770)
606 WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f)); 606 WREG32(DB_DEBUG3, DB_CLK_OFF_DELAY(0x1f));
@@ -611,12 +611,12 @@ static void rv770_gpu_init(struct radeon_device *rdev)
611 } 611 }
612 612
613 WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) | 613 WREG32(SX_EXPORT_BUFFER_SIZES, (COLOR_BUFFER_SIZE((rdev->config.rv770.sx_max_export_size / 4) - 1) |
614 POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) | 614 POSITION_BUFFER_SIZE((rdev->config.rv770.sx_max_export_pos_size / 4) - 1) |
615 SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1))); 615 SMX_BUFFER_SIZE((rdev->config.rv770.sx_max_export_smx_size / 4) - 1)));
616 616
617 WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) | 617 WREG32(PA_SC_FIFO_SIZE, (SC_PRIM_FIFO_SIZE(rdev->config.rv770.sc_prim_fifo_size) |
618 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) | 618 SC_HIZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_hiz_tile_fifo_size) |
619 SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize))); 619 SC_EARLYZ_TILE_FIFO_SIZE(rdev->config.rv770.sc_earlyz_tile_fifo_fize)));
620 620
621 WREG32(PA_SC_MULTI_CHIP_CNTL, 0); 621 WREG32(PA_SC_MULTI_CHIP_CNTL, 0);
622 622
@@ -774,14 +774,36 @@ int rv770_mc_init(struct radeon_device *rdev)
774{ 774{
775 fixed20_12 a; 775 fixed20_12 a;
776 u32 tmp; 776 u32 tmp;
777 int chansize, numchan;
777 int r; 778 int r;
778 779
779 /* Get VRAM informations */ 780 /* Get VRAM informations */
780 /* FIXME: Don't know how to determine vram width, need to check
781 * vram_width usage
782 */
783 rdev->mc.vram_width = 128;
784 rdev->mc.vram_is_ddr = true; 781 rdev->mc.vram_is_ddr = true;
782 tmp = RREG32(MC_ARB_RAMCFG);
783 if (tmp & CHANSIZE_OVERRIDE) {
784 chansize = 16;
785 } else if (tmp & CHANSIZE_MASK) {
786 chansize = 64;
787 } else {
788 chansize = 32;
789 }
790 tmp = RREG32(MC_SHARED_CHMAP);
791 switch ((tmp & NOOFCHAN_MASK) >> NOOFCHAN_SHIFT) {
792 case 0:
793 default:
794 numchan = 1;
795 break;
796 case 1:
797 numchan = 2;
798 break;
799 case 2:
800 numchan = 4;
801 break;
802 case 3:
803 numchan = 8;
804 break;
805 }
806 rdev->mc.vram_width = numchan * chansize;
785 /* Could aper size report 0 ? */ 807 /* Could aper size report 0 ? */
786 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); 808 rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0);
787 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0); 809 rdev->mc.aper_size = drm_get_resource_len(rdev->ddev, 0);
@@ -961,10 +983,13 @@ int rv770_init(struct radeon_device *rdev)
961 r600_scratch_init(rdev); 983 r600_scratch_init(rdev);
962 /* Initialize surface registers */ 984 /* Initialize surface registers */
963 radeon_surface_init(rdev); 985 radeon_surface_init(rdev);
986 /* Initialize clocks */
964 radeon_get_clock_info(rdev->ddev); 987 radeon_get_clock_info(rdev->ddev);
965 r = radeon_clocks_init(rdev); 988 r = radeon_clocks_init(rdev);
966 if (r) 989 if (r)
967 return r; 990 return r;
991 /* Initialize power management */
992 radeon_pm_init(rdev);
968 /* Fence driver */ 993 /* Fence driver */
969 r = radeon_fence_driver_init(rdev); 994 r = radeon_fence_driver_init(rdev);
970 if (r) 995 if (r)
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index 4b9c3d6396ff..a1367ab6f261 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -129,6 +129,10 @@
129#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0 129#define HDP_REG_COHERENCY_FLUSH_CNTL 0x54A0
130#define HDP_TILING_CONFIG 0x2F3C 130#define HDP_TILING_CONFIG 0x2F3C
131 131
132#define MC_SHARED_CHMAP 0x2004
133#define NOOFCHAN_SHIFT 12
134#define NOOFCHAN_MASK 0x00003000
135
132#define MC_ARB_RAMCFG 0x2760 136#define MC_ARB_RAMCFG 0x2760
133#define NOOFBANK_SHIFT 0 137#define NOOFBANK_SHIFT 0
134#define NOOFBANK_MASK 0x00000003 138#define NOOFBANK_MASK 0x00000003
@@ -142,6 +146,7 @@
142#define CHANSIZE_MASK 0x00000100 146#define CHANSIZE_MASK 0x00000100
143#define BURSTLENGTH_SHIFT 9 147#define BURSTLENGTH_SHIFT 9
144#define BURSTLENGTH_MASK 0x00000200 148#define BURSTLENGTH_MASK 0x00000200
149#define CHANSIZE_OVERRIDE (1 << 11)
145#define MC_VM_AGP_TOP 0x2028 150#define MC_VM_AGP_TOP 0x2028
146#define MC_VM_AGP_BOT 0x202C 151#define MC_VM_AGP_BOT 0x202C
147#define MC_VM_AGP_BASE 0x2030 152#define MC_VM_AGP_BASE 0x2030
diff --git a/drivers/gpu/drm/ttm/ttm_tt.c b/drivers/gpu/drm/ttm/ttm_tt.c
index a55ee1a56c16..7bcb89f39ce8 100644
--- a/drivers/gpu/drm/ttm/ttm_tt.c
+++ b/drivers/gpu/drm/ttm/ttm_tt.c
@@ -279,6 +279,7 @@ int ttm_tt_set_placement_caching(struct ttm_tt *ttm, uint32_t placement)
279 279
280 return ttm_tt_set_caching(ttm, state); 280 return ttm_tt_set_caching(ttm, state);
281} 281}
282EXPORT_SYMBOL(ttm_tt_set_placement_caching);
282 283
283static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm) 284static void ttm_tt_free_alloced_pages(struct ttm_tt *ttm)
284{ 285{
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index be34d32906bd..7d05c4bb201e 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1066,7 +1066,7 @@ EXPORT_SYMBOL_GPL(hid_report_raw_event);
1066 * @type: HID report type (HID_*_REPORT) 1066 * @type: HID report type (HID_*_REPORT)
1067 * @data: report contents 1067 * @data: report contents
1068 * @size: size of data parameter 1068 * @size: size of data parameter
1069 * @interrupt: called from atomic? 1069 * @interrupt: distinguish between interrupt and control transfers
1070 * 1070 *
1071 * This is data entry for lower layers. 1071 * This is data entry for lower layers.
1072 */ 1072 */
diff --git a/drivers/hid/hid-twinhan.c b/drivers/hid/hid-twinhan.c
index b05f602c051e..c40afc57fc8f 100644
--- a/drivers/hid/hid-twinhan.c
+++ b/drivers/hid/hid-twinhan.c
@@ -132,12 +132,12 @@ static struct hid_driver twinhan_driver = {
132 .input_mapping = twinhan_input_mapping, 132 .input_mapping = twinhan_input_mapping,
133}; 133};
134 134
135static int twinhan_init(void) 135static int __init twinhan_init(void)
136{ 136{
137 return hid_register_driver(&twinhan_driver); 137 return hid_register_driver(&twinhan_driver);
138} 138}
139 139
140static void twinhan_exit(void) 140static void __exit twinhan_exit(void)
141{ 141{
142 hid_unregister_driver(&twinhan_driver); 142 hid_unregister_driver(&twinhan_driver);
143} 143}
diff --git a/drivers/hid/hidraw.c b/drivers/hid/hidraw.c
index ba05275e5104..cdd136942bca 100644
--- a/drivers/hid/hidraw.c
+++ b/drivers/hid/hidraw.c
@@ -48,10 +48,9 @@ static ssize_t hidraw_read(struct file *file, char __user *buffer, size_t count,
48 char *report; 48 char *report;
49 DECLARE_WAITQUEUE(wait, current); 49 DECLARE_WAITQUEUE(wait, current);
50 50
51 while (ret == 0) { 51 mutex_lock(&list->read_mutex);
52
53 mutex_lock(&list->read_mutex);
54 52
53 while (ret == 0) {
55 if (list->head == list->tail) { 54 if (list->head == list->tail) {
56 add_wait_queue(&list->hidraw->wait, &wait); 55 add_wait_queue(&list->hidraw->wait, &wait);
57 set_current_state(TASK_INTERRUPTIBLE); 56 set_current_state(TASK_INTERRUPTIBLE);
diff --git a/drivers/hwmon/adt7475.c b/drivers/hwmon/adt7475.c
index d39877a7da63..b5a95193c694 100644
--- a/drivers/hwmon/adt7475.c
+++ b/drivers/hwmon/adt7475.c
@@ -350,8 +350,7 @@ static ssize_t show_temp(struct device *dev, struct device_attribute *attr,
350 350
351 case FAULT: 351 case FAULT:
352 /* Note - only for remote1 and remote2 */ 352 /* Note - only for remote1 and remote2 */
353 out = data->alarms & (sattr->index ? 0x8000 : 0x4000); 353 out = !!(data->alarms & (sattr->index ? 0x8000 : 0x4000));
354 out = out ? 0 : 1;
355 break; 354 break;
356 355
357 default: 356 default:
@@ -863,7 +862,7 @@ static SENSOR_DEVICE_ATTR_2(pwm1_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
863 set_pwmfreq, INPUT, 0); 862 set_pwmfreq, INPUT, 0);
864static SENSOR_DEVICE_ATTR_2(pwm1_enable, S_IRUGO | S_IWUSR, show_pwmctrl, 863static SENSOR_DEVICE_ATTR_2(pwm1_enable, S_IRUGO | S_IWUSR, show_pwmctrl,
865 set_pwmctrl, INPUT, 0); 864 set_pwmctrl, INPUT, 0);
866static SENSOR_DEVICE_ATTR_2(pwm1_auto_channel_temp, S_IRUGO | S_IWUSR, 865static SENSOR_DEVICE_ATTR_2(pwm1_auto_channels_temp, S_IRUGO | S_IWUSR,
867 show_pwmchan, set_pwmchan, INPUT, 0); 866 show_pwmchan, set_pwmchan, INPUT, 0);
868static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, 867static SENSOR_DEVICE_ATTR_2(pwm1_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm,
869 set_pwm, MIN, 0); 868 set_pwm, MIN, 0);
@@ -875,7 +874,7 @@ static SENSOR_DEVICE_ATTR_2(pwm2_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
875 set_pwmfreq, INPUT, 1); 874 set_pwmfreq, INPUT, 1);
876static SENSOR_DEVICE_ATTR_2(pwm2_enable, S_IRUGO | S_IWUSR, show_pwmctrl, 875static SENSOR_DEVICE_ATTR_2(pwm2_enable, S_IRUGO | S_IWUSR, show_pwmctrl,
877 set_pwmctrl, INPUT, 1); 876 set_pwmctrl, INPUT, 1);
878static SENSOR_DEVICE_ATTR_2(pwm2_auto_channel_temp, S_IRUGO | S_IWUSR, 877static SENSOR_DEVICE_ATTR_2(pwm2_auto_channels_temp, S_IRUGO | S_IWUSR,
879 show_pwmchan, set_pwmchan, INPUT, 1); 878 show_pwmchan, set_pwmchan, INPUT, 1);
880static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, 879static SENSOR_DEVICE_ATTR_2(pwm2_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm,
881 set_pwm, MIN, 1); 880 set_pwm, MIN, 1);
@@ -887,7 +886,7 @@ static SENSOR_DEVICE_ATTR_2(pwm3_freq, S_IRUGO | S_IWUSR, show_pwmfreq,
887 set_pwmfreq, INPUT, 2); 886 set_pwmfreq, INPUT, 2);
888static SENSOR_DEVICE_ATTR_2(pwm3_enable, S_IRUGO | S_IWUSR, show_pwmctrl, 887static SENSOR_DEVICE_ATTR_2(pwm3_enable, S_IRUGO | S_IWUSR, show_pwmctrl,
889 set_pwmctrl, INPUT, 2); 888 set_pwmctrl, INPUT, 2);
890static SENSOR_DEVICE_ATTR_2(pwm3_auto_channel_temp, S_IRUGO | S_IWUSR, 889static SENSOR_DEVICE_ATTR_2(pwm3_auto_channels_temp, S_IRUGO | S_IWUSR,
891 show_pwmchan, set_pwmchan, INPUT, 2); 890 show_pwmchan, set_pwmchan, INPUT, 2);
892static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm, 891static SENSOR_DEVICE_ATTR_2(pwm3_auto_point1_pwm, S_IRUGO | S_IWUSR, show_pwm,
893 set_pwm, MIN, 2); 892 set_pwm, MIN, 2);
@@ -947,19 +946,19 @@ static struct attribute *adt7475_attrs[] = {
947 &sensor_dev_attr_pwm1.dev_attr.attr, 946 &sensor_dev_attr_pwm1.dev_attr.attr,
948 &sensor_dev_attr_pwm1_freq.dev_attr.attr, 947 &sensor_dev_attr_pwm1_freq.dev_attr.attr,
949 &sensor_dev_attr_pwm1_enable.dev_attr.attr, 948 &sensor_dev_attr_pwm1_enable.dev_attr.attr,
950 &sensor_dev_attr_pwm1_auto_channel_temp.dev_attr.attr, 949 &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
951 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr, 950 &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
952 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr, 951 &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
953 &sensor_dev_attr_pwm2.dev_attr.attr, 952 &sensor_dev_attr_pwm2.dev_attr.attr,
954 &sensor_dev_attr_pwm2_freq.dev_attr.attr, 953 &sensor_dev_attr_pwm2_freq.dev_attr.attr,
955 &sensor_dev_attr_pwm2_enable.dev_attr.attr, 954 &sensor_dev_attr_pwm2_enable.dev_attr.attr,
956 &sensor_dev_attr_pwm2_auto_channel_temp.dev_attr.attr, 955 &sensor_dev_attr_pwm2_auto_channels_temp.dev_attr.attr,
957 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr, 956 &sensor_dev_attr_pwm2_auto_point1_pwm.dev_attr.attr,
958 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr, 957 &sensor_dev_attr_pwm2_auto_point2_pwm.dev_attr.attr,
959 &sensor_dev_attr_pwm3.dev_attr.attr, 958 &sensor_dev_attr_pwm3.dev_attr.attr,
960 &sensor_dev_attr_pwm3_freq.dev_attr.attr, 959 &sensor_dev_attr_pwm3_freq.dev_attr.attr,
961 &sensor_dev_attr_pwm3_enable.dev_attr.attr, 960 &sensor_dev_attr_pwm3_enable.dev_attr.attr,
962 &sensor_dev_attr_pwm3_auto_channel_temp.dev_attr.attr, 961 &sensor_dev_attr_pwm3_auto_channels_temp.dev_attr.attr,
963 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr, 962 &sensor_dev_attr_pwm3_auto_point1_pwm.dev_attr.attr,
964 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr, 963 &sensor_dev_attr_pwm3_auto_point2_pwm.dev_attr.attr,
965 NULL, 964 NULL,
@@ -1152,7 +1151,7 @@ static struct adt7475_data *adt7475_update_device(struct device *dev)
1152 } 1151 }
1153 1152
1154 /* Limits and settings, should never change update every 60 seconds */ 1153 /* Limits and settings, should never change update every 60 seconds */
1155 if (time_after(jiffies, data->limits_updated + HZ * 2) || 1154 if (time_after(jiffies, data->limits_updated + HZ * 60) ||
1156 !data->valid) { 1155 !data->valid) {
1157 data->config5 = adt7475_read(REG_CONFIG5); 1156 data->config5 = adt7475_read(REG_CONFIG5);
1158 1157
diff --git a/drivers/hwmon/dme1737.c b/drivers/hwmon/dme1737.c
index 2c2cb1ec94c5..27d62574284f 100644
--- a/drivers/hwmon/dme1737.c
+++ b/drivers/hwmon/dme1737.c
@@ -572,7 +572,7 @@ static struct dme1737_data *dme1737_update_device(struct device *dev)
572 572
573 /* Sample register contents every 1 sec */ 573 /* Sample register contents every 1 sec */
574 if (time_after(jiffies, data->last_update + HZ) || !data->valid) { 574 if (time_after(jiffies, data->last_update + HZ) || !data->valid) {
575 if (data->type != sch5027) { 575 if (data->type == dme1737) {
576 data->vid = dme1737_read(data, DME1737_REG_VID) & 576 data->vid = dme1737_read(data, DME1737_REG_VID) &
577 0x3f; 577 0x3f;
578 } 578 }
@@ -1621,9 +1621,6 @@ static struct attribute *dme1737_misc_attr[] = {
1621 &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr, 1621 &sensor_dev_attr_zone1_auto_point1_temp_hyst.dev_attr.attr,
1622 &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr, 1622 &sensor_dev_attr_zone2_auto_point1_temp_hyst.dev_attr.attr,
1623 &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr, 1623 &sensor_dev_attr_zone3_auto_point1_temp_hyst.dev_attr.attr,
1624 /* Misc */
1625 &dev_attr_vrm.attr,
1626 &dev_attr_cpu0_vid.attr,
1627 NULL 1624 NULL
1628}; 1625};
1629 1626
@@ -1631,6 +1628,18 @@ static const struct attribute_group dme1737_misc_group = {
1631 .attrs = dme1737_misc_attr, 1628 .attrs = dme1737_misc_attr,
1632}; 1629};
1633 1630
1631/* The following struct holds VID-related attributes. Their creation
1632 depends on the chip type which is determined during module load. */
1633static struct attribute *dme1737_vid_attr[] = {
1634 &dev_attr_vrm.attr,
1635 &dev_attr_cpu0_vid.attr,
1636 NULL
1637};
1638
1639static const struct attribute_group dme1737_vid_group = {
1640 .attrs = dme1737_vid_attr,
1641};
1642
1634/* The following structs hold the PWM attributes, some of which are optional. 1643/* The following structs hold the PWM attributes, some of which are optional.
1635 * Their creation depends on the chip configuration which is determined during 1644 * Their creation depends on the chip configuration which is determined during
1636 * module load. */ 1645 * module load. */
@@ -1902,6 +1911,9 @@ static void dme1737_remove_files(struct device *dev)
1902 if (data->type != sch5027) { 1911 if (data->type != sch5027) {
1903 sysfs_remove_group(&dev->kobj, &dme1737_misc_group); 1912 sysfs_remove_group(&dev->kobj, &dme1737_misc_group);
1904 } 1913 }
1914 if (data->type == dme1737) {
1915 sysfs_remove_group(&dev->kobj, &dme1737_vid_group);
1916 }
1905 1917
1906 sysfs_remove_group(&dev->kobj, &dme1737_group); 1918 sysfs_remove_group(&dev->kobj, &dme1737_group);
1907 1919
@@ -1933,6 +1945,13 @@ static int dme1737_create_files(struct device *dev)
1933 goto exit_remove; 1945 goto exit_remove;
1934 } 1946 }
1935 1947
1948 /* Create VID-related sysfs attributes */
1949 if ((data->type == dme1737) &&
1950 (err = sysfs_create_group(&dev->kobj,
1951 &dme1737_vid_group))) {
1952 goto exit_remove;
1953 }
1954
1936 /* Create fan sysfs attributes */ 1955 /* Create fan sysfs attributes */
1937 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) { 1956 for (ix = 0; ix < ARRAY_SIZE(dme1737_fan_group); ix++) {
1938 if (data->has_fan & (1 << ix)) { 1957 if (data->has_fan & (1 << ix)) {
@@ -2127,7 +2146,7 @@ static int dme1737_init_device(struct device *dev)
2127 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */ 2146 data->pwm_acz[2] = 4; /* pwm3 -> zone3 */
2128 2147
2129 /* Set VRM */ 2148 /* Set VRM */
2130 if (data->type != sch5027) { 2149 if (data->type == dme1737) {
2131 data->vrm = vid_which_vrm(); 2150 data->vrm = vid_which_vrm();
2132 } 2151 }
2133 2152
diff --git a/drivers/hwmon/fschmd.c b/drivers/hwmon/fschmd.c
index 2a7a85a6dc36..da1b1f9488af 100644
--- a/drivers/hwmon/fschmd.c
+++ b/drivers/hwmon/fschmd.c
@@ -819,7 +819,7 @@ static int watchdog_release(struct inode *inode, struct file *filp)
819static ssize_t watchdog_write(struct file *filp, const char __user *buf, 819static ssize_t watchdog_write(struct file *filp, const char __user *buf,
820 size_t count, loff_t *offset) 820 size_t count, loff_t *offset)
821{ 821{
822 size_t ret; 822 int ret;
823 struct fschmd_data *data = filp->private_data; 823 struct fschmd_data *data = filp->private_data;
824 824
825 if (count) { 825 if (count) {
diff --git a/drivers/hwmon/hp_accel.c b/drivers/hwmon/hp_accel.c
index 6679854c85b0..be475e844c2a 100644
--- a/drivers/hwmon/hp_accel.c
+++ b/drivers/hwmon/hp_accel.c
@@ -197,11 +197,13 @@ static struct dmi_system_id lis3lv02d_dmi_ids[] = {
197 AXIS_DMI_MATCH("HP2133", "HP 2133", xy_rotated_left), 197 AXIS_DMI_MATCH("HP2133", "HP 2133", xy_rotated_left),
198 AXIS_DMI_MATCH("HP2140", "HP 2140", xy_swap_inverted), 198 AXIS_DMI_MATCH("HP2140", "HP 2140", xy_swap_inverted),
199 AXIS_DMI_MATCH("NC653x", "HP Compaq 653", xy_rotated_left_usd), 199 AXIS_DMI_MATCH("NC653x", "HP Compaq 653", xy_rotated_left_usd),
200 AXIS_DMI_MATCH("NC673x", "HP Compaq 673", xy_rotated_left_usd), 200 AXIS_DMI_MATCH("NC6730b", "HP Compaq 6730b", xy_rotated_left_usd),
201 AXIS_DMI_MATCH("NC6730s", "HP Compaq 6730s", xy_swap),
201 AXIS_DMI_MATCH("NC651xx", "HP Compaq 651", xy_rotated_right), 202 AXIS_DMI_MATCH("NC651xx", "HP Compaq 651", xy_rotated_right),
202 AXIS_DMI_MATCH("NC6710x", "HP Compaq 6710", xy_swap_yz_inverted), 203 AXIS_DMI_MATCH("NC6710x", "HP Compaq 6710", xy_swap_yz_inverted),
203 AXIS_DMI_MATCH("NC6715x", "HP Compaq 6715", y_inverted), 204 AXIS_DMI_MATCH("NC6715x", "HP Compaq 6715", y_inverted),
204 AXIS_DMI_MATCH("NC693xx", "HP EliteBook 693", xy_rotated_right), 205 AXIS_DMI_MATCH("NC693xx", "HP EliteBook 693", xy_rotated_right),
206 AXIS_DMI_MATCH("NC693xx", "HP EliteBook 853", xy_swap),
205 /* Intel-based HP Pavilion dv5 */ 207 /* Intel-based HP Pavilion dv5 */
206 AXIS_DMI_MATCH2("HPDV5_I", 208 AXIS_DMI_MATCH2("HPDV5_I",
207 PRODUCT_NAME, "HP Pavilion dv5", 209 PRODUCT_NAME, "HP Pavilion dv5",
@@ -214,6 +216,7 @@ static struct dmi_system_id lis3lv02d_dmi_ids[] = {
214 y_inverted), 216 y_inverted),
215 AXIS_DMI_MATCH("DV7", "HP Pavilion dv7", x_inverted), 217 AXIS_DMI_MATCH("DV7", "HP Pavilion dv7", x_inverted),
216 AXIS_DMI_MATCH("HP8710", "HP Compaq 8710", y_inverted), 218 AXIS_DMI_MATCH("HP8710", "HP Compaq 8710", y_inverted),
219 AXIS_DMI_MATCH("HDX18", "HP HDX 18", x_inverted),
217 { NULL, } 220 { NULL, }
218/* Laptop models without axis info (yet): 221/* Laptop models without axis info (yet):
219 * "NC6910" "HP Compaq 6910" 222 * "NC6910" "HP Compaq 6910"
diff --git a/drivers/hwmon/it87.c b/drivers/hwmon/it87.c
index ffeb2a10e1a7..a3749cb0f181 100644
--- a/drivers/hwmon/it87.c
+++ b/drivers/hwmon/it87.c
@@ -1028,12 +1028,11 @@ static int __init it87_find(unsigned short *address,
1028 chip_type, *address, sio_data->revision); 1028 chip_type, *address, sio_data->revision);
1029 1029
1030 /* Read GPIO config and VID value from LDN 7 (GPIO) */ 1030 /* Read GPIO config and VID value from LDN 7 (GPIO) */
1031 if (chip_type != IT8705F_DEVID) { 1031 if (sio_data->type != it87) {
1032 int reg; 1032 int reg;
1033 1033
1034 superio_select(GPIO); 1034 superio_select(GPIO);
1035 if ((chip_type == it8718) || 1035 if (sio_data->type == it8718 || sio_data->type == it8720)
1036 (chip_type == it8720))
1037 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG); 1036 sio_data->vid_value = superio_inb(IT87_SIO_VID_REG);
1038 1037
1039 reg = superio_inb(IT87_SIO_PINX2_REG); 1038 reg = superio_inb(IT87_SIO_PINX2_REG);
diff --git a/drivers/hwmon/s3c-hwmon.c b/drivers/hwmon/s3c-hwmon.c
index 3a524f2fe493..71835412529f 100644
--- a/drivers/hwmon/s3c-hwmon.c
+++ b/drivers/hwmon/s3c-hwmon.c
@@ -323,14 +323,21 @@ static int __devinit s3c_hwmon_probe(struct platform_device *dev)
323 } 323 }
324 324
325 for (i = 0; i < ARRAY_SIZE(pdata->in); i++) { 325 for (i = 0; i < ARRAY_SIZE(pdata->in); i++) {
326 if (!pdata->in[i]) 326 struct s3c24xx_adc_hwmon_incfg *cfg = pdata->in[i];
327
328 if (!cfg)
327 continue; 329 continue;
328 330
329 if (pdata->in[i]->mult >= 0x10000) 331 if (cfg->mult >= 0x10000)
330 dev_warn(&dev->dev, 332 dev_warn(&dev->dev,
331 "channel %d multiplier too large\n", 333 "channel %d multiplier too large\n",
332 i); 334 i);
333 335
336 if (cfg->divider == 0) {
337 dev_err(&dev->dev, "channel %d divider zero\n", i);
338 continue;
339 }
340
334 ret = s3c_hwmon_create_attr(&dev->dev, pdata->in[i], 341 ret = s3c_hwmon_create_attr(&dev->dev, pdata->in[i],
335 &hwmon->attrs[i], i); 342 &hwmon->attrs[i], i);
336 if (ret) { 343 if (ret) {
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 737335ff2b21..e8fe7f169e25 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -128,7 +128,7 @@ config I2C_PIIX4
128 ATI SB600 128 ATI SB600
129 ATI SB700 129 ATI SB700
130 ATI SB800 130 ATI SB800
131 AMD SB900 131 AMD Hudson-2
132 Serverworks OSB4 132 Serverworks OSB4
133 Serverworks CSB5 133 Serverworks CSB5
134 Serverworks CSB6 134 Serverworks CSB6
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 4afba3ec2a61..e3654d683e15 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -120,19 +120,26 @@ struct imx_i2c_struct {
120 wait_queue_head_t queue; 120 wait_queue_head_t queue;
121 unsigned long i2csr; 121 unsigned long i2csr;
122 unsigned int disable_delay; 122 unsigned int disable_delay;
123 int stopped;
124 unsigned int ifdr; /* IMX_I2C_IFDR */
123}; 125};
124 126
125/** Functions for IMX I2C adapter driver *************************************** 127/** Functions for IMX I2C adapter driver ***************************************
126*******************************************************************************/ 128*******************************************************************************/
127 129
128static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx) 130static int i2c_imx_bus_busy(struct imx_i2c_struct *i2c_imx, int for_busy)
129{ 131{
130 unsigned long orig_jiffies = jiffies; 132 unsigned long orig_jiffies = jiffies;
133 unsigned int temp;
131 134
132 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 135 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
133 136
134 /* wait for bus not busy */ 137 while (1) {
135 while (readb(i2c_imx->base + IMX_I2C_I2SR) & I2SR_IBB) { 138 temp = readb(i2c_imx->base + IMX_I2C_I2SR);
139 if (for_busy && (temp & I2SR_IBB))
140 break;
141 if (!for_busy && !(temp & I2SR_IBB))
142 break;
136 if (signal_pending(current)) { 143 if (signal_pending(current)) {
137 dev_dbg(&i2c_imx->adapter.dev, 144 dev_dbg(&i2c_imx->adapter.dev,
138 "<%s> I2C Interrupted\n", __func__); 145 "<%s> I2C Interrupted\n", __func__);
@@ -179,41 +186,62 @@ static int i2c_imx_acked(struct imx_i2c_struct *i2c_imx)
179 return 0; 186 return 0;
180} 187}
181 188
182static void i2c_imx_start(struct imx_i2c_struct *i2c_imx) 189static int i2c_imx_start(struct imx_i2c_struct *i2c_imx)
183{ 190{
184 unsigned int temp = 0; 191 unsigned int temp = 0;
192 int result;
185 193
186 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 194 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
187 195
196 clk_enable(i2c_imx->clk);
197 writeb(i2c_imx->ifdr, i2c_imx->base + IMX_I2C_IFDR);
188 /* Enable I2C controller */ 198 /* Enable I2C controller */
199 writeb(0, i2c_imx->base + IMX_I2C_I2SR);
189 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); 200 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR);
201
202 /* Wait controller to be stable */
203 udelay(50);
204
190 /* Start I2C transaction */ 205 /* Start I2C transaction */
191 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 206 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
192 temp |= I2CR_MSTA; 207 temp |= I2CR_MSTA;
193 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 208 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
209 result = i2c_imx_bus_busy(i2c_imx, 1);
210 if (result)
211 return result;
212 i2c_imx->stopped = 0;
213
194 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK; 214 temp |= I2CR_IIEN | I2CR_MTX | I2CR_TXAK;
195 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 215 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
216 return result;
196} 217}
197 218
198static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx) 219static void i2c_imx_stop(struct imx_i2c_struct *i2c_imx)
199{ 220{
200 unsigned int temp = 0; 221 unsigned int temp = 0;
201 222
202 /* Stop I2C transaction */ 223 if (!i2c_imx->stopped) {
203 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 224 /* Stop I2C transaction */
204 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 225 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
205 temp &= ~I2CR_MSTA; 226 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
206 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 227 temp &= ~(I2CR_MSTA | I2CR_MTX);
207 /* setup chip registers to defaults */ 228 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
208 writeb(I2CR_IEN, i2c_imx->base + IMX_I2C_I2CR); 229 i2c_imx->stopped = 1;
209 writeb(0, i2c_imx->base + IMX_I2C_I2SR); 230 }
210 /* 231 if (cpu_is_mx1()) {
211 * This delay caused by an i.MXL hardware bug. 232 /*
212 * If no (or too short) delay, no "STOP" bit will be generated. 233 * This delay caused by an i.MXL hardware bug.
213 */ 234 * If no (or too short) delay, no "STOP" bit will be generated.
214 udelay(i2c_imx->disable_delay); 235 */
236 udelay(i2c_imx->disable_delay);
237 }
238
239 if (!i2c_imx->stopped)
240 i2c_imx_bus_busy(i2c_imx, 0);
241
215 /* Disable I2C controller */ 242 /* Disable I2C controller */
216 writeb(0, i2c_imx->base + IMX_I2C_I2CR); 243 writeb(0, i2c_imx->base + IMX_I2C_I2CR);
244 clk_disable(i2c_imx->clk);
217} 245}
218 246
219static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx, 247static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
@@ -233,8 +261,8 @@ static void __init i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx,
233 else 261 else
234 for (i = 0; i2c_clk_div[i][0] < div; i++); 262 for (i = 0; i2c_clk_div[i][0] < div; i++);
235 263
236 /* Write divider value to register */ 264 /* Store divider value */
237 writeb(i2c_clk_div[i][1], i2c_imx->base + IMX_I2C_IFDR); 265 i2c_imx->ifdr = i2c_clk_div[i][1];
238 266
239 /* 267 /*
240 * There dummy delay is calculated. 268 * There dummy delay is calculated.
@@ -341,11 +369,15 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs)
341 if (result) 369 if (result)
342 return result; 370 return result;
343 if (i == (msgs->len - 1)) { 371 if (i == (msgs->len - 1)) {
372 /* It must generate STOP before read I2DR to prevent
373 controller from generating another clock cycle */
344 dev_dbg(&i2c_imx->adapter.dev, 374 dev_dbg(&i2c_imx->adapter.dev,
345 "<%s> clear MSTA\n", __func__); 375 "<%s> clear MSTA\n", __func__);
346 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 376 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
347 temp &= ~I2CR_MSTA; 377 temp &= ~(I2CR_MSTA | I2CR_MTX);
348 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 378 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
379 i2c_imx_bus_busy(i2c_imx, 0);
380 i2c_imx->stopped = 1;
349 } else if (i == (msgs->len - 2)) { 381 } else if (i == (msgs->len - 2)) {
350 dev_dbg(&i2c_imx->adapter.dev, 382 dev_dbg(&i2c_imx->adapter.dev,
351 "<%s> set TXAK\n", __func__); 383 "<%s> set TXAK\n", __func__);
@@ -370,14 +402,11 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
370 402
371 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__); 403 dev_dbg(&i2c_imx->adapter.dev, "<%s>\n", __func__);
372 404
373 /* Check if i2c bus is not busy */ 405 /* Start I2C transfer */
374 result = i2c_imx_bus_busy(i2c_imx); 406 result = i2c_imx_start(i2c_imx);
375 if (result) 407 if (result)
376 goto fail0; 408 goto fail0;
377 409
378 /* Start I2C transfer */
379 i2c_imx_start(i2c_imx);
380
381 /* read/write data */ 410 /* read/write data */
382 for (i = 0; i < num; i++) { 411 for (i = 0; i < num; i++) {
383 if (i) { 412 if (i) {
@@ -386,6 +415,9 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
386 temp = readb(i2c_imx->base + IMX_I2C_I2CR); 415 temp = readb(i2c_imx->base + IMX_I2C_I2CR);
387 temp |= I2CR_RSTA; 416 temp |= I2CR_RSTA;
388 writeb(temp, i2c_imx->base + IMX_I2C_I2CR); 417 writeb(temp, i2c_imx->base + IMX_I2C_I2CR);
418 result = i2c_imx_bus_busy(i2c_imx, 1);
419 if (result)
420 goto fail0;
389 } 421 }
390 dev_dbg(&i2c_imx->adapter.dev, 422 dev_dbg(&i2c_imx->adapter.dev,
391 "<%s> transfer message: %d\n", __func__, i); 423 "<%s> transfer message: %d\n", __func__, i);
@@ -500,7 +532,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
500 dev_err(&pdev->dev, "can't get I2C clock\n"); 532 dev_err(&pdev->dev, "can't get I2C clock\n");
501 goto fail3; 533 goto fail3;
502 } 534 }
503 clk_enable(i2c_imx->clk);
504 535
505 /* Request IRQ */ 536 /* Request IRQ */
506 ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx); 537 ret = request_irq(i2c_imx->irq, i2c_imx_isr, 0, pdev->name, i2c_imx);
@@ -549,7 +580,6 @@ static int __init i2c_imx_probe(struct platform_device *pdev)
549fail5: 580fail5:
550 free_irq(i2c_imx->irq, i2c_imx); 581 free_irq(i2c_imx->irq, i2c_imx);
551fail4: 582fail4:
552 clk_disable(i2c_imx->clk);
553 clk_put(i2c_imx->clk); 583 clk_put(i2c_imx->clk);
554fail3: 584fail3:
555 release_mem_region(i2c_imx->res->start, resource_size(res)); 585 release_mem_region(i2c_imx->res->start, resource_size(res));
@@ -586,8 +616,6 @@ static int __exit i2c_imx_remove(struct platform_device *pdev)
586 if (pdata && pdata->exit) 616 if (pdata && pdata->exit)
587 pdata->exit(&pdev->dev); 617 pdata->exit(&pdev->dev);
588 618
589 /* Disable I2C clock */
590 clk_disable(i2c_imx->clk);
591 clk_put(i2c_imx->clk); 619 clk_put(i2c_imx->clk);
592 620
593 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res)); 621 release_mem_region(i2c_imx->res->start, resource_size(i2c_imx->res));
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index d325e86e3103..f627001108b8 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -365,9 +365,6 @@ static int mpc_write(struct mpc_i2c *i2c, int target,
365 unsigned timeout = i2c->adap.timeout; 365 unsigned timeout = i2c->adap.timeout;
366 u32 flags = restart ? CCR_RSTA : 0; 366 u32 flags = restart ? CCR_RSTA : 0;
367 367
368 /* Start with MEN */
369 if (!restart)
370 writeccr(i2c, CCR_MEN);
371 /* Start as master */ 368 /* Start as master */
372 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); 369 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
373 /* Write target byte */ 370 /* Write target byte */
@@ -396,9 +393,6 @@ static int mpc_read(struct mpc_i2c *i2c, int target,
396 int i, result; 393 int i, result;
397 u32 flags = restart ? CCR_RSTA : 0; 394 u32 flags = restart ? CCR_RSTA : 0;
398 395
399 /* Start with MEN */
400 if (!restart)
401 writeccr(i2c, CCR_MEN);
402 /* Switch to read - restart */ 396 /* Switch to read - restart */
403 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags); 397 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX | flags);
404 /* Write target address byte - this time with the read flag set */ 398 /* Write target address byte - this time with the read flag set */
@@ -425,9 +419,9 @@ static int mpc_read(struct mpc_i2c *i2c, int target,
425 /* Generate txack on next to last byte */ 419 /* Generate txack on next to last byte */
426 if (i == length - 2) 420 if (i == length - 2)
427 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK); 421 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_TXAK);
428 /* Generate stop on last byte */ 422 /* Do not generate stop on last byte */
429 if (i == length - 1) 423 if (i == length - 1)
430 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_TXAK); 424 writeccr(i2c, CCR_MIEN | CCR_MEN | CCR_MSTA | CCR_MTX);
431 data[i] = readb(i2c->base + MPC_I2C_DR); 425 data[i] = readb(i2c->base + MPC_I2C_DR);
432 } 426 }
433 427
diff --git a/drivers/i2c/busses/i2c-piix4.c b/drivers/i2c/busses/i2c-piix4.c
index d26a972aacaa..1e245e9cad31 100644
--- a/drivers/i2c/busses/i2c-piix4.c
+++ b/drivers/i2c/busses/i2c-piix4.c
@@ -22,7 +22,7 @@
22 Intel PIIX4, 440MX 22 Intel PIIX4, 440MX
23 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100 23 Serverworks OSB4, CSB5, CSB6, HT-1000, HT-1100
24 ATI IXP200, IXP300, IXP400, SB600, SB700, SB800 24 ATI IXP200, IXP300, IXP400, SB600, SB700, SB800
25 AMD SB900 25 AMD Hudson-2
26 SMSC Victory66 26 SMSC Victory66
27 27
28 Note: we assume there can only be one device, with one SMBus interface. 28 Note: we assume there can only be one device, with one SMBus interface.
@@ -233,9 +233,9 @@ static int __devinit piix4_setup_sb800(struct pci_dev *PIIX4_dev,
233 unsigned short smba_idx = 0xcd6; 233 unsigned short smba_idx = 0xcd6;
234 u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c; 234 u8 smba_en_lo, smba_en_hi, i2ccfg, i2ccfg_offset = 0x10, smb_en = 0x2c;
235 235
236 /* SB800 SMBus does not support forcing address */ 236 /* SB800 and later SMBus does not support forcing address */
237 if (force || force_addr) { 237 if (force || force_addr) {
238 dev_err(&PIIX4_dev->dev, "SB800 SMBus does not support " 238 dev_err(&PIIX4_dev->dev, "SMBus does not support "
239 "forcing address!\n"); 239 "forcing address!\n");
240 return -EINVAL; 240 return -EINVAL;
241 } 241 }
@@ -480,7 +480,7 @@ static struct pci_device_id piix4_ids[] = {
480 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) }, 480 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP300_SMBUS) },
481 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) }, 481 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP400_SMBUS) },
482 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) }, 482 { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS) },
483 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SMBUS) }, 483 { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS) },
484 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 484 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
485 PCI_DEVICE_ID_SERVERWORKS_OSB4) }, 485 PCI_DEVICE_ID_SERVERWORKS_OSB4) },
486 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS, 486 { PCI_DEVICE(PCI_VENDOR_ID_SERVERWORKS,
diff --git a/drivers/ide/atiixp.c b/drivers/ide/atiixp.c
index 6396c3ad3252..837322b10a4c 100644
--- a/drivers/ide/atiixp.c
+++ b/drivers/ide/atiixp.c
@@ -177,7 +177,7 @@ static const struct pci_device_id atiixp_pci_tbl[] = {
177 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 }, 177 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP400_IDE), 0 },
178 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 }, 178 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP600_IDE), 1 },
179 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 }, 179 { PCI_VDEVICE(ATI, PCI_DEVICE_ID_ATI_IXP700_IDE), 0 },
180 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_SB900_IDE), 0 }, 180 { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_HUDSON2_IDE), 0 },
181 { 0, }, 181 { 0, },
182}; 182};
183MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl); 183MODULE_DEVICE_TABLE(pci, atiixp_pci_tbl);
diff --git a/drivers/ide/cmd64x.c b/drivers/ide/cmd64x.c
index 680e5975217f..ca0c46f6580a 100644
--- a/drivers/ide/cmd64x.c
+++ b/drivers/ide/cmd64x.c
@@ -379,7 +379,8 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
379 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}}, 379 .enablebits = {{0x00,0x00,0x00}, {0x51,0x08,0x08}},
380 .port_ops = &cmd64x_port_ops, 380 .port_ops = &cmd64x_port_ops,
381 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX | 381 .host_flags = IDE_HFLAG_CLEAR_SIMPLEX |
382 IDE_HFLAG_ABUSE_PREFETCH, 382 IDE_HFLAG_ABUSE_PREFETCH |
383 IDE_HFLAG_SERIALIZE,
383 .pio_mask = ATA_PIO5, 384 .pio_mask = ATA_PIO5,
384 .mwdma_mask = ATA_MWDMA2, 385 .mwdma_mask = ATA_MWDMA2,
385 .udma_mask = 0x00, /* no udma */ 386 .udma_mask = 0x00, /* no udma */
@@ -389,7 +390,8 @@ static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
389 .init_chipset = init_chipset_cmd64x, 390 .init_chipset = init_chipset_cmd64x,
390 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}}, 391 .enablebits = {{0x51,0x04,0x04}, {0x51,0x08,0x08}},
391 .port_ops = &cmd648_port_ops, 392 .port_ops = &cmd648_port_ops,
392 .host_flags = IDE_HFLAG_ABUSE_PREFETCH, 393 .host_flags = IDE_HFLAG_ABUSE_PREFETCH |
394 IDE_HFLAG_SERIALIZE,
393 .pio_mask = ATA_PIO5, 395 .pio_mask = ATA_PIO5,
394 .mwdma_mask = ATA_MWDMA2, 396 .mwdma_mask = ATA_MWDMA2,
395 .udma_mask = ATA_UDMA2, 397 .udma_mask = ATA_UDMA2,
diff --git a/drivers/ide/ide-probe.c b/drivers/ide/ide-probe.c
index 63c53d65e875..4d76ba473097 100644
--- a/drivers/ide/ide-probe.c
+++ b/drivers/ide/ide-probe.c
@@ -1046,15 +1046,6 @@ static void ide_port_init_devices(ide_hwif_t *hwif)
1046 if (port_ops && port_ops->init_dev) 1046 if (port_ops && port_ops->init_dev)
1047 port_ops->init_dev(drive); 1047 port_ops->init_dev(drive);
1048 } 1048 }
1049
1050 ide_port_for_each_dev(i, drive, hwif) {
1051 /*
1052 * default to PIO Mode 0 before we figure out
1053 * the most suited mode for the attached device
1054 */
1055 if (port_ops && port_ops->set_pio_mode)
1056 port_ops->set_pio_mode(drive, 0);
1057 }
1058} 1049}
1059 1050
1060static void ide_init_port(ide_hwif_t *hwif, unsigned int port, 1051static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
diff --git a/drivers/input/ff-core.c b/drivers/input/ff-core.c
index 72c63e5dd630..38df81fcdc3a 100644
--- a/drivers/input/ff-core.c
+++ b/drivers/input/ff-core.c
@@ -337,16 +337,16 @@ int input_ff_create(struct input_dev *dev, int max_effects)
337 dev->ff = ff; 337 dev->ff = ff;
338 dev->flush = flush_effects; 338 dev->flush = flush_effects;
339 dev->event = input_ff_event; 339 dev->event = input_ff_event;
340 set_bit(EV_FF, dev->evbit); 340 __set_bit(EV_FF, dev->evbit);
341 341
342 /* Copy "true" bits into ff device bitmap */ 342 /* Copy "true" bits into ff device bitmap */
343 for (i = 0; i <= FF_MAX; i++) 343 for (i = 0; i <= FF_MAX; i++)
344 if (test_bit(i, dev->ffbit)) 344 if (test_bit(i, dev->ffbit))
345 set_bit(i, ff->ffbit); 345 __set_bit(i, ff->ffbit);
346 346
347 /* we can emulate RUMBLE with periodic effects */ 347 /* we can emulate RUMBLE with periodic effects */
348 if (test_bit(FF_PERIODIC, ff->ffbit)) 348 if (test_bit(FF_PERIODIC, ff->ffbit))
349 set_bit(FF_RUMBLE, dev->ffbit); 349 __set_bit(FF_RUMBLE, dev->ffbit);
350 350
351 return 0; 351 return 0;
352} 352}
@@ -362,12 +362,14 @@ EXPORT_SYMBOL_GPL(input_ff_create);
362 */ 362 */
363void input_ff_destroy(struct input_dev *dev) 363void input_ff_destroy(struct input_dev *dev)
364{ 364{
365 clear_bit(EV_FF, dev->evbit); 365 struct ff_device *ff = dev->ff;
366 if (dev->ff) { 366
367 if (dev->ff->destroy) 367 __clear_bit(EV_FF, dev->evbit);
368 dev->ff->destroy(dev->ff); 368 if (ff) {
369 kfree(dev->ff->private); 369 if (ff->destroy)
370 kfree(dev->ff); 370 ff->destroy(ff);
371 kfree(ff->private);
372 kfree(ff);
371 dev->ff = NULL; 373 dev->ff = NULL;
372 } 374 }
373} 375}
diff --git a/drivers/input/ff-memless.c b/drivers/input/ff-memless.c
index 2d1415e16834..b483b2995fa9 100644
--- a/drivers/input/ff-memless.c
+++ b/drivers/input/ff-memless.c
@@ -61,7 +61,6 @@ struct ml_device {
61 struct ml_effect_state states[FF_MEMLESS_EFFECTS]; 61 struct ml_effect_state states[FF_MEMLESS_EFFECTS];
62 int gain; 62 int gain;
63 struct timer_list timer; 63 struct timer_list timer;
64 spinlock_t timer_lock;
65 struct input_dev *dev; 64 struct input_dev *dev;
66 65
67 int (*play_effect)(struct input_dev *dev, void *data, 66 int (*play_effect)(struct input_dev *dev, void *data,
@@ -368,38 +367,38 @@ static void ml_effect_timer(unsigned long timer_data)
368{ 367{
369 struct input_dev *dev = (struct input_dev *)timer_data; 368 struct input_dev *dev = (struct input_dev *)timer_data;
370 struct ml_device *ml = dev->ff->private; 369 struct ml_device *ml = dev->ff->private;
370 unsigned long flags;
371 371
372 debug("timer: updating effects"); 372 debug("timer: updating effects");
373 373
374 spin_lock(&ml->timer_lock); 374 spin_lock_irqsave(&dev->event_lock, flags);
375 ml_play_effects(ml); 375 ml_play_effects(ml);
376 spin_unlock(&ml->timer_lock); 376 spin_unlock_irqrestore(&dev->event_lock, flags);
377} 377}
378 378
379/*
380 * Sets requested gain for FF effects. Called with dev->event_lock held.
381 */
379static void ml_ff_set_gain(struct input_dev *dev, u16 gain) 382static void ml_ff_set_gain(struct input_dev *dev, u16 gain)
380{ 383{
381 struct ml_device *ml = dev->ff->private; 384 struct ml_device *ml = dev->ff->private;
382 int i; 385 int i;
383 386
384 spin_lock_bh(&ml->timer_lock);
385
386 ml->gain = gain; 387 ml->gain = gain;
387 388
388 for (i = 0; i < FF_MEMLESS_EFFECTS; i++) 389 for (i = 0; i < FF_MEMLESS_EFFECTS; i++)
389 __clear_bit(FF_EFFECT_PLAYING, &ml->states[i].flags); 390 __clear_bit(FF_EFFECT_PLAYING, &ml->states[i].flags);
390 391
391 ml_play_effects(ml); 392 ml_play_effects(ml);
392
393 spin_unlock_bh(&ml->timer_lock);
394} 393}
395 394
395/*
396 * Start/stop specified FF effect. Called with dev->event_lock held.
397 */
396static int ml_ff_playback(struct input_dev *dev, int effect_id, int value) 398static int ml_ff_playback(struct input_dev *dev, int effect_id, int value)
397{ 399{
398 struct ml_device *ml = dev->ff->private; 400 struct ml_device *ml = dev->ff->private;
399 struct ml_effect_state *state = &ml->states[effect_id]; 401 struct ml_effect_state *state = &ml->states[effect_id];
400 unsigned long flags;
401
402 spin_lock_irqsave(&ml->timer_lock, flags);
403 402
404 if (value > 0) { 403 if (value > 0) {
405 debug("initiated play"); 404 debug("initiated play");
@@ -425,8 +424,6 @@ static int ml_ff_playback(struct input_dev *dev, int effect_id, int value)
425 ml_play_effects(ml); 424 ml_play_effects(ml);
426 } 425 }
427 426
428 spin_unlock_irqrestore(&ml->timer_lock, flags);
429
430 return 0; 427 return 0;
431} 428}
432 429
@@ -436,7 +433,7 @@ static int ml_ff_upload(struct input_dev *dev,
436 struct ml_device *ml = dev->ff->private; 433 struct ml_device *ml = dev->ff->private;
437 struct ml_effect_state *state = &ml->states[effect->id]; 434 struct ml_effect_state *state = &ml->states[effect->id];
438 435
439 spin_lock_bh(&ml->timer_lock); 436 spin_lock_irq(&dev->event_lock);
440 437
441 if (test_bit(FF_EFFECT_STARTED, &state->flags)) { 438 if (test_bit(FF_EFFECT_STARTED, &state->flags)) {
442 __clear_bit(FF_EFFECT_PLAYING, &state->flags); 439 __clear_bit(FF_EFFECT_PLAYING, &state->flags);
@@ -448,7 +445,7 @@ static int ml_ff_upload(struct input_dev *dev,
448 ml_schedule_timer(ml); 445 ml_schedule_timer(ml);
449 } 446 }
450 447
451 spin_unlock_bh(&ml->timer_lock); 448 spin_unlock_irq(&dev->event_lock);
452 449
453 return 0; 450 return 0;
454} 451}
@@ -482,7 +479,6 @@ int input_ff_create_memless(struct input_dev *dev, void *data,
482 ml->private = data; 479 ml->private = data;
483 ml->play_effect = play_effect; 480 ml->play_effect = play_effect;
484 ml->gain = 0xffff; 481 ml->gain = 0xffff;
485 spin_lock_init(&ml->timer_lock);
486 setup_timer(&ml->timer, ml_effect_timer, (unsigned long)dev); 482 setup_timer(&ml->timer, ml_effect_timer, (unsigned long)dev);
487 483
488 set_bit(FF_GAIN, dev->ffbit); 484 set_bit(FF_GAIN, dev->ffbit);
diff --git a/drivers/input/input.c b/drivers/input/input.c
index c6f88ebb40c7..2266ecbfbc01 100644
--- a/drivers/input/input.c
+++ b/drivers/input/input.c
@@ -782,10 +782,29 @@ static unsigned int input_proc_devices_poll(struct file *file, poll_table *wait)
782 return 0; 782 return 0;
783} 783}
784 784
785union input_seq_state {
786 struct {
787 unsigned short pos;
788 bool mutex_acquired;
789 };
790 void *p;
791};
792
785static void *input_devices_seq_start(struct seq_file *seq, loff_t *pos) 793static void *input_devices_seq_start(struct seq_file *seq, loff_t *pos)
786{ 794{
787 if (mutex_lock_interruptible(&input_mutex)) 795 union input_seq_state *state = (union input_seq_state *)&seq->private;
788 return NULL; 796 int error;
797
798 /* We need to fit into seq->private pointer */
799 BUILD_BUG_ON(sizeof(union input_seq_state) != sizeof(seq->private));
800
801 error = mutex_lock_interruptible(&input_mutex);
802 if (error) {
803 state->mutex_acquired = false;
804 return ERR_PTR(error);
805 }
806
807 state->mutex_acquired = true;
789 808
790 return seq_list_start(&input_dev_list, *pos); 809 return seq_list_start(&input_dev_list, *pos);
791} 810}
@@ -795,9 +814,12 @@ static void *input_devices_seq_next(struct seq_file *seq, void *v, loff_t *pos)
795 return seq_list_next(v, &input_dev_list, pos); 814 return seq_list_next(v, &input_dev_list, pos);
796} 815}
797 816
798static void input_devices_seq_stop(struct seq_file *seq, void *v) 817static void input_seq_stop(struct seq_file *seq, void *v)
799{ 818{
800 mutex_unlock(&input_mutex); 819 union input_seq_state *state = (union input_seq_state *)&seq->private;
820
821 if (state->mutex_acquired)
822 mutex_unlock(&input_mutex);
801} 823}
802 824
803static void input_seq_print_bitmap(struct seq_file *seq, const char *name, 825static void input_seq_print_bitmap(struct seq_file *seq, const char *name,
@@ -861,7 +883,7 @@ static int input_devices_seq_show(struct seq_file *seq, void *v)
861static const struct seq_operations input_devices_seq_ops = { 883static const struct seq_operations input_devices_seq_ops = {
862 .start = input_devices_seq_start, 884 .start = input_devices_seq_start,
863 .next = input_devices_seq_next, 885 .next = input_devices_seq_next,
864 .stop = input_devices_seq_stop, 886 .stop = input_seq_stop,
865 .show = input_devices_seq_show, 887 .show = input_devices_seq_show,
866}; 888};
867 889
@@ -881,40 +903,49 @@ static const struct file_operations input_devices_fileops = {
881 903
882static void *input_handlers_seq_start(struct seq_file *seq, loff_t *pos) 904static void *input_handlers_seq_start(struct seq_file *seq, loff_t *pos)
883{ 905{
884 if (mutex_lock_interruptible(&input_mutex)) 906 union input_seq_state *state = (union input_seq_state *)&seq->private;
885 return NULL; 907 int error;
908
909 /* We need to fit into seq->private pointer */
910 BUILD_BUG_ON(sizeof(union input_seq_state) != sizeof(seq->private));
911
912 error = mutex_lock_interruptible(&input_mutex);
913 if (error) {
914 state->mutex_acquired = false;
915 return ERR_PTR(error);
916 }
917
918 state->mutex_acquired = true;
919 state->pos = *pos;
886 920
887 seq->private = (void *)(unsigned long)*pos;
888 return seq_list_start(&input_handler_list, *pos); 921 return seq_list_start(&input_handler_list, *pos);
889} 922}
890 923
891static void *input_handlers_seq_next(struct seq_file *seq, void *v, loff_t *pos) 924static void *input_handlers_seq_next(struct seq_file *seq, void *v, loff_t *pos)
892{ 925{
893 seq->private = (void *)(unsigned long)(*pos + 1); 926 union input_seq_state *state = (union input_seq_state *)&seq->private;
894 return seq_list_next(v, &input_handler_list, pos);
895}
896 927
897static void input_handlers_seq_stop(struct seq_file *seq, void *v) 928 state->pos = *pos + 1;
898{ 929 return seq_list_next(v, &input_handler_list, pos);
899 mutex_unlock(&input_mutex);
900} 930}
901 931
902static int input_handlers_seq_show(struct seq_file *seq, void *v) 932static int input_handlers_seq_show(struct seq_file *seq, void *v)
903{ 933{
904 struct input_handler *handler = container_of(v, struct input_handler, node); 934 struct input_handler *handler = container_of(v, struct input_handler, node);
935 union input_seq_state *state = (union input_seq_state *)&seq->private;
905 936
906 seq_printf(seq, "N: Number=%ld Name=%s", 937 seq_printf(seq, "N: Number=%u Name=%s", state->pos, handler->name);
907 (unsigned long)seq->private, handler->name);
908 if (handler->fops) 938 if (handler->fops)
909 seq_printf(seq, " Minor=%d", handler->minor); 939 seq_printf(seq, " Minor=%d", handler->minor);
910 seq_putc(seq, '\n'); 940 seq_putc(seq, '\n');
911 941
912 return 0; 942 return 0;
913} 943}
944
914static const struct seq_operations input_handlers_seq_ops = { 945static const struct seq_operations input_handlers_seq_ops = {
915 .start = input_handlers_seq_start, 946 .start = input_handlers_seq_start,
916 .next = input_handlers_seq_next, 947 .next = input_handlers_seq_next,
917 .stop = input_handlers_seq_stop, 948 .stop = input_seq_stop,
918 .show = input_handlers_seq_show, 949 .show = input_handlers_seq_show,
919}; 950};
920 951
@@ -1261,17 +1292,24 @@ static int input_dev_uevent(struct device *device, struct kobj_uevent_env *env)
1261 return 0; 1292 return 0;
1262} 1293}
1263 1294
1264#define INPUT_DO_TOGGLE(dev, type, bits, on) \ 1295#define INPUT_DO_TOGGLE(dev, type, bits, on) \
1265 do { \ 1296 do { \
1266 int i; \ 1297 int i; \
1267 if (!test_bit(EV_##type, dev->evbit)) \ 1298 bool active; \
1268 break; \ 1299 \
1269 for (i = 0; i < type##_MAX; i++) { \ 1300 if (!test_bit(EV_##type, dev->evbit)) \
1270 if (!test_bit(i, dev->bits##bit) || \ 1301 break; \
1271 !test_bit(i, dev->bits)) \ 1302 \
1272 continue; \ 1303 for (i = 0; i < type##_MAX; i++) { \
1273 dev->event(dev, EV_##type, i, on); \ 1304 if (!test_bit(i, dev->bits##bit)) \
1274 } \ 1305 continue; \
1306 \
1307 active = test_bit(i, dev->bits); \
1308 if (!active && !on) \
1309 continue; \
1310 \
1311 dev->event(dev, EV_##type, i, on ? active : 0); \
1312 } \
1275 } while (0) 1313 } while (0)
1276 1314
1277#ifdef CONFIG_PM 1315#ifdef CONFIG_PM
diff --git a/drivers/input/keyboard/atkbd.c b/drivers/input/keyboard/atkbd.c
index 4709e15af607..28e6110d1ff8 100644
--- a/drivers/input/keyboard/atkbd.c
+++ b/drivers/input/keyboard/atkbd.c
@@ -233,6 +233,7 @@ struct atkbd {
233 */ 233 */
234static void (*atkbd_platform_fixup)(struct atkbd *, const void *data); 234static void (*atkbd_platform_fixup)(struct atkbd *, const void *data);
235static void *atkbd_platform_fixup_data; 235static void *atkbd_platform_fixup_data;
236static unsigned int (*atkbd_platform_scancode_fixup)(struct atkbd *, unsigned int);
236 237
237static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf, 238static ssize_t atkbd_attr_show_helper(struct device *dev, char *buf,
238 ssize_t (*handler)(struct atkbd *, char *)); 239 ssize_t (*handler)(struct atkbd *, char *));
@@ -393,6 +394,9 @@ static irqreturn_t atkbd_interrupt(struct serio *serio, unsigned char data,
393 394
394 input_event(dev, EV_MSC, MSC_RAW, code); 395 input_event(dev, EV_MSC, MSC_RAW, code);
395 396
397 if (atkbd_platform_scancode_fixup)
398 code = atkbd_platform_scancode_fixup(atkbd, code);
399
396 if (atkbd->translated) { 400 if (atkbd->translated) {
397 401
398 if (atkbd->emul || atkbd_need_xlate(atkbd->xl_bit, code)) { 402 if (atkbd->emul || atkbd_need_xlate(atkbd->xl_bit, code)) {
@@ -574,11 +578,22 @@ static void atkbd_event_work(struct work_struct *work)
574 578
575 mutex_lock(&atkbd->event_mutex); 579 mutex_lock(&atkbd->event_mutex);
576 580
577 if (test_and_clear_bit(ATKBD_LED_EVENT_BIT, &atkbd->event_mask)) 581 if (!atkbd->enabled) {
578 atkbd_set_leds(atkbd); 582 /*
583 * Serio ports are resumed asynchronously so while driver core
584 * thinks that device is already fully operational in reality
585 * it may not be ready yet. In this case we need to keep
586 * rescheduling till reconnect completes.
587 */
588 schedule_delayed_work(&atkbd->event_work,
589 msecs_to_jiffies(100));
590 } else {
591 if (test_and_clear_bit(ATKBD_LED_EVENT_BIT, &atkbd->event_mask))
592 atkbd_set_leds(atkbd);
579 593
580 if (test_and_clear_bit(ATKBD_REP_EVENT_BIT, &atkbd->event_mask)) 594 if (test_and_clear_bit(ATKBD_REP_EVENT_BIT, &atkbd->event_mask))
581 atkbd_set_repeat_rate(atkbd); 595 atkbd_set_repeat_rate(atkbd);
596 }
582 597
583 mutex_unlock(&atkbd->event_mutex); 598 mutex_unlock(&atkbd->event_mutex);
584} 599}
@@ -770,6 +785,30 @@ static int atkbd_select_set(struct atkbd *atkbd, int target_set, int allow_extra
770 return 3; 785 return 3;
771} 786}
772 787
788static int atkbd_reset_state(struct atkbd *atkbd)
789{
790 struct ps2dev *ps2dev = &atkbd->ps2dev;
791 unsigned char param[1];
792
793/*
794 * Set the LEDs to a predefined state (all off).
795 */
796
797 param[0] = 0;
798 if (ps2_command(ps2dev, param, ATKBD_CMD_SETLEDS))
799 return -1;
800
801/*
802 * Set autorepeat to fastest possible.
803 */
804
805 param[0] = 0;
806 if (ps2_command(ps2dev, param, ATKBD_CMD_SETREP))
807 return -1;
808
809 return 0;
810}
811
773static int atkbd_activate(struct atkbd *atkbd) 812static int atkbd_activate(struct atkbd *atkbd)
774{ 813{
775 struct ps2dev *ps2dev = &atkbd->ps2dev; 814 struct ps2dev *ps2dev = &atkbd->ps2dev;
@@ -852,29 +891,6 @@ static unsigned int atkbd_hp_forced_release_keys[] = {
852}; 891};
853 892
854/* 893/*
855 * Inventec system with broken key release on volume keys
856 */
857static unsigned int atkbd_inventec_forced_release_keys[] = {
858 0xae, 0xb0, -1U
859};
860
861/*
862 * Perform fixup for HP Pavilion ZV6100 laptop that doesn't generate release
863 * for its volume buttons
864 */
865static unsigned int atkbd_hp_zv6100_forced_release_keys[] = {
866 0xae, 0xb0, -1U
867};
868
869/*
870 * Perform fixup for HP (Compaq) Presario R4000 R4100 R4200 that don't generate
871 * release for their volume buttons
872 */
873static unsigned int atkbd_hp_r4000_forced_release_keys[] = {
874 0xae, 0xb0, -1U
875};
876
877/*
878 * Samsung NC10,NC20 with Fn+F? key release not working 894 * Samsung NC10,NC20 with Fn+F? key release not working
879 */ 895 */
880static unsigned int atkbd_samsung_forced_release_keys[] = { 896static unsigned int atkbd_samsung_forced_release_keys[] = {
@@ -882,14 +898,6 @@ static unsigned int atkbd_samsung_forced_release_keys[] = {
882}; 898};
883 899
884/* 900/*
885 * The volume up and volume down special keys on a Fujitsu Amilo PA 1510 laptop
886 * do not generate release events so we have to do it ourselves.
887 */
888static unsigned int atkbd_amilo_pa1510_forced_release_keys[] = {
889 0xb0, 0xae, -1U
890};
891
892/*
893 * Amilo Pi 3525 key release for Fn+Volume keys not working 901 * Amilo Pi 3525 key release for Fn+Volume keys not working
894 */ 902 */
895static unsigned int atkbd_amilo_pi3525_forced_release_keys[] = { 903static unsigned int atkbd_amilo_pi3525_forced_release_keys[] = {
@@ -911,6 +919,30 @@ static unsigned int atkdb_soltech_ta12_forced_release_keys[] = {
911}; 919};
912 920
913/* 921/*
922 * Many notebooks don't send key release event for volume up/down
923 * keys, with key list below common among them
924 */
925static unsigned int atkbd_volume_forced_release_keys[] = {
926 0xae, 0xb0, -1U
927};
928
929/*
930 * OQO 01+ multimedia keys (64--66) generate e0 6x upon release whereas
931 * they should be generating e4-e6 (0x80 | code).
932 */
933static unsigned int atkbd_oqo_01plus_scancode_fixup(struct atkbd *atkbd,
934 unsigned int code)
935{
936 if (atkbd->translated && atkbd->emul == 1 &&
937 (code == 0x64 || code == 0x65 || code == 0x66)) {
938 atkbd->emul = 0;
939 code |= 0x80;
940 }
941
942 return code;
943}
944
945/*
914 * atkbd_set_keycode_table() initializes keyboard's keycode table 946 * atkbd_set_keycode_table() initializes keyboard's keycode table
915 * according to the selected scancode set 947 * according to the selected scancode set
916 */ 948 */
@@ -1087,6 +1119,7 @@ static int atkbd_connect(struct serio *serio, struct serio_driver *drv)
1087 } 1119 }
1088 1120
1089 atkbd->set = atkbd_select_set(atkbd, atkbd_set, atkbd_extra); 1121 atkbd->set = atkbd_select_set(atkbd, atkbd_set, atkbd_extra);
1122 atkbd_reset_state(atkbd);
1090 atkbd_activate(atkbd); 1123 atkbd_activate(atkbd);
1091 1124
1092 } else { 1125 } else {
@@ -1141,6 +1174,18 @@ static int atkbd_reconnect(struct serio *serio)
1141 return -1; 1174 return -1;
1142 1175
1143 atkbd_activate(atkbd); 1176 atkbd_activate(atkbd);
1177
1178 /*
1179 * Restore LED state and repeat rate. While input core
1180 * will do this for us at resume time reconnect may happen
1181 * because user requested it via sysfs or simply because
1182 * keyboard was unplugged and plugged in again so we need
1183 * to do it ourselves here.
1184 */
1185 atkbd_set_leds(atkbd);
1186 if (!atkbd->softrepeat)
1187 atkbd_set_repeat_rate(atkbd);
1188
1144 } 1189 }
1145 1190
1146 atkbd_enable(atkbd); 1191 atkbd_enable(atkbd);
@@ -1267,6 +1312,7 @@ static ssize_t atkbd_set_extra(struct atkbd *atkbd, const char *buf, size_t coun
1267 1312
1268 atkbd->dev = new_dev; 1313 atkbd->dev = new_dev;
1269 atkbd->set = atkbd_select_set(atkbd, atkbd->set, value); 1314 atkbd->set = atkbd_select_set(atkbd, atkbd->set, value);
1315 atkbd_reset_state(atkbd);
1270 atkbd_activate(atkbd); 1316 atkbd_activate(atkbd);
1271 atkbd_set_keycode_table(atkbd); 1317 atkbd_set_keycode_table(atkbd);
1272 atkbd_set_device_attrs(atkbd); 1318 atkbd_set_device_attrs(atkbd);
@@ -1388,6 +1434,7 @@ static ssize_t atkbd_set_set(struct atkbd *atkbd, const char *buf, size_t count)
1388 1434
1389 atkbd->dev = new_dev; 1435 atkbd->dev = new_dev;
1390 atkbd->set = atkbd_select_set(atkbd, value, atkbd->extra); 1436 atkbd->set = atkbd_select_set(atkbd, value, atkbd->extra);
1437 atkbd_reset_state(atkbd);
1391 atkbd_activate(atkbd); 1438 atkbd_activate(atkbd);
1392 atkbd_set_keycode_table(atkbd); 1439 atkbd_set_keycode_table(atkbd);
1393 atkbd_set_device_attrs(atkbd); 1440 atkbd_set_device_attrs(atkbd);
@@ -1513,6 +1560,13 @@ static int __init atkbd_setup_forced_release(const struct dmi_system_id *id)
1513 return 0; 1560 return 0;
1514} 1561}
1515 1562
1563static int __init atkbd_setup_scancode_fixup(const struct dmi_system_id *id)
1564{
1565 atkbd_platform_scancode_fixup = id->driver_data;
1566
1567 return 0;
1568}
1569
1516static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = { 1570static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
1517 { 1571 {
1518 .ident = "Dell Laptop", 1572 .ident = "Dell Laptop",
@@ -1548,7 +1602,7 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
1548 DMI_MATCH(DMI_PRODUCT_NAME, "Pavilion ZV6100"), 1602 DMI_MATCH(DMI_PRODUCT_NAME, "Pavilion ZV6100"),
1549 }, 1603 },
1550 .callback = atkbd_setup_forced_release, 1604 .callback = atkbd_setup_forced_release,
1551 .driver_data = atkbd_hp_zv6100_forced_release_keys, 1605 .driver_data = atkbd_volume_forced_release_keys,
1552 }, 1606 },
1553 { 1607 {
1554 .ident = "HP Presario R4000", 1608 .ident = "HP Presario R4000",
@@ -1557,7 +1611,7 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
1557 DMI_MATCH(DMI_PRODUCT_NAME, "Presario R4000"), 1611 DMI_MATCH(DMI_PRODUCT_NAME, "Presario R4000"),
1558 }, 1612 },
1559 .callback = atkbd_setup_forced_release, 1613 .callback = atkbd_setup_forced_release,
1560 .driver_data = atkbd_hp_r4000_forced_release_keys, 1614 .driver_data = atkbd_volume_forced_release_keys,
1561 }, 1615 },
1562 { 1616 {
1563 .ident = "HP Presario R4100", 1617 .ident = "HP Presario R4100",
@@ -1566,7 +1620,7 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
1566 DMI_MATCH(DMI_PRODUCT_NAME, "Presario R4100"), 1620 DMI_MATCH(DMI_PRODUCT_NAME, "Presario R4100"),
1567 }, 1621 },
1568 .callback = atkbd_setup_forced_release, 1622 .callback = atkbd_setup_forced_release,
1569 .driver_data = atkbd_hp_r4000_forced_release_keys, 1623 .driver_data = atkbd_volume_forced_release_keys,
1570 }, 1624 },
1571 { 1625 {
1572 .ident = "HP Presario R4200", 1626 .ident = "HP Presario R4200",
@@ -1575,7 +1629,7 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
1575 DMI_MATCH(DMI_PRODUCT_NAME, "Presario R4200"), 1629 DMI_MATCH(DMI_PRODUCT_NAME, "Presario R4200"),
1576 }, 1630 },
1577 .callback = atkbd_setup_forced_release, 1631 .callback = atkbd_setup_forced_release,
1578 .driver_data = atkbd_hp_r4000_forced_release_keys, 1632 .driver_data = atkbd_volume_forced_release_keys,
1579 }, 1633 },
1580 { 1634 {
1581 .ident = "Inventec Symphony", 1635 .ident = "Inventec Symphony",
@@ -1584,7 +1638,7 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
1584 DMI_MATCH(DMI_PRODUCT_NAME, "SYMPHONY 6.0/7.0"), 1638 DMI_MATCH(DMI_PRODUCT_NAME, "SYMPHONY 6.0/7.0"),
1585 }, 1639 },
1586 .callback = atkbd_setup_forced_release, 1640 .callback = atkbd_setup_forced_release,
1587 .driver_data = atkbd_inventec_forced_release_keys, 1641 .driver_data = atkbd_volume_forced_release_keys,
1588 }, 1642 },
1589 { 1643 {
1590 .ident = "Samsung NC10", 1644 .ident = "Samsung NC10",
@@ -1620,7 +1674,7 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
1620 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Pa 1510"), 1674 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Pa 1510"),
1621 }, 1675 },
1622 .callback = atkbd_setup_forced_release, 1676 .callback = atkbd_setup_forced_release,
1623 .driver_data = atkbd_amilo_pa1510_forced_release_keys, 1677 .driver_data = atkbd_volume_forced_release_keys,
1624 }, 1678 },
1625 { 1679 {
1626 .ident = "Fujitsu Amilo Pi 3525", 1680 .ident = "Fujitsu Amilo Pi 3525",
@@ -1649,6 +1703,15 @@ static struct dmi_system_id atkbd_dmi_quirk_table[] __initdata = {
1649 .callback = atkbd_setup_forced_release, 1703 .callback = atkbd_setup_forced_release,
1650 .driver_data = atkdb_soltech_ta12_forced_release_keys, 1704 .driver_data = atkdb_soltech_ta12_forced_release_keys,
1651 }, 1705 },
1706 {
1707 .ident = "OQO Model 01+",
1708 .matches = {
1709 DMI_MATCH(DMI_SYS_VENDOR, "OQO"),
1710 DMI_MATCH(DMI_PRODUCT_NAME, "ZEPTO"),
1711 },
1712 .callback = atkbd_setup_scancode_fixup,
1713 .driver_data = atkbd_oqo_01plus_scancode_fixup,
1714 },
1652 { } 1715 { }
1653}; 1716};
1654 1717
diff --git a/drivers/input/keyboard/gpio_keys.c b/drivers/input/keyboard/gpio_keys.c
index a88aff3816a0..77d130914259 100644
--- a/drivers/input/keyboard/gpio_keys.c
+++ b/drivers/input/keyboard/gpio_keys.c
@@ -147,6 +147,7 @@ static int __devinit gpio_keys_probe(struct platform_device *pdev)
147 } 147 }
148 148
149 error = request_irq(irq, gpio_keys_isr, 149 error = request_irq(irq, gpio_keys_isr,
150 IRQF_SHARED |
150 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 151 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
151 button->desc ? button->desc : "gpio_keys", 152 button->desc ? button->desc : "gpio_keys",
152 bdata); 153 bdata);
diff --git a/drivers/input/misc/Kconfig b/drivers/input/misc/Kconfig
index 02f4f8f1db6f..a9bb2544b2de 100644
--- a/drivers/input/misc/Kconfig
+++ b/drivers/input/misc/Kconfig
@@ -227,6 +227,7 @@ config INPUT_WINBOND_CIR
227 depends on X86 && PNP 227 depends on X86 && PNP
228 select NEW_LEDS 228 select NEW_LEDS
229 select LEDS_CLASS 229 select LEDS_CLASS
230 select LEDS_TRIGGERS
230 select BITREVERSE 231 select BITREVERSE
231 help 232 help
232 Say Y here if you want to use the IR remote functionality found 233 Say Y here if you want to use the IR remote functionality found
diff --git a/drivers/input/misc/hp_sdc_rtc.c b/drivers/input/misc/hp_sdc_rtc.c
index 216a559f55ea..ea821b546969 100644
--- a/drivers/input/misc/hp_sdc_rtc.c
+++ b/drivers/input/misc/hp_sdc_rtc.c
@@ -209,7 +209,7 @@ static inline int hp_sdc_rtc_read_rt(struct timeval *res) {
209 209
210/* Read the i8042 fast handshake timer */ 210/* Read the i8042 fast handshake timer */
211static inline int hp_sdc_rtc_read_fhs(struct timeval *res) { 211static inline int hp_sdc_rtc_read_fhs(struct timeval *res) {
212 uint64_t raw; 212 int64_t raw;
213 unsigned int tenms; 213 unsigned int tenms;
214 214
215 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2); 215 raw = hp_sdc_rtc_read_i8042timer(HP_SDC_CMD_LOAD_FHS, 2);
diff --git a/drivers/input/mouse/lifebook.c b/drivers/input/mouse/lifebook.c
index 5e6308694408..82811558ec33 100644
--- a/drivers/input/mouse/lifebook.c
+++ b/drivers/input/mouse/lifebook.c
@@ -107,8 +107,7 @@ static const struct dmi_system_id lifebook_dmi_table[] = {
107 .matches = { 107 .matches = {
108 DMI_MATCH(DMI_PRODUCT_NAME, "CF-72"), 108 DMI_MATCH(DMI_PRODUCT_NAME, "CF-72"),
109 }, 109 },
110 .callback = lifebook_set_serio_phys, 110 .callback = lifebook_set_6byte_proto,
111 .driver_data = "isa0060/serio3",
112 }, 111 },
113 { 112 {
114 .ident = "Lifebook B142", 113 .ident = "Lifebook B142",
diff --git a/drivers/input/mouse/logips2pp.c b/drivers/input/mouse/logips2pp.c
index de745d751162..ab5dc5f5fd83 100644
--- a/drivers/input/mouse/logips2pp.c
+++ b/drivers/input/mouse/logips2pp.c
@@ -219,7 +219,7 @@ static const struct ps2pp_info *get_model_info(unsigned char model)
219 PS2PP_WHEEL | PS2PP_SIDE_BTN | PS2PP_TASK_BTN | 219 PS2PP_WHEEL | PS2PP_SIDE_BTN | PS2PP_TASK_BTN |
220 PS2PP_EXTRA_BTN | PS2PP_NAV_BTN | PS2PP_HWHEEL }, 220 PS2PP_EXTRA_BTN | PS2PP_NAV_BTN | PS2PP_HWHEEL },
221 { 72, PS2PP_KIND_TRACKMAN, 0 }, /* T-CH11: TrackMan Marble */ 221 { 72, PS2PP_KIND_TRACKMAN, 0 }, /* T-CH11: TrackMan Marble */
222 { 73, 0, PS2PP_SIDE_BTN }, 222 { 73, PS2PP_KIND_TRACKMAN, PS2PP_SIDE_BTN }, /* TrackMan FX */
223 { 75, PS2PP_KIND_WHEEL, PS2PP_WHEEL }, 223 { 75, PS2PP_KIND_WHEEL, PS2PP_WHEEL },
224 { 76, PS2PP_KIND_WHEEL, PS2PP_WHEEL }, 224 { 76, PS2PP_KIND_WHEEL, PS2PP_WHEEL },
225 { 79, PS2PP_KIND_TRACKMAN, PS2PP_WHEEL }, /* TrackMan with wheel */ 225 { 79, PS2PP_KIND_TRACKMAN, PS2PP_WHEEL }, /* TrackMan with wheel */
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
index 690aed905436..07c53798301a 100644
--- a/drivers/input/mouse/psmouse-base.c
+++ b/drivers/input/mouse/psmouse-base.c
@@ -581,7 +581,7 @@ static int cortron_detect(struct psmouse *psmouse, bool set_properties)
581static int psmouse_extensions(struct psmouse *psmouse, 581static int psmouse_extensions(struct psmouse *psmouse,
582 unsigned int max_proto, bool set_properties) 582 unsigned int max_proto, bool set_properties)
583{ 583{
584 bool synaptics_hardware = true; 584 bool synaptics_hardware = false;
585 585
586/* 586/*
587 * We always check for lifebook because it does not disturb mouse 587 * We always check for lifebook because it does not disturb mouse
@@ -1673,7 +1673,7 @@ static int psmouse_get_maxproto(char *buffer, struct kernel_param *kp)
1673{ 1673{
1674 int type = *((unsigned int *)kp->arg); 1674 int type = *((unsigned int *)kp->arg);
1675 1675
1676 return sprintf(buffer, "%s\n", psmouse_protocol_by_type(type)->name); 1676 return sprintf(buffer, "%s", psmouse_protocol_by_type(type)->name);
1677} 1677}
1678 1678
1679static int __init psmouse_init(void) 1679static int __init psmouse_init(void)
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index b66ff1ac7dea..f4a61252bcc9 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -652,6 +652,16 @@ static const struct dmi_system_id toshiba_dmi_table[] = {
652 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"), 652 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
653 DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M300"), 653 DMI_MATCH(DMI_PRODUCT_NAME, "PORTEGE M300"),
654 }, 654 },
655
656 },
657 {
658 .ident = "Toshiba Portege M300",
659 .matches = {
660 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
661 DMI_MATCH(DMI_PRODUCT_NAME, "Portable PC"),
662 DMI_MATCH(DMI_PRODUCT_VERSION, "Version 1.0"),
663 },
664
655 }, 665 },
656 { } 666 { }
657}; 667};
diff --git a/drivers/input/serio/i8042-x86ia64io.h b/drivers/input/serio/i8042-x86ia64io.h
index a39bc4eb902b..a537925f7651 100644
--- a/drivers/input/serio/i8042-x86ia64io.h
+++ b/drivers/input/serio/i8042-x86ia64io.h
@@ -327,6 +327,17 @@ static struct dmi_system_id __initdata i8042_dmi_nomux_table[] = {
327 }, 327 },
328 }, 328 },
329 { 329 {
330 /*
331 * Reset and GET ID commands issued via KBD port are
332 * sometimes being delivered to AUX3.
333 */
334 .ident = "Sony Vaio FZ-240E",
335 .matches = {
336 DMI_MATCH(DMI_SYS_VENDOR, "Sony Corporation"),
337 DMI_MATCH(DMI_PRODUCT_NAME, "VGN-FZ240E"),
338 },
339 },
340 {
330 .ident = "Amoi M636/A737", 341 .ident = "Amoi M636/A737",
331 .matches = { 342 .matches = {
332 DMI_MATCH(DMI_SYS_VENDOR, "Amoi Electronics CO.,LTD."), 343 DMI_MATCH(DMI_SYS_VENDOR, "Amoi Electronics CO.,LTD."),
@@ -661,7 +672,7 @@ static void i8042_pnp_exit(void)
661static int __init i8042_pnp_init(void) 672static int __init i8042_pnp_init(void)
662{ 673{
663 char kbd_irq_str[4] = { 0 }, aux_irq_str[4] = { 0 }; 674 char kbd_irq_str[4] = { 0 }, aux_irq_str[4] = { 0 };
664 int pnp_data_busted = false; 675 bool pnp_data_busted = false;
665 int err; 676 int err;
666 677
667#ifdef CONFIG_X86 678#ifdef CONFIG_X86
diff --git a/drivers/input/serio/i8042.c b/drivers/input/serio/i8042.c
index a31578170ccc..1df02d25aca5 100644
--- a/drivers/input/serio/i8042.c
+++ b/drivers/input/serio/i8042.c
@@ -836,17 +836,32 @@ static int i8042_controller_selftest(void)
836static int i8042_controller_init(void) 836static int i8042_controller_init(void)
837{ 837{
838 unsigned long flags; 838 unsigned long flags;
839 int n = 0;
840 unsigned char ctr[2];
839 841
840/* 842/*
841 * Save the CTR for restoral on unload / reboot. 843 * Save the CTR for restore on unload / reboot.
842 */ 844 */
843 845
844 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { 846 do {
845 printk(KERN_ERR "i8042.c: Can't read CTR while initializing i8042.\n"); 847 if (n >= 10) {
846 return -EIO; 848 printk(KERN_ERR
847 } 849 "i8042.c: Unable to get stable CTR read.\n");
850 return -EIO;
851 }
852
853 if (n != 0)
854 udelay(50);
855
856 if (i8042_command(&ctr[n++ % 2], I8042_CMD_CTL_RCTR)) {
857 printk(KERN_ERR
858 "i8042.c: Can't read CTR while initializing i8042.\n");
859 return -EIO;
860 }
848 861
849 i8042_initial_ctr = i8042_ctr; 862 } while (n < 2 || ctr[0] != ctr[1]);
863
864 i8042_initial_ctr = i8042_ctr = ctr[0];
850 865
851/* 866/*
852 * Disable the keyboard interface and interrupt. 867 * Disable the keyboard interface and interrupt.
@@ -895,6 +910,12 @@ static int i8042_controller_init(void)
895 return -EIO; 910 return -EIO;
896 } 911 }
897 912
913/*
914 * Flush whatever accumulated while we were disabling keyboard port.
915 */
916
917 i8042_flush();
918
898 return 0; 919 return 0;
899} 920}
900 921
@@ -914,7 +935,7 @@ static void i8042_controller_reset(void)
914 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS; 935 i8042_ctr |= I8042_CTR_KBDDIS | I8042_CTR_AUXDIS;
915 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT); 936 i8042_ctr &= ~(I8042_CTR_KBDINT | I8042_CTR_AUXINT);
916 937
917 if (i8042_command(&i8042_initial_ctr, I8042_CMD_CTL_WCTR)) 938 if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR))
918 printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n"); 939 printk(KERN_WARNING "i8042.c: Can't write CTR while resetting.\n");
919 940
920/* 941/*
diff --git a/drivers/isdn/hardware/eicon/maintidi.c b/drivers/isdn/hardware/eicon/maintidi.c
index 23960cb6eaab..41c26e756452 100644
--- a/drivers/isdn/hardware/eicon/maintidi.c
+++ b/drivers/isdn/hardware/eicon/maintidi.c
@@ -959,8 +959,9 @@ static int process_idi_event (diva_strace_context_t* pLib,
959 } 959 }
960 if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) { 960 if (!strncmp("State\\Layer2 No1", path, pVar->path_length)) {
961 char* tmp = &pLib->lines[0].pInterface->Layer2[0]; 961 char* tmp = &pLib->lines[0].pInterface->Layer2[0];
962 dword l2_state; 962 dword l2_state;
963 diva_strace_read_uint (pVar, &l2_state); 963 if (diva_strace_read_uint(pVar, &l2_state))
964 return -1;
964 965
965 switch (l2_state) { 966 switch (l2_state) {
966 case 0: 967 case 0:
diff --git a/drivers/isdn/hardware/eicon/message.c b/drivers/isdn/hardware/eicon/message.c
index 27d5dd68f4fb..ae89fb89da64 100644
--- a/drivers/isdn/hardware/eicon/message.c
+++ b/drivers/isdn/hardware/eicon/message.c
@@ -2692,7 +2692,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2692 if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS) 2692 if (!(fax_control_bits & T30_CONTROL_BIT_MORE_DOCUMENTS)
2693 || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS)) 2693 || (fax_feature_bits & T30_FEATURE_BIT_MORE_DOCUMENTS))
2694 { 2694 {
2695 len = (byte)(&(((T30_INFO *) 0)->universal_6)); 2695 len = offsetof(T30_INFO, universal_6);
2696 fax_info_change = false; 2696 fax_info_change = false;
2697 if (ncpi->length >= 4) 2697 if (ncpi->length >= 4)
2698 { 2698 {
@@ -2754,7 +2754,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2754 for (i = 0; i < w; i++) 2754 for (i = 0; i < w; i++)
2755 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i]; 2755 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id[i] = fax_parms[4].info[1+i];
2756 ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0; 2756 ((T30_INFO *)(plci->fax_connect_info_buffer))->head_line_len = 0;
2757 len = (byte)(((T30_INFO *) 0)->station_id + 20); 2757 len = offsetof(T30_INFO, station_id) + 20;
2758 w = fax_parms[5].length; 2758 w = fax_parms[5].length;
2759 if (w > 20) 2759 if (w > 20)
2760 w = 20; 2760 w = 20;
@@ -2788,7 +2788,7 @@ static byte connect_b3_req(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2788 } 2788 }
2789 else 2789 else
2790 { 2790 {
2791 len = (byte)(&(((T30_INFO *) 0)->universal_6)); 2791 len = offsetof(T30_INFO, universal_6);
2792 } 2792 }
2793 fax_info_change = true; 2793 fax_info_change = true;
2794 2794
@@ -2892,7 +2892,7 @@ static byte connect_b3_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
2892 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF) 2892 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_ENABLE_NSF)
2893 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP)) 2893 && (plci->nsf_control_bits & T30_NSF_CONTROL_BIT_NEGOTIATE_RESP))
2894 { 2894 {
2895 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 2895 len = offsetof(T30_INFO, station_id) + 20;
2896 if (plci->fax_connect_info_length < len) 2896 if (plci->fax_connect_info_length < len)
2897 { 2897 {
2898 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; 2898 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
@@ -3802,7 +3802,7 @@ static byte manufacturer_res(dword Id, word Number, DIVA_CAPI_ADAPTER *a,
3802 break; 3802 break;
3803 } 3803 }
3804 ncpi = &m_parms[1]; 3804 ncpi = &m_parms[1];
3805 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 3805 len = offsetof(T30_INFO, station_id) + 20;
3806 if (plci->fax_connect_info_length < len) 3806 if (plci->fax_connect_info_length < len)
3807 { 3807 {
3808 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0; 3808 ((T30_INFO *)(plci->fax_connect_info_buffer))->station_id_len = 0;
@@ -6844,7 +6844,7 @@ static void nl_ind(PLCI *plci)
6844 if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1]) 6844 if ((plci->requested_options_conn | plci->requested_options | a->requested_options_table[plci->appl->Id-1])
6845 & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD))) 6845 & ((1L << PRIVATE_FAX_SUB_SEP_PWD) | (1L << PRIVATE_FAX_NONSTANDARD)))
6846 { 6846 {
6847 i = ((word)(((T30_INFO *) 0)->station_id + 20)) + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len; 6847 i = offsetof(T30_INFO, station_id) + 20 + ((T30_INFO *)plci->NL.RBuffer->P)->head_line_len;
6848 while (i < plci->NL.RBuffer->length) 6848 while (i < plci->NL.RBuffer->length)
6849 plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++]; 6849 plci->ncpi_buffer[++len] = plci->NL.RBuffer->P[i++];
6850 } 6850 }
@@ -7236,7 +7236,7 @@ static void nl_ind(PLCI *plci)
7236 { 7236 {
7237 plci->RData[1].P = plci->RData[0].P; 7237 plci->RData[1].P = plci->RData[0].P;
7238 plci->RData[1].PLength = plci->RData[0].PLength; 7238 plci->RData[1].PLength = plci->RData[0].PLength;
7239 plci->RData[0].P = v120_header_buffer + (-((int) v120_header_buffer) & 3); 7239 plci->RData[0].P = v120_header_buffer + (-((unsigned long)v120_header_buffer) & 3);
7240 if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1)) 7240 if ((plci->NL.RBuffer->P[0] & V120_HEADER_EXTEND_BIT) || (plci->NL.RLength == 1))
7241 plci->RData[0].PLength = 1; 7241 plci->RData[0].PLength = 1;
7242 else 7242 else
@@ -8473,7 +8473,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
8473 fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING; 8473 fax_control_bits |= T30_CONTROL_BIT_ACCEPT_SEL_POLLING;
8474 } 8474 }
8475 len = nlc[0]; 8475 len = nlc[0];
8476 pos = ((byte)(((T30_INFO *) 0)->station_id + 20)); 8476 pos = offsetof(T30_INFO, station_id) + 20;
8477 if (pos < plci->fax_connect_info_length) 8477 if (pos < plci->fax_connect_info_length)
8478 { 8478 {
8479 for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--) 8479 for (i = 1 + plci->fax_connect_info_buffer[pos]; i != 0; i--)
@@ -8525,7 +8525,7 @@ static word add_b23(PLCI *plci, API_PARSE *bp)
8525 } 8525 }
8526 8526
8527 PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits); 8527 PUT_WORD(&(((T30_INFO *)&nlc[1])->control_bits_low), fax_control_bits);
8528 len = ((byte)(((T30_INFO *) 0)->station_id + 20)); 8528 len = offsetof(T30_INFO, station_id) + 20;
8529 for (i = 0; i < len; i++) 8529 for (i = 0; i < len; i++)
8530 plci->fax_connect_info_buffer[i] = nlc[1+i]; 8530 plci->fax_connect_info_buffer[i] = nlc[1+i];
8531 ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0; 8531 ((T30_INFO *) plci->fax_connect_info_buffer)->head_line_len = 0;
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c
index faed794cf75a..a6624ad252c5 100644
--- a/drivers/isdn/hardware/mISDN/hfcmulti.c
+++ b/drivers/isdn/hardware/mISDN/hfcmulti.c
@@ -5481,7 +5481,7 @@ HFCmulti_init(void)
5481 if (err) { 5481 if (err) {
5482 printk(KERN_ERR "error registering embedded driver: " 5482 printk(KERN_ERR "error registering embedded driver: "
5483 "%x\n", err); 5483 "%x\n", err);
5484 return -err; 5484 return err;
5485 } 5485 }
5486 HFC_cnt++; 5486 HFC_cnt++;
5487 printk(KERN_INFO "%d devices registered\n", HFC_cnt); 5487 printk(KERN_INFO "%d devices registered\n", HFC_cnt);
diff --git a/drivers/isdn/hisax/amd7930_fn.c b/drivers/isdn/hisax/amd7930_fn.c
index bf526a7a63af..d6fdf1f66754 100644
--- a/drivers/isdn/hisax/amd7930_fn.c
+++ b/drivers/isdn/hisax/amd7930_fn.c
@@ -594,6 +594,7 @@ Amd7930_l1hw(struct PStack *st, int pr, void *arg)
594 if (cs->debug & L1_DEB_WARN) 594 if (cs->debug & L1_DEB_WARN)
595 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen"); 595 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen");
596 skb_queue_tail(&cs->sq, skb); 596 skb_queue_tail(&cs->sq, skb);
597 spin_unlock_irqrestore(&cs->lock, flags);
597 break; 598 break;
598 } 599 }
599 if (cs->debug & DEB_DLOG_HEX) 600 if (cs->debug & DEB_DLOG_HEX)
diff --git a/drivers/isdn/hisax/diva.c b/drivers/isdn/hisax/diva.c
index 018bd293e580..0b0c2e5d806b 100644
--- a/drivers/isdn/hisax/diva.c
+++ b/drivers/isdn/hisax/diva.c
@@ -382,7 +382,7 @@ MemwaitforXFW(struct IsdnCardState *cs, int hscx)
382{ 382{
383 int to = 50; 383 int to = 50;
384 384
385 while ((!(MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { 385 while (((MemReadHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) {
386 udelay(1); 386 udelay(1);
387 to--; 387 to--;
388 } 388 }
diff --git a/drivers/isdn/hisax/elsa_ser.c b/drivers/isdn/hisax/elsa_ser.c
index f181db464392..1657bba7879e 100644
--- a/drivers/isdn/hisax/elsa_ser.c
+++ b/drivers/isdn/hisax/elsa_ser.c
@@ -477,62 +477,62 @@ static void
477modem_set_init(struct IsdnCardState *cs) { 477modem_set_init(struct IsdnCardState *cs) {
478 int timeout; 478 int timeout;
479 479
480#define RCV_DELAY 20000 480#define RCV_DELAY 20
481 modem_write_cmd(cs, MInit_1, strlen(MInit_1)); 481 modem_write_cmd(cs, MInit_1, strlen(MInit_1));
482 timeout = 1000; 482 timeout = 1000;
483 while(timeout-- && cs->hw.elsa.transcnt) 483 while(timeout-- && cs->hw.elsa.transcnt)
484 udelay(1000); 484 udelay(1000);
485 debugl1(cs, "msi tout=%d", timeout); 485 debugl1(cs, "msi tout=%d", timeout);
486 udelay(RCV_DELAY); 486 mdelay(RCV_DELAY);
487 modem_write_cmd(cs, MInit_2, strlen(MInit_2)); 487 modem_write_cmd(cs, MInit_2, strlen(MInit_2));
488 timeout = 1000; 488 timeout = 1000;
489 while(timeout-- && cs->hw.elsa.transcnt) 489 while(timeout-- && cs->hw.elsa.transcnt)
490 udelay(1000); 490 udelay(1000);
491 debugl1(cs, "msi tout=%d", timeout); 491 debugl1(cs, "msi tout=%d", timeout);
492 udelay(RCV_DELAY); 492 mdelay(RCV_DELAY);
493 modem_write_cmd(cs, MInit_3, strlen(MInit_3)); 493 modem_write_cmd(cs, MInit_3, strlen(MInit_3));
494 timeout = 1000; 494 timeout = 1000;
495 while(timeout-- && cs->hw.elsa.transcnt) 495 while(timeout-- && cs->hw.elsa.transcnt)
496 udelay(1000); 496 udelay(1000);
497 debugl1(cs, "msi tout=%d", timeout); 497 debugl1(cs, "msi tout=%d", timeout);
498 udelay(RCV_DELAY); 498 mdelay(RCV_DELAY);
499 modem_write_cmd(cs, MInit_4, strlen(MInit_4)); 499 modem_write_cmd(cs, MInit_4, strlen(MInit_4));
500 timeout = 1000; 500 timeout = 1000;
501 while(timeout-- && cs->hw.elsa.transcnt) 501 while(timeout-- && cs->hw.elsa.transcnt)
502 udelay(1000); 502 udelay(1000);
503 debugl1(cs, "msi tout=%d", timeout); 503 debugl1(cs, "msi tout=%d", timeout);
504 udelay(RCV_DELAY ); 504 mdelay(RCV_DELAY);
505 modem_write_cmd(cs, MInit_5, strlen(MInit_5)); 505 modem_write_cmd(cs, MInit_5, strlen(MInit_5));
506 timeout = 1000; 506 timeout = 1000;
507 while(timeout-- && cs->hw.elsa.transcnt) 507 while(timeout-- && cs->hw.elsa.transcnt)
508 udelay(1000); 508 udelay(1000);
509 debugl1(cs, "msi tout=%d", timeout); 509 debugl1(cs, "msi tout=%d", timeout);
510 udelay(RCV_DELAY); 510 mdelay(RCV_DELAY);
511 modem_write_cmd(cs, MInit_6, strlen(MInit_6)); 511 modem_write_cmd(cs, MInit_6, strlen(MInit_6));
512 timeout = 1000; 512 timeout = 1000;
513 while(timeout-- && cs->hw.elsa.transcnt) 513 while(timeout-- && cs->hw.elsa.transcnt)
514 udelay(1000); 514 udelay(1000);
515 debugl1(cs, "msi tout=%d", timeout); 515 debugl1(cs, "msi tout=%d", timeout);
516 udelay(RCV_DELAY); 516 mdelay(RCV_DELAY);
517 modem_write_cmd(cs, MInit_7, strlen(MInit_7)); 517 modem_write_cmd(cs, MInit_7, strlen(MInit_7));
518 timeout = 1000; 518 timeout = 1000;
519 while(timeout-- && cs->hw.elsa.transcnt) 519 while(timeout-- && cs->hw.elsa.transcnt)
520 udelay(1000); 520 udelay(1000);
521 debugl1(cs, "msi tout=%d", timeout); 521 debugl1(cs, "msi tout=%d", timeout);
522 udelay(RCV_DELAY); 522 mdelay(RCV_DELAY);
523} 523}
524 524
525static void 525static void
526modem_set_dial(struct IsdnCardState *cs, int outgoing) { 526modem_set_dial(struct IsdnCardState *cs, int outgoing) {
527 int timeout; 527 int timeout;
528#define RCV_DELAY 20000 528#define RCV_DELAY 20
529 529
530 modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800)); 530 modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800));
531 timeout = 1000; 531 timeout = 1000;
532 while(timeout-- && cs->hw.elsa.transcnt) 532 while(timeout-- && cs->hw.elsa.transcnt)
533 udelay(1000); 533 udelay(1000);
534 debugl1(cs, "msi tout=%d", timeout); 534 debugl1(cs, "msi tout=%d", timeout);
535 udelay(RCV_DELAY); 535 mdelay(RCV_DELAY);
536 if (outgoing) 536 if (outgoing)
537 modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout)); 537 modem_write_cmd(cs, MInit_dialout, strlen(MInit_dialout));
538 else 538 else
@@ -541,7 +541,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) {
541 while(timeout-- && cs->hw.elsa.transcnt) 541 while(timeout-- && cs->hw.elsa.transcnt)
542 udelay(1000); 542 udelay(1000);
543 debugl1(cs, "msi tout=%d", timeout); 543 debugl1(cs, "msi tout=%d", timeout);
544 udelay(RCV_DELAY); 544 mdelay(RCV_DELAY);
545} 545}
546 546
547static void 547static void
diff --git a/drivers/isdn/hisax/hfc_usb.c b/drivers/isdn/hisax/hfc_usb.c
index 9de54202c90c..a420b64472e3 100644
--- a/drivers/isdn/hisax/hfc_usb.c
+++ b/drivers/isdn/hisax/hfc_usb.c
@@ -817,8 +817,8 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish)
817 } 817 }
818 /* we have a complete hdlc packet */ 818 /* we have a complete hdlc packet */
819 if (finish) { 819 if (finish) {
820 if ((!fifo->skbuff->data[fifo->skbuff->len - 1]) 820 if (fifo->skbuff->len > 3 &&
821 && (fifo->skbuff->len > 3)) { 821 !fifo->skbuff->data[fifo->skbuff->len - 1]) {
822 822
823 if (fifon == HFCUSB_D_RX) { 823 if (fifon == HFCUSB_D_RX) {
824 DBG(HFCUSB_DBG_DCHANNEL, 824 DBG(HFCUSB_DBG_DCHANNEL,
diff --git a/drivers/isdn/hisax/hscx_irq.c b/drivers/isdn/hisax/hscx_irq.c
index 7b1ad5e4ecda..2387d76c721a 100644
--- a/drivers/isdn/hisax/hscx_irq.c
+++ b/drivers/isdn/hisax/hscx_irq.c
@@ -32,7 +32,7 @@ waitforXFW(struct IsdnCardState *cs, int hscx)
32{ 32{
33 int to = 50; 33 int to = 50;
34 34
35 while ((!(READHSCX(cs, hscx, HSCX_STAR) & 0x44) == 0x40) && to) { 35 while (((READHSCX(cs, hscx, HSCX_STAR) & 0x44) != 0x40) && to) {
36 udelay(1); 36 udelay(1);
37 to--; 37 to--;
38 } 38 }
diff --git a/drivers/isdn/hisax/icc.c b/drivers/isdn/hisax/icc.c
index 9aba646ba221..c80cbb8a2ef9 100644
--- a/drivers/isdn/hisax/icc.c
+++ b/drivers/isdn/hisax/icc.c
@@ -468,6 +468,7 @@ ICC_l1hw(struct PStack *st, int pr, void *arg)
468 if (cs->debug & L1_DEB_WARN) 468 if (cs->debug & L1_DEB_WARN)
469 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); 469 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
470 skb_queue_tail(&cs->sq, skb); 470 skb_queue_tail(&cs->sq, skb);
471 spin_unlock_irqrestore(&cs->lock, flags);
471 break; 472 break;
472 } 473 }
473 if (cs->debug & DEB_DLOG_HEX) 474 if (cs->debug & DEB_DLOG_HEX)
diff --git a/drivers/isdn/i4l/isdn_net.h b/drivers/isdn/i4l/isdn_net.h
index 74032d0881ef..7511f08effa5 100644
--- a/drivers/isdn/i4l/isdn_net.h
+++ b/drivers/isdn/i4l/isdn_net.h
@@ -83,19 +83,19 @@ static __inline__ isdn_net_local * isdn_net_get_locked_lp(isdn_net_dev *nd)
83 83
84 spin_lock_irqsave(&nd->queue_lock, flags); 84 spin_lock_irqsave(&nd->queue_lock, flags);
85 lp = nd->queue; /* get lp on top of queue */ 85 lp = nd->queue; /* get lp on top of queue */
86 spin_lock(&nd->queue->xmit_lock);
87 while (isdn_net_lp_busy(nd->queue)) { 86 while (isdn_net_lp_busy(nd->queue)) {
88 spin_unlock(&nd->queue->xmit_lock);
89 nd->queue = nd->queue->next; 87 nd->queue = nd->queue->next;
90 if (nd->queue == lp) { /* not found -- should never happen */ 88 if (nd->queue == lp) { /* not found -- should never happen */
91 lp = NULL; 89 lp = NULL;
92 goto errout; 90 goto errout;
93 } 91 }
94 spin_lock(&nd->queue->xmit_lock);
95 } 92 }
96 lp = nd->queue; 93 lp = nd->queue;
97 nd->queue = nd->queue->next; 94 nd->queue = nd->queue->next;
95 spin_unlock_irqrestore(&nd->queue_lock, flags);
96 spin_lock(&lp->xmit_lock);
98 local_bh_disable(); 97 local_bh_disable();
98 return lp;
99errout: 99errout:
100 spin_unlock_irqrestore(&nd->queue_lock, flags); 100 spin_unlock_irqrestore(&nd->queue_lock, flags);
101 return lp; 101 return lp;
diff --git a/drivers/isdn/i4l/isdn_ppp.c b/drivers/isdn/i4l/isdn_ppp.c
index 2d14b64202a3..642d5aaf53ce 100644
--- a/drivers/isdn/i4l/isdn_ppp.c
+++ b/drivers/isdn/i4l/isdn_ppp.c
@@ -1535,10 +1535,8 @@ static int isdn_ppp_mp_bundle_array_init(void)
1535 int sz = ISDN_MAX_CHANNELS*sizeof(ippp_bundle); 1535 int sz = ISDN_MAX_CHANNELS*sizeof(ippp_bundle);
1536 if( (isdn_ppp_bundle_arr = kzalloc(sz, GFP_KERNEL)) == NULL ) 1536 if( (isdn_ppp_bundle_arr = kzalloc(sz, GFP_KERNEL)) == NULL )
1537 return -ENOMEM; 1537 return -ENOMEM;
1538 for (i = 0; i < ISDN_MAX_CHANNELS; i++) { 1538 for( i = 0; i < ISDN_MAX_CHANNELS; i++ )
1539 spin_lock_init(&isdn_ppp_bundle_arr[i].lock); 1539 spin_lock_init(&isdn_ppp_bundle_arr[i].lock);
1540 skb_queue_head_init(&isdn_ppp_bundle_arr[i].frags);
1541 }
1542 return 0; 1540 return 0;
1543} 1541}
1544 1542
@@ -1571,7 +1569,7 @@ static int isdn_ppp_mp_init( isdn_net_local * lp, ippp_bundle * add_to )
1571 if ((lp->netdev->pb = isdn_ppp_mp_bundle_alloc()) == NULL) 1569 if ((lp->netdev->pb = isdn_ppp_mp_bundle_alloc()) == NULL)
1572 return -ENOMEM; 1570 return -ENOMEM;
1573 lp->next = lp->last = lp; /* nobody else in a queue */ 1571 lp->next = lp->last = lp; /* nobody else in a queue */
1574 skb_queue_head_init(&lp->netdev->pb->frags); 1572 lp->netdev->pb->frags = NULL;
1575 lp->netdev->pb->frames = 0; 1573 lp->netdev->pb->frames = 0;
1576 lp->netdev->pb->seq = UINT_MAX; 1574 lp->netdev->pb->seq = UINT_MAX;
1577 } 1575 }
@@ -1583,29 +1581,28 @@ static int isdn_ppp_mp_init( isdn_net_local * lp, ippp_bundle * add_to )
1583 1581
1584static u32 isdn_ppp_mp_get_seq( int short_seq, 1582static u32 isdn_ppp_mp_get_seq( int short_seq,
1585 struct sk_buff * skb, u32 last_seq ); 1583 struct sk_buff * skb, u32 last_seq );
1586static void isdn_ppp_mp_discard(ippp_bundle *mp, struct sk_buff *from, 1584static struct sk_buff * isdn_ppp_mp_discard( ippp_bundle * mp,
1587 struct sk_buff *to); 1585 struct sk_buff * from, struct sk_buff * to );
1588static void isdn_ppp_mp_reassembly(isdn_net_dev *net_dev, isdn_net_local *lp, 1586static void isdn_ppp_mp_reassembly( isdn_net_dev * net_dev, isdn_net_local * lp,
1589 struct sk_buff *from, struct sk_buff *to, 1587 struct sk_buff * from, struct sk_buff * to );
1590 u32 lastseq); 1588static void isdn_ppp_mp_free_skb( ippp_bundle * mp, struct sk_buff * skb );
1591static void isdn_ppp_mp_free_skb(ippp_bundle *mp, struct sk_buff *skb);
1592static void isdn_ppp_mp_print_recv_pkt( int slot, struct sk_buff * skb ); 1589static void isdn_ppp_mp_print_recv_pkt( int slot, struct sk_buff * skb );
1593 1590
1594static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp, 1591static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1595 struct sk_buff *skb) 1592 struct sk_buff *skb)
1596{ 1593{
1597 struct sk_buff *newfrag, *frag, *start, *nextf;
1598 u32 newseq, minseq, thisseq;
1599 isdn_mppp_stats *stats;
1600 struct ippp_struct *is; 1594 struct ippp_struct *is;
1595 isdn_net_local * lpq;
1596 ippp_bundle * mp;
1597 isdn_mppp_stats * stats;
1598 struct sk_buff * newfrag, * frag, * start, *nextf;
1599 u32 newseq, minseq, thisseq;
1601 unsigned long flags; 1600 unsigned long flags;
1602 isdn_net_local *lpq;
1603 ippp_bundle *mp;
1604 int slot; 1601 int slot;
1605 1602
1606 spin_lock_irqsave(&net_dev->pb->lock, flags); 1603 spin_lock_irqsave(&net_dev->pb->lock, flags);
1607 mp = net_dev->pb; 1604 mp = net_dev->pb;
1608 stats = &mp->stats; 1605 stats = &mp->stats;
1609 slot = lp->ppp_slot; 1606 slot = lp->ppp_slot;
1610 if (slot < 0 || slot >= ISDN_MAX_CHANNELS) { 1607 if (slot < 0 || slot >= ISDN_MAX_CHANNELS) {
1611 printk(KERN_ERR "%s: lp->ppp_slot(%d)\n", 1608 printk(KERN_ERR "%s: lp->ppp_slot(%d)\n",
@@ -1616,19 +1613,20 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1616 return; 1613 return;
1617 } 1614 }
1618 is = ippp_table[slot]; 1615 is = ippp_table[slot];
1619 if (++mp->frames > stats->max_queue_len) 1616 if( ++mp->frames > stats->max_queue_len )
1620 stats->max_queue_len = mp->frames; 1617 stats->max_queue_len = mp->frames;
1621 1618
1622 if (is->debug & 0x8) 1619 if (is->debug & 0x8)
1623 isdn_ppp_mp_print_recv_pkt(lp->ppp_slot, skb); 1620 isdn_ppp_mp_print_recv_pkt(lp->ppp_slot, skb);
1624 1621
1625 newseq = isdn_ppp_mp_get_seq(is->mpppcfg & SC_IN_SHORT_SEQ, 1622 newseq = isdn_ppp_mp_get_seq(is->mpppcfg & SC_IN_SHORT_SEQ,
1626 skb, is->last_link_seqno); 1623 skb, is->last_link_seqno);
1624
1627 1625
1628 /* if this packet seq # is less than last already processed one, 1626 /* if this packet seq # is less than last already processed one,
1629 * toss it right away, but check for sequence start case first 1627 * toss it right away, but check for sequence start case first
1630 */ 1628 */
1631 if (mp->seq > MP_LONGSEQ_MAX && (newseq & MP_LONGSEQ_MAXBIT)) { 1629 if( mp->seq > MP_LONGSEQ_MAX && (newseq & MP_LONGSEQ_MAXBIT) ) {
1632 mp->seq = newseq; /* the first packet: required for 1630 mp->seq = newseq; /* the first packet: required for
1633 * rfc1990 non-compliant clients -- 1631 * rfc1990 non-compliant clients --
1634 * prevents constant packet toss */ 1632 * prevents constant packet toss */
@@ -1638,7 +1636,7 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1638 spin_unlock_irqrestore(&mp->lock, flags); 1636 spin_unlock_irqrestore(&mp->lock, flags);
1639 return; 1637 return;
1640 } 1638 }
1641 1639
1642 /* find the minimum received sequence number over all links */ 1640 /* find the minimum received sequence number over all links */
1643 is->last_link_seqno = minseq = newseq; 1641 is->last_link_seqno = minseq = newseq;
1644 for (lpq = net_dev->queue;;) { 1642 for (lpq = net_dev->queue;;) {
@@ -1659,31 +1657,22 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1659 * packets */ 1657 * packets */
1660 newfrag = skb; 1658 newfrag = skb;
1661 1659
1662 /* Insert new fragment into the proper sequence slot. */ 1660 /* if this new fragment is before the first one, then enqueue it now. */
1663 skb_queue_walk(&mp->frags, frag) { 1661 if ((frag = mp->frags) == NULL || MP_LT(newseq, MP_SEQ(frag))) {
1664 if (MP_SEQ(frag) == newseq) { 1662 newfrag->next = frag;
1665 isdn_ppp_mp_free_skb(mp, newfrag); 1663 mp->frags = frag = newfrag;
1666 newfrag = NULL; 1664 newfrag = NULL;
1667 break; 1665 }
1668 }
1669 if (MP_LT(newseq, MP_SEQ(frag))) {
1670 __skb_queue_before(&mp->frags, frag, newfrag);
1671 newfrag = NULL;
1672 break;
1673 }
1674 }
1675 if (newfrag)
1676 __skb_queue_tail(&mp->frags, newfrag);
1677 1666
1678 frag = skb_peek(&mp->frags); 1667 start = MP_FLAGS(frag) & MP_BEGIN_FRAG &&
1679 start = ((MP_FLAGS(frag) & MP_BEGIN_FRAG) && 1668 MP_SEQ(frag) == mp->seq ? frag : NULL;
1680 (MP_SEQ(frag) == mp->seq)) ? frag : NULL;
1681 if (!start)
1682 goto check_overflow;
1683 1669
1684 /* main fragment traversing loop 1670 /*
1671 * main fragment traversing loop
1685 * 1672 *
1686 * try to accomplish several tasks: 1673 * try to accomplish several tasks:
1674 * - insert new fragment into the proper sequence slot (once that's done
1675 * newfrag will be set to NULL)
1687 * - reassemble any complete fragment sequence (non-null 'start' 1676 * - reassemble any complete fragment sequence (non-null 'start'
1688 * indicates there is a continguous sequence present) 1677 * indicates there is a continguous sequence present)
1689 * - discard any incomplete sequences that are below minseq -- due 1678 * - discard any incomplete sequences that are below minseq -- due
@@ -1692,46 +1681,71 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1692 * come to complete such sequence and it should be discarded 1681 * come to complete such sequence and it should be discarded
1693 * 1682 *
1694 * loop completes when we accomplished the following tasks: 1683 * loop completes when we accomplished the following tasks:
1684 * - new fragment is inserted in the proper sequence ('newfrag' is
1685 * set to NULL)
1695 * - we hit a gap in the sequence, so no reassembly/processing is 1686 * - we hit a gap in the sequence, so no reassembly/processing is
1696 * possible ('start' would be set to NULL) 1687 * possible ('start' would be set to NULL)
1697 * 1688 *
1698 * algorithm for this code is derived from code in the book 1689 * algorithm for this code is derived from code in the book
1699 * 'PPP Design And Debugging' by James Carlson (Addison-Wesley) 1690 * 'PPP Design And Debugging' by James Carlson (Addison-Wesley)
1700 */ 1691 */
1701 skb_queue_walk_safe(&mp->frags, frag, nextf) { 1692 while (start != NULL || newfrag != NULL) {
1702 thisseq = MP_SEQ(frag); 1693
1703 1694 thisseq = MP_SEQ(frag);
1704 /* check for misplaced start */ 1695 nextf = frag->next;
1705 if (start != frag && (MP_FLAGS(frag) & MP_BEGIN_FRAG)) { 1696
1706 printk(KERN_WARNING"isdn_mppp(seq %d): new " 1697 /* drop any duplicate fragments */
1707 "BEGIN flag with no prior END", thisseq); 1698 if (newfrag != NULL && thisseq == newseq) {
1708 stats->seqerrs++; 1699 isdn_ppp_mp_free_skb(mp, newfrag);
1709 stats->frame_drops++; 1700 newfrag = NULL;
1710 isdn_ppp_mp_discard(mp, start, frag); 1701 }
1711 start = frag; 1702
1712 } else if (MP_LE(thisseq, minseq)) { 1703 /* insert new fragment before next element if possible. */
1713 if (MP_FLAGS(frag) & MP_BEGIN_FRAG) 1704 if (newfrag != NULL && (nextf == NULL ||
1705 MP_LT(newseq, MP_SEQ(nextf)))) {
1706 newfrag->next = nextf;
1707 frag->next = nextf = newfrag;
1708 newfrag = NULL;
1709 }
1710
1711 if (start != NULL) {
1712 /* check for misplaced start */
1713 if (start != frag && (MP_FLAGS(frag) & MP_BEGIN_FRAG)) {
1714 printk(KERN_WARNING"isdn_mppp(seq %d): new "
1715 "BEGIN flag with no prior END", thisseq);
1716 stats->seqerrs++;
1717 stats->frame_drops++;
1718 start = isdn_ppp_mp_discard(mp, start,frag);
1719 nextf = frag->next;
1720 }
1721 } else if (MP_LE(thisseq, minseq)) {
1722 if (MP_FLAGS(frag) & MP_BEGIN_FRAG)
1714 start = frag; 1723 start = frag;
1715 else { 1724 else {
1716 if (MP_FLAGS(frag) & MP_END_FRAG) 1725 if (MP_FLAGS(frag) & MP_END_FRAG)
1717 stats->frame_drops++; 1726 stats->frame_drops++;
1718 __skb_unlink(skb, &mp->frags); 1727 if( mp->frags == frag )
1728 mp->frags = nextf;
1719 isdn_ppp_mp_free_skb(mp, frag); 1729 isdn_ppp_mp_free_skb(mp, frag);
1730 frag = nextf;
1720 continue; 1731 continue;
1721 } 1732 }
1722 } 1733 }
1723 1734
1724 /* if we have end fragment, then we have full reassembly 1735 /* if start is non-null and we have end fragment, then
1725 * sequence -- reassemble and process packet now 1736 * we have full reassembly sequence -- reassemble
1737 * and process packet now
1726 */ 1738 */
1727 if (MP_FLAGS(frag) & MP_END_FRAG) { 1739 if (start != NULL && (MP_FLAGS(frag) & MP_END_FRAG)) {
1728 minseq = mp->seq = (thisseq+1) & MP_LONGSEQ_MASK; 1740 minseq = mp->seq = (thisseq+1) & MP_LONGSEQ_MASK;
1729 /* Reassemble the packet then dispatch it */ 1741 /* Reassemble the packet then dispatch it */
1730 isdn_ppp_mp_reassembly(net_dev, lp, start, frag, thisseq); 1742 isdn_ppp_mp_reassembly(net_dev, lp, start, nextf);
1743
1744 start = NULL;
1745 frag = NULL;
1731 1746
1732 start = NULL; 1747 mp->frags = nextf;
1733 frag = NULL; 1748 }
1734 }
1735 1749
1736 /* check if need to update start pointer: if we just 1750 /* check if need to update start pointer: if we just
1737 * reassembled the packet and sequence is contiguous 1751 * reassembled the packet and sequence is contiguous
@@ -1742,25 +1756,26 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1742 * below low watermark and set start to the next frag or 1756 * below low watermark and set start to the next frag or
1743 * clear start ptr. 1757 * clear start ptr.
1744 */ 1758 */
1745 if (nextf != (struct sk_buff *)&mp->frags && 1759 if (nextf != NULL &&
1746 ((thisseq+1) & MP_LONGSEQ_MASK) == MP_SEQ(nextf)) { 1760 ((thisseq+1) & MP_LONGSEQ_MASK) == MP_SEQ(nextf)) {
1747 /* if we just reassembled and the next one is here, 1761 /* if we just reassembled and the next one is here,
1748 * then start another reassembly. 1762 * then start another reassembly. */
1749 */ 1763
1750 if (frag == NULL) { 1764 if (frag == NULL) {
1751 if (MP_FLAGS(nextf) & MP_BEGIN_FRAG) 1765 if (MP_FLAGS(nextf) & MP_BEGIN_FRAG)
1752 start = nextf; 1766 start = nextf;
1753 else { 1767 else
1754 printk(KERN_WARNING"isdn_mppp(seq %d):" 1768 {
1755 " END flag with no following " 1769 printk(KERN_WARNING"isdn_mppp(seq %d):"
1756 "BEGIN", thisseq); 1770 " END flag with no following "
1771 "BEGIN", thisseq);
1757 stats->seqerrs++; 1772 stats->seqerrs++;
1758 } 1773 }
1759 } 1774 }
1760 } else { 1775
1761 if (nextf != (struct sk_buff *)&mp->frags && 1776 } else {
1762 frag != NULL && 1777 if ( nextf != NULL && frag != NULL &&
1763 MP_LT(thisseq, minseq)) { 1778 MP_LT(thisseq, minseq)) {
1764 /* we've got a break in the sequence 1779 /* we've got a break in the sequence
1765 * and we not at the end yet 1780 * and we not at the end yet
1766 * and we did not just reassembled 1781 * and we did not just reassembled
@@ -1769,39 +1784,41 @@ static void isdn_ppp_mp_receive(isdn_net_dev * net_dev, isdn_net_local * lp,
1769 * discard all the frames below low watermark 1784 * discard all the frames below low watermark
1770 * and start over */ 1785 * and start over */
1771 stats->frame_drops++; 1786 stats->frame_drops++;
1772 isdn_ppp_mp_discard(mp, start, nextf); 1787 mp->frags = isdn_ppp_mp_discard(mp,start,nextf);
1773 } 1788 }
1774 /* break in the sequence, no reassembly */ 1789 /* break in the sequence, no reassembly */
1775 start = NULL; 1790 start = NULL;
1776 } 1791 }
1777 if (!start) 1792
1778 break; 1793 frag = nextf;
1779 } 1794 } /* while -- main loop */
1780 1795
1781check_overflow: 1796 if (mp->frags == NULL)
1797 mp->frags = frag;
1798
1782 /* rather straighforward way to deal with (not very) possible 1799 /* rather straighforward way to deal with (not very) possible
1783 * queue overflow 1800 * queue overflow */
1784 */
1785 if (mp->frames > MP_MAX_QUEUE_LEN) { 1801 if (mp->frames > MP_MAX_QUEUE_LEN) {
1786 stats->overflows++; 1802 stats->overflows++;
1787 skb_queue_walk_safe(&mp->frags, frag, nextf) { 1803 while (mp->frames > MP_MAX_QUEUE_LEN) {
1788 if (mp->frames <= MP_MAX_QUEUE_LEN) 1804 frag = mp->frags->next;
1789 break; 1805 isdn_ppp_mp_free_skb(mp, mp->frags);
1790 __skb_unlink(frag, &mp->frags); 1806 mp->frags = frag;
1791 isdn_ppp_mp_free_skb(mp, frag);
1792 } 1807 }
1793 } 1808 }
1794 spin_unlock_irqrestore(&mp->lock, flags); 1809 spin_unlock_irqrestore(&mp->lock, flags);
1795} 1810}
1796 1811
1797static void isdn_ppp_mp_cleanup(isdn_net_local *lp) 1812static void isdn_ppp_mp_cleanup( isdn_net_local * lp )
1798{ 1813{
1799 struct sk_buff *skb, *tmp; 1814 struct sk_buff * frag = lp->netdev->pb->frags;
1800 1815 struct sk_buff * nextfrag;
1801 skb_queue_walk_safe(&lp->netdev->pb->frags, skb, tmp) { 1816 while( frag ) {
1802 __skb_unlink(skb, &lp->netdev->pb->frags); 1817 nextfrag = frag->next;
1803 isdn_ppp_mp_free_skb(lp->netdev->pb, skb); 1818 isdn_ppp_mp_free_skb(lp->netdev->pb, frag);
1804 } 1819 frag = nextfrag;
1820 }
1821 lp->netdev->pb->frags = NULL;
1805} 1822}
1806 1823
1807static u32 isdn_ppp_mp_get_seq( int short_seq, 1824static u32 isdn_ppp_mp_get_seq( int short_seq,
@@ -1838,115 +1855,72 @@ static u32 isdn_ppp_mp_get_seq( int short_seq,
1838 return seq; 1855 return seq;
1839} 1856}
1840 1857
1841static void isdn_ppp_mp_discard(ippp_bundle *mp, struct sk_buff *from, 1858struct sk_buff * isdn_ppp_mp_discard( ippp_bundle * mp,
1842 struct sk_buff *to) 1859 struct sk_buff * from, struct sk_buff * to )
1843{ 1860{
1844 if (from) { 1861 if( from )
1845 struct sk_buff *skb, *tmp; 1862 while (from != to) {
1846 int freeing = 0; 1863 struct sk_buff * next = from->next;
1847 1864 isdn_ppp_mp_free_skb(mp, from);
1848 skb_queue_walk_safe(&mp->frags, skb, tmp) { 1865 from = next;
1849 if (skb == to)
1850 break;
1851 if (skb == from)
1852 freeing = 1;
1853 if (!freeing)
1854 continue;
1855 __skb_unlink(skb, &mp->frags);
1856 isdn_ppp_mp_free_skb(mp, skb);
1857 } 1866 }
1858 } 1867 return from;
1859}
1860
1861static unsigned int calc_tot_len(struct sk_buff_head *queue,
1862 struct sk_buff *from, struct sk_buff *to)
1863{
1864 unsigned int tot_len = 0;
1865 struct sk_buff *skb;
1866 int found_start = 0;
1867
1868 skb_queue_walk(queue, skb) {
1869 if (skb == from)
1870 found_start = 1;
1871 if (!found_start)
1872 continue;
1873 tot_len += skb->len - MP_HEADER_LEN;
1874 if (skb == to)
1875 break;
1876 }
1877 return tot_len;
1878} 1868}
1879 1869
1880/* Reassemble packet using fragments in the reassembly queue from 1870void isdn_ppp_mp_reassembly( isdn_net_dev * net_dev, isdn_net_local * lp,
1881 * 'from' until 'to', inclusive. 1871 struct sk_buff * from, struct sk_buff * to )
1882 */
1883static void isdn_ppp_mp_reassembly(isdn_net_dev *net_dev, isdn_net_local *lp,
1884 struct sk_buff *from, struct sk_buff *to,
1885 u32 lastseq)
1886{ 1872{
1887 ippp_bundle *mp = net_dev->pb; 1873 ippp_bundle * mp = net_dev->pb;
1888 unsigned int tot_len;
1889 struct sk_buff *skb;
1890 int proto; 1874 int proto;
1875 struct sk_buff * skb;
1876 unsigned int tot_len;
1891 1877
1892 if (lp->ppp_slot < 0 || lp->ppp_slot >= ISDN_MAX_CHANNELS) { 1878 if (lp->ppp_slot < 0 || lp->ppp_slot >= ISDN_MAX_CHANNELS) {
1893 printk(KERN_ERR "%s: lp->ppp_slot(%d) out of range\n", 1879 printk(KERN_ERR "%s: lp->ppp_slot(%d) out of range\n",
1894 __func__, lp->ppp_slot); 1880 __func__, lp->ppp_slot);
1895 return; 1881 return;
1896 } 1882 }
1897 1883 if( MP_FLAGS(from) == (MP_BEGIN_FRAG | MP_END_FRAG) ) {
1898 tot_len = calc_tot_len(&mp->frags, from, to); 1884 if( ippp_table[lp->ppp_slot]->debug & 0x40 )
1899
1900 if (MP_FLAGS(from) == (MP_BEGIN_FRAG | MP_END_FRAG)) {
1901 if (ippp_table[lp->ppp_slot]->debug & 0x40)
1902 printk(KERN_DEBUG "isdn_mppp: reassembly: frame %d, " 1885 printk(KERN_DEBUG "isdn_mppp: reassembly: frame %d, "
1903 "len %d\n", MP_SEQ(from), from->len); 1886 "len %d\n", MP_SEQ(from), from->len );
1904 skb = from; 1887 skb = from;
1905 skb_pull(skb, MP_HEADER_LEN); 1888 skb_pull(skb, MP_HEADER_LEN);
1906 __skb_unlink(skb, &mp->frags);
1907 mp->frames--; 1889 mp->frames--;
1908 } else { 1890 } else {
1909 struct sk_buff *walk, *tmp; 1891 struct sk_buff * frag;
1910 int found_start = 0; 1892 int n;
1911 1893
1912 if (ippp_table[lp->ppp_slot]->debug & 0x40) 1894 for(tot_len=n=0, frag=from; frag != to; frag=frag->next, n++)
1913 printk(KERN_DEBUG"isdn_mppp: reassembling frames %d " 1895 tot_len += frag->len - MP_HEADER_LEN;
1914 "to %d, len %d\n", MP_SEQ(from), lastseq,
1915 tot_len);
1916 1896
1917 skb = dev_alloc_skb(tot_len); 1897 if( ippp_table[lp->ppp_slot]->debug & 0x40 )
1918 if (!skb) 1898 printk(KERN_DEBUG"isdn_mppp: reassembling frames %d "
1899 "to %d, len %d\n", MP_SEQ(from),
1900 (MP_SEQ(from)+n-1) & MP_LONGSEQ_MASK, tot_len );
1901 if( (skb = dev_alloc_skb(tot_len)) == NULL ) {
1919 printk(KERN_ERR "isdn_mppp: cannot allocate sk buff " 1902 printk(KERN_ERR "isdn_mppp: cannot allocate sk buff "
1920 "of size %d\n", tot_len); 1903 "of size %d\n", tot_len);
1921 1904 isdn_ppp_mp_discard(mp, from, to);
1922 found_start = 0; 1905 return;
1923 skb_queue_walk_safe(&mp->frags, walk, tmp) { 1906 }
1924 if (walk == from)
1925 found_start = 1;
1926 if (!found_start)
1927 continue;
1928 1907
1929 if (skb) { 1908 while( from != to ) {
1930 unsigned int len = walk->len - MP_HEADER_LEN; 1909 unsigned int len = from->len - MP_HEADER_LEN;
1931 skb_copy_from_linear_data_offset(walk, MP_HEADER_LEN,
1932 skb_put(skb, len),
1933 len);
1934 }
1935 __skb_unlink(walk, &mp->frags);
1936 isdn_ppp_mp_free_skb(mp, walk);
1937 1910
1938 if (walk == to) 1911 skb_copy_from_linear_data_offset(from, MP_HEADER_LEN,
1939 break; 1912 skb_put(skb,len),
1913 len);
1914 frag = from->next;
1915 isdn_ppp_mp_free_skb(mp, from);
1916 from = frag;
1940 } 1917 }
1941 } 1918 }
1942 if (!skb)
1943 return;
1944
1945 proto = isdn_ppp_strip_proto(skb); 1919 proto = isdn_ppp_strip_proto(skb);
1946 isdn_ppp_push_higher(net_dev, lp, skb, proto); 1920 isdn_ppp_push_higher(net_dev, lp, skb, proto);
1947} 1921}
1948 1922
1949static void isdn_ppp_mp_free_skb(ippp_bundle *mp, struct sk_buff *skb) 1923static void isdn_ppp_mp_free_skb(ippp_bundle * mp, struct sk_buff * skb)
1950{ 1924{
1951 dev_kfree_skb(skb); 1925 dev_kfree_skb(skb);
1952 mp->frames--; 1926 mp->frames--;
diff --git a/drivers/isdn/mISDN/stack.c b/drivers/isdn/mISDN/stack.c
index 3e1532a180ff..0d05ec43012c 100644
--- a/drivers/isdn/mISDN/stack.c
+++ b/drivers/isdn/mISDN/stack.c
@@ -364,7 +364,7 @@ add_layer2(struct mISDNchannel *ch, struct mISDNstack *st)
364static int 364static int
365st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg) 365st_own_ctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
366{ 366{
367 if (!ch->st || ch->st->layer1) 367 if (!ch->st || !ch->st->layer1)
368 return -EINVAL; 368 return -EINVAL;
369 return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg); 369 return ch->st->layer1->ctrl(ch->st->layer1, cmd, arg);
370} 370}
diff --git a/drivers/leds/leds-gpio.c b/drivers/leds/leds-gpio.c
index 7467980b8cf9..e5225d28f392 100644
--- a/drivers/leds/leds-gpio.c
+++ b/drivers/leds/leds-gpio.c
@@ -78,6 +78,8 @@ static int __devinit create_gpio_led(const struct gpio_led *template,
78{ 78{
79 int ret, state; 79 int ret, state;
80 80
81 led_dat->gpio = -1;
82
81 /* skip leds that aren't available */ 83 /* skip leds that aren't available */
82 if (!gpio_is_valid(template->gpio)) { 84 if (!gpio_is_valid(template->gpio)) {
83 printk(KERN_INFO "Skipping unavailable LED gpio %d (%s)\n", 85 printk(KERN_INFO "Skipping unavailable LED gpio %d (%s)\n",
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c
index b40fb9b6c862..6f308a4757ee 100644
--- a/drivers/macintosh/via-pmu.c
+++ b/drivers/macintosh/via-pmu.c
@@ -405,7 +405,11 @@ static int __init via_pmu_start(void)
405 printk(KERN_ERR "via-pmu: can't map interrupt\n"); 405 printk(KERN_ERR "via-pmu: can't map interrupt\n");
406 return -ENODEV; 406 return -ENODEV;
407 } 407 }
408 if (request_irq(irq, via_pmu_interrupt, 0, "VIA-PMU", (void *)0)) { 408 /* We set IRQF_TIMER because we don't want the interrupt to be disabled
409 * between the 2 passes of driver suspend, we control our own disabling
410 * for that one
411 */
412 if (request_irq(irq, via_pmu_interrupt, IRQF_TIMER, "VIA-PMU", (void *)0)) {
409 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq); 413 printk(KERN_ERR "via-pmu: can't request irq %d\n", irq);
410 return -ENODEV; 414 return -ENODEV;
411 } 415 }
@@ -419,7 +423,7 @@ static int __init via_pmu_start(void)
419 gpio_irq = irq_of_parse_and_map(gpio_node, 0); 423 gpio_irq = irq_of_parse_and_map(gpio_node, 0);
420 424
421 if (gpio_irq != NO_IRQ) { 425 if (gpio_irq != NO_IRQ) {
422 if (request_irq(gpio_irq, gpio1_interrupt, 0, 426 if (request_irq(gpio_irq, gpio1_interrupt, IRQF_TIMER,
423 "GPIO1 ADB", (void *)0)) 427 "GPIO1 ADB", (void *)0))
424 printk(KERN_ERR "pmu: can't get irq %d" 428 printk(KERN_ERR "pmu: can't get irq %d"
425 " (GPIO1)\n", gpio_irq); 429 " (GPIO1)\n", gpio_irq);
@@ -925,8 +929,7 @@ proc_write_options(struct file *file, const char __user *buffer,
925 929
926#ifdef CONFIG_ADB 930#ifdef CONFIG_ADB
927/* Send an ADB command */ 931/* Send an ADB command */
928static int 932static int pmu_send_request(struct adb_request *req, int sync)
929pmu_send_request(struct adb_request *req, int sync)
930{ 933{
931 int i, ret; 934 int i, ret;
932 935
@@ -1005,16 +1008,11 @@ pmu_send_request(struct adb_request *req, int sync)
1005} 1008}
1006 1009
1007/* Enable/disable autopolling */ 1010/* Enable/disable autopolling */
1008static int 1011static int __pmu_adb_autopoll(int devs)
1009pmu_adb_autopoll(int devs)
1010{ 1012{
1011 struct adb_request req; 1013 struct adb_request req;
1012 1014
1013 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1014 return -ENXIO;
1015
1016 if (devs) { 1015 if (devs) {
1017 adb_dev_map = devs;
1018 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, 1016 pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86,
1019 adb_dev_map >> 8, adb_dev_map); 1017 adb_dev_map >> 8, adb_dev_map);
1020 pmu_adb_flags = 2; 1018 pmu_adb_flags = 2;
@@ -1027,9 +1025,17 @@ pmu_adb_autopoll(int devs)
1027 return 0; 1025 return 0;
1028} 1026}
1029 1027
1028static int pmu_adb_autopoll(int devs)
1029{
1030 if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb)
1031 return -ENXIO;
1032
1033 adb_dev_map = devs;
1034 return __pmu_adb_autopoll(devs);
1035}
1036
1030/* Reset the ADB bus */ 1037/* Reset the ADB bus */
1031static int 1038static int pmu_adb_reset_bus(void)
1032pmu_adb_reset_bus(void)
1033{ 1039{
1034 struct adb_request req; 1040 struct adb_request req;
1035 int save_autopoll = adb_dev_map; 1041 int save_autopoll = adb_dev_map;
@@ -1038,13 +1044,13 @@ pmu_adb_reset_bus(void)
1038 return -ENXIO; 1044 return -ENXIO;
1039 1045
1040 /* anyone got a better idea?? */ 1046 /* anyone got a better idea?? */
1041 pmu_adb_autopoll(0); 1047 __pmu_adb_autopoll(0);
1042 1048
1043 req.nbytes = 5; 1049 req.nbytes = 4;
1044 req.done = NULL; 1050 req.done = NULL;
1045 req.data[0] = PMU_ADB_CMD; 1051 req.data[0] = PMU_ADB_CMD;
1046 req.data[1] = 0; 1052 req.data[1] = ADB_BUSRESET;
1047 req.data[2] = ADB_BUSRESET; 1053 req.data[2] = 0;
1048 req.data[3] = 0; 1054 req.data[3] = 0;
1049 req.data[4] = 0; 1055 req.data[4] = 0;
1050 req.reply_len = 0; 1056 req.reply_len = 0;
@@ -1056,7 +1062,7 @@ pmu_adb_reset_bus(void)
1056 pmu_wait_complete(&req); 1062 pmu_wait_complete(&req);
1057 1063
1058 if (save_autopoll != 0) 1064 if (save_autopoll != 0)
1059 pmu_adb_autopoll(save_autopoll); 1065 __pmu_adb_autopoll(save_autopoll);
1060 1066
1061 return 0; 1067 return 0;
1062} 1068}
diff --git a/drivers/md/Makefile b/drivers/md/Makefile
index 1dc4185bd781..e355e7f6a536 100644
--- a/drivers/md/Makefile
+++ b/drivers/md/Makefile
@@ -46,7 +46,7 @@ obj-$(CONFIG_DM_LOG_USERSPACE) += dm-log-userspace.o
46obj-$(CONFIG_DM_ZERO) += dm-zero.o 46obj-$(CONFIG_DM_ZERO) += dm-zero.o
47 47
48quiet_cmd_unroll = UNROLL $@ 48quiet_cmd_unroll = UNROLL $@
49 cmd_unroll = $(PERL) $(srctree)/$(src)/unroll.pl $(UNROLL) \ 49 cmd_unroll = $(AWK) -f$(srctree)/$(src)/unroll.awk -vN=$(UNROLL) \
50 < $< > $@ || ( rm -f $@ && exit 1 ) 50 < $< > $@ || ( rm -f $@ && exit 1 )
51 51
52ifeq ($(CONFIG_ALTIVEC),y) 52ifeq ($(CONFIG_ALTIVEC),y)
@@ -59,56 +59,56 @@ endif
59 59
60targets += raid6int1.c 60targets += raid6int1.c
61$(obj)/raid6int1.c: UNROLL := 1 61$(obj)/raid6int1.c: UNROLL := 1
62$(obj)/raid6int1.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE 62$(obj)/raid6int1.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE
63 $(call if_changed,unroll) 63 $(call if_changed,unroll)
64 64
65targets += raid6int2.c 65targets += raid6int2.c
66$(obj)/raid6int2.c: UNROLL := 2 66$(obj)/raid6int2.c: UNROLL := 2
67$(obj)/raid6int2.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE 67$(obj)/raid6int2.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE
68 $(call if_changed,unroll) 68 $(call if_changed,unroll)
69 69
70targets += raid6int4.c 70targets += raid6int4.c
71$(obj)/raid6int4.c: UNROLL := 4 71$(obj)/raid6int4.c: UNROLL := 4
72$(obj)/raid6int4.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE 72$(obj)/raid6int4.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE
73 $(call if_changed,unroll) 73 $(call if_changed,unroll)
74 74
75targets += raid6int8.c 75targets += raid6int8.c
76$(obj)/raid6int8.c: UNROLL := 8 76$(obj)/raid6int8.c: UNROLL := 8
77$(obj)/raid6int8.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE 77$(obj)/raid6int8.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE
78 $(call if_changed,unroll) 78 $(call if_changed,unroll)
79 79
80targets += raid6int16.c 80targets += raid6int16.c
81$(obj)/raid6int16.c: UNROLL := 16 81$(obj)/raid6int16.c: UNROLL := 16
82$(obj)/raid6int16.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE 82$(obj)/raid6int16.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE
83 $(call if_changed,unroll) 83 $(call if_changed,unroll)
84 84
85targets += raid6int32.c 85targets += raid6int32.c
86$(obj)/raid6int32.c: UNROLL := 32 86$(obj)/raid6int32.c: UNROLL := 32
87$(obj)/raid6int32.c: $(src)/raid6int.uc $(src)/unroll.pl FORCE 87$(obj)/raid6int32.c: $(src)/raid6int.uc $(src)/unroll.awk FORCE
88 $(call if_changed,unroll) 88 $(call if_changed,unroll)
89 89
90CFLAGS_raid6altivec1.o += $(altivec_flags) 90CFLAGS_raid6altivec1.o += $(altivec_flags)
91targets += raid6altivec1.c 91targets += raid6altivec1.c
92$(obj)/raid6altivec1.c: UNROLL := 1 92$(obj)/raid6altivec1.c: UNROLL := 1
93$(obj)/raid6altivec1.c: $(src)/raid6altivec.uc $(src)/unroll.pl FORCE 93$(obj)/raid6altivec1.c: $(src)/raid6altivec.uc $(src)/unroll.awk FORCE
94 $(call if_changed,unroll) 94 $(call if_changed,unroll)
95 95
96CFLAGS_raid6altivec2.o += $(altivec_flags) 96CFLAGS_raid6altivec2.o += $(altivec_flags)
97targets += raid6altivec2.c 97targets += raid6altivec2.c
98$(obj)/raid6altivec2.c: UNROLL := 2 98$(obj)/raid6altivec2.c: UNROLL := 2
99$(obj)/raid6altivec2.c: $(src)/raid6altivec.uc $(src)/unroll.pl FORCE 99$(obj)/raid6altivec2.c: $(src)/raid6altivec.uc $(src)/unroll.awk FORCE
100 $(call if_changed,unroll) 100 $(call if_changed,unroll)
101 101
102CFLAGS_raid6altivec4.o += $(altivec_flags) 102CFLAGS_raid6altivec4.o += $(altivec_flags)
103targets += raid6altivec4.c 103targets += raid6altivec4.c
104$(obj)/raid6altivec4.c: UNROLL := 4 104$(obj)/raid6altivec4.c: UNROLL := 4
105$(obj)/raid6altivec4.c: $(src)/raid6altivec.uc $(src)/unroll.pl FORCE 105$(obj)/raid6altivec4.c: $(src)/raid6altivec.uc $(src)/unroll.awk FORCE
106 $(call if_changed,unroll) 106 $(call if_changed,unroll)
107 107
108CFLAGS_raid6altivec8.o += $(altivec_flags) 108CFLAGS_raid6altivec8.o += $(altivec_flags)
109targets += raid6altivec8.c 109targets += raid6altivec8.c
110$(obj)/raid6altivec8.c: UNROLL := 8 110$(obj)/raid6altivec8.c: UNROLL := 8
111$(obj)/raid6altivec8.c: $(src)/raid6altivec.uc $(src)/unroll.pl FORCE 111$(obj)/raid6altivec8.c: $(src)/raid6altivec.uc $(src)/unroll.awk FORCE
112 $(call if_changed,unroll) 112 $(call if_changed,unroll)
113 113
114quiet_cmd_mktable = TABLE $@ 114quiet_cmd_mktable = TABLE $@
diff --git a/drivers/md/bitmap.c b/drivers/md/bitmap.c
index 6986b0059d23..60e2b322db11 100644
--- a/drivers/md/bitmap.c
+++ b/drivers/md/bitmap.c
@@ -1624,10 +1624,11 @@ int bitmap_create(mddev_t *mddev)
1624 bitmap->offset = mddev->bitmap_offset; 1624 bitmap->offset = mddev->bitmap_offset;
1625 if (file) { 1625 if (file) {
1626 get_file(file); 1626 get_file(file);
1627 do_sync_mapping_range(file->f_mapping, 0, LLONG_MAX, 1627 /* As future accesses to this file will use bmap,
1628 SYNC_FILE_RANGE_WAIT_BEFORE | 1628 * and bypass the page cache, we must sync the file
1629 SYNC_FILE_RANGE_WRITE | 1629 * first.
1630 SYNC_FILE_RANGE_WAIT_AFTER); 1630 */
1631 vfs_fsync(file, file->f_dentry, 1);
1631 } 1632 }
1632 /* read superblock from bitmap file (this sets bitmap->chunksize) */ 1633 /* read superblock from bitmap file (this sets bitmap->chunksize) */
1633 err = bitmap_read_sb(bitmap); 1634 err = bitmap_read_sb(bitmap);
diff --git a/drivers/md/dm-exception-store.c b/drivers/md/dm-exception-store.c
index 556acff3952f..7dbe652efb5a 100644
--- a/drivers/md/dm-exception-store.c
+++ b/drivers/md/dm-exception-store.c
@@ -138,16 +138,6 @@ int dm_exception_store_type_unregister(struct dm_exception_store_type *type)
138} 138}
139EXPORT_SYMBOL(dm_exception_store_type_unregister); 139EXPORT_SYMBOL(dm_exception_store_type_unregister);
140 140
141/*
142 * Round a number up to the nearest 'size' boundary. size must
143 * be a power of 2.
144 */
145static ulong round_up(ulong n, ulong size)
146{
147 size--;
148 return (n + size) & ~size;
149}
150
151static int set_chunk_size(struct dm_exception_store *store, 141static int set_chunk_size(struct dm_exception_store *store,
152 const char *chunk_size_arg, char **error) 142 const char *chunk_size_arg, char **error)
153{ 143{
@@ -155,7 +145,8 @@ static int set_chunk_size(struct dm_exception_store *store,
155 char *value; 145 char *value;
156 146
157 chunk_size_ulong = simple_strtoul(chunk_size_arg, &value, 10); 147 chunk_size_ulong = simple_strtoul(chunk_size_arg, &value, 10);
158 if (*chunk_size_arg == '\0' || *value != '\0') { 148 if (*chunk_size_arg == '\0' || *value != '\0' ||
149 chunk_size_ulong > UINT_MAX) {
159 *error = "Invalid chunk size"; 150 *error = "Invalid chunk size";
160 return -EINVAL; 151 return -EINVAL;
161 } 152 }
@@ -165,40 +156,35 @@ static int set_chunk_size(struct dm_exception_store *store,
165 return 0; 156 return 0;
166 } 157 }
167 158
168 /* 159 return dm_exception_store_set_chunk_size(store,
169 * Chunk size must be multiple of page size. Silently 160 (unsigned) chunk_size_ulong,
170 * round up if it's not.
171 */
172 chunk_size_ulong = round_up(chunk_size_ulong, PAGE_SIZE >> 9);
173
174 return dm_exception_store_set_chunk_size(store, chunk_size_ulong,
175 error); 161 error);
176} 162}
177 163
178int dm_exception_store_set_chunk_size(struct dm_exception_store *store, 164int dm_exception_store_set_chunk_size(struct dm_exception_store *store,
179 unsigned long chunk_size_ulong, 165 unsigned chunk_size,
180 char **error) 166 char **error)
181{ 167{
182 /* Check chunk_size is a power of 2 */ 168 /* Check chunk_size is a power of 2 */
183 if (!is_power_of_2(chunk_size_ulong)) { 169 if (!is_power_of_2(chunk_size)) {
184 *error = "Chunk size is not a power of 2"; 170 *error = "Chunk size is not a power of 2";
185 return -EINVAL; 171 return -EINVAL;
186 } 172 }
187 173
188 /* Validate the chunk size against the device block size */ 174 /* Validate the chunk size against the device block size */
189 if (chunk_size_ulong % (bdev_logical_block_size(store->cow->bdev) >> 9)) { 175 if (chunk_size % (bdev_logical_block_size(store->cow->bdev) >> 9)) {
190 *error = "Chunk size is not a multiple of device blocksize"; 176 *error = "Chunk size is not a multiple of device blocksize";
191 return -EINVAL; 177 return -EINVAL;
192 } 178 }
193 179
194 if (chunk_size_ulong > INT_MAX >> SECTOR_SHIFT) { 180 if (chunk_size > INT_MAX >> SECTOR_SHIFT) {
195 *error = "Chunk size is too high"; 181 *error = "Chunk size is too high";
196 return -EINVAL; 182 return -EINVAL;
197 } 183 }
198 184
199 store->chunk_size = chunk_size_ulong; 185 store->chunk_size = chunk_size;
200 store->chunk_mask = chunk_size_ulong - 1; 186 store->chunk_mask = chunk_size - 1;
201 store->chunk_shift = ffs(chunk_size_ulong) - 1; 187 store->chunk_shift = ffs(chunk_size) - 1;
202 188
203 return 0; 189 return 0;
204} 190}
@@ -251,7 +237,7 @@ int dm_exception_store_create(struct dm_target *ti, int argc, char **argv,
251 237
252 r = set_chunk_size(tmp_store, argv[2], &ti->error); 238 r = set_chunk_size(tmp_store, argv[2], &ti->error);
253 if (r) 239 if (r)
254 goto bad_cow; 240 goto bad_ctr;
255 241
256 r = type->ctr(tmp_store, 0, NULL); 242 r = type->ctr(tmp_store, 0, NULL);
257 if (r) { 243 if (r) {
diff --git a/drivers/md/dm-exception-store.h b/drivers/md/dm-exception-store.h
index 812c71872ba0..8a223a48802c 100644
--- a/drivers/md/dm-exception-store.h
+++ b/drivers/md/dm-exception-store.h
@@ -101,9 +101,9 @@ struct dm_exception_store {
101 struct dm_dev *cow; 101 struct dm_dev *cow;
102 102
103 /* Size of data blocks saved - must be a power of 2 */ 103 /* Size of data blocks saved - must be a power of 2 */
104 chunk_t chunk_size; 104 unsigned chunk_size;
105 chunk_t chunk_mask; 105 unsigned chunk_mask;
106 chunk_t chunk_shift; 106 unsigned chunk_shift;
107 107
108 void *context; 108 void *context;
109}; 109};
@@ -169,7 +169,7 @@ int dm_exception_store_type_register(struct dm_exception_store_type *type);
169int dm_exception_store_type_unregister(struct dm_exception_store_type *type); 169int dm_exception_store_type_unregister(struct dm_exception_store_type *type);
170 170
171int dm_exception_store_set_chunk_size(struct dm_exception_store *store, 171int dm_exception_store_set_chunk_size(struct dm_exception_store *store,
172 unsigned long chunk_size_ulong, 172 unsigned chunk_size,
173 char **error); 173 char **error);
174 174
175int dm_exception_store_create(struct dm_target *ti, int argc, char **argv, 175int dm_exception_store_create(struct dm_target *ti, int argc, char **argv,
diff --git a/drivers/md/dm-log-userspace-base.c b/drivers/md/dm-log-userspace-base.c
index 652bd33109e3..7ac2c1450d10 100644
--- a/drivers/md/dm-log-userspace-base.c
+++ b/drivers/md/dm-log-userspace-base.c
@@ -156,7 +156,7 @@ static int userspace_ctr(struct dm_dirty_log *log, struct dm_target *ti,
156 } 156 }
157 157
158 /* The ptr value is sufficient for local unique id */ 158 /* The ptr value is sufficient for local unique id */
159 lc->luid = (uint64_t)lc; 159 lc->luid = (unsigned long)lc;
160 160
161 lc->ti = ti; 161 lc->ti = ti;
162 162
diff --git a/drivers/md/dm-snap-persistent.c b/drivers/md/dm-snap-persistent.c
index d5b2e08750d5..0c746420c008 100644
--- a/drivers/md/dm-snap-persistent.c
+++ b/drivers/md/dm-snap-persistent.c
@@ -284,12 +284,13 @@ static int read_header(struct pstore *ps, int *new_snapshot)
284{ 284{
285 int r; 285 int r;
286 struct disk_header *dh; 286 struct disk_header *dh;
287 chunk_t chunk_size; 287 unsigned chunk_size;
288 int chunk_size_supplied = 1; 288 int chunk_size_supplied = 1;
289 char *chunk_err; 289 char *chunk_err;
290 290
291 /* 291 /*
292 * Use default chunk size (or hardsect_size, if larger) if none supplied 292 * Use default chunk size (or logical_block_size, if larger)
293 * if none supplied
293 */ 294 */
294 if (!ps->store->chunk_size) { 295 if (!ps->store->chunk_size) {
295 ps->store->chunk_size = max(DM_CHUNK_SIZE_DEFAULT_SECTORS, 296 ps->store->chunk_size = max(DM_CHUNK_SIZE_DEFAULT_SECTORS,
@@ -334,10 +335,9 @@ static int read_header(struct pstore *ps, int *new_snapshot)
334 return 0; 335 return 0;
335 336
336 if (chunk_size_supplied) 337 if (chunk_size_supplied)
337 DMWARN("chunk size %llu in device metadata overrides " 338 DMWARN("chunk size %u in device metadata overrides "
338 "table chunk size of %llu.", 339 "table chunk size of %u.",
339 (unsigned long long)chunk_size, 340 chunk_size, ps->store->chunk_size);
340 (unsigned long long)ps->store->chunk_size);
341 341
342 /* We had a bogus chunk_size. Fix stuff up. */ 342 /* We had a bogus chunk_size. Fix stuff up. */
343 free_area(ps); 343 free_area(ps);
@@ -345,8 +345,8 @@ static int read_header(struct pstore *ps, int *new_snapshot)
345 r = dm_exception_store_set_chunk_size(ps->store, chunk_size, 345 r = dm_exception_store_set_chunk_size(ps->store, chunk_size,
346 &chunk_err); 346 &chunk_err);
347 if (r) { 347 if (r) {
348 DMERR("invalid on-disk chunk size %llu: %s.", 348 DMERR("invalid on-disk chunk size %u: %s.",
349 (unsigned long long)chunk_size, chunk_err); 349 chunk_size, chunk_err);
350 return r; 350 return r;
351 } 351 }
352 352
diff --git a/drivers/md/dm-snap.c b/drivers/md/dm-snap.c
index 57f1bf7f3b7a..3a3ba46e6d4b 100644
--- a/drivers/md/dm-snap.c
+++ b/drivers/md/dm-snap.c
@@ -296,6 +296,7 @@ static void __insert_origin(struct origin *o)
296 */ 296 */
297static int register_snapshot(struct dm_snapshot *snap) 297static int register_snapshot(struct dm_snapshot *snap)
298{ 298{
299 struct dm_snapshot *l;
299 struct origin *o, *new_o; 300 struct origin *o, *new_o;
300 struct block_device *bdev = snap->origin->bdev; 301 struct block_device *bdev = snap->origin->bdev;
301 302
@@ -319,7 +320,11 @@ static int register_snapshot(struct dm_snapshot *snap)
319 __insert_origin(o); 320 __insert_origin(o);
320 } 321 }
321 322
322 list_add_tail(&snap->list, &o->snapshots); 323 /* Sort the list according to chunk size, largest-first smallest-last */
324 list_for_each_entry(l, &o->snapshots, list)
325 if (l->store->chunk_size < snap->store->chunk_size)
326 break;
327 list_add_tail(&snap->list, &l->list);
323 328
324 up_write(&_origins_lock); 329 up_write(&_origins_lock);
325 return 0; 330 return 0;
@@ -668,6 +673,11 @@ static int snapshot_ctr(struct dm_target *ti, unsigned int argc, char **argv)
668 bio_list_init(&s->queued_bios); 673 bio_list_init(&s->queued_bios);
669 INIT_WORK(&s->queued_bios_work, flush_queued_bios); 674 INIT_WORK(&s->queued_bios_work, flush_queued_bios);
670 675
676 if (!s->store->chunk_size) {
677 ti->error = "Chunk size not set";
678 goto bad_load_and_register;
679 }
680
671 /* Add snapshot to the list of snapshots for this origin */ 681 /* Add snapshot to the list of snapshots for this origin */
672 /* Exceptions aren't triggered till snapshot_resume() is called */ 682 /* Exceptions aren't triggered till snapshot_resume() is called */
673 if (register_snapshot(s)) { 683 if (register_snapshot(s)) {
@@ -951,7 +961,7 @@ static void start_copy(struct dm_snap_pending_exception *pe)
951 961
952 src.bdev = bdev; 962 src.bdev = bdev;
953 src.sector = chunk_to_sector(s->store, pe->e.old_chunk); 963 src.sector = chunk_to_sector(s->store, pe->e.old_chunk);
954 src.count = min(s->store->chunk_size, dev_size - src.sector); 964 src.count = min((sector_t)s->store->chunk_size, dev_size - src.sector);
955 965
956 dest.bdev = s->store->cow->bdev; 966 dest.bdev = s->store->cow->bdev;
957 dest.sector = chunk_to_sector(s->store, pe->e.new_chunk); 967 dest.sector = chunk_to_sector(s->store, pe->e.new_chunk);
@@ -1142,6 +1152,8 @@ static int snapshot_status(struct dm_target *ti, status_type_t type,
1142 unsigned sz = 0; 1152 unsigned sz = 0;
1143 struct dm_snapshot *snap = ti->private; 1153 struct dm_snapshot *snap = ti->private;
1144 1154
1155 down_write(&snap->lock);
1156
1145 switch (type) { 1157 switch (type) {
1146 case STATUSTYPE_INFO: 1158 case STATUSTYPE_INFO:
1147 if (!snap->valid) 1159 if (!snap->valid)
@@ -1173,6 +1185,8 @@ static int snapshot_status(struct dm_target *ti, status_type_t type,
1173 break; 1185 break;
1174 } 1186 }
1175 1187
1188 up_write(&snap->lock);
1189
1176 return 0; 1190 return 0;
1177} 1191}
1178 1192
@@ -1388,7 +1402,7 @@ static void origin_resume(struct dm_target *ti)
1388 struct dm_dev *dev = ti->private; 1402 struct dm_dev *dev = ti->private;
1389 struct dm_snapshot *snap; 1403 struct dm_snapshot *snap;
1390 struct origin *o; 1404 struct origin *o;
1391 chunk_t chunk_size = 0; 1405 unsigned chunk_size = 0;
1392 1406
1393 down_read(&_origins_lock); 1407 down_read(&_origins_lock);
1394 o = __lookup_origin(dev->bdev); 1408 o = __lookup_origin(dev->bdev);
@@ -1465,7 +1479,7 @@ static int __init dm_snapshot_init(void)
1465 r = dm_register_target(&snapshot_target); 1479 r = dm_register_target(&snapshot_target);
1466 if (r) { 1480 if (r) {
1467 DMERR("snapshot target register failed %d", r); 1481 DMERR("snapshot target register failed %d", r);
1468 return r; 1482 goto bad_register_snapshot_target;
1469 } 1483 }
1470 1484
1471 r = dm_register_target(&origin_target); 1485 r = dm_register_target(&origin_target);
@@ -1522,6 +1536,9 @@ bad2:
1522 dm_unregister_target(&origin_target); 1536 dm_unregister_target(&origin_target);
1523bad1: 1537bad1:
1524 dm_unregister_target(&snapshot_target); 1538 dm_unregister_target(&snapshot_target);
1539
1540bad_register_snapshot_target:
1541 dm_exception_store_exit();
1525 return r; 1542 return r;
1526} 1543}
1527 1544
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index 23e76fe0d359..724efc63904d 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -47,6 +47,7 @@ struct dm_io {
47 atomic_t io_count; 47 atomic_t io_count;
48 struct bio *bio; 48 struct bio *bio;
49 unsigned long start_time; 49 unsigned long start_time;
50 spinlock_t endio_lock;
50}; 51};
51 52
52/* 53/*
@@ -130,7 +131,7 @@ struct mapped_device {
130 /* 131 /*
131 * A list of ios that arrived while we were suspended. 132 * A list of ios that arrived while we were suspended.
132 */ 133 */
133 atomic_t pending; 134 atomic_t pending[2];
134 wait_queue_head_t wait; 135 wait_queue_head_t wait;
135 struct work_struct work; 136 struct work_struct work;
136 struct bio_list deferred; 137 struct bio_list deferred;
@@ -453,13 +454,14 @@ static void start_io_acct(struct dm_io *io)
453{ 454{
454 struct mapped_device *md = io->md; 455 struct mapped_device *md = io->md;
455 int cpu; 456 int cpu;
457 int rw = bio_data_dir(io->bio);
456 458
457 io->start_time = jiffies; 459 io->start_time = jiffies;
458 460
459 cpu = part_stat_lock(); 461 cpu = part_stat_lock();
460 part_round_stats(cpu, &dm_disk(md)->part0); 462 part_round_stats(cpu, &dm_disk(md)->part0);
461 part_stat_unlock(); 463 part_stat_unlock();
462 dm_disk(md)->part0.in_flight = atomic_inc_return(&md->pending); 464 dm_disk(md)->part0.in_flight[rw] = atomic_inc_return(&md->pending[rw]);
463} 465}
464 466
465static void end_io_acct(struct dm_io *io) 467static void end_io_acct(struct dm_io *io)
@@ -479,8 +481,9 @@ static void end_io_acct(struct dm_io *io)
479 * After this is decremented the bio must not be touched if it is 481 * After this is decremented the bio must not be touched if it is
480 * a barrier. 482 * a barrier.
481 */ 483 */
482 dm_disk(md)->part0.in_flight = pending = 484 dm_disk(md)->part0.in_flight[rw] = pending =
483 atomic_dec_return(&md->pending); 485 atomic_dec_return(&md->pending[rw]);
486 pending += atomic_read(&md->pending[rw^0x1]);
484 487
485 /* nudge anyone waiting on suspend queue */ 488 /* nudge anyone waiting on suspend queue */
486 if (!pending) 489 if (!pending)
@@ -576,8 +579,12 @@ static void dec_pending(struct dm_io *io, int error)
576 struct mapped_device *md = io->md; 579 struct mapped_device *md = io->md;
577 580
578 /* Push-back supersedes any I/O errors */ 581 /* Push-back supersedes any I/O errors */
579 if (error && !(io->error > 0 && __noflush_suspending(md))) 582 if (unlikely(error)) {
580 io->error = error; 583 spin_lock_irqsave(&io->endio_lock, flags);
584 if (!(io->error > 0 && __noflush_suspending(md)))
585 io->error = error;
586 spin_unlock_irqrestore(&io->endio_lock, flags);
587 }
581 588
582 if (atomic_dec_and_test(&io->io_count)) { 589 if (atomic_dec_and_test(&io->io_count)) {
583 if (io->error == DM_ENDIO_REQUEUE) { 590 if (io->error == DM_ENDIO_REQUEUE) {
@@ -1224,6 +1231,7 @@ static void __split_and_process_bio(struct mapped_device *md, struct bio *bio)
1224 atomic_set(&ci.io->io_count, 1); 1231 atomic_set(&ci.io->io_count, 1);
1225 ci.io->bio = bio; 1232 ci.io->bio = bio;
1226 ci.io->md = md; 1233 ci.io->md = md;
1234 spin_lock_init(&ci.io->endio_lock);
1227 ci.sector = bio->bi_sector; 1235 ci.sector = bio->bi_sector;
1228 ci.sector_count = bio_sectors(bio); 1236 ci.sector_count = bio_sectors(bio);
1229 if (unlikely(bio_empty_barrier(bio))) 1237 if (unlikely(bio_empty_barrier(bio)))
@@ -1785,7 +1793,8 @@ static struct mapped_device *alloc_dev(int minor)
1785 if (!md->disk) 1793 if (!md->disk)
1786 goto bad_disk; 1794 goto bad_disk;
1787 1795
1788 atomic_set(&md->pending, 0); 1796 atomic_set(&md->pending[0], 0);
1797 atomic_set(&md->pending[1], 0);
1789 init_waitqueue_head(&md->wait); 1798 init_waitqueue_head(&md->wait);
1790 INIT_WORK(&md->work, dm_wq_work); 1799 INIT_WORK(&md->work, dm_wq_work);
1791 init_waitqueue_head(&md->eventq); 1800 init_waitqueue_head(&md->eventq);
@@ -1819,6 +1828,7 @@ static struct mapped_device *alloc_dev(int minor)
1819bad_bdev: 1828bad_bdev:
1820 destroy_workqueue(md->wq); 1829 destroy_workqueue(md->wq);
1821bad_thread: 1830bad_thread:
1831 del_gendisk(md->disk);
1822 put_disk(md->disk); 1832 put_disk(md->disk);
1823bad_disk: 1833bad_disk:
1824 blk_cleanup_queue(md->queue); 1834 blk_cleanup_queue(md->queue);
@@ -2088,7 +2098,8 @@ static int dm_wait_for_completion(struct mapped_device *md, int interruptible)
2088 break; 2098 break;
2089 } 2099 }
2090 spin_unlock_irqrestore(q->queue_lock, flags); 2100 spin_unlock_irqrestore(q->queue_lock, flags);
2091 } else if (!atomic_read(&md->pending)) 2101 } else if (!atomic_read(&md->pending[0]) &&
2102 !atomic_read(&md->pending[1]))
2092 break; 2103 break;
2093 2104
2094 if (interruptible == TASK_INTERRUPTIBLE && 2105 if (interruptible == TASK_INTERRUPTIBLE &&
diff --git a/drivers/md/md.c b/drivers/md/md.c
index 26ba42a79129..b182f86a19dd 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -944,6 +944,14 @@ static int super_90_validate(mddev_t *mddev, mdk_rdev_t *rdev)
944 desc->raid_disk < mddev->raid_disks */) { 944 desc->raid_disk < mddev->raid_disks */) {
945 set_bit(In_sync, &rdev->flags); 945 set_bit(In_sync, &rdev->flags);
946 rdev->raid_disk = desc->raid_disk; 946 rdev->raid_disk = desc->raid_disk;
947 } else if (desc->state & (1<<MD_DISK_ACTIVE)) {
948 /* active but not in sync implies recovery up to
949 * reshape position. We don't know exactly where
950 * that is, so set to zero for now */
951 if (mddev->minor_version >= 91) {
952 rdev->recovery_offset = 0;
953 rdev->raid_disk = desc->raid_disk;
954 }
947 } 955 }
948 if (desc->state & (1<<MD_DISK_WRITEMOSTLY)) 956 if (desc->state & (1<<MD_DISK_WRITEMOSTLY))
949 set_bit(WriteMostly, &rdev->flags); 957 set_bit(WriteMostly, &rdev->flags);
@@ -1032,8 +1040,19 @@ static void super_90_sync(mddev_t *mddev, mdk_rdev_t *rdev)
1032 list_for_each_entry(rdev2, &mddev->disks, same_set) { 1040 list_for_each_entry(rdev2, &mddev->disks, same_set) {
1033 mdp_disk_t *d; 1041 mdp_disk_t *d;
1034 int desc_nr; 1042 int desc_nr;
1035 if (rdev2->raid_disk >= 0 && test_bit(In_sync, &rdev2->flags) 1043 int is_active = test_bit(In_sync, &rdev2->flags);
1036 && !test_bit(Faulty, &rdev2->flags)) 1044
1045 if (rdev2->raid_disk >= 0 &&
1046 sb->minor_version >= 91)
1047 /* we have nowhere to store the recovery_offset,
1048 * but if it is not below the reshape_position,
1049 * we can piggy-back on that.
1050 */
1051 is_active = 1;
1052 if (rdev2->raid_disk < 0 ||
1053 test_bit(Faulty, &rdev2->flags))
1054 is_active = 0;
1055 if (is_active)
1037 desc_nr = rdev2->raid_disk; 1056 desc_nr = rdev2->raid_disk;
1038 else 1057 else
1039 desc_nr = next_spare++; 1058 desc_nr = next_spare++;
@@ -1043,16 +1062,16 @@ static void super_90_sync(mddev_t *mddev, mdk_rdev_t *rdev)
1043 d->number = rdev2->desc_nr; 1062 d->number = rdev2->desc_nr;
1044 d->major = MAJOR(rdev2->bdev->bd_dev); 1063 d->major = MAJOR(rdev2->bdev->bd_dev);
1045 d->minor = MINOR(rdev2->bdev->bd_dev); 1064 d->minor = MINOR(rdev2->bdev->bd_dev);
1046 if (rdev2->raid_disk >= 0 && test_bit(In_sync, &rdev2->flags) 1065 if (is_active)
1047 && !test_bit(Faulty, &rdev2->flags))
1048 d->raid_disk = rdev2->raid_disk; 1066 d->raid_disk = rdev2->raid_disk;
1049 else 1067 else
1050 d->raid_disk = rdev2->desc_nr; /* compatibility */ 1068 d->raid_disk = rdev2->desc_nr; /* compatibility */
1051 if (test_bit(Faulty, &rdev2->flags)) 1069 if (test_bit(Faulty, &rdev2->flags))
1052 d->state = (1<<MD_DISK_FAULTY); 1070 d->state = (1<<MD_DISK_FAULTY);
1053 else if (test_bit(In_sync, &rdev2->flags)) { 1071 else if (is_active) {
1054 d->state = (1<<MD_DISK_ACTIVE); 1072 d->state = (1<<MD_DISK_ACTIVE);
1055 d->state |= (1<<MD_DISK_SYNC); 1073 if (test_bit(In_sync, &rdev2->flags))
1074 d->state |= (1<<MD_DISK_SYNC);
1056 active++; 1075 active++;
1057 working++; 1076 working++;
1058 } else { 1077 } else {
@@ -1382,8 +1401,6 @@ static void super_1_sync(mddev_t *mddev, mdk_rdev_t *rdev)
1382 1401
1383 if (rdev->raid_disk >= 0 && 1402 if (rdev->raid_disk >= 0 &&
1384 !test_bit(In_sync, &rdev->flags)) { 1403 !test_bit(In_sync, &rdev->flags)) {
1385 if (mddev->curr_resync_completed > rdev->recovery_offset)
1386 rdev->recovery_offset = mddev->curr_resync_completed;
1387 if (rdev->recovery_offset > 0) { 1404 if (rdev->recovery_offset > 0) {
1388 sb->feature_map |= 1405 sb->feature_map |=
1389 cpu_to_le32(MD_FEATURE_RECOVERY_OFFSET); 1406 cpu_to_le32(MD_FEATURE_RECOVERY_OFFSET);
@@ -1917,6 +1934,14 @@ static void sync_sbs(mddev_t * mddev, int nospares)
1917 */ 1934 */
1918 mdk_rdev_t *rdev; 1935 mdk_rdev_t *rdev;
1919 1936
1937 /* First make sure individual recovery_offsets are correct */
1938 list_for_each_entry(rdev, &mddev->disks, same_set) {
1939 if (rdev->raid_disk >= 0 &&
1940 !test_bit(In_sync, &rdev->flags) &&
1941 mddev->curr_resync_completed > rdev->recovery_offset)
1942 rdev->recovery_offset = mddev->curr_resync_completed;
1943
1944 }
1920 list_for_each_entry(rdev, &mddev->disks, same_set) { 1945 list_for_each_entry(rdev, &mddev->disks, same_set) {
1921 if (rdev->sb_events == mddev->events || 1946 if (rdev->sb_events == mddev->events ||
1922 (nospares && 1947 (nospares &&
@@ -2631,7 +2656,7 @@ static void analyze_sbs(mddev_t * mddev)
2631 rdev->desc_nr = i++; 2656 rdev->desc_nr = i++;
2632 rdev->raid_disk = rdev->desc_nr; 2657 rdev->raid_disk = rdev->desc_nr;
2633 set_bit(In_sync, &rdev->flags); 2658 set_bit(In_sync, &rdev->flags);
2634 } else if (rdev->raid_disk >= mddev->raid_disks) { 2659 } else if (rdev->raid_disk >= (mddev->raid_disks - min(0, mddev->delta_disks))) {
2635 rdev->raid_disk = -1; 2660 rdev->raid_disk = -1;
2636 clear_bit(In_sync, &rdev->flags); 2661 clear_bit(In_sync, &rdev->flags);
2637 } 2662 }
@@ -6504,8 +6529,9 @@ void md_do_sync(mddev_t *mddev)
6504 skip: 6529 skip:
6505 mddev->curr_resync = 0; 6530 mddev->curr_resync = 0;
6506 mddev->curr_resync_completed = 0; 6531 mddev->curr_resync_completed = 0;
6507 mddev->resync_min = 0; 6532 if (!test_bit(MD_RECOVERY_INTR, &mddev->recovery))
6508 mddev->resync_max = MaxSector; 6533 /* We completed so max setting can be forgotten. */
6534 mddev->resync_max = MaxSector;
6509 sysfs_notify(&mddev->kobj, NULL, "sync_completed"); 6535 sysfs_notify(&mddev->kobj, NULL, "sync_completed");
6510 wake_up(&resync_wait); 6536 wake_up(&resync_wait);
6511 set_bit(MD_RECOVERY_DONE, &mddev->recovery); 6537 set_bit(MD_RECOVERY_DONE, &mddev->recovery);
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index d1b9bd5fd4f6..a053423785c9 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -64,7 +64,7 @@ static void * r1bio_pool_alloc(gfp_t gfp_flags, void *data)
64 64
65 /* allocate a r1bio with room for raid_disks entries in the bios array */ 65 /* allocate a r1bio with room for raid_disks entries in the bios array */
66 r1_bio = kzalloc(size, gfp_flags); 66 r1_bio = kzalloc(size, gfp_flags);
67 if (!r1_bio) 67 if (!r1_bio && pi->mddev)
68 unplug_slaves(pi->mddev); 68 unplug_slaves(pi->mddev);
69 69
70 return r1_bio; 70 return r1_bio;
@@ -1683,6 +1683,7 @@ static void raid1d(mddev_t *mddev)
1683 generic_make_request(bio); 1683 generic_make_request(bio);
1684 } 1684 }
1685 } 1685 }
1686 cond_resched();
1686 } 1687 }
1687 if (unplug) 1688 if (unplug)
1688 unplug_slaves(mddev); 1689 unplug_slaves(mddev);
@@ -1978,13 +1979,14 @@ static int run(mddev_t *mddev)
1978 conf->poolinfo = kmalloc(sizeof(*conf->poolinfo), GFP_KERNEL); 1979 conf->poolinfo = kmalloc(sizeof(*conf->poolinfo), GFP_KERNEL);
1979 if (!conf->poolinfo) 1980 if (!conf->poolinfo)
1980 goto out_no_mem; 1981 goto out_no_mem;
1981 conf->poolinfo->mddev = mddev; 1982 conf->poolinfo->mddev = NULL;
1982 conf->poolinfo->raid_disks = mddev->raid_disks; 1983 conf->poolinfo->raid_disks = mddev->raid_disks;
1983 conf->r1bio_pool = mempool_create(NR_RAID1_BIOS, r1bio_pool_alloc, 1984 conf->r1bio_pool = mempool_create(NR_RAID1_BIOS, r1bio_pool_alloc,
1984 r1bio_pool_free, 1985 r1bio_pool_free,
1985 conf->poolinfo); 1986 conf->poolinfo);
1986 if (!conf->r1bio_pool) 1987 if (!conf->r1bio_pool)
1987 goto out_no_mem; 1988 goto out_no_mem;
1989 conf->poolinfo->mddev = mddev;
1988 1990
1989 spin_lock_init(&conf->device_lock); 1991 spin_lock_init(&conf->device_lock);
1990 mddev->queue->queue_lock = &conf->device_lock; 1992 mddev->queue->queue_lock = &conf->device_lock;
diff --git a/drivers/md/raid10.c b/drivers/md/raid10.c
index 51c4c5c4d87a..c2cb7b87b440 100644
--- a/drivers/md/raid10.c
+++ b/drivers/md/raid10.c
@@ -68,7 +68,7 @@ static void * r10bio_pool_alloc(gfp_t gfp_flags, void *data)
68 68
69 /* allocate a r10bio with room for raid_disks entries in the bios array */ 69 /* allocate a r10bio with room for raid_disks entries in the bios array */
70 r10_bio = kzalloc(size, gfp_flags); 70 r10_bio = kzalloc(size, gfp_flags);
71 if (!r10_bio) 71 if (!r10_bio && conf->mddev)
72 unplug_slaves(conf->mddev); 72 unplug_slaves(conf->mddev);
73 73
74 return r10_bio; 74 return r10_bio;
@@ -1632,6 +1632,7 @@ static void raid10d(mddev_t *mddev)
1632 generic_make_request(bio); 1632 generic_make_request(bio);
1633 } 1633 }
1634 } 1634 }
1635 cond_resched();
1635 } 1636 }
1636 if (unplug) 1637 if (unplug)
1637 unplug_slaves(mddev); 1638 unplug_slaves(mddev);
@@ -2095,7 +2096,6 @@ static int run(mddev_t *mddev)
2095 if (!conf->tmppage) 2096 if (!conf->tmppage)
2096 goto out_free_conf; 2097 goto out_free_conf;
2097 2098
2098 conf->mddev = mddev;
2099 conf->raid_disks = mddev->raid_disks; 2099 conf->raid_disks = mddev->raid_disks;
2100 conf->near_copies = nc; 2100 conf->near_copies = nc;
2101 conf->far_copies = fc; 2101 conf->far_copies = fc;
@@ -2132,6 +2132,7 @@ static int run(mddev_t *mddev)
2132 goto out_free_conf; 2132 goto out_free_conf;
2133 } 2133 }
2134 2134
2135 conf->mddev = mddev;
2135 spin_lock_init(&conf->device_lock); 2136 spin_lock_init(&conf->device_lock);
2136 mddev->queue->queue_lock = &conf->device_lock; 2137 mddev->queue->queue_lock = &conf->device_lock;
2137 2138
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 94829804ab7f..d29215d966da 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -156,13 +156,16 @@ static inline int raid6_next_disk(int disk, int raid_disks)
156static int raid6_idx_to_slot(int idx, struct stripe_head *sh, 156static int raid6_idx_to_slot(int idx, struct stripe_head *sh,
157 int *count, int syndrome_disks) 157 int *count, int syndrome_disks)
158{ 158{
159 int slot; 159 int slot = *count;
160 160
161 if (sh->ddf_layout)
162 (*count)++;
161 if (idx == sh->pd_idx) 163 if (idx == sh->pd_idx)
162 return syndrome_disks; 164 return syndrome_disks;
163 if (idx == sh->qd_idx) 165 if (idx == sh->qd_idx)
164 return syndrome_disks + 1; 166 return syndrome_disks + 1;
165 slot = (*count)++; 167 if (!sh->ddf_layout)
168 (*count)++;
166 return slot; 169 return slot;
167} 170}
168 171
@@ -717,7 +720,7 @@ static int set_syndrome_sources(struct page **srcs, struct stripe_head *sh)
717 int i; 720 int i;
718 721
719 for (i = 0; i < disks; i++) 722 for (i = 0; i < disks; i++)
720 srcs[i] = (void *)raid6_empty_zero_page; 723 srcs[i] = NULL;
721 724
722 count = 0; 725 count = 0;
723 i = d0_idx; 726 i = d0_idx;
@@ -727,9 +730,8 @@ static int set_syndrome_sources(struct page **srcs, struct stripe_head *sh)
727 srcs[slot] = sh->dev[i].page; 730 srcs[slot] = sh->dev[i].page;
728 i = raid6_next_disk(i, disks); 731 i = raid6_next_disk(i, disks);
729 } while (i != d0_idx); 732 } while (i != d0_idx);
730 BUG_ON(count != syndrome_disks);
731 733
732 return count; 734 return syndrome_disks;
733} 735}
734 736
735static struct dma_async_tx_descriptor * 737static struct dma_async_tx_descriptor *
@@ -814,7 +816,7 @@ ops_run_compute6_2(struct stripe_head *sh, struct raid5_percpu *percpu)
814 * slot number conversion for 'faila' and 'failb' 816 * slot number conversion for 'faila' and 'failb'
815 */ 817 */
816 for (i = 0; i < disks ; i++) 818 for (i = 0; i < disks ; i++)
817 blocks[i] = (void *)raid6_empty_zero_page; 819 blocks[i] = NULL;
818 count = 0; 820 count = 0;
819 i = d0_idx; 821 i = d0_idx;
820 do { 822 do {
@@ -828,7 +830,6 @@ ops_run_compute6_2(struct stripe_head *sh, struct raid5_percpu *percpu)
828 failb = slot; 830 failb = slot;
829 i = raid6_next_disk(i, disks); 831 i = raid6_next_disk(i, disks);
830 } while (i != d0_idx); 832 } while (i != d0_idx);
831 BUG_ON(count != syndrome_disks);
832 833
833 BUG_ON(faila == failb); 834 BUG_ON(faila == failb);
834 if (failb < faila) 835 if (failb < faila)
@@ -845,7 +846,7 @@ ops_run_compute6_2(struct stripe_head *sh, struct raid5_percpu *percpu)
845 init_async_submit(&submit, ASYNC_TX_FENCE, NULL, 846 init_async_submit(&submit, ASYNC_TX_FENCE, NULL,
846 ops_complete_compute, sh, 847 ops_complete_compute, sh,
847 to_addr_conv(sh, percpu)); 848 to_addr_conv(sh, percpu));
848 return async_gen_syndrome(blocks, 0, count+2, 849 return async_gen_syndrome(blocks, 0, syndrome_disks+2,
849 STRIPE_SIZE, &submit); 850 STRIPE_SIZE, &submit);
850 } else { 851 } else {
851 struct page *dest; 852 struct page *dest;
@@ -1139,7 +1140,7 @@ static void ops_run_check_pq(struct stripe_head *sh, struct raid5_percpu *percpu
1139 &sh->ops.zero_sum_result, percpu->spare_page, &submit); 1140 &sh->ops.zero_sum_result, percpu->spare_page, &submit);
1140} 1141}
1141 1142
1142static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request) 1143static void __raid_run_ops(struct stripe_head *sh, unsigned long ops_request)
1143{ 1144{
1144 int overlap_clear = 0, i, disks = sh->disks; 1145 int overlap_clear = 0, i, disks = sh->disks;
1145 struct dma_async_tx_descriptor *tx = NULL; 1146 struct dma_async_tx_descriptor *tx = NULL;
@@ -1204,22 +1205,55 @@ static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request)
1204 put_cpu(); 1205 put_cpu();
1205} 1206}
1206 1207
1208#ifdef CONFIG_MULTICORE_RAID456
1209static void async_run_ops(void *param, async_cookie_t cookie)
1210{
1211 struct stripe_head *sh = param;
1212 unsigned long ops_request = sh->ops.request;
1213
1214 clear_bit_unlock(STRIPE_OPS_REQ_PENDING, &sh->state);
1215 wake_up(&sh->ops.wait_for_ops);
1216
1217 __raid_run_ops(sh, ops_request);
1218 release_stripe(sh);
1219}
1220
1221static void raid_run_ops(struct stripe_head *sh, unsigned long ops_request)
1222{
1223 /* since handle_stripe can be called outside of raid5d context
1224 * we need to ensure sh->ops.request is de-staged before another
1225 * request arrives
1226 */
1227 wait_event(sh->ops.wait_for_ops,
1228 !test_and_set_bit_lock(STRIPE_OPS_REQ_PENDING, &sh->state));
1229 sh->ops.request = ops_request;
1230
1231 atomic_inc(&sh->count);
1232 async_schedule(async_run_ops, sh);
1233}
1234#else
1235#define raid_run_ops __raid_run_ops
1236#endif
1237
1207static int grow_one_stripe(raid5_conf_t *conf) 1238static int grow_one_stripe(raid5_conf_t *conf)
1208{ 1239{
1209 struct stripe_head *sh; 1240 struct stripe_head *sh;
1241 int disks = max(conf->raid_disks, conf->previous_raid_disks);
1210 sh = kmem_cache_alloc(conf->slab_cache, GFP_KERNEL); 1242 sh = kmem_cache_alloc(conf->slab_cache, GFP_KERNEL);
1211 if (!sh) 1243 if (!sh)
1212 return 0; 1244 return 0;
1213 memset(sh, 0, sizeof(*sh) + (conf->raid_disks-1)*sizeof(struct r5dev)); 1245 memset(sh, 0, sizeof(*sh) + (disks-1)*sizeof(struct r5dev));
1214 sh->raid_conf = conf; 1246 sh->raid_conf = conf;
1215 spin_lock_init(&sh->lock); 1247 spin_lock_init(&sh->lock);
1248 #ifdef CONFIG_MULTICORE_RAID456
1249 init_waitqueue_head(&sh->ops.wait_for_ops);
1250 #endif
1216 1251
1217 if (grow_buffers(sh, conf->raid_disks)) { 1252 if (grow_buffers(sh, disks)) {
1218 shrink_buffers(sh, conf->raid_disks); 1253 shrink_buffers(sh, disks);
1219 kmem_cache_free(conf->slab_cache, sh); 1254 kmem_cache_free(conf->slab_cache, sh);
1220 return 0; 1255 return 0;
1221 } 1256 }
1222 sh->disks = conf->raid_disks;
1223 /* we just created an active stripe so... */ 1257 /* we just created an active stripe so... */
1224 atomic_set(&sh->count, 1); 1258 atomic_set(&sh->count, 1);
1225 atomic_inc(&conf->active_stripes); 1259 atomic_inc(&conf->active_stripes);
@@ -1231,7 +1265,7 @@ static int grow_one_stripe(raid5_conf_t *conf)
1231static int grow_stripes(raid5_conf_t *conf, int num) 1265static int grow_stripes(raid5_conf_t *conf, int num)
1232{ 1266{
1233 struct kmem_cache *sc; 1267 struct kmem_cache *sc;
1234 int devs = conf->raid_disks; 1268 int devs = max(conf->raid_disks, conf->previous_raid_disks);
1235 1269
1236 sprintf(conf->cache_name[0], 1270 sprintf(conf->cache_name[0],
1237 "raid%d-%s", conf->level, mdname(conf->mddev)); 1271 "raid%d-%s", conf->level, mdname(conf->mddev));
@@ -1329,6 +1363,9 @@ static int resize_stripes(raid5_conf_t *conf, int newsize)
1329 1363
1330 nsh->raid_conf = conf; 1364 nsh->raid_conf = conf;
1331 spin_lock_init(&nsh->lock); 1365 spin_lock_init(&nsh->lock);
1366 #ifdef CONFIG_MULTICORE_RAID456
1367 init_waitqueue_head(&nsh->ops.wait_for_ops);
1368 #endif
1332 1369
1333 list_add(&nsh->lru, &newstripes); 1370 list_add(&nsh->lru, &newstripes);
1334 } 1371 }
@@ -1899,10 +1936,15 @@ static sector_t compute_blocknr(struct stripe_head *sh, int i, int previous)
1899 case ALGORITHM_PARITY_N: 1936 case ALGORITHM_PARITY_N:
1900 break; 1937 break;
1901 case ALGORITHM_ROTATING_N_CONTINUE: 1938 case ALGORITHM_ROTATING_N_CONTINUE:
1939 /* Like left_symmetric, but P is before Q */
1902 if (sh->pd_idx == 0) 1940 if (sh->pd_idx == 0)
1903 i--; /* P D D D Q */ 1941 i--; /* P D D D Q */
1904 else if (i > sh->pd_idx) 1942 else {
1905 i -= 2; /* D D Q P D */ 1943 /* D D Q P D */
1944 if (i < sh->pd_idx)
1945 i += raid_disks;
1946 i -= (sh->pd_idx + 1);
1947 }
1906 break; 1948 break;
1907 case ALGORITHM_LEFT_ASYMMETRIC_6: 1949 case ALGORITHM_LEFT_ASYMMETRIC_6:
1908 case ALGORITHM_RIGHT_ASYMMETRIC_6: 1950 case ALGORITHM_RIGHT_ASYMMETRIC_6:
@@ -2896,7 +2938,7 @@ static void handle_stripe_expansion(raid5_conf_t *conf, struct stripe_head *sh,
2896 * 2938 *
2897 */ 2939 */
2898 2940
2899static bool handle_stripe5(struct stripe_head *sh) 2941static void handle_stripe5(struct stripe_head *sh)
2900{ 2942{
2901 raid5_conf_t *conf = sh->raid_conf; 2943 raid5_conf_t *conf = sh->raid_conf;
2902 int disks = sh->disks, i; 2944 int disks = sh->disks, i;
@@ -3167,11 +3209,9 @@ static bool handle_stripe5(struct stripe_head *sh)
3167 ops_run_io(sh, &s); 3209 ops_run_io(sh, &s);
3168 3210
3169 return_io(return_bi); 3211 return_io(return_bi);
3170
3171 return blocked_rdev == NULL;
3172} 3212}
3173 3213
3174static bool handle_stripe6(struct stripe_head *sh) 3214static void handle_stripe6(struct stripe_head *sh)
3175{ 3215{
3176 raid5_conf_t *conf = sh->raid_conf; 3216 raid5_conf_t *conf = sh->raid_conf;
3177 int disks = sh->disks; 3217 int disks = sh->disks;
@@ -3455,17 +3495,14 @@ static bool handle_stripe6(struct stripe_head *sh)
3455 ops_run_io(sh, &s); 3495 ops_run_io(sh, &s);
3456 3496
3457 return_io(return_bi); 3497 return_io(return_bi);
3458
3459 return blocked_rdev == NULL;
3460} 3498}
3461 3499
3462/* returns true if the stripe was handled */ 3500static void handle_stripe(struct stripe_head *sh)
3463static bool handle_stripe(struct stripe_head *sh)
3464{ 3501{
3465 if (sh->raid_conf->level == 6) 3502 if (sh->raid_conf->level == 6)
3466 return handle_stripe6(sh); 3503 handle_stripe6(sh);
3467 else 3504 else
3468 return handle_stripe5(sh); 3505 handle_stripe5(sh);
3469} 3506}
3470 3507
3471static void raid5_activate_delayed(raid5_conf_t *conf) 3508static void raid5_activate_delayed(raid5_conf_t *conf)
@@ -3503,9 +3540,10 @@ static void unplug_slaves(mddev_t *mddev)
3503{ 3540{
3504 raid5_conf_t *conf = mddev->private; 3541 raid5_conf_t *conf = mddev->private;
3505 int i; 3542 int i;
3543 int devs = max(conf->raid_disks, conf->previous_raid_disks);
3506 3544
3507 rcu_read_lock(); 3545 rcu_read_lock();
3508 for (i = 0; i < conf->raid_disks; i++) { 3546 for (i = 0; i < devs; i++) {
3509 mdk_rdev_t *rdev = rcu_dereference(conf->disks[i].rdev); 3547 mdk_rdev_t *rdev = rcu_dereference(conf->disks[i].rdev);
3510 if (rdev && !test_bit(Faulty, &rdev->flags) && atomic_read(&rdev->nr_pending)) { 3548 if (rdev && !test_bit(Faulty, &rdev->flags) && atomic_read(&rdev->nr_pending)) {
3511 struct request_queue *r_queue = bdev_get_queue(rdev->bdev); 3549 struct request_queue *r_queue = bdev_get_queue(rdev->bdev);
@@ -4011,6 +4049,8 @@ static sector_t reshape_request(mddev_t *mddev, sector_t sector_nr, int *skipped
4011 sector_nr = conf->reshape_progress; 4049 sector_nr = conf->reshape_progress;
4012 sector_div(sector_nr, new_data_disks); 4050 sector_div(sector_nr, new_data_disks);
4013 if (sector_nr) { 4051 if (sector_nr) {
4052 mddev->curr_resync_completed = sector_nr;
4053 sysfs_notify(&mddev->kobj, NULL, "sync_completed");
4014 *skipped = 1; 4054 *skipped = 1;
4015 return sector_nr; 4055 return sector_nr;
4016 } 4056 }
@@ -4277,9 +4317,7 @@ static inline sector_t sync_request(mddev_t *mddev, sector_t sector_nr, int *ski
4277 clear_bit(STRIPE_INSYNC, &sh->state); 4317 clear_bit(STRIPE_INSYNC, &sh->state);
4278 spin_unlock(&sh->lock); 4318 spin_unlock(&sh->lock);
4279 4319
4280 /* wait for any blocked device to be handled */ 4320 handle_stripe(sh);
4281 while (unlikely(!handle_stripe(sh)))
4282 ;
4283 release_stripe(sh); 4321 release_stripe(sh);
4284 4322
4285 return STRIPE_SECTORS; 4323 return STRIPE_SECTORS;
@@ -4349,37 +4387,6 @@ static int retry_aligned_read(raid5_conf_t *conf, struct bio *raid_bio)
4349 return handled; 4387 return handled;
4350} 4388}
4351 4389
4352#ifdef CONFIG_MULTICORE_RAID456
4353static void __process_stripe(void *param, async_cookie_t cookie)
4354{
4355 struct stripe_head *sh = param;
4356
4357 handle_stripe(sh);
4358 release_stripe(sh);
4359}
4360
4361static void process_stripe(struct stripe_head *sh, struct list_head *domain)
4362{
4363 async_schedule_domain(__process_stripe, sh, domain);
4364}
4365
4366static void synchronize_stripe_processing(struct list_head *domain)
4367{
4368 async_synchronize_full_domain(domain);
4369}
4370#else
4371static void process_stripe(struct stripe_head *sh, struct list_head *domain)
4372{
4373 handle_stripe(sh);
4374 release_stripe(sh);
4375 cond_resched();
4376}
4377
4378static void synchronize_stripe_processing(struct list_head *domain)
4379{
4380}
4381#endif
4382
4383 4390
4384/* 4391/*
4385 * This is our raid5 kernel thread. 4392 * This is our raid5 kernel thread.
@@ -4393,7 +4400,6 @@ static void raid5d(mddev_t *mddev)
4393 struct stripe_head *sh; 4400 struct stripe_head *sh;
4394 raid5_conf_t *conf = mddev->private; 4401 raid5_conf_t *conf = mddev->private;
4395 int handled; 4402 int handled;
4396 LIST_HEAD(raid_domain);
4397 4403
4398 pr_debug("+++ raid5d active\n"); 4404 pr_debug("+++ raid5d active\n");
4399 4405
@@ -4430,7 +4436,9 @@ static void raid5d(mddev_t *mddev)
4430 spin_unlock_irq(&conf->device_lock); 4436 spin_unlock_irq(&conf->device_lock);
4431 4437
4432 handled++; 4438 handled++;
4433 process_stripe(sh, &raid_domain); 4439 handle_stripe(sh);
4440 release_stripe(sh);
4441 cond_resched();
4434 4442
4435 spin_lock_irq(&conf->device_lock); 4443 spin_lock_irq(&conf->device_lock);
4436 } 4444 }
@@ -4438,7 +4446,6 @@ static void raid5d(mddev_t *mddev)
4438 4446
4439 spin_unlock_irq(&conf->device_lock); 4447 spin_unlock_irq(&conf->device_lock);
4440 4448
4441 synchronize_stripe_processing(&raid_domain);
4442 async_tx_issue_pending_all(); 4449 async_tx_issue_pending_all();
4443 unplug_slaves(mddev); 4450 unplug_slaves(mddev);
4444 4451
@@ -4558,13 +4565,9 @@ raid5_size(mddev_t *mddev, sector_t sectors, int raid_disks)
4558 4565
4559 if (!sectors) 4566 if (!sectors)
4560 sectors = mddev->dev_sectors; 4567 sectors = mddev->dev_sectors;
4561 if (!raid_disks) { 4568 if (!raid_disks)
4562 /* size is defined by the smallest of previous and new size */ 4569 /* size is defined by the smallest of previous and new size */
4563 if (conf->raid_disks < conf->previous_raid_disks) 4570 raid_disks = min(conf->raid_disks, conf->previous_raid_disks);
4564 raid_disks = conf->raid_disks;
4565 else
4566 raid_disks = conf->previous_raid_disks;
4567 }
4568 4571
4569 sectors &= ~((sector_t)mddev->chunk_sectors - 1); 4572 sectors &= ~((sector_t)mddev->chunk_sectors - 1);
4570 sectors &= ~((sector_t)mddev->new_chunk_sectors - 1); 4573 sectors &= ~((sector_t)mddev->new_chunk_sectors - 1);
@@ -4665,7 +4668,7 @@ static int raid5_alloc_percpu(raid5_conf_t *conf)
4665 } 4668 }
4666 per_cpu_ptr(conf->percpu, cpu)->spare_page = spare_page; 4669 per_cpu_ptr(conf->percpu, cpu)->spare_page = spare_page;
4667 } 4670 }
4668 scribble = kmalloc(scribble_len(conf->raid_disks), GFP_KERNEL); 4671 scribble = kmalloc(conf->scribble_len, GFP_KERNEL);
4669 if (!scribble) { 4672 if (!scribble) {
4670 err = -ENOMEM; 4673 err = -ENOMEM;
4671 break; 4674 break;
@@ -4686,7 +4689,7 @@ static int raid5_alloc_percpu(raid5_conf_t *conf)
4686static raid5_conf_t *setup_conf(mddev_t *mddev) 4689static raid5_conf_t *setup_conf(mddev_t *mddev)
4687{ 4690{
4688 raid5_conf_t *conf; 4691 raid5_conf_t *conf;
4689 int raid_disk, memory; 4692 int raid_disk, memory, max_disks;
4690 mdk_rdev_t *rdev; 4693 mdk_rdev_t *rdev;
4691 struct disk_info *disk; 4694 struct disk_info *disk;
4692 4695
@@ -4722,15 +4725,28 @@ static raid5_conf_t *setup_conf(mddev_t *mddev)
4722 conf = kzalloc(sizeof(raid5_conf_t), GFP_KERNEL); 4725 conf = kzalloc(sizeof(raid5_conf_t), GFP_KERNEL);
4723 if (conf == NULL) 4726 if (conf == NULL)
4724 goto abort; 4727 goto abort;
4728 spin_lock_init(&conf->device_lock);
4729 init_waitqueue_head(&conf->wait_for_stripe);
4730 init_waitqueue_head(&conf->wait_for_overlap);
4731 INIT_LIST_HEAD(&conf->handle_list);
4732 INIT_LIST_HEAD(&conf->hold_list);
4733 INIT_LIST_HEAD(&conf->delayed_list);
4734 INIT_LIST_HEAD(&conf->bitmap_list);
4735 INIT_LIST_HEAD(&conf->inactive_list);
4736 atomic_set(&conf->active_stripes, 0);
4737 atomic_set(&conf->preread_active_stripes, 0);
4738 atomic_set(&conf->active_aligned_reads, 0);
4739 conf->bypass_threshold = BYPASS_THRESHOLD;
4725 4740
4726 conf->raid_disks = mddev->raid_disks; 4741 conf->raid_disks = mddev->raid_disks;
4727 conf->scribble_len = scribble_len(conf->raid_disks);
4728 if (mddev->reshape_position == MaxSector) 4742 if (mddev->reshape_position == MaxSector)
4729 conf->previous_raid_disks = mddev->raid_disks; 4743 conf->previous_raid_disks = mddev->raid_disks;
4730 else 4744 else
4731 conf->previous_raid_disks = mddev->raid_disks - mddev->delta_disks; 4745 conf->previous_raid_disks = mddev->raid_disks - mddev->delta_disks;
4746 max_disks = max(conf->raid_disks, conf->previous_raid_disks);
4747 conf->scribble_len = scribble_len(max_disks);
4732 4748
4733 conf->disks = kzalloc(conf->raid_disks * sizeof(struct disk_info), 4749 conf->disks = kzalloc(max_disks * sizeof(struct disk_info),
4734 GFP_KERNEL); 4750 GFP_KERNEL);
4735 if (!conf->disks) 4751 if (!conf->disks)
4736 goto abort; 4752 goto abort;
@@ -4744,24 +4760,11 @@ static raid5_conf_t *setup_conf(mddev_t *mddev)
4744 if (raid5_alloc_percpu(conf) != 0) 4760 if (raid5_alloc_percpu(conf) != 0)
4745 goto abort; 4761 goto abort;
4746 4762
4747 spin_lock_init(&conf->device_lock);
4748 init_waitqueue_head(&conf->wait_for_stripe);
4749 init_waitqueue_head(&conf->wait_for_overlap);
4750 INIT_LIST_HEAD(&conf->handle_list);
4751 INIT_LIST_HEAD(&conf->hold_list);
4752 INIT_LIST_HEAD(&conf->delayed_list);
4753 INIT_LIST_HEAD(&conf->bitmap_list);
4754 INIT_LIST_HEAD(&conf->inactive_list);
4755 atomic_set(&conf->active_stripes, 0);
4756 atomic_set(&conf->preread_active_stripes, 0);
4757 atomic_set(&conf->active_aligned_reads, 0);
4758 conf->bypass_threshold = BYPASS_THRESHOLD;
4759
4760 pr_debug("raid5: run(%s) called.\n", mdname(mddev)); 4763 pr_debug("raid5: run(%s) called.\n", mdname(mddev));
4761 4764
4762 list_for_each_entry(rdev, &mddev->disks, same_set) { 4765 list_for_each_entry(rdev, &mddev->disks, same_set) {
4763 raid_disk = rdev->raid_disk; 4766 raid_disk = rdev->raid_disk;
4764 if (raid_disk >= conf->raid_disks 4767 if (raid_disk >= max_disks
4765 || raid_disk < 0) 4768 || raid_disk < 0)
4766 continue; 4769 continue;
4767 disk = conf->disks + raid_disk; 4770 disk = conf->disks + raid_disk;
@@ -4793,7 +4796,7 @@ static raid5_conf_t *setup_conf(mddev_t *mddev)
4793 } 4796 }
4794 4797
4795 memory = conf->max_nr_stripes * (sizeof(struct stripe_head) + 4798 memory = conf->max_nr_stripes * (sizeof(struct stripe_head) +
4796 conf->raid_disks * ((sizeof(struct bio) + PAGE_SIZE))) / 1024; 4799 max_disks * ((sizeof(struct bio) + PAGE_SIZE))) / 1024;
4797 if (grow_stripes(conf, conf->max_nr_stripes)) { 4800 if (grow_stripes(conf, conf->max_nr_stripes)) {
4798 printk(KERN_ERR 4801 printk(KERN_ERR
4799 "raid5: couldn't allocate %dkB for buffers\n", memory); 4802 "raid5: couldn't allocate %dkB for buffers\n", memory);
@@ -4820,11 +4823,40 @@ static raid5_conf_t *setup_conf(mddev_t *mddev)
4820 return ERR_PTR(-ENOMEM); 4823 return ERR_PTR(-ENOMEM);
4821} 4824}
4822 4825
4826
4827static int only_parity(int raid_disk, int algo, int raid_disks, int max_degraded)
4828{
4829 switch (algo) {
4830 case ALGORITHM_PARITY_0:
4831 if (raid_disk < max_degraded)
4832 return 1;
4833 break;
4834 case ALGORITHM_PARITY_N:
4835 if (raid_disk >= raid_disks - max_degraded)
4836 return 1;
4837 break;
4838 case ALGORITHM_PARITY_0_6:
4839 if (raid_disk == 0 ||
4840 raid_disk == raid_disks - 1)
4841 return 1;
4842 break;
4843 case ALGORITHM_LEFT_ASYMMETRIC_6:
4844 case ALGORITHM_RIGHT_ASYMMETRIC_6:
4845 case ALGORITHM_LEFT_SYMMETRIC_6:
4846 case ALGORITHM_RIGHT_SYMMETRIC_6:
4847 if (raid_disk == raid_disks - 1)
4848 return 1;
4849 }
4850 return 0;
4851}
4852
4823static int run(mddev_t *mddev) 4853static int run(mddev_t *mddev)
4824{ 4854{
4825 raid5_conf_t *conf; 4855 raid5_conf_t *conf;
4826 int working_disks = 0, chunk_size; 4856 int working_disks = 0, chunk_size;
4857 int dirty_parity_disks = 0;
4827 mdk_rdev_t *rdev; 4858 mdk_rdev_t *rdev;
4859 sector_t reshape_offset = 0;
4828 4860
4829 if (mddev->recovery_cp != MaxSector) 4861 if (mddev->recovery_cp != MaxSector)
4830 printk(KERN_NOTICE "raid5: %s is not clean" 4862 printk(KERN_NOTICE "raid5: %s is not clean"
@@ -4858,6 +4890,7 @@ static int run(mddev_t *mddev)
4858 "on a stripe boundary\n"); 4890 "on a stripe boundary\n");
4859 return -EINVAL; 4891 return -EINVAL;
4860 } 4892 }
4893 reshape_offset = here_new * mddev->new_chunk_sectors;
4861 /* here_new is the stripe we will write to */ 4894 /* here_new is the stripe we will write to */
4862 here_old = mddev->reshape_position; 4895 here_old = mddev->reshape_position;
4863 sector_div(here_old, mddev->chunk_sectors * 4896 sector_div(here_old, mddev->chunk_sectors *
@@ -4913,12 +4946,54 @@ static int run(mddev_t *mddev)
4913 /* 4946 /*
4914 * 0 for a fully functional array, 1 or 2 for a degraded array. 4947 * 0 for a fully functional array, 1 or 2 for a degraded array.
4915 */ 4948 */
4916 list_for_each_entry(rdev, &mddev->disks, same_set) 4949 list_for_each_entry(rdev, &mddev->disks, same_set) {
4917 if (rdev->raid_disk >= 0 && 4950 if (rdev->raid_disk < 0)
4918 test_bit(In_sync, &rdev->flags)) 4951 continue;
4952 if (test_bit(In_sync, &rdev->flags))
4919 working_disks++; 4953 working_disks++;
4954 /* This disc is not fully in-sync. However if it
4955 * just stored parity (beyond the recovery_offset),
4956 * when we don't need to be concerned about the
4957 * array being dirty.
4958 * When reshape goes 'backwards', we never have
4959 * partially completed devices, so we only need
4960 * to worry about reshape going forwards.
4961 */
4962 /* Hack because v0.91 doesn't store recovery_offset properly. */
4963 if (mddev->major_version == 0 &&
4964 mddev->minor_version > 90)
4965 rdev->recovery_offset = reshape_offset;
4966
4967 printk("%d: w=%d pa=%d pr=%d m=%d a=%d r=%d op1=%d op2=%d\n",
4968 rdev->raid_disk, working_disks, conf->prev_algo,
4969 conf->previous_raid_disks, conf->max_degraded,
4970 conf->algorithm, conf->raid_disks,
4971 only_parity(rdev->raid_disk,
4972 conf->prev_algo,
4973 conf->previous_raid_disks,
4974 conf->max_degraded),
4975 only_parity(rdev->raid_disk,
4976 conf->algorithm,
4977 conf->raid_disks,
4978 conf->max_degraded));
4979 if (rdev->recovery_offset < reshape_offset) {
4980 /* We need to check old and new layout */
4981 if (!only_parity(rdev->raid_disk,
4982 conf->algorithm,
4983 conf->raid_disks,
4984 conf->max_degraded))
4985 continue;
4986 }
4987 if (!only_parity(rdev->raid_disk,
4988 conf->prev_algo,
4989 conf->previous_raid_disks,
4990 conf->max_degraded))
4991 continue;
4992 dirty_parity_disks++;
4993 }
4920 4994
4921 mddev->degraded = conf->raid_disks - working_disks; 4995 mddev->degraded = (max(conf->raid_disks, conf->previous_raid_disks)
4996 - working_disks);
4922 4997
4923 if (mddev->degraded > conf->max_degraded) { 4998 if (mddev->degraded > conf->max_degraded) {
4924 printk(KERN_ERR "raid5: not enough operational devices for %s" 4999 printk(KERN_ERR "raid5: not enough operational devices for %s"
@@ -4931,7 +5006,7 @@ static int run(mddev_t *mddev)
4931 mddev->dev_sectors &= ~(mddev->chunk_sectors - 1); 5006 mddev->dev_sectors &= ~(mddev->chunk_sectors - 1);
4932 mddev->resync_max_sectors = mddev->dev_sectors; 5007 mddev->resync_max_sectors = mddev->dev_sectors;
4933 5008
4934 if (mddev->degraded > 0 && 5009 if (mddev->degraded > dirty_parity_disks &&
4935 mddev->recovery_cp != MaxSector) { 5010 mddev->recovery_cp != MaxSector) {
4936 if (mddev->ok_start_degraded) 5011 if (mddev->ok_start_degraded)
4937 printk(KERN_WARNING 5012 printk(KERN_WARNING
@@ -5357,9 +5432,11 @@ static int raid5_start_reshape(mddev_t *mddev)
5357 !test_bit(Faulty, &rdev->flags)) { 5432 !test_bit(Faulty, &rdev->flags)) {
5358 if (raid5_add_disk(mddev, rdev) == 0) { 5433 if (raid5_add_disk(mddev, rdev) == 0) {
5359 char nm[20]; 5434 char nm[20];
5360 set_bit(In_sync, &rdev->flags); 5435 if (rdev->raid_disk >= conf->previous_raid_disks)
5436 set_bit(In_sync, &rdev->flags);
5437 else
5438 rdev->recovery_offset = 0;
5361 added_devices++; 5439 added_devices++;
5362 rdev->recovery_offset = 0;
5363 sprintf(nm, "rd%d", rdev->raid_disk); 5440 sprintf(nm, "rd%d", rdev->raid_disk);
5364 if (sysfs_create_link(&mddev->kobj, 5441 if (sysfs_create_link(&mddev->kobj,
5365 &rdev->kobj, nm)) 5442 &rdev->kobj, nm))
diff --git a/drivers/md/raid5.h b/drivers/md/raid5.h
index 2390e0e83daf..dd708359b451 100644
--- a/drivers/md/raid5.h
+++ b/drivers/md/raid5.h
@@ -214,12 +214,20 @@ struct stripe_head {
214 int disks; /* disks in stripe */ 214 int disks; /* disks in stripe */
215 enum check_states check_state; 215 enum check_states check_state;
216 enum reconstruct_states reconstruct_state; 216 enum reconstruct_states reconstruct_state;
217 /* stripe_operations 217 /**
218 * struct stripe_operations
218 * @target - STRIPE_OP_COMPUTE_BLK target 219 * @target - STRIPE_OP_COMPUTE_BLK target
220 * @target2 - 2nd compute target in the raid6 case
221 * @zero_sum_result - P and Q verification flags
222 * @request - async service request flags for raid_run_ops
219 */ 223 */
220 struct stripe_operations { 224 struct stripe_operations {
221 int target, target2; 225 int target, target2;
222 enum sum_check_flags zero_sum_result; 226 enum sum_check_flags zero_sum_result;
227 #ifdef CONFIG_MULTICORE_RAID456
228 unsigned long request;
229 wait_queue_head_t wait_for_ops;
230 #endif
223 } ops; 231 } ops;
224 struct r5dev { 232 struct r5dev {
225 struct bio req; 233 struct bio req;
@@ -294,6 +302,8 @@ struct r6_state {
294#define STRIPE_FULL_WRITE 13 /* all blocks are set to be overwritten */ 302#define STRIPE_FULL_WRITE 13 /* all blocks are set to be overwritten */
295#define STRIPE_BIOFILL_RUN 14 303#define STRIPE_BIOFILL_RUN 14
296#define STRIPE_COMPUTE_RUN 15 304#define STRIPE_COMPUTE_RUN 15
305#define STRIPE_OPS_REQ_PENDING 16
306
297/* 307/*
298 * Operation request flags 308 * Operation request flags
299 */ 309 */
@@ -478,7 +488,7 @@ static inline int algorithm_valid_raid6(int layout)
478{ 488{
479 return (layout >= 0 && layout <= 5) 489 return (layout >= 0 && layout <= 5)
480 || 490 ||
481 (layout == 8 || layout == 10) 491 (layout >= 8 && layout <= 10)
482 || 492 ||
483 (layout >= 16 && layout <= 20); 493 (layout >= 16 && layout <= 20);
484} 494}
diff --git a/drivers/md/raid6altivec.uc b/drivers/md/raid6altivec.uc
index 699dfeee4944..2654d5c854be 100644
--- a/drivers/md/raid6altivec.uc
+++ b/drivers/md/raid6altivec.uc
@@ -15,7 +15,7 @@
15 * 15 *
16 * $#-way unrolled portable integer math RAID-6 instruction set 16 * $#-way unrolled portable integer math RAID-6 instruction set
17 * 17 *
18 * This file is postprocessed using unroll.pl 18 * This file is postprocessed using unroll.awk
19 * 19 *
20 * <benh> hpa: in process, 20 * <benh> hpa: in process,
21 * you can just "steal" the vec unit with enable_kernel_altivec() (but 21 * you can just "steal" the vec unit with enable_kernel_altivec() (but
diff --git a/drivers/md/raid6int.uc b/drivers/md/raid6int.uc
index f9bf9cba357f..d1e276a14fab 100644
--- a/drivers/md/raid6int.uc
+++ b/drivers/md/raid6int.uc
@@ -15,7 +15,7 @@
15 * 15 *
16 * $#-way unrolled portable integer math RAID-6 instruction set 16 * $#-way unrolled portable integer math RAID-6 instruction set
17 * 17 *
18 * This file is postprocessed using unroll.pl 18 * This file is postprocessed using unroll.awk
19 */ 19 */
20 20
21#include <linux/raid/pq.h> 21#include <linux/raid/pq.h>
diff --git a/drivers/md/raid6test/Makefile b/drivers/md/raid6test/Makefile
index 58ffdf4f5161..2874cbef529d 100644
--- a/drivers/md/raid6test/Makefile
+++ b/drivers/md/raid6test/Makefile
@@ -7,7 +7,7 @@ CC = gcc
7OPTFLAGS = -O2 # Adjust as desired 7OPTFLAGS = -O2 # Adjust as desired
8CFLAGS = -I.. -I ../../../include -g $(OPTFLAGS) 8CFLAGS = -I.. -I ../../../include -g $(OPTFLAGS)
9LD = ld 9LD = ld
10PERL = perl 10AWK = awk
11AR = ar 11AR = ar
12RANLIB = ranlib 12RANLIB = ranlib
13 13
@@ -35,35 +35,35 @@ raid6.a: raid6int1.o raid6int2.o raid6int4.o raid6int8.o raid6int16.o \
35raid6test: test.c raid6.a 35raid6test: test.c raid6.a
36 $(CC) $(CFLAGS) -o raid6test $^ 36 $(CC) $(CFLAGS) -o raid6test $^
37 37
38raid6altivec1.c: raid6altivec.uc ../unroll.pl 38raid6altivec1.c: raid6altivec.uc ../unroll.awk
39 $(PERL) ../unroll.pl 1 < raid6altivec.uc > $@ 39 $(AWK) ../unroll.awk -vN=1 < raid6altivec.uc > $@
40 40
41raid6altivec2.c: raid6altivec.uc ../unroll.pl 41raid6altivec2.c: raid6altivec.uc ../unroll.awk
42 $(PERL) ../unroll.pl 2 < raid6altivec.uc > $@ 42 $(AWK) ../unroll.awk -vN=2 < raid6altivec.uc > $@
43 43
44raid6altivec4.c: raid6altivec.uc ../unroll.pl 44raid6altivec4.c: raid6altivec.uc ../unroll.awk
45 $(PERL) ../unroll.pl 4 < raid6altivec.uc > $@ 45 $(AWK) ../unroll.awk -vN=4 < raid6altivec.uc > $@
46 46
47raid6altivec8.c: raid6altivec.uc ../unroll.pl 47raid6altivec8.c: raid6altivec.uc ../unroll.awk
48 $(PERL) ../unroll.pl 8 < raid6altivec.uc > $@ 48 $(AWK) ../unroll.awk -vN=8 < raid6altivec.uc > $@
49 49
50raid6int1.c: raid6int.uc ../unroll.pl 50raid6int1.c: raid6int.uc ../unroll.awk
51 $(PERL) ../unroll.pl 1 < raid6int.uc > $@ 51 $(AWK) ../unroll.awk -vN=1 < raid6int.uc > $@
52 52
53raid6int2.c: raid6int.uc ../unroll.pl 53raid6int2.c: raid6int.uc ../unroll.awk
54 $(PERL) ../unroll.pl 2 < raid6int.uc > $@ 54 $(AWK) ../unroll.awk -vN=2 < raid6int.uc > $@
55 55
56raid6int4.c: raid6int.uc ../unroll.pl 56raid6int4.c: raid6int.uc ../unroll.awk
57 $(PERL) ../unroll.pl 4 < raid6int.uc > $@ 57 $(AWK) ../unroll.awk -vN=4 < raid6int.uc > $@
58 58
59raid6int8.c: raid6int.uc ../unroll.pl 59raid6int8.c: raid6int.uc ../unroll.awk
60 $(PERL) ../unroll.pl 8 < raid6int.uc > $@ 60 $(AWK) ../unroll.awk -vN=8 < raid6int.uc > $@
61 61
62raid6int16.c: raid6int.uc ../unroll.pl 62raid6int16.c: raid6int.uc ../unroll.awk
63 $(PERL) ../unroll.pl 16 < raid6int.uc > $@ 63 $(AWK) ../unroll.awk -vN=16 < raid6int.uc > $@
64 64
65raid6int32.c: raid6int.uc ../unroll.pl 65raid6int32.c: raid6int.uc ../unroll.awk
66 $(PERL) ../unroll.pl 32 < raid6int.uc > $@ 66 $(AWK) ../unroll.awk -vN=32 < raid6int.uc > $@
67 67
68raid6tables.c: mktables 68raid6tables.c: mktables
69 ./mktables > raid6tables.c 69 ./mktables > raid6tables.c
diff --git a/drivers/md/unroll.awk b/drivers/md/unroll.awk
new file mode 100644
index 000000000000..c6aa03631df8
--- /dev/null
+++ b/drivers/md/unroll.awk
@@ -0,0 +1,20 @@
1
2# This filter requires one command line option of form -vN=n
3# where n must be a decimal number.
4#
5# Repeat each input line containing $$ n times, replacing $$ with 0...n-1.
6# Replace each $# with n, and each $* with a single $.
7
8BEGIN {
9 n = N + 0
10}
11{
12 if (/\$\$/) { rep = n } else { rep = 1 }
13 for (i = 0; i < rep; ++i) {
14 tmp = $0
15 gsub(/\$\$/, i, tmp)
16 gsub(/\$\#/, n, tmp)
17 gsub(/\$\*/, "$", tmp)
18 print tmp
19 }
20}
diff --git a/drivers/md/unroll.pl b/drivers/md/unroll.pl
deleted file mode 100644
index 3acc710a20ea..000000000000
--- a/drivers/md/unroll.pl
+++ /dev/null
@@ -1,24 +0,0 @@
1#!/usr/bin/perl
2#
3# Take a piece of C code and for each line which contains the sequence $$
4# repeat n times with $ replaced by 0...n-1; the sequence $# is replaced
5# by the unrolling factor, and $* with a single $
6#
7
8($n) = @ARGV;
9$n += 0;
10
11while ( defined($line = <STDIN>) ) {
12 if ( $line =~ /\$\$/ ) {
13 $rep = $n;
14 } else {
15 $rep = 1;
16 }
17 for ( $i = 0 ; $i < $rep ; $i++ ) {
18 $tmp = $line;
19 $tmp =~ s/\$\$/$i/g;
20 $tmp =~ s/\$\#/$n/g;
21 $tmp =~ s/\$\*/\$/g;
22 print $tmp;
23 }
24}
diff --git a/drivers/media/common/tuners/tda18271-fe.c b/drivers/media/common/tuners/tda18271-fe.c
index 64595112000d..3a50ce96fcb9 100644
--- a/drivers/media/common/tuners/tda18271-fe.c
+++ b/drivers/media/common/tuners/tda18271-fe.c
@@ -616,13 +616,13 @@ static int tda18271_rf_tracking_filters_init(struct dvb_frontend *fe, u32 freq)
616 case RF2: 616 case RF2:
617 map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] - 617 map[i].rf_a1 = (prog_cal[RF2] - prog_tab[RF2] -
618 prog_cal[RF1] + prog_tab[RF1]) / 618 prog_cal[RF1] + prog_tab[RF1]) /
619 ((rf_freq[RF2] - rf_freq[RF1]) / 1000); 619 (s32)((rf_freq[RF2] - rf_freq[RF1]) / 1000);
620 map[i].rf2 = rf_freq[RF2] / 1000; 620 map[i].rf2 = rf_freq[RF2] / 1000;
621 break; 621 break;
622 case RF3: 622 case RF3:
623 map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] - 623 map[i].rf_a2 = (prog_cal[RF3] - prog_tab[RF3] -
624 prog_cal[RF2] + prog_tab[RF2]) / 624 prog_cal[RF2] + prog_tab[RF2]) /
625 ((rf_freq[RF3] - rf_freq[RF2]) / 1000); 625 (s32)((rf_freq[RF3] - rf_freq[RF2]) / 1000);
626 map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2]; 626 map[i].rf_b2 = prog_cal[RF2] - prog_tab[RF2];
627 map[i].rf3 = rf_freq[RF3] / 1000; 627 map[i].rf3 = rf_freq[RF3] / 1000;
628 break; 628 break;
@@ -1000,12 +1000,12 @@ static int tda18271_set_analog_params(struct dvb_frontend *fe,
1000 struct tda18271_std_map_item *map; 1000 struct tda18271_std_map_item *map;
1001 char *mode; 1001 char *mode;
1002 int ret; 1002 int ret;
1003 u32 freq = params->frequency * 62500; 1003 u32 freq = params->frequency * 125 *
1004 ((params->mode == V4L2_TUNER_RADIO) ? 1 : 1000) / 2;
1004 1005
1005 priv->mode = TDA18271_ANALOG; 1006 priv->mode = TDA18271_ANALOG;
1006 1007
1007 if (params->mode == V4L2_TUNER_RADIO) { 1008 if (params->mode == V4L2_TUNER_RADIO) {
1008 freq = freq / 1000;
1009 map = &std_map->fm_radio; 1009 map = &std_map->fm_radio;
1010 mode = "fm"; 1010 mode = "fm";
1011 } else if (params->std & V4L2_STD_MN) { 1011 } else if (params->std & V4L2_STD_MN) {
diff --git a/drivers/media/dvb/dvb-usb/Kconfig b/drivers/media/dvb/dvb-usb/Kconfig
index 9744b0692417..0e4b97fba384 100644
--- a/drivers/media/dvb/dvb-usb/Kconfig
+++ b/drivers/media/dvb/dvb-usb/Kconfig
@@ -75,7 +75,7 @@ config DVB_USB_DIB0700
75 select DVB_DIB3000MC if !DVB_FE_CUSTOMISE 75 select DVB_DIB3000MC if !DVB_FE_CUSTOMISE
76 select DVB_S5H1411 if !DVB_FE_CUSTOMISE 76 select DVB_S5H1411 if !DVB_FE_CUSTOMISE
77 select DVB_LGDT3305 if !DVB_FE_CUSTOMISE 77 select DVB_LGDT3305 if !DVB_FE_CUSTOMISE
78 select DVB_TUNER_DIB0070 78 select DVB_TUNER_DIB0070 if !DVB_FE_CUSTOMISE
79 select MEDIA_TUNER_MT2060 if !MEDIA_TUNER_CUSTOMISE 79 select MEDIA_TUNER_MT2060 if !MEDIA_TUNER_CUSTOMISE
80 select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE 80 select MEDIA_TUNER_MT2266 if !MEDIA_TUNER_CUSTOMISE
81 select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE 81 select MEDIA_TUNER_XC2028 if !MEDIA_TUNER_CUSTOMISE
diff --git a/drivers/media/dvb/dvb-usb/ce6230.c b/drivers/media/dvb/dvb-usb/ce6230.c
index 0737c6377892..3df2045b7d2d 100644
--- a/drivers/media/dvb/dvb-usb/ce6230.c
+++ b/drivers/media/dvb/dvb-usb/ce6230.c
@@ -105,7 +105,7 @@ static int ce6230_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg msg[],
105 int i = 0; 105 int i = 0;
106 struct req_t req; 106 struct req_t req;
107 int ret = 0; 107 int ret = 0;
108 memset(&req, 0, sizeof(&req)); 108 memset(&req, 0, sizeof(req));
109 109
110 if (num > 2) 110 if (num > 2)
111 return -EINVAL; 111 return -EINVAL;
diff --git a/drivers/media/dvb/dvb-usb/dib0700_devices.c b/drivers/media/dvb/dvb-usb/dib0700_devices.c
index 0b2812aa30a4..6bd8951ea02b 100644
--- a/drivers/media/dvb/dvb-usb/dib0700_devices.c
+++ b/drivers/media/dvb/dvb-usb/dib0700_devices.c
@@ -1925,7 +1925,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
1925 { NULL }, 1925 { NULL },
1926 }, 1926 },
1927 { "Leadtek Winfast DTV Dongle (STK7700P based)", 1927 { "Leadtek Winfast DTV Dongle (STK7700P based)",
1928 { &dib0700_usb_id_table[8] }, 1928 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
1929 { NULL }, 1929 { NULL },
1930 }, 1930 },
1931 { "AVerMedia AVerTV DVB-T Express", 1931 { "AVerMedia AVerTV DVB-T Express",
@@ -2064,7 +2064,7 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2064 }, 2064 },
2065 }, 2065 },
2066 2066
2067 .num_device_descs = 12, 2067 .num_device_descs = 11,
2068 .devices = { 2068 .devices = {
2069 { "DiBcom STK7070P reference design", 2069 { "DiBcom STK7070P reference design",
2070 { &dib0700_usb_id_table[15], NULL }, 2070 { &dib0700_usb_id_table[15], NULL },
@@ -2098,11 +2098,6 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2098 { &dib0700_usb_id_table[30], NULL }, 2098 { &dib0700_usb_id_table[30], NULL },
2099 { NULL }, 2099 { NULL },
2100 }, 2100 },
2101 { "Terratec Cinergy T USB XXS/ T3",
2102 { &dib0700_usb_id_table[33],
2103 &dib0700_usb_id_table[52], NULL },
2104 { NULL },
2105 },
2106 { "Elgato EyeTV DTT", 2101 { "Elgato EyeTV DTT",
2107 { &dib0700_usb_id_table[49], NULL }, 2102 { &dib0700_usb_id_table[49], NULL },
2108 { NULL }, 2103 { NULL },
@@ -2343,8 +2338,10 @@ struct dvb_usb_device_properties dib0700_devices[] = {
2343 { &dib0700_usb_id_table[59], NULL }, 2338 { &dib0700_usb_id_table[59], NULL },
2344 { NULL }, 2339 { NULL },
2345 }, 2340 },
2346 { "Terratec Cinergy T USB XXS (HD)", 2341 { "Terratec Cinergy T USB XXS (HD)/ T3",
2347 { &dib0700_usb_id_table[34], &dib0700_usb_id_table[60] }, 2342 { &dib0700_usb_id_table[33],
2343 &dib0700_usb_id_table[52],
2344 &dib0700_usb_id_table[60], NULL},
2348 { NULL }, 2345 { NULL },
2349 }, 2346 },
2350 }, 2347 },
diff --git a/drivers/media/dvb/firewire/firedtv-avc.c b/drivers/media/dvb/firewire/firedtv-avc.c
index d1b67fe0f011..485d061319ab 100644
--- a/drivers/media/dvb/firewire/firedtv-avc.c
+++ b/drivers/media/dvb/firewire/firedtv-avc.c
@@ -1050,28 +1050,28 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1050 c->operand[4] = 0; /* slot */ 1050 c->operand[4] = 0; /* slot */
1051 c->operand[5] = SFE_VENDOR_TAG_CA_PMT; /* ca tag */ 1051 c->operand[5] = SFE_VENDOR_TAG_CA_PMT; /* ca tag */
1052 c->operand[6] = 0; /* more/last */ 1052 c->operand[6] = 0; /* more/last */
1053 /* c->operand[7] = XXXprogram_info_length + 17; */ /* length */ 1053 /* Use three bytes for length field in case length > 127 */
1054 c->operand[8] = list_management; 1054 c->operand[10] = list_management;
1055 c->operand[9] = 0x01; /* pmt_cmd=OK_descramble */ 1055 c->operand[11] = 0x01; /* pmt_cmd=OK_descramble */
1056 1056
1057 /* TS program map table */ 1057 /* TS program map table */
1058 1058
1059 c->operand[10] = 0x02; /* Table id=2 */ 1059 c->operand[12] = 0x02; /* Table id=2 */
1060 c->operand[11] = 0x80; /* Section syntax + length */ 1060 c->operand[13] = 0x80; /* Section syntax + length */
1061 /* c->operand[12] = XXXprogram_info_length + 12; */ 1061 /* c->operand[14] = XXXprogram_info_length + 12; */
1062 c->operand[13] = msg[1]; /* Program number */ 1062 c->operand[15] = msg[1]; /* Program number */
1063 c->operand[14] = msg[2]; 1063 c->operand[16] = msg[2];
1064 c->operand[15] = 0x01; /* Version number=0 + current/next=1 */ 1064 c->operand[17] = 0x01; /* Version number=0 + current/next=1 */
1065 c->operand[16] = 0x00; /* Section number=0 */ 1065 c->operand[18] = 0x00; /* Section number=0 */
1066 c->operand[17] = 0x00; /* Last section number=0 */ 1066 c->operand[19] = 0x00; /* Last section number=0 */
1067 c->operand[18] = 0x1f; /* PCR_PID=1FFF */ 1067 c->operand[20] = 0x1f; /* PCR_PID=1FFF */
1068 c->operand[19] = 0xff; 1068 c->operand[21] = 0xff;
1069 c->operand[20] = (program_info_length >> 8); /* Program info length */ 1069 c->operand[22] = (program_info_length >> 8); /* Program info length */
1070 c->operand[21] = (program_info_length & 0xff); 1070 c->operand[23] = (program_info_length & 0xff);
1071 1071
1072 /* CA descriptors at programme level */ 1072 /* CA descriptors at programme level */
1073 read_pos = 6; 1073 read_pos = 6;
1074 write_pos = 22; 1074 write_pos = 24;
1075 if (program_info_length > 0) { 1075 if (program_info_length > 0) {
1076 pmt_cmd_id = msg[read_pos++]; 1076 pmt_cmd_id = msg[read_pos++];
1077 if (pmt_cmd_id != 1 && pmt_cmd_id != 4) 1077 if (pmt_cmd_id != 1 && pmt_cmd_id != 4)
@@ -1113,8 +1113,10 @@ int avc_ca_pmt(struct firedtv *fdtv, char *msg, int length)
1113 c->operand[write_pos++] = 0x00; 1113 c->operand[write_pos++] = 0x00;
1114 c->operand[write_pos++] = 0x00; 1114 c->operand[write_pos++] = 0x00;
1115 1115
1116 c->operand[7] = write_pos - 8; 1116 c->operand[7] = 0x82;
1117 c->operand[12] = write_pos - 13; 1117 c->operand[8] = (write_pos - 10) >> 8;
1118 c->operand[9] = (write_pos - 10) & 0xff;
1119 c->operand[14] = write_pos - 15;
1118 1120
1119 crc32_csum = crc32_be(0, &c->operand[10], c->operand[12] - 1); 1121 crc32_csum = crc32_be(0, &c->operand[10], c->operand[12] - 1);
1120 c->operand[write_pos - 4] = (crc32_csum >> 24) & 0xff; 1122 c->operand[write_pos - 4] = (crc32_csum >> 24) & 0xff;
diff --git a/drivers/media/dvb/firewire/firedtv-fe.c b/drivers/media/dvb/firewire/firedtv-fe.c
index 7ba43630a25d..e49cdc88b0c7 100644
--- a/drivers/media/dvb/firewire/firedtv-fe.c
+++ b/drivers/media/dvb/firewire/firedtv-fe.c
@@ -141,18 +141,12 @@ static int fdtv_read_uncorrected_blocks(struct dvb_frontend *fe, u32 *ucblocks)
141 return -EOPNOTSUPP; 141 return -EOPNOTSUPP;
142} 142}
143 143
144#define ACCEPTED 0x9
145
146static int fdtv_set_frontend(struct dvb_frontend *fe, 144static int fdtv_set_frontend(struct dvb_frontend *fe,
147 struct dvb_frontend_parameters *params) 145 struct dvb_frontend_parameters *params)
148{ 146{
149 struct firedtv *fdtv = fe->sec_priv; 147 struct firedtv *fdtv = fe->sec_priv;
150 148
151 /* FIXME: avc_tuner_dsd never returns ACCEPTED. Check status? */ 149 return avc_tuner_dsd(fdtv, params);
152 if (avc_tuner_dsd(fdtv, params) != ACCEPTED)
153 return -EINVAL;
154 else
155 return 0; /* not sure of this... */
156} 150}
157 151
158static int fdtv_get_frontend(struct dvb_frontend *fe, 152static int fdtv_get_frontend(struct dvb_frontend *fe,
diff --git a/drivers/media/dvb/frontends/dib0070.h b/drivers/media/dvb/frontends/dib0070.h
index 8a2e1e710adb..eec9e52ffa75 100644
--- a/drivers/media/dvb/frontends/dib0070.h
+++ b/drivers/media/dvb/frontends/dib0070.h
@@ -51,6 +51,7 @@ struct dib0070_config {
51#if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE)) 51#if defined(CONFIG_DVB_TUNER_DIB0070) || (defined(CONFIG_DVB_TUNER_DIB0070_MODULE) && defined(MODULE))
52extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg); 52extern struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg);
53extern u16 dib0070_wbd_offset(struct dvb_frontend *); 53extern u16 dib0070_wbd_offset(struct dvb_frontend *);
54extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open);
54#else 55#else
55static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg) 56static inline struct dvb_frontend *dib0070_attach(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dib0070_config *cfg)
56{ 57{
@@ -63,7 +64,11 @@ static inline u16 dib0070_wbd_offset(struct dvb_frontend *fe)
63 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__); 64 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
64 return -ENODEV; 65 return -ENODEV;
65} 66}
67
68static inline void dib0070_ctrl_agc_filter(struct dvb_frontend *fe, u8 open)
69{
70 printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
71}
66#endif 72#endif
67extern void dib0070_ctrl_agc_filter(struct dvb_frontend *, u8 open);
68 73
69#endif 74#endif
diff --git a/drivers/media/dvb/frontends/dib7000p.c b/drivers/media/dvb/frontends/dib7000p.c
index 55ef6eeb0769..0781f94e05d2 100644
--- a/drivers/media/dvb/frontends/dib7000p.c
+++ b/drivers/media/dvb/frontends/dib7000p.c
@@ -1375,6 +1375,11 @@ struct dvb_frontend * dib7000p_attach(struct i2c_adapter *i2c_adap, u8 i2c_addr,
1375 if (dib7000p_identify(st) != 0) 1375 if (dib7000p_identify(st) != 0)
1376 goto error; 1376 goto error;
1377 1377
1378 /* FIXME: make sure the dev.parent field is initialized, or else
1379 request_firmware() will hit an OOPS (this should be moved somewhere
1380 more common) */
1381 st->i2c_master.gated_tuner_i2c_adap.dev.parent = i2c_adap->dev.parent;
1382
1378 dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr); 1383 dibx000_init_i2c_master(&st->i2c_master, DIB7000P, st->i2c_adap, st->i2c_addr);
1379 1384
1380 dib7000p_demod_reset(st); 1385 dib7000p_demod_reset(st);
diff --git a/drivers/media/dvb/pt1/pt1.c b/drivers/media/dvb/pt1/pt1.c
index 81e623a90f09..1fd8306371e2 100644
--- a/drivers/media/dvb/pt1/pt1.c
+++ b/drivers/media/dvb/pt1/pt1.c
@@ -27,6 +27,7 @@
27#include <linux/pci.h> 27#include <linux/pci.h>
28#include <linux/kthread.h> 28#include <linux/kthread.h>
29#include <linux/freezer.h> 29#include <linux/freezer.h>
30#include <linux/vmalloc.h>
30 31
31#include "dvbdev.h" 32#include "dvbdev.h"
32#include "dvb_demux.h" 33#include "dvb_demux.h"
diff --git a/drivers/media/dvb/siano/smsusb.c b/drivers/media/dvb/siano/smsusb.c
index cb8a358b7310..8f88a586b0dd 100644
--- a/drivers/media/dvb/siano/smsusb.c
+++ b/drivers/media/dvb/siano/smsusb.c
@@ -529,6 +529,12 @@ struct usb_device_id smsusb_id_table[] = {
529 .driver_info = SMS1XXX_BOARD_SIANO_NICE }, 529 .driver_info = SMS1XXX_BOARD_SIANO_NICE },
530 { USB_DEVICE(0x187f, 0x0301), 530 { USB_DEVICE(0x187f, 0x0301),
531 .driver_info = SMS1XXX_BOARD_SIANO_VENICE }, 531 .driver_info = SMS1XXX_BOARD_SIANO_VENICE },
532 { USB_DEVICE(0x2040, 0xb900),
533 .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
534 { USB_DEVICE(0x2040, 0xb910),
535 .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
536 { USB_DEVICE(0x2040, 0xc000),
537 .driver_info = SMS1XXX_BOARD_HAUPPAUGE_WINDHAM },
532 { } /* Terminating entry */ 538 { } /* Terminating entry */
533 }; 539 };
534 540
diff --git a/drivers/media/video/bt8xx/bttv-driver.c b/drivers/media/video/bt8xx/bttv-driver.c
index 939d1e512974..a6724019c66f 100644
--- a/drivers/media/video/bt8xx/bttv-driver.c
+++ b/drivers/media/video/bt8xx/bttv-driver.c
@@ -1299,7 +1299,7 @@ set_tvnorm(struct bttv *btv, unsigned int norm)
1299 1299
1300 tvnorm = &bttv_tvnorms[norm]; 1300 tvnorm = &bttv_tvnorms[norm];
1301 1301
1302 if (!memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap, 1302 if (memcmp(&bttv_tvnorms[btv->tvnorm].cropcap, &tvnorm->cropcap,
1303 sizeof (tvnorm->cropcap))) { 1303 sizeof (tvnorm->cropcap))) {
1304 bttv_crop_reset(&btv->crop[0], norm); 1304 bttv_crop_reset(&btv->crop[0], norm);
1305 btv->crop[1] = btv->crop[0]; /* current = default */ 1305 btv->crop[1] = btv->crop[0]; /* current = default */
@@ -3800,11 +3800,34 @@ bttv_irq_next_video(struct bttv *btv, struct bttv_buffer_set *set)
3800 if (!V4L2_FIELD_HAS_BOTH(item->vb.field) && 3800 if (!V4L2_FIELD_HAS_BOTH(item->vb.field) &&
3801 (item->vb.queue.next != &btv->capture)) { 3801 (item->vb.queue.next != &btv->capture)) {
3802 item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue); 3802 item = list_entry(item->vb.queue.next, struct bttv_buffer, vb.queue);
3803 /* Mike Isely <isely@pobox.com> - Only check
3804 * and set up the bottom field in the logic
3805 * below. Don't ever do the top field. This
3806 * of course means that if we set up the
3807 * bottom field in the above code that we'll
3808 * actually skip a field. But that's OK.
3809 * Having processed only a single buffer this
3810 * time, then the next time around the first
3811 * available buffer should be for a top field.
3812 * That will then cause us here to set up a
3813 * top then a bottom field in the normal way.
3814 * The alternative to this understanding is
3815 * that we set up the second available buffer
3816 * as a top field, but that's out of order
3817 * since this driver always processes the top
3818 * field first - the effect will be the two
3819 * buffers being returned in the wrong order,
3820 * with the second buffer also being delayed
3821 * by one field time (owing to the fifo nature
3822 * of videobuf). Worse still, we'll be stuck
3823 * doing fields out of order now every time
3824 * until something else causes a field to be
3825 * dropped. By effectively forcing a field to
3826 * drop this way then we always get back into
3827 * sync within a single frame time. (Out of
3828 * order fields can screw up deinterlacing
3829 * algorithms.) */
3803 if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) { 3830 if (!V4L2_FIELD_HAS_BOTH(item->vb.field)) {
3804 if (NULL == set->top &&
3805 V4L2_FIELD_TOP == item->vb.field) {
3806 set->top = item;
3807 }
3808 if (NULL == set->bottom && 3831 if (NULL == set->bottom &&
3809 V4L2_FIELD_BOTTOM == item->vb.field) { 3832 V4L2_FIELD_BOTTOM == item->vb.field) {
3810 set->bottom = item; 3833 set->bottom = item;
diff --git a/drivers/media/video/em28xx/em28xx-audio.c b/drivers/media/video/em28xx/em28xx-audio.c
index 7bd8a70f0a0b..ac947aecb9c3 100644
--- a/drivers/media/video/em28xx/em28xx-audio.c
+++ b/drivers/media/video/em28xx/em28xx-audio.c
@@ -383,6 +383,11 @@ static int snd_em28xx_hw_capture_free(struct snd_pcm_substream *substream)
383 383
384static int snd_em28xx_prepare(struct snd_pcm_substream *substream) 384static int snd_em28xx_prepare(struct snd_pcm_substream *substream)
385{ 385{
386 struct em28xx *dev = snd_pcm_substream_chip(substream);
387
388 dev->adev.hwptr_done_capture = 0;
389 dev->adev.capture_transfer_done = 0;
390
386 return 0; 391 return 0;
387} 392}
388 393
diff --git a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
index 59400e858965..a27afeb6f39b 100644
--- a/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
+++ b/drivers/media/video/gspca/m5602/m5602_s5k4aa.c
@@ -35,12 +35,25 @@ static
35 const 35 const
36 struct dmi_system_id s5k4aa_vflip_dmi_table[] = { 36 struct dmi_system_id s5k4aa_vflip_dmi_table[] = {
37 { 37 {
38 .ident = "BRUNEINIT",
39 .matches = {
40 DMI_MATCH(DMI_SYS_VENDOR, "BRUNENIT"),
41 DMI_MATCH(DMI_PRODUCT_NAME, "BRUNENIT"),
42 DMI_MATCH(DMI_BOARD_VERSION, "00030D0000000001")
43 }
44 }, {
38 .ident = "Fujitsu-Siemens Amilo Xa 2528", 45 .ident = "Fujitsu-Siemens Amilo Xa 2528",
39 .matches = { 46 .matches = {
40 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), 47 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
41 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528") 48 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xa 2528")
42 } 49 }
43 }, { 50 }, {
51 .ident = "Fujitsu-Siemens Amilo Xi 2528",
52 .matches = {
53 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
54 DMI_MATCH(DMI_PRODUCT_NAME, "AMILO Xi 2528")
55 }
56 }, {
44 .ident = "Fujitsu-Siemens Amilo Xi 2550", 57 .ident = "Fujitsu-Siemens Amilo Xi 2550",
45 .matches = { 58 .matches = {
46 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"), 59 DMI_MATCH(DMI_SYS_VENDOR, "FUJITSU SIEMENS"),
@@ -57,6 +70,13 @@ static
57 .matches = { 70 .matches = {
58 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"), 71 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"),
59 DMI_MATCH(DMI_PRODUCT_NAME, "GX700"), 72 DMI_MATCH(DMI_PRODUCT_NAME, "GX700"),
73 DMI_MATCH(DMI_BIOS_DATE, "12/02/2008")
74 }
75 }, {
76 .ident = "MSI GX700",
77 .matches = {
78 DMI_MATCH(DMI_SYS_VENDOR, "Micro-Star International"),
79 DMI_MATCH(DMI_PRODUCT_NAME, "GX700"),
60 DMI_MATCH(DMI_BIOS_DATE, "07/26/2007") 80 DMI_MATCH(DMI_BIOS_DATE, "07/26/2007")
61 } 81 }
62 }, { 82 }, {
diff --git a/drivers/media/video/gspca/mr97310a.c b/drivers/media/video/gspca/mr97310a.c
index 140c8f320e47..f8328b9efae5 100644
--- a/drivers/media/video/gspca/mr97310a.c
+++ b/drivers/media/video/gspca/mr97310a.c
@@ -483,7 +483,7 @@ static int start_cif_cam(struct gspca_dev *gspca_dev)
483 data[3] = 0x2c; /* reg 2, H size/8 */ 483 data[3] = 0x2c; /* reg 2, H size/8 */
484 data[4] = 0x48; /* reg 3, V size/4 */ 484 data[4] = 0x48; /* reg 3, V size/4 */
485 data[6] = 0x06; /* reg 5, H start */ 485 data[6] = 0x06; /* reg 5, H start */
486 data[8] = 0x06 + sd->sensor_type; /* reg 7, V start */ 486 data[8] = 0x06 - sd->sensor_type; /* reg 7, V start */
487 break; 487 break;
488 } 488 }
489 err_code = mr_write(gspca_dev, 11); 489 err_code = mr_write(gspca_dev, 11);
diff --git a/drivers/media/video/gspca/ov519.c b/drivers/media/video/gspca/ov519.c
index 2f6e135d94bc..a5c190e93799 100644
--- a/drivers/media/video/gspca/ov519.c
+++ b/drivers/media/video/gspca/ov519.c
@@ -2919,7 +2919,7 @@ static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
2919 /* A false positive here is likely, until OVT gives me 2919 /* A false positive here is likely, until OVT gives me
2920 * the definitive SOF/EOF format */ 2920 * the definitive SOF/EOF format */
2921 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) { 2921 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
2922 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); 2922 frame = gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0);
2923 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0); 2923 gspca_frame_add(gspca_dev, FIRST_PACKET, frame, data, 0);
2924 sd->packet_nr = 0; 2924 sd->packet_nr = 0;
2925 } 2925 }
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.c b/drivers/media/video/gspca/stv06xx/stv06xx.c
index 65489d6b0d89..bfae63f5584c 100644
--- a/drivers/media/video/gspca/stv06xx/stv06xx.c
+++ b/drivers/media/video/gspca/stv06xx/stv06xx.c
@@ -394,7 +394,8 @@ frame_data:
394 PDEBUG(D_PACK, "End of frame detected"); 394 PDEBUG(D_PACK, "End of frame detected");
395 395
396 /* Complete the last frame (if any) */ 396 /* Complete the last frame (if any) */
397 gspca_frame_add(gspca_dev, LAST_PACKET, frame, data, 0); 397 frame = gspca_frame_add(gspca_dev, LAST_PACKET,
398 frame, data, 0);
398 399
399 if (chunk_len) 400 if (chunk_len)
400 PDEBUG(D_ERR, "Chunk length is " 401 PDEBUG(D_ERR, "Chunk length is "
diff --git a/drivers/media/video/pxa_camera.c b/drivers/media/video/pxa_camera.c
index 6952e9602d5d..51b683c63b70 100644
--- a/drivers/media/video/pxa_camera.c
+++ b/drivers/media/video/pxa_camera.c
@@ -26,6 +26,7 @@
26#include <linux/device.h> 26#include <linux/device.h>
27#include <linux/platform_device.h> 27#include <linux/platform_device.h>
28#include <linux/clk.h> 28#include <linux/clk.h>
29#include <linux/sched.h>
29 30
30#include <media/v4l2-common.h> 31#include <media/v4l2-common.h>
31#include <media/v4l2-dev.h> 32#include <media/v4l2-dev.h>
@@ -1432,7 +1433,9 @@ static int pxa_camera_set_fmt(struct soc_camera_device *icd,
1432 icd->sense = &sense; 1433 icd->sense = &sense;
1433 1434
1434 cam_f.fmt.pix.pixelformat = cam_fmt->fourcc; 1435 cam_f.fmt.pix.pixelformat = cam_fmt->fourcc;
1435 ret = v4l2_subdev_call(sd, video, s_fmt, f); 1436 ret = v4l2_subdev_call(sd, video, s_fmt, &cam_f);
1437 cam_f.fmt.pix.pixelformat = pix->pixelformat;
1438 *pix = cam_f.fmt.pix;
1436 1439
1437 icd->sense = NULL; 1440 icd->sense = NULL;
1438 1441
diff --git a/drivers/media/video/s2255drv.c b/drivers/media/video/s2255drv.c
index 9e3262c0ba37..2c0bb06cab3b 100644
--- a/drivers/media/video/s2255drv.c
+++ b/drivers/media/video/s2255drv.c
@@ -598,11 +598,6 @@ static int s2255_got_frame(struct s2255_dev *dev, int chn, int jpgsize)
598 buf = list_entry(dma_q->active.next, 598 buf = list_entry(dma_q->active.next,
599 struct s2255_buffer, vb.queue); 599 struct s2255_buffer, vb.queue);
600 600
601 if (!waitqueue_active(&buf->vb.done)) {
602 /* no one active */
603 rc = -1;
604 goto unlock;
605 }
606 list_del(&buf->vb.queue); 601 list_del(&buf->vb.queue);
607 do_gettimeofday(&buf->vb.ts); 602 do_gettimeofday(&buf->vb.ts);
608 dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i); 603 dprintk(100, "[%p/%d] wakeup\n", buf, buf->vb.i);
diff --git a/drivers/media/video/saa7134/saa7134-cards.c b/drivers/media/video/saa7134/saa7134-cards.c
index 71145bff94fa..09013229d4aa 100644
--- a/drivers/media/video/saa7134/saa7134-cards.c
+++ b/drivers/media/video/saa7134/saa7134-cards.c
@@ -3428,6 +3428,7 @@ struct saa7134_board saa7134_boards[] = {
3428 .tuner_config = 3, 3428 .tuner_config = 3,
3429 .mpeg = SAA7134_MPEG_DVB, 3429 .mpeg = SAA7134_MPEG_DVB,
3430 .ts_type = SAA7134_MPEG_TS_SERIAL, 3430 .ts_type = SAA7134_MPEG_TS_SERIAL,
3431 .ts_force_val = 1,
3431 .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */ 3432 .gpiomask = 0x0800100, /* GPIO 21 is an INPUT */
3432 .inputs = {{ 3433 .inputs = {{
3433 .name = name_tv, 3434 .name = name_tv,
diff --git a/drivers/media/video/saa7134/saa7134-ts.c b/drivers/media/video/saa7134/saa7134-ts.c
index 3fa652279ac0..03488ba4c99c 100644
--- a/drivers/media/video/saa7134/saa7134-ts.c
+++ b/drivers/media/video/saa7134/saa7134-ts.c
@@ -262,11 +262,13 @@ int saa7134_ts_start(struct saa7134_dev *dev)
262 switch (saa7134_boards[dev->board].ts_type) { 262 switch (saa7134_boards[dev->board].ts_type) {
263 case SAA7134_MPEG_TS_PARALLEL: 263 case SAA7134_MPEG_TS_PARALLEL:
264 saa_writeb(SAA7134_TS_SERIAL0, 0x40); 264 saa_writeb(SAA7134_TS_SERIAL0, 0x40);
265 saa_writeb(SAA7134_TS_PARALLEL, 0xec); 265 saa_writeb(SAA7134_TS_PARALLEL, 0xec |
266 (saa7134_boards[dev->board].ts_force_val << 4));
266 break; 267 break;
267 case SAA7134_MPEG_TS_SERIAL: 268 case SAA7134_MPEG_TS_SERIAL:
268 saa_writeb(SAA7134_TS_SERIAL0, 0xd8); 269 saa_writeb(SAA7134_TS_SERIAL0, 0xd8);
269 saa_writeb(SAA7134_TS_PARALLEL, 0x6c); 270 saa_writeb(SAA7134_TS_PARALLEL, 0x6c |
271 (saa7134_boards[dev->board].ts_force_val << 4));
270 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc); 272 saa_writeb(SAA7134_TS_PARALLEL_SERIAL, 0xbc);
271 saa_writeb(SAA7134_TS_SERIAL1, 0x02); 273 saa_writeb(SAA7134_TS_SERIAL1, 0x02);
272 break; 274 break;
diff --git a/drivers/media/video/saa7134/saa7134.h b/drivers/media/video/saa7134/saa7134.h
index 6ee3e9b7769e..f8697d46ff5f 100644
--- a/drivers/media/video/saa7134/saa7134.h
+++ b/drivers/media/video/saa7134/saa7134.h
@@ -360,6 +360,7 @@ struct saa7134_board {
360 enum saa7134_mpeg_type mpeg; 360 enum saa7134_mpeg_type mpeg;
361 enum saa7134_mpeg_ts_type ts_type; 361 enum saa7134_mpeg_ts_type ts_type;
362 unsigned int vid_port_opts; 362 unsigned int vid_port_opts;
363 unsigned int ts_force_val:1;
363}; 364};
364 365
365#define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name) 366#define card_has_radio(dev) (NULL != saa7134_boards[dev->board].radio.name)
diff --git a/drivers/media/video/saa7164/saa7164-cmd.c b/drivers/media/video/saa7164/saa7164-cmd.c
index c45966edc0cf..9c1d3ac43869 100644
--- a/drivers/media/video/saa7164/saa7164-cmd.c
+++ b/drivers/media/video/saa7164/saa7164-cmd.c
@@ -347,7 +347,7 @@ int saa7164_cmd_send(struct saa7164_dev *dev, u8 id, tmComResCmd_t command,
347 347
348 /* Prepare some basic command/response structures */ 348 /* Prepare some basic command/response structures */
349 memset(&command_t, 0, sizeof(command_t)); 349 memset(&command_t, 0, sizeof(command_t));
350 memset(&response_t, 0, sizeof(&response_t)); 350 memset(&response_t, 0, sizeof(response_t));
351 pcommand_t = &command_t; 351 pcommand_t = &command_t;
352 presponse_t = &response_t; 352 presponse_t = &response_t;
353 command_t.id = id; 353 command_t.id = id;
diff --git a/drivers/media/video/sh_mobile_ceu_camera.c b/drivers/media/video/sh_mobile_ceu_camera.c
index 65ac474c517a..2f78b4f263f5 100644
--- a/drivers/media/video/sh_mobile_ceu_camera.c
+++ b/drivers/media/video/sh_mobile_ceu_camera.c
@@ -1173,8 +1173,8 @@ static int get_scales(struct soc_camera_device *icd,
1173 width_in = scale_up(cam->ceu_rect.width, *scale_h); 1173 width_in = scale_up(cam->ceu_rect.width, *scale_h);
1174 height_in = scale_up(cam->ceu_rect.height, *scale_v); 1174 height_in = scale_up(cam->ceu_rect.height, *scale_v);
1175 1175
1176 *scale_h = calc_generic_scale(cam->ceu_rect.width, icd->user_width); 1176 *scale_h = calc_generic_scale(width_in, icd->user_width);
1177 *scale_v = calc_generic_scale(cam->ceu_rect.height, icd->user_height); 1177 *scale_v = calc_generic_scale(height_in, icd->user_height);
1178 1178
1179 return 0; 1179 return 0;
1180} 1180}
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c
index 59aa7a3694c2..36e617bd13c7 100644
--- a/drivers/media/video/soc_camera.c
+++ b/drivers/media/video/soc_camera.c
@@ -1160,13 +1160,15 @@ void soc_camera_host_unregister(struct soc_camera_host *ici)
1160 if (icd->iface == ici->nr) { 1160 if (icd->iface == ici->nr) {
1161 /* The bus->remove will be called */ 1161 /* The bus->remove will be called */
1162 device_unregister(&icd->dev); 1162 device_unregister(&icd->dev);
1163 /* Not before device_unregister(), .remove 1163 /*
1164 * needs parent to call ici->ops->remove() */ 1164 * Not before device_unregister(), .remove
1165 icd->dev.parent = NULL; 1165 * needs parent to call ici->ops->remove().
1166 1166 * If the host module is loaded again, device_register()
1167 /* If the host module is loaded again, device_register() 1167 * would complain "already initialised," since 2.6.32
1168 * would complain "already initialised" */ 1168 * this is also needed to prevent use-after-free of the
1169 memset(&icd->dev.kobj, 0, sizeof(icd->dev.kobj)); 1169 * device private data.
1170 */
1171 memset(&icd->dev, 0, sizeof(icd->dev));
1170 } 1172 }
1171 } 1173 }
1172 1174
diff --git a/drivers/media/video/uvc/uvc_ctrl.c b/drivers/media/video/uvc/uvc_ctrl.c
index c3225a561748..1b89735e62fd 100644
--- a/drivers/media/video/uvc/uvc_ctrl.c
+++ b/drivers/media/video/uvc/uvc_ctrl.c
@@ -348,7 +348,7 @@ static void uvc_ctrl_set_zoom(struct uvc_control_mapping *mapping,
348 __s32 value, __u8 *data) 348 __s32 value, __u8 *data)
349{ 349{
350 data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff; 350 data[0] = value == 0 ? 0 : (value > 0) ? 1 : 0xff;
351 data[2] = min(abs(value), 0xff); 351 data[2] = min((int)abs(value), 0xff);
352} 352}
353 353
354static struct uvc_control_mapping uvc_ctrl_mappings[] = { 354static struct uvc_control_mapping uvc_ctrl_mappings[] = {
diff --git a/drivers/media/video/uvc/uvc_video.c b/drivers/media/video/uvc/uvc_video.c
index f960e8ea4f17..a6e41d12b221 100644
--- a/drivers/media/video/uvc/uvc_video.c
+++ b/drivers/media/video/uvc/uvc_video.c
@@ -90,7 +90,8 @@ static void uvc_fixup_video_ctrl(struct uvc_streaming *stream,
90 ctrl->dwMaxVideoFrameSize = 90 ctrl->dwMaxVideoFrameSize =
91 frame->dwMaxVideoFrameBufferSize; 91 frame->dwMaxVideoFrameBufferSize;
92 92
93 if (stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH && 93 if (!(format->flags & UVC_FMT_FLAG_COMPRESSED) &&
94 stream->dev->quirks & UVC_QUIRK_FIX_BANDWIDTH &&
94 stream->intf->num_altsetting > 1) { 95 stream->intf->num_altsetting > 1) {
95 u32 interval; 96 u32 interval;
96 u32 bandwidth; 97 u32 bandwidth;
diff --git a/drivers/mfd/twl4030-core.c b/drivers/mfd/twl4030-core.c
index e424cf6d8e9e..a1c47ee95c0e 100644
--- a/drivers/mfd/twl4030-core.c
+++ b/drivers/mfd/twl4030-core.c
@@ -480,7 +480,6 @@ static int
480add_children(struct twl4030_platform_data *pdata, unsigned long features) 480add_children(struct twl4030_platform_data *pdata, unsigned long features)
481{ 481{
482 struct device *child; 482 struct device *child;
483 struct device *usb_transceiver = NULL;
484 483
485 if (twl_has_bci() && pdata->bci && !(features & TPS_SUBSET)) { 484 if (twl_has_bci() && pdata->bci && !(features & TPS_SUBSET)) {
486 child = add_child(3, "twl4030_bci", 485 child = add_child(3, "twl4030_bci",
@@ -532,16 +531,61 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features)
532 } 531 }
533 532
534 if (twl_has_usb() && pdata->usb) { 533 if (twl_has_usb() && pdata->usb) {
534
535 static struct regulator_consumer_supply usb1v5 = {
536 .supply = "usb1v5",
537 };
538 static struct regulator_consumer_supply usb1v8 = {
539 .supply = "usb1v8",
540 };
541 static struct regulator_consumer_supply usb3v1 = {
542 .supply = "usb3v1",
543 };
544
545 /* First add the regulators so that they can be used by transceiver */
546 if (twl_has_regulator()) {
547 /* this is a template that gets copied */
548 struct regulator_init_data usb_fixed = {
549 .constraints.valid_modes_mask =
550 REGULATOR_MODE_NORMAL
551 | REGULATOR_MODE_STANDBY,
552 .constraints.valid_ops_mask =
553 REGULATOR_CHANGE_MODE
554 | REGULATOR_CHANGE_STATUS,
555 };
556
557 child = add_regulator_linked(TWL4030_REG_VUSB1V5,
558 &usb_fixed, &usb1v5, 1);
559 if (IS_ERR(child))
560 return PTR_ERR(child);
561
562 child = add_regulator_linked(TWL4030_REG_VUSB1V8,
563 &usb_fixed, &usb1v8, 1);
564 if (IS_ERR(child))
565 return PTR_ERR(child);
566
567 child = add_regulator_linked(TWL4030_REG_VUSB3V1,
568 &usb_fixed, &usb3v1, 1);
569 if (IS_ERR(child))
570 return PTR_ERR(child);
571
572 }
573
535 child = add_child(0, "twl4030_usb", 574 child = add_child(0, "twl4030_usb",
536 pdata->usb, sizeof(*pdata->usb), 575 pdata->usb, sizeof(*pdata->usb),
537 true, 576 true,
538 /* irq0 = USB_PRES, irq1 = USB */ 577 /* irq0 = USB_PRES, irq1 = USB */
539 pdata->irq_base + 8 + 2, pdata->irq_base + 4); 578 pdata->irq_base + 8 + 2, pdata->irq_base + 4);
579
540 if (IS_ERR(child)) 580 if (IS_ERR(child))
541 return PTR_ERR(child); 581 return PTR_ERR(child);
542 582
543 /* we need to connect regulators to this transceiver */ 583 /* we need to connect regulators to this transceiver */
544 usb_transceiver = child; 584 if (twl_has_regulator() && child) {
585 usb1v5.dev = child;
586 usb1v8.dev = child;
587 usb3v1.dev = child;
588 }
545 } 589 }
546 590
547 if (twl_has_watchdog()) { 591 if (twl_has_watchdog()) {
@@ -580,47 +624,6 @@ add_children(struct twl4030_platform_data *pdata, unsigned long features)
580 return PTR_ERR(child); 624 return PTR_ERR(child);
581 } 625 }
582 626
583 if (twl_has_regulator() && usb_transceiver) {
584 static struct regulator_consumer_supply usb1v5 = {
585 .supply = "usb1v5",
586 };
587 static struct regulator_consumer_supply usb1v8 = {
588 .supply = "usb1v8",
589 };
590 static struct regulator_consumer_supply usb3v1 = {
591 .supply = "usb3v1",
592 };
593
594 /* this is a template that gets copied */
595 struct regulator_init_data usb_fixed = {
596 .constraints.valid_modes_mask =
597 REGULATOR_MODE_NORMAL
598 | REGULATOR_MODE_STANDBY,
599 .constraints.valid_ops_mask =
600 REGULATOR_CHANGE_MODE
601 | REGULATOR_CHANGE_STATUS,
602 };
603
604 usb1v5.dev = usb_transceiver;
605 usb1v8.dev = usb_transceiver;
606 usb3v1.dev = usb_transceiver;
607
608 child = add_regulator_linked(TWL4030_REG_VUSB1V5, &usb_fixed,
609 &usb1v5, 1);
610 if (IS_ERR(child))
611 return PTR_ERR(child);
612
613 child = add_regulator_linked(TWL4030_REG_VUSB1V8, &usb_fixed,
614 &usb1v8, 1);
615 if (IS_ERR(child))
616 return PTR_ERR(child);
617
618 child = add_regulator_linked(TWL4030_REG_VUSB3V1, &usb_fixed,
619 &usb3v1, 1);
620 if (IS_ERR(child))
621 return PTR_ERR(child);
622 }
623
624 /* maybe add LDOs that are omitted on cost-reduced parts */ 627 /* maybe add LDOs that are omitted on cost-reduced parts */
625 if (twl_has_regulator() && !(features & TPS_SUBSET)) { 628 if (twl_has_regulator() && !(features & TPS_SUBSET)) {
626 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2); 629 child = add_regulator(TWL4030_REG_VPLL2, pdata->vpll2);
@@ -792,7 +795,7 @@ twl4030_probe(struct i2c_client *client, const struct i2c_device_id *id)
792 twl->client = i2c_new_dummy(client->adapter, 795 twl->client = i2c_new_dummy(client->adapter,
793 twl->address); 796 twl->address);
794 if (!twl->client) { 797 if (!twl->client) {
795 dev_err(&twl->client->dev, 798 dev_err(&client->dev,
796 "can't attach client %d\n", i); 799 "can't attach client %d\n", i);
797 status = -ENOMEM; 800 status = -ENOMEM;
798 goto fail; 801 goto fail;
diff --git a/drivers/mfd/wm831x-irq.c b/drivers/mfd/wm831x-irq.c
index d3015dfb9134..ac056ea6b66e 100644
--- a/drivers/mfd/wm831x-irq.c
+++ b/drivers/mfd/wm831x-irq.c
@@ -507,6 +507,8 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq)
507{ 507{
508 int i, ret; 508 int i, ret;
509 509
510 mutex_init(&wm831x->irq_lock);
511
510 if (!irq) { 512 if (!irq) {
511 dev_warn(wm831x->dev, 513 dev_warn(wm831x->dev,
512 "No interrupt specified - functionality limited\n"); 514 "No interrupt specified - functionality limited\n");
@@ -521,7 +523,6 @@ int wm831x_irq_init(struct wm831x *wm831x, int irq)
521 } 523 }
522 524
523 wm831x->irq = irq; 525 wm831x->irq = irq;
524 mutex_init(&wm831x->irq_lock);
525 INIT_WORK(&wm831x->irq_work, wm831x_irq_worker); 526 INIT_WORK(&wm831x->irq_work, wm831x_irq_worker);
526 527
527 /* Mask the individual interrupt sources */ 528 /* Mask the individual interrupt sources */
diff --git a/drivers/misc/sgi-gru/gruprocfs.c b/drivers/misc/sgi-gru/gruprocfs.c
index ccd4408a26c7..3f2375c5ba5b 100644
--- a/drivers/misc/sgi-gru/gruprocfs.c
+++ b/drivers/misc/sgi-gru/gruprocfs.c
@@ -161,14 +161,15 @@ static int options_show(struct seq_file *s, void *p)
161static ssize_t options_write(struct file *file, const char __user *userbuf, 161static ssize_t options_write(struct file *file, const char __user *userbuf,
162 size_t count, loff_t *data) 162 size_t count, loff_t *data)
163{ 163{
164 unsigned long val; 164 char buf[20];
165 char buf[80];
166 165
167 if (strncpy_from_user(buf, userbuf, sizeof(buf) - 1) < 0) 166 if (count >= sizeof(buf))
167 return -EINVAL;
168 if (copy_from_user(buf, userbuf, count))
168 return -EFAULT; 169 return -EFAULT;
169 buf[count - 1] = '\0'; 170 buf[count] = '\0';
170 if (!strict_strtoul(buf, 10, &val)) 171 if (strict_strtoul(buf, 0, &gru_options))
171 gru_options = val; 172 return -EINVAL;
172 173
173 return count; 174 return count;
174} 175}
diff --git a/drivers/mmc/host/at91_mci.c b/drivers/mmc/host/at91_mci.c
index e556d42cc45a..63924e0c7ea9 100644
--- a/drivers/mmc/host/at91_mci.c
+++ b/drivers/mmc/host/at91_mci.c
@@ -72,7 +72,6 @@
72#include <asm/irq.h> 72#include <asm/irq.h>
73#include <asm/gpio.h> 73#include <asm/gpio.h>
74 74
75#include <asm/mach/mmc.h>
76#include <mach/board.h> 75#include <mach/board.h>
77#include <mach/cpu.h> 76#include <mach/cpu.h>
78#include <mach/at91_mci.h> 77#include <mach/at91_mci.h>
diff --git a/drivers/mmc/host/omap.c b/drivers/mmc/host/omap.c
index e7a331de5733..b8fd7af1ceeb 100644
--- a/drivers/mmc/host/omap.c
+++ b/drivers/mmc/host/omap.c
@@ -1529,6 +1529,7 @@ static int mmc_omap_remove(struct platform_device *pdev)
1529 host->pdata->cleanup(&pdev->dev); 1529 host->pdata->cleanup(&pdev->dev);
1530 1530
1531 mmc_omap_fclk_enable(host, 0); 1531 mmc_omap_fclk_enable(host, 0);
1532 free_irq(host->irq, host);
1532 clk_put(host->fclk); 1533 clk_put(host->fclk);
1533 clk_disable(host->iclk); 1534 clk_disable(host->iclk);
1534 clk_put(host->iclk); 1535 clk_put(host->iclk);
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c
index 4487cc097911..0aecaaebef3d 100644
--- a/drivers/mmc/host/omap_hsmmc.c
+++ b/drivers/mmc/host/omap_hsmmc.c
@@ -2013,7 +2013,7 @@ static struct platform_driver omap_hsmmc_driver = {
2013static int __init omap_hsmmc_init(void) 2013static int __init omap_hsmmc_init(void)
2014{ 2014{
2015 /* Register the MMC driver */ 2015 /* Register the MMC driver */
2016 return platform_driver_register(&omap_hsmmc_driver); 2016 return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe);
2017} 2017}
2018 2018
2019static void __exit omap_hsmmc_cleanup(void) 2019static void __exit omap_hsmmc_cleanup(void)
diff --git a/drivers/mmc/host/pxamci.c b/drivers/mmc/host/pxamci.c
index 5e0b1529964d..b00d67319058 100644
--- a/drivers/mmc/host/pxamci.c
+++ b/drivers/mmc/host/pxamci.c
@@ -693,7 +693,7 @@ static int pxamci_probe(struct platform_device *pdev)
693 if (gpio_is_valid(gpio_ro)) { 693 if (gpio_is_valid(gpio_ro)) {
694 ret = gpio_request(gpio_ro, "mmc card read only"); 694 ret = gpio_request(gpio_ro, "mmc card read only");
695 if (ret) { 695 if (ret) {
696 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_power); 696 dev_err(&pdev->dev, "Failed requesting gpio_ro %d\n", gpio_ro);
697 goto err_gpio_ro; 697 goto err_gpio_ro;
698 } 698 }
699 gpio_direction_input(gpio_ro); 699 gpio_direction_input(gpio_ro);
@@ -701,7 +701,7 @@ static int pxamci_probe(struct platform_device *pdev)
701 if (gpio_is_valid(gpio_cd)) { 701 if (gpio_is_valid(gpio_cd)) {
702 ret = gpio_request(gpio_cd, "mmc card detect"); 702 ret = gpio_request(gpio_cd, "mmc card detect");
703 if (ret) { 703 if (ret) {
704 dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_power); 704 dev_err(&pdev->dev, "Failed requesting gpio_cd %d\n", gpio_cd);
705 goto err_gpio_cd; 705 goto err_gpio_cd;
706 } 706 }
707 gpio_direction_input(gpio_cd); 707 gpio_direction_input(gpio_cd);
diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig
index 841e085ab74a..14be0755d7cd 100644
--- a/drivers/mtd/maps/Kconfig
+++ b/drivers/mtd/maps/Kconfig
@@ -486,6 +486,7 @@ config MTD_BFIN_ASYNC
486 486
487config MTD_GPIO_ADDR 487config MTD_GPIO_ADDR
488 tristate "GPIO-assisted Flash Chip Support" 488 tristate "GPIO-assisted Flash Chip Support"
489 depends on GENERIC_GPIO || GPIOLIB
489 depends on MTD_COMPLEX_MAPPINGS 490 depends on MTD_COMPLEX_MAPPINGS
490 select MTD_PARTITIONS 491 select MTD_PARTITIONS
491 help 492 help
diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile
index 1d5cf8636723..ae2f6dbe43c3 100644
--- a/drivers/mtd/maps/Makefile
+++ b/drivers/mtd/maps/Makefile
@@ -58,4 +58,6 @@ obj-$(CONFIG_MTD_PLATRAM) += plat-ram.o
58obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o 58obj-$(CONFIG_MTD_OMAP_NOR) += omap_nor.o
59obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o 59obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_vr_nor.o
60obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o 60obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o
61obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o
62obj-$(CONFIG_MTD_VMU) += vmu-flash.o
61obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o 63obj-$(CONFIG_MTD_GPIO_ADDR) += gpio-addr-flash.o
diff --git a/drivers/mtd/maps/gpio-addr-flash.c b/drivers/mtd/maps/gpio-addr-flash.c
index 44ef9a49a860..1ad5caf9fe69 100644
--- a/drivers/mtd/maps/gpio-addr-flash.c
+++ b/drivers/mtd/maps/gpio-addr-flash.c
@@ -13,7 +13,9 @@
13 * Licensed under the GPL-2 or later. 13 * Licensed under the GPL-2 or later.
14 */ 14 */
15 15
16#include <linux/gpio.h>
16#include <linux/init.h> 17#include <linux/init.h>
18#include <linux/io.h>
17#include <linux/kernel.h> 19#include <linux/kernel.h>
18#include <linux/module.h> 20#include <linux/module.h>
19#include <linux/mtd/mtd.h> 21#include <linux/mtd/mtd.h>
@@ -23,9 +25,6 @@
23#include <linux/platform_device.h> 25#include <linux/platform_device.h>
24#include <linux/types.h> 26#include <linux/types.h>
25 27
26#include <asm/gpio.h>
27#include <asm/io.h>
28
29#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); }) 28#define pr_devinit(fmt, args...) ({ static const __devinitconst char __fmt[] = fmt; printk(__fmt, ## args); })
30 29
31#define DRIVER_NAME "gpio-addr-flash" 30#define DRIVER_NAME "gpio-addr-flash"
diff --git a/drivers/mtd/maps/sa1100-flash.c b/drivers/mtd/maps/sa1100-flash.c
index fdb97f3d30e9..d7a47574d21e 100644
--- a/drivers/mtd/maps/sa1100-flash.c
+++ b/drivers/mtd/maps/sa1100-flash.c
@@ -209,8 +209,8 @@ static int sa1100_probe_subdev(struct sa_subdev_info *subdev, struct resource *r
209 } 209 }
210 subdev->mtd->owner = THIS_MODULE; 210 subdev->mtd->owner = THIS_MODULE;
211 211
212 printk(KERN_INFO "SA1100 flash: CFI device at 0x%08lx, %dMiB, " 212 printk(KERN_INFO "SA1100 flash: CFI device at 0x%08lx, %uMiB, %d-bit\n",
213 "%d-bit\n", phys, subdev->mtd->size >> 20, 213 phys, (unsigned)(subdev->mtd->size >> 20),
214 subdev->map.bankwidth * 8); 214 subdev->map.bankwidth * 8);
215 215
216 return 0; 216 return 0;
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 22113865438b..2957cc70da3d 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -761,6 +761,7 @@ static int nand_wait(struct mtd_info *mtd, struct nand_chip *chip)
761 * @mtd: mtd info structure 761 * @mtd: mtd info structure
762 * @chip: nand chip info structure 762 * @chip: nand chip info structure
763 * @buf: buffer to store read data 763 * @buf: buffer to store read data
764 * @page: page number to read
764 * 765 *
765 * Not for syndrome calculating ecc controllers, which use a special oob layout 766 * Not for syndrome calculating ecc controllers, which use a special oob layout
766 */ 767 */
@@ -777,6 +778,7 @@ static int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
777 * @mtd: mtd info structure 778 * @mtd: mtd info structure
778 * @chip: nand chip info structure 779 * @chip: nand chip info structure
779 * @buf: buffer to store read data 780 * @buf: buffer to store read data
781 * @page: page number to read
780 * 782 *
781 * We need a special oob layout and handling even when OOB isn't used. 783 * We need a special oob layout and handling even when OOB isn't used.
782 */ 784 */
@@ -818,6 +820,7 @@ static int nand_read_page_raw_syndrome(struct mtd_info *mtd, struct nand_chip *c
818 * @mtd: mtd info structure 820 * @mtd: mtd info structure
819 * @chip: nand chip info structure 821 * @chip: nand chip info structure
820 * @buf: buffer to store read data 822 * @buf: buffer to store read data
823 * @page: page number to read
821 */ 824 */
822static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip, 825static int nand_read_page_swecc(struct mtd_info *mtd, struct nand_chip *chip,
823 uint8_t *buf, int page) 826 uint8_t *buf, int page)
@@ -939,6 +942,7 @@ static int nand_read_subpage(struct mtd_info *mtd, struct nand_chip *chip, uint3
939 * @mtd: mtd info structure 942 * @mtd: mtd info structure
940 * @chip: nand chip info structure 943 * @chip: nand chip info structure
941 * @buf: buffer to store read data 944 * @buf: buffer to store read data
945 * @page: page number to read
942 * 946 *
943 * Not for syndrome calculating ecc controllers which need a special oob layout 947 * Not for syndrome calculating ecc controllers which need a special oob layout
944 */ 948 */
@@ -983,6 +987,7 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
983 * @mtd: mtd info structure 987 * @mtd: mtd info structure
984 * @chip: nand chip info structure 988 * @chip: nand chip info structure
985 * @buf: buffer to store read data 989 * @buf: buffer to store read data
990 * @page: page number to read
986 * 991 *
987 * Hardware ECC for large page chips, require OOB to be read first. 992 * Hardware ECC for large page chips, require OOB to be read first.
988 * For this ECC mode, the write_page method is re-used from ECC_HW. 993 * For this ECC mode, the write_page method is re-used from ECC_HW.
@@ -1031,6 +1036,7 @@ static int nand_read_page_hwecc_oob_first(struct mtd_info *mtd,
1031 * @mtd: mtd info structure 1036 * @mtd: mtd info structure
1032 * @chip: nand chip info structure 1037 * @chip: nand chip info structure
1033 * @buf: buffer to store read data 1038 * @buf: buffer to store read data
1039 * @page: page number to read
1034 * 1040 *
1035 * The hw generator calculates the error syndrome automatically. Therefor 1041 * The hw generator calculates the error syndrome automatically. Therefor
1036 * we need a special oob layout and handling. 1042 * we need a special oob layout and handling.
diff --git a/drivers/mtd/ubi/build.c b/drivers/mtd/ubi/build.c
index e1f7d0a78b9d..14cec04c34f9 100644
--- a/drivers/mtd/ubi/build.c
+++ b/drivers/mtd/ubi/build.c
@@ -42,6 +42,7 @@
42#include <linux/log2.h> 42#include <linux/log2.h>
43#include <linux/kthread.h> 43#include <linux/kthread.h>
44#include <linux/reboot.h> 44#include <linux/reboot.h>
45#include <linux/kernel.h>
45#include "ubi.h" 46#include "ubi.h"
46 47
47/* Maximum length of the 'mtd=' parameter */ 48/* Maximum length of the 'mtd=' parameter */
@@ -1257,7 +1258,7 @@ static int __init bytes_str_to_int(const char *str)
1257 unsigned long result; 1258 unsigned long result;
1258 1259
1259 result = simple_strtoul(str, &endp, 0); 1260 result = simple_strtoul(str, &endp, 0);
1260 if (str == endp || result < 0) { 1261 if (str == endp || result >= INT_MAX) {
1261 printk(KERN_ERR "UBI error: incorrect bytes count: \"%s\"\n", 1262 printk(KERN_ERR "UBI error: incorrect bytes count: \"%s\"\n",
1262 str); 1263 str);
1263 return -EINVAL; 1264 return -EINVAL;
diff --git a/drivers/mtd/ubi/scan.c b/drivers/mtd/ubi/scan.c
index e7161adc419d..90af61a2c3e4 100644
--- a/drivers/mtd/ubi/scan.c
+++ b/drivers/mtd/ubi/scan.c
@@ -794,16 +794,15 @@ static int process_eb(struct ubi_device *ubi, struct ubi_scan_info *si,
794 * number. 794 * number.
795 */ 795 */
796 image_seq = be32_to_cpu(ech->image_seq); 796 image_seq = be32_to_cpu(ech->image_seq);
797 if (!si->image_seq_set) { 797 if (!ubi->image_seq && image_seq)
798 ubi->image_seq = image_seq; 798 ubi->image_seq = image_seq;
799 si->image_seq_set = 1; 799 if (ubi->image_seq && image_seq &&
800 } else if (ubi->image_seq && ubi->image_seq != image_seq) { 800 ubi->image_seq != image_seq) {
801 ubi_err("bad image sequence number %d in PEB %d, " 801 ubi_err("bad image sequence number %d in PEB %d, "
802 "expected %d", image_seq, pnum, ubi->image_seq); 802 "expected %d", image_seq, pnum, ubi->image_seq);
803 ubi_dbg_dump_ec_hdr(ech); 803 ubi_dbg_dump_ec_hdr(ech);
804 return -EINVAL; 804 return -EINVAL;
805 } 805 }
806
807 } 806 }
808 807
809 /* OK, we've done with the EC header, let's look at the VID header */ 808 /* OK, we've done with the EC header, let's look at the VID header */
diff --git a/drivers/mtd/ubi/scan.h b/drivers/mtd/ubi/scan.h
index bab31695dace..ff179ad7ca55 100644
--- a/drivers/mtd/ubi/scan.h
+++ b/drivers/mtd/ubi/scan.h
@@ -103,7 +103,6 @@ struct ubi_scan_volume {
103 * @ec_sum: a temporary variable used when calculating @mean_ec 103 * @ec_sum: a temporary variable used when calculating @mean_ec
104 * @ec_count: a temporary variable used when calculating @mean_ec 104 * @ec_count: a temporary variable used when calculating @mean_ec
105 * @corr_count: count of corrupted PEBs 105 * @corr_count: count of corrupted PEBs
106 * @image_seq_set: indicates @ubi->image_seq is known
107 * 106 *
108 * This data structure contains the result of scanning and may be used by other 107 * This data structure contains the result of scanning and may be used by other
109 * UBI sub-systems to build final UBI data structures, further error-recovery 108 * UBI sub-systems to build final UBI data structures, further error-recovery
@@ -127,7 +126,6 @@ struct ubi_scan_info {
127 uint64_t ec_sum; 126 uint64_t ec_sum;
128 int ec_count; 127 int ec_count;
129 int corr_count; 128 int corr_count;
130 int image_seq_set;
131}; 129};
132 130
133struct ubi_device; 131struct ubi_device;
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 712776089b46..e19ca4bb7510 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -1741,6 +1741,7 @@ config KS8851
1741config KS8851_MLL 1741config KS8851_MLL
1742 tristate "Micrel KS8851 MLL" 1742 tristate "Micrel KS8851 MLL"
1743 depends on HAS_IOMEM 1743 depends on HAS_IOMEM
1744 select MII
1744 help 1745 help
1745 This platform driver is for Micrel KS8851 Address/data bus 1746 This platform driver is for Micrel KS8851 Address/data bus
1746 multiplexed network chip. 1747 multiplexed network chip.
@@ -2482,6 +2483,8 @@ config S6GMAC
2482 To compile this driver as a module, choose M here. The module 2483 To compile this driver as a module, choose M here. The module
2483 will be called s6gmac. 2484 will be called s6gmac.
2484 2485
2486source "drivers/net/stmmac/Kconfig"
2487
2485endif # NETDEV_1000 2488endif # NETDEV_1000
2486 2489
2487# 2490#
@@ -3230,4 +3233,12 @@ config VIRTIO_NET
3230 This is the virtual network driver for virtio. It can be used with 3233 This is the virtual network driver for virtio. It can be used with
3231 lguest or QEMU based VMMs (like KVM or Xen). Say Y or M. 3234 lguest or QEMU based VMMs (like KVM or Xen). Say Y or M.
3232 3235
3236config VMXNET3
3237 tristate "VMware VMXNET3 ethernet driver"
3238 depends on PCI && X86 && INET
3239 help
3240 This driver supports VMware's vmxnet3 virtual ethernet NIC.
3241 To compile this driver as a module, choose M here: the
3242 module will be called vmxnet3.
3243
3233endif # NETDEVICES 3244endif # NETDEVICES
diff --git a/drivers/net/Makefile b/drivers/net/Makefile
index d866b8cf65d1..246323d7f161 100644
--- a/drivers/net/Makefile
+++ b/drivers/net/Makefile
@@ -2,6 +2,10 @@
2# Makefile for the Linux network (ethercard) device drivers. 2# Makefile for the Linux network (ethercard) device drivers.
3# 3#
4 4
5obj-$(CONFIG_MII) += mii.o
6obj-$(CONFIG_MDIO) += mdio.o
7obj-$(CONFIG_PHYLIB) += phy/
8
5obj-$(CONFIG_TI_DAVINCI_EMAC) += davinci_emac.o 9obj-$(CONFIG_TI_DAVINCI_EMAC) += davinci_emac.o
6 10
7obj-$(CONFIG_E1000) += e1000/ 11obj-$(CONFIG_E1000) += e1000/
@@ -26,6 +30,7 @@ obj-$(CONFIG_TEHUTI) += tehuti.o
26obj-$(CONFIG_ENIC) += enic/ 30obj-$(CONFIG_ENIC) += enic/
27obj-$(CONFIG_JME) += jme.o 31obj-$(CONFIG_JME) += jme.o
28obj-$(CONFIG_BE2NET) += benet/ 32obj-$(CONFIG_BE2NET) += benet/
33obj-$(CONFIG_VMXNET3) += vmxnet3/
29 34
30gianfar_driver-objs := gianfar.o \ 35gianfar_driver-objs := gianfar.o \
31 gianfar_ethtool.o \ 36 gianfar_ethtool.o \
@@ -95,15 +100,12 @@ obj-$(CONFIG_VIA_VELOCITY) += via-velocity.o
95obj-$(CONFIG_ADAPTEC_STARFIRE) += starfire.o 100obj-$(CONFIG_ADAPTEC_STARFIRE) += starfire.o
96obj-$(CONFIG_RIONET) += rionet.o 101obj-$(CONFIG_RIONET) += rionet.o
97obj-$(CONFIG_SH_ETH) += sh_eth.o 102obj-$(CONFIG_SH_ETH) += sh_eth.o
103obj-$(CONFIG_STMMAC_ETH) += stmmac/
98 104
99# 105#
100# end link order section 106# end link order section
101# 107#
102 108
103obj-$(CONFIG_MII) += mii.o
104obj-$(CONFIG_MDIO) += mdio.o
105obj-$(CONFIG_PHYLIB) += phy/
106
107obj-$(CONFIG_SUNDANCE) += sundance.o 109obj-$(CONFIG_SUNDANCE) += sundance.o
108obj-$(CONFIG_HAMACHI) += hamachi.o 110obj-$(CONFIG_HAMACHI) += hamachi.o
109obj-$(CONFIG_NET) += Space.o loopback.o 111obj-$(CONFIG_NET) += Space.o loopback.o
diff --git a/drivers/net/acenic.c b/drivers/net/acenic.c
index 5f0b05c2d71f..d82a9a994753 100644
--- a/drivers/net/acenic.c
+++ b/drivers/net/acenic.c
@@ -1209,7 +1209,8 @@ static int __devinit ace_init(struct net_device *dev)
1209 memset(ap->info, 0, sizeof(struct ace_info)); 1209 memset(ap->info, 0, sizeof(struct ace_info));
1210 memset(ap->skb, 0, sizeof(struct ace_skb)); 1210 memset(ap->skb, 0, sizeof(struct ace_skb));
1211 1211
1212 if (ace_load_firmware(dev)) 1212 ecode = ace_load_firmware(dev);
1213 if (ecode)
1213 goto init_error; 1214 goto init_error;
1214 1215
1215 ap->fw_running = 0; 1216 ap->fw_running = 0;
diff --git a/drivers/net/au1000_eth.c b/drivers/net/au1000_eth.c
index 04f63c77071d..ce6f1ac25df8 100644
--- a/drivers/net/au1000_eth.c
+++ b/drivers/net/au1000_eth.c
@@ -34,6 +34,7 @@
34 * 34 *
35 * 35 *
36 */ 36 */
37#include <linux/capability.h>
37#include <linux/dma-mapping.h> 38#include <linux/dma-mapping.h>
38#include <linux/module.h> 39#include <linux/module.h>
39#include <linux/kernel.h> 40#include <linux/kernel.h>
diff --git a/drivers/net/benet/be.h b/drivers/net/benet/be.h
index a80da0e14a52..3b79a225628a 100644
--- a/drivers/net/benet/be.h
+++ b/drivers/net/benet/be.h
@@ -259,6 +259,8 @@ struct be_adapter {
259 u32 port_num; 259 u32 port_num;
260 bool promiscuous; 260 bool promiscuous;
261 u32 cap; 261 u32 cap;
262 u32 rx_fc; /* Rx flow control */
263 u32 tx_fc; /* Tx flow control */
262}; 264};
263 265
264extern const struct ethtool_ops be_ethtool_ops; 266extern const struct ethtool_ops be_ethtool_ops;
diff --git a/drivers/net/benet/be_cmds.c b/drivers/net/benet/be_cmds.c
index 89876ade5e33..28a0eda92680 100644
--- a/drivers/net/benet/be_cmds.c
+++ b/drivers/net/benet/be_cmds.c
@@ -243,15 +243,26 @@ static int be_POST_stage_get(struct be_adapter *adapter, u16 *stage)
243 243
244int be_cmd_POST(struct be_adapter *adapter) 244int be_cmd_POST(struct be_adapter *adapter)
245{ 245{
246 u16 stage, error; 246 u16 stage;
247 int status, timeout = 0;
247 248
248 error = be_POST_stage_get(adapter, &stage); 249 do {
249 if (error || stage != POST_STAGE_ARMFW_RDY) { 250 status = be_POST_stage_get(adapter, &stage);
250 dev_err(&adapter->pdev->dev, "POST failed.\n"); 251 if (status) {
251 return -1; 252 dev_err(&adapter->pdev->dev, "POST error; stage=0x%x\n",
252 } 253 stage);
254 return -1;
255 } else if (stage != POST_STAGE_ARMFW_RDY) {
256 set_current_state(TASK_INTERRUPTIBLE);
257 schedule_timeout(2 * HZ);
258 timeout += 2;
259 } else {
260 return 0;
261 }
262 } while (timeout < 20);
253 263
254 return 0; 264 dev_err(&adapter->pdev->dev, "POST timeout; stage=0x%x\n", stage);
265 return -1;
255} 266}
256 267
257static inline void *embedded_payload(struct be_mcc_wrb *wrb) 268static inline void *embedded_payload(struct be_mcc_wrb *wrb)
@@ -729,8 +740,8 @@ int be_cmd_q_destroy(struct be_adapter *adapter, struct be_queue_info *q,
729/* Create an rx filtering policy configuration on an i/f 740/* Create an rx filtering policy configuration on an i/f
730 * Uses mbox 741 * Uses mbox
731 */ 742 */
732int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac, 743int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags, u32 en_flags,
733 bool pmac_invalid, u32 *if_handle, u32 *pmac_id) 744 u8 *mac, bool pmac_invalid, u32 *if_handle, u32 *pmac_id)
734{ 745{
735 struct be_mcc_wrb *wrb; 746 struct be_mcc_wrb *wrb;
736 struct be_cmd_req_if_create *req; 747 struct be_cmd_req_if_create *req;
@@ -746,8 +757,8 @@ int be_cmd_if_create(struct be_adapter *adapter, u32 flags, u8 *mac,
746 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON, 757 be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
747 OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req)); 758 OPCODE_COMMON_NTWK_INTERFACE_CREATE, sizeof(*req));
748 759
749 req->capability_flags = cpu_to_le32(flags); 760 req->capability_flags = cpu_to_le32(cap_flags);
750 req->enable_flags = cpu_to_le32(flags); 761 req->enable_flags = cpu_to_le32(en_flags);
751 req->pmac_invalid = pmac_invalid; 762 req->pmac_invalid = pmac_invalid;
752 if (!pmac_invalid) 763 if (!pmac_invalid)
753 memcpy(req->mac_addr, mac, ETH_ALEN); 764 memcpy(req->mac_addr, mac, ETH_ALEN);
diff --git a/drivers/net/benet/be_cmds.h b/drivers/net/benet/be_cmds.h
index a86f917f85f4..e5f9676cf1bc 100644
--- a/drivers/net/benet/be_cmds.h
+++ b/drivers/net/benet/be_cmds.h
@@ -68,7 +68,7 @@ enum {
68#define CQE_STATUS_COMPL_MASK 0xFFFF 68#define CQE_STATUS_COMPL_MASK 0xFFFF
69#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */ 69#define CQE_STATUS_COMPL_SHIFT 0 /* bits 0 - 15 */
70#define CQE_STATUS_EXTD_MASK 0xFFFF 70#define CQE_STATUS_EXTD_MASK 0xFFFF
71#define CQE_STATUS_EXTD_SHIFT 0 /* bits 0 - 15 */ 71#define CQE_STATUS_EXTD_SHIFT 16 /* bits 16 - 31 */
72 72
73struct be_mcc_compl { 73struct be_mcc_compl {
74 u32 status; /* dword 0 */ 74 u32 status; /* dword 0 */
@@ -720,8 +720,9 @@ extern int be_cmd_mac_addr_query(struct be_adapter *adapter, u8 *mac_addr,
720extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr, 720extern int be_cmd_pmac_add(struct be_adapter *adapter, u8 *mac_addr,
721 u32 if_id, u32 *pmac_id); 721 u32 if_id, u32 *pmac_id);
722extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id); 722extern int be_cmd_pmac_del(struct be_adapter *adapter, u32 if_id, u32 pmac_id);
723extern int be_cmd_if_create(struct be_adapter *adapter, u32 if_flags, u8 *mac, 723extern int be_cmd_if_create(struct be_adapter *adapter, u32 cap_flags,
724 bool pmac_invalid, u32 *if_handle, u32 *pmac_id); 724 u32 en_flags, u8 *mac, bool pmac_invalid,
725 u32 *if_handle, u32 *pmac_id);
725extern int be_cmd_if_destroy(struct be_adapter *adapter, u32 if_handle); 726extern int be_cmd_if_destroy(struct be_adapter *adapter, u32 if_handle);
726extern int be_cmd_eq_create(struct be_adapter *adapter, 727extern int be_cmd_eq_create(struct be_adapter *adapter,
727 struct be_queue_info *eq, int eq_delay); 728 struct be_queue_info *eq, int eq_delay);
diff --git a/drivers/net/benet/be_ethtool.c b/drivers/net/benet/be_ethtool.c
index cda5bf2fc50a..f0fd95b43c07 100644
--- a/drivers/net/benet/be_ethtool.c
+++ b/drivers/net/benet/be_ethtool.c
@@ -323,10 +323,12 @@ be_set_pauseparam(struct net_device *netdev, struct ethtool_pauseparam *ecmd)
323 323
324 if (ecmd->autoneg != 0) 324 if (ecmd->autoneg != 0)
325 return -EINVAL; 325 return -EINVAL;
326 adapter->tx_fc = ecmd->tx_pause;
327 adapter->rx_fc = ecmd->rx_pause;
326 328
327 status = be_cmd_set_flow_control(adapter, ecmd->tx_pause, 329 status = be_cmd_set_flow_control(adapter,
328 ecmd->rx_pause); 330 adapter->tx_fc, adapter->rx_fc);
329 if (!status) 331 if (status)
330 dev_warn(&adapter->pdev->dev, "Pause param set failed.\n"); 332 dev_warn(&adapter->pdev->dev, "Pause param set failed.\n");
331 333
332 return status; 334 return status;
diff --git a/drivers/net/benet/be_main.c b/drivers/net/benet/be_main.c
index 6d5e81f7046f..876b357101fa 100644
--- a/drivers/net/benet/be_main.c
+++ b/drivers/net/benet/be_main.c
@@ -1610,29 +1610,42 @@ static int be_open(struct net_device *netdev)
1610 1610
1611 status = be_cmd_link_status_query(adapter, &link_up); 1611 status = be_cmd_link_status_query(adapter, &link_up);
1612 if (status) 1612 if (status)
1613 return status; 1613 goto ret_sts;
1614 be_link_status_update(adapter, link_up); 1614 be_link_status_update(adapter, link_up);
1615 1615
1616 status = be_vid_config(adapter);
1617 if (status)
1618 goto ret_sts;
1619
1620 status = be_cmd_set_flow_control(adapter,
1621 adapter->tx_fc, adapter->rx_fc);
1622 if (status)
1623 goto ret_sts;
1624
1616 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100)); 1625 schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
1617 return 0; 1626ret_sts:
1627 return status;
1618} 1628}
1619 1629
1620static int be_setup(struct be_adapter *adapter) 1630static int be_setup(struct be_adapter *adapter)
1621{ 1631{
1622 struct net_device *netdev = adapter->netdev; 1632 struct net_device *netdev = adapter->netdev;
1623 u32 if_flags; 1633 u32 cap_flags, en_flags;
1624 int status; 1634 int status;
1625 1635
1626 if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS | 1636 cap_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1627 BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED | 1637 BE_IF_FLAGS_MCAST_PROMISCUOUS |
1628 BE_IF_FLAGS_PASS_L3L4_ERRORS; 1638 BE_IF_FLAGS_PROMISCUOUS |
1629 status = be_cmd_if_create(adapter, if_flags, netdev->dev_addr, 1639 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1630 false/* pmac_invalid */, &adapter->if_handle, 1640 en_flags = BE_IF_FLAGS_UNTAGGED | BE_IF_FLAGS_BROADCAST |
1631 &adapter->pmac_id); 1641 BE_IF_FLAGS_PASS_L3L4_ERRORS;
1642
1643 status = be_cmd_if_create(adapter, cap_flags, en_flags,
1644 netdev->dev_addr, false/* pmac_invalid */,
1645 &adapter->if_handle, &adapter->pmac_id);
1632 if (status != 0) 1646 if (status != 0)
1633 goto do_none; 1647 goto do_none;
1634 1648
1635
1636 status = be_tx_queues_create(adapter); 1649 status = be_tx_queues_create(adapter);
1637 if (status != 0) 1650 if (status != 0)
1638 goto if_destroy; 1651 goto if_destroy;
@@ -1645,17 +1658,8 @@ static int be_setup(struct be_adapter *adapter)
1645 if (status != 0) 1658 if (status != 0)
1646 goto rx_qs_destroy; 1659 goto rx_qs_destroy;
1647 1660
1648 status = be_vid_config(adapter);
1649 if (status != 0)
1650 goto mccqs_destroy;
1651
1652 status = be_cmd_set_flow_control(adapter, true, true);
1653 if (status != 0)
1654 goto mccqs_destroy;
1655 return 0; 1661 return 0;
1656 1662
1657mccqs_destroy:
1658 be_mcc_queues_destroy(adapter);
1659rx_qs_destroy: 1663rx_qs_destroy:
1660 be_rx_queues_destroy(adapter); 1664 be_rx_queues_destroy(adapter);
1661tx_qs_destroy: 1665tx_qs_destroy:
@@ -1906,6 +1910,10 @@ static void be_netdev_init(struct net_device *netdev)
1906 1910
1907 adapter->rx_csum = true; 1911 adapter->rx_csum = true;
1908 1912
1913 /* Default settings for Rx and Tx flow control */
1914 adapter->rx_fc = true;
1915 adapter->tx_fc = true;
1916
1909 netif_set_gso_max_size(netdev, 65535); 1917 netif_set_gso_max_size(netdev, 65535);
1910 1918
1911 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops); 1919 BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
@@ -2055,6 +2063,10 @@ static int be_hw_up(struct be_adapter *adapter)
2055 if (status) 2063 if (status)
2056 return status; 2064 return status;
2057 2065
2066 status = be_cmd_reset_function(adapter);
2067 if (status)
2068 return status;
2069
2058 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver); 2070 status = be_cmd_get_fw_ver(adapter, adapter->fw_ver);
2059 if (status) 2071 if (status)
2060 return status; 2072 return status;
@@ -2108,10 +2120,6 @@ static int __devinit be_probe(struct pci_dev *pdev,
2108 if (status) 2120 if (status)
2109 goto free_netdev; 2121 goto free_netdev;
2110 2122
2111 status = be_cmd_reset_function(adapter);
2112 if (status)
2113 goto ctrl_clean;
2114
2115 status = be_stats_init(adapter); 2123 status = be_stats_init(adapter);
2116 if (status) 2124 if (status)
2117 goto ctrl_clean; 2125 goto ctrl_clean;
@@ -2168,6 +2176,7 @@ static int be_suspend(struct pci_dev *pdev, pm_message_t state)
2168 be_close(netdev); 2176 be_close(netdev);
2169 rtnl_unlock(); 2177 rtnl_unlock();
2170 } 2178 }
2179 be_cmd_get_flow_control(adapter, &adapter->tx_fc, &adapter->rx_fc);
2171 be_clear(adapter); 2180 be_clear(adapter);
2172 2181
2173 pci_save_state(pdev); 2182 pci_save_state(pdev);
diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h
index 6c7f795d12de..a4d83409f205 100644
--- a/drivers/net/bnx2.h
+++ b/drivers/net/bnx2.h
@@ -361,9 +361,12 @@ struct l2_fhdr {
361#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<28) 361#define BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE (1<<28)
362 362
363#define BNX2_L2CTX_HOST_BDIDX 0x00000004 363#define BNX2_L2CTX_HOST_BDIDX 0x00000004
364#define BNX2_L2CTX_STATUSB_NUM_SHIFT 16 364#define BNX2_L2CTX_L5_STATUSB_NUM_SHIFT 16
365#define BNX2_L2CTX_STATUSB_NUM(sb_id) \ 365#define BNX2_L2CTX_L2_STATUSB_NUM_SHIFT 24
366 (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_STATUSB_NUM_SHIFT) : 0) 366#define BNX2_L2CTX_L5_STATUSB_NUM(sb_id) \
367 (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L5_STATUSB_NUM_SHIFT) : 0)
368#define BNX2_L2CTX_L2_STATUSB_NUM(sb_id) \
369 (((sb_id) > 0) ? (((sb_id) + 7) << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT) : 0)
367#define BNX2_L2CTX_HOST_BSEQ 0x00000008 370#define BNX2_L2CTX_HOST_BSEQ 0x00000008
368#define BNX2_L2CTX_NX_BSEQ 0x0000000c 371#define BNX2_L2CTX_NX_BSEQ 0x0000000c
369#define BNX2_L2CTX_NX_BDHADDR_HI 0x00000010 372#define BNX2_L2CTX_NX_BDHADDR_HI 0x00000010
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 69c5b15e22da..40fb5eefc72e 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -691,7 +691,7 @@ static int bond_check_dev_link(struct bonding *bond,
691 struct net_device *slave_dev, int reporting) 691 struct net_device *slave_dev, int reporting)
692{ 692{
693 const struct net_device_ops *slave_ops = slave_dev->netdev_ops; 693 const struct net_device_ops *slave_ops = slave_dev->netdev_ops;
694 static int (*ioctl)(struct net_device *, struct ifreq *, int); 694 int (*ioctl)(struct net_device *, struct ifreq *, int);
695 struct ifreq ifr; 695 struct ifreq ifr;
696 struct mii_ioctl_data *mii; 696 struct mii_ioctl_data *mii;
697 697
@@ -3665,10 +3665,10 @@ static int bond_xmit_hash_policy_l23(struct sk_buff *skb,
3665 3665
3666 if (skb->protocol == htons(ETH_P_IP)) { 3666 if (skb->protocol == htons(ETH_P_IP)) {
3667 return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^ 3667 return ((ntohl(iph->saddr ^ iph->daddr) & 0xffff) ^
3668 (data->h_dest[5] ^ bond_dev->dev_addr[5])) % count; 3668 (data->h_dest[5] ^ data->h_source[5])) % count;
3669 } 3669 }
3670 3670
3671 return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; 3671 return (data->h_dest[5] ^ data->h_source[5]) % count;
3672} 3672}
3673 3673
3674/* 3674/*
@@ -3695,7 +3695,7 @@ static int bond_xmit_hash_policy_l34(struct sk_buff *skb,
3695 3695
3696 } 3696 }
3697 3697
3698 return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; 3698 return (data->h_dest[5] ^ data->h_source[5]) % count;
3699} 3699}
3700 3700
3701/* 3701/*
@@ -3706,7 +3706,7 @@ static int bond_xmit_hash_policy_l2(struct sk_buff *skb,
3706{ 3706{
3707 struct ethhdr *data = (struct ethhdr *)skb->data; 3707 struct ethhdr *data = (struct ethhdr *)skb->data;
3708 3708
3709 return (data->h_dest[5] ^ bond_dev->dev_addr[5]) % count; 3709 return (data->h_dest[5] ^ data->h_source[5]) % count;
3710} 3710}
3711 3711
3712/*-------------------------- Device entry points ----------------------------*/ 3712/*-------------------------- Device entry points ----------------------------*/
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index df32c109b7ac..772f6d2489ce 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -35,66 +35,16 @@ config CAN_CALC_BITTIMING
35 arguments "tq", "prop_seg", "phase_seg1", "phase_seg2" and "sjw". 35 arguments "tq", "prop_seg", "phase_seg1", "phase_seg2" and "sjw".
36 If unsure, say Y. 36 If unsure, say Y.
37 37
38config CAN_SJA1000
39 depends on CAN_DEV && HAS_IOMEM
40 tristate "Philips SJA1000"
41 ---help---
42 Driver for the SJA1000 CAN controllers from Philips or NXP
43
44config CAN_SJA1000_ISA
45 depends on CAN_SJA1000 && ISA
46 tristate "ISA Bus based legacy SJA1000 driver"
47 ---help---
48 This driver adds legacy support for SJA1000 chips connected to
49 the ISA bus using I/O port, memory mapped or indirect access.
50
51config CAN_SJA1000_PLATFORM
52 depends on CAN_SJA1000
53 tristate "Generic Platform Bus based SJA1000 driver"
54 ---help---
55 This driver adds support for the SJA1000 chips connected to
56 the "platform bus" (Linux abstraction for directly to the
57 processor attached devices). Which can be found on various
58 boards from Phytec (http://www.phytec.de) like the PCM027,
59 PCM038.
60
61config CAN_SJA1000_OF_PLATFORM
62 depends on CAN_SJA1000 && PPC_OF
63 tristate "Generic OF Platform Bus based SJA1000 driver"
64 ---help---
65 This driver adds support for the SJA1000 chips connected to
66 the OpenFirmware "platform bus" found on embedded systems with
67 OpenFirmware bindings, e.g. if you have a PowerPC based system
68 you may want to enable this option.
69
70config CAN_EMS_PCI
71 tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card"
72 depends on PCI && CAN_SJA1000
73 ---help---
74 This driver is for the one, two or four channel CPC-PCI,
75 CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche
76 (http://www.ems-wuensche.de).
77
78config CAN_EMS_USB
79 tristate "EMS CPC-USB/ARM7 CAN/USB interface"
80 depends on USB && CAN_DEV
81 ---help---
82 This driver is for the one channel CPC-USB/ARM7 CAN/USB interface
83 from from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).
84
85config CAN_KVASER_PCI
86 tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"
87 depends on PCI && CAN_SJA1000
88 ---help---
89 This driver is for the the PCIcanx and PCIcan cards (1, 2 or
90 4 channel) from Kvaser (http://www.kvaser.com).
91
92config CAN_AT91 38config CAN_AT91
93 tristate "Atmel AT91 onchip CAN controller" 39 tristate "Atmel AT91 onchip CAN controller"
94 depends on CAN && CAN_DEV && ARCH_AT91SAM9263 40 depends on CAN_DEV && ARCH_AT91SAM9263
95 ---help--- 41 ---help---
96 This is a driver for the SoC CAN controller in Atmel's AT91SAM9263. 42 This is a driver for the SoC CAN controller in Atmel's AT91SAM9263.
97 43
44source "drivers/net/can/sja1000/Kconfig"
45
46source "drivers/net/can/usb/Kconfig"
47
98config CAN_DEBUG_DEVICES 48config CAN_DEBUG_DEVICES
99 bool "CAN devices debugging messages" 49 bool "CAN devices debugging messages"
100 depends on CAN 50 depends on CAN
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
index f0b9a1e1db46..2868fe842a41 100644
--- a/drivers/net/can/dev.c
+++ b/drivers/net/can/dev.c
@@ -589,6 +589,22 @@ static int can_changelink(struct net_device *dev,
589 return 0; 589 return 0;
590} 590}
591 591
592static size_t can_get_size(const struct net_device *dev)
593{
594 struct can_priv *priv = netdev_priv(dev);
595 size_t size;
596
597 size = nla_total_size(sizeof(u32)); /* IFLA_CAN_STATE */
598 size += sizeof(struct can_ctrlmode); /* IFLA_CAN_CTRLMODE */
599 size += nla_total_size(sizeof(u32)); /* IFLA_CAN_RESTART_MS */
600 size += sizeof(struct can_bittiming); /* IFLA_CAN_BITTIMING */
601 size += sizeof(struct can_clock); /* IFLA_CAN_CLOCK */
602 if (priv->bittiming_const) /* IFLA_CAN_BITTIMING_CONST */
603 size += sizeof(struct can_bittiming_const);
604
605 return size;
606}
607
592static int can_fill_info(struct sk_buff *skb, const struct net_device *dev) 608static int can_fill_info(struct sk_buff *skb, const struct net_device *dev)
593{ 609{
594 struct can_priv *priv = netdev_priv(dev); 610 struct can_priv *priv = netdev_priv(dev);
@@ -613,6 +629,11 @@ nla_put_failure:
613 return -EMSGSIZE; 629 return -EMSGSIZE;
614} 630}
615 631
632static size_t can_get_xstats_size(const struct net_device *dev)
633{
634 return sizeof(struct can_device_stats);
635}
636
616static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev) 637static int can_fill_xstats(struct sk_buff *skb, const struct net_device *dev)
617{ 638{
618 struct can_priv *priv = netdev_priv(dev); 639 struct can_priv *priv = netdev_priv(dev);
@@ -639,7 +660,9 @@ static struct rtnl_link_ops can_link_ops __read_mostly = {
639 .setup = can_setup, 660 .setup = can_setup,
640 .newlink = can_newlink, 661 .newlink = can_newlink,
641 .changelink = can_changelink, 662 .changelink = can_changelink,
663 .get_size = can_get_size,
642 .fill_info = can_fill_info, 664 .fill_info = can_fill_info,
665 .get_xstats_size = can_get_xstats_size,
643 .fill_xstats = can_fill_xstats, 666 .fill_xstats = can_fill_xstats,
644}; 667};
645 668
diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig
new file mode 100644
index 000000000000..4c674927f247
--- /dev/null
+++ b/drivers/net/can/sja1000/Kconfig
@@ -0,0 +1,47 @@
1menuconfig CAN_SJA1000
2 tristate "Philips/NXP SJA1000 devices"
3 depends on CAN_DEV && HAS_IOMEM
4
5if CAN_SJA1000
6
7config CAN_SJA1000_ISA
8 tristate "ISA Bus based legacy SJA1000 driver"
9 depends on ISA
10 ---help---
11 This driver adds legacy support for SJA1000 chips connected to
12 the ISA bus using I/O port, memory mapped or indirect access.
13
14config CAN_SJA1000_PLATFORM
15 tristate "Generic Platform Bus based SJA1000 driver"
16 ---help---
17 This driver adds support for the SJA1000 chips connected to
18 the "platform bus" (Linux abstraction for directly to the
19 processor attached devices). Which can be found on various
20 boards from Phytec (http://www.phytec.de) like the PCM027,
21 PCM038.
22
23config CAN_SJA1000_OF_PLATFORM
24 tristate "Generic OF Platform Bus based SJA1000 driver"
25 depends on PPC_OF
26 ---help---
27 This driver adds support for the SJA1000 chips connected to
28 the OpenFirmware "platform bus" found on embedded systems with
29 OpenFirmware bindings, e.g. if you have a PowerPC based system
30 you may want to enable this option.
31
32config CAN_EMS_PCI
33 tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card"
34 depends on PCI
35 ---help---
36 This driver is for the one, two or four channel CPC-PCI,
37 CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche
38 (http://www.ems-wuensche.de).
39
40config CAN_KVASER_PCI
41 tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards"
42 depends on PCI
43 ---help---
44 This driver is for the the PCIcanx and PCIcan cards (1, 2 or
45 4 channel) from Kvaser (http://www.kvaser.com).
46
47endif
diff --git a/drivers/net/can/sja1000/sja1000_of_platform.c b/drivers/net/can/sja1000/sja1000_of_platform.c
index 3373560405ba..9dd076a626a5 100644
--- a/drivers/net/can/sja1000/sja1000_of_platform.c
+++ b/drivers/net/can/sja1000/sja1000_of_platform.c
@@ -213,6 +213,7 @@ static struct of_device_id __devinitdata sja1000_ofp_table[] = {
213 {.compatible = "nxp,sja1000"}, 213 {.compatible = "nxp,sja1000"},
214 {}, 214 {},
215}; 215};
216MODULE_DEVICE_TABLE(of, sja1000_ofp_table);
216 217
217static struct of_platform_driver sja1000_ofp_driver = { 218static struct of_platform_driver sja1000_ofp_driver = {
218 .owner = THIS_MODULE, 219 .owner = THIS_MODULE,
diff --git a/drivers/net/can/usb/Kconfig b/drivers/net/can/usb/Kconfig
new file mode 100644
index 000000000000..bbc78e0b8a15
--- /dev/null
+++ b/drivers/net/can/usb/Kconfig
@@ -0,0 +1,10 @@
1menu "CAN USB interfaces"
2 depends on USB && CAN_DEV
3
4config CAN_EMS_USB
5 tristate "EMS CPC-USB/ARM7 CAN/USB interface"
6 ---help---
7 This driver is for the one channel CPC-USB/ARM7 CAN/USB interface
8 from from EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de).
9
10endmenu
diff --git a/drivers/net/can/usb/Makefile b/drivers/net/can/usb/Makefile
index c3f75ba701b1..0afd51d4c7a5 100644
--- a/drivers/net/can/usb/Makefile
+++ b/drivers/net/can/usb/Makefile
@@ -3,3 +3,5 @@
3# 3#
4 4
5obj-$(CONFIG_CAN_EMS_USB) += ems_usb.o 5obj-$(CONFIG_CAN_EMS_USB) += ems_usb.o
6
7ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/usb/ems_usb.c b/drivers/net/can/usb/ems_usb.c
index 9012e0abc626..abdbd9c2b788 100644
--- a/drivers/net/can/usb/ems_usb.c
+++ b/drivers/net/can/usb/ems_usb.c
@@ -319,7 +319,7 @@ static void ems_usb_rx_can_msg(struct ems_usb *dev, struct ems_cpc_msg *msg)
319 319
320 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame)); 320 cf = (struct can_frame *)skb_put(skb, sizeof(struct can_frame));
321 321
322 cf->can_id = msg->msg.can_msg.id; 322 cf->can_id = le32_to_cpu(msg->msg.can_msg.id);
323 cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8); 323 cf->can_dlc = min_t(u8, msg->msg.can_msg.length, 8);
324 324
325 if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME 325 if (msg->type == CPC_MSG_TYPE_EXT_CAN_FRAME
@@ -813,6 +813,9 @@ static netdev_tx_t ems_usb_start_xmit(struct sk_buff *skb, struct net_device *ne
813 msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc; 813 msg->length = CPC_CAN_MSG_MIN_SIZE + cf->can_dlc;
814 } 814 }
815 815
816 /* Respect byte order */
817 msg->msg.can_msg.id = cpu_to_le32(msg->msg.can_msg.id);
818
816 for (i = 0; i < MAX_TX_URBS; i++) { 819 for (i = 0; i < MAX_TX_URBS; i++) {
817 if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) { 820 if (dev->tx_contexts[i].echo_index == MAX_TX_URBS) {
818 context = &dev->tx_contexts[i]; 821 context = &dev->tx_contexts[i];
diff --git a/drivers/net/cassini.c b/drivers/net/cassini.c
index 05916aafa4f1..f857afe8e488 100644
--- a/drivers/net/cassini.c
+++ b/drivers/net/cassini.c
@@ -4342,11 +4342,11 @@ static int cas_open(struct net_device *dev)
4342 cas_unlock_all_restore(cp, flags); 4342 cas_unlock_all_restore(cp, flags);
4343 } 4343 }
4344 4344
4345 err = -ENOMEM;
4345 if (cas_tx_tiny_alloc(cp) < 0) 4346 if (cas_tx_tiny_alloc(cp) < 0)
4346 return -ENOMEM; 4347 goto err_unlock;
4347 4348
4348 /* alloc rx descriptors */ 4349 /* alloc rx descriptors */
4349 err = -ENOMEM;
4350 if (cas_alloc_rxds(cp) < 0) 4350 if (cas_alloc_rxds(cp) < 0)
4351 goto err_tx_tiny; 4351 goto err_tx_tiny;
4352 4352
@@ -4386,6 +4386,7 @@ err_spare:
4386 cas_free_rxds(cp); 4386 cas_free_rxds(cp);
4387err_tx_tiny: 4387err_tx_tiny:
4388 cas_tx_tiny_free(cp); 4388 cas_tx_tiny_free(cp);
4389err_unlock:
4389 mutex_unlock(&cp->pm_mutex); 4390 mutex_unlock(&cp->pm_mutex);
4390 return err; 4391 return err;
4391} 4392}
diff --git a/drivers/net/cnic.c b/drivers/net/cnic.c
index 46c87ec7960c..3bf1b04f2cab 100644
--- a/drivers/net/cnic.c
+++ b/drivers/net/cnic.c
@@ -2264,9 +2264,9 @@ static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
2264 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val); 2264 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
2265 2265
2266 if (sb_id == 0) 2266 if (sb_id == 0)
2267 val = 2 << BNX2_L2CTX_STATUSB_NUM_SHIFT; 2267 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
2268 else 2268 else
2269 val = BNX2_L2CTX_STATUSB_NUM(sb_id); 2269 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
2270 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val); 2270 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
2271 2271
2272 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE); 2272 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
@@ -2423,7 +2423,7 @@ static int cnic_start_bnx2_hw(struct cnic_dev *dev)
2423 cp->int_num = 0; 2423 cp->int_num = 0;
2424 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) { 2424 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
2425 u32 sb_id = cp->status_blk_num; 2425 u32 sb_id = cp->status_blk_num;
2426 u32 sb = BNX2_L2CTX_STATUSB_NUM(sb_id); 2426 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
2427 2427
2428 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT; 2428 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
2429 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb); 2429 cnic_ctx_wr(dev, cp->kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
diff --git a/drivers/net/cxgb3/sge.c b/drivers/net/cxgb3/sge.c
index f86612857a73..6366061712f4 100644
--- a/drivers/net/cxgb3/sge.c
+++ b/drivers/net/cxgb3/sge.c
@@ -879,7 +879,7 @@ recycle:
879 pci_dma_sync_single_for_cpu(adap->pdev, dma_addr, len, 879 pci_dma_sync_single_for_cpu(adap->pdev, dma_addr, len,
880 PCI_DMA_FROMDEVICE); 880 PCI_DMA_FROMDEVICE);
881 (*sd->pg_chunk.p_cnt)--; 881 (*sd->pg_chunk.p_cnt)--;
882 if (!*sd->pg_chunk.p_cnt) 882 if (!*sd->pg_chunk.p_cnt && sd->pg_chunk.page != fl->pg_chunk.page)
883 pci_unmap_page(adap->pdev, 883 pci_unmap_page(adap->pdev,
884 sd->pg_chunk.mapping, 884 sd->pg_chunk.mapping,
885 fl->alloc_size, 885 fl->alloc_size,
@@ -2088,7 +2088,7 @@ static void lro_add_page(struct adapter *adap, struct sge_qset *qs,
2088 PCI_DMA_FROMDEVICE); 2088 PCI_DMA_FROMDEVICE);
2089 2089
2090 (*sd->pg_chunk.p_cnt)--; 2090 (*sd->pg_chunk.p_cnt)--;
2091 if (!*sd->pg_chunk.p_cnt) 2091 if (!*sd->pg_chunk.p_cnt && sd->pg_chunk.page != fl->pg_chunk.page)
2092 pci_unmap_page(adap->pdev, 2092 pci_unmap_page(adap->pdev,
2093 sd->pg_chunk.mapping, 2093 sd->pg_chunk.mapping,
2094 fl->alloc_size, 2094 fl->alloc_size,
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 65a2d0ba64e2..db6380379478 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -333,6 +333,9 @@ static const char emac_version_string[] = "TI DaVinci EMAC Linux v6.1";
333#define EMAC_DM646X_MAC_EOI_C0_RXEN (0x01) 333#define EMAC_DM646X_MAC_EOI_C0_RXEN (0x01)
334#define EMAC_DM646X_MAC_EOI_C0_TXEN (0x02) 334#define EMAC_DM646X_MAC_EOI_C0_TXEN (0x02)
335 335
336/* EMAC Stats Clear Mask */
337#define EMAC_STATS_CLR_MASK (0xFFFFFFFF)
338
336/** net_buf_obj: EMAC network bufferdata structure 339/** net_buf_obj: EMAC network bufferdata structure
337 * 340 *
338 * EMAC network buffer data structure 341 * EMAC network buffer data structure
@@ -2137,9 +2140,6 @@ static int emac_poll(struct napi_struct *napi, int budget)
2137 u32 status = 0; 2140 u32 status = 0;
2138 u32 num_pkts = 0; 2141 u32 num_pkts = 0;
2139 2142
2140 if (!netif_running(ndev))
2141 return 0;
2142
2143 /* Check interrupt vectors and call packet processing */ 2143 /* Check interrupt vectors and call packet processing */
2144 status = emac_read(EMAC_MACINVECTOR); 2144 status = emac_read(EMAC_MACINVECTOR);
2145 2145
@@ -2218,7 +2218,7 @@ void emac_poll_controller(struct net_device *ndev)
2218 struct emac_priv *priv = netdev_priv(ndev); 2218 struct emac_priv *priv = netdev_priv(ndev);
2219 2219
2220 emac_int_disable(priv); 2220 emac_int_disable(priv);
2221 emac_irq(ndev->irq, priv); 2221 emac_irq(ndev->irq, ndev);
2222 emac_int_enable(priv); 2222 emac_int_enable(priv);
2223} 2223}
2224#endif 2224#endif
@@ -2548,40 +2548,49 @@ static int emac_dev_stop(struct net_device *ndev)
2548static struct net_device_stats *emac_dev_getnetstats(struct net_device *ndev) 2548static struct net_device_stats *emac_dev_getnetstats(struct net_device *ndev)
2549{ 2549{
2550 struct emac_priv *priv = netdev_priv(ndev); 2550 struct emac_priv *priv = netdev_priv(ndev);
2551 u32 mac_control;
2552 u32 stats_clear_mask;
2551 2553
2552 /* update emac hardware stats and reset the registers*/ 2554 /* update emac hardware stats and reset the registers*/
2553 2555
2556 mac_control = emac_read(EMAC_MACCONTROL);
2557
2558 if (mac_control & EMAC_MACCONTROL_GMIIEN)
2559 stats_clear_mask = EMAC_STATS_CLR_MASK;
2560 else
2561 stats_clear_mask = 0;
2562
2554 priv->net_dev_stats.multicast += emac_read(EMAC_RXMCASTFRAMES); 2563 priv->net_dev_stats.multicast += emac_read(EMAC_RXMCASTFRAMES);
2555 emac_write(EMAC_RXMCASTFRAMES, EMAC_ALL_MULTI_REG_VALUE); 2564 emac_write(EMAC_RXMCASTFRAMES, stats_clear_mask);
2556 2565
2557 priv->net_dev_stats.collisions += (emac_read(EMAC_TXCOLLISION) + 2566 priv->net_dev_stats.collisions += (emac_read(EMAC_TXCOLLISION) +
2558 emac_read(EMAC_TXSINGLECOLL) + 2567 emac_read(EMAC_TXSINGLECOLL) +
2559 emac_read(EMAC_TXMULTICOLL)); 2568 emac_read(EMAC_TXMULTICOLL));
2560 emac_write(EMAC_TXCOLLISION, EMAC_ALL_MULTI_REG_VALUE); 2569 emac_write(EMAC_TXCOLLISION, stats_clear_mask);
2561 emac_write(EMAC_TXSINGLECOLL, EMAC_ALL_MULTI_REG_VALUE); 2570 emac_write(EMAC_TXSINGLECOLL, stats_clear_mask);
2562 emac_write(EMAC_TXMULTICOLL, EMAC_ALL_MULTI_REG_VALUE); 2571 emac_write(EMAC_TXMULTICOLL, stats_clear_mask);
2563 2572
2564 priv->net_dev_stats.rx_length_errors += (emac_read(EMAC_RXOVERSIZED) + 2573 priv->net_dev_stats.rx_length_errors += (emac_read(EMAC_RXOVERSIZED) +
2565 emac_read(EMAC_RXJABBER) + 2574 emac_read(EMAC_RXJABBER) +
2566 emac_read(EMAC_RXUNDERSIZED)); 2575 emac_read(EMAC_RXUNDERSIZED));
2567 emac_write(EMAC_RXOVERSIZED, EMAC_ALL_MULTI_REG_VALUE); 2576 emac_write(EMAC_RXOVERSIZED, stats_clear_mask);
2568 emac_write(EMAC_RXJABBER, EMAC_ALL_MULTI_REG_VALUE); 2577 emac_write(EMAC_RXJABBER, stats_clear_mask);
2569 emac_write(EMAC_RXUNDERSIZED, EMAC_ALL_MULTI_REG_VALUE); 2578 emac_write(EMAC_RXUNDERSIZED, stats_clear_mask);
2570 2579
2571 priv->net_dev_stats.rx_over_errors += (emac_read(EMAC_RXSOFOVERRUNS) + 2580 priv->net_dev_stats.rx_over_errors += (emac_read(EMAC_RXSOFOVERRUNS) +
2572 emac_read(EMAC_RXMOFOVERRUNS)); 2581 emac_read(EMAC_RXMOFOVERRUNS));
2573 emac_write(EMAC_RXSOFOVERRUNS, EMAC_ALL_MULTI_REG_VALUE); 2582 emac_write(EMAC_RXSOFOVERRUNS, stats_clear_mask);
2574 emac_write(EMAC_RXMOFOVERRUNS, EMAC_ALL_MULTI_REG_VALUE); 2583 emac_write(EMAC_RXMOFOVERRUNS, stats_clear_mask);
2575 2584
2576 priv->net_dev_stats.rx_fifo_errors += emac_read(EMAC_RXDMAOVERRUNS); 2585 priv->net_dev_stats.rx_fifo_errors += emac_read(EMAC_RXDMAOVERRUNS);
2577 emac_write(EMAC_RXDMAOVERRUNS, EMAC_ALL_MULTI_REG_VALUE); 2586 emac_write(EMAC_RXDMAOVERRUNS, stats_clear_mask);
2578 2587
2579 priv->net_dev_stats.tx_carrier_errors += 2588 priv->net_dev_stats.tx_carrier_errors +=
2580 emac_read(EMAC_TXCARRIERSENSE); 2589 emac_read(EMAC_TXCARRIERSENSE);
2581 emac_write(EMAC_TXCARRIERSENSE, EMAC_ALL_MULTI_REG_VALUE); 2590 emac_write(EMAC_TXCARRIERSENSE, stats_clear_mask);
2582 2591
2583 priv->net_dev_stats.tx_fifo_errors = emac_read(EMAC_TXUNDERRUN); 2592 priv->net_dev_stats.tx_fifo_errors = emac_read(EMAC_TXUNDERRUN);
2584 emac_write(EMAC_TXUNDERRUN, EMAC_ALL_MULTI_REG_VALUE); 2593 emac_write(EMAC_TXUNDERRUN, stats_clear_mask);
2585 2594
2586 return &priv->net_dev_stats; 2595 return &priv->net_dev_stats;
2587} 2596}
diff --git a/drivers/net/dm9000.h b/drivers/net/dm9000.h
index 80817c2edfb3..fb1c924d79b4 100644
--- a/drivers/net/dm9000.h
+++ b/drivers/net/dm9000.h
@@ -50,7 +50,7 @@
50#define DM9000_RCSR 0x32 50#define DM9000_RCSR 0x32
51 51
52#define CHIPR_DM9000A 0x19 52#define CHIPR_DM9000A 0x19
53#define CHIPR_DM9000B 0x1B 53#define CHIPR_DM9000B 0x1A
54 54
55#define DM9000_MRCMDX 0xF0 55#define DM9000_MRCMDX 0xF0
56#define DM9000_MRCMD 0xF2 56#define DM9000_MRCMD 0xF2
diff --git a/drivers/net/e100.c b/drivers/net/e100.c
index 5d2f48f02251..3c29a20b751e 100644
--- a/drivers/net/e100.c
+++ b/drivers/net/e100.c
@@ -1427,19 +1427,31 @@ static int e100_phy_init(struct nic *nic)
1427 } else 1427 } else
1428 DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id); 1428 DPRINTK(HW, DEBUG, "phy_addr = %d\n", nic->mii.phy_id);
1429 1429
1430 /* Isolate all the PHY ids */
1431 for (addr = 0; addr < 32; addr++)
1432 mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE);
1433 /* Select the discovered PHY */
1434 bmcr &= ~BMCR_ISOLATE;
1435 mdio_write(netdev, nic->mii.phy_id, MII_BMCR, bmcr);
1436
1437 /* Get phy ID */ 1430 /* Get phy ID */
1438 id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1); 1431 id_lo = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID1);
1439 id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2); 1432 id_hi = mdio_read(netdev, nic->mii.phy_id, MII_PHYSID2);
1440 nic->phy = (u32)id_hi << 16 | (u32)id_lo; 1433 nic->phy = (u32)id_hi << 16 | (u32)id_lo;
1441 DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy); 1434 DPRINTK(HW, DEBUG, "phy ID = 0x%08X\n", nic->phy);
1442 1435
1436 /* Select the phy and isolate the rest */
1437 for (addr = 0; addr < 32; addr++) {
1438 if (addr != nic->mii.phy_id) {
1439 mdio_write(netdev, addr, MII_BMCR, BMCR_ISOLATE);
1440 } else if (nic->phy != phy_82552_v) {
1441 bmcr = mdio_read(netdev, addr, MII_BMCR);
1442 mdio_write(netdev, addr, MII_BMCR,
1443 bmcr & ~BMCR_ISOLATE);
1444 }
1445 }
1446 /*
1447 * Workaround for 82552:
1448 * Clear the ISOLATE bit on selected phy_id last (mirrored on all
1449 * other phy_id's) using bmcr value from addr discovery loop above.
1450 */
1451 if (nic->phy == phy_82552_v)
1452 mdio_write(netdev, nic->mii.phy_id, MII_BMCR,
1453 bmcr & ~BMCR_ISOLATE);
1454
1443 /* Handle National tx phys */ 1455 /* Handle National tx phys */
1444#define NCS_PHY_MODEL_MASK 0xFFF0FFFF 1456#define NCS_PHY_MODEL_MASK 0xFFF0FFFF
1445 if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) { 1457 if ((nic->phy & NCS_PHY_MODEL_MASK) == phy_nsc_tx) {
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h
index c0f185beb8bc..1190167a8b3d 100644
--- a/drivers/net/e1000e/defines.h
+++ b/drivers/net/e1000e/defines.h
@@ -76,6 +76,7 @@
76/* Extended Device Control */ 76/* Extended Device Control */
77#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ 77#define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */
78#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ 78#define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */
79#define E1000_CTRL_EXT_SPD_BYPS 0x00008000 /* Speed Select Bypass */
79#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ 80#define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */
80#define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */ 81#define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */
81#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 82#define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000
@@ -347,6 +348,7 @@
347/* Extended Configuration Control and Size */ 348/* Extended Configuration Control and Size */
348#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020 349#define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020
349#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE 0x00000001 350#define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE 0x00000001
351#define E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE 0x00000008
350#define E1000_EXTCNF_CTRL_SWFLAG 0x00000020 352#define E1000_EXTCNF_CTRL_SWFLAG 0x00000020
351#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK 0x00FF0000 353#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK 0x00FF0000
352#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT 16 354#define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT 16
diff --git a/drivers/net/e1000e/e1000.h b/drivers/net/e1000e/e1000.h
index 981936c1fb46..189dfa2d6c76 100644
--- a/drivers/net/e1000e/e1000.h
+++ b/drivers/net/e1000e/e1000.h
@@ -141,6 +141,20 @@ struct e1000_info;
141#define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */ 141#define HV_TNCRS_UPPER PHY_REG(778, 29) /* Transmit with no CRS */
142#define HV_TNCRS_LOWER PHY_REG(778, 30) 142#define HV_TNCRS_LOWER PHY_REG(778, 30)
143 143
144/* BM PHY Copper Specific Status */
145#define BM_CS_STATUS 17
146#define BM_CS_STATUS_LINK_UP 0x0400
147#define BM_CS_STATUS_RESOLVED 0x0800
148#define BM_CS_STATUS_SPEED_MASK 0xC000
149#define BM_CS_STATUS_SPEED_1000 0x8000
150
151/* 82577 Mobile Phy Status Register */
152#define HV_M_STATUS 26
153#define HV_M_STATUS_AUTONEG_COMPLETE 0x1000
154#define HV_M_STATUS_SPEED_MASK 0x0300
155#define HV_M_STATUS_SPEED_1000 0x0200
156#define HV_M_STATUS_LINK_UP 0x0040
157
144enum e1000_boards { 158enum e1000_boards {
145 board_82571, 159 board_82571,
146 board_82572, 160 board_82572,
@@ -519,9 +533,13 @@ extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
519extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw); 533extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
520extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw); 534extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
521extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data); 535extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
536extern s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
537 u16 *data);
522extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw); 538extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
523extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active); 539extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
524extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data); 540extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
541extern s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset,
542 u16 data);
525extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw); 543extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
526extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw); 544extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
527extern s32 e1000e_get_cfg_done(struct e1000_hw *hw); 545extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
@@ -538,7 +556,11 @@ extern s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data);
538extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data); 556extern s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data);
539extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl); 557extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
540extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data); 558extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
559extern s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
560 u16 data);
541extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data); 561extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
562extern s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset,
563 u16 *data);
542extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations, 564extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
543 u32 usec_interval, bool *success); 565 u32 usec_interval, bool *success);
544extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw); 566extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
@@ -546,7 +568,11 @@ extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
546extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data); 568extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
547extern s32 e1000e_check_downshift(struct e1000_hw *hw); 569extern s32 e1000e_check_downshift(struct e1000_hw *hw);
548extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data); 570extern s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data);
571extern s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
572 u16 *data);
549extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data); 573extern s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data);
574extern s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset,
575 u16 data);
550extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow); 576extern s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow);
551extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw); 577extern s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw);
552extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw); 578extern s32 e1000_copper_link_setup_82577(struct e1000_hw *hw);
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index fd44d9f90769..aaea41ef794d 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -764,11 +764,13 @@ struct e1000_phy_operations {
764 s32 (*get_cable_length)(struct e1000_hw *); 764 s32 (*get_cable_length)(struct e1000_hw *);
765 s32 (*get_phy_info)(struct e1000_hw *); 765 s32 (*get_phy_info)(struct e1000_hw *);
766 s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *); 766 s32 (*read_phy_reg)(struct e1000_hw *, u32, u16 *);
767 s32 (*read_phy_reg_locked)(struct e1000_hw *, u32, u16 *);
767 void (*release_phy)(struct e1000_hw *); 768 void (*release_phy)(struct e1000_hw *);
768 s32 (*reset_phy)(struct e1000_hw *); 769 s32 (*reset_phy)(struct e1000_hw *);
769 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool); 770 s32 (*set_d0_lplu_state)(struct e1000_hw *, bool);
770 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool); 771 s32 (*set_d3_lplu_state)(struct e1000_hw *, bool);
771 s32 (*write_phy_reg)(struct e1000_hw *, u32, u16); 772 s32 (*write_phy_reg)(struct e1000_hw *, u32, u16);
773 s32 (*write_phy_reg_locked)(struct e1000_hw *, u32, u16);
772 s32 (*cfg_on_link_up)(struct e1000_hw *); 774 s32 (*cfg_on_link_up)(struct e1000_hw *);
773}; 775};
774 776
@@ -901,6 +903,7 @@ struct e1000_shadow_ram {
901struct e1000_dev_spec_ich8lan { 903struct e1000_dev_spec_ich8lan {
902 bool kmrn_lock_loss_workaround_enabled; 904 bool kmrn_lock_loss_workaround_enabled;
903 struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS]; 905 struct e1000_shadow_ram shadow_ram[E1000_ICH8_SHADOW_RAM_WORDS];
906 bool nvm_k1_enabled;
904}; 907};
905 908
906struct e1000_hw { 909struct e1000_hw {
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 99df2abf82a9..51ddb04ab195 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -122,6 +122,27 @@
122 122
123#define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */ 123#define HV_LED_CONFIG PHY_REG(768, 30) /* LED Configuration */
124 124
125#define SW_FLAG_TIMEOUT 1000 /* SW Semaphore flag timeout in milliseconds */
126
127/* SMBus Address Phy Register */
128#define HV_SMB_ADDR PHY_REG(768, 26)
129#define HV_SMB_ADDR_PEC_EN 0x0200
130#define HV_SMB_ADDR_VALID 0x0080
131
132/* Strapping Option Register - RO */
133#define E1000_STRAP 0x0000C
134#define E1000_STRAP_SMBUS_ADDRESS_MASK 0x00FE0000
135#define E1000_STRAP_SMBUS_ADDRESS_SHIFT 17
136
137/* OEM Bits Phy Register */
138#define HV_OEM_BITS PHY_REG(768, 25)
139#define HV_OEM_BITS_LPLU 0x0004 /* Low Power Link Up */
140#define HV_OEM_BITS_GBE_DIS 0x0040 /* Gigabit Disable */
141#define HV_OEM_BITS_RESTART_AN 0x0400 /* Restart Auto-negotiation */
142
143#define E1000_NVM_K1_CONFIG 0x1B /* NVM K1 Config Word */
144#define E1000_NVM_K1_ENABLE 0x1 /* NVM Enable K1 bit */
145
125/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ 146/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */
126/* Offset 04h HSFSTS */ 147/* Offset 04h HSFSTS */
127union ich8_hws_flash_status { 148union ich8_hws_flash_status {
@@ -200,6 +221,10 @@ static s32 e1000_setup_led_pchlan(struct e1000_hw *hw);
200static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw); 221static s32 e1000_cleanup_led_pchlan(struct e1000_hw *hw);
201static s32 e1000_led_on_pchlan(struct e1000_hw *hw); 222static s32 e1000_led_on_pchlan(struct e1000_hw *hw);
202static s32 e1000_led_off_pchlan(struct e1000_hw *hw); 223static s32 e1000_led_off_pchlan(struct e1000_hw *hw);
224static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active);
225static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw);
226static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link);
227static s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable);
203 228
204static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg) 229static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
205{ 230{
@@ -242,7 +267,11 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw)
242 267
243 phy->ops.check_polarity = e1000_check_polarity_ife_ich8lan; 268 phy->ops.check_polarity = e1000_check_polarity_ife_ich8lan;
244 phy->ops.read_phy_reg = e1000_read_phy_reg_hv; 269 phy->ops.read_phy_reg = e1000_read_phy_reg_hv;
270 phy->ops.read_phy_reg_locked = e1000_read_phy_reg_hv_locked;
271 phy->ops.set_d0_lplu_state = e1000_set_lplu_state_pchlan;
272 phy->ops.set_d3_lplu_state = e1000_set_lplu_state_pchlan;
245 phy->ops.write_phy_reg = e1000_write_phy_reg_hv; 273 phy->ops.write_phy_reg = e1000_write_phy_reg_hv;
274 phy->ops.write_phy_reg_locked = e1000_write_phy_reg_hv_locked;
246 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; 275 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
247 276
248 phy->id = e1000_phy_unknown; 277 phy->id = e1000_phy_unknown;
@@ -303,6 +332,8 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw)
303 case IGP03E1000_E_PHY_ID: 332 case IGP03E1000_E_PHY_ID:
304 phy->type = e1000_phy_igp_3; 333 phy->type = e1000_phy_igp_3;
305 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT; 334 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
335 phy->ops.read_phy_reg_locked = e1000e_read_phy_reg_igp_locked;
336 phy->ops.write_phy_reg_locked = e1000e_write_phy_reg_igp_locked;
306 break; 337 break;
307 case IFE_E_PHY_ID: 338 case IFE_E_PHY_ID:
308 case IFE_PLUS_E_PHY_ID: 339 case IFE_PLUS_E_PHY_ID:
@@ -469,14 +500,6 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
469 goto out; 500 goto out;
470 } 501 }
471 502
472 if (hw->mac.type == e1000_pchlan) {
473 ret_val = e1000e_write_kmrn_reg(hw,
474 E1000_KMRNCTRLSTA_K1_CONFIG,
475 E1000_KMRNCTRLSTA_K1_ENABLE);
476 if (ret_val)
477 goto out;
478 }
479
480 /* 503 /*
481 * First we want to see if the MII Status Register reports 504 * First we want to see if the MII Status Register reports
482 * link. If so, then we want to get the current speed/duplex 505 * link. If so, then we want to get the current speed/duplex
@@ -486,6 +509,12 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
486 if (ret_val) 509 if (ret_val)
487 goto out; 510 goto out;
488 511
512 if (hw->mac.type == e1000_pchlan) {
513 ret_val = e1000_k1_gig_workaround_hv(hw, link);
514 if (ret_val)
515 goto out;
516 }
517
489 if (!link) 518 if (!link)
490 goto out; /* No link detected */ 519 goto out; /* No link detected */
491 520
@@ -568,12 +597,39 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)
568static DEFINE_MUTEX(nvm_mutex); 597static DEFINE_MUTEX(nvm_mutex);
569 598
570/** 599/**
600 * e1000_acquire_nvm_ich8lan - Acquire NVM mutex
601 * @hw: pointer to the HW structure
602 *
603 * Acquires the mutex for performing NVM operations.
604 **/
605static s32 e1000_acquire_nvm_ich8lan(struct e1000_hw *hw)
606{
607 mutex_lock(&nvm_mutex);
608
609 return 0;
610}
611
612/**
613 * e1000_release_nvm_ich8lan - Release NVM mutex
614 * @hw: pointer to the HW structure
615 *
616 * Releases the mutex used while performing NVM operations.
617 **/
618static void e1000_release_nvm_ich8lan(struct e1000_hw *hw)
619{
620 mutex_unlock(&nvm_mutex);
621
622 return;
623}
624
625static DEFINE_MUTEX(swflag_mutex);
626
627/**
571 * e1000_acquire_swflag_ich8lan - Acquire software control flag 628 * e1000_acquire_swflag_ich8lan - Acquire software control flag
572 * @hw: pointer to the HW structure 629 * @hw: pointer to the HW structure
573 * 630 *
574 * Acquires the software control flag for performing NVM and PHY 631 * Acquires the software control flag for performing PHY and select
575 * operations. This is a function pointer entry point only called by 632 * MAC CSR accesses.
576 * read/write routines for the PHY and NVM parts.
577 **/ 633 **/
578static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw) 634static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)
579{ 635{
@@ -582,7 +638,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)
582 638
583 might_sleep(); 639 might_sleep();
584 640
585 mutex_lock(&nvm_mutex); 641 mutex_lock(&swflag_mutex);
586 642
587 while (timeout) { 643 while (timeout) {
588 extcnf_ctrl = er32(EXTCNF_CTRL); 644 extcnf_ctrl = er32(EXTCNF_CTRL);
@@ -599,7 +655,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)
599 goto out; 655 goto out;
600 } 656 }
601 657
602 timeout = PHY_CFG_TIMEOUT * 2; 658 timeout = SW_FLAG_TIMEOUT;
603 659
604 extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG; 660 extcnf_ctrl |= E1000_EXTCNF_CTRL_SWFLAG;
605 ew32(EXTCNF_CTRL, extcnf_ctrl); 661 ew32(EXTCNF_CTRL, extcnf_ctrl);
@@ -623,7 +679,7 @@ static s32 e1000_acquire_swflag_ich8lan(struct e1000_hw *hw)
623 679
624out: 680out:
625 if (ret_val) 681 if (ret_val)
626 mutex_unlock(&nvm_mutex); 682 mutex_unlock(&swflag_mutex);
627 683
628 return ret_val; 684 return ret_val;
629} 685}
@@ -632,9 +688,8 @@ out:
632 * e1000_release_swflag_ich8lan - Release software control flag 688 * e1000_release_swflag_ich8lan - Release software control flag
633 * @hw: pointer to the HW structure 689 * @hw: pointer to the HW structure
634 * 690 *
635 * Releases the software control flag for performing NVM and PHY operations. 691 * Releases the software control flag for performing PHY and select
636 * This is a function pointer entry point only called by read/write 692 * MAC CSR accesses.
637 * routines for the PHY and NVM parts.
638 **/ 693 **/
639static void e1000_release_swflag_ich8lan(struct e1000_hw *hw) 694static void e1000_release_swflag_ich8lan(struct e1000_hw *hw)
640{ 695{
@@ -644,7 +699,9 @@ static void e1000_release_swflag_ich8lan(struct e1000_hw *hw)
644 extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG; 699 extcnf_ctrl &= ~E1000_EXTCNF_CTRL_SWFLAG;
645 ew32(EXTCNF_CTRL, extcnf_ctrl); 700 ew32(EXTCNF_CTRL, extcnf_ctrl);
646 701
647 mutex_unlock(&nvm_mutex); 702 mutex_unlock(&swflag_mutex);
703
704 return;
648} 705}
649 706
650/** 707/**
@@ -752,6 +809,326 @@ static s32 e1000_phy_force_speed_duplex_ich8lan(struct e1000_hw *hw)
752} 809}
753 810
754/** 811/**
812 * e1000_sw_lcd_config_ich8lan - SW-based LCD Configuration
813 * @hw: pointer to the HW structure
814 *
815 * SW should configure the LCD from the NVM extended configuration region
816 * as a workaround for certain parts.
817 **/
818static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw)
819{
820 struct e1000_phy_info *phy = &hw->phy;
821 u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask;
822 s32 ret_val;
823 u16 word_addr, reg_data, reg_addr, phy_page = 0;
824
825 ret_val = hw->phy.ops.acquire_phy(hw);
826 if (ret_val)
827 return ret_val;
828
829 /*
830 * Initialize the PHY from the NVM on ICH platforms. This
831 * is needed due to an issue where the NVM configuration is
832 * not properly autoloaded after power transitions.
833 * Therefore, after each PHY reset, we will load the
834 * configuration data out of the NVM manually.
835 */
836 if ((hw->mac.type == e1000_ich8lan && phy->type == e1000_phy_igp_3) ||
837 (hw->mac.type == e1000_pchlan)) {
838 struct e1000_adapter *adapter = hw->adapter;
839
840 /* Check if SW needs to configure the PHY */
841 if ((adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M_AMT) ||
842 (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M) ||
843 (hw->mac.type == e1000_pchlan))
844 sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
845 else
846 sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG;
847
848 data = er32(FEXTNVM);
849 if (!(data & sw_cfg_mask))
850 goto out;
851
852 /* Wait for basic configuration completes before proceeding */
853 e1000_lan_init_done_ich8lan(hw);
854
855 /*
856 * Make sure HW does not configure LCD from PHY
857 * extended configuration before SW configuration
858 */
859 data = er32(EXTCNF_CTRL);
860 if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE)
861 goto out;
862
863 cnf_size = er32(EXTCNF_SIZE);
864 cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK;
865 cnf_size >>= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT;
866 if (!cnf_size)
867 goto out;
868
869 cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK;
870 cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT;
871
872 if (!(data & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE) &&
873 (hw->mac.type == e1000_pchlan)) {
874 /*
875 * HW configures the SMBus address and LEDs when the
876 * OEM and LCD Write Enable bits are set in the NVM.
877 * When both NVM bits are cleared, SW will configure
878 * them instead.
879 */
880 data = er32(STRAP);
881 data &= E1000_STRAP_SMBUS_ADDRESS_MASK;
882 reg_data = data >> E1000_STRAP_SMBUS_ADDRESS_SHIFT;
883 reg_data |= HV_SMB_ADDR_PEC_EN | HV_SMB_ADDR_VALID;
884 ret_val = e1000_write_phy_reg_hv_locked(hw, HV_SMB_ADDR,
885 reg_data);
886 if (ret_val)
887 goto out;
888
889 data = er32(LEDCTL);
890 ret_val = e1000_write_phy_reg_hv_locked(hw,
891 HV_LED_CONFIG,
892 (u16)data);
893 if (ret_val)
894 goto out;
895 }
896 /* Configure LCD from extended configuration region. */
897
898 /* cnf_base_addr is in DWORD */
899 word_addr = (u16)(cnf_base_addr << 1);
900
901 for (i = 0; i < cnf_size; i++) {
902 ret_val = e1000_read_nvm(hw, (word_addr + i * 2), 1,
903 &reg_data);
904 if (ret_val)
905 goto out;
906
907 ret_val = e1000_read_nvm(hw, (word_addr + i * 2 + 1),
908 1, &reg_addr);
909 if (ret_val)
910 goto out;
911
912 /* Save off the PHY page for future writes. */
913 if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) {
914 phy_page = reg_data;
915 continue;
916 }
917
918 reg_addr &= PHY_REG_MASK;
919 reg_addr |= phy_page;
920
921 ret_val = phy->ops.write_phy_reg_locked(hw,
922 (u32)reg_addr,
923 reg_data);
924 if (ret_val)
925 goto out;
926 }
927 }
928
929out:
930 hw->phy.ops.release_phy(hw);
931 return ret_val;
932}
933
934/**
935 * e1000_k1_gig_workaround_hv - K1 Si workaround
936 * @hw: pointer to the HW structure
937 * @link: link up bool flag
938 *
939 * If K1 is enabled for 1Gbps, the MAC might stall when transitioning
940 * from a lower speed. This workaround disables K1 whenever link is at 1Gig
941 * If link is down, the function will restore the default K1 setting located
942 * in the NVM.
943 **/
944static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
945{
946 s32 ret_val = 0;
947 u16 status_reg = 0;
948 bool k1_enable = hw->dev_spec.ich8lan.nvm_k1_enabled;
949
950 if (hw->mac.type != e1000_pchlan)
951 goto out;
952
953 /* Wrap the whole flow with the sw flag */
954 ret_val = hw->phy.ops.acquire_phy(hw);
955 if (ret_val)
956 goto out;
957
958 /* Disable K1 when link is 1Gbps, otherwise use the NVM setting */
959 if (link) {
960 if (hw->phy.type == e1000_phy_82578) {
961 ret_val = hw->phy.ops.read_phy_reg_locked(hw,
962 BM_CS_STATUS,
963 &status_reg);
964 if (ret_val)
965 goto release;
966
967 status_reg &= BM_CS_STATUS_LINK_UP |
968 BM_CS_STATUS_RESOLVED |
969 BM_CS_STATUS_SPEED_MASK;
970
971 if (status_reg == (BM_CS_STATUS_LINK_UP |
972 BM_CS_STATUS_RESOLVED |
973 BM_CS_STATUS_SPEED_1000))
974 k1_enable = false;
975 }
976
977 if (hw->phy.type == e1000_phy_82577) {
978 ret_val = hw->phy.ops.read_phy_reg_locked(hw,
979 HV_M_STATUS,
980 &status_reg);
981 if (ret_val)
982 goto release;
983
984 status_reg &= HV_M_STATUS_LINK_UP |
985 HV_M_STATUS_AUTONEG_COMPLETE |
986 HV_M_STATUS_SPEED_MASK;
987
988 if (status_reg == (HV_M_STATUS_LINK_UP |
989 HV_M_STATUS_AUTONEG_COMPLETE |
990 HV_M_STATUS_SPEED_1000))
991 k1_enable = false;
992 }
993
994 /* Link stall fix for link up */
995 ret_val = hw->phy.ops.write_phy_reg_locked(hw, PHY_REG(770, 19),
996 0x0100);
997 if (ret_val)
998 goto release;
999
1000 } else {
1001 /* Link stall fix for link down */
1002 ret_val = hw->phy.ops.write_phy_reg_locked(hw, PHY_REG(770, 19),
1003 0x4100);
1004 if (ret_val)
1005 goto release;
1006 }
1007
1008 ret_val = e1000_configure_k1_ich8lan(hw, k1_enable);
1009
1010release:
1011 hw->phy.ops.release_phy(hw);
1012out:
1013 return ret_val;
1014}
1015
1016/**
1017 * e1000_configure_k1_ich8lan - Configure K1 power state
1018 * @hw: pointer to the HW structure
1019 * @enable: K1 state to configure
1020 *
1021 * Configure the K1 power state based on the provided parameter.
1022 * Assumes semaphore already acquired.
1023 *
1024 * Success returns 0, Failure returns -E1000_ERR_PHY (-2)
1025 **/
1026static s32 e1000_configure_k1_ich8lan(struct e1000_hw *hw, bool k1_enable)
1027{
1028 s32 ret_val = 0;
1029 u32 ctrl_reg = 0;
1030 u32 ctrl_ext = 0;
1031 u32 reg = 0;
1032 u16 kmrn_reg = 0;
1033
1034 ret_val = e1000e_read_kmrn_reg_locked(hw,
1035 E1000_KMRNCTRLSTA_K1_CONFIG,
1036 &kmrn_reg);
1037 if (ret_val)
1038 goto out;
1039
1040 if (k1_enable)
1041 kmrn_reg |= E1000_KMRNCTRLSTA_K1_ENABLE;
1042 else
1043 kmrn_reg &= ~E1000_KMRNCTRLSTA_K1_ENABLE;
1044
1045 ret_val = e1000e_write_kmrn_reg_locked(hw,
1046 E1000_KMRNCTRLSTA_K1_CONFIG,
1047 kmrn_reg);
1048 if (ret_val)
1049 goto out;
1050
1051 udelay(20);
1052 ctrl_ext = er32(CTRL_EXT);
1053 ctrl_reg = er32(CTRL);
1054
1055 reg = ctrl_reg & ~(E1000_CTRL_SPD_1000 | E1000_CTRL_SPD_100);
1056 reg |= E1000_CTRL_FRCSPD;
1057 ew32(CTRL, reg);
1058
1059 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_SPD_BYPS);
1060 udelay(20);
1061 ew32(CTRL, ctrl_reg);
1062 ew32(CTRL_EXT, ctrl_ext);
1063 udelay(20);
1064
1065out:
1066 return ret_val;
1067}
1068
1069/**
1070 * e1000_oem_bits_config_ich8lan - SW-based LCD Configuration
1071 * @hw: pointer to the HW structure
1072 * @d0_state: boolean if entering d0 or d3 device state
1073 *
1074 * SW will configure Gbe Disable and LPLU based on the NVM. The four bits are
1075 * collectively called OEM bits. The OEM Write Enable bit and SW Config bit
1076 * in NVM determines whether HW should configure LPLU and Gbe Disable.
1077 **/
1078static s32 e1000_oem_bits_config_ich8lan(struct e1000_hw *hw, bool d0_state)
1079{
1080 s32 ret_val = 0;
1081 u32 mac_reg;
1082 u16 oem_reg;
1083
1084 if (hw->mac.type != e1000_pchlan)
1085 return ret_val;
1086
1087 ret_val = hw->phy.ops.acquire_phy(hw);
1088 if (ret_val)
1089 return ret_val;
1090
1091 mac_reg = er32(EXTCNF_CTRL);
1092 if (mac_reg & E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE)
1093 goto out;
1094
1095 mac_reg = er32(FEXTNVM);
1096 if (!(mac_reg & E1000_FEXTNVM_SW_CONFIG_ICH8M))
1097 goto out;
1098
1099 mac_reg = er32(PHY_CTRL);
1100
1101 ret_val = hw->phy.ops.read_phy_reg_locked(hw, HV_OEM_BITS, &oem_reg);
1102 if (ret_val)
1103 goto out;
1104
1105 oem_reg &= ~(HV_OEM_BITS_GBE_DIS | HV_OEM_BITS_LPLU);
1106
1107 if (d0_state) {
1108 if (mac_reg & E1000_PHY_CTRL_GBE_DISABLE)
1109 oem_reg |= HV_OEM_BITS_GBE_DIS;
1110
1111 if (mac_reg & E1000_PHY_CTRL_D0A_LPLU)
1112 oem_reg |= HV_OEM_BITS_LPLU;
1113 } else {
1114 if (mac_reg & E1000_PHY_CTRL_NOND0A_GBE_DISABLE)
1115 oem_reg |= HV_OEM_BITS_GBE_DIS;
1116
1117 if (mac_reg & E1000_PHY_CTRL_NOND0A_LPLU)
1118 oem_reg |= HV_OEM_BITS_LPLU;
1119 }
1120 /* Restart auto-neg to activate the bits */
1121 oem_reg |= HV_OEM_BITS_RESTART_AN;
1122 ret_val = hw->phy.ops.write_phy_reg_locked(hw, HV_OEM_BITS, oem_reg);
1123
1124out:
1125 hw->phy.ops.release_phy(hw);
1126
1127 return ret_val;
1128}
1129
1130
1131/**
755 * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be 1132 * e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
756 * done after every PHY reset. 1133 * done after every PHY reset.
757 **/ 1134 **/
@@ -791,10 +1168,20 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
791 ret_val = hw->phy.ops.acquire_phy(hw); 1168 ret_val = hw->phy.ops.acquire_phy(hw);
792 if (ret_val) 1169 if (ret_val)
793 return ret_val; 1170 return ret_val;
1171
794 hw->phy.addr = 1; 1172 hw->phy.addr = 1;
795 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0); 1173 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 0);
1174 if (ret_val)
1175 goto out;
796 hw->phy.ops.release_phy(hw); 1176 hw->phy.ops.release_phy(hw);
797 1177
1178 /*
1179 * Configure the K1 Si workaround during phy reset assuming there is
1180 * link so that it disables K1 if link is in 1Gbps.
1181 */
1182 ret_val = e1000_k1_gig_workaround_hv(hw, true);
1183
1184out:
798 return ret_val; 1185 return ret_val;
799} 1186}
800 1187
@@ -840,11 +1227,8 @@ static void e1000_lan_init_done_ich8lan(struct e1000_hw *hw)
840 **/ 1227 **/
841static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw) 1228static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
842{ 1229{
843 struct e1000_phy_info *phy = &hw->phy; 1230 s32 ret_val = 0;
844 u32 i; 1231 u16 reg;
845 u32 data, cnf_size, cnf_base_addr, sw_cfg_mask;
846 s32 ret_val;
847 u16 word_addr, reg_data, reg_addr, phy_page = 0;
848 1232
849 ret_val = e1000e_phy_hw_reset_generic(hw); 1233 ret_val = e1000e_phy_hw_reset_generic(hw);
850 if (ret_val) 1234 if (ret_val)
@@ -859,81 +1243,20 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
859 return ret_val; 1243 return ret_val;
860 } 1244 }
861 1245
862 /* 1246 /* Dummy read to clear the phy wakeup bit after lcd reset */
863 * Initialize the PHY from the NVM on ICH platforms. This 1247 if (hw->mac.type == e1000_pchlan)
864 * is needed due to an issue where the NVM configuration is 1248 e1e_rphy(hw, BM_WUC, &reg);
865 * not properly autoloaded after power transitions.
866 * Therefore, after each PHY reset, we will load the
867 * configuration data out of the NVM manually.
868 */
869 if (hw->mac.type == e1000_ich8lan && phy->type == e1000_phy_igp_3) {
870 struct e1000_adapter *adapter = hw->adapter;
871
872 /* Check if SW needs configure the PHY */
873 if ((adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M_AMT) ||
874 (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M))
875 sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M;
876 else
877 sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG;
878
879 data = er32(FEXTNVM);
880 if (!(data & sw_cfg_mask))
881 return 0;
882
883 /* Wait for basic configuration completes before proceeding */
884 e1000_lan_init_done_ich8lan(hw);
885
886 /*
887 * Make sure HW does not configure LCD from PHY
888 * extended configuration before SW configuration
889 */
890 data = er32(EXTCNF_CTRL);
891 if (data & E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE)
892 return 0;
893
894 cnf_size = er32(EXTCNF_SIZE);
895 cnf_size &= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK;
896 cnf_size >>= E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT;
897 if (!cnf_size)
898 return 0;
899
900 cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK;
901 cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT;
902
903 /* Configure LCD from extended configuration region. */
904
905 /* cnf_base_addr is in DWORD */
906 word_addr = (u16)(cnf_base_addr << 1);
907
908 for (i = 0; i < cnf_size; i++) {
909 ret_val = e1000_read_nvm(hw,
910 (word_addr + i * 2),
911 1,
912 &reg_data);
913 if (ret_val)
914 return ret_val;
915
916 ret_val = e1000_read_nvm(hw,
917 (word_addr + i * 2 + 1),
918 1,
919 &reg_addr);
920 if (ret_val)
921 return ret_val;
922
923 /* Save off the PHY page for future writes. */
924 if (reg_addr == IGP01E1000_PHY_PAGE_SELECT) {
925 phy_page = reg_data;
926 continue;
927 }
928 1249
929 reg_addr |= phy_page; 1250 /* Configure the LCD with the extended configuration region in NVM */
1251 ret_val = e1000_sw_lcd_config_ich8lan(hw);
1252 if (ret_val)
1253 goto out;
930 1254
931 ret_val = e1e_wphy(hw, (u32)reg_addr, reg_data); 1255 /* Configure the LCD with the OEM bits in NVM */
932 if (ret_val) 1256 if (hw->mac.type == e1000_pchlan)
933 return ret_val; 1257 ret_val = e1000_oem_bits_config_ich8lan(hw, true);
934 }
935 }
936 1258
1259out:
937 return 0; 1260 return 0;
938} 1261}
939 1262
@@ -1054,6 +1377,38 @@ static s32 e1000_check_polarity_ife_ich8lan(struct e1000_hw *hw)
1054} 1377}
1055 1378
1056/** 1379/**
1380 * e1000_set_lplu_state_pchlan - Set Low Power Link Up state
1381 * @hw: pointer to the HW structure
1382 * @active: true to enable LPLU, false to disable
1383 *
1384 * Sets the LPLU state according to the active flag. For PCH, if OEM write
1385 * bit are disabled in the NVM, writing the LPLU bits in the MAC will not set
1386 * the phy speed. This function will manually set the LPLU bit and restart
1387 * auto-neg as hw would do. D3 and D0 LPLU will call the same function
1388 * since it configures the same bit.
1389 **/
1390static s32 e1000_set_lplu_state_pchlan(struct e1000_hw *hw, bool active)
1391{
1392 s32 ret_val = 0;
1393 u16 oem_reg;
1394
1395 ret_val = e1e_rphy(hw, HV_OEM_BITS, &oem_reg);
1396 if (ret_val)
1397 goto out;
1398
1399 if (active)
1400 oem_reg |= HV_OEM_BITS_LPLU;
1401 else
1402 oem_reg &= ~HV_OEM_BITS_LPLU;
1403
1404 oem_reg |= HV_OEM_BITS_RESTART_AN;
1405 ret_val = e1e_wphy(hw, HV_OEM_BITS, oem_reg);
1406
1407out:
1408 return ret_val;
1409}
1410
1411/**
1057 * e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state 1412 * e1000_set_d0_lplu_state_ich8lan - Set Low Power Linkup D0 state
1058 * @hw: pointer to the HW structure 1413 * @hw: pointer to the HW structure
1059 * @active: TRUE to enable LPLU, FALSE to disable 1414 * @active: TRUE to enable LPLU, FALSE to disable
@@ -1314,12 +1669,11 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
1314 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) || 1669 if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) ||
1315 (words == 0)) { 1670 (words == 0)) {
1316 hw_dbg(hw, "nvm parameter(s) out of bounds\n"); 1671 hw_dbg(hw, "nvm parameter(s) out of bounds\n");
1317 return -E1000_ERR_NVM; 1672 ret_val = -E1000_ERR_NVM;
1673 goto out;
1318 } 1674 }
1319 1675
1320 ret_val = e1000_acquire_swflag_ich8lan(hw); 1676 nvm->ops.acquire_nvm(hw);
1321 if (ret_val)
1322 goto out;
1323 1677
1324 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank); 1678 ret_val = e1000_valid_nvm_bank_detect_ich8lan(hw, &bank);
1325 if (ret_val) { 1679 if (ret_val) {
@@ -1345,7 +1699,7 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
1345 } 1699 }
1346 } 1700 }
1347 1701
1348 e1000_release_swflag_ich8lan(hw); 1702 nvm->ops.release_nvm(hw);
1349 1703
1350out: 1704out:
1351 if (ret_val) 1705 if (ret_val)
@@ -1603,11 +1957,15 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
1603 return -E1000_ERR_NVM; 1957 return -E1000_ERR_NVM;
1604 } 1958 }
1605 1959
1960 nvm->ops.acquire_nvm(hw);
1961
1606 for (i = 0; i < words; i++) { 1962 for (i = 0; i < words; i++) {
1607 dev_spec->shadow_ram[offset+i].modified = 1; 1963 dev_spec->shadow_ram[offset+i].modified = 1;
1608 dev_spec->shadow_ram[offset+i].value = data[i]; 1964 dev_spec->shadow_ram[offset+i].value = data[i];
1609 } 1965 }
1610 1966
1967 nvm->ops.release_nvm(hw);
1968
1611 return 0; 1969 return 0;
1612} 1970}
1613 1971
@@ -1637,9 +1995,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1637 if (nvm->type != e1000_nvm_flash_sw) 1995 if (nvm->type != e1000_nvm_flash_sw)
1638 goto out; 1996 goto out;
1639 1997
1640 ret_val = e1000_acquire_swflag_ich8lan(hw); 1998 nvm->ops.acquire_nvm(hw);
1641 if (ret_val)
1642 goto out;
1643 1999
1644 /* 2000 /*
1645 * We're writing to the opposite bank so if we're on bank 1, 2001 * We're writing to the opposite bank so if we're on bank 1,
@@ -1657,7 +2013,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1657 old_bank_offset = 0; 2013 old_bank_offset = 0;
1658 ret_val = e1000_erase_flash_bank_ich8lan(hw, 1); 2014 ret_val = e1000_erase_flash_bank_ich8lan(hw, 1);
1659 if (ret_val) { 2015 if (ret_val) {
1660 e1000_release_swflag_ich8lan(hw); 2016 nvm->ops.release_nvm(hw);
1661 goto out; 2017 goto out;
1662 } 2018 }
1663 } else { 2019 } else {
@@ -1665,7 +2021,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1665 new_bank_offset = 0; 2021 new_bank_offset = 0;
1666 ret_val = e1000_erase_flash_bank_ich8lan(hw, 0); 2022 ret_val = e1000_erase_flash_bank_ich8lan(hw, 0);
1667 if (ret_val) { 2023 if (ret_val) {
1668 e1000_release_swflag_ich8lan(hw); 2024 nvm->ops.release_nvm(hw);
1669 goto out; 2025 goto out;
1670 } 2026 }
1671 } 2027 }
@@ -1723,7 +2079,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1723 if (ret_val) { 2079 if (ret_val) {
1724 /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */ 2080 /* Possibly read-only, see e1000e_write_protect_nvm_ich8lan() */
1725 hw_dbg(hw, "Flash commit failed.\n"); 2081 hw_dbg(hw, "Flash commit failed.\n");
1726 e1000_release_swflag_ich8lan(hw); 2082 nvm->ops.release_nvm(hw);
1727 goto out; 2083 goto out;
1728 } 2084 }
1729 2085
@@ -1736,7 +2092,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1736 act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD; 2092 act_offset = new_bank_offset + E1000_ICH_NVM_SIG_WORD;
1737 ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data); 2093 ret_val = e1000_read_flash_word_ich8lan(hw, act_offset, &data);
1738 if (ret_val) { 2094 if (ret_val) {
1739 e1000_release_swflag_ich8lan(hw); 2095 nvm->ops.release_nvm(hw);
1740 goto out; 2096 goto out;
1741 } 2097 }
1742 data &= 0xBFFF; 2098 data &= 0xBFFF;
@@ -1744,7 +2100,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1744 act_offset * 2 + 1, 2100 act_offset * 2 + 1,
1745 (u8)(data >> 8)); 2101 (u8)(data >> 8));
1746 if (ret_val) { 2102 if (ret_val) {
1747 e1000_release_swflag_ich8lan(hw); 2103 nvm->ops.release_nvm(hw);
1748 goto out; 2104 goto out;
1749 } 2105 }
1750 2106
@@ -1757,7 +2113,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1757 act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1; 2113 act_offset = (old_bank_offset + E1000_ICH_NVM_SIG_WORD) * 2 + 1;
1758 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0); 2114 ret_val = e1000_retry_write_flash_byte_ich8lan(hw, act_offset, 0);
1759 if (ret_val) { 2115 if (ret_val) {
1760 e1000_release_swflag_ich8lan(hw); 2116 nvm->ops.release_nvm(hw);
1761 goto out; 2117 goto out;
1762 } 2118 }
1763 2119
@@ -1767,7 +2123,7 @@ static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
1767 dev_spec->shadow_ram[i].value = 0xFFFF; 2123 dev_spec->shadow_ram[i].value = 0xFFFF;
1768 } 2124 }
1769 2125
1770 e1000_release_swflag_ich8lan(hw); 2126 nvm->ops.release_nvm(hw);
1771 2127
1772 /* 2128 /*
1773 * Reload the EEPROM, or else modifications will not appear 2129 * Reload the EEPROM, or else modifications will not appear
@@ -1831,14 +2187,12 @@ static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
1831 **/ 2187 **/
1832void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw) 2188void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw)
1833{ 2189{
2190 struct e1000_nvm_info *nvm = &hw->nvm;
1834 union ich8_flash_protected_range pr0; 2191 union ich8_flash_protected_range pr0;
1835 union ich8_hws_flash_status hsfsts; 2192 union ich8_hws_flash_status hsfsts;
1836 u32 gfpreg; 2193 u32 gfpreg;
1837 s32 ret_val;
1838 2194
1839 ret_val = e1000_acquire_swflag_ich8lan(hw); 2195 nvm->ops.acquire_nvm(hw);
1840 if (ret_val)
1841 return;
1842 2196
1843 gfpreg = er32flash(ICH_FLASH_GFPREG); 2197 gfpreg = er32flash(ICH_FLASH_GFPREG);
1844 2198
@@ -1859,7 +2213,7 @@ void e1000e_write_protect_nvm_ich8lan(struct e1000_hw *hw)
1859 hsfsts.hsf_status.flockdn = true; 2213 hsfsts.hsf_status.flockdn = true;
1860 ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval); 2214 ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval);
1861 2215
1862 e1000_release_swflag_ich8lan(hw); 2216 nvm->ops.release_nvm(hw);
1863} 2217}
1864 2218
1865/** 2219/**
@@ -2229,6 +2583,8 @@ static s32 e1000_get_bus_info_ich8lan(struct e1000_hw *hw)
2229 **/ 2583 **/
2230static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw) 2584static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
2231{ 2585{
2586 struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
2587 u16 reg;
2232 u32 ctrl, icr, kab; 2588 u32 ctrl, icr, kab;
2233 s32 ret_val; 2589 s32 ret_val;
2234 2590
@@ -2263,6 +2619,18 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
2263 ew32(PBS, E1000_PBS_16K); 2619 ew32(PBS, E1000_PBS_16K);
2264 } 2620 }
2265 2621
2622 if (hw->mac.type == e1000_pchlan) {
2623 /* Save the NVM K1 bit setting*/
2624 ret_val = e1000_read_nvm(hw, E1000_NVM_K1_CONFIG, 1, &reg);
2625 if (ret_val)
2626 return ret_val;
2627
2628 if (reg & E1000_NVM_K1_ENABLE)
2629 dev_spec->nvm_k1_enabled = true;
2630 else
2631 dev_spec->nvm_k1_enabled = false;
2632 }
2633
2266 ctrl = er32(CTRL); 2634 ctrl = er32(CTRL);
2267 2635
2268 if (!e1000_check_reset_block(hw)) { 2636 if (!e1000_check_reset_block(hw)) {
@@ -2304,7 +2672,19 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
2304 hw_dbg(hw, "Auto Read Done did not complete\n"); 2672 hw_dbg(hw, "Auto Read Done did not complete\n");
2305 } 2673 }
2306 } 2674 }
2675 /* Dummy read to clear the phy wakeup bit after lcd reset */
2676 if (hw->mac.type == e1000_pchlan)
2677 e1e_rphy(hw, BM_WUC, &reg);
2307 2678
2679 ret_val = e1000_sw_lcd_config_ich8lan(hw);
2680 if (ret_val)
2681 goto out;
2682
2683 if (hw->mac.type == e1000_pchlan) {
2684 ret_val = e1000_oem_bits_config_ich8lan(hw, true);
2685 if (ret_val)
2686 goto out;
2687 }
2308 /* 2688 /*
2309 * For PCH, this write will make sure that any noise 2689 * For PCH, this write will make sure that any noise
2310 * will be detected as a CRC error and be dropped rather than show up 2690 * will be detected as a CRC error and be dropped rather than show up
@@ -2323,6 +2703,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
2323 if (hw->mac.type == e1000_pchlan) 2703 if (hw->mac.type == e1000_pchlan)
2324 ret_val = e1000_hv_phy_workarounds_ich8lan(hw); 2704 ret_val = e1000_hv_phy_workarounds_ich8lan(hw);
2325 2705
2706out:
2326 return ret_val; 2707 return ret_val;
2327} 2708}
2328 2709
@@ -2627,14 +3008,6 @@ static s32 e1000_get_link_up_info_ich8lan(struct e1000_hw *hw, u16 *speed,
2627 if (ret_val) 3008 if (ret_val)
2628 return ret_val; 3009 return ret_val;
2629 3010
2630 if ((hw->mac.type == e1000_pchlan) && (*speed == SPEED_1000)) {
2631 ret_val = e1000e_write_kmrn_reg(hw,
2632 E1000_KMRNCTRLSTA_K1_CONFIG,
2633 E1000_KMRNCTRLSTA_K1_DISABLE);
2634 if (ret_val)
2635 return ret_val;
2636 }
2637
2638 if ((hw->mac.type == e1000_ich8lan) && 3011 if ((hw->mac.type == e1000_ich8lan) &&
2639 (hw->phy.type == e1000_phy_igp_3) && 3012 (hw->phy.type == e1000_phy_igp_3) &&
2640 (*speed == SPEED_1000)) { 3013 (*speed == SPEED_1000)) {
@@ -2843,9 +3216,8 @@ void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
2843 E1000_PHY_CTRL_GBE_DISABLE; 3216 E1000_PHY_CTRL_GBE_DISABLE;
2844 ew32(PHY_CTRL, phy_ctrl); 3217 ew32(PHY_CTRL, phy_ctrl);
2845 3218
2846 /* Workaround SWFLAG unexpectedly set during S0->Sx */
2847 if (hw->mac.type == e1000_pchlan) 3219 if (hw->mac.type == e1000_pchlan)
2848 udelay(500); 3220 e1000_phy_hw_reset_ich8lan(hw);
2849 default: 3221 default:
2850 break; 3222 break;
2851 } 3223 }
@@ -3113,9 +3485,9 @@ static struct e1000_phy_operations ich8_phy_ops = {
3113}; 3485};
3114 3486
3115static struct e1000_nvm_operations ich8_nvm_ops = { 3487static struct e1000_nvm_operations ich8_nvm_ops = {
3116 .acquire_nvm = e1000_acquire_swflag_ich8lan, 3488 .acquire_nvm = e1000_acquire_nvm_ich8lan,
3117 .read_nvm = e1000_read_nvm_ich8lan, 3489 .read_nvm = e1000_read_nvm_ich8lan,
3118 .release_nvm = e1000_release_swflag_ich8lan, 3490 .release_nvm = e1000_release_nvm_ich8lan,
3119 .update_nvm = e1000_update_nvm_checksum_ich8lan, 3491 .update_nvm = e1000_update_nvm_checksum_ich8lan,
3120 .valid_led_default = e1000_valid_led_default_ich8lan, 3492 .valid_led_default = e1000_valid_led_default_ich8lan,
3121 .validate_nvm = e1000_validate_nvm_checksum_ich8lan, 3493 .validate_nvm = e1000_validate_nvm_checksum_ich8lan,
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c
index 994401fd0664..03175b3a2c9e 100644
--- a/drivers/net/e1000e/phy.c
+++ b/drivers/net/e1000e/phy.c
@@ -95,13 +95,6 @@ static const u16 e1000_igp_2_cable_length_table[] =
95/* BM PHY Copper Specific Control 1 */ 95/* BM PHY Copper Specific Control 1 */
96#define BM_CS_CTRL1 16 96#define BM_CS_CTRL1 16
97 97
98/* BM PHY Copper Specific Status */
99#define BM_CS_STATUS 17
100#define BM_CS_STATUS_LINK_UP 0x0400
101#define BM_CS_STATUS_RESOLVED 0x0800
102#define BM_CS_STATUS_SPEED_MASK 0xC000
103#define BM_CS_STATUS_SPEED_1000 0x8000
104
105#define HV_MUX_DATA_CTRL PHY_REG(776, 16) 98#define HV_MUX_DATA_CTRL PHY_REG(776, 16)
106#define HV_MUX_DATA_CTRL_GEN_TO_MAC 0x0400 99#define HV_MUX_DATA_CTRL_GEN_TO_MAC 0x0400
107#define HV_MUX_DATA_CTRL_FORCE_SPEED 0x0004 100#define HV_MUX_DATA_CTRL_FORCE_SPEED 0x0004
@@ -164,16 +157,25 @@ s32 e1000e_get_phy_id(struct e1000_hw *hw)
164 * MDIC mode. No harm in trying again in this case since 157 * MDIC mode. No harm in trying again in this case since
165 * the PHY ID is unknown at this point anyway 158 * the PHY ID is unknown at this point anyway
166 */ 159 */
160 ret_val = phy->ops.acquire_phy(hw);
161 if (ret_val)
162 goto out;
167 ret_val = e1000_set_mdio_slow_mode_hv(hw, true); 163 ret_val = e1000_set_mdio_slow_mode_hv(hw, true);
168 if (ret_val) 164 if (ret_val)
169 goto out; 165 goto out;
166 phy->ops.release_phy(hw);
170 167
171 retry_count++; 168 retry_count++;
172 } 169 }
173out: 170out:
174 /* Revert to MDIO fast mode, if applicable */ 171 /* Revert to MDIO fast mode, if applicable */
175 if (retry_count) 172 if (retry_count) {
173 ret_val = phy->ops.acquire_phy(hw);
174 if (ret_val)
175 return ret_val;
176 ret_val = e1000_set_mdio_slow_mode_hv(hw, false); 176 ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
177 phy->ops.release_phy(hw);
178 }
177 179
178 return ret_val; 180 return ret_val;
179} 181}
@@ -354,94 +356,173 @@ s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data)
354} 356}
355 357
356/** 358/**
357 * e1000e_read_phy_reg_igp - Read igp PHY register 359 * __e1000e_read_phy_reg_igp - Read igp PHY register
358 * @hw: pointer to the HW structure 360 * @hw: pointer to the HW structure
359 * @offset: register offset to be read 361 * @offset: register offset to be read
360 * @data: pointer to the read data 362 * @data: pointer to the read data
363 * @locked: semaphore has already been acquired or not
361 * 364 *
362 * Acquires semaphore, if necessary, then reads the PHY register at offset 365 * Acquires semaphore, if necessary, then reads the PHY register at offset
363 * and storing the retrieved information in data. Release any acquired 366 * and stores the retrieved information in data. Release any acquired
364 * semaphores before exiting. 367 * semaphores before exiting.
365 **/ 368 **/
366s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data) 369static s32 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data,
370 bool locked)
367{ 371{
368 s32 ret_val; 372 s32 ret_val = 0;
369 373
370 ret_val = hw->phy.ops.acquire_phy(hw); 374 if (!locked) {
371 if (ret_val) 375 if (!(hw->phy.ops.acquire_phy))
372 return ret_val; 376 goto out;
377
378 ret_val = hw->phy.ops.acquire_phy(hw);
379 if (ret_val)
380 goto out;
381 }
373 382
374 if (offset > MAX_PHY_MULTI_PAGE_REG) { 383 if (offset > MAX_PHY_MULTI_PAGE_REG) {
375 ret_val = e1000e_write_phy_reg_mdic(hw, 384 ret_val = e1000e_write_phy_reg_mdic(hw,
376 IGP01E1000_PHY_PAGE_SELECT, 385 IGP01E1000_PHY_PAGE_SELECT,
377 (u16)offset); 386 (u16)offset);
378 if (ret_val) { 387 if (ret_val)
379 hw->phy.ops.release_phy(hw); 388 goto release;
380 return ret_val;
381 }
382 } 389 }
383 390
384 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, 391 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
385 data); 392 data);
386
387 hw->phy.ops.release_phy(hw);
388 393
394release:
395 if (!locked)
396 hw->phy.ops.release_phy(hw);
397out:
389 return ret_val; 398 return ret_val;
390} 399}
391 400
392/** 401/**
402 * e1000e_read_phy_reg_igp - Read igp PHY register
403 * @hw: pointer to the HW structure
404 * @offset: register offset to be read
405 * @data: pointer to the read data
406 *
407 * Acquires semaphore then reads the PHY register at offset and stores the
408 * retrieved information in data.
409 * Release the acquired semaphore before exiting.
410 **/
411s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data)
412{
413 return __e1000e_read_phy_reg_igp(hw, offset, data, false);
414}
415
416/**
417 * e1000e_read_phy_reg_igp_locked - Read igp PHY register
418 * @hw: pointer to the HW structure
419 * @offset: register offset to be read
420 * @data: pointer to the read data
421 *
422 * Reads the PHY register at offset and stores the retrieved information
423 * in data. Assumes semaphore already acquired.
424 **/
425s32 e1000e_read_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 *data)
426{
427 return __e1000e_read_phy_reg_igp(hw, offset, data, true);
428}
429
430/**
393 * e1000e_write_phy_reg_igp - Write igp PHY register 431 * e1000e_write_phy_reg_igp - Write igp PHY register
394 * @hw: pointer to the HW structure 432 * @hw: pointer to the HW structure
395 * @offset: register offset to write to 433 * @offset: register offset to write to
396 * @data: data to write at register offset 434 * @data: data to write at register offset
435 * @locked: semaphore has already been acquired or not
397 * 436 *
398 * Acquires semaphore, if necessary, then writes the data to PHY register 437 * Acquires semaphore, if necessary, then writes the data to PHY register
399 * at the offset. Release any acquired semaphores before exiting. 438 * at the offset. Release any acquired semaphores before exiting.
400 **/ 439 **/
401s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data) 440static s32 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data,
441 bool locked)
402{ 442{
403 s32 ret_val; 443 s32 ret_val = 0;
404 444
405 ret_val = hw->phy.ops.acquire_phy(hw); 445 if (!locked) {
406 if (ret_val) 446 if (!(hw->phy.ops.acquire_phy))
407 return ret_val; 447 goto out;
448
449 ret_val = hw->phy.ops.acquire_phy(hw);
450 if (ret_val)
451 goto out;
452 }
408 453
409 if (offset > MAX_PHY_MULTI_PAGE_REG) { 454 if (offset > MAX_PHY_MULTI_PAGE_REG) {
410 ret_val = e1000e_write_phy_reg_mdic(hw, 455 ret_val = e1000e_write_phy_reg_mdic(hw,
411 IGP01E1000_PHY_PAGE_SELECT, 456 IGP01E1000_PHY_PAGE_SELECT,
412 (u16)offset); 457 (u16)offset);
413 if (ret_val) { 458 if (ret_val)
414 hw->phy.ops.release_phy(hw); 459 goto release;
415 return ret_val;
416 }
417 } 460 }
418 461
419 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, 462 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
420 data); 463 data);
421 464
422 hw->phy.ops.release_phy(hw); 465release:
466 if (!locked)
467 hw->phy.ops.release_phy(hw);
423 468
469out:
424 return ret_val; 470 return ret_val;
425} 471}
426 472
427/** 473/**
428 * e1000e_read_kmrn_reg - Read kumeran register 474 * e1000e_write_phy_reg_igp - Write igp PHY register
475 * @hw: pointer to the HW structure
476 * @offset: register offset to write to
477 * @data: data to write at register offset
478 *
479 * Acquires semaphore then writes the data to PHY register
480 * at the offset. Release any acquired semaphores before exiting.
481 **/
482s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data)
483{
484 return __e1000e_write_phy_reg_igp(hw, offset, data, false);
485}
486
487/**
488 * e1000e_write_phy_reg_igp_locked - Write igp PHY register
489 * @hw: pointer to the HW structure
490 * @offset: register offset to write to
491 * @data: data to write at register offset
492 *
493 * Writes the data to PHY register at the offset.
494 * Assumes semaphore already acquired.
495 **/
496s32 e1000e_write_phy_reg_igp_locked(struct e1000_hw *hw, u32 offset, u16 data)
497{
498 return __e1000e_write_phy_reg_igp(hw, offset, data, true);
499}
500
501/**
502 * __e1000_read_kmrn_reg - Read kumeran register
429 * @hw: pointer to the HW structure 503 * @hw: pointer to the HW structure
430 * @offset: register offset to be read 504 * @offset: register offset to be read
431 * @data: pointer to the read data 505 * @data: pointer to the read data
506 * @locked: semaphore has already been acquired or not
432 * 507 *
433 * Acquires semaphore, if necessary. Then reads the PHY register at offset 508 * Acquires semaphore, if necessary. Then reads the PHY register at offset
434 * using the kumeran interface. The information retrieved is stored in data. 509 * using the kumeran interface. The information retrieved is stored in data.
435 * Release any acquired semaphores before exiting. 510 * Release any acquired semaphores before exiting.
436 **/ 511 **/
437s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data) 512static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data,
513 bool locked)
438{ 514{
439 u32 kmrnctrlsta; 515 u32 kmrnctrlsta;
440 s32 ret_val; 516 s32 ret_val = 0;
441 517
442 ret_val = hw->phy.ops.acquire_phy(hw); 518 if (!locked) {
443 if (ret_val) 519 if (!(hw->phy.ops.acquire_phy))
444 return ret_val; 520 goto out;
521
522 ret_val = hw->phy.ops.acquire_phy(hw);
523 if (ret_val)
524 goto out;
525 }
445 526
446 kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & 527 kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
447 E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN; 528 E1000_KMRNCTRLSTA_OFFSET) | E1000_KMRNCTRLSTA_REN;
@@ -452,41 +533,111 @@ s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)
452 kmrnctrlsta = er32(KMRNCTRLSTA); 533 kmrnctrlsta = er32(KMRNCTRLSTA);
453 *data = (u16)kmrnctrlsta; 534 *data = (u16)kmrnctrlsta;
454 535
455 hw->phy.ops.release_phy(hw); 536 if (!locked)
537 hw->phy.ops.release_phy(hw);
456 538
539out:
457 return ret_val; 540 return ret_val;
458} 541}
459 542
460/** 543/**
461 * e1000e_write_kmrn_reg - Write kumeran register 544 * e1000e_read_kmrn_reg - Read kumeran register
545 * @hw: pointer to the HW structure
546 * @offset: register offset to be read
547 * @data: pointer to the read data
548 *
549 * Acquires semaphore then reads the PHY register at offset using the
550 * kumeran interface. The information retrieved is stored in data.
551 * Release the acquired semaphore before exiting.
552 **/
553s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data)
554{
555 return __e1000_read_kmrn_reg(hw, offset, data, false);
556}
557
558/**
559 * e1000e_read_kmrn_reg_locked - Read kumeran register
560 * @hw: pointer to the HW structure
561 * @offset: register offset to be read
562 * @data: pointer to the read data
563 *
564 * Reads the PHY register at offset using the kumeran interface. The
565 * information retrieved is stored in data.
566 * Assumes semaphore already acquired.
567 **/
568s32 e1000e_read_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 *data)
569{
570 return __e1000_read_kmrn_reg(hw, offset, data, true);
571}
572
573/**
574 * __e1000_write_kmrn_reg - Write kumeran register
462 * @hw: pointer to the HW structure 575 * @hw: pointer to the HW structure
463 * @offset: register offset to write to 576 * @offset: register offset to write to
464 * @data: data to write at register offset 577 * @data: data to write at register offset
578 * @locked: semaphore has already been acquired or not
465 * 579 *
466 * Acquires semaphore, if necessary. Then write the data to PHY register 580 * Acquires semaphore, if necessary. Then write the data to PHY register
467 * at the offset using the kumeran interface. Release any acquired semaphores 581 * at the offset using the kumeran interface. Release any acquired semaphores
468 * before exiting. 582 * before exiting.
469 **/ 583 **/
470s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data) 584static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data,
585 bool locked)
471{ 586{
472 u32 kmrnctrlsta; 587 u32 kmrnctrlsta;
473 s32 ret_val; 588 s32 ret_val = 0;
474 589
475 ret_val = hw->phy.ops.acquire_phy(hw); 590 if (!locked) {
476 if (ret_val) 591 if (!(hw->phy.ops.acquire_phy))
477 return ret_val; 592 goto out;
593
594 ret_val = hw->phy.ops.acquire_phy(hw);
595 if (ret_val)
596 goto out;
597 }
478 598
479 kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) & 599 kmrnctrlsta = ((offset << E1000_KMRNCTRLSTA_OFFSET_SHIFT) &
480 E1000_KMRNCTRLSTA_OFFSET) | data; 600 E1000_KMRNCTRLSTA_OFFSET) | data;
481 ew32(KMRNCTRLSTA, kmrnctrlsta); 601 ew32(KMRNCTRLSTA, kmrnctrlsta);
482 602
483 udelay(2); 603 udelay(2);
484 hw->phy.ops.release_phy(hw);
485 604
605 if (!locked)
606 hw->phy.ops.release_phy(hw);
607
608out:
486 return ret_val; 609 return ret_val;
487} 610}
488 611
489/** 612/**
613 * e1000e_write_kmrn_reg - Write kumeran register
614 * @hw: pointer to the HW structure
615 * @offset: register offset to write to
616 * @data: data to write at register offset
617 *
618 * Acquires semaphore then writes the data to the PHY register at the offset
619 * using the kumeran interface. Release the acquired semaphore before exiting.
620 **/
621s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data)
622{
623 return __e1000_write_kmrn_reg(hw, offset, data, false);
624}
625
626/**
627 * e1000e_write_kmrn_reg_locked - Write kumeran register
628 * @hw: pointer to the HW structure
629 * @offset: register offset to write to
630 * @data: data to write at register offset
631 *
632 * Write the data to PHY register at the offset using the kumeran interface.
633 * Assumes semaphore already acquired.
634 **/
635s32 e1000e_write_kmrn_reg_locked(struct e1000_hw *hw, u32 offset, u16 data)
636{
637 return __e1000_write_kmrn_reg(hw, offset, data, true);
638}
639
640/**
490 * e1000_copper_link_setup_82577 - Setup 82577 PHY for copper link 641 * e1000_copper_link_setup_82577 - Setup 82577 PHY for copper link
491 * @hw: pointer to the HW structure 642 * @hw: pointer to the HW structure
492 * 643 *
@@ -2105,6 +2256,10 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
2105 u32 page = offset >> IGP_PAGE_SHIFT; 2256 u32 page = offset >> IGP_PAGE_SHIFT;
2106 u32 page_shift = 0; 2257 u32 page_shift = 0;
2107 2258
2259 ret_val = hw->phy.ops.acquire_phy(hw);
2260 if (ret_val)
2261 return ret_val;
2262
2108 /* Page 800 works differently than the rest so it has its own func */ 2263 /* Page 800 works differently than the rest so it has its own func */
2109 if (page == BM_WUC_PAGE) { 2264 if (page == BM_WUC_PAGE) {
2110 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, 2265 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
@@ -2112,10 +2267,6 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
2112 goto out; 2267 goto out;
2113 } 2268 }
2114 2269
2115 ret_val = hw->phy.ops.acquire_phy(hw);
2116 if (ret_val)
2117 goto out;
2118
2119 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); 2270 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
2120 2271
2121 if (offset > MAX_PHY_MULTI_PAGE_REG) { 2272 if (offset > MAX_PHY_MULTI_PAGE_REG) {
@@ -2135,18 +2286,15 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data)
2135 /* Page is shifted left, PHY expects (page x 32) */ 2286 /* Page is shifted left, PHY expects (page x 32) */
2136 ret_val = e1000e_write_phy_reg_mdic(hw, page_select, 2287 ret_val = e1000e_write_phy_reg_mdic(hw, page_select,
2137 (page << page_shift)); 2288 (page << page_shift));
2138 if (ret_val) { 2289 if (ret_val)
2139 hw->phy.ops.release_phy(hw);
2140 goto out; 2290 goto out;
2141 }
2142 } 2291 }
2143 2292
2144 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, 2293 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2145 data); 2294 data);
2146 2295
2147 hw->phy.ops.release_phy(hw);
2148
2149out: 2296out:
2297 hw->phy.ops.release_phy(hw);
2150 return ret_val; 2298 return ret_val;
2151} 2299}
2152 2300
@@ -2167,6 +2315,10 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
2167 u32 page = offset >> IGP_PAGE_SHIFT; 2315 u32 page = offset >> IGP_PAGE_SHIFT;
2168 u32 page_shift = 0; 2316 u32 page_shift = 0;
2169 2317
2318 ret_val = hw->phy.ops.acquire_phy(hw);
2319 if (ret_val)
2320 return ret_val;
2321
2170 /* Page 800 works differently than the rest so it has its own func */ 2322 /* Page 800 works differently than the rest so it has its own func */
2171 if (page == BM_WUC_PAGE) { 2323 if (page == BM_WUC_PAGE) {
2172 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, 2324 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
@@ -2174,10 +2326,6 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
2174 goto out; 2326 goto out;
2175 } 2327 }
2176 2328
2177 ret_val = hw->phy.ops.acquire_phy(hw);
2178 if (ret_val)
2179 goto out;
2180
2181 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset); 2329 hw->phy.addr = e1000_get_phy_addr_for_bm_page(page, offset);
2182 2330
2183 if (offset > MAX_PHY_MULTI_PAGE_REG) { 2331 if (offset > MAX_PHY_MULTI_PAGE_REG) {
@@ -2197,17 +2345,14 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data)
2197 /* Page is shifted left, PHY expects (page x 32) */ 2345 /* Page is shifted left, PHY expects (page x 32) */
2198 ret_val = e1000e_write_phy_reg_mdic(hw, page_select, 2346 ret_val = e1000e_write_phy_reg_mdic(hw, page_select,
2199 (page << page_shift)); 2347 (page << page_shift));
2200 if (ret_val) { 2348 if (ret_val)
2201 hw->phy.ops.release_phy(hw);
2202 goto out; 2349 goto out;
2203 }
2204 } 2350 }
2205 2351
2206 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, 2352 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2207 data); 2353 data);
2208 hw->phy.ops.release_phy(hw);
2209
2210out: 2354out:
2355 hw->phy.ops.release_phy(hw);
2211 return ret_val; 2356 return ret_val;
2212} 2357}
2213 2358
@@ -2226,17 +2371,17 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
2226 s32 ret_val; 2371 s32 ret_val;
2227 u16 page = (u16)(offset >> IGP_PAGE_SHIFT); 2372 u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
2228 2373
2374 ret_val = hw->phy.ops.acquire_phy(hw);
2375 if (ret_val)
2376 return ret_val;
2377
2229 /* Page 800 works differently than the rest so it has its own func */ 2378 /* Page 800 works differently than the rest so it has its own func */
2230 if (page == BM_WUC_PAGE) { 2379 if (page == BM_WUC_PAGE) {
2231 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data, 2380 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, data,
2232 true); 2381 true);
2233 return ret_val; 2382 goto out;
2234 } 2383 }
2235 2384
2236 ret_val = hw->phy.ops.acquire_phy(hw);
2237 if (ret_val)
2238 return ret_val;
2239
2240 hw->phy.addr = 1; 2385 hw->phy.addr = 1;
2241 2386
2242 if (offset > MAX_PHY_MULTI_PAGE_REG) { 2387 if (offset > MAX_PHY_MULTI_PAGE_REG) {
@@ -2245,16 +2390,14 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data)
2245 ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, 2390 ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
2246 page); 2391 page);
2247 2392
2248 if (ret_val) { 2393 if (ret_val)
2249 hw->phy.ops.release_phy(hw); 2394 goto out;
2250 return ret_val;
2251 }
2252 } 2395 }
2253 2396
2254 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, 2397 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2255 data); 2398 data);
2399out:
2256 hw->phy.ops.release_phy(hw); 2400 hw->phy.ops.release_phy(hw);
2257
2258 return ret_val; 2401 return ret_val;
2259} 2402}
2260 2403
@@ -2272,17 +2415,17 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)
2272 s32 ret_val; 2415 s32 ret_val;
2273 u16 page = (u16)(offset >> IGP_PAGE_SHIFT); 2416 u16 page = (u16)(offset >> IGP_PAGE_SHIFT);
2274 2417
2418 ret_val = hw->phy.ops.acquire_phy(hw);
2419 if (ret_val)
2420 return ret_val;
2421
2275 /* Page 800 works differently than the rest so it has its own func */ 2422 /* Page 800 works differently than the rest so it has its own func */
2276 if (page == BM_WUC_PAGE) { 2423 if (page == BM_WUC_PAGE) {
2277 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data, 2424 ret_val = e1000_access_phy_wakeup_reg_bm(hw, offset, &data,
2278 false); 2425 false);
2279 return ret_val; 2426 goto out;
2280 } 2427 }
2281 2428
2282 ret_val = hw->phy.ops.acquire_phy(hw);
2283 if (ret_val)
2284 return ret_val;
2285
2286 hw->phy.addr = 1; 2429 hw->phy.addr = 1;
2287 2430
2288 if (offset > MAX_PHY_MULTI_PAGE_REG) { 2431 if (offset > MAX_PHY_MULTI_PAGE_REG) {
@@ -2290,17 +2433,15 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)
2290 ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT, 2433 ret_val = e1000e_write_phy_reg_mdic(hw, BM_PHY_PAGE_SELECT,
2291 page); 2434 page);
2292 2435
2293 if (ret_val) { 2436 if (ret_val)
2294 hw->phy.ops.release_phy(hw); 2437 goto out;
2295 return ret_val;
2296 }
2297 } 2438 }
2298 2439
2299 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, 2440 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset,
2300 data); 2441 data);
2301 2442
2443out:
2302 hw->phy.ops.release_phy(hw); 2444 hw->phy.ops.release_phy(hw);
2303
2304 return ret_val; 2445 return ret_val;
2305} 2446}
2306 2447
@@ -2320,6 +2461,8 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data)
2320 * 3) Write the address using the address opcode (0x11) 2461 * 3) Write the address using the address opcode (0x11)
2321 * 4) Read or write the data using the data opcode (0x12) 2462 * 4) Read or write the data using the data opcode (0x12)
2322 * 5) Restore 769_17.2 to its original value 2463 * 5) Restore 769_17.2 to its original value
2464 *
2465 * Assumes semaphore already acquired.
2323 **/ 2466 **/
2324static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset, 2467static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
2325 u16 *data, bool read) 2468 u16 *data, bool read)
@@ -2327,20 +2470,12 @@ static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
2327 s32 ret_val; 2470 s32 ret_val;
2328 u16 reg = BM_PHY_REG_NUM(offset); 2471 u16 reg = BM_PHY_REG_NUM(offset);
2329 u16 phy_reg = 0; 2472 u16 phy_reg = 0;
2330 u8 phy_acquired = 1;
2331
2332 2473
2333 /* Gig must be disabled for MDIO accesses to page 800 */ 2474 /* Gig must be disabled for MDIO accesses to page 800 */
2334 if ((hw->mac.type == e1000_pchlan) && 2475 if ((hw->mac.type == e1000_pchlan) &&
2335 (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE))) 2476 (!(er32(PHY_CTRL) & E1000_PHY_CTRL_GBE_DISABLE)))
2336 hw_dbg(hw, "Attempting to access page 800 while gig enabled\n"); 2477 hw_dbg(hw, "Attempting to access page 800 while gig enabled\n");
2337 2478
2338 ret_val = hw->phy.ops.acquire_phy(hw);
2339 if (ret_val) {
2340 phy_acquired = 0;
2341 goto out;
2342 }
2343
2344 /* All operations in this function are phy address 1 */ 2479 /* All operations in this function are phy address 1 */
2345 hw->phy.addr = 1; 2480 hw->phy.addr = 1;
2346 2481
@@ -2397,8 +2532,6 @@ static s32 e1000_access_phy_wakeup_reg_bm(struct e1000_hw *hw, u32 offset,
2397 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg); 2532 ret_val = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
2398 2533
2399out: 2534out:
2400 if (phy_acquired == 1)
2401 hw->phy.ops.release_phy(hw);
2402 return ret_val; 2535 return ret_val;
2403} 2536}
2404 2537
@@ -2439,52 +2572,63 @@ static s32 e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active)
2439 return 0; 2572 return 0;
2440} 2573}
2441 2574
2575/**
2576 * e1000_set_mdio_slow_mode_hv - Set slow MDIO access mode
2577 * @hw: pointer to the HW structure
2578 * @slow: true for slow mode, false for normal mode
2579 *
2580 * Assumes semaphore already acquired.
2581 **/
2442s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow) 2582s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw, bool slow)
2443{ 2583{
2444 s32 ret_val = 0; 2584 s32 ret_val = 0;
2445 u16 data = 0; 2585 u16 data = 0;
2446 2586
2447 ret_val = hw->phy.ops.acquire_phy(hw);
2448 if (ret_val)
2449 return ret_val;
2450
2451 /* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */ 2587 /* Set MDIO mode - page 769, register 16: 0x2580==slow, 0x2180==fast */
2452 hw->phy.addr = 1; 2588 hw->phy.addr = 1;
2453 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT, 2589 ret_val = e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
2454 (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT)); 2590 (BM_PORT_CTRL_PAGE << IGP_PAGE_SHIFT));
2455 if (ret_val) { 2591 if (ret_val)
2456 hw->phy.ops.release_phy(hw); 2592 goto out;
2457 return ret_val; 2593
2458 }
2459 ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1, 2594 ret_val = e1000e_write_phy_reg_mdic(hw, BM_CS_CTRL1,
2460 (0x2180 | (slow << 10))); 2595 (0x2180 | (slow << 10)));
2596 if (ret_val)
2597 goto out;
2461 2598
2462 /* dummy read when reverting to fast mode - throw away result */ 2599 /* dummy read when reverting to fast mode - throw away result */
2463 if (!slow) 2600 if (!slow)
2464 e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data); 2601 ret_val = e1000e_read_phy_reg_mdic(hw, BM_CS_CTRL1, &data);
2465
2466 hw->phy.ops.release_phy(hw);
2467 2602
2603out:
2468 return ret_val; 2604 return ret_val;
2469} 2605}
2470 2606
2471/** 2607/**
2472 * e1000_read_phy_reg_hv - Read HV PHY register 2608 * __e1000_read_phy_reg_hv - Read HV PHY register
2473 * @hw: pointer to the HW structure 2609 * @hw: pointer to the HW structure
2474 * @offset: register offset to be read 2610 * @offset: register offset to be read
2475 * @data: pointer to the read data 2611 * @data: pointer to the read data
2612 * @locked: semaphore has already been acquired or not
2476 * 2613 *
2477 * Acquires semaphore, if necessary, then reads the PHY register at offset 2614 * Acquires semaphore, if necessary, then reads the PHY register at offset
2478 * and storing the retrieved information in data. Release any acquired 2615 * and stores the retrieved information in data. Release any acquired
2479 * semaphore before exiting. 2616 * semaphore before exiting.
2480 **/ 2617 **/
2481s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data) 2618static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data,
2619 bool locked)
2482{ 2620{
2483 s32 ret_val; 2621 s32 ret_val;
2484 u16 page = BM_PHY_REG_PAGE(offset); 2622 u16 page = BM_PHY_REG_PAGE(offset);
2485 u16 reg = BM_PHY_REG_NUM(offset); 2623 u16 reg = BM_PHY_REG_NUM(offset);
2486 bool in_slow_mode = false; 2624 bool in_slow_mode = false;
2487 2625
2626 if (!locked) {
2627 ret_val = hw->phy.ops.acquire_phy(hw);
2628 if (ret_val)
2629 return ret_val;
2630 }
2631
2488 /* Workaround failure in MDIO access while cable is disconnected */ 2632 /* Workaround failure in MDIO access while cable is disconnected */
2489 if ((hw->phy.type == e1000_phy_82577) && 2633 if ((hw->phy.type == e1000_phy_82577) &&
2490 !(er32(STATUS) & E1000_STATUS_LU)) { 2634 !(er32(STATUS) & E1000_STATUS_LU)) {
@@ -2508,10 +2652,6 @@ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
2508 goto out; 2652 goto out;
2509 } 2653 }
2510 2654
2511 ret_val = hw->phy.ops.acquire_phy(hw);
2512 if (ret_val)
2513 goto out;
2514
2515 hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); 2655 hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);
2516 2656
2517 if (page == HV_INTC_FC_PAGE_START) 2657 if (page == HV_INTC_FC_PAGE_START)
@@ -2529,42 +2669,76 @@ s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
2529 ret_val = e1000e_write_phy_reg_mdic(hw, 2669 ret_val = e1000e_write_phy_reg_mdic(hw,
2530 IGP01E1000_PHY_PAGE_SELECT, 2670 IGP01E1000_PHY_PAGE_SELECT,
2531 (page << IGP_PAGE_SHIFT)); 2671 (page << IGP_PAGE_SHIFT));
2532 if (ret_val) {
2533 hw->phy.ops.release_phy(hw);
2534 goto out;
2535 }
2536 hw->phy.addr = phy_addr; 2672 hw->phy.addr = phy_addr;
2537 } 2673 }
2538 } 2674 }
2539 2675
2540 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, 2676 ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
2541 data); 2677 data);
2542 hw->phy.ops.release_phy(hw);
2543
2544out: 2678out:
2545 /* Revert to MDIO fast mode, if applicable */ 2679 /* Revert to MDIO fast mode, if applicable */
2546 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) 2680 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
2547 ret_val = e1000_set_mdio_slow_mode_hv(hw, false); 2681 ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
2548 2682
2683 if (!locked)
2684 hw->phy.ops.release_phy(hw);
2685
2549 return ret_val; 2686 return ret_val;
2550} 2687}
2551 2688
2552/** 2689/**
2553 * e1000_write_phy_reg_hv - Write HV PHY register 2690 * e1000_read_phy_reg_hv - Read HV PHY register
2691 * @hw: pointer to the HW structure
2692 * @offset: register offset to be read
2693 * @data: pointer to the read data
2694 *
2695 * Acquires semaphore then reads the PHY register at offset and stores
2696 * the retrieved information in data. Release the acquired semaphore
2697 * before exiting.
2698 **/
2699s32 e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data)
2700{
2701 return __e1000_read_phy_reg_hv(hw, offset, data, false);
2702}
2703
2704/**
2705 * e1000_read_phy_reg_hv_locked - Read HV PHY register
2706 * @hw: pointer to the HW structure
2707 * @offset: register offset to be read
2708 * @data: pointer to the read data
2709 *
2710 * Reads the PHY register at offset and stores the retrieved information
2711 * in data. Assumes semaphore already acquired.
2712 **/
2713s32 e1000_read_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 *data)
2714{
2715 return __e1000_read_phy_reg_hv(hw, offset, data, true);
2716}
2717
2718/**
2719 * __e1000_write_phy_reg_hv - Write HV PHY register
2554 * @hw: pointer to the HW structure 2720 * @hw: pointer to the HW structure
2555 * @offset: register offset to write to 2721 * @offset: register offset to write to
2556 * @data: data to write at register offset 2722 * @data: data to write at register offset
2723 * @locked: semaphore has already been acquired or not
2557 * 2724 *
2558 * Acquires semaphore, if necessary, then writes the data to PHY register 2725 * Acquires semaphore, if necessary, then writes the data to PHY register
2559 * at the offset. Release any acquired semaphores before exiting. 2726 * at the offset. Release any acquired semaphores before exiting.
2560 **/ 2727 **/
2561s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data) 2728static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data,
2729 bool locked)
2562{ 2730{
2563 s32 ret_val; 2731 s32 ret_val;
2564 u16 page = BM_PHY_REG_PAGE(offset); 2732 u16 page = BM_PHY_REG_PAGE(offset);
2565 u16 reg = BM_PHY_REG_NUM(offset); 2733 u16 reg = BM_PHY_REG_NUM(offset);
2566 bool in_slow_mode = false; 2734 bool in_slow_mode = false;
2567 2735
2736 if (!locked) {
2737 ret_val = hw->phy.ops.acquire_phy(hw);
2738 if (ret_val)
2739 return ret_val;
2740 }
2741
2568 /* Workaround failure in MDIO access while cable is disconnected */ 2742 /* Workaround failure in MDIO access while cable is disconnected */
2569 if ((hw->phy.type == e1000_phy_82577) && 2743 if ((hw->phy.type == e1000_phy_82577) &&
2570 !(er32(STATUS) & E1000_STATUS_LU)) { 2744 !(er32(STATUS) & E1000_STATUS_LU)) {
@@ -2588,10 +2762,6 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
2588 goto out; 2762 goto out;
2589 } 2763 }
2590 2764
2591 ret_val = hw->phy.ops.acquire_phy(hw);
2592 if (ret_val)
2593 goto out;
2594
2595 hw->phy.addr = e1000_get_phy_addr_for_hv_page(page); 2765 hw->phy.addr = e1000_get_phy_addr_for_hv_page(page);
2596 2766
2597 if (page == HV_INTC_FC_PAGE_START) 2767 if (page == HV_INTC_FC_PAGE_START)
@@ -2607,15 +2777,10 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
2607 ((MAX_PHY_REG_ADDRESS & reg) == 0) && 2777 ((MAX_PHY_REG_ADDRESS & reg) == 0) &&
2608 (data & (1 << 11))) { 2778 (data & (1 << 11))) {
2609 u16 data2 = 0x7EFF; 2779 u16 data2 = 0x7EFF;
2610 hw->phy.ops.release_phy(hw);
2611 ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3, 2780 ret_val = e1000_access_phy_debug_regs_hv(hw, (1 << 6) | 0x3,
2612 &data2, false); 2781 &data2, false);
2613 if (ret_val) 2782 if (ret_val)
2614 goto out; 2783 goto out;
2615
2616 ret_val = hw->phy.ops.acquire_phy(hw);
2617 if (ret_val)
2618 goto out;
2619 } 2784 }
2620 2785
2621 if (reg > MAX_PHY_MULTI_PAGE_REG) { 2786 if (reg > MAX_PHY_MULTI_PAGE_REG) {
@@ -2630,27 +2795,53 @@ s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
2630 ret_val = e1000e_write_phy_reg_mdic(hw, 2795 ret_val = e1000e_write_phy_reg_mdic(hw,
2631 IGP01E1000_PHY_PAGE_SELECT, 2796 IGP01E1000_PHY_PAGE_SELECT,
2632 (page << IGP_PAGE_SHIFT)); 2797 (page << IGP_PAGE_SHIFT));
2633 if (ret_val) {
2634 hw->phy.ops.release_phy(hw);
2635 goto out;
2636 }
2637 hw->phy.addr = phy_addr; 2798 hw->phy.addr = phy_addr;
2638 } 2799 }
2639 } 2800 }
2640 2801
2641 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg, 2802 ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & reg,
2642 data); 2803 data);
2643 hw->phy.ops.release_phy(hw);
2644 2804
2645out: 2805out:
2646 /* Revert to MDIO fast mode, if applicable */ 2806 /* Revert to MDIO fast mode, if applicable */
2647 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode) 2807 if ((hw->phy.type == e1000_phy_82577) && in_slow_mode)
2648 ret_val = e1000_set_mdio_slow_mode_hv(hw, false); 2808 ret_val = e1000_set_mdio_slow_mode_hv(hw, false);
2649 2809
2810 if (!locked)
2811 hw->phy.ops.release_phy(hw);
2812
2650 return ret_val; 2813 return ret_val;
2651} 2814}
2652 2815
2653/** 2816/**
2817 * e1000_write_phy_reg_hv - Write HV PHY register
2818 * @hw: pointer to the HW structure
2819 * @offset: register offset to write to
2820 * @data: data to write at register offset
2821 *
2822 * Acquires semaphore then writes the data to PHY register at the offset.
2823 * Release the acquired semaphores before exiting.
2824 **/
2825s32 e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data)
2826{
2827 return __e1000_write_phy_reg_hv(hw, offset, data, false);
2828}
2829
2830/**
2831 * e1000_write_phy_reg_hv_locked - Write HV PHY register
2832 * @hw: pointer to the HW structure
2833 * @offset: register offset to write to
2834 * @data: data to write at register offset
2835 *
2836 * Writes the data to PHY register at the offset. Assumes semaphore
2837 * already acquired.
2838 **/
2839s32 e1000_write_phy_reg_hv_locked(struct e1000_hw *hw, u32 offset, u16 data)
2840{
2841 return __e1000_write_phy_reg_hv(hw, offset, data, true);
2842}
2843
2844/**
2654 * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page 2845 * e1000_get_phy_addr_for_hv_page - Get PHY adrress based on page
2655 * @page: page to be accessed 2846 * @page: page to be accessed
2656 **/ 2847 **/
@@ -2671,10 +2862,9 @@ static u32 e1000_get_phy_addr_for_hv_page(u32 page)
2671 * @data: pointer to the data to be read or written 2862 * @data: pointer to the data to be read or written
2672 * @read: determines if operation is read or written 2863 * @read: determines if operation is read or written
2673 * 2864 *
2674 * Acquires semaphore, if necessary, then reads the PHY register at offset 2865 * Reads the PHY register at offset and stores the retreived information
2675 * and storing the retreived information in data. Release any acquired 2866 * in data. Assumes semaphore already acquired. Note that the procedure
2676 * semaphores before exiting. Note that the procedure to read these regs 2867 * to read these regs uses the address port and data port to read/write.
2677 * uses the address port and data port to read/write.
2678 **/ 2868 **/
2679static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset, 2869static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
2680 u16 *data, bool read) 2870 u16 *data, bool read)
@@ -2682,20 +2872,12 @@ static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
2682 s32 ret_val; 2872 s32 ret_val;
2683 u32 addr_reg = 0; 2873 u32 addr_reg = 0;
2684 u32 data_reg = 0; 2874 u32 data_reg = 0;
2685 u8 phy_acquired = 1;
2686 2875
2687 /* This takes care of the difference with desktop vs mobile phy */ 2876 /* This takes care of the difference with desktop vs mobile phy */
2688 addr_reg = (hw->phy.type == e1000_phy_82578) ? 2877 addr_reg = (hw->phy.type == e1000_phy_82578) ?
2689 I82578_ADDR_REG : I82577_ADDR_REG; 2878 I82578_ADDR_REG : I82577_ADDR_REG;
2690 data_reg = addr_reg + 1; 2879 data_reg = addr_reg + 1;
2691 2880
2692 ret_val = hw->phy.ops.acquire_phy(hw);
2693 if (ret_val) {
2694 hw_dbg(hw, "Could not acquire PHY\n");
2695 phy_acquired = 0;
2696 goto out;
2697 }
2698
2699 /* All operations in this function are phy address 2 */ 2881 /* All operations in this function are phy address 2 */
2700 hw->phy.addr = 2; 2882 hw->phy.addr = 2;
2701 2883
@@ -2718,8 +2900,6 @@ static s32 e1000_access_phy_debug_regs_hv(struct e1000_hw *hw, u32 offset,
2718 } 2900 }
2719 2901
2720out: 2902out:
2721 if (phy_acquired == 1)
2722 hw->phy.ops.release_phy(hw);
2723 return ret_val; 2903 return ret_val;
2724} 2904}
2725 2905
diff --git a/drivers/net/ethoc.c b/drivers/net/ethoc.c
index 96f5b2a2d2c5..f7d9ac8324cb 100644
--- a/drivers/net/ethoc.c
+++ b/drivers/net/ethoc.c
@@ -223,24 +223,25 @@ struct ethoc_bd {
223 u32 addr; 223 u32 addr;
224}; 224};
225 225
226static u32 ethoc_read(struct ethoc *dev, loff_t offset) 226static inline u32 ethoc_read(struct ethoc *dev, loff_t offset)
227{ 227{
228 return ioread32(dev->iobase + offset); 228 return ioread32(dev->iobase + offset);
229} 229}
230 230
231static void ethoc_write(struct ethoc *dev, loff_t offset, u32 data) 231static inline void ethoc_write(struct ethoc *dev, loff_t offset, u32 data)
232{ 232{
233 iowrite32(data, dev->iobase + offset); 233 iowrite32(data, dev->iobase + offset);
234} 234}
235 235
236static void ethoc_read_bd(struct ethoc *dev, int index, struct ethoc_bd *bd) 236static inline void ethoc_read_bd(struct ethoc *dev, int index,
237 struct ethoc_bd *bd)
237{ 238{
238 loff_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd)); 239 loff_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd));
239 bd->stat = ethoc_read(dev, offset + 0); 240 bd->stat = ethoc_read(dev, offset + 0);
240 bd->addr = ethoc_read(dev, offset + 4); 241 bd->addr = ethoc_read(dev, offset + 4);
241} 242}
242 243
243static void ethoc_write_bd(struct ethoc *dev, int index, 244static inline void ethoc_write_bd(struct ethoc *dev, int index,
244 const struct ethoc_bd *bd) 245 const struct ethoc_bd *bd)
245{ 246{
246 loff_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd)); 247 loff_t offset = ETHOC_BD_BASE + (index * sizeof(struct ethoc_bd));
@@ -248,33 +249,33 @@ static void ethoc_write_bd(struct ethoc *dev, int index,
248 ethoc_write(dev, offset + 4, bd->addr); 249 ethoc_write(dev, offset + 4, bd->addr);
249} 250}
250 251
251static void ethoc_enable_irq(struct ethoc *dev, u32 mask) 252static inline void ethoc_enable_irq(struct ethoc *dev, u32 mask)
252{ 253{
253 u32 imask = ethoc_read(dev, INT_MASK); 254 u32 imask = ethoc_read(dev, INT_MASK);
254 imask |= mask; 255 imask |= mask;
255 ethoc_write(dev, INT_MASK, imask); 256 ethoc_write(dev, INT_MASK, imask);
256} 257}
257 258
258static void ethoc_disable_irq(struct ethoc *dev, u32 mask) 259static inline void ethoc_disable_irq(struct ethoc *dev, u32 mask)
259{ 260{
260 u32 imask = ethoc_read(dev, INT_MASK); 261 u32 imask = ethoc_read(dev, INT_MASK);
261 imask &= ~mask; 262 imask &= ~mask;
262 ethoc_write(dev, INT_MASK, imask); 263 ethoc_write(dev, INT_MASK, imask);
263} 264}
264 265
265static void ethoc_ack_irq(struct ethoc *dev, u32 mask) 266static inline void ethoc_ack_irq(struct ethoc *dev, u32 mask)
266{ 267{
267 ethoc_write(dev, INT_SOURCE, mask); 268 ethoc_write(dev, INT_SOURCE, mask);
268} 269}
269 270
270static void ethoc_enable_rx_and_tx(struct ethoc *dev) 271static inline void ethoc_enable_rx_and_tx(struct ethoc *dev)
271{ 272{
272 u32 mode = ethoc_read(dev, MODER); 273 u32 mode = ethoc_read(dev, MODER);
273 mode |= MODER_RXEN | MODER_TXEN; 274 mode |= MODER_RXEN | MODER_TXEN;
274 ethoc_write(dev, MODER, mode); 275 ethoc_write(dev, MODER, mode);
275} 276}
276 277
277static void ethoc_disable_rx_and_tx(struct ethoc *dev) 278static inline void ethoc_disable_rx_and_tx(struct ethoc *dev)
278{ 279{
279 u32 mode = ethoc_read(dev, MODER); 280 u32 mode = ethoc_read(dev, MODER);
280 mode &= ~(MODER_RXEN | MODER_TXEN); 281 mode &= ~(MODER_RXEN | MODER_TXEN);
@@ -508,7 +509,7 @@ static irqreturn_t ethoc_interrupt(int irq, void *dev_id)
508 return IRQ_NONE; 509 return IRQ_NONE;
509 } 510 }
510 511
511 ethoc_ack_irq(priv, INT_MASK_ALL); 512 ethoc_ack_irq(priv, pending);
512 513
513 if (pending & INT_MASK_BUSY) { 514 if (pending & INT_MASK_BUSY) {
514 dev_err(&dev->dev, "packet dropped\n"); 515 dev_err(&dev->dev, "packet dropped\n");
@@ -664,7 +665,8 @@ static int ethoc_open(struct net_device *dev)
664 return ret; 665 return ret;
665 666
666 /* calculate the number of TX/RX buffers, maximum 128 supported */ 667 /* calculate the number of TX/RX buffers, maximum 128 supported */
667 num_bd = min(128, (dev->mem_end - dev->mem_start + 1) / ETHOC_BUFSIZ); 668 num_bd = min_t(unsigned int,
669 128, (dev->mem_end - dev->mem_start + 1) / ETHOC_BUFSIZ);
668 priv->num_tx = max(min_tx, num_bd / 4); 670 priv->num_tx = max(min_tx, num_bd / 4);
669 priv->num_rx = num_bd - priv->num_tx; 671 priv->num_rx = num_bd - priv->num_tx;
670 ethoc_write(priv, TX_BD_NUM, priv->num_tx); 672 ethoc_write(priv, TX_BD_NUM, priv->num_tx);
diff --git a/drivers/net/fec.c b/drivers/net/fec.c
index 29234380e6c6..16a1d58419d9 100644
--- a/drivers/net/fec.c
+++ b/drivers/net/fec.c
@@ -1654,7 +1654,7 @@ static const struct net_device_ops fec_netdev_ops = {
1654 * 1654 *
1655 * index is only used in legacy code 1655 * index is only used in legacy code
1656 */ 1656 */
1657int __init fec_enet_init(struct net_device *dev, int index) 1657static int fec_enet_init(struct net_device *dev, int index)
1658{ 1658{
1659 struct fec_enet_private *fep = netdev_priv(dev); 1659 struct fec_enet_private *fep = netdev_priv(dev);
1660 struct bufdesc *cbd_base; 1660 struct bufdesc *cbd_base;
diff --git a/drivers/net/fec_mpc52xx.c b/drivers/net/fec_mpc52xx.c
index c40113f58963..66dace6d324f 100644
--- a/drivers/net/fec_mpc52xx.c
+++ b/drivers/net/fec_mpc52xx.c
@@ -759,12 +759,6 @@ static void mpc52xx_fec_reset(struct net_device *dev)
759 759
760 mpc52xx_fec_hw_init(dev); 760 mpc52xx_fec_hw_init(dev);
761 761
762 if (priv->phydev) {
763 phy_stop(priv->phydev);
764 phy_write(priv->phydev, MII_BMCR, BMCR_RESET);
765 phy_start(priv->phydev);
766 }
767
768 bcom_fec_rx_reset(priv->rx_dmatsk); 762 bcom_fec_rx_reset(priv->rx_dmatsk);
769 bcom_fec_tx_reset(priv->tx_dmatsk); 763 bcom_fec_tx_reset(priv->tx_dmatsk);
770 764
diff --git a/drivers/net/fec_mpc52xx_phy.c b/drivers/net/fec_mpc52xx_phy.c
index 31e6d62b785d..ee0f3c6d3f88 100644
--- a/drivers/net/fec_mpc52xx_phy.c
+++ b/drivers/net/fec_mpc52xx_phy.c
@@ -155,6 +155,7 @@ static struct of_device_id mpc52xx_fec_mdio_match[] = {
155 { .compatible = "mpc5200b-fec-phy", }, 155 { .compatible = "mpc5200b-fec-phy", },
156 {} 156 {}
157}; 157};
158MODULE_DEVICE_TABLE(of, mpc52xx_fec_mdio_match);
158 159
159struct of_platform_driver mpc52xx_fec_mdio_driver = { 160struct of_platform_driver mpc52xx_fec_mdio_driver = {
160 .name = "mpc5200b-fec-phy", 161 .name = "mpc5200b-fec-phy",
diff --git a/drivers/net/forcedeth.c b/drivers/net/forcedeth.c
index e1da4666f204..3116601dbfea 100644
--- a/drivers/net/forcedeth.c
+++ b/drivers/net/forcedeth.c
@@ -5821,10 +5821,7 @@ static int __devinit nv_probe(struct pci_dev *pci_dev, const struct pci_device_i
5821 dev->dev_addr); 5821 dev->dev_addr);
5822 dev_printk(KERN_ERR, &pci_dev->dev, 5822 dev_printk(KERN_ERR, &pci_dev->dev,
5823 "Please complain to your hardware vendor. Switching to a random MAC.\n"); 5823 "Please complain to your hardware vendor. Switching to a random MAC.\n");
5824 dev->dev_addr[0] = 0x00; 5824 random_ether_addr(dev->dev_addr);
5825 dev->dev_addr[1] = 0x00;
5826 dev->dev_addr[2] = 0x6c;
5827 get_random_bytes(&dev->dev_addr[3], 3);
5828 } 5825 }
5829 5826
5830 dprintk(KERN_DEBUG "%s: MAC Address %pM\n", 5827 dprintk(KERN_DEBUG "%s: MAC Address %pM\n",
diff --git a/drivers/net/fs_enet/fs_enet-main.c b/drivers/net/fs_enet/fs_enet-main.c
index 2bc2d2b20644..ec2f5034457f 100644
--- a/drivers/net/fs_enet/fs_enet-main.c
+++ b/drivers/net/fs_enet/fs_enet-main.c
@@ -1110,6 +1110,7 @@ static struct of_device_id fs_enet_match[] = {
1110#endif 1110#endif
1111 {} 1111 {}
1112}; 1112};
1113MODULE_DEVICE_TABLE(of, fs_enet_match);
1113 1114
1114static struct of_platform_driver fs_enet_driver = { 1115static struct of_platform_driver fs_enet_driver = {
1115 .name = "fs_enet", 1116 .name = "fs_enet",
diff --git a/drivers/net/fs_enet/mii-bitbang.c b/drivers/net/fs_enet/mii-bitbang.c
index 93b481b0e3c7..24ff9f43a62b 100644
--- a/drivers/net/fs_enet/mii-bitbang.c
+++ b/drivers/net/fs_enet/mii-bitbang.c
@@ -221,6 +221,7 @@ static struct of_device_id fs_enet_mdio_bb_match[] = {
221 }, 221 },
222 {}, 222 {},
223}; 223};
224MODULE_DEVICE_TABLE(of, fs_enet_mdio_bb_match);
224 225
225static struct of_platform_driver fs_enet_bb_mdio_driver = { 226static struct of_platform_driver fs_enet_bb_mdio_driver = {
226 .name = "fsl-bb-mdio", 227 .name = "fsl-bb-mdio",
diff --git a/drivers/net/fs_enet/mii-fec.c b/drivers/net/fs_enet/mii-fec.c
index a2d69c1cd07e..96eba4280c5c 100644
--- a/drivers/net/fs_enet/mii-fec.c
+++ b/drivers/net/fs_enet/mii-fec.c
@@ -219,6 +219,7 @@ static struct of_device_id fs_enet_mdio_fec_match[] = {
219#endif 219#endif
220 {}, 220 {},
221}; 221};
222MODULE_DEVICE_TABLE(of, fs_enet_mdio_fec_match);
222 223
223static struct of_platform_driver fs_enet_fec_mdio_driver = { 224static struct of_platform_driver fs_enet_fec_mdio_driver = {
224 .name = "fsl-fec-mdio", 225 .name = "fsl-fec-mdio",
diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c
index d167090248e2..efbf67689eca 100644
--- a/drivers/net/fsl_pq_mdio.c
+++ b/drivers/net/fsl_pq_mdio.c
@@ -407,6 +407,7 @@ static struct of_device_id fsl_pq_mdio_match[] = {
407 }, 407 },
408 {}, 408 {},
409}; 409};
410MODULE_DEVICE_TABLE(of, fsl_pq_mdio_match);
410 411
411static struct of_platform_driver fsl_pq_mdio_driver = { 412static struct of_platform_driver fsl_pq_mdio_driver = {
412 .name = "fsl-pq_mdio", 413 .name = "fsl-pq_mdio",
@@ -426,3 +427,4 @@ void fsl_pq_mdio_exit(void)
426 of_unregister_platform_driver(&fsl_pq_mdio_driver); 427 of_unregister_platform_driver(&fsl_pq_mdio_driver);
427} 428}
428module_exit(fsl_pq_mdio_exit); 429module_exit(fsl_pq_mdio_exit);
430MODULE_LICENSE("GPL");
diff --git a/drivers/net/gianfar.c b/drivers/net/gianfar.c
index 1e5289ffef6f..5bf31f1509c9 100644
--- a/drivers/net/gianfar.c
+++ b/drivers/net/gianfar.c
@@ -2325,9 +2325,6 @@ static irqreturn_t gfar_error(int irq, void *dev_id)
2325 return IRQ_HANDLED; 2325 return IRQ_HANDLED;
2326} 2326}
2327 2327
2328/* work with hotplug and coldplug */
2329MODULE_ALIAS("platform:fsl-gianfar");
2330
2331static struct of_device_id gfar_match[] = 2328static struct of_device_id gfar_match[] =
2332{ 2329{
2333 { 2330 {
@@ -2336,6 +2333,7 @@ static struct of_device_id gfar_match[] =
2336 }, 2333 },
2337 {}, 2334 {},
2338}; 2335};
2336MODULE_DEVICE_TABLE(of, gfar_match);
2339 2337
2340/* Structure for a device driver */ 2338/* Structure for a device driver */
2341static struct of_platform_driver gfar_driver = { 2339static struct of_platform_driver gfar_driver = {
diff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c
index 89c82c5e63e4..3fae87559791 100644
--- a/drivers/net/ibm_newemac/core.c
+++ b/drivers/net/ibm_newemac/core.c
@@ -24,6 +24,7 @@
24 * 24 *
25 */ 25 */
26 26
27#include <linux/module.h>
27#include <linux/sched.h> 28#include <linux/sched.h>
28#include <linux/string.h> 29#include <linux/string.h>
29#include <linux/errno.h> 30#include <linux/errno.h>
@@ -443,7 +444,7 @@ static u32 __emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_s
443 ret |= EMAC_MR1_TFS_2K; 444 ret |= EMAC_MR1_TFS_2K;
444 break; 445 break;
445 default: 446 default:
446 printk(KERN_WARNING "%s: Unknown Rx FIFO size %d\n", 447 printk(KERN_WARNING "%s: Unknown Tx FIFO size %d\n",
447 dev->ndev->name, tx_size); 448 dev->ndev->name, tx_size);
448 } 449 }
449 450
@@ -470,6 +471,9 @@ static u32 __emac4_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_
470 DBG2(dev, "__emac4_calc_base_mr1" NL); 471 DBG2(dev, "__emac4_calc_base_mr1" NL);
471 472
472 switch(tx_size) { 473 switch(tx_size) {
474 case 16384:
475 ret |= EMAC4_MR1_TFS_16K;
476 break;
473 case 4096: 477 case 4096:
474 ret |= EMAC4_MR1_TFS_4K; 478 ret |= EMAC4_MR1_TFS_4K;
475 break; 479 break;
@@ -477,7 +481,7 @@ static u32 __emac4_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_
477 ret |= EMAC4_MR1_TFS_2K; 481 ret |= EMAC4_MR1_TFS_2K;
478 break; 482 break;
479 default: 483 default:
480 printk(KERN_WARNING "%s: Unknown Rx FIFO size %d\n", 484 printk(KERN_WARNING "%s: Unknown Tx FIFO size %d\n",
481 dev->ndev->name, tx_size); 485 dev->ndev->name, tx_size);
482 } 486 }
483 487
@@ -2985,6 +2989,7 @@ static struct of_device_id emac_match[] =
2985 }, 2989 },
2986 {}, 2990 {},
2987}; 2991};
2992MODULE_DEVICE_TABLE(of, emac_match);
2988 2993
2989static struct of_platform_driver emac_driver = { 2994static struct of_platform_driver emac_driver = {
2990 .name = "emac", 2995 .name = "emac",
diff --git a/drivers/net/ibm_newemac/emac.h b/drivers/net/ibm_newemac/emac.h
index 0afc2cf5c52b..8a61b597a169 100644
--- a/drivers/net/ibm_newemac/emac.h
+++ b/drivers/net/ibm_newemac/emac.h
@@ -153,6 +153,7 @@ struct emac_regs {
153#define EMAC4_MR1_RFS_16K 0x00280000 153#define EMAC4_MR1_RFS_16K 0x00280000
154#define EMAC4_MR1_TFS_2K 0x00020000 154#define EMAC4_MR1_TFS_2K 0x00020000
155#define EMAC4_MR1_TFS_4K 0x00030000 155#define EMAC4_MR1_TFS_4K 0x00030000
156#define EMAC4_MR1_TFS_16K 0x00050000
156#define EMAC4_MR1_TR 0x00008000 157#define EMAC4_MR1_TR 0x00008000
157#define EMAC4_MR1_MWSW_001 0x00001000 158#define EMAC4_MR1_MWSW_001 0x00001000
158#define EMAC4_MR1_JPSM 0x00000800 159#define EMAC4_MR1_JPSM 0x00000800
@@ -262,8 +263,8 @@ struct emac_regs {
262 263
263 264
264/* EMACx_TRTR */ 265/* EMACx_TRTR */
265#define EMAC_TRTR_SHIFT_EMAC4 27 266#define EMAC_TRTR_SHIFT_EMAC4 24
266#define EMAC_TRTR_SHIFT 24 267#define EMAC_TRTR_SHIFT 27
267 268
268/* EMAC specific TX descriptor control fields (write access) */ 269/* EMAC specific TX descriptor control fields (write access) */
269#define EMAC_TX_CTRL_GFCS 0x0200 270#define EMAC_TX_CTRL_GFCS 0x0200
diff --git a/drivers/net/ifb.c b/drivers/net/ifb.c
index 801f088c134f..030913f8bd26 100644
--- a/drivers/net/ifb.c
+++ b/drivers/net/ifb.c
@@ -98,12 +98,13 @@ static void ri_tasklet(unsigned long dev)
98 stats->tx_packets++; 98 stats->tx_packets++;
99 stats->tx_bytes +=skb->len; 99 stats->tx_bytes +=skb->len;
100 100
101 skb->dev = __dev_get_by_index(&init_net, skb->iif); 101 skb->dev = dev_get_by_index(&init_net, skb->iif);
102 if (!skb->dev) { 102 if (!skb->dev) {
103 dev_kfree_skb(skb); 103 dev_kfree_skb(skb);
104 stats->tx_dropped++; 104 stats->tx_dropped++;
105 break; 105 break;
106 } 106 }
107 dev_put(skb->dev);
107 skb->iif = _dev->ifindex; 108 skb->iif = _dev->ifindex;
108 109
109 if (from & AT_EGRESS) { 110 if (from & AT_EGRESS) {
diff --git a/drivers/net/igb/igb_ethtool.c b/drivers/net/igb/igb_ethtool.c
index deaea8fa1032..b243ed3b0c36 100644
--- a/drivers/net/igb/igb_ethtool.c
+++ b/drivers/net/igb/igb_ethtool.c
@@ -732,7 +732,7 @@ static int igb_set_ringparam(struct net_device *netdev,
732{ 732{
733 struct igb_adapter *adapter = netdev_priv(netdev); 733 struct igb_adapter *adapter = netdev_priv(netdev);
734 struct igb_ring *temp_ring; 734 struct igb_ring *temp_ring;
735 int i, err; 735 int i, err = 0;
736 u32 new_rx_count, new_tx_count; 736 u32 new_rx_count, new_tx_count;
737 737
738 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 738 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
@@ -752,18 +752,30 @@ static int igb_set_ringparam(struct net_device *netdev,
752 return 0; 752 return 0;
753 } 753 }
754 754
755 while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
756 msleep(1);
757
758 if (!netif_running(adapter->netdev)) {
759 for (i = 0; i < adapter->num_tx_queues; i++)
760 adapter->tx_ring[i].count = new_tx_count;
761 for (i = 0; i < adapter->num_rx_queues; i++)
762 adapter->rx_ring[i].count = new_rx_count;
763 adapter->tx_ring_count = new_tx_count;
764 adapter->rx_ring_count = new_rx_count;
765 goto clear_reset;
766 }
767
755 if (adapter->num_tx_queues > adapter->num_rx_queues) 768 if (adapter->num_tx_queues > adapter->num_rx_queues)
756 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring)); 769 temp_ring = vmalloc(adapter->num_tx_queues * sizeof(struct igb_ring));
757 else 770 else
758 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring)); 771 temp_ring = vmalloc(adapter->num_rx_queues * sizeof(struct igb_ring));
759 if (!temp_ring)
760 return -ENOMEM;
761 772
762 while (test_and_set_bit(__IGB_RESETTING, &adapter->state)) 773 if (!temp_ring) {
763 msleep(1); 774 err = -ENOMEM;
775 goto clear_reset;
776 }
764 777
765 if (netif_running(adapter->netdev)) 778 igb_down(adapter);
766 igb_down(adapter);
767 779
768 /* 780 /*
769 * We can't just free everything and then setup again, 781 * We can't just free everything and then setup again,
@@ -820,14 +832,11 @@ static int igb_set_ringparam(struct net_device *netdev,
820 832
821 adapter->rx_ring_count = new_rx_count; 833 adapter->rx_ring_count = new_rx_count;
822 } 834 }
823
824 err = 0;
825err_setup: 835err_setup:
826 if (netif_running(adapter->netdev)) 836 igb_up(adapter);
827 igb_up(adapter);
828
829 clear_bit(__IGB_RESETTING, &adapter->state);
830 vfree(temp_ring); 837 vfree(temp_ring);
838clear_reset:
839 clear_bit(__IGB_RESETTING, &adapter->state);
831 return err; 840 return err;
832} 841}
833 842
diff --git a/drivers/net/igbvf/ethtool.c b/drivers/net/igbvf/ethtool.c
index ee17a097d1ca..c68265bd0d1a 100644
--- a/drivers/net/igbvf/ethtool.c
+++ b/drivers/net/igbvf/ethtool.c
@@ -279,7 +279,7 @@ static int igbvf_set_ringparam(struct net_device *netdev,
279{ 279{
280 struct igbvf_adapter *adapter = netdev_priv(netdev); 280 struct igbvf_adapter *adapter = netdev_priv(netdev);
281 struct igbvf_ring *temp_ring; 281 struct igbvf_ring *temp_ring;
282 int err; 282 int err = 0;
283 u32 new_rx_count, new_tx_count; 283 u32 new_rx_count, new_tx_count;
284 284
285 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending)) 285 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
@@ -299,15 +299,22 @@ static int igbvf_set_ringparam(struct net_device *netdev,
299 return 0; 299 return 0;
300 } 300 }
301 301
302 temp_ring = vmalloc(sizeof(struct igbvf_ring));
303 if (!temp_ring)
304 return -ENOMEM;
305
306 while (test_and_set_bit(__IGBVF_RESETTING, &adapter->state)) 302 while (test_and_set_bit(__IGBVF_RESETTING, &adapter->state))
307 msleep(1); 303 msleep(1);
308 304
309 if (netif_running(adapter->netdev)) 305 if (!netif_running(adapter->netdev)) {
310 igbvf_down(adapter); 306 adapter->tx_ring->count = new_tx_count;
307 adapter->rx_ring->count = new_rx_count;
308 goto clear_reset;
309 }
310
311 temp_ring = vmalloc(sizeof(struct igbvf_ring));
312 if (!temp_ring) {
313 err = -ENOMEM;
314 goto clear_reset;
315 }
316
317 igbvf_down(adapter);
311 318
312 /* 319 /*
313 * We can't just free everything and then setup again, 320 * We can't just free everything and then setup again,
@@ -339,14 +346,11 @@ static int igbvf_set_ringparam(struct net_device *netdev,
339 346
340 memcpy(adapter->rx_ring, temp_ring,sizeof(struct igbvf_ring)); 347 memcpy(adapter->rx_ring, temp_ring,sizeof(struct igbvf_ring));
341 } 348 }
342
343 err = 0;
344err_setup: 349err_setup:
345 if (netif_running(adapter->netdev)) 350 igbvf_up(adapter);
346 igbvf_up(adapter);
347
348 clear_bit(__IGBVF_RESETTING, &adapter->state);
349 vfree(temp_ring); 351 vfree(temp_ring);
352clear_reset:
353 clear_bit(__IGBVF_RESETTING, &adapter->state);
350 return err; 354 return err;
351} 355}
352 356
diff --git a/drivers/net/irda/sa1100_ir.c b/drivers/net/irda/sa1100_ir.c
index 38bf7cf2256d..c412e8026173 100644
--- a/drivers/net/irda/sa1100_ir.c
+++ b/drivers/net/irda/sa1100_ir.c
@@ -232,8 +232,11 @@ static int sa1100_irda_startup(struct sa1100_irda *si)
232 /* 232 /*
233 * Ensure that the ports for this device are setup correctly. 233 * Ensure that the ports for this device are setup correctly.
234 */ 234 */
235 if (si->pdata->startup) 235 if (si->pdata->startup) {
236 si->pdata->startup(si->dev); 236 ret = si->pdata->startup(si->dev);
237 if (ret)
238 return ret;
239 }
237 240
238 /* 241 /*
239 * Configure PPC for IRDA - we want to drive TXD2 low. 242 * Configure PPC for IRDA - we want to drive TXD2 low.
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c
index fa314cb005a4..856c18c207f3 100644
--- a/drivers/net/ixgbe/ixgbe_ethtool.c
+++ b/drivers/net/ixgbe/ixgbe_ethtool.c
@@ -798,7 +798,7 @@ static int ixgbe_set_ringparam(struct net_device *netdev,
798{ 798{
799 struct ixgbe_adapter *adapter = netdev_priv(netdev); 799 struct ixgbe_adapter *adapter = netdev_priv(netdev);
800 struct ixgbe_ring *temp_tx_ring, *temp_rx_ring; 800 struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
801 int i, err; 801 int i, err = 0;
802 u32 new_rx_count, new_tx_count; 802 u32 new_rx_count, new_tx_count;
803 bool need_update = false; 803 bool need_update = false;
804 804
@@ -822,6 +822,16 @@ static int ixgbe_set_ringparam(struct net_device *netdev,
822 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state)) 822 while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
823 msleep(1); 823 msleep(1);
824 824
825 if (!netif_running(adapter->netdev)) {
826 for (i = 0; i < adapter->num_tx_queues; i++)
827 adapter->tx_ring[i].count = new_tx_count;
828 for (i = 0; i < adapter->num_rx_queues; i++)
829 adapter->rx_ring[i].count = new_rx_count;
830 adapter->tx_ring_count = new_tx_count;
831 adapter->rx_ring_count = new_rx_count;
832 goto err_setup;
833 }
834
825 temp_tx_ring = kcalloc(adapter->num_tx_queues, 835 temp_tx_ring = kcalloc(adapter->num_tx_queues,
826 sizeof(struct ixgbe_ring), GFP_KERNEL); 836 sizeof(struct ixgbe_ring), GFP_KERNEL);
827 if (!temp_tx_ring) { 837 if (!temp_tx_ring) {
@@ -879,8 +889,7 @@ static int ixgbe_set_ringparam(struct net_device *netdev,
879 889
880 /* if rings need to be updated, here's the place to do it in one shot */ 890 /* if rings need to be updated, here's the place to do it in one shot */
881 if (need_update) { 891 if (need_update) {
882 if (netif_running(netdev)) 892 ixgbe_down(adapter);
883 ixgbe_down(adapter);
884 893
885 /* tx */ 894 /* tx */
886 if (new_tx_count != adapter->tx_ring_count) { 895 if (new_tx_count != adapter->tx_ring_count) {
@@ -897,13 +906,8 @@ static int ixgbe_set_ringparam(struct net_device *netdev,
897 temp_rx_ring = NULL; 906 temp_rx_ring = NULL;
898 adapter->rx_ring_count = new_rx_count; 907 adapter->rx_ring_count = new_rx_count;
899 } 908 }
900 }
901
902 /* success! */
903 err = 0;
904 if (netif_running(netdev))
905 ixgbe_up(adapter); 909 ixgbe_up(adapter);
906 910 }
907err_setup: 911err_setup:
908 clear_bit(__IXGBE_RESETTING, &adapter->state); 912 clear_bit(__IXGBE_RESETTING, &adapter->state);
909 return err; 913 return err;
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index cbb143ca1eb8..a5036f7c1923 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -44,6 +44,7 @@
44 44
45#include "ixgbe.h" 45#include "ixgbe.h"
46#include "ixgbe_common.h" 46#include "ixgbe_common.h"
47#include "ixgbe_dcb_82599.h"
47 48
48char ixgbe_driver_name[] = "ixgbe"; 49char ixgbe_driver_name[] = "ixgbe";
49static const char ixgbe_driver_string[] = 50static const char ixgbe_driver_string[] =
@@ -226,6 +227,56 @@ static void ixgbe_unmap_and_free_tx_resource(struct ixgbe_adapter *adapter,
226 /* tx_buffer_info must be completely set up in the transmit path */ 227 /* tx_buffer_info must be completely set up in the transmit path */
227} 228}
228 229
230/**
231 * ixgbe_tx_is_paused - check if the tx ring is paused
232 * @adapter: the ixgbe adapter
233 * @tx_ring: the corresponding tx_ring
234 *
235 * If not in DCB mode, checks TFCS.TXOFF, otherwise, find out the
236 * corresponding TC of this tx_ring when checking TFCS.
237 *
238 * Returns : true if paused
239 */
240static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
241 struct ixgbe_ring *tx_ring)
242{
243 int tc;
244 u32 txoff = IXGBE_TFCS_TXOFF;
245
246#ifdef CONFIG_IXGBE_DCB
247 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
248 int reg_idx = tx_ring->reg_idx;
249 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
250
251 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
252 tc = reg_idx >> 2;
253 txoff = IXGBE_TFCS_TXOFF0;
254 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
255 tc = 0;
256 txoff = IXGBE_TFCS_TXOFF;
257 if (dcb_i == 8) {
258 /* TC0, TC1 */
259 tc = reg_idx >> 5;
260 if (tc == 2) /* TC2, TC3 */
261 tc += (reg_idx - 64) >> 4;
262 else if (tc == 3) /* TC4, TC5, TC6, TC7 */
263 tc += 1 + ((reg_idx - 96) >> 3);
264 } else if (dcb_i == 4) {
265 /* TC0, TC1 */
266 tc = reg_idx >> 6;
267 if (tc == 1) {
268 tc += (reg_idx - 64) >> 5;
269 if (tc == 2) /* TC2, TC3 */
270 tc += (reg_idx - 96) >> 4;
271 }
272 }
273 }
274 txoff <<= tc;
275 }
276#endif
277 return IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & txoff;
278}
279
229static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter, 280static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
230 struct ixgbe_ring *tx_ring, 281 struct ixgbe_ring *tx_ring,
231 unsigned int eop) 282 unsigned int eop)
@@ -237,7 +288,7 @@ static inline bool ixgbe_check_tx_hang(struct ixgbe_adapter *adapter,
237 adapter->detect_tx_hung = false; 288 adapter->detect_tx_hung = false;
238 if (tx_ring->tx_buffer_info[eop].time_stamp && 289 if (tx_ring->tx_buffer_info[eop].time_stamp &&
239 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) && 290 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ) &&
240 !(IXGBE_READ_REG(&adapter->hw, IXGBE_TFCS) & IXGBE_TFCS_TXOFF)) { 291 !ixgbe_tx_is_paused(adapter, tx_ring)) {
241 /* detected Tx unit hang */ 292 /* detected Tx unit hang */
242 union ixgbe_adv_tx_desc *tx_desc; 293 union ixgbe_adv_tx_desc *tx_desc;
243 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop); 294 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
@@ -412,19 +463,23 @@ static void ixgbe_update_tx_dca(struct ixgbe_adapter *adapter,
412 u32 txctrl; 463 u32 txctrl;
413 int cpu = get_cpu(); 464 int cpu = get_cpu();
414 int q = tx_ring - adapter->tx_ring; 465 int q = tx_ring - adapter->tx_ring;
466 struct ixgbe_hw *hw = &adapter->hw;
415 467
416 if (tx_ring->cpu != cpu) { 468 if (tx_ring->cpu != cpu) {
417 txctrl = IXGBE_READ_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q));
418 if (adapter->hw.mac.type == ixgbe_mac_82598EB) { 469 if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
470 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(q));
419 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK; 471 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK;
420 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu); 472 txctrl |= dca3_get_tag(&adapter->pdev->dev, cpu);
473 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
474 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(q), txctrl);
421 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) { 475 } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
476 txctrl = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(q));
422 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599; 477 txctrl &= ~IXGBE_DCA_TXCTRL_CPUID_MASK_82599;
423 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) << 478 txctrl |= (dca3_get_tag(&adapter->pdev->dev, cpu) <<
424 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599); 479 IXGBE_DCA_TXCTRL_CPUID_SHIFT_82599);
480 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
481 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(q), txctrl);
425 } 482 }
426 txctrl |= IXGBE_DCA_TXCTRL_DESC_DCA_EN;
427 IXGBE_WRITE_REG(&adapter->hw, IXGBE_DCA_TXCTRL(q), txctrl);
428 tx_ring->cpu = cpu; 483 tx_ring->cpu = cpu;
429 } 484 }
430 put_cpu(); 485 put_cpu();
@@ -1913,11 +1968,25 @@ static void ixgbe_configure_tx(struct ixgbe_adapter *adapter)
1913 break; 1968 break;
1914 } 1969 }
1915 } 1970 }
1971
1916 if (hw->mac.type == ixgbe_mac_82599EB) { 1972 if (hw->mac.type == ixgbe_mac_82599EB) {
1973 u32 rttdcs;
1974
1975 /* disable the arbiter while setting MTQC */
1976 rttdcs = IXGBE_READ_REG(hw, IXGBE_RTTDCS);
1977 rttdcs |= IXGBE_RTTDCS_ARBDIS;
1978 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
1979
1917 /* We enable 8 traffic classes, DCB only */ 1980 /* We enable 8 traffic classes, DCB only */
1918 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) 1981 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
1919 IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA | 1982 IXGBE_WRITE_REG(hw, IXGBE_MTQC, (IXGBE_MTQC_RT_ENA |
1920 IXGBE_MTQC_8TC_8TQ)); 1983 IXGBE_MTQC_8TC_8TQ));
1984 else
1985 IXGBE_WRITE_REG(hw, IXGBE_MTQC, IXGBE_MTQC_64Q_1PB);
1986
1987 /* re-eable the arbiter */
1988 rttdcs &= ~IXGBE_RTTDCS_ARBDIS;
1989 IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, rttdcs);
1921 } 1990 }
1922} 1991}
1923 1992
@@ -2471,7 +2540,10 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter)
2471 ixgbe_restore_vlan(adapter); 2540 ixgbe_restore_vlan(adapter);
2472#ifdef CONFIG_IXGBE_DCB 2541#ifdef CONFIG_IXGBE_DCB
2473 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) { 2542 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2474 netif_set_gso_max_size(netdev, 32768); 2543 if (hw->mac.type == ixgbe_mac_82598EB)
2544 netif_set_gso_max_size(netdev, 32768);
2545 else
2546 netif_set_gso_max_size(netdev, 65536);
2475 ixgbe_configure_dcb(adapter); 2547 ixgbe_configure_dcb(adapter);
2476 } else { 2548 } else {
2477 netif_set_gso_max_size(netdev, 65536); 2549 netif_set_gso_max_size(netdev, 65536);
@@ -5922,6 +5994,7 @@ static pci_ers_result_t ixgbe_io_slot_reset(struct pci_dev *pdev)
5922 } else { 5994 } else {
5923 pci_set_master(pdev); 5995 pci_set_master(pdev);
5924 pci_restore_state(pdev); 5996 pci_restore_state(pdev);
5997 pci_save_state(pdev);
5925 5998
5926 pci_wake_from_d3(pdev, false); 5999 pci_wake_from_d3(pdev, false);
5927 6000
diff --git a/drivers/net/ixp2000/enp2611.c b/drivers/net/ixp2000/enp2611.c
index b02a981c87a8..34a6cfd17930 100644
--- a/drivers/net/ixp2000/enp2611.c
+++ b/drivers/net/ixp2000/enp2611.c
@@ -119,24 +119,9 @@ static struct ixp2400_msf_parameters enp2611_msf_parameters =
119 } 119 }
120}; 120};
121 121
122struct enp2611_ixpdev_priv
123{
124 struct ixpdev_priv ixpdev_priv;
125 struct net_device_stats stats;
126};
127
128static struct net_device *nds[3]; 122static struct net_device *nds[3];
129static struct timer_list link_check_timer; 123static struct timer_list link_check_timer;
130 124
131static struct net_device_stats *enp2611_get_stats(struct net_device *dev)
132{
133 struct enp2611_ixpdev_priv *ip = netdev_priv(dev);
134
135 pm3386_get_stats(ip->ixpdev_priv.channel, &(ip->stats));
136
137 return &(ip->stats);
138}
139
140/* @@@ Poll the SFP moddef0 line too. */ 125/* @@@ Poll the SFP moddef0 line too. */
141/* @@@ Try to use the pm3386 DOOL interrupt as well. */ 126/* @@@ Try to use the pm3386 DOOL interrupt as well. */
142static void enp2611_check_link_status(unsigned long __dummy) 127static void enp2611_check_link_status(unsigned long __dummy)
@@ -203,14 +188,13 @@ static int __init enp2611_init_module(void)
203 188
204 ports = pm3386_port_count(); 189 ports = pm3386_port_count();
205 for (i = 0; i < ports; i++) { 190 for (i = 0; i < ports; i++) {
206 nds[i] = ixpdev_alloc(i, sizeof(struct enp2611_ixpdev_priv)); 191 nds[i] = ixpdev_alloc(i, sizeof(struct ixpdev_priv));
207 if (nds[i] == NULL) { 192 if (nds[i] == NULL) {
208 while (--i >= 0) 193 while (--i >= 0)
209 free_netdev(nds[i]); 194 free_netdev(nds[i]);
210 return -ENOMEM; 195 return -ENOMEM;
211 } 196 }
212 197
213 nds[i]->get_stats = enp2611_get_stats;
214 pm3386_init_port(i); 198 pm3386_init_port(i);
215 pm3386_get_mac(i, nds[i]->dev_addr); 199 pm3386_get_mac(i, nds[i]->dev_addr);
216 } 200 }
diff --git a/drivers/net/ixp2000/ixpdev.c b/drivers/net/ixp2000/ixpdev.c
index 127243461a51..9aee0cc922c9 100644
--- a/drivers/net/ixp2000/ixpdev.c
+++ b/drivers/net/ixp2000/ixpdev.c
@@ -21,6 +21,7 @@
21#include "ixp2400_tx.ucode" 21#include "ixp2400_tx.ucode"
22#include "ixpdev_priv.h" 22#include "ixpdev_priv.h"
23#include "ixpdev.h" 23#include "ixpdev.h"
24#include "pm3386.h"
24 25
25#define DRV_MODULE_VERSION "0.2" 26#define DRV_MODULE_VERSION "0.2"
26 27
@@ -271,6 +272,15 @@ static int ixpdev_close(struct net_device *dev)
271 return 0; 272 return 0;
272} 273}
273 274
275static struct net_device_stats *ixpdev_get_stats(struct net_device *dev)
276{
277 struct ixpdev_priv *ip = netdev_priv(dev);
278
279 pm3386_get_stats(ip->channel, &(dev->stats));
280
281 return &(dev->stats);
282}
283
274static const struct net_device_ops ixpdev_netdev_ops = { 284static const struct net_device_ops ixpdev_netdev_ops = {
275 .ndo_open = ixpdev_open, 285 .ndo_open = ixpdev_open,
276 .ndo_stop = ixpdev_close, 286 .ndo_stop = ixpdev_close,
@@ -278,6 +288,7 @@ static const struct net_device_ops ixpdev_netdev_ops = {
278 .ndo_change_mtu = eth_change_mtu, 288 .ndo_change_mtu = eth_change_mtu,
279 .ndo_validate_addr = eth_validate_addr, 289 .ndo_validate_addr = eth_validate_addr,
280 .ndo_set_mac_address = eth_mac_addr, 290 .ndo_set_mac_address = eth_mac_addr,
291 .ndo_get_stats = ixpdev_get_stats,
281#ifdef CONFIG_NET_POLL_CONTROLLER 292#ifdef CONFIG_NET_POLL_CONTROLLER
282 .ndo_poll_controller = ixpdev_poll_controller, 293 .ndo_poll_controller = ixpdev_poll_controller,
283#endif 294#endif
diff --git a/drivers/net/ks8851.c b/drivers/net/ks8851.c
index 237835864357..a23f739d222f 100644
--- a/drivers/net/ks8851.c
+++ b/drivers/net/ks8851.c
@@ -171,6 +171,36 @@ static void ks8851_wrreg16(struct ks8851_net *ks, unsigned reg, unsigned val)
171} 171}
172 172
173/** 173/**
174 * ks8851_wrreg8 - write 8bit register value to chip
175 * @ks: The chip state
176 * @reg: The register address
177 * @val: The value to write
178 *
179 * Issue a write to put the value @val into the register specified in @reg.
180 */
181static void ks8851_wrreg8(struct ks8851_net *ks, unsigned reg, unsigned val)
182{
183 struct spi_transfer *xfer = &ks->spi_xfer1;
184 struct spi_message *msg = &ks->spi_msg1;
185 __le16 txb[2];
186 int ret;
187 int bit;
188
189 bit = 1 << (reg & 3);
190
191 txb[0] = cpu_to_le16(MK_OP(bit, reg) | KS_SPIOP_WR);
192 txb[1] = val;
193
194 xfer->tx_buf = txb;
195 xfer->rx_buf = NULL;
196 xfer->len = 3;
197
198 ret = spi_sync(ks->spidev, msg);
199 if (ret < 0)
200 ks_err(ks, "spi_sync() failed\n");
201}
202
203/**
174 * ks8851_rx_1msg - select whether to use one or two messages for spi read 204 * ks8851_rx_1msg - select whether to use one or two messages for spi read
175 * @ks: The device structure 205 * @ks: The device structure
176 * 206 *
@@ -322,13 +352,12 @@ static void ks8851_soft_reset(struct ks8851_net *ks, unsigned op)
322static int ks8851_write_mac_addr(struct net_device *dev) 352static int ks8851_write_mac_addr(struct net_device *dev)
323{ 353{
324 struct ks8851_net *ks = netdev_priv(dev); 354 struct ks8851_net *ks = netdev_priv(dev);
325 u16 *mcp = (u16 *)dev->dev_addr; 355 int i;
326 356
327 mutex_lock(&ks->lock); 357 mutex_lock(&ks->lock);
328 358
329 ks8851_wrreg16(ks, KS_MARL, mcp[0]); 359 for (i = 0; i < ETH_ALEN; i++)
330 ks8851_wrreg16(ks, KS_MARM, mcp[1]); 360 ks8851_wrreg8(ks, KS_MAR(i), dev->dev_addr[i]);
331 ks8851_wrreg16(ks, KS_MARH, mcp[2]);
332 361
333 mutex_unlock(&ks->lock); 362 mutex_unlock(&ks->lock);
334 363
@@ -951,7 +980,7 @@ static void ks8851_set_rx_mode(struct net_device *dev)
951 mcptr = mcptr->next; 980 mcptr = mcptr->next;
952 } 981 }
953 982
954 rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXAE | RXCR1_RXPAFMA; 983 rxctrl.rxcr1 = RXCR1_RXME | RXCR1_RXPAFMA;
955 } else { 984 } else {
956 /* just accept broadcast / unicast */ 985 /* just accept broadcast / unicast */
957 rxctrl.rxcr1 = RXCR1_RXPAFMA; 986 rxctrl.rxcr1 = RXCR1_RXPAFMA;
@@ -1239,6 +1268,9 @@ static int __devinit ks8851_probe(struct spi_device *spi)
1239 ndev->netdev_ops = &ks8851_netdev_ops; 1268 ndev->netdev_ops = &ks8851_netdev_ops;
1240 ndev->irq = spi->irq; 1269 ndev->irq = spi->irq;
1241 1270
1271 /* issue a global soft reset to reset the device. */
1272 ks8851_soft_reset(ks, GRR_GSR);
1273
1242 /* simple check for a valid chip being connected to the bus */ 1274 /* simple check for a valid chip being connected to the bus */
1243 1275
1244 if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) { 1276 if ((ks8851_rdreg16(ks, KS_CIDER) & ~CIDER_REV_MASK) != CIDER_ID) {
diff --git a/drivers/net/ks8851.h b/drivers/net/ks8851.h
index 85abe147afbf..f52c312cc356 100644
--- a/drivers/net/ks8851.h
+++ b/drivers/net/ks8851.h
@@ -16,6 +16,7 @@
16#define CCR_32PIN (1 << 0) 16#define CCR_32PIN (1 << 0)
17 17
18/* MAC address registers */ 18/* MAC address registers */
19#define KS_MAR(_m) 0x15 - (_m)
19#define KS_MARL 0x10 20#define KS_MARL 0x10
20#define KS_MARM 0x12 21#define KS_MARM 0x12
21#define KS_MARH 0x14 22#define KS_MARH 0x14
diff --git a/drivers/net/macsonic.c b/drivers/net/macsonic.c
index 61eabcac734c..b3d7d8d77f46 100644
--- a/drivers/net/macsonic.c
+++ b/drivers/net/macsonic.c
@@ -223,69 +223,73 @@ static int __devinit macsonic_init(struct net_device *dev)
223 return 0; 223 return 0;
224} 224}
225 225
226static int __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev) 226#define INVALID_MAC(mac) (memcmp(mac, "\x08\x00\x07", 3) && \
227 memcmp(mac, "\x00\xA0\x40", 3) && \
228 memcmp(mac, "\x00\x80\x19", 3) && \
229 memcmp(mac, "\x00\x05\x02", 3))
230
231static void __devinit mac_onboard_sonic_ethernet_addr(struct net_device *dev)
227{ 232{
228 struct sonic_local *lp = netdev_priv(dev); 233 struct sonic_local *lp = netdev_priv(dev);
229 const int prom_addr = ONBOARD_SONIC_PROM_BASE; 234 const int prom_addr = ONBOARD_SONIC_PROM_BASE;
230 int i; 235 unsigned short val;
231 236
232 /* On NuBus boards we can sometimes look in the ROM resources. 237 /*
233 No such luck for comm-slot/onboard. */ 238 * On NuBus boards we can sometimes look in the ROM resources.
234 for(i = 0; i < 6; i++) 239 * No such luck for comm-slot/onboard.
235 dev->dev_addr[i] = SONIC_READ_PROM(i); 240 * On the PowerBook 520, the PROM base address is a mystery.
241 */
242 if (hwreg_present((void *)prom_addr)) {
243 int i;
244
245 for (i = 0; i < 6; i++)
246 dev->dev_addr[i] = SONIC_READ_PROM(i);
247 if (!INVALID_MAC(dev->dev_addr))
248 return;
236 249
237 /* Most of the time, the address is bit-reversed. The NetBSD 250 /*
238 source has a rather long and detailed historical account of 251 * Most of the time, the address is bit-reversed. The NetBSD
239 why this is so. */ 252 * source has a rather long and detailed historical account of
240 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) && 253 * why this is so.
241 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) && 254 */
242 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
243 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
244 bit_reverse_addr(dev->dev_addr); 255 bit_reverse_addr(dev->dev_addr);
245 else 256 if (!INVALID_MAC(dev->dev_addr))
246 return 0; 257 return;
247 258
248 /* If we still have what seems to be a bogus address, we'll
249 look in the CAM. The top entry should be ours. */
250 /* Danger! This only works if MacOS has already initialized
251 the card... */
252 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) &&
253 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) &&
254 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
255 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
256 {
257 unsigned short val;
258
259 printk(KERN_INFO "macsonic: PROM seems to be wrong, trying CAM entry 15\n");
260
261 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
262 SONIC_WRITE(SONIC_CEP, 15);
263
264 val = SONIC_READ(SONIC_CAP2);
265 dev->dev_addr[5] = val >> 8;
266 dev->dev_addr[4] = val & 0xff;
267 val = SONIC_READ(SONIC_CAP1);
268 dev->dev_addr[3] = val >> 8;
269 dev->dev_addr[2] = val & 0xff;
270 val = SONIC_READ(SONIC_CAP0);
271 dev->dev_addr[1] = val >> 8;
272 dev->dev_addr[0] = val & 0xff;
273
274 printk(KERN_INFO "HW Address from CAM 15: %pM\n",
275 dev->dev_addr);
276 } else return 0;
277
278 if (memcmp(dev->dev_addr, "\x08\x00\x07", 3) &&
279 memcmp(dev->dev_addr, "\x00\xA0\x40", 3) &&
280 memcmp(dev->dev_addr, "\x00\x80\x19", 3) &&
281 memcmp(dev->dev_addr, "\x00\x05\x02", 3))
282 {
283 /* 259 /*
284 * Still nonsense ... messed up someplace! 260 * If we still have what seems to be a bogus address, we'll
261 * look in the CAM. The top entry should be ours.
285 */ 262 */
286 printk(KERN_ERR "macsonic: ERROR (INVALID MAC)\n"); 263 printk(KERN_WARNING "macsonic: MAC address in PROM seems "
287 return -EIO; 264 "to be invalid, trying CAM\n");
288 } else return 0; 265 } else {
266 printk(KERN_WARNING "macsonic: cannot read MAC address from "
267 "PROM, trying CAM\n");
268 }
269
270 /* This only works if MacOS has already initialized the card. */
271
272 SONIC_WRITE(SONIC_CMD, SONIC_CR_RST);
273 SONIC_WRITE(SONIC_CEP, 15);
274
275 val = SONIC_READ(SONIC_CAP2);
276 dev->dev_addr[5] = val >> 8;
277 dev->dev_addr[4] = val & 0xff;
278 val = SONIC_READ(SONIC_CAP1);
279 dev->dev_addr[3] = val >> 8;
280 dev->dev_addr[2] = val & 0xff;
281 val = SONIC_READ(SONIC_CAP0);
282 dev->dev_addr[1] = val >> 8;
283 dev->dev_addr[0] = val & 0xff;
284
285 if (!INVALID_MAC(dev->dev_addr))
286 return;
287
288 /* Still nonsense ... messed up someplace! */
289
290 printk(KERN_WARNING "macsonic: MAC address in CAM entry 15 "
291 "seems invalid, will use a random MAC\n");
292 random_ether_addr(dev->dev_addr);
289} 293}
290 294
291static int __devinit mac_onboard_sonic_probe(struct net_device *dev) 295static int __devinit mac_onboard_sonic_probe(struct net_device *dev)
@@ -402,8 +406,7 @@ static int __devinit mac_onboard_sonic_probe(struct net_device *dev)
402 SONIC_WRITE(SONIC_ISR, 0x7fff); 406 SONIC_WRITE(SONIC_ISR, 0x7fff);
403 407
404 /* Now look for the MAC address. */ 408 /* Now look for the MAC address. */
405 if (mac_onboard_sonic_ethernet_addr(dev) != 0) 409 mac_onboard_sonic_ethernet_addr(dev);
406 return -ENODEV;
407 410
408 /* Shared init code */ 411 /* Shared init code */
409 return macsonic_init(dev); 412 return macsonic_init(dev);
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c
index 5dd7225b178e..291a505fd4fc 100644
--- a/drivers/net/mlx4/main.c
+++ b/drivers/net/mlx4/main.c
@@ -1282,6 +1282,7 @@ static struct pci_device_id mlx4_pci_table[] = {
1282 { PCI_VDEVICE(MELLANOX, 0x6372) }, /* MT25458 ConnectX EN 10GBASE-T 10GigE */ 1282 { PCI_VDEVICE(MELLANOX, 0x6372) }, /* MT25458 ConnectX EN 10GBASE-T 10GigE */
1283 { PCI_VDEVICE(MELLANOX, 0x675a) }, /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */ 1283 { PCI_VDEVICE(MELLANOX, 0x675a) }, /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
1284 { PCI_VDEVICE(MELLANOX, 0x6764) }, /* MT26468 ConnectX EN 10GigE PCIe gen2*/ 1284 { PCI_VDEVICE(MELLANOX, 0x6764) }, /* MT26468 ConnectX EN 10GigE PCIe gen2*/
1285 { PCI_VDEVICE(MELLANOX, 0x6746) }, /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
1285 { PCI_VDEVICE(MELLANOX, 0x676e) }, /* MT26478 ConnectX2 40GigE PCIe gen2 */ 1286 { PCI_VDEVICE(MELLANOX, 0x676e) }, /* MT26478 ConnectX2 40GigE PCIe gen2 */
1286 { 0, } 1287 { 0, }
1287}; 1288};
diff --git a/drivers/net/myri10ge/myri10ge.c b/drivers/net/myri10ge/myri10ge.c
index 6930c87f362e..f3624517cb0e 100644
--- a/drivers/net/myri10ge/myri10ge.c
+++ b/drivers/net/myri10ge/myri10ge.c
@@ -75,7 +75,7 @@
75#include "myri10ge_mcp.h" 75#include "myri10ge_mcp.h"
76#include "myri10ge_mcp_gen_header.h" 76#include "myri10ge_mcp_gen_header.h"
77 77
78#define MYRI10GE_VERSION_STR "1.5.0-1.432" 78#define MYRI10GE_VERSION_STR "1.5.1-1.451"
79 79
80MODULE_DESCRIPTION("Myricom 10G driver (10GbE)"); 80MODULE_DESCRIPTION("Myricom 10G driver (10GbE)");
81MODULE_AUTHOR("Maintainer: help@myri.com"); 81MODULE_AUTHOR("Maintainer: help@myri.com");
@@ -1624,10 +1624,21 @@ myri10ge_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
1624 return 0; 1624 return 0;
1625 } 1625 }
1626 } 1626 }
1627 if (*ptr == 'R' || *ptr == 'Q') { 1627 if (*ptr == '2')
1628 /* We've found either an XFP or quad ribbon fiber */ 1628 ptr++;
1629 if (*ptr == 'R' || *ptr == 'Q' || *ptr == 'S') {
1630 /* We've found either an XFP, quad ribbon fiber, or SFP+ */
1629 cmd->port = PORT_FIBRE; 1631 cmd->port = PORT_FIBRE;
1632 cmd->supported |= SUPPORTED_FIBRE;
1633 cmd->advertising |= ADVERTISED_FIBRE;
1634 } else {
1635 cmd->port = PORT_OTHER;
1630 } 1636 }
1637 if (*ptr == 'R' || *ptr == 'S')
1638 cmd->transceiver = XCVR_EXTERNAL;
1639 else
1640 cmd->transceiver = XCVR_INTERNAL;
1641
1631 return 0; 1642 return 0;
1632} 1643}
1633 1644
diff --git a/drivers/net/netxen/netxen_nic_hdr.h b/drivers/net/netxen/netxen_nic_hdr.h
index 7a7177421d7c..1c46da632125 100644
--- a/drivers/net/netxen/netxen_nic_hdr.h
+++ b/drivers/net/netxen/netxen_nic_hdr.h
@@ -419,6 +419,7 @@ enum {
419#define NETXEN_CRB_ROMUSB \ 419#define NETXEN_CRB_ROMUSB \
420 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_ROMUSB) 420 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_ROMUSB)
421#define NETXEN_CRB_I2Q NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2Q) 421#define NETXEN_CRB_I2Q NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2Q)
422#define NETXEN_CRB_I2C0 NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_I2C0)
422#define NETXEN_CRB_SMB NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_SMB) 423#define NETXEN_CRB_SMB NETXEN_PCI_CRB_WINDOW(NETXEN_HW_PX_MAP_CRB_SMB)
423#define NETXEN_CRB_MAX NETXEN_PCI_CRB_WINDOW(64) 424#define NETXEN_CRB_MAX NETXEN_PCI_CRB_WINDOW(64)
424 425
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 32314000dfcd..3185a98b0917 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -1901,22 +1901,16 @@ netxen_setup_hwops(struct netxen_adapter *adapter)
1901 1901
1902int netxen_nic_get_board_info(struct netxen_adapter *adapter) 1902int netxen_nic_get_board_info(struct netxen_adapter *adapter)
1903{ 1903{
1904 int offset, board_type, magic, header_version; 1904 int offset, board_type, magic;
1905 struct pci_dev *pdev = adapter->pdev; 1905 struct pci_dev *pdev = adapter->pdev;
1906 1906
1907 offset = NX_FW_MAGIC_OFFSET; 1907 offset = NX_FW_MAGIC_OFFSET;
1908 if (netxen_rom_fast_read(adapter, offset, &magic)) 1908 if (netxen_rom_fast_read(adapter, offset, &magic))
1909 return -EIO; 1909 return -EIO;
1910 1910
1911 offset = NX_HDR_VERSION_OFFSET; 1911 if (magic != NETXEN_BDINFO_MAGIC) {
1912 if (netxen_rom_fast_read(adapter, offset, &header_version)) 1912 dev_err(&pdev->dev, "invalid board config, magic=%08x\n",
1913 return -EIO; 1913 magic);
1914
1915 if (magic != NETXEN_BDINFO_MAGIC ||
1916 header_version != NETXEN_BDINFO_VERSION) {
1917 dev_err(&pdev->dev,
1918 "invalid board config, magic=%08x, version=%08x\n",
1919 magic, header_version);
1920 return -EIO; 1914 return -EIO;
1921 } 1915 }
1922 1916
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index 91c2bc61c8eb..e40b914d6faf 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -531,6 +531,8 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
531 continue; 531 continue;
532 532
533 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) { 533 if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
534 if (off == (NETXEN_CRB_I2C0 + 0x1c))
535 continue;
534 /* do not reset PCI */ 536 /* do not reset PCI */
535 if (off == (ROMUSB_GLB + 0xbc)) 537 if (off == (ROMUSB_GLB + 0xbc))
536 continue; 538 continue;
@@ -553,12 +555,6 @@ int netxen_pinit_from_rom(struct netxen_adapter *adapter, int verbose)
553 continue; 555 continue;
554 } 556 }
555 557
556 if (off == NETXEN_ADDR_ERROR) {
557 printk(KERN_ERR "%s: Err: Unknown addr: 0x%08x\n",
558 netxen_nic_driver_name, buf[i].addr);
559 continue;
560 }
561
562 init_delay = 1; 558 init_delay = 1;
563 /* After writing this register, HW needs time for CRB */ 559 /* After writing this register, HW needs time for CRB */
564 /* to quiet down (else crb_window returns 0xffffffff) */ 560 /* to quiet down (else crb_window returns 0xffffffff) */
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index 9b9eab107704..0b4a56a8c8d5 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -595,7 +595,8 @@ netxen_setup_pci_map(struct netxen_adapter *adapter)
595 void __iomem *mem_ptr2 = NULL; 595 void __iomem *mem_ptr2 = NULL;
596 void __iomem *db_ptr = NULL; 596 void __iomem *db_ptr = NULL;
597 597
598 unsigned long mem_base, mem_len, db_base, db_len = 0, pci_len0 = 0; 598 resource_size_t mem_base, db_base;
599 unsigned long mem_len, db_len = 0, pci_len0 = 0;
599 600
600 struct pci_dev *pdev = adapter->pdev; 601 struct pci_dev *pdev = adapter->pdev;
601 int pci_func = adapter->ahw.pci_func; 602 int pci_func = adapter->ahw.pci_func;
@@ -1918,6 +1919,7 @@ static void netxen_tx_timeout_task(struct work_struct *work)
1918 1919
1919request_reset: 1920request_reset:
1920 adapter->need_fw_reset = 1; 1921 adapter->need_fw_reset = 1;
1922 clear_bit(__NX_RESETTING, &adapter->state);
1921} 1923}
1922 1924
1923struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) 1925struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev)
diff --git a/drivers/net/niu.c b/drivers/net/niu.c
index f9364d0678f2..d6c7ac68f6ea 100644
--- a/drivers/net/niu.c
+++ b/drivers/net/niu.c
@@ -3545,7 +3545,7 @@ static int niu_process_rx_pkt(struct napi_struct *napi, struct niu *np,
3545 rp->rcr_index = index; 3545 rp->rcr_index = index;
3546 3546
3547 skb_reserve(skb, NET_IP_ALIGN); 3547 skb_reserve(skb, NET_IP_ALIGN);
3548 __pskb_pull_tail(skb, min(len, NIU_RXPULL_MAX)); 3548 __pskb_pull_tail(skb, min(len, VLAN_ETH_HLEN));
3549 3549
3550 rp->rx_packets++; 3550 rp->rx_packets++;
3551 rp->rx_bytes += skb->len; 3551 rp->rx_bytes += skb->len;
diff --git a/drivers/net/pcmcia/3c574_cs.c b/drivers/net/pcmcia/3c574_cs.c
index ee8ad3e180dd..b58965a2b3ae 100644
--- a/drivers/net/pcmcia/3c574_cs.c
+++ b/drivers/net/pcmcia/3c574_cs.c
@@ -251,6 +251,7 @@ static void el3_tx_timeout(struct net_device *dev);
251static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); 251static int el3_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
252static const struct ethtool_ops netdev_ethtool_ops; 252static const struct ethtool_ops netdev_ethtool_ops;
253static void set_rx_mode(struct net_device *dev); 253static void set_rx_mode(struct net_device *dev);
254static void set_multicast_list(struct net_device *dev);
254 255
255static void tc574_detach(struct pcmcia_device *p_dev); 256static void tc574_detach(struct pcmcia_device *p_dev);
256 257
@@ -266,7 +267,7 @@ static const struct net_device_ops el3_netdev_ops = {
266 .ndo_tx_timeout = el3_tx_timeout, 267 .ndo_tx_timeout = el3_tx_timeout,
267 .ndo_get_stats = el3_get_stats, 268 .ndo_get_stats = el3_get_stats,
268 .ndo_do_ioctl = el3_ioctl, 269 .ndo_do_ioctl = el3_ioctl,
269 .ndo_set_multicast_list = set_rx_mode, 270 .ndo_set_multicast_list = set_multicast_list,
270 .ndo_change_mtu = eth_change_mtu, 271 .ndo_change_mtu = eth_change_mtu,
271 .ndo_set_mac_address = eth_mac_addr, 272 .ndo_set_mac_address = eth_mac_addr,
272 .ndo_validate_addr = eth_validate_addr, 273 .ndo_validate_addr = eth_validate_addr,
@@ -1161,6 +1162,16 @@ static void set_rx_mode(struct net_device *dev)
1161 outw(SetRxFilter | RxStation | RxBroadcast, ioaddr + EL3_CMD); 1162 outw(SetRxFilter | RxStation | RxBroadcast, ioaddr + EL3_CMD);
1162} 1163}
1163 1164
1165static void set_multicast_list(struct net_device *dev)
1166{
1167 struct el3_private *lp = netdev_priv(dev);
1168 unsigned long flags;
1169
1170 spin_lock_irqsave(&lp->window_lock, flags);
1171 set_rx_mode(dev);
1172 spin_unlock_irqrestore(&lp->window_lock, flags);
1173}
1174
1164static int el3_close(struct net_device *dev) 1175static int el3_close(struct net_device *dev)
1165{ 1176{
1166 unsigned int ioaddr = dev->base_addr; 1177 unsigned int ioaddr = dev->base_addr;
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c
index bd3447f04902..94c9ad2746bc 100644
--- a/drivers/net/pcmcia/pcnet_cs.c
+++ b/drivers/net/pcmcia/pcnet_cs.c
@@ -1760,7 +1760,7 @@ static struct pcmcia_device_id pcnet_ids[] = {
1760 PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"), 1760 PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"),
1761 PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"), 1761 PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"),
1762 PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"), 1762 PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"),
1763 PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "PE-200.cis"), 1763 PCMCIA_DEVICE_CIS_PROD_ID12("PMX ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "cis/PE-200.cis"),
1764 PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"), 1764 PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"),
1765 PCMCIA_DEVICE_PROD_ID12("Ethernet", "CF Size PC Card", 0x00b2e941, 0x43ac239b), 1765 PCMCIA_DEVICE_PROD_ID12("Ethernet", "CF Size PC Card", 0x00b2e941, 0x43ac239b),
1766 PCMCIA_DEVICE_PROD_ID123("Fast Ethernet", "CF Size PC Card", "1.0", 1766 PCMCIA_DEVICE_PROD_ID123("Fast Ethernet", "CF Size PC Card", "1.0",
diff --git a/drivers/net/phy/mdio-gpio.c b/drivers/net/phy/mdio-gpio.c
index 250e10f2c35b..35897134a5dd 100644
--- a/drivers/net/phy/mdio-gpio.c
+++ b/drivers/net/phy/mdio-gpio.c
@@ -139,7 +139,7 @@ out:
139 return NULL; 139 return NULL;
140} 140}
141 141
142static void __devinit mdio_gpio_bus_deinit(struct device *dev) 142static void mdio_gpio_bus_deinit(struct device *dev)
143{ 143{
144 struct mii_bus *bus = dev_get_drvdata(dev); 144 struct mii_bus *bus = dev_get_drvdata(dev);
145 struct mdio_gpio_info *bitbang = bus->priv; 145 struct mdio_gpio_info *bitbang = bus->priv;
@@ -238,6 +238,7 @@ static struct of_device_id mdio_ofgpio_match[] = {
238 }, 238 },
239 {}, 239 {},
240}; 240};
241MODULE_DEVICE_TABLE(of, mdio_ofgpio_match);
241 242
242static struct of_platform_driver mdio_ofgpio_driver = { 243static struct of_platform_driver mdio_ofgpio_driver = {
243 .name = "mdio-gpio", 244 .name = "mdio-gpio",
diff --git a/drivers/net/ppp_generic.c b/drivers/net/ppp_generic.c
index 9bf2a6be9031..965adb6174c3 100644
--- a/drivers/net/ppp_generic.c
+++ b/drivers/net/ppp_generic.c
@@ -1944,8 +1944,15 @@ ppp_receive_mp_frame(struct ppp *ppp, struct sk_buff *skb, struct channel *pch)
1944 } 1944 }
1945 1945
1946 /* Pull completed packets off the queue and receive them. */ 1946 /* Pull completed packets off the queue and receive them. */
1947 while ((skb = ppp_mp_reconstruct(ppp))) 1947 while ((skb = ppp_mp_reconstruct(ppp))) {
1948 ppp_receive_nonmp_frame(ppp, skb); 1948 if (pskb_may_pull(skb, 2))
1949 ppp_receive_nonmp_frame(ppp, skb);
1950 else {
1951 ++ppp->dev->stats.rx_length_errors;
1952 kfree_skb(skb);
1953 ppp_receive_error(ppp);
1954 }
1955 }
1949 1956
1950 return; 1957 return;
1951 1958
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c
index 7cbf6f9b51de..2559991eea6a 100644
--- a/drivers/net/pppoe.c
+++ b/drivers/net/pppoe.c
@@ -111,9 +111,6 @@ struct pppoe_net {
111 rwlock_t hash_lock; 111 rwlock_t hash_lock;
112}; 112};
113 113
114/* to eliminate a race btw pppoe_flush_dev and pppoe_release */
115static DEFINE_SPINLOCK(flush_lock);
116
117/* 114/*
118 * PPPoE could be in the following stages: 115 * PPPoE could be in the following stages:
119 * 1) Discovery stage (to obtain remote MAC and Session ID) 116 * 1) Discovery stage (to obtain remote MAC and Session ID)
@@ -303,45 +300,48 @@ static void pppoe_flush_dev(struct net_device *dev)
303 write_lock_bh(&pn->hash_lock); 300 write_lock_bh(&pn->hash_lock);
304 for (i = 0; i < PPPOE_HASH_SIZE; i++) { 301 for (i = 0; i < PPPOE_HASH_SIZE; i++) {
305 struct pppox_sock *po = pn->hash_table[i]; 302 struct pppox_sock *po = pn->hash_table[i];
303 struct sock *sk;
306 304
307 while (po != NULL) { 305 while (po) {
308 struct sock *sk; 306 while (po && po->pppoe_dev != dev) {
309 if (po->pppoe_dev != dev) {
310 po = po->next; 307 po = po->next;
311 continue;
312 } 308 }
309
310 if (!po)
311 break;
312
313 sk = sk_pppox(po); 313 sk = sk_pppox(po);
314 spin_lock(&flush_lock);
315 po->pppoe_dev = NULL;
316 spin_unlock(&flush_lock);
317 dev_put(dev);
318 314
319 /* We always grab the socket lock, followed by the 315 /* We always grab the socket lock, followed by the
320 * hash_lock, in that order. Since we should 316 * hash_lock, in that order. Since we should hold the
321 * hold the sock lock while doing any unbinding, 317 * sock lock while doing any unbinding, we need to
322 * we need to release the lock we're holding. 318 * release the lock we're holding. Hold a reference to
323 * Hold a reference to the sock so it doesn't disappear 319 * the sock so it doesn't disappear as we're jumping
324 * as we're jumping between locks. 320 * between locks.
325 */ 321 */
326 322
327 sock_hold(sk); 323 sock_hold(sk);
328
329 write_unlock_bh(&pn->hash_lock); 324 write_unlock_bh(&pn->hash_lock);
330 lock_sock(sk); 325 lock_sock(sk);
331 326
332 if (sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) { 327 if (po->pppoe_dev == dev
328 && sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) {
333 pppox_unbind_sock(sk); 329 pppox_unbind_sock(sk);
334 sk->sk_state = PPPOX_ZOMBIE; 330 sk->sk_state = PPPOX_ZOMBIE;
335 sk->sk_state_change(sk); 331 sk->sk_state_change(sk);
332 po->pppoe_dev = NULL;
333 dev_put(dev);
336 } 334 }
337 335
338 release_sock(sk); 336 release_sock(sk);
339 sock_put(sk); 337 sock_put(sk);
340 338
341 /* Restart scan at the beginning of this hash chain. 339 /* Restart the process from the start of the current
342 * While the lock was dropped the chain contents may 340 * hash chain. We dropped locks so the world may have
343 * have changed. 341 * change from underneath us.
344 */ 342 */
343
344 BUG_ON(pppoe_pernet(dev_net(dev)) == NULL);
345 write_lock_bh(&pn->hash_lock); 345 write_lock_bh(&pn->hash_lock);
346 po = pn->hash_table[i]; 346 po = pn->hash_table[i];
347 } 347 }
@@ -388,11 +388,16 @@ static int pppoe_rcv_core(struct sock *sk, struct sk_buff *skb)
388 struct pppox_sock *po = pppox_sk(sk); 388 struct pppox_sock *po = pppox_sk(sk);
389 struct pppox_sock *relay_po; 389 struct pppox_sock *relay_po;
390 390
391 /* Backlog receive. Semantics of backlog rcv preclude any code from
392 * executing in lock_sock()/release_sock() bounds; meaning sk->sk_state
393 * can't change.
394 */
395
391 if (sk->sk_state & PPPOX_BOUND) { 396 if (sk->sk_state & PPPOX_BOUND) {
392 ppp_input(&po->chan, skb); 397 ppp_input(&po->chan, skb);
393 } else if (sk->sk_state & PPPOX_RELAY) { 398 } else if (sk->sk_state & PPPOX_RELAY) {
394 relay_po = get_item_by_addr(dev_net(po->pppoe_dev), 399 relay_po = get_item_by_addr(sock_net(sk),
395 &po->pppoe_relay); 400 &po->pppoe_relay);
396 if (relay_po == NULL) 401 if (relay_po == NULL)
397 goto abort_kfree; 402 goto abort_kfree;
398 403
@@ -447,6 +452,10 @@ static int pppoe_rcv(struct sk_buff *skb, struct net_device *dev,
447 goto drop; 452 goto drop;
448 453
449 pn = pppoe_pernet(dev_net(dev)); 454 pn = pppoe_pernet(dev_net(dev));
455
456 /* Note that get_item does a sock_hold(), so sk_pppox(po)
457 * is known to be safe.
458 */
450 po = get_item(pn, ph->sid, eth_hdr(skb)->h_source, dev->ifindex); 459 po = get_item(pn, ph->sid, eth_hdr(skb)->h_source, dev->ifindex);
451 if (!po) 460 if (!po)
452 goto drop; 461 goto drop;
@@ -561,6 +570,7 @@ static int pppoe_release(struct socket *sock)
561 struct sock *sk = sock->sk; 570 struct sock *sk = sock->sk;
562 struct pppox_sock *po; 571 struct pppox_sock *po;
563 struct pppoe_net *pn; 572 struct pppoe_net *pn;
573 struct net *net = NULL;
564 574
565 if (!sk) 575 if (!sk)
566 return 0; 576 return 0;
@@ -571,44 +581,28 @@ static int pppoe_release(struct socket *sock)
571 return -EBADF; 581 return -EBADF;
572 } 582 }
573 583
584 po = pppox_sk(sk);
585
586 if (sk->sk_state & (PPPOX_CONNECTED | PPPOX_BOUND)) {
587 dev_put(po->pppoe_dev);
588 po->pppoe_dev = NULL;
589 }
590
574 pppox_unbind_sock(sk); 591 pppox_unbind_sock(sk);
575 592
576 /* Signal the death of the socket. */ 593 /* Signal the death of the socket. */
577 sk->sk_state = PPPOX_DEAD; 594 sk->sk_state = PPPOX_DEAD;
578 595
579 /* 596 net = sock_net(sk);
580 * pppoe_flush_dev could lead to a race with 597 pn = pppoe_pernet(net);
581 * this routine so we use flush_lock to eliminate
582 * such a case (we only need per-net specific data)
583 */
584 spin_lock(&flush_lock);
585 po = pppox_sk(sk);
586 if (!po->pppoe_dev) {
587 spin_unlock(&flush_lock);
588 goto out;
589 }
590 pn = pppoe_pernet(dev_net(po->pppoe_dev));
591 spin_unlock(&flush_lock);
592 598
593 /* 599 /*
594 * protect "po" from concurrent updates 600 * protect "po" from concurrent updates
595 * on pppoe_flush_dev 601 * on pppoe_flush_dev
596 */ 602 */
597 write_lock_bh(&pn->hash_lock); 603 delete_item(pn, po->pppoe_pa.sid, po->pppoe_pa.remote,
604 po->pppoe_ifindex);
598 605
599 po = pppox_sk(sk);
600 if (stage_session(po->pppoe_pa.sid))
601 __delete_item(pn, po->pppoe_pa.sid, po->pppoe_pa.remote,
602 po->pppoe_ifindex);
603
604 if (po->pppoe_dev) {
605 dev_put(po->pppoe_dev);
606 po->pppoe_dev = NULL;
607 }
608
609 write_unlock_bh(&pn->hash_lock);
610
611out:
612 sock_orphan(sk); 606 sock_orphan(sk);
613 sock->sk = NULL; 607 sock->sk = NULL;
614 608
@@ -625,8 +619,9 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,
625 struct sock *sk = sock->sk; 619 struct sock *sk = sock->sk;
626 struct sockaddr_pppox *sp = (struct sockaddr_pppox *)uservaddr; 620 struct sockaddr_pppox *sp = (struct sockaddr_pppox *)uservaddr;
627 struct pppox_sock *po = pppox_sk(sk); 621 struct pppox_sock *po = pppox_sk(sk);
628 struct net_device *dev; 622 struct net_device *dev = NULL;
629 struct pppoe_net *pn; 623 struct pppoe_net *pn;
624 struct net *net = NULL;
630 int error; 625 int error;
631 626
632 lock_sock(sk); 627 lock_sock(sk);
@@ -652,12 +647,14 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,
652 /* Delete the old binding */ 647 /* Delete the old binding */
653 if (stage_session(po->pppoe_pa.sid)) { 648 if (stage_session(po->pppoe_pa.sid)) {
654 pppox_unbind_sock(sk); 649 pppox_unbind_sock(sk);
650 pn = pppoe_pernet(sock_net(sk));
651 delete_item(pn, po->pppoe_pa.sid,
652 po->pppoe_pa.remote, po->pppoe_ifindex);
655 if (po->pppoe_dev) { 653 if (po->pppoe_dev) {
656 pn = pppoe_pernet(dev_net(po->pppoe_dev));
657 delete_item(pn, po->pppoe_pa.sid,
658 po->pppoe_pa.remote, po->pppoe_ifindex);
659 dev_put(po->pppoe_dev); 654 dev_put(po->pppoe_dev);
655 po->pppoe_dev = NULL;
660 } 656 }
657
661 memset(sk_pppox(po) + 1, 0, 658 memset(sk_pppox(po) + 1, 0,
662 sizeof(struct pppox_sock) - sizeof(struct sock)); 659 sizeof(struct pppox_sock) - sizeof(struct sock));
663 sk->sk_state = PPPOX_NONE; 660 sk->sk_state = PPPOX_NONE;
@@ -666,16 +663,15 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,
666 /* Re-bind in session stage only */ 663 /* Re-bind in session stage only */
667 if (stage_session(sp->sa_addr.pppoe.sid)) { 664 if (stage_session(sp->sa_addr.pppoe.sid)) {
668 error = -ENODEV; 665 error = -ENODEV;
669 dev = dev_get_by_name(sock_net(sk), sp->sa_addr.pppoe.dev); 666 net = sock_net(sk);
667 dev = dev_get_by_name(net, sp->sa_addr.pppoe.dev);
670 if (!dev) 668 if (!dev)
671 goto end; 669 goto err_put;
672 670
673 po->pppoe_dev = dev; 671 po->pppoe_dev = dev;
674 po->pppoe_ifindex = dev->ifindex; 672 po->pppoe_ifindex = dev->ifindex;
675 pn = pppoe_pernet(dev_net(dev)); 673 pn = pppoe_pernet(net);
676 write_lock_bh(&pn->hash_lock);
677 if (!(dev->flags & IFF_UP)) { 674 if (!(dev->flags & IFF_UP)) {
678 write_unlock_bh(&pn->hash_lock);
679 goto err_put; 675 goto err_put;
680 } 676 }
681 677
@@ -683,6 +679,7 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,
683 &sp->sa_addr.pppoe, 679 &sp->sa_addr.pppoe,
684 sizeof(struct pppoe_addr)); 680 sizeof(struct pppoe_addr));
685 681
682 write_lock_bh(&pn->hash_lock);
686 error = __set_item(pn, po); 683 error = __set_item(pn, po);
687 write_unlock_bh(&pn->hash_lock); 684 write_unlock_bh(&pn->hash_lock);
688 if (error < 0) 685 if (error < 0)
@@ -696,8 +693,11 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,
696 po->chan.ops = &pppoe_chan_ops; 693 po->chan.ops = &pppoe_chan_ops;
697 694
698 error = ppp_register_net_channel(dev_net(dev), &po->chan); 695 error = ppp_register_net_channel(dev_net(dev), &po->chan);
699 if (error) 696 if (error) {
697 delete_item(pn, po->pppoe_pa.sid,
698 po->pppoe_pa.remote, po->pppoe_ifindex);
700 goto err_put; 699 goto err_put;
700 }
701 701
702 sk->sk_state = PPPOX_CONNECTED; 702 sk->sk_state = PPPOX_CONNECTED;
703 } 703 }
@@ -915,6 +915,14 @@ static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb)
915 struct pppoe_hdr *ph; 915 struct pppoe_hdr *ph;
916 int data_len = skb->len; 916 int data_len = skb->len;
917 917
918 /* The higher-level PPP code (ppp_unregister_channel()) ensures the PPP
919 * xmit operations conclude prior to an unregistration call. Thus
920 * sk->sk_state cannot change, so we don't need to do lock_sock().
921 * But, we also can't do a lock_sock since that introduces a potential
922 * deadlock as we'd reverse the lock ordering used when calling
923 * ppp_unregister_channel().
924 */
925
918 if (sock_flag(sk, SOCK_DEAD) || !(sk->sk_state & PPPOX_CONNECTED)) 926 if (sock_flag(sk, SOCK_DEAD) || !(sk->sk_state & PPPOX_CONNECTED))
919 goto abort; 927 goto abort;
920 928
@@ -944,7 +952,6 @@ static int __pppoe_xmit(struct sock *sk, struct sk_buff *skb)
944 po->pppoe_pa.remote, NULL, data_len); 952 po->pppoe_pa.remote, NULL, data_len);
945 953
946 dev_queue_xmit(skb); 954 dev_queue_xmit(skb);
947
948 return 1; 955 return 1;
949 956
950abort: 957abort:
diff --git a/drivers/net/qlge/qlge.h b/drivers/net/qlge/qlge.h
index 3ec6e85587a2..c2383adcd527 100644
--- a/drivers/net/qlge/qlge.h
+++ b/drivers/net/qlge/qlge.h
@@ -95,6 +95,7 @@ enum {
95 95
96 /* Misc. stuff */ 96 /* Misc. stuff */
97 MAILBOX_COUNT = 16, 97 MAILBOX_COUNT = 16,
98 MAILBOX_TIMEOUT = 5,
98 99
99 PROC_ADDR_RDY = (1 << 31), 100 PROC_ADDR_RDY = (1 << 31),
100 PROC_ADDR_R = (1 << 30), 101 PROC_ADDR_R = (1 << 30),
@@ -803,6 +804,12 @@ enum {
803 MB_CMD_SET_PORT_CFG = 0x00000122, 804 MB_CMD_SET_PORT_CFG = 0x00000122,
804 MB_CMD_GET_PORT_CFG = 0x00000123, 805 MB_CMD_GET_PORT_CFG = 0x00000123,
805 MB_CMD_GET_LINK_STS = 0x00000124, 806 MB_CMD_GET_LINK_STS = 0x00000124,
807 MB_CMD_SET_MGMNT_TFK_CTL = 0x00000160, /* Set Mgmnt Traffic Control */
808 MB_SET_MPI_TFK_STOP = (1 << 0),
809 MB_SET_MPI_TFK_RESUME = (1 << 1),
810 MB_CMD_GET_MGMNT_TFK_CTL = 0x00000161, /* Get Mgmnt Traffic Control */
811 MB_GET_MPI_TFK_STOPPED = (1 << 0),
812 MB_GET_MPI_TFK_FIFO_EMPTY = (1 << 1),
806 813
807 /* Mailbox Command Status. */ 814 /* Mailbox Command Status. */
808 MB_CMD_STS_GOOD = 0x00004000, /* Success. */ 815 MB_CMD_STS_GOOD = 0x00004000, /* Success. */
@@ -1168,7 +1175,7 @@ struct ricb {
1168#define RSS_RI6 0x40 1175#define RSS_RI6 0x40
1169#define RSS_RT6 0x80 1176#define RSS_RT6 0x80
1170 __le16 mask; 1177 __le16 mask;
1171 __le32 hash_cq_id[256]; 1178 u8 hash_cq_id[1024];
1172 __le32 ipv6_hash_key[10]; 1179 __le32 ipv6_hash_key[10];
1173 __le32 ipv4_hash_key[4]; 1180 __le32 ipv4_hash_key[4];
1174} __attribute((packed)); 1181} __attribute((packed));
@@ -1606,6 +1613,8 @@ int ql_read_mpi_reg(struct ql_adapter *qdev, u32 reg, u32 *data);
1606int ql_mb_about_fw(struct ql_adapter *qdev); 1613int ql_mb_about_fw(struct ql_adapter *qdev);
1607void ql_link_on(struct ql_adapter *qdev); 1614void ql_link_on(struct ql_adapter *qdev);
1608void ql_link_off(struct ql_adapter *qdev); 1615void ql_link_off(struct ql_adapter *qdev);
1616int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control);
1617int ql_wait_fifo_empty(struct ql_adapter *qdev);
1609 1618
1610#if 1 1619#if 1
1611#define QL_ALL_DUMP 1620#define QL_ALL_DUMP
diff --git a/drivers/net/qlge/qlge_main.c b/drivers/net/qlge/qlge_main.c
index 61680715cde0..a2fc70a0d0cc 100644
--- a/drivers/net/qlge/qlge_main.c
+++ b/drivers/net/qlge/qlge_main.c
@@ -320,6 +320,37 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
320 320
321 switch (type) { 321 switch (type) {
322 case MAC_ADDR_TYPE_MULTI_MAC: 322 case MAC_ADDR_TYPE_MULTI_MAC:
323 {
324 u32 upper = (addr[0] << 8) | addr[1];
325 u32 lower = (addr[2] << 24) | (addr[3] << 16) |
326 (addr[4] << 8) | (addr[5]);
327
328 status =
329 ql_wait_reg_rdy(qdev,
330 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
331 if (status)
332 goto exit;
333 ql_write32(qdev, MAC_ADDR_IDX, (offset++) |
334 (index << MAC_ADDR_IDX_SHIFT) |
335 type | MAC_ADDR_E);
336 ql_write32(qdev, MAC_ADDR_DATA, lower);
337 status =
338 ql_wait_reg_rdy(qdev,
339 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
340 if (status)
341 goto exit;
342 ql_write32(qdev, MAC_ADDR_IDX, (offset++) |
343 (index << MAC_ADDR_IDX_SHIFT) |
344 type | MAC_ADDR_E);
345
346 ql_write32(qdev, MAC_ADDR_DATA, upper);
347 status =
348 ql_wait_reg_rdy(qdev,
349 MAC_ADDR_IDX, MAC_ADDR_MW, 0);
350 if (status)
351 goto exit;
352 break;
353 }
323 case MAC_ADDR_TYPE_CAM_MAC: 354 case MAC_ADDR_TYPE_CAM_MAC:
324 { 355 {
325 u32 cam_output; 356 u32 cam_output;
@@ -365,16 +396,14 @@ static int ql_set_mac_addr_reg(struct ql_adapter *qdev, u8 *addr, u32 type,
365 and possibly the function id. Right now we hardcode 396 and possibly the function id. Right now we hardcode
366 the route field to NIC core. 397 the route field to NIC core.
367 */ 398 */
368 if (type == MAC_ADDR_TYPE_CAM_MAC) { 399 cam_output = (CAM_OUT_ROUTE_NIC |
369 cam_output = (CAM_OUT_ROUTE_NIC | 400 (qdev->
370 (qdev-> 401 func << CAM_OUT_FUNC_SHIFT) |
371 func << CAM_OUT_FUNC_SHIFT) | 402 (0 << CAM_OUT_CQ_ID_SHIFT));
372 (0 << CAM_OUT_CQ_ID_SHIFT)); 403 if (qdev->vlgrp)
373 if (qdev->vlgrp) 404 cam_output |= CAM_OUT_RV;
374 cam_output |= CAM_OUT_RV; 405 /* route to NIC core */
375 /* route to NIC core */ 406 ql_write32(qdev, MAC_ADDR_DATA, cam_output);
376 ql_write32(qdev, MAC_ADDR_DATA, cam_output);
377 }
378 break; 407 break;
379 } 408 }
380 case MAC_ADDR_TYPE_VLAN: 409 case MAC_ADDR_TYPE_VLAN:
@@ -546,14 +575,14 @@ static int ql_set_routing_reg(struct ql_adapter *qdev, u32 index, u32 mask,
546 } 575 }
547 case RT_IDX_MCAST: /* Pass up All Multicast frames. */ 576 case RT_IDX_MCAST: /* Pass up All Multicast frames. */
548 { 577 {
549 value = RT_IDX_DST_CAM_Q | /* dest */ 578 value = RT_IDX_DST_DFLT_Q | /* dest */
550 RT_IDX_TYPE_NICQ | /* type */ 579 RT_IDX_TYPE_NICQ | /* type */
551 (RT_IDX_ALLMULTI_SLOT << RT_IDX_IDX_SHIFT);/* index */ 580 (RT_IDX_ALLMULTI_SLOT << RT_IDX_IDX_SHIFT);/* index */
552 break; 581 break;
553 } 582 }
554 case RT_IDX_MCAST_MATCH: /* Pass up matched Multicast frames. */ 583 case RT_IDX_MCAST_MATCH: /* Pass up matched Multicast frames. */
555 { 584 {
556 value = RT_IDX_DST_CAM_Q | /* dest */ 585 value = RT_IDX_DST_DFLT_Q | /* dest */
557 RT_IDX_TYPE_NICQ | /* type */ 586 RT_IDX_TYPE_NICQ | /* type */
558 (RT_IDX_MCAST_MATCH_SLOT << RT_IDX_IDX_SHIFT);/* index */ 587 (RT_IDX_MCAST_MATCH_SLOT << RT_IDX_IDX_SHIFT);/* index */
559 break; 588 break;
@@ -3077,6 +3106,12 @@ err_irq:
3077 3106
3078static int ql_start_rss(struct ql_adapter *qdev) 3107static int ql_start_rss(struct ql_adapter *qdev)
3079{ 3108{
3109 u8 init_hash_seed[] = {0x6d, 0x5a, 0x56, 0xda, 0x25, 0x5b, 0x0e, 0xc2,
3110 0x41, 0x67, 0x25, 0x3d, 0x43, 0xa3, 0x8f,
3111 0xb0, 0xd0, 0xca, 0x2b, 0xcb, 0xae, 0x7b,
3112 0x30, 0xb4, 0x77, 0xcb, 0x2d, 0xa3, 0x80,
3113 0x30, 0xf2, 0x0c, 0x6a, 0x42, 0xb7, 0x3b,
3114 0xbe, 0xac, 0x01, 0xfa};
3080 struct ricb *ricb = &qdev->ricb; 3115 struct ricb *ricb = &qdev->ricb;
3081 int status = 0; 3116 int status = 0;
3082 int i; 3117 int i;
@@ -3086,21 +3121,17 @@ static int ql_start_rss(struct ql_adapter *qdev)
3086 3121
3087 ricb->base_cq = RSS_L4K; 3122 ricb->base_cq = RSS_L4K;
3088 ricb->flags = 3123 ricb->flags =
3089 (RSS_L6K | RSS_LI | RSS_LB | RSS_LM | RSS_RI4 | RSS_RI6 | RSS_RT4 | 3124 (RSS_L6K | RSS_LI | RSS_LB | RSS_LM | RSS_RT4 | RSS_RT6);
3090 RSS_RT6); 3125 ricb->mask = cpu_to_le16((u16)(0x3ff));
3091 ricb->mask = cpu_to_le16(qdev->rss_ring_count - 1);
3092 3126
3093 /* 3127 /*
3094 * Fill out the Indirection Table. 3128 * Fill out the Indirection Table.
3095 */ 3129 */
3096 for (i = 0; i < 256; i++) 3130 for (i = 0; i < 1024; i++)
3097 hash_id[i] = i & (qdev->rss_ring_count - 1); 3131 hash_id[i] = (i & (qdev->rss_ring_count - 1));
3098 3132
3099 /* 3133 memcpy((void *)&ricb->ipv6_hash_key[0], init_hash_seed, 40);
3100 * Random values for the IPv6 and IPv4 Hash Keys. 3134 memcpy((void *)&ricb->ipv4_hash_key[0], init_hash_seed, 16);
3101 */
3102 get_random_bytes((void *)&ricb->ipv6_hash_key[0], 40);
3103 get_random_bytes((void *)&ricb->ipv4_hash_key[0], 16);
3104 3135
3105 QPRINTK(qdev, IFUP, DEBUG, "Initializing RSS.\n"); 3136 QPRINTK(qdev, IFUP, DEBUG, "Initializing RSS.\n");
3106 3137
@@ -3239,6 +3270,13 @@ static int ql_adapter_initialize(struct ql_adapter *qdev)
3239 ql_write32(qdev, SPLT_HDR, SPLT_HDR_EP | 3270 ql_write32(qdev, SPLT_HDR, SPLT_HDR_EP |
3240 min(SMALL_BUFFER_SIZE, MAX_SPLIT_SIZE)); 3271 min(SMALL_BUFFER_SIZE, MAX_SPLIT_SIZE));
3241 3272
3273 /* Set RX packet routing to use port/pci function on which the
3274 * packet arrived on in addition to usual frame routing.
3275 * This is helpful on bonding where both interfaces can have
3276 * the same MAC address.
3277 */
3278 ql_write32(qdev, RST_FO, RST_FO_RR_MASK | RST_FO_RR_RCV_FUNC_CQ);
3279
3242 /* Start up the rx queues. */ 3280 /* Start up the rx queues. */
3243 for (i = 0; i < qdev->rx_ring_count; i++) { 3281 for (i = 0; i < qdev->rx_ring_count; i++) {
3244 status = ql_start_rx_ring(qdev, &qdev->rx_ring[i]); 3282 status = ql_start_rx_ring(qdev, &qdev->rx_ring[i]);
@@ -3311,6 +3349,13 @@ static int ql_adapter_reset(struct ql_adapter *qdev)
3311 3349
3312 end_jiffies = jiffies + 3350 end_jiffies = jiffies +
3313 max((unsigned long)1, usecs_to_jiffies(30)); 3351 max((unsigned long)1, usecs_to_jiffies(30));
3352
3353 /* Stop management traffic. */
3354 ql_mb_set_mgmnt_traffic_ctl(qdev, MB_SET_MPI_TFK_STOP);
3355
3356 /* Wait for the NIC and MGMNT FIFOs to empty. */
3357 ql_wait_fifo_empty(qdev);
3358
3314 ql_write32(qdev, RST_FO, (RST_FO_FR << 16) | RST_FO_FR); 3359 ql_write32(qdev, RST_FO, (RST_FO_FR << 16) | RST_FO_FR);
3315 3360
3316 do { 3361 do {
@@ -3326,6 +3371,8 @@ static int ql_adapter_reset(struct ql_adapter *qdev)
3326 status = -ETIMEDOUT; 3371 status = -ETIMEDOUT;
3327 } 3372 }
3328 3373
3374 /* Resume management traffic. */
3375 ql_mb_set_mgmnt_traffic_ctl(qdev, MB_SET_MPI_TFK_RESUME);
3329 return status; 3376 return status;
3330} 3377}
3331 3378
@@ -3704,6 +3751,12 @@ static void ql_asic_reset_work(struct work_struct *work)
3704 status = ql_adapter_up(qdev); 3751 status = ql_adapter_up(qdev);
3705 if (status) 3752 if (status)
3706 goto error; 3753 goto error;
3754
3755 /* Restore rx mode. */
3756 clear_bit(QL_ALLMULTI, &qdev->flags);
3757 clear_bit(QL_PROMISCUOUS, &qdev->flags);
3758 qlge_set_multicast_list(qdev->ndev);
3759
3707 rtnl_unlock(); 3760 rtnl_unlock();
3708 return; 3761 return;
3709error: 3762error:
@@ -3863,6 +3916,9 @@ static int __devinit ql_init_device(struct pci_dev *pdev,
3863 goto err_out; 3916 goto err_out;
3864 } 3917 }
3865 3918
3919 /* Set PCIe reset type for EEH to fundamental. */
3920 pdev->needs_freset = 1;
3921 pci_save_state(pdev);
3866 qdev->reg_base = 3922 qdev->reg_base =
3867 ioremap_nocache(pci_resource_start(pdev, 1), 3923 ioremap_nocache(pci_resource_start(pdev, 1),
3868 pci_resource_len(pdev, 1)); 3924 pci_resource_len(pdev, 1));
@@ -4017,6 +4073,33 @@ static void __devexit qlge_remove(struct pci_dev *pdev)
4017 free_netdev(ndev); 4073 free_netdev(ndev);
4018} 4074}
4019 4075
4076/* Clean up resources without touching hardware. */
4077static void ql_eeh_close(struct net_device *ndev)
4078{
4079 int i;
4080 struct ql_adapter *qdev = netdev_priv(ndev);
4081
4082 if (netif_carrier_ok(ndev)) {
4083 netif_carrier_off(ndev);
4084 netif_stop_queue(ndev);
4085 }
4086
4087 if (test_bit(QL_ADAPTER_UP, &qdev->flags))
4088 cancel_delayed_work_sync(&qdev->asic_reset_work);
4089 cancel_delayed_work_sync(&qdev->mpi_reset_work);
4090 cancel_delayed_work_sync(&qdev->mpi_work);
4091 cancel_delayed_work_sync(&qdev->mpi_idc_work);
4092 cancel_delayed_work_sync(&qdev->mpi_port_cfg_work);
4093
4094 for (i = 0; i < qdev->rss_ring_count; i++)
4095 netif_napi_del(&qdev->rx_ring[i].napi);
4096
4097 clear_bit(QL_ADAPTER_UP, &qdev->flags);
4098 ql_tx_ring_clean(qdev);
4099 ql_free_rx_buffers(qdev);
4100 ql_release_adapter_resources(qdev);
4101}
4102
4020/* 4103/*
4021 * This callback is called by the PCI subsystem whenever 4104 * This callback is called by the PCI subsystem whenever
4022 * a PCI bus error is detected. 4105 * a PCI bus error is detected.
@@ -4025,17 +4108,21 @@ static pci_ers_result_t qlge_io_error_detected(struct pci_dev *pdev,
4025 enum pci_channel_state state) 4108 enum pci_channel_state state)
4026{ 4109{
4027 struct net_device *ndev = pci_get_drvdata(pdev); 4110 struct net_device *ndev = pci_get_drvdata(pdev);
4028 struct ql_adapter *qdev = netdev_priv(ndev);
4029 4111
4030 netif_device_detach(ndev); 4112 switch (state) {
4031 4113 case pci_channel_io_normal:
4032 if (state == pci_channel_io_perm_failure) 4114 return PCI_ERS_RESULT_CAN_RECOVER;
4115 case pci_channel_io_frozen:
4116 netif_device_detach(ndev);
4117 if (netif_running(ndev))
4118 ql_eeh_close(ndev);
4119 pci_disable_device(pdev);
4120 return PCI_ERS_RESULT_NEED_RESET;
4121 case pci_channel_io_perm_failure:
4122 dev_err(&pdev->dev,
4123 "%s: pci_channel_io_perm_failure.\n", __func__);
4033 return PCI_ERS_RESULT_DISCONNECT; 4124 return PCI_ERS_RESULT_DISCONNECT;
4034 4125 }
4035 if (netif_running(ndev))
4036 ql_adapter_down(qdev);
4037
4038 pci_disable_device(pdev);
4039 4126
4040 /* Request a slot reset. */ 4127 /* Request a slot reset. */
4041 return PCI_ERS_RESULT_NEED_RESET; 4128 return PCI_ERS_RESULT_NEED_RESET;
@@ -4052,25 +4139,15 @@ static pci_ers_result_t qlge_io_slot_reset(struct pci_dev *pdev)
4052 struct net_device *ndev = pci_get_drvdata(pdev); 4139 struct net_device *ndev = pci_get_drvdata(pdev);
4053 struct ql_adapter *qdev = netdev_priv(ndev); 4140 struct ql_adapter *qdev = netdev_priv(ndev);
4054 4141
4142 pdev->error_state = pci_channel_io_normal;
4143
4144 pci_restore_state(pdev);
4055 if (pci_enable_device(pdev)) { 4145 if (pci_enable_device(pdev)) {
4056 QPRINTK(qdev, IFUP, ERR, 4146 QPRINTK(qdev, IFUP, ERR,
4057 "Cannot re-enable PCI device after reset.\n"); 4147 "Cannot re-enable PCI device after reset.\n");
4058 return PCI_ERS_RESULT_DISCONNECT; 4148 return PCI_ERS_RESULT_DISCONNECT;
4059 } 4149 }
4060
4061 pci_set_master(pdev); 4150 pci_set_master(pdev);
4062
4063 netif_carrier_off(ndev);
4064 ql_adapter_reset(qdev);
4065
4066 /* Make sure the EEPROM is good */
4067 memcpy(ndev->perm_addr, ndev->dev_addr, ndev->addr_len);
4068
4069 if (!is_valid_ether_addr(ndev->perm_addr)) {
4070 QPRINTK(qdev, IFUP, ERR, "After reset, invalid MAC address.\n");
4071 return PCI_ERS_RESULT_DISCONNECT;
4072 }
4073
4074 return PCI_ERS_RESULT_RECOVERED; 4151 return PCI_ERS_RESULT_RECOVERED;
4075} 4152}
4076 4153
@@ -4078,17 +4155,21 @@ static void qlge_io_resume(struct pci_dev *pdev)
4078{ 4155{
4079 struct net_device *ndev = pci_get_drvdata(pdev); 4156 struct net_device *ndev = pci_get_drvdata(pdev);
4080 struct ql_adapter *qdev = netdev_priv(ndev); 4157 struct ql_adapter *qdev = netdev_priv(ndev);
4158 int err = 0;
4081 4159
4082 pci_set_master(pdev); 4160 if (ql_adapter_reset(qdev))
4083 4161 QPRINTK(qdev, DRV, ERR, "reset FAILED!\n");
4084 if (netif_running(ndev)) { 4162 if (netif_running(ndev)) {
4085 if (ql_adapter_up(qdev)) { 4163 err = qlge_open(ndev);
4164 if (err) {
4086 QPRINTK(qdev, IFUP, ERR, 4165 QPRINTK(qdev, IFUP, ERR,
4087 "Device initialization failed after reset.\n"); 4166 "Device initialization failed after reset.\n");
4088 return; 4167 return;
4089 } 4168 }
4169 } else {
4170 QPRINTK(qdev, IFUP, ERR,
4171 "Device was not running prior to EEH.\n");
4090 } 4172 }
4091
4092 netif_device_attach(ndev); 4173 netif_device_attach(ndev);
4093} 4174}
4094 4175
diff --git a/drivers/net/qlge/qlge_mpi.c b/drivers/net/qlge/qlge_mpi.c
index c2e43073047e..aec05f266107 100644
--- a/drivers/net/qlge/qlge_mpi.c
+++ b/drivers/net/qlge/qlge_mpi.c
@@ -470,7 +470,8 @@ end:
470 */ 470 */
471static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp) 471static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp)
472{ 472{
473 int status, count; 473 int status;
474 unsigned long count;
474 475
475 476
476 /* Begin polled mode for MPI */ 477 /* Begin polled mode for MPI */
@@ -491,14 +492,14 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp)
491 /* Wait for the command to complete. We loop 492 /* Wait for the command to complete. We loop
492 * here because some AEN might arrive while 493 * here because some AEN might arrive while
493 * we're waiting for the mailbox command to 494 * we're waiting for the mailbox command to
494 * complete. If more than 5 arrive then we can 495 * complete. If more than 5 seconds expire we can
495 * assume something is wrong. */ 496 * assume something is wrong. */
496 count = 5; 497 count = jiffies + HZ * MAILBOX_TIMEOUT;
497 do { 498 do {
498 /* Wait for the interrupt to come in. */ 499 /* Wait for the interrupt to come in. */
499 status = ql_wait_mbx_cmd_cmplt(qdev); 500 status = ql_wait_mbx_cmd_cmplt(qdev);
500 if (status) 501 if (status)
501 goto end; 502 continue;
502 503
503 /* Process the event. If it's an AEN, it 504 /* Process the event. If it's an AEN, it
504 * will be handled in-line or a worker 505 * will be handled in-line or a worker
@@ -517,15 +518,15 @@ static int ql_mailbox_command(struct ql_adapter *qdev, struct mbox_params *mbcp)
517 MB_CMD_STS_GOOD) || 518 MB_CMD_STS_GOOD) ||
518 ((mbcp->mbox_out[0] & 0x0000f000) == 519 ((mbcp->mbox_out[0] & 0x0000f000) ==
519 MB_CMD_STS_INTRMDT)) 520 MB_CMD_STS_INTRMDT))
520 break; 521 goto done;
521 } while (--count); 522 } while (time_before(jiffies, count));
522 523
523 if (!count) { 524 QPRINTK(qdev, DRV, ERR,
524 QPRINTK(qdev, DRV, ERR, 525 "Timed out waiting for mailbox complete.\n");
525 "Timed out waiting for mailbox complete.\n"); 526 status = -ETIMEDOUT;
526 status = -ETIMEDOUT; 527 goto end;
527 goto end; 528
528 } 529done:
529 530
530 /* Now we can clear the interrupt condition 531 /* Now we can clear the interrupt condition
531 * and look at our status. 532 * and look at our status.
@@ -768,6 +769,95 @@ static int ql_idc_wait(struct ql_adapter *qdev)
768 return status; 769 return status;
769} 770}
770 771
772int ql_mb_set_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 control)
773{
774 struct mbox_params mbc;
775 struct mbox_params *mbcp = &mbc;
776 int status;
777
778 memset(mbcp, 0, sizeof(struct mbox_params));
779
780 mbcp->in_count = 1;
781 mbcp->out_count = 2;
782
783 mbcp->mbox_in[0] = MB_CMD_SET_MGMNT_TFK_CTL;
784 mbcp->mbox_in[1] = control;
785
786 status = ql_mailbox_command(qdev, mbcp);
787 if (status)
788 return status;
789
790 if (mbcp->mbox_out[0] == MB_CMD_STS_GOOD)
791 return status;
792
793 if (mbcp->mbox_out[0] == MB_CMD_STS_INVLD_CMD) {
794 QPRINTK(qdev, DRV, ERR,
795 "Command not supported by firmware.\n");
796 status = -EINVAL;
797 } else if (mbcp->mbox_out[0] == MB_CMD_STS_ERR) {
798 /* This indicates that the firmware is
799 * already in the state we are trying to
800 * change it to.
801 */
802 QPRINTK(qdev, DRV, ERR,
803 "Command parameters make no change.\n");
804 }
805 return status;
806}
807
808/* Returns a negative error code or the mailbox command status. */
809static int ql_mb_get_mgmnt_traffic_ctl(struct ql_adapter *qdev, u32 *control)
810{
811 struct mbox_params mbc;
812 struct mbox_params *mbcp = &mbc;
813 int status;
814
815 memset(mbcp, 0, sizeof(struct mbox_params));
816 *control = 0;
817
818 mbcp->in_count = 1;
819 mbcp->out_count = 1;
820
821 mbcp->mbox_in[0] = MB_CMD_GET_MGMNT_TFK_CTL;
822
823 status = ql_mailbox_command(qdev, mbcp);
824 if (status)
825 return status;
826
827 if (mbcp->mbox_out[0] == MB_CMD_STS_GOOD) {
828 *control = mbcp->mbox_in[1];
829 return status;
830 }
831
832 if (mbcp->mbox_out[0] == MB_CMD_STS_INVLD_CMD) {
833 QPRINTK(qdev, DRV, ERR,
834 "Command not supported by firmware.\n");
835 status = -EINVAL;
836 } else if (mbcp->mbox_out[0] == MB_CMD_STS_ERR) {
837 QPRINTK(qdev, DRV, ERR,
838 "Failed to get MPI traffic control.\n");
839 status = -EIO;
840 }
841 return status;
842}
843
844int ql_wait_fifo_empty(struct ql_adapter *qdev)
845{
846 int count = 5;
847 u32 mgmnt_fifo_empty;
848 u32 nic_fifo_empty;
849
850 do {
851 nic_fifo_empty = ql_read32(qdev, STS) & STS_NFE;
852 ql_mb_get_mgmnt_traffic_ctl(qdev, &mgmnt_fifo_empty);
853 mgmnt_fifo_empty &= MB_GET_MPI_TFK_FIFO_EMPTY;
854 if (nic_fifo_empty && mgmnt_fifo_empty)
855 return 0;
856 msleep(100);
857 } while (count-- > 0);
858 return -ETIMEDOUT;
859}
860
771/* API called in work thread context to set new TX/RX 861/* API called in work thread context to set new TX/RX
772 * maximum frame size values to match MTU. 862 * maximum frame size values to match MTU.
773 */ 863 */
@@ -876,6 +966,8 @@ void ql_mpi_work(struct work_struct *work)
876 int err = 0; 966 int err = 0;
877 967
878 rtnl_lock(); 968 rtnl_lock();
969 /* Begin polled mode for MPI */
970 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16));
879 971
880 while (ql_read32(qdev, STS) & STS_PI) { 972 while (ql_read32(qdev, STS) & STS_PI) {
881 memset(mbcp, 0, sizeof(struct mbox_params)); 973 memset(mbcp, 0, sizeof(struct mbox_params));
@@ -888,6 +980,8 @@ void ql_mpi_work(struct work_struct *work)
888 break; 980 break;
889 } 981 }
890 982
983 /* End polled mode for MPI */
984 ql_write32(qdev, INTR_MASK, (INTR_MASK_PI << 16) | INTR_MASK_PI);
891 rtnl_unlock(); 985 rtnl_unlock();
892 ql_enable_completion_interrupt(qdev, 0); 986 ql_enable_completion_interrupt(qdev, 0);
893} 987}
diff --git a/drivers/net/r6040.c b/drivers/net/r6040.c
index 7dfcb58b0eb4..8b14c6eda7c3 100644
--- a/drivers/net/r6040.c
+++ b/drivers/net/r6040.c
@@ -1085,7 +1085,7 @@ static int __devinit r6040_init_one(struct pci_dev *pdev,
1085 int bar = 0; 1085 int bar = 0;
1086 u16 *adrp; 1086 u16 *adrp;
1087 1087
1088 printk(KERN_INFO "%s\n", version); 1088 printk("%s\n", version);
1089 1089
1090 err = pci_enable_device(pdev); 1090 err = pci_enable_device(pdev);
1091 if (err) 1091 if (err)
diff --git a/drivers/net/r8169.c b/drivers/net/r8169.c
index 50c6a3cfe439..b9221bdc7184 100644
--- a/drivers/net/r8169.c
+++ b/drivers/net/r8169.c
@@ -115,7 +115,9 @@ enum mac_version {
115 RTL_GIGA_MAC_VER_22 = 0x16, // 8168C 115 RTL_GIGA_MAC_VER_22 = 0x16, // 8168C
116 RTL_GIGA_MAC_VER_23 = 0x17, // 8168CP 116 RTL_GIGA_MAC_VER_23 = 0x17, // 8168CP
117 RTL_GIGA_MAC_VER_24 = 0x18, // 8168CP 117 RTL_GIGA_MAC_VER_24 = 0x18, // 8168CP
118 RTL_GIGA_MAC_VER_25 = 0x19 // 8168D 118 RTL_GIGA_MAC_VER_25 = 0x19, // 8168D
119 RTL_GIGA_MAC_VER_26 = 0x1a, // 8168D
120 RTL_GIGA_MAC_VER_27 = 0x1b // 8168DP
119}; 121};
120 122
121#define _R(NAME,MAC,MASK) \ 123#define _R(NAME,MAC,MASK) \
@@ -150,7 +152,9 @@ static const struct {
150 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_22, 0xff7e1880), // PCI-E 152 _R("RTL8168c/8111c", RTL_GIGA_MAC_VER_22, 0xff7e1880), // PCI-E
151 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_23, 0xff7e1880), // PCI-E 153 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_23, 0xff7e1880), // PCI-E
152 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_24, 0xff7e1880), // PCI-E 154 _R("RTL8168cp/8111cp", RTL_GIGA_MAC_VER_24, 0xff7e1880), // PCI-E
153 _R("RTL8168d/8111d", RTL_GIGA_MAC_VER_25, 0xff7e1880) // PCI-E 155 _R("RTL8168d/8111d", RTL_GIGA_MAC_VER_25, 0xff7e1880), // PCI-E
156 _R("RTL8168d/8111d", RTL_GIGA_MAC_VER_26, 0xff7e1880), // PCI-E
157 _R("RTL8168dp/8111dp", RTL_GIGA_MAC_VER_27, 0xff7e1880) // PCI-E
154}; 158};
155#undef _R 159#undef _R
156 160
@@ -253,6 +257,13 @@ enum rtl8168_8101_registers {
253 DBG_REG = 0xd1, 257 DBG_REG = 0xd1,
254#define FIX_NAK_1 (1 << 4) 258#define FIX_NAK_1 (1 << 4)
255#define FIX_NAK_2 (1 << 3) 259#define FIX_NAK_2 (1 << 3)
260 EFUSEAR = 0xdc,
261#define EFUSEAR_FLAG 0x80000000
262#define EFUSEAR_WRITE_CMD 0x80000000
263#define EFUSEAR_READ_CMD 0x00000000
264#define EFUSEAR_REG_MASK 0x03ff
265#define EFUSEAR_REG_SHIFT 8
266#define EFUSEAR_DATA_MASK 0xff
256}; 267};
257 268
258enum rtl_register_content { 269enum rtl_register_content {
@@ -568,6 +579,14 @@ static void mdio_patch(void __iomem *ioaddr, int reg_addr, int value)
568 mdio_write(ioaddr, reg_addr, mdio_read(ioaddr, reg_addr) | value); 579 mdio_write(ioaddr, reg_addr, mdio_read(ioaddr, reg_addr) | value);
569} 580}
570 581
582static void mdio_plus_minus(void __iomem *ioaddr, int reg_addr, int p, int m)
583{
584 int val;
585
586 val = mdio_read(ioaddr, reg_addr);
587 mdio_write(ioaddr, reg_addr, (val | p) & ~m);
588}
589
571static void rtl_mdio_write(struct net_device *dev, int phy_id, int location, 590static void rtl_mdio_write(struct net_device *dev, int phy_id, int location,
572 int val) 591 int val)
573{ 592{
@@ -651,6 +670,24 @@ static u32 rtl_csi_read(void __iomem *ioaddr, int addr)
651 return value; 670 return value;
652} 671}
653 672
673static u8 rtl8168d_efuse_read(void __iomem *ioaddr, int reg_addr)
674{
675 u8 value = 0xff;
676 unsigned int i;
677
678 RTL_W32(EFUSEAR, (reg_addr & EFUSEAR_REG_MASK) << EFUSEAR_REG_SHIFT);
679
680 for (i = 0; i < 300; i++) {
681 if (RTL_R32(EFUSEAR) & EFUSEAR_FLAG) {
682 value = RTL_R32(EFUSEAR) & EFUSEAR_DATA_MASK;
683 break;
684 }
685 udelay(100);
686 }
687
688 return value;
689}
690
654static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr) 691static void rtl8169_irq_mask_and_ack(void __iomem *ioaddr)
655{ 692{
656 RTL_W16(IntrMask, 0x0000); 693 RTL_W16(IntrMask, 0x0000);
@@ -992,7 +1029,10 @@ static void rtl8169_vlan_rx_register(struct net_device *dev,
992 1029
993 spin_lock_irqsave(&tp->lock, flags); 1030 spin_lock_irqsave(&tp->lock, flags);
994 tp->vlgrp = grp; 1031 tp->vlgrp = grp;
995 if (tp->vlgrp) 1032 /*
1033 * Do not disable RxVlan on 8110SCd.
1034 */
1035 if (tp->vlgrp || (tp->mac_version == RTL_GIGA_MAC_VER_05))
996 tp->cp_cmd |= RxVlan; 1036 tp->cp_cmd |= RxVlan;
997 else 1037 else
998 tp->cp_cmd &= ~RxVlan; 1038 tp->cp_cmd &= ~RxVlan;
@@ -1243,7 +1283,10 @@ static void rtl8169_get_mac_version(struct rtl8169_private *tp,
1243 int mac_version; 1283 int mac_version;
1244 } mac_info[] = { 1284 } mac_info[] = {
1245 /* 8168D family. */ 1285 /* 8168D family. */
1246 { 0x7c800000, 0x28000000, RTL_GIGA_MAC_VER_25 }, 1286 { 0x7cf00000, 0x28300000, RTL_GIGA_MAC_VER_26 },
1287 { 0x7cf00000, 0x28100000, RTL_GIGA_MAC_VER_25 },
1288 { 0x7c800000, 0x28800000, RTL_GIGA_MAC_VER_27 },
1289 { 0x7c800000, 0x28000000, RTL_GIGA_MAC_VER_26 },
1247 1290
1248 /* 8168C family. */ 1291 /* 8168C family. */
1249 { 0x7cf00000, 0x3ca00000, RTL_GIGA_MAC_VER_24 }, 1292 { 0x7cf00000, 0x3ca00000, RTL_GIGA_MAC_VER_24 },
@@ -1648,74 +1691,903 @@ static void rtl8168c_4_hw_phy_config(void __iomem *ioaddr)
1648 rtl8168c_3_hw_phy_config(ioaddr); 1691 rtl8168c_3_hw_phy_config(ioaddr);
1649} 1692}
1650 1693
1651static void rtl8168d_hw_phy_config(void __iomem *ioaddr) 1694static void rtl8168d_1_hw_phy_config(void __iomem *ioaddr)
1652{ 1695{
1653 struct phy_reg phy_reg_init_0[] = { 1696 static struct phy_reg phy_reg_init_0[] = {
1654 { 0x1f, 0x0001 }, 1697 { 0x1f, 0x0001 },
1655 { 0x09, 0x2770 }, 1698 { 0x06, 0x4064 },
1656 { 0x08, 0x04d0 }, 1699 { 0x07, 0x2863 },
1657 { 0x0b, 0xad15 }, 1700 { 0x08, 0x059c },
1658 { 0x0c, 0x5bf0 }, 1701 { 0x09, 0x26b4 },
1659 { 0x1c, 0xf101 }, 1702 { 0x0a, 0x6a19 },
1703 { 0x0b, 0xdcc8 },
1704 { 0x10, 0xf06d },
1705 { 0x14, 0x7f68 },
1706 { 0x18, 0x7fd9 },
1707 { 0x1c, 0xf0ff },
1708 { 0x1d, 0x3d9c },
1660 { 0x1f, 0x0003 }, 1709 { 0x1f, 0x0003 },
1661 { 0x14, 0x94d7 }, 1710 { 0x12, 0xf49f },
1662 { 0x12, 0xf4d6 }, 1711 { 0x13, 0x070b },
1663 { 0x09, 0xca0f }, 1712 { 0x1a, 0x05ad },
1664 { 0x1f, 0x0002 }, 1713 { 0x14, 0x94c0 }
1665 { 0x0b, 0x0b10 }, 1714 };
1666 { 0x0c, 0xd1f7 }, 1715 static struct phy_reg phy_reg_init_1[] = {
1667 { 0x1f, 0x0002 },
1668 { 0x06, 0x5461 },
1669 { 0x1f, 0x0002 }, 1716 { 0x1f, 0x0002 },
1670 { 0x05, 0x6662 }, 1717 { 0x06, 0x5561 },
1718 { 0x1f, 0x0005 },
1719 { 0x05, 0x8332 },
1720 { 0x06, 0x5561 }
1721 };
1722 static struct phy_reg phy_reg_init_2[] = {
1723 { 0x1f, 0x0005 },
1724 { 0x05, 0xffc2 },
1725 { 0x1f, 0x0005 },
1726 { 0x05, 0x8000 },
1727 { 0x06, 0xf8f9 },
1728 { 0x06, 0xfaef },
1729 { 0x06, 0x59ee },
1730 { 0x06, 0xf8ea },
1731 { 0x06, 0x00ee },
1732 { 0x06, 0xf8eb },
1733 { 0x06, 0x00e0 },
1734 { 0x06, 0xf87c },
1735 { 0x06, 0xe1f8 },
1736 { 0x06, 0x7d59 },
1737 { 0x06, 0x0fef },
1738 { 0x06, 0x0139 },
1739 { 0x06, 0x029e },
1740 { 0x06, 0x06ef },
1741 { 0x06, 0x1039 },
1742 { 0x06, 0x089f },
1743 { 0x06, 0x2aee },
1744 { 0x06, 0xf8ea },
1745 { 0x06, 0x00ee },
1746 { 0x06, 0xf8eb },
1747 { 0x06, 0x01e0 },
1748 { 0x06, 0xf87c },
1749 { 0x06, 0xe1f8 },
1750 { 0x06, 0x7d58 },
1751 { 0x06, 0x409e },
1752 { 0x06, 0x0f39 },
1753 { 0x06, 0x46aa },
1754 { 0x06, 0x0bbf },
1755 { 0x06, 0x8290 },
1756 { 0x06, 0xd682 },
1757 { 0x06, 0x9802 },
1758 { 0x06, 0x014f },
1759 { 0x06, 0xae09 },
1760 { 0x06, 0xbf82 },
1761 { 0x06, 0x98d6 },
1762 { 0x06, 0x82a0 },
1763 { 0x06, 0x0201 },
1764 { 0x06, 0x4fef },
1765 { 0x06, 0x95fe },
1766 { 0x06, 0xfdfc },
1767 { 0x06, 0x05f8 },
1768 { 0x06, 0xf9fa },
1769 { 0x06, 0xeef8 },
1770 { 0x06, 0xea00 },
1771 { 0x06, 0xeef8 },
1772 { 0x06, 0xeb00 },
1773 { 0x06, 0xe2f8 },
1774 { 0x06, 0x7ce3 },
1775 { 0x06, 0xf87d },
1776 { 0x06, 0xa511 },
1777 { 0x06, 0x1112 },
1778 { 0x06, 0xd240 },
1779 { 0x06, 0xd644 },
1780 { 0x06, 0x4402 },
1781 { 0x06, 0x8217 },
1782 { 0x06, 0xd2a0 },
1783 { 0x06, 0xd6aa },
1784 { 0x06, 0xaa02 },
1785 { 0x06, 0x8217 },
1786 { 0x06, 0xae0f },
1787 { 0x06, 0xa544 },
1788 { 0x06, 0x4402 },
1789 { 0x06, 0xae4d },
1790 { 0x06, 0xa5aa },
1791 { 0x06, 0xaa02 },
1792 { 0x06, 0xae47 },
1793 { 0x06, 0xaf82 },
1794 { 0x06, 0x13ee },
1795 { 0x06, 0x834e },
1796 { 0x06, 0x00ee },
1797 { 0x06, 0x834d },
1798 { 0x06, 0x0fee },
1799 { 0x06, 0x834c },
1800 { 0x06, 0x0fee },
1801 { 0x06, 0x834f },
1802 { 0x06, 0x00ee },
1803 { 0x06, 0x8351 },
1804 { 0x06, 0x00ee },
1805 { 0x06, 0x834a },
1806 { 0x06, 0xffee },
1807 { 0x06, 0x834b },
1808 { 0x06, 0xffe0 },
1809 { 0x06, 0x8330 },
1810 { 0x06, 0xe183 },
1811 { 0x06, 0x3158 },
1812 { 0x06, 0xfee4 },
1813 { 0x06, 0xf88a },
1814 { 0x06, 0xe5f8 },
1815 { 0x06, 0x8be0 },
1816 { 0x06, 0x8332 },
1817 { 0x06, 0xe183 },
1818 { 0x06, 0x3359 },
1819 { 0x06, 0x0fe2 },
1820 { 0x06, 0x834d },
1821 { 0x06, 0x0c24 },
1822 { 0x06, 0x5af0 },
1823 { 0x06, 0x1e12 },
1824 { 0x06, 0xe4f8 },
1825 { 0x06, 0x8ce5 },
1826 { 0x06, 0xf88d },
1827 { 0x06, 0xaf82 },
1828 { 0x06, 0x13e0 },
1829 { 0x06, 0x834f },
1830 { 0x06, 0x10e4 },
1831 { 0x06, 0x834f },
1832 { 0x06, 0xe083 },
1833 { 0x06, 0x4e78 },
1834 { 0x06, 0x009f },
1835 { 0x06, 0x0ae0 },
1836 { 0x06, 0x834f },
1837 { 0x06, 0xa010 },
1838 { 0x06, 0xa5ee },
1839 { 0x06, 0x834e },
1840 { 0x06, 0x01e0 },
1841 { 0x06, 0x834e },
1842 { 0x06, 0x7805 },
1843 { 0x06, 0x9e9a },
1844 { 0x06, 0xe083 },
1845 { 0x06, 0x4e78 },
1846 { 0x06, 0x049e },
1847 { 0x06, 0x10e0 },
1848 { 0x06, 0x834e },
1849 { 0x06, 0x7803 },
1850 { 0x06, 0x9e0f },
1851 { 0x06, 0xe083 },
1852 { 0x06, 0x4e78 },
1853 { 0x06, 0x019e },
1854 { 0x06, 0x05ae },
1855 { 0x06, 0x0caf },
1856 { 0x06, 0x81f8 },
1857 { 0x06, 0xaf81 },
1858 { 0x06, 0xa3af },
1859 { 0x06, 0x81dc },
1860 { 0x06, 0xaf82 },
1861 { 0x06, 0x13ee },
1862 { 0x06, 0x8348 },
1863 { 0x06, 0x00ee },
1864 { 0x06, 0x8349 },
1865 { 0x06, 0x00e0 },
1866 { 0x06, 0x8351 },
1867 { 0x06, 0x10e4 },
1868 { 0x06, 0x8351 },
1869 { 0x06, 0x5801 },
1870 { 0x06, 0x9fea },
1871 { 0x06, 0xd000 },
1872 { 0x06, 0xd180 },
1873 { 0x06, 0x1f66 },
1874 { 0x06, 0xe2f8 },
1875 { 0x06, 0xeae3 },
1876 { 0x06, 0xf8eb },
1877 { 0x06, 0x5af8 },
1878 { 0x06, 0x1e20 },
1879 { 0x06, 0xe6f8 },
1880 { 0x06, 0xeae5 },
1881 { 0x06, 0xf8eb },
1882 { 0x06, 0xd302 },
1883 { 0x06, 0xb3fe },
1884 { 0x06, 0xe2f8 },
1885 { 0x06, 0x7cef },
1886 { 0x06, 0x325b },
1887 { 0x06, 0x80e3 },
1888 { 0x06, 0xf87d },
1889 { 0x06, 0x9e03 },
1890 { 0x06, 0x7dff },
1891 { 0x06, 0xff0d },
1892 { 0x06, 0x581c },
1893 { 0x06, 0x551a },
1894 { 0x06, 0x6511 },
1895 { 0x06, 0xa190 },
1896 { 0x06, 0xd3e2 },
1897 { 0x06, 0x8348 },
1898 { 0x06, 0xe383 },
1899 { 0x06, 0x491b },
1900 { 0x06, 0x56ab },
1901 { 0x06, 0x08ef },
1902 { 0x06, 0x56e6 },
1903 { 0x06, 0x8348 },
1904 { 0x06, 0xe783 },
1905 { 0x06, 0x4910 },
1906 { 0x06, 0xd180 },
1907 { 0x06, 0x1f66 },
1908 { 0x06, 0xa004 },
1909 { 0x06, 0xb9e2 },
1910 { 0x06, 0x8348 },
1911 { 0x06, 0xe383 },
1912 { 0x06, 0x49ef },
1913 { 0x06, 0x65e2 },
1914 { 0x06, 0x834a },
1915 { 0x06, 0xe383 },
1916 { 0x06, 0x4b1b },
1917 { 0x06, 0x56aa },
1918 { 0x06, 0x0eef },
1919 { 0x06, 0x56e6 },
1920 { 0x06, 0x834a },
1921 { 0x06, 0xe783 },
1922 { 0x06, 0x4be2 },
1923 { 0x06, 0x834d },
1924 { 0x06, 0xe683 },
1925 { 0x06, 0x4ce0 },
1926 { 0x06, 0x834d },
1927 { 0x06, 0xa000 },
1928 { 0x06, 0x0caf },
1929 { 0x06, 0x81dc },
1930 { 0x06, 0xe083 },
1931 { 0x06, 0x4d10 },
1932 { 0x06, 0xe483 },
1933 { 0x06, 0x4dae },
1934 { 0x06, 0x0480 },
1935 { 0x06, 0xe483 },
1936 { 0x06, 0x4de0 },
1937 { 0x06, 0x834e },
1938 { 0x06, 0x7803 },
1939 { 0x06, 0x9e0b },
1940 { 0x06, 0xe083 },
1941 { 0x06, 0x4e78 },
1942 { 0x06, 0x049e },
1943 { 0x06, 0x04ee },
1944 { 0x06, 0x834e },
1945 { 0x06, 0x02e0 },
1946 { 0x06, 0x8332 },
1947 { 0x06, 0xe183 },
1948 { 0x06, 0x3359 },
1949 { 0x06, 0x0fe2 },
1950 { 0x06, 0x834d },
1951 { 0x06, 0x0c24 },
1952 { 0x06, 0x5af0 },
1953 { 0x06, 0x1e12 },
1954 { 0x06, 0xe4f8 },
1955 { 0x06, 0x8ce5 },
1956 { 0x06, 0xf88d },
1957 { 0x06, 0xe083 },
1958 { 0x06, 0x30e1 },
1959 { 0x06, 0x8331 },
1960 { 0x06, 0x6801 },
1961 { 0x06, 0xe4f8 },
1962 { 0x06, 0x8ae5 },
1963 { 0x06, 0xf88b },
1964 { 0x06, 0xae37 },
1965 { 0x06, 0xee83 },
1966 { 0x06, 0x4e03 },
1967 { 0x06, 0xe083 },
1968 { 0x06, 0x4ce1 },
1969 { 0x06, 0x834d },
1970 { 0x06, 0x1b01 },
1971 { 0x06, 0x9e04 },
1972 { 0x06, 0xaaa1 },
1973 { 0x06, 0xaea8 },
1974 { 0x06, 0xee83 },
1975 { 0x06, 0x4e04 },
1976 { 0x06, 0xee83 },
1977 { 0x06, 0x4f00 },
1978 { 0x06, 0xaeab },
1979 { 0x06, 0xe083 },
1980 { 0x06, 0x4f78 },
1981 { 0x06, 0x039f },
1982 { 0x06, 0x14ee },
1983 { 0x06, 0x834e },
1984 { 0x06, 0x05d2 },
1985 { 0x06, 0x40d6 },
1986 { 0x06, 0x5554 },
1987 { 0x06, 0x0282 },
1988 { 0x06, 0x17d2 },
1989 { 0x06, 0xa0d6 },
1990 { 0x06, 0xba00 },
1991 { 0x06, 0x0282 },
1992 { 0x06, 0x17fe },
1993 { 0x06, 0xfdfc },
1994 { 0x06, 0x05f8 },
1995 { 0x06, 0xe0f8 },
1996 { 0x06, 0x60e1 },
1997 { 0x06, 0xf861 },
1998 { 0x06, 0x6802 },
1999 { 0x06, 0xe4f8 },
2000 { 0x06, 0x60e5 },
2001 { 0x06, 0xf861 },
2002 { 0x06, 0xe0f8 },
2003 { 0x06, 0x48e1 },
2004 { 0x06, 0xf849 },
2005 { 0x06, 0x580f },
2006 { 0x06, 0x1e02 },
2007 { 0x06, 0xe4f8 },
2008 { 0x06, 0x48e5 },
2009 { 0x06, 0xf849 },
2010 { 0x06, 0xd000 },
2011 { 0x06, 0x0282 },
2012 { 0x06, 0x5bbf },
2013 { 0x06, 0x8350 },
2014 { 0x06, 0xef46 },
2015 { 0x06, 0xdc19 },
2016 { 0x06, 0xddd0 },
2017 { 0x06, 0x0102 },
2018 { 0x06, 0x825b },
2019 { 0x06, 0x0282 },
2020 { 0x06, 0x77e0 },
2021 { 0x06, 0xf860 },
2022 { 0x06, 0xe1f8 },
2023 { 0x06, 0x6158 },
2024 { 0x06, 0xfde4 },
2025 { 0x06, 0xf860 },
2026 { 0x06, 0xe5f8 },
2027 { 0x06, 0x61fc },
2028 { 0x06, 0x04f9 },
2029 { 0x06, 0xfafb },
2030 { 0x06, 0xc6bf },
2031 { 0x06, 0xf840 },
2032 { 0x06, 0xbe83 },
2033 { 0x06, 0x50a0 },
2034 { 0x06, 0x0101 },
2035 { 0x06, 0x071b },
2036 { 0x06, 0x89cf },
2037 { 0x06, 0xd208 },
2038 { 0x06, 0xebdb },
2039 { 0x06, 0x19b2 },
2040 { 0x06, 0xfbff },
2041 { 0x06, 0xfefd },
2042 { 0x06, 0x04f8 },
2043 { 0x06, 0xe0f8 },
2044 { 0x06, 0x48e1 },
2045 { 0x06, 0xf849 },
2046 { 0x06, 0x6808 },
2047 { 0x06, 0xe4f8 },
2048 { 0x06, 0x48e5 },
2049 { 0x06, 0xf849 },
2050 { 0x06, 0x58f7 },
2051 { 0x06, 0xe4f8 },
2052 { 0x06, 0x48e5 },
2053 { 0x06, 0xf849 },
2054 { 0x06, 0xfc04 },
2055 { 0x06, 0x4d20 },
2056 { 0x06, 0x0002 },
2057 { 0x06, 0x4e22 },
2058 { 0x06, 0x0002 },
2059 { 0x06, 0x4ddf },
2060 { 0x06, 0xff01 },
2061 { 0x06, 0x4edd },
2062 { 0x06, 0xff01 },
2063 { 0x05, 0x83d4 },
2064 { 0x06, 0x8000 },
2065 { 0x05, 0x83d8 },
2066 { 0x06, 0x8051 },
2067 { 0x02, 0x6010 },
2068 { 0x03, 0xdc00 },
2069 { 0x05, 0xfff6 },
2070 { 0x06, 0x00fc },
1671 { 0x1f, 0x0000 }, 2071 { 0x1f, 0x0000 },
1672 { 0x14, 0x0060 }, 2072
1673 { 0x1f, 0x0000 }, 2073 { 0x1f, 0x0000 },
1674 { 0x0d, 0xf8a0 }, 2074 { 0x0d, 0xf880 },
2075 { 0x1f, 0x0000 }
2076 };
2077
2078 rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
2079
2080 mdio_write(ioaddr, 0x1f, 0x0002);
2081 mdio_plus_minus(ioaddr, 0x0b, 0x0010, 0x00ef);
2082 mdio_plus_minus(ioaddr, 0x0c, 0xa200, 0x5d00);
2083
2084 rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
2085
2086 if (rtl8168d_efuse_read(ioaddr, 0x01) == 0xb1) {
2087 struct phy_reg phy_reg_init[] = {
2088 { 0x1f, 0x0002 },
2089 { 0x05, 0x669a },
2090 { 0x1f, 0x0005 },
2091 { 0x05, 0x8330 },
2092 { 0x06, 0x669a },
2093 { 0x1f, 0x0002 }
2094 };
2095 int val;
2096
2097 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2098
2099 val = mdio_read(ioaddr, 0x0d);
2100
2101 if ((val & 0x00ff) != 0x006c) {
2102 u32 set[] = {
2103 0x0065, 0x0066, 0x0067, 0x0068,
2104 0x0069, 0x006a, 0x006b, 0x006c
2105 };
2106 int i;
2107
2108 mdio_write(ioaddr, 0x1f, 0x0002);
2109
2110 val &= 0xff00;
2111 for (i = 0; i < ARRAY_SIZE(set); i++)
2112 mdio_write(ioaddr, 0x0d, val | set[i]);
2113 }
2114 } else {
2115 struct phy_reg phy_reg_init[] = {
2116 { 0x1f, 0x0002 },
2117 { 0x05, 0x6662 },
2118 { 0x1f, 0x0005 },
2119 { 0x05, 0x8330 },
2120 { 0x06, 0x6662 }
2121 };
2122
2123 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2124 }
2125
2126 mdio_write(ioaddr, 0x1f, 0x0002);
2127 mdio_patch(ioaddr, 0x0d, 0x0300);
2128 mdio_patch(ioaddr, 0x0f, 0x0010);
2129
2130 mdio_write(ioaddr, 0x1f, 0x0002);
2131 mdio_plus_minus(ioaddr, 0x02, 0x0100, 0x0600);
2132 mdio_plus_minus(ioaddr, 0x03, 0x0000, 0xe000);
2133
2134 rtl_phy_write(ioaddr, phy_reg_init_2, ARRAY_SIZE(phy_reg_init_2));
2135}
2136
2137static void rtl8168d_2_hw_phy_config(void __iomem *ioaddr)
2138{
2139 static struct phy_reg phy_reg_init_0[] = {
2140 { 0x1f, 0x0001 },
2141 { 0x06, 0x4064 },
2142 { 0x07, 0x2863 },
2143 { 0x08, 0x059c },
2144 { 0x09, 0x26b4 },
2145 { 0x0a, 0x6a19 },
2146 { 0x0b, 0xdcc8 },
2147 { 0x10, 0xf06d },
2148 { 0x14, 0x7f68 },
2149 { 0x18, 0x7fd9 },
2150 { 0x1c, 0xf0ff },
2151 { 0x1d, 0x3d9c },
2152 { 0x1f, 0x0003 },
2153 { 0x12, 0xf49f },
2154 { 0x13, 0x070b },
2155 { 0x1a, 0x05ad },
2156 { 0x14, 0x94c0 },
2157
2158 { 0x1f, 0x0002 },
2159 { 0x06, 0x5561 },
1675 { 0x1f, 0x0005 }, 2160 { 0x1f, 0x0005 },
1676 { 0x05, 0xffc2 } 2161 { 0x05, 0x8332 },
2162 { 0x06, 0x5561 }
2163 };
2164 static struct phy_reg phy_reg_init_1[] = {
2165 { 0x1f, 0x0005 },
2166 { 0x05, 0xffc2 },
2167 { 0x1f, 0x0005 },
2168 { 0x05, 0x8000 },
2169 { 0x06, 0xf8f9 },
2170 { 0x06, 0xfaee },
2171 { 0x06, 0xf8ea },
2172 { 0x06, 0x00ee },
2173 { 0x06, 0xf8eb },
2174 { 0x06, 0x00e2 },
2175 { 0x06, 0xf87c },
2176 { 0x06, 0xe3f8 },
2177 { 0x06, 0x7da5 },
2178 { 0x06, 0x1111 },
2179 { 0x06, 0x12d2 },
2180 { 0x06, 0x40d6 },
2181 { 0x06, 0x4444 },
2182 { 0x06, 0x0281 },
2183 { 0x06, 0xc6d2 },
2184 { 0x06, 0xa0d6 },
2185 { 0x06, 0xaaaa },
2186 { 0x06, 0x0281 },
2187 { 0x06, 0xc6ae },
2188 { 0x06, 0x0fa5 },
2189 { 0x06, 0x4444 },
2190 { 0x06, 0x02ae },
2191 { 0x06, 0x4da5 },
2192 { 0x06, 0xaaaa },
2193 { 0x06, 0x02ae },
2194 { 0x06, 0x47af },
2195 { 0x06, 0x81c2 },
2196 { 0x06, 0xee83 },
2197 { 0x06, 0x4e00 },
2198 { 0x06, 0xee83 },
2199 { 0x06, 0x4d0f },
2200 { 0x06, 0xee83 },
2201 { 0x06, 0x4c0f },
2202 { 0x06, 0xee83 },
2203 { 0x06, 0x4f00 },
2204 { 0x06, 0xee83 },
2205 { 0x06, 0x5100 },
2206 { 0x06, 0xee83 },
2207 { 0x06, 0x4aff },
2208 { 0x06, 0xee83 },
2209 { 0x06, 0x4bff },
2210 { 0x06, 0xe083 },
2211 { 0x06, 0x30e1 },
2212 { 0x06, 0x8331 },
2213 { 0x06, 0x58fe },
2214 { 0x06, 0xe4f8 },
2215 { 0x06, 0x8ae5 },
2216 { 0x06, 0xf88b },
2217 { 0x06, 0xe083 },
2218 { 0x06, 0x32e1 },
2219 { 0x06, 0x8333 },
2220 { 0x06, 0x590f },
2221 { 0x06, 0xe283 },
2222 { 0x06, 0x4d0c },
2223 { 0x06, 0x245a },
2224 { 0x06, 0xf01e },
2225 { 0x06, 0x12e4 },
2226 { 0x06, 0xf88c },
2227 { 0x06, 0xe5f8 },
2228 { 0x06, 0x8daf },
2229 { 0x06, 0x81c2 },
2230 { 0x06, 0xe083 },
2231 { 0x06, 0x4f10 },
2232 { 0x06, 0xe483 },
2233 { 0x06, 0x4fe0 },
2234 { 0x06, 0x834e },
2235 { 0x06, 0x7800 },
2236 { 0x06, 0x9f0a },
2237 { 0x06, 0xe083 },
2238 { 0x06, 0x4fa0 },
2239 { 0x06, 0x10a5 },
2240 { 0x06, 0xee83 },
2241 { 0x06, 0x4e01 },
2242 { 0x06, 0xe083 },
2243 { 0x06, 0x4e78 },
2244 { 0x06, 0x059e },
2245 { 0x06, 0x9ae0 },
2246 { 0x06, 0x834e },
2247 { 0x06, 0x7804 },
2248 { 0x06, 0x9e10 },
2249 { 0x06, 0xe083 },
2250 { 0x06, 0x4e78 },
2251 { 0x06, 0x039e },
2252 { 0x06, 0x0fe0 },
2253 { 0x06, 0x834e },
2254 { 0x06, 0x7801 },
2255 { 0x06, 0x9e05 },
2256 { 0x06, 0xae0c },
2257 { 0x06, 0xaf81 },
2258 { 0x06, 0xa7af },
2259 { 0x06, 0x8152 },
2260 { 0x06, 0xaf81 },
2261 { 0x06, 0x8baf },
2262 { 0x06, 0x81c2 },
2263 { 0x06, 0xee83 },
2264 { 0x06, 0x4800 },
2265 { 0x06, 0xee83 },
2266 { 0x06, 0x4900 },
2267 { 0x06, 0xe083 },
2268 { 0x06, 0x5110 },
2269 { 0x06, 0xe483 },
2270 { 0x06, 0x5158 },
2271 { 0x06, 0x019f },
2272 { 0x06, 0xead0 },
2273 { 0x06, 0x00d1 },
2274 { 0x06, 0x801f },
2275 { 0x06, 0x66e2 },
2276 { 0x06, 0xf8ea },
2277 { 0x06, 0xe3f8 },
2278 { 0x06, 0xeb5a },
2279 { 0x06, 0xf81e },
2280 { 0x06, 0x20e6 },
2281 { 0x06, 0xf8ea },
2282 { 0x06, 0xe5f8 },
2283 { 0x06, 0xebd3 },
2284 { 0x06, 0x02b3 },
2285 { 0x06, 0xfee2 },
2286 { 0x06, 0xf87c },
2287 { 0x06, 0xef32 },
2288 { 0x06, 0x5b80 },
2289 { 0x06, 0xe3f8 },
2290 { 0x06, 0x7d9e },
2291 { 0x06, 0x037d },
2292 { 0x06, 0xffff },
2293 { 0x06, 0x0d58 },
2294 { 0x06, 0x1c55 },
2295 { 0x06, 0x1a65 },
2296 { 0x06, 0x11a1 },
2297 { 0x06, 0x90d3 },
2298 { 0x06, 0xe283 },
2299 { 0x06, 0x48e3 },
2300 { 0x06, 0x8349 },
2301 { 0x06, 0x1b56 },
2302 { 0x06, 0xab08 },
2303 { 0x06, 0xef56 },
2304 { 0x06, 0xe683 },
2305 { 0x06, 0x48e7 },
2306 { 0x06, 0x8349 },
2307 { 0x06, 0x10d1 },
2308 { 0x06, 0x801f },
2309 { 0x06, 0x66a0 },
2310 { 0x06, 0x04b9 },
2311 { 0x06, 0xe283 },
2312 { 0x06, 0x48e3 },
2313 { 0x06, 0x8349 },
2314 { 0x06, 0xef65 },
2315 { 0x06, 0xe283 },
2316 { 0x06, 0x4ae3 },
2317 { 0x06, 0x834b },
2318 { 0x06, 0x1b56 },
2319 { 0x06, 0xaa0e },
2320 { 0x06, 0xef56 },
2321 { 0x06, 0xe683 },
2322 { 0x06, 0x4ae7 },
2323 { 0x06, 0x834b },
2324 { 0x06, 0xe283 },
2325 { 0x06, 0x4de6 },
2326 { 0x06, 0x834c },
2327 { 0x06, 0xe083 },
2328 { 0x06, 0x4da0 },
2329 { 0x06, 0x000c },
2330 { 0x06, 0xaf81 },
2331 { 0x06, 0x8be0 },
2332 { 0x06, 0x834d },
2333 { 0x06, 0x10e4 },
2334 { 0x06, 0x834d },
2335 { 0x06, 0xae04 },
2336 { 0x06, 0x80e4 },
2337 { 0x06, 0x834d },
2338 { 0x06, 0xe083 },
2339 { 0x06, 0x4e78 },
2340 { 0x06, 0x039e },
2341 { 0x06, 0x0be0 },
2342 { 0x06, 0x834e },
2343 { 0x06, 0x7804 },
2344 { 0x06, 0x9e04 },
2345 { 0x06, 0xee83 },
2346 { 0x06, 0x4e02 },
2347 { 0x06, 0xe083 },
2348 { 0x06, 0x32e1 },
2349 { 0x06, 0x8333 },
2350 { 0x06, 0x590f },
2351 { 0x06, 0xe283 },
2352 { 0x06, 0x4d0c },
2353 { 0x06, 0x245a },
2354 { 0x06, 0xf01e },
2355 { 0x06, 0x12e4 },
2356 { 0x06, 0xf88c },
2357 { 0x06, 0xe5f8 },
2358 { 0x06, 0x8de0 },
2359 { 0x06, 0x8330 },
2360 { 0x06, 0xe183 },
2361 { 0x06, 0x3168 },
2362 { 0x06, 0x01e4 },
2363 { 0x06, 0xf88a },
2364 { 0x06, 0xe5f8 },
2365 { 0x06, 0x8bae },
2366 { 0x06, 0x37ee },
2367 { 0x06, 0x834e },
2368 { 0x06, 0x03e0 },
2369 { 0x06, 0x834c },
2370 { 0x06, 0xe183 },
2371 { 0x06, 0x4d1b },
2372 { 0x06, 0x019e },
2373 { 0x06, 0x04aa },
2374 { 0x06, 0xa1ae },
2375 { 0x06, 0xa8ee },
2376 { 0x06, 0x834e },
2377 { 0x06, 0x04ee },
2378 { 0x06, 0x834f },
2379 { 0x06, 0x00ae },
2380 { 0x06, 0xabe0 },
2381 { 0x06, 0x834f },
2382 { 0x06, 0x7803 },
2383 { 0x06, 0x9f14 },
2384 { 0x06, 0xee83 },
2385 { 0x06, 0x4e05 },
2386 { 0x06, 0xd240 },
2387 { 0x06, 0xd655 },
2388 { 0x06, 0x5402 },
2389 { 0x06, 0x81c6 },
2390 { 0x06, 0xd2a0 },
2391 { 0x06, 0xd6ba },
2392 { 0x06, 0x0002 },
2393 { 0x06, 0x81c6 },
2394 { 0x06, 0xfefd },
2395 { 0x06, 0xfc05 },
2396 { 0x06, 0xf8e0 },
2397 { 0x06, 0xf860 },
2398 { 0x06, 0xe1f8 },
2399 { 0x06, 0x6168 },
2400 { 0x06, 0x02e4 },
2401 { 0x06, 0xf860 },
2402 { 0x06, 0xe5f8 },
2403 { 0x06, 0x61e0 },
2404 { 0x06, 0xf848 },
2405 { 0x06, 0xe1f8 },
2406 { 0x06, 0x4958 },
2407 { 0x06, 0x0f1e },
2408 { 0x06, 0x02e4 },
2409 { 0x06, 0xf848 },
2410 { 0x06, 0xe5f8 },
2411 { 0x06, 0x49d0 },
2412 { 0x06, 0x0002 },
2413 { 0x06, 0x820a },
2414 { 0x06, 0xbf83 },
2415 { 0x06, 0x50ef },
2416 { 0x06, 0x46dc },
2417 { 0x06, 0x19dd },
2418 { 0x06, 0xd001 },
2419 { 0x06, 0x0282 },
2420 { 0x06, 0x0a02 },
2421 { 0x06, 0x8226 },
2422 { 0x06, 0xe0f8 },
2423 { 0x06, 0x60e1 },
2424 { 0x06, 0xf861 },
2425 { 0x06, 0x58fd },
2426 { 0x06, 0xe4f8 },
2427 { 0x06, 0x60e5 },
2428 { 0x06, 0xf861 },
2429 { 0x06, 0xfc04 },
2430 { 0x06, 0xf9fa },
2431 { 0x06, 0xfbc6 },
2432 { 0x06, 0xbff8 },
2433 { 0x06, 0x40be },
2434 { 0x06, 0x8350 },
2435 { 0x06, 0xa001 },
2436 { 0x06, 0x0107 },
2437 { 0x06, 0x1b89 },
2438 { 0x06, 0xcfd2 },
2439 { 0x06, 0x08eb },
2440 { 0x06, 0xdb19 },
2441 { 0x06, 0xb2fb },
2442 { 0x06, 0xfffe },
2443 { 0x06, 0xfd04 },
2444 { 0x06, 0xf8e0 },
2445 { 0x06, 0xf848 },
2446 { 0x06, 0xe1f8 },
2447 { 0x06, 0x4968 },
2448 { 0x06, 0x08e4 },
2449 { 0x06, 0xf848 },
2450 { 0x06, 0xe5f8 },
2451 { 0x06, 0x4958 },
2452 { 0x06, 0xf7e4 },
2453 { 0x06, 0xf848 },
2454 { 0x06, 0xe5f8 },
2455 { 0x06, 0x49fc },
2456 { 0x06, 0x044d },
2457 { 0x06, 0x2000 },
2458 { 0x06, 0x024e },
2459 { 0x06, 0x2200 },
2460 { 0x06, 0x024d },
2461 { 0x06, 0xdfff },
2462 { 0x06, 0x014e },
2463 { 0x06, 0xddff },
2464 { 0x06, 0x0100 },
2465 { 0x05, 0x83d8 },
2466 { 0x06, 0x8000 },
2467 { 0x03, 0xdc00 },
2468 { 0x05, 0xfff6 },
2469 { 0x06, 0x00fc },
2470 { 0x1f, 0x0000 },
2471
2472 { 0x1f, 0x0000 },
2473 { 0x0d, 0xf880 },
2474 { 0x1f, 0x0000 }
1677 }; 2475 };
1678 2476
1679 rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0)); 2477 rtl_phy_write(ioaddr, phy_reg_init_0, ARRAY_SIZE(phy_reg_init_0));
1680 2478
1681 if (mdio_read(ioaddr, 0x06) == 0xc400) { 2479 if (rtl8168d_efuse_read(ioaddr, 0x01) == 0xb1) {
1682 struct phy_reg phy_reg_init_1[] = { 2480 struct phy_reg phy_reg_init[] = {
2481 { 0x1f, 0x0002 },
2482 { 0x05, 0x669a },
1683 { 0x1f, 0x0005 }, 2483 { 0x1f, 0x0005 },
1684 { 0x01, 0x0300 }, 2484 { 0x05, 0x8330 },
1685 { 0x1f, 0x0000 }, 2485 { 0x06, 0x669a },
1686 { 0x11, 0x401c }, 2486
1687 { 0x16, 0x4100 }, 2487 { 0x1f, 0x0002 }
2488 };
2489 int val;
2490
2491 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
2492
2493 val = mdio_read(ioaddr, 0x0d);
2494 if ((val & 0x00ff) != 0x006c) {
2495 u32 set[] = {
2496 0x0065, 0x0066, 0x0067, 0x0068,
2497 0x0069, 0x006a, 0x006b, 0x006c
2498 };
2499 int i;
2500
2501 mdio_write(ioaddr, 0x1f, 0x0002);
2502
2503 val &= 0xff00;
2504 for (i = 0; i < ARRAY_SIZE(set); i++)
2505 mdio_write(ioaddr, 0x0d, val | set[i]);
2506 }
2507 } else {
2508 struct phy_reg phy_reg_init[] = {
2509 { 0x1f, 0x0002 },
2510 { 0x05, 0x2642 },
1688 { 0x1f, 0x0005 }, 2511 { 0x1f, 0x0005 },
1689 { 0x07, 0x0010 }, 2512 { 0x05, 0x8330 },
1690 { 0x05, 0x83dc }, 2513 { 0x06, 0x2642 }
1691 { 0x06, 0x087d },
1692 { 0x05, 0x8300 },
1693 { 0x06, 0x0101 },
1694 { 0x06, 0x05f8 },
1695 { 0x06, 0xf9fa },
1696 { 0x06, 0xfbef },
1697 { 0x06, 0x79e2 },
1698 { 0x06, 0x835f },
1699 { 0x06, 0xe0f8 },
1700 { 0x06, 0x9ae1 },
1701 { 0x06, 0xf89b },
1702 { 0x06, 0xef31 },
1703 { 0x06, 0x3b65 },
1704 { 0x06, 0xaa07 },
1705 { 0x06, 0x81e4 },
1706 { 0x06, 0xf89a },
1707 { 0x06, 0xe5f8 },
1708 { 0x06, 0x9baf },
1709 { 0x06, 0x06ae },
1710 { 0x05, 0x83dc },
1711 { 0x06, 0x8300 },
1712 }; 2514 };
1713 2515
1714 rtl_phy_write(ioaddr, phy_reg_init_1, 2516 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
1715 ARRAY_SIZE(phy_reg_init_1));
1716 } 2517 }
1717 2518
1718 mdio_write(ioaddr, 0x1f, 0x0000); 2519 mdio_write(ioaddr, 0x1f, 0x0002);
2520 mdio_plus_minus(ioaddr, 0x02, 0x0100, 0x0600);
2521 mdio_plus_minus(ioaddr, 0x03, 0x0000, 0xe000);
2522
2523 mdio_write(ioaddr, 0x1f, 0x0001);
2524 mdio_write(ioaddr, 0x17, 0x0cc0);
2525
2526 mdio_write(ioaddr, 0x1f, 0x0002);
2527 mdio_patch(ioaddr, 0x0f, 0x0017);
2528
2529 rtl_phy_write(ioaddr, phy_reg_init_1, ARRAY_SIZE(phy_reg_init_1));
2530}
2531
2532static void rtl8168d_3_hw_phy_config(void __iomem *ioaddr)
2533{
2534 struct phy_reg phy_reg_init[] = {
2535 { 0x1f, 0x0002 },
2536 { 0x10, 0x0008 },
2537 { 0x0d, 0x006c },
2538
2539 { 0x1f, 0x0000 },
2540 { 0x0d, 0xf880 },
2541
2542 { 0x1f, 0x0001 },
2543 { 0x17, 0x0cc0 },
2544
2545 { 0x1f, 0x0001 },
2546 { 0x0b, 0xa4d8 },
2547 { 0x09, 0x281c },
2548 { 0x07, 0x2883 },
2549 { 0x0a, 0x6b35 },
2550 { 0x1d, 0x3da4 },
2551 { 0x1c, 0xeffd },
2552 { 0x14, 0x7f52 },
2553 { 0x18, 0x7fc6 },
2554 { 0x08, 0x0601 },
2555 { 0x06, 0x4063 },
2556 { 0x10, 0xf074 },
2557 { 0x1f, 0x0003 },
2558 { 0x13, 0x0789 },
2559 { 0x12, 0xf4bd },
2560 { 0x1a, 0x04fd },
2561 { 0x14, 0x84b0 },
2562 { 0x1f, 0x0000 },
2563 { 0x00, 0x9200 },
2564
2565 { 0x1f, 0x0005 },
2566 { 0x01, 0x0340 },
2567 { 0x1f, 0x0001 },
2568 { 0x04, 0x4000 },
2569 { 0x03, 0x1d21 },
2570 { 0x02, 0x0c32 },
2571 { 0x01, 0x0200 },
2572 { 0x00, 0x5554 },
2573 { 0x04, 0x4800 },
2574 { 0x04, 0x4000 },
2575 { 0x04, 0xf000 },
2576 { 0x03, 0xdf01 },
2577 { 0x02, 0xdf20 },
2578 { 0x01, 0x101a },
2579 { 0x00, 0xa0ff },
2580 { 0x04, 0xf800 },
2581 { 0x04, 0xf000 },
2582 { 0x1f, 0x0000 },
2583
2584 { 0x1f, 0x0007 },
2585 { 0x1e, 0x0023 },
2586 { 0x16, 0x0000 },
2587 { 0x1f, 0x0000 }
2588 };
2589
2590 rtl_phy_write(ioaddr, phy_reg_init, ARRAY_SIZE(phy_reg_init));
1719} 2591}
1720 2592
1721static void rtl8102e_hw_phy_config(void __iomem *ioaddr) 2593static void rtl8102e_hw_phy_config(void __iomem *ioaddr)
@@ -1792,7 +2664,13 @@ static void rtl_hw_phy_config(struct net_device *dev)
1792 rtl8168cp_2_hw_phy_config(ioaddr); 2664 rtl8168cp_2_hw_phy_config(ioaddr);
1793 break; 2665 break;
1794 case RTL_GIGA_MAC_VER_25: 2666 case RTL_GIGA_MAC_VER_25:
1795 rtl8168d_hw_phy_config(ioaddr); 2667 rtl8168d_1_hw_phy_config(ioaddr);
2668 break;
2669 case RTL_GIGA_MAC_VER_26:
2670 rtl8168d_2_hw_phy_config(ioaddr);
2671 break;
2672 case RTL_GIGA_MAC_VER_27:
2673 rtl8168d_3_hw_phy_config(ioaddr);
1796 break; 2674 break;
1797 2675
1798 default: 2676 default:
@@ -2322,6 +3200,14 @@ rtl8169_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
2322 } 3200 }
2323 3201
2324 rtl8169_init_phy(dev, tp); 3202 rtl8169_init_phy(dev, tp);
3203
3204 /*
3205 * Pretend we are using VLANs; This bypasses a nasty bug where
3206 * Interrupts stop flowing on high load on 8110SCd controllers.
3207 */
3208 if (tp->mac_version == RTL_GIGA_MAC_VER_05)
3209 RTL_W16(CPlusCmd, RTL_R16(CPlusCmd) | RxVlan);
3210
2325 device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL); 3211 device_set_wakeup_enable(&pdev->dev, tp->features & RTL_FEATURE_WOL);
2326 3212
2327out: 3213out:
@@ -2357,9 +3243,9 @@ static void __devexit rtl8169_remove_one(struct pci_dev *pdev)
2357static void rtl8169_set_rxbufsize(struct rtl8169_private *tp, 3243static void rtl8169_set_rxbufsize(struct rtl8169_private *tp,
2358 struct net_device *dev) 3244 struct net_device *dev)
2359{ 3245{
2360 unsigned int mtu = dev->mtu; 3246 unsigned int max_frame = dev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
2361 3247
2362 tp->rx_buf_sz = (mtu > RX_BUF_SIZE) ? mtu + ETH_HLEN + 8 : RX_BUF_SIZE; 3248 tp->rx_buf_sz = (max_frame > RX_BUF_SIZE) ? max_frame : RX_BUF_SIZE;
2363} 3249}
2364 3250
2365static int rtl8169_open(struct net_device *dev) 3251static int rtl8169_open(struct net_device *dev)
@@ -2493,7 +3379,7 @@ static u16 rtl_rw_cpluscmd(void __iomem *ioaddr)
2493static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz) 3379static void rtl_set_rx_max_size(void __iomem *ioaddr, unsigned int rx_buf_sz)
2494{ 3380{
2495 /* Low hurts. Let's disable the filtering. */ 3381 /* Low hurts. Let's disable the filtering. */
2496 RTL_W16(RxMaxSize, rx_buf_sz); 3382 RTL_W16(RxMaxSize, rx_buf_sz + 1);
2497} 3383}
2498 3384
2499static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version) 3385static void rtl8169_set_magic_reg(void __iomem *ioaddr, unsigned mac_version)
@@ -2863,6 +3749,8 @@ static void rtl_hw_start_8168(struct net_device *dev)
2863 break; 3749 break;
2864 3750
2865 case RTL_GIGA_MAC_VER_25: 3751 case RTL_GIGA_MAC_VER_25:
3752 case RTL_GIGA_MAC_VER_26:
3753 case RTL_GIGA_MAC_VER_27:
2866 rtl_hw_start_8168d(ioaddr, pdev); 3754 rtl_hw_start_8168d(ioaddr, pdev);
2867 break; 3755 break;
2868 3756
diff --git a/drivers/net/s2io.c b/drivers/net/s2io.c
index ddccf5fa56b6..0dd7839322bc 100644
--- a/drivers/net/s2io.c
+++ b/drivers/net/s2io.c
@@ -3494,6 +3494,7 @@ static void s2io_reset(struct s2io_nic *sp)
3494 3494
3495 /* Restore the PCI state saved during initialization. */ 3495 /* Restore the PCI state saved during initialization. */
3496 pci_restore_state(sp->pdev); 3496 pci_restore_state(sp->pdev);
3497 pci_save_state(sp->pdev);
3497 pci_read_config_word(sp->pdev, 0x2, &val16); 3498 pci_read_config_word(sp->pdev, 0x2, &val16);
3498 if (check_pci_device_id(val16) != (u16)PCI_ANY_ID) 3499 if (check_pci_device_id(val16) != (u16)PCI_ANY_ID)
3499 break; 3500 break;
diff --git a/drivers/net/sfc/rx.c b/drivers/net/sfc/rx.c
index 01f9432c31ef..98bff5ada09a 100644
--- a/drivers/net/sfc/rx.c
+++ b/drivers/net/sfc/rx.c
@@ -444,7 +444,8 @@ static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
444 * the appropriate LRO method 444 * the appropriate LRO method
445 */ 445 */
446static void efx_rx_packet_lro(struct efx_channel *channel, 446static void efx_rx_packet_lro(struct efx_channel *channel,
447 struct efx_rx_buffer *rx_buf) 447 struct efx_rx_buffer *rx_buf,
448 bool checksummed)
448{ 449{
449 struct napi_struct *napi = &channel->napi_str; 450 struct napi_struct *napi = &channel->napi_str;
450 451
@@ -466,7 +467,8 @@ static void efx_rx_packet_lro(struct efx_channel *channel,
466 skb->len = rx_buf->len; 467 skb->len = rx_buf->len;
467 skb->data_len = rx_buf->len; 468 skb->data_len = rx_buf->len;
468 skb->truesize += rx_buf->len; 469 skb->truesize += rx_buf->len;
469 skb->ip_summed = CHECKSUM_UNNECESSARY; 470 skb->ip_summed =
471 checksummed ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE;
470 472
471 napi_gro_frags(napi); 473 napi_gro_frags(napi);
472 474
@@ -475,6 +477,7 @@ out:
475 rx_buf->page = NULL; 477 rx_buf->page = NULL;
476 } else { 478 } else {
477 EFX_BUG_ON_PARANOID(!rx_buf->skb); 479 EFX_BUG_ON_PARANOID(!rx_buf->skb);
480 EFX_BUG_ON_PARANOID(!checksummed);
478 481
479 napi_gro_receive(napi, rx_buf->skb); 482 napi_gro_receive(napi, rx_buf->skb);
480 rx_buf->skb = NULL; 483 rx_buf->skb = NULL;
@@ -570,7 +573,7 @@ void __efx_rx_packet(struct efx_channel *channel,
570 } 573 }
571 574
572 if (likely(checksummed || rx_buf->page)) { 575 if (likely(checksummed || rx_buf->page)) {
573 efx_rx_packet_lro(channel, rx_buf); 576 efx_rx_packet_lro(channel, rx_buf, checksummed);
574 goto done; 577 goto done;
575 } 578 }
576 579
diff --git a/drivers/net/sfc/sfe4001.c b/drivers/net/sfc/sfe4001.c
index cee00ad49b57..49eb91b5f50c 100644
--- a/drivers/net/sfc/sfe4001.c
+++ b/drivers/net/sfc/sfe4001.c
@@ -188,7 +188,7 @@ static int sfn4111t_reset(struct efx_nic *efx)
188 efx_oword_t reg; 188 efx_oword_t reg;
189 189
190 /* GPIO 3 and the GPIO register are shared with I2C, so block that */ 190 /* GPIO 3 and the GPIO register are shared with I2C, so block that */
191 mutex_lock(&efx->i2c_adap.bus_lock); 191 i2c_lock_adapter(&efx->i2c_adap);
192 192
193 /* Pull RST_N (GPIO 2) low then let it up again, setting the 193 /* Pull RST_N (GPIO 2) low then let it up again, setting the
194 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the 194 * FLASH_CFG_1 strap (GPIO 3) appropriately. Only change the
@@ -204,7 +204,7 @@ static int sfn4111t_reset(struct efx_nic *efx)
204 falcon_write(efx, &reg, GPIO_CTL_REG_KER); 204 falcon_write(efx, &reg, GPIO_CTL_REG_KER);
205 msleep(1); 205 msleep(1);
206 206
207 mutex_unlock(&efx->i2c_adap.bus_lock); 207 i2c_unlock_adapter(&efx->i2c_adap);
208 208
209 ssleep(1); 209 ssleep(1);
210 return 0; 210 return 0;
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index f49d0800c1d1..528b912a4b0d 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -30,6 +30,7 @@
30#include <linux/phy.h> 30#include <linux/phy.h>
31#include <linux/cache.h> 31#include <linux/cache.h>
32#include <linux/io.h> 32#include <linux/io.h>
33#include <asm/cacheflush.h>
33 34
34#include "sh_eth.h" 35#include "sh_eth.h"
35 36
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 2ab5c39f33ca..6a10d7ba5877 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -4538,6 +4538,8 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
4538 goto err_out_free_netdev; 4538 goto err_out_free_netdev;
4539 } 4539 }
4540 4540
4541 netif_carrier_off(dev);
4542
4541 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT); 4543 netif_napi_add(dev, &hw->napi, sky2_poll, NAPI_WEIGHT);
4542 4544
4543 err = request_irq(pdev->irq, sky2_intr, 4545 err = request_irq(pdev->irq, sky2_intr,
diff --git a/drivers/net/smsc911x.c b/drivers/net/smsc911x.c
index ccdd196f5297..f9cdcbcb77d4 100644
--- a/drivers/net/smsc911x.c
+++ b/drivers/net/smsc911x.c
@@ -986,7 +986,7 @@ static int smsc911x_poll(struct napi_struct *napi, int budget)
986 struct net_device *dev = pdata->dev; 986 struct net_device *dev = pdata->dev;
987 int npackets = 0; 987 int npackets = 0;
988 988
989 while (likely(netif_running(dev)) && (npackets < budget)) { 989 while (npackets < budget) {
990 unsigned int pktlength; 990 unsigned int pktlength;
991 unsigned int pktwords; 991 unsigned int pktwords;
992 struct sk_buff *skb; 992 struct sk_buff *skb;
diff --git a/drivers/net/stmmac/Kconfig b/drivers/net/stmmac/Kconfig
new file mode 100644
index 000000000000..35eaa5251d7f
--- /dev/null
+++ b/drivers/net/stmmac/Kconfig
@@ -0,0 +1,53 @@
1config STMMAC_ETH
2 tristate "STMicroelectronics 10/100/1000 Ethernet driver"
3 select MII
4 select PHYLIB
5 depends on NETDEVICES && CPU_SUBTYPE_ST40
6 help
7 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet
8 controllers. ST Ethernet IPs are built around a Synopsys IP Core.
9
10if STMMAC_ETH
11
12config STMMAC_DA
13 bool "STMMAC DMA arbitration scheme"
14 default n
15 help
16 Selecting this option, rx has priority over Tx (only for Giga
17 Ethernet device).
18 By default, the DMA arbitration scheme is based on Round-robin
19 (rx:tx priority is 1:1).
20
21config STMMAC_DUAL_MAC
22 bool "STMMAC: dual mac support (EXPERIMENTAL)"
23 default n
24 depends on EXPERIMENTAL && STMMAC_ETH && !STMMAC_TIMER
25 help
26 Some ST SoCs (for example the stx7141 and stx7200c2) have two
27 Ethernet Controllers. This option turns on the second Ethernet
28 device on this kind of platforms.
29
30config STMMAC_TIMER
31 bool "STMMAC Timer optimisation"
32 default n
33 help
34 Use an external timer for mitigating the number of network
35 interrupts.
36
37choice
38 prompt "Select Timer device"
39 depends on STMMAC_TIMER
40
41config STMMAC_TMU_TIMER
42 bool "TMU channel 2"
43 depends on CPU_SH4
44 help
45
46config STMMAC_RTC_TIMER
47 bool "Real time clock"
48 depends on RTC_CLASS
49 help
50
51endchoice
52
53endif
diff --git a/drivers/net/stmmac/Makefile b/drivers/net/stmmac/Makefile
new file mode 100644
index 000000000000..b2d7a5564dfa
--- /dev/null
+++ b/drivers/net/stmmac/Makefile
@@ -0,0 +1,4 @@
1obj-$(CONFIG_STMMAC_ETH) += stmmac.o
2stmmac-$(CONFIG_STMMAC_TIMER) += stmmac_timer.o
3stmmac-objs:= stmmac_main.o stmmac_ethtool.o stmmac_mdio.o \
4 mac100.o gmac.o $(stmmac-y)
diff --git a/drivers/net/stmmac/common.h b/drivers/net/stmmac/common.h
new file mode 100644
index 000000000000..e49e5188e887
--- /dev/null
+++ b/drivers/net/stmmac/common.h
@@ -0,0 +1,330 @@
1/*******************************************************************************
2 STMMAC Common Header File
3
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23*******************************************************************************/
24
25#include "descs.h"
26#include <linux/io.h>
27
28/* *********************************************
29 DMA CRS Control and Status Register Mapping
30 * *********************************************/
31#define DMA_BUS_MODE 0x00001000 /* Bus Mode */
32#define DMA_XMT_POLL_DEMAND 0x00001004 /* Transmit Poll Demand */
33#define DMA_RCV_POLL_DEMAND 0x00001008 /* Received Poll Demand */
34#define DMA_RCV_BASE_ADDR 0x0000100c /* Receive List Base */
35#define DMA_TX_BASE_ADDR 0x00001010 /* Transmit List Base */
36#define DMA_STATUS 0x00001014 /* Status Register */
37#define DMA_CONTROL 0x00001018 /* Ctrl (Operational Mode) */
38#define DMA_INTR_ENA 0x0000101c /* Interrupt Enable */
39#define DMA_MISSED_FRAME_CTR 0x00001020 /* Missed Frame Counter */
40#define DMA_CUR_TX_BUF_ADDR 0x00001050 /* Current Host Tx Buffer */
41#define DMA_CUR_RX_BUF_ADDR 0x00001054 /* Current Host Rx Buffer */
42
43/* ********************************
44 DMA Control register defines
45 * ********************************/
46#define DMA_CONTROL_ST 0x00002000 /* Start/Stop Transmission */
47#define DMA_CONTROL_SR 0x00000002 /* Start/Stop Receive */
48
49/* **************************************
50 DMA Interrupt Enable register defines
51 * **************************************/
52/**** NORMAL INTERRUPT ****/
53#define DMA_INTR_ENA_NIE 0x00010000 /* Normal Summary */
54#define DMA_INTR_ENA_TIE 0x00000001 /* Transmit Interrupt */
55#define DMA_INTR_ENA_TUE 0x00000004 /* Transmit Buffer Unavailable */
56#define DMA_INTR_ENA_RIE 0x00000040 /* Receive Interrupt */
57#define DMA_INTR_ENA_ERE 0x00004000 /* Early Receive */
58
59#define DMA_INTR_NORMAL (DMA_INTR_ENA_NIE | DMA_INTR_ENA_RIE | \
60 DMA_INTR_ENA_TIE)
61
62/**** ABNORMAL INTERRUPT ****/
63#define DMA_INTR_ENA_AIE 0x00008000 /* Abnormal Summary */
64#define DMA_INTR_ENA_FBE 0x00002000 /* Fatal Bus Error */
65#define DMA_INTR_ENA_ETE 0x00000400 /* Early Transmit */
66#define DMA_INTR_ENA_RWE 0x00000200 /* Receive Watchdog */
67#define DMA_INTR_ENA_RSE 0x00000100 /* Receive Stopped */
68#define DMA_INTR_ENA_RUE 0x00000080 /* Receive Buffer Unavailable */
69#define DMA_INTR_ENA_UNE 0x00000020 /* Tx Underflow */
70#define DMA_INTR_ENA_OVE 0x00000010 /* Receive Overflow */
71#define DMA_INTR_ENA_TJE 0x00000008 /* Transmit Jabber */
72#define DMA_INTR_ENA_TSE 0x00000002 /* Transmit Stopped */
73
74#define DMA_INTR_ABNORMAL (DMA_INTR_ENA_AIE | DMA_INTR_ENA_FBE | \
75 DMA_INTR_ENA_UNE)
76
77/* DMA default interrupt mask */
78#define DMA_INTR_DEFAULT_MASK (DMA_INTR_NORMAL | DMA_INTR_ABNORMAL)
79
80/* ****************************
81 * DMA Status register defines
82 * ****************************/
83#define DMA_STATUS_GPI 0x10000000 /* PMT interrupt */
84#define DMA_STATUS_GMI 0x08000000 /* MMC interrupt */
85#define DMA_STATUS_GLI 0x04000000 /* GMAC Line interface int. */
86#define DMA_STATUS_GMI 0x08000000
87#define DMA_STATUS_GLI 0x04000000
88#define DMA_STATUS_EB_MASK 0x00380000 /* Error Bits Mask */
89#define DMA_STATUS_EB_TX_ABORT 0x00080000 /* Error Bits - TX Abort */
90#define DMA_STATUS_EB_RX_ABORT 0x00100000 /* Error Bits - RX Abort */
91#define DMA_STATUS_TS_MASK 0x00700000 /* Transmit Process State */
92#define DMA_STATUS_TS_SHIFT 20
93#define DMA_STATUS_RS_MASK 0x000e0000 /* Receive Process State */
94#define DMA_STATUS_RS_SHIFT 17
95#define DMA_STATUS_NIS 0x00010000 /* Normal Interrupt Summary */
96#define DMA_STATUS_AIS 0x00008000 /* Abnormal Interrupt Summary */
97#define DMA_STATUS_ERI 0x00004000 /* Early Receive Interrupt */
98#define DMA_STATUS_FBI 0x00002000 /* Fatal Bus Error Interrupt */
99#define DMA_STATUS_ETI 0x00000400 /* Early Transmit Interrupt */
100#define DMA_STATUS_RWT 0x00000200 /* Receive Watchdog Timeout */
101#define DMA_STATUS_RPS 0x00000100 /* Receive Process Stopped */
102#define DMA_STATUS_RU 0x00000080 /* Receive Buffer Unavailable */
103#define DMA_STATUS_RI 0x00000040 /* Receive Interrupt */
104#define DMA_STATUS_UNF 0x00000020 /* Transmit Underflow */
105#define DMA_STATUS_OVF 0x00000010 /* Receive Overflow */
106#define DMA_STATUS_TJT 0x00000008 /* Transmit Jabber Timeout */
107#define DMA_STATUS_TU 0x00000004 /* Transmit Buffer Unavailable */
108#define DMA_STATUS_TPS 0x00000002 /* Transmit Process Stopped */
109#define DMA_STATUS_TI 0x00000001 /* Transmit Interrupt */
110
111/* Other defines */
112#define HASH_TABLE_SIZE 64
113#define PAUSE_TIME 0x200
114
115/* Flow Control defines */
116#define FLOW_OFF 0
117#define FLOW_RX 1
118#define FLOW_TX 2
119#define FLOW_AUTO (FLOW_TX | FLOW_RX)
120
121/* DMA STORE-AND-FORWARD Operation Mode */
122#define SF_DMA_MODE 1
123
124#define HW_CSUM 1
125#define NO_HW_CSUM 0
126
127/* GMAC TX FIFO is 8K, Rx FIFO is 16K */
128#define BUF_SIZE_16KiB 16384
129#define BUF_SIZE_8KiB 8192
130#define BUF_SIZE_4KiB 4096
131#define BUF_SIZE_2KiB 2048
132
133/* Power Down and WOL */
134#define PMT_NOT_SUPPORTED 0
135#define PMT_SUPPORTED 1
136
137/* Common MAC defines */
138#define MAC_CTRL_REG 0x00000000 /* MAC Control */
139#define MAC_ENABLE_TX 0x00000008 /* Transmitter Enable */
140#define MAC_RNABLE_RX 0x00000004 /* Receiver Enable */
141
142/* MAC Management Counters register */
143#define MMC_CONTROL 0x00000100 /* MMC Control */
144#define MMC_HIGH_INTR 0x00000104 /* MMC High Interrupt */
145#define MMC_LOW_INTR 0x00000108 /* MMC Low Interrupt */
146#define MMC_HIGH_INTR_MASK 0x0000010c /* MMC High Interrupt Mask */
147#define MMC_LOW_INTR_MASK 0x00000110 /* MMC Low Interrupt Mask */
148
149#define MMC_CONTROL_MAX_FRM_MASK 0x0003ff8 /* Maximum Frame Size */
150#define MMC_CONTROL_MAX_FRM_SHIFT 3
151#define MMC_CONTROL_MAX_FRAME 0x7FF
152
153struct stmmac_extra_stats {
154 /* Transmit errors */
155 unsigned long tx_underflow ____cacheline_aligned;
156 unsigned long tx_carrier;
157 unsigned long tx_losscarrier;
158 unsigned long tx_heartbeat;
159 unsigned long tx_deferred;
160 unsigned long tx_vlan;
161 unsigned long tx_jabber;
162 unsigned long tx_frame_flushed;
163 unsigned long tx_payload_error;
164 unsigned long tx_ip_header_error;
165 /* Receive errors */
166 unsigned long rx_desc;
167 unsigned long rx_partial;
168 unsigned long rx_runt;
169 unsigned long rx_toolong;
170 unsigned long rx_collision;
171 unsigned long rx_crc;
172 unsigned long rx_lenght;
173 unsigned long rx_mii;
174 unsigned long rx_multicast;
175 unsigned long rx_gmac_overflow;
176 unsigned long rx_watchdog;
177 unsigned long da_rx_filter_fail;
178 unsigned long sa_rx_filter_fail;
179 unsigned long rx_missed_cntr;
180 unsigned long rx_overflow_cntr;
181 unsigned long rx_vlan;
182 /* Tx/Rx IRQ errors */
183 unsigned long tx_undeflow_irq;
184 unsigned long tx_process_stopped_irq;
185 unsigned long tx_jabber_irq;
186 unsigned long rx_overflow_irq;
187 unsigned long rx_buf_unav_irq;
188 unsigned long rx_process_stopped_irq;
189 unsigned long rx_watchdog_irq;
190 unsigned long tx_early_irq;
191 unsigned long fatal_bus_error_irq;
192 /* Extra info */
193 unsigned long threshold;
194 unsigned long tx_pkt_n;
195 unsigned long rx_pkt_n;
196 unsigned long poll_n;
197 unsigned long sched_timer_n;
198 unsigned long normal_irq_n;
199};
200
201/* GMAC core can compute the checksums in HW. */
202enum rx_frame_status {
203 good_frame = 0,
204 discard_frame = 1,
205 csum_none = 2,
206};
207
208static inline void stmmac_set_mac_addr(unsigned long ioaddr, u8 addr[6],
209 unsigned int high, unsigned int low)
210{
211 unsigned long data;
212
213 data = (addr[5] << 8) | addr[4];
214 writel(data, ioaddr + high);
215 data = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
216 writel(data, ioaddr + low);
217
218 return;
219}
220
221static inline void stmmac_get_mac_addr(unsigned long ioaddr,
222 unsigned char *addr, unsigned int high,
223 unsigned int low)
224{
225 unsigned int hi_addr, lo_addr;
226
227 /* Read the MAC address from the hardware */
228 hi_addr = readl(ioaddr + high);
229 lo_addr = readl(ioaddr + low);
230
231 /* Extract the MAC address from the high and low words */
232 addr[0] = lo_addr & 0xff;
233 addr[1] = (lo_addr >> 8) & 0xff;
234 addr[2] = (lo_addr >> 16) & 0xff;
235 addr[3] = (lo_addr >> 24) & 0xff;
236 addr[4] = hi_addr & 0xff;
237 addr[5] = (hi_addr >> 8) & 0xff;
238
239 return;
240}
241
242struct stmmac_ops {
243 /* MAC core initialization */
244 void (*core_init) (unsigned long ioaddr) ____cacheline_aligned;
245 /* DMA core initialization */
246 int (*dma_init) (unsigned long ioaddr, int pbl, u32 dma_tx, u32 dma_rx);
247 /* Dump MAC registers */
248 void (*dump_mac_regs) (unsigned long ioaddr);
249 /* Dump DMA registers */
250 void (*dump_dma_regs) (unsigned long ioaddr);
251 /* Set tx/rx threshold in the csr6 register
252 * An invalid value enables the store-and-forward mode */
253 void (*dma_mode) (unsigned long ioaddr, int txmode, int rxmode);
254 /* To track extra statistic (if supported) */
255 void (*dma_diagnostic_fr) (void *data, struct stmmac_extra_stats *x,
256 unsigned long ioaddr);
257 /* RX descriptor ring initialization */
258 void (*init_rx_desc) (struct dma_desc *p, unsigned int ring_size,
259 int disable_rx_ic);
260 /* TX descriptor ring initialization */
261 void (*init_tx_desc) (struct dma_desc *p, unsigned int ring_size);
262
263 /* Invoked by the xmit function to prepare the tx descriptor */
264 void (*prepare_tx_desc) (struct dma_desc *p, int is_fs, int len,
265 int csum_flag);
266 /* Set/get the owner of the descriptor */
267 void (*set_tx_owner) (struct dma_desc *p);
268 int (*get_tx_owner) (struct dma_desc *p);
269 /* Invoked by the xmit function to close the tx descriptor */
270 void (*close_tx_desc) (struct dma_desc *p);
271 /* Clean the tx descriptor as soon as the tx irq is received */
272 void (*release_tx_desc) (struct dma_desc *p);
273 /* Clear interrupt on tx frame completion. When this bit is
274 * set an interrupt happens as soon as the frame is transmitted */
275 void (*clear_tx_ic) (struct dma_desc *p);
276 /* Last tx segment reports the transmit status */
277 int (*get_tx_ls) (struct dma_desc *p);
278 /* Return the transmit status looking at the TDES1 */
279 int (*tx_status) (void *data, struct stmmac_extra_stats *x,
280 struct dma_desc *p, unsigned long ioaddr);
281 /* Get the buffer size from the descriptor */
282 int (*get_tx_len) (struct dma_desc *p);
283 /* Handle extra events on specific interrupts hw dependent */
284 void (*host_irq_status) (unsigned long ioaddr);
285 int (*get_rx_owner) (struct dma_desc *p);
286 void (*set_rx_owner) (struct dma_desc *p);
287 /* Get the receive frame size */
288 int (*get_rx_frame_len) (struct dma_desc *p);
289 /* Return the reception status looking at the RDES1 */
290 int (*rx_status) (void *data, struct stmmac_extra_stats *x,
291 struct dma_desc *p);
292 /* Multicast filter setting */
293 void (*set_filter) (struct net_device *dev);
294 /* Flow control setting */
295 void (*flow_ctrl) (unsigned long ioaddr, unsigned int duplex,
296 unsigned int fc, unsigned int pause_time);
297 /* Set power management mode (e.g. magic frame) */
298 void (*pmt) (unsigned long ioaddr, unsigned long mode);
299 /* Set/Get Unicast MAC addresses */
300 void (*set_umac_addr) (unsigned long ioaddr, unsigned char *addr,
301 unsigned int reg_n);
302 void (*get_umac_addr) (unsigned long ioaddr, unsigned char *addr,
303 unsigned int reg_n);
304};
305
306struct mac_link {
307 int port;
308 int duplex;
309 int speed;
310};
311
312struct mii_regs {
313 unsigned int addr; /* MII Address */
314 unsigned int data; /* MII Data */
315};
316
317struct hw_cap {
318 unsigned int version; /* Core Version register (GMAC) */
319 unsigned int pmt; /* Power-Down mode (GMAC) */
320 struct mac_link link;
321 struct mii_regs mii;
322};
323
324struct mac_device_info {
325 struct hw_cap hw;
326 struct stmmac_ops *ops;
327};
328
329struct mac_device_info *gmac_setup(unsigned long addr);
330struct mac_device_info *mac100_setup(unsigned long addr);
diff --git a/drivers/net/stmmac/descs.h b/drivers/net/stmmac/descs.h
new file mode 100644
index 000000000000..6d2a0b2f5e57
--- /dev/null
+++ b/drivers/net/stmmac/descs.h
@@ -0,0 +1,163 @@
1/*******************************************************************************
2 Header File to describe the DMA descriptors
3 Use enhanced descriptors in case of GMAC Cores.
4
5 This program is free software; you can redistribute it and/or modify it
6 under the terms and conditions of the GNU General Public License,
7 version 2, as published by the Free Software Foundation.
8
9 This program is distributed in the hope it will be useful, but WITHOUT
10 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 more details.
13
14 You should have received a copy of the GNU General Public License along with
15 this program; if not, write to the Free Software Foundation, Inc.,
16 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
17
18 The full GNU General Public License is included in this distribution in
19 the file called "COPYING".
20
21 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
22*******************************************************************************/
23struct dma_desc {
24 /* Receive descriptor */
25 union {
26 struct {
27 /* RDES0 */
28 u32 reserved1:1;
29 u32 crc_error:1;
30 u32 dribbling:1;
31 u32 mii_error:1;
32 u32 receive_watchdog:1;
33 u32 frame_type:1;
34 u32 collision:1;
35 u32 frame_too_long:1;
36 u32 last_descriptor:1;
37 u32 first_descriptor:1;
38 u32 multicast_frame:1;
39 u32 run_frame:1;
40 u32 length_error:1;
41 u32 partial_frame_error:1;
42 u32 descriptor_error:1;
43 u32 error_summary:1;
44 u32 frame_length:14;
45 u32 filtering_fail:1;
46 u32 own:1;
47 /* RDES1 */
48 u32 buffer1_size:11;
49 u32 buffer2_size:11;
50 u32 reserved2:2;
51 u32 second_address_chained:1;
52 u32 end_ring:1;
53 u32 reserved3:5;
54 u32 disable_ic:1;
55 } rx;
56 struct {
57 /* RDES0 */
58 u32 payload_csum_error:1;
59 u32 crc_error:1;
60 u32 dribbling:1;
61 u32 error_gmii:1;
62 u32 receive_watchdog:1;
63 u32 frame_type:1;
64 u32 late_collision:1;
65 u32 ipc_csum_error:1;
66 u32 last_descriptor:1;
67 u32 first_descriptor:1;
68 u32 vlan_tag:1;
69 u32 overflow_error:1;
70 u32 length_error:1;
71 u32 sa_filter_fail:1;
72 u32 descriptor_error:1;
73 u32 error_summary:1;
74 u32 frame_length:14;
75 u32 da_filter_fail:1;
76 u32 own:1;
77 /* RDES1 */
78 u32 buffer1_size:13;
79 u32 reserved1:1;
80 u32 second_address_chained:1;
81 u32 end_ring:1;
82 u32 buffer2_size:13;
83 u32 reserved2:2;
84 u32 disable_ic:1;
85 } erx; /* -- enhanced -- */
86
87 /* Transmit descriptor */
88 struct {
89 /* TDES0 */
90 u32 deferred:1;
91 u32 underflow_error:1;
92 u32 excessive_deferral:1;
93 u32 collision_count:4;
94 u32 heartbeat_fail:1;
95 u32 excessive_collisions:1;
96 u32 late_collision:1;
97 u32 no_carrier:1;
98 u32 loss_carrier:1;
99 u32 reserved1:3;
100 u32 error_summary:1;
101 u32 reserved2:15;
102 u32 own:1;
103 /* TDES1 */
104 u32 buffer1_size:11;
105 u32 buffer2_size:11;
106 u32 reserved3:1;
107 u32 disable_padding:1;
108 u32 second_address_chained:1;
109 u32 end_ring:1;
110 u32 crc_disable:1;
111 u32 reserved4:2;
112 u32 first_segment:1;
113 u32 last_segment:1;
114 u32 interrupt:1;
115 } tx;
116 struct {
117 /* TDES0 */
118 u32 deferred:1;
119 u32 underflow_error:1;
120 u32 excessive_deferral:1;
121 u32 collision_count:4;
122 u32 vlan_frame:1;
123 u32 excessive_collisions:1;
124 u32 late_collision:1;
125 u32 no_carrier:1;
126 u32 loss_carrier:1;
127 u32 payload_error:1;
128 u32 frame_flushed:1;
129 u32 jabber_timeout:1;
130 u32 error_summary:1;
131 u32 ip_header_error:1;
132 u32 time_stamp_status:1;
133 u32 reserved1:2;
134 u32 second_address_chained:1;
135 u32 end_ring:1;
136 u32 checksum_insertion:2;
137 u32 reserved2:1;
138 u32 time_stamp_enable:1;
139 u32 disable_padding:1;
140 u32 crc_disable:1;
141 u32 first_segment:1;
142 u32 last_segment:1;
143 u32 interrupt:1;
144 u32 own:1;
145 /* TDES1 */
146 u32 buffer1_size:13;
147 u32 reserved3:3;
148 u32 buffer2_size:13;
149 u32 reserved4:3;
150 } etx; /* -- enhanced -- */
151 } des01;
152 unsigned int des2;
153 unsigned int des3;
154};
155
156/* Transmit checksum insertion control */
157enum tdes_csum_insertion {
158 cic_disabled = 0, /* Checksum Insertion Control */
159 cic_only_ip = 1, /* Only IP header */
160 cic_no_pseudoheader = 2, /* IP header but pseudoheader
161 * is not calculated */
162 cic_full = 3, /* IP header and pseudoheader */
163};
diff --git a/drivers/net/stmmac/gmac.c b/drivers/net/stmmac/gmac.c
new file mode 100644
index 000000000000..b624bb5bae0a
--- /dev/null
+++ b/drivers/net/stmmac/gmac.c
@@ -0,0 +1,693 @@
1/*******************************************************************************
2 This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
3 DWC Ether MAC 10/100/1000 Universal version 3.41a has been used for
4 developing this code.
5
6 Copyright (C) 2007-2009 STMicroelectronics Ltd
7
8 This program is free software; you can redistribute it and/or modify it
9 under the terms and conditions of the GNU General Public License,
10 version 2, as published by the Free Software Foundation.
11
12 This program is distributed in the hope it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 more details.
16
17 You should have received a copy of the GNU General Public License along with
18 this program; if not, write to the Free Software Foundation, Inc.,
19 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
20
21 The full GNU General Public License is included in this distribution in
22 the file called "COPYING".
23
24 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
25*******************************************************************************/
26
27#include <linux/netdevice.h>
28#include <linux/crc32.h>
29#include <linux/mii.h>
30#include <linux/phy.h>
31
32#include "stmmac.h"
33#include "gmac.h"
34
35#undef GMAC_DEBUG
36/*#define GMAC_DEBUG*/
37#undef FRAME_FILTER_DEBUG
38/*#define FRAME_FILTER_DEBUG*/
39#ifdef GMAC_DEBUG
40#define DBG(fmt, args...) printk(fmt, ## args)
41#else
42#define DBG(fmt, args...) do { } while (0)
43#endif
44
45static void gmac_dump_regs(unsigned long ioaddr)
46{
47 int i;
48 pr_info("\t----------------------------------------------\n"
49 "\t GMAC registers (base addr = 0x%8x)\n"
50 "\t----------------------------------------------\n",
51 (unsigned int)ioaddr);
52
53 for (i = 0; i < 55; i++) {
54 int offset = i * 4;
55 pr_info("\tReg No. %d (offset 0x%x): 0x%08x\n", i,
56 offset, readl(ioaddr + offset));
57 }
58 return;
59}
60
61static int gmac_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx, u32 dma_rx)
62{
63 u32 value = readl(ioaddr + DMA_BUS_MODE);
64 /* DMA SW reset */
65 value |= DMA_BUS_MODE_SFT_RESET;
66 writel(value, ioaddr + DMA_BUS_MODE);
67 do {} while ((readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET));
68
69 value = /* DMA_BUS_MODE_FB | */ DMA_BUS_MODE_4PBL |
70 ((pbl << DMA_BUS_MODE_PBL_SHIFT) |
71 (pbl << DMA_BUS_MODE_RPBL_SHIFT));
72
73#ifdef CONFIG_STMMAC_DA
74 value |= DMA_BUS_MODE_DA; /* Rx has priority over tx */
75#endif
76 writel(value, ioaddr + DMA_BUS_MODE);
77
78 /* Mask interrupts by writing to CSR7 */
79 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
80
81 /* The base address of the RX/TX descriptor lists must be written into
82 * DMA CSR3 and CSR4, respectively. */
83 writel(dma_tx, ioaddr + DMA_TX_BASE_ADDR);
84 writel(dma_rx, ioaddr + DMA_RCV_BASE_ADDR);
85
86 return 0;
87}
88
89/* Transmit FIFO flush operation */
90static void gmac_flush_tx_fifo(unsigned long ioaddr)
91{
92 u32 csr6 = readl(ioaddr + DMA_CONTROL);
93 writel((csr6 | DMA_CONTROL_FTF), ioaddr + DMA_CONTROL);
94
95 do {} while ((readl(ioaddr + DMA_CONTROL) & DMA_CONTROL_FTF));
96}
97
98static void gmac_dma_operation_mode(unsigned long ioaddr, int txmode,
99 int rxmode)
100{
101 u32 csr6 = readl(ioaddr + DMA_CONTROL);
102
103 if (txmode == SF_DMA_MODE) {
104 DBG(KERN_DEBUG "GMAC: enabling TX store and forward mode\n");
105 /* Transmit COE type 2 cannot be done in cut-through mode. */
106 csr6 |= DMA_CONTROL_TSF;
107 /* Operating on second frame increase the performance
108 * especially when transmit store-and-forward is used.*/
109 csr6 |= DMA_CONTROL_OSF;
110 } else {
111 DBG(KERN_DEBUG "GMAC: disabling TX store and forward mode"
112 " (threshold = %d)\n", txmode);
113 csr6 &= ~DMA_CONTROL_TSF;
114 csr6 &= DMA_CONTROL_TC_TX_MASK;
115 /* Set the transmit threashold */
116 if (txmode <= 32)
117 csr6 |= DMA_CONTROL_TTC_32;
118 else if (txmode <= 64)
119 csr6 |= DMA_CONTROL_TTC_64;
120 else if (txmode <= 128)
121 csr6 |= DMA_CONTROL_TTC_128;
122 else if (txmode <= 192)
123 csr6 |= DMA_CONTROL_TTC_192;
124 else
125 csr6 |= DMA_CONTROL_TTC_256;
126 }
127
128 if (rxmode == SF_DMA_MODE) {
129 DBG(KERN_DEBUG "GMAC: enabling RX store and forward mode\n");
130 csr6 |= DMA_CONTROL_RSF;
131 } else {
132 DBG(KERN_DEBUG "GMAC: disabling RX store and forward mode"
133 " (threshold = %d)\n", rxmode);
134 csr6 &= ~DMA_CONTROL_RSF;
135 csr6 &= DMA_CONTROL_TC_RX_MASK;
136 if (rxmode <= 32)
137 csr6 |= DMA_CONTROL_RTC_32;
138 else if (rxmode <= 64)
139 csr6 |= DMA_CONTROL_RTC_64;
140 else if (rxmode <= 96)
141 csr6 |= DMA_CONTROL_RTC_96;
142 else
143 csr6 |= DMA_CONTROL_RTC_128;
144 }
145
146 writel(csr6, ioaddr + DMA_CONTROL);
147 return;
148}
149
150/* Not yet implemented --- no RMON module */
151static void gmac_dma_diagnostic_fr(void *data, struct stmmac_extra_stats *x,
152 unsigned long ioaddr)
153{
154 return;
155}
156
157static void gmac_dump_dma_regs(unsigned long ioaddr)
158{
159 int i;
160 pr_info(" DMA registers\n");
161 for (i = 0; i < 22; i++) {
162 if ((i < 9) || (i > 17)) {
163 int offset = i * 4;
164 pr_err("\t Reg No. %d (offset 0x%x): 0x%08x\n", i,
165 (DMA_BUS_MODE + offset),
166 readl(ioaddr + DMA_BUS_MODE + offset));
167 }
168 }
169 return;
170}
171
172static int gmac_get_tx_frame_status(void *data, struct stmmac_extra_stats *x,
173 struct dma_desc *p, unsigned long ioaddr)
174{
175 int ret = 0;
176 struct net_device_stats *stats = (struct net_device_stats *)data;
177
178 if (unlikely(p->des01.etx.error_summary)) {
179 DBG(KERN_ERR "GMAC TX error... 0x%08x\n", p->des01.etx);
180 if (unlikely(p->des01.etx.jabber_timeout)) {
181 DBG(KERN_ERR "\tjabber_timeout error\n");
182 x->tx_jabber++;
183 }
184
185 if (unlikely(p->des01.etx.frame_flushed)) {
186 DBG(KERN_ERR "\tframe_flushed error\n");
187 x->tx_frame_flushed++;
188 gmac_flush_tx_fifo(ioaddr);
189 }
190
191 if (unlikely(p->des01.etx.loss_carrier)) {
192 DBG(KERN_ERR "\tloss_carrier error\n");
193 x->tx_losscarrier++;
194 stats->tx_carrier_errors++;
195 }
196 if (unlikely(p->des01.etx.no_carrier)) {
197 DBG(KERN_ERR "\tno_carrier error\n");
198 x->tx_carrier++;
199 stats->tx_carrier_errors++;
200 }
201 if (unlikely(p->des01.etx.late_collision)) {
202 DBG(KERN_ERR "\tlate_collision error\n");
203 stats->collisions += p->des01.etx.collision_count;
204 }
205 if (unlikely(p->des01.etx.excessive_collisions)) {
206 DBG(KERN_ERR "\texcessive_collisions\n");
207 stats->collisions += p->des01.etx.collision_count;
208 }
209 if (unlikely(p->des01.etx.excessive_deferral)) {
210 DBG(KERN_INFO "\texcessive tx_deferral\n");
211 x->tx_deferred++;
212 }
213
214 if (unlikely(p->des01.etx.underflow_error)) {
215 DBG(KERN_ERR "\tunderflow error\n");
216 gmac_flush_tx_fifo(ioaddr);
217 x->tx_underflow++;
218 }
219
220 if (unlikely(p->des01.etx.ip_header_error)) {
221 DBG(KERN_ERR "\tTX IP header csum error\n");
222 x->tx_ip_header_error++;
223 }
224
225 if (unlikely(p->des01.etx.payload_error)) {
226 DBG(KERN_ERR "\tAddr/Payload csum error\n");
227 x->tx_payload_error++;
228 gmac_flush_tx_fifo(ioaddr);
229 }
230
231 ret = -1;
232 }
233
234 if (unlikely(p->des01.etx.deferred)) {
235 DBG(KERN_INFO "GMAC TX status: tx deferred\n");
236 x->tx_deferred++;
237 }
238#ifdef STMMAC_VLAN_TAG_USED
239 if (p->des01.etx.vlan_frame) {
240 DBG(KERN_INFO "GMAC TX status: VLAN frame\n");
241 x->tx_vlan++;
242 }
243#endif
244
245 return ret;
246}
247
248static int gmac_get_tx_len(struct dma_desc *p)
249{
250 return p->des01.etx.buffer1_size;
251}
252
253static int gmac_coe_rdes0(int ipc_err, int type, int payload_err)
254{
255 int ret = good_frame;
256 u32 status = (type << 2 | ipc_err << 1 | payload_err) & 0x7;
257
258 /* bits 5 7 0 | Frame status
259 * ----------------------------------------------------------
260 * 0 0 0 | IEEE 802.3 Type frame (lenght < 1536 octects)
261 * 1 0 0 | IPv4/6 No CSUM errorS.
262 * 1 0 1 | IPv4/6 CSUM PAYLOAD error
263 * 1 1 0 | IPv4/6 CSUM IP HR error
264 * 1 1 1 | IPv4/6 IP PAYLOAD AND HEADER errorS
265 * 0 0 1 | IPv4/6 unsupported IP PAYLOAD
266 * 0 1 1 | COE bypassed.. no IPv4/6 frame
267 * 0 1 0 | Reserved.
268 */
269 if (status == 0x0) {
270 DBG(KERN_INFO "RX Des0 status: IEEE 802.3 Type frame.\n");
271 ret = good_frame;
272 } else if (status == 0x4) {
273 DBG(KERN_INFO "RX Des0 status: IPv4/6 No CSUM errorS.\n");
274 ret = good_frame;
275 } else if (status == 0x5) {
276 DBG(KERN_ERR "RX Des0 status: IPv4/6 Payload Error.\n");
277 ret = csum_none;
278 } else if (status == 0x6) {
279 DBG(KERN_ERR "RX Des0 status: IPv4/6 Header Error.\n");
280 ret = csum_none;
281 } else if (status == 0x7) {
282 DBG(KERN_ERR
283 "RX Des0 status: IPv4/6 Header and Payload Error.\n");
284 ret = csum_none;
285 } else if (status == 0x1) {
286 DBG(KERN_ERR
287 "RX Des0 status: IPv4/6 unsupported IP PAYLOAD.\n");
288 ret = discard_frame;
289 } else if (status == 0x3) {
290 DBG(KERN_ERR "RX Des0 status: No IPv4, IPv6 frame.\n");
291 ret = discard_frame;
292 }
293 return ret;
294}
295
296static int gmac_get_rx_frame_status(void *data, struct stmmac_extra_stats *x,
297 struct dma_desc *p)
298{
299 int ret = good_frame;
300 struct net_device_stats *stats = (struct net_device_stats *)data;
301
302 if (unlikely(p->des01.erx.error_summary)) {
303 DBG(KERN_ERR "GMAC RX Error Summary... 0x%08x\n", p->des01.erx);
304 if (unlikely(p->des01.erx.descriptor_error)) {
305 DBG(KERN_ERR "\tdescriptor error\n");
306 x->rx_desc++;
307 stats->rx_length_errors++;
308 }
309 if (unlikely(p->des01.erx.overflow_error)) {
310 DBG(KERN_ERR "\toverflow error\n");
311 x->rx_gmac_overflow++;
312 }
313
314 if (unlikely(p->des01.erx.ipc_csum_error))
315 DBG(KERN_ERR "\tIPC Csum Error/Giant frame\n");
316
317 if (unlikely(p->des01.erx.late_collision)) {
318 DBG(KERN_ERR "\tlate_collision error\n");
319 stats->collisions++;
320 stats->collisions++;
321 }
322 if (unlikely(p->des01.erx.receive_watchdog)) {
323 DBG(KERN_ERR "\treceive_watchdog error\n");
324 x->rx_watchdog++;
325 }
326 if (unlikely(p->des01.erx.error_gmii)) {
327 DBG(KERN_ERR "\tReceive Error\n");
328 x->rx_mii++;
329 }
330 if (unlikely(p->des01.erx.crc_error)) {
331 DBG(KERN_ERR "\tCRC error\n");
332 x->rx_crc++;
333 stats->rx_crc_errors++;
334 }
335 ret = discard_frame;
336 }
337
338 /* After a payload csum error, the ES bit is set.
339 * It doesn't match with the information reported into the databook.
340 * At any rate, we need to understand if the CSUM hw computation is ok
341 * and report this info to the upper layers. */
342 ret = gmac_coe_rdes0(p->des01.erx.ipc_csum_error,
343 p->des01.erx.frame_type, p->des01.erx.payload_csum_error);
344
345 if (unlikely(p->des01.erx.dribbling)) {
346 DBG(KERN_ERR "GMAC RX: dribbling error\n");
347 ret = discard_frame;
348 }
349 if (unlikely(p->des01.erx.sa_filter_fail)) {
350 DBG(KERN_ERR "GMAC RX : Source Address filter fail\n");
351 x->sa_rx_filter_fail++;
352 ret = discard_frame;
353 }
354 if (unlikely(p->des01.erx.da_filter_fail)) {
355 DBG(KERN_ERR "GMAC RX : Destination Address filter fail\n");
356 x->da_rx_filter_fail++;
357 ret = discard_frame;
358 }
359 if (unlikely(p->des01.erx.length_error)) {
360 DBG(KERN_ERR "GMAC RX: length_error error\n");
361 x->rx_lenght++;
362 ret = discard_frame;
363 }
364#ifdef STMMAC_VLAN_TAG_USED
365 if (p->des01.erx.vlan_tag) {
366 DBG(KERN_INFO "GMAC RX: VLAN frame tagged\n");
367 x->rx_vlan++;
368 }
369#endif
370 return ret;
371}
372
373static void gmac_irq_status(unsigned long ioaddr)
374{
375 u32 intr_status = readl(ioaddr + GMAC_INT_STATUS);
376
377 /* Not used events (e.g. MMC interrupts) are not handled. */
378 if ((intr_status & mmc_tx_irq))
379 DBG(KERN_DEBUG "GMAC: MMC tx interrupt: 0x%08x\n",
380 readl(ioaddr + GMAC_MMC_TX_INTR));
381 if (unlikely(intr_status & mmc_rx_irq))
382 DBG(KERN_DEBUG "GMAC: MMC rx interrupt: 0x%08x\n",
383 readl(ioaddr + GMAC_MMC_RX_INTR));
384 if (unlikely(intr_status & mmc_rx_csum_offload_irq))
385 DBG(KERN_DEBUG "GMAC: MMC rx csum offload: 0x%08x\n",
386 readl(ioaddr + GMAC_MMC_RX_CSUM_OFFLOAD));
387 if (unlikely(intr_status & pmt_irq)) {
388 DBG(KERN_DEBUG "GMAC: received Magic frame\n");
389 /* clear the PMT bits 5 and 6 by reading the PMT
390 * status register. */
391 readl(ioaddr + GMAC_PMT);
392 }
393
394 return;
395}
396
397static void gmac_core_init(unsigned long ioaddr)
398{
399 u32 value = readl(ioaddr + GMAC_CONTROL);
400 value |= GMAC_CORE_INIT;
401 writel(value, ioaddr + GMAC_CONTROL);
402
403 /* STBus Bridge Configuration */
404 /*writel(0xc5608, ioaddr + 0x00007000);*/
405
406 /* Freeze MMC counters */
407 writel(0x8, ioaddr + GMAC_MMC_CTRL);
408 /* Mask GMAC interrupts */
409 writel(0x207, ioaddr + GMAC_INT_MASK);
410
411#ifdef STMMAC_VLAN_TAG_USED
412 /* Tag detection without filtering */
413 writel(0x0, ioaddr + GMAC_VLAN_TAG);
414#endif
415 return;
416}
417
418static void gmac_set_umac_addr(unsigned long ioaddr, unsigned char *addr,
419 unsigned int reg_n)
420{
421 stmmac_set_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n),
422 GMAC_ADDR_LOW(reg_n));
423}
424
425static void gmac_get_umac_addr(unsigned long ioaddr, unsigned char *addr,
426 unsigned int reg_n)
427{
428 stmmac_get_mac_addr(ioaddr, addr, GMAC_ADDR_HIGH(reg_n),
429 GMAC_ADDR_LOW(reg_n));
430}
431
432static void gmac_set_filter(struct net_device *dev)
433{
434 unsigned long ioaddr = dev->base_addr;
435 unsigned int value = 0;
436
437 DBG(KERN_INFO "%s: # mcasts %d, # unicast %d\n",
438 __func__, dev->mc_count, dev->uc_count);
439
440 if (dev->flags & IFF_PROMISC)
441 value = GMAC_FRAME_FILTER_PR;
442 else if ((dev->mc_count > HASH_TABLE_SIZE)
443 || (dev->flags & IFF_ALLMULTI)) {
444 value = GMAC_FRAME_FILTER_PM; /* pass all multi */
445 writel(0xffffffff, ioaddr + GMAC_HASH_HIGH);
446 writel(0xffffffff, ioaddr + GMAC_HASH_LOW);
447 } else if (dev->mc_count > 0) {
448 int i;
449 u32 mc_filter[2];
450 struct dev_mc_list *mclist;
451
452 /* Hash filter for multicast */
453 value = GMAC_FRAME_FILTER_HMC;
454
455 memset(mc_filter, 0, sizeof(mc_filter));
456 for (i = 0, mclist = dev->mc_list;
457 mclist && i < dev->mc_count; i++, mclist = mclist->next) {
458 /* The upper 6 bits of the calculated CRC are used to
459 index the contens of the hash table */
460 int bit_nr =
461 bitrev32(~crc32_le(~0, mclist->dmi_addr, 6)) >> 26;
462 /* The most significant bit determines the register to
463 * use (H/L) while the other 5 bits determine the bit
464 * within the register. */
465 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
466 }
467 writel(mc_filter[0], ioaddr + GMAC_HASH_LOW);
468 writel(mc_filter[1], ioaddr + GMAC_HASH_HIGH);
469 }
470
471 /* Handle multiple unicast addresses (perfect filtering)*/
472 if (dev->uc_count > GMAC_MAX_UNICAST_ADDRESSES)
473 /* Switch to promiscuous mode is more than 16 addrs
474 are required */
475 value |= GMAC_FRAME_FILTER_PR;
476 else {
477 int i;
478 struct dev_addr_list *uc_ptr = dev->uc_list;
479
480 for (i = 0; i < dev->uc_count; i++) {
481 gmac_set_umac_addr(ioaddr, uc_ptr->da_addr,
482 i + 1);
483
484 DBG(KERN_INFO "\t%d "
485 "- Unicast addr %02x:%02x:%02x:%02x:%02x:"
486 "%02x\n", i + 1,
487 uc_ptr->da_addr[0], uc_ptr->da_addr[1],
488 uc_ptr->da_addr[2], uc_ptr->da_addr[3],
489 uc_ptr->da_addr[4], uc_ptr->da_addr[5]);
490 uc_ptr = uc_ptr->next;
491 }
492 }
493
494#ifdef FRAME_FILTER_DEBUG
495 /* Enable Receive all mode (to debug filtering_fail errors) */
496 value |= GMAC_FRAME_FILTER_RA;
497#endif
498 writel(value, ioaddr + GMAC_FRAME_FILTER);
499
500 DBG(KERN_INFO "\tFrame Filter reg: 0x%08x\n\tHash regs: "
501 "HI 0x%08x, LO 0x%08x\n", readl(ioaddr + GMAC_FRAME_FILTER),
502 readl(ioaddr + GMAC_HASH_HIGH), readl(ioaddr + GMAC_HASH_LOW));
503
504 return;
505}
506
507static void gmac_flow_ctrl(unsigned long ioaddr, unsigned int duplex,
508 unsigned int fc, unsigned int pause_time)
509{
510 unsigned int flow = 0;
511
512 DBG(KERN_DEBUG "GMAC Flow-Control:\n");
513 if (fc & FLOW_RX) {
514 DBG(KERN_DEBUG "\tReceive Flow-Control ON\n");
515 flow |= GMAC_FLOW_CTRL_RFE;
516 }
517 if (fc & FLOW_TX) {
518 DBG(KERN_DEBUG "\tTransmit Flow-Control ON\n");
519 flow |= GMAC_FLOW_CTRL_TFE;
520 }
521
522 if (duplex) {
523 DBG(KERN_DEBUG "\tduplex mode: pause time: %d\n", pause_time);
524 flow |= (pause_time << GMAC_FLOW_CTRL_PT_SHIFT);
525 }
526
527 writel(flow, ioaddr + GMAC_FLOW_CTRL);
528 return;
529}
530
531static void gmac_pmt(unsigned long ioaddr, unsigned long mode)
532{
533 unsigned int pmt = 0;
534
535 if (mode == WAKE_MAGIC) {
536 DBG(KERN_DEBUG "GMAC: WOL Magic frame\n");
537 pmt |= power_down | magic_pkt_en;
538 } else if (mode == WAKE_UCAST) {
539 DBG(KERN_DEBUG "GMAC: WOL on global unicast\n");
540 pmt |= global_unicast;
541 }
542
543 writel(pmt, ioaddr + GMAC_PMT);
544 return;
545}
546
547static void gmac_init_rx_desc(struct dma_desc *p, unsigned int ring_size,
548 int disable_rx_ic)
549{
550 int i;
551 for (i = 0; i < ring_size; i++) {
552 p->des01.erx.own = 1;
553 p->des01.erx.buffer1_size = BUF_SIZE_8KiB - 1;
554 /* To support jumbo frames */
555 p->des01.erx.buffer2_size = BUF_SIZE_8KiB - 1;
556 if (i == ring_size - 1)
557 p->des01.erx.end_ring = 1;
558 if (disable_rx_ic)
559 p->des01.erx.disable_ic = 1;
560 p++;
561 }
562 return;
563}
564
565static void gmac_init_tx_desc(struct dma_desc *p, unsigned int ring_size)
566{
567 int i;
568
569 for (i = 0; i < ring_size; i++) {
570 p->des01.etx.own = 0;
571 if (i == ring_size - 1)
572 p->des01.etx.end_ring = 1;
573 p++;
574 }
575
576 return;
577}
578
579static int gmac_get_tx_owner(struct dma_desc *p)
580{
581 return p->des01.etx.own;
582}
583
584static int gmac_get_rx_owner(struct dma_desc *p)
585{
586 return p->des01.erx.own;
587}
588
589static void gmac_set_tx_owner(struct dma_desc *p)
590{
591 p->des01.etx.own = 1;
592}
593
594static void gmac_set_rx_owner(struct dma_desc *p)
595{
596 p->des01.erx.own = 1;
597}
598
599static int gmac_get_tx_ls(struct dma_desc *p)
600{
601 return p->des01.etx.last_segment;
602}
603
604static void gmac_release_tx_desc(struct dma_desc *p)
605{
606 int ter = p->des01.etx.end_ring;
607
608 memset(p, 0, sizeof(struct dma_desc));
609 p->des01.etx.end_ring = ter;
610
611 return;
612}
613
614static void gmac_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
615 int csum_flag)
616{
617 p->des01.etx.first_segment = is_fs;
618 if (unlikely(len > BUF_SIZE_4KiB)) {
619 p->des01.etx.buffer1_size = BUF_SIZE_4KiB;
620 p->des01.etx.buffer2_size = len - BUF_SIZE_4KiB;
621 } else {
622 p->des01.etx.buffer1_size = len;
623 }
624 if (likely(csum_flag))
625 p->des01.etx.checksum_insertion = cic_full;
626}
627
628static void gmac_clear_tx_ic(struct dma_desc *p)
629{
630 p->des01.etx.interrupt = 0;
631}
632
633static void gmac_close_tx_desc(struct dma_desc *p)
634{
635 p->des01.etx.last_segment = 1;
636 p->des01.etx.interrupt = 1;
637}
638
639static int gmac_get_rx_frame_len(struct dma_desc *p)
640{
641 return p->des01.erx.frame_length;
642}
643
644struct stmmac_ops gmac_driver = {
645 .core_init = gmac_core_init,
646 .dump_mac_regs = gmac_dump_regs,
647 .dma_init = gmac_dma_init,
648 .dump_dma_regs = gmac_dump_dma_regs,
649 .dma_mode = gmac_dma_operation_mode,
650 .dma_diagnostic_fr = gmac_dma_diagnostic_fr,
651 .tx_status = gmac_get_tx_frame_status,
652 .rx_status = gmac_get_rx_frame_status,
653 .get_tx_len = gmac_get_tx_len,
654 .set_filter = gmac_set_filter,
655 .flow_ctrl = gmac_flow_ctrl,
656 .pmt = gmac_pmt,
657 .init_rx_desc = gmac_init_rx_desc,
658 .init_tx_desc = gmac_init_tx_desc,
659 .get_tx_owner = gmac_get_tx_owner,
660 .get_rx_owner = gmac_get_rx_owner,
661 .release_tx_desc = gmac_release_tx_desc,
662 .prepare_tx_desc = gmac_prepare_tx_desc,
663 .clear_tx_ic = gmac_clear_tx_ic,
664 .close_tx_desc = gmac_close_tx_desc,
665 .get_tx_ls = gmac_get_tx_ls,
666 .set_tx_owner = gmac_set_tx_owner,
667 .set_rx_owner = gmac_set_rx_owner,
668 .get_rx_frame_len = gmac_get_rx_frame_len,
669 .host_irq_status = gmac_irq_status,
670 .set_umac_addr = gmac_set_umac_addr,
671 .get_umac_addr = gmac_get_umac_addr,
672};
673
674struct mac_device_info *gmac_setup(unsigned long ioaddr)
675{
676 struct mac_device_info *mac;
677 u32 uid = readl(ioaddr + GMAC_VERSION);
678
679 pr_info("\tGMAC - user ID: 0x%x, Synopsys ID: 0x%x\n",
680 ((uid & 0x0000ff00) >> 8), (uid & 0x000000ff));
681
682 mac = kzalloc(sizeof(const struct mac_device_info), GFP_KERNEL);
683
684 mac->ops = &gmac_driver;
685 mac->hw.pmt = PMT_SUPPORTED;
686 mac->hw.link.port = GMAC_CONTROL_PS;
687 mac->hw.link.duplex = GMAC_CONTROL_DM;
688 mac->hw.link.speed = GMAC_CONTROL_FES;
689 mac->hw.mii.addr = GMAC_MII_ADDR;
690 mac->hw.mii.data = GMAC_MII_DATA;
691
692 return mac;
693}
diff --git a/drivers/net/stmmac/gmac.h b/drivers/net/stmmac/gmac.h
new file mode 100644
index 000000000000..684a363120a9
--- /dev/null
+++ b/drivers/net/stmmac/gmac.h
@@ -0,0 +1,204 @@
1/*******************************************************************************
2 Copyright (C) 2007-2009 STMicroelectronics Ltd
3
4 This program is free software; you can redistribute it and/or modify it
5 under the terms and conditions of the GNU General Public License,
6 version 2, as published by the Free Software Foundation.
7
8 This program is distributed in the hope it will be useful, but WITHOUT
9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 more details.
12
13 You should have received a copy of the GNU General Public License along with
14 this program; if not, write to the Free Software Foundation, Inc.,
15 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16
17 The full GNU General Public License is included in this distribution in
18 the file called "COPYING".
19
20 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
21*******************************************************************************/
22
23#define GMAC_CONTROL 0x00000000 /* Configuration */
24#define GMAC_FRAME_FILTER 0x00000004 /* Frame Filter */
25#define GMAC_HASH_HIGH 0x00000008 /* Multicast Hash Table High */
26#define GMAC_HASH_LOW 0x0000000c /* Multicast Hash Table Low */
27#define GMAC_MII_ADDR 0x00000010 /* MII Address */
28#define GMAC_MII_DATA 0x00000014 /* MII Data */
29#define GMAC_FLOW_CTRL 0x00000018 /* Flow Control */
30#define GMAC_VLAN_TAG 0x0000001c /* VLAN Tag */
31#define GMAC_VERSION 0x00000020 /* GMAC CORE Version */
32#define GMAC_WAKEUP_FILTER 0x00000028 /* Wake-up Frame Filter */
33
34#define GMAC_INT_STATUS 0x00000038 /* interrupt status register */
35enum gmac_irq_status {
36 time_stamp_irq = 0x0200,
37 mmc_rx_csum_offload_irq = 0x0080,
38 mmc_tx_irq = 0x0040,
39 mmc_rx_irq = 0x0020,
40 mmc_irq = 0x0010,
41 pmt_irq = 0x0008,
42 pcs_ane_irq = 0x0004,
43 pcs_link_irq = 0x0002,
44 rgmii_irq = 0x0001,
45};
46#define GMAC_INT_MASK 0x0000003c /* interrupt mask register */
47
48/* PMT Control and Status */
49#define GMAC_PMT 0x0000002c
50enum power_event {
51 pointer_reset = 0x80000000,
52 global_unicast = 0x00000200,
53 wake_up_rx_frame = 0x00000040,
54 magic_frame = 0x00000020,
55 wake_up_frame_en = 0x00000004,
56 magic_pkt_en = 0x00000002,
57 power_down = 0x00000001,
58};
59
60/* GMAC HW ADDR regs */
61#define GMAC_ADDR_HIGH(reg) (0x00000040+(reg * 8))
62#define GMAC_ADDR_LOW(reg) (0x00000044+(reg * 8))
63#define GMAC_MAX_UNICAST_ADDRESSES 16
64
65#define GMAC_AN_CTRL 0x000000c0 /* AN control */
66#define GMAC_AN_STATUS 0x000000c4 /* AN status */
67#define GMAC_ANE_ADV 0x000000c8 /* Auto-Neg. Advertisement */
68#define GMAC_ANE_LINK 0x000000cc /* Auto-Neg. link partener ability */
69#define GMAC_ANE_EXP 0x000000d0 /* ANE expansion */
70#define GMAC_TBI 0x000000d4 /* TBI extend status */
71#define GMAC_GMII_STATUS 0x000000d8 /* S/R-GMII status */
72
73/* GMAC Configuration defines */
74#define GMAC_CONTROL_TC 0x01000000 /* Transmit Conf. in RGMII/SGMII */
75#define GMAC_CONTROL_WD 0x00800000 /* Disable Watchdog on receive */
76#define GMAC_CONTROL_JD 0x00400000 /* Jabber disable */
77#define GMAC_CONTROL_BE 0x00200000 /* Frame Burst Enable */
78#define GMAC_CONTROL_JE 0x00100000 /* Jumbo frame */
79enum inter_frame_gap {
80 GMAC_CONTROL_IFG_88 = 0x00040000,
81 GMAC_CONTROL_IFG_80 = 0x00020000,
82 GMAC_CONTROL_IFG_40 = 0x000e0000,
83};
84#define GMAC_CONTROL_DCRS 0x00010000 /* Disable carrier sense during tx */
85#define GMAC_CONTROL_PS 0x00008000 /* Port Select 0:GMI 1:MII */
86#define GMAC_CONTROL_FES 0x00004000 /* Speed 0:10 1:100 */
87#define GMAC_CONTROL_DO 0x00002000 /* Disable Rx Own */
88#define GMAC_CONTROL_LM 0x00001000 /* Loop-back mode */
89#define GMAC_CONTROL_DM 0x00000800 /* Duplex Mode */
90#define GMAC_CONTROL_IPC 0x00000400 /* Checksum Offload */
91#define GMAC_CONTROL_DR 0x00000200 /* Disable Retry */
92#define GMAC_CONTROL_LUD 0x00000100 /* Link up/down */
93#define GMAC_CONTROL_ACS 0x00000080 /* Automatic Pad Stripping */
94#define GMAC_CONTROL_DC 0x00000010 /* Deferral Check */
95#define GMAC_CONTROL_TE 0x00000008 /* Transmitter Enable */
96#define GMAC_CONTROL_RE 0x00000004 /* Receiver Enable */
97
98#define GMAC_CORE_INIT (GMAC_CONTROL_JD | GMAC_CONTROL_PS | GMAC_CONTROL_ACS | \
99 GMAC_CONTROL_IPC | GMAC_CONTROL_JE | GMAC_CONTROL_BE)
100
101/* GMAC Frame Filter defines */
102#define GMAC_FRAME_FILTER_PR 0x00000001 /* Promiscuous Mode */
103#define GMAC_FRAME_FILTER_HUC 0x00000002 /* Hash Unicast */
104#define GMAC_FRAME_FILTER_HMC 0x00000004 /* Hash Multicast */
105#define GMAC_FRAME_FILTER_DAIF 0x00000008 /* DA Inverse Filtering */
106#define GMAC_FRAME_FILTER_PM 0x00000010 /* Pass all multicast */
107#define GMAC_FRAME_FILTER_DBF 0x00000020 /* Disable Broadcast frames */
108#define GMAC_FRAME_FILTER_SAIF 0x00000100 /* Inverse Filtering */
109#define GMAC_FRAME_FILTER_SAF 0x00000200 /* Source Address Filter */
110#define GMAC_FRAME_FILTER_HPF 0x00000400 /* Hash or perfect Filter */
111#define GMAC_FRAME_FILTER_RA 0x80000000 /* Receive all mode */
112/* GMII ADDR defines */
113#define GMAC_MII_ADDR_WRITE 0x00000002 /* MII Write */
114#define GMAC_MII_ADDR_BUSY 0x00000001 /* MII Busy */
115/* GMAC FLOW CTRL defines */
116#define GMAC_FLOW_CTRL_PT_MASK 0xffff0000 /* Pause Time Mask */
117#define GMAC_FLOW_CTRL_PT_SHIFT 16
118#define GMAC_FLOW_CTRL_RFE 0x00000004 /* Rx Flow Control Enable */
119#define GMAC_FLOW_CTRL_TFE 0x00000002 /* Tx Flow Control Enable */
120#define GMAC_FLOW_CTRL_FCB_BPA 0x00000001 /* Flow Control Busy ... */
121
122/*--- DMA BLOCK defines ---*/
123/* DMA Bus Mode register defines */
124#define DMA_BUS_MODE_SFT_RESET 0x00000001 /* Software Reset */
125#define DMA_BUS_MODE_DA 0x00000002 /* Arbitration scheme */
126#define DMA_BUS_MODE_DSL_MASK 0x0000007c /* Descriptor Skip Length */
127#define DMA_BUS_MODE_DSL_SHIFT 2 /* (in DWORDS) */
128/* Programmable burst length (passed thorugh platform)*/
129#define DMA_BUS_MODE_PBL_MASK 0x00003f00 /* Programmable Burst Len */
130#define DMA_BUS_MODE_PBL_SHIFT 8
131
132enum rx_tx_priority_ratio {
133 double_ratio = 0x00004000, /*2:1 */
134 triple_ratio = 0x00008000, /*3:1 */
135 quadruple_ratio = 0x0000c000, /*4:1 */
136};
137
138#define DMA_BUS_MODE_FB 0x00010000 /* Fixed burst */
139#define DMA_BUS_MODE_RPBL_MASK 0x003e0000 /* Rx-Programmable Burst Len */
140#define DMA_BUS_MODE_RPBL_SHIFT 17
141#define DMA_BUS_MODE_USP 0x00800000
142#define DMA_BUS_MODE_4PBL 0x01000000
143#define DMA_BUS_MODE_AAL 0x02000000
144
145/* DMA CRS Control and Status Register Mapping */
146#define DMA_HOST_TX_DESC 0x00001048 /* Current Host Tx descriptor */
147#define DMA_HOST_RX_DESC 0x0000104c /* Current Host Rx descriptor */
148/* DMA Bus Mode register defines */
149#define DMA_BUS_PR_RATIO_MASK 0x0000c000 /* Rx/Tx priority ratio */
150#define DMA_BUS_PR_RATIO_SHIFT 14
151#define DMA_BUS_FB 0x00010000 /* Fixed Burst */
152
153/* DMA operation mode defines (start/stop tx/rx are placed in common header)*/
154#define DMA_CONTROL_DT 0x04000000 /* Disable Drop TCP/IP csum error */
155#define DMA_CONTROL_RSF 0x02000000 /* Receive Store and Forward */
156#define DMA_CONTROL_DFF 0x01000000 /* Disaable flushing */
157/* Theshold for Activating the FC */
158enum rfa {
159 act_full_minus_1 = 0x00800000,
160 act_full_minus_2 = 0x00800200,
161 act_full_minus_3 = 0x00800400,
162 act_full_minus_4 = 0x00800600,
163};
164/* Theshold for Deactivating the FC */
165enum rfd {
166 deac_full_minus_1 = 0x00400000,
167 deac_full_minus_2 = 0x00400800,
168 deac_full_minus_3 = 0x00401000,
169 deac_full_minus_4 = 0x00401800,
170};
171#define DMA_CONTROL_TSF 0x00200000 /* Transmit Store and Forward */
172#define DMA_CONTROL_FTF 0x00100000 /* Flush transmit FIFO */
173
174enum ttc_control {
175 DMA_CONTROL_TTC_64 = 0x00000000,
176 DMA_CONTROL_TTC_128 = 0x00004000,
177 DMA_CONTROL_TTC_192 = 0x00008000,
178 DMA_CONTROL_TTC_256 = 0x0000c000,
179 DMA_CONTROL_TTC_40 = 0x00010000,
180 DMA_CONTROL_TTC_32 = 0x00014000,
181 DMA_CONTROL_TTC_24 = 0x00018000,
182 DMA_CONTROL_TTC_16 = 0x0001c000,
183};
184#define DMA_CONTROL_TC_TX_MASK 0xfffe3fff
185
186#define DMA_CONTROL_EFC 0x00000100
187#define DMA_CONTROL_FEF 0x00000080
188#define DMA_CONTROL_FUF 0x00000040
189
190enum rtc_control {
191 DMA_CONTROL_RTC_64 = 0x00000000,
192 DMA_CONTROL_RTC_32 = 0x00000008,
193 DMA_CONTROL_RTC_96 = 0x00000010,
194 DMA_CONTROL_RTC_128 = 0x00000018,
195};
196#define DMA_CONTROL_TC_RX_MASK 0xffffffe7
197
198#define DMA_CONTROL_OSF 0x00000004 /* Operate on second frame */
199
200/* MMC registers offset */
201#define GMAC_MMC_CTRL 0x100
202#define GMAC_MMC_RX_INTR 0x104
203#define GMAC_MMC_TX_INTR 0x108
204#define GMAC_MMC_RX_CSUM_OFFLOAD 0x208
diff --git a/drivers/net/stmmac/mac100.c b/drivers/net/stmmac/mac100.c
new file mode 100644
index 000000000000..625171b6062b
--- /dev/null
+++ b/drivers/net/stmmac/mac100.c
@@ -0,0 +1,517 @@
1/*******************************************************************************
2 This is the driver for the MAC 10/100 on-chip Ethernet controller
3 currently tested on all the ST boards based on STb7109 and stx7200 SoCs.
4
5 DWC Ether MAC 10/100 Universal version 4.0 has been used for developing
6 this code.
7
8 Copyright (C) 2007-2009 STMicroelectronics Ltd
9
10 This program is free software; you can redistribute it and/or modify it
11 under the terms and conditions of the GNU General Public License,
12 version 2, as published by the Free Software Foundation.
13
14 This program is distributed in the hope it will be useful, but WITHOUT
15 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 more details.
18
19 You should have received a copy of the GNU General Public License along with
20 this program; if not, write to the Free Software Foundation, Inc.,
21 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
22
23 The full GNU General Public License is included in this distribution in
24 the file called "COPYING".
25
26 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
27*******************************************************************************/
28
29#include <linux/netdevice.h>
30#include <linux/crc32.h>
31#include <linux/mii.h>
32#include <linux/phy.h>
33
34#include "common.h"
35#include "mac100.h"
36
37#undef MAC100_DEBUG
38/*#define MAC100_DEBUG*/
39#ifdef MAC100_DEBUG
40#define DBG(fmt, args...) printk(fmt, ## args)
41#else
42#define DBG(fmt, args...) do { } while (0)
43#endif
44
45static void mac100_core_init(unsigned long ioaddr)
46{
47 u32 value = readl(ioaddr + MAC_CONTROL);
48
49 writel((value | MAC_CORE_INIT), ioaddr + MAC_CONTROL);
50
51#ifdef STMMAC_VLAN_TAG_USED
52 writel(ETH_P_8021Q, ioaddr + MAC_VLAN1);
53#endif
54 return;
55}
56
57static void mac100_dump_mac_regs(unsigned long ioaddr)
58{
59 pr_info("\t----------------------------------------------\n"
60 "\t MAC100 CSR (base addr = 0x%8x)\n"
61 "\t----------------------------------------------\n",
62 (unsigned int)ioaddr);
63 pr_info("\tcontrol reg (offset 0x%x): 0x%08x\n", MAC_CONTROL,
64 readl(ioaddr + MAC_CONTROL));
65 pr_info("\taddr HI (offset 0x%x): 0x%08x\n ", MAC_ADDR_HIGH,
66 readl(ioaddr + MAC_ADDR_HIGH));
67 pr_info("\taddr LO (offset 0x%x): 0x%08x\n", MAC_ADDR_LOW,
68 readl(ioaddr + MAC_ADDR_LOW));
69 pr_info("\tmulticast hash HI (offset 0x%x): 0x%08x\n",
70 MAC_HASH_HIGH, readl(ioaddr + MAC_HASH_HIGH));
71 pr_info("\tmulticast hash LO (offset 0x%x): 0x%08x\n",
72 MAC_HASH_LOW, readl(ioaddr + MAC_HASH_LOW));
73 pr_info("\tflow control (offset 0x%x): 0x%08x\n",
74 MAC_FLOW_CTRL, readl(ioaddr + MAC_FLOW_CTRL));
75 pr_info("\tVLAN1 tag (offset 0x%x): 0x%08x\n", MAC_VLAN1,
76 readl(ioaddr + MAC_VLAN1));
77 pr_info("\tVLAN2 tag (offset 0x%x): 0x%08x\n", MAC_VLAN2,
78 readl(ioaddr + MAC_VLAN2));
79 pr_info("\n\tMAC management counter registers\n");
80 pr_info("\t MMC crtl (offset 0x%x): 0x%08x\n",
81 MMC_CONTROL, readl(ioaddr + MMC_CONTROL));
82 pr_info("\t MMC High Interrupt (offset 0x%x): 0x%08x\n",
83 MMC_HIGH_INTR, readl(ioaddr + MMC_HIGH_INTR));
84 pr_info("\t MMC Low Interrupt (offset 0x%x): 0x%08x\n",
85 MMC_LOW_INTR, readl(ioaddr + MMC_LOW_INTR));
86 pr_info("\t MMC High Interrupt Mask (offset 0x%x): 0x%08x\n",
87 MMC_HIGH_INTR_MASK, readl(ioaddr + MMC_HIGH_INTR_MASK));
88 pr_info("\t MMC Low Interrupt Mask (offset 0x%x): 0x%08x\n",
89 MMC_LOW_INTR_MASK, readl(ioaddr + MMC_LOW_INTR_MASK));
90 return;
91}
92
93static int mac100_dma_init(unsigned long ioaddr, int pbl, u32 dma_tx,
94 u32 dma_rx)
95{
96 u32 value = readl(ioaddr + DMA_BUS_MODE);
97 /* DMA SW reset */
98 value |= DMA_BUS_MODE_SFT_RESET;
99 writel(value, ioaddr + DMA_BUS_MODE);
100 do {} while ((readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET));
101
102 /* Enable Application Access by writing to DMA CSR0 */
103 writel(DMA_BUS_MODE_DEFAULT | (pbl << DMA_BUS_MODE_PBL_SHIFT),
104 ioaddr + DMA_BUS_MODE);
105
106 /* Mask interrupts by writing to CSR7 */
107 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA);
108
109 /* The base address of the RX/TX descriptor lists must be written into
110 * DMA CSR3 and CSR4, respectively. */
111 writel(dma_tx, ioaddr + DMA_TX_BASE_ADDR);
112 writel(dma_rx, ioaddr + DMA_RCV_BASE_ADDR);
113
114 return 0;
115}
116
117/* Store and Forward capability is not used at all..
118 * The transmit threshold can be programmed by
119 * setting the TTC bits in the DMA control register.*/
120static void mac100_dma_operation_mode(unsigned long ioaddr, int txmode,
121 int rxmode)
122{
123 u32 csr6 = readl(ioaddr + DMA_CONTROL);
124
125 if (txmode <= 32)
126 csr6 |= DMA_CONTROL_TTC_32;
127 else if (txmode <= 64)
128 csr6 |= DMA_CONTROL_TTC_64;
129 else
130 csr6 |= DMA_CONTROL_TTC_128;
131
132 writel(csr6, ioaddr + DMA_CONTROL);
133
134 return;
135}
136
137static void mac100_dump_dma_regs(unsigned long ioaddr)
138{
139 int i;
140
141 DBG(KERN_DEBUG "MAC100 DMA CSR \n");
142 for (i = 0; i < 9; i++)
143 pr_debug("\t CSR%d (offset 0x%x): 0x%08x\n", i,
144 (DMA_BUS_MODE + i * 4),
145 readl(ioaddr + DMA_BUS_MODE + i * 4));
146 DBG(KERN_DEBUG "\t CSR20 (offset 0x%x): 0x%08x\n",
147 DMA_CUR_TX_BUF_ADDR, readl(ioaddr + DMA_CUR_TX_BUF_ADDR));
148 DBG(KERN_DEBUG "\t CSR21 (offset 0x%x): 0x%08x\n",
149 DMA_CUR_RX_BUF_ADDR, readl(ioaddr + DMA_CUR_RX_BUF_ADDR));
150 return;
151}
152
153/* DMA controller has two counters to track the number of
154 the receive missed frames. */
155static void mac100_dma_diagnostic_fr(void *data, struct stmmac_extra_stats *x,
156 unsigned long ioaddr)
157{
158 struct net_device_stats *stats = (struct net_device_stats *)data;
159 u32 csr8 = readl(ioaddr + DMA_MISSED_FRAME_CTR);
160
161 if (unlikely(csr8)) {
162 if (csr8 & DMA_MISSED_FRAME_OVE) {
163 stats->rx_over_errors += 0x800;
164 x->rx_overflow_cntr += 0x800;
165 } else {
166 unsigned int ove_cntr;
167 ove_cntr = ((csr8 & DMA_MISSED_FRAME_OVE_CNTR) >> 17);
168 stats->rx_over_errors += ove_cntr;
169 x->rx_overflow_cntr += ove_cntr;
170 }
171
172 if (csr8 & DMA_MISSED_FRAME_OVE_M) {
173 stats->rx_missed_errors += 0xffff;
174 x->rx_missed_cntr += 0xffff;
175 } else {
176 unsigned int miss_f = (csr8 & DMA_MISSED_FRAME_M_CNTR);
177 stats->rx_missed_errors += miss_f;
178 x->rx_missed_cntr += miss_f;
179 }
180 }
181 return;
182}
183
184static int mac100_get_tx_frame_status(void *data, struct stmmac_extra_stats *x,
185 struct dma_desc *p, unsigned long ioaddr)
186{
187 int ret = 0;
188 struct net_device_stats *stats = (struct net_device_stats *)data;
189
190 if (unlikely(p->des01.tx.error_summary)) {
191 if (unlikely(p->des01.tx.underflow_error)) {
192 x->tx_underflow++;
193 stats->tx_fifo_errors++;
194 }
195 if (unlikely(p->des01.tx.no_carrier)) {
196 x->tx_carrier++;
197 stats->tx_carrier_errors++;
198 }
199 if (unlikely(p->des01.tx.loss_carrier)) {
200 x->tx_losscarrier++;
201 stats->tx_carrier_errors++;
202 }
203 if (unlikely((p->des01.tx.excessive_deferral) ||
204 (p->des01.tx.excessive_collisions) ||
205 (p->des01.tx.late_collision)))
206 stats->collisions += p->des01.tx.collision_count;
207 ret = -1;
208 }
209 if (unlikely(p->des01.tx.heartbeat_fail)) {
210 x->tx_heartbeat++;
211 stats->tx_heartbeat_errors++;
212 ret = -1;
213 }
214 if (unlikely(p->des01.tx.deferred))
215 x->tx_deferred++;
216
217 return ret;
218}
219
220static int mac100_get_tx_len(struct dma_desc *p)
221{
222 return p->des01.tx.buffer1_size;
223}
224
225/* This function verifies if each incoming frame has some errors
226 * and, if required, updates the multicast statistics.
227 * In case of success, it returns csum_none becasue the device
228 * is not able to compute the csum in HW. */
229static int mac100_get_rx_frame_status(void *data, struct stmmac_extra_stats *x,
230 struct dma_desc *p)
231{
232 int ret = csum_none;
233 struct net_device_stats *stats = (struct net_device_stats *)data;
234
235 if (unlikely(p->des01.rx.last_descriptor == 0)) {
236 pr_warning("mac100 Error: Oversized Ethernet "
237 "frame spanned multiple buffers\n");
238 stats->rx_length_errors++;
239 return discard_frame;
240 }
241
242 if (unlikely(p->des01.rx.error_summary)) {
243 if (unlikely(p->des01.rx.descriptor_error))
244 x->rx_desc++;
245 if (unlikely(p->des01.rx.partial_frame_error))
246 x->rx_partial++;
247 if (unlikely(p->des01.rx.run_frame))
248 x->rx_runt++;
249 if (unlikely(p->des01.rx.frame_too_long))
250 x->rx_toolong++;
251 if (unlikely(p->des01.rx.collision)) {
252 x->rx_collision++;
253 stats->collisions++;
254 }
255 if (unlikely(p->des01.rx.crc_error)) {
256 x->rx_crc++;
257 stats->rx_crc_errors++;
258 }
259 ret = discard_frame;
260 }
261 if (unlikely(p->des01.rx.dribbling))
262 ret = discard_frame;
263
264 if (unlikely(p->des01.rx.length_error)) {
265 x->rx_lenght++;
266 ret = discard_frame;
267 }
268 if (unlikely(p->des01.rx.mii_error)) {
269 x->rx_mii++;
270 ret = discard_frame;
271 }
272 if (p->des01.rx.multicast_frame) {
273 x->rx_multicast++;
274 stats->multicast++;
275 }
276 return ret;
277}
278
279static void mac100_irq_status(unsigned long ioaddr)
280{
281 return;
282}
283
284static void mac100_set_umac_addr(unsigned long ioaddr, unsigned char *addr,
285 unsigned int reg_n)
286{
287 stmmac_set_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);
288}
289
290static void mac100_get_umac_addr(unsigned long ioaddr, unsigned char *addr,
291 unsigned int reg_n)
292{
293 stmmac_get_mac_addr(ioaddr, addr, MAC_ADDR_HIGH, MAC_ADDR_LOW);
294}
295
296static void mac100_set_filter(struct net_device *dev)
297{
298 unsigned long ioaddr = dev->base_addr;
299 u32 value = readl(ioaddr + MAC_CONTROL);
300
301 if (dev->flags & IFF_PROMISC) {
302 value |= MAC_CONTROL_PR;
303 value &= ~(MAC_CONTROL_PM | MAC_CONTROL_IF | MAC_CONTROL_HO |
304 MAC_CONTROL_HP);
305 } else if ((dev->mc_count > HASH_TABLE_SIZE)
306 || (dev->flags & IFF_ALLMULTI)) {
307 value |= MAC_CONTROL_PM;
308 value &= ~(MAC_CONTROL_PR | MAC_CONTROL_IF | MAC_CONTROL_HO);
309 writel(0xffffffff, ioaddr + MAC_HASH_HIGH);
310 writel(0xffffffff, ioaddr + MAC_HASH_LOW);
311 } else if (dev->mc_count == 0) { /* no multicast */
312 value &= ~(MAC_CONTROL_PM | MAC_CONTROL_PR | MAC_CONTROL_IF |
313 MAC_CONTROL_HO | MAC_CONTROL_HP);
314 } else {
315 int i;
316 u32 mc_filter[2];
317 struct dev_mc_list *mclist;
318
319 /* Perfect filter mode for physical address and Hash
320 filter for multicast */
321 value |= MAC_CONTROL_HP;
322 value &= ~(MAC_CONTROL_PM | MAC_CONTROL_PR | MAC_CONTROL_IF
323 | MAC_CONTROL_HO);
324
325 memset(mc_filter, 0, sizeof(mc_filter));
326 for (i = 0, mclist = dev->mc_list;
327 mclist && i < dev->mc_count; i++, mclist = mclist->next) {
328 /* The upper 6 bits of the calculated CRC are used to
329 * index the contens of the hash table */
330 int bit_nr =
331 ether_crc(ETH_ALEN, mclist->dmi_addr) >> 26;
332 /* The most significant bit determines the register to
333 * use (H/L) while the other 5 bits determine the bit
334 * within the register. */
335 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
336 }
337 writel(mc_filter[0], ioaddr + MAC_HASH_LOW);
338 writel(mc_filter[1], ioaddr + MAC_HASH_HIGH);
339 }
340
341 writel(value, ioaddr + MAC_CONTROL);
342
343 DBG(KERN_INFO "%s: CTRL reg: 0x%08x Hash regs: "
344 "HI 0x%08x, LO 0x%08x\n",
345 __func__, readl(ioaddr + MAC_CONTROL),
346 readl(ioaddr + MAC_HASH_HIGH), readl(ioaddr + MAC_HASH_LOW));
347 return;
348}
349
350static void mac100_flow_ctrl(unsigned long ioaddr, unsigned int duplex,
351 unsigned int fc, unsigned int pause_time)
352{
353 unsigned int flow = MAC_FLOW_CTRL_ENABLE;
354
355 if (duplex)
356 flow |= (pause_time << MAC_FLOW_CTRL_PT_SHIFT);
357 writel(flow, ioaddr + MAC_FLOW_CTRL);
358
359 return;
360}
361
362/* No PMT module supported in our SoC for the Ethernet Controller. */
363static void mac100_pmt(unsigned long ioaddr, unsigned long mode)
364{
365 return;
366}
367
368static void mac100_init_rx_desc(struct dma_desc *p, unsigned int ring_size,
369 int disable_rx_ic)
370{
371 int i;
372 for (i = 0; i < ring_size; i++) {
373 p->des01.rx.own = 1;
374 p->des01.rx.buffer1_size = BUF_SIZE_2KiB - 1;
375 if (i == ring_size - 1)
376 p->des01.rx.end_ring = 1;
377 if (disable_rx_ic)
378 p->des01.rx.disable_ic = 1;
379 p++;
380 }
381 return;
382}
383
384static void mac100_init_tx_desc(struct dma_desc *p, unsigned int ring_size)
385{
386 int i;
387 for (i = 0; i < ring_size; i++) {
388 p->des01.tx.own = 0;
389 if (i == ring_size - 1)
390 p->des01.tx.end_ring = 1;
391 p++;
392 }
393 return;
394}
395
396static int mac100_get_tx_owner(struct dma_desc *p)
397{
398 return p->des01.tx.own;
399}
400
401static int mac100_get_rx_owner(struct dma_desc *p)
402{
403 return p->des01.rx.own;
404}
405
406static void mac100_set_tx_owner(struct dma_desc *p)
407{
408 p->des01.tx.own = 1;
409}
410
411static void mac100_set_rx_owner(struct dma_desc *p)
412{
413 p->des01.rx.own = 1;
414}
415
416static int mac100_get_tx_ls(struct dma_desc *p)
417{
418 return p->des01.tx.last_segment;
419}
420
421static void mac100_release_tx_desc(struct dma_desc *p)
422{
423 int ter = p->des01.tx.end_ring;
424
425 /* clean field used within the xmit */
426 p->des01.tx.first_segment = 0;
427 p->des01.tx.last_segment = 0;
428 p->des01.tx.buffer1_size = 0;
429
430 /* clean status reported */
431 p->des01.tx.error_summary = 0;
432 p->des01.tx.underflow_error = 0;
433 p->des01.tx.no_carrier = 0;
434 p->des01.tx.loss_carrier = 0;
435 p->des01.tx.excessive_deferral = 0;
436 p->des01.tx.excessive_collisions = 0;
437 p->des01.tx.late_collision = 0;
438 p->des01.tx.heartbeat_fail = 0;
439 p->des01.tx.deferred = 0;
440
441 /* set termination field */
442 p->des01.tx.end_ring = ter;
443
444 return;
445}
446
447static void mac100_prepare_tx_desc(struct dma_desc *p, int is_fs, int len,
448 int csum_flag)
449{
450 p->des01.tx.first_segment = is_fs;
451 p->des01.tx.buffer1_size = len;
452}
453
454static void mac100_clear_tx_ic(struct dma_desc *p)
455{
456 p->des01.tx.interrupt = 0;
457}
458
459static void mac100_close_tx_desc(struct dma_desc *p)
460{
461 p->des01.tx.last_segment = 1;
462 p->des01.tx.interrupt = 1;
463}
464
465static int mac100_get_rx_frame_len(struct dma_desc *p)
466{
467 return p->des01.rx.frame_length;
468}
469
470struct stmmac_ops mac100_driver = {
471 .core_init = mac100_core_init,
472 .dump_mac_regs = mac100_dump_mac_regs,
473 .dma_init = mac100_dma_init,
474 .dump_dma_regs = mac100_dump_dma_regs,
475 .dma_mode = mac100_dma_operation_mode,
476 .dma_diagnostic_fr = mac100_dma_diagnostic_fr,
477 .tx_status = mac100_get_tx_frame_status,
478 .rx_status = mac100_get_rx_frame_status,
479 .get_tx_len = mac100_get_tx_len,
480 .set_filter = mac100_set_filter,
481 .flow_ctrl = mac100_flow_ctrl,
482 .pmt = mac100_pmt,
483 .init_rx_desc = mac100_init_rx_desc,
484 .init_tx_desc = mac100_init_tx_desc,
485 .get_tx_owner = mac100_get_tx_owner,
486 .get_rx_owner = mac100_get_rx_owner,
487 .release_tx_desc = mac100_release_tx_desc,
488 .prepare_tx_desc = mac100_prepare_tx_desc,
489 .clear_tx_ic = mac100_clear_tx_ic,
490 .close_tx_desc = mac100_close_tx_desc,
491 .get_tx_ls = mac100_get_tx_ls,
492 .set_tx_owner = mac100_set_tx_owner,
493 .set_rx_owner = mac100_set_rx_owner,
494 .get_rx_frame_len = mac100_get_rx_frame_len,
495 .host_irq_status = mac100_irq_status,
496 .set_umac_addr = mac100_set_umac_addr,
497 .get_umac_addr = mac100_get_umac_addr,
498};
499
500struct mac_device_info *mac100_setup(unsigned long ioaddr)
501{
502 struct mac_device_info *mac;
503
504 mac = kzalloc(sizeof(const struct mac_device_info), GFP_KERNEL);
505
506 pr_info("\tMAC 10/100\n");
507
508 mac->ops = &mac100_driver;
509 mac->hw.pmt = PMT_NOT_SUPPORTED;
510 mac->hw.link.port = MAC_CONTROL_PS;
511 mac->hw.link.duplex = MAC_CONTROL_F;
512 mac->hw.link.speed = 0;
513 mac->hw.mii.addr = MAC_MII_ADDR;
514 mac->hw.mii.data = MAC_MII_DATA;
515
516 return mac;
517}
diff --git a/drivers/net/stmmac/mac100.h b/drivers/net/stmmac/mac100.h
new file mode 100644
index 000000000000..0f8f110d004a
--- /dev/null
+++ b/drivers/net/stmmac/mac100.h
@@ -0,0 +1,116 @@
1/*******************************************************************************
2 MAC 10/100 Header File
3
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23*******************************************************************************/
24
25/*----------------------------------------------------------------------------
26 * MAC BLOCK defines
27 *---------------------------------------------------------------------------*/
28/* MAC CSR offset */
29#define MAC_CONTROL 0x00000000 /* MAC Control */
30#define MAC_ADDR_HIGH 0x00000004 /* MAC Address High */
31#define MAC_ADDR_LOW 0x00000008 /* MAC Address Low */
32#define MAC_HASH_HIGH 0x0000000c /* Multicast Hash Table High */
33#define MAC_HASH_LOW 0x00000010 /* Multicast Hash Table Low */
34#define MAC_MII_ADDR 0x00000014 /* MII Address */
35#define MAC_MII_DATA 0x00000018 /* MII Data */
36#define MAC_FLOW_CTRL 0x0000001c /* Flow Control */
37#define MAC_VLAN1 0x00000020 /* VLAN1 Tag */
38#define MAC_VLAN2 0x00000024 /* VLAN2 Tag */
39
40/* MAC CTRL defines */
41#define MAC_CONTROL_RA 0x80000000 /* Receive All Mode */
42#define MAC_CONTROL_BLE 0x40000000 /* Endian Mode */
43#define MAC_CONTROL_HBD 0x10000000 /* Heartbeat Disable */
44#define MAC_CONTROL_PS 0x08000000 /* Port Select */
45#define MAC_CONTROL_DRO 0x00800000 /* Disable Receive Own */
46#define MAC_CONTROL_EXT_LOOPBACK 0x00400000 /* Reserved (ext loopback?) */
47#define MAC_CONTROL_OM 0x00200000 /* Loopback Operating Mode */
48#define MAC_CONTROL_F 0x00100000 /* Full Duplex Mode */
49#define MAC_CONTROL_PM 0x00080000 /* Pass All Multicast */
50#define MAC_CONTROL_PR 0x00040000 /* Promiscuous Mode */
51#define MAC_CONTROL_IF 0x00020000 /* Inverse Filtering */
52#define MAC_CONTROL_PB 0x00010000 /* Pass Bad Frames */
53#define MAC_CONTROL_HO 0x00008000 /* Hash Only Filtering Mode */
54#define MAC_CONTROL_HP 0x00002000 /* Hash/Perfect Filtering Mode */
55#define MAC_CONTROL_LCC 0x00001000 /* Late Collision Control */
56#define MAC_CONTROL_DBF 0x00000800 /* Disable Broadcast Frames */
57#define MAC_CONTROL_DRTY 0x00000400 /* Disable Retry */
58#define MAC_CONTROL_ASTP 0x00000100 /* Automatic Pad Stripping */
59#define MAC_CONTROL_BOLMT_10 0x00000000 /* Back Off Limit 10 */
60#define MAC_CONTROL_BOLMT_8 0x00000040 /* Back Off Limit 8 */
61#define MAC_CONTROL_BOLMT_4 0x00000080 /* Back Off Limit 4 */
62#define MAC_CONTROL_BOLMT_1 0x000000c0 /* Back Off Limit 1 */
63#define MAC_CONTROL_DC 0x00000020 /* Deferral Check */
64#define MAC_CONTROL_TE 0x00000008 /* Transmitter Enable */
65#define MAC_CONTROL_RE 0x00000004 /* Receiver Enable */
66
67#define MAC_CORE_INIT (MAC_CONTROL_HBD | MAC_CONTROL_ASTP)
68
69/* MAC FLOW CTRL defines */
70#define MAC_FLOW_CTRL_PT_MASK 0xffff0000 /* Pause Time Mask */
71#define MAC_FLOW_CTRL_PT_SHIFT 16
72#define MAC_FLOW_CTRL_PASS 0x00000004 /* Pass Control Frames */
73#define MAC_FLOW_CTRL_ENABLE 0x00000002 /* Flow Control Enable */
74#define MAC_FLOW_CTRL_PAUSE 0x00000001 /* Flow Control Busy ... */
75
76/* MII ADDR defines */
77#define MAC_MII_ADDR_WRITE 0x00000002 /* MII Write */
78#define MAC_MII_ADDR_BUSY 0x00000001 /* MII Busy */
79
80/*----------------------------------------------------------------------------
81 * DMA BLOCK defines
82 *---------------------------------------------------------------------------*/
83
84/* DMA Bus Mode register defines */
85#define DMA_BUS_MODE_DBO 0x00100000 /* Descriptor Byte Ordering */
86#define DMA_BUS_MODE_BLE 0x00000080 /* Big Endian/Little Endian */
87#define DMA_BUS_MODE_PBL_MASK 0x00003f00 /* Programmable Burst Len */
88#define DMA_BUS_MODE_PBL_SHIFT 8
89#define DMA_BUS_MODE_DSL_MASK 0x0000007c /* Descriptor Skip Length */
90#define DMA_BUS_MODE_DSL_SHIFT 2 /* (in DWORDS) */
91#define DMA_BUS_MODE_BAR_BUS 0x00000002 /* Bar-Bus Arbitration */
92#define DMA_BUS_MODE_SFT_RESET 0x00000001 /* Software Reset */
93#define DMA_BUS_MODE_DEFAULT 0x00000000
94
95/* DMA Control register defines */
96#define DMA_CONTROL_SF 0x00200000 /* Store And Forward */
97
98/* Transmit Threshold Control */
99enum ttc_control {
100 DMA_CONTROL_TTC_DEFAULT = 0x00000000, /* Threshold is 32 DWORDS */
101 DMA_CONTROL_TTC_64 = 0x00004000, /* Threshold is 64 DWORDS */
102 DMA_CONTROL_TTC_128 = 0x00008000, /* Threshold is 128 DWORDS */
103 DMA_CONTROL_TTC_256 = 0x0000c000, /* Threshold is 256 DWORDS */
104 DMA_CONTROL_TTC_18 = 0x00400000, /* Threshold is 18 DWORDS */
105 DMA_CONTROL_TTC_24 = 0x00404000, /* Threshold is 24 DWORDS */
106 DMA_CONTROL_TTC_32 = 0x00408000, /* Threshold is 32 DWORDS */
107 DMA_CONTROL_TTC_40 = 0x0040c000, /* Threshold is 40 DWORDS */
108 DMA_CONTROL_SE = 0x00000008, /* Stop On Empty */
109 DMA_CONTROL_OSF = 0x00000004, /* Operate On 2nd Frame */
110};
111
112/* STMAC110 DMA Missed Frame Counter register defines */
113#define DMA_MISSED_FRAME_OVE 0x10000000 /* FIFO Overflow Overflow */
114#define DMA_MISSED_FRAME_OVE_CNTR 0x0ffe0000 /* Overflow Frame Counter */
115#define DMA_MISSED_FRAME_OVE_M 0x00010000 /* Missed Frame Overflow */
116#define DMA_MISSED_FRAME_M_CNTR 0x0000ffff /* Missed Frame Couinter */
diff --git a/drivers/net/stmmac/stmmac.h b/drivers/net/stmmac/stmmac.h
new file mode 100644
index 000000000000..6d2eae3040e5
--- /dev/null
+++ b/drivers/net/stmmac/stmmac.h
@@ -0,0 +1,98 @@
1/*******************************************************************************
2 Copyright (C) 2007-2009 STMicroelectronics Ltd
3
4 This program is free software; you can redistribute it and/or modify it
5 under the terms and conditions of the GNU General Public License,
6 version 2, as published by the Free Software Foundation.
7
8 This program is distributed in the hope it will be useful, but WITHOUT
9 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 more details.
12
13 You should have received a copy of the GNU General Public License along with
14 this program; if not, write to the Free Software Foundation, Inc.,
15 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
16
17 The full GNU General Public License is included in this distribution in
18 the file called "COPYING".
19
20 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
21*******************************************************************************/
22
23#define DRV_MODULE_VERSION "Oct_09"
24
25#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
26#define STMMAC_VLAN_TAG_USED
27#include <linux/if_vlan.h>
28#endif
29
30#include "common.h"
31#ifdef CONFIG_STMMAC_TIMER
32#include "stmmac_timer.h"
33#endif
34
35struct stmmac_priv {
36 /* Frequently used values are kept adjacent for cache effect */
37 struct dma_desc *dma_tx ____cacheline_aligned;
38 dma_addr_t dma_tx_phy;
39 struct sk_buff **tx_skbuff;
40 unsigned int cur_tx;
41 unsigned int dirty_tx;
42 unsigned int dma_tx_size;
43 int tx_coe;
44 int tx_coalesce;
45
46 struct dma_desc *dma_rx ;
47 unsigned int cur_rx;
48 unsigned int dirty_rx;
49 struct sk_buff **rx_skbuff;
50 dma_addr_t *rx_skbuff_dma;
51 struct sk_buff_head rx_recycle;
52
53 struct net_device *dev;
54 int is_gmac;
55 dma_addr_t dma_rx_phy;
56 unsigned int dma_rx_size;
57 int rx_csum;
58 unsigned int dma_buf_sz;
59 struct device *device;
60 struct mac_device_info *mac_type;
61
62 struct stmmac_extra_stats xstats;
63 struct napi_struct napi;
64
65 phy_interface_t phy_interface;
66 int pbl;
67 int bus_id;
68 int phy_addr;
69 int phy_mask;
70 int (*phy_reset) (void *priv);
71 void (*fix_mac_speed) (void *priv, unsigned int speed);
72 void *bsp_priv;
73
74 int phy_irq;
75 struct phy_device *phydev;
76 int oldlink;
77 int speed;
78 int oldduplex;
79 unsigned int flow_ctrl;
80 unsigned int pause;
81 struct mii_bus *mii;
82
83 u32 msg_enable;
84 spinlock_t lock;
85 int wolopts;
86 int wolenabled;
87 int shutdown;
88#ifdef CONFIG_STMMAC_TIMER
89 struct stmmac_timer *tm;
90#endif
91#ifdef STMMAC_VLAN_TAG_USED
92 struct vlan_group *vlgrp;
93#endif
94};
95
96extern int stmmac_mdio_unregister(struct net_device *ndev);
97extern int stmmac_mdio_register(struct net_device *ndev);
98extern void stmmac_set_ethtool_ops(struct net_device *netdev);
diff --git a/drivers/net/stmmac/stmmac_ethtool.c b/drivers/net/stmmac/stmmac_ethtool.c
new file mode 100644
index 000000000000..694ebe6a0758
--- /dev/null
+++ b/drivers/net/stmmac/stmmac_ethtool.c
@@ -0,0 +1,395 @@
1/*******************************************************************************
2 STMMAC Ethtool support
3
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23*******************************************************************************/
24
25#include <linux/etherdevice.h>
26#include <linux/ethtool.h>
27#include <linux/mii.h>
28#include <linux/phy.h>
29
30#include "stmmac.h"
31
32#define REG_SPACE_SIZE 0x1054
33#define MAC100_ETHTOOL_NAME "st_mac100"
34#define GMAC_ETHTOOL_NAME "st_gmac"
35
36struct stmmac_stats {
37 char stat_string[ETH_GSTRING_LEN];
38 int sizeof_stat;
39 int stat_offset;
40};
41
42#define STMMAC_STAT(m) \
43 { #m, FIELD_SIZEOF(struct stmmac_extra_stats, m), \
44 offsetof(struct stmmac_priv, xstats.m)}
45
46static const struct stmmac_stats stmmac_gstrings_stats[] = {
47 STMMAC_STAT(tx_underflow),
48 STMMAC_STAT(tx_carrier),
49 STMMAC_STAT(tx_losscarrier),
50 STMMAC_STAT(tx_heartbeat),
51 STMMAC_STAT(tx_deferred),
52 STMMAC_STAT(tx_vlan),
53 STMMAC_STAT(rx_vlan),
54 STMMAC_STAT(tx_jabber),
55 STMMAC_STAT(tx_frame_flushed),
56 STMMAC_STAT(tx_payload_error),
57 STMMAC_STAT(tx_ip_header_error),
58 STMMAC_STAT(rx_desc),
59 STMMAC_STAT(rx_partial),
60 STMMAC_STAT(rx_runt),
61 STMMAC_STAT(rx_toolong),
62 STMMAC_STAT(rx_collision),
63 STMMAC_STAT(rx_crc),
64 STMMAC_STAT(rx_lenght),
65 STMMAC_STAT(rx_mii),
66 STMMAC_STAT(rx_multicast),
67 STMMAC_STAT(rx_gmac_overflow),
68 STMMAC_STAT(rx_watchdog),
69 STMMAC_STAT(da_rx_filter_fail),
70 STMMAC_STAT(sa_rx_filter_fail),
71 STMMAC_STAT(rx_missed_cntr),
72 STMMAC_STAT(rx_overflow_cntr),
73 STMMAC_STAT(tx_undeflow_irq),
74 STMMAC_STAT(tx_process_stopped_irq),
75 STMMAC_STAT(tx_jabber_irq),
76 STMMAC_STAT(rx_overflow_irq),
77 STMMAC_STAT(rx_buf_unav_irq),
78 STMMAC_STAT(rx_process_stopped_irq),
79 STMMAC_STAT(rx_watchdog_irq),
80 STMMAC_STAT(tx_early_irq),
81 STMMAC_STAT(fatal_bus_error_irq),
82 STMMAC_STAT(threshold),
83 STMMAC_STAT(tx_pkt_n),
84 STMMAC_STAT(rx_pkt_n),
85 STMMAC_STAT(poll_n),
86 STMMAC_STAT(sched_timer_n),
87 STMMAC_STAT(normal_irq_n),
88};
89#define STMMAC_STATS_LEN ARRAY_SIZE(stmmac_gstrings_stats)
90
91void stmmac_ethtool_getdrvinfo(struct net_device *dev,
92 struct ethtool_drvinfo *info)
93{
94 struct stmmac_priv *priv = netdev_priv(dev);
95
96 if (!priv->is_gmac)
97 strcpy(info->driver, MAC100_ETHTOOL_NAME);
98 else
99 strcpy(info->driver, GMAC_ETHTOOL_NAME);
100
101 strcpy(info->version, DRV_MODULE_VERSION);
102 info->fw_version[0] = '\0';
103 info->n_stats = STMMAC_STATS_LEN;
104 return;
105}
106
107int stmmac_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
108{
109 struct stmmac_priv *priv = netdev_priv(dev);
110 struct phy_device *phy = priv->phydev;
111 int rc;
112 if (phy == NULL) {
113 pr_err("%s: %s: PHY is not registered\n",
114 __func__, dev->name);
115 return -ENODEV;
116 }
117 if (!netif_running(dev)) {
118 pr_err("%s: interface is disabled: we cannot track "
119 "link speed / duplex setting\n", dev->name);
120 return -EBUSY;
121 }
122 cmd->transceiver = XCVR_INTERNAL;
123 spin_lock_irq(&priv->lock);
124 rc = phy_ethtool_gset(phy, cmd);
125 spin_unlock_irq(&priv->lock);
126 return rc;
127}
128
129int stmmac_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
130{
131 struct stmmac_priv *priv = netdev_priv(dev);
132 struct phy_device *phy = priv->phydev;
133 int rc;
134
135 spin_lock(&priv->lock);
136 rc = phy_ethtool_sset(phy, cmd);
137 spin_unlock(&priv->lock);
138
139 return rc;
140}
141
142u32 stmmac_ethtool_getmsglevel(struct net_device *dev)
143{
144 struct stmmac_priv *priv = netdev_priv(dev);
145 return priv->msg_enable;
146}
147
148void stmmac_ethtool_setmsglevel(struct net_device *dev, u32 level)
149{
150 struct stmmac_priv *priv = netdev_priv(dev);
151 priv->msg_enable = level;
152
153}
154
155int stmmac_check_if_running(struct net_device *dev)
156{
157 if (!netif_running(dev))
158 return -EBUSY;
159 return 0;
160}
161
162int stmmac_ethtool_get_regs_len(struct net_device *dev)
163{
164 return REG_SPACE_SIZE;
165}
166
167void stmmac_ethtool_gregs(struct net_device *dev,
168 struct ethtool_regs *regs, void *space)
169{
170 int i;
171 u32 *reg_space = (u32 *) space;
172
173 struct stmmac_priv *priv = netdev_priv(dev);
174
175 memset(reg_space, 0x0, REG_SPACE_SIZE);
176
177 if (!priv->is_gmac) {
178 /* MAC registers */
179 for (i = 0; i < 12; i++)
180 reg_space[i] = readl(dev->base_addr + (i * 4));
181 /* DMA registers */
182 for (i = 0; i < 9; i++)
183 reg_space[i + 12] =
184 readl(dev->base_addr + (DMA_BUS_MODE + (i * 4)));
185 reg_space[22] = readl(dev->base_addr + DMA_CUR_TX_BUF_ADDR);
186 reg_space[23] = readl(dev->base_addr + DMA_CUR_RX_BUF_ADDR);
187 } else {
188 /* MAC registers */
189 for (i = 0; i < 55; i++)
190 reg_space[i] = readl(dev->base_addr + (i * 4));
191 /* DMA registers */
192 for (i = 0; i < 22; i++)
193 reg_space[i + 55] =
194 readl(dev->base_addr + (DMA_BUS_MODE + (i * 4)));
195 }
196
197 return;
198}
199
200int stmmac_ethtool_set_tx_csum(struct net_device *netdev, u32 data)
201{
202 if (data)
203 netdev->features |= NETIF_F_HW_CSUM;
204 else
205 netdev->features &= ~NETIF_F_HW_CSUM;
206
207 return 0;
208}
209
210u32 stmmac_ethtool_get_rx_csum(struct net_device *dev)
211{
212 struct stmmac_priv *priv = netdev_priv(dev);
213
214 return priv->rx_csum;
215}
216
217static void
218stmmac_get_pauseparam(struct net_device *netdev,
219 struct ethtool_pauseparam *pause)
220{
221 struct stmmac_priv *priv = netdev_priv(netdev);
222
223 spin_lock(&priv->lock);
224
225 pause->rx_pause = 0;
226 pause->tx_pause = 0;
227 pause->autoneg = priv->phydev->autoneg;
228
229 if (priv->flow_ctrl & FLOW_RX)
230 pause->rx_pause = 1;
231 if (priv->flow_ctrl & FLOW_TX)
232 pause->tx_pause = 1;
233
234 spin_unlock(&priv->lock);
235 return;
236}
237
238static int
239stmmac_set_pauseparam(struct net_device *netdev,
240 struct ethtool_pauseparam *pause)
241{
242 struct stmmac_priv *priv = netdev_priv(netdev);
243 struct phy_device *phy = priv->phydev;
244 int new_pause = FLOW_OFF;
245 int ret = 0;
246
247 spin_lock(&priv->lock);
248
249 if (pause->rx_pause)
250 new_pause |= FLOW_RX;
251 if (pause->tx_pause)
252 new_pause |= FLOW_TX;
253
254 priv->flow_ctrl = new_pause;
255
256 if (phy->autoneg) {
257 if (netif_running(netdev)) {
258 struct ethtool_cmd cmd;
259 /* auto-negotiation automatically restarted */
260 cmd.cmd = ETHTOOL_NWAY_RST;
261 cmd.supported = phy->supported;
262 cmd.advertising = phy->advertising;
263 cmd.autoneg = phy->autoneg;
264 cmd.speed = phy->speed;
265 cmd.duplex = phy->duplex;
266 cmd.phy_address = phy->addr;
267 ret = phy_ethtool_sset(phy, &cmd);
268 }
269 } else {
270 unsigned long ioaddr = netdev->base_addr;
271 priv->mac_type->ops->flow_ctrl(ioaddr, phy->duplex,
272 priv->flow_ctrl, priv->pause);
273 }
274 spin_unlock(&priv->lock);
275 return ret;
276}
277
278static void stmmac_get_ethtool_stats(struct net_device *dev,
279 struct ethtool_stats *dummy, u64 *data)
280{
281 struct stmmac_priv *priv = netdev_priv(dev);
282 unsigned long ioaddr = dev->base_addr;
283 int i;
284
285 /* Update HW stats if supported */
286 priv->mac_type->ops->dma_diagnostic_fr(&dev->stats, &priv->xstats,
287 ioaddr);
288
289 for (i = 0; i < STMMAC_STATS_LEN; i++) {
290 char *p = (char *)priv + stmmac_gstrings_stats[i].stat_offset;
291 data[i] = (stmmac_gstrings_stats[i].sizeof_stat ==
292 sizeof(u64)) ? (*(u64 *)p) : (*(u32 *)p);
293 }
294
295 return;
296}
297
298static int stmmac_get_sset_count(struct net_device *netdev, int sset)
299{
300 switch (sset) {
301 case ETH_SS_STATS:
302 return STMMAC_STATS_LEN;
303 default:
304 return -EOPNOTSUPP;
305 }
306}
307
308static void stmmac_get_strings(struct net_device *dev, u32 stringset, u8 *data)
309{
310 int i;
311 u8 *p = data;
312
313 switch (stringset) {
314 case ETH_SS_STATS:
315 for (i = 0; i < STMMAC_STATS_LEN; i++) {
316 memcpy(p, stmmac_gstrings_stats[i].stat_string,
317 ETH_GSTRING_LEN);
318 p += ETH_GSTRING_LEN;
319 }
320 break;
321 default:
322 WARN_ON(1);
323 break;
324 }
325 return;
326}
327
328/* Currently only support WOL through Magic packet. */
329static void stmmac_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
330{
331 struct stmmac_priv *priv = netdev_priv(dev);
332
333 spin_lock_irq(&priv->lock);
334 if (priv->wolenabled == PMT_SUPPORTED) {
335 wol->supported = WAKE_MAGIC;
336 wol->wolopts = priv->wolopts;
337 }
338 spin_unlock_irq(&priv->lock);
339}
340
341static int stmmac_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
342{
343 struct stmmac_priv *priv = netdev_priv(dev);
344 u32 support = WAKE_MAGIC;
345
346 if (priv->wolenabled == PMT_NOT_SUPPORTED)
347 return -EINVAL;
348
349 if (wol->wolopts & ~support)
350 return -EINVAL;
351
352 if (wol->wolopts == 0)
353 device_set_wakeup_enable(priv->device, 0);
354 else
355 device_set_wakeup_enable(priv->device, 1);
356
357 spin_lock_irq(&priv->lock);
358 priv->wolopts = wol->wolopts;
359 spin_unlock_irq(&priv->lock);
360
361 return 0;
362}
363
364static struct ethtool_ops stmmac_ethtool_ops = {
365 .begin = stmmac_check_if_running,
366 .get_drvinfo = stmmac_ethtool_getdrvinfo,
367 .get_settings = stmmac_ethtool_getsettings,
368 .set_settings = stmmac_ethtool_setsettings,
369 .get_msglevel = stmmac_ethtool_getmsglevel,
370 .set_msglevel = stmmac_ethtool_setmsglevel,
371 .get_regs = stmmac_ethtool_gregs,
372 .get_regs_len = stmmac_ethtool_get_regs_len,
373 .get_link = ethtool_op_get_link,
374 .get_rx_csum = stmmac_ethtool_get_rx_csum,
375 .get_tx_csum = ethtool_op_get_tx_csum,
376 .set_tx_csum = stmmac_ethtool_set_tx_csum,
377 .get_sg = ethtool_op_get_sg,
378 .set_sg = ethtool_op_set_sg,
379 .get_pauseparam = stmmac_get_pauseparam,
380 .set_pauseparam = stmmac_set_pauseparam,
381 .get_ethtool_stats = stmmac_get_ethtool_stats,
382 .get_strings = stmmac_get_strings,
383 .get_wol = stmmac_get_wol,
384 .set_wol = stmmac_set_wol,
385 .get_sset_count = stmmac_get_sset_count,
386#ifdef NETIF_F_TSO
387 .get_tso = ethtool_op_get_tso,
388 .set_tso = ethtool_op_set_tso,
389#endif
390};
391
392void stmmac_set_ethtool_ops(struct net_device *netdev)
393{
394 SET_ETHTOOL_OPS(netdev, &stmmac_ethtool_ops);
395}
diff --git a/drivers/net/stmmac/stmmac_main.c b/drivers/net/stmmac/stmmac_main.c
new file mode 100644
index 000000000000..c2f14dc9ba28
--- /dev/null
+++ b/drivers/net/stmmac/stmmac_main.c
@@ -0,0 +1,2204 @@
1/*******************************************************************************
2 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
3 ST Ethernet IPs are built around a Synopsys IP Core.
4
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
6
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
10
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
22
23 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
24
25 Documentation available at:
26 http://www.stlinux.com
27 Support available at:
28 https://bugzilla.stlinux.com/
29*******************************************************************************/
30
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/kernel.h>
34#include <linux/interrupt.h>
35#include <linux/netdevice.h>
36#include <linux/etherdevice.h>
37#include <linux/platform_device.h>
38#include <linux/ip.h>
39#include <linux/tcp.h>
40#include <linux/skbuff.h>
41#include <linux/ethtool.h>
42#include <linux/if_ether.h>
43#include <linux/crc32.h>
44#include <linux/mii.h>
45#include <linux/phy.h>
46#include <linux/if_vlan.h>
47#include <linux/dma-mapping.h>
48#include <linux/stm/soc.h>
49#include "stmmac.h"
50
51#define STMMAC_RESOURCE_NAME "stmmaceth"
52#define PHY_RESOURCE_NAME "stmmacphy"
53
54#undef STMMAC_DEBUG
55/*#define STMMAC_DEBUG*/
56#ifdef STMMAC_DEBUG
57#define DBG(nlevel, klevel, fmt, args...) \
58 ((void)(netif_msg_##nlevel(priv) && \
59 printk(KERN_##klevel fmt, ## args)))
60#else
61#define DBG(nlevel, klevel, fmt, args...) do { } while (0)
62#endif
63
64#undef STMMAC_RX_DEBUG
65/*#define STMMAC_RX_DEBUG*/
66#ifdef STMMAC_RX_DEBUG
67#define RX_DBG(fmt, args...) printk(fmt, ## args)
68#else
69#define RX_DBG(fmt, args...) do { } while (0)
70#endif
71
72#undef STMMAC_XMIT_DEBUG
73/*#define STMMAC_XMIT_DEBUG*/
74#ifdef STMMAC_TX_DEBUG
75#define TX_DBG(fmt, args...) printk(fmt, ## args)
76#else
77#define TX_DBG(fmt, args...) do { } while (0)
78#endif
79
80#define STMMAC_ALIGN(x) L1_CACHE_ALIGN(x)
81#define JUMBO_LEN 9000
82
83/* Module parameters */
84#define TX_TIMEO 5000 /* default 5 seconds */
85static int watchdog = TX_TIMEO;
86module_param(watchdog, int, S_IRUGO | S_IWUSR);
87MODULE_PARM_DESC(watchdog, "Transmit timeout in milliseconds");
88
89static int debug = -1; /* -1: default, 0: no output, 16: all */
90module_param(debug, int, S_IRUGO | S_IWUSR);
91MODULE_PARM_DESC(debug, "Message Level (0: no output, 16: all)");
92
93static int phyaddr = -1;
94module_param(phyaddr, int, S_IRUGO);
95MODULE_PARM_DESC(phyaddr, "Physical device address");
96
97#define DMA_TX_SIZE 256
98static int dma_txsize = DMA_TX_SIZE;
99module_param(dma_txsize, int, S_IRUGO | S_IWUSR);
100MODULE_PARM_DESC(dma_txsize, "Number of descriptors in the TX list");
101
102#define DMA_RX_SIZE 256
103static int dma_rxsize = DMA_RX_SIZE;
104module_param(dma_rxsize, int, S_IRUGO | S_IWUSR);
105MODULE_PARM_DESC(dma_rxsize, "Number of descriptors in the RX list");
106
107static int flow_ctrl = FLOW_OFF;
108module_param(flow_ctrl, int, S_IRUGO | S_IWUSR);
109MODULE_PARM_DESC(flow_ctrl, "Flow control ability [on/off]");
110
111static int pause = PAUSE_TIME;
112module_param(pause, int, S_IRUGO | S_IWUSR);
113MODULE_PARM_DESC(pause, "Flow Control Pause Time");
114
115#define TC_DEFAULT 64
116static int tc = TC_DEFAULT;
117module_param(tc, int, S_IRUGO | S_IWUSR);
118MODULE_PARM_DESC(tc, "DMA threshold control value");
119
120#define RX_NO_COALESCE 1 /* Always interrupt on completion */
121#define TX_NO_COALESCE -1 /* No moderation by default */
122
123/* Pay attention to tune this parameter; take care of both
124 * hardware capability and network stabitily/performance impact.
125 * Many tests showed that ~4ms latency seems to be good enough. */
126#ifdef CONFIG_STMMAC_TIMER
127#define DEFAULT_PERIODIC_RATE 256
128static int tmrate = DEFAULT_PERIODIC_RATE;
129module_param(tmrate, int, S_IRUGO | S_IWUSR);
130MODULE_PARM_DESC(tmrate, "External timer freq. (default: 256Hz)");
131#endif
132
133#define DMA_BUFFER_SIZE BUF_SIZE_2KiB
134static int buf_sz = DMA_BUFFER_SIZE;
135module_param(buf_sz, int, S_IRUGO | S_IWUSR);
136MODULE_PARM_DESC(buf_sz, "DMA buffer size");
137
138/* In case of Giga ETH, we can enable/disable the COE for the
139 * transmit HW checksum computation.
140 * Note that, if tx csum is off in HW, SG will be still supported. */
141static int tx_coe = HW_CSUM;
142module_param(tx_coe, int, S_IRUGO | S_IWUSR);
143MODULE_PARM_DESC(tx_coe, "GMAC COE type 2 [on/off]");
144
145static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
146 NETIF_MSG_LINK | NETIF_MSG_IFUP |
147 NETIF_MSG_IFDOWN | NETIF_MSG_TIMER);
148
149static irqreturn_t stmmac_interrupt(int irq, void *dev_id);
150static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev);
151
152/**
153 * stmmac_verify_args - verify the driver parameters.
154 * Description: it verifies if some wrong parameter is passed to the driver.
155 * Note that wrong parameters are replaced with the default values.
156 */
157static void stmmac_verify_args(void)
158{
159 if (unlikely(watchdog < 0))
160 watchdog = TX_TIMEO;
161 if (unlikely(dma_rxsize < 0))
162 dma_rxsize = DMA_RX_SIZE;
163 if (unlikely(dma_txsize < 0))
164 dma_txsize = DMA_TX_SIZE;
165 if (unlikely((buf_sz < DMA_BUFFER_SIZE) || (buf_sz > BUF_SIZE_16KiB)))
166 buf_sz = DMA_BUFFER_SIZE;
167 if (unlikely(flow_ctrl > 1))
168 flow_ctrl = FLOW_AUTO;
169 else if (likely(flow_ctrl < 0))
170 flow_ctrl = FLOW_OFF;
171 if (unlikely((pause < 0) || (pause > 0xffff)))
172 pause = PAUSE_TIME;
173
174 return;
175}
176
177#if defined(STMMAC_XMIT_DEBUG) || defined(STMMAC_RX_DEBUG)
178static void print_pkt(unsigned char *buf, int len)
179{
180 int j;
181 pr_info("len = %d byte, buf addr: 0x%p", len, buf);
182 for (j = 0; j < len; j++) {
183 if ((j % 16) == 0)
184 pr_info("\n %03x:", j);
185 pr_info(" %02x", buf[j]);
186 }
187 pr_info("\n");
188 return;
189}
190#endif
191
192/* minimum number of free TX descriptors required to wake up TX process */
193#define STMMAC_TX_THRESH(x) (x->dma_tx_size/4)
194
195static inline u32 stmmac_tx_avail(struct stmmac_priv *priv)
196{
197 return priv->dirty_tx + priv->dma_tx_size - priv->cur_tx - 1;
198}
199
200/**
201 * stmmac_adjust_link
202 * @dev: net device structure
203 * Description: it adjusts the link parameters.
204 */
205static void stmmac_adjust_link(struct net_device *dev)
206{
207 struct stmmac_priv *priv = netdev_priv(dev);
208 struct phy_device *phydev = priv->phydev;
209 unsigned long ioaddr = dev->base_addr;
210 unsigned long flags;
211 int new_state = 0;
212 unsigned int fc = priv->flow_ctrl, pause_time = priv->pause;
213
214 if (phydev == NULL)
215 return;
216
217 DBG(probe, DEBUG, "stmmac_adjust_link: called. address %d link %d\n",
218 phydev->addr, phydev->link);
219
220 spin_lock_irqsave(&priv->lock, flags);
221 if (phydev->link) {
222 u32 ctrl = readl(ioaddr + MAC_CTRL_REG);
223
224 /* Now we make sure that we can be in full duplex mode.
225 * If not, we operate in half-duplex mode. */
226 if (phydev->duplex != priv->oldduplex) {
227 new_state = 1;
228 if (!(phydev->duplex))
229 ctrl &= ~priv->mac_type->hw.link.duplex;
230 else
231 ctrl |= priv->mac_type->hw.link.duplex;
232 priv->oldduplex = phydev->duplex;
233 }
234 /* Flow Control operation */
235 if (phydev->pause)
236 priv->mac_type->ops->flow_ctrl(ioaddr, phydev->duplex,
237 fc, pause_time);
238
239 if (phydev->speed != priv->speed) {
240 new_state = 1;
241 switch (phydev->speed) {
242 case 1000:
243 if (likely(priv->is_gmac))
244 ctrl &= ~priv->mac_type->hw.link.port;
245 break;
246 case 100:
247 case 10:
248 if (priv->is_gmac) {
249 ctrl |= priv->mac_type->hw.link.port;
250 if (phydev->speed == SPEED_100) {
251 ctrl |=
252 priv->mac_type->hw.link.
253 speed;
254 } else {
255 ctrl &=
256 ~(priv->mac_type->hw.
257 link.speed);
258 }
259 } else {
260 ctrl &= ~priv->mac_type->hw.link.port;
261 }
262 priv->fix_mac_speed(priv->bsp_priv,
263 phydev->speed);
264 break;
265 default:
266 if (netif_msg_link(priv))
267 pr_warning("%s: Speed (%d) is not 10"
268 " or 100!\n", dev->name, phydev->speed);
269 break;
270 }
271
272 priv->speed = phydev->speed;
273 }
274
275 writel(ctrl, ioaddr + MAC_CTRL_REG);
276
277 if (!priv->oldlink) {
278 new_state = 1;
279 priv->oldlink = 1;
280 }
281 } else if (priv->oldlink) {
282 new_state = 1;
283 priv->oldlink = 0;
284 priv->speed = 0;
285 priv->oldduplex = -1;
286 }
287
288 if (new_state && netif_msg_link(priv))
289 phy_print_status(phydev);
290
291 spin_unlock_irqrestore(&priv->lock, flags);
292
293 DBG(probe, DEBUG, "stmmac_adjust_link: exiting\n");
294}
295
296/**
297 * stmmac_init_phy - PHY initialization
298 * @dev: net device structure
299 * Description: it initializes the driver's PHY state, and attaches the PHY
300 * to the mac driver.
301 * Return value:
302 * 0 on success
303 */
304static int stmmac_init_phy(struct net_device *dev)
305{
306 struct stmmac_priv *priv = netdev_priv(dev);
307 struct phy_device *phydev;
308 char phy_id[BUS_ID_SIZE]; /* PHY to connect */
309 char bus_id[BUS_ID_SIZE];
310
311 priv->oldlink = 0;
312 priv->speed = 0;
313 priv->oldduplex = -1;
314
315 if (priv->phy_addr == -1) {
316 /* We don't have a PHY, so do nothing */
317 return 0;
318 }
319
320 snprintf(bus_id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
321 snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT, bus_id, priv->phy_addr);
322 pr_debug("stmmac_init_phy: trying to attach to %s\n", phy_id);
323
324 phydev = phy_connect(dev, phy_id, &stmmac_adjust_link, 0,
325 priv->phy_interface);
326
327 if (IS_ERR(phydev)) {
328 pr_err("%s: Could not attach to PHY\n", dev->name);
329 return PTR_ERR(phydev);
330 }
331
332 /*
333 * Broken HW is sometimes missing the pull-up resistor on the
334 * MDIO line, which results in reads to non-existent devices returning
335 * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
336 * device as well.
337 * Note: phydev->phy_id is the result of reading the UID PHY registers.
338 */
339 if (phydev->phy_id == 0) {
340 phy_disconnect(phydev);
341 return -ENODEV;
342 }
343 pr_debug("stmmac_init_phy: %s: attached to PHY (UID 0x%x)"
344 " Link = %d\n", dev->name, phydev->phy_id, phydev->link);
345
346 priv->phydev = phydev;
347
348 return 0;
349}
350
351static inline void stmmac_mac_enable_rx(unsigned long ioaddr)
352{
353 u32 value = readl(ioaddr + MAC_CTRL_REG);
354 value |= MAC_RNABLE_RX;
355 /* Set the RE (receive enable bit into the MAC CTRL register). */
356 writel(value, ioaddr + MAC_CTRL_REG);
357}
358
359static inline void stmmac_mac_enable_tx(unsigned long ioaddr)
360{
361 u32 value = readl(ioaddr + MAC_CTRL_REG);
362 value |= MAC_ENABLE_TX;
363 /* Set the TE (transmit enable bit into the MAC CTRL register). */
364 writel(value, ioaddr + MAC_CTRL_REG);
365}
366
367static inline void stmmac_mac_disable_rx(unsigned long ioaddr)
368{
369 u32 value = readl(ioaddr + MAC_CTRL_REG);
370 value &= ~MAC_RNABLE_RX;
371 writel(value, ioaddr + MAC_CTRL_REG);
372}
373
374static inline void stmmac_mac_disable_tx(unsigned long ioaddr)
375{
376 u32 value = readl(ioaddr + MAC_CTRL_REG);
377 value &= ~MAC_ENABLE_TX;
378 writel(value, ioaddr + MAC_CTRL_REG);
379}
380
381/**
382 * display_ring
383 * @p: pointer to the ring.
384 * @size: size of the ring.
385 * Description: display all the descriptors within the ring.
386 */
387static void display_ring(struct dma_desc *p, int size)
388{
389 struct tmp_s {
390 u64 a;
391 unsigned int b;
392 unsigned int c;
393 };
394 int i;
395 for (i = 0; i < size; i++) {
396 struct tmp_s *x = (struct tmp_s *)(p + i);
397 pr_info("\t%d [0x%x]: DES0=0x%x DES1=0x%x BUF1=0x%x BUF2=0x%x",
398 i, (unsigned int)virt_to_phys(&p[i]),
399 (unsigned int)(x->a), (unsigned int)((x->a) >> 32),
400 x->b, x->c);
401 pr_info("\n");
402 }
403}
404
405/**
406 * init_dma_desc_rings - init the RX/TX descriptor rings
407 * @dev: net device structure
408 * Description: this function initializes the DMA RX/TX descriptors
409 * and allocates the socket buffers.
410 */
411static void init_dma_desc_rings(struct net_device *dev)
412{
413 int i;
414 struct stmmac_priv *priv = netdev_priv(dev);
415 struct sk_buff *skb;
416 unsigned int txsize = priv->dma_tx_size;
417 unsigned int rxsize = priv->dma_rx_size;
418 unsigned int bfsize = priv->dma_buf_sz;
419 int buff2_needed = 0;
420 int dis_ic = 0;
421
422#ifdef CONFIG_STMMAC_TIMER
423 /* Using Timers disable interrupts on completion for the reception */
424 dis_ic = 1;
425#endif
426 /* Set the Buffer size according to the MTU;
427 * indeed, in case of jumbo we need to bump-up the buffer sizes.
428 */
429 if (unlikely(dev->mtu >= BUF_SIZE_8KiB))
430 bfsize = BUF_SIZE_16KiB;
431 else if (unlikely(dev->mtu >= BUF_SIZE_4KiB))
432 bfsize = BUF_SIZE_8KiB;
433 else if (unlikely(dev->mtu >= BUF_SIZE_2KiB))
434 bfsize = BUF_SIZE_4KiB;
435 else if (unlikely(dev->mtu >= DMA_BUFFER_SIZE))
436 bfsize = BUF_SIZE_2KiB;
437 else
438 bfsize = DMA_BUFFER_SIZE;
439
440 /* If the MTU exceeds 8k so use the second buffer in the chain */
441 if (bfsize >= BUF_SIZE_8KiB)
442 buff2_needed = 1;
443
444 DBG(probe, INFO, "stmmac: txsize %d, rxsize %d, bfsize %d\n",
445 txsize, rxsize, bfsize);
446
447 priv->rx_skbuff_dma = kmalloc(rxsize * sizeof(dma_addr_t), GFP_KERNEL);
448 priv->rx_skbuff =
449 kmalloc(sizeof(struct sk_buff *) * rxsize, GFP_KERNEL);
450 priv->dma_rx =
451 (struct dma_desc *)dma_alloc_coherent(priv->device,
452 rxsize *
453 sizeof(struct dma_desc),
454 &priv->dma_rx_phy,
455 GFP_KERNEL);
456 priv->tx_skbuff = kmalloc(sizeof(struct sk_buff *) * txsize,
457 GFP_KERNEL);
458 priv->dma_tx =
459 (struct dma_desc *)dma_alloc_coherent(priv->device,
460 txsize *
461 sizeof(struct dma_desc),
462 &priv->dma_tx_phy,
463 GFP_KERNEL);
464
465 if ((priv->dma_rx == NULL) || (priv->dma_tx == NULL)) {
466 pr_err("%s:ERROR allocating the DMA Tx/Rx desc\n", __func__);
467 return;
468 }
469
470 DBG(probe, INFO, "stmmac (%s) DMA desc rings: virt addr (Rx %p, "
471 "Tx %p)\n\tDMA phy addr (Rx 0x%08x, Tx 0x%08x)\n",
472 dev->name, priv->dma_rx, priv->dma_tx,
473 (unsigned int)priv->dma_rx_phy, (unsigned int)priv->dma_tx_phy);
474
475 /* RX INITIALIZATION */
476 DBG(probe, INFO, "stmmac: SKB addresses:\n"
477 "skb\t\tskb data\tdma data\n");
478
479 for (i = 0; i < rxsize; i++) {
480 struct dma_desc *p = priv->dma_rx + i;
481
482 skb = netdev_alloc_skb_ip_align(dev, bfsize);
483 if (unlikely(skb == NULL)) {
484 pr_err("%s: Rx init fails; skb is NULL\n", __func__);
485 break;
486 }
487 priv->rx_skbuff[i] = skb;
488 priv->rx_skbuff_dma[i] = dma_map_single(priv->device, skb->data,
489 bfsize, DMA_FROM_DEVICE);
490
491 p->des2 = priv->rx_skbuff_dma[i];
492 if (unlikely(buff2_needed))
493 p->des3 = p->des2 + BUF_SIZE_8KiB;
494 DBG(probe, INFO, "[%p]\t[%p]\t[%x]\n", priv->rx_skbuff[i],
495 priv->rx_skbuff[i]->data, priv->rx_skbuff_dma[i]);
496 }
497 priv->cur_rx = 0;
498 priv->dirty_rx = (unsigned int)(i - rxsize);
499 priv->dma_buf_sz = bfsize;
500 buf_sz = bfsize;
501
502 /* TX INITIALIZATION */
503 for (i = 0; i < txsize; i++) {
504 priv->tx_skbuff[i] = NULL;
505 priv->dma_tx[i].des2 = 0;
506 }
507 priv->dirty_tx = 0;
508 priv->cur_tx = 0;
509
510 /* Clear the Rx/Tx descriptors */
511 priv->mac_type->ops->init_rx_desc(priv->dma_rx, rxsize, dis_ic);
512 priv->mac_type->ops->init_tx_desc(priv->dma_tx, txsize);
513
514 if (netif_msg_hw(priv)) {
515 pr_info("RX descriptor ring:\n");
516 display_ring(priv->dma_rx, rxsize);
517 pr_info("TX descriptor ring:\n");
518 display_ring(priv->dma_tx, txsize);
519 }
520 return;
521}
522
523static void dma_free_rx_skbufs(struct stmmac_priv *priv)
524{
525 int i;
526
527 for (i = 0; i < priv->dma_rx_size; i++) {
528 if (priv->rx_skbuff[i]) {
529 dma_unmap_single(priv->device, priv->rx_skbuff_dma[i],
530 priv->dma_buf_sz, DMA_FROM_DEVICE);
531 dev_kfree_skb_any(priv->rx_skbuff[i]);
532 }
533 priv->rx_skbuff[i] = NULL;
534 }
535 return;
536}
537
538static void dma_free_tx_skbufs(struct stmmac_priv *priv)
539{
540 int i;
541
542 for (i = 0; i < priv->dma_tx_size; i++) {
543 if (priv->tx_skbuff[i] != NULL) {
544 struct dma_desc *p = priv->dma_tx + i;
545 if (p->des2)
546 dma_unmap_single(priv->device, p->des2,
547 priv->mac_type->ops->get_tx_len(p),
548 DMA_TO_DEVICE);
549 dev_kfree_skb_any(priv->tx_skbuff[i]);
550 priv->tx_skbuff[i] = NULL;
551 }
552 }
553 return;
554}
555
556static void free_dma_desc_resources(struct stmmac_priv *priv)
557{
558 /* Release the DMA TX/RX socket buffers */
559 dma_free_rx_skbufs(priv);
560 dma_free_tx_skbufs(priv);
561
562 /* Free the region of consistent memory previously allocated for
563 * the DMA */
564 dma_free_coherent(priv->device,
565 priv->dma_tx_size * sizeof(struct dma_desc),
566 priv->dma_tx, priv->dma_tx_phy);
567 dma_free_coherent(priv->device,
568 priv->dma_rx_size * sizeof(struct dma_desc),
569 priv->dma_rx, priv->dma_rx_phy);
570 kfree(priv->rx_skbuff_dma);
571 kfree(priv->rx_skbuff);
572 kfree(priv->tx_skbuff);
573
574 return;
575}
576
577/**
578 * stmmac_dma_start_tx
579 * @ioaddr: device I/O address
580 * Description: this function starts the DMA tx process.
581 */
582static void stmmac_dma_start_tx(unsigned long ioaddr)
583{
584 u32 value = readl(ioaddr + DMA_CONTROL);
585 value |= DMA_CONTROL_ST;
586 writel(value, ioaddr + DMA_CONTROL);
587 return;
588}
589
590static void stmmac_dma_stop_tx(unsigned long ioaddr)
591{
592 u32 value = readl(ioaddr + DMA_CONTROL);
593 value &= ~DMA_CONTROL_ST;
594 writel(value, ioaddr + DMA_CONTROL);
595 return;
596}
597
598/**
599 * stmmac_dma_start_rx
600 * @ioaddr: device I/O address
601 * Description: this function starts the DMA rx process.
602 */
603static void stmmac_dma_start_rx(unsigned long ioaddr)
604{
605 u32 value = readl(ioaddr + DMA_CONTROL);
606 value |= DMA_CONTROL_SR;
607 writel(value, ioaddr + DMA_CONTROL);
608
609 return;
610}
611
612static void stmmac_dma_stop_rx(unsigned long ioaddr)
613{
614 u32 value = readl(ioaddr + DMA_CONTROL);
615 value &= ~DMA_CONTROL_SR;
616 writel(value, ioaddr + DMA_CONTROL);
617
618 return;
619}
620
621/**
622 * stmmac_dma_operation_mode - HW DMA operation mode
623 * @priv : pointer to the private device structure.
624 * Description: it sets the DMA operation mode: tx/rx DMA thresholds
625 * or Store-And-Forward capability. It also verifies the COE for the
626 * transmission in case of Giga ETH.
627 */
628static void stmmac_dma_operation_mode(struct stmmac_priv *priv)
629{
630 if (!priv->is_gmac) {
631 /* MAC 10/100 */
632 priv->mac_type->ops->dma_mode(priv->dev->base_addr, tc, 0);
633 priv->tx_coe = NO_HW_CSUM;
634 } else {
635 if ((priv->dev->mtu <= ETH_DATA_LEN) && (tx_coe)) {
636 priv->mac_type->ops->dma_mode(priv->dev->base_addr,
637 SF_DMA_MODE, SF_DMA_MODE);
638 tc = SF_DMA_MODE;
639 priv->tx_coe = HW_CSUM;
640 } else {
641 /* Checksum computation is performed in software. */
642 priv->mac_type->ops->dma_mode(priv->dev->base_addr, tc,
643 SF_DMA_MODE);
644 priv->tx_coe = NO_HW_CSUM;
645 }
646 }
647 tx_coe = priv->tx_coe;
648
649 return;
650}
651
652#ifdef STMMAC_DEBUG
653/**
654 * show_tx_process_state
655 * @status: tx descriptor status field
656 * Description: it shows the Transmit Process State for CSR5[22:20]
657 */
658static void show_tx_process_state(unsigned int status)
659{
660 unsigned int state;
661 state = (status & DMA_STATUS_TS_MASK) >> DMA_STATUS_TS_SHIFT;
662
663 switch (state) {
664 case 0:
665 pr_info("- TX (Stopped): Reset or Stop command\n");
666 break;
667 case 1:
668 pr_info("- TX (Running):Fetching the Tx desc\n");
669 break;
670 case 2:
671 pr_info("- TX (Running): Waiting for end of tx\n");
672 break;
673 case 3:
674 pr_info("- TX (Running): Reading the data "
675 "and queuing the data into the Tx buf\n");
676 break;
677 case 6:
678 pr_info("- TX (Suspended): Tx Buff Underflow "
679 "or an unavailable Transmit descriptor\n");
680 break;
681 case 7:
682 pr_info("- TX (Running): Closing Tx descriptor\n");
683 break;
684 default:
685 break;
686 }
687 return;
688}
689
690/**
691 * show_rx_process_state
692 * @status: rx descriptor status field
693 * Description: it shows the Receive Process State for CSR5[19:17]
694 */
695static void show_rx_process_state(unsigned int status)
696{
697 unsigned int state;
698 state = (status & DMA_STATUS_RS_MASK) >> DMA_STATUS_RS_SHIFT;
699
700 switch (state) {
701 case 0:
702 pr_info("- RX (Stopped): Reset or Stop command\n");
703 break;
704 case 1:
705 pr_info("- RX (Running): Fetching the Rx desc\n");
706 break;
707 case 2:
708 pr_info("- RX (Running):Checking for end of pkt\n");
709 break;
710 case 3:
711 pr_info("- RX (Running): Waiting for Rx pkt\n");
712 break;
713 case 4:
714 pr_info("- RX (Suspended): Unavailable Rx buf\n");
715 break;
716 case 5:
717 pr_info("- RX (Running): Closing Rx descriptor\n");
718 break;
719 case 6:
720 pr_info("- RX(Running): Flushing the current frame"
721 " from the Rx buf\n");
722 break;
723 case 7:
724 pr_info("- RX (Running): Queuing the Rx frame"
725 " from the Rx buf into memory\n");
726 break;
727 default:
728 break;
729 }
730 return;
731}
732#endif
733
734/**
735 * stmmac_tx:
736 * @priv: private driver structure
737 * Description: it reclaims resources after transmission completes.
738 */
739static void stmmac_tx(struct stmmac_priv *priv)
740{
741 unsigned int txsize = priv->dma_tx_size;
742 unsigned long ioaddr = priv->dev->base_addr;
743
744 while (priv->dirty_tx != priv->cur_tx) {
745 int last;
746 unsigned int entry = priv->dirty_tx % txsize;
747 struct sk_buff *skb = priv->tx_skbuff[entry];
748 struct dma_desc *p = priv->dma_tx + entry;
749
750 /* Check if the descriptor is owned by the DMA. */
751 if (priv->mac_type->ops->get_tx_owner(p))
752 break;
753
754 /* Verify tx error by looking at the last segment */
755 last = priv->mac_type->ops->get_tx_ls(p);
756 if (likely(last)) {
757 int tx_error =
758 priv->mac_type->ops->tx_status(&priv->dev->stats,
759 &priv->xstats,
760 p, ioaddr);
761 if (likely(tx_error == 0)) {
762 priv->dev->stats.tx_packets++;
763 priv->xstats.tx_pkt_n++;
764 } else
765 priv->dev->stats.tx_errors++;
766 }
767 TX_DBG("%s: curr %d, dirty %d\n", __func__,
768 priv->cur_tx, priv->dirty_tx);
769
770 if (likely(p->des2))
771 dma_unmap_single(priv->device, p->des2,
772 priv->mac_type->ops->get_tx_len(p),
773 DMA_TO_DEVICE);
774 if (unlikely(p->des3))
775 p->des3 = 0;
776
777 if (likely(skb != NULL)) {
778 /*
779 * If there's room in the queue (limit it to size)
780 * we add this skb back into the pool,
781 * if it's the right size.
782 */
783 if ((skb_queue_len(&priv->rx_recycle) <
784 priv->dma_rx_size) &&
785 skb_recycle_check(skb, priv->dma_buf_sz))
786 __skb_queue_head(&priv->rx_recycle, skb);
787 else
788 dev_kfree_skb(skb);
789
790 priv->tx_skbuff[entry] = NULL;
791 }
792
793 priv->mac_type->ops->release_tx_desc(p);
794
795 entry = (++priv->dirty_tx) % txsize;
796 }
797 if (unlikely(netif_queue_stopped(priv->dev) &&
798 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv))) {
799 netif_tx_lock(priv->dev);
800 if (netif_queue_stopped(priv->dev) &&
801 stmmac_tx_avail(priv) > STMMAC_TX_THRESH(priv)) {
802 TX_DBG("%s: restart transmit\n", __func__);
803 netif_wake_queue(priv->dev);
804 }
805 netif_tx_unlock(priv->dev);
806 }
807 return;
808}
809
810static inline void stmmac_enable_irq(struct stmmac_priv *priv)
811{
812#ifndef CONFIG_STMMAC_TIMER
813 writel(DMA_INTR_DEFAULT_MASK, priv->dev->base_addr + DMA_INTR_ENA);
814#else
815 priv->tm->timer_start(tmrate);
816#endif
817}
818
819static inline void stmmac_disable_irq(struct stmmac_priv *priv)
820{
821#ifndef CONFIG_STMMAC_TIMER
822 writel(0, priv->dev->base_addr + DMA_INTR_ENA);
823#else
824 priv->tm->timer_stop();
825#endif
826}
827
828static int stmmac_has_work(struct stmmac_priv *priv)
829{
830 unsigned int has_work = 0;
831 int rxret, tx_work = 0;
832
833 rxret = priv->mac_type->ops->get_rx_owner(priv->dma_rx +
834 (priv->cur_rx % priv->dma_rx_size));
835
836 if (priv->dirty_tx != priv->cur_tx)
837 tx_work = 1;
838
839 if (likely(!rxret || tx_work))
840 has_work = 1;
841
842 return has_work;
843}
844
845static inline void _stmmac_schedule(struct stmmac_priv *priv)
846{
847 if (likely(stmmac_has_work(priv))) {
848 stmmac_disable_irq(priv);
849 napi_schedule(&priv->napi);
850 }
851}
852
853#ifdef CONFIG_STMMAC_TIMER
854void stmmac_schedule(struct net_device *dev)
855{
856 struct stmmac_priv *priv = netdev_priv(dev);
857
858 priv->xstats.sched_timer_n++;
859
860 _stmmac_schedule(priv);
861
862 return;
863}
864
865static void stmmac_no_timer_started(unsigned int x)
866{;
867};
868
869static void stmmac_no_timer_stopped(void)
870{;
871};
872#endif
873
874/**
875 * stmmac_tx_err:
876 * @priv: pointer to the private device structure
877 * Description: it cleans the descriptors and restarts the transmission
878 * in case of errors.
879 */
880static void stmmac_tx_err(struct stmmac_priv *priv)
881{
882 netif_stop_queue(priv->dev);
883
884 stmmac_dma_stop_tx(priv->dev->base_addr);
885 dma_free_tx_skbufs(priv);
886 priv->mac_type->ops->init_tx_desc(priv->dma_tx, priv->dma_tx_size);
887 priv->dirty_tx = 0;
888 priv->cur_tx = 0;
889 stmmac_dma_start_tx(priv->dev->base_addr);
890
891 priv->dev->stats.tx_errors++;
892 netif_wake_queue(priv->dev);
893
894 return;
895}
896
897/**
898 * stmmac_dma_interrupt - Interrupt handler for the driver
899 * @dev: net device structure
900 * Description: Interrupt handler for the driver (DMA).
901 */
902static void stmmac_dma_interrupt(struct net_device *dev)
903{
904 unsigned long ioaddr = dev->base_addr;
905 struct stmmac_priv *priv = netdev_priv(dev);
906 /* read the status register (CSR5) */
907 u32 intr_status = readl(ioaddr + DMA_STATUS);
908
909 DBG(intr, INFO, "%s: [CSR5: 0x%08x]\n", __func__, intr_status);
910
911#ifdef STMMAC_DEBUG
912 /* It displays the DMA transmit process state (CSR5 register) */
913 if (netif_msg_tx_done(priv))
914 show_tx_process_state(intr_status);
915 if (netif_msg_rx_status(priv))
916 show_rx_process_state(intr_status);
917#endif
918 /* ABNORMAL interrupts */
919 if (unlikely(intr_status & DMA_STATUS_AIS)) {
920 DBG(intr, INFO, "CSR5[15] DMA ABNORMAL IRQ: ");
921 if (unlikely(intr_status & DMA_STATUS_UNF)) {
922 DBG(intr, INFO, "transmit underflow\n");
923 if (unlikely(tc != SF_DMA_MODE)
924 && (tc <= 256)) {
925 /* Try to bump up the threshold */
926 tc += 64;
927 priv->mac_type->ops->dma_mode(ioaddr, tc,
928 SF_DMA_MODE);
929 priv->xstats.threshold = tc;
930 }
931 stmmac_tx_err(priv);
932 priv->xstats.tx_undeflow_irq++;
933 }
934 if (unlikely(intr_status & DMA_STATUS_TJT)) {
935 DBG(intr, INFO, "transmit jabber\n");
936 priv->xstats.tx_jabber_irq++;
937 }
938 if (unlikely(intr_status & DMA_STATUS_OVF)) {
939 DBG(intr, INFO, "recv overflow\n");
940 priv->xstats.rx_overflow_irq++;
941 }
942 if (unlikely(intr_status & DMA_STATUS_RU)) {
943 DBG(intr, INFO, "receive buffer unavailable\n");
944 priv->xstats.rx_buf_unav_irq++;
945 }
946 if (unlikely(intr_status & DMA_STATUS_RPS)) {
947 DBG(intr, INFO, "receive process stopped\n");
948 priv->xstats.rx_process_stopped_irq++;
949 }
950 if (unlikely(intr_status & DMA_STATUS_RWT)) {
951 DBG(intr, INFO, "receive watchdog\n");
952 priv->xstats.rx_watchdog_irq++;
953 }
954 if (unlikely(intr_status & DMA_STATUS_ETI)) {
955 DBG(intr, INFO, "transmit early interrupt\n");
956 priv->xstats.tx_early_irq++;
957 }
958 if (unlikely(intr_status & DMA_STATUS_TPS)) {
959 DBG(intr, INFO, "transmit process stopped\n");
960 priv->xstats.tx_process_stopped_irq++;
961 stmmac_tx_err(priv);
962 }
963 if (unlikely(intr_status & DMA_STATUS_FBI)) {
964 DBG(intr, INFO, "fatal bus error\n");
965 priv->xstats.fatal_bus_error_irq++;
966 stmmac_tx_err(priv);
967 }
968 }
969
970 /* TX/RX NORMAL interrupts */
971 if (intr_status & DMA_STATUS_NIS) {
972 priv->xstats.normal_irq_n++;
973 if (likely((intr_status & DMA_STATUS_RI) ||
974 (intr_status & (DMA_STATUS_TI))))
975 _stmmac_schedule(priv);
976 }
977
978 /* Optional hardware blocks, interrupts should be disabled */
979 if (unlikely(intr_status &
980 (DMA_STATUS_GPI | DMA_STATUS_GMI | DMA_STATUS_GLI)))
981 pr_info("%s: unexpected status %08x\n", __func__, intr_status);
982
983 /* Clear the interrupt by writing a logic 1 to the CSR5[15-0] */
984 writel((intr_status & 0x1ffff), ioaddr + DMA_STATUS);
985
986 DBG(intr, INFO, "\n\n");
987
988 return;
989}
990
991/**
992 * stmmac_open - open entry point of the driver
993 * @dev : pointer to the device structure.
994 * Description:
995 * This function is the open entry point of the driver.
996 * Return value:
997 * 0 on success and an appropriate (-)ve integer as defined in errno.h
998 * file on failure.
999 */
1000static int stmmac_open(struct net_device *dev)
1001{
1002 struct stmmac_priv *priv = netdev_priv(dev);
1003 unsigned long ioaddr = dev->base_addr;
1004 int ret;
1005
1006 /* Check that the MAC address is valid. If its not, refuse
1007 * to bring the device up. The user must specify an
1008 * address using the following linux command:
1009 * ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx */
1010 if (!is_valid_ether_addr(dev->dev_addr)) {
1011 random_ether_addr(dev->dev_addr);
1012 pr_warning("%s: generated random MAC address %pM\n", dev->name,
1013 dev->dev_addr);
1014 }
1015
1016 stmmac_verify_args();
1017
1018 ret = stmmac_init_phy(dev);
1019 if (unlikely(ret)) {
1020 pr_err("%s: Cannot attach to PHY (error: %d)\n", __func__, ret);
1021 return ret;
1022 }
1023
1024 /* Request the IRQ lines */
1025 ret = request_irq(dev->irq, &stmmac_interrupt,
1026 IRQF_SHARED, dev->name, dev);
1027 if (unlikely(ret < 0)) {
1028 pr_err("%s: ERROR: allocating the IRQ %d (error: %d)\n",
1029 __func__, dev->irq, ret);
1030 return ret;
1031 }
1032
1033#ifdef CONFIG_STMMAC_TIMER
1034 priv->tm = kmalloc(sizeof(struct stmmac_timer *), GFP_KERNEL);
1035 if (unlikely(priv->tm == NULL)) {
1036 pr_err("%s: ERROR: timer memory alloc failed \n", __func__);
1037 return -ENOMEM;
1038 }
1039 priv->tm->freq = tmrate;
1040
1041 /* Test if the HW timer can be actually used.
1042 * In case of failure continue with no timer. */
1043 if (unlikely((stmmac_open_ext_timer(dev, priv->tm)) < 0)) {
1044 pr_warning("stmmaceth: cannot attach the HW timer\n");
1045 tmrate = 0;
1046 priv->tm->freq = 0;
1047 priv->tm->timer_start = stmmac_no_timer_started;
1048 priv->tm->timer_stop = stmmac_no_timer_stopped;
1049 }
1050#endif
1051
1052 /* Create and initialize the TX/RX descriptors chains. */
1053 priv->dma_tx_size = STMMAC_ALIGN(dma_txsize);
1054 priv->dma_rx_size = STMMAC_ALIGN(dma_rxsize);
1055 priv->dma_buf_sz = STMMAC_ALIGN(buf_sz);
1056 init_dma_desc_rings(dev);
1057
1058 /* DMA initialization and SW reset */
1059 if (unlikely(priv->mac_type->ops->dma_init(ioaddr,
1060 priv->pbl, priv->dma_tx_phy, priv->dma_rx_phy) < 0)) {
1061
1062 pr_err("%s: DMA initialization failed\n", __func__);
1063 return -1;
1064 }
1065
1066 /* Copy the MAC addr into the HW */
1067 priv->mac_type->ops->set_umac_addr(ioaddr, dev->dev_addr, 0);
1068 /* Initialize the MAC Core */
1069 priv->mac_type->ops->core_init(ioaddr);
1070
1071 priv->shutdown = 0;
1072
1073 /* Initialise the MMC (if present) to disable all interrupts. */
1074 writel(0xffffffff, ioaddr + MMC_HIGH_INTR_MASK);
1075 writel(0xffffffff, ioaddr + MMC_LOW_INTR_MASK);
1076
1077 /* Enable the MAC Rx/Tx */
1078 stmmac_mac_enable_rx(ioaddr);
1079 stmmac_mac_enable_tx(ioaddr);
1080
1081 /* Set the HW DMA mode and the COE */
1082 stmmac_dma_operation_mode(priv);
1083
1084 /* Extra statistics */
1085 memset(&priv->xstats, 0, sizeof(struct stmmac_extra_stats));
1086 priv->xstats.threshold = tc;
1087
1088 /* Start the ball rolling... */
1089 DBG(probe, DEBUG, "%s: DMA RX/TX processes started...\n", dev->name);
1090 stmmac_dma_start_tx(ioaddr);
1091 stmmac_dma_start_rx(ioaddr);
1092
1093#ifdef CONFIG_STMMAC_TIMER
1094 priv->tm->timer_start(tmrate);
1095#endif
1096 /* Dump DMA/MAC registers */
1097 if (netif_msg_hw(priv)) {
1098 priv->mac_type->ops->dump_mac_regs(ioaddr);
1099 priv->mac_type->ops->dump_dma_regs(ioaddr);
1100 }
1101
1102 if (priv->phydev)
1103 phy_start(priv->phydev);
1104
1105 napi_enable(&priv->napi);
1106 skb_queue_head_init(&priv->rx_recycle);
1107 netif_start_queue(dev);
1108 return 0;
1109}
1110
1111/**
1112 * stmmac_release - close entry point of the driver
1113 * @dev : device pointer.
1114 * Description:
1115 * This is the stop entry point of the driver.
1116 */
1117static int stmmac_release(struct net_device *dev)
1118{
1119 struct stmmac_priv *priv = netdev_priv(dev);
1120
1121 /* Stop and disconnect the PHY */
1122 if (priv->phydev) {
1123 phy_stop(priv->phydev);
1124 phy_disconnect(priv->phydev);
1125 priv->phydev = NULL;
1126 }
1127
1128 netif_stop_queue(dev);
1129
1130#ifdef CONFIG_STMMAC_TIMER
1131 /* Stop and release the timer */
1132 stmmac_close_ext_timer();
1133 if (priv->tm != NULL)
1134 kfree(priv->tm);
1135#endif
1136 napi_disable(&priv->napi);
1137 skb_queue_purge(&priv->rx_recycle);
1138
1139 /* Free the IRQ lines */
1140 free_irq(dev->irq, dev);
1141
1142 /* Stop TX/RX DMA and clear the descriptors */
1143 stmmac_dma_stop_tx(dev->base_addr);
1144 stmmac_dma_stop_rx(dev->base_addr);
1145
1146 /* Release and free the Rx/Tx resources */
1147 free_dma_desc_resources(priv);
1148
1149 /* Disable the MAC core */
1150 stmmac_mac_disable_tx(dev->base_addr);
1151 stmmac_mac_disable_rx(dev->base_addr);
1152
1153 netif_carrier_off(dev);
1154
1155 return 0;
1156}
1157
1158/*
1159 * To perform emulated hardware segmentation on skb.
1160 */
1161static int stmmac_sw_tso(struct stmmac_priv *priv, struct sk_buff *skb)
1162{
1163 struct sk_buff *segs, *curr_skb;
1164 int gso_segs = skb_shinfo(skb)->gso_segs;
1165
1166 /* Estimate the number of fragments in the worst case */
1167 if (unlikely(stmmac_tx_avail(priv) < gso_segs)) {
1168 netif_stop_queue(priv->dev);
1169 TX_DBG(KERN_ERR "%s: TSO BUG! Tx Ring full when queue awake\n",
1170 __func__);
1171 if (stmmac_tx_avail(priv) < gso_segs)
1172 return NETDEV_TX_BUSY;
1173
1174 netif_wake_queue(priv->dev);
1175 }
1176 TX_DBG("\tstmmac_sw_tso: segmenting: skb %p (len %d)\n",
1177 skb, skb->len);
1178
1179 segs = skb_gso_segment(skb, priv->dev->features & ~NETIF_F_TSO);
1180 if (unlikely(IS_ERR(segs)))
1181 goto sw_tso_end;
1182
1183 do {
1184 curr_skb = segs;
1185 segs = segs->next;
1186 TX_DBG("\t\tcurrent skb->len: %d, *curr %p,"
1187 "*next %p\n", curr_skb->len, curr_skb, segs);
1188 curr_skb->next = NULL;
1189 stmmac_xmit(curr_skb, priv->dev);
1190 } while (segs);
1191
1192sw_tso_end:
1193 dev_kfree_skb(skb);
1194
1195 return NETDEV_TX_OK;
1196}
1197
1198static unsigned int stmmac_handle_jumbo_frames(struct sk_buff *skb,
1199 struct net_device *dev,
1200 int csum_insertion)
1201{
1202 struct stmmac_priv *priv = netdev_priv(dev);
1203 unsigned int nopaged_len = skb_headlen(skb);
1204 unsigned int txsize = priv->dma_tx_size;
1205 unsigned int entry = priv->cur_tx % txsize;
1206 struct dma_desc *desc = priv->dma_tx + entry;
1207
1208 if (nopaged_len > BUF_SIZE_8KiB) {
1209
1210 int buf2_size = nopaged_len - BUF_SIZE_8KiB;
1211
1212 desc->des2 = dma_map_single(priv->device, skb->data,
1213 BUF_SIZE_8KiB, DMA_TO_DEVICE);
1214 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1215 priv->mac_type->ops->prepare_tx_desc(desc, 1, BUF_SIZE_8KiB,
1216 csum_insertion);
1217
1218 entry = (++priv->cur_tx) % txsize;
1219 desc = priv->dma_tx + entry;
1220
1221 desc->des2 = dma_map_single(priv->device,
1222 skb->data + BUF_SIZE_8KiB,
1223 buf2_size, DMA_TO_DEVICE);
1224 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1225 priv->mac_type->ops->prepare_tx_desc(desc, 0,
1226 buf2_size, csum_insertion);
1227 priv->mac_type->ops->set_tx_owner(desc);
1228 priv->tx_skbuff[entry] = NULL;
1229 } else {
1230 desc->des2 = dma_map_single(priv->device, skb->data,
1231 nopaged_len, DMA_TO_DEVICE);
1232 desc->des3 = desc->des2 + BUF_SIZE_4KiB;
1233 priv->mac_type->ops->prepare_tx_desc(desc, 1, nopaged_len,
1234 csum_insertion);
1235 }
1236 return entry;
1237}
1238
1239/**
1240 * stmmac_xmit:
1241 * @skb : the socket buffer
1242 * @dev : device pointer
1243 * Description : Tx entry point of the driver.
1244 */
1245static netdev_tx_t stmmac_xmit(struct sk_buff *skb, struct net_device *dev)
1246{
1247 struct stmmac_priv *priv = netdev_priv(dev);
1248 unsigned int txsize = priv->dma_tx_size;
1249 unsigned int entry;
1250 int i, csum_insertion = 0;
1251 int nfrags = skb_shinfo(skb)->nr_frags;
1252 struct dma_desc *desc, *first;
1253
1254 if (unlikely(stmmac_tx_avail(priv) < nfrags + 1)) {
1255 if (!netif_queue_stopped(dev)) {
1256 netif_stop_queue(dev);
1257 /* This is a hard error, log it. */
1258 pr_err("%s: BUG! Tx Ring full when queue awake\n",
1259 __func__);
1260 }
1261 return NETDEV_TX_BUSY;
1262 }
1263
1264 entry = priv->cur_tx % txsize;
1265
1266#ifdef STMMAC_XMIT_DEBUG
1267 if ((skb->len > ETH_FRAME_LEN) || nfrags)
1268 pr_info("stmmac xmit:\n"
1269 "\tskb addr %p - len: %d - nopaged_len: %d\n"
1270 "\tn_frags: %d - ip_summed: %d - %s gso\n",
1271 skb, skb->len, skb_headlen(skb), nfrags, skb->ip_summed,
1272 !skb_is_gso(skb) ? "isn't" : "is");
1273#endif
1274
1275 if (unlikely(skb_is_gso(skb)))
1276 return stmmac_sw_tso(priv, skb);
1277
1278 if (likely((skb->ip_summed == CHECKSUM_PARTIAL))) {
1279 if (likely(priv->tx_coe == NO_HW_CSUM))
1280 skb_checksum_help(skb);
1281 else
1282 csum_insertion = 1;
1283 }
1284
1285 desc = priv->dma_tx + entry;
1286 first = desc;
1287
1288#ifdef STMMAC_XMIT_DEBUG
1289 if ((nfrags > 0) || (skb->len > ETH_FRAME_LEN))
1290 pr_debug("stmmac xmit: skb len: %d, nopaged_len: %d,\n"
1291 "\t\tn_frags: %d, ip_summed: %d\n",
1292 skb->len, skb_headlen(skb), nfrags, skb->ip_summed);
1293#endif
1294 priv->tx_skbuff[entry] = skb;
1295 if (unlikely(skb->len >= BUF_SIZE_4KiB)) {
1296 entry = stmmac_handle_jumbo_frames(skb, dev, csum_insertion);
1297 desc = priv->dma_tx + entry;
1298 } else {
1299 unsigned int nopaged_len = skb_headlen(skb);
1300 desc->des2 = dma_map_single(priv->device, skb->data,
1301 nopaged_len, DMA_TO_DEVICE);
1302 priv->mac_type->ops->prepare_tx_desc(desc, 1, nopaged_len,
1303 csum_insertion);
1304 }
1305
1306 for (i = 0; i < nfrags; i++) {
1307 skb_frag_t *frag = &skb_shinfo(skb)->frags[i];
1308 int len = frag->size;
1309
1310 entry = (++priv->cur_tx) % txsize;
1311 desc = priv->dma_tx + entry;
1312
1313 TX_DBG("\t[entry %d] segment len: %d\n", entry, len);
1314 desc->des2 = dma_map_page(priv->device, frag->page,
1315 frag->page_offset,
1316 len, DMA_TO_DEVICE);
1317 priv->tx_skbuff[entry] = NULL;
1318 priv->mac_type->ops->prepare_tx_desc(desc, 0, len,
1319 csum_insertion);
1320 priv->mac_type->ops->set_tx_owner(desc);
1321 }
1322
1323 /* Interrupt on completition only for the latest segment */
1324 priv->mac_type->ops->close_tx_desc(desc);
1325#ifdef CONFIG_STMMAC_TIMER
1326 /* Clean IC while using timers */
1327 priv->mac_type->ops->clear_tx_ic(desc);
1328#endif
1329 /* To avoid raise condition */
1330 priv->mac_type->ops->set_tx_owner(first);
1331
1332 priv->cur_tx++;
1333
1334#ifdef STMMAC_XMIT_DEBUG
1335 if (netif_msg_pktdata(priv)) {
1336 pr_info("stmmac xmit: current=%d, dirty=%d, entry=%d, "
1337 "first=%p, nfrags=%d\n",
1338 (priv->cur_tx % txsize), (priv->dirty_tx % txsize),
1339 entry, first, nfrags);
1340 display_ring(priv->dma_tx, txsize);
1341 pr_info(">>> frame to be transmitted: ");
1342 print_pkt(skb->data, skb->len);
1343 }
1344#endif
1345 if (unlikely(stmmac_tx_avail(priv) <= (MAX_SKB_FRAGS + 1))) {
1346 TX_DBG("%s: stop transmitted packets\n", __func__);
1347 netif_stop_queue(dev);
1348 }
1349
1350 dev->stats.tx_bytes += skb->len;
1351
1352 /* CSR1 enables the transmit DMA to check for new descriptor */
1353 writel(1, dev->base_addr + DMA_XMT_POLL_DEMAND);
1354
1355 return NETDEV_TX_OK;
1356}
1357
1358static inline void stmmac_rx_refill(struct stmmac_priv *priv)
1359{
1360 unsigned int rxsize = priv->dma_rx_size;
1361 int bfsize = priv->dma_buf_sz;
1362 struct dma_desc *p = priv->dma_rx;
1363
1364 for (; priv->cur_rx - priv->dirty_rx > 0; priv->dirty_rx++) {
1365 unsigned int entry = priv->dirty_rx % rxsize;
1366 if (likely(priv->rx_skbuff[entry] == NULL)) {
1367 struct sk_buff *skb;
1368
1369 skb = __skb_dequeue(&priv->rx_recycle);
1370 if (skb == NULL)
1371 skb = netdev_alloc_skb_ip_align(priv->dev,
1372 bfsize);
1373
1374 if (unlikely(skb == NULL))
1375 break;
1376
1377 priv->rx_skbuff[entry] = skb;
1378 priv->rx_skbuff_dma[entry] =
1379 dma_map_single(priv->device, skb->data, bfsize,
1380 DMA_FROM_DEVICE);
1381
1382 (p + entry)->des2 = priv->rx_skbuff_dma[entry];
1383 if (unlikely(priv->is_gmac)) {
1384 if (bfsize >= BUF_SIZE_8KiB)
1385 (p + entry)->des3 =
1386 (p + entry)->des2 + BUF_SIZE_8KiB;
1387 }
1388 RX_DBG(KERN_INFO "\trefill entry #%d\n", entry);
1389 }
1390 priv->mac_type->ops->set_rx_owner(p + entry);
1391 }
1392 return;
1393}
1394
1395static int stmmac_rx(struct stmmac_priv *priv, int limit)
1396{
1397 unsigned int rxsize = priv->dma_rx_size;
1398 unsigned int entry = priv->cur_rx % rxsize;
1399 unsigned int next_entry;
1400 unsigned int count = 0;
1401 struct dma_desc *p = priv->dma_rx + entry;
1402 struct dma_desc *p_next;
1403
1404#ifdef STMMAC_RX_DEBUG
1405 if (netif_msg_hw(priv)) {
1406 pr_debug(">>> stmmac_rx: descriptor ring:\n");
1407 display_ring(priv->dma_rx, rxsize);
1408 }
1409#endif
1410 count = 0;
1411 while (!priv->mac_type->ops->get_rx_owner(p)) {
1412 int status;
1413
1414 if (count >= limit)
1415 break;
1416
1417 count++;
1418
1419 next_entry = (++priv->cur_rx) % rxsize;
1420 p_next = priv->dma_rx + next_entry;
1421 prefetch(p_next);
1422
1423 /* read the status of the incoming frame */
1424 status = (priv->mac_type->ops->rx_status(&priv->dev->stats,
1425 &priv->xstats, p));
1426 if (unlikely(status == discard_frame))
1427 priv->dev->stats.rx_errors++;
1428 else {
1429 struct sk_buff *skb;
1430 /* Length should omit the CRC */
1431 int frame_len =
1432 priv->mac_type->ops->get_rx_frame_len(p) - 4;
1433
1434#ifdef STMMAC_RX_DEBUG
1435 if (frame_len > ETH_FRAME_LEN)
1436 pr_debug("\tRX frame size %d, COE status: %d\n",
1437 frame_len, status);
1438
1439 if (netif_msg_hw(priv))
1440 pr_debug("\tdesc: %p [entry %d] buff=0x%x\n",
1441 p, entry, p->des2);
1442#endif
1443 skb = priv->rx_skbuff[entry];
1444 if (unlikely(!skb)) {
1445 pr_err("%s: Inconsistent Rx descriptor chain\n",
1446 priv->dev->name);
1447 priv->dev->stats.rx_dropped++;
1448 break;
1449 }
1450 prefetch(skb->data - NET_IP_ALIGN);
1451 priv->rx_skbuff[entry] = NULL;
1452
1453 skb_put(skb, frame_len);
1454 dma_unmap_single(priv->device,
1455 priv->rx_skbuff_dma[entry],
1456 priv->dma_buf_sz, DMA_FROM_DEVICE);
1457#ifdef STMMAC_RX_DEBUG
1458 if (netif_msg_pktdata(priv)) {
1459 pr_info(" frame received (%dbytes)", frame_len);
1460 print_pkt(skb->data, frame_len);
1461 }
1462#endif
1463 skb->protocol = eth_type_trans(skb, priv->dev);
1464
1465 if (unlikely(status == csum_none)) {
1466 /* always for the old mac 10/100 */
1467 skb->ip_summed = CHECKSUM_NONE;
1468 netif_receive_skb(skb);
1469 } else {
1470 skb->ip_summed = CHECKSUM_UNNECESSARY;
1471 napi_gro_receive(&priv->napi, skb);
1472 }
1473
1474 priv->dev->stats.rx_packets++;
1475 priv->dev->stats.rx_bytes += frame_len;
1476 priv->dev->last_rx = jiffies;
1477 }
1478 entry = next_entry;
1479 p = p_next; /* use prefetched values */
1480 }
1481
1482 stmmac_rx_refill(priv);
1483
1484 priv->xstats.rx_pkt_n += count;
1485
1486 return count;
1487}
1488
1489/**
1490 * stmmac_poll - stmmac poll method (NAPI)
1491 * @napi : pointer to the napi structure.
1492 * @budget : maximum number of packets that the current CPU can receive from
1493 * all interfaces.
1494 * Description :
1495 * This function implements the the reception process.
1496 * Also it runs the TX completion thread
1497 */
1498static int stmmac_poll(struct napi_struct *napi, int budget)
1499{
1500 struct stmmac_priv *priv = container_of(napi, struct stmmac_priv, napi);
1501 int work_done = 0;
1502
1503 priv->xstats.poll_n++;
1504 stmmac_tx(priv);
1505 work_done = stmmac_rx(priv, budget);
1506
1507 if (work_done < budget) {
1508 napi_complete(napi);
1509 stmmac_enable_irq(priv);
1510 }
1511 return work_done;
1512}
1513
1514/**
1515 * stmmac_tx_timeout
1516 * @dev : Pointer to net device structure
1517 * Description: this function is called when a packet transmission fails to
1518 * complete within a reasonable tmrate. The driver will mark the error in the
1519 * netdev structure and arrange for the device to be reset to a sane state
1520 * in order to transmit a new packet.
1521 */
1522static void stmmac_tx_timeout(struct net_device *dev)
1523{
1524 struct stmmac_priv *priv = netdev_priv(dev);
1525
1526 /* Clear Tx resources and restart transmitting again */
1527 stmmac_tx_err(priv);
1528 return;
1529}
1530
1531/* Configuration changes (passed on by ifconfig) */
1532static int stmmac_config(struct net_device *dev, struct ifmap *map)
1533{
1534 if (dev->flags & IFF_UP) /* can't act on a running interface */
1535 return -EBUSY;
1536
1537 /* Don't allow changing the I/O address */
1538 if (map->base_addr != dev->base_addr) {
1539 pr_warning("%s: can't change I/O address\n", dev->name);
1540 return -EOPNOTSUPP;
1541 }
1542
1543 /* Don't allow changing the IRQ */
1544 if (map->irq != dev->irq) {
1545 pr_warning("%s: can't change IRQ number %d\n",
1546 dev->name, dev->irq);
1547 return -EOPNOTSUPP;
1548 }
1549
1550 /* ignore other fields */
1551 return 0;
1552}
1553
1554/**
1555 * stmmac_multicast_list - entry point for multicast addressing
1556 * @dev : pointer to the device structure
1557 * Description:
1558 * This function is a driver entry point which gets called by the kernel
1559 * whenever multicast addresses must be enabled/disabled.
1560 * Return value:
1561 * void.
1562 */
1563static void stmmac_multicast_list(struct net_device *dev)
1564{
1565 struct stmmac_priv *priv = netdev_priv(dev);
1566
1567 spin_lock(&priv->lock);
1568 priv->mac_type->ops->set_filter(dev);
1569 spin_unlock(&priv->lock);
1570 return;
1571}
1572
1573/**
1574 * stmmac_change_mtu - entry point to change MTU size for the device.
1575 * @dev : device pointer.
1576 * @new_mtu : the new MTU size for the device.
1577 * Description: the Maximum Transfer Unit (MTU) is used by the network layer
1578 * to drive packet transmission. Ethernet has an MTU of 1500 octets
1579 * (ETH_DATA_LEN). This value can be changed with ifconfig.
1580 * Return value:
1581 * 0 on success and an appropriate (-)ve integer as defined in errno.h
1582 * file on failure.
1583 */
1584static int stmmac_change_mtu(struct net_device *dev, int new_mtu)
1585{
1586 struct stmmac_priv *priv = netdev_priv(dev);
1587 int max_mtu;
1588
1589 if (netif_running(dev)) {
1590 pr_err("%s: must be stopped to change its MTU\n", dev->name);
1591 return -EBUSY;
1592 }
1593
1594 if (priv->is_gmac)
1595 max_mtu = JUMBO_LEN;
1596 else
1597 max_mtu = ETH_DATA_LEN;
1598
1599 if ((new_mtu < 46) || (new_mtu > max_mtu)) {
1600 pr_err("%s: invalid MTU, max MTU is: %d\n", dev->name, max_mtu);
1601 return -EINVAL;
1602 }
1603
1604 dev->mtu = new_mtu;
1605
1606 return 0;
1607}
1608
1609static irqreturn_t stmmac_interrupt(int irq, void *dev_id)
1610{
1611 struct net_device *dev = (struct net_device *)dev_id;
1612 struct stmmac_priv *priv = netdev_priv(dev);
1613
1614 if (unlikely(!dev)) {
1615 pr_err("%s: invalid dev pointer\n", __func__);
1616 return IRQ_NONE;
1617 }
1618
1619 if (priv->is_gmac) {
1620 unsigned long ioaddr = dev->base_addr;
1621 /* To handle GMAC own interrupts */
1622 priv->mac_type->ops->host_irq_status(ioaddr);
1623 }
1624 stmmac_dma_interrupt(dev);
1625
1626 return IRQ_HANDLED;
1627}
1628
1629#ifdef CONFIG_NET_POLL_CONTROLLER
1630/* Polling receive - used by NETCONSOLE and other diagnostic tools
1631 * to allow network I/O with interrupts disabled. */
1632static void stmmac_poll_controller(struct net_device *dev)
1633{
1634 disable_irq(dev->irq);
1635 stmmac_interrupt(dev->irq, dev);
1636 enable_irq(dev->irq);
1637}
1638#endif
1639
1640/**
1641 * stmmac_ioctl - Entry point for the Ioctl
1642 * @dev: Device pointer.
1643 * @rq: An IOCTL specefic structure, that can contain a pointer to
1644 * a proprietary structure used to pass information to the driver.
1645 * @cmd: IOCTL command
1646 * Description:
1647 * Currently there are no special functionality supported in IOCTL, just the
1648 * phy_mii_ioctl(...) can be invoked.
1649 */
1650static int stmmac_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1651{
1652 struct stmmac_priv *priv = netdev_priv(dev);
1653 int ret = -EOPNOTSUPP;
1654
1655 if (!netif_running(dev))
1656 return -EINVAL;
1657
1658 switch (cmd) {
1659 case SIOCGMIIPHY:
1660 case SIOCGMIIREG:
1661 case SIOCSMIIREG:
1662 if (!priv->phydev)
1663 return -EINVAL;
1664
1665 spin_lock(&priv->lock);
1666 ret = phy_mii_ioctl(priv->phydev, if_mii(rq), cmd);
1667 spin_unlock(&priv->lock);
1668 default:
1669 break;
1670 }
1671 return ret;
1672}
1673
1674#ifdef STMMAC_VLAN_TAG_USED
1675static void stmmac_vlan_rx_register(struct net_device *dev,
1676 struct vlan_group *grp)
1677{
1678 struct stmmac_priv *priv = netdev_priv(dev);
1679
1680 DBG(probe, INFO, "%s: Setting vlgrp to %p\n", dev->name, grp);
1681
1682 spin_lock(&priv->lock);
1683 priv->vlgrp = grp;
1684 spin_unlock(&priv->lock);
1685
1686 return;
1687}
1688#endif
1689
1690static const struct net_device_ops stmmac_netdev_ops = {
1691 .ndo_open = stmmac_open,
1692 .ndo_start_xmit = stmmac_xmit,
1693 .ndo_stop = stmmac_release,
1694 .ndo_change_mtu = stmmac_change_mtu,
1695 .ndo_set_multicast_list = stmmac_multicast_list,
1696 .ndo_tx_timeout = stmmac_tx_timeout,
1697 .ndo_do_ioctl = stmmac_ioctl,
1698 .ndo_set_config = stmmac_config,
1699#ifdef STMMAC_VLAN_TAG_USED
1700 .ndo_vlan_rx_register = stmmac_vlan_rx_register,
1701#endif
1702#ifdef CONFIG_NET_POLL_CONTROLLER
1703 .ndo_poll_controller = stmmac_poll_controller,
1704#endif
1705 .ndo_set_mac_address = eth_mac_addr,
1706};
1707
1708/**
1709 * stmmac_probe - Initialization of the adapter .
1710 * @dev : device pointer
1711 * Description: The function initializes the network device structure for
1712 * the STMMAC driver. It also calls the low level routines
1713 * in order to init the HW (i.e. the DMA engine)
1714 */
1715static int stmmac_probe(struct net_device *dev)
1716{
1717 int ret = 0;
1718 struct stmmac_priv *priv = netdev_priv(dev);
1719
1720 ether_setup(dev);
1721
1722 dev->netdev_ops = &stmmac_netdev_ops;
1723 stmmac_set_ethtool_ops(dev);
1724
1725 dev->features |= (NETIF_F_SG | NETIF_F_HW_CSUM | NETIF_F_HIGHDMA);
1726 dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1727#ifdef STMMAC_VLAN_TAG_USED
1728 /* Both mac100 and gmac support receive VLAN tag detection */
1729 dev->features |= NETIF_F_HW_VLAN_RX;
1730#endif
1731 priv->msg_enable = netif_msg_init(debug, default_msg_level);
1732
1733 if (priv->is_gmac)
1734 priv->rx_csum = 1;
1735
1736 if (flow_ctrl)
1737 priv->flow_ctrl = FLOW_AUTO; /* RX/TX pause on */
1738
1739 priv->pause = pause;
1740 netif_napi_add(dev, &priv->napi, stmmac_poll, 64);
1741
1742 /* Get the MAC address */
1743 priv->mac_type->ops->get_umac_addr(dev->base_addr, dev->dev_addr, 0);
1744
1745 if (!is_valid_ether_addr(dev->dev_addr))
1746 pr_warning("\tno valid MAC address;"
1747 "please, use ifconfig or nwhwconfig!\n");
1748
1749 ret = register_netdev(dev);
1750 if (ret) {
1751 pr_err("%s: ERROR %i registering the device\n",
1752 __func__, ret);
1753 return -ENODEV;
1754 }
1755
1756 DBG(probe, DEBUG, "%s: Scatter/Gather: %s - HW checksums: %s\n",
1757 dev->name, (dev->features & NETIF_F_SG) ? "on" : "off",
1758 (dev->features & NETIF_F_HW_CSUM) ? "on" : "off");
1759
1760 spin_lock_init(&priv->lock);
1761
1762 return ret;
1763}
1764
1765/**
1766 * stmmac_mac_device_setup
1767 * @dev : device pointer
1768 * Description: select and initialise the mac device (mac100 or Gmac).
1769 */
1770static int stmmac_mac_device_setup(struct net_device *dev)
1771{
1772 struct stmmac_priv *priv = netdev_priv(dev);
1773 unsigned long ioaddr = dev->base_addr;
1774
1775 struct mac_device_info *device;
1776
1777 if (priv->is_gmac)
1778 device = gmac_setup(ioaddr);
1779 else
1780 device = mac100_setup(ioaddr);
1781
1782 if (!device)
1783 return -ENOMEM;
1784
1785 priv->mac_type = device;
1786
1787 priv->wolenabled = priv->mac_type->hw.pmt; /* PMT supported */
1788 if (priv->wolenabled == PMT_SUPPORTED)
1789 priv->wolopts = WAKE_MAGIC; /* Magic Frame */
1790
1791 return 0;
1792}
1793
1794static int stmmacphy_dvr_probe(struct platform_device *pdev)
1795{
1796 struct plat_stmmacphy_data *plat_dat;
1797 plat_dat = (struct plat_stmmacphy_data *)((pdev->dev).platform_data);
1798
1799 pr_debug("stmmacphy_dvr_probe: added phy for bus %d\n",
1800 plat_dat->bus_id);
1801
1802 return 0;
1803}
1804
1805static int stmmacphy_dvr_remove(struct platform_device *pdev)
1806{
1807 return 0;
1808}
1809
1810static struct platform_driver stmmacphy_driver = {
1811 .driver = {
1812 .name = PHY_RESOURCE_NAME,
1813 },
1814 .probe = stmmacphy_dvr_probe,
1815 .remove = stmmacphy_dvr_remove,
1816};
1817
1818/**
1819 * stmmac_associate_phy
1820 * @dev: pointer to device structure
1821 * @data: points to the private structure.
1822 * Description: Scans through all the PHYs we have registered and checks if
1823 * any are associated with our MAC. If so, then just fill in
1824 * the blanks in our local context structure
1825 */
1826static int stmmac_associate_phy(struct device *dev, void *data)
1827{
1828 struct stmmac_priv *priv = (struct stmmac_priv *)data;
1829 struct plat_stmmacphy_data *plat_dat;
1830
1831 plat_dat = (struct plat_stmmacphy_data *)(dev->platform_data);
1832
1833 DBG(probe, DEBUG, "%s: checking phy for bus %d\n", __func__,
1834 plat_dat->bus_id);
1835
1836 /* Check that this phy is for the MAC being initialised */
1837 if (priv->bus_id != plat_dat->bus_id)
1838 return 0;
1839
1840 /* OK, this PHY is connected to the MAC.
1841 Go ahead and get the parameters */
1842 DBG(probe, DEBUG, "%s: OK. Found PHY config\n", __func__);
1843 priv->phy_irq =
1844 platform_get_irq_byname(to_platform_device(dev), "phyirq");
1845 DBG(probe, DEBUG, "%s: PHY irq on bus %d is %d\n", __func__,
1846 plat_dat->bus_id, priv->phy_irq);
1847
1848 /* Override with kernel parameters if supplied XXX CRS XXX
1849 * this needs to have multiple instances */
1850 if ((phyaddr >= 0) && (phyaddr <= 31))
1851 plat_dat->phy_addr = phyaddr;
1852
1853 priv->phy_addr = plat_dat->phy_addr;
1854 priv->phy_mask = plat_dat->phy_mask;
1855 priv->phy_interface = plat_dat->interface;
1856 priv->phy_reset = plat_dat->phy_reset;
1857
1858 DBG(probe, DEBUG, "%s: exiting\n", __func__);
1859 return 1; /* forces exit of driver_for_each_device() */
1860}
1861
1862/**
1863 * stmmac_dvr_probe
1864 * @pdev: platform device pointer
1865 * Description: the driver is initialized through platform_device.
1866 */
1867static int stmmac_dvr_probe(struct platform_device *pdev)
1868{
1869 int ret = 0;
1870 struct resource *res;
1871 unsigned int *addr = NULL;
1872 struct net_device *ndev = NULL;
1873 struct stmmac_priv *priv;
1874 struct plat_stmmacenet_data *plat_dat;
1875
1876 pr_info("STMMAC driver:\n\tplatform registration... ");
1877 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1878 if (!res) {
1879 ret = -ENODEV;
1880 goto out;
1881 }
1882 pr_info("done!\n");
1883
1884 if (!request_mem_region(res->start, (res->end - res->start),
1885 pdev->name)) {
1886 pr_err("%s: ERROR: memory allocation failed"
1887 "cannot get the I/O addr 0x%x\n",
1888 __func__, (unsigned int)res->start);
1889 ret = -EBUSY;
1890 goto out;
1891 }
1892
1893 addr = ioremap(res->start, (res->end - res->start));
1894 if (!addr) {
1895 pr_err("%s: ERROR: memory mapping failed \n", __func__);
1896 ret = -ENOMEM;
1897 goto out;
1898 }
1899
1900 ndev = alloc_etherdev(sizeof(struct stmmac_priv));
1901 if (!ndev) {
1902 pr_err("%s: ERROR: allocating the device\n", __func__);
1903 ret = -ENOMEM;
1904 goto out;
1905 }
1906
1907 SET_NETDEV_DEV(ndev, &pdev->dev);
1908
1909 /* Get the MAC information */
1910 ndev->irq = platform_get_irq_byname(pdev, "macirq");
1911 if (ndev->irq == -ENXIO) {
1912 pr_err("%s: ERROR: MAC IRQ configuration "
1913 "information not found\n", __func__);
1914 ret = -ENODEV;
1915 goto out;
1916 }
1917
1918 priv = netdev_priv(ndev);
1919 priv->device = &(pdev->dev);
1920 priv->dev = ndev;
1921 plat_dat = (struct plat_stmmacenet_data *)((pdev->dev).platform_data);
1922 priv->bus_id = plat_dat->bus_id;
1923 priv->pbl = plat_dat->pbl; /* TLI */
1924 priv->is_gmac = plat_dat->has_gmac; /* GMAC is on board */
1925
1926 platform_set_drvdata(pdev, ndev);
1927
1928 /* Set the I/O base addr */
1929 ndev->base_addr = (unsigned long)addr;
1930
1931 /* MAC HW revice detection */
1932 ret = stmmac_mac_device_setup(ndev);
1933 if (ret < 0)
1934 goto out;
1935
1936 /* Network Device Registration */
1937 ret = stmmac_probe(ndev);
1938 if (ret < 0)
1939 goto out;
1940
1941 /* associate a PHY - it is provided by another platform bus */
1942 if (!driver_for_each_device
1943 (&(stmmacphy_driver.driver), NULL, (void *)priv,
1944 stmmac_associate_phy)) {
1945 pr_err("No PHY device is associated with this MAC!\n");
1946 ret = -ENODEV;
1947 goto out;
1948 }
1949
1950 priv->fix_mac_speed = plat_dat->fix_mac_speed;
1951 priv->bsp_priv = plat_dat->bsp_priv;
1952
1953 pr_info("\t%s - (dev. name: %s - id: %d, IRQ #%d\n"
1954 "\tIO base addr: 0x%08x)\n", ndev->name, pdev->name,
1955 pdev->id, ndev->irq, (unsigned int)addr);
1956
1957 /* MDIO bus Registration */
1958 pr_debug("\tMDIO bus (id: %d)...", priv->bus_id);
1959 ret = stmmac_mdio_register(ndev);
1960 if (ret < 0)
1961 goto out;
1962 pr_debug("registered!\n");
1963
1964out:
1965 if (ret < 0) {
1966 platform_set_drvdata(pdev, NULL);
1967 release_mem_region(res->start, (res->end - res->start));
1968 if (addr != NULL)
1969 iounmap(addr);
1970 }
1971
1972 return ret;
1973}
1974
1975/**
1976 * stmmac_dvr_remove
1977 * @pdev: platform device pointer
1978 * Description: this function resets the TX/RX processes, disables the MAC RX/TX
1979 * changes the link status, releases the DMA descriptor rings,
1980 * unregisters the MDIO bus and unmaps the allocated memory.
1981 */
1982static int stmmac_dvr_remove(struct platform_device *pdev)
1983{
1984 struct net_device *ndev = platform_get_drvdata(pdev);
1985 struct resource *res;
1986
1987 pr_info("%s:\n\tremoving driver", __func__);
1988
1989 stmmac_dma_stop_rx(ndev->base_addr);
1990 stmmac_dma_stop_tx(ndev->base_addr);
1991
1992 stmmac_mac_disable_rx(ndev->base_addr);
1993 stmmac_mac_disable_tx(ndev->base_addr);
1994
1995 netif_carrier_off(ndev);
1996
1997 stmmac_mdio_unregister(ndev);
1998
1999 platform_set_drvdata(pdev, NULL);
2000 unregister_netdev(ndev);
2001
2002 iounmap((void *)ndev->base_addr);
2003 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2004 release_mem_region(res->start, (res->end - res->start));
2005
2006 free_netdev(ndev);
2007
2008 return 0;
2009}
2010
2011#ifdef CONFIG_PM
2012static int stmmac_suspend(struct platform_device *pdev, pm_message_t state)
2013{
2014 struct net_device *dev = platform_get_drvdata(pdev);
2015 struct stmmac_priv *priv = netdev_priv(dev);
2016 int dis_ic = 0;
2017
2018 if (!dev || !netif_running(dev))
2019 return 0;
2020
2021 spin_lock(&priv->lock);
2022
2023 if (state.event == PM_EVENT_SUSPEND) {
2024 netif_device_detach(dev);
2025 netif_stop_queue(dev);
2026 if (priv->phydev)
2027 phy_stop(priv->phydev);
2028
2029#ifdef CONFIG_STMMAC_TIMER
2030 priv->tm->timer_stop();
2031 dis_ic = 1;
2032#endif
2033 napi_disable(&priv->napi);
2034
2035 /* Stop TX/RX DMA */
2036 stmmac_dma_stop_tx(dev->base_addr);
2037 stmmac_dma_stop_rx(dev->base_addr);
2038 /* Clear the Rx/Tx descriptors */
2039 priv->mac_type->ops->init_rx_desc(priv->dma_rx,
2040 priv->dma_rx_size, dis_ic);
2041 priv->mac_type->ops->init_tx_desc(priv->dma_tx,
2042 priv->dma_tx_size);
2043
2044 stmmac_mac_disable_tx(dev->base_addr);
2045
2046 if (device_may_wakeup(&(pdev->dev))) {
2047 /* Enable Power down mode by programming the PMT regs */
2048 if (priv->wolenabled == PMT_SUPPORTED)
2049 priv->mac_type->ops->pmt(dev->base_addr,
2050 priv->wolopts);
2051 } else {
2052 stmmac_mac_disable_rx(dev->base_addr);
2053 }
2054 } else {
2055 priv->shutdown = 1;
2056 /* Although this can appear slightly redundant it actually
2057 * makes fast the standby operation and guarantees the driver
2058 * working if hibernation is on media. */
2059 stmmac_release(dev);
2060 }
2061
2062 spin_unlock(&priv->lock);
2063 return 0;
2064}
2065
2066static int stmmac_resume(struct platform_device *pdev)
2067{
2068 struct net_device *dev = platform_get_drvdata(pdev);
2069 struct stmmac_priv *priv = netdev_priv(dev);
2070 unsigned long ioaddr = dev->base_addr;
2071
2072 if (!netif_running(dev))
2073 return 0;
2074
2075 spin_lock(&priv->lock);
2076
2077 if (priv->shutdown) {
2078 /* Re-open the interface and re-init the MAC/DMA
2079 and the rings. */
2080 stmmac_open(dev);
2081 goto out_resume;
2082 }
2083
2084 /* Power Down bit, into the PM register, is cleared
2085 * automatically as soon as a magic packet or a Wake-up frame
2086 * is received. Anyway, it's better to manually clear
2087 * this bit because it can generate problems while resuming
2088 * from another devices (e.g. serial console). */
2089 if (device_may_wakeup(&(pdev->dev)))
2090 if (priv->wolenabled == PMT_SUPPORTED)
2091 priv->mac_type->ops->pmt(dev->base_addr, 0);
2092
2093 netif_device_attach(dev);
2094
2095 /* Enable the MAC and DMA */
2096 stmmac_mac_enable_rx(ioaddr);
2097 stmmac_mac_enable_tx(ioaddr);
2098 stmmac_dma_start_tx(ioaddr);
2099 stmmac_dma_start_rx(ioaddr);
2100
2101#ifdef CONFIG_STMMAC_TIMER
2102 priv->tm->timer_start(tmrate);
2103#endif
2104 napi_enable(&priv->napi);
2105
2106 if (priv->phydev)
2107 phy_start(priv->phydev);
2108
2109 netif_start_queue(dev);
2110
2111out_resume:
2112 spin_unlock(&priv->lock);
2113 return 0;
2114}
2115#endif
2116
2117static struct platform_driver stmmac_driver = {
2118 .driver = {
2119 .name = STMMAC_RESOURCE_NAME,
2120 },
2121 .probe = stmmac_dvr_probe,
2122 .remove = stmmac_dvr_remove,
2123#ifdef CONFIG_PM
2124 .suspend = stmmac_suspend,
2125 .resume = stmmac_resume,
2126#endif
2127
2128};
2129
2130/**
2131 * stmmac_init_module - Entry point for the driver
2132 * Description: This function is the entry point for the driver.
2133 */
2134static int __init stmmac_init_module(void)
2135{
2136 int ret;
2137
2138 if (platform_driver_register(&stmmacphy_driver)) {
2139 pr_err("No PHY devices registered!\n");
2140 return -ENODEV;
2141 }
2142
2143 ret = platform_driver_register(&stmmac_driver);
2144 return ret;
2145}
2146
2147/**
2148 * stmmac_cleanup_module - Cleanup routine for the driver
2149 * Description: This function is the cleanup routine for the driver.
2150 */
2151static void __exit stmmac_cleanup_module(void)
2152{
2153 platform_driver_unregister(&stmmacphy_driver);
2154 platform_driver_unregister(&stmmac_driver);
2155}
2156
2157#ifndef MODULE
2158static int __init stmmac_cmdline_opt(char *str)
2159{
2160 char *opt;
2161
2162 if (!str || !*str)
2163 return -EINVAL;
2164 while ((opt = strsep(&str, ",")) != NULL) {
2165 if (!strncmp(opt, "debug:", 6))
2166 strict_strtoul(opt + 6, 0, (unsigned long *)&debug);
2167 else if (!strncmp(opt, "phyaddr:", 8))
2168 strict_strtoul(opt + 8, 0, (unsigned long *)&phyaddr);
2169 else if (!strncmp(opt, "dma_txsize:", 11))
2170 strict_strtoul(opt + 11, 0,
2171 (unsigned long *)&dma_txsize);
2172 else if (!strncmp(opt, "dma_rxsize:", 11))
2173 strict_strtoul(opt + 11, 0,
2174 (unsigned long *)&dma_rxsize);
2175 else if (!strncmp(opt, "buf_sz:", 7))
2176 strict_strtoul(opt + 7, 0, (unsigned long *)&buf_sz);
2177 else if (!strncmp(opt, "tc:", 3))
2178 strict_strtoul(opt + 3, 0, (unsigned long *)&tc);
2179 else if (!strncmp(opt, "tx_coe:", 7))
2180 strict_strtoul(opt + 7, 0, (unsigned long *)&tx_coe);
2181 else if (!strncmp(opt, "watchdog:", 9))
2182 strict_strtoul(opt + 9, 0, (unsigned long *)&watchdog);
2183 else if (!strncmp(opt, "flow_ctrl:", 10))
2184 strict_strtoul(opt + 10, 0,
2185 (unsigned long *)&flow_ctrl);
2186 else if (!strncmp(opt, "pause:", 6))
2187 strict_strtoul(opt + 6, 0, (unsigned long *)&pause);
2188#ifdef CONFIG_STMMAC_TIMER
2189 else if (!strncmp(opt, "tmrate:", 7))
2190 strict_strtoul(opt + 7, 0, (unsigned long *)&tmrate);
2191#endif
2192 }
2193 return 0;
2194}
2195
2196__setup("stmmaceth=", stmmac_cmdline_opt);
2197#endif
2198
2199module_init(stmmac_init_module);
2200module_exit(stmmac_cleanup_module);
2201
2202MODULE_DESCRIPTION("STMMAC 10/100/1000 Ethernet driver");
2203MODULE_AUTHOR("Giuseppe Cavallaro <peppe.cavallaro@st.com>");
2204MODULE_LICENSE("GPL");
diff --git a/drivers/net/stmmac/stmmac_mdio.c b/drivers/net/stmmac/stmmac_mdio.c
new file mode 100644
index 000000000000..8498552a22fc
--- /dev/null
+++ b/drivers/net/stmmac/stmmac_mdio.c
@@ -0,0 +1,217 @@
1/*******************************************************************************
2 STMMAC Ethernet Driver -- MDIO bus implementation
3 Provides Bus interface for MII registers
4
5 Copyright (C) 2007-2009 STMicroelectronics Ltd
6
7 This program is free software; you can redistribute it and/or modify it
8 under the terms and conditions of the GNU General Public License,
9 version 2, as published by the Free Software Foundation.
10
11 This program is distributed in the hope it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc.,
18 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19
20 The full GNU General Public License is included in this distribution in
21 the file called "COPYING".
22
23 Author: Carl Shaw <carl.shaw@st.com>
24 Maintainer: Giuseppe Cavallaro <peppe.cavallaro@st.com>
25*******************************************************************************/
26
27#include <linux/netdevice.h>
28#include <linux/mii.h>
29#include <linux/phy.h>
30
31#include "stmmac.h"
32
33#define MII_BUSY 0x00000001
34#define MII_WRITE 0x00000002
35
36/**
37 * stmmac_mdio_read
38 * @bus: points to the mii_bus structure
39 * @phyaddr: MII addr reg bits 15-11
40 * @phyreg: MII addr reg bits 10-6
41 * Description: it reads data from the MII register from within the phy device.
42 * For the 7111 GMAC, we must set the bit 0 in the MII address register while
43 * accessing the PHY registers.
44 * Fortunately, it seems this has no drawback for the 7109 MAC.
45 */
46static int stmmac_mdio_read(struct mii_bus *bus, int phyaddr, int phyreg)
47{
48 struct net_device *ndev = bus->priv;
49 struct stmmac_priv *priv = netdev_priv(ndev);
50 unsigned long ioaddr = ndev->base_addr;
51 unsigned int mii_address = priv->mac_type->hw.mii.addr;
52 unsigned int mii_data = priv->mac_type->hw.mii.data;
53
54 int data;
55 u16 regValue = (((phyaddr << 11) & (0x0000F800)) |
56 ((phyreg << 6) & (0x000007C0)));
57 regValue |= MII_BUSY; /* in case of GMAC */
58
59 do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1);
60 writel(regValue, ioaddr + mii_address);
61 do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1);
62
63 /* Read the data from the MII data register */
64 data = (int)readl(ioaddr + mii_data);
65
66 return data;
67}
68
69/**
70 * stmmac_mdio_write
71 * @bus: points to the mii_bus structure
72 * @phyaddr: MII addr reg bits 15-11
73 * @phyreg: MII addr reg bits 10-6
74 * @phydata: phy data
75 * Description: it writes the data into the MII register from within the device.
76 */
77static int stmmac_mdio_write(struct mii_bus *bus, int phyaddr, int phyreg,
78 u16 phydata)
79{
80 struct net_device *ndev = bus->priv;
81 struct stmmac_priv *priv = netdev_priv(ndev);
82 unsigned long ioaddr = ndev->base_addr;
83 unsigned int mii_address = priv->mac_type->hw.mii.addr;
84 unsigned int mii_data = priv->mac_type->hw.mii.data;
85
86 u16 value =
87 (((phyaddr << 11) & (0x0000F800)) | ((phyreg << 6) & (0x000007C0)))
88 | MII_WRITE;
89
90 value |= MII_BUSY;
91
92 /* Wait until any existing MII operation is complete */
93 do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1);
94
95 /* Set the MII address register to write */
96 writel(phydata, ioaddr + mii_data);
97 writel(value, ioaddr + mii_address);
98
99 /* Wait until any existing MII operation is complete */
100 do {} while (((readl(ioaddr + mii_address)) & MII_BUSY) == 1);
101
102 return 0;
103}
104
105/**
106 * stmmac_mdio_reset
107 * @bus: points to the mii_bus structure
108 * Description: reset the MII bus
109 */
110static int stmmac_mdio_reset(struct mii_bus *bus)
111{
112 struct net_device *ndev = bus->priv;
113 struct stmmac_priv *priv = netdev_priv(ndev);
114 unsigned long ioaddr = ndev->base_addr;
115 unsigned int mii_address = priv->mac_type->hw.mii.addr;
116
117 if (priv->phy_reset) {
118 pr_debug("stmmac_mdio_reset: calling phy_reset\n");
119 priv->phy_reset(priv->bsp_priv);
120 }
121
122 /* This is a workaround for problems with the STE101P PHY.
123 * It doesn't complete its reset until at least one clock cycle
124 * on MDC, so perform a dummy mdio read.
125 */
126 writel(0, ioaddr + mii_address);
127
128 return 0;
129}
130
131/**
132 * stmmac_mdio_register
133 * @ndev: net device structure
134 * Description: it registers the MII bus
135 */
136int stmmac_mdio_register(struct net_device *ndev)
137{
138 int err = 0;
139 struct mii_bus *new_bus;
140 int *irqlist;
141 struct stmmac_priv *priv = netdev_priv(ndev);
142 int addr, found;
143
144 new_bus = mdiobus_alloc();
145 if (new_bus == NULL)
146 return -ENOMEM;
147
148 irqlist = kzalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
149 if (irqlist == NULL) {
150 err = -ENOMEM;
151 goto irqlist_alloc_fail;
152 }
153
154 /* Assign IRQ to phy at address phy_addr */
155 if (priv->phy_addr != -1)
156 irqlist[priv->phy_addr] = priv->phy_irq;
157
158 new_bus->name = "STMMAC MII Bus";
159 new_bus->read = &stmmac_mdio_read;
160 new_bus->write = &stmmac_mdio_write;
161 new_bus->reset = &stmmac_mdio_reset;
162 snprintf(new_bus->id, MII_BUS_ID_SIZE, "%x", priv->bus_id);
163 new_bus->priv = ndev;
164 new_bus->irq = irqlist;
165 new_bus->phy_mask = priv->phy_mask;
166 new_bus->parent = priv->device;
167 err = mdiobus_register(new_bus);
168 if (err != 0) {
169 pr_err("%s: Cannot register as MDIO bus\n", new_bus->name);
170 goto bus_register_fail;
171 }
172
173 priv->mii = new_bus;
174
175 found = 0;
176 for (addr = 0; addr < 32; addr++) {
177 struct phy_device *phydev = new_bus->phy_map[addr];
178 if (phydev) {
179 if (priv->phy_addr == -1) {
180 priv->phy_addr = addr;
181 phydev->irq = priv->phy_irq;
182 irqlist[addr] = priv->phy_irq;
183 }
184 pr_info("%s: PHY ID %08x at %d IRQ %d (%s)%s\n",
185 ndev->name, phydev->phy_id, addr,
186 phydev->irq, dev_name(&phydev->dev),
187 (addr == priv->phy_addr) ? " active" : "");
188 found = 1;
189 }
190 }
191
192 if (!found)
193 pr_warning("%s: No PHY found\n", ndev->name);
194
195 return 0;
196bus_register_fail:
197 kfree(irqlist);
198irqlist_alloc_fail:
199 kfree(new_bus);
200 return err;
201}
202
203/**
204 * stmmac_mdio_unregister
205 * @ndev: net device structure
206 * Description: it unregisters the MII bus
207 */
208int stmmac_mdio_unregister(struct net_device *ndev)
209{
210 struct stmmac_priv *priv = netdev_priv(ndev);
211
212 mdiobus_unregister(priv->mii);
213 priv->mii->priv = NULL;
214 kfree(priv->mii);
215
216 return 0;
217}
diff --git a/drivers/net/stmmac/stmmac_timer.c b/drivers/net/stmmac/stmmac_timer.c
new file mode 100644
index 000000000000..b838c6582077
--- /dev/null
+++ b/drivers/net/stmmac/stmmac_timer.c
@@ -0,0 +1,140 @@
1/*******************************************************************************
2 STMMAC external timer support.
3
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23*******************************************************************************/
24
25#include <linux/kernel.h>
26#include <linux/etherdevice.h>
27#include "stmmac_timer.h"
28
29static void stmmac_timer_handler(void *data)
30{
31 struct net_device *dev = (struct net_device *)data;
32
33 stmmac_schedule(dev);
34
35 return;
36}
37
38#define STMMAC_TIMER_MSG(timer, freq) \
39printk(KERN_INFO "stmmac_timer: %s Timer ON (freq %dHz)\n", timer, freq);
40
41#if defined(CONFIG_STMMAC_RTC_TIMER)
42#include <linux/rtc.h>
43static struct rtc_device *stmmac_rtc;
44static rtc_task_t stmmac_task;
45
46static void stmmac_rtc_start(unsigned int new_freq)
47{
48 rtc_irq_set_freq(stmmac_rtc, &stmmac_task, new_freq);
49 rtc_irq_set_state(stmmac_rtc, &stmmac_task, 1);
50 return;
51}
52
53static void stmmac_rtc_stop(void)
54{
55 rtc_irq_set_state(stmmac_rtc, &stmmac_task, 0);
56 return;
57}
58
59int stmmac_open_ext_timer(struct net_device *dev, struct stmmac_timer *tm)
60{
61 stmmac_task.private_data = dev;
62 stmmac_task.func = stmmac_timer_handler;
63
64 stmmac_rtc = rtc_class_open(CONFIG_RTC_HCTOSYS_DEVICE);
65 if (stmmac_rtc == NULL) {
66 pr_error("open rtc device failed\n");
67 return -ENODEV;
68 }
69
70 rtc_irq_register(stmmac_rtc, &stmmac_task);
71
72 /* Periodic mode is not supported */
73 if ((rtc_irq_set_freq(stmmac_rtc, &stmmac_task, tm->freq) < 0)) {
74 pr_error("set periodic failed\n");
75 rtc_irq_unregister(stmmac_rtc, &stmmac_task);
76 rtc_class_close(stmmac_rtc);
77 return -1;
78 }
79
80 STMMAC_TIMER_MSG(CONFIG_RTC_HCTOSYS_DEVICE, tm->freq);
81
82 tm->timer_start = stmmac_rtc_start;
83 tm->timer_stop = stmmac_rtc_stop;
84
85 return 0;
86}
87
88int stmmac_close_ext_timer(void)
89{
90 rtc_irq_set_state(stmmac_rtc, &stmmac_task, 0);
91 rtc_irq_unregister(stmmac_rtc, &stmmac_task);
92 rtc_class_close(stmmac_rtc);
93 return 0;
94}
95
96#elif defined(CONFIG_STMMAC_TMU_TIMER)
97#include <linux/clk.h>
98#define TMU_CHANNEL "tmu2_clk"
99static struct clk *timer_clock;
100
101static void stmmac_tmu_start(unsigned int new_freq)
102{
103 clk_set_rate(timer_clock, new_freq);
104 clk_enable(timer_clock);
105 return;
106}
107
108static void stmmac_tmu_stop(void)
109{
110 clk_disable(timer_clock);
111 return;
112}
113
114int stmmac_open_ext_timer(struct net_device *dev, struct stmmac_timer *tm)
115{
116 timer_clock = clk_get(NULL, TMU_CHANNEL);
117
118 if (timer_clock == NULL)
119 return -1;
120
121 if (tmu2_register_user(stmmac_timer_handler, (void *)dev) < 0) {
122 timer_clock = NULL;
123 return -1;
124 }
125
126 STMMAC_TIMER_MSG("TMU2", tm->freq);
127 tm->timer_start = stmmac_tmu_start;
128 tm->timer_stop = stmmac_tmu_stop;
129
130 return 0;
131}
132
133int stmmac_close_ext_timer(void)
134{
135 clk_disable(timer_clock);
136 tmu2_unregister_user();
137 clk_put(timer_clock);
138 return 0;
139}
140#endif
diff --git a/drivers/net/stmmac/stmmac_timer.h b/drivers/net/stmmac/stmmac_timer.h
new file mode 100644
index 000000000000..f795cae33725
--- /dev/null
+++ b/drivers/net/stmmac/stmmac_timer.h
@@ -0,0 +1,41 @@
1/*******************************************************************************
2 STMMAC external timer Header File.
3
4 Copyright (C) 2007-2009 STMicroelectronics Ltd
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
23*******************************************************************************/
24
25struct stmmac_timer {
26 void (*timer_start) (unsigned int new_freq);
27 void (*timer_stop) (void);
28 unsigned int freq;
29};
30
31/* Open the HW timer device and return 0 in case of success */
32int stmmac_open_ext_timer(struct net_device *dev, struct stmmac_timer *tm);
33/* Stop the timer and release it */
34int stmmac_close_ext_timer(void);
35/* Function used for scheduling task within the stmmac */
36void stmmac_schedule(struct net_device *dev);
37
38#if defined(CONFIG_STMMAC_TMU_TIMER)
39extern int tmu2_register_user(void *fnt, void *data);
40extern void tmu2_unregister_user(void);
41#endif
diff --git a/drivers/net/sungem.c b/drivers/net/sungem.c
index 7019a0d1a82b..61640b99b705 100644
--- a/drivers/net/sungem.c
+++ b/drivers/net/sungem.c
@@ -2063,7 +2063,15 @@ static int gem_check_invariants(struct gem *gp)
2063 mif_cfg &= ~MIF_CFG_PSELECT; 2063 mif_cfg &= ~MIF_CFG_PSELECT;
2064 writel(mif_cfg, gp->regs + MIF_CFG); 2064 writel(mif_cfg, gp->regs + MIF_CFG);
2065 } else { 2065 } else {
2066 gp->phy_type = phy_serialink; 2066#ifdef CONFIG_SPARC
2067 const char *p;
2068
2069 p = of_get_property(gp->of_node, "shared-pins", NULL);
2070 if (p && !strcmp(p, "serdes"))
2071 gp->phy_type = phy_serdes;
2072 else
2073#endif
2074 gp->phy_type = phy_serialink;
2067 } 2075 }
2068 if (gp->phy_type == phy_mii_mdio1 || 2076 if (gp->phy_type == phy_mii_mdio1 ||
2069 gp->phy_type == phy_mii_mdio0) { 2077 gp->phy_type == phy_mii_mdio0) {
diff --git a/drivers/net/tokenring/ibmtr.c b/drivers/net/tokenring/ibmtr.c
index 36cb2423bcf1..75fa32e34fd0 100644
--- a/drivers/net/tokenring/ibmtr.c
+++ b/drivers/net/tokenring/ibmtr.c
@@ -1144,9 +1144,16 @@ static void dir_open_adapter (struct net_device *dev)
1144 } else { 1144 } else {
1145 char **prphase = printphase; 1145 char **prphase = printphase;
1146 char **prerror = printerror; 1146 char **prerror = printerror;
1147 int pnr = err / 16 - 1;
1148 int enr = err % 16 - 1;
1147 DPRINTK("TR Adapter misc open failure, error code = "); 1149 DPRINTK("TR Adapter misc open failure, error code = ");
1148 printk("0x%x, Phase: %s, Error: %s\n", 1150 if (pnr < 0 || pnr >= ARRAY_SIZE(printphase) ||
1149 err, prphase[err/16 -1], prerror[err%16 -1]); 1151 enr < 0 ||
1152 enr >= ARRAY_SIZE(printerror))
1153 printk("0x%x, invalid Phase/Error.", err);
1154 else
1155 printk("0x%x, Phase: %s, Error: %s\n", err,
1156 prphase[pnr], prerror[enr]);
1150 printk(" retrying after %ds delay...\n", 1157 printk(" retrying after %ds delay...\n",
1151 TR_RETRY_INTERVAL/HZ); 1158 TR_RETRY_INTERVAL/HZ);
1152 } 1159 }
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index c47237c2d638..32d93564a74d 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -174,7 +174,7 @@ config USB_NET_CDCETHER
174 * Ericsson Mobile Broadband Module (all variants) 174 * Ericsson Mobile Broadband Module (all variants)
175 * Motorola (DM100 and SB4100) 175 * Motorola (DM100 and SB4100)
176 * Broadcom Cable Modem (reference design) 176 * Broadcom Cable Modem (reference design)
177 * Toshiba (PCX1100U and F3507g) 177 * Toshiba (PCX1100U and F3507g/F3607gw)
178 * ... 178 * ...
179 179
180 This driver creates an interface named "ethX", where X depends on 180 This driver creates an interface named "ethX", where X depends on
diff --git a/drivers/net/usb/cdc_ether.c b/drivers/net/usb/cdc_ether.c
index 4a6aff579403..21e1ba160008 100644
--- a/drivers/net/usb/cdc_ether.c
+++ b/drivers/net/usb/cdc_ether.c
@@ -544,20 +544,60 @@ static const struct usb_device_id products [] = {
544 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 544 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
545 .driver_info = (unsigned long) &cdc_info, 545 .driver_info = (unsigned long) &cdc_info,
546}, { 546}, {
547 /* Ericsson F3307 */ 547 /* Ericsson F3607gw ver 2 */
548 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1905, USB_CLASS_COMM,
549 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
550 .driver_info = (unsigned long) &cdc_info,
551}, {
552 /* Ericsson F3607gw ver 3 */
548 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM, 553 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1906, USB_CLASS_COMM,
549 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 554 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
550 .driver_info = (unsigned long) &cdc_info, 555 .driver_info = (unsigned long) &cdc_info,
551}, { 556}, {
557 /* Ericsson F3307 */
558 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x190a, USB_CLASS_COMM,
559 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
560 .driver_info = (unsigned long) &cdc_info,
561}, {
562 /* Ericsson F3307 ver 2 */
563 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1909, USB_CLASS_COMM,
564 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
565 .driver_info = (unsigned long) &cdc_info,
566}, {
567 /* Ericsson C3607w */
568 USB_DEVICE_AND_INTERFACE_INFO(0x0bdb, 0x1049, USB_CLASS_COMM,
569 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
570 .driver_info = (unsigned long) &cdc_info,
571}, {
552 /* Toshiba F3507g */ 572 /* Toshiba F3507g */
553 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM, 573 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130b, USB_CLASS_COMM,
554 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 574 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
555 .driver_info = (unsigned long) &cdc_info, 575 .driver_info = (unsigned long) &cdc_info,
556}, { 576}, {
577 /* Toshiba F3607gw */
578 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x130c, USB_CLASS_COMM,
579 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
580 .driver_info = (unsigned long) &cdc_info,
581}, {
582 /* Toshiba F3607gw ver 2 */
583 USB_DEVICE_AND_INTERFACE_INFO(0x0930, 0x1311, USB_CLASS_COMM,
584 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
585 .driver_info = (unsigned long) &cdc_info,
586}, {
557 /* Dell F3507g */ 587 /* Dell F3507g */
558 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM, 588 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8147, USB_CLASS_COMM,
559 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE), 589 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
560 .driver_info = (unsigned long) &cdc_info, 590 .driver_info = (unsigned long) &cdc_info,
591}, {
592 /* Dell F3607gw */
593 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8183, USB_CLASS_COMM,
594 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
595 .driver_info = (unsigned long) &cdc_info,
596}, {
597 /* Dell F3607gw ver 2 */
598 USB_DEVICE_AND_INTERFACE_INFO(0x413c, 0x8184, USB_CLASS_COMM,
599 USB_CDC_SUBCLASS_MDLM, USB_CDC_PROTO_NONE),
600 .driver_info = (unsigned long) &cdc_info,
561}, 601},
562 { }, // END 602 { }, // END
563}; 603};
diff --git a/drivers/net/usb/dm9601.c b/drivers/net/usb/dm9601.c
index 72470f77f556..a2b30a10064f 100644
--- a/drivers/net/usb/dm9601.c
+++ b/drivers/net/usb/dm9601.c
@@ -649,6 +649,10 @@ static const struct usb_device_id products[] = {
649 USB_DEVICE(0x0fe6, 0x8101), /* DM9601 USB to Fast Ethernet Adapter */ 649 USB_DEVICE(0x0fe6, 0x8101), /* DM9601 USB to Fast Ethernet Adapter */
650 .driver_info = (unsigned long)&dm9601_info, 650 .driver_info = (unsigned long)&dm9601_info,
651 }, 651 },
652 {
653 USB_DEVICE(0x0a46, 0x9000), /* DM9000E */
654 .driver_info = (unsigned long)&dm9601_info,
655 },
652 {}, // END 656 {}, // END
653}; 657};
654 658
diff --git a/drivers/net/usb/pegasus.c b/drivers/net/usb/pegasus.c
index 6fdaba8674b9..ed4a508ef262 100644
--- a/drivers/net/usb/pegasus.c
+++ b/drivers/net/usb/pegasus.c
@@ -62,8 +62,11 @@ static char *devid=NULL;
62static struct usb_eth_dev usb_dev_id[] = { 62static struct usb_eth_dev usb_dev_id[] = {
63#define PEGASUS_DEV(pn, vid, pid, flags) \ 63#define PEGASUS_DEV(pn, vid, pid, flags) \
64 {.name = pn, .vendor = vid, .device = pid, .private = flags}, 64 {.name = pn, .vendor = vid, .device = pid, .private = flags},
65#define PEGASUS_DEV_CLASS(pn, vid, pid, dclass, flags) \
66 PEGASUS_DEV(pn, vid, pid, flags)
65#include "pegasus.h" 67#include "pegasus.h"
66#undef PEGASUS_DEV 68#undef PEGASUS_DEV
69#undef PEGASUS_DEV_CLASS
67 {NULL, 0, 0, 0}, 70 {NULL, 0, 0, 0},
68 {NULL, 0, 0, 0} 71 {NULL, 0, 0, 0}
69}; 72};
@@ -71,8 +74,18 @@ static struct usb_eth_dev usb_dev_id[] = {
71static struct usb_device_id pegasus_ids[] = { 74static struct usb_device_id pegasus_ids[] = {
72#define PEGASUS_DEV(pn, vid, pid, flags) \ 75#define PEGASUS_DEV(pn, vid, pid, flags) \
73 {.match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = vid, .idProduct = pid}, 76 {.match_flags = USB_DEVICE_ID_MATCH_DEVICE, .idVendor = vid, .idProduct = pid},
77/*
78 * The Belkin F8T012xx1 bluetooth adaptor has the same vendor and product
79 * IDs as the Belkin F5D5050, so we need to teach the pegasus driver to
80 * ignore adaptors belonging to the "Wireless" class 0xE0. For this one
81 * case anyway, seeing as the pegasus is for "Wired" adaptors.
82 */
83#define PEGASUS_DEV_CLASS(pn, vid, pid, dclass, flags) \
84 {.match_flags = (USB_DEVICE_ID_MATCH_DEVICE | USB_DEVICE_ID_MATCH_DEV_CLASS), \
85 .idVendor = vid, .idProduct = pid, .bDeviceClass = dclass},
74#include "pegasus.h" 86#include "pegasus.h"
75#undef PEGASUS_DEV 87#undef PEGASUS_DEV
88#undef PEGASUS_DEV_CLASS
76 {}, 89 {},
77 {} 90 {}
78}; 91};
diff --git a/drivers/net/usb/pegasus.h b/drivers/net/usb/pegasus.h
index f968c834ff63..5d02f0200737 100644
--- a/drivers/net/usb/pegasus.h
+++ b/drivers/net/usb/pegasus.h
@@ -202,7 +202,11 @@ PEGASUS_DEV( "AEI USB Fast Ethernet Adapter", VENDOR_AEILAB, 0x1701,
202 DEFAULT_GPIO_RESET | PEGASUS_II ) 202 DEFAULT_GPIO_RESET | PEGASUS_II )
203PEGASUS_DEV( "Allied Telesyn Int. AT-USB100", VENDOR_ALLIEDTEL, 0xb100, 203PEGASUS_DEV( "Allied Telesyn Int. AT-USB100", VENDOR_ALLIEDTEL, 0xb100,
204 DEFAULT_GPIO_RESET | PEGASUS_II ) 204 DEFAULT_GPIO_RESET | PEGASUS_II )
205PEGASUS_DEV( "Belkin F5D5050 USB Ethernet", VENDOR_BELKIN, 0x0121, 205/*
206 * Distinguish between this Belkin adaptor and the Belkin bluetooth adaptors
207 * with the same product IDs by checking the device class too.
208 */
209PEGASUS_DEV_CLASS( "Belkin F5D5050 USB Ethernet", VENDOR_BELKIN, 0x0121, 0x00,
206 DEFAULT_GPIO_RESET | PEGASUS_II ) 210 DEFAULT_GPIO_RESET | PEGASUS_II )
207PEGASUS_DEV( "Billionton USB-100", VENDOR_BILLIONTON, 0x0986, 211PEGASUS_DEV( "Billionton USB-100", VENDOR_BILLIONTON, 0x0986,
208 DEFAULT_GPIO_RESET ) 212 DEFAULT_GPIO_RESET )
diff --git a/drivers/net/usb/rndis_host.c b/drivers/net/usb/rndis_host.c
index 0caa8008c51c..f56dec6119c3 100644
--- a/drivers/net/usb/rndis_host.c
+++ b/drivers/net/usb/rndis_host.c
@@ -362,12 +362,12 @@ generic_rndis_bind(struct usbnet *dev, struct usb_interface *intf, int flags)
362 retval = -EINVAL; 362 retval = -EINVAL;
363 goto halt_fail_and_release; 363 goto halt_fail_and_release;
364 } 364 }
365 dev->hard_mtu = tmp;
366 net->mtu = dev->hard_mtu - net->hard_header_len;
367 dev_warn(&intf->dev, 365 dev_warn(&intf->dev,
368 "dev can't take %u byte packets (max %u), " 366 "dev can't take %u byte packets (max %u), "
369 "adjusting MTU to %u\n", 367 "adjusting MTU to %u\n",
370 dev->hard_mtu, tmp, net->mtu); 368 dev->hard_mtu, tmp, tmp - net->hard_header_len);
369 dev->hard_mtu = tmp;
370 net->mtu = dev->hard_mtu - net->hard_header_len;
371 } 371 }
372 372
373 /* REVISIT: peripheral "alignment" request is ignored ... */ 373 /* REVISIT: peripheral "alignment" request is ignored ... */
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index 8d009760277c..b9e002fccbca 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -22,7 +22,6 @@
22#include <linux/ethtool.h> 22#include <linux/ethtool.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/virtio.h> 24#include <linux/virtio.h>
25#include <linux/virtio_ids.h>
26#include <linux/virtio_net.h> 25#include <linux/virtio_net.h>
27#include <linux/scatterlist.h> 26#include <linux/scatterlist.h>
28#include <linux/if_vlan.h> 27#include <linux/if_vlan.h>
@@ -454,7 +453,7 @@ static unsigned int free_old_xmit_skbs(struct virtnet_info *vi)
454 vi->dev->stats.tx_bytes += skb->len; 453 vi->dev->stats.tx_bytes += skb->len;
455 vi->dev->stats.tx_packets++; 454 vi->dev->stats.tx_packets++;
456 tot_sgs += skb_vnet_hdr(skb)->num_sg; 455 tot_sgs += skb_vnet_hdr(skb)->num_sg;
457 kfree_skb(skb); 456 dev_kfree_skb_any(skb);
458 } 457 }
459 return tot_sgs; 458 return tot_sgs;
460} 459}
@@ -517,8 +516,7 @@ again:
517 /* Free up any pending old buffers before queueing new ones. */ 516 /* Free up any pending old buffers before queueing new ones. */
518 free_old_xmit_skbs(vi); 517 free_old_xmit_skbs(vi);
519 518
520 /* Put new one in send queue and do transmit */ 519 /* Try to transmit */
521 __skb_queue_head(&vi->send, skb);
522 capacity = xmit_skb(vi, skb); 520 capacity = xmit_skb(vi, skb);
523 521
524 /* This can happen with OOM and indirect buffers. */ 522 /* This can happen with OOM and indirect buffers. */
@@ -532,8 +530,17 @@ again:
532 } 530 }
533 return NETDEV_TX_BUSY; 531 return NETDEV_TX_BUSY;
534 } 532 }
535
536 vi->svq->vq_ops->kick(vi->svq); 533 vi->svq->vq_ops->kick(vi->svq);
534
535 /*
536 * Put new one in send queue. You'd expect we'd need this before
537 * xmit_skb calls add_buf(), since the callback can be triggered
538 * immediately after that. But since the callback just triggers
539 * another call back here, normal network xmit locking prevents the
540 * race.
541 */
542 __skb_queue_head(&vi->send, skb);
543
537 /* Don't wait up for transmitted skbs to be freed. */ 544 /* Don't wait up for transmitted skbs to be freed. */
538 skb_orphan(skb); 545 skb_orphan(skb);
539 nf_reset(skb); 546 nf_reset(skb);
@@ -991,7 +998,7 @@ static unsigned int features[] = {
991 VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN, 998 VIRTIO_NET_F_CTRL_RX, VIRTIO_NET_F_CTRL_VLAN,
992}; 999};
993 1000
994static struct virtio_driver virtio_net = { 1001static struct virtio_driver virtio_net_driver = {
995 .feature_table = features, 1002 .feature_table = features,
996 .feature_table_size = ARRAY_SIZE(features), 1003 .feature_table_size = ARRAY_SIZE(features),
997 .driver.name = KBUILD_MODNAME, 1004 .driver.name = KBUILD_MODNAME,
@@ -1004,12 +1011,12 @@ static struct virtio_driver virtio_net = {
1004 1011
1005static int __init init(void) 1012static int __init init(void)
1006{ 1013{
1007 return register_virtio_driver(&virtio_net); 1014 return register_virtio_driver(&virtio_net_driver);
1008} 1015}
1009 1016
1010static void __exit fini(void) 1017static void __exit fini(void)
1011{ 1018{
1012 unregister_virtio_driver(&virtio_net); 1019 unregister_virtio_driver(&virtio_net_driver);
1013} 1020}
1014module_init(init); 1021module_init(init);
1015module_exit(fini); 1022module_exit(fini);
diff --git a/drivers/net/vmxnet3/Makefile b/drivers/net/vmxnet3/Makefile
new file mode 100644
index 000000000000..880f5098eac9
--- /dev/null
+++ b/drivers/net/vmxnet3/Makefile
@@ -0,0 +1,35 @@
1################################################################################
2#
3# Linux driver for VMware's vmxnet3 ethernet NIC.
4#
5# Copyright (C) 2007-2009, VMware, Inc. All Rights Reserved.
6#
7# This program is free software; you can redistribute it and/or modify it
8# under the terms of the GNU General Public License as published by the
9# Free Software Foundation; version 2 of the License and no later version.
10#
11# This program is distributed in the hope that it will be useful, but
12# WITHOUT ANY WARRANTY; without even the implied warranty of
13# MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
14# NON INFRINGEMENT. See the GNU General Public License for more
15# details.
16#
17# You should have received a copy of the GNU General Public License
18# along with this program; if not, write to the Free Software
19# Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
20#
21# The full GNU General Public License is included in this distribution in
22# the file called "COPYING".
23#
24# Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
25#
26#
27################################################################################
28
29#
30# Makefile for the VMware vmxnet3 ethernet NIC driver
31#
32
33obj-$(CONFIG_VMXNET3) += vmxnet3.o
34
35vmxnet3-objs := vmxnet3_drv.o vmxnet3_ethtool.o
diff --git a/drivers/net/vmxnet3/upt1_defs.h b/drivers/net/vmxnet3/upt1_defs.h
new file mode 100644
index 000000000000..37108fb226d3
--- /dev/null
+++ b/drivers/net/vmxnet3/upt1_defs.h
@@ -0,0 +1,96 @@
1/*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24 *
25 */
26
27#ifndef _UPT1_DEFS_H
28#define _UPT1_DEFS_H
29
30struct UPT1_TxStats {
31 u64 TSOPktsTxOK; /* TSO pkts post-segmentation */
32 u64 TSOBytesTxOK;
33 u64 ucastPktsTxOK;
34 u64 ucastBytesTxOK;
35 u64 mcastPktsTxOK;
36 u64 mcastBytesTxOK;
37 u64 bcastPktsTxOK;
38 u64 bcastBytesTxOK;
39 u64 pktsTxError;
40 u64 pktsTxDiscard;
41};
42
43struct UPT1_RxStats {
44 u64 LROPktsRxOK; /* LRO pkts */
45 u64 LROBytesRxOK; /* bytes from LRO pkts */
46 /* the following counters are for pkts from the wire, i.e., pre-LRO */
47 u64 ucastPktsRxOK;
48 u64 ucastBytesRxOK;
49 u64 mcastPktsRxOK;
50 u64 mcastBytesRxOK;
51 u64 bcastPktsRxOK;
52 u64 bcastBytesRxOK;
53 u64 pktsRxOutOfBuf;
54 u64 pktsRxError;
55};
56
57/* interrupt moderation level */
58enum {
59 UPT1_IML_NONE = 0, /* no interrupt moderation */
60 UPT1_IML_HIGHEST = 7, /* least intr generated */
61 UPT1_IML_ADAPTIVE = 8, /* adpative intr moderation */
62};
63/* values for UPT1_RSSConf.hashFunc */
64enum {
65 UPT1_RSS_HASH_TYPE_NONE = 0x0,
66 UPT1_RSS_HASH_TYPE_IPV4 = 0x01,
67 UPT1_RSS_HASH_TYPE_TCP_IPV4 = 0x02,
68 UPT1_RSS_HASH_TYPE_IPV6 = 0x04,
69 UPT1_RSS_HASH_TYPE_TCP_IPV6 = 0x08,
70};
71
72enum {
73 UPT1_RSS_HASH_FUNC_NONE = 0x0,
74 UPT1_RSS_HASH_FUNC_TOEPLITZ = 0x01,
75};
76
77#define UPT1_RSS_MAX_KEY_SIZE 40
78#define UPT1_RSS_MAX_IND_TABLE_SIZE 128
79
80struct UPT1_RSSConf {
81 u16 hashType;
82 u16 hashFunc;
83 u16 hashKeySize;
84 u16 indTableSize;
85 u8 hashKey[UPT1_RSS_MAX_KEY_SIZE];
86 u8 indTable[UPT1_RSS_MAX_IND_TABLE_SIZE];
87};
88
89/* features */
90enum {
91 UPT1_F_RXCSUM = 0x0001, /* rx csum verification */
92 UPT1_F_RSS = 0x0002,
93 UPT1_F_RXVLAN = 0x0004, /* VLAN tag stripping */
94 UPT1_F_LRO = 0x0008,
95};
96#endif
diff --git a/drivers/net/vmxnet3/vmxnet3_defs.h b/drivers/net/vmxnet3/vmxnet3_defs.h
new file mode 100644
index 000000000000..dc8ee4438a4f
--- /dev/null
+++ b/drivers/net/vmxnet3/vmxnet3_defs.h
@@ -0,0 +1,535 @@
1/*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24 *
25 */
26
27#ifndef _VMXNET3_DEFS_H_
28#define _VMXNET3_DEFS_H_
29
30#include "upt1_defs.h"
31
32/* all registers are 32 bit wide */
33/* BAR 1 */
34enum {
35 VMXNET3_REG_VRRS = 0x0, /* Vmxnet3 Revision Report Selection */
36 VMXNET3_REG_UVRS = 0x8, /* UPT Version Report Selection */
37 VMXNET3_REG_DSAL = 0x10, /* Driver Shared Address Low */
38 VMXNET3_REG_DSAH = 0x18, /* Driver Shared Address High */
39 VMXNET3_REG_CMD = 0x20, /* Command */
40 VMXNET3_REG_MACL = 0x28, /* MAC Address Low */
41 VMXNET3_REG_MACH = 0x30, /* MAC Address High */
42 VMXNET3_REG_ICR = 0x38, /* Interrupt Cause Register */
43 VMXNET3_REG_ECR = 0x40 /* Event Cause Register */
44};
45
46/* BAR 0 */
47enum {
48 VMXNET3_REG_IMR = 0x0, /* Interrupt Mask Register */
49 VMXNET3_REG_TXPROD = 0x600, /* Tx Producer Index */
50 VMXNET3_REG_RXPROD = 0x800, /* Rx Producer Index for ring 1 */
51 VMXNET3_REG_RXPROD2 = 0xA00 /* Rx Producer Index for ring 2 */
52};
53
54#define VMXNET3_PT_REG_SIZE 4096 /* BAR 0 */
55#define VMXNET3_VD_REG_SIZE 4096 /* BAR 1 */
56
57#define VMXNET3_REG_ALIGN 8 /* All registers are 8-byte aligned. */
58#define VMXNET3_REG_ALIGN_MASK 0x7
59
60/* I/O Mapped access to registers */
61#define VMXNET3_IO_TYPE_PT 0
62#define VMXNET3_IO_TYPE_VD 1
63#define VMXNET3_IO_ADDR(type, reg) (((type) << 24) | ((reg) & 0xFFFFFF))
64#define VMXNET3_IO_TYPE(addr) ((addr) >> 24)
65#define VMXNET3_IO_REG(addr) ((addr) & 0xFFFFFF)
66
67enum {
68 VMXNET3_CMD_FIRST_SET = 0xCAFE0000,
69 VMXNET3_CMD_ACTIVATE_DEV = VMXNET3_CMD_FIRST_SET,
70 VMXNET3_CMD_QUIESCE_DEV,
71 VMXNET3_CMD_RESET_DEV,
72 VMXNET3_CMD_UPDATE_RX_MODE,
73 VMXNET3_CMD_UPDATE_MAC_FILTERS,
74 VMXNET3_CMD_UPDATE_VLAN_FILTERS,
75 VMXNET3_CMD_UPDATE_RSSIDT,
76 VMXNET3_CMD_UPDATE_IML,
77 VMXNET3_CMD_UPDATE_PMCFG,
78 VMXNET3_CMD_UPDATE_FEATURE,
79 VMXNET3_CMD_LOAD_PLUGIN,
80
81 VMXNET3_CMD_FIRST_GET = 0xF00D0000,
82 VMXNET3_CMD_GET_QUEUE_STATUS = VMXNET3_CMD_FIRST_GET,
83 VMXNET3_CMD_GET_STATS,
84 VMXNET3_CMD_GET_LINK,
85 VMXNET3_CMD_GET_PERM_MAC_LO,
86 VMXNET3_CMD_GET_PERM_MAC_HI,
87 VMXNET3_CMD_GET_DID_LO,
88 VMXNET3_CMD_GET_DID_HI,
89 VMXNET3_CMD_GET_DEV_EXTRA_INFO,
90 VMXNET3_CMD_GET_CONF_INTR
91};
92
93struct Vmxnet3_TxDesc {
94 u64 addr;
95
96 u32 len:14;
97 u32 gen:1; /* generation bit */
98 u32 rsvd:1;
99 u32 dtype:1; /* descriptor type */
100 u32 ext1:1;
101 u32 msscof:14; /* MSS, checksum offset, flags */
102
103 u32 hlen:10; /* header len */
104 u32 om:2; /* offload mode */
105 u32 eop:1; /* End Of Packet */
106 u32 cq:1; /* completion request */
107 u32 ext2:1;
108 u32 ti:1; /* VLAN Tag Insertion */
109 u32 tci:16; /* Tag to Insert */
110};
111
112/* TxDesc.OM values */
113#define VMXNET3_OM_NONE 0
114#define VMXNET3_OM_CSUM 2
115#define VMXNET3_OM_TSO 3
116
117/* fields in TxDesc we access w/o using bit fields */
118#define VMXNET3_TXD_EOP_SHIFT 12
119#define VMXNET3_TXD_CQ_SHIFT 13
120#define VMXNET3_TXD_GEN_SHIFT 14
121
122#define VMXNET3_TXD_CQ (1 << VMXNET3_TXD_CQ_SHIFT)
123#define VMXNET3_TXD_EOP (1 << VMXNET3_TXD_EOP_SHIFT)
124#define VMXNET3_TXD_GEN (1 << VMXNET3_TXD_GEN_SHIFT)
125
126#define VMXNET3_HDR_COPY_SIZE 128
127
128
129struct Vmxnet3_TxDataDesc {
130 u8 data[VMXNET3_HDR_COPY_SIZE];
131};
132
133
134struct Vmxnet3_TxCompDesc {
135 u32 txdIdx:12; /* Index of the EOP TxDesc */
136 u32 ext1:20;
137
138 u32 ext2;
139 u32 ext3;
140
141 u32 rsvd:24;
142 u32 type:7; /* completion type */
143 u32 gen:1; /* generation bit */
144};
145
146
147struct Vmxnet3_RxDesc {
148 u64 addr;
149
150 u32 len:14;
151 u32 btype:1; /* Buffer Type */
152 u32 dtype:1; /* Descriptor type */
153 u32 rsvd:15;
154 u32 gen:1; /* Generation bit */
155
156 u32 ext1;
157};
158
159/* values of RXD.BTYPE */
160#define VMXNET3_RXD_BTYPE_HEAD 0 /* head only */
161#define VMXNET3_RXD_BTYPE_BODY 1 /* body only */
162
163/* fields in RxDesc we access w/o using bit fields */
164#define VMXNET3_RXD_BTYPE_SHIFT 14
165#define VMXNET3_RXD_GEN_SHIFT 31
166
167
168struct Vmxnet3_RxCompDesc {
169 u32 rxdIdx:12; /* Index of the RxDesc */
170 u32 ext1:2;
171 u32 eop:1; /* End of Packet */
172 u32 sop:1; /* Start of Packet */
173 u32 rqID:10; /* rx queue/ring ID */
174 u32 rssType:4; /* RSS hash type used */
175 u32 cnc:1; /* Checksum Not Calculated */
176 u32 ext2:1;
177
178 u32 rssHash; /* RSS hash value */
179
180 u32 len:14; /* data length */
181 u32 err:1; /* Error */
182 u32 ts:1; /* Tag is stripped */
183 u32 tci:16; /* Tag stripped */
184
185 u32 csum:16;
186 u32 tuc:1; /* TCP/UDP Checksum Correct */
187 u32 udp:1; /* UDP packet */
188 u32 tcp:1; /* TCP packet */
189 u32 ipc:1; /* IP Checksum Correct */
190 u32 v6:1; /* IPv6 */
191 u32 v4:1; /* IPv4 */
192 u32 frg:1; /* IP Fragment */
193 u32 fcs:1; /* Frame CRC correct */
194 u32 type:7; /* completion type */
195 u32 gen:1; /* generation bit */
196};
197
198/* fields in RxCompDesc we access via Vmxnet3_GenericDesc.dword[3] */
199#define VMXNET3_RCD_TUC_SHIFT 16
200#define VMXNET3_RCD_IPC_SHIFT 19
201
202/* fields in RxCompDesc we access via Vmxnet3_GenericDesc.qword[1] */
203#define VMXNET3_RCD_TYPE_SHIFT 56
204#define VMXNET3_RCD_GEN_SHIFT 63
205
206/* csum OK for TCP/UDP pkts over IP */
207#define VMXNET3_RCD_CSUM_OK (1 << VMXNET3_RCD_TUC_SHIFT | \
208 1 << VMXNET3_RCD_IPC_SHIFT)
209
210/* value of RxCompDesc.rssType */
211enum {
212 VMXNET3_RCD_RSS_TYPE_NONE = 0,
213 VMXNET3_RCD_RSS_TYPE_IPV4 = 1,
214 VMXNET3_RCD_RSS_TYPE_TCPIPV4 = 2,
215 VMXNET3_RCD_RSS_TYPE_IPV6 = 3,
216 VMXNET3_RCD_RSS_TYPE_TCPIPV6 = 4,
217};
218
219
220/* a union for accessing all cmd/completion descriptors */
221union Vmxnet3_GenericDesc {
222 u64 qword[2];
223 u32 dword[4];
224 u16 word[8];
225 struct Vmxnet3_TxDesc txd;
226 struct Vmxnet3_RxDesc rxd;
227 struct Vmxnet3_TxCompDesc tcd;
228 struct Vmxnet3_RxCompDesc rcd;
229};
230
231#define VMXNET3_INIT_GEN 1
232
233/* Max size of a single tx buffer */
234#define VMXNET3_MAX_TX_BUF_SIZE (1 << 14)
235
236/* # of tx desc needed for a tx buffer size */
237#define VMXNET3_TXD_NEEDED(size) (((size) + VMXNET3_MAX_TX_BUF_SIZE - 1) / \
238 VMXNET3_MAX_TX_BUF_SIZE)
239
240/* max # of tx descs for a non-tso pkt */
241#define VMXNET3_MAX_TXD_PER_PKT 16
242
243/* Max size of a single rx buffer */
244#define VMXNET3_MAX_RX_BUF_SIZE ((1 << 14) - 1)
245/* Minimum size of a type 0 buffer */
246#define VMXNET3_MIN_T0_BUF_SIZE 128
247#define VMXNET3_MAX_CSUM_OFFSET 1024
248
249/* Ring base address alignment */
250#define VMXNET3_RING_BA_ALIGN 512
251#define VMXNET3_RING_BA_MASK (VMXNET3_RING_BA_ALIGN - 1)
252
253/* Ring size must be a multiple of 32 */
254#define VMXNET3_RING_SIZE_ALIGN 32
255#define VMXNET3_RING_SIZE_MASK (VMXNET3_RING_SIZE_ALIGN - 1)
256
257/* Max ring size */
258#define VMXNET3_TX_RING_MAX_SIZE 4096
259#define VMXNET3_TC_RING_MAX_SIZE 4096
260#define VMXNET3_RX_RING_MAX_SIZE 4096
261#define VMXNET3_RC_RING_MAX_SIZE 8192
262
263/* a list of reasons for queue stop */
264
265enum {
266 VMXNET3_ERR_NOEOP = 0x80000000, /* cannot find the EOP desc of a pkt */
267 VMXNET3_ERR_TXD_REUSE = 0x80000001, /* reuse TxDesc before tx completion */
268 VMXNET3_ERR_BIG_PKT = 0x80000002, /* too many TxDesc for a pkt */
269 VMXNET3_ERR_DESC_NOT_SPT = 0x80000003, /* descriptor type not supported */
270 VMXNET3_ERR_SMALL_BUF = 0x80000004, /* type 0 buffer too small */
271 VMXNET3_ERR_STRESS = 0x80000005, /* stress option firing in vmkernel */
272 VMXNET3_ERR_SWITCH = 0x80000006, /* mode switch failure */
273 VMXNET3_ERR_TXD_INVALID = 0x80000007, /* invalid TxDesc */
274};
275
276/* completion descriptor types */
277#define VMXNET3_CDTYPE_TXCOMP 0 /* Tx Completion Descriptor */
278#define VMXNET3_CDTYPE_RXCOMP 3 /* Rx Completion Descriptor */
279
280enum {
281 VMXNET3_GOS_BITS_UNK = 0, /* unknown */
282 VMXNET3_GOS_BITS_32 = 1,
283 VMXNET3_GOS_BITS_64 = 2,
284};
285
286#define VMXNET3_GOS_TYPE_LINUX 1
287
288
289struct Vmxnet3_GOSInfo {
290 u32 gosBits:2; /* 32-bit or 64-bit? */
291 u32 gosType:4; /* which guest */
292 u32 gosVer:16; /* gos version */
293 u32 gosMisc:10; /* other info about gos */
294};
295
296
297struct Vmxnet3_DriverInfo {
298 u32 version;
299 struct Vmxnet3_GOSInfo gos;
300 u32 vmxnet3RevSpt;
301 u32 uptVerSpt;
302};
303
304
305#define VMXNET3_REV1_MAGIC 0xbabefee1
306
307/*
308 * QueueDescPA must be 128 bytes aligned. It points to an array of
309 * Vmxnet3_TxQueueDesc followed by an array of Vmxnet3_RxQueueDesc.
310 * The number of Vmxnet3_TxQueueDesc/Vmxnet3_RxQueueDesc are specified by
311 * Vmxnet3_MiscConf.numTxQueues/numRxQueues, respectively.
312 */
313#define VMXNET3_QUEUE_DESC_ALIGN 128
314
315
316struct Vmxnet3_MiscConf {
317 struct Vmxnet3_DriverInfo driverInfo;
318 u64 uptFeatures;
319 u64 ddPA; /* driver data PA */
320 u64 queueDescPA; /* queue descriptor table PA */
321 u32 ddLen; /* driver data len */
322 u32 queueDescLen; /* queue desc. table len in bytes */
323 u32 mtu;
324 u16 maxNumRxSG;
325 u8 numTxQueues;
326 u8 numRxQueues;
327 u32 reserved[4];
328};
329
330
331struct Vmxnet3_TxQueueConf {
332 u64 txRingBasePA;
333 u64 dataRingBasePA;
334 u64 compRingBasePA;
335 u64 ddPA; /* driver data */
336 u64 reserved;
337 u32 txRingSize; /* # of tx desc */
338 u32 dataRingSize; /* # of data desc */
339 u32 compRingSize; /* # of comp desc */
340 u32 ddLen; /* size of driver data */
341 u8 intrIdx;
342 u8 _pad[7];
343};
344
345
346struct Vmxnet3_RxQueueConf {
347 u64 rxRingBasePA[2];
348 u64 compRingBasePA;
349 u64 ddPA; /* driver data */
350 u64 reserved;
351 u32 rxRingSize[2]; /* # of rx desc */
352 u32 compRingSize; /* # of rx comp desc */
353 u32 ddLen; /* size of driver data */
354 u8 intrIdx;
355 u8 _pad[7];
356};
357
358
359enum vmxnet3_intr_mask_mode {
360 VMXNET3_IMM_AUTO = 0,
361 VMXNET3_IMM_ACTIVE = 1,
362 VMXNET3_IMM_LAZY = 2
363};
364
365enum vmxnet3_intr_type {
366 VMXNET3_IT_AUTO = 0,
367 VMXNET3_IT_INTX = 1,
368 VMXNET3_IT_MSI = 2,
369 VMXNET3_IT_MSIX = 3
370};
371
372#define VMXNET3_MAX_TX_QUEUES 8
373#define VMXNET3_MAX_RX_QUEUES 16
374/* addition 1 for events */
375#define VMXNET3_MAX_INTRS 25
376
377
378struct Vmxnet3_IntrConf {
379 bool autoMask;
380 u8 numIntrs; /* # of interrupts */
381 u8 eventIntrIdx;
382 u8 modLevels[VMXNET3_MAX_INTRS]; /* moderation level for
383 * each intr */
384 u32 reserved[3];
385};
386
387/* one bit per VLAN ID, the size is in the units of u32 */
388#define VMXNET3_VFT_SIZE (4096 / (sizeof(u32) * 8))
389
390
391struct Vmxnet3_QueueStatus {
392 bool stopped;
393 u8 _pad[3];
394 u32 error;
395};
396
397
398struct Vmxnet3_TxQueueCtrl {
399 u32 txNumDeferred;
400 u32 txThreshold;
401 u64 reserved;
402};
403
404
405struct Vmxnet3_RxQueueCtrl {
406 bool updateRxProd;
407 u8 _pad[7];
408 u64 reserved;
409};
410
411enum {
412 VMXNET3_RXM_UCAST = 0x01, /* unicast only */
413 VMXNET3_RXM_MCAST = 0x02, /* multicast passing the filters */
414 VMXNET3_RXM_BCAST = 0x04, /* broadcast only */
415 VMXNET3_RXM_ALL_MULTI = 0x08, /* all multicast */
416 VMXNET3_RXM_PROMISC = 0x10 /* promiscuous */
417};
418
419struct Vmxnet3_RxFilterConf {
420 u32 rxMode; /* VMXNET3_RXM_xxx */
421 u16 mfTableLen; /* size of the multicast filter table */
422 u16 _pad1;
423 u64 mfTablePA; /* PA of the multicast filters table */
424 u32 vfTable[VMXNET3_VFT_SIZE]; /* vlan filter */
425};
426
427
428#define VMXNET3_PM_MAX_FILTERS 6
429#define VMXNET3_PM_MAX_PATTERN_SIZE 128
430#define VMXNET3_PM_MAX_MASK_SIZE (VMXNET3_PM_MAX_PATTERN_SIZE / 8)
431
432#define VMXNET3_PM_WAKEUP_MAGIC 0x01 /* wake up on magic pkts */
433#define VMXNET3_PM_WAKEUP_FILTER 0x02 /* wake up on pkts matching
434 * filters */
435
436
437struct Vmxnet3_PM_PktFilter {
438 u8 maskSize;
439 u8 patternSize;
440 u8 mask[VMXNET3_PM_MAX_MASK_SIZE];
441 u8 pattern[VMXNET3_PM_MAX_PATTERN_SIZE];
442 u8 pad[6];
443};
444
445
446struct Vmxnet3_PMConf {
447 u16 wakeUpEvents; /* VMXNET3_PM_WAKEUP_xxx */
448 u8 numFilters;
449 u8 pad[5];
450 struct Vmxnet3_PM_PktFilter filters[VMXNET3_PM_MAX_FILTERS];
451};
452
453
454struct Vmxnet3_VariableLenConfDesc {
455 u32 confVer;
456 u32 confLen;
457 u64 confPA;
458};
459
460
461struct Vmxnet3_TxQueueDesc {
462 struct Vmxnet3_TxQueueCtrl ctrl;
463 struct Vmxnet3_TxQueueConf conf;
464
465 /* Driver read after a GET command */
466 struct Vmxnet3_QueueStatus status;
467 struct UPT1_TxStats stats;
468 u8 _pad[88]; /* 128 aligned */
469};
470
471
472struct Vmxnet3_RxQueueDesc {
473 struct Vmxnet3_RxQueueCtrl ctrl;
474 struct Vmxnet3_RxQueueConf conf;
475 /* Driver read after a GET commad */
476 struct Vmxnet3_QueueStatus status;
477 struct UPT1_RxStats stats;
478 u8 __pad[88]; /* 128 aligned */
479};
480
481
482struct Vmxnet3_DSDevRead {
483 /* read-only region for device, read by dev in response to a SET cmd */
484 struct Vmxnet3_MiscConf misc;
485 struct Vmxnet3_IntrConf intrConf;
486 struct Vmxnet3_RxFilterConf rxFilterConf;
487 struct Vmxnet3_VariableLenConfDesc rssConfDesc;
488 struct Vmxnet3_VariableLenConfDesc pmConfDesc;
489 struct Vmxnet3_VariableLenConfDesc pluginConfDesc;
490};
491
492/* All structures in DriverShared are padded to multiples of 8 bytes */
493struct Vmxnet3_DriverShared {
494 u32 magic;
495 /* make devRead start at 64bit boundaries */
496 u32 pad;
497 struct Vmxnet3_DSDevRead devRead;
498 u32 ecr;
499 u32 reserved[5];
500};
501
502
503#define VMXNET3_ECR_RQERR (1 << 0)
504#define VMXNET3_ECR_TQERR (1 << 1)
505#define VMXNET3_ECR_LINK (1 << 2)
506#define VMXNET3_ECR_DIC (1 << 3)
507#define VMXNET3_ECR_DEBUG (1 << 4)
508
509/* flip the gen bit of a ring */
510#define VMXNET3_FLIP_RING_GEN(gen) ((gen) = (gen) ^ 0x1)
511
512/* only use this if moving the idx won't affect the gen bit */
513#define VMXNET3_INC_RING_IDX_ONLY(idx, ring_size) \
514 do {\
515 (idx)++;\
516 if (unlikely((idx) == (ring_size))) {\
517 (idx) = 0;\
518 } \
519 } while (0)
520
521#define VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid) \
522 (vfTable[vid >> 5] |= (1 << (vid & 31)))
523#define VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid) \
524 (vfTable[vid >> 5] &= ~(1 << (vid & 31)))
525
526#define VMXNET3_VFTABLE_ENTRY_IS_SET(vfTable, vid) \
527 ((vfTable[vid >> 5] & (1 << (vid & 31))) != 0)
528
529#define VMXNET3_MAX_MTU 9000
530#define VMXNET3_MIN_MTU 60
531
532#define VMXNET3_LINK_UP (10000 << 16 | 1) /* 10 Gbps, up */
533#define VMXNET3_LINK_DOWN 0
534
535#endif /* _VMXNET3_DEFS_H_ */
diff --git a/drivers/net/vmxnet3/vmxnet3_drv.c b/drivers/net/vmxnet3/vmxnet3_drv.c
new file mode 100644
index 000000000000..004353a46af0
--- /dev/null
+++ b/drivers/net/vmxnet3/vmxnet3_drv.c
@@ -0,0 +1,2574 @@
1/*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24 *
25 */
26
27#include "vmxnet3_int.h"
28
29char vmxnet3_driver_name[] = "vmxnet3";
30#define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
31
32
33/*
34 * PCI Device ID Table
35 * Last entry must be all 0s
36 */
37static const struct pci_device_id vmxnet3_pciid_table[] = {
38 {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
39 {0}
40};
41
42MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
43
44static atomic_t devices_found;
45
46
47/*
48 * Enable/Disable the given intr
49 */
50static void
51vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
52{
53 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
54}
55
56
57static void
58vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
59{
60 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
61}
62
63
64/*
65 * Enable/Disable all intrs used by the device
66 */
67static void
68vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
69{
70 int i;
71
72 for (i = 0; i < adapter->intr.num_intrs; i++)
73 vmxnet3_enable_intr(adapter, i);
74}
75
76
77static void
78vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
79{
80 int i;
81
82 for (i = 0; i < adapter->intr.num_intrs; i++)
83 vmxnet3_disable_intr(adapter, i);
84}
85
86
87static void
88vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
89{
90 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
91}
92
93
94static bool
95vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
96{
97 return netif_queue_stopped(adapter->netdev);
98}
99
100
101static void
102vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
103{
104 tq->stopped = false;
105 netif_start_queue(adapter->netdev);
106}
107
108
109static void
110vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
111{
112 tq->stopped = false;
113 netif_wake_queue(adapter->netdev);
114}
115
116
117static void
118vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
119{
120 tq->stopped = true;
121 tq->num_stop++;
122 netif_stop_queue(adapter->netdev);
123}
124
125
126/*
127 * Check the link state. This may start or stop the tx queue.
128 */
129static void
130vmxnet3_check_link(struct vmxnet3_adapter *adapter)
131{
132 u32 ret;
133
134 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
135 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
136 adapter->link_speed = ret >> 16;
137 if (ret & 1) { /* Link is up. */
138 printk(KERN_INFO "%s: NIC Link is Up %d Mbps\n",
139 adapter->netdev->name, adapter->link_speed);
140 if (!netif_carrier_ok(adapter->netdev))
141 netif_carrier_on(adapter->netdev);
142
143 vmxnet3_tq_start(&adapter->tx_queue, adapter);
144 } else {
145 printk(KERN_INFO "%s: NIC Link is Down\n",
146 adapter->netdev->name);
147 if (netif_carrier_ok(adapter->netdev))
148 netif_carrier_off(adapter->netdev);
149
150 vmxnet3_tq_stop(&adapter->tx_queue, adapter);
151 }
152}
153
154
155static void
156vmxnet3_process_events(struct vmxnet3_adapter *adapter)
157{
158 u32 events = adapter->shared->ecr;
159 if (!events)
160 return;
161
162 vmxnet3_ack_events(adapter, events);
163
164 /* Check if link state has changed */
165 if (events & VMXNET3_ECR_LINK)
166 vmxnet3_check_link(adapter);
167
168 /* Check if there is an error on xmit/recv queues */
169 if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
170 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
171 VMXNET3_CMD_GET_QUEUE_STATUS);
172
173 if (adapter->tqd_start->status.stopped) {
174 printk(KERN_ERR "%s: tq error 0x%x\n",
175 adapter->netdev->name,
176 adapter->tqd_start->status.error);
177 }
178 if (adapter->rqd_start->status.stopped) {
179 printk(KERN_ERR "%s: rq error 0x%x\n",
180 adapter->netdev->name,
181 adapter->rqd_start->status.error);
182 }
183
184 schedule_work(&adapter->work);
185 }
186}
187
188
189static void
190vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
191 struct pci_dev *pdev)
192{
193 if (tbi->map_type == VMXNET3_MAP_SINGLE)
194 pci_unmap_single(pdev, tbi->dma_addr, tbi->len,
195 PCI_DMA_TODEVICE);
196 else if (tbi->map_type == VMXNET3_MAP_PAGE)
197 pci_unmap_page(pdev, tbi->dma_addr, tbi->len,
198 PCI_DMA_TODEVICE);
199 else
200 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
201
202 tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
203}
204
205
206static int
207vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
208 struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
209{
210 struct sk_buff *skb;
211 int entries = 0;
212
213 /* no out of order completion */
214 BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
215 BUG_ON(tq->tx_ring.base[eop_idx].txd.eop != 1);
216
217 skb = tq->buf_info[eop_idx].skb;
218 BUG_ON(skb == NULL);
219 tq->buf_info[eop_idx].skb = NULL;
220
221 VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
222
223 while (tq->tx_ring.next2comp != eop_idx) {
224 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
225 pdev);
226
227 /* update next2comp w/o tx_lock. Since we are marking more,
228 * instead of less, tx ring entries avail, the worst case is
229 * that the tx routine incorrectly re-queues a pkt due to
230 * insufficient tx ring entries.
231 */
232 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
233 entries++;
234 }
235
236 dev_kfree_skb_any(skb);
237 return entries;
238}
239
240
241static int
242vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
243 struct vmxnet3_adapter *adapter)
244{
245 int completed = 0;
246 union Vmxnet3_GenericDesc *gdesc;
247
248 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
249 while (gdesc->tcd.gen == tq->comp_ring.gen) {
250 completed += vmxnet3_unmap_pkt(gdesc->tcd.txdIdx, tq,
251 adapter->pdev, adapter);
252
253 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
254 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
255 }
256
257 if (completed) {
258 spin_lock(&tq->tx_lock);
259 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
260 vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
261 VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
262 netif_carrier_ok(adapter->netdev))) {
263 vmxnet3_tq_wake(tq, adapter);
264 }
265 spin_unlock(&tq->tx_lock);
266 }
267 return completed;
268}
269
270
271static void
272vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
273 struct vmxnet3_adapter *adapter)
274{
275 int i;
276
277 while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
278 struct vmxnet3_tx_buf_info *tbi;
279 union Vmxnet3_GenericDesc *gdesc;
280
281 tbi = tq->buf_info + tq->tx_ring.next2comp;
282 gdesc = tq->tx_ring.base + tq->tx_ring.next2comp;
283
284 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
285 if (tbi->skb) {
286 dev_kfree_skb_any(tbi->skb);
287 tbi->skb = NULL;
288 }
289 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
290 }
291
292 /* sanity check, verify all buffers are indeed unmapped and freed */
293 for (i = 0; i < tq->tx_ring.size; i++) {
294 BUG_ON(tq->buf_info[i].skb != NULL ||
295 tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
296 }
297
298 tq->tx_ring.gen = VMXNET3_INIT_GEN;
299 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
300
301 tq->comp_ring.gen = VMXNET3_INIT_GEN;
302 tq->comp_ring.next2proc = 0;
303}
304
305
306void
307vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
308 struct vmxnet3_adapter *adapter)
309{
310 if (tq->tx_ring.base) {
311 pci_free_consistent(adapter->pdev, tq->tx_ring.size *
312 sizeof(struct Vmxnet3_TxDesc),
313 tq->tx_ring.base, tq->tx_ring.basePA);
314 tq->tx_ring.base = NULL;
315 }
316 if (tq->data_ring.base) {
317 pci_free_consistent(adapter->pdev, tq->data_ring.size *
318 sizeof(struct Vmxnet3_TxDataDesc),
319 tq->data_ring.base, tq->data_ring.basePA);
320 tq->data_ring.base = NULL;
321 }
322 if (tq->comp_ring.base) {
323 pci_free_consistent(adapter->pdev, tq->comp_ring.size *
324 sizeof(struct Vmxnet3_TxCompDesc),
325 tq->comp_ring.base, tq->comp_ring.basePA);
326 tq->comp_ring.base = NULL;
327 }
328 kfree(tq->buf_info);
329 tq->buf_info = NULL;
330}
331
332
333static void
334vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
335 struct vmxnet3_adapter *adapter)
336{
337 int i;
338
339 /* reset the tx ring contents to 0 and reset the tx ring states */
340 memset(tq->tx_ring.base, 0, tq->tx_ring.size *
341 sizeof(struct Vmxnet3_TxDesc));
342 tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
343 tq->tx_ring.gen = VMXNET3_INIT_GEN;
344
345 memset(tq->data_ring.base, 0, tq->data_ring.size *
346 sizeof(struct Vmxnet3_TxDataDesc));
347
348 /* reset the tx comp ring contents to 0 and reset comp ring states */
349 memset(tq->comp_ring.base, 0, tq->comp_ring.size *
350 sizeof(struct Vmxnet3_TxCompDesc));
351 tq->comp_ring.next2proc = 0;
352 tq->comp_ring.gen = VMXNET3_INIT_GEN;
353
354 /* reset the bookkeeping data */
355 memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
356 for (i = 0; i < tq->tx_ring.size; i++)
357 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
358
359 /* stats are not reset */
360}
361
362
363static int
364vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
365 struct vmxnet3_adapter *adapter)
366{
367 BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
368 tq->comp_ring.base || tq->buf_info);
369
370 tq->tx_ring.base = pci_alloc_consistent(adapter->pdev, tq->tx_ring.size
371 * sizeof(struct Vmxnet3_TxDesc),
372 &tq->tx_ring.basePA);
373 if (!tq->tx_ring.base) {
374 printk(KERN_ERR "%s: failed to allocate tx ring\n",
375 adapter->netdev->name);
376 goto err;
377 }
378
379 tq->data_ring.base = pci_alloc_consistent(adapter->pdev,
380 tq->data_ring.size *
381 sizeof(struct Vmxnet3_TxDataDesc),
382 &tq->data_ring.basePA);
383 if (!tq->data_ring.base) {
384 printk(KERN_ERR "%s: failed to allocate data ring\n",
385 adapter->netdev->name);
386 goto err;
387 }
388
389 tq->comp_ring.base = pci_alloc_consistent(adapter->pdev,
390 tq->comp_ring.size *
391 sizeof(struct Vmxnet3_TxCompDesc),
392 &tq->comp_ring.basePA);
393 if (!tq->comp_ring.base) {
394 printk(KERN_ERR "%s: failed to allocate tx comp ring\n",
395 adapter->netdev->name);
396 goto err;
397 }
398
399 tq->buf_info = kcalloc(tq->tx_ring.size, sizeof(tq->buf_info[0]),
400 GFP_KERNEL);
401 if (!tq->buf_info) {
402 printk(KERN_ERR "%s: failed to allocate tx bufinfo\n",
403 adapter->netdev->name);
404 goto err;
405 }
406
407 return 0;
408
409err:
410 vmxnet3_tq_destroy(tq, adapter);
411 return -ENOMEM;
412}
413
414
415/*
416 * starting from ring->next2fill, allocate rx buffers for the given ring
417 * of the rx queue and update the rx desc. stop after @num_to_alloc buffers
418 * are allocated or allocation fails
419 */
420
421static int
422vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
423 int num_to_alloc, struct vmxnet3_adapter *adapter)
424{
425 int num_allocated = 0;
426 struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
427 struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
428 u32 val;
429
430 while (num_allocated < num_to_alloc) {
431 struct vmxnet3_rx_buf_info *rbi;
432 union Vmxnet3_GenericDesc *gd;
433
434 rbi = rbi_base + ring->next2fill;
435 gd = ring->base + ring->next2fill;
436
437 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
438 if (rbi->skb == NULL) {
439 rbi->skb = dev_alloc_skb(rbi->len +
440 NET_IP_ALIGN);
441 if (unlikely(rbi->skb == NULL)) {
442 rq->stats.rx_buf_alloc_failure++;
443 break;
444 }
445 rbi->skb->dev = adapter->netdev;
446
447 skb_reserve(rbi->skb, NET_IP_ALIGN);
448 rbi->dma_addr = pci_map_single(adapter->pdev,
449 rbi->skb->data, rbi->len,
450 PCI_DMA_FROMDEVICE);
451 } else {
452 /* rx buffer skipped by the device */
453 }
454 val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
455 } else {
456 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
457 rbi->len != PAGE_SIZE);
458
459 if (rbi->page == NULL) {
460 rbi->page = alloc_page(GFP_ATOMIC);
461 if (unlikely(rbi->page == NULL)) {
462 rq->stats.rx_buf_alloc_failure++;
463 break;
464 }
465 rbi->dma_addr = pci_map_page(adapter->pdev,
466 rbi->page, 0, PAGE_SIZE,
467 PCI_DMA_FROMDEVICE);
468 } else {
469 /* rx buffers skipped by the device */
470 }
471 val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
472 }
473
474 BUG_ON(rbi->dma_addr == 0);
475 gd->rxd.addr = rbi->dma_addr;
476 gd->dword[2] = (ring->gen << VMXNET3_RXD_GEN_SHIFT) | val |
477 rbi->len;
478
479 num_allocated++;
480 vmxnet3_cmd_ring_adv_next2fill(ring);
481 }
482 rq->uncommitted[ring_idx] += num_allocated;
483
484 dev_dbg(&adapter->netdev->dev,
485 "alloc_rx_buf: %d allocated, next2fill %u, next2comp "
486 "%u, uncommited %u\n", num_allocated, ring->next2fill,
487 ring->next2comp, rq->uncommitted[ring_idx]);
488
489 /* so that the device can distinguish a full ring and an empty ring */
490 BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
491
492 return num_allocated;
493}
494
495
496static void
497vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
498 struct vmxnet3_rx_buf_info *rbi)
499{
500 struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
501 skb_shinfo(skb)->nr_frags;
502
503 BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
504
505 frag->page = rbi->page;
506 frag->page_offset = 0;
507 frag->size = rcd->len;
508 skb->data_len += frag->size;
509 skb_shinfo(skb)->nr_frags++;
510}
511
512
513static void
514vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
515 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
516 struct vmxnet3_adapter *adapter)
517{
518 u32 dw2, len;
519 unsigned long buf_offset;
520 int i;
521 union Vmxnet3_GenericDesc *gdesc;
522 struct vmxnet3_tx_buf_info *tbi = NULL;
523
524 BUG_ON(ctx->copy_size > skb_headlen(skb));
525
526 /* use the previous gen bit for the SOP desc */
527 dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
528
529 ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
530 gdesc = ctx->sop_txd; /* both loops below can be skipped */
531
532 /* no need to map the buffer if headers are copied */
533 if (ctx->copy_size) {
534 ctx->sop_txd->txd.addr = tq->data_ring.basePA +
535 tq->tx_ring.next2fill *
536 sizeof(struct Vmxnet3_TxDataDesc);
537 ctx->sop_txd->dword[2] = dw2 | ctx->copy_size;
538 ctx->sop_txd->dword[3] = 0;
539
540 tbi = tq->buf_info + tq->tx_ring.next2fill;
541 tbi->map_type = VMXNET3_MAP_NONE;
542
543 dev_dbg(&adapter->netdev->dev,
544 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
545 tq->tx_ring.next2fill, ctx->sop_txd->txd.addr,
546 ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
547 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
548
549 /* use the right gen for non-SOP desc */
550 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
551 }
552
553 /* linear part can use multiple tx desc if it's big */
554 len = skb_headlen(skb) - ctx->copy_size;
555 buf_offset = ctx->copy_size;
556 while (len) {
557 u32 buf_size;
558
559 buf_size = len > VMXNET3_MAX_TX_BUF_SIZE ?
560 VMXNET3_MAX_TX_BUF_SIZE : len;
561
562 tbi = tq->buf_info + tq->tx_ring.next2fill;
563 tbi->map_type = VMXNET3_MAP_SINGLE;
564 tbi->dma_addr = pci_map_single(adapter->pdev,
565 skb->data + buf_offset, buf_size,
566 PCI_DMA_TODEVICE);
567
568 tbi->len = buf_size; /* this automatically convert 2^14 to 0 */
569
570 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
571 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
572
573 gdesc->txd.addr = tbi->dma_addr;
574 gdesc->dword[2] = dw2 | buf_size;
575 gdesc->dword[3] = 0;
576
577 dev_dbg(&adapter->netdev->dev,
578 "txd[%u]: 0x%Lx 0x%x 0x%x\n",
579 tq->tx_ring.next2fill, gdesc->txd.addr,
580 gdesc->dword[2], gdesc->dword[3]);
581 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
582 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
583
584 len -= buf_size;
585 buf_offset += buf_size;
586 }
587
588 for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
589 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
590
591 tbi = tq->buf_info + tq->tx_ring.next2fill;
592 tbi->map_type = VMXNET3_MAP_PAGE;
593 tbi->dma_addr = pci_map_page(adapter->pdev, frag->page,
594 frag->page_offset, frag->size,
595 PCI_DMA_TODEVICE);
596
597 tbi->len = frag->size;
598
599 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
600 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
601
602 gdesc->txd.addr = tbi->dma_addr;
603 gdesc->dword[2] = dw2 | frag->size;
604 gdesc->dword[3] = 0;
605
606 dev_dbg(&adapter->netdev->dev,
607 "txd[%u]: 0x%llu %u %u\n",
608 tq->tx_ring.next2fill, gdesc->txd.addr,
609 gdesc->dword[2], gdesc->dword[3]);
610 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
611 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
612 }
613
614 ctx->eop_txd = gdesc;
615
616 /* set the last buf_info for the pkt */
617 tbi->skb = skb;
618 tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
619}
620
621
622/*
623 * parse and copy relevant protocol headers:
624 * For a tso pkt, relevant headers are L2/3/4 including options
625 * For a pkt requesting csum offloading, they are L2/3 and may include L4
626 * if it's a TCP/UDP pkt
627 *
628 * Returns:
629 * -1: error happens during parsing
630 * 0: protocol headers parsed, but too big to be copied
631 * 1: protocol headers parsed and copied
632 *
633 * Other effects:
634 * 1. related *ctx fields are updated.
635 * 2. ctx->copy_size is # of bytes copied
636 * 3. the portion copied is guaranteed to be in the linear part
637 *
638 */
639static int
640vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
641 struct vmxnet3_tx_ctx *ctx,
642 struct vmxnet3_adapter *adapter)
643{
644 struct Vmxnet3_TxDataDesc *tdd;
645
646 if (ctx->mss) {
647 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
648 ctx->l4_hdr_size = ((struct tcphdr *)
649 skb_transport_header(skb))->doff * 4;
650 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
651 } else {
652 unsigned int pull_size;
653
654 if (skb->ip_summed == CHECKSUM_PARTIAL) {
655 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
656
657 if (ctx->ipv4) {
658 struct iphdr *iph = (struct iphdr *)
659 skb_network_header(skb);
660 if (iph->protocol == IPPROTO_TCP) {
661 pull_size = ctx->eth_ip_hdr_size +
662 sizeof(struct tcphdr);
663
664 if (unlikely(!pskb_may_pull(skb,
665 pull_size))) {
666 goto err;
667 }
668 ctx->l4_hdr_size = ((struct tcphdr *)
669 skb_transport_header(skb))->doff * 4;
670 } else if (iph->protocol == IPPROTO_UDP) {
671 ctx->l4_hdr_size =
672 sizeof(struct udphdr);
673 } else {
674 ctx->l4_hdr_size = 0;
675 }
676 } else {
677 /* for simplicity, don't copy L4 headers */
678 ctx->l4_hdr_size = 0;
679 }
680 ctx->copy_size = ctx->eth_ip_hdr_size +
681 ctx->l4_hdr_size;
682 } else {
683 ctx->eth_ip_hdr_size = 0;
684 ctx->l4_hdr_size = 0;
685 /* copy as much as allowed */
686 ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
687 , skb_headlen(skb));
688 }
689
690 /* make sure headers are accessible directly */
691 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
692 goto err;
693 }
694
695 if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
696 tq->stats.oversized_hdr++;
697 ctx->copy_size = 0;
698 return 0;
699 }
700
701 tdd = tq->data_ring.base + tq->tx_ring.next2fill;
702
703 memcpy(tdd->data, skb->data, ctx->copy_size);
704 dev_dbg(&adapter->netdev->dev,
705 "copy %u bytes to dataRing[%u]\n",
706 ctx->copy_size, tq->tx_ring.next2fill);
707 return 1;
708
709err:
710 return -1;
711}
712
713
714static void
715vmxnet3_prepare_tso(struct sk_buff *skb,
716 struct vmxnet3_tx_ctx *ctx)
717{
718 struct tcphdr *tcph = (struct tcphdr *)skb_transport_header(skb);
719 if (ctx->ipv4) {
720 struct iphdr *iph = (struct iphdr *)skb_network_header(skb);
721 iph->check = 0;
722 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
723 IPPROTO_TCP, 0);
724 } else {
725 struct ipv6hdr *iph = (struct ipv6hdr *)skb_network_header(skb);
726 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
727 IPPROTO_TCP, 0);
728 }
729}
730
731
732/*
733 * Transmits a pkt thru a given tq
734 * Returns:
735 * NETDEV_TX_OK: descriptors are setup successfully
736 * NETDEV_TX_OK: error occured, the pkt is dropped
737 * NETDEV_TX_BUSY: tx ring is full, queue is stopped
738 *
739 * Side-effects:
740 * 1. tx ring may be changed
741 * 2. tq stats may be updated accordingly
742 * 3. shared->txNumDeferred may be updated
743 */
744
745static int
746vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
747 struct vmxnet3_adapter *adapter, struct net_device *netdev)
748{
749 int ret;
750 u32 count;
751 unsigned long flags;
752 struct vmxnet3_tx_ctx ctx;
753 union Vmxnet3_GenericDesc *gdesc;
754
755 /* conservatively estimate # of descriptors to use */
756 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) +
757 skb_shinfo(skb)->nr_frags + 1;
758
759 ctx.ipv4 = (skb->protocol == __constant_ntohs(ETH_P_IP));
760
761 ctx.mss = skb_shinfo(skb)->gso_size;
762 if (ctx.mss) {
763 if (skb_header_cloned(skb)) {
764 if (unlikely(pskb_expand_head(skb, 0, 0,
765 GFP_ATOMIC) != 0)) {
766 tq->stats.drop_tso++;
767 goto drop_pkt;
768 }
769 tq->stats.copy_skb_header++;
770 }
771 vmxnet3_prepare_tso(skb, &ctx);
772 } else {
773 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
774
775 /* non-tso pkts must not use more than
776 * VMXNET3_MAX_TXD_PER_PKT entries
777 */
778 if (skb_linearize(skb) != 0) {
779 tq->stats.drop_too_many_frags++;
780 goto drop_pkt;
781 }
782 tq->stats.linearized++;
783
784 /* recalculate the # of descriptors to use */
785 count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
786 }
787 }
788
789 ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
790 if (ret >= 0) {
791 BUG_ON(ret <= 0 && ctx.copy_size != 0);
792 /* hdrs parsed, check against other limits */
793 if (ctx.mss) {
794 if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
795 VMXNET3_MAX_TX_BUF_SIZE)) {
796 goto hdr_too_big;
797 }
798 } else {
799 if (skb->ip_summed == CHECKSUM_PARTIAL) {
800 if (unlikely(ctx.eth_ip_hdr_size +
801 skb->csum_offset >
802 VMXNET3_MAX_CSUM_OFFSET)) {
803 goto hdr_too_big;
804 }
805 }
806 }
807 } else {
808 tq->stats.drop_hdr_inspect_err++;
809 goto drop_pkt;
810 }
811
812 spin_lock_irqsave(&tq->tx_lock, flags);
813
814 if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
815 tq->stats.tx_ring_full++;
816 dev_dbg(&adapter->netdev->dev,
817 "tx queue stopped on %s, next2comp %u"
818 " next2fill %u\n", adapter->netdev->name,
819 tq->tx_ring.next2comp, tq->tx_ring.next2fill);
820
821 vmxnet3_tq_stop(tq, adapter);
822 spin_unlock_irqrestore(&tq->tx_lock, flags);
823 return NETDEV_TX_BUSY;
824 }
825
826 /* fill tx descs related to addr & len */
827 vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
828
829 /* setup the EOP desc */
830 ctx.eop_txd->dword[3] = VMXNET3_TXD_CQ | VMXNET3_TXD_EOP;
831
832 /* setup the SOP desc */
833 gdesc = ctx.sop_txd;
834 if (ctx.mss) {
835 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
836 gdesc->txd.om = VMXNET3_OM_TSO;
837 gdesc->txd.msscof = ctx.mss;
838 tq->shared->txNumDeferred += (skb->len - gdesc->txd.hlen +
839 ctx.mss - 1) / ctx.mss;
840 } else {
841 if (skb->ip_summed == CHECKSUM_PARTIAL) {
842 gdesc->txd.hlen = ctx.eth_ip_hdr_size;
843 gdesc->txd.om = VMXNET3_OM_CSUM;
844 gdesc->txd.msscof = ctx.eth_ip_hdr_size +
845 skb->csum_offset;
846 } else {
847 gdesc->txd.om = 0;
848 gdesc->txd.msscof = 0;
849 }
850 tq->shared->txNumDeferred++;
851 }
852
853 if (vlan_tx_tag_present(skb)) {
854 gdesc->txd.ti = 1;
855 gdesc->txd.tci = vlan_tx_tag_get(skb);
856 }
857
858 wmb();
859
860 /* finally flips the GEN bit of the SOP desc */
861 gdesc->dword[2] ^= VMXNET3_TXD_GEN;
862 dev_dbg(&adapter->netdev->dev,
863 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
864 (u32)((union Vmxnet3_GenericDesc *)ctx.sop_txd -
865 tq->tx_ring.base), gdesc->txd.addr, gdesc->dword[2],
866 gdesc->dword[3]);
867
868 spin_unlock_irqrestore(&tq->tx_lock, flags);
869
870 if (tq->shared->txNumDeferred >= tq->shared->txThreshold) {
871 tq->shared->txNumDeferred = 0;
872 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_TXPROD,
873 tq->tx_ring.next2fill);
874 }
875 netdev->trans_start = jiffies;
876
877 return NETDEV_TX_OK;
878
879hdr_too_big:
880 tq->stats.drop_oversized_hdr++;
881drop_pkt:
882 tq->stats.drop_total++;
883 dev_kfree_skb(skb);
884 return NETDEV_TX_OK;
885}
886
887
888static netdev_tx_t
889vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
890{
891 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
892 struct vmxnet3_tx_queue *tq = &adapter->tx_queue;
893
894 return vmxnet3_tq_xmit(skb, tq, adapter, netdev);
895}
896
897
898static void
899vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
900 struct sk_buff *skb,
901 union Vmxnet3_GenericDesc *gdesc)
902{
903 if (!gdesc->rcd.cnc && adapter->rxcsum) {
904 /* typical case: TCP/UDP over IP and both csums are correct */
905 if ((gdesc->dword[3] & VMXNET3_RCD_CSUM_OK) ==
906 VMXNET3_RCD_CSUM_OK) {
907 skb->ip_summed = CHECKSUM_UNNECESSARY;
908 BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
909 BUG_ON(!(gdesc->rcd.v4 || gdesc->rcd.v6));
910 BUG_ON(gdesc->rcd.frg);
911 } else {
912 if (gdesc->rcd.csum) {
913 skb->csum = htons(gdesc->rcd.csum);
914 skb->ip_summed = CHECKSUM_PARTIAL;
915 } else {
916 skb->ip_summed = CHECKSUM_NONE;
917 }
918 }
919 } else {
920 skb->ip_summed = CHECKSUM_NONE;
921 }
922}
923
924
925static void
926vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
927 struct vmxnet3_rx_ctx *ctx, struct vmxnet3_adapter *adapter)
928{
929 rq->stats.drop_err++;
930 if (!rcd->fcs)
931 rq->stats.drop_fcs++;
932
933 rq->stats.drop_total++;
934
935 /*
936 * We do not unmap and chain the rx buffer to the skb.
937 * We basically pretend this buffer is not used and will be recycled
938 * by vmxnet3_rq_alloc_rx_buf()
939 */
940
941 /*
942 * ctx->skb may be NULL if this is the first and the only one
943 * desc for the pkt
944 */
945 if (ctx->skb)
946 dev_kfree_skb_irq(ctx->skb);
947
948 ctx->skb = NULL;
949}
950
951
952static int
953vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
954 struct vmxnet3_adapter *adapter, int quota)
955{
956 static u32 rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
957 u32 num_rxd = 0;
958 struct Vmxnet3_RxCompDesc *rcd;
959 struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
960
961 rcd = &rq->comp_ring.base[rq->comp_ring.next2proc].rcd;
962 while (rcd->gen == rq->comp_ring.gen) {
963 struct vmxnet3_rx_buf_info *rbi;
964 struct sk_buff *skb;
965 int num_to_alloc;
966 struct Vmxnet3_RxDesc *rxd;
967 u32 idx, ring_idx;
968
969 if (num_rxd >= quota) {
970 /* we may stop even before we see the EOP desc of
971 * the current pkt
972 */
973 break;
974 }
975 num_rxd++;
976
977 idx = rcd->rxdIdx;
978 ring_idx = rcd->rqID == rq->qid ? 0 : 1;
979
980 rxd = &rq->rx_ring[ring_idx].base[idx].rxd;
981 rbi = rq->buf_info[ring_idx] + idx;
982
983 BUG_ON(rxd->addr != rbi->dma_addr || rxd->len != rbi->len);
984
985 if (unlikely(rcd->eop && rcd->err)) {
986 vmxnet3_rx_error(rq, rcd, ctx, adapter);
987 goto rcd_done;
988 }
989
990 if (rcd->sop) { /* first buf of the pkt */
991 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
992 rcd->rqID != rq->qid);
993
994 BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
995 BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
996
997 if (unlikely(rcd->len == 0)) {
998 /* Pretend the rx buffer is skipped. */
999 BUG_ON(!(rcd->sop && rcd->eop));
1000 dev_dbg(&adapter->netdev->dev,
1001 "rxRing[%u][%u] 0 length\n",
1002 ring_idx, idx);
1003 goto rcd_done;
1004 }
1005
1006 ctx->skb = rbi->skb;
1007 rbi->skb = NULL;
1008
1009 pci_unmap_single(adapter->pdev, rbi->dma_addr, rbi->len,
1010 PCI_DMA_FROMDEVICE);
1011
1012 skb_put(ctx->skb, rcd->len);
1013 } else {
1014 BUG_ON(ctx->skb == NULL);
1015 /* non SOP buffer must be type 1 in most cases */
1016 if (rbi->buf_type == VMXNET3_RX_BUF_PAGE) {
1017 BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1018
1019 if (rcd->len) {
1020 pci_unmap_page(adapter->pdev,
1021 rbi->dma_addr, rbi->len,
1022 PCI_DMA_FROMDEVICE);
1023
1024 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1025 rbi->page = NULL;
1026 }
1027 } else {
1028 /*
1029 * The only time a non-SOP buffer is type 0 is
1030 * when it's EOP and error flag is raised, which
1031 * has already been handled.
1032 */
1033 BUG_ON(true);
1034 }
1035 }
1036
1037 skb = ctx->skb;
1038 if (rcd->eop) {
1039 skb->len += skb->data_len;
1040 skb->truesize += skb->data_len;
1041
1042 vmxnet3_rx_csum(adapter, skb,
1043 (union Vmxnet3_GenericDesc *)rcd);
1044 skb->protocol = eth_type_trans(skb, adapter->netdev);
1045
1046 if (unlikely(adapter->vlan_grp && rcd->ts)) {
1047 vlan_hwaccel_receive_skb(skb,
1048 adapter->vlan_grp, rcd->tci);
1049 } else {
1050 netif_receive_skb(skb);
1051 }
1052
1053 adapter->netdev->last_rx = jiffies;
1054 ctx->skb = NULL;
1055 }
1056
1057rcd_done:
1058 /* device may skip some rx descs */
1059 rq->rx_ring[ring_idx].next2comp = idx;
1060 VMXNET3_INC_RING_IDX_ONLY(rq->rx_ring[ring_idx].next2comp,
1061 rq->rx_ring[ring_idx].size);
1062
1063 /* refill rx buffers frequently to avoid starving the h/w */
1064 num_to_alloc = vmxnet3_cmd_ring_desc_avail(rq->rx_ring +
1065 ring_idx);
1066 if (unlikely(num_to_alloc > VMXNET3_RX_ALLOC_THRESHOLD(rq,
1067 ring_idx, adapter))) {
1068 vmxnet3_rq_alloc_rx_buf(rq, ring_idx, num_to_alloc,
1069 adapter);
1070
1071 /* if needed, update the register */
1072 if (unlikely(rq->shared->updateRxProd)) {
1073 VMXNET3_WRITE_BAR0_REG(adapter,
1074 rxprod_reg[ring_idx] + rq->qid * 8,
1075 rq->rx_ring[ring_idx].next2fill);
1076 rq->uncommitted[ring_idx] = 0;
1077 }
1078 }
1079
1080 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1081 rcd = &rq->comp_ring.base[rq->comp_ring.next2proc].rcd;
1082 }
1083
1084 return num_rxd;
1085}
1086
1087
1088static void
1089vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1090 struct vmxnet3_adapter *adapter)
1091{
1092 u32 i, ring_idx;
1093 struct Vmxnet3_RxDesc *rxd;
1094
1095 for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1096 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1097 rxd = &rq->rx_ring[ring_idx].base[i].rxd;
1098
1099 if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1100 rq->buf_info[ring_idx][i].skb) {
1101 pci_unmap_single(adapter->pdev, rxd->addr,
1102 rxd->len, PCI_DMA_FROMDEVICE);
1103 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1104 rq->buf_info[ring_idx][i].skb = NULL;
1105 } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1106 rq->buf_info[ring_idx][i].page) {
1107 pci_unmap_page(adapter->pdev, rxd->addr,
1108 rxd->len, PCI_DMA_FROMDEVICE);
1109 put_page(rq->buf_info[ring_idx][i].page);
1110 rq->buf_info[ring_idx][i].page = NULL;
1111 }
1112 }
1113
1114 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1115 rq->rx_ring[ring_idx].next2fill =
1116 rq->rx_ring[ring_idx].next2comp = 0;
1117 rq->uncommitted[ring_idx] = 0;
1118 }
1119
1120 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1121 rq->comp_ring.next2proc = 0;
1122}
1123
1124
1125void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1126 struct vmxnet3_adapter *adapter)
1127{
1128 int i;
1129 int j;
1130
1131 /* all rx buffers must have already been freed */
1132 for (i = 0; i < 2; i++) {
1133 if (rq->buf_info[i]) {
1134 for (j = 0; j < rq->rx_ring[i].size; j++)
1135 BUG_ON(rq->buf_info[i][j].page != NULL);
1136 }
1137 }
1138
1139
1140 kfree(rq->buf_info[0]);
1141
1142 for (i = 0; i < 2; i++) {
1143 if (rq->rx_ring[i].base) {
1144 pci_free_consistent(adapter->pdev, rq->rx_ring[i].size
1145 * sizeof(struct Vmxnet3_RxDesc),
1146 rq->rx_ring[i].base,
1147 rq->rx_ring[i].basePA);
1148 rq->rx_ring[i].base = NULL;
1149 }
1150 rq->buf_info[i] = NULL;
1151 }
1152
1153 if (rq->comp_ring.base) {
1154 pci_free_consistent(adapter->pdev, rq->comp_ring.size *
1155 sizeof(struct Vmxnet3_RxCompDesc),
1156 rq->comp_ring.base, rq->comp_ring.basePA);
1157 rq->comp_ring.base = NULL;
1158 }
1159}
1160
1161
1162static int
1163vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1164 struct vmxnet3_adapter *adapter)
1165{
1166 int i;
1167
1168 /* initialize buf_info */
1169 for (i = 0; i < rq->rx_ring[0].size; i++) {
1170
1171 /* 1st buf for a pkt is skbuff */
1172 if (i % adapter->rx_buf_per_pkt == 0) {
1173 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1174 rq->buf_info[0][i].len = adapter->skb_buf_size;
1175 } else { /* subsequent bufs for a pkt is frag */
1176 rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1177 rq->buf_info[0][i].len = PAGE_SIZE;
1178 }
1179 }
1180 for (i = 0; i < rq->rx_ring[1].size; i++) {
1181 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1182 rq->buf_info[1][i].len = PAGE_SIZE;
1183 }
1184
1185 /* reset internal state and allocate buffers for both rings */
1186 for (i = 0; i < 2; i++) {
1187 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1188 rq->uncommitted[i] = 0;
1189
1190 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1191 sizeof(struct Vmxnet3_RxDesc));
1192 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1193 }
1194 if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1195 adapter) == 0) {
1196 /* at least has 1 rx buffer for the 1st ring */
1197 return -ENOMEM;
1198 }
1199 vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1200
1201 /* reset the comp ring */
1202 rq->comp_ring.next2proc = 0;
1203 memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1204 sizeof(struct Vmxnet3_RxCompDesc));
1205 rq->comp_ring.gen = VMXNET3_INIT_GEN;
1206
1207 /* reset rxctx */
1208 rq->rx_ctx.skb = NULL;
1209
1210 /* stats are not reset */
1211 return 0;
1212}
1213
1214
1215static int
1216vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1217{
1218 int i;
1219 size_t sz;
1220 struct vmxnet3_rx_buf_info *bi;
1221
1222 for (i = 0; i < 2; i++) {
1223
1224 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1225 rq->rx_ring[i].base = pci_alloc_consistent(adapter->pdev, sz,
1226 &rq->rx_ring[i].basePA);
1227 if (!rq->rx_ring[i].base) {
1228 printk(KERN_ERR "%s: failed to allocate rx ring %d\n",
1229 adapter->netdev->name, i);
1230 goto err;
1231 }
1232 }
1233
1234 sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1235 rq->comp_ring.base = pci_alloc_consistent(adapter->pdev, sz,
1236 &rq->comp_ring.basePA);
1237 if (!rq->comp_ring.base) {
1238 printk(KERN_ERR "%s: failed to allocate rx comp ring\n",
1239 adapter->netdev->name);
1240 goto err;
1241 }
1242
1243 sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1244 rq->rx_ring[1].size);
1245 bi = kmalloc(sz, GFP_KERNEL);
1246 if (!bi) {
1247 printk(KERN_ERR "%s: failed to allocate rx bufinfo\n",
1248 adapter->netdev->name);
1249 goto err;
1250 }
1251 memset(bi, 0, sz);
1252 rq->buf_info[0] = bi;
1253 rq->buf_info[1] = bi + rq->rx_ring[0].size;
1254
1255 return 0;
1256
1257err:
1258 vmxnet3_rq_destroy(rq, adapter);
1259 return -ENOMEM;
1260}
1261
1262
1263static int
1264vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1265{
1266 if (unlikely(adapter->shared->ecr))
1267 vmxnet3_process_events(adapter);
1268
1269 vmxnet3_tq_tx_complete(&adapter->tx_queue, adapter);
1270 return vmxnet3_rq_rx_complete(&adapter->rx_queue, adapter, budget);
1271}
1272
1273
1274static int
1275vmxnet3_poll(struct napi_struct *napi, int budget)
1276{
1277 struct vmxnet3_adapter *adapter = container_of(napi,
1278 struct vmxnet3_adapter, napi);
1279 int rxd_done;
1280
1281 rxd_done = vmxnet3_do_poll(adapter, budget);
1282
1283 if (rxd_done < budget) {
1284 napi_complete(napi);
1285 vmxnet3_enable_intr(adapter, 0);
1286 }
1287 return rxd_done;
1288}
1289
1290
1291/* Interrupt handler for vmxnet3 */
1292static irqreturn_t
1293vmxnet3_intr(int irq, void *dev_id)
1294{
1295 struct net_device *dev = dev_id;
1296 struct vmxnet3_adapter *adapter = netdev_priv(dev);
1297
1298 if (unlikely(adapter->intr.type == VMXNET3_IT_INTX)) {
1299 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1300 if (unlikely(icr == 0))
1301 /* not ours */
1302 return IRQ_NONE;
1303 }
1304
1305
1306 /* disable intr if needed */
1307 if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1308 vmxnet3_disable_intr(adapter, 0);
1309
1310 napi_schedule(&adapter->napi);
1311
1312 return IRQ_HANDLED;
1313}
1314
1315#ifdef CONFIG_NET_POLL_CONTROLLER
1316
1317
1318/* netpoll callback. */
1319static void
1320vmxnet3_netpoll(struct net_device *netdev)
1321{
1322 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1323 int irq;
1324
1325#ifdef CONFIG_PCI_MSI
1326 if (adapter->intr.type == VMXNET3_IT_MSIX)
1327 irq = adapter->intr.msix_entries[0].vector;
1328 else
1329#endif
1330 irq = adapter->pdev->irq;
1331
1332 disable_irq(irq);
1333 vmxnet3_intr(irq, netdev);
1334 enable_irq(irq);
1335}
1336#endif
1337
1338static int
1339vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1340{
1341 int err;
1342
1343#ifdef CONFIG_PCI_MSI
1344 if (adapter->intr.type == VMXNET3_IT_MSIX) {
1345 /* we only use 1 MSI-X vector */
1346 err = request_irq(adapter->intr.msix_entries[0].vector,
1347 vmxnet3_intr, 0, adapter->netdev->name,
1348 adapter->netdev);
1349 } else
1350#endif
1351 if (adapter->intr.type == VMXNET3_IT_MSI) {
1352 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1353 adapter->netdev->name, adapter->netdev);
1354 } else {
1355 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1356 IRQF_SHARED, adapter->netdev->name,
1357 adapter->netdev);
1358 }
1359
1360 if (err)
1361 printk(KERN_ERR "Failed to request irq %s (intr type:%d), error"
1362 ":%d\n", adapter->netdev->name, adapter->intr.type, err);
1363
1364
1365 if (!err) {
1366 int i;
1367 /* init our intr settings */
1368 for (i = 0; i < adapter->intr.num_intrs; i++)
1369 adapter->intr.mod_levels[i] = UPT1_IML_ADAPTIVE;
1370
1371 /* next setup intr index for all intr sources */
1372 adapter->tx_queue.comp_ring.intr_idx = 0;
1373 adapter->rx_queue.comp_ring.intr_idx = 0;
1374 adapter->intr.event_intr_idx = 0;
1375
1376 printk(KERN_INFO "%s: intr type %u, mode %u, %u vectors "
1377 "allocated\n", adapter->netdev->name, adapter->intr.type,
1378 adapter->intr.mask_mode, adapter->intr.num_intrs);
1379 }
1380
1381 return err;
1382}
1383
1384
1385static void
1386vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1387{
1388 BUG_ON(adapter->intr.type == VMXNET3_IT_AUTO ||
1389 adapter->intr.num_intrs <= 0);
1390
1391 switch (adapter->intr.type) {
1392#ifdef CONFIG_PCI_MSI
1393 case VMXNET3_IT_MSIX:
1394 {
1395 int i;
1396
1397 for (i = 0; i < adapter->intr.num_intrs; i++)
1398 free_irq(adapter->intr.msix_entries[i].vector,
1399 adapter->netdev);
1400 break;
1401 }
1402#endif
1403 case VMXNET3_IT_MSI:
1404 free_irq(adapter->pdev->irq, adapter->netdev);
1405 break;
1406 case VMXNET3_IT_INTX:
1407 free_irq(adapter->pdev->irq, adapter->netdev);
1408 break;
1409 default:
1410 BUG_ON(true);
1411 }
1412}
1413
1414
1415static void
1416vmxnet3_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
1417{
1418 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1419 struct Vmxnet3_DriverShared *shared = adapter->shared;
1420 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1421
1422 if (grp) {
1423 /* add vlan rx stripping. */
1424 if (adapter->netdev->features & NETIF_F_HW_VLAN_RX) {
1425 int i;
1426 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1427 adapter->vlan_grp = grp;
1428
1429 /* update FEATURES to device */
1430 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1431 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1432 VMXNET3_CMD_UPDATE_FEATURE);
1433 /*
1434 * Clear entire vfTable; then enable untagged pkts.
1435 * Note: setting one entry in vfTable to non-zero turns
1436 * on VLAN rx filtering.
1437 */
1438 for (i = 0; i < VMXNET3_VFT_SIZE; i++)
1439 vfTable[i] = 0;
1440
1441 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1442 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1443 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1444 } else {
1445 printk(KERN_ERR "%s: vlan_rx_register when device has "
1446 "no NETIF_F_HW_VLAN_RX\n", netdev->name);
1447 }
1448 } else {
1449 /* remove vlan rx stripping. */
1450 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1451 adapter->vlan_grp = NULL;
1452
1453 if (devRead->misc.uptFeatures & UPT1_F_RXVLAN) {
1454 int i;
1455
1456 for (i = 0; i < VMXNET3_VFT_SIZE; i++) {
1457 /* clear entire vfTable; this also disables
1458 * VLAN rx filtering
1459 */
1460 vfTable[i] = 0;
1461 }
1462 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1463 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1464
1465 /* update FEATURES to device */
1466 devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1467 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1468 VMXNET3_CMD_UPDATE_FEATURE);
1469 }
1470 }
1471}
1472
1473
1474static void
1475vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1476{
1477 if (adapter->vlan_grp) {
1478 u16 vid;
1479 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1480 bool activeVlan = false;
1481
1482 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1483 if (vlan_group_get_device(adapter->vlan_grp, vid)) {
1484 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1485 activeVlan = true;
1486 }
1487 }
1488 if (activeVlan) {
1489 /* continue to allow untagged pkts */
1490 VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1491 }
1492 }
1493}
1494
1495
1496static void
1497vmxnet3_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1498{
1499 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1500 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1501
1502 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1503 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1504 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1505}
1506
1507
1508static void
1509vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1510{
1511 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1512 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1513
1514 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
1515 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1516 VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1517}
1518
1519
1520static u8 *
1521vmxnet3_copy_mc(struct net_device *netdev)
1522{
1523 u8 *buf = NULL;
1524 u32 sz = netdev->mc_count * ETH_ALEN;
1525
1526 /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
1527 if (sz <= 0xffff) {
1528 /* We may be called with BH disabled */
1529 buf = kmalloc(sz, GFP_ATOMIC);
1530 if (buf) {
1531 int i;
1532 struct dev_mc_list *mc = netdev->mc_list;
1533
1534 for (i = 0; i < netdev->mc_count; i++) {
1535 BUG_ON(!mc);
1536 memcpy(buf + i * ETH_ALEN, mc->dmi_addr,
1537 ETH_ALEN);
1538 mc = mc->next;
1539 }
1540 }
1541 }
1542 return buf;
1543}
1544
1545
1546static void
1547vmxnet3_set_mc(struct net_device *netdev)
1548{
1549 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1550 struct Vmxnet3_RxFilterConf *rxConf =
1551 &adapter->shared->devRead.rxFilterConf;
1552 u8 *new_table = NULL;
1553 u32 new_mode = VMXNET3_RXM_UCAST;
1554
1555 if (netdev->flags & IFF_PROMISC)
1556 new_mode |= VMXNET3_RXM_PROMISC;
1557
1558 if (netdev->flags & IFF_BROADCAST)
1559 new_mode |= VMXNET3_RXM_BCAST;
1560
1561 if (netdev->flags & IFF_ALLMULTI)
1562 new_mode |= VMXNET3_RXM_ALL_MULTI;
1563 else
1564 if (netdev->mc_count > 0) {
1565 new_table = vmxnet3_copy_mc(netdev);
1566 if (new_table) {
1567 new_mode |= VMXNET3_RXM_MCAST;
1568 rxConf->mfTableLen = netdev->mc_count *
1569 ETH_ALEN;
1570 rxConf->mfTablePA = virt_to_phys(new_table);
1571 } else {
1572 printk(KERN_INFO "%s: failed to copy mcast list"
1573 ", setting ALL_MULTI\n", netdev->name);
1574 new_mode |= VMXNET3_RXM_ALL_MULTI;
1575 }
1576 }
1577
1578
1579 if (!(new_mode & VMXNET3_RXM_MCAST)) {
1580 rxConf->mfTableLen = 0;
1581 rxConf->mfTablePA = 0;
1582 }
1583
1584 if (new_mode != rxConf->rxMode) {
1585 rxConf->rxMode = new_mode;
1586 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1587 VMXNET3_CMD_UPDATE_RX_MODE);
1588 }
1589
1590 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1591 VMXNET3_CMD_UPDATE_MAC_FILTERS);
1592
1593 kfree(new_table);
1594}
1595
1596
1597/*
1598 * Set up driver_shared based on settings in adapter.
1599 */
1600
1601static void
1602vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
1603{
1604 struct Vmxnet3_DriverShared *shared = adapter->shared;
1605 struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
1606 struct Vmxnet3_TxQueueConf *tqc;
1607 struct Vmxnet3_RxQueueConf *rqc;
1608 int i;
1609
1610 memset(shared, 0, sizeof(*shared));
1611
1612 /* driver settings */
1613 shared->magic = VMXNET3_REV1_MAGIC;
1614 devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
1615 devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
1616 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
1617 devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
1618 devRead->misc.driverInfo.vmxnet3RevSpt = 1;
1619 devRead->misc.driverInfo.uptVerSpt = 1;
1620
1621 devRead->misc.ddPA = virt_to_phys(adapter);
1622 devRead->misc.ddLen = sizeof(struct vmxnet3_adapter);
1623
1624 /* set up feature flags */
1625 if (adapter->rxcsum)
1626 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
1627
1628 if (adapter->lro) {
1629 devRead->misc.uptFeatures |= UPT1_F_LRO;
1630 devRead->misc.maxNumRxSG = 1 + MAX_SKB_FRAGS;
1631 }
1632 if ((adapter->netdev->features & NETIF_F_HW_VLAN_RX)
1633 && adapter->vlan_grp) {
1634 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1635 }
1636
1637 devRead->misc.mtu = adapter->netdev->mtu;
1638 devRead->misc.queueDescPA = adapter->queue_desc_pa;
1639 devRead->misc.queueDescLen = sizeof(struct Vmxnet3_TxQueueDesc) +
1640 sizeof(struct Vmxnet3_RxQueueDesc);
1641
1642 /* tx queue settings */
1643 BUG_ON(adapter->tx_queue.tx_ring.base == NULL);
1644
1645 devRead->misc.numTxQueues = 1;
1646 tqc = &adapter->tqd_start->conf;
1647 tqc->txRingBasePA = adapter->tx_queue.tx_ring.basePA;
1648 tqc->dataRingBasePA = adapter->tx_queue.data_ring.basePA;
1649 tqc->compRingBasePA = adapter->tx_queue.comp_ring.basePA;
1650 tqc->ddPA = virt_to_phys(adapter->tx_queue.buf_info);
1651 tqc->txRingSize = adapter->tx_queue.tx_ring.size;
1652 tqc->dataRingSize = adapter->tx_queue.data_ring.size;
1653 tqc->compRingSize = adapter->tx_queue.comp_ring.size;
1654 tqc->ddLen = sizeof(struct vmxnet3_tx_buf_info) *
1655 tqc->txRingSize;
1656 tqc->intrIdx = adapter->tx_queue.comp_ring.intr_idx;
1657
1658 /* rx queue settings */
1659 devRead->misc.numRxQueues = 1;
1660 rqc = &adapter->rqd_start->conf;
1661 rqc->rxRingBasePA[0] = adapter->rx_queue.rx_ring[0].basePA;
1662 rqc->rxRingBasePA[1] = adapter->rx_queue.rx_ring[1].basePA;
1663 rqc->compRingBasePA = adapter->rx_queue.comp_ring.basePA;
1664 rqc->ddPA = virt_to_phys(adapter->rx_queue.buf_info);
1665 rqc->rxRingSize[0] = adapter->rx_queue.rx_ring[0].size;
1666 rqc->rxRingSize[1] = adapter->rx_queue.rx_ring[1].size;
1667 rqc->compRingSize = adapter->rx_queue.comp_ring.size;
1668 rqc->ddLen = sizeof(struct vmxnet3_rx_buf_info) *
1669 (rqc->rxRingSize[0] + rqc->rxRingSize[1]);
1670 rqc->intrIdx = adapter->rx_queue.comp_ring.intr_idx;
1671
1672 /* intr settings */
1673 devRead->intrConf.autoMask = adapter->intr.mask_mode ==
1674 VMXNET3_IMM_AUTO;
1675 devRead->intrConf.numIntrs = adapter->intr.num_intrs;
1676 for (i = 0; i < adapter->intr.num_intrs; i++)
1677 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
1678
1679 devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
1680
1681 /* rx filter settings */
1682 devRead->rxFilterConf.rxMode = 0;
1683 vmxnet3_restore_vlan(adapter);
1684 /* the rest are already zeroed */
1685}
1686
1687
1688int
1689vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
1690{
1691 int err;
1692 u32 ret;
1693
1694 dev_dbg(&adapter->netdev->dev,
1695 "%s: skb_buf_size %d, rx_buf_per_pkt %d, ring sizes"
1696 " %u %u %u\n", adapter->netdev->name, adapter->skb_buf_size,
1697 adapter->rx_buf_per_pkt, adapter->tx_queue.tx_ring.size,
1698 adapter->rx_queue.rx_ring[0].size,
1699 adapter->rx_queue.rx_ring[1].size);
1700
1701 vmxnet3_tq_init(&adapter->tx_queue, adapter);
1702 err = vmxnet3_rq_init(&adapter->rx_queue, adapter);
1703 if (err) {
1704 printk(KERN_ERR "Failed to init rx queue for %s: error %d\n",
1705 adapter->netdev->name, err);
1706 goto rq_err;
1707 }
1708
1709 err = vmxnet3_request_irqs(adapter);
1710 if (err) {
1711 printk(KERN_ERR "Failed to setup irq for %s: error %d\n",
1712 adapter->netdev->name, err);
1713 goto irq_err;
1714 }
1715
1716 vmxnet3_setup_driver_shared(adapter);
1717
1718 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL,
1719 VMXNET3_GET_ADDR_LO(adapter->shared_pa));
1720 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH,
1721 VMXNET3_GET_ADDR_HI(adapter->shared_pa));
1722
1723 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1724 VMXNET3_CMD_ACTIVATE_DEV);
1725 ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
1726
1727 if (ret != 0) {
1728 printk(KERN_ERR "Failed to activate dev %s: error %u\n",
1729 adapter->netdev->name, ret);
1730 err = -EINVAL;
1731 goto activate_err;
1732 }
1733 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD,
1734 adapter->rx_queue.rx_ring[0].next2fill);
1735 VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_RXPROD2,
1736 adapter->rx_queue.rx_ring[1].next2fill);
1737
1738 /* Apply the rx filter settins last. */
1739 vmxnet3_set_mc(adapter->netdev);
1740
1741 /*
1742 * Check link state when first activating device. It will start the
1743 * tx queue if the link is up.
1744 */
1745 vmxnet3_check_link(adapter);
1746
1747 napi_enable(&adapter->napi);
1748 vmxnet3_enable_all_intrs(adapter);
1749 clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
1750 return 0;
1751
1752activate_err:
1753 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
1754 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
1755 vmxnet3_free_irqs(adapter);
1756irq_err:
1757rq_err:
1758 /* free up buffers we allocated */
1759 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1760 return err;
1761}
1762
1763
1764void
1765vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
1766{
1767 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
1768}
1769
1770
1771int
1772vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
1773{
1774 if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
1775 return 0;
1776
1777
1778 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1779 VMXNET3_CMD_QUIESCE_DEV);
1780 vmxnet3_disable_all_intrs(adapter);
1781
1782 napi_disable(&adapter->napi);
1783 netif_tx_disable(adapter->netdev);
1784 adapter->link_speed = 0;
1785 netif_carrier_off(adapter->netdev);
1786
1787 vmxnet3_tq_cleanup(&adapter->tx_queue, adapter);
1788 vmxnet3_rq_cleanup(&adapter->rx_queue, adapter);
1789 vmxnet3_free_irqs(adapter);
1790 return 0;
1791}
1792
1793
1794static void
1795vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
1796{
1797 u32 tmp;
1798
1799 tmp = *(u32 *)mac;
1800 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
1801
1802 tmp = (mac[5] << 8) | mac[4];
1803 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
1804}
1805
1806
1807static int
1808vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
1809{
1810 struct sockaddr *addr = p;
1811 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1812
1813 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1814 vmxnet3_write_mac_addr(adapter, addr->sa_data);
1815
1816 return 0;
1817}
1818
1819
1820/* ==================== initialization and cleanup routines ============ */
1821
1822static int
1823vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
1824{
1825 int err;
1826 unsigned long mmio_start, mmio_len;
1827 struct pci_dev *pdev = adapter->pdev;
1828
1829 err = pci_enable_device(pdev);
1830 if (err) {
1831 printk(KERN_ERR "Failed to enable adapter %s: error %d\n",
1832 pci_name(pdev), err);
1833 return err;
1834 }
1835
1836 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
1837 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
1838 printk(KERN_ERR "pci_set_consistent_dma_mask failed "
1839 "for adapter %s\n", pci_name(pdev));
1840 err = -EIO;
1841 goto err_set_mask;
1842 }
1843 *dma64 = true;
1844 } else {
1845 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
1846 printk(KERN_ERR "pci_set_dma_mask failed for adapter "
1847 "%s\n", pci_name(pdev));
1848 err = -EIO;
1849 goto err_set_mask;
1850 }
1851 *dma64 = false;
1852 }
1853
1854 err = pci_request_selected_regions(pdev, (1 << 2) - 1,
1855 vmxnet3_driver_name);
1856 if (err) {
1857 printk(KERN_ERR "Failed to request region for adapter %s: "
1858 "error %d\n", pci_name(pdev), err);
1859 goto err_set_mask;
1860 }
1861
1862 pci_set_master(pdev);
1863
1864 mmio_start = pci_resource_start(pdev, 0);
1865 mmio_len = pci_resource_len(pdev, 0);
1866 adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
1867 if (!adapter->hw_addr0) {
1868 printk(KERN_ERR "Failed to map bar0 for adapter %s\n",
1869 pci_name(pdev));
1870 err = -EIO;
1871 goto err_ioremap;
1872 }
1873
1874 mmio_start = pci_resource_start(pdev, 1);
1875 mmio_len = pci_resource_len(pdev, 1);
1876 adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
1877 if (!adapter->hw_addr1) {
1878 printk(KERN_ERR "Failed to map bar1 for adapter %s\n",
1879 pci_name(pdev));
1880 err = -EIO;
1881 goto err_bar1;
1882 }
1883 return 0;
1884
1885err_bar1:
1886 iounmap(adapter->hw_addr0);
1887err_ioremap:
1888 pci_release_selected_regions(pdev, (1 << 2) - 1);
1889err_set_mask:
1890 pci_disable_device(pdev);
1891 return err;
1892}
1893
1894
1895static void
1896vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
1897{
1898 BUG_ON(!adapter->pdev);
1899
1900 iounmap(adapter->hw_addr0);
1901 iounmap(adapter->hw_addr1);
1902 pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
1903 pci_disable_device(adapter->pdev);
1904}
1905
1906
1907static void
1908vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
1909{
1910 size_t sz;
1911
1912 if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
1913 VMXNET3_MAX_ETH_HDR_SIZE) {
1914 adapter->skb_buf_size = adapter->netdev->mtu +
1915 VMXNET3_MAX_ETH_HDR_SIZE;
1916 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
1917 adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
1918
1919 adapter->rx_buf_per_pkt = 1;
1920 } else {
1921 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
1922 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
1923 VMXNET3_MAX_ETH_HDR_SIZE;
1924 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
1925 }
1926
1927 /*
1928 * for simplicity, force the ring0 size to be a multiple of
1929 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
1930 */
1931 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
1932 adapter->rx_queue.rx_ring[0].size = (adapter->rx_queue.rx_ring[0].size +
1933 sz - 1) / sz * sz;
1934 adapter->rx_queue.rx_ring[0].size = min_t(u32,
1935 adapter->rx_queue.rx_ring[0].size,
1936 VMXNET3_RX_RING_MAX_SIZE / sz * sz);
1937}
1938
1939
1940int
1941vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
1942 u32 rx_ring_size, u32 rx_ring2_size)
1943{
1944 int err;
1945
1946 adapter->tx_queue.tx_ring.size = tx_ring_size;
1947 adapter->tx_queue.data_ring.size = tx_ring_size;
1948 adapter->tx_queue.comp_ring.size = tx_ring_size;
1949 adapter->tx_queue.shared = &adapter->tqd_start->ctrl;
1950 adapter->tx_queue.stopped = true;
1951 err = vmxnet3_tq_create(&adapter->tx_queue, adapter);
1952 if (err)
1953 return err;
1954
1955 adapter->rx_queue.rx_ring[0].size = rx_ring_size;
1956 adapter->rx_queue.rx_ring[1].size = rx_ring2_size;
1957 vmxnet3_adjust_rx_ring_size(adapter);
1958 adapter->rx_queue.comp_ring.size = adapter->rx_queue.rx_ring[0].size +
1959 adapter->rx_queue.rx_ring[1].size;
1960 adapter->rx_queue.qid = 0;
1961 adapter->rx_queue.qid2 = 1;
1962 adapter->rx_queue.shared = &adapter->rqd_start->ctrl;
1963 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
1964 if (err)
1965 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
1966
1967 return err;
1968}
1969
1970static int
1971vmxnet3_open(struct net_device *netdev)
1972{
1973 struct vmxnet3_adapter *adapter;
1974 int err;
1975
1976 adapter = netdev_priv(netdev);
1977
1978 spin_lock_init(&adapter->tx_queue.tx_lock);
1979
1980 err = vmxnet3_create_queues(adapter, VMXNET3_DEF_TX_RING_SIZE,
1981 VMXNET3_DEF_RX_RING_SIZE,
1982 VMXNET3_DEF_RX_RING_SIZE);
1983 if (err)
1984 goto queue_err;
1985
1986 err = vmxnet3_activate_dev(adapter);
1987 if (err)
1988 goto activate_err;
1989
1990 return 0;
1991
1992activate_err:
1993 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
1994 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
1995queue_err:
1996 return err;
1997}
1998
1999
2000static int
2001vmxnet3_close(struct net_device *netdev)
2002{
2003 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2004
2005 /*
2006 * Reset_work may be in the middle of resetting the device, wait for its
2007 * completion.
2008 */
2009 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2010 msleep(1);
2011
2012 vmxnet3_quiesce_dev(adapter);
2013
2014 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2015 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
2016
2017 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2018
2019
2020 return 0;
2021}
2022
2023
2024void
2025vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2026{
2027 /*
2028 * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2029 * vmxnet3_close() will deadlock.
2030 */
2031 BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2032
2033 /* we need to enable NAPI, otherwise dev_close will deadlock */
2034 napi_enable(&adapter->napi);
2035 dev_close(adapter->netdev);
2036}
2037
2038
2039static int
2040vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2041{
2042 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2043 int err = 0;
2044
2045 if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2046 return -EINVAL;
2047
2048 if (new_mtu > 1500 && !adapter->jumbo_frame)
2049 return -EINVAL;
2050
2051 netdev->mtu = new_mtu;
2052
2053 /*
2054 * Reset_work may be in the middle of resetting the device, wait for its
2055 * completion.
2056 */
2057 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2058 msleep(1);
2059
2060 if (netif_running(netdev)) {
2061 vmxnet3_quiesce_dev(adapter);
2062 vmxnet3_reset_dev(adapter);
2063
2064 /* we need to re-create the rx queue based on the new mtu */
2065 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
2066 vmxnet3_adjust_rx_ring_size(adapter);
2067 adapter->rx_queue.comp_ring.size =
2068 adapter->rx_queue.rx_ring[0].size +
2069 adapter->rx_queue.rx_ring[1].size;
2070 err = vmxnet3_rq_create(&adapter->rx_queue, adapter);
2071 if (err) {
2072 printk(KERN_ERR "%s: failed to re-create rx queue,"
2073 " error %d. Closing it.\n", netdev->name, err);
2074 goto out;
2075 }
2076
2077 err = vmxnet3_activate_dev(adapter);
2078 if (err) {
2079 printk(KERN_ERR "%s: failed to re-activate, error %d. "
2080 "Closing it\n", netdev->name, err);
2081 goto out;
2082 }
2083 }
2084
2085out:
2086 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2087 if (err)
2088 vmxnet3_force_close(adapter);
2089
2090 return err;
2091}
2092
2093
2094static void
2095vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2096{
2097 struct net_device *netdev = adapter->netdev;
2098
2099 netdev->features = NETIF_F_SG |
2100 NETIF_F_HW_CSUM |
2101 NETIF_F_HW_VLAN_TX |
2102 NETIF_F_HW_VLAN_RX |
2103 NETIF_F_HW_VLAN_FILTER |
2104 NETIF_F_TSO |
2105 NETIF_F_TSO6 |
2106 NETIF_F_LRO;
2107
2108 printk(KERN_INFO "features: sg csum vlan jf tso tsoIPv6 lro");
2109
2110 adapter->rxcsum = true;
2111 adapter->jumbo_frame = true;
2112 adapter->lro = true;
2113
2114 if (dma64) {
2115 netdev->features |= NETIF_F_HIGHDMA;
2116 printk(" highDMA");
2117 }
2118
2119 netdev->vlan_features = netdev->features;
2120 printk("\n");
2121}
2122
2123
2124static void
2125vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2126{
2127 u32 tmp;
2128
2129 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2130 *(u32 *)mac = tmp;
2131
2132 tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2133 mac[4] = tmp & 0xff;
2134 mac[5] = (tmp >> 8) & 0xff;
2135}
2136
2137
2138static void
2139vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2140{
2141 u32 cfg;
2142
2143 /* intr settings */
2144 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2145 VMXNET3_CMD_GET_CONF_INTR);
2146 cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2147 adapter->intr.type = cfg & 0x3;
2148 adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2149
2150 if (adapter->intr.type == VMXNET3_IT_AUTO) {
2151 int err;
2152
2153#ifdef CONFIG_PCI_MSI
2154 adapter->intr.msix_entries[0].entry = 0;
2155 err = pci_enable_msix(adapter->pdev, adapter->intr.msix_entries,
2156 VMXNET3_LINUX_MAX_MSIX_VECT);
2157 if (!err) {
2158 adapter->intr.num_intrs = 1;
2159 adapter->intr.type = VMXNET3_IT_MSIX;
2160 return;
2161 }
2162#endif
2163
2164 err = pci_enable_msi(adapter->pdev);
2165 if (!err) {
2166 adapter->intr.num_intrs = 1;
2167 adapter->intr.type = VMXNET3_IT_MSI;
2168 return;
2169 }
2170 }
2171
2172 adapter->intr.type = VMXNET3_IT_INTX;
2173
2174 /* INT-X related setting */
2175 adapter->intr.num_intrs = 1;
2176}
2177
2178
2179static void
2180vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2181{
2182 if (adapter->intr.type == VMXNET3_IT_MSIX)
2183 pci_disable_msix(adapter->pdev);
2184 else if (adapter->intr.type == VMXNET3_IT_MSI)
2185 pci_disable_msi(adapter->pdev);
2186 else
2187 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2188}
2189
2190
2191static void
2192vmxnet3_tx_timeout(struct net_device *netdev)
2193{
2194 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2195 adapter->tx_timeout_count++;
2196
2197 printk(KERN_ERR "%s: tx hang\n", adapter->netdev->name);
2198 schedule_work(&adapter->work);
2199}
2200
2201
2202static void
2203vmxnet3_reset_work(struct work_struct *data)
2204{
2205 struct vmxnet3_adapter *adapter;
2206
2207 adapter = container_of(data, struct vmxnet3_adapter, work);
2208
2209 /* if another thread is resetting the device, no need to proceed */
2210 if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2211 return;
2212
2213 /* if the device is closed, we must leave it alone */
2214 if (netif_running(adapter->netdev)) {
2215 printk(KERN_INFO "%s: resetting\n", adapter->netdev->name);
2216 vmxnet3_quiesce_dev(adapter);
2217 vmxnet3_reset_dev(adapter);
2218 vmxnet3_activate_dev(adapter);
2219 } else {
2220 printk(KERN_INFO "%s: already closed\n", adapter->netdev->name);
2221 }
2222
2223 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2224}
2225
2226
2227static int __devinit
2228vmxnet3_probe_device(struct pci_dev *pdev,
2229 const struct pci_device_id *id)
2230{
2231 static const struct net_device_ops vmxnet3_netdev_ops = {
2232 .ndo_open = vmxnet3_open,
2233 .ndo_stop = vmxnet3_close,
2234 .ndo_start_xmit = vmxnet3_xmit_frame,
2235 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2236 .ndo_change_mtu = vmxnet3_change_mtu,
2237 .ndo_get_stats = vmxnet3_get_stats,
2238 .ndo_tx_timeout = vmxnet3_tx_timeout,
2239 .ndo_set_multicast_list = vmxnet3_set_mc,
2240 .ndo_vlan_rx_register = vmxnet3_vlan_rx_register,
2241 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2242 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2243#ifdef CONFIG_NET_POLL_CONTROLLER
2244 .ndo_poll_controller = vmxnet3_netpoll,
2245#endif
2246 };
2247 int err;
2248 bool dma64 = false; /* stupid gcc */
2249 u32 ver;
2250 struct net_device *netdev;
2251 struct vmxnet3_adapter *adapter;
2252 u8 mac[ETH_ALEN];
2253
2254 netdev = alloc_etherdev(sizeof(struct vmxnet3_adapter));
2255 if (!netdev) {
2256 printk(KERN_ERR "Failed to alloc ethernet device for adapter "
2257 "%s\n", pci_name(pdev));
2258 return -ENOMEM;
2259 }
2260
2261 pci_set_drvdata(pdev, netdev);
2262 adapter = netdev_priv(netdev);
2263 adapter->netdev = netdev;
2264 adapter->pdev = pdev;
2265
2266 adapter->shared = pci_alloc_consistent(adapter->pdev,
2267 sizeof(struct Vmxnet3_DriverShared),
2268 &adapter->shared_pa);
2269 if (!adapter->shared) {
2270 printk(KERN_ERR "Failed to allocate memory for %s\n",
2271 pci_name(pdev));
2272 err = -ENOMEM;
2273 goto err_alloc_shared;
2274 }
2275
2276 adapter->tqd_start = pci_alloc_consistent(adapter->pdev,
2277 sizeof(struct Vmxnet3_TxQueueDesc) +
2278 sizeof(struct Vmxnet3_RxQueueDesc),
2279 &adapter->queue_desc_pa);
2280
2281 if (!adapter->tqd_start) {
2282 printk(KERN_ERR "Failed to allocate memory for %s\n",
2283 pci_name(pdev));
2284 err = -ENOMEM;
2285 goto err_alloc_queue_desc;
2286 }
2287 adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start
2288 + 1);
2289
2290 adapter->pm_conf = kmalloc(sizeof(struct Vmxnet3_PMConf), GFP_KERNEL);
2291 if (adapter->pm_conf == NULL) {
2292 printk(KERN_ERR "Failed to allocate memory for %s\n",
2293 pci_name(pdev));
2294 err = -ENOMEM;
2295 goto err_alloc_pm;
2296 }
2297
2298 err = vmxnet3_alloc_pci_resources(adapter, &dma64);
2299 if (err < 0)
2300 goto err_alloc_pci;
2301
2302 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
2303 if (ver & 1) {
2304 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
2305 } else {
2306 printk(KERN_ERR "Incompatible h/w version (0x%x) for adapter"
2307 " %s\n", ver, pci_name(pdev));
2308 err = -EBUSY;
2309 goto err_ver;
2310 }
2311
2312 ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
2313 if (ver & 1) {
2314 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
2315 } else {
2316 printk(KERN_ERR "Incompatible upt version (0x%x) for "
2317 "adapter %s\n", ver, pci_name(pdev));
2318 err = -EBUSY;
2319 goto err_ver;
2320 }
2321
2322 vmxnet3_declare_features(adapter, dma64);
2323
2324 adapter->dev_number = atomic_read(&devices_found);
2325 vmxnet3_alloc_intr_resources(adapter);
2326
2327 vmxnet3_read_mac_addr(adapter, mac);
2328 memcpy(netdev->dev_addr, mac, netdev->addr_len);
2329
2330 netdev->netdev_ops = &vmxnet3_netdev_ops;
2331 netdev->watchdog_timeo = 5 * HZ;
2332 vmxnet3_set_ethtool_ops(netdev);
2333
2334 INIT_WORK(&adapter->work, vmxnet3_reset_work);
2335
2336 netif_napi_add(netdev, &adapter->napi, vmxnet3_poll, 64);
2337 SET_NETDEV_DEV(netdev, &pdev->dev);
2338 err = register_netdev(netdev);
2339
2340 if (err) {
2341 printk(KERN_ERR "Failed to register adapter %s\n",
2342 pci_name(pdev));
2343 goto err_register;
2344 }
2345
2346 set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2347 atomic_inc(&devices_found);
2348 return 0;
2349
2350err_register:
2351 vmxnet3_free_intr_resources(adapter);
2352err_ver:
2353 vmxnet3_free_pci_resources(adapter);
2354err_alloc_pci:
2355 kfree(adapter->pm_conf);
2356err_alloc_pm:
2357 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2358 sizeof(struct Vmxnet3_RxQueueDesc),
2359 adapter->tqd_start, adapter->queue_desc_pa);
2360err_alloc_queue_desc:
2361 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2362 adapter->shared, adapter->shared_pa);
2363err_alloc_shared:
2364 pci_set_drvdata(pdev, NULL);
2365 free_netdev(netdev);
2366 return err;
2367}
2368
2369
2370static void __devexit
2371vmxnet3_remove_device(struct pci_dev *pdev)
2372{
2373 struct net_device *netdev = pci_get_drvdata(pdev);
2374 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2375
2376 flush_scheduled_work();
2377
2378 unregister_netdev(netdev);
2379
2380 vmxnet3_free_intr_resources(adapter);
2381 vmxnet3_free_pci_resources(adapter);
2382 kfree(adapter->pm_conf);
2383 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_TxQueueDesc) +
2384 sizeof(struct Vmxnet3_RxQueueDesc),
2385 adapter->tqd_start, adapter->queue_desc_pa);
2386 pci_free_consistent(adapter->pdev, sizeof(struct Vmxnet3_DriverShared),
2387 adapter->shared, adapter->shared_pa);
2388 free_netdev(netdev);
2389}
2390
2391
2392#ifdef CONFIG_PM
2393
2394static int
2395vmxnet3_suspend(struct device *device)
2396{
2397 struct pci_dev *pdev = to_pci_dev(device);
2398 struct net_device *netdev = pci_get_drvdata(pdev);
2399 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2400 struct Vmxnet3_PMConf *pmConf;
2401 struct ethhdr *ehdr;
2402 struct arphdr *ahdr;
2403 u8 *arpreq;
2404 struct in_device *in_dev;
2405 struct in_ifaddr *ifa;
2406 int i = 0;
2407
2408 if (!netif_running(netdev))
2409 return 0;
2410
2411 vmxnet3_disable_all_intrs(adapter);
2412 vmxnet3_free_irqs(adapter);
2413 vmxnet3_free_intr_resources(adapter);
2414
2415 netif_device_detach(netdev);
2416 netif_stop_queue(netdev);
2417
2418 /* Create wake-up filters. */
2419 pmConf = adapter->pm_conf;
2420 memset(pmConf, 0, sizeof(*pmConf));
2421
2422 if (adapter->wol & WAKE_UCAST) {
2423 pmConf->filters[i].patternSize = ETH_ALEN;
2424 pmConf->filters[i].maskSize = 1;
2425 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
2426 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
2427
2428 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
2429 i++;
2430 }
2431
2432 if (adapter->wol & WAKE_ARP) {
2433 in_dev = in_dev_get(netdev);
2434 if (!in_dev)
2435 goto skip_arp;
2436
2437 ifa = (struct in_ifaddr *)in_dev->ifa_list;
2438 if (!ifa)
2439 goto skip_arp;
2440
2441 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
2442 sizeof(struct arphdr) + /* ARP header */
2443 2 * ETH_ALEN + /* 2 Ethernet addresses*/
2444 2 * sizeof(u32); /*2 IPv4 addresses */
2445 pmConf->filters[i].maskSize =
2446 (pmConf->filters[i].patternSize - 1) / 8 + 1;
2447
2448 /* ETH_P_ARP in Ethernet header. */
2449 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
2450 ehdr->h_proto = htons(ETH_P_ARP);
2451
2452 /* ARPOP_REQUEST in ARP header. */
2453 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
2454 ahdr->ar_op = htons(ARPOP_REQUEST);
2455 arpreq = (u8 *)(ahdr + 1);
2456
2457 /* The Unicast IPv4 address in 'tip' field. */
2458 arpreq += 2 * ETH_ALEN + sizeof(u32);
2459 *(u32 *)arpreq = ifa->ifa_address;
2460
2461 /* The mask for the relevant bits. */
2462 pmConf->filters[i].mask[0] = 0x00;
2463 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
2464 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
2465 pmConf->filters[i].mask[3] = 0x00;
2466 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
2467 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
2468 in_dev_put(in_dev);
2469
2470 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
2471 i++;
2472 }
2473
2474skip_arp:
2475 if (adapter->wol & WAKE_MAGIC)
2476 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
2477
2478 pmConf->numFilters = i;
2479
2480 adapter->shared->devRead.pmConfDesc.confVer = 1;
2481 adapter->shared->devRead.pmConfDesc.confLen = sizeof(*pmConf);
2482 adapter->shared->devRead.pmConfDesc.confPA = virt_to_phys(pmConf);
2483
2484 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2485 VMXNET3_CMD_UPDATE_PMCFG);
2486
2487 pci_save_state(pdev);
2488 pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
2489 adapter->wol);
2490 pci_disable_device(pdev);
2491 pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
2492
2493 return 0;
2494}
2495
2496
2497static int
2498vmxnet3_resume(struct device *device)
2499{
2500 int err;
2501 struct pci_dev *pdev = to_pci_dev(device);
2502 struct net_device *netdev = pci_get_drvdata(pdev);
2503 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2504 struct Vmxnet3_PMConf *pmConf;
2505
2506 if (!netif_running(netdev))
2507 return 0;
2508
2509 /* Destroy wake-up filters. */
2510 pmConf = adapter->pm_conf;
2511 memset(pmConf, 0, sizeof(*pmConf));
2512
2513 adapter->shared->devRead.pmConfDesc.confVer = 1;
2514 adapter->shared->devRead.pmConfDesc.confLen = sizeof(*pmConf);
2515 adapter->shared->devRead.pmConfDesc.confPA = virt_to_phys(pmConf);
2516
2517 netif_device_attach(netdev);
2518 pci_set_power_state(pdev, PCI_D0);
2519 pci_restore_state(pdev);
2520 err = pci_enable_device_mem(pdev);
2521 if (err != 0)
2522 return err;
2523
2524 pci_enable_wake(pdev, PCI_D0, 0);
2525
2526 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2527 VMXNET3_CMD_UPDATE_PMCFG);
2528 vmxnet3_alloc_intr_resources(adapter);
2529 vmxnet3_request_irqs(adapter);
2530 vmxnet3_enable_all_intrs(adapter);
2531
2532 return 0;
2533}
2534
2535static struct dev_pm_ops vmxnet3_pm_ops = {
2536 .suspend = vmxnet3_suspend,
2537 .resume = vmxnet3_resume,
2538};
2539#endif
2540
2541static struct pci_driver vmxnet3_driver = {
2542 .name = vmxnet3_driver_name,
2543 .id_table = vmxnet3_pciid_table,
2544 .probe = vmxnet3_probe_device,
2545 .remove = __devexit_p(vmxnet3_remove_device),
2546#ifdef CONFIG_PM
2547 .driver.pm = &vmxnet3_pm_ops,
2548#endif
2549};
2550
2551
2552static int __init
2553vmxnet3_init_module(void)
2554{
2555 printk(KERN_INFO "%s - version %s\n", VMXNET3_DRIVER_DESC,
2556 VMXNET3_DRIVER_VERSION_REPORT);
2557 return pci_register_driver(&vmxnet3_driver);
2558}
2559
2560module_init(vmxnet3_init_module);
2561
2562
2563static void
2564vmxnet3_exit_module(void)
2565{
2566 pci_unregister_driver(&vmxnet3_driver);
2567}
2568
2569module_exit(vmxnet3_exit_module);
2570
2571MODULE_AUTHOR("VMware, Inc.");
2572MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
2573MODULE_LICENSE("GPL v2");
2574MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);
diff --git a/drivers/net/vmxnet3/vmxnet3_ethtool.c b/drivers/net/vmxnet3/vmxnet3_ethtool.c
new file mode 100644
index 000000000000..c2c15e4cafc7
--- /dev/null
+++ b/drivers/net/vmxnet3/vmxnet3_ethtool.c
@@ -0,0 +1,566 @@
1/*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24 *
25 */
26
27
28#include "vmxnet3_int.h"
29
30struct vmxnet3_stat_desc {
31 char desc[ETH_GSTRING_LEN];
32 int offset;
33};
34
35
36static u32
37vmxnet3_get_rx_csum(struct net_device *netdev)
38{
39 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
40 return adapter->rxcsum;
41}
42
43
44static int
45vmxnet3_set_rx_csum(struct net_device *netdev, u32 val)
46{
47 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
48
49 if (adapter->rxcsum != val) {
50 adapter->rxcsum = val;
51 if (netif_running(netdev)) {
52 if (val)
53 adapter->shared->devRead.misc.uptFeatures |=
54 UPT1_F_RXCSUM;
55 else
56 adapter->shared->devRead.misc.uptFeatures &=
57 ~UPT1_F_RXCSUM;
58
59 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
60 VMXNET3_CMD_UPDATE_FEATURE);
61 }
62 }
63 return 0;
64}
65
66
67/* per tq stats maintained by the device */
68static const struct vmxnet3_stat_desc
69vmxnet3_tq_dev_stats[] = {
70 /* description, offset */
71 { "TSO pkts tx", offsetof(struct UPT1_TxStats, TSOPktsTxOK) },
72 { "TSO bytes tx", offsetof(struct UPT1_TxStats, TSOBytesTxOK) },
73 { "ucast pkts tx", offsetof(struct UPT1_TxStats, ucastPktsTxOK) },
74 { "ucast bytes tx", offsetof(struct UPT1_TxStats, ucastBytesTxOK) },
75 { "mcast pkts tx", offsetof(struct UPT1_TxStats, mcastPktsTxOK) },
76 { "mcast bytes tx", offsetof(struct UPT1_TxStats, mcastBytesTxOK) },
77 { "bcast pkts tx", offsetof(struct UPT1_TxStats, bcastPktsTxOK) },
78 { "bcast bytes tx", offsetof(struct UPT1_TxStats, bcastBytesTxOK) },
79 { "pkts tx err", offsetof(struct UPT1_TxStats, pktsTxError) },
80 { "pkts tx discard", offsetof(struct UPT1_TxStats, pktsTxDiscard) },
81};
82
83/* per tq stats maintained by the driver */
84static const struct vmxnet3_stat_desc
85vmxnet3_tq_driver_stats[] = {
86 /* description, offset */
87 {"drv dropped tx total", offsetof(struct vmxnet3_tq_driver_stats,
88 drop_total) },
89 { " too many frags", offsetof(struct vmxnet3_tq_driver_stats,
90 drop_too_many_frags) },
91 { " giant hdr", offsetof(struct vmxnet3_tq_driver_stats,
92 drop_oversized_hdr) },
93 { " hdr err", offsetof(struct vmxnet3_tq_driver_stats,
94 drop_hdr_inspect_err) },
95 { " tso", offsetof(struct vmxnet3_tq_driver_stats,
96 drop_tso) },
97 { "ring full", offsetof(struct vmxnet3_tq_driver_stats,
98 tx_ring_full) },
99 { "pkts linearized", offsetof(struct vmxnet3_tq_driver_stats,
100 linearized) },
101 { "hdr cloned", offsetof(struct vmxnet3_tq_driver_stats,
102 copy_skb_header) },
103 { "giant hdr", offsetof(struct vmxnet3_tq_driver_stats,
104 oversized_hdr) },
105};
106
107/* per rq stats maintained by the device */
108static const struct vmxnet3_stat_desc
109vmxnet3_rq_dev_stats[] = {
110 { "LRO pkts rx", offsetof(struct UPT1_RxStats, LROPktsRxOK) },
111 { "LRO byte rx", offsetof(struct UPT1_RxStats, LROBytesRxOK) },
112 { "ucast pkts rx", offsetof(struct UPT1_RxStats, ucastPktsRxOK) },
113 { "ucast bytes rx", offsetof(struct UPT1_RxStats, ucastBytesRxOK) },
114 { "mcast pkts rx", offsetof(struct UPT1_RxStats, mcastPktsRxOK) },
115 { "mcast bytes rx", offsetof(struct UPT1_RxStats, mcastBytesRxOK) },
116 { "bcast pkts rx", offsetof(struct UPT1_RxStats, bcastPktsRxOK) },
117 { "bcast bytes rx", offsetof(struct UPT1_RxStats, bcastBytesRxOK) },
118 { "pkts rx out of buf", offsetof(struct UPT1_RxStats, pktsRxOutOfBuf) },
119 { "pkts rx err", offsetof(struct UPT1_RxStats, pktsRxError) },
120};
121
122/* per rq stats maintained by the driver */
123static const struct vmxnet3_stat_desc
124vmxnet3_rq_driver_stats[] = {
125 /* description, offset */
126 { "drv dropped rx total", offsetof(struct vmxnet3_rq_driver_stats,
127 drop_total) },
128 { " err", offsetof(struct vmxnet3_rq_driver_stats,
129 drop_err) },
130 { " fcs", offsetof(struct vmxnet3_rq_driver_stats,
131 drop_fcs) },
132 { "rx buf alloc fail", offsetof(struct vmxnet3_rq_driver_stats,
133 rx_buf_alloc_failure) },
134};
135
136/* gloabl stats maintained by the driver */
137static const struct vmxnet3_stat_desc
138vmxnet3_global_stats[] = {
139 /* description, offset */
140 { "tx timeout count", offsetof(struct vmxnet3_adapter,
141 tx_timeout_count) }
142};
143
144
145struct net_device_stats *
146vmxnet3_get_stats(struct net_device *netdev)
147{
148 struct vmxnet3_adapter *adapter;
149 struct vmxnet3_tq_driver_stats *drvTxStats;
150 struct vmxnet3_rq_driver_stats *drvRxStats;
151 struct UPT1_TxStats *devTxStats;
152 struct UPT1_RxStats *devRxStats;
153 struct net_device_stats *net_stats = &netdev->stats;
154
155 adapter = netdev_priv(netdev);
156
157 /* Collect the dev stats into the shared area */
158 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
159
160 /* Assuming that we have a single queue device */
161 devTxStats = &adapter->tqd_start->stats;
162 devRxStats = &adapter->rqd_start->stats;
163
164 /* Get access to the driver stats per queue */
165 drvTxStats = &adapter->tx_queue.stats;
166 drvRxStats = &adapter->rx_queue.stats;
167
168 memset(net_stats, 0, sizeof(*net_stats));
169
170 net_stats->rx_packets = devRxStats->ucastPktsRxOK +
171 devRxStats->mcastPktsRxOK +
172 devRxStats->bcastPktsRxOK;
173
174 net_stats->tx_packets = devTxStats->ucastPktsTxOK +
175 devTxStats->mcastPktsTxOK +
176 devTxStats->bcastPktsTxOK;
177
178 net_stats->rx_bytes = devRxStats->ucastBytesRxOK +
179 devRxStats->mcastBytesRxOK +
180 devRxStats->bcastBytesRxOK;
181
182 net_stats->tx_bytes = devTxStats->ucastBytesTxOK +
183 devTxStats->mcastBytesTxOK +
184 devTxStats->bcastBytesTxOK;
185
186 net_stats->rx_errors = devRxStats->pktsRxError;
187 net_stats->tx_errors = devTxStats->pktsTxError;
188 net_stats->rx_dropped = drvRxStats->drop_total;
189 net_stats->tx_dropped = drvTxStats->drop_total;
190 net_stats->multicast = devRxStats->mcastPktsRxOK;
191
192 return net_stats;
193}
194
195static int
196vmxnet3_get_sset_count(struct net_device *netdev, int sset)
197{
198 switch (sset) {
199 case ETH_SS_STATS:
200 return ARRAY_SIZE(vmxnet3_tq_dev_stats) +
201 ARRAY_SIZE(vmxnet3_tq_driver_stats) +
202 ARRAY_SIZE(vmxnet3_rq_dev_stats) +
203 ARRAY_SIZE(vmxnet3_rq_driver_stats) +
204 ARRAY_SIZE(vmxnet3_global_stats);
205 default:
206 return -EOPNOTSUPP;
207 }
208}
209
210
211static int
212vmxnet3_get_regs_len(struct net_device *netdev)
213{
214 return 20 * sizeof(u32);
215}
216
217
218static void
219vmxnet3_get_drvinfo(struct net_device *netdev, struct ethtool_drvinfo *drvinfo)
220{
221 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
222
223 strlcpy(drvinfo->driver, vmxnet3_driver_name, sizeof(drvinfo->driver));
224 drvinfo->driver[sizeof(drvinfo->driver) - 1] = '\0';
225
226 strlcpy(drvinfo->version, VMXNET3_DRIVER_VERSION_REPORT,
227 sizeof(drvinfo->version));
228 drvinfo->driver[sizeof(drvinfo->version) - 1] = '\0';
229
230 strlcpy(drvinfo->fw_version, "N/A", sizeof(drvinfo->fw_version));
231 drvinfo->fw_version[sizeof(drvinfo->fw_version) - 1] = '\0';
232
233 strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
234 ETHTOOL_BUSINFO_LEN);
235 drvinfo->n_stats = vmxnet3_get_sset_count(netdev, ETH_SS_STATS);
236 drvinfo->testinfo_len = 0;
237 drvinfo->eedump_len = 0;
238 drvinfo->regdump_len = vmxnet3_get_regs_len(netdev);
239}
240
241
242static void
243vmxnet3_get_strings(struct net_device *netdev, u32 stringset, u8 *buf)
244{
245 if (stringset == ETH_SS_STATS) {
246 int i;
247
248 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++) {
249 memcpy(buf, vmxnet3_tq_dev_stats[i].desc,
250 ETH_GSTRING_LEN);
251 buf += ETH_GSTRING_LEN;
252 }
253 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++) {
254 memcpy(buf, vmxnet3_tq_driver_stats[i].desc,
255 ETH_GSTRING_LEN);
256 buf += ETH_GSTRING_LEN;
257 }
258 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++) {
259 memcpy(buf, vmxnet3_rq_dev_stats[i].desc,
260 ETH_GSTRING_LEN);
261 buf += ETH_GSTRING_LEN;
262 }
263 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++) {
264 memcpy(buf, vmxnet3_rq_driver_stats[i].desc,
265 ETH_GSTRING_LEN);
266 buf += ETH_GSTRING_LEN;
267 }
268 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++) {
269 memcpy(buf, vmxnet3_global_stats[i].desc,
270 ETH_GSTRING_LEN);
271 buf += ETH_GSTRING_LEN;
272 }
273 }
274}
275
276static u32
277vmxnet3_get_flags(struct net_device *netdev) {
278 return netdev->features;
279}
280
281static int
282vmxnet3_set_flags(struct net_device *netdev, u32 data) {
283 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
284 u8 lro_requested = (data & ETH_FLAG_LRO) == 0 ? 0 : 1;
285 u8 lro_present = (netdev->features & NETIF_F_LRO) == 0 ? 0 : 1;
286
287 if (lro_requested ^ lro_present) {
288 /* toggle the LRO feature*/
289 netdev->features ^= NETIF_F_LRO;
290
291 /* update harware LRO capability accordingly */
292 if (lro_requested)
293 adapter->shared->devRead.misc.uptFeatures &= UPT1_F_LRO;
294 else
295 adapter->shared->devRead.misc.uptFeatures &=
296 ~UPT1_F_LRO;
297 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
298 VMXNET3_CMD_UPDATE_FEATURE);
299 }
300 return 0;
301}
302
303static void
304vmxnet3_get_ethtool_stats(struct net_device *netdev,
305 struct ethtool_stats *stats, u64 *buf)
306{
307 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
308 u8 *base;
309 int i;
310
311 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
312
313 /* this does assume each counter is 64-bit wide */
314
315 base = (u8 *)&adapter->tqd_start->stats;
316 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_dev_stats); i++)
317 *buf++ = *(u64 *)(base + vmxnet3_tq_dev_stats[i].offset);
318
319 base = (u8 *)&adapter->tx_queue.stats;
320 for (i = 0; i < ARRAY_SIZE(vmxnet3_tq_driver_stats); i++)
321 *buf++ = *(u64 *)(base + vmxnet3_tq_driver_stats[i].offset);
322
323 base = (u8 *)&adapter->rqd_start->stats;
324 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_dev_stats); i++)
325 *buf++ = *(u64 *)(base + vmxnet3_rq_dev_stats[i].offset);
326
327 base = (u8 *)&adapter->rx_queue.stats;
328 for (i = 0; i < ARRAY_SIZE(vmxnet3_rq_driver_stats); i++)
329 *buf++ = *(u64 *)(base + vmxnet3_rq_driver_stats[i].offset);
330
331 base = (u8 *)adapter;
332 for (i = 0; i < ARRAY_SIZE(vmxnet3_global_stats); i++)
333 *buf++ = *(u64 *)(base + vmxnet3_global_stats[i].offset);
334}
335
336
337static void
338vmxnet3_get_regs(struct net_device *netdev, struct ethtool_regs *regs, void *p)
339{
340 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
341 u32 *buf = p;
342
343 memset(p, 0, vmxnet3_get_regs_len(netdev));
344
345 regs->version = 1;
346
347 /* Update vmxnet3_get_regs_len if we want to dump more registers */
348
349 /* make each ring use multiple of 16 bytes */
350 buf[0] = adapter->tx_queue.tx_ring.next2fill;
351 buf[1] = adapter->tx_queue.tx_ring.next2comp;
352 buf[2] = adapter->tx_queue.tx_ring.gen;
353 buf[3] = 0;
354
355 buf[4] = adapter->tx_queue.comp_ring.next2proc;
356 buf[5] = adapter->tx_queue.comp_ring.gen;
357 buf[6] = adapter->tx_queue.stopped;
358 buf[7] = 0;
359
360 buf[8] = adapter->rx_queue.rx_ring[0].next2fill;
361 buf[9] = adapter->rx_queue.rx_ring[0].next2comp;
362 buf[10] = adapter->rx_queue.rx_ring[0].gen;
363 buf[11] = 0;
364
365 buf[12] = adapter->rx_queue.rx_ring[1].next2fill;
366 buf[13] = adapter->rx_queue.rx_ring[1].next2comp;
367 buf[14] = adapter->rx_queue.rx_ring[1].gen;
368 buf[15] = 0;
369
370 buf[16] = adapter->rx_queue.comp_ring.next2proc;
371 buf[17] = adapter->rx_queue.comp_ring.gen;
372 buf[18] = 0;
373 buf[19] = 0;
374}
375
376
377static void
378vmxnet3_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
379{
380 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
381
382 wol->supported = WAKE_UCAST | WAKE_ARP | WAKE_MAGIC;
383 wol->wolopts = adapter->wol;
384}
385
386
387static int
388vmxnet3_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
389{
390 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
391
392 if (wol->wolopts & (WAKE_PHY | WAKE_MCAST | WAKE_BCAST |
393 WAKE_MAGICSECURE)) {
394 return -EOPNOTSUPP;
395 }
396
397 adapter->wol = wol->wolopts;
398
399 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
400
401 return 0;
402}
403
404
405static int
406vmxnet3_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
407{
408 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
409
410 ecmd->supported = SUPPORTED_10000baseT_Full | SUPPORTED_1000baseT_Full |
411 SUPPORTED_TP;
412 ecmd->advertising = ADVERTISED_TP;
413 ecmd->port = PORT_TP;
414 ecmd->transceiver = XCVR_INTERNAL;
415
416 if (adapter->link_speed) {
417 ecmd->speed = adapter->link_speed;
418 ecmd->duplex = DUPLEX_FULL;
419 } else {
420 ecmd->speed = -1;
421 ecmd->duplex = -1;
422 }
423 return 0;
424}
425
426
427static void
428vmxnet3_get_ringparam(struct net_device *netdev,
429 struct ethtool_ringparam *param)
430{
431 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
432
433 param->rx_max_pending = VMXNET3_RX_RING_MAX_SIZE;
434 param->tx_max_pending = VMXNET3_TX_RING_MAX_SIZE;
435 param->rx_mini_max_pending = 0;
436 param->rx_jumbo_max_pending = 0;
437
438 param->rx_pending = adapter->rx_queue.rx_ring[0].size;
439 param->tx_pending = adapter->tx_queue.tx_ring.size;
440 param->rx_mini_pending = 0;
441 param->rx_jumbo_pending = 0;
442}
443
444
445static int
446vmxnet3_set_ringparam(struct net_device *netdev,
447 struct ethtool_ringparam *param)
448{
449 struct vmxnet3_adapter *adapter = netdev_priv(netdev);
450 u32 new_tx_ring_size, new_rx_ring_size;
451 u32 sz;
452 int err = 0;
453
454 if (param->tx_pending == 0 || param->tx_pending >
455 VMXNET3_TX_RING_MAX_SIZE)
456 return -EINVAL;
457
458 if (param->rx_pending == 0 || param->rx_pending >
459 VMXNET3_RX_RING_MAX_SIZE)
460 return -EINVAL;
461
462
463 /* round it up to a multiple of VMXNET3_RING_SIZE_ALIGN */
464 new_tx_ring_size = (param->tx_pending + VMXNET3_RING_SIZE_MASK) &
465 ~VMXNET3_RING_SIZE_MASK;
466 new_tx_ring_size = min_t(u32, new_tx_ring_size,
467 VMXNET3_TX_RING_MAX_SIZE);
468 if (new_tx_ring_size > VMXNET3_TX_RING_MAX_SIZE || (new_tx_ring_size %
469 VMXNET3_RING_SIZE_ALIGN) != 0)
470 return -EINVAL;
471
472 /* ring0 has to be a multiple of
473 * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
474 */
475 sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
476 new_rx_ring_size = (param->rx_pending + sz - 1) / sz * sz;
477 new_rx_ring_size = min_t(u32, new_rx_ring_size,
478 VMXNET3_RX_RING_MAX_SIZE / sz * sz);
479 if (new_rx_ring_size > VMXNET3_RX_RING_MAX_SIZE || (new_rx_ring_size %
480 sz) != 0)
481 return -EINVAL;
482
483 if (new_tx_ring_size == adapter->tx_queue.tx_ring.size &&
484 new_rx_ring_size == adapter->rx_queue.rx_ring[0].size) {
485 return 0;
486 }
487
488 /*
489 * Reset_work may be in the middle of resetting the device, wait for its
490 * completion.
491 */
492 while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
493 msleep(1);
494
495 if (netif_running(netdev)) {
496 vmxnet3_quiesce_dev(adapter);
497 vmxnet3_reset_dev(adapter);
498
499 /* recreate the rx queue and the tx queue based on the
500 * new sizes */
501 vmxnet3_tq_destroy(&adapter->tx_queue, adapter);
502 vmxnet3_rq_destroy(&adapter->rx_queue, adapter);
503
504 err = vmxnet3_create_queues(adapter, new_tx_ring_size,
505 new_rx_ring_size, VMXNET3_DEF_RX_RING_SIZE);
506 if (err) {
507 /* failed, most likely because of OOM, try default
508 * size */
509 printk(KERN_ERR "%s: failed to apply new sizes, try the"
510 " default ones\n", netdev->name);
511 err = vmxnet3_create_queues(adapter,
512 VMXNET3_DEF_TX_RING_SIZE,
513 VMXNET3_DEF_RX_RING_SIZE,
514 VMXNET3_DEF_RX_RING_SIZE);
515 if (err) {
516 printk(KERN_ERR "%s: failed to create queues "
517 "with default sizes. Closing it\n",
518 netdev->name);
519 goto out;
520 }
521 }
522
523 err = vmxnet3_activate_dev(adapter);
524 if (err)
525 printk(KERN_ERR "%s: failed to re-activate, error %d."
526 " Closing it\n", netdev->name, err);
527 }
528
529out:
530 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
531 if (err)
532 vmxnet3_force_close(adapter);
533
534 return err;
535}
536
537
538static struct ethtool_ops vmxnet3_ethtool_ops = {
539 .get_settings = vmxnet3_get_settings,
540 .get_drvinfo = vmxnet3_get_drvinfo,
541 .get_regs_len = vmxnet3_get_regs_len,
542 .get_regs = vmxnet3_get_regs,
543 .get_wol = vmxnet3_get_wol,
544 .set_wol = vmxnet3_set_wol,
545 .get_link = ethtool_op_get_link,
546 .get_rx_csum = vmxnet3_get_rx_csum,
547 .set_rx_csum = vmxnet3_set_rx_csum,
548 .get_tx_csum = ethtool_op_get_tx_csum,
549 .set_tx_csum = ethtool_op_set_tx_hw_csum,
550 .get_sg = ethtool_op_get_sg,
551 .set_sg = ethtool_op_set_sg,
552 .get_tso = ethtool_op_get_tso,
553 .set_tso = ethtool_op_set_tso,
554 .get_strings = vmxnet3_get_strings,
555 .get_flags = vmxnet3_get_flags,
556 .set_flags = vmxnet3_set_flags,
557 .get_sset_count = vmxnet3_get_sset_count,
558 .get_ethtool_stats = vmxnet3_get_ethtool_stats,
559 .get_ringparam = vmxnet3_get_ringparam,
560 .set_ringparam = vmxnet3_set_ringparam,
561};
562
563void vmxnet3_set_ethtool_ops(struct net_device *netdev)
564{
565 SET_ETHTOOL_OPS(netdev, &vmxnet3_ethtool_ops);
566}
diff --git a/drivers/net/vmxnet3/vmxnet3_int.h b/drivers/net/vmxnet3/vmxnet3_int.h
new file mode 100644
index 000000000000..3c0d70d58111
--- /dev/null
+++ b/drivers/net/vmxnet3/vmxnet3_int.h
@@ -0,0 +1,389 @@
1/*
2 * Linux driver for VMware's vmxnet3 ethernet NIC.
3 *
4 * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; version 2 of the License and no later version.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
13 * NON INFRINGEMENT. See the GNU General Public License for more
14 * details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * The full GNU General Public License is included in this distribution in
21 * the file called "COPYING".
22 *
23 * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
24 *
25 */
26
27#ifndef _VMXNET3_INT_H
28#define _VMXNET3_INT_H
29
30#include <linux/types.h>
31#include <linux/ethtool.h>
32#include <linux/delay.h>
33#include <linux/device.h>
34#include <linux/netdevice.h>
35#include <linux/pci.h>
36#include <linux/ethtool.h>
37#include <linux/compiler.h>
38#include <linux/module.h>
39#include <linux/moduleparam.h>
40#include <linux/slab.h>
41#include <linux/spinlock.h>
42#include <linux/ioport.h>
43#include <linux/highmem.h>
44#include <linux/init.h>
45#include <linux/timer.h>
46#include <linux/skbuff.h>
47#include <linux/interrupt.h>
48#include <linux/workqueue.h>
49#include <linux/uaccess.h>
50#include <asm/dma.h>
51#include <asm/page.h>
52
53#include <linux/tcp.h>
54#include <linux/udp.h>
55#include <linux/ip.h>
56#include <linux/ipv6.h>
57#include <linux/in.h>
58#include <linux/etherdevice.h>
59#include <asm/checksum.h>
60#include <linux/if_vlan.h>
61#include <linux/if_arp.h>
62#include <linux/inetdevice.h>
63
64#include "vmxnet3_defs.h"
65
66#ifdef DEBUG
67# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI(debug)"
68#else
69# define VMXNET3_DRIVER_VERSION_REPORT VMXNET3_DRIVER_VERSION_STRING"-NAPI"
70#endif
71
72
73/*
74 * Version numbers
75 */
76#define VMXNET3_DRIVER_VERSION_STRING "1.0.5.0-k"
77
78/* a 32-bit int, each byte encode a verion number in VMXNET3_DRIVER_VERSION */
79#define VMXNET3_DRIVER_VERSION_NUM 0x01000500
80
81
82/*
83 * Capabilities
84 */
85
86enum {
87 VMNET_CAP_SG = 0x0001, /* Can do scatter-gather transmits. */
88 VMNET_CAP_IP4_CSUM = 0x0002, /* Can checksum only TCP/UDP over
89 * IPv4 */
90 VMNET_CAP_HW_CSUM = 0x0004, /* Can checksum all packets. */
91 VMNET_CAP_HIGH_DMA = 0x0008, /* Can DMA to high memory. */
92 VMNET_CAP_TOE = 0x0010, /* Supports TCP/IP offload. */
93 VMNET_CAP_TSO = 0x0020, /* Supports TCP Segmentation
94 * offload */
95 VMNET_CAP_SW_TSO = 0x0040, /* Supports SW TCP Segmentation */
96 VMNET_CAP_VMXNET_APROM = 0x0080, /* Vmxnet APROM support */
97 VMNET_CAP_HW_TX_VLAN = 0x0100, /* Can we do VLAN tagging in HW */
98 VMNET_CAP_HW_RX_VLAN = 0x0200, /* Can we do VLAN untagging in HW */
99 VMNET_CAP_SW_VLAN = 0x0400, /* VLAN tagging/untagging in SW */
100 VMNET_CAP_WAKE_PCKT_RCV = 0x0800, /* Can wake on network packet recv? */
101 VMNET_CAP_ENABLE_INT_INLINE = 0x1000, /* Enable Interrupt Inline */
102 VMNET_CAP_ENABLE_HEADER_COPY = 0x2000, /* copy header for vmkernel */
103 VMNET_CAP_TX_CHAIN = 0x4000, /* Guest can use multiple tx entries
104 * for a pkt */
105 VMNET_CAP_RX_CHAIN = 0x8000, /* pkt can span multiple rx entries */
106 VMNET_CAP_LPD = 0x10000, /* large pkt delivery */
107 VMNET_CAP_BPF = 0x20000, /* BPF Support in VMXNET Virtual HW*/
108 VMNET_CAP_SG_SPAN_PAGES = 0x40000, /* Scatter-gather can span multiple*/
109 /* pages transmits */
110 VMNET_CAP_IP6_CSUM = 0x80000, /* Can do IPv6 csum offload. */
111 VMNET_CAP_TSO6 = 0x100000, /* TSO seg. offload for IPv6 pkts. */
112 VMNET_CAP_TSO256k = 0x200000, /* Can do TSO seg offload for */
113 /* pkts up to 256kB. */
114 VMNET_CAP_UPT = 0x400000 /* Support UPT */
115};
116
117/*
118 * PCI vendor and device IDs.
119 */
120#define PCI_VENDOR_ID_VMWARE 0x15AD
121#define PCI_DEVICE_ID_VMWARE_VMXNET3 0x07B0
122#define MAX_ETHERNET_CARDS 10
123#define MAX_PCI_PASSTHRU_DEVICE 6
124
125struct vmxnet3_cmd_ring {
126 union Vmxnet3_GenericDesc *base;
127 u32 size;
128 u32 next2fill;
129 u32 next2comp;
130 u8 gen;
131 dma_addr_t basePA;
132};
133
134static inline void
135vmxnet3_cmd_ring_adv_next2fill(struct vmxnet3_cmd_ring *ring)
136{
137 ring->next2fill++;
138 if (unlikely(ring->next2fill == ring->size)) {
139 ring->next2fill = 0;
140 VMXNET3_FLIP_RING_GEN(ring->gen);
141 }
142}
143
144static inline void
145vmxnet3_cmd_ring_adv_next2comp(struct vmxnet3_cmd_ring *ring)
146{
147 VMXNET3_INC_RING_IDX_ONLY(ring->next2comp, ring->size);
148}
149
150static inline int
151vmxnet3_cmd_ring_desc_avail(struct vmxnet3_cmd_ring *ring)
152{
153 return (ring->next2comp > ring->next2fill ? 0 : ring->size) +
154 ring->next2comp - ring->next2fill - 1;
155}
156
157struct vmxnet3_comp_ring {
158 union Vmxnet3_GenericDesc *base;
159 u32 size;
160 u32 next2proc;
161 u8 gen;
162 u8 intr_idx;
163 dma_addr_t basePA;
164};
165
166static inline void
167vmxnet3_comp_ring_adv_next2proc(struct vmxnet3_comp_ring *ring)
168{
169 ring->next2proc++;
170 if (unlikely(ring->next2proc == ring->size)) {
171 ring->next2proc = 0;
172 VMXNET3_FLIP_RING_GEN(ring->gen);
173 }
174}
175
176struct vmxnet3_tx_data_ring {
177 struct Vmxnet3_TxDataDesc *base;
178 u32 size;
179 dma_addr_t basePA;
180};
181
182enum vmxnet3_buf_map_type {
183 VMXNET3_MAP_INVALID = 0,
184 VMXNET3_MAP_NONE,
185 VMXNET3_MAP_SINGLE,
186 VMXNET3_MAP_PAGE,
187};
188
189struct vmxnet3_tx_buf_info {
190 u32 map_type;
191 u16 len;
192 u16 sop_idx;
193 dma_addr_t dma_addr;
194 struct sk_buff *skb;
195};
196
197struct vmxnet3_tq_driver_stats {
198 u64 drop_total; /* # of pkts dropped by the driver, the
199 * counters below track droppings due to
200 * different reasons
201 */
202 u64 drop_too_many_frags;
203 u64 drop_oversized_hdr;
204 u64 drop_hdr_inspect_err;
205 u64 drop_tso;
206
207 u64 tx_ring_full;
208 u64 linearized; /* # of pkts linearized */
209 u64 copy_skb_header; /* # of times we have to copy skb header */
210 u64 oversized_hdr;
211};
212
213struct vmxnet3_tx_ctx {
214 bool ipv4;
215 u16 mss;
216 u32 eth_ip_hdr_size; /* only valid for pkts requesting tso or csum
217 * offloading
218 */
219 u32 l4_hdr_size; /* only valid if mss != 0 */
220 u32 copy_size; /* # of bytes copied into the data ring */
221 union Vmxnet3_GenericDesc *sop_txd;
222 union Vmxnet3_GenericDesc *eop_txd;
223};
224
225struct vmxnet3_tx_queue {
226 spinlock_t tx_lock;
227 struct vmxnet3_cmd_ring tx_ring;
228 struct vmxnet3_tx_buf_info *buf_info;
229 struct vmxnet3_tx_data_ring data_ring;
230 struct vmxnet3_comp_ring comp_ring;
231 struct Vmxnet3_TxQueueCtrl *shared;
232 struct vmxnet3_tq_driver_stats stats;
233 bool stopped;
234 int num_stop; /* # of times the queue is
235 * stopped */
236} __attribute__((__aligned__(SMP_CACHE_BYTES)));
237
238enum vmxnet3_rx_buf_type {
239 VMXNET3_RX_BUF_NONE = 0,
240 VMXNET3_RX_BUF_SKB = 1,
241 VMXNET3_RX_BUF_PAGE = 2
242};
243
244struct vmxnet3_rx_buf_info {
245 enum vmxnet3_rx_buf_type buf_type;
246 u16 len;
247 union {
248 struct sk_buff *skb;
249 struct page *page;
250 };
251 dma_addr_t dma_addr;
252};
253
254struct vmxnet3_rx_ctx {
255 struct sk_buff *skb;
256 u32 sop_idx;
257};
258
259struct vmxnet3_rq_driver_stats {
260 u64 drop_total;
261 u64 drop_err;
262 u64 drop_fcs;
263 u64 rx_buf_alloc_failure;
264};
265
266struct vmxnet3_rx_queue {
267 struct vmxnet3_cmd_ring rx_ring[2];
268 struct vmxnet3_comp_ring comp_ring;
269 struct vmxnet3_rx_ctx rx_ctx;
270 u32 qid; /* rqID in RCD for buffer from 1st ring */
271 u32 qid2; /* rqID in RCD for buffer from 2nd ring */
272 u32 uncommitted[2]; /* # of buffers allocated since last RXPROD
273 * update */
274 struct vmxnet3_rx_buf_info *buf_info[2];
275 struct Vmxnet3_RxQueueCtrl *shared;
276 struct vmxnet3_rq_driver_stats stats;
277} __attribute__((__aligned__(SMP_CACHE_BYTES)));
278
279#define VMXNET3_LINUX_MAX_MSIX_VECT 1
280
281struct vmxnet3_intr {
282 enum vmxnet3_intr_mask_mode mask_mode;
283 enum vmxnet3_intr_type type; /* MSI-X, MSI, or INTx? */
284 u8 num_intrs; /* # of intr vectors */
285 u8 event_intr_idx; /* idx of the intr vector for event */
286 u8 mod_levels[VMXNET3_LINUX_MAX_MSIX_VECT]; /* moderation level */
287#ifdef CONFIG_PCI_MSI
288 struct msix_entry msix_entries[VMXNET3_LINUX_MAX_MSIX_VECT];
289#endif
290};
291
292#define VMXNET3_STATE_BIT_RESETTING 0
293#define VMXNET3_STATE_BIT_QUIESCED 1
294struct vmxnet3_adapter {
295 struct vmxnet3_tx_queue tx_queue;
296 struct vmxnet3_rx_queue rx_queue;
297 struct napi_struct napi;
298 struct vlan_group *vlan_grp;
299
300 struct vmxnet3_intr intr;
301
302 struct Vmxnet3_DriverShared *shared;
303 struct Vmxnet3_PMConf *pm_conf;
304 struct Vmxnet3_TxQueueDesc *tqd_start; /* first tx queue desc */
305 struct Vmxnet3_RxQueueDesc *rqd_start; /* first rx queue desc */
306 struct net_device *netdev;
307 struct pci_dev *pdev;
308
309 u8 *hw_addr0; /* for BAR 0 */
310 u8 *hw_addr1; /* for BAR 1 */
311
312 /* feature control */
313 bool rxcsum;
314 bool lro;
315 bool jumbo_frame;
316
317 /* rx buffer related */
318 unsigned skb_buf_size;
319 int rx_buf_per_pkt; /* only apply to the 1st ring */
320 dma_addr_t shared_pa;
321 dma_addr_t queue_desc_pa;
322
323 /* Wake-on-LAN */
324 u32 wol;
325
326 /* Link speed */
327 u32 link_speed; /* in mbps */
328
329 u64 tx_timeout_count;
330 struct work_struct work;
331
332 unsigned long state; /* VMXNET3_STATE_BIT_xxx */
333
334 int dev_number;
335};
336
337#define VMXNET3_WRITE_BAR0_REG(adapter, reg, val) \
338 writel((val), (adapter)->hw_addr0 + (reg))
339#define VMXNET3_READ_BAR0_REG(adapter, reg) \
340 readl((adapter)->hw_addr0 + (reg))
341
342#define VMXNET3_WRITE_BAR1_REG(adapter, reg, val) \
343 writel((val), (adapter)->hw_addr1 + (reg))
344#define VMXNET3_READ_BAR1_REG(adapter, reg) \
345 readl((adapter)->hw_addr1 + (reg))
346
347#define VMXNET3_WAKE_QUEUE_THRESHOLD(tq) (5)
348#define VMXNET3_RX_ALLOC_THRESHOLD(rq, ring_idx, adapter) \
349 ((rq)->rx_ring[ring_idx].size >> 3)
350
351#define VMXNET3_GET_ADDR_LO(dma) ((u32)(dma))
352#define VMXNET3_GET_ADDR_HI(dma) ((u32)(((u64)(dma)) >> 32))
353
354/* must be a multiple of VMXNET3_RING_SIZE_ALIGN */
355#define VMXNET3_DEF_TX_RING_SIZE 512
356#define VMXNET3_DEF_RX_RING_SIZE 256
357
358#define VMXNET3_MAX_ETH_HDR_SIZE 22
359#define VMXNET3_MAX_SKB_BUF_SIZE (3*1024)
360
361int
362vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter);
363
364int
365vmxnet3_activate_dev(struct vmxnet3_adapter *adapter);
366
367void
368vmxnet3_force_close(struct vmxnet3_adapter *adapter);
369
370void
371vmxnet3_reset_dev(struct vmxnet3_adapter *adapter);
372
373void
374vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
375 struct vmxnet3_adapter *adapter);
376
377void
378vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
379 struct vmxnet3_adapter *adapter);
380
381int
382vmxnet3_create_queues(struct vmxnet3_adapter *adapter,
383 u32 tx_ring_size, u32 rx_ring_size, u32 rx_ring2_size);
384
385extern void vmxnet3_set_ethtool_ops(struct net_device *netdev);
386extern struct net_device_stats *vmxnet3_get_stats(struct net_device *netdev);
387
388extern char vmxnet3_driver_name[];
389#endif
diff --git a/drivers/net/wan/c101.c b/drivers/net/wan/c101.c
index 9693b0fd323d..0bd898c94759 100644
--- a/drivers/net/wan/c101.c
+++ b/drivers/net/wan/c101.c
@@ -16,6 +16,7 @@
16 16
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/capability.h>
19#include <linux/slab.h> 20#include <linux/slab.h>
20#include <linux/types.h> 21#include <linux/types.h>
21#include <linux/string.h> 22#include <linux/string.h>
diff --git a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c
index cf5fd17ad707..f1bff98acd1f 100644
--- a/drivers/net/wan/hdlc_cisco.c
+++ b/drivers/net/wan/hdlc_cisco.c
@@ -58,8 +58,7 @@ struct cisco_state {
58 spinlock_t lock; 58 spinlock_t lock;
59 unsigned long last_poll; 59 unsigned long last_poll;
60 int up; 60 int up;
61 int request_sent; 61 u32 txseq; /* TX sequence number, 0 = none */
62 u32 txseq; /* TX sequence number */
63 u32 rxseq; /* RX sequence number */ 62 u32 rxseq; /* RX sequence number */
64}; 63};
65 64
@@ -163,6 +162,7 @@ static int cisco_rx(struct sk_buff *skb)
163 struct cisco_packet *cisco_data; 162 struct cisco_packet *cisco_data;
164 struct in_device *in_dev; 163 struct in_device *in_dev;
165 __be32 addr, mask; 164 __be32 addr, mask;
165 u32 ack;
166 166
167 if (skb->len < sizeof(struct hdlc_header)) 167 if (skb->len < sizeof(struct hdlc_header))
168 goto rx_error; 168 goto rx_error;
@@ -223,8 +223,10 @@ static int cisco_rx(struct sk_buff *skb)
223 case CISCO_KEEPALIVE_REQ: 223 case CISCO_KEEPALIVE_REQ:
224 spin_lock(&st->lock); 224 spin_lock(&st->lock);
225 st->rxseq = ntohl(cisco_data->par1); 225 st->rxseq = ntohl(cisco_data->par1);
226 if (st->request_sent && 226 ack = ntohl(cisco_data->par2);
227 ntohl(cisco_data->par2) == st->txseq) { 227 if (ack && (ack == st->txseq ||
228 /* our current REQ may be in transit */
229 ack == st->txseq - 1)) {
228 st->last_poll = jiffies; 230 st->last_poll = jiffies;
229 if (!st->up) { 231 if (!st->up) {
230 u32 sec, min, hrs, days; 232 u32 sec, min, hrs, days;
@@ -275,7 +277,6 @@ static void cisco_timer(unsigned long arg)
275 277
276 cisco_keepalive_send(dev, CISCO_KEEPALIVE_REQ, htonl(++st->txseq), 278 cisco_keepalive_send(dev, CISCO_KEEPALIVE_REQ, htonl(++st->txseq),
277 htonl(st->rxseq)); 279 htonl(st->rxseq));
278 st->request_sent = 1;
279 spin_unlock(&st->lock); 280 spin_unlock(&st->lock);
280 281
281 st->timer.expires = jiffies + st->settings.interval * HZ; 282 st->timer.expires = jiffies + st->settings.interval * HZ;
@@ -293,9 +294,7 @@ static void cisco_start(struct net_device *dev)
293 unsigned long flags; 294 unsigned long flags;
294 295
295 spin_lock_irqsave(&st->lock, flags); 296 spin_lock_irqsave(&st->lock, flags);
296 st->up = 0; 297 st->up = st->txseq = st->rxseq = 0;
297 st->request_sent = 0;
298 st->txseq = st->rxseq = 0;
299 spin_unlock_irqrestore(&st->lock, flags); 298 spin_unlock_irqrestore(&st->lock, flags);
300 299
301 init_timer(&st->timer); 300 init_timer(&st->timer);
@@ -317,8 +316,7 @@ static void cisco_stop(struct net_device *dev)
317 316
318 spin_lock_irqsave(&st->lock, flags); 317 spin_lock_irqsave(&st->lock, flags);
319 netif_dormant_on(dev); 318 netif_dormant_on(dev);
320 st->up = 0; 319 st->up = st->txseq = 0;
321 st->request_sent = 0;
322 spin_unlock_irqrestore(&st->lock, flags); 320 spin_unlock_irqrestore(&st->lock, flags);
323} 321}
324 322
diff --git a/drivers/net/wan/n2.c b/drivers/net/wan/n2.c
index 83da596e2052..58c66819f39b 100644
--- a/drivers/net/wan/n2.c
+++ b/drivers/net/wan/n2.c
@@ -18,6 +18,7 @@
18 18
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/kernel.h> 20#include <linux/kernel.h>
21#include <linux/capability.h>
21#include <linux/slab.h> 22#include <linux/slab.h>
22#include <linux/types.h> 23#include <linux/types.h>
23#include <linux/fcntl.h> 24#include <linux/fcntl.h>
diff --git a/drivers/net/wan/pci200syn.c b/drivers/net/wan/pci200syn.c
index a52f29c72c33..f1340faaf022 100644
--- a/drivers/net/wan/pci200syn.c
+++ b/drivers/net/wan/pci200syn.c
@@ -16,6 +16,7 @@
16 16
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/kernel.h> 18#include <linux/kernel.h>
19#include <linux/capability.h>
19#include <linux/slab.h> 20#include <linux/slab.h>
20#include <linux/types.h> 21#include <linux/types.h>
21#include <linux/fcntl.h> 22#include <linux/fcntl.h>
diff --git a/drivers/net/wireless/adm8211.h b/drivers/net/wireless/adm8211.h
index 4f6ab1322189..b07e4d3a6b4d 100644
--- a/drivers/net/wireless/adm8211.h
+++ b/drivers/net/wireless/adm8211.h
@@ -266,7 +266,7 @@ do { \
266#define ADM8211_SYNCTL_CS1 (1 << 28) 266#define ADM8211_SYNCTL_CS1 (1 << 28)
267#define ADM8211_SYNCTL_CAL (1 << 27) 267#define ADM8211_SYNCTL_CAL (1 << 27)
268#define ADM8211_SYNCTL_SELCAL (1 << 26) 268#define ADM8211_SYNCTL_SELCAL (1 << 26)
269#define ADM8211_SYNCTL_RFtype ((1 << 24) || (1 << 23) || (1 << 22)) 269#define ADM8211_SYNCTL_RFtype ((1 << 24) | (1 << 23) | (1 << 22))
270#define ADM8211_SYNCTL_RFMD (1 << 22) 270#define ADM8211_SYNCTL_RFMD (1 << 22)
271#define ADM8211_SYNCTL_GENERAL (0x7 << 22) 271#define ADM8211_SYNCTL_GENERAL (0x7 << 22)
272/* SYNCTL 21:0 Data (Si4126: 18-bit data, 4-bit address) */ 272/* SYNCTL 21:0 Data (Si4126: 18-bit data, 4-bit address) */
diff --git a/drivers/net/wireless/airo.c b/drivers/net/wireless/airo.c
index 7116a1aa20ce..abf896a7390e 100644
--- a/drivers/net/wireless/airo.c
+++ b/drivers/net/wireless/airo.c
@@ -4790,9 +4790,8 @@ static int proc_stats_rid_open( struct inode *inode,
4790static int get_dec_u16( char *buffer, int *start, int limit ) { 4790static int get_dec_u16( char *buffer, int *start, int limit ) {
4791 u16 value; 4791 u16 value;
4792 int valid = 0; 4792 int valid = 0;
4793 for( value = 0; buffer[*start] >= '0' && 4793 for (value = 0; *start < limit && buffer[*start] >= '0' &&
4794 buffer[*start] <= '9' && 4794 buffer[*start] <= '9'; (*start)++) {
4795 *start < limit; (*start)++ ) {
4796 valid = 1; 4795 valid = 1;
4797 value *= 10; 4796 value *= 10;
4798 value += buffer[*start] - '0'; 4797 value += buffer[*start] - '0';
diff --git a/drivers/net/wireless/ath/ath5k/base.c b/drivers/net/wireless/ath/ath5k/base.c
index 9c6ab5378f6e..95a8e232b58f 100644
--- a/drivers/net/wireless/ath/ath5k/base.c
+++ b/drivers/net/wireless/ath/ath5k/base.c
@@ -1125,7 +1125,6 @@ ath5k_mode_setup(struct ath5k_softc *sc)
1125 /* configure operational mode */ 1125 /* configure operational mode */
1126 ath5k_hw_set_opmode(ah); 1126 ath5k_hw_set_opmode(ah);
1127 1127
1128 ath5k_hw_set_mcast_filter(ah, 0, 0);
1129 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt); 1128 ATH5K_DBG(sc, ATH5K_DEBUG_MODE, "RX filter 0x%x\n", rfilt);
1130} 1129}
1131 1130
diff --git a/drivers/net/wireless/ath/ath5k/led.c b/drivers/net/wireless/ath/ath5k/led.c
index b767c3b67b24..b548c8eaaae1 100644
--- a/drivers/net/wireless/ath/ath5k/led.c
+++ b/drivers/net/wireless/ath/ath5k/led.c
@@ -63,12 +63,16 @@ static const struct pci_device_id ath5k_led_devices[] = {
63 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) }, 63 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0422), ATH_LED(1, 1) },
64 /* E-machines E510 (tuliom@gmail.com) */ 64 /* E-machines E510 (tuliom@gmail.com) */
65 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0428), ATH_LED(3, 0) }, 65 { ATH_SDEVICE(PCI_VENDOR_ID_AMBIT, 0x0428), ATH_LED(3, 0) },
66 /* BenQ Joybook R55v (nowymarluk@wp.pl) */
67 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0100), ATH_LED(1, 0) },
66 /* Acer Extensa 5620z (nekoreeve@gmail.com) */ 68 /* Acer Extensa 5620z (nekoreeve@gmail.com) */
67 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0105), ATH_LED(3, 0) }, 69 { ATH_SDEVICE(PCI_VENDOR_ID_QMI, 0x0105), ATH_LED(3, 0) },
68 /* Fukato Datacask Jupiter 1014a (mrb74@gmx.at) */ 70 /* Fukato Datacask Jupiter 1014a (mrb74@gmx.at) */
69 { ATH_SDEVICE(PCI_VENDOR_ID_AZWAVE, 0x1026), ATH_LED(3, 0) }, 71 { ATH_SDEVICE(PCI_VENDOR_ID_AZWAVE, 0x1026), ATH_LED(3, 0) },
70 /* IBM ThinkPad AR5BXB6 (legovini@spiro.fisica.unipd.it) */ 72 /* IBM ThinkPad AR5BXB6 (legovini@spiro.fisica.unipd.it) */
71 { ATH_SDEVICE(PCI_VENDOR_ID_IBM, 0x058a), ATH_LED(1, 0) }, 73 { ATH_SDEVICE(PCI_VENDOR_ID_IBM, 0x058a), ATH_LED(1, 0) },
74 /* HP Compaq CQ60-206US (ddreggors@jumptv.com) */
75 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137a), ATH_LED(3, 1) },
72 /* HP Compaq C700 (nitrousnrg@gmail.com) */ 76 /* HP Compaq C700 (nitrousnrg@gmail.com) */
73 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) }, 77 { ATH_SDEVICE(PCI_VENDOR_ID_HP, 0x0137b), ATH_LED(3, 1) },
74 /* IBM-specific AR5212 (all others) */ 78 /* IBM-specific AR5212 (all others) */
diff --git a/drivers/net/wireless/ath/ath9k/rc.c b/drivers/net/wireless/ath/ath9k/rc.c
index 16a271787b85..1895d63aad0a 100644
--- a/drivers/net/wireless/ath/ath9k/rc.c
+++ b/drivers/net/wireless/ath/ath9k/rc.c
@@ -679,7 +679,7 @@ static u8 ath_rc_get_highest_rix(struct ath_softc *sc,
679 return rate; 679 return rate;
680 680
681 if (rate_table->info[rate].valid_single_stream && 681 if (rate_table->info[rate].valid_single_stream &&
682 !(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG)); 682 !(ath_rc_priv->ht_cap & WLAN_RC_DS_FLAG))
683 return rate; 683 return rate;
684 684
685 /* This should not happen */ 685 /* This should not happen */
diff --git a/drivers/net/wireless/b43/b43.h b/drivers/net/wireless/b43/b43.h
index fa1549a03c71..660716214d49 100644
--- a/drivers/net/wireless/b43/b43.h
+++ b/drivers/net/wireless/b43/b43.h
@@ -607,82 +607,7 @@ struct b43_qos_params {
607 struct ieee80211_tx_queue_params p; 607 struct ieee80211_tx_queue_params p;
608}; 608};
609 609
610struct b43_wldev; 610struct b43_wl;
611
612/* Data structure for the WLAN parts (802.11 cores) of the b43 chip. */
613struct b43_wl {
614 /* Pointer to the active wireless device on this chip */
615 struct b43_wldev *current_dev;
616 /* Pointer to the ieee80211 hardware data structure */
617 struct ieee80211_hw *hw;
618
619 /* Global driver mutex. Every operation must run with this mutex locked. */
620 struct mutex mutex;
621 /* Hard-IRQ spinlock. This lock protects things used in the hard-IRQ
622 * handler, only. This basically is just the IRQ mask register. */
623 spinlock_t hardirq_lock;
624
625 /* The number of queues that were registered with the mac80211 subsystem
626 * initially. This is a backup copy of hw->queues in case hw->queues has
627 * to be dynamically lowered at runtime (Firmware does not support QoS).
628 * hw->queues has to be restored to the original value before unregistering
629 * from the mac80211 subsystem. */
630 u16 mac80211_initially_registered_queues;
631
632 /* We can only have one operating interface (802.11 core)
633 * at a time. General information about this interface follows.
634 */
635
636 struct ieee80211_vif *vif;
637 /* The MAC address of the operating interface. */
638 u8 mac_addr[ETH_ALEN];
639 /* Current BSSID */
640 u8 bssid[ETH_ALEN];
641 /* Interface type. (NL80211_IFTYPE_XXX) */
642 int if_type;
643 /* Is the card operating in AP, STA or IBSS mode? */
644 bool operating;
645 /* filter flags */
646 unsigned int filter_flags;
647 /* Stats about the wireless interface */
648 struct ieee80211_low_level_stats ieee_stats;
649
650#ifdef CONFIG_B43_HWRNG
651 struct hwrng rng;
652 bool rng_initialized;
653 char rng_name[30 + 1];
654#endif /* CONFIG_B43_HWRNG */
655
656 /* List of all wireless devices on this chip */
657 struct list_head devlist;
658 u8 nr_devs;
659
660 bool radiotap_enabled;
661 bool radio_enabled;
662
663 /* The beacon we are currently using (AP or IBSS mode). */
664 struct sk_buff *current_beacon;
665 bool beacon0_uploaded;
666 bool beacon1_uploaded;
667 bool beacon_templates_virgin; /* Never wrote the templates? */
668 struct work_struct beacon_update_trigger;
669
670 /* The current QOS parameters for the 4 queues. */
671 struct b43_qos_params qos_params[4];
672
673 /* Work for adjustment of the transmission power.
674 * This is scheduled when we determine that the actual TX output
675 * power doesn't match what we want. */
676 struct work_struct txpower_adjust_work;
677
678 /* Packet transmit work */
679 struct work_struct tx_work;
680 /* Queue of packets to be transmitted. */
681 struct sk_buff_head tx_queue;
682
683 /* The device LEDs. */
684 struct b43_leds leds;
685};
686 611
687/* The type of the firmware file. */ 612/* The type of the firmware file. */
688enum b43_firmware_file_type { 613enum b43_firmware_file_type {
@@ -824,6 +749,97 @@ struct b43_wldev {
824#endif 749#endif
825}; 750};
826 751
752/*
753 * Include goes here to avoid a dependency problem.
754 * A better fix would be to integrate xmit.h into b43.h.
755 */
756#include "xmit.h"
757
758/* Data structure for the WLAN parts (802.11 cores) of the b43 chip. */
759struct b43_wl {
760 /* Pointer to the active wireless device on this chip */
761 struct b43_wldev *current_dev;
762 /* Pointer to the ieee80211 hardware data structure */
763 struct ieee80211_hw *hw;
764
765 /* Global driver mutex. Every operation must run with this mutex locked. */
766 struct mutex mutex;
767 /* Hard-IRQ spinlock. This lock protects things used in the hard-IRQ
768 * handler, only. This basically is just the IRQ mask register. */
769 spinlock_t hardirq_lock;
770
771 /* The number of queues that were registered with the mac80211 subsystem
772 * initially. This is a backup copy of hw->queues in case hw->queues has
773 * to be dynamically lowered at runtime (Firmware does not support QoS).
774 * hw->queues has to be restored to the original value before unregistering
775 * from the mac80211 subsystem. */
776 u16 mac80211_initially_registered_queues;
777
778 /* We can only have one operating interface (802.11 core)
779 * at a time. General information about this interface follows.
780 */
781
782 struct ieee80211_vif *vif;
783 /* The MAC address of the operating interface. */
784 u8 mac_addr[ETH_ALEN];
785 /* Current BSSID */
786 u8 bssid[ETH_ALEN];
787 /* Interface type. (NL80211_IFTYPE_XXX) */
788 int if_type;
789 /* Is the card operating in AP, STA or IBSS mode? */
790 bool operating;
791 /* filter flags */
792 unsigned int filter_flags;
793 /* Stats about the wireless interface */
794 struct ieee80211_low_level_stats ieee_stats;
795
796#ifdef CONFIG_B43_HWRNG
797 struct hwrng rng;
798 bool rng_initialized;
799 char rng_name[30 + 1];
800#endif /* CONFIG_B43_HWRNG */
801
802 /* List of all wireless devices on this chip */
803 struct list_head devlist;
804 u8 nr_devs;
805
806 bool radiotap_enabled;
807 bool radio_enabled;
808
809 /* The beacon we are currently using (AP or IBSS mode). */
810 struct sk_buff *current_beacon;
811 bool beacon0_uploaded;
812 bool beacon1_uploaded;
813 bool beacon_templates_virgin; /* Never wrote the templates? */
814 struct work_struct beacon_update_trigger;
815
816 /* The current QOS parameters for the 4 queues. */
817 struct b43_qos_params qos_params[4];
818
819 /* Work for adjustment of the transmission power.
820 * This is scheduled when we determine that the actual TX output
821 * power doesn't match what we want. */
822 struct work_struct txpower_adjust_work;
823
824 /* Packet transmit work */
825 struct work_struct tx_work;
826 /* Queue of packets to be transmitted. */
827 struct sk_buff_head tx_queue;
828
829 /* The device LEDs. */
830 struct b43_leds leds;
831
832#ifdef CONFIG_B43_PIO
833 /*
834 * RX/TX header/tail buffers used by the frame transmit functions.
835 */
836 struct b43_rxhdr_fw4 rxhdr;
837 struct b43_txhdr txhdr;
838 u8 rx_tail[4];
839 u8 tx_tail[4];
840#endif /* CONFIG_B43_PIO */
841};
842
827static inline struct b43_wl *hw_to_b43_wl(struct ieee80211_hw *hw) 843static inline struct b43_wl *hw_to_b43_wl(struct ieee80211_hw *hw)
828{ 844{
829 return hw->priv; 845 return hw->priv;
diff --git a/drivers/net/wireless/b43/dma.c b/drivers/net/wireless/b43/dma.c
index 8701034569fa..de4e804bedf0 100644
--- a/drivers/net/wireless/b43/dma.c
+++ b/drivers/net/wireless/b43/dma.c
@@ -1157,8 +1157,9 @@ struct b43_dmaring *parse_cookie(struct b43_wldev *dev, u16 cookie, int *slot)
1157} 1157}
1158 1158
1159static int dma_tx_fragment(struct b43_dmaring *ring, 1159static int dma_tx_fragment(struct b43_dmaring *ring,
1160 struct sk_buff *skb) 1160 struct sk_buff **in_skb)
1161{ 1161{
1162 struct sk_buff *skb = *in_skb;
1162 const struct b43_dma_ops *ops = ring->ops; 1163 const struct b43_dma_ops *ops = ring->ops;
1163 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb); 1164 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
1164 u8 *header; 1165 u8 *header;
@@ -1224,8 +1225,14 @@ static int dma_tx_fragment(struct b43_dmaring *ring,
1224 } 1225 }
1225 1226
1226 memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len); 1227 memcpy(skb_put(bounce_skb, skb->len), skb->data, skb->len);
1228 memcpy(bounce_skb->cb, skb->cb, sizeof(skb->cb));
1229 bounce_skb->dev = skb->dev;
1230 skb_set_queue_mapping(bounce_skb, skb_get_queue_mapping(skb));
1231 info = IEEE80211_SKB_CB(bounce_skb);
1232
1227 dev_kfree_skb_any(skb); 1233 dev_kfree_skb_any(skb);
1228 skb = bounce_skb; 1234 skb = bounce_skb;
1235 *in_skb = bounce_skb;
1229 meta->skb = skb; 1236 meta->skb = skb;
1230 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1); 1237 meta->dmaaddr = map_descbuffer(ring, skb->data, skb->len, 1);
1231 if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) { 1238 if (b43_dma_mapping_error(ring, meta->dmaaddr, skb->len, 1)) {
@@ -1355,7 +1362,11 @@ int b43_dma_tx(struct b43_wldev *dev, struct sk_buff *skb)
1355 * static, so we don't need to store it per frame. */ 1362 * static, so we don't need to store it per frame. */
1356 ring->queue_prio = skb_get_queue_mapping(skb); 1363 ring->queue_prio = skb_get_queue_mapping(skb);
1357 1364
1358 err = dma_tx_fragment(ring, skb); 1365 /* dma_tx_fragment might reallocate the skb, so invalidate pointers pointing
1366 * into the skb data or cb now. */
1367 hdr = NULL;
1368 info = NULL;
1369 err = dma_tx_fragment(ring, &skb);
1359 if (unlikely(err == -ENOKEY)) { 1370 if (unlikely(err == -ENOKEY)) {
1360 /* Drop this packet, as we don't have the encryption key 1371 /* Drop this packet, as we don't have the encryption key
1361 * anymore and must not transmit it unencrypted. */ 1372 * anymore and must not transmit it unencrypted. */
diff --git a/drivers/net/wireless/b43/leds.c b/drivers/net/wireless/b43/leds.c
index fbe3d4f62ce2..1e8dba488004 100644
--- a/drivers/net/wireless/b43/leds.c
+++ b/drivers/net/wireless/b43/leds.c
@@ -348,9 +348,9 @@ void b43_leds_register(struct b43_wldev *dev)
348 } 348 }
349} 349}
350 350
351void b43_leds_unregister(struct b43_wldev *dev) 351void b43_leds_unregister(struct b43_wl *wl)
352{ 352{
353 struct b43_leds *leds = &dev->wl->leds; 353 struct b43_leds *leds = &wl->leds;
354 354
355 b43_unregister_led(&leds->led_tx); 355 b43_unregister_led(&leds->led_tx);
356 b43_unregister_led(&leds->led_rx); 356 b43_unregister_led(&leds->led_rx);
diff --git a/drivers/net/wireless/b43/leds.h b/drivers/net/wireless/b43/leds.h
index 9592e4c5a5f5..32b66d53cdac 100644
--- a/drivers/net/wireless/b43/leds.h
+++ b/drivers/net/wireless/b43/leds.h
@@ -1,6 +1,7 @@
1#ifndef B43_LEDS_H_ 1#ifndef B43_LEDS_H_
2#define B43_LEDS_H_ 2#define B43_LEDS_H_
3 3
4struct b43_wl;
4struct b43_wldev; 5struct b43_wldev;
5 6
6#ifdef CONFIG_B43_LEDS 7#ifdef CONFIG_B43_LEDS
@@ -60,7 +61,7 @@ enum b43_led_behaviour {
60}; 61};
61 62
62void b43_leds_register(struct b43_wldev *dev); 63void b43_leds_register(struct b43_wldev *dev);
63void b43_leds_unregister(struct b43_wldev *dev); 64void b43_leds_unregister(struct b43_wl *wl);
64void b43_leds_init(struct b43_wldev *dev); 65void b43_leds_init(struct b43_wldev *dev);
65void b43_leds_exit(struct b43_wldev *dev); 66void b43_leds_exit(struct b43_wldev *dev);
66void b43_leds_stop(struct b43_wldev *dev); 67void b43_leds_stop(struct b43_wldev *dev);
@@ -76,7 +77,7 @@ struct b43_leds {
76static inline void b43_leds_register(struct b43_wldev *dev) 77static inline void b43_leds_register(struct b43_wldev *dev)
77{ 78{
78} 79}
79static inline void b43_leds_unregister(struct b43_wldev *dev) 80static inline void b43_leds_unregister(struct b43_wl *wl)
80{ 81{
81} 82}
82static inline void b43_leds_init(struct b43_wldev *dev) 83static inline void b43_leds_init(struct b43_wldev *dev)
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index 9b907a36bb8c..098dda1a67c1 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -3874,6 +3874,7 @@ static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev *dev)
3874{ 3874{
3875 struct b43_wl *wl = dev->wl; 3875 struct b43_wl *wl = dev->wl;
3876 struct b43_wldev *orig_dev; 3876 struct b43_wldev *orig_dev;
3877 u32 mask;
3877 3878
3878redo: 3879redo:
3879 if (!dev || b43_status(dev) < B43_STAT_STARTED) 3880 if (!dev || b43_status(dev) < B43_STAT_STARTED)
@@ -3920,7 +3921,8 @@ redo:
3920 goto redo; 3921 goto redo;
3921 return dev; 3922 return dev;
3922 } 3923 }
3923 B43_WARN_ON(b43_read32(dev, B43_MMIO_GEN_IRQ_MASK)); 3924 mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK);
3925 B43_WARN_ON(mask != 0xFFFFFFFF && mask);
3924 3926
3925 /* Drain the TX queue */ 3927 /* Drain the TX queue */
3926 while (skb_queue_len(&wl->tx_queue)) 3928 while (skb_queue_len(&wl->tx_queue))
@@ -4519,9 +4521,8 @@ static int b43_op_beacon_set_tim(struct ieee80211_hw *hw,
4519{ 4521{
4520 struct b43_wl *wl = hw_to_b43_wl(hw); 4522 struct b43_wl *wl = hw_to_b43_wl(hw);
4521 4523
4522 mutex_lock(&wl->mutex); 4524 /* FIXME: add locking */
4523 b43_update_templates(wl); 4525 b43_update_templates(wl);
4524 mutex_unlock(&wl->mutex);
4525 4526
4526 return 0; 4527 return 0;
4527} 4528}
@@ -4997,7 +4998,7 @@ static void b43_remove(struct ssb_device *dev)
4997 4998
4998 if (list_empty(&wl->devlist)) { 4999 if (list_empty(&wl->devlist)) {
4999 b43_rng_exit(wl); 5000 b43_rng_exit(wl);
5000 b43_leds_unregister(wldev); 5001 b43_leds_unregister(wl);
5001 /* Last core on the chip unregistered. 5002 /* Last core on the chip unregistered.
5002 * We can destroy common struct b43_wl. 5003 * We can destroy common struct b43_wl.
5003 */ 5004 */
diff --git a/drivers/net/wireless/b43/pio.c b/drivers/net/wireless/b43/pio.c
index 5e87650b07fb..9b9044400218 100644
--- a/drivers/net/wireless/b43/pio.c
+++ b/drivers/net/wireless/b43/pio.c
@@ -332,6 +332,7 @@ static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
332 unsigned int data_len) 332 unsigned int data_len)
333{ 333{
334 struct b43_wldev *dev = q->dev; 334 struct b43_wldev *dev = q->dev;
335 struct b43_wl *wl = dev->wl;
335 const u8 *data = _data; 336 const u8 *data = _data;
336 337
337 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI; 338 ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
@@ -341,13 +342,12 @@ static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
341 q->mmio_base + B43_PIO_TXDATA, 342 q->mmio_base + B43_PIO_TXDATA,
342 sizeof(u16)); 343 sizeof(u16));
343 if (data_len & 1) { 344 if (data_len & 1) {
344 u8 tail[2] = { 0, };
345
346 /* Write the last byte. */ 345 /* Write the last byte. */
347 ctl &= ~B43_PIO_TXCTL_WRITEHI; 346 ctl &= ~B43_PIO_TXCTL_WRITEHI;
348 b43_piotx_write16(q, B43_PIO_TXCTL, ctl); 347 b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
349 tail[0] = data[data_len - 1]; 348 wl->tx_tail[0] = data[data_len - 1];
350 ssb_block_write(dev->dev, tail, 2, 349 wl->tx_tail[1] = 0;
350 ssb_block_write(dev->dev, wl->tx_tail, 2,
351 q->mmio_base + B43_PIO_TXDATA, 351 q->mmio_base + B43_PIO_TXDATA,
352 sizeof(u16)); 352 sizeof(u16));
353 } 353 }
@@ -382,6 +382,7 @@ static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
382 unsigned int data_len) 382 unsigned int data_len)
383{ 383{
384 struct b43_wldev *dev = q->dev; 384 struct b43_wldev *dev = q->dev;
385 struct b43_wl *wl = dev->wl;
385 const u8 *data = _data; 386 const u8 *data = _data;
386 387
387 ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 | 388 ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
@@ -392,29 +393,31 @@ static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
392 q->mmio_base + B43_PIO8_TXDATA, 393 q->mmio_base + B43_PIO8_TXDATA,
393 sizeof(u32)); 394 sizeof(u32));
394 if (data_len & 3) { 395 if (data_len & 3) {
395 u8 tail[4] = { 0, }; 396 wl->tx_tail[3] = 0;
396
397 /* Write the last few bytes. */ 397 /* Write the last few bytes. */
398 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 | 398 ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
399 B43_PIO8_TXCTL_24_31); 399 B43_PIO8_TXCTL_24_31);
400 switch (data_len & 3) { 400 switch (data_len & 3) {
401 case 3: 401 case 3:
402 ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15; 402 ctl |= B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_8_15;
403 tail[0] = data[data_len - 3]; 403 wl->tx_tail[0] = data[data_len - 3];
404 tail[1] = data[data_len - 2]; 404 wl->tx_tail[1] = data[data_len - 2];
405 tail[2] = data[data_len - 1]; 405 wl->tx_tail[2] = data[data_len - 1];
406 break; 406 break;
407 case 2: 407 case 2:
408 ctl |= B43_PIO8_TXCTL_8_15; 408 ctl |= B43_PIO8_TXCTL_8_15;
409 tail[0] = data[data_len - 2]; 409 wl->tx_tail[0] = data[data_len - 2];
410 tail[1] = data[data_len - 1]; 410 wl->tx_tail[1] = data[data_len - 1];
411 wl->tx_tail[2] = 0;
411 break; 412 break;
412 case 1: 413 case 1:
413 tail[0] = data[data_len - 1]; 414 wl->tx_tail[0] = data[data_len - 1];
415 wl->tx_tail[1] = 0;
416 wl->tx_tail[2] = 0;
414 break; 417 break;
415 } 418 }
416 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl); 419 b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
417 ssb_block_write(dev->dev, tail, 4, 420 ssb_block_write(dev->dev, wl->tx_tail, 4,
418 q->mmio_base + B43_PIO8_TXDATA, 421 q->mmio_base + B43_PIO8_TXDATA,
419 sizeof(u32)); 422 sizeof(u32));
420 } 423 }
@@ -446,8 +449,9 @@ static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
446static int pio_tx_frame(struct b43_pio_txqueue *q, 449static int pio_tx_frame(struct b43_pio_txqueue *q,
447 struct sk_buff *skb) 450 struct sk_buff *skb)
448{ 451{
452 struct b43_wldev *dev = q->dev;
453 struct b43_wl *wl = dev->wl;
449 struct b43_pio_txpacket *pack; 454 struct b43_pio_txpacket *pack;
450 struct b43_txhdr txhdr;
451 u16 cookie; 455 u16 cookie;
452 int err; 456 int err;
453 unsigned int hdrlen; 457 unsigned int hdrlen;
@@ -458,8 +462,8 @@ static int pio_tx_frame(struct b43_pio_txqueue *q,
458 struct b43_pio_txpacket, list); 462 struct b43_pio_txpacket, list);
459 463
460 cookie = generate_cookie(q, pack); 464 cookie = generate_cookie(q, pack);
461 hdrlen = b43_txhdr_size(q->dev); 465 hdrlen = b43_txhdr_size(dev);
462 err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb, 466 err = b43_generate_txhdr(dev, (u8 *)&wl->txhdr, skb,
463 info, cookie); 467 info, cookie);
464 if (err) 468 if (err)
465 return err; 469 return err;
@@ -467,15 +471,15 @@ static int pio_tx_frame(struct b43_pio_txqueue *q,
467 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) { 471 if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
468 /* Tell the firmware about the cookie of the last 472 /* Tell the firmware about the cookie of the last
469 * mcast frame, so it can clear the more-data bit in it. */ 473 * mcast frame, so it can clear the more-data bit in it. */
470 b43_shm_write16(q->dev, B43_SHM_SHARED, 474 b43_shm_write16(dev, B43_SHM_SHARED,
471 B43_SHM_SH_MCASTCOOKIE, cookie); 475 B43_SHM_SH_MCASTCOOKIE, cookie);
472 } 476 }
473 477
474 pack->skb = skb; 478 pack->skb = skb;
475 if (q->rev >= 8) 479 if (q->rev >= 8)
476 pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen); 480 pio_tx_frame_4byte_queue(pack, (const u8 *)&wl->txhdr, hdrlen);
477 else 481 else
478 pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen); 482 pio_tx_frame_2byte_queue(pack, (const u8 *)&wl->txhdr, hdrlen);
479 483
480 /* Remove it from the list of available packet slots. 484 /* Remove it from the list of available packet slots.
481 * It will be put back when we receive the status report. */ 485 * It will be put back when we receive the status report. */
@@ -615,14 +619,14 @@ void b43_pio_get_tx_stats(struct b43_wldev *dev,
615static bool pio_rx_frame(struct b43_pio_rxqueue *q) 619static bool pio_rx_frame(struct b43_pio_rxqueue *q)
616{ 620{
617 struct b43_wldev *dev = q->dev; 621 struct b43_wldev *dev = q->dev;
618 struct b43_rxhdr_fw4 rxhdr; 622 struct b43_wl *wl = dev->wl;
619 u16 len; 623 u16 len;
620 u32 macstat; 624 u32 macstat;
621 unsigned int i, padding; 625 unsigned int i, padding;
622 struct sk_buff *skb; 626 struct sk_buff *skb;
623 const char *err_msg = NULL; 627 const char *err_msg = NULL;
624 628
625 memset(&rxhdr, 0, sizeof(rxhdr)); 629 memset(&wl->rxhdr, 0, sizeof(wl->rxhdr));
626 630
627 /* Check if we have data and wait for it to get ready. */ 631 /* Check if we have data and wait for it to get ready. */
628 if (q->rev >= 8) { 632 if (q->rev >= 8) {
@@ -660,16 +664,16 @@ data_ready:
660 664
661 /* Get the preamble (RX header) */ 665 /* Get the preamble (RX header) */
662 if (q->rev >= 8) { 666 if (q->rev >= 8) {
663 ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr), 667 ssb_block_read(dev->dev, &wl->rxhdr, sizeof(wl->rxhdr),
664 q->mmio_base + B43_PIO8_RXDATA, 668 q->mmio_base + B43_PIO8_RXDATA,
665 sizeof(u32)); 669 sizeof(u32));
666 } else { 670 } else {
667 ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr), 671 ssb_block_read(dev->dev, &wl->rxhdr, sizeof(wl->rxhdr),
668 q->mmio_base + B43_PIO_RXDATA, 672 q->mmio_base + B43_PIO_RXDATA,
669 sizeof(u16)); 673 sizeof(u16));
670 } 674 }
671 /* Sanity checks. */ 675 /* Sanity checks. */
672 len = le16_to_cpu(rxhdr.frame_len); 676 len = le16_to_cpu(wl->rxhdr.frame_len);
673 if (unlikely(len > 0x700)) { 677 if (unlikely(len > 0x700)) {
674 err_msg = "len > 0x700"; 678 err_msg = "len > 0x700";
675 goto rx_error; 679 goto rx_error;
@@ -679,7 +683,7 @@ data_ready:
679 goto rx_error; 683 goto rx_error;
680 } 684 }
681 685
682 macstat = le32_to_cpu(rxhdr.mac_status); 686 macstat = le32_to_cpu(wl->rxhdr.mac_status);
683 if (macstat & B43_RX_MAC_FCSERR) { 687 if (macstat & B43_RX_MAC_FCSERR) {
684 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) { 688 if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
685 /* Drop frames with failed FCS. */ 689 /* Drop frames with failed FCS. */
@@ -704,24 +708,22 @@ data_ready:
704 q->mmio_base + B43_PIO8_RXDATA, 708 q->mmio_base + B43_PIO8_RXDATA,
705 sizeof(u32)); 709 sizeof(u32));
706 if (len & 3) { 710 if (len & 3) {
707 u8 tail[4] = { 0, };
708
709 /* Read the last few bytes. */ 711 /* Read the last few bytes. */
710 ssb_block_read(dev->dev, tail, 4, 712 ssb_block_read(dev->dev, wl->rx_tail, 4,
711 q->mmio_base + B43_PIO8_RXDATA, 713 q->mmio_base + B43_PIO8_RXDATA,
712 sizeof(u32)); 714 sizeof(u32));
713 switch (len & 3) { 715 switch (len & 3) {
714 case 3: 716 case 3:
715 skb->data[len + padding - 3] = tail[0]; 717 skb->data[len + padding - 3] = wl->rx_tail[0];
716 skb->data[len + padding - 2] = tail[1]; 718 skb->data[len + padding - 2] = wl->rx_tail[1];
717 skb->data[len + padding - 1] = tail[2]; 719 skb->data[len + padding - 1] = wl->rx_tail[2];
718 break; 720 break;
719 case 2: 721 case 2:
720 skb->data[len + padding - 2] = tail[0]; 722 skb->data[len + padding - 2] = wl->rx_tail[0];
721 skb->data[len + padding - 1] = tail[1]; 723 skb->data[len + padding - 1] = wl->rx_tail[1];
722 break; 724 break;
723 case 1: 725 case 1:
724 skb->data[len + padding - 1] = tail[0]; 726 skb->data[len + padding - 1] = wl->rx_tail[0];
725 break; 727 break;
726 } 728 }
727 } 729 }
@@ -730,17 +732,15 @@ data_ready:
730 q->mmio_base + B43_PIO_RXDATA, 732 q->mmio_base + B43_PIO_RXDATA,
731 sizeof(u16)); 733 sizeof(u16));
732 if (len & 1) { 734 if (len & 1) {
733 u8 tail[2] = { 0, };
734
735 /* Read the last byte. */ 735 /* Read the last byte. */
736 ssb_block_read(dev->dev, tail, 2, 736 ssb_block_read(dev->dev, wl->rx_tail, 2,
737 q->mmio_base + B43_PIO_RXDATA, 737 q->mmio_base + B43_PIO_RXDATA,
738 sizeof(u16)); 738 sizeof(u16));
739 skb->data[len + padding - 1] = tail[0]; 739 skb->data[len + padding - 1] = wl->rx_tail[0];
740 } 740 }
741 } 741 }
742 742
743 b43_rx(q->dev, skb, &rxhdr); 743 b43_rx(q->dev, skb, &wl->rxhdr);
744 744
745 return 1; 745 return 1;
746 746
diff --git a/drivers/net/wireless/b43/rfkill.c b/drivers/net/wireless/b43/rfkill.c
index 7a3218c5ba7d..ffdce6f3c909 100644
--- a/drivers/net/wireless/b43/rfkill.c
+++ b/drivers/net/wireless/b43/rfkill.c
@@ -33,7 +33,8 @@ bool b43_is_hw_radio_enabled(struct b43_wldev *dev)
33 & B43_MMIO_RADIO_HWENABLED_HI_MASK)) 33 & B43_MMIO_RADIO_HWENABLED_HI_MASK))
34 return 1; 34 return 1;
35 } else { 35 } else {
36 if (b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO) 36 if (b43_status(dev) >= B43_STAT_STARTED &&
37 b43_read16(dev, B43_MMIO_RADIO_HWENABLED_LO)
37 & B43_MMIO_RADIO_HWENABLED_LO_MASK) 38 & B43_MMIO_RADIO_HWENABLED_LO_MASK)
38 return 1; 39 return 1;
39 } 40 }
diff --git a/drivers/net/wireless/b43/xmit.c b/drivers/net/wireless/b43/xmit.c
index ac9f600995e4..f4e9695ec186 100644
--- a/drivers/net/wireless/b43/xmit.c
+++ b/drivers/net/wireless/b43/xmit.c
@@ -27,7 +27,7 @@
27 27
28*/ 28*/
29 29
30#include "xmit.h" 30#include "b43.h"
31#include "phy_common.h" 31#include "phy_common.h"
32#include "dma.h" 32#include "dma.h"
33#include "pio.h" 33#include "pio.h"
@@ -690,7 +690,10 @@ void b43_rx(struct b43_wldev *dev, struct sk_buff *skb, const void *_rxhdr)
690 } 690 }
691 691
692 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status)); 692 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
693
694 local_bh_disable();
693 ieee80211_rx(dev->wl->hw, skb); 695 ieee80211_rx(dev->wl->hw, skb);
696 local_bh_enable();
694 697
695#if B43_DEBUG 698#if B43_DEBUG
696 dev->rx_count++; 699 dev->rx_count++;
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c
index 240cff1e6979..6e2fc0cb6f8a 100644
--- a/drivers/net/wireless/ipw2x00/ipw2100.c
+++ b/drivers/net/wireless/ipw2x00/ipw2100.c
@@ -6029,7 +6029,7 @@ static struct net_device *ipw2100_alloc_device(struct pci_dev *pci_dev,
6029 struct ipw2100_priv *priv; 6029 struct ipw2100_priv *priv;
6030 struct net_device *dev; 6030 struct net_device *dev;
6031 6031
6032 dev = alloc_ieee80211(sizeof(struct ipw2100_priv), 0); 6032 dev = alloc_ieee80211(sizeof(struct ipw2100_priv));
6033 if (!dev) 6033 if (!dev)
6034 return NULL; 6034 return NULL;
6035 priv = libipw_priv(dev); 6035 priv = libipw_priv(dev);
@@ -6342,7 +6342,7 @@ static int ipw2100_pci_init_one(struct pci_dev *pci_dev,
6342 sysfs_remove_group(&pci_dev->dev.kobj, 6342 sysfs_remove_group(&pci_dev->dev.kobj,
6343 &ipw2100_attribute_group); 6343 &ipw2100_attribute_group);
6344 6344
6345 free_ieee80211(dev, 0); 6345 free_ieee80211(dev);
6346 pci_set_drvdata(pci_dev, NULL); 6346 pci_set_drvdata(pci_dev, NULL);
6347 } 6347 }
6348 6348
@@ -6400,7 +6400,7 @@ static void __devexit ipw2100_pci_remove_one(struct pci_dev *pci_dev)
6400 if (dev->base_addr) 6400 if (dev->base_addr)
6401 iounmap((void __iomem *)dev->base_addr); 6401 iounmap((void __iomem *)dev->base_addr);
6402 6402
6403 free_ieee80211(dev, 0); 6403 free_ieee80211(dev);
6404 } 6404 }
6405 6405
6406 pci_release_regions(pci_dev); 6406 pci_release_regions(pci_dev);
diff --git a/drivers/net/wireless/ipw2x00/ipw2200.c b/drivers/net/wireless/ipw2x00/ipw2200.c
index 827824d45de9..a6ca536e44f8 100644
--- a/drivers/net/wireless/ipw2x00/ipw2200.c
+++ b/drivers/net/wireless/ipw2x00/ipw2200.c
@@ -104,25 +104,6 @@ static int antenna = CFG_SYS_ANTENNA_BOTH;
104static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */ 104static int rtap_iface = 0; /* def: 0 -- do not create rtap interface */
105#endif 105#endif
106 106
107static struct ieee80211_rate ipw2200_rates[] = {
108 { .bitrate = 10 },
109 { .bitrate = 20, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
110 { .bitrate = 55, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
111 { .bitrate = 110, .flags = IEEE80211_RATE_SHORT_PREAMBLE },
112 { .bitrate = 60 },
113 { .bitrate = 90 },
114 { .bitrate = 120 },
115 { .bitrate = 180 },
116 { .bitrate = 240 },
117 { .bitrate = 360 },
118 { .bitrate = 480 },
119 { .bitrate = 540 }
120};
121
122#define ipw2200_a_rates (ipw2200_rates + 4)
123#define ipw2200_num_a_rates 8
124#define ipw2200_bg_rates (ipw2200_rates + 0)
125#define ipw2200_num_bg_rates 12
126 107
127#ifdef CONFIG_IPW2200_QOS 108#ifdef CONFIG_IPW2200_QOS
128static int qos_enable = 0; 109static int qos_enable = 0;
@@ -8674,6 +8655,24 @@ static int ipw_sw_reset(struct ipw_priv *priv, int option)
8674 * 8655 *
8675 */ 8656 */
8676 8657
8658static int ipw_wx_get_name(struct net_device *dev,
8659 struct iw_request_info *info,
8660 union iwreq_data *wrqu, char *extra)
8661{
8662 struct ipw_priv *priv = libipw_priv(dev);
8663 mutex_lock(&priv->mutex);
8664 if (priv->status & STATUS_RF_KILL_MASK)
8665 strcpy(wrqu->name, "radio off");
8666 else if (!(priv->status & STATUS_ASSOCIATED))
8667 strcpy(wrqu->name, "unassociated");
8668 else
8669 snprintf(wrqu->name, IFNAMSIZ, "IEEE 802.11%c",
8670 ipw_modes[priv->assoc_request.ieee_mode]);
8671 IPW_DEBUG_WX("Name: %s\n", wrqu->name);
8672 mutex_unlock(&priv->mutex);
8673 return 0;
8674}
8675
8677static int ipw_set_channel(struct ipw_priv *priv, u8 channel) 8676static int ipw_set_channel(struct ipw_priv *priv, u8 channel)
8678{ 8677{
8679 if (channel == 0) { 8678 if (channel == 0) {
@@ -9973,7 +9972,7 @@ static int ipw_wx_sw_reset(struct net_device *dev,
9973/* Rebase the WE IOCTLs to zero for the handler array */ 9972/* Rebase the WE IOCTLs to zero for the handler array */
9974#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT] 9973#define IW_IOCTL(x) [(x)-SIOCSIWCOMMIT]
9975static iw_handler ipw_wx_handlers[] = { 9974static iw_handler ipw_wx_handlers[] = {
9976 IW_IOCTL(SIOCGIWNAME) = (iw_handler) cfg80211_wext_giwname, 9975 IW_IOCTL(SIOCGIWNAME) = ipw_wx_get_name,
9977 IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq, 9976 IW_IOCTL(SIOCSIWFREQ) = ipw_wx_set_freq,
9978 IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq, 9977 IW_IOCTL(SIOCGIWFREQ) = ipw_wx_get_freq,
9979 IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode, 9978 IW_IOCTL(SIOCSIWMODE) = ipw_wx_set_mode,
@@ -11417,100 +11416,16 @@ static void ipw_bg_down(struct work_struct *work)
11417/* Called by register_netdev() */ 11416/* Called by register_netdev() */
11418static int ipw_net_init(struct net_device *dev) 11417static int ipw_net_init(struct net_device *dev)
11419{ 11418{
11420 int i, rc = 0;
11421 struct ipw_priv *priv = libipw_priv(dev); 11419 struct ipw_priv *priv = libipw_priv(dev);
11422 const struct libipw_geo *geo = libipw_get_geo(priv->ieee);
11423 struct wireless_dev *wdev = &priv->ieee->wdev;
11424 mutex_lock(&priv->mutex); 11420 mutex_lock(&priv->mutex);
11425 11421
11426 if (ipw_up(priv)) { 11422 if (ipw_up(priv)) {
11427 rc = -EIO; 11423 mutex_unlock(&priv->mutex);
11428 goto out; 11424 return -EIO;
11429 }
11430
11431 memcpy(wdev->wiphy->perm_addr, priv->mac_addr, ETH_ALEN);
11432
11433 /* fill-out priv->ieee->bg_band */
11434 if (geo->bg_channels) {
11435 struct ieee80211_supported_band *bg_band = &priv->ieee->bg_band;
11436
11437 bg_band->band = IEEE80211_BAND_2GHZ;
11438 bg_band->n_channels = geo->bg_channels;
11439 bg_band->channels =
11440 kzalloc(geo->bg_channels *
11441 sizeof(struct ieee80211_channel), GFP_KERNEL);
11442 /* translate geo->bg to bg_band.channels */
11443 for (i = 0; i < geo->bg_channels; i++) {
11444 bg_band->channels[i].band = IEEE80211_BAND_2GHZ;
11445 bg_band->channels[i].center_freq = geo->bg[i].freq;
11446 bg_band->channels[i].hw_value = geo->bg[i].channel;
11447 bg_band->channels[i].max_power = geo->bg[i].max_power;
11448 if (geo->bg[i].flags & LIBIPW_CH_PASSIVE_ONLY)
11449 bg_band->channels[i].flags |=
11450 IEEE80211_CHAN_PASSIVE_SCAN;
11451 if (geo->bg[i].flags & LIBIPW_CH_NO_IBSS)
11452 bg_band->channels[i].flags |=
11453 IEEE80211_CHAN_NO_IBSS;
11454 if (geo->bg[i].flags & LIBIPW_CH_RADAR_DETECT)
11455 bg_band->channels[i].flags |=
11456 IEEE80211_CHAN_RADAR;
11457 /* No equivalent for LIBIPW_CH_80211H_RULES,
11458 LIBIPW_CH_UNIFORM_SPREADING, or
11459 LIBIPW_CH_B_ONLY... */
11460 }
11461 /* point at bitrate info */
11462 bg_band->bitrates = ipw2200_bg_rates;
11463 bg_band->n_bitrates = ipw2200_num_bg_rates;
11464
11465 wdev->wiphy->bands[IEEE80211_BAND_2GHZ] = bg_band;
11466 }
11467
11468 /* fill-out priv->ieee->a_band */
11469 if (geo->a_channels) {
11470 struct ieee80211_supported_band *a_band = &priv->ieee->a_band;
11471
11472 a_band->band = IEEE80211_BAND_5GHZ;
11473 a_band->n_channels = geo->a_channels;
11474 a_band->channels =
11475 kzalloc(geo->a_channels *
11476 sizeof(struct ieee80211_channel), GFP_KERNEL);
11477 /* translate geo->bg to a_band.channels */
11478 for (i = 0; i < geo->a_channels; i++) {
11479 a_band->channels[i].band = IEEE80211_BAND_2GHZ;
11480 a_band->channels[i].center_freq = geo->a[i].freq;
11481 a_band->channels[i].hw_value = geo->a[i].channel;
11482 a_band->channels[i].max_power = geo->a[i].max_power;
11483 if (geo->a[i].flags & LIBIPW_CH_PASSIVE_ONLY)
11484 a_band->channels[i].flags |=
11485 IEEE80211_CHAN_PASSIVE_SCAN;
11486 if (geo->a[i].flags & LIBIPW_CH_NO_IBSS)
11487 a_band->channels[i].flags |=
11488 IEEE80211_CHAN_NO_IBSS;
11489 if (geo->a[i].flags & LIBIPW_CH_RADAR_DETECT)
11490 a_band->channels[i].flags |=
11491 IEEE80211_CHAN_RADAR;
11492 /* No equivalent for LIBIPW_CH_80211H_RULES,
11493 LIBIPW_CH_UNIFORM_SPREADING, or
11494 LIBIPW_CH_B_ONLY... */
11495 }
11496 /* point at bitrate info */
11497 a_band->bitrates = ipw2200_a_rates;
11498 a_band->n_bitrates = ipw2200_num_a_rates;
11499
11500 wdev->wiphy->bands[IEEE80211_BAND_5GHZ] = a_band;
11501 }
11502
11503 set_wiphy_dev(wdev->wiphy, &priv->pci_dev->dev);
11504
11505 /* With that information in place, we can now register the wiphy... */
11506 if (wiphy_register(wdev->wiphy)) {
11507 rc = -EIO;
11508 goto out;
11509 } 11425 }
11510 11426
11511out:
11512 mutex_unlock(&priv->mutex); 11427 mutex_unlock(&priv->mutex);
11513 return rc; 11428 return 0;
11514} 11429}
11515 11430
11516/* PCI driver stuff */ 11431/* PCI driver stuff */
@@ -11641,7 +11556,7 @@ static int ipw_prom_alloc(struct ipw_priv *priv)
11641 if (priv->prom_net_dev) 11556 if (priv->prom_net_dev)
11642 return -EPERM; 11557 return -EPERM;
11643 11558
11644 priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv), 1); 11559 priv->prom_net_dev = alloc_ieee80211(sizeof(struct ipw_prom_priv));
11645 if (priv->prom_net_dev == NULL) 11560 if (priv->prom_net_dev == NULL)
11646 return -ENOMEM; 11561 return -ENOMEM;
11647 11562
@@ -11660,7 +11575,7 @@ static int ipw_prom_alloc(struct ipw_priv *priv)
11660 11575
11661 rc = register_netdev(priv->prom_net_dev); 11576 rc = register_netdev(priv->prom_net_dev);
11662 if (rc) { 11577 if (rc) {
11663 free_ieee80211(priv->prom_net_dev, 1); 11578 free_ieee80211(priv->prom_net_dev);
11664 priv->prom_net_dev = NULL; 11579 priv->prom_net_dev = NULL;
11665 return rc; 11580 return rc;
11666 } 11581 }
@@ -11674,7 +11589,7 @@ static void ipw_prom_free(struct ipw_priv *priv)
11674 return; 11589 return;
11675 11590
11676 unregister_netdev(priv->prom_net_dev); 11591 unregister_netdev(priv->prom_net_dev);
11677 free_ieee80211(priv->prom_net_dev, 1); 11592 free_ieee80211(priv->prom_net_dev);
11678 11593
11679 priv->prom_net_dev = NULL; 11594 priv->prom_net_dev = NULL;
11680} 11595}
@@ -11702,7 +11617,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11702 struct ipw_priv *priv; 11617 struct ipw_priv *priv;
11703 int i; 11618 int i;
11704 11619
11705 net_dev = alloc_ieee80211(sizeof(struct ipw_priv), 0); 11620 net_dev = alloc_ieee80211(sizeof(struct ipw_priv));
11706 if (net_dev == NULL) { 11621 if (net_dev == NULL) {
11707 err = -ENOMEM; 11622 err = -ENOMEM;
11708 goto out; 11623 goto out;
@@ -11850,7 +11765,7 @@ static int __devinit ipw_pci_probe(struct pci_dev *pdev,
11850 pci_disable_device(pdev); 11765 pci_disable_device(pdev);
11851 pci_set_drvdata(pdev, NULL); 11766 pci_set_drvdata(pdev, NULL);
11852 out_free_ieee80211: 11767 out_free_ieee80211:
11853 free_ieee80211(priv->net_dev, 0); 11768 free_ieee80211(priv->net_dev);
11854 out: 11769 out:
11855 return err; 11770 return err;
11856} 11771}
@@ -11917,7 +11832,7 @@ static void __devexit ipw_pci_remove(struct pci_dev *pdev)
11917 pci_release_regions(pdev); 11832 pci_release_regions(pdev);
11918 pci_disable_device(pdev); 11833 pci_disable_device(pdev);
11919 pci_set_drvdata(pdev, NULL); 11834 pci_set_drvdata(pdev, NULL);
11920 free_ieee80211(priv->net_dev, 0); 11835 free_ieee80211(priv->net_dev);
11921 free_firmware(); 11836 free_firmware();
11922} 11837}
11923 11838
diff --git a/drivers/net/wireless/ipw2x00/libipw.h b/drivers/net/wireless/ipw2x00/libipw.h
index bf45391172f3..1e334ff6bd52 100644
--- a/drivers/net/wireless/ipw2x00/libipw.h
+++ b/drivers/net/wireless/ipw2x00/libipw.h
@@ -31,7 +31,6 @@
31#include <linux/ieee80211.h> 31#include <linux/ieee80211.h>
32 32
33#include <net/lib80211.h> 33#include <net/lib80211.h>
34#include <net/cfg80211.h>
35 34
36#define LIBIPW_VERSION "git-1.1.13" 35#define LIBIPW_VERSION "git-1.1.13"
37 36
@@ -784,15 +783,12 @@ struct libipw_geo {
784 783
785struct libipw_device { 784struct libipw_device {
786 struct net_device *dev; 785 struct net_device *dev;
787 struct wireless_dev wdev;
788 struct libipw_security sec; 786 struct libipw_security sec;
789 787
790 /* Bookkeeping structures */ 788 /* Bookkeeping structures */
791 struct libipw_stats ieee_stats; 789 struct libipw_stats ieee_stats;
792 790
793 struct libipw_geo geo; 791 struct libipw_geo geo;
794 struct ieee80211_supported_band bg_band;
795 struct ieee80211_supported_band a_band;
796 792
797 /* Probe / Beacon management */ 793 /* Probe / Beacon management */
798 struct list_head network_free_list; 794 struct list_head network_free_list;
@@ -1018,8 +1014,8 @@ static inline int libipw_is_cck_rate(u8 rate)
1018} 1014}
1019 1015
1020/* ieee80211.c */ 1016/* ieee80211.c */
1021extern void free_ieee80211(struct net_device *dev, int monitor); 1017extern void free_ieee80211(struct net_device *dev);
1022extern struct net_device *alloc_ieee80211(int sizeof_priv, int monitor); 1018extern struct net_device *alloc_ieee80211(int sizeof_priv);
1023extern int libipw_change_mtu(struct net_device *dev, int new_mtu); 1019extern int libipw_change_mtu(struct net_device *dev, int new_mtu);
1024 1020
1025extern void libipw_networks_age(struct libipw_device *ieee, 1021extern void libipw_networks_age(struct libipw_device *ieee,
diff --git a/drivers/net/wireless/ipw2x00/libipw_module.c b/drivers/net/wireless/ipw2x00/libipw_module.c
index a0e9f6aed7da..eb2b60834c17 100644
--- a/drivers/net/wireless/ipw2x00/libipw_module.c
+++ b/drivers/net/wireless/ipw2x00/libipw_module.c
@@ -62,9 +62,6 @@ MODULE_DESCRIPTION(DRV_DESCRIPTION);
62MODULE_AUTHOR(DRV_COPYRIGHT); 62MODULE_AUTHOR(DRV_COPYRIGHT);
63MODULE_LICENSE("GPL"); 63MODULE_LICENSE("GPL");
64 64
65struct cfg80211_ops libipw_config_ops = { };
66void *libipw_wiphy_privid = &libipw_wiphy_privid;
67
68static int libipw_networks_allocate(struct libipw_device *ieee) 65static int libipw_networks_allocate(struct libipw_device *ieee)
69{ 66{
70 if (ieee->networks) 67 if (ieee->networks)
@@ -143,7 +140,7 @@ int libipw_change_mtu(struct net_device *dev, int new_mtu)
143} 140}
144EXPORT_SYMBOL(libipw_change_mtu); 141EXPORT_SYMBOL(libipw_change_mtu);
145 142
146struct net_device *alloc_ieee80211(int sizeof_priv, int monitor) 143struct net_device *alloc_ieee80211(int sizeof_priv)
147{ 144{
148 struct libipw_device *ieee; 145 struct libipw_device *ieee;
149 struct net_device *dev; 146 struct net_device *dev;
@@ -160,31 +157,10 @@ struct net_device *alloc_ieee80211(int sizeof_priv, int monitor)
160 157
161 ieee->dev = dev; 158 ieee->dev = dev;
162 159
163 if (!monitor) {
164 ieee->wdev.wiphy = wiphy_new(&libipw_config_ops, 0);
165 if (!ieee->wdev.wiphy) {
166 LIBIPW_ERROR("Unable to allocate wiphy.\n");
167 goto failed_free_netdev;
168 }
169
170 ieee->dev->ieee80211_ptr = &ieee->wdev;
171 ieee->wdev.iftype = NL80211_IFTYPE_STATION;
172
173 /* Fill-out wiphy structure bits we know... Not enough info
174 here to call set_wiphy_dev or set MAC address or channel info
175 -- have to do that in ->ndo_init... */
176 ieee->wdev.wiphy->privid = libipw_wiphy_privid;
177
178 ieee->wdev.wiphy->max_scan_ssids = 1;
179 ieee->wdev.wiphy->max_scan_ie_len = 0;
180 ieee->wdev.wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION)
181 | BIT(NL80211_IFTYPE_ADHOC);
182 }
183
184 err = libipw_networks_allocate(ieee); 160 err = libipw_networks_allocate(ieee);
185 if (err) { 161 if (err) {
186 LIBIPW_ERROR("Unable to allocate beacon storage: %d\n", err); 162 LIBIPW_ERROR("Unable to allocate beacon storage: %d\n", err);
187 goto failed_free_wiphy; 163 goto failed_free_netdev;
188 } 164 }
189 libipw_networks_initialize(ieee); 165 libipw_networks_initialize(ieee);
190 166
@@ -217,31 +193,19 @@ struct net_device *alloc_ieee80211(int sizeof_priv, int monitor)
217 193
218 return dev; 194 return dev;
219 195
220failed_free_wiphy:
221 if (!monitor)
222 wiphy_free(ieee->wdev.wiphy);
223failed_free_netdev: 196failed_free_netdev:
224 free_netdev(dev); 197 free_netdev(dev);
225failed: 198failed:
226 return NULL; 199 return NULL;
227} 200}
228 201
229void free_ieee80211(struct net_device *dev, int monitor) 202void free_ieee80211(struct net_device *dev)
230{ 203{
231 struct libipw_device *ieee = netdev_priv(dev); 204 struct libipw_device *ieee = netdev_priv(dev);
232 205
233 lib80211_crypt_info_free(&ieee->crypt_info); 206 lib80211_crypt_info_free(&ieee->crypt_info);
234 207
235 libipw_networks_free(ieee); 208 libipw_networks_free(ieee);
236
237 /* free cfg80211 resources */
238 if (!monitor) {
239 wiphy_unregister(ieee->wdev.wiphy);
240 kfree(ieee->a_band.channels);
241 kfree(ieee->bg_band.channels);
242 wiphy_free(ieee->wdev.wiphy);
243 }
244
245 free_netdev(dev); 209 free_netdev(dev);
246} 210}
247 211
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index 2716b91ba9fa..950267ab556a 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -161,5 +161,6 @@ struct iwl_cfg iwl1000_bgn_cfg = {
161 .max_ll_items = OTP_MAX_LL_ITEMS_1000, 161 .max_ll_items = OTP_MAX_LL_ITEMS_1000,
162 .shadow_ram_support = false, 162 .shadow_ram_support = false,
163 .ht_greenfield_support = true, 163 .ht_greenfield_support = true,
164 .use_rts_for_ht = true, /* use rts/cts protection */
164}; 165};
165 166
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
index a16bd4147eac..cbb0585083a9 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945-rs.c
@@ -702,7 +702,7 @@ static void rs_get_rate(void *priv_r, struct ieee80211_sta *sta,
702 u8 sta_id = iwl_find_station(priv, hdr->addr1); 702 u8 sta_id = iwl_find_station(priv, hdr->addr1);
703 703
704 if (sta_id == IWL_INVALID_STATION) { 704 if (sta_id == IWL_INVALID_STATION) {
705 IWL_DEBUG_RATE(priv, "LQ: ADD station %pm\n", 705 IWL_DEBUG_RATE(priv, "LQ: ADD station %pM\n",
706 hdr->addr1); 706 hdr->addr1);
707 sta_id = iwl_add_station(priv, hdr->addr1, false, 707 sta_id = iwl_add_station(priv, hdr->addr1, false,
708 CMD_ASYNC, NULL); 708 CMD_ASYNC, NULL);
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c
index 68136172b823..f059b49dc691 100644
--- a/drivers/net/wireless/iwlwifi/iwl-3945.c
+++ b/drivers/net/wireless/iwlwifi/iwl-3945.c
@@ -611,7 +611,7 @@ static void iwl3945_rx_reply_rx(struct iwl_priv *priv,
611 if (rx_status.band == IEEE80211_BAND_5GHZ) 611 if (rx_status.band == IEEE80211_BAND_5GHZ)
612 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE; 612 rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
613 613
614 rx_status.antenna = le16_to_cpu(rx_hdr->phy_flags & 614 rx_status.antenna = (le16_to_cpu(rx_hdr->phy_flags) &
615 RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4; 615 RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
616 616
617 /* set the preamble flag if appropriate */ 617 /* set the preamble flag if appropriate */
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index d6bc0e051043..6e6f516ba404 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -318,7 +318,7 @@ static void iwl5000_gain_computation(struct iwl_priv *priv,
318 (s32)average_noise[i])) / 1500; 318 (s32)average_noise[i])) / 1500;
319 /* bound gain by 2 bits value max, 3rd bit is sign */ 319 /* bound gain by 2 bits value max, 3rd bit is sign */
320 data->delta_gain_code[i] = 320 data->delta_gain_code[i] =
321 min(abs(delta_g), CHAIN_NOISE_MAX_DELTA_GAIN_CODE); 321 min(abs(delta_g), (long) CHAIN_NOISE_MAX_DELTA_GAIN_CODE);
322 322
323 if (delta_g < 0) 323 if (delta_g < 0)
324 /* set negative sign */ 324 /* set negative sign */
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index c295b8ee9228..1473452ba22f 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -175,6 +175,7 @@ struct iwl_cfg iwl6000h_2agn_cfg = {
175 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 175 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
176 .shadow_ram_support = true, 176 .shadow_ram_support = true,
177 .ht_greenfield_support = true, 177 .ht_greenfield_support = true,
178 .use_rts_for_ht = true, /* use rts/cts protection */
178}; 179};
179 180
180/* 181/*
@@ -198,6 +199,7 @@ struct iwl_cfg iwl6000i_2agn_cfg = {
198 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 199 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
199 .shadow_ram_support = true, 200 .shadow_ram_support = true,
200 .ht_greenfield_support = true, 201 .ht_greenfield_support = true,
202 .use_rts_for_ht = true, /* use rts/cts protection */
201}; 203};
202 204
203struct iwl_cfg iwl6050_2agn_cfg = { 205struct iwl_cfg iwl6050_2agn_cfg = {
@@ -218,6 +220,7 @@ struct iwl_cfg iwl6050_2agn_cfg = {
218 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 220 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
219 .shadow_ram_support = true, 221 .shadow_ram_support = true,
220 .ht_greenfield_support = true, 222 .ht_greenfield_support = true,
223 .use_rts_for_ht = true, /* use rts/cts protection */
221}; 224};
222 225
223struct iwl_cfg iwl6000_3agn_cfg = { 226struct iwl_cfg iwl6000_3agn_cfg = {
@@ -238,6 +241,7 @@ struct iwl_cfg iwl6000_3agn_cfg = {
238 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 241 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
239 .shadow_ram_support = true, 242 .shadow_ram_support = true,
240 .ht_greenfield_support = true, 243 .ht_greenfield_support = true,
244 .use_rts_for_ht = true, /* use rts/cts protection */
241}; 245};
242 246
243struct iwl_cfg iwl6050_3agn_cfg = { 247struct iwl_cfg iwl6050_3agn_cfg = {
@@ -258,6 +262,7 @@ struct iwl_cfg iwl6050_3agn_cfg = {
258 .max_ll_items = OTP_MAX_LL_ITEMS_6x00, 262 .max_ll_items = OTP_MAX_LL_ITEMS_6x00,
259 .shadow_ram_support = true, 263 .shadow_ram_support = true,
260 .ht_greenfield_support = true, 264 .ht_greenfield_support = true,
265 .use_rts_for_ht = true, /* use rts/cts protection */
261}; 266};
262 267
263MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX)); 268MODULE_FIRMWARE(IWL6000_MODULE_FIRMWARE(IWL6000_UCODE_API_MAX));
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
index 346dc06fa7b7..81726ee32858 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn-rs.c
@@ -418,6 +418,15 @@ static void rs_tl_turn_on_agg(struct iwl_priv *priv, u8 tid,
418 else if (tid == IWL_AGG_ALL_TID) 418 else if (tid == IWL_AGG_ALL_TID)
419 for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++) 419 for (tid = 0; tid < TID_MAX_LOAD_COUNT; tid++)
420 rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta); 420 rs_tl_turn_on_agg_for_tid(priv, lq_data, tid, sta);
421 if (priv->cfg->use_rts_for_ht) {
422 /*
423 * switch to RTS/CTS if it is the prefer protection method
424 * for HT traffic
425 */
426 IWL_DEBUG_HT(priv, "use RTS/CTS protection for HT\n");
427 priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
428 iwlcore_commit_rxon(priv);
429 }
421} 430}
422 431
423static inline int get_num_of_ant_from_rate(u32 rate_n_flags) 432static inline int get_num_of_ant_from_rate(u32 rate_n_flags)
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c
index 313d3e5ee84b..921dc4a26fe2 100644
--- a/drivers/net/wireless/iwlwifi/iwl-agn.c
+++ b/drivers/net/wireless/iwlwifi/iwl-agn.c
@@ -116,9 +116,6 @@ int iwl_commit_rxon(struct iwl_priv *priv)
116 116
117 /* always get timestamp with Rx frame */ 117 /* always get timestamp with Rx frame */
118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK; 118 priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
119 /* allow CTS-to-self if possible. this is relevant only for
120 * 5000, but will not damage 4965 */
121 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
122 119
123 ret = iwl_check_rxon_cmd(priv); 120 ret = iwl_check_rxon_cmd(priv);
124 if (ret) { 121 if (ret) {
@@ -218,6 +215,13 @@ int iwl_commit_rxon(struct iwl_priv *priv)
218 "Could not send WEP static key.\n"); 215 "Could not send WEP static key.\n");
219 } 216 }
220 217
218 /*
219 * allow CTS-to-self if possible for new association.
220 * this is relevant only for 5000 series and up,
221 * but will not damage 4965
222 */
223 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
224
221 /* Apply the new configuration 225 /* Apply the new configuration
222 * RXON assoc doesn't clear the station table in uCode, 226 * RXON assoc doesn't clear the station table in uCode,
223 */ 227 */
@@ -3106,8 +3110,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3106 out_pci_disable_device: 3110 out_pci_disable_device:
3107 pci_disable_device(pdev); 3111 pci_disable_device(pdev);
3108 out_ieee80211_free_hw: 3112 out_ieee80211_free_hw:
3109 ieee80211_free_hw(priv->hw);
3110 iwl_free_traffic_mem(priv); 3113 iwl_free_traffic_mem(priv);
3114 ieee80211_free_hw(priv->hw);
3111 out: 3115 out:
3112 return err; 3116 return err;
3113} 3117}
diff --git a/drivers/net/wireless/iwlwifi/iwl-commands.h b/drivers/net/wireless/iwlwifi/iwl-commands.h
index 2c5c88fc38f5..4afaf773aeac 100644
--- a/drivers/net/wireless/iwlwifi/iwl-commands.h
+++ b/drivers/net/wireless/iwlwifi/iwl-commands.h
@@ -1154,7 +1154,7 @@ struct iwl_wep_cmd {
1154#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1) 1154#define RX_RES_PHY_FLAGS_MOD_CCK_MSK cpu_to_le16(1 << 1)
1155#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2) 1155#define RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK cpu_to_le16(1 << 2)
1156#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3) 1156#define RX_RES_PHY_FLAGS_NARROW_BAND_MSK cpu_to_le16(1 << 3)
1157#define RX_RES_PHY_FLAGS_ANTENNA_MSK cpu_to_le16(0xf0) 1157#define RX_RES_PHY_FLAGS_ANTENNA_MSK 0xf0
1158#define RX_RES_PHY_FLAGS_ANTENNA_POS 4 1158#define RX_RES_PHY_FLAGS_ANTENNA_POS 4
1159 1159
1160#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8) 1160#define RX_RES_STATUS_SEC_TYPE_MSK (0x7 << 8)
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index e50103a956b1..7754538c2194 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -213,6 +213,7 @@ struct iwl_mod_params {
213 * @pa_type: used by 6000 series only to identify the type of Power Amplifier 213 * @pa_type: used by 6000 series only to identify the type of Power Amplifier
214 * @max_ll_items: max number of OTP blocks 214 * @max_ll_items: max number of OTP blocks
215 * @shadow_ram_support: shadow support for OTP memory 215 * @shadow_ram_support: shadow support for OTP memory
216 * @use_rts_for_ht: use rts/cts protection for HT traffic
216 * 217 *
217 * We enable the driver to be backward compatible wrt API version. The 218 * We enable the driver to be backward compatible wrt API version. The
218 * driver specifies which APIs it supports (with @ucode_api_max being the 219 * driver specifies which APIs it supports (with @ucode_api_max being the
@@ -255,6 +256,7 @@ struct iwl_cfg {
255 const bool shadow_ram_support; 256 const bool shadow_ram_support;
256 const bool ht_greenfield_support; 257 const bool ht_greenfield_support;
257 const bool broken_powersave; 258 const bool broken_powersave;
259 bool use_rts_for_ht;
258}; 260};
259 261
260/*************************** 262/***************************
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.c b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
index 3d2b93a61e62..e14c9952a935 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.c
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.c
@@ -410,7 +410,6 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
410 u16 *validblockaddr) 410 u16 *validblockaddr)
411{ 411{
412 u16 next_link_addr = 0, link_value = 0, valid_addr; 412 u16 next_link_addr = 0, link_value = 0, valid_addr;
413 int ret = 0;
414 int usedblocks = 0; 413 int usedblocks = 0;
415 414
416 /* set addressing mode to absolute to traverse the link list */ 415 /* set addressing mode to absolute to traverse the link list */
@@ -430,29 +429,29 @@ static int iwl_find_otp_image(struct iwl_priv *priv,
430 * check for more block on the link list 429 * check for more block on the link list
431 */ 430 */
432 valid_addr = next_link_addr; 431 valid_addr = next_link_addr;
433 next_link_addr = link_value; 432 next_link_addr = link_value * sizeof(u16);
434 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n", 433 IWL_DEBUG_INFO(priv, "OTP blocks %d addr 0x%x\n",
435 usedblocks, next_link_addr); 434 usedblocks, next_link_addr);
436 if (iwl_read_otp_word(priv, next_link_addr, &link_value)) 435 if (iwl_read_otp_word(priv, next_link_addr, &link_value))
437 return -EINVAL; 436 return -EINVAL;
438 if (!link_value) { 437 if (!link_value) {
439 /* 438 /*
440 * reach the end of link list, 439 * reach the end of link list, return success and
441 * set address point to the starting address 440 * set address point to the starting address
442 * of the image 441 * of the image
443 */ 442 */
444 goto done; 443 *validblockaddr = valid_addr;
444 /* skip first 2 bytes (link list pointer) */
445 *validblockaddr += 2;
446 return 0;
445 } 447 }
446 /* more in the link list, continue */ 448 /* more in the link list, continue */
447 usedblocks++; 449 usedblocks++;
448 } while (usedblocks < priv->cfg->max_ll_items); 450 } while (usedblocks <= priv->cfg->max_ll_items);
449 /* OTP full, use last block */ 451
450 IWL_DEBUG_INFO(priv, "OTP is full, use last block\n"); 452 /* OTP has no valid blocks */
451done: 453 IWL_DEBUG_INFO(priv, "OTP has no valid blocks\n");
452 *validblockaddr = valid_addr; 454 return -EINVAL;
453 /* skip first 2 bytes (link list pointer) */
454 *validblockaddr += 2;
455 return ret;
456} 455}
457 456
458/** 457/**
diff --git a/drivers/net/wireless/iwlwifi/iwl-eeprom.h b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
index 6b68db7b1b81..80b9e45d9b9c 100644
--- a/drivers/net/wireless/iwlwifi/iwl-eeprom.h
+++ b/drivers/net/wireless/iwlwifi/iwl-eeprom.h
@@ -220,35 +220,35 @@ struct iwl_eeprom_enhanced_txpwr {
220 * Section 10: 2.4 GHz 40MHz channels: 132, 44 (_above_) 220 * Section 10: 2.4 GHz 40MHz channels: 132, 44 (_above_)
221 */ 221 */
222/* 2.4 GHz band: CCK */ 222/* 2.4 GHz band: CCK */
223#define EEPROM_LB_CCK_20_COMMON ((0xAA)\ 223#define EEPROM_LB_CCK_20_COMMON ((0xA8)\
224 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 8 bytes */ 224 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 8 bytes */
225/* 2.4 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */ 225/* 2.4 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */
226#define EEPROM_LB_OFDM_COMMON ((0xB2)\ 226#define EEPROM_LB_OFDM_COMMON ((0xB0)\
227 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */ 227 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
228/* 5.2 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */ 228/* 5.2 GHz band: 20MHz-Legacy, 20MHz-HT, 40MHz-HT */
229#define EEPROM_HB_OFDM_COMMON ((0xCA)\ 229#define EEPROM_HB_OFDM_COMMON ((0xC8)\
230 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */ 230 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
231/* 2.4GHz band channels: 231/* 2.4GHz band channels:
232 * 1Legacy, 1HT, 2Legacy, 2HT, 10Legacy, 10HT, 11Legacy, 11HT */ 232 * 1Legacy, 1HT, 2Legacy, 2HT, 10Legacy, 10HT, 11Legacy, 11HT */
233#define EEPROM_LB_OFDM_20_BAND ((0xE2)\ 233#define EEPROM_LB_OFDM_20_BAND ((0xE0)\
234 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 64 bytes */ 234 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 64 bytes */
235/* 2.4 GHz band HT40 channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1) */ 235/* 2.4 GHz band HT40 channels: (1,+1) (2,+1) (6,+1) (7,+1) (9,+1) */
236#define EEPROM_LB_OFDM_HT40_BAND ((0x122)\ 236#define EEPROM_LB_OFDM_HT40_BAND ((0x120)\
237 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 40 bytes */ 237 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 40 bytes */
238/* 5.2GHz band channels: 36Legacy, 36HT, 64Legacy, 64HT, 100Legacy, 100HT */ 238/* 5.2GHz band channels: 36Legacy, 36HT, 64Legacy, 64HT, 100Legacy, 100HT */
239#define EEPROM_HB_OFDM_20_BAND ((0x14A)\ 239#define EEPROM_HB_OFDM_20_BAND ((0x148)\
240 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 48 bytes */ 240 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 48 bytes */
241/* 5.2 GHz band HT40 channels: (36,+1) (60,+1) (100,+1) */ 241/* 5.2 GHz band HT40 channels: (36,+1) (60,+1) (100,+1) */
242#define EEPROM_HB_OFDM_HT40_BAND ((0x17A)\ 242#define EEPROM_HB_OFDM_HT40_BAND ((0x178)\
243 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */ 243 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 24 bytes */
244/* 2.4 GHz band, channnel 13: Legacy, HT */ 244/* 2.4 GHz band, channnel 13: Legacy, HT */
245#define EEPROM_LB_OFDM_20_CHANNEL_13 ((0x192)\ 245#define EEPROM_LB_OFDM_20_CHANNEL_13 ((0x190)\
246 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */ 246 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
247/* 5.2 GHz band, channnel 140: Legacy, HT */ 247/* 5.2 GHz band, channnel 140: Legacy, HT */
248#define EEPROM_HB_OFDM_20_CHANNEL_140 ((0x1A2)\ 248#define EEPROM_HB_OFDM_20_CHANNEL_140 ((0x1A0)\
249 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */ 249 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
250/* 5.2 GHz band, HT40 channnels (132,+1) (44,+1) */ 250/* 5.2 GHz band, HT40 channnels (132,+1) (44,+1) */
251#define EEPROM_HB_OFDM_HT40_BAND_1 ((0x1B2)\ 251#define EEPROM_HB_OFDM_HT40_BAND_1 ((0x1B0)\
252 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */ 252 | INDIRECT_ADDRESS | INDIRECT_REGULATORY) /* 16 bytes */
253 253
254 254
diff --git a/drivers/net/wireless/iwlwifi/iwl-rx.c b/drivers/net/wireless/iwlwifi/iwl-rx.c
index 8e1bb53c0aa3..493626bcd3ec 100644
--- a/drivers/net/wireless/iwlwifi/iwl-rx.c
+++ b/drivers/net/wireless/iwlwifi/iwl-rx.c
@@ -1044,7 +1044,7 @@ void iwl_rx_reply_rx(struct iwl_priv *priv,
1044 * as a bitmask. 1044 * as a bitmask.
1045 */ 1045 */
1046 rx_status.antenna = 1046 rx_status.antenna =
1047 le16_to_cpu(phy_res->phy_flags & RX_RES_PHY_FLAGS_ANTENNA_MSK) 1047 (le16_to_cpu(phy_res->phy_flags) & RX_RES_PHY_FLAGS_ANTENNA_MSK)
1048 >> RX_RES_PHY_FLAGS_ANTENNA_POS; 1048 >> RX_RES_PHY_FLAGS_ANTENNA_POS;
1049 1049
1050 /* set the preamble flag if appropriate */ 1050 /* set the preamble flag if appropriate */
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c
index aa49230422f3..d00a80334095 100644
--- a/drivers/net/wireless/iwlwifi/iwl3945-base.c
+++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c
@@ -4097,8 +4097,8 @@ static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *e
4097 pci_set_drvdata(pdev, NULL); 4097 pci_set_drvdata(pdev, NULL);
4098 pci_disable_device(pdev); 4098 pci_disable_device(pdev);
4099 out_ieee80211_free_hw: 4099 out_ieee80211_free_hw:
4100 ieee80211_free_hw(priv->hw);
4101 iwl_free_traffic_mem(priv); 4100 iwl_free_traffic_mem(priv);
4101 ieee80211_free_hw(priv->hw);
4102 out: 4102 out:
4103 return err; 4103 return err;
4104} 4104}
diff --git a/drivers/net/wireless/libertas/cmdresp.c b/drivers/net/wireless/libertas/cmdresp.c
index c42d3faa2660..23f684337fdd 100644
--- a/drivers/net/wireless/libertas/cmdresp.c
+++ b/drivers/net/wireless/libertas/cmdresp.c
@@ -3,6 +3,7 @@
3 * responses as well as events generated by firmware. 3 * responses as well as events generated by firmware.
4 */ 4 */
5#include <linux/delay.h> 5#include <linux/delay.h>
6#include <linux/sched.h>
6#include <linux/if_arp.h> 7#include <linux/if_arp.h>
7#include <linux/netdevice.h> 8#include <linux/netdevice.h>
8#include <asm/unaligned.h> 9#include <asm/unaligned.h>
diff --git a/drivers/net/wireless/libertas/ethtool.c b/drivers/net/wireless/libertas/ethtool.c
index 039b555e4d76..53d56ab83c03 100644
--- a/drivers/net/wireless/libertas/ethtool.c
+++ b/drivers/net/wireless/libertas/ethtool.c
@@ -169,16 +169,19 @@ static int lbs_ethtool_set_wol(struct net_device *dev,
169 struct lbs_private *priv = dev->ml_priv; 169 struct lbs_private *priv = dev->ml_priv;
170 uint32_t criteria = 0; 170 uint32_t criteria = 0;
171 171
172 if (priv->wol_criteria == 0xffffffff && wol->wolopts)
173 return -EOPNOTSUPP;
174
175 if (wol->wolopts & ~(WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY)) 172 if (wol->wolopts & ~(WAKE_UCAST|WAKE_MCAST|WAKE_BCAST|WAKE_PHY))
176 return -EOPNOTSUPP; 173 return -EOPNOTSUPP;
177 174
178 if (wol->wolopts & WAKE_UCAST) criteria |= EHS_WAKE_ON_UNICAST_DATA; 175 if (wol->wolopts & WAKE_UCAST)
179 if (wol->wolopts & WAKE_MCAST) criteria |= EHS_WAKE_ON_MULTICAST_DATA; 176 criteria |= EHS_WAKE_ON_UNICAST_DATA;
180 if (wol->wolopts & WAKE_BCAST) criteria |= EHS_WAKE_ON_BROADCAST_DATA; 177 if (wol->wolopts & WAKE_MCAST)
181 if (wol->wolopts & WAKE_PHY) criteria |= EHS_WAKE_ON_MAC_EVENT; 178 criteria |= EHS_WAKE_ON_MULTICAST_DATA;
179 if (wol->wolopts & WAKE_BCAST)
180 criteria |= EHS_WAKE_ON_BROADCAST_DATA;
181 if (wol->wolopts & WAKE_PHY)
182 criteria |= EHS_WAKE_ON_MAC_EVENT;
183 if (wol->wolopts == 0)
184 criteria |= EHS_REMOVE_WAKEUP;
182 185
183 return lbs_host_sleep_cfg(priv, criteria, (struct wol_config *)NULL); 186 return lbs_host_sleep_cfg(priv, criteria, (struct wol_config *)NULL);
184} 187}
diff --git a/drivers/net/wireless/libertas/if_spi.c b/drivers/net/wireless/libertas/if_spi.c
index cb8be8d7abc1..5b3672c4d0cc 100644
--- a/drivers/net/wireless/libertas/if_spi.c
+++ b/drivers/net/wireless/libertas/if_spi.c
@@ -134,7 +134,7 @@ static void spu_transaction_finish(struct if_spi_card *card)
134static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len) 134static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len)
135{ 135{
136 int err = 0; 136 int err = 0;
137 u16 reg_out = cpu_to_le16(reg | IF_SPI_WRITE_OPERATION_MASK); 137 __le16 reg_out = cpu_to_le16(reg | IF_SPI_WRITE_OPERATION_MASK);
138 struct spi_message m; 138 struct spi_message m;
139 struct spi_transfer reg_trans; 139 struct spi_transfer reg_trans;
140 struct spi_transfer data_trans; 140 struct spi_transfer data_trans;
@@ -166,7 +166,7 @@ static int spu_write(struct if_spi_card *card, u16 reg, const u8 *buf, int len)
166 166
167static inline int spu_write_u16(struct if_spi_card *card, u16 reg, u16 val) 167static inline int spu_write_u16(struct if_spi_card *card, u16 reg, u16 val)
168{ 168{
169 u16 buff; 169 __le16 buff;
170 170
171 buff = cpu_to_le16(val); 171 buff = cpu_to_le16(val);
172 return spu_write(card, reg, (u8 *)&buff, sizeof(u16)); 172 return spu_write(card, reg, (u8 *)&buff, sizeof(u16));
@@ -188,7 +188,7 @@ static int spu_read(struct if_spi_card *card, u16 reg, u8 *buf, int len)
188{ 188{
189 unsigned int delay; 189 unsigned int delay;
190 int err = 0; 190 int err = 0;
191 u16 reg_out = cpu_to_le16(reg | IF_SPI_READ_OPERATION_MASK); 191 __le16 reg_out = cpu_to_le16(reg | IF_SPI_READ_OPERATION_MASK);
192 struct spi_message m; 192 struct spi_message m;
193 struct spi_transfer reg_trans; 193 struct spi_transfer reg_trans;
194 struct spi_transfer dummy_trans; 194 struct spi_transfer dummy_trans;
@@ -235,7 +235,7 @@ static int spu_read(struct if_spi_card *card, u16 reg, u8 *buf, int len)
235/* Read 16 bits from an SPI register */ 235/* Read 16 bits from an SPI register */
236static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val) 236static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val)
237{ 237{
238 u16 buf; 238 __le16 buf;
239 int ret; 239 int ret;
240 240
241 ret = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); 241 ret = spu_read(card, reg, (u8 *)&buf, sizeof(buf));
@@ -248,7 +248,7 @@ static inline int spu_read_u16(struct if_spi_card *card, u16 reg, u16 *val)
248 * The low 16 bits are read first. */ 248 * The low 16 bits are read first. */
249static int spu_read_u32(struct if_spi_card *card, u16 reg, u32 *val) 249static int spu_read_u32(struct if_spi_card *card, u16 reg, u32 *val)
250{ 250{
251 u32 buf; 251 __le32 buf;
252 int err; 252 int err;
253 253
254 err = spu_read(card, reg, (u8 *)&buf, sizeof(buf)); 254 err = spu_read(card, reg, (u8 *)&buf, sizeof(buf));
diff --git a/drivers/net/wireless/libertas/if_usb.c b/drivers/net/wireless/libertas/if_usb.c
index 92bc8c5f1ca2..3fac4efa5ac8 100644
--- a/drivers/net/wireless/libertas/if_usb.c
+++ b/drivers/net/wireless/libertas/if_usb.c
@@ -508,7 +508,7 @@ static int __if_usb_submit_rx_urb(struct if_usb_card *cardp,
508 /* Fill the receive configuration URB and initialise the Rx call back */ 508 /* Fill the receive configuration URB and initialise the Rx call back */
509 usb_fill_bulk_urb(cardp->rx_urb, cardp->udev, 509 usb_fill_bulk_urb(cardp->rx_urb, cardp->udev,
510 usb_rcvbulkpipe(cardp->udev, cardp->ep_in), 510 usb_rcvbulkpipe(cardp->udev, cardp->ep_in),
511 (void *) (skb->tail + (size_t) IPFIELD_ALIGN_OFFSET), 511 skb->data + IPFIELD_ALIGN_OFFSET,
512 MRVDRV_ETH_RX_PACKET_BUFFER_SIZE, callbackfn, 512 MRVDRV_ETH_RX_PACKET_BUFFER_SIZE, callbackfn,
513 cardp); 513 cardp);
514 514
diff --git a/drivers/net/wireless/p54/p54usb.c b/drivers/net/wireless/p54/p54usb.c
index 17e199546eeb..92af9b96bb7a 100644
--- a/drivers/net/wireless/p54/p54usb.c
+++ b/drivers/net/wireless/p54/p54usb.c
@@ -426,12 +426,16 @@ static const char p54u_romboot_3887[] = "~~~~";
426static int p54u_firmware_reset_3887(struct ieee80211_hw *dev) 426static int p54u_firmware_reset_3887(struct ieee80211_hw *dev)
427{ 427{
428 struct p54u_priv *priv = dev->priv; 428 struct p54u_priv *priv = dev->priv;
429 u8 buf[4]; 429 u8 *buf;
430 int ret; 430 int ret;
431 431
432 memcpy(&buf, p54u_romboot_3887, sizeof(buf)); 432 buf = kmalloc(4, GFP_KERNEL);
433 if (!buf)
434 return -ENOMEM;
435 memcpy(buf, p54u_romboot_3887, 4);
433 ret = p54u_bulk_msg(priv, P54U_PIPE_DATA, 436 ret = p54u_bulk_msg(priv, P54U_PIPE_DATA,
434 buf, sizeof(buf)); 437 buf, 4);
438 kfree(buf);
435 if (ret) 439 if (ret)
436 dev_err(&priv->udev->dev, "(p54usb) unable to jump to " 440 dev_err(&priv->udev->dev, "(p54usb) unable to jump to "
437 "boot ROM (%d)!\n", ret); 441 "boot ROM (%d)!\n", ret);
diff --git a/drivers/net/wireless/ray_cs.c b/drivers/net/wireless/ray_cs.c
index 88cd58eb3b9f..1c88c2ea59aa 100644
--- a/drivers/net/wireless/ray_cs.c
+++ b/drivers/net/wireless/ray_cs.c
@@ -2879,7 +2879,7 @@ static int write_essid(struct file *file, const char __user *buffer,
2879 unsigned long count, void *data) 2879 unsigned long count, void *data)
2880{ 2880{
2881 static char proc_essid[33]; 2881 static char proc_essid[33];
2882 int len = count; 2882 unsigned int len = count;
2883 2883
2884 if (len > 32) 2884 if (len > 32)
2885 len = 32; 2885 len = 32;
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index a084077a1c61..9fe770f7d7bb 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -1994,7 +1994,7 @@ static void rt2800usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1994 rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size); 1994 rt2x00_set_field32(&word, TXWI_W1_BW_WIN_SIZE, txdesc->ba_size);
1995 rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID, 1995 rt2x00_set_field32(&word, TXWI_W1_WIRELESS_CLI_ID,
1996 test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ? 1996 test_bit(ENTRY_TXD_ENCRYPT, &txdesc->flags) ?
1997 (skbdesc->entry->entry_idx + 1) : 0xff); 1997 txdesc->key_idx : 0xff);
1998 rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT, 1998 rt2x00_set_field32(&word, TXWI_W1_MPDU_TOTAL_BYTE_COUNT,
1999 skb->len - txdesc->l2pad); 1999 skb->len - txdesc->l2pad);
2000 rt2x00_set_field32(&word, TXWI_W1_PACKETID, 2000 rt2x00_set_field32(&word, TXWI_W1_PACKETID,
diff --git a/drivers/net/wireless/rt2x00/rt2x00dev.c b/drivers/net/wireless/rt2x00/rt2x00dev.c
index 71761b343839..73bbec58341e 100644
--- a/drivers/net/wireless/rt2x00/rt2x00dev.c
+++ b/drivers/net/wireless/rt2x00/rt2x00dev.c
@@ -815,6 +815,8 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
815 815
816 mutex_init(&rt2x00dev->csr_mutex); 816 mutex_init(&rt2x00dev->csr_mutex);
817 817
818 set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
819
818 /* 820 /*
819 * Make room for rt2x00_intf inside the per-interface 821 * Make room for rt2x00_intf inside the per-interface
820 * structure ieee80211_vif. 822 * structure ieee80211_vif.
@@ -871,8 +873,6 @@ int rt2x00lib_probe_dev(struct rt2x00_dev *rt2x00dev)
871 rt2x00leds_register(rt2x00dev); 873 rt2x00leds_register(rt2x00dev);
872 rt2x00debug_register(rt2x00dev); 874 rt2x00debug_register(rt2x00dev);
873 875
874 set_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
875
876 return 0; 876 return 0;
877 877
878exit: 878exit:
diff --git a/drivers/net/wireless/rt2x00/rt2x00link.c b/drivers/net/wireless/rt2x00/rt2x00link.c
index c64db0ba7f40..c708d0be9155 100644
--- a/drivers/net/wireless/rt2x00/rt2x00link.c
+++ b/drivers/net/wireless/rt2x00/rt2x00link.c
@@ -362,8 +362,9 @@ void rt2x00link_start_tuner(struct rt2x00_dev *rt2x00dev)
362 362
363 rt2x00link_reset_tuner(rt2x00dev, false); 363 rt2x00link_reset_tuner(rt2x00dev, false);
364 364
365 ieee80211_queue_delayed_work(rt2x00dev->hw, 365 if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
366 &link->work, LINK_TUNE_INTERVAL); 366 ieee80211_queue_delayed_work(rt2x00dev->hw,
367 &link->work, LINK_TUNE_INTERVAL);
367} 368}
368 369
369void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev) 370void rt2x00link_stop_tuner(struct rt2x00_dev *rt2x00dev)
@@ -469,8 +470,10 @@ static void rt2x00link_tuner(struct work_struct *work)
469 * Increase tuner counter, and reschedule the next link tuner run. 470 * Increase tuner counter, and reschedule the next link tuner run.
470 */ 471 */
471 link->count++; 472 link->count++;
472 ieee80211_queue_delayed_work(rt2x00dev->hw, 473
473 &link->work, LINK_TUNE_INTERVAL); 474 if (test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
475 ieee80211_queue_delayed_work(rt2x00dev->hw,
476 &link->work, LINK_TUNE_INTERVAL);
474} 477}
475 478
476void rt2x00link_register(struct rt2x00_dev *rt2x00dev) 479void rt2x00link_register(struct rt2x00_dev *rt2x00dev)
diff --git a/drivers/net/wireless/rt2x00/rt2x00usb.c b/drivers/net/wireless/rt2x00/rt2x00usb.c
index 501544882c2c..f02b48a90593 100644
--- a/drivers/net/wireless/rt2x00/rt2x00usb.c
+++ b/drivers/net/wireless/rt2x00/rt2x00usb.c
@@ -47,6 +47,8 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev,
47 (requesttype == USB_VENDOR_REQUEST_IN) ? 47 (requesttype == USB_VENDOR_REQUEST_IN) ?
48 usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0); 48 usb_rcvctrlpipe(usb_dev, 0) : usb_sndctrlpipe(usb_dev, 0);
49 49
50 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
51 return -ENODEV;
50 52
51 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 53 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
52 status = usb_control_msg(usb_dev, pipe, request, requesttype, 54 status = usb_control_msg(usb_dev, pipe, request, requesttype,
@@ -60,8 +62,10 @@ int rt2x00usb_vendor_request(struct rt2x00_dev *rt2x00dev,
60 * -ENODEV: Device has disappeared, no point continuing. 62 * -ENODEV: Device has disappeared, no point continuing.
61 * All other errors: Try again. 63 * All other errors: Try again.
62 */ 64 */
63 else if (status == -ENODEV) 65 else if (status == -ENODEV) {
66 clear_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags);
64 break; 67 break;
68 }
65 } 69 }
66 70
67 ERROR(rt2x00dev, 71 ERROR(rt2x00dev,
@@ -161,6 +165,9 @@ int rt2x00usb_regbusy_read(struct rt2x00_dev *rt2x00dev,
161{ 165{
162 unsigned int i; 166 unsigned int i;
163 167
168 if (!test_bit(DEVICE_STATE_PRESENT, &rt2x00dev->flags))
169 return -ENODEV;
170
164 for (i = 0; i < REGISTER_BUSY_COUNT; i++) { 171 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
165 rt2x00usb_register_read_lock(rt2x00dev, offset, reg); 172 rt2x00usb_register_read_lock(rt2x00dev, offset, reg);
166 if (!rt2x00_get_field32(*reg, field)) 173 if (!rt2x00_get_field32(*reg, field))
diff --git a/drivers/net/wireless/rt2x00/rt73usb.c b/drivers/net/wireless/rt2x00/rt73usb.c
index b8f5ee33445e..14e7bb210075 100644
--- a/drivers/net/wireless/rt2x00/rt73usb.c
+++ b/drivers/net/wireless/rt2x00/rt73usb.c
@@ -2389,10 +2389,13 @@ static struct usb_device_id rt73usb_device_table[] = {
2389 { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) }, 2389 { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2390 { USB_DEVICE(0x13b1, 0x0028), USB_DEVICE_DATA(&rt73usb_ops) }, 2390 { USB_DEVICE(0x13b1, 0x0028), USB_DEVICE_DATA(&rt73usb_ops) },
2391 /* MSI */ 2391 /* MSI */
2392 { USB_DEVICE(0x0db0, 0x4600), USB_DEVICE_DATA(&rt73usb_ops) },
2392 { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) }, 2393 { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2393 { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) }, 2394 { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2394 { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) }, 2395 { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2395 { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) }, 2396 { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2397 /* Ovislink */
2398 { USB_DEVICE(0x1b75, 0x7318), USB_DEVICE_DATA(&rt73usb_ops) },
2396 /* Ralink */ 2399 /* Ralink */
2397 { USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) }, 2400 { USB_DEVICE(0x04bb, 0x093d), USB_DEVICE_DATA(&rt73usb_ops) },
2398 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) }, 2401 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
@@ -2420,6 +2423,8 @@ static struct usb_device_id rt73usb_device_table[] = {
2420 /* Planex */ 2423 /* Planex */
2421 { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) }, 2424 { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2422 { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) }, 2425 { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2426 /* WideTell */
2427 { USB_DEVICE(0x7167, 0x3840), USB_DEVICE_DATA(&rt73usb_ops) },
2423 /* Zcom */ 2428 /* Zcom */
2424 { USB_DEVICE(0x0cde, 0x001c), USB_DEVICE_DATA(&rt73usb_ops) }, 2429 { USB_DEVICE(0x0cde, 0x001c), USB_DEVICE_DATA(&rt73usb_ops) },
2425 /* ZyXEL */ 2430 /* ZyXEL */
diff --git a/drivers/net/wireless/rtl818x/rtl8187_leds.c b/drivers/net/wireless/rtl818x/rtl8187_leds.c
index a1c670fc1552..cf8a4a40fdf6 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_leds.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_leds.c
@@ -210,10 +210,10 @@ void rtl8187_leds_exit(struct ieee80211_hw *dev)
210 210
211 /* turn the LED off before exiting */ 211 /* turn the LED off before exiting */
212 ieee80211_queue_delayed_work(dev, &priv->led_off, 0); 212 ieee80211_queue_delayed_work(dev, &priv->led_off, 0);
213 cancel_delayed_work_sync(&priv->led_off);
214 cancel_delayed_work_sync(&priv->led_on);
215 rtl8187_unregister_led(&priv->led_rx); 213 rtl8187_unregister_led(&priv->led_rx);
216 rtl8187_unregister_led(&priv->led_tx); 214 rtl8187_unregister_led(&priv->led_tx);
215 cancel_delayed_work_sync(&priv->led_off);
216 cancel_delayed_work_sync(&priv->led_on);
217} 217}
218#endif /* def CONFIG_RTL8187_LED */ 218#endif /* def CONFIG_RTL8187_LED */
219 219
diff --git a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
index 9fab13e4004e..cad8037ab2af 100644
--- a/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
+++ b/drivers/net/wireless/rtl818x/rtl8187_rfkill.c
@@ -18,6 +18,7 @@
18#include <net/mac80211.h> 18#include <net/mac80211.h>
19 19
20#include "rtl8187.h" 20#include "rtl8187.h"
21#include "rtl8187_rfkill.h"
21 22
22static bool rtl8187_is_radio_enabled(struct rtl8187_priv *priv) 23static bool rtl8187_is_radio_enabled(struct rtl8187_priv *priv)
23{ 24{
diff --git a/drivers/net/znet.c b/drivers/net/znet.c
index a0384b6f09b6..b42347333750 100644
--- a/drivers/net/znet.c
+++ b/drivers/net/znet.c
@@ -169,7 +169,6 @@ static void znet_tx_timeout (struct net_device *dev);
169static int znet_request_resources (struct net_device *dev) 169static int znet_request_resources (struct net_device *dev)
170{ 170{
171 struct znet_private *znet = netdev_priv(dev); 171 struct znet_private *znet = netdev_priv(dev);
172 unsigned long flags;
173 172
174 if (request_irq (dev->irq, &znet_interrupt, 0, "ZNet", dev)) 173 if (request_irq (dev->irq, &znet_interrupt, 0, "ZNet", dev))
175 goto failed; 174 goto failed;
@@ -187,13 +186,9 @@ static int znet_request_resources (struct net_device *dev)
187 free_sia: 186 free_sia:
188 release_region (znet->sia_base, znet->sia_size); 187 release_region (znet->sia_base, znet->sia_size);
189 free_tx_dma: 188 free_tx_dma:
190 flags = claim_dma_lock();
191 free_dma (znet->tx_dma); 189 free_dma (znet->tx_dma);
192 release_dma_lock (flags);
193 free_rx_dma: 190 free_rx_dma:
194 flags = claim_dma_lock();
195 free_dma (znet->rx_dma); 191 free_dma (znet->rx_dma);
196 release_dma_lock (flags);
197 free_irq: 192 free_irq:
198 free_irq (dev->irq, dev); 193 free_irq (dev->irq, dev);
199 failed: 194 failed:
@@ -203,14 +198,11 @@ static int znet_request_resources (struct net_device *dev)
203static void znet_release_resources (struct net_device *dev) 198static void znet_release_resources (struct net_device *dev)
204{ 199{
205 struct znet_private *znet = netdev_priv(dev); 200 struct znet_private *znet = netdev_priv(dev);
206 unsigned long flags;
207 201
208 release_region (znet->sia_base, znet->sia_size); 202 release_region (znet->sia_base, znet->sia_size);
209 release_region (dev->base_addr, znet->io_size); 203 release_region (dev->base_addr, znet->io_size);
210 flags = claim_dma_lock();
211 free_dma (znet->tx_dma); 204 free_dma (znet->tx_dma);
212 free_dma (znet->rx_dma); 205 free_dma (znet->rx_dma);
213 release_dma_lock (flags);
214 free_irq (dev->irq, dev); 206 free_irq (dev->irq, dev);
215} 207}
216 208
diff --git a/drivers/oprofile/event_buffer.c b/drivers/oprofile/event_buffer.c
index 2b7ae366ceb1..5df60a6b6776 100644
--- a/drivers/oprofile/event_buffer.c
+++ b/drivers/oprofile/event_buffer.c
@@ -35,12 +35,23 @@ static size_t buffer_pos;
35/* atomic_t because wait_event checks it outside of buffer_mutex */ 35/* atomic_t because wait_event checks it outside of buffer_mutex */
36static atomic_t buffer_ready = ATOMIC_INIT(0); 36static atomic_t buffer_ready = ATOMIC_INIT(0);
37 37
38/* Add an entry to the event buffer. When we 38/*
39 * get near to the end we wake up the process 39 * Add an entry to the event buffer. When we get near to the end we
40 * sleeping on the read() of the file. 40 * wake up the process sleeping on the read() of the file. To protect
41 * the event_buffer this function may only be called when buffer_mutex
42 * is set.
41 */ 43 */
42void add_event_entry(unsigned long value) 44void add_event_entry(unsigned long value)
43{ 45{
46 /*
47 * This shouldn't happen since all workqueues or handlers are
48 * canceled or flushed before the event buffer is freed.
49 */
50 if (!event_buffer) {
51 WARN_ON_ONCE(1);
52 return;
53 }
54
44 if (buffer_pos == buffer_size) { 55 if (buffer_pos == buffer_size) {
45 atomic_inc(&oprofile_stats.event_lost_overflow); 56 atomic_inc(&oprofile_stats.event_lost_overflow);
46 return; 57 return;
@@ -69,7 +80,6 @@ void wake_up_buffer_waiter(void)
69 80
70int alloc_event_buffer(void) 81int alloc_event_buffer(void)
71{ 82{
72 int err = -ENOMEM;
73 unsigned long flags; 83 unsigned long flags;
74 84
75 spin_lock_irqsave(&oprofilefs_lock, flags); 85 spin_lock_irqsave(&oprofilefs_lock, flags);
@@ -80,21 +90,22 @@ int alloc_event_buffer(void)
80 if (buffer_watershed >= buffer_size) 90 if (buffer_watershed >= buffer_size)
81 return -EINVAL; 91 return -EINVAL;
82 92
93 buffer_pos = 0;
83 event_buffer = vmalloc(sizeof(unsigned long) * buffer_size); 94 event_buffer = vmalloc(sizeof(unsigned long) * buffer_size);
84 if (!event_buffer) 95 if (!event_buffer)
85 goto out; 96 return -ENOMEM;
86 97
87 err = 0; 98 return 0;
88out:
89 return err;
90} 99}
91 100
92 101
93void free_event_buffer(void) 102void free_event_buffer(void)
94{ 103{
104 mutex_lock(&buffer_mutex);
95 vfree(event_buffer); 105 vfree(event_buffer);
96 106 buffer_pos = 0;
97 event_buffer = NULL; 107 event_buffer = NULL;
108 mutex_unlock(&buffer_mutex);
98} 109}
99 110
100 111
@@ -167,6 +178,12 @@ static ssize_t event_buffer_read(struct file *file, char __user *buf,
167 178
168 mutex_lock(&buffer_mutex); 179 mutex_lock(&buffer_mutex);
169 180
181 /* May happen if the buffer is freed during pending reads. */
182 if (!event_buffer) {
183 retval = -EINTR;
184 goto out;
185 }
186
170 atomic_set(&buffer_ready, 0); 187 atomic_set(&buffer_ready, 0);
171 188
172 retval = -EFAULT; 189 retval = -EFAULT;
diff --git a/drivers/pci/dmar.c b/drivers/pci/dmar.c
index 14bbaa17e2ca..b952ebc7a78b 100644
--- a/drivers/pci/dmar.c
+++ b/drivers/pci/dmar.c
@@ -175,15 +175,6 @@ dmar_parse_one_drhd(struct acpi_dmar_header *header)
175 int ret = 0; 175 int ret = 0;
176 176
177 drhd = (struct acpi_dmar_hardware_unit *)header; 177 drhd = (struct acpi_dmar_hardware_unit *)header;
178 if (!drhd->address) {
179 /* Promote an attitude of violence to a BIOS engineer today */
180 WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n"
181 "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
182 dmi_get_system_info(DMI_BIOS_VENDOR),
183 dmi_get_system_info(DMI_BIOS_VERSION),
184 dmi_get_system_info(DMI_PRODUCT_VERSION));
185 return -ENODEV;
186 }
187 dmaru = kzalloc(sizeof(*dmaru), GFP_KERNEL); 178 dmaru = kzalloc(sizeof(*dmaru), GFP_KERNEL);
188 if (!dmaru) 179 if (!dmaru)
189 return -ENOMEM; 180 return -ENOMEM;
@@ -354,6 +345,7 @@ dmar_table_print_dmar_entry(struct acpi_dmar_header *header)
354 struct acpi_dmar_hardware_unit *drhd; 345 struct acpi_dmar_hardware_unit *drhd;
355 struct acpi_dmar_reserved_memory *rmrr; 346 struct acpi_dmar_reserved_memory *rmrr;
356 struct acpi_dmar_atsr *atsr; 347 struct acpi_dmar_atsr *atsr;
348 struct acpi_dmar_rhsa *rhsa;
357 349
358 switch (header->type) { 350 switch (header->type) {
359 case ACPI_DMAR_TYPE_HARDWARE_UNIT: 351 case ACPI_DMAR_TYPE_HARDWARE_UNIT:
@@ -375,6 +367,12 @@ dmar_table_print_dmar_entry(struct acpi_dmar_header *header)
375 atsr = container_of(header, struct acpi_dmar_atsr, header); 367 atsr = container_of(header, struct acpi_dmar_atsr, header);
376 printk(KERN_INFO PREFIX "ATSR flags: %#x\n", atsr->flags); 368 printk(KERN_INFO PREFIX "ATSR flags: %#x\n", atsr->flags);
377 break; 369 break;
370 case ACPI_DMAR_HARDWARE_AFFINITY:
371 rhsa = container_of(header, struct acpi_dmar_rhsa, header);
372 printk(KERN_INFO PREFIX "RHSA base: %#016Lx proximity domain: %#x\n",
373 (unsigned long long)rhsa->base_address,
374 rhsa->proximity_domain);
375 break;
378 } 376 }
379} 377}
380 378
@@ -459,9 +457,13 @@ parse_dmar_table(void)
459 ret = dmar_parse_one_atsr(entry_header); 457 ret = dmar_parse_one_atsr(entry_header);
460#endif 458#endif
461 break; 459 break;
460 case ACPI_DMAR_HARDWARE_AFFINITY:
461 /* We don't do anything with RHSA (yet?) */
462 break;
462 default: 463 default:
463 printk(KERN_WARNING PREFIX 464 printk(KERN_WARNING PREFIX
464 "Unknown DMAR structure type\n"); 465 "Unknown DMAR structure type %d\n",
466 entry_header->type);
465 ret = 0; /* for forward compatibility */ 467 ret = 0; /* for forward compatibility */
466 break; 468 break;
467 } 469 }
@@ -580,12 +582,53 @@ int __init dmar_table_init(void)
580 return 0; 582 return 0;
581} 583}
582 584
585int __init check_zero_address(void)
586{
587 struct acpi_table_dmar *dmar;
588 struct acpi_dmar_header *entry_header;
589 struct acpi_dmar_hardware_unit *drhd;
590
591 dmar = (struct acpi_table_dmar *)dmar_tbl;
592 entry_header = (struct acpi_dmar_header *)(dmar + 1);
593
594 while (((unsigned long)entry_header) <
595 (((unsigned long)dmar) + dmar_tbl->length)) {
596 /* Avoid looping forever on bad ACPI tables */
597 if (entry_header->length == 0) {
598 printk(KERN_WARNING PREFIX
599 "Invalid 0-length structure\n");
600 return 0;
601 }
602
603 if (entry_header->type == ACPI_DMAR_TYPE_HARDWARE_UNIT) {
604 drhd = (void *)entry_header;
605 if (!drhd->address) {
606 /* Promote an attitude of violence to a BIOS engineer today */
607 WARN(1, "Your BIOS is broken; DMAR reported at address zero!\n"
608 "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
609 dmi_get_system_info(DMI_BIOS_VENDOR),
610 dmi_get_system_info(DMI_BIOS_VERSION),
611 dmi_get_system_info(DMI_PRODUCT_VERSION));
612#ifdef CONFIG_DMAR
613 dmar_disabled = 1;
614#endif
615 return 0;
616 }
617 break;
618 }
619
620 entry_header = ((void *)entry_header + entry_header->length);
621 }
622 return 1;
623}
624
583void __init detect_intel_iommu(void) 625void __init detect_intel_iommu(void)
584{ 626{
585 int ret; 627 int ret;
586 628
587 ret = dmar_table_detect(); 629 ret = dmar_table_detect();
588 630 if (ret)
631 ret = check_zero_address();
589 { 632 {
590#ifdef CONFIG_INTR_REMAP 633#ifdef CONFIG_INTR_REMAP
591 struct acpi_table_dmar *dmar; 634 struct acpi_table_dmar *dmar;
diff --git a/drivers/pci/hotplug/cpqphp.h b/drivers/pci/hotplug/cpqphp.h
index 53836001d511..9c6a9fd26812 100644
--- a/drivers/pci/hotplug/cpqphp.h
+++ b/drivers/pci/hotplug/cpqphp.h
@@ -32,6 +32,7 @@
32#include <asm/io.h> /* for read? and write? functions */ 32#include <asm/io.h> /* for read? and write? functions */
33#include <linux/delay.h> /* for delays */ 33#include <linux/delay.h> /* for delays */
34#include <linux/mutex.h> 34#include <linux/mutex.h>
35#include <linux/sched.h> /* for signal_pending() */
35 36
36#define MY_NAME "cpqphp" 37#define MY_NAME "cpqphp"
37 38
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c
index 855dd7ca47f3..1840a0578a42 100644
--- a/drivers/pci/intel-iommu.c
+++ b/drivers/pci/intel-iommu.c
@@ -48,6 +48,7 @@
48 48
49#define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY) 49#define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
50#define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA) 50#define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
51#define IS_AZALIA(pdev) ((pdev)->vendor == 0x8086 && (pdev)->device == 0x3a3e)
51 52
52#define IOAPIC_RANGE_START (0xfee00000) 53#define IOAPIC_RANGE_START (0xfee00000)
53#define IOAPIC_RANGE_END (0xfeefffff) 54#define IOAPIC_RANGE_END (0xfeefffff)
@@ -94,6 +95,7 @@ static inline unsigned long virt_to_dma_pfn(void *p)
94/* global iommu list, set NULL for ignored DMAR units */ 95/* global iommu list, set NULL for ignored DMAR units */
95static struct intel_iommu **g_iommus; 96static struct intel_iommu **g_iommus;
96 97
98static void __init check_tylersburg_isoch(void);
97static int rwbf_quirk; 99static int rwbf_quirk;
98 100
99/* 101/*
@@ -1934,6 +1936,9 @@ error:
1934} 1936}
1935 1937
1936static int iommu_identity_mapping; 1938static int iommu_identity_mapping;
1939#define IDENTMAP_ALL 1
1940#define IDENTMAP_GFX 2
1941#define IDENTMAP_AZALIA 4
1937 1942
1938static int iommu_domain_identity_map(struct dmar_domain *domain, 1943static int iommu_domain_identity_map(struct dmar_domain *domain,
1939 unsigned long long start, 1944 unsigned long long start,
@@ -2151,8 +2156,14 @@ static int domain_add_dev_info(struct dmar_domain *domain,
2151 2156
2152static int iommu_should_identity_map(struct pci_dev *pdev, int startup) 2157static int iommu_should_identity_map(struct pci_dev *pdev, int startup)
2153{ 2158{
2154 if (iommu_identity_mapping == 2) 2159 if ((iommu_identity_mapping & IDENTMAP_AZALIA) && IS_AZALIA(pdev))
2155 return IS_GFX_DEVICE(pdev); 2160 return 1;
2161
2162 if ((iommu_identity_mapping & IDENTMAP_GFX) && IS_GFX_DEVICE(pdev))
2163 return 1;
2164
2165 if (!(iommu_identity_mapping & IDENTMAP_ALL))
2166 return 0;
2156 2167
2157 /* 2168 /*
2158 * We want to start off with all devices in the 1:1 domain, and 2169 * We want to start off with all devices in the 1:1 domain, and
@@ -2332,11 +2343,14 @@ int __init init_dmars(void)
2332 } 2343 }
2333 2344
2334 if (iommu_pass_through) 2345 if (iommu_pass_through)
2335 iommu_identity_mapping = 1; 2346 iommu_identity_mapping |= IDENTMAP_ALL;
2347
2336#ifdef CONFIG_DMAR_BROKEN_GFX_WA 2348#ifdef CONFIG_DMAR_BROKEN_GFX_WA
2337 else 2349 iommu_identity_mapping |= IDENTMAP_GFX;
2338 iommu_identity_mapping = 2;
2339#endif 2350#endif
2351
2352 check_tylersburg_isoch();
2353
2340 /* 2354 /*
2341 * If pass through is not set or not enabled, setup context entries for 2355 * If pass through is not set or not enabled, setup context entries for
2342 * identity mappings for rmrr, gfx, and isa and may fall back to static 2356 * identity mappings for rmrr, gfx, and isa and may fall back to static
@@ -2753,7 +2767,15 @@ static void *intel_alloc_coherent(struct device *hwdev, size_t size,
2753 2767
2754 size = PAGE_ALIGN(size); 2768 size = PAGE_ALIGN(size);
2755 order = get_order(size); 2769 order = get_order(size);
2756 flags &= ~(GFP_DMA | GFP_DMA32); 2770
2771 if (!iommu_no_mapping(hwdev))
2772 flags &= ~(GFP_DMA | GFP_DMA32);
2773 else if (hwdev->coherent_dma_mask < dma_get_required_mask(hwdev)) {
2774 if (hwdev->coherent_dma_mask < DMA_BIT_MASK(32))
2775 flags |= GFP_DMA;
2776 else
2777 flags |= GFP_DMA32;
2778 }
2757 2779
2758 vaddr = (void *)__get_free_pages(flags, order); 2780 vaddr = (void *)__get_free_pages(flags, order);
2759 if (!vaddr) 2781 if (!vaddr)
@@ -3193,6 +3215,33 @@ static int __init init_iommu_sysfs(void)
3193} 3215}
3194#endif /* CONFIG_PM */ 3216#endif /* CONFIG_PM */
3195 3217
3218/*
3219 * Here we only respond to action of unbound device from driver.
3220 *
3221 * Added device is not attached to its DMAR domain here yet. That will happen
3222 * when mapping the device to iova.
3223 */
3224static int device_notifier(struct notifier_block *nb,
3225 unsigned long action, void *data)
3226{
3227 struct device *dev = data;
3228 struct pci_dev *pdev = to_pci_dev(dev);
3229 struct dmar_domain *domain;
3230
3231 domain = find_domain(pdev);
3232 if (!domain)
3233 return 0;
3234
3235 if (action == BUS_NOTIFY_UNBOUND_DRIVER && !iommu_pass_through)
3236 domain_remove_one_dev_info(domain, pdev);
3237
3238 return 0;
3239}
3240
3241static struct notifier_block device_nb = {
3242 .notifier_call = device_notifier,
3243};
3244
3196int __init intel_iommu_init(void) 3245int __init intel_iommu_init(void)
3197{ 3246{
3198 int ret = 0; 3247 int ret = 0;
@@ -3245,6 +3294,8 @@ int __init intel_iommu_init(void)
3245 3294
3246 register_iommu(&intel_iommu_ops); 3295 register_iommu(&intel_iommu_ops);
3247 3296
3297 bus_register_notifier(&pci_bus_type, &device_nb);
3298
3248 return 0; 3299 return 0;
3249} 3300}
3250 3301
@@ -3670,3 +3721,61 @@ static void __devinit quirk_iommu_rwbf(struct pci_dev *dev)
3670} 3721}
3671 3722
3672DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf); 3723DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, 0x2a40, quirk_iommu_rwbf);
3724
3725/* On Tylersburg chipsets, some BIOSes have been known to enable the
3726 ISOCH DMAR unit for the Azalia sound device, but not give it any
3727 TLB entries, which causes it to deadlock. Check for that. We do
3728 this in a function called from init_dmars(), instead of in a PCI
3729 quirk, because we don't want to print the obnoxious "BIOS broken"
3730 message if VT-d is actually disabled.
3731*/
3732static void __init check_tylersburg_isoch(void)
3733{
3734 struct pci_dev *pdev;
3735 uint32_t vtisochctrl;
3736
3737 /* If there's no Azalia in the system anyway, forget it. */
3738 pdev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x3a3e, NULL);
3739 if (!pdev)
3740 return;
3741 pci_dev_put(pdev);
3742
3743 /* System Management Registers. Might be hidden, in which case
3744 we can't do the sanity check. But that's OK, because the
3745 known-broken BIOSes _don't_ actually hide it, so far. */
3746 pdev = pci_get_device(PCI_VENDOR_ID_INTEL, 0x342e, NULL);
3747 if (!pdev)
3748 return;
3749
3750 if (pci_read_config_dword(pdev, 0x188, &vtisochctrl)) {
3751 pci_dev_put(pdev);
3752 return;
3753 }
3754
3755 pci_dev_put(pdev);
3756
3757 /* If Azalia DMA is routed to the non-isoch DMAR unit, fine. */
3758 if (vtisochctrl & 1)
3759 return;
3760
3761 /* Drop all bits other than the number of TLB entries */
3762 vtisochctrl &= 0x1c;
3763
3764 /* If we have the recommended number of TLB entries (16), fine. */
3765 if (vtisochctrl == 0x10)
3766 return;
3767
3768 /* Zero TLB entries? You get to ride the short bus to school. */
3769 if (!vtisochctrl) {
3770 WARN(1, "Your BIOS is broken; DMA routed to ISOCH DMAR unit but no TLB space.\n"
3771 "BIOS vendor: %s; Ver: %s; Product Version: %s\n",
3772 dmi_get_system_info(DMI_BIOS_VENDOR),
3773 dmi_get_system_info(DMI_BIOS_VERSION),
3774 dmi_get_system_info(DMI_PRODUCT_VERSION));
3775 iommu_identity_mapping |= IDENTMAP_AZALIA;
3776 return;
3777 }
3778
3779 printk(KERN_WARNING "DMAR: Recommended TLB entries for ISOCH unit is 16; your BIOS set %d\n",
3780 vtisochctrl);
3781}
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 6edecff0b419..4e4c295a049f 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -513,7 +513,11 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
513 else if (state == PCI_D2 || dev->current_state == PCI_D2) 513 else if (state == PCI_D2 || dev->current_state == PCI_D2)
514 udelay(PCI_PM_D2_DELAY); 514 udelay(PCI_PM_D2_DELAY);
515 515
516 dev->current_state = state; 516 pci_read_config_word(dev, dev->pm_cap + PCI_PM_CTRL, &pmcsr);
517 dev->current_state = (pmcsr & PCI_PM_CTRL_STATE_MASK);
518 if (dev->current_state != state && printk_ratelimit())
519 dev_info(&dev->dev, "Refused to change power state, "
520 "currently in D%d\n", dev->current_state);
517 521
518 /* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT 522 /* According to section 5.4.1 of the "PCI BUS POWER MANAGEMENT
519 * INTERFACE SPECIFICATION, REV. 1.2", a device transitioning 523 * INTERFACE SPECIFICATION, REV. 1.2", a device transitioning
@@ -2542,10 +2546,10 @@ int pci_resource_bar(struct pci_dev *dev, int resno, enum pci_bar_type *type)
2542 2546
2543/** 2547/**
2544 * pci_set_vga_state - set VGA decode state on device and parents if requested 2548 * pci_set_vga_state - set VGA decode state on device and parents if requested
2545 * @dev the PCI device 2549 * @dev: the PCI device
2546 * @decode - true = enable decoding, false = disable decoding 2550 * @decode: true = enable decoding, false = disable decoding
2547 * @command_bits PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY 2551 * @command_bits: PCI_COMMAND_IO and/or PCI_COMMAND_MEMORY
2548 * @change_bridge - traverse ancestors and change bridges 2552 * @change_bridge: traverse ancestors and change bridges
2549 */ 2553 */
2550int pci_set_vga_state(struct pci_dev *dev, bool decode, 2554int pci_set_vga_state(struct pci_dev *dev, bool decode,
2551 unsigned int command_bits, bool change_bridge) 2555 unsigned int command_bits, bool change_bridge)
@@ -2719,17 +2723,6 @@ int __attribute__ ((weak)) pci_ext_cfg_avail(struct pci_dev *dev)
2719 return 1; 2723 return 1;
2720} 2724}
2721 2725
2722static int __devinit pci_init(void)
2723{
2724 struct pci_dev *dev = NULL;
2725
2726 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
2727 pci_fixup_device(pci_fixup_final, dev);
2728 }
2729
2730 return 0;
2731}
2732
2733static int __init pci_setup(char *str) 2726static int __init pci_setup(char *str)
2734{ 2727{
2735 while (str) { 2728 while (str) {
@@ -2767,8 +2760,6 @@ static int __init pci_setup(char *str)
2767} 2760}
2768early_param("pci", pci_setup); 2761early_param("pci", pci_setup);
2769 2762
2770device_initcall(pci_init);
2771
2772EXPORT_SYMBOL(pci_reenable_device); 2763EXPORT_SYMBOL(pci_reenable_device);
2773EXPORT_SYMBOL(pci_enable_device_io); 2764EXPORT_SYMBOL(pci_enable_device_io);
2774EXPORT_SYMBOL(pci_enable_device_mem); 2765EXPORT_SYMBOL(pci_enable_device_mem);
diff --git a/drivers/pci/pcie/aer/aerdrv.c b/drivers/pci/pcie/aer/aerdrv.c
index d49ecc94bd49..40c3cc5d1caf 100644
--- a/drivers/pci/pcie/aer/aerdrv.c
+++ b/drivers/pci/pcie/aer/aerdrv.c
@@ -53,7 +53,7 @@ static struct pci_error_handlers aer_error_handlers = {
53 53
54static struct pcie_port_service_driver aerdriver = { 54static struct pcie_port_service_driver aerdriver = {
55 .name = "aer", 55 .name = "aer",
56 .port_type = PCIE_ANY_PORT, 56 .port_type = PCIE_RC_PORT,
57 .service = PCIE_PORT_SERVICE_AER, 57 .service = PCIE_PORT_SERVICE_AER,
58 58
59 .probe = aer_probe, 59 .probe = aer_probe,
diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c
index 745402e8e498..5b7056cec00c 100644
--- a/drivers/pci/pcie/aspm.c
+++ b/drivers/pci/pcie/aspm.c
@@ -656,8 +656,10 @@ void pcie_aspm_exit_link_state(struct pci_dev *pdev)
656 free_link_state(link); 656 free_link_state(link);
657 657
658 /* Recheck latencies and configure upstream links */ 658 /* Recheck latencies and configure upstream links */
659 pcie_update_aspm_capable(root); 659 if (parent_link) {
660 pcie_config_aspm_path(parent_link); 660 pcie_update_aspm_capable(root);
661 pcie_config_aspm_path(parent_link);
662 }
661out: 663out:
662 mutex_unlock(&aspm_lock); 664 mutex_unlock(&aspm_lock);
663 up_read(&pci_bus_sem); 665 up_read(&pci_bus_sem);
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 6df5c984a791..f635e476d632 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -30,7 +30,6 @@ MODULE_DESCRIPTION(DRIVER_DESC);
30MODULE_LICENSE("GPL"); 30MODULE_LICENSE("GPL");
31 31
32/* global data */ 32/* global data */
33static const char device_name[] = "pcieport-driver";
34 33
35static int pcie_portdrv_restore_config(struct pci_dev *dev) 34static int pcie_portdrv_restore_config(struct pci_dev *dev)
36{ 35{
@@ -262,7 +261,7 @@ static struct pci_error_handlers pcie_portdrv_err_handler = {
262}; 261};
263 262
264static struct pci_driver pcie_portdriver = { 263static struct pci_driver pcie_portdriver = {
265 .name = (char *)device_name, 264 .name = "pcieport",
266 .id_table = &port_pci_ids[0], 265 .id_table = &port_pci_ids[0],
267 266
268 .probe = pcie_portdrv_probe, 267 .probe = pcie_portdrv_probe,
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 6099facecd79..245d2cdb4765 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -670,6 +670,25 @@ static void __devinit quirk_vt8235_acpi(struct pci_dev *dev)
670} 670}
671DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi); 671DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8235, quirk_vt8235_acpi);
672 672
673/*
674 * TI XIO2000a PCIe-PCI Bridge erroneously reports it supports fast back-to-back:
675 * Disable fast back-to-back on the secondary bus segment
676 */
677static void __devinit quirk_xio2000a(struct pci_dev *dev)
678{
679 struct pci_dev *pdev;
680 u16 command;
681
682 dev_warn(&dev->dev, "TI XIO2000a quirk detected; "
683 "secondary bus fast back-to-back transfers disabled\n");
684 list_for_each_entry(pdev, &dev->subordinate->devices, bus_list) {
685 pci_read_config_word(pdev, PCI_COMMAND, &command);
686 if (command & PCI_COMMAND_FAST_BACK)
687 pci_write_config_word(pdev, PCI_COMMAND, command & ~PCI_COMMAND_FAST_BACK);
688 }
689}
690DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_XIO2000A,
691 quirk_xio2000a);
673 692
674#ifdef CONFIG_X86_IO_APIC 693#ifdef CONFIG_X86_IO_APIC
675 694
@@ -990,7 +1009,7 @@ DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82454NX,
990 1009
991static void __devinit quirk_amd_ide_mode(struct pci_dev *pdev) 1010static void __devinit quirk_amd_ide_mode(struct pci_dev *pdev)
992{ 1011{
993 /* set SBX00 SATA in IDE mode to AHCI mode */ 1012 /* set SBX00/Hudson-2 SATA in IDE mode to AHCI mode */
994 u8 tmp; 1013 u8 tmp;
995 1014
996 pci_read_config_byte(pdev, PCI_CLASS_DEVICE, &tmp); 1015 pci_read_config_byte(pdev, PCI_CLASS_DEVICE, &tmp);
@@ -1009,8 +1028,8 @@ DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, quirk
1009DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, quirk_amd_ide_mode); 1028DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP600_SATA, quirk_amd_ide_mode);
1010DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode); 1029DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode);
1011DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode); 1030DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_IXP700_SATA, quirk_amd_ide_mode);
1012DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SATA_IDE, quirk_amd_ide_mode); 1031DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode);
1013DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_SB900_SATA_IDE, quirk_amd_ide_mode); 1032DECLARE_PCI_FIXUP_RESUME_EARLY(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SATA_IDE, quirk_amd_ide_mode);
1014 1033
1015/* 1034/*
1016 * Serverworks CSB5 IDE does not fully support native mode 1035 * Serverworks CSB5 IDE does not fully support native mode
@@ -2572,6 +2591,19 @@ void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev)
2572 } 2591 }
2573 pci_do_fixups(dev, start, end); 2592 pci_do_fixups(dev, start, end);
2574} 2593}
2594
2595static int __init pci_apply_final_quirks(void)
2596{
2597 struct pci_dev *dev = NULL;
2598
2599 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
2600 pci_fixup_device(pci_fixup_final, dev);
2601 }
2602
2603 return 0;
2604}
2605
2606fs_initcall_sync(pci_apply_final_quirks);
2575#else 2607#else
2576void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev) {} 2608void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev) {}
2577#endif 2609#endif
diff --git a/drivers/pci/setup-res.c b/drivers/pci/setup-res.c
index 706f82d8111f..c54526b206b5 100644
--- a/drivers/pci/setup-res.c
+++ b/drivers/pci/setup-res.c
@@ -205,43 +205,6 @@ int pci_assign_resource(struct pci_dev *dev, int resno)
205 return ret; 205 return ret;
206} 206}
207 207
208#if 0
209int pci_assign_resource_fixed(struct pci_dev *dev, int resno)
210{
211 struct pci_bus *bus = dev->bus;
212 struct resource *res = dev->resource + resno;
213 unsigned int type_mask;
214 int i, ret = -EBUSY;
215
216 type_mask = IORESOURCE_IO | IORESOURCE_MEM | IORESOURCE_PREFETCH;
217
218 for (i = 0; i < PCI_BUS_NUM_RESOURCES; i++) {
219 struct resource *r = bus->resource[i];
220 if (!r)
221 continue;
222
223 /* type_mask must match */
224 if ((res->flags ^ r->flags) & type_mask)
225 continue;
226
227 ret = request_resource(r, res);
228
229 if (ret == 0)
230 break;
231 }
232
233 if (ret) {
234 dev_err(&dev->dev, "BAR %d: can't allocate %s resource %pR\n",
235 resno, res->flags & IORESOURCE_IO ? "I/O" : "mem", res);
236 } else if (resno < PCI_BRIDGE_RESOURCES) {
237 pci_update_resource(dev, resno);
238 }
239
240 return ret;
241}
242EXPORT_SYMBOL_GPL(pci_assign_resource_fixed);
243#endif
244
245/* Sort resources by alignment */ 208/* Sort resources by alignment */
246void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head) 209void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
247{ 210{
diff --git a/drivers/pcmcia/cistpl.c b/drivers/pcmcia/cistpl.c
index 4a110b7b2673..6c4a4fc83630 100644
--- a/drivers/pcmcia/cistpl.c
+++ b/drivers/pcmcia/cistpl.c
@@ -1463,7 +1463,9 @@ int pccard_read_tuple(struct pcmcia_socket *s, unsigned int function, cisdata_t
1463 return -ENOMEM; 1463 return -ENOMEM;
1464 } 1464 }
1465 tuple.DesiredTuple = code; 1465 tuple.DesiredTuple = code;
1466 tuple.Attributes = TUPLE_RETURN_COMMON; 1466 tuple.Attributes = 0;
1467 if (function == BIND_FN_ALL)
1468 tuple.Attributes = TUPLE_RETURN_COMMON;
1467 ret = pccard_get_first_tuple(s, function, &tuple); 1469 ret = pccard_get_first_tuple(s, function, &tuple);
1468 if (ret != 0) 1470 if (ret != 0)
1469 goto done; 1471 goto done;
@@ -1490,7 +1492,7 @@ EXPORT_SYMBOL(pccard_read_tuple);
1490 1492
1491======================================================================*/ 1493======================================================================*/
1492 1494
1493int pccard_validate_cis(struct pcmcia_socket *s, unsigned int function, unsigned int *info) 1495int pccard_validate_cis(struct pcmcia_socket *s, unsigned int *info)
1494{ 1496{
1495 tuple_t *tuple; 1497 tuple_t *tuple;
1496 cisparse_t *p; 1498 cisparse_t *p;
@@ -1515,30 +1517,30 @@ int pccard_validate_cis(struct pcmcia_socket *s, unsigned int function, unsigned
1515 count = reserved = 0; 1517 count = reserved = 0;
1516 tuple->DesiredTuple = RETURN_FIRST_TUPLE; 1518 tuple->DesiredTuple = RETURN_FIRST_TUPLE;
1517 tuple->Attributes = TUPLE_RETURN_COMMON; 1519 tuple->Attributes = TUPLE_RETURN_COMMON;
1518 ret = pccard_get_first_tuple(s, function, tuple); 1520 ret = pccard_get_first_tuple(s, BIND_FN_ALL, tuple);
1519 if (ret != 0) 1521 if (ret != 0)
1520 goto done; 1522 goto done;
1521 1523
1522 /* First tuple should be DEVICE; we should really have either that 1524 /* First tuple should be DEVICE; we should really have either that
1523 or a CFTABLE_ENTRY of some sort */ 1525 or a CFTABLE_ENTRY of some sort */
1524 if ((tuple->TupleCode == CISTPL_DEVICE) || 1526 if ((tuple->TupleCode == CISTPL_DEVICE) ||
1525 (pccard_read_tuple(s, function, CISTPL_CFTABLE_ENTRY, p) == 0) || 1527 (pccard_read_tuple(s, BIND_FN_ALL, CISTPL_CFTABLE_ENTRY, p) == 0) ||
1526 (pccard_read_tuple(s, function, CISTPL_CFTABLE_ENTRY_CB, p) == 0)) 1528 (pccard_read_tuple(s, BIND_FN_ALL, CISTPL_CFTABLE_ENTRY_CB, p) == 0))
1527 dev_ok++; 1529 dev_ok++;
1528 1530
1529 /* All cards should have a MANFID tuple, and/or a VERS_1 or VERS_2 1531 /* All cards should have a MANFID tuple, and/or a VERS_1 or VERS_2
1530 tuple, for card identification. Certain old D-Link and Linksys 1532 tuple, for card identification. Certain old D-Link and Linksys
1531 cards have only a broken VERS_2 tuple; hence the bogus test. */ 1533 cards have only a broken VERS_2 tuple; hence the bogus test. */
1532 if ((pccard_read_tuple(s, function, CISTPL_MANFID, p) == 0) || 1534 if ((pccard_read_tuple(s, BIND_FN_ALL, CISTPL_MANFID, p) == 0) ||
1533 (pccard_read_tuple(s, function, CISTPL_VERS_1, p) == 0) || 1535 (pccard_read_tuple(s, BIND_FN_ALL, CISTPL_VERS_1, p) == 0) ||
1534 (pccard_read_tuple(s, function, CISTPL_VERS_2, p) != -ENOSPC)) 1536 (pccard_read_tuple(s, BIND_FN_ALL, CISTPL_VERS_2, p) != -ENOSPC))
1535 ident_ok++; 1537 ident_ok++;
1536 1538
1537 if (!dev_ok && !ident_ok) 1539 if (!dev_ok && !ident_ok)
1538 goto done; 1540 goto done;
1539 1541
1540 for (count = 1; count < MAX_TUPLES; count++) { 1542 for (count = 1; count < MAX_TUPLES; count++) {
1541 ret = pccard_get_next_tuple(s, function, tuple); 1543 ret = pccard_get_next_tuple(s, BIND_FN_ALL, tuple);
1542 if (ret != 0) 1544 if (ret != 0)
1543 break; 1545 break;
1544 if (((tuple->TupleCode > 0x23) && (tuple->TupleCode < 0x40)) || 1546 if (((tuple->TupleCode > 0x23) && (tuple->TupleCode < 0x40)) ||
diff --git a/drivers/pcmcia/cs.c b/drivers/pcmcia/cs.c
index 934d4bee39a0..698d75cda084 100644
--- a/drivers/pcmcia/cs.c
+++ b/drivers/pcmcia/cs.c
@@ -98,10 +98,13 @@ EXPORT_SYMBOL(pcmcia_socket_list_rwsem);
98 * These functions check for the appropriate struct pcmcia_soket arrays, 98 * These functions check for the appropriate struct pcmcia_soket arrays,
99 * and pass them to the low-level functions pcmcia_{suspend,resume}_socket 99 * and pass them to the low-level functions pcmcia_{suspend,resume}_socket
100 */ 100 */
101static int socket_early_resume(struct pcmcia_socket *skt);
102static int socket_late_resume(struct pcmcia_socket *skt);
101static int socket_resume(struct pcmcia_socket *skt); 103static int socket_resume(struct pcmcia_socket *skt);
102static int socket_suspend(struct pcmcia_socket *skt); 104static int socket_suspend(struct pcmcia_socket *skt);
103 105
104int pcmcia_socket_dev_suspend(struct device *dev) 106static void pcmcia_socket_dev_run(struct device *dev,
107 int (*cb)(struct pcmcia_socket *))
105{ 108{
106 struct pcmcia_socket *socket; 109 struct pcmcia_socket *socket;
107 110
@@ -110,29 +113,34 @@ int pcmcia_socket_dev_suspend(struct device *dev)
110 if (socket->dev.parent != dev) 113 if (socket->dev.parent != dev)
111 continue; 114 continue;
112 mutex_lock(&socket->skt_mutex); 115 mutex_lock(&socket->skt_mutex);
113 socket_suspend(socket); 116 cb(socket);
114 mutex_unlock(&socket->skt_mutex); 117 mutex_unlock(&socket->skt_mutex);
115 } 118 }
116 up_read(&pcmcia_socket_list_rwsem); 119 up_read(&pcmcia_socket_list_rwsem);
120}
117 121
122int pcmcia_socket_dev_suspend(struct device *dev)
123{
124 pcmcia_socket_dev_run(dev, socket_suspend);
118 return 0; 125 return 0;
119} 126}
120EXPORT_SYMBOL(pcmcia_socket_dev_suspend); 127EXPORT_SYMBOL(pcmcia_socket_dev_suspend);
121 128
122int pcmcia_socket_dev_resume(struct device *dev) 129void pcmcia_socket_dev_early_resume(struct device *dev)
123{ 130{
124 struct pcmcia_socket *socket; 131 pcmcia_socket_dev_run(dev, socket_early_resume);
132}
133EXPORT_SYMBOL(pcmcia_socket_dev_early_resume);
125 134
126 down_read(&pcmcia_socket_list_rwsem); 135void pcmcia_socket_dev_late_resume(struct device *dev)
127 list_for_each_entry(socket, &pcmcia_socket_list, socket_list) { 136{
128 if (socket->dev.parent != dev) 137 pcmcia_socket_dev_run(dev, socket_late_resume);
129 continue; 138}
130 mutex_lock(&socket->skt_mutex); 139EXPORT_SYMBOL(pcmcia_socket_dev_late_resume);
131 socket_resume(socket);
132 mutex_unlock(&socket->skt_mutex);
133 }
134 up_read(&pcmcia_socket_list_rwsem);
135 140
141int pcmcia_socket_dev_resume(struct device *dev)
142{
143 pcmcia_socket_dev_run(dev, socket_resume);
136 return 0; 144 return 0;
137} 145}
138EXPORT_SYMBOL(pcmcia_socket_dev_resume); 146EXPORT_SYMBOL(pcmcia_socket_dev_resume);
@@ -546,29 +554,24 @@ static int socket_suspend(struct pcmcia_socket *skt)
546 return 0; 554 return 0;
547} 555}
548 556
549/* 557static int socket_early_resume(struct pcmcia_socket *skt)
550 * Resume a socket. If a card is present, verify its CIS against
551 * our cached copy. If they are different, the card has been
552 * replaced, and we need to tell the drivers.
553 */
554static int socket_resume(struct pcmcia_socket *skt)
555{ 558{
556 int ret;
557
558 if (!(skt->state & SOCKET_SUSPEND))
559 return -EBUSY;
560
561 skt->socket = dead_socket; 559 skt->socket = dead_socket;
562 skt->ops->init(skt); 560 skt->ops->init(skt);
563 skt->ops->set_socket(skt, &skt->socket); 561 skt->ops->set_socket(skt, &skt->socket);
562 if (skt->state & SOCKET_PRESENT)
563 skt->resume_status = socket_setup(skt, resume_delay);
564 return 0;
565}
564 566
567static int socket_late_resume(struct pcmcia_socket *skt)
568{
565 if (!(skt->state & SOCKET_PRESENT)) { 569 if (!(skt->state & SOCKET_PRESENT)) {
566 skt->state &= ~SOCKET_SUSPEND; 570 skt->state &= ~SOCKET_SUSPEND;
567 return socket_insert(skt); 571 return socket_insert(skt);
568 } 572 }
569 573
570 ret = socket_setup(skt, resume_delay); 574 if (skt->resume_status == 0) {
571 if (ret == 0) {
572 /* 575 /*
573 * FIXME: need a better check here for cardbus cards. 576 * FIXME: need a better check here for cardbus cards.
574 */ 577 */
@@ -596,6 +599,20 @@ static int socket_resume(struct pcmcia_socket *skt)
596 return 0; 599 return 0;
597} 600}
598 601
602/*
603 * Resume a socket. If a card is present, verify its CIS against
604 * our cached copy. If they are different, the card has been
605 * replaced, and we need to tell the drivers.
606 */
607static int socket_resume(struct pcmcia_socket *skt)
608{
609 if (!(skt->state & SOCKET_SUSPEND))
610 return -EBUSY;
611
612 socket_early_resume(skt);
613 return socket_late_resume(skt);
614}
615
599static void socket_remove(struct pcmcia_socket *skt) 616static void socket_remove(struct pcmcia_socket *skt)
600{ 617{
601 dev_printk(KERN_NOTICE, &skt->dev, 618 dev_printk(KERN_NOTICE, &skt->dev,
diff --git a/drivers/pcmcia/cs_internal.h b/drivers/pcmcia/cs_internal.h
index 79615e6d540b..1f4098f1354d 100644
--- a/drivers/pcmcia/cs_internal.h
+++ b/drivers/pcmcia/cs_internal.h
@@ -197,8 +197,7 @@ int pccard_read_tuple(struct pcmcia_socket *s, unsigned int function,
197 cisdata_t code, void *parse); 197 cisdata_t code, void *parse);
198int pcmcia_replace_cis(struct pcmcia_socket *s, 198int pcmcia_replace_cis(struct pcmcia_socket *s,
199 const u8 *data, const size_t len); 199 const u8 *data, const size_t len);
200int pccard_validate_cis(struct pcmcia_socket *s, unsigned int function, 200int pccard_validate_cis(struct pcmcia_socket *s, unsigned int *count);
201 unsigned int *count);
202 201
203/* rsrc_mgr.c */ 202/* rsrc_mgr.c */
204int pcmcia_validate_mem(struct pcmcia_socket *s); 203int pcmcia_validate_mem(struct pcmcia_socket *s);
diff --git a/drivers/pcmcia/ds.c b/drivers/pcmcia/ds.c
index 9f300d3cb125..f5b7079f13d3 100644
--- a/drivers/pcmcia/ds.c
+++ b/drivers/pcmcia/ds.c
@@ -547,7 +547,7 @@ static int pcmcia_device_query(struct pcmcia_device *p_dev)
547 if (!vers1) 547 if (!vers1)
548 return -ENOMEM; 548 return -ENOMEM;
549 549
550 if (!pccard_read_tuple(p_dev->socket, p_dev->func, 550 if (!pccard_read_tuple(p_dev->socket, BIND_FN_ALL,
551 CISTPL_MANFID, &manf_id)) { 551 CISTPL_MANFID, &manf_id)) {
552 p_dev->manf_id = manf_id.manf; 552 p_dev->manf_id = manf_id.manf;
553 p_dev->card_id = manf_id.card; 553 p_dev->card_id = manf_id.card;
@@ -581,9 +581,9 @@ static int pcmcia_device_query(struct pcmcia_device *p_dev)
581 kfree(devgeo); 581 kfree(devgeo);
582 } 582 }
583 583
584 if (!pccard_read_tuple(p_dev->socket, p_dev->func, CISTPL_VERS_1, 584 if (!pccard_read_tuple(p_dev->socket, BIND_FN_ALL, CISTPL_VERS_1,
585 vers1)) { 585 vers1)) {
586 for (i=0; i < vers1->ns; i++) { 586 for (i = 0; i < min_t(unsigned int, 4, vers1->ns); i++) {
587 char *tmp; 587 char *tmp;
588 unsigned int length; 588 unsigned int length;
589 589
@@ -733,7 +733,7 @@ static int pcmcia_card_add(struct pcmcia_socket *s)
733 return -EAGAIN; /* try again, but later... */ 733 return -EAGAIN; /* try again, but later... */
734 } 734 }
735 735
736 ret = pccard_validate_cis(s, BIND_FN_ALL, &no_chains); 736 ret = pccard_validate_cis(s, &no_chains);
737 if (ret || !no_chains) { 737 if (ret || !no_chains) {
738 ds_dev_dbg(0, &s->dev, "invalid CIS or invalid resources\n"); 738 ds_dev_dbg(0, &s->dev, "invalid CIS or invalid resources\n");
739 return -ENODEV; 739 return -ENODEV;
diff --git a/drivers/pcmcia/i82365.c b/drivers/pcmcia/i82365.c
index b906abe26ad0..a4aacb830b80 100644
--- a/drivers/pcmcia/i82365.c
+++ b/drivers/pcmcia/i82365.c
@@ -1053,8 +1053,8 @@ static int i365_set_io_map(u_short sock, struct pccard_io_map *io)
1053 u_char map, ioctl; 1053 u_char map, ioctl;
1054 1054
1055 debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, " 1055 debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, "
1056 "%#x-%#x)\n", sock, io->map, io->flags, 1056 "%#llx-%#llx)\n", sock, io->map, io->flags, io->speed,
1057 io->speed, io->start, io->stop); 1057 (unsigned long long)io->start, (unsigned long long)io->stop);
1058 map = io->map; 1058 map = io->map;
1059 if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || 1059 if ((map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) ||
1060 (io->stop < io->start)) return -EINVAL; 1060 (io->stop < io->start)) return -EINVAL;
diff --git a/drivers/pcmcia/m32r_cfc.c b/drivers/pcmcia/m32r_cfc.c
index d1d89c4491ad..7dfbee1dcd76 100644
--- a/drivers/pcmcia/m32r_cfc.c
+++ b/drivers/pcmcia/m32r_cfc.c
@@ -537,8 +537,9 @@ static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
537 u_char map; 537 u_char map;
538 538
539 debug(3, "m32r_cfc: SetIOMap(%d, %d, %#2.2x, %d ns, " 539 debug(3, "m32r_cfc: SetIOMap(%d, %d, %#2.2x, %d ns, "
540 "%#lx-%#lx)\n", sock, io->map, io->flags, 540 "%#llx-%#llx)\n", sock, io->map, io->flags,
541 io->speed, io->start, io->stop); 541 io->speed, (unsigned long long)io->start,
542 (unsigned long long)io->stop);
542 map = io->map; 543 map = io->map;
543 544
544 return 0; 545 return 0;
@@ -554,8 +555,9 @@ static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
554 pcc_socket_t *t = &socket[sock]; 555 pcc_socket_t *t = &socket[sock];
555 556
556 debug(3, "m32r_cfc: SetMemMap(%d, %d, %#2.2x, %d ns, " 557 debug(3, "m32r_cfc: SetMemMap(%d, %d, %#2.2x, %d ns, "
557 "%#lx, %#x)\n", sock, map, mem->flags, 558 "%#llx, %#x)\n", sock, map, mem->flags,
558 mem->speed, mem->static_start, mem->card_start); 559 mem->speed, (unsigned long long)mem->static_start,
560 mem->card_start);
559 561
560 /* 562 /*
561 * sanity check 563 * sanity check
diff --git a/drivers/pcmcia/m32r_pcc.c b/drivers/pcmcia/m32r_pcc.c
index a0655839c8d3..c6524f99ccc3 100644
--- a/drivers/pcmcia/m32r_pcc.c
+++ b/drivers/pcmcia/m32r_pcc.c
@@ -492,8 +492,9 @@ static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
492 u_char map; 492 u_char map;
493 493
494 debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, " 494 debug(3, "m32r-pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
495 "%#x-%#x)\n", sock, io->map, io->flags, 495 "%#llx-%#llx)\n", sock, io->map, io->flags,
496 io->speed, io->start, io->stop); 496 io->speed, (unsigned long long)io->start,
497 (unsigned long long)io->stop);
497 map = io->map; 498 map = io->map;
498 499
499 return 0; 500 return 0;
@@ -515,8 +516,9 @@ static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
515#endif 516#endif
516 517
517 debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, " 518 debug(3, "m32r-pcc: SetMemMap(%d, %d, %#2.2x, %d ns, "
518 "%#lx, %#x)\n", sock, map, mem->flags, 519 "%#llx, %#x)\n", sock, map, mem->flags,
519 mem->speed, mem->static_start, mem->card_start); 520 mem->speed, (unsigned long long)mem->static_start,
521 mem->card_start);
520 522
521 /* 523 /*
522 * sanity check 524 * sanity check
diff --git a/drivers/pcmcia/m8xx_pcmcia.c b/drivers/pcmcia/m8xx_pcmcia.c
index c69f2c4fe520..403559ba49dd 100644
--- a/drivers/pcmcia/m8xx_pcmcia.c
+++ b/drivers/pcmcia/m8xx_pcmcia.c
@@ -975,8 +975,9 @@ static int m8xx_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
975#define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start) 975#define M8XX_BASE (PCMCIA_IO_WIN_BASE + io->start)
976 976
977 dprintk("SetIOMap(%d, %d, %#2.2x, %d ns, " 977 dprintk("SetIOMap(%d, %d, %#2.2x, %d ns, "
978 "%#4.4x-%#4.4x)\n", lsock, io->map, io->flags, 978 "%#4.4llx-%#4.4llx)\n", lsock, io->map, io->flags,
979 io->speed, io->start, io->stop); 979 io->speed, (unsigned long long)io->start,
980 (unsigned long long)io->stop);
980 981
981 if ((io->map >= PCMCIA_IO_WIN_NO) || (io->start > 0xffff) 982 if ((io->map >= PCMCIA_IO_WIN_NO) || (io->start > 0xffff)
982 || (io->stop > 0xffff) || (io->stop < io->start)) 983 || (io->stop > 0xffff) || (io->stop < io->start))
@@ -1055,8 +1056,9 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock,
1055 pcmconf8xx_t *pcmcia = s->pcmcia; 1056 pcmconf8xx_t *pcmcia = s->pcmcia;
1056 1057
1057 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, " 1058 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, "
1058 "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags, 1059 "%#5.5llx, %#5.5x)\n", lsock, mem->map, mem->flags,
1059 mem->speed, mem->static_start, mem->card_start); 1060 mem->speed, (unsigned long long)mem->static_start,
1061 mem->card_start);
1060 1062
1061 if ((mem->map >= PCMCIA_MEM_WIN_NO) 1063 if ((mem->map >= PCMCIA_MEM_WIN_NO)
1062// || ((mem->s) >= PCMCIA_MEM_WIN_SIZE) 1064// || ((mem->s) >= PCMCIA_MEM_WIN_SIZE)
@@ -1107,8 +1109,9 @@ static int m8xx_set_mem_map(struct pcmcia_socket *sock,
1107 } 1109 }
1108 1110
1109 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, " 1111 dprintk("SetMemMap(%d, %d, %#2.2x, %d ns, "
1110 "%#5.5lx, %#5.5x)\n", lsock, mem->map, mem->flags, 1112 "%#5.5llx, %#5.5x)\n", lsock, mem->map, mem->flags,
1111 mem->speed, mem->static_start, mem->card_start); 1113 mem->speed, (unsigned long long)mem->static_start,
1114 mem->card_start);
1112 1115
1113 /* copy the struct and modify the copy */ 1116 /* copy the struct and modify the copy */
1114 1117
diff --git a/drivers/pcmcia/pcmcia_ioctl.c b/drivers/pcmcia/pcmcia_ioctl.c
index 32c44040c1e8..30cf71d2ee23 100644
--- a/drivers/pcmcia/pcmcia_ioctl.c
+++ b/drivers/pcmcia/pcmcia_ioctl.c
@@ -881,7 +881,7 @@ static int ds_ioctl(struct inode * inode, struct file * file,
881 mutex_lock(&s->skt_mutex); 881 mutex_lock(&s->skt_mutex);
882 pcmcia_validate_mem(s); 882 pcmcia_validate_mem(s);
883 mutex_unlock(&s->skt_mutex); 883 mutex_unlock(&s->skt_mutex);
884 ret = pccard_validate_cis(s, BIND_FN_ALL, &buf->cisinfo.Chains); 884 ret = pccard_validate_cis(s, &buf->cisinfo.Chains);
885 break; 885 break;
886 case DS_SUSPEND_CARD: 886 case DS_SUSPEND_CARD:
887 ret = pcmcia_suspend_card(s); 887 ret = pcmcia_suspend_card(s);
diff --git a/drivers/pcmcia/pd6729.c b/drivers/pcmcia/pd6729.c
index 1c39d3438f20..70a33468bcd0 100644
--- a/drivers/pcmcia/pd6729.c
+++ b/drivers/pcmcia/pd6729.c
@@ -641,6 +641,12 @@ static int __devinit pd6729_pci_probe(struct pci_dev *dev,
641 if ((ret = pci_enable_device(dev))) 641 if ((ret = pci_enable_device(dev)))
642 goto err_out_free_mem; 642 goto err_out_free_mem;
643 643
644 if (!pci_resource_start(dev, 0)) {
645 printk(KERN_INFO "pd6729: refusing to load the driver "
646 "as the io_base is 0.\n");
647 goto err_out_free_mem;
648 }
649
644 printk(KERN_INFO "pd6729: Cirrus PD6729 PCI to PCMCIA Bridge " 650 printk(KERN_INFO "pd6729: Cirrus PD6729 PCI to PCMCIA Bridge "
645 "at 0x%llx on irq %d\n", 651 "at 0x%llx on irq %d\n",
646 (unsigned long long)pci_resource_start(dev, 0), dev->irq); 652 (unsigned long long)pci_resource_start(dev, 0), dev->irq);
diff --git a/drivers/pcmcia/rsrc_nonstatic.c b/drivers/pcmcia/rsrc_nonstatic.c
index 9ca22c7aafb2..7039f3cf5b77 100644
--- a/drivers/pcmcia/rsrc_nonstatic.c
+++ b/drivers/pcmcia/rsrc_nonstatic.c
@@ -206,6 +206,7 @@ static void do_io_probe(struct pcmcia_socket *s, unsigned int base,
206 /* First, what does a floating port look like? */ 206 /* First, what does a floating port look like? */
207 b = kzalloc(256, GFP_KERNEL); 207 b = kzalloc(256, GFP_KERNEL);
208 if (!b) { 208 if (!b) {
209 printk("\n");
209 dev_printk(KERN_ERR, &s->dev, 210 dev_printk(KERN_ERR, &s->dev,
210 "do_io_probe: unable to kmalloc 256 bytes"); 211 "do_io_probe: unable to kmalloc 256 bytes");
211 return; 212 return;
@@ -275,7 +276,7 @@ static int readable(struct pcmcia_socket *s, struct resource *res,
275 s->cis_mem.res = res; 276 s->cis_mem.res = res;
276 s->cis_virt = ioremap(res->start, s->map_size); 277 s->cis_virt = ioremap(res->start, s->map_size);
277 if (s->cis_virt) { 278 if (s->cis_virt) {
278 ret = pccard_validate_cis(s, BIND_FN_ALL, count); 279 ret = pccard_validate_cis(s, count);
279 /* invalidate mapping and CIS cache */ 280 /* invalidate mapping and CIS cache */
280 iounmap(s->cis_virt); 281 iounmap(s->cis_virt);
281 s->cis_virt = NULL; 282 s->cis_virt = NULL;
diff --git a/drivers/pcmcia/soc_common.c b/drivers/pcmcia/soc_common.c
index 163cf98e2386..ef7e9e58782b 100644
--- a/drivers/pcmcia/soc_common.c
+++ b/drivers/pcmcia/soc_common.c
@@ -336,8 +336,9 @@ soc_common_pcmcia_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *m
336 struct soc_pcmcia_socket *skt = to_soc_pcmcia_socket(sock); 336 struct soc_pcmcia_socket *skt = to_soc_pcmcia_socket(sock);
337 unsigned short speed = map->speed; 337 unsigned short speed = map->speed;
338 338
339 debug(skt, 2, "map %u speed %u start 0x%08x stop 0x%08x\n", 339 debug(skt, 2, "map %u speed %u start 0x%08llx stop 0x%08llx\n",
340 map->map, map->speed, map->start, map->stop); 340 map->map, map->speed, (unsigned long long)map->start,
341 (unsigned long long)map->stop);
341 debug(skt, 2, "flags: %s%s%s%s%s%s%s%s\n", 342 debug(skt, 2, "flags: %s%s%s%s%s%s%s%s\n",
342 (map->flags==0)?"<NONE>":"", 343 (map->flags==0)?"<NONE>":"",
343 (map->flags&MAP_ACTIVE)?"ACTIVE ":"", 344 (map->flags&MAP_ACTIVE)?"ACTIVE ":"",
diff --git a/drivers/pcmcia/socket_sysfs.c b/drivers/pcmcia/socket_sysfs.c
index ff9a3bb3c88d..78d5aab542f7 100644
--- a/drivers/pcmcia/socket_sysfs.c
+++ b/drivers/pcmcia/socket_sysfs.c
@@ -300,7 +300,7 @@ static ssize_t pccard_show_cis(struct kobject *kobj,
300 300
301 if (!(s->state & SOCKET_PRESENT)) 301 if (!(s->state & SOCKET_PRESENT))
302 return -ENODEV; 302 return -ENODEV;
303 if (pccard_validate_cis(s, BIND_FN_ALL, &chains)) 303 if (pccard_validate_cis(s, &chains))
304 return -EIO; 304 return -EIO;
305 if (!chains) 305 if (!chains)
306 return -ENODATA; 306 return -ENODATA;
diff --git a/drivers/pcmcia/tcic.c b/drivers/pcmcia/tcic.c
index 582413fcb62f..6918849d511e 100644
--- a/drivers/pcmcia/tcic.c
+++ b/drivers/pcmcia/tcic.c
@@ -732,8 +732,8 @@ static int tcic_set_io_map(struct pcmcia_socket *sock, struct pccard_io_map *io)
732 u_short base, len, ioctl; 732 u_short base, len, ioctl;
733 733
734 debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, " 734 debug(1, "SetIOMap(%d, %d, %#2.2x, %d ns, "
735 "%#x-%#x)\n", psock, io->map, io->flags, 735 "%#llx-%#llx)\n", psock, io->map, io->flags, io->speed,
736 io->speed, io->start, io->stop); 736 (unsigned long long)io->start, (unsigned long long)io->stop);
737 if ((io->map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) || 737 if ((io->map > 1) || (io->start > 0xffff) || (io->stop > 0xffff) ||
738 (io->stop < io->start)) return -EINVAL; 738 (io->stop < io->start)) return -EINVAL;
739 tcic_setw(TCIC_ADDR+2, TCIC_ADR2_INDREG | (psock << TCIC_SS_SHFT)); 739 tcic_setw(TCIC_ADDR+2, TCIC_ADR2_INDREG | (psock << TCIC_SS_SHFT));
diff --git a/drivers/pcmcia/yenta_socket.c b/drivers/pcmcia/yenta_socket.c
index abe0e44c6e9e..8be4cc447a17 100644
--- a/drivers/pcmcia/yenta_socket.c
+++ b/drivers/pcmcia/yenta_socket.c
@@ -1275,16 +1275,26 @@ static int yenta_dev_resume_noirq(struct device *dev)
1275 if (socket->type && socket->type->restore_state) 1275 if (socket->type && socket->type->restore_state)
1276 socket->type->restore_state(socket); 1276 socket->type->restore_state(socket);
1277 1277
1278 return pcmcia_socket_dev_resume(dev); 1278 pcmcia_socket_dev_early_resume(dev);
1279 return 0;
1280}
1281
1282static int yenta_dev_resume(struct device *dev)
1283{
1284 pcmcia_socket_dev_late_resume(dev);
1285 return 0;
1279} 1286}
1280 1287
1281static struct dev_pm_ops yenta_pm_ops = { 1288static struct dev_pm_ops yenta_pm_ops = {
1282 .suspend_noirq = yenta_dev_suspend_noirq, 1289 .suspend_noirq = yenta_dev_suspend_noirq,
1283 .resume_noirq = yenta_dev_resume_noirq, 1290 .resume_noirq = yenta_dev_resume_noirq,
1291 .resume = yenta_dev_resume,
1284 .freeze_noirq = yenta_dev_suspend_noirq, 1292 .freeze_noirq = yenta_dev_suspend_noirq,
1285 .thaw_noirq = yenta_dev_resume_noirq, 1293 .thaw_noirq = yenta_dev_resume_noirq,
1294 .thaw = yenta_dev_resume,
1286 .poweroff_noirq = yenta_dev_suspend_noirq, 1295 .poweroff_noirq = yenta_dev_suspend_noirq,
1287 .restore_noirq = yenta_dev_resume_noirq, 1296 .restore_noirq = yenta_dev_resume_noirq,
1297 .restore = yenta_dev_resume,
1288}; 1298};
1289 1299
1290#define YENTA_PM_OPS (&yenta_pm_ops) 1300#define YENTA_PM_OPS (&yenta_pm_ops)
diff --git a/drivers/platform/x86/eeepc-laptop.c b/drivers/platform/x86/eeepc-laptop.c
index 749e2102b2be..4226e5352738 100644
--- a/drivers/platform/x86/eeepc-laptop.c
+++ b/drivers/platform/x86/eeepc-laptop.c
@@ -350,13 +350,14 @@ static const struct rfkill_ops eeepc_rfkill_ops = {
350 .set_block = eeepc_rfkill_set, 350 .set_block = eeepc_rfkill_set,
351}; 351};
352 352
353static void __init eeepc_enable_camera(void) 353static void __devinit eeepc_enable_camera(void)
354{ 354{
355 /* 355 /*
356 * If the following call to set_acpi() fails, it's because there's no 356 * If the following call to set_acpi() fails, it's because there's no
357 * camera so we can ignore the error. 357 * camera so we can ignore the error.
358 */ 358 */
359 set_acpi(CM_ASL_CAMERA, 1); 359 if (get_acpi(CM_ASL_CAMERA) == 0)
360 set_acpi(CM_ASL_CAMERA, 1);
360} 361}
361 362
362/* 363/*
@@ -1189,7 +1190,7 @@ static int eeepc_input_init(struct device *dev)
1189 return 0; 1190 return 0;
1190} 1191}
1191 1192
1192static int eeepc_hotk_add(struct acpi_device *device) 1193static int __devinit eeepc_hotk_add(struct acpi_device *device)
1193{ 1194{
1194 struct device *dev; 1195 struct device *dev;
1195 int result; 1196 int result;
diff --git a/drivers/platform/x86/fujitsu-laptop.c b/drivers/platform/x86/fujitsu-laptop.c
index f35aee5c2149..bcd4ba8be7db 100644
--- a/drivers/platform/x86/fujitsu-laptop.c
+++ b/drivers/platform/x86/fujitsu-laptop.c
@@ -944,7 +944,7 @@ static int acpi_fujitsu_hotkey_remove(struct acpi_device *device, int type)
944 struct fujitsu_hotkey_t *fujitsu_hotkey = acpi_driver_data(device); 944 struct fujitsu_hotkey_t *fujitsu_hotkey = acpi_driver_data(device);
945 struct input_dev *input = fujitsu_hotkey->input; 945 struct input_dev *input = fujitsu_hotkey->input;
946 946
947#ifdef CONFIG_LEDS_CLASS 947#if defined(CONFIG_LEDS_CLASS) || defined(CONFIG_LEDS_CLASS_MODULE)
948 if (fujitsu_hotkey->logolamp_registered) 948 if (fujitsu_hotkey->logolamp_registered)
949 led_classdev_unregister(&logolamp_led); 949 led_classdev_unregister(&logolamp_led);
950 950
diff --git a/drivers/pps/kapi.c b/drivers/pps/kapi.c
index 35a0b192d768..2d414e23d390 100644
--- a/drivers/pps/kapi.c
+++ b/drivers/pps/kapi.c
@@ -271,6 +271,7 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data)
271{ 271{
272 struct pps_device *pps; 272 struct pps_device *pps;
273 unsigned long flags; 273 unsigned long flags;
274 int captured = 0;
274 275
275 if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) { 276 if ((event & (PPS_CAPTUREASSERT | PPS_CAPTURECLEAR)) == 0) {
276 printk(KERN_ERR "pps: unknown event (%x) for source %d\n", 277 printk(KERN_ERR "pps: unknown event (%x) for source %d\n",
@@ -293,7 +294,8 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data)
293 294
294 /* Check the event */ 295 /* Check the event */
295 pps->current_mode = pps->params.mode; 296 pps->current_mode = pps->params.mode;
296 if (event & PPS_CAPTUREASSERT) { 297 if ((event & PPS_CAPTUREASSERT) &
298 (pps->params.mode & PPS_CAPTUREASSERT)) {
297 /* We have to add an offset? */ 299 /* We have to add an offset? */
298 if (pps->params.mode & PPS_OFFSETASSERT) 300 if (pps->params.mode & PPS_OFFSETASSERT)
299 pps_add_offset(ts, &pps->params.assert_off_tu); 301 pps_add_offset(ts, &pps->params.assert_off_tu);
@@ -303,8 +305,11 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data)
303 pps->assert_sequence++; 305 pps->assert_sequence++;
304 pr_debug("capture assert seq #%u for source %d\n", 306 pr_debug("capture assert seq #%u for source %d\n",
305 pps->assert_sequence, source); 307 pps->assert_sequence, source);
308
309 captured = ~0;
306 } 310 }
307 if (event & PPS_CAPTURECLEAR) { 311 if ((event & PPS_CAPTURECLEAR) &
312 (pps->params.mode & PPS_CAPTURECLEAR)) {
308 /* We have to add an offset? */ 313 /* We have to add an offset? */
309 if (pps->params.mode & PPS_OFFSETCLEAR) 314 if (pps->params.mode & PPS_OFFSETCLEAR)
310 pps_add_offset(ts, &pps->params.clear_off_tu); 315 pps_add_offset(ts, &pps->params.clear_off_tu);
@@ -314,12 +319,17 @@ void pps_event(int source, struct pps_ktime *ts, int event, void *data)
314 pps->clear_sequence++; 319 pps->clear_sequence++;
315 pr_debug("capture clear seq #%u for source %d\n", 320 pr_debug("capture clear seq #%u for source %d\n",
316 pps->clear_sequence, source); 321 pps->clear_sequence, source);
322
323 captured = ~0;
317 } 324 }
318 325
319 pps->go = ~0; 326 /* Wake up iif captured somthing */
320 wake_up_interruptible(&pps->queue); 327 if (captured) {
328 pps->go = ~0;
329 wake_up_interruptible(&pps->queue);
321 330
322 kill_fasync(&pps->async_queue, SIGIO, POLL_IN); 331 kill_fasync(&pps->async_queue, SIGIO, POLL_IN);
332 }
323 333
324 spin_unlock_irqrestore(&pps->lock, flags); 334 spin_unlock_irqrestore(&pps->lock, flags);
325 335
diff --git a/drivers/pps/pps.c b/drivers/pps/pps.c
index fea17e7805e9..ca5183bdad85 100644
--- a/drivers/pps/pps.c
+++ b/drivers/pps/pps.c
@@ -71,9 +71,14 @@ static long pps_cdev_ioctl(struct file *file,
71 case PPS_GETPARAMS: 71 case PPS_GETPARAMS:
72 pr_debug("PPS_GETPARAMS: source %d\n", pps->id); 72 pr_debug("PPS_GETPARAMS: source %d\n", pps->id);
73 73
74 /* Return current parameters */ 74 spin_lock_irq(&pps->lock);
75 err = copy_to_user(uarg, &pps->params, 75
76 sizeof(struct pps_kparams)); 76 /* Get the current parameters */
77 params = pps->params;
78
79 spin_unlock_irq(&pps->lock);
80
81 err = copy_to_user(uarg, &params, sizeof(struct pps_kparams));
77 if (err) 82 if (err)
78 return -EFAULT; 83 return -EFAULT;
79 84
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index 744ea1d0b59b..efe568deda12 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -1283,7 +1283,8 @@ static int _regulator_disable(struct regulator_dev *rdev)
1283 return -EIO; 1283 return -EIO;
1284 1284
1285 /* are we the last user and permitted to disable ? */ 1285 /* are we the last user and permitted to disable ? */
1286 if (rdev->use_count == 1 && !rdev->constraints->always_on) { 1286 if (rdev->use_count == 1 &&
1287 (rdev->constraints && !rdev->constraints->always_on)) {
1287 1288
1288 /* we are last user */ 1289 /* we are last user */
1289 if (_regulator_can_change_status(rdev) && 1290 if (_regulator_can_change_status(rdev) &&
diff --git a/drivers/regulator/fixed.c b/drivers/regulator/fixed.c
index f8b295700d7d..f9f516a3028a 100644
--- a/drivers/regulator/fixed.c
+++ b/drivers/regulator/fixed.c
@@ -196,11 +196,10 @@ static int regulator_fixed_voltage_remove(struct platform_device *pdev)
196 struct fixed_voltage_data *drvdata = platform_get_drvdata(pdev); 196 struct fixed_voltage_data *drvdata = platform_get_drvdata(pdev);
197 197
198 regulator_unregister(drvdata->dev); 198 regulator_unregister(drvdata->dev);
199 kfree(drvdata->desc.name);
200 kfree(drvdata);
201
202 if (gpio_is_valid(drvdata->gpio)) 199 if (gpio_is_valid(drvdata->gpio))
203 gpio_free(drvdata->gpio); 200 gpio_free(drvdata->gpio);
201 kfree(drvdata->desc.name);
202 kfree(drvdata);
204 203
205 return 0; 204 return 0;
206} 205}
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c
index bb61aede4801..902db56ce099 100644
--- a/drivers/regulator/wm831x-ldo.c
+++ b/drivers/regulator/wm831x-ldo.c
@@ -175,18 +175,18 @@ static unsigned int wm831x_gp_ldo_get_mode(struct regulator_dev *rdev)
175 struct wm831x *wm831x = ldo->wm831x; 175 struct wm831x *wm831x = ldo->wm831x;
176 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL; 176 int ctrl_reg = ldo->base + WM831X_LDO_CONTROL;
177 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; 177 int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
178 unsigned int ret; 178 int ret;
179 179
180 ret = wm831x_reg_read(wm831x, on_reg); 180 ret = wm831x_reg_read(wm831x, on_reg);
181 if (ret < 0) 181 if (ret < 0)
182 return 0; 182 return ret;
183 183
184 if (!(ret & WM831X_LDO1_ON_MODE)) 184 if (!(ret & WM831X_LDO1_ON_MODE))
185 return REGULATOR_MODE_NORMAL; 185 return REGULATOR_MODE_NORMAL;
186 186
187 ret = wm831x_reg_read(wm831x, ctrl_reg); 187 ret = wm831x_reg_read(wm831x, ctrl_reg);
188 if (ret < 0) 188 if (ret < 0)
189 return 0; 189 return ret;
190 190
191 if (ret & WM831X_LDO1_LP_MODE) 191 if (ret & WM831X_LDO1_LP_MODE)
192 return REGULATOR_MODE_STANDBY; 192 return REGULATOR_MODE_STANDBY;
diff --git a/drivers/rtc/rtc-coh901331.c b/drivers/rtc/rtc-coh901331.c
index 7fe1fa26c52c..03ea530981d1 100644
--- a/drivers/rtc/rtc-coh901331.c
+++ b/drivers/rtc/rtc-coh901331.c
@@ -58,7 +58,16 @@ static irqreturn_t coh901331_interrupt(int irq, void *data)
58 clk_enable(rtap->clk); 58 clk_enable(rtap->clk);
59 /* Ack IRQ */ 59 /* Ack IRQ */
60 writel(1, rtap->virtbase + COH901331_IRQ_EVENT); 60 writel(1, rtap->virtbase + COH901331_IRQ_EVENT);
61 /*
62 * Disable the interrupt. This is necessary because
63 * the RTC lives on a lower-clocked line and will
64 * not release the IRQ line until after a few (slower)
65 * clock cycles. The interrupt will be re-enabled when
66 * a new alarm is set anyway.
67 */
68 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
61 clk_disable(rtap->clk); 69 clk_disable(rtap->clk);
70
62 /* Set alarm flag */ 71 /* Set alarm flag */
63 rtc_update_irq(rtap->rtc, 1, RTC_AF); 72 rtc_update_irq(rtap->rtc, 1, RTC_AF);
64 73
@@ -128,6 +137,8 @@ static int coh901331_alarm_irq_enable(struct device *dev, unsigned int enabled)
128 else 137 else
129 writel(0, rtap->virtbase + COH901331_IRQ_MASK); 138 writel(0, rtap->virtbase + COH901331_IRQ_MASK);
130 clk_disable(rtap->clk); 139 clk_disable(rtap->clk);
140
141 return 0;
131} 142}
132 143
133static struct rtc_class_ops coh901331_ops = { 144static struct rtc_class_ops coh901331_ops = {
diff --git a/drivers/rtc/rtc-pcf50633.c b/drivers/rtc/rtc-pcf50633.c
index f4dd87e29075..33a10c47260e 100644
--- a/drivers/rtc/rtc-pcf50633.c
+++ b/drivers/rtc/rtc-pcf50633.c
@@ -70,7 +70,7 @@ static void pcf2rtc_time(struct rtc_time *rtc, struct pcf50633_time *pcf)
70 rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]); 70 rtc->tm_hour = bcd2bin(pcf->time[PCF50633_TI_HOUR]);
71 rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]); 71 rtc->tm_wday = bcd2bin(pcf->time[PCF50633_TI_WKDAY]);
72 rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]); 72 rtc->tm_mday = bcd2bin(pcf->time[PCF50633_TI_DAY]);
73 rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]); 73 rtc->tm_mon = bcd2bin(pcf->time[PCF50633_TI_MONTH]) - 1;
74 rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100; 74 rtc->tm_year = bcd2bin(pcf->time[PCF50633_TI_YEAR]) + 100;
75} 75}
76 76
@@ -81,7 +81,7 @@ static void rtc2pcf_time(struct pcf50633_time *pcf, struct rtc_time *rtc)
81 pcf->time[PCF50633_TI_HOUR] = bin2bcd(rtc->tm_hour); 81 pcf->time[PCF50633_TI_HOUR] = bin2bcd(rtc->tm_hour);
82 pcf->time[PCF50633_TI_WKDAY] = bin2bcd(rtc->tm_wday); 82 pcf->time[PCF50633_TI_WKDAY] = bin2bcd(rtc->tm_wday);
83 pcf->time[PCF50633_TI_DAY] = bin2bcd(rtc->tm_mday); 83 pcf->time[PCF50633_TI_DAY] = bin2bcd(rtc->tm_mday);
84 pcf->time[PCF50633_TI_MONTH] = bin2bcd(rtc->tm_mon); 84 pcf->time[PCF50633_TI_MONTH] = bin2bcd(rtc->tm_mon + 1);
85 pcf->time[PCF50633_TI_YEAR] = bin2bcd(rtc->tm_year % 100); 85 pcf->time[PCF50633_TI_YEAR] = bin2bcd(rtc->tm_year % 100);
86} 86}
87 87
@@ -245,8 +245,9 @@ static int pcf50633_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
245 ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA, 245 ret = pcf50633_write_block(rtc->pcf, PCF50633_REG_RTCSCA,
246 PCF50633_TI_EXTENT, &pcf_tm.time[0]); 246 PCF50633_TI_EXTENT, &pcf_tm.time[0]);
247 247
248 if (!alarm_masked) 248 if (!alarm_masked || alrm->enabled)
249 pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM); 249 pcf50633_irq_unmask(rtc->pcf, PCF50633_IRQ_ALARM);
250 rtc->alarm_enabled = alrm->enabled;
250 251
251 return ret; 252 return ret;
252} 253}
diff --git a/drivers/rtc/rtc-v3020.c b/drivers/rtc/rtc-v3020.c
index ad164056feb6..423cd5a30b10 100644
--- a/drivers/rtc/rtc-v3020.c
+++ b/drivers/rtc/rtc-v3020.c
@@ -96,7 +96,7 @@ static void v3020_mmio_write_bit(struct v3020 *chip, unsigned char bit)
96 96
97static unsigned char v3020_mmio_read_bit(struct v3020 *chip) 97static unsigned char v3020_mmio_read_bit(struct v3020 *chip)
98{ 98{
99 return readl(chip->ioaddress) & (1 << chip->leftshift); 99 return !!(readl(chip->ioaddress) & (1 << chip->leftshift));
100} 100}
101 101
102static struct v3020_chip_ops v3020_mmio_ops = { 102static struct v3020_chip_ops v3020_mmio_ops = {
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c
index 2c839d0d21bd..fadddac1e5a4 100644
--- a/drivers/rtc/rtc-vr41xx.c
+++ b/drivers/rtc/rtc-vr41xx.c
@@ -209,19 +209,18 @@ static int vr41xx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *wkalrm)
209 209
210static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq) 210static int vr41xx_rtc_irq_set_freq(struct device *dev, int freq)
211{ 211{
212 unsigned long count; 212 u64 count;
213 213
214 if (!is_power_of_2(freq)) 214 if (!is_power_of_2(freq))
215 return -EINVAL; 215 return -EINVAL;
216 count = RTC_FREQUENCY; 216 count = RTC_FREQUENCY;
217 do_div(count, freq); 217 do_div(count, freq);
218 218
219 periodic_count = count;
220
221 spin_lock_irq(&rtc_lock); 219 spin_lock_irq(&rtc_lock);
222 220
223 rtc1_write(RTCL1LREG, count); 221 periodic_count = count;
224 rtc1_write(RTCL1HREG, count >> 16); 222 rtc1_write(RTCL1LREG, periodic_count);
223 rtc1_write(RTCL1HREG, periodic_count >> 16);
225 224
226 spin_unlock_irq(&rtc_lock); 225 spin_unlock_irq(&rtc_lock);
227 226
diff --git a/drivers/s390/block/dasd.c b/drivers/s390/block/dasd.c
index 53b8c255360a..aaccc8ecfa8f 100644
--- a/drivers/s390/block/dasd.c
+++ b/drivers/s390/block/dasd.c
@@ -2533,6 +2533,7 @@ static struct dasd_ccw_req *dasd_generic_build_rdc(struct dasd_device *device,
2533{ 2533{
2534 struct dasd_ccw_req *cqr; 2534 struct dasd_ccw_req *cqr;
2535 struct ccw1 *ccw; 2535 struct ccw1 *ccw;
2536 unsigned long *idaw;
2536 2537
2537 cqr = dasd_smalloc_request(magic, 1 /* RDC */, rdc_buffer_size, device); 2538 cqr = dasd_smalloc_request(magic, 1 /* RDC */, rdc_buffer_size, device);
2538 2539
@@ -2546,9 +2547,17 @@ static struct dasd_ccw_req *dasd_generic_build_rdc(struct dasd_device *device,
2546 2547
2547 ccw = cqr->cpaddr; 2548 ccw = cqr->cpaddr;
2548 ccw->cmd_code = CCW_CMD_RDC; 2549 ccw->cmd_code = CCW_CMD_RDC;
2549 ccw->cda = (__u32)(addr_t)rdc_buffer; 2550 if (idal_is_needed(rdc_buffer, rdc_buffer_size)) {
2550 ccw->count = rdc_buffer_size; 2551 idaw = (unsigned long *) (cqr->data);
2552 ccw->cda = (__u32)(addr_t) idaw;
2553 ccw->flags = CCW_FLAG_IDA;
2554 idaw = idal_create_words(idaw, rdc_buffer, rdc_buffer_size);
2555 } else {
2556 ccw->cda = (__u32)(addr_t) rdc_buffer;
2557 ccw->flags = 0;
2558 }
2551 2559
2560 ccw->count = rdc_buffer_size;
2552 cqr->startdev = device; 2561 cqr->startdev = device;
2553 cqr->memdev = device; 2562 cqr->memdev = device;
2554 cqr->expires = 10*HZ; 2563 cqr->expires = 10*HZ;
diff --git a/drivers/s390/block/dasd_eckd.c b/drivers/s390/block/dasd_eckd.c
index 0be7c15f45c5..417b97cd3f94 100644
--- a/drivers/s390/block/dasd_eckd.c
+++ b/drivers/s390/block/dasd_eckd.c
@@ -3216,6 +3216,7 @@ int dasd_eckd_restore_device(struct dasd_device *device)
3216 struct dasd_eckd_characteristics temp_rdc_data; 3216 struct dasd_eckd_characteristics temp_rdc_data;
3217 int is_known, rc; 3217 int is_known, rc;
3218 struct dasd_uid temp_uid; 3218 struct dasd_uid temp_uid;
3219 unsigned long flags;
3219 3220
3220 private = (struct dasd_eckd_private *) device->private; 3221 private = (struct dasd_eckd_private *) device->private;
3221 3222
@@ -3228,7 +3229,8 @@ int dasd_eckd_restore_device(struct dasd_device *device)
3228 rc = dasd_eckd_generate_uid(device, &private->uid); 3229 rc = dasd_eckd_generate_uid(device, &private->uid);
3229 dasd_get_uid(device->cdev, &temp_uid); 3230 dasd_get_uid(device->cdev, &temp_uid);
3230 if (memcmp(&private->uid, &temp_uid, sizeof(struct dasd_uid)) != 0) 3231 if (memcmp(&private->uid, &temp_uid, sizeof(struct dasd_uid)) != 0)
3231 dev_err(&device->cdev->dev, "The UID of the DASD has changed\n"); 3232 dev_err(&device->cdev->dev, "The UID of the DASD has "
3233 "changed\n");
3232 if (rc) 3234 if (rc)
3233 goto out_err; 3235 goto out_err;
3234 dasd_set_uid(device->cdev, &private->uid); 3236 dasd_set_uid(device->cdev, &private->uid);
@@ -3256,9 +3258,9 @@ int dasd_eckd_restore_device(struct dasd_device *device)
3256 "device: %s", rc, dev_name(&device->cdev->dev)); 3258 "device: %s", rc, dev_name(&device->cdev->dev));
3257 goto out_err; 3259 goto out_err;
3258 } 3260 }
3259 spin_lock(get_ccwdev_lock(device->cdev)); 3261 spin_lock_irqsave(get_ccwdev_lock(device->cdev), flags);
3260 memcpy(&private->rdc_data, &temp_rdc_data, sizeof(temp_rdc_data)); 3262 memcpy(&private->rdc_data, &temp_rdc_data, sizeof(temp_rdc_data));
3261 spin_unlock(get_ccwdev_lock(device->cdev)); 3263 spin_unlock_irqrestore(get_ccwdev_lock(device->cdev), flags);
3262 3264
3263 /* add device to alias management */ 3265 /* add device to alias management */
3264 dasd_alias_add_device(device); 3266 dasd_alias_add_device(device);
diff --git a/drivers/s390/char/monreader.c b/drivers/s390/char/monreader.c
index 89ece1c235aa..66e21dd23154 100644
--- a/drivers/s390/char/monreader.c
+++ b/drivers/s390/char/monreader.c
@@ -357,6 +357,7 @@ static int mon_close(struct inode *inode, struct file *filp)
357 atomic_set(&monpriv->msglim_count, 0); 357 atomic_set(&monpriv->msglim_count, 0);
358 monpriv->write_index = 0; 358 monpriv->write_index = 0;
359 monpriv->read_index = 0; 359 monpriv->read_index = 0;
360 dev_set_drvdata(monreader_device, NULL);
360 361
361 for (i = 0; i < MON_MSGLIM; i++) 362 for (i = 0; i < MON_MSGLIM; i++)
362 kfree(monpriv->msg_array[i]); 363 kfree(monpriv->msg_array[i]);
diff --git a/drivers/s390/char/sclp_async.c b/drivers/s390/char/sclp_async.c
index daaec185ed36..b44462a6c6d3 100644
--- a/drivers/s390/char/sclp_async.c
+++ b/drivers/s390/char/sclp_async.c
@@ -26,7 +26,6 @@ static struct sclp_async_sccb *sccb;
26static int sclp_async_send_wait(char *message); 26static int sclp_async_send_wait(char *message);
27static struct ctl_table_header *callhome_sysctl_header; 27static struct ctl_table_header *callhome_sysctl_header;
28static DEFINE_SPINLOCK(sclp_async_lock); 28static DEFINE_SPINLOCK(sclp_async_lock);
29static char nodename[64];
30#define SCLP_NORMAL_WRITE 0x00 29#define SCLP_NORMAL_WRITE 0x00
31 30
32struct async_evbuf { 31struct async_evbuf {
@@ -52,9 +51,10 @@ static struct sclp_register sclp_async_register = {
52static int call_home_on_panic(struct notifier_block *self, 51static int call_home_on_panic(struct notifier_block *self,
53 unsigned long event, void *data) 52 unsigned long event, void *data)
54{ 53{
55 strncat(data, nodename, strlen(nodename)); 54 strncat(data, init_utsname()->nodename,
56 sclp_async_send_wait(data); 55 sizeof(init_utsname()->nodename));
57 return NOTIFY_DONE; 56 sclp_async_send_wait(data);
57 return NOTIFY_DONE;
58} 58}
59 59
60static struct notifier_block call_home_panic_nb = { 60static struct notifier_block call_home_panic_nb = {
@@ -62,21 +62,20 @@ static struct notifier_block call_home_panic_nb = {
62 .priority = INT_MAX, 62 .priority = INT_MAX,
63}; 63};
64 64
65static int proc_handler_callhome(ctl_table *ctl, int write, struct file *filp, 65static int proc_handler_callhome(struct ctl_table *ctl, int write,
66 void __user *buffer, size_t *count, 66 void __user *buffer, size_t *count,
67 loff_t *ppos) 67 loff_t *ppos)
68{ 68{
69 unsigned long val; 69 unsigned long val;
70 int len, rc; 70 int len, rc;
71 char buf[2]; 71 char buf[3];
72 72
73 if (!*count | (*ppos && !write)) { 73 if (!*count || (*ppos && !write)) {
74 *count = 0; 74 *count = 0;
75 return 0; 75 return 0;
76 } 76 }
77 if (!write) { 77 if (!write) {
78 len = sprintf(buf, "%d\n", callhome_enabled); 78 len = snprintf(buf, sizeof(buf), "%d\n", callhome_enabled);
79 buf[len] = '\0';
80 rc = copy_to_user(buffer, buf, sizeof(buf)); 79 rc = copy_to_user(buffer, buf, sizeof(buf));
81 if (rc != 0) 80 if (rc != 0)
82 return -EFAULT; 81 return -EFAULT;
@@ -100,7 +99,7 @@ static struct ctl_table callhome_table[] = {
100 { 99 {
101 .procname = "callhome", 100 .procname = "callhome",
102 .mode = 0644, 101 .mode = 0644,
103 .proc_handler = &proc_handler_callhome, 102 .proc_handler = proc_handler_callhome,
104 }, 103 },
105 { .ctl_name = 0 } 104 { .ctl_name = 0 }
106}; 105};
@@ -171,39 +170,29 @@ static int __init sclp_async_init(void)
171 rc = sclp_register(&sclp_async_register); 170 rc = sclp_register(&sclp_async_register);
172 if (rc) 171 if (rc)
173 return rc; 172 return rc;
174 callhome_sysctl_header = register_sysctl_table(kern_dir_table); 173 rc = -EOPNOTSUPP;
175 if (!callhome_sysctl_header) { 174 if (!(sclp_async_register.sclp_receive_mask & EVTYP_ASYNC_MASK))
176 rc = -ENOMEM;
177 goto out_sclp;
178 }
179 if (!(sclp_async_register.sclp_receive_mask & EVTYP_ASYNC_MASK)) {
180 rc = -EOPNOTSUPP;
181 goto out_sclp; 175 goto out_sclp;
182 }
183 rc = -ENOMEM; 176 rc = -ENOMEM;
177 callhome_sysctl_header = register_sysctl_table(kern_dir_table);
178 if (!callhome_sysctl_header)
179 goto out_sclp;
184 request = kzalloc(sizeof(struct sclp_req), GFP_KERNEL); 180 request = kzalloc(sizeof(struct sclp_req), GFP_KERNEL);
185 if (!request)
186 goto out_sys;
187 sccb = (struct sclp_async_sccb *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 181 sccb = (struct sclp_async_sccb *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
188 if (!sccb) 182 if (!request || !sccb)
189 goto out_mem; 183 goto out_mem;
190 rc = atomic_notifier_chain_register(&panic_notifier_list, 184 rc = atomic_notifier_chain_register(&panic_notifier_list,
191 &call_home_panic_nb); 185 &call_home_panic_nb);
192 if (rc) 186 if (!rc)
193 goto out_mem; 187 goto out;
194
195 strncpy(nodename, init_utsname()->nodename, 64);
196 return 0;
197
198out_mem: 188out_mem:
199 kfree(request); 189 kfree(request);
200 free_page((unsigned long) sccb); 190 free_page((unsigned long) sccb);
201out_sys:
202 unregister_sysctl_table(callhome_sysctl_header); 191 unregister_sysctl_table(callhome_sysctl_header);
203out_sclp: 192out_sclp:
204 sclp_unregister(&sclp_async_register); 193 sclp_unregister(&sclp_async_register);
194out:
205 return rc; 195 return rc;
206
207} 196}
208module_init(sclp_async_init); 197module_init(sclp_async_init);
209 198
diff --git a/drivers/s390/char/sclp_quiesce.c b/drivers/s390/char/sclp_quiesce.c
index 84c191c1cd62..05909a7df8b3 100644
--- a/drivers/s390/char/sclp_quiesce.c
+++ b/drivers/s390/char/sclp_quiesce.c
@@ -20,9 +20,12 @@
20 20
21#include "sclp.h" 21#include "sclp.h"
22 22
23static void (*old_machine_restart)(char *);
24static void (*old_machine_halt)(void);
25static void (*old_machine_power_off)(void);
26
23/* Shutdown handler. Signal completion of shutdown by loading special PSW. */ 27/* Shutdown handler. Signal completion of shutdown by loading special PSW. */
24static void 28static void do_machine_quiesce(void)
25do_machine_quiesce(void)
26{ 29{
27 psw_t quiesce_psw; 30 psw_t quiesce_psw;
28 31
@@ -33,23 +36,48 @@ do_machine_quiesce(void)
33} 36}
34 37
35/* Handler for quiesce event. Start shutdown procedure. */ 38/* Handler for quiesce event. Start shutdown procedure. */
36static void 39static void sclp_quiesce_handler(struct evbuf_header *evbuf)
37sclp_quiesce_handler(struct evbuf_header *evbuf)
38{ 40{
39 _machine_restart = (void *) do_machine_quiesce; 41 if (_machine_restart != (void *) do_machine_quiesce) {
40 _machine_halt = do_machine_quiesce; 42 old_machine_restart = _machine_restart;
41 _machine_power_off = do_machine_quiesce; 43 old_machine_halt = _machine_halt;
44 old_machine_power_off = _machine_power_off;
45 _machine_restart = (void *) do_machine_quiesce;
46 _machine_halt = do_machine_quiesce;
47 _machine_power_off = do_machine_quiesce;
48 }
42 ctrl_alt_del(); 49 ctrl_alt_del();
43} 50}
44 51
52/* Undo machine restart/halt/power_off modification on resume */
53static void sclp_quiesce_pm_event(struct sclp_register *reg,
54 enum sclp_pm_event sclp_pm_event)
55{
56 switch (sclp_pm_event) {
57 case SCLP_PM_EVENT_RESTORE:
58 if (old_machine_restart) {
59 _machine_restart = old_machine_restart;
60 _machine_halt = old_machine_halt;
61 _machine_power_off = old_machine_power_off;
62 old_machine_restart = NULL;
63 old_machine_halt = NULL;
64 old_machine_power_off = NULL;
65 }
66 break;
67 case SCLP_PM_EVENT_FREEZE:
68 case SCLP_PM_EVENT_THAW:
69 break;
70 }
71}
72
45static struct sclp_register sclp_quiesce_event = { 73static struct sclp_register sclp_quiesce_event = {
46 .receive_mask = EVTYP_SIGQUIESCE_MASK, 74 .receive_mask = EVTYP_SIGQUIESCE_MASK,
47 .receiver_fn = sclp_quiesce_handler 75 .receiver_fn = sclp_quiesce_handler,
76 .pm_event_fn = sclp_quiesce_pm_event
48}; 77};
49 78
50/* Initialize quiesce driver. */ 79/* Initialize quiesce driver. */
51static int __init 80static int __init sclp_quiesce_init(void)
52sclp_quiesce_init(void)
53{ 81{
54 return sclp_register(&sclp_quiesce_event); 82 return sclp_register(&sclp_quiesce_event);
55} 83}
diff --git a/drivers/s390/char/sclp_vt220.c b/drivers/s390/char/sclp_vt220.c
index 178724f2a4c3..b9d2a007e93b 100644
--- a/drivers/s390/char/sclp_vt220.c
+++ b/drivers/s390/char/sclp_vt220.c
@@ -705,21 +705,6 @@ out_driver:
705} 705}
706__initcall(sclp_vt220_tty_init); 706__initcall(sclp_vt220_tty_init);
707 707
708#ifdef CONFIG_SCLP_VT220_CONSOLE
709
710static void
711sclp_vt220_con_write(struct console *con, const char *buf, unsigned int count)
712{
713 __sclp_vt220_write((const unsigned char *) buf, count, 1, 1, 0);
714}
715
716static struct tty_driver *
717sclp_vt220_con_device(struct console *c, int *index)
718{
719 *index = 0;
720 return sclp_vt220_driver;
721}
722
723static void __sclp_vt220_flush_buffer(void) 708static void __sclp_vt220_flush_buffer(void)
724{ 709{
725 unsigned long flags; 710 unsigned long flags;
@@ -776,6 +761,21 @@ static void sclp_vt220_pm_event_fn(struct sclp_register *reg,
776 } 761 }
777} 762}
778 763
764#ifdef CONFIG_SCLP_VT220_CONSOLE
765
766static void
767sclp_vt220_con_write(struct console *con, const char *buf, unsigned int count)
768{
769 __sclp_vt220_write((const unsigned char *) buf, count, 1, 1, 0);
770}
771
772static struct tty_driver *
773sclp_vt220_con_device(struct console *c, int *index)
774{
775 *index = 0;
776 return sclp_vt220_driver;
777}
778
779static int 779static int
780sclp_vt220_notify(struct notifier_block *self, 780sclp_vt220_notify(struct notifier_block *self,
781 unsigned long event, void *data) 781 unsigned long event, void *data)
diff --git a/drivers/s390/char/tape_block.c b/drivers/s390/char/tape_block.c
index 64f57ef2763c..0c0705b91c28 100644
--- a/drivers/s390/char/tape_block.c
+++ b/drivers/s390/char/tape_block.c
@@ -162,9 +162,10 @@ tapeblock_requeue(struct work_struct *work) {
162 spin_lock_irq(&device->blk_data.request_queue_lock); 162 spin_lock_irq(&device->blk_data.request_queue_lock);
163 while ( 163 while (
164 !blk_queue_plugged(queue) && 164 !blk_queue_plugged(queue) &&
165 (req = blk_fetch_request(queue)) && 165 blk_peek_request(queue) &&
166 nr_queued < TAPEBLOCK_MIN_REQUEUE 166 nr_queued < TAPEBLOCK_MIN_REQUEUE
167 ) { 167 ) {
168 req = blk_fetch_request(queue);
168 if (rq_data_dir(req) == WRITE) { 169 if (rq_data_dir(req) == WRITE) {
169 DBF_EVENT(1, "TBLOCK: Rejecting write request\n"); 170 DBF_EVENT(1, "TBLOCK: Rejecting write request\n");
170 spin_unlock_irq(&device->blk_data.request_queue_lock); 171 spin_unlock_irq(&device->blk_data.request_queue_lock);
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c
index 2ee093ec86e4..2490b741e16a 100644
--- a/drivers/s390/cio/device.c
+++ b/drivers/s390/cio/device.c
@@ -1250,8 +1250,7 @@ static int io_subchannel_probe(struct subchannel *sch)
1250 unsigned long flags; 1250 unsigned long flags;
1251 struct ccw_dev_id dev_id; 1251 struct ccw_dev_id dev_id;
1252 1252
1253 cdev = sch_get_cdev(sch); 1253 if (cio_is_console(sch->schid)) {
1254 if (cdev) {
1255 rc = sysfs_create_group(&sch->dev.kobj, 1254 rc = sysfs_create_group(&sch->dev.kobj,
1256 &io_subchannel_attr_group); 1255 &io_subchannel_attr_group);
1257 if (rc) 1256 if (rc)
@@ -1260,13 +1259,13 @@ static int io_subchannel_probe(struct subchannel *sch)
1260 "0.%x.%04x (rc=%d)\n", 1259 "0.%x.%04x (rc=%d)\n",
1261 sch->schid.ssid, sch->schid.sch_no, rc); 1260 sch->schid.ssid, sch->schid.sch_no, rc);
1262 /* 1261 /*
1263 * This subchannel already has an associated ccw_device. 1262 * The console subchannel already has an associated ccw_device.
1264 * Throw the delayed uevent for the subchannel, register 1263 * Throw the delayed uevent for the subchannel, register
1265 * the ccw_device and exit. This happens for all early 1264 * the ccw_device and exit.
1266 * devices, e.g. the console.
1267 */ 1265 */
1268 dev_set_uevent_suppress(&sch->dev, 0); 1266 dev_set_uevent_suppress(&sch->dev, 0);
1269 kobject_uevent(&sch->dev.kobj, KOBJ_ADD); 1267 kobject_uevent(&sch->dev.kobj, KOBJ_ADD);
1268 cdev = sch_get_cdev(sch);
1270 cdev->dev.groups = ccwdev_attr_groups; 1269 cdev->dev.groups = ccwdev_attr_groups;
1271 device_initialize(&cdev->dev); 1270 device_initialize(&cdev->dev);
1272 ccw_device_register(cdev); 1271 ccw_device_register(cdev);
diff --git a/drivers/s390/net/smsgiucv.c b/drivers/s390/net/smsgiucv.c
index 102000d1af6f..3012355f8304 100644
--- a/drivers/s390/net/smsgiucv.c
+++ b/drivers/s390/net/smsgiucv.c
@@ -158,7 +158,12 @@ static int smsg_pm_restore_thaw(struct device *dev)
158 smsg_path->flags = 0; 158 smsg_path->flags = 0;
159 rc = iucv_path_connect(smsg_path, &smsg_handler, "*MSG ", 159 rc = iucv_path_connect(smsg_path, &smsg_handler, "*MSG ",
160 NULL, NULL, NULL); 160 NULL, NULL, NULL);
161 printk(KERN_ERR "iucv_path_connect returned with rc %i\n", rc); 161#ifdef CONFIG_PM_DEBUG
162 if (rc)
163 printk(KERN_ERR
164 "iucv_path_connect returned with rc %i\n", rc);
165#endif
166 cpcmd("SET SMSG IUCV", NULL, 0, NULL);
162 } 167 }
163 return 0; 168 return 0;
164} 169}
diff --git a/drivers/s390/scsi/zfcp_aux.c b/drivers/s390/scsi/zfcp_aux.c
index 0f79f3af4f54..2889e5f2dfd3 100644
--- a/drivers/s390/scsi/zfcp_aux.c
+++ b/drivers/s390/scsi/zfcp_aux.c
@@ -128,12 +128,13 @@ out_ccwdev:
128static void __init zfcp_init_device_setup(char *devstr) 128static void __init zfcp_init_device_setup(char *devstr)
129{ 129{
130 char *token; 130 char *token;
131 char *str; 131 char *str, *str_saved;
132 char busid[ZFCP_BUS_ID_SIZE]; 132 char busid[ZFCP_BUS_ID_SIZE];
133 u64 wwpn, lun; 133 u64 wwpn, lun;
134 134
135 /* duplicate devstr and keep the original for sysfs presentation*/ 135 /* duplicate devstr and keep the original for sysfs presentation*/
136 str = kmalloc(strlen(devstr) + 1, GFP_KERNEL); 136 str_saved = kmalloc(strlen(devstr) + 1, GFP_KERNEL);
137 str = str_saved;
137 if (!str) 138 if (!str)
138 return; 139 return;
139 140
@@ -152,12 +153,12 @@ static void __init zfcp_init_device_setup(char *devstr)
152 if (!token || strict_strtoull(token, 0, (unsigned long long *) &lun)) 153 if (!token || strict_strtoull(token, 0, (unsigned long long *) &lun))
153 goto err_out; 154 goto err_out;
154 155
155 kfree(str); 156 kfree(str_saved);
156 zfcp_init_device_configure(busid, wwpn, lun); 157 zfcp_init_device_configure(busid, wwpn, lun);
157 return; 158 return;
158 159
159 err_out: 160err_out:
160 kfree(str); 161 kfree(str_saved);
161 pr_err("%s is not a valid SCSI device\n", devstr); 162 pr_err("%s is not a valid SCSI device\n", devstr);
162} 163}
163 164
diff --git a/drivers/s390/scsi/zfcp_erp.c b/drivers/s390/scsi/zfcp_erp.c
index 73d366ba31e5..f73e2180f333 100644
--- a/drivers/s390/scsi/zfcp_erp.c
+++ b/drivers/s390/scsi/zfcp_erp.c
@@ -858,10 +858,7 @@ static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act)
858 if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP) 858 if (fc_host_port_type(adapter->scsi_host) == FC_PORTTYPE_PTP)
859 return zfcp_erp_open_ptp_port(act); 859 return zfcp_erp_open_ptp_port(act);
860 if (!port->d_id) { 860 if (!port->d_id) {
861 zfcp_port_get(port); 861 zfcp_fc_trigger_did_lookup(port);
862 if (!queue_work(adapter->work_queue,
863 &port->gid_pn_work))
864 zfcp_port_put(port);
865 return ZFCP_ERP_EXIT; 862 return ZFCP_ERP_EXIT;
866 } 863 }
867 return zfcp_erp_port_strategy_open_port(act); 864 return zfcp_erp_port_strategy_open_port(act);
@@ -869,12 +866,11 @@ static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act)
869 case ZFCP_ERP_STEP_PORT_OPENING: 866 case ZFCP_ERP_STEP_PORT_OPENING:
870 /* D_ID might have changed during open */ 867 /* D_ID might have changed during open */
871 if (p_status & ZFCP_STATUS_COMMON_OPEN) { 868 if (p_status & ZFCP_STATUS_COMMON_OPEN) {
872 if (port->d_id) 869 if (!port->d_id) {
873 return ZFCP_ERP_SUCCEEDED; 870 zfcp_fc_trigger_did_lookup(port);
874 else { 871 return ZFCP_ERP_EXIT;
875 act->step = ZFCP_ERP_STEP_PORT_CLOSING;
876 return ZFCP_ERP_CONTINUES;
877 } 872 }
873 return ZFCP_ERP_SUCCEEDED;
878 } 874 }
879 if (port->d_id && !(p_status & ZFCP_STATUS_COMMON_NOESC)) { 875 if (port->d_id && !(p_status & ZFCP_STATUS_COMMON_NOESC)) {
880 port->d_id = 0; 876 port->d_id = 0;
@@ -889,19 +885,21 @@ static int zfcp_erp_port_strategy_open_common(struct zfcp_erp_action *act)
889static int zfcp_erp_port_strategy(struct zfcp_erp_action *erp_action) 885static int zfcp_erp_port_strategy(struct zfcp_erp_action *erp_action)
890{ 886{
891 struct zfcp_port *port = erp_action->port; 887 struct zfcp_port *port = erp_action->port;
888 int p_status = atomic_read(&port->status);
892 889
893 if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_NOESC) 890 if ((p_status & ZFCP_STATUS_COMMON_NOESC) &&
891 !(p_status & ZFCP_STATUS_COMMON_OPEN))
894 goto close_init_done; 892 goto close_init_done;
895 893
896 switch (erp_action->step) { 894 switch (erp_action->step) {
897 case ZFCP_ERP_STEP_UNINITIALIZED: 895 case ZFCP_ERP_STEP_UNINITIALIZED:
898 zfcp_erp_port_strategy_clearstati(port); 896 zfcp_erp_port_strategy_clearstati(port);
899 if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_OPEN) 897 if (p_status & ZFCP_STATUS_COMMON_OPEN)
900 return zfcp_erp_port_strategy_close(erp_action); 898 return zfcp_erp_port_strategy_close(erp_action);
901 break; 899 break;
902 900
903 case ZFCP_ERP_STEP_PORT_CLOSING: 901 case ZFCP_ERP_STEP_PORT_CLOSING:
904 if (atomic_read(&port->status) & ZFCP_STATUS_COMMON_OPEN) 902 if (p_status & ZFCP_STATUS_COMMON_OPEN)
905 return ZFCP_ERP_FAILED; 903 return ZFCP_ERP_FAILED;
906 break; 904 break;
907 } 905 }
diff --git a/drivers/s390/scsi/zfcp_ext.h b/drivers/s390/scsi/zfcp_ext.h
index 629edec70405..b3f28deb4505 100644
--- a/drivers/s390/scsi/zfcp_ext.h
+++ b/drivers/s390/scsi/zfcp_ext.h
@@ -96,6 +96,7 @@ extern int zfcp_fc_scan_ports(struct zfcp_adapter *);
96extern void _zfcp_fc_scan_ports_later(struct work_struct *); 96extern void _zfcp_fc_scan_ports_later(struct work_struct *);
97extern void zfcp_fc_incoming_els(struct zfcp_fsf_req *); 97extern void zfcp_fc_incoming_els(struct zfcp_fsf_req *);
98extern void zfcp_fc_port_did_lookup(struct work_struct *); 98extern void zfcp_fc_port_did_lookup(struct work_struct *);
99extern void zfcp_fc_trigger_did_lookup(struct zfcp_port *);
99extern void zfcp_fc_plogi_evaluate(struct zfcp_port *, struct fsf_plogi *); 100extern void zfcp_fc_plogi_evaluate(struct zfcp_port *, struct fsf_plogi *);
100extern void zfcp_fc_test_link(struct zfcp_port *); 101extern void zfcp_fc_test_link(struct zfcp_port *);
101extern void zfcp_fc_link_test_work(struct work_struct *); 102extern void zfcp_fc_link_test_work(struct work_struct *);
diff --git a/drivers/s390/scsi/zfcp_fc.c b/drivers/s390/scsi/zfcp_fc.c
index 722f22de8753..df23bcead23d 100644
--- a/drivers/s390/scsi/zfcp_fc.c
+++ b/drivers/s390/scsi/zfcp_fc.c
@@ -361,6 +361,17 @@ out:
361} 361}
362 362
363/** 363/**
364 * zfcp_fc_trigger_did_lookup - trigger the d_id lookup using a GID_PN request
365 * @port: The zfcp_port to lookup the d_id for.
366 */
367void zfcp_fc_trigger_did_lookup(struct zfcp_port *port)
368{
369 zfcp_port_get(port);
370 if (!queue_work(port->adapter->work_queue, &port->gid_pn_work))
371 zfcp_port_put(port);
372}
373
374/**
364 * zfcp_fc_plogi_evaluate - evaluate PLOGI playload 375 * zfcp_fc_plogi_evaluate - evaluate PLOGI playload
365 * @port: zfcp_port structure 376 * @port: zfcp_port structure
366 * @plogi: plogi payload 377 * @plogi: plogi payload
diff --git a/drivers/s390/scsi/zfcp_fsf.c b/drivers/s390/scsi/zfcp_fsf.c
index 38a7e4a6b639..4e41baa0c141 100644
--- a/drivers/s390/scsi/zfcp_fsf.c
+++ b/drivers/s390/scsi/zfcp_fsf.c
@@ -1079,7 +1079,7 @@ static int zfcp_fsf_setup_ct_els(struct zfcp_fsf_req *req,
1079 /* common settings for ct/gs and els requests */ 1079 /* common settings for ct/gs and els requests */
1080 req->qtcb->bottom.support.service_class = FSF_CLASS_3; 1080 req->qtcb->bottom.support.service_class = FSF_CLASS_3;
1081 req->qtcb->bottom.support.timeout = 2 * R_A_TOV; 1081 req->qtcb->bottom.support.timeout = 2 * R_A_TOV;
1082 zfcp_fsf_start_timer(req, 2 * R_A_TOV + 10); 1082 zfcp_fsf_start_timer(req, (2 * R_A_TOV + 10) * HZ);
1083 1083
1084 return 0; 1084 return 0;
1085} 1085}
@@ -1475,9 +1475,16 @@ static void zfcp_fsf_open_port_handler(struct zfcp_fsf_req *req)
1475 plogi = (struct fsf_plogi *) req->qtcb->bottom.support.els; 1475 plogi = (struct fsf_plogi *) req->qtcb->bottom.support.els;
1476 if (req->qtcb->bottom.support.els1_length >= 1476 if (req->qtcb->bottom.support.els1_length >=
1477 FSF_PLOGI_MIN_LEN) { 1477 FSF_PLOGI_MIN_LEN) {
1478 if (plogi->serv_param.wwpn != port->wwpn) 1478 if (plogi->serv_param.wwpn != port->wwpn) {
1479 port->d_id = 0; 1479 port->d_id = 0;
1480 else { 1480 dev_warn(&port->adapter->ccw_device->dev,
1481 "A port opened with WWPN 0x%016Lx "
1482 "returned data that identifies it as "
1483 "WWPN 0x%016Lx\n",
1484 (unsigned long long) port->wwpn,
1485 (unsigned long long)
1486 plogi->serv_param.wwpn);
1487 } else {
1481 port->wwnn = plogi->serv_param.wwnn; 1488 port->wwnn = plogi->serv_param.wwnn;
1482 zfcp_fc_plogi_evaluate(port, plogi); 1489 zfcp_fc_plogi_evaluate(port, plogi);
1483 } 1490 }
diff --git a/drivers/s390/scsi/zfcp_sysfs.c b/drivers/s390/scsi/zfcp_sysfs.c
index 079a8cf518a3..d31000886ca8 100644
--- a/drivers/s390/scsi/zfcp_sysfs.c
+++ b/drivers/s390/scsi/zfcp_sysfs.c
@@ -224,6 +224,7 @@ static ssize_t zfcp_sysfs_unit_add_store(struct device *dev,
224 224
225 zfcp_erp_unit_reopen(unit, 0, "syuas_1", NULL); 225 zfcp_erp_unit_reopen(unit, 0, "syuas_1", NULL);
226 zfcp_erp_wait(unit->port->adapter); 226 zfcp_erp_wait(unit->port->adapter);
227 flush_work(&unit->scsi_work);
227 zfcp_unit_put(unit); 228 zfcp_unit_put(unit);
228out: 229out:
229 mutex_unlock(&zfcp_data.config_mutex); 230 mutex_unlock(&zfcp_data.config_mutex);
diff --git a/drivers/scsi/bfa/bfad_fwimg.c b/drivers/scsi/bfa/bfad_fwimg.c
index b2f6949bc8d3..bd34b0db2d6b 100644
--- a/drivers/scsi/bfa/bfad_fwimg.c
+++ b/drivers/scsi/bfa/bfad_fwimg.c
@@ -41,6 +41,8 @@ u32 *bfi_image_cb;
41 41
42#define BFAD_FW_FILE_CT "ctfw.bin" 42#define BFAD_FW_FILE_CT "ctfw.bin"
43#define BFAD_FW_FILE_CB "cbfw.bin" 43#define BFAD_FW_FILE_CB "cbfw.bin"
44MODULE_FIRMWARE(BFAD_FW_FILE_CT);
45MODULE_FIRMWARE(BFAD_FW_FILE_CB);
44 46
45u32 * 47u32 *
46bfad_read_firmware(struct pci_dev *pdev, u32 **bfi_image, 48bfad_read_firmware(struct pci_dev *pdev, u32 **bfi_image,
diff --git a/drivers/scsi/bfa/bfad_im.c b/drivers/scsi/bfa/bfad_im.c
index 158c99243c08..55d012a9a668 100644
--- a/drivers/scsi/bfa/bfad_im.c
+++ b/drivers/scsi/bfa/bfad_im.c
@@ -948,7 +948,7 @@ bfad_os_fc_host_init(struct bfad_im_port_s *im_port)
948 if (bfad_supported_fc4s & (BFA_PORT_ROLE_FCP_IM | BFA_PORT_ROLE_FCP_TM)) 948 if (bfad_supported_fc4s & (BFA_PORT_ROLE_FCP_IM | BFA_PORT_ROLE_FCP_TM))
949 /* For FCP type 0x08 */ 949 /* For FCP type 0x08 */
950 fc_host_supported_fc4s(host)[2] = 1; 950 fc_host_supported_fc4s(host)[2] = 1;
951 if (bfad_supported_fc4s | BFA_PORT_ROLE_FCP_IPFC) 951 if (bfad_supported_fc4s & BFA_PORT_ROLE_FCP_IPFC)
952 /* For LLC/SNAP type 0x05 */ 952 /* For LLC/SNAP type 0x05 */
953 fc_host_supported_fc4s(host)[3] = 0x20; 953 fc_host_supported_fc4s(host)[3] = 0x20;
954 /* For fibre channel services type 0x20 */ 954 /* For fibre channel services type 0x20 */
diff --git a/drivers/scsi/dpt_i2o.c b/drivers/scsi/dpt_i2o.c
index b6af63ca980b..496764349c41 100644
--- a/drivers/scsi/dpt_i2o.c
+++ b/drivers/scsi/dpt_i2o.c
@@ -1918,6 +1918,10 @@ static int adpt_i2o_passthru(adpt_hba* pHba, u32 __user *arg)
1918 } 1918 }
1919 size = size>>16; 1919 size = size>>16;
1920 size *= 4; 1920 size *= 4;
1921 if (size > MAX_MESSAGE_SIZE) {
1922 rcode = -EINVAL;
1923 goto cleanup;
1924 }
1921 /* Copy in the user's I2O command */ 1925 /* Copy in the user's I2O command */
1922 if (copy_from_user (msg, user_msg, size)) { 1926 if (copy_from_user (msg, user_msg, size)) {
1923 rcode = -EFAULT; 1927 rcode = -EFAULT;
diff --git a/drivers/scsi/gdth.c b/drivers/scsi/gdth.c
index 185e6bc4dd40..9e8fce0f0c1b 100644
--- a/drivers/scsi/gdth.c
+++ b/drivers/scsi/gdth.c
@@ -2900,7 +2900,7 @@ static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr)
2900 eindex = handle; 2900 eindex = handle;
2901 estr->event_source = 0; 2901 estr->event_source = 0;
2902 2902
2903 if (eindex >= MAX_EVENTS) { 2903 if (eindex < 0 || eindex >= MAX_EVENTS) {
2904 spin_unlock_irqrestore(&ha->smp_lock, flags); 2904 spin_unlock_irqrestore(&ha->smp_lock, flags);
2905 return eindex; 2905 return eindex;
2906 } 2906 }
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c
index 5f045505a1f4..76d294fc7846 100644
--- a/drivers/scsi/ipr.c
+++ b/drivers/scsi/ipr.c
@@ -4189,6 +4189,25 @@ static irqreturn_t ipr_handle_other_interrupt(struct ipr_ioa_cfg *ioa_cfg,
4189} 4189}
4190 4190
4191/** 4191/**
4192 * ipr_isr_eh - Interrupt service routine error handler
4193 * @ioa_cfg: ioa config struct
4194 * @msg: message to log
4195 *
4196 * Return value:
4197 * none
4198 **/
4199static void ipr_isr_eh(struct ipr_ioa_cfg *ioa_cfg, char *msg)
4200{
4201 ioa_cfg->errors_logged++;
4202 dev_err(&ioa_cfg->pdev->dev, "%s\n", msg);
4203
4204 if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
4205 ioa_cfg->sdt_state = GET_DUMP;
4206
4207 ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
4208}
4209
4210/**
4192 * ipr_isr - Interrupt service routine 4211 * ipr_isr - Interrupt service routine
4193 * @irq: irq number 4212 * @irq: irq number
4194 * @devp: pointer to ioa config struct 4213 * @devp: pointer to ioa config struct
@@ -4203,6 +4222,7 @@ static irqreturn_t ipr_isr(int irq, void *devp)
4203 volatile u32 int_reg, int_mask_reg; 4222 volatile u32 int_reg, int_mask_reg;
4204 u32 ioasc; 4223 u32 ioasc;
4205 u16 cmd_index; 4224 u16 cmd_index;
4225 int num_hrrq = 0;
4206 struct ipr_cmnd *ipr_cmd; 4226 struct ipr_cmnd *ipr_cmd;
4207 irqreturn_t rc = IRQ_NONE; 4227 irqreturn_t rc = IRQ_NONE;
4208 4228
@@ -4233,13 +4253,7 @@ static irqreturn_t ipr_isr(int irq, void *devp)
4233 IPR_HRRQ_REQ_RESP_HANDLE_MASK) >> IPR_HRRQ_REQ_RESP_HANDLE_SHIFT; 4253 IPR_HRRQ_REQ_RESP_HANDLE_MASK) >> IPR_HRRQ_REQ_RESP_HANDLE_SHIFT;
4234 4254
4235 if (unlikely(cmd_index >= IPR_NUM_CMD_BLKS)) { 4255 if (unlikely(cmd_index >= IPR_NUM_CMD_BLKS)) {
4236 ioa_cfg->errors_logged++; 4256 ipr_isr_eh(ioa_cfg, "Invalid response handle from IOA");
4237 dev_err(&ioa_cfg->pdev->dev, "Invalid response handle from IOA\n");
4238
4239 if (WAIT_FOR_DUMP == ioa_cfg->sdt_state)
4240 ioa_cfg->sdt_state = GET_DUMP;
4241
4242 ipr_initiate_ioa_reset(ioa_cfg, IPR_SHUTDOWN_NONE);
4243 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags); 4257 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
4244 return IRQ_HANDLED; 4258 return IRQ_HANDLED;
4245 } 4259 }
@@ -4266,8 +4280,18 @@ static irqreturn_t ipr_isr(int irq, void *devp)
4266 4280
4267 if (ipr_cmd != NULL) { 4281 if (ipr_cmd != NULL) {
4268 /* Clear the PCI interrupt */ 4282 /* Clear the PCI interrupt */
4269 writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg); 4283 do {
4270 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg; 4284 writel(IPR_PCII_HRRQ_UPDATED, ioa_cfg->regs.clr_interrupt_reg);
4285 int_reg = readl(ioa_cfg->regs.sense_interrupt_reg) & ~int_mask_reg;
4286 } while (int_reg & IPR_PCII_HRRQ_UPDATED &&
4287 num_hrrq++ < IPR_MAX_HRRQ_RETRIES);
4288
4289 if (int_reg & IPR_PCII_HRRQ_UPDATED) {
4290 ipr_isr_eh(ioa_cfg, "Error clearing HRRQ");
4291 spin_unlock_irqrestore(ioa_cfg->host->host_lock, lock_flags);
4292 return IRQ_HANDLED;
4293 }
4294
4271 } else 4295 } else
4272 break; 4296 break;
4273 } 4297 }
diff --git a/drivers/scsi/ipr.h b/drivers/scsi/ipr.h
index 163245a1c3e5..19bbcf39f0c9 100644
--- a/drivers/scsi/ipr.h
+++ b/drivers/scsi/ipr.h
@@ -144,6 +144,7 @@
144#define IPR_IOA_MAX_SECTORS 32767 144#define IPR_IOA_MAX_SECTORS 32767
145#define IPR_VSET_MAX_SECTORS 512 145#define IPR_VSET_MAX_SECTORS 512
146#define IPR_MAX_CDB_LEN 16 146#define IPR_MAX_CDB_LEN 16
147#define IPR_MAX_HRRQ_RETRIES 3
147 148
148#define IPR_DEFAULT_BUS_WIDTH 16 149#define IPR_DEFAULT_BUS_WIDTH 16
149#define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8)) 150#define IPR_80MBs_SCSI_RATE ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
diff --git a/drivers/scsi/libsas/sas_expander.c b/drivers/scsi/libsas/sas_expander.c
index b3381959acce..33cf988c8c8a 100644
--- a/drivers/scsi/libsas/sas_expander.c
+++ b/drivers/scsi/libsas/sas_expander.c
@@ -960,7 +960,6 @@ static int sas_ex_discover_dev(struct domain_device *dev, int phy_id)
960 960
961 } 961 }
962 } 962 }
963 res = 0;
964 } 963 }
965 964
966 return res; 965 return res;
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index f7c70e2a8224..0a97bc9074bb 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -1071,7 +1071,7 @@ static struct pmcraid_cmd *pmcraid_init_hcam
1071 1071
1072 ioarcb->data_transfer_length = cpu_to_le32(rcb_size); 1072 ioarcb->data_transfer_length = cpu_to_le32(rcb_size);
1073 1073
1074 ioadl[0].flags |= cpu_to_le32(IOADL_FLAGS_READ_LAST); 1074 ioadl[0].flags |= IOADL_FLAGS_READ_LAST;
1075 ioadl[0].data_len = cpu_to_le32(rcb_size); 1075 ioadl[0].data_len = cpu_to_le32(rcb_size);
1076 ioadl[0].address = cpu_to_le32(dma); 1076 ioadl[0].address = cpu_to_le32(dma);
1077 1077
@@ -2251,7 +2251,7 @@ static void pmcraid_request_sense(struct pmcraid_cmd *cmd)
2251 2251
2252 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma); 2252 ioadl->address = cpu_to_le64(cmd->sense_buffer_dma);
2253 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE); 2253 ioadl->data_len = cpu_to_le32(SCSI_SENSE_BUFFERSIZE);
2254 ioadl->flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); 2254 ioadl->flags = IOADL_FLAGS_LAST_DESC;
2255 2255
2256 /* request sense might be called as part of error response processing 2256 /* request sense might be called as part of error response processing
2257 * which runs in tasklets context. It is possible that mid-layer might 2257 * which runs in tasklets context. It is possible that mid-layer might
@@ -3017,7 +3017,7 @@ static int pmcraid_build_ioadl(
3017 ioadl[i].flags = 0; 3017 ioadl[i].flags = 0;
3018 } 3018 }
3019 /* setup last descriptor */ 3019 /* setup last descriptor */
3020 ioadl[i - 1].flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); 3020 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3021 3021
3022 return 0; 3022 return 0;
3023} 3023}
@@ -3387,7 +3387,7 @@ static int pmcraid_build_passthrough_ioadls(
3387 } 3387 }
3388 3388
3389 /* setup the last descriptor */ 3389 /* setup the last descriptor */
3390 ioadl[i - 1].flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); 3390 ioadl[i - 1].flags = IOADL_FLAGS_LAST_DESC;
3391 3391
3392 return 0; 3392 return 0;
3393} 3393}
@@ -5314,7 +5314,7 @@ static void pmcraid_querycfg(struct pmcraid_cmd *cmd)
5314 cpu_to_le32(sizeof(struct pmcraid_config_table)); 5314 cpu_to_le32(sizeof(struct pmcraid_config_table));
5315 5315
5316 ioadl = &(ioarcb->add_data.u.ioadl[0]); 5316 ioadl = &(ioarcb->add_data.u.ioadl[0]);
5317 ioadl->flags = cpu_to_le32(IOADL_FLAGS_LAST_DESC); 5317 ioadl->flags = IOADL_FLAGS_LAST_DESC;
5318 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr); 5318 ioadl->address = cpu_to_le64(pinstance->cfg_table_bus_addr);
5319 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table)); 5319 ioadl->data_len = cpu_to_le32(sizeof(struct pmcraid_config_table));
5320 5320
diff --git a/drivers/scsi/scsi_scan.c b/drivers/scsi/scsi_scan.c
index c44783801402..0547a7f44d42 100644
--- a/drivers/scsi/scsi_scan.c
+++ b/drivers/scsi/scsi_scan.c
@@ -317,6 +317,7 @@ static struct scsi_device *scsi_alloc_sdev(struct scsi_target *starget,
317out_device_destroy: 317out_device_destroy:
318 scsi_device_set_state(sdev, SDEV_DEL); 318 scsi_device_set_state(sdev, SDEV_DEL);
319 transport_destroy_device(&sdev->sdev_gendev); 319 transport_destroy_device(&sdev->sdev_gendev);
320 put_device(&sdev->sdev_dev);
320 put_device(&sdev->sdev_gendev); 321 put_device(&sdev->sdev_gendev);
321out: 322out:
322 if (display_failure_msg) 323 if (display_failure_msg)
@@ -957,6 +958,7 @@ static inline void scsi_destroy_sdev(struct scsi_device *sdev)
957 if (sdev->host->hostt->slave_destroy) 958 if (sdev->host->hostt->slave_destroy)
958 sdev->host->hostt->slave_destroy(sdev); 959 sdev->host->hostt->slave_destroy(sdev);
959 transport_destroy_device(&sdev->sdev_gendev); 960 transport_destroy_device(&sdev->sdev_gendev);
961 put_device(&sdev->sdev_dev);
960 put_device(&sdev->sdev_gendev); 962 put_device(&sdev->sdev_gendev);
961} 963}
962 964
diff --git a/drivers/scsi/scsi_sysfs.c b/drivers/scsi/scsi_sysfs.c
index fde54537d715..5c7eb63a19d1 100644
--- a/drivers/scsi/scsi_sysfs.c
+++ b/drivers/scsi/scsi_sysfs.c
@@ -864,10 +864,6 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
864 goto clean_device; 864 goto clean_device;
865 } 865 }
866 866
867 /* take a reference for the sdev_dev; this is
868 * released by the sdev_class .release */
869 get_device(&sdev->sdev_gendev);
870
871 /* create queue files, which may be writable, depending on the host */ 867 /* create queue files, which may be writable, depending on the host */
872 if (sdev->host->hostt->change_queue_depth) 868 if (sdev->host->hostt->change_queue_depth)
873 error = device_create_file(&sdev->sdev_gendev, &sdev_attr_queue_depth_rw); 869 error = device_create_file(&sdev->sdev_gendev, &sdev_attr_queue_depth_rw);
@@ -917,6 +913,7 @@ int scsi_sysfs_add_sdev(struct scsi_device *sdev)
917 913
918 device_del(&sdev->sdev_gendev); 914 device_del(&sdev->sdev_gendev);
919 transport_destroy_device(&sdev->sdev_gendev); 915 transport_destroy_device(&sdev->sdev_gendev);
916 put_device(&sdev->sdev_dev);
920 put_device(&sdev->sdev_gendev); 917 put_device(&sdev->sdev_gendev);
921 918
922 return error; 919 return error;
@@ -1065,7 +1062,7 @@ void scsi_sysfs_device_initialize(struct scsi_device *sdev)
1065 sdev->host->host_no, sdev->channel, sdev->id, sdev->lun); 1062 sdev->host->host_no, sdev->channel, sdev->id, sdev->lun);
1066 1063
1067 device_initialize(&sdev->sdev_dev); 1064 device_initialize(&sdev->sdev_dev);
1068 sdev->sdev_dev.parent = &sdev->sdev_gendev; 1065 sdev->sdev_dev.parent = get_device(&sdev->sdev_gendev);
1069 sdev->sdev_dev.class = &sdev_class; 1066 sdev->sdev_dev.class = &sdev_class;
1070 dev_set_name(&sdev->sdev_dev, "%d:%d:%d:%d", 1067 dev_set_name(&sdev->sdev_dev, "%d:%d:%d:%d",
1071 sdev->host->host_no, sdev->channel, sdev->id, sdev->lun); 1068 sdev->host->host_no, sdev->channel, sdev->id, sdev->lun);
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c
index a67fed10598a..c6f70dae9b2e 100644
--- a/drivers/scsi/scsi_transport_fc.c
+++ b/drivers/scsi/scsi_transport_fc.c
@@ -3656,6 +3656,7 @@ fc_bsg_host_dispatch(struct request_queue *q, struct Scsi_Host *shost,
3656fail_host_msg: 3656fail_host_msg:
3657 /* return the errno failure code as the only status */ 3657 /* return the errno failure code as the only status */
3658 BUG_ON(job->reply_len < sizeof(uint32_t)); 3658 BUG_ON(job->reply_len < sizeof(uint32_t));
3659 job->reply->reply_payload_rcv_len = 0;
3659 job->reply->result = ret; 3660 job->reply->result = ret;
3660 job->reply_len = sizeof(uint32_t); 3661 job->reply_len = sizeof(uint32_t);
3661 fc_bsg_jobdone(job); 3662 fc_bsg_jobdone(job);
@@ -3741,6 +3742,7 @@ check_bidi:
3741fail_rport_msg: 3742fail_rport_msg:
3742 /* return the errno failure code as the only status */ 3743 /* return the errno failure code as the only status */
3743 BUG_ON(job->reply_len < sizeof(uint32_t)); 3744 BUG_ON(job->reply_len < sizeof(uint32_t));
3745 job->reply->reply_payload_rcv_len = 0;
3744 job->reply->result = ret; 3746 job->reply->result = ret;
3745 job->reply_len = sizeof(uint32_t); 3747 job->reply_len = sizeof(uint32_t);
3746 fc_bsg_jobdone(job); 3748 fc_bsg_jobdone(job);
@@ -3797,6 +3799,7 @@ fc_bsg_request_handler(struct request_queue *q, struct Scsi_Host *shost,
3797 /* check if we have the msgcode value at least */ 3799 /* check if we have the msgcode value at least */
3798 if (job->request_len < sizeof(uint32_t)) { 3800 if (job->request_len < sizeof(uint32_t)) {
3799 BUG_ON(job->reply_len < sizeof(uint32_t)); 3801 BUG_ON(job->reply_len < sizeof(uint32_t));
3802 job->reply->reply_payload_rcv_len = 0;
3800 job->reply->result = -ENOMSG; 3803 job->reply->result = -ENOMSG;
3801 job->reply_len = sizeof(uint32_t); 3804 job->reply_len = sizeof(uint32_t);
3802 fc_bsg_jobdone(job); 3805 fc_bsg_jobdone(job);
diff --git a/drivers/serial/8250.c b/drivers/serial/8250.c
index b1ae774016f1..737b4c960971 100644
--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -1089,7 +1089,7 @@ static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1089 if (!up->port.iobase && !up->port.mapbase && !up->port.membase) 1089 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
1090 return; 1090 return;
1091 1091
1092 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ", 1092 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1093 serial_index(&up->port), up->port.iobase, up->port.membase); 1093 serial_index(&up->port), up->port.iobase, up->port.membase);
1094 1094
1095 /* 1095 /*
diff --git a/drivers/serial/8250_pci.c b/drivers/serial/8250_pci.c
index e7108e75653d..b28af13c45a1 100644
--- a/drivers/serial/8250_pci.c
+++ b/drivers/serial/8250_pci.c
@@ -1561,11 +1561,16 @@ enum pci_board_num_t {
1561 pbn_exar_XR17C152, 1561 pbn_exar_XR17C152,
1562 pbn_exar_XR17C154, 1562 pbn_exar_XR17C154,
1563 pbn_exar_XR17C158, 1563 pbn_exar_XR17C158,
1564 pbn_exar_ibm_saturn,
1564 pbn_pasemi_1682M, 1565 pbn_pasemi_1682M,
1565 pbn_ni8430_2, 1566 pbn_ni8430_2,
1566 pbn_ni8430_4, 1567 pbn_ni8430_4,
1567 pbn_ni8430_8, 1568 pbn_ni8430_8,
1568 pbn_ni8430_16, 1569 pbn_ni8430_16,
1570 pbn_ADDIDATA_PCIe_1_3906250,
1571 pbn_ADDIDATA_PCIe_2_3906250,
1572 pbn_ADDIDATA_PCIe_4_3906250,
1573 pbn_ADDIDATA_PCIe_8_3906250,
1569}; 1574};
1570 1575
1571/* 1576/*
@@ -2146,6 +2151,13 @@ static struct pciserial_board pci_boards[] __devinitdata = {
2146 .base_baud = 921600, 2151 .base_baud = 921600,
2147 .uart_offset = 0x200, 2152 .uart_offset = 0x200,
2148 }, 2153 },
2154 [pbn_exar_ibm_saturn] = {
2155 .flags = FL_BASE0,
2156 .num_ports = 1,
2157 .base_baud = 921600,
2158 .uart_offset = 0x200,
2159 },
2160
2149 /* 2161 /*
2150 * PA Semi PWRficient PA6T-1682M on-chip UART 2162 * PA Semi PWRficient PA6T-1682M on-chip UART
2151 */ 2163 */
@@ -2185,6 +2197,37 @@ static struct pciserial_board pci_boards[] __devinitdata = {
2185 .uart_offset = 0x10, 2197 .uart_offset = 0x10,
2186 .first_offset = 0x800, 2198 .first_offset = 0x800,
2187 }, 2199 },
2200 /*
2201 * ADDI-DATA GmbH PCI-Express communication cards <info@addi-data.com>
2202 */
2203 [pbn_ADDIDATA_PCIe_1_3906250] = {
2204 .flags = FL_BASE0,
2205 .num_ports = 1,
2206 .base_baud = 3906250,
2207 .uart_offset = 0x200,
2208 .first_offset = 0x1000,
2209 },
2210 [pbn_ADDIDATA_PCIe_2_3906250] = {
2211 .flags = FL_BASE0,
2212 .num_ports = 2,
2213 .base_baud = 3906250,
2214 .uart_offset = 0x200,
2215 .first_offset = 0x1000,
2216 },
2217 [pbn_ADDIDATA_PCIe_4_3906250] = {
2218 .flags = FL_BASE0,
2219 .num_ports = 4,
2220 .base_baud = 3906250,
2221 .uart_offset = 0x200,
2222 .first_offset = 0x1000,
2223 },
2224 [pbn_ADDIDATA_PCIe_8_3906250] = {
2225 .flags = FL_BASE0,
2226 .num_ports = 8,
2227 .base_baud = 3906250,
2228 .uart_offset = 0x200,
2229 .first_offset = 0x1000,
2230 },
2188}; 2231};
2189 2232
2190static const struct pci_device_id softmodem_blacklist[] = { 2233static const struct pci_device_id softmodem_blacklist[] = {
@@ -2340,7 +2383,7 @@ pciserial_init_ports(struct pci_dev *dev, const struct pciserial_board *board)
2340 break; 2383 break;
2341 2384
2342#ifdef SERIAL_DEBUG_PCI 2385#ifdef SERIAL_DEBUG_PCI
2343 printk(KERN_DEBUG "Setup PCI port: port %x, irq %d, type %d\n", 2386 printk(KERN_DEBUG "Setup PCI port: port %lx, irq %d, type %d\n",
2344 serial_port.iobase, serial_port.irq, serial_port.iotype); 2387 serial_port.iobase, serial_port.irq, serial_port.iotype);
2345#endif 2388#endif
2346 2389
@@ -2649,6 +2692,9 @@ static struct pci_device_id serial_pci_tbl[] = {
2649 PCI_SUBVENDOR_ID_CONNECT_TECH, 2692 PCI_SUBVENDOR_ID_CONNECT_TECH,
2650 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0, 2693 PCI_SUBDEVICE_ID_CONNECT_TECH_PCI_UART_8_485, 0, 0,
2651 pbn_b0_8_1843200_200 }, 2694 pbn_b0_8_1843200_200 },
2695 { PCI_VENDOR_ID_EXAR, PCI_DEVICE_ID_EXAR_XR17C152,
2696 PCI_VENDOR_ID_IBM, PCI_SUBDEVICE_ID_IBM_SATURN_SERIAL_ONE_PORT,
2697 0, 0, pbn_exar_ibm_saturn },
2652 2698
2653 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530, 2699 { PCI_VENDOR_ID_SEALEVEL, PCI_DEVICE_ID_SEALEVEL_U530,
2654 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 2700 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
@@ -3093,6 +3139,12 @@ static struct pci_device_id serial_pci_tbl[] = {
3093 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B, 3139 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATRO_B,
3094 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3140 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3095 pbn_b0_bt_2_115200 }, 3141 pbn_b0_bt_2_115200 },
3142 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_A,
3143 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3144 pbn_b0_bt_2_115200 },
3145 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_QUATTRO_B,
3146 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3147 pbn_b0_bt_2_115200 },
3096 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A, 3148 { PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_OCTO_A,
3097 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 3149 PCI_ANY_ID, PCI_ANY_ID, 0, 0,
3098 pbn_b0_bt_4_460800 }, 3150 pbn_b0_bt_4_460800 },
@@ -3556,6 +3608,38 @@ static struct pci_device_id serial_pci_tbl[] = {
3556 0, 3608 0,
3557 pbn_b0_8_115200 }, 3609 pbn_b0_8_115200 },
3558 3610
3611 { PCI_VENDOR_ID_ADDIDATA,
3612 PCI_DEVICE_ID_ADDIDATA_APCIe7500,
3613 PCI_ANY_ID,
3614 PCI_ANY_ID,
3615 0,
3616 0,
3617 pbn_ADDIDATA_PCIe_4_3906250 },
3618
3619 { PCI_VENDOR_ID_ADDIDATA,
3620 PCI_DEVICE_ID_ADDIDATA_APCIe7420,
3621 PCI_ANY_ID,
3622 PCI_ANY_ID,
3623 0,
3624 0,
3625 pbn_ADDIDATA_PCIe_2_3906250 },
3626
3627 { PCI_VENDOR_ID_ADDIDATA,
3628 PCI_DEVICE_ID_ADDIDATA_APCIe7300,
3629 PCI_ANY_ID,
3630 PCI_ANY_ID,
3631 0,
3632 0,
3633 pbn_ADDIDATA_PCIe_1_3906250 },
3634
3635 { PCI_VENDOR_ID_ADDIDATA,
3636 PCI_DEVICE_ID_ADDIDATA_APCIe7800,
3637 PCI_ANY_ID,
3638 PCI_ANY_ID,
3639 0,
3640 0,
3641 pbn_ADDIDATA_PCIe_8_3906250 },
3642
3559 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835, 3643 { PCI_VENDOR_ID_NETMOS, PCI_DEVICE_ID_NETMOS_9835,
3560 PCI_VENDOR_ID_IBM, 0x0299, 3644 PCI_VENDOR_ID_IBM, 0x0299,
3561 0, 0, pbn_b0_bt_2_115200 }, 3645 0, 0, pbn_b0_bt_2_115200 },
diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c
index 3551c5cb7094..9d948bccafaf 100644
--- a/drivers/serial/atmel_serial.c
+++ b/drivers/serial/atmel_serial.c
@@ -1531,7 +1531,7 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev)
1531 void *data; 1531 void *data;
1532 int ret; 1532 int ret;
1533 1533
1534 BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE)); 1534 BUILD_BUG_ON(ATMEL_SERIAL_RINGSIZE & (ATMEL_SERIAL_RINGSIZE - 1));
1535 1535
1536 port = &atmel_ports[pdev->id]; 1536 port = &atmel_ports[pdev->id];
1537 port->backup_imr = 0; 1537 port->backup_imr = 0;
diff --git a/drivers/serial/serial_core.c b/drivers/serial/serial_core.c
index 1689bda1d13b..dcc72444e8e7 100644
--- a/drivers/serial/serial_core.c
+++ b/drivers/serial/serial_core.c
@@ -1270,6 +1270,9 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1270 1270
1271 BUG_ON(!kernel_locked()); 1271 BUG_ON(!kernel_locked());
1272 1272
1273 if (!state)
1274 return;
1275
1273 uport = state->uart_port; 1276 uport = state->uart_port;
1274 port = &state->port; 1277 port = &state->port;
1275 1278
@@ -1316,9 +1319,9 @@ static void uart_close(struct tty_struct *tty, struct file *filp)
1316 */ 1319 */
1317 if (port->flags & ASYNC_INITIALIZED) { 1320 if (port->flags & ASYNC_INITIALIZED) {
1318 unsigned long flags; 1321 unsigned long flags;
1319 spin_lock_irqsave(&port->lock, flags); 1322 spin_lock_irqsave(&uport->lock, flags);
1320 uport->ops->stop_rx(uport); 1323 uport->ops->stop_rx(uport);
1321 spin_unlock_irqrestore(&port->lock, flags); 1324 spin_unlock_irqrestore(&uport->lock, flags);
1322 /* 1325 /*
1323 * Before we drop DTR, make sure the UART transmitter 1326 * Before we drop DTR, make sure the UART transmitter
1324 * has completely drained; this is especially 1327 * has completely drained; this is especially
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c
index ff4617e21426..7c7914f5fa02 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/serial/serial_cs.c
@@ -879,10 +879,10 @@ static struct pcmcia_device_id serial_ids[] = {
879 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0175, 0x0000, "cis/DP83903.cis"), 879 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0175, 0x0000, "cis/DP83903.cis"),
880 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"), 880 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"),
881 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"), 881 PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"),
882 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */ 882 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */
883 PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0x0710, "SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */ 883 PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC710/AC750", 0xd85f6206, 0x761b11e0, "cis/SW_7xx_SER.cis"), /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */
884 PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */ 884 PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */
885 PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */ 885 PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "cis/SW_555_SER.cis"), /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */
886 PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"), 886 PCMCIA_DEVICE_CIS_PROD_ID12("MultiTech", "PCMCIA 56K DataFax", 0x842047ee, 0xc2efcf03, "cis/MT5634ZLX.cis"),
887 PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "cis/COMpad2.cis"), 887 PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-2", 0x96913a85, 0x27ab5437, "cis/COMpad2.cis"),
888 PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"), 888 PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"),
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 85119fb7cb50..6498bd1fb6dd 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -1143,7 +1143,7 @@ static void serial_console_write(struct console *co, const char *s,
1143 while ((sci_in(port, SCxSR) & bits) != bits) 1143 while ((sci_in(port, SCxSR) & bits) != bits)
1144 cpu_relax(); 1144 cpu_relax();
1145 1145
1146 if (sci_port->disable); 1146 if (sci_port->disable)
1147 sci_port->disable(port); 1147 sci_port->disable(port);
1148} 1148}
1149 1149
diff --git a/drivers/spi/amba-pl022.c b/drivers/spi/amba-pl022.c
index 958a3ffc8987..ff5bbb9c43c9 100644
--- a/drivers/spi/amba-pl022.c
+++ b/drivers/spi/amba-pl022.c
@@ -1826,7 +1826,7 @@ static struct amba_id pl022_ids[] = {
1826 * ST Micro derivative, this has 32bit wide 1826 * ST Micro derivative, this has 32bit wide
1827 * and 32 locations deep TX/RX FIFO 1827 * and 32 locations deep TX/RX FIFO
1828 */ 1828 */
1829 .id = 0x00108022, 1829 .id = 0x01080022,
1830 .mask = 0xffffffff, 1830 .mask = 0xffffffff,
1831 .data = &vendor_st, 1831 .data = &vendor_st,
1832 }, 1832 },
diff --git a/drivers/spi/spi_stmp.c b/drivers/spi/spi_stmp.c
index d871dc23909c..2552bb364005 100644
--- a/drivers/spi/spi_stmp.c
+++ b/drivers/spi/spi_stmp.c
@@ -242,7 +242,7 @@ static int stmp_spi_txrx_dma(struct stmp_spi *ss, int cs,
242 wait_for_completion(&ss->done); 242 wait_for_completion(&ss->done);
243 243
244 if (!busy_wait(readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN)) 244 if (!busy_wait(readl(ss->regs + HW_SSP_CTRL0) & BM_SSP_CTRL0_RUN))
245 status = ETIMEDOUT; 245 status = -ETIMEDOUT;
246 246
247 if (!dma_buf) 247 if (!dma_buf)
248 dma_unmap_single(ss->master_dev, spi_buf_dma, len, dir); 248 dma_unmap_single(ss->master_dev, spi_buf_dma, len, dir);
diff --git a/drivers/ssb/scan.c b/drivers/ssb/scan.c
index b74212d698c7..e8b89e8ac9bd 100644
--- a/drivers/ssb/scan.c
+++ b/drivers/ssb/scan.c
@@ -162,6 +162,8 @@ static u8 chipid_to_nrcores(u16 chipid)
162static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx, 162static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
163 u16 offset) 163 u16 offset)
164{ 164{
165 u32 lo, hi;
166
165 switch (bus->bustype) { 167 switch (bus->bustype) {
166 case SSB_BUSTYPE_SSB: 168 case SSB_BUSTYPE_SSB:
167 offset += current_coreidx * SSB_CORE_SIZE; 169 offset += current_coreidx * SSB_CORE_SIZE;
@@ -174,7 +176,9 @@ static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
174 offset -= 0x800; 176 offset -= 0x800;
175 } else 177 } else
176 ssb_pcmcia_switch_segment(bus, 0); 178 ssb_pcmcia_switch_segment(bus, 0);
177 break; 179 lo = readw(bus->mmio + offset);
180 hi = readw(bus->mmio + offset + 2);
181 return lo | (hi << 16);
178 case SSB_BUSTYPE_SDIO: 182 case SSB_BUSTYPE_SDIO:
179 offset += current_coreidx * SSB_CORE_SIZE; 183 offset += current_coreidx * SSB_CORE_SIZE;
180 return ssb_sdio_scan_read32(bus, offset); 184 return ssb_sdio_scan_read32(bus, offset);
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index 7df3ba4f1f4d..d21b3469f6d7 100644
--- a/drivers/staging/Kconfig
+++ b/drivers/staging/Kconfig
@@ -93,8 +93,6 @@ source "drivers/staging/dst/Kconfig"
93 93
94source "drivers/staging/pohmelfs/Kconfig" 94source "drivers/staging/pohmelfs/Kconfig"
95 95
96source "drivers/staging/stlc45xx/Kconfig"
97
98source "drivers/staging/b3dfg/Kconfig" 96source "drivers/staging/b3dfg/Kconfig"
99 97
100source "drivers/staging/phison/Kconfig" 98source "drivers/staging/phison/Kconfig"
diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile
index 747571172269..8cbf1aebea2e 100644
--- a/drivers/staging/Makefile
+++ b/drivers/staging/Makefile
@@ -29,7 +29,6 @@ obj-$(CONFIG_ANDROID) += android/
29obj-$(CONFIG_ANDROID) += dream/ 29obj-$(CONFIG_ANDROID) += dream/
30obj-$(CONFIG_DST) += dst/ 30obj-$(CONFIG_DST) += dst/
31obj-$(CONFIG_POHMELFS) += pohmelfs/ 31obj-$(CONFIG_POHMELFS) += pohmelfs/
32obj-$(CONFIG_STLC45XX) += stlc45xx/
33obj-$(CONFIG_B3DFG) += b3dfg/ 32obj-$(CONFIG_B3DFG) += b3dfg/
34obj-$(CONFIG_IDE_PHISON) += phison/ 33obj-$(CONFIG_IDE_PHISON) += phison/
35obj-$(CONFIG_PLAN9AUTH) += p9auth/ 34obj-$(CONFIG_PLAN9AUTH) += p9auth/
diff --git a/drivers/staging/android/Kconfig b/drivers/staging/android/Kconfig
index 247194992374..eb675635ae60 100644
--- a/drivers/staging/android/Kconfig
+++ b/drivers/staging/android/Kconfig
@@ -2,6 +2,7 @@ menu "Android"
2 2
3config ANDROID 3config ANDROID
4 bool "Android Drivers" 4 bool "Android Drivers"
5 depends on BROKEN
5 default N 6 default N
6 ---help--- 7 ---help---
7 Enable support for various drivers needed on the Android platform 8 Enable support for various drivers needed on the Android platform
diff --git a/drivers/staging/b3dfg/b3dfg.c b/drivers/staging/b3dfg/b3dfg.c
index 94c5d27d24d7..cda26bb493b3 100644
--- a/drivers/staging/b3dfg/b3dfg.c
+++ b/drivers/staging/b3dfg/b3dfg.c
@@ -36,6 +36,7 @@
36#include <linux/wait.h> 36#include <linux/wait.h>
37#include <linux/mm.h> 37#include <linux/mm.h>
38#include <linux/uaccess.h> 38#include <linux/uaccess.h>
39#include <linux/sched.h>
39 40
40static unsigned int b3dfg_nbuf = 2; 41static unsigned int b3dfg_nbuf = 2;
41 42
diff --git a/drivers/staging/comedi/drivers/me_daq.c b/drivers/staging/comedi/drivers/me_daq.c
index 2cda7ad1d32f..80e192d2e77e 100644
--- a/drivers/staging/comedi/drivers/me_daq.c
+++ b/drivers/staging/comedi/drivers/me_daq.c
@@ -51,6 +51,7 @@ from http://www.comedi.org
51*/ 51*/
52 52
53#include <linux/interrupt.h> 53#include <linux/interrupt.h>
54#include <linux/sched.h>
54#include "../comedidev.h" 55#include "../comedidev.h"
55 56
56#include "comedi_pci.h" 57#include "comedi_pci.h"
diff --git a/drivers/staging/comedi/drivers/ni_mio_common.c b/drivers/staging/comedi/drivers/ni_mio_common.c
index e3ffb067ead1..753ee0512342 100644
--- a/drivers/staging/comedi/drivers/ni_mio_common.c
+++ b/drivers/staging/comedi/drivers/ni_mio_common.c
@@ -62,6 +62,7 @@
62/* #define DEBUG_STATUS_B */ 62/* #define DEBUG_STATUS_B */
63 63
64#include <linux/interrupt.h> 64#include <linux/interrupt.h>
65#include <linux/sched.h>
65#include "8255.h" 66#include "8255.h"
66#include "mite.h" 67#include "mite.h"
67#include "comedi_fc.h" 68#include "comedi_fc.h"
diff --git a/drivers/staging/comedi/drivers/ni_pcidio.c b/drivers/staging/comedi/drivers/ni_pcidio.c
index 52b2eca9e73d..d544698f2414 100644
--- a/drivers/staging/comedi/drivers/ni_pcidio.c
+++ b/drivers/staging/comedi/drivers/ni_pcidio.c
@@ -70,6 +70,7 @@ comedi_nonfree_firmware tarball available from http://www.comedi.org
70/* #define DEBUG_FLAGS */ 70/* #define DEBUG_FLAGS */
71 71
72#include <linux/interrupt.h> 72#include <linux/interrupt.h>
73#include <linux/sched.h>
73#include "../comedidev.h" 74#include "../comedidev.h"
74 75
75#include "mite.h" 76#include "mite.h"
diff --git a/drivers/staging/et131x/et1310_address_map.h b/drivers/staging/et131x/et1310_address_map.h
index 6294d3814e72..2c3d65a622a7 100644
--- a/drivers/staging/et131x/et1310_address_map.h
+++ b/drivers/staging/et131x/et1310_address_map.h
@@ -223,7 +223,7 @@ typedef union _TXDMA_PR_NUM_DES_t {
223 223
224extern inline void add_10bit(u32 *v, int n) 224extern inline void add_10bit(u32 *v, int n)
225{ 225{
226 *v = INDEX10(*v + n); 226 *v = INDEX10(*v + n) | (*v & ET_DMA10_WRAP);
227} 227}
228 228
229/* 229/*
diff --git a/drivers/staging/et131x/et1310_rx.c b/drivers/staging/et131x/et1310_rx.c
index 8f2e91fa0a86..10e21db57ac3 100644
--- a/drivers/staging/et131x/et1310_rx.c
+++ b/drivers/staging/et131x/et1310_rx.c
@@ -1177,12 +1177,20 @@ void et131x_handle_recv_interrupt(struct et131x_adapter *etdev)
1177 1177
1178static inline u32 bump_fbr(u32 *fbr, u32 limit) 1178static inline u32 bump_fbr(u32 *fbr, u32 limit)
1179{ 1179{
1180 u32 v = *fbr; 1180 u32 v = *fbr;
1181 add_10bit(&v, 1); 1181 v++;
1182 if (v > limit) 1182 /* This works for all cases where limit < 1024. The 1023 case
1183 v = (*fbr & ~ET_DMA10_MASK) ^ ET_DMA10_WRAP; 1183 works because 1023++ is 1024 which means the if condition is not
1184 *fbr = v; 1184 taken but the carry of the bit into the wrap bit toggles the wrap
1185 return v; 1185 value correctly */
1186 if ((v & ET_DMA10_MASK) > limit) {
1187 v &= ~ET_DMA10_MASK;
1188 v ^= ET_DMA10_WRAP;
1189 }
1190 /* For the 1023 case */
1191 v &= (ET_DMA10_MASK|ET_DMA10_WRAP);
1192 *fbr = v;
1193 return v;
1186} 1194}
1187 1195
1188/** 1196/**
diff --git a/drivers/staging/hv/ChannelMgmt.h b/drivers/staging/hv/ChannelMgmt.h
index a839d8fe6cec..fa973d86b624 100644
--- a/drivers/staging/hv/ChannelMgmt.h
+++ b/drivers/staging/hv/ChannelMgmt.h
@@ -26,6 +26,7 @@
26#define _CHANNEL_MGMT_H_ 26#define _CHANNEL_MGMT_H_
27 27
28#include <linux/list.h> 28#include <linux/list.h>
29#include <linux/timer.h>
29#include "RingBuffer.h" 30#include "RingBuffer.h"
30#include "VmbusChannelInterface.h" 31#include "VmbusChannelInterface.h"
31#include "VmbusPacketFormat.h" 32#include "VmbusPacketFormat.h"
@@ -54,7 +55,7 @@ enum vmbus_channel_message_type {
54 ChannelMessageViewRangeRemove = 18, 55 ChannelMessageViewRangeRemove = 18,
55#endif 56#endif
56 ChannelMessageCount 57 ChannelMessageCount
57} __attribute__((packed)); 58};
58 59
59struct vmbus_channel_message_header { 60struct vmbus_channel_message_header {
60 enum vmbus_channel_message_type MessageType; 61 enum vmbus_channel_message_type MessageType;
diff --git a/drivers/staging/hv/NetVsc.c b/drivers/staging/hv/NetVsc.c
index 1610b845198f..d384c0ddf069 100644
--- a/drivers/staging/hv/NetVsc.c
+++ b/drivers/staging/hv/NetVsc.c
@@ -1052,7 +1052,7 @@ static void NetVscOnReceive(struct hv_device *Device,
1052 */ 1052 */
1053 spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags); 1053 spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags);
1054 while (!list_empty(&netDevice->ReceivePacketList)) { 1054 while (!list_empty(&netDevice->ReceivePacketList)) {
1055 list_move_tail(&netDevice->ReceivePacketList, &listHead); 1055 list_move_tail(netDevice->ReceivePacketList.next, &listHead);
1056 if (++count == vmxferpagePacket->RangeCount + 1) 1056 if (++count == vmxferpagePacket->RangeCount + 1)
1057 break; 1057 break;
1058 } 1058 }
@@ -1071,7 +1071,7 @@ static void NetVscOnReceive(struct hv_device *Device,
1071 /* Return it to the freelist */ 1071 /* Return it to the freelist */
1072 spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags); 1072 spin_lock_irqsave(&netDevice->receive_packet_list_lock, flags);
1073 for (i = count; i != 0; i--) { 1073 for (i = count; i != 0; i--) {
1074 list_move_tail(&listHead, 1074 list_move_tail(listHead.next,
1075 &netDevice->ReceivePacketList); 1075 &netDevice->ReceivePacketList);
1076 } 1076 }
1077 spin_unlock_irqrestore(&netDevice->receive_packet_list_lock, 1077 spin_unlock_irqrestore(&netDevice->receive_packet_list_lock,
@@ -1085,8 +1085,7 @@ static void NetVscOnReceive(struct hv_device *Device,
1085 } 1085 }
1086 1086
1087 /* Remove the 1st packet to represent the xfer page packet itself */ 1087 /* Remove the 1st packet to represent the xfer page packet itself */
1088 xferpagePacket = list_entry(&listHead, struct xferpage_packet, 1088 xferpagePacket = (struct xferpage_packet*)listHead.next;
1089 ListEntry);
1090 list_del(&xferpagePacket->ListEntry); 1089 list_del(&xferpagePacket->ListEntry);
1091 1090
1092 /* This is how much we can satisfy */ 1091 /* This is how much we can satisfy */
@@ -1102,8 +1101,7 @@ static void NetVscOnReceive(struct hv_device *Device,
1102 1101
1103 /* Each range represents 1 RNDIS pkt that contains 1 ethernet frame */ 1102 /* Each range represents 1 RNDIS pkt that contains 1 ethernet frame */
1104 for (i = 0; i < (count - 1); i++) { 1103 for (i = 0; i < (count - 1); i++) {
1105 netvscPacket = list_entry(&listHead, struct hv_netvsc_packet, 1104 netvscPacket = (struct hv_netvsc_packet*)listHead.next;
1106 ListEntry);
1107 list_del(&netvscPacket->ListEntry); 1105 list_del(&netvscPacket->ListEntry);
1108 1106
1109 /* Initialize the netvsc packet */ 1107 /* Initialize the netvsc packet */
diff --git a/drivers/staging/hv/TODO b/drivers/staging/hv/TODO
index 4d390b237742..dbfbde937a66 100644
--- a/drivers/staging/hv/TODO
+++ b/drivers/staging/hv/TODO
@@ -1,11 +1,17 @@
1TODO: 1TODO:
2 - fix remaining checkpatch warnings and errors 2 - fix remaining checkpatch warnings and errors
3 - use of /** when it is not a kerneldoc header
3 - remove RingBuffer.c to us in-kernel ringbuffer functions instead. 4 - remove RingBuffer.c to us in-kernel ringbuffer functions instead.
4 - audit the vmbus to verify it is working properly with the 5 - audit the vmbus to verify it is working properly with the
5 driver model 6 driver model
7 - convert vmbus driver interface function pointer tables
8 to constant, a.k.a vmbus_ops
6 - see if the vmbus can be merged with the other virtual busses 9 - see if the vmbus can be merged with the other virtual busses
7 in the kernel 10 in the kernel
8 - audit the network driver 11 - audit the network driver
12 - use existing net_device_stats struct in network device
13 - checking for carrier inside open is wrong, network device API
14 confusion??
9 - audit the block driver 15 - audit the block driver
10 - audit the scsi driver 16 - audit the scsi driver
11 17
diff --git a/drivers/staging/hv/osd.c b/drivers/staging/hv/osd.c
index 8fe543bd9910..3a4793a0fd05 100644
--- a/drivers/staging/hv/osd.c
+++ b/drivers/staging/hv/osd.c
@@ -30,6 +30,7 @@
30#include <linux/ioport.h> 30#include <linux/ioport.h>
31#include <linux/irq.h> 31#include <linux/irq.h>
32#include <linux/interrupt.h> 32#include <linux/interrupt.h>
33#include <linux/sched.h>
33#include <linux/wait.h> 34#include <linux/wait.h>
34#include <linux/spinlock.h> 35#include <linux/spinlock.h>
35#include <linux/workqueue.h> 36#include <linux/workqueue.h>
diff --git a/drivers/staging/hv/osd.h b/drivers/staging/hv/osd.h
index 9504604c72bd..ce064e8ea644 100644
--- a/drivers/staging/hv/osd.h
+++ b/drivers/staging/hv/osd.h
@@ -25,6 +25,7 @@
25#ifndef _OSD_H_ 25#ifndef _OSD_H_
26#define _OSD_H_ 26#define _OSD_H_
27 27
28#include <linux/workqueue.h>
28 29
29/* Defines */ 30/* Defines */
30#define ALIGN_UP(value, align) (((value) & (align-1)) ? \ 31#define ALIGN_UP(value, align) (((value) & (align-1)) ? \
diff --git a/drivers/staging/hv/vmbus_drv.c b/drivers/staging/hv/vmbus_drv.c
index 582318f10222..894eecfc63ca 100644
--- a/drivers/staging/hv/vmbus_drv.c
+++ b/drivers/staging/hv/vmbus_drv.c
@@ -507,12 +507,12 @@ static struct hv_device *vmbus_child_device_create(struct hv_guid *type,
507 507
508 child_device_obj = &child_device_ctx->device_obj; 508 child_device_obj = &child_device_ctx->device_obj;
509 child_device_obj->context = context; 509 child_device_obj->context = context;
510 memcpy(&child_device_obj->deviceType, &type, sizeof(struct hv_guid)); 510 memcpy(&child_device_obj->deviceType, type, sizeof(struct hv_guid));
511 memcpy(&child_device_obj->deviceInstance, &instance, 511 memcpy(&child_device_obj->deviceInstance, instance,
512 sizeof(struct hv_guid)); 512 sizeof(struct hv_guid));
513 513
514 memcpy(&child_device_ctx->class_id, &type, sizeof(struct hv_guid)); 514 memcpy(&child_device_ctx->class_id, type, sizeof(struct hv_guid));
515 memcpy(&child_device_ctx->device_id, &instance, sizeof(struct hv_guid)); 515 memcpy(&child_device_ctx->device_id, instance, sizeof(struct hv_guid));
516 516
517 DPRINT_EXIT(VMBUS_DRV); 517 DPRINT_EXIT(VMBUS_DRV);
518 518
@@ -537,18 +537,7 @@ static int vmbus_child_device_register(struct hv_device *root_device_obj,
537 DPRINT_DBG(VMBUS_DRV, "child device (%p) registering", 537 DPRINT_DBG(VMBUS_DRV, "child device (%p) registering",
538 child_device_ctx); 538 child_device_ctx);
539 539
540 /* Make sure we are not registered already */ 540 /* Set the device name. Otherwise, device_register() will fail. */
541 if (strlen(dev_name(&child_device_ctx->device)) != 0) {
542 DPRINT_ERR(VMBUS_DRV,
543 "child device (%p) already registered - busid %s",
544 child_device_ctx,
545 dev_name(&child_device_ctx->device));
546
547 ret = -1;
548 goto Cleanup;
549 }
550
551 /* Set the device bus id. Otherwise, device_register()will fail. */
552 dev_set_name(&child_device_ctx->device, "vmbus_0_%d", 541 dev_set_name(&child_device_ctx->device, "vmbus_0_%d",
553 atomic_inc_return(&device_num)); 542 atomic_inc_return(&device_num));
554 543
@@ -573,7 +562,6 @@ static int vmbus_child_device_register(struct hv_device *root_device_obj,
573 DPRINT_INFO(VMBUS_DRV, "child device (%p) registered", 562 DPRINT_INFO(VMBUS_DRV, "child device (%p) registered",
574 &child_device_ctx->device); 563 &child_device_ctx->device);
575 564
576Cleanup:
577 DPRINT_EXIT(VMBUS_DRV); 565 DPRINT_EXIT(VMBUS_DRV);
578 566
579 return ret; 567 return ret;
@@ -623,8 +611,6 @@ static void vmbus_child_device_destroy(struct hv_device *device_obj)
623static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env) 611static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env)
624{ 612{
625 struct device_context *device_ctx = device_to_device_context(device); 613 struct device_context *device_ctx = device_to_device_context(device);
626 int i = 0;
627 int len = 0;
628 int ret; 614 int ret;
629 615
630 DPRINT_ENTER(VMBUS_DRV); 616 DPRINT_ENTER(VMBUS_DRV);
@@ -644,8 +630,6 @@ static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env)
644 device_ctx->class_id.data[14], 630 device_ctx->class_id.data[14],
645 device_ctx->class_id.data[15]); 631 device_ctx->class_id.data[15]);
646 632
647 env->envp_idx = i;
648 env->buflen = len;
649 ret = add_uevent_var(env, "VMBUS_DEVICE_CLASS_GUID={" 633 ret = add_uevent_var(env, "VMBUS_DEVICE_CLASS_GUID={"
650 "%02x%02x%02x%02x-%02x%02x-%02x%02x-" 634 "%02x%02x%02x%02x-%02x%02x-%02x%02x-"
651 "%02x%02x%02x%02x%02x%02x%02x%02x}", 635 "%02x%02x%02x%02x%02x%02x%02x%02x}",
@@ -691,8 +675,6 @@ static int vmbus_uevent(struct device *device, struct kobj_uevent_env *env)
691 if (ret) 675 if (ret)
692 return ret; 676 return ret;
693 677
694 env->envp[env->envp_idx] = NULL;
695
696 DPRINT_EXIT(VMBUS_DRV); 678 DPRINT_EXIT(VMBUS_DRV);
697 679
698 return 0; 680 return 0;
diff --git a/drivers/staging/iio/industrialio-core.c b/drivers/staging/iio/industrialio-core.c
index 1fa18f255814..768f44894d08 100644
--- a/drivers/staging/iio/industrialio-core.c
+++ b/drivers/staging/iio/industrialio-core.c
@@ -18,6 +18,8 @@
18#include <linux/fs.h> 18#include <linux/fs.h>
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20#include <linux/poll.h> 20#include <linux/poll.h>
21#include <linux/sched.h>
22#include <linux/wait.h>
21#include <linux/cdev.h> 23#include <linux/cdev.h>
22#include "iio.h" 24#include "iio.h"
23#include "trigger_consumer.h" 25#include "trigger_consumer.h"
diff --git a/drivers/staging/otus/Kconfig b/drivers/staging/otus/Kconfig
index d549d08fd495..f6cc2625e341 100644
--- a/drivers/staging/otus/Kconfig
+++ b/drivers/staging/otus/Kconfig
@@ -1,6 +1,6 @@
1config OTUS 1config OTUS
2 tristate "Atheros OTUS 802.11n USB wireless support" 2 tristate "Atheros OTUS 802.11n USB wireless support"
3 depends on USB && WLAN_80211 && MAC80211 3 depends on USB && WLAN && MAC80211
4 default N 4 default N
5 ---help--- 5 ---help---
6 Enable support for Atheros 802.11n USB hardware: 6 Enable support for Atheros 802.11n USB hardware:
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c
index dd7d3fde9699..4ce399b6d237 100644
--- a/drivers/staging/panel/panel.c
+++ b/drivers/staging/panel/panel.c
@@ -2071,11 +2071,15 @@ static void panel_detach(struct parport *port)
2071 return; 2071 return;
2072 } 2072 }
2073 2073
2074 if (keypad_enabled && keypad_initialized) 2074 if (keypad_enabled && keypad_initialized) {
2075 misc_deregister(&keypad_dev); 2075 misc_deregister(&keypad_dev);
2076 keypad_initialized = 0;
2077 }
2076 2078
2077 if (lcd_enabled && lcd_initialized) 2079 if (lcd_enabled && lcd_initialized) {
2078 misc_deregister(&lcd_dev); 2080 misc_deregister(&lcd_dev);
2081 lcd_initialized = 0;
2082 }
2079 2083
2080 parport_release(pprt); 2084 parport_release(pprt);
2081 parport_unregister_device(pprt); 2085 parport_unregister_device(pprt);
@@ -2211,13 +2215,16 @@ static void __exit panel_cleanup_module(void)
2211 del_timer(&scan_timer); 2215 del_timer(&scan_timer);
2212 2216
2213 if (pprt != NULL) { 2217 if (pprt != NULL) {
2214 if (keypad_enabled) 2218 if (keypad_enabled) {
2215 misc_deregister(&keypad_dev); 2219 misc_deregister(&keypad_dev);
2220 keypad_initialized = 0;
2221 }
2216 2222
2217 if (lcd_enabled) { 2223 if (lcd_enabled) {
2218 panel_lcd_print("\x0cLCD driver " PANEL_VERSION 2224 panel_lcd_print("\x0cLCD driver " PANEL_VERSION
2219 "\nunloaded.\x1b[Lc\x1b[Lb\x1b[L-"); 2225 "\nunloaded.\x1b[Lc\x1b[Lb\x1b[L-");
2220 misc_deregister(&lcd_dev); 2226 misc_deregister(&lcd_dev);
2227 lcd_initialized = 0;
2221 } 2228 }
2222 2229
2223 /* TODO: free all input signals */ 2230 /* TODO: free all input signals */
diff --git a/drivers/staging/poch/poch.c b/drivers/staging/poch/poch.c
index 0d111ddfabb2..2eb8e3d43c4d 100644
--- a/drivers/staging/poch/poch.c
+++ b/drivers/staging/poch/poch.c
@@ -20,6 +20,7 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/ioctl.h> 21#include <linux/ioctl.h>
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/sched.h>
23 24
24#include "poch.h" 25#include "poch.h"
25 26
diff --git a/drivers/staging/rt2860/Kconfig b/drivers/staging/rt2860/Kconfig
index 7f44e5e72463..efe38e25c5ed 100644
--- a/drivers/staging/rt2860/Kconfig
+++ b/drivers/staging/rt2860/Kconfig
@@ -1,5 +1,5 @@
1config RT2860 1config RT2860
2 tristate "Ralink 2860 wireless support" 2 tristate "Ralink 2860 wireless support"
3 depends on PCI && X86 && WLAN_80211 3 depends on PCI && X86 && WLAN
4 ---help--- 4 ---help---
5 This is an experimental driver for the Ralink 2860 wireless chip. 5 This is an experimental driver for the Ralink 2860 wireless chip.
diff --git a/drivers/staging/rt2860/common/cmm_data_2860.c b/drivers/staging/rt2860/common/cmm_data_2860.c
index fb1735533b74..857ff450b6c9 100644
--- a/drivers/staging/rt2860/common/cmm_data_2860.c
+++ b/drivers/staging/rt2860/common/cmm_data_2860.c
@@ -363,6 +363,8 @@ int RtmpPCIMgmtKickOut(
363 ULONG SwIdx = pAd->MgmtRing.TxCpuIdx; 363 ULONG SwIdx = pAd->MgmtRing.TxCpuIdx;
364 364
365 pTxD = (PTXD_STRUC) pAd->MgmtRing.Cell[SwIdx].AllocVa; 365 pTxD = (PTXD_STRUC) pAd->MgmtRing.Cell[SwIdx].AllocVa;
366 if (!pTxD)
367 return 0;
366 368
367 pAd->MgmtRing.Cell[SwIdx].pNdisPacket = pPacket; 369 pAd->MgmtRing.Cell[SwIdx].pNdisPacket = pPacket;
368 pAd->MgmtRing.Cell[SwIdx].pNextNdisPacket = NULL; 370 pAd->MgmtRing.Cell[SwIdx].pNextNdisPacket = NULL;
diff --git a/drivers/staging/rt2860/common/cmm_info.c b/drivers/staging/rt2860/common/cmm_info.c
index 9d589c240ed0..019cc4474ce8 100644
--- a/drivers/staging/rt2860/common/cmm_info.c
+++ b/drivers/staging/rt2860/common/cmm_info.c
@@ -25,6 +25,7 @@
25 ************************************************************************* 25 *************************************************************************
26*/ 26*/
27 27
28#include <linux/sched.h>
28#include "../rt_config.h" 29#include "../rt_config.h"
29 30
30INT Show_SSID_Proc( 31INT Show_SSID_Proc(
diff --git a/drivers/staging/rt2860/rt_linux.c b/drivers/staging/rt2860/rt_linux.c
index b396a9b570e2..ed27b8545a1b 100644
--- a/drivers/staging/rt2860/rt_linux.c
+++ b/drivers/staging/rt2860/rt_linux.c
@@ -25,6 +25,7 @@
25 ************************************************************************* 25 *************************************************************************
26 */ 26 */
27 27
28#include <linux/sched.h>
28#include "rt_config.h" 29#include "rt_config.h"
29 30
30ULONG RTDebugLevel = RT_DEBUG_ERROR; 31ULONG RTDebugLevel = RT_DEBUG_ERROR;
diff --git a/drivers/staging/rt2870/Kconfig b/drivers/staging/rt2870/Kconfig
index 76841f6dea93..aea5c8221810 100644
--- a/drivers/staging/rt2870/Kconfig
+++ b/drivers/staging/rt2870/Kconfig
@@ -1,5 +1,5 @@
1config RT2870 1config RT2870
2 tristate "Ralink 2870/3070 wireless support" 2 tristate "Ralink 2870/3070 wireless support"
3 depends on USB && X86 && WLAN_80211 3 depends on USB && X86 && WLAN
4 ---help--- 4 ---help---
5 This is an experimental driver for the Ralink xx70 wireless chips. 5 This is an experimental driver for the Ralink xx70 wireless chips.
diff --git a/drivers/staging/rt3090/Kconfig b/drivers/staging/rt3090/Kconfig
index 255e8eaa4836..2b3f745d72b7 100644
--- a/drivers/staging/rt3090/Kconfig
+++ b/drivers/staging/rt3090/Kconfig
@@ -1,5 +1,5 @@
1config RT3090 1config RT3090
2 tristate "Ralink 3090 wireless support" 2 tristate "Ralink 3090 wireless support"
3 depends on PCI && X86 && WLAN_80211 3 depends on PCI && X86 && WLAN
4 ---help--- 4 ---help---
5 This is an experimental driver for the Ralink 3090 wireless chip. 5 This is an experimental driver for the Ralink 3090 wireless chip.
diff --git a/drivers/staging/rt3090/common/cmm_info.c b/drivers/staging/rt3090/common/cmm_info.c
index 5be0714666cb..3e51e98b474c 100644
--- a/drivers/staging/rt3090/common/cmm_info.c
+++ b/drivers/staging/rt3090/common/cmm_info.c
@@ -34,6 +34,7 @@
34 --------- ---------- ---------------------------------------------- 34 --------- ---------- ----------------------------------------------
35 */ 35 */
36 36
37#include <linux/sched.h>
37#include "../rt_config.h" 38#include "../rt_config.h"
38 39
39 40
diff --git a/drivers/staging/rt3090/rt_linux.c b/drivers/staging/rt3090/rt_linux.c
index d2241ecdf583..9b94aa6eb904 100644
--- a/drivers/staging/rt3090/rt_linux.c
+++ b/drivers/staging/rt3090/rt_linux.c
@@ -25,6 +25,7 @@
25 ************************************************************************* 25 *************************************************************************
26 */ 26 */
27 27
28#include <linux/sched.h>
28#include "rt_config.h" 29#include "rt_config.h"
29 30
30ULONG RTDebugLevel = RT_DEBUG_ERROR; 31ULONG RTDebugLevel = RT_DEBUG_ERROR;
diff --git a/drivers/staging/rtl8187se/Kconfig b/drivers/staging/rtl8187se/Kconfig
index 236e42725447..203c79b8180f 100644
--- a/drivers/staging/rtl8187se/Kconfig
+++ b/drivers/staging/rtl8187se/Kconfig
@@ -1,6 +1,6 @@
1config RTL8187SE 1config RTL8187SE
2 tristate "RealTek RTL8187SE Wireless LAN NIC driver" 2 tristate "RealTek RTL8187SE Wireless LAN NIC driver"
3 depends on PCI 3 depends on PCI && WLAN
4 depends on WIRELESS_EXT 4 depends on WIRELESS_EXT
5 default N 5 default N
6 ---help--- 6 ---help---
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
index 013c3e19ae25..4c5d63fd5833 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_crypt.c
@@ -53,10 +53,8 @@ void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
53 53
54 list_del(ptr); 54 list_del(ptr);
55 55
56 if (entry->ops) { 56 if (entry->ops)
57 entry->ops->deinit(entry->priv); 57 entry->ops->deinit(entry->priv);
58 module_put(entry->ops->owner);
59 }
60 kfree(entry); 58 kfree(entry);
61 } 59 }
62} 60}
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
index 6fbe4890cb66..18392fce487d 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_module.c
@@ -189,10 +189,8 @@ void free_ieee80211(struct net_device *dev)
189 for (i = 0; i < WEP_KEYS; i++) { 189 for (i = 0; i < WEP_KEYS; i++) {
190 struct ieee80211_crypt_data *crypt = ieee->crypt[i]; 190 struct ieee80211_crypt_data *crypt = ieee->crypt[i];
191 if (crypt) { 191 if (crypt) {
192 if (crypt->ops) { 192 if (crypt->ops)
193 crypt->ops->deinit(crypt->priv); 193 crypt->ops->deinit(crypt->priv);
194 module_put(crypt->ops->owner);
195 }
196 kfree(crypt); 194 kfree(crypt);
197 ieee->crypt[i] = NULL; 195 ieee->crypt[i] = NULL;
198 } 196 }
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
index 59b2ab48cdcf..334e4c7ec61b 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_softmac.c
@@ -2839,16 +2839,12 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
2839 goto skip_host_crypt; 2839 goto skip_host_crypt;
2840 2840
2841 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 2841 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
2842 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) { 2842 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0)
2843 request_module("ieee80211_crypt_wep");
2844 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 2843 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
2845 } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) { 2844 else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0)
2846 request_module("ieee80211_crypt_tkip");
2847 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 2845 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
2848 } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) { 2846 else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0)
2849 request_module("ieee80211_crypt_ccmp");
2850 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 2847 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
2851 }
2852 if (ops == NULL) { 2848 if (ops == NULL) {
2853 printk("unknown crypto alg '%s'\n", param->u.crypt.alg); 2849 printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
2854 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; 2850 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
@@ -2869,7 +2865,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
2869 } 2865 }
2870 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); 2866 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
2871 new_crypt->ops = ops; 2867 new_crypt->ops = ops;
2872 if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) 2868 if (new_crypt->ops)
2873 new_crypt->priv = 2869 new_crypt->priv =
2874 new_crypt->ops->init(param->u.crypt.idx); 2870 new_crypt->ops->init(param->u.crypt.idx);
2875 2871
diff --git a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
index 8d8bdd0a130e..a08b97a09512 100644
--- a/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8187se/ieee80211/ieee80211_wx.c
@@ -331,12 +331,10 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
331 return -ENOMEM; 331 return -ENOMEM;
332 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); 332 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
333 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 333 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
334 if (!new_crypt->ops) { 334 if (!new_crypt->ops)
335 request_module("ieee80211_crypt_wep");
336 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 335 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
337 }
338 336
339 if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) 337 if (new_crypt->ops)
340 new_crypt->priv = new_crypt->ops->init(key); 338 new_crypt->priv = new_crypt->ops->init(key);
341 339
342 if (!new_crypt->ops || !new_crypt->priv) { 340 if (!new_crypt->ops || !new_crypt->priv) {
@@ -483,7 +481,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
483 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; 481 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
484 int i, idx, ret = 0; 482 int i, idx, ret = 0;
485 int group_key = 0; 483 int group_key = 0;
486 const char *alg, *module; 484 const char *alg;
487 struct ieee80211_crypto_ops *ops; 485 struct ieee80211_crypto_ops *ops;
488 struct ieee80211_crypt_data **crypt; 486 struct ieee80211_crypt_data **crypt;
489 487
@@ -539,15 +537,12 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
539 switch (ext->alg) { 537 switch (ext->alg) {
540 case IW_ENCODE_ALG_WEP: 538 case IW_ENCODE_ALG_WEP:
541 alg = "WEP"; 539 alg = "WEP";
542 module = "ieee80211_crypt_wep";
543 break; 540 break;
544 case IW_ENCODE_ALG_TKIP: 541 case IW_ENCODE_ALG_TKIP:
545 alg = "TKIP"; 542 alg = "TKIP";
546 module = "ieee80211_crypt_tkip";
547 break; 543 break;
548 case IW_ENCODE_ALG_CCMP: 544 case IW_ENCODE_ALG_CCMP:
549 alg = "CCMP"; 545 alg = "CCMP";
550 module = "ieee80211_crypt_ccmp";
551 break; 546 break;
552 default: 547 default:
553 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", 548 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
@@ -558,10 +553,8 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
558// printk("8-09-08-9=====>%s, alg name:%s\n",__func__, alg); 553// printk("8-09-08-9=====>%s, alg name:%s\n",__func__, alg);
559 554
560 ops = ieee80211_get_crypto_ops(alg); 555 ops = ieee80211_get_crypto_ops(alg);
561 if (ops == NULL) { 556 if (ops == NULL)
562 request_module(module);
563 ops = ieee80211_get_crypto_ops(alg); 557 ops = ieee80211_get_crypto_ops(alg);
564 }
565 if (ops == NULL) { 558 if (ops == NULL) {
566 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", 559 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
567 dev->name, ext->alg); 560 dev->name, ext->alg);
@@ -581,7 +574,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
581 goto done; 574 goto done;
582 } 575 }
583 new_crypt->ops = ops; 576 new_crypt->ops = ops;
584 if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) 577 if (new_crypt->ops)
585 new_crypt->priv = new_crypt->ops->init(idx); 578 new_crypt->priv = new_crypt->ops->init(idx);
586 if (new_crypt->priv == NULL) { 579 if (new_crypt->priv == NULL) {
587 kfree(new_crypt); 580 kfree(new_crypt);
diff --git a/drivers/staging/rtl8192e/Kconfig b/drivers/staging/rtl8192e/Kconfig
index 3100aa58c940..37e4fde45073 100644
--- a/drivers/staging/rtl8192e/Kconfig
+++ b/drivers/staging/rtl8192e/Kconfig
@@ -1,6 +1,6 @@
1config RTL8192E 1config RTL8192E
2 tristate "RealTek RTL8192E Wireless LAN NIC driver" 2 tristate "RealTek RTL8192E Wireless LAN NIC driver"
3 depends on PCI 3 depends on PCI && WLAN
4 depends on WIRELESS_EXT 4 depends on WIRELESS_EXT
5 default N 5 default N
6 ---help--- 6 ---help---
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c
index 1a8ea8a40c3c..b1c54932da3e 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_crypt.c
@@ -53,14 +53,8 @@ void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
53 53
54 list_del(ptr); 54 list_del(ptr);
55 55
56 if (entry->ops) { 56 if (entry->ops)
57 entry->ops->deinit(entry->priv); 57 entry->ops->deinit(entry->priv);
58#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
59 module_put(entry->ops->owner);
60#else
61 __MOD_DEC_USE_COUNT(entry->ops->owner);
62#endif
63 }
64 kfree(entry); 58 kfree(entry);
65 } 59 }
66} 60}
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
index 16256a31f993..12c2a18e1fa2 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_module.c
@@ -242,14 +242,8 @@ void free_ieee80211(struct net_device *dev)
242 for (i = 0; i < WEP_KEYS; i++) { 242 for (i = 0; i < WEP_KEYS; i++) {
243 struct ieee80211_crypt_data *crypt = ieee->crypt[i]; 243 struct ieee80211_crypt_data *crypt = ieee->crypt[i];
244 if (crypt) { 244 if (crypt) {
245 if (crypt->ops) { 245 if (crypt->ops)
246 crypt->ops->deinit(crypt->priv); 246 crypt->ops->deinit(crypt->priv);
247#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
248 module_put(crypt->ops->owner);
249#else
250 __MOD_DEC_USE_COUNT(crypt->ops->owner);
251#endif
252 }
253 kfree(crypt); 247 kfree(crypt);
254 ieee->crypt[i] = NULL; 248 ieee->crypt[i] = NULL;
255 } 249 }
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
index 2fc04df872ca..eae7c4579a68 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_softmac.c
@@ -3284,17 +3284,14 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
3284 goto skip_host_crypt; 3284 goto skip_host_crypt;
3285 3285
3286 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 3286 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3287 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) { 3287 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0)
3288 request_module("ieee80211_crypt_wep");
3289 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 3288 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3290 //set WEP40 first, it will be modified according to WEP104 or WEP40 at other place 3289 /* set WEP40 first, it will be modified according to WEP104 or
3291 } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) { 3290 * WEP40 at other place */
3292 request_module("ieee80211_crypt_tkip"); 3291 else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0)
3293 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 3292 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3294 } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) { 3293 else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0)
3295 request_module("ieee80211_crypt_ccmp");
3296 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 3294 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3297 }
3298 if (ops == NULL) { 3295 if (ops == NULL) {
3299 printk("unknown crypto alg '%s'\n", param->u.crypt.alg); 3296 printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
3300 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; 3297 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
@@ -3315,11 +3312,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
3315 } 3312 }
3316 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); 3313 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
3317 new_crypt->ops = ops; 3314 new_crypt->ops = ops;
3318#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0) 3315 if (new_crypt->ops)
3319 if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
3320#else
3321 if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
3322#endif
3323 new_crypt->priv = 3316 new_crypt->priv =
3324 new_crypt->ops->init(param->u.crypt.idx); 3317 new_crypt->ops->init(param->u.crypt.idx);
3325 3318
diff --git a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
index 223483126b0e..4e34a1f4c66b 100644
--- a/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8192e/ieee80211/ieee80211_wx.c
@@ -482,15 +482,9 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
482 return -ENOMEM; 482 return -ENOMEM;
483 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); 483 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
484 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 484 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
485 if (!new_crypt->ops) { 485 if (!new_crypt->ops)
486 request_module("ieee80211_crypt_wep");
487 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 486 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
488 } 487 if (new_crypt->ops)
489#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,5,0)
490 if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
491#else
492 if (new_crypt->ops && try_inc_mod_count(new_crypt->ops->owner))
493#endif
494 new_crypt->priv = new_crypt->ops->init(key); 488 new_crypt->priv = new_crypt->ops->init(key);
495 489
496 if (!new_crypt->ops || !new_crypt->priv) { 490 if (!new_crypt->ops || !new_crypt->priv) {
@@ -644,7 +638,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
644 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; 638 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
645 int i, idx; 639 int i, idx;
646 int group_key = 0; 640 int group_key = 0;
647 const char *alg, *module; 641 const char *alg;
648 struct ieee80211_crypto_ops *ops; 642 struct ieee80211_crypto_ops *ops;
649 struct ieee80211_crypt_data **crypt; 643 struct ieee80211_crypt_data **crypt;
650 644
@@ -711,15 +705,12 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
711 switch (ext->alg) { 705 switch (ext->alg) {
712 case IW_ENCODE_ALG_WEP: 706 case IW_ENCODE_ALG_WEP:
713 alg = "WEP"; 707 alg = "WEP";
714 module = "ieee80211_crypt_wep";
715 break; 708 break;
716 case IW_ENCODE_ALG_TKIP: 709 case IW_ENCODE_ALG_TKIP:
717 alg = "TKIP"; 710 alg = "TKIP";
718 module = "ieee80211_crypt_tkip";
719 break; 711 break;
720 case IW_ENCODE_ALG_CCMP: 712 case IW_ENCODE_ALG_CCMP:
721 alg = "CCMP"; 713 alg = "CCMP";
722 module = "ieee80211_crypt_ccmp";
723 break; 714 break;
724 default: 715 default:
725 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", 716 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
@@ -730,10 +721,8 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
730 printk("alg name:%s\n",alg); 721 printk("alg name:%s\n",alg);
731 722
732 ops = ieee80211_get_crypto_ops(alg); 723 ops = ieee80211_get_crypto_ops(alg);
733 if (ops == NULL) { 724 if (ops == NULL)
734 request_module(module);
735 ops = ieee80211_get_crypto_ops(alg); 725 ops = ieee80211_get_crypto_ops(alg);
736 }
737 if (ops == NULL) { 726 if (ops == NULL) {
738 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", 727 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
739 dev->name, ext->alg); 728 dev->name, ext->alg);
@@ -758,7 +747,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
758 goto done; 747 goto done;
759 } 748 }
760 new_crypt->ops = ops; 749 new_crypt->ops = ops;
761 if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) 750 if (new_crypt->ops)
762 new_crypt->priv = new_crypt->ops->init(idx); 751 new_crypt->priv = new_crypt->ops->init(idx);
763 if (new_crypt->priv == NULL) { 752 if (new_crypt->priv == NULL) {
764 kfree(new_crypt); 753 kfree(new_crypt);
diff --git a/drivers/staging/rtl8192su/Kconfig b/drivers/staging/rtl8192su/Kconfig
index 770f41280f21..b8c95f942069 100644
--- a/drivers/staging/rtl8192su/Kconfig
+++ b/drivers/staging/rtl8192su/Kconfig
@@ -1,6 +1,6 @@
1config RTL8192SU 1config RTL8192SU
2 tristate "RealTek RTL8192SU Wireless LAN NIC driver" 2 tristate "RealTek RTL8192SU Wireless LAN NIC driver"
3 depends on PCI 3 depends on PCI && WLAN
4 depends on WIRELESS_EXT 4 depends on WIRELESS_EXT
5 default N 5 default N
6 ---help--- 6 ---help---
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c
index d76a54d59d2f..521e7b989934 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_crypt.c
@@ -53,10 +53,8 @@ void ieee80211_crypt_deinit_entries(struct ieee80211_device *ieee,
53 53
54 list_del(ptr); 54 list_del(ptr);
55 55
56 if (entry->ops) { 56 if (entry->ops)
57 entry->ops->deinit(entry->priv); 57 entry->ops->deinit(entry->priv);
58 module_put(entry->ops->owner);
59 }
60 kfree(entry); 58 kfree(entry);
61 } 59 }
62} 60}
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c
index 68dc8fa094cc..c3383bb8b760 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_module.c
@@ -216,10 +216,8 @@ void free_ieee80211(struct net_device *dev)
216 for (i = 0; i < WEP_KEYS; i++) { 216 for (i = 0; i < WEP_KEYS; i++) {
217 struct ieee80211_crypt_data *crypt = ieee->crypt[i]; 217 struct ieee80211_crypt_data *crypt = ieee->crypt[i];
218 if (crypt) { 218 if (crypt) {
219 if (crypt->ops) { 219 if (crypt->ops)
220 crypt->ops->deinit(crypt->priv); 220 crypt->ops->deinit(crypt->priv);
221 module_put(crypt->ops->owner);
222 }
223 kfree(crypt); 221 kfree(crypt);
224 ieee->crypt[i] = NULL; 222 ieee->crypt[i] = NULL;
225 } 223 }
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
index c64ae03f68a0..fd8e11252f1b 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_softmac.c
@@ -3026,17 +3026,14 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
3026 goto skip_host_crypt; 3026 goto skip_host_crypt;
3027 3027
3028 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 3028 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3029 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0) { 3029 if (ops == NULL && strcmp(param->u.crypt.alg, "WEP") == 0)
3030 request_module("ieee80211_crypt_wep");
3031 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 3030 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3032 //set WEP40 first, it will be modified according to WEP104 or WEP40 at other place 3031 /* set WEP40 first, it will be modified according to WEP104 or
3033 } else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0) { 3032 * WEP40 at other place */
3034 request_module("ieee80211_crypt_tkip"); 3033 else if (ops == NULL && strcmp(param->u.crypt.alg, "TKIP") == 0)
3035 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 3034 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3036 } else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0) { 3035 else if (ops == NULL && strcmp(param->u.crypt.alg, "CCMP") == 0)
3037 request_module("ieee80211_crypt_ccmp");
3038 ops = ieee80211_get_crypto_ops(param->u.crypt.alg); 3036 ops = ieee80211_get_crypto_ops(param->u.crypt.alg);
3039 }
3040 if (ops == NULL) { 3037 if (ops == NULL) {
3041 printk("unknown crypto alg '%s'\n", param->u.crypt.alg); 3038 printk("unknown crypto alg '%s'\n", param->u.crypt.alg);
3042 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG; 3039 param->u.crypt.err = IEEE_CRYPT_ERR_UNKNOWN_ALG;
@@ -3058,7 +3055,7 @@ static int ieee80211_wpa_set_encryption(struct ieee80211_device *ieee,
3058 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); 3055 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
3059 new_crypt->ops = ops; 3056 new_crypt->ops = ops;
3060 3057
3061 if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) 3058 if (new_crypt->ops)
3062 new_crypt->priv = 3059 new_crypt->priv =
3063 new_crypt->ops->init(param->u.crypt.idx); 3060 new_crypt->ops->init(param->u.crypt.idx);
3064 3061
diff --git a/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c b/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c
index 107759024335..6146c6435dde 100644
--- a/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c
+++ b/drivers/staging/rtl8192su/ieee80211/ieee80211_wx.c
@@ -358,11 +358,9 @@ int ieee80211_wx_set_encode(struct ieee80211_device *ieee,
358 return -ENOMEM; 358 return -ENOMEM;
359 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data)); 359 memset(new_crypt, 0, sizeof(struct ieee80211_crypt_data));
360 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 360 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
361 if (!new_crypt->ops) { 361 if (!new_crypt->ops)
362 request_module("ieee80211_crypt_wep");
363 new_crypt->ops = ieee80211_get_crypto_ops("WEP"); 362 new_crypt->ops = ieee80211_get_crypto_ops("WEP");
364 } 363 if (new_crypt->ops)
365 if (new_crypt->ops && try_module_get(new_crypt->ops->owner))
366 new_crypt->priv = new_crypt->ops->init(key); 364 new_crypt->priv = new_crypt->ops->init(key);
367 365
368 if (!new_crypt->ops || !new_crypt->priv) { 366 if (!new_crypt->ops || !new_crypt->priv) {
@@ -507,7 +505,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
507 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra; 505 struct iw_encode_ext *ext = (struct iw_encode_ext *)extra;
508 int i, idx; 506 int i, idx;
509 int group_key = 0; 507 int group_key = 0;
510 const char *alg, *module; 508 const char *alg;
511 struct ieee80211_crypto_ops *ops; 509 struct ieee80211_crypto_ops *ops;
512 struct ieee80211_crypt_data **crypt; 510 struct ieee80211_crypt_data **crypt;
513 511
@@ -570,15 +568,12 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
570 switch (ext->alg) { 568 switch (ext->alg) {
571 case IW_ENCODE_ALG_WEP: 569 case IW_ENCODE_ALG_WEP:
572 alg = "WEP"; 570 alg = "WEP";
573 module = "ieee80211_crypt_wep";
574 break; 571 break;
575 case IW_ENCODE_ALG_TKIP: 572 case IW_ENCODE_ALG_TKIP:
576 alg = "TKIP"; 573 alg = "TKIP";
577 module = "ieee80211_crypt_tkip";
578 break; 574 break;
579 case IW_ENCODE_ALG_CCMP: 575 case IW_ENCODE_ALG_CCMP:
580 alg = "CCMP"; 576 alg = "CCMP";
581 module = "ieee80211_crypt_ccmp";
582 break; 577 break;
583 default: 578 default:
584 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", 579 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
@@ -589,10 +584,8 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
589 printk("alg name:%s\n",alg); 584 printk("alg name:%s\n",alg);
590 585
591 ops = ieee80211_get_crypto_ops(alg); 586 ops = ieee80211_get_crypto_ops(alg);
592 if (ops == NULL) { 587 if (ops == NULL)
593 request_module("%s", module);
594 ops = ieee80211_get_crypto_ops(alg); 588 ops = ieee80211_get_crypto_ops(alg);
595 }
596 if (ops == NULL) { 589 if (ops == NULL) {
597 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n", 590 IEEE80211_DEBUG_WX("%s: unknown crypto alg %d\n",
598 dev->name, ext->alg); 591 dev->name, ext->alg);
@@ -612,7 +605,7 @@ int ieee80211_wx_set_encode_ext(struct ieee80211_device *ieee,
612 goto done; 605 goto done;
613 } 606 }
614 new_crypt->ops = ops; 607 new_crypt->ops = ops;
615 if (new_crypt->ops && try_module_get(new_crypt->ops->owner)) 608 if (new_crypt->ops)
616 new_crypt->priv = new_crypt->ops->init(idx); 609 new_crypt->priv = new_crypt->ops->init(idx);
617 if (new_crypt->priv == NULL) { 610 if (new_crypt->priv == NULL) {
618 kfree(new_crypt); 611 kfree(new_crypt);
diff --git a/drivers/staging/sep/sep_driver.c b/drivers/staging/sep/sep_driver.c
index 87f8a1192762..f890a16096c0 100644
--- a/drivers/staging/sep/sep_driver.c
+++ b/drivers/staging/sep/sep_driver.c
@@ -38,6 +38,7 @@
38#include <linux/mm.h> 38#include <linux/mm.h>
39#include <linux/poll.h> 39#include <linux/poll.h>
40#include <linux/wait.h> 40#include <linux/wait.h>
41#include <linux/sched.h>
41#include <linux/pci.h> 42#include <linux/pci.h>
42#include <linux/firmware.h> 43#include <linux/firmware.h>
43#include <asm/ioctl.h> 44#include <asm/ioctl.h>
diff --git a/drivers/staging/stlc45xx/Kconfig b/drivers/staging/stlc45xx/Kconfig
deleted file mode 100644
index 947fb75a9c68..000000000000
--- a/drivers/staging/stlc45xx/Kconfig
+++ /dev/null
@@ -1,8 +0,0 @@
1config STLC45XX
2 tristate "stlc4550/4560 support"
3 depends on MAC80211 && WLAN_80211 && SPI_MASTER && GENERIC_HARDIRQS
4 ---help---
5 This is a driver for stlc4550 and stlc4560 chipsets.
6
7 To compile this driver as a module, choose M here: the module will be
8 called stlc45xx. If unsure, say N.
diff --git a/drivers/staging/stlc45xx/Makefile b/drivers/staging/stlc45xx/Makefile
deleted file mode 100644
index 7ee32903055a..000000000000
--- a/drivers/staging/stlc45xx/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-$(CONFIG_STLC45XX) += stlc45xx.o
diff --git a/drivers/staging/stlc45xx/stlc45xx.c b/drivers/staging/stlc45xx/stlc45xx.c
deleted file mode 100644
index be99eb33d817..000000000000
--- a/drivers/staging/stlc45xx/stlc45xx.c
+++ /dev/null
@@ -1,2594 +0,0 @@
1/*
2 * This file is part of stlc45xx
3 *
4 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include "stlc45xx.h"
25
26#include <linux/module.h>
27#include <linux/platform_device.h>
28#include <linux/interrupt.h>
29#include <linux/firmware.h>
30#include <linux/delay.h>
31#include <linux/irq.h>
32#include <linux/spi/spi.h>
33#include <linux/etherdevice.h>
34#include <linux/gpio.h>
35#include <linux/moduleparam.h>
36
37#include "stlc45xx_lmac.h"
38
39/*
40 * gpios should be handled in board files and provided via platform data,
41 * but because it's currently impossible for stlc45xx to have a header file
42 * in include/linux, let's use module paramaters for now
43 */
44static int stlc45xx_gpio_power = 97;
45module_param(stlc45xx_gpio_power, int, 0444);
46MODULE_PARM_DESC(stlc45xx_gpio_power, "stlc45xx gpio number for power line");
47
48static int stlc45xx_gpio_irq = 87;
49module_param(stlc45xx_gpio_irq, int, 0444);
50MODULE_PARM_DESC(stlc45xx_gpio_irq, "stlc45xx gpio number for irq line");
51
52static const u8 default_cal_channels[] = {
53 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
54 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x6c, 0x09,
55 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10,
56 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xe0, 0x00, 0xe0, 0x00,
57 0xe0, 0x00, 0xe0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0,
58 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42,
59 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00,
60 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9,
61 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00,
62 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc,
63 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0,
64 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4,
65 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d,
66 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa,
67 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00,
68 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17,
69 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00,
70 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00,
71 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00,
72 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96,
73 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
74 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
75 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
76 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
77 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
78 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
79 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
80 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
81 0x00, 0x00, 0x00, 0x00, 0x71, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8,
82 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01,
83 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0,
84 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6,
85 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00,
86 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb,
87 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0,
88 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc,
89 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca,
90 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4,
91 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00,
92 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21,
93 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00,
94 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00,
95 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00,
96 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0,
97 0x00, 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0,
98 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96,
99 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00,
100 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
101 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
102 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
103 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
104 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
105 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, 0x80,
106 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
107 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x76,
108 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01,
109 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0,
110 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00,
111 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0,
112 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb,
113 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37,
114 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc,
115 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00,
116 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b,
117 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00,
118 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00,
119 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00,
120 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa,
121 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0,
122 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0,
123 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x7a,
124 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d, 0xc0, 0x0d,
125 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00,
126 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
127 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
128 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
129 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
130 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
131 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
132 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
133 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
134 0x00, 0x00, 0x00, 0x00, 0x00, 0x7b, 0x09, 0x00, 0x00, 0xc9, 0xff,
135 0xd8, 0xff, 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10,
136 0x01, 0x10, 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00,
137 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab,
138 0xf6, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb,
139 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00,
140 0xcb, 0x00, 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33,
141 0xc0, 0x33, 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00,
142 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00,
143 0xca, 0x79, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00,
144 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4,
145 0x00, 0xb4, 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0,
146 0x21, 0xc0, 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa,
147 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7,
148 0x00, 0xa9, 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17,
149 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00,
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318 0x00, 0x06, 0x80, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
319 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
320 0x00, 0x00, 0x00, 0x9e, 0x09, 0x00, 0x00, 0xc9, 0xff, 0xd8, 0xff,
321 0x00, 0x00, 0x00, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10, 0x01, 0x10,
322 0x01, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xf0, 0x00, 0xd0, 0x00,
323 0xd0, 0x00, 0xd0, 0x00, 0xd0, 0x00, 0x54, 0x01, 0xab, 0xf6, 0xc0,
324 0x42, 0xc0, 0x42, 0xc0, 0x42, 0xc0, 0x42, 0x00, 0xcb, 0x00, 0xcb,
325 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00, 0xcb, 0x00,
326 0xcb, 0x22, 0x01, 0x37, 0xa9, 0xc0, 0x33, 0xc0, 0x33, 0xc0, 0x33,
327 0xc0, 0x33, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00,
328 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0x00, 0xbc, 0xfb, 0x00, 0xca, 0x79,
329 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0xc0, 0x2b, 0x00, 0xb4, 0x00,
330 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4, 0x00, 0xb4,
331 0x00, 0xb4, 0xd0, 0x00, 0x5d, 0x54, 0xc0, 0x21, 0xc0, 0x21, 0xc0,
332 0x21, 0xc0, 0x21, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa,
333 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0x00, 0xaa, 0xa7, 0x00, 0xa9,
334 0x3d, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0xc0, 0x17, 0x00, 0xa0,
335 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00, 0xa0, 0x00,
336 0xa0, 0x00, 0xa0, 0x7a, 0x00, 0x06, 0x2c, 0xc0, 0x0d, 0xc0, 0x0d,
337 0xc0, 0x0d, 0xc0, 0x0d, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00,
338 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x96, 0x00, 0x00,
339 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
340 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
341 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
342 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
343 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
344 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, 0x80, 0x80, 0x00,
345 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
346 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
347 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
348 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
349 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
350 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
351 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
352 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
353 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
354 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
355 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
356 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
357 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
358 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
359 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
360 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
361 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
362 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
363 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
364 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
365 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
366 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
367 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
368 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
369 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
370 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
371 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
372 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
373 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
374 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
375 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
376 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
377 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
378 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
379 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
380 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
381 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
382 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
383 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
384 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
385 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
386 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
387 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
388 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
389 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
390 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
391 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
392 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
393 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
394 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
395 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
396 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
397 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
398 0x00 };
399
400static const u8 default_cal_rssi[] = {
401 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72,
402 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00,
403 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a,
404 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe,
405 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00,
406 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01,
407 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a,
408 0x00, 0x00, 0x00, 0x0a, 0x01, 0x72, 0xfe, 0x1a, 0x00, 0x00, 0x00,
409 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
410 0x00, 0x00, 0x00, 0x00, 0x00 };
411
412static void stlc45xx_tx_edcf(struct stlc45xx *stlc);
413static void stlc45xx_tx_setup(struct stlc45xx *stlc);
414static void stlc45xx_tx_scan(struct stlc45xx *stlc);
415static void stlc45xx_tx_psm(struct stlc45xx *stlc, bool enable);
416static int stlc45xx_tx_nullfunc(struct stlc45xx *stlc, bool powersave);
417static int stlc45xx_tx_pspoll(struct stlc45xx *stlc, bool powersave);
418
419static ssize_t stlc45xx_sysfs_show_cal_rssi(struct device *dev,
420 struct device_attribute *attr,
421 char *buf)
422{
423 struct stlc45xx *stlc = dev_get_drvdata(dev);
424 ssize_t len;
425
426 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
427
428 len = PAGE_SIZE;
429
430 mutex_lock(&stlc->mutex);
431
432 if (stlc->cal_rssi)
433 hex_dump_to_buffer(stlc->cal_rssi, RSSI_CAL_ARRAY_LEN, 16,
434 2, buf, len, 0);
435 mutex_unlock(&stlc->mutex);
436
437 len = strlen(buf);
438
439 return len;
440}
441
442static ssize_t stlc45xx_sysfs_store_cal_rssi(struct device *dev,
443 struct device_attribute *attr,
444 const char *buf, size_t count)
445{
446 struct stlc45xx *stlc = dev_get_drvdata(dev);
447
448 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
449
450 mutex_lock(&stlc->mutex);
451
452 if (count != RSSI_CAL_ARRAY_LEN) {
453 stlc45xx_error("invalid cal_rssi length: %zu", count);
454 count = 0;
455 goto out_unlock;
456 }
457
458 kfree(stlc->cal_rssi);
459
460 stlc->cal_rssi = kmemdup(buf, RSSI_CAL_ARRAY_LEN, GFP_KERNEL);
461
462 if (!stlc->cal_rssi) {
463 stlc45xx_error("failed to allocate memory for cal_rssi");
464 count = 0;
465 goto out_unlock;
466 }
467
468 out_unlock:
469 mutex_unlock(&stlc->mutex);
470
471 return count;
472}
473
474static ssize_t stlc45xx_sysfs_show_cal_channels(struct device *dev,
475 struct device_attribute *attr,
476 char *buf)
477{
478 struct stlc45xx *stlc = dev_get_drvdata(dev);
479 ssize_t len;
480
481 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
482
483 len = PAGE_SIZE;
484
485 mutex_lock(&stlc->mutex);
486
487 if (stlc->cal_channels)
488 hex_dump_to_buffer(stlc->cal_channels, CHANNEL_CAL_ARRAY_LEN,
489 16, 2, buf, len, 0);
490
491 mutex_unlock(&stlc->mutex);
492
493 len = strlen(buf);
494
495 return len;
496}
497
498static ssize_t stlc45xx_sysfs_store_cal_channels(struct device *dev,
499 struct device_attribute *attr,
500 const char *buf, size_t count)
501{
502 struct stlc45xx *stlc = dev_get_drvdata(dev);
503
504 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
505
506 mutex_lock(&stlc->mutex);
507
508 if (count != CHANNEL_CAL_ARRAY_LEN) {
509 stlc45xx_error("invalid cal_channels size: %zu ", count);
510 count = 0;
511 goto out_unlock;
512 }
513
514 kfree(stlc->cal_channels);
515
516 stlc->cal_channels = kmemdup(buf, count, GFP_KERNEL);
517
518 if (!stlc->cal_channels) {
519 stlc45xx_error("failed to allocate memory for cal_channels");
520 count = 0;
521 goto out_unlock;
522 }
523
524out_unlock:
525 mutex_unlock(&stlc->mutex);
526
527 return count;
528}
529
530static ssize_t stlc45xx_sysfs_show_tx_buf(struct device *dev,
531 struct device_attribute *attr,
532 char *buf)
533{
534 struct stlc45xx *stlc = dev_get_drvdata(dev);
535 struct txbuffer *entry;
536 ssize_t len = 0;
537
538 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
539
540 mutex_lock(&stlc->mutex);
541
542 list_for_each_entry(entry, &stlc->tx_sent, tx_list) {
543 len += sprintf(buf + len, "0x%x: 0x%x-0x%x\n",
544 entry->handle, entry->start,
545 entry->end);
546 }
547
548 mutex_unlock(&stlc->mutex);
549
550 return len;
551}
552
553static DEVICE_ATTR(cal_rssi, S_IRUGO | S_IWUSR,
554 stlc45xx_sysfs_show_cal_rssi,
555 stlc45xx_sysfs_store_cal_rssi);
556static DEVICE_ATTR(cal_channels, S_IRUGO | S_IWUSR,
557 stlc45xx_sysfs_show_cal_channels,
558 stlc45xx_sysfs_store_cal_channels);
559static DEVICE_ATTR(tx_buf, S_IRUGO, stlc45xx_sysfs_show_tx_buf, NULL);
560
561static void stlc45xx_spi_read(struct stlc45xx *stlc, unsigned long addr,
562 void *buf, size_t len)
563{
564 struct spi_transfer t[2];
565 struct spi_message m;
566
567 /* We first push the address */
568 addr = (addr << 8) | ADDR_READ_BIT_15;
569
570 spi_message_init(&m);
571 memset(t, 0, sizeof(t));
572
573 t[0].tx_buf = &addr;
574 t[0].len = 2;
575 spi_message_add_tail(&t[0], &m);
576
577 t[1].rx_buf = buf;
578 t[1].len = len;
579 spi_message_add_tail(&t[1], &m);
580
581 spi_sync(stlc->spi, &m);
582}
583
584
585static void stlc45xx_spi_write(struct stlc45xx *stlc, unsigned long addr,
586 void *buf, size_t len)
587{
588 struct spi_transfer t[3];
589 struct spi_message m;
590 u16 last_word;
591
592 /* We first push the address */
593 addr = addr << 8;
594
595 spi_message_init(&m);
596 memset(t, 0, sizeof(t));
597
598 t[0].tx_buf = &addr;
599 t[0].len = 2;
600 spi_message_add_tail(&t[0], &m);
601
602 t[1].tx_buf = buf;
603 t[1].len = len;
604 spi_message_add_tail(&t[1], &m);
605
606 if (len % 2) {
607 last_word = ((u8 *)buf)[len - 1];
608
609 t[2].tx_buf = &last_word;
610 t[2].len = 2;
611 spi_message_add_tail(&t[2], &m);
612 }
613
614 spi_sync(stlc->spi, &m);
615}
616
617static u16 stlc45xx_read16(struct stlc45xx *stlc, unsigned long addr)
618{
619 u16 val;
620
621 stlc45xx_spi_read(stlc, addr, &val, sizeof(val));
622
623 return val;
624}
625
626static u32 stlc45xx_read32(struct stlc45xx *stlc, unsigned long addr)
627{
628 u32 val;
629
630 stlc45xx_spi_read(stlc, addr, &val, sizeof(val));
631
632 return val;
633}
634
635static void stlc45xx_write16(struct stlc45xx *stlc, unsigned long addr, u16 val)
636{
637 stlc45xx_spi_write(stlc, addr, &val, sizeof(val));
638}
639
640static void stlc45xx_write32(struct stlc45xx *stlc, unsigned long addr, u32 val)
641{
642 stlc45xx_spi_write(stlc, addr, &val, sizeof(val));
643}
644
645struct stlc45xx_spi_reg {
646 u16 address;
647 u16 length;
648 char *name;
649};
650
651/* caller must hold tx_lock */
652static void stlc45xx_txbuffer_dump(struct stlc45xx *stlc)
653{
654 struct txbuffer *txbuffer;
655 char *buf, *pos;
656 int buf_len, l, count;
657
658 if (!(DEBUG_LEVEL & DEBUG_TXBUFFER))
659 return;
660
661 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
662
663 buf_len = 500;
664 buf = kmalloc(buf_len, GFP_ATOMIC);
665 if (!buf)
666 return;
667
668 pos = buf;
669 count = 0;
670
671 list_for_each_entry(txbuffer, &stlc->txbuffer, buffer_list) {
672 l = snprintf(pos, buf_len, "0x%x-0x%x,",
673 txbuffer->start, txbuffer->end);
674 /* drop the null byte */
675 pos += l;
676 buf_len -= l;
677 count++;
678 }
679
680 if (count == 0)
681 *pos = '\0';
682 else
683 *--pos = '\0';
684
685 stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: in buffer %d regions: %s",
686 count, buf);
687
688 kfree(buf);
689}
690
691/* caller must hold tx_lock */
692static int stlc45xx_txbuffer_find(struct stlc45xx *stlc, size_t len)
693{
694 struct txbuffer *txbuffer;
695 int pos;
696
697 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
698
699 pos = FIRMWARE_TXBUFFER_START;
700
701 if (list_empty(&stlc->txbuffer))
702 goto out;
703
704 /*
705 * the entries in txbuffer must be in the same order as they are in
706 * the real buffer
707 */
708 list_for_each_entry(txbuffer, &stlc->txbuffer, buffer_list) {
709 if (pos + len < txbuffer->start)
710 break;
711 pos = ALIGN(txbuffer->end + 1, 4);
712 }
713
714 if (pos + len > FIRMWARE_TXBUFFER_END)
715 /* not enough room */
716 pos = -1;
717
718 stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: find %zu B: 0x%x", len, pos);
719
720out:
721 return pos;
722}
723
724static int stlc45xx_txbuffer_add(struct stlc45xx *stlc,
725 struct txbuffer *txbuffer)
726{
727 struct txbuffer *r, *prev = NULL;
728
729 if (list_empty(&stlc->txbuffer)) {
730 list_add(&txbuffer->buffer_list, &stlc->txbuffer);
731 return 0;
732 }
733
734 r = list_first_entry(&stlc->txbuffer, struct txbuffer, buffer_list);
735
736 if (txbuffer->start < r->start) {
737 /* add to the beginning of the list */
738 list_add(&txbuffer->buffer_list, &stlc->txbuffer);
739 return 0;
740 }
741
742 prev = NULL;
743 list_for_each_entry(r, &stlc->txbuffer, buffer_list) {
744 /* skip first entry, we checked for that above */
745 if (!prev) {
746 prev = r;
747 continue;
748 }
749
750 /* double-check overlaps */
751 WARN_ON_ONCE(txbuffer->start >= r->start &&
752 txbuffer->start <= r->end);
753 WARN_ON_ONCE(txbuffer->end >= r->start &&
754 txbuffer->end <= r->end);
755
756 if (prev->end < txbuffer->start &&
757 txbuffer->end < r->start) {
758 /* insert at this spot */
759 list_add_tail(&txbuffer->buffer_list, &r->buffer_list);
760 return 0;
761 }
762
763 prev = r;
764 }
765
766 /* not found */
767 list_add_tail(&txbuffer->buffer_list, &stlc->txbuffer);
768
769 return 0;
770
771}
772
773/* caller must hold tx_lock */
774static struct txbuffer *stlc45xx_txbuffer_alloc(struct stlc45xx *stlc,
775 size_t frame_len)
776{
777 struct txbuffer *entry = NULL;
778 size_t len;
779 int pos;
780
781 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
782
783 len = FIRMWARE_TXBUFFER_HEADER + frame_len + FIRMWARE_TXBUFFER_TRAILER;
784 pos = stlc45xx_txbuffer_find(stlc, len);
785
786 if (pos < 0)
787 return NULL;
788
789 WARN_ON_ONCE(pos + len > FIRMWARE_TXBUFFER_END);
790 WARN_ON_ONCE(pos < FIRMWARE_TXBUFFER_START);
791
792 entry = kmalloc(sizeof(*entry), GFP_ATOMIC);
793 entry->start = pos;
794 entry->frame_start = pos + FIRMWARE_TXBUFFER_HEADER;
795 entry->end = entry->start + len - 1;
796
797 stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: allocated 0x%x-0x%x",
798 entry->start, entry->end);
799
800 stlc45xx_txbuffer_add(stlc, entry);
801
802 stlc45xx_txbuffer_dump(stlc);
803
804 return entry;
805}
806
807/* caller must hold tx_lock */
808static void stlc45xx_txbuffer_free(struct stlc45xx *stlc,
809 struct txbuffer *txbuffer)
810{
811 stlc45xx_debug(DEBUG_FUNC, "%s()", __func__);
812
813 stlc45xx_debug(DEBUG_TXBUFFER, "txbuffer: freed 0x%x-0x%x",
814 txbuffer->start, txbuffer->end);
815
816 list_del(&txbuffer->buffer_list);
817 kfree(txbuffer);
818}
819
820
821static int stlc45xx_wait_bit(struct stlc45xx *stlc, u16 reg, u32 mask,
822 u32 expected)
823{
824 int i;
825 char buffer[4];
826
827 for (i = 0; i < 2000; i++) {
828 stlc45xx_spi_read(stlc, reg, buffer, sizeof(buffer));
829 if (((*(u32 *)buffer) & mask) == expected)
830 return 1;
831 msleep(1);
832 }
833
834 return 0;
835}
836
837static int stlc45xx_request_firmware(struct stlc45xx *stlc)
838{
839 const struct firmware *fw;
840 int ret;
841
842 /* FIXME: should driver use it's own struct device? */
843 ret = request_firmware(&fw, "3826.arm", &stlc->spi->dev);
844
845 if (ret < 0) {
846 stlc45xx_error("request_firmware() failed: %d", ret);
847 return ret;
848 }
849
850 if (fw->size % 4) {
851 stlc45xx_error("firmware size is not multiple of 32bit: %zu",
852 fw->size);
853 return -EILSEQ; /* Illegal byte sequence */;
854 }
855
856 if (fw->size < 1000) {
857 stlc45xx_error("firmware is too small: %zu", fw->size);
858 return -EILSEQ;
859 }
860
861 stlc->fw = kmemdup(fw->data, fw->size, GFP_KERNEL);
862 if (!stlc->fw) {
863 stlc45xx_error("could not allocate memory for firmware");
864 return -ENOMEM;
865 }
866
867 stlc->fw_len = fw->size;
868
869 release_firmware(fw);
870
871 return 0;
872}
873
874static int stlc45xx_upload_firmware(struct stlc45xx *stlc)
875{
876 struct s_dma_regs dma_regs;
877 unsigned long fw_len, fw_addr;
878 long _fw_len;
879 int ret;
880
881 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
882
883 if (!stlc->fw) {
884 ret = stlc45xx_request_firmware(stlc);
885 if (ret < 0)
886 return ret;
887 }
888
889 /* stop the device */
890 stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT,
891 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET
892 | SPI_CTRL_STAT_START_HALTED);
893
894 msleep(TARGET_BOOT_SLEEP);
895
896 stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT,
897 SPI_CTRL_STAT_HOST_OVERRIDE
898 | SPI_CTRL_STAT_START_HALTED);
899
900 msleep(TARGET_BOOT_SLEEP);
901
902 fw_addr = FIRMWARE_ADDRESS;
903 fw_len = stlc->fw_len;
904
905 while (fw_len > 0) {
906 _fw_len = (fw_len > SPI_MAX_PACKET_SIZE)
907 ? SPI_MAX_PACKET_SIZE : fw_len;
908 dma_regs.cmd = SPI_DMA_WRITE_CTRL_ENABLE;
909 dma_regs.len = cpu_to_le16(_fw_len);
910 dma_regs.addr = cpu_to_le32(fw_addr);
911
912 fw_len -= _fw_len;
913 fw_addr += _fw_len;
914
915 stlc45xx_write16(stlc, SPI_ADRS_DMA_WRITE_CTRL, dma_regs.cmd);
916
917 if (stlc45xx_wait_bit(stlc, SPI_ADRS_DMA_WRITE_CTRL,
918 HOST_ALLOWED, HOST_ALLOWED) == 0) {
919 stlc45xx_error("fw_upload not allowed to DMA write");
920 return -EAGAIN;
921 }
922
923 stlc45xx_write16(stlc, SPI_ADRS_DMA_WRITE_LEN, dma_regs.len);
924 stlc45xx_write32(stlc, SPI_ADRS_DMA_WRITE_BASE, dma_regs.addr);
925
926 stlc45xx_spi_write(stlc, SPI_ADRS_DMA_DATA, stlc->fw, _fw_len);
927
928 /* FIXME: I think this doesn't work if firmware is large,
929 * this loop goes to second round. fw->data is not
930 * increased at all! */
931 }
932
933 BUG_ON(fw_len != 0);
934
935 /* enable host interrupts */
936 stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_EN, SPI_HOST_INTS_DEFAULT);
937
938 /* boot the device */
939 stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT,
940 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET
941 | SPI_CTRL_STAT_RAM_BOOT);
942
943 msleep(TARGET_BOOT_SLEEP);
944
945 stlc45xx_write16(stlc, SPI_ADRS_DEV_CTRL_STAT,
946 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT);
947 msleep(TARGET_BOOT_SLEEP);
948
949 return 0;
950}
951
952/* caller must hold tx_lock */
953static void stlc45xx_check_txsent(struct stlc45xx *stlc)
954{
955 struct txbuffer *entry, *n;
956
957 list_for_each_entry_safe(entry, n, &stlc->tx_sent, tx_list) {
958 if (time_after(jiffies, entry->lifetime)) {
959 if (net_ratelimit())
960 stlc45xx_warning("frame 0x%x lifetime exceeded",
961 entry->start);
962 list_del(&entry->tx_list);
963 skb_pull(entry->skb, entry->header_len);
964 ieee80211_tx_status(stlc->hw, entry->skb);
965 stlc45xx_txbuffer_free(stlc, entry);
966 }
967 }
968}
969
970static void stlc45xx_power_off(struct stlc45xx *stlc)
971{
972 disable_irq(gpio_to_irq(stlc45xx_gpio_irq));
973 gpio_set_value(stlc45xx_gpio_power, 0);
974}
975
976static void stlc45xx_power_on(struct stlc45xx *stlc)
977{
978 gpio_set_value(stlc45xx_gpio_power, 1);
979 enable_irq(gpio_to_irq(stlc45xx_gpio_irq));
980
981 /*
982 * need to wait a while before device can be accessed, the length
983 * is just a guess
984 */
985 msleep(10);
986}
987
988/* caller must hold tx_lock */
989static void stlc45xx_flush_queues(struct stlc45xx *stlc)
990{
991 struct txbuffer *entry;
992
993 while (!list_empty(&stlc->tx_sent)) {
994 entry = list_first_entry(&stlc->tx_sent,
995 struct txbuffer, tx_list);
996 list_del(&entry->tx_list);
997 dev_kfree_skb(entry->skb);
998 stlc45xx_txbuffer_free(stlc, entry);
999 }
1000
1001 WARN_ON(!list_empty(&stlc->tx_sent));
1002
1003 while (!list_empty(&stlc->tx_pending)) {
1004 entry = list_first_entry(&stlc->tx_pending,
1005 struct txbuffer, tx_list);
1006 list_del(&entry->tx_list);
1007 dev_kfree_skb(entry->skb);
1008 stlc45xx_txbuffer_free(stlc, entry);
1009 }
1010
1011 WARN_ON(!list_empty(&stlc->tx_pending));
1012 WARN_ON(!list_empty(&stlc->txbuffer));
1013}
1014
1015static void stlc45xx_work_reset(struct work_struct *work)
1016{
1017 struct stlc45xx *stlc = container_of(work, struct stlc45xx,
1018 work_reset);
1019
1020 mutex_lock(&stlc->mutex);
1021
1022 if (stlc->fw_state != FW_STATE_RESET)
1023 goto out;
1024
1025 stlc45xx_power_off(stlc);
1026
1027 mutex_unlock(&stlc->mutex);
1028
1029 /* wait that all work_structs have finished, we can't hold
1030 * stlc->mutex to avoid deadlock */
1031 cancel_work_sync(&stlc->work);
1032
1033 /* FIXME: find out good value to wait for chip power down */
1034 msleep(100);
1035
1036 mutex_lock(&stlc->mutex);
1037
1038 /* FIXME: we should gracefully handle if the state has changed
1039 * after re-acquiring mutex */
1040 WARN_ON(stlc->fw_state != FW_STATE_RESET);
1041
1042 spin_lock_bh(&stlc->tx_lock);
1043 stlc45xx_flush_queues(stlc);
1044 spin_unlock_bh(&stlc->tx_lock);
1045
1046 stlc->fw_state = FW_STATE_RESETTING;
1047
1048 stlc45xx_power_on(stlc);
1049 stlc45xx_upload_firmware(stlc);
1050
1051out:
1052 mutex_unlock(&stlc->mutex);
1053}
1054
1055/* caller must hold mutex */
1056static void stlc45xx_reset(struct stlc45xx *stlc)
1057{
1058 stlc45xx_warning("resetting firmware");
1059 stlc->fw_state = FW_STATE_RESET;
1060 ieee80211_stop_queues(stlc->hw);
1061 queue_work(stlc->hw->workqueue, &stlc->work_reset);
1062}
1063
1064static void stlc45xx_work_tx_timeout(struct work_struct *work)
1065{
1066 struct stlc45xx *stlc = container_of(work, struct stlc45xx,
1067 work_tx_timeout.work);
1068
1069 stlc45xx_warning("tx timeout");
1070
1071 mutex_lock(&stlc->mutex);
1072
1073 if (stlc->fw_state != FW_STATE_READY)
1074 goto out;
1075
1076 stlc45xx_reset(stlc);
1077
1078out:
1079 mutex_unlock(&stlc->mutex);
1080}
1081
1082static void stlc45xx_int_ack(struct stlc45xx *stlc, u32 val)
1083{
1084 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1085
1086 stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_ACK, val);
1087}
1088
1089static void stlc45xx_wakeup(struct stlc45xx *stlc)
1090{
1091 unsigned long timeout;
1092 u32 ints;
1093
1094 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1095
1096 /* wake the chip */
1097 stlc45xx_write32(stlc, SPI_ADRS_ARM_INTERRUPTS, SPI_TARGET_INT_WAKEUP);
1098
1099 /* And wait for the READY interrupt */
1100 timeout = jiffies + HZ;
1101
1102 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1103 while (!(ints & SPI_HOST_INT_READY)) {
1104 if (time_after(jiffies, timeout))
1105 goto out;
1106 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1107 }
1108
1109 stlc45xx_int_ack(stlc, SPI_HOST_INT_READY);
1110
1111out:
1112 return;
1113}
1114
1115static void stlc45xx_sleep(struct stlc45xx *stlc)
1116{
1117 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1118
1119 stlc45xx_write32(stlc, SPI_ADRS_ARM_INTERRUPTS, SPI_TARGET_INT_SLEEP);
1120}
1121
1122static void stlc45xx_int_ready(struct stlc45xx *stlc)
1123{
1124 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1125
1126 stlc45xx_write32(stlc, SPI_ADRS_HOST_INT_EN,
1127 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE);
1128
1129 switch (stlc->fw_state) {
1130 case FW_STATE_BOOTING:
1131 stlc->fw_state = FW_STATE_READY;
1132 complete(&stlc->fw_comp);
1133 break;
1134 case FW_STATE_RESETTING:
1135 stlc->fw_state = FW_STATE_READY;
1136
1137 stlc45xx_tx_scan(stlc);
1138 stlc45xx_tx_setup(stlc);
1139 stlc45xx_tx_edcf(stlc);
1140
1141 ieee80211_wake_queues(stlc->hw);
1142 break;
1143 default:
1144 break;
1145 }
1146}
1147
1148static int stlc45xx_rx_txack(struct stlc45xx *stlc, struct sk_buff *skb)
1149{
1150 struct ieee80211_tx_info *info;
1151 struct s_lm_control *control;
1152 struct s_lmo_tx *tx;
1153 struct txbuffer *entry;
1154 int found = 0;
1155
1156 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1157
1158 control = (struct s_lm_control *) skb->data;
1159 tx = (struct s_lmo_tx *) (control + 1);
1160
1161 if (list_empty(&stlc->tx_sent)) {
1162 if (net_ratelimit())
1163 stlc45xx_warning("no frames waiting for "
1164 "acknowledgement");
1165 return -1;
1166 }
1167
1168 list_for_each_entry(entry, &stlc->tx_sent, tx_list) {
1169 if (control->handle == entry->handle) {
1170 found = 1;
1171 break;
1172 }
1173 }
1174
1175 if (!found) {
1176 if (net_ratelimit())
1177 stlc45xx_warning("couldn't find frame for tx ack 0x%x",
1178 control->handle);
1179 return -1;
1180 }
1181
1182 stlc45xx_debug(DEBUG_TX, "TX ACK 0x%x", entry->handle);
1183
1184 if (entry->status_needed) {
1185 info = IEEE80211_SKB_CB(entry->skb);
1186
1187 if (!(tx->flags & LM_TX_FAILED)) {
1188 /* frame was acked */
1189 info->flags |= IEEE80211_TX_STAT_ACK;
1190 info->status.ack_signal = tx->rcpi / 2 - 110;
1191 }
1192
1193 skb_pull(entry->skb, entry->header_len);
1194
1195 ieee80211_tx_status(stlc->hw, entry->skb);
1196 }
1197
1198 list_del(&entry->tx_list);
1199
1200 stlc45xx_check_txsent(stlc);
1201 if (list_empty(&stlc->tx_sent))
1202 /* there are no pending frames, we can stop the tx timeout
1203 * timer */
1204 cancel_delayed_work(&stlc->work_tx_timeout);
1205
1206 spin_lock_bh(&stlc->tx_lock);
1207
1208 stlc45xx_txbuffer_free(stlc, entry);
1209
1210 if (stlc->tx_queue_stopped &&
1211 stlc45xx_txbuffer_find(stlc, MAX_FRAME_LEN) != -1) {
1212 stlc45xx_debug(DEBUG_QUEUE, "room in tx buffer, waking queues");
1213 ieee80211_wake_queues(stlc->hw);
1214 stlc->tx_queue_stopped = 0;
1215 }
1216
1217 spin_unlock_bh(&stlc->tx_lock);
1218
1219 return 0;
1220}
1221
1222static int stlc45xx_rx_control(struct stlc45xx *stlc, struct sk_buff *skb)
1223{
1224 struct s_lm_control *control;
1225 int ret = 0;
1226
1227 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1228
1229 control = (struct s_lm_control *) skb->data;
1230
1231 switch (control->oid) {
1232 case LM_OID_TX:
1233 ret = stlc45xx_rx_txack(stlc, skb);
1234 break;
1235 case LM_OID_SETUP:
1236 case LM_OID_SCAN:
1237 case LM_OID_TRAP:
1238 case LM_OID_EDCF:
1239 case LM_OID_KEYCACHE:
1240 case LM_OID_PSM:
1241 case LM_OID_STATS:
1242 case LM_OID_LED:
1243 default:
1244 stlc45xx_warning("unhandled rx control oid %d\n",
1245 control->oid);
1246 break;
1247 }
1248
1249 dev_kfree_skb(skb);
1250
1251 return ret;
1252}
1253
1254/* copied from mac80211 */
1255static void stlc45xx_parse_elems(u8 *start, size_t len,
1256 struct stlc45xx_ie_tim **tim,
1257 size_t *tim_len)
1258{
1259 size_t left = len;
1260 u8 *pos = start;
1261
1262 while (left >= 2) {
1263 u8 id, elen;
1264
1265 id = *pos++;
1266 elen = *pos++;
1267 left -= 2;
1268
1269 if (elen > left)
1270 return;
1271
1272 switch (id) {
1273 case WLAN_EID_TIM:
1274 *tim = (struct stlc45xx_ie_tim *) pos;
1275 *tim_len = elen;
1276 break;
1277 default:
1278 break;
1279 }
1280
1281 left -= elen;
1282 pos += elen;
1283 }
1284}
1285
1286/*
1287 * mac80211 doesn't have support for asking frames with PS-Poll, so let's
1288 * implement in the driver for now. We have to add support to mac80211
1289 * later.
1290 */
1291static int stlc45xx_check_more_data(struct stlc45xx *stlc, struct sk_buff *skb)
1292{
1293 struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data;
1294 struct ieee80211_hdr *hdr;
1295 size_t len;
1296 u16 fc;
1297
1298 hdr = (void *) skb->data + sizeof(*data);
1299 len = skb->len - sizeof(*data);
1300
1301 /* minimum frame length is the null frame length 24 bytes */
1302 if (len < 24) {
1303 stlc45xx_warning("invalid frame length when checking for "
1304 "more data");
1305 return -EINVAL;
1306 }
1307
1308 fc = le16_to_cpu(hdr->frame_control);
1309 if (!(fc & IEEE80211_FCTL_FROMDS))
1310 /* this is not from DS */
1311 return 0;
1312
1313 if (compare_ether_addr(hdr->addr1, stlc->mac_addr) != 0)
1314 /* the frame was not for us */
1315 return 0;
1316
1317 if (!(fc & IEEE80211_FCTL_MOREDATA)) {
1318 /* AP has no more frames buffered for us */
1319 stlc45xx_debug(DEBUG_PSM, "all buffered frames retrieved");
1320 stlc->pspolling = false;
1321 return 0;
1322 }
1323
1324 /* MOREDATA bit is set, let's ask for a new frame from the AP */
1325 stlc45xx_tx_pspoll(stlc, stlc->psm);
1326
1327 return 0;
1328}
1329
1330/*
1331 * mac80211 cannot read TIM from beacons, so let's add a hack to the
1332 * driver. We have to add support to mac80211 later.
1333 */
1334static int stlc45xx_rx_data_beacon(struct stlc45xx *stlc, struct sk_buff *skb)
1335{
1336 struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data;
1337 size_t len = skb->len, tim_len = 0, baselen, pvbmap_len;
1338 struct ieee80211_mgmt *mgmt;
1339 struct stlc45xx_ie_tim *tim = NULL;
1340 int bmap_offset, index, aid_bit;
1341
1342 mgmt = (void *) skb->data + sizeof(*data);
1343
1344 baselen = (u8 *) mgmt->u.beacon.variable - (u8 *) mgmt;
1345 if (baselen > len) {
1346 stlc45xx_warning("invalid baselen in beacon");
1347 return -EINVAL;
1348 }
1349
1350 stlc45xx_parse_elems(mgmt->u.beacon.variable, len - baselen, &tim,
1351 &tim_len);
1352
1353 if (!tim) {
1354 stlc45xx_warning("didn't find tim from a beacon");
1355 return -EINVAL;
1356 }
1357
1358 bmap_offset = tim->bmap_control & 0xfe;
1359 index = stlc->aid / 8 - bmap_offset;
1360
1361 pvbmap_len = tim_len - 3;
1362 if (index > pvbmap_len)
1363 return -EINVAL;
1364
1365 aid_bit = !!(tim->pvbmap[index] & (1 << stlc->aid % 8));
1366
1367 stlc45xx_debug(DEBUG_PSM, "fc 0x%x duration %d seq %d dtim %u "
1368 "bmap_control 0x%x aid_bit %d",
1369 mgmt->frame_control, mgmt->duration, mgmt->seq_ctrl >> 4,
1370 tim->dtim_count, tim->bmap_control, aid_bit);
1371
1372 if (!aid_bit)
1373 return 0;
1374
1375 stlc->pspolling = true;
1376 stlc45xx_tx_pspoll(stlc, stlc->psm);
1377
1378 return 0;
1379}
1380
1381static int stlc45xx_rx_data(struct stlc45xx *stlc, struct sk_buff *skb)
1382{
1383 struct ieee80211_rx_status status;
1384 struct s_lm_data_in *data = (struct s_lm_data_in *) skb->data;
1385 int align = 0;
1386 u8 *p, align_len;
1387 u16 len;
1388
1389 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1390
1391 if (stlc->psm) {
1392 if (data->flags & LM_IN_BEACON)
1393 stlc45xx_rx_data_beacon(stlc, skb);
1394 else if (stlc->pspolling && (data->flags & LM_IN_DATA))
1395 stlc45xx_check_more_data(stlc, skb);
1396 }
1397
1398 memset(&status, 0, sizeof(status));
1399
1400 status.freq = data->frequency;
1401 status.signal = data->rcpi / 2 - 110;
1402
1403 /* let's assume that maximum rcpi value is 140 (= 35 dBm) */
1404 status.qual = data->rcpi * 100 / 140;
1405
1406 status.band = IEEE80211_BAND_2GHZ;
1407
1408 /*
1409 * FIXME: this gives warning from __ieee80211_rx()
1410 *
1411 * status.rate_idx = data->rate;
1412 */
1413
1414 len = data->length;
1415
1416 if (data->flags & LM_FLAG_ALIGN)
1417 align = 1;
1418
1419 skb_pull(skb, sizeof(*data));
1420
1421 if (align) {
1422 p = skb->data;
1423 align_len = *p;
1424 skb_pull(skb, align_len);
1425 }
1426
1427 skb_trim(skb, len);
1428
1429 stlc45xx_debug(DEBUG_RX, "rx data 0x%p %d B", skb->data, skb->len);
1430 stlc45xx_dump(DEBUG_RX_CONTENT, skb->data, skb->len);
1431
1432 memcpy(IEEE80211_SKB_RXCB(skb), &status, sizeof(status));
1433 ieee80211_rx(stlc->hw, skb);
1434
1435 return 0;
1436}
1437
1438
1439
1440static int stlc45xx_rx(struct stlc45xx *stlc)
1441{
1442 struct s_lm_control *control;
1443 struct sk_buff *skb;
1444 int ret;
1445 u16 len;
1446
1447 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1448
1449 stlc45xx_wakeup(stlc);
1450
1451 /* dummy read to flush SPI DMA controller bug */
1452 stlc45xx_read16(stlc, SPI_ADRS_GEN_PURP_1);
1453
1454 len = stlc45xx_read16(stlc, SPI_ADRS_DMA_DATA);
1455
1456 if (len == 0) {
1457 stlc45xx_warning("rx request of zero bytes");
1458 return 0;
1459 }
1460
1461 skb = dev_alloc_skb(len);
1462 if (!skb) {
1463 stlc45xx_warning("could not alloc skb");
1464 return 0;
1465 }
1466
1467 stlc45xx_spi_read(stlc, SPI_ADRS_DMA_DATA, skb_put(skb, len), len);
1468
1469 stlc45xx_sleep(stlc);
1470
1471 stlc45xx_debug(DEBUG_RX, "rx frame 0x%p %d B", skb->data, skb->len);
1472 stlc45xx_dump(DEBUG_RX_CONTENT, skb->data, skb->len);
1473
1474 control = (struct s_lm_control *) skb->data;
1475
1476 if (control->flags & LM_FLAG_CONTROL)
1477 ret = stlc45xx_rx_control(stlc, skb);
1478 else
1479 ret = stlc45xx_rx_data(stlc, skb);
1480
1481 return ret;
1482}
1483
1484
1485static irqreturn_t stlc45xx_interrupt(int irq, void *config)
1486{
1487 struct spi_device *spi = config;
1488 struct stlc45xx *stlc = dev_get_drvdata(&spi->dev);
1489
1490 stlc45xx_debug(DEBUG_IRQ, "IRQ");
1491
1492 queue_work(stlc->hw->workqueue, &stlc->work);
1493
1494 return IRQ_HANDLED;
1495}
1496
1497static int stlc45xx_tx_frame(struct stlc45xx *stlc, u32 address,
1498 void *buf, size_t len)
1499{
1500 struct s_dma_regs dma_regs;
1501 unsigned long timeout;
1502 int ret = 0;
1503 u32 ints;
1504
1505 stlc->tx_frames++;
1506
1507 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1508
1509 stlc45xx_debug(DEBUG_TX, "tx frame 0x%p %zu B", buf, len);
1510 stlc45xx_dump(DEBUG_TX_CONTENT, buf, len);
1511
1512 stlc45xx_wakeup(stlc);
1513
1514 dma_regs.cmd = SPI_DMA_WRITE_CTRL_ENABLE;
1515 dma_regs.len = cpu_to_le16(len);
1516 dma_regs.addr = cpu_to_le32(address);
1517
1518 stlc45xx_spi_write(stlc, SPI_ADRS_DMA_WRITE_CTRL, &dma_regs,
1519 sizeof(dma_regs));
1520
1521 stlc45xx_spi_write(stlc, SPI_ADRS_DMA_DATA, buf, len);
1522
1523 timeout = jiffies + 2 * HZ;
1524 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1525 while (!(ints & SPI_HOST_INT_WR_READY)) {
1526 if (time_after(jiffies, timeout)) {
1527 stlc45xx_warning("WR_READY timeout");
1528 ret = -1;
1529 goto out;
1530 }
1531 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1532 }
1533
1534 stlc45xx_int_ack(stlc, SPI_HOST_INT_WR_READY);
1535
1536 stlc45xx_sleep(stlc);
1537
1538out:
1539 return ret;
1540}
1541
1542static int stlc45xx_wq_tx(struct stlc45xx *stlc)
1543{
1544 struct txbuffer *entry;
1545 int ret = 0;
1546
1547 spin_lock_bh(&stlc->tx_lock);
1548
1549 while (!list_empty(&stlc->tx_pending)) {
1550 entry = list_entry(stlc->tx_pending.next,
1551 struct txbuffer, tx_list);
1552
1553 list_del_init(&entry->tx_list);
1554
1555 spin_unlock_bh(&stlc->tx_lock);
1556
1557 ret = stlc45xx_tx_frame(stlc, entry->frame_start,
1558 entry->skb->data, entry->skb->len);
1559
1560 spin_lock_bh(&stlc->tx_lock);
1561
1562 if (ret < 0) {
1563 /* frame transfer to firmware buffer failed */
1564 /* FIXME: report this to mac80211 */
1565 dev_kfree_skb(entry->skb);
1566 stlc45xx_txbuffer_free(stlc, entry);
1567 goto out;
1568 }
1569
1570 list_add(&entry->tx_list, &stlc->tx_sent);
1571 queue_delayed_work(stlc->hw->workqueue,
1572 &stlc->work_tx_timeout,
1573 msecs_to_jiffies(TX_TIMEOUT));
1574 }
1575
1576out:
1577 spin_unlock_bh(&stlc->tx_lock);
1578 return ret;
1579}
1580
1581static void stlc45xx_work(struct work_struct *work)
1582{
1583 struct stlc45xx *stlc = container_of(work, struct stlc45xx, work);
1584 u32 ints;
1585 int ret;
1586
1587 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1588
1589 mutex_lock(&stlc->mutex);
1590
1591 if (stlc->fw_state == FW_STATE_OFF &&
1592 stlc->fw_state == FW_STATE_RESET)
1593 goto out;
1594
1595 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1596 stlc45xx_debug(DEBUG_BH, "begin host_ints 0x%08x", ints);
1597
1598 if (ints & SPI_HOST_INT_READY) {
1599 stlc45xx_int_ready(stlc);
1600 stlc45xx_int_ack(stlc, SPI_HOST_INT_READY);
1601 }
1602
1603 if (stlc->fw_state != FW_STATE_READY)
1604 goto out;
1605
1606 if (ints & SPI_HOST_INT_UPDATE) {
1607 stlc45xx_int_ack(stlc, SPI_HOST_INT_UPDATE);
1608 ret = stlc45xx_rx(stlc);
1609 if (ret < 0) {
1610 stlc45xx_reset(stlc);
1611 goto out;
1612 }
1613 }
1614 if (ints & SPI_HOST_INT_SW_UPDATE) {
1615 stlc45xx_int_ack(stlc, SPI_HOST_INT_SW_UPDATE);
1616 ret = stlc45xx_rx(stlc);
1617 if (ret < 0) {
1618 stlc45xx_reset(stlc);
1619 goto out;
1620 }
1621 }
1622
1623 ret = stlc45xx_wq_tx(stlc);
1624 if (ret < 0) {
1625 stlc45xx_reset(stlc);
1626 goto out;
1627 }
1628
1629 ints = stlc45xx_read32(stlc, SPI_ADRS_HOST_INTERRUPTS);
1630 stlc45xx_debug(DEBUG_BH, "end host_ints 0x%08x", ints);
1631
1632out:
1633 mutex_unlock(&stlc->mutex);
1634}
1635
1636static void stlc45xx_tx_edcf(struct stlc45xx *stlc)
1637{
1638 struct s_lm_control *control;
1639 struct s_lmo_edcf *edcf;
1640 size_t len, edcf_len;
1641
1642 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1643
1644 edcf_len = sizeof(*edcf);
1645 len = sizeof(*control) + edcf_len;
1646 control = kzalloc(len, GFP_KERNEL);
1647 edcf = (struct s_lmo_edcf *) (control + 1);
1648
1649 control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET;
1650 control->length = edcf_len;
1651 control->oid = LM_OID_EDCF;
1652
1653 edcf->slottime = 0x14;
1654 edcf->sifs = 10;
1655 edcf->eofpad = 6;
1656 edcf->maxburst = 1500;
1657
1658 edcf->queues[0].aifs = 2;
1659 edcf->queues[0].pad0 = 1;
1660 edcf->queues[0].cwmin = 3;
1661 edcf->queues[0].cwmax = 7;
1662 edcf->queues[0].txop = 47;
1663 edcf->queues[1].aifs = 2;
1664 edcf->queues[1].pad0 = 0;
1665 edcf->queues[1].cwmin = 7;
1666 edcf->queues[1].cwmax = 15;
1667 edcf->queues[1].txop = 94;
1668 edcf->queues[2].aifs = 3;
1669 edcf->queues[2].pad0 = 0;
1670 edcf->queues[2].cwmin = 15;
1671 edcf->queues[2].cwmax = 1023;
1672 edcf->queues[2].txop = 0;
1673 edcf->queues[3].aifs = 7;
1674 edcf->queues[3].pad0 = 0;
1675 edcf->queues[3].cwmin = 15;
1676 edcf->queues[3].cwmax = 1023;
1677 edcf->queues[3].txop = 0;
1678 edcf->queues[4].aifs = 13;
1679 edcf->queues[4].pad0 = 99;
1680 edcf->queues[4].cwmin = 3437;
1681 edcf->queues[4].cwmax = 512;
1682 edcf->queues[4].txop = 12;
1683 edcf->queues[5].aifs = 142;
1684 edcf->queues[5].pad0 = 109;
1685 edcf->queues[5].cwmin = 8756;
1686 edcf->queues[5].cwmax = 6;
1687 edcf->queues[5].txop = 0;
1688 edcf->queues[6].aifs = 4;
1689 edcf->queues[6].pad0 = 0;
1690 edcf->queues[6].cwmin = 0;
1691 edcf->queues[6].cwmax = 58705;
1692 edcf->queues[6].txop = 25716;
1693 edcf->queues[7].aifs = 0;
1694 edcf->queues[7].pad0 = 0;
1695 edcf->queues[7].cwmin = 0;
1696 edcf->queues[7].cwmax = 0;
1697 edcf->queues[7].txop = 0;
1698
1699 stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len);
1700
1701 kfree(control);
1702}
1703
1704static void stlc45xx_tx_setup(struct stlc45xx *stlc)
1705{
1706 struct s_lm_control *control;
1707 struct s_lmo_setup *setup;
1708 size_t len, setup_len;
1709
1710 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1711
1712 setup_len = sizeof(*setup);
1713 len = sizeof(*control) + setup_len;
1714 control = kzalloc(len, GFP_KERNEL);
1715 setup = (struct s_lmo_setup *) (control + 1);
1716
1717 control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET;
1718 control->length = setup_len;
1719 control->oid = LM_OID_SETUP;
1720
1721 setup->flags = LM_SETUP_INFRA;
1722 setup->antenna = 2;
1723 setup->rx_align = 0;
1724 setup->rx_buffer = FIRMWARE_RXBUFFER_START;
1725 setup->rx_mtu = FIRMWARE_MTU;
1726 setup->frontend = 5;
1727 setup->timeout = 0;
1728 setup->truncate = 48896;
1729 setup->bratemask = 0xffffffff;
1730 setup->ref_clock = 644245094;
1731 setup->lpf_bandwidth = 65535;
1732 setup->osc_start_delay = 65535;
1733
1734 memcpy(setup->macaddr, stlc->mac_addr, ETH_ALEN);
1735 memcpy(setup->bssid, stlc->bssid, ETH_ALEN);
1736
1737 stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len);
1738
1739 kfree(control);
1740}
1741
1742static void stlc45xx_tx_scan(struct stlc45xx *stlc)
1743{
1744 struct s_lm_control *control;
1745 struct s_lmo_scan *scan;
1746 size_t len, scan_len;
1747
1748 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
1749
1750 scan_len = sizeof(*scan);
1751 len = sizeof(*control) + scan_len;
1752 control = kzalloc(len, GFP_KERNEL);
1753 scan = (struct s_lmo_scan *) (control + 1);
1754
1755 control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET;
1756 control->length = scan_len;
1757 control->oid = LM_OID_SCAN;
1758
1759 scan->flags = LM_SCAN_EXIT;
1760 scan->bratemask = 0x15f;
1761 scan->aloft[0] = 3;
1762 scan->aloft[1] = 3;
1763 scan->aloft[2] = 1;
1764 scan->aloft[3] = 0;
1765 scan->aloft[4] = 0;
1766 scan->aloft[5] = 0;
1767 scan->aloft[6] = 0;
1768 scan->aloft[7] = 0;
1769
1770 memcpy(&scan->rssical, &stlc->cal_rssi[(stlc->channel - 1) *
1771 RSSI_CAL_LEN],
1772 RSSI_CAL_LEN);
1773 memcpy(&scan->channel, &stlc->cal_channels[(stlc->channel - 1) *
1774 CHANNEL_CAL_LEN],
1775 CHANNEL_CAL_LEN);
1776
1777 stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len);
1778
1779 kfree(control);
1780}
1781
1782/*
1783 * caller must hold mutex
1784 */
1785static int stlc45xx_tx_pspoll(struct stlc45xx *stlc, bool powersave)
1786{
1787 struct ieee80211_hdr *pspoll;
1788 int payload_len, padding, i;
1789 struct s_lm_data_out *data;
1790 struct txbuffer *entry;
1791 struct sk_buff *skb;
1792 char *payload;
1793 u16 fc;
1794
1795 skb = dev_alloc_skb(stlc->hw->extra_tx_headroom + 16);
1796 if (!skb) {
1797 stlc45xx_warning("failed to allocate pspoll frame");
1798 return -ENOMEM;
1799 }
1800 skb_reserve(skb, stlc->hw->extra_tx_headroom);
1801
1802 pspoll = (struct ieee80211_hdr *) skb_put(skb, 16);
1803 memset(pspoll, 0, 16);
1804 fc = IEEE80211_FTYPE_CTL | IEEE80211_STYPE_PSPOLL;
1805 if (powersave)
1806 fc |= IEEE80211_FCTL_PM;
1807 pspoll->frame_control = cpu_to_le16(fc);
1808 pspoll->duration_id = cpu_to_le16(stlc->aid);
1809
1810 /* aid in PS-Poll has its two MSBs each set to 1 */
1811 pspoll->duration_id |= cpu_to_le16(1 << 15) | cpu_to_le16(1 << 14);
1812
1813 memcpy(pspoll->addr1, stlc->bssid, ETH_ALEN);
1814 memcpy(pspoll->addr2, stlc->mac_addr, ETH_ALEN);
1815
1816 stlc45xx_debug(DEBUG_PSM, "sending PS-Poll frame to %pM (powersave %d, "
1817 "fc 0x%x, aid %d)", pspoll->addr1,
1818 powersave, fc, stlc->aid);
1819
1820 spin_lock_bh(&stlc->tx_lock);
1821
1822 entry = stlc45xx_txbuffer_alloc(stlc, skb->len);
1823
1824 spin_unlock_bh(&stlc->tx_lock);
1825
1826 if (!entry) {
1827 /*
1828 * The queue should be stopped before the firmware buffer
1829 * is full, so firmware buffer should always have enough
1830 * space.
1831 *
1832 * But I'm too lazy and omit it for now.
1833 */
1834 if (net_ratelimit())
1835 stlc45xx_warning("firmware tx buffer full is full "
1836 "for null frame");
1837 return -ENOSPC;
1838 }
1839
1840 payload = skb->data;
1841 payload_len = skb->len;
1842 padding = (int) (skb->data - sizeof(*data)) & 3;
1843 entry->header_len = sizeof(*data) + padding;
1844
1845 entry->skb = skb;
1846 entry->status_needed = false;
1847 entry->handle = (u32) skb;
1848 entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME);
1849
1850 stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B "
1851 "padding %d header_len %d)",
1852 entry->handle, payload, payload_len, padding,
1853 entry->header_len);
1854 stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len);
1855
1856 data = (struct s_lm_data_out *) skb_push(skb, entry->header_len);
1857
1858 memset(data, 0, entry->header_len);
1859
1860 if (padding)
1861 data->flags = LM_FLAG_ALIGN;
1862
1863 data->flags = LM_OUT_BURST;
1864 data->length = payload_len;
1865 data->handle = entry->handle;
1866 data->aid = 1;
1867 data->rts_retries = 7;
1868 data->retries = 7;
1869 data->aloft_ctrl = 0;
1870 data->crypt_offset = 58;
1871 data->keytype = 0;
1872 data->keylen = 0;
1873 data->queue = LM_QUEUE_DATA3;
1874 data->backlog = 32;
1875 data->antenna = 2;
1876 data->cts = 3;
1877 data->power = 127;
1878
1879 for (i = 0; i < 8; i++)
1880 data->aloft[i] = 0;
1881
1882 /*
1883 * check if there's enough space in tx buffer
1884 *
1885 * FIXME: ignored for now
1886 */
1887
1888 stlc45xx_tx_frame(stlc, entry->start, skb->data, skb->len);
1889
1890 list_add(&entry->tx_list, &stlc->tx_sent);
1891
1892 return 0;
1893}
1894
1895/*
1896 * caller must hold mutex
1897 *
1898 * shamelessly stolen from mac80211/ieee80211_send_nullfunc
1899 */
1900static int stlc45xx_tx_nullfunc(struct stlc45xx *stlc, bool powersave)
1901{
1902 struct ieee80211_hdr *nullfunc;
1903 int payload_len, padding, i;
1904 struct s_lm_data_out *data;
1905 struct txbuffer *entry;
1906 struct sk_buff *skb;
1907 char *payload;
1908 u16 fc;
1909
1910 skb = dev_alloc_skb(stlc->hw->extra_tx_headroom + 24);
1911 if (!skb) {
1912 stlc45xx_warning("failed to allocate buffer for null frame\n");
1913 return -ENOMEM;
1914 }
1915 skb_reserve(skb, stlc->hw->extra_tx_headroom);
1916
1917 nullfunc = (struct ieee80211_hdr *) skb_put(skb, 24);
1918 memset(nullfunc, 0, 24);
1919 fc = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC |
1920 IEEE80211_FCTL_TODS;
1921
1922 if (powersave)
1923 fc |= IEEE80211_FCTL_PM;
1924
1925 nullfunc->frame_control = cpu_to_le16(fc);
1926 memcpy(nullfunc->addr1, stlc->bssid, ETH_ALEN);
1927 memcpy(nullfunc->addr2, stlc->mac_addr, ETH_ALEN);
1928 memcpy(nullfunc->addr3, stlc->bssid, ETH_ALEN);
1929
1930 stlc45xx_debug(DEBUG_PSM, "sending Null frame to %pM (powersave %d, "
1931 "fc 0x%x)", nullfunc->addr1, powersave, fc);
1932
1933 spin_lock_bh(&stlc->tx_lock);
1934
1935 entry = stlc45xx_txbuffer_alloc(stlc, skb->len);
1936
1937 spin_unlock_bh(&stlc->tx_lock);
1938
1939 if (!entry) {
1940 /*
1941 * The queue should be stopped before the firmware buffer
1942 * is full, so firmware buffer should always have enough
1943 * space.
1944 *
1945 * But I'm too lazy and omit it for now.
1946 */
1947 if (net_ratelimit())
1948 stlc45xx_warning("firmware tx buffer full is full "
1949 "for null frame");
1950 return -ENOSPC;
1951 }
1952
1953 payload = skb->data;
1954 payload_len = skb->len;
1955 padding = (int) (skb->data - sizeof(*data)) & 3;
1956 entry->header_len = sizeof(*data) + padding;
1957
1958 entry->skb = skb;
1959 entry->status_needed = false;
1960 entry->handle = (u32) skb;
1961 entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME);
1962
1963 stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B "
1964 "padding %d header_len %d)",
1965 entry->handle, payload, payload_len, padding,
1966 entry->header_len);
1967 stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len);
1968
1969 data = (struct s_lm_data_out *) skb_push(skb, entry->header_len);
1970
1971 memset(data, 0, entry->header_len);
1972
1973 if (padding)
1974 data->flags = LM_FLAG_ALIGN;
1975
1976 data->flags = LM_OUT_BURST;
1977 data->length = payload_len;
1978 data->handle = entry->handle;
1979 data->aid = 1;
1980 data->rts_retries = 7;
1981 data->retries = 7;
1982 data->aloft_ctrl = 0;
1983 data->crypt_offset = 58;
1984 data->keytype = 0;
1985 data->keylen = 0;
1986 data->queue = LM_QUEUE_DATA3;
1987 data->backlog = 32;
1988 data->antenna = 2;
1989 data->cts = 3;
1990 data->power = 127;
1991
1992 for (i = 0; i < 8; i++)
1993 data->aloft[i] = 0;
1994
1995 /*
1996 * check if there's enough space in tx buffer
1997 *
1998 * FIXME: ignored for now
1999 */
2000
2001 stlc45xx_tx_frame(stlc, entry->start, skb->data, skb->len);
2002
2003 list_add(&entry->tx_list, &stlc->tx_sent);
2004
2005 return 0;
2006}
2007
2008/* caller must hold mutex */
2009static void stlc45xx_tx_psm(struct stlc45xx *stlc, bool enable)
2010{
2011 struct s_lm_control *control;
2012 struct s_lmo_psm *psm;
2013 size_t len, psm_len;
2014
2015 WARN_ON(!stlc->associated);
2016 WARN_ON(stlc->aid < 1);
2017 WARN_ON(stlc->aid > 2007);
2018
2019 psm_len = sizeof(*psm);
2020 len = sizeof(*control) + psm_len;
2021 control = kzalloc(len, GFP_KERNEL);
2022 psm = (struct s_lmo_psm *) (control + 1);
2023
2024 control->flags = LM_FLAG_CONTROL | LM_CTRL_OPSET;
2025 control->length = psm_len;
2026 control->oid = LM_OID_PSM;
2027
2028 if (enable)
2029 psm->flags |= LM_PSM;
2030
2031 psm->aid = stlc->aid;
2032
2033 psm->beacon_rcpi_skip_max = 60;
2034
2035 psm->intervals[0].interval = 1;
2036 psm->intervals[0].periods = 1;
2037 psm->intervals[1].interval = 1;
2038 psm->intervals[1].periods = 1;
2039 psm->intervals[2].interval = 1;
2040 psm->intervals[2].periods = 1;
2041 psm->intervals[3].interval = 1;
2042 psm->intervals[3].periods = 1;
2043
2044 psm->nr = 0;
2045 psm->exclude[0] = 0;
2046
2047 stlc45xx_debug(DEBUG_PSM, "sending LM_OID_PSM (aid %d, interval %d)",
2048 psm->aid, psm->intervals[0].interval);
2049
2050 stlc45xx_tx_frame(stlc, FIRMWARE_CONFIG_START, control, len);
2051
2052 kfree(control);
2053}
2054
2055static int stlc45xx_op_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2056{
2057 struct stlc45xx *stlc = hw->priv;
2058 struct ieee80211_tx_info *info;
2059 struct ieee80211_rate *rate;
2060 int payload_len, padding, i;
2061 struct s_lm_data_out *data;
2062 struct txbuffer *entry;
2063 char *payload;
2064
2065 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2066
2067 spin_lock_bh(&stlc->tx_lock);
2068
2069 entry = stlc45xx_txbuffer_alloc(stlc, skb->len);
2070 if (!entry) {
2071 /* the queue should be stopped before the firmware buffer
2072 * is full, so firmware buffer should always have enough
2073 * space */
2074 if (net_ratelimit())
2075 stlc45xx_warning("firmware buffer full");
2076 spin_unlock_bh(&stlc->tx_lock);
2077 return NETDEV_TX_BUSY;
2078 }
2079
2080 info = IEEE80211_SKB_CB(skb);
2081
2082 payload = skb->data;
2083 payload_len = skb->len;
2084 padding = (int) (skb->data - sizeof(*data)) & 3;
2085 entry->header_len = sizeof(*data) + padding;
2086
2087 entry->skb = skb;
2088 entry->status_needed = true;
2089 entry->handle = (u32) skb;
2090 entry->lifetime = jiffies + msecs_to_jiffies(TX_FRAME_LIFETIME);
2091
2092 stlc45xx_debug(DEBUG_TX, "tx data 0x%x (0x%p payload %d B "
2093 "padding %d header_len %d)",
2094 entry->handle, payload, payload_len, padding,
2095 entry->header_len);
2096 stlc45xx_dump(DEBUG_TX_CONTENT, payload, payload_len);
2097
2098 data = (struct s_lm_data_out *) skb_push(skb, entry->header_len);
2099
2100 memset(data, 0, entry->header_len);
2101
2102 if (padding)
2103 data->flags = LM_FLAG_ALIGN;
2104
2105 data->flags = LM_OUT_BURST;
2106 data->length = payload_len;
2107 data->handle = entry->handle;
2108 data->aid = 1;
2109 data->rts_retries = 7;
2110 data->retries = 7;
2111 data->aloft_ctrl = 0;
2112 data->crypt_offset = 58;
2113 data->keytype = 0;
2114 data->keylen = 0;
2115 data->queue = 2;
2116 data->backlog = 32;
2117 data->antenna = 2;
2118 data->cts = 3;
2119 data->power = 127;
2120
2121 for (i = 0; i < 8; i++) {
2122 rate = ieee80211_get_tx_rate(stlc->hw, info);
2123 data->aloft[i] = rate->hw_value;
2124 }
2125
2126 list_add_tail(&entry->tx_list, &stlc->tx_pending);
2127
2128 /* check if there's enough space in tx buffer */
2129 if (stlc45xx_txbuffer_find(stlc, MAX_FRAME_LEN) == -1) {
2130 stlc45xx_debug(DEBUG_QUEUE, "tx buffer full, stopping queues");
2131 stlc->tx_queue_stopped = 1;
2132 ieee80211_stop_queues(stlc->hw);
2133 }
2134
2135 queue_work(stlc->hw->workqueue, &stlc->work);
2136
2137 spin_unlock_bh(&stlc->tx_lock);
2138
2139 return NETDEV_TX_OK;
2140}
2141
2142static int stlc45xx_op_start(struct ieee80211_hw *hw)
2143{
2144 struct stlc45xx *stlc = hw->priv;
2145 unsigned long timeout;
2146 int ret = 0;
2147
2148 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2149
2150 mutex_lock(&stlc->mutex);
2151
2152 stlc->fw_state = FW_STATE_BOOTING;
2153 stlc->channel = 1;
2154
2155 stlc45xx_power_on(stlc);
2156
2157 ret = stlc45xx_upload_firmware(stlc);
2158 if (ret < 0) {
2159 stlc45xx_power_off(stlc);
2160 goto out_unlock;
2161 }
2162
2163 stlc->tx_queue_stopped = 0;
2164
2165 mutex_unlock(&stlc->mutex);
2166
2167 timeout = msecs_to_jiffies(2000);
2168 timeout = wait_for_completion_interruptible_timeout(&stlc->fw_comp,
2169 timeout);
2170 if (!timeout) {
2171 stlc45xx_error("firmware boot failed");
2172 stlc45xx_power_off(stlc);
2173 ret = -1;
2174 goto out;
2175 }
2176
2177 stlc45xx_debug(DEBUG_BOOT, "firmware booted");
2178
2179 /* FIXME: should we take mutex just after wait_for_completion()? */
2180 mutex_lock(&stlc->mutex);
2181
2182 WARN_ON(stlc->fw_state != FW_STATE_READY);
2183
2184out_unlock:
2185 mutex_unlock(&stlc->mutex);
2186
2187out:
2188 return ret;
2189}
2190
2191static void stlc45xx_op_stop(struct ieee80211_hw *hw)
2192{
2193 struct stlc45xx *stlc = hw->priv;
2194
2195 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2196
2197 mutex_lock(&stlc->mutex);
2198
2199 WARN_ON(stlc->fw_state != FW_STATE_READY);
2200
2201 stlc45xx_power_off(stlc);
2202
2203 /* FIXME: make sure that all work_structs have completed */
2204
2205 spin_lock_bh(&stlc->tx_lock);
2206 stlc45xx_flush_queues(stlc);
2207 spin_unlock_bh(&stlc->tx_lock);
2208
2209 stlc->fw_state = FW_STATE_OFF;
2210
2211 mutex_unlock(&stlc->mutex);
2212}
2213
2214static int stlc45xx_op_add_interface(struct ieee80211_hw *hw,
2215 struct ieee80211_if_init_conf *conf)
2216{
2217 struct stlc45xx *stlc = hw->priv;
2218
2219 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2220
2221 switch (conf->type) {
2222 case NL80211_IFTYPE_STATION:
2223 break;
2224 default:
2225 return -EOPNOTSUPP;
2226 }
2227
2228 memcpy(stlc->mac_addr, conf->mac_addr, ETH_ALEN);
2229
2230 return 0;
2231}
2232
2233static void stlc45xx_op_remove_interface(struct ieee80211_hw *hw,
2234 struct ieee80211_if_init_conf *conf)
2235{
2236 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2237}
2238
2239static int stlc45xx_op_config(struct ieee80211_hw *hw, u32 changed)
2240{
2241 struct stlc45xx *stlc = hw->priv;
2242
2243 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2244
2245 mutex_lock(&stlc->mutex);
2246
2247 stlc->channel = hw->conf.channel->hw_value;
2248 stlc45xx_tx_scan(stlc);
2249 stlc45xx_tx_setup(stlc);
2250 stlc45xx_tx_edcf(stlc);
2251
2252 if ((hw->conf.flags & IEEE80211_CONF_PS) != stlc->psm) {
2253 stlc->psm = hw->conf.flags & IEEE80211_CONF_PS;
2254 if (stlc->associated) {
2255 stlc45xx_tx_psm(stlc, stlc->psm);
2256 stlc45xx_tx_nullfunc(stlc, stlc->psm);
2257 }
2258 }
2259
2260 mutex_unlock(&stlc->mutex);
2261
2262 return 0;
2263}
2264
2265static void stlc45xx_op_configure_filter(struct ieee80211_hw *hw,
2266 unsigned int changed_flags,
2267 unsigned int *total_flags,
2268 int mc_count,
2269 struct dev_addr_list *mc_list)
2270{
2271 *total_flags = 0;
2272}
2273
2274static void stlc45xx_op_bss_info_changed(struct ieee80211_hw *hw,
2275 struct ieee80211_vif *vif,
2276 struct ieee80211_bss_conf *info,
2277 u32 changed)
2278{
2279 struct stlc45xx *stlc = hw->priv;
2280
2281 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2282 mutex_lock(&stlc->mutex);
2283
2284 memcpy(stlc->bssid, info->bssid, ETH_ALEN);
2285 stlc45xx_tx_setup(stlc);
2286
2287 mutex_unlock(&stlc->mutex);
2288
2289 if (changed & BSS_CHANGED_ASSOC) {
2290 stlc->associated = info->assoc;
2291 if (info->assoc)
2292 stlc->aid = info->aid;
2293 else
2294 stlc->aid = -1;
2295
2296 if (stlc->psm) {
2297 stlc45xx_tx_psm(stlc, stlc->psm);
2298 stlc45xx_tx_nullfunc(stlc, stlc->psm);
2299 }
2300 }
2301}
2302
2303
2304/* can't be const, mac80211 writes to this */
2305static struct ieee80211_rate stlc45xx_rates[] = {
2306 { .bitrate = 10, .hw_value = 0, .hw_value_short = 0, },
2307 { .bitrate = 20, .hw_value = 1, .hw_value_short = 1, },
2308 { .bitrate = 55, .hw_value = 2, .hw_value_short = 2, },
2309 { .bitrate = 110, .hw_value = 3, .hw_value_short = 3, },
2310 { .bitrate = 60, .hw_value = 4, .hw_value_short = 4, },
2311 { .bitrate = 90, .hw_value = 5, .hw_value_short = 5, },
2312 { .bitrate = 120, .hw_value = 6, .hw_value_short = 6, },
2313 { .bitrate = 180, .hw_value = 7, .hw_value_short = 7, },
2314 { .bitrate = 240, .hw_value = 8, .hw_value_short = 8, },
2315 { .bitrate = 360, .hw_value = 9, .hw_value_short = 9, },
2316 { .bitrate = 480, .hw_value = 10, .hw_value_short = 10, },
2317 { .bitrate = 540, .hw_value = 11, .hw_value_short = 11, },
2318};
2319
2320/* can't be const, mac80211 writes to this */
2321static struct ieee80211_channel stlc45xx_channels[] = {
2322 { .hw_value = 1, .center_freq = 2412},
2323 { .hw_value = 2, .center_freq = 2417},
2324 { .hw_value = 3, .center_freq = 2422},
2325 { .hw_value = 4, .center_freq = 2427},
2326 { .hw_value = 5, .center_freq = 2432},
2327 { .hw_value = 6, .center_freq = 2437},
2328 { .hw_value = 7, .center_freq = 2442},
2329 { .hw_value = 8, .center_freq = 2447},
2330 { .hw_value = 9, .center_freq = 2452},
2331 { .hw_value = 10, .center_freq = 2457},
2332 { .hw_value = 11, .center_freq = 2462},
2333 { .hw_value = 12, .center_freq = 2467},
2334 { .hw_value = 13, .center_freq = 2472},
2335};
2336
2337/* can't be const, mac80211 writes to this */
2338static struct ieee80211_supported_band stlc45xx_band_2ghz = {
2339 .channels = stlc45xx_channels,
2340 .n_channels = ARRAY_SIZE(stlc45xx_channels),
2341 .bitrates = stlc45xx_rates,
2342 .n_bitrates = ARRAY_SIZE(stlc45xx_rates),
2343};
2344
2345static const struct ieee80211_ops stlc45xx_ops = {
2346 .start = stlc45xx_op_start,
2347 .stop = stlc45xx_op_stop,
2348 .add_interface = stlc45xx_op_add_interface,
2349 .remove_interface = stlc45xx_op_remove_interface,
2350 .config = stlc45xx_op_config,
2351 .configure_filter = stlc45xx_op_configure_filter,
2352 .tx = stlc45xx_op_tx,
2353 .bss_info_changed = stlc45xx_op_bss_info_changed,
2354};
2355
2356static int stlc45xx_register_mac80211(struct stlc45xx *stlc)
2357{
2358 /* FIXME: SET_IEEE80211_PERM_ADDR() requires default_mac_addr
2359 to be non-const for some strange reason */
2360 static u8 default_mac_addr[ETH_ALEN] = {
2361 0x00, 0x02, 0xee, 0xc0, 0xff, 0xee
2362 };
2363 int ret;
2364
2365 SET_IEEE80211_PERM_ADDR(stlc->hw, default_mac_addr);
2366
2367 ret = ieee80211_register_hw(stlc->hw);
2368 if (ret) {
2369 stlc45xx_error("unable to register mac80211 hw: %d", ret);
2370 return ret;
2371 }
2372
2373 return 0;
2374}
2375
2376static void stlc45xx_device_release(struct device *dev)
2377{
2378
2379}
2380
2381static struct platform_device stlc45xx_device = {
2382 .name = "stlc45xx",
2383 .id = -1,
2384
2385 /* device model insists to have a release function */
2386 .dev = {
2387 .release = stlc45xx_device_release,
2388 },
2389};
2390
2391static int __devinit stlc45xx_probe(struct spi_device *spi)
2392{
2393 struct stlc45xx *stlc;
2394 struct ieee80211_hw *hw;
2395 int ret;
2396
2397 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2398
2399 /* mac80211 alloc */
2400 hw = ieee80211_alloc_hw(sizeof(*stlc), &stlc45xx_ops);
2401 if (!hw) {
2402 stlc45xx_error("could not alloc ieee80211_hw");
2403 ret = -ENOMEM;
2404 goto out;
2405 }
2406
2407 /* mac80211 clears hw->priv */
2408 stlc = hw->priv;
2409
2410 stlc->hw = hw;
2411 dev_set_drvdata(&spi->dev, stlc);
2412 stlc->spi = spi;
2413
2414 spi->bits_per_word = 16;
2415 spi->max_speed_hz = 24000000;
2416
2417 ret = spi_setup(spi);
2418 if (ret < 0)
2419 stlc45xx_error("spi_setup failed");
2420
2421 ret = gpio_request(stlc45xx_gpio_power, "stlc45xx power");
2422 if (ret < 0) {
2423 stlc45xx_error("power GPIO request failed: %d", ret);
2424 return ret;
2425 }
2426
2427 ret = gpio_request(stlc45xx_gpio_irq, "stlc45xx irq");
2428 if (ret < 0) {
2429 stlc45xx_error("irq GPIO request failed: %d", ret);
2430 goto out;
2431 }
2432
2433 gpio_direction_output(stlc45xx_gpio_power, 0);
2434 gpio_direction_input(stlc45xx_gpio_irq);
2435
2436 ret = request_irq(gpio_to_irq(stlc45xx_gpio_irq),
2437 stlc45xx_interrupt, IRQF_DISABLED, "stlc45xx",
2438 stlc->spi);
2439 if (ret < 0)
2440 /* FIXME: handle the error */
2441 stlc45xx_error("request_irq() failed");
2442
2443 set_irq_type(gpio_to_irq(stlc45xx_gpio_irq),
2444 IRQ_TYPE_EDGE_RISING);
2445
2446 disable_irq(gpio_to_irq(stlc45xx_gpio_irq));
2447
2448 ret = platform_device_register(&stlc45xx_device);
2449 if (ret) {
2450 stlc45xx_error("Couldn't register wlan_omap device.");
2451 return ret;
2452 }
2453 dev_set_drvdata(&stlc45xx_device.dev, stlc);
2454
2455 INIT_WORK(&stlc->work, stlc45xx_work);
2456 INIT_WORK(&stlc->work_reset, stlc45xx_work_reset);
2457 INIT_DELAYED_WORK(&stlc->work_tx_timeout, stlc45xx_work_tx_timeout);
2458 mutex_init(&stlc->mutex);
2459 init_completion(&stlc->fw_comp);
2460 spin_lock_init(&stlc->tx_lock);
2461 INIT_LIST_HEAD(&stlc->txbuffer);
2462 INIT_LIST_HEAD(&stlc->tx_pending);
2463 INIT_LIST_HEAD(&stlc->tx_sent);
2464
2465 hw->flags = IEEE80211_HW_RX_INCLUDES_FCS |
2466 IEEE80211_HW_SIGNAL_DBM |
2467 IEEE80211_HW_NOISE_DBM;
2468 /* four bytes for padding */
2469 hw->extra_tx_headroom = sizeof(struct s_lm_data_out) + 4;
2470
2471 /* unit us */
2472 hw->channel_change_time = 1000;
2473
2474 hw->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION);
2475 hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &stlc45xx_band_2ghz;
2476
2477 SET_IEEE80211_DEV(hw, &spi->dev);
2478
2479 BUILD_BUG_ON(sizeof(default_cal_rssi) != RSSI_CAL_ARRAY_LEN);
2480 BUILD_BUG_ON(sizeof(default_cal_channels) != CHANNEL_CAL_ARRAY_LEN);
2481
2482 stlc->cal_rssi = kmemdup(default_cal_rssi, RSSI_CAL_ARRAY_LEN,
2483 GFP_KERNEL);
2484 stlc->cal_channels = kmemdup(default_cal_channels,
2485 CHANNEL_CAL_ARRAY_LEN,
2486 GFP_KERNEL);
2487
2488 ret = device_create_file(&stlc45xx_device.dev, &dev_attr_cal_rssi);
2489 if (ret < 0) {
2490 stlc45xx_error("failed to create sysfs file cal_rssi");
2491 goto out;
2492 }
2493
2494 ret = device_create_file(&stlc45xx_device.dev, &dev_attr_cal_channels);
2495 if (ret < 0) {
2496 stlc45xx_error("failed to create sysfs file cal_channels");
2497 goto out;
2498 }
2499
2500 ret = device_create_file(&stlc45xx_device.dev, &dev_attr_tx_buf);
2501 if (ret < 0) {
2502 stlc45xx_error("failed to create sysfs file tx_buf");
2503 goto out;
2504 }
2505
2506 ret = stlc45xx_register_mac80211(stlc);
2507 if (ret < 0)
2508 goto out;
2509
2510 stlc45xx_info("v" DRIVER_VERSION " loaded");
2511
2512 stlc45xx_info("config buffer 0x%x-0x%x",
2513 FIRMWARE_CONFIG_START, FIRMWARE_CONFIG_END);
2514 stlc45xx_info("tx 0x%x-0x%x, rx 0x%x-0x%x",
2515 FIRMWARE_TXBUFFER_START, FIRMWARE_TXBUFFER_END,
2516 FIRMWARE_RXBUFFER_START, FIRMWARE_RXBUFFER_END);
2517
2518out:
2519 return ret;
2520}
2521
2522static int __devexit stlc45xx_remove(struct spi_device *spi)
2523{
2524 struct stlc45xx *stlc = dev_get_drvdata(&spi->dev);
2525
2526 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2527
2528 platform_device_unregister(&stlc45xx_device);
2529
2530 ieee80211_unregister_hw(stlc->hw);
2531
2532 free_irq(gpio_to_irq(stlc45xx_gpio_irq), spi);
2533
2534 gpio_free(stlc45xx_gpio_power);
2535 gpio_free(stlc45xx_gpio_irq);
2536
2537 /* FIXME: free cal_channels and cal_rssi? */
2538
2539 kfree(stlc->fw);
2540
2541 mutex_destroy(&stlc->mutex);
2542
2543 /* frees also stlc */
2544 ieee80211_free_hw(stlc->hw);
2545 stlc = NULL;
2546
2547 return 0;
2548}
2549
2550
2551static struct spi_driver stlc45xx_spi_driver = {
2552 .driver = {
2553 /* use cx3110x name because board-n800.c uses that for the
2554 * SPI port */
2555 .name = "cx3110x",
2556 .bus = &spi_bus_type,
2557 .owner = THIS_MODULE,
2558 },
2559
2560 .probe = stlc45xx_probe,
2561 .remove = __devexit_p(stlc45xx_remove),
2562};
2563
2564static int __init stlc45xx_init(void)
2565{
2566 int ret;
2567
2568 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2569
2570 ret = spi_register_driver(&stlc45xx_spi_driver);
2571 if (ret < 0) {
2572 stlc45xx_error("failed to register SPI driver: %d", ret);
2573 goto out;
2574 }
2575
2576out:
2577 return ret;
2578}
2579
2580static void __exit stlc45xx_exit(void)
2581{
2582 stlc45xx_debug(DEBUG_FUNC, "%s", __func__);
2583
2584 spi_unregister_driver(&stlc45xx_spi_driver);
2585
2586 stlc45xx_info("unloaded");
2587}
2588
2589module_init(stlc45xx_init);
2590module_exit(stlc45xx_exit);
2591
2592MODULE_LICENSE("GPL");
2593MODULE_AUTHOR("Kalle Valo <kalle.valo@nokia.com>");
2594MODULE_ALIAS("spi:cx3110x");
diff --git a/drivers/staging/stlc45xx/stlc45xx.h b/drivers/staging/stlc45xx/stlc45xx.h
deleted file mode 100644
index ac96bbbde79f..000000000000
--- a/drivers/staging/stlc45xx/stlc45xx.h
+++ /dev/null
@@ -1,283 +0,0 @@
1/*
2 * This file is part of stlc45xx
3 *
4 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
5 *
6 * Contact: Kalle Valo <kalle.valo@nokia.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/mutex.h>
25#include <linux/list.h>
26#include <net/mac80211.h>
27
28#include "stlc45xx_lmac.h"
29
30#define DRIVER_NAME "stlc45xx"
31#define DRIVER_VERSION "0.1.3"
32
33#define DRIVER_PREFIX DRIVER_NAME ": "
34
35enum {
36 DEBUG_NONE = 0,
37 DEBUG_FUNC = 1 << 0,
38 DEBUG_IRQ = 1 << 1,
39 DEBUG_BH = 1 << 2,
40 DEBUG_RX = 1 << 3,
41 DEBUG_RX_CONTENT = 1 << 5,
42 DEBUG_TX = 1 << 6,
43 DEBUG_TX_CONTENT = 1 << 8,
44 DEBUG_TXBUFFER = 1 << 9,
45 DEBUG_QUEUE = 1 << 10,
46 DEBUG_BOOT = 1 << 11,
47 DEBUG_PSM = 1 << 12,
48 DEBUG_ALL = ~0,
49};
50
51#define DEBUG_LEVEL DEBUG_NONE
52/* #define DEBUG_LEVEL DEBUG_ALL */
53/* #define DEBUG_LEVEL (DEBUG_TX | DEBUG_RX | DEBUG_IRQ) */
54/* #define DEBUG_LEVEL (DEBUG_TX | DEBUG_MEMREGION | DEBUG_QUEUE) */
55/* #define DEBUG_LEVEL (DEBUG_MEMREGION | DEBUG_QUEUE) */
56
57#define stlc45xx_error(fmt, arg...) \
58 printk(KERN_ERR DRIVER_PREFIX "ERROR " fmt "\n", ##arg)
59
60#define stlc45xx_warning(fmt, arg...) \
61 printk(KERN_WARNING DRIVER_PREFIX "WARNING " fmt "\n", ##arg)
62
63#define stlc45xx_info(fmt, arg...) \
64 printk(KERN_INFO DRIVER_PREFIX fmt "\n", ##arg)
65
66#define stlc45xx_debug(level, fmt, arg...) \
67 do { \
68 if (level & DEBUG_LEVEL) \
69 printk(KERN_DEBUG DRIVER_PREFIX fmt "\n", ##arg); \
70 } while (0)
71
72#define stlc45xx_dump(level, buf, len) \
73 do { \
74 if (level & DEBUG_LEVEL) \
75 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, \
76 16, 1, buf, len, 1); \
77 } while (0)
78
79#define MAC2STR(a) ((a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5])
80#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
81
82/* Bit 15 is read/write bit; ON = READ, OFF = WRITE */
83#define ADDR_READ_BIT_15 0x8000
84
85#define SPI_ADRS_ARM_INTERRUPTS 0x00
86#define SPI_ADRS_ARM_INT_EN 0x04
87
88#define SPI_ADRS_HOST_INTERRUPTS 0x08
89#define SPI_ADRS_HOST_INT_EN 0x0c
90#define SPI_ADRS_HOST_INT_ACK 0x10
91
92#define SPI_ADRS_GEN_PURP_1 0x14
93#define SPI_ADRS_GEN_PURP_2 0x18
94
95/* high word */
96#define SPI_ADRS_DEV_CTRL_STAT 0x26
97
98#define SPI_ADRS_DMA_DATA 0x28
99
100#define SPI_ADRS_DMA_WRITE_CTRL 0x2c
101#define SPI_ADRS_DMA_WRITE_LEN 0x2e
102#define SPI_ADRS_DMA_WRITE_BASE 0x30
103
104#define SPI_ADRS_DMA_READ_CTRL 0x34
105#define SPI_ADRS_DMA_READ_LEN 0x36
106#define SPI_ADRS_DMA_READ_BASE 0x38
107
108#define SPI_CTRL_STAT_HOST_OVERRIDE 0x8000
109#define SPI_CTRL_STAT_START_HALTED 0x4000
110#define SPI_CTRL_STAT_RAM_BOOT 0x2000
111#define SPI_CTRL_STAT_HOST_RESET 0x1000
112#define SPI_CTRL_STAT_HOST_CPU_EN 0x0800
113
114#define SPI_DMA_WRITE_CTRL_ENABLE 0x0001
115#define SPI_DMA_READ_CTRL_ENABLE 0x0001
116#define HOST_ALLOWED (1 << 7)
117
118#define FIRMWARE_ADDRESS 0x20000
119
120#define SPI_TIMEOUT 100 /* msec */
121
122#define SPI_MAX_TX_PACKETS 32
123
124#define SPI_MAX_PACKET_SIZE 32767
125
126#define SPI_TARGET_INT_WAKEUP 0x00000001
127#define SPI_TARGET_INT_SLEEP 0x00000002
128#define SPI_TARGET_INT_RDDONE 0x00000004
129
130#define SPI_TARGET_INT_CTS 0x00004000
131#define SPI_TARGET_INT_DR 0x00008000
132
133#define SPI_HOST_INT_READY 0x00000001
134#define SPI_HOST_INT_WR_READY 0x00000002
135#define SPI_HOST_INT_SW_UPDATE 0x00000004
136#define SPI_HOST_INT_UPDATE 0x10000000
137
138/* clear to send */
139#define SPI_HOST_INT_CTS 0x00004000
140
141/* data ready */
142#define SPI_HOST_INT_DR 0x00008000
143
144#define SPI_HOST_INTS_DEFAULT \
145 (SPI_HOST_INT_READY | SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE)
146
147#define TARGET_BOOT_SLEEP 50
148
149/* The firmware buffer is divided into three areas:
150 *
151 * o config area (for control commands)
152 * o tx buffer
153 * o rx buffer
154 */
155#define FIRMWARE_BUFFER_START 0x20200
156#define FIRMWARE_BUFFER_END 0x27c60
157#define FIRMWARE_BUFFER_LEN (FIRMWARE_BUFFER_END - FIRMWARE_BUFFER_START)
158#define FIRMWARE_MTU 3240
159#define FIRMWARE_CONFIG_PAYLOAD_LEN 1024
160#define FIRMWARE_CONFIG_START FIRMWARE_BUFFER_START
161#define FIRMWARE_CONFIG_LEN (sizeof(struct s_lm_control) + \
162 FIRMWARE_CONFIG_PAYLOAD_LEN)
163#define FIRMWARE_CONFIG_END (FIRMWARE_CONFIG_START + FIRMWARE_CONFIG_LEN - 1)
164#define FIRMWARE_RXBUFFER_LEN (5 * FIRMWARE_MTU + 1024)
165#define FIRMWARE_RXBUFFER_START (FIRMWARE_BUFFER_END - FIRMWARE_RXBUFFER_LEN)
166#define FIRMWARE_RXBUFFER_END (FIRMWARE_RXBUFFER_START + \
167 FIRMWARE_RXBUFFER_LEN - 1)
168#define FIRMWARE_TXBUFFER_START (FIRMWARE_BUFFER_START + FIRMWARE_CONFIG_LEN)
169#define FIRMWARE_TXBUFFER_LEN (FIRMWARE_BUFFER_LEN - FIRMWARE_CONFIG_LEN - \
170 FIRMWARE_RXBUFFER_LEN)
171#define FIRMWARE_TXBUFFER_END (FIRMWARE_TXBUFFER_START + \
172 FIRMWARE_TXBUFFER_LEN - 1)
173
174#define FIRMWARE_TXBUFFER_HEADER 100
175#define FIRMWARE_TXBUFFER_TRAILER 4
176
177/* FIXME: come up with a proper value */
178#define MAX_FRAME_LEN 2500
179
180/* unit is ms */
181#define TX_FRAME_LIFETIME 2000
182#define TX_TIMEOUT 4000
183
184#define SUPPORTED_CHANNELS 13
185
186/* FIXME */
187/* #define CHANNEL_CAL_LEN offsetof(struct s_lmo_scan, bratemask) - \ */
188/* offsetof(struct s_lmo_scan, channel) */
189#define CHANNEL_CAL_LEN 292
190#define CHANNEL_CAL_ARRAY_LEN (SUPPORTED_CHANNELS * CHANNEL_CAL_LEN)
191/* FIXME */
192/* #define RSSI_CAL_LEN sizeof(struct s_lmo_scan) - \ */
193/* offsetof(struct s_lmo_scan, rssical) */
194#define RSSI_CAL_LEN 8
195#define RSSI_CAL_ARRAY_LEN (SUPPORTED_CHANNELS * RSSI_CAL_LEN)
196
197struct s_dma_regs {
198 unsigned short cmd;
199 unsigned short len;
200 unsigned long addr;
201};
202
203struct stlc45xx_ie_tim {
204 u8 dtim_count;
205 u8 dtim_period;
206 u8 bmap_control;
207 u8 pvbmap[251];
208};
209
210struct txbuffer {
211 /* can be removed when switched to skb queue */
212 struct list_head tx_list;
213
214 struct list_head buffer_list;
215
216 int start;
217 int frame_start;
218 int end;
219
220 struct sk_buff *skb;
221 u32 handle;
222
223 bool status_needed;
224
225 int header_len;
226
227 /* unit jiffies */
228 unsigned long lifetime;
229};
230
231enum fw_state {
232 FW_STATE_OFF,
233 FW_STATE_BOOTING,
234 FW_STATE_READY,
235 FW_STATE_RESET,
236 FW_STATE_RESETTING,
237};
238
239struct stlc45xx {
240 struct ieee80211_hw *hw;
241 struct spi_device *spi;
242 struct work_struct work;
243 struct work_struct work_reset;
244 struct delayed_work work_tx_timeout;
245 struct mutex mutex;
246 struct completion fw_comp;
247
248
249 u8 bssid[ETH_ALEN];
250 u8 mac_addr[ETH_ALEN];
251 int channel;
252
253 u8 *cal_rssi;
254 u8 *cal_channels;
255
256 enum fw_state fw_state;
257
258 spinlock_t tx_lock;
259
260 /* protected by tx_lock */
261 struct list_head txbuffer;
262
263 /* protected by tx_lock */
264 struct list_head tx_pending;
265
266 /* protected by tx_lock */
267 int tx_queue_stopped;
268
269 /* protected by mutex */
270 struct list_head tx_sent;
271
272 int tx_frames;
273
274 u8 *fw;
275 int fw_len;
276
277 bool psm;
278 bool associated;
279 int aid;
280 bool pspolling;
281};
282
283
diff --git a/drivers/staging/stlc45xx/stlc45xx_lmac.h b/drivers/staging/stlc45xx/stlc45xx_lmac.h
deleted file mode 100644
index af5db801347f..000000000000
--- a/drivers/staging/stlc45xx/stlc45xx_lmac.h
+++ /dev/null
@@ -1,434 +0,0 @@
1/************************************************************************
2* This is the LMAC API interface header file for STLC4560. *
3* Copyright (C) 2007 Conexant Systems, Inc. *
4* This program is free software; you can redistribute it and/or *
5* modify it under the terms of the GNU General Public License *
6* as published by the Free Software Foundation; either version 2 *
7* of the License, or (at your option) any later version. *
8* *
9* This program is distributed in the hope that it will be useful, *
10* but WITHOUT ANY WARRANTY; without even the implied warranty of *
11* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12* GNU General Public License for more details. *
13* *
14* You should have received a copy of the GNU General Public License *
15* along with this program. If not, see <http://www.gnu.org/licenses/>.*
16*************************************************************************/
17
18#ifndef __lmac_h__
19#define __lmac_h__
20
21#define LM_TOP_VARIANT 0x0506
22#define LM_BOTTOM_VARIANT 0x0506
23
24/*
25 * LMAC - UMAC interface definition:
26 */
27
28#define LM_FLAG_CONTROL 0x8000
29#define LM_FLAG_ALIGN 0x4000
30
31#define LM_CTRL_OPSET 0x0001
32
33#define LM_OUT_PROMISC 0x0001
34#define LM_OUT_TIMESTAMP 0x0002
35#define LM_OUT_SEQNR 0x0004
36#define LM_OUT_BURST 0x0010
37#define LM_OUT_NOCANCEL 0x0020
38#define LM_OUT_CLEARTIM 0x0040
39#define LM_OUT_HITCHHIKE 0x0080
40#define LM_OUT_COMPRESS 0x0100
41#define LM_OUT_CONCAT 0x0200
42#define LM_OUT_PCS_ACCEPT 0x0400
43#define LM_OUT_WAITEOSP 0x0800
44
45
46#define LM_ALOFT_SP 0x10
47#define LM_ALOFT_CTS 0x20
48#define LM_ALOFT_RTS 0x40
49#define LM_ALOFT_MASK 0x1f
50#define LM_ALOFT_RATE 0x0f
51
52#define LM_IN_FCS_GOOD 0x0001
53#define LM_IN_MATCH_MAC 0x0002
54#define LM_IN_MCBC 0x0004
55#define LM_IN_BEACON 0x0008
56#define LM_IN_MATCH_BSS 0x0010
57#define LM_IN_BCAST_BSS 0x0020
58#define LM_IN_DATA 0x0040
59#define LM_IN_TRUNCATED 0x0080
60
61#define LM_IN_TRANSPARENT 0x0200
62
63#define LM_QUEUE_BEACON 0
64#define LM_QUEUE_SCAN 1
65#define LM_QUEUE_MGT 2
66#define LM_QUEUE_MCBC 3
67#define LM_QUEUE_DATA 4
68#define LM_QUEUE_DATA0 4
69#define LM_QUEUE_DATA1 5
70#define LM_QUEUE_DATA2 6
71#define LM_QUEUE_DATA3 7
72
73#define LM_SETUP_INFRA 0x0001
74#define LM_SETUP_IBSS 0x0002
75#define LM_SETUP_TRANSPARENT 0x0008
76#define LM_SETUP_PROMISCUOUS 0x0010
77#define LM_SETUP_HIBERNATE 0x0020
78#define LM_SETUP_NOACK 0x0040
79#define LM_SETUP_RX_DISABLED 0x0080
80
81#define LM_ANTENNA_0 0
82#define LM_ANTENNA_1 1
83#define LM_ANTENNA_DIVERSITY 2
84
85#define LM_TX_FAILED 0x0001
86#define LM_TX_PSM 0x0002
87#define LM_TX_PSM_CANCELLED 0x0004
88
89#define LM_SCAN_EXIT 0x0001
90#define LM_SCAN_TRAP 0x0002
91#define LM_SCAN_ACTIVE 0x0004
92#define LM_SCAN_FILTER 0x0008
93
94#define LM_PSM 0x0001
95#define LM_PSM_DTIM 0x0002
96#define LM_PSM_MCBC 0x0004
97#define LM_PSM_CHECKSUM 0x0008
98#define LM_PSM_SKIP_MORE_DATA 0x0010
99#define LM_PSM_BEACON_TIMEOUT 0x0020
100#define LM_PSM_HFOSLEEP 0x0040
101#define LM_PSM_AUTOSWITCH_SLEEP 0x0080
102#define LM_PSM_LPIT 0x0100
103#define LM_PSM_BF_UCAST_SKIP 0x0200
104#define LM_PSM_BF_MCAST_SKIP 0x0400
105
106/* hfosleep */
107#define LM_PSM_SLEEP_OPTION_MASK (LM_PSM_AUTOSWITCH_SLEEP | LM_PSM_HFOSLEEP)
108#define LM_PSM_SLEEP_OPTION_SHIFT 6
109/* hfosleepend */
110#define LM_PSM_BF_OPTION_MASK (LM_PSM_BF_MCAST_SKIP | LM_PSM_BF_UCAST_SKIP)
111#define LM_PSM_BF_OPTION_SHIFT 9
112
113
114#define LM_PRIVACC_WEP 0x01
115#define LM_PRIVACC_TKIP 0x02
116#define LM_PRIVACC_MICHAEL 0x04
117#define LM_PRIVACC_CCX_KP 0x08
118#define LM_PRIVACC_CCX_MIC 0x10
119#define LM_PRIVACC_AES_CCMP 0x20
120
121/* size of s_lm_descr in words */
122#define LM_DESCR_SIZE_WORDS 11
123
124#ifndef __ASSEMBLER__
125
126enum {
127 LM_MODE_CLIENT = 0,
128 LM_MODE_AP
129};
130
131struct s_lm_descr {
132 uint16_t modes;
133 uint16_t flags;
134 uint32_t buffer_start;
135 uint32_t buffer_end;
136 uint8_t header;
137 uint8_t trailer;
138 uint8_t tx_queues;
139 uint8_t tx_depth;
140 uint8_t privacy;
141 uint8_t rx_keycache;
142 uint8_t tim_size;
143 uint8_t pad1;
144 uint8_t rates[16];
145 uint32_t link;
146 uint16_t mtu;
147};
148
149
150struct s_lm_control {
151 uint16_t flags;
152 uint16_t length;
153 uint32_t handle;
154 uint16_t oid;
155 uint16_t pad;
156 /* uint8_t data[]; */
157};
158
159enum {
160 LM_PRIV_NONE = 0,
161 LM_PRIV_WEP,
162 LM_PRIV_TKIP,
163 LM_PRIV_TKIPMICHAEL,
164 LM_PRIV_CCX_WEPMIC,
165 LM_PRIV_CCX_KPMIC,
166 LM_PRIV_CCX_KP,
167 LM_PRIV_AES_CCMP
168};
169
170enum {
171 LM_DECRYPT_NONE,
172 LM_DECRYPT_OK,
173 LM_DECRYPT_NOKEY,
174 LM_DECRYPT_NOMICHAEL,
175 LM_DECRYPT_NOCKIPMIC,
176 LM_DECRYPT_FAIL_WEP,
177 LM_DECRYPT_FAIL_TKIP,
178 LM_DECRYPT_FAIL_MICHAEL,
179 LM_DECRYPT_FAIL_CKIPKP,
180 LM_DECRYPT_FAIL_CKIPMIC,
181 LM_DECRYPT_FAIL_AESCCMP
182};
183
184struct s_lm_data_out {
185 uint16_t flags;
186 uint16_t length;
187 uint32_t handle;
188 uint16_t aid;
189 uint8_t rts_retries;
190 uint8_t retries;
191 uint8_t aloft[8];
192 uint8_t aloft_ctrl;
193 uint8_t crypt_offset;
194 uint8_t keytype;
195 uint8_t keylen;
196 uint8_t key[16];
197 uint8_t queue;
198 uint8_t backlog;
199 uint16_t durations[4];
200 uint8_t antenna;
201 uint8_t cts;
202 int16_t power;
203 uint8_t pad[2];
204 /*uint8_t data[];*/
205};
206
207#define LM_RCPI_INVALID (0xff)
208
209struct s_lm_data_in {
210 uint16_t flags;
211 uint16_t length;
212 uint16_t frequency;
213 uint8_t antenna;
214 uint8_t rate;
215 uint8_t rcpi;
216 uint8_t sq;
217 uint8_t decrypt;
218 uint8_t rssi_raw;
219 uint32_t clock[2];
220 /*uint8_t data[];*/
221};
222
223union u_lm_data {
224 struct s_lm_data_out out;
225 struct s_lm_data_in in;
226};
227
228enum {
229 LM_OID_SETUP = 0,
230 LM_OID_SCAN = 1,
231 LM_OID_TRAP = 2,
232 LM_OID_EDCF = 3,
233 LM_OID_KEYCACHE = 4,
234 LM_OID_PSM = 6,
235 LM_OID_TXCANCEL = 7,
236 LM_OID_TX = 8,
237 LM_OID_BURST = 9,
238 LM_OID_STATS = 10,
239 LM_OID_LED = 13,
240 LM_OID_TIMER = 15,
241 LM_OID_NAV = 20,
242 LM_OID_PCS = 22,
243 LM_OID_BT_BALANCER = 28,
244 LM_OID_GROUP_ADDRESS_TABLE = 30,
245 LM_OID_ARPTABLE = 31,
246 LM_OID_BT_OPTIONS = 35
247};
248
249enum {
250 LM_FRONTEND_UNKNOWN = 0,
251 LM_FRONTEND_DUETTE3,
252 LM_FRONTEND_DUETTE2,
253 LM_FRONTEND_FRISBEE,
254 LM_FRONTEND_CROSSBOW,
255 LM_FRONTEND_LONGBOW
256};
257
258
259#define INVALID_LPF_BANDWIDTH 0xffff
260#define INVALID_OSC_START_DELAY 0xffff
261
262struct s_lmo_setup {
263 uint16_t flags;
264 uint8_t macaddr[6];
265 uint8_t bssid[6];
266 uint8_t antenna;
267 uint8_t rx_align;
268 uint32_t rx_buffer;
269 uint16_t rx_mtu;
270 uint16_t frontend;
271 uint16_t timeout;
272 uint16_t truncate;
273 uint32_t bratemask;
274 uint8_t sbss_offset;
275 uint8_t mcast_window;
276 uint8_t rx_rssi_threshold;
277 uint8_t rx_ed_threshold;
278 uint32_t ref_clock;
279 uint16_t lpf_bandwidth;
280 uint16_t osc_start_delay;
281};
282
283
284struct s_lmo_scan {
285 uint16_t flags;
286 uint16_t dwell;
287 uint8_t channel[292];
288 uint32_t bratemask;
289 uint8_t aloft[8];
290 uint8_t rssical[8];
291};
292
293
294enum {
295 LM_TRAP_SCAN = 0,
296 LM_TRAP_TIMER,
297 LM_TRAP_BEACON_TX,
298 LM_TRAP_FAA_RADIO_ON,
299 LM_TRAP_FAA_RADIO_OFF,
300 LM_TRAP_RADAR,
301 LM_TRAP_NO_BEACON,
302 LM_TRAP_TBTT,
303 LM_TRAP_SCO_ENTER,
304 LM_TRAP_SCO_EXIT
305};
306
307struct s_lmo_trap {
308 uint16_t event;
309 uint16_t frequency;
310};
311
312struct s_lmo_timer {
313 uint32_t interval;
314};
315
316struct s_lmo_nav {
317 uint32_t period;
318};
319
320
321struct s_lmo_edcf_queue;
322
323struct s_lmo_edcf {
324 uint8_t flags;
325 uint8_t slottime;
326 uint8_t sifs;
327 uint8_t eofpad;
328 struct s_lmo_edcf_queue {
329 uint8_t aifs;
330 uint8_t pad0;
331 uint16_t cwmin;
332 uint16_t cwmax;
333 uint16_t txop;
334 } queues[8];
335 uint8_t mapping[4];
336 uint16_t maxburst;
337 uint16_t round_trip_delay;
338};
339
340struct s_lmo_keycache {
341 uint8_t entry;
342 uint8_t keyid;
343 uint8_t address[6];
344 uint8_t pad[2];
345 uint8_t keytype;
346 uint8_t keylen;
347 uint8_t key[24];
348};
349
350
351struct s_lm_interval;
352
353struct s_lmo_psm {
354 uint16_t flags;
355 uint16_t aid;
356 struct s_lm_interval {
357 uint16_t interval;
358 uint16_t periods;
359 } intervals[4];
360 /* uint16_t pad; */
361 uint8_t beacon_rcpi_skip_max;
362 uint8_t rcpi_delta_threshold;
363 uint8_t nr;
364 uint8_t exclude[1];
365};
366
367#define MC_FILTER_ADDRESS_NUM 4
368
369struct s_lmo_group_address_table {
370 uint16_t filter_enable;
371 uint16_t num_address;
372 uint8_t macaddr_list[MC_FILTER_ADDRESS_NUM][6];
373};
374
375struct s_lmo_txcancel {
376 uint32_t address[1];
377};
378
379
380struct s_lmo_tx {
381 uint8_t flags;
382 uint8_t retries;
383 uint8_t rcpi;
384 uint8_t sq;
385 uint16_t seqctrl;
386 uint8_t antenna;
387 uint8_t pad;
388};
389
390struct s_lmo_burst {
391 uint8_t flags;
392 uint8_t queue;
393 uint8_t backlog;
394 uint8_t pad;
395 uint16_t durations[32];
396};
397
398struct s_lmo_stats {
399 uint32_t valid;
400 uint32_t fcs;
401 uint32_t abort;
402 uint32_t phyabort;
403 uint32_t rts_success;
404 uint32_t rts_fail;
405 uint32_t timestamp;
406 uint32_t time_tx;
407 uint32_t noisefloor;
408 uint32_t sample_noise[8];
409 uint32_t sample_cca;
410 uint32_t sample_tx;
411};
412
413
414struct s_lmo_led {
415 uint16_t flags;
416 uint16_t mask[2];
417 uint16_t delay/*[2]*/;
418};
419
420
421struct s_lmo_bt_balancer {
422 uint16_t prio_thresh;
423 uint16_t acl_thresh;
424};
425
426
427struct s_lmo_arp_table {
428 uint16_t filter_enable;
429 uint32_t ipaddr;
430};
431
432#endif /* __ASSEMBLER__ */
433
434#endif /* __lmac_h__ */
diff --git a/drivers/staging/vme/bridges/vme_ca91cx42.c b/drivers/staging/vme/bridges/vme_ca91cx42.c
index 3d2a84c45829..e139eaeaa174 100644
--- a/drivers/staging/vme/bridges/vme_ca91cx42.c
+++ b/drivers/staging/vme/bridges/vme_ca91cx42.c
@@ -25,6 +25,7 @@
25#include <linux/poll.h> 25#include <linux/poll.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/spinlock.h> 27#include <linux/spinlock.h>
28#include <linux/sched.h>
28#include <asm/time.h> 29#include <asm/time.h>
29#include <asm/io.h> 30#include <asm/io.h>
30#include <asm/uaccess.h> 31#include <asm/uaccess.h>
diff --git a/drivers/staging/vme/bridges/vme_tsi148.c b/drivers/staging/vme/bridges/vme_tsi148.c
index 8960fa9ee7aa..00fe0803c21c 100644
--- a/drivers/staging/vme/bridges/vme_tsi148.c
+++ b/drivers/staging/vme/bridges/vme_tsi148.c
@@ -25,6 +25,7 @@
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/interrupt.h> 26#include <linux/interrupt.h>
27#include <linux/spinlock.h> 27#include <linux/spinlock.h>
28#include <linux/sched.h>
28#include <asm/time.h> 29#include <asm/time.h>
29#include <asm/io.h> 30#include <asm/io.h>
30#include <asm/uaccess.h> 31#include <asm/uaccess.h>
diff --git a/drivers/staging/vt6656/main_usb.c b/drivers/staging/vt6656/main_usb.c
index 7f96bcaf1c60..05186110c029 100644
--- a/drivers/staging/vt6656/main_usb.c
+++ b/drivers/staging/vt6656/main_usb.c
@@ -1332,7 +1332,6 @@ device_release_WPADEV(pDevice);
1332 free_netdev(pDevice->dev); 1332 free_netdev(pDevice->dev);
1333 } 1333 }
1334 1334
1335 kfree(pDevice);
1336 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_disconnect3.. \n"); 1335 DBG_PRT(MSG_LEVEL_DEBUG, KERN_INFO "device_disconnect3.. \n");
1337} 1336}
1338 1337
diff --git a/drivers/staging/winbond/Kconfig b/drivers/staging/winbond/Kconfig
index 940460c39f36..132671d96d0d 100644
--- a/drivers/staging/winbond/Kconfig
+++ b/drivers/staging/winbond/Kconfig
@@ -1,6 +1,6 @@
1config W35UND 1config W35UND
2 tristate "IS89C35 WLAN USB driver" 2 tristate "IS89C35 WLAN USB driver"
3 depends on MAC80211 && WLAN_80211 && USB && EXPERIMENTAL 3 depends on MAC80211 && WLAN && USB && EXPERIMENTAL
4 default n 4 default n
5 ---help--- 5 ---help---
6 This is highly experimental driver for Winbond WIFI card. 6 This is highly experimental driver for Winbond WIFI card.
diff --git a/drivers/staging/wlan-ng/Kconfig b/drivers/staging/wlan-ng/Kconfig
index 9959b658c8cf..f44294b0d8dc 100644
--- a/drivers/staging/wlan-ng/Kconfig
+++ b/drivers/staging/wlan-ng/Kconfig
@@ -1,6 +1,6 @@
1config PRISM2_USB 1config PRISM2_USB
2 tristate "Prism2.5/3 USB driver" 2 tristate "Prism2.5/3 USB driver"
3 depends on WLAN_80211 && USB && WIRELESS_EXT 3 depends on WLAN && USB && WIRELESS_EXT
4 default n 4 default n
5 ---help--- 5 ---help---
6 This is the wlan-ng prism 2.5/3 USB driver for a wide range of 6 This is the wlan-ng prism 2.5/3 USB driver for a wide range of
diff --git a/drivers/thermal/thermal_sys.c b/drivers/thermal/thermal_sys.c
index 4e83c297ec9e..6f8d8f971212 100644
--- a/drivers/thermal/thermal_sys.c
+++ b/drivers/thermal/thermal_sys.c
@@ -180,15 +180,15 @@ trip_point_type_show(struct device *dev, struct device_attribute *attr,
180 180
181 switch (type) { 181 switch (type) {
182 case THERMAL_TRIP_CRITICAL: 182 case THERMAL_TRIP_CRITICAL:
183 return sprintf(buf, "critical"); 183 return sprintf(buf, "critical\n");
184 case THERMAL_TRIP_HOT: 184 case THERMAL_TRIP_HOT:
185 return sprintf(buf, "hot"); 185 return sprintf(buf, "hot\n");
186 case THERMAL_TRIP_PASSIVE: 186 case THERMAL_TRIP_PASSIVE:
187 return sprintf(buf, "passive"); 187 return sprintf(buf, "passive\n");
188 case THERMAL_TRIP_ACTIVE: 188 case THERMAL_TRIP_ACTIVE:
189 return sprintf(buf, "active"); 189 return sprintf(buf, "active\n");
190 default: 190 default:
191 return sprintf(buf, "unknown"); 191 return sprintf(buf, "unknown\n");
192 } 192 }
193} 193}
194 194
diff --git a/drivers/uio/uio_pdrv_genirq.c b/drivers/uio/uio_pdrv_genirq.c
index 02347c57357d..aa53db9f2e88 100644
--- a/drivers/uio/uio_pdrv_genirq.c
+++ b/drivers/uio/uio_pdrv_genirq.c
@@ -178,6 +178,7 @@ static int uio_pdrv_genirq_probe(struct platform_device *pdev)
178 return 0; 178 return 0;
179 bad1: 179 bad1:
180 kfree(priv); 180 kfree(priv);
181 pm_runtime_disable(&pdev->dev);
181 bad0: 182 bad0:
182 return ret; 183 return ret;
183} 184}
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index e3861b21e776..e4eca7810bcf 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -609,9 +609,9 @@ static int acm_tty_open(struct tty_struct *tty, struct file *filp)
609 609
610 acm->throttle = 0; 610 acm->throttle = 0;
611 611
612 tasklet_schedule(&acm->urb_task);
613 set_bit(ASYNCB_INITIALIZED, &acm->port.flags); 612 set_bit(ASYNCB_INITIALIZED, &acm->port.flags);
614 rv = tty_port_block_til_ready(&acm->port, tty, filp); 613 rv = tty_port_block_til_ready(&acm->port, tty, filp);
614 tasklet_schedule(&acm->urb_task);
615done: 615done:
616 mutex_unlock(&acm->mutex); 616 mutex_unlock(&acm->mutex);
617err_out: 617err_out:
@@ -686,15 +686,21 @@ static void acm_tty_close(struct tty_struct *tty, struct file *filp)
686 686
687 /* Perform the closing process and see if we need to do the hardware 687 /* Perform the closing process and see if we need to do the hardware
688 shutdown */ 688 shutdown */
689 if (!acm || tty_port_close_start(&acm->port, tty, filp) == 0) 689 if (!acm)
690 return;
691 if (tty_port_close_start(&acm->port, tty, filp) == 0) {
692 mutex_lock(&open_mutex);
693 if (!acm->dev) {
694 tty_port_tty_set(&acm->port, NULL);
695 acm_tty_unregister(acm);
696 tty->driver_data = NULL;
697 }
698 mutex_unlock(&open_mutex);
690 return; 699 return;
700 }
691 acm_port_down(acm, 0); 701 acm_port_down(acm, 0);
692 tty_port_close_end(&acm->port, tty); 702 tty_port_close_end(&acm->port, tty);
693 mutex_lock(&open_mutex);
694 tty_port_tty_set(&acm->port, NULL); 703 tty_port_tty_set(&acm->port, NULL);
695 if (!acm->dev)
696 acm_tty_unregister(acm);
697 mutex_unlock(&open_mutex);
698} 704}
699 705
700static int acm_tty_write(struct tty_struct *tty, 706static int acm_tty_write(struct tty_struct *tty,
diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig
index 33351312327f..a18e3c5dd82e 100644
--- a/drivers/usb/gadget/Kconfig
+++ b/drivers/usb/gadget/Kconfig
@@ -223,6 +223,7 @@ config USB_OTG
223config USB_GADGET_PXA25X 223config USB_GADGET_PXA25X
224 boolean "PXA 25x or IXP 4xx" 224 boolean "PXA 25x or IXP 4xx"
225 depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX 225 depends on (ARCH_PXA && PXA25x) || ARCH_IXP4XX
226 select USB_OTG_UTILS
226 help 227 help
227 Intel's PXA 25x series XScale ARM-5TE processors include 228 Intel's PXA 25x series XScale ARM-5TE processors include
228 an integrated full speed USB 1.1 device controller. The 229 an integrated full speed USB 1.1 device controller. The
diff --git a/drivers/usb/gadget/ether.c b/drivers/usb/gadget/ether.c
index f37de283d0ab..167cb2a8ecef 100644
--- a/drivers/usb/gadget/ether.c
+++ b/drivers/usb/gadget/ether.c
@@ -61,11 +61,6 @@
61 * simpler, Microsoft pushes their own approach: RNDIS. The published 61 * simpler, Microsoft pushes their own approach: RNDIS. The published
62 * RNDIS specs are ambiguous and appear to be incomplete, and are also 62 * RNDIS specs are ambiguous and appear to be incomplete, and are also
63 * needlessly complex. They borrow more from CDC ACM than CDC ECM. 63 * needlessly complex. They borrow more from CDC ACM than CDC ECM.
64 *
65 * While CDC ECM, CDC Subset, and RNDIS are designed to extend the ethernet
66 * interface to the target, CDC EEM was designed to use ethernet over the USB
67 * link between the host and target. CDC EEM is implemented as an alternative
68 * to those other protocols when that communication model is more appropriate
69 */ 64 */
70 65
71#define DRIVER_DESC "Ethernet Gadget" 66#define DRIVER_DESC "Ethernet Gadget"
@@ -157,8 +152,8 @@ static inline bool has_rndis(void)
157#define RNDIS_PRODUCT_NUM 0xa4a2 /* Ethernet/RNDIS Gadget */ 152#define RNDIS_PRODUCT_NUM 0xa4a2 /* Ethernet/RNDIS Gadget */
158 153
159/* For EEM gadgets */ 154/* For EEM gadgets */
160#define EEM_VENDOR_NUM 0x0525 /* INVALID - NEEDS TO BE ALLOCATED */ 155#define EEM_VENDOR_NUM 0x1d6b /* Linux Foundation */
161#define EEM_PRODUCT_NUM 0xa4a1 /* INVALID - NEEDS TO BE ALLOCATED */ 156#define EEM_PRODUCT_NUM 0x0102 /* EEM Gadget */
162 157
163/*-------------------------------------------------------------------------*/ 158/*-------------------------------------------------------------------------*/
164 159
diff --git a/drivers/usb/gadget/fsl_udc_core.c b/drivers/usb/gadget/fsl_udc_core.c
index 42a74b8a0bb8..fa3d142ba64d 100644
--- a/drivers/usb/gadget/fsl_udc_core.c
+++ b/drivers/usb/gadget/fsl_udc_core.c
@@ -2139,7 +2139,7 @@ static int fsl_proc_read(char *page, char **start, off_t off, int count,
2139static void fsl_udc_release(struct device *dev) 2139static void fsl_udc_release(struct device *dev)
2140{ 2140{
2141 complete(udc_controller->done); 2141 complete(udc_controller->done);
2142 dma_free_coherent(dev, udc_controller->ep_qh_size, 2142 dma_free_coherent(dev->parent, udc_controller->ep_qh_size,
2143 udc_controller->ep_qh, udc_controller->ep_qh_dma); 2143 udc_controller->ep_qh, udc_controller->ep_qh_dma);
2144 kfree(udc_controller); 2144 kfree(udc_controller);
2145} 2145}
diff --git a/drivers/usb/host/ehci-sched.c b/drivers/usb/host/ehci-sched.c
index 3efa59b18044..b25cdea93a1f 100644
--- a/drivers/usb/host/ehci-sched.c
+++ b/drivers/usb/host/ehci-sched.c
@@ -1400,6 +1400,10 @@ iso_stream_schedule (
1400 goto fail; 1400 goto fail;
1401 } 1401 }
1402 1402
1403 period = urb->interval;
1404 if (!stream->highspeed)
1405 period <<= 3;
1406
1403 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod; 1407 now = ehci_readl(ehci, &ehci->regs->frame_index) % mod;
1404 1408
1405 /* when's the last uframe this urb could start? */ 1409 /* when's the last uframe this urb could start? */
@@ -1417,8 +1421,8 @@ iso_stream_schedule (
1417 1421
1418 /* Fell behind (by up to twice the slop amount)? */ 1422 /* Fell behind (by up to twice the slop amount)? */
1419 if (start >= max - 2 * 8 * SCHEDULE_SLOP) 1423 if (start >= max - 2 * 8 * SCHEDULE_SLOP)
1420 start += stream->interval * DIV_ROUND_UP( 1424 start += period * DIV_ROUND_UP(
1421 max - start, stream->interval) - mod; 1425 max - start, period) - mod;
1422 1426
1423 /* Tried to schedule too far into the future? */ 1427 /* Tried to schedule too far into the future? */
1424 if (unlikely((start + sched->span) >= max)) { 1428 if (unlikely((start + sched->span) >= max)) {
@@ -1441,10 +1445,6 @@ iso_stream_schedule (
1441 1445
1442 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */ 1446 /* NOTE: assumes URB_ISO_ASAP, to limit complexity/bugs */
1443 1447
1444 period = urb->interval;
1445 if (!stream->highspeed)
1446 period <<= 3;
1447
1448 /* find a uframe slot with enough bandwidth */ 1448 /* find a uframe slot with enough bandwidth */
1449 for (; start < (stream->next_uframe + period); start++) { 1449 for (; start < (stream->next_uframe + period); start++) {
1450 int enough_space; 1450 int enough_space;
diff --git a/drivers/usb/host/ohci-hcd.c b/drivers/usb/host/ohci-hcd.c
index 78bb7710f36d..24eb74781919 100644
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -87,6 +87,7 @@ static int ohci_restart (struct ohci_hcd *ohci);
87#ifdef CONFIG_PCI 87#ifdef CONFIG_PCI
88static void quirk_amd_pll(int state); 88static void quirk_amd_pll(int state);
89static void amd_iso_dev_put(void); 89static void amd_iso_dev_put(void);
90static void sb800_prefetch(struct ohci_hcd *ohci, int on);
90#else 91#else
91static inline void quirk_amd_pll(int state) 92static inline void quirk_amd_pll(int state)
92{ 93{
@@ -96,6 +97,10 @@ static inline void amd_iso_dev_put(void)
96{ 97{
97 return; 98 return;
98} 99}
100static inline void sb800_prefetch(struct ohci_hcd *ohci, int on)
101{
102 return;
103}
99#endif 104#endif
100 105
101 106
diff --git a/drivers/usb/host/ohci-pci.c b/drivers/usb/host/ohci-pci.c
index d2ba04dd785e..b8a1148f248e 100644
--- a/drivers/usb/host/ohci-pci.c
+++ b/drivers/usb/host/ohci-pci.c
@@ -177,6 +177,13 @@ static int ohci_quirk_amd700(struct usb_hcd *hcd)
177 return 0; 177 return 0;
178 178
179 pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev); 179 pci_read_config_byte(amd_smbus_dev, PCI_REVISION_ID, &rev);
180
181 /* SB800 needs pre-fetch fix */
182 if ((rev >= 0x40) && (rev <= 0x4f)) {
183 ohci->flags |= OHCI_QUIRK_AMD_PREFETCH;
184 ohci_dbg(ohci, "enabled AMD prefetch quirk\n");
185 }
186
180 if ((rev > 0x3b) || (rev < 0x30)) { 187 if ((rev > 0x3b) || (rev < 0x30)) {
181 pci_dev_put(amd_smbus_dev); 188 pci_dev_put(amd_smbus_dev);
182 amd_smbus_dev = NULL; 189 amd_smbus_dev = NULL;
@@ -262,6 +269,19 @@ static void amd_iso_dev_put(void)
262 269
263} 270}
264 271
272static void sb800_prefetch(struct ohci_hcd *ohci, int on)
273{
274 struct pci_dev *pdev;
275 u16 misc;
276
277 pdev = to_pci_dev(ohci_to_hcd(ohci)->self.controller);
278 pci_read_config_word(pdev, 0x50, &misc);
279 if (on == 0)
280 pci_write_config_word(pdev, 0x50, misc & 0xfcff);
281 else
282 pci_write_config_word(pdev, 0x50, misc | 0x0300);
283}
284
265/* List of quirks for OHCI */ 285/* List of quirks for OHCI */
266static const struct pci_device_id ohci_pci_quirks[] = { 286static const struct pci_device_id ohci_pci_quirks[] = {
267 { 287 {
diff --git a/drivers/usb/host/ohci-q.c b/drivers/usb/host/ohci-q.c
index 16fecb8ecc39..35288bcae0db 100644
--- a/drivers/usb/host/ohci-q.c
+++ b/drivers/usb/host/ohci-q.c
@@ -49,9 +49,12 @@ __acquires(ohci->lock)
49 switch (usb_pipetype (urb->pipe)) { 49 switch (usb_pipetype (urb->pipe)) {
50 case PIPE_ISOCHRONOUS: 50 case PIPE_ISOCHRONOUS:
51 ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--; 51 ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs--;
52 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0 52 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) {
53 && quirk_amdiso(ohci)) 53 if (quirk_amdiso(ohci))
54 quirk_amd_pll(1); 54 quirk_amd_pll(1);
55 if (quirk_amdprefetch(ohci))
56 sb800_prefetch(ohci, 0);
57 }
55 break; 58 break;
56 case PIPE_INTERRUPT: 59 case PIPE_INTERRUPT:
57 ohci_to_hcd(ohci)->self.bandwidth_int_reqs--; 60 ohci_to_hcd(ohci)->self.bandwidth_int_reqs--;
@@ -680,9 +683,12 @@ static void td_submit_urb (
680 data + urb->iso_frame_desc [cnt].offset, 683 data + urb->iso_frame_desc [cnt].offset,
681 urb->iso_frame_desc [cnt].length, urb, cnt); 684 urb->iso_frame_desc [cnt].length, urb, cnt);
682 } 685 }
683 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0 686 if (ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs == 0) {
684 && quirk_amdiso(ohci)) 687 if (quirk_amdiso(ohci))
685 quirk_amd_pll(0); 688 quirk_amd_pll(0);
689 if (quirk_amdprefetch(ohci))
690 sb800_prefetch(ohci, 1);
691 }
686 periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0 692 periodic = ohci_to_hcd(ohci)->self.bandwidth_isoc_reqs++ == 0
687 && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0; 693 && ohci_to_hcd(ohci)->self.bandwidth_int_reqs == 0;
688 break; 694 break;
diff --git a/drivers/usb/host/ohci.h b/drivers/usb/host/ohci.h
index 222011f6172c..5bf15fed0d9f 100644
--- a/drivers/usb/host/ohci.h
+++ b/drivers/usb/host/ohci.h
@@ -402,6 +402,7 @@ struct ohci_hcd {
402#define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */ 402#define OHCI_QUIRK_FRAME_NO 0x80 /* no big endian frame_no shift */
403#define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */ 403#define OHCI_QUIRK_HUB_POWER 0x100 /* distrust firmware power/oc setup */
404#define OHCI_QUIRK_AMD_ISO 0x200 /* ISO transfers*/ 404#define OHCI_QUIRK_AMD_ISO 0x200 /* ISO transfers*/
405#define OHCI_QUIRK_AMD_PREFETCH 0x400 /* pre-fetch for ISO transfer */
405 // there are also chip quirks/bugs in init logic 406 // there are also chip quirks/bugs in init logic
406 407
407 struct work_struct nec_work; /* Worker for NEC quirk */ 408 struct work_struct nec_work; /* Worker for NEC quirk */
@@ -433,6 +434,10 @@ static inline int quirk_amdiso(struct ohci_hcd *ohci)
433{ 434{
434 return ohci->flags & OHCI_QUIRK_AMD_ISO; 435 return ohci->flags & OHCI_QUIRK_AMD_ISO;
435} 436}
437static inline int quirk_amdprefetch(struct ohci_hcd *ohci)
438{
439 return ohci->flags & OHCI_QUIRK_AMD_PREFETCH;
440}
436#else 441#else
437static inline int quirk_nec(struct ohci_hcd *ohci) 442static inline int quirk_nec(struct ohci_hcd *ohci)
438{ 443{
@@ -446,6 +451,10 @@ static inline int quirk_amdiso(struct ohci_hcd *ohci)
446{ 451{
447 return 0; 452 return 0;
448} 453}
454static inline int quirk_amdprefetch(struct ohci_hcd *ohci)
455{
456 return 0;
457}
449#endif 458#endif
450 459
451/* convert between an hcd pointer and the corresponding ohci_hcd */ 460/* convert between an hcd pointer and the corresponding ohci_hcd */
diff --git a/drivers/usb/host/pci-quirks.c b/drivers/usb/host/pci-quirks.c
index 23cf3bde4762..83b5f9cea85a 100644
--- a/drivers/usb/host/pci-quirks.c
+++ b/drivers/usb/host/pci-quirks.c
@@ -475,4 +475,4 @@ static void __devinit quirk_usb_early_handoff(struct pci_dev *pdev)
475 else if (pdev->class == PCI_CLASS_SERIAL_USB_XHCI) 475 else if (pdev->class == PCI_CLASS_SERIAL_USB_XHCI)
476 quirk_usb_handoff_xhci(pdev); 476 quirk_usb_handoff_xhci(pdev);
477} 477}
478DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_usb_early_handoff); 478DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, quirk_usb_early_handoff);
diff --git a/drivers/usb/host/r8a66597-hcd.c b/drivers/usb/host/r8a66597-hcd.c
index 749b53742828..e33d36256350 100644
--- a/drivers/usb/host/r8a66597-hcd.c
+++ b/drivers/usb/host/r8a66597-hcd.c
@@ -1003,19 +1003,20 @@ static void r8a66597_check_syssts(struct r8a66597 *r8a66597, int port,
1003 if (syssts == SE0) { 1003 if (syssts == SE0) {
1004 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port)); 1004 r8a66597_write(r8a66597, ~ATTCH, get_intsts_reg(port));
1005 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port)); 1005 r8a66597_bset(r8a66597, ATTCHE, get_intenb_reg(port));
1006 return; 1006 } else {
1007 } 1007 if (syssts == FS_JSTS)
1008 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port));
1009 else if (syssts == LS_JSTS)
1010 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
1008 1011
1009 if (syssts == FS_JSTS) 1012 r8a66597_write(r8a66597, ~DTCH, get_intsts_reg(port));
1010 r8a66597_bset(r8a66597, HSE, get_syscfg_reg(port)); 1013 r8a66597_bset(r8a66597, DTCHE, get_intenb_reg(port));
1011 else if (syssts == LS_JSTS)
1012 r8a66597_bclr(r8a66597, HSE, get_syscfg_reg(port));
1013 1014
1014 r8a66597_write(r8a66597, ~DTCH, get_intsts_reg(port)); 1015 if (r8a66597->bus_suspended)
1015 r8a66597_bset(r8a66597, DTCHE, get_intenb_reg(port)); 1016 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1017 }
1016 1018
1017 if (r8a66597->bus_suspended) 1019 usb_hcd_poll_rh_status(r8a66597_to_hcd(r8a66597));
1018 usb_hcd_resume_root_hub(r8a66597_to_hcd(r8a66597));
1019} 1020}
1020 1021
1021/* this function must be called with interrupt disabled */ 1022/* this function must be called with interrupt disabled */
@@ -1024,6 +1025,8 @@ static void r8a66597_usb_connect(struct r8a66597 *r8a66597, int port)
1024 u16 speed = get_rh_usb_speed(r8a66597, port); 1025 u16 speed = get_rh_usb_speed(r8a66597, port);
1025 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port]; 1026 struct r8a66597_root_hub *rh = &r8a66597->root_hub[port];
1026 1027
1028 rh->port &= ~((1 << USB_PORT_FEAT_HIGHSPEED) |
1029 (1 << USB_PORT_FEAT_LOWSPEED));
1027 if (speed == HSMODE) 1030 if (speed == HSMODE)
1028 rh->port |= (1 << USB_PORT_FEAT_HIGHSPEED); 1031 rh->port |= (1 << USB_PORT_FEAT_HIGHSPEED);
1029 else if (speed == LSMODE) 1032 else if (speed == LSMODE)
diff --git a/drivers/usb/host/whci/asl.c b/drivers/usb/host/whci/asl.c
index c632437c7649..562eba108816 100644
--- a/drivers/usb/host/whci/asl.c
+++ b/drivers/usb/host/whci/asl.c
@@ -115,6 +115,10 @@ static uint32_t process_qset(struct whc *whc, struct whc_qset *qset)
115 if (status & QTD_STS_HALTED) { 115 if (status & QTD_STS_HALTED) {
116 /* Ug, an error. */ 116 /* Ug, an error. */
117 process_halted_qtd(whc, qset, td); 117 process_halted_qtd(whc, qset, td);
118 /* A halted qTD always triggers an update
119 because the qset was either removed or
120 reactivated. */
121 update |= WHC_UPDATE_UPDATED;
118 goto done; 122 goto done;
119 } 123 }
120 124
@@ -305,6 +309,7 @@ int asl_urb_dequeue(struct whc *whc, struct urb *urb, int status)
305 struct whc_urb *wurb = urb->hcpriv; 309 struct whc_urb *wurb = urb->hcpriv;
306 struct whc_qset *qset = wurb->qset; 310 struct whc_qset *qset = wurb->qset;
307 struct whc_std *std, *t; 311 struct whc_std *std, *t;
312 bool has_qtd = false;
308 int ret; 313 int ret;
309 unsigned long flags; 314 unsigned long flags;
310 315
@@ -315,17 +320,21 @@ int asl_urb_dequeue(struct whc *whc, struct urb *urb, int status)
315 goto out; 320 goto out;
316 321
317 list_for_each_entry_safe(std, t, &qset->stds, list_node) { 322 list_for_each_entry_safe(std, t, &qset->stds, list_node) {
318 if (std->urb == urb) 323 if (std->urb == urb) {
324 if (std->qtd)
325 has_qtd = true;
319 qset_free_std(whc, std); 326 qset_free_std(whc, std);
320 else 327 } else
321 std->qtd = NULL; /* so this std is re-added when the qset is */ 328 std->qtd = NULL; /* so this std is re-added when the qset is */
322 } 329 }
323 330
324 asl_qset_remove(whc, qset); 331 if (has_qtd) {
325 wurb->status = status; 332 asl_qset_remove(whc, qset);
326 wurb->is_async = true; 333 wurb->status = status;
327 queue_work(whc->workqueue, &wurb->dequeue_work); 334 wurb->is_async = true;
328 335 queue_work(whc->workqueue, &wurb->dequeue_work);
336 } else
337 qset_remove_urb(whc, qset, urb, status);
329out: 338out:
330 spin_unlock_irqrestore(&whc->lock, flags); 339 spin_unlock_irqrestore(&whc->lock, flags);
331 340
diff --git a/drivers/usb/host/whci/pzl.c b/drivers/usb/host/whci/pzl.c
index a9e05bac6646..0db3fb2dc03a 100644
--- a/drivers/usb/host/whci/pzl.c
+++ b/drivers/usb/host/whci/pzl.c
@@ -121,6 +121,10 @@ static enum whc_update pzl_process_qset(struct whc *whc, struct whc_qset *qset)
121 if (status & QTD_STS_HALTED) { 121 if (status & QTD_STS_HALTED) {
122 /* Ug, an error. */ 122 /* Ug, an error. */
123 process_halted_qtd(whc, qset, td); 123 process_halted_qtd(whc, qset, td);
124 /* A halted qTD always triggers an update
125 because the qset was either removed or
126 reactivated. */
127 update |= WHC_UPDATE_UPDATED;
124 goto done; 128 goto done;
125 } 129 }
126 130
@@ -333,6 +337,7 @@ int pzl_urb_dequeue(struct whc *whc, struct urb *urb, int status)
333 struct whc_urb *wurb = urb->hcpriv; 337 struct whc_urb *wurb = urb->hcpriv;
334 struct whc_qset *qset = wurb->qset; 338 struct whc_qset *qset = wurb->qset;
335 struct whc_std *std, *t; 339 struct whc_std *std, *t;
340 bool has_qtd = false;
336 int ret; 341 int ret;
337 unsigned long flags; 342 unsigned long flags;
338 343
@@ -343,17 +348,22 @@ int pzl_urb_dequeue(struct whc *whc, struct urb *urb, int status)
343 goto out; 348 goto out;
344 349
345 list_for_each_entry_safe(std, t, &qset->stds, list_node) { 350 list_for_each_entry_safe(std, t, &qset->stds, list_node) {
346 if (std->urb == urb) 351 if (std->urb == urb) {
352 if (std->qtd)
353 has_qtd = true;
347 qset_free_std(whc, std); 354 qset_free_std(whc, std);
348 else 355 } else
349 std->qtd = NULL; /* so this std is re-added when the qset is */ 356 std->qtd = NULL; /* so this std is re-added when the qset is */
350 } 357 }
351 358
352 pzl_qset_remove(whc, qset); 359 if (has_qtd) {
353 wurb->status = status; 360 pzl_qset_remove(whc, qset);
354 wurb->is_async = false; 361 update_pzl_hw_view(whc);
355 queue_work(whc->workqueue, &wurb->dequeue_work); 362 wurb->status = status;
356 363 wurb->is_async = false;
364 queue_work(whc->workqueue, &wurb->dequeue_work);
365 } else
366 qset_remove_urb(whc, qset, urb, status);
357out: 367out:
358 spin_unlock_irqrestore(&whc->lock, flags); 368 spin_unlock_irqrestore(&whc->lock, flags);
359 369
diff --git a/drivers/usb/host/xhci-mem.c b/drivers/usb/host/xhci-mem.c
index 1db4fea8c170..b8fd270a8b0d 100644
--- a/drivers/usb/host/xhci-mem.c
+++ b/drivers/usb/host/xhci-mem.c
@@ -802,9 +802,11 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
802 int i; 802 int i;
803 803
804 /* Free the Event Ring Segment Table and the actual Event Ring */ 804 /* Free the Event Ring Segment Table and the actual Event Ring */
805 xhci_writel(xhci, 0, &xhci->ir_set->erst_size); 805 if (xhci->ir_set) {
806 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base); 806 xhci_writel(xhci, 0, &xhci->ir_set->erst_size);
807 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue); 807 xhci_write_64(xhci, 0, &xhci->ir_set->erst_base);
808 xhci_write_64(xhci, 0, &xhci->ir_set->erst_dequeue);
809 }
808 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries); 810 size = sizeof(struct xhci_erst_entry)*(xhci->erst.num_entries);
809 if (xhci->erst.entries) 811 if (xhci->erst.entries)
810 pci_free_consistent(pdev, size, 812 pci_free_consistent(pdev, size,
@@ -841,9 +843,9 @@ void xhci_mem_cleanup(struct xhci_hcd *xhci)
841 xhci->dcbaa, xhci->dcbaa->dma); 843 xhci->dcbaa, xhci->dcbaa->dma);
842 xhci->dcbaa = NULL; 844 xhci->dcbaa = NULL;
843 845
846 scratchpad_free(xhci);
844 xhci->page_size = 0; 847 xhci->page_size = 0;
845 xhci->page_shift = 0; 848 xhci->page_shift = 0;
846 scratchpad_free(xhci);
847} 849}
848 850
849int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags) 851int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 173c39c76489..821b7b4709de 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -864,9 +864,11 @@ static struct xhci_segment *trb_in_td(
864 cur_seg = start_seg; 864 cur_seg = start_seg;
865 865
866 do { 866 do {
867 if (start_dma == 0)
868 return 0;
867 /* We may get an event for a Link TRB in the middle of a TD */ 869 /* We may get an event for a Link TRB in the middle of a TD */
868 end_seg_dma = xhci_trb_virt_to_dma(cur_seg, 870 end_seg_dma = xhci_trb_virt_to_dma(cur_seg,
869 &start_seg->trbs[TRBS_PER_SEGMENT - 1]); 871 &cur_seg->trbs[TRBS_PER_SEGMENT - 1]);
870 /* If the end TRB isn't in this segment, this is set to 0 */ 872 /* If the end TRB isn't in this segment, this is set to 0 */
871 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb); 873 end_trb_dma = xhci_trb_virt_to_dma(cur_seg, end_trb);
872 874
@@ -893,8 +895,9 @@ static struct xhci_segment *trb_in_td(
893 } 895 }
894 cur_seg = cur_seg->next; 896 cur_seg = cur_seg->next;
895 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]); 897 start_dma = xhci_trb_virt_to_dma(cur_seg, &cur_seg->trbs[0]);
896 } while (1); 898 } while (cur_seg != start_seg);
897 899
900 return 0;
898} 901}
899 902
900/* 903/*
diff --git a/drivers/usb/mon/mon_bin.c b/drivers/usb/mon/mon_bin.c
index 9ed3e741bee1..10f3205798e8 100644
--- a/drivers/usb/mon/mon_bin.c
+++ b/drivers/usb/mon/mon_bin.c
@@ -348,12 +348,12 @@ static unsigned int mon_buff_area_alloc_contiguous(struct mon_reader_bin *rp,
348 348
349/* 349/*
350 * Return a few (kilo-)bytes to the head of the buffer. 350 * Return a few (kilo-)bytes to the head of the buffer.
351 * This is used if a DMA fetch fails. 351 * This is used if a data fetch fails.
352 */ 352 */
353static void mon_buff_area_shrink(struct mon_reader_bin *rp, unsigned int size) 353static void mon_buff_area_shrink(struct mon_reader_bin *rp, unsigned int size)
354{ 354{
355 355
356 size = (size + PKT_ALIGN-1) & ~(PKT_ALIGN-1); 356 /* size &= ~(PKT_ALIGN-1); -- we're called with aligned size */
357 rp->b_cnt -= size; 357 rp->b_cnt -= size;
358 if (rp->b_in < size) 358 if (rp->b_in < size)
359 rp->b_in += rp->b_size; 359 rp->b_in += rp->b_size;
@@ -433,6 +433,7 @@ static void mon_bin_event(struct mon_reader_bin *rp, struct urb *urb,
433 unsigned int urb_length; 433 unsigned int urb_length;
434 unsigned int offset; 434 unsigned int offset;
435 unsigned int length; 435 unsigned int length;
436 unsigned int delta;
436 unsigned int ndesc, lendesc; 437 unsigned int ndesc, lendesc;
437 unsigned char dir; 438 unsigned char dir;
438 struct mon_bin_hdr *ep; 439 struct mon_bin_hdr *ep;
@@ -537,8 +538,10 @@ static void mon_bin_event(struct mon_reader_bin *rp, struct urb *urb,
537 if (length != 0) { 538 if (length != 0) {
538 ep->flag_data = mon_bin_get_data(rp, offset, urb, length); 539 ep->flag_data = mon_bin_get_data(rp, offset, urb, length);
539 if (ep->flag_data != 0) { /* Yes, it's 0x00, not '0' */ 540 if (ep->flag_data != 0) { /* Yes, it's 0x00, not '0' */
540 ep->len_cap = 0; 541 delta = (ep->len_cap + PKT_ALIGN-1) & ~(PKT_ALIGN-1);
541 mon_buff_area_shrink(rp, length); 542 ep->len_cap -= length;
543 delta -= (ep->len_cap + PKT_ALIGN-1) & ~(PKT_ALIGN-1);
544 mon_buff_area_shrink(rp, delta);
542 } 545 }
543 } else { 546 } else {
544 ep->flag_data = data_tag; 547 ep->flag_data = data_tag;
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 760e7271d17b..b84abd8ee8a5 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -9,7 +9,7 @@ comment "Enable Host or Gadget support to see Inventra options"
9# (M)HDRC = (Multipoint) Highspeed Dual-Role Controller 9# (M)HDRC = (Multipoint) Highspeed Dual-Role Controller
10config USB_MUSB_HDRC 10config USB_MUSB_HDRC
11 depends on (USB || USB_GADGET) 11 depends on (USB || USB_GADGET)
12 depends on !SUPERH 12 depends on (ARM || BLACKFIN)
13 select NOP_USB_XCEIV if ARCH_DAVINCI 13 select NOP_USB_XCEIV if ARCH_DAVINCI
14 select TWL4030_USB if MACH_OMAP_3430SDP 14 select TWL4030_USB if MACH_OMAP_3430SDP
15 select NOP_USB_XCEIV if MACH_OMAP3EVM 15 select NOP_USB_XCEIV if MACH_OMAP3EVM
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index 698252a4dc5d..bd254ec97d14 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -50,6 +50,8 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port, struct file *,
50static void cp210x_break_ctl(struct tty_struct *, int); 50static void cp210x_break_ctl(struct tty_struct *, int);
51static int cp210x_startup(struct usb_serial *); 51static int cp210x_startup(struct usb_serial *);
52static void cp210x_disconnect(struct usb_serial *); 52static void cp210x_disconnect(struct usb_serial *);
53static void cp210x_dtr_rts(struct usb_serial_port *p, int on);
54static int cp210x_carrier_raised(struct usb_serial_port *p);
53 55
54static int debug; 56static int debug;
55 57
@@ -143,6 +145,8 @@ static struct usb_serial_driver cp210x_device = {
143 .tiocmset = cp210x_tiocmset, 145 .tiocmset = cp210x_tiocmset,
144 .attach = cp210x_startup, 146 .attach = cp210x_startup,
145 .disconnect = cp210x_disconnect, 147 .disconnect = cp210x_disconnect,
148 .dtr_rts = cp210x_dtr_rts,
149 .carrier_raised = cp210x_carrier_raised
146}; 150};
147 151
148/* Config request types */ 152/* Config request types */
@@ -746,6 +750,14 @@ static int cp210x_tiocmset_port(struct usb_serial_port *port, struct file *file,
746 return cp210x_set_config(port, CP210X_SET_MHS, &control, 2); 750 return cp210x_set_config(port, CP210X_SET_MHS, &control, 2);
747} 751}
748 752
753static void cp210x_dtr_rts(struct usb_serial_port *p, int on)
754{
755 if (on)
756 cp210x_tiocmset_port(p, NULL, TIOCM_DTR|TIOCM_RTS, 0);
757 else
758 cp210x_tiocmset_port(p, NULL, 0, TIOCM_DTR|TIOCM_RTS);
759}
760
749static int cp210x_tiocmget (struct tty_struct *tty, struct file *file) 761static int cp210x_tiocmget (struct tty_struct *tty, struct file *file)
750{ 762{
751 struct usb_serial_port *port = tty->driver_data; 763 struct usb_serial_port *port = tty->driver_data;
@@ -768,6 +780,15 @@ static int cp210x_tiocmget (struct tty_struct *tty, struct file *file)
768 return result; 780 return result;
769} 781}
770 782
783static int cp210x_carrier_raised(struct usb_serial_port *p)
784{
785 unsigned int control;
786 cp210x_get_config(p, CP210X_GET_MDMSTS, &control, 1);
787 if (control & CONTROL_DCD)
788 return 1;
789 return 0;
790}
791
771static void cp210x_break_ctl (struct tty_struct *tty, int break_state) 792static void cp210x_break_ctl (struct tty_struct *tty, int break_state)
772{ 793{
773 struct usb_serial_port *port = tty->driver_data; 794 struct usb_serial_port *port = tty->driver_data;
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c
index 43c227027560..319aaf9725b3 100644
--- a/drivers/usb/serial/option.c
+++ b/drivers/usb/serial/option.c
@@ -308,6 +308,7 @@ static int option_resume(struct usb_serial *serial);
308 308
309#define DLINK_VENDOR_ID 0x1186 309#define DLINK_VENDOR_ID 0x1186
310#define DLINK_PRODUCT_DWM_652 0x3e04 310#define DLINK_PRODUCT_DWM_652 0x3e04
311#define DLINK_PRODUCT_DWM_652_U5 0xce16
311 312
312#define QISDA_VENDOR_ID 0x1da5 313#define QISDA_VENDOR_ID 0x1da5
313#define QISDA_PRODUCT_H21_4512 0x4512 314#define QISDA_PRODUCT_H21_4512 0x4512
@@ -315,6 +316,9 @@ static int option_resume(struct usb_serial *serial);
315#define QISDA_PRODUCT_H20_4515 0x4515 316#define QISDA_PRODUCT_H20_4515 0x4515
316#define QISDA_PRODUCT_H20_4519 0x4519 317#define QISDA_PRODUCT_H20_4519 0x4519
317 318
319/* TLAYTECH PRODUCTS */
320#define TLAYTECH_VENDOR_ID 0x20B9
321#define TLAYTECH_PRODUCT_TEU800 0x1682
318 322
319/* TOSHIBA PRODUCTS */ 323/* TOSHIBA PRODUCTS */
320#define TOSHIBA_VENDOR_ID 0x0930 324#define TOSHIBA_VENDOR_ID 0x0930
@@ -328,6 +332,9 @@ static int option_resume(struct usb_serial *serial);
328#define ALCATEL_VENDOR_ID 0x1bbb 332#define ALCATEL_VENDOR_ID 0x1bbb
329#define ALCATEL_PRODUCT_X060S 0x0000 333#define ALCATEL_PRODUCT_X060S 0x0000
330 334
335/* Airplus products */
336#define AIRPLUS_VENDOR_ID 0x1011
337#define AIRPLUS_PRODUCT_MCD650 0x3198
331 338
332static struct usb_device_id option_ids[] = { 339static struct usb_device_id option_ids[] = {
333 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) }, 340 { USB_DEVICE(OPTION_VENDOR_ID, OPTION_PRODUCT_COLT) },
@@ -580,6 +587,7 @@ static struct usb_device_id option_ids[] = {
580 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) }, 587 { USB_DEVICE_AND_INTERFACE_INFO(ZTE_VENDOR_ID, ZTE_PRODUCT_AC2726, 0xff, 0xff, 0xff) },
581 { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) }, 588 { USB_DEVICE(BENQ_VENDOR_ID, BENQ_PRODUCT_H10) },
582 { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) }, 589 { USB_DEVICE(DLINK_VENDOR_ID, DLINK_PRODUCT_DWM_652) },
590 { USB_DEVICE(ALINK_VENDOR_ID, DLINK_PRODUCT_DWM_652_U5) }, /* Yes, ALINK_VENDOR_ID */
583 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) }, 591 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4512) },
584 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) }, 592 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H21_4523) },
585 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) }, 593 { USB_DEVICE(QISDA_VENDOR_ID, QISDA_PRODUCT_H20_4515) },
@@ -589,6 +597,8 @@ static struct usb_device_id option_ids[] = {
589 { USB_DEVICE(ALINK_VENDOR_ID, 0x9000) }, 597 { USB_DEVICE(ALINK_VENDOR_ID, 0x9000) },
590 { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) }, 598 { USB_DEVICE_AND_INTERFACE_INFO(ALINK_VENDOR_ID, ALINK_PRODUCT_3GU, 0xff, 0xff, 0xff) },
591 { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) }, 599 { USB_DEVICE(ALCATEL_VENDOR_ID, ALCATEL_PRODUCT_X060S) },
600 { USB_DEVICE(AIRPLUS_VENDOR_ID, AIRPLUS_PRODUCT_MCD650) },
601 { USB_DEVICE(TLAYTECH_VENDOR_ID, TLAYTECH_PRODUCT_TEU800) },
592 { } /* Terminating entry */ 602 { } /* Terminating entry */
593}; 603};
594MODULE_DEVICE_TABLE(usb, option_ids); 604MODULE_DEVICE_TABLE(usb, option_ids);
diff --git a/drivers/usb/serial/sierra.c b/drivers/usb/serial/sierra.c
index 45883988a005..5019325ba25d 100644
--- a/drivers/usb/serial/sierra.c
+++ b/drivers/usb/serial/sierra.c
@@ -296,7 +296,6 @@ struct sierra_port_private {
296 int dsr_state; 296 int dsr_state;
297 int dcd_state; 297 int dcd_state;
298 int ri_state; 298 int ri_state;
299
300 unsigned int opened:1; 299 unsigned int opened:1;
301}; 300};
302 301
@@ -306,6 +305,8 @@ static int sierra_send_setup(struct usb_serial_port *port)
306 struct sierra_port_private *portdata; 305 struct sierra_port_private *portdata;
307 __u16 interface = 0; 306 __u16 interface = 0;
308 int val = 0; 307 int val = 0;
308 int do_send = 0;
309 int retval;
309 310
310 dev_dbg(&port->dev, "%s\n", __func__); 311 dev_dbg(&port->dev, "%s\n", __func__);
311 312
@@ -324,10 +325,7 @@ static int sierra_send_setup(struct usb_serial_port *port)
324 */ 325 */
325 if (port->interrupt_in_urb) { 326 if (port->interrupt_in_urb) {
326 /* send control message */ 327 /* send control message */
327 return usb_control_msg(serial->dev, 328 do_send = 1;
328 usb_rcvctrlpipe(serial->dev, 0),
329 0x22, 0x21, val, interface,
330 NULL, 0, USB_CTRL_SET_TIMEOUT);
331 } 329 }
332 } 330 }
333 331
@@ -339,12 +337,18 @@ static int sierra_send_setup(struct usb_serial_port *port)
339 interface = 1; 337 interface = 1;
340 else if (port->bulk_out_endpointAddress == 5) 338 else if (port->bulk_out_endpointAddress == 5)
341 interface = 2; 339 interface = 2;
342 return usb_control_msg(serial->dev, 340
343 usb_rcvctrlpipe(serial->dev, 0), 341 do_send = 1;
344 0x22, 0x21, val, interface,
345 NULL, 0, USB_CTRL_SET_TIMEOUT);
346 } 342 }
347 return 0; 343 if (!do_send)
344 return 0;
345
346 usb_autopm_get_interface(serial->interface);
347 retval = usb_control_msg(serial->dev, usb_rcvctrlpipe(serial->dev, 0),
348 0x22, 0x21, val, interface, NULL, 0, USB_CTRL_SET_TIMEOUT);
349 usb_autopm_put_interface(serial->interface);
350
351 return retval;
348} 352}
349 353
350static void sierra_set_termios(struct tty_struct *tty, 354static void sierra_set_termios(struct tty_struct *tty,
@@ -773,8 +777,11 @@ static void sierra_close(struct usb_serial_port *port)
773 777
774 if (serial->dev) { 778 if (serial->dev) {
775 mutex_lock(&serial->disc_mutex); 779 mutex_lock(&serial->disc_mutex);
776 if (!serial->disconnected) 780 if (!serial->disconnected) {
781 serial->interface->needs_remote_wakeup = 0;
782 usb_autopm_get_interface(serial->interface);
777 sierra_send_setup(port); 783 sierra_send_setup(port);
784 }
778 mutex_unlock(&serial->disc_mutex); 785 mutex_unlock(&serial->disc_mutex);
779 spin_lock_irq(&intfdata->susp_lock); 786 spin_lock_irq(&intfdata->susp_lock);
780 portdata->opened = 0; 787 portdata->opened = 0;
@@ -788,8 +795,6 @@ static void sierra_close(struct usb_serial_port *port)
788 sierra_release_urb(portdata->in_urbs[i]); 795 sierra_release_urb(portdata->in_urbs[i]);
789 portdata->in_urbs[i] = NULL; 796 portdata->in_urbs[i] = NULL;
790 } 797 }
791 usb_autopm_get_interface(serial->interface);
792 serial->interface->needs_remote_wakeup = 0;
793 } 798 }
794} 799}
795 800
@@ -827,6 +832,8 @@ static int sierra_open(struct tty_struct *tty, struct usb_serial_port *port)
827 if (err) { 832 if (err) {
828 /* get rid of everything as in close */ 833 /* get rid of everything as in close */
829 sierra_close(port); 834 sierra_close(port);
835 /* restore balance for autopm */
836 usb_autopm_put_interface(serial->interface);
830 return err; 837 return err;
831 } 838 }
832 sierra_send_setup(port); 839 sierra_send_setup(port);
@@ -915,7 +922,7 @@ static void sierra_release(struct usb_serial *serial)
915#ifdef CONFIG_PM 922#ifdef CONFIG_PM
916static void stop_read_write_urbs(struct usb_serial *serial) 923static void stop_read_write_urbs(struct usb_serial *serial)
917{ 924{
918 int i, j; 925 int i;
919 struct usb_serial_port *port; 926 struct usb_serial_port *port;
920 struct sierra_port_private *portdata; 927 struct sierra_port_private *portdata;
921 928
@@ -923,8 +930,7 @@ static void stop_read_write_urbs(struct usb_serial *serial)
923 for (i = 0; i < serial->num_ports; ++i) { 930 for (i = 0; i < serial->num_ports; ++i) {
924 port = serial->port[i]; 931 port = serial->port[i];
925 portdata = usb_get_serial_port_data(port); 932 portdata = usb_get_serial_port_data(port);
926 for (j = 0; j < N_IN_URB; j++) 933 sierra_stop_rx_urbs(port);
927 usb_kill_urb(portdata->in_urbs[j]);
928 usb_kill_anchored_urbs(&portdata->active); 934 usb_kill_anchored_urbs(&portdata->active);
929 } 935 }
930} 936}
diff --git a/drivers/usb/storage/transport.c b/drivers/usb/storage/transport.c
index 3a4fb023af72..589f6b4404f0 100644
--- a/drivers/usb/storage/transport.c
+++ b/drivers/usb/storage/transport.c
@@ -696,7 +696,7 @@ void usb_stor_invoke_transport(struct scsi_cmnd *srb, struct us_data *us)
696 /* device supports and needs bigger sense buffer */ 696 /* device supports and needs bigger sense buffer */
697 if (us->fflags & US_FL_SANE_SENSE) 697 if (us->fflags & US_FL_SANE_SENSE)
698 sense_size = ~0; 698 sense_size = ~0;
699 699Retry_Sense:
700 US_DEBUGP("Issuing auto-REQUEST_SENSE\n"); 700 US_DEBUGP("Issuing auto-REQUEST_SENSE\n");
701 701
702 scsi_eh_prep_cmnd(srb, &ses, NULL, 0, sense_size); 702 scsi_eh_prep_cmnd(srb, &ses, NULL, 0, sense_size);
@@ -720,6 +720,21 @@ void usb_stor_invoke_transport(struct scsi_cmnd *srb, struct us_data *us)
720 srb->result = DID_ABORT << 16; 720 srb->result = DID_ABORT << 16;
721 goto Handle_Errors; 721 goto Handle_Errors;
722 } 722 }
723
724 /* Some devices claim to support larger sense but fail when
725 * trying to request it. When a transport failure happens
726 * using US_FS_SANE_SENSE, we always retry with a standard
727 * (small) sense request. This fixes some USB GSM modems
728 */
729 if (temp_result == USB_STOR_TRANSPORT_FAILED &&
730 (us->fflags & US_FL_SANE_SENSE) &&
731 sense_size != US_SENSE_SIZE) {
732 US_DEBUGP("-- auto-sense failure, retry small sense\n");
733 sense_size = US_SENSE_SIZE;
734 goto Retry_Sense;
735 }
736
737 /* Other failures */
723 if (temp_result != USB_STOR_TRANSPORT_GOOD) { 738 if (temp_result != USB_STOR_TRANSPORT_GOOD) {
724 US_DEBUGP("-- auto-sense failure\n"); 739 US_DEBUGP("-- auto-sense failure\n");
725 740
diff --git a/drivers/usb/wusbcore/security.c b/drivers/usb/wusbcore/security.c
index b2f149fedcc5..4516c36436e6 100644
--- a/drivers/usb/wusbcore/security.c
+++ b/drivers/usb/wusbcore/security.c
@@ -200,35 +200,40 @@ int wusb_dev_sec_add(struct wusbhc *wusbhc,
200{ 200{
201 int result, bytes, secd_size; 201 int result, bytes, secd_size;
202 struct device *dev = &usb_dev->dev; 202 struct device *dev = &usb_dev->dev;
203 struct usb_security_descriptor secd; 203 struct usb_security_descriptor *secd;
204 const struct usb_encryption_descriptor *etd, *ccm1_etd = NULL; 204 const struct usb_encryption_descriptor *etd, *ccm1_etd = NULL;
205 void *secd_buf;
206 const void *itr, *top; 205 const void *itr, *top;
207 char buf[64]; 206 char buf[64];
208 207
208 secd = kmalloc(sizeof(struct usb_security_descriptor), GFP_KERNEL);
209 if (secd == NULL) {
210 result = -ENOMEM;
211 goto out;
212 }
213
209 result = usb_get_descriptor(usb_dev, USB_DT_SECURITY, 214 result = usb_get_descriptor(usb_dev, USB_DT_SECURITY,
210 0, &secd, sizeof(secd)); 215 0, secd, sizeof(struct usb_security_descriptor));
211 if (result < sizeof(secd)) { 216 if (result < sizeof(secd)) {
212 dev_err(dev, "Can't read security descriptor or " 217 dev_err(dev, "Can't read security descriptor or "
213 "not enough data: %d\n", result); 218 "not enough data: %d\n", result);
214 goto error_secd; 219 goto out;
215 } 220 }
216 secd_size = le16_to_cpu(secd.wTotalLength); 221 secd_size = le16_to_cpu(secd->wTotalLength);
217 secd_buf = kmalloc(secd_size, GFP_KERNEL); 222 secd = krealloc(secd, secd_size, GFP_KERNEL);
218 if (secd_buf == NULL) { 223 if (secd == NULL) {
219 dev_err(dev, "Can't allocate space for security descriptors\n"); 224 dev_err(dev, "Can't allocate space for security descriptors\n");
220 goto error_secd_alloc; 225 goto out;
221 } 226 }
222 result = usb_get_descriptor(usb_dev, USB_DT_SECURITY, 227 result = usb_get_descriptor(usb_dev, USB_DT_SECURITY,
223 0, secd_buf, secd_size); 228 0, secd, secd_size);
224 if (result < secd_size) { 229 if (result < secd_size) {
225 dev_err(dev, "Can't read security descriptor or " 230 dev_err(dev, "Can't read security descriptor or "
226 "not enough data: %d\n", result); 231 "not enough data: %d\n", result);
227 goto error_secd_all; 232 goto out;
228 } 233 }
229 bytes = 0; 234 bytes = 0;
230 itr = secd_buf + sizeof(secd); 235 itr = &secd[1];
231 top = secd_buf + result; 236 top = (void *)secd + result;
232 while (itr < top) { 237 while (itr < top) {
233 etd = itr; 238 etd = itr;
234 if (top - itr < sizeof(*etd)) { 239 if (top - itr < sizeof(*etd)) {
@@ -259,24 +264,16 @@ int wusb_dev_sec_add(struct wusbhc *wusbhc,
259 dev_err(dev, "WUSB device doesn't support CCM1 encryption, " 264 dev_err(dev, "WUSB device doesn't support CCM1 encryption, "
260 "can't use!\n"); 265 "can't use!\n");
261 result = -EINVAL; 266 result = -EINVAL;
262 goto error_no_ccm1; 267 goto out;
263 } 268 }
264 wusb_dev->ccm1_etd = *ccm1_etd; 269 wusb_dev->ccm1_etd = *ccm1_etd;
265 dev_dbg(dev, "supported encryption: %s; using %s (0x%02x/%02x)\n", 270 dev_dbg(dev, "supported encryption: %s; using %s (0x%02x/%02x)\n",
266 buf, wusb_et_name(ccm1_etd->bEncryptionType), 271 buf, wusb_et_name(ccm1_etd->bEncryptionType),
267 ccm1_etd->bEncryptionValue, ccm1_etd->bAuthKeyIndex); 272 ccm1_etd->bEncryptionValue, ccm1_etd->bAuthKeyIndex);
268 result = 0; 273 result = 0;
269 kfree(secd_buf);
270out: 274out:
275 kfree(secd);
271 return result; 276 return result;
272
273
274error_no_ccm1:
275error_secd_all:
276 kfree(secd_buf);
277error_secd_alloc:
278error_secd:
279 goto out;
280} 277}
281 278
282void wusb_dev_sec_rm(struct wusb_dev *wusb_dev) 279void wusb_dev_sec_rm(struct wusb_dev *wusb_dev)
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig
index 9bbb2855ea91..188e1ba3b69f 100644
--- a/drivers/video/Kconfig
+++ b/drivers/video/Kconfig
@@ -2121,7 +2121,7 @@ config FB_EP93XX
2121 2121
2122config FB_PRE_INIT_FB 2122config FB_PRE_INIT_FB
2123 bool "Don't reinitialize, use bootloader's GDC/Display configuration" 2123 bool "Don't reinitialize, use bootloader's GDC/Display configuration"
2124 depends on FB_MB862XX_LIME 2124 depends on FB && FB_MB862XX_LIME
2125 ---help--- 2125 ---help---
2126 Select this option if display contents should be inherited as set by 2126 Select this option if display contents should be inherited as set by
2127 the bootloader. 2127 the bootloader.
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c
index 8cd279be74e5..37624f74e88b 100644
--- a/drivers/video/atafb.c
+++ b/drivers/video/atafb.c
@@ -329,12 +329,6 @@ extern unsigned char fontdata_8x16[];
329 * 329 *
330 * * perform fb specific mmap * 330 * * perform fb specific mmap *
331 * int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma); 331 * int (*fb_mmap)(struct fb_info *info, struct vm_area_struct *vma);
332 *
333 * * save current hardware state *
334 * void (*fb_save_state)(struct fb_info *info);
335 *
336 * * restore saved state *
337 * void (*fb_restore_state)(struct fb_info *info);
338 * } ; 332 * } ;
339 */ 333 */
340 334
diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c
index 2830ffd72976..d5e801076d33 100644
--- a/drivers/video/atmel_lcdfb.c
+++ b/drivers/video/atmel_lcdfb.c
@@ -484,6 +484,7 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
484 unsigned long value; 484 unsigned long value;
485 unsigned long clk_value_khz; 485 unsigned long clk_value_khz;
486 unsigned long bits_per_line; 486 unsigned long bits_per_line;
487 unsigned long pix_factor = 2;
487 488
488 might_sleep(); 489 might_sleep();
489 490
@@ -516,20 +517,24 @@ static int atmel_lcdfb_set_par(struct fb_info *info)
516 /* Now, the LCDC core... */ 517 /* Now, the LCDC core... */
517 518
518 /* Set pixel clock */ 519 /* Set pixel clock */
520 if (cpu_is_at91sam9g45() && !cpu_is_at91sam9g45es())
521 pix_factor = 1;
522
519 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000; 523 clk_value_khz = clk_get_rate(sinfo->lcdc_clk) / 1000;
520 524
521 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock)); 525 value = DIV_ROUND_UP(clk_value_khz, PICOS2KHZ(info->var.pixclock));
522 526
523 if (value < 2) { 527 if (value < pix_factor) {
524 dev_notice(info->device, "Bypassing pixel clock divider\n"); 528 dev_notice(info->device, "Bypassing pixel clock divider\n");
525 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS); 529 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, ATMEL_LCDC_BYPASS);
526 } else { 530 } else {
527 value = (value / 2) - 1; 531 value = (value / pix_factor) - 1;
528 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n", 532 dev_dbg(info->device, " * programming CLKVAL = 0x%08lx\n",
529 value); 533 value);
530 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1, 534 lcdc_writel(sinfo, ATMEL_LCDC_LCDCON1,
531 value << ATMEL_LCDC_CLKVAL_OFFSET); 535 value << ATMEL_LCDC_CLKVAL_OFFSET);
532 info->var.pixclock = KHZ2PICOS(clk_value_khz / (2 * (value + 1))); 536 info->var.pixclock =
537 KHZ2PICOS(clk_value_khz / (pix_factor * (value + 1)));
533 dev_dbg(info->device, " updated pixclk: %lu KHz\n", 538 dev_dbg(info->device, " updated pixclk: %lu KHz\n",
534 PICOS2KHZ(info->var.pixclock)); 539 PICOS2KHZ(info->var.pixclock));
535 } 540 }
diff --git a/drivers/video/backlight/corgi_lcd.c b/drivers/video/backlight/corgi_lcd.c
index 2211a852af9c..96774949cd30 100644
--- a/drivers/video/backlight/corgi_lcd.c
+++ b/drivers/video/backlight/corgi_lcd.c
@@ -433,8 +433,9 @@ static int corgi_bl_update_status(struct backlight_device *bd)
433 433
434 if (corgibl_flags & CORGIBL_SUSPENDED) 434 if (corgibl_flags & CORGIBL_SUSPENDED)
435 intensity = 0; 435 intensity = 0;
436 if (corgibl_flags & CORGIBL_BATTLOW) 436
437 intensity &= lcd->limit_mask; 437 if ((corgibl_flags & CORGIBL_BATTLOW) && intensity > lcd->limit_mask)
438 intensity = lcd->limit_mask;
438 439
439 return corgi_bl_set_intensity(lcd, intensity); 440 return corgi_bl_set_intensity(lcd, intensity);
440} 441}
diff --git a/drivers/video/backlight/lcd.c b/drivers/video/backlight/lcd.c
index b6449470106c..a482dd7b0311 100644
--- a/drivers/video/backlight/lcd.c
+++ b/drivers/video/backlight/lcd.c
@@ -56,7 +56,7 @@ static int fb_notifier_callback(struct notifier_block *self,
56 56
57static int lcd_register_fb(struct lcd_device *ld) 57static int lcd_register_fb(struct lcd_device *ld)
58{ 58{
59 memset(&ld->fb_notif, 0, sizeof(&ld->fb_notif)); 59 memset(&ld->fb_notif, 0, sizeof(ld->fb_notif));
60 ld->fb_notif.notifier_call = fb_notifier_callback; 60 ld->fb_notif.notifier_call = fb_notifier_callback;
61 return fb_register_client(&ld->fb_notif); 61 return fb_register_client(&ld->fb_notif);
62} 62}
diff --git a/drivers/video/console/fbcon.c b/drivers/video/console/fbcon.c
index 5a686cea23f4..3681c6a88212 100644
--- a/drivers/video/console/fbcon.c
+++ b/drivers/video/console/fbcon.c
@@ -2311,14 +2311,11 @@ static int fbcon_blank(struct vc_data *vc, int blank, int mode_switch)
2311 ops->graphics = 1; 2311 ops->graphics = 1;
2312 2312
2313 if (!blank) { 2313 if (!blank) {
2314 if (info->fbops->fb_save_state)
2315 info->fbops->fb_save_state(info);
2316 var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE; 2314 var.activate = FB_ACTIVATE_NOW | FB_ACTIVATE_FORCE;
2317 fb_set_var(info, &var); 2315 fb_set_var(info, &var);
2318 ops->graphics = 0; 2316 ops->graphics = 0;
2319 ops->var = info->var; 2317 ops->var = info->var;
2320 } else if (info->fbops->fb_restore_state) 2318 }
2321 info->fbops->fb_restore_state(info);
2322 } 2319 }
2323 2320
2324 if (!fbcon_is_inactive(vc, info)) { 2321 if (!fbcon_is_inactive(vc, info)) {
diff --git a/drivers/video/da8xx-fb.c b/drivers/video/da8xx-fb.c
index d065894ce38f..035d56835b75 100644
--- a/drivers/video/da8xx-fb.c
+++ b/drivers/video/da8xx-fb.c
@@ -704,7 +704,7 @@ static int __init fb_probe(struct platform_device *device)
704 704
705 if (i == ARRAY_SIZE(known_lcd_panels)) { 705 if (i == ARRAY_SIZE(known_lcd_panels)) {
706 dev_err(&device->dev, "GLCD: No valid panel found\n"); 706 dev_err(&device->dev, "GLCD: No valid panel found\n");
707 ret = ENODEV; 707 ret = -ENODEV;
708 goto err_clk_disable; 708 goto err_clk_disable;
709 } else 709 } else
710 dev_info(&device->dev, "GLCD: Found %s panel\n", 710 dev_info(&device->dev, "GLCD: Found %s panel\n",
diff --git a/drivers/video/msm/mddi.c b/drivers/video/msm/mddi.c
index 5c5a1ad1d397..474421fe79a6 100644
--- a/drivers/video/msm/mddi.c
+++ b/drivers/video/msm/mddi.c
@@ -24,6 +24,7 @@
24#include <linux/spinlock.h> 24#include <linux/spinlock.h>
25#include <linux/clk.h> 25#include <linux/clk.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/sched.h>
27#include <mach/msm_iomap.h> 28#include <mach/msm_iomap.h>
28#include <mach/irqs.h> 29#include <mach/irqs.h>
29#include <mach/board.h> 30#include <mach/board.h>
diff --git a/drivers/video/msm/mddi_client_nt35399.c b/drivers/video/msm/mddi_client_nt35399.c
index 9c78050ac799..c9e9349451cb 100644
--- a/drivers/video/msm/mddi_client_nt35399.c
+++ b/drivers/video/msm/mddi_client_nt35399.c
@@ -19,6 +19,7 @@
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/sched.h>
22#include <linux/gpio.h> 23#include <linux/gpio.h>
23#include <mach/msm_fb.h> 24#include <mach/msm_fb.h>
24 25
diff --git a/drivers/video/msm/mddi_client_toshiba.c b/drivers/video/msm/mddi_client_toshiba.c
index 80d0f5fdf0b1..71048e78f7f0 100644
--- a/drivers/video/msm/mddi_client_toshiba.c
+++ b/drivers/video/msm/mddi_client_toshiba.c
@@ -20,6 +20,7 @@
20#include <linux/platform_device.h> 20#include <linux/platform_device.h>
21#include <linux/interrupt.h> 21#include <linux/interrupt.h>
22#include <linux/gpio.h> 22#include <linux/gpio.h>
23#include <linux/sched.h>
23#include <mach/msm_fb.h> 24#include <mach/msm_fb.h>
24 25
25 26
diff --git a/drivers/video/msm/mdp.c b/drivers/video/msm/mdp.c
index 99636a2b20f2..6c519e2fa2b7 100644
--- a/drivers/video/msm/mdp.c
+++ b/drivers/video/msm/mdp.c
@@ -22,9 +22,6 @@
22#include <linux/wait.h> 22#include <linux/wait.h>
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/file.h> 24#include <linux/file.h>
25#ifdef CONFIG_ANDROID_PMEM
26#include <linux/android_pmem.h>
27#endif
28#include <linux/major.h> 25#include <linux/major.h>
29 26
30#include <mach/msm_iomap.h> 27#include <mach/msm_iomap.h>
@@ -262,11 +259,6 @@ int get_img(struct mdp_img *img, struct fb_info *info,
262 struct file *file; 259 struct file *file;
263 unsigned long vstart; 260 unsigned long vstart;
264 261
265#ifdef CONFIG_ANDROID_PMEM
266 if (!get_pmem_file(img->memory_id, start, &vstart, len, filep))
267 return 0;
268#endif
269
270 file = fget_light(img->memory_id, &put_needed); 262 file = fget_light(img->memory_id, &put_needed);
271 if (file == NULL) 263 if (file == NULL)
272 return -1; 264 return -1;
@@ -283,12 +275,6 @@ int get_img(struct mdp_img *img, struct fb_info *info,
283 275
284void put_img(struct file *src_file, struct file *dst_file) 276void put_img(struct file *src_file, struct file *dst_file)
285{ 277{
286#ifdef CONFIG_ANDROID_PMEM
287 if (src_file)
288 put_pmem_file(src_file);
289 if (dst_file)
290 put_pmem_file(dst_file);
291#endif
292} 278}
293 279
294int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb, 280int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb,
@@ -320,9 +306,6 @@ int mdp_blit(struct mdp_device *mdp_dev, struct fb_info *fb,
320 if (unlikely(get_img(&req->dst, fb, &dst_start, &dst_len, &dst_file))) { 306 if (unlikely(get_img(&req->dst, fb, &dst_start, &dst_len, &dst_file))) {
321 printk(KERN_ERR "mpd_ppp: could not retrieve dst image from " 307 printk(KERN_ERR "mpd_ppp: could not retrieve dst image from "
322 "memory\n"); 308 "memory\n");
323#ifdef CONFIG_ANDROID_PMEM
324 put_pmem_file(src_file);
325#endif
326 return -EINVAL; 309 return -EINVAL;
327 } 310 }
328 mutex_lock(&mdp_mutex); 311 mutex_lock(&mdp_mutex);
@@ -499,7 +482,6 @@ int mdp_probe(struct platform_device *pdev)
499 /* register mdp device */ 482 /* register mdp device */
500 mdp->mdp_dev.dev.parent = &pdev->dev; 483 mdp->mdp_dev.dev.parent = &pdev->dev;
501 mdp->mdp_dev.dev.class = mdp_class; 484 mdp->mdp_dev.dev.class = mdp_class;
502 snprintf(mdp->mdp_dev.dev.bus_id, BUS_ID_SIZE, "mdp%d", pdev->id);
503 485
504 /* if you can remove the platform device you'd have to implement 486 /* if you can remove the platform device you'd have to implement
505 * this: 487 * this:
diff --git a/drivers/video/msm/mdp_ppp.c b/drivers/video/msm/mdp_ppp.c
index ba2c4673b648..4ff001f4cbbd 100644
--- a/drivers/video/msm/mdp_ppp.c
+++ b/drivers/video/msm/mdp_ppp.c
@@ -16,7 +16,6 @@
16#include <linux/file.h> 16#include <linux/file.h>
17#include <linux/delay.h> 17#include <linux/delay.h>
18#include <linux/msm_mdp.h> 18#include <linux/msm_mdp.h>
19#include <linux/android_pmem.h>
20#include <mach/msm_fb.h> 19#include <mach/msm_fb.h>
21 20
22#include "mdp_hw.h" 21#include "mdp_hw.h"
@@ -579,25 +578,6 @@ static int valid_src_dst(unsigned long src_start, unsigned long src_len,
579static void flush_imgs(struct mdp_blit_req *req, struct mdp_regs *regs, 578static void flush_imgs(struct mdp_blit_req *req, struct mdp_regs *regs,
580 struct file *src_file, struct file *dst_file) 579 struct file *src_file, struct file *dst_file)
581{ 580{
582#ifdef CONFIG_ANDROID_PMEM
583 uint32_t src0_len, src1_len, dst0_len, dst1_len;
584
585 /* flush src images to memory before dma to mdp */
586 get_len(&req->src, &req->src_rect, regs->src_bpp, &src0_len,
587 &src1_len);
588 flush_pmem_file(src_file, req->src.offset, src0_len);
589 if (IS_PSEUDOPLNR(req->src.format))
590 flush_pmem_file(src_file, req->src.offset + src0_len,
591 src1_len);
592
593 /* flush dst images */
594 get_len(&req->dst, &req->dst_rect, regs->dst_bpp, &dst0_len,
595 &dst1_len);
596 flush_pmem_file(dst_file, req->dst.offset, dst0_len);
597 if (IS_PSEUDOPLNR(req->dst.format))
598 flush_pmem_file(dst_file, req->dst.offset + dst0_len,
599 dst1_len);
600#endif
601} 581}
602 582
603static void get_chroma_addr(struct mdp_img *img, struct mdp_rect *rect, 583static void get_chroma_addr(struct mdp_img *img, struct mdp_rect *rect,
diff --git a/drivers/video/savage/savagefb_driver.c b/drivers/video/savage/savagefb_driver.c
index 37b135d5d12e..842d157e1025 100644
--- a/drivers/video/savage/savagefb_driver.c
+++ b/drivers/video/savage/savagefb_driver.c
@@ -1565,7 +1565,7 @@ static int savagefb_blank(int blank, struct fb_info *info)
1565 vga_out8(0x3c5, sr8, par); 1565 vga_out8(0x3c5, sr8, par);
1566 vga_out8(0x3c4, 0x0d, par); 1566 vga_out8(0x3c4, 0x0d, par);
1567 srd = vga_in8(0x3c5, par); 1567 srd = vga_in8(0x3c5, par);
1568 srd &= 0x03; 1568 srd &= 0x50;
1569 1569
1570 switch (blank) { 1570 switch (blank) {
1571 case FB_BLANK_UNBLANK: 1571 case FB_BLANK_UNBLANK:
@@ -1606,22 +1606,6 @@ static int savagefb_blank(int blank, struct fb_info *info)
1606 return (blank == FB_BLANK_NORMAL) ? 1 : 0; 1606 return (blank == FB_BLANK_NORMAL) ? 1 : 0;
1607} 1607}
1608 1608
1609static void savagefb_save_state(struct fb_info *info)
1610{
1611 struct savagefb_par *par = info->par;
1612
1613 savage_get_default_par(par, &par->save);
1614}
1615
1616static void savagefb_restore_state(struct fb_info *info)
1617{
1618 struct savagefb_par *par = info->par;
1619
1620 savagefb_blank(FB_BLANK_POWERDOWN, info);
1621 savage_set_default_par(par, &par->save);
1622 savagefb_blank(FB_BLANK_UNBLANK, info);
1623}
1624
1625static int savagefb_open(struct fb_info *info, int user) 1609static int savagefb_open(struct fb_info *info, int user)
1626{ 1610{
1627 struct savagefb_par *par = info->par; 1611 struct savagefb_par *par = info->par;
@@ -1667,8 +1651,6 @@ static struct fb_ops savagefb_ops = {
1667 .fb_setcolreg = savagefb_setcolreg, 1651 .fb_setcolreg = savagefb_setcolreg,
1668 .fb_pan_display = savagefb_pan_display, 1652 .fb_pan_display = savagefb_pan_display,
1669 .fb_blank = savagefb_blank, 1653 .fb_blank = savagefb_blank,
1670 .fb_save_state = savagefb_save_state,
1671 .fb_restore_state = savagefb_restore_state,
1672#if defined(CONFIG_FB_SAVAGE_ACCEL) 1654#if defined(CONFIG_FB_SAVAGE_ACCEL)
1673 .fb_fillrect = savagefb_fillrect, 1655 .fb_fillrect = savagefb_fillrect,
1674 .fb_copyarea = savagefb_copyarea, 1656 .fb_copyarea = savagefb_copyarea,
diff --git a/drivers/video/uvesafb.c b/drivers/video/uvesafb.c
index e35232a18571..54fbb2995a5f 100644
--- a/drivers/video/uvesafb.c
+++ b/drivers/video/uvesafb.c
@@ -1411,23 +1411,6 @@ static int uvesafb_check_var(struct fb_var_screeninfo *var,
1411 return 0; 1411 return 0;
1412} 1412}
1413 1413
1414static void uvesafb_save_state(struct fb_info *info)
1415{
1416 struct uvesafb_par *par = info->par;
1417
1418 if (par->vbe_state_saved)
1419 kfree(par->vbe_state_saved);
1420
1421 par->vbe_state_saved = uvesafb_vbe_state_save(par);
1422}
1423
1424static void uvesafb_restore_state(struct fb_info *info)
1425{
1426 struct uvesafb_par *par = info->par;
1427
1428 uvesafb_vbe_state_restore(par, par->vbe_state_saved);
1429}
1430
1431static struct fb_ops uvesafb_ops = { 1414static struct fb_ops uvesafb_ops = {
1432 .owner = THIS_MODULE, 1415 .owner = THIS_MODULE,
1433 .fb_open = uvesafb_open, 1416 .fb_open = uvesafb_open,
@@ -1441,8 +1424,6 @@ static struct fb_ops uvesafb_ops = {
1441 .fb_imageblit = cfb_imageblit, 1424 .fb_imageblit = cfb_imageblit,
1442 .fb_check_var = uvesafb_check_var, 1425 .fb_check_var = uvesafb_check_var,
1443 .fb_set_par = uvesafb_set_par, 1426 .fb_set_par = uvesafb_set_par,
1444 .fb_save_state = uvesafb_save_state,
1445 .fb_restore_state = uvesafb_restore_state,
1446}; 1427};
1447 1428
1448static void __devinit uvesafb_init_info(struct fb_info *info, 1429static void __devinit uvesafb_init_info(struct fb_info *info,
@@ -1459,15 +1440,6 @@ static void __devinit uvesafb_init_info(struct fb_info *info,
1459 info->fix.ypanstep = par->ypan ? 1 : 0; 1440 info->fix.ypanstep = par->ypan ? 1 : 0;
1460 info->fix.ywrapstep = (par->ypan > 1) ? 1 : 0; 1441 info->fix.ywrapstep = (par->ypan > 1) ? 1 : 0;
1461 1442
1462 /*
1463 * If we were unable to get the state buffer size, disable
1464 * functions for saving and restoring the hardware state.
1465 */
1466 if (par->vbe_state_size == 0) {
1467 info->fbops->fb_save_state = NULL;
1468 info->fbops->fb_restore_state = NULL;
1469 }
1470
1471 /* Disable blanking if the user requested so. */ 1443 /* Disable blanking if the user requested so. */
1472 if (!blank) 1444 if (!blank)
1473 info->fbops->fb_blank = NULL; 1445 info->fbops->fb_blank = NULL;
diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio/virtio_balloon.c
index 200c22f55130..9dd588042880 100644
--- a/drivers/virtio/virtio_balloon.c
+++ b/drivers/virtio/virtio_balloon.c
@@ -19,7 +19,6 @@
19 */ 19 */
20//#define DEBUG 20//#define DEBUG
21#include <linux/virtio.h> 21#include <linux/virtio.h>
22#include <linux/virtio_ids.h>
23#include <linux/virtio_balloon.h> 22#include <linux/virtio_balloon.h>
24#include <linux/swap.h> 23#include <linux/swap.h>
25#include <linux/kthread.h> 24#include <linux/kthread.h>
@@ -248,7 +247,7 @@ out:
248 return err; 247 return err;
249} 248}
250 249
251static void virtballoon_remove(struct virtio_device *vdev) 250static void __devexit virtballoon_remove(struct virtio_device *vdev)
252{ 251{
253 struct virtio_balloon *vb = vdev->priv; 252 struct virtio_balloon *vb = vdev->priv;
254 253
diff --git a/drivers/virtio/virtio_pci.c b/drivers/virtio/virtio_pci.c
index 4a1f1ebff7bf..28d9cf7cf72f 100644
--- a/drivers/virtio/virtio_pci.c
+++ b/drivers/virtio/virtio_pci.c
@@ -530,19 +530,22 @@ static int vp_try_to_find_vqs(struct virtio_device *vdev, unsigned nvqs,
530 err = PTR_ERR(vqs[i]); 530 err = PTR_ERR(vqs[i]);
531 goto error_find; 531 goto error_find;
532 } 532 }
533
534 if (!vp_dev->per_vq_vectors || msix_vec == VIRTIO_MSI_NO_VECTOR)
535 continue;
536
533 /* allocate per-vq irq if available and necessary */ 537 /* allocate per-vq irq if available and necessary */
534 if (vp_dev->per_vq_vectors) { 538 snprintf(vp_dev->msix_names[msix_vec],
535 snprintf(vp_dev->msix_names[msix_vec], 539 sizeof *vp_dev->msix_names,
536 sizeof *vp_dev->msix_names, 540 "%s-%s",
537 "%s-%s", 541 dev_name(&vp_dev->vdev.dev), names[i]);
538 dev_name(&vp_dev->vdev.dev), names[i]); 542 err = request_irq(vp_dev->msix_entries[msix_vec].vector,
539 err = request_irq(msix_vec, vring_interrupt, 0, 543 vring_interrupt, 0,
540 vp_dev->msix_names[msix_vec], 544 vp_dev->msix_names[msix_vec],
541 vqs[i]); 545 vqs[i]);
542 if (err) { 546 if (err) {
543 vp_del_vq(vqs[i]); 547 vp_del_vq(vqs[i]);
544 goto error_find; 548 goto error_find;
545 }
546 } 549 }
547 } 550 }
548 return 0; 551 return 0;
diff --git a/drivers/virtio/virtio_ring.c b/drivers/virtio/virtio_ring.c
index f53600580726..fbd2ecde93e4 100644
--- a/drivers/virtio/virtio_ring.c
+++ b/drivers/virtio/virtio_ring.c
@@ -285,6 +285,9 @@ static void *vring_get_buf(struct virtqueue *_vq, unsigned int *len)
285 return NULL; 285 return NULL;
286 } 286 }
287 287
288 /* Only get used array entries after they have been exposed by host. */
289 rmb();
290
288 i = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].id; 291 i = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].id;
289 *len = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].len; 292 *len = vq->vring.used->ring[vq->last_used_idx%vq->vring.num].len;
290 293
diff --git a/drivers/watchdog/riowd.c b/drivers/watchdog/riowd.c
index 1e8f02f440e6..d3c824dc2358 100644
--- a/drivers/watchdog/riowd.c
+++ b/drivers/watchdog/riowd.c
@@ -206,7 +206,7 @@ static int __devinit riowd_probe(struct of_device *op,
206 206
207 dev_set_drvdata(&op->dev, p); 207 dev_set_drvdata(&op->dev, p);
208 riowd_device = p; 208 riowd_device = p;
209 err = 0; 209 return 0;
210 210
211out_iounmap: 211out_iounmap:
212 of_iounmap(&op->resource[0], p->regs, 2); 212 of_iounmap(&op->resource[0], p->regs, 2);
diff --git a/drivers/watchdog/sbc_fitpc2_wdt.c b/drivers/watchdog/sbc_fitpc2_wdt.c
index 852ca1977917..91430a89107c 100644
--- a/drivers/watchdog/sbc_fitpc2_wdt.c
+++ b/drivers/watchdog/sbc_fitpc2_wdt.c
@@ -227,7 +227,7 @@ static int __init fitpc2_wdt_init(void)
227 } 227 }
228 228
229 err = misc_register(&fitpc2_wdt_miscdev); 229 err = misc_register(&fitpc2_wdt_miscdev);
230 if (!err) { 230 if (err) {
231 pr_err("cannot register miscdev on minor=%d (err=%d)\n", 231 pr_err("cannot register miscdev on minor=%d (err=%d)\n",
232 WATCHDOG_MINOR, err); 232 WATCHDOG_MINOR, err);
233 goto err_margin; 233 goto err_margin;