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-rw-r--r--drivers/net/wireless/rt2x00/rt2800.h1
-rw-r--r--drivers/net/wireless/rt2x00/rt2800lib.c153
-rw-r--r--drivers/net/wireless/rt2x00/rt2800pci.c3
-rw-r--r--drivers/net/wireless/rt2x00/rt2800usb.c14
-rw-r--r--drivers/net/wireless/rt2x00/rt2x00.h1
5 files changed, 147 insertions, 25 deletions
diff --git a/drivers/net/wireless/rt2x00/rt2800.h b/drivers/net/wireless/rt2x00/rt2800.h
index 62e697ffc6d1..3b32f847c834 100644
--- a/drivers/net/wireless/rt2x00/rt2800.h
+++ b/drivers/net/wireless/rt2x00/rt2800.h
@@ -68,6 +68,7 @@
68#define RF3322 0x000c 68#define RF3322 0x000c
69#define RF3053 0x000d 69#define RF3053 0x000d
70#define RF5370 0x5370 70#define RF5370 0x5370
71#define RF5372 0x5372
71#define RF5390 0x5390 72#define RF5390 0x5390
72 73
73/* 74/*
diff --git a/drivers/net/wireless/rt2x00/rt2800lib.c b/drivers/net/wireless/rt2x00/rt2800lib.c
index 6104a14e4fff..474b5b9e6238 100644
--- a/drivers/net/wireless/rt2x00/rt2800lib.c
+++ b/drivers/net/wireless/rt2x00/rt2800lib.c
@@ -402,7 +402,8 @@ int rt2800_load_firmware(struct rt2x00_dev *rt2x00dev,
402 402
403 if (rt2x00_is_pci(rt2x00dev)) { 403 if (rt2x00_is_pci(rt2x00dev)) {
404 if (rt2x00_rt(rt2x00dev, RT3572) || 404 if (rt2x00_rt(rt2x00dev, RT3572) ||
405 rt2x00_rt(rt2x00dev, RT5390)) { 405 rt2x00_rt(rt2x00dev, RT5390) ||
406 rt2x00_rt(rt2x00dev, RT5392)) {
406 rt2800_register_read(rt2x00dev, AUX_CTRL, &reg); 407 rt2800_register_read(rt2x00dev, AUX_CTRL, &reg);
407 rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1); 408 rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);
408 rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1); 409 rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);
@@ -1989,7 +1990,8 @@ static void rt2800_config_channel_rf53xx(struct rt2x00_dev *rt2x00dev,
1989 r55_nonbt_rev[idx]); 1990 r55_nonbt_rev[idx]);
1990 rt2800_rfcsr_write(rt2x00dev, 59, 1991 rt2800_rfcsr_write(rt2x00dev, 59,
1991 r59_nonbt_rev[idx]); 1992 r59_nonbt_rev[idx]);
1992 } else if (rt2x00_rt(rt2x00dev, RT5390)) { 1993 } else if (rt2x00_rt(rt2x00dev, RT5390) ||
1994 rt2x00_rt(rt2x00dev, RT5392)) {
1993 static const char r59_non_bt[] = {0x8f, 0x8f, 1995 static const char r59_non_bt[] = {0x8f, 0x8f,
1994 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8d, 1996 0x8f, 0x8f, 0x8f, 0x8f, 0x8f, 0x8d,
1995 0x8a, 0x88, 0x88, 0x87, 0x87, 0x86}; 1997 0x8a, 0x88, 0x88, 0x87, 0x87, 0x86};
@@ -2039,6 +2041,7 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
2039 rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info); 2041 rt2800_config_channel_rf3052(rt2x00dev, conf, rf, info);
2040 break; 2042 break;
2041 case RF5370: 2043 case RF5370:
2044 case RF5372:
2042 case RF5390: 2045 case RF5390:
2043 rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info); 2046 rt2800_config_channel_rf53xx(rt2x00dev, conf, rf, info);
2044 break; 2047 break;
@@ -2055,7 +2058,8 @@ static void rt2800_config_channel(struct rt2x00_dev *rt2x00dev,
2055 rt2800_bbp_write(rt2x00dev, 86, 0); 2058 rt2800_bbp_write(rt2x00dev, 86, 0);
2056 2059
2057 if (rf->channel <= 14) { 2060 if (rf->channel <= 14) {
2058 if (!rt2x00_rt(rt2x00dev, RT5390)) { 2061 if (!rt2x00_rt(rt2x00dev, RT5390) &&
2062 !rt2x00_rt(rt2x00dev, RT5392)) {
2059 if (test_bit(CAPABILITY_EXTERNAL_LNA_BG, 2063 if (test_bit(CAPABILITY_EXTERNAL_LNA_BG,
2060 &rt2x00dev->cap_flags)) { 2064 &rt2x00dev->cap_flags)) {
2061 rt2800_bbp_write(rt2x00dev, 82, 0x62); 2065 rt2800_bbp_write(rt2x00dev, 82, 0x62);
@@ -2659,7 +2663,8 @@ static u8 rt2800_get_default_vgc(struct rt2x00_dev *rt2x00dev)
2659 rt2x00_rt(rt2x00dev, RT3071) || 2663 rt2x00_rt(rt2x00dev, RT3071) ||
2660 rt2x00_rt(rt2x00dev, RT3090) || 2664 rt2x00_rt(rt2x00dev, RT3090) ||
2661 rt2x00_rt(rt2x00dev, RT3390) || 2665 rt2x00_rt(rt2x00dev, RT3390) ||
2662 rt2x00_rt(rt2x00dev, RT5390)) 2666 rt2x00_rt(rt2x00dev, RT5390) ||
2667 rt2x00_rt(rt2x00dev, RT5392))
2663 return 0x1c + (2 * rt2x00dev->lna_gain); 2668 return 0x1c + (2 * rt2x00dev->lna_gain);
2664 else 2669 else
2665 return 0x2e + rt2x00dev->lna_gain; 2670 return 0x2e + rt2x00dev->lna_gain;
@@ -2794,7 +2799,8 @@ static int rt2800_init_registers(struct rt2x00_dev *rt2x00dev)
2794 } else if (rt2x00_rt(rt2x00dev, RT3572)) { 2799 } else if (rt2x00_rt(rt2x00dev, RT3572)) {
2795 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400); 2800 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000400);
2796 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); 2801 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
2797 } else if (rt2x00_rt(rt2x00dev, RT5390)) { 2802 } else if (rt2x00_rt(rt2x00dev, RT5390) ||
2803 rt2x00_rt(rt2x00dev, RT5392)) {
2798 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404); 2804 rt2800_register_write(rt2x00dev, TX_SW_CFG0, 0x00000404);
2799 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606); 2805 rt2800_register_write(rt2x00dev, TX_SW_CFG1, 0x00080606);
2800 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000); 2806 rt2800_register_write(rt2x00dev, TX_SW_CFG2, 0x00000000);
@@ -3170,7 +3176,8 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3170 rt2800_wait_bbp_ready(rt2x00dev))) 3176 rt2800_wait_bbp_ready(rt2x00dev)))
3171 return -EACCES; 3177 return -EACCES;
3172 3178
3173 if (rt2x00_rt(rt2x00dev, RT5390)) { 3179 if (rt2x00_rt(rt2x00dev, RT5390) ||
3180 rt2x00_rt(rt2x00dev, RT5392)) {
3174 rt2800_bbp_read(rt2x00dev, 4, &value); 3181 rt2800_bbp_read(rt2x00dev, 4, &value);
3175 rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1); 3182 rt2x00_set_field8(&value, BBP4_MAC_IF_CTRL, 1);
3176 rt2800_bbp_write(rt2x00dev, 4, value); 3183 rt2800_bbp_write(rt2x00dev, 4, value);
@@ -3178,19 +3185,22 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3178 3185
3179 if (rt2800_is_305x_soc(rt2x00dev) || 3186 if (rt2800_is_305x_soc(rt2x00dev) ||
3180 rt2x00_rt(rt2x00dev, RT3572) || 3187 rt2x00_rt(rt2x00dev, RT3572) ||
3181 rt2x00_rt(rt2x00dev, RT5390)) 3188 rt2x00_rt(rt2x00dev, RT5390) ||
3189 rt2x00_rt(rt2x00dev, RT5392))
3182 rt2800_bbp_write(rt2x00dev, 31, 0x08); 3190 rt2800_bbp_write(rt2x00dev, 31, 0x08);
3183 3191
3184 rt2800_bbp_write(rt2x00dev, 65, 0x2c); 3192 rt2800_bbp_write(rt2x00dev, 65, 0x2c);
3185 rt2800_bbp_write(rt2x00dev, 66, 0x38); 3193 rt2800_bbp_write(rt2x00dev, 66, 0x38);
3186 3194
3187 if (rt2x00_rt(rt2x00dev, RT5390)) 3195 if (rt2x00_rt(rt2x00dev, RT5390) ||
3196 rt2x00_rt(rt2x00dev, RT5392))
3188 rt2800_bbp_write(rt2x00dev, 68, 0x0b); 3197 rt2800_bbp_write(rt2x00dev, 68, 0x0b);
3189 3198
3190 if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) { 3199 if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860C)) {
3191 rt2800_bbp_write(rt2x00dev, 69, 0x16); 3200 rt2800_bbp_write(rt2x00dev, 69, 0x16);
3192 rt2800_bbp_write(rt2x00dev, 73, 0x12); 3201 rt2800_bbp_write(rt2x00dev, 73, 0x12);
3193 } else if (rt2x00_rt(rt2x00dev, RT5390)) { 3202 } else if (rt2x00_rt(rt2x00dev, RT5390) ||
3203 rt2x00_rt(rt2x00dev, RT5392)) {
3194 rt2800_bbp_write(rt2x00dev, 69, 0x12); 3204 rt2800_bbp_write(rt2x00dev, 69, 0x12);
3195 rt2800_bbp_write(rt2x00dev, 73, 0x13); 3205 rt2800_bbp_write(rt2x00dev, 73, 0x13);
3196 rt2800_bbp_write(rt2x00dev, 75, 0x46); 3206 rt2800_bbp_write(rt2x00dev, 75, 0x46);
@@ -3208,7 +3218,8 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3208 rt2x00_rt(rt2x00dev, RT3090) || 3218 rt2x00_rt(rt2x00dev, RT3090) ||
3209 rt2x00_rt(rt2x00dev, RT3390) || 3219 rt2x00_rt(rt2x00dev, RT3390) ||
3210 rt2x00_rt(rt2x00dev, RT3572) || 3220 rt2x00_rt(rt2x00dev, RT3572) ||
3211 rt2x00_rt(rt2x00dev, RT5390)) { 3221 rt2x00_rt(rt2x00dev, RT5390) ||
3222 rt2x00_rt(rt2x00dev, RT5392)) {
3212 rt2800_bbp_write(rt2x00dev, 79, 0x13); 3223 rt2800_bbp_write(rt2x00dev, 79, 0x13);
3213 rt2800_bbp_write(rt2x00dev, 80, 0x05); 3224 rt2800_bbp_write(rt2x00dev, 80, 0x05);
3214 rt2800_bbp_write(rt2x00dev, 81, 0x33); 3225 rt2800_bbp_write(rt2x00dev, 81, 0x33);
@@ -3220,64 +3231,88 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3220 } 3231 }
3221 3232
3222 rt2800_bbp_write(rt2x00dev, 82, 0x62); 3233 rt2800_bbp_write(rt2x00dev, 82, 0x62);
3223 if (rt2x00_rt(rt2x00dev, RT5390)) 3234 if (rt2x00_rt(rt2x00dev, RT5390) ||
3235 rt2x00_rt(rt2x00dev, RT5392))
3224 rt2800_bbp_write(rt2x00dev, 83, 0x7a); 3236 rt2800_bbp_write(rt2x00dev, 83, 0x7a);
3225 else 3237 else
3226 rt2800_bbp_write(rt2x00dev, 83, 0x6a); 3238 rt2800_bbp_write(rt2x00dev, 83, 0x6a);
3227 3239
3228 if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D)) 3240 if (rt2x00_rt_rev(rt2x00dev, RT2860, REV_RT2860D))
3229 rt2800_bbp_write(rt2x00dev, 84, 0x19); 3241 rt2800_bbp_write(rt2x00dev, 84, 0x19);
3230 else if (rt2x00_rt(rt2x00dev, RT5390)) 3242 else if (rt2x00_rt(rt2x00dev, RT5390) ||
3243 rt2x00_rt(rt2x00dev, RT5392))
3231 rt2800_bbp_write(rt2x00dev, 84, 0x9a); 3244 rt2800_bbp_write(rt2x00dev, 84, 0x9a);
3232 else 3245 else
3233 rt2800_bbp_write(rt2x00dev, 84, 0x99); 3246 rt2800_bbp_write(rt2x00dev, 84, 0x99);
3234 3247
3235 if (rt2x00_rt(rt2x00dev, RT5390)) 3248 if (rt2x00_rt(rt2x00dev, RT5390) ||
3249 rt2x00_rt(rt2x00dev, RT5392))
3236 rt2800_bbp_write(rt2x00dev, 86, 0x38); 3250 rt2800_bbp_write(rt2x00dev, 86, 0x38);
3237 else 3251 else
3238 rt2800_bbp_write(rt2x00dev, 86, 0x00); 3252 rt2800_bbp_write(rt2x00dev, 86, 0x00);
3239 3253
3254 if (rt2x00_rt(rt2x00dev, RT5392))
3255 rt2800_bbp_write(rt2x00dev, 88, 0x90);
3256
3240 rt2800_bbp_write(rt2x00dev, 91, 0x04); 3257 rt2800_bbp_write(rt2x00dev, 91, 0x04);
3241 3258
3242 if (rt2x00_rt(rt2x00dev, RT5390)) 3259 if (rt2x00_rt(rt2x00dev, RT5390) ||
3260 rt2x00_rt(rt2x00dev, RT5392))
3243 rt2800_bbp_write(rt2x00dev, 92, 0x02); 3261 rt2800_bbp_write(rt2x00dev, 92, 0x02);
3244 else 3262 else
3245 rt2800_bbp_write(rt2x00dev, 92, 0x00); 3263 rt2800_bbp_write(rt2x00dev, 92, 0x00);
3246 3264
3265 if (rt2x00_rt(rt2x00dev, RT5392)) {
3266 rt2800_bbp_write(rt2x00dev, 95, 0x9a);
3267 rt2800_bbp_write(rt2x00dev, 98, 0x12);
3268 }
3269
3247 if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) || 3270 if (rt2x00_rt_rev_gte(rt2x00dev, RT3070, REV_RT3070F) ||
3248 rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) || 3271 rt2x00_rt_rev_gte(rt2x00dev, RT3071, REV_RT3071E) ||
3249 rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) || 3272 rt2x00_rt_rev_gte(rt2x00dev, RT3090, REV_RT3090E) ||
3250 rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) || 3273 rt2x00_rt_rev_gte(rt2x00dev, RT3390, REV_RT3390E) ||
3251 rt2x00_rt(rt2x00dev, RT3572) || 3274 rt2x00_rt(rt2x00dev, RT3572) ||
3252 rt2x00_rt(rt2x00dev, RT5390) || 3275 rt2x00_rt(rt2x00dev, RT5390) ||
3276 rt2x00_rt(rt2x00dev, RT5392) ||
3253 rt2800_is_305x_soc(rt2x00dev)) 3277 rt2800_is_305x_soc(rt2x00dev))
3254 rt2800_bbp_write(rt2x00dev, 103, 0xc0); 3278 rt2800_bbp_write(rt2x00dev, 103, 0xc0);
3255 else 3279 else
3256 rt2800_bbp_write(rt2x00dev, 103, 0x00); 3280 rt2800_bbp_write(rt2x00dev, 103, 0x00);
3257 3281
3258 if (rt2x00_rt(rt2x00dev, RT5390)) 3282 if (rt2x00_rt(rt2x00dev, RT5390) ||
3283 rt2x00_rt(rt2x00dev, RT5392))
3259 rt2800_bbp_write(rt2x00dev, 104, 0x92); 3284 rt2800_bbp_write(rt2x00dev, 104, 0x92);
3260 3285
3261 if (rt2800_is_305x_soc(rt2x00dev)) 3286 if (rt2800_is_305x_soc(rt2x00dev))
3262 rt2800_bbp_write(rt2x00dev, 105, 0x01); 3287 rt2800_bbp_write(rt2x00dev, 105, 0x01);
3263 else if (rt2x00_rt(rt2x00dev, RT5390)) 3288 else if (rt2x00_rt(rt2x00dev, RT5390) ||
3289 rt2x00_rt(rt2x00dev, RT5392))
3264 rt2800_bbp_write(rt2x00dev, 105, 0x3c); 3290 rt2800_bbp_write(rt2x00dev, 105, 0x3c);
3265 else 3291 else
3266 rt2800_bbp_write(rt2x00dev, 105, 0x05); 3292 rt2800_bbp_write(rt2x00dev, 105, 0x05);
3267 3293
3268 if (rt2x00_rt(rt2x00dev, RT5390)) 3294 if (rt2x00_rt(rt2x00dev, RT5390))
3269 rt2800_bbp_write(rt2x00dev, 106, 0x03); 3295 rt2800_bbp_write(rt2x00dev, 106, 0x03);
3296 else if (rt2x00_rt(rt2x00dev, RT5392))
3297 rt2800_bbp_write(rt2x00dev, 106, 0x12);
3270 else 3298 else
3271 rt2800_bbp_write(rt2x00dev, 106, 0x35); 3299 rt2800_bbp_write(rt2x00dev, 106, 0x35);
3272 3300
3273 if (rt2x00_rt(rt2x00dev, RT5390)) 3301 if (rt2x00_rt(rt2x00dev, RT5390) ||
3302 rt2x00_rt(rt2x00dev, RT5392))
3274 rt2800_bbp_write(rt2x00dev, 128, 0x12); 3303 rt2800_bbp_write(rt2x00dev, 128, 0x12);
3275 3304
3305 if (rt2x00_rt(rt2x00dev, RT5392)) {
3306 rt2800_bbp_write(rt2x00dev, 134, 0xd0);
3307 rt2800_bbp_write(rt2x00dev, 135, 0xf6);
3308 }
3309
3276 if (rt2x00_rt(rt2x00dev, RT3071) || 3310 if (rt2x00_rt(rt2x00dev, RT3071) ||
3277 rt2x00_rt(rt2x00dev, RT3090) || 3311 rt2x00_rt(rt2x00dev, RT3090) ||
3278 rt2x00_rt(rt2x00dev, RT3390) || 3312 rt2x00_rt(rt2x00dev, RT3390) ||
3279 rt2x00_rt(rt2x00dev, RT3572) || 3313 rt2x00_rt(rt2x00dev, RT3572) ||
3280 rt2x00_rt(rt2x00dev, RT5390)) { 3314 rt2x00_rt(rt2x00dev, RT5390) ||
3315 rt2x00_rt(rt2x00dev, RT5392)) {
3281 rt2800_bbp_read(rt2x00dev, 138, &value); 3316 rt2800_bbp_read(rt2x00dev, 138, &value);
3282 3317
3283 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom); 3318 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF0, &eeprom);
@@ -3289,7 +3324,8 @@ static int rt2800_init_bbp(struct rt2x00_dev *rt2x00dev)
3289 rt2800_bbp_write(rt2x00dev, 138, value); 3324 rt2800_bbp_write(rt2x00dev, 138, value);
3290 } 3325 }
3291 3326
3292 if (rt2x00_rt(rt2x00dev, RT5390)) { 3327 if (rt2x00_rt(rt2x00dev, RT5390) ||
3328 rt2x00_rt(rt2x00dev, RT5392)) {
3293 int ant, div_mode; 3329 int ant, div_mode;
3294 3330
3295 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom); 3331 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1, &eeprom);
@@ -3416,13 +3452,15 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
3416 !rt2x00_rt(rt2x00dev, RT3390) && 3452 !rt2x00_rt(rt2x00dev, RT3390) &&
3417 !rt2x00_rt(rt2x00dev, RT3572) && 3453 !rt2x00_rt(rt2x00dev, RT3572) &&
3418 !rt2x00_rt(rt2x00dev, RT5390) && 3454 !rt2x00_rt(rt2x00dev, RT5390) &&
3455 !rt2x00_rt(rt2x00dev, RT5392) &&
3419 !rt2800_is_305x_soc(rt2x00dev)) 3456 !rt2800_is_305x_soc(rt2x00dev))
3420 return 0; 3457 return 0;
3421 3458
3422 /* 3459 /*
3423 * Init RF calibration. 3460 * Init RF calibration.
3424 */ 3461 */
3425 if (rt2x00_rt(rt2x00dev, RT5390)) { 3462 if (rt2x00_rt(rt2x00dev, RT5390) ||
3463 rt2x00_rt(rt2x00dev, RT5392)) {
3426 rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr); 3464 rt2800_rfcsr_read(rt2x00dev, 2, &rfcsr);
3427 rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1); 3465 rt2x00_set_field8(&rfcsr, RFCSR2_RESCAL_EN, 1);
3428 rt2800_rfcsr_write(rt2x00dev, 2, rfcsr); 3466 rt2800_rfcsr_write(rt2x00dev, 2, rfcsr);
@@ -3640,6 +3678,66 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
3640 rt2800_rfcsr_write(rt2x00dev, 61, 0xdd); 3678 rt2800_rfcsr_write(rt2x00dev, 61, 0xdd);
3641 rt2800_rfcsr_write(rt2x00dev, 62, 0x00); 3679 rt2800_rfcsr_write(rt2x00dev, 62, 0x00);
3642 rt2800_rfcsr_write(rt2x00dev, 63, 0x00); 3680 rt2800_rfcsr_write(rt2x00dev, 63, 0x00);
3681 } else if (rt2x00_rt(rt2x00dev, RT5392)) {
3682 rt2800_rfcsr_write(rt2x00dev, 1, 0x17);
3683 rt2800_rfcsr_write(rt2x00dev, 2, 0x80);
3684 rt2800_rfcsr_write(rt2x00dev, 3, 0x88);
3685 rt2800_rfcsr_write(rt2x00dev, 5, 0x10);
3686 rt2800_rfcsr_write(rt2x00dev, 6, 0xe0);
3687 rt2800_rfcsr_write(rt2x00dev, 7, 0x00);
3688 rt2800_rfcsr_write(rt2x00dev, 10, 0x53);
3689 rt2800_rfcsr_write(rt2x00dev, 11, 0x4a);
3690 rt2800_rfcsr_write(rt2x00dev, 12, 0x46);
3691 rt2800_rfcsr_write(rt2x00dev, 13, 0x9f);
3692 rt2800_rfcsr_write(rt2x00dev, 14, 0x00);
3693 rt2800_rfcsr_write(rt2x00dev, 15, 0x00);
3694 rt2800_rfcsr_write(rt2x00dev, 16, 0x00);
3695 rt2800_rfcsr_write(rt2x00dev, 18, 0x03);
3696 rt2800_rfcsr_write(rt2x00dev, 19, 0x4d);
3697 rt2800_rfcsr_write(rt2x00dev, 20, 0x00);
3698 rt2800_rfcsr_write(rt2x00dev, 21, 0x8d);
3699 rt2800_rfcsr_write(rt2x00dev, 22, 0x20);
3700 rt2800_rfcsr_write(rt2x00dev, 23, 0x0b);
3701 rt2800_rfcsr_write(rt2x00dev, 24, 0x44);
3702 rt2800_rfcsr_write(rt2x00dev, 25, 0x80);
3703 rt2800_rfcsr_write(rt2x00dev, 26, 0x82);
3704 rt2800_rfcsr_write(rt2x00dev, 27, 0x09);
3705 rt2800_rfcsr_write(rt2x00dev, 28, 0x00);
3706 rt2800_rfcsr_write(rt2x00dev, 29, 0x10);
3707 rt2800_rfcsr_write(rt2x00dev, 30, 0x10);
3708 rt2800_rfcsr_write(rt2x00dev, 31, 0x80);
3709 rt2800_rfcsr_write(rt2x00dev, 32, 0x20);
3710 rt2800_rfcsr_write(rt2x00dev, 33, 0xC0);
3711 rt2800_rfcsr_write(rt2x00dev, 34, 0x07);
3712 rt2800_rfcsr_write(rt2x00dev, 35, 0x12);
3713 rt2800_rfcsr_write(rt2x00dev, 36, 0x00);
3714 rt2800_rfcsr_write(rt2x00dev, 37, 0x08);
3715 rt2800_rfcsr_write(rt2x00dev, 38, 0x89);
3716 rt2800_rfcsr_write(rt2x00dev, 39, 0x1b);
3717 rt2800_rfcsr_write(rt2x00dev, 40, 0x0f);
3718 rt2800_rfcsr_write(rt2x00dev, 41, 0xbb);
3719 rt2800_rfcsr_write(rt2x00dev, 42, 0xd5);
3720 rt2800_rfcsr_write(rt2x00dev, 43, 0x9b);
3721 rt2800_rfcsr_write(rt2x00dev, 44, 0x0e);
3722 rt2800_rfcsr_write(rt2x00dev, 45, 0xa2);
3723 rt2800_rfcsr_write(rt2x00dev, 46, 0x73);
3724 rt2800_rfcsr_write(rt2x00dev, 47, 0x0c);
3725 rt2800_rfcsr_write(rt2x00dev, 48, 0x10);
3726 rt2800_rfcsr_write(rt2x00dev, 49, 0x94);
3727 rt2800_rfcsr_write(rt2x00dev, 50, 0x94);
3728 rt2800_rfcsr_write(rt2x00dev, 51, 0x3a);
3729 rt2800_rfcsr_write(rt2x00dev, 52, 0x48);
3730 rt2800_rfcsr_write(rt2x00dev, 53, 0x44);
3731 rt2800_rfcsr_write(rt2x00dev, 54, 0x38);
3732 rt2800_rfcsr_write(rt2x00dev, 55, 0x43);
3733 rt2800_rfcsr_write(rt2x00dev, 56, 0xa1);
3734 rt2800_rfcsr_write(rt2x00dev, 57, 0x00);
3735 rt2800_rfcsr_write(rt2x00dev, 58, 0x39);
3736 rt2800_rfcsr_write(rt2x00dev, 59, 0x07);
3737 rt2800_rfcsr_write(rt2x00dev, 60, 0x45);
3738 rt2800_rfcsr_write(rt2x00dev, 61, 0x91);
3739 rt2800_rfcsr_write(rt2x00dev, 62, 0x39);
3740 rt2800_rfcsr_write(rt2x00dev, 63, 0x07);
3643 } 3741 }
3644 3742
3645 if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) { 3743 if (rt2x00_rt_rev_lt(rt2x00dev, RT3070, REV_RT3070F)) {
@@ -3713,7 +3811,8 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
3713 rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25); 3811 rt2800_bbp_read(rt2x00dev, 25, &drv_data->bbp25);
3714 rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26); 3812 rt2800_bbp_read(rt2x00dev, 26, &drv_data->bbp26);
3715 3813
3716 if (!rt2x00_rt(rt2x00dev, RT5390)) { 3814 if (!rt2x00_rt(rt2x00dev, RT5390) &&
3815 !rt2x00_rt(rt2x00dev, RT5392)) {
3717 /* 3816 /*
3718 * Set back to initial state 3817 * Set back to initial state
3719 */ 3818 */
@@ -3741,7 +3840,8 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
3741 rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1); 3840 rt2x00_set_field32(&reg, OPT_14_CSR_BIT0, 1);
3742 rt2800_register_write(rt2x00dev, OPT_14_CSR, reg); 3841 rt2800_register_write(rt2x00dev, OPT_14_CSR, reg);
3743 3842
3744 if (!rt2x00_rt(rt2x00dev, RT5390)) { 3843 if (!rt2x00_rt(rt2x00dev, RT5390) &&
3844 !rt2x00_rt(rt2x00dev, RT5392)) {
3745 rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr); 3845 rt2800_rfcsr_read(rt2x00dev, 17, &rfcsr);
3746 rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0); 3846 rt2x00_set_field8(&rfcsr, RFCSR17_TX_LO1_EN, 0);
3747 if (rt2x00_rt(rt2x00dev, RT3070) || 3847 if (rt2x00_rt(rt2x00dev, RT3070) ||
@@ -3806,7 +3906,8 @@ static int rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
3806 rt2800_rfcsr_write(rt2x00dev, 27, rfcsr); 3906 rt2800_rfcsr_write(rt2x00dev, 27, rfcsr);
3807 } 3907 }
3808 3908
3809 if (rt2x00_rt(rt2x00dev, RT5390)) { 3909 if (rt2x00_rt(rt2x00dev, RT5390) ||
3910 rt2x00_rt(rt2x00dev, RT5392)) {
3810 rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr); 3911 rt2800_rfcsr_read(rt2x00dev, 38, &rfcsr);
3811 rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0); 3912 rt2x00_set_field8(&rfcsr, RFCSR38_RX_LO1_EN, 0);
3812 rt2800_rfcsr_write(rt2x00dev, 38, rfcsr); 3913 rt2800_rfcsr_write(rt2x00dev, 38, rfcsr);
@@ -4107,7 +4208,8 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
4107 * RT53xx: defined in "EEPROM_CHIP_ID" field 4208 * RT53xx: defined in "EEPROM_CHIP_ID" field
4108 */ 4209 */
4109 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg); 4210 rt2800_register_read(rt2x00dev, MAC_CSR0, &reg);
4110 if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390) 4211 if (rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5390 ||
4212 rt2x00_get_field32(reg, MAC_CSR0_CHIPSET) == RT5392)
4111 rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value); 4213 rt2x00_eeprom_read(rt2x00dev, EEPROM_CHIP_ID, &value);
4112 else 4214 else
4113 value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE); 4215 value = rt2x00_get_field16(eeprom, EEPROM_NIC_CONF0_RF_TYPE);
@@ -4125,6 +4227,7 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
4125 case RT3390: 4227 case RT3390:
4126 case RT3572: 4228 case RT3572:
4127 case RT5390: 4229 case RT5390:
4230 case RT5392:
4128 break; 4231 break;
4129 default: 4232 default:
4130 ERROR(rt2x00dev, "Invalid RT chipset 0x%04x detected.\n", rt2x00dev->chip.rt); 4233 ERROR(rt2x00dev, "Invalid RT chipset 0x%04x detected.\n", rt2x00dev->chip.rt);
@@ -4143,6 +4246,7 @@ int rt2800_init_eeprom(struct rt2x00_dev *rt2x00dev)
4143 case RF3052: 4246 case RF3052:
4144 case RF3320: 4247 case RF3320:
4145 case RF5370: 4248 case RF5370:
4249 case RF5372:
4146 case RF5390: 4250 case RF5390:
4147 break; 4251 break;
4148 default: 4252 default:
@@ -4449,6 +4553,7 @@ int rt2800_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
4449 rt2x00_rf(rt2x00dev, RF3022) || 4553 rt2x00_rf(rt2x00dev, RF3022) ||
4450 rt2x00_rf(rt2x00dev, RF3320) || 4554 rt2x00_rf(rt2x00dev, RF3320) ||
4451 rt2x00_rf(rt2x00dev, RF5370) || 4555 rt2x00_rf(rt2x00dev, RF5370) ||
4556 rt2x00_rf(rt2x00dev, RF5372) ||
4452 rt2x00_rf(rt2x00dev, RF5390)) { 4557 rt2x00_rf(rt2x00dev, RF5390)) {
4453 spec->num_channels = 14; 4558 spec->num_channels = 14;
4454 spec->channels = rf_vals_3x; 4559 spec->channels = rf_vals_3x;
diff --git a/drivers/net/wireless/rt2x00/rt2800pci.c b/drivers/net/wireless/rt2x00/rt2800pci.c
index fc9acc299b10..b45ce7605667 100644
--- a/drivers/net/wireless/rt2x00/rt2800pci.c
+++ b/drivers/net/wireless/rt2x00/rt2800pci.c
@@ -480,7 +480,8 @@ static int rt2800pci_init_registers(struct rt2x00_dev *rt2x00dev)
480 480
481 if (rt2x00_is_pcie(rt2x00dev) && 481 if (rt2x00_is_pcie(rt2x00dev) &&
482 (rt2x00_rt(rt2x00dev, RT3572) || 482 (rt2x00_rt(rt2x00dev, RT3572) ||
483 rt2x00_rt(rt2x00dev, RT5390))) { 483 rt2x00_rt(rt2x00dev, RT5390) ||
484 rt2x00_rt(rt2x00dev, RT5392))) {
484 rt2x00pci_register_read(rt2x00dev, AUX_CTRL, &reg); 485 rt2x00pci_register_read(rt2x00dev, AUX_CTRL, &reg);
485 rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1); 486 rt2x00_set_field32(&reg, AUX_CTRL_FORCE_PCIE_CLK, 1);
486 rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1); 487 rt2x00_set_field32(&reg, AUX_CTRL_WAKE_PCIE_EN, 1);
diff --git a/drivers/net/wireless/rt2x00/rt2800usb.c b/drivers/net/wireless/rt2x00/rt2800usb.c
index f997f0056d7f..2c11137c1eb0 100644
--- a/drivers/net/wireless/rt2x00/rt2800usb.c
+++ b/drivers/net/wireless/rt2x00/rt2800usb.c
@@ -1102,12 +1102,26 @@ static struct usb_device_id rt2800usb_device_table[] = {
1102 { USB_DEVICE(0x5a57, 0x0284) }, 1102 { USB_DEVICE(0x5a57, 0x0284) },
1103#endif 1103#endif
1104#ifdef CONFIG_RT2800USB_RT53XX 1104#ifdef CONFIG_RT2800USB_RT53XX
1105 /* Alpha */
1106 { USB_DEVICE(0x2001, 0x3c15) },
1107 { USB_DEVICE(0x2001, 0x3c19) },
1108 /* Arcadyan */
1109 { USB_DEVICE(0x043e, 0x7a12) },
1105 /* Azurewave */ 1110 /* Azurewave */
1106 { USB_DEVICE(0x13d3, 0x3329) }, 1111 { USB_DEVICE(0x13d3, 0x3329) },
1107 { USB_DEVICE(0x13d3, 0x3365) }, 1112 { USB_DEVICE(0x13d3, 0x3365) },
1113 /* LG innotek */
1114 { USB_DEVICE(0x043e, 0x7a22) },
1115 /* Panasonic */
1116 { USB_DEVICE(0x04da, 0x1801) },
1117 { USB_DEVICE(0x04da, 0x1800) },
1118 /* Philips */
1119 { USB_DEVICE(0x0471, 0x2104) },
1108 /* Ralink */ 1120 /* Ralink */
1109 { USB_DEVICE(0x148f, 0x5370) }, 1121 { USB_DEVICE(0x148f, 0x5370) },
1110 { USB_DEVICE(0x148f, 0x5372) }, 1122 { USB_DEVICE(0x148f, 0x5372) },
1123 /* Unknown */
1124 { USB_DEVICE(0x04da, 0x23f6) },
1111#endif 1125#endif
1112#ifdef CONFIG_RT2800USB_UNKNOWN 1126#ifdef CONFIG_RT2800USB_UNKNOWN
1113 /* 1127 /*
diff --git a/drivers/net/wireless/rt2x00/rt2x00.h b/drivers/net/wireless/rt2x00/rt2x00.h
index 1906a94e448f..65275efcf279 100644
--- a/drivers/net/wireless/rt2x00/rt2x00.h
+++ b/drivers/net/wireless/rt2x00/rt2x00.h
@@ -192,6 +192,7 @@ struct rt2x00_chip {
192#define RT3593 0x3593 192#define RT3593 0x3593
193#define RT3883 0x3883 /* WSOC */ 193#define RT3883 0x3883 /* WSOC */
194#define RT5390 0x5390 /* 2.4GHz */ 194#define RT5390 0x5390 /* 2.4GHz */
195#define RT5392 0x5392 /* 2.4GHz */
195 196
196 u16 rf; 197 u16 rf;
197 u16 rev; 198 u16 rev;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-14 22:43:43 -0500