diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/net/tg3.c | 135 | ||||
-rw-r--r-- | drivers/net/tg3.h | 2 |
2 files changed, 32 insertions, 105 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c index d37ae8747ad1..38962afdce61 100644 --- a/drivers/net/tg3.c +++ b/drivers/net/tg3.c | |||
@@ -4816,7 +4816,7 @@ static int tg3_rx(struct tg3_napi *tnapi, int budget) | |||
4816 | skb = copy_skb; | 4816 | skb = copy_skb; |
4817 | } | 4817 | } |
4818 | 4818 | ||
4819 | if ((tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) && | 4819 | if ((tp->dev->features & NETIF_F_RXCSUM) && |
4820 | (desc->type_flags & RXD_FLAG_TCPUDP_CSUM) && | 4820 | (desc->type_flags & RXD_FLAG_TCPUDP_CSUM) && |
4821 | (((desc->ip_tcp_csum & RXD_TCPCSUM_MASK) | 4821 | (((desc->ip_tcp_csum & RXD_TCPCSUM_MASK) |
4822 | >> RXD_TCPCSUM_SHIFT) == 0xffff)) | 4822 | >> RXD_TCPCSUM_SHIFT) == 0xffff)) |
@@ -6127,6 +6127,16 @@ dma_error: | |||
6127 | return NETDEV_TX_OK; | 6127 | return NETDEV_TX_OK; |
6128 | } | 6128 | } |
6129 | 6129 | ||
6130 | static u32 tg3_fix_features(struct net_device *dev, u32 features) | ||
6131 | { | ||
6132 | struct tg3 *tp = netdev_priv(dev); | ||
6133 | |||
6134 | if (dev->mtu > ETH_DATA_LEN && (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) | ||
6135 | features &= ~NETIF_F_ALL_TSO; | ||
6136 | |||
6137 | return features; | ||
6138 | } | ||
6139 | |||
6130 | static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp, | 6140 | static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp, |
6131 | int new_mtu) | 6141 | int new_mtu) |
6132 | { | 6142 | { |
@@ -6134,14 +6144,16 @@ static inline void tg3_set_mtu(struct net_device *dev, struct tg3 *tp, | |||
6134 | 6144 | ||
6135 | if (new_mtu > ETH_DATA_LEN) { | 6145 | if (new_mtu > ETH_DATA_LEN) { |
6136 | if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) { | 6146 | if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) { |
6147 | netdev_update_features(dev); | ||
6137 | tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE; | 6148 | tp->tg3_flags2 &= ~TG3_FLG2_TSO_CAPABLE; |
6138 | ethtool_op_set_tso(dev, 0); | ||
6139 | } else { | 6149 | } else { |
6140 | tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE; | 6150 | tp->tg3_flags |= TG3_FLAG_JUMBO_RING_ENABLE; |
6141 | } | 6151 | } |
6142 | } else { | 6152 | } else { |
6143 | if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) | 6153 | if (tp->tg3_flags2 & TG3_FLG2_5780_CLASS) { |
6144 | tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE; | 6154 | tp->tg3_flags2 |= TG3_FLG2_TSO_CAPABLE; |
6155 | netdev_update_features(dev); | ||
6156 | } | ||
6145 | tp->tg3_flags &= ~TG3_FLAG_JUMBO_RING_ENABLE; | 6157 | tp->tg3_flags &= ~TG3_FLAG_JUMBO_RING_ENABLE; |
6146 | } | 6158 | } |
6147 | } | 6159 | } |
@@ -10021,33 +10033,6 @@ static void tg3_set_msglevel(struct net_device *dev, u32 value) | |||
10021 | tp->msg_enable = value; | 10033 | tp->msg_enable = value; |
10022 | } | 10034 | } |
10023 | 10035 | ||
10024 | static int tg3_set_tso(struct net_device *dev, u32 value) | ||
10025 | { | ||
10026 | struct tg3 *tp = netdev_priv(dev); | ||
10027 | |||
10028 | if (!(tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE)) { | ||
10029 | if (value) | ||
10030 | return -EINVAL; | ||
10031 | return 0; | ||
10032 | } | ||
10033 | if ((dev->features & NETIF_F_IPV6_CSUM) && | ||
10034 | ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) || | ||
10035 | (tp->tg3_flags2 & TG3_FLG2_HW_TSO_3))) { | ||
10036 | if (value) { | ||
10037 | dev->features |= NETIF_F_TSO6; | ||
10038 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_3) || | ||
10039 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || | ||
10040 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 && | ||
10041 | GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX) || | ||
10042 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || | ||
10043 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) | ||
10044 | dev->features |= NETIF_F_TSO_ECN; | ||
10045 | } else | ||
10046 | dev->features &= ~(NETIF_F_TSO6 | NETIF_F_TSO_ECN); | ||
10047 | } | ||
10048 | return ethtool_op_set_tso(dev, value); | ||
10049 | } | ||
10050 | |||
10051 | static int tg3_nway_reset(struct net_device *dev) | 10036 | static int tg3_nway_reset(struct net_device *dev) |
10052 | { | 10037 | { |
10053 | struct tg3 *tp = netdev_priv(dev); | 10038 | struct tg3 *tp = netdev_priv(dev); |
@@ -10270,50 +10255,6 @@ static int tg3_set_pauseparam(struct net_device *dev, struct ethtool_pauseparam | |||
10270 | return err; | 10255 | return err; |
10271 | } | 10256 | } |
10272 | 10257 | ||
10273 | static u32 tg3_get_rx_csum(struct net_device *dev) | ||
10274 | { | ||
10275 | struct tg3 *tp = netdev_priv(dev); | ||
10276 | return (tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) != 0; | ||
10277 | } | ||
10278 | |||
10279 | static int tg3_set_rx_csum(struct net_device *dev, u32 data) | ||
10280 | { | ||
10281 | struct tg3 *tp = netdev_priv(dev); | ||
10282 | |||
10283 | if (tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) { | ||
10284 | if (data != 0) | ||
10285 | return -EINVAL; | ||
10286 | return 0; | ||
10287 | } | ||
10288 | |||
10289 | spin_lock_bh(&tp->lock); | ||
10290 | if (data) | ||
10291 | tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; | ||
10292 | else | ||
10293 | tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS; | ||
10294 | spin_unlock_bh(&tp->lock); | ||
10295 | |||
10296 | return 0; | ||
10297 | } | ||
10298 | |||
10299 | static int tg3_set_tx_csum(struct net_device *dev, u32 data) | ||
10300 | { | ||
10301 | struct tg3 *tp = netdev_priv(dev); | ||
10302 | |||
10303 | if (tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) { | ||
10304 | if (data != 0) | ||
10305 | return -EINVAL; | ||
10306 | return 0; | ||
10307 | } | ||
10308 | |||
10309 | if (tp->tg3_flags3 & TG3_FLG3_5755_PLUS) | ||
10310 | ethtool_op_set_tx_ipv6_csum(dev, data); | ||
10311 | else | ||
10312 | ethtool_op_set_tx_csum(dev, data); | ||
10313 | |||
10314 | return 0; | ||
10315 | } | ||
10316 | |||
10317 | static int tg3_get_sset_count(struct net_device *dev, int sset) | 10258 | static int tg3_get_sset_count(struct net_device *dev, int sset) |
10318 | { | 10259 | { |
10319 | switch (sset) { | 10260 | switch (sset) { |
@@ -11390,11 +11331,6 @@ static const struct ethtool_ops tg3_ethtool_ops = { | |||
11390 | .set_ringparam = tg3_set_ringparam, | 11331 | .set_ringparam = tg3_set_ringparam, |
11391 | .get_pauseparam = tg3_get_pauseparam, | 11332 | .get_pauseparam = tg3_get_pauseparam, |
11392 | .set_pauseparam = tg3_set_pauseparam, | 11333 | .set_pauseparam = tg3_set_pauseparam, |
11393 | .get_rx_csum = tg3_get_rx_csum, | ||
11394 | .set_rx_csum = tg3_set_rx_csum, | ||
11395 | .set_tx_csum = tg3_set_tx_csum, | ||
11396 | .set_sg = ethtool_op_set_sg, | ||
11397 | .set_tso = tg3_set_tso, | ||
11398 | .self_test = tg3_self_test, | 11334 | .self_test = tg3_self_test, |
11399 | .get_strings = tg3_get_strings, | 11335 | .get_strings = tg3_get_strings, |
11400 | .set_phys_id = tg3_set_phys_id, | 11336 | .set_phys_id = tg3_set_phys_id, |
@@ -13262,11 +13198,6 @@ done: | |||
13262 | 13198 | ||
13263 | static struct pci_dev * __devinit tg3_find_peer(struct tg3 *); | 13199 | static struct pci_dev * __devinit tg3_find_peer(struct tg3 *); |
13264 | 13200 | ||
13265 | static inline void vlan_features_add(struct net_device *dev, unsigned long flags) | ||
13266 | { | ||
13267 | dev->vlan_features |= flags; | ||
13268 | } | ||
13269 | |||
13270 | static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp) | 13201 | static inline u32 tg3_rx_ret_ring_size(struct tg3 *tp) |
13271 | { | 13202 | { |
13272 | if (tp->tg3_flags3 & TG3_FLG3_LRG_PROD_RING_CAP) | 13203 | if (tp->tg3_flags3 & TG3_FLG3_LRG_PROD_RING_CAP) |
@@ -13513,16 +13444,14 @@ static int __devinit tg3_get_invariants(struct tg3 *tp) | |||
13513 | /* 5700 B0 chips do not support checksumming correctly due | 13444 | /* 5700 B0 chips do not support checksumming correctly due |
13514 | * to hardware bugs. | 13445 | * to hardware bugs. |
13515 | */ | 13446 | */ |
13516 | if (tp->pci_chip_rev_id == CHIPREV_ID_5700_B0) | 13447 | if (tp->pci_chip_rev_id != CHIPREV_ID_5700_B0) { |
13517 | tp->tg3_flags |= TG3_FLAG_BROKEN_CHECKSUMS; | 13448 | u32 features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_RXCSUM; |
13518 | else { | ||
13519 | unsigned long features = NETIF_F_IP_CSUM | NETIF_F_SG | NETIF_F_GRO; | ||
13520 | 13449 | ||
13521 | tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS; | ||
13522 | if (tp->tg3_flags3 & TG3_FLG3_5755_PLUS) | 13450 | if (tp->tg3_flags3 & TG3_FLG3_5755_PLUS) |
13523 | features |= NETIF_F_IPV6_CSUM; | 13451 | features |= NETIF_F_IPV6_CSUM; |
13524 | tp->dev->features |= features; | 13452 | tp->dev->features |= features; |
13525 | vlan_features_add(tp->dev, features); | 13453 | tp->dev->hw_features |= features; |
13454 | tp->dev->vlan_features |= features; | ||
13526 | } | 13455 | } |
13527 | 13456 | ||
13528 | /* Determine TSO capabilities */ | 13457 | /* Determine TSO capabilities */ |
@@ -14794,6 +14723,7 @@ static const struct net_device_ops tg3_netdev_ops = { | |||
14794 | .ndo_do_ioctl = tg3_ioctl, | 14723 | .ndo_do_ioctl = tg3_ioctl, |
14795 | .ndo_tx_timeout = tg3_tx_timeout, | 14724 | .ndo_tx_timeout = tg3_tx_timeout, |
14796 | .ndo_change_mtu = tg3_change_mtu, | 14725 | .ndo_change_mtu = tg3_change_mtu, |
14726 | .ndo_fix_features = tg3_fix_features, | ||
14797 | #ifdef CONFIG_NET_POLL_CONTROLLER | 14727 | #ifdef CONFIG_NET_POLL_CONTROLLER |
14798 | .ndo_poll_controller = tg3_poll_controller, | 14728 | .ndo_poll_controller = tg3_poll_controller, |
14799 | #endif | 14729 | #endif |
@@ -14824,6 +14754,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
14824 | u32 sndmbx, rcvmbx, intmbx; | 14754 | u32 sndmbx, rcvmbx, intmbx; |
14825 | char str[40]; | 14755 | char str[40]; |
14826 | u64 dma_mask, persist_dma_mask; | 14756 | u64 dma_mask, persist_dma_mask; |
14757 | u32 hw_features = 0; | ||
14827 | 14758 | ||
14828 | printk_once(KERN_INFO "%s\n", version); | 14759 | printk_once(KERN_INFO "%s\n", version); |
14829 | 14760 | ||
@@ -14984,27 +14915,25 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
14984 | * is off by default, but can be enabled using ethtool. | 14915 | * is off by default, but can be enabled using ethtool. |
14985 | */ | 14916 | */ |
14986 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO) && | 14917 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO) && |
14987 | (dev->features & NETIF_F_IP_CSUM)) { | 14918 | (dev->features & NETIF_F_IP_CSUM)) |
14988 | dev->features |= NETIF_F_TSO; | 14919 | hw_features |= NETIF_F_TSO; |
14989 | vlan_features_add(dev, NETIF_F_TSO); | ||
14990 | } | ||
14991 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) || | 14920 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) || |
14992 | (tp->tg3_flags2 & TG3_FLG2_HW_TSO_3)) { | 14921 | (tp->tg3_flags2 & TG3_FLG2_HW_TSO_3)) { |
14993 | if (dev->features & NETIF_F_IPV6_CSUM) { | 14922 | if (dev->features & NETIF_F_IPV6_CSUM) |
14994 | dev->features |= NETIF_F_TSO6; | 14923 | hw_features |= NETIF_F_TSO6; |
14995 | vlan_features_add(dev, NETIF_F_TSO6); | ||
14996 | } | ||
14997 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_3) || | 14924 | if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_3) || |
14998 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || | 14925 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 || |
14999 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 && | 14926 | (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 && |
15000 | GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX) || | 14927 | GET_CHIP_REV(tp->pci_chip_rev_id) != CHIPREV_5784_AX) || |
15001 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || | 14928 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 || |
15002 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) { | 14929 | GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780) |
15003 | dev->features |= NETIF_F_TSO_ECN; | 14930 | hw_features |= NETIF_F_TSO_ECN; |
15004 | vlan_features_add(dev, NETIF_F_TSO_ECN); | ||
15005 | } | ||
15006 | } | 14931 | } |
15007 | 14932 | ||
14933 | dev->hw_features |= hw_features; | ||
14934 | dev->features |= hw_features; | ||
14935 | dev->vlan_features |= hw_features; | ||
14936 | |||
15008 | if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 && | 14937 | if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A1 && |
15009 | !(tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) && | 14938 | !(tp->tg3_flags2 & TG3_FLG2_TSO_CAPABLE) && |
15010 | !(tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH)) { | 14939 | !(tr32(TG3PCI_PCISTATE) & PCISTATE_BUS_SPEED_HIGH)) { |
@@ -15133,7 +15062,7 @@ static int __devinit tg3_init_one(struct pci_dev *pdev, | |||
15133 | } | 15062 | } |
15134 | 15063 | ||
15135 | netdev_info(dev, "RXcsums[%d] LinkChgREG[%d] MIirq[%d] ASF[%d] TSOcap[%d]\n", | 15064 | netdev_info(dev, "RXcsums[%d] LinkChgREG[%d] MIirq[%d] ASF[%d] TSOcap[%d]\n", |
15136 | (tp->tg3_flags & TG3_FLAG_RX_CHECKSUMS) != 0, | 15065 | (dev->features & NETIF_F_RXCSUM) != 0, |
15137 | (tp->tg3_flags & TG3_FLAG_USE_LINKCHG_REG) != 0, | 15066 | (tp->tg3_flags & TG3_FLAG_USE_LINKCHG_REG) != 0, |
15138 | (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT) != 0, | 15067 | (tp->phy_flags & TG3_PHYFLG_USE_MI_INTERRUPT) != 0, |
15139 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0, | 15068 | (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) != 0, |
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h index e7880d593aa8..73dda2787103 100644 --- a/drivers/net/tg3.h +++ b/drivers/net/tg3.h | |||
@@ -2883,7 +2883,6 @@ struct tg3 { | |||
2883 | u32 tg3_flags; | 2883 | u32 tg3_flags; |
2884 | #define TG3_FLAG_TAGGED_STATUS 0x00000001 | 2884 | #define TG3_FLAG_TAGGED_STATUS 0x00000001 |
2885 | #define TG3_FLAG_TXD_MBOX_HWBUG 0x00000002 | 2885 | #define TG3_FLAG_TXD_MBOX_HWBUG 0x00000002 |
2886 | #define TG3_FLAG_RX_CHECKSUMS 0x00000004 | ||
2887 | #define TG3_FLAG_USE_LINKCHG_REG 0x00000008 | 2886 | #define TG3_FLAG_USE_LINKCHG_REG 0x00000008 |
2888 | #define TG3_FLAG_ENABLE_ASF 0x00000020 | 2887 | #define TG3_FLAG_ENABLE_ASF 0x00000020 |
2889 | #define TG3_FLAG_ASPM_WORKAROUND 0x00000040 | 2888 | #define TG3_FLAG_ASPM_WORKAROUND 0x00000040 |
@@ -2909,7 +2908,6 @@ struct tg3 { | |||
2909 | #define TG3_FLAG_PAUSE_AUTONEG 0x02000000 | 2908 | #define TG3_FLAG_PAUSE_AUTONEG 0x02000000 |
2910 | #define TG3_FLAG_CPMU_PRESENT 0x04000000 | 2909 | #define TG3_FLAG_CPMU_PRESENT 0x04000000 |
2911 | #define TG3_FLAG_40BIT_DMA_BUG 0x08000000 | 2910 | #define TG3_FLAG_40BIT_DMA_BUG 0x08000000 |
2912 | #define TG3_FLAG_BROKEN_CHECKSUMS 0x10000000 | ||
2913 | #define TG3_FLAG_JUMBO_CAPABLE 0x20000000 | 2911 | #define TG3_FLAG_JUMBO_CAPABLE 0x20000000 |
2914 | #define TG3_FLAG_CHIP_RESETTING 0x40000000 | 2912 | #define TG3_FLAG_CHIP_RESETTING 0x40000000 |
2915 | #define TG3_FLAG_INIT_COMPLETE 0x80000000 | 2913 | #define TG3_FLAG_INIT_COMPLETE 0x80000000 |