3 files changed, 18 insertions, 22 deletions

diff --git a/drivers/char/ds1620.c b/drivers/char/ds1620.c
index 74e9cd81b5b2..61f0146e215d 100644
--- a/drivers/char/ds1620.c
+++ b/drivers/char/ds1620.c
@@ -43,52 +43,51 @@ static const char *fan_state[] = { "off", "on", "on (hardwired)" };
  *  chance that the WaveArtist driver could touch these bits to
  *  enable or disable the speaker.
  */
-extern spinlock_t gpio_lock;
 extern unsigned int system_rev;
 
 static inline void netwinder_ds1620_set_clk(int clk)
 {
-        gpio_modify_op(GPIO_DSCLK, clk ? GPIO_DSCLK : 0);
+        nw_gpio_modify_op(GPIO_DSCLK, clk ? GPIO_DSCLK : 0);
 }
 
 static inline void netwinder_ds1620_set_data(int dat)
 {
-        gpio_modify_op(GPIO_DATA, dat ? GPIO_DATA : 0);
+        nw_gpio_modify_op(GPIO_DATA, dat ? GPIO_DATA : 0);
 }
 
 static inline int netwinder_ds1620_get_data(void)
 {
-        return gpio_read() & GPIO_DATA;
+        return nw_gpio_read() & GPIO_DATA;
 }
 
 static inline void netwinder_ds1620_set_data_dir(int dir)
 {
-        gpio_modify_io(GPIO_DATA, dir ? GPIO_DATA : 0);
+        nw_gpio_modify_io(GPIO_DATA, dir ? GPIO_DATA : 0);
 }
 
 static inline void netwinder_ds1620_reset(void)
 {
-        cpld_modify(CPLD_DS_ENABLE, 0);
-        cpld_modify(CPLD_DS_ENABLE, CPLD_DS_ENABLE);
+        nw_cpld_modify(CPLD_DS_ENABLE, 0);
+        nw_cpld_modify(CPLD_DS_ENABLE, CPLD_DS_ENABLE);
 }
 
 static inline void netwinder_lock(unsigned long *flags)
 {
-        spin_lock_irqsave(&gpio_lock, *flags);
+        spin_lock_irqsave(&nw_gpio_lock, *flags);
 }
 
 static inline void netwinder_unlock(unsigned long *flags)
 {
-        spin_unlock_irqrestore(&gpio_lock, *flags);
+        spin_unlock_irqrestore(&nw_gpio_lock, *flags);
 }
 
 static inline void netwinder_set_fan(int i)
 {
         unsigned long flags;
 
-        spin_lock_irqsave(&gpio_lock, flags);
-        gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0);
-        spin_unlock_irqrestore(&gpio_lock, flags);
+        spin_lock_irqsave(&nw_gpio_lock, flags);
+        nw_gpio_modify_op(GPIO_FAN, i ? GPIO_FAN : 0);
+        spin_unlock_irqrestore(&nw_gpio_lock, flags);
 }
 
 static inline int netwinder_get_fan(void)
@@ -96,7 +95,7 @@ static inline int netwinder_get_fan(void)
         if ((system_rev & 0xf000) == 0x4000)
                 return FAN_ALWAYS_ON;
 
-        return (gpio_read() & GPIO_FAN) ? FAN_ON : FAN_OFF;
+        return (nw_gpio_read() & GPIO_FAN) ? FAN_ON : FAN_OFF;
 }
 
 /*
diff --git a/drivers/char/nwflash.c b/drivers/char/nwflash.c
index 006be92ee3f3..8c7df5ba088f 100644
--- a/drivers/char/nwflash.c
+++ b/drivers/char/nwflash.c
@@ -58,8 +58,6 @@ static volatile unsigned char *FLASH_BASE;
 static int gbFlashSize = KFLASH_SIZE;
 static DEFINE_MUTEX(nwflash_mutex);
 
-extern spinlock_t gpio_lock;
-
 static int get_flash_id(void)
 {
         volatile unsigned int c1, c2;
@@ -616,9 +614,9 @@ static void kick_open(void)
          * we want to write a bit pattern XXX1 to Xilinx to enable
          * the write gate, which will be open for about the next 2ms.
          */
-        spin_lock_irqsave(&gpio_lock, flags);
-        cpld_modify(1, 1);
-        spin_unlock_irqrestore(&gpio_lock, flags);
+        spin_lock_irqsave(&nw_gpio_lock, flags);
+        nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
+        spin_unlock_irqrestore(&nw_gpio_lock, flags);
 
         /*
          * let the ISA bus to catch on...
diff --git a/drivers/mtd/maps/dc21285.c b/drivers/mtd/maps/dc21285.c
index 3aa018c092f8..42969fe051b2 100644
--- a/drivers/mtd/maps/dc21285.c
+++ b/drivers/mtd/maps/dc21285.c
@@ -32,16 +32,15 @@ static struct mtd_info *dc21285_mtd;
  */
 static void nw_en_write(void)
 {
-        extern spinlock_t gpio_lock;
         unsigned long flags;
 
         /*
          * we want to write a bit pattern XXX1 to Xilinx to enable
          * the write gate, which will be open for about the next 2ms.
          */
-        spin_lock_irqsave(&gpio_lock, flags);
-        cpld_modify(1, 1);
-        spin_unlock_irqrestore(&gpio_lock, flags);
+        spin_lock_irqsave(&nw_gpio_lock, flags);
+        nw_cpld_modify(CPLD_FLASH_WR_ENABLE, CPLD_FLASH_WR_ENABLE);
+        spin_unlock_irqrestore(&nw_gpio_lock, flags);
 
         /*
          * let the ISA bus to catch on...