81 files changed, 6596 insertions, 851 deletions
diff --git a/drivers/accessibility/braille/braille_console.c b/drivers/accessibility/braille/braille_console.c
index d672cfe7ca59..cb423f5aef24 100644
--- a/drivers/accessibility/braille/braille_console.c
+++ b/drivers/accessibility/braille/braille_console.c
@@ -21,7 +21,6 @@
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
-#include <linux/autoconf.h>
 #include <linux/kernel.h>
 #include <linux/module.h>
 #include <linux/moduleparam.h>
diff --git a/drivers/hid/hid-lg.h b/drivers/hid/hid-lg.h
index 27ae750ca878..bf31592eaf79 100644
--- a/drivers/hid/hid-lg.h
+++ b/drivers/hid/hid-lg.h
@@ -1,8 +1,6 @@
 #ifndef __HID_LG_H
 #define __HID_LG_H
-#include <linux/autoconf.h>
 #ifdef CONFIG_LOGITECH_FF
 int lgff_init(struct hid_device *hdev);
 #else
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 95ccbe377f9c..bf28945c610d 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -998,6 +998,23 @@ config SENSORS_LIS3_SPI
          will be called lis3lv02d and a specific module for the SPI transport
          is called lis3lv02d_spi.
+config SENSORS_LIS3_I2C
+        tristate "STMicroeletronics LIS3LV02Dx three-axis digital accelerometer (I2C)"
+        depends on I2C && INPUT
+        select INPUT_POLLDEV
+        default n
+        help
+          This driver provides support for the LIS3LV02Dx accelerometer connected
+          via I2C. The accelerometer data is readable via
+          /sys/devices/platform/lis3lv02d.
+          This driver also provides an absolute input class device, allowing
+          the device to act as a pinball machine-esque joystick.
+          This driver can also be built as modules.  If so, the core module
+          will be called lis3lv02d and a specific module for the I2C transport
+          is called lis3lv02d_i2c.
 config SENSORS_APPLESMC
        tristate "Apple SMC (Motion sensor, light sensor, keyboard backlight)"
        depends on INPUT && X86
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 33c2ee105284..4131e253f96a 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -55,6 +55,7 @@ obj-$(CONFIG_SENSORS_IT87)	+= it87.o
 obj-$(CONFIG_SENSORS_K8TEMP)    += k8temp.o
 obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o hp_accel.o
 obj-$(CONFIG_SENSORS_LIS3_SPI)  += lis3lv02d.o lis3lv02d_spi.o
+obj-$(CONFIG_SENSORS_LIS3_I2C)  += lis3lv02d.o lis3lv02d_i2c.o
 obj-$(CONFIG_SENSORS_LM63)      += lm63.o
 obj-$(CONFIG_SENSORS_LM70)      += lm70.o
 obj-$(CONFIG_SENSORS_LM73)      += lm73.o
diff --git a/drivers/hwmon/lis3lv02d_i2c.c b/drivers/hwmon/lis3lv02d_i2c.c
new file mode 100644
index 000000000000..dc1f5402c1d7
--- /dev/null
+++ b/drivers/hwmon/lis3lv02d_i2c.c
@@ -0,0 +1,183 @@
+/*
+ * drivers/hwmon/lis3lv02d_i2c.c
+ *
+ * Implements I2C interface for lis3lv02d (STMicroelectronics) accelerometer.
+ * Driver is based on corresponding SPI driver written by Daniel Mack
+ * (lis3lv02d_spi.c (C) 2009 Daniel Mack <daniel@caiaq.de> ).
+ *
+ * Copyright (C) 2009 Nokia Corporation and/or its subsidiary(-ies).
+ *
+ * Contact: Samu Onkalo <samu.p.onkalo@nokia.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
+ * 02110-1301 USA
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include "lis3lv02d.h"
+#define DRV_NAME        "lis3lv02d_i2c"
+static inline s32 lis3_i2c_write(struct lis3lv02d *lis3, int reg, u8 value)
+{
+        struct i2c_client *c = lis3->bus_priv;
+        return i2c_smbus_write_byte_data(c, reg, value);
+}
+static inline s32 lis3_i2c_read(struct lis3lv02d *lis3, int reg, u8 *v)
+{
+        struct i2c_client *c = lis3->bus_priv;
+        *v = i2c_smbus_read_byte_data(c, reg);
+        return 0;
+}
+static int lis3_i2c_init(struct lis3lv02d *lis3)
+{
+        u8 reg;
+        int ret;
+        /* power up the device */
+        ret = lis3->read(lis3, CTRL_REG1, &reg);
+        if (ret < 0)
+                return ret;
+        reg |= CTRL1_PD0;
+        return lis3->write(lis3, CTRL_REG1, reg);
+}
+/* Default axis mapping but it can be overwritten by platform data */
+static struct axis_conversion lis3lv02d_axis_map = { LIS3_DEV_X,
+                                                     LIS3_DEV_Y,
+                                                     LIS3_DEV_Z };
+static int __devinit lis3lv02d_i2c_probe(struct i2c_client *client,
+                                        const struct i2c_device_id *id)
+{
+        int ret = 0;
+        struct lis3lv02d_platform_data *pdata = client->dev.platform_data;
+        if (pdata) {
+                if (pdata->axis_x)
+                        lis3lv02d_axis_map.x = pdata->axis_x;
+                if (pdata->axis_y)
+                        lis3lv02d_axis_map.y = pdata->axis_y;
+                if (pdata->axis_z)
+                        lis3lv02d_axis_map.z = pdata->axis_z;
+                if (pdata->setup_resources)
+                        ret = pdata->setup_resources();
+                if (ret)
+                        goto fail;
+        }
+        lis3_dev.pdata    = pdata;
+        lis3_dev.bus_priv = client;
+        lis3_dev.init     = lis3_i2c_init;
+        lis3_dev.read     = lis3_i2c_read;
+        lis3_dev.write    = lis3_i2c_write;
+        lis3_dev.irq      = client->irq;
+        lis3_dev.ac       = lis3lv02d_axis_map;
+        i2c_set_clientdata(client, &lis3_dev);
+        ret = lis3lv02d_init_device(&lis3_dev);
+fail:
+        return ret;
+}
+static int __devexit lis3lv02d_i2c_remove(struct i2c_client *client)
+{
+        struct lis3lv02d *lis3 = i2c_get_clientdata(client);
+        struct lis3lv02d_platform_data *pdata = client->dev.platform_data;
+        if (pdata && pdata->release_resources)
+                pdata->release_resources();
+        lis3lv02d_joystick_disable();
+        lis3lv02d_poweroff(lis3);
+        return lis3lv02d_remove_fs(&lis3_dev);
+}
+#ifdef CONFIG_PM
+static int lis3lv02d_i2c_suspend(struct i2c_client *client, pm_message_t mesg)
+{
+        struct lis3lv02d *lis3 = i2c_get_clientdata(client);
+        if (!lis3->pdata->wakeup_flags)
+                lis3lv02d_poweroff(lis3);
+        return 0;
+}
+static int lis3lv02d_i2c_resume(struct i2c_client *client)
+{
+        struct lis3lv02d *lis3 = i2c_get_clientdata(client);
+        if (!lis3->pdata->wakeup_flags)
+                lis3lv02d_poweron(lis3);
+        return 0;
+}
+static void lis3lv02d_i2c_shutdown(struct i2c_client *client)
+{
+        lis3lv02d_i2c_suspend(client, PMSG_SUSPEND);
+}
+#else
+#define lis3lv02d_i2c_suspend   NULL
+#define lis3lv02d_i2c_resume    NULL
+#define lis3lv02d_i2c_shutdown  NULL
+#endif
+static const struct i2c_device_id lis3lv02d_id[] = {
+        {"lis3lv02d", 0 },
+        {}
+};
+MODULE_DEVICE_TABLE(i2c, lis3lv02d_id);
+static struct i2c_driver lis3lv02d_i2c_driver = {
+        .driver  = {
+                .name   = DRV_NAME,
+                .owner  = THIS_MODULE,
+        },
+        .suspend = lis3lv02d_i2c_suspend,
+        .shutdown = lis3lv02d_i2c_shutdown,
+        .resume = lis3lv02d_i2c_resume,
+        .probe  = lis3lv02d_i2c_probe,
+        .remove = __devexit_p(lis3lv02d_i2c_remove),
+        .id_table = lis3lv02d_id,
+};
+static int __init lis3lv02d_init(void)
+{
+        return i2c_add_driver(&lis3lv02d_i2c_driver);
+}
+static void __exit lis3lv02d_exit(void)
+{
+        i2c_del_driver(&lis3lv02d_i2c_driver);
+}
+MODULE_AUTHOR("Nokia Corporation");
+MODULE_DESCRIPTION("lis3lv02d I2C interface");
+MODULE_LICENSE("GPL");
+module_init(lis3lv02d_init);
+module_exit(lis3lv02d_exit);
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig
index e4f599f20e38..8a0e1ec95e4a 100644
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -229,6 +229,12 @@ config LEDS_PWM
        help
          This option enables support for pwm driven LEDs
+config LEDS_REGULATOR
+        tristate "REGULATOR driven LED support"
+        depends on LEDS_CLASS && REGULATOR
+        help
+          This option enables support for regulator driven LEDs.
 config LEDS_BD2802
        tristate "LED driver for BD2802 RGB LED"
        depends on LEDS_CLASS && I2C
@@ -236,6 +242,33 @@ config LEDS_BD2802
          This option enables support for BD2802GU RGB LED driver chips
          accessed via the I2C bus.
+config LEDS_INTEL_SS4200
+        tristate "LED driver for Intel NAS SS4200 series"
+        depends on LEDS_CLASS && PCI && DMI
+        help
+          This option enables support for the Intel SS4200 series of
+          Network Attached Storage servers.  You may control the hard
+          drive or power LEDs on the front panel.  Using this driver
+          can stop the front LED from blinking after startup.
+config LEDS_LT3593
+        tristate "LED driver for LT3593 controllers"
+        depends on LEDS_CLASS && GENERIC_GPIO
+        help
+          This option enables support for LEDs driven by a Linear Technology
+          LT3593 controller. This controller uses a special one-wire pulse
+          coding protocol to set the brightness.
+config LEDS_ADP5520
+        tristate "LED Support for ADP5520/ADP5501 PMIC"
+        depends on LEDS_CLASS && PMIC_ADP5520
+        help
+          This option enables support for on-chip LED drivers found
+          on Analog Devices ADP5520/ADP5501 PMICs.
+          To compile this driver as a module, choose M here: the module will
+          be called leds-adp5520.
 comment "LED Triggers"
 config LEDS_TRIGGERS
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile
index 46d72704d606..9e63869d7c0d 100644
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -29,6 +29,10 @@ obj-$(CONFIG_LEDS_DA903X)		+= leds-da903x.o
 obj-$(CONFIG_LEDS_WM831X_STATUS)        += leds-wm831x-status.o
 obj-$(CONFIG_LEDS_WM8350)               += leds-wm8350.o
 obj-$(CONFIG_LEDS_PWM)                  += leds-pwm.o
+obj-$(CONFIG_LEDS_REGULATOR)            += leds-regulator.o
+obj-$(CONFIG_LEDS_INTEL_SS4200)         += leds-ss4200.o
+obj-$(CONFIG_LEDS_LT3593)               += leds-lt3593.o
+obj-$(CONFIG_LEDS_ADP5520)              += leds-adp5520.o
 # LED SPI Drivers
 obj-$(CONFIG_LEDS_DAC124S085)           += leds-dac124s085.o
diff --git a/drivers/leds/leds-adp5520.c b/drivers/leds/leds-adp5520.c
new file mode 100644
index 000000000000..a8f315902131
--- /dev/null
+++ b/drivers/leds/leds-adp5520.c
@@ -0,0 +1,230 @@
+/*
+ * LEDs driver for Analog Devices ADP5520/ADP5501 MFD PMICs
+ *
+ * Copyright 2009 Analog Devices Inc.
+ *
+ * Loosely derived from leds-da903x:
+ * Copyright (C) 2008 Compulab, Ltd.
+ *      Mike Rapoport <mike@compulab.co.il>
+ *
+ * Copyright (C) 2006-2008 Marvell International Ltd.
+ *      Eric Miao <eric.miao@marvell.com>
+ *
+ * Licensed under the GPL-2 or later.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/workqueue.h>
+#include <linux/mfd/adp5520.h>
+struct adp5520_led {
+        struct led_classdev     cdev;
+        struct work_struct      work;
+        struct device           *master;
+        enum led_brightness     new_brightness;
+        int                     id;
+        int                     flags;
+};
+static void adp5520_led_work(struct work_struct *work)
+{
+        struct adp5520_led *led = container_of(work, struct adp5520_led, work);
+        adp5520_write(led->master, ADP5520_LED1_CURRENT + led->id - 1,
+                         led->new_brightness >> 2);
+}
+static void adp5520_led_set(struct led_classdev *led_cdev,
+                           enum led_brightness value)
+{
+        struct adp5520_led *led;
+        led = container_of(led_cdev, struct adp5520_led, cdev);
+        led->new_brightness = value;
+        schedule_work(&led->work);
+}
+static int adp5520_led_setup(struct adp5520_led *led)
+{
+        struct device *dev = led->master;
+        int flags = led->flags;
+        int ret = 0;
+        switch (led->id) {
+        case FLAG_ID_ADP5520_LED1_ADP5501_LED0:
+                ret |= adp5520_set_bits(dev, ADP5520_LED_TIME,
+                                        (flags >> ADP5520_FLAG_OFFT_SHIFT) &
+                                        ADP5520_FLAG_OFFT_MASK);
+                ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
+                                        ADP5520_LED1_EN);
+                break;
+        case FLAG_ID_ADP5520_LED2_ADP5501_LED1:
+                ret |= adp5520_set_bits(dev,  ADP5520_LED_TIME,
+                                        ((flags >> ADP5520_FLAG_OFFT_SHIFT) &
+                                        ADP5520_FLAG_OFFT_MASK) << 2);
+                ret |= adp5520_clr_bits(dev, ADP5520_LED_CONTROL,
+                                         ADP5520_R3_MODE);
+                ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
+                                        ADP5520_LED2_EN);
+                break;
+        case FLAG_ID_ADP5520_LED3_ADP5501_LED2:
+                ret |= adp5520_set_bits(dev,  ADP5520_LED_TIME,
+                                        ((flags >> ADP5520_FLAG_OFFT_SHIFT) &
+                                        ADP5520_FLAG_OFFT_MASK) << 4);
+                ret |= adp5520_clr_bits(dev, ADP5520_LED_CONTROL,
+                                        ADP5520_C3_MODE);
+                ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL,
+                                        ADP5520_LED3_EN);
+                break;
+        }
+        return ret;
+}
+static int __devinit adp5520_led_prepare(struct platform_device *pdev)
+{
+        struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
+        struct device *dev = pdev->dev.parent;
+        int ret = 0;
+        ret |= adp5520_write(dev, ADP5520_LED1_CURRENT, 0);
+        ret |= adp5520_write(dev, ADP5520_LED2_CURRENT, 0);
+        ret |= adp5520_write(dev, ADP5520_LED3_CURRENT, 0);
+        ret |= adp5520_write(dev, ADP5520_LED_TIME, pdata->led_on_time << 6);
+        ret |= adp5520_write(dev, ADP5520_LED_FADE, FADE_VAL(pdata->fade_in,
+                 pdata->fade_out));
+        return ret;
+}
+static int __devinit adp5520_led_probe(struct platform_device *pdev)
+{
+        struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
+        struct adp5520_led *led, *led_dat;
+        struct led_info *cur_led;
+        int ret, i;
+        if (pdata == NULL) {
+                dev_err(&pdev->dev, "missing platform data\n");
+                return -ENODEV;
+        }
+        if (pdata->num_leds > ADP5520_01_MAXLEDS) {
+                dev_err(&pdev->dev, "can't handle more than %d LEDS\n",
+                                 ADP5520_01_MAXLEDS);
+                return -EFAULT;
+        }
+        led = kzalloc(sizeof(*led) * pdata->num_leds, GFP_KERNEL);
+        if (led == NULL) {
+                dev_err(&pdev->dev, "failed to alloc memory\n");
+                return -ENOMEM;
+        }
+        ret = adp5520_led_prepare(pdev);
+        if (ret) {
+                dev_err(&pdev->dev, "failed to write\n");
+                goto err_free;
+        }
+        for (i = 0; i < pdata->num_leds; ++i) {
+                cur_led = &pdata->leds[i];
+                led_dat = &led[i];
+                led_dat->cdev.name = cur_led->name;
+                led_dat->cdev.default_trigger = cur_led->default_trigger;
+                led_dat->cdev.brightness_set = adp5520_led_set;
+                led_dat->cdev.brightness = LED_OFF;
+                if (cur_led->flags & ADP5520_FLAG_LED_MASK)
+                        led_dat->flags = cur_led->flags;
+                else
+                        led_dat->flags = i + 1;
+                led_dat->id = led_dat->flags & ADP5520_FLAG_LED_MASK;
+                led_dat->master = pdev->dev.parent;
+                led_dat->new_brightness = LED_OFF;
+                INIT_WORK(&led_dat->work, adp5520_led_work);
+                ret = led_classdev_register(led_dat->master, &led_dat->cdev);
+                if (ret) {
+                        dev_err(&pdev->dev, "failed to register LED %d\n",
+                                led_dat->id);
+                        goto err;
+                }
+                ret = adp5520_led_setup(led_dat);
+                if (ret) {
+                        dev_err(&pdev->dev, "failed to write\n");
+                        i++;
+                        goto err;
+                }
+        }
+        platform_set_drvdata(pdev, led);
+        return 0;
+err:
+        if (i > 0) {
+                for (i = i - 1; i >= 0; i--) {
+                        led_classdev_unregister(&led[i].cdev);
+                        cancel_work_sync(&led[i].work);
+                }
+        }
+err_free:
+        kfree(led);
+        return ret;
+}
+static int __devexit adp5520_led_remove(struct platform_device *pdev)
+{
+        struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data;
+        struct adp5520_led *led;
+        int i;
+        led = platform_get_drvdata(pdev);
+        adp5520_clr_bits(led->master, ADP5520_LED_CONTROL,
+                 ADP5520_LED1_EN | ADP5520_LED2_EN | ADP5520_LED3_EN);
+        for (i = 0; i < pdata->num_leds; i++) {
+                led_classdev_unregister(&led[i].cdev);
+                cancel_work_sync(&led[i].work);
+        }
+        kfree(led);
+        return 0;
+}
+static struct platform_driver adp5520_led_driver = {
+        .driver = {
+                .name   = "adp5520-led",
+                .owner  = THIS_MODULE,
+        },
+        .probe          = adp5520_led_probe,
+        .remove         = __devexit_p(adp5520_led_remove),
+};
+static int __init adp5520_led_init(void)
+{
+        return platform_driver_register(&adp5520_led_driver);
+}
+module_init(adp5520_led_init);
+static void __exit adp5520_led_exit(void)
+{
+        platform_driver_unregister(&adp5520_led_driver);
+}
+module_exit(adp5520_led_exit);
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
+MODULE_DESCRIPTION("LEDS ADP5520(01) Driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:adp5520-led");
diff --git a/drivers/leds/leds-alix2.c b/drivers/leds/leds-alix2.c
index 731d4eef3425..f59ffadf5125 100644
--- a/drivers/leds/leds-alix2.c
+++ b/drivers/leds/leds-alix2.c
@@ -11,11 +11,24 @@
 #include <linux/module.h>
 #include <linux/platform_device.h>
 #include <linux/string.h>
+#include <linux/pci.h>
 static int force = 0;
 module_param(force, bool, 0444);
 MODULE_PARM_DESC(force, "Assume system has ALIX.2/ALIX.3 style LEDs");
+#define MSR_LBAR_GPIO           0x5140000C
+#define CS5535_GPIO_SIZE        256
+static u32 gpio_base;
+static struct pci_device_id divil_pci[] = {
+        { PCI_DEVICE(PCI_VENDOR_ID_NS,  PCI_DEVICE_ID_NS_CS5535_ISA) },
+        { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) },
+        { } /* NULL entry */
+};
+MODULE_DEVICE_TABLE(pci, divil_pci);
 struct alix_led {
        struct led_classdev cdev;
        unsigned short port;
@@ -30,9 +43,9 @@ static void alix_led_set(struct led_classdev *led_cdev,
                container_of(led_cdev, struct alix_led, cdev);
        if (brightness)
-                outl(led_dev->on_value, led_dev->port);
+                outl(led_dev->on_value, gpio_base + led_dev->port);
        else
-                outl(led_dev->off_value, led_dev->port);
+                outl(led_dev->off_value, gpio_base + led_dev->port);
 }
 static struct alix_led alix_leds[] = {
@@ -41,7 +54,7 @@ static struct alix_led alix_leds[] = {
                        .name = "alix:1",
                        .brightness_set = alix_led_set,
                },
-                .port = 0x6100,
+                .port = 0x00,
                .on_value = 1 << 22,
                .off_value = 1 << 6,
        },
@@ -50,7 +63,7 @@ static struct alix_led alix_leds[] = {
                        .name = "alix:2",
                        .brightness_set = alix_led_set,
                },
-                .port = 0x6180,
+                .port = 0x80,
                .on_value = 1 << 25,
                .off_value = 1 << 9,
        },
@@ -59,7 +72,7 @@ static struct alix_led alix_leds[] = {
                        .name = "alix:3",
                        .brightness_set = alix_led_set,
                },
-                .port = 0x6180,
+                .port = 0x80,
                .on_value = 1 << 27,
                .off_value = 1 << 11,
        },
@@ -101,64 +114,104 @@ static struct platform_driver alix_led_driver = {
        },
 };
-static int __init alix_present(void)
+static int __init alix_present(unsigned long bios_phys,
+                                const char *alix_sig,
+                                size_t alix_sig_len)
 {
-        const unsigned long bios_phys = 0x000f0000;
        const size_t bios_len = 0x00010000;
-        const char alix_sig[] = "PC Engines ALIX.";
-        const size_t alix_sig_len = sizeof(alix_sig) - 1;
        const char *bios_virt;
        const char *scan_end;
        const char *p;
-        int ret = 0;
+        char name[64];
        if (force) {
                printk(KERN_NOTICE "%s: forced to skip BIOS test, "
                       "assume system has ALIX.2 style LEDs\n",
                       KBUILD_MODNAME);
-                ret = 1;
+                return 1;
-                goto out;
        }
        bios_virt = phys_to_virt(bios_phys);
        scan_end = bios_virt + bios_len - (alix_sig_len + 2);
        for (p = bios_virt; p < scan_end; p++) {
                const char *tail;
+                char *a;
-                if (memcmp(p, alix_sig, alix_sig_len) != 0) {
+                if (memcmp(p, alix_sig, alix_sig_len) != 0)
                        continue;
-                }
+                memcpy(name, p, sizeof(name));
+                /* remove the first \0 character from string */
+                a = strchr(name, '\0');
+                if (a)
+                        *a = ' ';
+                /* cut the string at a newline */
+                a = strchr(name, '\r');
+                if (a)
+                        *a = '\0';
                tail = p + alix_sig_len;
-                if ((tail[0] == '2' || tail[0] == '3') && tail[1] == '\0') {
+                if ((tail[0] == '2' || tail[0] == '3')) {
                        printk(KERN_INFO
                               "%s: system is recognized as \"%s\"\n",
-                               KBUILD_MODNAME, p);
+                               KBUILD_MODNAME, name);
-                        ret = 1;
+                        return 1;
-                        break;
                }
        }
-out:
+        return 0;
-        return ret;
 }
 static struct platform_device *pdev;
-static int __init alix_led_init(void)
+static int __init alix_pci_led_init(void)
 {
-        int ret;
+        u32 low, hi;
-        if (!alix_present()) {
+        if (pci_dev_present(divil_pci) == 0) {
-                ret = -ENODEV;
+                printk(KERN_WARNING KBUILD_MODNAME": DIVIL not found\n");
-                goto out;
+                return -ENODEV;
        }
-        /* enable output on GPIO for LED 1,2,3 */
+        /* Grab the GPIO I/O range */
-        outl(1 << 6, 0x6104);
+        rdmsr(MSR_LBAR_GPIO, low, hi);
-        outl(1 << 9, 0x6184);
-        outl(1 << 11, 0x6184);
+        /* Check the mask and whether GPIO is enabled (sanity check) */
+        if (hi != 0x0000f001) {
+                printk(KERN_WARNING KBUILD_MODNAME": GPIO not enabled\n");
+                return -ENODEV;
+        }
+        /* Mask off the IO base address */
+        gpio_base = low & 0x0000ff00;
+        if (!request_region(gpio_base, CS5535_GPIO_SIZE, KBUILD_MODNAME)) {
+                printk(KERN_ERR KBUILD_MODNAME": can't allocate I/O for GPIO\n");
+                return -ENODEV;
+        }
+        /* Set GPIO function to output */
+        outl(1 << 6, gpio_base + 0x04);
+        outl(1 << 9, gpio_base + 0x84);
+        outl(1 << 11, gpio_base + 0x84);
+        return 0;
+}
+static int __init alix_led_init(void)
+{
+        int ret = -ENODEV;
+        const char tinybios_sig[] = "PC Engines ALIX.";
+        const char coreboot_sig[] = "PC Engines\0ALIX.";
+        if (alix_present(0xf0000, tinybios_sig, sizeof(tinybios_sig) - 1) ||
+            alix_present(0x500, coreboot_sig, sizeof(coreboot_sig) - 1))
+                ret = alix_pci_led_init();
+        if (ret < 0)
+                return ret;
        pdev = platform_device_register_simple(KBUILD_MODNAME, -1, NULL, 0);
        if (!IS_ERR(pdev)) {
@@ -168,7 +221,6 @@ static int __init alix_led_init(void)
        } else
                ret = PTR_ERR(pdev);
-out:
        return ret;
 }
@@ -176,6 +228,7 @@ static void __exit alix_led_exit(void)
 {
        platform_device_unregister(pdev);
        platform_driver_unregister(&alix_led_driver);
+        release_region(gpio_base, CS5535_GPIO_SIZE);
 }
 module_init(alix_led_init);
diff --git a/drivers/leds/leds-cobalt-qube.c b/drivers/leds/leds-cobalt-qube.c
index 8816806accd2..da5fb016b1a5 100644
--- a/drivers/leds/leds-cobalt-qube.c
+++ b/drivers/leds/leds-cobalt-qube.c
@@ -31,7 +31,7 @@ static struct led_classdev qube_front_led = {
        .name                   = "qube::front",
        .brightness             = LED_FULL,
        .brightness_set         = qube_front_led_set,
-        .default_trigger        = "ide-disk",
+        .default_trigger        = "default-on",
 };
 static int __devinit cobalt_qube_led_probe(struct platform_device *pdev)
@@ -43,7 +43,7 @@ static int __devinit cobalt_qube_led_probe(struct platform_device *pdev)
        if (!res)
                return -EBUSY;
-        led_port = ioremap(res->start, res->end - res->start + 1);
+        led_port = ioremap(res->start, resource_size(res));
        if (!led_port)
                return -ENOMEM;
diff --git a/drivers/leds/leds-cobalt-raq.c b/drivers/leds/leds-cobalt-raq.c
index defc212105f3..438d48384636 100644
--- a/drivers/leds/leds-cobalt-raq.c
+++ b/drivers/leds/leds-cobalt-raq.c
@@ -84,7 +84,7 @@ static int __devinit cobalt_raq_led_probe(struct platform_device *pdev)
        if (!res)
                return -EBUSY;
-        led_port = ioremap(res->start, res->end - res->start + 1);
+        led_port = ioremap(res->start, resource_size(res));
        if (!led_port)
                return -ENOMEM;
diff --git a/drivers/leds/leds-lt3593.c b/drivers/leds/leds-lt3593.c
new file mode 100644
index 000000000000..fee40a841959
--- /dev/null
+++ b/drivers/leds/leds-lt3593.c
@@ -0,0 +1,217 @@
+/*
+ * LEDs driver for LT3593 controllers
+ *
+ * See the datasheet at http://cds.linear.com/docs/Datasheet/3593f.pdf
+ *
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ *
+ * Based on leds-gpio.c,
+ *
+ *   Copyright (C) 2007 8D Technologies inc.
+ *   Raphael Assenat <raph@8d.com>
+ *   Copyright (C) 2008 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/workqueue.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+struct lt3593_led_data {
+        struct led_classdev cdev;
+        unsigned gpio;
+        struct work_struct work;
+        u8 new_level;
+};
+static void lt3593_led_work(struct work_struct *work)
+{
+        int pulses;
+        struct lt3593_led_data *led_dat =
+                container_of(work, struct lt3593_led_data, work);
+        /*
+         * The LT3593 resets its internal current level register to the maximum
+         * level on the first falling edge on the control pin. Each following
+         * falling edge decreases the current level by 625uA. Up to 32 pulses
+         * can be sent, so the maximum power reduction is 20mA.
+         * After a timeout of 128us, the value is taken from the register and
+         * applied is to the output driver.
+         */
+        if (led_dat->new_level == 0) {
+                gpio_set_value_cansleep(led_dat->gpio, 0);
+                return;
+        }
+        pulses = 32 - (led_dat->new_level * 32) / 255;
+        if (pulses == 0) {
+                gpio_set_value_cansleep(led_dat->gpio, 0);
+                mdelay(1);
+                gpio_set_value_cansleep(led_dat->gpio, 1);
+                return;
+        }
+        gpio_set_value_cansleep(led_dat->gpio, 1);
+        while (pulses--) {
+                gpio_set_value_cansleep(led_dat->gpio, 0);
+                udelay(1);
+                gpio_set_value_cansleep(led_dat->gpio, 1);
+                udelay(1);
+        }
+}
+static void lt3593_led_set(struct led_classdev *led_cdev,
+        enum led_brightness value)
+{
+        struct lt3593_led_data *led_dat =
+                container_of(led_cdev, struct lt3593_led_data, cdev);
+        led_dat->new_level = value;
+        schedule_work(&led_dat->work);
+}
+static int __devinit create_lt3593_led(const struct gpio_led *template,
+        struct lt3593_led_data *led_dat, struct device *parent)
+{
+        int ret, state;
+        /* skip leds on GPIOs that aren't available */
+        if (!gpio_is_valid(template->gpio)) {
+                printk(KERN_INFO "%s: skipping unavailable LT3593 LED at gpio %d (%s)\n",
+                                KBUILD_MODNAME, template->gpio, template->name);
+                return 0;
+        }
+        ret = gpio_request(template->gpio, template->name);
+        if (ret < 0)
+                return ret;
+        led_dat->cdev.name = template->name;
+        led_dat->cdev.default_trigger = template->default_trigger;
+        led_dat->gpio = template->gpio;
+        led_dat->cdev.brightness_set = lt3593_led_set;
+        state = (template->default_state == LEDS_GPIO_DEFSTATE_ON);
+        led_dat->cdev.brightness = state ? LED_FULL : LED_OFF;
+        if (!template->retain_state_suspended)
+                led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME;
+        ret = gpio_direction_output(led_dat->gpio, state);
+        if (ret < 0)
+                goto err;
+        INIT_WORK(&led_dat->work, lt3593_led_work);
+        ret = led_classdev_register(parent, &led_dat->cdev);
+        if (ret < 0)
+                goto err;
+        printk(KERN_INFO "%s: registered LT3593 LED '%s' at GPIO %d\n",
+                KBUILD_MODNAME, template->name, template->gpio);
+        return 0;
+err:
+        gpio_free(led_dat->gpio);
+        return ret;
+}
+static void delete_lt3593_led(struct lt3593_led_data *led)
+{
+        if (!gpio_is_valid(led->gpio))
+                return;
+        led_classdev_unregister(&led->cdev);
+        cancel_work_sync(&led->work);
+        gpio_free(led->gpio);
+}
+static int __devinit lt3593_led_probe(struct platform_device *pdev)
+{
+        struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
+        struct lt3593_led_data *leds_data;
+        int i, ret = 0;
+        if (!pdata)
+                return -EBUSY;
+        leds_data = kzalloc(sizeof(struct lt3593_led_data) * pdata->num_leds,
+                                GFP_KERNEL);
+        if (!leds_data)
+                return -ENOMEM;
+        for (i = 0; i < pdata->num_leds; i++) {
+                ret = create_lt3593_led(&pdata->leds[i], &leds_data[i],
+                                      &pdev->dev);
+                if (ret < 0)
+                        goto err;
+        }
+        platform_set_drvdata(pdev, leds_data);
+        return 0;
+err:
+        for (i = i - 1; i >= 0; i--)
+                delete_lt3593_led(&leds_data[i]);
+        kfree(leds_data);
+        return ret;
+}
+static int __devexit lt3593_led_remove(struct platform_device *pdev)
+{
+        int i;
+        struct gpio_led_platform_data *pdata = pdev->dev.platform_data;
+        struct lt3593_led_data *leds_data;
+        leds_data = platform_get_drvdata(pdev);
+        for (i = 0; i < pdata->num_leds; i++)
+                delete_lt3593_led(&leds_data[i]);
+        kfree(leds_data);
+        return 0;
+}
+static struct platform_driver lt3593_led_driver = {
+        .probe          = lt3593_led_probe,
+        .remove         = __devexit_p(lt3593_led_remove),
+        .driver         = {
+                .name   = "leds-lt3593",
+                .owner  = THIS_MODULE,
+        },
+};
+MODULE_ALIAS("platform:leds-lt3593");
+static int __init lt3593_led_init(void)
+{
+        return platform_driver_register(&lt3593_led_driver);
+}
+static void __exit lt3593_led_exit(void)
+{
+        platform_driver_unregister(&lt3593_led_driver);
+}
+module_init(lt3593_led_init);
+module_exit(lt3593_led_exit);
+MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
+MODULE_DESCRIPTION("LED driver for LT3593 controllers");
+MODULE_LICENSE("GPL");
diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c
index cdfdc8714e10..88b1dd091cfb 100644
--- a/drivers/leds/leds-pwm.c
+++ b/drivers/leds/leds-pwm.c
@@ -27,7 +27,6 @@ struct led_pwm_data {
        struct pwm_device       *pwm;
        unsigned int            active_low;
        unsigned int            period;
-        unsigned int            max_brightness;
 };
 static void led_pwm_set(struct led_classdev *led_cdev,
@@ -35,7 +34,7 @@ static void led_pwm_set(struct led_classdev *led_cdev,
 {
        struct led_pwm_data *led_dat =
                container_of(led_cdev, struct led_pwm_data, cdev);
-        unsigned int max = led_dat->max_brightness;
+        unsigned int max = led_dat->cdev.max_brightness;
        unsigned int period =  led_dat->period;
        if (brightness == 0) {
@@ -77,10 +76,10 @@ static int led_pwm_probe(struct platform_device *pdev)
                led_dat->cdev.name = cur_led->name;
                led_dat->cdev.default_trigger = cur_led->default_trigger;
                led_dat->active_low = cur_led->active_low;
-                led_dat->max_brightness = cur_led->max_brightness;
                led_dat->period = cur_led->pwm_period_ns;
                led_dat->cdev.brightness_set = led_pwm_set;
                led_dat->cdev.brightness = LED_OFF;
+                led_dat->cdev.max_brightness = cur_led->max_brightness;
                led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME;
                ret = led_classdev_register(&pdev->dev, &led_dat->cdev);
diff --git a/drivers/leds/leds-regulator.c b/drivers/leds/leds-regulator.c
new file mode 100644
index 000000000000..7f00de3ef922
--- /dev/null
+++ b/drivers/leds/leds-regulator.c
@@ -0,0 +1,242 @@
+/*
+ * leds-regulator.c - LED class driver for regulator driven LEDs.
+ *
+ * Copyright (C) 2009 Antonio Ospite <ospite@studenti.unina.it>
+ *
+ * Inspired by leds-wm8350 driver.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/workqueue.h>
+#include <linux/leds.h>
+#include <linux/leds-regulator.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/consumer.h>
+#define to_regulator_led(led_cdev) \
+        container_of(led_cdev, struct regulator_led, cdev)
+struct regulator_led {
+        struct led_classdev cdev;
+        enum led_brightness value;
+        int enabled;
+        struct mutex mutex;
+        struct work_struct work;
+        struct regulator *vcc;
+};
+static inline int led_regulator_get_max_brightness(struct regulator *supply)
+{
+        int ret;
+        int voltage = regulator_list_voltage(supply, 0);
+        if (voltage <= 0)
+                return 1;
+        /* even if regulator can't change voltages,
+         * we still assume it can change status
+         * and the LED can be turned on and off.
+         */
+        ret = regulator_set_voltage(supply, voltage, voltage);
+        if (ret < 0)
+                return 1;
+        return regulator_count_voltages(supply);
+}
+static int led_regulator_get_voltage(struct regulator *supply,
+                enum led_brightness brightness)
+{
+        if (brightness == 0)
+                return -EINVAL;
+        return regulator_list_voltage(supply, brightness - 1);
+}
+static void regulator_led_enable(struct regulator_led *led)
+{
+        int ret;
+        if (led->enabled)
+                return;
+        ret = regulator_enable(led->vcc);
+        if (ret != 0) {
+                dev_err(led->cdev.dev, "Failed to enable vcc: %d\n", ret);
+                return;
+        }
+        led->enabled = 1;
+}
+static void regulator_led_disable(struct regulator_led *led)
+{
+        int ret;
+        if (!led->enabled)
+                return;
+        ret = regulator_disable(led->vcc);
+        if (ret != 0) {
+                dev_err(led->cdev.dev, "Failed to disable vcc: %d\n", ret);
+                return;
+        }
+        led->enabled = 0;
+}
+static void regulator_led_set_value(struct regulator_led *led)
+{
+        int voltage;
+        int ret;
+        mutex_lock(&led->mutex);
+        if (led->value == LED_OFF) {
+                regulator_led_disable(led);
+                goto out;
+        }
+        if (led->cdev.max_brightness > 1) {
+                voltage = led_regulator_get_voltage(led->vcc, led->value);
+                dev_dbg(led->cdev.dev, "brightness: %d voltage: %d\n",
+                                led->value, voltage);
+                ret = regulator_set_voltage(led->vcc, voltage, voltage);
+                if (ret != 0)
+                        dev_err(led->cdev.dev, "Failed to set voltage %d: %d\n",
+                                voltage, ret);
+        }
+        regulator_led_enable(led);
+out:
+        mutex_unlock(&led->mutex);
+}
+static void led_work(struct work_struct *work)
+{
+        struct regulator_led *led;
+        led = container_of(work, struct regulator_led, work);
+        regulator_led_set_value(led);
+}
+static void regulator_led_brightness_set(struct led_classdev *led_cdev,
+                           enum led_brightness value)
+{
+        struct regulator_led *led = to_regulator_led(led_cdev);
+        led->value = value;
+        schedule_work(&led->work);
+}
+static int __devinit regulator_led_probe(struct platform_device *pdev)
+{
+        struct led_regulator_platform_data *pdata = pdev->dev.platform_data;
+        struct regulator_led *led;
+        struct regulator *vcc;
+        int ret = 0;
+        if (pdata == NULL) {
+                dev_err(&pdev->dev, "no platform data\n");
+                return -ENODEV;
+        }
+        vcc = regulator_get_exclusive(&pdev->dev, "vled");
+        if (IS_ERR(vcc)) {
+                dev_err(&pdev->dev, "Cannot get vcc for %s\n", pdata->name);
+                return PTR_ERR(vcc);
+        }
+        led = kzalloc(sizeof(*led), GFP_KERNEL);
+        if (led == NULL) {
+                ret = -ENOMEM;
+                goto err_vcc;
+        }
+        led->cdev.max_brightness = led_regulator_get_max_brightness(vcc);
+        if (pdata->brightness > led->cdev.max_brightness) {
+                dev_err(&pdev->dev, "Invalid default brightness %d\n",
+                                pdata->brightness);
+                ret = -EINVAL;
+                goto err_led;
+        }
+        led->value = pdata->brightness;
+        led->cdev.brightness_set = regulator_led_brightness_set;
+        led->cdev.name = pdata->name;
+        led->cdev.flags |= LED_CORE_SUSPENDRESUME;
+        led->vcc = vcc;
+        mutex_init(&led->mutex);
+        INIT_WORK(&led->work, led_work);
+        platform_set_drvdata(pdev, led);
+        ret = led_classdev_register(&pdev->dev, &led->cdev);
+        if (ret < 0) {
+                cancel_work_sync(&led->work);
+                goto err_led;
+        }
+        /* to expose the default value to userspace */
+        led->cdev.brightness = led->value;
+        /* Set the default led status */
+        regulator_led_set_value(led);
+        return 0;
+err_led:
+        kfree(led);
+err_vcc:
+        regulator_put(vcc);
+        return ret;
+}
+static int __devexit regulator_led_remove(struct platform_device *pdev)
+{
+        struct regulator_led *led = platform_get_drvdata(pdev);
+        led_classdev_unregister(&led->cdev);
+        cancel_work_sync(&led->work);
+        regulator_led_disable(led);
+        regulator_put(led->vcc);
+        kfree(led);
+        return 0;
+}
+static struct platform_driver regulator_led_driver = {
+        .driver = {
+                   .name  = "leds-regulator",
+                   .owner = THIS_MODULE,
+                   },
+        .probe  = regulator_led_probe,
+        .remove = __devexit_p(regulator_led_remove),
+};
+static int __init regulator_led_init(void)
+{
+        return platform_driver_register(&regulator_led_driver);
+}
+module_init(regulator_led_init);
+static void __exit regulator_led_exit(void)
+{
+        platform_driver_unregister(&regulator_led_driver);
+}
+module_exit(regulator_led_exit);
+MODULE_AUTHOR("Antonio Ospite <ospite@studenti.unina.it>");
+MODULE_DESCRIPTION("Regulator driven LED driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:leds-regulator");
diff --git a/drivers/leds/leds-ss4200.c b/drivers/leds/leds-ss4200.c
new file mode 100644
index 000000000000..97f04984c1ca
--- /dev/null
+++ b/drivers/leds/leds-ss4200.c
@@ -0,0 +1,556 @@
+/*
+ * SS4200-E Hardware API
+ * Copyright (c) 2009, Intel Corporation.
+ * Copyright IBM Corporation, 2009
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ *
+ * Author: Dave Hansen <dave@sr71.net>
+ */
+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#include <linux/dmi.h>
+#include <linux/init.h>
+#include <linux/ioport.h>
+#include <linux/kernel.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/pci.h>
+#include <linux/types.h>
+#include <linux/uaccess.h>
+MODULE_AUTHOR("Rodney Girod <rgirod@confocus.com>, Dave Hansen <dave@sr71.net>");
+MODULE_DESCRIPTION("Intel NAS/Home Server ICH7 GPIO Driver");
+MODULE_LICENSE("GPL");
+/*
+ * ICH7 LPC/GPIO PCI Config register offsets
+ */
+#define PMBASE          0x040
+#define GPIO_BASE       0x048
+#define GPIO_CTRL       0x04c
+#define GPIO_EN         0x010
+/*
+ * The ICH7 GPIO register block is 64 bytes in size.
+ */
+#define ICH7_GPIO_SIZE  64
+/*
+ * Define register offsets within the ICH7 register block.
+ */
+#define GPIO_USE_SEL    0x000
+#define GP_IO_SEL       0x004
+#define GP_LVL          0x00c
+#define GPO_BLINK       0x018
+#define GPI_INV         0x030
+#define GPIO_USE_SEL2   0x034
+#define GP_IO_SEL2      0x038
+#define GP_LVL2         0x03c
+/*
+ * PCI ID of the Intel ICH7 LPC Device within which the GPIO block lives.
+ */
+static struct pci_device_id ich7_lpc_pci_id[] =
+{
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1) },
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_30) },
+        { } /* NULL entry */
+};
+MODULE_DEVICE_TABLE(pci, ich7_lpc_pci_id);
+static int __init ss4200_led_dmi_callback(const struct dmi_system_id *id)
+{
+        pr_info("detected '%s'\n", id->ident);
+        return 1;
+}
+static unsigned int __initdata nodetect;
+module_param_named(nodetect, nodetect, bool, 0);
+MODULE_PARM_DESC(nodetect, "Skip DMI-based hardware detection");
+/*
+ * struct nas_led_whitelist - List of known good models
+ *
+ * Contains the known good models this driver is compatible with.
+ * When adding a new model try to be as strict as possible. This
+ * makes it possible to keep the false positives (the model is
+ * detected as working, but in reality it is not) as low as
+ * possible.
+ */
+static struct dmi_system_id __initdata nas_led_whitelist[] = {
+        {
+                .callback = ss4200_led_dmi_callback,
+                .ident = "Intel SS4200-E",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Intel"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "SS4200-E"),
+                        DMI_MATCH(DMI_PRODUCT_VERSION, "1.00.00")
+                }
+        },
+};
+/*
+ * Base I/O address assigned to the Power Management register block
+ */
+static u32 g_pm_io_base;
+/*
+ * Base I/O address assigned to the ICH7 GPIO register block
+ */
+static u32 nas_gpio_io_base;
+/*
+ * When we successfully register a region, we are returned a resource.
+ * We use these to identify which regions we need to release on our way
+ * back out.
+ */
+static struct resource *gp_gpio_resource;
+struct nasgpio_led {
+        char *name;
+        u32 gpio_bit;
+        struct led_classdev led_cdev;
+};
+/*
+ * gpio_bit(s) are the ICH7 GPIO bit assignments
+ */
+static struct nasgpio_led nasgpio_leds[] = {
+        { .name = "hdd1:blue:sata",     .gpio_bit = 0 },
+        { .name = "hdd1:amber:sata",    .gpio_bit = 1 },
+        { .name = "hdd2:blue:sata",     .gpio_bit = 2 },
+        { .name = "hdd2:amber:sata",    .gpio_bit = 3 },
+        { .name = "hdd3:blue:sata",     .gpio_bit = 4 },
+        { .name = "hdd3:amber:sata",    .gpio_bit = 5 },
+        { .name = "hdd4:blue:sata",     .gpio_bit = 6 },
+        { .name = "hdd4:amber:sata",    .gpio_bit = 7 },
+        { .name = "power:blue:power",   .gpio_bit = 27},
+        { .name = "power:amber:power",  .gpio_bit = 28},
+};
+#define NAS_RECOVERY    0x00000400      /* GPIO10 */
+static struct nasgpio_led *
+led_classdev_to_nasgpio_led(struct led_classdev *led_cdev)
+{
+        return container_of(led_cdev, struct nasgpio_led, led_cdev);
+}
+static struct nasgpio_led *get_led_named(char *name)
+{
+        int i;
+        for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) {
+                if (strcmp(nasgpio_leds[i].name, name))
+                        continue;
+                return &nasgpio_leds[i];
+        }
+        return NULL;
+}
+/*
+ * This protects access to the gpio ports.
+ */
+static DEFINE_SPINLOCK(nasgpio_gpio_lock);
+/*
+ * There are two gpio ports, one for blinking and the other
+ * for power.  @port tells us if we're doing blinking or
+ * power control.
+ *
+ * Caller must hold nasgpio_gpio_lock
+ */
+static void __nasgpio_led_set_attr(struct led_classdev *led_cdev,
+                                   u32 port, u32 value)
+{
+        struct nasgpio_led *led = led_classdev_to_nasgpio_led(led_cdev);
+        u32 gpio_out;
+        gpio_out = inl(nas_gpio_io_base + port);
+        if (value)
+                gpio_out |= (1<<led->gpio_bit);
+        else
+                gpio_out &= ~(1<<led->gpio_bit);
+        outl(gpio_out, nas_gpio_io_base + port);
+}
+static void nasgpio_led_set_attr(struct led_classdev *led_cdev,
+                                 u32 port, u32 value)
+{
+        spin_lock(&nasgpio_gpio_lock);
+        __nasgpio_led_set_attr(led_cdev, port, value);
+        spin_unlock(&nasgpio_gpio_lock);
+}
+u32 nasgpio_led_get_attr(struct led_classdev *led_cdev, u32 port)
+{
+        struct nasgpio_led *led = led_classdev_to_nasgpio_led(led_cdev);
+        u32 gpio_in;
+        spin_lock(&nasgpio_gpio_lock);
+        gpio_in = inl(nas_gpio_io_base + port);
+        spin_unlock(&nasgpio_gpio_lock);
+        if (gpio_in & (1<<led->gpio_bit))
+                return 1;
+        return 0;
+}
+/*
+ * There is actual brightness control in the hardware,
+ * but it is via smbus commands and not implemented
+ * in this driver.
+ */
+static void nasgpio_led_set_brightness(struct led_classdev *led_cdev,
+                                       enum led_brightness brightness)
+{
+        u32 setting = 0;
+        if (brightness >= LED_HALF)
+                setting = 1;
+        /*
+         * Hold the lock across both operations.  This ensures
+         * consistency so that both the "turn off blinking"
+         * and "turn light off" operations complete as a set.
+         */
+        spin_lock(&nasgpio_gpio_lock);
+        /*
+         * LED class documentation asks that past blink state
+         * be disabled when brightness is turned to zero.
+         */
+        if (brightness == 0)
+                __nasgpio_led_set_attr(led_cdev, GPO_BLINK, 0);
+        __nasgpio_led_set_attr(led_cdev, GP_LVL, setting);
+        spin_unlock(&nasgpio_gpio_lock);
+}
+static int nasgpio_led_set_blink(struct led_classdev *led_cdev,
+                                 unsigned long *delay_on,
+                                 unsigned long *delay_off)
+{
+        u32 setting = 1;
+        if (!(*delay_on == 0 && *delay_off == 0) &&
+            !(*delay_on == 500 && *delay_off == 500))
+                return -EINVAL;
+        /*
+         * These are very approximate.
+         */
+        *delay_on = 500;
+        *delay_off = 500;
+        nasgpio_led_set_attr(led_cdev, GPO_BLINK, setting);
+        return 0;
+}
+/*
+ * Initialize the ICH7 GPIO registers for NAS usage.  The BIOS should have
+ * already taken care of this, but we will do so in a non destructive manner
+ * so that we have what we need whether the BIOS did it or not.
+ */
+static int __devinit ich7_gpio_init(struct device *dev)
+{
+        int i;
+        u32 config_data = 0;
+        u32 all_nas_led = 0;
+        for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++)
+                all_nas_led |= (1<<nasgpio_leds[i].gpio_bit);
+        spin_lock(&nasgpio_gpio_lock);
+        /*
+         * We need to enable all of the GPIO lines used by the NAS box,
+         * so we will read the current Use Selection and add our usage
+         * to it.  This should be benign with regard to the original
+         * BIOS configuration.
+         */
+        config_data = inl(nas_gpio_io_base + GPIO_USE_SEL);
+        dev_dbg(dev, ": Data read from GPIO_USE_SEL = 0x%08x\n", config_data);
+        config_data |= all_nas_led + NAS_RECOVERY;
+        outl(config_data, nas_gpio_io_base + GPIO_USE_SEL);
+        config_data = inl(nas_gpio_io_base + GPIO_USE_SEL);
+        dev_dbg(dev, ": GPIO_USE_SEL = 0x%08x\n\n", config_data);
+        /*
+         * The LED GPIO outputs need to be configured for output, so we
+         * will ensure that all LED lines are cleared for output and the
+         * RECOVERY line ready for input.  This too should be benign with
+         * regard to BIOS configuration.
+         */
+        config_data = inl(nas_gpio_io_base + GP_IO_SEL);
+        dev_dbg(dev, ": Data read from GP_IO_SEL = 0x%08x\n",
+                                        config_data);
+        config_data &= ~all_nas_led;
+        config_data |= NAS_RECOVERY;
+        outl(config_data, nas_gpio_io_base + GP_IO_SEL);
+        config_data = inl(nas_gpio_io_base + GP_IO_SEL);
+        dev_dbg(dev, ": GP_IO_SEL = 0x%08x\n", config_data);
+        /*
+         * In our final system, the BIOS will initialize the state of all
+         * of the LEDs.  For now, we turn them all off (or Low).
+         */
+        config_data = inl(nas_gpio_io_base + GP_LVL);
+        dev_dbg(dev, ": Data read from GP_LVL = 0x%08x\n", config_data);
+        /*
+         * In our final system, the BIOS will initialize the blink state of all
+         * of the LEDs.  For now, we turn blink off for all of them.
+         */
+        config_data = inl(nas_gpio_io_base + GPO_BLINK);
+        dev_dbg(dev, ": Data read from GPO_BLINK = 0x%08x\n", config_data);
+        /*
+         * At this moment, I am unsure if anything needs to happen with GPI_INV
+         */
+        config_data = inl(nas_gpio_io_base + GPI_INV);
+        dev_dbg(dev, ": Data read from GPI_INV = 0x%08x\n", config_data);
+        spin_unlock(&nasgpio_gpio_lock);
+        return 0;
+}
+static void ich7_lpc_cleanup(struct device *dev)
+{
+        /*
+         * If we were given exclusive use of the GPIO
+         * I/O Address range, we must return it.
+         */
+        if (gp_gpio_resource) {
+                dev_dbg(dev, ": Releasing GPIO I/O addresses\n");
+                release_region(nas_gpio_io_base, ICH7_GPIO_SIZE);
+                gp_gpio_resource = NULL;
+        }
+}
+/*
+ * The OS has determined that the LPC of the Intel ICH7 Southbridge is present
+ * so we can retrive the required operational information and prepare the GPIO.
+ */
+static struct pci_dev *nas_gpio_pci_dev;
+static int __devinit ich7_lpc_probe(struct pci_dev *dev,
+                                    const struct pci_device_id *id)
+{
+        int status;
+        u32 gc = 0;
+        status = pci_enable_device(dev);
+        if (status) {
+                dev_err(&dev->dev, "pci_enable_device failed\n");
+                return -EIO;
+        }
+        nas_gpio_pci_dev = dev;
+        status = pci_read_config_dword(dev, PMBASE, &g_pm_io_base);
+        if (status)
+                goto out;
+        g_pm_io_base &= 0x00000ff80;
+        status = pci_read_config_dword(dev, GPIO_CTRL, &gc);
+        if (!(GPIO_EN & gc)) {
+                status = -EEXIST;
+                dev_info(&dev->dev,
+                           "ERROR: The LPC GPIO Block has not been enabled.\n");
+                goto out;
+        }
+        status = pci_read_config_dword(dev, GPIO_BASE, &nas_gpio_io_base);
+        if (0 > status) {
+                dev_info(&dev->dev, "Unable to read GPIOBASE.\n");
+                goto out;
+        }
+        dev_dbg(&dev->dev, ": GPIOBASE = 0x%08x\n", nas_gpio_io_base);
+        nas_gpio_io_base &= 0x00000ffc0;
+        /*
+         * Insure that we have exclusive access to the GPIO I/O address range.
+         */
+        gp_gpio_resource = request_region(nas_gpio_io_base, ICH7_GPIO_SIZE,
+                                          KBUILD_MODNAME);
+        if (NULL == gp_gpio_resource) {
+                dev_info(&dev->dev,
+                         "ERROR Unable to register GPIO I/O addresses.\n");
+                status = -1;
+                goto out;
+        }
+        /*
+         * Initialize the GPIO for NAS/Home Server Use
+         */
+        ich7_gpio_init(&dev->dev);
+out:
+        if (status) {
+                ich7_lpc_cleanup(&dev->dev);
+                pci_disable_device(dev);
+        }
+        return status;
+}
+static void ich7_lpc_remove(struct pci_dev *dev)
+{
+        ich7_lpc_cleanup(&dev->dev);
+        pci_disable_device(dev);
+}
+/*
+ * pci_driver structure passed to the PCI modules
+ */
+static struct pci_driver nas_gpio_pci_driver = {
+        .name = KBUILD_MODNAME,
+        .id_table = ich7_lpc_pci_id,
+        .probe = ich7_lpc_probe,
+        .remove = ich7_lpc_remove,
+};
+static struct led_classdev *get_classdev_for_led_nr(int nr)
+{
+        struct nasgpio_led *nas_led = &nasgpio_leds[nr];
+        struct led_classdev *led = &nas_led->led_cdev;
+        return led;
+}
+static void set_power_light_amber_noblink(void)
+{
+        struct nasgpio_led *amber = get_led_named("power:amber:power");
+        struct nasgpio_led *blue = get_led_named("power:blue:power");
+        if (!amber || !blue)
+                return;
+        /*
+         * LED_OFF implies disabling future blinking
+         */
+        pr_debug("setting blue off and amber on\n");
+        nasgpio_led_set_brightness(&blue->led_cdev, LED_OFF);
+        nasgpio_led_set_brightness(&amber->led_cdev, LED_FULL);
+}
+static ssize_t nas_led_blink_show(struct device *dev,
+                                  struct device_attribute *attr, char *buf)
+{
+        struct led_classdev *led = dev_get_drvdata(dev);
+        int blinking = 0;
+        if (nasgpio_led_get_attr(led, GPO_BLINK))
+                blinking = 1;
+        return sprintf(buf, "%u\n", blinking);
+}
+static ssize_t nas_led_blink_store(struct device *dev,
+                                   struct device_attribute *attr,
+                                   const char *buf, size_t size)
+{
+        int ret;
+        struct led_classdev *led = dev_get_drvdata(dev);
+        unsigned long blink_state;
+        ret = strict_strtoul(buf, 10, &blink_state);
+        if (ret)
+                return ret;
+        nasgpio_led_set_attr(led, GPO_BLINK, blink_state);
+        return size;
+}
+static DEVICE_ATTR(blink, 0644, nas_led_blink_show, nas_led_blink_store);
+static int register_nasgpio_led(int led_nr)
+{
+        int ret;
+        struct nasgpio_led *nas_led = &nasgpio_leds[led_nr];
+        struct led_classdev *led = get_classdev_for_led_nr(led_nr);
+        led->name = nas_led->name;
+        led->brightness = LED_OFF;
+        if (nasgpio_led_get_attr(led, GP_LVL))
+                led->brightness = LED_FULL;
+        led->brightness_set = nasgpio_led_set_brightness;
+        led->blink_set = nasgpio_led_set_blink;
+        ret = led_classdev_register(&nas_gpio_pci_dev->dev, led);
+        if (ret)
+                return ret;
+        ret = device_create_file(led->dev, &dev_attr_blink);
+        if (ret)
+                led_classdev_unregister(led);
+        return ret;
+}
+static void unregister_nasgpio_led(int led_nr)
+{
+        struct led_classdev *led = get_classdev_for_led_nr(led_nr);
+        led_classdev_unregister(led);
+        device_remove_file(led->dev, &dev_attr_blink);
+}
+/*
+ * module load/initialization
+ */
+static int __init nas_gpio_init(void)
+{
+        int i;
+        int ret = 0;
+        int nr_devices = 0;
+        nr_devices = dmi_check_system(nas_led_whitelist);
+        if (nodetect) {
+                pr_info("skipping hardware autodetection\n");
+                pr_info("Please send 'dmidecode' output to dave@sr71.net\n");
+                nr_devices++;
+        }
+        if (nr_devices <= 0) {
+                pr_info("no LED devices found\n");
+                return -ENODEV;
+        }
+        pr_info("registering PCI driver\n");
+        ret = pci_register_driver(&nas_gpio_pci_driver);
+        if (ret)
+                return ret;
+        for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) {
+                ret = register_nasgpio_led(i);
+                if (ret)
+                        goto out_err;
+        }
+        /*
+         * When the system powers on, the BIOS leaves the power
+         * light blue and blinking.  This will turn it solid
+         * amber once the driver is loaded.
+         */
+        set_power_light_amber_noblink();
+        return 0;
+out_err:
+        for (; i >= 0; i--)
+                unregister_nasgpio_led(i);
+        pci_unregister_driver(&nas_gpio_pci_driver);
+        return ret;
+}
+/*
+ * module unload
+ */
+static void __exit nas_gpio_exit(void)
+{
+        int i;
+        pr_info("Unregistering driver\n");
+        for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++)
+                unregister_nasgpio_led(i);
+        pci_unregister_driver(&nas_gpio_pci_driver);
+}
+module_init(nas_gpio_init);
+module_exit(nas_gpio_exit);
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 1a7a9fc50ea1..e3551d20464f 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -203,6 +203,7 @@ config CS5535_MFGPT
 config CS5535_MFGPT_DEFAULT_IRQ
        int
+        depends on CS5535_MFGPT
        default 7
        help
          MFGPTs on the CS5535 require an interrupt.  The selected IRQ
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c
index cdb845b68ab5..06b64085a355 100644
--- a/drivers/mmc/core/sdio.c
+++ b/drivers/mmc/core/sdio.c
@@ -516,7 +516,8 @@ int mmc_attach_sdio(struct mmc_host *host, u32 ocr)
         * The number of functions on the card is encoded inside
         * the ocr.
         */
-        card->sdio_funcs = funcs = (ocr & 0x70000000) >> 28;
+        funcs = (ocr & 0x70000000) >> 28;
+        card->sdio_funcs = 0;
        /*
         * If needed, disconnect card detection pull-up resistor.
@@ -528,7 +529,7 @@ int mmc_attach_sdio(struct mmc_host *host, u32 ocr)
        /*
         * Initialize (but don't add) all present functions.
         */
-        for (i = 0;i < funcs;i++) {
+        for (i = 0; i < funcs; i++, card->sdio_funcs++) {
                err = sdio_init_func(host->card, i + 1);
                if (err)
                        goto remove;
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c
index d37464e296a5..9e060c87e64d 100644
--- a/drivers/mmc/core/sdio_bus.c
+++ b/drivers/mmc/core/sdio_bus.c
@@ -248,12 +248,15 @@ int sdio_add_func(struct sdio_func *func)
 /*
 * Unregister a SDIO function with the driver model, and
 * (eventually) free it.
+ * This function can be called through error paths where sdio_add_func() was
+ * never executed (because a failure occurred at an earlier point).
 */
 void sdio_remove_func(struct sdio_func *func)
 {
-        if (sdio_func_present(func))
+        if (!sdio_func_present(func))
-                device_del(&func->dev);
+                return;
+        device_del(&func->dev);
        put_device(&func->dev);
 }
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 9d405b181781..ce1d28884e29 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -44,6 +44,19 @@ config MMC_SDHCI_IO_ACCESSORS
          This is silent Kconfig symbol that is selected by the drivers that
          need to overwrite SDHCI IO memory accessors.
+config MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+        bool
+        select MMC_SDHCI_IO_ACCESSORS
+        help
+          This option is selected by drivers running on big endian hosts
+          and performing I/O to a SDHCI controller through a bus that
+          implements a hardware byte swapper using a 32-bit datum.
+          This endian mapping mode is called "data invariance" and
+          has the effect of scrambling the addresses and formats of data
+          accessed in sizes other than the datum size.
+          This is the case for the Freescale eSDHC and Nintendo Wii SDHCI.
 config MMC_SDHCI_PCI
        tristate "SDHCI support on PCI bus"
        depends on MMC_SDHCI && PCI
@@ -75,11 +88,29 @@ config MMC_RICOH_MMC
 config MMC_SDHCI_OF
        tristate "SDHCI support on OpenFirmware platforms"
        depends on MMC_SDHCI && PPC_OF
-        select MMC_SDHCI_IO_ACCESSORS
        help
          This selects the OF support for Secure Digital Host Controller
-          Interfaces. So far, only the Freescale eSDHC controller is known
+          Interfaces.
-          to exist on OF platforms.
+          If unsure, say N.
+config MMC_SDHCI_OF_ESDHC
+        bool "SDHCI OF support for the Freescale eSDHC controller"
+        depends on MMC_SDHCI_OF
+        select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+        help
+          This selects the Freescale eSDHC controller support.
+          If unsure, say N.
+config MMC_SDHCI_OF_HLWD
+        bool "SDHCI OF support for the Nintendo Wii SDHCI controllers"
+        depends on MMC_SDHCI_OF
+        select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+        help
+          This selects the Secure Digital Host Controller Interface (SDHCI)
+          found in the "Hollywood" chipset of the Nintendo Wii video game
+          console.
          If unsure, say N.
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index ded4d8cdd9d7..3d253dd4240f 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -13,7 +13,6 @@ obj-$(CONFIG_MMC_MXC)		+= mxcmmc.o
 obj-$(CONFIG_MMC_SDHCI)         += sdhci.o
 obj-$(CONFIG_MMC_SDHCI_PCI)     += sdhci-pci.o
 obj-$(CONFIG_MMC_RICOH_MMC)     += ricoh_mmc.o
-obj-$(CONFIG_MMC_SDHCI_OF)      += sdhci-of.o
 obj-$(CONFIG_MMC_SDHCI_PLTFM)   += sdhci-pltfm.o
 obj-$(CONFIG_MMC_SDHCI_S3C)     += sdhci-s3c.o
 obj-$(CONFIG_MMC_WBSD)          += wbsd.o
@@ -37,6 +36,11 @@ obj-$(CONFIG_MMC_CB710)	+= cb710-mmc.o
 obj-$(CONFIG_MMC_VIA_SDMMC)     += via-sdmmc.o
 obj-$(CONFIG_SDH_BFIN)          += bfin_sdh.o
+obj-$(CONFIG_MMC_SDHCI_OF)      += sdhci-of.o
+sdhci-of-y                              := sdhci-of-core.o
+sdhci-of-$(CONFIG_MMC_SDHCI_OF_ESDHC)   += sdhci-of-esdhc.o
+sdhci-of-$(CONFIG_MMC_SDHCI_OF_HLWD)    += sdhci-of-hlwd.o
 ifeq ($(CONFIG_CB710_DEBUG),y)
        CFLAGS-cb710-mmc        += -DDEBUG
 endif
diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of-core.c
index 01ab916c2802..55e33135edb4 100644
--- a/drivers/mmc/host/sdhci-of.c
+++ b/drivers/mmc/host/sdhci-of-core.c
@@ -22,62 +22,37 @@
 #include <linux/of_platform.h>
 #include <linux/mmc/host.h>
 #include <asm/machdep.h>
+#include "sdhci-of.h"
 #include "sdhci.h"
-struct sdhci_of_data {
+#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
-        unsigned int quirks;
-        struct sdhci_ops ops;
-};
-struct sdhci_of_host {
-        unsigned int clock;
-        u16 xfer_mode_shadow;
-};
 /*
- * Ops and quirks for the Freescale eSDHC controller.
+ * These accessors are designed for big endian hosts doing I/O to
+ * little endian controllers incorporating a 32-bit hardware byte swapper.
 */
-#define ESDHC_DMA_SYSCTL        0x40c
+u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
-#define ESDHC_DMA_SNOOP         0x00000040
-#define ESDHC_SYSTEM_CONTROL    0x2c
-#define ESDHC_CLOCK_MASK        0x0000fff0
-#define ESDHC_PREDIV_SHIFT      8
-#define ESDHC_DIVIDER_SHIFT     4
-#define ESDHC_CLOCK_PEREN       0x00000004
-#define ESDHC_CLOCK_HCKEN       0x00000002
-#define ESDHC_CLOCK_IPGEN       0x00000001
-#define ESDHC_HOST_CONTROL_RES  0x05
-static u32 esdhc_readl(struct sdhci_host *host, int reg)
 {
        return in_be32(host->ioaddr + reg);
 }
-static u16 esdhc_readw(struct sdhci_host *host, int reg)
+u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
 {
-        u16 ret;
+        return in_be16(host->ioaddr + (reg ^ 0x2));
-        if (unlikely(reg == SDHCI_HOST_VERSION))
-                ret = in_be16(host->ioaddr + reg);
-        else
-                ret = in_be16(host->ioaddr + (reg ^ 0x2));
-        return ret;
 }
-static u8 esdhc_readb(struct sdhci_host *host, int reg)
+u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
 {
        return in_8(host->ioaddr + (reg ^ 0x3));
 }
-static void esdhc_writel(struct sdhci_host *host, u32 val, int reg)
+void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
 {
        out_be32(host->ioaddr + reg, val);
 }
-static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
+void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
 {
        struct sdhci_of_host *of_host = sdhci_priv(host);
        int base = reg & ~0x3;
@@ -92,106 +67,21 @@ static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
                of_host->xfer_mode_shadow = val;
                return;
        case SDHCI_COMMAND:
-                esdhc_writel(host, val << 16 | of_host->xfer_mode_shadow,
+                sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
-                             SDHCI_TRANSFER_MODE);
+                                    SDHCI_TRANSFER_MODE);
                return;
-        case SDHCI_BLOCK_SIZE:
-                /*
-                 * Two last DMA bits are reserved, and first one is used for
-                 * non-standard blksz of 4096 bytes that we don't support
-                 * yet. So clear the DMA boundary bits.
-                 */
-                val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
-                /* fall through */
        }
        clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
 }
-static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
+void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
 {
        int base = reg & ~0x3;
        int shift = (reg & 0x3) * 8;
-        /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
-        if (reg == SDHCI_HOST_CONTROL)
-                val &= ~ESDHC_HOST_CONTROL_RES;
        clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
 }
+#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
-static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
-{
-        int pre_div = 2;
-        int div = 1;
-        clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
-                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
-        if (clock == 0)
-                goto out;
-        while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
-                pre_div *= 2;
-        while (host->max_clk / pre_div / div > clock && div < 16)
-                div++;
-        dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
-                clock, host->max_clk / pre_div / div);
-        pre_div >>= 1;
-        div--;
-        setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
-                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
-                  div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT);
-        mdelay(100);
-out:
-        host->clock = clock;
-}
-static int esdhc_enable_dma(struct sdhci_host *host)
-{
-        setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
-        return 0;
-}
-static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
-{
-        struct sdhci_of_host *of_host = sdhci_priv(host);
-        return of_host->clock;
-}
-static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
-{
-        struct sdhci_of_host *of_host = sdhci_priv(host);
-        return of_host->clock / 256 / 16;
-}
-static struct sdhci_of_data sdhci_esdhc = {
-        .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
-                  SDHCI_QUIRK_BROKEN_CARD_DETECTION |
-                  SDHCI_QUIRK_NO_BUSY_IRQ |
-                  SDHCI_QUIRK_NONSTANDARD_CLOCK |
-                  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
-                  SDHCI_QUIRK_PIO_NEEDS_DELAY |
-                  SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
-                  SDHCI_QUIRK_NO_CARD_NO_RESET,
-        .ops = {
-                .readl = esdhc_readl,
-                .readw = esdhc_readw,
-                .readb = esdhc_readb,
-                .writel = esdhc_writel,
-                .writew = esdhc_writew,
-                .writeb = esdhc_writeb,
-                .set_clock = esdhc_set_clock,
-                .enable_dma = esdhc_enable_dma,
-                .get_max_clock = esdhc_get_max_clock,
-                .get_min_clock = esdhc_get_min_clock,
-        },
-};
 #ifdef CONFIG_PM
@@ -301,9 +191,14 @@ static int __devexit sdhci_of_remove(struct of_device *ofdev)
 }
 static const struct of_device_id sdhci_of_match[] = {
+#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
        { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
        { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
        { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
+#endif
+#ifdef CONFIG_MMC_SDHCI_OF_HLWD
+        { .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
+#endif
        { .compatible = "generic-sdhci", },
        {},
 };
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
new file mode 100644
index 000000000000..d5b11a17e648
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -0,0 +1,143 @@
+/*
+ * Freescale eSDHC controller driver.
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ *
+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
+ *          Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/mmc/host.h>
+#include "sdhci-of.h"
+#include "sdhci.h"
+/*
+ * Ops and quirks for the Freescale eSDHC controller.
+ */
+#define ESDHC_DMA_SYSCTL        0x40c
+#define ESDHC_DMA_SNOOP         0x00000040
+#define ESDHC_SYSTEM_CONTROL    0x2c
+#define ESDHC_CLOCK_MASK        0x0000fff0
+#define ESDHC_PREDIV_SHIFT      8
+#define ESDHC_DIVIDER_SHIFT     4
+#define ESDHC_CLOCK_PEREN       0x00000004
+#define ESDHC_CLOCK_HCKEN       0x00000002
+#define ESDHC_CLOCK_IPGEN       0x00000001
+#define ESDHC_HOST_CONTROL_RES  0x05
+static u16 esdhc_readw(struct sdhci_host *host, int reg)
+{
+        u16 ret;
+        if (unlikely(reg == SDHCI_HOST_VERSION))
+                ret = in_be16(host->ioaddr + reg);
+        else
+                ret = sdhci_be32bs_readw(host, reg);
+        return ret;
+}
+static void esdhc_writew(struct sdhci_host *host, u16 val, int reg)
+{
+        if (reg == SDHCI_BLOCK_SIZE) {
+                /*
+                 * Two last DMA bits are reserved, and first one is used for
+                 * non-standard blksz of 4096 bytes that we don't support
+                 * yet. So clear the DMA boundary bits.
+                 */
+                val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);
+        }
+        sdhci_be32bs_writew(host, val, reg);
+}
+static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+        /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */
+        if (reg == SDHCI_HOST_CONTROL)
+                val &= ~ESDHC_HOST_CONTROL_RES;
+        sdhci_be32bs_writeb(host, val, reg);
+}
+static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock)
+{
+        int pre_div = 2;
+        int div = 1;
+        clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
+                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK);
+        if (clock == 0)
+                goto out;
+        while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
+                pre_div *= 2;
+        while (host->max_clk / pre_div / div > clock && div < 16)
+                div++;
+        dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n",
+                clock, host->max_clk / pre_div / div);
+        pre_div >>= 1;
+        div--;
+        setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN |
+                  ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN |
+                  div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT);
+        mdelay(100);
+out:
+        host->clock = clock;
+}
+static int esdhc_enable_dma(struct sdhci_host *host)
+{
+        setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP);
+        return 0;
+}
+static unsigned int esdhc_get_max_clock(struct sdhci_host *host)
+{
+        struct sdhci_of_host *of_host = sdhci_priv(host);
+        return of_host->clock;
+}
+static unsigned int esdhc_get_min_clock(struct sdhci_host *host)
+{
+        struct sdhci_of_host *of_host = sdhci_priv(host);
+        return of_host->clock / 256 / 16;
+}
+struct sdhci_of_data sdhci_esdhc = {
+        .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 |
+                  SDHCI_QUIRK_BROKEN_CARD_DETECTION |
+                  SDHCI_QUIRK_NO_BUSY_IRQ |
+                  SDHCI_QUIRK_NONSTANDARD_CLOCK |
+                  SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK |
+                  SDHCI_QUIRK_PIO_NEEDS_DELAY |
+                  SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET |
+                  SDHCI_QUIRK_NO_CARD_NO_RESET,
+        .ops = {
+                .readl = sdhci_be32bs_readl,
+                .readw = esdhc_readw,
+                .readb = sdhci_be32bs_readb,
+                .writel = sdhci_be32bs_writel,
+                .writew = esdhc_writew,
+                .writeb = esdhc_writeb,
+                .set_clock = esdhc_set_clock,
+                .enable_dma = esdhc_enable_dma,
+                .get_max_clock = esdhc_get_max_clock,
+                .get_min_clock = esdhc_get_min_clock,
+        },
+};
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c
new file mode 100644
index 000000000000..35117f3ed757
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of-hlwd.c
@@ -0,0 +1,65 @@
+/*
+ * drivers/mmc/host/sdhci-of-hlwd.c
+ *
+ * Nintendo Wii Secure Digital Host Controller Interface.
+ * Copyright (C) 2009 The GameCube Linux Team
+ * Copyright (C) 2009 Albert Herranz
+ *
+ * Based on sdhci-of-esdhc.c
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ *
+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
+ *          Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#include <linux/delay.h>
+#include <linux/mmc/host.h>
+#include "sdhci-of.h"
+#include "sdhci.h"
+/*
+ * Ops and quirks for the Nintendo Wii SDHCI controllers.
+ */
+/*
+ * We need a small delay after each write, or things go horribly wrong.
+ */
+#define SDHCI_HLWD_WRITE_DELAY  5 /* usecs */
+static void sdhci_hlwd_writel(struct sdhci_host *host, u32 val, int reg)
+{
+        sdhci_be32bs_writel(host, val, reg);
+        udelay(SDHCI_HLWD_WRITE_DELAY);
+}
+static void sdhci_hlwd_writew(struct sdhci_host *host, u16 val, int reg)
+{
+        sdhci_be32bs_writew(host, val, reg);
+        udelay(SDHCI_HLWD_WRITE_DELAY);
+}
+static void sdhci_hlwd_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+        sdhci_be32bs_writeb(host, val, reg);
+        udelay(SDHCI_HLWD_WRITE_DELAY);
+}
+struct sdhci_of_data sdhci_hlwd = {
+        .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
+                  SDHCI_QUIRK_32BIT_DMA_SIZE,
+        .ops = {
+                .readl = sdhci_be32bs_readl,
+                .readw = sdhci_be32bs_readw,
+                .readb = sdhci_be32bs_readb,
+                .writel = sdhci_hlwd_writel,
+                .writew = sdhci_hlwd_writew,
+                .writeb = sdhci_hlwd_writeb,
+        },
+};
diff --git a/drivers/mmc/host/sdhci-of.h b/drivers/mmc/host/sdhci-of.h
new file mode 100644
index 000000000000..ad09ad9915d8
--- /dev/null
+++ b/drivers/mmc/host/sdhci-of.h
@@ -0,0 +1,42 @@
+/*
+ * OpenFirmware bindings for Secure Digital Host Controller Interface.
+ *
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ * Copyright (c) 2009 MontaVista Software, Inc.
+ *
+ * Authors: Xiaobo Xie <X.Xie@freescale.com>
+ *          Anton Vorontsov <avorontsov@ru.mvista.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or (at
+ * your option) any later version.
+ */
+#ifndef __SDHCI_OF_H
+#define __SDHCI_OF_H
+#include <linux/types.h>
+#include "sdhci.h"
+struct sdhci_of_data {
+        unsigned int quirks;
+        struct sdhci_ops ops;
+};
+struct sdhci_of_host {
+        unsigned int clock;
+        u16 xfer_mode_shadow;
+};
+extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg);
+extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg);
+extern u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg);
+extern void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg);
+extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg);
+extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg);
+extern struct sdhci_of_data sdhci_esdhc;
+extern struct sdhci_of_data sdhci_hlwd;
+#endif /* __SDHCI_OF_H */
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
index ce5f1d73dc04..842f46f94284 100644
--- a/drivers/mmc/host/sdhci.h
+++ b/drivers/mmc/host/sdhci.h
@@ -8,6 +8,8 @@
 * the Free Software Foundation; either version 2 of the License, or (at
 * your option) any later version.
 */
+#ifndef __SDHCI_H
+#define __SDHCI_H
 #include <linux/scatterlist.h>
 #include <linux/compiler.h>
@@ -408,3 +410,5 @@ extern void sdhci_remove_host(struct sdhci_host *host, int dead);
 extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state);
 extern int sdhci_resume_host(struct sdhci_host *host);
 #endif
+#endif /* __SDHCI_H */
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c
index 74fa075c838a..b13f6417b5b2 100644
--- a/drivers/mtd/maps/pxa2xx-flash.c
+++ b/drivers/mtd/maps/pxa2xx-flash.c
@@ -20,14 +20,23 @@
 #include <asm/io.h>
 #include <mach/hardware.h>
-#include <asm/cacheflush.h>
 #include <asm/mach/flash.h>
+#define CACHELINESIZE   32
 static void pxa2xx_map_inval_cache(struct map_info *map, unsigned long from,
                                      ssize_t len)
 {
-        flush_ioremap_region(map->phys, map->cached, from, len);
+        unsigned long start = (unsigned long)map->cached + from;
+        unsigned long end = start + len;
+        start &= ~(CACHELINESIZE - 1);
+        while (start < end) {
+                /* invalidate D cache line */
+                asm volatile ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start));
+                start += CACHELINESIZE;
+        }
 }
 struct pxa2xx_flash_info {
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h
index 675b7df632fc..27ca859e7453 100644
--- a/drivers/net/wireless/iwlwifi/iwl-core.h
+++ b/drivers/net/wireless/iwlwifi/iwl-core.h
@@ -63,7 +63,7 @@
 #ifndef __iwl_core_h__
 #define __iwl_core_h__
-#include <linux/utsrelease.h>
+#include <generated/utsrelease.h>
 /************************
 * forward declarations *
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c
index 3aabf1e37988..76e640bccde8 100644
--- a/drivers/pcmcia/pxa2xx_base.c
+++ b/drivers/pcmcia/pxa2xx_base.c
@@ -291,7 +291,7 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
                skt->nr = ops->first + i;
                skt->ops = ops;
                skt->socket.owner = ops->owner;
-                skt->socket.dev.parent = dev;
+                skt->socket.dev.parent = &dev->dev;
                skt->socket.pci_irq = NO_IRQ;
                ret = pxa2xx_drv_pcmcia_add_one(skt);
@@ -304,8 +304,8 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev)
                        soc_pcmcia_remove_one(&sinfo->skt[i]);
                kfree(sinfo);
        } else {
-                pxa2xx_configure_sockets(dev);
+                pxa2xx_configure_sockets(&dev->dev);
-                dev_set_drvdata(dev, sinfo);
+                dev_set_drvdata(&dev->dev, sinfo);
        }
        return ret;
diff --git a/drivers/platform/x86/compal-laptop.c b/drivers/platform/x86/compal-laptop.c
index 11003bba10d3..1a387e79f719 100644
--- a/drivers/platform/x86/compal-laptop.c
+++ b/drivers/platform/x86/compal-laptop.c
@@ -51,7 +51,6 @@
 #include <linux/dmi.h>
 #include <linux/backlight.h>
 #include <linux/platform_device.h>
-#include <linux/autoconf.h>
 #define COMPAL_DRIVER_VERSION "0.2.6"
diff --git a/drivers/regulator/88pm8607.c b/drivers/regulator/88pm8607.c
new file mode 100644
index 000000000000..04719551381b
--- /dev/null
+++ b/drivers/regulator/88pm8607.c
@@ -0,0 +1,685 @@
+/*
+ * Regulators driver for Marvell 88PM8607
+ *
+ * Copyright (C) 2009 Marvell International Ltd.
+ *      Haojian Zhuang <haojian.zhuang@marvell.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/mfd/88pm8607.h>
+struct pm8607_regulator_info {
+        struct regulator_desc   desc;
+        struct pm8607_chip      *chip;
+        struct regulator_dev    *regulator;
+        int     min_uV;
+        int     max_uV;
+        int     step_uV;
+        int     vol_reg;
+        int     vol_shift;
+        int     vol_nbits;
+        int     update_reg;
+        int     update_bit;
+        int     enable_reg;
+        int     enable_bit;
+        int     slope_double;
+};
+static inline int check_range(struct pm8607_regulator_info *info,
+                                int min_uV, int max_uV)
+{
+        if (max_uV < info->min_uV || min_uV > info->max_uV || min_uV > max_uV)
+                return -EINVAL;
+        return 0;
+}
+static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        uint8_t chip_id = info->chip->chip_id;
+        int ret = -EINVAL;
+        switch (info->desc.id) {
+        case PM8607_ID_BUCK1:
+                ret = (index < 0x1d) ? (index * 25000 + 800000) :
+                        ((index < 0x20) ? 1500000 :
+                        ((index < 0x40) ? ((index - 0x20) * 25000) :
+                        -EINVAL));
+                break;
+        case PM8607_ID_BUCK3:
+                ret = (index < 0x3d) ? (index * 25000) :
+                        ((index < 0x40) ? 1500000 : -EINVAL);
+                if (ret < 0)
+                        break;
+                if (info->slope_double)
+                        ret <<= 1;
+                break;
+        case PM8607_ID_LDO1:
+                ret = (index == 0) ? 1800000 :
+                        ((index == 1) ? 1200000 :
+                        ((index == 2) ? 2800000 : -EINVAL));
+                break;
+        case PM8607_ID_LDO5:
+                ret = (index == 0) ? 2900000 :
+                        ((index == 1) ? 3000000 :
+                        ((index == 2) ? 3100000 : 3300000));
+                break;
+        case PM8607_ID_LDO7:
+        case PM8607_ID_LDO8:
+                ret = (index < 3) ? (index * 50000 + 1800000) :
+                        ((index < 8) ? (index * 50000 + 2550000) :
+                         -EINVAL);
+                break;
+        case PM8607_ID_LDO12:
+                ret = (index < 2) ? (index * 100000 + 1800000) :
+                        ((index < 7) ? (index * 100000 + 2500000) :
+                        ((index == 7) ? 3300000 : 1200000));
+                break;
+        case PM8607_ID_LDO2:
+        case PM8607_ID_LDO3:
+        case PM8607_ID_LDO9:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2550000) :
+                                 -EINVAL);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 7) ? (index * 50000 + 2550000) :
+                                3300000);
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO4:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2550000) :
+                                 -EINVAL);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 6) ? (index * 50000 + 2550000) :
+                                ((index == 6) ? 2900000 : 3300000));
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO6:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2450000) :
+                                -EINVAL);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 2) ? (index * 50000 + 1800000) :
+                                ((index < 7) ? (index * 50000 + 2500000) :
+                                3300000);
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO10:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2550000) :
+                                1200000);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 7) ? (index * 50000 + 2550000) :
+                                ((index == 7) ? 3300000 : 1200000));
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO14:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        ret = (index < 3) ? (index * 50000 + 1800000) :
+                                ((index < 8) ? (index * 50000 + 2550000) :
+                                 -EINVAL);
+                        break;
+                case PM8607_CHIP_B0:
+                        ret = (index < 2) ? (index * 50000 + 1800000) :
+                                ((index < 7) ? (index * 50000 + 2600000) :
+                                3300000);
+                        break;
+                }
+                break;
+        }
+        return ret;
+}
+static int choose_voltage(struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        uint8_t chip_id = info->chip->chip_id;
+        int val = -ENOENT;
+        int ret;
+        switch (info->desc.id) {
+        case PM8607_ID_BUCK1:
+                if (min_uV >= 800000)           /* 800mV ~ 1500mV / 25mV */
+                        val = (min_uV - 775001) / 25000;
+                else {                          /* 25mV ~ 775mV / 25mV */
+                        val = (min_uV + 249999) / 25000;
+                        val += 32;
+                }
+                break;
+        case PM8607_ID_BUCK3:
+                if (info->slope_double)
+                        min_uV = min_uV >> 1;
+                val = (min_uV + 249999) / 25000; /* 0mV ~ 1500mV / 25mV */
+                break;
+        case PM8607_ID_LDO1:
+                if (min_uV > 1800000)
+                        val = 2;
+                else if (min_uV > 1200000)
+                        val = 0;
+                else
+                        val = 1;
+                break;
+        case PM8607_ID_LDO5:
+                if (min_uV > 3100000)
+                        val = 3;
+                else                            /* 2900mV ~ 3100mV / 100mV */
+                        val = (min_uV - 2800001) / 100000;
+                break;
+        case PM8607_ID_LDO7:
+        case PM8607_ID_LDO8:
+                if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
+                        if (min_uV <= 1800000)
+                                val = 0;        /* 1800mv */
+                        else if (min_uV <= 1900000)
+                                val = (min_uV - 1750001) / 50000;
+                        else
+                                val = 3;        /* 2700mV */
+                } else {                 /* 2700mV ~ 2900mV / 50mV */
+                        if (min_uV <= 2900000) {
+                                val = (min_uV - 2650001) / 50000;
+                                val += 3;
+                        } else
+                                val = -EINVAL;
+                }
+                break;
+        case PM8607_ID_LDO10:
+                if (min_uV > 2850000)
+                        val = 7;
+                else if (min_uV <= 1200000)
+                        val = 8;
+                else if (min_uV < 2700000)      /* 1800mV ~ 1900mV / 50mV */
+                        val = (min_uV - 1750001) / 50000;
+                else {                          /* 2700mV ~ 2850mV / 50mV */
+                        val = (min_uV - 2650001) / 50000;
+                        val += 3;
+                }
+                break;
+        case PM8607_ID_LDO12:
+                if (min_uV < 2700000) {         /* 1800mV ~ 1900mV / 100mV */
+                        if (min_uV <= 1200000)
+                                val = 8;        /* 1200mV */
+                        else if (min_uV <= 1800000)
+                                val = 0;        /* 1800mV */
+                        else if (min_uV <= 1900000)
+                                val = (min_uV - 1700001) / 100000;
+                        else
+                                val = 2;        /* 2700mV */
+                } else {                        /* 2700mV ~ 3100mV / 100mV */
+                        if (min_uV <= 3100000) {
+                                val = (min_uV - 2600001) / 100000;
+                                val += 2;
+                        } else if (min_uV <= 3300000)
+                                val = 7;
+                        else
+                                val = -EINVAL;
+                }
+                break;
+        case PM8607_ID_LDO2:
+        case PM8607_ID_LDO3:
+        case PM8607_ID_LDO9:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        if (min_uV < 2700000)   /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        else {                  /* 2700mV ~ 2900mV / 50mV */
+                                if (min_uV <= 2900000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else
+                                        val = -EINVAL;
+                        }
+                        break;
+                case PM8607_CHIP_B0:
+                        if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        } else {                 /* 2700mV ~ 2850mV / 50mV */
+                                if (min_uV <= 2850000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else if (min_uV <= 3300000)
+                                        val = 7;
+                                else
+                                        val = -EINVAL;
+                        }
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO4:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        if (min_uV < 2700000)   /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        else {                  /* 2700mV ~ 2900mV / 50mV */
+                                if (min_uV <= 2900000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else
+                                        val = -EINVAL;
+                        }
+                        break;
+                case PM8607_CHIP_B0:
+                        if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        } else {                 /* 2700mV ~ 2800mV / 50mV */
+                                if (min_uV <= 2850000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else if (min_uV <= 2900000)
+                                        val = 6;
+                                else if (min_uV <= 3300000)
+                                        val = 7;
+                                else
+                                        val = -EINVAL;
+                        }
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO6:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        if (min_uV < 2600000) { /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2600mV */
+                        } else {                /* 2600mV ~ 2800mV / 50mV */
+                                if (min_uV <= 2800000) {
+                                        val = (min_uV - 2550001) / 50000;
+                                        val += 3;
+                                } else
+                                        val = -EINVAL;
+                        }
+                        break;
+                case PM8607_CHIP_B0:
+                        if (min_uV < 2600000) { /* 1800mV ~ 1850mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1850000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 2;        /* 2600mV */
+                        } else {                /* 2600mV ~ 2800mV / 50mV */
+                                if (min_uV <= 2800000) {
+                                        val = (min_uV - 2550001) / 50000;
+                                        val += 2;
+                                } else if (min_uV <= 3300000)
+                                        val = 7;
+                                else
+                                        val = -EINVAL;
+                        }
+                        break;
+                }
+                break;
+        case PM8607_ID_LDO14:
+                switch (chip_id) {
+                case PM8607_CHIP_A0:
+                case PM8607_CHIP_A1:
+                        if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1900000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 3;        /* 2700mV */
+                        } else {                 /* 2700mV ~ 2900mV / 50mV */
+                                if (min_uV <= 2900000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 3;
+                                } else
+                                        val = -EINVAL;
+                        }
+                        break;
+                case PM8607_CHIP_B0:
+                        if (min_uV < 2700000) { /* 1800mV ~ 1850mV / 50mV */
+                                if (min_uV <= 1800000)
+                                        val = 0;
+                                else if (min_uV <= 1850000)
+                                        val = (min_uV - 1750001) / 50000;
+                                else
+                                        val = 2;        /* 2700mV */
+                        } else {                 /* 2700mV ~ 2900mV / 50mV */
+                                if (min_uV <= 2900000) {
+                                        val = (min_uV - 2650001) / 50000;
+                                        val += 2;
+                                } else if (min_uV <= 3300000)
+                                        val = 7;
+                                else
+                                        val = -EINVAL;
+                        }
+                        break;
+                }
+                break;
+        }
+        if (val >= 0) {
+                ret = pm8607_list_voltage(rdev, val);
+                if (ret > max_uV) {
+                        pr_err("exceed voltage range (%d %d) uV",
+                                min_uV, max_uV);
+                        return -EINVAL;
+                }
+        } else
+                pr_err("invalid voltage range (%d %d) uV", min_uV, max_uV);
+        return val;
+}
+static int pm8607_set_voltage(struct regulator_dev *rdev,
+                              int min_uV, int max_uV)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+        uint8_t val, mask;
+        int ret;
+        if (check_range(info, min_uV, max_uV)) {
+                pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV);
+                return -EINVAL;
+        }
+        ret = choose_voltage(rdev, min_uV, max_uV);
+        if (ret < 0)
+                return -EINVAL;
+        val = (uint8_t)(ret << info->vol_shift);
+        mask = ((1 << info->vol_nbits) - 1)  << info->vol_shift;
+        ret = pm8607_set_bits(chip, info->vol_reg, mask, val);
+        if (ret)
+                return ret;
+        switch (info->desc.id) {
+        case PM8607_ID_BUCK1:
+        case PM8607_ID_BUCK3:
+                ret = pm8607_set_bits(chip, info->update_reg,
+                                      1 << info->update_bit,
+                                      1 << info->update_bit);
+                break;
+        }
+        return ret;
+}
+static int pm8607_get_voltage(struct regulator_dev *rdev)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+        uint8_t val, mask;
+        int ret;
+        ret = pm8607_reg_read(chip, info->vol_reg);
+        if (ret < 0)
+                return ret;
+        mask = ((1 << info->vol_nbits) - 1)  << info->vol_shift;
+        val = ((unsigned char)ret & mask) >> info->vol_shift;
+        return pm8607_list_voltage(rdev, val);
+}
+static int pm8607_enable(struct regulator_dev *rdev)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+        return pm8607_set_bits(chip, info->enable_reg,
+                               1 << info->enable_bit,
+                               1 << info->enable_bit);
+}
+static int pm8607_disable(struct regulator_dev *rdev)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+        return pm8607_set_bits(chip, info->enable_reg,
+                               1 << info->enable_bit, 0);
+}
+static int pm8607_is_enabled(struct regulator_dev *rdev)
+{
+        struct pm8607_regulator_info *info = rdev_get_drvdata(rdev);
+        struct pm8607_chip *chip = info->chip;
+        int ret;
+        ret = pm8607_reg_read(chip, info->enable_reg);
+        if (ret < 0)
+                return ret;
+        return !!((unsigned char)ret & (1 << info->enable_bit));
+}
+static struct regulator_ops pm8607_regulator_ops = {
+        .set_voltage    = pm8607_set_voltage,
+        .get_voltage    = pm8607_get_voltage,
+        .enable         = pm8607_enable,
+        .disable        = pm8607_disable,
+        .is_enabled     = pm8607_is_enabled,
+};
+#define PM8607_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \
+{                                                                       \
+        .desc   = {                                                     \
+                .name   = "BUCK" #_id,                                  \
+                .ops    = &pm8607_regulator_ops,                        \
+                .type   = REGULATOR_VOLTAGE,                            \
+                .id     = PM8607_ID_BUCK##_id,                          \
+                .owner  = THIS_MODULE,                                  \
+        },                                                              \
+        .min_uV         = (min) * 1000,                                 \
+        .max_uV         = (max) * 1000,                                 \
+        .step_uV        = (step) * 1000,                                \
+        .vol_reg        = PM8607_##vreg,                                \
+        .vol_shift      = (0),                                          \
+        .vol_nbits      = (nbits),                                      \
+        .update_reg     = PM8607_##ureg,                                \
+        .update_bit     = (ubit),                                       \
+        .enable_reg     = PM8607_##ereg,                                \
+        .enable_bit     = (ebit),                                       \
+        .slope_double   = (0),                                          \
+}
+#define PM8607_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \
+{                                                                       \
+        .desc   = {                                                     \
+                .name   = "LDO" #_id,                                   \
+                .ops    = &pm8607_regulator_ops,                        \
+                .type   = REGULATOR_VOLTAGE,                            \
+                .id     = PM8607_ID_LDO##_id,                           \
+                .owner  = THIS_MODULE,                                  \
+        },                                                              \
+        .min_uV         = (min) * 1000,                                 \
+        .max_uV         = (max) * 1000,                                 \
+        .step_uV        = (step) * 1000,                                \
+        .vol_reg        = PM8607_##vreg,                                \
+        .vol_shift      = (shift),                                      \
+        .vol_nbits      = (nbits),                                      \
+        .enable_reg     = PM8607_##ereg,                                \
+        .enable_bit     = (ebit),                                       \
+        .slope_double   = (0),                                          \
+}
+static struct pm8607_regulator_info pm8607_regulator_info[] = {
+        PM8607_DVC(1, 0, 1500, 25, BUCK1, 6, GO, 0, SUPPLIES_EN11, 0),
+        PM8607_DVC(3, 0, 1500, 25, BUCK3, 6, GO, 2, SUPPLIES_EN11, 2),
+        PM8607_LDO(1 , 1200, 2800, 0, LDO1 , 0, 2, SUPPLIES_EN11, 3),
+        PM8607_LDO(2 , 1800, 3300, 0, LDO2 , 0, 3, SUPPLIES_EN11, 4),
+        PM8607_LDO(3 , 1800, 3300, 0, LDO3 , 0, 3, SUPPLIES_EN11, 5),
+        PM8607_LDO(4 , 1800, 3300, 0, LDO4 , 0, 3, SUPPLIES_EN11, 6),
+        PM8607_LDO(5 , 2900, 3300, 0, LDO5 , 0, 2, SUPPLIES_EN11, 7),
+        PM8607_LDO(6 , 1800, 3300, 0, LDO6 , 0, 3, SUPPLIES_EN12, 0),
+        PM8607_LDO(7 , 1800, 2900, 0, LDO7 , 0, 3, SUPPLIES_EN12, 1),
+        PM8607_LDO(8 , 1800, 2900, 0, LDO8 , 0, 3, SUPPLIES_EN12, 2),
+        PM8607_LDO(9 , 1800, 3300, 0, LDO9 , 0, 3, SUPPLIES_EN12, 3),
+        PM8607_LDO(10, 1200, 3300, 0, LDO10, 0, 4, SUPPLIES_EN11, 4),
+        PM8607_LDO(12, 1200, 3300, 0, LDO12, 0, 4, SUPPLIES_EN11, 5),
+        PM8607_LDO(14, 1800, 3300, 0, LDO14, 0, 3, SUPPLIES_EN11, 6),
+};
+static inline struct pm8607_regulator_info *find_regulator_info(int id)
+{
+        struct pm8607_regulator_info *info;
+        int i;
+        for (i = 0; i < ARRAY_SIZE(pm8607_regulator_info); i++) {
+                info = &pm8607_regulator_info[i];
+                if (info->desc.id == id)
+                        return info;
+        }
+        return NULL;
+}
+static int __devinit pm8607_regulator_probe(struct platform_device *pdev)
+{
+        struct pm8607_chip *chip = dev_get_drvdata(pdev->dev.parent);
+        struct pm8607_platform_data *pdata = chip->dev->platform_data;
+        struct pm8607_regulator_info *info = NULL;
+        info = find_regulator_info(pdev->id);
+        if (info == NULL) {
+                dev_err(&pdev->dev, "invalid regulator ID specified\n");
+                return -EINVAL;
+        }
+        info->chip = chip;
+        info->regulator = regulator_register(&info->desc, &pdev->dev,
+                                             pdata->regulator[pdev->id], info);
+        if (IS_ERR(info->regulator)) {
+                dev_err(&pdev->dev, "failed to register regulator %s\n",
+                        info->desc.name);
+                return PTR_ERR(info->regulator);
+        }
+        /* check DVC ramp slope double */
+        if (info->desc.id == PM8607_ID_BUCK3)
+                if (info->chip->buck3_double)
+                        info->slope_double = 1;
+        platform_set_drvdata(pdev, info);
+        return 0;
+}
+static int __devexit pm8607_regulator_remove(struct platform_device *pdev)
+{
+        struct pm8607_regulator_info *info = platform_get_drvdata(pdev);
+        regulator_unregister(info->regulator);
+        return 0;
+}
+#define PM8607_REGULATOR_DRIVER(_name)                          \
+{                                                               \
+        .driver         = {                                     \
+                .name   = "88pm8607-" #_name,                   \
+                .owner  = THIS_MODULE,                          \
+        },                                                      \
+        .probe          = pm8607_regulator_probe,               \
+        .remove         = __devexit_p(pm8607_regulator_remove), \
+}
+static struct platform_driver pm8607_regulator_driver[] = {
+        PM8607_REGULATOR_DRIVER(buck1),
+        PM8607_REGULATOR_DRIVER(buck2),
+        PM8607_REGULATOR_DRIVER(buck3),
+        PM8607_REGULATOR_DRIVER(ldo1),
+        PM8607_REGULATOR_DRIVER(ldo2),
+        PM8607_REGULATOR_DRIVER(ldo3),
+        PM8607_REGULATOR_DRIVER(ldo4),
+        PM8607_REGULATOR_DRIVER(ldo5),
+        PM8607_REGULATOR_DRIVER(ldo6),
+        PM8607_REGULATOR_DRIVER(ldo7),
+        PM8607_REGULATOR_DRIVER(ldo8),
+        PM8607_REGULATOR_DRIVER(ldo9),
+        PM8607_REGULATOR_DRIVER(ldo10),
+        PM8607_REGULATOR_DRIVER(ldo12),
+        PM8607_REGULATOR_DRIVER(ldo14),
+};
+static int __init pm8607_regulator_init(void)
+{
+        int i, count, ret;
+        count = ARRAY_SIZE(pm8607_regulator_driver);
+        for (i = 0; i < count; i++) {
+                ret = platform_driver_register(&pm8607_regulator_driver[i]);
+                if (ret != 0)
+                        pr_err("Failed to register regulator driver: %d\n",
+                                ret);
+        }
+        return 0;
+}
+subsys_initcall(pm8607_regulator_init);
+static void __exit pm8607_regulator_exit(void)
+{
+        int i, count;
+        count = ARRAY_SIZE(pm8607_regulator_driver);
+        for (i = 0; i < count; i++)
+                platform_driver_unregister(&pm8607_regulator_driver[i]);
+}
+module_exit(pm8607_regulator_exit);
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>");
+MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM8607 PMIC");
+MODULE_ALIAS("platform:88pm8607-regulator");
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig
index 7cfdd65bebb4..262f62eec837 100644
--- a/drivers/regulator/Kconfig
+++ b/drivers/regulator/Kconfig
@@ -69,6 +69,13 @@ config REGULATOR_MAX1586
          regulator via I2C bus. The provided regulator is suitable
          for PXA27x chips to control VCC_CORE and VCC_USIM voltages.
+config REGULATOR_MAX8660
+        tristate "Maxim 8660/8661 voltage regulator"
+        depends on I2C
+        help
+          This driver controls a Maxim 8660/8661 voltage output
+          regulator via I2C bus.
 config REGULATOR_TWL4030
        bool "TI TWL4030/TWL5030/TWL6030/TPS695x0 PMIC"
        depends on TWL4030_CORE
@@ -157,5 +164,11 @@ config REGULATOR_TPS6507X
          three step-down converters and two general-purpose LDO voltage regulators.
          It supports TI's software based Class-2 SmartReflex implementation.
+config REGULATOR_88PM8607
+        bool "Marvell 88PM8607 Power regulators"
+        depends on MFD_88PM8607=y
+        help
+          This driver supports 88PM8607 voltage regulator chips.
 endif
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile
index 9ae3cc44e668..b3c806c79415 100644
--- a/drivers/regulator/Makefile
+++ b/drivers/regulator/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o
 obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o
 obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o
 obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o
+obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o
 obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o
 obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o
 obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o
@@ -20,10 +21,11 @@ obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o
 obj-$(CONFIG_REGULATOR_DA903X)  += da903x.o
 obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o
 obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o
-obj-$(CONFIG_REGULATOR_MC13783) += mc13783.o
+obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o
 obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o
 obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o
 obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o
+obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o
 ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG
diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c
index 49aeee823a25..b349db4504b7 100644
--- a/drivers/regulator/ab3100.c
+++ b/drivers/regulator/ab3100.c
@@ -81,7 +81,7 @@ static const u8 ab3100_reg_init_order[AB3100_NUM_REGULATORS+2] = {
 #define LDO_C_VOLTAGE 2650000
 #define LDO_D_VOLTAGE 2650000
-static const int const ldo_e_buck_typ_voltages[] = {
+static const int ldo_e_buck_typ_voltages[] = {
        1800000,
        1400000,
        1300000,
@@ -91,7 +91,7 @@ static const int const ldo_e_buck_typ_voltages[] = {
        900000,
 };
-static const int const ldo_f_typ_voltages[] = {
+static const int ldo_f_typ_voltages[] = {
        1800000,
        1400000,
        1300000,
@@ -102,21 +102,21 @@ static const int const ldo_f_typ_voltages[] = {
        2650000,
 };
-static const int const ldo_g_typ_voltages[] = {
+static const int ldo_g_typ_voltages[] = {
        2850000,
        2750000,
        1800000,
        1500000,
 };
-static const int const ldo_h_typ_voltages[] = {
+static const int ldo_h_typ_voltages[] = {
        2750000,
        1800000,
        1500000,
        1200000,
 };
-static const int const ldo_k_typ_voltages[] = {
+static const int ldo_k_typ_voltages[] = {
        2750000,
        1800000,
 };
@@ -241,24 +241,12 @@ static int ab3100_disable_regulator(struct regulator_dev *reg)
         * LDO D is a special regulator. When it is disabled, the entire
         * system is shut down. So this is handled specially.
         */
+        pr_info("Called ab3100_disable_regulator\n");
        if (abreg->regreg == AB3100_LDO_D) {
-                int i;
                dev_info(&reg->dev, "disabling LDO D - shut down system\n");
-                /*
-                 * Set regulators to default values, ignore any errors,
-                 * we're going DOWN
-                 */
-                for (i = 0; i < ARRAY_SIZE(ab3100_reg_init_order); i++) {
-                        (void) ab3100_set_register_interruptible(abreg->ab3100,
-                                        ab3100_reg_init_order[i],
-                                        abreg->plfdata->reg_initvals[i]);
-                }
                /* Setting LDO D to 0x00 cuts the power to the SoC */
                return ab3100_set_register_interruptible(abreg->ab3100,
                                                         AB3100_LDO_D, 0x00U);
        }
        /*
@@ -607,13 +595,6 @@ static int __init ab3100_regulators_probe(struct platform_device *pdev)
                }
        }
-        if (err) {
-                dev_err(&pdev->dev,
-                        "LDO D regulator initialization failed with error %d\n",
-                        err);
-                return err;
-        }
        /* Register the regulators */
        for (i = 0; i < AB3100_NUM_REGULATORS; i++) {
                struct ab3100_regulator *reg = &ab3100_regulators[i];
@@ -688,7 +669,7 @@ static __init int ab3100_regulators_init(void)
 static __exit void ab3100_regulators_exit(void)
 {
-        platform_driver_register(&ab3100_regulators_driver);
+        platform_driver_unregister(&ab3100_regulators_driver);
 }
 subsys_initcall(ab3100_regulators_init);
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index efe568deda12..686ef270ecf7 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -66,6 +66,16 @@ static unsigned int _regulator_get_mode(struct regulator_dev *rdev);
 static void _notifier_call_chain(struct regulator_dev *rdev,
                                  unsigned long event, void *data);
+static const char *rdev_get_name(struct regulator_dev *rdev)
+{
+        if (rdev->constraints && rdev->constraints->name)
+                return rdev->constraints->name;
+        else if (rdev->desc->name)
+                return rdev->desc->name;
+        else
+                return "";
+}
 /* gets the regulator for a given consumer device */
 static struct regulator *get_device_regulator(struct device *dev)
 {
@@ -96,12 +106,12 @@ static int regulator_check_voltage(struct regulator_dev *rdev,
        if (!rdev->constraints) {
                printk(KERN_ERR "%s: no constraints for %s\n", __func__,
-                       rdev->desc->name);
+                       rdev_get_name(rdev));
                return -ENODEV;
        }
        if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) {
                printk(KERN_ERR "%s: operation not allowed for %s\n",
-                       __func__, rdev->desc->name);
+                       __func__, rdev_get_name(rdev));
                return -EPERM;
        }
@@ -124,12 +134,12 @@ static int regulator_check_current_limit(struct regulator_dev *rdev,
        if (!rdev->constraints) {
                printk(KERN_ERR "%s: no constraints for %s\n", __func__,
-                       rdev->desc->name);
+                       rdev_get_name(rdev));
                return -ENODEV;
        }
        if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_CURRENT)) {
                printk(KERN_ERR "%s: operation not allowed for %s\n",
-                       __func__, rdev->desc->name);
+                       __func__, rdev_get_name(rdev));
                return -EPERM;
        }
@@ -159,17 +169,17 @@ static int regulator_check_mode(struct regulator_dev *rdev, int mode)
        if (!rdev->constraints) {
                printk(KERN_ERR "%s: no constraints for %s\n", __func__,
-                       rdev->desc->name);
+                       rdev_get_name(rdev));
                return -ENODEV;
        }
        if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_MODE)) {
                printk(KERN_ERR "%s: operation not allowed for %s\n",
-                       __func__, rdev->desc->name);
+                       __func__, rdev_get_name(rdev));
                return -EPERM;
        }
        if (!(rdev->constraints->valid_modes_mask & mode)) {
                printk(KERN_ERR "%s: invalid mode %x for %s\n",
-                       __func__, mode, rdev->desc->name);
+                       __func__, mode, rdev_get_name(rdev));
                return -EINVAL;
        }
        return 0;
@@ -180,12 +190,12 @@ static int regulator_check_drms(struct regulator_dev *rdev)
 {
        if (!rdev->constraints) {
                printk(KERN_ERR "%s: no constraints for %s\n", __func__,
-                       rdev->desc->name);
+                       rdev_get_name(rdev));
                return -ENODEV;
        }
        if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_DRMS)) {
                printk(KERN_ERR "%s: operation not allowed for %s\n",
-                       __func__, rdev->desc->name);
+                       __func__, rdev_get_name(rdev));
                return -EPERM;
        }
        return 0;
@@ -230,16 +240,8 @@ static ssize_t regulator_name_show(struct device *dev,
                             struct device_attribute *attr, char *buf)
 {
        struct regulator_dev *rdev = dev_get_drvdata(dev);
-        const char *name;
-        if (rdev->constraints && rdev->constraints->name)
+        return sprintf(buf, "%s\n", rdev_get_name(rdev));
-                name = rdev->constraints->name;
-        else if (rdev->desc->name)
-                name = rdev->desc->name;
-        else
-                name = "";
-        return sprintf(buf, "%s\n", name);
 }
 static ssize_t regulator_print_opmode(char *buf, int mode)
@@ -388,7 +390,7 @@ static ssize_t regulator_total_uA_show(struct device *dev,
        mutex_lock(&rdev->mutex);
        list_for_each_entry(regulator, &rdev->consumer_list, list)
-            uA += regulator->uA_load;
+                uA += regulator->uA_load;
        mutex_unlock(&rdev->mutex);
        return sprintf(buf, "%d\n", uA);
 }
@@ -563,7 +565,7 @@ static void drms_uA_update(struct regulator_dev *rdev)
        /* calc total requested load */
        list_for_each_entry(sibling, &rdev->consumer_list, list)
-            current_uA += sibling->uA_load;
+                current_uA += sibling->uA_load;
        /* now get the optimum mode for our new total regulator load */
        mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV,
@@ -579,10 +581,29 @@ static int suspend_set_state(struct regulator_dev *rdev,
        struct regulator_state *rstate)
 {
        int ret = 0;
+        bool can_set_state;
-        /* enable & disable are mandatory for suspend control */
+        can_set_state = rdev->desc->ops->set_suspend_enable &&
-        if (!rdev->desc->ops->set_suspend_enable ||
+                rdev->desc->ops->set_suspend_disable;
-                !rdev->desc->ops->set_suspend_disable) {
+        /* If we have no suspend mode configration don't set anything;
+         * only warn if the driver actually makes the suspend mode
+         * configurable.
+         */
+        if (!rstate->enabled && !rstate->disabled) {
+                if (can_set_state)
+                        printk(KERN_WARNING "%s: No configuration for %s\n",
+                               __func__, rdev_get_name(rdev));
+                return 0;
+        }
+        if (rstate->enabled && rstate->disabled) {
+                printk(KERN_ERR "%s: invalid configuration for %s\n",
+                       __func__, rdev_get_name(rdev));
+                return -EINVAL;
+        }
+        if (!can_set_state) {
                printk(KERN_ERR "%s: no way to set suspend state\n",
                        __func__);
                return -EINVAL;
@@ -641,25 +662,43 @@ static void print_constraints(struct regulator_dev *rdev)
 {
        struct regulation_constraints *constraints = rdev->constraints;
        char buf[80];
-        int count;
+        int count = 0;
+        int ret;
-        if (rdev->desc->type == REGULATOR_VOLTAGE) {
+        if (constraints->min_uV && constraints->max_uV) {
                if (constraints->min_uV == constraints->max_uV)
-                        count = sprintf(buf, "%d mV ",
+                        count += sprintf(buf + count, "%d mV ",
-                                        constraints->min_uV / 1000);
+                                         constraints->min_uV / 1000);
                else
-                        count = sprintf(buf, "%d <--> %d mV ",
+                        count += sprintf(buf + count, "%d <--> %d mV ",
-                                        constraints->min_uV / 1000,
+                                         constraints->min_uV / 1000,
-                                        constraints->max_uV / 1000);
+                                         constraints->max_uV / 1000);
-        } else {
+        }
+        if (!constraints->min_uV ||
+            constraints->min_uV != constraints->max_uV) {
+                ret = _regulator_get_voltage(rdev);
+                if (ret > 0)
+                        count += sprintf(buf + count, "at %d mV ", ret / 1000);
+        }
+        if (constraints->min_uA && constraints->max_uA) {
                if (constraints->min_uA == constraints->max_uA)
-                        count = sprintf(buf, "%d mA ",
+                        count += sprintf(buf + count, "%d mA ",
-                                        constraints->min_uA / 1000);
+                                         constraints->min_uA / 1000);
                else
-                        count = sprintf(buf, "%d <--> %d mA ",
+                        count += sprintf(buf + count, "%d <--> %d mA ",
-                                        constraints->min_uA / 1000,
+                                         constraints->min_uA / 1000,
-                                        constraints->max_uA / 1000);
+                                         constraints->max_uA / 1000);
        }
+        if (!constraints->min_uA ||
+            constraints->min_uA != constraints->max_uA) {
+                ret = _regulator_get_current_limit(rdev);
+                if (ret > 0)
+                        count += sprintf(buf + count, "at %d uA ", ret / 1000);
+        }
        if (constraints->valid_modes_mask & REGULATOR_MODE_FAST)
                count += sprintf(buf + count, "fast ");
        if (constraints->valid_modes_mask & REGULATOR_MODE_NORMAL)
@@ -669,33 +708,30 @@ static void print_constraints(struct regulator_dev *rdev)
        if (constraints->valid_modes_mask & REGULATOR_MODE_STANDBY)
                count += sprintf(buf + count, "standby");
-        printk(KERN_INFO "regulator: %s: %s\n", rdev->desc->name, buf);
+        printk(KERN_INFO "regulator: %s: %s\n", rdev_get_name(rdev), buf);
 }
-/**
+static int machine_constraints_voltage(struct regulator_dev *rdev,
- * set_machine_constraints - sets regulator constraints
- * @rdev: regulator source
- * @constraints: constraints to apply
- *
- * Allows platform initialisation code to define and constrain
- * regulator circuits e.g. valid voltage/current ranges, etc.  NOTE:
- * Constraints *must* be set by platform code in order for some
- * regulator operations to proceed i.e. set_voltage, set_current_limit,
- * set_mode.
- */
-static int set_machine_constraints(struct regulator_dev *rdev,
        struct regulation_constraints *constraints)
 {
-        int ret = 0;
-        const char *name;
        struct regulator_ops *ops = rdev->desc->ops;
+        const char *name = rdev_get_name(rdev);
+        int ret;
-        if (constraints->name)
+        /* do we need to apply the constraint voltage */
-                name = constraints->name;
+        if (rdev->constraints->apply_uV &&
-        else if (rdev->desc->name)
+                rdev->constraints->min_uV == rdev->constraints->max_uV &&
-                name = rdev->desc->name;
+                ops->set_voltage) {
-        else
+                ret = ops->set_voltage(rdev,
-                name = "regulator";
+                        rdev->constraints->min_uV, rdev->constraints->max_uV);
+                        if (ret < 0) {
+                                printk(KERN_ERR "%s: failed to apply %duV constraint to %s\n",
+                                       __func__,
+                                       rdev->constraints->min_uV, name);
+                                rdev->constraints = NULL;
+                                return ret;
+                        }
+        }
        /* constrain machine-level voltage specs to fit
         * the actual range supported by this regulator.
@@ -719,14 +755,13 @@ static int set_machine_constraints(struct regulator_dev *rdev,
                /* voltage constraints are optional */
                if ((cmin == 0) && (cmax == 0))
-                        goto out;
+                        return 0;
                /* else require explicit machine-level constraints */
                if (cmin <= 0 || cmax <= 0 || cmax < cmin) {
                        pr_err("%s: %s '%s' voltage constraints\n",
                                       __func__, "invalid", name);
-                        ret = -EINVAL;
+                        return -EINVAL;
-                        goto out;
                }
                /* initial: [cmin..cmax] valid, [min_uV..max_uV] not */
@@ -748,8 +783,7 @@ static int set_machine_constraints(struct regulator_dev *rdev,
                if (max_uV < min_uV) {
                        pr_err("%s: %s '%s' voltage constraints\n",
                                       __func__, "unsupportable", name);
-                        ret = -EINVAL;
+                        return -EINVAL;
-                        goto out;
                }
                /* use regulator's subset of machine constraints */
@@ -767,22 +801,34 @@ static int set_machine_constraints(struct regulator_dev *rdev,
                }
        }
+        return 0;
+}
+/**
+ * set_machine_constraints - sets regulator constraints
+ * @rdev: regulator source
+ * @constraints: constraints to apply
+ *
+ * Allows platform initialisation code to define and constrain
+ * regulator circuits e.g. valid voltage/current ranges, etc.  NOTE:
+ * Constraints *must* be set by platform code in order for some
+ * regulator operations to proceed i.e. set_voltage, set_current_limit,
+ * set_mode.
+ */
+static int set_machine_constraints(struct regulator_dev *rdev,
+        struct regulation_constraints *constraints)
+{
+        int ret = 0;
+        const char *name;
+        struct regulator_ops *ops = rdev->desc->ops;
        rdev->constraints = constraints;
-        /* do we need to apply the constraint voltage */
+        name = rdev_get_name(rdev);
-        if (rdev->constraints->apply_uV &&
-                rdev->constraints->min_uV == rdev->constraints->max_uV &&
+        ret = machine_constraints_voltage(rdev, constraints);
-                ops->set_voltage) {
+        if (ret != 0)
-                ret = ops->set_voltage(rdev,
+                goto out;
-                        rdev->constraints->min_uV, rdev->constraints->max_uV);
-                        if (ret < 0) {
-                                printk(KERN_ERR "%s: failed to apply %duV constraint to %s\n",
-                                       __func__,
-                                       rdev->constraints->min_uV, name);
-                                rdev->constraints = NULL;
-                                goto out;
-                        }
-        }
        /* do we need to setup our suspend state */
        if (constraints->initial_state) {
@@ -903,7 +949,7 @@ static int set_consumer_device_supply(struct regulator_dev *rdev,
                                dev_name(&node->regulator->dev),
                                node->regulator->desc->name,
                                supply,
-                                dev_name(&rdev->dev), rdev->desc->name);
+                                dev_name(&rdev->dev), rdev_get_name(rdev));
                return -EBUSY;
        }
@@ -1212,7 +1258,7 @@ static int _regulator_enable(struct regulator_dev *rdev)
                ret = _regulator_enable(rdev->supply);
                if (ret < 0) {
                        printk(KERN_ERR "%s: failed to enable %s: %d\n",
-                               __func__, rdev->desc->name, ret);
+                               __func__, rdev_get_name(rdev), ret);
                        return ret;
                }
        }
@@ -1238,7 +1284,7 @@ static int _regulator_enable(struct regulator_dev *rdev)
                        }
                } else if (ret < 0) {
                        printk(KERN_ERR "%s: is_enabled() failed for %s: %d\n",
-                               __func__, rdev->desc->name, ret);
+                               __func__, rdev_get_name(rdev), ret);
                        return ret;
                }
                /* Fallthrough on positive return values - already enabled */
@@ -1279,7 +1325,7 @@ static int _regulator_disable(struct regulator_dev *rdev)
        if (WARN(rdev->use_count <= 0,
                        "unbalanced disables for %s\n",
-                        rdev->desc->name))
+                        rdev_get_name(rdev)))
                return -EIO;
        /* are we the last user and permitted to disable ? */
@@ -1292,7 +1338,7 @@ static int _regulator_disable(struct regulator_dev *rdev)
                        ret = rdev->desc->ops->disable(rdev);
                        if (ret < 0) {
                                printk(KERN_ERR "%s: failed to disable %s\n",
-                                       __func__, rdev->desc->name);
+                                       __func__, rdev_get_name(rdev));
                                return ret;
                        }
                }
@@ -1349,7 +1395,7 @@ static int _regulator_force_disable(struct regulator_dev *rdev)
                ret = rdev->desc->ops->disable(rdev);
                if (ret < 0) {
                        printk(KERN_ERR "%s: failed to force disable %s\n",
-                               __func__, rdev->desc->name);
+                               __func__, rdev_get_name(rdev));
                        return ret;
                }
                /* notify other consumers that power has been forced off */
@@ -1766,7 +1812,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
        output_uV = rdev->desc->ops->get_voltage(rdev);
        if (output_uV <= 0) {
                printk(KERN_ERR "%s: invalid output voltage found for %s\n",
-                        __func__, rdev->desc->name);
+                        __func__, rdev_get_name(rdev));
                goto out;
        }
@@ -1777,13 +1823,13 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
                input_uV = rdev->constraints->input_uV;
        if (input_uV <= 0) {
                printk(KERN_ERR "%s: invalid input voltage found for %s\n",
-                        __func__, rdev->desc->name);
+                        __func__, rdev_get_name(rdev));
                goto out;
        }
        /* calc total requested load for this regulator */
        list_for_each_entry(consumer, &rdev->consumer_list, list)
-            total_uA_load += consumer->uA_load;
+                total_uA_load += consumer->uA_load;
        mode = rdev->desc->ops->get_optimum_mode(rdev,
                                                 input_uV, output_uV,
@@ -1791,7 +1837,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
        ret = regulator_check_mode(rdev, mode);
        if (ret < 0) {
                printk(KERN_ERR "%s: failed to get optimum mode for %s @"
-                        " %d uA %d -> %d uV\n", __func__, rdev->desc->name,
+                        " %d uA %d -> %d uV\n", __func__, rdev_get_name(rdev),
                        total_uA_load, input_uV, output_uV);
                goto out;
        }
@@ -1799,7 +1845,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load)
        ret = rdev->desc->ops->set_mode(rdev, mode);
        if (ret < 0) {
                printk(KERN_ERR "%s: failed to set optimum mode %x for %s\n",
-                        __func__, mode, rdev->desc->name);
+                        __func__, mode, rdev_get_name(rdev));
                goto out;
        }
        ret = mode;
@@ -1852,9 +1898,9 @@ static void _notifier_call_chain(struct regulator_dev *rdev,
        /* now notify regulator we supply */
        list_for_each_entry(_rdev, &rdev->supply_list, slist) {
-          mutex_lock(&_rdev->mutex);
+                mutex_lock(&_rdev->mutex);
-          _notifier_call_chain(_rdev, event, data);
+                _notifier_call_chain(_rdev, event, data);
-          mutex_unlock(&_rdev->mutex);
+                mutex_unlock(&_rdev->mutex);
        }
 }
@@ -1885,9 +1931,9 @@ int regulator_bulk_get(struct device *dev, int num_consumers,
                consumers[i].consumer = regulator_get(dev,
                                                      consumers[i].supply);
                if (IS_ERR(consumers[i].consumer)) {
-                        dev_err(dev, "Failed to get supply '%s'\n",
-                                consumers[i].supply);
                        ret = PTR_ERR(consumers[i].consumer);
+                        dev_err(dev, "Failed to get supply '%s': %d\n",
+                                consumers[i].supply, ret);
                        consumers[i].consumer = NULL;
                        goto err;
                }
@@ -1930,8 +1976,8 @@ int regulator_bulk_enable(int num_consumers,
        return 0;
 err:
-        printk(KERN_ERR "Failed to enable %s\n", consumers[i].supply);
+        printk(KERN_ERR "Failed to enable %s: %d\n", consumers[i].supply, ret);
-        for (i = 0; i < num_consumers; i++)
+        for (--i; i >= 0; --i)
                regulator_disable(consumers[i].consumer);
        return ret;
@@ -1965,8 +2011,9 @@ int regulator_bulk_disable(int num_consumers,
        return 0;
 err:
-        printk(KERN_ERR "Failed to disable %s\n", consumers[i].supply);
+        printk(KERN_ERR "Failed to disable %s: %d\n", consumers[i].supply,
-        for (i = 0; i < num_consumers; i++)
+               ret);
+        for (--i; i >= 0; --i)
                regulator_enable(consumers[i].consumer);
        return ret;
@@ -2316,7 +2363,7 @@ int regulator_suspend_prepare(suspend_state_t state)
                if (ret < 0) {
                        printk(KERN_ERR "%s: failed to prepare %s\n",
-                                __func__, rdev->desc->name);
+                                __func__, rdev_get_name(rdev));
                        goto out;
                }
        }
@@ -2429,12 +2476,7 @@ static int __init regulator_init_complete(void)
                ops = rdev->desc->ops;
                c = rdev->constraints;
-                if (c && c->name)
+                name = rdev_get_name(rdev);
-                        name = c->name;
-                else if (rdev->desc->name)
-                        name = rdev->desc->name;
-                else
-                        name = "regulator";
                if (!ops->disable || (c && c->always_on))
                        continue;
diff --git a/drivers/regulator/da903x.c b/drivers/regulator/da903x.c
index aa224d936e0d..f8c4661a7a81 100644
--- a/drivers/regulator/da903x.c
+++ b/drivers/regulator/da903x.c
@@ -331,7 +331,7 @@ static int da9034_get_ldo12_voltage(struct regulator_dev *rdev)
 static int da9034_list_ldo12_voltage(struct regulator_dev *rdev,
                                     unsigned selector)
 {
-        if (selector > ARRAY_SIZE(da9034_ldo12_data))
+        if (selector >= ARRAY_SIZE(da9034_ldo12_data))
                return -EINVAL;
        return da9034_ldo12_data[selector] * 1000;
 }
diff --git a/drivers/regulator/lp3971.c b/drivers/regulator/lp3971.c
index 7803a320543b..76d08c282f9c 100644
--- a/drivers/regulator/lp3971.c
+++ b/drivers/regulator/lp3971.c
@@ -446,8 +446,8 @@ static int setup_regulators(struct lp3971 *lp3971,
                lp3971->rdev[i] = regulator_register(&regulators[id],
                        lp3971->dev, pdata->regulators[i].initdata, lp3971);
-                err = IS_ERR(lp3971->rdev[i]);
+                if (IS_ERR(lp3971->rdev[i])) {
-                if (err) {
+                        err = PTR_ERR(lp3971->rdev[i]);
                        dev_err(lp3971->dev, "regulator init failed: %d\n",
                                err);
                        goto error;
diff --git a/drivers/regulator/max8660.c b/drivers/regulator/max8660.c
new file mode 100644
index 000000000000..acc2fb7b6087
--- /dev/null
+++ b/drivers/regulator/max8660.c
@@ -0,0 +1,510 @@
+/*
+ * max8660.c  --  Voltage regulation for the Maxim 8660/8661
+ *
+ * based on max1586.c and wm8400-regulator.c
+ *
+ * Copyright (C) 2009 Wolfram Sang, Pengutronix e.K.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the Free
+ * Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
+ * Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * Some info:
+ *
+ * Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8660-MAX8661.pdf
+ *
+ * This chip is a bit nasty because it is a write-only device. Thus, the driver
+ * uses shadow registers to keep track of its values. The main problem appears
+ * to be the initialization: When Linux boots up, we cannot know if the chip is
+ * in the default state or not, so we would have to pass such information in
+ * platform_data. As this adds a bit of complexity to the driver, this is left
+ * out for now until it is really needed.
+ *
+ * [A|S|M]DTV1 registers are currently not used, but [A|S|M]DTV2.
+ *
+ * If the driver is feature complete, it might be worth to check if one set of
+ * functions for V3-V7 is sufficient. For maximum flexibility during
+ * development, they are separated for now.
+ *
+ */
+#include <linux/module.h>
+#include <linux/err.h>
+#include <linux/i2c.h>
+#include <linux/platform_device.h>
+#include <linux/regulator/driver.h>
+#include <linux/regulator/max8660.h>
+#define MAX8660_DCDC_MIN_UV      725000
+#define MAX8660_DCDC_MAX_UV     1800000
+#define MAX8660_DCDC_STEP         25000
+#define MAX8660_DCDC_MAX_SEL    0x2b
+#define MAX8660_LDO5_MIN_UV     1700000
+#define MAX8660_LDO5_MAX_UV     2000000
+#define MAX8660_LDO5_STEP         25000
+#define MAX8660_LDO5_MAX_SEL    0x0c
+#define MAX8660_LDO67_MIN_UV    1800000
+#define MAX8660_LDO67_MAX_UV    3300000
+#define MAX8660_LDO67_STEP       100000
+#define MAX8660_LDO67_MAX_SEL   0x0f
+enum {
+        MAX8660_OVER1,
+        MAX8660_OVER2,
+        MAX8660_VCC1,
+        MAX8660_ADTV1,
+        MAX8660_ADTV2,
+        MAX8660_SDTV1,
+        MAX8660_SDTV2,
+        MAX8660_MDTV1,
+        MAX8660_MDTV2,
+        MAX8660_L12VCR,
+        MAX8660_FPWM,
+        MAX8660_N_REGS, /* not a real register */
+};
+struct max8660 {
+        struct i2c_client *client;
+        u8 shadow_regs[MAX8660_N_REGS];         /* as chip is write only */
+        struct regulator_dev *rdev[];
+};
+static int max8660_write(struct max8660 *max8660, u8 reg, u8 mask, u8 val)
+{
+        static const u8 max8660_addresses[MAX8660_N_REGS] =
+          { 0x10, 0x12, 0x20, 0x23, 0x24, 0x29, 0x2a, 0x32, 0x33, 0x39, 0x80 };
+        int ret;
+        u8 reg_val = (max8660->shadow_regs[reg] & mask) | val;
+        dev_vdbg(&max8660->client->dev, "Writing reg %02x with %02x\n",
+                        max8660_addresses[reg], reg_val);
+        ret = i2c_smbus_write_byte_data(max8660->client,
+                        max8660_addresses[reg], reg_val);
+        if (ret == 0)
+                max8660->shadow_regs[reg] = reg_val;
+        return ret;
+}
+/*
+ * DCDC functions
+ */
+static int max8660_dcdc_is_enabled(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 val = max8660->shadow_regs[MAX8660_OVER1];
+        u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
+        return !!(val & mask);
+}
+static int max8660_dcdc_enable(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 bit = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4;
+        return max8660_write(max8660, MAX8660_OVER1, 0xff, bit);
+}
+static int max8660_dcdc_disable(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? ~1 : ~4;
+        return max8660_write(max8660, MAX8660_OVER1, mask, 0);
+}
+static int max8660_dcdc_list(struct regulator_dev *rdev, unsigned selector)
+{
+        if (selector > MAX8660_DCDC_MAX_SEL)
+                return -EINVAL;
+        return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP;
+}
+static int max8660_dcdc_get(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;
+        u8 selector = max8660->shadow_regs[reg];
+        return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP;
+}
+static int max8660_dcdc_set(struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 reg, selector, bits;
+        int ret;
+        if (min_uV < MAX8660_DCDC_MIN_UV || min_uV > MAX8660_DCDC_MAX_UV)
+                return -EINVAL;
+        if (max_uV < MAX8660_DCDC_MIN_UV || max_uV > MAX8660_DCDC_MAX_UV)
+                return -EINVAL;
+        selector = (min_uV - (MAX8660_DCDC_MIN_UV - MAX8660_DCDC_STEP + 1))
+                        / MAX8660_DCDC_STEP;
+        ret = max8660_dcdc_list(rdev, selector);
+        if (ret < 0 || ret > max_uV)
+                return -EINVAL;
+        reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2;
+        ret = max8660_write(max8660, reg, 0, selector);
+        if (ret)
+                return ret;
+        /* Select target voltage register and activate regulation */
+        bits = (rdev_get_id(rdev) == MAX8660_V3) ? 0x03 : 0x30;
+        return max8660_write(max8660, MAX8660_VCC1, 0xff, bits);
+}
+static struct regulator_ops max8660_dcdc_ops = {
+        .is_enabled = max8660_dcdc_is_enabled,
+        .list_voltage = max8660_dcdc_list,
+        .set_voltage = max8660_dcdc_set,
+        .get_voltage = max8660_dcdc_get,
+};
+/*
+ * LDO5 functions
+ */
+static int max8660_ldo5_list(struct regulator_dev *rdev, unsigned selector)
+{
+        if (selector > MAX8660_LDO5_MAX_SEL)
+                return -EINVAL;
+        return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP;
+}
+static int max8660_ldo5_get(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 selector = max8660->shadow_regs[MAX8660_MDTV2];
+        return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP;
+}
+static int max8660_ldo5_set(struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 selector;
+        int ret;
+        if (min_uV < MAX8660_LDO5_MIN_UV || min_uV > MAX8660_LDO5_MAX_UV)
+                return -EINVAL;
+        if (max_uV < MAX8660_LDO5_MIN_UV || max_uV > MAX8660_LDO5_MAX_UV)
+                return -EINVAL;
+        selector = (min_uV - (MAX8660_LDO5_MIN_UV - MAX8660_LDO5_STEP + 1))
+                        / MAX8660_LDO5_STEP;
+        ret = max8660_ldo5_list(rdev, selector);
+        if (ret < 0 || ret > max_uV)
+                return -EINVAL;
+        ret = max8660_write(max8660, MAX8660_MDTV2, 0, selector);
+        if (ret)
+                return ret;
+        /* Select target voltage register and activate regulation */
+        return max8660_write(max8660, MAX8660_VCC1, 0xff, 0xc0);
+}
+static struct regulator_ops max8660_ldo5_ops = {
+        .list_voltage = max8660_ldo5_list,
+        .set_voltage = max8660_ldo5_set,
+        .get_voltage = max8660_ldo5_get,
+};
+/*
+ * LDO67 functions
+ */
+static int max8660_ldo67_is_enabled(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 val = max8660->shadow_regs[MAX8660_OVER2];
+        u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4;
+        return !!(val & mask);
+}
+static int max8660_ldo67_enable(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 bit = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4;
+        return max8660_write(max8660, MAX8660_OVER2, 0xff, bit);
+}
+static int max8660_ldo67_disable(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? ~2 : ~4;
+        return max8660_write(max8660, MAX8660_OVER2, mask, 0);
+}
+static int max8660_ldo67_list(struct regulator_dev *rdev, unsigned selector)
+{
+        if (selector > MAX8660_LDO67_MAX_SEL)
+                return -EINVAL;
+        return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP;
+}
+static int max8660_ldo67_get(struct regulator_dev *rdev)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4;
+        u8 selector = (max8660->shadow_regs[MAX8660_L12VCR] >> shift) & 0xf;
+        return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP;
+}
+static int max8660_ldo67_set(struct regulator_dev *rdev, int min_uV, int max_uV)
+{
+        struct max8660 *max8660 = rdev_get_drvdata(rdev);
+        u8 selector;
+        int ret;
+        if (min_uV < MAX8660_LDO67_MIN_UV || min_uV > MAX8660_LDO67_MAX_UV)
+                return -EINVAL;
+        if (max_uV < MAX8660_LDO67_MIN_UV || max_uV > MAX8660_LDO67_MAX_UV)
+                return -EINVAL;
+        selector = (min_uV - (MAX8660_LDO67_MIN_UV - MAX8660_LDO67_STEP + 1))
+                        / MAX8660_LDO67_STEP;
+        ret = max8660_ldo67_list(rdev, selector);
+        if (ret < 0 || ret > max_uV)
+                return -EINVAL;
+        if (rdev_get_id(rdev) == MAX8660_V6)
+                return max8660_write(max8660, MAX8660_L12VCR, 0xf0, selector);
+        else
+                return max8660_write(max8660, MAX8660_L12VCR, 0x0f, selector << 4);
+}
+static struct regulator_ops max8660_ldo67_ops = {
+        .is_enabled = max8660_ldo67_is_enabled,
+        .enable = max8660_ldo67_enable,
+        .disable = max8660_ldo67_disable,
+        .list_voltage = max8660_ldo67_list,
+        .get_voltage = max8660_ldo67_get,
+        .set_voltage = max8660_ldo67_set,
+};
+static struct regulator_desc max8660_reg[] = {
+        {
+                .name = "V3(DCDC)",
+                .id = MAX8660_V3,
+                .ops = &max8660_dcdc_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_DCDC_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+        {
+                .name = "V4(DCDC)",
+                .id = MAX8660_V4,
+                .ops = &max8660_dcdc_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_DCDC_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+        {
+                .name = "V5(LDO)",
+                .id = MAX8660_V5,
+                .ops = &max8660_ldo5_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_LDO5_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+        {
+                .name = "V6(LDO)",
+                .id = MAX8660_V6,
+                .ops = &max8660_ldo67_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_LDO67_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+        {
+                .name = "V7(LDO)",
+                .id = MAX8660_V7,
+                .ops = &max8660_ldo67_ops,
+                .type = REGULATOR_VOLTAGE,
+                .n_voltages = MAX8660_LDO67_MAX_SEL + 1,
+                .owner = THIS_MODULE,
+        },
+};
+static int max8660_probe(struct i2c_client *client,
+                              const struct i2c_device_id *i2c_id)
+{
+        struct regulator_dev **rdev;
+        struct max8660_platform_data *pdata = client->dev.platform_data;
+        struct max8660 *max8660;
+        int boot_on, i, id, ret = -EINVAL;
+        if (pdata->num_subdevs > MAX8660_V_END) {
+                dev_err(&client->dev, "Too much regulators found!\n");
+                goto out;
+        }
+        max8660 = kzalloc(sizeof(struct max8660) +
+                        sizeof(struct regulator_dev *) * MAX8660_V_END,
+                        GFP_KERNEL);
+        if (!max8660) {
+                ret = -ENOMEM;
+                goto out;
+        }
+        max8660->client = client;
+        rdev = max8660->rdev;
+        if (pdata->en34_is_high) {
+                /* Simulate always on */
+                max8660->shadow_regs[MAX8660_OVER1] = 5;
+        } else {
+                /* Otherwise devices can be toggled via software */
+                max8660_dcdc_ops.enable = max8660_dcdc_enable;
+                max8660_dcdc_ops.disable = max8660_dcdc_disable;
+        }
+        /*
+         * First, set up shadow registers to prevent glitches. As some
+         * registers are shared between regulators, everything must be properly
+         * set up for all regulators in advance.
+         */
+        max8660->shadow_regs[MAX8660_ADTV1] =
+                max8660->shadow_regs[MAX8660_ADTV2] =
+                max8660->shadow_regs[MAX8660_SDTV1] =
+                max8660->shadow_regs[MAX8660_SDTV2] = 0x1b;
+        max8660->shadow_regs[MAX8660_MDTV1] =
+                max8660->shadow_regs[MAX8660_MDTV2] = 0x04;
+        for (i = 0; i < pdata->num_subdevs; i++) {
+                if (!pdata->subdevs[i].platform_data)
+                        goto err_free;
+                boot_on = pdata->subdevs[i].platform_data->constraints.boot_on;
+                switch (pdata->subdevs[i].id) {
+                case MAX8660_V3:
+                        if (boot_on)
+                                max8660->shadow_regs[MAX8660_OVER1] |= 1;
+                        break;
+                case MAX8660_V4:
+                        if (boot_on)
+                                max8660->shadow_regs[MAX8660_OVER1] |= 4;
+                        break;
+                case MAX8660_V5:
+                        break;
+                case MAX8660_V6:
+                        if (boot_on)
+                                max8660->shadow_regs[MAX8660_OVER2] |= 2;
+                        break;
+                case MAX8660_V7:
+                        if (!strcmp(i2c_id->name, "max8661")) {
+                                dev_err(&client->dev, "Regulator not on this chip!\n");
+                                goto err_free;
+                        }
+                        if (boot_on)
+                                max8660->shadow_regs[MAX8660_OVER2] |= 4;
+                        break;
+                default:
+                        dev_err(&client->dev, "invalid regulator %s\n",
+                                 pdata->subdevs[i].name);
+                        goto err_free;
+                }
+        }
+        /* Finally register devices */
+        for (i = 0; i < pdata->num_subdevs; i++) {
+                id = pdata->subdevs[i].id;
+                rdev[i] = regulator_register(&max8660_reg[id], &client->dev,
+                                             pdata->subdevs[i].platform_data,
+                                             max8660);
+                if (IS_ERR(rdev[i])) {
+                        ret = PTR_ERR(rdev[i]);
+                        dev_err(&client->dev, "failed to register %s\n",
+                                max8660_reg[id].name);
+                        goto err_unregister;
+                }
+        }
+        i2c_set_clientdata(client, rdev);
+        dev_info(&client->dev, "Maxim 8660/8661 regulator driver loaded\n");
+        return 0;
+err_unregister:
+        while (--i >= 0)
+                regulator_unregister(rdev[i]);
+err_free:
+        kfree(max8660);
+out:
+        return ret;
+}
+static int max8660_remove(struct i2c_client *client)
+{
+        struct regulator_dev **rdev = i2c_get_clientdata(client);
+        int i;
+        for (i = 0; i < MAX8660_V_END; i++)
+                if (rdev[i])
+                        regulator_unregister(rdev[i]);
+        kfree(rdev);
+        i2c_set_clientdata(client, NULL);
+        return 0;
+}
+static const struct i2c_device_id max8660_id[] = {
+        { "max8660", 0 },
+        { "max8661", 0 },
+        { }
+};
+MODULE_DEVICE_TABLE(i2c, max8660_id);
+static struct i2c_driver max8660_driver = {
+        .probe = max8660_probe,
+        .remove = max8660_remove,
+        .driver         = {
+                .name   = "max8660",
+        },
+        .id_table       = max8660_id,
+};
+static int __init max8660_init(void)
+{
+        return i2c_add_driver(&max8660_driver);
+}
+subsys_initcall(max8660_init);
+static void __exit max8660_exit(void)
+{
+        i2c_del_driver(&max8660_driver);
+}
+module_exit(max8660_exit);
+/* Module information */
+MODULE_DESCRIPTION("MAXIM 8660/8661 voltage regulator driver");
+MODULE_AUTHOR("Wolfram Sang");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/regulator/mc13783-regulator.c b/drivers/regulator/mc13783-regulator.c
new file mode 100644
index 000000000000..39c495300045
--- /dev/null
+++ b/drivers/regulator/mc13783-regulator.c
@@ -0,0 +1,245 @@
+/*
+ * Regulator Driver for Freescale MC13783 PMIC
+ *
+ * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+#include <linux/mfd/mc13783.h>
+#include <linux/regulator/machine.h>
+#include <linux/regulator/driver.h>
+#include <linux/platform_device.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#define MC13783_REG_SWITCHERS4                  28
+#define MC13783_REG_SWITCHERS4_PLLEN                    (1 << 18)
+#define MC13783_REG_SWITCHERS5                  29
+#define MC13783_REG_SWITCHERS5_SW3EN                    (1 << 20)
+#define MC13783_REG_REGULATORMODE0              32
+#define MC13783_REG_REGULATORMODE0_VAUDIOEN             (1 << 0)
+#define MC13783_REG_REGULATORMODE0_VIOHIEN              (1 << 3)
+#define MC13783_REG_REGULATORMODE0_VIOLOEN              (1 << 6)
+#define MC13783_REG_REGULATORMODE0_VDIGEN               (1 << 9)
+#define MC13783_REG_REGULATORMODE0_VGENEN               (1 << 12)
+#define MC13783_REG_REGULATORMODE0_VRFDIGEN             (1 << 15)
+#define MC13783_REG_REGULATORMODE0_VRFREFEN             (1 << 18)
+#define MC13783_REG_REGULATORMODE0_VRFCPEN              (1 << 21)
+#define MC13783_REG_REGULATORMODE1              33
+#define MC13783_REG_REGULATORMODE1_VSIMEN               (1 << 0)
+#define MC13783_REG_REGULATORMODE1_VESIMEN              (1 << 3)
+#define MC13783_REG_REGULATORMODE1_VCAMEN               (1 << 6)
+#define MC13783_REG_REGULATORMODE1_VRFBGEN              (1 << 9)
+#define MC13783_REG_REGULATORMODE1_VVIBEN               (1 << 11)
+#define MC13783_REG_REGULATORMODE1_VRF1EN               (1 << 12)
+#define MC13783_REG_REGULATORMODE1_VRF2EN               (1 << 15)
+#define MC13783_REG_REGULATORMODE1_VMMC1EN              (1 << 18)
+#define MC13783_REG_REGULATORMODE1_VMMC2EN              (1 << 21)
+#define MC13783_REG_POWERMISC                   34
+#define MC13783_REG_POWERMISC_GPO1EN                    (1 << 6)
+#define MC13783_REG_POWERMISC_GPO2EN                    (1 << 8)
+#define MC13783_REG_POWERMISC_GPO3EN                    (1 << 10)
+#define MC13783_REG_POWERMISC_GPO4EN                    (1 << 12)
+struct mc13783_regulator {
+        struct regulator_desc desc;
+        int reg;
+        int enable_bit;
+};
+static struct regulator_ops mc13783_regulator_ops;
+#define MC13783_DEFINE(prefix, _name, _reg)                             \
+        [MC13783_ ## prefix ## _ ## _name] = {                          \
+                .desc = {                                               \
+                        .name = #prefix "_" #_name,                     \
+                        .ops = &mc13783_regulator_ops,                  \
+                        .type = REGULATOR_VOLTAGE,                      \
+                        .id = MC13783_ ## prefix ## _ ## _name,         \
+                        .owner = THIS_MODULE,                           \
+                },                                                      \
+                .reg = MC13783_REG_ ## _reg,                            \
+                .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \
+        }
+#define MC13783_DEFINE_SW(_name, _reg) MC13783_DEFINE(SW, _name, _reg)
+#define MC13783_DEFINE_REGU(_name, _reg) MC13783_DEFINE(REGU, _name, _reg)
+static struct mc13783_regulator mc13783_regulators[] = {
+        MC13783_DEFINE_SW(SW3, SWITCHERS5),
+        MC13783_DEFINE_SW(PLL, SWITCHERS4),
+        MC13783_DEFINE_REGU(VAUDIO, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VIOHI, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VDIG, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VGEN, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0),
+        MC13783_DEFINE_REGU(VSIM, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VESIM, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VCAM, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VRFBG, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VVIB, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VRF1, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VRF2, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1),
+        MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1),
+        MC13783_DEFINE_REGU(GPO1, POWERMISC),
+        MC13783_DEFINE_REGU(GPO2, POWERMISC),
+        MC13783_DEFINE_REGU(GPO3, POWERMISC),
+        MC13783_DEFINE_REGU(GPO4, POWERMISC),
+};
+struct mc13783_regulator_priv {
+        struct mc13783 *mc13783;
+        struct regulator_dev *regulators[];
+};
+static int mc13783_regulator_enable(struct regulator_dev *rdev)
+{
+        struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
+        int id = rdev_get_id(rdev);
+        int ret;
+        dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
+        mc13783_lock(priv->mc13783);
+        ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg,
+                        mc13783_regulators[id].enable_bit,
+                        mc13783_regulators[id].enable_bit);
+        mc13783_unlock(priv->mc13783);
+        return ret;
+}
+static int mc13783_regulator_disable(struct regulator_dev *rdev)
+{
+        struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
+        int id = rdev_get_id(rdev);
+        int ret;
+        dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
+        mc13783_lock(priv->mc13783);
+        ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg,
+                        mc13783_regulators[id].enable_bit, 0);
+        mc13783_unlock(priv->mc13783);
+        return ret;
+}
+static int mc13783_regulator_is_enabled(struct regulator_dev *rdev)
+{
+        struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev);
+        int ret, id = rdev_get_id(rdev);
+        unsigned int val;
+        mc13783_lock(priv->mc13783);
+        ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
+        mc13783_unlock(priv->mc13783);
+        if (ret)
+                return ret;
+        return (val & mc13783_regulators[id].enable_bit) != 0;
+}
+static struct regulator_ops mc13783_regulator_ops = {
+        .enable = mc13783_regulator_enable,
+        .disable = mc13783_regulator_disable,
+        .is_enabled = mc13783_regulator_is_enabled,
+};
+static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
+{
+        struct mc13783_regulator_priv *priv;
+        struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent);
+        struct mc13783_regulator_platform_data *pdata =
+                dev_get_platdata(&pdev->dev);
+        struct mc13783_regulator_init_data *init_data;
+        int i, ret;
+        dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
+        priv = kzalloc(sizeof(*priv) +
+                        pdata->num_regulators * sizeof(priv->regulators[0]),
+                        GFP_KERNEL);
+        if (!priv)
+                return -ENOMEM;
+        priv->mc13783 = mc13783;
+        for (i = 0; i < pdata->num_regulators; i++) {
+                init_data = &pdata->regulators[i];
+                priv->regulators[i] = regulator_register(
+                                &mc13783_regulators[init_data->id].desc,
+                                &pdev->dev, init_data->init_data, priv);
+                if (IS_ERR(priv->regulators[i])) {
+                        dev_err(&pdev->dev, "failed to register regulator %s\n",
+                                mc13783_regulators[i].desc.name);
+                        ret = PTR_ERR(priv->regulators[i]);
+                        goto err;
+                }
+        }
+        platform_set_drvdata(pdev, priv);
+        return 0;
+err:
+        while (--i >= 0)
+                regulator_unregister(priv->regulators[i]);
+        kfree(priv);
+        return ret;
+}
+static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
+{
+        struct mc13783_regulator_priv *priv = platform_get_drvdata(pdev);
+        struct mc13783_regulator_platform_data *pdata =
+                dev_get_platdata(&pdev->dev);
+        int i;
+        for (i = 0; i < pdata->num_regulators; i++)
+                regulator_unregister(priv->regulators[i]);
+        return 0;
+}
+static struct platform_driver mc13783_regulator_driver = {
+        .driver = {
+                .name   = "mc13783-regulator",
+                .owner  = THIS_MODULE,
+        },
+        .remove         = __devexit_p(mc13783_regulator_remove),
+        .probe          = mc13783_regulator_probe,
+};
+static int __init mc13783_regulator_init(void)
+{
+        return platform_driver_register(&mc13783_regulator_driver);
+}
+subsys_initcall(mc13783_regulator_init);
+static void __exit mc13783_regulator_exit(void)
+{
+        platform_driver_unregister(&mc13783_regulator_driver);
+}
+module_exit(mc13783_regulator_exit);
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
+MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
+MODULE_ALIAS("platform:mc13783-regulator");
diff --git a/drivers/regulator/mc13783.c b/drivers/regulator/mc13783.c
deleted file mode 100644
index 710211f67449..000000000000
--- a/drivers/regulator/mc13783.c
+++ /dev/null
@@ -1,410 +0,0 @@
-/*
- * Regulator Driver for Freescale MC13783 PMIC
- *
- * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include <linux/mfd/mc13783-private.h>
-#include <linux/regulator/machine.h>
-#include <linux/regulator/driver.h>
-#include <linux/platform_device.h>
-#include <linux/mfd/mc13783.h>
-#include <linux/kernel.h>
-#include <linux/init.h>
-#include <linux/err.h>
-struct mc13783_regulator {
-        struct regulator_desc desc;
-        int reg;
-        int enable_bit;
-};
-static struct regulator_ops mc13783_regulator_ops;
-static struct mc13783_regulator mc13783_regulators[] = {
-        [MC13783_SW_SW3] = {
-                .desc = {
-                        .name   = "SW_SW3",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_SW_SW3,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_SWITCHERS_5,
-                .enable_bit = MC13783_SWCTRL_SW3_EN,
-        },
-        [MC13783_SW_PLL] = {
-                .desc = {
-                        .name   = "SW_PLL",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_SW_PLL,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_SWITCHERS_4,
-                .enable_bit = MC13783_SWCTRL_PLL_EN,
-        },
-        [MC13783_REGU_VAUDIO] = {
-                .desc = {
-                        .name   = "REGU_VAUDIO",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VAUDIO,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VAUDIO_EN,
-        },
-        [MC13783_REGU_VIOHI] = {
-                .desc = {
-                        .name   = "REGU_VIOHI",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VIOHI,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VIOHI_EN,
-        },
-        [MC13783_REGU_VIOLO] = {
-                .desc = {
-                        .name   = "REGU_VIOLO",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VIOLO,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VIOLO_EN,
-        },
-        [MC13783_REGU_VDIG] = {
-                .desc = {
-                        .name   = "REGU_VDIG",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VDIG,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VDIG_EN,
-        },
-        [MC13783_REGU_VGEN] = {
-                .desc = {
-                        .name   = "REGU_VGEN",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VGEN,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VGEN_EN,
-        },
-        [MC13783_REGU_VRFDIG] = {
-                .desc = {
-                        .name   = "REGU_VRFDIG",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRFDIG,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VRFDIG_EN,
-        },
-        [MC13783_REGU_VRFREF] = {
-                .desc = {
-                        .name   = "REGU_VRFREF",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRFREF,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VRFREF_EN,
-        },
-        [MC13783_REGU_VRFCP] = {
-                .desc = {
-                        .name   = "REGU_VRFCP",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRFCP,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_0,
-                .enable_bit = MC13783_REGCTRL_VRFCP_EN,
-        },
-        [MC13783_REGU_VSIM] = {
-                .desc = {
-                        .name   = "REGU_VSIM",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VSIM,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VSIM_EN,
-        },
-        [MC13783_REGU_VESIM] = {
-                .desc = {
-                        .name   = "REGU_VESIM",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VESIM,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VESIM_EN,
-        },
-        [MC13783_REGU_VCAM] = {
-                .desc = {
-                        .name   = "REGU_VCAM",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VCAM,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VCAM_EN,
-        },
-        [MC13783_REGU_VRFBG] = {
-                .desc = {
-                        .name   = "REGU_VRFBG",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRFBG,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VRFBG_EN,
-        },
-        [MC13783_REGU_VVIB] = {
-                .desc = {
-                        .name   = "REGU_VVIB",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VVIB,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VVIB_EN,
-        },
-        [MC13783_REGU_VRF1] = {
-                .desc = {
-                        .name   = "REGU_VRF1",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRF1,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VRF1_EN,
-        },
-        [MC13783_REGU_VRF2] = {
-                .desc = {
-                        .name   = "REGU_VRF2",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VRF2,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VRF2_EN,
-        },
-        [MC13783_REGU_VMMC1] = {
-                .desc = {
-                        .name   = "REGU_VMMC1",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VMMC1,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VMMC1_EN,
-        },
-        [MC13783_REGU_VMMC2] = {
-                .desc = {
-                        .name   = "REGU_VMMC2",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_VMMC2,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_REGULATOR_MODE_1,
-                .enable_bit = MC13783_REGCTRL_VMMC2_EN,
-        },
-        [MC13783_REGU_GPO1] = {
-                .desc = {
-                        .name   = "REGU_GPO1",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_GPO1,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_POWER_MISCELLANEOUS,
-                .enable_bit = MC13783_REGCTRL_GPO1_EN,
-        },
-        [MC13783_REGU_GPO2] = {
-                .desc = {
-                        .name   = "REGU_GPO2",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_GPO2,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_POWER_MISCELLANEOUS,
-                .enable_bit = MC13783_REGCTRL_GPO2_EN,
-        },
-        [MC13783_REGU_GPO3] = {
-                .desc = {
-                        .name   = "REGU_GPO3",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_GPO3,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_POWER_MISCELLANEOUS,
-                .enable_bit = MC13783_REGCTRL_GPO3_EN,
-        },
-        [MC13783_REGU_GPO4] = {
-                .desc = {
-                        .name   = "REGU_GPO4",
-                        .ops    = &mc13783_regulator_ops,
-                        .type   = REGULATOR_VOLTAGE,
-                        .id     = MC13783_REGU_GPO4,
-                        .owner  = THIS_MODULE,
-                },
-                .reg = MC13783_REG_POWER_MISCELLANEOUS,
-                .enable_bit = MC13783_REGCTRL_GPO4_EN,
-        },
-};
-struct mc13783_priv {
-        struct regulator_desc desc[ARRAY_SIZE(mc13783_regulators)];
-        struct mc13783 *mc13783;
-        struct regulator_dev *regulators[0];
-};
-static int mc13783_enable(struct regulator_dev *rdev)
-{
-        struct mc13783_priv *priv = rdev_get_drvdata(rdev);
-        int id = rdev_get_id(rdev);
-        dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
-        return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
-                        mc13783_regulators[id].enable_bit,
-                        mc13783_regulators[id].enable_bit);
-}
-static int mc13783_disable(struct regulator_dev *rdev)
-{
-        struct mc13783_priv *priv = rdev_get_drvdata(rdev);
-        int id = rdev_get_id(rdev);
-        dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id);
-        return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg,
-                        mc13783_regulators[id].enable_bit, 0);
-}
-static int mc13783_is_enabled(struct regulator_dev *rdev)
-{
-        struct mc13783_priv *priv = rdev_get_drvdata(rdev);
-        int ret, id = rdev_get_id(rdev);
-        unsigned int val;
-        ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val);
-        if (ret)
-                return ret;
-        return (val & mc13783_regulators[id].enable_bit) != 0;
-}
-static struct regulator_ops mc13783_regulator_ops = {
-        .enable         = mc13783_enable,
-        .disable        = mc13783_disable,
-        .is_enabled     = mc13783_is_enabled,
-};
-static int __devinit mc13783_regulator_probe(struct platform_device *pdev)
-{
-        struct mc13783_priv *priv;
-        struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent);
-        struct mc13783_regulator_init_data *init_data;
-        int i, ret;
-        dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id);
-        priv = kzalloc(sizeof(*priv) + mc13783->num_regulators * sizeof(void *),
-                        GFP_KERNEL);
-        if (!priv)
-                return -ENOMEM;
-        priv->mc13783 = mc13783;
-        for (i = 0; i < mc13783->num_regulators; i++) {
-                init_data = &mc13783->regulators[i];
-                priv->regulators[i] = regulator_register(
-                                &mc13783_regulators[init_data->id].desc,
-                                &pdev->dev, init_data->init_data, priv);
-                if (IS_ERR(priv->regulators[i])) {
-                        dev_err(&pdev->dev, "failed to register regulator %s\n",
-                                mc13783_regulators[i].desc.name);
-                        ret = PTR_ERR(priv->regulators[i]);
-                        goto err;
-                }
-        }
-        platform_set_drvdata(pdev, priv);
-        return 0;
-err:
-        while (--i >= 0)
-                regulator_unregister(priv->regulators[i]);
-        kfree(priv);
-        return ret;
-}
-static int __devexit mc13783_regulator_remove(struct platform_device *pdev)
-{
-        struct mc13783_priv *priv = platform_get_drvdata(pdev);
-        struct mc13783 *mc13783 = priv->mc13783;
-        int i;
-        for (i = 0; i < mc13783->num_regulators; i++)
-                regulator_unregister(priv->regulators[i]);
-        return 0;
-}
-static struct platform_driver mc13783_regulator_driver = {
-        .driver = {
-                .name   = "mc13783-regulator",
-                .owner  = THIS_MODULE,
-        },
-        .remove         = __devexit_p(mc13783_regulator_remove),
-};
-static int __init mc13783_regulator_init(void)
-{
-        return platform_driver_probe(&mc13783_regulator_driver,
-                        mc13783_regulator_probe);
-}
-subsys_initcall(mc13783_regulator_init);
-static void __exit mc13783_regulator_exit(void)
-{
-        platform_driver_unregister(&mc13783_regulator_driver);
-}
-module_exit(mc13783_regulator_exit);
-MODULE_LICENSE("GPL");
-MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de");
-MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC");
-MODULE_ALIAS("platform:mc13783-regulator");
diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c
index 7ea1c3a31081..7e674859bd59 100644
--- a/drivers/regulator/twl-regulator.c
+++ b/drivers/regulator/twl-regulator.c
@@ -12,6 +12,7 @@
 #include <linux/module.h>
 #include <linux/init.h>
 #include <linux/err.h>
+#include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/regulator/driver.h>
 #include <linux/regulator/machine.h>
@@ -40,6 +41,12 @@ struct twlreg_info {
        u8                      table_len;
        const u16               *table;
+        /* regulator specific turn-on delay */
+        u16                     delay;
+        /* State REMAP default configuration */
+        u8                      remap;
        /* chip constraints on regulator behavior */
        u16                     min_mV;
@@ -128,6 +135,7 @@ static int twlreg_enable(struct regulator_dev *rdev)
 {
        struct twlreg_info      *info = rdev_get_drvdata(rdev);
        int                     grp;
+        int                     ret;
        grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP);
        if (grp < 0)
@@ -138,7 +146,11 @@ static int twlreg_enable(struct regulator_dev *rdev)
        else
                grp |= P1_GRP_6030;
-        return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
+        ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
+        udelay(info->delay);
+        return ret;
 }
 static int twlreg_disable(struct regulator_dev *rdev)
@@ -151,9 +163,9 @@ static int twlreg_disable(struct regulator_dev *rdev)
                return grp;
        if (twl_class_is_4030())
-                grp &= ~P1_GRP_4030;
+                grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030);
        else
-                grp &= ~P1_GRP_6030;
+                grp &= ~(P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030);
        return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp);
 }
@@ -294,6 +306,18 @@ static const u16 VSIM_VSEL_table[] = {
 static const u16 VDAC_VSEL_table[] = {
        1200, 1300, 1800, 1800,
 };
+static const u16 VDD1_VSEL_table[] = {
+        800, 1450,
+};
+static const u16 VDD2_VSEL_table[] = {
+        800, 1450, 1500,
+};
+static const u16 VIO_VSEL_table[] = {
+        1800, 1850,
+};
+static const u16 VINTANA2_VSEL_table[] = {
+        2500, 2750,
+};
 static const u16 VAUX1_6030_VSEL_table[] = {
        1000, 1300, 1800, 2500,
        2800, 2900, 3000, 3000,
@@ -414,20 +438,30 @@ static struct regulator_ops twlfixed_ops = {
 /*----------------------------------------------------------------------*/
-#define TWL4030_ADJUSTABLE_LDO(label, offset, num) \
+#define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \
-                TWL_ADJUSTABLE_LDO(label, offset, num, TWL4030)
+                TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
-#define TWL4030_FIXED_LDO(label, offset, mVolts, num) \
+                        remap_conf, TWL4030)
-                TWL_FIXED_LDO(label, offset, mVolts, num, TWL4030)
+#define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
-#define TWL6030_ADJUSTABLE_LDO(label, offset, num) \
+                        remap_conf) \
-                TWL_ADJUSTABLE_LDO(label, offset, num, TWL6030)
+                TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
-#define TWL6030_FIXED_LDO(label, offset, mVolts, num) \
+                        remap_conf, TWL4030)
-                TWL_FIXED_LDO(label, offset, mVolts, num, TWL6030)
+#define TWL6030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
+                        remap_conf) \
-#define TWL_ADJUSTABLE_LDO(label, offset, num, family) { \
+                TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \
+                        remap_conf, TWL6030)
+#define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
+                        remap_conf) \
+                TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \
+                        remap_conf, TWL6030)
+#define TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf, \
+                family) { \
        .base = offset, \
        .id = num, \
        .table_len = ARRAY_SIZE(label##_VSEL_table), \
        .table = label##_VSEL_table, \
+        .delay = turnon_delay, \
+        .remap = remap_conf, \
        .desc = { \
                .name = #label, \
                .id = family##_REG_##label, \
@@ -438,10 +472,13 @@ static struct regulator_ops twlfixed_ops = {
                }, \
        }
-#define TWL_FIXED_LDO(label, offset, mVolts, num, family) { \
+#define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \
+                family) { \
        .base = offset, \
        .id = num, \
        .min_mV = mVolts, \
+        .delay = turnon_delay, \
+        .remap = remap_conf, \
        .desc = { \
                .name = #label, \
                .id = family##_REG_##label, \
@@ -457,43 +494,41 @@ static struct regulator_ops twlfixed_ops = {
 * software control over them after boot.
 */
 static struct twlreg_info twl_regs[] = {
-        TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1),
+        TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2),
+        TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2),
+        TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3),
+        TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4),
+        TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5),
+        TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6),
+        TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08),
-        /*
+        TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00),
-        TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7),
+        TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08),
-        */
+        TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00),
-        TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8),
+        TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9),
+        TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10),
+        TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08),
-        /*
+        TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VINTANA1, 0x3f, 11),
+        TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12),
+        TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08),
-        TWL4030_ADJUSTABLE_LDO(VINTDIG, 0x47, 13),
+        TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08),
-        TWL4030_SMPS(VIO, 0x4b, 14),
+        TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08),
-        TWL4030_SMPS(VDD1, 0x55, 15),
+        TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08),
-        TWL4030_SMPS(VDD2, 0x63, 16),
+        TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08),
-         */
-        TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17),
-        TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18),
-        TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19),
        /* VUSBCP is managed *only* by the USB subchip */
        /* 6030 REG with base as PMC Slave Misc : 0x0030 */
-        TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1),
+        /* Turnon-delay and remap configuration values for 6030 are not
-        TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2),
+           verified since the specification is not public */
-        TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3),
+        TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1, 0, 0x08),
-        TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4),
+        TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2, 0, 0x08),
-        TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5),
+        TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3, 0, 0x08),
-        TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7),
+        TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4, 0, 0x08),
-        TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15),
+        TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5, 0, 0x08),
-        TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16),
+        TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7, 0, 0x08),
-        TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17),
+        TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x08),
-        TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18)
+        TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x08),
+        TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x08),
+        TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x08)
 };
 static int twlreg_probe(struct platform_device *pdev)
@@ -525,6 +560,19 @@ static int twlreg_probe(struct platform_device *pdev)
        c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE
                                | REGULATOR_CHANGE_MODE
                                | REGULATOR_CHANGE_STATUS;
+        switch (pdev->id) {
+        case TWL4030_REG_VIO:
+        case TWL4030_REG_VDD1:
+        case TWL4030_REG_VDD2:
+        case TWL4030_REG_VPLL1:
+        case TWL4030_REG_VINTANA1:
+        case TWL4030_REG_VINTANA2:
+        case TWL4030_REG_VINTDIG:
+                c->always_on = true;
+                break;
+        default:
+                break;
+        }
        rdev = regulator_register(&info->desc, &pdev->dev, initdata, info);
        if (IS_ERR(rdev)) {
@@ -534,6 +582,9 @@ static int twlreg_probe(struct platform_device *pdev)
        }
        platform_set_drvdata(pdev, rdev);
+        twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP,
+                                                info->remap);
        /* NOTE:  many regulators support short-circuit IRQs (presentable
         * as REGULATOR_OVER_CURRENT notifications?) configured via:
         *  - SC_CONFIG
diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c
index 2eefc1a0cf08..0a6577577e8d 100644
--- a/drivers/regulator/wm831x-dcdc.c
+++ b/drivers/regulator/wm831x-dcdc.c
@@ -19,6 +19,8 @@
 #include <linux/i2c.h>
 #include <linux/platform_device.h>
 #include <linux/regulator/driver.h>
+#include <linux/regulator/machine.h>
+#include <linux/gpio.h>
 #include <linux/mfd/wm831x/core.h>
 #include <linux/mfd/wm831x/regulator.h>
@@ -39,6 +41,7 @@
 #define WM831X_DCDC_CONTROL_2     1
 #define WM831X_DCDC_ON_CONFIG     2
 #define WM831X_DCDC_SLEEP_CONTROL 3
+#define WM831X_DCDC_DVS_CONTROL   4
 /*
 * Shared
@@ -50,6 +53,10 @@ struct wm831x_dcdc {
        int base;
        struct wm831x *wm831x;
        struct regulator_dev *regulator;
+        int dvs_gpio;
+        int dvs_gpio_state;
+        int on_vsel;
+        int dvs_vsel;
 };
 static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev)
@@ -240,11 +247,9 @@ static int wm831x_buckv_list_voltage(struct regulator_dev *rdev,
        return -EINVAL;
 }
-static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg,
+static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev,
-                                         int min_uV, int max_uV)
+                                           int min_uV, int max_uV)
 {
-        struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
-        struct wm831x *wm831x = dcdc->wm831x;
        u16 vsel;
        if (min_uV < 600000)
@@ -257,39 +262,126 @@ static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg,
        if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV)
                return -EINVAL;
-        return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_VSEL_MASK, vsel);
+        return vsel;
+}
+static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev,
+                                           int min_uV, int max_uV)
+{
+        u16 vsel;
+        if (max_uV < 600000 || max_uV > 1800000)
+                return -EINVAL;
+        vsel = ((max_uV - 600000) / 12500) + 8;
+        if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV ||
+            wm831x_buckv_list_voltage(rdev, vsel) < max_uV)
+                return -EINVAL;
+        return vsel;
+}
+static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state)
+{
+        struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
+        if (state == dcdc->dvs_gpio_state)
+                return 0;
+        dcdc->dvs_gpio_state = state;
+        gpio_set_value(dcdc->dvs_gpio, state);
+        /* Should wait for DVS state change to be asserted if we have
+         * a GPIO for it, for now assume the device is configured
+         * for the fastest possible transition.
+         */
+        return 0;
 }
 static int wm831x_buckv_set_voltage(struct regulator_dev *rdev,
-                                     int min_uV, int max_uV)
+                                    int min_uV, int max_uV)
 {
        struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
-        u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
+        struct wm831x *wm831x = dcdc->wm831x;
+        int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
+        int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL;
+        int vsel, ret;
+        vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV);
+        if (vsel < 0)
+                return vsel;
+        /* If this value is already set then do a GPIO update if we can */
+        if (dcdc->dvs_gpio && dcdc->on_vsel == vsel)
+                return wm831x_buckv_set_dvs(rdev, 0);
+        if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel)
+                return wm831x_buckv_set_dvs(rdev, 1);
+        /* Always set the ON status to the minimum voltage */
+        ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel);
+        if (ret < 0)
+                return ret;
+        dcdc->on_vsel = vsel;
+        if (!dcdc->dvs_gpio)
+                return ret;
+        /* Kick the voltage transition now */
+        ret = wm831x_buckv_set_dvs(rdev, 0);
+        if (ret < 0)
+                return ret;
+        /* Set the high voltage as the DVS voltage.  This is optimised
+         * for CPUfreq usage, most processors will keep the maximum
+         * voltage constant and lower the minimum with the frequency. */
+        vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV);
+        if (vsel < 0) {
+                /* This should never happen - at worst the same vsel
+                 * should be chosen */
+                WARN_ON(vsel < 0);
+                return 0;
+        }
+        /* Don't bother if it's the same VSEL we're already using */
+        if (vsel == dcdc->on_vsel)
+                return 0;
-        return wm831x_buckv_set_voltage_int(rdev, reg, min_uV, max_uV);
+        ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel);
+        if (ret == 0)
+                dcdc->dvs_vsel = vsel;
+        else
+                dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n",
+                         ret);
+        return 0;
 }
 static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev,
-                                             int uV)
+                                            int uV)
 {
        struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
+        struct wm831x *wm831x = dcdc->wm831x;
        u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL;
+        int vsel;
+        vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV);
+        if (vsel < 0)
+                return vsel;
-        return wm831x_buckv_set_voltage_int(rdev, reg, uV, uV);
+        return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel);
 }
 static int wm831x_buckv_get_voltage(struct regulator_dev *rdev)
 {
        struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev);
-        struct wm831x *wm831x = dcdc->wm831x;
-        u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG;
-        int val;
-        val = wm831x_reg_read(wm831x, reg);
+        if (dcdc->dvs_gpio && dcdc->dvs_gpio_state)
-        if (val < 0)
+                return wm831x_buckv_list_voltage(rdev, dcdc->dvs_vsel);
-                return val;
+        else
+                return wm831x_buckv_list_voltage(rdev, dcdc->on_vsel);
-        return wm831x_buckv_list_voltage(rdev, val & WM831X_DC1_ON_VSEL_MASK);
 }
 /* Current limit options */
@@ -346,6 +438,64 @@ static struct regulator_ops wm831x_buckv_ops = {
        .set_suspend_mode = wm831x_dcdc_set_suspend_mode,
 };
+/*
+ * Set up DVS control.  We just log errors since we can still run
+ * (with reduced performance) if we fail.
+ */
+static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc,
+                                            struct wm831x_buckv_pdata *pdata)
+{
+        struct wm831x *wm831x = dcdc->wm831x;
+        int ret;
+        u16 ctrl;
+        if (!pdata || !pdata->dvs_gpio)
+                return;
+        switch (pdata->dvs_control_src) {
+        case 1:
+                ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT;
+                break;
+        case 2:
+                ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT;
+                break;
+        default:
+                dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n",
+                        pdata->dvs_control_src, dcdc->name);
+                return;
+        }
+        ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL,
+                              WM831X_DC1_DVS_SRC_MASK, ctrl);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n",
+                        dcdc->name, ret);
+                return;
+        }
+        ret = gpio_request(pdata->dvs_gpio, "DCDC DVS");
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n",
+                        dcdc->name, ret);
+                return;
+        }
+        /* gpiolib won't let us read the GPIO status so pick the higher
+         * of the two existing voltages so we take it as platform data.
+         */
+        dcdc->dvs_gpio_state = pdata->dvs_init_state;
+        ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n",
+                        dcdc->name, ret);
+                gpio_free(pdata->dvs_gpio);
+                return;
+        }
+        dcdc->dvs_gpio = pdata->dvs_gpio;
+}
 static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
 {
        struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent);
@@ -384,6 +534,23 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev)
        dcdc->desc.ops = &wm831x_buckv_ops;
        dcdc->desc.owner = THIS_MODULE;
+        ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret);
+                goto err;
+        }
+        dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK;
+        ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG);
+        if (ret < 0) {
+                dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret);
+                goto err;
+        }
+        dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK;
+        if (pdata->dcdc[id])
+                wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data);
        dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev,
                                             pdata->dcdc[id], dcdc);
        if (IS_ERR(dcdc->regulator)) {
@@ -422,6 +589,8 @@ err_uv:
 err_regulator:
        regulator_unregister(dcdc->regulator);
 err:
+        if (dcdc->dvs_gpio)
+                gpio_free(dcdc->dvs_gpio);
        kfree(dcdc);
        return ret;
 }
@@ -434,6 +603,8 @@ static __devexit int wm831x_buckv_remove(struct platform_device *pdev)
        wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc);
        wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc);
        regulator_unregister(dcdc->regulator);
+        if (dcdc->dvs_gpio)
+                gpio_free(dcdc->dvs_gpio);
        kfree(dcdc);
        return 0;
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c
index 902db56ce099..61e02ac2fda3 100644
--- a/drivers/regulator/wm831x-ldo.c
+++ b/drivers/regulator/wm831x-ldo.c
@@ -470,7 +470,7 @@ static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev)
        struct wm831x_ldo *ldo = rdev_get_drvdata(rdev);
        struct wm831x *wm831x = ldo->wm831x;
        int on_reg = ldo->base + WM831X_LDO_ON_CONTROL;
-        unsigned int ret;
+        int ret;
        ret = wm831x_reg_read(wm831x, on_reg);
        if (ret < 0)
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c
index 259db7f3535b..9630e7d3314e 100644
--- a/drivers/rtc/rtc-ds1305.c
+++ b/drivers/rtc/rtc-ds1305.c
@@ -778,6 +778,8 @@ static int __devinit ds1305_probe(struct spi_device *spi)
                                        spi->irq, status);
                        goto fail1;
                }
+                device_set_wakeup_capable(&spi->dev, 1);
        }
        /* export NVRAM */
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c
index 8a99da6f2f24..c4ec5c158aa1 100644
--- a/drivers/rtc/rtc-ds1307.c
+++ b/drivers/rtc/rtc-ds1307.c
@@ -881,6 +881,8 @@ read_rtc:
                                "unable to request IRQ!\n");
                        goto exit_irq;
                }
+                device_set_wakeup_capable(&client->dev, 1);
                set_bit(HAS_ALARM, &ds1307->flags);
                dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
        }
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c
index 713f7bf5afb3..5317bbcbc7a0 100644
--- a/drivers/rtc/rtc-ds1374.c
+++ b/drivers/rtc/rtc-ds1374.c
@@ -383,6 +383,8 @@ static int ds1374_probe(struct i2c_client *client,
                        dev_err(&client->dev, "unable to request IRQ\n");
                        goto out_free;
                }
+                device_set_wakeup_capable(&client->dev, 1);
        }
        ds1374->rtc = rtc_device_register(client->name, &client->dev,
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 2d9d70359360..f55eb0107336 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -216,6 +216,17 @@ config SPI_S3C24XX
        help
          SPI driver for Samsung S3C24XX series ARM SoCs
+config SPI_S3C24XX_FIQ
+        bool "S3C24XX driver with FIQ pseudo-DMA"
+        depends on SPI_S3C24XX
+        select FIQ
+        help
+          Enable FIQ support for the S3C24XX SPI driver to provide pseudo
+          DMA by using the fast-interrupt request framework, This allows
+          the driver to get DMA-like performance when there are either
+          no free DMA channels, or when doing transfers that required both
+          TX and RX data paths.
 config SPI_S3C24XX_GPIO
        tristate "Samsung S3C24XX series SPI by GPIO"
        depends on ARCH_S3C2410 && EXPERIMENTAL
@@ -226,6 +237,13 @@ config SPI_S3C24XX_GPIO
          the inbuilt hardware cannot provide the transfer mode, or
          where the board is using non hardware connected pins.
+config SPI_S3C64XX
+        tristate "Samsung S3C64XX series type SPI"
+        depends on ARCH_S3C64XX && EXPERIMENTAL
+        select S3C64XX_DMA
+        help
+          SPI driver for Samsung S3C64XX and newer SoCs.
 config SPI_SH_MSIOF
        tristate "SuperH MSIOF SPI controller"
        depends on SUPERH && HAVE_CLK
@@ -289,6 +307,16 @@ config SPI_NUC900
 # Add new SPI master controllers in alphabetical order above this line
 #
+config SPI_DESIGNWARE
+        bool "DesignWare SPI controller core support"
+        depends on SPI_MASTER
+        help
+          general driver for SPI controller core from DesignWare
+config SPI_DW_PCI
+        tristate "PCI interface driver for DW SPI core"
+        depends on SPI_DESIGNWARE && PCI
 #
 # There are lots of SPI device types, with sensors and memory
 # being probably the most widely used ones.
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index ed8c1675b52f..f3d2810ba11c 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -16,6 +16,8 @@ obj-$(CONFIG_SPI_BFIN)			+= spi_bfin5xx.o
 obj-$(CONFIG_SPI_BITBANG)               += spi_bitbang.o
 obj-$(CONFIG_SPI_AU1550)                += au1550_spi.o
 obj-$(CONFIG_SPI_BUTTERFLY)             += spi_butterfly.o
+obj-$(CONFIG_SPI_DESIGNWARE)            += dw_spi.o
+obj-$(CONFIG_SPI_DW_PCI)                += dw_spi_pci.o
 obj-$(CONFIG_SPI_GPIO)                  += spi_gpio.o
 obj-$(CONFIG_SPI_IMX)                   += spi_imx.o
 obj-$(CONFIG_SPI_LM70_LLP)              += spi_lm70llp.o
@@ -30,7 +32,8 @@ obj-$(CONFIG_SPI_MPC52xx)		+= mpc52xx_spi.o
 obj-$(CONFIG_SPI_MPC8xxx)               += spi_mpc8xxx.o
 obj-$(CONFIG_SPI_PPC4xx)                += spi_ppc4xx.o
 obj-$(CONFIG_SPI_S3C24XX_GPIO)          += spi_s3c24xx_gpio.o
-obj-$(CONFIG_SPI_S3C24XX)               += spi_s3c24xx.o
+obj-$(CONFIG_SPI_S3C24XX)               += spi_s3c24xx_hw.o
+obj-$(CONFIG_SPI_S3C64XX)               += spi_s3c64xx.o
 obj-$(CONFIG_SPI_TXX9)                  += spi_txx9.o
 obj-$(CONFIG_SPI_XILINX)                += xilinx_spi.o
 obj-$(CONFIG_SPI_XILINX_OF)             += xilinx_spi_of.o
@@ -39,6 +42,11 @@ obj-$(CONFIG_SPI_SH_SCI)		+= spi_sh_sci.o
 obj-$(CONFIG_SPI_SH_MSIOF)              += spi_sh_msiof.o
 obj-$(CONFIG_SPI_STMP3XXX)              += spi_stmp.o
 obj-$(CONFIG_SPI_NUC900)                += spi_nuc900.o
+# special build for s3c24xx spi driver with fiq support
+spi_s3c24xx_hw-y                        := spi_s3c24xx.o
+spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi_s3c24xx_fiq.o
 #       ... add above this line ...
 # SPI protocol drivers (device/link on bus)
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c
index f5b3fdbb1e27..d21c24eaf0a9 100644
--- a/drivers/spi/atmel_spi.c
+++ b/drivers/spi/atmel_spi.c
@@ -189,14 +189,14 @@ static void atmel_spi_next_xfer_data(struct spi_master *master,
        /* use scratch buffer only when rx or tx data is unspecified */
        if (xfer->rx_buf)
-                *rx_dma = xfer->rx_dma + xfer->len - len;
+                *rx_dma = xfer->rx_dma + xfer->len - *plen;
        else {
                *rx_dma = as->buffer_dma;
                if (len > BUFFER_SIZE)
                        len = BUFFER_SIZE;
        }
        if (xfer->tx_buf)
-                *tx_dma = xfer->tx_dma + xfer->len - len;
+                *tx_dma = xfer->tx_dma + xfer->len - *plen;
        else {
                *tx_dma = as->buffer_dma;
                if (len > BUFFER_SIZE)
@@ -788,7 +788,7 @@ static int __init atmel_spi_probe(struct platform_device *pdev)
        spin_lock_init(&as->lock);
        INIT_LIST_HEAD(&as->queue);
        as->pdev = pdev;
-        as->regs = ioremap(regs->start, (regs->end - regs->start) + 1);
+        as->regs = ioremap(regs->start, resource_size(regs));
        if (!as->regs)
                goto out_free_buffer;
        as->irq = irq;
diff --git a/drivers/spi/dw_spi.c b/drivers/spi/dw_spi.c
new file mode 100644
index 000000000000..31620fae77be
--- /dev/null
+++ b/drivers/spi/dw_spi.c
@@ -0,0 +1,944 @@
+/*
+ * dw_spi.c - Designware SPI core controller driver (refer pxa2xx_spi.c)
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program; if not, write to the Free Software Foundation, Inc.,
+ * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#include <linux/dma-mapping.h>
+#include <linux/interrupt.h>
+#include <linux/highmem.h>
+#include <linux/delay.h>
+#include <linux/spi/dw_spi.h>
+#include <linux/spi/spi.h>
+#ifdef CONFIG_DEBUG_FS
+#include <linux/debugfs.h>
+#endif
+#define START_STATE     ((void *)0)
+#define RUNNING_STATE   ((void *)1)
+#define DONE_STATE      ((void *)2)
+#define ERROR_STATE     ((void *)-1)
+#define QUEUE_RUNNING   0
+#define QUEUE_STOPPED   1
+#define MRST_SPI_DEASSERT       0
+#define MRST_SPI_ASSERT         1
+/* Slave spi_dev related */
+struct chip_data {
+        u16 cr0;
+        u8 cs;                  /* chip select pin */
+        u8 n_bytes;             /* current is a 1/2/4 byte op */
+        u8 tmode;               /* TR/TO/RO/EEPROM */
+        u8 type;                /* SPI/SSP/MicroWire */
+        u8 poll_mode;           /* 1 means use poll mode */
+        u32 dma_width;
+        u32 rx_threshold;
+        u32 tx_threshold;
+        u8 enable_dma;
+        u8 bits_per_word;
+        u16 clk_div;            /* baud rate divider */
+        u32 speed_hz;           /* baud rate */
+        int (*write)(struct dw_spi *dws);
+        int (*read)(struct dw_spi *dws);
+        void (*cs_control)(u32 command);
+};
+#ifdef CONFIG_DEBUG_FS
+static int spi_show_regs_open(struct inode *inode, struct file *file)
+{
+        file->private_data = inode->i_private;
+        return 0;
+}
+#define SPI_REGS_BUFSIZE        1024
+static ssize_t  spi_show_regs(struct file *file, char __user *user_buf,
+                                size_t count, loff_t *ppos)
+{
+        struct dw_spi *dws;
+        char *buf;
+        u32 len = 0;
+        ssize_t ret;
+        dws = file->private_data;
+        buf = kzalloc(SPI_REGS_BUFSIZE, GFP_KERNEL);
+        if (!buf)
+                return 0;
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "MRST SPI0 registers:\n");
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "=================================\n");
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "CTRL0: \t\t0x%08x\n", dw_readl(dws, ctrl0));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "CTRL1: \t\t0x%08x\n", dw_readl(dws, ctrl1));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "SSIENR: \t0x%08x\n", dw_readl(dws, ssienr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "SER: \t\t0x%08x\n", dw_readl(dws, ser));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "BAUDR: \t\t0x%08x\n", dw_readl(dws, baudr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "TXFTLR: \t0x%08x\n", dw_readl(dws, txfltr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "RXFTLR: \t0x%08x\n", dw_readl(dws, rxfltr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "TXFLR: \t\t0x%08x\n", dw_readl(dws, txflr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "RXFLR: \t\t0x%08x\n", dw_readl(dws, rxflr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "SR: \t\t0x%08x\n", dw_readl(dws, sr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "IMR: \t\t0x%08x\n", dw_readl(dws, imr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "ISR: \t\t0x%08x\n", dw_readl(dws, isr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "DMACR: \t\t0x%08x\n", dw_readl(dws, dmacr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "DMATDLR: \t0x%08x\n", dw_readl(dws, dmatdlr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "DMARDLR: \t0x%08x\n", dw_readl(dws, dmardlr));
+        len += snprintf(buf + len, SPI_REGS_BUFSIZE - len,
+                        "=================================\n");
+        ret =  simple_read_from_buffer(user_buf, count, ppos, buf, len);
+        kfree(buf);
+        return ret;
+}
+static const struct file_operations mrst_spi_regs_ops = {
+        .owner          = THIS_MODULE,
+        .open           = spi_show_regs_open,
+        .read           = spi_show_regs,
+};
+static int mrst_spi_debugfs_init(struct dw_spi *dws)
+{
+        dws->debugfs = debugfs_create_dir("mrst_spi", NULL);
+        if (!dws->debugfs)
+                return -ENOMEM;
+        debugfs_create_file("registers", S_IFREG | S_IRUGO,
+                dws->debugfs, (void *)dws, &mrst_spi_regs_ops);
+        return 0;
+}
+static void mrst_spi_debugfs_remove(struct dw_spi *dws)
+{
+        if (dws->debugfs)
+                debugfs_remove_recursive(dws->debugfs);
+}
+#else
+static inline int mrst_spi_debugfs_init(struct dw_spi *dws)
+{
+}
+static inline void mrst_spi_debugfs_remove(struct dw_spi *dws)
+{
+}
+#endif /* CONFIG_DEBUG_FS */
+static void wait_till_not_busy(struct dw_spi *dws)
+{
+        unsigned long end = jiffies + usecs_to_jiffies(1000);
+        while (time_before(jiffies, end)) {
+                if (!(dw_readw(dws, sr) & SR_BUSY))
+                        return;
+        }
+        dev_err(&dws->master->dev,
+                "DW SPI: Stutus keeps busy for 1000us after a read/write!\n");
+}
+static void flush(struct dw_spi *dws)
+{
+        while (dw_readw(dws, sr) & SR_RF_NOT_EMPT)
+                dw_readw(dws, dr);
+        wait_till_not_busy(dws);
+}
+static void null_cs_control(u32 command)
+{
+}
+static int null_writer(struct dw_spi *dws)
+{
+        u8 n_bytes = dws->n_bytes;
+        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
+                || (dws->tx == dws->tx_end))
+                return 0;
+        dw_writew(dws, dr, 0);
+        dws->tx += n_bytes;
+        wait_till_not_busy(dws);
+        return 1;
+}
+static int null_reader(struct dw_spi *dws)
+{
+        u8 n_bytes = dws->n_bytes;
+        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
+                && (dws->rx < dws->rx_end)) {
+                dw_readw(dws, dr);
+                dws->rx += n_bytes;
+        }
+        wait_till_not_busy(dws);
+        return dws->rx == dws->rx_end;
+}
+static int u8_writer(struct dw_spi *dws)
+{
+        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
+                || (dws->tx == dws->tx_end))
+                return 0;
+        dw_writew(dws, dr, *(u8 *)(dws->tx));
+        ++dws->tx;
+        wait_till_not_busy(dws);
+        return 1;
+}
+static int u8_reader(struct dw_spi *dws)
+{
+        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
+                && (dws->rx < dws->rx_end)) {
+                *(u8 *)(dws->rx) = dw_readw(dws, dr);
+                ++dws->rx;
+        }
+        wait_till_not_busy(dws);
+        return dws->rx == dws->rx_end;
+}
+static int u16_writer(struct dw_spi *dws)
+{
+        if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL)
+                || (dws->tx == dws->tx_end))
+                return 0;
+        dw_writew(dws, dr, *(u16 *)(dws->tx));
+        dws->tx += 2;
+        wait_till_not_busy(dws);
+        return 1;
+}
+static int u16_reader(struct dw_spi *dws)
+{
+        u16 temp;
+        while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT)
+                && (dws->rx < dws->rx_end)) {
+                temp = dw_readw(dws, dr);
+                *(u16 *)(dws->rx) = temp;
+                dws->rx += 2;
+        }
+        wait_till_not_busy(dws);
+        return dws->rx == dws->rx_end;
+}
+static void *next_transfer(struct dw_spi *dws)
+{
+        struct spi_message *msg = dws->cur_msg;
+        struct spi_transfer *trans = dws->cur_transfer;
+        /* Move to next transfer */
+        if (trans->transfer_list.next != &msg->transfers) {
+                dws->cur_transfer =
+                        list_entry(trans->transfer_list.next,
+                                        struct spi_transfer,
+                                        transfer_list);
+                return RUNNING_STATE;
+        } else
+                return DONE_STATE;
+}
+/*
+ * Note: first step is the protocol driver prepares
+ * a dma-capable memory, and this func just need translate
+ * the virt addr to physical
+ */
+static int map_dma_buffers(struct dw_spi *dws)
+{
+        if (!dws->cur_msg->is_dma_mapped || !dws->dma_inited
+                || !dws->cur_chip->enable_dma)
+                return 0;
+        if (dws->cur_transfer->tx_dma)
+                dws->tx_dma = dws->cur_transfer->tx_dma;
+        if (dws->cur_transfer->rx_dma)
+                dws->rx_dma = dws->cur_transfer->rx_dma;
+        return 1;
+}
+/* Caller already set message->status; dma and pio irqs are blocked */
+static void giveback(struct dw_spi *dws)
+{
+        struct spi_transfer *last_transfer;
+        unsigned long flags;
+        struct spi_message *msg;
+        spin_lock_irqsave(&dws->lock, flags);
+        msg = dws->cur_msg;
+        dws->cur_msg = NULL;
+        dws->cur_transfer = NULL;
+        dws->prev_chip = dws->cur_chip;
+        dws->cur_chip = NULL;
+        dws->dma_mapped = 0;
+        queue_work(dws->workqueue, &dws->pump_messages);
+        spin_unlock_irqrestore(&dws->lock, flags);
+        last_transfer = list_entry(msg->transfers.prev,
+                                        struct spi_transfer,
+                                        transfer_list);
+        if (!last_transfer->cs_change)
+                dws->cs_control(MRST_SPI_DEASSERT);
+        msg->state = NULL;
+        if (msg->complete)
+                msg->complete(msg->context);
+}
+static void int_error_stop(struct dw_spi *dws, const char *msg)
+{
+        /* Stop and reset hw */
+        flush(dws);
+        spi_enable_chip(dws, 0);
+        dev_err(&dws->master->dev, "%s\n", msg);
+        dws->cur_msg->state = ERROR_STATE;
+        tasklet_schedule(&dws->pump_transfers);
+}
+static void transfer_complete(struct dw_spi *dws)
+{
+        /* Update total byte transfered return count actual bytes read */
+        dws->cur_msg->actual_length += dws->len;
+        /* Move to next transfer */
+        dws->cur_msg->state = next_transfer(dws);
+        /* Handle end of message */
+        if (dws->cur_msg->state == DONE_STATE) {
+                dws->cur_msg->status = 0;
+                giveback(dws);
+        } else
+                tasklet_schedule(&dws->pump_transfers);
+}
+static irqreturn_t interrupt_transfer(struct dw_spi *dws)
+{
+        u16 irq_status, irq_mask = 0x3f;
+        irq_status = dw_readw(dws, isr) & irq_mask;
+        /* Error handling */
+        if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) {
+                dw_readw(dws, txoicr);
+                dw_readw(dws, rxoicr);
+                dw_readw(dws, rxuicr);
+                int_error_stop(dws, "interrupt_transfer: fifo overrun");
+                return IRQ_HANDLED;
+        }
+        /* INT comes from tx */
+        if (dws->tx && (irq_status & SPI_INT_TXEI)) {
+                while (dws->tx < dws->tx_end)
+                        dws->write(dws);
+                if (dws->tx == dws->tx_end) {
+                        spi_mask_intr(dws, SPI_INT_TXEI);
+                        transfer_complete(dws);
+                }
+        }
+        /* INT comes from rx */
+        if (dws->rx && (irq_status & SPI_INT_RXFI)) {
+                if (dws->read(dws))
+                        transfer_complete(dws);
+        }
+        return IRQ_HANDLED;
+}
+static irqreturn_t dw_spi_irq(int irq, void *dev_id)
+{
+        struct dw_spi *dws = dev_id;
+        if (!dws->cur_msg) {
+                spi_mask_intr(dws, SPI_INT_TXEI);
+                /* Never fail */
+                return IRQ_HANDLED;
+        }
+        return dws->transfer_handler(dws);
+}
+/* Must be called inside pump_transfers() */
+static void poll_transfer(struct dw_spi *dws)
+{
+        if (dws->tx) {
+                while (dws->write(dws))
+                        dws->read(dws);
+        }
+        dws->read(dws);
+        transfer_complete(dws);
+}
+static void dma_transfer(struct dw_spi *dws, int cs_change)
+{
+}
+static void pump_transfers(unsigned long data)
+{
+        struct dw_spi *dws = (struct dw_spi *)data;
+        struct spi_message *message = NULL;
+        struct spi_transfer *transfer = NULL;
+        struct spi_transfer *previous = NULL;
+        struct spi_device *spi = NULL;
+        struct chip_data *chip = NULL;
+        u8 bits = 0;
+        u8 imask = 0;
+        u8 cs_change = 0;
+        u16 clk_div = 0;
+        u32 speed = 0;
+        u32 cr0 = 0;
+        /* Get current state information */
+        message = dws->cur_msg;
+        transfer = dws->cur_transfer;
+        chip = dws->cur_chip;
+        spi = message->spi;
+        if (message->state == ERROR_STATE) {
+                message->status = -EIO;
+                goto early_exit;
+        }
+        /* Handle end of message */
+        if (message->state == DONE_STATE) {
+                message->status = 0;
+                goto early_exit;
+        }
+        /* Delay if requested at end of transfer*/
+        if (message->state == RUNNING_STATE) {
+                previous = list_entry(transfer->transfer_list.prev,
+                                        struct spi_transfer,
+                                        transfer_list);
+                if (previous->delay_usecs)
+                        udelay(previous->delay_usecs);
+        }
+        dws->n_bytes = chip->n_bytes;
+        dws->dma_width = chip->dma_width;
+        dws->cs_control = chip->cs_control;
+        dws->rx_dma = transfer->rx_dma;
+        dws->tx_dma = transfer->tx_dma;
+        dws->tx = (void *)transfer->tx_buf;
+        dws->tx_end = dws->tx + transfer->len;
+        dws->rx = transfer->rx_buf;
+        dws->rx_end = dws->rx + transfer->len;
+        dws->write = dws->tx ? chip->write : null_writer;
+        dws->read = dws->rx ? chip->read : null_reader;
+        dws->cs_change = transfer->cs_change;
+        dws->len = dws->cur_transfer->len;
+        if (chip != dws->prev_chip)
+                cs_change = 1;
+        cr0 = chip->cr0;
+        /* Handle per transfer options for bpw and speed */
+        if (transfer->speed_hz) {
+                speed = chip->speed_hz;
+                if (transfer->speed_hz != speed) {
+                        speed = transfer->speed_hz;
+                        if (speed > dws->max_freq) {
+                                printk(KERN_ERR "MRST SPI0: unsupported"
+                                        "freq: %dHz\n", speed);
+                                message->status = -EIO;
+                                goto early_exit;
+                        }
+                        /* clk_div doesn't support odd number */
+                        clk_div = dws->max_freq / speed;
+                        clk_div = (clk_div >> 1) << 1;
+                        chip->speed_hz = speed;
+                        chip->clk_div = clk_div;
+                }
+        }
+        if (transfer->bits_per_word) {
+                bits = transfer->bits_per_word;
+                switch (bits) {
+                case 8:
+                        dws->n_bytes = 1;
+                        dws->dma_width = 1;
+                        dws->read = (dws->read != null_reader) ?
+                                        u8_reader : null_reader;
+                        dws->write = (dws->write != null_writer) ?
+                                        u8_writer : null_writer;
+                        break;
+                case 16:
+                        dws->n_bytes = 2;
+                        dws->dma_width = 2;
+                        dws->read = (dws->read != null_reader) ?
+                                        u16_reader : null_reader;
+                        dws->write = (dws->write != null_writer) ?
+                                        u16_writer : null_writer;
+                        break;
+                default:
+                        printk(KERN_ERR "MRST SPI0: unsupported bits:"
+                                "%db\n", bits);
+                        message->status = -EIO;
+                        goto early_exit;
+                }
+                cr0 = (bits - 1)
+                        | (chip->type << SPI_FRF_OFFSET)
+                        | (spi->mode << SPI_MODE_OFFSET)
+                        | (chip->tmode << SPI_TMOD_OFFSET);
+        }
+        message->state = RUNNING_STATE;
+        /* Check if current transfer is a DMA transaction */
+        dws->dma_mapped = map_dma_buffers(dws);
+        if (!dws->dma_mapped && !chip->poll_mode) {
+                if (dws->rx)
+                        imask |= SPI_INT_RXFI;
+                if (dws->tx)
+                        imask |= SPI_INT_TXEI;
+                dws->transfer_handler = interrupt_transfer;
+        }
+        /*
+         * Reprogram registers only if
+         *      1. chip select changes
+         *      2. clk_div is changed
+         *      3. control value changes
+         */
+        if (dw_readw(dws, ctrl0) != cr0 || cs_change || clk_div) {
+                spi_enable_chip(dws, 0);
+                if (dw_readw(dws, ctrl0) != cr0)
+                        dw_writew(dws, ctrl0, cr0);
+                /* Set the interrupt mask, for poll mode just diable all int */
+                spi_mask_intr(dws, 0xff);
+                if (!chip->poll_mode)
+                        spi_umask_intr(dws, imask);
+                spi_set_clk(dws, clk_div ? clk_div : chip->clk_div);
+                spi_chip_sel(dws, spi->chip_select);
+                spi_enable_chip(dws, 1);
+                if (cs_change)
+                        dws->prev_chip = chip;
+        }
+        if (dws->dma_mapped)
+                dma_transfer(dws, cs_change);
+        if (chip->poll_mode)
+                poll_transfer(dws);
+        return;
+early_exit:
+        giveback(dws);
+        return;
+}
+static void pump_messages(struct work_struct *work)
+{
+        struct dw_spi *dws =
+                container_of(work, struct dw_spi, pump_messages);
+        unsigned long flags;
+        /* Lock queue and check for queue work */
+        spin_lock_irqsave(&dws->lock, flags);
+        if (list_empty(&dws->queue) || dws->run == QUEUE_STOPPED) {
+                dws->busy = 0;
+                spin_unlock_irqrestore(&dws->lock, flags);
+                return;
+        }
+        /* Make sure we are not already running a message */
+        if (dws->cur_msg) {
+                spin_unlock_irqrestore(&dws->lock, flags);
+                return;
+        }
+        /* Extract head of queue */
+        dws->cur_msg = list_entry(dws->queue.next, struct spi_message, queue);
+        list_del_init(&dws->cur_msg->queue);
+        /* Initial message state*/
+        dws->cur_msg->state = START_STATE;
+        dws->cur_transfer = list_entry(dws->cur_msg->transfers.next,
+                                                struct spi_transfer,
+                                                transfer_list);
+        dws->cur_chip = spi_get_ctldata(dws->cur_msg->spi);
+        /* Mark as busy and launch transfers */
+        tasklet_schedule(&dws->pump_transfers);
+        dws->busy = 1;
+        spin_unlock_irqrestore(&dws->lock, flags);
+}
+/* spi_device use this to queue in their spi_msg */
+static int dw_spi_transfer(struct spi_device *spi, struct spi_message *msg)
+{
+        struct dw_spi *dws = spi_master_get_devdata(spi->master);
+        unsigned long flags;
+        spin_lock_irqsave(&dws->lock, flags);
+        if (dws->run == QUEUE_STOPPED) {
+                spin_unlock_irqrestore(&dws->lock, flags);
+                return -ESHUTDOWN;
+        }
+        msg->actual_length = 0;
+        msg->status = -EINPROGRESS;
+        msg->state = START_STATE;
+        list_add_tail(&msg->queue, &dws->queue);
+        if (dws->run == QUEUE_RUNNING && !dws->busy) {
+                if (dws->cur_transfer || dws->cur_msg)
+                        queue_work(dws->workqueue,
+                                        &dws->pump_messages);
+                else {
+                        /* If no other data transaction in air, just go */
+                        spin_unlock_irqrestore(&dws->lock, flags);
+                        pump_messages(&dws->pump_messages);
+                        return 0;
+                }
+        }
+        spin_unlock_irqrestore(&dws->lock, flags);
+        return 0;
+}
+/* This may be called twice for each spi dev */
+static int dw_spi_setup(struct spi_device *spi)
+{
+        struct dw_spi_chip *chip_info = NULL;
+        struct chip_data *chip;
+        if (spi->bits_per_word != 8 && spi->bits_per_word != 16)
+                return -EINVAL;
+        /* Only alloc on first setup */
+        chip = spi_get_ctldata(spi);
+        if (!chip) {
+                chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL);
+                if (!chip)
+                        return -ENOMEM;
+                chip->cs_control = null_cs_control;
+                chip->enable_dma = 0;
+        }
+        /*
+         * Protocol drivers may change the chip settings, so...
+         * if chip_info exists, use it
+         */
+        chip_info = spi->controller_data;
+        /* chip_info doesn't always exist */
+        if (chip_info) {
+                if (chip_info->cs_control)
+                        chip->cs_control = chip_info->cs_control;
+                chip->poll_mode = chip_info->poll_mode;
+                chip->type = chip_info->type;
+                chip->rx_threshold = 0;
+                chip->tx_threshold = 0;
+                chip->enable_dma = chip_info->enable_dma;
+        }
+        if (spi->bits_per_word <= 8) {
+                chip->n_bytes = 1;
+                chip->dma_width = 1;
+                chip->read = u8_reader;
+                chip->write = u8_writer;
+        } else if (spi->bits_per_word <= 16) {
+                chip->n_bytes = 2;
+                chip->dma_width = 2;
+                chip->read = u16_reader;
+                chip->write = u16_writer;
+        } else {
+                /* Never take >16b case for MRST SPIC */
+                dev_err(&spi->dev, "invalid wordsize\n");
+                return -EINVAL;
+        }
+        chip->bits_per_word = spi->bits_per_word;
+        chip->speed_hz = spi->max_speed_hz;
+        if (chip->speed_hz)
+                chip->clk_div = 25000000 / chip->speed_hz;
+        else
+                chip->clk_div = 8;      /* default value */
+        chip->tmode = 0; /* Tx & Rx */
+        /* Default SPI mode is SCPOL = 0, SCPH = 0 */
+        chip->cr0 = (chip->bits_per_word - 1)
+                        | (chip->type << SPI_FRF_OFFSET)
+                        | (spi->mode  << SPI_MODE_OFFSET)
+                        | (chip->tmode << SPI_TMOD_OFFSET);
+        spi_set_ctldata(spi, chip);
+        return 0;
+}
+static void dw_spi_cleanup(struct spi_device *spi)
+{
+        struct chip_data *chip = spi_get_ctldata(spi);
+        kfree(chip);
+}
+static int __init init_queue(struct dw_spi *dws)
+{
+        INIT_LIST_HEAD(&dws->queue);
+        spin_lock_init(&dws->lock);
+        dws->run = QUEUE_STOPPED;
+        dws->busy = 0;
+        tasklet_init(&dws->pump_transfers,
+                        pump_transfers, (unsigned long)dws);
+        INIT_WORK(&dws->pump_messages, pump_messages);
+        dws->workqueue = create_singlethread_workqueue(
+                                        dev_name(dws->master->dev.parent));
+        if (dws->workqueue == NULL)
+                return -EBUSY;
+        return 0;
+}
+static int start_queue(struct dw_spi *dws)
+{
+        unsigned long flags;
+        spin_lock_irqsave(&dws->lock, flags);
+        if (dws->run == QUEUE_RUNNING || dws->busy) {
+                spin_unlock_irqrestore(&dws->lock, flags);
+                return -EBUSY;
+        }
+        dws->run = QUEUE_RUNNING;
+        dws->cur_msg = NULL;
+        dws->cur_transfer = NULL;
+        dws->cur_chip = NULL;
+        dws->prev_chip = NULL;
+        spin_unlock_irqrestore(&dws->lock, flags);
+        queue_work(dws->workqueue, &dws->pump_messages);
+        return 0;
+}
+static int stop_queue(struct dw_spi *dws)
+{
+        unsigned long flags;
+        unsigned limit = 50;
+        int status = 0;
+        spin_lock_irqsave(&dws->lock, flags);
+        dws->run = QUEUE_STOPPED;
+        while (!list_empty(&dws->queue) && dws->busy && limit--) {
+                spin_unlock_irqrestore(&dws->lock, flags);
+                msleep(10);
+                spin_lock_irqsave(&dws->lock, flags);
+        }
+        if (!list_empty(&dws->queue) || dws->busy)
+                status = -EBUSY;
+        spin_unlock_irqrestore(&dws->lock, flags);
+        return status;
+}
+static int destroy_queue(struct dw_spi *dws)
+{
+        int status;
+        status = stop_queue(dws);
+        if (status != 0)
+                return status;
+        destroy_workqueue(dws->workqueue);
+        return 0;
+}
+/* Restart the controller, disable all interrupts, clean rx fifo */
+static void spi_hw_init(struct dw_spi *dws)
+{
+        spi_enable_chip(dws, 0);
+        spi_mask_intr(dws, 0xff);
+        spi_enable_chip(dws, 1);
+        flush(dws);
+}
+int __devinit dw_spi_add_host(struct dw_spi *dws)
+{
+        struct spi_master *master;
+        int ret;
+        BUG_ON(dws == NULL);
+        master = spi_alloc_master(dws->parent_dev, 0);
+        if (!master) {
+                ret = -ENOMEM;
+                goto exit;
+        }
+        dws->master = master;
+        dws->type = SSI_MOTO_SPI;
+        dws->prev_chip = NULL;
+        dws->dma_inited = 0;
+        dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60);
+        ret = request_irq(dws->irq, dw_spi_irq, 0,
+                        "dw_spi", dws);
+        if (ret < 0) {
+                dev_err(&master->dev, "can not get IRQ\n");
+                goto err_free_master;
+        }
+        master->mode_bits = SPI_CPOL | SPI_CPHA;
+        master->bus_num = dws->bus_num;
+        master->num_chipselect = dws->num_cs;
+        master->cleanup = dw_spi_cleanup;
+        master->setup = dw_spi_setup;
+        master->transfer = dw_spi_transfer;
+        dws->dma_inited = 0;
+        /* Basic HW init */
+        spi_hw_init(dws);
+        /* Initial and start queue */
+        ret = init_queue(dws);
+        if (ret) {
+                dev_err(&master->dev, "problem initializing queue\n");
+                goto err_diable_hw;
+        }
+        ret = start_queue(dws);
+        if (ret) {
+                dev_err(&master->dev, "problem starting queue\n");
+                goto err_diable_hw;
+        }
+        spi_master_set_devdata(master, dws);
+        ret = spi_register_master(master);
+        if (ret) {
+                dev_err(&master->dev, "problem registering spi master\n");
+                goto err_queue_alloc;
+        }
+        mrst_spi_debugfs_init(dws);
+        return 0;
+err_queue_alloc:
+        destroy_queue(dws);
+err_diable_hw:
+        spi_enable_chip(dws, 0);
+        free_irq(dws->irq, dws);
+err_free_master:
+        spi_master_put(master);
+exit:
+        return ret;
+}
+EXPORT_SYMBOL(dw_spi_add_host);
+void __devexit dw_spi_remove_host(struct dw_spi *dws)
+{
+        int status = 0;
+        if (!dws)
+                return;
+        mrst_spi_debugfs_remove(dws);
+        /* Remove the queue */
+        status = destroy_queue(dws);
+        if (status != 0)
+                dev_err(&dws->master->dev, "dw_spi_remove: workqueue will not "
+                        "complete, message memory not freed\n");
+        spi_enable_chip(dws, 0);
+        /* Disable clk */
+        spi_set_clk(dws, 0);
+        free_irq(dws->irq, dws);
+        /* Disconnect from the SPI framework */
+        spi_unregister_master(dws->master);
+}
+int dw_spi_suspend_host(struct dw_spi *dws)
+{
+        int ret = 0;
+        ret = stop_queue(dws);
+        if (ret)
+                return ret;
+        spi_enable_chip(dws, 0);
+        spi_set_clk(dws, 0);
+        return ret;
+}
+EXPORT_SYMBOL(dw_spi_suspend_host);
+int dw_spi_resume_host(struct dw_spi *dws)
+{
+        int ret;
+        spi_hw_init(dws);
+        ret = start_queue(dws);
+        if (ret)
+                dev_err(&dws->master->dev, "fail to start queue (%d)\n", ret);
+        return ret;
+}
+EXPORT_SYMBOL(dw_spi_resume_host);
+MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
+MODULE_DESCRIPTION("Driver for DesignWare SPI controller core");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/spi/dw_spi_pci.c b/drivers/spi/dw_spi_pci.c
new file mode 100644
index 000000000000..34ba69161734
--- /dev/null
+++ b/drivers/spi/dw_spi_pci.c
@@ -0,0 +1,169 @@
+/*
+ * mrst_spi_pci.c - PCI interface driver for DW SPI Core
+ *
+ * Copyright (c) 2009, Intel Corporation.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation,
+ * Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
+ */
+#include <linux/interrupt.h>
+#include <linux/pci.h>
+#include <linux/spi/dw_spi.h>
+#include <linux/spi/spi.h>
+#define DRIVER_NAME "dw_spi_pci"
+struct dw_spi_pci {
+        struct pci_dev          *pdev;
+        struct dw_spi           dws;
+};
+static int __devinit spi_pci_probe(struct pci_dev *pdev,
+        const struct pci_device_id *ent)
+{
+        struct dw_spi_pci *dwpci;
+        struct dw_spi *dws;
+        int pci_bar = 0;
+        int ret;
+        printk(KERN_INFO "DW: found PCI SPI controller(ID: %04x:%04x)\n",
+                pdev->vendor, pdev->device);
+        ret = pci_enable_device(pdev);
+        if (ret)
+                return ret;
+        dwpci = kzalloc(sizeof(struct dw_spi_pci), GFP_KERNEL);
+        if (!dwpci) {
+                ret = -ENOMEM;
+                goto err_disable;
+        }
+        dwpci->pdev = pdev;
+        dws = &dwpci->dws;
+        /* Get basic io resource and map it */
+        dws->paddr = pci_resource_start(pdev, pci_bar);
+        dws->iolen = pci_resource_len(pdev, pci_bar);
+        ret = pci_request_region(pdev, pci_bar, dev_name(&pdev->dev));
+        if (ret)
+                goto err_kfree;
+        dws->regs = ioremap_nocache((unsigned long)dws->paddr,
+                                pci_resource_len(pdev, pci_bar));
+        if (!dws->regs) {
+                ret = -ENOMEM;
+                goto err_release_reg;
+        }
+        dws->parent_dev = &pdev->dev;
+        dws->bus_num = 0;
+        dws->num_cs = 4;
+        dws->max_freq = 25000000;       /* for Moorestwon */
+        dws->irq = pdev->irq;
+        ret = dw_spi_add_host(dws);
+        if (ret)
+                goto err_unmap;
+        /* PCI hook and SPI hook use the same drv data */
+        pci_set_drvdata(pdev, dwpci);
+        return 0;
+err_unmap:
+        iounmap(dws->regs);
+err_release_reg:
+        pci_release_region(pdev, pci_bar);
+err_kfree:
+        kfree(dwpci);
+err_disable:
+        pci_disable_device(pdev);
+        return ret;
+}
+static void __devexit spi_pci_remove(struct pci_dev *pdev)
+{
+        struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
+        pci_set_drvdata(pdev, NULL);
+        iounmap(dwpci->dws.regs);
+        pci_release_region(pdev, 0);
+        kfree(dwpci);
+        pci_disable_device(pdev);
+}
+#ifdef CONFIG_PM
+static int spi_suspend(struct pci_dev *pdev, pm_message_t state)
+{
+        struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
+        int ret;
+        ret = dw_spi_suspend_host(&dwpci->dws);
+        if (ret)
+                return ret;
+        pci_save_state(pdev);
+        pci_disable_device(pdev);
+        pci_set_power_state(pdev, pci_choose_state(pdev, state));
+        return ret;
+}
+static int spi_resume(struct pci_dev *pdev)
+{
+        struct dw_spi_pci *dwpci = pci_get_drvdata(pdev);
+        int ret;
+        pci_set_power_state(pdev, PCI_D0);
+        pci_restore_state(pdev);
+        ret = pci_enable_device(pdev);
+        if (ret)
+                return ret;
+        return dw_spi_resume_host(&dwpci->dws);
+}
+#else
+#define spi_suspend     NULL
+#define spi_resume      NULL
+#endif
+static const struct pci_device_id pci_ids[] __devinitdata = {
+        /* Intel Moorestown platform SPI controller 0 */
+        { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0800) },
+        {},
+};
+static struct pci_driver dw_spi_driver = {
+        .name =         DRIVER_NAME,
+        .id_table =     pci_ids,
+        .probe =        spi_pci_probe,
+        .remove =       __devexit_p(spi_pci_remove),
+        .suspend =      spi_suspend,
+        .resume =       spi_resume,
+};
+static int __init mrst_spi_init(void)
+{
+        return pci_register_driver(&dw_spi_driver);
+}
+static void __exit mrst_spi_exit(void)
+{
+        pci_unregister_driver(&dw_spi_driver);
+}
+module_init(mrst_spi_init);
+module_exit(mrst_spi_exit);
+MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>");
+MODULE_DESCRIPTION("PCI interface driver for DW SPI Core");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c
index 73e24ef5a2f9..1d41058bbab2 100644
--- a/drivers/spi/spi_bfin5xx.c
+++ b/drivers/spi/spi_bfin5xx.c
@@ -1294,7 +1294,7 @@ static int __init bfin_spi_probe(struct platform_device *pdev)
                goto out_error_get_res;
        }
-        drv_data->regs_base = ioremap(res->start, (res->end - res->start + 1));
+        drv_data->regs_base = ioremap(res->start, resource_size(res));
        if (drv_data->regs_base == NULL) {
                dev_err(dev, "Cannot map IO\n");
                status = -ENXIO;
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c
index e9390d747bfc..1fb2a6ea328c 100644
--- a/drivers/spi/spi_mpc8xxx.c
+++ b/drivers/spi/spi_mpc8xxx.c
@@ -1013,7 +1013,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq)
        init_completion(&mpc8xxx_spi->done);
-        mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1);
+        mpc8xxx_spi->base = ioremap(mem->start, resource_size(mem));
        if (mpc8xxx_spi->base == NULL) {
                ret = -ENOMEM;
                goto err_ioremap;
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c
index 276591569c8b..c010733877ae 100644
--- a/drivers/spi/spi_s3c24xx.c
+++ b/drivers/spi/spi_s3c24xx.c
@@ -1,7 +1,7 @@
 /* linux/drivers/spi/spi_s3c24xx.c
 *
 * Copyright (c) 2006 Ben Dooks
- * Copyright (c) 2006 Simtec Electronics
+ * Copyright 2006-2009 Simtec Electronics
 *      Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
@@ -28,6 +28,11 @@
 #include <plat/regs-spi.h>
 #include <mach/spi.h>
+#include <plat/fiq.h>
+#include <asm/fiq.h>
+#include "spi_s3c24xx_fiq.h"
 /**
 * s3c24xx_spi_devstate - per device data
 * @hz: Last frequency calculated for @sppre field.
@@ -42,6 +47,13 @@ struct s3c24xx_spi_devstate {
        u8              sppre;
 };
+enum spi_fiq_mode {
+        FIQ_MODE_NONE   = 0,
+        FIQ_MODE_TX     = 1,
+        FIQ_MODE_RX     = 2,
+        FIQ_MODE_TXRX   = 3,
+};
 struct s3c24xx_spi {
        /* bitbang has to be first */
        struct spi_bitbang       bitbang;
@@ -52,6 +64,11 @@ struct s3c24xx_spi {
        int                      len;
        int                      count;
+        struct fiq_handler       fiq_handler;
+        enum spi_fiq_mode        fiq_mode;
+        unsigned char            fiq_inuse;
+        unsigned char            fiq_claimed;
        void                    (*set_cs)(struct s3c2410_spi_info *spi,
                                          int cs, int pol);
@@ -67,6 +84,7 @@ struct s3c24xx_spi {
        struct s3c2410_spi_info *pdata;
 };
 #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT)
 #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP)
@@ -127,7 +145,7 @@ static int s3c24xx_spi_update_state(struct spi_device *spi,
        }
        if (spi->mode != cs->mode) {
-                u8 spcon = SPCON_DEFAULT;
+                u8 spcon = SPCON_DEFAULT | S3C2410_SPCON_ENSCK;
                if (spi->mode & SPI_CPHA)
                        spcon |= S3C2410_SPCON_CPHA_FMTB;
@@ -214,13 +232,196 @@ static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count)
        return hw->tx ? hw->tx[count] : 0;
 }
+#ifdef CONFIG_SPI_S3C24XX_FIQ
+/* Support for FIQ based pseudo-DMA to improve the transfer speed.
+ *
+ * This code uses the assembly helper in spi_s3c24xx_spi.S which is
+ * used by the FIQ core to move data between main memory and the peripheral
+ * block. Since this is code running on the processor, there is no problem
+ * with cache coherency of the buffers, so we can use any buffer we like.
+ */
+/**
+ * struct spi_fiq_code - FIQ code and header
+ * @length: The length of the code fragment, excluding this header.
+ * @ack_offset: The offset from @data to the word to place the IRQ ACK bit at.
+ * @data: The code itself to install as a FIQ handler.
+ */
+struct spi_fiq_code {
+        u32     length;
+        u32     ack_offset;
+        u8      data[0];
+};
+extern struct spi_fiq_code s3c24xx_spi_fiq_txrx;
+extern struct spi_fiq_code s3c24xx_spi_fiq_tx;
+extern struct spi_fiq_code s3c24xx_spi_fiq_rx;
+/**
+ * ack_bit - turn IRQ into IRQ acknowledgement bit
+ * @irq: The interrupt number
+ *
+ * Returns the bit to write to the interrupt acknowledge register.
+ */
+static inline u32 ack_bit(unsigned int irq)
+{
+        return 1 << (irq - IRQ_EINT0);
+}
+/**
+ * s3c24xx_spi_tryfiq - attempt to claim and setup FIQ for transfer
+ * @hw: The hardware state.
+ *
+ * Claim the FIQ handler (only one can be active at any one time) and
+ * then setup the correct transfer code for this transfer.
+ *
+ * This call updates all the necessary state information if sucessful,
+ * so the caller does not need to do anything more than start the transfer
+ * as normal, since the IRQ will have been re-routed to the FIQ handler.
+*/
+void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw)
+{
+        struct pt_regs regs;
+        enum spi_fiq_mode mode;
+        struct spi_fiq_code *code;
+        int ret;
+        if (!hw->fiq_claimed) {
+                /* try and claim fiq if we haven't got it, and if not
+                 * then return and simply use another transfer method */
+                ret = claim_fiq(&hw->fiq_handler);
+                if (ret)
+                        return;
+        }
+        if (hw->tx && !hw->rx)
+                mode = FIQ_MODE_TX;
+        else if (hw->rx && !hw->tx)
+                mode = FIQ_MODE_RX;
+        else
+                mode = FIQ_MODE_TXRX;
+        regs.uregs[fiq_rspi] = (long)hw->regs;
+        regs.uregs[fiq_rrx]  = (long)hw->rx;
+        regs.uregs[fiq_rtx]  = (long)hw->tx + 1;
+        regs.uregs[fiq_rcount] = hw->len - 1;
+        regs.uregs[fiq_rirq] = (long)S3C24XX_VA_IRQ;
+        set_fiq_regs(&regs);
+        if (hw->fiq_mode != mode) {
+                u32 *ack_ptr;
+                hw->fiq_mode = mode;
+                switch (mode) {
+                case FIQ_MODE_TX:
+                        code = &s3c24xx_spi_fiq_tx;
+                        break;
+                case FIQ_MODE_RX:
+                        code = &s3c24xx_spi_fiq_rx;
+                        break;
+                case FIQ_MODE_TXRX:
+                        code = &s3c24xx_spi_fiq_txrx;
+                        break;
+                default:
+                        code = NULL;
+                }
+                BUG_ON(!code);
+                ack_ptr = (u32 *)&code->data[code->ack_offset];
+                *ack_ptr = ack_bit(hw->irq);
+                set_fiq_handler(&code->data, code->length);
+        }
+        s3c24xx_set_fiq(hw->irq, true);
+        hw->fiq_mode = mode;
+        hw->fiq_inuse = 1;
+}
+/**
+ * s3c24xx_spi_fiqop - FIQ core code callback
+ * @pw: Data registered with the handler
+ * @release: Whether this is a release or a return.
+ *
+ * Called by the FIQ code when another module wants to use the FIQ, so
+ * return whether we are currently using this or not and then update our
+ * internal state.
+ */
+static int s3c24xx_spi_fiqop(void *pw, int release)
+{
+        struct s3c24xx_spi *hw = pw;
+        int ret = 0;
+        if (release) {
+                if (hw->fiq_inuse)
+                        ret = -EBUSY;
+                /* note, we do not need to unroute the FIQ, as the FIQ
+                 * vector code de-routes it to signal the end of transfer */
+                hw->fiq_mode = FIQ_MODE_NONE;
+                hw->fiq_claimed = 0;
+        } else {
+                hw->fiq_claimed = 1;
+        }
+        return ret;
+}
+/**
+ * s3c24xx_spi_initfiq - setup the information for the FIQ core
+ * @hw: The hardware state.
+ *
+ * Setup the fiq_handler block to pass to the FIQ core.
+ */
+static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *hw)
+{
+        hw->fiq_handler.dev_id = hw;
+        hw->fiq_handler.name = dev_name(hw->dev);
+        hw->fiq_handler.fiq_op = s3c24xx_spi_fiqop;
+}
+/**
+ * s3c24xx_spi_usefiq - return if we should be using FIQ.
+ * @hw: The hardware state.
+ *
+ * Return true if the platform data specifies whether this channel is
+ * allowed to use the FIQ.
+ */
+static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *hw)
+{
+        return hw->pdata->use_fiq;
+}
+/**
+ * s3c24xx_spi_usingfiq - return if channel is using FIQ
+ * @spi: The hardware state.
+ *
+ * Return whether the channel is currently using the FIQ (separate from
+ * whether the FIQ is claimed).
+ */
+static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *spi)
+{
+        return spi->fiq_inuse;
+}
+#else
+static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *s) { }
+static inline void s3c24xx_spi_tryfiq(struct s3c24xx_spi *s) { }
+static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *s) { return false; }
+static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *s) { return false; }
+#endif /* CONFIG_SPI_S3C24XX_FIQ */
 static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
 {
        struct s3c24xx_spi *hw = to_hw(spi);
-        dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n",
-                t->tx_buf, t->rx_buf, t->len);
        hw->tx = t->tx_buf;
        hw->rx = t->rx_buf;
        hw->len = t->len;
@@ -228,11 +429,14 @@ static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t)
        init_completion(&hw->done);
+        hw->fiq_inuse = 0;
+        if (s3c24xx_spi_usefiq(hw) && t->len >= 3)
+                s3c24xx_spi_tryfiq(hw);
        /* send the first byte */
        writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT);
        wait_for_completion(&hw->done);
        return hw->count;
 }
@@ -254,17 +458,27 @@ static irqreturn_t s3c24xx_spi_irq(int irq, void *dev)
                goto irq_done;
        }
-        hw->count++;
+        if (!s3c24xx_spi_usingfiq(hw)) {
+                hw->count++;
-        if (hw->rx)
+                if (hw->rx)
-                hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
+                        hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT);
-        count++;
+                count++;
+                if (count < hw->len)
+                        writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
+                else
+                        complete(&hw->done);
+        } else {
+                hw->count = hw->len;
+                hw->fiq_inuse = 0;
+                if (hw->rx)
+                        hw->rx[hw->len-1] = readb(hw->regs + S3C2410_SPRDAT);
-        if (count < hw->len)
-                writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT);
-        else
                complete(&hw->done);
+        }
 irq_done:
        return IRQ_HANDLED;
@@ -322,6 +536,10 @@ static int __init s3c24xx_spi_probe(struct platform_device *pdev)
        platform_set_drvdata(pdev, hw);
        init_completion(&hw->done);
+        /* initialise fiq handler */
+        s3c24xx_spi_initfiq(hw);
        /* setup the master state. */
        /* the spi->mode bits understood by this driver: */
diff --git a/drivers/spi/spi_s3c24xx_fiq.S b/drivers/spi/spi_s3c24xx_fiq.S
new file mode 100644
index 000000000000..3793cae361db
--- /dev/null
+++ b/drivers/spi/spi_s3c24xx_fiq.S
@@ -0,0 +1,116 @@
+/* linux/drivers/spi/spi_s3c24xx_fiq.S
+ *
+ * Copyright 2009 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX SPI - FIQ pseudo-DMA transfer code
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+#include <linux/linkage.h>
+#include <asm/assembler.h>
+#include <mach/map.h>
+#include <mach/regs-irq.h>
+#include <plat/regs-spi.h>
+#include "spi_s3c24xx_fiq.h"
+        .text
+        @ entry to these routines is as follows, with the register names
+        @ defined in fiq.h so that they can be shared with the C files which
+        @ setup the calling registers.
+        @
+        @ fiq_rirq      The base of the IRQ registers to find S3C2410_SRCPND
+        @ fiq_rtmp      Temporary register to hold tx/rx data
+        @ fiq_rspi      The base of the SPI register block
+        @ fiq_rtx       The tx buffer pointer
+        @ fiq_rrx       The rx buffer pointer
+        @ fiq_rcount    The number of bytes to move
+        @ each entry starts with a word entry of how long it is
+        @ and an offset to the irq acknowledgment word
+ENTRY(s3c24xx_spi_fiq_rx)
+s3c24xx_spi_fix_rx:
+        .word   fiq_rx_end - fiq_rx_start
+        .word   fiq_rx_irq_ack - fiq_rx_start
+fiq_rx_start:
+        ldr     fiq_rtmp, fiq_rx_irq_ack
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+        ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+        strb    fiq_rtmp, [ fiq_rrx ], #1
+        mov     fiq_rtmp, #0xff
+        strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+        subs    fiq_rcount, fiq_rcount, #1
+        subnes  pc, lr, #4              @@ return, still have work to do
+        @@ set IRQ controller so that next op will trigger IRQ
+        mov     fiq_rtmp, #0
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+        subs    pc, lr, #4
+fiq_rx_irq_ack:
+        .word   0
+fiq_rx_end:
+ENTRY(s3c24xx_spi_fiq_txrx)
+s3c24xx_spi_fiq_txrx:
+        .word   fiq_txrx_end - fiq_txrx_start
+        .word   fiq_txrx_irq_ack - fiq_txrx_start
+fiq_txrx_start:
+        ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+        strb    fiq_rtmp, [ fiq_rrx ], #1
+        ldr     fiq_rtmp, fiq_txrx_irq_ack
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+        ldrb    fiq_rtmp, [ fiq_rtx ], #1
+        strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+        subs    fiq_rcount, fiq_rcount, #1
+        subnes  pc, lr, #4              @@ return, still have work to do
+        mov     fiq_rtmp, #0
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+        subs    pc, lr, #4
+fiq_txrx_irq_ack:
+        .word   0
+fiq_txrx_end:
+ENTRY(s3c24xx_spi_fiq_tx)
+s3c24xx_spi_fix_tx:
+        .word   fiq_tx_end - fiq_tx_start
+        .word   fiq_tx_irq_ack - fiq_tx_start
+fiq_tx_start:
+        ldrb    fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
+        ldr     fiq_rtmp, fiq_tx_irq_ack
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
+        ldrb    fiq_rtmp, [ fiq_rtx ], #1
+        strb    fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
+        subs    fiq_rcount, fiq_rcount, #1
+        subnes  pc, lr, #4              @@ return, still have work to do
+        mov     fiq_rtmp, #0
+        str     fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
+        subs    pc, lr, #4
+fiq_tx_irq_ack:
+        .word   0
+fiq_tx_end:
+        .end
diff --git a/drivers/spi/spi_s3c24xx_fiq.h b/drivers/spi/spi_s3c24xx_fiq.h
new file mode 100644
index 000000000000..a5950bb25b51
--- /dev/null
+++ b/drivers/spi/spi_s3c24xx_fiq.h
@@ -0,0 +1,26 @@
+/* linux/drivers/spi/spi_s3c24xx_fiq.h
+ *
+ * Copyright 2009 Simtec Electronics
+ *      Ben Dooks <ben@simtec.co.uk>
+ *
+ * S3C24XX SPI - FIQ pseudo-DMA transfer support
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+/* We have R8 through R13 to play with */
+#ifdef __ASSEMBLY__
+#define __REG_NR(x)     r##x
+#else
+#define __REG_NR(x)     (x)
+#endif
+#define fiq_rspi        __REG_NR(8)
+#define fiq_rtmp        __REG_NR(9)
+#define fiq_rrx         __REG_NR(10)
+#define fiq_rtx         __REG_NR(11)
+#define fiq_rcount      __REG_NR(12)
+#define fiq_rirq        __REG_NR(13)
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers/spi/spi_s3c64xx.c
new file mode 100644
index 000000000000..88a456dba967
--- /dev/null
+++ b/drivers/spi/spi_s3c64xx.c
@@ -0,0 +1,1196 @@
+/* linux/drivers/spi/spi_s3c64xx.c
+ *
+ * Copyright (C) 2009 Samsung Electronics Ltd.
+ *      Jaswinder Singh <jassi.brar@samsung.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/workqueue.h>
+#include <linux/delay.h>
+#include <linux/clk.h>
+#include <linux/dma-mapping.h>
+#include <linux/platform_device.h>
+#include <linux/spi/spi.h>
+#include <mach/dma.h>
+#include <plat/spi.h>
+/* Registers and bit-fields */
+#define S3C64XX_SPI_CH_CFG              0x00
+#define S3C64XX_SPI_CLK_CFG             0x04
+#define S3C64XX_SPI_MODE_CFG    0x08
+#define S3C64XX_SPI_SLAVE_SEL   0x0C
+#define S3C64XX_SPI_INT_EN              0x10
+#define S3C64XX_SPI_STATUS              0x14
+#define S3C64XX_SPI_TX_DATA             0x18
+#define S3C64XX_SPI_RX_DATA             0x1C
+#define S3C64XX_SPI_PACKET_CNT  0x20
+#define S3C64XX_SPI_PENDING_CLR 0x24
+#define S3C64XX_SPI_SWAP_CFG    0x28
+#define S3C64XX_SPI_FB_CLK              0x2C
+#define S3C64XX_SPI_CH_HS_EN            (1<<6)  /* High Speed Enable */
+#define S3C64XX_SPI_CH_SW_RST           (1<<5)
+#define S3C64XX_SPI_CH_SLAVE            (1<<4)
+#define S3C64XX_SPI_CPOL_L              (1<<3)
+#define S3C64XX_SPI_CPHA_B              (1<<2)
+#define S3C64XX_SPI_CH_RXCH_ON          (1<<1)
+#define S3C64XX_SPI_CH_TXCH_ON          (1<<0)
+#define S3C64XX_SPI_CLKSEL_SRCMSK       (3<<9)
+#define S3C64XX_SPI_CLKSEL_SRCSHFT      9
+#define S3C64XX_SPI_ENCLK_ENABLE        (1<<8)
+#define S3C64XX_SPI_PSR_MASK            0xff
+#define S3C64XX_SPI_MODE_CH_TSZ_BYTE            (0<<29)
+#define S3C64XX_SPI_MODE_CH_TSZ_HALFWORD        (1<<29)
+#define S3C64XX_SPI_MODE_CH_TSZ_WORD            (2<<29)
+#define S3C64XX_SPI_MODE_CH_TSZ_MASK            (3<<29)
+#define S3C64XX_SPI_MODE_BUS_TSZ_BYTE           (0<<17)
+#define S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD       (1<<17)
+#define S3C64XX_SPI_MODE_BUS_TSZ_WORD           (2<<17)
+#define S3C64XX_SPI_MODE_BUS_TSZ_MASK           (3<<17)
+#define S3C64XX_SPI_MODE_RXDMA_ON               (1<<2)
+#define S3C64XX_SPI_MODE_TXDMA_ON               (1<<1)
+#define S3C64XX_SPI_MODE_4BURST                 (1<<0)
+#define S3C64XX_SPI_SLAVE_AUTO                  (1<<1)
+#define S3C64XX_SPI_SLAVE_SIG_INACT             (1<<0)
+#define S3C64XX_SPI_ACT(c) writel(0, (c)->regs + S3C64XX_SPI_SLAVE_SEL)
+#define S3C64XX_SPI_DEACT(c) writel(S3C64XX_SPI_SLAVE_SIG_INACT, \
+                                        (c)->regs + S3C64XX_SPI_SLAVE_SEL)
+#define S3C64XX_SPI_INT_TRAILING_EN             (1<<6)
+#define S3C64XX_SPI_INT_RX_OVERRUN_EN           (1<<5)
+#define S3C64XX_SPI_INT_RX_UNDERRUN_EN          (1<<4)
+#define S3C64XX_SPI_INT_TX_OVERRUN_EN           (1<<3)
+#define S3C64XX_SPI_INT_TX_UNDERRUN_EN          (1<<2)
+#define S3C64XX_SPI_INT_RX_FIFORDY_EN           (1<<1)
+#define S3C64XX_SPI_INT_TX_FIFORDY_EN           (1<<0)
+#define S3C64XX_SPI_ST_RX_OVERRUN_ERR           (1<<5)
+#define S3C64XX_SPI_ST_RX_UNDERRUN_ERR  (1<<4)
+#define S3C64XX_SPI_ST_TX_OVERRUN_ERR           (1<<3)
+#define S3C64XX_SPI_ST_TX_UNDERRUN_ERR  (1<<2)
+#define S3C64XX_SPI_ST_RX_FIFORDY               (1<<1)
+#define S3C64XX_SPI_ST_TX_FIFORDY               (1<<0)
+#define S3C64XX_SPI_PACKET_CNT_EN               (1<<16)
+#define S3C64XX_SPI_PND_TX_UNDERRUN_CLR         (1<<4)
+#define S3C64XX_SPI_PND_TX_OVERRUN_CLR          (1<<3)
+#define S3C64XX_SPI_PND_RX_UNDERRUN_CLR         (1<<2)
+#define S3C64XX_SPI_PND_RX_OVERRUN_CLR          (1<<1)
+#define S3C64XX_SPI_PND_TRAILING_CLR            (1<<0)
+#define S3C64XX_SPI_SWAP_RX_HALF_WORD           (1<<7)
+#define S3C64XX_SPI_SWAP_RX_BYTE                (1<<6)
+#define S3C64XX_SPI_SWAP_RX_BIT                 (1<<5)
+#define S3C64XX_SPI_SWAP_RX_EN                  (1<<4)
+#define S3C64XX_SPI_SWAP_TX_HALF_WORD           (1<<3)
+#define S3C64XX_SPI_SWAP_TX_BYTE                (1<<2)
+#define S3C64XX_SPI_SWAP_TX_BIT                 (1<<1)
+#define S3C64XX_SPI_SWAP_TX_EN                  (1<<0)
+#define S3C64XX_SPI_FBCLK_MSK           (3<<0)
+#define S3C64XX_SPI_ST_TRLCNTZ(v, i) ((((v) >> (i)->rx_lvl_offset) & \
+                                        (((i)->fifo_lvl_mask + 1))) \
+                                        ? 1 : 0)
+#define S3C64XX_SPI_ST_TX_DONE(v, i) ((((v) >> (i)->rx_lvl_offset) & \
+                                        (((i)->fifo_lvl_mask + 1) << 1)) \
+                                        ? 1 : 0)
+#define TX_FIFO_LVL(v, i) (((v) >> 6) & (i)->fifo_lvl_mask)
+#define RX_FIFO_LVL(v, i) (((v) >> (i)->rx_lvl_offset) & (i)->fifo_lvl_mask)
+#define S3C64XX_SPI_MAX_TRAILCNT        0x3ff
+#define S3C64XX_SPI_TRAILCNT_OFF        19
+#define S3C64XX_SPI_TRAILCNT            S3C64XX_SPI_MAX_TRAILCNT
+#define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
+#define SUSPND    (1<<0)
+#define SPIBUSY   (1<<1)
+#define RXBUSY    (1<<2)
+#define TXBUSY    (1<<3)
+/**
+ * struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver.
+ * @clk: Pointer to the spi clock.
+ * @master: Pointer to the SPI Protocol master.
+ * @workqueue: Work queue for the SPI xfer requests.
+ * @cntrlr_info: Platform specific data for the controller this driver manages.
+ * @tgl_spi: Pointer to the last CS left untoggled by the cs_change hint.
+ * @work: Work
+ * @queue: To log SPI xfer requests.
+ * @lock: Controller specific lock.
+ * @state: Set of FLAGS to indicate status.
+ * @rx_dmach: Controller's DMA channel for Rx.
+ * @tx_dmach: Controller's DMA channel for Tx.
+ * @sfr_start: BUS address of SPI controller regs.
+ * @regs: Pointer to ioremap'ed controller registers.
+ * @xfer_completion: To indicate completion of xfer task.
+ * @cur_mode: Stores the active configuration of the controller.
+ * @cur_bpw: Stores the active bits per word settings.
+ * @cur_speed: Stores the active xfer clock speed.
+ */
+struct s3c64xx_spi_driver_data {
+        void __iomem                    *regs;
+        struct clk                      *clk;
+        struct platform_device          *pdev;
+        struct spi_master               *master;
+        struct workqueue_struct         *workqueue;
+        struct s3c64xx_spi_cntrlr_info  *cntrlr_info;
+        struct spi_device               *tgl_spi;
+        struct work_struct              work;
+        struct list_head                queue;
+        spinlock_t                      lock;
+        enum dma_ch                     rx_dmach;
+        enum dma_ch                     tx_dmach;
+        unsigned long                   sfr_start;
+        struct completion               xfer_completion;
+        unsigned                        state;
+        unsigned                        cur_mode, cur_bpw;
+        unsigned                        cur_speed;
+};
+static struct s3c2410_dma_client s3c64xx_spi_dma_client = {
+        .name = "samsung-spi-dma",
+};
+static void flush_fifo(struct s3c64xx_spi_driver_data *sdd)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        unsigned long loops;
+        u32 val;
+        writel(0, regs + S3C64XX_SPI_PACKET_CNT);
+        val = readl(regs + S3C64XX_SPI_CH_CFG);
+        val |= S3C64XX_SPI_CH_SW_RST;
+        val &= ~S3C64XX_SPI_CH_HS_EN;
+        writel(val, regs + S3C64XX_SPI_CH_CFG);
+        /* Flush TxFIFO*/
+        loops = msecs_to_loops(1);
+        do {
+                val = readl(regs + S3C64XX_SPI_STATUS);
+        } while (TX_FIFO_LVL(val, sci) && loops--);
+        /* Flush RxFIFO*/
+        loops = msecs_to_loops(1);
+        do {
+                val = readl(regs + S3C64XX_SPI_STATUS);
+                if (RX_FIFO_LVL(val, sci))
+                        readl(regs + S3C64XX_SPI_RX_DATA);
+                else
+                        break;
+        } while (loops--);
+        val = readl(regs + S3C64XX_SPI_CH_CFG);
+        val &= ~S3C64XX_SPI_CH_SW_RST;
+        writel(val, regs + S3C64XX_SPI_CH_CFG);
+        val = readl(regs + S3C64XX_SPI_MODE_CFG);
+        val &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON);
+        writel(val, regs + S3C64XX_SPI_MODE_CFG);
+        val = readl(regs + S3C64XX_SPI_CH_CFG);
+        val &= ~(S3C64XX_SPI_CH_RXCH_ON | S3C64XX_SPI_CH_TXCH_ON);
+        writel(val, regs + S3C64XX_SPI_CH_CFG);
+}
+static void enable_datapath(struct s3c64xx_spi_driver_data *sdd,
+                                struct spi_device *spi,
+                                struct spi_transfer *xfer, int dma_mode)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        u32 modecfg, chcfg;
+        modecfg = readl(regs + S3C64XX_SPI_MODE_CFG);
+        modecfg &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON);
+        chcfg = readl(regs + S3C64XX_SPI_CH_CFG);
+        chcfg &= ~S3C64XX_SPI_CH_TXCH_ON;
+        if (dma_mode) {
+                chcfg &= ~S3C64XX_SPI_CH_RXCH_ON;
+        } else {
+                /* Always shift in data in FIFO, even if xfer is Tx only,
+                 * this helps setting PCKT_CNT value for generating clocks
+                 * as exactly needed.
+                 */
+                chcfg |= S3C64XX_SPI_CH_RXCH_ON;
+                writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
+                                        | S3C64XX_SPI_PACKET_CNT_EN,
+                                        regs + S3C64XX_SPI_PACKET_CNT);
+        }
+        if (xfer->tx_buf != NULL) {
+                sdd->state |= TXBUSY;
+                chcfg |= S3C64XX_SPI_CH_TXCH_ON;
+                if (dma_mode) {
+                        modecfg |= S3C64XX_SPI_MODE_TXDMA_ON;
+                        s3c2410_dma_config(sdd->tx_dmach, 1);
+                        s3c2410_dma_enqueue(sdd->tx_dmach, (void *)sdd,
+                                                xfer->tx_dma, xfer->len);
+                        s3c2410_dma_ctrl(sdd->tx_dmach, S3C2410_DMAOP_START);
+                } else {
+                        unsigned char *buf = (unsigned char *) xfer->tx_buf;
+                        int i = 0;
+                        while (i < xfer->len)
+                                writeb(buf[i++], regs + S3C64XX_SPI_TX_DATA);
+                }
+        }
+        if (xfer->rx_buf != NULL) {
+                sdd->state |= RXBUSY;
+                if (sci->high_speed && sdd->cur_speed >= 30000000UL
+                                        && !(sdd->cur_mode & SPI_CPHA))
+                        chcfg |= S3C64XX_SPI_CH_HS_EN;
+                if (dma_mode) {
+                        modecfg |= S3C64XX_SPI_MODE_RXDMA_ON;
+                        chcfg |= S3C64XX_SPI_CH_RXCH_ON;
+                        writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff)
+                                        | S3C64XX_SPI_PACKET_CNT_EN,
+                                        regs + S3C64XX_SPI_PACKET_CNT);
+                        s3c2410_dma_config(sdd->rx_dmach, 1);
+                        s3c2410_dma_enqueue(sdd->rx_dmach, (void *)sdd,
+                                                xfer->rx_dma, xfer->len);
+                        s3c2410_dma_ctrl(sdd->rx_dmach, S3C2410_DMAOP_START);
+                }
+        }
+        writel(modecfg, regs + S3C64XX_SPI_MODE_CFG);
+        writel(chcfg, regs + S3C64XX_SPI_CH_CFG);
+}
+static inline void enable_cs(struct s3c64xx_spi_driver_data *sdd,
+                                                struct spi_device *spi)
+{
+        struct s3c64xx_spi_csinfo *cs;
+        if (sdd->tgl_spi != NULL) { /* If last device toggled after mssg */
+                if (sdd->tgl_spi != spi) { /* if last mssg on diff device */
+                        /* Deselect the last toggled device */
+                        cs = sdd->tgl_spi->controller_data;
+                        cs->set_level(spi->mode & SPI_CS_HIGH ? 0 : 1);
+                }
+                sdd->tgl_spi = NULL;
+        }
+        cs = spi->controller_data;
+        cs->set_level(spi->mode & SPI_CS_HIGH ? 1 : 0);
+}
+static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd,
+                                struct spi_transfer *xfer, int dma_mode)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        unsigned long val;
+        int ms;
+        /* millisecs to xfer 'len' bytes @ 'cur_speed' */
+        ms = xfer->len * 8 * 1000 / sdd->cur_speed;
+        ms += 5; /* some tolerance */
+        if (dma_mode) {
+                val = msecs_to_jiffies(ms) + 10;
+                val = wait_for_completion_timeout(&sdd->xfer_completion, val);
+        } else {
+                val = msecs_to_loops(ms);
+                do {
+                        val = readl(regs + S3C64XX_SPI_STATUS);
+                } while (RX_FIFO_LVL(val, sci) < xfer->len && --val);
+        }
+        if (!val)
+                return -EIO;
+        if (dma_mode) {
+                u32 status;
+                /*
+                 * DmaTx returns after simply writing data in the FIFO,
+                 * w/o waiting for real transmission on the bus to finish.
+                 * DmaRx returns only after Dma read data from FIFO which
+                 * needs bus transmission to finish, so we don't worry if
+                 * Xfer involved Rx(with or without Tx).
+                 */
+                if (xfer->rx_buf == NULL) {
+                        val = msecs_to_loops(10);
+                        status = readl(regs + S3C64XX_SPI_STATUS);
+                        while ((TX_FIFO_LVL(status, sci)
+                                || !S3C64XX_SPI_ST_TX_DONE(status, sci))
+                                        && --val) {
+                                cpu_relax();
+                                status = readl(regs + S3C64XX_SPI_STATUS);
+                        }
+                        if (!val)
+                                return -EIO;
+                }
+        } else {
+                unsigned char *buf;
+                int i;
+                /* If it was only Tx */
+                if (xfer->rx_buf == NULL) {
+                        sdd->state &= ~TXBUSY;
+                        return 0;
+                }
+                i = 0;
+                buf = xfer->rx_buf;
+                while (i < xfer->len)
+                        buf[i++] = readb(regs + S3C64XX_SPI_RX_DATA);
+                sdd->state &= ~RXBUSY;
+        }
+        return 0;
+}
+static inline void disable_cs(struct s3c64xx_spi_driver_data *sdd,
+                                                struct spi_device *spi)
+{
+        struct s3c64xx_spi_csinfo *cs = spi->controller_data;
+        if (sdd->tgl_spi == spi)
+                sdd->tgl_spi = NULL;
+        cs->set_level(spi->mode & SPI_CS_HIGH ? 0 : 1);
+}
+static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        u32 val;
+        /* Disable Clock */
+        val = readl(regs + S3C64XX_SPI_CLK_CFG);
+        val &= ~S3C64XX_SPI_ENCLK_ENABLE;
+        writel(val, regs + S3C64XX_SPI_CLK_CFG);
+        /* Set Polarity and Phase */
+        val = readl(regs + S3C64XX_SPI_CH_CFG);
+        val &= ~(S3C64XX_SPI_CH_SLAVE |
+                        S3C64XX_SPI_CPOL_L |
+                        S3C64XX_SPI_CPHA_B);
+        if (sdd->cur_mode & SPI_CPOL)
+                val |= S3C64XX_SPI_CPOL_L;
+        if (sdd->cur_mode & SPI_CPHA)
+                val |= S3C64XX_SPI_CPHA_B;
+        writel(val, regs + S3C64XX_SPI_CH_CFG);
+        /* Set Channel & DMA Mode */
+        val = readl(regs + S3C64XX_SPI_MODE_CFG);
+        val &= ~(S3C64XX_SPI_MODE_BUS_TSZ_MASK
+                        | S3C64XX_SPI_MODE_CH_TSZ_MASK);
+        switch (sdd->cur_bpw) {
+        case 32:
+                val |= S3C64XX_SPI_MODE_BUS_TSZ_WORD;
+                break;
+        case 16:
+                val |= S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD;
+                break;
+        default:
+                val |= S3C64XX_SPI_MODE_BUS_TSZ_BYTE;
+                break;
+        }
+        val |= S3C64XX_SPI_MODE_CH_TSZ_BYTE; /* Always 8bits wide */
+        writel(val, regs + S3C64XX_SPI_MODE_CFG);
+        /* Configure Clock */
+        val = readl(regs + S3C64XX_SPI_CLK_CFG);
+        val &= ~S3C64XX_SPI_PSR_MASK;
+        val |= ((clk_get_rate(sci->src_clk) / sdd->cur_speed / 2 - 1)
+                        & S3C64XX_SPI_PSR_MASK);
+        writel(val, regs + S3C64XX_SPI_CLK_CFG);
+        /* Enable Clock */
+        val = readl(regs + S3C64XX_SPI_CLK_CFG);
+        val |= S3C64XX_SPI_ENCLK_ENABLE;
+        writel(val, regs + S3C64XX_SPI_CLK_CFG);
+}
+void s3c64xx_spi_dma_rxcb(struct s3c2410_dma_chan *chan, void *buf_id,
+                                int size, enum s3c2410_dma_buffresult res)
+{
+        struct s3c64xx_spi_driver_data *sdd = buf_id;
+        unsigned long flags;
+        spin_lock_irqsave(&sdd->lock, flags);
+        if (res == S3C2410_RES_OK)
+                sdd->state &= ~RXBUSY;
+        else
+                dev_err(&sdd->pdev->dev, "DmaAbrtRx-%d\n", size);
+        /* If the other done */
+        if (!(sdd->state & TXBUSY))
+                complete(&sdd->xfer_completion);
+        spin_unlock_irqrestore(&sdd->lock, flags);
+}
+void s3c64xx_spi_dma_txcb(struct s3c2410_dma_chan *chan, void *buf_id,
+                                int size, enum s3c2410_dma_buffresult res)
+{
+        struct s3c64xx_spi_driver_data *sdd = buf_id;
+        unsigned long flags;
+        spin_lock_irqsave(&sdd->lock, flags);
+        if (res == S3C2410_RES_OK)
+                sdd->state &= ~TXBUSY;
+        else
+                dev_err(&sdd->pdev->dev, "DmaAbrtTx-%d \n", size);
+        /* If the other done */
+        if (!(sdd->state & RXBUSY))
+                complete(&sdd->xfer_completion);
+        spin_unlock_irqrestore(&sdd->lock, flags);
+}
+#define XFER_DMAADDR_INVALID DMA_BIT_MASK(32)
+static int s3c64xx_spi_map_mssg(struct s3c64xx_spi_driver_data *sdd,
+                                                struct spi_message *msg)
+{
+        struct device *dev = &sdd->pdev->dev;
+        struct spi_transfer *xfer;
+        if (msg->is_dma_mapped)
+                return 0;
+        /* First mark all xfer unmapped */
+        list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+                xfer->rx_dma = XFER_DMAADDR_INVALID;
+                xfer->tx_dma = XFER_DMAADDR_INVALID;
+        }
+        /* Map until end or first fail */
+        list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+                if (xfer->tx_buf != NULL) {
+                        xfer->tx_dma = dma_map_single(dev, xfer->tx_buf,
+                                                xfer->len, DMA_TO_DEVICE);
+                        if (dma_mapping_error(dev, xfer->tx_dma)) {
+                                dev_err(dev, "dma_map_single Tx failed\n");
+                                xfer->tx_dma = XFER_DMAADDR_INVALID;
+                                return -ENOMEM;
+                        }
+                }
+                if (xfer->rx_buf != NULL) {
+                        xfer->rx_dma = dma_map_single(dev, xfer->rx_buf,
+                                                xfer->len, DMA_FROM_DEVICE);
+                        if (dma_mapping_error(dev, xfer->rx_dma)) {
+                                dev_err(dev, "dma_map_single Rx failed\n");
+                                dma_unmap_single(dev, xfer->tx_dma,
+                                                xfer->len, DMA_TO_DEVICE);
+                                xfer->tx_dma = XFER_DMAADDR_INVALID;
+                                xfer->rx_dma = XFER_DMAADDR_INVALID;
+                                return -ENOMEM;
+                        }
+                }
+        }
+        return 0;
+}
+static void s3c64xx_spi_unmap_mssg(struct s3c64xx_spi_driver_data *sdd,
+                                                struct spi_message *msg)
+{
+        struct device *dev = &sdd->pdev->dev;
+        struct spi_transfer *xfer;
+        if (msg->is_dma_mapped)
+                return;
+        list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+                if (xfer->rx_buf != NULL
+                                && xfer->rx_dma != XFER_DMAADDR_INVALID)
+                        dma_unmap_single(dev, xfer->rx_dma,
+                                                xfer->len, DMA_FROM_DEVICE);
+                if (xfer->tx_buf != NULL
+                                && xfer->tx_dma != XFER_DMAADDR_INVALID)
+                        dma_unmap_single(dev, xfer->tx_dma,
+                                                xfer->len, DMA_TO_DEVICE);
+        }
+}
+static void handle_msg(struct s3c64xx_spi_driver_data *sdd,
+                                        struct spi_message *msg)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        struct spi_device *spi = msg->spi;
+        struct s3c64xx_spi_csinfo *cs = spi->controller_data;
+        struct spi_transfer *xfer;
+        int status = 0, cs_toggle = 0;
+        u32 speed;
+        u8 bpw;
+        /* If Master's(controller) state differs from that needed by Slave */
+        if (sdd->cur_speed != spi->max_speed_hz
+                        || sdd->cur_mode != spi->mode
+                        || sdd->cur_bpw != spi->bits_per_word) {
+                sdd->cur_bpw = spi->bits_per_word;
+                sdd->cur_speed = spi->max_speed_hz;
+                sdd->cur_mode = spi->mode;
+                s3c64xx_spi_config(sdd);
+        }
+        /* Map all the transfers if needed */
+        if (s3c64xx_spi_map_mssg(sdd, msg)) {
+                dev_err(&spi->dev,
+                        "Xfer: Unable to map message buffers!\n");
+                status = -ENOMEM;
+                goto out;
+        }
+        /* Configure feedback delay */
+        writel(cs->fb_delay & 0x3, sdd->regs + S3C64XX_SPI_FB_CLK);
+        list_for_each_entry(xfer, &msg->transfers, transfer_list) {
+                unsigned long flags;
+                int use_dma;
+                INIT_COMPLETION(sdd->xfer_completion);
+                /* Only BPW and Speed may change across transfers */
+                bpw = xfer->bits_per_word ? : spi->bits_per_word;
+                speed = xfer->speed_hz ? : spi->max_speed_hz;
+                if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) {
+                        sdd->cur_bpw = bpw;
+                        sdd->cur_speed = speed;
+                        s3c64xx_spi_config(sdd);
+                }
+                /* Polling method for xfers not bigger than FIFO capacity */
+                if (xfer->len <= ((sci->fifo_lvl_mask >> 1) + 1))
+                        use_dma = 0;
+                else
+                        use_dma = 1;
+                spin_lock_irqsave(&sdd->lock, flags);
+                /* Pending only which is to be done */
+                sdd->state &= ~RXBUSY;
+                sdd->state &= ~TXBUSY;
+                enable_datapath(sdd, spi, xfer, use_dma);
+                /* Slave Select */
+                enable_cs(sdd, spi);
+                /* Start the signals */
+                S3C64XX_SPI_ACT(sdd);
+                spin_unlock_irqrestore(&sdd->lock, flags);
+                status = wait_for_xfer(sdd, xfer, use_dma);
+                /* Quiese the signals */
+                S3C64XX_SPI_DEACT(sdd);
+                if (status) {
+                        dev_err(&spi->dev, "I/O Error: \
+                                rx-%d tx-%d res:rx-%c tx-%c len-%d\n",
+                                xfer->rx_buf ? 1 : 0, xfer->tx_buf ? 1 : 0,
+                                (sdd->state & RXBUSY) ? 'f' : 'p',
+                                (sdd->state & TXBUSY) ? 'f' : 'p',
+                                xfer->len);
+                        if (use_dma) {
+                                if (xfer->tx_buf != NULL
+                                                && (sdd->state & TXBUSY))
+                                        s3c2410_dma_ctrl(sdd->tx_dmach,
+                                                        S3C2410_DMAOP_FLUSH);
+                                if (xfer->rx_buf != NULL
+                                                && (sdd->state & RXBUSY))
+                                        s3c2410_dma_ctrl(sdd->rx_dmach,
+                                                        S3C2410_DMAOP_FLUSH);
+                        }
+                        goto out;
+                }
+                if (xfer->delay_usecs)
+                        udelay(xfer->delay_usecs);
+                if (xfer->cs_change) {
+                        /* Hint that the next mssg is gonna be
+                           for the same device */
+                        if (list_is_last(&xfer->transfer_list,
+                                                &msg->transfers))
+                                cs_toggle = 1;
+                        else
+                                disable_cs(sdd, spi);
+                }
+                msg->actual_length += xfer->len;
+                flush_fifo(sdd);
+        }
+out:
+        if (!cs_toggle || status)
+                disable_cs(sdd, spi);
+        else
+                sdd->tgl_spi = spi;
+        s3c64xx_spi_unmap_mssg(sdd, msg);
+        msg->status = status;
+        if (msg->complete)
+                msg->complete(msg->context);
+}
+static int acquire_dma(struct s3c64xx_spi_driver_data *sdd)
+{
+        if (s3c2410_dma_request(sdd->rx_dmach,
+                                        &s3c64xx_spi_dma_client, NULL) < 0) {
+                dev_err(&sdd->pdev->dev, "cannot get RxDMA\n");
+                return 0;
+        }
+        s3c2410_dma_set_buffdone_fn(sdd->rx_dmach, s3c64xx_spi_dma_rxcb);
+        s3c2410_dma_devconfig(sdd->rx_dmach, S3C2410_DMASRC_HW,
+                                        sdd->sfr_start + S3C64XX_SPI_RX_DATA);
+        if (s3c2410_dma_request(sdd->tx_dmach,
+                                        &s3c64xx_spi_dma_client, NULL) < 0) {
+                dev_err(&sdd->pdev->dev, "cannot get TxDMA\n");
+                s3c2410_dma_free(sdd->rx_dmach, &s3c64xx_spi_dma_client);
+                return 0;
+        }
+        s3c2410_dma_set_buffdone_fn(sdd->tx_dmach, s3c64xx_spi_dma_txcb);
+        s3c2410_dma_devconfig(sdd->tx_dmach, S3C2410_DMASRC_MEM,
+                                        sdd->sfr_start + S3C64XX_SPI_TX_DATA);
+        return 1;
+}
+static void s3c64xx_spi_work(struct work_struct *work)
+{
+        struct s3c64xx_spi_driver_data *sdd = container_of(work,
+                                        struct s3c64xx_spi_driver_data, work);
+        unsigned long flags;
+        /* Acquire DMA channels */
+        while (!acquire_dma(sdd))
+                msleep(10);
+        spin_lock_irqsave(&sdd->lock, flags);
+        while (!list_empty(&sdd->queue)
+                                && !(sdd->state & SUSPND)) {
+                struct spi_message *msg;
+                msg = container_of(sdd->queue.next, struct spi_message, queue);
+                list_del_init(&msg->queue);
+                /* Set Xfer busy flag */
+                sdd->state |= SPIBUSY;
+                spin_unlock_irqrestore(&sdd->lock, flags);
+                handle_msg(sdd, msg);
+                spin_lock_irqsave(&sdd->lock, flags);
+                sdd->state &= ~SPIBUSY;
+        }
+        spin_unlock_irqrestore(&sdd->lock, flags);
+        /* Free DMA channels */
+        s3c2410_dma_free(sdd->tx_dmach, &s3c64xx_spi_dma_client);
+        s3c2410_dma_free(sdd->rx_dmach, &s3c64xx_spi_dma_client);
+}
+static int s3c64xx_spi_transfer(struct spi_device *spi,
+                                                struct spi_message *msg)
+{
+        struct s3c64xx_spi_driver_data *sdd;
+        unsigned long flags;
+        sdd = spi_master_get_devdata(spi->master);
+        spin_lock_irqsave(&sdd->lock, flags);
+        if (sdd->state & SUSPND) {
+                spin_unlock_irqrestore(&sdd->lock, flags);
+                return -ESHUTDOWN;
+        }
+        msg->status = -EINPROGRESS;
+        msg->actual_length = 0;
+        list_add_tail(&msg->queue, &sdd->queue);
+        queue_work(sdd->workqueue, &sdd->work);
+        spin_unlock_irqrestore(&sdd->lock, flags);
+        return 0;
+}
+/*
+ * Here we only check the validity of requested configuration
+ * and save the configuration in a local data-structure.
+ * The controller is actually configured only just before we
+ * get a message to transfer.
+ */
+static int s3c64xx_spi_setup(struct spi_device *spi)
+{
+        struct s3c64xx_spi_csinfo *cs = spi->controller_data;
+        struct s3c64xx_spi_driver_data *sdd;
+        struct s3c64xx_spi_cntrlr_info *sci;
+        struct spi_message *msg;
+        u32 psr, speed;
+        unsigned long flags;
+        int err = 0;
+        if (cs == NULL || cs->set_level == NULL) {
+                dev_err(&spi->dev, "No CS for SPI(%d)\n", spi->chip_select);
+                return -ENODEV;
+        }
+        sdd = spi_master_get_devdata(spi->master);
+        sci = sdd->cntrlr_info;
+        spin_lock_irqsave(&sdd->lock, flags);
+        list_for_each_entry(msg, &sdd->queue, queue) {
+                /* Is some mssg is already queued for this device */
+                if (msg->spi == spi) {
+                        dev_err(&spi->dev,
+                                "setup: attempt while mssg in queue!\n");
+                        spin_unlock_irqrestore(&sdd->lock, flags);
+                        return -EBUSY;
+                }
+        }
+        if (sdd->state & SUSPND) {
+                spin_unlock_irqrestore(&sdd->lock, flags);
+                dev_err(&spi->dev,
+                        "setup: SPI-%d not active!\n", spi->master->bus_num);
+                return -ESHUTDOWN;
+        }
+        spin_unlock_irqrestore(&sdd->lock, flags);
+        if (spi->bits_per_word != 8
+                        && spi->bits_per_word != 16
+                        && spi->bits_per_word != 32) {
+                dev_err(&spi->dev, "setup: %dbits/wrd not supported!\n",
+                                                        spi->bits_per_word);
+                err = -EINVAL;
+                goto setup_exit;
+        }
+        /* Check if we can provide the requested rate */
+        speed = clk_get_rate(sci->src_clk) / 2 / (0 + 1); /* Max possible */
+        if (spi->max_speed_hz > speed)
+                spi->max_speed_hz = speed;
+        psr = clk_get_rate(sci->src_clk) / 2 / spi->max_speed_hz - 1;
+        psr &= S3C64XX_SPI_PSR_MASK;
+        if (psr == S3C64XX_SPI_PSR_MASK)
+                psr--;
+        speed = clk_get_rate(sci->src_clk) / 2 / (psr + 1);
+        if (spi->max_speed_hz < speed) {
+                if (psr+1 < S3C64XX_SPI_PSR_MASK) {
+                        psr++;
+                } else {
+                        err = -EINVAL;
+                        goto setup_exit;
+                }
+        }
+        speed = clk_get_rate(sci->src_clk) / 2 / (psr + 1);
+        if (spi->max_speed_hz >= speed)
+                spi->max_speed_hz = speed;
+        else
+                err = -EINVAL;
+setup_exit:
+        /* setup() returns with device de-selected */
+        disable_cs(sdd, spi);
+        return err;
+}
+static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel)
+{
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        void __iomem *regs = sdd->regs;
+        unsigned int val;
+        sdd->cur_speed = 0;
+        S3C64XX_SPI_DEACT(sdd);
+        /* Disable Interrupts - we use Polling if not DMA mode */
+        writel(0, regs + S3C64XX_SPI_INT_EN);
+        writel(sci->src_clk_nr << S3C64XX_SPI_CLKSEL_SRCSHFT,
+                                regs + S3C64XX_SPI_CLK_CFG);
+        writel(0, regs + S3C64XX_SPI_MODE_CFG);
+        writel(0, regs + S3C64XX_SPI_PACKET_CNT);
+        /* Clear any irq pending bits */
+        writel(readl(regs + S3C64XX_SPI_PENDING_CLR),
+                                regs + S3C64XX_SPI_PENDING_CLR);
+        writel(0, regs + S3C64XX_SPI_SWAP_CFG);
+        val = readl(regs + S3C64XX_SPI_MODE_CFG);
+        val &= ~S3C64XX_SPI_MODE_4BURST;
+        val &= ~(S3C64XX_SPI_MAX_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF);
+        val |= (S3C64XX_SPI_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF);
+        writel(val, regs + S3C64XX_SPI_MODE_CFG);
+        flush_fifo(sdd);
+}
+static int __init s3c64xx_spi_probe(struct platform_device *pdev)
+{
+        struct resource *mem_res, *dmatx_res, *dmarx_res;
+        struct s3c64xx_spi_driver_data *sdd;
+        struct s3c64xx_spi_cntrlr_info *sci;
+        struct spi_master *master;
+        int ret;
+        if (pdev->id < 0) {
+                dev_err(&pdev->dev,
+                                "Invalid platform device id-%d\n", pdev->id);
+                return -ENODEV;
+        }
+        if (pdev->dev.platform_data == NULL) {
+                dev_err(&pdev->dev, "platform_data missing!\n");
+                return -ENODEV;
+        }
+        /* Check for availability of necessary resource */
+        dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
+        if (dmatx_res == NULL) {
+                dev_err(&pdev->dev, "Unable to get SPI-Tx dma resource\n");
+                return -ENXIO;
+        }
+        dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
+        if (dmarx_res == NULL) {
+                dev_err(&pdev->dev, "Unable to get SPI-Rx dma resource\n");
+                return -ENXIO;
+        }
+        mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        if (mem_res == NULL) {
+                dev_err(&pdev->dev, "Unable to get SPI MEM resource\n");
+                return -ENXIO;
+        }
+        master = spi_alloc_master(&pdev->dev,
+                                sizeof(struct s3c64xx_spi_driver_data));
+        if (master == NULL) {
+                dev_err(&pdev->dev, "Unable to allocate SPI Master\n");
+                return -ENOMEM;
+        }
+        sci = pdev->dev.platform_data;
+        platform_set_drvdata(pdev, master);
+        sdd = spi_master_get_devdata(master);
+        sdd->master = master;
+        sdd->cntrlr_info = sci;
+        sdd->pdev = pdev;
+        sdd->sfr_start = mem_res->start;
+        sdd->tx_dmach = dmatx_res->start;
+        sdd->rx_dmach = dmarx_res->start;
+        sdd->cur_bpw = 8;
+        master->bus_num = pdev->id;
+        master->setup = s3c64xx_spi_setup;
+        master->transfer = s3c64xx_spi_transfer;
+        master->num_chipselect = sci->num_cs;
+        master->dma_alignment = 8;
+        /* the spi->mode bits understood by this driver: */
+        master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH;
+        if (request_mem_region(mem_res->start,
+                        resource_size(mem_res), pdev->name) == NULL) {
+                dev_err(&pdev->dev, "Req mem region failed\n");
+                ret = -ENXIO;
+                goto err0;
+        }
+        sdd->regs = ioremap(mem_res->start, resource_size(mem_res));
+        if (sdd->regs == NULL) {
+                dev_err(&pdev->dev, "Unable to remap IO\n");
+                ret = -ENXIO;
+                goto err1;
+        }
+        if (sci->cfg_gpio == NULL || sci->cfg_gpio(pdev)) {
+                dev_err(&pdev->dev, "Unable to config gpio\n");
+                ret = -EBUSY;
+                goto err2;
+        }
+        /* Setup clocks */
+        sdd->clk = clk_get(&pdev->dev, "spi");
+        if (IS_ERR(sdd->clk)) {
+                dev_err(&pdev->dev, "Unable to acquire clock 'spi'\n");
+                ret = PTR_ERR(sdd->clk);
+                goto err3;
+        }
+        if (clk_enable(sdd->clk)) {
+                dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n");
+                ret = -EBUSY;
+                goto err4;
+        }
+        if (sci->src_clk_nr == S3C64XX_SPI_SRCCLK_PCLK)
+                sci->src_clk = sdd->clk;
+        else
+                sci->src_clk = clk_get(&pdev->dev, sci->src_clk_name);
+        if (IS_ERR(sci->src_clk)) {
+                dev_err(&pdev->dev,
+                        "Unable to acquire clock '%s'\n", sci->src_clk_name);
+                ret = PTR_ERR(sci->src_clk);
+                goto err5;
+        }
+        if (sci->src_clk != sdd->clk && clk_enable(sci->src_clk)) {
+                dev_err(&pdev->dev, "Couldn't enable clock '%s'\n",
+                                                        sci->src_clk_name);
+                ret = -EBUSY;
+                goto err6;
+        }
+        sdd->workqueue = create_singlethread_workqueue(
+                                                dev_name(master->dev.parent));
+        if (sdd->workqueue == NULL) {
+                dev_err(&pdev->dev, "Unable to create workqueue\n");
+                ret = -ENOMEM;
+                goto err7;
+        }
+        /* Setup Deufult Mode */
+        s3c64xx_spi_hwinit(sdd, pdev->id);
+        spin_lock_init(&sdd->lock);
+        init_completion(&sdd->xfer_completion);
+        INIT_WORK(&sdd->work, s3c64xx_spi_work);
+        INIT_LIST_HEAD(&sdd->queue);
+        if (spi_register_master(master)) {
+                dev_err(&pdev->dev, "cannot register SPI master\n");
+                ret = -EBUSY;
+                goto err8;
+        }
+        dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d \
+                                        with %d Slaves attached\n",
+                                        pdev->id, master->num_chipselect);
+        dev_dbg(&pdev->dev, "\tIOmem=[0x%x-0x%x]\
+                                        \tDMA=[Rx-%d, Tx-%d]\n",
+                                        mem_res->end, mem_res->start,
+                                        sdd->rx_dmach, sdd->tx_dmach);
+        return 0;
+err8:
+        destroy_workqueue(sdd->workqueue);
+err7:
+        if (sci->src_clk != sdd->clk)
+                clk_disable(sci->src_clk);
+err6:
+        if (sci->src_clk != sdd->clk)
+                clk_put(sci->src_clk);
+err5:
+        clk_disable(sdd->clk);
+err4:
+        clk_put(sdd->clk);
+err3:
+err2:
+        iounmap((void *) sdd->regs);
+err1:
+        release_mem_region(mem_res->start, resource_size(mem_res));
+err0:
+        platform_set_drvdata(pdev, NULL);
+        spi_master_put(master);
+        return ret;
+}
+static int s3c64xx_spi_remove(struct platform_device *pdev)
+{
+        struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
+        struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        struct resource *mem_res;
+        unsigned long flags;
+        spin_lock_irqsave(&sdd->lock, flags);
+        sdd->state |= SUSPND;
+        spin_unlock_irqrestore(&sdd->lock, flags);
+        while (sdd->state & SPIBUSY)
+                msleep(10);
+        spi_unregister_master(master);
+        destroy_workqueue(sdd->workqueue);
+        if (sci->src_clk != sdd->clk)
+                clk_disable(sci->src_clk);
+        if (sci->src_clk != sdd->clk)
+                clk_put(sci->src_clk);
+        clk_disable(sdd->clk);
+        clk_put(sdd->clk);
+        iounmap((void *) sdd->regs);
+        mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+        release_mem_region(mem_res->start, resource_size(mem_res));
+        platform_set_drvdata(pdev, NULL);
+        spi_master_put(master);
+        return 0;
+}
+#ifdef CONFIG_PM
+static int s3c64xx_spi_suspend(struct platform_device *pdev, pm_message_t state)
+{
+        struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
+        struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        struct s3c64xx_spi_csinfo *cs;
+        unsigned long flags;
+        spin_lock_irqsave(&sdd->lock, flags);
+        sdd->state |= SUSPND;
+        spin_unlock_irqrestore(&sdd->lock, flags);
+        while (sdd->state & SPIBUSY)
+                msleep(10);
+        /* Disable the clock */
+        if (sci->src_clk != sdd->clk)
+                clk_disable(sci->src_clk);
+        clk_disable(sdd->clk);
+        sdd->cur_speed = 0; /* Output Clock is stopped */
+        return 0;
+}
+static int s3c64xx_spi_resume(struct platform_device *pdev)
+{
+        struct spi_master *master = spi_master_get(platform_get_drvdata(pdev));
+        struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master);
+        struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info;
+        unsigned long flags;
+        sci->cfg_gpio(pdev);
+        /* Enable the clock */
+        if (sci->src_clk != sdd->clk)
+                clk_enable(sci->src_clk);
+        clk_enable(sdd->clk);
+        s3c64xx_spi_hwinit(sdd, pdev->id);
+        spin_lock_irqsave(&sdd->lock, flags);
+        sdd->state &= ~SUSPND;
+        spin_unlock_irqrestore(&sdd->lock, flags);
+        return 0;
+}
+#else
+#define s3c64xx_spi_suspend     NULL
+#define s3c64xx_spi_resume      NULL
+#endif /* CONFIG_PM */
+static struct platform_driver s3c64xx_spi_driver = {
+        .driver = {
+                .name   = "s3c64xx-spi",
+                .owner = THIS_MODULE,
+        },
+        .remove = s3c64xx_spi_remove,
+        .suspend = s3c64xx_spi_suspend,
+        .resume = s3c64xx_spi_resume,
+};
+MODULE_ALIAS("platform:s3c64xx-spi");
+static int __init s3c64xx_spi_init(void)
+{
+        return platform_driver_probe(&s3c64xx_spi_driver, s3c64xx_spi_probe);
+}
+module_init(s3c64xx_spi_init);
+static void __exit s3c64xx_spi_exit(void)
+{
+        platform_driver_unregister(&s3c64xx_spi_driver);
+}
+module_exit(s3c64xx_spi_exit);
+MODULE_AUTHOR("Jaswinder Singh <jassi.brar@samsung.com>");
+MODULE_DESCRIPTION("S3C64XX SPI Controller Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/spi/spi_sh_sci.c b/drivers/spi/spi_sh_sci.c
index 7d36720eb982..a65c12ffa733 100644
--- a/drivers/spi/spi_sh_sci.c
+++ b/drivers/spi/spi_sh_sci.c
@@ -148,7 +148,7 @@ static int sh_sci_spi_probe(struct platform_device *dev)
                ret = -ENOENT;
                goto err1;
        }
-        sp->membase = ioremap(r->start, r->end - r->start + 1);
+        sp->membase = ioremap(r->start, resource_size(r));
        if (!sp->membase) {
                ret = -ENXIO;
                goto err1;
diff --git a/drivers/spi/spi_txx9.c b/drivers/spi/spi_txx9.c
index 19f75627c3de..dfa024b633e1 100644
--- a/drivers/spi/spi_txx9.c
+++ b/drivers/spi/spi_txx9.c
@@ -375,12 +375,10 @@ static int __init txx9spi_probe(struct platform_device *dev)
        res = platform_get_resource(dev, IORESOURCE_MEM, 0);
        if (!res)
                goto exit_busy;
-        if (!devm_request_mem_region(&dev->dev,
+        if (!devm_request_mem_region(&dev->dev, res->start, resource_size(res),
-                                     res->start, res->end - res->start + 1,
                                     "spi_txx9"))
                goto exit_busy;
-        c->membase = devm_ioremap(&dev->dev,
+        c->membase = devm_ioremap(&dev->dev, res->start, resource_size(res));
-                                  res->start, res->end - res->start + 1);
        if (!c->membase)
                goto exit_busy;
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 9c446e6003d5..ea1bec3c9a13 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -53,7 +53,7 @@
 #define SPIDEV_MAJOR                    153     /* assigned */
 #define N_SPI_MINORS                    32      /* ... up to 256 */
-static unsigned long    minors[N_SPI_MINORS / BITS_PER_LONG];
+static DECLARE_BITMAP(minors, N_SPI_MINORS);
 /* Bit masks for spi_device.mode management.  Note that incorrect
@@ -558,7 +558,7 @@ static struct class *spidev_class;
 /*-------------------------------------------------------------------------*/
-static int spidev_probe(struct spi_device *spi)
+static int __devinit spidev_probe(struct spi_device *spi)
 {
        struct spidev_data      *spidev;
        int                     status;
@@ -607,7 +607,7 @@ static int spidev_probe(struct spi_device *spi)
        return status;
 }
-static int spidev_remove(struct spi_device *spi)
+static int __devexit spidev_remove(struct spi_device *spi)
 {
        struct spidev_data      *spidev = spi_get_drvdata(spi);
@@ -629,7 +629,7 @@ static int spidev_remove(struct spi_device *spi)
        return 0;
 }
-static struct spi_driver spidev_spi = {
+static struct spi_driver spidev_spi_driver = {
        .driver = {
                .name =         "spidev",
                .owner =        THIS_MODULE,
@@ -661,14 +661,14 @@ static int __init spidev_init(void)
        spidev_class = class_create(THIS_MODULE, "spidev");
        if (IS_ERR(spidev_class)) {
-                unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name);
+                unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
                return PTR_ERR(spidev_class);
        }
-        status = spi_register_driver(&spidev_spi);
+        status = spi_register_driver(&spidev_spi_driver);
        if (status < 0) {
                class_destroy(spidev_class);
-                unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name);
+                unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
        }
        return status;
 }
@@ -676,9 +676,9 @@ module_init(spidev_init);
 static void __exit spidev_exit(void)
 {
-        spi_unregister_driver(&spidev_spi);
+        spi_unregister_driver(&spidev_spi_driver);
        class_destroy(spidev_class);
-        unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name);
+        unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name);
 }
 module_exit(spidev_exit);
diff --git a/drivers/staging/iio/ring_sw.h b/drivers/staging/iio/ring_sw.h
index f0b86f02cd80..fd677f008365 100644
--- a/drivers/staging/iio/ring_sw.h
+++ b/drivers/staging/iio/ring_sw.h
@@ -29,7 +29,6 @@
 * driver requests - some may support multiple options */
-#include <linux/autoconf.h>
 #include "iio.h"
 #include "ring_generic.h"
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c
index 4ce399b6d237..f98a52448eae 100644
--- a/drivers/staging/panel/panel.c
+++ b/drivers/staging/panel/panel.c
@@ -55,7 +55,7 @@
 #include <linux/list.h>
 #include <linux/notifier.h>
 #include <linux/reboot.h>
-#include <linux/utsrelease.h>
+#include <generated/utsrelease.h>
 #include <linux/io.h>
 #include <asm/uaccess.h>
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c
index 2051c9dc813b..b7687c55fe16 100644
--- a/drivers/video/atafb.c
+++ b/drivers/video/atafb.c
@@ -2245,9 +2245,6 @@ static int ext_setcolreg(unsigned int regno, unsigned int red,
        if (regno > 255)
                return 1;
-        if (regno > 255)
-                return 1;
        switch (external_card_type) {
        case IS_VGA:
                OUTB(0x3c8, regno);
diff --git a/drivers/video/backlight/adp5520_bl.c b/drivers/video/backlight/adp5520_bl.c
index 4c10edecfb66..86d95c228adb 100644
--- a/drivers/video/backlight/adp5520_bl.c
+++ b/drivers/video/backlight/adp5520_bl.c
@@ -85,7 +85,7 @@ static int adp5520_bl_get_brightness(struct backlight_device *bl)
        return error ? data->current_brightness : reg_val;
 }
-static struct backlight_ops adp5520_bl_ops = {
+static const struct backlight_ops adp5520_bl_ops = {
        .update_status  = adp5520_bl_update_status,
        .get_brightness = adp5520_bl_get_brightness,
 };
diff --git a/drivers/video/backlight/adx_bl.c b/drivers/video/backlight/adx_bl.c
index 2c3bdfc620b7..d769b0bab21a 100644
--- a/drivers/video/backlight/adx_bl.c
+++ b/drivers/video/backlight/adx_bl.c
@@ -61,7 +61,7 @@ static int adx_backlight_check_fb(struct fb_info *fb)
        return 1;
 }
-static struct backlight_ops adx_backlight_ops = {
+static const struct backlight_ops adx_backlight_ops = {
        .options = 0,
        .update_status = adx_backlight_update_status,
        .get_brightness = adx_backlight_get_brightness,
diff --git a/drivers/video/backlight/atmel-pwm-bl.c b/drivers/video/backlight/atmel-pwm-bl.c
index 2cf7ba52f67c..f625ffc69ad3 100644
--- a/drivers/video/backlight/atmel-pwm-bl.c
+++ b/drivers/video/backlight/atmel-pwm-bl.c
@@ -113,7 +113,7 @@ static int atmel_pwm_bl_init_pwm(struct atmel_pwm_bl *pwmbl)
        return pwm_channel_enable(&pwmbl->pwmc);
 }
-static struct backlight_ops atmel_pwm_bl_ops = {
+static const struct backlight_ops atmel_pwm_bl_ops = {
        .get_brightness = atmel_pwm_bl_get_intensity,
        .update_status  = atmel_pwm_bl_set_intensity,
 };
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c
index 6615ac7fa60a..18829cf68b1b 100644
--- a/drivers/video/backlight/backlight.c
+++ b/drivers/video/backlight/backlight.c
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(backlight_force_update);
 * ERR_PTR() or a pointer to the newly allocated device.
 */
 struct backlight_device *backlight_device_register(const char *name,
-                struct device *parent, void *devdata, struct backlight_ops *ops)
+                struct device *parent, void *devdata, const struct backlight_ops *ops)
 {
        struct backlight_device *new_bd;
        int rc;
diff --git a/drivers/video/backlight/corgi_lcd.c b/drivers/video/backlight/corgi_lcd.c
index 96774949cd30..b4bcf8043797 100644
--- a/drivers/video/backlight/corgi_lcd.c
+++ b/drivers/video/backlight/corgi_lcd.c
@@ -451,7 +451,7 @@ void corgi_lcd_limit_intensity(int limit)
 }
 EXPORT_SYMBOL(corgi_lcd_limit_intensity);
-static struct backlight_ops corgi_bl_ops = {
+static const struct backlight_ops corgi_bl_ops = {
        .get_brightness = corgi_bl_get_intensity,
        .update_status  = corgi_bl_update_status,
 };
diff --git a/drivers/video/backlight/cr_bllcd.c b/drivers/video/backlight/cr_bllcd.c
index b9fe62b475c6..da86db4374a0 100644
--- a/drivers/video/backlight/cr_bllcd.c
+++ b/drivers/video/backlight/cr_bllcd.c
@@ -108,7 +108,7 @@ static int cr_backlight_get_intensity(struct backlight_device *bd)
        return intensity;
 }
-static struct backlight_ops cr_backlight_ops = {
+static const struct backlight_ops cr_backlight_ops = {
        .get_brightness = cr_backlight_get_intensity,
        .update_status = cr_backlight_set_intensity,
 };
@@ -201,7 +201,7 @@ static int cr_backlight_probe(struct platform_device *pdev)
        if (IS_ERR(ldp)) {
                backlight_device_unregister(bdp);
                pci_dev_put(lpc_dev);
-                return PTR_ERR(bdp);
+                return PTR_ERR(ldp);
        }
        pci_read_config_dword(lpc_dev, CRVML_REG_GPIOBAR,
diff --git a/drivers/video/backlight/da903x_bl.c b/drivers/video/backlight/da903x_bl.c
index f2d76dae1eb3..74cdc640173d 100644
--- a/drivers/video/backlight/da903x_bl.c
+++ b/drivers/video/backlight/da903x_bl.c
@@ -95,7 +95,7 @@ static int da903x_backlight_get_brightness(struct backlight_device *bl)
        return data->current_brightness;
 }
-static struct backlight_ops da903x_backlight_ops = {
+static const struct backlight_ops da903x_backlight_ops = {
        .update_status  = da903x_backlight_update_status,
        .get_brightness = da903x_backlight_get_brightness,
 };
diff --git a/drivers/video/backlight/generic_bl.c b/drivers/video/backlight/generic_bl.c
index 6d27f62fdcd0..e6d348e63596 100644
--- a/drivers/video/backlight/generic_bl.c
+++ b/drivers/video/backlight/generic_bl.c
@@ -70,7 +70,7 @@ void corgibl_limit_intensity(int limit)
 }
 EXPORT_SYMBOL(corgibl_limit_intensity);
-static struct backlight_ops genericbl_ops = {
+static const struct backlight_ops genericbl_ops = {
        .options = BL_CORE_SUSPENDRESUME,
        .get_brightness = genericbl_get_intensity,
        .update_status  = genericbl_send_intensity,
diff --git a/drivers/video/backlight/hp680_bl.c b/drivers/video/backlight/hp680_bl.c
index 7fb4eefff80d..f7cc528d5be7 100644
--- a/drivers/video/backlight/hp680_bl.c
+++ b/drivers/video/backlight/hp680_bl.c
@@ -98,7 +98,7 @@ static int hp680bl_get_intensity(struct backlight_device *bd)
        return current_intensity;
 }
-static struct backlight_ops hp680bl_ops = {
+static const struct backlight_ops hp680bl_ops = {
        .get_brightness = hp680bl_get_intensity,
        .update_status  = hp680bl_set_intensity,
 };
diff --git a/drivers/video/backlight/jornada720_bl.c b/drivers/video/backlight/jornada720_bl.c
index 7aed2565c1bd..db9071fc5665 100644
--- a/drivers/video/backlight/jornada720_bl.c
+++ b/drivers/video/backlight/jornada720_bl.c
@@ -93,7 +93,7 @@ out:
        return ret;
 }
-static struct backlight_ops jornada_bl_ops = {
+static const struct backlight_ops jornada_bl_ops = {
        .get_brightness = jornada_bl_get_brightness,
        .update_status = jornada_bl_update_status,
        .options = BL_CORE_SUSPENDRESUME,
diff --git a/drivers/video/backlight/kb3886_bl.c b/drivers/video/backlight/kb3886_bl.c
index a38fda1742dd..939e7b830cf3 100644
--- a/drivers/video/backlight/kb3886_bl.c
+++ b/drivers/video/backlight/kb3886_bl.c
@@ -134,7 +134,7 @@ static int kb3886bl_get_intensity(struct backlight_device *bd)
        return kb3886bl_intensity;
 }
-static struct backlight_ops kb3886bl_ops = {
+static const struct backlight_ops kb3886bl_ops = {
        .get_brightness = kb3886bl_get_intensity,
        .update_status  = kb3886bl_send_intensity,
 };
diff --git a/drivers/video/backlight/locomolcd.c b/drivers/video/backlight/locomolcd.c
index 6b488b8a7eee..00a9591b0003 100644
--- a/drivers/video/backlight/locomolcd.c
+++ b/drivers/video/backlight/locomolcd.c
@@ -141,7 +141,7 @@ static int locomolcd_get_intensity(struct backlight_device *bd)
        return current_intensity;
 }
-static struct backlight_ops locomobl_data = {
+static const struct backlight_ops locomobl_data = {
        .get_brightness = locomolcd_get_intensity,
        .update_status  = locomolcd_set_intensity,
 };
diff --git a/drivers/video/backlight/mbp_nvidia_bl.c b/drivers/video/backlight/mbp_nvidia_bl.c
index 9edb8d7c295f..2e78b0784bdc 100644
--- a/drivers/video/backlight/mbp_nvidia_bl.c
+++ b/drivers/video/backlight/mbp_nvidia_bl.c
@@ -33,7 +33,7 @@ struct dmi_match_data {
        unsigned long iostart;
        unsigned long iolen;
        /* Backlight operations structure. */
-        struct backlight_ops backlight_ops;
+        const struct backlight_ops backlight_ops;
 };
 /* Module parameters. */
@@ -220,6 +220,24 @@ static const struct dmi_system_id __initdata mbp_device_table[] = {
        },
        {
                .callback       = mbp_dmi_match,
+                .ident          = "MacBookPro 5,3",
+                .matches        = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,3"),
+                },
+                .driver_data    = (void *)&nvidia_chipset_data,
+        },
+        {
+                .callback       = mbp_dmi_match,
+                .ident          = "MacBookPro 5,4",
+                .matches        = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,4"),
+                },
+                .driver_data    = (void *)&nvidia_chipset_data,
+        },
+        {
+                .callback       = mbp_dmi_match,
                .ident          = "MacBookPro 5,5",
                .matches        = {
                        DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."),
diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c
index 8693e5fcd2eb..409ca9643528 100644
--- a/drivers/video/backlight/omap1_bl.c
+++ b/drivers/video/backlight/omap1_bl.c
@@ -125,7 +125,7 @@ static int omapbl_get_intensity(struct backlight_device *dev)
        return bl->current_intensity;
 }
-static struct backlight_ops omapbl_ops = {
+static const struct backlight_ops omapbl_ops = {
        .get_brightness = omapbl_get_intensity,
        .update_status  = omapbl_update_status,
 };
diff --git a/drivers/video/backlight/progear_bl.c b/drivers/video/backlight/progear_bl.c
index 9edaf24fd82d..075786e05034 100644
--- a/drivers/video/backlight/progear_bl.c
+++ b/drivers/video/backlight/progear_bl.c
@@ -54,7 +54,7 @@ static int progearbl_get_intensity(struct backlight_device *bd)
        return intensity - HW_LEVEL_MIN;
 }
-static struct backlight_ops progearbl_ops = {
+static const struct backlight_ops progearbl_ops = {
        .get_brightness = progearbl_get_intensity,
        .update_status = progearbl_set_intensity,
 };
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c
index 887166267443..9d2ec2a1cce8 100644
--- a/drivers/video/backlight/pwm_bl.c
+++ b/drivers/video/backlight/pwm_bl.c
@@ -22,8 +22,10 @@
 struct pwm_bl_data {
        struct pwm_device       *pwm;
+        struct device           *dev;
        unsigned int            period;
-        int                     (*notify)(int brightness);
+        int                     (*notify)(struct device *,
+                                          int brightness);
 };
 static int pwm_backlight_update_status(struct backlight_device *bl)
@@ -39,7 +41,7 @@ static int pwm_backlight_update_status(struct backlight_device *bl)
                brightness = 0;
        if (pb->notify)
-                brightness = pb->notify(brightness);
+                brightness = pb->notify(pb->dev, brightness);
        if (brightness == 0) {
                pwm_config(pb->pwm, 0, pb->period);
@@ -56,7 +58,7 @@ static int pwm_backlight_get_brightness(struct backlight_device *bl)
        return bl->props.brightness;
 }
-static struct backlight_ops pwm_backlight_ops = {
+static const struct backlight_ops pwm_backlight_ops = {
        .update_status  = pwm_backlight_update_status,
        .get_brightness = pwm_backlight_get_brightness,
 };
@@ -88,6 +90,7 @@ static int pwm_backlight_probe(struct platform_device *pdev)
        pb->period = data->pwm_period_ns;
        pb->notify = data->notify;
+        pb->dev = &pdev->dev;
        pb->pwm = pwm_request(data->pwm_id, "backlight");
        if (IS_ERR(pb->pwm)) {
@@ -146,7 +149,7 @@ static int pwm_backlight_suspend(struct platform_device *pdev,
        struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
        if (pb->notify)
-                pb->notify(0);
+                pb->notify(pb->dev, 0);
        pwm_config(pb->pwm, 0, pb->period);
        pwm_disable(pb->pwm);
        return 0;
diff --git a/drivers/video/backlight/tosa_bl.c b/drivers/video/backlight/tosa_bl.c
index 43edbada12d1..e14ce4d469f5 100644
--- a/drivers/video/backlight/tosa_bl.c
+++ b/drivers/video/backlight/tosa_bl.c
@@ -72,7 +72,7 @@ static int tosa_bl_get_brightness(struct backlight_device *dev)
        return props->brightness;
 }
-static struct backlight_ops bl_ops = {
+static const struct backlight_ops bl_ops = {
        .get_brightness         = tosa_bl_get_brightness,
        .update_status          = tosa_bl_update_status,
 };
diff --git a/drivers/video/backlight/wm831x_bl.c b/drivers/video/backlight/wm831x_bl.c
index 467bdb7efb23..e32add37a203 100644
--- a/drivers/video/backlight/wm831x_bl.c
+++ b/drivers/video/backlight/wm831x_bl.c
@@ -112,7 +112,7 @@ static int wm831x_backlight_get_brightness(struct backlight_device *bl)
        return data->current_brightness;
 }
-static struct backlight_ops wm831x_backlight_ops = {
+static const struct backlight_ops wm831x_backlight_ops = {
        .options = BL_CORE_SUSPENDRESUME,
        .update_status  = wm831x_backlight_update_status,
        .get_brightness = wm831x_backlight_get_brightness,
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c
index 10d8c4b4baeb..d8df17a7d5fc 100644
--- a/drivers/video/via/viafbdev.c
+++ b/drivers/video/via/viafbdev.c
@@ -680,7 +680,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
                if (!viafb_gamma_table)
                        return -ENOMEM;
                if (copy_from_user(viafb_gamma_table, argp,
-                                sizeof(viafb_gamma_table))) {
+                                256 * sizeof(u32))) {
                        kfree(viafb_gamma_table);
                        return -EFAULT;
                }
@@ -694,7 +694,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
                        return -ENOMEM;
                viafb_get_gamma_table(viafb_gamma_table);
                if (copy_to_user(argp, viafb_gamma_table,
-                        sizeof(viafb_gamma_table))) {
+                        256 * sizeof(u32))) {
                        kfree(viafb_gamma_table);
                        return -EFAULT;
                }