219 files changed, 6357 insertions, 2197 deletions

diff --git a/drivers/ata/ata_piix.c b/drivers/ata/ata_piix.c
index 19136a7e1064..6f3f2257d0f0 100644
--- a/drivers/ata/ata_piix.c
+++ b/drivers/ata/ata_piix.c
@@ -329,7 +329,7 @@ static struct ata_port_operations ich_pata_ops = {
 };
 
 static struct ata_port_operations piix_sata_ops = {
-        .inherits               = &ata_bmdma_port_ops,
+        .inherits               = &ata_bmdma32_port_ops,
 };
 
 static struct ata_port_operations piix_sidpr_sata_ops = {
diff --git a/drivers/ata/libata-core.c b/drivers/ata/libata-core.c
index 22ff51bdbc8a..6728328f3bea 100644
--- a/drivers/ata/libata-core.c
+++ b/drivers/ata/libata-core.c
@@ -3790,21 +3790,45 @@ int sata_link_debounce(struct ata_link *link, const unsigned long *params,
 int sata_link_resume(struct ata_link *link, const unsigned long *params,
                      unsigned long deadline)
 {
+        int tries = ATA_LINK_RESUME_TRIES;
         u32 scontrol, serror;
         int rc;
 
         if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
                 return rc;
 
-        scontrol = (scontrol & 0x0f0) | 0x300;
+        /*
+         * Writes to SControl sometimes get ignored under certain
+         * controllers (ata_piix SIDPR).  Make sure DET actually is
+         * cleared.
+         */
+        do {
+                scontrol = (scontrol & 0x0f0) | 0x300;
+                if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
+                        return rc;
+                /*
+                 * Some PHYs react badly if SStatus is pounded
+                 * immediately after resuming.  Delay 200ms before
+                 * debouncing.
+                 */
+                msleep(200);
 
-        if ((rc = sata_scr_write(link, SCR_CONTROL, scontrol)))
-                return rc;
+                /* is SControl restored correctly? */
+                if ((rc = sata_scr_read(link, SCR_CONTROL, &scontrol)))
+                        return rc;
+        } while ((scontrol & 0xf0f) != 0x300 && --tries);
 
-        /* Some PHYs react badly if SStatus is pounded immediately
-         * after resuming.  Delay 200ms before debouncing.
-         */
-        msleep(200);
+        if ((scontrol & 0xf0f) != 0x300) {
+                ata_link_printk(link, KERN_ERR,
+                                "failed to resume link (SControl %X)\n",
+                                scontrol);
+                return 0;
+        }
+
+        if (tries < ATA_LINK_RESUME_TRIES)
+                ata_link_printk(link, KERN_WARNING,
+                                "link resume succeeded after %d retries\n",
+                                ATA_LINK_RESUME_TRIES - tries);
 
         if ((rc = sata_link_debounce(link, params, deadline)))
                 return rc;
diff --git a/drivers/ata/sata_promise.c b/drivers/ata/sata_promise.c
index 07d8d00b4d34..63306285c843 100644
--- a/drivers/ata/sata_promise.c
+++ b/drivers/ata/sata_promise.c
@@ -862,7 +862,7 @@ static void pdc_error_intr(struct ata_port *ap, struct ata_queued_cmd *qc,
         if (port_status & PDC_DRIVE_ERR)
                 ac_err_mask |= AC_ERR_DEV;
         if (port_status & (PDC_OVERRUN_ERR | PDC_UNDERRUN_ERR))
-                ac_err_mask |= AC_ERR_HSM;
+                ac_err_mask |= AC_ERR_OTHER;
         if (port_status & (PDC2_ATA_HBA_ERR | PDC2_ATA_DMA_CNT_ERR))
                 ac_err_mask |= AC_ERR_ATA_BUS;
         if (port_status & (PDC_PH_ERR | PDC_SH_ERR | PDC_DH_ERR | PDC2_HTO_ERR
diff --git a/drivers/base/power/main.c b/drivers/base/power/main.c
index 48adf80926a0..a5142bddef41 100644
--- a/drivers/base/power/main.c
+++ b/drivers/base/power/main.c
@@ -446,8 +446,8 @@ EXPORT_SYMBOL_GPL(dpm_resume_noirq);
 
 /**
  * legacy_resume - Execute a legacy (bus or class) resume callback for device.
- * dev: Device to resume.
- * cb: Resume callback to execute.
+ * @dev: Device to resume.
+ * @cb: Resume callback to execute.
  */
 static int legacy_resume(struct device *dev, int (*cb)(struct device *dev))
 {
@@ -711,8 +711,9 @@ EXPORT_SYMBOL_GPL(dpm_suspend_noirq);
 
 /**
  * legacy_suspend - Execute a legacy (bus or class) suspend callback for device.
- * dev: Device to suspend.
- * cb: Suspend callback to execute.
+ * @dev: Device to suspend.
+ * @state: PM transition of the system being carried out.
+ * @cb: Suspend callback to execute.
  */
 static int legacy_suspend(struct device *dev, pm_message_t state,
                           int (*cb)(struct device *dev, pm_message_t state))
diff --git a/drivers/char/agp/backend.c b/drivers/char/agp/backend.c
index a56ca080e108..c3ab46da51a3 100644
--- a/drivers/char/agp/backend.c
+++ b/drivers/char/agp/backend.c
@@ -285,18 +285,22 @@ int agp_add_bridge(struct agp_bridge_data *bridge)
 {
         int error;
 
-        if (agp_off)
-                return -ENODEV;
+        if (agp_off) {
+                error = -ENODEV;
+                goto err_put_bridge;
+        }
 
         if (!bridge->dev) {
                 printk (KERN_DEBUG PFX "Erk, registering with no pci_dev!\n");
-                return -EINVAL;
+                error = -EINVAL;
+                goto err_put_bridge;
         }
 
         /* Grab reference on the chipset driver. */
         if (!try_module_get(bridge->driver->owner)) {
                 dev_info(&bridge->dev->dev, "can't lock chipset driver\n");
-                return -EINVAL;
+                error = -EINVAL;
+                goto err_put_bridge;
         }
 
         error = agp_backend_initialize(bridge);
@@ -326,6 +330,7 @@ frontend_err:
         agp_backend_cleanup(bridge);
 err_out:
         module_put(bridge->driver->owner);
+err_put_bridge:
         agp_put_bridge(bridge);
         return error;
 }
diff --git a/drivers/char/agp/hp-agp.c b/drivers/char/agp/hp-agp.c
index 9047b2714653..58752b70efea 100644
--- a/drivers/char/agp/hp-agp.c
+++ b/drivers/char/agp/hp-agp.c
@@ -488,9 +488,8 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
         handle = obj;
         do {
                 status = acpi_get_object_info(handle, &info);
-                if (ACPI_SUCCESS(status)) {
+                if (ACPI_SUCCESS(status) && (info->valid & ACPI_VALID_HID)) {
                         /* TBD check _CID also */
-                        info->hardware_id.string[sizeof(info->hardware_id.length)-1] = '\0';
                         match = (strcmp(info->hardware_id.string, "HWP0001") == 0);
                         kfree(info);
                         if (match) {
@@ -509,6 +508,9 @@ zx1_gart_probe (acpi_handle obj, u32 depth, void *context, void **ret)
                 handle = parent;
         } while (ACPI_SUCCESS(status));
 
+        if (ACPI_FAILURE(status))
+                return AE_OK;   /* found no enclosing IOC */
+
         if (hp_zx1_setup(sba_hpa + HP_ZX1_IOC_OFFSET, lba_hpa))
                 return AE_OK;
 
diff --git a/drivers/cpuidle/governors/menu.c b/drivers/cpuidle/governors/menu.c
index 68104434ebb5..73655aeb3a60 100644
--- a/drivers/cpuidle/governors/menu.c
+++ b/drivers/cpuidle/governors/menu.c
@@ -18,6 +18,7 @@
 #include <linux/hrtimer.h>
 #include <linux/tick.h>
 #include <linux/sched.h>
+#include <linux/math64.h>
 
 #define BUCKETS 12
 #define RESOLUTION 1024
@@ -169,6 +170,12 @@ static DEFINE_PER_CPU(struct menu_device, menu_devices);
 
 static void menu_update(struct cpuidle_device *dev);
 
+/* This implements DIV_ROUND_CLOSEST but avoids 64 bit division */
+static u64 div_round64(u64 dividend, u32 divisor)
+{
+        return div_u64(dividend + (divisor / 2), divisor);
+}
+
 /**
  * menu_select - selects the next idle state to enter
  * @dev: the CPU
@@ -209,9 +216,8 @@ static int menu_select(struct cpuidle_device *dev)
                 data->correction_factor[data->bucket] = RESOLUTION * DECAY;
 
         /* Make sure to round up for half microseconds */
-        data->predicted_us = DIV_ROUND_CLOSEST(
-                data->expected_us * data->correction_factor[data->bucket],
-                RESOLUTION * DECAY);
+        data->predicted_us = div_round64(data->expected_us * data->correction_factor[data->bucket],
+                                         RESOLUTION * DECAY);
 
         /*
          * We want to default to C1 (hlt), not to busy polling
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index a019b49ecc9b..1f1d88ae68d6 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -172,6 +172,15 @@ config GPIO_ADP5520
           To compile this driver as a module, choose M here: the module will
           be called adp5520-gpio.
 
+config GPIO_ADP5588
+        tristate "ADP5588 I2C GPIO expander"
+        depends on I2C
+        help
+          This option enables support for 18 GPIOs found
+          on Analog Devices ADP5588 GPIO Expanders.
+          To compile this driver as a module, choose M here: the module will be
+          called adp5588-gpio.
+
 comment "PCI GPIO expanders:"
 
 config GPIO_CS5535
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 52fe4cf734c7..48687238edb1 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -5,6 +5,7 @@ ccflags-$(CONFIG_DEBUG_GPIO)	+= -DDEBUG
 obj-$(CONFIG_GPIOLIB)           += gpiolib.o
 
 obj-$(CONFIG_GPIO_ADP5520)      += adp5520-gpio.o
+obj-$(CONFIG_GPIO_ADP5588)      += adp5588-gpio.o
 obj-$(CONFIG_GPIO_LANGWELL)     += langwell_gpio.o
 obj-$(CONFIG_GPIO_MAX7301)      += max7301.o
 obj-$(CONFIG_GPIO_MAX732X)      += max732x.o
diff --git a/drivers/gpio/adp5588-gpio.c b/drivers/gpio/adp5588-gpio.c
new file mode 100644
index 000000000000..afc097a16b33
--- /dev/null
+++ b/drivers/gpio/adp5588-gpio.c
@@ -0,0 +1,266 @@
+/*
+ * GPIO Chip driver for Analog Devices
+ * ADP5588 I/O Expander and QWERTY Keypad Controller
+ *
+ * Copyright 2009 Analog Devices Inc.
+ *
+ * Licensed under the GPL-2 or later.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/i2c.h>
+#include <linux/gpio.h>
+
+#include <linux/i2c/adp5588.h>
+
+#define DRV_NAME                "adp5588-gpio"
+#define MAXGPIO                 18
+#define ADP_BANK(offs)          ((offs) >> 3)
+#define ADP_BIT(offs)           (1u << ((offs) & 0x7))
+
+struct adp5588_gpio {
+        struct i2c_client *client;
+        struct gpio_chip gpio_chip;
+        struct mutex lock;      /* protect cached dir, dat_out */
+        unsigned gpio_start;
+        uint8_t dat_out[3];
+        uint8_t dir[3];
+};
+
+static int adp5588_gpio_read(struct i2c_client *client, u8 reg)
+{
+        int ret = i2c_smbus_read_byte_data(client, reg);
+
+        if (ret < 0)
+                dev_err(&client->dev, "Read Error\n");
+
+        return ret;
+}
+
+static int adp5588_gpio_write(struct i2c_client *client, u8 reg, u8 val)
+{
+        int ret = i2c_smbus_write_byte_data(client, reg, val);
+
+        if (ret < 0)
+                dev_err(&client->dev, "Write Error\n");
+
+        return ret;
+}
+
+static int adp5588_gpio_get_value(struct gpio_chip *chip, unsigned off)
+{
+        struct adp5588_gpio *dev =
+            container_of(chip, struct adp5588_gpio, gpio_chip);
+
+        return !!(adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + ADP_BANK(off))
+                  & ADP_BIT(off));
+}
+
+static void adp5588_gpio_set_value(struct gpio_chip *chip,
+                                   unsigned off, int val)
+{
+        unsigned bank, bit;
+        struct adp5588_gpio *dev =
+            container_of(chip, struct adp5588_gpio, gpio_chip);
+
+        bank = ADP_BANK(off);
+        bit = ADP_BIT(off);
+
+        mutex_lock(&dev->lock);
+        if (val)
+                dev->dat_out[bank] |= bit;
+        else
+                dev->dat_out[bank] &= ~bit;
+
+        adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
+                           dev->dat_out[bank]);
+        mutex_unlock(&dev->lock);
+}
+
+static int adp5588_gpio_direction_input(struct gpio_chip *chip, unsigned off)
+{
+        int ret;
+        unsigned bank;
+        struct adp5588_gpio *dev =
+            container_of(chip, struct adp5588_gpio, gpio_chip);
+
+        bank = ADP_BANK(off);
+
+        mutex_lock(&dev->lock);
+        dev->dir[bank] &= ~ADP_BIT(off);
+        ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]);
+        mutex_unlock(&dev->lock);
+
+        return ret;
+}
+
+static int adp5588_gpio_direction_output(struct gpio_chip *chip,
+                                         unsigned off, int val)
+{
+        int ret;
+        unsigned bank, bit;
+        struct adp5588_gpio *dev =
+            container_of(chip, struct adp5588_gpio, gpio_chip);
+
+        bank = ADP_BANK(off);
+        bit = ADP_BIT(off);
+
+        mutex_lock(&dev->lock);
+        dev->dir[bank] |= bit;
+
+        if (val)
+                dev->dat_out[bank] |= bit;
+        else
+                dev->dat_out[bank] &= ~bit;
+
+        ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank,
+                                 dev->dat_out[bank]);
+        ret |= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank,
+                                 dev->dir[bank]);
+        mutex_unlock(&dev->lock);
+
+        return ret;
+}
+
+static int __devinit adp5588_gpio_probe(struct i2c_client *client,
+                                        const struct i2c_device_id *id)
+{
+        struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
+        struct adp5588_gpio *dev;
+        struct gpio_chip *gc;
+        int ret, i, revid;
+
+        if (pdata == NULL) {
+                dev_err(&client->dev, "missing platform data\n");
+                return -ENODEV;
+        }
+
+        if (!i2c_check_functionality(client->adapter,
+                                        I2C_FUNC_SMBUS_BYTE_DATA)) {
+                dev_err(&client->dev, "SMBUS Byte Data not Supported\n");
+                return -EIO;
+        }
+
+        dev = kzalloc(sizeof(*dev), GFP_KERNEL);
+        if (dev == NULL) {
+                dev_err(&client->dev, "failed to alloc memory\n");
+                return -ENOMEM;
+        }
+
+        dev->client = client;
+
+        gc = &dev->gpio_chip;
+        gc->direction_input = adp5588_gpio_direction_input;
+        gc->direction_output = adp5588_gpio_direction_output;
+        gc->get = adp5588_gpio_get_value;
+        gc->set = adp5588_gpio_set_value;
+        gc->can_sleep = 1;
+
+        gc->base = pdata->gpio_start;
+        gc->ngpio = MAXGPIO;
+        gc->label = client->name;
+        gc->owner = THIS_MODULE;
+
+        mutex_init(&dev->lock);
+
+
+        ret = adp5588_gpio_read(dev->client, DEV_ID);
+        if (ret < 0)
+                goto err;
+
+        revid = ret & ADP5588_DEVICE_ID_MASK;
+
+        for (i = 0, ret = 0; i <= ADP_BANK(MAXGPIO); i++) {
+                dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i);
+                dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i);
+                ret |= adp5588_gpio_write(client, KP_GPIO1 + i, 0);
+                ret |= adp5588_gpio_write(client, GPIO_PULL1 + i,
+                                (pdata->pullup_dis_mask >> (8 * i)) & 0xFF);
+
+                if (ret)
+                        goto err;
+        }
+
+        ret = gpiochip_add(&dev->gpio_chip);
+        if (ret)
+                goto err;
+
+        dev_info(&client->dev, "gpios %d..%d on a %s Rev. %d\n",
+                        gc->base, gc->base + gc->ngpio - 1,
+                        client->name, revid);
+
+        if (pdata->setup) {
+                ret = pdata->setup(client, gc->base, gc->ngpio, pdata->context);
+                if (ret < 0)
+                        dev_warn(&client->dev, "setup failed, %d\n", ret);
+        }
+
+        i2c_set_clientdata(client, dev);
+        return 0;
+
+err:
+        kfree(dev);
+        return ret;
+}
+
+static int __devexit adp5588_gpio_remove(struct i2c_client *client)
+{
+        struct adp5588_gpio_platform_data *pdata = client->dev.platform_data;
+        struct adp5588_gpio *dev = i2c_get_clientdata(client);
+        int ret;
+
+        if (pdata->teardown) {
+                ret = pdata->teardown(client,
+                                      dev->gpio_chip.base, dev->gpio_chip.ngpio,
+                                      pdata->context);
+                if (ret < 0) {
+                        dev_err(&client->dev, "teardown failed %d\n", ret);
+                        return ret;
+                }
+        }
+
+        ret = gpiochip_remove(&dev->gpio_chip);
+        if (ret) {
+                dev_err(&client->dev, "gpiochip_remove failed %d\n", ret);
+                return ret;
+        }
+
+        kfree(dev);
+        return 0;
+}
+
+static const struct i2c_device_id adp5588_gpio_id[] = {
+        {DRV_NAME, 0},
+        {}
+};
+
+MODULE_DEVICE_TABLE(i2c, adp5588_gpio_id);
+
+static struct i2c_driver adp5588_gpio_driver = {
+        .driver = {
+                   .name = DRV_NAME,
+                   },
+        .probe = adp5588_gpio_probe,
+        .remove = __devexit_p(adp5588_gpio_remove),
+        .id_table = adp5588_gpio_id,
+};
+
+static int __init adp5588_gpio_init(void)
+{
+        return i2c_add_driver(&adp5588_gpio_driver);
+}
+
+module_init(adp5588_gpio_init);
+
+static void __exit adp5588_gpio_exit(void)
+{
+        i2c_del_driver(&adp5588_gpio_driver);
+}
+
+module_exit(adp5588_gpio_exit);
+
+MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
+MODULE_DESCRIPTION("GPIO ADP5588 Driver");
+MODULE_LICENSE("GPL");
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index a25ad284a272..350842ad3632 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -858,8 +858,6 @@ int gpio_sysfs_set_active_low(unsigned gpio, int value)
         desc = &gpio_desc[gpio];
 
         if (test_bit(FLAG_EXPORT, &desc->flags)) {
-                struct device *dev;
-
                 dev = class_find_device(&gpio_class, NULL, desc, match_export);
                 if (dev == NULL) {
                         status = -ENODEV;
diff --git a/drivers/gpu/drm/ati_pcigart.c b/drivers/gpu/drm/ati_pcigart.c
index 628eae3e9b83..a1fce68e3bbe 100644
--- a/drivers/gpu/drm/ati_pcigart.c
+++ b/drivers/gpu/drm/ati_pcigart.c
@@ -39,8 +39,7 @@ static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
                                        struct drm_ati_pcigart_info *gart_info)
 {
         gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
-                                                PAGE_SIZE,
-                                                gart_info->table_mask);
+                                                PAGE_SIZE);
         if (gart_info->table_handle == NULL)
                 return -ENOMEM;
 
@@ -112,6 +111,13 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
         if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
                 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
 
+                if (pci_set_dma_mask(dev->pdev, gart_info->table_mask)) {
+                        DRM_ERROR("fail to set dma mask to 0x%Lx\n",
+                                  gart_info->table_mask);
+                        ret = 1;
+                        goto done;
+                }
+
                 ret = drm_ati_alloc_pcigart_table(dev, gart_info);
                 if (ret) {
                         DRM_ERROR("cannot allocate PCI GART page!\n");
diff --git a/drivers/gpu/drm/drm_bufs.c b/drivers/gpu/drm/drm_bufs.c
index 3d09e304f6f4..8417cc4c43f1 100644
--- a/drivers/gpu/drm/drm_bufs.c
+++ b/drivers/gpu/drm/drm_bufs.c
@@ -326,7 +326,7 @@ static int drm_addmap_core(struct drm_device * dev, resource_size_t offset,
                  * As we're limiting the address to 2^32-1 (or less),
                  * casting it down to 32 bits is no problem, but we
                  * need to point to a 64bit variable first. */
-                dmah = drm_pci_alloc(dev, map->size, map->size, 0xffffffffUL);
+                dmah = drm_pci_alloc(dev, map->size, map->size);
                 if (!dmah) {
                         kfree(map);
                         return -ENOMEM;
@@ -885,7 +885,7 @@ int drm_addbufs_pci(struct drm_device * dev, struct drm_buf_desc * request)
 
         while (entry->buf_count < count) {
 
-                dmah = drm_pci_alloc(dev, PAGE_SIZE << page_order, 0x1000, 0xfffffffful);
+                dmah = drm_pci_alloc(dev, PAGE_SIZE << page_order, 0x1000);
 
                 if (!dmah) {
                         /* Set count correctly so we free the proper amount. */
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 5124401f266a..d91fb8c0b7b3 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -158,6 +158,7 @@ static struct drm_conn_prop_enum_list drm_connector_enum_list[] =
         { DRM_MODE_CONNECTOR_HDMIA, "HDMI Type A", 0 },
         { DRM_MODE_CONNECTOR_HDMIB, "HDMI Type B", 0 },
         { DRM_MODE_CONNECTOR_TV, "TV", 0 },
+        { DRM_MODE_CONNECTOR_eDP, "Embedded DisplayPort", 0 },
 };
 
 static struct drm_prop_enum_list drm_encoder_enum_list[] =
diff --git a/drivers/gpu/drm/drm_crtc_helper.c b/drivers/gpu/drm/drm_crtc_helper.c
index 4231d6db72ec..7d0f00a935fa 100644
--- a/drivers/gpu/drm/drm_crtc_helper.c
+++ b/drivers/gpu/drm/drm_crtc_helper.c
@@ -216,7 +216,7 @@ bool drm_helper_crtc_in_use(struct drm_crtc *crtc)
 EXPORT_SYMBOL(drm_helper_crtc_in_use);
 
 /**
- * drm_disable_unused_functions - disable unused objects
+ * drm_helper_disable_unused_functions - disable unused objects
  * @dev: DRM device
  *
  * LOCKING:
@@ -702,7 +702,7 @@ bool drm_crtc_helper_set_mode(struct drm_crtc *crtc,
                 if (encoder->crtc != crtc)
                         continue;
 
-                DRM_INFO("%s: set mode %s %x\n", drm_get_encoder_name(encoder),
+                DRM_DEBUG("%s: set mode %s %x\n", drm_get_encoder_name(encoder),
                          mode->name, mode->base.id);
                 encoder_funcs = encoder->helper_private;
                 encoder_funcs->mode_set(encoder, mode, adjusted_mode);
@@ -1032,7 +1032,8 @@ bool drm_helper_initial_config(struct drm_device *dev)
         /*
          * we shouldn't end up with no modes here.
          */
-        WARN(!count, "No connectors reported connected with modes\n");
+        if (count == 0)
+                printk(KERN_INFO "No connectors reported connected with modes\n");
 
         drm_setup_crtcs(dev);
 
@@ -1162,6 +1163,9 @@ EXPORT_SYMBOL(drm_helper_mode_fill_fb_struct);
 int drm_helper_resume_force_mode(struct drm_device *dev)
 {
         struct drm_crtc *crtc;
+        struct drm_encoder *encoder;
+        struct drm_encoder_helper_funcs *encoder_funcs;
+        struct drm_crtc_helper_funcs *crtc_funcs;
         int ret;
 
         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
@@ -1174,6 +1178,25 @@ int drm_helper_resume_force_mode(struct drm_device *dev)
 
                 if (ret == false)
                         DRM_ERROR("failed to set mode on crtc %p\n", crtc);
+
+                /* Turn off outputs that were already powered off */
+                if (drm_helper_choose_crtc_dpms(crtc)) {
+                        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+
+                                if(encoder->crtc != crtc)
+                                        continue;
+
+                                encoder_funcs = encoder->helper_private;
+                                if (encoder_funcs->dpms)
+                                        (*encoder_funcs->dpms) (encoder,
+                                                                drm_helper_choose_encoder_dpms(encoder));
+
+                                crtc_funcs = crtc->helper_private;
+                                if (crtc_funcs->dpms)
+                                        (*crtc_funcs->dpms) (crtc,
+                                                             drm_helper_choose_crtc_dpms(crtc));
+                        }
+                }
         }
         /* disable the unused connectors while restoring the modesetting */
         drm_helper_disable_unused_functions(dev);
diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c
index 5c9f79877cbf..defcaf108460 100644
--- a/drivers/gpu/drm/drm_edid.c
+++ b/drivers/gpu/drm/drm_edid.c
@@ -911,23 +911,27 @@ static int drm_cvt_modes(struct drm_connector *connector,
         struct drm_device *dev = connector->dev;
         struct cvt_timing *cvt;
         const int rates[] = { 60, 85, 75, 60, 50 };
+        const u8 empty[3] = { 0, 0, 0 };
 
         for (i = 0; i < 4; i++) {
                 int uninitialized_var(width), height;
                 cvt = &(timing->data.other_data.data.cvt[i]);
 
-                height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 8) + 1) * 2;
-                switch (cvt->code[1] & 0xc0) {
+                if (!memcmp(cvt->code, empty, 3))
+                        continue;
+
+                height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
+                switch (cvt->code[1] & 0x0c) {
                 case 0x00:
                         width = height * 4 / 3;
                         break;
-                case 0x40:
+                case 0x04:
                         width = height * 16 / 9;
                         break;
-                case 0x80:
+                case 0x08:
                         width = height * 16 / 10;
                         break;
-                case 0xc0:
+                case 0x0c:
                         width = height * 15 / 9;
                         break;
                 }
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c
index 1b49fa055f4f..1c2b7d44ec05 100644
--- a/drivers/gpu/drm/drm_fb_helper.c
+++ b/drivers/gpu/drm/drm_fb_helper.c
@@ -156,7 +156,7 @@ static bool drm_fb_helper_connector_parse_command_line(struct drm_connector *con
                         force = DRM_FORCE_ON;
                         break;
                 case 'D':
-                        if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) ||
+                        if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
                             (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
                                 force = DRM_FORCE_ON;
                         else
@@ -606,11 +606,10 @@ int drm_fb_helper_check_var(struct fb_var_screeninfo *var,
                 return -EINVAL;
 
         /* Need to resize the fb object !!! */
-        if (var->xres > fb->width || var->yres > fb->height) {
-                DRM_ERROR("Requested width/height is greater than current fb "
-                           "object %dx%d > %dx%d\n", var->xres, var->yres,
-                           fb->width, fb->height);
-                DRM_ERROR("Need resizing code.\n");
+        if (var->bits_per_pixel > fb->bits_per_pixel || var->xres > fb->width || var->yres > fb->height) {
+                DRM_DEBUG("fb userspace requested width/height/bpp is greater than current fb "
+                          "object %dx%d-%d > %dx%d-%d\n", var->xres, var->yres, var->bits_per_pixel,
+                          fb->width, fb->height, fb->bits_per_pixel);
                 return -EINVAL;
         }
 
diff --git a/drivers/gpu/drm/drm_irq.c b/drivers/gpu/drm/drm_irq.c
index 7998ee66b317..b98384dbd9a7 100644
--- a/drivers/gpu/drm/drm_irq.c
+++ b/drivers/gpu/drm/drm_irq.c
@@ -115,6 +115,7 @@ void drm_vblank_cleanup(struct drm_device *dev)
 
         dev->num_crtcs = 0;
 }
+EXPORT_SYMBOL(drm_vblank_cleanup);
 
 int drm_vblank_init(struct drm_device *dev, int num_crtcs)
 {
@@ -163,7 +164,6 @@ int drm_vblank_init(struct drm_device *dev, int num_crtcs)
         }
 
         dev->vblank_disable_allowed = 0;
-
         return 0;
 
 err:
@@ -493,6 +493,9 @@ EXPORT_SYMBOL(drm_vblank_off);
  */
 void drm_vblank_pre_modeset(struct drm_device *dev, int crtc)
 {
+        /* vblank is not initialized (IRQ not installed ?) */
+        if (!dev->num_crtcs)
+                return;
         /*
          * To avoid all the problems that might happen if interrupts
          * were enabled/disabled around or between these calls, we just
diff --git a/drivers/gpu/drm/drm_modes.c b/drivers/gpu/drm/drm_modes.c
index 6d81a02463a3..76d63394c776 100644
--- a/drivers/gpu/drm/drm_modes.c
+++ b/drivers/gpu/drm/drm_modes.c
@@ -1,9 +1,4 @@
 /*
- * The list_sort function is (presumably) licensed under the GPL (see the
- * top level "COPYING" file for details).
- *
- * The remainder of this file is:
- *
  * Copyright © 1997-2003 by The XFree86 Project, Inc.
  * Copyright © 2007 Dave Airlie
  * Copyright © 2007-2008 Intel Corporation
@@ -36,6 +31,7 @@
  */
 
 #include <linux/list.h>
+#include <linux/list_sort.h>
 #include "drmP.h"
 #include "drm.h"
 #include "drm_crtc.h"
@@ -855,6 +851,7 @@ EXPORT_SYMBOL(drm_mode_prune_invalid);
 
 /**
  * drm_mode_compare - compare modes for favorability
+ * @priv: unused
  * @lh_a: list_head for first mode
  * @lh_b: list_head for second mode
  *
@@ -868,7 +865,7 @@ EXPORT_SYMBOL(drm_mode_prune_invalid);
  * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
  * positive if @lh_b is better than @lh_a.
  */
-static int drm_mode_compare(struct list_head *lh_a, struct list_head *lh_b)
+static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
 {
         struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
         struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
@@ -885,85 +882,6 @@ static int drm_mode_compare(struct list_head *lh_a, struct list_head *lh_b)
         return diff;
 }
 
-/* FIXME: what we don't have a list sort function? */
-/* list sort from Mark J Roberts (mjr@znex.org) */
-void list_sort(struct list_head *head,
-               int (*cmp)(struct list_head *a, struct list_head *b))
-{
-        struct list_head *p, *q, *e, *list, *tail, *oldhead;
-        int insize, nmerges, psize, qsize, i;
-
-        list = head->next;
-        list_del(head);
-        insize = 1;
-        for (;;) {
-                p = oldhead = list;
-                list = tail = NULL;
-                nmerges = 0;
-
-                while (p) {
-                        nmerges++;
-                        q = p;
-                        psize = 0;
-                        for (i = 0; i < insize; i++) {
-                                psize++;
-                                q = q->next == oldhead ? NULL : q->next;
-                                if (!q)
-                                        break;
-                        }
-
-                        qsize = insize;
-                        while (psize > 0 || (qsize > 0 && q)) {
-                                if (!psize) {
-                                        e = q;
-                                        q = q->next;
-                                        qsize--;
-                                        if (q == oldhead)
-                                                q = NULL;
-                                } else if (!qsize || !q) {
-                                        e = p;
-                                        p = p->next;
-                                        psize--;
-                                        if (p == oldhead)
-                                                p = NULL;
-                                } else if (cmp(p, q) <= 0) {
-                                        e = p;
-                                        p = p->next;
-                                        psize--;
-                                        if (p == oldhead)
-                                                p = NULL;
-                                } else {
-                                        e = q;
-                                        q = q->next;
-                                        qsize--;
-                                        if (q == oldhead)
-                                                q = NULL;
-                                }
-                                if (tail)
-                                        tail->next = e;
-                                else
-                                        list = e;
-                                e->prev = tail;
-                                tail = e;
-                        }
-                        p = q;
-                }
-
-                tail->next = list;
-                list->prev = tail;
-
-                if (nmerges <= 1)
-                        break;
-
-                insize *= 2;
-        }
-
-        head->next = list;
-        head->prev = list->prev;
-        list->prev->next = head;
-        list->prev = head;
-}
-
 /**
  * drm_mode_sort - sort mode list
  * @mode_list: list to sort
@@ -975,7 +893,7 @@ void list_sort(struct list_head *head,
  */
 void drm_mode_sort(struct list_head *mode_list)
 {
-        list_sort(mode_list, drm_mode_compare);
+        list_sort(NULL, mode_list, drm_mode_compare);
 }
 EXPORT_SYMBOL(drm_mode_sort);
 
diff --git a/drivers/gpu/drm/drm_pci.c b/drivers/gpu/drm/drm_pci.c
index 577094fb1995..e68ebf92fa2a 100644
--- a/drivers/gpu/drm/drm_pci.c
+++ b/drivers/gpu/drm/drm_pci.c
@@ -47,8 +47,7 @@
 /**
  * \brief Allocate a PCI consistent memory block, for DMA.
  */
-drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t align,
-                                dma_addr_t maxaddr)
+drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t align)
 {
         drm_dma_handle_t *dmah;
 #if 1
@@ -63,11 +62,6 @@ drm_dma_handle_t *drm_pci_alloc(struct drm_device * dev, size_t size, size_t ali
         if (align > size)
                 return NULL;
 
-        if (pci_set_dma_mask(dev->pdev, maxaddr) != 0) {
-                DRM_ERROR("Setting pci dma mask failed\n");
-                return NULL;
-        }
-
         dmah = kmalloc(sizeof(drm_dma_handle_t), GFP_KERNEL);
         if (!dmah)
                 return NULL;
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 18476bf0b580..9c9998c4dceb 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -272,7 +272,7 @@ static void i915_dump_pages(struct seq_file *m, struct page **pages, int page_co
                 mem = kmap_atomic(pages[page], KM_USER0);
                 for (i = 0; i < PAGE_SIZE; i += 4)
                         seq_printf(m, "%08x :  %08x\n", i, mem[i / 4]);
-                kunmap_atomic(pages[page], KM_USER0);
+                kunmap_atomic(mem, KM_USER0);
         }
 }
 
@@ -386,34 +386,6 @@ out:
         return 0;
 }
 
-static int i915_registers_info(struct seq_file *m, void *data) {
-        struct drm_info_node *node = (struct drm_info_node *) m->private;
-        struct drm_device *dev = node->minor->dev;
-        drm_i915_private_t *dev_priv = dev->dev_private;
-        uint32_t reg;
-
-#define DUMP_RANGE(start, end) \
-        for (reg=start; reg < end; reg += 4) \
-        seq_printf(m, "%08x\t%08x\n", reg, I915_READ(reg));
-
-        DUMP_RANGE(0x00000, 0x00fff);   /* VGA registers */
-        DUMP_RANGE(0x02000, 0x02fff);   /* instruction, memory, interrupt control registers */
-        DUMP_RANGE(0x03000, 0x031ff);   /* FENCE and PPGTT control registers */
-        DUMP_RANGE(0x03200, 0x03fff);   /* frame buffer compression registers */
-        DUMP_RANGE(0x05000, 0x05fff);   /* I/O control registers */
-        DUMP_RANGE(0x06000, 0x06fff);   /* clock control registers */
-        DUMP_RANGE(0x07000, 0x07fff);   /* 3D internal debug registers */
-        DUMP_RANGE(0x07400, 0x088ff);   /* GPE debug registers */
-        DUMP_RANGE(0x0a000, 0x0afff);   /* display palette registers */
-        DUMP_RANGE(0x10000, 0x13fff);   /* MMIO MCHBAR */
-        DUMP_RANGE(0x30000, 0x3ffff);   /* overlay registers */
-        DUMP_RANGE(0x60000, 0x6ffff);   /* display engine pipeline registers */
-        DUMP_RANGE(0x70000, 0x72fff);   /* display and cursor registers */
-        DUMP_RANGE(0x73000, 0x73fff);   /* performance counters */
-
-        return 0;
-}
-
 static int
 i915_wedged_open(struct inode *inode,
                  struct file *filp)
@@ -519,7 +491,6 @@ static int i915_wedged_create(struct dentry *root, struct drm_minor *minor)
 }
 
 static struct drm_info_list i915_debugfs_list[] = {
-        {"i915_regs", i915_registers_info, 0},
         {"i915_gem_active", i915_gem_object_list_info, 0, (void *) ACTIVE_LIST},
         {"i915_gem_flushing", i915_gem_object_list_info, 0, (void *) FLUSHING_LIST},
         {"i915_gem_inactive", i915_gem_object_list_info, 0, (void *) INACTIVE_LIST},
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
index 701bfeac7f57..bbe47812e4b6 100644
--- a/drivers/gpu/drm/i915/i915_dma.c
+++ b/drivers/gpu/drm/i915/i915_dma.c
@@ -123,7 +123,7 @@ static int i915_init_phys_hws(struct drm_device *dev)
         drm_i915_private_t *dev_priv = dev->dev_private;
         /* Program Hardware Status Page */
         dev_priv->status_page_dmah =
-                drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 0xffffffff);
+                drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE);
 
         if (!dev_priv->status_page_dmah) {
                 DRM_ERROR("Can not allocate hardware status page\n");
@@ -813,9 +813,13 @@ static int i915_getparam(struct drm_device *dev, void *data,
         case I915_PARAM_HAS_PAGEFLIPPING:
                 value = 1;
                 break;
+        case I915_PARAM_HAS_EXECBUF2:
+                /* depends on GEM */
+                value = dev_priv->has_gem;
+                break;
         default:
                 DRM_DEBUG_DRIVER("Unknown parameter %d\n",
-                                        param->param);
+                                 param->param);
                 return -EINVAL;
         }
 
@@ -1117,7 +1121,8 @@ static void i915_setup_compression(struct drm_device *dev, int size)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         struct drm_mm_node *compressed_fb, *compressed_llb;
-        unsigned long cfb_base, ll_base;
+        unsigned long cfb_base;
+        unsigned long ll_base = 0;
 
         /* Leave 1M for line length buffer & misc. */
         compressed_fb = drm_mm_search_free(&dev_priv->vram, size, 4096, 0);
@@ -1200,14 +1205,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
         dev->mode_config.fb_base = drm_get_resource_start(dev, fb_bar) &
                 0xff000000;
 
-        if (IS_MOBILE(dev) || IS_I9XX(dev))
-                dev_priv->cursor_needs_physical = true;
-        else
-                dev_priv->cursor_needs_physical = false;
-
-        if (IS_I965G(dev) || IS_G33(dev))
-                dev_priv->cursor_needs_physical = false;
-
         /* Basic memrange allocator for stolen space (aka vram) */
         drm_mm_init(&dev_priv->vram, 0, prealloc_size);
         DRM_INFO("set up %ldM of stolen space\n", prealloc_size / (1024*1024));
@@ -1257,6 +1254,8 @@ static int i915_load_modeset_init(struct drm_device *dev,
         if (ret)
                 goto destroy_ringbuffer;
 
+        intel_modeset_init(dev);
+
         ret = drm_irq_install(dev);
         if (ret)
                 goto destroy_ringbuffer;
@@ -1271,8 +1270,6 @@ static int i915_load_modeset_init(struct drm_device *dev,
 
         I915_WRITE(INSTPM, (1 << 5) | (1 << 21));
 
-        intel_modeset_init(dev);
-
         drm_helper_initial_config(dev);
 
         return 0;
@@ -1360,7 +1357,7 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
         resource_size_t base, size;
-        int ret = 0, mmio_bar = IS_I9XX(dev) ? 0 : 1;
+        int ret = 0, mmio_bar;
         uint32_t agp_size, prealloc_size, prealloc_start;
 
         /* i915 has 4 more counters */
@@ -1376,8 +1373,10 @@ int i915_driver_load(struct drm_device *dev, unsigned long flags)
 
         dev->dev_private = (void *)dev_priv;
         dev_priv->dev = dev;
+        dev_priv->info = (struct intel_device_info *) flags;
 
         /* Add register map (needed for suspend/resume) */
+        mmio_bar = IS_I9XX(dev) ? 0 : 1;
         base = drm_get_resource_start(dev, mmio_bar);
         size = drm_get_resource_len(dev, mmio_bar);
 
@@ -1652,6 +1651,7 @@ struct drm_ioctl_desc i915_ioctls[] = {
         DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
         DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
         DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH),
+        DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH),
         DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
         DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY),
         DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH),
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 24286ca168fc..be631cc3e4dc 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -33,7 +33,6 @@
 #include "i915_drm.h"
 #include "i915_drv.h"
 
-#include "drm_pciids.h"
 #include <linux/console.h>
 #include "drm_crtc_helper.h"
 
@@ -48,8 +47,124 @@ module_param_named(powersave, i915_powersave, int, 0400);
 
 static struct drm_driver driver;
 
-static struct pci_device_id pciidlist[] = {
-        i915_PCI_IDS
+#define INTEL_VGA_DEVICE(id, info) {            \
+        .class = PCI_CLASS_DISPLAY_VGA << 8,    \
+        .class_mask = 0xffff00,                 \
+        .vendor = 0x8086,                       \
+        .device = id,                           \
+        .subvendor = PCI_ANY_ID,                \
+        .subdevice = PCI_ANY_ID,                \
+        .driver_data = (unsigned long) info }
+
+const static struct intel_device_info intel_i830_info = {
+        .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
+};
+
+const static struct intel_device_info intel_845g_info = {
+        .is_i8xx = 1,
+};
+
+const static struct intel_device_info intel_i85x_info = {
+        .is_i8xx = 1, .is_mobile = 1, .cursor_needs_physical = 1,
+};
+
+const static struct intel_device_info intel_i865g_info = {
+        .is_i8xx = 1,
+};
+
+const static struct intel_device_info intel_i915g_info = {
+        .is_i915g = 1, .is_i9xx = 1, .cursor_needs_physical = 1,
+};
+const static struct intel_device_info intel_i915gm_info = {
+        .is_i9xx = 1,  .is_mobile = 1, .has_fbc = 1,
+        .cursor_needs_physical = 1,
+};
+const static struct intel_device_info intel_i945g_info = {
+        .is_i9xx = 1, .has_hotplug = 1, .cursor_needs_physical = 1,
+};
+const static struct intel_device_info intel_i945gm_info = {
+        .is_i945gm = 1, .is_i9xx = 1, .is_mobile = 1, .has_fbc = 1,
+        .has_hotplug = 1, .cursor_needs_physical = 1,
+};
+
+const static struct intel_device_info intel_i965g_info = {
+        .is_i965g = 1, .is_i9xx = 1, .has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_i965gm_info = {
+        .is_i965g = 1, .is_mobile = 1, .is_i965gm = 1, .is_i9xx = 1,
+        .is_mobile = 1, .has_fbc = 1, .has_rc6 = 1,
+        .has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_g33_info = {
+        .is_g33 = 1, .is_i9xx = 1, .need_gfx_hws = 1,
+        .has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_g45_info = {
+        .is_i965g = 1, .is_g4x = 1, .is_i9xx = 1, .need_gfx_hws = 1,
+        .has_pipe_cxsr = 1,
+        .has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_gm45_info = {
+        .is_i965g = 1, .is_mobile = 1, .is_g4x = 1, .is_i9xx = 1,
+        .is_mobile = 1, .need_gfx_hws = 1, .has_fbc = 1, .has_rc6 = 1,
+        .has_pipe_cxsr = 1,
+        .has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_pineview_info = {
+        .is_g33 = 1, .is_pineview = 1, .is_mobile = 1, .is_i9xx = 1,
+        .has_pipe_cxsr = 1,
+        .has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_ironlake_d_info = {
+        .is_ironlake = 1, .is_i965g = 1, .is_i9xx = 1, .need_gfx_hws = 1,
+        .has_pipe_cxsr = 1,
+        .has_hotplug = 1,
+};
+
+const static struct intel_device_info intel_ironlake_m_info = {
+        .is_ironlake = 1, .is_mobile = 1, .is_i965g = 1, .is_i9xx = 1,
+        .need_gfx_hws = 1, .has_rc6 = 1,
+        .has_hotplug = 1,
+};
+
+const static struct pci_device_id pciidlist[] = {
+        INTEL_VGA_DEVICE(0x3577, &intel_i830_info),
+        INTEL_VGA_DEVICE(0x2562, &intel_845g_info),
+        INTEL_VGA_DEVICE(0x3582, &intel_i85x_info),
+        INTEL_VGA_DEVICE(0x35e8, &intel_i85x_info),
+        INTEL_VGA_DEVICE(0x2572, &intel_i865g_info),
+        INTEL_VGA_DEVICE(0x2582, &intel_i915g_info),
+        INTEL_VGA_DEVICE(0x258a, &intel_i915g_info),
+        INTEL_VGA_DEVICE(0x2592, &intel_i915gm_info),
+        INTEL_VGA_DEVICE(0x2772, &intel_i945g_info),
+        INTEL_VGA_DEVICE(0x27a2, &intel_i945gm_info),
+        INTEL_VGA_DEVICE(0x27ae, &intel_i945gm_info),
+        INTEL_VGA_DEVICE(0x2972, &intel_i965g_info),
+        INTEL_VGA_DEVICE(0x2982, &intel_i965g_info),
+        INTEL_VGA_DEVICE(0x2992, &intel_i965g_info),
+        INTEL_VGA_DEVICE(0x29a2, &intel_i965g_info),
+        INTEL_VGA_DEVICE(0x29b2, &intel_g33_info),
+        INTEL_VGA_DEVICE(0x29c2, &intel_g33_info),
+        INTEL_VGA_DEVICE(0x29d2, &intel_g33_info),
+        INTEL_VGA_DEVICE(0x2a02, &intel_i965gm_info),
+        INTEL_VGA_DEVICE(0x2a12, &intel_i965gm_info),
+        INTEL_VGA_DEVICE(0x2a42, &intel_gm45_info),
+        INTEL_VGA_DEVICE(0x2e02, &intel_g45_info),
+        INTEL_VGA_DEVICE(0x2e12, &intel_g45_info),
+        INTEL_VGA_DEVICE(0x2e22, &intel_g45_info),
+        INTEL_VGA_DEVICE(0x2e32, &intel_g45_info),
+        INTEL_VGA_DEVICE(0x2e42, &intel_g45_info),
+        INTEL_VGA_DEVICE(0xa001, &intel_pineview_info),
+        INTEL_VGA_DEVICE(0xa011, &intel_pineview_info),
+        INTEL_VGA_DEVICE(0x0042, &intel_ironlake_d_info),
+        INTEL_VGA_DEVICE(0x0046, &intel_ironlake_m_info),
+        {0, 0, 0}
 };
 
 #if defined(CONFIG_DRM_I915_KMS)
@@ -284,6 +399,52 @@ i915_pci_resume(struct pci_dev *pdev)
         return i915_resume(dev);
 }
 
+static int
+i915_pm_suspend(struct device *dev)
+{
+        return i915_pci_suspend(to_pci_dev(dev), PMSG_SUSPEND);
+}
+
+static int
+i915_pm_resume(struct device *dev)
+{
+        return i915_pci_resume(to_pci_dev(dev));
+}
+
+static int
+i915_pm_freeze(struct device *dev)
+{
+        return i915_pci_suspend(to_pci_dev(dev), PMSG_FREEZE);
+}
+
+static int
+i915_pm_thaw(struct device *dev)
+{
+        /* thaw during hibernate, do nothing! */
+        return 0;
+}
+
+static int
+i915_pm_poweroff(struct device *dev)
+{
+        return i915_pci_suspend(to_pci_dev(dev), PMSG_HIBERNATE);
+}
+
+static int
+i915_pm_restore(struct device *dev)
+{
+        return i915_pci_resume(to_pci_dev(dev));
+}
+
+const struct dev_pm_ops i915_pm_ops = {
+     .suspend = i915_pm_suspend,
+     .resume = i915_pm_resume,
+     .freeze = i915_pm_freeze,
+     .thaw = i915_pm_thaw,
+     .poweroff = i915_pm_poweroff,
+     .restore = i915_pm_restore,
+};
+
 static struct vm_operations_struct i915_gem_vm_ops = {
         .fault = i915_gem_fault,
         .open = drm_gem_vm_open,
@@ -344,10 +505,7 @@ static struct drm_driver driver = {
                  .id_table = pciidlist,
                  .probe = i915_pci_probe,
                  .remove = i915_pci_remove,
-#ifdef CONFIG_PM
-                 .resume = i915_pci_resume,
-                 .suspend = i915_pci_suspend,
-#endif
+                 .driver.pm = &i915_pm_ops,
         },
 
         .name = DRIVER_NAME,
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index fbecac72f5bb..29dd67626967 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -172,9 +172,31 @@ struct drm_i915_display_funcs {
 
 struct intel_overlay;
 
+struct intel_device_info {
+        u8 is_mobile : 1;
+        u8 is_i8xx : 1;
+        u8 is_i915g : 1;
+        u8 is_i9xx : 1;
+        u8 is_i945gm : 1;
+        u8 is_i965g : 1;
+        u8 is_i965gm : 1;
+        u8 is_g33 : 1;
+        u8 need_gfx_hws : 1;
+        u8 is_g4x : 1;
+        u8 is_pineview : 1;
+        u8 is_ironlake : 1;
+        u8 has_fbc : 1;
+        u8 has_rc6 : 1;
+        u8 has_pipe_cxsr : 1;
+        u8 has_hotplug : 1;
+        u8 cursor_needs_physical : 1;
+};
+
 typedef struct drm_i915_private {
         struct drm_device *dev;
 
+        const struct intel_device_info *info;
+
         int has_gem;
 
         void __iomem *regs;
@@ -232,8 +254,6 @@ typedef struct drm_i915_private {
         int hangcheck_count;
         uint32_t last_acthd;
 
-        bool cursor_needs_physical;
-
         struct drm_mm vram;
 
         unsigned long cfb_size;
@@ -287,8 +307,6 @@ typedef struct drm_i915_private {
         u32 saveDSPACNTR;
         u32 saveDSPBCNTR;
         u32 saveDSPARB;
-        u32 saveRENDERSTANDBY;
-        u32 savePWRCTXA;
         u32 saveHWS;
         u32 savePIPEACONF;
         u32 savePIPEBCONF;
@@ -561,6 +579,7 @@ typedef struct drm_i915_private {
         u16 orig_clock;
         int child_dev_num;
         struct child_device_config *child_dev;
+        struct drm_connector *int_lvds_connector;
 } drm_i915_private_t;
 
 /** driver private structure attached to each drm_gem_object */
@@ -794,6 +813,8 @@ int i915_gem_sw_finish_ioctl(struct drm_device *dev, void *data,
                              struct drm_file *file_priv);
 int i915_gem_execbuffer(struct drm_device *dev, void *data,
                         struct drm_file *file_priv);
+int i915_gem_execbuffer2(struct drm_device *dev, void *data,
+                         struct drm_file *file_priv);
 int i915_gem_pin_ioctl(struct drm_device *dev, void *data,
                        struct drm_file *file_priv);
 int i915_gem_unpin_ioctl(struct drm_device *dev, void *data,
@@ -860,6 +881,9 @@ void i915_gem_shrinker_exit(void);
 void i915_gem_detect_bit_6_swizzle(struct drm_device *dev);
 void i915_gem_object_do_bit_17_swizzle(struct drm_gem_object *obj);
 void i915_gem_object_save_bit_17_swizzle(struct drm_gem_object *obj);
+bool i915_tiling_ok(struct drm_device *dev, int stride, int size,
+                    int tiling_mode);
+bool i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj);
 
 /* i915_gem_debug.c */
 void i915_gem_dump_object(struct drm_gem_object *obj, int len,
@@ -982,67 +1006,33 @@ extern void g4x_disable_fbc(struct drm_device *dev);
 extern int i915_wrap_ring(struct drm_device * dev);
 extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 
-#define IS_I830(dev) ((dev)->pci_device == 0x3577)
-#define IS_845G(dev) ((dev)->pci_device == 0x2562)
-#define IS_I85X(dev) ((dev)->pci_device == 0x3582)
-#define IS_I865G(dev) ((dev)->pci_device == 0x2572)
-#define IS_I8XX(dev) (IS_I830(dev) || IS_845G(dev) || IS_I85X(dev) || IS_I865G(dev))
-
-#define IS_I915G(dev) ((dev)->pci_device == 0x2582 || (dev)->pci_device == 0x258a)
-#define IS_I915GM(dev) ((dev)->pci_device == 0x2592)
-#define IS_I945G(dev) ((dev)->pci_device == 0x2772)
-#define IS_I945GM(dev) ((dev)->pci_device == 0x27A2 ||\
-                        (dev)->pci_device == 0x27AE)
-#define IS_I965G(dev) ((dev)->pci_device == 0x2972 || \
-                       (dev)->pci_device == 0x2982 || \
-                       (dev)->pci_device == 0x2992 || \
-                       (dev)->pci_device == 0x29A2 || \
-                       (dev)->pci_device == 0x2A02 || \
-                       (dev)->pci_device == 0x2A12 || \
-                       (dev)->pci_device == 0x2A42 || \
-                       (dev)->pci_device == 0x2E02 || \
-                       (dev)->pci_device == 0x2E12 || \
-                       (dev)->pci_device == 0x2E22 || \
-                       (dev)->pci_device == 0x2E32 || \
-                       (dev)->pci_device == 0x2E42 || \
-                       (dev)->pci_device == 0x0042 || \
-                       (dev)->pci_device == 0x0046)
-
-#define IS_I965GM(dev) ((dev)->pci_device == 0x2A02 || \
-                        (dev)->pci_device == 0x2A12)
-
-#define IS_GM45(dev) ((dev)->pci_device == 0x2A42)
-
-#define IS_G4X(dev) ((dev)->pci_device == 0x2E02 || \
-                     (dev)->pci_device == 0x2E12 || \
-                     (dev)->pci_device == 0x2E22 || \
-                     (dev)->pci_device == 0x2E32 || \
-                     (dev)->pci_device == 0x2E42 || \
-                     IS_GM45(dev))
-
-#define IS_PINEVIEW_G(dev) ((dev)->pci_device == 0xa001)
-#define IS_PINEVIEW_M(dev) ((dev)->pci_device == 0xa011)
-#define IS_PINEVIEW(dev) (IS_PINEVIEW_G(dev) || IS_PINEVIEW_M(dev))
-
-#define IS_G33(dev)    ((dev)->pci_device == 0x29C2 ||  \
-                        (dev)->pci_device == 0x29B2 ||  \
-                        (dev)->pci_device == 0x29D2 ||  \
-                        (IS_PINEVIEW(dev)))
-
+#define INTEL_INFO(dev) (((struct drm_i915_private *) (dev)->dev_private)->info)
+
+#define IS_I830(dev)            ((dev)->pci_device == 0x3577)
+#define IS_845G(dev)            ((dev)->pci_device == 0x2562)
+#define IS_I85X(dev)            ((dev)->pci_device == 0x3582)
+#define IS_I865G(dev)           ((dev)->pci_device == 0x2572)
+#define IS_I8XX(dev)            (INTEL_INFO(dev)->is_i8xx)
+#define IS_I915G(dev)           (INTEL_INFO(dev)->is_i915g)
+#define IS_I915GM(dev)          ((dev)->pci_device == 0x2592)
+#define IS_I945G(dev)           ((dev)->pci_device == 0x2772)
+#define IS_I945GM(dev)          (INTEL_INFO(dev)->is_i945gm)
+#define IS_I965G(dev)           (INTEL_INFO(dev)->is_i965g)
+#define IS_I965GM(dev)          (INTEL_INFO(dev)->is_i965gm)
+#define IS_GM45(dev)            ((dev)->pci_device == 0x2A42)
+#define IS_G4X(dev)             (INTEL_INFO(dev)->is_g4x)
+#define IS_PINEVIEW_G(dev)      ((dev)->pci_device == 0xa001)
+#define IS_PINEVIEW_M(dev)      ((dev)->pci_device == 0xa011)
+#define IS_PINEVIEW(dev)        (INTEL_INFO(dev)->is_pineview)
+#define IS_G33(dev)             (INTEL_INFO(dev)->is_g33)
 #define IS_IRONLAKE_D(dev)      ((dev)->pci_device == 0x0042)
 #define IS_IRONLAKE_M(dev)      ((dev)->pci_device == 0x0046)
-#define IS_IRONLAKE(dev)        (IS_IRONLAKE_D(dev) || IS_IRONLAKE_M(dev))
-
-#define IS_I9XX(dev) (IS_I915G(dev) || IS_I915GM(dev) || IS_I945G(dev) || \
-                      IS_I945GM(dev) || IS_I965G(dev) || IS_G33(dev) || \
-                      IS_IRONLAKE(dev))
+#define IS_IRONLAKE(dev)        (INTEL_INFO(dev)->is_ironlake)
+#define IS_I9XX(dev)            (INTEL_INFO(dev)->is_i9xx)
+#define IS_MOBILE(dev)          (INTEL_INFO(dev)->is_mobile)
 
-#define IS_MOBILE(dev) (IS_I830(dev) || IS_I85X(dev) || IS_I915GM(dev) || \
-                        IS_I945GM(dev) || IS_I965GM(dev) || IS_GM45(dev) || \
-                        IS_PINEVIEW(dev) || IS_IRONLAKE_M(dev))
+#define I915_NEED_GFX_HWS(dev)  (INTEL_INFO(dev)->need_gfx_hws)
 
-#define I915_NEED_GFX_HWS(dev) (IS_G33(dev) || IS_GM45(dev) || IS_G4X(dev) || \
-                                IS_IRONLAKE(dev))
 /* With the 945 and later, Y tiling got adjusted so that it was 32 128-byte
  * rows, which changed the alignment requirements and fence programming.
  */
@@ -1054,17 +1044,14 @@ extern int i915_wait_ring(struct drm_device * dev, int n, const char *caller);
 #define SUPPORTS_EDP(dev)               (IS_IRONLAKE_M(dev))
 #define SUPPORTS_TV(dev)                (IS_I9XX(dev) && IS_MOBILE(dev) && \
                                         !IS_IRONLAKE(dev) && !IS_PINEVIEW(dev))
-#define I915_HAS_HOTPLUG(dev) (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev) || IS_I965G(dev))
+#define I915_HAS_HOTPLUG(dev)            (INTEL_INFO(dev)->has_hotplug)
 /* dsparb controlled by hw only */
 #define DSPARB_HWCONTROL(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
 
 #define HAS_FW_BLC(dev) (IS_I9XX(dev) || IS_G4X(dev) || IS_IRONLAKE(dev))
-#define HAS_PIPE_CXSR(dev) (IS_G4X(dev) || IS_IRONLAKE(dev))
-#define I915_HAS_FBC(dev) (IS_MOBILE(dev) && \
-                           (IS_I9XX(dev) || IS_GM45(dev)) && \
-                           !IS_PINEVIEW(dev) && \
-                           !IS_IRONLAKE(dev))
-#define I915_HAS_RC6(dev) (IS_I965GM(dev) || IS_GM45(dev) || IS_IRONLAKE_M(dev))
+#define HAS_PIPE_CXSR(dev) (INTEL_INFO(dev)->has_pipe_cxsr)
+#define I915_HAS_FBC(dev) (INTEL_INFO(dev)->has_fbc)
+#define I915_HAS_RC6(dev) (INTEL_INFO(dev)->has_rc6)
 
 #define PRIMARY_RINGBUFFER_SIZE         (128*1024)
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 8c463cf2050a..2748609f05b3 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2021,9 +2021,6 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
         /* blow away mappings if mapped through GTT */
         i915_gem_release_mmap(obj);
 
-        if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
-                i915_gem_clear_fence_reg(obj);
-
         /* Move the object to the CPU domain to ensure that
          * any possible CPU writes while it's not in the GTT
          * are flushed when we go to remap it. This will
@@ -2039,6 +2036,10 @@ i915_gem_object_unbind(struct drm_gem_object *obj)
 
         BUG_ON(obj_priv->active);
 
+        /* release the fence reg _after_ flushing */
+        if (obj_priv->fence_reg != I915_FENCE_REG_NONE)
+                i915_gem_clear_fence_reg(obj);
+
         if (obj_priv->agp_mem != NULL) {
                 drm_unbind_agp(obj_priv->agp_mem);
                 drm_free_agp(obj_priv->agp_mem, obj->size / PAGE_SIZE);
@@ -2581,9 +2582,6 @@ i915_gem_object_bind_to_gtt(struct drm_gem_object *obj, unsigned alignment)
         bool retry_alloc = false;
         int ret;
 
-        if (dev_priv->mm.suspended)
-                return -EBUSY;
-
         if (obj_priv->madv != I915_MADV_WILLNEED) {
                 DRM_ERROR("Attempting to bind a purgeable object\n");
                 return -EINVAL;
@@ -3198,7 +3196,7 @@ i915_gem_object_set_cpu_read_domain_range(struct drm_gem_object *obj,
 static int
 i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
                                  struct drm_file *file_priv,
-                                 struct drm_i915_gem_exec_object *entry,
+                                 struct drm_i915_gem_exec_object2 *entry,
                                  struct drm_i915_gem_relocation_entry *relocs)
 {
         struct drm_device *dev = obj->dev;
@@ -3206,12 +3204,35 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
         struct drm_i915_gem_object *obj_priv = obj->driver_private;
         int i, ret;
         void __iomem *reloc_page;
+        bool need_fence;
+
+        need_fence = entry->flags & EXEC_OBJECT_NEEDS_FENCE &&
+                     obj_priv->tiling_mode != I915_TILING_NONE;
+
+        /* Check fence reg constraints and rebind if necessary */
+        if (need_fence && !i915_obj_fenceable(dev, obj))
+                i915_gem_object_unbind(obj);
 
         /* Choose the GTT offset for our buffer and put it there. */
         ret = i915_gem_object_pin(obj, (uint32_t) entry->alignment);
         if (ret)
                 return ret;
 
+        /*
+         * Pre-965 chips need a fence register set up in order to
+         * properly handle blits to/from tiled surfaces.
+         */
+        if (need_fence) {
+                ret = i915_gem_object_get_fence_reg(obj);
+                if (ret != 0) {
+                        if (ret != -EBUSY && ret != -ERESTARTSYS)
+                                DRM_ERROR("Failure to install fence: %d\n",
+                                          ret);
+                        i915_gem_object_unpin(obj);
+                        return ret;
+                }
+        }
+
         entry->offset = obj_priv->gtt_offset;
 
         /* Apply the relocations, using the GTT aperture to avoid cache
@@ -3373,7 +3394,7 @@ i915_gem_object_pin_and_relocate(struct drm_gem_object *obj,
  */
 static int
 i915_dispatch_gem_execbuffer(struct drm_device *dev,
-                              struct drm_i915_gem_execbuffer *exec,
+                              struct drm_i915_gem_execbuffer2 *exec,
                               struct drm_clip_rect *cliprects,
                               uint64_t exec_offset)
 {
@@ -3463,7 +3484,7 @@ i915_gem_ring_throttle(struct drm_device *dev, struct drm_file *file_priv)
 }
 
 static int
-i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
+i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object2 *exec_list,
                               uint32_t buffer_count,
                               struct drm_i915_gem_relocation_entry **relocs)
 {
@@ -3478,8 +3499,10 @@ i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
         }
 
         *relocs = drm_calloc_large(reloc_count, sizeof(**relocs));
-        if (*relocs == NULL)
+        if (*relocs == NULL) {
+                DRM_ERROR("failed to alloc relocs, count %d\n", reloc_count);
                 return -ENOMEM;
+        }
 
         for (i = 0; i < buffer_count; i++) {
                 struct drm_i915_gem_relocation_entry __user *user_relocs;
@@ -3503,7 +3526,7 @@ i915_gem_get_relocs_from_user(struct drm_i915_gem_exec_object *exec_list,
 }
 
 static int
-i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object *exec_list,
+i915_gem_put_relocs_to_user(struct drm_i915_gem_exec_object2 *exec_list,
                             uint32_t buffer_count,
                             struct drm_i915_gem_relocation_entry *relocs)
 {
@@ -3536,7 +3559,7 @@ err:
 }
 
 static int
-i915_gem_check_execbuffer (struct drm_i915_gem_execbuffer *exec,
+i915_gem_check_execbuffer (struct drm_i915_gem_execbuffer2 *exec,
                            uint64_t exec_offset)
 {
         uint32_t exec_start, exec_len;
@@ -3589,18 +3612,18 @@ i915_gem_wait_for_pending_flip(struct drm_device *dev,
 }
 
 int
-i915_gem_execbuffer(struct drm_device *dev, void *data,
-                    struct drm_file *file_priv)
+i915_gem_do_execbuffer(struct drm_device *dev, void *data,
+                       struct drm_file *file_priv,
+                       struct drm_i915_gem_execbuffer2 *args,
+                       struct drm_i915_gem_exec_object2 *exec_list)
 {
         drm_i915_private_t *dev_priv = dev->dev_private;
-        struct drm_i915_gem_execbuffer *args = data;
-        struct drm_i915_gem_exec_object *exec_list = NULL;
         struct drm_gem_object **object_list = NULL;
         struct drm_gem_object *batch_obj;
         struct drm_i915_gem_object *obj_priv;
         struct drm_clip_rect *cliprects = NULL;
         struct drm_i915_gem_relocation_entry *relocs;
-        int ret, ret2, i, pinned = 0;
+        int ret = 0, ret2, i, pinned = 0;
         uint64_t exec_offset;
         uint32_t seqno, flush_domains, reloc_index;
         int pin_tries, flips;
@@ -3614,25 +3637,13 @@ i915_gem_execbuffer(struct drm_device *dev, void *data,
                 DRM_ERROR("execbuf with %d buffers\n", args->buffer_count);
                 return -EINVAL;
         }
-        /* Copy in the exec list from userland */
-        exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
         object_list = drm_malloc_ab(sizeof(*object_list), args->buffer_count);
-        if (exec_list == NULL || object_list == NULL) {
-                DRM_ERROR("Failed to allocate exec or object list "
-                          "for %d buffers\n",
+        if (object_list == NULL) {
+                DRM_ERROR("Failed to allocate object list for %d buffers\n",
                           args->buffer_count);
                 ret = -ENOMEM;
                 goto pre_mutex_err;
         }
-        ret = copy_from_user(exec_list,
-                             (struct drm_i915_relocation_entry __user *)
-                             (uintptr_t) args->buffers_ptr,
-                             sizeof(*exec_list) * args->buffer_count);
-        if (ret != 0) {
-                DRM_ERROR("copy %d exec entries failed %d\n",
-                          args->buffer_count, ret);
-                goto pre_mutex_err;
-        }
 
         if (args->num_cliprects != 0) {
                 cliprects = kcalloc(args->num_cliprects, sizeof(*cliprects),
@@ -3884,20 +3895,6 @@ err:
 
         mutex_unlock(&dev->struct_mutex);
 
-        if (!ret) {
-                /* Copy the new buffer offsets back to the user's exec list. */
-                ret = copy_to_user((struct drm_i915_relocation_entry __user *)
-                                   (uintptr_t) args->buffers_ptr,
-                                   exec_list,
-                                   sizeof(*exec_list) * args->buffer_count);
-                if (ret) {
-                        ret = -EFAULT;
-                        DRM_ERROR("failed to copy %d exec entries "
-                                  "back to user (%d)\n",
-                                  args->buffer_count, ret);
-                }
-        }
-
         /* Copy the updated relocations out regardless of current error
          * state.  Failure to update the relocs would mean that the next
          * time userland calls execbuf, it would do so with presumed offset
@@ -3914,12 +3911,158 @@ err:
 
 pre_mutex_err:
         drm_free_large(object_list);
-        drm_free_large(exec_list);
         kfree(cliprects);
 
         return ret;
 }
 
+/*
+ * Legacy execbuffer just creates an exec2 list from the original exec object
+ * list array and passes it to the real function.
+ */
+int
+i915_gem_execbuffer(struct drm_device *dev, void *data,
+                    struct drm_file *file_priv)
+{
+        struct drm_i915_gem_execbuffer *args = data;
+        struct drm_i915_gem_execbuffer2 exec2;
+        struct drm_i915_gem_exec_object *exec_list = NULL;
+        struct drm_i915_gem_exec_object2 *exec2_list = NULL;
+        int ret, i;
+
+#if WATCH_EXEC
+        DRM_INFO("buffers_ptr %d buffer_count %d len %08x\n",
+                  (int) args->buffers_ptr, args->buffer_count, args->batch_len);
+#endif
+
+        if (args->buffer_count < 1) {
+                DRM_ERROR("execbuf with %d buffers\n", args->buffer_count);
+                return -EINVAL;
+        }
+
+        /* Copy in the exec list from userland */
+        exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count);
+        exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
+        if (exec_list == NULL || exec2_list == NULL) {
+                DRM_ERROR("Failed to allocate exec list for %d buffers\n",
+                          args->buffer_count);
+                drm_free_large(exec_list);
+                drm_free_large(exec2_list);
+                return -ENOMEM;
+        }
+        ret = copy_from_user(exec_list,
+                             (struct drm_i915_relocation_entry __user *)
+                             (uintptr_t) args->buffers_ptr,
+                             sizeof(*exec_list) * args->buffer_count);
+        if (ret != 0) {
+                DRM_ERROR("copy %d exec entries failed %d\n",
+                          args->buffer_count, ret);
+                drm_free_large(exec_list);
+                drm_free_large(exec2_list);
+                return -EFAULT;
+        }
+
+        for (i = 0; i < args->buffer_count; i++) {
+                exec2_list[i].handle = exec_list[i].handle;
+                exec2_list[i].relocation_count = exec_list[i].relocation_count;
+                exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr;
+                exec2_list[i].alignment = exec_list[i].alignment;
+                exec2_list[i].offset = exec_list[i].offset;
+                if (!IS_I965G(dev))
+                        exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE;
+                else
+                        exec2_list[i].flags = 0;
+        }
+
+        exec2.buffers_ptr = args->buffers_ptr;
+        exec2.buffer_count = args->buffer_count;
+        exec2.batch_start_offset = args->batch_start_offset;
+        exec2.batch_len = args->batch_len;
+        exec2.DR1 = args->DR1;
+        exec2.DR4 = args->DR4;
+        exec2.num_cliprects = args->num_cliprects;
+        exec2.cliprects_ptr = args->cliprects_ptr;
+        exec2.flags = 0;
+
+        ret = i915_gem_do_execbuffer(dev, data, file_priv, &exec2, exec2_list);
+        if (!ret) {
+                /* Copy the new buffer offsets back to the user's exec list. */
+                for (i = 0; i < args->buffer_count; i++)
+                        exec_list[i].offset = exec2_list[i].offset;
+                /* ... and back out to userspace */
+                ret = copy_to_user((struct drm_i915_relocation_entry __user *)
+                                   (uintptr_t) args->buffers_ptr,
+                                   exec_list,
+                                   sizeof(*exec_list) * args->buffer_count);
+                if (ret) {
+                        ret = -EFAULT;
+                        DRM_ERROR("failed to copy %d exec entries "
+                                  "back to user (%d)\n",
+                                  args->buffer_count, ret);
+                }
+        } else {
+                DRM_ERROR("i915_gem_do_execbuffer returns %d\n", ret);
+        }
+
+        drm_free_large(exec_list);
+        drm_free_large(exec2_list);
+        return ret;
+}
+
+int
+i915_gem_execbuffer2(struct drm_device *dev, void *data,
+                     struct drm_file *file_priv)
+{
+        struct drm_i915_gem_execbuffer2 *args = data;
+        struct drm_i915_gem_exec_object2 *exec2_list = NULL;
+        int ret;
+
+#if WATCH_EXEC
+        DRM_INFO("buffers_ptr %d buffer_count %d len %08x\n",
+                  (int) args->buffers_ptr, args->buffer_count, args->batch_len);
+#endif
+
+        if (args->buffer_count < 1) {
+                DRM_ERROR("execbuf2 with %d buffers\n", args->buffer_count);
+                return -EINVAL;
+        }
+
+        exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count);
+        if (exec2_list == NULL) {
+                DRM_ERROR("Failed to allocate exec list for %d buffers\n",
+                          args->buffer_count);
+                return -ENOMEM;
+        }
+        ret = copy_from_user(exec2_list,
+                             (struct drm_i915_relocation_entry __user *)
+                             (uintptr_t) args->buffers_ptr,
+                             sizeof(*exec2_list) * args->buffer_count);
+        if (ret != 0) {
+                DRM_ERROR("copy %d exec entries failed %d\n",
+                          args->buffer_count, ret);
+                drm_free_large(exec2_list);
+                return -EFAULT;
+        }
+
+        ret = i915_gem_do_execbuffer(dev, data, file_priv, args, exec2_list);
+        if (!ret) {
+                /* Copy the new buffer offsets back to the user's exec list. */
+                ret = copy_to_user((struct drm_i915_relocation_entry __user *)
+                                   (uintptr_t) args->buffers_ptr,
+                                   exec2_list,
+                                   sizeof(*exec2_list) * args->buffer_count);
+                if (ret) {
+                        ret = -EFAULT;
+                        DRM_ERROR("failed to copy %d exec entries "
+                                  "back to user (%d)\n",
+                                  args->buffer_count, ret);
+                }
+        }
+
+        drm_free_large(exec2_list);
+        return ret;
+}
+
 int
 i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment)
 {
@@ -3933,19 +4076,7 @@ i915_gem_object_pin(struct drm_gem_object *obj, uint32_t alignment)
                 if (ret)
                         return ret;
         }
-        /*
-         * Pre-965 chips need a fence register set up in order to
-         * properly handle tiled surfaces.
-         */
-        if (!IS_I965G(dev) && obj_priv->tiling_mode != I915_TILING_NONE) {
-                ret = i915_gem_object_get_fence_reg(obj);
-                if (ret != 0) {
-                        if (ret != -EBUSY && ret != -ERESTARTSYS)
-                                DRM_ERROR("Failure to install fence: %d\n",
-                                          ret);
-                        return ret;
-                }
-        }
+
         obj_priv->pin_count++;
 
         /* If the object is not active and not pending a flush,
@@ -4708,7 +4839,7 @@ int i915_gem_init_phys_object(struct drm_device *dev,
 
         phys_obj->id = id;
 
-        phys_obj->handle = drm_pci_alloc(dev, size, 0, 0xffffffff);
+        phys_obj->handle = drm_pci_alloc(dev, size, 0);
         if (!phys_obj->handle) {
                 ret = -ENOMEM;
                 goto kfree_obj;
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 30d6af6c09bb..df278b2685bf 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -304,35 +304,39 @@ i915_gem_detect_bit_6_swizzle(struct drm_device *dev)
 
 
 /**
- * Returns the size of the fence for a tiled object of the given size.
+ * Returns whether an object is currently fenceable.  If not, it may need
+ * to be unbound and have its pitch adjusted.
  */
-static int
-i915_get_fence_size(struct drm_device *dev, int size)
+bool
+i915_obj_fenceable(struct drm_device *dev, struct drm_gem_object *obj)
 {
-        int i;
-        int start;
+        struct drm_i915_gem_object *obj_priv = obj->driver_private;
 
         if (IS_I965G(dev)) {
                 /* The 965 can have fences at any page boundary. */
-                return ALIGN(size, 4096);
+                if (obj->size & 4095)
+                        return false;
+                return true;
+        } else if (IS_I9XX(dev)) {
+                if (obj_priv->gtt_offset & ~I915_FENCE_START_MASK)
+                        return false;
         } else {
-                /* Align the size to a power of two greater than the smallest
-                 * fence size.
-                 */
-                if (IS_I9XX(dev))
-                        start = 1024 * 1024;
-                else
-                        start = 512 * 1024;
+                if (obj_priv->gtt_offset & ~I830_FENCE_START_MASK)
+                        return false;
+        }
 
-                for (i = start; i < size; i <<= 1)
-                        ;
+        /* Power of two sized... */
+        if (obj->size & (obj->size - 1))
+                return false;
 
-                return i;
-        }
+        /* Objects must be size aligned as well */
+        if (obj_priv->gtt_offset & (obj->size - 1))
+                return false;
+        return true;
 }
 
 /* Check pitch constriants for all chips & tiling formats */
-static bool
+bool
 i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
 {
         int tile_width;
@@ -384,12 +388,6 @@ i915_tiling_ok(struct drm_device *dev, int stride, int size, int tiling_mode)
         if (stride & (stride - 1))
                 return false;
 
-        /* We don't 0handle the aperture area covered by the fence being bigger
-         * than the object size.
-         */
-        if (i915_get_fence_size(dev, size) != size)
-                return false;
-
         return true;
 }
 
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 85f4c5de97e2..7cd8110051b6 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -313,6 +313,8 @@ irqreturn_t ironlake_irq_handler(struct drm_device *dev)
                         dev_priv->mm.irq_gem_seqno = seqno;
                         trace_i915_gem_request_complete(dev, seqno);
                         DRM_WAKEUP(&dev_priv->irq_queue);
+                        dev_priv->hangcheck_count = 0;
+                        mod_timer(&dev_priv->hangcheck_timer, jiffies + DRM_I915_HANGCHECK_PERIOD);
                 }
 
                 if (de_iir & DE_GSE)
@@ -1084,6 +1086,10 @@ void i915_driver_irq_preinstall(struct drm_device * dev)
         (void) I915_READ(IER);
 }
 
+/*
+ * Must be called after intel_modeset_init or hotplug interrupts won't be
+ * enabled correctly.
+ */
 int i915_driver_irq_postinstall(struct drm_device *dev)
 {
         drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
@@ -1106,19 +1112,23 @@ int i915_driver_irq_postinstall(struct drm_device *dev)
         if (I915_HAS_HOTPLUG(dev)) {
                 u32 hotplug_en = I915_READ(PORT_HOTPLUG_EN);
 
-                /* Leave other bits alone */
-                hotplug_en |= HOTPLUG_EN_MASK;
+                /* Note HDMI and DP share bits */
+                if (dev_priv->hotplug_supported_mask & HDMIB_HOTPLUG_INT_STATUS)
+                        hotplug_en |= HDMIB_HOTPLUG_INT_EN;
+                if (dev_priv->hotplug_supported_mask & HDMIC_HOTPLUG_INT_STATUS)
+                        hotplug_en |= HDMIC_HOTPLUG_INT_EN;
+                if (dev_priv->hotplug_supported_mask & HDMID_HOTPLUG_INT_STATUS)
+                        hotplug_en |= HDMID_HOTPLUG_INT_EN;
+                if (dev_priv->hotplug_supported_mask & SDVOC_HOTPLUG_INT_STATUS)
+                        hotplug_en |= SDVOC_HOTPLUG_INT_EN;
+                if (dev_priv->hotplug_supported_mask & SDVOB_HOTPLUG_INT_STATUS)
+                        hotplug_en |= SDVOB_HOTPLUG_INT_EN;
+                if (dev_priv->hotplug_supported_mask & CRT_HOTPLUG_INT_STATUS)
+                        hotplug_en |= CRT_HOTPLUG_INT_EN;
+                /* Ignore TV since it's buggy */
+
                 I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
 
-                dev_priv->hotplug_supported_mask = CRT_HOTPLUG_INT_STATUS |
-                        TV_HOTPLUG_INT_STATUS | SDVOC_HOTPLUG_INT_STATUS |
-                        SDVOB_HOTPLUG_INT_STATUS;
-                if (IS_G4X(dev)) {
-                        dev_priv->hotplug_supported_mask |=
-                                HDMIB_HOTPLUG_INT_STATUS |
-                                HDMIC_HOTPLUG_INT_STATUS |
-                                HDMID_HOTPLUG_INT_STATUS;
-                }
                 /* Enable in IER... */
                 enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
                 /* and unmask in IMR */
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
index 974b3cf70618..149d360d64a3 100644
--- a/drivers/gpu/drm/i915/i915_reg.h
+++ b/drivers/gpu/drm/i915/i915_reg.h
@@ -879,13 +879,6 @@
 #define CRT_HOTPLUG_DETECT_VOLTAGE_475MV        (1 << 2)
 #define CRT_HOTPLUG_MASK                        (0x3fc) /* Bits 9-2 */
 #define CRT_FORCE_HOTPLUG_MASK                  0xfffffe1f
-#define HOTPLUG_EN_MASK (HDMIB_HOTPLUG_INT_EN | \
-                         HDMIC_HOTPLUG_INT_EN |   \
-                         HDMID_HOTPLUG_INT_EN |   \
-                         SDVOB_HOTPLUG_INT_EN |   \
-                         SDVOC_HOTPLUG_INT_EN |   \
-                         CRT_HOTPLUG_INT_EN)
-
 
 #define PORT_HOTPLUG_STAT       0x61114
 #define   HDMIB_HOTPLUG_INT_STATUS              (1 << 29)
@@ -982,6 +975,8 @@
 #define   LVDS_PORT_EN                  (1 << 31)
 /* Selects pipe B for LVDS data.  Must be set on pre-965. */
 #define   LVDS_PIPEB_SELECT             (1 << 30)
+/* LVDS dithering flag on 965/g4x platform */
+#define   LVDS_ENABLE_DITHER            (1 << 25)
 /* Enable border for unscaled (or aspect-scaled) display */
 #define   LVDS_BORDER_ENABLE            (1 << 15)
 /*
@@ -1751,6 +1746,8 @@
 
 /* Display & cursor control */
 
+/* dithering flag on Ironlake */
+#define PIPE_ENABLE_DITHER      (1 << 4)
 /* Pipe A */
 #define PIPEADSL                0x70000
 #define PIPEACONF               0x70008
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c
index d5ebb00a9d49..a3b90c9561dc 100644
--- a/drivers/gpu/drm/i915/i915_suspend.c
+++ b/drivers/gpu/drm/i915/i915_suspend.c
@@ -732,12 +732,6 @@ int i915_save_state(struct drm_device *dev)
 
         pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
 
-        /* Render Standby */
-        if (I915_HAS_RC6(dev)) {
-                dev_priv->saveRENDERSTANDBY = I915_READ(MCHBAR_RENDER_STANDBY);
-                dev_priv->savePWRCTXA = I915_READ(PWRCTXA);
-        }
-
         /* Hardware status page */
         dev_priv->saveHWS = I915_READ(HWS_PGA);
 
@@ -793,12 +787,6 @@ int i915_restore_state(struct drm_device *dev)
 
         pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
 
-        /* Render Standby */
-        if (I915_HAS_RC6(dev)) {
-                I915_WRITE(MCHBAR_RENDER_STANDBY, dev_priv->saveRENDERSTANDBY);
-                I915_WRITE(PWRCTXA, dev_priv->savePWRCTXA);
-        }
-
         /* Hardware status page */
         I915_WRITE(HWS_PGA, dev_priv->saveHWS);
 
diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
index 9f3d3e563414..ddefc871edfe 100644
--- a/drivers/gpu/drm/i915/intel_crt.c
+++ b/drivers/gpu/drm/i915/intel_crt.c
@@ -548,4 +548,6 @@ void intel_crt_init(struct drm_device *dev)
         drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
 
         drm_sysfs_connector_add(connector);
+
+        dev_priv->hotplug_supported_mask |= CRT_HOTPLUG_INT_STATUS;
 }
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 52cd9b006da2..002612fae717 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -262,6 +262,14 @@ struct intel_limit {
 #define IRONLAKE_P2_LVDS_FAST    7  /* double channel */
 #define IRONLAKE_P2_DOT_LIMIT    225000 /* 225Mhz */
 
+#define IRONLAKE_P_DISPLAY_PORT_MIN     10
+#define IRONLAKE_P_DISPLAY_PORT_MAX     20
+#define IRONLAKE_P2_DISPLAY_PORT_FAST   10
+#define IRONLAKE_P2_DISPLAY_PORT_SLOW   10
+#define IRONLAKE_P2_DISPLAY_PORT_LIMIT  0
+#define IRONLAKE_P1_DISPLAY_PORT_MIN    1
+#define IRONLAKE_P1_DISPLAY_PORT_MAX    2
+
 static bool
 intel_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
                     int target, int refclk, intel_clock_t *best_clock);
@@ -271,9 +279,6 @@ intel_find_best_reduced_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
 static bool
 intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
                         int target, int refclk, intel_clock_t *best_clock);
-static bool
-intel_ironlake_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-                             int target, int refclk, intel_clock_t *best_clock);
 
 static bool
 intel_find_pll_g4x_dp(const intel_limit_t *, struct drm_crtc *crtc,
@@ -496,7 +501,7 @@ static const intel_limit_t intel_limits_ironlake_sdvo = {
         .p2  = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
                  .p2_slow = IRONLAKE_P2_SDVO_DAC_SLOW,
                  .p2_fast = IRONLAKE_P2_SDVO_DAC_FAST },
-        .find_pll = intel_ironlake_find_best_PLL,
+        .find_pll = intel_g4x_find_best_PLL,
 };
 
 static const intel_limit_t intel_limits_ironlake_lvds = {
@@ -511,7 +516,30 @@ static const intel_limit_t intel_limits_ironlake_lvds = {
         .p2  = { .dot_limit = IRONLAKE_P2_DOT_LIMIT,
                  .p2_slow = IRONLAKE_P2_LVDS_SLOW,
                  .p2_fast = IRONLAKE_P2_LVDS_FAST },
-        .find_pll = intel_ironlake_find_best_PLL,
+        .find_pll = intel_g4x_find_best_PLL,
+};
+
+static const intel_limit_t intel_limits_ironlake_display_port = {
+        .dot = { .min = IRONLAKE_DOT_MIN,
+                 .max = IRONLAKE_DOT_MAX },
+        .vco = { .min = IRONLAKE_VCO_MIN,
+                 .max = IRONLAKE_VCO_MAX},
+        .n   = { .min = IRONLAKE_N_MIN,
+                 .max = IRONLAKE_N_MAX },
+        .m   = { .min = IRONLAKE_M_MIN,
+                 .max = IRONLAKE_M_MAX },
+        .m1  = { .min = IRONLAKE_M1_MIN,
+                 .max = IRONLAKE_M1_MAX },
+        .m2  = { .min = IRONLAKE_M2_MIN,
+                 .max = IRONLAKE_M2_MAX },
+        .p   = { .min = IRONLAKE_P_DISPLAY_PORT_MIN,
+                 .max = IRONLAKE_P_DISPLAY_PORT_MAX },
+        .p1  = { .min = IRONLAKE_P1_DISPLAY_PORT_MIN,
+                 .max = IRONLAKE_P1_DISPLAY_PORT_MAX},
+        .p2  = { .dot_limit = IRONLAKE_P2_DISPLAY_PORT_LIMIT,
+                 .p2_slow = IRONLAKE_P2_DISPLAY_PORT_SLOW,
+                 .p2_fast = IRONLAKE_P2_DISPLAY_PORT_FAST },
+        .find_pll = intel_find_pll_ironlake_dp,
 };
 
 static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc)
@@ -519,6 +547,9 @@ static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc)
         const intel_limit_t *limit;
         if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS))
                 limit = &intel_limits_ironlake_lvds;
+        else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||
+                        HAS_eDP)
+                limit = &intel_limits_ironlake_display_port;
         else
                 limit = &intel_limits_ironlake_sdvo;
 
@@ -791,7 +822,13 @@ intel_g4x_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
         found = false;
 
         if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-                if ((I915_READ(LVDS) & LVDS_CLKB_POWER_MASK) ==
+                int lvds_reg;
+
+                if (IS_IRONLAKE(dev))
+                        lvds_reg = PCH_LVDS;
+                else
+                        lvds_reg = LVDS;
+                if ((I915_READ(lvds_reg) & LVDS_CLKB_POWER_MASK) ==
                     LVDS_CLKB_POWER_UP)
                         clock.p2 = limit->p2.p2_fast;
                 else
@@ -839,6 +876,11 @@ intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
 {
         struct drm_device *dev = crtc->dev;
         intel_clock_t clock;
+
+        /* return directly when it is eDP */
+        if (HAS_eDP)
+                return true;
+
         if (target < 200000) {
                 clock.n = 1;
                 clock.p1 = 2;
@@ -857,68 +899,6 @@ intel_find_pll_ironlake_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
         return true;
 }
 
-static bool
-intel_ironlake_find_best_PLL(const intel_limit_t *limit, struct drm_crtc *crtc,
-                             int target, int refclk, intel_clock_t *best_clock)
-{
-        struct drm_device *dev = crtc->dev;
-        struct drm_i915_private *dev_priv = dev->dev_private;
-        intel_clock_t clock;
-        int err_most = 47;
-        int err_min = 10000;
-
-        /* eDP has only 2 clock choice, no n/m/p setting */
-        if (HAS_eDP)
-                return true;
-
-        if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT))
-                return intel_find_pll_ironlake_dp(limit, crtc, target,
-                                               refclk, best_clock);
-
-        if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS)) {
-                if ((I915_READ(PCH_LVDS) & LVDS_CLKB_POWER_MASK) ==
-                    LVDS_CLKB_POWER_UP)
-                        clock.p2 = limit->p2.p2_fast;
-                else
-                        clock.p2 = limit->p2.p2_slow;
-        } else {
-                if (target < limit->p2.dot_limit)
-                        clock.p2 = limit->p2.p2_slow;
-                else
-                        clock.p2 = limit->p2.p2_fast;
-        }
-
-        memset(best_clock, 0, sizeof(*best_clock));
-        for (clock.p1 = limit->p1.max; clock.p1 >= limit->p1.min; clock.p1--) {
-                /* based on hardware requriment prefer smaller n to precision */
-                for (clock.n = limit->n.min; clock.n <= limit->n.max; clock.n++) {
-                        /* based on hardware requirment prefere larger m1,m2 */
-                        for (clock.m1 = limit->m1.max;
-                             clock.m1 >= limit->m1.min; clock.m1--) {
-                                for (clock.m2 = limit->m2.max;
-                                     clock.m2 >= limit->m2.min; clock.m2--) {
-                                        int this_err;
-
-                                        intel_clock(dev, refclk, &clock);
-                                        if (!intel_PLL_is_valid(crtc, &clock))
-                                                continue;
-                                        this_err = abs((10000 - (target*10000/clock.dot)));
-                                        if (this_err < err_most) {
-                                                *best_clock = clock;
-                                                /* found on first matching */
-                                                goto out;
-                                        } else if (this_err < err_min) {
-                                                *best_clock = clock;
-                                                err_min = this_err;
-                                        }
-                                }
-                        }
-                }
-        }
-out:
-        return true;
-}
-
 /* DisplayPort has only two frequencies, 162MHz and 270MHz */
 static bool
 intel_find_pll_g4x_dp(const intel_limit_t *limit, struct drm_crtc *crtc,
@@ -1493,6 +1473,10 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
         int trans_vsync_reg = (pipe == 0) ? TRANS_VSYNC_A : TRANS_VSYNC_B;
         u32 temp;
         int tries = 5, j, n;
+        u32 pipe_bpc;
+
+        temp = I915_READ(pipeconf_reg);
+        pipe_bpc = temp & PIPE_BPC_MASK;
 
         /* XXX: When our outputs are all unaware of DPMS modes other than off
          * and on, we should map those modes to DRM_MODE_DPMS_OFF in the CRTC.
@@ -1524,6 +1508,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
 
                         /* enable PCH FDI RX PLL, wait warmup plus DMI latency */
                         temp = I915_READ(fdi_rx_reg);
+                        /*
+                         * make the BPC in FDI Rx be consistent with that in
+                         * pipeconf reg.
+                         */
+                        temp &= ~(0x7 << 16);
+                        temp |= (pipe_bpc << 11);
                         I915_WRITE(fdi_rx_reg, temp | FDI_RX_PLL_ENABLE |
                                         FDI_SEL_PCDCLK |
                                         FDI_DP_PORT_WIDTH_X4); /* default 4 lanes */
@@ -1666,6 +1656,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
 
                         /* enable PCH transcoder */
                         temp = I915_READ(transconf_reg);
+                        /*
+                         * make the BPC in transcoder be consistent with
+                         * that in pipeconf reg.
+                         */
+                        temp &= ~PIPE_BPC_MASK;
+                        temp |= pipe_bpc;
                         I915_WRITE(transconf_reg, temp | TRANS_ENABLE);
                         I915_READ(transconf_reg);
 
@@ -1745,6 +1741,9 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
                 I915_READ(fdi_tx_reg);
 
                 temp = I915_READ(fdi_rx_reg);
+                /* BPC in FDI rx is consistent with that in pipeconf */
+                temp &= ~(0x07 << 16);
+                temp |= (pipe_bpc << 11);
                 I915_WRITE(fdi_rx_reg, temp & ~FDI_RX_ENABLE);
                 I915_READ(fdi_rx_reg);
 
@@ -1789,7 +1788,12 @@ static void ironlake_crtc_dpms(struct drm_crtc *crtc, int mode)
                                 }
                         }
                 }
-
+                temp = I915_READ(transconf_reg);
+                /* BPC in transcoder is consistent with that in pipeconf */
+                temp &= ~PIPE_BPC_MASK;
+                temp |= pipe_bpc;
+                I915_WRITE(transconf_reg, temp);
+                I915_READ(transconf_reg);
                 udelay(100);
 
                 /* disable PCH DPLL */
@@ -2448,7 +2452,7 @@ static void pineview_enable_cxsr(struct drm_device *dev, unsigned long clock,
  * A value of 5us seems to be a good balance; safe for very low end
  * platforms but not overly aggressive on lower latency configs.
  */
-const static int latency_ns = 5000;
+static const int latency_ns = 5000;
 
 static int i9xx_get_fifo_size(struct drm_device *dev, int plane)
 {
@@ -2559,7 +2563,7 @@ static void g4x_update_wm(struct drm_device *dev,  int planea_clock,
         /* Calc sr entries for one plane configs */
         if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
                 /* self-refresh has much higher latency */
-                const static int sr_latency_ns = 12000;
+                static const int sr_latency_ns = 12000;
 
                 sr_clock = planea_clock ? planea_clock : planeb_clock;
                 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@@ -2598,7 +2602,7 @@ static void i965_update_wm(struct drm_device *dev, int planea_clock,
         /* Calc sr entries for one plane configs */
         if (sr_hdisplay && (!planea_clock || !planeb_clock)) {
                 /* self-refresh has much higher latency */
-                const static int sr_latency_ns = 12000;
+                static const int sr_latency_ns = 12000;
 
                 sr_clock = planea_clock ? planea_clock : planeb_clock;
                 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@@ -2667,7 +2671,7 @@ static void i9xx_update_wm(struct drm_device *dev, int planea_clock,
         if (HAS_FW_BLC(dev) && sr_hdisplay &&
             (!planea_clock || !planeb_clock)) {
                 /* self-refresh has much higher latency */
-                const static int sr_latency_ns = 6000;
+                static const int sr_latency_ns = 6000;
 
                 sr_clock = planea_clock ? planea_clock : planeb_clock;
                 line_time_us = ((sr_hdisplay * 1000) / sr_clock);
@@ -2969,6 +2973,18 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
 
                 /* determine panel color depth */
                 temp = I915_READ(pipeconf_reg);
+                temp &= ~PIPE_BPC_MASK;
+                if (is_lvds) {
+                        int lvds_reg = I915_READ(PCH_LVDS);
+                        /* the BPC will be 6 if it is 18-bit LVDS panel */
+                        if ((lvds_reg & LVDS_A3_POWER_MASK) == LVDS_A3_POWER_UP)
+                                temp |= PIPE_8BPC;
+                        else
+                                temp |= PIPE_6BPC;
+                } else
+                        temp |= PIPE_8BPC;
+                I915_WRITE(pipeconf_reg, temp);
+                I915_READ(pipeconf_reg);
 
                 switch (temp & PIPE_BPC_MASK) {
                 case PIPE_8BPC:
@@ -3195,7 +3211,20 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc,
                  * appropriately here, but we need to look more thoroughly into how
                  * panels behave in the two modes.
                  */
-
+                /* set the dithering flag */
+                if (IS_I965G(dev)) {
+                        if (dev_priv->lvds_dither) {
+                                if (IS_IRONLAKE(dev))
+                                        pipeconf |= PIPE_ENABLE_DITHER;
+                                else
+                                        lvds |= LVDS_ENABLE_DITHER;
+                        } else {
+                                if (IS_IRONLAKE(dev))
+                                        pipeconf &= ~PIPE_ENABLE_DITHER;
+                                else
+                                        lvds &= ~LVDS_ENABLE_DITHER;
+                        }
+                }
                 I915_WRITE(lvds_reg, lvds);
                 I915_READ(lvds_reg);
         }
@@ -3385,7 +3414,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
 
         /* we only need to pin inside GTT if cursor is non-phy */
         mutex_lock(&dev->struct_mutex);
-        if (!dev_priv->cursor_needs_physical) {
+        if (!dev_priv->info->cursor_needs_physical) {
                 ret = i915_gem_object_pin(bo, PAGE_SIZE);
                 if (ret) {
                         DRM_ERROR("failed to pin cursor bo\n");
@@ -3420,7 +3449,7 @@ static int intel_crtc_cursor_set(struct drm_crtc *crtc,
         I915_WRITE(base, addr);
 
         if (intel_crtc->cursor_bo) {
-                if (dev_priv->cursor_needs_physical) {
+                if (dev_priv->info->cursor_needs_physical) {
                         if (intel_crtc->cursor_bo != bo)
                                 i915_gem_detach_phys_object(dev, intel_crtc->cursor_bo);
                 } else
@@ -3779,125 +3808,6 @@ static void intel_gpu_idle_timer(unsigned long arg)
         queue_work(dev_priv->wq, &dev_priv->idle_work);
 }
 
-void intel_increase_renderclock(struct drm_device *dev, bool schedule)
-{
-        drm_i915_private_t *dev_priv = dev->dev_private;
-
-        if (IS_IRONLAKE(dev))
-                return;
-
-        if (!dev_priv->render_reclock_avail) {
-                DRM_DEBUG_DRIVER("not reclocking render clock\n");
-                return;
-        }
-
-        /* Restore render clock frequency to original value */
-        if (IS_G4X(dev) || IS_I9XX(dev))
-                pci_write_config_word(dev->pdev, GCFGC, dev_priv->orig_clock);
-        else if (IS_I85X(dev))
-                pci_write_config_word(dev->pdev, HPLLCC, dev_priv->orig_clock);
-        DRM_DEBUG_DRIVER("increasing render clock frequency\n");
-
-        /* Schedule downclock */
-        if (schedule)
-                mod_timer(&dev_priv->idle_timer, jiffies +
-                          msecs_to_jiffies(GPU_IDLE_TIMEOUT));
-}
-
-void intel_decrease_renderclock(struct drm_device *dev)
-{
-        drm_i915_private_t *dev_priv = dev->dev_private;
-
-        if (IS_IRONLAKE(dev))
-                return;
-
-        if (!dev_priv->render_reclock_avail) {
-                DRM_DEBUG_DRIVER("not reclocking render clock\n");
-                return;
-        }
-
-        if (IS_G4X(dev)) {
-                u16 gcfgc;
-
-                /* Adjust render clock... */
-                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-                /* Down to minimum... */
-                gcfgc &= ~GM45_GC_RENDER_CLOCK_MASK;
-                gcfgc |= GM45_GC_RENDER_CLOCK_266_MHZ;
-
-                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-        } else if (IS_I965G(dev)) {
-                u16 gcfgc;
-
-                /* Adjust render clock... */
-                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-                /* Down to minimum... */
-                gcfgc &= ~I965_GC_RENDER_CLOCK_MASK;
-                gcfgc |= I965_GC_RENDER_CLOCK_267_MHZ;
-
-                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-        } else if (IS_I945G(dev) || IS_I945GM(dev)) {
-                u16 gcfgc;
-
-                /* Adjust render clock... */
-                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-                /* Down to minimum... */
-                gcfgc &= ~I945_GC_RENDER_CLOCK_MASK;
-                gcfgc |= I945_GC_RENDER_CLOCK_166_MHZ;
-
-                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-        } else if (IS_I915G(dev)) {
-                u16 gcfgc;
-
-                /* Adjust render clock... */
-                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-                /* Down to minimum... */
-                gcfgc &= ~I915_GC_RENDER_CLOCK_MASK;
-                gcfgc |= I915_GC_RENDER_CLOCK_166_MHZ;
-
-                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-        } else if (IS_I85X(dev)) {
-                u16 hpllcc;
-
-                /* Adjust render clock... */
-                pci_read_config_word(dev->pdev, HPLLCC, &hpllcc);
-
-                /* Up to maximum... */
-                hpllcc &= ~GC_CLOCK_CONTROL_MASK;
-                hpllcc |= GC_CLOCK_133_200;
-
-                pci_write_config_word(dev->pdev, HPLLCC, hpllcc);
-        }
-        DRM_DEBUG_DRIVER("decreasing render clock frequency\n");
-}
-
-/* Note that no increase function is needed for this - increase_renderclock()
- *  will also rewrite these bits
- */
-void intel_decrease_displayclock(struct drm_device *dev)
-{
-        if (IS_IRONLAKE(dev))
-                return;
-
-        if (IS_I945G(dev) || IS_I945GM(dev) || IS_I915G(dev) ||
-            IS_I915GM(dev)) {
-                u16 gcfgc;
-
-                /* Adjust render clock... */
-                pci_read_config_word(dev->pdev, GCFGC, &gcfgc);
-
-                /* Down to minimum... */
-                gcfgc &= ~0xf0;
-                gcfgc |= 0x80;
-
-                pci_write_config_word(dev->pdev, GCFGC, gcfgc);
-        }
-}
-
 #define CRTC_IDLE_TIMEOUT 1000 /* ms */
 
 static void intel_crtc_idle_timer(unsigned long arg)
@@ -4011,12 +3921,6 @@ static void intel_idle_update(struct work_struct *work)
 
         mutex_lock(&dev->struct_mutex);
 
-        /* GPU isn't processing, downclock it. */
-        if (!dev_priv->busy) {
-                intel_decrease_renderclock(dev);
-                intel_decrease_displayclock(dev);
-        }
-
         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
                 /* Skip inactive CRTCs */
                 if (!crtc->fb)
@@ -4050,13 +3954,11 @@ void intel_mark_busy(struct drm_device *dev, struct drm_gem_object *obj)
         if (!drm_core_check_feature(dev, DRIVER_MODESET))
                 return;
 
-        if (!dev_priv->busy) {
+        if (!dev_priv->busy)
                 dev_priv->busy = true;
-                intel_increase_renderclock(dev, true);
-        } else {
+        else
                 mod_timer(&dev_priv->idle_timer, jiffies +
                           msecs_to_jiffies(GPU_IDLE_TIMEOUT));
-        }
 
         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
                 if (!crtc->fb)
@@ -4400,29 +4302,43 @@ static void intel_setup_outputs(struct drm_device *dev)
                 bool found = false;
 
                 if (I915_READ(SDVOB) & SDVO_DETECTED) {
+                        DRM_DEBUG_KMS("probing SDVOB\n");
                         found = intel_sdvo_init(dev, SDVOB);
-                        if (!found && SUPPORTS_INTEGRATED_HDMI(dev))
+                        if (!found && SUPPORTS_INTEGRATED_HDMI(dev)) {
+                                DRM_DEBUG_KMS("probing HDMI on SDVOB\n");
                                 intel_hdmi_init(dev, SDVOB);
+                        }
 
-                        if (!found && SUPPORTS_INTEGRATED_DP(dev))
+                        if (!found && SUPPORTS_INTEGRATED_DP(dev)) {
+                                DRM_DEBUG_KMS("probing DP_B\n");
                                 intel_dp_init(dev, DP_B);
+                        }
                 }
 
                 /* Before G4X SDVOC doesn't have its own detect register */
 
-                if (I915_READ(SDVOB) & SDVO_DETECTED)
+                if (I915_READ(SDVOB) & SDVO_DETECTED) {
+                        DRM_DEBUG_KMS("probing SDVOC\n");
                         found = intel_sdvo_init(dev, SDVOC);
+                }
 
                 if (!found && (I915_READ(SDVOC) & SDVO_DETECTED)) {
 
-                        if (SUPPORTS_INTEGRATED_HDMI(dev))
+                        if (SUPPORTS_INTEGRATED_HDMI(dev)) {
+                                DRM_DEBUG_KMS("probing HDMI on SDVOC\n");
                                 intel_hdmi_init(dev, SDVOC);
-                        if (SUPPORTS_INTEGRATED_DP(dev))
+                        }
+                        if (SUPPORTS_INTEGRATED_DP(dev)) {
+                                DRM_DEBUG_KMS("probing DP_C\n");
                                 intel_dp_init(dev, DP_C);
+                        }
                 }
 
-                if (SUPPORTS_INTEGRATED_DP(dev) && (I915_READ(DP_D) & DP_DETECTED))
+                if (SUPPORTS_INTEGRATED_DP(dev) &&
+                    (I915_READ(DP_D) & DP_DETECTED)) {
+                        DRM_DEBUG_KMS("probing DP_D\n");
                         intel_dp_init(dev, DP_D);
+                }
         } else if (IS_I8XX(dev))
                 intel_dvo_init(dev);
 
@@ -4527,6 +4443,42 @@ static const struct drm_mode_config_funcs intel_mode_funcs = {
         .fb_changed = intelfb_probe,
 };
 
+static struct drm_gem_object *
+intel_alloc_power_context(struct drm_device *dev)
+{
+        struct drm_gem_object *pwrctx;
+        int ret;
+
+        pwrctx = drm_gem_object_alloc(dev, 4096);
+        if (!pwrctx) {
+                DRM_DEBUG("failed to alloc power context, RC6 disabled\n");
+                return NULL;
+        }
+
+        mutex_lock(&dev->struct_mutex);
+        ret = i915_gem_object_pin(pwrctx, 4096);
+        if (ret) {
+                DRM_ERROR("failed to pin power context: %d\n", ret);
+                goto err_unref;
+        }
+
+        ret = i915_gem_object_set_to_gtt_domain(pwrctx, 1);
+        if (ret) {
+                DRM_ERROR("failed to set-domain on power context: %d\n", ret);
+                goto err_unpin;
+        }
+        mutex_unlock(&dev->struct_mutex);
+
+        return pwrctx;
+
+err_unpin:
+        i915_gem_object_unpin(pwrctx);
+err_unref:
+        drm_gem_object_unreference(pwrctx);
+        mutex_unlock(&dev->struct_mutex);
+        return NULL;
+}
+
 void intel_init_clock_gating(struct drm_device *dev)
 {
         struct drm_i915_private *dev_priv = dev->dev_private;
@@ -4579,42 +4531,27 @@ void intel_init_clock_gating(struct drm_device *dev)
          * GPU can automatically power down the render unit if given a page
          * to save state.
          */
-        if (I915_HAS_RC6(dev)) {
-                struct drm_gem_object *pwrctx;
-                struct drm_i915_gem_object *obj_priv;
-                int ret;
+        if (I915_HAS_RC6(dev) && drm_core_check_feature(dev, DRIVER_MODESET)) {
+                struct drm_i915_gem_object *obj_priv = NULL;
 
                 if (dev_priv->pwrctx) {
                         obj_priv = dev_priv->pwrctx->driver_private;
                 } else {
-                        pwrctx = drm_gem_object_alloc(dev, 4096);
-                        if (!pwrctx) {
-                                DRM_DEBUG("failed to alloc power context, "
-                                          "RC6 disabled\n");
-                                goto out;
-                        }
+                        struct drm_gem_object *pwrctx;
 
-                        ret = i915_gem_object_pin(pwrctx, 4096);
-                        if (ret) {
-                                DRM_ERROR("failed to pin power context: %d\n",
-                                          ret);
-                                drm_gem_object_unreference(pwrctx);
-                                goto out;
+                        pwrctx = intel_alloc_power_context(dev);
+                        if (pwrctx) {
+                                dev_priv->pwrctx = pwrctx;
+                                obj_priv = pwrctx->driver_private;
                         }
-
-                        i915_gem_object_set_to_gtt_domain(pwrctx, 1);
-
-                        dev_priv->pwrctx = pwrctx;
-                        obj_priv = pwrctx->driver_private;
                 }
 
-                I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN);
-                I915_WRITE(MCHBAR_RENDER_STANDBY,
-                           I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
+                if (obj_priv) {
+                        I915_WRITE(PWRCTXA, obj_priv->gtt_offset | PWRCTX_EN);
+                        I915_WRITE(MCHBAR_RENDER_STANDBY,
+                                   I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
+                }
         }
-
-out:
-        return;
 }
 
 /* Set up chip specific display functions */
@@ -4770,7 +4707,6 @@ void intel_modeset_cleanup(struct drm_device *dev)
                 del_timer_sync(&intel_crtc->idle_timer);
         }
 
-        intel_increase_renderclock(dev, false);
         del_timer_sync(&dev_priv->idle_timer);
 
         if (dev_priv->display.disable_fbc)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 4e7aa8b7b938..1349d9fd01c4 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -1402,14 +1402,20 @@ intel_dp_init(struct drm_device *dev, int output_reg)
                         break;
                 case DP_B:
                 case PCH_DP_B:
+                        dev_priv->hotplug_supported_mask |=
+                                HDMIB_HOTPLUG_INT_STATUS;
                         name = "DPDDC-B";
                         break;
                 case DP_C:
                 case PCH_DP_C:
+                        dev_priv->hotplug_supported_mask |=
+                                HDMIC_HOTPLUG_INT_STATUS;
                         name = "DPDDC-C";
                         break;
                 case DP_D:
                 case PCH_DP_D:
+                        dev_priv->hotplug_supported_mask |=
+                                HDMID_HOTPLUG_INT_STATUS;
                         name = "DPDDC-D";
                         break;
         }
diff --git a/drivers/gpu/drm/i915/intel_hdmi.c b/drivers/gpu/drm/i915/intel_hdmi.c
index f04dbbe7d400..06431941b233 100644
--- a/drivers/gpu/drm/i915/intel_hdmi.c
+++ b/drivers/gpu/drm/i915/intel_hdmi.c
@@ -303,21 +303,26 @@ void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
         if (sdvox_reg == SDVOB) {
                 intel_output->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
                 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
+                dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
         } else if (sdvox_reg == SDVOC) {
                 intel_output->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
                 intel_output->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
+                dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
         } else if (sdvox_reg == HDMIB) {
                 intel_output->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
                 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
                                                                 "HDMIB");
+                dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
         } else if (sdvox_reg == HDMIC) {
                 intel_output->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
                 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
                                                                 "HDMIC");
+                dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
         } else if (sdvox_reg == HDMID) {
                 intel_output->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
                 intel_output->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
                                                                 "HDMID");
+                dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
         }
         if (!intel_output->ddc_bus)
                 goto err_connector;
diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
index 3118ce274e67..f4b4aa242df1 100644
--- a/drivers/gpu/drm/i915/intel_lvds.c
+++ b/drivers/gpu/drm/i915/intel_lvds.c
@@ -608,6 +608,13 @@ static const struct dmi_system_id bad_lid_status[] = {
                         DMI_MATCH(DMI_PRODUCT_NAME, "Aspire one"),
                 },
         },
+        {
+                .ident = "PC-81005",
+                .matches = {
+                        DMI_MATCH(DMI_SYS_VENDOR, "MALATA"),
+                        DMI_MATCH(DMI_PRODUCT_NAME, "PC-81005"),
+                },
+        },
         { }
 };
 
@@ -679,7 +686,14 @@ static int intel_lid_notify(struct notifier_block *nb, unsigned long val,
         struct drm_i915_private *dev_priv =
                 container_of(nb, struct drm_i915_private, lid_notifier);
         struct drm_device *dev = dev_priv->dev;
+        struct drm_connector *connector = dev_priv->int_lvds_connector;
 
+        /*
+         * check and update the status of LVDS connector after receiving
+         * the LID nofication event.
+         */
+        if (connector)
+                connector->status = connector->funcs->detect(connector);
         if (!acpi_lid_open()) {
                 dev_priv->modeset_on_lid = 1;
                 return NOTIFY_OK;
@@ -854,65 +868,6 @@ static const struct dmi_system_id intel_no_lvds[] = {
         { }     /* terminating entry */
 };
 
-#ifdef CONFIG_ACPI
-/*
- * check_lid_device -- check whether @handle is an ACPI LID device.
- * @handle: ACPI device handle
- * @level : depth in the ACPI namespace tree
- * @context: the number of LID device when we find the device
- * @rv: a return value to fill if desired (Not use)
- */
-static acpi_status
-check_lid_device(acpi_handle handle, u32 level, void *context,
-                        void **return_value)
-{
-        struct acpi_device *acpi_dev;
-        int *lid_present = context;
-
-        acpi_dev = NULL;
-        /* Get the acpi device for device handle */
-        if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) {
-                /* If there is no ACPI device for handle, return */
-                return AE_OK;
-        }
-
-        if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7))
-                *lid_present = 1;
-
-        return AE_OK;
-}
-
-/**
- * check whether there exists the ACPI LID device by enumerating the ACPI
- * device tree.
- */
-static int intel_lid_present(void)
-{
-        int lid_present = 0;
-
-        if (acpi_disabled) {
-                /* If ACPI is disabled, there is no ACPI device tree to
-                 * check, so assume the LID device would have been present.
-                 */
-                return 1;
-        }
-
-        acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT,
-                                ACPI_UINT32_MAX,
-                                check_lid_device, NULL, &lid_present, NULL);
-
-        return lid_present;
-}
-#else
-static int intel_lid_present(void)
-{
-        /* In the absence of ACPI built in, assume that the LID device would
-         * have been present.
-         */
-        return 1;
-}
-#endif
-
 /**
  * intel_find_lvds_downclock - find the reduced downclock for LVDS in EDID
  * @dev: drm device
@@ -1031,12 +986,8 @@ void intel_lvds_init(struct drm_device *dev)
         if (dmi_check_system(intel_no_lvds))
                 return;
 
-        /*
-         * Assume LVDS is present if there's an ACPI lid device or if the
-         * device is present in the VBT.
-         */
-        if (!lvds_is_present_in_vbt(dev) && !intel_lid_present()) {
-                DRM_DEBUG_KMS("LVDS is not present in VBT and no lid detected\n");
+        if (!lvds_is_present_in_vbt(dev)) {
+                DRM_DEBUG_KMS("LVDS is not present in VBT\n");
                 return;
         }
 
@@ -1180,6 +1131,8 @@ out:
                 DRM_DEBUG_KMS("lid notifier registration failed\n");
                 dev_priv->lid_notifier.notifier_call = NULL;
         }
+        /* keep the LVDS connector */
+        dev_priv->int_lvds_connector = connector;
         drm_sysfs_connector_add(connector);
         return;
 
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
index 24a3dc99716c..de5144c8c153 100644
--- a/drivers/gpu/drm/i915/intel_sdvo.c
+++ b/drivers/gpu/drm/i915/intel_sdvo.c
@@ -2662,6 +2662,7 @@ static void intel_sdvo_create_enhance_property(struct drm_connector *connector)
 
 bool intel_sdvo_init(struct drm_device *dev, int output_device)
 {
+        struct drm_i915_private *dev_priv = dev->dev_private;
         struct drm_connector *connector;
         struct intel_output *intel_output;
         struct intel_sdvo_priv *sdvo_priv;
@@ -2708,10 +2709,12 @@ bool intel_sdvo_init(struct drm_device *dev, int output_device)
                 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOB DDC BUS");
                 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
                                                 "SDVOB/VGA DDC BUS");
+                dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
         } else {
                 intel_output->ddc_bus = intel_i2c_create(dev, GPIOE, "SDVOC DDC BUS");
                 sdvo_priv->analog_ddc_bus = intel_i2c_create(dev, GPIOA,
                                                 "SDVOC/VGA DDC BUS");
+                dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
         }
 
         if (intel_output->ddc_bus == NULL)
diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
index 552ec110b741..1d5b9b7b033f 100644
--- a/drivers/gpu/drm/i915/intel_tv.c
+++ b/drivers/gpu/drm/i915/intel_tv.c
@@ -1840,6 +1840,8 @@ intel_tv_init(struct drm_device *dev)
         drm_connector_attach_property(connector,
                                    dev->mode_config.tv_bottom_margin_property,
                                    tv_priv->margin[TV_MARGIN_BOTTOM]);
+
+        dev_priv->hotplug_supported_mask |= TV_HOTPLUG_INT_STATUS;
 out:
         drm_sysfs_connector_add(connector);
 }
diff --git a/drivers/gpu/drm/nouveau/Kconfig b/drivers/gpu/drm/nouveau/Kconfig
index b1bc1ea182b8..1175429da102 100644
--- a/drivers/gpu/drm/nouveau/Kconfig
+++ b/drivers/gpu/drm/nouveau/Kconfig
@@ -30,12 +30,11 @@ config DRM_NOUVEAU_DEBUG
           via debugfs.
 
 menu "I2C encoder or helper chips"
-     depends on DRM && I2C
+     depends on DRM && DRM_KMS_HELPER && I2C
 
 config DRM_I2C_CH7006
         tristate "Chrontel ch7006 TV encoder"
-        depends on DRM_NOUVEAU
-        default m
+        default m if DRM_NOUVEAU
         help
           Support for Chrontel ch7006 and similar TV encoders, found
           on some nVidia video cards.
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index 0cad6d834eb2..e342a418d434 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -33,10 +33,13 @@
 #include "nouveau_drv.h"
 #include "nouveau_dma.h"
 
+#include <linux/log2.h>
+
 static void
 nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
 {
         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+        struct drm_device *dev = dev_priv->dev;
         struct nouveau_bo *nvbo = nouveau_bo(bo);
 
         ttm_bo_kunmap(&nvbo->kmap);
@@ -44,12 +47,87 @@ nouveau_bo_del_ttm(struct ttm_buffer_object *bo)
         if (unlikely(nvbo->gem))
                 DRM_ERROR("bo %p still attached to GEM object\n", bo);
 
+        if (nvbo->tile)
+                nv10_mem_expire_tiling(dev, nvbo->tile, NULL);
+
         spin_lock(&dev_priv->ttm.bo_list_lock);
         list_del(&nvbo->head);
         spin_unlock(&dev_priv->ttm.bo_list_lock);
         kfree(nvbo);
 }
 
+static void
+nouveau_bo_fixup_align(struct drm_device *dev,
+                       uint32_t tile_mode, uint32_t tile_flags,
+                       int *align, int *size)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+
+        /*
+         * Some of the tile_flags have a periodic structure of N*4096 bytes,
+         * align to to that as well as the page size. Overallocate memory to
+         * avoid corruption of other buffer objects.
+         */
+        if (dev_priv->card_type == NV_50) {
+                uint32_t block_size = nouveau_mem_fb_amount(dev) >> 15;
+                int i;
+
+                switch (tile_flags) {
+                case 0x1800:
+                case 0x2800:
+                case 0x4800:
+                case 0x7a00:
+                        *size = roundup(*size, block_size);
+                        if (is_power_of_2(block_size)) {
+                                *size += 3 * block_size;
+                                for (i = 1; i < 10; i++) {
+                                        *align = 12 * i * block_size;
+                                        if (!(*align % 65536))
+                                                break;
+                                }
+                        } else {
+                                *size += 6 * block_size;
+                                for (i = 1; i < 10; i++) {
+                                        *align = 8 * i * block_size;
+                                        if (!(*align % 65536))
+                                                break;
+                                }
+                        }
+                        break;
+                default:
+                        break;
+                }
+
+        } else {
+                if (tile_mode) {
+                        if (dev_priv->chipset >= 0x40) {
+                                *align = 65536;
+                                *size = roundup(*size, 64 * tile_mode);
+
+                        } else if (dev_priv->chipset >= 0x30) {
+                                *align = 32768;
+                                *size = roundup(*size, 64 * tile_mode);
+
+                        } else if (dev_priv->chipset >= 0x20) {
+                                *align = 16384;
+                                *size = roundup(*size, 64 * tile_mode);
+
+                        } else if (dev_priv->chipset >= 0x10) {
+                                *align = 16384;
+                                *size = roundup(*size, 32 * tile_mode);
+                        }
+                }
+        }
+
+        /* ALIGN works only on powers of two. */
+        *size = roundup(*size, PAGE_SIZE);
+
+        if (dev_priv->card_type == NV_50) {
+                *size = roundup(*size, 65536);
+                *align = max(65536, *align);
+        }
+}
+
 int
 nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
                int size, int align, uint32_t flags, uint32_t tile_mode,
@@ -58,7 +136,7 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
 {
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nouveau_bo *nvbo;
-        int ret, n = 0;
+        int ret = 0;
 
         nvbo = kzalloc(sizeof(struct nouveau_bo), GFP_KERNEL);
         if (!nvbo)
@@ -70,59 +148,14 @@ nouveau_bo_new(struct drm_device *dev, struct nouveau_channel *chan,
         nvbo->tile_mode = tile_mode;
         nvbo->tile_flags = tile_flags;
 
-        /*
-         * Some of the tile_flags have a periodic structure of N*4096 bytes,
-         * align to to that as well as the page size. Overallocate memory to
-         * avoid corruption of other buffer objects.
-         */
-        switch (tile_flags) {
-        case 0x1800:
-        case 0x2800:
-        case 0x4800:
-        case 0x7a00:
-                if (dev_priv->chipset >= 0xA0) {
-                        /* This is based on high end cards with 448 bits
-                         * memory bus, could be different elsewhere.*/
-                        size += 6 * 28672;
-                        /* 8 * 28672 is the actual alignment requirement,
-                         * but we must also align to page size. */
-                        align = 2 * 8 * 28672;
-                } else if (dev_priv->chipset >= 0x90) {
-                        size += 3 * 16384;
-                        align = 12 * 16834;
-                } else {
-                        size += 3 * 8192;
-                        /* 12 * 8192 is the actual alignment requirement,
-                         * but we must also align to page size. */
-                        align = 2 * 12 * 8192;
-                }
-                break;
-        default:
-                break;
-        }
-
+        nouveau_bo_fixup_align(dev, tile_mode, tile_flags, &align, &size);
         align >>= PAGE_SHIFT;
 
-        size = (size + (PAGE_SIZE - 1)) & ~(PAGE_SIZE - 1);
-        if (dev_priv->card_type == NV_50) {
-                size = (size + 65535) & ~65535;
-                if (align < (65536 / PAGE_SIZE))
-                        align = (65536 / PAGE_SIZE);
-        }
-
-        if (flags & TTM_PL_FLAG_VRAM)
-                nvbo->placements[n++] = TTM_PL_FLAG_VRAM | TTM_PL_MASK_CACHING;
-        if (flags & TTM_PL_FLAG_TT)
-                nvbo->placements[n++] = TTM_PL_FLAG_TT | TTM_PL_MASK_CACHING;
         nvbo->placement.fpfn = 0;
         nvbo->placement.lpfn = mappable ? dev_priv->fb_mappable_pages : 0;
-        nvbo->placement.placement = nvbo->placements;
-        nvbo->placement.busy_placement = nvbo->placements;
-        nvbo->placement.num_placement = n;
-        nvbo->placement.num_busy_placement = n;
+        nouveau_bo_placement_set(nvbo, flags);
 
         nvbo->channel = chan;
-        nouveau_bo_placement_set(nvbo, flags);
         ret = ttm_bo_init(&dev_priv->ttm.bdev, &nvbo->bo, size,
                           ttm_bo_type_device, &nvbo->placement, align, 0,
                           false, NULL, size, nouveau_bo_del_ttm);
@@ -421,6 +454,7 @@ nouveau_bo_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *pl)
 /* GPU-assisted copy using NV_MEMORY_TO_MEMORY_FORMAT, can access
  * TTM_PL_{VRAM,TT} directly.
  */
+
 static int
 nouveau_bo_move_accel_cleanup(struct nouveau_channel *chan,
                               struct nouveau_bo *nvbo, bool evict, bool no_wait,
@@ -455,11 +489,12 @@ nouveau_bo_mem_ctxdma(struct nouveau_bo *nvbo, struct nouveau_channel *chan,
 }
 
 static int
-nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, int no_wait,
-                     struct ttm_mem_reg *old_mem, struct ttm_mem_reg *new_mem)
+nouveau_bo_move_m2mf(struct ttm_buffer_object *bo, int evict, bool intr,
+                     int no_wait, struct ttm_mem_reg *new_mem)
 {
         struct nouveau_bo *nvbo = nouveau_bo(bo);
         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+        struct ttm_mem_reg *old_mem = &bo->mem;
         struct nouveau_channel *chan;
         uint64_t src_offset, dst_offset;
         uint32_t page_count;
@@ -547,7 +582,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
 
         placement.fpfn = placement.lpfn = 0;
         placement.num_placement = placement.num_busy_placement = 1;
-        placement.placement = &placement_memtype;
+        placement.placement = placement.busy_placement = &placement_memtype;
 
         tmp_mem = *new_mem;
         tmp_mem.mm_node = NULL;
@@ -559,7 +594,7 @@ nouveau_bo_move_flipd(struct ttm_buffer_object *bo, bool evict, bool intr,
         if (ret)
                 goto out;
 
-        ret = nouveau_bo_move_m2mf(bo, true, no_wait, &bo->mem, &tmp_mem);
+        ret = nouveau_bo_move_m2mf(bo, true, intr, no_wait, &tmp_mem);
         if (ret)
                 goto out;
 
@@ -585,7 +620,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
 
         placement.fpfn = placement.lpfn = 0;
         placement.num_placement = placement.num_busy_placement = 1;
-        placement.placement = &placement_memtype;
+        placement.placement = placement.busy_placement = &placement_memtype;
 
         tmp_mem = *new_mem;
         tmp_mem.mm_node = NULL;
@@ -597,7 +632,7 @@ nouveau_bo_move_flips(struct ttm_buffer_object *bo, bool evict, bool intr,
         if (ret)
                 goto out;
 
-        ret = nouveau_bo_move_m2mf(bo, true, no_wait, &bo->mem, new_mem);
+        ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait, new_mem);
         if (ret)
                 goto out;
 
@@ -612,52 +647,106 @@ out:
 }
 
 static int
-nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
-                bool no_wait, struct ttm_mem_reg *new_mem)
+nouveau_bo_vm_bind(struct ttm_buffer_object *bo, struct ttm_mem_reg *new_mem,
+                   struct nouveau_tile_reg **new_tile)
 {
         struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
-        struct nouveau_bo *nvbo = nouveau_bo(bo);
         struct drm_device *dev = dev_priv->dev;
-        struct ttm_mem_reg *old_mem = &bo->mem;
+        struct nouveau_bo *nvbo = nouveau_bo(bo);
+        uint64_t offset;
         int ret;
 
-        if (dev_priv->card_type == NV_50 && new_mem->mem_type == TTM_PL_VRAM &&
-            !nvbo->no_vm) {
-                uint64_t offset = new_mem->mm_node->start << PAGE_SHIFT;
+        if (nvbo->no_vm || new_mem->mem_type != TTM_PL_VRAM) {
+                /* Nothing to do. */
+                *new_tile = NULL;
+                return 0;
+        }
+
+        offset = new_mem->mm_node->start << PAGE_SHIFT;
 
+        if (dev_priv->card_type == NV_50) {
                 ret = nv50_mem_vm_bind_linear(dev,
                                               offset + dev_priv->vm_vram_base,
                                               new_mem->size, nvbo->tile_flags,
                                               offset);
                 if (ret)
                         return ret;
+
+        } else if (dev_priv->card_type >= NV_10) {
+                *new_tile = nv10_mem_set_tiling(dev, offset, new_mem->size,
+                                                nvbo->tile_mode);
         }
 
+        return 0;
+}
+
+static void
+nouveau_bo_vm_cleanup(struct ttm_buffer_object *bo,
+                      struct nouveau_tile_reg *new_tile,
+                      struct nouveau_tile_reg **old_tile)
+{
+        struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+        struct drm_device *dev = dev_priv->dev;
+
+        if (dev_priv->card_type >= NV_10 &&
+            dev_priv->card_type < NV_50) {
+                if (*old_tile)
+                        nv10_mem_expire_tiling(dev, *old_tile, bo->sync_obj);
+
+                *old_tile = new_tile;
+        }
+}
+
+static int
+nouveau_bo_move(struct ttm_buffer_object *bo, bool evict, bool intr,
+                bool no_wait, struct ttm_mem_reg *new_mem)
+{
+        struct drm_nouveau_private *dev_priv = nouveau_bdev(bo->bdev);
+        struct nouveau_bo *nvbo = nouveau_bo(bo);
+        struct ttm_mem_reg *old_mem = &bo->mem;
+        struct nouveau_tile_reg *new_tile = NULL;
+        int ret = 0;
+
+        ret = nouveau_bo_vm_bind(bo, new_mem, &new_tile);
+        if (ret)
+                return ret;
+
+        /* Software copy if the card isn't up and running yet. */
         if (dev_priv->init_state != NOUVEAU_CARD_INIT_DONE ||
-            !dev_priv->channel)
-                return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+            !dev_priv->channel) {
+                ret = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+                goto out;
+        }
 
+        /* Fake bo copy. */
         if (old_mem->mem_type == TTM_PL_SYSTEM && !bo->ttm) {
                 BUG_ON(bo->mem.mm_node != NULL);
                 bo->mem = *new_mem;
                 new_mem->mm_node = NULL;
-                return 0;
+                goto out;
         }
 
-        if (new_mem->mem_type == TTM_PL_SYSTEM) {
-                if (old_mem->mem_type == TTM_PL_SYSTEM)
-                        return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
-                if (nouveau_bo_move_flipd(bo, evict, intr, no_wait, new_mem))
-                        return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
-        } else if (old_mem->mem_type == TTM_PL_SYSTEM) {
-                if (nouveau_bo_move_flips(bo, evict, intr, no_wait, new_mem))
-                        return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
-        } else {
-                if (nouveau_bo_move_m2mf(bo, evict, no_wait, old_mem, new_mem))
-                        return ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
-        }
+        /* Hardware assisted copy. */
+        if (new_mem->mem_type == TTM_PL_SYSTEM)
+                ret = nouveau_bo_move_flipd(bo, evict, intr, no_wait, new_mem);
+        else if (old_mem->mem_type == TTM_PL_SYSTEM)
+                ret = nouveau_bo_move_flips(bo, evict, intr, no_wait, new_mem);
+        else
+                ret = nouveau_bo_move_m2mf(bo, evict, intr, no_wait, new_mem);
 
-        return 0;
+        if (!ret)
+                goto out;
+
+        /* Fallback to software copy. */
+        ret = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
+
+out:
+        if (ret)
+                nouveau_bo_vm_cleanup(bo, NULL, &new_tile);
+        else
+                nouveau_bo_vm_cleanup(bo, new_tile, &nvbo->tile);
+
+        return ret;
 }
 
 static int
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c
index 9aaa972f8822..343d718a9667 100644
--- a/drivers/gpu/drm/nouveau/nouveau_channel.c
+++ b/drivers/gpu/drm/nouveau/nouveau_channel.c
@@ -158,6 +158,8 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
                 return ret;
         }
 
+        nouveau_dma_pre_init(chan);
+
         /* Locate channel's user control regs */
         if (dev_priv->card_type < NV_40)
                 user = NV03_USER(channel);
@@ -235,47 +237,6 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret,
         return 0;
 }
 
-int
-nouveau_channel_idle(struct nouveau_channel *chan)
-{
-        struct drm_device *dev = chan->dev;
-        struct drm_nouveau_private *dev_priv = dev->dev_private;
-        struct nouveau_engine *engine = &dev_priv->engine;
-        uint32_t caches;
-        int idle;
-
-        if (!chan) {
-                NV_ERROR(dev, "no channel...\n");
-                return 1;
-        }
-
-        caches = nv_rd32(dev, NV03_PFIFO_CACHES);
-        nv_wr32(dev, NV03_PFIFO_CACHES, caches & ~1);
-
-        if (engine->fifo.channel_id(dev) != chan->id) {
-                struct nouveau_gpuobj *ramfc =
-                        chan->ramfc ? chan->ramfc->gpuobj : NULL;
-
-                if (!ramfc) {
-                        NV_ERROR(dev, "No RAMFC for channel %d\n", chan->id);
-                        return 1;
-                }
-
-                engine->instmem.prepare_access(dev, false);
-                if (nv_ro32(dev, ramfc, 0) != nv_ro32(dev, ramfc, 1))
-                        idle = 0;
-                else
-                        idle = 1;
-                engine->instmem.finish_access(dev);
-        } else {
-                idle = (nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_GET) ==
-                        nv_rd32(dev, NV04_PFIFO_CACHE1_DMA_PUT));
-        }
-
-        nv_wr32(dev, NV03_PFIFO_CACHES, caches);
-        return idle;
-}
-
 /* stops a fifo */
 void
 nouveau_channel_free(struct nouveau_channel *chan)
@@ -414,7 +375,9 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data,
                 init->subchan[0].grclass = 0x0039;
         else
                 init->subchan[0].grclass = 0x5039;
-        init->nr_subchan = 1;
+        init->subchan[1].handle = NvSw;
+        init->subchan[1].grclass = NV_SW;
+        init->nr_subchan = 2;
 
         /* Named memory object area */
         ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem,
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.c b/drivers/gpu/drm/nouveau/nouveau_dma.c
index 703553687b20..7afbe8b40d51 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.c
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.c
@@ -29,12 +29,22 @@
 #include "nouveau_drv.h"
 #include "nouveau_dma.h"
 
+void
+nouveau_dma_pre_init(struct nouveau_channel *chan)
+{
+        chan->dma.max  = (chan->pushbuf_bo->bo.mem.size >> 2) - 2;
+        chan->dma.put  = 0;
+        chan->dma.cur  = chan->dma.put;
+        chan->dma.free = chan->dma.max - chan->dma.cur;
+}
+
 int
 nouveau_dma_init(struct nouveau_channel *chan)
 {
         struct drm_device *dev = chan->dev;
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nouveau_gpuobj *m2mf = NULL;
+        struct nouveau_gpuobj *nvsw = NULL;
         int ret, i;
 
         /* Create NV_MEMORY_TO_MEMORY_FORMAT for buffer moves */
@@ -47,6 +57,15 @@ nouveau_dma_init(struct nouveau_channel *chan)
         if (ret)
                 return ret;
 
+        /* Create an NV_SW object for various sync purposes */
+        ret = nouveau_gpuobj_sw_new(chan, NV_SW, &nvsw);
+        if (ret)
+                return ret;
+
+        ret = nouveau_gpuobj_ref_add(dev, chan, NvSw, nvsw, NULL);
+        if (ret)
+                return ret;
+
         /* NV_MEMORY_TO_MEMORY_FORMAT requires a notifier object */
         ret = nouveau_notifier_alloc(chan, NvNotify0, 32, &chan->m2mf_ntfy);
         if (ret)
@@ -64,12 +83,6 @@ nouveau_dma_init(struct nouveau_channel *chan)
                         return ret;
         }
 
-        /* Initialise DMA vars */
-        chan->dma.max  = (chan->pushbuf_bo->bo.mem.size >> 2) - 2;
-        chan->dma.put  = 0;
-        chan->dma.cur  = chan->dma.put;
-        chan->dma.free = chan->dma.max - chan->dma.cur;
-
         /* Insert NOPS for NOUVEAU_DMA_SKIPS */
         ret = RING_SPACE(chan, NOUVEAU_DMA_SKIPS);
         if (ret)
@@ -87,6 +100,13 @@ nouveau_dma_init(struct nouveau_channel *chan)
         BEGIN_RING(chan, NvSubM2MF, NV_MEMORY_TO_MEMORY_FORMAT_DMA_NOTIFY, 1);
         OUT_RING(chan, NvNotify0);
 
+        /* Initialise NV_SW */
+        ret = RING_SPACE(chan, 2);
+        if (ret)
+                return ret;
+        BEGIN_RING(chan, NvSubSw, 0, 1);
+        OUT_RING(chan, NvSw);
+
         /* Sit back and pray the channel works.. */
         FIRE_RING(chan);
 
@@ -113,7 +133,7 @@ READ_GET(struct nouveau_channel *chan, uint32_t *get)
 
         val = nvchan_rd32(chan, chan->user_get);
         if (val < chan->pushbuf_base ||
-            val >= chan->pushbuf_base + chan->pushbuf_bo->bo.mem.size) {
+            val > chan->pushbuf_base + (chan->dma.max << 2)) {
                 /* meaningless to dma_wait() except to know whether the
                  * GPU has stalled or not
                  */
diff --git a/drivers/gpu/drm/nouveau/nouveau_dma.h b/drivers/gpu/drm/nouveau/nouveau_dma.h
index 04e85d8f757e..dabfd655f93e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_dma.h
+++ b/drivers/gpu/drm/nouveau/nouveau_dma.h
@@ -46,10 +46,11 @@
 /* Hardcoded object assignments to subchannels (subchannel id). */
 enum {
         NvSubM2MF       = 0,
-        NvSub2D         = 1,
-        NvSubCtxSurf2D  = 1,
-        NvSubGdiRect    = 2,
-        NvSubImageBlit  = 3
+        NvSubSw         = 1,
+        NvSub2D         = 2,
+        NvSubCtxSurf2D  = 2,
+        NvSubGdiRect    = 3,
+        NvSubImageBlit  = 4
 };
 
 /* Object handles. */
@@ -67,6 +68,7 @@ enum {
         NvClipRect      = 0x8000000b,
         NvGdiRect       = 0x8000000c,
         NvImageBlit     = 0x8000000d,
+        NvSw            = 0x8000000e,
 
         /* G80+ display objects */
         NvEvoVRAM       = 0x01000000,
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 5f8cbb79c499..026419fe8791 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -59,11 +59,19 @@ struct nouveau_grctx;
 #define MAX_NUM_DCB_ENTRIES 16
 
 #define NOUVEAU_MAX_CHANNEL_NR 128
+#define NOUVEAU_MAX_TILE_NR 15
 
 #define NV50_VM_MAX_VRAM (2*1024*1024*1024ULL)
 #define NV50_VM_BLOCK    (512*1024*1024ULL)
 #define NV50_VM_VRAM_NR  (NV50_VM_MAX_VRAM / NV50_VM_BLOCK)
 
+struct nouveau_tile_reg {
+        struct nouveau_fence *fence;
+        uint32_t addr;
+        uint32_t size;
+        bool used;
+};
+
 struct nouveau_bo {
         struct ttm_buffer_object bo;
         struct ttm_placement placement;
@@ -83,6 +91,7 @@ struct nouveau_bo {
 
         uint32_t tile_mode;
         uint32_t tile_flags;
+        struct nouveau_tile_reg *tile;
 
         struct drm_gem_object *gem;
         struct drm_file *cpu_filp;
@@ -277,8 +286,13 @@ struct nouveau_timer_engine {
 };
 
 struct nouveau_fb_engine {
+        int num_tiles;
+
         int  (*init)(struct drm_device *dev);
         void (*takedown)(struct drm_device *dev);
+
+        void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr,
+                                 uint32_t size, uint32_t pitch);
 };
 
 struct nouveau_fifo_engine {
@@ -292,6 +306,8 @@ struct nouveau_fifo_engine {
         void (*disable)(struct drm_device *);
         void (*enable)(struct drm_device *);
         bool (*reassign)(struct drm_device *, bool enable);
+        bool (*cache_flush)(struct drm_device *dev);
+        bool (*cache_pull)(struct drm_device *dev, bool enable);
 
         int  (*channel_id)(struct drm_device *);
 
@@ -330,6 +346,9 @@ struct nouveau_pgraph_engine {
         void (*destroy_context)(struct nouveau_channel *);
         int  (*load_context)(struct nouveau_channel *);
         int  (*unload_context)(struct drm_device *);
+
+        void (*set_region_tiling)(struct drm_device *dev, int i, uint32_t addr,
+                                  uint32_t size, uint32_t pitch);
 };
 
 struct nouveau_engine {
@@ -548,6 +567,12 @@ struct drm_nouveau_private {
                 unsigned long sg_handle;
         } gart_info;
 
+        /* nv10-nv40 tiling regions */
+        struct {
+                struct nouveau_tile_reg reg[NOUVEAU_MAX_TILE_NR];
+                spinlock_t lock;
+        } tile;
+
         /* G8x/G9x virtual address space */
         uint64_t vm_gart_base;
         uint64_t vm_gart_size;
@@ -685,6 +710,13 @@ extern void nouveau_mem_release(struct drm_file *, struct mem_block *heap);
 extern int  nouveau_mem_init(struct drm_device *);
 extern int  nouveau_mem_init_agp(struct drm_device *);
 extern void nouveau_mem_close(struct drm_device *);
+extern struct nouveau_tile_reg *nv10_mem_set_tiling(struct drm_device *dev,
+                                                    uint32_t addr,
+                                                    uint32_t size,
+                                                    uint32_t pitch);
+extern void nv10_mem_expire_tiling(struct drm_device *dev,
+                                   struct nouveau_tile_reg *tile,
+                                   struct nouveau_fence *fence);
 extern int  nv50_mem_vm_bind_linear(struct drm_device *, uint64_t virt,
                                     uint32_t size, uint32_t flags,
                                     uint64_t phys);
@@ -713,7 +745,6 @@ extern int  nouveau_channel_alloc(struct drm_device *dev,
                                   struct drm_file *file_priv,
                                   uint32_t fb_ctxdma, uint32_t tt_ctxdma);
 extern void nouveau_channel_free(struct nouveau_channel *);
-extern int  nouveau_channel_idle(struct nouveau_channel *chan);
 
 /* nouveau_object.c */
 extern int  nouveau_gpuobj_early_init(struct drm_device *);
@@ -756,6 +787,8 @@ extern int nouveau_gpuobj_gart_dma_new(struct nouveau_channel *,
                                        uint32_t *o_ret);
 extern int nouveau_gpuobj_gr_new(struct nouveau_channel *, int class,
                                  struct nouveau_gpuobj **);
+extern int nouveau_gpuobj_sw_new(struct nouveau_channel *, int class,
+                                 struct nouveau_gpuobj **);
 extern int nouveau_ioctl_grobj_alloc(struct drm_device *, void *data,
                                      struct drm_file *);
 extern int nouveau_ioctl_gpuobj_free(struct drm_device *, void *data,
@@ -804,6 +837,7 @@ nouveau_debugfs_channel_fini(struct nouveau_channel *chan)
 #endif
 
 /* nouveau_dma.c */
+extern void nouveau_dma_pre_init(struct nouveau_channel *);
 extern int  nouveau_dma_init(struct nouveau_channel *);
 extern int  nouveau_dma_wait(struct nouveau_channel *, int size);
 
@@ -879,16 +913,22 @@ extern void nv04_fb_takedown(struct drm_device *);
 /* nv10_fb.c */
 extern int  nv10_fb_init(struct drm_device *);
 extern void nv10_fb_takedown(struct drm_device *);
+extern void nv10_fb_set_region_tiling(struct drm_device *, int, uint32_t,
+                                      uint32_t, uint32_t);
 
 /* nv40_fb.c */
 extern int  nv40_fb_init(struct drm_device *);
 extern void nv40_fb_takedown(struct drm_device *);
+extern void nv40_fb_set_region_tiling(struct drm_device *, int, uint32_t,
+                                      uint32_t, uint32_t);
 
 /* nv04_fifo.c */
 extern int  nv04_fifo_init(struct drm_device *);
 extern void nv04_fifo_disable(struct drm_device *);
 extern void nv04_fifo_enable(struct drm_device *);
 extern bool nv04_fifo_reassign(struct drm_device *, bool);
+extern bool nv04_fifo_cache_flush(struct drm_device *);
+extern bool nv04_fifo_cache_pull(struct drm_device *, bool);
 extern int  nv04_fifo_channel_id(struct drm_device *);
 extern int  nv04_fifo_create_context(struct nouveau_channel *);
 extern void nv04_fifo_destroy_context(struct nouveau_channel *);
@@ -941,6 +981,8 @@ extern void nv10_graph_destroy_context(struct nouveau_channel *);
 extern int  nv10_graph_load_context(struct nouveau_channel *);
 extern int  nv10_graph_unload_context(struct drm_device *);
 extern void nv10_graph_context_switch(struct drm_device *);
+extern void nv10_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+                                         uint32_t, uint32_t);
 
 /* nv20_graph.c */
 extern struct nouveau_pgraph_object_class nv20_graph_grclass[];
@@ -952,6 +994,8 @@ extern int  nv20_graph_unload_context(struct drm_device *);
 extern int  nv20_graph_init(struct drm_device *);
 extern void nv20_graph_takedown(struct drm_device *);
 extern int  nv30_graph_init(struct drm_device *);
+extern void nv20_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+                                         uint32_t, uint32_t);
 
 /* nv40_graph.c */
 extern struct nouveau_pgraph_object_class nv40_graph_grclass[];
@@ -963,6 +1007,8 @@ extern void nv40_graph_destroy_context(struct nouveau_channel *);
 extern int  nv40_graph_load_context(struct nouveau_channel *);
 extern int  nv40_graph_unload_context(struct drm_device *);
 extern void nv40_grctx_init(struct nouveau_grctx *);
+extern void nv40_graph_set_region_tiling(struct drm_device *, int, uint32_t,
+                                         uint32_t, uint32_t);
 
 /* nv50_graph.c */
 extern struct nouveau_pgraph_object_class nv50_graph_grclass[];
@@ -1030,8 +1076,7 @@ extern long nouveau_compat_ioctl(struct file *file, unsigned int cmd,
 
 /* nv04_dac.c */
 extern int nv04_dac_create(struct drm_device *dev, struct dcb_entry *entry);
-extern enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
-                                                 struct drm_connector *connector);
+extern uint32_t nv17_dac_sample_load(struct drm_encoder *encoder);
 extern int nv04_dac_output_offset(struct drm_encoder *encoder);
 extern void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable);
 
@@ -1049,9 +1094,6 @@ extern int nv04_tv_create(struct drm_device *dev, struct dcb_entry *entry);
 
 /* nv17_tv.c */
 extern int nv17_tv_create(struct drm_device *dev, struct dcb_entry *entry);
-extern enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
-                                                struct drm_connector *connector,
-                                                uint32_t pin_mask);
 
 /* nv04_display.c */
 extern int nv04_display_create(struct drm_device *);
@@ -1290,14 +1332,14 @@ nv_two_reg_pll(struct drm_device *dev)
         return false;
 }
 
-#define NV50_NVSW                                                    0x0000506e
-#define NV50_NVSW_DMA_SEMAPHORE                                      0x00000060
-#define NV50_NVSW_SEMAPHORE_OFFSET                                   0x00000064
-#define NV50_NVSW_SEMAPHORE_ACQUIRE                                  0x00000068
-#define NV50_NVSW_SEMAPHORE_RELEASE                                  0x0000006c
-#define NV50_NVSW_DMA_VBLSEM                                         0x0000018c
-#define NV50_NVSW_VBLSEM_OFFSET                                      0x00000400
-#define NV50_NVSW_VBLSEM_RELEASE_VALUE                               0x00000404
-#define NV50_NVSW_VBLSEM_RELEASE                                     0x00000408
+#define NV_SW                                                        0x0000506e
+#define NV_SW_DMA_SEMAPHORE                                          0x00000060
+#define NV_SW_SEMAPHORE_OFFSET                                       0x00000064
+#define NV_SW_SEMAPHORE_ACQUIRE                                      0x00000068
+#define NV_SW_SEMAPHORE_RELEASE                                      0x0000006c
+#define NV_SW_DMA_VBLSEM                                             0x0000018c
+#define NV_SW_VBLSEM_OFFSET                                          0x00000400
+#define NV_SW_VBLSEM_RELEASE_VALUE                                   0x00000404
+#define NV_SW_VBLSEM_RELEASE                                         0x00000408
 
 #endif /* __NOUVEAU_DRV_H__ */
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 84af25c238b6..0b05c869e0e7 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -64,8 +64,7 @@ nouveau_fbcon_sync(struct fb_info *info)
                 return 0;
 
         if (RING_SPACE(chan, 4)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
                 return 0;
         }
 
@@ -86,8 +85,7 @@ nouveau_fbcon_sync(struct fb_info *info)
         }
 
         if (ret) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
                 return 0;
         }
 
@@ -212,11 +210,11 @@ nouveau_fbcon_create(struct drm_device *dev, uint32_t fb_width,
 
         mode_cmd.bpp = surface_bpp;
         mode_cmd.pitch = mode_cmd.width * (mode_cmd.bpp >> 3);
-        mode_cmd.pitch = ALIGN(mode_cmd.pitch, 256);
+        mode_cmd.pitch = roundup(mode_cmd.pitch, 256);
         mode_cmd.depth = surface_depth;
 
         size = mode_cmd.pitch * mode_cmd.height;
-        size = ALIGN(size, PAGE_SIZE);
+        size = roundup(size, PAGE_SIZE);
 
         ret = nouveau_gem_new(dev, dev_priv->channel, size, 0, TTM_PL_FLAG_VRAM,
                               0, 0x0000, false, true, &nvbo);
@@ -380,3 +378,12 @@ nouveau_fbcon_remove(struct drm_device *dev, struct drm_framebuffer *fb)
 
         return 0;
 }
+
+void nouveau_fbcon_gpu_lockup(struct fb_info *info)
+{
+        struct nouveau_fbcon_par *par = info->par;
+        struct drm_device *dev = par->dev;
+
+        NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+        info->flags |= FBINFO_HWACCEL_DISABLED;
+}
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.h b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
index 8531140fedbc..462e0b87b4bd 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.h
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.h
@@ -43,5 +43,6 @@ void nouveau_fbcon_zfill(struct drm_device *dev);
 int nv04_fbcon_accel_init(struct fb_info *info);
 int nv50_fbcon_accel_init(struct fb_info *info);
 
+void nouveau_fbcon_gpu_lockup(struct fb_info *info);
 #endif /* __NV50_FBCON_H__ */
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_fence.c b/drivers/gpu/drm/nouveau/nouveau_fence.c
index dacac9a0842a..faddf53ff9ed 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fence.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fence.c
@@ -142,7 +142,7 @@ nouveau_fence_emit(struct nouveau_fence *fence)
         list_add_tail(&fence->entry, &chan->fence.pending);
         spin_unlock_irqrestore(&chan->fence.lock, flags);
 
-        BEGIN_RING(chan, NvSubM2MF, USE_REFCNT ? 0x0050 : 0x0150, 1);
+        BEGIN_RING(chan, NvSubSw, USE_REFCNT ? 0x0050 : 0x0150, 1);
         OUT_RING(chan, fence->sequence);
         FIRE_RING(chan);
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c
index 18fd8ac9fca7..2009db2426c3 100644
--- a/drivers/gpu/drm/nouveau/nouveau_gem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_gem.c
@@ -220,7 +220,6 @@ nouveau_gem_set_domain(struct drm_gem_object *gem, uint32_t read_domains,
 }
 
 struct validate_op {
-        struct nouveau_fence *fence;
         struct list_head vram_list;
         struct list_head gart_list;
         struct list_head both_list;
@@ -252,17 +251,11 @@ validate_fini_list(struct list_head *list, struct nouveau_fence *fence)
 }
 
 static void
-validate_fini(struct validate_op *op, bool success)
+validate_fini(struct validate_op *op, struct nouveau_fence* fence)
 {
-        struct nouveau_fence *fence = op->fence;
-
-        if (unlikely(!success))
-                op->fence = NULL;
-
-        validate_fini_list(&op->vram_list, op->fence);
-        validate_fini_list(&op->gart_list, op->fence);
-        validate_fini_list(&op->both_list, op->fence);
-        nouveau_fence_unref((void *)&fence);
+        validate_fini_list(&op->vram_list, fence);
+        validate_fini_list(&op->gart_list, fence);
+        validate_fini_list(&op->both_list, fence);
 }
 
 static int
@@ -420,10 +413,6 @@ nouveau_gem_pushbuf_validate(struct nouveau_channel *chan,
         INIT_LIST_HEAD(&op->gart_list);
         INIT_LIST_HEAD(&op->both_list);
 
-        ret = nouveau_fence_new(chan, &op->fence, false);
-        if (ret)
-                return ret;
-
         if (nr_buffers == 0)
                 return 0;
 
@@ -541,6 +530,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
         struct drm_nouveau_gem_pushbuf_bo *bo = NULL;
         struct nouveau_channel *chan;
         struct validate_op op;
+        struct nouveau_fence* fence = 0;
         uint32_t *pushbuf = NULL;
         int ret = 0, do_reloc = 0, i;
 
@@ -597,7 +587,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
 
         OUT_RINGp(chan, pushbuf, req->nr_dwords);
 
-        ret = nouveau_fence_emit(op.fence);
+        ret = nouveau_fence_new(chan, &fence, true);
         if (ret) {
                 NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
                 WIND_RING(chan);
@@ -605,7 +595,7 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
         }
 
         if (nouveau_gem_pushbuf_sync(chan)) {
-                ret = nouveau_fence_wait(op.fence, NULL, false, false);
+                ret = nouveau_fence_wait(fence, NULL, false, false);
                 if (ret) {
                         for (i = 0; i < req->nr_dwords; i++)
                                 NV_ERROR(dev, "0x%08x\n", pushbuf[i]);
@@ -614,7 +604,8 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data,
         }
 
 out:
-        validate_fini(&op, ret == 0);
+        validate_fini(&op, fence);
+        nouveau_fence_unref((void**)&fence);
         mutex_unlock(&dev->struct_mutex);
         kfree(pushbuf);
         kfree(bo);
@@ -634,6 +625,7 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
         struct drm_gem_object *gem;
         struct nouveau_bo *pbbo;
         struct validate_op op;
+        struct nouveau_fence* fence = 0;
         int i, ret = 0, do_reloc = 0;
 
         NOUVEAU_CHECK_INITIALISED_WITH_RETURN;
@@ -772,7 +764,7 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
                         OUT_RING(chan, 0);
         }
 
-        ret = nouveau_fence_emit(op.fence);
+        ret = nouveau_fence_new(chan, &fence, true);
         if (ret) {
                 NV_ERROR(dev, "error fencing pushbuf: %d\n", ret);
                 WIND_RING(chan);
@@ -780,7 +772,8 @@ nouveau_gem_ioctl_pushbuf_call(struct drm_device *dev, void *data,
         }
 
 out:
-        validate_fini(&op, ret == 0);
+        validate_fini(&op, fence);
+        nouveau_fence_unref((void**)&fence);
         mutex_unlock(&dev->struct_mutex);
         kfree(bo);
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_irq.c b/drivers/gpu/drm/nouveau/nouveau_irq.c
index 370c72c968d1..919a619ca7fa 100644
--- a/drivers/gpu/drm/nouveau/nouveau_irq.c
+++ b/drivers/gpu/drm/nouveau/nouveau_irq.c
@@ -635,6 +635,7 @@ nv50_pgraph_irq_handler(struct drm_device *dev)
 
                 if ((nv_rd32(dev, 0x400500) & isb) != isb)
                         nv_wr32(dev, 0x400500, nv_rd32(dev, 0x400500) | isb);
+                nv_wr32(dev, 0x400824, nv_rd32(dev, 0x400824) & ~(1 << 31));
         }
 
         nv_wr32(dev, NV03_PMC_INTR_0, NV_PMC_INTR_0_PGRAPH_PENDING);
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 5158a12f7844..fb9bdd6edf1f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -192,6 +192,92 @@ void nouveau_mem_release(struct drm_file *file_priv, struct mem_block *heap)
 }
 
 /*
+ * NV10-NV40 tiling helpers
+ */
+
+static void
+nv10_mem_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                           uint32_t size, uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+        struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
+        struct nouveau_tile_reg *tile = &dev_priv->tile.reg[i];
+
+        tile->addr = addr;
+        tile->size = size;
+        tile->used = !!pitch;
+        nouveau_fence_unref((void **)&tile->fence);
+
+        if (!pfifo->cache_flush(dev))
+                return;
+
+        pfifo->reassign(dev, false);
+        pfifo->cache_flush(dev);
+        pfifo->cache_pull(dev, false);
+
+        nouveau_wait_for_idle(dev);
+
+        pgraph->set_region_tiling(dev, i, addr, size, pitch);
+        pfb->set_region_tiling(dev, i, addr, size, pitch);
+
+        pfifo->cache_pull(dev, true);
+        pfifo->reassign(dev, true);
+}
+
+struct nouveau_tile_reg *
+nv10_mem_set_tiling(struct drm_device *dev, uint32_t addr, uint32_t size,
+                    uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+        struct nouveau_tile_reg *tile = dev_priv->tile.reg, *found = NULL;
+        int i;
+
+        spin_lock(&dev_priv->tile.lock);
+
+        for (i = 0; i < pfb->num_tiles; i++) {
+                if (tile[i].used)
+                        /* Tile region in use. */
+                        continue;
+
+                if (tile[i].fence &&
+                    !nouveau_fence_signalled(tile[i].fence, NULL))
+                        /* Pending tile region. */
+                        continue;
+
+                if (max(tile[i].addr, addr) <
+                    min(tile[i].addr + tile[i].size, addr + size))
+                        /* Kill an intersecting tile region. */
+                        nv10_mem_set_region_tiling(dev, i, 0, 0, 0);
+
+                if (pitch && !found) {
+                        /* Free tile region. */
+                        nv10_mem_set_region_tiling(dev, i, addr, size, pitch);
+                        found = &tile[i];
+                }
+        }
+
+        spin_unlock(&dev_priv->tile.lock);
+
+        return found;
+}
+
+void
+nv10_mem_expire_tiling(struct drm_device *dev, struct nouveau_tile_reg *tile,
+                       struct nouveau_fence *fence)
+{
+        if (fence) {
+                /* Mark it as pending. */
+                tile->fence = fence;
+                nouveau_fence_ref(fence);
+        }
+
+        tile->used = false;
+}
+
+/*
  * NV50 VM helpers
  */
 int
@@ -513,6 +599,7 @@ nouveau_mem_init(struct drm_device *dev)
 
         INIT_LIST_HEAD(&dev_priv->ttm.bo_list);
         spin_lock_init(&dev_priv->ttm.bo_list_lock);
+        spin_lock_init(&dev_priv->tile.lock);
 
         dev_priv->fb_available_size = nouveau_mem_fb_amount(dev);
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_object.c b/drivers/gpu/drm/nouveau/nouveau_object.c
index 93379bb81bea..6c2cf81716df 100644
--- a/drivers/gpu/drm/nouveau/nouveau_object.c
+++ b/drivers/gpu/drm/nouveau/nouveau_object.c
@@ -881,7 +881,7 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, int class,
         return 0;
 }
 
-static int
+int
 nouveau_gpuobj_sw_new(struct nouveau_channel *chan, int class,
                       struct nouveau_gpuobj **gpuobj_ret)
 {
diff --git a/drivers/gpu/drm/nouveau/nouveau_reg.h b/drivers/gpu/drm/nouveau/nouveau_reg.h
index fa1b0e7165b9..251f1b3b38b9 100644
--- a/drivers/gpu/drm/nouveau/nouveau_reg.h
+++ b/drivers/gpu/drm/nouveau/nouveau_reg.h
@@ -349,19 +349,19 @@
 #define NV04_PGRAPH_BLEND                                  0x00400824
 #define NV04_PGRAPH_STORED_FMT                             0x00400830
 #define NV04_PGRAPH_PATT_COLORRAM                          0x00400900
-#define NV40_PGRAPH_TILE0(i)                               (0x00400900 + (i*16))
-#define NV40_PGRAPH_TLIMIT0(i)                             (0x00400904 + (i*16))
-#define NV40_PGRAPH_TSIZE0(i)                              (0x00400908 + (i*16))
-#define NV40_PGRAPH_TSTATUS0(i)                            (0x0040090C + (i*16))
+#define NV20_PGRAPH_TILE(i)                                (0x00400900 + (i*16))
+#define NV20_PGRAPH_TLIMIT(i)                              (0x00400904 + (i*16))
+#define NV20_PGRAPH_TSIZE(i)                               (0x00400908 + (i*16))
+#define NV20_PGRAPH_TSTATUS(i)                             (0x0040090C + (i*16))
 #define NV10_PGRAPH_TILE(i)                                (0x00400B00 + (i*16))
 #define NV10_PGRAPH_TLIMIT(i)                              (0x00400B04 + (i*16))
 #define NV10_PGRAPH_TSIZE(i)                               (0x00400B08 + (i*16))
 #define NV10_PGRAPH_TSTATUS(i)                             (0x00400B0C + (i*16))
 #define NV04_PGRAPH_U_RAM                                  0x00400D00
-#define NV47_PGRAPH_TILE0(i)                               (0x00400D00 + (i*16))
-#define NV47_PGRAPH_TLIMIT0(i)                             (0x00400D04 + (i*16))
-#define NV47_PGRAPH_TSIZE0(i)                              (0x00400D08 + (i*16))
-#define NV47_PGRAPH_TSTATUS0(i)                            (0x00400D0C + (i*16))
+#define NV47_PGRAPH_TILE(i)                                (0x00400D00 + (i*16))
+#define NV47_PGRAPH_TLIMIT(i)                              (0x00400D04 + (i*16))
+#define NV47_PGRAPH_TSIZE(i)                               (0x00400D08 + (i*16))
+#define NV47_PGRAPH_TSTATUS(i)                             (0x00400D0C + (i*16))
 #define NV04_PGRAPH_V_RAM                                  0x00400D40
 #define NV04_PGRAPH_W_RAM                                  0x00400D80
 #define NV10_PGRAPH_COMBINER0_IN_ALPHA                     0x00400E40
diff --git a/drivers/gpu/drm/nouveau/nouveau_state.c b/drivers/gpu/drm/nouveau/nouveau_state.c
index e76ec2d207a9..09b9a46dfc0e 100644
--- a/drivers/gpu/drm/nouveau/nouveau_state.c
+++ b/drivers/gpu/drm/nouveau/nouveau_state.c
@@ -76,6 +76,8 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv04_fifo_channel_id;
                 engine->fifo.create_context     = nv04_fifo_create_context;
                 engine->fifo.destroy_context    = nv04_fifo_destroy_context;
@@ -100,6 +102,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->timer.takedown          = nv04_timer_takedown;
                 engine->fb.init                 = nv10_fb_init;
                 engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                 engine->graph.grclass           = nv10_graph_grclass;
                 engine->graph.init              = nv10_graph_init;
                 engine->graph.takedown          = nv10_graph_takedown;
@@ -109,12 +112,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->graph.fifo_access       = nv04_graph_fifo_access;
                 engine->graph.load_context      = nv10_graph_load_context;
                 engine->graph.unload_context    = nv10_graph_unload_context;
+                engine->graph.set_region_tiling = nv10_graph_set_region_tiling;
                 engine->fifo.channels           = 32;
                 engine->fifo.init               = nv10_fifo_init;
                 engine->fifo.takedown           = nouveau_stub_takedown;
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv10_fifo_channel_id;
                 engine->fifo.create_context     = nv10_fifo_create_context;
                 engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -139,6 +145,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->timer.takedown          = nv04_timer_takedown;
                 engine->fb.init                 = nv10_fb_init;
                 engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                 engine->graph.grclass           = nv20_graph_grclass;
                 engine->graph.init              = nv20_graph_init;
                 engine->graph.takedown          = nv20_graph_takedown;
@@ -148,12 +155,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->graph.fifo_access       = nv04_graph_fifo_access;
                 engine->graph.load_context      = nv20_graph_load_context;
                 engine->graph.unload_context    = nv20_graph_unload_context;
+                engine->graph.set_region_tiling = nv20_graph_set_region_tiling;
                 engine->fifo.channels           = 32;
                 engine->fifo.init               = nv10_fifo_init;
                 engine->fifo.takedown           = nouveau_stub_takedown;
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv10_fifo_channel_id;
                 engine->fifo.create_context     = nv10_fifo_create_context;
                 engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -178,6 +188,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->timer.takedown          = nv04_timer_takedown;
                 engine->fb.init                 = nv10_fb_init;
                 engine->fb.takedown             = nv10_fb_takedown;
+                engine->fb.set_region_tiling    = nv10_fb_set_region_tiling;
                 engine->graph.grclass           = nv30_graph_grclass;
                 engine->graph.init              = nv30_graph_init;
                 engine->graph.takedown          = nv20_graph_takedown;
@@ -187,12 +198,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->graph.destroy_context   = nv20_graph_destroy_context;
                 engine->graph.load_context      = nv20_graph_load_context;
                 engine->graph.unload_context    = nv20_graph_unload_context;
+                engine->graph.set_region_tiling = nv20_graph_set_region_tiling;
                 engine->fifo.channels           = 32;
                 engine->fifo.init               = nv10_fifo_init;
                 engine->fifo.takedown           = nouveau_stub_takedown;
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv10_fifo_channel_id;
                 engine->fifo.create_context     = nv10_fifo_create_context;
                 engine->fifo.destroy_context    = nv10_fifo_destroy_context;
@@ -218,6 +232,7 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->timer.takedown          = nv04_timer_takedown;
                 engine->fb.init                 = nv40_fb_init;
                 engine->fb.takedown             = nv40_fb_takedown;
+                engine->fb.set_region_tiling    = nv40_fb_set_region_tiling;
                 engine->graph.grclass           = nv40_graph_grclass;
                 engine->graph.init              = nv40_graph_init;
                 engine->graph.takedown          = nv40_graph_takedown;
@@ -227,12 +242,15 @@ static int nouveau_init_engine_ptrs(struct drm_device *dev)
                 engine->graph.destroy_context   = nv40_graph_destroy_context;
                 engine->graph.load_context      = nv40_graph_load_context;
                 engine->graph.unload_context    = nv40_graph_unload_context;
+                engine->graph.set_region_tiling = nv40_graph_set_region_tiling;
                 engine->fifo.channels           = 32;
                 engine->fifo.init               = nv40_fifo_init;
                 engine->fifo.takedown           = nouveau_stub_takedown;
                 engine->fifo.disable            = nv04_fifo_disable;
                 engine->fifo.enable             = nv04_fifo_enable;
                 engine->fifo.reassign           = nv04_fifo_reassign;
+                engine->fifo.cache_flush        = nv04_fifo_cache_flush;
+                engine->fifo.cache_pull         = nv04_fifo_cache_pull;
                 engine->fifo.channel_id         = nv10_fifo_channel_id;
                 engine->fifo.create_context     = nv40_fifo_create_context;
                 engine->fifo.destroy_context    = nv40_fifo_destroy_context;
@@ -624,7 +642,10 @@ int nouveau_load(struct drm_device *dev, unsigned long flags)
                 dev_priv->chipset = (reg0 & 0xff00000) >> 20;
         /* NV04 or NV05 */
         } else if ((reg0 & 0xff00fff0) == 0x20004000) {
-                dev_priv->chipset = 0x04;
+                if (reg0 & 0x00f00000)
+                        dev_priv->chipset = 0x05;
+                else
+                        dev_priv->chipset = 0x04;
         } else
                 dev_priv->chipset = 0xff;
 
@@ -704,8 +725,8 @@ static void nouveau_close(struct drm_device *dev)
 {
         struct drm_nouveau_private *dev_priv = dev->dev_private;
 
-        /* In the case of an error dev_priv may not be be allocated yet */
-        if (dev_priv && dev_priv->card_type)
+        /* In the case of an error dev_priv may not be allocated yet */
+        if (dev_priv)
                 nouveau_card_takedown(dev);
 }
 
diff --git a/drivers/gpu/drm/nouveau/nouveau_ttm.c b/drivers/gpu/drm/nouveau/nouveau_ttm.c
index 187eb84e4da5..c385d50f041b 100644
--- a/drivers/gpu/drm/nouveau/nouveau_ttm.c
+++ b/drivers/gpu/drm/nouveau/nouveau_ttm.c
@@ -28,45 +28,17 @@
 
 #include "nouveau_drv.h"
 
-static struct vm_operations_struct nouveau_ttm_vm_ops;
-static const struct vm_operations_struct *ttm_vm_ops;
-
-static int
-nouveau_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
-{
-        struct ttm_buffer_object *bo = vma->vm_private_data;
-        int ret;
-
-        if (unlikely(bo == NULL))
-                return VM_FAULT_NOPAGE;
-
-        ret = ttm_vm_ops->fault(vma, vmf);
-        return ret;
-}
-
 int
 nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
 {
         struct drm_file *file_priv = filp->private_data;
         struct drm_nouveau_private *dev_priv =
                 file_priv->minor->dev->dev_private;
-        int ret;
 
         if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
                 return drm_mmap(filp, vma);
 
-        ret = ttm_bo_mmap(filp, vma, &dev_priv->ttm.bdev);
-        if (unlikely(ret != 0))
-                return ret;
-
-        if (unlikely(ttm_vm_ops == NULL)) {
-                ttm_vm_ops = vma->vm_ops;
-                nouveau_ttm_vm_ops = *ttm_vm_ops;
-                nouveau_ttm_vm_ops.fault = &nouveau_ttm_fault;
-        }
-
-        vma->vm_ops = &nouveau_ttm_vm_ops;
-        return 0;
+        return ttm_bo_mmap(filp, vma, &dev_priv->ttm.bdev);
 }
 
 static int
diff --git a/drivers/gpu/drm/nouveau/nv04_dac.c b/drivers/gpu/drm/nouveau/nv04_dac.c
index d9f32879ba38..d0e038d28948 100644
--- a/drivers/gpu/drm/nouveau/nv04_dac.c
+++ b/drivers/gpu/drm/nouveau/nv04_dac.c
@@ -212,16 +212,15 @@ out:
         return connector_status_disconnected;
 }
 
-enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
-                                          struct drm_connector *connector)
+uint32_t nv17_dac_sample_load(struct drm_encoder *encoder)
 {
         struct drm_device *dev = encoder->dev;
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
-        uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
+        uint32_t sample, testval, regoffset = nv04_dac_output_offset(encoder);
         uint32_t saved_powerctrl_2 = 0, saved_powerctrl_4 = 0, saved_routput,
                 saved_rtest_ctrl, saved_gpio0, saved_gpio1, temp, routput;
-        int head, present = 0;
+        int head;
 
 #define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
         if (dcb->type == OUTPUT_TV) {
@@ -287,13 +286,7 @@ enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
                       temp | NV_PRAMDAC_TEST_CONTROL_TP_INS_EN_ASSERTED);
         msleep(5);
 
-        temp = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
-
-        if (dcb->type == OUTPUT_TV)
-                present = (nv17_tv_detect(encoder, connector, temp)
-                           == connector_status_connected);
-        else
-                present = temp & NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI;
+        sample = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
 
         temp = NVReadRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL);
         NVWriteRAMDAC(dev, head, NV_PRAMDAC_TEST_CONTROL,
@@ -310,15 +303,25 @@ enum drm_connector_status nv17_dac_detect(struct drm_encoder *encoder,
         nv17_gpio_set(dev, DCB_GPIO_TVDAC1, saved_gpio1);
         nv17_gpio_set(dev, DCB_GPIO_TVDAC0, saved_gpio0);
 
-        if (present) {
-                NV_INFO(dev, "Load detected on output %c\n", '@' + ffs(dcb->or));
+        return sample;
+}
+
+static enum drm_connector_status
+nv17_dac_detect(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+        struct drm_device *dev = encoder->dev;
+        struct dcb_entry *dcb = nouveau_encoder(encoder)->dcb;
+        uint32_t sample = nv17_dac_sample_load(encoder);
+
+        if (sample & NV_PRAMDAC_TEST_CONTROL_SENSEB_ALLHI) {
+                NV_INFO(dev, "Load detected on output %c\n",
+                        '@' + ffs(dcb->or));
                 return connector_status_connected;
+        } else {
+                return connector_status_disconnected;
         }
-
-        return connector_status_disconnected;
 }
 
-
 static bool nv04_dac_mode_fixup(struct drm_encoder *encoder,
                                 struct drm_display_mode *mode,
                                 struct drm_display_mode *adjusted_mode)
diff --git a/drivers/gpu/drm/nouveau/nv04_fbcon.c b/drivers/gpu/drm/nouveau/nv04_fbcon.c
index 09a31071ee58..d910873c1368 100644
--- a/drivers/gpu/drm/nouveau/nv04_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv04_fbcon.c
@@ -39,8 +39,7 @@ nv04_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
                 return;
 
         if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 4)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
         }
 
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -62,14 +61,12 @@ nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
         struct drm_device *dev = par->dev;
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nouveau_channel *chan = dev_priv->channel;
-        uint32_t color = ((uint32_t *) info->pseudo_palette)[rect->color];
 
         if (info->state != FBINFO_STATE_RUNNING)
                 return;
 
         if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 7)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
         }
 
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -80,7 +77,11 @@ nv04_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
         BEGIN_RING(chan, NvSubGdiRect, 0x02fc, 1);
         OUT_RING(chan, (rect->rop != ROP_COPY) ? 1 : 3);
         BEGIN_RING(chan, NvSubGdiRect, 0x03fc, 1);
-        OUT_RING(chan, color);
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+            info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+                OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
+        else
+                OUT_RING(chan, rect->color);
         BEGIN_RING(chan, NvSubGdiRect, 0x0400, 2);
         OUT_RING(chan, (rect->dx << 16) | rect->dy);
         OUT_RING(chan, (rect->width << 16) | rect->height);
@@ -109,8 +110,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         }
 
         if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 8)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
         }
 
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -144,8 +144,7 @@ nv04_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
                 int iter_len = dsize > 128 ? 128 : dsize;
 
                 if (RING_SPACE(chan, iter_len + 1)) {
-                        NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-                        info->flags |= FBINFO_HWACCEL_DISABLED;
+                        nouveau_fbcon_gpu_lockup(info);
                         cfb_imageblit(info, image);
                         return;
                 }
@@ -184,6 +183,7 @@ nv04_fbcon_accel_init(struct fb_info *info)
         struct drm_device *dev = par->dev;
         struct drm_nouveau_private *dev_priv = dev->dev_private;
         struct nouveau_channel *chan = dev_priv->channel;
+        const int sub = NvSubCtxSurf2D;
         int surface_fmt, pattern_fmt, rect_fmt;
         int ret;
 
@@ -242,30 +242,29 @@ nv04_fbcon_accel_init(struct fb_info *info)
                 return ret;
 
         if (RING_SPACE(chan, 49)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
                 return 0;
         }
 
-        BEGIN_RING(chan, 1, 0x0000, 1);
+        BEGIN_RING(chan, sub, 0x0000, 1);
         OUT_RING(chan, NvCtxSurf2D);
-        BEGIN_RING(chan, 1, 0x0184, 2);
+        BEGIN_RING(chan, sub, 0x0184, 2);
         OUT_RING(chan, NvDmaFB);
         OUT_RING(chan, NvDmaFB);
-        BEGIN_RING(chan, 1, 0x0300, 4);
+        BEGIN_RING(chan, sub, 0x0300, 4);
         OUT_RING(chan, surface_fmt);
         OUT_RING(chan, info->fix.line_length | (info->fix.line_length << 16));
         OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
         OUT_RING(chan, info->fix.smem_start - dev->mode_config.fb_base);
 
-        BEGIN_RING(chan, 1, 0x0000, 1);
+        BEGIN_RING(chan, sub, 0x0000, 1);
         OUT_RING(chan, NvRop);
-        BEGIN_RING(chan, 1, 0x0300, 1);
+        BEGIN_RING(chan, sub, 0x0300, 1);
         OUT_RING(chan, 0x55);
 
-        BEGIN_RING(chan, 1, 0x0000, 1);
+        BEGIN_RING(chan, sub, 0x0000, 1);
         OUT_RING(chan, NvImagePatt);
-        BEGIN_RING(chan, 1, 0x0300, 8);
+        BEGIN_RING(chan, sub, 0x0300, 8);
         OUT_RING(chan, pattern_fmt);
 #ifdef __BIG_ENDIAN
         OUT_RING(chan, 2);
@@ -279,9 +278,9 @@ nv04_fbcon_accel_init(struct fb_info *info)
         OUT_RING(chan, ~0);
         OUT_RING(chan, ~0);
 
-        BEGIN_RING(chan, 1, 0x0000, 1);
+        BEGIN_RING(chan, sub, 0x0000, 1);
         OUT_RING(chan, NvClipRect);
-        BEGIN_RING(chan, 1, 0x0300, 2);
+        BEGIN_RING(chan, sub, 0x0300, 2);
         OUT_RING(chan, 0);
         OUT_RING(chan, (info->var.yres_virtual << 16) | info->var.xres_virtual);
 
diff --git a/drivers/gpu/drm/nouveau/nv04_fifo.c b/drivers/gpu/drm/nouveau/nv04_fifo.c
index 0c3cd53c7313..f31347b8c9b0 100644
--- a/drivers/gpu/drm/nouveau/nv04_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv04_fifo.c
@@ -71,6 +71,40 @@ nv04_fifo_reassign(struct drm_device *dev, bool enable)
         return (reassign == 1);
 }
 
+bool
+nv04_fifo_cache_flush(struct drm_device *dev)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_timer_engine *ptimer = &dev_priv->engine.timer;
+        uint64_t start = ptimer->read(dev);
+
+        do {
+                if (nv_rd32(dev, NV03_PFIFO_CACHE1_GET) ==
+                    nv_rd32(dev, NV03_PFIFO_CACHE1_PUT))
+                        return true;
+
+        } while (ptimer->read(dev) - start < 100000000);
+
+        NV_ERROR(dev, "Timeout flushing the PFIFO cache.\n");
+
+        return false;
+}
+
+bool
+nv04_fifo_cache_pull(struct drm_device *dev, bool enable)
+{
+        uint32_t pull = nv_rd32(dev, NV04_PFIFO_CACHE1_PULL0);
+
+        if (enable) {
+                nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull | 1);
+        } else {
+                nv_wr32(dev, NV04_PFIFO_CACHE1_PULL0, pull & ~1);
+                nv_wr32(dev, NV04_PFIFO_CACHE1_HASH, 0);
+        }
+
+        return !!(pull & 1);
+}
+
 int
 nv04_fifo_channel_id(struct drm_device *dev)
 {
diff --git a/drivers/gpu/drm/nouveau/nv04_graph.c b/drivers/gpu/drm/nouveau/nv04_graph.c
index d561d773c0f4..e260986ea65a 100644
--- a/drivers/gpu/drm/nouveau/nv04_graph.c
+++ b/drivers/gpu/drm/nouveau/nv04_graph.c
@@ -28,6 +28,10 @@
 #include "nouveau_drv.h"
 
 static uint32_t nv04_graph_ctx_regs[] = {
+        0x0040053c,
+        0x00400544,
+        0x00400540,
+        0x00400548,
         NV04_PGRAPH_CTX_SWITCH1,
         NV04_PGRAPH_CTX_SWITCH2,
         NV04_PGRAPH_CTX_SWITCH3,
@@ -102,69 +106,69 @@ static uint32_t nv04_graph_ctx_regs[] = {
         NV04_PGRAPH_PATT_COLOR0,
         NV04_PGRAPH_PATT_COLOR1,
         NV04_PGRAPH_PATT_COLORRAM+0x00,
-        NV04_PGRAPH_PATT_COLORRAM+0x01,
-        NV04_PGRAPH_PATT_COLORRAM+0x02,
-        NV04_PGRAPH_PATT_COLORRAM+0x03,
         NV04_PGRAPH_PATT_COLORRAM+0x04,
-        NV04_PGRAPH_PATT_COLORRAM+0x05,
-        NV04_PGRAPH_PATT_COLORRAM+0x06,
-        NV04_PGRAPH_PATT_COLORRAM+0x07,
         NV04_PGRAPH_PATT_COLORRAM+0x08,
-        NV04_PGRAPH_PATT_COLORRAM+0x09,
-        NV04_PGRAPH_PATT_COLORRAM+0x0A,
-        NV04_PGRAPH_PATT_COLORRAM+0x0B,
-        NV04_PGRAPH_PATT_COLORRAM+0x0C,
-        NV04_PGRAPH_PATT_COLORRAM+0x0D,
-        NV04_PGRAPH_PATT_COLORRAM+0x0E,
-        NV04_PGRAPH_PATT_COLORRAM+0x0F,
+        NV04_PGRAPH_PATT_COLORRAM+0x0c,
         NV04_PGRAPH_PATT_COLORRAM+0x10,
-        NV04_PGRAPH_PATT_COLORRAM+0x11,
-        NV04_PGRAPH_PATT_COLORRAM+0x12,
-        NV04_PGRAPH_PATT_COLORRAM+0x13,
         NV04_PGRAPH_PATT_COLORRAM+0x14,
-        NV04_PGRAPH_PATT_COLORRAM+0x15,
-        NV04_PGRAPH_PATT_COLORRAM+0x16,
-        NV04_PGRAPH_PATT_COLORRAM+0x17,
         NV04_PGRAPH_PATT_COLORRAM+0x18,
-        NV04_PGRAPH_PATT_COLORRAM+0x19,
-        NV04_PGRAPH_PATT_COLORRAM+0x1A,
-        NV04_PGRAPH_PATT_COLORRAM+0x1B,
-        NV04_PGRAPH_PATT_COLORRAM+0x1C,
-        NV04_PGRAPH_PATT_COLORRAM+0x1D,
-        NV04_PGRAPH_PATT_COLORRAM+0x1E,
-        NV04_PGRAPH_PATT_COLORRAM+0x1F,
+        NV04_PGRAPH_PATT_COLORRAM+0x1c,
         NV04_PGRAPH_PATT_COLORRAM+0x20,
-        NV04_PGRAPH_PATT_COLORRAM+0x21,
-        NV04_PGRAPH_PATT_COLORRAM+0x22,
-        NV04_PGRAPH_PATT_COLORRAM+0x23,
         NV04_PGRAPH_PATT_COLORRAM+0x24,
-        NV04_PGRAPH_PATT_COLORRAM+0x25,
-        NV04_PGRAPH_PATT_COLORRAM+0x26,
-        NV04_PGRAPH_PATT_COLORRAM+0x27,
         NV04_PGRAPH_PATT_COLORRAM+0x28,
-        NV04_PGRAPH_PATT_COLORRAM+0x29,
-        NV04_PGRAPH_PATT_COLORRAM+0x2A,
-        NV04_PGRAPH_PATT_COLORRAM+0x2B,
-        NV04_PGRAPH_PATT_COLORRAM+0x2C,
-        NV04_PGRAPH_PATT_COLORRAM+0x2D,
-        NV04_PGRAPH_PATT_COLORRAM+0x2E,
-        NV04_PGRAPH_PATT_COLORRAM+0x2F,
+        NV04_PGRAPH_PATT_COLORRAM+0x2c,
         NV04_PGRAPH_PATT_COLORRAM+0x30,
-        NV04_PGRAPH_PATT_COLORRAM+0x31,
-        NV04_PGRAPH_PATT_COLORRAM+0x32,
-        NV04_PGRAPH_PATT_COLORRAM+0x33,
         NV04_PGRAPH_PATT_COLORRAM+0x34,
-        NV04_PGRAPH_PATT_COLORRAM+0x35,
-        NV04_PGRAPH_PATT_COLORRAM+0x36,
-        NV04_PGRAPH_PATT_COLORRAM+0x37,
         NV04_PGRAPH_PATT_COLORRAM+0x38,
-        NV04_PGRAPH_PATT_COLORRAM+0x39,
-        NV04_PGRAPH_PATT_COLORRAM+0x3A,
-        NV04_PGRAPH_PATT_COLORRAM+0x3B,
-        NV04_PGRAPH_PATT_COLORRAM+0x3C,
-        NV04_PGRAPH_PATT_COLORRAM+0x3D,
-        NV04_PGRAPH_PATT_COLORRAM+0x3E,
-        NV04_PGRAPH_PATT_COLORRAM+0x3F,
+        NV04_PGRAPH_PATT_COLORRAM+0x3c,
+        NV04_PGRAPH_PATT_COLORRAM+0x40,
+        NV04_PGRAPH_PATT_COLORRAM+0x44,
+        NV04_PGRAPH_PATT_COLORRAM+0x48,
+        NV04_PGRAPH_PATT_COLORRAM+0x4c,
+        NV04_PGRAPH_PATT_COLORRAM+0x50,
+        NV04_PGRAPH_PATT_COLORRAM+0x54,
+        NV04_PGRAPH_PATT_COLORRAM+0x58,
+        NV04_PGRAPH_PATT_COLORRAM+0x5c,
+        NV04_PGRAPH_PATT_COLORRAM+0x60,
+        NV04_PGRAPH_PATT_COLORRAM+0x64,
+        NV04_PGRAPH_PATT_COLORRAM+0x68,
+        NV04_PGRAPH_PATT_COLORRAM+0x6c,
+        NV04_PGRAPH_PATT_COLORRAM+0x70,
+        NV04_PGRAPH_PATT_COLORRAM+0x74,
+        NV04_PGRAPH_PATT_COLORRAM+0x78,
+        NV04_PGRAPH_PATT_COLORRAM+0x7c,
+        NV04_PGRAPH_PATT_COLORRAM+0x80,
+        NV04_PGRAPH_PATT_COLORRAM+0x84,
+        NV04_PGRAPH_PATT_COLORRAM+0x88,
+        NV04_PGRAPH_PATT_COLORRAM+0x8c,
+        NV04_PGRAPH_PATT_COLORRAM+0x90,
+        NV04_PGRAPH_PATT_COLORRAM+0x94,
+        NV04_PGRAPH_PATT_COLORRAM+0x98,
+        NV04_PGRAPH_PATT_COLORRAM+0x9c,
+        NV04_PGRAPH_PATT_COLORRAM+0xa0,
+        NV04_PGRAPH_PATT_COLORRAM+0xa4,
+        NV04_PGRAPH_PATT_COLORRAM+0xa8,
+        NV04_PGRAPH_PATT_COLORRAM+0xac,
+        NV04_PGRAPH_PATT_COLORRAM+0xb0,
+        NV04_PGRAPH_PATT_COLORRAM+0xb4,
+        NV04_PGRAPH_PATT_COLORRAM+0xb8,
+        NV04_PGRAPH_PATT_COLORRAM+0xbc,
+        NV04_PGRAPH_PATT_COLORRAM+0xc0,
+        NV04_PGRAPH_PATT_COLORRAM+0xc4,
+        NV04_PGRAPH_PATT_COLORRAM+0xc8,
+        NV04_PGRAPH_PATT_COLORRAM+0xcc,
+        NV04_PGRAPH_PATT_COLORRAM+0xd0,
+        NV04_PGRAPH_PATT_COLORRAM+0xd4,
+        NV04_PGRAPH_PATT_COLORRAM+0xd8,
+        NV04_PGRAPH_PATT_COLORRAM+0xdc,
+        NV04_PGRAPH_PATT_COLORRAM+0xe0,
+        NV04_PGRAPH_PATT_COLORRAM+0xe4,
+        NV04_PGRAPH_PATT_COLORRAM+0xe8,
+        NV04_PGRAPH_PATT_COLORRAM+0xec,
+        NV04_PGRAPH_PATT_COLORRAM+0xf0,
+        NV04_PGRAPH_PATT_COLORRAM+0xf4,
+        NV04_PGRAPH_PATT_COLORRAM+0xf8,
+        NV04_PGRAPH_PATT_COLORRAM+0xfc,
         NV04_PGRAPH_PATTERN,
         0x0040080c,
         NV04_PGRAPH_PATTERN_SHAPE,
@@ -247,14 +251,6 @@ static uint32_t nv04_graph_ctx_regs[] = {
         0x004004f8,
         0x0040047c,
         0x004004fc,
-        0x0040053c,
-        0x00400544,
-        0x00400540,
-        0x00400548,
-        0x00400560,
-        0x00400568,
-        0x00400564,
-        0x0040056c,
         0x00400534,
         0x00400538,
         0x00400514,
@@ -341,9 +337,8 @@ static uint32_t nv04_graph_ctx_regs[] = {
         0x00400500,
         0x00400504,
         NV04_PGRAPH_VALID1,
-        NV04_PGRAPH_VALID2
-
-
+        NV04_PGRAPH_VALID2,
+        NV04_PGRAPH_DEBUG_3
 };
 
 struct graph_state {
@@ -388,6 +383,18 @@ nv04_graph_context_switch(struct drm_device *dev)
         pgraph->fifo_access(dev, true);
 }
 
+static uint32_t *ctx_reg(struct graph_state *ctx, uint32_t reg)
+{
+        int i;
+
+        for (i = 0; i < ARRAY_SIZE(nv04_graph_ctx_regs); i++) {
+                if (nv04_graph_ctx_regs[i] == reg)
+                        return &ctx->nv04[i];
+        }
+
+        return NULL;
+}
+
 int nv04_graph_create_context(struct nouveau_channel *chan)
 {
         struct graph_state *pgraph_ctx;
@@ -398,15 +405,8 @@ int nv04_graph_create_context(struct nouveau_channel *chan)
         if (pgraph_ctx == NULL)
                 return -ENOMEM;
 
-        /* dev_priv->fifos[channel].pgraph_ctx_user = channel << 24; */
-        pgraph_ctx->nv04[0] = 0x0001ffff;
-        /* is it really needed ??? */
-#if 0
-        dev_priv->fifos[channel].pgraph_ctx[1] =
-                                        nv_rd32(dev, NV_PGRAPH_DEBUG_4);
-        dev_priv->fifos[channel].pgraph_ctx[2] =
-                                        nv_rd32(dev, 0x004006b0);
-#endif
+        *ctx_reg(pgraph_ctx, NV04_PGRAPH_DEBUG_3) = 0xfad4ff31;
+
         return 0;
 }
 
@@ -429,9 +429,13 @@ int nv04_graph_load_context(struct nouveau_channel *chan)
                 nv_wr32(dev, nv04_graph_ctx_regs[i], pgraph_ctx->nv04[i]);
 
         nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL, 0x10010100);
-        nv_wr32(dev, NV04_PGRAPH_CTX_USER, chan->id << 24);
+
+        tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
+        nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp | chan->id << 24);
+
         tmp = nv_rd32(dev, NV04_PGRAPH_FFINTFC_ST2);
         nv_wr32(dev, NV04_PGRAPH_FFINTFC_ST2, tmp & 0x000fffff);
+
         return 0;
 }
 
@@ -494,7 +498,7 @@ int nv04_graph_init(struct drm_device *dev)
         nv_wr32(dev, NV04_PGRAPH_STATE        , 0xFFFFFFFF);
         nv_wr32(dev, NV04_PGRAPH_CTX_CONTROL  , 0x10000100);
         tmp  = nv_rd32(dev, NV04_PGRAPH_CTX_USER) & 0x00ffffff;
-        tmp |= dev_priv->engine.fifo.channels << 24;
+        tmp |= (dev_priv->engine.fifo.channels - 1) << 24;
         nv_wr32(dev, NV04_PGRAPH_CTX_USER, tmp);
 
         /* These don't belong here, they're part of a per-channel context */
@@ -533,7 +537,7 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
                               int mthd, uint32_t data)
 {
         struct drm_device *dev = chan->dev;
-        uint32_t instance = nv_rd32(dev, NV04_PGRAPH_CTX_SWITCH4) & 0xffff;
+        uint32_t instance = (nv_rd32(dev, NV04_PGRAPH_CTX_SWITCH4) & 0xffff) << 4;
         int subc = (nv_rd32(dev, NV04_PGRAPH_TRAPPED_ADDR) >> 13) & 0x7;
         uint32_t tmp;
 
@@ -547,7 +551,7 @@ nv04_graph_mthd_set_operation(struct nouveau_channel *chan, int grclass,
         return 0;
 }
 
-static struct nouveau_pgraph_object_method nv04_graph_mthds_m2mf[] = {
+static struct nouveau_pgraph_object_method nv04_graph_mthds_sw[] = {
         { 0x0150, nv04_graph_mthd_set_ref },
         {}
 };
@@ -558,7 +562,7 @@ static struct nouveau_pgraph_object_method nv04_graph_mthds_set_operation[] = {
 };
 
 struct nouveau_pgraph_object_class nv04_graph_grclass[] = {
-        { 0x0039, false, nv04_graph_mthds_m2mf },
+        { 0x0039, false, NULL },
         { 0x004a, false, nv04_graph_mthds_set_operation }, /* gdirect */
         { 0x005f, false, nv04_graph_mthds_set_operation }, /* imageblit */
         { 0x0061, false, nv04_graph_mthds_set_operation }, /* ifc */
@@ -574,6 +578,7 @@ struct nouveau_pgraph_object_class nv04_graph_grclass[] = {
         { 0x0053, false, NULL }, /* surf3d */
         { 0x0054, false, NULL }, /* tex_tri */
         { 0x0055, false, NULL }, /* multitex_tri */
+        { 0x506e, true, nv04_graph_mthds_sw },
         {}
 };
 
diff --git a/drivers/gpu/drm/nouveau/nv10_fb.c b/drivers/gpu/drm/nouveau/nv10_fb.c
index 79e2d104d70a..cc5cda44e501 100644
--- a/drivers/gpu/drm/nouveau/nv10_fb.c
+++ b/drivers/gpu/drm/nouveau/nv10_fb.c
@@ -3,17 +3,37 @@
 #include "nouveau_drv.h"
 #include "nouveau_drm.h"
 
+void
+nv10_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                          uint32_t size, uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t limit = max(1u, addr + size) - 1;
+
+        if (pitch) {
+                if (dev_priv->card_type >= NV_20)
+                        addr |= 1;
+                else
+                        addr |= 1 << 31;
+        }
+
+        nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
+        nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
+        nv_wr32(dev, NV10_PFB_TILE(i), addr);
+}
+
 int
 nv10_fb_init(struct drm_device *dev)
 {
-        uint32_t fb_bar_size;
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
         int i;
 
-        fb_bar_size = drm_get_resource_len(dev, 0) - 1;
-        for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
-                nv_wr32(dev, NV10_PFB_TILE(i), 0);
-                nv_wr32(dev, NV10_PFB_TLIMIT(i), fb_bar_size);
-        }
+        pfb->num_tiles = NV10_PFB_TILE__SIZE;
+
+        /* Turn all the tiling regions off. */
+        for (i = 0; i < pfb->num_tiles; i++)
+                pfb->set_region_tiling(dev, i, 0, 0, 0);
 
         return 0;
 }
diff --git a/drivers/gpu/drm/nouveau/nv10_graph.c b/drivers/gpu/drm/nouveau/nv10_graph.c
index 6870e0ee2e7e..fcf2cdd19493 100644
--- a/drivers/gpu/drm/nouveau/nv10_graph.c
+++ b/drivers/gpu/drm/nouveau/nv10_graph.c
@@ -807,6 +807,20 @@ void nv10_graph_destroy_context(struct nouveau_channel *chan)
         chan->pgraph_ctx = NULL;
 }
 
+void
+nv10_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                             uint32_t size, uint32_t pitch)
+{
+        uint32_t limit = max(1u, addr + size) - 1;
+
+        if (pitch)
+                addr |= 1 << 31;
+
+        nv_wr32(dev, NV10_PGRAPH_TLIMIT(i), limit);
+        nv_wr32(dev, NV10_PGRAPH_TSIZE(i), pitch);
+        nv_wr32(dev, NV10_PGRAPH_TILE(i), addr);
+}
+
 int nv10_graph_init(struct drm_device *dev)
 {
         struct drm_nouveau_private *dev_priv = dev->dev_private;
@@ -838,17 +852,9 @@ int nv10_graph_init(struct drm_device *dev)
         } else
                 nv_wr32(dev, NV10_PGRAPH_DEBUG_4, 0x00000000);
 
-        /* copy tile info from PFB */
-        for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
-                nv_wr32(dev, NV10_PGRAPH_TILE(i),
-                                        nv_rd32(dev, NV10_PFB_TILE(i)));
-                nv_wr32(dev, NV10_PGRAPH_TLIMIT(i),
-                                        nv_rd32(dev, NV10_PFB_TLIMIT(i)));
-                nv_wr32(dev, NV10_PGRAPH_TSIZE(i),
-                                        nv_rd32(dev, NV10_PFB_TSIZE(i)));
-                nv_wr32(dev, NV10_PGRAPH_TSTATUS(i),
-                                        nv_rd32(dev, NV10_PFB_TSTATUS(i)));
-        }
+        /* Turn all the tiling regions off. */
+        for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
+                nv10_graph_set_region_tiling(dev, i, 0, 0, 0);
 
         nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH1, 0x00000000);
         nv_wr32(dev, NV10_PGRAPH_CTX_SWITCH2, 0x00000000);
diff --git a/drivers/gpu/drm/nouveau/nv17_tv.c b/drivers/gpu/drm/nouveau/nv17_tv.c
index 81c01353a9f9..58b917c3341b 100644
--- a/drivers/gpu/drm/nouveau/nv17_tv.c
+++ b/drivers/gpu/drm/nouveau/nv17_tv.c
@@ -33,13 +33,103 @@
 #include "nouveau_hw.h"
 #include "nv17_tv.h"
 
-enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
-                                         struct drm_connector *connector,
-                                         uint32_t pin_mask)
+static uint32_t nv42_tv_sample_load(struct drm_encoder *encoder)
 {
+        struct drm_device *dev = encoder->dev;
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t testval, regoffset = nv04_dac_output_offset(encoder);
+        uint32_t gpio0, gpio1, fp_htotal, fp_hsync_start, fp_hsync_end,
+                fp_control, test_ctrl, dacclk, ctv_14, ctv_1c, ctv_6c;
+        uint32_t sample = 0;
+        int head;
+
+#define RGB_TEST_DATA(r, g, b) (r << 0 | g << 10 | b << 20)
+        testval = RGB_TEST_DATA(0x82, 0xeb, 0x82);
+        if (dev_priv->vbios->tvdactestval)
+                testval = dev_priv->vbios->tvdactestval;
+
+        dacclk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset);
+        head = (dacclk & 0x100) >> 8;
+
+        /* Save the previous state. */
+        gpio1 = nv17_gpio_get(dev, DCB_GPIO_TVDAC1);
+        gpio0 = nv17_gpio_get(dev, DCB_GPIO_TVDAC0);
+        fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL);
+        fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START);
+        fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END);
+        fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
+        test_ctrl = NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset);
+        ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c);
+        ctv_14 = NVReadRAMDAC(dev, head, 0x680c14);
+        ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c);
+
+        /* Prepare the DAC for load detection.  */
+        nv17_gpio_set(dev, DCB_GPIO_TVDAC1, true);
+        nv17_gpio_set(dev, DCB_GPIO_TVDAC0, true);
+
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, 1183);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL,
+                      NV_PRAMDAC_FP_TG_CONTROL_DISPEN_POS |
+                      NV_PRAMDAC_FP_TG_CONTROL_WIDTH_12 |
+                      NV_PRAMDAC_FP_TG_CONTROL_READ_PROG |
+                      NV_PRAMDAC_FP_TG_CONTROL_HSYNC_POS |
+                      NV_PRAMDAC_FP_TG_CONTROL_VSYNC_POS);
+
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, 0);
+
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset,
+                      (dacclk & ~0xff) | 0x22);
+        msleep(1);
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset,
+                      (dacclk & ~0xff) | 0x21);
+
+        NVWriteRAMDAC(dev, head, 0x680c1c, 1 << 20);
+        NVWriteRAMDAC(dev, head, 0x680c14, 4 << 16);
+
+        /* Sample pin 0x4 (usually S-video luma). */
+        NVWriteRAMDAC(dev, head, 0x680c6c, testval >> 10 & 0x3ff);
+        msleep(20);
+        sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
+                & 0x4 << 28;
+
+        /* Sample the remaining pins. */
+        NVWriteRAMDAC(dev, head, 0x680c6c, testval & 0x3ff);
+        msleep(20);
+        sample |= NVReadRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset)
+                & 0xa << 28;
+
+        /* Restore the previous state. */
+        NVWriteRAMDAC(dev, head, 0x680c1c, ctv_1c);
+        NVWriteRAMDAC(dev, head, 0x680c14, ctv_14);
+        NVWriteRAMDAC(dev, head, 0x680c6c, ctv_6c);
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_DACCLK + regoffset, dacclk);
+        NVWriteRAMDAC(dev, 0, NV_PRAMDAC_TEST_CONTROL + regoffset, test_ctrl);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, fp_control);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start);
+        NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal);
+        nv17_gpio_set(dev, DCB_GPIO_TVDAC1, gpio1);
+        nv17_gpio_set(dev, DCB_GPIO_TVDAC0, gpio0);
+
+        return sample;
+}
+
+static enum drm_connector_status
+nv17_tv_detect(struct drm_encoder *encoder, struct drm_connector *connector)
+{
+        struct drm_device *dev = encoder->dev;
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct drm_mode_config *conf = &dev->mode_config;
         struct nv17_tv_encoder *tv_enc = to_tv_enc(encoder);
+        struct dcb_entry *dcb = tv_enc->base.dcb;
 
-        tv_enc->pin_mask = pin_mask >> 28 & 0xe;
+        if (dev_priv->chipset == 0x42 ||
+            dev_priv->chipset == 0x43)
+                tv_enc->pin_mask = nv42_tv_sample_load(encoder) >> 28 & 0xe;
+        else
+                tv_enc->pin_mask = nv17_dac_sample_load(encoder) >> 28 & 0xe;
 
         switch (tv_enc->pin_mask) {
         case 0x2:
@@ -50,7 +140,7 @@ enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
                 tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SVIDEO;
                 break;
         case 0xe:
-                if (nouveau_encoder(encoder)->dcb->tvconf.has_component_output)
+                if (dcb->tvconf.has_component_output)
                         tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_Component;
                 else
                         tv_enc->subconnector = DRM_MODE_SUBCONNECTOR_SCART;
@@ -61,11 +151,16 @@ enum drm_connector_status nv17_tv_detect(struct drm_encoder *encoder,
         }
 
         drm_connector_property_set_value(connector,
-                        encoder->dev->mode_config.tv_subconnector_property,
-                                                        tv_enc->subconnector);
+                                         conf->tv_subconnector_property,
+                                         tv_enc->subconnector);
 
-        return tv_enc->subconnector ? connector_status_connected :
-                                        connector_status_disconnected;
+        if (tv_enc->subconnector) {
+                NV_INFO(dev, "Load detected on output %c\n",
+                        '@' + ffs(dcb->or));
+                return connector_status_connected;
+        } else {
+                return connector_status_disconnected;
+        }
 }
 
 static const struct {
@@ -633,7 +728,7 @@ static struct drm_encoder_helper_funcs nv17_tv_helper_funcs = {
         .prepare = nv17_tv_prepare,
         .commit = nv17_tv_commit,
         .mode_set = nv17_tv_mode_set,
-        .detect = nv17_dac_detect,
+        .detect = nv17_tv_detect,
 };
 
 static struct drm_encoder_slave_funcs nv17_tv_slave_funcs = {
diff --git a/drivers/gpu/drm/nouveau/nv20_graph.c b/drivers/gpu/drm/nouveau/nv20_graph.c
index 18ba74f19703..d6fc0a82f03d 100644
--- a/drivers/gpu/drm/nouveau/nv20_graph.c
+++ b/drivers/gpu/drm/nouveau/nv20_graph.c
@@ -514,6 +514,27 @@ nv20_graph_rdi(struct drm_device *dev)
         nouveau_wait_for_idle(dev);
 }
 
+void
+nv20_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                             uint32_t size, uint32_t pitch)
+{
+        uint32_t limit = max(1u, addr + size) - 1;
+
+        if (pitch)
+                addr |= 1;
+
+        nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+        nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+        nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+
+        nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0030 + 4 * i);
+        nv_wr32(dev, NV10_PGRAPH_RDI_DATA, limit);
+        nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0050 + 4 * i);
+        nv_wr32(dev, NV10_PGRAPH_RDI_DATA, pitch);
+        nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0010 + 4 * i);
+        nv_wr32(dev, NV10_PGRAPH_RDI_DATA, addr);
+}
+
 int
 nv20_graph_init(struct drm_device *dev)
 {
@@ -572,27 +593,10 @@ nv20_graph_init(struct drm_device *dev)
                 nv_wr32(dev, NV10_PGRAPH_RDI_DATA , 0x00000030);
         }
 
-        /* copy tile info from PFB */
-        for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
-                nv_wr32(dev, 0x00400904 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TLIMIT(i)));
-                        /* which is NV40_PGRAPH_TLIMIT0(i) ?? */
-                nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0030 + i * 4);
-                nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
-                                        nv_rd32(dev, NV10_PFB_TLIMIT(i)));
-                nv_wr32(dev, 0x00400908 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TSIZE(i)));
-                        /* which is NV40_PGRAPH_TSIZE0(i) ?? */
-                nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0050 + i * 4);
-                nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
-                                        nv_rd32(dev, NV10_PFB_TSIZE(i)));
-                nv_wr32(dev, 0x00400900 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TILE(i)));
-                        /* which is NV40_PGRAPH_TILE0(i) ?? */
-                nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0010 + i * 4);
-                nv_wr32(dev, NV10_PGRAPH_RDI_DATA,
-                                        nv_rd32(dev, NV10_PFB_TILE(i)));
-        }
+        /* Turn all the tiling regions off. */
+        for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
+                nv20_graph_set_region_tiling(dev, i, 0, 0, 0);
+
         for (i = 0; i < 8; i++) {
                 nv_wr32(dev, 0x400980 + i * 4, nv_rd32(dev, 0x100300 + i * 4));
                 nv_wr32(dev, NV10_PGRAPH_RDI_INDEX, 0x00EA0090 + i * 4);
@@ -704,18 +708,9 @@ nv30_graph_init(struct drm_device *dev)
 
         nv_wr32(dev, 0x4000c0, 0x00000016);
 
-        /* copy tile info from PFB */
-        for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
-                nv_wr32(dev, 0x00400904 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TLIMIT(i)));
-                        /* which is NV40_PGRAPH_TLIMIT0(i) ?? */
-                nv_wr32(dev, 0x00400908 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TSIZE(i)));
-                        /* which is NV40_PGRAPH_TSIZE0(i) ?? */
-                nv_wr32(dev, 0x00400900 + i * 0x10,
-                                        nv_rd32(dev, NV10_PFB_TILE(i)));
-                        /* which is NV40_PGRAPH_TILE0(i) ?? */
-        }
+        /* Turn all the tiling regions off. */
+        for (i = 0; i < NV10_PFB_TILE__SIZE; i++)
+                nv20_graph_set_region_tiling(dev, i, 0, 0, 0);
 
         nv_wr32(dev, NV10_PGRAPH_CTX_CONTROL, 0x10000100);
         nv_wr32(dev, NV10_PGRAPH_STATE      , 0xFFFFFFFF);
diff --git a/drivers/gpu/drm/nouveau/nv40_fb.c b/drivers/gpu/drm/nouveau/nv40_fb.c
index ca1d27107a8e..3cd07d8d5bd7 100644
--- a/drivers/gpu/drm/nouveau/nv40_fb.c
+++ b/drivers/gpu/drm/nouveau/nv40_fb.c
@@ -3,12 +3,37 @@
 #include "nouveau_drv.h"
 #include "nouveau_drm.h"
 
+void
+nv40_fb_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                          uint32_t size, uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t limit = max(1u, addr + size) - 1;
+
+        if (pitch)
+                addr |= 1;
+
+        switch (dev_priv->chipset) {
+        case 0x40:
+                nv_wr32(dev, NV10_PFB_TLIMIT(i), limit);
+                nv_wr32(dev, NV10_PFB_TSIZE(i), pitch);
+                nv_wr32(dev, NV10_PFB_TILE(i), addr);
+                break;
+
+        default:
+                nv_wr32(dev, NV40_PFB_TLIMIT(i), limit);
+                nv_wr32(dev, NV40_PFB_TSIZE(i), pitch);
+                nv_wr32(dev, NV40_PFB_TILE(i), addr);
+                break;
+        }
+}
+
 int
 nv40_fb_init(struct drm_device *dev)
 {
         struct drm_nouveau_private *dev_priv = dev->dev_private;
-        uint32_t fb_bar_size, tmp;
-        int num_tiles;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+        uint32_t tmp;
         int i;
 
         /* This is strictly a NV4x register (don't know about NV5x). */
@@ -23,35 +48,23 @@ nv40_fb_init(struct drm_device *dev)
         case 0x45:
                 tmp = nv_rd32(dev, NV10_PFB_CLOSE_PAGE2);
                 nv_wr32(dev, NV10_PFB_CLOSE_PAGE2, tmp & ~(1 << 15));
-                num_tiles = NV10_PFB_TILE__SIZE;
+                pfb->num_tiles = NV10_PFB_TILE__SIZE;
                 break;
         case 0x46: /* G72 */
         case 0x47: /* G70 */
         case 0x49: /* G71 */
         case 0x4b: /* G73 */
         case 0x4c: /* C51 (G7X version) */
-                num_tiles = NV40_PFB_TILE__SIZE_1;
+                pfb->num_tiles = NV40_PFB_TILE__SIZE_1;
                 break;
         default:
-                num_tiles = NV40_PFB_TILE__SIZE_0;
+                pfb->num_tiles = NV40_PFB_TILE__SIZE_0;
                 break;
         }
 
-        fb_bar_size = drm_get_resource_len(dev, 0) - 1;
-        switch (dev_priv->chipset) {
-        case 0x40:
-                for (i = 0; i < num_tiles; i++) {
-                        nv_wr32(dev, NV10_PFB_TILE(i), 0);
-                        nv_wr32(dev, NV10_PFB_TLIMIT(i), fb_bar_size);
-                }
-                break;
-        default:
-                for (i = 0; i < num_tiles; i++) {
-                        nv_wr32(dev, NV40_PFB_TILE(i), 0);
-                        nv_wr32(dev, NV40_PFB_TLIMIT(i), fb_bar_size);
-                }
-                break;
-        }
+        /* Turn all the tiling regions off. */
+        for (i = 0; i < pfb->num_tiles; i++)
+                pfb->set_region_tiling(dev, i, 0, 0, 0);
 
         return 0;
 }
diff --git a/drivers/gpu/drm/nouveau/nv40_graph.c b/drivers/gpu/drm/nouveau/nv40_graph.c
index 2b332bb55acf..53e8afe1dcd1 100644
--- a/drivers/gpu/drm/nouveau/nv40_graph.c
+++ b/drivers/gpu/drm/nouveau/nv40_graph.c
@@ -181,6 +181,48 @@ nv40_graph_unload_context(struct drm_device *dev)
         return ret;
 }
 
+void
+nv40_graph_set_region_tiling(struct drm_device *dev, int i, uint32_t addr,
+                             uint32_t size, uint32_t pitch)
+{
+        struct drm_nouveau_private *dev_priv = dev->dev_private;
+        uint32_t limit = max(1u, addr + size) - 1;
+
+        if (pitch)
+                addr |= 1;
+
+        switch (dev_priv->chipset) {
+        case 0x44:
+        case 0x4a:
+        case 0x4e:
+                nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+                nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+                nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+                break;
+
+        case 0x46:
+        case 0x47:
+        case 0x49:
+        case 0x4b:
+                nv_wr32(dev, NV47_PGRAPH_TSIZE(i), pitch);
+                nv_wr32(dev, NV47_PGRAPH_TLIMIT(i), limit);
+                nv_wr32(dev, NV47_PGRAPH_TILE(i), addr);
+                nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), pitch);
+                nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), limit);
+                nv_wr32(dev, NV40_PGRAPH_TILE1(i), addr);
+                break;
+
+        default:
+                nv_wr32(dev, NV20_PGRAPH_TSIZE(i), pitch);
+                nv_wr32(dev, NV20_PGRAPH_TLIMIT(i), limit);
+                nv_wr32(dev, NV20_PGRAPH_TILE(i), addr);
+                nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), pitch);
+                nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), limit);
+                nv_wr32(dev, NV40_PGRAPH_TILE1(i), addr);
+                break;
+        }
+}
+
 /*
  * G70          0x47
  * G71          0x49
@@ -195,7 +237,8 @@ nv40_graph_init(struct drm_device *dev)
 {
         struct drm_nouveau_private *dev_priv =
                 (struct drm_nouveau_private *)dev->dev_private;
-        uint32_t vramsz, tmp;
+        struct nouveau_fb_engine *pfb = &dev_priv->engine.fb;
+        uint32_t vramsz;
         int i, j;
 
         nv_wr32(dev, NV03_PMC_ENABLE, nv_rd32(dev, NV03_PMC_ENABLE) &
@@ -292,74 +335,9 @@ nv40_graph_init(struct drm_device *dev)
         nv_wr32(dev, 0x400b38, 0x2ffff800);
         nv_wr32(dev, 0x400b3c, 0x00006000);
 
-        /* copy tile info from PFB */
-        switch (dev_priv->chipset) {
-        case 0x40: /* vanilla NV40 */
-                for (i = 0; i < NV10_PFB_TILE__SIZE; i++) {
-                        tmp = nv_rd32(dev, NV10_PFB_TILE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
-                        tmp = nv_rd32(dev, NV10_PFB_TLIMIT(i));
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
-                        tmp = nv_rd32(dev, NV10_PFB_TSIZE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
-                        tmp = nv_rd32(dev, NV10_PFB_TSTATUS(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
-                }
-                break;
-        case 0x44:
-        case 0x4a:
-        case 0x4e: /* NV44-based cores don't have 0x406900? */
-                for (i = 0; i < NV40_PFB_TILE__SIZE_0; i++) {
-                        tmp = nv_rd32(dev, NV40_PFB_TILE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
-                }
-                break;
-        case 0x46:
-        case 0x47:
-        case 0x49:
-        case 0x4b: /* G7X-based cores */
-                for (i = 0; i < NV40_PFB_TILE__SIZE_1; i++) {
-                        tmp = nv_rd32(dev, NV40_PFB_TILE(i));
-                        nv_wr32(dev, NV47_PGRAPH_TILE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
-                        nv_wr32(dev, NV47_PGRAPH_TLIMIT0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
-                        nv_wr32(dev, NV47_PGRAPH_TSIZE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
-                        nv_wr32(dev, NV47_PGRAPH_TSTATUS0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
-                }
-                break;
-        default: /* everything else */
-                for (i = 0; i < NV40_PFB_TILE__SIZE_0; i++) {
-                        tmp = nv_rd32(dev, NV40_PFB_TILE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TILE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TILE1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TLIMIT(i));
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TLIMIT1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSIZE(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSIZE1(i), tmp);
-                        tmp = nv_rd32(dev, NV40_PFB_TSTATUS(i));
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS0(i), tmp);
-                        nv_wr32(dev, NV40_PGRAPH_TSTATUS1(i), tmp);
-                }
-                break;
-        }
+        /* Turn all the tiling regions off. */
+        for (i = 0; i < pfb->num_tiles; i++)
+                nv40_graph_set_region_tiling(dev, i, 0, 0, 0);
 
         /* begin RAM config */
         vramsz = drm_get_resource_len(dev, 0) - 1;
diff --git a/drivers/gpu/drm/nouveau/nv50_display.c b/drivers/gpu/drm/nouveau/nv50_display.c
index a9263d92a231..90f0bf59fbcd 100644
--- a/drivers/gpu/drm/nouveau/nv50_display.c
+++ b/drivers/gpu/drm/nouveau/nv50_display.c
@@ -690,9 +690,21 @@ nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcbent,
                            int pxclk)
 {
         struct drm_nouveau_private *dev_priv = dev->dev_private;
+        struct nouveau_connector *nv_connector = NULL;
+        struct drm_encoder *encoder;
         struct nvbios *bios = &dev_priv->VBIOS;
         uint32_t mc, script = 0, or;
 
+        list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
+                struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
+
+                if (nv_encoder->dcb != dcbent)
+                        continue;
+
+                nv_connector = nouveau_encoder_connector_get(nv_encoder);
+                break;
+        }
+
         or = ffs(dcbent->or) - 1;
         mc = nv50_display_mode_ctrl(dev, dcbent->type != OUTPUT_ANALOG, or);
         switch (dcbent->type) {
@@ -711,6 +723,11 @@ nv50_display_script_select(struct drm_device *dev, struct dcb_entry *dcbent,
                         } else
                         if (bios->fp.strapless_is_24bit & 1)
                                 script |= 0x0200;
+
+                        if (nv_connector && nv_connector->edid &&
+                            (nv_connector->edid->revision >= 4) &&
+                            (nv_connector->edid->input & 0x70) >= 0x20)
+                                script |= 0x0200;
                 }
 
                 if (nouveau_uscript_lvds >= 0) {
diff --git a/drivers/gpu/drm/nouveau/nv50_fbcon.c b/drivers/gpu/drm/nouveau/nv50_fbcon.c
index 6bcc6d39e9b0..e4f279ee61cf 100644
--- a/drivers/gpu/drm/nouveau/nv50_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nv50_fbcon.c
@@ -16,9 +16,7 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
 
         if (!(info->flags & FBINFO_HWACCEL_DISABLED) &&
              RING_SPACE(chan, rect->rop == ROP_COPY ? 7 : 11)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
         }
 
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -31,7 +29,11 @@ nv50_fbcon_fillrect(struct fb_info *info, const struct fb_fillrect *rect)
                 OUT_RING(chan, 1);
         }
         BEGIN_RING(chan, NvSub2D, 0x0588, 1);
-        OUT_RING(chan, rect->color);
+        if (info->fix.visual == FB_VISUAL_TRUECOLOR ||
+            info->fix.visual == FB_VISUAL_DIRECTCOLOR)
+                OUT_RING(chan, ((uint32_t *)info->pseudo_palette)[rect->color]);
+        else
+                OUT_RING(chan, rect->color);
         BEGIN_RING(chan, NvSub2D, 0x0600, 4);
         OUT_RING(chan, rect->dx);
         OUT_RING(chan, rect->dy);
@@ -56,9 +58,7 @@ nv50_fbcon_copyarea(struct fb_info *info, const struct fb_copyarea *region)
                 return;
 
         if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 12)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
         }
 
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -101,8 +101,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
         }
 
         if (!(info->flags & FBINFO_HWACCEL_DISABLED) && RING_SPACE(chan, 11)) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
-                info->flags |= FBINFO_HWACCEL_DISABLED;
+                nouveau_fbcon_gpu_lockup(info);
         }
 
         if (info->flags & FBINFO_HWACCEL_DISABLED) {
@@ -135,9 +134,7 @@ nv50_fbcon_imageblit(struct fb_info *info, const struct fb_image *image)
                 int push = dwords > 2047 ? 2047 : dwords;
 
                 if (RING_SPACE(chan, push + 1)) {
-                        NV_ERROR(dev,
-                                 "GPU lockup - switching to software fbcon\n");
-                        info->flags |= FBINFO_HWACCEL_DISABLED;
+                        nouveau_fbcon_gpu_lockup(info);
                         cfb_imageblit(info, image);
                         return;
                 }
@@ -199,7 +196,7 @@ nv50_fbcon_accel_init(struct fb_info *info)
 
         ret = RING_SPACE(chan, 59);
         if (ret) {
-                NV_ERROR(dev, "GPU lockup - switching to software fbcon\n");
+                nouveau_fbcon_gpu_lockup(info);
                 return ret;
         }
 
diff --git a/drivers/gpu/drm/nouveau/nv50_fifo.c b/drivers/gpu/drm/nouveau/nv50_fifo.c
index b7282284f080..39caf167587d 100644
--- a/drivers/gpu/drm/nouveau/nv50_fifo.c
+++ b/drivers/gpu/drm/nouveau/nv50_fifo.c
@@ -384,8 +384,8 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
                 nv_wr32(dev, NV40_PFIFO_CACHE1_DATA(ptr),
                         nv_ro32(dev, cache, (ptr * 2) + 1));
         }
-        nv_wr32(dev, 0x3210, cnt << 2);
-        nv_wr32(dev, 0x3270, 0);
+        nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, cnt << 2);
+        nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
 
         /* guessing that all the 0x34xx regs aren't on NV50 */
         if (!IS_G80) {
@@ -398,8 +398,6 @@ nv50_fifo_load_context(struct nouveau_channel *chan)
 
         dev_priv->engine.instmem.finish_access(dev);
 
-        nv_wr32(dev, NV03_PFIFO_CACHE1_GET, 0);
-        nv_wr32(dev, NV03_PFIFO_CACHE1_PUT, 0);
         nv_wr32(dev, NV03_PFIFO_CACHE1_PUSH1, chan->id | (1<<16));
         return 0;
 }
diff --git a/drivers/gpu/drm/radeon/Makefile b/drivers/gpu/drm/radeon/Makefile
index b5f5fe75e6af..1cc7b937b1ea 100644
--- a/drivers/gpu/drm/radeon/Makefile
+++ b/drivers/gpu/drm/radeon/Makefile
@@ -24,6 +24,9 @@ $(obj)/rv515_reg_safe.h: $(src)/reg_srcs/rv515 $(obj)/mkregtable
 $(obj)/r300_reg_safe.h: $(src)/reg_srcs/r300 $(obj)/mkregtable
         $(call if_changed,mkregtable)
 
+$(obj)/r420_reg_safe.h: $(src)/reg_srcs/r420 $(obj)/mkregtable
+        $(call if_changed,mkregtable)
+
 $(obj)/rs600_reg_safe.h: $(src)/reg_srcs/rs600 $(obj)/mkregtable
         $(call if_changed,mkregtable)
 
@@ -35,6 +38,8 @@ $(obj)/rv515.o: $(obj)/rv515_reg_safe.h
 
 $(obj)/r300.o: $(obj)/r300_reg_safe.h
 
+$(obj)/r420.o: $(obj)/r420_reg_safe.h
+
 $(obj)/rs600.o: $(obj)/rs600_reg_safe.h
 
 radeon-y := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o \
diff --git a/drivers/gpu/drm/radeon/ObjectID.h b/drivers/gpu/drm/radeon/ObjectID.h
index 6d0183c61d3b..c714179d1bfa 100644
--- a/drivers/gpu/drm/radeon/ObjectID.h
+++ b/drivers/gpu/drm/radeon/ObjectID.h
@@ -1,5 +1,5 @@
 /*
-* Copyright 2006-2007 Advanced Micro Devices, Inc.
+* Copyright 2006-2007 Advanced Micro Devices, Inc.  
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -41,14 +41,14 @@
 /****************************************************/
 /* Encoder Object ID Definition                     */
 /****************************************************/
-#define ENCODER_OBJECT_ID_NONE                    0x00
+#define ENCODER_OBJECT_ID_NONE                    0x00 
 
 /* Radeon Class Display Hardware */
 #define ENCODER_OBJECT_ID_INTERNAL_LVDS           0x01
 #define ENCODER_OBJECT_ID_INTERNAL_TMDS1          0x02
 #define ENCODER_OBJECT_ID_INTERNAL_TMDS2          0x03
 #define ENCODER_OBJECT_ID_INTERNAL_DAC1           0x04
-#define ENCODER_OBJECT_ID_INTERNAL_DAC2           0x05  /* TV/CV DAC */
+#define ENCODER_OBJECT_ID_INTERNAL_DAC2           0x05     /* TV/CV DAC */
 #define ENCODER_OBJECT_ID_INTERNAL_SDVOA          0x06
 #define ENCODER_OBJECT_ID_INTERNAL_SDVOB          0x07
 
@@ -56,11 +56,11 @@
 #define ENCODER_OBJECT_ID_SI170B                  0x08
 #define ENCODER_OBJECT_ID_CH7303                  0x09
 #define ENCODER_OBJECT_ID_CH7301                  0x0A
-#define ENCODER_OBJECT_ID_INTERNAL_DVO1           0x0B  /* This belongs to Radeon Class Display Hardware */
+#define ENCODER_OBJECT_ID_INTERNAL_DVO1           0x0B    /* This belongs to Radeon Class Display Hardware */
 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOA          0x0C
 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOB          0x0D
 #define ENCODER_OBJECT_ID_TITFP513                0x0E
-#define ENCODER_OBJECT_ID_INTERNAL_LVTM1          0x0F  /* not used for Radeon */
+#define ENCODER_OBJECT_ID_INTERNAL_LVTM1          0x0F    /* not used for Radeon */
 #define ENCODER_OBJECT_ID_VT1623                  0x10
 #define ENCODER_OBJECT_ID_HDMI_SI1930             0x11
 #define ENCODER_OBJECT_ID_HDMI_INTERNAL           0x12
@@ -68,9 +68,9 @@
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1   0x13
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1    0x14
 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1    0x15
-#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2    0x16  /* Shared with CV/TV and CRT */
-#define ENCODER_OBJECT_ID_SI178                   0X17  /* External TMDS (dual link, no HDCP.) */
-#define ENCODER_OBJECT_ID_MVPU_FPGA               0x18  /* MVPU FPGA chip */
+#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2    0x16  /* Shared with CV/TV and CRT */
+#define ENCODER_OBJECT_ID_SI178                   0X17  /* External TMDS (dual link, no HDCP.) */
+#define ENCODER_OBJECT_ID_MVPU_FPGA               0x18  /* MVPU FPGA chip */
 #define ENCODER_OBJECT_ID_INTERNAL_DDI            0x19
 #define ENCODER_OBJECT_ID_VT1625                  0x1A
 #define ENCODER_OBJECT_ID_HDMI_SI1932             0x1B
@@ -86,7 +86,7 @@
 /****************************************************/
 /* Connector Object ID Definition                   */
 /****************************************************/
-#define CONNECTOR_OBJECT_ID_NONE                  0x00
+#define CONNECTOR_OBJECT_ID_NONE                  0x00 
 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I     0x01
 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I       0x02
 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D     0x03
@@ -96,7 +96,7 @@
 #define CONNECTOR_OBJECT_ID_SVIDEO                0x07
 #define CONNECTOR_OBJECT_ID_YPbPr                 0x08
 #define CONNECTOR_OBJECT_ID_D_CONNECTOR           0x09
-#define CONNECTOR_OBJECT_ID_9PIN_DIN              0x0A  /* Supports both CV & TV */
+#define CONNECTOR_OBJECT_ID_9PIN_DIN              0x0A  /* Supports both CV & TV */
 #define CONNECTOR_OBJECT_ID_SCART                 0x0B
 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_A           0x0C
 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_B           0x0D
@@ -106,6 +106,8 @@
 #define CONNECTOR_OBJECT_ID_CROSSFIRE             0x11
 #define CONNECTOR_OBJECT_ID_HARDCODE_DVI          0x12
 #define CONNECTOR_OBJECT_ID_DISPLAYPORT           0x13
+#define CONNECTOR_OBJECT_ID_eDP                   0x14
+#define CONNECTOR_OBJECT_ID_MXM                   0x15
 
 /* deleted */
 
@@ -116,6 +118,14 @@
 #define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL                              0x01
 
 /****************************************************/
+/* Generic Object ID Definition                     */
+/****************************************************/
+#define GENERIC_OBJECT_ID_NONE                    0x00
+#define GENERIC_OBJECT_ID_GLSYNC                  0x01
+#define GENERIC_OBJECT_ID_PX2_NON_DRIVABLE        0x02
+#define GENERIC_OBJECT_ID_MXM_OPM                 0x03
+
+/****************************************************/
 /* Graphics Object ENUM ID Definition               */
 /****************************************************/
 #define GRAPH_OBJECT_ENUM_ID1                     0x01
@@ -124,6 +134,7 @@
 #define GRAPH_OBJECT_ENUM_ID4                     0x04
 #define GRAPH_OBJECT_ENUM_ID5                     0x05
 #define GRAPH_OBJECT_ENUM_ID6                     0x06
+#define GRAPH_OBJECT_ENUM_ID7                     0x07
 
 /****************************************************/
 /* Graphics Object ID Bit definition                */
@@ -133,35 +144,35 @@
 #define RESERVED1_ID_MASK                         0x0800
 #define OBJECT_TYPE_MASK                          0x7000
 #define RESERVED2_ID_MASK                         0x8000
-
+                                                  
 #define OBJECT_ID_SHIFT                           0x00
 #define ENUM_ID_SHIFT                             0x08
 #define OBJECT_TYPE_SHIFT                         0x0C
 
+
 /****************************************************/
 /* Graphics Object family definition                */
 /****************************************************/
-#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) \
-        (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
-         GRAPHICS_OBJECT_ID   << OBJECT_ID_SHIFT)
+#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
+                                                                           GRAPHICS_OBJECT_ID   << OBJECT_ID_SHIFT)
 /****************************************************/
 /* GPU Object ID definition - Shared with BIOS      */
 /****************************************************/
-#define GPU_ENUM_ID1    (GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
-                         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
+#define GPU_ENUM_ID1                            ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
 
 /****************************************************/
 /* Encoder Object ID definition - Shared with BIOS  */
 /****************************************************/
 /*
-#define ENCODER_INTERNAL_LVDS_ENUM_ID1        0x2101
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1        0x2101      
 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1       0x2102
 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1       0x2103
 #define ENCODER_INTERNAL_DAC1_ENUM_ID1        0x2104
 #define ENCODER_INTERNAL_DAC2_ENUM_ID1        0x2105
 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1       0x2106
 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1       0x2107
-#define ENCODER_SIL170B_ENUM_ID1              0x2108
+#define ENCODER_SIL170B_ENUM_ID1              0x2108  
 #define ENCODER_CH7303_ENUM_ID1               0x2109
 #define ENCODER_CH7301_ENUM_ID1               0x210A
 #define ENCODER_INTERNAL_DVO1_ENUM_ID1        0x210B
@@ -175,8 +186,8 @@
 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1   0x2113
 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1    0x2114
 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1    0x2115
-#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    0x2116
-#define ENCODER_SI178_ENUM_ID1                   0x2117
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    0x2116  
+#define ENCODER_SI178_ENUM_ID1                   0x2117 
 #define ENCODER_MVPU_FPGA_ENUM_ID1               0x2118
 #define ENCODER_INTERNAL_DDI_ENUM_ID1            0x2119
 #define ENCODER_VT1625_ENUM_ID1                  0x211A
@@ -185,205 +196,169 @@
 #define ENCODER_DP_DP501_ENUM_ID1                0x211D
 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1         0x211E
 */
-#define ENCODER_INTERNAL_LVDS_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DAC1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DAC2_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
-
-#define ENCODER_SIL170B_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
-
-#define ENCODER_CH7303_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
-
-#define ENCODER_CH7301_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DVO1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
-
-#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
-
-#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
-
-#define ENCODER_TITFP513_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_VT1623_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_SI1930_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_INTERNAL_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) /* Shared with CV/TV and CRT */
-
-#define ENCODER_SI178_ENUM_ID1  \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
-
-#define ENCODER_MVPU_FPGA_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_DDI_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
-
-#define ENCODER_VT1625_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
-
-#define ENCODER_HDMI_SI1932_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
-
-#define ENCODER_DP_DP501_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
-
-#define ENCODER_DP_AN9801_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
-
-#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
-
-#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
+#define ENCODER_INTERNAL_LVDS_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_TMDS1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_TMDS2_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DAC1_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DAC2_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOA_ENUM_ID2    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_SDVOB_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
+
+#define ENCODER_SIL170B_ENUM_ID1           ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
+
+#define ENCODER_CH7303_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
+
+#define ENCODER_CH7301_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DVO1_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_TITFP513_ENUM_ID1          ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_LVTM1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_VT1623_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_SI1930_ENUM_ID1       ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_INTERNAL_ENUM_ID1     ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
+
+
+#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT)  // Shared with CV/TV and CRT
+
+#define ENCODER_SI178_ENUM_ID1                    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)  
+
+#define ENCODER_MVPU_FPGA_ENUM_ID1                ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                   GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                   ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_DDI_ENUM_ID1     (  GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT) 
+
+#define ENCODER_VT1625_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
+
+#define ENCODER_HDMI_SI1932_ENUM_ID1       ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
+
+#define ENCODER_DP_DP501_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
+
+#define ENCODER_DP_AN9801_ENUM_ID1            ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                             GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                             ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1   ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)  
+
+#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2         ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
+
+#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1    ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
+                                                  GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                  ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
 
 /****************************************************/
 /* Connector Object ID definition - Shared with BIOS */
@@ -406,167 +381,253 @@
 #define CONNECTOR_7PIN_DIN_ENUM_ID1                 0x310F
 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1           0x3110
 */
-#define CONNECTOR_LVDS_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_VGA_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_VGA_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_COMPOSITE_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SVIDEO_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_YPbPr_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_D_CONNECTOR_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_9PIN_DIN_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_SCART_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_7PIN_DIN_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_CROSSFIRE_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_CROSSFIRE_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID2 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID3 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
-
-#define CONNECTOR_DISPLAYPORT_ENUM_ID4 \
-        (GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
-         CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+#define CONNECTOR_LVDS_ENUM_ID1                ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_LVDS_ENUM_ID2                ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_eDP_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_eDP_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2   ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3     ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_VGA_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_VGA_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_COMPOSITE_ENUM_ID1           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_COMPOSITE_ENUM_ID2           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SVIDEO_ENUM_ID1              ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SVIDEO_ENUM_ID2              ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_YPbPr_ENUM_ID1               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_YPbPr_ENUM_ID2               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_D_CONNECTOR_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_D_CONNECTOR_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_9PIN_DIN_ENUM_ID1            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_9PIN_DIN_ENUM_ID2            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SCART_ENUM_ID1               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_SCART_ENUM_ID2               ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_A_ENUM_ID3         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HDMI_TYPE_B_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_7PIN_DIN_ENUM_ID1            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
+#define CONNECTOR_7PIN_DIN_ENUM_ID2            ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1      ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2      ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_CROSSFIRE_ENUM_ID1           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_CROSSFIRE_ENUM_ID2           ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
+
+
+#define CONNECTOR_HARDCODE_DVI_ENUM_ID1        ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_HARDCODE_DVI_ENUM_ID2        ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID1         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID2         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID3         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID4         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID5         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_DISPLAYPORT_ENUM_ID6         ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
+
+#define CONNECTOR_MXM_ENUM_ID1                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_A
+
+#define CONNECTOR_MXM_ENUM_ID2                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_B
+
+#define CONNECTOR_MXM_ENUM_ID3                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_C
+
+#define CONNECTOR_MXM_ENUM_ID4                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DP_D
+
+#define CONNECTOR_MXM_ENUM_ID5                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_LVDS_TXxx
+
+#define CONNECTOR_MXM_ENUM_ID6                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_LVDS_UXxx
+
+#define CONNECTOR_MXM_ENUM_ID7                 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID7 << ENUM_ID_SHIFT |\
+                                                 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT)          //Mapping to MXM_DAC
 
 /****************************************************/
 /* Router Object ID definition - Shared with BIOS   */
 /****************************************************/
-#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 \
-        (GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
-         GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
-         ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
+#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1      ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
+                                                GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
 
 /* deleted */
 
 /****************************************************/
+/* Generic Object ID definition - Shared with BIOS  */
+/****************************************************/
+#define GENERICOBJECT_GLSYNC_ENUM_ID1           (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_GLSYNC << OBJECT_ID_SHIFT)
+
+#define GENERICOBJECT_PX2_NON_DRIVABLE_ID1       (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
+
+#define GENERICOBJECT_PX2_NON_DRIVABLE_ID2       (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT)
+
+#define GENERICOBJECT_MXM_OPM_ENUM_ID1           (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\
+                                                 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
+                                                 GENERIC_OBJECT_ID_MXM_OPM << OBJECT_ID_SHIFT)
+
+/****************************************************/
 /* Object Cap definition - Shared with BIOS         */
 /****************************************************/
 #define GRAPHICS_OBJECT_CAP_I2C                 0x00000001L
 #define GRAPHICS_OBJECT_CAP_TABLE_ID            0x00000002L
 
+
 #define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID                   0x01
 #define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID     0x02
 #define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID    0x03
@@ -575,4 +636,8 @@
 #pragma pack()
 #endif
 
-#endif /*GRAPHICTYPE */
+#endif  /*GRAPHICTYPE */
+
+
+
+
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 0d63c4436e7c..3eb0ca5b3d73 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -468,7 +468,8 @@ void radeon_dp_set_link_config(struct drm_connector *connector,
         struct radeon_connector *radeon_connector;
         struct radeon_connector_atom_dig *dig_connector;
 
-        if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+        if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) ||
+            (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
                 return;
 
         radeon_connector = to_radeon_connector(connector);
@@ -582,7 +583,8 @@ void dp_link_train(struct drm_encoder *encoder,
         u8 train_set[4];
         int i;
 
-        if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
+        if ((connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort) ||
+            (connector->connector_type != DRM_MODE_CONNECTOR_eDP))
                 return;
 
         if (!radeon_encoder->enc_priv)
diff --git a/drivers/gpu/drm/radeon/mkregtable.c b/drivers/gpu/drm/radeon/mkregtable.c
index 0d79577c1576..607241c6a8a9 100644
--- a/drivers/gpu/drm/radeon/mkregtable.c
+++ b/drivers/gpu/drm/radeon/mkregtable.c
@@ -661,8 +661,10 @@ static int parser_auth(struct table *t, const char *filename)
         fseek(file, 0, SEEK_SET);
 
         /* get header */
-        if (fgets(buf, 1024, file) == NULL)
+        if (fgets(buf, 1024, file) == NULL) {
+                fclose(file);
                 return -1;
+        }
 
         /* first line will contain the last register
          * and gpu name */
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 71727460968f..8760d66e058a 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -131,7 +131,8 @@ void r100_hpd_init(struct radeon_device *rdev)
                         break;
                 }
         }
-        r100_irq_set(rdev);
+        if (rdev->irq.installed)
+                r100_irq_set(rdev);
 }
 
 void r100_hpd_fini(struct radeon_device *rdev)
@@ -243,6 +244,11 @@ int r100_irq_set(struct radeon_device *rdev)
 {
         uint32_t tmp = 0;
 
+        if (!rdev->irq.installed) {
+                WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+                WREG32(R_000040_GEN_INT_CNTL, 0);
+                return -EINVAL;
+        }
         if (rdev->irq.sw_int) {
                 tmp |= RADEON_SW_INT_ENABLE;
         }
@@ -356,6 +362,11 @@ void r100_fence_ring_emit(struct radeon_device *rdev,
         /* Wait until IDLE & CLEAN */
         radeon_ring_write(rdev, PACKET0(0x1720, 0));
         radeon_ring_write(rdev, (1 << 16) | (1 << 17));
+        radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(rdev, rdev->config.r100.hdp_cntl |
+                                RADEON_HDP_READ_BUFFER_INVALIDATE);
+        radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(rdev, rdev->config.r100.hdp_cntl);
         /* Emit fence sequence & fire IRQ */
         radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
         radeon_ring_write(rdev, fence->seq);
@@ -1713,14 +1724,6 @@ void r100_gpu_init(struct radeon_device *rdev)
         r100_hdp_reset(rdev);
 }
 
-void r100_hdp_flush(struct radeon_device *rdev)
-{
-        u32 tmp;
-        tmp = RREG32(RADEON_HOST_PATH_CNTL);
-        tmp |= RADEON_HDP_READ_BUFFER_INVALIDATE;
-        WREG32(RADEON_HOST_PATH_CNTL, tmp);
-}
-
 void r100_hdp_reset(struct radeon_device *rdev)
 {
         uint32_t tmp;
@@ -3313,6 +3316,7 @@ static int r100_startup(struct radeon_device *rdev)
         }
         /* Enable IRQ */
         r100_irq_set(rdev);
+        rdev->config.r100.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
         /* 1M ring buffer */
         r = r100_cp_init(rdev, 1024 * 1024);
         if (r) {
@@ -3371,6 +3375,7 @@ void r100_fini(struct radeon_device *rdev)
         radeon_gem_fini(rdev);
         if (rdev->flags & RADEON_IS_PCI)
                 r100_pci_gart_fini(rdev);
+        radeon_agp_fini(rdev);
         radeon_irq_kms_fini(rdev);
         radeon_fence_driver_fini(rdev);
         radeon_bo_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/r300.c b/drivers/gpu/drm/radeon/r300.c
index 3f2cc9e2e8d9..0051d11b907c 100644
--- a/drivers/gpu/drm/radeon/r300.c
+++ b/drivers/gpu/drm/radeon/r300.c
@@ -36,7 +36,15 @@
 #include "rv350d.h"
 #include "r300_reg_safe.h"
 
-/* This files gather functions specifics to: r300,r350,rv350,rv370,rv380 */
+/* This files gather functions specifics to: r300,r350,rv350,rv370,rv380
+ *
+ * GPU Errata:
+ * - HOST_PATH_CNTL: r300 family seems to dislike write to HOST_PATH_CNTL
+ *   using MMIO to flush host path read cache, this lead to HARDLOCKUP.
+ *   However, scheduling such write to the ring seems harmless, i suspect
+ *   the CP read collide with the flush somehow, or maybe the MC, hard to
+ *   tell. (Jerome Glisse)
+ */
 
 /*
  * rv370,rv380 PCIE GART
@@ -178,6 +186,11 @@ void r300_fence_ring_emit(struct radeon_device *rdev,
         /* Wait until IDLE & CLEAN */
         radeon_ring_write(rdev, PACKET0(0x1720, 0));
         radeon_ring_write(rdev, (1 << 17) | (1 << 16)  | (1 << 9));
+        radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(rdev, rdev->config.r300.hdp_cntl |
+                                RADEON_HDP_READ_BUFFER_INVALIDATE);
+        radeon_ring_write(rdev, PACKET0(RADEON_HOST_PATH_CNTL, 0));
+        radeon_ring_write(rdev, rdev->config.r300.hdp_cntl);
         /* Emit fence sequence & fire IRQ */
         radeon_ring_write(rdev, PACKET0(rdev->fence_drv.scratch_reg, 0));
         radeon_ring_write(rdev, fence->seq);
@@ -1258,6 +1271,7 @@ static int r300_startup(struct radeon_device *rdev)
         }
         /* Enable IRQ */
         r100_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
         /* 1M ring buffer */
         r = r100_cp_init(rdev, 1024 * 1024);
         if (r) {
@@ -1322,6 +1336,7 @@ void r300_fini(struct radeon_device *rdev)
                 rv370_pcie_gart_fini(rdev);
         if (rdev->flags & RADEON_IS_PCI)
                 r100_pci_gart_fini(rdev);
+        radeon_agp_fini(rdev);
         radeon_irq_kms_fini(rdev);
         radeon_fence_driver_fini(rdev);
         radeon_bo_fini(rdev);
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index c05a7270cf0c..053404e71a9d 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -30,7 +30,15 @@
 #include "radeon_reg.h"
 #include "radeon.h"
 #include "atom.h"
+#include "r100d.h"
 #include "r420d.h"
+#include "r420_reg_safe.h"
+
+static void r420_set_reg_safe(struct radeon_device *rdev)
+{
+        rdev->config.r300.reg_safe_bm = r420_reg_safe_bm;
+        rdev->config.r300.reg_safe_bm_size = ARRAY_SIZE(r420_reg_safe_bm);
+}
 
 int r420_mc_init(struct radeon_device *rdev)
 {
@@ -165,6 +173,34 @@ static void r420_clock_resume(struct radeon_device *rdev)
         WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
 }
 
+static void r420_cp_errata_init(struct radeon_device *rdev)
+{
+        /* RV410 and R420 can lock up if CP DMA to host memory happens
+         * while the 2D engine is busy.
+         *
+         * The proper workaround is to queue a RESYNC at the beginning
+         * of the CP init, apparently.
+         */
+        radeon_scratch_get(rdev, &rdev->config.r300.resync_scratch);
+        radeon_ring_lock(rdev, 8);
+        radeon_ring_write(rdev, PACKET0(R300_CP_RESYNC_ADDR, 1));
+        radeon_ring_write(rdev, rdev->config.r300.resync_scratch);
+        radeon_ring_write(rdev, 0xDEADBEEF);
+        radeon_ring_unlock_commit(rdev);
+}
+
+static void r420_cp_errata_fini(struct radeon_device *rdev)
+{
+        /* Catch the RESYNC we dispatched all the way back,
+         * at the very beginning of the CP init.
+         */
+        radeon_ring_lock(rdev, 8);
+        radeon_ring_write(rdev, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
+        radeon_ring_write(rdev, R300_RB3D_DC_FINISH);
+        radeon_ring_unlock_commit(rdev);
+        radeon_scratch_free(rdev, rdev->config.r300.resync_scratch);
+}
+
 static int r420_startup(struct radeon_device *rdev)
 {
         int r;
@@ -190,12 +226,14 @@ static int r420_startup(struct radeon_device *rdev)
         r420_pipes_init(rdev);
         /* Enable IRQ */
         r100_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
         /* 1M ring buffer */
         r = r100_cp_init(rdev, 1024 * 1024);
         if (r) {
                 dev_err(rdev->dev, "failled initializing CP (%d).\n", r);
                 return r;
         }
+        r420_cp_errata_init(rdev);
         r = r100_wb_init(rdev);
         if (r) {
                 dev_err(rdev->dev, "failled initializing WB (%d).\n", r);
@@ -238,6 +276,7 @@ int r420_resume(struct radeon_device *rdev)
 
 int r420_suspend(struct radeon_device *rdev)
 {
+        r420_cp_errata_fini(rdev);
         r100_cp_disable(rdev);
         r100_wb_disable(rdev);
         r100_irq_disable(rdev);
@@ -346,7 +385,7 @@ int r420_init(struct radeon_device *rdev)
                 if (r)
                         return r;
         }
-        r300_set_reg_safe(rdev);
+        r420_set_reg_safe(rdev);
         rdev->accel_working = true;
         r = r420_startup(rdev);
         if (r) {
diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c
index 0f3843b6dac7..9a189072f2b9 100644
--- a/drivers/gpu/drm/radeon/r520.c
+++ b/drivers/gpu/drm/radeon/r520.c
@@ -186,6 +186,7 @@ static int r520_startup(struct radeon_device *rdev)
         }
         /* Enable IRQ */
         rs600_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
         /* 1M ring buffer */
         r = r100_cp_init(rdev, 1024 * 1024);
         if (r) {
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index a0ac3c134b1b..f5ff3490929f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -285,7 +285,8 @@ void r600_hpd_init(struct radeon_device *rdev)
                         }
                 }
         }
-        r600_irq_set(rdev);
+        if (rdev->irq.installed)
+                r600_irq_set(rdev);
 }
 
 void r600_hpd_fini(struct radeon_device *rdev)
@@ -726,6 +727,10 @@ int r600_mc_init(struct radeon_device *rdev)
         a.full = rfixed_const(100);
         rdev->pm.sclk.full = rfixed_const(rdev->clock.default_sclk);
         rdev->pm.sclk.full = rfixed_div(rdev->pm.sclk, a);
+
+        if (rdev->flags & RADEON_IS_IGP)
+                rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
+
         return 0;
 }
 
@@ -1384,11 +1389,6 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v)
         (void)RREG32(PCIE_PORT_DATA);
 }
 
-void r600_hdp_flush(struct radeon_device *rdev)
-{
-        WREG32(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0x1);
-}
-
 /*
  * CP & Ring
  */
@@ -1785,6 +1785,8 @@ void r600_fence_ring_emit(struct radeon_device *rdev,
         radeon_ring_write(rdev, PACKET3(PACKET3_SET_CONFIG_REG, 1));
         radeon_ring_write(rdev, ((rdev->fence_drv.scratch_reg - PACKET3_SET_CONFIG_REG_OFFSET) >> 2));
         radeon_ring_write(rdev, fence->seq);
+        radeon_ring_write(rdev, PACKET0(R_005480_HDP_MEM_COHERENCY_FLUSH_CNTL, 0));
+        radeon_ring_write(rdev, 1);
         /* CP_INTERRUPT packet 3 no longer exists, use packet 0 */
         radeon_ring_write(rdev, PACKET0(CP_INT_STATUS, 0));
         radeon_ring_write(rdev, RB_INT_STAT);
@@ -2089,8 +2091,7 @@ void r600_fini(struct radeon_device *rdev)
         radeon_gem_fini(rdev);
         radeon_fence_driver_fini(rdev);
         radeon_clocks_fini(rdev);
-        if (rdev->flags & RADEON_IS_AGP)
-                radeon_agp_fini(rdev);
+        radeon_agp_fini(rdev);
         radeon_bo_fini(rdev);
         radeon_atombios_fini(rdev);
         kfree(rdev->bios);
@@ -2461,6 +2462,10 @@ int r600_irq_set(struct radeon_device *rdev)
         u32 mode_int = 0;
         u32 hpd1, hpd2, hpd3, hpd4 = 0, hpd5 = 0, hpd6 = 0;
 
+        if (!rdev->irq.installed) {
+                WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+                return -EINVAL;
+        }
         /* don't enable anything if the ih is disabled */
         if (!rdev->ih.enabled)
                 return 0;
@@ -2724,7 +2729,7 @@ restart_ih:
                                 }
                                 break;
                         default:
-                                DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
+                                DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
                                 break;
                         }
                         break;
@@ -2744,7 +2749,7 @@ restart_ih:
                                 }
                                 break;
                         default:
-                                DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
+                                DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
                                 break;
                         }
                         break;
@@ -2793,7 +2798,7 @@ restart_ih:
                                 }
                                 break;
                         default:
-                                DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
+                                DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
                                 break;
                         }
                         break;
@@ -2807,7 +2812,7 @@ restart_ih:
                         DRM_DEBUG("IH: CP EOP\n");
                         break;
                 default:
-                        DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
+                        DRM_DEBUG("Unhandled interrupt: %d %d\n", src_id, src_data);
                         break;
                 }
 
diff --git a/drivers/gpu/drm/radeon/r600_blit_kms.c b/drivers/gpu/drm/radeon/r600_blit_kms.c
index 9aecafb51b66..8787ea89dc6e 100644
--- a/drivers/gpu/drm/radeon/r600_blit_kms.c
+++ b/drivers/gpu/drm/radeon/r600_blit_kms.c
@@ -577,9 +577,9 @@ int r600_blit_prepare_copy(struct radeon_device *rdev, int size_bytes)
         ring_size = num_loops * dwords_per_loop;
         /* set default  + shaders */
         ring_size += 40; /* shaders + def state */
-        ring_size += 5; /* fence emit for VB IB */
+        ring_size += 7; /* fence emit for VB IB */
         ring_size += 5; /* done copy */
-        ring_size += 5; /* fence emit for done copy */
+        ring_size += 7; /* fence emit for done copy */
         r = radeon_ring_lock(rdev, ring_size);
         WARN_ON(r);
 
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 53b55608102b..eb5f99b9469d 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -319,10 +319,12 @@ struct radeon_mc {
         u64                     real_vram_size;
         int                     vram_mtrr;
         bool                    vram_is_ddr;
+        bool                    igp_sideport_enabled;
 };
 
 int radeon_mc_setup(struct radeon_device *rdev);
-
+bool radeon_combios_sideport_present(struct radeon_device *rdev);
+bool radeon_atombios_sideport_present(struct radeon_device *rdev);
 
 /*
  * GPU scratch registers structures, functions & helpers
@@ -654,7 +656,6 @@ struct radeon_asic {
                                uint32_t offset, uint32_t obj_size);
         int (*clear_surface_reg)(struct radeon_device *rdev, int reg);
         void (*bandwidth_update)(struct radeon_device *rdev);
-        void (*hdp_flush)(struct radeon_device *rdev);
         void (*hpd_init)(struct radeon_device *rdev);
         void (*hpd_fini)(struct radeon_device *rdev);
         bool (*hpd_sense)(struct radeon_device *rdev, enum radeon_hpd_id hpd);
@@ -667,11 +668,14 @@ struct radeon_asic {
 struct r100_asic {
         const unsigned  *reg_safe_bm;
         unsigned        reg_safe_bm_size;
+        u32             hdp_cntl;
 };
 
 struct r300_asic {
         const unsigned  *reg_safe_bm;
         unsigned        reg_safe_bm_size;
+        u32             resync_scratch;
+        u32             hdp_cntl;
 };
 
 struct r600_asic {
@@ -1007,7 +1011,6 @@ static inline void radeon_ring_write(struct radeon_device *rdev, uint32_t v)
 #define radeon_set_surface_reg(rdev, r, f, p, o, s) ((rdev)->asic->set_surface_reg((rdev), (r), (f), (p), (o), (s)))
 #define radeon_clear_surface_reg(rdev, r) ((rdev)->asic->clear_surface_reg((rdev), (r)))
 #define radeon_bandwidth_update(rdev) (rdev)->asic->bandwidth_update((rdev))
-#define radeon_hdp_flush(rdev) (rdev)->asic->hdp_flush((rdev))
 #define radeon_hpd_init(rdev) (rdev)->asic->hpd_init((rdev))
 #define radeon_hpd_fini(rdev) (rdev)->asic->hpd_fini((rdev))
 #define radeon_hpd_sense(rdev, hpd) (rdev)->asic->hpd_sense((rdev), (hpd))
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c
index 54bf49a6d676..220f454ea9fa 100644
--- a/drivers/gpu/drm/radeon/radeon_agp.c
+++ b/drivers/gpu/drm/radeon/radeon_agp.c
@@ -252,10 +252,8 @@ void radeon_agp_resume(struct radeon_device *rdev)
 void radeon_agp_fini(struct radeon_device *rdev)
 {
 #if __OS_HAS_AGP
-        if (rdev->flags & RADEON_IS_AGP) {
-                if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
-                        drm_agp_release(rdev->ddev);
-                }
+        if (rdev->ddev->agp && rdev->ddev->agp->acquired) {
+                drm_agp_release(rdev->ddev);
         }
 #endif
 }
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index eb29217bbf1d..f2fbd2e4e9df 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -77,7 +77,6 @@ int r100_clear_surface_reg(struct radeon_device *rdev, int reg);
 void r100_bandwidth_update(struct radeon_device *rdev);
 void r100_ring_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib);
 int r100_ring_test(struct radeon_device *rdev);
-void r100_hdp_flush(struct radeon_device *rdev);
 void r100_hpd_init(struct radeon_device *rdev);
 void r100_hpd_fini(struct radeon_device *rdev);
 bool r100_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
@@ -114,7 +113,6 @@ static struct radeon_asic r100_asic = {
         .set_surface_reg = r100_set_surface_reg,
         .clear_surface_reg = r100_clear_surface_reg,
         .bandwidth_update = &r100_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
         .hpd_init = &r100_hpd_init,
         .hpd_fini = &r100_hpd_fini,
         .hpd_sense = &r100_hpd_sense,
@@ -174,7 +172,6 @@ static struct radeon_asic r300_asic = {
         .set_surface_reg = r100_set_surface_reg,
         .clear_surface_reg = r100_clear_surface_reg,
         .bandwidth_update = &r100_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
         .hpd_init = &r100_hpd_init,
         .hpd_fini = &r100_hpd_fini,
         .hpd_sense = &r100_hpd_sense,
@@ -218,7 +215,6 @@ static struct radeon_asic r420_asic = {
         .set_surface_reg = r100_set_surface_reg,
         .clear_surface_reg = r100_clear_surface_reg,
         .bandwidth_update = &r100_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
         .hpd_init = &r100_hpd_init,
         .hpd_fini = &r100_hpd_fini,
         .hpd_sense = &r100_hpd_sense,
@@ -267,7 +263,6 @@ static struct radeon_asic rs400_asic = {
         .set_surface_reg = r100_set_surface_reg,
         .clear_surface_reg = r100_clear_surface_reg,
         .bandwidth_update = &r100_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
         .hpd_init = &r100_hpd_init,
         .hpd_fini = &r100_hpd_fini,
         .hpd_sense = &r100_hpd_sense,
@@ -324,7 +319,6 @@ static struct radeon_asic rs600_asic = {
         .set_pcie_lanes = NULL,
         .set_clock_gating = &radeon_atom_set_clock_gating,
         .bandwidth_update = &rs600_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
         .hpd_init = &rs600_hpd_init,
         .hpd_fini = &rs600_hpd_fini,
         .hpd_sense = &rs600_hpd_sense,
@@ -372,7 +366,6 @@ static struct radeon_asic rs690_asic = {
         .set_surface_reg = r100_set_surface_reg,
         .clear_surface_reg = r100_clear_surface_reg,
         .bandwidth_update = &rs690_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
         .hpd_init = &rs600_hpd_init,
         .hpd_fini = &rs600_hpd_fini,
         .hpd_sense = &rs600_hpd_sense,
@@ -424,7 +417,6 @@ static struct radeon_asic rv515_asic = {
         .set_surface_reg = r100_set_surface_reg,
         .clear_surface_reg = r100_clear_surface_reg,
         .bandwidth_update = &rv515_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
         .hpd_init = &rs600_hpd_init,
         .hpd_fini = &rs600_hpd_fini,
         .hpd_sense = &rs600_hpd_sense,
@@ -467,7 +459,6 @@ static struct radeon_asic r520_asic = {
         .set_surface_reg = r100_set_surface_reg,
         .clear_surface_reg = r100_clear_surface_reg,
         .bandwidth_update = &rv515_bandwidth_update,
-        .hdp_flush = &r100_hdp_flush,
         .hpd_init = &rs600_hpd_init,
         .hpd_fini = &rs600_hpd_fini,
         .hpd_sense = &rs600_hpd_sense,
@@ -508,7 +499,6 @@ int r600_ring_test(struct radeon_device *rdev);
 int r600_copy_blit(struct radeon_device *rdev,
                    uint64_t src_offset, uint64_t dst_offset,
                    unsigned num_pages, struct radeon_fence *fence);
-void r600_hdp_flush(struct radeon_device *rdev);
 void r600_hpd_init(struct radeon_device *rdev);
 void r600_hpd_fini(struct radeon_device *rdev);
 bool r600_hpd_sense(struct radeon_device *rdev, enum radeon_hpd_id hpd);
@@ -544,7 +534,6 @@ static struct radeon_asic r600_asic = {
         .set_surface_reg = r600_set_surface_reg,
         .clear_surface_reg = r600_clear_surface_reg,
         .bandwidth_update = &rv515_bandwidth_update,
-        .hdp_flush = &r600_hdp_flush,
         .hpd_init = &r600_hpd_init,
         .hpd_fini = &r600_hpd_fini,
         .hpd_sense = &r600_hpd_sense,
@@ -589,7 +578,6 @@ static struct radeon_asic rv770_asic = {
         .set_surface_reg = r600_set_surface_reg,
         .clear_surface_reg = r600_clear_surface_reg,
         .bandwidth_update = &rv515_bandwidth_update,
-        .hdp_flush = &r600_hdp_flush,
         .hpd_init = &r600_hpd_init,
         .hpd_fini = &r600_hpd_fini,
         .hpd_sense = &r600_hpd_sense,
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c
index 321044bef71c..fa82ca74324e 100644
--- a/drivers/gpu/drm/radeon/radeon_atombios.c
+++ b/drivers/gpu/drm/radeon/radeon_atombios.c
@@ -114,6 +114,7 @@ static inline struct radeon_i2c_bus_rec radeon_lookup_i2c_gpio(struct radeon_dev
                         i2c.i2c_id = gpio->sucI2cId.ucAccess;
 
                         i2c.valid = true;
+                        break;
                 }
         }
 
@@ -345,7 +346,9 @@ const int object_connector_convert[] = {
         DRM_MODE_CONNECTOR_Unknown,
         DRM_MODE_CONNECTOR_Unknown,
         DRM_MODE_CONNECTOR_Unknown,
-        DRM_MODE_CONNECTOR_DisplayPort
+        DRM_MODE_CONNECTOR_DisplayPort,
+        DRM_MODE_CONNECTOR_eDP,
+        DRM_MODE_CONNECTOR_Unknown
 };
 
 bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev)
@@ -935,6 +938,43 @@ bool radeon_atom_get_clock_info(struct drm_device *dev)
         return false;
 }
 
+union igp_info {
+        struct _ATOM_INTEGRATED_SYSTEM_INFO info;
+        struct _ATOM_INTEGRATED_SYSTEM_INFO_V2 info_2;
+};
+
+bool radeon_atombios_sideport_present(struct radeon_device *rdev)
+{
+        struct radeon_mode_info *mode_info = &rdev->mode_info;
+        int index = GetIndexIntoMasterTable(DATA, IntegratedSystemInfo);
+        union igp_info *igp_info;
+        u8 frev, crev;
+        u16 data_offset;
+
+        atom_parse_data_header(mode_info->atom_context, index, NULL, &frev,
+                               &crev, &data_offset);
+
+        igp_info = (union igp_info *)(mode_info->atom_context->bios +
+                                      data_offset);
+
+        if (igp_info) {
+                switch (crev) {
+                case 1:
+                        if (igp_info->info.ucMemoryType & 0xf0)
+                                return true;
+                        break;
+                case 2:
+                        if (igp_info->info_2.ucMemoryType & 0x0f)
+                                return true;
+                        break;
+                default:
+                        DRM_ERROR("Unsupported IGP table: %d %d\n", frev, crev);
+                        break;
+                }
+        }
+        return false;
+}
+
 bool radeon_atombios_get_tmds_info(struct radeon_encoder *encoder,
                                    struct radeon_encoder_int_tmds *tmds)
 {
@@ -1026,6 +1066,7 @@ static struct radeon_atom_ss *radeon_atombios_get_ss_info(struct
                                 ss->delay = ss_info->asSS_Info[i].ucSS_Delay;
                                 ss->range = ss_info->asSS_Info[i].ucSS_Range;
                                 ss->refdiv = ss_info->asSS_Info[i].ucRecommendedRef_Div;
+                                break;
                         }
                 }
         }
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c
index fd94dbca33ac..579c8920e081 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -595,6 +595,48 @@ bool radeon_combios_get_clock_info(struct drm_device *dev)
         return false;
 }
 
+bool radeon_combios_sideport_present(struct radeon_device *rdev)
+{
+        struct drm_device *dev = rdev->ddev;
+        u16 igp_info;
+
+        igp_info = combios_get_table_offset(dev, COMBIOS_INTEGRATED_SYSTEM_INFO_TABLE);
+
+        if (igp_info) {
+                if (RBIOS16(igp_info + 0x4))
+                        return true;
+        }
+        return false;
+}
+
+static const uint32_t default_primarydac_adj[CHIP_LAST] = {
+        0x00000808,             /* r100  */
+        0x00000808,             /* rv100 */
+        0x00000808,             /* rs100 */
+        0x00000808,             /* rv200 */
+        0x00000808,             /* rs200 */
+        0x00000808,             /* r200  */
+        0x00000808,             /* rv250 */
+        0x00000000,             /* rs300 */
+        0x00000808,             /* rv280 */
+        0x00000808,             /* r300  */
+        0x00000808,             /* r350  */
+        0x00000808,             /* rv350 */
+        0x00000808,             /* rv380 */
+        0x00000808,             /* r420  */
+        0x00000808,             /* r423  */
+        0x00000808,             /* rv410 */
+        0x00000000,             /* rs400 */
+        0x00000000,             /* rs480 */
+};
+
+static void radeon_legacy_get_primary_dac_info_from_table(struct radeon_device *rdev,
+                                                          struct radeon_encoder_primary_dac *p_dac)
+{
+        p_dac->ps2_pdac_adj = default_primarydac_adj[rdev->family];
+        return;
+}
+
 struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
                                                                        radeon_encoder
                                                                        *encoder)
@@ -604,20 +646,20 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
         uint16_t dac_info;
         uint8_t rev, bg, dac;
         struct radeon_encoder_primary_dac *p_dac = NULL;
+        int found = 0;
 
-        if (rdev->bios == NULL)
+        p_dac = kzalloc(sizeof(struct radeon_encoder_primary_dac),
+                        GFP_KERNEL);
+
+        if (!p_dac)
                 return NULL;
 
+        if (rdev->bios == NULL)
+                goto out;
+
         /* check CRT table */
         dac_info = combios_get_table_offset(dev, COMBIOS_CRT_INFO_TABLE);
         if (dac_info) {
-                p_dac =
-                    kzalloc(sizeof(struct radeon_encoder_primary_dac),
-                            GFP_KERNEL);
-
-                if (!p_dac)
-                        return NULL;
-
                 rev = RBIOS8(dac_info) & 0x3;
                 if (rev < 2) {
                         bg = RBIOS8(dac_info + 0x2) & 0xf;
@@ -628,9 +670,13 @@ struct radeon_encoder_primary_dac *radeon_combios_get_primary_dac_info(struct
                         dac = RBIOS8(dac_info + 0x3) & 0xf;
                         p_dac->ps2_pdac_adj = (bg << 8) | (dac);
                 }
-
+                found = 1;
         }
 
+out:
+        if (!found) /* fallback to defaults */
+                radeon_legacy_get_primary_dac_info_from_table(rdev, p_dac);
+
         return p_dac;
 }
 
@@ -641,6 +687,9 @@ radeon_combios_get_tv_info(struct radeon_device *rdev)
         uint16_t tv_info;
         enum radeon_tv_std tv_std = TV_STD_NTSC;
 
+        if (rdev->bios == NULL)
+                return tv_std;
+
         tv_info = combios_get_table_offset(dev, COMBIOS_TV_INFO_TABLE);
         if (tv_info) {
                 if (RBIOS8(tv_info + 6) == 'T') {
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c
index 20161567dbff..55266416fa47 100644
--- a/drivers/gpu/drm/radeon/radeon_connectors.c
+++ b/drivers/gpu/drm/radeon/radeon_connectors.c
@@ -49,8 +49,10 @@ void radeon_connector_hotplug(struct drm_connector *connector)
         if (radeon_connector->hpd.hpd != RADEON_HPD_NONE)
                 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
 
-        if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
-                if (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
+        if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
+            (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
+                if ((radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+                    (radeon_dp_getsinktype(radeon_connector) == CONNECTOR_OBJECT_ID_eDP)) {
                         if (radeon_dp_needs_link_train(radeon_connector)) {
                                 if (connector->encoder)
                                         dp_link_train(connector->encoder, connector);
@@ -615,7 +617,7 @@ static enum drm_connector_status radeon_vga_detect(struct drm_connector *connect
                                 ret = connector_status_connected;
                 }
         } else {
-                if (radeon_connector->dac_load_detect) {
+                if (radeon_connector->dac_load_detect && encoder) {
                         encoder_funcs = encoder->helper_private;
                         ret = encoder_funcs->detect(encoder, connector);
                 }
@@ -898,10 +900,18 @@ static void radeon_dvi_force(struct drm_connector *connector)
 static int radeon_dvi_mode_valid(struct drm_connector *connector,
                                   struct drm_display_mode *mode)
 {
+        struct drm_device *dev = connector->dev;
+        struct radeon_device *rdev = dev->dev_private;
         struct radeon_connector *radeon_connector = to_radeon_connector(connector);
 
         /* XXX check mode bandwidth */
 
+        /* clocks over 135 MHz have heat issues with DVI on RV100 */
+        if (radeon_connector->use_digital &&
+            (rdev->family == CHIP_RV100) &&
+            (mode->clock > 135000))
+                return MODE_CLOCK_HIGH;
+
         if (radeon_connector->use_digital && (mode->clock > 165000)) {
                 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
                     (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
@@ -967,7 +977,8 @@ static enum drm_connector_status radeon_dp_detect(struct drm_connector *connecto
         }
 
         sink_type = radeon_dp_getsinktype(radeon_connector);
-        if (sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
+        if ((sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+            (sink_type == CONNECTOR_OBJECT_ID_eDP)) {
                 if (radeon_dp_getdpcd(radeon_connector)) {
                         radeon_dig_connector->dp_sink_type = sink_type;
                         ret = connector_status_connected;
@@ -992,7 +1003,8 @@ static int radeon_dp_mode_valid(struct drm_connector *connector,
 
         /* XXX check mode bandwidth */
 
-        if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
+        if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+            (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
                 return radeon_dp_mode_valid_helper(radeon_connector, mode);
         else
                 return MODE_OK;
@@ -1145,6 +1157,7 @@ radeon_add_atom_connector(struct drm_device *dev,
                 subpixel_order = SubPixelHorizontalRGB;
                 break;
         case DRM_MODE_CONNECTOR_DisplayPort:
+        case DRM_MODE_CONNECTOR_eDP:
                 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
                 if (!radeon_dig_connector)
                         goto failed;
@@ -1157,10 +1170,16 @@ radeon_add_atom_connector(struct drm_device *dev,
                         goto failed;
                 if (i2c_bus->valid) {
                         /* add DP i2c bus */
-                        radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
+                        if (connector_type == DRM_MODE_CONNECTOR_eDP)
+                                radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "eDP-auxch");
+                        else
+                                radeon_dig_connector->dp_i2c_bus = radeon_i2c_create_dp(dev, i2c_bus, "DP-auxch");
                         if (!radeon_dig_connector->dp_i2c_bus)
                                 goto failed;
-                        radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP");
+                        if (connector_type == DRM_MODE_CONNECTOR_eDP)
+                                radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "eDP");
+                        else
+                                radeon_connector->ddc_bus = radeon_i2c_create(dev, i2c_bus, "DP");
                         if (!radeon_connector->ddc_bus)
                                 goto failed;
                 }
diff --git a/drivers/gpu/drm/radeon/radeon_cp.c b/drivers/gpu/drm/radeon/radeon_cp.c
index 0b2f9c2ad2c1..06123ba31d31 100644
--- a/drivers/gpu/drm/radeon/radeon_cp.c
+++ b/drivers/gpu/drm/radeon/radeon_cp.c
@@ -2145,6 +2145,7 @@ int radeon_master_create(struct drm_device *dev, struct drm_master *master)
                          &master_priv->sarea);
         if (ret) {
                 DRM_ERROR("SAREA setup failed\n");
+                kfree(master_priv);
                 return ret;
         }
         master_priv->sarea_priv = master_priv->sarea->handle + sizeof(struct drm_sarea);
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c
index 7c6848096bcd..0c51f8e46613 100644
--- a/drivers/gpu/drm/radeon/radeon_device.c
+++ b/drivers/gpu/drm/radeon/radeon_device.c
@@ -733,16 +733,18 @@ void radeon_device_fini(struct radeon_device *rdev)
  */
 int radeon_suspend_kms(struct drm_device *dev, pm_message_t state)
 {
-        struct radeon_device *rdev = dev->dev_private;
+        struct radeon_device *rdev;
         struct drm_crtc *crtc;
         int r;
 
-        if (dev == NULL || rdev == NULL) {
+        if (dev == NULL || dev->dev_private == NULL) {
                 return -ENODEV;
         }
         if (state.event == PM_EVENT_PRETHAW) {
                 return 0;
         }
+        rdev = dev->dev_private;
+
         /* unpin the front buffers */
         list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
                 struct radeon_framebuffer *rfb = to_radeon_framebuffer(crtc->fb);
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c
index 91d72b70abc9..0ec491ead2ff 100644
--- a/drivers/gpu/drm/radeon/radeon_display.c
+++ b/drivers/gpu/drm/radeon/radeon_display.c
@@ -234,7 +234,7 @@ static const char *encoder_names[34] = {
         "INTERNAL_UNIPHY2",
 };
 
-static const char *connector_names[13] = {
+static const char *connector_names[15] = {
         "Unknown",
         "VGA",
         "DVI-I",
@@ -248,6 +248,8 @@ static const char *connector_names[13] = {
         "DisplayPort",
         "HDMI-A",
         "HDMI-B",
+        "TV",
+        "eDP",
 };
 
 static const char *hpd_names[7] = {
@@ -329,8 +331,11 @@ static bool radeon_setup_enc_conn(struct drm_device *dev)
                                 ret = radeon_get_atom_connector_info_from_object_table(dev);
                         else
                                 ret = radeon_get_atom_connector_info_from_supported_devices_table(dev);
-                } else
+                } else {
                         ret = radeon_get_legacy_connector_info_from_bios(dev);
+                        if (ret == false)
+                                ret = radeon_get_legacy_connector_info_from_table(dev);
+                }
         } else {
                 if (!ASIC_IS_AVIVO(rdev))
                         ret = radeon_get_legacy_connector_info_from_table(dev);
@@ -349,7 +354,8 @@ int radeon_ddc_get_modes(struct radeon_connector *radeon_connector)
 {
         int ret = 0;
 
-        if (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
+        if ((radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
+            (radeon_connector->base.connector_type == DRM_MODE_CONNECTOR_eDP)) {
                 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
                 if (dig->dp_i2c_bus)
                         radeon_connector->edid = drm_get_edid(&radeon_connector->base, &dig->dp_i2c_bus->adapter);
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index ccba95f83d11..82eb551970b9 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -596,21 +596,23 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
                 return ATOM_ENCODER_MODE_LVDS;
                 break;
         case DRM_MODE_CONNECTOR_DisplayPort:
+        case DRM_MODE_CONNECTOR_eDP:
                 radeon_dig_connector = radeon_connector->con_priv;
-                if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
+                if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
+                    (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP))
                         return ATOM_ENCODER_MODE_DP;
                 else if (drm_detect_hdmi_monitor(radeon_connector->edid))
                         return ATOM_ENCODER_MODE_HDMI;
                 else
                         return ATOM_ENCODER_MODE_DVI;
                 break;
-        case CONNECTOR_DVI_A:
-        case CONNECTOR_VGA:
+        case DRM_MODE_CONNECTOR_DVIA:
+        case DRM_MODE_CONNECTOR_VGA:
                 return ATOM_ENCODER_MODE_CRT;
                 break;
-        case CONNECTOR_STV:
-        case CONNECTOR_CTV:
-        case CONNECTOR_DIN:
+        case DRM_MODE_CONNECTOR_Composite:
+        case DRM_MODE_CONNECTOR_SVIDEO:
+        case DRM_MODE_CONNECTOR_9PinDIN:
                 /* fix me */
                 return ATOM_ENCODER_MODE_TV;
                 /*return ATOM_ENCODER_MODE_CV;*/
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index 4cdd8b4f7549..8495d4e32e18 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -140,16 +140,15 @@ int radeon_fence_create(struct radeon_device *rdev, struct radeon_fence **fence)
 
 bool radeon_fence_signaled(struct radeon_fence *fence)
 {
-        struct radeon_device *rdev = fence->rdev;
         unsigned long irq_flags;
         bool signaled = false;
 
-        if (rdev->gpu_lockup) {
+        if (!fence)
                 return true;
-        }
-        if (fence == NULL) {
+
+        if (fence->rdev->gpu_lockup)
                 return true;
-        }
+
         write_lock_irqsave(&fence->rdev->fence_drv.lock, irq_flags);
         signaled = fence->signaled;
         /* if we are shuting down report all fence as signaled */
diff --git a/drivers/gpu/drm/radeon/radeon_gem.c b/drivers/gpu/drm/radeon/radeon_gem.c
index 60df2d7e7e4c..0e1325e18534 100644
--- a/drivers/gpu/drm/radeon/radeon_gem.c
+++ b/drivers/gpu/drm/radeon/radeon_gem.c
@@ -131,7 +131,6 @@ int radeon_gem_set_domain(struct drm_gem_object *gobj,
                         printk(KERN_ERR "Failed to wait for object !\n");
                         return r;
                 }
-                radeon_hdp_flush(robj->rdev);
         }
         return 0;
 }
@@ -312,7 +311,6 @@ int radeon_gem_wait_idle_ioctl(struct drm_device *dev, void *data,
         mutex_lock(&dev->struct_mutex);
         drm_gem_object_unreference(gobj);
         mutex_unlock(&dev->struct_mutex);
-        radeon_hdp_flush(robj->rdev);
         return r;
 }
 
diff --git a/drivers/gpu/drm/radeon/radeon_irq.c b/drivers/gpu/drm/radeon/radeon_irq.c
index b79ecc4a7cc4..2f349a300195 100644
--- a/drivers/gpu/drm/radeon/radeon_irq.c
+++ b/drivers/gpu/drm/radeon/radeon_irq.c
@@ -289,16 +289,16 @@ int radeon_irq_emit(struct drm_device *dev, void *data, struct drm_file *file_pr
         drm_radeon_irq_emit_t *emit = data;
         int result;
 
-        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
-                return -EINVAL;
-
-        LOCK_TEST_WITH_RETURN(dev, file_priv);
-
         if (!dev_priv) {
                 DRM_ERROR("called with no initialization\n");
                 return -EINVAL;
         }
 
+        if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
+                return -EINVAL;
+
+        LOCK_TEST_WITH_RETURN(dev, file_priv);
+
         result = radeon_emit_irq(dev);
 
         if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) {
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c
index 9223296fe37b..3cfd60fd0083 100644
--- a/drivers/gpu/drm/radeon/radeon_irq_kms.c
+++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c
@@ -97,6 +97,7 @@ void radeon_driver_irq_uninstall_kms(struct drm_device *dev)
         rdev->irq.sw_int = false;
         for (i = 0; i < 2; i++) {
                 rdev->irq.crtc_vblank_int[i] = false;
+                rdev->irq.hpd[i] = false;
         }
         radeon_irq_set(rdev);
 }
@@ -128,17 +129,22 @@ int radeon_irq_kms_init(struct radeon_device *rdev)
                         DRM_INFO("radeon: using MSI.\n");
                 }
         }
-        drm_irq_install(rdev->ddev);
         rdev->irq.installed = true;
+        r = drm_irq_install(rdev->ddev);
+        if (r) {
+                rdev->irq.installed = false;
+                return r;
+        }
         DRM_INFO("radeon: irq initialized.\n");
         return 0;
 }
 
 void radeon_irq_kms_fini(struct radeon_device *rdev)
 {
+        drm_vblank_cleanup(rdev->ddev);
         if (rdev->irq.installed) {
-                rdev->irq.installed = false;
                 drm_irq_uninstall(rdev->ddev);
+                rdev->irq.installed = false;
                 if (rdev->msi_enabled)
                         pci_disable_msi(rdev->pdev);
         }
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
index 981508ff7037..38e45e231ef5 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c
@@ -46,6 +46,7 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
         struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
         uint32_t lvds_gen_cntl, lvds_pll_cntl, pixclks_cntl, disp_pwr_man;
         int panel_pwr_delay = 2000;
+        bool is_mac = false;
         DRM_DEBUG("\n");
 
         if (radeon_encoder->enc_priv) {
@@ -58,6 +59,15 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
                 }
         }
 
+        /* macs (and possibly some x86 oem systems?) wire up LVDS strangely
+         * Taken from radeonfb.
+         */
+        if ((rdev->mode_info.connector_table == CT_IBOOK) ||
+            (rdev->mode_info.connector_table == CT_POWERBOOK_EXTERNAL) ||
+            (rdev->mode_info.connector_table == CT_POWERBOOK_INTERNAL) ||
+            (rdev->mode_info.connector_table == CT_POWERBOOK_VGA))
+                is_mac = true;
+
         switch (mode) {
         case DRM_MODE_DPMS_ON:
                 disp_pwr_man = RREG32(RADEON_DISP_PWR_MAN);
@@ -74,6 +84,8 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
 
                 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
                 lvds_gen_cntl |= (RADEON_LVDS_ON | RADEON_LVDS_EN | RADEON_LVDS_DIGON | RADEON_LVDS_BLON);
+                if (is_mac)
+                        lvds_gen_cntl |= RADEON_LVDS_BL_MOD_EN;
                 lvds_gen_cntl &= ~(RADEON_LVDS_DISPLAY_DIS);
                 udelay(panel_pwr_delay * 1000);
                 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
@@ -85,7 +97,14 @@ static void radeon_legacy_lvds_dpms(struct drm_encoder *encoder, int mode)
                 WREG32_PLL_P(RADEON_PIXCLKS_CNTL, 0, ~RADEON_PIXCLK_LVDS_ALWAYS_ONb);
                 lvds_gen_cntl = RREG32(RADEON_LVDS_GEN_CNTL);
                 lvds_gen_cntl |= RADEON_LVDS_DISPLAY_DIS;
-                lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
+                if (is_mac) {
+                        lvds_gen_cntl &= ~RADEON_LVDS_BL_MOD_EN;
+                        WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
+                        lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_EN);
+                } else {
+                        WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
+                        lvds_gen_cntl &= ~(RADEON_LVDS_ON | RADEON_LVDS_BLON | RADEON_LVDS_EN | RADEON_LVDS_DIGON);
+                }
                 udelay(panel_pwr_delay * 1000);
                 WREG32(RADEON_LVDS_GEN_CNTL, lvds_gen_cntl);
                 WREG32_PLL(RADEON_PIXCLKS_CNTL, pixclks_cntl);
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_tv.c b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
index 3a12bb0c0563..417684daef4c 100644
--- a/drivers/gpu/drm/radeon/radeon_legacy_tv.c
+++ b/drivers/gpu/drm/radeon/radeon_legacy_tv.c
@@ -77,7 +77,7 @@ struct radeon_tv_mode_constants {
         unsigned pix_to_tv;
 };
 
-static const uint16_t hor_timing_NTSC[] = {
+static const uint16_t hor_timing_NTSC[MAX_H_CODE_TIMING_LEN] = {
         0x0007,
         0x003f,
         0x0263,
@@ -98,7 +98,7 @@ static const uint16_t hor_timing_NTSC[] = {
         0
 };
 
-static const uint16_t vert_timing_NTSC[] = {
+static const uint16_t vert_timing_NTSC[MAX_V_CODE_TIMING_LEN] = {
         0x2001,
         0x200d,
         0x1006,
@@ -115,7 +115,7 @@ static const uint16_t vert_timing_NTSC[] = {
         0
 };
 
-static const uint16_t hor_timing_PAL[] = {
+static const uint16_t hor_timing_PAL[MAX_H_CODE_TIMING_LEN] = {
         0x0007,
         0x0058,
         0x027c,
@@ -136,7 +136,7 @@ static const uint16_t hor_timing_PAL[] = {
         0
 };
 
-static const uint16_t vert_timing_PAL[] =       {
+static const uint16_t vert_timing_PAL[MAX_V_CODE_TIMING_LEN] = {
         0x2001,
         0x200c,
         0x1005,
@@ -623,9 +623,9 @@ void radeon_legacy_tv_mode_set(struct drm_encoder *encoder,
         }
         flicker_removal = (tmp + 500) / 1000;
 
-        if (flicker_removal < 3)
-                flicker_removal = 3;
-        for (i = 0; i < 6; ++i) {
+        if (flicker_removal < 2)
+                flicker_removal = 2;
+        for (i = 0; i < ARRAY_SIZE(SLOPE_limit); ++i) {
                 if (flicker_removal == SLOPE_limit[i])
                         break;
         }
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h
index 402369db5ba0..91cb041cb40d 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -46,32 +46,6 @@ struct radeon_device;
 #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
 #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
 
-enum radeon_connector_type {
-        CONNECTOR_NONE,
-        CONNECTOR_VGA,
-        CONNECTOR_DVI_I,
-        CONNECTOR_DVI_D,
-        CONNECTOR_DVI_A,
-        CONNECTOR_STV,
-        CONNECTOR_CTV,
-        CONNECTOR_LVDS,
-        CONNECTOR_DIGITAL,
-        CONNECTOR_SCART,
-        CONNECTOR_HDMI_TYPE_A,
-        CONNECTOR_HDMI_TYPE_B,
-        CONNECTOR_0XC,
-        CONNECTOR_0XD,
-        CONNECTOR_DIN,
-        CONNECTOR_DISPLAY_PORT,
-        CONNECTOR_UNSUPPORTED
-};
-
-enum radeon_dvi_type {
-        DVI_AUTO,
-        DVI_DIGITAL,
-        DVI_ANALOG
-};
-
 enum radeon_rmx_type {
         RMX_OFF,
         RMX_FULL,
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index d9ffe1f56e8f..4e636de877b2 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -221,8 +221,9 @@ int radeon_bo_unpin(struct radeon_bo *bo)
 int radeon_bo_evict_vram(struct radeon_device *rdev)
 {
         if (rdev->flags & RADEON_IS_IGP) {
-                /* Useless to evict on IGP chips */
-                return 0;
+                if (rdev->mc.igp_sideport_enabled == false)
+                        /* Useless to evict on IGP chips */
+                        return 0;
         }
         return ttm_bo_evict_mm(&rdev->mman.bdev, TTM_PL_VRAM);
 }
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c
index 3b0c07b444a2..58b5adf974ca 100644
--- a/drivers/gpu/drm/radeon/radeon_ttm.c
+++ b/drivers/gpu/drm/radeon/radeon_ttm.c
@@ -215,7 +215,10 @@ static void radeon_evict_flags(struct ttm_buffer_object *bo,
         rbo = container_of(bo, struct radeon_bo, tbo);
         switch (bo->mem.mem_type) {
         case TTM_PL_VRAM:
-                radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
+                if (rbo->rdev->cp.ready == false)
+                        radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
+                else
+                        radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
                 break;
         case TTM_PL_TT:
         default:
diff --git a/drivers/gpu/drm/radeon/reg_srcs/r420 b/drivers/gpu/drm/radeon/reg_srcs/r420
new file mode 100644
index 000000000000..989f7a020832
--- /dev/null
+++ b/drivers/gpu/drm/radeon/reg_srcs/r420
@@ -0,0 +1,795 @@
+r420 0x4f60
+0x1434 SRC_Y_X
+0x1438 DST_Y_X
+0x143C DST_HEIGHT_WIDTH
+0x146C DP_GUI_MASTER_CNTL
+0x1474 BRUSH_Y_X
+0x1478 DP_BRUSH_BKGD_CLR
+0x147C DP_BRUSH_FRGD_CLR
+0x1480 BRUSH_DATA0
+0x1484 BRUSH_DATA1
+0x1598 DST_WIDTH_HEIGHT
+0x15C0 CLR_CMP_CNTL
+0x15C4 CLR_CMP_CLR_SRC
+0x15C8 CLR_CMP_CLR_DST
+0x15CC CLR_CMP_MSK
+0x15D8 DP_SRC_FRGD_CLR
+0x15DC DP_SRC_BKGD_CLR
+0x1600 DST_LINE_START
+0x1604 DST_LINE_END
+0x1608 DST_LINE_PATCOUNT
+0x16C0 DP_CNTL
+0x16CC DP_WRITE_MSK
+0x16D0 DP_CNTL_XDIR_YDIR_YMAJOR
+0x16E8 DEFAULT_SC_BOTTOM_RIGHT
+0x16EC SC_TOP_LEFT
+0x16F0 SC_BOTTOM_RIGHT
+0x16F4 SRC_SC_BOTTOM_RIGHT
+0x1714 DSTCACHE_CTLSTAT
+0x1720 WAIT_UNTIL
+0x172C RBBM_GUICNTL
+0x1D98 VAP_VPORT_XSCALE
+0x1D9C VAP_VPORT_XOFFSET
+0x1DA0 VAP_VPORT_YSCALE
+0x1DA4 VAP_VPORT_YOFFSET
+0x1DA8 VAP_VPORT_ZSCALE
+0x1DAC VAP_VPORT_ZOFFSET
+0x2080 VAP_CNTL
+0x2090 VAP_OUT_VTX_FMT_0
+0x2094 VAP_OUT_VTX_FMT_1
+0x20B0 VAP_VTE_CNTL
+0x2138 VAP_VF_MIN_VTX_INDX
+0x2140 VAP_CNTL_STATUS
+0x2150 VAP_PROG_STREAM_CNTL_0
+0x2154 VAP_PROG_STREAM_CNTL_1
+0x2158 VAP_PROG_STREAM_CNTL_2
+0x215C VAP_PROG_STREAM_CNTL_3
+0x2160 VAP_PROG_STREAM_CNTL_4
+0x2164 VAP_PROG_STREAM_CNTL_5
+0x2168 VAP_PROG_STREAM_CNTL_6
+0x216C VAP_PROG_STREAM_CNTL_7
+0x2180 VAP_VTX_STATE_CNTL
+0x2184 VAP_VSM_VTX_ASSM
+0x2188 VAP_VTX_STATE_IND_REG_0
+0x218C VAP_VTX_STATE_IND_REG_1
+0x2190 VAP_VTX_STATE_IND_REG_2
+0x2194 VAP_VTX_STATE_IND_REG_3
+0x2198 VAP_VTX_STATE_IND_REG_4
+0x219C VAP_VTX_STATE_IND_REG_5
+0x21A0 VAP_VTX_STATE_IND_REG_6
+0x21A4 VAP_VTX_STATE_IND_REG_7
+0x21A8 VAP_VTX_STATE_IND_REG_8
+0x21AC VAP_VTX_STATE_IND_REG_9
+0x21B0 VAP_VTX_STATE_IND_REG_10
+0x21B4 VAP_VTX_STATE_IND_REG_11
+0x21B8 VAP_VTX_STATE_IND_REG_12
+0x21BC VAP_VTX_STATE_IND_REG_13
+0x21C0 VAP_VTX_STATE_IND_REG_14
+0x21C4 VAP_VTX_STATE_IND_REG_15
+0x21DC VAP_PSC_SGN_NORM_CNTL
+0x21E0 VAP_PROG_STREAM_CNTL_EXT_0
+0x21E4 VAP_PROG_STREAM_CNTL_EXT_1
+0x21E8 VAP_PROG_STREAM_CNTL_EXT_2
+0x21EC VAP_PROG_STREAM_CNTL_EXT_3
+0x21F0 VAP_PROG_STREAM_CNTL_EXT_4
+0x21F4 VAP_PROG_STREAM_CNTL_EXT_5
+0x21F8 VAP_PROG_STREAM_CNTL_EXT_6
+0x21FC VAP_PROG_STREAM_CNTL_EXT_7
+0x2200 VAP_PVS_VECTOR_INDX_REG
+0x2204 VAP_PVS_VECTOR_DATA_REG
+0x2208 VAP_PVS_VECTOR_DATA_REG_128
+0x221C VAP_CLIP_CNTL
+0x2220 VAP_GB_VERT_CLIP_ADJ
+0x2224 VAP_GB_VERT_DISC_ADJ
+0x2228 VAP_GB_HORZ_CLIP_ADJ
+0x222C VAP_GB_HORZ_DISC_ADJ
+0x2230 VAP_PVS_FLOW_CNTL_ADDRS_0
+0x2234 VAP_PVS_FLOW_CNTL_ADDRS_1
+0x2238 VAP_PVS_FLOW_CNTL_ADDRS_2
+0x223C VAP_PVS_FLOW_CNTL_ADDRS_3
+0x2240 VAP_PVS_FLOW_CNTL_ADDRS_4
+0x2244 VAP_PVS_FLOW_CNTL_ADDRS_5
+0x2248 VAP_PVS_FLOW_CNTL_ADDRS_6
+0x224C VAP_PVS_FLOW_CNTL_ADDRS_7
+0x2250 VAP_PVS_FLOW_CNTL_ADDRS_8
+0x2254 VAP_PVS_FLOW_CNTL_ADDRS_9
+0x2258 VAP_PVS_FLOW_CNTL_ADDRS_10
+0x225C VAP_PVS_FLOW_CNTL_ADDRS_11
+0x2260 VAP_PVS_FLOW_CNTL_ADDRS_12
+0x2264 VAP_PVS_FLOW_CNTL_ADDRS_13
+0x2268 VAP_PVS_FLOW_CNTL_ADDRS_14
+0x226C VAP_PVS_FLOW_CNTL_ADDRS_15
+0x2284 VAP_PVS_STATE_FLUSH_REG
+0x2288 VAP_PVS_VTX_TIMEOUT_REG
+0x2290 VAP_PVS_FLOW_CNTL_LOOP_INDEX_0
+0x2294 VAP_PVS_FLOW_CNTL_LOOP_INDEX_1
+0x2298 VAP_PVS_FLOW_CNTL_LOOP_INDEX_2
+0x229C VAP_PVS_FLOW_CNTL_LOOP_INDEX_3
+0x22A0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_4
+0x22A4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_5
+0x22A8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_6
+0x22AC VAP_PVS_FLOW_CNTL_LOOP_INDEX_7
+0x22B0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_8
+0x22B4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_9
+0x22B8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_10
+0x22BC VAP_PVS_FLOW_CNTL_LOOP_INDEX_11
+0x22C0 VAP_PVS_FLOW_CNTL_LOOP_INDEX_12
+0x22C4 VAP_PVS_FLOW_CNTL_LOOP_INDEX_13
+0x22C8 VAP_PVS_FLOW_CNTL_LOOP_INDEX_14
+0x22CC VAP_PVS_FLOW_CNTL_LOOP_INDEX_15
+0x22D0 VAP_PVS_CODE_CNTL_0
+0x22D4 VAP_PVS_CONST_CNTL
+0x22D8 VAP_PVS_CODE_CNTL_1
+0x22DC VAP_PVS_FLOW_CNTL_OPC
+0x342C RB2D_DSTCACHE_CTLSTAT
+0x4000 GB_VAP_RASTER_VTX_FMT_0
+0x4004 GB_VAP_RASTER_VTX_FMT_1
+0x4008 GB_ENABLE
+0x401C GB_SELECT
+0x4020 GB_AA_CONFIG
+0x4024 GB_FIFO_SIZE
+0x4100 TX_INVALTAGS
+0x4200 GA_POINT_S0
+0x4204 GA_POINT_T0
+0x4208 GA_POINT_S1
+0x420C GA_POINT_T1
+0x4214 GA_TRIANGLE_STIPPLE
+0x421C GA_POINT_SIZE
+0x4230 GA_POINT_MINMAX
+0x4234 GA_LINE_CNTL
+0x4238 GA_LINE_STIPPLE_CONFIG
+0x4260 GA_LINE_STIPPLE_VALUE
+0x4264 GA_LINE_S0
+0x4268 GA_LINE_S1
+0x4278 GA_COLOR_CONTROL
+0x427C GA_SOLID_RG
+0x4280 GA_SOLID_BA
+0x4288 GA_POLY_MODE
+0x428C GA_ROUND_MODE
+0x4290 GA_OFFSET
+0x4294 GA_FOG_SCALE
+0x4298 GA_FOG_OFFSET
+0x42A0 SU_TEX_WRAP
+0x42A4 SU_POLY_OFFSET_FRONT_SCALE
+0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
+0x42AC SU_POLY_OFFSET_BACK_SCALE
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET
+0x42B4 SU_POLY_OFFSET_ENABLE
+0x42B8 SU_CULL_MODE
+0x42C0 SU_DEPTH_SCALE
+0x42C4 SU_DEPTH_OFFSET
+0x42C8 SU_REG_DEST
+0x4300 RS_COUNT
+0x4304 RS_INST_COUNT
+0x4310 RS_IP_0
+0x4314 RS_IP_1
+0x4318 RS_IP_2
+0x431C RS_IP_3
+0x4320 RS_IP_4
+0x4324 RS_IP_5
+0x4328 RS_IP_6
+0x432C RS_IP_7
+0x4330 RS_INST_0
+0x4334 RS_INST_1
+0x4338 RS_INST_2
+0x433C RS_INST_3
+0x4340 RS_INST_4
+0x4344 RS_INST_5
+0x4348 RS_INST_6
+0x434C RS_INST_7
+0x4350 RS_INST_8
+0x4354 RS_INST_9
+0x4358 RS_INST_10
+0x435C RS_INST_11
+0x4360 RS_INST_12
+0x4364 RS_INST_13
+0x4368 RS_INST_14
+0x436C RS_INST_15
+0x43A4 SC_HYPERZ_EN
+0x43A8 SC_EDGERULE
+0x43B0 SC_CLIP_0_A
+0x43B4 SC_CLIP_0_B
+0x43B8 SC_CLIP_1_A
+0x43BC SC_CLIP_1_B
+0x43C0 SC_CLIP_2_A
+0x43C4 SC_CLIP_2_B
+0x43C8 SC_CLIP_3_A
+0x43CC SC_CLIP_3_B
+0x43D0 SC_CLIP_RULE
+0x43E0 SC_SCISSOR0
+0x43E8 SC_SCREENDOOR
+0x4440 TX_FILTER1_0
+0x4444 TX_FILTER1_1
+0x4448 TX_FILTER1_2
+0x444C TX_FILTER1_3
+0x4450 TX_FILTER1_4
+0x4454 TX_FILTER1_5
+0x4458 TX_FILTER1_6
+0x445C TX_FILTER1_7
+0x4460 TX_FILTER1_8
+0x4464 TX_FILTER1_9
+0x4468 TX_FILTER1_10
+0x446C TX_FILTER1_11
+0x4470 TX_FILTER1_12
+0x4474 TX_FILTER1_13
+0x4478 TX_FILTER1_14
+0x447C TX_FILTER1_15
+0x4580 TX_CHROMA_KEY_0
+0x4584 TX_CHROMA_KEY_1
+0x4588 TX_CHROMA_KEY_2
+0x458C TX_CHROMA_KEY_3
+0x4590 TX_CHROMA_KEY_4
+0x4594 TX_CHROMA_KEY_5
+0x4598 TX_CHROMA_KEY_6
+0x459C TX_CHROMA_KEY_7
+0x45A0 TX_CHROMA_KEY_8
+0x45A4 TX_CHROMA_KEY_9
+0x45A8 TX_CHROMA_KEY_10
+0x45AC TX_CHROMA_KEY_11
+0x45B0 TX_CHROMA_KEY_12
+0x45B4 TX_CHROMA_KEY_13
+0x45B8 TX_CHROMA_KEY_14
+0x45BC TX_CHROMA_KEY_15
+0x45C0 TX_BORDER_COLOR_0
+0x45C4 TX_BORDER_COLOR_1
+0x45C8 TX_BORDER_COLOR_2
+0x45CC TX_BORDER_COLOR_3
+0x45D0 TX_BORDER_COLOR_4
+0x45D4 TX_BORDER_COLOR_5
+0x45D8 TX_BORDER_COLOR_6
+0x45DC TX_BORDER_COLOR_7
+0x45E0 TX_BORDER_COLOR_8
+0x45E4 TX_BORDER_COLOR_9
+0x45E8 TX_BORDER_COLOR_10
+0x45EC TX_BORDER_COLOR_11
+0x45F0 TX_BORDER_COLOR_12
+0x45F4 TX_BORDER_COLOR_13
+0x45F8 TX_BORDER_COLOR_14
+0x45FC TX_BORDER_COLOR_15
+0x4600 US_CONFIG
+0x4604 US_PIXSIZE
+0x4608 US_CODE_OFFSET
+0x460C US_RESET
+0x4610 US_CODE_ADDR_0
+0x4614 US_CODE_ADDR_1
+0x4618 US_CODE_ADDR_2
+0x461C US_CODE_ADDR_3
+0x4620 US_TEX_INST_0
+0x4624 US_TEX_INST_1
+0x4628 US_TEX_INST_2
+0x462C US_TEX_INST_3
+0x4630 US_TEX_INST_4
+0x4634 US_TEX_INST_5
+0x4638 US_TEX_INST_6
+0x463C US_TEX_INST_7
+0x4640 US_TEX_INST_8
+0x4644 US_TEX_INST_9
+0x4648 US_TEX_INST_10
+0x464C US_TEX_INST_11
+0x4650 US_TEX_INST_12
+0x4654 US_TEX_INST_13
+0x4658 US_TEX_INST_14
+0x465C US_TEX_INST_15
+0x4660 US_TEX_INST_16
+0x4664 US_TEX_INST_17
+0x4668 US_TEX_INST_18
+0x466C US_TEX_INST_19
+0x4670 US_TEX_INST_20
+0x4674 US_TEX_INST_21
+0x4678 US_TEX_INST_22
+0x467C US_TEX_INST_23
+0x4680 US_TEX_INST_24
+0x4684 US_TEX_INST_25
+0x4688 US_TEX_INST_26
+0x468C US_TEX_INST_27
+0x4690 US_TEX_INST_28
+0x4694 US_TEX_INST_29
+0x4698 US_TEX_INST_30
+0x469C US_TEX_INST_31
+0x46A4 US_OUT_FMT_0
+0x46A8 US_OUT_FMT_1
+0x46AC US_OUT_FMT_2
+0x46B0 US_OUT_FMT_3
+0x46B4 US_W_FMT
+0x46B8 US_CODE_BANK
+0x46BC US_CODE_EXT
+0x46C0 US_ALU_RGB_ADDR_0
+0x46C4 US_ALU_RGB_ADDR_1
+0x46C8 US_ALU_RGB_ADDR_2
+0x46CC US_ALU_RGB_ADDR_3
+0x46D0 US_ALU_RGB_ADDR_4
+0x46D4 US_ALU_RGB_ADDR_5
+0x46D8 US_ALU_RGB_ADDR_6
+0x46DC US_ALU_RGB_ADDR_7
+0x46E0 US_ALU_RGB_ADDR_8
+0x46E4 US_ALU_RGB_ADDR_9
+0x46E8 US_ALU_RGB_ADDR_10
+0x46EC US_ALU_RGB_ADDR_11
+0x46F0 US_ALU_RGB_ADDR_12
+0x46F4 US_ALU_RGB_ADDR_13
+0x46F8 US_ALU_RGB_ADDR_14
+0x46FC US_ALU_RGB_ADDR_15
+0x4700 US_ALU_RGB_ADDR_16
+0x4704 US_ALU_RGB_ADDR_17
+0x4708 US_ALU_RGB_ADDR_18
+0x470C US_ALU_RGB_ADDR_19
+0x4710 US_ALU_RGB_ADDR_20
+0x4714 US_ALU_RGB_ADDR_21
+0x4718 US_ALU_RGB_ADDR_22
+0x471C US_ALU_RGB_ADDR_23
+0x4720 US_ALU_RGB_ADDR_24
+0x4724 US_ALU_RGB_ADDR_25
+0x4728 US_ALU_RGB_ADDR_26
+0x472C US_ALU_RGB_ADDR_27
+0x4730 US_ALU_RGB_ADDR_28
+0x4734 US_ALU_RGB_ADDR_29
+0x4738 US_ALU_RGB_ADDR_30
+0x473C US_ALU_RGB_ADDR_31
+0x4740 US_ALU_RGB_ADDR_32
+0x4744 US_ALU_RGB_ADDR_33
+0x4748 US_ALU_RGB_ADDR_34
+0x474C US_ALU_RGB_ADDR_35
+0x4750 US_ALU_RGB_ADDR_36
+0x4754 US_ALU_RGB_ADDR_37
+0x4758 US_ALU_RGB_ADDR_38
+0x475C US_ALU_RGB_ADDR_39
+0x4760 US_ALU_RGB_ADDR_40
+0x4764 US_ALU_RGB_ADDR_41
+0x4768 US_ALU_RGB_ADDR_42
+0x476C US_ALU_RGB_ADDR_43
+0x4770 US_ALU_RGB_ADDR_44
+0x4774 US_ALU_RGB_ADDR_45
+0x4778 US_ALU_RGB_ADDR_46
+0x477C US_ALU_RGB_ADDR_47
+0x4780 US_ALU_RGB_ADDR_48
+0x4784 US_ALU_RGB_ADDR_49
+0x4788 US_ALU_RGB_ADDR_50
+0x478C US_ALU_RGB_ADDR_51
+0x4790 US_ALU_RGB_ADDR_52
+0x4794 US_ALU_RGB_ADDR_53
+0x4798 US_ALU_RGB_ADDR_54
+0x479C US_ALU_RGB_ADDR_55
+0x47A0 US_ALU_RGB_ADDR_56
+0x47A4 US_ALU_RGB_ADDR_57
+0x47A8 US_ALU_RGB_ADDR_58
+0x47AC US_ALU_RGB_ADDR_59
+0x47B0 US_ALU_RGB_ADDR_60
+0x47B4 US_ALU_RGB_ADDR_61
+0x47B8 US_ALU_RGB_ADDR_62
+0x47BC US_ALU_RGB_ADDR_63
+0x47C0 US_ALU_ALPHA_ADDR_0
+0x47C4 US_ALU_ALPHA_ADDR_1
+0x47C8 US_ALU_ALPHA_ADDR_2
+0x47CC US_ALU_ALPHA_ADDR_3
+0x47D0 US_ALU_ALPHA_ADDR_4
+0x47D4 US_ALU_ALPHA_ADDR_5
+0x47D8 US_ALU_ALPHA_ADDR_6
+0x47DC US_ALU_ALPHA_ADDR_7
+0x47E0 US_ALU_ALPHA_ADDR_8
+0x47E4 US_ALU_ALPHA_ADDR_9
+0x47E8 US_ALU_ALPHA_ADDR_10
+0x47EC US_ALU_ALPHA_ADDR_11
+0x47F0 US_ALU_ALPHA_ADDR_12
+0x47F4 US_ALU_ALPHA_ADDR_13
+0x47F8 US_ALU_ALPHA_ADDR_14
+0x47FC US_ALU_ALPHA_ADDR_15
+0x4800 US_ALU_ALPHA_ADDR_16
+0x4804 US_ALU_ALPHA_ADDR_17
+0x4808 US_ALU_ALPHA_ADDR_18
+0x480C US_ALU_ALPHA_ADDR_19
+0x4810 US_ALU_ALPHA_ADDR_20
+0x4814 US_ALU_ALPHA_ADDR_21
+0x4818 US_ALU_ALPHA_ADDR_22
+0x481C US_ALU_ALPHA_ADDR_23
+0x4820 US_ALU_ALPHA_ADDR_24
+0x4824 US_ALU_ALPHA_ADDR_25
+0x4828 US_ALU_ALPHA_ADDR_26
+0x482C US_ALU_ALPHA_ADDR_27
+0x4830 US_ALU_ALPHA_ADDR_28
+0x4834 US_ALU_ALPHA_ADDR_29
+0x4838 US_ALU_ALPHA_ADDR_30
+0x483C US_ALU_ALPHA_ADDR_31
+0x4840 US_ALU_ALPHA_ADDR_32
+0x4844 US_ALU_ALPHA_ADDR_33
+0x4848 US_ALU_ALPHA_ADDR_34
+0x484C US_ALU_ALPHA_ADDR_35
+0x4850 US_ALU_ALPHA_ADDR_36
+0x4854 US_ALU_ALPHA_ADDR_37
+0x4858 US_ALU_ALPHA_ADDR_38
+0x485C US_ALU_ALPHA_ADDR_39
+0x4860 US_ALU_ALPHA_ADDR_40
+0x4864 US_ALU_ALPHA_ADDR_41
+0x4868 US_ALU_ALPHA_ADDR_42
+0x486C US_ALU_ALPHA_ADDR_43
+0x4870 US_ALU_ALPHA_ADDR_44
+0x4874 US_ALU_ALPHA_ADDR_45
+0x4878 US_ALU_ALPHA_ADDR_46
+0x487C US_ALU_ALPHA_ADDR_47
+0x4880 US_ALU_ALPHA_ADDR_48
+0x4884 US_ALU_ALPHA_ADDR_49
+0x4888 US_ALU_ALPHA_ADDR_50
+0x488C US_ALU_ALPHA_ADDR_51
+0x4890 US_ALU_ALPHA_ADDR_52
+0x4894 US_ALU_ALPHA_ADDR_53
+0x4898 US_ALU_ALPHA_ADDR_54
+0x489C US_ALU_ALPHA_ADDR_55
+0x48A0 US_ALU_ALPHA_ADDR_56
+0x48A4 US_ALU_ALPHA_ADDR_57
+0x48A8 US_ALU_ALPHA_ADDR_58
+0x48AC US_ALU_ALPHA_ADDR_59
+0x48B0 US_ALU_ALPHA_ADDR_60
+0x48B4 US_ALU_ALPHA_ADDR_61
+0x48B8 US_ALU_ALPHA_ADDR_62
+0x48BC US_ALU_ALPHA_ADDR_63
+0x48C0 US_ALU_RGB_INST_0
+0x48C4 US_ALU_RGB_INST_1
+0x48C8 US_ALU_RGB_INST_2
+0x48CC US_ALU_RGB_INST_3
+0x48D0 US_ALU_RGB_INST_4
+0x48D4 US_ALU_RGB_INST_5
+0x48D8 US_ALU_RGB_INST_6
+0x48DC US_ALU_RGB_INST_7
+0x48E0 US_ALU_RGB_INST_8
+0x48E4 US_ALU_RGB_INST_9
+0x48E8 US_ALU_RGB_INST_10
+0x48EC US_ALU_RGB_INST_11
+0x48F0 US_ALU_RGB_INST_12
+0x48F4 US_ALU_RGB_INST_13
+0x48F8 US_ALU_RGB_INST_14
+0x48FC US_ALU_RGB_INST_15
+0x4900 US_ALU_RGB_INST_16
+0x4904 US_ALU_RGB_INST_17
+0x4908 US_ALU_RGB_INST_18
+0x490C US_ALU_RGB_INST_19
+0x4910 US_ALU_RGB_INST_20
+0x4914 US_ALU_RGB_INST_21
+0x4918 US_ALU_RGB_INST_22
+0x491C US_ALU_RGB_INST_23
+0x4920 US_ALU_RGB_INST_24
+0x4924 US_ALU_RGB_INST_25
+0x4928 US_ALU_RGB_INST_26
+0x492C US_ALU_RGB_INST_27
+0x4930 US_ALU_RGB_INST_28
+0x4934 US_ALU_RGB_INST_29
+0x4938 US_ALU_RGB_INST_30
+0x493C US_ALU_RGB_INST_31
+0x4940 US_ALU_RGB_INST_32
+0x4944 US_ALU_RGB_INST_33
+0x4948 US_ALU_RGB_INST_34
+0x494C US_ALU_RGB_INST_35
+0x4950 US_ALU_RGB_INST_36
+0x4954 US_ALU_RGB_INST_37
+0x4958 US_ALU_RGB_INST_38
+0x495C US_ALU_RGB_INST_39
+0x4960 US_ALU_RGB_INST_40
+0x4964 US_ALU_RGB_INST_41
+0x4968 US_ALU_RGB_INST_42
+0x496C US_ALU_RGB_INST_43
+0x4970 US_ALU_RGB_INST_44
+0x4974 US_ALU_RGB_INST_45
+0x4978 US_ALU_RGB_INST_46
+0x497C US_ALU_RGB_INST_47
+0x4980 US_ALU_RGB_INST_48
+0x4984 US_ALU_RGB_INST_49
+0x4988 US_ALU_RGB_INST_50
+0x498C US_ALU_RGB_INST_51
+0x4990 US_ALU_RGB_INST_52
+0x4994 US_ALU_RGB_INST_53
+0x4998 US_ALU_RGB_INST_54
+0x499C US_ALU_RGB_INST_55
+0x49A0 US_ALU_RGB_INST_56
+0x49A4 US_ALU_RGB_INST_57
+0x49A8 US_ALU_RGB_INST_58
+0x49AC US_ALU_RGB_INST_59
+0x49B0 US_ALU_RGB_INST_60
+0x49B4 US_ALU_RGB_INST_61
+0x49B8 US_ALU_RGB_INST_62
+0x49BC US_ALU_RGB_INST_63
+0x49C0 US_ALU_ALPHA_INST_0
+0x49C4 US_ALU_ALPHA_INST_1
+0x49C8 US_ALU_ALPHA_INST_2
+0x49CC US_ALU_ALPHA_INST_3
+0x49D0 US_ALU_ALPHA_INST_4
+0x49D4 US_ALU_ALPHA_INST_5
+0x49D8 US_ALU_ALPHA_INST_6
+0x49DC US_ALU_ALPHA_INST_7
+0x49E0 US_ALU_ALPHA_INST_8
+0x49E4 US_ALU_ALPHA_INST_9
+0x49E8 US_ALU_ALPHA_INST_10
+0x49EC US_ALU_ALPHA_INST_11
+0x49F0 US_ALU_ALPHA_INST_12
+0x49F4 US_ALU_ALPHA_INST_13
+0x49F8 US_ALU_ALPHA_INST_14
+0x49FC US_ALU_ALPHA_INST_15
+0x4A00 US_ALU_ALPHA_INST_16
+0x4A04 US_ALU_ALPHA_INST_17
+0x4A08 US_ALU_ALPHA_INST_18
+0x4A0C US_ALU_ALPHA_INST_19
+0x4A10 US_ALU_ALPHA_INST_20
+0x4A14 US_ALU_ALPHA_INST_21
+0x4A18 US_ALU_ALPHA_INST_22
+0x4A1C US_ALU_ALPHA_INST_23
+0x4A20 US_ALU_ALPHA_INST_24
+0x4A24 US_ALU_ALPHA_INST_25
+0x4A28 US_ALU_ALPHA_INST_26
+0x4A2C US_ALU_ALPHA_INST_27
+0x4A30 US_ALU_ALPHA_INST_28
+0x4A34 US_ALU_ALPHA_INST_29
+0x4A38 US_ALU_ALPHA_INST_30
+0x4A3C US_ALU_ALPHA_INST_31
+0x4A40 US_ALU_ALPHA_INST_32
+0x4A44 US_ALU_ALPHA_INST_33
+0x4A48 US_ALU_ALPHA_INST_34
+0x4A4C US_ALU_ALPHA_INST_35
+0x4A50 US_ALU_ALPHA_INST_36
+0x4A54 US_ALU_ALPHA_INST_37
+0x4A58 US_ALU_ALPHA_INST_38
+0x4A5C US_ALU_ALPHA_INST_39
+0x4A60 US_ALU_ALPHA_INST_40
+0x4A64 US_ALU_ALPHA_INST_41
+0x4A68 US_ALU_ALPHA_INST_42
+0x4A6C US_ALU_ALPHA_INST_43
+0x4A70 US_ALU_ALPHA_INST_44
+0x4A74 US_ALU_ALPHA_INST_45
+0x4A78 US_ALU_ALPHA_INST_46
+0x4A7C US_ALU_ALPHA_INST_47
+0x4A80 US_ALU_ALPHA_INST_48
+0x4A84 US_ALU_ALPHA_INST_49
+0x4A88 US_ALU_ALPHA_INST_50
+0x4A8C US_ALU_ALPHA_INST_51
+0x4A90 US_ALU_ALPHA_INST_52
+0x4A94 US_ALU_ALPHA_INST_53
+0x4A98 US_ALU_ALPHA_INST_54
+0x4A9C US_ALU_ALPHA_INST_55
+0x4AA0 US_ALU_ALPHA_INST_56
+0x4AA4 US_ALU_ALPHA_INST_57
+0x4AA8 US_ALU_ALPHA_INST_58
+0x4AAC US_ALU_ALPHA_INST_59
+0x4AB0 US_ALU_ALPHA_INST_60
+0x4AB4 US_ALU_ALPHA_INST_61
+0x4AB8 US_ALU_ALPHA_INST_62
+0x4ABC US_ALU_ALPHA_INST_63
+0x4AC0 US_ALU_EXT_ADDR_0
+0x4AC4 US_ALU_EXT_ADDR_1
+0x4AC8 US_ALU_EXT_ADDR_2
+0x4ACC US_ALU_EXT_ADDR_3
+0x4AD0 US_ALU_EXT_ADDR_4
+0x4AD4 US_ALU_EXT_ADDR_5
+0x4AD8 US_ALU_EXT_ADDR_6
+0x4ADC US_ALU_EXT_ADDR_7
+0x4AE0 US_ALU_EXT_ADDR_8
+0x4AE4 US_ALU_EXT_ADDR_9
+0x4AE8 US_ALU_EXT_ADDR_10
+0x4AEC US_ALU_EXT_ADDR_11
+0x4AF0 US_ALU_EXT_ADDR_12
+0x4AF4 US_ALU_EXT_ADDR_13
+0x4AF8 US_ALU_EXT_ADDR_14
+0x4AFC US_ALU_EXT_ADDR_15
+0x4B00 US_ALU_EXT_ADDR_16
+0x4B04 US_ALU_EXT_ADDR_17
+0x4B08 US_ALU_EXT_ADDR_18
+0x4B0C US_ALU_EXT_ADDR_19
+0x4B10 US_ALU_EXT_ADDR_20
+0x4B14 US_ALU_EXT_ADDR_21
+0x4B18 US_ALU_EXT_ADDR_22
+0x4B1C US_ALU_EXT_ADDR_23
+0x4B20 US_ALU_EXT_ADDR_24
+0x4B24 US_ALU_EXT_ADDR_25
+0x4B28 US_ALU_EXT_ADDR_26
+0x4B2C US_ALU_EXT_ADDR_27
+0x4B30 US_ALU_EXT_ADDR_28
+0x4B34 US_ALU_EXT_ADDR_29
+0x4B38 US_ALU_EXT_ADDR_30
+0x4B3C US_ALU_EXT_ADDR_31
+0x4B40 US_ALU_EXT_ADDR_32
+0x4B44 US_ALU_EXT_ADDR_33
+0x4B48 US_ALU_EXT_ADDR_34
+0x4B4C US_ALU_EXT_ADDR_35
+0x4B50 US_ALU_EXT_ADDR_36
+0x4B54 US_ALU_EXT_ADDR_37
+0x4B58 US_ALU_EXT_ADDR_38
+0x4B5C US_ALU_EXT_ADDR_39
+0x4B60 US_ALU_EXT_ADDR_40
+0x4B64 US_ALU_EXT_ADDR_41
+0x4B68 US_ALU_EXT_ADDR_42
+0x4B6C US_ALU_EXT_ADDR_43
+0x4B70 US_ALU_EXT_ADDR_44
+0x4B74 US_ALU_EXT_ADDR_45
+0x4B78 US_ALU_EXT_ADDR_46
+0x4B7C US_ALU_EXT_ADDR_47
+0x4B80 US_ALU_EXT_ADDR_48
+0x4B84 US_ALU_EXT_ADDR_49
+0x4B88 US_ALU_EXT_ADDR_50
+0x4B8C US_ALU_EXT_ADDR_51
+0x4B90 US_ALU_EXT_ADDR_52
+0x4B94 US_ALU_EXT_ADDR_53
+0x4B98 US_ALU_EXT_ADDR_54
+0x4B9C US_ALU_EXT_ADDR_55
+0x4BA0 US_ALU_EXT_ADDR_56
+0x4BA4 US_ALU_EXT_ADDR_57
+0x4BA8 US_ALU_EXT_ADDR_58
+0x4BAC US_ALU_EXT_ADDR_59
+0x4BB0 US_ALU_EXT_ADDR_60
+0x4BB4 US_ALU_EXT_ADDR_61
+0x4BB8 US_ALU_EXT_ADDR_62
+0x4BBC US_ALU_EXT_ADDR_63
+0x4BC0 FG_FOG_BLEND
+0x4BC4 FG_FOG_FACTOR
+0x4BC8 FG_FOG_COLOR_R
+0x4BCC FG_FOG_COLOR_G
+0x4BD0 FG_FOG_COLOR_B
+0x4BD4 FG_ALPHA_FUNC
+0x4BD8 FG_DEPTH_SRC
+0x4C00 US_ALU_CONST_R_0
+0x4C04 US_ALU_CONST_G_0
+0x4C08 US_ALU_CONST_B_0
+0x4C0C US_ALU_CONST_A_0
+0x4C10 US_ALU_CONST_R_1
+0x4C14 US_ALU_CONST_G_1
+0x4C18 US_ALU_CONST_B_1
+0x4C1C US_ALU_CONST_A_1
+0x4C20 US_ALU_CONST_R_2
+0x4C24 US_ALU_CONST_G_2
+0x4C28 US_ALU_CONST_B_2
+0x4C2C US_ALU_CONST_A_2
+0x4C30 US_ALU_CONST_R_3
+0x4C34 US_ALU_CONST_G_3
+0x4C38 US_ALU_CONST_B_3
+0x4C3C US_ALU_CONST_A_3
+0x4C40 US_ALU_CONST_R_4
+0x4C44 US_ALU_CONST_G_4
+0x4C48 US_ALU_CONST_B_4
+0x4C4C US_ALU_CONST_A_4
+0x4C50 US_ALU_CONST_R_5
+0x4C54 US_ALU_CONST_G_5
+0x4C58 US_ALU_CONST_B_5
+0x4C5C US_ALU_CONST_A_5
+0x4C60 US_ALU_CONST_R_6
+0x4C64 US_ALU_CONST_G_6
+0x4C68 US_ALU_CONST_B_6
+0x4C6C US_ALU_CONST_A_6
+0x4C70 US_ALU_CONST_R_7
+0x4C74 US_ALU_CONST_G_7
+0x4C78 US_ALU_CONST_B_7
+0x4C7C US_ALU_CONST_A_7
+0x4C80 US_ALU_CONST_R_8
+0x4C84 US_ALU_CONST_G_8
+0x4C88 US_ALU_CONST_B_8
+0x4C8C US_ALU_CONST_A_8
+0x4C90 US_ALU_CONST_R_9
+0x4C94 US_ALU_CONST_G_9
+0x4C98 US_ALU_CONST_B_9
+0x4C9C US_ALU_CONST_A_9
+0x4CA0 US_ALU_CONST_R_10
+0x4CA4 US_ALU_CONST_G_10
+0x4CA8 US_ALU_CONST_B_10
+0x4CAC US_ALU_CONST_A_10
+0x4CB0 US_ALU_CONST_R_11
+0x4CB4 US_ALU_CONST_G_11
+0x4CB8 US_ALU_CONST_B_11
+0x4CBC US_ALU_CONST_A_11
+0x4CC0 US_ALU_CONST_R_12
+0x4CC4 US_ALU_CONST_G_12
+0x4CC8 US_ALU_CONST_B_12
+0x4CCC US_ALU_CONST_A_12
+0x4CD0 US_ALU_CONST_R_13
+0x4CD4 US_ALU_CONST_G_13
+0x4CD8 US_ALU_CONST_B_13
+0x4CDC US_ALU_CONST_A_13
+0x4CE0 US_ALU_CONST_R_14
+0x4CE4 US_ALU_CONST_G_14
+0x4CE8 US_ALU_CONST_B_14
+0x4CEC US_ALU_CONST_A_14
+0x4CF0 US_ALU_CONST_R_15
+0x4CF4 US_ALU_CONST_G_15
+0x4CF8 US_ALU_CONST_B_15
+0x4CFC US_ALU_CONST_A_15
+0x4D00 US_ALU_CONST_R_16
+0x4D04 US_ALU_CONST_G_16
+0x4D08 US_ALU_CONST_B_16
+0x4D0C US_ALU_CONST_A_16
+0x4D10 US_ALU_CONST_R_17
+0x4D14 US_ALU_CONST_G_17
+0x4D18 US_ALU_CONST_B_17
+0x4D1C US_ALU_CONST_A_17
+0x4D20 US_ALU_CONST_R_18
+0x4D24 US_ALU_CONST_G_18
+0x4D28 US_ALU_CONST_B_18
+0x4D2C US_ALU_CONST_A_18
+0x4D30 US_ALU_CONST_R_19
+0x4D34 US_ALU_CONST_G_19
+0x4D38 US_ALU_CONST_B_19
+0x4D3C US_ALU_CONST_A_19
+0x4D40 US_ALU_CONST_R_20
+0x4D44 US_ALU_CONST_G_20
+0x4D48 US_ALU_CONST_B_20
+0x4D4C US_ALU_CONST_A_20
+0x4D50 US_ALU_CONST_R_21
+0x4D54 US_ALU_CONST_G_21
+0x4D58 US_ALU_CONST_B_21
+0x4D5C US_ALU_CONST_A_21
+0x4D60 US_ALU_CONST_R_22
+0x4D64 US_ALU_CONST_G_22
+0x4D68 US_ALU_CONST_B_22
+0x4D6C US_ALU_CONST_A_22
+0x4D70 US_ALU_CONST_R_23
+0x4D74 US_ALU_CONST_G_23
+0x4D78 US_ALU_CONST_B_23
+0x4D7C US_ALU_CONST_A_23
+0x4D80 US_ALU_CONST_R_24
+0x4D84 US_ALU_CONST_G_24
+0x4D88 US_ALU_CONST_B_24
+0x4D8C US_ALU_CONST_A_24
+0x4D90 US_ALU_CONST_R_25
+0x4D94 US_ALU_CONST_G_25
+0x4D98 US_ALU_CONST_B_25
+0x4D9C US_ALU_CONST_A_25
+0x4DA0 US_ALU_CONST_R_26
+0x4DA4 US_ALU_CONST_G_26
+0x4DA8 US_ALU_CONST_B_26
+0x4DAC US_ALU_CONST_A_26
+0x4DB0 US_ALU_CONST_R_27
+0x4DB4 US_ALU_CONST_G_27
+0x4DB8 US_ALU_CONST_B_27
+0x4DBC US_ALU_CONST_A_27
+0x4DC0 US_ALU_CONST_R_28
+0x4DC4 US_ALU_CONST_G_28
+0x4DC8 US_ALU_CONST_B_28
+0x4DCC US_ALU_CONST_A_28
+0x4DD0 US_ALU_CONST_R_29
+0x4DD4 US_ALU_CONST_G_29
+0x4DD8 US_ALU_CONST_B_29
+0x4DDC US_ALU_CONST_A_29
+0x4DE0 US_ALU_CONST_R_30
+0x4DE4 US_ALU_CONST_G_30
+0x4DE8 US_ALU_CONST_B_30
+0x4DEC US_ALU_CONST_A_30
+0x4DF0 US_ALU_CONST_R_31
+0x4DF4 US_ALU_CONST_G_31
+0x4DF8 US_ALU_CONST_B_31
+0x4DFC US_ALU_CONST_A_31
+0x4E04 RB3D_BLENDCNTL_R3
+0x4E08 RB3D_ABLENDCNTL_R3
+0x4E0C RB3D_COLOR_CHANNEL_MASK
+0x4E10 RB3D_CONSTANT_COLOR
+0x4E14 RB3D_COLOR_CLEAR_VALUE
+0x4E18 RB3D_ROPCNTL_R3
+0x4E1C RB3D_CLRCMP_FLIPE_R3
+0x4E20 RB3D_CLRCMP_CLR_R3
+0x4E24 RB3D_CLRCMP_MSK_R3
+0x4E48 RB3D_DEBUG_CTL
+0x4E4C RB3D_DSTCACHE_CTLSTAT_R3
+0x4E50 RB3D_DITHER_CTL
+0x4E54 RB3D_CMASK_OFFSET0
+0x4E58 RB3D_CMASK_OFFSET1
+0x4E5C RB3D_CMASK_OFFSET2
+0x4E60 RB3D_CMASK_OFFSET3
+0x4E64 RB3D_CMASK_PITCH0
+0x4E68 RB3D_CMASK_PITCH1
+0x4E6C RB3D_CMASK_PITCH2
+0x4E70 RB3D_CMASK_PITCH3
+0x4E74 RB3D_CMASK_WRINDEX
+0x4E78 RB3D_CMASK_DWORD
+0x4E7C RB3D_CMASK_RDINDEX
+0x4E80 RB3D_AARESOLVE_OFFSET
+0x4E84 RB3D_AARESOLVE_PITCH
+0x4E88 RB3D_AARESOLVE_CTL
+0x4EA0 RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD
+0x4EA4 RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD
+0x4F04 ZB_ZSTENCILCNTL
+0x4F08 ZB_STENCILREFMASK
+0x4F14 ZB_ZTOP
+0x4F18 ZB_ZCACHE_CTLSTAT
+0x4F1C ZB_BW_CNTL
+0x4F28 ZB_DEPTHCLEARVALUE
+0x4F30 ZB_ZMASK_OFFSET
+0x4F34 ZB_ZMASK_PITCH
+0x4F38 ZB_ZMASK_WRINDEX
+0x4F3C ZB_ZMASK_DWORD
+0x4F40 ZB_ZMASK_RDINDEX
+0x4F44 ZB_HIZ_OFFSET
+0x4F48 ZB_HIZ_WRINDEX
+0x4F4C ZB_HIZ_DWORD
+0x4F50 ZB_HIZ_RDINDEX
+0x4F54 ZB_HIZ_PITCH
+0x4F58 ZB_ZPASS_DATA
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rs600 b/drivers/gpu/drm/radeon/reg_srcs/rs600
index 8e3c0b807add..6801b865d1c4 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/rs600
+++ b/drivers/gpu/drm/radeon/reg_srcs/rs600
@@ -153,7 +153,7 @@ rs600 0x6d40
 0x42A4 SU_POLY_OFFSET_FRONT_SCALE
 0x42A8 SU_POLY_OFFSET_FRONT_OFFSET
 0x42AC SU_POLY_OFFSET_BACK_SCALE
-0x42B0 SU_POLY_OFFSET_BACK_OFFSET 
+0x42B0 SU_POLY_OFFSET_BACK_OFFSET
 0x42B4 SU_POLY_OFFSET_ENABLE
 0x42B8 SU_CULL_MODE
 0x42C0 SU_DEPTH_SCALE
@@ -291,6 +291,8 @@ rs600 0x6d40
 0x46AC US_OUT_FMT_2
 0x46B0 US_OUT_FMT_3
 0x46B4 US_W_FMT
+0x46B8 US_CODE_BANK
+0x46BC US_CODE_EXT
 0x46C0 US_ALU_RGB_ADDR_0
 0x46C4 US_ALU_RGB_ADDR_1
 0x46C8 US_ALU_RGB_ADDR_2
@@ -547,6 +549,70 @@ rs600 0x6d40
 0x4AB4 US_ALU_ALPHA_INST_61
 0x4AB8 US_ALU_ALPHA_INST_62
 0x4ABC US_ALU_ALPHA_INST_63
+0x4AC0 US_ALU_EXT_ADDR_0
+0x4AC4 US_ALU_EXT_ADDR_1
+0x4AC8 US_ALU_EXT_ADDR_2
+0x4ACC US_ALU_EXT_ADDR_3
+0x4AD0 US_ALU_EXT_ADDR_4
+0x4AD4 US_ALU_EXT_ADDR_5
+0x4AD8 US_ALU_EXT_ADDR_6
+0x4ADC US_ALU_EXT_ADDR_7
+0x4AE0 US_ALU_EXT_ADDR_8
+0x4AE4 US_ALU_EXT_ADDR_9
+0x4AE8 US_ALU_EXT_ADDR_10
+0x4AEC US_ALU_EXT_ADDR_11
+0x4AF0 US_ALU_EXT_ADDR_12
+0x4AF4 US_ALU_EXT_ADDR_13
+0x4AF8 US_ALU_EXT_ADDR_14
+0x4AFC US_ALU_EXT_ADDR_15
+0x4B00 US_ALU_EXT_ADDR_16
+0x4B04 US_ALU_EXT_ADDR_17
+0x4B08 US_ALU_EXT_ADDR_18
+0x4B0C US_ALU_EXT_ADDR_19
+0x4B10 US_ALU_EXT_ADDR_20
+0x4B14 US_ALU_EXT_ADDR_21
+0x4B18 US_ALU_EXT_ADDR_22
+0x4B1C US_ALU_EXT_ADDR_23
+0x4B20 US_ALU_EXT_ADDR_24
+0x4B24 US_ALU_EXT_ADDR_25
+0x4B28 US_ALU_EXT_ADDR_26
+0x4B2C US_ALU_EXT_ADDR_27
+0x4B30 US_ALU_EXT_ADDR_28
+0x4B34 US_ALU_EXT_ADDR_29
+0x4B38 US_ALU_EXT_ADDR_30
+0x4B3C US_ALU_EXT_ADDR_31
+0x4B40 US_ALU_EXT_ADDR_32
+0x4B44 US_ALU_EXT_ADDR_33
+0x4B48 US_ALU_EXT_ADDR_34
+0x4B4C US_ALU_EXT_ADDR_35
+0x4B50 US_ALU_EXT_ADDR_36
+0x4B54 US_ALU_EXT_ADDR_37
+0x4B58 US_ALU_EXT_ADDR_38
+0x4B5C US_ALU_EXT_ADDR_39
+0x4B60 US_ALU_EXT_ADDR_40
+0x4B64 US_ALU_EXT_ADDR_41
+0x4B68 US_ALU_EXT_ADDR_42
+0x4B6C US_ALU_EXT_ADDR_43
+0x4B70 US_ALU_EXT_ADDR_44
+0x4B74 US_ALU_EXT_ADDR_45
+0x4B78 US_ALU_EXT_ADDR_46
+0x4B7C US_ALU_EXT_ADDR_47
+0x4B80 US_ALU_EXT_ADDR_48
+0x4B84 US_ALU_EXT_ADDR_49
+0x4B88 US_ALU_EXT_ADDR_50
+0x4B8C US_ALU_EXT_ADDR_51
+0x4B90 US_ALU_EXT_ADDR_52
+0x4B94 US_ALU_EXT_ADDR_53
+0x4B98 US_ALU_EXT_ADDR_54
+0x4B9C US_ALU_EXT_ADDR_55
+0x4BA0 US_ALU_EXT_ADDR_56
+0x4BA4 US_ALU_EXT_ADDR_57
+0x4BA8 US_ALU_EXT_ADDR_58
+0x4BAC US_ALU_EXT_ADDR_59
+0x4BB0 US_ALU_EXT_ADDR_60
+0x4BB4 US_ALU_EXT_ADDR_61
+0x4BB8 US_ALU_EXT_ADDR_62
+0x4BBC US_ALU_EXT_ADDR_63
 0x4BC0 FG_FOG_BLEND
 0x4BC4 FG_FOG_FACTOR
 0x4BC8 FG_FOG_COLOR_R
diff --git a/drivers/gpu/drm/radeon/reg_srcs/rv515 b/drivers/gpu/drm/radeon/reg_srcs/rv515
index 0102a0d5735c..38abf63bf2cd 100644
--- a/drivers/gpu/drm/radeon/reg_srcs/rv515
+++ b/drivers/gpu/drm/radeon/reg_srcs/rv515
@@ -161,7 +161,12 @@ rv515 0x6d40
 0x401C GB_SELECT
 0x4020 GB_AA_CONFIG
 0x4024 GB_FIFO_SIZE
+0x4028 GB_Z_PEQ_CONFIG
 0x4100 TX_INVALTAGS
+0x4114 SU_TEX_WRAP_PS3
+0x4118 PS3_ENABLE
+0x411c PS3_VTX_FMT
+0x4120 PS3_TEX_SOURCE
 0x4200 GA_POINT_S0
 0x4204 GA_POINT_T0
 0x4208 GA_POINT_S1
@@ -171,6 +176,7 @@ rv515 0x6d40
 0x4230 GA_POINT_MINMAX
 0x4234 GA_LINE_CNTL
 0x4238 GA_LINE_STIPPLE_CONFIG
+0x4258 GA_COLOR_CONTROL_PS3
 0x4260 GA_LINE_STIPPLE_VALUE
 0x4264 GA_LINE_S0
 0x4268 GA_LINE_S1
diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c
index 368415df5f3a..9f5418983e2a 100644
--- a/drivers/gpu/drm/radeon/rs400.c
+++ b/drivers/gpu/drm/radeon/rs400.c
@@ -356,6 +356,7 @@ static int rs400_mc_init(struct radeon_device *rdev)
         rdev->mc.vram_location = G_00015C_MC_FB_START(tmp) << 16;
         rdev->mc.gtt_location = 0xFFFFFFFFUL;
         r = radeon_mc_setup(rdev);
+        rdev->mc.igp_sideport_enabled = radeon_combios_sideport_present(rdev);
         if (r)
                 return r;
         return 0;
@@ -395,6 +396,7 @@ static int rs400_startup(struct radeon_device *rdev)
                 return r;
         /* Enable IRQ */
         r100_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
         /* 1M ring buffer */
         r = r100_cp_init(rdev, 1024 * 1024);
         if (r) {
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index 4f8ea4260572..d5255751e7b3 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -56,6 +56,7 @@ int rs600_mc_init(struct radeon_device *rdev)
         rdev->mc.vram_location = G_000004_MC_FB_START(tmp) << 16;
         rdev->mc.gtt_location = 0xffffffffUL;
         r = radeon_mc_setup(rdev);
+        rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
         if (r)
                 return r;
         return 0;
@@ -134,7 +135,8 @@ void rs600_hpd_init(struct radeon_device *rdev)
                         break;
                 }
         }
-        rs600_irq_set(rdev);
+        if (rdev->irq.installed)
+                rs600_irq_set(rdev);
 }
 
 void rs600_hpd_fini(struct radeon_device *rdev)
@@ -315,6 +317,11 @@ int rs600_irq_set(struct radeon_device *rdev)
         u32 hpd2 = RREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL) &
                 ~S_007D18_DC_HOT_PLUG_DETECT2_INT_EN(1);
 
+        if (!rdev->irq.installed) {
+                WARN(1, "Can't enable IRQ/MSI because no handler is installed.\n");
+                WREG32(R_000040_GEN_INT_CNTL, 0);
+                return -EINVAL;
+        }
         if (rdev->irq.sw_int) {
                 tmp |= S_000040_SW_INT_EN(1);
         }
@@ -396,7 +403,7 @@ int rs600_irq_process(struct radeon_device *rdev)
         }
         while (status || r500_disp_int) {
                 /* SW interrupt */
-                if (G_000040_SW_INT_EN(status))
+                if (G_000044_SW_INT(status))
                         radeon_fence_process(rdev);
                 /* Vertical blank interrupts */
                 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(r500_disp_int))
@@ -553,6 +560,7 @@ static int rs600_startup(struct radeon_device *rdev)
                 return r;
         /* Enable IRQ */
         rs600_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
         /* 1M ring buffer */
         r = r100_cp_init(rdev, 1024 * 1024);
         if (r) {
diff --git a/drivers/gpu/drm/radeon/rs690.c b/drivers/gpu/drm/radeon/rs690.c
index 1e22f52d6039..cd31da913771 100644
--- a/drivers/gpu/drm/radeon/rs690.c
+++ b/drivers/gpu/drm/radeon/rs690.c
@@ -172,6 +172,7 @@ static int rs690_mc_init(struct radeon_device *rdev)
         rdev->mc.vram_location = G_000100_MC_FB_START(tmp) << 16;
         rdev->mc.gtt_location = 0xFFFFFFFFUL;
         r = radeon_mc_setup(rdev);
+        rdev->mc.igp_sideport_enabled = radeon_atombios_sideport_present(rdev);
         if (r)
                 return r;
         return 0;
@@ -625,6 +626,7 @@ static int rs690_startup(struct radeon_device *rdev)
                 return r;
         /* Enable IRQ */
         rs600_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
         /* 1M ring buffer */
         r = r100_cp_init(rdev, 1024 * 1024);
         if (r) {
diff --git a/drivers/gpu/drm/radeon/rv515.c b/drivers/gpu/drm/radeon/rv515.c
index 59632a506b46..62756717b044 100644
--- a/drivers/gpu/drm/radeon/rv515.c
+++ b/drivers/gpu/drm/radeon/rv515.c
@@ -479,6 +479,7 @@ static int rv515_startup(struct radeon_device *rdev)
         }
         /* Enable IRQ */
         rs600_irq_set(rdev);
+        rdev->config.r300.hdp_cntl = RREG32(RADEON_HOST_PATH_CNTL);
         /* 1M ring buffer */
         r = r100_cp_init(rdev, 1024 * 1024);
         if (r) {
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 3bcb66e52786..59c71245fb91 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1096,8 +1096,7 @@ void rv770_fini(struct radeon_device *rdev)
         radeon_gem_fini(rdev);
         radeon_fence_driver_fini(rdev);
         radeon_clocks_fini(rdev);
-        if (rdev->flags & RADEON_IS_AGP)
-                radeon_agp_fini(rdev);
+        radeon_agp_fini(rdev);
         radeon_bo_fini(rdev);
         radeon_atombios_fini(rdev);
         kfree(rdev->bios);
diff --git a/drivers/hid/hid-apple.c b/drivers/hid/hid-apple.c
index 4b96e7a898cf..5b4d66dc1a05 100644
--- a/drivers/hid/hid-apple.c
+++ b/drivers/hid/hid-apple.c
@@ -431,6 +431,13 @@ static const struct hid_device_id apple_devices[] = {
                 .driver_data = APPLE_HAS_FN | APPLE_ISO_KEYBOARD },
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS),
                 .driver_data = APPLE_HAS_FN | APPLE_RDESC_JIS },
+        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI),
+                .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
+        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO),
+                .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN |
+                        APPLE_ISO_KEYBOARD },
+        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS),
+                .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY),
                 .driver_data = APPLE_NUMLOCK_EMULATION | APPLE_HAS_FN },
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY),
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index 80792d38d25c..eabe5f87c6c1 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1285,6 +1285,9 @@ static const struct hid_device_id hid_blacklist[] = {
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI) },
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_ISO) },
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_WELLSPRING3_JIS) },
+        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI) },
+        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO) },
+        { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS) },
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY) },
         { HID_USB_DEVICE(USB_VENDOR_ID_APPLE, USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY) },
         { HID_USB_DEVICE(USB_VENDOR_ID_BELKIN, USB_DEVICE_ID_FLIP_KVM) },
@@ -1553,6 +1556,7 @@ static const struct hid_device_id hid_ignore_list[] = {
         { HID_USB_DEVICE(USB_VENDOR_ID_DELORME, USB_DEVICE_ID_DELORME_EARTHMATE) },
         { HID_USB_DEVICE(USB_VENDOR_ID_DELORME, USB_DEVICE_ID_DELORME_EM_LT20) },
         { HID_USB_DEVICE(USB_VENDOR_ID_ESSENTIAL_REALITY, USB_DEVICE_ID_ESSENTIAL_REALITY_P5) },
+        { HID_USB_DEVICE(USB_VENDOR_ID_ETT, USB_DEVICE_ID_TC5UH) },
         { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0001) },
         { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0002) },
         { HID_USB_DEVICE(USB_VENDOR_ID_GENERAL_TOUCH, 0x0003) },
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 3839340e293a..010368e649ed 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -88,6 +88,9 @@
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_ANSI    0x0236
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_ISO     0x0237
 #define USB_DEVICE_ID_APPLE_WELLSPRING3_JIS     0x0238
+#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ANSI  0x0239
+#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_ISO   0x023a
+#define USB_DEVICE_ID_APPLE_ALU_WIRELESS_2009_JIS   0x023b
 #define USB_DEVICE_ID_APPLE_FOUNTAIN_TP_ONLY    0x030a
 #define USB_DEVICE_ID_APPLE_GEYSER1_TP_ONLY     0x030b
 #define USB_DEVICE_ID_APPLE_ATV_IRCONTROL       0x8241
@@ -166,6 +169,9 @@
 #define USB_VENDOR_ID_ESSENTIAL_REALITY 0x0d7f
 #define USB_DEVICE_ID_ESSENTIAL_REALITY_P5 0x0100
 
+#define USB_VENDOR_ID_ETT               0x0664
+#define USB_DEVICE_ID_TC5UH             0x0309
+
 #define USB_VENDOR_ID_EZKEY             0x0518
 #define USB_DEVICE_ID_BTC_8193          0x0002
 
diff --git a/drivers/hid/hid-samsung.c b/drivers/hid/hid-samsung.c
index 5b222eed0692..510dd1340597 100644
--- a/drivers/hid/hid-samsung.c
+++ b/drivers/hid/hid-samsung.c
@@ -39,7 +39,17 @@
  *
  * 3. 135 byte report descriptor
  * Report #4 has an array field with logical range 0..17 instead of 1..14.
+ *
+ * 4. 171 byte report descriptor
+ * Report #3 has an array field with logical range 0..1 instead of 1..3.
  */
+static inline void samsung_dev_trace(struct hid_device *hdev,
+                unsigned int rsize)
+{
+        dev_info(&hdev->dev, "fixing up Samsung IrDA %d byte report "
+                        "descriptor\n", rsize);
+}
+
 static void samsung_report_fixup(struct hid_device *hdev, __u8 *rdesc,
                 unsigned int rsize)
 {
@@ -47,8 +57,7 @@ static void samsung_report_fixup(struct hid_device *hdev, __u8 *rdesc,
                         rdesc[177] == 0x75 && rdesc[178] == 0x30 &&
                         rdesc[179] == 0x95 && rdesc[180] == 0x01 &&
                         rdesc[182] == 0x40) {
-                dev_info(&hdev->dev, "fixing up Samsung IrDA %d byte report "
-                                "descriptor\n", 184);
+                samsung_dev_trace(hdev, 184);
                 rdesc[176] = 0xff;
                 rdesc[178] = 0x08;
                 rdesc[180] = 0x06;
@@ -56,17 +65,21 @@ static void samsung_report_fixup(struct hid_device *hdev, __u8 *rdesc,
         } else
         if (rsize == 203 && rdesc[192] == 0x15 && rdesc[193] == 0x0 &&
                         rdesc[194] == 0x25 && rdesc[195] == 0x12) {
-                dev_info(&hdev->dev, "fixing up Samsung IrDA %d byte report "
-                                "descriptor\n", 203);
+                samsung_dev_trace(hdev, 203);
                 rdesc[193] = 0x1;
                 rdesc[195] = 0xf;
         } else
         if (rsize == 135 && rdesc[124] == 0x15 && rdesc[125] == 0x0 &&
                         rdesc[126] == 0x25 && rdesc[127] == 0x11) {
-                dev_info(&hdev->dev, "fixing up Samsung IrDA %d byte report "
-                                "descriptor\n", 135);
+                samsung_dev_trace(hdev, 135);
                 rdesc[125] = 0x1;
                 rdesc[127] = 0xe;
+        } else
+        if (rsize == 171 && rdesc[160] == 0x15 && rdesc[161] == 0x0 &&
+                        rdesc[162] == 0x25 && rdesc[163] == 0x01) {
+                samsung_dev_trace(hdev, 171);
+                rdesc[161] = 0x1;
+                rdesc[163] = 0x3;
         }
 }
 
diff --git a/drivers/hid/hid-wacom.c b/drivers/hid/hid-wacom.c
index 747542172242..12dcda529201 100644
--- a/drivers/hid/hid-wacom.c
+++ b/drivers/hid/hid-wacom.c
@@ -142,6 +142,7 @@ static int wacom_raw_event(struct hid_device *hdev, struct hid_report *report,
                 wdata->butstate = rw;
                 input_report_key(input, BTN_0, rw & 0x02);
                 input_report_key(input, BTN_1, rw & 0x01);
+                input_report_key(input, BTN_TOOL_FINGER, 0xf0);
                 input_event(input, EV_MSC, MSC_SERIAL, 0xf0);
                 input_sync(input);
         }
@@ -196,6 +197,9 @@ static int wacom_probe(struct hid_device *hdev,
         /* Pad */
         input->evbit[0] |= BIT(EV_MSC);
         input->mscbit[0] |= BIT(MSC_SERIAL);
+        set_bit(BTN_0, input->keybit);
+        set_bit(BTN_1, input->keybit);
+        set_bit(BTN_TOOL_FINGER, input->keybit);
 
         /* Distance, rubber and mouse */
         input->absbit[0] |= BIT(ABS_DISTANCE);
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
index 46c3c566307e..68cf87749a42 100644
--- a/drivers/hwmon/Kconfig
+++ b/drivers/hwmon/Kconfig
@@ -392,7 +392,7 @@ config SENSORS_GL520SM
 
 config SENSORS_CORETEMP
         tristate "Intel Core/Core2/Atom temperature sensor"
-        depends on X86 && EXPERIMENTAL
+        depends on X86 && PCI && EXPERIMENTAL
         help
           If you say yes here you get support for the temperature
           sensor inside your CPU. Most of the family 6 CPUs
@@ -792,6 +792,16 @@ config SENSORS_ADS7828
           This driver can also be built as a module.  If so, the module
           will be called ads7828.
 
+config SENSORS_AMC6821
+        tristate "Texas Instruments AMC6821"
+        depends on I2C  && EXPERIMENTAL
+        help
+          If you say yes here you get support for the Texas Instruments
+          AMC6821 hardware monitoring chips.
+
+          This driver can also be build as a module.  If so, the module
+          will be called amc6821.
+
 config SENSORS_THMC50
         tristate "Texas Instruments THMC50 / Analog Devices ADM1022"
         depends on I2C && EXPERIMENTAL
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
index 450c8e894277..4bc215c0953f 100644
--- a/drivers/hwmon/Makefile
+++ b/drivers/hwmon/Makefile
@@ -86,6 +86,7 @@ obj-$(CONFIG_SENSORS_SIS5595)	+= sis5595.o
 obj-$(CONFIG_SENSORS_SMSC47B397)+= smsc47b397.o
 obj-$(CONFIG_SENSORS_SMSC47M1)  += smsc47m1.o
 obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o
+obj-$(CONFIG_SENSORS_AMC6821)   += amc6821.o
 obj-$(CONFIG_SENSORS_THMC50)    += thmc50.o
 obj-$(CONFIG_SENSORS_TMP401)    += tmp401.o
 obj-$(CONFIG_SENSORS_TMP421)    += tmp421.o
diff --git a/drivers/hwmon/adt7462.c b/drivers/hwmon/adt7462.c
index a1a7ef14b519..a31e77c776ae 100644
--- a/drivers/hwmon/adt7462.c
+++ b/drivers/hwmon/adt7462.c
@@ -94,7 +94,7 @@ static const unsigned short normal_i2c[] = { 0x58, 0x5C, I2C_CLIENT_END };
 #define         ADT7462_PIN24_SHIFT             6
 #define         ADT7462_PIN26_VOLT_INPUT        0x08
 #define         ADT7462_PIN25_VOLT_INPUT        0x20
-#define         ADT7462_PIN28_SHIFT             6       /* cfg3 */
+#define         ADT7462_PIN28_SHIFT             4       /* cfg3 */
 #define         ADT7462_PIN28_VOLT              0x5
 
 #define ADT7462_REG_ALARM1                      0xB8
diff --git a/drivers/hwmon/amc6821.c b/drivers/hwmon/amc6821.c
new file mode 100644
index 000000000000..1c89d922d619
--- /dev/null
+++ b/drivers/hwmon/amc6821.c
@@ -0,0 +1,1116 @@
+/*
+        amc6821.c - Part of lm_sensors, Linux kernel modules for hardware
+        monitoring
+        Copyright (C) 2009 T. Mertelj <tomaz.mertelj@guest.arnes.si>
+
+        Based on max6650.c:
+        Copyright (C) 2007 Hans J. Koch <hjk@linutronix.de>
+
+        This program is free software; you can redistribute it and/or modify
+        it under the terms of the GNU General Public License as published by
+        the Free Software Foundation; either version 2 of the License, or
+        (at your option) any later version.
+
+        This program is distributed in the hope that it will be useful,
+        but WITHOUT ANY WARRANTY; without even the implied warranty of
+        MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+        GNU General Public License for more details.
+
+        You should have received a copy of the GNU General Public License
+        along with this program; if not, write to the Free Software
+        Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+*/
+
+
+#include <linux/kernel.h>       /* Needed for KERN_INFO */
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/jiffies.h>
+#include <linux/i2c.h>
+#include <linux/hwmon.h>
+#include <linux/hwmon-sysfs.h>
+#include <linux/err.h>
+#include <linux/mutex.h>
+
+
+/*
+ * Addresses to scan.
+ */
+
+static const unsigned short normal_i2c[] = {0x18, 0x19, 0x1a, 0x2c, 0x2d, 0x2e,
+        0x4c, 0x4d, 0x4e, I2C_CLIENT_END};
+
+
+
+/*
+ * Insmod parameters
+ */
+
+static int pwminv = 0;  /*Inverted PWM output. */
+module_param(pwminv, int, S_IRUGO);
+
+static int init = 1; /*Power-on initialization.*/
+module_param(init, int, S_IRUGO);
+
+
+enum chips { amc6821 };
+
+#define AMC6821_REG_DEV_ID 0x3D
+#define AMC6821_REG_COMP_ID 0x3E
+#define AMC6821_REG_CONF1 0x00
+#define AMC6821_REG_CONF2 0x01
+#define AMC6821_REG_CONF3 0x3F
+#define AMC6821_REG_CONF4 0x04
+#define AMC6821_REG_STAT1 0x02
+#define AMC6821_REG_STAT2 0x03
+#define AMC6821_REG_TDATA_LOW 0x08
+#define AMC6821_REG_TDATA_HI 0x09
+#define AMC6821_REG_LTEMP_HI 0x0A
+#define AMC6821_REG_RTEMP_HI 0x0B
+#define AMC6821_REG_LTEMP_LIMIT_MIN 0x15
+#define AMC6821_REG_LTEMP_LIMIT_MAX 0x14
+#define AMC6821_REG_RTEMP_LIMIT_MIN 0x19
+#define AMC6821_REG_RTEMP_LIMIT_MAX 0x18
+#define AMC6821_REG_LTEMP_CRIT 0x1B
+#define AMC6821_REG_RTEMP_CRIT 0x1D
+#define AMC6821_REG_PSV_TEMP 0x1C
+#define AMC6821_REG_DCY 0x22
+#define AMC6821_REG_LTEMP_FAN_CTRL 0x24
+#define AMC6821_REG_RTEMP_FAN_CTRL 0x25
+#define AMC6821_REG_DCY_LOW_TEMP 0x21
+
+#define AMC6821_REG_TACH_LLIMITL 0x10
+#define AMC6821_REG_TACH_LLIMITH 0x11
+#define AMC6821_REG_TACH_HLIMITL 0x12
+#define AMC6821_REG_TACH_HLIMITH 0x13
+
+#define AMC6821_CONF1_START 0x01
+#define AMC6821_CONF1_FAN_INT_EN 0x02
+#define AMC6821_CONF1_FANIE 0x04
+#define AMC6821_CONF1_PWMINV 0x08
+#define AMC6821_CONF1_FAN_FAULT_EN 0x10
+#define AMC6821_CONF1_FDRC0 0x20
+#define AMC6821_CONF1_FDRC1 0x40
+#define AMC6821_CONF1_THERMOVIE 0x80
+
+#define AMC6821_CONF2_PWM_EN 0x01
+#define AMC6821_CONF2_TACH_MODE 0x02
+#define AMC6821_CONF2_TACH_EN 0x04
+#define AMC6821_CONF2_RTFIE 0x08
+#define AMC6821_CONF2_LTOIE 0x10
+#define AMC6821_CONF2_RTOIE 0x20
+#define AMC6821_CONF2_PSVIE 0x40
+#define AMC6821_CONF2_RST 0x80
+
+#define AMC6821_CONF3_THERM_FAN_EN 0x80
+#define AMC6821_CONF3_REV_MASK 0x0F
+
+#define AMC6821_CONF4_OVREN 0x10
+#define AMC6821_CONF4_TACH_FAST 0x20
+#define AMC6821_CONF4_PSPR 0x40
+#define AMC6821_CONF4_MODE 0x80
+
+#define AMC6821_STAT1_RPM_ALARM 0x01
+#define AMC6821_STAT1_FANS 0x02
+#define AMC6821_STAT1_RTH 0x04
+#define AMC6821_STAT1_RTL 0x08
+#define AMC6821_STAT1_R_THERM 0x10
+#define AMC6821_STAT1_RTF 0x20
+#define AMC6821_STAT1_LTH 0x40
+#define AMC6821_STAT1_LTL 0x80
+
+#define AMC6821_STAT2_RTC 0x08
+#define AMC6821_STAT2_LTC 0x10
+#define AMC6821_STAT2_LPSV 0x20
+#define AMC6821_STAT2_L_THERM 0x40
+#define AMC6821_STAT2_THERM_IN 0x80
+
+enum {IDX_TEMP1_INPUT = 0, IDX_TEMP1_MIN, IDX_TEMP1_MAX,
+        IDX_TEMP1_CRIT, IDX_TEMP2_INPUT, IDX_TEMP2_MIN,
+        IDX_TEMP2_MAX, IDX_TEMP2_CRIT,
+        TEMP_IDX_LEN, };
+
+static const u8 temp_reg[] = {AMC6821_REG_LTEMP_HI,
+                        AMC6821_REG_LTEMP_LIMIT_MIN,
+                        AMC6821_REG_LTEMP_LIMIT_MAX,
+                        AMC6821_REG_LTEMP_CRIT,
+                        AMC6821_REG_RTEMP_HI,
+                        AMC6821_REG_RTEMP_LIMIT_MIN,
+                        AMC6821_REG_RTEMP_LIMIT_MAX,
+                        AMC6821_REG_RTEMP_CRIT, };
+
+enum {IDX_FAN1_INPUT = 0, IDX_FAN1_MIN, IDX_FAN1_MAX,
+        FAN1_IDX_LEN, };
+
+static const u8 fan_reg_low[] = {AMC6821_REG_TDATA_LOW,
+                        AMC6821_REG_TACH_LLIMITL,
+                        AMC6821_REG_TACH_HLIMITL, };
+
+
+static const u8 fan_reg_hi[] = {AMC6821_REG_TDATA_HI,
+                        AMC6821_REG_TACH_LLIMITH,
+                        AMC6821_REG_TACH_HLIMITH, };
+
+static int amc6821_probe(
+                struct i2c_client *client,
+                const struct i2c_device_id *id);
+static int amc6821_detect(
+                struct i2c_client *client,
+                struct i2c_board_info *info);
+static int amc6821_init_client(struct i2c_client *client);
+static int amc6821_remove(struct i2c_client *client);
+static struct amc6821_data *amc6821_update_device(struct device *dev);
+
+/*
+ * Driver data (common to all clients)
+ */
+
+static const struct i2c_device_id amc6821_id[] = {
+        { "amc6821", amc6821 },
+        { }
+};
+
+MODULE_DEVICE_TABLE(i2c, amc6821_id);
+
+static struct i2c_driver amc6821_driver = {
+        .class = I2C_CLASS_HWMON,
+        .driver = {
+                .name   = "amc6821",
+        },
+        .probe = amc6821_probe,
+        .remove = amc6821_remove,
+        .id_table = amc6821_id,
+        .detect = amc6821_detect,
+        .address_list = normal_i2c,
+};
+
+
+/*
+ * Client data (each client gets its own)
+  */
+
+struct amc6821_data {
+        struct device *hwmon_dev;
+        struct mutex update_lock;
+        char valid; /* zero until following fields are valid */
+        unsigned long last_updated; /* in jiffies */
+
+        /* register values */
+        int temp[TEMP_IDX_LEN];
+
+        u16 fan[FAN1_IDX_LEN];
+        u8 fan1_div;
+
+        u8 pwm1;
+        u8 temp1_auto_point_temp[3];
+        u8 temp2_auto_point_temp[3];
+        u8 pwm1_auto_point_pwm[3];
+        u8 pwm1_enable;
+        u8 pwm1_auto_channels_temp;
+
+        u8 stat1;
+        u8 stat2;
+};
+
+
+static ssize_t get_temp(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        int ix = to_sensor_dev_attr(devattr)->index;
+
+        return sprintf(buf, "%d\n", data->temp[ix] * 1000);
+}
+
+
+
+static ssize_t set_temp(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        int ix = to_sensor_dev_attr(attr)->index;
+        long val;
+
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+        val = SENSORS_LIMIT(val / 1000, -128, 127);
+
+        mutex_lock(&data->update_lock);
+        data->temp[ix] = val;
+        if (i2c_smbus_write_byte_data(client, temp_reg[ix], data->temp[ix])) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                count = -EIO;
+        }
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+
+
+
+
+static ssize_t get_temp_alarm(
+        struct device *dev,
+        struct device_attribute *devattr,
+        char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        int ix = to_sensor_dev_attr(devattr)->index;
+        u8 flag;
+
+        switch (ix) {
+        case IDX_TEMP1_MIN:
+                flag = data->stat1 & AMC6821_STAT1_LTL;
+                break;
+        case IDX_TEMP1_MAX:
+                flag = data->stat1 & AMC6821_STAT1_LTH;
+                break;
+        case IDX_TEMP1_CRIT:
+                flag = data->stat2 & AMC6821_STAT2_LTC;
+                break;
+        case IDX_TEMP2_MIN:
+                flag = data->stat1 & AMC6821_STAT1_RTL;
+                break;
+        case IDX_TEMP2_MAX:
+                flag = data->stat1 & AMC6821_STAT1_RTH;
+                break;
+        case IDX_TEMP2_CRIT:
+                flag = data->stat2 & AMC6821_STAT2_RTC;
+                break;
+        default:
+                dev_dbg(dev, "Unknown attr->index (%d).\n", ix);
+                return -EINVAL;
+        }
+        if (flag)
+                return sprintf(buf, "1");
+        else
+                return sprintf(buf, "0");
+}
+
+
+
+
+static ssize_t get_temp2_fault(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        if (data->stat1 & AMC6821_STAT1_RTF)
+                return sprintf(buf, "1");
+        else
+                return sprintf(buf, "0");
+}
+
+static ssize_t get_pwm1(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm1);
+}
+
+static ssize_t set_pwm1(
+                struct device *dev,
+                struct device_attribute *devattr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        long val;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+
+        mutex_lock(&data->update_lock);
+        data->pwm1 = SENSORS_LIMIT(val , 0, 255);
+        i2c_smbus_write_byte_data(client, AMC6821_REG_DCY, data->pwm1);
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+
+static ssize_t get_pwm1_enable(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm1_enable);
+}
+
+static ssize_t set_pwm1_enable(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        long val;
+        int config = strict_strtol(buf, 10, &val);
+        if (config)
+                return config;
+
+        config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
+        if (config < 0) {
+                        dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                        return -EIO;
+        }
+
+        switch (val) {
+        case 1:
+                config &= ~AMC6821_CONF1_FDRC0;
+                config &= ~AMC6821_CONF1_FDRC1;
+                break;
+        case 2:
+                config &= ~AMC6821_CONF1_FDRC0;
+                config |= AMC6821_CONF1_FDRC1;
+                break;
+        case 3:
+                config |= AMC6821_CONF1_FDRC0;
+                config |= AMC6821_CONF1_FDRC1;
+                break;
+        default:
+                return -EINVAL;
+        }
+        mutex_lock(&data->update_lock);
+        if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF1, config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        count = -EIO;
+        }
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+
+
+static ssize_t get_pwm1_auto_channels_temp(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm1_auto_channels_temp);
+}
+
+
+static ssize_t get_temp_auto_point_temp(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        int ix = to_sensor_dev_attr_2(devattr)->index;
+        int nr = to_sensor_dev_attr_2(devattr)->nr;
+        struct amc6821_data *data = amc6821_update_device(dev);
+        switch (nr) {
+        case 1:
+                return sprintf(buf, "%d\n",
+                        data->temp1_auto_point_temp[ix] * 1000);
+                break;
+        case 2:
+                return sprintf(buf, "%d\n",
+                        data->temp2_auto_point_temp[ix] * 1000);
+                break;
+        default:
+                dev_dbg(dev, "Unknown attr->nr (%d).\n", nr);
+                return -EINVAL;
+        }
+}
+
+
+static ssize_t get_pwm1_auto_point_pwm(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        int ix = to_sensor_dev_attr(devattr)->index;
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->pwm1_auto_point_pwm[ix]);
+}
+
+
+static inline ssize_t set_slope_register(struct i2c_client *client,
+                u8 reg,
+                u8 dpwm,
+                u8 *ptemp)
+{
+        int dt;
+        u8 tmp;
+
+        dt = ptemp[2]-ptemp[1];
+        for (tmp = 4; tmp > 0; tmp--) {
+                if (dt * (0x20 >> tmp) >= dpwm)
+                        break;
+        }
+        tmp |= (ptemp[1] & 0x7C) << 1;
+        if (i2c_smbus_write_byte_data(client,
+                        reg, tmp)) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                return -EIO;
+        }
+        return 0;
+}
+
+
+
+static ssize_t set_temp_auto_point_temp(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = amc6821_update_device(dev);
+        int ix = to_sensor_dev_attr_2(attr)->index;
+        int nr = to_sensor_dev_attr_2(attr)->nr;
+        u8 *ptemp;
+        u8 reg;
+        int dpwm;
+        long val;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+
+        switch (nr) {
+        case 1:
+                ptemp = data->temp1_auto_point_temp;
+                reg = AMC6821_REG_LTEMP_FAN_CTRL;
+                break;
+        case 2:
+                ptemp = data->temp2_auto_point_temp;
+                reg = AMC6821_REG_RTEMP_FAN_CTRL;
+                break;
+        default:
+                dev_dbg(dev, "Unknown attr->nr (%d).\n", nr);
+                return -EINVAL;
+        }
+
+        data->valid = 0;
+        mutex_lock(&data->update_lock);
+        switch (ix) {
+        case 0:
+                ptemp[0] = SENSORS_LIMIT(val / 1000, 0,
+                                data->temp1_auto_point_temp[1]);
+                ptemp[0] = SENSORS_LIMIT(ptemp[0], 0,
+                                data->temp2_auto_point_temp[1]);
+                ptemp[0] = SENSORS_LIMIT(ptemp[0], 0, 63);
+                if (i2c_smbus_write_byte_data(
+                                        client,
+                                        AMC6821_REG_PSV_TEMP,
+                                        ptemp[0])) {
+                                dev_err(&client->dev,
+                                        "Register write error, aborting.\n");
+                                count = -EIO;
+                }
+                goto EXIT;
+                break;
+        case 1:
+                ptemp[1] = SENSORS_LIMIT(
+                                        val / 1000,
+                                        (ptemp[0] & 0x7C) + 4,
+                                        124);
+                ptemp[1] &= 0x7C;
+                ptemp[2] = SENSORS_LIMIT(
+                                        ptemp[2], ptemp[1] + 1,
+                                        255);
+                break;
+        case 2:
+                ptemp[2] = SENSORS_LIMIT(
+                                        val / 1000,
+                                        ptemp[1]+1,
+                                        255);
+                break;
+        default:
+                dev_dbg(dev, "Unknown attr->index (%d).\n", ix);
+                count = -EINVAL;
+                goto EXIT;
+        }
+        dpwm = data->pwm1_auto_point_pwm[2] - data->pwm1_auto_point_pwm[1];
+        if (set_slope_register(client, reg, dpwm, ptemp))
+                count = -EIO;
+
+EXIT:
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+
+
+
+static ssize_t set_pwm1_auto_point_pwm(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf,
+                size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        int dpwm;
+        long val;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+
+        mutex_lock(&data->update_lock);
+        data->pwm1_auto_point_pwm[1] = SENSORS_LIMIT(val, 0, 254);
+        if (i2c_smbus_write_byte_data(client, AMC6821_REG_DCY_LOW_TEMP,
+                        data->pwm1_auto_point_pwm[1])) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                count = -EIO;
+                goto EXIT;
+        }
+        dpwm = data->pwm1_auto_point_pwm[2] - data->pwm1_auto_point_pwm[1];
+        if (set_slope_register(client, AMC6821_REG_LTEMP_FAN_CTRL, dpwm,
+                        data->temp1_auto_point_temp)) {
+                count = -EIO;
+                goto EXIT;
+        }
+        if (set_slope_register(client, AMC6821_REG_RTEMP_FAN_CTRL, dpwm,
+                        data->temp2_auto_point_temp)) {
+                count = -EIO;
+                goto EXIT;
+        }
+
+EXIT:
+        data->valid = 0;
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+
+static ssize_t get_fan(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        int ix = to_sensor_dev_attr(devattr)->index;
+        if (0 == data->fan[ix])
+                return sprintf(buf, "0");
+        return sprintf(buf, "%d\n", (int)(6000000 / data->fan[ix]));
+}
+
+
+
+static ssize_t get_fan1_fault(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        if (data->stat1 & AMC6821_STAT1_FANS)
+                return sprintf(buf, "1");
+        else
+                return sprintf(buf, "0");
+}
+
+
+
+static ssize_t set_fan(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf, size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        long val;
+        int ix = to_sensor_dev_attr(attr)->index;
+        int ret = strict_strtol(buf, 10, &val);
+        if (ret)
+                return ret;
+        val = 1 > val ? 0xFFFF : 6000000/val;
+
+        mutex_lock(&data->update_lock);
+        data->fan[ix] = (u16) SENSORS_LIMIT(val, 1, 0xFFFF);
+        if (i2c_smbus_write_byte_data(client, fan_reg_low[ix],
+                        data->fan[ix] & 0xFF)) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                count = -EIO;
+                goto EXIT;
+        }
+        if (i2c_smbus_write_byte_data(client,
+                        fan_reg_hi[ix], data->fan[ix] >> 8)) {
+                dev_err(&client->dev, "Register write error, aborting.\n");
+                count = -EIO;
+        }
+EXIT:
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+
+
+
+static ssize_t get_fan1_div(
+                struct device *dev,
+                struct device_attribute *devattr,
+                char *buf)
+{
+        struct amc6821_data *data = amc6821_update_device(dev);
+        return sprintf(buf, "%d\n", data->fan1_div);
+}
+
+static ssize_t set_fan1_div(
+                struct device *dev,
+                struct device_attribute *attr,
+                const char *buf, size_t count)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        long val;
+        int config = strict_strtol(buf, 10, &val);
+        if (config)
+                return config;
+
+        config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF4);
+        if (config < 0) {
+                dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                return -EIO;
+        }
+        mutex_lock(&data->update_lock);
+        switch (val) {
+        case 2:
+                config &= ~AMC6821_CONF4_PSPR;
+                data->fan1_div = 2;
+                break;
+        case 4:
+                config |= AMC6821_CONF4_PSPR;
+                data->fan1_div = 4;
+                break;
+        default:
+                mutex_unlock(&data->update_lock);
+                count = -EINVAL;
+                goto EXIT;
+        }
+        if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF4, config)) {
+                dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                count = -EIO;
+        }
+EXIT:
+        mutex_unlock(&data->update_lock);
+        return count;
+}
+
+
+
+static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO,
+        get_temp, NULL, IDX_TEMP1_INPUT);
+static SENSOR_DEVICE_ATTR(temp1_min, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP1_MIN);
+static SENSOR_DEVICE_ATTR(temp1_max, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP1_MAX);
+static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP1_CRIT);
+static SENSOR_DEVICE_ATTR(temp1_min_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP1_MIN);
+static SENSOR_DEVICE_ATTR(temp1_max_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP1_MAX);
+static SENSOR_DEVICE_ATTR(temp1_crit_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP1_CRIT);
+static SENSOR_DEVICE_ATTR(temp2_input, S_IRUGO | S_IWUSR,
+        get_temp, NULL, IDX_TEMP2_INPUT);
+static SENSOR_DEVICE_ATTR(temp2_min, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP2_MIN);
+static SENSOR_DEVICE_ATTR(temp2_max, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP2_MAX);
+static SENSOR_DEVICE_ATTR(temp2_crit, S_IRUGO | S_IWUSR, get_temp,
+        set_temp, IDX_TEMP2_CRIT);
+static SENSOR_DEVICE_ATTR(temp2_fault, S_IRUGO,
+        get_temp2_fault, NULL, 0);
+static SENSOR_DEVICE_ATTR(temp2_min_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP2_MIN);
+static SENSOR_DEVICE_ATTR(temp2_max_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP2_MAX);
+static SENSOR_DEVICE_ATTR(temp2_crit_alarm, S_IRUGO,
+        get_temp_alarm, NULL, IDX_TEMP2_CRIT);
+static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, get_fan, NULL, IDX_FAN1_INPUT);
+static SENSOR_DEVICE_ATTR(fan1_min, S_IRUGO | S_IWUSR,
+        get_fan, set_fan, IDX_FAN1_MIN);
+static SENSOR_DEVICE_ATTR(fan1_max, S_IRUGO | S_IWUSR,
+        get_fan, set_fan, IDX_FAN1_MAX);
+static SENSOR_DEVICE_ATTR(fan1_fault, S_IRUGO, get_fan1_fault, NULL, 0);
+static SENSOR_DEVICE_ATTR(fan1_div, S_IRUGO | S_IWUSR,
+        get_fan1_div, set_fan1_div, 0);
+
+static SENSOR_DEVICE_ATTR(pwm1, S_IWUSR | S_IRUGO, get_pwm1, set_pwm1, 0);
+static SENSOR_DEVICE_ATTR(pwm1_enable, S_IWUSR | S_IRUGO,
+        get_pwm1_enable, set_pwm1_enable, 0);
+static SENSOR_DEVICE_ATTR(pwm1_auto_point1_pwm, S_IRUGO,
+        get_pwm1_auto_point_pwm, NULL, 0);
+static SENSOR_DEVICE_ATTR(pwm1_auto_point2_pwm, S_IWUSR | S_IRUGO,
+        get_pwm1_auto_point_pwm, set_pwm1_auto_point_pwm, 1);
+static SENSOR_DEVICE_ATTR(pwm1_auto_point3_pwm, S_IRUGO,
+        get_pwm1_auto_point_pwm, NULL, 2);
+static SENSOR_DEVICE_ATTR(pwm1_auto_channels_temp, S_IRUGO,
+        get_pwm1_auto_channels_temp, NULL, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_auto_point1_temp, S_IRUGO,
+        get_temp_auto_point_temp, NULL, 1, 0);
+static SENSOR_DEVICE_ATTR_2(temp1_auto_point2_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 1, 1);
+static SENSOR_DEVICE_ATTR_2(temp1_auto_point3_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 1, 2);
+
+static SENSOR_DEVICE_ATTR_2(temp2_auto_point1_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 0);
+static SENSOR_DEVICE_ATTR_2(temp2_auto_point2_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 1);
+static SENSOR_DEVICE_ATTR_2(temp2_auto_point3_temp, S_IWUSR | S_IRUGO,
+        get_temp_auto_point_temp, set_temp_auto_point_temp, 2, 2);
+
+
+
+static struct attribute *amc6821_attrs[] = {
+        &sensor_dev_attr_temp1_input.dev_attr.attr,
+        &sensor_dev_attr_temp1_min.dev_attr.attr,
+        &sensor_dev_attr_temp1_max.dev_attr.attr,
+        &sensor_dev_attr_temp1_crit.dev_attr.attr,
+        &sensor_dev_attr_temp1_min_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp1_max_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp1_crit_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp2_input.dev_attr.attr,
+        &sensor_dev_attr_temp2_min.dev_attr.attr,
+        &sensor_dev_attr_temp2_max.dev_attr.attr,
+        &sensor_dev_attr_temp2_crit.dev_attr.attr,
+        &sensor_dev_attr_temp2_min_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp2_max_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp2_crit_alarm.dev_attr.attr,
+        &sensor_dev_attr_temp2_fault.dev_attr.attr,
+        &sensor_dev_attr_fan1_input.dev_attr.attr,
+        &sensor_dev_attr_fan1_min.dev_attr.attr,
+        &sensor_dev_attr_fan1_max.dev_attr.attr,
+        &sensor_dev_attr_fan1_fault.dev_attr.attr,
+        &sensor_dev_attr_fan1_div.dev_attr.attr,
+        &sensor_dev_attr_pwm1.dev_attr.attr,
+        &sensor_dev_attr_pwm1_enable.dev_attr.attr,
+        &sensor_dev_attr_pwm1_auto_channels_temp.dev_attr.attr,
+        &sensor_dev_attr_pwm1_auto_point1_pwm.dev_attr.attr,
+        &sensor_dev_attr_pwm1_auto_point2_pwm.dev_attr.attr,
+        &sensor_dev_attr_pwm1_auto_point3_pwm.dev_attr.attr,
+        &sensor_dev_attr_temp1_auto_point1_temp.dev_attr.attr,
+        &sensor_dev_attr_temp1_auto_point2_temp.dev_attr.attr,
+        &sensor_dev_attr_temp1_auto_point3_temp.dev_attr.attr,
+        &sensor_dev_attr_temp2_auto_point1_temp.dev_attr.attr,
+        &sensor_dev_attr_temp2_auto_point2_temp.dev_attr.attr,
+        &sensor_dev_attr_temp2_auto_point3_temp.dev_attr.attr,
+        NULL
+};
+
+static struct attribute_group amc6821_attr_grp = {
+        .attrs = amc6821_attrs,
+};
+
+
+
+/* Return 0 if detection is successful, -ENODEV otherwise */
+static int amc6821_detect(
+                struct i2c_client *client,
+                struct i2c_board_info *info)
+{
+        struct i2c_adapter *adapter = client->adapter;
+        int address = client->addr;
+        int dev_id, comp_id;
+
+        dev_dbg(&adapter->dev, "amc6821_detect called.\n");
+
+        if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
+                dev_dbg(&adapter->dev,
+                        "amc6821: I2C bus doesn't support byte mode, "
+                        "skipping.\n");
+                return -ENODEV;
+        }
+
+        dev_id = i2c_smbus_read_byte_data(client, AMC6821_REG_DEV_ID);
+        comp_id = i2c_smbus_read_byte_data(client, AMC6821_REG_COMP_ID);
+        if (dev_id != 0x21 || comp_id != 0x49) {
+                dev_dbg(&adapter->dev,
+                        "amc6821: detection failed at 0x%02x.\n",
+                        address);
+                return -ENODEV;
+        }
+
+        /* Bit 7 of the address register is ignored, so we can check the
+           ID registers again */
+        dev_id = i2c_smbus_read_byte_data(client, 0x80 | AMC6821_REG_DEV_ID);
+        comp_id = i2c_smbus_read_byte_data(client, 0x80 | AMC6821_REG_COMP_ID);
+        if (dev_id != 0x21 || comp_id != 0x49) {
+                dev_dbg(&adapter->dev,
+                        "amc6821: detection failed at 0x%02x.\n",
+                        address);
+                return -ENODEV;
+        }
+
+        dev_info(&adapter->dev, "amc6821: chip found at 0x%02x.\n", address);
+        strlcpy(info->type, "amc6821", I2C_NAME_SIZE);
+
+        return 0;
+}
+
+static int amc6821_probe(
+        struct i2c_client *client,
+        const struct i2c_device_id *id)
+{
+        struct amc6821_data *data;
+        int err;
+
+        data = kzalloc(sizeof(struct amc6821_data), GFP_KERNEL);
+        if (!data) {
+                dev_err(&client->dev, "out of memory.\n");
+                return -ENOMEM;
+        }
+
+
+        i2c_set_clientdata(client, data);
+        mutex_init(&data->update_lock);
+
+        /*
+         * Initialize the amc6821 chip
+         */
+        err = amc6821_init_client(client);
+        if (err)
+                goto err_free;
+
+        err = sysfs_create_group(&client->dev.kobj, &amc6821_attr_grp);
+        if (err)
+                goto err_free;
+
+        data->hwmon_dev = hwmon_device_register(&client->dev);
+        if (!IS_ERR(data->hwmon_dev))
+                return 0;
+
+        err = PTR_ERR(data->hwmon_dev);
+        dev_err(&client->dev, "error registering hwmon device.\n");
+        sysfs_remove_group(&client->dev.kobj, &amc6821_attr_grp);
+err_free:
+        kfree(data);
+        return err;
+}
+
+static int amc6821_remove(struct i2c_client *client)
+{
+        struct amc6821_data *data = i2c_get_clientdata(client);
+
+        hwmon_device_unregister(data->hwmon_dev);
+        sysfs_remove_group(&client->dev.kobj, &amc6821_attr_grp);
+
+        kfree(data);
+
+        return 0;
+}
+
+
+static int amc6821_init_client(struct i2c_client *client)
+{
+        int config;
+        int err = -EIO;
+
+        if (init) {
+                config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF4);
+
+                if (config < 0) {
+                                dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                                return err;
+                }
+
+                config |= AMC6821_CONF4_MODE;
+
+                if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF4,
+                                config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        return err;
+                }
+
+                config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF3);
+
+                if (config < 0) {
+                        dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                        return err;
+                }
+
+                dev_info(&client->dev, "Revision %d\n", config & 0x0f);
+
+                config &= ~AMC6821_CONF3_THERM_FAN_EN;
+
+                if (i2c_smbus_write_byte_data(client, AMC6821_REG_CONF3,
+                                config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        return err;
+                }
+
+                config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF2);
+
+                if (config < 0) {
+                        dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                        return err;
+                }
+
+                config &= ~AMC6821_CONF2_RTFIE;
+                config &= ~AMC6821_CONF2_LTOIE;
+                config &= ~AMC6821_CONF2_RTOIE;
+                if (i2c_smbus_write_byte_data(client,
+                                AMC6821_REG_CONF2, config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        return err;
+                }
+
+                config = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
+
+                if (config < 0) {
+                        dev_err(&client->dev,
+                        "Error reading configuration register, aborting.\n");
+                        return err;
+                }
+
+                config &= ~AMC6821_CONF1_THERMOVIE;
+                config &= ~AMC6821_CONF1_FANIE;
+                config |= AMC6821_CONF1_START;
+                if (pwminv)
+                        config |= AMC6821_CONF1_PWMINV;
+                else
+                        config &= ~AMC6821_CONF1_PWMINV;
+
+                if (i2c_smbus_write_byte_data(
+                                client, AMC6821_REG_CONF1, config)) {
+                        dev_err(&client->dev,
+                        "Configuration register write error, aborting.\n");
+                        return err;
+                }
+        }
+        return 0;
+}
+
+
+static struct amc6821_data *amc6821_update_device(struct device *dev)
+{
+        struct i2c_client *client = to_i2c_client(dev);
+        struct amc6821_data *data = i2c_get_clientdata(client);
+        int timeout = HZ;
+        u8 reg;
+        int i;
+
+        mutex_lock(&data->update_lock);
+
+        if (time_after(jiffies, data->last_updated + timeout) ||
+                        !data->valid) {
+
+                for (i = 0; i < TEMP_IDX_LEN; i++)
+                        data->temp[i] = i2c_smbus_read_byte_data(client,
+                                temp_reg[i]);
+
+                data->stat1 = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_STAT1);
+                data->stat2 = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_STAT2);
+
+                data->pwm1 = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_DCY);
+                for (i = 0; i < FAN1_IDX_LEN; i++) {
+                        data->fan[i] = i2c_smbus_read_byte_data(
+                                        client,
+                                        fan_reg_low[i]);
+                        data->fan[i] += i2c_smbus_read_byte_data(
+                                        client,
+                                        fan_reg_hi[i]) << 8;
+                }
+                data->fan1_div = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_CONF4);
+                data->fan1_div = data->fan1_div & AMC6821_CONF4_PSPR ? 4 : 2;
+
+                data->pwm1_auto_point_pwm[0] = 0;
+                data->pwm1_auto_point_pwm[2] = 255;
+                data->pwm1_auto_point_pwm[1] = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_DCY_LOW_TEMP);
+
+                data->temp1_auto_point_temp[0] =
+                        i2c_smbus_read_byte_data(client,
+                                        AMC6821_REG_PSV_TEMP);
+                data->temp2_auto_point_temp[0] =
+                                data->temp1_auto_point_temp[0];
+                reg = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_LTEMP_FAN_CTRL);
+                data->temp1_auto_point_temp[1] = (reg & 0xF8) >> 1;
+                reg &= 0x07;
+                reg = 0x20 >> reg;
+                if (reg > 0)
+                        data->temp1_auto_point_temp[2] =
+                                data->temp1_auto_point_temp[1] +
+                                (data->pwm1_auto_point_pwm[2] -
+                                data->pwm1_auto_point_pwm[1]) / reg;
+                else
+                        data->temp1_auto_point_temp[2] = 255;
+
+                reg = i2c_smbus_read_byte_data(client,
+                        AMC6821_REG_RTEMP_FAN_CTRL);
+                data->temp2_auto_point_temp[1] = (reg & 0xF8) >> 1;
+                reg &= 0x07;
+                reg = 0x20 >> reg;
+                if (reg > 0)
+                        data->temp2_auto_point_temp[2] =
+                                data->temp2_auto_point_temp[1] +
+                                (data->pwm1_auto_point_pwm[2] -
+                                data->pwm1_auto_point_pwm[1]) / reg;
+                else
+                        data->temp2_auto_point_temp[2] = 255;
+
+                reg = i2c_smbus_read_byte_data(client, AMC6821_REG_CONF1);
+                reg = (reg >> 5) & 0x3;
+                switch (reg) {
+                case 0: /*open loop: software sets pwm1*/
+                        data->pwm1_auto_channels_temp = 0;
+                        data->pwm1_enable = 1;
+                        break;
+                case 2: /*closed loop: remote T (temp2)*/
+                        data->pwm1_auto_channels_temp = 2;
+                        data->pwm1_enable = 2;
+                        break;
+                case 3: /*closed loop: local and remote T (temp2)*/
+                        data->pwm1_auto_channels_temp = 3;
+                        data->pwm1_enable = 3;
+                        break;
+                case 1: /*semi-open loop: software sets rpm, chip controls pwm1,
+                          *currently not implemented
+                          */
+                        data->pwm1_auto_channels_temp = 0;
+                        data->pwm1_enable = 0;
+                        break;
+                }
+
+                data->last_updated = jiffies;
+                data->valid = 1;
+        }
+        mutex_unlock(&data->update_lock);
+        return data;
+}
+
+
+static int __init amc6821_init(void)
+{
+        return i2c_add_driver(&amc6821_driver);
+}
+
+static void __exit amc6821_exit(void)
+{
+        i2c_del_driver(&amc6821_driver);
+}
+
+module_init(amc6821_init);
+module_exit(amc6821_exit);
+
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("T. Mertelj <tomaz.mertelj@guest.arnes.si>");
+MODULE_DESCRIPTION("Texas Instruments amc6821 hwmon driver");
diff --git a/drivers/hwmon/asus_atk0110.c b/drivers/hwmon/asus_atk0110.c
index 5a3ee00c0e7d..6811346c1c62 100644
--- a/drivers/hwmon/asus_atk0110.c
+++ b/drivers/hwmon/asus_atk0110.c
@@ -5,6 +5,7 @@
  * See COPYING in the top level directory of the kernel tree.
  */
 
+#include <linux/debugfs.h>
 #include <linux/kernel.h>
 #include <linux/hwmon.h>
 #include <linux/list.h>
@@ -101,6 +102,11 @@ struct atk_data {
         int temperature_count;
         int fan_count;
         struct list_head sensor_list;
+
+        struct {
+                struct dentry *root;
+                u32 id;
+        } debugfs;
 };
 
 
@@ -624,6 +630,187 @@ static int atk_read_value(struct atk_sensor_data *sensor, u64 *value)
         return err;
 }
 
+#ifdef CONFIG_DEBUG_FS
+static int atk_debugfs_gitm_get(void *p, u64 *val)
+{
+        struct atk_data *data = p;
+        union acpi_object *ret;
+        struct atk_acpi_ret_buffer *buf;
+        int err = 0;
+
+        if (!data->read_handle)
+                return -ENODEV;
+
+        if (!data->debugfs.id)
+                return -EINVAL;
+
+        ret = atk_gitm(data, data->debugfs.id);
+        if (IS_ERR(ret))
+                return PTR_ERR(ret);
+
+        buf = (struct atk_acpi_ret_buffer *)ret->buffer.pointer;
+        if (buf->flags)
+                *val = buf->value;
+        else
+                err = -EIO;
+
+        return err;
+}
+
+DEFINE_SIMPLE_ATTRIBUTE(atk_debugfs_gitm,
+                        atk_debugfs_gitm_get,
+                        NULL,
+                        "0x%08llx\n")
+
+static int atk_acpi_print(char *buf, size_t sz, union acpi_object *obj)
+{
+        int ret = 0;
+
+        switch (obj->type) {
+        case ACPI_TYPE_INTEGER:
+                ret = snprintf(buf, sz, "0x%08llx\n", obj->integer.value);
+                break;
+        case ACPI_TYPE_STRING:
+                ret = snprintf(buf, sz, "%s\n", obj->string.pointer);
+                break;
+        }
+
+        return ret;
+}
+
+static void atk_pack_print(char *buf, size_t sz, union acpi_object *pack)
+{
+        int ret;
+        int i;
+
+        for (i = 0; i < pack->package.count; i++) {
+                union acpi_object *obj = &pack->package.elements[i];
+
+                ret = atk_acpi_print(buf, sz, obj);
+                if (ret >= sz)
+                        break;
+                buf += ret;
+                sz -= ret;
+        }
+}
+
+static int atk_debugfs_ggrp_open(struct inode *inode, struct file *file)
+{
+        struct atk_data *data = inode->i_private;
+        char *buf = NULL;
+        union acpi_object *ret;
+        u8 cls;
+        int i;
+
+        if (!data->enumerate_handle)
+                return -ENODEV;
+        if (!data->debugfs.id)
+                return -EINVAL;
+
+        cls = (data->debugfs.id & 0xff000000) >> 24;
+        ret = atk_ggrp(data, cls);
+        if (IS_ERR(ret))
+                return PTR_ERR(ret);
+
+        for (i = 0; i < ret->package.count; i++) {
+                union acpi_object *pack = &ret->package.elements[i];
+                union acpi_object *id;
+
+                if (pack->type != ACPI_TYPE_PACKAGE)
+                        continue;
+                if (!pack->package.count)
+                        continue;
+                id = &pack->package.elements[0];
+                if (id->integer.value == data->debugfs.id) {
+                        /* Print the package */
+                        buf = kzalloc(512, GFP_KERNEL);
+                        if (!buf) {
+                                ACPI_FREE(ret);
+                                return -ENOMEM;
+                        }
+                        atk_pack_print(buf, 512, pack);
+                        break;
+                }
+        }
+        ACPI_FREE(ret);
+
+        if (!buf)
+                return -EINVAL;
+
+        file->private_data = buf;
+
+        return nonseekable_open(inode, file);
+}
+
+static ssize_t atk_debugfs_ggrp_read(struct file *file, char __user *buf,
+                size_t count, loff_t *pos)
+{
+        char *str = file->private_data;
+        size_t len = strlen(str);
+
+        return simple_read_from_buffer(buf, count, pos, str, len);
+}
+
+static int atk_debugfs_ggrp_release(struct inode *inode, struct file *file)
+{
+        kfree(file->private_data);
+        return 0;
+}
+
+static const struct file_operations atk_debugfs_ggrp_fops = {
+        .read           = atk_debugfs_ggrp_read,
+        .open           = atk_debugfs_ggrp_open,
+        .release        = atk_debugfs_ggrp_release,
+};
+
+static void atk_debugfs_init(struct atk_data *data)
+{
+        struct dentry *d;
+        struct dentry *f;
+
+        data->debugfs.id = 0;
+
+        d = debugfs_create_dir("asus_atk0110", NULL);
+        if (!d || IS_ERR(d))
+                return;
+
+        f = debugfs_create_x32("id", S_IRUSR | S_IWUSR, d, &data->debugfs.id);
+        if (!f || IS_ERR(f))
+                goto cleanup;
+
+        f = debugfs_create_file("gitm", S_IRUSR, d, data,
+                        &atk_debugfs_gitm);
+        if (!f || IS_ERR(f))
+                goto cleanup;
+
+        f = debugfs_create_file("ggrp", S_IRUSR, d, data,
+                        &atk_debugfs_ggrp_fops);
+        if (!f || IS_ERR(f))
+                goto cleanup;
+
+        data->debugfs.root = d;
+
+        return;
+cleanup:
+        debugfs_remove_recursive(d);
+}
+
+static void atk_debugfs_cleanup(struct atk_data *data)
+{
+        debugfs_remove_recursive(data->debugfs.root);
+}
+
+#else /* CONFIG_DEBUG_FS */
+
+static void atk_debugfs_init(struct atk_data *data)
+{
+}
+
+static void atk_debugfs_cleanup(struct atk_data *data)
+{
+}
+#endif
+
 static int atk_add_sensor(struct atk_data *data, union acpi_object *obj)
 {
         struct device *dev = &data->acpi_dev->dev;
@@ -1047,76 +1234,75 @@ remove:
         return err;
 }
 
-static int atk_check_old_if(struct atk_data *data)
+static int atk_probe_if(struct atk_data *data)
 {
         struct device *dev = &data->acpi_dev->dev;
         acpi_handle ret;
         acpi_status status;
+        int err = 0;
 
         /* RTMP: read temperature */
         status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_TMP, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->rtmp_handle = ret;
+        else
                 dev_dbg(dev, "method " METHOD_OLD_READ_TMP " not found: %s\n",
                                 acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->rtmp_handle = ret;
 
         /* RVLT: read voltage */
         status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_VLT, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->rvlt_handle = ret;
+        else
                 dev_dbg(dev, "method " METHOD_OLD_READ_VLT " not found: %s\n",
                                 acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->rvlt_handle = ret;
 
         /* RFAN: read fan status */
         status = acpi_get_handle(data->atk_handle, METHOD_OLD_READ_FAN, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->rfan_handle = ret;
+        else
                 dev_dbg(dev, "method " METHOD_OLD_READ_FAN " not found: %s\n",
                                 acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->rfan_handle = ret;
-
-        return 0;
-}
-
-static int atk_check_new_if(struct atk_data *data)
-{
-        struct device *dev = &data->acpi_dev->dev;
-        acpi_handle ret;
-        acpi_status status;
 
         /* Enumeration */
         status = acpi_get_handle(data->atk_handle, METHOD_ENUMERATE, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->enumerate_handle = ret;
+        else
                 dev_dbg(dev, "method " METHOD_ENUMERATE " not found: %s\n",
                                 acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->enumerate_handle = ret;
 
         /* De-multiplexer (read) */
         status = acpi_get_handle(data->atk_handle, METHOD_READ, &ret);
-        if (status != AE_OK) {
+        if (ACPI_SUCCESS(status))
+                data->read_handle = ret;
+        else
                 dev_dbg(dev, "method " METHOD_READ " not found: %s\n",
                                 acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->read_handle = ret;
 
         /* De-multiplexer (write) */
         status = acpi_get_handle(data->atk_handle, METHOD_WRITE, &ret);
-        if (status != AE_OK) {
-                dev_dbg(dev, "method " METHOD_READ " not found: %s\n",
+        if (ACPI_SUCCESS(status))
+                data->write_handle = ret;
+        else
+                dev_dbg(dev, "method " METHOD_WRITE " not found: %s\n",
                                  acpi_format_exception(status));
-                return -ENODEV;
-        }
-        data->write_handle = ret;
 
-        return 0;
+        /* Check for hwmon methods: first check "old" style methods; note that
+         * both may be present: in this case we stick to the old interface;
+         * analysis of multiple DSDTs indicates that when both interfaces
+         * are present the new one (GGRP/GITM) is not functional.
+         */
+        if (data->rtmp_handle && data->rvlt_handle && data->rfan_handle)
+                data->old_interface = true;
+        else if (data->enumerate_handle && data->read_handle &&
+                        data->write_handle)
+                data->old_interface = false;
+        else
+                err = -ENODEV;
+
+        return err;
 }
 
 static int atk_add(struct acpi_device *device)
@@ -1155,28 +1341,19 @@ static int atk_add(struct acpi_device *device)
         }
         ACPI_FREE(buf.pointer);
 
-        /* Check for hwmon methods: first check "old" style methods; note that
-         * both may be present: in this case we stick to the old interface;
-         * analysis of multiple DSDTs indicates that when both interfaces
-         * are present the new one (GGRP/GITM) is not functional.
-         */
-        err = atk_check_old_if(data);
-        if (!err) {
-                dev_dbg(&device->dev, "Using old hwmon interface\n");
-                data->old_interface = true;
-        } else {
-                err = atk_check_new_if(data);
-                if (err)
-                        goto out;
-
-                dev_dbg(&device->dev, "Using new hwmon interface\n");
-                data->old_interface = false;
+        err = atk_probe_if(data);
+        if (err) {
+                dev_err(&device->dev, "No usable hwmon interface detected\n");
+                goto out;
         }
 
-        if (data->old_interface)
+        if (data->old_interface) {
+                dev_dbg(&device->dev, "Using old hwmon interface\n");
                 err = atk_enumerate_old_hwmon(data);
-        else
+        } else {
+                dev_dbg(&device->dev, "Using new hwmon interface\n");
                 err = atk_enumerate_new_hwmon(data);
+        }
         if (err < 0)
                 goto out;
         if (err == 0) {
@@ -1190,6 +1367,8 @@ static int atk_add(struct acpi_device *device)
         if (err)
                 goto cleanup;
 
+        atk_debugfs_init(data);
+
         device->driver_data = data;
         return 0;
 cleanup:
@@ -1208,6 +1387,8 @@ static int atk_remove(struct acpi_device *device, int type)
 
         device->driver_data = NULL;
 
+        atk_debugfs_cleanup(data);
+
         atk_remove_files(data);
         atk_free_sensors(data);
         hwmon_device_unregister(data->hwmon_dev);
diff --git a/drivers/hwmon/coretemp.c b/drivers/hwmon/coretemp.c
index caef39cda8c8..2d7bceeed0bc 100644
--- a/drivers/hwmon/coretemp.c
+++ b/drivers/hwmon/coretemp.c
@@ -33,6 +33,7 @@
 #include <linux/list.h>
 #include <linux/platform_device.h>
 #include <linux/cpu.h>
+#include <linux/pci.h>
 #include <asm/msr.h>
 #include <asm/processor.h>
 
@@ -161,6 +162,7 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
         int usemsr_ee = 1;
         int err;
         u32 eax, edx;
+        struct pci_dev *host_bridge;
 
         /* Early chips have no MSR for TjMax */
 
@@ -168,11 +170,21 @@ static int __devinit adjust_tjmax(struct cpuinfo_x86 *c, u32 id, struct device *
                 usemsr_ee = 0;
         }
 
-        /* Atoms seems to have TjMax at 90C */
+        /* Atom CPUs */
 
         if (c->x86_model == 0x1c) {
                 usemsr_ee = 0;
-                tjmax = 90000;
+
+                host_bridge = pci_get_bus_and_slot(0, PCI_DEVFN(0, 0));
+
+                if (host_bridge && host_bridge->vendor == PCI_VENDOR_ID_INTEL
+                    && (host_bridge->device == 0xa000   /* NM10 based nettop */
+                    || host_bridge->device == 0xa010))  /* NM10 based netbook */
+                        tjmax = 100000;
+                else
+                        tjmax = 90000;
+
+                pci_dev_put(host_bridge);
         }
 
         if ((c->x86_model > 0xe) && (usemsr_ee)) {
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c
index d8a26d16d948..099a2138cdf6 100644
--- a/drivers/hwmon/k10temp.c
+++ b/drivers/hwmon/k10temp.c
@@ -33,6 +33,16 @@ static bool force;
 module_param(force, bool, 0444);
 MODULE_PARM_DESC(force, "force loading on processors with erratum 319");
 
+/* CPUID function 0x80000001, ebx */
+#define CPUID_PKGTYPE_MASK      0xf0000000
+#define CPUID_PKGTYPE_F         0x00000000
+#define CPUID_PKGTYPE_AM2R2_AM3 0x10000000
+
+/* DRAM controller (PCI function 2) */
+#define REG_DCT0_CONFIG_HIGH            0x094
+#define  DDR3_MODE                      0x00000100
+
+/* miscellaneous (PCI function 3) */
 #define REG_HARDWARE_THERMAL_CONTROL    0x64
 #define  HTC_ENABLE                     0x00000001
 
@@ -85,13 +95,28 @@ static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0);
 static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1);
 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
 
-static bool __devinit has_erratum_319(void)
+static bool __devinit has_erratum_319(struct pci_dev *pdev)
 {
+        u32 pkg_type, reg_dram_cfg;
+
+        if (boot_cpu_data.x86 != 0x10)
+                return false;
+
         /*
-         * Erratum 319: The thermal sensor of older Family 10h processors
-         *              (B steppings) may be unreliable.
+         * Erratum 319: The thermal sensor of Socket F/AM2+ processors
+         *              may be unreliable.
          */
-        return boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model <= 2;
+        pkg_type = cpuid_ebx(0x80000001) & CPUID_PKGTYPE_MASK;
+        if (pkg_type == CPUID_PKGTYPE_F)
+                return true;
+        if (pkg_type != CPUID_PKGTYPE_AM2R2_AM3)
+                return false;
+
+        /* Differentiate between AM2+ (bad) and AM3 (good) */
+        pci_bus_read_config_dword(pdev->bus,
+                                  PCI_DEVFN(PCI_SLOT(pdev->devfn), 2),
+                                  REG_DCT0_CONFIG_HIGH, &reg_dram_cfg);
+        return !(reg_dram_cfg & DDR3_MODE);
 }
 
 static int __devinit k10temp_probe(struct pci_dev *pdev,
@@ -99,9 +124,10 @@ static int __devinit k10temp_probe(struct pci_dev *pdev,
 {
         struct device *hwmon_dev;
         u32 reg_caps, reg_htc;
+        int unreliable = has_erratum_319(pdev);
         int err;
 
-        if (has_erratum_319() && !force) {
+        if (unreliable && !force) {
                 dev_err(&pdev->dev,
                         "unreliable CPU thermal sensor; monitoring disabled\n");
                 err = -ENODEV;
@@ -139,7 +165,7 @@ static int __devinit k10temp_probe(struct pci_dev *pdev,
         }
         dev_set_drvdata(&pdev->dev, hwmon_dev);
 
-        if (has_erratum_319() && force)
+        if (unreliable && force)
                 dev_warn(&pdev->dev,
                          "unreliable CPU thermal sensor; check erratum 319\n");
         return 0;
@@ -169,7 +195,7 @@ static void __devexit k10temp_remove(struct pci_dev *pdev)
         dev_set_drvdata(&pdev->dev, NULL);
 }
 
-static struct pci_device_id k10temp_id_table[] = {
+static const struct pci_device_id k10temp_id_table[] = {
         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) },
         { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) },
         {}
diff --git a/drivers/hwmon/k8temp.c b/drivers/hwmon/k8temp.c
index 1fe995111841..0ceb6d6200a3 100644
--- a/drivers/hwmon/k8temp.c
+++ b/drivers/hwmon/k8temp.c
@@ -136,7 +136,7 @@ static SENSOR_DEVICE_ATTR_2(temp3_input, S_IRUGO, show_temp, NULL, 1, 0);
 static SENSOR_DEVICE_ATTR_2(temp4_input, S_IRUGO, show_temp, NULL, 1, 1);
 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
 
-static struct pci_device_id k8temp_ids[] = {
+static const struct pci_device_id k8temp_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_K8_NB_MISC) },
         { 0 },
 };
diff --git a/drivers/hwmon/sis5595.c b/drivers/hwmon/sis5595.c
index 12f2e7086560..79c2931e3008 100644
--- a/drivers/hwmon/sis5595.c
+++ b/drivers/hwmon/sis5595.c
@@ -697,7 +697,7 @@ static struct sis5595_data *sis5595_update_device(struct device *dev)
         return data;
 }
 
-static struct pci_device_id sis5595_pci_ids[] = {
+static const struct pci_device_id sis5595_pci_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_503) },
         { 0, }
 };
diff --git a/drivers/hwmon/via686a.c b/drivers/hwmon/via686a.c
index 39e82a492f26..f397ce7ad598 100644
--- a/drivers/hwmon/via686a.c
+++ b/drivers/hwmon/via686a.c
@@ -767,7 +767,7 @@ static struct via686a_data *via686a_update_device(struct device *dev)
         return data;
 }
 
-static struct pci_device_id via686a_pci_ids[] = {
+static const struct pci_device_id via686a_pci_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_82C686_4) },
         { 0, }
 };
diff --git a/drivers/hwmon/vt8231.c b/drivers/hwmon/vt8231.c
index 470a1226ba2b..d47b4c9949c2 100644
--- a/drivers/hwmon/vt8231.c
+++ b/drivers/hwmon/vt8231.c
@@ -697,7 +697,7 @@ static struct platform_driver vt8231_driver = {
         .remove = __devexit_p(vt8231_remove),
 };
 
-static struct pci_device_id vt8231_pci_ids[] = {
+static const struct pci_device_id vt8231_pci_ids[] = {
         { PCI_DEVICE(PCI_VENDOR_ID_VIA, PCI_DEVICE_ID_VIA_8231_4) },
         { 0, }
 };
diff --git a/drivers/infiniband/core/cma.c b/drivers/infiniband/core/cma.c
index fbdd73106000..cc9b5940fa97 100644
--- a/drivers/infiniband/core/cma.c
+++ b/drivers/infiniband/core/cma.c
@@ -2083,7 +2083,7 @@ static int cma_get_port(struct rdma_id_private *id_priv)
 static int cma_check_linklocal(struct rdma_dev_addr *dev_addr,
                                struct sockaddr *addr)
 {
-#if defined(CONFIG_IPv6) || defined(CONFIG_IPV6_MODULE)
+#if defined(CONFIG_IPV6) || defined(CONFIG_IPV6_MODULE)
         struct sockaddr_in6 *sin6;
 
         if (addr->sa_family != AF_INET6)
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c
index 989555cee883..2a97c964b9ef 100644
--- a/drivers/infiniband/hw/mlx4/qp.c
+++ b/drivers/infiniband/hw/mlx4/qp.c
@@ -1752,7 +1752,7 @@ int mlx4_ib_post_recv(struct ib_qp *ibqp, struct ib_recv_wr *wr,
         ind = qp->rq.head & (qp->rq.wqe_cnt - 1);
 
         for (nreq = 0; wr; ++nreq, wr = wr->next) {
-                if (mlx4_wq_overflow(&qp->rq, nreq, qp->ibqp.send_cq)) {
+                if (mlx4_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) {
                         err = -ENOMEM;
                         *bad_wr = wr;
                         goto out;
diff --git a/drivers/infiniband/hw/mlx4/srq.c b/drivers/infiniband/hw/mlx4/srq.c
index d42565258fb7..cf8085bcbd6d 100644
--- a/drivers/infiniband/hw/mlx4/srq.c
+++ b/drivers/infiniband/hw/mlx4/srq.c
@@ -74,6 +74,7 @@ struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
         struct mlx4_ib_dev *dev = to_mdev(pd->device);
         struct mlx4_ib_srq *srq;
         struct mlx4_wqe_srq_next_seg *next;
+        struct mlx4_wqe_data_seg *scatter;
         int desc_size;
         int buf_size;
         int err;
@@ -149,6 +150,11 @@ struct ib_srq *mlx4_ib_create_srq(struct ib_pd *pd,
                         next = get_wqe(srq, i);
                         next->next_wqe_index =
                                 cpu_to_be16((i + 1) & (srq->msrq.max - 1));
+
+                        for (scatter = (void *) (next + 1);
+                             (void *) scatter < (void *) next + desc_size;
+                             ++scatter)
+                                scatter->lkey = cpu_to_be32(MLX4_INVALID_LKEY);
                 }
 
                 err = mlx4_mtt_init(dev->dev, srq->buf.npages, srq->buf.page_shift,
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c
index a6624ad252c5..1a1420d7a828 100644
--- a/drivers/isdn/hardware/mISDN/hfcmulti.c
+++ b/drivers/isdn/hardware/mISDN/hfcmulti.c
@@ -3152,7 +3152,7 @@ static void
 hfcmulti_pcm(struct hfc_multi *hc, int ch, int slot_tx, int bank_tx,
     int slot_rx, int bank_rx)
 {
-        if (slot_rx < 0 || slot_rx < 0 || bank_tx < 0 || bank_rx < 0) {
+        if (slot_tx < 0 || slot_rx < 0 || bank_tx < 0 || bank_rx < 0) {
                 /* disable PCM */
                 mode_hfcmulti(hc, ch, hc->chan[ch].protocol, -1, 0, -1, 0);
                 return;
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c
index 85f0e8cd875b..1f552c6e7579 100644
--- a/drivers/mmc/card/block.c
+++ b/drivers/mmc/card/block.c
@@ -85,7 +85,14 @@ static void mmc_blk_put(struct mmc_blk_data *md)
         mutex_lock(&open_lock);
         md->usage--;
         if (md->usage == 0) {
+                int devmaj = MAJOR(disk_devt(md->disk));
                 int devidx = MINOR(disk_devt(md->disk)) >> MMC_SHIFT;
+
+                if (!devmaj)
+                        devidx = md->disk->first_minor >> MMC_SHIFT;
+
+                blk_cleanup_queue(md->queue.queue);
+
                 __clear_bit(devidx, dev_use);
 
                 put_disk(md->disk);
@@ -613,6 +620,7 @@ static int mmc_blk_probe(struct mmc_card *card)
         return 0;
 
  out:
+        mmc_cleanup_queue(&md->queue);
         mmc_blk_put(md);
 
         return err;
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c
index 49e582356c65..c5a7a855f4b1 100644
--- a/drivers/mmc/card/queue.c
+++ b/drivers/mmc/card/queue.c
@@ -90,9 +90,10 @@ static void mmc_request(struct request_queue *q)
         struct request *req;
 
         if (!mq) {
-                printk(KERN_ERR "MMC: killing requests for dead queue\n");
-                while ((req = blk_fetch_request(q)) != NULL)
+                while ((req = blk_fetch_request(q)) != NULL) {
+                        req->cmd_flags |= REQ_QUIET;
                         __blk_end_request_all(req, -EIO);
+                }
                 return;
         }
 
@@ -223,17 +224,18 @@ void mmc_cleanup_queue(struct mmc_queue *mq)
         struct request_queue *q = mq->queue;
         unsigned long flags;
 
-        /* Mark that we should start throwing out stragglers */
-        spin_lock_irqsave(q->queue_lock, flags);
-        q->queuedata = NULL;
-        spin_unlock_irqrestore(q->queue_lock, flags);
-
         /* Make sure the queue isn't suspended, as that will deadlock */
         mmc_queue_resume(mq);
 
         /* Then terminate our worker thread */
         kthread_stop(mq->thread);
 
+        /* Empty the queue */
+        spin_lock_irqsave(q->queue_lock, flags);
+        q->queuedata = NULL;
+        blk_start_queue(q);
+        spin_unlock_irqrestore(q->queue_lock, flags);
+
         if (mq->bounce_sg)
                 kfree(mq->bounce_sg);
         mq->bounce_sg = NULL;
@@ -245,8 +247,6 @@ void mmc_cleanup_queue(struct mmc_queue *mq)
                 kfree(mq->bounce_buf);
         mq->bounce_buf = NULL;
 
-        blk_cleanup_queue(mq->queue);
-
         mq->card = NULL;
 }
 EXPORT_SYMBOL(mmc_cleanup_queue);
diff --git a/drivers/mmc/core/mmc.c b/drivers/mmc/core/mmc.c
index c11189446a1f..0eac6c814904 100644
--- a/drivers/mmc/core/mmc.c
+++ b/drivers/mmc/core/mmc.c
@@ -207,7 +207,7 @@ static int mmc_read_ext_csd(struct mmc_card *card)
         }
 
         card->ext_csd.rev = ext_csd[EXT_CSD_REV];
-        if (card->ext_csd.rev > 3) {
+        if (card->ext_csd.rev > 5) {
                 printk(KERN_ERR "%s: unrecognised EXT_CSD structure "
                         "version %d\n", mmc_hostname(card->host),
                         card->ext_csd.rev);
diff --git a/drivers/net/arm/Kconfig b/drivers/net/arm/Kconfig
index c37ee9e6b67b..39e1c0d39476 100644
--- a/drivers/net/arm/Kconfig
+++ b/drivers/net/arm/Kconfig
@@ -68,6 +68,7 @@ config W90P910_ETH
         tristate "Nuvoton w90p910 Ethernet support"
         depends on ARM && ARCH_W90X900
         select PHYLIB
+        select MII
         help
           Say Y here if you want to use built-in Ethernet ports
           on w90p910 processor.
diff --git a/drivers/net/atarilance.c b/drivers/net/atarilance.c
index c5721cb38265..cc9ed8643910 100644
--- a/drivers/net/atarilance.c
+++ b/drivers/net/atarilance.c
@@ -663,7 +663,7 @@ static int lance_open( struct net_device *dev )
         while (--i > 0)
                 if (DREG & CSR0_IDON)
                         break;
-        if (i < 0 || (DREG & CSR0_ERR)) {
+        if (i <= 0 || (DREG & CSR0_ERR)) {
                 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
                                           dev->name, i, DREG ));
                 DREG = CSR0_STOP;
diff --git a/drivers/net/atlx/atl2.c b/drivers/net/atlx/atl2.c
index c0451d75cdcf..ec52529394ad 100644
--- a/drivers/net/atlx/atl2.c
+++ b/drivers/net/atlx/atl2.c
@@ -1959,12 +1959,15 @@ static int atl2_get_eeprom(struct net_device *netdev,
                 return -ENOMEM;
 
         for (i = first_dword; i < last_dword; i++) {
-                if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword])))
-                        return -EIO;
+                if (!atl2_read_eeprom(hw, i*4, &(eeprom_buff[i-first_dword]))) {
+                        ret_val = -EIO;
+                        goto free;
+                }
         }
 
         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 3),
                 eeprom->len);
+free:
         kfree(eeprom_buff);
 
         return ret_val;
diff --git a/drivers/net/can/mcp251x.c b/drivers/net/can/mcp251x.c
index 9c5a1537939c..1a72ca066a17 100644
--- a/drivers/net/can/mcp251x.c
+++ b/drivers/net/can/mcp251x.c
@@ -990,7 +990,7 @@ static int __devinit mcp251x_can_probe(struct spi_device *spi)
                         goto error_tx_buf;
                 }
                 priv->spi_rx_buf = kmalloc(SPI_TRANSFER_BUF_LEN, GFP_KERNEL);
-                if (!priv->spi_tx_buf) {
+                if (!priv->spi_rx_buf) {
                         ret = -ENOMEM;
                         goto error_rx_buf;
                 }
diff --git a/drivers/net/cs89x0.c b/drivers/net/cs89x0.c
index af9321617ce4..0e79cef95c0a 100644
--- a/drivers/net/cs89x0.c
+++ b/drivers/net/cs89x0.c
@@ -1325,8 +1325,7 @@ net_open(struct net_device *dev)
                 write_irq(dev, lp->chip_type, dev->irq);
                 ret = request_irq(dev->irq, net_interrupt, 0, dev->name, dev);
                 if (ret) {
-                        if (net_debug)
-                                printk(KERN_DEBUG "cs89x0: request_irq(%d) failed\n", dev->irq);
+                        printk(KERN_ERR "cs89x0: request_irq(%d) failed\n", dev->irq);
                         goto bad_out;
                 }
         }
diff --git a/drivers/net/davinci_emac.c b/drivers/net/davinci_emac.c
index 34e03104c3c1..33c4fe26178c 100644
--- a/drivers/net/davinci_emac.c
+++ b/drivers/net/davinci_emac.c
@@ -2711,6 +2711,8 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
         SET_ETHTOOL_OPS(ndev, &ethtool_ops);
         netif_napi_add(ndev, &priv->napi, emac_poll, EMAC_POLL_WEIGHT);
 
+        clk_enable(emac_clk);
+
         /* register the network device */
         SET_NETDEV_DEV(ndev, &pdev->dev);
         rc = register_netdev(ndev);
@@ -2720,7 +2722,6 @@ static int __devinit davinci_emac_probe(struct platform_device *pdev)
                 goto netdev_reg_err;
         }
 
-        clk_enable(emac_clk);
 
         /* MII/Phy intialisation, mdio bus registration */
         emac_mii = mdiobus_alloc();
@@ -2760,6 +2761,7 @@ mdiobus_quit:
 
 netdev_reg_err:
 mdio_alloc_err:
+        clk_disable(emac_clk);
 no_irq_res:
         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
         release_mem_region(res->start, res->end - res->start + 1);
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c
index b979464091bb..02d67d047d96 100644
--- a/drivers/net/e1000e/82571.c
+++ b/drivers/net/e1000e/82571.c
@@ -237,6 +237,8 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
         /* Set if manageability features are enabled. */
         mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK)
                         ? true : false;
+        /* Adaptive IFS supported */
+        mac->adaptive_ifs = true;
 
         /* check for link */
         switch (hw->phy.media_type) {
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index 3028f23da891..e2aa3b788564 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -224,6 +224,8 @@ static s32 e1000_init_mac_params_80003es2lan(struct e1000_adapter *adapter)
         /* Set if manageability features are enabled. */
         mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK)
                         ? true : false;
+        /* Adaptive IFS not supported */
+        mac->adaptive_ifs = false;
 
         /* check for link */
         switch (hw->phy.media_type) {
diff --git a/drivers/net/e1000e/hw.h b/drivers/net/e1000e/hw.h
index 2784cf44a6f3..eccf29b75c41 100644
--- a/drivers/net/e1000e/hw.h
+++ b/drivers/net/e1000e/hw.h
@@ -818,6 +818,7 @@ struct e1000_mac_info {
 
         u8  forced_speed_duplex;
 
+        bool adaptive_ifs;
         bool arc_subsystem_valid;
         bool autoneg;
         bool autoneg_failed;
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 9b09246af064..ad08cf3f40c0 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -454,6 +454,8 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_adapter *adapter)
                 mac->rar_entry_count--;
         /* Set if manageability features are enabled. */
         mac->arc_subsystem_valid = true;
+        /* Adaptive IFS supported */
+        mac->adaptive_ifs = true;
 
         /* LED operations */
         switch (mac->type) {
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c
index a86c17548c1e..2fa9b36a2c5a 100644
--- a/drivers/net/e1000e/lib.c
+++ b/drivers/net/e1000e/lib.c
@@ -125,6 +125,7 @@ void e1000_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value)
 void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
 {
         u32 i;
+        u8 mac_addr[ETH_ALEN] = {0};
 
         /* Setup the receive address */
         e_dbg("Programming MAC Address into RAR[0]\n");
@@ -133,12 +134,8 @@ void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count)
 
         /* Zero out the other (rar_entry_count - 1) receive addresses */
         e_dbg("Clearing RAR[1-%u]\n", rar_count-1);
-        for (i = 1; i < rar_count; i++) {
-                E1000_WRITE_REG_ARRAY(hw, E1000_RA, (i << 1), 0);
-                e1e_flush();
-                E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((i << 1) + 1), 0);
-                e1e_flush();
-        }
+        for (i = 1; i < rar_count; i++)
+                e1000e_rar_set(hw, mac_addr, i);
 }
 
 /**
@@ -164,10 +161,19 @@ void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index)
 
         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
 
-        rar_high |= E1000_RAH_AV;
+        /* If MAC address zero, no need to set the AV bit */
+        if (rar_low || rar_high)
+                rar_high |= E1000_RAH_AV;
 
-        E1000_WRITE_REG_ARRAY(hw, E1000_RA, (index << 1), rar_low);
-        E1000_WRITE_REG_ARRAY(hw, E1000_RA, ((index << 1) + 1), rar_high);
+        /*
+         * Some bridges will combine consecutive 32-bit writes into
+         * a single burst write, which will malfunction on some parts.
+         * The flushes avoid this.
+         */
+        ew32(RAL(index), rar_low);
+        e1e_flush();
+        ew32(RAH(index), rar_high);
+        e1e_flush();
 }
 
 /**
@@ -1609,6 +1615,11 @@ void e1000e_reset_adaptive(struct e1000_hw *hw)
 {
         struct e1000_mac_info *mac = &hw->mac;
 
+        if (!mac->adaptive_ifs) {
+                e_dbg("Not in Adaptive IFS mode!\n");
+                goto out;
+        }
+
         mac->current_ifs_val = 0;
         mac->ifs_min_val = IFS_MIN;
         mac->ifs_max_val = IFS_MAX;
@@ -1617,6 +1628,8 @@ void e1000e_reset_adaptive(struct e1000_hw *hw)
 
         mac->in_ifs_mode = false;
         ew32(AIT, 0);
+out:
+        return;
 }
 
 /**
@@ -1630,6 +1643,11 @@ void e1000e_update_adaptive(struct e1000_hw *hw)
 {
         struct e1000_mac_info *mac = &hw->mac;
 
+        if (!mac->adaptive_ifs) {
+                e_dbg("Not in Adaptive IFS mode!\n");
+                goto out;
+        }
+
         if ((mac->collision_delta * mac->ifs_ratio) > mac->tx_packet_delta) {
                 if (mac->tx_packet_delta > MIN_NUM_XMITS) {
                         mac->in_ifs_mode = true;
@@ -1650,6 +1668,8 @@ void e1000e_update_adaptive(struct e1000_hw *hw)
                         ew32(AIT, 0);
                 }
         }
+out:
+        return;
 }
 
 /**
@@ -2287,10 +2307,12 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
         s32 ret_val, hdr_csum, csum;
         u8 i, len;
 
+        hw->mac.tx_pkt_filtering = true;
+
         /* No manageability, no filtering */
         if (!e1000e_check_mng_mode(hw)) {
                 hw->mac.tx_pkt_filtering = false;
-                return 0;
+                goto out;
         }
 
         /*
@@ -2298,9 +2320,9 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
          * reason, disable filtering.
          */
         ret_val = e1000_mng_enable_host_if(hw);
-        if (ret_val != 0) {
+        if (ret_val) {
                 hw->mac.tx_pkt_filtering = false;
-                return ret_val;
+                goto out;
         }
 
         /* Read in the header.  Length and offset are in dwords. */
@@ -2319,17 +2341,17 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw)
          */
         if ((hdr_csum != csum) || (hdr->signature != E1000_IAMT_SIGNATURE)) {
                 hw->mac.tx_pkt_filtering = true;
-                return 1;
+                goto out;
         }
 
         /* Cookie area is valid, make the final check for filtering. */
         if (!(hdr->status & E1000_MNG_DHCP_COOKIE_STATUS_PARSING)) {
                 hw->mac.tx_pkt_filtering = false;
-                return 0;
+                goto out;
         }
 
-        hw->mac.tx_pkt_filtering = true;
-        return 1;
+out:
+        return hw->mac.tx_pkt_filtering;
 }
 
 /**
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c
index 762b697ce731..c45965a256b6 100644
--- a/drivers/net/e1000e/netdev.c
+++ b/drivers/net/e1000e/netdev.c
@@ -3315,24 +3315,24 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
         if ((hw->phy.type == e1000_phy_82578) ||
             (hw->phy.type == e1000_phy_82577)) {
                 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
-                e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
-                adapter->stats.scc += phy_data;
+                if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
+                        adapter->stats.scc += phy_data;
 
                 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
-                e1e_rphy(hw, HV_ECOL_LOWER, &phy_data);
-                adapter->stats.ecol += phy_data;
+                if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
+                        adapter->stats.ecol += phy_data;
 
                 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
-                e1e_rphy(hw, HV_MCC_LOWER, &phy_data);
-                adapter->stats.mcc += phy_data;
+                if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
+                        adapter->stats.mcc += phy_data;
 
                 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
-                e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data);
-                adapter->stats.latecol += phy_data;
+                if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
+                        adapter->stats.latecol += phy_data;
 
                 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
-                e1e_rphy(hw, HV_DC_LOWER, &phy_data);
-                adapter->stats.dc += phy_data;
+                if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
+                        adapter->stats.dc += phy_data;
         } else {
                 adapter->stats.scc += er32(SCC);
                 adapter->stats.ecol += er32(ECOL);
@@ -3360,8 +3360,8 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
         if ((hw->phy.type == e1000_phy_82578) ||
             (hw->phy.type == e1000_phy_82577)) {
                 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
-                e1e_rphy(hw, HV_COLC_LOWER, &phy_data);
-                hw->mac.collision_delta = phy_data;
+                if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
+                        hw->mac.collision_delta = phy_data;
         } else {
                 hw->mac.collision_delta = er32(COLC);
         }
@@ -3372,8 +3372,8 @@ void e1000e_update_stats(struct e1000_adapter *adapter)
         if ((hw->phy.type == e1000_phy_82578) ||
             (hw->phy.type == e1000_phy_82577)) {
                 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
-                e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data);
-                adapter->stats.tncrs += phy_data;
+                if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
+                        adapter->stats.tncrs += phy_data;
         } else {
                 if ((hw->mac.type != e1000_82574) &&
                     (hw->mac.type != e1000_82583))
@@ -4674,6 +4674,7 @@ static int e1000_resume(struct pci_dev *pdev)
 
         pci_set_power_state(pdev, PCI_D0);
         pci_restore_state(pdev);
+        pci_save_state(pdev);
         e1000e_disable_l1aspm(pdev);
 
         err = pci_enable_device_mem(pdev);
@@ -4825,6 +4826,7 @@ static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
         } else {
                 pci_set_master(pdev);
                 pci_restore_state(pdev);
+                pci_save_state(pdev);
 
                 pci_enable_wake(pdev, PCI_D3hot, 0);
                 pci_enable_wake(pdev, PCI_D3cold, 0);
diff --git a/drivers/net/fsl_pq_mdio.c b/drivers/net/fsl_pq_mdio.c
index 25fabb3eedc5..d5160edf2fcf 100644
--- a/drivers/net/fsl_pq_mdio.c
+++ b/drivers/net/fsl_pq_mdio.c
@@ -46,6 +46,11 @@
 #include "gianfar.h"
 #include "fsl_pq_mdio.h"
 
+struct fsl_pq_mdio_priv {
+        void __iomem *map;
+        struct fsl_pq_mdio __iomem *regs;
+};
+
 /*
  * Write value to the PHY at mii_id at register regnum,
  * on the bus attached to the local interface, which may be different from the
@@ -105,7 +110,9 @@ int fsl_pq_local_mdio_read(struct fsl_pq_mdio __iomem *regs,
 
 static struct fsl_pq_mdio __iomem *fsl_pq_mdio_get_regs(struct mii_bus *bus)
 {
-        return (void __iomem __force *)bus->priv;
+        struct fsl_pq_mdio_priv *priv = bus->priv;
+
+        return priv->regs;
 }
 
 /*
@@ -266,6 +273,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
 {
         struct device_node *np = ofdev->node;
         struct device_node *tbi;
+        struct fsl_pq_mdio_priv *priv;
         struct fsl_pq_mdio __iomem *regs = NULL;
         void __iomem *map;
         u32 __iomem *tbipa;
@@ -274,14 +282,19 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
         u64 addr = 0, size = 0;
         int err = 0;
 
+        priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+        if (!priv)
+                return -ENOMEM;
+
         new_bus = mdiobus_alloc();
         if (NULL == new_bus)
-                return -ENOMEM;
+                goto err_free_priv;
 
         new_bus->name = "Freescale PowerQUICC MII Bus",
         new_bus->read = &fsl_pq_mdio_read,
         new_bus->write = &fsl_pq_mdio_write,
         new_bus->reset = &fsl_pq_mdio_reset,
+        new_bus->priv = priv;
         fsl_pq_mdio_bus_name(new_bus->id, np);
 
         /* Set the PHY base address */
@@ -291,6 +304,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
                 err = -ENOMEM;
                 goto err_free_bus;
         }
+        priv->map = map;
 
         if (of_device_is_compatible(np, "fsl,gianfar-mdio") ||
                         of_device_is_compatible(np, "fsl,gianfar-tbi") ||
@@ -298,8 +312,7 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
                         of_device_is_compatible(np, "ucc_geth_phy"))
                 map -= offsetof(struct fsl_pq_mdio, miimcfg);
         regs = map;
-
-        new_bus->priv = (void __force *)regs;
+        priv->regs = regs;
 
         new_bus->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
 
@@ -392,10 +405,11 @@ static int fsl_pq_mdio_probe(struct of_device *ofdev,
 err_free_irqs:
         kfree(new_bus->irq);
 err_unmap_regs:
-        iounmap(regs);
+        iounmap(priv->map);
 err_free_bus:
         kfree(new_bus);
-
+err_free_priv:
+        kfree(priv);
         return err;
 }
 
@@ -404,14 +418,16 @@ static int fsl_pq_mdio_remove(struct of_device *ofdev)
 {
         struct device *device = &ofdev->dev;
         struct mii_bus *bus = dev_get_drvdata(device);
+        struct fsl_pq_mdio_priv *priv = bus->priv;
 
         mdiobus_unregister(bus);
 
         dev_set_drvdata(device, NULL);
 
-        iounmap(fsl_pq_mdio_get_regs(bus));
+        iounmap(priv->map);
         bus->priv = NULL;
         mdiobus_free(bus);
+        kfree(priv);
 
         return 0;
 }
diff --git a/drivers/net/hamradio/bpqether.c b/drivers/net/hamradio/bpqether.c
index ae5f11c8fc13..bdadf3e23c94 100644
--- a/drivers/net/hamradio/bpqether.c
+++ b/drivers/net/hamradio/bpqether.c
@@ -248,6 +248,7 @@ static netdev_tx_t bpq_xmit(struct sk_buff *skb, struct net_device *dev)
 {
         unsigned char *ptr;
         struct bpqdev *bpq;
+        struct net_device *orig_dev;
         int size;
 
         /*
@@ -282,8 +283,9 @@ static netdev_tx_t bpq_xmit(struct sk_buff *skb, struct net_device *dev)
 
         bpq = netdev_priv(dev);
 
+        orig_dev = dev;
         if ((dev = bpq_get_ether_dev(dev)) == NULL) {
-                dev->stats.tx_dropped++;
+                orig_dev->stats.tx_dropped++;
                 kfree_skb(skb);
                 return NETDEV_TX_OK;
         }
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c
index 1a2ea621e371..2ad754c864cf 100644
--- a/drivers/net/ixgbe/ixgbe_main.c
+++ b/drivers/net/ixgbe/ixgbe_main.c
@@ -262,10 +262,12 @@ static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
                 int reg_idx = tx_ring->reg_idx;
                 int dcb_i = adapter->ring_feature[RING_F_DCB].indices;
 
-                if (adapter->hw.mac.type == ixgbe_mac_82598EB) {
+                switch (adapter->hw.mac.type) {
+                case ixgbe_mac_82598EB:
                         tc = reg_idx >> 2;
                         txoff = IXGBE_TFCS_TXOFF0;
-                } else if (adapter->hw.mac.type == ixgbe_mac_82599EB) {
+                        break;
+                case ixgbe_mac_82599EB:
                         tc = 0;
                         txoff = IXGBE_TFCS_TXOFF;
                         if (dcb_i == 8) {
@@ -284,6 +286,9 @@ static inline bool ixgbe_tx_is_paused(struct ixgbe_adapter *adapter,
                                                 tc += (reg_idx - 96) >> 4;
                                 }
                         }
+                        break;
+                default:
+                        tc = 0;
                 }
                 txoff <<= tc;
         }
diff --git a/drivers/net/ll_temac_main.c b/drivers/net/ll_temac_main.c
index 336e7c7a9275..a8522bd73ae7 100644
--- a/drivers/net/ll_temac_main.c
+++ b/drivers/net/ll_temac_main.c
@@ -134,7 +134,7 @@ static int temac_dma_bd_init(struct net_device *ndev)
         struct sk_buff *skb;
         int i;
 
-        lp->rx_skb = kzalloc(sizeof(struct sk_buff)*RX_BD_NUM, GFP_KERNEL);
+        lp->rx_skb = kzalloc(sizeof(*lp->rx_skb) * RX_BD_NUM, GFP_KERNEL);
         /* allocate the tx and rx ring buffer descriptors. */
         /* returns a virtual addres and a physical address. */
         lp->tx_bd_v = dma_alloc_coherent(ndev->dev.parent,
diff --git a/drivers/net/mlx4/main.c b/drivers/net/mlx4/main.c
index 291a505fd4fc..3cf56d90d859 100644
--- a/drivers/net/mlx4/main.c
+++ b/drivers/net/mlx4/main.c
@@ -1174,7 +1174,7 @@ static int __mlx4_init_one(struct pci_dev *pdev, const struct pci_device_id *id)
         return 0;
 
 err_port:
-        for (port = 1; port <= dev->caps.num_ports; port++)
+        for (--port; port >= 1; --port)
                 mlx4_cleanup_port_info(&priv->port[port]);
 
         mlx4_cleanup_mcg_table(dev);
diff --git a/drivers/net/mv643xx_eth.c b/drivers/net/mv643xx_eth.c
index 1405a170bb43..af67af55efe7 100644
--- a/drivers/net/mv643xx_eth.c
+++ b/drivers/net/mv643xx_eth.c
@@ -656,6 +656,7 @@ static int rxq_refill(struct rx_queue *rxq, int budget)
                 struct sk_buff *skb;
                 int rx;
                 struct rx_desc *rx_desc;
+                int size;
 
                 skb = __skb_dequeue(&mp->rx_recycle);
                 if (skb == NULL)
@@ -678,10 +679,11 @@ static int rxq_refill(struct rx_queue *rxq, int budget)
 
                 rx_desc = rxq->rx_desc_area + rx;
 
+                size = skb->end - skb->data;
                 rx_desc->buf_ptr = dma_map_single(mp->dev->dev.parent,
-                                                  skb->data, mp->skb_size,
+                                                  skb->data, size,
                                                   DMA_FROM_DEVICE);
-                rx_desc->buf_size = mp->skb_size;
+                rx_desc->buf_size = size;
                 rxq->rx_skb[rx] = skb;
                 wmb();
                 rx_desc->cmd_sts = BUFFER_OWNED_BY_DMA | RX_ENABLE_INTERRUPT;
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h
index 76cd1f3e9fc8..9bc5bd1d538a 100644
--- a/drivers/net/netxen/netxen_nic.h
+++ b/drivers/net/netxen/netxen_nic.h
@@ -53,8 +53,8 @@
 
 #define _NETXEN_NIC_LINUX_MAJOR 4
 #define _NETXEN_NIC_LINUX_MINOR 0
-#define _NETXEN_NIC_LINUX_SUBVERSION 65
-#define NETXEN_NIC_LINUX_VERSIONID  "4.0.65"
+#define _NETXEN_NIC_LINUX_SUBVERSION 72
+#define NETXEN_NIC_LINUX_VERSIONID  "4.0.72"
 
 #define NETXEN_VERSION_CODE(a, b, c)    (((a) << 24) + ((b) << 16) + (c))
 #define _major(v)       (((v) >> 24) & 0xff)
diff --git a/drivers/net/netxen/netxen_nic_ethtool.c b/drivers/net/netxen/netxen_nic_ethtool.c
index ddd704ae0188..542f408333ff 100644
--- a/drivers/net/netxen/netxen_nic_ethtool.c
+++ b/drivers/net/netxen/netxen_nic_ethtool.c
@@ -66,7 +66,7 @@ static const char netxen_nic_gstrings_test[][ETH_GSTRING_LEN] = {
 
 #define NETXEN_NIC_TEST_LEN     ARRAY_SIZE(netxen_nic_gstrings_test)
 
-#define NETXEN_NIC_REGS_COUNT 42
+#define NETXEN_NIC_REGS_COUNT 30
 #define NETXEN_NIC_REGS_LEN (NETXEN_NIC_REGS_COUNT * sizeof(__le32))
 #define NETXEN_MAX_EEPROM_LEN   1024
 
@@ -312,150 +312,91 @@ static int netxen_nic_get_regs_len(struct net_device *dev)
         return NETXEN_NIC_REGS_LEN;
 }
 
-struct netxen_niu_regs {
-        __u32 reg[NETXEN_NIC_REGS_COUNT];
-};
-
-static struct netxen_niu_regs niu_registers[] = {
-        {
-         /* GB Mode */
-         {
-          NETXEN_NIU_GB_SERDES_RESET,
-          NETXEN_NIU_GB0_MII_MODE,
-          NETXEN_NIU_GB1_MII_MODE,
-          NETXEN_NIU_GB2_MII_MODE,
-          NETXEN_NIU_GB3_MII_MODE,
-          NETXEN_NIU_GB0_GMII_MODE,
-          NETXEN_NIU_GB1_GMII_MODE,
-          NETXEN_NIU_GB2_GMII_MODE,
-          NETXEN_NIU_GB3_GMII_MODE,
-          NETXEN_NIU_REMOTE_LOOPBACK,
-          NETXEN_NIU_GB0_HALF_DUPLEX,
-          NETXEN_NIU_GB1_HALF_DUPLEX,
-          NETXEN_NIU_RESET_SYS_FIFOS,
-          NETXEN_NIU_GB_CRC_DROP,
-          NETXEN_NIU_GB_DROP_WRONGADDR,
-          NETXEN_NIU_TEST_MUX_CTL,
-
-          NETXEN_NIU_GB_MAC_CONFIG_0(0),
-          NETXEN_NIU_GB_MAC_CONFIG_1(0),
-          NETXEN_NIU_GB_HALF_DUPLEX_CTRL(0),
-          NETXEN_NIU_GB_MAX_FRAME_SIZE(0),
-          NETXEN_NIU_GB_TEST_REG(0),
-          NETXEN_NIU_GB_MII_MGMT_CONFIG(0),
-          NETXEN_NIU_GB_MII_MGMT_COMMAND(0),
-          NETXEN_NIU_GB_MII_MGMT_ADDR(0),
-          NETXEN_NIU_GB_MII_MGMT_CTRL(0),
-          NETXEN_NIU_GB_MII_MGMT_STATUS(0),
-          NETXEN_NIU_GB_MII_MGMT_INDICATE(0),
-          NETXEN_NIU_GB_INTERFACE_CTRL(0),
-          NETXEN_NIU_GB_INTERFACE_STATUS(0),
-          NETXEN_NIU_GB_STATION_ADDR_0(0),
-          NETXEN_NIU_GB_STATION_ADDR_1(0),
-          -1,
-          }
-         },
-        {
-         /* XG Mode */
-         {
-          NETXEN_NIU_XG_SINGLE_TERM,
-          NETXEN_NIU_XG_DRIVE_HI,
-          NETXEN_NIU_XG_DRIVE_LO,
-          NETXEN_NIU_XG_DTX,
-          NETXEN_NIU_XG_DEQ,
-          NETXEN_NIU_XG_WORD_ALIGN,
-          NETXEN_NIU_XG_RESET,
-          NETXEN_NIU_XG_POWER_DOWN,
-          NETXEN_NIU_XG_RESET_PLL,
-          NETXEN_NIU_XG_SERDES_LOOPBACK,
-          NETXEN_NIU_XG_DO_BYTE_ALIGN,
-          NETXEN_NIU_XG_TX_ENABLE,
-          NETXEN_NIU_XG_RX_ENABLE,
-          NETXEN_NIU_XG_STATUS,
-          NETXEN_NIU_XG_PAUSE_THRESHOLD,
-          NETXEN_NIU_XGE_CONFIG_0,
-          NETXEN_NIU_XGE_CONFIG_1,
-          NETXEN_NIU_XGE_IPG,
-          NETXEN_NIU_XGE_STATION_ADDR_0_HI,
-          NETXEN_NIU_XGE_STATION_ADDR_0_1,
-          NETXEN_NIU_XGE_STATION_ADDR_1_LO,
-          NETXEN_NIU_XGE_STATUS,
-          NETXEN_NIU_XGE_MAX_FRAME_SIZE,
-          NETXEN_NIU_XGE_PAUSE_FRAME_VALUE,
-          NETXEN_NIU_XGE_TX_BYTE_CNT,
-          NETXEN_NIU_XGE_TX_FRAME_CNT,
-          NETXEN_NIU_XGE_RX_BYTE_CNT,
-          NETXEN_NIU_XGE_RX_FRAME_CNT,
-          NETXEN_NIU_XGE_AGGR_ERROR_CNT,
-          NETXEN_NIU_XGE_MULTICAST_FRAME_CNT,
-          NETXEN_NIU_XGE_UNICAST_FRAME_CNT,
-          NETXEN_NIU_XGE_CRC_ERROR_CNT,
-          NETXEN_NIU_XGE_OVERSIZE_FRAME_ERR,
-          NETXEN_NIU_XGE_UNDERSIZE_FRAME_ERR,
-          NETXEN_NIU_XGE_LOCAL_ERROR_CNT,
-          NETXEN_NIU_XGE_REMOTE_ERROR_CNT,
-          NETXEN_NIU_XGE_CONTROL_CHAR_CNT,
-          NETXEN_NIU_XGE_PAUSE_FRAME_CNT,
-          -1,
-          }
-         }
-};
-
 static void
 netxen_nic_get_regs(struct net_device *dev, struct ethtool_regs *regs, void *p)
 {
         struct netxen_adapter *adapter = netdev_priv(dev);
-        __u32 mode, *regs_buff = p;
-        int i, window;
+        struct netxen_recv_context *recv_ctx = &adapter->recv_ctx;
+        struct nx_host_sds_ring *sds_ring;
+        u32 *regs_buff = p;
+        int ring, i = 0;
+        int port = adapter->physical_port;
 
         memset(p, 0, NETXEN_NIC_REGS_LEN);
+
         regs->version = (1 << 24) | (adapter->ahw.revision_id << 16) |
             (adapter->pdev)->device;
-        /* which mode */
-        regs_buff[0] = NXRD32(adapter, NETXEN_NIU_MODE);
-        mode = regs_buff[0];
-
-        /* Common registers to all the modes */
-        regs_buff[2] = NXRD32(adapter, NETXEN_NIU_STRAP_VALUE_SAVE_HIGHER);
-        /* GB/XGB Mode */
-        mode = (mode / 2) - 1;
-        window = 0;
-        if (mode <= 1) {
-                for (i = 3; niu_registers[mode].reg[i - 3] != -1; i++) {
-                        /* GB: port specific registers */
-                        if (mode == 0 && i >= 19)
-                                window = adapter->physical_port *
-                                        NETXEN_NIC_PORT_WINDOW;
-
-                        regs_buff[i] = NXRD32(adapter,
-                                niu_registers[mode].reg[i - 3] + window);
-                }
 
+        if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC)
+                return;
+
+        regs_buff[i++] = NXRD32(adapter, CRB_CMDPEG_STATE);
+        regs_buff[i++] = NXRD32(adapter, CRB_RCVPEG_STATE);
+        regs_buff[i++] = NXRD32(adapter, CRB_FW_CAPABILITIES_1);
+        regs_buff[i++] = NXRDIO(adapter, adapter->crb_int_state_reg);
+        regs_buff[i++] = NXRD32(adapter, NX_CRB_DEV_REF_COUNT);
+        regs_buff[i++] = NXRD32(adapter, NX_CRB_DEV_STATE);
+        regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
+        regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_HALT_STATUS1);
+        regs_buff[i++] = NXRD32(adapter, NETXEN_PEG_HALT_STATUS2);
+
+        regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_0+0x3c);
+        regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_1+0x3c);
+        regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_2+0x3c);
+        regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_3+0x3c);
+
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
+
+                regs_buff[i++] = NXRD32(adapter, NETXEN_CRB_PEG_NET_4+0x3c);
+                i += 2;
+
+                regs_buff[i++] = NXRD32(adapter, CRB_XG_STATE_P3);
+                regs_buff[i++] = le32_to_cpu(*(adapter->tx_ring->hw_consumer));
+
+        } else {
+                i++;
+
+                regs_buff[i++] = NXRD32(adapter,
+                                        NETXEN_NIU_XGE_CONFIG_0+(0x10000*port));
+                regs_buff[i++] = NXRD32(adapter,
+                                        NETXEN_NIU_XGE_CONFIG_1+(0x10000*port));
+
+                regs_buff[i++] = NXRD32(adapter, CRB_XG_STATE);
+                regs_buff[i++] = NXRDIO(adapter,
+                                 adapter->tx_ring->crb_cmd_consumer);
+        }
+
+        regs_buff[i++] = NXRDIO(adapter, adapter->tx_ring->crb_cmd_producer);
+
+        regs_buff[i++] = NXRDIO(adapter,
+                         recv_ctx->rds_rings[0].crb_rcv_producer);
+        regs_buff[i++] = NXRDIO(adapter,
+                         recv_ctx->rds_rings[1].crb_rcv_producer);
+
+        regs_buff[i++] = adapter->max_sds_rings;
+
+        for (ring = 0; ring < adapter->max_sds_rings; ring++) {
+                sds_ring = &(recv_ctx->sds_rings[ring]);
+                regs_buff[i++] = NXRDIO(adapter,
+                                        sds_ring->crb_sts_consumer);
         }
 }
 
 static u32 netxen_nic_test_link(struct net_device *dev)
 {
         struct netxen_adapter *adapter = netdev_priv(dev);
-        __u32 status;
-        int val;
+        u32 val, port;
 
-        /* read which mode */
-        if (adapter->ahw.port_type == NETXEN_NIC_GBE) {
-                if (adapter->phy_read &&
-                    adapter->phy_read(adapter,
-                                      NETXEN_NIU_GB_MII_MGMT_ADDR_PHY_STATUS,
-                                      &status) != 0)
-                        return -EIO;
-                else {
-                        val = netxen_get_phy_link(status);
-                        return !val;
-                }
-        } else if (adapter->ahw.port_type == NETXEN_NIC_XGBE) {
+        port = adapter->physical_port;
+        if (NX_IS_REVISION_P3(adapter->ahw.revision_id)) {
+                val = NXRD32(adapter, CRB_XG_STATE_P3);
+                val = XG_LINK_STATE_P3(adapter->ahw.pci_func, val);
+                return (val == XG_LINK_UP_P3) ? 0 : 1;
+        } else {
                 val = NXRD32(adapter, CRB_XG_STATE);
+                val = (val >> port*8) & 0xff;
                 return (val == XG_LINK_UP) ? 0 : 1;
         }
-        return -EIO;
 }
 
 static int
diff --git a/drivers/net/netxen/netxen_nic_hw.c b/drivers/net/netxen/netxen_nic_hw.c
index 2e364fee3cbb..85e28e60ecf1 100644
--- a/drivers/net/netxen/netxen_nic_hw.c
+++ b/drivers/net/netxen/netxen_nic_hw.c
@@ -345,8 +345,7 @@ netxen_pcie_sem_lock(struct netxen_adapter *adapter, int sem, u32 id_reg)
 void
 netxen_pcie_sem_unlock(struct netxen_adapter *adapter, int sem)
 {
-        int val;
-        val = NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM_UNLOCK(sem)));
+        NXRD32(adapter, NETXEN_PCIE_REG(PCIE_SEM_UNLOCK(sem)));
 }
 
 int netxen_niu_xg_init_port(struct netxen_adapter *adapter, int port)
@@ -691,6 +690,9 @@ void netxen_p3_nic_set_multi(struct net_device *netdev)
         struct list_head *head;
         nx_mac_list_t *cur;
 
+        if (adapter->is_up != NETXEN_ADAPTER_UP_MAGIC)
+                return;
+
         list_splice_tail_init(&adapter->mac_list, &del_list);
 
         nx_p3_nic_add_mac(adapter, adapter->mac_addr, &del_list);
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c
index 02f8d4b4db63..64cff68d372c 100644
--- a/drivers/net/netxen/netxen_nic_init.c
+++ b/drivers/net/netxen/netxen_nic_init.c
@@ -184,6 +184,8 @@ skip_rds:
 
         tx_ring = adapter->tx_ring;
         vfree(tx_ring->cmd_buf_arr);
+        kfree(tx_ring);
+        adapter->tx_ring = NULL;
 }
 
 int netxen_alloc_sw_resources(struct netxen_adapter *adapter)
@@ -782,7 +784,7 @@ netxen_need_fw_reset(struct netxen_adapter *adapter)
         if (NXRD32(adapter, CRB_CMDPEG_STATE) == PHAN_INITIALIZE_FAILED)
                 return 1;
 
-        old_count = count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
+        old_count = NXRD32(adapter, NETXEN_PEG_ALIVE_COUNTER);
 
         for (i = 0; i < 10; i++) {
 
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c
index 6cae26a5bd67..9f9d6081959b 100644
--- a/drivers/net/netxen/netxen_nic_main.c
+++ b/drivers/net/netxen/netxen_nic_main.c
@@ -340,7 +340,7 @@ netxen_check_hw_init(struct netxen_adapter *adapter, int first_boot)
                 if (!(first_boot & 0x4)) {
                         first_boot |= 0x4;
                         NXWR32(adapter, NETXEN_PCIE_REG(0x4), first_boot);
-                        first_boot = NXRD32(adapter, NETXEN_PCIE_REG(0x4));
+                        NXRD32(adapter, NETXEN_PCIE_REG(0x4));
                 }
 
                 /* This is the first boot after power up */
@@ -1898,12 +1898,8 @@ static void netxen_nic_handle_phy_intr(struct netxen_adapter *adapter)
                 linkup = (val == XG_LINK_UP_P3);
         } else {
                 val = NXRD32(adapter, CRB_XG_STATE);
-                if (adapter->ahw.port_type == NETXEN_NIC_GBE)
-                        linkup = (val >> port) & 1;
-                else {
-                        val = (val >> port*8) & 0xff;
-                        linkup = (val == XG_LINK_UP);
-                }
+                val = (val >> port*8) & 0xff;
+                linkup = (val == XG_LINK_UP);
         }
 
         netxen_advert_link_change(adapter, linkup);
diff --git a/drivers/net/niu.c b/drivers/net/niu.c
index 8ce58c4c7dd3..2aed2b382c40 100644
--- a/drivers/net/niu.c
+++ b/drivers/net/niu.c
@@ -2844,7 +2844,7 @@ static int tcam_wait_bit(struct niu *np, u64 bit)
                         break;
                 udelay(1);
         }
-        if (limit < 0)
+        if (limit <= 0)
                 return -ENODEV;
 
         return 0;
diff --git a/drivers/net/pcmcia/nmclan_cs.c b/drivers/net/pcmcia/nmclan_cs.c
index 8a5ae3b182ed..12e3233868e9 100644
--- a/drivers/net/pcmcia/nmclan_cs.c
+++ b/drivers/net/pcmcia/nmclan_cs.c
@@ -1402,7 +1402,6 @@ static void BuildLAF(int *ladrf, int *adr)
   for (i = 0; i < 8; i++)
     printk(KERN_CONT " %02X", ladrf[i]);
   printk(KERN_CONT "\n");
-  }
 #endif
 } /* BuildLAF */
 
diff --git a/drivers/net/pcmcia/pcnet_cs.c b/drivers/net/pcmcia/pcnet_cs.c
index 92ed3fbf89a5..776cad2f5715 100644
--- a/drivers/net/pcmcia/pcnet_cs.c
+++ b/drivers/net/pcmcia/pcnet_cs.c
@@ -1741,7 +1741,7 @@ static struct pcmcia_device_id pcnet_ids[] = {
         PCMCIA_MFC_DEVICE_CIS_PROD_ID4(0, "NSC MF LAN/Modem", 0x58fc6056, "cis/DP83903.cis"),
         PCMCIA_MFC_DEVICE_CIS_MANF_CARD(0, 0x0175, 0x0000, "cis/DP83903.cis"),
         PCMCIA_DEVICE_CIS_MANF_CARD(0xc00f, 0x0002, "cis/LA-PCM.cis"),
-        PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "PE520.cis"),
+        PCMCIA_DEVICE_CIS_PROD_ID12("KTI", "PE520 PLUS", 0xad180345, 0x9d58d392, "cis/PE520.cis"),
         PCMCIA_DEVICE_CIS_PROD_ID12("NDC", "Ethernet", 0x01c43ae1, 0x00b2e941, "cis/NE2K.cis"),
         PCMCIA_DEVICE_CIS_PROD_ID12("PMX   ", "PE-200", 0x34f3f1c8, 0x10b59f8c, "cis/PE-200.cis"),
         PCMCIA_DEVICE_CIS_PROD_ID12("TAMARACK", "Ethernet", 0xcf434fba, 0x00b2e941, "cis/tamarack.cis"),
@@ -1754,7 +1754,7 @@ MODULE_DEVICE_TABLE(pcmcia, pcnet_ids);
 MODULE_FIRMWARE("cis/PCMLM28.cis");
 MODULE_FIRMWARE("cis/DP83903.cis");
 MODULE_FIRMWARE("cis/LA-PCM.cis");
-MODULE_FIRMWARE("PE520.cis");
+MODULE_FIRMWARE("cis/PE520.cis");
 MODULE_FIRMWARE("cis/NE2K.cis");
 MODULE_FIRMWARE("cis/PE-200.cis");
 MODULE_FIRMWARE("cis/tamarack.cis");
diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index c13cf64095b6..33c4b12a63ba 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -331,8 +331,8 @@ static void bcm54xx_adjust_rxrefclk(struct phy_device *phydev)
         bool clk125en = true;
 
         /* Abort if we are using an untested phy. */
-        if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 ||
-            BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 ||
+        if (BRCM_PHY_MODEL(phydev) != PHY_ID_BCM57780 &&
+            BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610 &&
             BRCM_PHY_MODEL(phydev) != PHY_ID_BCM50610M)
                 return;
 
diff --git a/drivers/net/phy/mdio_bus.c b/drivers/net/phy/mdio_bus.c
index bd4e8d72dc08..e17b70291bbc 100644
--- a/drivers/net/phy/mdio_bus.c
+++ b/drivers/net/phy/mdio_bus.c
@@ -264,6 +264,8 @@ static int mdio_bus_match(struct device *dev, struct device_driver *drv)
                 (phydev->phy_id & phydrv->phy_id_mask));
 }
 
+#ifdef CONFIG_PM
+
 static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)
 {
         struct device_driver *drv = phydev->dev.driver;
@@ -295,34 +297,88 @@ static bool mdio_bus_phy_may_suspend(struct phy_device *phydev)
         return true;
 }
 
-/* Suspend and resume.  Copied from platform_suspend and
- * platform_resume
- */
-static int mdio_bus_suspend(struct device * dev, pm_message_t state)
+static int mdio_bus_suspend(struct device *dev)
 {
         struct phy_driver *phydrv = to_phy_driver(dev->driver);
         struct phy_device *phydev = to_phy_device(dev);
 
+        /*
+         * We must stop the state machine manually, otherwise it stops out of
+         * control, possibly with the phydev->lock held. Upon resume, netdev
+         * may call phy routines that try to grab the same lock, and that may
+         * lead to a deadlock.
+         */
+        if (phydev->attached_dev)
+                phy_stop_machine(phydev);
+
         if (!mdio_bus_phy_may_suspend(phydev))
                 return 0;
+
         return phydrv->suspend(phydev);
 }
 
-static int mdio_bus_resume(struct device * dev)
+static int mdio_bus_resume(struct device *dev)
 {
         struct phy_driver *phydrv = to_phy_driver(dev->driver);
         struct phy_device *phydev = to_phy_device(dev);
+        int ret;
 
         if (!mdio_bus_phy_may_suspend(phydev))
+                goto no_resume;
+
+        ret = phydrv->resume(phydev);
+        if (ret < 0)
+                return ret;
+
+no_resume:
+        if (phydev->attached_dev)
+                phy_start_machine(phydev, NULL);
+
+        return 0;
+}
+
+static int mdio_bus_restore(struct device *dev)
+{
+        struct phy_device *phydev = to_phy_device(dev);
+        struct net_device *netdev = phydev->attached_dev;
+        int ret;
+
+        if (!netdev)
                 return 0;
-        return phydrv->resume(phydev);
+
+        ret = phy_init_hw(phydev);
+        if (ret < 0)
+                return ret;
+
+        /* The PHY needs to renegotiate. */
+        phydev->link = 0;
+        phydev->state = PHY_UP;
+
+        phy_start_machine(phydev, NULL);
+
+        return 0;
 }
 
+static struct dev_pm_ops mdio_bus_pm_ops = {
+        .suspend = mdio_bus_suspend,
+        .resume = mdio_bus_resume,
+        .freeze = mdio_bus_suspend,
+        .thaw = mdio_bus_resume,
+        .restore = mdio_bus_restore,
+};
+
+#define MDIO_BUS_PM_OPS (&mdio_bus_pm_ops)
+
+#else
+
+#define MDIO_BUS_PM_OPS NULL
+
+#endif /* CONFIG_PM */
+
 struct bus_type mdio_bus_type = {
         .name           = "mdio_bus",
         .match          = mdio_bus_match,
-        .suspend        = mdio_bus_suspend,
-        .resume         = mdio_bus_resume,
+        .pm             = MDIO_BUS_PM_OPS,
 };
 EXPORT_SYMBOL(mdio_bus_type);
 
diff --git a/drivers/net/phy/phy_device.c b/drivers/net/phy/phy_device.c
index b10fedd82143..8212b2b93422 100644
--- a/drivers/net/phy/phy_device.c
+++ b/drivers/net/phy/phy_device.c
@@ -378,6 +378,20 @@ void phy_disconnect(struct phy_device *phydev)
 }
 EXPORT_SYMBOL(phy_disconnect);
 
+int phy_init_hw(struct phy_device *phydev)
+{
+        int ret;
+
+        if (!phydev->drv || !phydev->drv->config_init)
+                return 0;
+
+        ret = phy_scan_fixups(phydev);
+        if (ret < 0)
+                return ret;
+
+        return phydev->drv->config_init(phydev);
+}
+
 /**
  * phy_attach_direct - attach a network device to a given PHY device pointer
  * @dev: network device to attach
@@ -425,21 +439,7 @@ int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
         /* Do initial configuration here, now that
          * we have certain key parameters
          * (dev_flags and interface) */
-        if (phydev->drv->config_init) {
-                int err;
-
-                err = phy_scan_fixups(phydev);
-
-                if (err < 0)
-                        return err;
-
-                err = phydev->drv->config_init(phydev);
-
-                if (err < 0)
-                        return err;
-        }
-
-        return 0;
+        return phy_init_hw(phydev);
 }
 EXPORT_SYMBOL(phy_attach_direct);
 
diff --git a/drivers/net/rrunner.c b/drivers/net/rrunner.c
index 20a71749154a..1c257098d0a6 100644
--- a/drivers/net/rrunner.c
+++ b/drivers/net/rrunner.c
@@ -1293,7 +1293,7 @@ static void rr_dump(struct net_device *dev)
 
         printk("Error code 0x%x\n", readl(&regs->Fail1));
 
-        index = (((readl(&regs->EvtPrd) >> 8) & 0xff ) - 1) % EVT_RING_ENTRIES;
+        index = (((readl(&regs->EvtPrd) >> 8) & 0xff) - 1) % TX_RING_ENTRIES;
         cons = rrpriv->dirty_tx;
         printk("TX ring index %i, TX consumer %i\n",
                index, cons);
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index ca6285016dfd..7402b858cab7 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -110,7 +110,7 @@ static void sh_eth_reset(struct net_device *ndev)
                 mdelay(1);
                 cnt--;
         }
-        if (cnt < 0)
+        if (cnt == 0)
                 printk(KERN_ERR "Device reset fail\n");
 
         /* Table Init */
diff --git a/drivers/net/sky2.c b/drivers/net/sky2.c
index 1c01b96c9611..37f486b65f63 100644
--- a/drivers/net/sky2.c
+++ b/drivers/net/sky2.c
@@ -1844,7 +1844,8 @@ static void sky2_tx_complete(struct sky2_port *sky2, u16 done)
         sky2->tx_cons = idx;
         smp_mb();
 
-        if (tx_avail(sky2) > MAX_SKB_TX_LE + 4)
+        /* Wake unless it's detached, and called e.g. from sky2_down() */
+        if (tx_avail(sky2) > MAX_SKB_TX_LE + 4 && netif_device_present(dev))
                 netif_wake_queue(dev);
 }
 
@@ -4684,6 +4685,7 @@ static int __devinit sky2_probe(struct pci_dev *pdev,
         INIT_WORK(&hw->restart_work, sky2_restart);
 
         pci_set_drvdata(pdev, hw);
+        pdev->d3_delay = 150;
 
         return 0;
 
diff --git a/drivers/net/tulip/Kconfig b/drivers/net/tulip/Kconfig
index 1cc8cf4425d1..516713fa0a05 100644
--- a/drivers/net/tulip/Kconfig
+++ b/drivers/net/tulip/Kconfig
@@ -101,6 +101,10 @@ config TULIP_NAPI_HW_MITIGATION
 
           If in doubt, say Y.
 
+config TULIP_DM910X
+        def_bool y
+        depends on TULIP && SPARC
+
 config DE4X5
         tristate "Generic DECchip & DIGITAL EtherWORKS PCI/EISA"
         depends on PCI || EISA
diff --git a/drivers/net/tulip/dmfe.c b/drivers/net/tulip/dmfe.c
index ad63621913c3..6f44ebf58910 100644
--- a/drivers/net/tulip/dmfe.c
+++ b/drivers/net/tulip/dmfe.c
@@ -92,6 +92,10 @@
 #include <asm/uaccess.h>
 #include <asm/irq.h>
 
+#ifdef CONFIG_TULIP_DM910X
+#include <linux/of.h>
+#endif
+
 
 /* Board/System/Debug information/definition ---------------- */
 #define PCI_DM9132_ID   0x91321282      /* Davicom DM9132 ID */
@@ -377,6 +381,23 @@ static int __devinit dmfe_init_one (struct pci_dev *pdev,
         if (!printed_version++)
                 printk(version);
 
+        /*
+         *      SPARC on-board DM910x chips should be handled by the main
+         *      tulip driver, except for early DM9100s.
+         */
+#ifdef CONFIG_TULIP_DM910X
+        if ((ent->driver_data == PCI_DM9100_ID && pdev->revision >= 0x30) ||
+            ent->driver_data == PCI_DM9102_ID) {
+                struct device_node *dp = pci_device_to_OF_node(pdev);
+
+                if (dp && of_get_property(dp, "local-mac-address", NULL)) {
+                        printk(KERN_INFO DRV_NAME
+                               ": skipping on-board DM910x (use tulip)\n");
+                        return -ENODEV;
+                }
+        }
+#endif
+
         /* Init network device */
         dev = alloc_etherdev(sizeof(*db));
         if (dev == NULL)
diff --git a/drivers/net/tulip/tulip_core.c b/drivers/net/tulip/tulip_core.c
index 0fa3140d65bf..595777dcadb1 100644
--- a/drivers/net/tulip/tulip_core.c
+++ b/drivers/net/tulip/tulip_core.c
@@ -196,9 +196,13 @@ struct tulip_chip_table tulip_tbl[] = {
         | HAS_NWAY | HAS_PCI_MWI, tulip_timer, tulip_media_task },
 
   /* DM910X */
+#ifdef CONFIG_TULIP_DM910X
   { "Davicom DM9102/DM9102A", 128, 0x0001ebef,
         HAS_MII | HAS_MEDIA_TABLE | CSR12_IN_SROM | HAS_ACPI,
         tulip_timer, tulip_media_task },
+#else
+  { NULL },
+#endif
 
   /* RS7112 */
   { "Conexant LANfinity", 256, 0x0001ebef,
@@ -228,8 +232,10 @@ static struct pci_device_id tulip_pci_tbl[] = {
         { 0x1259, 0xa120, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
         { 0x11F6, 0x9881, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMPEX9881 },
         { 0x8086, 0x0039, PCI_ANY_ID, PCI_ANY_ID, 0, 0, I21145 },
+#ifdef CONFIG_TULIP_DM910X
         { 0x1282, 0x9100, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
         { 0x1282, 0x9102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, DM910X },
+#endif
         { 0x1113, 0x1216, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
         { 0x1113, 0x1217, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MX98715 },
         { 0x1113, 0x9511, PCI_ANY_ID, PCI_ANY_ID, 0, 0, COMET },
@@ -1299,18 +1305,30 @@ static int __devinit tulip_init_one (struct pci_dev *pdev,
         }
 
         /*
-         *      Early DM9100's need software CRC and the DMFE driver
+         *      DM910x chips should be handled by the dmfe driver, except
+         *      on-board chips on SPARC systems.  Also, early DM9100s need
+         *      software CRC which only the dmfe driver supports.
          */
 
-        if (pdev->vendor == 0x1282 && pdev->device == 0x9100)
-        {
-                /* Read Chip revision */
-                if (pdev->revision < 0x30)
-                {
-                        printk(KERN_ERR PFX "skipping early DM9100 with Crc bug (use dmfe)\n");
+#ifdef CONFIG_TULIP_DM910X
+        if (chip_idx == DM910X) {
+                struct device_node *dp;
+
+                if (pdev->vendor == 0x1282 && pdev->device == 0x9100 &&
+                    pdev->revision < 0x30) {
+                        printk(KERN_INFO PFX
+                               "skipping early DM9100 with Crc bug (use dmfe)\n");
+                        return -ENODEV;
+                }
+
+                dp = pci_device_to_OF_node(pdev);
+                if (!(dp && of_get_property(dp, "local-mac-address", NULL))) {
+                        printk(KERN_INFO PFX
+                               "skipping DM910x expansion card (use dmfe)\n");
                         return -ENODEV;
                 }
         }
+#endif
 
         /*
          *      Looks for early PCI chipsets where people report hangs
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index 41ad2f3697c7..96bdc0b43889 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -3607,6 +3607,7 @@ static int ucc_geth_suspend(struct of_device *ofdev, pm_message_t state)
         if (!netif_running(ndev))
                 return 0;
 
+        netif_device_detach(ndev);
         napi_disable(&ugeth->napi);
 
         /*
@@ -3665,7 +3666,7 @@ static int ucc_geth_resume(struct of_device *ofdev)
         phy_start(ugeth->phydev);
 
         napi_enable(&ugeth->napi);
-        netif_start_queue(ndev);
+        netif_device_attach(ndev);
 
         return 0;
 }
diff --git a/drivers/net/ucc_geth.h b/drivers/net/ucc_geth.h
index a007e2acf651..ef1fbeb11c6e 100644
--- a/drivers/net/ucc_geth.h
+++ b/drivers/net/ucc_geth.h
@@ -838,13 +838,13 @@ struct ucc_geth_hardware_statistics {
                                                            using the maximum is
                                                            easier */
 #define UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT  32
-#define UCC_GETH_SCHEDULER_ALIGNMENT            4       /* This is a guess */
+#define UCC_GETH_SCHEDULER_ALIGNMENT            8       /* This is a guess */
 #define UCC_GETH_TX_STATISTICS_ALIGNMENT        4       /* This is a guess */
 #define UCC_GETH_RX_STATISTICS_ALIGNMENT        4       /* This is a guess */
 #define UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT      64
 #define UCC_GETH_RX_BD_QUEUES_ALIGNMENT         8       /* This is a guess */
 #define UCC_GETH_RX_PREFETCHED_BDS_ALIGNMENT    128     /* This is a guess */
-#define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 4    /* This
+#define UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT 8    /* This
                                                                            is a
                                                                            guess
                                                                          */
@@ -899,16 +899,17 @@ struct ucc_geth_hardware_statistics {
 #define UCC_GETH_UTFS_INIT                      512     /* Tx virtual FIFO size
                                                          */
 #define UCC_GETH_UTFET_INIT                     256     /* 1/2 utfs */
-#define UCC_GETH_UTFTT_INIT                     128
+#define UCC_GETH_UTFTT_INIT                     512
 /* Gigabit Ethernet (1000 Mbps) */
 #define UCC_GETH_URFS_GIGA_INIT                 4096/*2048*/    /* Rx virtual
                                                                    FIFO size */
 #define UCC_GETH_URFET_GIGA_INIT                2048/*1024*/    /* 1/2 urfs */
 #define UCC_GETH_URFSET_GIGA_INIT               3072/*1536*/    /* 3/4 urfs */
-#define UCC_GETH_UTFS_GIGA_INIT                 8192/*2048*/    /* Tx virtual
+#define UCC_GETH_UTFS_GIGA_INIT                 4096/*2048*/    /* Tx virtual
+                                                                   FIFO size */
+#define UCC_GETH_UTFET_GIGA_INIT                2048/*1024*/    /* 1/2 utfs */
+#define UCC_GETH_UTFTT_GIGA_INIT                4096/*0x40*/    /* Tx virtual
                                                                    FIFO size */
-#define UCC_GETH_UTFET_GIGA_INIT                4096/*1024*/    /* 1/2 utfs */
-#define UCC_GETH_UTFTT_GIGA_INIT                0x400/*0x40*/   /* */
 
 #define UCC_GETH_REMODER_INIT                   0       /* bits that must be
                                                            set */
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c
index f78f0903b073..6895f1531238 100644
--- a/drivers/net/usb/hso.c
+++ b/drivers/net/usb/hso.c
@@ -286,6 +286,7 @@ struct hso_device {
         u8 usb_gone;
         struct work_struct async_get_intf;
         struct work_struct async_put_intf;
+        struct work_struct reset_device;
 
         struct usb_device *usb;
         struct usb_interface *interface;
@@ -332,7 +333,8 @@ static void hso_kick_transmit(struct hso_serial *serial);
 /* Helper functions */
 static int hso_mux_submit_intr_urb(struct hso_shared_int *mux_int,
                                    struct usb_device *usb, gfp_t gfp);
-static void log_usb_status(int status, const char *function);
+static void handle_usb_error(int status, const char *function,
+                             struct hso_device *hso_dev);
 static struct usb_endpoint_descriptor *hso_get_ep(struct usb_interface *intf,
                                                   int type, int dir);
 static int hso_get_mux_ports(struct usb_interface *intf, unsigned char *ports);
@@ -350,6 +352,7 @@ static void async_put_intf(struct work_struct *data);
 static int hso_put_activity(struct hso_device *hso_dev);
 static int hso_get_activity(struct hso_device *hso_dev);
 static void tiocmget_intr_callback(struct urb *urb);
+static void reset_device(struct work_struct *data);
 /*****************************************************************************/
 /* Helping functions                                                         */
 /*****************************************************************************/
@@ -461,10 +464,17 @@ static const struct usb_device_id hso_ids[] = {
         {USB_DEVICE(0x0af0, 0x7501)},           /* GTM 382 */
         {USB_DEVICE(0x0af0, 0x7601)},           /* GE40x */
         {USB_DEVICE(0x0af0, 0x7701)},
+        {USB_DEVICE(0x0af0, 0x7706)},
         {USB_DEVICE(0x0af0, 0x7801)},
         {USB_DEVICE(0x0af0, 0x7901)},
+        {USB_DEVICE(0x0af0, 0x7A01)},
+        {USB_DEVICE(0x0af0, 0x7A05)},
         {USB_DEVICE(0x0af0, 0x8200)},
         {USB_DEVICE(0x0af0, 0x8201)},
+        {USB_DEVICE(0x0af0, 0x8300)},
+        {USB_DEVICE(0x0af0, 0x8302)},
+        {USB_DEVICE(0x0af0, 0x8304)},
+        {USB_DEVICE(0x0af0, 0x8400)},
         {USB_DEVICE(0x0af0, 0xd035)},
         {USB_DEVICE(0x0af0, 0xd055)},
         {USB_DEVICE(0x0af0, 0xd155)},
@@ -473,6 +483,8 @@ static const struct usb_device_id hso_ids[] = {
         {USB_DEVICE(0x0af0, 0xd157)},
         {USB_DEVICE(0x0af0, 0xd257)},
         {USB_DEVICE(0x0af0, 0xd357)},
+        {USB_DEVICE(0x0af0, 0xd058)},
+        {USB_DEVICE(0x0af0, 0xc100)},
         {}
 };
 MODULE_DEVICE_TABLE(usb, hso_ids);
@@ -655,8 +667,8 @@ static void set_serial_by_index(unsigned index, struct hso_serial *serial)
         spin_unlock_irqrestore(&serial_table_lock, flags);
 }
 
-/* log a meaningful explanation of an USB status */
-static void log_usb_status(int status, const char *function)
+static void handle_usb_error(int status, const char *function,
+                             struct hso_device *hso_dev)
 {
         char *explanation;
 
@@ -685,10 +697,20 @@ static void log_usb_status(int status, const char *function)
         case -EMSGSIZE:
                 explanation = "internal error";
                 break;
+        case -EILSEQ:
+        case -EPROTO:
+        case -ETIME:
+        case -ETIMEDOUT:
+                explanation = "protocol error";
+                if (hso_dev)
+                        schedule_work(&hso_dev->reset_device);
+                break;
         default:
                 explanation = "unknown status";
                 break;
         }
+
+        /* log a meaningful explanation of an USB status */
         D1("%s: received USB status - %s (%d)", function, explanation, status);
 }
 
@@ -762,7 +784,7 @@ static void write_bulk_callback(struct urb *urb)
         /* log status, but don't act on it, we don't need to resubmit anything
          * anyhow */
         if (status)
-                log_usb_status(status, __func__);
+                handle_usb_error(status, __func__, odev->parent);
 
         hso_put_activity(odev->parent);
 
@@ -806,7 +828,7 @@ static netdev_tx_t hso_net_start_xmit(struct sk_buff *skb,
         result = usb_submit_urb(odev->mux_bulk_tx_urb, GFP_ATOMIC);
         if (result) {
                 dev_warn(&odev->parent->interface->dev,
-                        "failed mux_bulk_tx_urb %d", result);
+                        "failed mux_bulk_tx_urb %d\n", result);
                 net->stats.tx_errors++;
                 netif_start_queue(net);
         } else {
@@ -998,7 +1020,7 @@ static void read_bulk_callback(struct urb *urb)
 
         /* is al ok?  (Filip: Who's Al ?) */
         if (status) {
-                log_usb_status(status, __func__);
+                handle_usb_error(status, __func__, odev->parent);
                 return;
         }
 
@@ -1019,7 +1041,8 @@ static void read_bulk_callback(struct urb *urb)
         if (odev->parent->port_spec & HSO_INFO_CRC_BUG) {
                 u32 rest;
                 u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF };
-                rest = urb->actual_length % odev->in_endp->wMaxPacketSize;
+                rest = urb->actual_length %
+                        le16_to_cpu(odev->in_endp->wMaxPacketSize);
                 if (((rest == 5) || (rest == 6)) &&
                     !memcmp(((u8 *) urb->transfer_buffer) +
                             urb->actual_length - 4, crc_check, 4)) {
@@ -1053,7 +1076,7 @@ static void read_bulk_callback(struct urb *urb)
         result = usb_submit_urb(urb, GFP_ATOMIC);
         if (result)
                 dev_warn(&odev->parent->interface->dev,
-                         "%s failed submit mux_bulk_rx_urb %d", __func__,
+                         "%s failed submit mux_bulk_rx_urb %d\n", __func__,
                          result);
 }
 
@@ -1207,7 +1230,7 @@ static void hso_std_serial_read_bulk_callback(struct urb *urb)
                 D1("serial == NULL");
                 return;
         } else if (status) {
-                log_usb_status(status, __func__);
+                handle_usb_error(status, __func__, serial->parent);
                 return;
         }
 
@@ -1225,7 +1248,7 @@ static void hso_std_serial_read_bulk_callback(struct urb *urb)
                         u8 crc_check[4] = { 0xDE, 0xAD, 0xBE, 0xEF };
                         rest =
                             urb->actual_length %
-                            serial->in_endp->wMaxPacketSize;
+                            le16_to_cpu(serial->in_endp->wMaxPacketSize);
                         if (((rest == 5) || (rest == 6)) &&
                             !memcmp(((u8 *) urb->transfer_buffer) +
                                     urb->actual_length - 4, crc_check, 4)) {
@@ -1513,7 +1536,7 @@ static void tiocmget_intr_callback(struct urb *urb)
         if (!serial)
                 return;
         if (status) {
-                log_usb_status(status, __func__);
+                handle_usb_error(status, __func__, serial->parent);
                 return;
         }
         tiocmget = serial->tiocmget;
@@ -1700,6 +1723,10 @@ static int hso_serial_tiocmset(struct tty_struct *tty, struct file *file,
                 D1("no tty structures");
                 return -EINVAL;
         }
+
+        if ((serial->parent->port_spec & HSO_PORT_MASK) != HSO_PORT_MODEM)
+                return -EINVAL;
+
         if_num = serial->parent->interface->altsetting->desc.bInterfaceNumber;
 
         spin_lock_irqsave(&serial->serial_lock, flags);
@@ -1838,7 +1865,7 @@ static int mux_device_request(struct hso_serial *serial, u8 type, u16 port,
         result = usb_submit_urb(ctrl_urb, GFP_ATOMIC);
         if (result) {
                 dev_err(&ctrl_urb->dev->dev,
-                        "%s failed submit ctrl_urb %d type %d", __func__,
+                        "%s failed submit ctrl_urb %d type %d\n", __func__,
                         result, type);
                 return result;
         }
@@ -1888,7 +1915,7 @@ static void intr_callback(struct urb *urb)
 
         /* status check */
         if (status) {
-                log_usb_status(status, __func__);
+                handle_usb_error(status, __func__, NULL);
                 return;
         }
         D4("\n--- Got intr callback 0x%02X ---", status);
@@ -1905,18 +1932,18 @@ static void intr_callback(struct urb *urb)
                         if (serial != NULL) {
                                 D1("Pending read interrupt on port %d\n", i);
                                 spin_lock(&serial->serial_lock);
-                                if (serial->rx_state == RX_IDLE) {
+                                if (serial->rx_state == RX_IDLE &&
+                                        serial->open_count > 0) {
                                         /* Setup and send a ctrl req read on
                                          * port i */
-                                if (!serial->rx_urb_filled[0]) {
+                                        if (!serial->rx_urb_filled[0]) {
                                                 serial->rx_state = RX_SENT;
                                                 hso_mux_serial_read(serial);
                                         } else
                                                 serial->rx_state = RX_PENDING;
-
                                 } else {
-                                        D1("Already pending a read on "
-                                           "port %d\n", i);
+                                        D1("Already a read pending on "
+                                           "port %d or port not open\n", i);
                                 }
                                 spin_unlock(&serial->serial_lock);
                         }
@@ -1958,7 +1985,7 @@ static void hso_std_serial_write_bulk_callback(struct urb *urb)
         tty = tty_kref_get(serial->tty);
         spin_unlock(&serial->serial_lock);
         if (status) {
-                log_usb_status(status, __func__);
+                handle_usb_error(status, __func__, serial->parent);
                 tty_kref_put(tty);
                 return;
         }
@@ -2014,7 +2041,7 @@ static void ctrl_callback(struct urb *urb)
         tty = tty_kref_get(serial->tty);
         spin_unlock(&serial->serial_lock);
         if (status) {
-                log_usb_status(status, __func__);
+                handle_usb_error(status, __func__, serial->parent);
                 tty_kref_put(tty);
                 return;
         }
@@ -2358,12 +2385,12 @@ static int hso_serial_common_create(struct hso_serial *serial, int num_urbs,
         serial->tx_data_length = tx_size;
         serial->tx_data = kzalloc(serial->tx_data_length, GFP_KERNEL);
         if (!serial->tx_data) {
-                dev_err(dev, "%s - Out of memory", __func__);
+                dev_err(dev, "%s - Out of memory\n", __func__);
                 goto exit;
         }
         serial->tx_buffer = kzalloc(serial->tx_data_length, GFP_KERNEL);
         if (!serial->tx_buffer) {
-                dev_err(dev, "%s - Out of memory", __func__);
+                dev_err(dev, "%s - Out of memory\n", __func__);
                 goto exit;
         }
 
@@ -2391,6 +2418,7 @@ static struct hso_device *hso_create_device(struct usb_interface *intf,
 
         INIT_WORK(&hso_dev->async_get_intf, async_get_intf);
         INIT_WORK(&hso_dev->async_put_intf, async_put_intf);
+        INIT_WORK(&hso_dev->reset_device, reset_device);
 
         return hso_dev;
 }
@@ -2831,13 +2859,14 @@ struct hso_shared_int *hso_create_shared_int(struct usb_interface *interface)
 
         mux->shared_intr_urb = usb_alloc_urb(0, GFP_KERNEL);
         if (!mux->shared_intr_urb) {
-                dev_err(&interface->dev, "Could not allocate intr urb?");
+                dev_err(&interface->dev, "Could not allocate intr urb?\n");
                 goto exit;
         }
-        mux->shared_intr_buf = kzalloc(mux->intr_endp->wMaxPacketSize,
-                                       GFP_KERNEL);
+        mux->shared_intr_buf =
+                kzalloc(le16_to_cpu(mux->intr_endp->wMaxPacketSize),
+                        GFP_KERNEL);
         if (!mux->shared_intr_buf) {
-                dev_err(&interface->dev, "Could not allocate intr buf?");
+                dev_err(&interface->dev, "Could not allocate intr buf?\n");
                 goto exit;
         }
 
@@ -3132,6 +3161,26 @@ out:
         return result;
 }
 
+static void reset_device(struct work_struct *data)
+{
+        struct hso_device *hso_dev =
+            container_of(data, struct hso_device, reset_device);
+        struct usb_device *usb = hso_dev->usb;
+        int result;
+
+        if (hso_dev->usb_gone) {
+                D1("No reset during disconnect\n");
+        } else {
+                result = usb_lock_device_for_reset(usb, hso_dev->interface);
+                if (result < 0)
+                        D1("unable to lock device for reset: %d\n", result);
+                else {
+                        usb_reset_device(usb);
+                        usb_unlock_device(usb);
+                }
+        }
+}
+
 static void hso_serial_ref_free(struct kref *ref)
 {
         struct hso_device *hso_dev = container_of(ref, struct hso_device, ref);
@@ -3232,13 +3281,13 @@ static int hso_mux_submit_intr_urb(struct hso_shared_int *shared_int,
                          usb_rcvintpipe(usb,
                                 shared_int->intr_endp->bEndpointAddress & 0x7F),
                          shared_int->shared_intr_buf,
-                         shared_int->intr_endp->wMaxPacketSize,
+                         1,
                          intr_callback, shared_int,
                          shared_int->intr_endp->bInterval);
 
         result = usb_submit_urb(shared_int->shared_intr_urb, gfp);
         if (result)
-                dev_warn(&usb->dev, "%s failed mux_intr_urb %d", __func__,
+                dev_warn(&usb->dev, "%s failed mux_intr_urb %d\n", __func__,
                         result);
 
         return result;
diff --git a/drivers/net/usb/rtl8150.c b/drivers/net/usb/rtl8150.c
index f14d225404da..fd19db0d2504 100644
--- a/drivers/net/usb/rtl8150.c
+++ b/drivers/net/usb/rtl8150.c
@@ -270,7 +270,7 @@ static int read_mii_word(rtl8150_t * dev, u8 phy, __u8 indx, u16 * reg)
                 get_registers(dev, PHYCNT, 1, data);
         } while ((data[0] & PHY_GO) && (i++ < MII_TIMEOUT));
 
-        if (i < MII_TIMEOUT) {
+        if (i <= MII_TIMEOUT) {
                 get_registers(dev, PHYDAT, 2, data);
                 *reg = data[0] | (data[1] << 8);
                 return 0;
@@ -295,7 +295,7 @@ static int write_mii_word(rtl8150_t * dev, u8 phy, __u8 indx, u16 reg)
                 get_registers(dev, PHYCNT, 1, data);
         } while ((data[0] & PHY_GO) && (i++ < MII_TIMEOUT));
 
-        if (i < MII_TIMEOUT)
+        if (i <= MII_TIMEOUT)
                 return 0;
         else
                 return 1;
diff --git a/drivers/net/via-velocity.c b/drivers/net/via-velocity.c
index 4ceb441f2687..c93f58f5c6f2 100644
--- a/drivers/net/via-velocity.c
+++ b/drivers/net/via-velocity.c
@@ -2237,8 +2237,6 @@ static int velocity_open(struct net_device *dev)
         /* Ensure chip is running */
         pci_set_power_state(vptr->pdev, PCI_D0);
 
-        velocity_give_many_rx_descs(vptr);
-
         velocity_init_registers(vptr, VELOCITY_INIT_COLD);
 
         ret = request_irq(vptr->pdev->irq, velocity_intr, IRQF_SHARED,
@@ -2250,6 +2248,8 @@ static int velocity_open(struct net_device *dev)
                 goto out;
         }
 
+        velocity_give_many_rx_descs(vptr);
+
         mac_enable_int(vptr->mac_regs);
         netif_start_queue(dev);
         napi_enable(&vptr->napi);
@@ -2339,10 +2339,10 @@ static int velocity_change_mtu(struct net_device *dev, int new_mtu)
 
                 dev->mtu = new_mtu;
 
-                velocity_give_many_rx_descs(vptr);
-
                 velocity_init_registers(vptr, VELOCITY_INIT_COLD);
 
+                velocity_give_many_rx_descs(vptr);
+
                 mac_enable_int(vptr->mac_regs);
                 netif_start_queue(dev);
 
diff --git a/drivers/net/vxge/vxge-main.c b/drivers/net/vxge/vxge-main.c
index 0fdfd58a35a1..b9685e82f7b6 100644
--- a/drivers/net/vxge/vxge-main.c
+++ b/drivers/net/vxge/vxge-main.c
@@ -310,7 +310,7 @@ static int vxge_rx_map(void *dtrh, struct vxge_ring *ring)
         dma_addr = pci_map_single(ring->pdev, rx_priv->skb_data,
                                 rx_priv->data_size, PCI_DMA_FROMDEVICE);
 
-        if (dma_addr == 0) {
+        if (unlikely(pci_dma_mapping_error(ring->pdev, dma_addr))) {
                 ring->stats.pci_map_fail++;
                 return -EIO;
         }
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index c5df94e86678..807224ec8351 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -75,7 +75,8 @@ static ssize_t local_cpus_show(struct device *dev,
         int len;
 
 #ifdef CONFIG_NUMA
-        mask = cpumask_of_node(dev_to_node(dev));
+        mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
+                                          cpumask_of_node(dev_to_node(dev));
 #else
         mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
 #endif
@@ -93,7 +94,8 @@ static ssize_t local_cpulist_show(struct device *dev,
         int len;
 
 #ifdef CONFIG_NUMA
-        mask = cpumask_of_node(dev_to_node(dev));
+        mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
+                                          cpumask_of_node(dev_to_node(dev));
 #else
         mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
 #endif
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index 0906599ebfde..315fea47e784 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -29,7 +29,17 @@ const char *pci_power_names[] = {
 };
 EXPORT_SYMBOL_GPL(pci_power_names);
 
-unsigned int pci_pm_d3_delay = PCI_PM_D3_WAIT;
+unsigned int pci_pm_d3_delay;
+
+static void pci_dev_d3_sleep(struct pci_dev *dev)
+{
+        unsigned int delay = dev->d3_delay;
+
+        if (delay < pci_pm_d3_delay)
+                delay = pci_pm_d3_delay;
+
+        msleep(delay);
+}
 
 #ifdef CONFIG_PCI_DOMAINS
 int pci_domains_supported = 1;
@@ -522,7 +532,7 @@ static int pci_raw_set_power_state(struct pci_dev *dev, pci_power_t state)
         /* Mandatory power management transition delays */
         /* see PCI PM 1.1 5.6.1 table 18 */
         if (state == PCI_D3hot || dev->current_state == PCI_D3hot)
-                msleep(pci_pm_d3_delay);
+                pci_dev_d3_sleep(dev);
         else if (state == PCI_D2 || dev->current_state == PCI_D2)
                 udelay(PCI_PM_D2_DELAY);
 
@@ -1409,6 +1419,7 @@ void pci_pm_init(struct pci_dev *dev)
         }
 
         dev->pm_cap = pm;
+        dev->d3_delay = PCI_PM_D3_WAIT;
 
         dev->d1_support = false;
         dev->d2_support = false;
@@ -2247,12 +2258,12 @@ static int pci_pm_reset(struct pci_dev *dev, int probe)
         csr &= ~PCI_PM_CTRL_STATE_MASK;
         csr |= PCI_D3hot;
         pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
-        msleep(pci_pm_d3_delay);
+        pci_dev_d3_sleep(dev);
 
         csr &= ~PCI_PM_CTRL_STATE_MASK;
         csr |= PCI_D0;
         pci_write_config_word(dev, dev->pm_cap + PCI_PM_CTRL, csr);
-        msleep(pci_pm_d3_delay);
+        pci_dev_d3_sleep(dev);
 
         return 0;
 }
diff --git a/drivers/pci/pcie/aer/aer_inject.c b/drivers/pci/pcie/aer/aer_inject.c
index 797d47809f7a..8c30a9544d61 100644
--- a/drivers/pci/pcie/aer/aer_inject.c
+++ b/drivers/pci/pcie/aer/aer_inject.c
@@ -321,7 +321,7 @@ static int aer_inject(struct aer_error_inj *einj)
         unsigned long flags;
         unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn);
         int pos_cap_err, rp_pos_cap_err;
-        u32 sever;
+        u32 sever, mask;
         int ret = 0;
 
         dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn);
@@ -374,6 +374,24 @@ static int aer_inject(struct aer_error_inj *einj)
         err->header_log2 = einj->header_log2;
         err->header_log3 = einj->header_log3;
 
+        pci_read_config_dword(dev, pos_cap_err + PCI_ERR_COR_MASK, &mask);
+        if (einj->cor_status && !(einj->cor_status & ~mask)) {
+                ret = -EINVAL;
+                printk(KERN_WARNING "The correctable error(s) is masked "
+                                "by device\n");
+                spin_unlock_irqrestore(&inject_lock, flags);
+                goto out_put;
+        }
+
+        pci_read_config_dword(dev, pos_cap_err + PCI_ERR_UNCOR_MASK, &mask);
+        if (einj->uncor_status && !(einj->uncor_status & ~mask)) {
+                ret = -EINVAL;
+                printk(KERN_WARNING "The uncorrectable error(s) is masked "
+                                "by device\n");
+                spin_unlock_irqrestore(&inject_lock, flags);
+                goto out_put;
+        }
+
         rperr = __find_aer_error_by_dev(rpdev);
         if (!rperr) {
                 rperr = rperr_alloc;
@@ -413,8 +431,14 @@ static int aer_inject(struct aer_error_inj *einj)
         if (ret)
                 goto out_put;
 
-        if (find_aer_device(rpdev, &edev))
+        if (find_aer_device(rpdev, &edev)) {
+                if (!get_service_data(edev)) {
+                        printk(KERN_WARNING "AER service is not initialized\n");
+                        ret = -EINVAL;
+                        goto out_put;
+                }
                 aer_irq(-1, edev);
+        }
         else
                 ret = -EINVAL;
 out_put:
diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c
index 413262eb95b7..b174188ac121 100644
--- a/drivers/pci/pcie/portdrv_core.c
+++ b/drivers/pci/pcie/portdrv_core.c
@@ -27,7 +27,7 @@
  */
 static void release_pcie_device(struct device *dev)
 {
-        kfree(to_pcie_device(dev));                     
+        kfree(to_pcie_device(dev));
 }
 
 /**
@@ -346,12 +346,11 @@ static int suspend_iter(struct device *dev, void *data)
 {
         struct pcie_port_service_driver *service_driver;
 
-        if ((dev->bus == &pcie_port_bus_type) &&
-            (dev->driver)) {
-                service_driver = to_service_driver(dev->driver);
-                if (service_driver->suspend)
-                        service_driver->suspend(to_pcie_device(dev));
-        }
+        if ((dev->bus == &pcie_port_bus_type) && dev->driver) {
+                service_driver = to_service_driver(dev->driver);
+                if (service_driver->suspend)
+                        service_driver->suspend(to_pcie_device(dev));
+        }
         return 0;
 }
 
@@ -494,6 +493,7 @@ int pcie_port_service_register(struct pcie_port_service_driver *new)
 
         return driver_register(&new->driver);
 }
+EXPORT_SYMBOL(pcie_port_service_register);
 
 /**
  * pcie_port_service_unregister - unregister PCI Express port service driver
@@ -503,6 +503,4 @@ void pcie_port_service_unregister(struct pcie_port_service_driver *drv)
 {
         driver_unregister(&drv->driver);
 }
-
-EXPORT_SYMBOL(pcie_port_service_register);
 EXPORT_SYMBOL(pcie_port_service_unregister);
diff --git a/drivers/pci/pcie/portdrv_pci.c b/drivers/pci/pcie/portdrv_pci.c
index 34d65172a4d7..13c8972886e6 100644
--- a/drivers/pci/pcie/portdrv_pci.c
+++ b/drivers/pci/pcie/portdrv_pci.c
@@ -63,7 +63,7 @@ static const struct dev_pm_ops pcie_portdrv_pm_ops = {
  * pcie_portdrv_probe - Probe PCI-Express port devices
  * @dev: PCI-Express port device being probed
  *
- * If detected invokes the pcie_port_device_register() method for 
+ * If detected invokes the pcie_port_device_register() method for
  * this port device.
  *
  */
@@ -78,7 +78,7 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
              (dev->pcie_type != PCI_EXP_TYPE_DOWNSTREAM)))
                 return -ENODEV;
 
-        if (!dev->irq && dev->pin) {
+        if (!dev->irq && dev->pin) {
                 dev_warn(&dev->dev, "device [%04x:%04x] has invalid IRQ; "
                          "check vendor BIOS\n", dev->vendor, dev->device);
         }
@@ -91,7 +91,7 @@ static int __devinit pcie_portdrv_probe(struct pci_dev *dev,
         return 0;
 }
 
-static void pcie_portdrv_remove (struct pci_dev *dev)
+static void pcie_portdrv_remove(struct pci_dev *dev)
 {
         pcie_port_device_remove(dev);
         pci_disable_device(dev);
@@ -129,14 +129,13 @@ static int error_detected_iter(struct device *device, void *data)
 static pci_ers_result_t pcie_portdrv_error_detected(struct pci_dev *dev,
                                         enum pci_channel_state error)
 {
-        struct aer_broadcast_data result_data =
-                        {error, PCI_ERS_RESULT_CAN_RECOVER};
-        int retval;
+        struct aer_broadcast_data data = {error, PCI_ERS_RESULT_CAN_RECOVER};
+        int ret;
 
         /* can not fail */
-        retval = device_for_each_child(&dev->dev, &result_data, error_detected_iter);
+        ret = device_for_each_child(&dev->dev, &data, error_detected_iter);
 
-        return result_data.result;
+        return data.result;
 }
 
 static int mmio_enabled_iter(struct device *device, void *data)
@@ -290,7 +289,7 @@ static int __init pcie_portdrv_init(void)
         return retval;
 }
 
-static void __exit pcie_portdrv_exit(void) 
+static void __exit pcie_portdrv_exit(void)
 {
         pci_unregister_driver(&pcie_portdriver);
         pcie_port_bus_unregister();
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c
index 5b648f0c6075..ad4c414dbfbc 100644
--- a/drivers/platform/x86/hp-wmi.c
+++ b/drivers/platform/x86/hp-wmi.c
@@ -393,8 +393,6 @@ static void hp_wmi_notify(u32 value, void *context)
         } else
                 printk(KERN_INFO "HP WMI: Unknown key pressed - %x\n",
                         eventcode);
-
-        kfree(obj);
 }
 
 static int __init hp_wmi_input_setup(void)
diff --git a/drivers/power/pmu_battery.c b/drivers/power/pmu_battery.c
index 9346a862f1f2..9c87ad564803 100644
--- a/drivers/power/pmu_battery.c
+++ b/drivers/power/pmu_battery.c
@@ -89,6 +89,8 @@ static int pmu_bat_get_property(struct power_supply *psy,
         case POWER_SUPPLY_PROP_STATUS:
                 if (pbi->flags & PMU_BATT_CHARGING)
                         val->intval = POWER_SUPPLY_STATUS_CHARGING;
+                else if (pmu_power_flags & PMU_PWR_AC_PRESENT)
+                        val->intval = POWER_SUPPLY_STATUS_FULL;
                 else
                         val->intval = POWER_SUPPLY_STATUS_DISCHARGING;
                 break;
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index c8c12325e69b..e9aa814ddd23 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -1096,9 +1096,9 @@ static int cmos_pnp_resume(struct pnp_dev *pnp)
 #define cmos_pnp_resume         NULL
 #endif
 
-static void cmos_pnp_shutdown(struct device *pdev)
+static void cmos_pnp_shutdown(struct pnp_dev *pnp)
 {
-        if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(pdev))
+        if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
                 return;
 
         cmos_do_shutdown();
@@ -1117,15 +1117,12 @@ static struct pnp_driver cmos_pnp_driver = {
         .id_table       = rtc_ids,
         .probe          = cmos_pnp_probe,
         .remove         = __exit_p(cmos_pnp_remove),
+        .shutdown       = cmos_pnp_shutdown,
 
         /* flag ensures resume() gets called, and stops syslog spam */
         .flags          = PNP_DRIVER_RES_DO_NOT_CHANGE,
         .suspend        = cmos_pnp_suspend,
         .resume         = cmos_pnp_resume,
-        .driver         = {
-                .name     = (char *)driver_name,
-                .shutdown = cmos_pnp_shutdown,
-        }
 };
 
 #endif  /* CONFIG_PNP */
diff --git a/drivers/s390/net/claw.c b/drivers/s390/net/claw.c
index 3c77bfe0764c..147bb1a69aba 100644
--- a/drivers/s390/net/claw.c
+++ b/drivers/s390/net/claw.c
@@ -3398,7 +3398,7 @@ claw_init(void)
                 goto out_err;
         }
         CLAW_DBF_TEXT(2, setup, "init_mod");
-        claw_root_dev = root_device_register("qeth");
+        claw_root_dev = root_device_register("claw");
         ret = IS_ERR(claw_root_dev) ? PTR_ERR(claw_root_dev) : 0;
         if (ret)
                 goto register_err;
diff --git a/drivers/scsi/cxgb3i/cxgb3i_offload.c b/drivers/scsi/cxgb3i/cxgb3i_offload.c
index 26ffdcd5a437..15a00e8b7122 100644
--- a/drivers/scsi/cxgb3i/cxgb3i_offload.c
+++ b/drivers/scsi/cxgb3i/cxgb3i_offload.c
@@ -1440,6 +1440,10 @@ void cxgb3i_c3cn_release(struct s3_conn *c3cn)
 static int is_cxgb3_dev(struct net_device *dev)
 {
         struct cxgb3i_sdev_data *cdata;
+        struct net_device *ndev = dev;
+
+        if (dev->priv_flags & IFF_802_1Q_VLAN)
+                ndev = vlan_dev_real_dev(dev);
 
         write_lock(&cdata_rwlock);
         list_for_each_entry(cdata, &cdata_list, list) {
@@ -1447,7 +1451,7 @@ static int is_cxgb3_dev(struct net_device *dev)
                 int i;
 
                 for (i = 0; i < ports->nports; i++)
-                        if (dev == ports->lldevs[i]) {
+                        if (ndev == ports->lldevs[i]) {
                                 write_unlock(&cdata_rwlock);
                                 return 1;
                         }
@@ -1566,6 +1570,26 @@ out_err:
         return -EINVAL;
 }
 
+/**
+ * cxgb3i_find_dev - find the interface associated with the given address
+ * @ipaddr: ip address
+ */
+static struct net_device *
+cxgb3i_find_dev(struct net_device *dev, __be32 ipaddr)
+{
+        struct flowi fl;
+        int err;
+        struct rtable *rt;
+
+        memset(&fl, 0, sizeof(fl));
+        fl.nl_u.ip4_u.daddr = ipaddr;
+
+        err = ip_route_output_key(dev ? dev_net(dev) : &init_net, &rt, &fl);
+        if (!err)
+                return (&rt->u.dst)->dev;
+
+        return NULL;
+}
 
 /**
  * cxgb3i_c3cn_connect - initiates an iscsi tcp connection to a given address
@@ -1581,6 +1605,7 @@ int cxgb3i_c3cn_connect(struct net_device *dev, struct s3_conn *c3cn,
         struct cxgb3i_sdev_data *cdata;
         struct t3cdev *cdev;
         __be32 sipv4;
+        struct net_device *dstdev;
         int err;
 
         c3cn_conn_debug("c3cn 0x%p, dev 0x%p.\n", c3cn, dev);
@@ -1591,6 +1616,13 @@ int cxgb3i_c3cn_connect(struct net_device *dev, struct s3_conn *c3cn,
         c3cn->daddr.sin_port = usin->sin_port;
         c3cn->daddr.sin_addr.s_addr = usin->sin_addr.s_addr;
 
+        dstdev = cxgb3i_find_dev(dev, usin->sin_addr.s_addr);
+        if (!dstdev || !is_cxgb3_dev(dstdev))
+                return -ENETUNREACH;
+
+        if (dstdev->priv_flags & IFF_802_1Q_VLAN)
+                dev = dstdev;
+
         rt = find_route(dev, c3cn->saddr.sin_addr.s_addr,
                         c3cn->daddr.sin_addr.s_addr,
                         c3cn->saddr.sin_port,
diff --git a/drivers/scsi/lpfc/lpfc_els.c b/drivers/scsi/lpfc/lpfc_els.c
index ce522702a6c1..2cc39684ce97 100644
--- a/drivers/scsi/lpfc/lpfc_els.c
+++ b/drivers/scsi/lpfc/lpfc_els.c
@@ -4142,8 +4142,8 @@ lpfc_els_rcv_rscn(struct lpfc_vport *vport, struct lpfc_iocbq *cmdiocb,
         spin_lock_irq(shost->host_lock);
         if (vport->fc_rscn_flush) {
                 /* Another thread is walking fc_rscn_id_list on this vport */
-                spin_unlock_irq(shost->host_lock);
                 vport->fc_flag |= FC_RSCN_DISCOVERY;
+                spin_unlock_irq(shost->host_lock);
                 /* Send back ACC */
                 lpfc_els_rsp_acc(vport, ELS_CMD_ACC, cmdiocb, ndlp, NULL);
                 return 0;
@@ -5948,8 +5948,8 @@ lpfc_cmpl_reg_new_vport(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
                                 lpfc_initial_fdisc(vport);
                         break;
                 }
-
         } else {
+                vport->vpi_state |= LPFC_VPI_REGISTERED;
                 if (vport == phba->pport)
                         if (phba->sli_rev < LPFC_SLI_REV4)
                                 lpfc_issue_fabric_reglogin(vport);
diff --git a/drivers/scsi/lpfc/lpfc_hbadisc.c b/drivers/scsi/lpfc/lpfc_hbadisc.c
index 3b9424427652..2445e399fd60 100755
--- a/drivers/scsi/lpfc/lpfc_hbadisc.c
+++ b/drivers/scsi/lpfc/lpfc_hbadisc.c
@@ -747,6 +747,10 @@ lpfc_linkdown(struct lpfc_hba *phba)
 
         if (phba->link_state == LPFC_LINK_DOWN)
                 return 0;
+
+        /* Block all SCSI stack I/Os */
+        lpfc_scsi_dev_block(phba);
+
         spin_lock_irq(&phba->hbalock);
         phba->fcf.fcf_flag &= ~(FCF_AVAILABLE | FCF_DISCOVERED);
         if (phba->link_state > LPFC_LINK_DOWN) {
@@ -1555,10 +1559,16 @@ lpfc_mbx_cmpl_read_fcf_record(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
          * to book keeping the FCFIs can be used.
          */
         if (shdr_status || shdr_add_status) {
-                lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
-                                "2521 READ_FCF_RECORD mailbox failed "
-                                "with status x%x add_status x%x, mbx\n",
-                                shdr_status, shdr_add_status);
+                if (shdr_status == STATUS_FCF_TABLE_EMPTY) {
+                        lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
+                                        "2726 READ_FCF_RECORD Indicates empty "
+                                        "FCF table.\n");
+                } else {
+                        lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
+                                        "2521 READ_FCF_RECORD mailbox failed "
+                                        "with status x%x add_status x%x, mbx\n",
+                                        shdr_status, shdr_add_status);
+                }
                 goto out;
         }
         /* Interpreting the returned information of FCF records */
@@ -1698,7 +1708,9 @@ lpfc_init_vpi_cmpl(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq)
                 lpfc_vport_set_state(vport, FC_VPORT_FAILED);
                 return;
         }
+        spin_lock_irq(&phba->hbalock);
         vport->fc_flag &= ~FC_VPORT_NEEDS_INIT_VPI;
+        spin_unlock_irq(&phba->hbalock);
 
         if (phba->link_flag & LS_NPIV_FAB_SUPPORTED)
                 lpfc_initial_fdisc(vport);
@@ -2259,7 +2271,10 @@ lpfc_mbx_cmpl_unreg_vpi(struct lpfc_hba *phba, LPFC_MBOXQ_t *pmb)
                                  mb->mbxStatus);
                 break;
         }
+        spin_lock_irq(&phba->hbalock);
         vport->vpi_state &= ~LPFC_VPI_REGISTERED;
+        vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
+        spin_unlock_irq(&phba->hbalock);
         vport->unreg_vpi_cmpl = VPORT_OK;
         mempool_free(pmb, phba->mbox_mem_pool);
         /*
@@ -4475,8 +4490,10 @@ lpfc_unregister_unused_fcf(struct lpfc_hba *phba)
                 (phba->sli3_options & LPFC_SLI3_NPIV_ENABLED))
                 for (i = 0; i <= phba->max_vports && vports[i] != NULL; i++) {
                         lpfc_mbx_unreg_vpi(vports[i]);
+                        spin_lock_irq(&phba->hbalock);
                         vports[i]->fc_flag |= FC_VPORT_NEEDS_INIT_VPI;
                         vports[i]->vpi_state &= ~LPFC_VPI_REGISTERED;
+                        spin_unlock_irq(&phba->hbalock);
                 }
         lpfc_destroy_vport_work_array(phba, vports);
 
diff --git a/drivers/scsi/lpfc/lpfc_hw4.h b/drivers/scsi/lpfc/lpfc_hw4.h
index 1585148a17e5..8a2a1c5935c6 100644..100755
--- a/drivers/scsi/lpfc/lpfc_hw4.h
+++ b/drivers/scsi/lpfc/lpfc_hw4.h
@@ -1013,7 +1013,7 @@ struct lpfc_mbx_wq_destroy {
 };
 
 #define LPFC_HDR_BUF_SIZE 128
-#define LPFC_DATA_BUF_SIZE 4096
+#define LPFC_DATA_BUF_SIZE 2048
 struct rq_context {
         uint32_t word0;
 #define lpfc_rq_context_rq_size_SHIFT   16
@@ -1371,6 +1371,7 @@ struct lpfc_mbx_query_fw_cfg {
 #define STATUS_ERROR_ACITMAIN                           0x2a
 #define STATUS_REBOOT_REQUIRED                          0x2c
 #define STATUS_FCF_IN_USE                               0x3a
+#define STATUS_FCF_TABLE_EMPTY                          0x43
 
 struct lpfc_mbx_sli4_config {
         struct mbox_header header;
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c
index d4da6bdd0e73..b8eb1b6e5e77 100644
--- a/drivers/scsi/lpfc/lpfc_init.c
+++ b/drivers/scsi/lpfc/lpfc_init.c
@@ -3006,6 +3006,7 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
         struct lpfc_vport *vport;
         struct lpfc_nodelist *ndlp;
         struct Scsi_Host  *shost;
+        uint32_t link_state;
 
         phba->fc_eventTag = acqe_fcoe->event_tag;
         phba->fcoe_eventtag = acqe_fcoe->event_tag;
@@ -3052,9 +3053,12 @@ lpfc_sli4_async_fcoe_evt(struct lpfc_hba *phba,
                         break;
                 /*
                  * Currently, driver support only one FCF - so treat this as
-                 * a link down.
+                 * a link down, but save the link state because we don't want
+                 * it to be changed to Link Down unless it is already down.
                  */
+                link_state = phba->link_state;
                 lpfc_linkdown(phba);
+                phba->link_state = link_state;
                 /* Unregister FCF if no devices connected to it */
                 lpfc_unregister_unused_fcf(phba);
                 break;
@@ -7226,8 +7230,6 @@ lpfc_prep_dev_for_perm_failure(struct lpfc_hba *phba)
 {
         lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
                         "2711 PCI channel permanent disable for failure\n");
-        /* Block all SCSI devices' I/Os on the host */
-        lpfc_scsi_dev_block(phba);
         /* Clean up all driver's outstanding SCSI I/Os */
         lpfc_sli_flush_fcp_rings(phba);
 }
@@ -7256,6 +7258,9 @@ lpfc_io_error_detected_s3(struct pci_dev *pdev, pci_channel_state_t state)
         struct Scsi_Host *shost = pci_get_drvdata(pdev);
         struct lpfc_hba *phba = ((struct lpfc_vport *)shost->hostdata)->phba;
 
+        /* Block all SCSI devices' I/Os on the host */
+        lpfc_scsi_dev_block(phba);
+
         switch (state) {
         case pci_channel_io_normal:
                 /* Non-fatal error, prepare for recovery */
@@ -7507,6 +7512,9 @@ lpfc_pci_probe_one_s4(struct pci_dev *pdev, const struct pci_device_id *pid)
                         error = -ENODEV;
                         goto out_free_sysfs_attr;
                 }
+                /* Default to single FCP EQ for non-MSI-X */
+                if (phba->intr_type != MSIX)
+                        phba->cfg_fcp_eq_count = 1;
                 /* Set up SLI-4 HBA */
                 if (lpfc_sli4_hba_setup(phba)) {
                         lpfc_printf_log(phba, KERN_ERR, LOG_INIT,
diff --git a/drivers/scsi/lpfc/lpfc_sli.c b/drivers/scsi/lpfc/lpfc_sli.c
index 7935667b81a5..589549b2bf0e 100644
--- a/drivers/scsi/lpfc/lpfc_sli.c
+++ b/drivers/scsi/lpfc/lpfc_sli.c
@@ -1383,7 +1383,7 @@ lpfc_sli_hbq_to_firmware_s4(struct lpfc_hba *phba, uint32_t hbqno,
 /* HBQ for ELS and CT traffic. */
 static struct lpfc_hbq_init lpfc_els_hbq = {
         .rn = 1,
-        .entry_count = 200,
+        .entry_count = 256,
         .mask_count = 0,
         .profile = 0,
         .ring_mask = (1 << LPFC_ELS_RING),
@@ -1482,8 +1482,11 @@ err:
 int
 lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
 {
-        return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
-                                         lpfc_hbq_defs[qno]->add_count));
+        if (phba->sli_rev == LPFC_SLI_REV4)
+                return 0;
+        else
+                return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
+                                         lpfc_hbq_defs[qno]->add_count);
 }
 
 /**
@@ -1498,8 +1501,12 @@ lpfc_sli_hbqbuf_add_hbqs(struct lpfc_hba *phba, uint32_t qno)
 static int
 lpfc_sli_hbqbuf_init_hbqs(struct lpfc_hba *phba, uint32_t qno)
 {
-        return(lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
-                                         lpfc_hbq_defs[qno]->init_count));
+        if (phba->sli_rev == LPFC_SLI_REV4)
+                return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
+                                         lpfc_hbq_defs[qno]->entry_count);
+        else
+                return lpfc_sli_hbqbuf_fill_hbqs(phba, qno,
+                                         lpfc_hbq_defs[qno]->init_count);
 }
 
 /**
@@ -4110,6 +4117,7 @@ lpfc_sli4_read_rev(struct lpfc_hba *phba, LPFC_MBOXQ_t *mboxq,
         if (rc) {
                 dma_free_coherent(&phba->pcidev->dev, dma_size,
                                   dmabuf->virt, dmabuf->phys);
+                kfree(dmabuf);
                 return -EIO;
         }
 
@@ -5848,7 +5856,6 @@ lpfc_sli4_iocb2wqe(struct lpfc_hba *phba, struct lpfc_iocbq *iocbq,
                                         iocbq->iocb.un.ulpWord[3]);
                 wqe->generic.word3 = 0;
                 bf_set(wqe_rcvoxid, &wqe->generic, iocbq->iocb.ulpContext);
-                bf_set(wqe_xc, &wqe->generic, 1);
                 /* The entire sequence is transmitted for this IOCB */
                 xmit_len = total_len;
                 cmnd = CMD_XMIT_SEQUENCE64_CR;
@@ -10944,7 +10951,8 @@ lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
                 return dmabuf;
         }
         temp_hdr = seq_dmabuf->hbuf.virt;
-        if (new_hdr->fh_seq_cnt < temp_hdr->fh_seq_cnt) {
+        if (be16_to_cpu(new_hdr->fh_seq_cnt) <
+                be16_to_cpu(temp_hdr->fh_seq_cnt)) {
                 list_del_init(&seq_dmabuf->hbuf.list);
                 list_add_tail(&dmabuf->hbuf.list, &vport->rcv_buffer_list);
                 list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
@@ -10955,6 +10963,11 @@ lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
         list_move_tail(&seq_dmabuf->hbuf.list, &vport->rcv_buffer_list);
         seq_dmabuf->time_stamp = jiffies;
         lpfc_update_rcv_time_stamp(vport);
+        if (list_empty(&seq_dmabuf->dbuf.list)) {
+                temp_hdr = dmabuf->hbuf.virt;
+                list_add_tail(&dmabuf->dbuf.list, &seq_dmabuf->dbuf.list);
+                return seq_dmabuf;
+        }
         /* find the correct place in the sequence to insert this frame */
         list_for_each_entry_reverse(d_buf, &seq_dmabuf->dbuf.list, list) {
                 temp_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
@@ -10963,7 +10976,8 @@ lpfc_fc_frame_add(struct lpfc_vport *vport, struct hbq_dmabuf *dmabuf)
                  * If the frame's sequence count is greater than the frame on
                  * the list then insert the frame right after this frame
                  */
-                if (new_hdr->fh_seq_cnt > temp_hdr->fh_seq_cnt) {
+                if (be16_to_cpu(new_hdr->fh_seq_cnt) >
+                        be16_to_cpu(temp_hdr->fh_seq_cnt)) {
                         list_add(&dmabuf->dbuf.list, &temp_dmabuf->dbuf.list);
                         return seq_dmabuf;
                 }
@@ -11210,7 +11224,7 @@ lpfc_seq_complete(struct hbq_dmabuf *dmabuf)
                 seq_dmabuf = container_of(d_buf, struct hbq_dmabuf, dbuf);
                 hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
                 /* If there is a hole in the sequence count then fail. */
-                if (++seq_count != hdr->fh_seq_cnt)
+                if (++seq_count != be16_to_cpu(hdr->fh_seq_cnt))
                         return 0;
                 fctl = (hdr->fh_f_ctl[0] << 16 |
                         hdr->fh_f_ctl[1] << 8 |
@@ -11242,6 +11256,7 @@ lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
         struct lpfc_iocbq *first_iocbq, *iocbq;
         struct fc_frame_header *fc_hdr;
         uint32_t sid;
+        struct ulp_bde64 *pbde;
 
         fc_hdr = (struct fc_frame_header *)seq_dmabuf->hbuf.virt;
         /* remove from receive buffer list */
@@ -11283,8 +11298,9 @@ lpfc_prep_seq(struct lpfc_vport *vport, struct hbq_dmabuf *seq_dmabuf)
                 if (!iocbq->context3) {
                         iocbq->context3 = d_buf;
                         iocbq->iocb.ulpBdeCount++;
-                        iocbq->iocb.unsli3.rcvsli3.bde2.tus.f.bdeSize =
-                                                        LPFC_DATA_BUF_SIZE;
+                        pbde = (struct ulp_bde64 *)
+                                        &iocbq->iocb.unsli3.sli3Words[4];
+                        pbde->tus.f.bdeSize = LPFC_DATA_BUF_SIZE;
                         first_iocbq->iocb.unsli3.rcvsli3.acc_len +=
                                 bf_get(lpfc_rcqe_length,
                                        &seq_dmabuf->cq_event.cqe.rcqe_cmpl);
@@ -11401,15 +11417,9 @@ lpfc_sli4_handle_received_buffer(struct lpfc_hba *phba,
                 return;
         }
         /* If not last frame in sequence continue processing frames. */
-        if (!lpfc_seq_complete(seq_dmabuf)) {
-                /*
-                 * When saving off frames post a new one and mark this
-                 * frame to be freed when it is finished.
-                 **/
-                lpfc_sli_hbqbuf_fill_hbqs(phba, LPFC_ELS_HBQ, 1);
-                dmabuf->tag = -1;
+        if (!lpfc_seq_complete(seq_dmabuf))
                 return;
-        }
+
         /* Send the complete sequence to the upper layer protocol */
         lpfc_sli4_send_seq_to_ulp(vport, seq_dmabuf);
 }
diff --git a/drivers/scsi/lpfc/lpfc_sli4.h b/drivers/scsi/lpfc/lpfc_sli4.h
index 25d66d070cf8..44e5f574236b 100644
--- a/drivers/scsi/lpfc/lpfc_sli4.h
+++ b/drivers/scsi/lpfc/lpfc_sli4.h
@@ -28,7 +28,7 @@
 /* Multi-queue arrangement for fast-path FCP work queues */
 #define LPFC_FN_EQN_MAX       8
 #define LPFC_SP_EQN_DEF       1
-#define LPFC_FP_EQN_DEF       1
+#define LPFC_FP_EQN_DEF       4
 #define LPFC_FP_EQN_MIN       1
 #define LPFC_FP_EQN_MAX       (LPFC_FN_EQN_MAX - LPFC_SP_EQN_DEF)
 
diff --git a/drivers/scsi/lpfc/lpfc_version.h b/drivers/scsi/lpfc/lpfc_version.h
index c7f3aed2aab8..792f72263f1a 100644
--- a/drivers/scsi/lpfc/lpfc_version.h
+++ b/drivers/scsi/lpfc/lpfc_version.h
@@ -18,7 +18,7 @@
  * included with this package.                                     *
  *******************************************************************/
 
-#define LPFC_DRIVER_VERSION "8.3.6"
+#define LPFC_DRIVER_VERSION "8.3.7"
 #define LPFC_DRIVER_NAME                "lpfc"
 #define LPFC_SP_DRIVER_HANDLER_NAME     "lpfc:sp"
 #define LPFC_FP_DRIVER_HANDLER_NAME     "lpfc:fp"
diff --git a/drivers/scsi/lpfc/lpfc_vport.c b/drivers/scsi/lpfc/lpfc_vport.c
index 7d6dd83d3592..e3c7fa642306 100644
--- a/drivers/scsi/lpfc/lpfc_vport.c
+++ b/drivers/scsi/lpfc/lpfc_vport.c
@@ -512,8 +512,10 @@ enable_vport(struct fc_vport *fc_vport)
                 return VPORT_OK;
         }
 
+        spin_lock_irq(&phba->hbalock);
         vport->load_flag |= FC_LOADING;
         vport->fc_flag |= FC_VPORT_NEEDS_REG_VPI;
+        spin_unlock_irq(&phba->hbalock);
 
         /* Use the Physical nodes Fabric NDLP to determine if the link is
          * up and ready to FDISC.
@@ -700,7 +702,7 @@ lpfc_vport_delete(struct fc_vport *fc_vport)
                         }
                         spin_unlock_irq(&phba->ndlp_lock);
                 }
-                if (vport->vpi_state != LPFC_VPI_REGISTERED)
+                if (!(vport->vpi_state & LPFC_VPI_REGISTERED))
                         goto skip_logo;
                 vport->unreg_vpi_cmpl = VPORT_INVAL;
                 timeout = msecs_to_jiffies(phba->fc_ratov * 2000);
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c
index 99ff99e45bee..708ea3157b60 100644
--- a/drivers/scsi/megaraid/megaraid_sas.c
+++ b/drivers/scsi/megaraid/megaraid_sas.c
@@ -4046,7 +4046,7 @@ megasas_aen_polling(struct work_struct *work)
 }
 
 
-static DRIVER_ATTR(poll_mode_io, S_IRUGO|S_IWUGO,
+static DRIVER_ATTR(poll_mode_io, S_IRUGO|S_IWUSR,
                 megasas_sysfs_show_poll_mode_io,
                 megasas_sysfs_set_poll_mode_io);
 
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c
index e7d2688fbeba..b6f1ef954af1 100644
--- a/drivers/scsi/pmcraid.c
+++ b/drivers/scsi/pmcraid.c
@@ -2483,14 +2483,12 @@ static int pmcraid_error_handler(struct pmcraid_cmd *cmd)
                         sense_copied = 1;
                 }
 
-                if (RES_IS_GSCSI(res->cfg_entry)) {
+                if (RES_IS_GSCSI(res->cfg_entry))
                         pmcraid_cancel_all(cmd, sense_copied);
-                } else if (sense_copied) {
+                else if (sense_copied)
                         pmcraid_erp_done(cmd);
-                        return 0;
-                } else  {
+                else
                         pmcraid_request_sense(cmd);
-                }
 
                 return 1;
 
diff --git a/drivers/scsi/qla2xxx/qla_attr.c b/drivers/scsi/qla2xxx/qla_attr.c
index 21e2bc4d7401..3a9f5b288aee 100644
--- a/drivers/scsi/qla2xxx/qla_attr.c
+++ b/drivers/scsi/qla2xxx/qla_attr.c
@@ -232,6 +232,9 @@ qla2x00_sysfs_write_optrom_ctl(struct kobject *kobj,
         if (off)
                 return 0;
 
+        if (unlikely(pci_channel_offline(ha->pdev)))
+                return 0;
+
         if (sscanf(buf, "%d:%x:%x", &val, &start, &size) < 1)
                 return -EINVAL;
         if (start > ha->optrom_size)
@@ -379,6 +382,9 @@ qla2x00_sysfs_read_vpd(struct kobject *kobj,
             struct device, kobj)));
         struct qla_hw_data *ha = vha->hw;
 
+        if (unlikely(pci_channel_offline(ha->pdev)))
+                return 0;
+
         if (!capable(CAP_SYS_ADMIN))
                 return 0;
 
@@ -398,6 +404,9 @@ qla2x00_sysfs_write_vpd(struct kobject *kobj,
         struct qla_hw_data *ha = vha->hw;
         uint8_t *tmp_data;
 
+        if (unlikely(pci_channel_offline(ha->pdev)))
+                return 0;
+
         if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size ||
             !ha->isp_ops->write_nvram)
                 return 0;
@@ -1238,10 +1247,11 @@ qla2x00_fw_state_show(struct device *dev, struct device_attribute *attr,
     char *buf)
 {
         scsi_qla_host_t *vha = shost_priv(class_to_shost(dev));
-        int rval;
+        int rval = QLA_FUNCTION_FAILED;
         uint16_t state[5];
 
-        rval = qla2x00_get_firmware_state(vha, state);
+        if (!vha->hw->flags.eeh_busy)
+                rval = qla2x00_get_firmware_state(vha, state);
         if (rval != QLA_SUCCESS)
                 memset(state, -1, sizeof(state));
 
@@ -1452,10 +1462,13 @@ qla2x00_dev_loss_tmo_callbk(struct fc_rport *rport)
         if (!fcport)
                 return;
 
-        if (unlikely(pci_channel_offline(fcport->vha->hw->pdev)))
+        if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags))
+                return;
+
+        if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) {
                 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16);
-        else
-                qla2x00_abort_fcport_cmds(fcport);
+                return;
+        }
 
         /*
          * Transport has effectively 'deleted' the rport, clear
@@ -1475,6 +1488,9 @@ qla2x00_terminate_rport_io(struct fc_rport *rport)
         if (!fcport)
                 return;
 
+        if (test_bit(ABORT_ISP_ACTIVE, &fcport->vha->dpc_flags))
+                return;
+
         if (unlikely(pci_channel_offline(fcport->vha->hw->pdev))) {
                 qla2x00_abort_all_cmds(fcport->vha, DID_NO_CONNECT << 16);
                 return;
@@ -1515,6 +1531,12 @@ qla2x00_get_fc_host_stats(struct Scsi_Host *shost)
         pfc_host_stat = &ha->fc_host_stat;
         memset(pfc_host_stat, -1, sizeof(struct fc_host_statistics));
 
+        if (test_bit(UNLOADING, &vha->dpc_flags))
+                goto done;
+
+        if (unlikely(pci_channel_offline(ha->pdev)))
+                goto done;
+
         stats = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &stats_dma);
         if (stats == NULL) {
                 DEBUG2_3_11(printk("%s(%ld): Failed to allocate memory.\n",
diff --git a/drivers/scsi/qla2xxx/qla_dbg.h b/drivers/scsi/qla2xxx/qla_dbg.h
index f660dd70b72e..d6d9c86cb058 100644
--- a/drivers/scsi/qla2xxx/qla_dbg.h
+++ b/drivers/scsi/qla2xxx/qla_dbg.h
@@ -26,7 +26,7 @@
 /* #define QL_DEBUG_LEVEL_14 */ /* Output RSCN trace msgs */
 /* #define QL_DEBUG_LEVEL_15 */ /* Output NPIV trace msgs */
 /* #define QL_DEBUG_LEVEL_16 */ /* Output ISP84XX trace msgs */
-/* #define QL_DEBUG_LEVEL_17 */ /* Output MULTI-Q trace messages */
+/* #define QL_DEBUG_LEVEL_17 */ /* Output EEH trace messages */
 
 /*
 * Macros use for debugging the driver.
@@ -132,6 +132,13 @@
 #else
 #define DEBUG16(x)      do {} while (0)
 #endif
+
+#if defined(QL_DEBUG_LEVEL_17)
+#define DEBUG17(x)      do {x;} while (0)
+#else
+#define DEBUG17(x)      do {} while (0)
+#endif
+
 /*
  * Firmware Dump structure definition
  */
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h
index 384afda7dbe9..608e675f68c8 100644
--- a/drivers/scsi/qla2xxx/qla_def.h
+++ b/drivers/scsi/qla2xxx/qla_def.h
@@ -2256,11 +2256,13 @@ struct qla_hw_data {
                 uint32_t        disable_serdes          :1;
                 uint32_t        gpsc_supported          :1;
                 uint32_t        npiv_supported          :1;
+                uint32_t        pci_channel_io_perm_failure     :1;
                 uint32_t        fce_enabled             :1;
                 uint32_t        fac_supported           :1;
                 uint32_t        chip_reset_done         :1;
                 uint32_t        port0                   :1;
                 uint32_t        running_gold_fw         :1;
+                uint32_t        eeh_busy                :1;
                 uint32_t        cpu_affinity_enabled    :1;
                 uint32_t        disable_msix_handshake  :1;
         } flags;
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h
index 0b6801fc6389..f61fb8d01330 100644
--- a/drivers/scsi/qla2xxx/qla_gbl.h
+++ b/drivers/scsi/qla2xxx/qla_gbl.h
@@ -324,6 +324,7 @@ qla2x00_read_ram_word(scsi_qla_host_t *, uint32_t, uint32_t *);
 extern int
 qla2x00_write_ram_word(scsi_qla_host_t *, uint32_t, uint32_t);
 
+extern int qla2x00_get_data_rate(scsi_qla_host_t *);
 /*
  * Global Function Prototypes in qla_isr.c source file.
  */
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c
index 73a793539d45..b4a0eac8f96d 100644
--- a/drivers/scsi/qla2xxx/qla_init.c
+++ b/drivers/scsi/qla2xxx/qla_init.c
@@ -269,6 +269,8 @@ qla2x00_initialize_adapter(scsi_qla_host_t *vha)
         vha->flags.online = 0;
         ha->flags.chip_reset_done = 0;
         vha->flags.reset_active = 0;
+        ha->flags.pci_channel_io_perm_failure = 0;
+        ha->flags.eeh_busy = 0;
         atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
         atomic_set(&vha->loop_state, LOOP_DOWN);
         vha->device_flags = DFLG_NO_CABLE;
@@ -581,6 +583,9 @@ qla2x00_reset_chip(scsi_qla_host_t *vha)
         uint32_t        cnt;
         uint16_t        cmd;
 
+        if (unlikely(pci_channel_offline(ha->pdev)))
+                return;
+
         ha->isp_ops->disable_intrs(ha);
 
         spin_lock_irqsave(&ha->hardware_lock, flags);
@@ -786,6 +791,12 @@ void
 qla24xx_reset_chip(scsi_qla_host_t *vha)
 {
         struct qla_hw_data *ha = vha->hw;
+
+        if (pci_channel_offline(ha->pdev) &&
+            ha->flags.pci_channel_io_perm_failure) {
+                return;
+        }
+
         ha->isp_ops->disable_intrs(ha);
 
         /* Perform RISC reset. */
@@ -2266,6 +2277,8 @@ qla2x00_configure_loop(scsi_qla_host_t *vha)
         clear_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
         clear_bit(RSCN_UPDATE, &vha->dpc_flags);
 
+        qla2x00_get_data_rate(vha);
+
         /* Determine what we need to do */
         if (ha->current_topology == ISP_CFG_FL &&
             (test_bit(LOCAL_LOOP_UPDATE, &flags))) {
@@ -3560,6 +3573,13 @@ qla2x00_abort_isp(scsi_qla_host_t *vha)
                 /* Requeue all commands in outstanding command list. */
                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
 
+                if (unlikely(pci_channel_offline(ha->pdev) &&
+                    ha->flags.pci_channel_io_perm_failure)) {
+                        clear_bit(ISP_ABORT_RETRY, &vha->dpc_flags);
+                        status = 0;
+                        return status;
+                }
+
                 ha->isp_ops->get_flash_version(vha, req->ring);
 
                 ha->isp_ops->nvram_config(vha);
@@ -4458,6 +4478,8 @@ qla2x00_try_to_stop_firmware(scsi_qla_host_t *vha)
         int ret, retries;
         struct qla_hw_data *ha = vha->hw;
 
+        if (ha->flags.pci_channel_io_perm_failure)
+                return;
         if (!IS_FWI2_CAPABLE(ha))
                 return;
         if (!ha->fw_major_version)
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c
index 1692a883f4de..ffd0efdff40e 100644
--- a/drivers/scsi/qla2xxx/qla_isr.c
+++ b/drivers/scsi/qla2xxx/qla_isr.c
@@ -152,7 +152,7 @@ qla2300_intr_handler(int irq, void *dev_id)
         for (iter = 50; iter--; ) {
                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
                 if (stat & HSR_RISC_PAUSED) {
-                        if (pci_channel_offline(ha->pdev))
+                        if (unlikely(pci_channel_offline(ha->pdev)))
                                 break;
 
                         hccr = RD_REG_WORD(&reg->hccr);
@@ -1846,12 +1846,15 @@ qla24xx_intr_handler(int irq, void *dev_id)
         reg = &ha->iobase->isp24;
         status = 0;
 
+        if (unlikely(pci_channel_offline(ha->pdev)))
+                return IRQ_HANDLED;
+
         spin_lock_irqsave(&ha->hardware_lock, flags);
         vha = pci_get_drvdata(ha->pdev);
         for (iter = 50; iter--; ) {
                 stat = RD_REG_DWORD(&reg->host_status);
                 if (stat & HSRX_RISC_PAUSED) {
-                        if (pci_channel_offline(ha->pdev))
+                        if (unlikely(pci_channel_offline(ha->pdev)))
                                 break;
 
                         hccr = RD_REG_DWORD(&reg->hccr);
@@ -1992,7 +1995,7 @@ qla24xx_msix_default(int irq, void *dev_id)
         do {
                 stat = RD_REG_DWORD(&reg->host_status);
                 if (stat & HSRX_RISC_PAUSED) {
-                        if (pci_channel_offline(ha->pdev))
+                        if (unlikely(pci_channel_offline(ha->pdev)))
                                 break;
 
                         hccr = RD_REG_DWORD(&reg->hccr);
diff --git a/drivers/scsi/qla2xxx/qla_mbx.c b/drivers/scsi/qla2xxx/qla_mbx.c
index 05d595d9a7ef..056e4d4505f3 100644
--- a/drivers/scsi/qla2xxx/qla_mbx.c
+++ b/drivers/scsi/qla2xxx/qla_mbx.c
@@ -56,6 +56,12 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
 
         DEBUG11(printk("%s(%ld): entered.\n", __func__, base_vha->host_no));
 
+        if (ha->flags.pci_channel_io_perm_failure) {
+                DEBUG(printk("%s(%ld): Perm failure on EEH, timeout MBX "
+                             "Exiting.\n", __func__, vha->host_no));
+                return QLA_FUNCTION_TIMEOUT;
+        }
+
         /*
          * Wait for active mailbox commands to finish by waiting at most tov
          * seconds. This is to serialize actual issuing of mailbox cmds during
@@ -154,10 +160,14 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
                         /* Check for pending interrupts. */
                         qla2x00_poll(ha->rsp_q_map[0]);
 
-                        if (command != MBC_LOAD_RISC_RAM_EXTENDED &&
-                            !ha->flags.mbox_int)
+                        if (!ha->flags.mbox_int &&
+                            !(IS_QLA2200(ha) &&
+                            command == MBC_LOAD_RISC_RAM_EXTENDED))
                                 msleep(10);
                 } /* while */
+                DEBUG17(qla_printk(KERN_WARNING, ha,
+                        "Waited %d sec\n",
+                        (uint)((jiffies - (wait_time - (mcp->tov * HZ)))/HZ)));
         }
 
         /* Check whether we timed out */
@@ -227,7 +237,8 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
 
         if (rval == QLA_FUNCTION_TIMEOUT &&
             mcp->mb[0] != MBC_GEN_SYSTEM_ERROR) {
-                if (!io_lock_on || (mcp->flags & IOCTL_CMD)) {
+                if (!io_lock_on || (mcp->flags & IOCTL_CMD) ||
+                    ha->flags.eeh_busy) {
                         /* not in dpc. schedule it for dpc to take over. */
                         DEBUG(printk("%s(%ld): timeout schedule "
                         "isp_abort_needed.\n", __func__,
@@ -237,7 +248,7 @@ qla2x00_mailbox_command(scsi_qla_host_t *vha, mbx_cmd_t *mcp)
                         base_vha->host_no));
                         qla_printk(KERN_WARNING, ha,
                             "Mailbox command timeout occurred. Scheduling ISP "
-                            "abort.\n");
+                            "abort. eeh_busy: 0x%x\n", ha->flags.eeh_busy);
                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
                         qla2xxx_wake_dpc(vha);
                 } else if (!abort_active) {
@@ -2530,6 +2541,9 @@ qla2x00_enable_eft_trace(scsi_qla_host_t *vha, dma_addr_t eft_dma,
         if (!IS_FWI2_CAPABLE(vha->hw))
                 return QLA_FUNCTION_FAILED;
 
+        if (unlikely(pci_channel_offline(vha->hw->pdev)))
+                return QLA_FUNCTION_FAILED;
+
         DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
 
         mcp->mb[0] = MBC_TRACE_CONTROL;
@@ -2565,6 +2579,9 @@ qla2x00_disable_eft_trace(scsi_qla_host_t *vha)
         if (!IS_FWI2_CAPABLE(vha->hw))
                 return QLA_FUNCTION_FAILED;
 
+        if (unlikely(pci_channel_offline(vha->hw->pdev)))
+                return QLA_FUNCTION_FAILED;
+
         DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
 
         mcp->mb[0] = MBC_TRACE_CONTROL;
@@ -2595,6 +2612,9 @@ qla2x00_enable_fce_trace(scsi_qla_host_t *vha, dma_addr_t fce_dma,
         if (!IS_QLA25XX(vha->hw) && !IS_QLA81XX(vha->hw))
                 return QLA_FUNCTION_FAILED;
 
+        if (unlikely(pci_channel_offline(vha->hw->pdev)))
+                return QLA_FUNCTION_FAILED;
+
         DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
 
         mcp->mb[0] = MBC_TRACE_CONTROL;
@@ -2639,6 +2659,9 @@ qla2x00_disable_fce_trace(scsi_qla_host_t *vha, uint64_t *wr, uint64_t *rd)
         if (!IS_FWI2_CAPABLE(vha->hw))
                 return QLA_FUNCTION_FAILED;
 
+        if (unlikely(pci_channel_offline(vha->hw->pdev)))
+                return QLA_FUNCTION_FAILED;
+
         DEBUG11(printk("%s(%ld): entered.\n", __func__, vha->host_no));
 
         mcp->mb[0] = MBC_TRACE_CONTROL;
@@ -3643,3 +3666,36 @@ qla2x00_write_ram_word(scsi_qla_host_t *vha, uint32_t risc_addr, uint32_t data)
 
         return rval;
 }
+
+int
+qla2x00_get_data_rate(scsi_qla_host_t *vha)
+{
+        int rval;
+        mbx_cmd_t mc;
+        mbx_cmd_t *mcp = &mc;
+        struct qla_hw_data *ha = vha->hw;
+
+        if (!IS_FWI2_CAPABLE(ha))
+                return QLA_FUNCTION_FAILED;
+
+        DEBUG11(printk(KERN_INFO "%s(%ld): entered.\n", __func__, vha->host_no));
+
+        mcp->mb[0] = MBC_DATA_RATE;
+        mcp->mb[1] = 0;
+        mcp->out_mb = MBX_1|MBX_0;
+        mcp->in_mb = MBX_2|MBX_1|MBX_0;
+        mcp->tov = MBX_TOV_SECONDS;
+        mcp->flags = 0;
+        rval = qla2x00_mailbox_command(vha, mcp);
+        if (rval != QLA_SUCCESS) {
+                DEBUG2_3_11(printk(KERN_INFO "%s(%ld): failed=%x mb[0]=%x.\n",
+                    __func__, vha->host_no, rval, mcp->mb[0]));
+        } else {
+                DEBUG11(printk(KERN_INFO
+                    "%s(%ld): done.\n", __func__, vha->host_no));
+                if (mcp->mb[1] != 0x7)
+                        ha->link_data_rate = mcp->mb[1];
+        }
+
+        return rval;
+}
diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c
index 2a4c7f4e7b69..b901aa267e7d 100644
--- a/drivers/scsi/qla2xxx/qla_mid.c
+++ b/drivers/scsi/qla2xxx/qla_mid.c
@@ -639,8 +639,10 @@ static void qla_do_work(struct work_struct *work)
         struct rsp_que *rsp = container_of(work, struct rsp_que, q_work);
         struct scsi_qla_host *vha;
 
+        spin_lock_irq(&rsp->hw->hardware_lock);
         vha = qla25xx_get_host(rsp);
         qla24xx_process_response_queue(vha, rsp);
+        spin_unlock_irq(&rsp->hw->hardware_lock);
 }
 
 /* create response queue */
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c
index 2f873d237325..209f50e788a1 100644
--- a/drivers/scsi/qla2xxx/qla_os.c
+++ b/drivers/scsi/qla2xxx/qla_os.c
@@ -475,11 +475,11 @@ qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
         srb_t *sp;
         int rval;
 
-        if (unlikely(pci_channel_offline(ha->pdev))) {
-                if (ha->pdev->error_state == pci_channel_io_frozen)
-                        cmd->result = DID_REQUEUE << 16;
-                else
+        if (ha->flags.eeh_busy) {
+                if (ha->flags.pci_channel_io_perm_failure)
                         cmd->result = DID_NO_CONNECT << 16;
+                else
+                        cmd->result = DID_REQUEUE << 16;
                 goto qc24_fail_command;
         }
 
@@ -552,8 +552,15 @@ qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
 #define ABORT_POLLING_PERIOD    1000
 #define ABORT_WAIT_ITER         ((10 * 1000) / (ABORT_POLLING_PERIOD))
         unsigned long wait_iter = ABORT_WAIT_ITER;
+        scsi_qla_host_t *vha = shost_priv(cmd->device->host);
+        struct qla_hw_data *ha = vha->hw;
         int ret = QLA_SUCCESS;
 
+        if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
+                DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
+                return ret;
+        }
+
         while (CMD_SP(cmd) && wait_iter--) {
                 msleep(ABORT_POLLING_PERIOD);
         }
@@ -1810,6 +1817,13 @@ qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
 
         /* Set ISP-type information. */
         qla2x00_set_isp_flags(ha);
+
+        /* Set EEH reset type to fundamental if required by hba */
+        if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
+                pdev->needs_freset = 1;
+                pci_save_state(pdev);
+        }
+
         /* Configure PCI I/O space */
         ret = qla2x00_iospace_config(ha);
         if (ret)
@@ -2174,6 +2188,24 @@ qla2x00_free_device(scsi_qla_host_t *vha)
 {
         struct qla_hw_data *ha = vha->hw;
 
+        qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
+
+        /* Disable timer */
+        if (vha->timer_active)
+                qla2x00_stop_timer(vha);
+
+        /* Kill the kernel thread for this host */
+        if (ha->dpc_thread) {
+                struct task_struct *t = ha->dpc_thread;
+
+                /*
+                 * qla2xxx_wake_dpc checks for ->dpc_thread
+                 * so we need to zero it out.
+                 */
+                ha->dpc_thread = NULL;
+                kthread_stop(t);
+        }
+
         qla25xx_delete_queues(vha);
 
         if (ha->flags.fce_enabled)
@@ -2185,6 +2217,8 @@ qla2x00_free_device(scsi_qla_host_t *vha)
         /* Stop currently executing firmware. */
         qla2x00_try_to_stop_firmware(vha);
 
+        vha->flags.online = 0;
+
         /* turn-off interrupts on the card */
         if (ha->interrupts_on)
                 ha->isp_ops->disable_intrs(ha);
@@ -2859,6 +2893,13 @@ qla2x00_do_dpc(void *data)
                 if (!base_vha->flags.init_done)
                         continue;
 
+                if (ha->flags.eeh_busy) {
+                        DEBUG17(qla_printk(KERN_WARNING, ha,
+                            "qla2x00_do_dpc: dpc_flags: %lx\n",
+                            base_vha->dpc_flags));
+                        continue;
+                }
+
                 DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
 
                 ha->dpc_active = 1;
@@ -3049,8 +3090,13 @@ qla2x00_timer(scsi_qla_host_t *vha)
         int             index;
         srb_t           *sp;
         int             t;
+        uint16_t        w;
         struct qla_hw_data *ha = vha->hw;
         struct req_que *req;
+
+        /* Hardware read to raise pending EEH errors during mailbox waits. */
+        if (!pci_channel_offline(ha->pdev))
+                pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
         /*
          * Ports - Port down timer.
          *
@@ -3252,16 +3298,23 @@ qla2x00_release_firmware(void)
 static pci_ers_result_t
 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
 {
-        scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
+        scsi_qla_host_t *vha = pci_get_drvdata(pdev);
+        struct qla_hw_data *ha = vha->hw;
+
+        DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
+            state));
 
         switch (state) {
         case pci_channel_io_normal:
+                ha->flags.eeh_busy = 0;
                 return PCI_ERS_RESULT_CAN_RECOVER;
         case pci_channel_io_frozen:
+                ha->flags.eeh_busy = 1;
                 pci_disable_device(pdev);
                 return PCI_ERS_RESULT_NEED_RESET;
         case pci_channel_io_perm_failure:
-                qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
+                ha->flags.pci_channel_io_perm_failure = 1;
+                qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
                 return PCI_ERS_RESULT_DISCONNECT;
         }
         return PCI_ERS_RESULT_NEED_RESET;
@@ -3312,6 +3365,8 @@ qla2xxx_pci_slot_reset(struct pci_dev *pdev)
         struct qla_hw_data *ha = base_vha->hw;
         int rc;
 
+        DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
+
         if (ha->mem_only)
                 rc = pci_enable_device_mem(pdev);
         else
@@ -3320,19 +3375,33 @@ qla2xxx_pci_slot_reset(struct pci_dev *pdev)
         if (rc) {
                 qla_printk(KERN_WARNING, ha,
                     "Can't re-enable PCI device after reset.\n");
-
                 return ret;
         }
-        pci_set_master(pdev);
 
         if (ha->isp_ops->pci_config(base_vha))
                 return ret;
 
+#ifdef QL_DEBUG_LEVEL_17
+        {
+                uint8_t b;
+                uint32_t i;
+
+                printk("slot_reset_1: ");
+                for (i = 0; i < 256; i++) {
+                        pci_read_config_byte(ha->pdev, i, &b);
+                        printk("%s%02x", (i%16) ? " " : "\n", b);
+                }
+                printk("\n");
+        }
+#endif
         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
         if (qla2x00_abort_isp(base_vha) == QLA_SUCCESS)
                 ret =  PCI_ERS_RESULT_RECOVERED;
         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
 
+        DEBUG17(qla_printk(KERN_WARNING, ha,
+            "slot_reset-return:ret=%x\n", ret));
+
         return ret;
 }
 
@@ -3343,12 +3412,17 @@ qla2xxx_pci_resume(struct pci_dev *pdev)
         struct qla_hw_data *ha = base_vha->hw;
         int ret;
 
+        DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
+
         ret = qla2x00_wait_for_hba_online(base_vha);
         if (ret != QLA_SUCCESS) {
                 qla_printk(KERN_ERR, ha,
                     "the device failed to resume I/O "
                     "from slot/link_reset");
         }
+
+        ha->flags.eeh_busy = 0;
+
         pci_cleanup_aer_uncorrect_error_status(pdev);
 }
 
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h
index c482220f7eed..a65dd95507c6 100644
--- a/drivers/scsi/qla2xxx/qla_version.h
+++ b/drivers/scsi/qla2xxx/qla_version.h
@@ -7,7 +7,7 @@
 /*
  * Driver version
  */
-#define QLA2XXX_VERSION      "8.03.01-k8"
+#define QLA2XXX_VERSION      "8.03.01-k9"
 
 #define QLA_DRIVER_MAJOR_VER    8
 #define QLA_DRIVER_MINOR_VER    3
diff --git a/drivers/scsi/stex.c b/drivers/scsi/stex.c
index 3058bb1aff95..fd7b15be7640 100644
--- a/drivers/scsi/stex.c
+++ b/drivers/scsi/stex.c
@@ -623,6 +623,11 @@ stex_queuecommand(struct scsi_cmnd *cmd, void (* done)(struct scsi_cmnd *))
                 }
                 break;
         case INQUIRY:
+                if (lun >= host->max_lun) {
+                        cmd->result = DID_NO_CONNECT << 16;
+                        done(cmd);
+                        return 0;
+                }
                 if (id != host->max_id - 1)
                         break;
                 if (!lun && !cmd->device->channel &&
diff --git a/drivers/serial/21285.c b/drivers/serial/21285.c
index 1e3d19397a59..8681f1345056 100644
--- a/drivers/serial/21285.c
+++ b/drivers/serial/21285.c
@@ -58,7 +58,7 @@ static const char serial21285_name[] = "Footbridge UART";
 static void serial21285_stop_tx(struct uart_port *port)
 {
         if (tx_enabled(port)) {
-                disable_irq(IRQ_CONTX);
+                disable_irq_nosync(IRQ_CONTX);
                 tx_enabled(port) = 0;
         }
 }
@@ -74,7 +74,7 @@ static void serial21285_start_tx(struct uart_port *port)
 static void serial21285_stop_rx(struct uart_port *port)
 {
         if (rx_enabled(port)) {
-                disable_irq(IRQ_CONRX);
+                disable_irq_nosync(IRQ_CONRX);
                 rx_enabled(port) = 0;
         }
 }
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 9ff47db0b2ce..ebdd2b984d16 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -459,7 +459,7 @@ config SERIAL_SAMSUNG_UARTS
         int
         depends on ARM && PLAT_S3C
         default 2 if ARCH_S3C2400
-        default 4 if ARCH_S5PC1XX || ARCH_S3C64XX || CPU_S3C2443
+        default 4 if ARCH_S5P6440 || ARCH_S5PC1XX || ARCH_S5PV210 || ARCH_S3C64XX || CPU_S3C2443
         default 3
         help
           Select the number of available UART ports for the Samsung S3C
@@ -526,11 +526,11 @@ config SERIAL_S3C24A0
           Serial port support for the Samsung S3C24A0 SoC
 
 config SERIAL_S3C6400
-        tristate "Samsung S3C6400/S3C6410 Serial port support"
-        depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410)
+        tristate "Samsung S3C6400/S3C6410/S5P6440 Serial port support"
+        depends on SERIAL_SAMSUNG && (CPU_S3C6400 || CPU_S3C6410 || CPU_S5P6440)
         default y
         help
-          Serial port support for the Samsung S3C6400 and S3C6410
+          Serial port support for the Samsung S3C6400, S3C6410 and S5P6440
           SoCs
 
 config SERIAL_S5PC100
@@ -540,6 +540,13 @@ config SERIAL_S5PC100
         help
           Serial port support for the Samsung S5PC100 SoCs
 
+config SERIAL_S5PV210
+        tristate "Samsung S5PV210 Serial port support"
+        depends on SERIAL_SAMSUNG && CPU_S5PV210
+        default y
+        help
+          Serial port support for Samsung's S5P Family of SoC's
+
 config SERIAL_MAX3100
         tristate "MAX3100 support"
         depends on SPI
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index 5548fe7df61d..6aa4723b74ee 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_SERIAL_S3C2440) += s3c2440.o
 obj-$(CONFIG_SERIAL_S3C24A0) += s3c24a0.o
 obj-$(CONFIG_SERIAL_S3C6400) += s3c6400.o
 obj-$(CONFIG_SERIAL_S5PC100) += s3c6400.o
+obj-$(CONFIG_SERIAL_S5PV210) += s5pv210.o
 obj-$(CONFIG_SERIAL_MAX3100) += max3100.o
 obj-$(CONFIG_SERIAL_IP22_ZILOG) += ip22zilog.o
 obj-$(CONFIG_SERIAL_MUX) += mux.o
diff --git a/drivers/serial/s5pv210.c b/drivers/serial/s5pv210.c
new file mode 100644
index 000000000000..8dc03837617b
--- /dev/null
+++ b/drivers/serial/s5pv210.c
@@ -0,0 +1,154 @@
+/* linux/drivers/serial/s5pv210.c
+ *
+ * Copyright (c) 2010 Samsung Electronics Co., Ltd.
+ *              http://www.samsung.com/
+ *
+ * Based on drivers/serial/s3c6400.c
+ *
+ * Driver for Samsung S5PV210 SoC UARTs.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+*/
+
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/io.h>
+#include <linux/platform_device.h>
+#include <linux/init.h>
+#include <linux/serial_core.h>
+#include <linux/serial.h>
+
+#include <asm/irq.h>
+#include <mach/hardware.h>
+#include <plat/regs-serial.h>
+#include "samsung.h"
+
+static int s5pv210_serial_setsource(struct uart_port *port,
+                                        struct s3c24xx_uart_clksrc *clk)
+{
+        unsigned long ucon = rd_regl(port, S3C2410_UCON);
+
+        if (strcmp(clk->name, "pclk") == 0)
+                ucon &= ~S5PV210_UCON_CLKMASK;
+        else if (strcmp(clk->name, "uclk1") == 0)
+                ucon |= S5PV210_UCON_CLKMASK;
+        else {
+                printk(KERN_ERR "unknown clock source %s\n", clk->name);
+                return -EINVAL;
+        }
+
+        wr_regl(port, S3C2410_UCON, ucon);
+        return 0;
+}
+
+
+static int s5pv210_serial_getsource(struct uart_port *port,
+                                        struct s3c24xx_uart_clksrc *clk)
+{
+        u32 ucon = rd_regl(port, S3C2410_UCON);
+
+        clk->divisor = 1;
+
+        switch (ucon & S5PV210_UCON_CLKMASK) {
+        case S5PV210_UCON_PCLK:
+                clk->name = "pclk";
+                break;
+        case S5PV210_UCON_UCLK:
+                clk->name = "uclk1";
+                break;
+        }
+
+        return 0;
+}
+
+static int s5pv210_serial_resetport(struct uart_port *port,
+                                        struct s3c2410_uartcfg *cfg)
+{
+        unsigned long ucon = rd_regl(port, S3C2410_UCON);
+
+        ucon &= S5PV210_UCON_CLKMASK;
+        wr_regl(port, S3C2410_UCON,  ucon | cfg->ucon);
+        wr_regl(port, S3C2410_ULCON, cfg->ulcon);
+
+        /* reset both fifos */
+        wr_regl(port, S3C2410_UFCON, cfg->ufcon | S3C2410_UFCON_RESETBOTH);
+        wr_regl(port, S3C2410_UFCON, cfg->ufcon);
+
+        return 0;
+}
+
+#define S5PV210_UART_DEFAULT_INFO(fifo_size)                    \
+                .name           = "Samsung S5PV210 UART0",      \
+                .type           = PORT_S3C6400,                 \
+                .fifosize       = fifo_size,                    \
+                .has_divslot    = 1,                            \
+                .rx_fifomask    = S5PV210_UFSTAT_RXMASK,        \
+                .rx_fifoshift   = S5PV210_UFSTAT_RXSHIFT,       \
+                .rx_fifofull    = S5PV210_UFSTAT_RXFULL,        \
+                .tx_fifofull    = S5PV210_UFSTAT_TXFULL,        \
+                .tx_fifomask    = S5PV210_UFSTAT_TXMASK,        \
+                .tx_fifoshift   = S5PV210_UFSTAT_TXSHIFT,       \
+                .get_clksrc     = s5pv210_serial_getsource,     \
+                .set_clksrc     = s5pv210_serial_setsource,     \
+                .reset_port     = s5pv210_serial_resetport
+
+static struct s3c24xx_uart_info s5p_port_fifo256 = {
+        S5PV210_UART_DEFAULT_INFO(256),
+};
+
+static struct s3c24xx_uart_info s5p_port_fifo64 = {
+        S5PV210_UART_DEFAULT_INFO(64),
+};
+
+static struct s3c24xx_uart_info s5p_port_fifo16 = {
+        S5PV210_UART_DEFAULT_INFO(16),
+};
+
+static struct s3c24xx_uart_info *s5p_uart_inf[] = {
+        [0] = &s5p_port_fifo256,
+        [1] = &s5p_port_fifo64,
+        [2] = &s5p_port_fifo16,
+        [3] = &s5p_port_fifo16,
+};
+
+/* device management */
+static int s5p_serial_probe(struct platform_device *pdev)
+{
+        return s3c24xx_serial_probe(pdev, s5p_uart_inf[pdev->id]);
+}
+
+static struct platform_driver s5p_serial_drv = {
+        .probe          = s5p_serial_probe,
+        .remove         = __devexit_p(s3c24xx_serial_remove),
+        .driver         = {
+                .name   = "s5pv210-uart",
+                .owner  = THIS_MODULE,
+        },
+};
+
+static int __init s5pv210_serial_console_init(void)
+{
+        return s3c24xx_serial_initconsole(&s5p_serial_drv, s5p_uart_inf);
+}
+
+console_initcall(s5pv210_serial_console_init);
+
+static int __init s5p_serial_init(void)
+{
+        return s3c24xx_serial_init(&s5p_serial_drv, *s5p_uart_inf);
+}
+
+static void __exit s5p_serial_exit(void)
+{
+        platform_driver_unregister(&s5p_serial_drv);
+}
+
+module_init(s5p_serial_init);
+module_exit(s5p_serial_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:s5pv210-uart");
+MODULE_DESCRIPTION("Samsung S5PV210 UART Driver support");
+MODULE_AUTHOR("Thomas Abraham <thomas.ab@samsung.com>");
diff --git a/drivers/serial/samsung.c b/drivers/serial/samsung.c
index 52e3df113ec0..6982243736d1 100644
--- a/drivers/serial/samsung.c
+++ b/drivers/serial/samsung.c
@@ -1374,7 +1374,7 @@ s3c24xx_serial_get_options(struct uart_port *port, int *baud,
  * data.
 */
 
-static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
+static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info **info)
 {
         struct s3c24xx_uart_port *ptr = s3c24xx_serial_ports;
         struct platform_device **platdev_ptr;
@@ -1385,7 +1385,7 @@ static int s3c24xx_serial_init_ports(struct s3c24xx_uart_info *info)
         platdev_ptr = s3c24xx_uart_devs;
 
         for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++, ptr++, platdev_ptr++) {
-                s3c24xx_serial_init_port(ptr, info, *platdev_ptr);
+                s3c24xx_serial_init_port(ptr, info[i], *platdev_ptr);
         }
 
         return 0;
@@ -1451,7 +1451,7 @@ static struct console s3c24xx_serial_console = {
 };
 
 int s3c24xx_serial_initconsole(struct platform_driver *drv,
-                               struct s3c24xx_uart_info *info)
+                               struct s3c24xx_uart_info **info)
 
 {
         struct platform_device *dev = s3c24xx_uart_devs[0];
diff --git a/drivers/serial/samsung.h b/drivers/serial/samsung.h
index 1fb22343df42..0ac06a07d25f 100644
--- a/drivers/serial/samsung.h
+++ b/drivers/serial/samsung.h
@@ -75,19 +75,24 @@ extern int s3c24xx_serial_probe(struct platform_device *dev,
 extern int __devexit s3c24xx_serial_remove(struct platform_device *dev);
 
 extern int s3c24xx_serial_initconsole(struct platform_driver *drv,
-                                      struct s3c24xx_uart_info *uart);
+                                      struct s3c24xx_uart_info **uart);
 
 extern int s3c24xx_serial_init(struct platform_driver *drv,
                                struct s3c24xx_uart_info *info);
 
 #ifdef CONFIG_SERIAL_SAMSUNG_CONSOLE
 
-#define s3c24xx_console_init(__drv, __inf)                      \
-static int __init s3c_serial_console_init(void)                 \
-{                                                               \
-        return s3c24xx_serial_initconsole(__drv, __inf);        \
-}                                                               \
-                                                                \
+#define s3c24xx_console_init(__drv, __inf)                              \
+static int __init s3c_serial_console_init(void)                         \
+{                                                                       \
+        struct s3c24xx_uart_info *uinfo[CONFIG_SERIAL_SAMSUNG_UARTS];   \
+        int i;                                                          \
+                                                                        \
+        for (i = 0; i < CONFIG_SERIAL_SAMSUNG_UARTS; i++)               \
+                uinfo[i] = __inf;                                       \
+        return s3c24xx_serial_initconsole(__drv, uinfo);                \
+}                                                                       \
+                                                                        \
 console_initcall(s3c_serial_console_init)
 
 #else
diff --git a/drivers/serial/serial_cs.c b/drivers/serial/serial_cs.c
index fc413f0f8dd2..0ee7239c5d69 100644
--- a/drivers/serial/serial_cs.c
+++ b/drivers/serial/serial_cs.c
@@ -819,6 +819,7 @@ static struct pcmcia_device_id serial_ids[] = {
         PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x0035, "cis/3CXEM556.cis"),
         PCMCIA_MFC_DEVICE_CIS_MANF_CARD(1, 0x0101, 0x003d, "cis/3CXEM556.cis"),
         PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC850", 0xd85f6206, 0x42a2c018, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC850 3G Network Adapter R1 */
+        PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC860", 0xd85f6206, 0x698f93db, "cis/SW_8xx_SER.cis"), /* Sierra Wireless AC860 3G Network Adapter R1 */
         PCMCIA_DEVICE_CIS_PROD_ID12("Sierra Wireless", "AC710/AC750", 0xd85f6206, 0x761b11e0, "cis/SW_7xx_SER.cis"),  /* Sierra Wireless AC710/AC750 GPRS Network Adapter R1 */
         PCMCIA_DEVICE_CIS_MANF_CARD(0x0192, 0xa555, "cis/SW_555_SER.cis"),  /* Sierra Aircard 555 CDMA 1xrtt Modem -- pre update */
         PCMCIA_DEVICE_CIS_MANF_CARD(0x013f, 0xa555, "cis/SW_555_SER.cis"),  /* Sierra Aircard 555 CDMA 1xrtt Modem -- post update */
@@ -827,7 +828,7 @@ static struct pcmcia_device_id serial_ids[] = {
         PCMCIA_DEVICE_CIS_PROD_ID12("ADVANTECH", "COMpad-32/85B-4", 0x96913a85, 0xcec8f102, "cis/COMpad4.cis"),
         PCMCIA_DEVICE_CIS_PROD_ID123("ADVANTECH", "COMpad-32/85", "1.0", 0x96913a85, 0x8fbe92ae, 0x0877b627, "cis/COMpad2.cis"),
         PCMCIA_DEVICE_CIS_PROD_ID2("RS-COM 2P", 0xad20b156, "cis/RS-COM-2P.cis"),
-        PCMCIA_DEVICE_CIS_MANF_CARD(0x0013, 0x0000, "GLOBETROTTER.cis"),
+        PCMCIA_DEVICE_CIS_MANF_CARD(0x0013, 0x0000, "cis/GLOBETROTTER.cis"),
         PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100  1.00.",0x19ca78af,0xf964f42b),
         PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL100",0x19ca78af,0x71d98e83),
         PCMCIA_DEVICE_PROD_ID12("ELAN DIGITAL SYSTEMS LTD, c1997.","SERIAL CARD: SL232  1.00.",0x19ca78af,0x69fb7490),
@@ -861,6 +862,18 @@ static struct pcmcia_device_id serial_ids[] = {
 };
 MODULE_DEVICE_TABLE(pcmcia, serial_ids);
 
+MODULE_FIRMWARE("cis/PCMLM28.cis");
+MODULE_FIRMWARE("cis/DP83903.cis");
+MODULE_FIRMWARE("cis/3CCFEM556.cis");
+MODULE_FIRMWARE("cis/3CXEM556.cis");
+MODULE_FIRMWARE("cis/SW_8xx_SER.cis");
+MODULE_FIRMWARE("cis/SW_7xx_SER.cis");
+MODULE_FIRMWARE("cis/SW_555_SER.cis");
+MODULE_FIRMWARE("cis/MT5634ZLX.cis");
+MODULE_FIRMWARE("cis/COMpad2.cis");
+MODULE_FIRMWARE("cis/COMpad4.cis");
+MODULE_FIRMWARE("cis/RS-COM-2P.cis");
+
 static struct pcmcia_driver serial_cs_driver = {
         .owner          = THIS_MODULE,
         .drv            = {
diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c
index 409ca9643528..a3a7f8938175 100644
--- a/drivers/video/backlight/omap1_bl.c
+++ b/drivers/video/backlight/omap1_bl.c
@@ -139,8 +139,6 @@ static int omapbl_probe(struct platform_device *pdev)
         if (!pdata)
                 return -ENXIO;
 
-        omapbl_ops.check_fb = pdata->check_fb;
-
         bl = kzalloc(sizeof(struct omap_backlight), GFP_KERNEL);
         if (unlikely(!bl))
                 return -ENOMEM;
diff --git a/drivers/video/omap/dispc.c b/drivers/video/omap/dispc.c
index c7c6455f1fa8..e192b058a688 100644
--- a/drivers/video/omap/dispc.c
+++ b/drivers/video/omap/dispc.c
@@ -189,11 +189,6 @@ static struct {
         struct omapfb_color_key color_key;
 } dispc;
 
-static struct platform_device omapdss_device = {
-        .name           = "omapdss",
-        .id             = -1,
-};
-
 static void enable_lcd_clocks(int enable);
 
 static void inline dispc_write_reg(int idx, u32 val)
@@ -920,20 +915,20 @@ static irqreturn_t omap_dispc_irq_handler(int irq, void *dev)
 
 static int get_dss_clocks(void)
 {
-        dispc.dss_ick = clk_get(&omapdss_device.dev, "ick");
+        dispc.dss_ick = clk_get(&dispc.fbdev->dssdev->dev, "ick");
         if (IS_ERR(dispc.dss_ick)) {
                 dev_err(dispc.fbdev->dev, "can't get ick\n");
                 return PTR_ERR(dispc.dss_ick);
         }
 
-        dispc.dss1_fck = clk_get(&omapdss_device.dev, "dss1_fck");
+        dispc.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss1_fck");
         if (IS_ERR(dispc.dss1_fck)) {
                 dev_err(dispc.fbdev->dev, "can't get dss1_fck\n");
                 clk_put(dispc.dss_ick);
                 return PTR_ERR(dispc.dss1_fck);
         }
 
-        dispc.dss_54m_fck = clk_get(&omapdss_device.dev, "tv_fck");
+        dispc.dss_54m_fck = clk_get(&dispc.fbdev->dssdev->dev, "tv_fck");
         if (IS_ERR(dispc.dss_54m_fck)) {
                 dev_err(dispc.fbdev->dev, "can't get tv_fck\n");
                 clk_put(dispc.dss_ick);
@@ -1385,12 +1380,6 @@ static int omap_dispc_init(struct omapfb_device *fbdev, int ext_mode,
         int skip_init = 0;
         int i;
 
-        r = platform_device_register(&omapdss_device);
-        if (r) {
-                dev_err(fbdev->dev, "can't register omapdss device\n");
-                return r;
-        }
-
         memset(&dispc, 0, sizeof(dispc));
 
         dispc.base = ioremap(DISPC_BASE, SZ_1K);
@@ -1534,7 +1523,6 @@ static void omap_dispc_cleanup(void)
         free_irq(INT_24XX_DSS_IRQ, dispc.fbdev);
         put_dss_clocks();
         iounmap(dispc.base);
-        platform_device_unregister(&omapdss_device);
 }
 
 const struct lcd_ctrl omap2_int_ctrl = {
diff --git a/drivers/video/omap/lcd_htcherald.c b/drivers/video/omap/lcd_htcherald.c
index a9007c5d1fad..4802419da83b 100644
--- a/drivers/video/omap/lcd_htcherald.c
+++ b/drivers/video/omap/lcd_htcherald.c
@@ -115,12 +115,12 @@ struct platform_driver htcherald_panel_driver = {
         },
 };
 
-static int htcherald_panel_drv_init(void)
+static int __init htcherald_panel_drv_init(void)
 {
         return platform_driver_register(&htcherald_panel_driver);
 }
 
-static void htcherald_panel_drv_cleanup(void)
+static void __exit htcherald_panel_drv_cleanup(void)
 {
         platform_driver_unregister(&htcherald_panel_driver);
 }
diff --git a/drivers/video/omap/omapfb.h b/drivers/video/omap/omapfb.h
index 46e4714014e8..af3c9e571ec3 100644
--- a/drivers/video/omap/omapfb.h
+++ b/drivers/video/omap/omapfb.h
@@ -203,6 +203,8 @@ struct omapfb_device {
 
         struct omapfb_mem_desc          mem_desc;
         struct fb_info                  *fb_info[OMAPFB_PLANE_NUM];
+
+        struct platform_device  *dssdev;        /* dummy dev for clocks */
 };
 
 #ifdef CONFIG_ARCH_OMAP1
diff --git a/drivers/video/omap/omapfb_main.c b/drivers/video/omap/omapfb_main.c
index c7f59a5ccdbc..2c4f470fa086 100644
--- a/drivers/video/omap/omapfb_main.c
+++ b/drivers/video/omap/omapfb_main.c
@@ -83,6 +83,19 @@ static struct caps_table_struct color_caps[] = {
         { 1 << OMAPFB_COLOR_YUY422,     "YUY422", },
 };
 
+static void omapdss_release(struct device *dev)
+{
+}
+
+/* dummy device for clocks */
+static struct platform_device omapdss_device = {
+        .name           = "omapdss",
+        .id             = -1,
+        .dev            = {
+                .release = omapdss_release,
+        },
+};
+
 /*
  * ---------------------------------------------------------------------------
  * LCD panel
@@ -1700,6 +1713,7 @@ static int omapfb_do_probe(struct platform_device *pdev,
 
         fbdev->dev = &pdev->dev;
         fbdev->panel = panel;
+        fbdev->dssdev = &omapdss_device;
         platform_set_drvdata(pdev, fbdev);
 
         mutex_init(&fbdev->rqueue_mutex);
@@ -1814,8 +1828,16 @@ cleanup:
 
 static int omapfb_probe(struct platform_device *pdev)
 {
+        int r;
+
         BUG_ON(fbdev_pdev != NULL);
 
+        r = platform_device_register(&omapdss_device);
+        if (r) {
+                dev_err(&pdev->dev, "can't register omapdss device\n");
+                return r;
+        }
+
         /* Delay actual initialization until the LCD is registered */
         fbdev_pdev = pdev;
         if (fbdev_panel != NULL)
@@ -1843,6 +1865,9 @@ static int omapfb_remove(struct platform_device *pdev)
         fbdev->state = OMAPFB_DISABLED;
         omapfb_free_resources(fbdev, saved_state);
 
+        platform_device_unregister(&omapdss_device);
+        fbdev->dssdev = NULL;
+
         return 0;
 }
 
diff --git a/drivers/video/omap/rfbi.c b/drivers/video/omap/rfbi.c
index fed7b1bda19c..1162603c72e5 100644
--- a/drivers/video/omap/rfbi.c
+++ b/drivers/video/omap/rfbi.c
@@ -83,13 +83,13 @@ static inline u32 rfbi_read_reg(int idx)
 
 static int rfbi_get_clocks(void)
 {
-        rfbi.dss_ick = clk_get(rfbi.fbdev->dev, "ick");
+        rfbi.dss_ick = clk_get(&dispc.fbdev->dssdev->dev, "ick");
         if (IS_ERR(rfbi.dss_ick)) {
                 dev_err(rfbi.fbdev->dev, "can't get ick\n");
                 return PTR_ERR(rfbi.dss_ick);
         }
 
-        rfbi.dss1_fck = clk_get(rfbi.fbdev->dev, "dss1_fck");
+        rfbi.dss1_fck = clk_get(&dispc.fbdev->dssdev->dev, "dss1_fck");
         if (IS_ERR(rfbi.dss1_fck)) {
                 dev_err(rfbi.fbdev->dev, "can't get dss1_fck\n");
                 clk_put(rfbi.dss_ick);
diff --git a/drivers/video/omap2/dss/Kconfig b/drivers/video/omap2/dss/Kconfig
index 71d8dec30635..c63ce767b277 100644
--- a/drivers/video/omap2/dss/Kconfig
+++ b/drivers/video/omap2/dss/Kconfig
@@ -25,6 +25,13 @@ config OMAP2_DSS_DEBUG_SUPPORT
           This enables debug messages. You need to enable printing
           with 'debug' module parameter.
 
+config OMAP2_DSS_COLLECT_IRQ_STATS
+        bool "Collect DSS IRQ statistics"
+        depends on OMAP2_DSS_DEBUG_SUPPORT
+        default n
+        help
+          Collect DSS IRQ statistics, printable via debugfs
+
 config OMAP2_DSS_RFBI
         bool "RFBI support"
         default n
diff --git a/drivers/video/omap2/dss/core.c b/drivers/video/omap2/dss/core.c
index 29497a0c9a91..82918eec6d2e 100644
--- a/drivers/video/omap2/dss/core.c
+++ b/drivers/video/omap2/dss/core.c
@@ -124,6 +124,7 @@ static void restore_all_ctx(void)
         dss_clk_disable_all_no_ctx();
 }
 
+#if defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT)
 /* CLOCKS */
 static void core_dump_clocks(struct seq_file *s)
 {
@@ -149,6 +150,7 @@ static void core_dump_clocks(struct seq_file *s)
                                 clocks[i]->usecount);
         }
 }
+#endif /* defined(CONFIG_DEBUG_FS) && defined(CONFIG_OMAP2_DSS_DEBUG_SUPPORT) */
 
 static int dss_get_clock(struct clk **clock, const char *clk_name)
 {
@@ -395,6 +397,14 @@ static int dss_initialize_debugfs(void)
         debugfs_create_file("clk", S_IRUGO, dss_debugfs_dir,
                         &dss_debug_dump_clocks, &dss_debug_fops);
 
+        debugfs_create_file("dispc_irq", S_IRUGO, dss_debugfs_dir,
+                        &dispc_dump_irqs, &dss_debug_fops);
+
+#ifdef CONFIG_OMAP2_DSS_DSI
+        debugfs_create_file("dsi_irq", S_IRUGO, dss_debugfs_dir,
+                        &dsi_dump_irqs, &dss_debug_fops);
+#endif
+
         debugfs_create_file("dss", S_IRUGO, dss_debugfs_dir,
                         &dss_dump_regs, &dss_debug_fops);
         debugfs_create_file("dispc", S_IRUGO, dss_debugfs_dir,
diff --git a/drivers/video/omap2/dss/dispc.c b/drivers/video/omap2/dss/dispc.c
index 6dabf4b2f005..de8bfbac9e26 100644
--- a/drivers/video/omap2/dss/dispc.c
+++ b/drivers/video/omap2/dss/dispc.c
@@ -148,6 +148,12 @@ static const struct dispc_reg dispc_reg_att[] = { DISPC_GFX_ATTRIBUTES,
         DISPC_VID_ATTRIBUTES(0),
         DISPC_VID_ATTRIBUTES(1) };
 
+struct dispc_irq_stats {
+        unsigned long last_reset;
+        unsigned irq_count;
+        unsigned irqs[32];
+};
+
 static struct {
         void __iomem    *base;
 
@@ -160,6 +166,11 @@ static struct {
         struct work_struct error_work;
 
         u32             ctx[DISPC_SZ_REGS / sizeof(u32)];
+
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+        spinlock_t irq_stats_lock;
+        struct dispc_irq_stats irq_stats;
+#endif
 } dispc;
 
 static void _omap_dispc_set_irqs(void);
@@ -1443,7 +1454,10 @@ static unsigned long calc_fclk_five_taps(u16 width, u16 height,
                 do_div(tmp, 2 * out_height * ppl);
                 fclk = tmp;
 
-                if (height > 2 * out_height && ppl != out_width) {
+                if (height > 2 * out_height) {
+                        if (ppl == out_width)
+                                return 0;
+
                         tmp = pclk * (height - 2 * out_height) * out_width;
                         do_div(tmp, 2 * out_height * (ppl - out_width));
                         fclk = max(fclk, (u32) tmp);
@@ -1623,7 +1637,7 @@ static int _dispc_setup_plane(enum omap_plane plane,
                 DSSDBG("required fclk rate = %lu Hz\n", fclk);
                 DSSDBG("current fclk rate = %lu Hz\n", dispc_fclk_rate());
 
-                if (fclk > dispc_fclk_rate()) {
+                if (!fclk || fclk > dispc_fclk_rate()) {
                         DSSERR("failed to set up scaling, "
                                         "required fclk rate = %lu Hz, "
                                         "current fclk rate = %lu Hz\n",
@@ -2247,6 +2261,50 @@ void dispc_dump_clocks(struct seq_file *s)
         enable_clocks(0);
 }
 
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+void dispc_dump_irqs(struct seq_file *s)
+{
+        unsigned long flags;
+        struct dispc_irq_stats stats;
+
+        spin_lock_irqsave(&dispc.irq_stats_lock, flags);
+
+        stats = dispc.irq_stats;
+        memset(&dispc.irq_stats, 0, sizeof(dispc.irq_stats));
+        dispc.irq_stats.last_reset = jiffies;
+
+        spin_unlock_irqrestore(&dispc.irq_stats_lock, flags);
+
+        seq_printf(s, "period %u ms\n",
+                        jiffies_to_msecs(jiffies - stats.last_reset));
+
+        seq_printf(s, "irqs %d\n", stats.irq_count);
+#define PIS(x) \
+        seq_printf(s, "%-20s %10d\n", #x, stats.irqs[ffs(DISPC_IRQ_##x)-1]);
+
+        PIS(FRAMEDONE);
+        PIS(VSYNC);
+        PIS(EVSYNC_EVEN);
+        PIS(EVSYNC_ODD);
+        PIS(ACBIAS_COUNT_STAT);
+        PIS(PROG_LINE_NUM);
+        PIS(GFX_FIFO_UNDERFLOW);
+        PIS(GFX_END_WIN);
+        PIS(PAL_GAMMA_MASK);
+        PIS(OCP_ERR);
+        PIS(VID1_FIFO_UNDERFLOW);
+        PIS(VID1_END_WIN);
+        PIS(VID2_FIFO_UNDERFLOW);
+        PIS(VID2_END_WIN);
+        PIS(SYNC_LOST);
+        PIS(SYNC_LOST_DIGIT);
+        PIS(WAKEUP);
+#undef PIS
+}
+#else
+void dispc_dump_irqs(struct seq_file *s) { }
+#endif
+
 void dispc_dump_regs(struct seq_file *s)
 {
 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dispc_read_reg(r))
@@ -2665,6 +2723,13 @@ void dispc_irq_handler(void)
 
         irqstatus = dispc_read_reg(DISPC_IRQSTATUS);
 
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+        spin_lock(&dispc.irq_stats_lock);
+        dispc.irq_stats.irq_count++;
+        dss_collect_irq_stats(irqstatus, dispc.irq_stats.irqs);
+        spin_unlock(&dispc.irq_stats_lock);
+#endif
+
 #ifdef DEBUG
         if (dss_debug)
                 print_irq_status(irqstatus);
@@ -3012,6 +3077,11 @@ int dispc_init(void)
 
         spin_lock_init(&dispc.irq_lock);
 
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+        spin_lock_init(&dispc.irq_stats_lock);
+        dispc.irq_stats.last_reset = jiffies;
+#endif
+
         INIT_WORK(&dispc.error_work, dispc_error_worker);
 
         dispc.base = ioremap(DISPC_BASE, DISPC_SZ_REGS);
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c
index 5936487b5def..6122178f5f85 100644
--- a/drivers/video/omap2/dss/dsi.c
+++ b/drivers/video/omap2/dss/dsi.c
@@ -204,6 +204,14 @@ struct dsi_update_region {
         struct omap_dss_device *device;
 };
 
+struct dsi_irq_stats {
+        unsigned long last_reset;
+        unsigned irq_count;
+        unsigned dsi_irqs[32];
+        unsigned vc_irqs[4][32];
+        unsigned cio_irqs[32];
+};
+
 static struct
 {
         void __iomem    *base;
@@ -258,6 +266,11 @@ static struct
 #endif
         int debug_read;
         int debug_write;
+
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+        spinlock_t irq_stats_lock;
+        struct dsi_irq_stats irq_stats;
+#endif
 } dsi;
 
 #ifdef DEBUG
@@ -528,6 +541,12 @@ void dsi_irq_handler(void)
 
         irqstatus = dsi_read_reg(DSI_IRQSTATUS);
 
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+        spin_lock(&dsi.irq_stats_lock);
+        dsi.irq_stats.irq_count++;
+        dss_collect_irq_stats(irqstatus, dsi.irq_stats.dsi_irqs);
+#endif
+
         if (irqstatus & DSI_IRQ_ERROR_MASK) {
                 DSSERR("DSI error, irqstatus %x\n", irqstatus);
                 print_irq_status(irqstatus);
@@ -549,6 +568,10 @@ void dsi_irq_handler(void)
 
                 vcstatus = dsi_read_reg(DSI_VC_IRQSTATUS(i));
 
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+                dss_collect_irq_stats(vcstatus, dsi.irq_stats.vc_irqs[i]);
+#endif
+
                 if (vcstatus & DSI_VC_IRQ_BTA)
                         complete(&dsi.bta_completion);
 
@@ -568,6 +591,10 @@ void dsi_irq_handler(void)
         if (irqstatus & DSI_IRQ_COMPLEXIO_ERR) {
                 ciostatus = dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS);
 
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+                dss_collect_irq_stats(ciostatus, dsi.irq_stats.cio_irqs);
+#endif
+
                 dsi_write_reg(DSI_COMPLEXIO_IRQ_STATUS, ciostatus);
                 /* flush posted write */
                 dsi_read_reg(DSI_COMPLEXIO_IRQ_STATUS);
@@ -579,6 +606,10 @@ void dsi_irq_handler(void)
         dsi_write_reg(DSI_IRQSTATUS, irqstatus & ~DSI_IRQ_CHANNEL_MASK);
         /* flush posted write */
         dsi_read_reg(DSI_IRQSTATUS);
+
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+        spin_unlock(&dsi.irq_stats_lock);
+#endif
 }
 
 
@@ -797,12 +828,12 @@ static int dsi_pll_power(enum dsi_pll_power_state state)
 
         /* PLL_PWR_STATUS */
         while (FLD_GET(dsi_read_reg(DSI_CLK_CTRL), 29, 28) != state) {
-                udelay(1);
-                if (t++ > 1000) {
+                if (++t > 1000) {
                         DSSERR("Failed to set DSI PLL power mode to %d\n",
                                         state);
                         return -ENODEV;
                 }
+                udelay(1);
         }
 
         return 0;
@@ -1226,6 +1257,95 @@ void dsi_dump_clocks(struct seq_file *s)
         enable_clocks(0);
 }
 
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+void dsi_dump_irqs(struct seq_file *s)
+{
+        unsigned long flags;
+        struct dsi_irq_stats stats;
+
+        spin_lock_irqsave(&dsi.irq_stats_lock, flags);
+
+        stats = dsi.irq_stats;
+        memset(&dsi.irq_stats, 0, sizeof(dsi.irq_stats));
+        dsi.irq_stats.last_reset = jiffies;
+
+        spin_unlock_irqrestore(&dsi.irq_stats_lock, flags);
+
+        seq_printf(s, "period %u ms\n",
+                        jiffies_to_msecs(jiffies - stats.last_reset));
+
+        seq_printf(s, "irqs %d\n", stats.irq_count);
+#define PIS(x) \
+        seq_printf(s, "%-20s %10d\n", #x, stats.dsi_irqs[ffs(DSI_IRQ_##x)-1]);
+
+        seq_printf(s, "-- DSI interrupts --\n");
+        PIS(VC0);
+        PIS(VC1);
+        PIS(VC2);
+        PIS(VC3);
+        PIS(WAKEUP);
+        PIS(RESYNC);
+        PIS(PLL_LOCK);
+        PIS(PLL_UNLOCK);
+        PIS(PLL_RECALL);
+        PIS(COMPLEXIO_ERR);
+        PIS(HS_TX_TIMEOUT);
+        PIS(LP_RX_TIMEOUT);
+        PIS(TE_TRIGGER);
+        PIS(ACK_TRIGGER);
+        PIS(SYNC_LOST);
+        PIS(LDO_POWER_GOOD);
+        PIS(TA_TIMEOUT);
+#undef PIS
+
+#define PIS(x) \
+        seq_printf(s, "%-20s %10d %10d %10d %10d\n", #x, \
+                        stats.vc_irqs[0][ffs(DSI_VC_IRQ_##x)-1], \
+                        stats.vc_irqs[1][ffs(DSI_VC_IRQ_##x)-1], \
+                        stats.vc_irqs[2][ffs(DSI_VC_IRQ_##x)-1], \
+                        stats.vc_irqs[3][ffs(DSI_VC_IRQ_##x)-1]);
+
+        seq_printf(s, "-- VC interrupts --\n");
+        PIS(CS);
+        PIS(ECC_CORR);
+        PIS(PACKET_SENT);
+        PIS(FIFO_TX_OVF);
+        PIS(FIFO_RX_OVF);
+        PIS(BTA);
+        PIS(ECC_NO_CORR);
+        PIS(FIFO_TX_UDF);
+        PIS(PP_BUSY_CHANGE);
+#undef PIS
+
+#define PIS(x) \
+        seq_printf(s, "%-20s %10d\n", #x, \
+                        stats.cio_irqs[ffs(DSI_CIO_IRQ_##x)-1]);
+
+        seq_printf(s, "-- CIO interrupts --\n");
+        PIS(ERRSYNCESC1);
+        PIS(ERRSYNCESC2);
+        PIS(ERRSYNCESC3);
+        PIS(ERRESC1);
+        PIS(ERRESC2);
+        PIS(ERRESC3);
+        PIS(ERRCONTROL1);
+        PIS(ERRCONTROL2);
+        PIS(ERRCONTROL3);
+        PIS(STATEULPS1);
+        PIS(STATEULPS2);
+        PIS(STATEULPS3);
+        PIS(ERRCONTENTIONLP0_1);
+        PIS(ERRCONTENTIONLP1_1);
+        PIS(ERRCONTENTIONLP0_2);
+        PIS(ERRCONTENTIONLP1_2);
+        PIS(ERRCONTENTIONLP0_3);
+        PIS(ERRCONTENTIONLP1_3);
+        PIS(ULPSACTIVENOT_ALL0);
+        PIS(ULPSACTIVENOT_ALL1);
+#undef PIS
+}
+#endif
+
 void dsi_dump_regs(struct seq_file *s)
 {
 #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, dsi_read_reg(r))
@@ -1321,12 +1441,12 @@ static int dsi_complexio_power(enum dsi_complexio_power_state state)
 
         /* PWR_STATUS */
         while (FLD_GET(dsi_read_reg(DSI_COMPLEXIO_CFG1), 26, 25) != state) {
-                udelay(1);
-                if (t++ > 1000) {
+                if (++t > 1000) {
                         DSSERR("failed to set complexio power state to "
                                         "%d\n", state);
                         return -ENODEV;
                 }
+                udelay(1);
         }
 
         return 0;
@@ -1526,10 +1646,10 @@ static void dsi_complexio_uninit(void)
 
 static int _dsi_wait_reset(void)
 {
-        int i = 0;
+        int t = 0;
 
         while (REG_GET(DSI_SYSSTATUS, 0, 0) == 0) {
-                if (i++ > 5) {
+                if (++t > 5) {
                         DSSERR("soft reset failed\n");
                         return -ENODEV;
                 }
@@ -1999,7 +2119,7 @@ static int dsi_vc_send_short(int channel, u8 data_type, u16 data, u8 ecc)
                 return -EINVAL;
         }
 
-        data_id = data_type | channel << 6;
+        data_id = data_type | dsi.vc[channel].dest_per << 6;
 
         r = (data_id << 0) | (data << 8) | (ecc << 24);
 
@@ -2011,7 +2131,7 @@ static int dsi_vc_send_short(int channel, u8 data_type, u16 data, u8 ecc)
 int dsi_vc_send_null(int channel)
 {
         u8 nullpkg[] = {0, 0, 0, 0};
-        return dsi_vc_send_long(0, DSI_DT_NULL_PACKET, nullpkg, 4, 0);
+        return dsi_vc_send_long(channel, DSI_DT_NULL_PACKET, nullpkg, 4, 0);
 }
 EXPORT_SYMBOL(dsi_vc_send_null);
 
@@ -2058,7 +2178,7 @@ int dsi_vc_dcs_read(int channel, u8 dcs_cmd, u8 *buf, int buflen)
         int r;
 
         if (dsi.debug_read)
-                DSSDBG("dsi_vc_dcs_read(ch%d, dcs_cmd %u)\n", channel, dcs_cmd);
+                DSSDBG("dsi_vc_dcs_read(ch%d, dcs_cmd %x)\n", channel, dcs_cmd);
 
         r = dsi_vc_send_short(channel, DSI_DT_DCS_READ, dcs_cmd, 0);
         if (r)
@@ -2586,7 +2706,6 @@ static int dsi_update_screen_l4(struct omap_dss_device *dssdev,
                 /* using fifo not empty */
                 /* TX_FIFO_NOT_EMPTY */
                 while (FLD_GET(dsi_read_reg(DSI_VC_CTRL(0)), 5, 5)) {
-                        udelay(1);
                         fifo_stalls++;
                         if (fifo_stalls > 0xfffff) {
                                 DSSERR("fifo stalls overflow, pixels left %d\n",
@@ -2594,6 +2713,7 @@ static int dsi_update_screen_l4(struct omap_dss_device *dssdev,
                                 dsi_if_enable(0);
                                 return -EIO;
                         }
+                        udelay(1);
                 }
 #elif 1
                 /* using fifo emptiness */
@@ -2812,11 +2932,15 @@ static int dsi_set_update_mode(struct omap_dss_device *dssdev,
 
 static int dsi_set_te(struct omap_dss_device *dssdev, bool enable)
 {
-        int r;
-        r = dssdev->driver->enable_te(dssdev, enable);
-        /* XXX for some reason, DSI TE breaks if we don't wait here.
-         * Panel bug? Needs more studying */
-        msleep(100);
+        int r = 0;
+
+        if (dssdev->driver->enable_te) {
+                r = dssdev->driver->enable_te(dssdev, enable);
+                /* XXX for some reason, DSI TE breaks if we don't wait here.
+                 * Panel bug? Needs more studying */
+                msleep(100);
+        }
+
         return r;
 }
 
@@ -3637,6 +3761,11 @@ int dsi_init(struct platform_device *pdev)
         spin_lock_init(&dsi.errors_lock);
         dsi.errors = 0;
 
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+        spin_lock_init(&dsi.irq_stats_lock);
+        dsi.irq_stats.last_reset = jiffies;
+#endif
+
         init_completion(&dsi.bta_completion);
         init_completion(&dsi.update_completion);
 
diff --git a/drivers/video/omap2/dss/dss.c b/drivers/video/omap2/dss/dss.c
index 9b05ee65a15d..0a26b7d84d41 100644
--- a/drivers/video/omap2/dss/dss.c
+++ b/drivers/video/omap2/dss/dss.c
@@ -467,14 +467,14 @@ static irqreturn_t dss_irq_handler_omap3(int irq, void *arg)
 
 static int _omap_dss_wait_reset(void)
 {
-        unsigned timeout = 1000;
+        int t = 0;
 
         while (REG_GET(DSS_SYSSTATUS, 0, 0) == 0) {
-                udelay(1);
-                if (!--timeout) {
+                if (++t > 1000) {
                         DSSERR("soft reset failed\n");
                         return -ENODEV;
                 }
+                udelay(1);
         }
 
         return 0;
diff --git a/drivers/video/omap2/dss/dss.h b/drivers/video/omap2/dss/dss.h
index 8da5ac42151b..2bcb1245d6c2 100644
--- a/drivers/video/omap2/dss/dss.h
+++ b/drivers/video/omap2/dss/dss.h
@@ -240,6 +240,7 @@ int dsi_init(struct platform_device *pdev);
 void dsi_exit(void);
 
 void dsi_dump_clocks(struct seq_file *s);
+void dsi_dump_irqs(struct seq_file *s);
 void dsi_dump_regs(struct seq_file *s);
 
 void dsi_save_context(void);
@@ -268,6 +269,7 @@ int dpi_init_display(struct omap_dss_device *dssdev);
 int dispc_init(void);
 void dispc_exit(void);
 void dispc_dump_clocks(struct seq_file *s);
+void dispc_dump_irqs(struct seq_file *s);
 void dispc_dump_regs(struct seq_file *s);
 void dispc_irq_handler(void);
 void dispc_fake_vsync_irq(void);
@@ -367,4 +369,16 @@ void rfbi_set_timings(int rfbi_module, struct rfbi_timings *t);
 unsigned long rfbi_get_max_tx_rate(void);
 int rfbi_init_display(struct omap_dss_device *display);
 
+
+#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
+static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)
+{
+        int b;
+        for (b = 0; b < 32; ++b) {
+                if (irqstatus & (1 << b))
+                        irq_arr[b]++;
+        }
+}
+#endif
+
 #endif
diff --git a/drivers/video/omap2/dss/rfbi.c b/drivers/video/omap2/dss/rfbi.c
index d0b3006ad8a5..b936495c065d 100644
--- a/drivers/video/omap2/dss/rfbi.c
+++ b/drivers/video/omap2/dss/rfbi.c
@@ -120,7 +120,7 @@ static struct {
 
         struct omap_dss_device *dssdev[2];
 
-        struct kfifo      *cmd_fifo;
+        struct kfifo      cmd_fifo;
         spinlock_t        cmd_lock;
         struct completion cmd_done;
         atomic_t          cmd_fifo_full;
@@ -1011,20 +1011,20 @@ static void process_cmd_fifo(void)
                 return;
 
         while (true) {
-                spin_lock_irqsave(rfbi.cmd_fifo->lock, flags);
+                spin_lock_irqsave(&rfbi.cmd_lock, flags);
 
-                len = __kfifo_get(rfbi.cmd_fifo, (unsigned char *)&p,
+                len = kfifo_out(&rfbi.cmd_fifo, (unsigned char *)&p,
                                   sizeof(struct update_param));
                 if (len == 0) {
                         DSSDBG("nothing more in fifo\n");
                         atomic_set(&rfbi.cmd_pending, 0);
-                        spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
+                        spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
                         break;
                 }
 
                 /* DSSDBG("fifo full %d\n", rfbi.cmd_fifo_full.counter);*/
 
-                spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
+                spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
 
                 BUG_ON(len != sizeof(struct update_param));
                 BUG_ON(p.rfbi_module > 1);
@@ -1052,25 +1052,25 @@ static void rfbi_push_cmd(struct update_param *p)
                 unsigned long flags;
                 int available;
 
-                spin_lock_irqsave(rfbi.cmd_fifo->lock, flags);
+                spin_lock_irqsave(&rfbi.cmd_lock, flags);
                 available = RFBI_CMD_FIFO_LEN_BYTES -
-                        __kfifo_len(rfbi.cmd_fifo);
+                        kfifo_len(&rfbi.cmd_fifo);
 
 /*              DSSDBG("%d bytes left in fifo\n", available); */
                 if (available < sizeof(struct update_param)) {
                         DSSDBG("Going to wait because FIFO FULL..\n");
-                        spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
+                        spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
                         atomic_inc(&rfbi.cmd_fifo_full);
                         wait_for_completion(&rfbi.cmd_done);
                         /*DSSDBG("Woke up because fifo not full anymore\n");*/
                         continue;
                 }
 
-                ret = __kfifo_put(rfbi.cmd_fifo, (unsigned char *)p,
+                ret = kfifo_in(&rfbi.cmd_fifo, (unsigned char *)p,
                                   sizeof(struct update_param));
 /*              DSSDBG("pushed %d bytes\n", ret);*/
 
-                spin_unlock_irqrestore(rfbi.cmd_fifo->lock, flags);
+                spin_unlock_irqrestore(&rfbi.cmd_lock, flags);
 
                 BUG_ON(ret != sizeof(struct update_param));
 
@@ -1155,12 +1155,12 @@ int rfbi_init(void)
 {
         u32 rev;
         u32 l;
+        int r;
 
         spin_lock_init(&rfbi.cmd_lock);
-        rfbi.cmd_fifo = kfifo_alloc(RFBI_CMD_FIFO_LEN_BYTES, GFP_KERNEL,
-                                    &rfbi.cmd_lock);
-        if (IS_ERR(rfbi.cmd_fifo))
-                return -ENOMEM;
+        r = kfifo_alloc(&rfbi.cmd_fifo, RFBI_CMD_FIFO_LEN_BYTES, GFP_KERNEL);
+        if (r)
+                return r;
 
         init_completion(&rfbi.cmd_done);
         atomic_set(&rfbi.cmd_fifo_full, 0);
@@ -1196,7 +1196,7 @@ void rfbi_exit(void)
 {
         DSSDBG("rfbi_exit\n");
 
-        kfifo_free(rfbi.cmd_fifo);
+        kfifo_free(&rfbi.cmd_fifo);
 
         iounmap(rfbi.base);
 }
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c
index ef299839858a..d17caef6915a 100644
--- a/drivers/video/omap2/omapfb/omapfb-main.c
+++ b/drivers/video/omap2/omapfb/omapfb-main.c
@@ -1311,6 +1311,7 @@ static void omapfb_free_fbmem(struct fb_info *fbi)
                 if (rg->vrfb.vaddr[0]) {
                         iounmap(rg->vrfb.vaddr[0]);
                         omap_vrfb_release_ctx(&rg->vrfb);
+                        rg->vrfb.vaddr[0] = NULL;
                 }
         }
 
@@ -2114,6 +2115,11 @@ static int omapfb_probe(struct platform_device *pdev)
         dssdev = NULL;
         for_each_dss_dev(dssdev) {
                 omap_dss_get_device(dssdev);
+                if (!dssdev->driver) {
+                        dev_err(&pdev->dev, "no driver for display\n");
+                        r = -EINVAL;
+                        goto cleanup;
+                }
                 fbdev->displays[fbdev->num_displays++] = dssdev;
         }
 
diff --git a/drivers/video/pxafb.c b/drivers/video/pxafb.c
index 415858b421b3..825b665245bb 100644
--- a/drivers/video/pxafb.c
+++ b/drivers/video/pxafb.c
@@ -1221,9 +1221,9 @@ static void setup_smart_timing(struct pxafb_info *fbi,
 static int pxafb_smart_thread(void *arg)
 {
         struct pxafb_info *fbi = arg;
-        struct pxafb_mach_info *inf;
+        struct pxafb_mach_info *inf = fbi->dev->platform_data;
 
-        if (!fbi || !fbi->dev->platform_data->smart_update) {
+        if (!inf->smart_update) {
                 pr_err("%s: not properly initialized, thread terminated\n",
                                 __func__);
                 return -EINVAL;