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-rw-r--r--drivers/media/video/Kconfig6
-rw-r--r--drivers/media/video/Makefile1
-rw-r--r--drivers/media/video/rj54n1cb0c.c1219
3 files changed, 1226 insertions, 0 deletions
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig
index c318676f2d29..0ab7ccd8729b 100644
--- a/drivers/media/video/Kconfig
+++ b/drivers/media/video/Kconfig
@@ -847,6 +847,12 @@ config SOC_CAMERA_MT9V022
847 help 847 help
848 This driver supports MT9V022 cameras from Micron 848 This driver supports MT9V022 cameras from Micron
849 849
850config SOC_CAMERA_RJ54N1
851 tristate "rj54n1cb0c support"
852 depends on SOC_CAMERA && I2C
853 help
854 This is a rj54n1cb0c video driver
855
850config SOC_CAMERA_TW9910 856config SOC_CAMERA_TW9910
851 tristate "tw9910 support" 857 tristate "tw9910 support"
852 depends on SOC_CAMERA && I2C 858 depends on SOC_CAMERA && I2C
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile
index e706ceecef84..7a2dcc34111c 100644
--- a/drivers/media/video/Makefile
+++ b/drivers/media/video/Makefile
@@ -78,6 +78,7 @@ obj-$(CONFIG_SOC_CAMERA_MT9T031) += mt9t031.o
78obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o 78obj-$(CONFIG_SOC_CAMERA_MT9V022) += mt9v022.o
79obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o 79obj-$(CONFIG_SOC_CAMERA_OV772X) += ov772x.o
80obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o 80obj-$(CONFIG_SOC_CAMERA_OV9640) += ov9640.o
81obj-$(CONFIG_SOC_CAMERA_RJ54N1) += rj54n1cb0c.o
81obj-$(CONFIG_SOC_CAMERA_TW9910) += tw9910.o 82obj-$(CONFIG_SOC_CAMERA_TW9910) += tw9910.o
82 83
83# And now the v4l2 drivers: 84# And now the v4l2 drivers:
diff --git a/drivers/media/video/rj54n1cb0c.c b/drivers/media/video/rj54n1cb0c.c
new file mode 100644
index 000000000000..373f2a30a677
--- /dev/null
+++ b/drivers/media/video/rj54n1cb0c.c
@@ -0,0 +1,1219 @@
1/*
2 * Driver for RJ54N1CB0C CMOS Image Sensor from Micron
3 *
4 * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/i2c.h>
13#include <linux/slab.h>
14#include <linux/videodev2.h>
15
16#include <media/v4l2-subdev.h>
17#include <media/v4l2-chip-ident.h>
18#include <media/soc_camera.h>
19
20#define RJ54N1_DEV_CODE 0x0400
21#define RJ54N1_DEV_CODE2 0x0401
22#define RJ54N1_OUT_SEL 0x0403
23#define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404
24#define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405
25#define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406
26#define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407
27#define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408
28#define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409
29#define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a
30#define RJ54N1_LINE_LENGTH_PCK_S_L 0x040b
31#define RJ54N1_LINE_LENGTH_PCK_P_H 0x040c
32#define RJ54N1_LINE_LENGTH_PCK_P_L 0x040d
33#define RJ54N1_RESIZE_N 0x040e
34#define RJ54N1_RESIZE_N_STEP 0x040f
35#define RJ54N1_RESIZE_STEP 0x0410
36#define RJ54N1_RESIZE_HOLD_H 0x0411
37#define RJ54N1_RESIZE_HOLD_L 0x0412
38#define RJ54N1_H_OBEN_OFS 0x0413
39#define RJ54N1_V_OBEN_OFS 0x0414
40#define RJ54N1_RESIZE_CONTROL 0x0415
41#define RJ54N1_INC_USE_SEL_H 0x0425
42#define RJ54N1_INC_USE_SEL_L 0x0426
43#define RJ54N1_MIRROR_STILL_MODE 0x0427
44#define RJ54N1_INIT_START 0x0428
45#define RJ54N1_SCALE_1_2_LEV 0x0429
46#define RJ54N1_SCALE_4_LEV 0x042a
47#define RJ54N1_Y_GAIN 0x04d8
48#define RJ54N1_APT_GAIN_UP 0x04fa
49#define RJ54N1_RA_SEL_UL 0x0530
50#define RJ54N1_BYTE_SWAP 0x0531
51#define RJ54N1_OUT_SIGPO 0x053b
52#define RJ54N1_FRAME_LENGTH_S_H 0x0595
53#define RJ54N1_FRAME_LENGTH_S_L 0x0596
54#define RJ54N1_FRAME_LENGTH_P_H 0x0597
55#define RJ54N1_FRAME_LENGTH_P_L 0x0598
56#define RJ54N1_IOC 0x05ef
57#define RJ54N1_TG_BYPASS 0x0700
58#define RJ54N1_PLL_L 0x0701
59#define RJ54N1_PLL_N 0x0702
60#define RJ54N1_PLL_EN 0x0704
61#define RJ54N1_RATIO_TG 0x0706
62#define RJ54N1_RATIO_T 0x0707
63#define RJ54N1_RATIO_R 0x0708
64#define RJ54N1_RAMP_TGCLK_EN 0x0709
65#define RJ54N1_OCLK_DSP 0x0710
66#define RJ54N1_RATIO_OP 0x0711
67#define RJ54N1_RATIO_O 0x0712
68#define RJ54N1_OCLK_SEL_EN 0x0713
69#define RJ54N1_CLK_RST 0x0717
70#define RJ54N1_RESET_STANDBY 0x0718
71
72#define E_EXCLK (1 << 7)
73#define SOFT_STDBY (1 << 4)
74#define SEN_RSTX (1 << 2)
75#define TG_RSTX (1 << 1)
76#define DSP_RSTX (1 << 0)
77
78#define RESIZE_HOLD_SEL (1 << 2)
79#define RESIZE_GO (1 << 1)
80
81#define RJ54N1_COLUMN_SKIP 0
82#define RJ54N1_ROW_SKIP 0
83#define RJ54N1_MAX_WIDTH 1600
84#define RJ54N1_MAX_HEIGHT 1200
85
86/* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
87
88static const struct soc_camera_data_format rj54n1_colour_formats[] = {
89 {
90 .name = "YUYV",
91 .depth = 16,
92 .fourcc = V4L2_PIX_FMT_YUYV,
93 .colorspace = V4L2_COLORSPACE_JPEG,
94 }, {
95 .name = "RGB565",
96 .depth = 16,
97 .fourcc = V4L2_PIX_FMT_RGB565,
98 .colorspace = V4L2_COLORSPACE_SRGB,
99 }
100};
101
102struct rj54n1_clock_div {
103 u8 ratio_tg;
104 u8 ratio_t;
105 u8 ratio_r;
106 u8 ratio_op;
107 u8 ratio_o;
108};
109
110struct rj54n1 {
111 struct v4l2_subdev subdev;
112 struct v4l2_rect rect; /* Sensor window */
113 unsigned short width; /* Output window */
114 unsigned short height;
115 unsigned short resize; /* Sensor * 1024 / resize = Output */
116 struct rj54n1_clock_div clk_div;
117 u32 fourcc;
118 unsigned short scale;
119 u8 bank;
120};
121
122struct rj54n1_reg_val {
123 u16 reg;
124 u8 val;
125};
126
127const static struct rj54n1_reg_val bank_4[] = {
128 {0x417, 0},
129 {0x42c, 0},
130 {0x42d, 0xf0},
131 {0x42e, 0},
132 {0x42f, 0x50},
133 {0x430, 0xf5},
134 {0x431, 0x16},
135 {0x432, 0x20},
136 {0x433, 0},
137 {0x434, 0xc8},
138 {0x43c, 8},
139 {0x43e, 0x90},
140 {0x445, 0x83},
141 {0x4ba, 0x58},
142 {0x4bb, 4},
143 {0x4bc, 0x20},
144 {0x4db, 4},
145 {0x4fe, 2},
146};
147
148const static struct rj54n1_reg_val bank_5[] = {
149 {0x514, 0},
150 {0x516, 0},
151 {0x518, 0},
152 {0x51a, 0},
153 {0x51d, 0xff},
154 {0x56f, 0x28},
155 {0x575, 0x40},
156 {0x5bc, 0x48},
157 {0x5c1, 6},
158 {0x5e5, 0x11},
159 {0x5e6, 0x43},
160 {0x5e7, 0x33},
161 {0x5e8, 0x21},
162 {0x5e9, 0x30},
163 {0x5ea, 0x0},
164 {0x5eb, 0xa5},
165 {0x5ec, 0xff},
166 {0x5fe, 2},
167};
168
169const static struct rj54n1_reg_val bank_7[] = {
170 {0x70a, 0},
171 {0x714, 0xff},
172 {0x715, 0xff},
173 {0x716, 0x1f},
174 {0x7FE, 0x02},
175};
176
177const static struct rj54n1_reg_val bank_8[] = {
178 {0x800, 0x00},
179 {0x801, 0x01},
180 {0x802, 0x61},
181 {0x805, 0x00},
182 {0x806, 0x00},
183 {0x807, 0x00},
184 {0x808, 0x00},
185 {0x809, 0x01},
186 {0x80A, 0x61},
187 {0x80B, 0x00},
188 {0x80C, 0x01},
189 {0x80D, 0x00},
190 {0x80E, 0x00},
191 {0x80F, 0x00},
192 {0x810, 0x00},
193 {0x811, 0x01},
194 {0x812, 0x61},
195 {0x813, 0x00},
196 {0x814, 0x11},
197 {0x815, 0x00},
198 {0x816, 0x41},
199 {0x817, 0x00},
200 {0x818, 0x51},
201 {0x819, 0x01},
202 {0x81A, 0x1F},
203 {0x81B, 0x00},
204 {0x81C, 0x01},
205 {0x81D, 0x00},
206 {0x81E, 0x11},
207 {0x81F, 0x00},
208 {0x820, 0x41},
209 {0x821, 0x00},
210 {0x822, 0x51},
211 {0x823, 0x00},
212 {0x824, 0x00},
213 {0x825, 0x00},
214 {0x826, 0x47},
215 {0x827, 0x01},
216 {0x828, 0x4F},
217 {0x829, 0x00},
218 {0x82A, 0x00},
219 {0x82B, 0x00},
220 {0x82C, 0x30},
221 {0x82D, 0x00},
222 {0x82E, 0x40},
223 {0x82F, 0x00},
224 {0x830, 0xB3},
225 {0x831, 0x00},
226 {0x832, 0xE3},
227 {0x833, 0x00},
228 {0x834, 0x00},
229 {0x835, 0x00},
230 {0x836, 0x00},
231 {0x837, 0x00},
232 {0x838, 0x00},
233 {0x839, 0x01},
234 {0x83A, 0x61},
235 {0x83B, 0x00},
236 {0x83C, 0x01},
237 {0x83D, 0x00},
238 {0x83E, 0x00},
239 {0x83F, 0x00},
240 {0x840, 0x00},
241 {0x841, 0x01},
242 {0x842, 0x61},
243 {0x843, 0x00},
244 {0x844, 0x1D},
245 {0x845, 0x00},
246 {0x846, 0x00},
247 {0x847, 0x00},
248 {0x848, 0x00},
249 {0x849, 0x01},
250 {0x84A, 0x1F},
251 {0x84B, 0x00},
252 {0x84C, 0x05},
253 {0x84D, 0x00},
254 {0x84E, 0x19},
255 {0x84F, 0x01},
256 {0x850, 0x21},
257 {0x851, 0x01},
258 {0x852, 0x5D},
259 {0x853, 0x00},
260 {0x854, 0x00},
261 {0x855, 0x00},
262 {0x856, 0x19},
263 {0x857, 0x01},
264 {0x858, 0x21},
265 {0x859, 0x00},
266 {0x85A, 0x00},
267 {0x85B, 0x00},
268 {0x85C, 0x00},
269 {0x85D, 0x00},
270 {0x85E, 0x00},
271 {0x85F, 0x00},
272 {0x860, 0xB3},
273 {0x861, 0x00},
274 {0x862, 0xE3},
275 {0x863, 0x00},
276 {0x864, 0x00},
277 {0x865, 0x00},
278 {0x866, 0x00},
279 {0x867, 0x00},
280 {0x868, 0x00},
281 {0x869, 0xE2},
282 {0x86A, 0x00},
283 {0x86B, 0x01},
284 {0x86C, 0x06},
285 {0x86D, 0x00},
286 {0x86E, 0x00},
287 {0x86F, 0x00},
288 {0x870, 0x60},
289 {0x871, 0x8C},
290 {0x872, 0x10},
291 {0x873, 0x00},
292 {0x874, 0xE0},
293 {0x875, 0x00},
294 {0x876, 0x27},
295 {0x877, 0x01},
296 {0x878, 0x00},
297 {0x879, 0x00},
298 {0x87A, 0x00},
299 {0x87B, 0x03},
300 {0x87C, 0x00},
301 {0x87D, 0x00},
302 {0x87E, 0x00},
303 {0x87F, 0x00},
304 {0x880, 0x00},
305 {0x881, 0x00},
306 {0x882, 0x00},
307 {0x883, 0x00},
308 {0x884, 0x00},
309 {0x885, 0x00},
310 {0x886, 0xF8},
311 {0x887, 0x00},
312 {0x888, 0x03},
313 {0x889, 0x00},
314 {0x88A, 0x64},
315 {0x88B, 0x00},
316 {0x88C, 0x03},
317 {0x88D, 0x00},
318 {0x88E, 0xB1},
319 {0x88F, 0x00},
320 {0x890, 0x03},
321 {0x891, 0x01},
322 {0x892, 0x1D},
323 {0x893, 0x00},
324 {0x894, 0x03},
325 {0x895, 0x01},
326 {0x896, 0x4B},
327 {0x897, 0x00},
328 {0x898, 0xE5},
329 {0x899, 0x00},
330 {0x89A, 0x01},
331 {0x89B, 0x00},
332 {0x89C, 0x01},
333 {0x89D, 0x04},
334 {0x89E, 0xC8},
335 {0x89F, 0x00},
336 {0x8A0, 0x01},
337 {0x8A1, 0x01},
338 {0x8A2, 0x61},
339 {0x8A3, 0x00},
340 {0x8A4, 0x01},
341 {0x8A5, 0x00},
342 {0x8A6, 0x00},
343 {0x8A7, 0x00},
344 {0x8A8, 0x00},
345 {0x8A9, 0x00},
346 {0x8AA, 0x7F},
347 {0x8AB, 0x03},
348 {0x8AC, 0x00},
349 {0x8AD, 0x00},
350 {0x8AE, 0x00},
351 {0x8AF, 0x00},
352 {0x8B0, 0x00},
353 {0x8B1, 0x00},
354 {0x8B6, 0x00},
355 {0x8B7, 0x01},
356 {0x8B8, 0x00},
357 {0x8B9, 0x00},
358 {0x8BA, 0x02},
359 {0x8BB, 0x00},
360 {0x8BC, 0xFF},
361 {0x8BD, 0x00},
362 {0x8FE, 0x02},
363};
364
365const static struct rj54n1_reg_val bank_10[] = {
366 {0x10bf, 0x69}
367};
368
369/* Clock dividers - these are default register values, divider = register + 1 */
370const static struct rj54n1_clock_div clk_div = {
371 .ratio_tg = 3 /* default: 5 */,
372 .ratio_t = 4 /* default: 1 */,
373 .ratio_r = 4 /* default: 0 */,
374 .ratio_op = 1 /* default: 5 */,
375 .ratio_o = 9 /* default: 0 */,
376};
377
378static struct rj54n1 *to_rj54n1(const struct i2c_client *client)
379{
380 return container_of(i2c_get_clientdata(client), struct rj54n1, subdev);
381}
382
383static int reg_read(struct i2c_client *client, const u16 reg)
384{
385 struct rj54n1 *rj54n1 = to_rj54n1(client);
386 int ret;
387
388 /* set bank */
389 if (rj54n1->bank != reg >> 8) {
390 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
391 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
392 if (ret < 0)
393 return ret;
394 rj54n1->bank = reg >> 8;
395 }
396 return i2c_smbus_read_byte_data(client, reg & 0xff);
397}
398
399static int reg_write(struct i2c_client *client, const u16 reg,
400 const u8 data)
401{
402 struct rj54n1 *rj54n1 = to_rj54n1(client);
403 int ret;
404
405 /* set bank */
406 if (rj54n1->bank != reg >> 8) {
407 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
408 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
409 if (ret < 0)
410 return ret;
411 rj54n1->bank = reg >> 8;
412 }
413 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data);
414 return i2c_smbus_write_byte_data(client, reg & 0xff, data);
415}
416
417static int reg_set(struct i2c_client *client, const u16 reg,
418 const u8 data, const u8 mask)
419{
420 int ret;
421
422 ret = reg_read(client, reg);
423 if (ret < 0)
424 return ret;
425 return reg_write(client, reg, (ret & ~mask) | (data & mask));
426}
427
428static int reg_write_multiple(struct i2c_client *client,
429 const struct rj54n1_reg_val *rv, const int n)
430{
431 int i, ret;
432
433 for (i = 0; i < n; i++) {
434 ret = reg_write(client, rv->reg, rv->val);
435 if (ret < 0)
436 return ret;
437 rv++;
438 }
439
440 return 0;
441}
442
443static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
444{
445 /* TODO: start / stop streaming */
446 return 0;
447}
448
449static int rj54n1_set_bus_param(struct soc_camera_device *icd,
450 unsigned long flags)
451{
452 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
453 struct i2c_client *client = sd->priv;
454 /* Figures 2.5-1 to 2.5-3 - default falling pixclk edge */
455
456 if (flags & SOCAM_PCLK_SAMPLE_RISING)
457 return reg_write(client, RJ54N1_OUT_SIGPO, 1 << 4);
458 else
459 return reg_write(client, RJ54N1_OUT_SIGPO, 0);
460}
461
462static unsigned long rj54n1_query_bus_param(struct soc_camera_device *icd)
463{
464 struct soc_camera_link *icl = to_soc_camera_link(icd);
465 const unsigned long flags =
466 SOCAM_PCLK_SAMPLE_RISING | SOCAM_PCLK_SAMPLE_FALLING |
467 SOCAM_MASTER | SOCAM_DATAWIDTH_8 |
468 SOCAM_HSYNC_ACTIVE_HIGH | SOCAM_VSYNC_ACTIVE_HIGH |
469 SOCAM_DATA_ACTIVE_HIGH;
470
471 return soc_camera_apply_sensor_flags(icl, flags);
472}
473
474static int rj54n1_set_rect(struct i2c_client *client,
475 u16 reg_x, u16 reg_y, u16 reg_xy,
476 u32 width, u32 height)
477{
478 int ret;
479
480 ret = reg_write(client, reg_xy,
481 ((width >> 4) & 0x70) |
482 ((height >> 8) & 7));
483
484 if (!ret)
485 ret = reg_write(client, reg_x, width & 0xff);
486 if (!ret)
487 ret = reg_write(client, reg_y, height & 0xff);
488
489 return ret;
490}
491
492/*
493 * Some commands, specifically certain initialisation sequences, require
494 * a commit operation.
495 */
496static int rj54n1_commit(struct i2c_client *client)
497{
498 int ret = reg_write(client, RJ54N1_INIT_START, 1);
499 msleep(10);
500 if (!ret)
501 ret = reg_write(client, RJ54N1_INIT_START, 0);
502 return ret;
503}
504
505static int rj54n1_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
506{
507 struct i2c_client *client = sd->priv;
508 struct rj54n1 *rj54n1 = to_rj54n1(client);
509
510 a->c = rj54n1->rect;
511 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
512
513 return 0;
514}
515
516static int rj54n1_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
517{
518 a->bounds.left = RJ54N1_COLUMN_SKIP;
519 a->bounds.top = RJ54N1_ROW_SKIP;
520 a->bounds.width = RJ54N1_MAX_WIDTH;
521 a->bounds.height = RJ54N1_MAX_HEIGHT;
522 a->defrect = a->bounds;
523 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
524 a->pixelaspect.numerator = 1;
525 a->pixelaspect.denominator = 1;
526
527 return 0;
528}
529
530static int rj54n1_g_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
531{
532 struct i2c_client *client = sd->priv;
533 struct rj54n1 *rj54n1 = to_rj54n1(client);
534 struct v4l2_pix_format *pix = &f->fmt.pix;
535
536 pix->pixelformat = rj54n1->fourcc;
537 pix->field = V4L2_FIELD_NONE;
538 pix->width = rj54n1->width;
539 pix->height = rj54n1->height;
540
541 return 0;
542}
543
544/*
545 * The actual geometry configuration routine. It scales the input window into
546 * the output one, updates the window sizes and returns an error or the resize
547 * coefficient on success. Note: we only use the "Fixed Scaling" on this camera.
548 */
549static int rj54n1_sensor_scale(struct v4l2_subdev *sd, u32 *in_w, u32 *in_h,
550 u32 *out_w, u32 *out_h)
551{
552 struct i2c_client *client = sd->priv;
553 unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
554 output_w = *out_w, output_h = *out_h;
555 u16 inc_sel;
556 int ret;
557
558 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
559 RJ54N1_Y_OUTPUT_SIZE_S_L,
560 RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
561 if (!ret)
562 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L,
563 RJ54N1_Y_OUTPUT_SIZE_P_L,
564 RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h);
565
566 if (ret < 0)
567 return ret;
568
569 if (output_w > input_w || output_h > input_h) {
570 input_w = output_w;
571 input_h = output_h;
572
573 resize = 1024;
574 } else {
575 unsigned int resize_x, resize_y;
576 resize_x = input_w * 1024 / output_w;
577 resize_y = input_h * 1024 / output_h;
578
579 resize = min(resize_x, resize_y);
580
581 /* Prohibited value ranges */
582 switch (resize) {
583 case 2040 ... 2047:
584 resize = 2039;
585 break;
586 case 4080 ... 4095:
587 resize = 4079;
588 break;
589 case 8160 ... 8191:
590 resize = 8159;
591 break;
592 case 16320 ... 16383:
593 resize = 16319;
594 }
595
596 input_w = output_w * resize / 1024;
597 input_h = output_h * resize / 1024;
598 }
599
600 /* Set scaling */
601 ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff);
602 if (!ret)
603 ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8);
604
605 if (ret < 0)
606 return ret;
607
608 /*
609 * Configure a skipping bitmask. The sensor will select a skipping value
610 * among set bits automatically.
611 */
612 skip = min(resize / 1024, (unsigned)15);
613 inc_sel = 1 << skip;
614
615 if (inc_sel <= 2)
616 inc_sel = 0xc;
617 else if (resize & 1023 && skip < 15)
618 inc_sel |= 1 << (skip + 1);
619
620 ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc);
621 if (!ret)
622 ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
623
624 /* Start resizing */
625 if (!ret)
626 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
627 RESIZE_HOLD_SEL | RESIZE_GO | 1);
628
629 if (ret < 0)
630 return ret;
631
632 dev_dbg(&client->dev, "resize %u, skip %u\n", resize, skip);
633
634 /* Constant taken from manufacturer's example */
635 msleep(230);
636
637 ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1);
638 if (ret < 0)
639 return ret;
640
641 *in_w = input_w;
642 *in_h = input_h;
643 *out_w = output_w;
644 *out_h = output_h;
645
646 return resize;
647}
648
649static int rj54n1_set_clock(struct i2c_client *client)
650{
651 struct rj54n1 *rj54n1 = to_rj54n1(client);
652 int ret;
653
654 /* Enable external clock */
655 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
656 /* Leave stand-by */
657 if (!ret)
658 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
659
660 if (!ret)
661 ret = reg_write(client, RJ54N1_PLL_L, 2);
662 if (!ret)
663 ret = reg_write(client, RJ54N1_PLL_N, 0x31);
664
665 /* TGCLK dividers */
666 if (!ret)
667 ret = reg_write(client, RJ54N1_RATIO_TG,
668 rj54n1->clk_div.ratio_tg);
669 if (!ret)
670 ret = reg_write(client, RJ54N1_RATIO_T,
671 rj54n1->clk_div.ratio_t);
672 if (!ret)
673 ret = reg_write(client, RJ54N1_RATIO_R,
674 rj54n1->clk_div.ratio_r);
675
676 /* Enable TGCLK & RAMP */
677 if (!ret)
678 ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3);
679
680 /* Disable clock output */
681 if (!ret)
682 ret = reg_write(client, RJ54N1_OCLK_DSP, 0);
683
684 /* Set divisors */
685 if (!ret)
686 ret = reg_write(client, RJ54N1_RATIO_OP,
687 rj54n1->clk_div.ratio_op);
688 if (!ret)
689 ret = reg_write(client, RJ54N1_RATIO_O,
690 rj54n1->clk_div.ratio_o);
691
692 /* Enable OCLK */
693 if (!ret)
694 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
695
696 /* Use PLL for Timing Generator, write 2 to reserved bits */
697 if (!ret)
698 ret = reg_write(client, RJ54N1_TG_BYPASS, 2);
699
700 /* Take sensor out of reset */
701 if (!ret)
702 ret = reg_write(client, RJ54N1_RESET_STANDBY,
703 E_EXCLK | SEN_RSTX);
704 /* Enable PLL */
705 if (!ret)
706 ret = reg_write(client, RJ54N1_PLL_EN, 1);
707
708 /* Wait for PLL to stabilise */
709 msleep(10);
710
711 /* Enable clock to frequency divider */
712 if (!ret)
713 ret = reg_write(client, RJ54N1_CLK_RST, 1);
714
715 if (!ret)
716 ret = reg_read(client, RJ54N1_CLK_RST);
717 if (ret != 1) {
718 dev_err(&client->dev,
719 "Resetting RJ54N1CB0C clock failed: %d!\n", ret);
720 return -EIO;
721 }
722 /* Start the PLL */
723 ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
724
725 /* Enable OCLK */
726 if (!ret)
727 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
728
729 return ret;
730}
731
732static int rj54n1_reg_init(struct i2c_client *client)
733{
734 int ret = rj54n1_set_clock(client);
735
736 if (!ret)
737 ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7));
738 if (!ret)
739 ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10));
740
741 /* Set binning divisors */
742 if (!ret)
743 ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4));
744 if (!ret)
745 ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf);
746
747 /* Switch to fixed resize mode */
748 if (!ret)
749 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
750 RESIZE_HOLD_SEL | 1);
751
752 /* Set gain */
753 if (!ret)
754 ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
755
756 /* Mirror the image back: default is upside down and left-to-right... */
757 if (!ret)
758 ret = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 3, 3);
759
760 if (!ret)
761 ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
762 if (!ret)
763 ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
764 if (!ret)
765 ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
766
767 if (!ret)
768 ret = reg_write(client, RJ54N1_RESET_STANDBY,
769 E_EXCLK | DSP_RSTX | SEN_RSTX);
770
771 /* Commit init */
772 if (!ret)
773 ret = rj54n1_commit(client);
774
775 /* Take DSP, TG, sensor out of reset */
776 if (!ret)
777 ret = reg_write(client, RJ54N1_RESET_STANDBY,
778 E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
779
780 if (!ret)
781 ret = reg_write(client, 0x7fe, 2);
782
783 /* Constant taken from manufacturer's example */
784 msleep(700);
785
786 return ret;
787}
788
789/* FIXME: streaming output only up to 800x600 is functional */
790static int rj54n1_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
791{
792 struct v4l2_pix_format *pix = &f->fmt.pix;
793
794 pix->field = V4L2_FIELD_NONE;
795
796 if (pix->width > 800)
797 pix->width = 800;
798 if (pix->height > 600)
799 pix->height = 600;
800
801 return 0;
802}
803
804static int rj54n1_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *f)
805{
806 struct i2c_client *client = sd->priv;
807 struct rj54n1 *rj54n1 = to_rj54n1(client);
808 struct v4l2_pix_format *pix = &f->fmt.pix;
809 unsigned int output_w, output_h,
810 input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
811 int ret;
812
813 /*
814 * The host driver can call us without .try_fmt(), so, we have to take
815 * care ourseleves
816 */
817 ret = rj54n1_try_fmt(sd, f);
818
819 /*
820 * Verify if the sensor has just been powered on. TODO: replace this
821 * with proper PM, when a suitable API is available.
822 */
823 if (!ret)
824 ret = reg_read(client, RJ54N1_RESET_STANDBY);
825 if (ret < 0)
826 return ret;
827
828 if (!(ret & E_EXCLK)) {
829 ret = rj54n1_reg_init(client);
830 if (ret < 0)
831 return ret;
832 }
833
834 /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
835 switch (pix->pixelformat) {
836 case V4L2_PIX_FMT_YUYV:
837 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
838 if (!ret)
839 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
840 break;
841 case V4L2_PIX_FMT_RGB565:
842 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
843 if (!ret)
844 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
845 break;
846 default:
847 ret = -EINVAL;
848 }
849
850 if (ret < 0)
851 return ret;
852
853 /* Supported scales 1:1 - 1:16 */
854 if (pix->width < input_w / 16)
855 pix->width = input_w / 16;
856 if (pix->height < input_h / 16)
857 pix->height = input_h / 16;
858
859 output_w = pix->width;
860 output_h = pix->height;
861
862 ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
863 if (ret < 0)
864 return ret;
865
866 rj54n1->fourcc = pix->pixelformat;
867 rj54n1->resize = ret;
868 rj54n1->rect.width = input_w;
869 rj54n1->rect.height = input_h;
870 rj54n1->width = output_w;
871 rj54n1->height = output_h;
872
873 pix->width = output_w;
874 pix->height = output_h;
875 pix->field = V4L2_FIELD_NONE;
876
877 return ret;
878}
879
880static int rj54n1_g_chip_ident(struct v4l2_subdev *sd,
881 struct v4l2_dbg_chip_ident *id)
882{
883 struct i2c_client *client = sd->priv;
884
885 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
886 return -EINVAL;
887
888 if (id->match.addr != client->addr)
889 return -ENODEV;
890
891 id->ident = V4L2_IDENT_RJ54N1CB0C;
892 id->revision = 0;
893
894 return 0;
895}
896
897#ifdef CONFIG_VIDEO_ADV_DEBUG
898static int rj54n1_g_register(struct v4l2_subdev *sd,
899 struct v4l2_dbg_register *reg)
900{
901 struct i2c_client *client = sd->priv;
902
903 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR ||
904 reg->reg < 0x400 || reg->reg > 0x1fff)
905 /* Registers > 0x0800 are only available from Sharp support */
906 return -EINVAL;
907
908 if (reg->match.addr != client->addr)
909 return -ENODEV;
910
911 reg->size = 1;
912 reg->val = reg_read(client, reg->reg);
913
914 if (reg->val > 0xff)
915 return -EIO;
916
917 return 0;
918}
919
920static int rj54n1_s_register(struct v4l2_subdev *sd,
921 struct v4l2_dbg_register *reg)
922{
923 struct i2c_client *client = sd->priv;
924
925 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR ||
926 reg->reg < 0x400 || reg->reg > 0x1fff)
927 /* Registers >= 0x0800 are only available from Sharp support */
928 return -EINVAL;
929
930 if (reg->match.addr != client->addr)
931 return -ENODEV;
932
933 if (reg_write(client, reg->reg, reg->val) < 0)
934 return -EIO;
935
936 return 0;
937}
938#endif
939
940static const struct v4l2_queryctrl rj54n1_controls[] = {
941 {
942 .id = V4L2_CID_VFLIP,
943 .type = V4L2_CTRL_TYPE_BOOLEAN,
944 .name = "Flip Vertically",
945 .minimum = 0,
946 .maximum = 1,
947 .step = 1,
948 .default_value = 0,
949 }, {
950 .id = V4L2_CID_HFLIP,
951 .type = V4L2_CTRL_TYPE_BOOLEAN,
952 .name = "Flip Horizontally",
953 .minimum = 0,
954 .maximum = 1,
955 .step = 1,
956 .default_value = 0,
957 }, {
958 .id = V4L2_CID_GAIN,
959 .type = V4L2_CTRL_TYPE_INTEGER,
960 .name = "Gain",
961 .minimum = 0,
962 .maximum = 127,
963 .step = 1,
964 .default_value = 66,
965 .flags = V4L2_CTRL_FLAG_SLIDER,
966 },
967};
968
969static struct soc_camera_ops rj54n1_ops = {
970 .set_bus_param = rj54n1_set_bus_param,
971 .query_bus_param = rj54n1_query_bus_param,
972 .controls = rj54n1_controls,
973 .num_controls = ARRAY_SIZE(rj54n1_controls),
974};
975
976static int rj54n1_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
977{
978 struct i2c_client *client = sd->priv;
979 int data;
980
981 switch (ctrl->id) {
982 case V4L2_CID_VFLIP:
983 data = reg_read(client, RJ54N1_MIRROR_STILL_MODE);
984 if (data < 0)
985 return -EIO;
986 ctrl->value = !(data & 1);
987 break;
988 case V4L2_CID_HFLIP:
989 data = reg_read(client, RJ54N1_MIRROR_STILL_MODE);
990 if (data < 0)
991 return -EIO;
992 ctrl->value = !(data & 2);
993 break;
994 case V4L2_CID_GAIN:
995 data = reg_read(client, RJ54N1_Y_GAIN);
996 if (data < 0)
997 return -EIO;
998
999 ctrl->value = data / 2;
1000 break;
1001 }
1002
1003 return 0;
1004}
1005
1006static int rj54n1_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
1007{
1008 int data;
1009 struct i2c_client *client = sd->priv;
1010 const struct v4l2_queryctrl *qctrl;
1011
1012 qctrl = soc_camera_find_qctrl(&rj54n1_ops, ctrl->id);
1013 if (!qctrl)
1014 return -EINVAL;
1015
1016 switch (ctrl->id) {
1017 case V4L2_CID_VFLIP:
1018 if (ctrl->value)
1019 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1);
1020 else
1021 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1);
1022 if (data < 0)
1023 return -EIO;
1024 break;
1025 case V4L2_CID_HFLIP:
1026 if (ctrl->value)
1027 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2);
1028 else
1029 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2);
1030 if (data < 0)
1031 return -EIO;
1032 break;
1033 case V4L2_CID_GAIN:
1034 if (ctrl->value > qctrl->maximum ||
1035 ctrl->value < qctrl->minimum)
1036 return -EINVAL;
1037 else if (reg_write(client, RJ54N1_Y_GAIN, ctrl->value * 2) < 0)
1038 return -EIO;
1039 break;
1040 }
1041
1042 return 0;
1043}
1044
1045static struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
1046 .g_ctrl = rj54n1_g_ctrl,
1047 .s_ctrl = rj54n1_s_ctrl,
1048 .g_chip_ident = rj54n1_g_chip_ident,
1049#ifdef CONFIG_VIDEO_ADV_DEBUG
1050 .g_register = rj54n1_g_register,
1051 .s_register = rj54n1_s_register,
1052#endif
1053};
1054
1055static struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
1056 .s_stream = rj54n1_s_stream,
1057 .s_fmt = rj54n1_s_fmt,
1058 .g_fmt = rj54n1_g_fmt,
1059 .try_fmt = rj54n1_try_fmt,
1060 .g_crop = rj54n1_g_crop,
1061 .cropcap = rj54n1_cropcap,
1062};
1063
1064static struct v4l2_subdev_ops rj54n1_subdev_ops = {
1065 .core = &rj54n1_subdev_core_ops,
1066 .video = &rj54n1_subdev_video_ops,
1067};
1068
1069static int rj54n1_pin_config(struct i2c_client *client)
1070{
1071 /*
1072 * Experimentally found out IOCTRL wired to 0. TODO: add to platform
1073 * data: 0 or 1 << 7.
1074 */
1075 return reg_write(client, RJ54N1_IOC, 0);
1076}
1077
1078/*
1079 * Interface active, can use i2c. If it fails, it can indeed mean, that
1080 * this wasn't our capture interface, so, we wait for the right one
1081 */
1082static int rj54n1_video_probe(struct soc_camera_device *icd,
1083 struct i2c_client *client)
1084{
1085 int data1, data2;
1086 int ret;
1087
1088 /* This could be a BUG_ON() or a WARN_ON(), or remove it completely */
1089 if (!icd->dev.parent ||
1090 to_soc_camera_host(icd->dev.parent)->nr != icd->iface)
1091 return -ENODEV;
1092
1093 /* Read out the chip version register */
1094 data1 = reg_read(client, RJ54N1_DEV_CODE);
1095 data2 = reg_read(client, RJ54N1_DEV_CODE2);
1096
1097 if (data1 != 0x51 || data2 != 0x10) {
1098 ret = -ENODEV;
1099 dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n",
1100 data1, data2);
1101 goto ei2c;
1102 }
1103
1104 ret = rj54n1_pin_config(client);
1105 if (ret < 0)
1106 goto ei2c;
1107
1108 dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n",
1109 data1, data2);
1110
1111ei2c:
1112 return ret;
1113}
1114
1115static int rj54n1_probe(struct i2c_client *client,
1116 const struct i2c_device_id *did)
1117{
1118 struct rj54n1 *rj54n1;
1119 struct soc_camera_device *icd = client->dev.platform_data;
1120 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1121 struct soc_camera_link *icl;
1122 int ret;
1123
1124 if (!icd) {
1125 dev_err(&client->dev, "RJ54N1CB0C: missing soc-camera data!\n");
1126 return -EINVAL;
1127 }
1128
1129 icl = to_soc_camera_link(icd);
1130 if (!icl) {
1131 dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
1132 return -EINVAL;
1133 }
1134
1135 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1136 dev_warn(&adapter->dev,
1137 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1138 return -EIO;
1139 }
1140
1141 rj54n1 = kzalloc(sizeof(struct rj54n1), GFP_KERNEL);
1142 if (!rj54n1)
1143 return -ENOMEM;
1144
1145 v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops);
1146
1147 icd->ops = &rj54n1_ops;
1148
1149 rj54n1->clk_div = clk_div;
1150 rj54n1->rect.left = RJ54N1_COLUMN_SKIP;
1151 rj54n1->rect.top = RJ54N1_ROW_SKIP;
1152 rj54n1->rect.width = RJ54N1_MAX_WIDTH;
1153 rj54n1->rect.height = RJ54N1_MAX_HEIGHT;
1154 rj54n1->width = RJ54N1_MAX_WIDTH;
1155 rj54n1->height = RJ54N1_MAX_HEIGHT;
1156 rj54n1->fourcc = V4L2_PIX_FMT_YUYV;
1157 rj54n1->resize = 1024;
1158
1159 ret = rj54n1_video_probe(icd, client);
1160 if (ret < 0) {
1161 icd->ops = NULL;
1162 i2c_set_clientdata(client, NULL);
1163 kfree(rj54n1);
1164 return ret;
1165 }
1166
1167 icd->formats = rj54n1_colour_formats;
1168 icd->num_formats = ARRAY_SIZE(rj54n1_colour_formats);
1169
1170 return ret;
1171}
1172
1173static int rj54n1_remove(struct i2c_client *client)
1174{
1175 struct rj54n1 *rj54n1 = to_rj54n1(client);
1176 struct soc_camera_device *icd = client->dev.platform_data;
1177 struct soc_camera_link *icl = to_soc_camera_link(icd);
1178
1179 icd->ops = NULL;
1180 if (icl->free_bus)
1181 icl->free_bus(icl);
1182 i2c_set_clientdata(client, NULL);
1183 client->driver = NULL;
1184 kfree(rj54n1);
1185
1186 return 0;
1187}
1188
1189static const struct i2c_device_id rj54n1_id[] = {
1190 { "rj54n1cb0c", 0 },
1191 { }
1192};
1193MODULE_DEVICE_TABLE(i2c, rj54n1_id);
1194
1195static struct i2c_driver rj54n1_i2c_driver = {
1196 .driver = {
1197 .name = "rj54n1cb0c",
1198 },
1199 .probe = rj54n1_probe,
1200 .remove = rj54n1_remove,
1201 .id_table = rj54n1_id,
1202};
1203
1204static int __init rj54n1_mod_init(void)
1205{
1206 return i2c_add_driver(&rj54n1_i2c_driver);
1207}
1208
1209static void __exit rj54n1_mod_exit(void)
1210{
1211 i2c_del_driver(&rj54n1_i2c_driver);
1212}
1213
1214module_init(rj54n1_mod_init);
1215module_exit(rj54n1_mod_exit);
1216
1217MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver");
1218MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
1219MODULE_LICENSE("GPL v2");
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-28 14:53:35 -0500