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-rw-r--r--drivers/char/Kconfig4
-rw-r--r--drivers/char/mxser.c1
-rw-r--r--drivers/char/rtc.c5
-rw-r--r--drivers/net/tg3.c178
-rw-r--r--drivers/net/wireless/ipw2200.h1
-rw-r--r--drivers/serial/sunsu.c10
6 files changed, 131 insertions, 68 deletions
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig
index df5f2b0e0750..a1de06d76de6 100644
--- a/drivers/char/Kconfig
+++ b/drivers/char/Kconfig
@@ -175,7 +175,7 @@ config MOXA_INTELLIO
175 175
176config MOXA_SMARTIO 176config MOXA_SMARTIO
177 tristate "Moxa SmartIO support" 177 tristate "Moxa SmartIO support"
178 depends on SERIAL_NONSTANDARD && (BROKEN || !SPARC32) 178 depends on SERIAL_NONSTANDARD
179 help 179 help
180 Say Y here if you have a Moxa SmartIO multiport serial card. 180 Say Y here if you have a Moxa SmartIO multiport serial card.
181 181
@@ -735,7 +735,7 @@ config SGI_IP27_RTC
735 735
736config GEN_RTC 736config GEN_RTC
737 tristate "Generic /dev/rtc emulation" 737 tristate "Generic /dev/rtc emulation"
738 depends on RTC!=y && !IA64 && !ARM && !PPC64 && !M32R && !SPARC32 738 depends on RTC!=y && !IA64 && !ARM && !PPC64 && !M32R && !SPARC32 && !SPARC64
739 ---help--- 739 ---help---
740 If you say Y here and create a character special file /dev/rtc with 740 If you say Y here and create a character special file /dev/rtc with
741 major number 10 and minor number 135 using mknod ("man mknod"), you 741 major number 10 and minor number 135 using mknod ("man mknod"), you
diff --git a/drivers/char/mxser.c b/drivers/char/mxser.c
index f022f0944434..d0ef1ae41298 100644
--- a/drivers/char/mxser.c
+++ b/drivers/char/mxser.c
@@ -63,7 +63,6 @@
63#include <asm/system.h> 63#include <asm/system.h>
64#include <asm/io.h> 64#include <asm/io.h>
65#include <asm/irq.h> 65#include <asm/irq.h>
66#include <asm/segment.h>
67#include <asm/bitops.h> 66#include <asm/bitops.h>
68#include <asm/uaccess.h> 67#include <asm/uaccess.h>
69 68
diff --git a/drivers/char/rtc.c b/drivers/char/rtc.c
index cd4fe8b1709f..63fff7c1244a 100644
--- a/drivers/char/rtc.c
+++ b/drivers/char/rtc.c
@@ -938,10 +938,9 @@ found:
938 938
939 /* 939 /*
940 * XXX Interrupt pin #7 in Espresso is shared between RTC and 940 * XXX Interrupt pin #7 in Espresso is shared between RTC and
941 * PCI Slot 2 INTA# (and some INTx# in Slot 1). SA_INTERRUPT here 941 * PCI Slot 2 INTA# (and some INTx# in Slot 1).
942 * is asking for trouble with add-on boards. Change to SA_SHIRQ.
943 */ 942 */
944 if (request_irq(rtc_irq, rtc_interrupt, SA_INTERRUPT, "rtc", (void *)&rtc_port)) { 943 if (request_irq(rtc_irq, rtc_interrupt, SA_SHIRQ, "rtc", (void *)&rtc_port)) {
945 /* 944 /*
946 * Standard way for sparc to print irq's is to use 945 * Standard way for sparc to print irq's is to use
947 * __irq_itoa(). I think for EBus it's ok to use %d. 946 * __irq_itoa(). I think for EBus it's ok to use %d.
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index 3faf62310f84..dc57352e5a97 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -36,6 +36,7 @@
36#include <linux/ip.h> 36#include <linux/ip.h>
37#include <linux/tcp.h> 37#include <linux/tcp.h>
38#include <linux/workqueue.h> 38#include <linux/workqueue.h>
39#include <linux/prefetch.h>
39 40
40#include <net/checksum.h> 41#include <net/checksum.h>
41 42
@@ -66,8 +67,8 @@
66 67
67#define DRV_MODULE_NAME "tg3" 68#define DRV_MODULE_NAME "tg3"
68#define PFX DRV_MODULE_NAME ": " 69#define PFX DRV_MODULE_NAME ": "
69#define DRV_MODULE_VERSION "3.38" 70#define DRV_MODULE_VERSION "3.39"
70#define DRV_MODULE_RELDATE "September 1, 2005" 71#define DRV_MODULE_RELDATE "September 5, 2005"
71 72
72#define TG3_DEF_MAC_MODE 0 73#define TG3_DEF_MAC_MODE 0
73#define TG3_DEF_RX_MODE 0 74#define TG3_DEF_RX_MODE 0
@@ -487,7 +488,8 @@ static void tg3_disable_ints(struct tg3 *tp)
487 488
488static inline void tg3_cond_int(struct tg3 *tp) 489static inline void tg3_cond_int(struct tg3 *tp)
489{ 490{
490 if (tp->hw_status->status & SD_STATUS_UPDATED) 491 if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) &&
492 (tp->hw_status->status & SD_STATUS_UPDATED))
491 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl | GRC_LCLCTRL_SETINT); 493 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl | GRC_LCLCTRL_SETINT);
492} 494}
493 495
@@ -3219,18 +3221,17 @@ static int tg3_poll(struct net_device *netdev, int *budget)
3219 netdev->quota -= work_done; 3221 netdev->quota -= work_done;
3220 } 3222 }
3221 3223
3222 if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) 3224 if (tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) {
3223 tp->last_tag = sblk->status_tag; 3225 tp->last_tag = sblk->status_tag;
3224 rmb(); 3226 rmb();
3225 sblk->status &= ~SD_STATUS_UPDATED; 3227 } else
3228 sblk->status &= ~SD_STATUS_UPDATED;
3226 3229
3227 /* if no more work, tell net stack and NIC we're done */ 3230 /* if no more work, tell net stack and NIC we're done */
3228 done = !tg3_has_work(tp); 3231 done = !tg3_has_work(tp);
3229 if (done) { 3232 if (done) {
3230 spin_lock(&tp->lock);
3231 netif_rx_complete(netdev); 3233 netif_rx_complete(netdev);
3232 tg3_restart_ints(tp); 3234 tg3_restart_ints(tp);
3233 spin_unlock(&tp->lock);
3234 } 3235 }
3235 3236
3236 return (done ? 0 : 1); 3237 return (done ? 0 : 1);
@@ -3278,8 +3279,9 @@ static irqreturn_t tg3_msi(int irq, void *dev_id, struct pt_regs *regs)
3278{ 3279{
3279 struct net_device *dev = dev_id; 3280 struct net_device *dev = dev_id;
3280 struct tg3 *tp = netdev_priv(dev); 3281 struct tg3 *tp = netdev_priv(dev);
3281 struct tg3_hw_status *sblk = tp->hw_status;
3282 3282
3283 prefetch(tp->hw_status);
3284 prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
3283 /* 3285 /*
3284 * Writing any value to intr-mbox-0 clears PCI INTA# and 3286 * Writing any value to intr-mbox-0 clears PCI INTA# and
3285 * chip-internal interrupt pending events. 3287 * chip-internal interrupt pending events.
@@ -3288,19 +3290,9 @@ static irqreturn_t tg3_msi(int irq, void *dev_id, struct pt_regs *regs)
3288 * event coalescing. 3290 * event coalescing.
3289 */ 3291 */
3290 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001); 3292 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 0x00000001);
3291 tp->last_tag = sblk->status_tag; 3293 if (likely(!tg3_irq_sync(tp)))
3292 rmb();
3293 if (tg3_irq_sync(tp))
3294 goto out;
3295 sblk->status &= ~SD_STATUS_UPDATED;
3296 if (likely(tg3_has_work(tp)))
3297 netif_rx_schedule(dev); /* schedule NAPI poll */ 3294 netif_rx_schedule(dev); /* schedule NAPI poll */
3298 else { 3295
3299 /* No work, re-enable interrupts. */
3300 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
3301 tp->last_tag << 24);
3302 }
3303out:
3304 return IRQ_RETVAL(1); 3296 return IRQ_RETVAL(1);
3305} 3297}
3306 3298
@@ -3330,9 +3322,10 @@ static irqreturn_t tg3_interrupt(int irq, void *dev_id, struct pt_regs *regs)
3330 if (tg3_irq_sync(tp)) 3322 if (tg3_irq_sync(tp))
3331 goto out; 3323 goto out;
3332 sblk->status &= ~SD_STATUS_UPDATED; 3324 sblk->status &= ~SD_STATUS_UPDATED;
3333 if (likely(tg3_has_work(tp))) 3325 if (likely(tg3_has_work(tp))) {
3326 prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
3334 netif_rx_schedule(dev); /* schedule NAPI poll */ 3327 netif_rx_schedule(dev); /* schedule NAPI poll */
3335 else { 3328 } else {
3336 /* No work, shared interrupt perhaps? re-enable 3329 /* No work, shared interrupt perhaps? re-enable
3337 * interrupts, and flush that PCI write 3330 * interrupts, and flush that PCI write
3338 */ 3331 */
@@ -3358,7 +3351,7 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id, struct pt_regs *r
3358 * Reading the PCI State register will confirm whether the 3351 * Reading the PCI State register will confirm whether the
3359 * interrupt is ours and will flush the status block. 3352 * interrupt is ours and will flush the status block.
3360 */ 3353 */
3361 if ((sblk->status & SD_STATUS_UPDATED) || 3354 if ((sblk->status_tag != tp->last_tag) ||
3362 !(tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { 3355 !(tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) {
3363 /* 3356 /*
3364 * writing any value to intr-mbox-0 clears PCI INTA# and 3357 * writing any value to intr-mbox-0 clears PCI INTA# and
@@ -3369,19 +3362,17 @@ static irqreturn_t tg3_interrupt_tagged(int irq, void *dev_id, struct pt_regs *r
3369 */ 3362 */
3370 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 3363 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW,
3371 0x00000001); 3364 0x00000001);
3372 tp->last_tag = sblk->status_tag;
3373 rmb();
3374 if (tg3_irq_sync(tp)) 3365 if (tg3_irq_sync(tp))
3375 goto out; 3366 goto out;
3376 sblk->status &= ~SD_STATUS_UPDATED; 3367 if (netif_rx_schedule_prep(dev)) {
3377 if (likely(tg3_has_work(tp))) 3368 prefetch(&tp->rx_rcb[tp->rx_rcb_ptr]);
3378 netif_rx_schedule(dev); /* schedule NAPI poll */ 3369 /* Update last_tag to mark that this status has been
3379 else { 3370 * seen. Because interrupt may be shared, we may be
3380 /* no work, shared interrupt perhaps? re-enable 3371 * racing with tg3_poll(), so only update last_tag
3381 * interrupts, and flush that PCI write 3372 * if tg3_poll() is not scheduled.
3382 */ 3373 */
3383 tw32_mailbox_f(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 3374 tp->last_tag = sblk->status_tag;
3384 tp->last_tag << 24); 3375 __netif_rx_schedule(dev);
3385 } 3376 }
3386 } else { /* shared interrupt */ 3377 } else { /* shared interrupt */
3387 handled = 0; 3378 handled = 0;
@@ -5962,7 +5953,7 @@ static int tg3_reset_hw(struct tg3 *tp)
5962 tw32(MAC_LED_CTRL, tp->led_ctrl); 5953 tw32(MAC_LED_CTRL, tp->led_ctrl);
5963 5954
5964 tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB); 5955 tw32(MAC_MI_STAT, MAC_MI_STAT_LNKSTAT_ATTN_ENAB);
5965 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) { 5956 if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES) {
5966 tw32_f(MAC_RX_MODE, RX_MODE_RESET); 5957 tw32_f(MAC_RX_MODE, RX_MODE_RESET);
5967 udelay(10); 5958 udelay(10);
5968 } 5959 }
@@ -6244,6 +6235,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
6244 if (err) 6235 if (err)
6245 return err; 6236 return err;
6246 6237
6238 tp->hw_status->status &= ~SD_STATUS_UPDATED;
6247 tg3_enable_ints(tp); 6239 tg3_enable_ints(tp);
6248 6240
6249 tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | 6241 tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE |
@@ -7559,6 +7551,38 @@ static void tg3_get_strings (struct net_device *dev, u32 stringset, u8 *buf)
7559 } 7551 }
7560} 7552}
7561 7553
7554static int tg3_phys_id(struct net_device *dev, u32 data)
7555{
7556 struct tg3 *tp = netdev_priv(dev);
7557 int i;
7558
7559 if (!netif_running(tp->dev))
7560 return -EAGAIN;
7561
7562 if (data == 0)
7563 data = 2;
7564
7565 for (i = 0; i < (data * 2); i++) {
7566 if ((i % 2) == 0)
7567 tw32(MAC_LED_CTRL, LED_CTRL_LNKLED_OVERRIDE |
7568 LED_CTRL_1000MBPS_ON |
7569 LED_CTRL_100MBPS_ON |
7570 LED_CTRL_10MBPS_ON |
7571 LED_CTRL_TRAFFIC_OVERRIDE |
7572 LED_CTRL_TRAFFIC_BLINK |
7573 LED_CTRL_TRAFFIC_LED);
7574
7575 else
7576 tw32(MAC_LED_CTRL, LED_CTRL_LNKLED_OVERRIDE |
7577 LED_CTRL_TRAFFIC_OVERRIDE);
7578
7579 if (msleep_interruptible(500))
7580 break;
7581 }
7582 tw32(MAC_LED_CTRL, tp->led_ctrl);
7583 return 0;
7584}
7585
7562static void tg3_get_ethtool_stats (struct net_device *dev, 7586static void tg3_get_ethtool_stats (struct net_device *dev,
7563 struct ethtool_stats *estats, u64 *tmp_stats) 7587 struct ethtool_stats *estats, u64 *tmp_stats)
7564{ 7588{
@@ -7618,7 +7642,7 @@ static int tg3_test_link(struct tg3 *tp)
7618 if (!netif_running(tp->dev)) 7642 if (!netif_running(tp->dev))
7619 return -ENODEV; 7643 return -ENODEV;
7620 7644
7621 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) 7645 if (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)
7622 max = TG3_SERDES_TIMEOUT_SEC; 7646 max = TG3_SERDES_TIMEOUT_SEC;
7623 else 7647 else
7624 max = TG3_COPPER_TIMEOUT_SEC; 7648 max = TG3_COPPER_TIMEOUT_SEC;
@@ -7903,9 +7927,12 @@ static int tg3_test_memory(struct tg3 *tp)
7903 return err; 7927 return err;
7904} 7928}
7905 7929
7906static int tg3_test_loopback(struct tg3 *tp) 7930#define TG3_MAC_LOOPBACK 0
7931#define TG3_PHY_LOOPBACK 1
7932
7933static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
7907{ 7934{
7908 u32 mac_mode, send_idx, rx_start_idx, rx_idx, tx_idx, opaque_key; 7935 u32 mac_mode, rx_start_idx, rx_idx, tx_idx, opaque_key;
7909 u32 desc_idx; 7936 u32 desc_idx;
7910 struct sk_buff *skb, *rx_skb; 7937 struct sk_buff *skb, *rx_skb;
7911 u8 *tx_data; 7938 u8 *tx_data;
@@ -7913,18 +7940,26 @@ static int tg3_test_loopback(struct tg3 *tp)
7913 int num_pkts, tx_len, rx_len, i, err; 7940 int num_pkts, tx_len, rx_len, i, err;
7914 struct tg3_rx_buffer_desc *desc; 7941 struct tg3_rx_buffer_desc *desc;
7915 7942
7916 if (!netif_running(tp->dev)) 7943 if (loopback_mode == TG3_MAC_LOOPBACK) {
7917 return -ENODEV; 7944 mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
7945 MAC_MODE_PORT_INT_LPBACK | MAC_MODE_LINK_POLARITY |
7946 MAC_MODE_PORT_MODE_GMII;
7947 tw32(MAC_MODE, mac_mode);
7948 } else if (loopback_mode == TG3_PHY_LOOPBACK) {
7949 mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
7950 MAC_MODE_LINK_POLARITY | MAC_MODE_PORT_MODE_GMII;
7951 if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401)
7952 mac_mode &= ~MAC_MODE_LINK_POLARITY;
7953 tw32(MAC_MODE, mac_mode);
7954
7955 tg3_writephy(tp, MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX |
7956 BMCR_SPEED1000);
7957 }
7958 else
7959 return -EINVAL;
7918 7960
7919 err = -EIO; 7961 err = -EIO;
7920 7962
7921 tg3_reset_hw(tp);
7922
7923 mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
7924 MAC_MODE_PORT_INT_LPBACK | MAC_MODE_LINK_POLARITY |
7925 MAC_MODE_PORT_MODE_GMII;
7926 tw32(MAC_MODE, mac_mode);
7927
7928 tx_len = 1514; 7963 tx_len = 1514;
7929 skb = dev_alloc_skb(tx_len); 7964 skb = dev_alloc_skb(tx_len);
7930 tx_data = skb_put(skb, tx_len); 7965 tx_data = skb_put(skb, tx_len);
@@ -7945,15 +7980,15 @@ static int tg3_test_loopback(struct tg3 *tp)
7945 7980
7946 rx_start_idx = tp->hw_status->idx[0].rx_producer; 7981 rx_start_idx = tp->hw_status->idx[0].rx_producer;
7947 7982
7948 send_idx = 0;
7949 num_pkts = 0; 7983 num_pkts = 0;
7950 7984
7951 tg3_set_txd(tp, send_idx, map, tx_len, 0, 1); 7985 tg3_set_txd(tp, tp->tx_prod, map, tx_len, 0, 1);
7952 7986
7953 send_idx++; 7987 tp->tx_prod++;
7954 num_pkts++; 7988 num_pkts++;
7955 7989
7956 tw32_tx_mbox(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW, send_idx); 7990 tw32_tx_mbox(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW,
7991 tp->tx_prod);
7957 tr32_mailbox(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW); 7992 tr32_mailbox(MAILBOX_SNDHOST_PROD_IDX_0 + TG3_64BIT_REG_LOW);
7958 7993
7959 udelay(10); 7994 udelay(10);
@@ -7966,7 +8001,7 @@ static int tg3_test_loopback(struct tg3 *tp)
7966 8001
7967 tx_idx = tp->hw_status->idx[0].tx_consumer; 8002 tx_idx = tp->hw_status->idx[0].tx_consumer;
7968 rx_idx = tp->hw_status->idx[0].rx_producer; 8003 rx_idx = tp->hw_status->idx[0].rx_producer;
7969 if ((tx_idx == send_idx) && 8004 if ((tx_idx == tp->tx_prod) &&
7970 (rx_idx == (rx_start_idx + num_pkts))) 8005 (rx_idx == (rx_start_idx + num_pkts)))
7971 break; 8006 break;
7972 } 8007 }
@@ -7974,7 +8009,7 @@ static int tg3_test_loopback(struct tg3 *tp)
7974 pci_unmap_single(tp->pdev, map, tx_len, PCI_DMA_TODEVICE); 8009 pci_unmap_single(tp->pdev, map, tx_len, PCI_DMA_TODEVICE);
7975 dev_kfree_skb(skb); 8010 dev_kfree_skb(skb);
7976 8011
7977 if (tx_idx != send_idx) 8012 if (tx_idx != tp->tx_prod)
7978 goto out; 8013 goto out;
7979 8014
7980 if (rx_idx != rx_start_idx + num_pkts) 8015 if (rx_idx != rx_start_idx + num_pkts)
@@ -8010,6 +8045,30 @@ out:
8010 return err; 8045 return err;
8011} 8046}
8012 8047
8048#define TG3_MAC_LOOPBACK_FAILED 1
8049#define TG3_PHY_LOOPBACK_FAILED 2
8050#define TG3_LOOPBACK_FAILED (TG3_MAC_LOOPBACK_FAILED | \
8051 TG3_PHY_LOOPBACK_FAILED)
8052
8053static int tg3_test_loopback(struct tg3 *tp)
8054{
8055 int err = 0;
8056
8057 if (!netif_running(tp->dev))
8058 return TG3_LOOPBACK_FAILED;
8059
8060 tg3_reset_hw(tp);
8061
8062 if (tg3_run_loopback(tp, TG3_MAC_LOOPBACK))
8063 err |= TG3_MAC_LOOPBACK_FAILED;
8064 if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
8065 if (tg3_run_loopback(tp, TG3_PHY_LOOPBACK))
8066 err |= TG3_PHY_LOOPBACK_FAILED;
8067 }
8068
8069 return err;
8070}
8071
8013static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest, 8072static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
8014 u64 *data) 8073 u64 *data)
8015{ 8074{
@@ -8050,10 +8109,8 @@ static void tg3_self_test(struct net_device *dev, struct ethtool_test *etest,
8050 etest->flags |= ETH_TEST_FL_FAILED; 8109 etest->flags |= ETH_TEST_FL_FAILED;
8051 data[3] = 1; 8110 data[3] = 1;
8052 } 8111 }
8053 if (tg3_test_loopback(tp) != 0) { 8112 if ((data[4] = tg3_test_loopback(tp)) != 0)
8054 etest->flags |= ETH_TEST_FL_FAILED; 8113 etest->flags |= ETH_TEST_FL_FAILED;
8055 data[4] = 1;
8056 }
8057 8114
8058 tg3_full_unlock(tp); 8115 tg3_full_unlock(tp);
8059 8116
@@ -8241,6 +8298,7 @@ static struct ethtool_ops tg3_ethtool_ops = {
8241 .self_test_count = tg3_get_test_count, 8298 .self_test_count = tg3_get_test_count,
8242 .self_test = tg3_self_test, 8299 .self_test = tg3_self_test,
8243 .get_strings = tg3_get_strings, 8300 .get_strings = tg3_get_strings,
8301 .phys_id = tg3_phys_id,
8244 .get_stats_count = tg3_get_stats_count, 8302 .get_stats_count = tg3_get_stats_count,
8245 .get_ethtool_stats = tg3_get_ethtool_stats, 8303 .get_ethtool_stats = tg3_get_ethtool_stats,
8246 .get_coalesce = tg3_get_coalesce, 8304 .get_coalesce = tg3_get_coalesce,
@@ -8305,7 +8363,8 @@ static void __devinit tg3_get_nvram_info(struct tg3 *tp)
8305 tw32(NVRAM_CFG1, nvcfg1); 8363 tw32(NVRAM_CFG1, nvcfg1);
8306 } 8364 }
8307 8365
8308 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) { 8366 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750) ||
8367 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5780)) {
8309 switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) { 8368 switch (nvcfg1 & NVRAM_CFG1_VENDOR_MASK) {
8310 case FLASH_VENDOR_ATMEL_FLASH_BUFFERED: 8369 case FLASH_VENDOR_ATMEL_FLASH_BUFFERED:
8311 tp->nvram_jedecnum = JEDEC_ATMEL; 8370 tp->nvram_jedecnum = JEDEC_ATMEL;
@@ -8719,8 +8778,9 @@ static int tg3_nvram_write_block_buffered(struct tg3 *tp, u32 offset, u32 len,
8719 if (i == (len - 4)) 8778 if (i == (len - 4))
8720 nvram_cmd |= NVRAM_CMD_LAST; 8779 nvram_cmd |= NVRAM_CMD_LAST;
8721 8780
8722 if ((tp->nvram_jedecnum == JEDEC_ST) && 8781 if ((GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752) &&
8723 (nvram_cmd & NVRAM_CMD_FIRST)) { 8782 (tp->nvram_jedecnum == JEDEC_ST) &&
8783 (nvram_cmd & NVRAM_CMD_FIRST)) {
8724 8784
8725 if ((ret = tg3_nvram_exec_cmd(tp, 8785 if ((ret = tg3_nvram_exec_cmd(tp,
8726 NVRAM_CMD_WREN | NVRAM_CMD_GO | 8786 NVRAM_CMD_WREN | NVRAM_CMD_GO |
diff --git a/drivers/net/wireless/ipw2200.h b/drivers/net/wireless/ipw2200.h
index 3bff09d93154..dc3e7bc805fc 100644
--- a/drivers/net/wireless/ipw2200.h
+++ b/drivers/net/wireless/ipw2200.h
@@ -45,6 +45,7 @@
45 45
46#include <linux/firmware.h> 46#include <linux/firmware.h>
47#include <linux/wireless.h> 47#include <linux/wireless.h>
48#include <linux/dma-mapping.h>
48#include <asm/io.h> 49#include <asm/io.h>
49 50
50#include <net/ieee80211.h> 51#include <net/ieee80211.h>
diff --git a/drivers/serial/sunsu.c b/drivers/serial/sunsu.c
index 0cc879eb1c02..5959e6755a81 100644
--- a/drivers/serial/sunsu.c
+++ b/drivers/serial/sunsu.c
@@ -269,7 +269,10 @@ static void sunsu_stop_tx(struct uart_port *port)
269 269
270 __stop_tx(up); 270 __stop_tx(up);
271 271
272 if (up->port.type == PORT_16C950 && tty_stop /*FIXME*/) { 272 /*
273 * We really want to stop the transmitter from sending.
274 */
275 if (up->port.type == PORT_16C950) {
273 up->acr |= UART_ACR_TXDIS; 276 up->acr |= UART_ACR_TXDIS;
274 serial_icr_write(up, UART_ACR, up->acr); 277 serial_icr_write(up, UART_ACR, up->acr);
275 } 278 }
@@ -283,10 +286,11 @@ static void sunsu_start_tx(struct uart_port *port)
283 up->ier |= UART_IER_THRI; 286 up->ier |= UART_IER_THRI;
284 serial_out(up, UART_IER, up->ier); 287 serial_out(up, UART_IER, up->ier);
285 } 288 }
289
286 /* 290 /*
287 * We only do this from uart_start 291 * Re-enable the transmitter if we disabled it.
288 */ 292 */
289 if (tty_start && up->port.type == PORT_16C950 /*FIXME*/) { 293 if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
290 up->acr &= ~UART_ACR_TXDIS; 294 up->acr &= ~UART_ACR_TXDIS;
291 serial_icr_write(up, UART_ACR, up->acr); 295 serial_icr_write(up, UART_ACR, up->acr);
292 } 296 }