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-rw-r--r--drivers/char/tty_io.c1
-rw-r--r--drivers/serial/imx.c10
-rw-r--r--drivers/serial/mpc52xx_uart.c2
3 files changed, 11 insertions, 2 deletions
diff --git a/drivers/char/tty_io.c b/drivers/char/tty_io.c
index 6da962c9b21c..d71f0fc34b46 100644
--- a/drivers/char/tty_io.c
+++ b/drivers/char/tty_io.c
@@ -1875,6 +1875,7 @@ got_driver:
1875 */ 1875 */
1876 if (filp->f_op == &hung_up_tty_fops) 1876 if (filp->f_op == &hung_up_tty_fops)
1877 filp->f_op = &tty_fops; 1877 filp->f_op = &tty_fops;
1878 unlock_kernel();
1878 goto retry_open; 1879 goto retry_open;
1879 } 1880 }
1880 unlock_kernel(); 1881 unlock_kernel();
diff --git a/drivers/serial/imx.c b/drivers/serial/imx.c
index 4315b23590bd..eacb588a9345 100644
--- a/drivers/serial/imx.c
+++ b/drivers/serial/imx.c
@@ -120,7 +120,8 @@
120#define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */ 120#define MX2_UCR3_RXDMUXSEL (1<<2) /* RXD Muxed Input Select, on mx2/mx3 */
121#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */ 121#define UCR3_INVT (1<<1) /* Inverted Infrared transmission */
122#define UCR3_BPEN (1<<0) /* Preset registers enable */ 122#define UCR3_BPEN (1<<0) /* Preset registers enable */
123#define UCR4_CTSTL_32 (32<<10) /* CTS trigger level (32 chars) */ 123#define UCR4_CTSTL_SHF 10 /* CTS trigger level shift */
124#define UCR4_CTSTL_MASK 0x3F /* CTS trigger is 6 bits wide */
124#define UCR4_INVR (1<<9) /* Inverted infrared reception */ 125#define UCR4_INVR (1<<9) /* Inverted infrared reception */
125#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */ 126#define UCR4_ENIRI (1<<8) /* Serial infrared interrupt enable */
126#define UCR4_WKEN (1<<7) /* Wake interrupt enable */ 127#define UCR4_WKEN (1<<7) /* Wake interrupt enable */
@@ -591,6 +592,9 @@ static int imx_setup_ufcr(struct imx_port *sport, unsigned int mode)
591 return 0; 592 return 0;
592} 593}
593 594
595/* half the RX buffer size */
596#define CTSTL 16
597
594static int imx_startup(struct uart_port *port) 598static int imx_startup(struct uart_port *port)
595{ 599{
596 struct imx_port *sport = (struct imx_port *)port; 600 struct imx_port *sport = (struct imx_port *)port;
@@ -607,6 +611,10 @@ static int imx_startup(struct uart_port *port)
607 if (USE_IRDA(sport)) 611 if (USE_IRDA(sport))
608 temp |= UCR4_IRSC; 612 temp |= UCR4_IRSC;
609 613
614 /* set the trigger level for CTS */
615 temp &= ~(UCR4_CTSTL_MASK<< UCR4_CTSTL_SHF);
616 temp |= CTSTL<< UCR4_CTSTL_SHF;
617
610 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4); 618 writel(temp & ~UCR4_DREN, sport->port.membase + UCR4);
611 619
612 if (USE_IRDA(sport)) { 620 if (USE_IRDA(sport)) {
diff --git a/drivers/serial/mpc52xx_uart.c b/drivers/serial/mpc52xx_uart.c
index a176ab4bd65b..02469c31bf0b 100644
--- a/drivers/serial/mpc52xx_uart.c
+++ b/drivers/serial/mpc52xx_uart.c
@@ -1467,7 +1467,7 @@ mpc52xx_uart_init(void)
1467 /* 1467 /*
1468 * Map the PSC FIFO Controller and init if on MPC512x. 1468 * Map the PSC FIFO Controller and init if on MPC512x.
1469 */ 1469 */
1470 if (psc_ops->fifoc_init) { 1470 if (psc_ops && psc_ops->fifoc_init) {
1471 ret = psc_ops->fifoc_init(); 1471 ret = psc_ops->fifoc_init();
1472 if (ret) 1472 if (ret)
1473 return ret; 1473 return ret;