diff options
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/dma/ste_dma40.c | 52 |
1 files changed, 1 insertions, 51 deletions
diff --git a/drivers/dma/ste_dma40.c b/drivers/dma/ste_dma40.c index ad8d6df1b6a8..662d7e35f862 100644 --- a/drivers/dma/ste_dma40.c +++ b/drivers/dma/ste_dma40.c | |||
| @@ -1,6 +1,6 @@ | |||
| 1 | /* | 1 | /* |
| 2 | * Copyright (C) ST-Ericsson SA 2007-2010 | 2 | * Copyright (C) ST-Ericsson SA 2007-2010 |
| 3 | * Author: Per Friden <per.friden@stericsson.com> for ST-Ericsson | 3 | * Author: Per Forlin <per.forlin@stericsson.com> for ST-Ericsson |
| 4 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson | 4 | * Author: Jonas Aaberg <jonas.aberg@stericsson.com> for ST-Ericsson |
| 5 | * License terms: GNU General Public License (GPL) version 2 | 5 | * License terms: GNU General Public License (GPL) version 2 |
| 6 | */ | 6 | */ |
| @@ -1593,51 +1593,6 @@ static u32 stedma40_residue(struct dma_chan *chan) | |||
| 1593 | return bytes_left; | 1593 | return bytes_left; |
| 1594 | } | 1594 | } |
| 1595 | 1595 | ||
| 1596 | /* Public DMA functions in addition to the DMA engine framework */ | ||
| 1597 | |||
| 1598 | int stedma40_set_psize(struct dma_chan *chan, | ||
| 1599 | int src_psize, | ||
| 1600 | int dst_psize) | ||
| 1601 | { | ||
| 1602 | struct d40_chan *d40c = | ||
| 1603 | container_of(chan, struct d40_chan, chan); | ||
| 1604 | unsigned long flags; | ||
| 1605 | |||
| 1606 | spin_lock_irqsave(&d40c->lock, flags); | ||
| 1607 | |||
| 1608 | if (d40c->log_num != D40_PHY_CHAN) { | ||
| 1609 | d40c->log_def.lcsp1 &= ~D40_MEM_LCSP1_SCFG_PSIZE_MASK; | ||
| 1610 | d40c->log_def.lcsp3 &= ~D40_MEM_LCSP1_SCFG_PSIZE_MASK; | ||
| 1611 | d40c->log_def.lcsp1 |= src_psize << | ||
| 1612 | D40_MEM_LCSP1_SCFG_PSIZE_POS; | ||
| 1613 | d40c->log_def.lcsp3 |= dst_psize << | ||
| 1614 | D40_MEM_LCSP1_SCFG_PSIZE_POS; | ||
| 1615 | goto out; | ||
| 1616 | } | ||
| 1617 | |||
| 1618 | if (src_psize == STEDMA40_PSIZE_PHY_1) | ||
| 1619 | d40c->src_def_cfg &= ~(1 << D40_SREG_CFG_PHY_PEN_POS); | ||
| 1620 | else { | ||
| 1621 | d40c->src_def_cfg |= 1 << D40_SREG_CFG_PHY_PEN_POS; | ||
| 1622 | d40c->src_def_cfg &= ~(STEDMA40_PSIZE_PHY_16 << | ||
| 1623 | D40_SREG_CFG_PSIZE_POS); | ||
| 1624 | d40c->src_def_cfg |= src_psize << D40_SREG_CFG_PSIZE_POS; | ||
| 1625 | } | ||
| 1626 | |||
| 1627 | if (dst_psize == STEDMA40_PSIZE_PHY_1) | ||
| 1628 | d40c->dst_def_cfg &= ~(1 << D40_SREG_CFG_PHY_PEN_POS); | ||
| 1629 | else { | ||
| 1630 | d40c->dst_def_cfg |= 1 << D40_SREG_CFG_PHY_PEN_POS; | ||
| 1631 | d40c->dst_def_cfg &= ~(STEDMA40_PSIZE_PHY_16 << | ||
| 1632 | D40_SREG_CFG_PSIZE_POS); | ||
| 1633 | d40c->dst_def_cfg |= dst_psize << D40_SREG_CFG_PSIZE_POS; | ||
| 1634 | } | ||
| 1635 | out: | ||
| 1636 | spin_unlock_irqrestore(&d40c->lock, flags); | ||
| 1637 | return 0; | ||
| 1638 | } | ||
| 1639 | EXPORT_SYMBOL(stedma40_set_psize); | ||
| 1640 | |||
| 1641 | struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, | 1596 | struct dma_async_tx_descriptor *stedma40_memcpy_sg(struct dma_chan *chan, |
| 1642 | struct scatterlist *sgl_dst, | 1597 | struct scatterlist *sgl_dst, |
| 1643 | struct scatterlist *sgl_src, | 1598 | struct scatterlist *sgl_src, |
| @@ -2075,11 +2030,6 @@ static struct dma_async_tx_descriptor *d40_prep_slave_sg(struct dma_chan *chan, | |||
| 2075 | return ERR_PTR(-EINVAL); | 2030 | return ERR_PTR(-EINVAL); |
| 2076 | } | 2031 | } |
| 2077 | 2032 | ||
| 2078 | if (d40c->dma_cfg.pre_transfer) | ||
| 2079 | d40c->dma_cfg.pre_transfer(chan, | ||
| 2080 | d40c->dma_cfg.pre_transfer_data, | ||
| 2081 | sg_dma_len(sgl)); | ||
| 2082 | |||
| 2083 | spin_lock_irqsave(&d40c->lock, flags); | 2033 | spin_lock_irqsave(&d40c->lock, flags); |
| 2084 | d40d = d40_desc_get(d40c); | 2034 | d40d = d40_desc_get(d40c); |
| 2085 | 2035 | ||
