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-rw-r--r--drivers/infiniband/core/ucm.c11
-rw-r--r--drivers/infiniband/hw/qib/qib_fs.c25
-rw-r--r--drivers/infiniband/hw/qib/qib_iba6120.c12
-rw-r--r--drivers/infiniband/hw/qib/qib_iba7322.c771
-rw-r--r--drivers/infiniband/hw/qib/qib_init.c6
5 files changed, 203 insertions, 622 deletions
diff --git a/drivers/infiniband/core/ucm.c b/drivers/infiniband/core/ucm.c
index 46474842cfe9..08f948df8fa9 100644
--- a/drivers/infiniband/core/ucm.c
+++ b/drivers/infiniband/core/ucm.c
@@ -706,14 +706,9 @@ static int ib_ucm_alloc_data(const void **dest, u64 src, u32 len)
706 if (!len) 706 if (!len)
707 return 0; 707 return 0;
708 708
709 data = kmalloc(len, GFP_KERNEL); 709 data = memdup_user((void __user *)(unsigned long)src, len);
710 if (!data) 710 if (IS_ERR(data))
711 return -ENOMEM; 711 return PTR_ERR(data);
712
713 if (copy_from_user(data, (void __user *)(unsigned long)src, len)) {
714 kfree(data);
715 return -EFAULT;
716 }
717 712
718 *dest = data; 713 *dest = data;
719 return 0; 714 return 0;
diff --git a/drivers/infiniband/hw/qib/qib_fs.c b/drivers/infiniband/hw/qib/qib_fs.c
index 755470440ef1..edef8527eb34 100644
--- a/drivers/infiniband/hw/qib/qib_fs.c
+++ b/drivers/infiniband/hw/qib/qib_fs.c
@@ -144,10 +144,11 @@ static ssize_t dev_counters_read(struct file *file, char __user *buf,
144 size_t count, loff_t *ppos) 144 size_t count, loff_t *ppos)
145{ 145{
146 u64 *counters; 146 u64 *counters;
147 size_t avail;
147 struct qib_devdata *dd = private2dd(file); 148 struct qib_devdata *dd = private2dd(file);
148 149
149 return simple_read_from_buffer(buf, count, ppos, counters, 150 avail = dd->f_read_cntrs(dd, *ppos, NULL, &counters);
150 dd->f_read_cntrs(dd, *ppos, NULL, &counters)); 151 return simple_read_from_buffer(buf, count, ppos, counters, avail);
151} 152}
152 153
153/* read the per-device counters */ 154/* read the per-device counters */
@@ -155,10 +156,11 @@ static ssize_t dev_names_read(struct file *file, char __user *buf,
155 size_t count, loff_t *ppos) 156 size_t count, loff_t *ppos)
156{ 157{
157 char *names; 158 char *names;
159 size_t avail;
158 struct qib_devdata *dd = private2dd(file); 160 struct qib_devdata *dd = private2dd(file);
159 161
160 return simple_read_from_buffer(buf, count, ppos, names, 162 avail = dd->f_read_cntrs(dd, *ppos, &names, NULL);
161 dd->f_read_cntrs(dd, *ppos, &names, NULL)); 163 return simple_read_from_buffer(buf, count, ppos, names, avail);
162} 164}
163 165
164static const struct file_operations cntr_ops[] = { 166static const struct file_operations cntr_ops[] = {
@@ -176,10 +178,11 @@ static ssize_t portnames_read(struct file *file, char __user *buf,
176 size_t count, loff_t *ppos) 178 size_t count, loff_t *ppos)
177{ 179{
178 char *names; 180 char *names;
181 size_t avail;
179 struct qib_devdata *dd = private2dd(file); 182 struct qib_devdata *dd = private2dd(file);
180 183
181 return simple_read_from_buffer(buf, count, ppos, names, 184 avail = dd->f_read_portcntrs(dd, *ppos, 0, &names, NULL);
182 dd->f_read_portcntrs(dd, *ppos, 0, &names, NULL)); 185 return simple_read_from_buffer(buf, count, ppos, names, avail);
183} 186}
184 187
185/* read the per-port counters for port 1 (pidx 0) */ 188/* read the per-port counters for port 1 (pidx 0) */
@@ -187,10 +190,11 @@ static ssize_t portcntrs_1_read(struct file *file, char __user *buf,
187 size_t count, loff_t *ppos) 190 size_t count, loff_t *ppos)
188{ 191{
189 u64 *counters; 192 u64 *counters;
193 size_t avail;
190 struct qib_devdata *dd = private2dd(file); 194 struct qib_devdata *dd = private2dd(file);
191 195
192 return simple_read_from_buffer(buf, count, ppos, counters, 196 avail = dd->f_read_portcntrs(dd, *ppos, 0, NULL, &counters);
193 dd->f_read_portcntrs(dd, *ppos, 0, NULL, &counters)); 197 return simple_read_from_buffer(buf, count, ppos, counters, avail);
194} 198}
195 199
196/* read the per-port counters for port 2 (pidx 1) */ 200/* read the per-port counters for port 2 (pidx 1) */
@@ -198,10 +202,11 @@ static ssize_t portcntrs_2_read(struct file *file, char __user *buf,
198 size_t count, loff_t *ppos) 202 size_t count, loff_t *ppos)
199{ 203{
200 u64 *counters; 204 u64 *counters;
205 size_t avail;
201 struct qib_devdata *dd = private2dd(file); 206 struct qib_devdata *dd = private2dd(file);
202 207
203 return simple_read_from_buffer(buf, count, ppos, counters, 208 avail = dd->f_read_portcntrs(dd, *ppos, 1, NULL, &counters);
204 dd->f_read_portcntrs(dd, *ppos, 1, NULL, &counters)); 209 return simple_read_from_buffer(buf, count, ppos, counters, avail);
205} 210}
206 211
207static const struct file_operations portcntr_ops[] = { 212static const struct file_operations portcntr_ops[] = {
diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c
index 7b6549fd429b..1eadadc13da8 100644
--- a/drivers/infiniband/hw/qib/qib_iba6120.c
+++ b/drivers/infiniband/hw/qib/qib_iba6120.c
@@ -3475,14 +3475,6 @@ struct qib_devdata *qib_init_iba6120_funcs(struct pci_dev *pdev,
3475 struct qib_devdata *dd; 3475 struct qib_devdata *dd;
3476 int ret; 3476 int ret;
3477 3477
3478#ifndef CONFIG_PCI_MSI
3479 qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot "
3480 "work if CONFIG_PCI_MSI is not enabled\n",
3481 ent->device);
3482 dd = ERR_PTR(-ENODEV);
3483 goto bail;
3484#endif
3485
3486 dd = qib_alloc_devdata(pdev, sizeof(struct qib_pportdata) + 3478 dd = qib_alloc_devdata(pdev, sizeof(struct qib_pportdata) +
3487 sizeof(struct qib_chip_specific)); 3479 sizeof(struct qib_chip_specific));
3488 if (IS_ERR(dd)) 3480 if (IS_ERR(dd))
@@ -3554,10 +3546,6 @@ struct qib_devdata *qib_init_iba6120_funcs(struct pci_dev *pdev,
3554 if (qib_mini_init) 3546 if (qib_mini_init)
3555 goto bail; 3547 goto bail;
3556 3548
3557#ifndef CONFIG_PCI_MSI
3558 qib_dev_err(dd, "PCI_MSI not configured, NO interrupts\n");
3559#endif
3560
3561 if (qib_pcie_params(dd, 8, NULL, NULL)) 3549 if (qib_pcie_params(dd, 8, NULL, NULL))
3562 qib_dev_err(dd, "Failed to setup PCIe or interrupts; " 3550 qib_dev_err(dd, "Failed to setup PCIe or interrupts; "
3563 "continuing anyway\n"); 3551 "continuing anyway\n");
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c
index 2c24eab35b54..503992d9c5ce 100644
--- a/drivers/infiniband/hw/qib/qib_iba7322.c
+++ b/drivers/infiniband/hw/qib/qib_iba7322.c
@@ -42,9 +42,6 @@
42#include <linux/jiffies.h> 42#include <linux/jiffies.h>
43#include <rdma/ib_verbs.h> 43#include <rdma/ib_verbs.h>
44#include <rdma/ib_smi.h> 44#include <rdma/ib_smi.h>
45#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
46#include <linux/dca.h>
47#endif
48 45
49#include "qib.h" 46#include "qib.h"
50#include "qib_7322_regs.h" 47#include "qib_7322_regs.h"
@@ -114,40 +111,18 @@ static ushort qib_singleport;
114module_param_named(singleport, qib_singleport, ushort, S_IRUGO); 111module_param_named(singleport, qib_singleport, ushort, S_IRUGO);
115MODULE_PARM_DESC(singleport, "Use only IB port 1; more per-port buffer space"); 112MODULE_PARM_DESC(singleport, "Use only IB port 1; more per-port buffer space");
116 113
117
118/*
119 * Setup QMH7342 receive and transmit parameters, necessary because
120 * each bay, Mez connector, and IB port need different tuning, beyond
121 * what the switch and HCA can do automatically.
122 * It's expected to be done by cat'ing files to the modules file,
123 * rather than setting up as a module parameter.
124 * It's a "write-only" file, returns 0 when read back.
125 * The unit, port, bay (if given), and values MUST be done as a single write.
126 * The unit, port, and bay must precede the values to be effective.
127 */
128static int setup_qmh_params(const char *, struct kernel_param *);
129static unsigned dummy_qmh_params;
130module_param_call(qmh_serdes_setup, setup_qmh_params, param_get_uint,
131 &dummy_qmh_params, S_IWUSR | S_IRUGO);
132
133/* similarly for QME7342, but it's simpler */
134static int setup_qme_params(const char *, struct kernel_param *);
135static unsigned dummy_qme_params;
136module_param_call(qme_serdes_setup, setup_qme_params, param_get_uint,
137 &dummy_qme_params, S_IWUSR | S_IRUGO);
138
139#define MAX_ATTEN_LEN 64 /* plenty for any real system */ 114#define MAX_ATTEN_LEN 64 /* plenty for any real system */
140/* for read back, default index is ~5m copper cable */ 115/* for read back, default index is ~5m copper cable */
141static char cable_atten_list[MAX_ATTEN_LEN] = "10"; 116static char txselect_list[MAX_ATTEN_LEN] = "10";
142static struct kparam_string kp_cable_atten = { 117static struct kparam_string kp_txselect = {
143 .string = cable_atten_list, 118 .string = txselect_list,
144 .maxlen = MAX_ATTEN_LEN 119 .maxlen = MAX_ATTEN_LEN
145}; 120};
146static int setup_cable_atten(const char *, struct kernel_param *); 121static int setup_txselect(const char *, struct kernel_param *);
147module_param_call(cable_atten, setup_cable_atten, param_get_string, 122module_param_call(txselect, setup_txselect, param_get_string,
148 &kp_cable_atten, S_IWUSR | S_IRUGO); 123 &kp_txselect, S_IWUSR | S_IRUGO);
149MODULE_PARM_DESC(cable_atten, \ 124MODULE_PARM_DESC(txselect, \
150 "cable attenuation indices for cables with invalid EEPROM"); 125 "Tx serdes indices (for no QSFP or invalid QSFP data)");
151 126
152#define BOARD_QME7342 5 127#define BOARD_QME7342 5
153#define BOARD_QMH7342 6 128#define BOARD_QMH7342 6
@@ -540,12 +515,6 @@ struct qib_chip_specific {
540 u32 lastbuf_for_pio; 515 u32 lastbuf_for_pio;
541 u32 stay_in_freeze; 516 u32 stay_in_freeze;
542 u32 recovery_ports_initted; 517 u32 recovery_ports_initted;
543#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
544 u32 dca_ctrl;
545 int rhdr_cpu[18];
546 int sdma_cpu[2];
547 u64 dca_rcvhdr_ctrl[5]; /* B, C, D, E, F */
548#endif
549 struct msix_entry *msix_entries; 518 struct msix_entry *msix_entries;
550 void **msix_arg; 519 void **msix_arg;
551 unsigned long *sendchkenable; 520 unsigned long *sendchkenable;
@@ -574,11 +543,12 @@ struct vendor_txdds_ent {
574static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *); 543static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *);
575 544
576#define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */ 545#define TXDDS_TABLE_SZ 16 /* number of entries per speed in onchip table */
546#define TXDDS_EXTRA_SZ 11 /* number of extra tx settings entries */
577#define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */ 547#define SERDES_CHANS 4 /* yes, it's obvious, but one less magic number */
578 548
579#define H1_FORCE_VAL 8 549#define H1_FORCE_VAL 8
580#define H1_FORCE_QME 1 /* may be overridden via setup_qme_params() */ 550#define H1_FORCE_QME 1 /* may be overridden via setup_txselect() */
581#define H1_FORCE_QMH 7 /* may be overridden via setup_qmh_params() */ 551#define H1_FORCE_QMH 7 /* may be overridden via setup_txselect() */
582 552
583/* The static and dynamic registers are paired, and the pairs indexed by spd */ 553/* The static and dynamic registers are paired, and the pairs indexed by spd */
584#define krp_static_adapt_dis(spd) (KREG_IBPORT_IDX(ADAPT_DISABLE_STATIC_SDR) \ 554#define krp_static_adapt_dis(spd) (KREG_IBPORT_IDX(ADAPT_DISABLE_STATIC_SDR) \
@@ -590,15 +560,6 @@ static void write_tx_serdes_param(struct qib_pportdata *, struct txdds_ent *);
590#define QDR_STATIC_ADAPT_INIT 0xffffffffffULL /* up, disable H0,H1-8, LE */ 560#define QDR_STATIC_ADAPT_INIT 0xffffffffffULL /* up, disable H0,H1-8, LE */
591#define QDR_STATIC_ADAPT_INIT_R1 0xf0ffffffffULL /* r1 up, disable H0,H1-8 */ 561#define QDR_STATIC_ADAPT_INIT_R1 0xf0ffffffffULL /* r1 up, disable H0,H1-8 */
592 562
593static const struct txdds_ent qmh_sdr_txdds = { 11, 0, 5, 6 };
594static const struct txdds_ent qmh_ddr_txdds = { 7, 0, 2, 8 };
595static const struct txdds_ent qmh_qdr_txdds = { 0, 1, 3, 10 };
596
597/* this is used for unknown mez cards also */
598static const struct txdds_ent qme_sdr_txdds = { 11, 0, 4, 4 };
599static const struct txdds_ent qme_ddr_txdds = { 7, 0, 2, 7 };
600static const struct txdds_ent qme_qdr_txdds = { 0, 1, 12, 11 };
601
602struct qib_chippport_specific { 563struct qib_chippport_specific {
603 u64 __iomem *kpregbase; 564 u64 __iomem *kpregbase;
604 u64 __iomem *cpregbase; 565 u64 __iomem *cpregbase;
@@ -637,12 +598,8 @@ struct qib_chippport_specific {
637 * Per-bay per-channel rcv QMH H1 values and Tx values for QDR. 598 * Per-bay per-channel rcv QMH H1 values and Tx values for QDR.
638 * entry zero is unused, to simplify indexing 599 * entry zero is unused, to simplify indexing
639 */ 600 */
640 u16 h1_val; 601 u8 h1_val;
641 u8 amp[SERDES_CHANS]; 602 u8 no_eep; /* txselect table index to use if no qsfp info */
642 u8 pre[SERDES_CHANS];
643 u8 mainv[SERDES_CHANS];
644 u8 post[SERDES_CHANS];
645 u8 no_eep; /* attenuation index to use if no qsfp info */
646 u8 ipg_tries; 603 u8 ipg_tries;
647 u8 ibmalfusesnap; 604 u8 ibmalfusesnap;
648 struct qib_qsfp_data qsfp_data; 605 struct qib_qsfp_data qsfp_data;
@@ -676,52 +633,6 @@ static struct {
676 SYM_LSB(IntStatus, SDmaCleanupDone_1), 2 }, 633 SYM_LSB(IntStatus, SDmaCleanupDone_1), 2 },
677}; 634};
678 635
679#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
680static const struct dca_reg_map {
681 int shadow_inx;
682 int lsb;
683 u64 mask;
684 u16 regno;
685} dca_rcvhdr_reg_map[] = {
686 { 0, SYM_LSB(DCACtrlB, RcvHdrq0DCAOPH),
687 ~SYM_MASK(DCACtrlB, RcvHdrq0DCAOPH) , KREG_IDX(DCACtrlB) },
688 { 0, SYM_LSB(DCACtrlB, RcvHdrq1DCAOPH),
689 ~SYM_MASK(DCACtrlB, RcvHdrq1DCAOPH) , KREG_IDX(DCACtrlB) },
690 { 0, SYM_LSB(DCACtrlB, RcvHdrq2DCAOPH),
691 ~SYM_MASK(DCACtrlB, RcvHdrq2DCAOPH) , KREG_IDX(DCACtrlB) },
692 { 0, SYM_LSB(DCACtrlB, RcvHdrq3DCAOPH),
693 ~SYM_MASK(DCACtrlB, RcvHdrq3DCAOPH) , KREG_IDX(DCACtrlB) },
694 { 1, SYM_LSB(DCACtrlC, RcvHdrq4DCAOPH),
695 ~SYM_MASK(DCACtrlC, RcvHdrq4DCAOPH) , KREG_IDX(DCACtrlC) },
696 { 1, SYM_LSB(DCACtrlC, RcvHdrq5DCAOPH),
697 ~SYM_MASK(DCACtrlC, RcvHdrq5DCAOPH) , KREG_IDX(DCACtrlC) },
698 { 1, SYM_LSB(DCACtrlC, RcvHdrq6DCAOPH),
699 ~SYM_MASK(DCACtrlC, RcvHdrq6DCAOPH) , KREG_IDX(DCACtrlC) },
700 { 1, SYM_LSB(DCACtrlC, RcvHdrq7DCAOPH),
701 ~SYM_MASK(DCACtrlC, RcvHdrq7DCAOPH) , KREG_IDX(DCACtrlC) },
702 { 2, SYM_LSB(DCACtrlD, RcvHdrq8DCAOPH),
703 ~SYM_MASK(DCACtrlD, RcvHdrq8DCAOPH) , KREG_IDX(DCACtrlD) },
704 { 2, SYM_LSB(DCACtrlD, RcvHdrq9DCAOPH),
705 ~SYM_MASK(DCACtrlD, RcvHdrq9DCAOPH) , KREG_IDX(DCACtrlD) },
706 { 2, SYM_LSB(DCACtrlD, RcvHdrq10DCAOPH),
707 ~SYM_MASK(DCACtrlD, RcvHdrq10DCAOPH) , KREG_IDX(DCACtrlD) },
708 { 2, SYM_LSB(DCACtrlD, RcvHdrq11DCAOPH),
709 ~SYM_MASK(DCACtrlD, RcvHdrq11DCAOPH) , KREG_IDX(DCACtrlD) },
710 { 3, SYM_LSB(DCACtrlE, RcvHdrq12DCAOPH),
711 ~SYM_MASK(DCACtrlE, RcvHdrq12DCAOPH) , KREG_IDX(DCACtrlE) },
712 { 3, SYM_LSB(DCACtrlE, RcvHdrq13DCAOPH),
713 ~SYM_MASK(DCACtrlE, RcvHdrq13DCAOPH) , KREG_IDX(DCACtrlE) },
714 { 3, SYM_LSB(DCACtrlE, RcvHdrq14DCAOPH),
715 ~SYM_MASK(DCACtrlE, RcvHdrq14DCAOPH) , KREG_IDX(DCACtrlE) },
716 { 3, SYM_LSB(DCACtrlE, RcvHdrq15DCAOPH),
717 ~SYM_MASK(DCACtrlE, RcvHdrq15DCAOPH) , KREG_IDX(DCACtrlE) },
718 { 4, SYM_LSB(DCACtrlF, RcvHdrq16DCAOPH),
719 ~SYM_MASK(DCACtrlF, RcvHdrq16DCAOPH) , KREG_IDX(DCACtrlF) },
720 { 4, SYM_LSB(DCACtrlF, RcvHdrq17DCAOPH),
721 ~SYM_MASK(DCACtrlF, RcvHdrq17DCAOPH) , KREG_IDX(DCACtrlF) },
722};
723#endif
724
725/* ibcctrl bits */ 636/* ibcctrl bits */
726#define QLOGIC_IB_IBCC_LINKINITCMD_DISABLE 1 637#define QLOGIC_IB_IBCC_LINKINITCMD_DISABLE 1
727/* cycle through TS1/TS2 till OK */ 638/* cycle through TS1/TS2 till OK */
@@ -2572,95 +2483,6 @@ static void qib_setup_7322_setextled(struct qib_pportdata *ppd, u32 on)
2572 qib_write_kreg_port(ppd, krp_rcvpktledcnt, ledblink); 2483 qib_write_kreg_port(ppd, krp_rcvpktledcnt, ledblink);
2573} 2484}
2574 2485
2575#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2576static void qib_update_rhdrq_dca(struct qib_ctxtdata *rcd)
2577{
2578 struct qib_devdata *dd = rcd->dd;
2579 struct qib_chip_specific *cspec = dd->cspec;
2580 int cpu = get_cpu();
2581
2582 if (cspec->rhdr_cpu[rcd->ctxt] != cpu) {
2583 const struct dca_reg_map *rmp;
2584
2585 cspec->rhdr_cpu[rcd->ctxt] = cpu;
2586 rmp = &dca_rcvhdr_reg_map[rcd->ctxt];
2587 cspec->dca_rcvhdr_ctrl[rmp->shadow_inx] &= rmp->mask;
2588 cspec->dca_rcvhdr_ctrl[rmp->shadow_inx] |=
2589 (u64) dca3_get_tag(&dd->pcidev->dev, cpu) << rmp->lsb;
2590 qib_write_kreg(dd, rmp->regno,
2591 cspec->dca_rcvhdr_ctrl[rmp->shadow_inx]);
2592 cspec->dca_ctrl |= SYM_MASK(DCACtrlA, RcvHdrqDCAEnable);
2593 qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);
2594 }
2595 put_cpu();
2596}
2597
2598static void qib_update_sdma_dca(struct qib_pportdata *ppd)
2599{
2600 struct qib_devdata *dd = ppd->dd;
2601 struct qib_chip_specific *cspec = dd->cspec;
2602 int cpu = get_cpu();
2603 unsigned pidx = ppd->port - 1;
2604
2605 if (cspec->sdma_cpu[pidx] != cpu) {
2606 cspec->sdma_cpu[pidx] = cpu;
2607 cspec->dca_rcvhdr_ctrl[4] &= ~(ppd->hw_pidx ?
2608 SYM_MASK(DCACtrlF, SendDma1DCAOPH) :
2609 SYM_MASK(DCACtrlF, SendDma0DCAOPH));
2610 cspec->dca_rcvhdr_ctrl[4] |=
2611 (u64) dca3_get_tag(&dd->pcidev->dev, cpu) <<
2612 (ppd->hw_pidx ?
2613 SYM_LSB(DCACtrlF, SendDma1DCAOPH) :
2614 SYM_LSB(DCACtrlF, SendDma0DCAOPH));
2615 qib_write_kreg(dd, KREG_IDX(DCACtrlF),
2616 cspec->dca_rcvhdr_ctrl[4]);
2617 cspec->dca_ctrl |= ppd->hw_pidx ?
2618 SYM_MASK(DCACtrlA, SendDMAHead1DCAEnable) :
2619 SYM_MASK(DCACtrlA, SendDMAHead0DCAEnable);
2620 qib_write_kreg(dd, KREG_IDX(DCACtrlA), cspec->dca_ctrl);
2621 }
2622 put_cpu();
2623}
2624
2625static void qib_setup_dca(struct qib_devdata *dd)
2626{
2627 struct qib_chip_specific *cspec = dd->cspec;
2628 int i;
2629
2630 for (i = 0; i < ARRAY_SIZE(cspec->rhdr_cpu); i++)
2631 cspec->rhdr_cpu[i] = -1;
2632 for (i = 0; i < ARRAY_SIZE(cspec->sdma_cpu); i++)
2633 cspec->sdma_cpu[i] = -1;
2634 cspec->dca_rcvhdr_ctrl[0] =
2635 (1ULL << SYM_LSB(DCACtrlB, RcvHdrq0DCAXfrCnt)) |
2636 (1ULL << SYM_LSB(DCACtrlB, RcvHdrq1DCAXfrCnt)) |
2637 (1ULL << SYM_LSB(DCACtrlB, RcvHdrq2DCAXfrCnt)) |
2638 (1ULL << SYM_LSB(DCACtrlB, RcvHdrq3DCAXfrCnt));
2639 cspec->dca_rcvhdr_ctrl[1] =
2640 (1ULL << SYM_LSB(DCACtrlC, RcvHdrq4DCAXfrCnt)) |
2641 (1ULL << SYM_LSB(DCACtrlC, RcvHdrq5DCAXfrCnt)) |
2642 (1ULL << SYM_LSB(DCACtrlC, RcvHdrq6DCAXfrCnt)) |
2643 (1ULL << SYM_LSB(DCACtrlC, RcvHdrq7DCAXfrCnt));
2644 cspec->dca_rcvhdr_ctrl[2] =
2645 (1ULL << SYM_LSB(DCACtrlD, RcvHdrq8DCAXfrCnt)) |
2646 (1ULL << SYM_LSB(DCACtrlD, RcvHdrq9DCAXfrCnt)) |
2647 (1ULL << SYM_LSB(DCACtrlD, RcvHdrq10DCAXfrCnt)) |
2648 (1ULL << SYM_LSB(DCACtrlD, RcvHdrq11DCAXfrCnt));
2649 cspec->dca_rcvhdr_ctrl[3] =
2650 (1ULL << SYM_LSB(DCACtrlE, RcvHdrq12DCAXfrCnt)) |
2651 (1ULL << SYM_LSB(DCACtrlE, RcvHdrq13DCAXfrCnt)) |
2652 (1ULL << SYM_LSB(DCACtrlE, RcvHdrq14DCAXfrCnt)) |
2653 (1ULL << SYM_LSB(DCACtrlE, RcvHdrq15DCAXfrCnt));
2654 cspec->dca_rcvhdr_ctrl[4] =
2655 (1ULL << SYM_LSB(DCACtrlF, RcvHdrq16DCAXfrCnt)) |
2656 (1ULL << SYM_LSB(DCACtrlF, RcvHdrq17DCAXfrCnt));
2657 for (i = 0; i < ARRAY_SIZE(cspec->sdma_cpu); i++)
2658 qib_write_kreg(dd, KREG_IDX(DCACtrlB) + i,
2659 cspec->dca_rcvhdr_ctrl[i]);
2660}
2661
2662#endif
2663
2664/* 2486/*
2665 * Disable MSIx interrupt if enabled, call generic MSIx code 2487 * Disable MSIx interrupt if enabled, call generic MSIx code
2666 * to cleanup, and clear pending MSIx interrupts. 2488 * to cleanup, and clear pending MSIx interrupts.
@@ -2701,15 +2523,6 @@ static void qib_setup_7322_cleanup(struct qib_devdata *dd)
2701{ 2523{
2702 int i; 2524 int i;
2703 2525
2704#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
2705 if (dd->flags & QIB_DCA_ENABLED) {
2706 dca_remove_requester(&dd->pcidev->dev);
2707 dd->flags &= ~QIB_DCA_ENABLED;
2708 dd->cspec->dca_ctrl = 0;
2709 qib_write_kreg(dd, KREG_IDX(DCACtrlA), dd->cspec->dca_ctrl);
2710 }
2711#endif
2712
2713 qib_7322_free_irq(dd); 2526 qib_7322_free_irq(dd);
2714 kfree(dd->cspec->cntrs); 2527 kfree(dd->cspec->cntrs);
2715 kfree(dd->cspec->sendchkenable); 2528 kfree(dd->cspec->sendchkenable);
@@ -3017,11 +2830,6 @@ static irqreturn_t qib_7322pintr(int irq, void *data)
3017 if (dd->int_counter != (u32) -1) 2830 if (dd->int_counter != (u32) -1)
3018 dd->int_counter++; 2831 dd->int_counter++;
3019 2832
3020#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3021 if (dd->flags & QIB_DCA_ENABLED)
3022 qib_update_rhdrq_dca(rcd);
3023#endif
3024
3025 /* Clear the interrupt bit we expect to be set. */ 2833 /* Clear the interrupt bit we expect to be set. */
3026 qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) | 2834 qib_write_kreg(dd, kr_intclear, ((1ULL << QIB_I_RCVAVAIL_LSB) |
3027 (1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt); 2835 (1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt);
@@ -3085,11 +2893,6 @@ static irqreturn_t sdma_intr(int irq, void *data)
3085 if (dd->int_counter != (u32) -1) 2893 if (dd->int_counter != (u32) -1)
3086 dd->int_counter++; 2894 dd->int_counter++;
3087 2895
3088#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3089 if (dd->flags & QIB_DCA_ENABLED)
3090 qib_update_sdma_dca(ppd);
3091#endif
3092
3093 /* Clear the interrupt bit we expect to be set. */ 2896 /* Clear the interrupt bit we expect to be set. */
3094 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? 2897 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
3095 INT_MASK_P(SDma, 1) : INT_MASK_P(SDma, 0)); 2898 INT_MASK_P(SDma, 1) : INT_MASK_P(SDma, 0));
@@ -3119,11 +2922,6 @@ static irqreturn_t sdma_idle_intr(int irq, void *data)
3119 if (dd->int_counter != (u32) -1) 2922 if (dd->int_counter != (u32) -1)
3120 dd->int_counter++; 2923 dd->int_counter++;
3121 2924
3122#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3123 if (dd->flags & QIB_DCA_ENABLED)
3124 qib_update_sdma_dca(ppd);
3125#endif
3126
3127 /* Clear the interrupt bit we expect to be set. */ 2925 /* Clear the interrupt bit we expect to be set. */
3128 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? 2926 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
3129 INT_MASK_P(SDmaIdle, 1) : INT_MASK_P(SDmaIdle, 0)); 2927 INT_MASK_P(SDmaIdle, 1) : INT_MASK_P(SDmaIdle, 0));
@@ -3153,11 +2951,6 @@ static irqreturn_t sdma_progress_intr(int irq, void *data)
3153 if (dd->int_counter != (u32) -1) 2951 if (dd->int_counter != (u32) -1)
3154 dd->int_counter++; 2952 dd->int_counter++;
3155 2953
3156#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3157 if (dd->flags & QIB_DCA_ENABLED)
3158 qib_update_sdma_dca(ppd);
3159#endif
3160
3161 /* Clear the interrupt bit we expect to be set. */ 2954 /* Clear the interrupt bit we expect to be set. */
3162 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? 2955 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
3163 INT_MASK_P(SDmaProgress, 1) : 2956 INT_MASK_P(SDmaProgress, 1) :
@@ -3188,11 +2981,6 @@ static irqreturn_t sdma_cleanup_intr(int irq, void *data)
3188 if (dd->int_counter != (u32) -1) 2981 if (dd->int_counter != (u32) -1)
3189 dd->int_counter++; 2982 dd->int_counter++;
3190 2983
3191#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
3192 if (dd->flags & QIB_DCA_ENABLED)
3193 qib_update_sdma_dca(ppd);
3194#endif
3195
3196 /* Clear the interrupt bit we expect to be set. */ 2984 /* Clear the interrupt bit we expect to be set. */
3197 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ? 2985 qib_write_kreg(dd, kr_intclear, ppd->hw_pidx ?
3198 INT_MASK_PM(SDmaCleanupDone, 1) : 2986 INT_MASK_PM(SDmaCleanupDone, 1) :
@@ -4299,10 +4087,6 @@ static void rcvctrl_7322_mod(struct qib_pportdata *ppd, unsigned int op,
4299 qib_write_kreg_ctxt(dd, krc_rcvhdraddr, ctxt, 4087 qib_write_kreg_ctxt(dd, krc_rcvhdraddr, ctxt,
4300 rcd->rcvhdrq_phys); 4088 rcd->rcvhdrq_phys);
4301 rcd->seq_cnt = 1; 4089 rcd->seq_cnt = 1;
4302#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
4303 if (dd->flags & QIB_DCA_ENABLED)
4304 qib_update_rhdrq_dca(rcd);
4305#endif
4306 } 4090 }
4307 if (op & QIB_RCVCTRL_CTXT_DIS) 4091 if (op & QIB_RCVCTRL_CTXT_DIS)
4308 ppd->p_rcvctrl &= 4092 ppd->p_rcvctrl &=
@@ -5360,7 +5144,13 @@ static int qib_7322_ib_updown(struct qib_pportdata *ppd, int ibup, u64 ibcs)
5360 QIBL_IB_AUTONEG_INPROG))) 5144 QIBL_IB_AUTONEG_INPROG)))
5361 set_7322_ibspeed_fast(ppd, ppd->link_speed_enabled); 5145 set_7322_ibspeed_fast(ppd, ppd->link_speed_enabled);
5362 if (!(ppd->lflags & QIBL_IB_AUTONEG_INPROG)) { 5146 if (!(ppd->lflags & QIBL_IB_AUTONEG_INPROG)) {
5147 /* unlock the Tx settings, speed may change */
5148 qib_write_kreg_port(ppd, krp_tx_deemph_override,
5149 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
5150 reset_tx_deemphasis_override));
5363 qib_cancel_sends(ppd); 5151 qib_cancel_sends(ppd);
5152 /* on link down, ensure sane pcs state */
5153 qib_7322_mini_pcs_reset(ppd);
5364 spin_lock_irqsave(&ppd->sdma_lock, flags); 5154 spin_lock_irqsave(&ppd->sdma_lock, flags);
5365 if (__qib_sdma_running(ppd)) 5155 if (__qib_sdma_running(ppd))
5366 __qib_sdma_process_event(ppd, 5156 __qib_sdma_process_event(ppd,
@@ -5766,26 +5556,28 @@ static void qib_init_7322_qsfp(struct qib_pportdata *ppd)
5766} 5556}
5767 5557
5768/* 5558/*
5769 * called at device initialization time, and also if the cable_atten 5559 * called at device initialization time, and also if the txselect
5770 * module parameter is changed. This is used for cables that don't 5560 * module parameter is changed. This is used for cables that don't
5771 * have valid QSFP EEPROMs (not present, or attenuation is zero). 5561 * have valid QSFP EEPROMs (not present, or attenuation is zero).
5772 * We initialize to the default, then if there is a specific 5562 * We initialize to the default, then if there is a specific
5773 * unit,port match, we use that. 5563 * unit,port match, we use that (and set it immediately, for the
5564 * current speed, if the link is at INIT or better).
5774 * String format is "default# unit#,port#=# ... u,p=#", separators must 5565 * String format is "default# unit#,port#=# ... u,p=#", separators must
5775 * be a SPACE character. A newline terminates. 5566 * be a SPACE character. A newline terminates. The u,p=# tuples may
5567 * optionally have "u,p=#,#", where the final # is the H1 value
5776 * The last specific match is used (actually, all are used, but last 5568 * The last specific match is used (actually, all are used, but last
5777 * one is the one that winds up set); if none at all, fall back on default. 5569 * one is the one that winds up set); if none at all, fall back on default.
5778 */ 5570 */
5779static void set_no_qsfp_atten(struct qib_devdata *dd, int change) 5571static void set_no_qsfp_atten(struct qib_devdata *dd, int change)
5780{ 5572{
5781 char *nxt, *str; 5573 char *nxt, *str;
5782 int pidx, unit, port, deflt; 5574 u32 pidx, unit, port, deflt, h1;
5783 unsigned long val; 5575 unsigned long val;
5784 int any = 0; 5576 int any = 0, seth1;
5785 5577
5786 str = cable_atten_list; 5578 str = txselect_list;
5787 5579
5788 /* default number is validated in setup_cable_atten() */ 5580 /* default number is validated in setup_txselect() */
5789 deflt = simple_strtoul(str, &nxt, 0); 5581 deflt = simple_strtoul(str, &nxt, 0);
5790 for (pidx = 0; pidx < dd->num_pports; ++pidx) 5582 for (pidx = 0; pidx < dd->num_pports; ++pidx)
5791 dd->pport[pidx].cpspec->no_eep = deflt; 5583 dd->pport[pidx].cpspec->no_eep = deflt;
@@ -5812,16 +5604,28 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change)
5812 ; 5604 ;
5813 continue; 5605 continue;
5814 } 5606 }
5815 if (val >= TXDDS_TABLE_SZ) 5607 if (val >= TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ)
5816 continue; 5608 continue;
5609 seth1 = 0;
5610 h1 = 0; /* gcc thinks it might be used uninitted */
5611 if (*nxt == ',' && nxt[1]) {
5612 str = ++nxt;
5613 h1 = (u32)simple_strtoul(str, &nxt, 0);
5614 if (nxt == str)
5615 while (*nxt && *nxt++ != ' ') /* skip */
5616 ;
5617 else
5618 seth1 = 1;
5619 }
5817 for (pidx = 0; dd->unit == unit && pidx < dd->num_pports; 5620 for (pidx = 0; dd->unit == unit && pidx < dd->num_pports;
5818 ++pidx) { 5621 ++pidx) {
5819 if (dd->pport[pidx].port != port || 5622 struct qib_pportdata *ppd = &dd->pport[pidx];
5820 !dd->pport[pidx].link_speed_supported) 5623
5624 if (ppd->port != port || !ppd->link_speed_supported)
5821 continue; 5625 continue;
5822 dd->pport[pidx].cpspec->no_eep = val; 5626 ppd->cpspec->no_eep = val;
5823 /* now change the IBC and serdes, overriding generic */ 5627 /* now change the IBC and serdes, overriding generic */
5824 init_txdds_table(&dd->pport[pidx], 1); 5628 init_txdds_table(ppd, 1);
5825 any++; 5629 any++;
5826 } 5630 }
5827 if (*nxt == '\n') 5631 if (*nxt == '\n')
@@ -5832,35 +5636,35 @@ static void set_no_qsfp_atten(struct qib_devdata *dd, int change)
5832 * Change the IBC and serdes, but since it's 5636 * Change the IBC and serdes, but since it's
5833 * general, don't override specific settings. 5637 * general, don't override specific settings.
5834 */ 5638 */
5835 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 5639 for (pidx = 0; pidx < dd->num_pports; ++pidx)
5836 if (!dd->pport[pidx].link_speed_supported) 5640 if (dd->pport[pidx].link_speed_supported)
5837 continue; 5641 init_txdds_table(&dd->pport[pidx], 0);
5838 init_txdds_table(&dd->pport[pidx], 0);
5839 }
5840 } 5642 }
5841} 5643}
5842 5644
5843/* handle the cable_atten parameter changing */ 5645/* handle the txselect parameter changing */
5844static int setup_cable_atten(const char *str, struct kernel_param *kp) 5646static int setup_txselect(const char *str, struct kernel_param *kp)
5845{ 5647{
5846 struct qib_devdata *dd; 5648 struct qib_devdata *dd;
5847 unsigned long val; 5649 unsigned long val;
5848 char *n; 5650 char *n;
5849 if (strlen(str) >= MAX_ATTEN_LEN) { 5651 if (strlen(str) >= MAX_ATTEN_LEN) {
5850 printk(KERN_INFO QIB_DRV_NAME " cable_atten_values string " 5652 printk(KERN_INFO QIB_DRV_NAME " txselect_values string "
5851 "too long\n"); 5653 "too long\n");
5852 return -ENOSPC; 5654 return -ENOSPC;
5853 } 5655 }
5854 val = simple_strtoul(str, &n, 0); 5656 val = simple_strtoul(str, &n, 0);
5855 if (n == str || val >= TXDDS_TABLE_SZ) { 5657 if (n == str || val >= (TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ)) {
5856 printk(KERN_INFO QIB_DRV_NAME 5658 printk(KERN_INFO QIB_DRV_NAME
5857 "cable_atten_values must start with a number\n"); 5659 "txselect_values must start with a number < %d\n",
5660 TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ);
5858 return -EINVAL; 5661 return -EINVAL;
5859 } 5662 }
5860 strcpy(cable_atten_list, str); 5663 strcpy(txselect_list, str);
5861 5664
5862 list_for_each_entry(dd, &qib_dev_list, list) 5665 list_for_each_entry(dd, &qib_dev_list, list)
5863 set_no_qsfp_atten(dd, 1); 5666 if (dd->deviceid == PCI_DEVICE_ID_QLOGIC_IB_7322)
5667 set_no_qsfp_atten(dd, 1);
5864 return 0; 5668 return 0;
5865} 5669}
5866 5670
@@ -6261,28 +6065,17 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6261 * in adapter-specific routines. 6065 * in adapter-specific routines.
6262 */ 6066 */
6263 if (!(ppd->dd->flags & QIB_HAS_QSFP)) { 6067 if (!(ppd->dd->flags & QIB_HAS_QSFP)) {
6264 int i;
6265 const struct txdds_ent *txdds;
6266
6267 if (!IS_QMH(ppd->dd) && !IS_QME(ppd->dd)) 6068 if (!IS_QMH(ppd->dd) && !IS_QME(ppd->dd))
6268 qib_devinfo(ppd->dd->pcidev, "IB%u:%u: " 6069 qib_devinfo(ppd->dd->pcidev, "IB%u:%u: "
6269 "Unknown mezzanine card type\n", 6070 "Unknown mezzanine card type\n",
6270 ppd->dd->unit, ppd->port); 6071 dd->unit, ppd->port);
6271 txdds = IS_QMH(ppd->dd) ? &qmh_qdr_txdds : 6072 cp->h1_val = IS_QMH(dd) ? H1_FORCE_QMH : H1_FORCE_QME;
6272 &qme_qdr_txdds;
6273
6274 /* 6073 /*
6275 * set values in case link comes up 6074 * Choose center value as default tx serdes setting
6276 * before table is written to driver. 6075 * until changed through module parameter.
6277 */ 6076 */
6278 cp->h1_val = IS_QMH(ppd->dd) ? H1_FORCE_QMH : 6077 ppd->cpspec->no_eep = IS_QMH(dd) ?
6279 H1_FORCE_QME; 6078 TXDDS_TABLE_SZ + 2 : TXDDS_TABLE_SZ + 4;
6280 for (i = 0; i < SERDES_CHANS; i++) {
6281 cp->amp[i] = txdds->amp;
6282 cp->pre[i] = txdds->pre;
6283 cp->mainv[i] = txdds->main;
6284 cp->post[i] = txdds->post;
6285 }
6286 } else 6079 } else
6287 cp->h1_val = H1_FORCE_VAL; 6080 cp->h1_val = H1_FORCE_VAL;
6288 6081
@@ -6299,8 +6092,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6299 6092
6300 dd->rcvhdrentsize = QIB_RCVHDR_ENTSIZE; 6093 dd->rcvhdrentsize = QIB_RCVHDR_ENTSIZE;
6301 dd->rcvhdrsize = QIB_DFLT_RCVHDRSIZE; 6094 dd->rcvhdrsize = QIB_DFLT_RCVHDRSIZE;
6302 dd->rhf_offset = 6095 dd->rhf_offset = dd->rcvhdrentsize - sizeof(u64) / sizeof(u32);
6303 dd->rcvhdrentsize - sizeof(u64) / sizeof(u32);
6304 6096
6305 /* we always allocate at least 2048 bytes for eager buffers */ 6097 /* we always allocate at least 2048 bytes for eager buffers */
6306 dd->rcvegrbufsize = max(mtu, 2048); 6098 dd->rcvegrbufsize = max(mtu, 2048);
@@ -6919,13 +6711,6 @@ struct qib_devdata *qib_init_iba7322_funcs(struct pci_dev *pdev,
6919 /* clear diagctrl register, in case diags were running and crashed */ 6711 /* clear diagctrl register, in case diags were running and crashed */
6920 qib_write_kreg(dd, kr_hwdiagctrl, 0); 6712 qib_write_kreg(dd, kr_hwdiagctrl, 0);
6921 6713
6922#if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
6923 ret = dca_add_requester(&pdev->dev);
6924 if (!ret) {
6925 dd->flags |= QIB_DCA_ENABLED;
6926 qib_setup_dca(dd);
6927 }
6928#endif
6929 goto bail; 6714 goto bail;
6930 6715
6931bail_cleanup: 6716bail_cleanup:
@@ -7111,8 +6896,8 @@ static const struct txdds_ent txdds_ddr[TXDDS_TABLE_SZ] = {
7111static const struct txdds_ent txdds_qdr[TXDDS_TABLE_SZ] = { 6896static const struct txdds_ent txdds_qdr[TXDDS_TABLE_SZ] = {
7112 /* amp, pre, main, post */ 6897 /* amp, pre, main, post */
7113 { 2, 2, 15, 6 }, /* Loopback */ 6898 { 2, 2, 15, 6 }, /* Loopback */
7114 { 0, 1, 0, 7 }, /* 2 dB */ 6899 { 0, 1, 0, 7 }, /* 2 dB (also QMH7342) */
7115 { 0, 1, 0, 9 }, /* 3 dB */ 6900 { 0, 1, 0, 9 }, /* 3 dB (also QMH7342) */
7116 { 0, 1, 0, 11 }, /* 4 dB */ 6901 { 0, 1, 0, 11 }, /* 4 dB */
7117 { 0, 1, 0, 13 }, /* 5 dB */ 6902 { 0, 1, 0, 13 }, /* 5 dB */
7118 { 0, 1, 0, 15 }, /* 6 dB */ 6903 { 0, 1, 0, 15 }, /* 6 dB */
@@ -7128,6 +6913,57 @@ static const struct txdds_ent txdds_qdr[TXDDS_TABLE_SZ] = {
7128 { 0, 2, 9, 15 }, /* 16 dB */ 6913 { 0, 2, 9, 15 }, /* 16 dB */
7129}; 6914};
7130 6915
6916/*
6917 * extra entries for use with txselect, for indices >= TXDDS_TABLE_SZ.
6918 * These are mostly used for mez cards going through connectors
6919 * and backplane traces, but can be used to add other "unusual"
6920 * table values as well.
6921 */
6922static const struct txdds_ent txdds_extra_sdr[TXDDS_EXTRA_SZ] = {
6923 /* amp, pre, main, post */
6924 { 0, 0, 0, 1 }, /* QMH7342 backplane settings */
6925 { 0, 0, 0, 1 }, /* QMH7342 backplane settings */
6926 { 0, 0, 0, 2 }, /* QMH7342 backplane settings */
6927 { 0, 0, 0, 2 }, /* QMH7342 backplane settings */
6928 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6929 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6930 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6931 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6932 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6933 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6934 { 0, 0, 0, 11 }, /* QME7342 backplane settings */
6935};
6936
6937static const struct txdds_ent txdds_extra_ddr[TXDDS_EXTRA_SZ] = {
6938 /* amp, pre, main, post */
6939 { 0, 0, 0, 7 }, /* QMH7342 backplane settings */
6940 { 0, 0, 0, 7 }, /* QMH7342 backplane settings */
6941 { 0, 0, 0, 8 }, /* QMH7342 backplane settings */
6942 { 0, 0, 0, 8 }, /* QMH7342 backplane settings */
6943 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6944 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6945 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6946 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6947 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6948 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6949 { 0, 0, 0, 13 }, /* QME7342 backplane settings */
6950};
6951
6952static const struct txdds_ent txdds_extra_qdr[TXDDS_EXTRA_SZ] = {
6953 /* amp, pre, main, post */
6954 { 0, 1, 0, 4 }, /* QMH7342 backplane settings */
6955 { 0, 1, 0, 5 }, /* QMH7342 backplane settings */
6956 { 0, 1, 0, 6 }, /* QMH7342 backplane settings */
6957 { 0, 1, 0, 8 }, /* QMH7342 backplane settings */
6958 { 0, 1, 12, 10 }, /* QME7342 backplane setting */
6959 { 0, 1, 12, 11 }, /* QME7342 backplane setting */
6960 { 0, 1, 12, 12 }, /* QME7342 backplane setting */
6961 { 0, 1, 12, 14 }, /* QME7342 backplane setting */
6962 { 0, 1, 12, 6 }, /* QME7342 backplane setting */
6963 { 0, 1, 12, 7 }, /* QME7342 backplane setting */
6964 { 0, 1, 12, 8 }, /* QME7342 backplane setting */
6965};
6966
7131static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds, 6967static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds,
7132 unsigned atten) 6968 unsigned atten)
7133{ 6969{
@@ -7145,7 +6981,7 @@ static const struct txdds_ent *get_atten_table(const struct txdds_ent *txdds,
7145} 6981}
7146 6982
7147/* 6983/*
7148 * if override is set, the module parameter cable_atten has a value 6984 * if override is set, the module parameter txselect has a value
7149 * for this specific port, so use it, rather than our normal mechanism. 6985 * for this specific port, so use it, rather than our normal mechanism.
7150 */ 6986 */
7151static void find_best_ent(struct qib_pportdata *ppd, 6987static void find_best_ent(struct qib_pportdata *ppd,
@@ -7184,15 +7020,28 @@ static void find_best_ent(struct qib_pportdata *ppd,
7184 *ddr_dds = get_atten_table(txdds_ddr, qd->atten[0]); 7020 *ddr_dds = get_atten_table(txdds_ddr, qd->atten[0]);
7185 *qdr_dds = get_atten_table(txdds_qdr, qd->atten[1]); 7021 *qdr_dds = get_atten_table(txdds_qdr, qd->atten[1]);
7186 return; 7022 return;
7187 } else { 7023 } else if (ppd->cpspec->no_eep < TXDDS_TABLE_SZ) {
7188 /* 7024 /*
7189 * If we have no (or incomplete) data from the cable 7025 * If we have no (or incomplete) data from the cable
7190 * EEPROM, or no QSFP, use the module parameter value 7026 * EEPROM, or no QSFP, or override is set, use the
7191 * to index into the attentuation table. 7027 * module parameter value to index into the attentuation
7028 * table.
7192 */ 7029 */
7193 *sdr_dds = &txdds_sdr[ppd->cpspec->no_eep]; 7030 idx = ppd->cpspec->no_eep;
7194 *ddr_dds = &txdds_ddr[ppd->cpspec->no_eep]; 7031 *sdr_dds = &txdds_sdr[idx];
7195 *qdr_dds = &txdds_qdr[ppd->cpspec->no_eep]; 7032 *ddr_dds = &txdds_ddr[idx];
7033 *qdr_dds = &txdds_qdr[idx];
7034 } else if (ppd->cpspec->no_eep < (TXDDS_TABLE_SZ + TXDDS_EXTRA_SZ)) {
7035 /* similar to above, but index into the "extra" table. */
7036 idx = ppd->cpspec->no_eep - TXDDS_TABLE_SZ;
7037 *sdr_dds = &txdds_extra_sdr[idx];
7038 *ddr_dds = &txdds_extra_ddr[idx];
7039 *qdr_dds = &txdds_extra_qdr[idx];
7040 } else {
7041 /* this shouldn't happen, it's range checked */
7042 *sdr_dds = txdds_sdr + qib_long_atten;
7043 *ddr_dds = txdds_ddr + qib_long_atten;
7044 *qdr_dds = txdds_qdr + qib_long_atten;
7196 } 7045 }
7197} 7046}
7198 7047
@@ -7203,33 +7052,24 @@ static void init_txdds_table(struct qib_pportdata *ppd, int override)
7203 int idx; 7052 int idx;
7204 int single_ent = 0; 7053 int single_ent = 0;
7205 7054
7206 if (IS_QMH(ppd->dd)) { 7055 find_best_ent(ppd, &sdr_dds, &ddr_dds, &qdr_dds, override);
7207 /* normally will be overridden, via setup_qmh() */ 7056
7208 sdr_dds = &qmh_sdr_txdds; 7057 /* for mez cards or override, use the selected value for all entries */
7209 ddr_dds = &qmh_ddr_txdds; 7058 if (!(ppd->dd->flags & QIB_HAS_QSFP) || override)
7210 qdr_dds = &qmh_qdr_txdds;
7211 single_ent = 1;
7212 } else if (IS_QME(ppd->dd)) {
7213 sdr_dds = &qme_sdr_txdds;
7214 ddr_dds = &qme_ddr_txdds;
7215 qdr_dds = &qme_qdr_txdds;
7216 single_ent = 1; 7059 single_ent = 1;
7217 } else
7218 find_best_ent(ppd, &sdr_dds, &ddr_dds, &qdr_dds, override);
7219 7060
7220 /* Fill in the first entry with the best entry found. */ 7061 /* Fill in the first entry with the best entry found. */
7221 set_txdds(ppd, 0, sdr_dds); 7062 set_txdds(ppd, 0, sdr_dds);
7222 set_txdds(ppd, TXDDS_TABLE_SZ, ddr_dds); 7063 set_txdds(ppd, TXDDS_TABLE_SZ, ddr_dds);
7223 set_txdds(ppd, 2 * TXDDS_TABLE_SZ, qdr_dds); 7064 set_txdds(ppd, 2 * TXDDS_TABLE_SZ, qdr_dds);
7224 7065 if (ppd->lflags & (QIBL_LINKINIT | QIBL_LINKARMED |
7225 /* 7066 QIBL_LINKACTIVE)) {
7226 * for our current speed, also write that value into the 7067 dds = (struct txdds_ent *)(ppd->link_speed_active ==
7227 * tx serdes registers. 7068 QIB_IB_QDR ? qdr_dds :
7228 */ 7069 (ppd->link_speed_active ==
7229 dds = (struct txdds_ent *)(ppd->link_speed_active == QIB_IB_QDR ? 7070 QIB_IB_DDR ? ddr_dds : sdr_dds));
7230 qdr_dds : (ppd->link_speed_active == 7071 write_tx_serdes_param(ppd, dds);
7231 QIB_IB_DDR ? ddr_dds : sdr_dds)); 7072 }
7232 write_tx_serdes_param(ppd, dds);
7233 7073
7234 /* Fill in the remaining entries with the default table values. */ 7074 /* Fill in the remaining entries with the default table values. */
7235 for (idx = 1; idx < ARRAY_SIZE(txdds_sdr); ++idx) { 7075 for (idx = 1; idx < ARRAY_SIZE(txdds_sdr); ++idx) {
@@ -7352,6 +7192,11 @@ static int serdes_7322_init(struct qib_pportdata *ppd)
7352 */ 7192 */
7353 init_txdds_table(ppd, 0); 7193 init_txdds_table(ppd, 0);
7354 7194
7195 /* ensure no tx overrides from earlier driver loads */
7196 qib_write_kreg_port(ppd, krp_tx_deemph_override,
7197 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7198 reset_tx_deemphasis_override));
7199
7355 /* Patch some SerDes defaults to "Better for IB" */ 7200 /* Patch some SerDes defaults to "Better for IB" */
7356 /* Timing Loop Bandwidth: cdr_timing[11:9] = 0 */ 7201 /* Timing Loop Bandwidth: cdr_timing[11:9] = 0 */
7357 ibsd_wr_allchans(ppd, 2, 0, BMASK(11, 9)); 7202 ibsd_wr_allchans(ppd, 2, 0, BMASK(11, 9));
@@ -7421,7 +7266,7 @@ static int serdes_7322_init(struct qib_pportdata *ppd)
7421 QDR_STATIC_ADAPT_DOWN_R1 : QDR_STATIC_ADAPT_DOWN); 7266 QDR_STATIC_ADAPT_DOWN_R1 : QDR_STATIC_ADAPT_DOWN);
7422 ppd->cpspec->qdr_dfe_on = 1; 7267 ppd->cpspec->qdr_dfe_on = 1;
7423 7268
7424 /* (FLoop LOS gate: PPM filter enabled */ 7269 /* FLoop LOS gate: PPM filter enabled */
7425 ibsd_wr_allchans(ppd, 38, 0 << 10, 1 << 10); 7270 ibsd_wr_allchans(ppd, 38, 0 << 10, 1 << 10);
7426 7271
7427 /* rx offset center enabled */ 7272 /* rx offset center enabled */
@@ -7486,68 +7331,39 @@ static void write_tx_serdes_param(struct qib_pportdata *ppd,
7486 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txc0_ena) | 7331 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txc0_ena) |
7487 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txcp1_ena) | 7332 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txcp1_ena) |
7488 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txcn1_ena)); 7333 SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0, txcn1_ena));
7489 deemph |= 1ULL << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7334
7490 tx_override_deemphasis_select); 7335 deemph |= SYM_MASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7491 deemph |= txdds->amp << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7336 tx_override_deemphasis_select);
7492 txampcntl_d2a); 7337 deemph |= (txdds->amp & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7493 deemph |= txdds->main << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7338 txampcntl_d2a)) << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7494 txc0_ena); 7339 txampcntl_d2a);
7495 deemph |= txdds->post << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7340 deemph |= (txdds->main & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7496 txcp1_ena); 7341 txc0_ena)) << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7497 deemph |= txdds->pre << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0, 7342 txc0_ena);
7343 deemph |= (txdds->post & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7344 txcp1_ena)) << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7345 txcp1_ena);
7346 deemph |= (txdds->pre & SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7347 txcn1_ena)) << SYM_LSB(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7498 txcn1_ena); 7348 txcn1_ena);
7499 qib_write_kreg_port(ppd, krp_tx_deemph_override, deemph); 7349 qib_write_kreg_port(ppd, krp_tx_deemph_override, deemph);
7500} 7350}
7501 7351
7502/* 7352/*
7503 * set per-bay, per channel parameters. For now, we ignore 7353 * Set the parameters for mez cards on link bounce, so they are
7504 * do_tx, and always set tx parameters, and set them with the same value 7354 * always exactly what was requested. Similar logic to init_txdds
7505 * for all channels, using the channel 0 value. We may switch to 7355 * but does just the serdes.
7506 * per-channel settings in the future, and that method only needs
7507 * to be done once.
7508 * Because this also writes the IBC txdds table with a single set
7509 * of values, it should be called only for cases where we want to completely
7510 * force a specific setting, typically only for mez cards.
7511 */ 7356 */
7512static void adj_tx_serdes(struct qib_pportdata *ppd) 7357static void adj_tx_serdes(struct qib_pportdata *ppd)
7513{ 7358{
7514 struct txdds_ent txdds; 7359 const struct txdds_ent *sdr_dds, *ddr_dds, *qdr_dds;
7515 int i; 7360 struct txdds_ent *dds;
7516 u8 *amp, *pre, *mainv, *post;
7517
7518 /*
7519 * Because we use TX_DEEMPHASIS_OVERRIDE, we need to
7520 * always do tx side, just like H1, since it is cleared
7521 * by link down
7522 */
7523 amp = ppd->cpspec->amp;
7524 pre = ppd->cpspec->pre;
7525 mainv = ppd->cpspec->mainv;
7526 post = ppd->cpspec->post;
7527
7528 amp[0] &= SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7529 txampcntl_d2a);
7530 mainv[0] &= SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7531 txc0_ena);
7532 post[0] &= SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7533 txcp1_ena);
7534 pre[0] &= SYM_RMASK(IBSD_TX_DEEMPHASIS_OVERRIDE_0,
7535 txcn1_ena);
7536
7537 /*
7538 * Use the channel zero values, only, for now, for
7539 * all channels
7540 */
7541 txdds.amp = amp[0];
7542 txdds.pre = pre[0];
7543 txdds.main = mainv[0];
7544 txdds.post = post[0];
7545
7546 /* write the QDR table for IBC use, as backup for link down */
7547 for (i = 0; i < ARRAY_SIZE(txdds_qdr); ++i)
7548 set_txdds(ppd, i + 32, &txdds);
7549 7361
7550 write_tx_serdes_param(ppd, &txdds); 7362 find_best_ent(ppd, &sdr_dds, &ddr_dds, &qdr_dds, 1);
7363 dds = (struct txdds_ent *)(ppd->link_speed_active == QIB_IB_QDR ?
7364 qdr_dds : (ppd->link_speed_active == QIB_IB_DDR ?
7365 ddr_dds : sdr_dds));
7366 write_tx_serdes_param(ppd, dds);
7551} 7367}
7552 7368
7553/* set QDR forced value for H1, if needed */ 7369/* set QDR forced value for H1, if needed */
@@ -7567,235 +7383,6 @@ static void force_h1(struct qib_pportdata *ppd)
7567 } 7383 }
7568} 7384}
7569 7385
7570/*
7571 * Parse the parameters for the QMH7342, to get rx and tx serdes
7572 * settings for that Bay, for both possible mez connectors (PCIe bus)
7573 * and IB link (one link on mez1, two possible on mez2).
7574 *
7575 * Data is comma or white space separated.
7576 *
7577 * A set of data has 7 groups, rx and tx groups have SERDES_CHANS values,
7578 * one per IB lane (serdes channel).
7579 * The groups are Bay, bus# H1 rcv, and amp, pre, post, main Tx values (QDR).
7580 * The Bay # is used only for debugging currently.
7581 * H1 values are set whenever the link goes down, or is at cfg_test or
7582 * cfg_wait_enh. Tx values are programmed once, when this routine is called
7583 * (and with default values at chip initialization). Values are any base, in
7584 * strtoul style, and values are seperated by comma, or any white space
7585 * (space, tab, newline).
7586 *
7587 * An example set might look like this (white space vs
7588 * comma used for human ease of reading)
7589 * The ordering is a set of Bay# Bus# H1, amp, pre, post, and main for mez1 IB1,
7590 * repeat for mez2 IB1, then mez2 IB2.
7591 *
7592 * B B H1:0 amp:0 pre:0 post: 0 main:0
7593 * a u H1: 1 amp: 1 pre: 1 post: 1 main: 1
7594 * y s H1: 2 amp: 2 pre: 2 post: 2 main: 2
7595 * H1: 4 amp: 3 pre: 3 post: 3 main: 3
7596 * 1 3 8,6,5,6 0,0,0,0 1,1,1,1 10,10,10,10 3,3,3,3
7597 * 1 6 7,6,6,7 0,0,0,0 1,1,1,1 10,10,10,10 3,3,3,3
7598 * 1 6 9,7,7,8 0,0,0,0 1,1,1,1 10,10,10,10 3,3,3,3
7599 */
7600#define N_QMH_FIELDS 22
7601static int setup_qmh_params(const char *str, struct kernel_param *kp)
7602{
7603 char *abuf, *v, *nv, *nvp;
7604 struct qib_devdata *dd;
7605 struct qib_pportdata *ppd;
7606 u32 mez, vlen, nf, port, bay;
7607 int ret = 0, found = 0;
7608
7609 vlen = strlen(str) + 1;
7610 abuf = kmalloc(vlen, GFP_KERNEL);
7611 if (!abuf) {
7612 printk(KERN_INFO QIB_DRV_NAME
7613 " Unable to allocate QMH param buffer; ignoring\n");
7614 return 0;
7615 }
7616 memcpy(abuf, str, vlen);
7617 v = abuf;
7618
7619 /* these 3 are because gcc can't know they are set before used */
7620 port = 1;
7621 mez = 1; /* used only for debugging */
7622 bay = 0; /* used only for debugging */
7623 ppd = NULL;
7624 for (nf = 0; (nv = strsep(&v, ", \t\n\r")) &&
7625 nf < (N_QMH_FIELDS * 3);) {
7626 u32 val;
7627
7628 if (!*nv)
7629 /* allow for multiple separators */
7630 continue;
7631
7632 val = simple_strtoul(nv, &nvp, 0);
7633 if (nv == nvp) {
7634 printk(KERN_INFO QIB_DRV_NAME
7635 " Bay%u, mez%u IB%u non-numeric value (%s) "
7636 "field #%u, ignoring rest\n", bay, mez,
7637 port, nv, nf % (N_QMH_FIELDS * 3));
7638 ret = -EINVAL;
7639 goto bail;
7640 }
7641 if (!(nf % N_QMH_FIELDS)) {
7642 ppd = NULL;
7643 bay = val;
7644 if (!bay || bay > 16) {
7645 printk(KERN_INFO QIB_DRV_NAME
7646 " Invalid bay # %u, field %u, "
7647 "ignoring rest\n", bay, nf);
7648 ret = -EINVAL;
7649 goto bail;
7650 }
7651 } else if ((nf % N_QMH_FIELDS) == 1) {
7652 u32 bus = val;
7653 if (nf == 1) {
7654 mez = 1;
7655 port = 1;
7656 } else if (nf == (N_QMH_FIELDS + 1)) {
7657 mez = 2;
7658 port = 1;
7659 } else {
7660 mez = 2;
7661 port = 2;
7662 }
7663 list_for_each_entry(dd, &qib_dev_list, list) {
7664 if (dd->deviceid != PCI_DEVICE_ID_QLOGIC_IB_7322
7665 || !IS_QMH(dd))
7666 continue; /* only for QMH cards */
7667 if (dd->pcidev->bus->number == bus) {
7668 found++;
7669 ppd = &dd->pport[port - 1];
7670 }
7671 }
7672 } else if (ppd) {
7673 u32 parm = (nf % N_QMH_FIELDS) - 2;
7674 if (parm < SERDES_CHANS && !(parm % SERDES_CHANS))
7675 ppd->cpspec->h1_val = val;
7676 else if (parm < (2 * SERDES_CHANS))
7677 ppd->cpspec->amp[parm % SERDES_CHANS] = val;
7678 else if (parm < (3 * SERDES_CHANS))
7679 ppd->cpspec->pre[parm % SERDES_CHANS] = val;
7680 else if (parm < (4 * SERDES_CHANS))
7681 ppd->cpspec->post[parm % SERDES_CHANS] = val;
7682 else {
7683 ppd->cpspec->mainv[parm % SERDES_CHANS] = val;
7684 /* At the end of a port, set params */
7685 if (parm == ((5 * SERDES_CHANS) - 1))
7686 adj_tx_serdes(ppd);
7687 }
7688 }
7689 nf++;
7690 }
7691 if (!found) {
7692 printk(KERN_ERR QIB_DRV_NAME
7693 ": No match found for qmh_serdes_setup parameter\n");
7694 ret = -EINVAL;
7695 }
7696bail:
7697 kfree(abuf);
7698 return ret;
7699}
7700
7701/*
7702 * Similarly for QME7342, but the format is simpler, values are the
7703 * same for all mez card positions in a blade (2 or 4 per blade), but
7704 * are different for some blades vs others, and we don't need to
7705 * specify different parameters for different serdes channels or different
7706 * IB ports.
7707 * Format is: h1 amp,pre,post,main
7708 * Alternate format (so ports can be different): Pport# h1 amp,pre,post,main
7709 */
7710#define N_QME_FIELDS 5
7711static int setup_qme_params(const char *str, struct kernel_param *kp)
7712{
7713 char *abuf, *v, *nv, *nvp;
7714 struct qib_devdata *dd;
7715 u32 vlen, nf, port = 0;
7716 u8 h1, tx[4]; /* amp, pre, post, main */
7717 int ret = -EINVAL;
7718 char *seplist;
7719
7720 vlen = strlen(str) + 1;
7721 abuf = kmalloc(vlen, GFP_KERNEL);
7722 if (!abuf) {
7723 printk(KERN_INFO QIB_DRV_NAME
7724 " Unable to allocate QME param buffer; ignoring\n");
7725 return 0;
7726 }
7727 strncpy(abuf, str, vlen);
7728
7729 v = abuf;
7730 seplist = " \t";
7731 h1 = H1_FORCE_QME; /* gcc can't figure out always set before used */
7732
7733 for (nf = 0; (nv = strsep(&v, seplist)); ) {
7734 u32 val;
7735
7736 if (!*nv)
7737 /* allow for multiple separators */
7738 continue;
7739
7740 if (!nf && *nv == 'P') {
7741 /* alternate format with port */
7742 val = simple_strtoul(++nv, &nvp, 0);
7743 if (nv == nvp || port >= NUM_IB_PORTS) {
7744 printk(KERN_INFO QIB_DRV_NAME
7745 " %s: non-numeric port value (%s) "
7746 "ignoring rest\n", __func__, nv);
7747 goto done;
7748 }
7749 port = val;
7750 continue; /* without incrementing nf */
7751 }
7752 val = simple_strtoul(nv, &nvp, 0);
7753 if (nv == nvp) {
7754 printk(KERN_INFO QIB_DRV_NAME
7755 " %s: non-numeric value (%s) "
7756 "field #%u, ignoring rest\n", __func__,
7757 nv, nf);
7758 goto done;
7759 }
7760 if (!nf) {
7761 h1 = val;
7762 seplist = ",";
7763 } else
7764 tx[nf - 1] = val;
7765 if (++nf == N_QME_FIELDS) {
7766 list_for_each_entry(dd, &qib_dev_list, list) {
7767 int pidx, i;
7768 if (dd->deviceid != PCI_DEVICE_ID_QLOGIC_IB_7322
7769 || !IS_QME(dd))
7770 continue; /* only for QME cards */
7771 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
7772 struct qib_pportdata *ppd;
7773 ppd = &dd->pport[pidx];
7774 if ((port && ppd->port != port) ||
7775 !ppd->link_speed_supported)
7776 continue;
7777 ppd->cpspec->h1_val = h1;
7778 for (i = 0; i < SERDES_CHANS; i++) {
7779 ppd->cpspec->amp[i] = tx[0];
7780 ppd->cpspec->pre[i] = tx[1];
7781 ppd->cpspec->post[i] = tx[2];
7782 ppd->cpspec->mainv[i] = tx[3];
7783 }
7784 adj_tx_serdes(ppd);
7785 }
7786 }
7787 ret = 0;
7788 goto done;
7789 }
7790 }
7791 printk(KERN_INFO QIB_DRV_NAME
7792 " %s: Only %u of %u fields provided, skipping\n",
7793 __func__, nf, N_QME_FIELDS);
7794done:
7795 kfree(abuf);
7796 return ret;
7797}
7798
7799#define SJA_EN SYM_MASK(SPC_JTAG_ACCESS_REG, SPC_JTAG_ACCESS_EN) 7386#define SJA_EN SYM_MASK(SPC_JTAG_ACCESS_REG, SPC_JTAG_ACCESS_EN)
7800#define BISTEN_LSB SYM_LSB(SPC_JTAG_ACCESS_REG, bist_en) 7387#define BISTEN_LSB SYM_LSB(SPC_JTAG_ACCESS_REG, bist_en)
7801 7388
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c
index c0139c07e97e..9b40f345ac3f 100644
--- a/drivers/infiniband/hw/qib/qib_init.c
+++ b/drivers/infiniband/hw/qib/qib_init.c
@@ -1237,7 +1237,13 @@ static int __devinit qib_init_one(struct pci_dev *pdev,
1237 */ 1237 */
1238 switch (ent->device) { 1238 switch (ent->device) {
1239 case PCI_DEVICE_ID_QLOGIC_IB_6120: 1239 case PCI_DEVICE_ID_QLOGIC_IB_6120:
1240#ifdef CONFIG_PCI_MSI
1240 dd = qib_init_iba6120_funcs(pdev, ent); 1241 dd = qib_init_iba6120_funcs(pdev, ent);
1242#else
1243 qib_early_err(&pdev->dev, "QLogic PCIE device 0x%x cannot "
1244 "work if CONFIG_PCI_MSI is not enabled\n",
1245 ent->device);
1246#endif
1241 break; 1247 break;
1242 1248
1243 case PCI_DEVICE_ID_QLOGIC_IB_7220: 1249 case PCI_DEVICE_ID_QLOGIC_IB_7220:
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-25 06:40:29 -0500