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-rw-r--r--drivers/bluetooth/bfusb.c316
-rw-r--r--drivers/bluetooth/hci_ldisc.c13
-rw-r--r--drivers/bluetooth/hci_usb.c3
-rw-r--r--drivers/bluetooth/hci_vhci.c99
-rw-r--r--drivers/infiniband/core/addr.c4
-rw-r--r--drivers/isdn/i4l/isdn_net.c4
-rw-r--r--drivers/net/Kconfig5
-rw-r--r--drivers/net/appletalk/ipddp.c5
-rw-r--r--drivers/net/bonding/bond_main.c2
-rw-r--r--drivers/net/irda/Kconfig1
-rw-r--r--drivers/net/irda/nsc-ircc.c2
-rw-r--r--drivers/net/irda/smsc-ircc2.c38
-rw-r--r--drivers/net/irda/stir4200.c15
-rw-r--r--drivers/net/irda/via-ircc.c7
-rw-r--r--drivers/net/loopback.c31
-rw-r--r--drivers/net/pppoe.c1
-rw-r--r--drivers/net/tg3.c480
-rw-r--r--drivers/net/tg3.h48
-rw-r--r--drivers/net/wan/hdlc_cisco.c2
-rw-r--r--drivers/net/wan/syncppp.c2
-rw-r--r--drivers/net/wireless/strip.c4
-rw-r--r--drivers/s390/net/qeth_main.c2
22 files changed, 719 insertions, 365 deletions
diff --git a/drivers/bluetooth/bfusb.c b/drivers/bluetooth/bfusb.c
index 23f96213f4ac..efcc28ec9d9a 100644
--- a/drivers/bluetooth/bfusb.c
+++ b/drivers/bluetooth/bfusb.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * AVM BlueFRITZ! USB driver 3 * AVM BlueFRITZ! USB driver
4 * 4 *
5 * Copyright (C) 2003 Marcel Holtmann <marcel@holtmann.org> 5 * Copyright (C) 2003-2006 Marcel Holtmann <marcel@holtmann.org>
6 * 6 *
7 * 7 *
8 * This program is free software; you can redistribute it and/or modify 8 * This program is free software; you can redistribute it and/or modify
@@ -59,7 +59,6 @@ static struct usb_device_id bfusb_table[] = {
59 59
60MODULE_DEVICE_TABLE(usb, bfusb_table); 60MODULE_DEVICE_TABLE(usb, bfusb_table);
61 61
62
63#define BFUSB_MAX_BLOCK_SIZE 256 62#define BFUSB_MAX_BLOCK_SIZE 256
64 63
65#define BFUSB_BLOCK_TIMEOUT 3000 64#define BFUSB_BLOCK_TIMEOUT 3000
@@ -70,7 +69,7 @@ MODULE_DEVICE_TABLE(usb, bfusb_table);
70#define BFUSB_MAX_BULK_TX 2 69#define BFUSB_MAX_BULK_TX 2
71#define BFUSB_MAX_BULK_RX 2 70#define BFUSB_MAX_BULK_RX 2
72 71
73struct bfusb { 72struct bfusb_data {
74 struct hci_dev *hdev; 73 struct hci_dev *hdev;
75 74
76 unsigned long state; 75 unsigned long state;
@@ -92,137 +91,136 @@ struct bfusb {
92 struct sk_buff_head completed_q; 91 struct sk_buff_head completed_q;
93}; 92};
94 93
95struct bfusb_scb { 94struct bfusb_data_scb {
96 struct urb *urb; 95 struct urb *urb;
97}; 96};
98 97
99static void bfusb_tx_complete(struct urb *urb, struct pt_regs *regs); 98static void bfusb_tx_complete(struct urb *urb, struct pt_regs *regs);
100static void bfusb_rx_complete(struct urb *urb, struct pt_regs *regs); 99static void bfusb_rx_complete(struct urb *urb, struct pt_regs *regs);
101 100
102static struct urb *bfusb_get_completed(struct bfusb *bfusb) 101static struct urb *bfusb_get_completed(struct bfusb_data *data)
103{ 102{
104 struct sk_buff *skb; 103 struct sk_buff *skb;
105 struct urb *urb = NULL; 104 struct urb *urb = NULL;
106 105
107 BT_DBG("bfusb %p", bfusb); 106 BT_DBG("bfusb %p", data);
108 107
109 skb = skb_dequeue(&bfusb->completed_q); 108 skb = skb_dequeue(&data->completed_q);
110 if (skb) { 109 if (skb) {
111 urb = ((struct bfusb_scb *) skb->cb)->urb; 110 urb = ((struct bfusb_data_scb *) skb->cb)->urb;
112 kfree_skb(skb); 111 kfree_skb(skb);
113 } 112 }
114 113
115 return urb; 114 return urb;
116} 115}
117 116
118static void bfusb_unlink_urbs(struct bfusb *bfusb) 117static void bfusb_unlink_urbs(struct bfusb_data *data)
119{ 118{
120 struct sk_buff *skb; 119 struct sk_buff *skb;
121 struct urb *urb; 120 struct urb *urb;
122 121
123 BT_DBG("bfusb %p", bfusb); 122 BT_DBG("bfusb %p", data);
124 123
125 while ((skb = skb_dequeue(&bfusb->pending_q))) { 124 while ((skb = skb_dequeue(&data->pending_q))) {
126 urb = ((struct bfusb_scb *) skb->cb)->urb; 125 urb = ((struct bfusb_data_scb *) skb->cb)->urb;
127 usb_kill_urb(urb); 126 usb_kill_urb(urb);
128 skb_queue_tail(&bfusb->completed_q, skb); 127 skb_queue_tail(&data->completed_q, skb);
129 } 128 }
130 129
131 while ((urb = bfusb_get_completed(bfusb))) 130 while ((urb = bfusb_get_completed(data)))
132 usb_free_urb(urb); 131 usb_free_urb(urb);
133} 132}
134 133
135 134static int bfusb_send_bulk(struct bfusb_data *data, struct sk_buff *skb)
136static int bfusb_send_bulk(struct bfusb *bfusb, struct sk_buff *skb)
137{ 135{
138 struct bfusb_scb *scb = (void *) skb->cb; 136 struct bfusb_data_scb *scb = (void *) skb->cb;
139 struct urb *urb = bfusb_get_completed(bfusb); 137 struct urb *urb = bfusb_get_completed(data);
140 int err, pipe; 138 int err, pipe;
141 139
142 BT_DBG("bfusb %p skb %p len %d", bfusb, skb, skb->len); 140 BT_DBG("bfusb %p skb %p len %d", data, skb, skb->len);
143 141
144 if (!urb && !(urb = usb_alloc_urb(0, GFP_ATOMIC))) 142 if (!urb && !(urb = usb_alloc_urb(0, GFP_ATOMIC)))
145 return -ENOMEM; 143 return -ENOMEM;
146 144
147 pipe = usb_sndbulkpipe(bfusb->udev, bfusb->bulk_out_ep); 145 pipe = usb_sndbulkpipe(data->udev, data->bulk_out_ep);
148 146
149 usb_fill_bulk_urb(urb, bfusb->udev, pipe, skb->data, skb->len, 147 usb_fill_bulk_urb(urb, data->udev, pipe, skb->data, skb->len,
150 bfusb_tx_complete, skb); 148 bfusb_tx_complete, skb);
151 149
152 scb->urb = urb; 150 scb->urb = urb;
153 151
154 skb_queue_tail(&bfusb->pending_q, skb); 152 skb_queue_tail(&data->pending_q, skb);
155 153
156 err = usb_submit_urb(urb, GFP_ATOMIC); 154 err = usb_submit_urb(urb, GFP_ATOMIC);
157 if (err) { 155 if (err) {
158 BT_ERR("%s bulk tx submit failed urb %p err %d", 156 BT_ERR("%s bulk tx submit failed urb %p err %d",
159 bfusb->hdev->name, urb, err); 157 data->hdev->name, urb, err);
160 skb_unlink(skb, &bfusb->pending_q); 158 skb_unlink(skb, &data->pending_q);
161 usb_free_urb(urb); 159 usb_free_urb(urb);
162 } else 160 } else
163 atomic_inc(&bfusb->pending_tx); 161 atomic_inc(&data->pending_tx);
164 162
165 return err; 163 return err;
166} 164}
167 165
168static void bfusb_tx_wakeup(struct bfusb *bfusb) 166static void bfusb_tx_wakeup(struct bfusb_data *data)
169{ 167{
170 struct sk_buff *skb; 168 struct sk_buff *skb;
171 169
172 BT_DBG("bfusb %p", bfusb); 170 BT_DBG("bfusb %p", data);
173 171
174 if (test_and_set_bit(BFUSB_TX_PROCESS, &bfusb->state)) { 172 if (test_and_set_bit(BFUSB_TX_PROCESS, &data->state)) {
175 set_bit(BFUSB_TX_WAKEUP, &bfusb->state); 173 set_bit(BFUSB_TX_WAKEUP, &data->state);
176 return; 174 return;
177 } 175 }
178 176
179 do { 177 do {
180 clear_bit(BFUSB_TX_WAKEUP, &bfusb->state); 178 clear_bit(BFUSB_TX_WAKEUP, &data->state);
181 179
182 while ((atomic_read(&bfusb->pending_tx) < BFUSB_MAX_BULK_TX) && 180 while ((atomic_read(&data->pending_tx) < BFUSB_MAX_BULK_TX) &&
183 (skb = skb_dequeue(&bfusb->transmit_q))) { 181 (skb = skb_dequeue(&data->transmit_q))) {
184 if (bfusb_send_bulk(bfusb, skb) < 0) { 182 if (bfusb_send_bulk(data, skb) < 0) {
185 skb_queue_head(&bfusb->transmit_q, skb); 183 skb_queue_head(&data->transmit_q, skb);
186 break; 184 break;
187 } 185 }
188 } 186 }
189 187
190 } while (test_bit(BFUSB_TX_WAKEUP, &bfusb->state)); 188 } while (test_bit(BFUSB_TX_WAKEUP, &data->state));
191 189
192 clear_bit(BFUSB_TX_PROCESS, &bfusb->state); 190 clear_bit(BFUSB_TX_PROCESS, &data->state);
193} 191}
194 192
195static void bfusb_tx_complete(struct urb *urb, struct pt_regs *regs) 193static void bfusb_tx_complete(struct urb *urb, struct pt_regs *regs)
196{ 194{
197 struct sk_buff *skb = (struct sk_buff *) urb->context; 195 struct sk_buff *skb = (struct sk_buff *) urb->context;
198 struct bfusb *bfusb = (struct bfusb *) skb->dev; 196 struct bfusb_data *data = (struct bfusb_data *) skb->dev;
199 197
200 BT_DBG("bfusb %p urb %p skb %p len %d", bfusb, urb, skb, skb->len); 198 BT_DBG("bfusb %p urb %p skb %p len %d", data, urb, skb, skb->len);
201 199
202 atomic_dec(&bfusb->pending_tx); 200 atomic_dec(&data->pending_tx);
203 201
204 if (!test_bit(HCI_RUNNING, &bfusb->hdev->flags)) 202 if (!test_bit(HCI_RUNNING, &data->hdev->flags))
205 return; 203 return;
206 204
207 if (!urb->status) 205 if (!urb->status)
208 bfusb->hdev->stat.byte_tx += skb->len; 206 data->hdev->stat.byte_tx += skb->len;
209 else 207 else
210 bfusb->hdev->stat.err_tx++; 208 data->hdev->stat.err_tx++;
211 209
212 read_lock(&bfusb->lock); 210 read_lock(&data->lock);
213 211
214 skb_unlink(skb, &bfusb->pending_q); 212 skb_unlink(skb, &data->pending_q);
215 skb_queue_tail(&bfusb->completed_q, skb); 213 skb_queue_tail(&data->completed_q, skb);
216 214
217 bfusb_tx_wakeup(bfusb); 215 bfusb_tx_wakeup(data);
218 216
219 read_unlock(&bfusb->lock); 217 read_unlock(&data->lock);
220} 218}
221 219
222 220
223static int bfusb_rx_submit(struct bfusb *bfusb, struct urb *urb) 221static int bfusb_rx_submit(struct bfusb_data *data, struct urb *urb)
224{ 222{
225 struct bfusb_scb *scb; 223 struct bfusb_data_scb *scb;
226 struct sk_buff *skb; 224 struct sk_buff *skb;
227 int err, pipe, size = HCI_MAX_FRAME_SIZE + 32; 225 int err, pipe, size = HCI_MAX_FRAME_SIZE + 32;
228 226
@@ -231,28 +229,29 @@ static int bfusb_rx_submit(struct bfusb *bfusb, struct urb *urb)
231 if (!urb && !(urb = usb_alloc_urb(0, GFP_ATOMIC))) 229 if (!urb && !(urb = usb_alloc_urb(0, GFP_ATOMIC)))
232 return -ENOMEM; 230 return -ENOMEM;
233 231
234 if (!(skb = bt_skb_alloc(size, GFP_ATOMIC))) { 232 skb = bt_skb_alloc(size, GFP_ATOMIC);
233 if (!skb) {
235 usb_free_urb(urb); 234 usb_free_urb(urb);
236 return -ENOMEM; 235 return -ENOMEM;
237 } 236 }
238 237
239 skb->dev = (void *) bfusb; 238 skb->dev = (void *) data;
240 239
241 scb = (struct bfusb_scb *) skb->cb; 240 scb = (struct bfusb_data_scb *) skb->cb;
242 scb->urb = urb; 241 scb->urb = urb;
243 242
244 pipe = usb_rcvbulkpipe(bfusb->udev, bfusb->bulk_in_ep); 243 pipe = usb_rcvbulkpipe(data->udev, data->bulk_in_ep);
245 244
246 usb_fill_bulk_urb(urb, bfusb->udev, pipe, skb->data, size, 245 usb_fill_bulk_urb(urb, data->udev, pipe, skb->data, size,
247 bfusb_rx_complete, skb); 246 bfusb_rx_complete, skb);
248 247
249 skb_queue_tail(&bfusb->pending_q, skb); 248 skb_queue_tail(&data->pending_q, skb);
250 249
251 err = usb_submit_urb(urb, GFP_ATOMIC); 250 err = usb_submit_urb(urb, GFP_ATOMIC);
252 if (err) { 251 if (err) {
253 BT_ERR("%s bulk rx submit failed urb %p err %d", 252 BT_ERR("%s bulk rx submit failed urb %p err %d",
254 bfusb->hdev->name, urb, err); 253 data->hdev->name, urb, err);
255 skb_unlink(skb, &bfusb->pending_q); 254 skb_unlink(skb, &data->pending_q);
256 kfree_skb(skb); 255 kfree_skb(skb);
257 usb_free_urb(urb); 256 usb_free_urb(urb);
258 } 257 }
@@ -260,15 +259,15 @@ static int bfusb_rx_submit(struct bfusb *bfusb, struct urb *urb)
260 return err; 259 return err;
261} 260}
262 261
263static inline int bfusb_recv_block(struct bfusb *bfusb, int hdr, unsigned char *data, int len) 262static inline int bfusb_recv_block(struct bfusb_data *data, int hdr, unsigned char *buf, int len)
264{ 263{
265 BT_DBG("bfusb %p hdr 0x%02x data %p len %d", bfusb, hdr, data, len); 264 BT_DBG("bfusb %p hdr 0x%02x data %p len %d", data, hdr, buf, len);
266 265
267 if (hdr & 0x10) { 266 if (hdr & 0x10) {
268 BT_ERR("%s error in block", bfusb->hdev->name); 267 BT_ERR("%s error in block", data->hdev->name);
269 if (bfusb->reassembly) 268 if (data->reassembly)
270 kfree_skb(bfusb->reassembly); 269 kfree_skb(data->reassembly);
271 bfusb->reassembly = NULL; 270 data->reassembly = NULL;
272 return -EIO; 271 return -EIO;
273 } 272 }
274 273
@@ -277,46 +276,46 @@ static inline int bfusb_recv_block(struct bfusb *bfusb, int hdr, unsigned char *
277 unsigned char pkt_type; 276 unsigned char pkt_type;
278 int pkt_len = 0; 277 int pkt_len = 0;
279 278
280 if (bfusb->reassembly) { 279 if (data->reassembly) {
281 BT_ERR("%s unexpected start block", bfusb->hdev->name); 280 BT_ERR("%s unexpected start block", data->hdev->name);
282 kfree_skb(bfusb->reassembly); 281 kfree_skb(data->reassembly);
283 bfusb->reassembly = NULL; 282 data->reassembly = NULL;
284 } 283 }
285 284
286 if (len < 1) { 285 if (len < 1) {
287 BT_ERR("%s no packet type found", bfusb->hdev->name); 286 BT_ERR("%s no packet type found", data->hdev->name);
288 return -EPROTO; 287 return -EPROTO;
289 } 288 }
290 289
291 pkt_type = *data++; len--; 290 pkt_type = *buf++; len--;
292 291
293 switch (pkt_type) { 292 switch (pkt_type) {
294 case HCI_EVENT_PKT: 293 case HCI_EVENT_PKT:
295 if (len >= HCI_EVENT_HDR_SIZE) { 294 if (len >= HCI_EVENT_HDR_SIZE) {
296 struct hci_event_hdr *hdr = (struct hci_event_hdr *) data; 295 struct hci_event_hdr *hdr = (struct hci_event_hdr *) buf;
297 pkt_len = HCI_EVENT_HDR_SIZE + hdr->plen; 296 pkt_len = HCI_EVENT_HDR_SIZE + hdr->plen;
298 } else { 297 } else {
299 BT_ERR("%s event block is too short", bfusb->hdev->name); 298 BT_ERR("%s event block is too short", data->hdev->name);
300 return -EILSEQ; 299 return -EILSEQ;
301 } 300 }
302 break; 301 break;
303 302
304 case HCI_ACLDATA_PKT: 303 case HCI_ACLDATA_PKT:
305 if (len >= HCI_ACL_HDR_SIZE) { 304 if (len >= HCI_ACL_HDR_SIZE) {
306 struct hci_acl_hdr *hdr = (struct hci_acl_hdr *) data; 305 struct hci_acl_hdr *hdr = (struct hci_acl_hdr *) buf;
307 pkt_len = HCI_ACL_HDR_SIZE + __le16_to_cpu(hdr->dlen); 306 pkt_len = HCI_ACL_HDR_SIZE + __le16_to_cpu(hdr->dlen);
308 } else { 307 } else {
309 BT_ERR("%s data block is too short", bfusb->hdev->name); 308 BT_ERR("%s data block is too short", data->hdev->name);
310 return -EILSEQ; 309 return -EILSEQ;
311 } 310 }
312 break; 311 break;
313 312
314 case HCI_SCODATA_PKT: 313 case HCI_SCODATA_PKT:
315 if (len >= HCI_SCO_HDR_SIZE) { 314 if (len >= HCI_SCO_HDR_SIZE) {
316 struct hci_sco_hdr *hdr = (struct hci_sco_hdr *) data; 315 struct hci_sco_hdr *hdr = (struct hci_sco_hdr *) buf;
317 pkt_len = HCI_SCO_HDR_SIZE + hdr->dlen; 316 pkt_len = HCI_SCO_HDR_SIZE + hdr->dlen;
318 } else { 317 } else {
319 BT_ERR("%s audio block is too short", bfusb->hdev->name); 318 BT_ERR("%s audio block is too short", data->hdev->name);
320 return -EILSEQ; 319 return -EILSEQ;
321 } 320 }
322 break; 321 break;
@@ -324,27 +323,27 @@ static inline int bfusb_recv_block(struct bfusb *bfusb, int hdr, unsigned char *
324 323
325 skb = bt_skb_alloc(pkt_len, GFP_ATOMIC); 324 skb = bt_skb_alloc(pkt_len, GFP_ATOMIC);
326 if (!skb) { 325 if (!skb) {
327 BT_ERR("%s no memory for the packet", bfusb->hdev->name); 326 BT_ERR("%s no memory for the packet", data->hdev->name);
328 return -ENOMEM; 327 return -ENOMEM;
329 } 328 }
330 329
331 skb->dev = (void *) bfusb->hdev; 330 skb->dev = (void *) data->hdev;
332 bt_cb(skb)->pkt_type = pkt_type; 331 bt_cb(skb)->pkt_type = pkt_type;
333 332
334 bfusb->reassembly = skb; 333 data->reassembly = skb;
335 } else { 334 } else {
336 if (!bfusb->reassembly) { 335 if (!data->reassembly) {
337 BT_ERR("%s unexpected continuation block", bfusb->hdev->name); 336 BT_ERR("%s unexpected continuation block", data->hdev->name);
338 return -EIO; 337 return -EIO;
339 } 338 }
340 } 339 }
341 340
342 if (len > 0) 341 if (len > 0)
343 memcpy(skb_put(bfusb->reassembly, len), data, len); 342 memcpy(skb_put(data->reassembly, len), buf, len);
344 343
345 if (hdr & 0x08) { 344 if (hdr & 0x08) {
346 hci_recv_frame(bfusb->reassembly); 345 hci_recv_frame(data->reassembly);
347 bfusb->reassembly = NULL; 346 data->reassembly = NULL;
348 } 347 }
349 348
350 return 0; 349 return 0;
@@ -353,22 +352,22 @@ static inline int bfusb_recv_block(struct bfusb *bfusb, int hdr, unsigned char *
353static void bfusb_rx_complete(struct urb *urb, struct pt_regs *regs) 352static void bfusb_rx_complete(struct urb *urb, struct pt_regs *regs)
354{ 353{
355 struct sk_buff *skb = (struct sk_buff *) urb->context; 354 struct sk_buff *skb = (struct sk_buff *) urb->context;
356 struct bfusb *bfusb = (struct bfusb *) skb->dev; 355 struct bfusb_data *data = (struct bfusb_data *) skb->dev;
357 unsigned char *buf = urb->transfer_buffer; 356 unsigned char *buf = urb->transfer_buffer;
358 int count = urb->actual_length; 357 int count = urb->actual_length;
359 int err, hdr, len; 358 int err, hdr, len;
360 359
361 BT_DBG("bfusb %p urb %p skb %p len %d", bfusb, urb, skb, skb->len); 360 BT_DBG("bfusb %p urb %p skb %p len %d", bfusb, urb, skb, skb->len);
362 361
363 read_lock(&bfusb->lock); 362 read_lock(&data->lock);
364 363
365 if (!test_bit(HCI_RUNNING, &bfusb->hdev->flags)) 364 if (!test_bit(HCI_RUNNING, &data->hdev->flags))
366 goto unlock; 365 goto unlock;
367 366
368 if (urb->status || !count) 367 if (urb->status || !count)
369 goto resubmit; 368 goto resubmit;
370 369
371 bfusb->hdev->stat.byte_rx += count; 370 data->hdev->stat.byte_rx += count;
372 371
373 skb_put(skb, count); 372 skb_put(skb, count);
374 373
@@ -387,90 +386,89 @@ static void bfusb_rx_complete(struct urb *urb, struct pt_regs *regs)
387 386
388 if (count < len) { 387 if (count < len) {
389 BT_ERR("%s block extends over URB buffer ranges", 388 BT_ERR("%s block extends over URB buffer ranges",
390 bfusb->hdev->name); 389 data->hdev->name);
391 } 390 }
392 391
393 if ((hdr & 0xe1) == 0xc1) 392 if ((hdr & 0xe1) == 0xc1)
394 bfusb_recv_block(bfusb, hdr, buf, len); 393 bfusb_recv_block(data, hdr, buf, len);
395 394
396 count -= len; 395 count -= len;
397 buf += len; 396 buf += len;
398 } 397 }
399 398
400 skb_unlink(skb, &bfusb->pending_q); 399 skb_unlink(skb, &data->pending_q);
401 kfree_skb(skb); 400 kfree_skb(skb);
402 401
403 bfusb_rx_submit(bfusb, urb); 402 bfusb_rx_submit(data, urb);
404 403
405 read_unlock(&bfusb->lock); 404 read_unlock(&data->lock);
406 405
407 return; 406 return;
408 407
409resubmit: 408resubmit:
410 urb->dev = bfusb->udev; 409 urb->dev = data->udev;
411 410
412 err = usb_submit_urb(urb, GFP_ATOMIC); 411 err = usb_submit_urb(urb, GFP_ATOMIC);
413 if (err) { 412 if (err) {
414 BT_ERR("%s bulk resubmit failed urb %p err %d", 413 BT_ERR("%s bulk resubmit failed urb %p err %d",
415 bfusb->hdev->name, urb, err); 414 data->hdev->name, urb, err);
416 } 415 }
417 416
418unlock: 417unlock:
419 read_unlock(&bfusb->lock); 418 read_unlock(&data->lock);
420} 419}
421 420
422
423static int bfusb_open(struct hci_dev *hdev) 421static int bfusb_open(struct hci_dev *hdev)
424{ 422{
425 struct bfusb *bfusb = (struct bfusb *) hdev->driver_data; 423 struct bfusb_data *data = hdev->driver_data;
426 unsigned long flags; 424 unsigned long flags;
427 int i, err; 425 int i, err;
428 426
429 BT_DBG("hdev %p bfusb %p", hdev, bfusb); 427 BT_DBG("hdev %p bfusb %p", hdev, data);
430 428
431 if (test_and_set_bit(HCI_RUNNING, &hdev->flags)) 429 if (test_and_set_bit(HCI_RUNNING, &hdev->flags))
432 return 0; 430 return 0;
433 431
434 write_lock_irqsave(&bfusb->lock, flags); 432 write_lock_irqsave(&data->lock, flags);
435 433
436 err = bfusb_rx_submit(bfusb, NULL); 434 err = bfusb_rx_submit(data, NULL);
437 if (!err) { 435 if (!err) {
438 for (i = 1; i < BFUSB_MAX_BULK_RX; i++) 436 for (i = 1; i < BFUSB_MAX_BULK_RX; i++)
439 bfusb_rx_submit(bfusb, NULL); 437 bfusb_rx_submit(data, NULL);
440 } else { 438 } else {
441 clear_bit(HCI_RUNNING, &hdev->flags); 439 clear_bit(HCI_RUNNING, &hdev->flags);
442 } 440 }
443 441
444 write_unlock_irqrestore(&bfusb->lock, flags); 442 write_unlock_irqrestore(&data->lock, flags);
445 443
446 return err; 444 return err;
447} 445}
448 446
449static int bfusb_flush(struct hci_dev *hdev) 447static int bfusb_flush(struct hci_dev *hdev)
450{ 448{
451 struct bfusb *bfusb = (struct bfusb *) hdev->driver_data; 449 struct bfusb_data *data = hdev->driver_data;
452 450
453 BT_DBG("hdev %p bfusb %p", hdev, bfusb); 451 BT_DBG("hdev %p bfusb %p", hdev, data);
454 452
455 skb_queue_purge(&bfusb->transmit_q); 453 skb_queue_purge(&data->transmit_q);
456 454
457 return 0; 455 return 0;
458} 456}
459 457
460static int bfusb_close(struct hci_dev *hdev) 458static int bfusb_close(struct hci_dev *hdev)
461{ 459{
462 struct bfusb *bfusb = (struct bfusb *) hdev->driver_data; 460 struct bfusb_data *data = hdev->driver_data;
463 unsigned long flags; 461 unsigned long flags;
464 462
465 BT_DBG("hdev %p bfusb %p", hdev, bfusb); 463 BT_DBG("hdev %p bfusb %p", hdev, data);
466 464
467 if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags)) 465 if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags))
468 return 0; 466 return 0;
469 467
470 write_lock_irqsave(&bfusb->lock, flags); 468 write_lock_irqsave(&data->lock, flags);
471 write_unlock_irqrestore(&bfusb->lock, flags); 469 write_unlock_irqrestore(&data->lock, flags);
472 470
473 bfusb_unlink_urbs(bfusb); 471 bfusb_unlink_urbs(data);
474 bfusb_flush(hdev); 472 bfusb_flush(hdev);
475 473
476 return 0; 474 return 0;
@@ -479,7 +477,7 @@ static int bfusb_close(struct hci_dev *hdev)
479static int bfusb_send_frame(struct sk_buff *skb) 477static int bfusb_send_frame(struct sk_buff *skb)
480{ 478{
481 struct hci_dev *hdev = (struct hci_dev *) skb->dev; 479 struct hci_dev *hdev = (struct hci_dev *) skb->dev;
482 struct bfusb *bfusb; 480 struct bfusb_data *data;
483 struct sk_buff *nskb; 481 struct sk_buff *nskb;
484 unsigned char buf[3]; 482 unsigned char buf[3];
485 int sent = 0, size, count; 483 int sent = 0, size, count;
@@ -494,7 +492,7 @@ static int bfusb_send_frame(struct sk_buff *skb)
494 if (!test_bit(HCI_RUNNING, &hdev->flags)) 492 if (!test_bit(HCI_RUNNING, &hdev->flags))
495 return -EBUSY; 493 return -EBUSY;
496 494
497 bfusb = (struct bfusb *) hdev->driver_data; 495 data = hdev->driver_data;
498 496
499 switch (bt_cb(skb)->pkt_type) { 497 switch (bt_cb(skb)->pkt_type) {
500 case HCI_COMMAND_PKT: 498 case HCI_COMMAND_PKT:
@@ -514,12 +512,13 @@ static int bfusb_send_frame(struct sk_buff *skb)
514 count = skb->len; 512 count = skb->len;
515 513
516 /* Max HCI frame size seems to be 1511 + 1 */ 514 /* Max HCI frame size seems to be 1511 + 1 */
517 if (!(nskb = bt_skb_alloc(count + 32, GFP_ATOMIC))) { 515 nskb = bt_skb_alloc(count + 32, GFP_ATOMIC);
516 if (!nskb) {
518 BT_ERR("Can't allocate memory for new packet"); 517 BT_ERR("Can't allocate memory for new packet");
519 return -ENOMEM; 518 return -ENOMEM;
520 } 519 }
521 520
522 nskb->dev = (void *) bfusb; 521 nskb->dev = (void *) data;
523 522
524 while (count) { 523 while (count) {
525 size = min_t(uint, count, BFUSB_MAX_BLOCK_SIZE); 524 size = min_t(uint, count, BFUSB_MAX_BLOCK_SIZE);
@@ -536,18 +535,18 @@ static int bfusb_send_frame(struct sk_buff *skb)
536 } 535 }
537 536
538 /* Don't send frame with multiple size of bulk max packet */ 537 /* Don't send frame with multiple size of bulk max packet */
539 if ((nskb->len % bfusb->bulk_pkt_size) == 0) { 538 if ((nskb->len % data->bulk_pkt_size) == 0) {
540 buf[0] = 0xdd; 539 buf[0] = 0xdd;
541 buf[1] = 0x00; 540 buf[1] = 0x00;
542 memcpy(skb_put(nskb, 2), buf, 2); 541 memcpy(skb_put(nskb, 2), buf, 2);
543 } 542 }
544 543
545 read_lock(&bfusb->lock); 544 read_lock(&data->lock);
546 545
547 skb_queue_tail(&bfusb->transmit_q, nskb); 546 skb_queue_tail(&data->transmit_q, nskb);
548 bfusb_tx_wakeup(bfusb); 547 bfusb_tx_wakeup(data);
549 548
550 read_unlock(&bfusb->lock); 549 read_unlock(&data->lock);
551 550
552 kfree_skb(skb); 551 kfree_skb(skb);
553 552
@@ -556,11 +555,11 @@ static int bfusb_send_frame(struct sk_buff *skb)
556 555
557static void bfusb_destruct(struct hci_dev *hdev) 556static void bfusb_destruct(struct hci_dev *hdev)
558{ 557{
559 struct bfusb *bfusb = (struct bfusb *) hdev->driver_data; 558 struct bfusb_data *data = hdev->driver_data;
560 559
561 BT_DBG("hdev %p bfusb %p", hdev, bfusb); 560 BT_DBG("hdev %p bfusb %p", hdev, data);
562 561
563 kfree(bfusb); 562 kfree(data);
564} 563}
565 564
566static int bfusb_ioctl(struct hci_dev *hdev, unsigned int cmd, unsigned long arg) 565static int bfusb_ioctl(struct hci_dev *hdev, unsigned int cmd, unsigned long arg)
@@ -568,25 +567,24 @@ static int bfusb_ioctl(struct hci_dev *hdev, unsigned int cmd, unsigned long arg
568 return -ENOIOCTLCMD; 567 return -ENOIOCTLCMD;
569} 568}
570 569
571 570static int bfusb_load_firmware(struct bfusb_data *data, unsigned char *firmware, int count)
572static int bfusb_load_firmware(struct bfusb *bfusb, unsigned char *firmware, int count)
573{ 571{
574 unsigned char *buf; 572 unsigned char *buf;
575 int err, pipe, len, size, sent = 0; 573 int err, pipe, len, size, sent = 0;
576 574
577 BT_DBG("bfusb %p udev %p", bfusb, bfusb->udev); 575 BT_DBG("bfusb %p udev %p", data, data->udev);
578 576
579 BT_INFO("BlueFRITZ! USB loading firmware"); 577 BT_INFO("BlueFRITZ! USB loading firmware");
580 578
581 pipe = usb_sndctrlpipe(bfusb->udev, 0); 579 pipe = usb_sndctrlpipe(data->udev, 0);
582 580
583 if (usb_control_msg(bfusb->udev, pipe, USB_REQ_SET_CONFIGURATION, 581 if (usb_control_msg(data->udev, pipe, USB_REQ_SET_CONFIGURATION,
584 0, 1, 0, NULL, 0, USB_CTRL_SET_TIMEOUT) < 0) { 582 0, 1, 0, NULL, 0, USB_CTRL_SET_TIMEOUT) < 0) {
585 BT_ERR("Can't change to loading configuration"); 583 BT_ERR("Can't change to loading configuration");
586 return -EBUSY; 584 return -EBUSY;
587 } 585 }
588 586
589 bfusb->udev->toggle[0] = bfusb->udev->toggle[1] = 0; 587 data->udev->toggle[0] = data->udev->toggle[1] = 0;
590 588
591 buf = kmalloc(BFUSB_MAX_BLOCK_SIZE + 3, GFP_ATOMIC); 589 buf = kmalloc(BFUSB_MAX_BLOCK_SIZE + 3, GFP_ATOMIC);
592 if (!buf) { 590 if (!buf) {
@@ -594,14 +592,14 @@ static int bfusb_load_firmware(struct bfusb *bfusb, unsigned char *firmware, int
594 return -ENOMEM; 592 return -ENOMEM;
595 } 593 }
596 594
597 pipe = usb_sndbulkpipe(bfusb->udev, bfusb->bulk_out_ep); 595 pipe = usb_sndbulkpipe(data->udev, data->bulk_out_ep);
598 596
599 while (count) { 597 while (count) {
600 size = min_t(uint, count, BFUSB_MAX_BLOCK_SIZE + 3); 598 size = min_t(uint, count, BFUSB_MAX_BLOCK_SIZE + 3);
601 599
602 memcpy(buf, firmware + sent, size); 600 memcpy(buf, firmware + sent, size);
603 601
604 err = usb_bulk_msg(bfusb->udev, pipe, buf, size, 602 err = usb_bulk_msg(data->udev, pipe, buf, size,
605 &len, BFUSB_BLOCK_TIMEOUT); 603 &len, BFUSB_BLOCK_TIMEOUT);
606 604
607 if (err || (len != size)) { 605 if (err || (len != size)) {
@@ -613,21 +611,23 @@ static int bfusb_load_firmware(struct bfusb *bfusb, unsigned char *firmware, int
613 count -= size; 611 count -= size;
614 } 612 }
615 613
616 if ((err = usb_bulk_msg(bfusb->udev, pipe, NULL, 0, 614 err = usb_bulk_msg(data->udev, pipe, NULL, 0,
617 &len, BFUSB_BLOCK_TIMEOUT)) < 0) { 615 &len, BFUSB_BLOCK_TIMEOUT);
616 if (err < 0) {
618 BT_ERR("Error in null packet request"); 617 BT_ERR("Error in null packet request");
619 goto error; 618 goto error;
620 } 619 }
621 620
622 pipe = usb_sndctrlpipe(bfusb->udev, 0); 621 pipe = usb_sndctrlpipe(data->udev, 0);
623 622
624 if ((err = usb_control_msg(bfusb->udev, pipe, USB_REQ_SET_CONFIGURATION, 623 err = usb_control_msg(data->udev, pipe, USB_REQ_SET_CONFIGURATION,
625 0, 2, 0, NULL, 0, USB_CTRL_SET_TIMEOUT)) < 0) { 624 0, 2, 0, NULL, 0, USB_CTRL_SET_TIMEOUT);
625 if (err < 0) {
626 BT_ERR("Can't change to running configuration"); 626 BT_ERR("Can't change to running configuration");
627 goto error; 627 goto error;
628 } 628 }
629 629
630 bfusb->udev->toggle[0] = bfusb->udev->toggle[1] = 0; 630 data->udev->toggle[0] = data->udev->toggle[1] = 0;
631 631
632 BT_INFO("BlueFRITZ! USB device ready"); 632 BT_INFO("BlueFRITZ! USB device ready");
633 633
@@ -637,9 +637,9 @@ static int bfusb_load_firmware(struct bfusb *bfusb, unsigned char *firmware, int
637error: 637error:
638 kfree(buf); 638 kfree(buf);
639 639
640 pipe = usb_sndctrlpipe(bfusb->udev, 0); 640 pipe = usb_sndctrlpipe(data->udev, 0);
641 641
642 usb_control_msg(bfusb->udev, pipe, USB_REQ_SET_CONFIGURATION, 642 usb_control_msg(data->udev, pipe, USB_REQ_SET_CONFIGURATION,
643 0, 0, 0, NULL, 0, USB_CTRL_SET_TIMEOUT); 643 0, 0, 0, NULL, 0, USB_CTRL_SET_TIMEOUT);
644 644
645 return err; 645 return err;
@@ -652,7 +652,7 @@ static int bfusb_probe(struct usb_interface *intf, const struct usb_device_id *i
652 struct usb_host_endpoint *bulk_out_ep; 652 struct usb_host_endpoint *bulk_out_ep;
653 struct usb_host_endpoint *bulk_in_ep; 653 struct usb_host_endpoint *bulk_in_ep;
654 struct hci_dev *hdev; 654 struct hci_dev *hdev;
655 struct bfusb *bfusb; 655 struct bfusb_data *data;
656 656
657 BT_DBG("intf %p id %p", intf, id); 657 BT_DBG("intf %p id %p", intf, id);
658 658
@@ -672,23 +672,24 @@ static int bfusb_probe(struct usb_interface *intf, const struct usb_device_id *i
672 } 672 }
673 673
674 /* Initialize control structure and load firmware */ 674 /* Initialize control structure and load firmware */
675 if (!(bfusb = kzalloc(sizeof(struct bfusb), GFP_KERNEL))) { 675 data = kzalloc(sizeof(struct bfusb_data), GFP_KERNEL);
676 if (!data) {
676 BT_ERR("Can't allocate memory for control structure"); 677 BT_ERR("Can't allocate memory for control structure");
677 goto done; 678 goto done;
678 } 679 }
679 680
680 bfusb->udev = udev; 681 data->udev = udev;
681 bfusb->bulk_in_ep = bulk_in_ep->desc.bEndpointAddress; 682 data->bulk_in_ep = bulk_in_ep->desc.bEndpointAddress;
682 bfusb->bulk_out_ep = bulk_out_ep->desc.bEndpointAddress; 683 data->bulk_out_ep = bulk_out_ep->desc.bEndpointAddress;
683 bfusb->bulk_pkt_size = le16_to_cpu(bulk_out_ep->desc.wMaxPacketSize); 684 data->bulk_pkt_size = le16_to_cpu(bulk_out_ep->desc.wMaxPacketSize);
684 685
685 rwlock_init(&bfusb->lock); 686 rwlock_init(&data->lock);
686 687
687 bfusb->reassembly = NULL; 688 data->reassembly = NULL;
688 689
689 skb_queue_head_init(&bfusb->transmit_q); 690 skb_queue_head_init(&data->transmit_q);
690 skb_queue_head_init(&bfusb->pending_q); 691 skb_queue_head_init(&data->pending_q);
691 skb_queue_head_init(&bfusb->completed_q); 692 skb_queue_head_init(&data->completed_q);
692 693
693 if (request_firmware(&firmware, "bfubase.frm", &udev->dev) < 0) { 694 if (request_firmware(&firmware, "bfubase.frm", &udev->dev) < 0) {
694 BT_ERR("Firmware request failed"); 695 BT_ERR("Firmware request failed");
@@ -697,7 +698,7 @@ static int bfusb_probe(struct usb_interface *intf, const struct usb_device_id *i
697 698
698 BT_DBG("firmware data %p size %d", firmware->data, firmware->size); 699 BT_DBG("firmware data %p size %d", firmware->data, firmware->size);
699 700
700 if (bfusb_load_firmware(bfusb, firmware->data, firmware->size) < 0) { 701 if (bfusb_load_firmware(data, firmware->data, firmware->size) < 0) {
701 BT_ERR("Firmware loading failed"); 702 BT_ERR("Firmware loading failed");
702 goto release; 703 goto release;
703 } 704 }
@@ -711,10 +712,10 @@ static int bfusb_probe(struct usb_interface *intf, const struct usb_device_id *i
711 goto error; 712 goto error;
712 } 713 }
713 714
714 bfusb->hdev = hdev; 715 data->hdev = hdev;
715 716
716 hdev->type = HCI_USB; 717 hdev->type = HCI_USB;
717 hdev->driver_data = bfusb; 718 hdev->driver_data = data;
718 SET_HCIDEV_DEV(hdev, &intf->dev); 719 SET_HCIDEV_DEV(hdev, &intf->dev);
719 720
720 hdev->open = bfusb_open; 721 hdev->open = bfusb_open;
@@ -732,7 +733,7 @@ static int bfusb_probe(struct usb_interface *intf, const struct usb_device_id *i
732 goto error; 733 goto error;
733 } 734 }
734 735
735 usb_set_intfdata(intf, bfusb); 736 usb_set_intfdata(intf, data);
736 737
737 return 0; 738 return 0;
738 739
@@ -740,7 +741,7 @@ release:
740 release_firmware(firmware); 741 release_firmware(firmware);
741 742
742error: 743error:
743 kfree(bfusb); 744 kfree(data);
744 745
745done: 746done:
746 return -EIO; 747 return -EIO;
@@ -748,8 +749,8 @@ done:
748 749
749static void bfusb_disconnect(struct usb_interface *intf) 750static void bfusb_disconnect(struct usb_interface *intf)
750{ 751{
751 struct bfusb *bfusb = usb_get_intfdata(intf); 752 struct bfusb_data *data = usb_get_intfdata(intf);
752 struct hci_dev *hdev = bfusb->hdev; 753 struct hci_dev *hdev = data->hdev;
753 754
754 BT_DBG("intf %p", intf); 755 BT_DBG("intf %p", intf);
755 756
@@ -779,7 +780,8 @@ static int __init bfusb_init(void)
779 780
780 BT_INFO("BlueFRITZ! USB driver ver %s", VERSION); 781 BT_INFO("BlueFRITZ! USB driver ver %s", VERSION);
781 782
782 if ((err = usb_register(&bfusb_driver)) < 0) 783 err = usb_register(&bfusb_driver);
784 if (err < 0)
783 BT_ERR("Failed to register BlueFRITZ! USB driver"); 785 BT_ERR("Failed to register BlueFRITZ! USB driver");
784 786
785 return err; 787 return err;
diff --git a/drivers/bluetooth/hci_ldisc.c b/drivers/bluetooth/hci_ldisc.c
index 93ba25b7ea32..420b645c4c9f 100644
--- a/drivers/bluetooth/hci_ldisc.c
+++ b/drivers/bluetooth/hci_ldisc.c
@@ -241,15 +241,11 @@ static int hci_uart_send_frame(struct sk_buff *skb)
241 241
242static void hci_uart_destruct(struct hci_dev *hdev) 242static void hci_uart_destruct(struct hci_dev *hdev)
243{ 243{
244 struct hci_uart *hu;
245
246 if (!hdev) 244 if (!hdev)
247 return; 245 return;
248 246
249 BT_DBG("%s", hdev->name); 247 BT_DBG("%s", hdev->name);
250 248 kfree(hdev->driver_data);
251 hu = (struct hci_uart *) hdev->driver_data;
252 kfree(hu);
253} 249}
254 250
255/* ------ LDISC part ------ */ 251/* ------ LDISC part ------ */
@@ -272,7 +268,7 @@ static int hci_uart_tty_open(struct tty_struct *tty)
272 return -EEXIST; 268 return -EEXIST;
273 269
274 if (!(hu = kzalloc(sizeof(struct hci_uart), GFP_KERNEL))) { 270 if (!(hu = kzalloc(sizeof(struct hci_uart), GFP_KERNEL))) {
275 BT_ERR("Can't allocate controll structure"); 271 BT_ERR("Can't allocate control structure");
276 return -ENFILE; 272 return -ENFILE;
277 } 273 }
278 274
@@ -360,7 +356,7 @@ static void hci_uart_tty_wakeup(struct tty_struct *tty)
360 * 356 *
361 * Return Value: None 357 * Return Value: None
362 */ 358 */
363static void hci_uart_tty_receive(struct tty_struct *tty, const __u8 *data, char *flags, int count) 359static void hci_uart_tty_receive(struct tty_struct *tty, const u8 *data, char *flags, int count)
364{ 360{
365 struct hci_uart *hu = (void *)tty->disc_data; 361 struct hci_uart *hu = (void *)tty->disc_data;
366 362
@@ -375,7 +371,8 @@ static void hci_uart_tty_receive(struct tty_struct *tty, const __u8 *data, char
375 hu->hdev->stat.byte_rx += count; 371 hu->hdev->stat.byte_rx += count;
376 spin_unlock(&hu->rx_lock); 372 spin_unlock(&hu->rx_lock);
377 373
378 if (test_and_clear_bit(TTY_THROTTLED,&tty->flags) && tty->driver->unthrottle) 374 if (test_and_clear_bit(TTY_THROTTLED, &tty->flags) &&
375 tty->driver->unthrottle)
379 tty->driver->unthrottle(tty); 376 tty->driver->unthrottle(tty);
380} 377}
381 378
diff --git a/drivers/bluetooth/hci_usb.c b/drivers/bluetooth/hci_usb.c
index e2d4beac7420..0801af4ad2b9 100644
--- a/drivers/bluetooth/hci_usb.c
+++ b/drivers/bluetooth/hci_usb.c
@@ -96,6 +96,9 @@ static struct usb_device_id bluetooth_ids[] = {
96 /* Ericsson with non-standard id */ 96 /* Ericsson with non-standard id */
97 { USB_DEVICE(0x0bdb, 0x1002) }, 97 { USB_DEVICE(0x0bdb, 0x1002) },
98 98
99 /* Canyon CN-BTU1 with HID interfaces */
100 { USB_DEVICE(0x0c10, 0x0000), .driver_info = HCI_RESET },
101
99 { } /* Terminating entry */ 102 { } /* Terminating entry */
100}; 103};
101 104
diff --git a/drivers/bluetooth/hci_vhci.c b/drivers/bluetooth/hci_vhci.c
index aac67a3a6019..a278d98a9151 100644
--- a/drivers/bluetooth/hci_vhci.c
+++ b/drivers/bluetooth/hci_vhci.c
@@ -2,9 +2,9 @@
2 * 2 *
3 * Bluetooth virtual HCI driver 3 * Bluetooth virtual HCI driver
4 * 4 *
5 * Copyright (C) 2000-2001 Qualcomm Incorporated 5 * Copyright (C) 2000-2001 Qualcomm Incorporated
6 * Copyright (C) 2002-2003 Maxim Krasnyansky <maxk@qualcomm.com> 6 * Copyright (C) 2002-2003 Maxim Krasnyansky <maxk@qualcomm.com>
7 * Copyright (C) 2004-2005 Marcel Holtmann <marcel@holtmann.org> 7 * Copyright (C) 2004-2006 Marcel Holtmann <marcel@holtmann.org>
8 * 8 *
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
@@ -72,21 +72,21 @@ static int vhci_open_dev(struct hci_dev *hdev)
72 72
73static int vhci_close_dev(struct hci_dev *hdev) 73static int vhci_close_dev(struct hci_dev *hdev)
74{ 74{
75 struct vhci_data *vhci = hdev->driver_data; 75 struct vhci_data *data = hdev->driver_data;
76 76
77 if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags)) 77 if (!test_and_clear_bit(HCI_RUNNING, &hdev->flags))
78 return 0; 78 return 0;
79 79
80 skb_queue_purge(&vhci->readq); 80 skb_queue_purge(&data->readq);
81 81
82 return 0; 82 return 0;
83} 83}
84 84
85static int vhci_flush(struct hci_dev *hdev) 85static int vhci_flush(struct hci_dev *hdev)
86{ 86{
87 struct vhci_data *vhci = hdev->driver_data; 87 struct vhci_data *data = hdev->driver_data;
88 88
89 skb_queue_purge(&vhci->readq); 89 skb_queue_purge(&data->readq);
90 90
91 return 0; 91 return 0;
92} 92}
@@ -94,7 +94,7 @@ static int vhci_flush(struct hci_dev *hdev)
94static int vhci_send_frame(struct sk_buff *skb) 94static int vhci_send_frame(struct sk_buff *skb)
95{ 95{
96 struct hci_dev* hdev = (struct hci_dev *) skb->dev; 96 struct hci_dev* hdev = (struct hci_dev *) skb->dev;
97 struct vhci_data *vhci; 97 struct vhci_data *data;
98 98
99 if (!hdev) { 99 if (!hdev) {
100 BT_ERR("Frame for unknown HCI device (hdev=NULL)"); 100 BT_ERR("Frame for unknown HCI device (hdev=NULL)");
@@ -104,15 +104,15 @@ static int vhci_send_frame(struct sk_buff *skb)
104 if (!test_bit(HCI_RUNNING, &hdev->flags)) 104 if (!test_bit(HCI_RUNNING, &hdev->flags))
105 return -EBUSY; 105 return -EBUSY;
106 106
107 vhci = hdev->driver_data; 107 data = hdev->driver_data;
108 108
109 memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1); 109 memcpy(skb_push(skb, 1), &bt_cb(skb)->pkt_type, 1);
110 skb_queue_tail(&vhci->readq, skb); 110 skb_queue_tail(&data->readq, skb);
111 111
112 if (vhci->flags & VHCI_FASYNC) 112 if (data->flags & VHCI_FASYNC)
113 kill_fasync(&vhci->fasync, SIGIO, POLL_IN); 113 kill_fasync(&data->fasync, SIGIO, POLL_IN);
114 114
115 wake_up_interruptible(&vhci->read_wait); 115 wake_up_interruptible(&data->read_wait);
116 116
117 return 0; 117 return 0;
118} 118}
@@ -122,7 +122,7 @@ static void vhci_destruct(struct hci_dev *hdev)
122 kfree(hdev->driver_data); 122 kfree(hdev->driver_data);
123} 123}
124 124
125static inline ssize_t vhci_get_user(struct vhci_data *vhci, 125static inline ssize_t vhci_get_user(struct vhci_data *data,
126 const char __user *buf, size_t count) 126 const char __user *buf, size_t count)
127{ 127{
128 struct sk_buff *skb; 128 struct sk_buff *skb;
@@ -139,7 +139,7 @@ static inline ssize_t vhci_get_user(struct vhci_data *vhci,
139 return -EFAULT; 139 return -EFAULT;
140 } 140 }
141 141
142 skb->dev = (void *) vhci->hdev; 142 skb->dev = (void *) data->hdev;
143 bt_cb(skb)->pkt_type = *((__u8 *) skb->data); 143 bt_cb(skb)->pkt_type = *((__u8 *) skb->data);
144 skb_pull(skb, 1); 144 skb_pull(skb, 1);
145 145
@@ -148,7 +148,7 @@ static inline ssize_t vhci_get_user(struct vhci_data *vhci,
148 return count; 148 return count;
149} 149}
150 150
151static inline ssize_t vhci_put_user(struct vhci_data *vhci, 151static inline ssize_t vhci_put_user(struct vhci_data *data,
152 struct sk_buff *skb, char __user *buf, int count) 152 struct sk_buff *skb, char __user *buf, int count)
153{ 153{
154 char __user *ptr = buf; 154 char __user *ptr = buf;
@@ -161,42 +161,43 @@ static inline ssize_t vhci_put_user(struct vhci_data *vhci,
161 161
162 total += len; 162 total += len;
163 163
164 vhci->hdev->stat.byte_tx += len; 164 data->hdev->stat.byte_tx += len;
165 165
166 switch (bt_cb(skb)->pkt_type) { 166 switch (bt_cb(skb)->pkt_type) {
167 case HCI_COMMAND_PKT: 167 case HCI_COMMAND_PKT:
168 vhci->hdev->stat.cmd_tx++; 168 data->hdev->stat.cmd_tx++;
169 break; 169 break;
170 170
171 case HCI_ACLDATA_PKT: 171 case HCI_ACLDATA_PKT:
172 vhci->hdev->stat.acl_tx++; 172 data->hdev->stat.acl_tx++;
173 break; 173 break;
174 174
175 case HCI_SCODATA_PKT: 175 case HCI_SCODATA_PKT:
176 vhci->hdev->stat.cmd_tx++; 176 data->hdev->stat.cmd_tx++;
177 break; 177 break;
178 }; 178 };
179 179
180 return total; 180 return total;
181} 181}
182 182
183static loff_t vhci_llseek(struct file * file, loff_t offset, int origin) 183static loff_t vhci_llseek(struct file *file, loff_t offset, int origin)
184{ 184{
185 return -ESPIPE; 185 return -ESPIPE;
186} 186}
187 187
188static ssize_t vhci_read(struct file * file, char __user * buf, size_t count, loff_t *pos) 188static ssize_t vhci_read(struct file *file,
189 char __user *buf, size_t count, loff_t *pos)
189{ 190{
190 DECLARE_WAITQUEUE(wait, current); 191 DECLARE_WAITQUEUE(wait, current);
191 struct vhci_data *vhci = file->private_data; 192 struct vhci_data *data = file->private_data;
192 struct sk_buff *skb; 193 struct sk_buff *skb;
193 ssize_t ret = 0; 194 ssize_t ret = 0;
194 195
195 add_wait_queue(&vhci->read_wait, &wait); 196 add_wait_queue(&data->read_wait, &wait);
196 while (count) { 197 while (count) {
197 set_current_state(TASK_INTERRUPTIBLE); 198 set_current_state(TASK_INTERRUPTIBLE);
198 199
199 skb = skb_dequeue(&vhci->readq); 200 skb = skb_dequeue(&data->readq);
200 if (!skb) { 201 if (!skb) {
201 if (file->f_flags & O_NONBLOCK) { 202 if (file->f_flags & O_NONBLOCK) {
202 ret = -EAGAIN; 203 ret = -EAGAIN;
@@ -213,7 +214,7 @@ static ssize_t vhci_read(struct file * file, char __user * buf, size_t count, lo
213 } 214 }
214 215
215 if (access_ok(VERIFY_WRITE, buf, count)) 216 if (access_ok(VERIFY_WRITE, buf, count))
216 ret = vhci_put_user(vhci, skb, buf, count); 217 ret = vhci_put_user(data, skb, buf, count);
217 else 218 else
218 ret = -EFAULT; 219 ret = -EFAULT;
219 220
@@ -221,7 +222,7 @@ static ssize_t vhci_read(struct file * file, char __user * buf, size_t count, lo
221 break; 222 break;
222 } 223 }
223 set_current_state(TASK_RUNNING); 224 set_current_state(TASK_RUNNING);
224 remove_wait_queue(&vhci->read_wait, &wait); 225 remove_wait_queue(&data->read_wait, &wait);
225 226
226 return ret; 227 return ret;
227} 228}
@@ -229,21 +230,21 @@ static ssize_t vhci_read(struct file * file, char __user * buf, size_t count, lo
229static ssize_t vhci_write(struct file *file, 230static ssize_t vhci_write(struct file *file,
230 const char __user *buf, size_t count, loff_t *pos) 231 const char __user *buf, size_t count, loff_t *pos)
231{ 232{
232 struct vhci_data *vhci = file->private_data; 233 struct vhci_data *data = file->private_data;
233 234
234 if (!access_ok(VERIFY_READ, buf, count)) 235 if (!access_ok(VERIFY_READ, buf, count))
235 return -EFAULT; 236 return -EFAULT;
236 237
237 return vhci_get_user(vhci, buf, count); 238 return vhci_get_user(data, buf, count);
238} 239}
239 240
240static unsigned int vhci_poll(struct file *file, poll_table *wait) 241static unsigned int vhci_poll(struct file *file, poll_table *wait)
241{ 242{
242 struct vhci_data *vhci = file->private_data; 243 struct vhci_data *data = file->private_data;
243 244
244 poll_wait(file, &vhci->read_wait, wait); 245 poll_wait(file, &data->read_wait, wait);
245 246
246 if (!skb_queue_empty(&vhci->readq)) 247 if (!skb_queue_empty(&data->readq))
247 return POLLIN | POLLRDNORM; 248 return POLLIN | POLLRDNORM;
248 249
249 return POLLOUT | POLLWRNORM; 250 return POLLOUT | POLLWRNORM;
@@ -257,26 +258,26 @@ static int vhci_ioctl(struct inode *inode, struct file *file,
257 258
258static int vhci_open(struct inode *inode, struct file *file) 259static int vhci_open(struct inode *inode, struct file *file)
259{ 260{
260 struct vhci_data *vhci; 261 struct vhci_data *data;
261 struct hci_dev *hdev; 262 struct hci_dev *hdev;
262 263
263 vhci = kzalloc(sizeof(struct vhci_data), GFP_KERNEL); 264 data = kzalloc(sizeof(struct vhci_data), GFP_KERNEL);
264 if (!vhci) 265 if (!data)
265 return -ENOMEM; 266 return -ENOMEM;
266 267
267 skb_queue_head_init(&vhci->readq); 268 skb_queue_head_init(&data->readq);
268 init_waitqueue_head(&vhci->read_wait); 269 init_waitqueue_head(&data->read_wait);
269 270
270 hdev = hci_alloc_dev(); 271 hdev = hci_alloc_dev();
271 if (!hdev) { 272 if (!hdev) {
272 kfree(vhci); 273 kfree(data);
273 return -ENOMEM; 274 return -ENOMEM;
274 } 275 }
275 276
276 vhci->hdev = hdev; 277 data->hdev = hdev;
277 278
278 hdev->type = HCI_VHCI; 279 hdev->type = HCI_VIRTUAL;
279 hdev->driver_data = vhci; 280 hdev->driver_data = data;
280 281
281 hdev->open = vhci_open_dev; 282 hdev->open = vhci_open_dev;
282 hdev->close = vhci_close_dev; 283 hdev->close = vhci_close_dev;
@@ -288,20 +289,20 @@ static int vhci_open(struct inode *inode, struct file *file)
288 289
289 if (hci_register_dev(hdev) < 0) { 290 if (hci_register_dev(hdev) < 0) {
290 BT_ERR("Can't register HCI device"); 291 BT_ERR("Can't register HCI device");
291 kfree(vhci); 292 kfree(data);
292 hci_free_dev(hdev); 293 hci_free_dev(hdev);
293 return -EBUSY; 294 return -EBUSY;
294 } 295 }
295 296
296 file->private_data = vhci; 297 file->private_data = data;
297 298
298 return nonseekable_open(inode, file); 299 return nonseekable_open(inode, file);
299} 300}
300 301
301static int vhci_release(struct inode *inode, struct file *file) 302static int vhci_release(struct inode *inode, struct file *file)
302{ 303{
303 struct vhci_data *vhci = file->private_data; 304 struct vhci_data *data = file->private_data;
304 struct hci_dev *hdev = vhci->hdev; 305 struct hci_dev *hdev = data->hdev;
305 306
306 if (hci_unregister_dev(hdev) < 0) { 307 if (hci_unregister_dev(hdev) < 0) {
307 BT_ERR("Can't unregister HCI device %s", hdev->name); 308 BT_ERR("Can't unregister HCI device %s", hdev->name);
@@ -316,17 +317,17 @@ static int vhci_release(struct inode *inode, struct file *file)
316 317
317static int vhci_fasync(int fd, struct file *file, int on) 318static int vhci_fasync(int fd, struct file *file, int on)
318{ 319{
319 struct vhci_data *vhci = file->private_data; 320 struct vhci_data *data = file->private_data;
320 int err; 321 int err;
321 322
322 err = fasync_helper(fd, file, on, &vhci->fasync); 323 err = fasync_helper(fd, file, on, &data->fasync);
323 if (err < 0) 324 if (err < 0)
324 return err; 325 return err;
325 326
326 if (on) 327 if (on)
327 vhci->flags |= VHCI_FASYNC; 328 data->flags |= VHCI_FASYNC;
328 else 329 else
329 vhci->flags &= ~VHCI_FASYNC; 330 data->flags &= ~VHCI_FASYNC;
330 331
331 return 0; 332 return 0;
332} 333}
diff --git a/drivers/infiniband/core/addr.c b/drivers/infiniband/core/addr.c
index 9cbf09e2052f..60d3fbdd216c 100644
--- a/drivers/infiniband/core/addr.c
+++ b/drivers/infiniband/core/addr.c
@@ -86,7 +86,7 @@ EXPORT_SYMBOL(rdma_copy_addr);
86int rdma_translate_ip(struct sockaddr *addr, struct rdma_dev_addr *dev_addr) 86int rdma_translate_ip(struct sockaddr *addr, struct rdma_dev_addr *dev_addr)
87{ 87{
88 struct net_device *dev; 88 struct net_device *dev;
89 u32 ip = ((struct sockaddr_in *) addr)->sin_addr.s_addr; 89 __be32 ip = ((struct sockaddr_in *) addr)->sin_addr.s_addr;
90 int ret; 90 int ret;
91 91
92 dev = ip_dev_find(ip); 92 dev = ip_dev_find(ip);
@@ -239,7 +239,7 @@ static int addr_resolve_local(struct sockaddr_in *src_in,
239{ 239{
240 struct net_device *dev; 240 struct net_device *dev;
241 u32 src_ip = src_in->sin_addr.s_addr; 241 u32 src_ip = src_in->sin_addr.s_addr;
242 u32 dst_ip = dst_in->sin_addr.s_addr; 242 __be32 dst_ip = dst_in->sin_addr.s_addr;
243 int ret; 243 int ret;
244 244
245 dev = ip_dev_find(dst_ip); 245 dev = ip_dev_find(dst_ip);
diff --git a/drivers/isdn/i4l/isdn_net.c b/drivers/isdn/i4l/isdn_net.c
index 43da8ae1b2ad..1f8d6ae66b41 100644
--- a/drivers/isdn/i4l/isdn_net.c
+++ b/drivers/isdn/i4l/isdn_net.c
@@ -1614,8 +1614,8 @@ isdn_net_ciscohdlck_slarp_send_reply(isdn_net_local *lp)
1614 struct sk_buff *skb; 1614 struct sk_buff *skb;
1615 unsigned char *p; 1615 unsigned char *p;
1616 struct in_device *in_dev = NULL; 1616 struct in_device *in_dev = NULL;
1617 u32 addr = 0; /* local ipv4 address */ 1617 __be32 addr = 0; /* local ipv4 address */
1618 u32 mask = 0; /* local netmask */ 1618 __be32 mask = 0; /* local netmask */
1619 1619
1620 if ((in_dev = lp->netdev->dev.ip_ptr) != NULL) { 1620 if ((in_dev = lp->netdev->dev.ip_ptr) != NULL) {
1621 /* take primary(first) address of interface */ 1621 /* take primary(first) address of interface */
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 63154774c257..ff8a8c0a26d5 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -24,6 +24,9 @@ config NETDEVICES
24 24
25 If unsure, say Y. 25 If unsure, say Y.
26 26
27# All the following symbols are dependent on NETDEVICES - do not repeat
28# that for each of the symbols.
29if NETDEVICES
27 30
28config IFB 31config IFB
29 tristate "Intermediate Functional Block support" 32 tristate "Intermediate Functional Block support"
@@ -2852,6 +2855,8 @@ config NETCONSOLE
2852 If you want to log kernel messages over the network, enable this. 2855 If you want to log kernel messages over the network, enable this.
2853 See <file:Documentation/networking/netconsole.txt> for details. 2856 See <file:Documentation/networking/netconsole.txt> for details.
2854 2857
2858endif #NETDEVICES
2859
2855config NETPOLL 2860config NETPOLL
2856 def_bool NETCONSOLE 2861 def_bool NETCONSOLE
2857 2862
diff --git a/drivers/net/appletalk/ipddp.c b/drivers/net/appletalk/ipddp.c
index 7f7dd450226a..b98592a8bac8 100644
--- a/drivers/net/appletalk/ipddp.c
+++ b/drivers/net/appletalk/ipddp.c
@@ -145,9 +145,7 @@ static int ipddp_xmit(struct sk_buff *skb, struct net_device *dev)
145 145
146 /* Create the Extended DDP header */ 146 /* Create the Extended DDP header */
147 ddp = (struct ddpehdr *)skb->data; 147 ddp = (struct ddpehdr *)skb->data;
148 ddp->deh_len = skb->len; 148 ddp->deh_len_hops = htons(skb->len + (1<<10));
149 ddp->deh_hops = 1;
150 ddp->deh_pad = 0;
151 ddp->deh_sum = 0; 149 ddp->deh_sum = 0;
152 150
153 /* 151 /*
@@ -170,7 +168,6 @@ static int ipddp_xmit(struct sk_buff *skb, struct net_device *dev)
170 ddp->deh_sport = 72; 168 ddp->deh_sport = 72;
171 169
172 *((__u8 *)(ddp+1)) = 22; /* ddp type = IP */ 170 *((__u8 *)(ddp+1)) = 22; /* ddp type = IP */
173 *((__u16 *)ddp)=ntohs(*((__u16 *)ddp)); /* fix up length field */
174 171
175 skb->protocol = htons(ETH_P_ATALK); /* Protocol has changed */ 172 skb->protocol = htons(ETH_P_ATALK); /* Protocol has changed */
176 173
diff --git a/drivers/net/bonding/bond_main.c b/drivers/net/bonding/bond_main.c
index 0fb5f653d3ce..c0bbddae4ec4 100644
--- a/drivers/net/bonding/bond_main.c
+++ b/drivers/net/bonding/bond_main.c
@@ -2252,7 +2252,7 @@ static u32 bond_glean_dev_ip(struct net_device *dev)
2252{ 2252{
2253 struct in_device *idev; 2253 struct in_device *idev;
2254 struct in_ifaddr *ifa; 2254 struct in_ifaddr *ifa;
2255 u32 addr = 0; 2255 __be32 addr = 0;
2256 2256
2257 if (!dev) 2257 if (!dev)
2258 return 0; 2258 return 0;
diff --git a/drivers/net/irda/Kconfig b/drivers/net/irda/Kconfig
index e9e6d99a9add..7c8ccc09b601 100644
--- a/drivers/net/irda/Kconfig
+++ b/drivers/net/irda/Kconfig
@@ -287,6 +287,7 @@ comment "FIR device drivers"
287config USB_IRDA 287config USB_IRDA
288 tristate "IrDA USB dongles" 288 tristate "IrDA USB dongles"
289 depends on IRDA && USB 289 depends on IRDA && USB
290 select FW_LOADER
290 ---help--- 291 ---help---
291 Say Y here if you want to build support for the USB IrDA FIR Dongle 292 Say Y here if you want to build support for the USB IrDA FIR Dongle
292 device driver. To compile it as a module, choose M here: the module 293 device driver. To compile it as a module, choose M here: the module
diff --git a/drivers/net/irda/nsc-ircc.c b/drivers/net/irda/nsc-ircc.c
index cb62f2a9676a..7185a4ee3c1e 100644
--- a/drivers/net/irda/nsc-ircc.c
+++ b/drivers/net/irda/nsc-ircc.c
@@ -110,7 +110,7 @@ static nsc_chip_t chips[] = {
110 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8, 110 { "PC87338", { 0x398, 0x15c, 0x2e }, 0x08, 0xb0, 0xf8,
111 nsc_ircc_probe_338, nsc_ircc_init_338 }, 111 nsc_ircc_probe_338, nsc_ircc_init_338 },
112 /* Contributed by Steffen Pingel - IBM X40 */ 112 /* Contributed by Steffen Pingel - IBM X40 */
113 { "PC8738x", { 0x164e, 0x4e, 0x0 }, 0x20, 0xf4, 0xff, 113 { "PC8738x", { 0x164e, 0x4e, 0x2e }, 0x20, 0xf4, 0xff,
114 nsc_ircc_probe_39x, nsc_ircc_init_39x }, 114 nsc_ircc_probe_39x, nsc_ircc_init_39x },
115 /* Contributed by Jan Frey - IBM A30/A31 */ 115 /* Contributed by Jan Frey - IBM A30/A31 */
116 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff, 116 { "PC8739x", { 0x2e, 0x4e, 0x0 }, 0x20, 0xea, 0xff,
diff --git a/drivers/net/irda/smsc-ircc2.c b/drivers/net/irda/smsc-ircc2.c
index 2eff45bedc7c..22358ff68c4c 100644
--- a/drivers/net/irda/smsc-ircc2.c
+++ b/drivers/net/irda/smsc-ircc2.c
@@ -2354,6 +2354,26 @@ static int __init smsc_superio_lpc(unsigned short cfg_base)
2354#define PCIID_VENDOR_INTEL 0x8086 2354#define PCIID_VENDOR_INTEL 0x8086
2355#define PCIID_VENDOR_ALI 0x10b9 2355#define PCIID_VENDOR_ALI 0x10b9
2356static struct smsc_ircc_subsystem_configuration subsystem_configurations[] __initdata = { 2356static struct smsc_ircc_subsystem_configuration subsystem_configurations[] __initdata = {
2357 /*
2358 * Subsystems needing entries:
2359 * 0x10b9:0x1533 0x103c:0x0850 HP nx9010 family
2360 * 0x10b9:0x1533 0x0e11:0x005a Compaq nc4000 family
2361 * 0x8086:0x24cc 0x0e11:0x002a HP nx9000 family
2362 */
2363 {
2364 /* Guessed entry */
2365 .vendor = PCIID_VENDOR_INTEL, /* Intel 82801DBM LPC bridge */
2366 .device = 0x24cc,
2367 .subvendor = 0x103c,
2368 .subdevice = 0x08bc,
2369 .sir_io = 0x02f8,
2370 .fir_io = 0x0130,
2371 .fir_irq = 0x05,
2372 .fir_dma = 0x03,
2373 .cfg_base = 0x004e,
2374 .preconfigure = preconfigure_through_82801,
2375 .name = "HP nx5000 family",
2376 },
2357 { 2377 {
2358 .vendor = PCIID_VENDOR_INTEL, /* Intel 82801DBM LPC bridge */ 2378 .vendor = PCIID_VENDOR_INTEL, /* Intel 82801DBM LPC bridge */
2359 .device = 0x24cc, 2379 .device = 0x24cc,
@@ -2366,7 +2386,7 @@ static struct smsc_ircc_subsystem_configuration subsystem_configurations[] __ini
2366 .fir_dma = 0x03, 2386 .fir_dma = 0x03,
2367 .cfg_base = 0x004e, 2387 .cfg_base = 0x004e,
2368 .preconfigure = preconfigure_through_82801, 2388 .preconfigure = preconfigure_through_82801,
2369 .name = "HP nc8000", 2389 .name = "HP nc8000 family",
2370 }, 2390 },
2371 { 2391 {
2372 .vendor = PCIID_VENDOR_INTEL, /* Intel 82801DBM LPC bridge */ 2392 .vendor = PCIID_VENDOR_INTEL, /* Intel 82801DBM LPC bridge */
@@ -2379,7 +2399,21 @@ static struct smsc_ircc_subsystem_configuration subsystem_configurations[] __ini
2379 .fir_dma = 0x03, 2399 .fir_dma = 0x03,
2380 .cfg_base = 0x004e, 2400 .cfg_base = 0x004e,
2381 .preconfigure = preconfigure_through_82801, 2401 .preconfigure = preconfigure_through_82801,
2382 .name = "HP nc6000", 2402 .name = "HP nc6000 family",
2403 },
2404 {
2405 .vendor = PCIID_VENDOR_INTEL, /* Intel 82801DBM LPC bridge */
2406 .device = 0x24cc,
2407 .subvendor = 0x0e11,
2408 .subdevice = 0x0860,
2409 /* I assume these are the same for x1000 as for the others */
2410 .sir_io = 0x02e8,
2411 .fir_io = 0x02f8,
2412 .fir_irq = 0x07,
2413 .fir_dma = 0x03,
2414 .cfg_base = 0x002e,
2415 .preconfigure = preconfigure_through_82801,
2416 .name = "Compaq x1000 family",
2383 }, 2417 },
2384 { 2418 {
2385 /* Intel 82801DB/DBL (ICH4/ICH4-L) LPC Interface Bridge */ 2419 /* Intel 82801DB/DBL (ICH4/ICH4-L) LPC Interface Bridge */
diff --git a/drivers/net/irda/stir4200.c b/drivers/net/irda/stir4200.c
index d61b208b52a2..12103c93f7ef 100644
--- a/drivers/net/irda/stir4200.c
+++ b/drivers/net/irda/stir4200.c
@@ -149,8 +149,6 @@ enum StirFifoCtlMask {
149 FIFOCTL_DIR = 0x10, 149 FIFOCTL_DIR = 0x10,
150 FIFOCTL_CLR = 0x08, 150 FIFOCTL_CLR = 0x08,
151 FIFOCTL_EMPTY = 0x04, 151 FIFOCTL_EMPTY = 0x04,
152 FIFOCTL_RXERR = 0x02,
153 FIFOCTL_TXERR = 0x01,
154}; 152};
155 153
156enum StirDiagMask { 154enum StirDiagMask {
@@ -615,19 +613,6 @@ static int fifo_txwait(struct stir_cb *stir, int space)
615 613
616 pr_debug("fifo status 0x%lx count %lu\n", status, count); 614 pr_debug("fifo status 0x%lx count %lu\n", status, count);
617 615
618 /* error when receive/transmit fifo gets confused */
619 if (status & FIFOCTL_RXERR) {
620 stir->stats.rx_fifo_errors++;
621 stir->stats.rx_errors++;
622 break;
623 }
624
625 if (status & FIFOCTL_TXERR) {
626 stir->stats.tx_fifo_errors++;
627 stir->stats.tx_errors++;
628 break;
629 }
630
631 /* is fifo receiving already, or empty */ 616 /* is fifo receiving already, or empty */
632 if (!(status & FIFOCTL_DIR) 617 if (!(status & FIFOCTL_DIR)
633 || (status & FIFOCTL_EMPTY)) 618 || (status & FIFOCTL_EMPTY))
diff --git a/drivers/net/irda/via-ircc.c b/drivers/net/irda/via-ircc.c
index 79b85f327500..d916e1257c47 100644
--- a/drivers/net/irda/via-ircc.c
+++ b/drivers/net/irda/via-ircc.c
@@ -1223,8 +1223,13 @@ static int upload_rxdata(struct via_ircc_cb *self, int iobase)
1223 1223
1224 IRDA_DEBUG(2, "%s(): len=%x\n", __FUNCTION__, len); 1224 IRDA_DEBUG(2, "%s(): len=%x\n", __FUNCTION__, len);
1225 1225
1226 if ((len - 4) < 2) {
1227 self->stats.rx_dropped++;
1228 return FALSE;
1229 }
1230
1226 skb = dev_alloc_skb(len + 1); 1231 skb = dev_alloc_skb(len + 1);
1227 if ((skb == NULL) || ((len - 4) < 2)) { 1232 if (skb == NULL) {
1228 self->stats.rx_dropped++; 1233 self->stats.rx_dropped++;
1229 return FALSE; 1234 return FALSE;
1230 } 1235 }
diff --git a/drivers/net/loopback.c b/drivers/net/loopback.c
index f429b19bf620..4178b4b1d2df 100644
--- a/drivers/net/loopback.c
+++ b/drivers/net/loopback.c
@@ -161,15 +161,13 @@ static int loopback_xmit(struct sk_buff *skb, struct net_device *dev)
161 return(0); 161 return(0);
162} 162}
163 163
164static struct net_device_stats loopback_stats;
165
164static struct net_device_stats *get_stats(struct net_device *dev) 166static struct net_device_stats *get_stats(struct net_device *dev)
165{ 167{
166 struct net_device_stats *stats = dev->priv; 168 struct net_device_stats *stats = &loopback_stats;
167 int i; 169 int i;
168 170
169 if (!stats) {
170 return NULL;
171 }
172
173 memset(stats, 0, sizeof(struct net_device_stats)); 171 memset(stats, 0, sizeof(struct net_device_stats));
174 172
175 for_each_possible_cpu(i) { 173 for_each_possible_cpu(i) {
@@ -185,19 +183,28 @@ static struct net_device_stats *get_stats(struct net_device *dev)
185 return stats; 183 return stats;
186} 184}
187 185
188static u32 loopback_get_link(struct net_device *dev) 186static u32 always_on(struct net_device *dev)
189{ 187{
190 return 1; 188 return 1;
191} 189}
192 190
193static const struct ethtool_ops loopback_ethtool_ops = { 191static const struct ethtool_ops loopback_ethtool_ops = {
194 .get_link = loopback_get_link, 192 .get_link = always_on,
195 .get_tso = ethtool_op_get_tso, 193 .get_tso = ethtool_op_get_tso,
196 .set_tso = ethtool_op_set_tso, 194 .set_tso = ethtool_op_set_tso,
195 .get_tx_csum = always_on,
196 .get_sg = always_on,
197 .get_rx_csum = always_on,
197}; 198};
198 199
200/*
201 * The loopback device is special. There is only one instance and
202 * it is statically allocated. Don't do this for other devices.
203 */
199struct net_device loopback_dev = { 204struct net_device loopback_dev = {
200 .name = "lo", 205 .name = "lo",
206 .get_stats = &get_stats,
207 .priv = &loopback_stats,
201 .mtu = (16 * 1024) + 20 + 20 + 12, 208 .mtu = (16 * 1024) + 20 + 20 + 12,
202 .hard_start_xmit = loopback_xmit, 209 .hard_start_xmit = loopback_xmit,
203 .hard_header = eth_header, 210 .hard_header = eth_header,
@@ -221,16 +228,6 @@ struct net_device loopback_dev = {
221/* Setup and register the loopback device. */ 228/* Setup and register the loopback device. */
222int __init loopback_init(void) 229int __init loopback_init(void)
223{ 230{
224 struct net_device_stats *stats;
225
226 /* Can survive without statistics */
227 stats = kmalloc(sizeof(struct net_device_stats), GFP_KERNEL);
228 if (stats) {
229 memset(stats, 0, sizeof(struct net_device_stats));
230 loopback_dev.priv = stats;
231 loopback_dev.get_stats = &get_stats;
232 }
233
234 return register_netdev(&loopback_dev); 231 return register_netdev(&loopback_dev);
235}; 232};
236 233
diff --git a/drivers/net/pppoe.c b/drivers/net/pppoe.c
index 5666ed998142..0adee733b761 100644
--- a/drivers/net/pppoe.c
+++ b/drivers/net/pppoe.c
@@ -600,6 +600,7 @@ static int pppoe_connect(struct socket *sock, struct sockaddr *uservaddr,
600 po->chan.hdrlen = (sizeof(struct pppoe_hdr) + 600 po->chan.hdrlen = (sizeof(struct pppoe_hdr) +
601 dev->hard_header_len); 601 dev->hard_header_len);
602 602
603 po->chan.mtu = dev->mtu - sizeof(struct pppoe_hdr);
603 po->chan.private = sk; 604 po->chan.private = sk;
604 po->chan.ops = &pppoe_chan_ops; 605 po->chan.ops = &pppoe_chan_ops;
605 606
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index aaf45b907a78..c25ba273b745 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -68,8 +68,8 @@
68 68
69#define DRV_MODULE_NAME "tg3" 69#define DRV_MODULE_NAME "tg3"
70#define PFX DRV_MODULE_NAME ": " 70#define PFX DRV_MODULE_NAME ": "
71#define DRV_MODULE_VERSION "3.65" 71#define DRV_MODULE_VERSION "3.66"
72#define DRV_MODULE_RELDATE "August 07, 2006" 72#define DRV_MODULE_RELDATE "September 23, 2006"
73 73
74#define TG3_DEF_MAC_MODE 0 74#define TG3_DEF_MAC_MODE 0
75#define TG3_DEF_RX_MODE 0 75#define TG3_DEF_RX_MODE 0
@@ -173,6 +173,7 @@ static struct pci_device_id tg3_pci_tbl[] = {
173 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5705F)}, 173 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5705F)},
174 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5720)}, 174 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5720)},
175 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5721)}, 175 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5721)},
176 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5722)},
176 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5750)}, 177 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5750)},
177 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751)}, 178 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5751)},
178 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5750M)}, 179 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5750M)},
@@ -187,6 +188,7 @@ static struct pci_device_id tg3_pci_tbl[] = {
187 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754M)}, 188 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5754M)},
188 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755)}, 189 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755)},
189 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755M)}, 190 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5755M)},
191 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5756)},
190 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5786)}, 192 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5786)},
191 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787)}, 193 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787)},
192 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787M)}, 194 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5787M)},
@@ -197,6 +199,8 @@ static struct pci_device_id tg3_pci_tbl[] = {
197 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780)}, 199 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780)},
198 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S)}, 200 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5780S)},
199 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781)}, 201 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5781)},
202 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906)},
203 {PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, PCI_DEVICE_ID_TIGON3_5906M)},
200 {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)}, 204 {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9DXX)},
201 {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9MXX)}, 205 {PCI_DEVICE(PCI_VENDOR_ID_SYSKONNECT, PCI_DEVICE_ID_SYSKONNECT_9MXX)},
202 {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1000)}, 206 {PCI_DEVICE(PCI_VENDOR_ID_ALTIMA, PCI_DEVICE_ID_ALTIMA_AC1000)},
@@ -424,6 +428,16 @@ static void tg3_write32_tx_mbox(struct tg3 *tp, u32 off, u32 val)
424 readl(mbox); 428 readl(mbox);
425} 429}
426 430
431static u32 tg3_read32_mbox_5906(struct tg3 *tp, u32 off)
432{
433 return (readl(tp->regs + off + GRCMBOX_BASE));
434}
435
436static void tg3_write32_mbox_5906(struct tg3 *tp, u32 off, u32 val)
437{
438 writel(val, tp->regs + off + GRCMBOX_BASE);
439}
440
427#define tw32_mailbox(reg, val) tp->write32_mbox(tp, reg, val) 441#define tw32_mailbox(reg, val) tp->write32_mbox(tp, reg, val)
428#define tw32_mailbox_f(reg, val) tw32_mailbox_flush(tp, (reg), (val)) 442#define tw32_mailbox_f(reg, val) tw32_mailbox_flush(tp, (reg), (val))
429#define tw32_rx_mbox(reg, val) tp->write32_rx_mbox(tp, reg, val) 443#define tw32_rx_mbox(reg, val) tp->write32_rx_mbox(tp, reg, val)
@@ -439,6 +453,10 @@ static void tg3_write_mem(struct tg3 *tp, u32 off, u32 val)
439{ 453{
440 unsigned long flags; 454 unsigned long flags;
441 455
456 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) &&
457 (off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC))
458 return;
459
442 spin_lock_irqsave(&tp->indirect_lock, flags); 460 spin_lock_irqsave(&tp->indirect_lock, flags);
443 if (tp->tg3_flags & TG3_FLAG_SRAM_USE_CONFIG) { 461 if (tp->tg3_flags & TG3_FLAG_SRAM_USE_CONFIG) {
444 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off); 462 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
@@ -460,6 +478,12 @@ static void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val)
460{ 478{
461 unsigned long flags; 479 unsigned long flags;
462 480
481 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) &&
482 (off >= NIC_SRAM_STATS_BLK) && (off < NIC_SRAM_TX_BUFFER_DESC)) {
483 *val = 0;
484 return;
485 }
486
463 spin_lock_irqsave(&tp->indirect_lock, flags); 487 spin_lock_irqsave(&tp->indirect_lock, flags);
464 if (tp->tg3_flags & TG3_FLAG_SRAM_USE_CONFIG) { 488 if (tp->tg3_flags & TG3_FLAG_SRAM_USE_CONFIG) {
465 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off); 489 pci_write_config_dword(tp->pdev, TG3PCI_MEM_WIN_BASE_ADDR, off);
@@ -489,6 +513,9 @@ static inline void tg3_cond_int(struct tg3 *tp)
489 if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) && 513 if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS) &&
490 (tp->hw_status->status & SD_STATUS_UPDATED)) 514 (tp->hw_status->status & SD_STATUS_UPDATED))
491 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl | GRC_LCLCTRL_SETINT); 515 tw32(GRC_LOCAL_CTRL, tp->grc_local_ctrl | GRC_LCLCTRL_SETINT);
516 else
517 tw32(HOSTCC_MODE, tp->coalesce_mode |
518 (HOSTCC_MODE_ENABLE | HOSTCC_MODE_NOW));
492} 519}
493 520
494static void tg3_enable_ints(struct tg3 *tp) 521static void tg3_enable_ints(struct tg3 *tp)
@@ -654,6 +681,10 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val)
654 unsigned int loops; 681 unsigned int loops;
655 int ret; 682 int ret;
656 683
684 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 &&
685 (reg == MII_TG3_CTRL || reg == MII_TG3_AUX_CTRL))
686 return 0;
687
657 if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) { 688 if ((tp->mi_mode & MAC_MI_MODE_AUTO_POLL) != 0) {
658 tw32_f(MAC_MI_MODE, 689 tw32_f(MAC_MI_MODE,
659 (tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL)); 690 (tp->mi_mode & ~MAC_MI_MODE_AUTO_POLL));
@@ -1004,6 +1035,24 @@ out:
1004 phy_reg | MII_TG3_EXT_CTRL_FIFO_ELASTIC); 1035 phy_reg | MII_TG3_EXT_CTRL_FIFO_ELASTIC);
1005 } 1036 }
1006 1037
1038 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
1039 u32 phy_reg;
1040
1041 /* adjust output voltage */
1042 tg3_writephy(tp, MII_TG3_EPHY_PTEST, 0x12);
1043
1044 if (!tg3_readphy(tp, MII_TG3_EPHY_TEST, &phy_reg)) {
1045 u32 phy_reg2;
1046
1047 tg3_writephy(tp, MII_TG3_EPHY_TEST,
1048 phy_reg | MII_TG3_EPHY_SHADOW_EN);
1049 /* Enable auto-MDIX */
1050 if (!tg3_readphy(tp, 0x10, &phy_reg2))
1051 tg3_writephy(tp, 0x10, phy_reg2 | 0x4000);
1052 tg3_writephy(tp, MII_TG3_EPHY_TEST, phy_reg);
1053 }
1054 }
1055
1007 tg3_phy_set_wirespeed(tp); 1056 tg3_phy_set_wirespeed(tp);
1008 return 0; 1057 return 0;
1009} 1058}
@@ -1117,6 +1166,15 @@ static void tg3_nvram_unlock(struct tg3 *);
1117 1166
1118static void tg3_power_down_phy(struct tg3 *tp) 1167static void tg3_power_down_phy(struct tg3 *tp)
1119{ 1168{
1169 if (tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)
1170 return;
1171
1172 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) {
1173 tg3_writephy(tp, MII_TG3_EXT_CTRL,
1174 MII_TG3_EXT_CTRL_FORCE_LED_OFF);
1175 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x01b2);
1176 }
1177
1120 /* The PHY should not be powered down on some chips because 1178 /* The PHY should not be powered down on some chips because
1121 * of bugs. 1179 * of bugs.
1122 */ 1180 */
@@ -1199,7 +1257,12 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
1199 tg3_setup_phy(tp, 0); 1257 tg3_setup_phy(tp, 0);
1200 } 1258 }
1201 1259
1202 if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) { 1260 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
1261 u32 val;
1262
1263 val = tr32(GRC_VCPU_EXT_CTRL);
1264 tw32(GRC_VCPU_EXT_CTRL, val | GRC_VCPU_EXT_CTRL_DISABLE_WOL);
1265 } else if (!(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) {
1203 int i; 1266 int i;
1204 u32 val; 1267 u32 val;
1205 1268
@@ -1223,7 +1286,10 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
1223 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x5a); 1286 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x5a);
1224 udelay(40); 1287 udelay(40);
1225 1288
1226 mac_mode = MAC_MODE_PORT_MODE_MII; 1289 if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
1290 mac_mode = MAC_MODE_PORT_MODE_GMII;
1291 else
1292 mac_mode = MAC_MODE_PORT_MODE_MII;
1227 1293
1228 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 || 1294 if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5700 ||
1229 !(tp->tg3_flags & TG3_FLAG_WOL_SPEED_100MB)) 1295 !(tp->tg3_flags & TG3_FLAG_WOL_SPEED_100MB))
@@ -1301,15 +1367,8 @@ static int tg3_set_power_state(struct tg3 *tp, pci_power_t state)
1301 } 1367 }
1302 1368
1303 if (!(tp->tg3_flags & TG3_FLAG_WOL_ENABLE) && 1369 if (!(tp->tg3_flags & TG3_FLAG_WOL_ENABLE) &&
1304 !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF)) { 1370 !(tp->tg3_flags & TG3_FLAG_ENABLE_ASF))
1305 /* Turn off the PHY */ 1371 tg3_power_down_phy(tp);
1306 if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) {
1307 tg3_writephy(tp, MII_TG3_EXT_CTRL,
1308 MII_TG3_EXT_CTRL_FORCE_LED_OFF);
1309 tg3_writephy(tp, MII_TG3_AUX_CTRL, 0x01b2);
1310 tg3_power_down_phy(tp);
1311 }
1312 }
1313 1372
1314 tg3_frob_aux_power(tp); 1373 tg3_frob_aux_power(tp);
1315 1374
@@ -1467,6 +1526,13 @@ static void tg3_aux_stat_to_speed_duplex(struct tg3 *tp, u32 val, u16 *speed, u8
1467 break; 1526 break;
1468 1527
1469 default: 1528 default:
1529 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
1530 *speed = (val & MII_TG3_AUX_STAT_100) ? SPEED_100 :
1531 SPEED_10;
1532 *duplex = (val & MII_TG3_AUX_STAT_FULL) ? DUPLEX_FULL :
1533 DUPLEX_HALF;
1534 break;
1535 }
1470 *speed = SPEED_INVALID; 1536 *speed = SPEED_INVALID;
1471 *duplex = DUPLEX_INVALID; 1537 *duplex = DUPLEX_INVALID;
1472 break; 1538 break;
@@ -1749,7 +1815,7 @@ static int tg3_setup_copper_phy(struct tg3 *tp, int force_reset)
1749 1815
1750 if (tp->tg3_flags & TG3_FLAG_USE_MI_INTERRUPT) 1816 if (tp->tg3_flags & TG3_FLAG_USE_MI_INTERRUPT)
1751 tg3_writephy(tp, MII_TG3_IMASK, ~MII_TG3_INT_LINKCHG); 1817 tg3_writephy(tp, MII_TG3_IMASK, ~MII_TG3_INT_LINKCHG);
1752 else 1818 else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)
1753 tg3_writephy(tp, MII_TG3_IMASK, ~0); 1819 tg3_writephy(tp, MII_TG3_IMASK, ~0);
1754 1820
1755 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 || 1821 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5700 ||
@@ -2406,24 +2472,27 @@ static int tg3_setup_fiber_hw_autoneg(struct tg3 *tp, u32 mac_status)
2406 expected_sg_dig_ctrl |= (1 << 12); 2472 expected_sg_dig_ctrl |= (1 << 12);
2407 2473
2408 if (sg_dig_ctrl != expected_sg_dig_ctrl) { 2474 if (sg_dig_ctrl != expected_sg_dig_ctrl) {
2475 if ((tp->tg3_flags2 & TG3_FLG2_PARALLEL_DETECT) &&
2476 tp->serdes_counter &&
2477 ((mac_status & (MAC_STATUS_PCS_SYNCED |
2478 MAC_STATUS_RCVD_CFG)) ==
2479 MAC_STATUS_PCS_SYNCED)) {
2480 tp->serdes_counter--;
2481 current_link_up = 1;
2482 goto out;
2483 }
2484restart_autoneg:
2409 if (workaround) 2485 if (workaround)
2410 tw32_f(MAC_SERDES_CFG, serdes_cfg | 0xc011000); 2486 tw32_f(MAC_SERDES_CFG, serdes_cfg | 0xc011000);
2411 tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl | (1 << 30)); 2487 tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl | (1 << 30));
2412 udelay(5); 2488 udelay(5);
2413 tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl); 2489 tw32_f(SG_DIG_CTRL, expected_sg_dig_ctrl);
2414 2490
2415 tp->tg3_flags2 |= TG3_FLG2_PHY_JUST_INITTED; 2491 tp->serdes_counter = SERDES_AN_TIMEOUT_5704S;
2492 tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
2416 } else if (mac_status & (MAC_STATUS_PCS_SYNCED | 2493 } else if (mac_status & (MAC_STATUS_PCS_SYNCED |
2417 MAC_STATUS_SIGNAL_DET)) { 2494 MAC_STATUS_SIGNAL_DET)) {
2418 int i; 2495 sg_dig_status = tr32(SG_DIG_STATUS);
2419
2420 /* Giver time to negotiate (~200ms) */
2421 for (i = 0; i < 40000; i++) {
2422 sg_dig_status = tr32(SG_DIG_STATUS);
2423 if (sg_dig_status & (0x3))
2424 break;
2425 udelay(5);
2426 }
2427 mac_status = tr32(MAC_STATUS); 2496 mac_status = tr32(MAC_STATUS);
2428 2497
2429 if ((sg_dig_status & (1 << 1)) && 2498 if ((sg_dig_status & (1 << 1)) &&
@@ -2439,10 +2508,11 @@ static int tg3_setup_fiber_hw_autoneg(struct tg3 *tp, u32 mac_status)
2439 2508
2440 tg3_setup_flow_control(tp, local_adv, remote_adv); 2509 tg3_setup_flow_control(tp, local_adv, remote_adv);
2441 current_link_up = 1; 2510 current_link_up = 1;
2442 tp->tg3_flags2 &= ~TG3_FLG2_PHY_JUST_INITTED; 2511 tp->serdes_counter = 0;
2512 tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
2443 } else if (!(sg_dig_status & (1 << 1))) { 2513 } else if (!(sg_dig_status & (1 << 1))) {
2444 if (tp->tg3_flags2 & TG3_FLG2_PHY_JUST_INITTED) 2514 if (tp->serdes_counter)
2445 tp->tg3_flags2 &= ~TG3_FLG2_PHY_JUST_INITTED; 2515 tp->serdes_counter--;
2446 else { 2516 else {
2447 if (workaround) { 2517 if (workaround) {
2448 u32 val = serdes_cfg; 2518 u32 val = serdes_cfg;
@@ -2466,9 +2536,17 @@ static int tg3_setup_fiber_hw_autoneg(struct tg3 *tp, u32 mac_status)
2466 !(mac_status & MAC_STATUS_RCVD_CFG)) { 2536 !(mac_status & MAC_STATUS_RCVD_CFG)) {
2467 tg3_setup_flow_control(tp, 0, 0); 2537 tg3_setup_flow_control(tp, 0, 0);
2468 current_link_up = 1; 2538 current_link_up = 1;
2469 } 2539 tp->tg3_flags2 |=
2540 TG3_FLG2_PARALLEL_DETECT;
2541 tp->serdes_counter =
2542 SERDES_PARALLEL_DET_TIMEOUT;
2543 } else
2544 goto restart_autoneg;
2470 } 2545 }
2471 } 2546 }
2547 } else {
2548 tp->serdes_counter = SERDES_AN_TIMEOUT_5704S;
2549 tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
2472 } 2550 }
2473 2551
2474out: 2552out:
@@ -2599,14 +2677,16 @@ static int tg3_setup_fiber_phy(struct tg3 *tp, int force_reset)
2599 MAC_STATUS_CFG_CHANGED)); 2677 MAC_STATUS_CFG_CHANGED));
2600 udelay(5); 2678 udelay(5);
2601 if ((tr32(MAC_STATUS) & (MAC_STATUS_SYNC_CHANGED | 2679 if ((tr32(MAC_STATUS) & (MAC_STATUS_SYNC_CHANGED |
2602 MAC_STATUS_CFG_CHANGED)) == 0) 2680 MAC_STATUS_CFG_CHANGED |
2681 MAC_STATUS_LNKSTATE_CHANGED)) == 0)
2603 break; 2682 break;
2604 } 2683 }
2605 2684
2606 mac_status = tr32(MAC_STATUS); 2685 mac_status = tr32(MAC_STATUS);
2607 if ((mac_status & MAC_STATUS_PCS_SYNCED) == 0) { 2686 if ((mac_status & MAC_STATUS_PCS_SYNCED) == 0) {
2608 current_link_up = 0; 2687 current_link_up = 0;
2609 if (tp->link_config.autoneg == AUTONEG_ENABLE) { 2688 if (tp->link_config.autoneg == AUTONEG_ENABLE &&
2689 tp->serdes_counter == 0) {
2610 tw32_f(MAC_MODE, (tp->mac_mode | 2690 tw32_f(MAC_MODE, (tp->mac_mode |
2611 MAC_MODE_SEND_CONFIGS)); 2691 MAC_MODE_SEND_CONFIGS));
2612 udelay(1); 2692 udelay(1);
@@ -2711,7 +2791,7 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
2711 tg3_writephy(tp, MII_BMCR, bmcr); 2791 tg3_writephy(tp, MII_BMCR, bmcr);
2712 2792
2713 tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED); 2793 tw32_f(MAC_EVENT, MAC_EVENT_LNKSTATE_CHANGED);
2714 tp->tg3_flags2 |= TG3_FLG2_PHY_JUST_INITTED; 2794 tp->serdes_counter = SERDES_AN_TIMEOUT_5714S;
2715 tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT; 2795 tp->tg3_flags2 &= ~TG3_FLG2_PARALLEL_DETECT;
2716 2796
2717 return err; 2797 return err;
@@ -2816,9 +2896,9 @@ static int tg3_setup_fiber_mii_phy(struct tg3 *tp, int force_reset)
2816 2896
2817static void tg3_serdes_parallel_detect(struct tg3 *tp) 2897static void tg3_serdes_parallel_detect(struct tg3 *tp)
2818{ 2898{
2819 if (tp->tg3_flags2 & TG3_FLG2_PHY_JUST_INITTED) { 2899 if (tp->serdes_counter) {
2820 /* Give autoneg time to complete. */ 2900 /* Give autoneg time to complete. */
2821 tp->tg3_flags2 &= ~TG3_FLG2_PHY_JUST_INITTED; 2901 tp->serdes_counter--;
2822 return; 2902 return;
2823 } 2903 }
2824 if (!netif_carrier_ok(tp->dev) && 2904 if (!netif_carrier_ok(tp->dev) &&
@@ -3535,8 +3615,7 @@ static irqreturn_t tg3_test_isr(int irq, void *dev_id,
3535 3615
3536 if ((sblk->status & SD_STATUS_UPDATED) || 3616 if ((sblk->status & SD_STATUS_UPDATED) ||
3537 !(tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) { 3617 !(tr32(TG3PCI_PCISTATE) & PCISTATE_INT_NOT_ACTIVE)) {
3538 tw32_mailbox(MAILBOX_INTERRUPT_0 + TG3_64BIT_REG_LOW, 3618 tg3_disable_ints(tp);
3539 0x00000001);
3540 return IRQ_RETVAL(1); 3619 return IRQ_RETVAL(1);
3541 } 3620 }
3542 return IRQ_RETVAL(0); 3621 return IRQ_RETVAL(0);
@@ -4644,6 +4723,44 @@ static void tg3_write_sig_legacy(struct tg3 *tp, int kind)
4644 } 4723 }
4645} 4724}
4646 4725
4726static int tg3_poll_fw(struct tg3 *tp)
4727{
4728 int i;
4729 u32 val;
4730
4731 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
4732 for (i = 0; i < 400; i++) {
4733 if (tr32(VCPU_STATUS) & VCPU_STATUS_INIT_DONE)
4734 return 0;
4735 udelay(10);
4736 }
4737 return -ENODEV;
4738 }
4739
4740 /* Wait for firmware initialization to complete. */
4741 for (i = 0; i < 100000; i++) {
4742 tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val);
4743 if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1)
4744 break;
4745 udelay(10);
4746 }
4747
4748 /* Chip might not be fitted with firmware. Some Sun onboard
4749 * parts are configured like that. So don't signal the timeout
4750 * of the above loop as an error, but do report the lack of
4751 * running firmware once.
4752 */
4753 if (i >= 100000 &&
4754 !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) {
4755 tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED;
4756
4757 printk(KERN_INFO PFX "%s: No firmware running.\n",
4758 tp->dev->name);
4759 }
4760
4761 return 0;
4762}
4763
4647static void tg3_stop_fw(struct tg3 *); 4764static void tg3_stop_fw(struct tg3 *);
4648 4765
4649/* tp->lock is held. */ 4766/* tp->lock is held. */
@@ -4651,7 +4768,7 @@ static int tg3_chip_reset(struct tg3 *tp)
4651{ 4768{
4652 u32 val; 4769 u32 val;
4653 void (*write_op)(struct tg3 *, u32, u32); 4770 void (*write_op)(struct tg3 *, u32, u32);
4654 int i; 4771 int err;
4655 4772
4656 tg3_nvram_lock(tp); 4773 tg3_nvram_lock(tp);
4657 4774
@@ -4688,6 +4805,12 @@ static int tg3_chip_reset(struct tg3 *tp)
4688 } 4805 }
4689 } 4806 }
4690 4807
4808 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
4809 tw32(VCPU_STATUS, tr32(VCPU_STATUS) | VCPU_STATUS_DRV_RESET);
4810 tw32(GRC_VCPU_EXT_CTRL,
4811 tr32(GRC_VCPU_EXT_CTRL) & ~GRC_VCPU_EXT_CTRL_HALT_CPU);
4812 }
4813
4691 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) 4814 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)
4692 val |= GRC_MISC_CFG_KEEP_GPHY_POWER; 4815 val |= GRC_MISC_CFG_KEEP_GPHY_POWER;
4693 tw32(GRC_MISC_CFG, val); 4816 tw32(GRC_MISC_CFG, val);
@@ -4811,26 +4934,9 @@ static int tg3_chip_reset(struct tg3 *tp)
4811 tw32_f(MAC_MODE, 0); 4934 tw32_f(MAC_MODE, 0);
4812 udelay(40); 4935 udelay(40);
4813 4936
4814 /* Wait for firmware initialization to complete. */ 4937 err = tg3_poll_fw(tp);
4815 for (i = 0; i < 100000; i++) { 4938 if (err)
4816 tg3_read_mem(tp, NIC_SRAM_FIRMWARE_MBOX, &val); 4939 return err;
4817 if (val == ~NIC_SRAM_FIRMWARE_MBOX_MAGIC1)
4818 break;
4819 udelay(10);
4820 }
4821
4822 /* Chip might not be fitted with firmare. Some Sun onboard
4823 * parts are configured like that. So don't signal the timeout
4824 * of the above loop as an error, but do report the lack of
4825 * running firmware once.
4826 */
4827 if (i >= 100000 &&
4828 !(tp->tg3_flags2 & TG3_FLG2_NO_FWARE_REPORTED)) {
4829 tp->tg3_flags2 |= TG3_FLG2_NO_FWARE_REPORTED;
4830
4831 printk(KERN_INFO PFX "%s: No firmware running.\n",
4832 tp->dev->name);
4833 }
4834 4940
4835 if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) && 4941 if ((tp->tg3_flags2 & TG3_FLG2_PCI_EXPRESS) &&
4836 tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) { 4942 tp->pci_chip_rev_id != CHIPREV_ID_5750_A0) {
@@ -5036,6 +5142,12 @@ static int tg3_halt_cpu(struct tg3 *tp, u32 offset)
5036 BUG_ON(offset == TX_CPU_BASE && 5142 BUG_ON(offset == TX_CPU_BASE &&
5037 (tp->tg3_flags2 & TG3_FLG2_5705_PLUS)); 5143 (tp->tg3_flags2 & TG3_FLG2_5705_PLUS));
5038 5144
5145 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
5146 u32 val = tr32(GRC_VCPU_EXT_CTRL);
5147
5148 tw32(GRC_VCPU_EXT_CTRL, val | GRC_VCPU_EXT_CTRL_HALT_CPU);
5149 return 0;
5150 }
5039 if (offset == RX_CPU_BASE) { 5151 if (offset == RX_CPU_BASE) {
5040 for (i = 0; i < 10000; i++) { 5152 for (i = 0; i < 10000; i++) {
5041 tw32(offset + CPU_STATE, 0xffffffff); 5153 tw32(offset + CPU_STATE, 0xffffffff);
@@ -6040,6 +6152,13 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6040 val = 1; 6152 val = 1;
6041 else if (val > tp->rx_std_max_post) 6153 else if (val > tp->rx_std_max_post)
6042 val = tp->rx_std_max_post; 6154 val = tp->rx_std_max_post;
6155 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
6156 if (tp->pci_chip_rev_id == CHIPREV_ID_5906_A1)
6157 tw32(ISO_PKT_TX, (tr32(ISO_PKT_TX) & ~0x3) | 0x2);
6158
6159 if (val > (TG3_RX_INTERNAL_RING_SZ_5906 / 2))
6160 val = TG3_RX_INTERNAL_RING_SZ_5906 / 2;
6161 }
6043 6162
6044 tw32(RCVBDI_STD_THRESH, val); 6163 tw32(RCVBDI_STD_THRESH, val);
6045 6164
@@ -6460,7 +6579,8 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
6460 if (err) 6579 if (err)
6461 return err; 6580 return err;
6462 6581
6463 if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES)) { 6582 if (!(tp->tg3_flags2 & TG3_FLG2_PHY_SERDES) &&
6583 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906) {
6464 u32 tmp; 6584 u32 tmp;
6465 6585
6466 /* Clear CRC stats. */ 6586 /* Clear CRC stats. */
@@ -6660,12 +6780,14 @@ static void tg3_timer(unsigned long __opaque)
6660 need_setup = 1; 6780 need_setup = 1;
6661 } 6781 }
6662 if (need_setup) { 6782 if (need_setup) {
6663 tw32_f(MAC_MODE, 6783 if (!tp->serdes_counter) {
6664 (tp->mac_mode & 6784 tw32_f(MAC_MODE,
6665 ~MAC_MODE_PORT_MODE_MASK)); 6785 (tp->mac_mode &
6666 udelay(40); 6786 ~MAC_MODE_PORT_MODE_MASK));
6667 tw32_f(MAC_MODE, tp->mac_mode); 6787 udelay(40);
6668 udelay(40); 6788 tw32_f(MAC_MODE, tp->mac_mode);
6789 udelay(40);
6790 }
6669 tg3_setup_phy(tp, 0); 6791 tg3_setup_phy(tp, 0);
6670 } 6792 }
6671 } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) 6793 } else if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES)
@@ -6674,13 +6796,29 @@ static void tg3_timer(unsigned long __opaque)
6674 tp->timer_counter = tp->timer_multiplier; 6796 tp->timer_counter = tp->timer_multiplier;
6675 } 6797 }
6676 6798
6677 /* Heartbeat is only sent once every 2 seconds. */ 6799 /* Heartbeat is only sent once every 2 seconds.
6800 *
6801 * The heartbeat is to tell the ASF firmware that the host
6802 * driver is still alive. In the event that the OS crashes,
6803 * ASF needs to reset the hardware to free up the FIFO space
6804 * that may be filled with rx packets destined for the host.
6805 * If the FIFO is full, ASF will no longer function properly.
6806 *
6807 * Unintended resets have been reported on real time kernels
6808 * where the timer doesn't run on time. Netpoll will also have
6809 * same problem.
6810 *
6811 * The new FWCMD_NICDRV_ALIVE3 command tells the ASF firmware
6812 * to check the ring condition when the heartbeat is expiring
6813 * before doing the reset. This will prevent most unintended
6814 * resets.
6815 */
6678 if (!--tp->asf_counter) { 6816 if (!--tp->asf_counter) {
6679 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) { 6817 if (tp->tg3_flags & TG3_FLAG_ENABLE_ASF) {
6680 u32 val; 6818 u32 val;
6681 6819
6682 tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX, 6820 tg3_write_mem(tp, NIC_SRAM_FW_CMD_MBOX,
6683 FWCMD_NICDRV_ALIVE2); 6821 FWCMD_NICDRV_ALIVE3);
6684 tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4); 6822 tg3_write_mem(tp, NIC_SRAM_FW_CMD_LEN_MBOX, 4);
6685 /* 5 seconds timeout */ 6823 /* 5 seconds timeout */
6686 tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5); 6824 tg3_write_mem(tp, NIC_SRAM_FW_CMD_DATA_MBOX, 5);
@@ -6721,8 +6859,7 @@ static int tg3_request_irq(struct tg3 *tp)
6721static int tg3_test_interrupt(struct tg3 *tp) 6859static int tg3_test_interrupt(struct tg3 *tp)
6722{ 6860{
6723 struct net_device *dev = tp->dev; 6861 struct net_device *dev = tp->dev;
6724 int err, i; 6862 int err, i, intr_ok = 0;
6725 u32 int_mbox = 0;
6726 6863
6727 if (!netif_running(dev)) 6864 if (!netif_running(dev))
6728 return -ENODEV; 6865 return -ENODEV;
@@ -6743,10 +6880,18 @@ static int tg3_test_interrupt(struct tg3 *tp)
6743 HOSTCC_MODE_NOW); 6880 HOSTCC_MODE_NOW);
6744 6881
6745 for (i = 0; i < 5; i++) { 6882 for (i = 0; i < 5; i++) {
6883 u32 int_mbox, misc_host_ctrl;
6884
6746 int_mbox = tr32_mailbox(MAILBOX_INTERRUPT_0 + 6885 int_mbox = tr32_mailbox(MAILBOX_INTERRUPT_0 +
6747 TG3_64BIT_REG_LOW); 6886 TG3_64BIT_REG_LOW);
6748 if (int_mbox != 0) 6887 misc_host_ctrl = tr32(TG3PCI_MISC_HOST_CTRL);
6888
6889 if ((int_mbox != 0) ||
6890 (misc_host_ctrl & MISC_HOST_CTRL_MASK_PCI_INT)) {
6891 intr_ok = 1;
6749 break; 6892 break;
6893 }
6894
6750 msleep(10); 6895 msleep(10);
6751 } 6896 }
6752 6897
@@ -6759,7 +6904,7 @@ static int tg3_test_interrupt(struct tg3 *tp)
6759 if (err) 6904 if (err)
6760 return err; 6905 return err;
6761 6906
6762 if (int_mbox != 0) 6907 if (intr_ok)
6763 return 0; 6908 return 0;
6764 6909
6765 return -EIO; 6910 return -EIO;
@@ -6936,9 +7081,10 @@ static int tg3_open(struct net_device *dev)
6936 7081
6937 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) { 7082 if (tp->tg3_flags2 & TG3_FLG2_USING_MSI) {
6938 if (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI) { 7083 if (tp->tg3_flags2 & TG3_FLG2_1SHOT_MSI) {
6939 u32 val = tr32(0x7c04); 7084 u32 val = tr32(PCIE_TRANSACTION_CFG);
6940 7085
6941 tw32(0x7c04, val | (1 << 29)); 7086 tw32(PCIE_TRANSACTION_CFG,
7087 val | PCIE_TRANS_CFG_1SHOT_MSI);
6942 } 7088 }
6943 } 7089 }
6944 } 7090 }
@@ -7857,7 +8003,7 @@ static int tg3_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
7857 if (wol->wolopts & ~WAKE_MAGIC) 8003 if (wol->wolopts & ~WAKE_MAGIC)
7858 return -EINVAL; 8004 return -EINVAL;
7859 if ((wol->wolopts & WAKE_MAGIC) && 8005 if ((wol->wolopts & WAKE_MAGIC) &&
7860 tp->tg3_flags2 & TG3_FLG2_PHY_SERDES && 8006 tp->tg3_flags2 & TG3_FLG2_ANY_SERDES &&
7861 !(tp->tg3_flags & TG3_FLAG_SERDES_WOL_CAP)) 8007 !(tp->tg3_flags & TG3_FLAG_SERDES_WOL_CAP))
7862 return -EINVAL; 8008 return -EINVAL;
7863 8009
@@ -7893,7 +8039,8 @@ static int tg3_set_tso(struct net_device *dev, u32 value)
7893 return -EINVAL; 8039 return -EINVAL;
7894 return 0; 8040 return 0;
7895 } 8041 }
7896 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) { 8042 if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) &&
8043 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)) {
7897 if (value) 8044 if (value)
7898 dev->features |= NETIF_F_TSO6; 8045 dev->features |= NETIF_F_TSO6;
7899 else 8046 else
@@ -8147,6 +8294,8 @@ static void tg3_get_ethtool_stats (struct net_device *dev,
8147 8294
8148#define NVRAM_TEST_SIZE 0x100 8295#define NVRAM_TEST_SIZE 0x100
8149#define NVRAM_SELFBOOT_FORMAT1_SIZE 0x14 8296#define NVRAM_SELFBOOT_FORMAT1_SIZE 0x14
8297#define NVRAM_SELFBOOT_HW_SIZE 0x20
8298#define NVRAM_SELFBOOT_DATA_SIZE 0x1c
8150 8299
8151static int tg3_test_nvram(struct tg3 *tp) 8300static int tg3_test_nvram(struct tg3 *tp)
8152{ 8301{
@@ -8158,12 +8307,14 @@ static int tg3_test_nvram(struct tg3 *tp)
8158 8307
8159 if (magic == TG3_EEPROM_MAGIC) 8308 if (magic == TG3_EEPROM_MAGIC)
8160 size = NVRAM_TEST_SIZE; 8309 size = NVRAM_TEST_SIZE;
8161 else if ((magic & 0xff000000) == 0xa5000000) { 8310 else if ((magic & TG3_EEPROM_MAGIC_FW_MSK) == TG3_EEPROM_MAGIC_FW) {
8162 if ((magic & 0xe00000) == 0x200000) 8311 if ((magic & 0xe00000) == 0x200000)
8163 size = NVRAM_SELFBOOT_FORMAT1_SIZE; 8312 size = NVRAM_SELFBOOT_FORMAT1_SIZE;
8164 else 8313 else
8165 return 0; 8314 return 0;
8166 } else 8315 } else if ((magic & TG3_EEPROM_MAGIC_HW_MSK) == TG3_EEPROM_MAGIC_HW)
8316 size = NVRAM_SELFBOOT_HW_SIZE;
8317 else
8167 return -EIO; 8318 return -EIO;
8168 8319
8169 buf = kmalloc(size, GFP_KERNEL); 8320 buf = kmalloc(size, GFP_KERNEL);
@@ -8182,7 +8333,8 @@ static int tg3_test_nvram(struct tg3 *tp)
8182 goto out; 8333 goto out;
8183 8334
8184 /* Selfboot format */ 8335 /* Selfboot format */
8185 if (cpu_to_be32(buf[0]) != TG3_EEPROM_MAGIC) { 8336 if ((cpu_to_be32(buf[0]) & TG3_EEPROM_MAGIC_FW_MSK) ==
8337 TG3_EEPROM_MAGIC_FW) {
8186 u8 *buf8 = (u8 *) buf, csum8 = 0; 8338 u8 *buf8 = (u8 *) buf, csum8 = 0;
8187 8339
8188 for (i = 0; i < size; i++) 8340 for (i = 0; i < size; i++)
@@ -8197,6 +8349,51 @@ static int tg3_test_nvram(struct tg3 *tp)
8197 goto out; 8349 goto out;
8198 } 8350 }
8199 8351
8352 if ((cpu_to_be32(buf[0]) & TG3_EEPROM_MAGIC_HW_MSK) ==
8353 TG3_EEPROM_MAGIC_HW) {
8354 u8 data[NVRAM_SELFBOOT_DATA_SIZE];
8355 u8 parity[NVRAM_SELFBOOT_DATA_SIZE];
8356 u8 *buf8 = (u8 *) buf;
8357 int j, k;
8358
8359 /* Separate the parity bits and the data bytes. */
8360 for (i = 0, j = 0, k = 0; i < NVRAM_SELFBOOT_HW_SIZE; i++) {
8361 if ((i == 0) || (i == 8)) {
8362 int l;
8363 u8 msk;
8364
8365 for (l = 0, msk = 0x80; l < 7; l++, msk >>= 1)
8366 parity[k++] = buf8[i] & msk;
8367 i++;
8368 }
8369 else if (i == 16) {
8370 int l;
8371 u8 msk;
8372
8373 for (l = 0, msk = 0x20; l < 6; l++, msk >>= 1)
8374 parity[k++] = buf8[i] & msk;
8375 i++;
8376
8377 for (l = 0, msk = 0x80; l < 8; l++, msk >>= 1)
8378 parity[k++] = buf8[i] & msk;
8379 i++;
8380 }
8381 data[j++] = buf8[i];
8382 }
8383
8384 err = -EIO;
8385 for (i = 0; i < NVRAM_SELFBOOT_DATA_SIZE; i++) {
8386 u8 hw8 = hweight8(data[i]);
8387
8388 if ((hw8 & 0x1) && parity[i])
8389 goto out;
8390 else if (!(hw8 & 0x1) && !parity[i])
8391 goto out;
8392 }
8393 err = 0;
8394 goto out;
8395 }
8396
8200 /* Bootstrap checksum at offset 0x10 */ 8397 /* Bootstrap checksum at offset 0x10 */
8201 csum = calc_crc((unsigned char *) buf, 0x10); 8398 csum = calc_crc((unsigned char *) buf, 0x10);
8202 if(csum != cpu_to_le32(buf[0x10/4])) 8399 if(csum != cpu_to_le32(buf[0x10/4]))
@@ -8243,7 +8440,7 @@ static int tg3_test_link(struct tg3 *tp)
8243/* Only test the commonly used registers */ 8440/* Only test the commonly used registers */
8244static int tg3_test_registers(struct tg3 *tp) 8441static int tg3_test_registers(struct tg3 *tp)
8245{ 8442{
8246 int i, is_5705; 8443 int i, is_5705, is_5750;
8247 u32 offset, read_mask, write_mask, val, save_val, read_val; 8444 u32 offset, read_mask, write_mask, val, save_val, read_val;
8248 static struct { 8445 static struct {
8249 u16 offset; 8446 u16 offset;
@@ -8251,6 +8448,7 @@ static int tg3_test_registers(struct tg3 *tp)
8251#define TG3_FL_5705 0x1 8448#define TG3_FL_5705 0x1
8252#define TG3_FL_NOT_5705 0x2 8449#define TG3_FL_NOT_5705 0x2
8253#define TG3_FL_NOT_5788 0x4 8450#define TG3_FL_NOT_5788 0x4
8451#define TG3_FL_NOT_5750 0x8
8254 u32 read_mask; 8452 u32 read_mask;
8255 u32 write_mask; 8453 u32 write_mask;
8256 } reg_tbl[] = { 8454 } reg_tbl[] = {
@@ -8361,9 +8559,9 @@ static int tg3_test_registers(struct tg3 *tp)
8361 0xffffffff, 0x00000000 }, 8559 0xffffffff, 0x00000000 },
8362 8560
8363 /* Buffer Manager Control Registers. */ 8561 /* Buffer Manager Control Registers. */
8364 { BUFMGR_MB_POOL_ADDR, 0x0000, 8562 { BUFMGR_MB_POOL_ADDR, TG3_FL_NOT_5750,
8365 0x00000000, 0x007fff80 }, 8563 0x00000000, 0x007fff80 },
8366 { BUFMGR_MB_POOL_SIZE, 0x0000, 8564 { BUFMGR_MB_POOL_SIZE, TG3_FL_NOT_5750,
8367 0x00000000, 0x007fffff }, 8565 0x00000000, 0x007fffff },
8368 { BUFMGR_MB_RDMA_LOW_WATER, 0x0000, 8566 { BUFMGR_MB_RDMA_LOW_WATER, 0x0000,
8369 0x00000000, 0x0000003f }, 8567 0x00000000, 0x0000003f },
@@ -8389,10 +8587,12 @@ static int tg3_test_registers(struct tg3 *tp)
8389 { 0xffff, 0x0000, 0x00000000, 0x00000000 }, 8587 { 0xffff, 0x0000, 0x00000000, 0x00000000 },
8390 }; 8588 };
8391 8589
8392 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) 8590 is_5705 = is_5750 = 0;
8591 if (tp->tg3_flags2 & TG3_FLG2_5705_PLUS) {
8393 is_5705 = 1; 8592 is_5705 = 1;
8394 else 8593 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS)
8395 is_5705 = 0; 8594 is_5750 = 1;
8595 }
8396 8596
8397 for (i = 0; reg_tbl[i].offset != 0xffff; i++) { 8597 for (i = 0; reg_tbl[i].offset != 0xffff; i++) {
8398 if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705)) 8598 if (is_5705 && (reg_tbl[i].flags & TG3_FL_NOT_5705))
@@ -8405,6 +8605,9 @@ static int tg3_test_registers(struct tg3 *tp)
8405 (reg_tbl[i].flags & TG3_FL_NOT_5788)) 8605 (reg_tbl[i].flags & TG3_FL_NOT_5788))
8406 continue; 8606 continue;
8407 8607
8608 if (is_5750 && (reg_tbl[i].flags & TG3_FL_NOT_5750))
8609 continue;
8610
8408 offset = (u32) reg_tbl[i].offset; 8611 offset = (u32) reg_tbl[i].offset;
8409 read_mask = reg_tbl[i].read_mask; 8612 read_mask = reg_tbl[i].read_mask;
8410 write_mask = reg_tbl[i].write_mask; 8613 write_mask = reg_tbl[i].write_mask;
@@ -8496,6 +8699,13 @@ static int tg3_test_memory(struct tg3 *tp)
8496 { 0x00008000, 0x02000}, 8699 { 0x00008000, 0x02000},
8497 { 0x00010000, 0x0c000}, 8700 { 0x00010000, 0x0c000},
8498 { 0xffffffff, 0x00000} 8701 { 0xffffffff, 0x00000}
8702 }, mem_tbl_5906[] = {
8703 { 0x00000200, 0x00008},
8704 { 0x00004000, 0x00400},
8705 { 0x00006000, 0x00400},
8706 { 0x00008000, 0x01000},
8707 { 0x00010000, 0x01000},
8708 { 0xffffffff, 0x00000}
8499 }; 8709 };
8500 struct mem_entry *mem_tbl; 8710 struct mem_entry *mem_tbl;
8501 int err = 0; 8711 int err = 0;
@@ -8505,6 +8715,8 @@ static int tg3_test_memory(struct tg3 *tp)
8505 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 8715 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
8506 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 8716 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
8507 mem_tbl = mem_tbl_5755; 8717 mem_tbl = mem_tbl_5755;
8718 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
8719 mem_tbl = mem_tbl_5906;
8508 else 8720 else
8509 mem_tbl = mem_tbl_5705; 8721 mem_tbl = mem_tbl_5705;
8510 } else 8722 } else
@@ -8541,13 +8753,41 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
8541 return 0; 8753 return 0;
8542 8754
8543 mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) | 8755 mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
8544 MAC_MODE_PORT_INT_LPBACK | MAC_MODE_LINK_POLARITY | 8756 MAC_MODE_PORT_INT_LPBACK | MAC_MODE_LINK_POLARITY;
8545 MAC_MODE_PORT_MODE_GMII; 8757 if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
8758 mac_mode |= MAC_MODE_PORT_MODE_MII;
8759 else
8760 mac_mode |= MAC_MODE_PORT_MODE_GMII;
8546 tw32(MAC_MODE, mac_mode); 8761 tw32(MAC_MODE, mac_mode);
8547 } else if (loopback_mode == TG3_PHY_LOOPBACK) { 8762 } else if (loopback_mode == TG3_PHY_LOOPBACK) {
8548 tg3_writephy(tp, MII_BMCR, BMCR_LOOPBACK | BMCR_FULLDPLX | 8763 u32 val;
8549 BMCR_SPEED1000); 8764
8765 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
8766 u32 phytest;
8767
8768 if (!tg3_readphy(tp, MII_TG3_EPHY_TEST, &phytest)) {
8769 u32 phy;
8770
8771 tg3_writephy(tp, MII_TG3_EPHY_TEST,
8772 phytest | MII_TG3_EPHY_SHADOW_EN);
8773 if (!tg3_readphy(tp, 0x1b, &phy))
8774 tg3_writephy(tp, 0x1b, phy & ~0x20);
8775 if (!tg3_readphy(tp, 0x10, &phy))
8776 tg3_writephy(tp, 0x10, phy & ~0x4000);
8777 tg3_writephy(tp, MII_TG3_EPHY_TEST, phytest);
8778 }
8779 }
8780 val = BMCR_LOOPBACK | BMCR_FULLDPLX;
8781 if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
8782 val |= BMCR_SPEED100;
8783 else
8784 val |= BMCR_SPEED1000;
8785
8786 tg3_writephy(tp, MII_BMCR, val);
8550 udelay(40); 8787 udelay(40);
8788 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
8789 tg3_writephy(tp, MII_TG3_EPHY_PTEST, 0x1800);
8790
8551 /* reset to prevent losing 1st rx packet intermittently */ 8791 /* reset to prevent losing 1st rx packet intermittently */
8552 if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) { 8792 if (tp->tg3_flags2 & TG3_FLG2_MII_SERDES) {
8553 tw32_f(MAC_RX_MODE, RX_MODE_RESET); 8793 tw32_f(MAC_RX_MODE, RX_MODE_RESET);
@@ -8555,7 +8795,11 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
8555 tw32_f(MAC_RX_MODE, tp->rx_mode); 8795 tw32_f(MAC_RX_MODE, tp->rx_mode);
8556 } 8796 }
8557 mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) | 8797 mac_mode = (tp->mac_mode & ~MAC_MODE_PORT_MODE_MASK) |
8558 MAC_MODE_LINK_POLARITY | MAC_MODE_PORT_MODE_GMII; 8798 MAC_MODE_LINK_POLARITY;
8799 if (tp->tg3_flags & TG3_FLAG_10_100_ONLY)
8800 mac_mode |= MAC_MODE_PORT_MODE_MII;
8801 else
8802 mac_mode |= MAC_MODE_PORT_MODE_GMII;
8559 if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) { 8803 if ((tp->phy_id & PHY_ID_MASK) == PHY_ID_BCM5401) {
8560 mac_mode &= ~MAC_MODE_LINK_POLARITY; 8804 mac_mode &= ~MAC_MODE_LINK_POLARITY;
8561 tg3_writephy(tp, MII_TG3_EXT_CTRL, 8805 tg3_writephy(tp, MII_TG3_EXT_CTRL,
@@ -8604,7 +8848,8 @@ static int tg3_run_loopback(struct tg3 *tp, int loopback_mode)
8604 8848
8605 udelay(10); 8849 udelay(10);
8606 8850
8607 for (i = 0; i < 10; i++) { 8851 /* 250 usec to allow enough time on some 10/100 Mbps devices. */
8852 for (i = 0; i < 25; i++) {
8608 tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE | 8853 tw32_f(HOSTCC_MODE, tp->coalesce_mode | HOSTCC_MODE_ENABLE |
8609 HOSTCC_MODE_NOW); 8854 HOSTCC_MODE_NOW);
8610 8855
@@ -8956,7 +9201,9 @@ static void __devinit tg3_get_eeprom_size(struct tg3 *tp)
8956 if (tg3_nvram_read_swab(tp, 0, &magic) != 0) 9201 if (tg3_nvram_read_swab(tp, 0, &magic) != 0)
8957 return; 9202 return;
8958 9203
8959 if ((magic != TG3_EEPROM_MAGIC) && ((magic & 0xff000000) != 0xa5000000)) 9204 if ((magic != TG3_EEPROM_MAGIC) &&
9205 ((magic & TG3_EEPROM_MAGIC_FW_MSK) != TG3_EEPROM_MAGIC_FW) &&
9206 ((magic & TG3_EEPROM_MAGIC_HW_MSK) != TG3_EEPROM_MAGIC_HW))
8960 return; 9207 return;
8961 9208
8962 /* 9209 /*
@@ -9194,6 +9441,13 @@ static void __devinit tg3_get_5787_nvram_info(struct tg3 *tp)
9194 } 9441 }
9195} 9442}
9196 9443
9444static void __devinit tg3_get_5906_nvram_info(struct tg3 *tp)
9445{
9446 tp->nvram_jedecnum = JEDEC_ATMEL;
9447 tp->tg3_flags |= TG3_FLAG_NVRAM_BUFFERED;
9448 tp->nvram_pagesize = ATMEL_AT24C512_CHIP_SIZE;
9449}
9450
9197/* Chips other than 5700/5701 use the NVRAM for fetching info. */ 9451/* Chips other than 5700/5701 use the NVRAM for fetching info. */
9198static void __devinit tg3_nvram_init(struct tg3 *tp) 9452static void __devinit tg3_nvram_init(struct tg3 *tp)
9199{ 9453{
@@ -9230,6 +9484,8 @@ static void __devinit tg3_nvram_init(struct tg3 *tp)
9230 tg3_get_5755_nvram_info(tp); 9484 tg3_get_5755_nvram_info(tp);
9231 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 9485 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
9232 tg3_get_5787_nvram_info(tp); 9486 tg3_get_5787_nvram_info(tp);
9487 else if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
9488 tg3_get_5906_nvram_info(tp);
9233 else 9489 else
9234 tg3_get_nvram_info(tp); 9490 tg3_get_nvram_info(tp);
9235 9491
@@ -9703,6 +9959,12 @@ static void __devinit tg3_get_eeprom_hw_cfg(struct tg3 *tp)
9703 /* Assume an onboard device by default. */ 9959 /* Assume an onboard device by default. */
9704 tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT; 9960 tp->tg3_flags |= TG3_FLAG_EEPROM_WRITE_PROT;
9705 9961
9962 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
9963 if (!(tr32(PCIE_TRANSACTION_CFG) & PCIE_TRANS_CFG_LOM))
9964 tp->tg3_flags &= ~TG3_FLAG_EEPROM_WRITE_PROT;
9965 return;
9966 }
9967
9706 tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val); 9968 tg3_read_mem(tp, NIC_SRAM_DATA_SIG, &val);
9707 if (val == NIC_SRAM_DATA_SIG_MAGIC) { 9969 if (val == NIC_SRAM_DATA_SIG_MAGIC) {
9708 u32 nic_cfg, led_cfg; 9970 u32 nic_cfg, led_cfg;
@@ -10034,7 +10296,10 @@ static void __devinit tg3_read_partno(struct tg3 *tp)
10034 } 10296 }
10035 10297
10036out_not_found: 10298out_not_found:
10037 strcpy(tp->board_part_number, "none"); 10299 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
10300 strcpy(tp->board_part_number, "BCM95906");
10301 else
10302 strcpy(tp->board_part_number, "none");
10038} 10303}
10039 10304
10040static void __devinit tg3_read_fw_ver(struct tg3 *tp) 10305static void __devinit tg3_read_fw_ver(struct tg3 *tp)
@@ -10236,6 +10501,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10236 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 || 10501 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752 ||
10237 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 10502 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
10238 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 || 10503 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
10504 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906 ||
10239 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS)) 10505 (tp->tg3_flags2 & TG3_FLG2_5780_CLASS))
10240 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS; 10506 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
10241 10507
@@ -10245,7 +10511,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10245 10511
10246 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) { 10512 if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
10247 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 10513 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
10248 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) { 10514 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
10515 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
10249 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2; 10516 tp->tg3_flags2 |= TG3_FLG2_HW_TSO_2;
10250 tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI; 10517 tp->tg3_flags2 |= TG3_FLG2_1SHOT_MSI;
10251 } else { 10518 } else {
@@ -10262,7 +10529,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10262 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 && 10529 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5750 &&
10263 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752 && 10530 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5752 &&
10264 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755 && 10531 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5755 &&
10265 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787) 10532 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5787 &&
10533 GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)
10266 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE; 10534 tp->tg3_flags2 |= TG3_FLG2_JUMBO_CAPABLE;
10267 10535
10268 if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0) 10536 if (pci_find_capability(tp->pdev, PCI_CAP_ID_EXP) != 0)
@@ -10392,6 +10660,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10392 pci_cmd &= ~PCI_COMMAND_MEMORY; 10660 pci_cmd &= ~PCI_COMMAND_MEMORY;
10393 pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd); 10661 pci_write_config_word(tp->pdev, PCI_COMMAND, pci_cmd);
10394 } 10662 }
10663 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
10664 tp->read32_mbox = tg3_read32_mbox_5906;
10665 tp->write32_mbox = tg3_write32_mbox_5906;
10666 tp->write32_tx_mbox = tg3_write32_mbox_5906;
10667 tp->write32_rx_mbox = tg3_write32_mbox_5906;
10668 }
10395 10669
10396 if (tp->write32 == tg3_write_indirect_reg32 || 10670 if (tp->write32 == tg3_write_indirect_reg32 ||
10397 ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) && 10671 ((tp->tg3_flags & TG3_FLAG_PCIX_MODE) &&
@@ -10463,6 +10737,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10463 ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) && 10737 ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) &&
10464 (tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) && 10738 (tp->pci_chip_rev_id != CHIPREV_ID_5705_A0) &&
10465 (tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)) || 10739 (tp->pci_chip_rev_id != CHIPREV_ID_5705_A1)) ||
10740 (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) ||
10466 (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES)) 10741 (tp->tg3_flags2 & TG3_FLG2_ANY_SERDES))
10467 tp->tg3_flags2 |= TG3_FLG2_NO_ETH_WIRE_SPEED; 10742 tp->tg3_flags2 |= TG3_FLG2_NO_ETH_WIRE_SPEED;
10468 10743
@@ -10476,7 +10751,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10476 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 10751 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
10477 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 10752 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787)
10478 tp->tg3_flags2 |= TG3_FLG2_PHY_JITTER_BUG; 10753 tp->tg3_flags2 |= TG3_FLG2_PHY_JITTER_BUG;
10479 else 10754 else if (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)
10480 tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG; 10755 tp->tg3_flags2 |= TG3_FLG2_PHY_BER_BUG;
10481 } 10756 }
10482 10757
@@ -10566,7 +10841,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10566 tp->pdev->device == PCI_DEVICE_ID_TIGON3_5705F)) || 10841 tp->pdev->device == PCI_DEVICE_ID_TIGON3_5705F)) ||
10567 (tp->pdev->vendor == PCI_VENDOR_ID_BROADCOM && 10842 (tp->pdev->vendor == PCI_VENDOR_ID_BROADCOM &&
10568 (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5751F || 10843 (tp->pdev->device == PCI_DEVICE_ID_TIGON3_5751F ||
10569 tp->pdev->device == PCI_DEVICE_ID_TIGON3_5753F))) 10844 tp->pdev->device == PCI_DEVICE_ID_TIGON3_5753F)) ||
10845 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
10570 tp->tg3_flags |= TG3_FLAG_10_100_ONLY; 10846 tp->tg3_flags |= TG3_FLAG_10_100_ONLY;
10571 10847
10572 err = tg3_phy_probe(tp); 10848 err = tg3_phy_probe(tp);
@@ -10617,7 +10893,8 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
10617 * straddle the 4GB address boundary in some cases. 10893 * straddle the 4GB address boundary in some cases.
10618 */ 10894 */
10619 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 || 10895 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5755 ||
10620 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787) 10896 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5787 ||
10897 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
10621 tp->dev->hard_start_xmit = tg3_start_xmit; 10898 tp->dev->hard_start_xmit = tg3_start_xmit;
10622 else 10899 else
10623 tp->dev->hard_start_xmit = tg3_start_xmit_dma_bug; 10900 tp->dev->hard_start_xmit = tg3_start_xmit_dma_bug;
@@ -10698,6 +10975,8 @@ static int __devinit tg3_get_device_address(struct tg3 *tp)
10698 else 10975 else
10699 tg3_nvram_unlock(tp); 10976 tg3_nvram_unlock(tp);
10700 } 10977 }
10978 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906)
10979 mac_offset = 0x10;
10701 10980
10702 /* First try to get it from MAC address mailbox. */ 10981 /* First try to get it from MAC address mailbox. */
10703 tg3_read_mem(tp, NIC_SRAM_MAC_ADDR_HIGH_MBOX, &hi); 10982 tg3_read_mem(tp, NIC_SRAM_MAC_ADDR_HIGH_MBOX, &hi);
@@ -11181,6 +11460,12 @@ static void __devinit tg3_init_bufmgr_config(struct tg3 *tp)
11181 DEFAULT_MB_MACRX_LOW_WATER_5705; 11460 DEFAULT_MB_MACRX_LOW_WATER_5705;
11182 tp->bufmgr_config.mbuf_high_water = 11461 tp->bufmgr_config.mbuf_high_water =
11183 DEFAULT_MB_HIGH_WATER_5705; 11462 DEFAULT_MB_HIGH_WATER_5705;
11463 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) {
11464 tp->bufmgr_config.mbuf_mac_rx_low_water =
11465 DEFAULT_MB_MACRX_LOW_WATER_5906;
11466 tp->bufmgr_config.mbuf_high_water =
11467 DEFAULT_MB_HIGH_WATER_5906;
11468 }
11184 11469
11185 tp->bufmgr_config.mbuf_read_dma_low_water_jumbo = 11470 tp->bufmgr_config.mbuf_read_dma_low_water_jumbo =
11186 DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780; 11471 DEFAULT_MB_RDMA_LOW_WATER_JUMBO_5780;
@@ -11224,6 +11509,8 @@ static char * __devinit tg3_phy_string(struct tg3 *tp)
11224 case PHY_ID_BCM5780: return "5780"; 11509 case PHY_ID_BCM5780: return "5780";
11225 case PHY_ID_BCM5755: return "5755"; 11510 case PHY_ID_BCM5755: return "5755";
11226 case PHY_ID_BCM5787: return "5787"; 11511 case PHY_ID_BCM5787: return "5787";
11512 case PHY_ID_BCM5756: return "5722/5756";
11513 case PHY_ID_BCM5906: return "5906";
11227 case PHY_ID_BCM8002: return "8002/serdes"; 11514 case PHY_ID_BCM8002: return "8002/serdes";
11228 case 0: return "serdes"; 11515 case 0: return "serdes";
11229 default: return "unknown"; 11516 default: return "unknown";
@@ -11526,7 +11813,8 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
11526 */ 11813 */
11527 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) { 11814 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {
11528 dev->features |= NETIF_F_TSO; 11815 dev->features |= NETIF_F_TSO;
11529 if (tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) 11816 if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) &&
11817 (GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906))
11530 dev->features |= NETIF_F_TSO6; 11818 dev->features |= NETIF_F_TSO6;
11531 } 11819 }
11532 11820
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 3ecf356cfb08..92f53000bce6 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -24,6 +24,8 @@
24 24
25#define RX_COPY_THRESHOLD 256 25#define RX_COPY_THRESHOLD 256
26 26
27#define TG3_RX_INTERNAL_RING_SZ_5906 32
28
27#define RX_STD_MAX_SIZE 1536 29#define RX_STD_MAX_SIZE 1536
28#define RX_STD_MAX_SIZE_5705 512 30#define RX_STD_MAX_SIZE_5705 512
29#define RX_JUMBO_MAX_SIZE 0xdeadbeef /* XXX */ 31#define RX_JUMBO_MAX_SIZE 0xdeadbeef /* XXX */
@@ -129,6 +131,7 @@
129#define CHIPREV_ID_5752_A0_HW 0x5000 131#define CHIPREV_ID_5752_A0_HW 0x5000
130#define CHIPREV_ID_5752_A0 0x6000 132#define CHIPREV_ID_5752_A0 0x6000
131#define CHIPREV_ID_5752_A1 0x6001 133#define CHIPREV_ID_5752_A1 0x6001
134#define CHIPREV_ID_5906_A1 0xc001
132#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) 135#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
133#define ASIC_REV_5700 0x07 136#define ASIC_REV_5700 0x07
134#define ASIC_REV_5701 0x00 137#define ASIC_REV_5701 0x00
@@ -141,6 +144,7 @@
141#define ASIC_REV_5714 0x09 144#define ASIC_REV_5714 0x09
142#define ASIC_REV_5755 0x0a 145#define ASIC_REV_5755 0x0a
143#define ASIC_REV_5787 0x0b 146#define ASIC_REV_5787 0x0b
147#define ASIC_REV_5906 0x0c
144#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 148#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
145#define CHIPREV_5700_AX 0x70 149#define CHIPREV_5700_AX 0x70
146#define CHIPREV_5700_BX 0x71 150#define CHIPREV_5700_BX 0x71
@@ -646,7 +650,8 @@
646#define SNDDATAI_SCTRL_FORCE_ZERO 0x00000010 650#define SNDDATAI_SCTRL_FORCE_ZERO 0x00000010
647#define SNDDATAI_STATSENAB 0x00000c0c 651#define SNDDATAI_STATSENAB 0x00000c0c
648#define SNDDATAI_STATSINCMASK 0x00000c10 652#define SNDDATAI_STATSINCMASK 0x00000c10
649/* 0xc14 --> 0xc80 unused */ 653#define ISO_PKT_TX 0x00000c20
654/* 0xc24 --> 0xc80 unused */
650#define SNDDATAI_COS_CNT_0 0x00000c80 655#define SNDDATAI_COS_CNT_0 0x00000c80
651#define SNDDATAI_COS_CNT_1 0x00000c84 656#define SNDDATAI_COS_CNT_1 0x00000c84
652#define SNDDATAI_COS_CNT_2 0x00000c88 657#define SNDDATAI_COS_CNT_2 0x00000c88
@@ -997,11 +1002,13 @@
997#define BUFMGR_MB_MACRX_LOW_WATER 0x00004414 1002#define BUFMGR_MB_MACRX_LOW_WATER 0x00004414
998#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020 1003#define DEFAULT_MB_MACRX_LOW_WATER 0x00000020
999#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010 1004#define DEFAULT_MB_MACRX_LOW_WATER_5705 0x00000010
1005#define DEFAULT_MB_MACRX_LOW_WATER_5906 0x00000004
1000#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098 1006#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO 0x00000098
1001#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b 1007#define DEFAULT_MB_MACRX_LOW_WATER_JUMBO_5780 0x0000004b
1002#define BUFMGR_MB_HIGH_WATER 0x00004418 1008#define BUFMGR_MB_HIGH_WATER 0x00004418
1003#define DEFAULT_MB_HIGH_WATER 0x00000060 1009#define DEFAULT_MB_HIGH_WATER 0x00000060
1004#define DEFAULT_MB_HIGH_WATER_5705 0x00000060 1010#define DEFAULT_MB_HIGH_WATER_5705 0x00000060
1011#define DEFAULT_MB_HIGH_WATER_5906 0x00000010
1005#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c 1012#define DEFAULT_MB_HIGH_WATER_JUMBO 0x0000017c
1006#define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096 1013#define DEFAULT_MB_HIGH_WATER_JUMBO_5780 0x00000096
1007#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c 1014#define BUFMGR_RX_MB_ALLOC_REQ 0x0000441c
@@ -1138,7 +1145,12 @@
1138#define TX_CPU_STATE 0x00005404 1145#define TX_CPU_STATE 0x00005404
1139#define TX_CPU_PGMCTR 0x0000541c 1146#define TX_CPU_PGMCTR 0x0000541c
1140 1147
1148#define VCPU_STATUS 0x00005100
1149#define VCPU_STATUS_INIT_DONE 0x04000000
1150#define VCPU_STATUS_DRV_RESET 0x08000000
1151
1141/* Mailboxes */ 1152/* Mailboxes */
1153#define GRCMBOX_BASE 0x00005600
1142#define GRCMBOX_INTERRUPT_0 0x00005800 /* 64-bit */ 1154#define GRCMBOX_INTERRUPT_0 0x00005800 /* 64-bit */
1143#define GRCMBOX_INTERRUPT_1 0x00005808 /* 64-bit */ 1155#define GRCMBOX_INTERRUPT_1 0x00005808 /* 64-bit */
1144#define GRCMBOX_INTERRUPT_2 0x00005810 /* 64-bit */ 1156#define GRCMBOX_INTERRUPT_2 0x00005810 /* 64-bit */
@@ -1398,7 +1410,10 @@
1398#define GRC_EEPROM_CTRL 0x00006840 1410#define GRC_EEPROM_CTRL 0x00006840
1399#define GRC_MDI_CTRL 0x00006844 1411#define GRC_MDI_CTRL 0x00006844
1400#define GRC_SEEPROM_DELAY 0x00006848 1412#define GRC_SEEPROM_DELAY 0x00006848
1401/* 0x684c --> 0x6c00 unused */ 1413/* 0x684c --> 0x6890 unused */
1414#define GRC_VCPU_EXT_CTRL 0x00006890
1415#define GRC_VCPU_EXT_CTRL_HALT_CPU 0x00400000
1416#define GRC_VCPU_EXT_CTRL_DISABLE_WOL 0x20000000
1402#define GRC_FASTBOOT_PC 0x00006894 /* 5752, 5755, 5787 */ 1417#define GRC_FASTBOOT_PC 0x00006894 /* 5752, 5755, 5787 */
1403 1418
1404/* 0x6c00 --> 0x7000 unused */ 1419/* 0x6c00 --> 0x7000 unused */
@@ -1485,9 +1500,17 @@
1485#define NVRAM_WRITE1 0x00007028 1500#define NVRAM_WRITE1 0x00007028
1486/* 0x702c --> 0x7400 unused */ 1501/* 0x702c --> 0x7400 unused */
1487 1502
1488/* 0x7400 --> 0x8000 unused */ 1503/* 0x7400 --> 0x7c00 unused */
1504#define PCIE_TRANSACTION_CFG 0x00007c04
1505#define PCIE_TRANS_CFG_1SHOT_MSI 0x20000000
1506#define PCIE_TRANS_CFG_LOM 0x00000020
1507
1489 1508
1490#define TG3_EEPROM_MAGIC 0x669955aa 1509#define TG3_EEPROM_MAGIC 0x669955aa
1510#define TG3_EEPROM_MAGIC_FW 0xa5000000
1511#define TG3_EEPROM_MAGIC_FW_MSK 0xff000000
1512#define TG3_EEPROM_MAGIC_HW 0xabcd
1513#define TG3_EEPROM_MAGIC_HW_MSK 0xffff
1491 1514
1492/* 32K Window into NIC internal memory */ 1515/* 32K Window into NIC internal memory */
1493#define NIC_SRAM_WIN_BASE 0x00008000 1516#define NIC_SRAM_WIN_BASE 0x00008000
@@ -1537,6 +1560,7 @@
1537#define FWCMD_NICDRV_FIX_DMAR 0x00000005 1560#define FWCMD_NICDRV_FIX_DMAR 0x00000005
1538#define FWCMD_NICDRV_FIX_DMAW 0x00000006 1561#define FWCMD_NICDRV_FIX_DMAW 0x00000006
1539#define FWCMD_NICDRV_ALIVE2 0x0000000d 1562#define FWCMD_NICDRV_ALIVE2 0x0000000d
1563#define FWCMD_NICDRV_ALIVE3 0x0000000e
1540#define NIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c 1564#define NIC_SRAM_FW_CMD_LEN_MBOX 0x00000b7c
1541#define NIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80 1565#define NIC_SRAM_FW_CMD_DATA_MBOX 0x00000b80
1542#define NIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00 1566#define NIC_SRAM_FW_ASF_STATUS_MBOX 0x00000c00
@@ -1604,6 +1628,7 @@
1604#define MII_TG3_DSP_RW_PORT 0x15 /* DSP coefficient read/write port */ 1628#define MII_TG3_DSP_RW_PORT 0x15 /* DSP coefficient read/write port */
1605 1629
1606#define MII_TG3_DSP_ADDRESS 0x17 /* DSP address register */ 1630#define MII_TG3_DSP_ADDRESS 0x17 /* DSP address register */
1631#define MII_TG3_EPHY_PTEST 0x17 /* 5906 PHY register */
1607 1632
1608#define MII_TG3_AUX_CTRL 0x18 /* auxilliary control register */ 1633#define MII_TG3_AUX_CTRL 0x18 /* auxilliary control register */
1609 1634
@@ -1617,6 +1642,8 @@
1617#define MII_TG3_AUX_STAT_100FULL 0x0500 1642#define MII_TG3_AUX_STAT_100FULL 0x0500
1618#define MII_TG3_AUX_STAT_1000HALF 0x0600 1643#define MII_TG3_AUX_STAT_1000HALF 0x0600
1619#define MII_TG3_AUX_STAT_1000FULL 0x0700 1644#define MII_TG3_AUX_STAT_1000FULL 0x0700
1645#define MII_TG3_AUX_STAT_100 0x0008
1646#define MII_TG3_AUX_STAT_FULL 0x0001
1620 1647
1621#define MII_TG3_ISTAT 0x1a /* IRQ status register */ 1648#define MII_TG3_ISTAT 0x1a /* IRQ status register */
1622#define MII_TG3_IMASK 0x1b /* IRQ mask register */ 1649#define MII_TG3_IMASK 0x1b /* IRQ mask register */
@@ -1627,6 +1654,9 @@
1627#define MII_TG3_INT_DUPLEXCHG 0x0008 1654#define MII_TG3_INT_DUPLEXCHG 0x0008
1628#define MII_TG3_INT_ANEG_PAGE_RX 0x0400 1655#define MII_TG3_INT_ANEG_PAGE_RX 0x0400
1629 1656
1657#define MII_TG3_EPHY_TEST 0x1f /* 5906 PHY register */
1658#define MII_TG3_EPHY_SHADOW_EN 0x80
1659
1630/* There are two ways to manage the TX descriptors on the tigon3. 1660/* There are two ways to manage the TX descriptors on the tigon3.
1631 * Either the descriptors are in host DMA'able memory, or they 1661 * Either the descriptors are in host DMA'able memory, or they
1632 * exist only in the cards on-chip SRAM. All 16 send bds are under 1662 * exist only in the cards on-chip SRAM. All 16 send bds are under
@@ -2203,7 +2233,6 @@ struct tg3 {
2203#define TG3_FLG2_PCI_EXPRESS 0x00000200 2233#define TG3_FLG2_PCI_EXPRESS 0x00000200
2204#define TG3_FLG2_ASF_NEW_HANDSHAKE 0x00000400 2234#define TG3_FLG2_ASF_NEW_HANDSHAKE 0x00000400
2205#define TG3_FLG2_HW_AUTONEG 0x00000800 2235#define TG3_FLG2_HW_AUTONEG 0x00000800
2206#define TG3_FLG2_PHY_JUST_INITTED 0x00001000
2207#define TG3_FLG2_PHY_SERDES 0x00002000 2236#define TG3_FLG2_PHY_SERDES 0x00002000
2208#define TG3_FLG2_CAPACITIVE_COUPLING 0x00004000 2237#define TG3_FLG2_CAPACITIVE_COUPLING 0x00004000
2209#define TG3_FLG2_FLASH 0x00008000 2238#define TG3_FLG2_FLASH 0x00008000
@@ -2236,6 +2265,12 @@ struct tg3 {
2236 u16 asf_counter; 2265 u16 asf_counter;
2237 u16 asf_multiplier; 2266 u16 asf_multiplier;
2238 2267
2268 /* 1 second counter for transient serdes link events */
2269 u32 serdes_counter;
2270#define SERDES_AN_TIMEOUT_5704S 2
2271#define SERDES_PARALLEL_DET_TIMEOUT 1
2272#define SERDES_AN_TIMEOUT_5714S 1
2273
2239 struct tg3_link_config link_config; 2274 struct tg3_link_config link_config;
2240 struct tg3_bufmgr_config bufmgr_config; 2275 struct tg3_bufmgr_config bufmgr_config;
2241 2276
@@ -2276,6 +2311,8 @@ struct tg3 {
2276#define PHY_ID_BCM5780 0x60008350 2311#define PHY_ID_BCM5780 0x60008350
2277#define PHY_ID_BCM5755 0xbc050cc0 2312#define PHY_ID_BCM5755 0xbc050cc0
2278#define PHY_ID_BCM5787 0xbc050ce0 2313#define PHY_ID_BCM5787 0xbc050ce0
2314#define PHY_ID_BCM5756 0xbc050ed0
2315#define PHY_ID_BCM5906 0xdc00ac40
2279#define PHY_ID_BCM8002 0x60010140 2316#define PHY_ID_BCM8002 0x60010140
2280#define PHY_ID_INVALID 0xffffffff 2317#define PHY_ID_INVALID 0xffffffff
2281#define PHY_ID_REV_MASK 0x0000000f 2318#define PHY_ID_REV_MASK 0x0000000f
@@ -2302,7 +2339,8 @@ struct tg3 {
2302 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \ 2339 (X) == PHY_ID_BCM5705 || (X) == PHY_ID_BCM5750 || \
2303 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \ 2340 (X) == PHY_ID_BCM5752 || (X) == PHY_ID_BCM5714 || \
2304 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \ 2341 (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \
2305 (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM8002) 2342 (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM5756 || \
2343 (X) == PHY_ID_BCM5906 || (X) == PHY_ID_BCM8002)
2306 2344
2307 struct tg3_hw_stats *hw_stats; 2345 struct tg3_hw_stats *hw_stats;
2308 dma_addr_t stats_mapping; 2346 dma_addr_t stats_mapping;
diff --git a/drivers/net/wan/hdlc_cisco.c b/drivers/net/wan/hdlc_cisco.c
index 7ec2b2f9b7ee..b0bc5ddcf1b1 100644
--- a/drivers/net/wan/hdlc_cisco.c
+++ b/drivers/net/wan/hdlc_cisco.c
@@ -161,7 +161,7 @@ static int cisco_rx(struct sk_buff *skb)
161 struct hdlc_header *data = (struct hdlc_header*)skb->data; 161 struct hdlc_header *data = (struct hdlc_header*)skb->data;
162 struct cisco_packet *cisco_data; 162 struct cisco_packet *cisco_data;
163 struct in_device *in_dev; 163 struct in_device *in_dev;
164 u32 addr, mask; 164 __be32 addr, mask;
165 165
166 if (skb->len < sizeof(struct hdlc_header)) 166 if (skb->len < sizeof(struct hdlc_header))
167 goto rx_error; 167 goto rx_error;
diff --git a/drivers/net/wan/syncppp.c b/drivers/net/wan/syncppp.c
index c13b459a0137..d1173089f334 100644
--- a/drivers/net/wan/syncppp.c
+++ b/drivers/net/wan/syncppp.c
@@ -763,7 +763,7 @@ static void sppp_cisco_input (struct sppp *sp, struct sk_buff *skb)
763 { 763 {
764 struct in_device *in_dev; 764 struct in_device *in_dev;
765 struct in_ifaddr *ifa; 765 struct in_ifaddr *ifa;
766 u32 addr = 0, mask = ~0; /* FIXME: is the mask correct? */ 766 __be32 addr = 0, mask = ~0; /* FIXME: is the mask correct? */
767#ifdef CONFIG_INET 767#ifdef CONFIG_INET
768 rcu_read_lock(); 768 rcu_read_lock();
769 if ((in_dev = __in_dev_get_rcu(dev)) != NULL) 769 if ((in_dev = __in_dev_get_rcu(dev)) != NULL)
diff --git a/drivers/net/wireless/strip.c b/drivers/net/wireless/strip.c
index ccaf28e8db0a..337c692f6fd6 100644
--- a/drivers/net/wireless/strip.c
+++ b/drivers/net/wireless/strip.c
@@ -1342,7 +1342,7 @@ static unsigned char *strip_make_packet(unsigned char *buffer,
1342 * 'broadcast hub' radio (First byte of address being 0xFF means broadcast) 1342 * 'broadcast hub' radio (First byte of address being 0xFF means broadcast)
1343 */ 1343 */
1344 if (haddr.c[0] == 0xFF) { 1344 if (haddr.c[0] == 0xFF) {
1345 u32 brd = 0; 1345 __be32 brd = 0;
1346 struct in_device *in_dev; 1346 struct in_device *in_dev;
1347 1347
1348 rcu_read_lock(); 1348 rcu_read_lock();
@@ -1406,7 +1406,7 @@ static void strip_send(struct strip *strip_info, struct sk_buff *skb)
1406 int doreset = (long) jiffies - strip_info->watchdog_doreset >= 0; 1406 int doreset = (long) jiffies - strip_info->watchdog_doreset >= 0;
1407 int doprobe = (long) jiffies - strip_info->watchdog_doprobe >= 0 1407 int doprobe = (long) jiffies - strip_info->watchdog_doprobe >= 0
1408 && !doreset; 1408 && !doreset;
1409 u32 addr, brd; 1409 __be32 addr, brd;
1410 1410
1411 /* 1411 /*
1412 * 1. If we have a packet, encapsulate it and put it in the buffer 1412 * 1. If we have a packet, encapsulate it and put it in the buffer
diff --git a/drivers/s390/net/qeth_main.c b/drivers/s390/net/qeth_main.c
index 5613b4564fa2..8364d5475ac7 100644
--- a/drivers/s390/net/qeth_main.c
+++ b/drivers/s390/net/qeth_main.c
@@ -8067,7 +8067,7 @@ qeth_arp_constructor(struct neighbour *neigh)
8067 neigh->parms = neigh_parms_clone(parms); 8067 neigh->parms = neigh_parms_clone(parms);
8068 rcu_read_unlock(); 8068 rcu_read_unlock();
8069 8069
8070 neigh->type = inet_addr_type(*(u32 *) neigh->primary_key); 8070 neigh->type = inet_addr_type(*(__be32 *) neigh->primary_key);
8071 neigh->nud_state = NUD_NOARP; 8071 neigh->nud_state = NUD_NOARP;
8072 neigh->ops = arp_direct_ops; 8072 neigh->ops = arp_direct_ops;
8073 neigh->output = neigh->ops->queue_xmit; 8073 neigh->output = neigh->ops->queue_xmit;
generated by cgit v1.2.2 (git 2.25.0) at 2025-12-25 12:27:28 -0500