diff options
Diffstat (limited to 'drivers')
114 files changed, 2888 insertions, 843 deletions
diff --git a/drivers/base/firmware_class.c b/drivers/base/firmware_class.c index c8a44f5e0584..40af43ebd92d 100644 --- a/drivers/base/firmware_class.c +++ b/drivers/base/firmware_class.c | |||
@@ -568,7 +568,7 @@ static int _request_firmware(const struct firmware **firmware_p, | |||
568 | out: | 568 | out: |
569 | if (retval) { | 569 | if (retval) { |
570 | release_firmware(firmware); | 570 | release_firmware(firmware); |
571 | firmware_p = NULL; | 571 | *firmware_p = NULL; |
572 | } | 572 | } |
573 | 573 | ||
574 | return retval; | 574 | return retval; |
diff --git a/drivers/block/xen-blkfront.c b/drivers/block/xen-blkfront.c index ac1b682edecb..ab735a605cf3 100644 --- a/drivers/block/xen-blkfront.c +++ b/drivers/block/xen-blkfront.c | |||
@@ -834,7 +834,7 @@ static int blkfront_probe(struct xenbus_device *dev, | |||
834 | char *type; | 834 | char *type; |
835 | int len; | 835 | int len; |
836 | /* no unplug has been done: do not hook devices != xen vbds */ | 836 | /* no unplug has been done: do not hook devices != xen vbds */ |
837 | if (xen_platform_pci_unplug & XEN_UNPLUG_IGNORE) { | 837 | if (xen_platform_pci_unplug & XEN_UNPLUG_UNNECESSARY) { |
838 | int major; | 838 | int major; |
839 | 839 | ||
840 | if (!VDEV_IS_EXTENDED(vdevice)) | 840 | if (!VDEV_IS_EXTENDED(vdevice)) |
diff --git a/drivers/char/ip2/ip2main.c b/drivers/char/ip2/ip2main.c index 07f3ea38b582..d4b71e8d0d23 100644 --- a/drivers/char/ip2/ip2main.c +++ b/drivers/char/ip2/ip2main.c | |||
@@ -1650,7 +1650,7 @@ ip2_close( PTTY tty, struct file *pFile ) | |||
1650 | /* disable DSS reporting */ | 1650 | /* disable DSS reporting */ |
1651 | i2QueueCommands(PTYPE_INLINE, pCh, 100, 4, | 1651 | i2QueueCommands(PTYPE_INLINE, pCh, 100, 4, |
1652 | CMD_DCD_NREP, CMD_CTS_NREP, CMD_DSR_NREP, CMD_RI_NREP); | 1652 | CMD_DCD_NREP, CMD_CTS_NREP, CMD_DSR_NREP, CMD_RI_NREP); |
1653 | if ( !tty || (tty->termios->c_cflag & HUPCL) ) { | 1653 | if (tty->termios->c_cflag & HUPCL) { |
1654 | i2QueueCommands(PTYPE_INLINE, pCh, 100, 2, CMD_RTSDN, CMD_DTRDN); | 1654 | i2QueueCommands(PTYPE_INLINE, pCh, 100, 2, CMD_RTSDN, CMD_DTRDN); |
1655 | pCh->dataSetOut &= ~(I2_DTR | I2_RTS); | 1655 | pCh->dataSetOut &= ~(I2_DTR | I2_RTS); |
1656 | i2QueueCommands( PTYPE_INLINE, pCh, 100, 1, CMD_PAUSE(25)); | 1656 | i2QueueCommands( PTYPE_INLINE, pCh, 100, 1, CMD_PAUSE(25)); |
@@ -2930,6 +2930,8 @@ ip2_ipl_ioctl (struct file *pFile, UINT cmd, ULONG arg ) | |||
2930 | if ( pCh ) | 2930 | if ( pCh ) |
2931 | { | 2931 | { |
2932 | rc = copy_to_user(argp, pCh, sizeof(i2ChanStr)); | 2932 | rc = copy_to_user(argp, pCh, sizeof(i2ChanStr)); |
2933 | if (rc) | ||
2934 | rc = -EFAULT; | ||
2933 | } else { | 2935 | } else { |
2934 | rc = -ENODEV; | 2936 | rc = -ENODEV; |
2935 | } | 2937 | } |
diff --git a/drivers/char/rocket.c b/drivers/char/rocket.c index 79c3bc69165a..7c79d243acc9 100644 --- a/drivers/char/rocket.c +++ b/drivers/char/rocket.c | |||
@@ -1244,6 +1244,7 @@ static int set_config(struct tty_struct *tty, struct r_port *info, | |||
1244 | } | 1244 | } |
1245 | info->flags = ((info->flags & ~ROCKET_USR_MASK) | (new_serial.flags & ROCKET_USR_MASK)); | 1245 | info->flags = ((info->flags & ~ROCKET_USR_MASK) | (new_serial.flags & ROCKET_USR_MASK)); |
1246 | configure_r_port(tty, info, NULL); | 1246 | configure_r_port(tty, info, NULL); |
1247 | mutex_unlock(&info->port.mutex); | ||
1247 | return 0; | 1248 | return 0; |
1248 | } | 1249 | } |
1249 | 1250 | ||
diff --git a/drivers/char/synclink_gt.c b/drivers/char/synclink_gt.c index fef80cfcab5c..e63b830c86cc 100644 --- a/drivers/char/synclink_gt.c +++ b/drivers/char/synclink_gt.c | |||
@@ -691,8 +691,10 @@ static int open(struct tty_struct *tty, struct file *filp) | |||
691 | if (info->port.count == 1) { | 691 | if (info->port.count == 1) { |
692 | /* 1st open on this device, init hardware */ | 692 | /* 1st open on this device, init hardware */ |
693 | retval = startup(info); | 693 | retval = startup(info); |
694 | if (retval < 0) | 694 | if (retval < 0) { |
695 | mutex_unlock(&info->port.mutex); | ||
695 | goto cleanup; | 696 | goto cleanup; |
697 | } | ||
696 | } | 698 | } |
697 | mutex_unlock(&info->port.mutex); | 699 | mutex_unlock(&info->port.mutex); |
698 | retval = block_til_ready(tty, filp, info); | 700 | retval = block_til_ready(tty, filp, info); |
diff --git a/drivers/gpu/drm/drm_drv.c b/drivers/gpu/drm/drm_drv.c index 90288ec7c284..84da748555bc 100644 --- a/drivers/gpu/drm/drm_drv.c +++ b/drivers/gpu/drm/drm_drv.c | |||
@@ -55,6 +55,9 @@ | |||
55 | static int drm_version(struct drm_device *dev, void *data, | 55 | static int drm_version(struct drm_device *dev, void *data, |
56 | struct drm_file *file_priv); | 56 | struct drm_file *file_priv); |
57 | 57 | ||
58 | #define DRM_IOCTL_DEF(ioctl, _func, _flags) \ | ||
59 | [DRM_IOCTL_NR(ioctl)] = {.cmd = ioctl, .func = _func, .flags = _flags, .cmd_drv = 0} | ||
60 | |||
58 | /** Ioctl table */ | 61 | /** Ioctl table */ |
59 | static struct drm_ioctl_desc drm_ioctls[] = { | 62 | static struct drm_ioctl_desc drm_ioctls[] = { |
60 | DRM_IOCTL_DEF(DRM_IOCTL_VERSION, drm_version, 0), | 63 | DRM_IOCTL_DEF(DRM_IOCTL_VERSION, drm_version, 0), |
@@ -421,6 +424,7 @@ long drm_ioctl(struct file *filp, | |||
421 | int retcode = -EINVAL; | 424 | int retcode = -EINVAL; |
422 | char stack_kdata[128]; | 425 | char stack_kdata[128]; |
423 | char *kdata = NULL; | 426 | char *kdata = NULL; |
427 | unsigned int usize, asize; | ||
424 | 428 | ||
425 | dev = file_priv->minor->dev; | 429 | dev = file_priv->minor->dev; |
426 | atomic_inc(&dev->ioctl_count); | 430 | atomic_inc(&dev->ioctl_count); |
@@ -436,11 +440,18 @@ long drm_ioctl(struct file *filp, | |||
436 | ((nr < DRM_COMMAND_BASE) || (nr >= DRM_COMMAND_END))) | 440 | ((nr < DRM_COMMAND_BASE) || (nr >= DRM_COMMAND_END))) |
437 | goto err_i1; | 441 | goto err_i1; |
438 | if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END) && | 442 | if ((nr >= DRM_COMMAND_BASE) && (nr < DRM_COMMAND_END) && |
439 | (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) | 443 | (nr < DRM_COMMAND_BASE + dev->driver->num_ioctls)) { |
444 | u32 drv_size; | ||
440 | ioctl = &dev->driver->ioctls[nr - DRM_COMMAND_BASE]; | 445 | ioctl = &dev->driver->ioctls[nr - DRM_COMMAND_BASE]; |
446 | drv_size = _IOC_SIZE(ioctl->cmd_drv); | ||
447 | usize = asize = _IOC_SIZE(cmd); | ||
448 | if (drv_size > asize) | ||
449 | asize = drv_size; | ||
450 | } | ||
441 | else if ((nr >= DRM_COMMAND_END) || (nr < DRM_COMMAND_BASE)) { | 451 | else if ((nr >= DRM_COMMAND_END) || (nr < DRM_COMMAND_BASE)) { |
442 | ioctl = &drm_ioctls[nr]; | 452 | ioctl = &drm_ioctls[nr]; |
443 | cmd = ioctl->cmd; | 453 | cmd = ioctl->cmd; |
454 | usize = asize = _IOC_SIZE(cmd); | ||
444 | } else | 455 | } else |
445 | goto err_i1; | 456 | goto err_i1; |
446 | 457 | ||
@@ -460,10 +471,10 @@ long drm_ioctl(struct file *filp, | |||
460 | retcode = -EACCES; | 471 | retcode = -EACCES; |
461 | } else { | 472 | } else { |
462 | if (cmd & (IOC_IN | IOC_OUT)) { | 473 | if (cmd & (IOC_IN | IOC_OUT)) { |
463 | if (_IOC_SIZE(cmd) <= sizeof(stack_kdata)) { | 474 | if (asize <= sizeof(stack_kdata)) { |
464 | kdata = stack_kdata; | 475 | kdata = stack_kdata; |
465 | } else { | 476 | } else { |
466 | kdata = kmalloc(_IOC_SIZE(cmd), GFP_KERNEL); | 477 | kdata = kmalloc(asize, GFP_KERNEL); |
467 | if (!kdata) { | 478 | if (!kdata) { |
468 | retcode = -ENOMEM; | 479 | retcode = -ENOMEM; |
469 | goto err_i1; | 480 | goto err_i1; |
@@ -473,11 +484,13 @@ long drm_ioctl(struct file *filp, | |||
473 | 484 | ||
474 | if (cmd & IOC_IN) { | 485 | if (cmd & IOC_IN) { |
475 | if (copy_from_user(kdata, (void __user *)arg, | 486 | if (copy_from_user(kdata, (void __user *)arg, |
476 | _IOC_SIZE(cmd)) != 0) { | 487 | usize) != 0) { |
477 | retcode = -EFAULT; | 488 | retcode = -EFAULT; |
478 | goto err_i1; | 489 | goto err_i1; |
479 | } | 490 | } |
480 | } | 491 | } else |
492 | memset(kdata, 0, usize); | ||
493 | |||
481 | if (ioctl->flags & DRM_UNLOCKED) | 494 | if (ioctl->flags & DRM_UNLOCKED) |
482 | retcode = func(dev, kdata, file_priv); | 495 | retcode = func(dev, kdata, file_priv); |
483 | else { | 496 | else { |
@@ -488,7 +501,7 @@ long drm_ioctl(struct file *filp, | |||
488 | 501 | ||
489 | if (cmd & IOC_OUT) { | 502 | if (cmd & IOC_OUT) { |
490 | if (copy_to_user((void __user *)arg, kdata, | 503 | if (copy_to_user((void __user *)arg, kdata, |
491 | _IOC_SIZE(cmd)) != 0) | 504 | usize) != 0) |
492 | retcode = -EFAULT; | 505 | retcode = -EFAULT; |
493 | } | 506 | } |
494 | } | 507 | } |
diff --git a/drivers/gpu/drm/drm_fb_helper.c b/drivers/gpu/drm/drm_fb_helper.c index de82e201d682..8dd7e6f86bb3 100644 --- a/drivers/gpu/drm/drm_fb_helper.c +++ b/drivers/gpu/drm/drm_fb_helper.c | |||
@@ -94,10 +94,11 @@ static bool drm_fb_helper_connector_parse_command_line(struct drm_fb_helper_conn | |||
94 | int i; | 94 | int i; |
95 | enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; | 95 | enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; |
96 | struct drm_fb_helper_cmdline_mode *cmdline_mode; | 96 | struct drm_fb_helper_cmdline_mode *cmdline_mode; |
97 | struct drm_connector *connector = fb_helper_conn->connector; | 97 | struct drm_connector *connector; |
98 | 98 | ||
99 | if (!fb_helper_conn) | 99 | if (!fb_helper_conn) |
100 | return false; | 100 | return false; |
101 | connector = fb_helper_conn->connector; | ||
101 | 102 | ||
102 | cmdline_mode = &fb_helper_conn->cmdline_mode; | 103 | cmdline_mode = &fb_helper_conn->cmdline_mode; |
103 | if (!mode_option) | 104 | if (!mode_option) |
diff --git a/drivers/gpu/drm/drm_vm.c b/drivers/gpu/drm/drm_vm.c index 3778360eceea..fda67468e603 100644 --- a/drivers/gpu/drm/drm_vm.c +++ b/drivers/gpu/drm/drm_vm.c | |||
@@ -138,7 +138,7 @@ static int drm_do_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | |||
138 | break; | 138 | break; |
139 | } | 139 | } |
140 | 140 | ||
141 | if (!agpmem) | 141 | if (&agpmem->head == &dev->agp->memory) |
142 | goto vm_fault_error; | 142 | goto vm_fault_error; |
143 | 143 | ||
144 | /* | 144 | /* |
diff --git a/drivers/gpu/drm/i810/i810_dma.c b/drivers/gpu/drm/i810/i810_dma.c index 0e6c131313d9..61b4caf220fa 100644 --- a/drivers/gpu/drm/i810/i810_dma.c +++ b/drivers/gpu/drm/i810/i810_dma.c | |||
@@ -1255,21 +1255,21 @@ long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
1255 | } | 1255 | } |
1256 | 1256 | ||
1257 | struct drm_ioctl_desc i810_ioctls[] = { | 1257 | struct drm_ioctl_desc i810_ioctls[] = { |
1258 | DRM_IOCTL_DEF(DRM_I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), | 1258 | DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1259 | DRM_IOCTL_DEF(DRM_I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED), | 1259 | DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED), |
1260 | DRM_IOCTL_DEF(DRM_I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED), | 1260 | DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED), |
1261 | DRM_IOCTL_DEF(DRM_I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED), | 1261 | DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED), |
1262 | DRM_IOCTL_DEF(DRM_I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED), | 1262 | DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED), |
1263 | DRM_IOCTL_DEF(DRM_I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED), | 1263 | DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED), |
1264 | DRM_IOCTL_DEF(DRM_I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED), | 1264 | DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED), |
1265 | DRM_IOCTL_DEF(DRM_I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED), | 1265 | DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED), |
1266 | DRM_IOCTL_DEF(DRM_I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED), | 1266 | DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED), |
1267 | DRM_IOCTL_DEF(DRM_I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED), | 1267 | DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED), |
1268 | DRM_IOCTL_DEF(DRM_I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED), | 1268 | DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED), |
1269 | DRM_IOCTL_DEF(DRM_I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED), | 1269 | DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED), |
1270 | DRM_IOCTL_DEF(DRM_I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), | 1270 | DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1271 | DRM_IOCTL_DEF(DRM_I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED), | 1271 | DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED), |
1272 | DRM_IOCTL_DEF(DRM_I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED), | 1272 | DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED), |
1273 | }; | 1273 | }; |
1274 | 1274 | ||
1275 | int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls); | 1275 | int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls); |
diff --git a/drivers/gpu/drm/i830/i830_dma.c b/drivers/gpu/drm/i830/i830_dma.c index 5168862c9227..671aa18415ac 100644 --- a/drivers/gpu/drm/i830/i830_dma.c +++ b/drivers/gpu/drm/i830/i830_dma.c | |||
@@ -1524,20 +1524,20 @@ long i830_ioctl(struct file *file, unsigned int cmd, unsigned long arg) | |||
1524 | } | 1524 | } |
1525 | 1525 | ||
1526 | struct drm_ioctl_desc i830_ioctls[] = { | 1526 | struct drm_ioctl_desc i830_ioctls[] = { |
1527 | DRM_IOCTL_DEF(DRM_I830_INIT, i830_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), | 1527 | DRM_IOCTL_DEF_DRV(I830_INIT, i830_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
1528 | DRM_IOCTL_DEF(DRM_I830_VERTEX, i830_dma_vertex, DRM_AUTH|DRM_UNLOCKED), | 1528 | DRM_IOCTL_DEF_DRV(I830_VERTEX, i830_dma_vertex, DRM_AUTH|DRM_UNLOCKED), |
1529 | DRM_IOCTL_DEF(DRM_I830_CLEAR, i830_clear_bufs, DRM_AUTH|DRM_UNLOCKED), | 1529 | DRM_IOCTL_DEF_DRV(I830_CLEAR, i830_clear_bufs, DRM_AUTH|DRM_UNLOCKED), |
1530 | DRM_IOCTL_DEF(DRM_I830_FLUSH, i830_flush_ioctl, DRM_AUTH|DRM_UNLOCKED), | 1530 | DRM_IOCTL_DEF_DRV(I830_FLUSH, i830_flush_ioctl, DRM_AUTH|DRM_UNLOCKED), |
1531 | DRM_IOCTL_DEF(DRM_I830_GETAGE, i830_getage, DRM_AUTH|DRM_UNLOCKED), | 1531 | DRM_IOCTL_DEF_DRV(I830_GETAGE, i830_getage, DRM_AUTH|DRM_UNLOCKED), |
1532 | DRM_IOCTL_DEF(DRM_I830_GETBUF, i830_getbuf, DRM_AUTH|DRM_UNLOCKED), | 1532 | DRM_IOCTL_DEF_DRV(I830_GETBUF, i830_getbuf, DRM_AUTH|DRM_UNLOCKED), |
1533 | DRM_IOCTL_DEF(DRM_I830_SWAP, i830_swap_bufs, DRM_AUTH|DRM_UNLOCKED), | 1533 | DRM_IOCTL_DEF_DRV(I830_SWAP, i830_swap_bufs, DRM_AUTH|DRM_UNLOCKED), |
1534 | DRM_IOCTL_DEF(DRM_I830_COPY, i830_copybuf, DRM_AUTH|DRM_UNLOCKED), | 1534 | DRM_IOCTL_DEF_DRV(I830_COPY, i830_copybuf, DRM_AUTH|DRM_UNLOCKED), |
1535 | DRM_IOCTL_DEF(DRM_I830_DOCOPY, i830_docopy, DRM_AUTH|DRM_UNLOCKED), | 1535 | DRM_IOCTL_DEF_DRV(I830_DOCOPY, i830_docopy, DRM_AUTH|DRM_UNLOCKED), |
1536 | DRM_IOCTL_DEF(DRM_I830_FLIP, i830_flip_bufs, DRM_AUTH|DRM_UNLOCKED), | 1536 | DRM_IOCTL_DEF_DRV(I830_FLIP, i830_flip_bufs, DRM_AUTH|DRM_UNLOCKED), |
1537 | DRM_IOCTL_DEF(DRM_I830_IRQ_EMIT, i830_irq_emit, DRM_AUTH|DRM_UNLOCKED), | 1537 | DRM_IOCTL_DEF_DRV(I830_IRQ_EMIT, i830_irq_emit, DRM_AUTH|DRM_UNLOCKED), |
1538 | DRM_IOCTL_DEF(DRM_I830_IRQ_WAIT, i830_irq_wait, DRM_AUTH|DRM_UNLOCKED), | 1538 | DRM_IOCTL_DEF_DRV(I830_IRQ_WAIT, i830_irq_wait, DRM_AUTH|DRM_UNLOCKED), |
1539 | DRM_IOCTL_DEF(DRM_I830_GETPARAM, i830_getparam, DRM_AUTH|DRM_UNLOCKED), | 1539 | DRM_IOCTL_DEF_DRV(I830_GETPARAM, i830_getparam, DRM_AUTH|DRM_UNLOCKED), |
1540 | DRM_IOCTL_DEF(DRM_I830_SETPARAM, i830_setparam, DRM_AUTH|DRM_UNLOCKED), | 1540 | DRM_IOCTL_DEF_DRV(I830_SETPARAM, i830_setparam, DRM_AUTH|DRM_UNLOCKED), |
1541 | }; | 1541 | }; |
1542 | 1542 | ||
1543 | int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls); | 1543 | int i830_max_ioctl = DRM_ARRAY_SIZE(i830_ioctls); |
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index 44af317731b6..a7ec93e62f81 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -2367,46 +2367,46 @@ void i915_driver_postclose(struct drm_device *dev, struct drm_file *file_priv) | |||
2367 | } | 2367 | } |
2368 | 2368 | ||
2369 | struct drm_ioctl_desc i915_ioctls[] = { | 2369 | struct drm_ioctl_desc i915_ioctls[] = { |
2370 | DRM_IOCTL_DEF(DRM_I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 2370 | DRM_IOCTL_DEF_DRV(I915_INIT, i915_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
2371 | DRM_IOCTL_DEF(DRM_I915_FLUSH, i915_flush_ioctl, DRM_AUTH), | 2371 | DRM_IOCTL_DEF_DRV(I915_FLUSH, i915_flush_ioctl, DRM_AUTH), |
2372 | DRM_IOCTL_DEF(DRM_I915_FLIP, i915_flip_bufs, DRM_AUTH), | 2372 | DRM_IOCTL_DEF_DRV(I915_FLIP, i915_flip_bufs, DRM_AUTH), |
2373 | DRM_IOCTL_DEF(DRM_I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH), | 2373 | DRM_IOCTL_DEF_DRV(I915_BATCHBUFFER, i915_batchbuffer, DRM_AUTH), |
2374 | DRM_IOCTL_DEF(DRM_I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH), | 2374 | DRM_IOCTL_DEF_DRV(I915_IRQ_EMIT, i915_irq_emit, DRM_AUTH), |
2375 | DRM_IOCTL_DEF(DRM_I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH), | 2375 | DRM_IOCTL_DEF_DRV(I915_IRQ_WAIT, i915_irq_wait, DRM_AUTH), |
2376 | DRM_IOCTL_DEF(DRM_I915_GETPARAM, i915_getparam, DRM_AUTH), | 2376 | DRM_IOCTL_DEF_DRV(I915_GETPARAM, i915_getparam, DRM_AUTH), |
2377 | DRM_IOCTL_DEF(DRM_I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 2377 | DRM_IOCTL_DEF_DRV(I915_SETPARAM, i915_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
2378 | DRM_IOCTL_DEF(DRM_I915_ALLOC, i915_mem_alloc, DRM_AUTH), | 2378 | DRM_IOCTL_DEF_DRV(I915_ALLOC, i915_mem_alloc, DRM_AUTH), |
2379 | DRM_IOCTL_DEF(DRM_I915_FREE, i915_mem_free, DRM_AUTH), | 2379 | DRM_IOCTL_DEF_DRV(I915_FREE, i915_mem_free, DRM_AUTH), |
2380 | DRM_IOCTL_DEF(DRM_I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 2380 | DRM_IOCTL_DEF_DRV(I915_INIT_HEAP, i915_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
2381 | DRM_IOCTL_DEF(DRM_I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH), | 2381 | DRM_IOCTL_DEF_DRV(I915_CMDBUFFER, i915_cmdbuffer, DRM_AUTH), |
2382 | DRM_IOCTL_DEF(DRM_I915_DESTROY_HEAP, i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ), | 2382 | DRM_IOCTL_DEF_DRV(I915_DESTROY_HEAP, i915_mem_destroy_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
2383 | DRM_IOCTL_DEF(DRM_I915_SET_VBLANK_PIPE, i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY ), | 2383 | DRM_IOCTL_DEF_DRV(I915_SET_VBLANK_PIPE, i915_vblank_pipe_set, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
2384 | DRM_IOCTL_DEF(DRM_I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH ), | 2384 | DRM_IOCTL_DEF_DRV(I915_GET_VBLANK_PIPE, i915_vblank_pipe_get, DRM_AUTH), |
2385 | DRM_IOCTL_DEF(DRM_I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH), | 2385 | DRM_IOCTL_DEF_DRV(I915_VBLANK_SWAP, i915_vblank_swap, DRM_AUTH), |
2386 | DRM_IOCTL_DEF(DRM_I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 2386 | DRM_IOCTL_DEF_DRV(I915_HWS_ADDR, i915_set_status_page, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
2387 | DRM_IOCTL_DEF(DRM_I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), | 2387 | DRM_IOCTL_DEF_DRV(I915_GEM_INIT, i915_gem_init_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
2388 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED), | 2388 | DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER, i915_gem_execbuffer, DRM_AUTH|DRM_UNLOCKED), |
2389 | DRM_IOCTL_DEF(DRM_I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED), | 2389 | DRM_IOCTL_DEF_DRV(I915_GEM_EXECBUFFER2, i915_gem_execbuffer2, DRM_AUTH|DRM_UNLOCKED), |
2390 | DRM_IOCTL_DEF(DRM_I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), | 2390 | DRM_IOCTL_DEF_DRV(I915_GEM_PIN, i915_gem_pin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), |
2391 | DRM_IOCTL_DEF(DRM_I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), | 2391 | DRM_IOCTL_DEF_DRV(I915_GEM_UNPIN, i915_gem_unpin_ioctl, DRM_AUTH|DRM_ROOT_ONLY|DRM_UNLOCKED), |
2392 | DRM_IOCTL_DEF(DRM_I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED), | 2392 | DRM_IOCTL_DEF_DRV(I915_GEM_BUSY, i915_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED), |
2393 | DRM_IOCTL_DEF(DRM_I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED), | 2393 | DRM_IOCTL_DEF_DRV(I915_GEM_THROTTLE, i915_gem_throttle_ioctl, DRM_AUTH|DRM_UNLOCKED), |
2394 | DRM_IOCTL_DEF(DRM_I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), | 2394 | DRM_IOCTL_DEF_DRV(I915_GEM_ENTERVT, i915_gem_entervt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
2395 | DRM_IOCTL_DEF(DRM_I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), | 2395 | DRM_IOCTL_DEF_DRV(I915_GEM_LEAVEVT, i915_gem_leavevt_ioctl, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED), |
2396 | DRM_IOCTL_DEF(DRM_I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED), | 2396 | DRM_IOCTL_DEF_DRV(I915_GEM_CREATE, i915_gem_create_ioctl, DRM_UNLOCKED), |
2397 | DRM_IOCTL_DEF(DRM_I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED), | 2397 | DRM_IOCTL_DEF_DRV(I915_GEM_PREAD, i915_gem_pread_ioctl, DRM_UNLOCKED), |
2398 | DRM_IOCTL_DEF(DRM_I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED), | 2398 | DRM_IOCTL_DEF_DRV(I915_GEM_PWRITE, i915_gem_pwrite_ioctl, DRM_UNLOCKED), |
2399 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED), | 2399 | DRM_IOCTL_DEF_DRV(I915_GEM_MMAP, i915_gem_mmap_ioctl, DRM_UNLOCKED), |
2400 | DRM_IOCTL_DEF(DRM_I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED), | 2400 | DRM_IOCTL_DEF_DRV(I915_GEM_MMAP_GTT, i915_gem_mmap_gtt_ioctl, DRM_UNLOCKED), |
2401 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED), | 2401 | DRM_IOCTL_DEF_DRV(I915_GEM_SET_DOMAIN, i915_gem_set_domain_ioctl, DRM_UNLOCKED), |
2402 | DRM_IOCTL_DEF(DRM_I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED), | 2402 | DRM_IOCTL_DEF_DRV(I915_GEM_SW_FINISH, i915_gem_sw_finish_ioctl, DRM_UNLOCKED), |
2403 | DRM_IOCTL_DEF(DRM_I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED), | 2403 | DRM_IOCTL_DEF_DRV(I915_GEM_SET_TILING, i915_gem_set_tiling, DRM_UNLOCKED), |
2404 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED), | 2404 | DRM_IOCTL_DEF_DRV(I915_GEM_GET_TILING, i915_gem_get_tiling, DRM_UNLOCKED), |
2405 | DRM_IOCTL_DEF(DRM_I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED), | 2405 | DRM_IOCTL_DEF_DRV(I915_GEM_GET_APERTURE, i915_gem_get_aperture_ioctl, DRM_UNLOCKED), |
2406 | DRM_IOCTL_DEF(DRM_I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, DRM_UNLOCKED), | 2406 | DRM_IOCTL_DEF_DRV(I915_GET_PIPE_FROM_CRTC_ID, intel_get_pipe_from_crtc_id, DRM_UNLOCKED), |
2407 | DRM_IOCTL_DEF(DRM_I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED), | 2407 | DRM_IOCTL_DEF_DRV(I915_GEM_MADVISE, i915_gem_madvise_ioctl, DRM_UNLOCKED), |
2408 | DRM_IOCTL_DEF(DRM_I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), | 2408 | DRM_IOCTL_DEF_DRV(I915_OVERLAY_PUT_IMAGE, intel_overlay_put_image, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), |
2409 | DRM_IOCTL_DEF(DRM_I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), | 2409 | DRM_IOCTL_DEF_DRV(I915_OVERLAY_ATTRS, intel_overlay_attrs, DRM_MASTER|DRM_CONTROL_ALLOW|DRM_UNLOCKED), |
2410 | }; | 2410 | }; |
2411 | 2411 | ||
2412 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); | 2412 | int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls); |
diff --git a/drivers/gpu/drm/mga/mga_state.c b/drivers/gpu/drm/mga/mga_state.c index fff82045c427..9ce2827f8c00 100644 --- a/drivers/gpu/drm/mga/mga_state.c +++ b/drivers/gpu/drm/mga/mga_state.c | |||
@@ -1085,19 +1085,19 @@ file_priv) | |||
1085 | } | 1085 | } |
1086 | 1086 | ||
1087 | struct drm_ioctl_desc mga_ioctls[] = { | 1087 | struct drm_ioctl_desc mga_ioctls[] = { |
1088 | DRM_IOCTL_DEF(DRM_MGA_INIT, mga_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1088 | DRM_IOCTL_DEF_DRV(MGA_INIT, mga_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1089 | DRM_IOCTL_DEF(DRM_MGA_FLUSH, mga_dma_flush, DRM_AUTH), | 1089 | DRM_IOCTL_DEF_DRV(MGA_FLUSH, mga_dma_flush, DRM_AUTH), |
1090 | DRM_IOCTL_DEF(DRM_MGA_RESET, mga_dma_reset, DRM_AUTH), | 1090 | DRM_IOCTL_DEF_DRV(MGA_RESET, mga_dma_reset, DRM_AUTH), |
1091 | DRM_IOCTL_DEF(DRM_MGA_SWAP, mga_dma_swap, DRM_AUTH), | 1091 | DRM_IOCTL_DEF_DRV(MGA_SWAP, mga_dma_swap, DRM_AUTH), |
1092 | DRM_IOCTL_DEF(DRM_MGA_CLEAR, mga_dma_clear, DRM_AUTH), | 1092 | DRM_IOCTL_DEF_DRV(MGA_CLEAR, mga_dma_clear, DRM_AUTH), |
1093 | DRM_IOCTL_DEF(DRM_MGA_VERTEX, mga_dma_vertex, DRM_AUTH), | 1093 | DRM_IOCTL_DEF_DRV(MGA_VERTEX, mga_dma_vertex, DRM_AUTH), |
1094 | DRM_IOCTL_DEF(DRM_MGA_INDICES, mga_dma_indices, DRM_AUTH), | 1094 | DRM_IOCTL_DEF_DRV(MGA_INDICES, mga_dma_indices, DRM_AUTH), |
1095 | DRM_IOCTL_DEF(DRM_MGA_ILOAD, mga_dma_iload, DRM_AUTH), | 1095 | DRM_IOCTL_DEF_DRV(MGA_ILOAD, mga_dma_iload, DRM_AUTH), |
1096 | DRM_IOCTL_DEF(DRM_MGA_BLIT, mga_dma_blit, DRM_AUTH), | 1096 | DRM_IOCTL_DEF_DRV(MGA_BLIT, mga_dma_blit, DRM_AUTH), |
1097 | DRM_IOCTL_DEF(DRM_MGA_GETPARAM, mga_getparam, DRM_AUTH), | 1097 | DRM_IOCTL_DEF_DRV(MGA_GETPARAM, mga_getparam, DRM_AUTH), |
1098 | DRM_IOCTL_DEF(DRM_MGA_SET_FENCE, mga_set_fence, DRM_AUTH), | 1098 | DRM_IOCTL_DEF_DRV(MGA_SET_FENCE, mga_set_fence, DRM_AUTH), |
1099 | DRM_IOCTL_DEF(DRM_MGA_WAIT_FENCE, mga_wait_fence, DRM_AUTH), | 1099 | DRM_IOCTL_DEF_DRV(MGA_WAIT_FENCE, mga_wait_fence, DRM_AUTH), |
1100 | DRM_IOCTL_DEF(DRM_MGA_DMA_BOOTSTRAP, mga_dma_bootstrap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1100 | DRM_IOCTL_DEF_DRV(MGA_DMA_BOOTSTRAP, mga_dma_bootstrap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1101 | }; | 1101 | }; |
1102 | 1102 | ||
1103 | int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls); | 1103 | int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index 0b69a9628c95..e4f33a4edea1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
@@ -2166,7 +2166,7 @@ peek_fb(struct drm_device *dev, struct io_mapping *fb, | |||
2166 | uint32_t val = 0; | 2166 | uint32_t val = 0; |
2167 | 2167 | ||
2168 | if (off < pci_resource_len(dev->pdev, 1)) { | 2168 | if (off < pci_resource_len(dev->pdev, 1)) { |
2169 | uint32_t __iomem *p = | 2169 | uint8_t __iomem *p = |
2170 | io_mapping_map_atomic_wc(fb, off & PAGE_MASK, KM_USER0); | 2170 | io_mapping_map_atomic_wc(fb, off & PAGE_MASK, KM_USER0); |
2171 | 2171 | ||
2172 | val = ioread32(p + (off & ~PAGE_MASK)); | 2172 | val = ioread32(p + (off & ~PAGE_MASK)); |
@@ -2182,7 +2182,7 @@ poke_fb(struct drm_device *dev, struct io_mapping *fb, | |||
2182 | uint32_t off, uint32_t val) | 2182 | uint32_t off, uint32_t val) |
2183 | { | 2183 | { |
2184 | if (off < pci_resource_len(dev->pdev, 1)) { | 2184 | if (off < pci_resource_len(dev->pdev, 1)) { |
2185 | uint32_t __iomem *p = | 2185 | uint8_t __iomem *p = |
2186 | io_mapping_map_atomic_wc(fb, off & PAGE_MASK, KM_USER0); | 2186 | io_mapping_map_atomic_wc(fb, off & PAGE_MASK, KM_USER0); |
2187 | 2187 | ||
2188 | iowrite32(val, p + (off & ~PAGE_MASK)); | 2188 | iowrite32(val, p + (off & ~PAGE_MASK)); |
@@ -4587,7 +4587,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent, | |||
4587 | return 1; | 4587 | return 1; |
4588 | } | 4588 | } |
4589 | 4589 | ||
4590 | NV_TRACE(dev, "0x%04X: parsing output script 0\n", script); | 4590 | NV_DEBUG_KMS(dev, "0x%04X: parsing output script 0\n", script); |
4591 | nouveau_bios_run_init_table(dev, script, dcbent); | 4591 | nouveau_bios_run_init_table(dev, script, dcbent); |
4592 | } else | 4592 | } else |
4593 | if (pxclk == -1) { | 4593 | if (pxclk == -1) { |
@@ -4597,7 +4597,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent, | |||
4597 | return 1; | 4597 | return 1; |
4598 | } | 4598 | } |
4599 | 4599 | ||
4600 | NV_TRACE(dev, "0x%04X: parsing output script 1\n", script); | 4600 | NV_DEBUG_KMS(dev, "0x%04X: parsing output script 1\n", script); |
4601 | nouveau_bios_run_init_table(dev, script, dcbent); | 4601 | nouveau_bios_run_init_table(dev, script, dcbent); |
4602 | } else | 4602 | } else |
4603 | if (pxclk == -2) { | 4603 | if (pxclk == -2) { |
@@ -4610,7 +4610,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent, | |||
4610 | return 1; | 4610 | return 1; |
4611 | } | 4611 | } |
4612 | 4612 | ||
4613 | NV_TRACE(dev, "0x%04X: parsing output script 2\n", script); | 4613 | NV_DEBUG_KMS(dev, "0x%04X: parsing output script 2\n", script); |
4614 | nouveau_bios_run_init_table(dev, script, dcbent); | 4614 | nouveau_bios_run_init_table(dev, script, dcbent); |
4615 | } else | 4615 | } else |
4616 | if (pxclk > 0) { | 4616 | if (pxclk > 0) { |
@@ -4622,7 +4622,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent, | |||
4622 | return 1; | 4622 | return 1; |
4623 | } | 4623 | } |
4624 | 4624 | ||
4625 | NV_TRACE(dev, "0x%04X: parsing clock script 0\n", script); | 4625 | NV_DEBUG_KMS(dev, "0x%04X: parsing clock script 0\n", script); |
4626 | nouveau_bios_run_init_table(dev, script, dcbent); | 4626 | nouveau_bios_run_init_table(dev, script, dcbent); |
4627 | } else | 4627 | } else |
4628 | if (pxclk < 0) { | 4628 | if (pxclk < 0) { |
@@ -4634,7 +4634,7 @@ nouveau_bios_run_display_table(struct drm_device *dev, struct dcb_entry *dcbent, | |||
4634 | return 1; | 4634 | return 1; |
4635 | } | 4635 | } |
4636 | 4636 | ||
4637 | NV_TRACE(dev, "0x%04X: parsing clock script 1\n", script); | 4637 | NV_DEBUG_KMS(dev, "0x%04X: parsing clock script 1\n", script); |
4638 | nouveau_bios_run_init_table(dev, script, dcbent); | 4638 | nouveau_bios_run_init_table(dev, script, dcbent); |
4639 | } | 4639 | } |
4640 | 4640 | ||
@@ -5357,19 +5357,17 @@ static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, | |||
5357 | } | 5357 | } |
5358 | 5358 | ||
5359 | tmdstableptr = ROM16(bios->data[bitentry->offset]); | 5359 | tmdstableptr = ROM16(bios->data[bitentry->offset]); |
5360 | 5360 | if (!tmdstableptr) { | |
5361 | if (tmdstableptr == 0x0) { | ||
5362 | NV_ERROR(dev, "Pointer to TMDS table invalid\n"); | 5361 | NV_ERROR(dev, "Pointer to TMDS table invalid\n"); |
5363 | return -EINVAL; | 5362 | return -EINVAL; |
5364 | } | 5363 | } |
5365 | 5364 | ||
5365 | NV_INFO(dev, "TMDS table version %d.%d\n", | ||
5366 | bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); | ||
5367 | |||
5366 | /* nv50+ has v2.0, but we don't parse it atm */ | 5368 | /* nv50+ has v2.0, but we don't parse it atm */ |
5367 | if (bios->data[tmdstableptr] != 0x11) { | 5369 | if (bios->data[tmdstableptr] != 0x11) |
5368 | NV_WARN(dev, | ||
5369 | "TMDS table revision %d.%d not currently supported\n", | ||
5370 | bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf); | ||
5371 | return -ENOSYS; | 5370 | return -ENOSYS; |
5372 | } | ||
5373 | 5371 | ||
5374 | /* | 5372 | /* |
5375 | * These two scripts are odd: they don't seem to get run even when | 5373 | * These two scripts are odd: they don't seem to get run even when |
@@ -5809,6 +5807,22 @@ parse_dcb_gpio_table(struct nvbios *bios) | |||
5809 | gpio->line = tvdac_gpio[1] >> 4; | 5807 | gpio->line = tvdac_gpio[1] >> 4; |
5810 | gpio->invert = tvdac_gpio[0] & 2; | 5808 | gpio->invert = tvdac_gpio[0] & 2; |
5811 | } | 5809 | } |
5810 | } else { | ||
5811 | /* | ||
5812 | * No systematic way to store GPIO info on pre-v2.2 | ||
5813 | * DCBs, try to match the PCI device IDs. | ||
5814 | */ | ||
5815 | |||
5816 | /* Apple iMac G4 NV18 */ | ||
5817 | if (dev->pdev->device == 0x0189 && | ||
5818 | dev->pdev->subsystem_vendor == 0x10de && | ||
5819 | dev->pdev->subsystem_device == 0x0010) { | ||
5820 | struct dcb_gpio_entry *gpio = new_gpio_entry(bios); | ||
5821 | |||
5822 | gpio->tag = DCB_GPIO_TVDAC0; | ||
5823 | gpio->line = 4; | ||
5824 | } | ||
5825 | |||
5812 | } | 5826 | } |
5813 | 5827 | ||
5814 | if (!gpio_table_ptr) | 5828 | if (!gpio_table_ptr) |
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c index 84f85183d041..f6f44779d82f 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bo.c +++ b/drivers/gpu/drm/nouveau/nouveau_bo.c | |||
@@ -36,6 +36,21 @@ | |||
36 | #include <linux/log2.h> | 36 | #include <linux/log2.h> |
37 | #include <linux/slab.h> | 37 | #include <linux/slab.h> |
38 | 38 | ||
39 | int | ||
40 | nouveau_bo_sync_gpu(struct nouveau_bo *nvbo, struct nouveau_channel *chan) | ||
41 | { | ||
42 | struct nouveau_fence *prev_fence = nvbo->bo.sync_obj; | ||
43 | int ret; | ||
44 | |||
45 | if (!prev_fence || nouveau_fence_channel(prev_fence) == chan) | ||
46 | return 0; | ||
47 | |||
48 | spin_lock(&nvbo->bo.lock); | ||
49 | ret = ttm_bo_wait(&nvbo->bo, false, false, false); | ||
50 | spin_unlock(&nvbo->bo.lock); | ||
51 | return ret; | ||
52 | } | ||
53 | |||
39 | static void | 54 | static void |
40 | nouveau_bo_del_ttm(struct ttm_buffer_object *bo) | 55 | nouveau_bo_del_ttm(struct ttm_buffer_object *bo) |
41 | { | 56 | { |
diff --git a/drivers/gpu/drm/nouveau/nouveau_channel.c b/drivers/gpu/drm/nouveau/nouveau_channel.c index 90fdcda332be..0480f064f2c1 100644 --- a/drivers/gpu/drm/nouveau/nouveau_channel.c +++ b/drivers/gpu/drm/nouveau/nouveau_channel.c | |||
@@ -426,18 +426,18 @@ nouveau_ioctl_fifo_free(struct drm_device *dev, void *data, | |||
426 | ***********************************/ | 426 | ***********************************/ |
427 | 427 | ||
428 | struct drm_ioctl_desc nouveau_ioctls[] = { | 428 | struct drm_ioctl_desc nouveau_ioctls[] = { |
429 | DRM_IOCTL_DEF(DRM_NOUVEAU_GETPARAM, nouveau_ioctl_getparam, DRM_AUTH), | 429 | DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_ioctl_getparam, DRM_AUTH), |
430 | DRM_IOCTL_DEF(DRM_NOUVEAU_SETPARAM, nouveau_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 430 | DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
431 | DRM_IOCTL_DEF(DRM_NOUVEAU_CHANNEL_ALLOC, nouveau_ioctl_fifo_alloc, DRM_AUTH), | 431 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_ioctl_fifo_alloc, DRM_AUTH), |
432 | DRM_IOCTL_DEF(DRM_NOUVEAU_CHANNEL_FREE, nouveau_ioctl_fifo_free, DRM_AUTH), | 432 | DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_ioctl_fifo_free, DRM_AUTH), |
433 | DRM_IOCTL_DEF(DRM_NOUVEAU_GROBJ_ALLOC, nouveau_ioctl_grobj_alloc, DRM_AUTH), | 433 | DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_ioctl_grobj_alloc, DRM_AUTH), |
434 | DRM_IOCTL_DEF(DRM_NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_ioctl_notifier_alloc, DRM_AUTH), | 434 | DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_ioctl_notifier_alloc, DRM_AUTH), |
435 | DRM_IOCTL_DEF(DRM_NOUVEAU_GPUOBJ_FREE, nouveau_ioctl_gpuobj_free, DRM_AUTH), | 435 | DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_ioctl_gpuobj_free, DRM_AUTH), |
436 | DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH), | 436 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH), |
437 | DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH), | 437 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH), |
438 | DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH), | 438 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH), |
439 | DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH), | 439 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH), |
440 | DRM_IOCTL_DEF(DRM_NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH), | 440 | DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH), |
441 | }; | 441 | }; |
442 | 442 | ||
443 | int nouveau_max_ioctl = DRM_ARRAY_SIZE(nouveau_ioctls); | 443 | int nouveau_max_ioctl = DRM_ARRAY_SIZE(nouveau_ioctls); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_connector.c b/drivers/gpu/drm/nouveau/nouveau_connector.c index b1b22baf1428..a1473fff06ac 100644 --- a/drivers/gpu/drm/nouveau/nouveau_connector.c +++ b/drivers/gpu/drm/nouveau/nouveau_connector.c | |||
@@ -104,7 +104,7 @@ nouveau_connector_ddc_detect(struct drm_connector *connector, | |||
104 | int i; | 104 | int i; |
105 | 105 | ||
106 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { | 106 | for (i = 0; i < DRM_CONNECTOR_MAX_ENCODER; i++) { |
107 | struct nouveau_i2c_chan *i2c; | 107 | struct nouveau_i2c_chan *i2c = NULL; |
108 | struct nouveau_encoder *nv_encoder; | 108 | struct nouveau_encoder *nv_encoder; |
109 | struct drm_mode_object *obj; | 109 | struct drm_mode_object *obj; |
110 | int id; | 110 | int id; |
@@ -117,7 +117,9 @@ nouveau_connector_ddc_detect(struct drm_connector *connector, | |||
117 | if (!obj) | 117 | if (!obj) |
118 | continue; | 118 | continue; |
119 | nv_encoder = nouveau_encoder(obj_to_encoder(obj)); | 119 | nv_encoder = nouveau_encoder(obj_to_encoder(obj)); |
120 | i2c = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index); | 120 | |
121 | if (nv_encoder->dcb->i2c_index < 0xf) | ||
122 | i2c = nouveau_i2c_find(dev, nv_encoder->dcb->i2c_index); | ||
121 | 123 | ||
122 | if (i2c && nouveau_probe_i2c_addr(i2c, 0x50)) { | 124 | if (i2c && nouveau_probe_i2c_addr(i2c, 0x50)) { |
123 | *pnv_encoder = nv_encoder; | 125 | *pnv_encoder = nv_encoder; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h index e424bf74d706..1e093a069b7b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_drv.h +++ b/drivers/gpu/drm/nouveau/nouveau_drv.h | |||
@@ -1165,6 +1165,7 @@ extern u16 nouveau_bo_rd16(struct nouveau_bo *nvbo, unsigned index); | |||
1165 | extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val); | 1165 | extern void nouveau_bo_wr16(struct nouveau_bo *nvbo, unsigned index, u16 val); |
1166 | extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index); | 1166 | extern u32 nouveau_bo_rd32(struct nouveau_bo *nvbo, unsigned index); |
1167 | extern void nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val); | 1167 | extern void nouveau_bo_wr32(struct nouveau_bo *nvbo, unsigned index, u32 val); |
1168 | extern int nouveau_bo_sync_gpu(struct nouveau_bo *, struct nouveau_channel *); | ||
1168 | 1169 | ||
1169 | /* nouveau_fence.c */ | 1170 | /* nouveau_fence.c */ |
1170 | struct nouveau_fence; | 1171 | struct nouveau_fence; |
diff --git a/drivers/gpu/drm/nouveau/nouveau_gem.c b/drivers/gpu/drm/nouveau/nouveau_gem.c index 0f417ac1b696..79fc5ffff226 100644 --- a/drivers/gpu/drm/nouveau/nouveau_gem.c +++ b/drivers/gpu/drm/nouveau/nouveau_gem.c | |||
@@ -361,16 +361,11 @@ validate_list(struct nouveau_channel *chan, struct list_head *list, | |||
361 | 361 | ||
362 | list_for_each_entry(nvbo, list, entry) { | 362 | list_for_each_entry(nvbo, list, entry) { |
363 | struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index]; | 363 | struct drm_nouveau_gem_pushbuf_bo *b = &pbbo[nvbo->pbbo_index]; |
364 | struct nouveau_fence *prev_fence = nvbo->bo.sync_obj; | ||
365 | 364 | ||
366 | if (prev_fence && nouveau_fence_channel(prev_fence) != chan) { | 365 | ret = nouveau_bo_sync_gpu(nvbo, chan); |
367 | spin_lock(&nvbo->bo.lock); | 366 | if (unlikely(ret)) { |
368 | ret = ttm_bo_wait(&nvbo->bo, false, false, false); | 367 | NV_ERROR(dev, "fail pre-validate sync\n"); |
369 | spin_unlock(&nvbo->bo.lock); | 368 | return ret; |
370 | if (unlikely(ret)) { | ||
371 | NV_ERROR(dev, "fail wait other chan\n"); | ||
372 | return ret; | ||
373 | } | ||
374 | } | 369 | } |
375 | 370 | ||
376 | ret = nouveau_gem_set_domain(nvbo->gem, b->read_domains, | 371 | ret = nouveau_gem_set_domain(nvbo->gem, b->read_domains, |
@@ -381,7 +376,7 @@ validate_list(struct nouveau_channel *chan, struct list_head *list, | |||
381 | return ret; | 376 | return ret; |
382 | } | 377 | } |
383 | 378 | ||
384 | nvbo->channel = chan; | 379 | nvbo->channel = (b->read_domains & (1 << 31)) ? NULL : chan; |
385 | ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, | 380 | ret = ttm_bo_validate(&nvbo->bo, &nvbo->placement, |
386 | false, false, false); | 381 | false, false, false); |
387 | nvbo->channel = NULL; | 382 | nvbo->channel = NULL; |
@@ -390,6 +385,12 @@ validate_list(struct nouveau_channel *chan, struct list_head *list, | |||
390 | return ret; | 385 | return ret; |
391 | } | 386 | } |
392 | 387 | ||
388 | ret = nouveau_bo_sync_gpu(nvbo, chan); | ||
389 | if (unlikely(ret)) { | ||
390 | NV_ERROR(dev, "fail post-validate sync\n"); | ||
391 | return ret; | ||
392 | } | ||
393 | |||
393 | if (nvbo->bo.offset == b->presumed.offset && | 394 | if (nvbo->bo.offset == b->presumed.offset && |
394 | ((nvbo->bo.mem.mem_type == TTM_PL_VRAM && | 395 | ((nvbo->bo.mem.mem_type == TTM_PL_VRAM && |
395 | b->presumed.domain & NOUVEAU_GEM_DOMAIN_VRAM) || | 396 | b->presumed.domain & NOUVEAU_GEM_DOMAIN_VRAM) || |
@@ -615,6 +616,21 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data, | |||
615 | 616 | ||
616 | mutex_lock(&dev->struct_mutex); | 617 | mutex_lock(&dev->struct_mutex); |
617 | 618 | ||
619 | /* Mark push buffers as being used on PFIFO, the validation code | ||
620 | * will then make sure that if the pushbuf bo moves, that they | ||
621 | * happen on the kernel channel, which will in turn cause a sync | ||
622 | * to happen before we try and submit the push buffer. | ||
623 | */ | ||
624 | for (i = 0; i < req->nr_push; i++) { | ||
625 | if (push[i].bo_index >= req->nr_buffers) { | ||
626 | NV_ERROR(dev, "push %d buffer not in list\n", i); | ||
627 | ret = -EINVAL; | ||
628 | goto out; | ||
629 | } | ||
630 | |||
631 | bo[push[i].bo_index].read_domains |= (1 << 31); | ||
632 | } | ||
633 | |||
618 | /* Validate buffer list */ | 634 | /* Validate buffer list */ |
619 | ret = nouveau_gem_pushbuf_validate(chan, file_priv, bo, req->buffers, | 635 | ret = nouveau_gem_pushbuf_validate(chan, file_priv, bo, req->buffers, |
620 | req->nr_buffers, &op, &do_reloc); | 636 | req->nr_buffers, &op, &do_reloc); |
diff --git a/drivers/gpu/drm/nouveau/nouveau_i2c.c b/drivers/gpu/drm/nouveau/nouveau_i2c.c index 0bd407ca3d42..84614858728b 100644 --- a/drivers/gpu/drm/nouveau/nouveau_i2c.c +++ b/drivers/gpu/drm/nouveau/nouveau_i2c.c | |||
@@ -163,7 +163,7 @@ nouveau_i2c_init(struct drm_device *dev, struct dcb_i2c_entry *entry, int index) | |||
163 | if (entry->chan) | 163 | if (entry->chan) |
164 | return -EEXIST; | 164 | return -EEXIST; |
165 | 165 | ||
166 | if (dev_priv->card_type == NV_C0 && entry->read >= NV50_I2C_PORTS) { | 166 | if (dev_priv->card_type >= NV_50 && entry->read >= NV50_I2C_PORTS) { |
167 | NV_ERROR(dev, "unknown i2c port %d\n", entry->read); | 167 | NV_ERROR(dev, "unknown i2c port %d\n", entry->read); |
168 | return -EINVAL; | 168 | return -EINVAL; |
169 | } | 169 | } |
diff --git a/drivers/gpu/drm/nouveau/nouveau_sgdma.c b/drivers/gpu/drm/nouveau/nouveau_sgdma.c index 491767fe4fcf..6b9187d7f67d 100644 --- a/drivers/gpu/drm/nouveau/nouveau_sgdma.c +++ b/drivers/gpu/drm/nouveau/nouveau_sgdma.c | |||
@@ -214,6 +214,7 @@ int | |||
214 | nouveau_sgdma_init(struct drm_device *dev) | 214 | nouveau_sgdma_init(struct drm_device *dev) |
215 | { | 215 | { |
216 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 216 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
217 | struct pci_dev *pdev = dev->pdev; | ||
217 | struct nouveau_gpuobj *gpuobj = NULL; | 218 | struct nouveau_gpuobj *gpuobj = NULL; |
218 | uint32_t aper_size, obj_size; | 219 | uint32_t aper_size, obj_size; |
219 | int i, ret; | 220 | int i, ret; |
@@ -239,10 +240,19 @@ nouveau_sgdma_init(struct drm_device *dev) | |||
239 | 240 | ||
240 | dev_priv->gart_info.sg_dummy_page = | 241 | dev_priv->gart_info.sg_dummy_page = |
241 | alloc_page(GFP_KERNEL|__GFP_DMA32); | 242 | alloc_page(GFP_KERNEL|__GFP_DMA32); |
243 | if (!dev_priv->gart_info.sg_dummy_page) { | ||
244 | nouveau_gpuobj_del(dev, &gpuobj); | ||
245 | return -ENOMEM; | ||
246 | } | ||
247 | |||
242 | set_bit(PG_locked, &dev_priv->gart_info.sg_dummy_page->flags); | 248 | set_bit(PG_locked, &dev_priv->gart_info.sg_dummy_page->flags); |
243 | dev_priv->gart_info.sg_dummy_bus = | 249 | dev_priv->gart_info.sg_dummy_bus = |
244 | pci_map_page(dev->pdev, dev_priv->gart_info.sg_dummy_page, 0, | 250 | pci_map_page(pdev, dev_priv->gart_info.sg_dummy_page, 0, |
245 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); | 251 | PAGE_SIZE, PCI_DMA_BIDIRECTIONAL); |
252 | if (pci_dma_mapping_error(pdev, dev_priv->gart_info.sg_dummy_bus)) { | ||
253 | nouveau_gpuobj_del(dev, &gpuobj); | ||
254 | return -EFAULT; | ||
255 | } | ||
246 | 256 | ||
247 | if (dev_priv->card_type < NV_50) { | 257 | if (dev_priv->card_type < NV_50) { |
248 | /* Maybe use NV_DMA_TARGET_AGP for PCIE? NVIDIA do this, and | 258 | /* Maybe use NV_DMA_TARGET_AGP for PCIE? NVIDIA do this, and |
diff --git a/drivers/gpu/drm/nouveau/nv17_tv.c b/drivers/gpu/drm/nouveau/nv17_tv.c index 44fefb0c7083..eefa5c856932 100644 --- a/drivers/gpu/drm/nouveau/nv17_tv.c +++ b/drivers/gpu/drm/nouveau/nv17_tv.c | |||
@@ -129,6 +129,14 @@ get_tv_detect_quirks(struct drm_device *dev, uint32_t *pin_mask) | |||
129 | return false; | 129 | return false; |
130 | } | 130 | } |
131 | 131 | ||
132 | /* MSI nForce2 IGP */ | ||
133 | if (dev->pdev->device == 0x01f0 && | ||
134 | dev->pdev->subsystem_vendor == 0x1462 && | ||
135 | dev->pdev->subsystem_device == 0x5710) { | ||
136 | *pin_mask = 0xc; | ||
137 | return false; | ||
138 | } | ||
139 | |||
132 | return true; | 140 | return true; |
133 | } | 141 | } |
134 | 142 | ||
diff --git a/drivers/gpu/drm/nouveau/nv50_instmem.c b/drivers/gpu/drm/nouveau/nv50_instmem.c index 37c7b48ab24a..c95bf9b681dd 100644 --- a/drivers/gpu/drm/nouveau/nv50_instmem.c +++ b/drivers/gpu/drm/nouveau/nv50_instmem.c | |||
@@ -278,7 +278,7 @@ nv50_instmem_init(struct drm_device *dev) | |||
278 | /*XXX: incorrect, but needed to make hash func "work" */ | 278 | /*XXX: incorrect, but needed to make hash func "work" */ |
279 | dev_priv->ramht_offset = 0x10000; | 279 | dev_priv->ramht_offset = 0x10000; |
280 | dev_priv->ramht_bits = 9; | 280 | dev_priv->ramht_bits = 9; |
281 | dev_priv->ramht_size = (1 << dev_priv->ramht_bits); | 281 | dev_priv->ramht_size = (1 << dev_priv->ramht_bits) * 8; |
282 | return 0; | 282 | return 0; |
283 | } | 283 | } |
284 | 284 | ||
diff --git a/drivers/gpu/drm/nouveau/nvc0_instmem.c b/drivers/gpu/drm/nouveau/nvc0_instmem.c index 3ab3cdc42173..6b451f864783 100644 --- a/drivers/gpu/drm/nouveau/nvc0_instmem.c +++ b/drivers/gpu/drm/nouveau/nvc0_instmem.c | |||
@@ -142,14 +142,16 @@ int | |||
142 | nvc0_instmem_suspend(struct drm_device *dev) | 142 | nvc0_instmem_suspend(struct drm_device *dev) |
143 | { | 143 | { |
144 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 144 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
145 | u32 *buf; | ||
145 | int i; | 146 | int i; |
146 | 147 | ||
147 | dev_priv->susres.ramin_copy = vmalloc(65536); | 148 | dev_priv->susres.ramin_copy = vmalloc(65536); |
148 | if (!dev_priv->susres.ramin_copy) | 149 | if (!dev_priv->susres.ramin_copy) |
149 | return -ENOMEM; | 150 | return -ENOMEM; |
151 | buf = dev_priv->susres.ramin_copy; | ||
150 | 152 | ||
151 | for (i = 0x700000; i < 0x710000; i += 4) | 153 | for (i = 0; i < 65536; i += 4) |
152 | dev_priv->susres.ramin_copy[i/4] = nv_rd32(dev, i); | 154 | buf[i/4] = nv_rd32(dev, NV04_PRAMIN + i); |
153 | return 0; | 155 | return 0; |
154 | } | 156 | } |
155 | 157 | ||
@@ -157,14 +159,15 @@ void | |||
157 | nvc0_instmem_resume(struct drm_device *dev) | 159 | nvc0_instmem_resume(struct drm_device *dev) |
158 | { | 160 | { |
159 | struct drm_nouveau_private *dev_priv = dev->dev_private; | 161 | struct drm_nouveau_private *dev_priv = dev->dev_private; |
162 | u32 *buf = dev_priv->susres.ramin_copy; | ||
160 | u64 chan; | 163 | u64 chan; |
161 | int i; | 164 | int i; |
162 | 165 | ||
163 | chan = dev_priv->vram_size - dev_priv->ramin_rsvd_vram; | 166 | chan = dev_priv->vram_size - dev_priv->ramin_rsvd_vram; |
164 | nv_wr32(dev, 0x001700, chan >> 16); | 167 | nv_wr32(dev, 0x001700, chan >> 16); |
165 | 168 | ||
166 | for (i = 0x700000; i < 0x710000; i += 4) | 169 | for (i = 0; i < 65536; i += 4) |
167 | nv_wr32(dev, i, dev_priv->susres.ramin_copy[i/4]); | 170 | nv_wr32(dev, NV04_PRAMIN + i, buf[i/4]); |
168 | vfree(dev_priv->susres.ramin_copy); | 171 | vfree(dev_priv->susres.ramin_copy); |
169 | dev_priv->susres.ramin_copy = NULL; | 172 | dev_priv->susres.ramin_copy = NULL; |
170 | 173 | ||
@@ -221,7 +224,7 @@ nvc0_instmem_init(struct drm_device *dev) | |||
221 | /*XXX: incorrect, but needed to make hash func "work" */ | 224 | /*XXX: incorrect, but needed to make hash func "work" */ |
222 | dev_priv->ramht_offset = 0x10000; | 225 | dev_priv->ramht_offset = 0x10000; |
223 | dev_priv->ramht_bits = 9; | 226 | dev_priv->ramht_bits = 9; |
224 | dev_priv->ramht_size = (1 << dev_priv->ramht_bits); | 227 | dev_priv->ramht_size = (1 << dev_priv->ramht_bits) * 8; |
225 | return 0; | 228 | return 0; |
226 | } | 229 | } |
227 | 230 | ||
diff --git a/drivers/gpu/drm/r128/r128_state.c b/drivers/gpu/drm/r128/r128_state.c index 077af1f2f9b4..a9e33ce65918 100644 --- a/drivers/gpu/drm/r128/r128_state.c +++ b/drivers/gpu/drm/r128/r128_state.c | |||
@@ -1639,30 +1639,29 @@ void r128_driver_preclose(struct drm_device *dev, struct drm_file *file_priv) | |||
1639 | r128_do_cleanup_pageflip(dev); | 1639 | r128_do_cleanup_pageflip(dev); |
1640 | } | 1640 | } |
1641 | } | 1641 | } |
1642 | |||
1643 | void r128_driver_lastclose(struct drm_device *dev) | 1642 | void r128_driver_lastclose(struct drm_device *dev) |
1644 | { | 1643 | { |
1645 | r128_do_cleanup_cce(dev); | 1644 | r128_do_cleanup_cce(dev); |
1646 | } | 1645 | } |
1647 | 1646 | ||
1648 | struct drm_ioctl_desc r128_ioctls[] = { | 1647 | struct drm_ioctl_desc r128_ioctls[] = { |
1649 | DRM_IOCTL_DEF(DRM_R128_INIT, r128_cce_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1648 | DRM_IOCTL_DEF_DRV(R128_INIT, r128_cce_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1650 | DRM_IOCTL_DEF(DRM_R128_CCE_START, r128_cce_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1649 | DRM_IOCTL_DEF_DRV(R128_CCE_START, r128_cce_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1651 | DRM_IOCTL_DEF(DRM_R128_CCE_STOP, r128_cce_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1650 | DRM_IOCTL_DEF_DRV(R128_CCE_STOP, r128_cce_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1652 | DRM_IOCTL_DEF(DRM_R128_CCE_RESET, r128_cce_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1651 | DRM_IOCTL_DEF_DRV(R128_CCE_RESET, r128_cce_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1653 | DRM_IOCTL_DEF(DRM_R128_CCE_IDLE, r128_cce_idle, DRM_AUTH), | 1652 | DRM_IOCTL_DEF_DRV(R128_CCE_IDLE, r128_cce_idle, DRM_AUTH), |
1654 | DRM_IOCTL_DEF(DRM_R128_RESET, r128_engine_reset, DRM_AUTH), | 1653 | DRM_IOCTL_DEF_DRV(R128_RESET, r128_engine_reset, DRM_AUTH), |
1655 | DRM_IOCTL_DEF(DRM_R128_FULLSCREEN, r128_fullscreen, DRM_AUTH), | 1654 | DRM_IOCTL_DEF_DRV(R128_FULLSCREEN, r128_fullscreen, DRM_AUTH), |
1656 | DRM_IOCTL_DEF(DRM_R128_SWAP, r128_cce_swap, DRM_AUTH), | 1655 | DRM_IOCTL_DEF_DRV(R128_SWAP, r128_cce_swap, DRM_AUTH), |
1657 | DRM_IOCTL_DEF(DRM_R128_FLIP, r128_cce_flip, DRM_AUTH), | 1656 | DRM_IOCTL_DEF_DRV(R128_FLIP, r128_cce_flip, DRM_AUTH), |
1658 | DRM_IOCTL_DEF(DRM_R128_CLEAR, r128_cce_clear, DRM_AUTH), | 1657 | DRM_IOCTL_DEF_DRV(R128_CLEAR, r128_cce_clear, DRM_AUTH), |
1659 | DRM_IOCTL_DEF(DRM_R128_VERTEX, r128_cce_vertex, DRM_AUTH), | 1658 | DRM_IOCTL_DEF_DRV(R128_VERTEX, r128_cce_vertex, DRM_AUTH), |
1660 | DRM_IOCTL_DEF(DRM_R128_INDICES, r128_cce_indices, DRM_AUTH), | 1659 | DRM_IOCTL_DEF_DRV(R128_INDICES, r128_cce_indices, DRM_AUTH), |
1661 | DRM_IOCTL_DEF(DRM_R128_BLIT, r128_cce_blit, DRM_AUTH), | 1660 | DRM_IOCTL_DEF_DRV(R128_BLIT, r128_cce_blit, DRM_AUTH), |
1662 | DRM_IOCTL_DEF(DRM_R128_DEPTH, r128_cce_depth, DRM_AUTH), | 1661 | DRM_IOCTL_DEF_DRV(R128_DEPTH, r128_cce_depth, DRM_AUTH), |
1663 | DRM_IOCTL_DEF(DRM_R128_STIPPLE, r128_cce_stipple, DRM_AUTH), | 1662 | DRM_IOCTL_DEF_DRV(R128_STIPPLE, r128_cce_stipple, DRM_AUTH), |
1664 | DRM_IOCTL_DEF(DRM_R128_INDIRECT, r128_cce_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1663 | DRM_IOCTL_DEF_DRV(R128_INDIRECT, r128_cce_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1665 | DRM_IOCTL_DEF(DRM_R128_GETPARAM, r128_getparam, DRM_AUTH), | 1664 | DRM_IOCTL_DEF_DRV(R128_GETPARAM, r128_getparam, DRM_AUTH), |
1666 | }; | 1665 | }; |
1667 | 1666 | ||
1668 | int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls); | 1667 | int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls); |
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c index 12ad512bd3d3..577239a24fd5 100644 --- a/drivers/gpu/drm/radeon/atombios_crtc.c +++ b/drivers/gpu/drm/radeon/atombios_crtc.c | |||
@@ -471,6 +471,8 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
471 | struct radeon_encoder *radeon_encoder = NULL; | 471 | struct radeon_encoder *radeon_encoder = NULL; |
472 | u32 adjusted_clock = mode->clock; | 472 | u32 adjusted_clock = mode->clock; |
473 | int encoder_mode = 0; | 473 | int encoder_mode = 0; |
474 | u32 dp_clock = mode->clock; | ||
475 | int bpc = 8; | ||
474 | 476 | ||
475 | /* reset the pll flags */ | 477 | /* reset the pll flags */ |
476 | pll->flags = 0; | 478 | pll->flags = 0; |
@@ -513,6 +515,17 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
513 | if (encoder->crtc == crtc) { | 515 | if (encoder->crtc == crtc) { |
514 | radeon_encoder = to_radeon_encoder(encoder); | 516 | radeon_encoder = to_radeon_encoder(encoder); |
515 | encoder_mode = atombios_get_encoder_mode(encoder); | 517 | encoder_mode = atombios_get_encoder_mode(encoder); |
518 | if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT | ATOM_DEVICE_DFP_SUPPORT)) { | ||
519 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | ||
520 | if (connector) { | ||
521 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | ||
522 | struct radeon_connector_atom_dig *dig_connector = | ||
523 | radeon_connector->con_priv; | ||
524 | |||
525 | dp_clock = dig_connector->dp_clock; | ||
526 | } | ||
527 | } | ||
528 | |||
516 | if (ASIC_IS_AVIVO(rdev)) { | 529 | if (ASIC_IS_AVIVO(rdev)) { |
517 | /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ | 530 | /* DVO wants 2x pixel clock if the DVO chip is in 12 bit mode */ |
518 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) | 531 | if (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1) |
@@ -555,6 +568,14 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
555 | args.v1.usPixelClock = cpu_to_le16(mode->clock / 10); | 568 | args.v1.usPixelClock = cpu_to_le16(mode->clock / 10); |
556 | args.v1.ucTransmitterID = radeon_encoder->encoder_id; | 569 | args.v1.ucTransmitterID = radeon_encoder->encoder_id; |
557 | args.v1.ucEncodeMode = encoder_mode; | 570 | args.v1.ucEncodeMode = encoder_mode; |
571 | if (encoder_mode == ATOM_ENCODER_MODE_DP) { | ||
572 | /* may want to enable SS on DP eventually */ | ||
573 | /* args.v1.ucConfig |= | ||
574 | ADJUST_DISPLAY_CONFIG_SS_ENABLE;*/ | ||
575 | } else if (encoder_mode == ATOM_ENCODER_MODE_LVDS) { | ||
576 | args.v1.ucConfig |= | ||
577 | ADJUST_DISPLAY_CONFIG_SS_ENABLE; | ||
578 | } | ||
558 | 579 | ||
559 | atom_execute_table(rdev->mode_info.atom_context, | 580 | atom_execute_table(rdev->mode_info.atom_context, |
560 | index, (uint32_t *)&args); | 581 | index, (uint32_t *)&args); |
@@ -568,10 +589,20 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
568 | if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { | 589 | if (radeon_encoder->devices & (ATOM_DEVICE_DFP_SUPPORT)) { |
569 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 590 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
570 | 591 | ||
571 | if (encoder_mode == ATOM_ENCODER_MODE_DP) | 592 | if (encoder_mode == ATOM_ENCODER_MODE_DP) { |
593 | /* may want to enable SS on DP/eDP eventually */ | ||
594 | /*args.v3.sInput.ucDispPllConfig |= | ||
595 | DISPPLL_CONFIG_SS_ENABLE;*/ | ||
572 | args.v3.sInput.ucDispPllConfig |= | 596 | args.v3.sInput.ucDispPllConfig |= |
573 | DISPPLL_CONFIG_COHERENT_MODE; | 597 | DISPPLL_CONFIG_COHERENT_MODE; |
574 | else { | 598 | /* 16200 or 27000 */ |
599 | args.v3.sInput.usPixelClock = cpu_to_le16(dp_clock / 10); | ||
600 | } else { | ||
601 | if (encoder_mode == ATOM_ENCODER_MODE_HDMI) { | ||
602 | /* deep color support */ | ||
603 | args.v3.sInput.usPixelClock = | ||
604 | cpu_to_le16((mode->clock * bpc / 8) / 10); | ||
605 | } | ||
575 | if (dig->coherent_mode) | 606 | if (dig->coherent_mode) |
576 | args.v3.sInput.ucDispPllConfig |= | 607 | args.v3.sInput.ucDispPllConfig |= |
577 | DISPPLL_CONFIG_COHERENT_MODE; | 608 | DISPPLL_CONFIG_COHERENT_MODE; |
@@ -580,13 +611,19 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, | |||
580 | DISPPLL_CONFIG_DUAL_LINK; | 611 | DISPPLL_CONFIG_DUAL_LINK; |
581 | } | 612 | } |
582 | } else if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { | 613 | } else if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) { |
583 | /* may want to enable SS on DP/eDP eventually */ | 614 | if (encoder_mode == ATOM_ENCODER_MODE_DP) { |
584 | /*args.v3.sInput.ucDispPllConfig |= | 615 | /* may want to enable SS on DP/eDP eventually */ |
585 | DISPPLL_CONFIG_SS_ENABLE;*/ | 616 | /*args.v3.sInput.ucDispPllConfig |= |
586 | if (encoder_mode == ATOM_ENCODER_MODE_DP) | 617 | DISPPLL_CONFIG_SS_ENABLE;*/ |
587 | args.v3.sInput.ucDispPllConfig |= | 618 | args.v3.sInput.ucDispPllConfig |= |
588 | DISPPLL_CONFIG_COHERENT_MODE; | 619 | DISPPLL_CONFIG_COHERENT_MODE; |
589 | else { | 620 | /* 16200 or 27000 */ |
621 | args.v3.sInput.usPixelClock = cpu_to_le16(dp_clock / 10); | ||
622 | } else if (encoder_mode == ATOM_ENCODER_MODE_LVDS) { | ||
623 | /* want to enable SS on LVDS eventually */ | ||
624 | /*args.v3.sInput.ucDispPllConfig |= | ||
625 | DISPPLL_CONFIG_SS_ENABLE;*/ | ||
626 | } else { | ||
590 | if (mode->clock > 165000) | 627 | if (mode->clock > 165000) |
591 | args.v3.sInput.ucDispPllConfig |= | 628 | args.v3.sInput.ucDispPllConfig |= |
592 | DISPPLL_CONFIG_DUAL_LINK; | 629 | DISPPLL_CONFIG_DUAL_LINK; |
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c index 36e0d4b545e6..4e7778d44b8d 100644 --- a/drivers/gpu/drm/radeon/atombios_dp.c +++ b/drivers/gpu/drm/radeon/atombios_dp.c | |||
@@ -610,7 +610,7 @@ void dp_link_train(struct drm_encoder *encoder, | |||
610 | enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER; | 610 | enc_id |= ATOM_DP_CONFIG_DIG2_ENCODER; |
611 | else | 611 | else |
612 | enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER; | 612 | enc_id |= ATOM_DP_CONFIG_DIG1_ENCODER; |
613 | if (dig_connector->linkb) | 613 | if (dig->linkb) |
614 | enc_id |= ATOM_DP_CONFIG_LINK_B; | 614 | enc_id |= ATOM_DP_CONFIG_LINK_B; |
615 | else | 615 | else |
616 | enc_id |= ATOM_DP_CONFIG_LINK_A; | 616 | enc_id |= ATOM_DP_CONFIG_LINK_A; |
diff --git a/drivers/gpu/drm/radeon/radeon_agp.c b/drivers/gpu/drm/radeon/radeon_agp.c index f40dfb77f9b1..bd2f33e5c91a 100644 --- a/drivers/gpu/drm/radeon/radeon_agp.c +++ b/drivers/gpu/drm/radeon/radeon_agp.c | |||
@@ -156,7 +156,13 @@ int radeon_agp_init(struct radeon_device *rdev) | |||
156 | } | 156 | } |
157 | 157 | ||
158 | mode.mode = info.mode; | 158 | mode.mode = info.mode; |
159 | agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; | 159 | /* chips with the agp to pcie bridge don't have the AGP_STATUS register |
160 | * Just use the whatever mode the host sets up. | ||
161 | */ | ||
162 | if (rdev->family <= CHIP_RV350) | ||
163 | agp_status = (RREG32(RADEON_AGP_STATUS) | RADEON_AGPv3_MODE) & mode.mode; | ||
164 | else | ||
165 | agp_status = mode.mode; | ||
160 | is_v3 = !!(agp_status & RADEON_AGPv3_MODE); | 166 | is_v3 = !!(agp_status & RADEON_AGPv3_MODE); |
161 | 167 | ||
162 | if (is_v3) { | 168 | if (is_v3) { |
diff --git a/drivers/gpu/drm/radeon/radeon_asic.c b/drivers/gpu/drm/radeon/radeon_asic.c index 646f96f97c77..a21bf88e8c2d 100644 --- a/drivers/gpu/drm/radeon/radeon_asic.c +++ b/drivers/gpu/drm/radeon/radeon_asic.c | |||
@@ -733,6 +733,7 @@ static struct radeon_asic evergreen_asic = { | |||
733 | .set_engine_clock = &radeon_atom_set_engine_clock, | 733 | .set_engine_clock = &radeon_atom_set_engine_clock, |
734 | .get_memory_clock = &radeon_atom_get_memory_clock, | 734 | .get_memory_clock = &radeon_atom_get_memory_clock, |
735 | .set_memory_clock = &radeon_atom_set_memory_clock, | 735 | .set_memory_clock = &radeon_atom_set_memory_clock, |
736 | .get_pcie_lanes = NULL, | ||
736 | .set_pcie_lanes = NULL, | 737 | .set_pcie_lanes = NULL, |
737 | .set_clock_gating = NULL, | 738 | .set_clock_gating = NULL, |
738 | .set_surface_reg = r600_set_surface_reg, | 739 | .set_surface_reg = r600_set_surface_reg, |
diff --git a/drivers/gpu/drm/radeon/radeon_atombios.c b/drivers/gpu/drm/radeon/radeon_atombios.c index 6d30868744ee..61141981880d 100644 --- a/drivers/gpu/drm/radeon/radeon_atombios.c +++ b/drivers/gpu/drm/radeon/radeon_atombios.c | |||
@@ -32,11 +32,11 @@ | |||
32 | 32 | ||
33 | /* from radeon_encoder.c */ | 33 | /* from radeon_encoder.c */ |
34 | extern uint32_t | 34 | extern uint32_t |
35 | radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, | 35 | radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, |
36 | uint8_t dac); | 36 | uint8_t dac); |
37 | extern void radeon_link_encoder_connector(struct drm_device *dev); | 37 | extern void radeon_link_encoder_connector(struct drm_device *dev); |
38 | extern void | 38 | extern void |
39 | radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, | 39 | radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, |
40 | uint32_t supported_device); | 40 | uint32_t supported_device); |
41 | 41 | ||
42 | /* from radeon_connector.c */ | 42 | /* from radeon_connector.c */ |
@@ -46,14 +46,14 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
46 | uint32_t supported_device, | 46 | uint32_t supported_device, |
47 | int connector_type, | 47 | int connector_type, |
48 | struct radeon_i2c_bus_rec *i2c_bus, | 48 | struct radeon_i2c_bus_rec *i2c_bus, |
49 | bool linkb, uint32_t igp_lane_info, | 49 | uint32_t igp_lane_info, |
50 | uint16_t connector_object_id, | 50 | uint16_t connector_object_id, |
51 | struct radeon_hpd *hpd, | 51 | struct radeon_hpd *hpd, |
52 | struct radeon_router *router); | 52 | struct radeon_router *router); |
53 | 53 | ||
54 | /* from radeon_legacy_encoder.c */ | 54 | /* from radeon_legacy_encoder.c */ |
55 | extern void | 55 | extern void |
56 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, | 56 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, |
57 | uint32_t supported_device); | 57 | uint32_t supported_device); |
58 | 58 | ||
59 | union atom_supported_devices { | 59 | union atom_supported_devices { |
@@ -226,6 +226,8 @@ static struct radeon_hpd radeon_atom_get_hpd_info_from_gpio(struct radeon_device | |||
226 | struct radeon_hpd hpd; | 226 | struct radeon_hpd hpd; |
227 | u32 reg; | 227 | u32 reg; |
228 | 228 | ||
229 | memset(&hpd, 0, sizeof(struct radeon_hpd)); | ||
230 | |||
229 | if (ASIC_IS_DCE4(rdev)) | 231 | if (ASIC_IS_DCE4(rdev)) |
230 | reg = EVERGREEN_DC_GPIO_HPD_A; | 232 | reg = EVERGREEN_DC_GPIO_HPD_A; |
231 | else | 233 | else |
@@ -477,7 +479,6 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
477 | int i, j, k, path_size, device_support; | 479 | int i, j, k, path_size, device_support; |
478 | int connector_type; | 480 | int connector_type; |
479 | u16 igp_lane_info, conn_id, connector_object_id; | 481 | u16 igp_lane_info, conn_id, connector_object_id; |
480 | bool linkb; | ||
481 | struct radeon_i2c_bus_rec ddc_bus; | 482 | struct radeon_i2c_bus_rec ddc_bus; |
482 | struct radeon_router router; | 483 | struct radeon_router router; |
483 | struct radeon_gpio_rec gpio; | 484 | struct radeon_gpio_rec gpio; |
@@ -510,7 +511,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
510 | addr += path_size; | 511 | addr += path_size; |
511 | path = (ATOM_DISPLAY_OBJECT_PATH *) addr; | 512 | path = (ATOM_DISPLAY_OBJECT_PATH *) addr; |
512 | path_size += le16_to_cpu(path->usSize); | 513 | path_size += le16_to_cpu(path->usSize); |
513 | linkb = false; | 514 | |
514 | if (device_support & le16_to_cpu(path->usDeviceTag)) { | 515 | if (device_support & le16_to_cpu(path->usDeviceTag)) { |
515 | uint8_t con_obj_id, con_obj_num, con_obj_type; | 516 | uint8_t con_obj_id, con_obj_num, con_obj_type; |
516 | 517 | ||
@@ -601,13 +602,10 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
601 | OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT; | 602 | OBJECT_TYPE_MASK) >> OBJECT_TYPE_SHIFT; |
602 | 603 | ||
603 | if (grph_obj_type == GRAPH_OBJECT_TYPE_ENCODER) { | 604 | if (grph_obj_type == GRAPH_OBJECT_TYPE_ENCODER) { |
604 | if (grph_obj_num == 2) | 605 | u16 encoder_obj = le16_to_cpu(path->usGraphicObjIds[j]); |
605 | linkb = true; | ||
606 | else | ||
607 | linkb = false; | ||
608 | 606 | ||
609 | radeon_add_atom_encoder(dev, | 607 | radeon_add_atom_encoder(dev, |
610 | grph_obj_id, | 608 | encoder_obj, |
611 | le16_to_cpu | 609 | le16_to_cpu |
612 | (path-> | 610 | (path-> |
613 | usDeviceTag)); | 611 | usDeviceTag)); |
@@ -744,7 +742,7 @@ bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev) | |||
744 | le16_to_cpu(path-> | 742 | le16_to_cpu(path-> |
745 | usDeviceTag), | 743 | usDeviceTag), |
746 | connector_type, &ddc_bus, | 744 | connector_type, &ddc_bus, |
747 | linkb, igp_lane_info, | 745 | igp_lane_info, |
748 | connector_object_id, | 746 | connector_object_id, |
749 | &hpd, | 747 | &hpd, |
750 | &router); | 748 | &router); |
@@ -933,13 +931,13 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct | |||
933 | 931 | ||
934 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) | 932 | if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) |
935 | radeon_add_atom_encoder(dev, | 933 | radeon_add_atom_encoder(dev, |
936 | radeon_get_encoder_id(dev, | 934 | radeon_get_encoder_enum(dev, |
937 | (1 << i), | 935 | (1 << i), |
938 | dac), | 936 | dac), |
939 | (1 << i)); | 937 | (1 << i)); |
940 | else | 938 | else |
941 | radeon_add_legacy_encoder(dev, | 939 | radeon_add_legacy_encoder(dev, |
942 | radeon_get_encoder_id(dev, | 940 | radeon_get_encoder_enum(dev, |
943 | (1 << i), | 941 | (1 << i), |
944 | dac), | 942 | dac), |
945 | (1 << i)); | 943 | (1 << i)); |
@@ -996,7 +994,7 @@ bool radeon_get_atom_connector_info_from_supported_devices_table(struct | |||
996 | bios_connectors[i]. | 994 | bios_connectors[i]. |
997 | connector_type, | 995 | connector_type, |
998 | &bios_connectors[i].ddc_bus, | 996 | &bios_connectors[i].ddc_bus, |
999 | false, 0, | 997 | 0, |
1000 | connector_object_id, | 998 | connector_object_id, |
1001 | &bios_connectors[i].hpd, | 999 | &bios_connectors[i].hpd, |
1002 | &router); | 1000 | &router); |
@@ -1183,7 +1181,7 @@ bool radeon_atombios_sideport_present(struct radeon_device *rdev) | |||
1183 | return true; | 1181 | return true; |
1184 | break; | 1182 | break; |
1185 | case 2: | 1183 | case 2: |
1186 | if (igp_info->info_2.ucMemoryType & 0x0f) | 1184 | if (igp_info->info_2.ulBootUpSidePortClock) |
1187 | return true; | 1185 | return true; |
1188 | break; | 1186 | break; |
1189 | default: | 1187 | default: |
@@ -1305,6 +1303,7 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct | |||
1305 | union lvds_info *lvds_info; | 1303 | union lvds_info *lvds_info; |
1306 | uint8_t frev, crev; | 1304 | uint8_t frev, crev; |
1307 | struct radeon_encoder_atom_dig *lvds = NULL; | 1305 | struct radeon_encoder_atom_dig *lvds = NULL; |
1306 | int encoder_enum = (encoder->encoder_enum & ENUM_ID_MASK) >> ENUM_ID_SHIFT; | ||
1308 | 1307 | ||
1309 | if (atom_parse_data_header(mode_info->atom_context, index, NULL, | 1308 | if (atom_parse_data_header(mode_info->atom_context, index, NULL, |
1310 | &frev, &crev, &data_offset)) { | 1309 | &frev, &crev, &data_offset)) { |
@@ -1368,6 +1367,12 @@ struct radeon_encoder_atom_dig *radeon_atombios_get_lvds_info(struct | |||
1368 | } | 1367 | } |
1369 | 1368 | ||
1370 | encoder->native_mode = lvds->native_mode; | 1369 | encoder->native_mode = lvds->native_mode; |
1370 | |||
1371 | if (encoder_enum == 2) | ||
1372 | lvds->linkb = true; | ||
1373 | else | ||
1374 | lvds->linkb = false; | ||
1375 | |||
1371 | } | 1376 | } |
1372 | return lvds; | 1377 | return lvds; |
1373 | } | 1378 | } |
diff --git a/drivers/gpu/drm/radeon/radeon_combios.c b/drivers/gpu/drm/radeon/radeon_combios.c index 885dcfac1838..bd74e428bd14 100644 --- a/drivers/gpu/drm/radeon/radeon_combios.c +++ b/drivers/gpu/drm/radeon/radeon_combios.c | |||
@@ -39,8 +39,8 @@ | |||
39 | 39 | ||
40 | /* from radeon_encoder.c */ | 40 | /* from radeon_encoder.c */ |
41 | extern uint32_t | 41 | extern uint32_t |
42 | radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, | 42 | radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, |
43 | uint8_t dac); | 43 | uint8_t dac); |
44 | extern void radeon_link_encoder_connector(struct drm_device *dev); | 44 | extern void radeon_link_encoder_connector(struct drm_device *dev); |
45 | 45 | ||
46 | /* from radeon_connector.c */ | 46 | /* from radeon_connector.c */ |
@@ -55,7 +55,7 @@ radeon_add_legacy_connector(struct drm_device *dev, | |||
55 | 55 | ||
56 | /* from radeon_legacy_encoder.c */ | 56 | /* from radeon_legacy_encoder.c */ |
57 | extern void | 57 | extern void |
58 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, | 58 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, |
59 | uint32_t supported_device); | 59 | uint32_t supported_device); |
60 | 60 | ||
61 | /* old legacy ATI BIOS routines */ | 61 | /* old legacy ATI BIOS routines */ |
@@ -1505,7 +1505,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1505 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1505 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1506 | hpd.hpd = RADEON_HPD_NONE; | 1506 | hpd.hpd = RADEON_HPD_NONE; |
1507 | radeon_add_legacy_encoder(dev, | 1507 | radeon_add_legacy_encoder(dev, |
1508 | radeon_get_encoder_id(dev, | 1508 | radeon_get_encoder_enum(dev, |
1509 | ATOM_DEVICE_CRT1_SUPPORT, | 1509 | ATOM_DEVICE_CRT1_SUPPORT, |
1510 | 1), | 1510 | 1), |
1511 | ATOM_DEVICE_CRT1_SUPPORT); | 1511 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -1520,7 +1520,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1520 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0); | 1520 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_NONE_DETECTED, 0, 0); |
1521 | hpd.hpd = RADEON_HPD_NONE; | 1521 | hpd.hpd = RADEON_HPD_NONE; |
1522 | radeon_add_legacy_encoder(dev, | 1522 | radeon_add_legacy_encoder(dev, |
1523 | radeon_get_encoder_id(dev, | 1523 | radeon_get_encoder_enum(dev, |
1524 | ATOM_DEVICE_LCD1_SUPPORT, | 1524 | ATOM_DEVICE_LCD1_SUPPORT, |
1525 | 0), | 1525 | 0), |
1526 | ATOM_DEVICE_LCD1_SUPPORT); | 1526 | ATOM_DEVICE_LCD1_SUPPORT); |
@@ -1535,7 +1535,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1535 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1535 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1536 | hpd.hpd = RADEON_HPD_NONE; | 1536 | hpd.hpd = RADEON_HPD_NONE; |
1537 | radeon_add_legacy_encoder(dev, | 1537 | radeon_add_legacy_encoder(dev, |
1538 | radeon_get_encoder_id(dev, | 1538 | radeon_get_encoder_enum(dev, |
1539 | ATOM_DEVICE_CRT1_SUPPORT, | 1539 | ATOM_DEVICE_CRT1_SUPPORT, |
1540 | 1), | 1540 | 1), |
1541 | ATOM_DEVICE_CRT1_SUPPORT); | 1541 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -1550,12 +1550,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1550 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); | 1550 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1551 | hpd.hpd = RADEON_HPD_1; | 1551 | hpd.hpd = RADEON_HPD_1; |
1552 | radeon_add_legacy_encoder(dev, | 1552 | radeon_add_legacy_encoder(dev, |
1553 | radeon_get_encoder_id(dev, | 1553 | radeon_get_encoder_enum(dev, |
1554 | ATOM_DEVICE_DFP1_SUPPORT, | 1554 | ATOM_DEVICE_DFP1_SUPPORT, |
1555 | 0), | 1555 | 0), |
1556 | ATOM_DEVICE_DFP1_SUPPORT); | 1556 | ATOM_DEVICE_DFP1_SUPPORT); |
1557 | radeon_add_legacy_encoder(dev, | 1557 | radeon_add_legacy_encoder(dev, |
1558 | radeon_get_encoder_id(dev, | 1558 | radeon_get_encoder_enum(dev, |
1559 | ATOM_DEVICE_CRT2_SUPPORT, | 1559 | ATOM_DEVICE_CRT2_SUPPORT, |
1560 | 2), | 1560 | 2), |
1561 | ATOM_DEVICE_CRT2_SUPPORT); | 1561 | ATOM_DEVICE_CRT2_SUPPORT); |
@@ -1571,7 +1571,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1571 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1571 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1572 | hpd.hpd = RADEON_HPD_NONE; | 1572 | hpd.hpd = RADEON_HPD_NONE; |
1573 | radeon_add_legacy_encoder(dev, | 1573 | radeon_add_legacy_encoder(dev, |
1574 | radeon_get_encoder_id(dev, | 1574 | radeon_get_encoder_enum(dev, |
1575 | ATOM_DEVICE_CRT1_SUPPORT, | 1575 | ATOM_DEVICE_CRT1_SUPPORT, |
1576 | 1), | 1576 | 1), |
1577 | ATOM_DEVICE_CRT1_SUPPORT); | 1577 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -1588,7 +1588,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1588 | ddc_i2c.valid = false; | 1588 | ddc_i2c.valid = false; |
1589 | hpd.hpd = RADEON_HPD_NONE; | 1589 | hpd.hpd = RADEON_HPD_NONE; |
1590 | radeon_add_legacy_encoder(dev, | 1590 | radeon_add_legacy_encoder(dev, |
1591 | radeon_get_encoder_id(dev, | 1591 | radeon_get_encoder_enum(dev, |
1592 | ATOM_DEVICE_TV1_SUPPORT, | 1592 | ATOM_DEVICE_TV1_SUPPORT, |
1593 | 2), | 1593 | 2), |
1594 | ATOM_DEVICE_TV1_SUPPORT); | 1594 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1607,7 +1607,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1607 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); | 1607 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1608 | hpd.hpd = RADEON_HPD_NONE; | 1608 | hpd.hpd = RADEON_HPD_NONE; |
1609 | radeon_add_legacy_encoder(dev, | 1609 | radeon_add_legacy_encoder(dev, |
1610 | radeon_get_encoder_id(dev, | 1610 | radeon_get_encoder_enum(dev, |
1611 | ATOM_DEVICE_LCD1_SUPPORT, | 1611 | ATOM_DEVICE_LCD1_SUPPORT, |
1612 | 0), | 1612 | 0), |
1613 | ATOM_DEVICE_LCD1_SUPPORT); | 1613 | ATOM_DEVICE_LCD1_SUPPORT); |
@@ -1619,7 +1619,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1619 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1619 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1620 | hpd.hpd = RADEON_HPD_NONE; | 1620 | hpd.hpd = RADEON_HPD_NONE; |
1621 | radeon_add_legacy_encoder(dev, | 1621 | radeon_add_legacy_encoder(dev, |
1622 | radeon_get_encoder_id(dev, | 1622 | radeon_get_encoder_enum(dev, |
1623 | ATOM_DEVICE_CRT2_SUPPORT, | 1623 | ATOM_DEVICE_CRT2_SUPPORT, |
1624 | 2), | 1624 | 2), |
1625 | ATOM_DEVICE_CRT2_SUPPORT); | 1625 | ATOM_DEVICE_CRT2_SUPPORT); |
@@ -1631,7 +1631,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1631 | ddc_i2c.valid = false; | 1631 | ddc_i2c.valid = false; |
1632 | hpd.hpd = RADEON_HPD_NONE; | 1632 | hpd.hpd = RADEON_HPD_NONE; |
1633 | radeon_add_legacy_encoder(dev, | 1633 | radeon_add_legacy_encoder(dev, |
1634 | radeon_get_encoder_id(dev, | 1634 | radeon_get_encoder_enum(dev, |
1635 | ATOM_DEVICE_TV1_SUPPORT, | 1635 | ATOM_DEVICE_TV1_SUPPORT, |
1636 | 2), | 1636 | 2), |
1637 | ATOM_DEVICE_TV1_SUPPORT); | 1637 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1648,7 +1648,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1648 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); | 1648 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1649 | hpd.hpd = RADEON_HPD_NONE; | 1649 | hpd.hpd = RADEON_HPD_NONE; |
1650 | radeon_add_legacy_encoder(dev, | 1650 | radeon_add_legacy_encoder(dev, |
1651 | radeon_get_encoder_id(dev, | 1651 | radeon_get_encoder_enum(dev, |
1652 | ATOM_DEVICE_LCD1_SUPPORT, | 1652 | ATOM_DEVICE_LCD1_SUPPORT, |
1653 | 0), | 1653 | 0), |
1654 | ATOM_DEVICE_LCD1_SUPPORT); | 1654 | ATOM_DEVICE_LCD1_SUPPORT); |
@@ -1660,12 +1660,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1660 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1660 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1661 | hpd.hpd = RADEON_HPD_2; /* ??? */ | 1661 | hpd.hpd = RADEON_HPD_2; /* ??? */ |
1662 | radeon_add_legacy_encoder(dev, | 1662 | radeon_add_legacy_encoder(dev, |
1663 | radeon_get_encoder_id(dev, | 1663 | radeon_get_encoder_enum(dev, |
1664 | ATOM_DEVICE_DFP2_SUPPORT, | 1664 | ATOM_DEVICE_DFP2_SUPPORT, |
1665 | 0), | 1665 | 0), |
1666 | ATOM_DEVICE_DFP2_SUPPORT); | 1666 | ATOM_DEVICE_DFP2_SUPPORT); |
1667 | radeon_add_legacy_encoder(dev, | 1667 | radeon_add_legacy_encoder(dev, |
1668 | radeon_get_encoder_id(dev, | 1668 | radeon_get_encoder_enum(dev, |
1669 | ATOM_DEVICE_CRT1_SUPPORT, | 1669 | ATOM_DEVICE_CRT1_SUPPORT, |
1670 | 1), | 1670 | 1), |
1671 | ATOM_DEVICE_CRT1_SUPPORT); | 1671 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -1680,7 +1680,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1680 | ddc_i2c.valid = false; | 1680 | ddc_i2c.valid = false; |
1681 | hpd.hpd = RADEON_HPD_NONE; | 1681 | hpd.hpd = RADEON_HPD_NONE; |
1682 | radeon_add_legacy_encoder(dev, | 1682 | radeon_add_legacy_encoder(dev, |
1683 | radeon_get_encoder_id(dev, | 1683 | radeon_get_encoder_enum(dev, |
1684 | ATOM_DEVICE_TV1_SUPPORT, | 1684 | ATOM_DEVICE_TV1_SUPPORT, |
1685 | 2), | 1685 | 2), |
1686 | ATOM_DEVICE_TV1_SUPPORT); | 1686 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1697,7 +1697,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1697 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); | 1697 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1698 | hpd.hpd = RADEON_HPD_NONE; | 1698 | hpd.hpd = RADEON_HPD_NONE; |
1699 | radeon_add_legacy_encoder(dev, | 1699 | radeon_add_legacy_encoder(dev, |
1700 | radeon_get_encoder_id(dev, | 1700 | radeon_get_encoder_enum(dev, |
1701 | ATOM_DEVICE_LCD1_SUPPORT, | 1701 | ATOM_DEVICE_LCD1_SUPPORT, |
1702 | 0), | 1702 | 0), |
1703 | ATOM_DEVICE_LCD1_SUPPORT); | 1703 | ATOM_DEVICE_LCD1_SUPPORT); |
@@ -1709,12 +1709,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1709 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1709 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1710 | hpd.hpd = RADEON_HPD_1; /* ??? */ | 1710 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
1711 | radeon_add_legacy_encoder(dev, | 1711 | radeon_add_legacy_encoder(dev, |
1712 | radeon_get_encoder_id(dev, | 1712 | radeon_get_encoder_enum(dev, |
1713 | ATOM_DEVICE_DFP1_SUPPORT, | 1713 | ATOM_DEVICE_DFP1_SUPPORT, |
1714 | 0), | 1714 | 0), |
1715 | ATOM_DEVICE_DFP1_SUPPORT); | 1715 | ATOM_DEVICE_DFP1_SUPPORT); |
1716 | radeon_add_legacy_encoder(dev, | 1716 | radeon_add_legacy_encoder(dev, |
1717 | radeon_get_encoder_id(dev, | 1717 | radeon_get_encoder_enum(dev, |
1718 | ATOM_DEVICE_CRT1_SUPPORT, | 1718 | ATOM_DEVICE_CRT1_SUPPORT, |
1719 | 1), | 1719 | 1), |
1720 | ATOM_DEVICE_CRT1_SUPPORT); | 1720 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -1728,7 +1728,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1728 | ddc_i2c.valid = false; | 1728 | ddc_i2c.valid = false; |
1729 | hpd.hpd = RADEON_HPD_NONE; | 1729 | hpd.hpd = RADEON_HPD_NONE; |
1730 | radeon_add_legacy_encoder(dev, | 1730 | radeon_add_legacy_encoder(dev, |
1731 | radeon_get_encoder_id(dev, | 1731 | radeon_get_encoder_enum(dev, |
1732 | ATOM_DEVICE_TV1_SUPPORT, | 1732 | ATOM_DEVICE_TV1_SUPPORT, |
1733 | 2), | 1733 | 2), |
1734 | ATOM_DEVICE_TV1_SUPPORT); | 1734 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1745,7 +1745,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1745 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); | 1745 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1746 | hpd.hpd = RADEON_HPD_NONE; | 1746 | hpd.hpd = RADEON_HPD_NONE; |
1747 | radeon_add_legacy_encoder(dev, | 1747 | radeon_add_legacy_encoder(dev, |
1748 | radeon_get_encoder_id(dev, | 1748 | radeon_get_encoder_enum(dev, |
1749 | ATOM_DEVICE_LCD1_SUPPORT, | 1749 | ATOM_DEVICE_LCD1_SUPPORT, |
1750 | 0), | 1750 | 0), |
1751 | ATOM_DEVICE_LCD1_SUPPORT); | 1751 | ATOM_DEVICE_LCD1_SUPPORT); |
@@ -1757,7 +1757,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1757 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1757 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1758 | hpd.hpd = RADEON_HPD_NONE; | 1758 | hpd.hpd = RADEON_HPD_NONE; |
1759 | radeon_add_legacy_encoder(dev, | 1759 | radeon_add_legacy_encoder(dev, |
1760 | radeon_get_encoder_id(dev, | 1760 | radeon_get_encoder_enum(dev, |
1761 | ATOM_DEVICE_CRT1_SUPPORT, | 1761 | ATOM_DEVICE_CRT1_SUPPORT, |
1762 | 1), | 1762 | 1), |
1763 | ATOM_DEVICE_CRT1_SUPPORT); | 1763 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -1769,7 +1769,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1769 | ddc_i2c.valid = false; | 1769 | ddc_i2c.valid = false; |
1770 | hpd.hpd = RADEON_HPD_NONE; | 1770 | hpd.hpd = RADEON_HPD_NONE; |
1771 | radeon_add_legacy_encoder(dev, | 1771 | radeon_add_legacy_encoder(dev, |
1772 | radeon_get_encoder_id(dev, | 1772 | radeon_get_encoder_enum(dev, |
1773 | ATOM_DEVICE_TV1_SUPPORT, | 1773 | ATOM_DEVICE_TV1_SUPPORT, |
1774 | 2), | 1774 | 2), |
1775 | ATOM_DEVICE_TV1_SUPPORT); | 1775 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1786,12 +1786,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1786 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); | 1786 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); |
1787 | hpd.hpd = RADEON_HPD_2; /* ??? */ | 1787 | hpd.hpd = RADEON_HPD_2; /* ??? */ |
1788 | radeon_add_legacy_encoder(dev, | 1788 | radeon_add_legacy_encoder(dev, |
1789 | radeon_get_encoder_id(dev, | 1789 | radeon_get_encoder_enum(dev, |
1790 | ATOM_DEVICE_DFP2_SUPPORT, | 1790 | ATOM_DEVICE_DFP2_SUPPORT, |
1791 | 0), | 1791 | 0), |
1792 | ATOM_DEVICE_DFP2_SUPPORT); | 1792 | ATOM_DEVICE_DFP2_SUPPORT); |
1793 | radeon_add_legacy_encoder(dev, | 1793 | radeon_add_legacy_encoder(dev, |
1794 | radeon_get_encoder_id(dev, | 1794 | radeon_get_encoder_enum(dev, |
1795 | ATOM_DEVICE_CRT2_SUPPORT, | 1795 | ATOM_DEVICE_CRT2_SUPPORT, |
1796 | 2), | 1796 | 2), |
1797 | ATOM_DEVICE_CRT2_SUPPORT); | 1797 | ATOM_DEVICE_CRT2_SUPPORT); |
@@ -1806,7 +1806,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1806 | ddc_i2c.valid = false; | 1806 | ddc_i2c.valid = false; |
1807 | hpd.hpd = RADEON_HPD_NONE; | 1807 | hpd.hpd = RADEON_HPD_NONE; |
1808 | radeon_add_legacy_encoder(dev, | 1808 | radeon_add_legacy_encoder(dev, |
1809 | radeon_get_encoder_id(dev, | 1809 | radeon_get_encoder_enum(dev, |
1810 | ATOM_DEVICE_TV1_SUPPORT, | 1810 | ATOM_DEVICE_TV1_SUPPORT, |
1811 | 2), | 1811 | 2), |
1812 | ATOM_DEVICE_TV1_SUPPORT); | 1812 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1823,12 +1823,12 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1823 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); | 1823 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); |
1824 | hpd.hpd = RADEON_HPD_1; /* ??? */ | 1824 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
1825 | radeon_add_legacy_encoder(dev, | 1825 | radeon_add_legacy_encoder(dev, |
1826 | radeon_get_encoder_id(dev, | 1826 | radeon_get_encoder_enum(dev, |
1827 | ATOM_DEVICE_DFP1_SUPPORT, | 1827 | ATOM_DEVICE_DFP1_SUPPORT, |
1828 | 0), | 1828 | 0), |
1829 | ATOM_DEVICE_DFP1_SUPPORT); | 1829 | ATOM_DEVICE_DFP1_SUPPORT); |
1830 | radeon_add_legacy_encoder(dev, | 1830 | radeon_add_legacy_encoder(dev, |
1831 | radeon_get_encoder_id(dev, | 1831 | radeon_get_encoder_enum(dev, |
1832 | ATOM_DEVICE_CRT2_SUPPORT, | 1832 | ATOM_DEVICE_CRT2_SUPPORT, |
1833 | 2), | 1833 | 2), |
1834 | ATOM_DEVICE_CRT2_SUPPORT); | 1834 | ATOM_DEVICE_CRT2_SUPPORT); |
@@ -1842,7 +1842,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1842 | ddc_i2c.valid = false; | 1842 | ddc_i2c.valid = false; |
1843 | hpd.hpd = RADEON_HPD_NONE; | 1843 | hpd.hpd = RADEON_HPD_NONE; |
1844 | radeon_add_legacy_encoder(dev, | 1844 | radeon_add_legacy_encoder(dev, |
1845 | radeon_get_encoder_id(dev, | 1845 | radeon_get_encoder_enum(dev, |
1846 | ATOM_DEVICE_TV1_SUPPORT, | 1846 | ATOM_DEVICE_TV1_SUPPORT, |
1847 | 2), | 1847 | 2), |
1848 | ATOM_DEVICE_TV1_SUPPORT); | 1848 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1859,7 +1859,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1859 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); | 1859 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_MONID, 0, 0); |
1860 | hpd.hpd = RADEON_HPD_1; /* ??? */ | 1860 | hpd.hpd = RADEON_HPD_1; /* ??? */ |
1861 | radeon_add_legacy_encoder(dev, | 1861 | radeon_add_legacy_encoder(dev, |
1862 | radeon_get_encoder_id(dev, | 1862 | radeon_get_encoder_enum(dev, |
1863 | ATOM_DEVICE_DFP1_SUPPORT, | 1863 | ATOM_DEVICE_DFP1_SUPPORT, |
1864 | 0), | 1864 | 0), |
1865 | ATOM_DEVICE_DFP1_SUPPORT); | 1865 | ATOM_DEVICE_DFP1_SUPPORT); |
@@ -1871,7 +1871,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1871 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); | 1871 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_DVI, 0, 0); |
1872 | hpd.hpd = RADEON_HPD_NONE; | 1872 | hpd.hpd = RADEON_HPD_NONE; |
1873 | radeon_add_legacy_encoder(dev, | 1873 | radeon_add_legacy_encoder(dev, |
1874 | radeon_get_encoder_id(dev, | 1874 | radeon_get_encoder_enum(dev, |
1875 | ATOM_DEVICE_CRT2_SUPPORT, | 1875 | ATOM_DEVICE_CRT2_SUPPORT, |
1876 | 2), | 1876 | 2), |
1877 | ATOM_DEVICE_CRT2_SUPPORT); | 1877 | ATOM_DEVICE_CRT2_SUPPORT); |
@@ -1883,7 +1883,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1883 | ddc_i2c.valid = false; | 1883 | ddc_i2c.valid = false; |
1884 | hpd.hpd = RADEON_HPD_NONE; | 1884 | hpd.hpd = RADEON_HPD_NONE; |
1885 | radeon_add_legacy_encoder(dev, | 1885 | radeon_add_legacy_encoder(dev, |
1886 | radeon_get_encoder_id(dev, | 1886 | radeon_get_encoder_enum(dev, |
1887 | ATOM_DEVICE_TV1_SUPPORT, | 1887 | ATOM_DEVICE_TV1_SUPPORT, |
1888 | 2), | 1888 | 2), |
1889 | ATOM_DEVICE_TV1_SUPPORT); | 1889 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1900,7 +1900,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1900 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1900 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1901 | hpd.hpd = RADEON_HPD_NONE; | 1901 | hpd.hpd = RADEON_HPD_NONE; |
1902 | radeon_add_legacy_encoder(dev, | 1902 | radeon_add_legacy_encoder(dev, |
1903 | radeon_get_encoder_id(dev, | 1903 | radeon_get_encoder_enum(dev, |
1904 | ATOM_DEVICE_CRT1_SUPPORT, | 1904 | ATOM_DEVICE_CRT1_SUPPORT, |
1905 | 1), | 1905 | 1), |
1906 | ATOM_DEVICE_CRT1_SUPPORT); | 1906 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -1912,7 +1912,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1912 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); | 1912 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); |
1913 | hpd.hpd = RADEON_HPD_NONE; | 1913 | hpd.hpd = RADEON_HPD_NONE; |
1914 | radeon_add_legacy_encoder(dev, | 1914 | radeon_add_legacy_encoder(dev, |
1915 | radeon_get_encoder_id(dev, | 1915 | radeon_get_encoder_enum(dev, |
1916 | ATOM_DEVICE_CRT2_SUPPORT, | 1916 | ATOM_DEVICE_CRT2_SUPPORT, |
1917 | 2), | 1917 | 2), |
1918 | ATOM_DEVICE_CRT2_SUPPORT); | 1918 | ATOM_DEVICE_CRT2_SUPPORT); |
@@ -1924,7 +1924,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1924 | ddc_i2c.valid = false; | 1924 | ddc_i2c.valid = false; |
1925 | hpd.hpd = RADEON_HPD_NONE; | 1925 | hpd.hpd = RADEON_HPD_NONE; |
1926 | radeon_add_legacy_encoder(dev, | 1926 | radeon_add_legacy_encoder(dev, |
1927 | radeon_get_encoder_id(dev, | 1927 | radeon_get_encoder_enum(dev, |
1928 | ATOM_DEVICE_TV1_SUPPORT, | 1928 | ATOM_DEVICE_TV1_SUPPORT, |
1929 | 2), | 1929 | 2), |
1930 | ATOM_DEVICE_TV1_SUPPORT); | 1930 | ATOM_DEVICE_TV1_SUPPORT); |
@@ -1941,7 +1941,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1941 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); | 1941 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_VGA, 0, 0); |
1942 | hpd.hpd = RADEON_HPD_NONE; | 1942 | hpd.hpd = RADEON_HPD_NONE; |
1943 | radeon_add_legacy_encoder(dev, | 1943 | radeon_add_legacy_encoder(dev, |
1944 | radeon_get_encoder_id(dev, | 1944 | radeon_get_encoder_enum(dev, |
1945 | ATOM_DEVICE_CRT1_SUPPORT, | 1945 | ATOM_DEVICE_CRT1_SUPPORT, |
1946 | 1), | 1946 | 1), |
1947 | ATOM_DEVICE_CRT1_SUPPORT); | 1947 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -1952,7 +1952,7 @@ bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev) | |||
1952 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); | 1952 | ddc_i2c = combios_setup_i2c_bus(rdev, DDC_CRT2, 0, 0); |
1953 | hpd.hpd = RADEON_HPD_NONE; | 1953 | hpd.hpd = RADEON_HPD_NONE; |
1954 | radeon_add_legacy_encoder(dev, | 1954 | radeon_add_legacy_encoder(dev, |
1955 | radeon_get_encoder_id(dev, | 1955 | radeon_get_encoder_enum(dev, |
1956 | ATOM_DEVICE_CRT2_SUPPORT, | 1956 | ATOM_DEVICE_CRT2_SUPPORT, |
1957 | 2), | 1957 | 2), |
1958 | ATOM_DEVICE_CRT2_SUPPORT); | 1958 | ATOM_DEVICE_CRT2_SUPPORT); |
@@ -2109,7 +2109,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2109 | else | 2109 | else |
2110 | devices = ATOM_DEVICE_DFP1_SUPPORT; | 2110 | devices = ATOM_DEVICE_DFP1_SUPPORT; |
2111 | radeon_add_legacy_encoder(dev, | 2111 | radeon_add_legacy_encoder(dev, |
2112 | radeon_get_encoder_id | 2112 | radeon_get_encoder_enum |
2113 | (dev, devices, 0), | 2113 | (dev, devices, 0), |
2114 | devices); | 2114 | devices); |
2115 | radeon_add_legacy_connector(dev, i, devices, | 2115 | radeon_add_legacy_connector(dev, i, devices, |
@@ -2123,7 +2123,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2123 | if (tmp & 0x1) { | 2123 | if (tmp & 0x1) { |
2124 | devices = ATOM_DEVICE_CRT2_SUPPORT; | 2124 | devices = ATOM_DEVICE_CRT2_SUPPORT; |
2125 | radeon_add_legacy_encoder(dev, | 2125 | radeon_add_legacy_encoder(dev, |
2126 | radeon_get_encoder_id | 2126 | radeon_get_encoder_enum |
2127 | (dev, | 2127 | (dev, |
2128 | ATOM_DEVICE_CRT2_SUPPORT, | 2128 | ATOM_DEVICE_CRT2_SUPPORT, |
2129 | 2), | 2129 | 2), |
@@ -2131,7 +2131,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2131 | } else { | 2131 | } else { |
2132 | devices = ATOM_DEVICE_CRT1_SUPPORT; | 2132 | devices = ATOM_DEVICE_CRT1_SUPPORT; |
2133 | radeon_add_legacy_encoder(dev, | 2133 | radeon_add_legacy_encoder(dev, |
2134 | radeon_get_encoder_id | 2134 | radeon_get_encoder_enum |
2135 | (dev, | 2135 | (dev, |
2136 | ATOM_DEVICE_CRT1_SUPPORT, | 2136 | ATOM_DEVICE_CRT1_SUPPORT, |
2137 | 1), | 2137 | 1), |
@@ -2151,7 +2151,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2151 | if (tmp & 0x1) { | 2151 | if (tmp & 0x1) { |
2152 | devices |= ATOM_DEVICE_CRT2_SUPPORT; | 2152 | devices |= ATOM_DEVICE_CRT2_SUPPORT; |
2153 | radeon_add_legacy_encoder(dev, | 2153 | radeon_add_legacy_encoder(dev, |
2154 | radeon_get_encoder_id | 2154 | radeon_get_encoder_enum |
2155 | (dev, | 2155 | (dev, |
2156 | ATOM_DEVICE_CRT2_SUPPORT, | 2156 | ATOM_DEVICE_CRT2_SUPPORT, |
2157 | 2), | 2157 | 2), |
@@ -2159,7 +2159,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2159 | } else { | 2159 | } else { |
2160 | devices |= ATOM_DEVICE_CRT1_SUPPORT; | 2160 | devices |= ATOM_DEVICE_CRT1_SUPPORT; |
2161 | radeon_add_legacy_encoder(dev, | 2161 | radeon_add_legacy_encoder(dev, |
2162 | radeon_get_encoder_id | 2162 | radeon_get_encoder_enum |
2163 | (dev, | 2163 | (dev, |
2164 | ATOM_DEVICE_CRT1_SUPPORT, | 2164 | ATOM_DEVICE_CRT1_SUPPORT, |
2165 | 1), | 2165 | 1), |
@@ -2168,7 +2168,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2168 | if ((tmp >> 4) & 0x1) { | 2168 | if ((tmp >> 4) & 0x1) { |
2169 | devices |= ATOM_DEVICE_DFP2_SUPPORT; | 2169 | devices |= ATOM_DEVICE_DFP2_SUPPORT; |
2170 | radeon_add_legacy_encoder(dev, | 2170 | radeon_add_legacy_encoder(dev, |
2171 | radeon_get_encoder_id | 2171 | radeon_get_encoder_enum |
2172 | (dev, | 2172 | (dev, |
2173 | ATOM_DEVICE_DFP2_SUPPORT, | 2173 | ATOM_DEVICE_DFP2_SUPPORT, |
2174 | 0), | 2174 | 0), |
@@ -2177,7 +2177,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2177 | } else { | 2177 | } else { |
2178 | devices |= ATOM_DEVICE_DFP1_SUPPORT; | 2178 | devices |= ATOM_DEVICE_DFP1_SUPPORT; |
2179 | radeon_add_legacy_encoder(dev, | 2179 | radeon_add_legacy_encoder(dev, |
2180 | radeon_get_encoder_id | 2180 | radeon_get_encoder_enum |
2181 | (dev, | 2181 | (dev, |
2182 | ATOM_DEVICE_DFP1_SUPPORT, | 2182 | ATOM_DEVICE_DFP1_SUPPORT, |
2183 | 0), | 2183 | 0), |
@@ -2202,7 +2202,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2202 | connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; | 2202 | connector_object_id = CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I; |
2203 | } | 2203 | } |
2204 | radeon_add_legacy_encoder(dev, | 2204 | radeon_add_legacy_encoder(dev, |
2205 | radeon_get_encoder_id | 2205 | radeon_get_encoder_enum |
2206 | (dev, devices, 0), | 2206 | (dev, devices, 0), |
2207 | devices); | 2207 | devices); |
2208 | radeon_add_legacy_connector(dev, i, devices, | 2208 | radeon_add_legacy_connector(dev, i, devices, |
@@ -2215,7 +2215,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2215 | case CONNECTOR_CTV_LEGACY: | 2215 | case CONNECTOR_CTV_LEGACY: |
2216 | case CONNECTOR_STV_LEGACY: | 2216 | case CONNECTOR_STV_LEGACY: |
2217 | radeon_add_legacy_encoder(dev, | 2217 | radeon_add_legacy_encoder(dev, |
2218 | radeon_get_encoder_id | 2218 | radeon_get_encoder_enum |
2219 | (dev, | 2219 | (dev, |
2220 | ATOM_DEVICE_TV1_SUPPORT, | 2220 | ATOM_DEVICE_TV1_SUPPORT, |
2221 | 2), | 2221 | 2), |
@@ -2242,12 +2242,12 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2242 | DRM_DEBUG_KMS("Found DFP table, assuming DVI connector\n"); | 2242 | DRM_DEBUG_KMS("Found DFP table, assuming DVI connector\n"); |
2243 | 2243 | ||
2244 | radeon_add_legacy_encoder(dev, | 2244 | radeon_add_legacy_encoder(dev, |
2245 | radeon_get_encoder_id(dev, | 2245 | radeon_get_encoder_enum(dev, |
2246 | ATOM_DEVICE_CRT1_SUPPORT, | 2246 | ATOM_DEVICE_CRT1_SUPPORT, |
2247 | 1), | 2247 | 1), |
2248 | ATOM_DEVICE_CRT1_SUPPORT); | 2248 | ATOM_DEVICE_CRT1_SUPPORT); |
2249 | radeon_add_legacy_encoder(dev, | 2249 | radeon_add_legacy_encoder(dev, |
2250 | radeon_get_encoder_id(dev, | 2250 | radeon_get_encoder_enum(dev, |
2251 | ATOM_DEVICE_DFP1_SUPPORT, | 2251 | ATOM_DEVICE_DFP1_SUPPORT, |
2252 | 0), | 2252 | 0), |
2253 | ATOM_DEVICE_DFP1_SUPPORT); | 2253 | ATOM_DEVICE_DFP1_SUPPORT); |
@@ -2268,7 +2268,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2268 | DRM_DEBUG_KMS("Found CRT table, assuming VGA connector\n"); | 2268 | DRM_DEBUG_KMS("Found CRT table, assuming VGA connector\n"); |
2269 | if (crt_info) { | 2269 | if (crt_info) { |
2270 | radeon_add_legacy_encoder(dev, | 2270 | radeon_add_legacy_encoder(dev, |
2271 | radeon_get_encoder_id(dev, | 2271 | radeon_get_encoder_enum(dev, |
2272 | ATOM_DEVICE_CRT1_SUPPORT, | 2272 | ATOM_DEVICE_CRT1_SUPPORT, |
2273 | 1), | 2273 | 1), |
2274 | ATOM_DEVICE_CRT1_SUPPORT); | 2274 | ATOM_DEVICE_CRT1_SUPPORT); |
@@ -2297,7 +2297,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2297 | COMBIOS_LCD_DDC_INFO_TABLE); | 2297 | COMBIOS_LCD_DDC_INFO_TABLE); |
2298 | 2298 | ||
2299 | radeon_add_legacy_encoder(dev, | 2299 | radeon_add_legacy_encoder(dev, |
2300 | radeon_get_encoder_id(dev, | 2300 | radeon_get_encoder_enum(dev, |
2301 | ATOM_DEVICE_LCD1_SUPPORT, | 2301 | ATOM_DEVICE_LCD1_SUPPORT, |
2302 | 0), | 2302 | 0), |
2303 | ATOM_DEVICE_LCD1_SUPPORT); | 2303 | ATOM_DEVICE_LCD1_SUPPORT); |
@@ -2351,7 +2351,7 @@ bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev) | |||
2351 | hpd.hpd = RADEON_HPD_NONE; | 2351 | hpd.hpd = RADEON_HPD_NONE; |
2352 | ddc_i2c.valid = false; | 2352 | ddc_i2c.valid = false; |
2353 | radeon_add_legacy_encoder(dev, | 2353 | radeon_add_legacy_encoder(dev, |
2354 | radeon_get_encoder_id | 2354 | radeon_get_encoder_enum |
2355 | (dev, | 2355 | (dev, |
2356 | ATOM_DEVICE_TV1_SUPPORT, | 2356 | ATOM_DEVICE_TV1_SUPPORT, |
2357 | 2), | 2357 | 2), |
diff --git a/drivers/gpu/drm/radeon/radeon_connectors.c b/drivers/gpu/drm/radeon/radeon_connectors.c index 47c4b276d30c..31a09cd279ab 100644 --- a/drivers/gpu/drm/radeon/radeon_connectors.c +++ b/drivers/gpu/drm/radeon/radeon_connectors.c | |||
@@ -977,24 +977,25 @@ static enum drm_connector_status radeon_dp_detect(struct drm_connector *connecto | |||
977 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | 977 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
978 | enum drm_connector_status ret = connector_status_disconnected; | 978 | enum drm_connector_status ret = connector_status_disconnected; |
979 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; | 979 | struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv; |
980 | u8 sink_type; | ||
981 | 980 | ||
982 | if (radeon_connector->edid) { | 981 | if (radeon_connector->edid) { |
983 | kfree(radeon_connector->edid); | 982 | kfree(radeon_connector->edid); |
984 | radeon_connector->edid = NULL; | 983 | radeon_connector->edid = NULL; |
985 | } | 984 | } |
986 | 985 | ||
987 | sink_type = radeon_dp_getsinktype(radeon_connector); | 986 | if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) { |
988 | if ((sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | 987 | /* eDP is always DP */ |
989 | (sink_type == CONNECTOR_OBJECT_ID_eDP)) { | 988 | radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT; |
990 | if (radeon_dp_getdpcd(radeon_connector)) { | 989 | if (radeon_dp_getdpcd(radeon_connector)) |
991 | radeon_dig_connector->dp_sink_type = sink_type; | ||
992 | ret = connector_status_connected; | 990 | ret = connector_status_connected; |
993 | } | ||
994 | } else { | 991 | } else { |
995 | if (radeon_ddc_probe(radeon_connector)) { | 992 | radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector); |
996 | radeon_dig_connector->dp_sink_type = sink_type; | 993 | if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) { |
997 | ret = connector_status_connected; | 994 | if (radeon_dp_getdpcd(radeon_connector)) |
995 | ret = connector_status_connected; | ||
996 | } else { | ||
997 | if (radeon_ddc_probe(radeon_connector)) | ||
998 | ret = connector_status_connected; | ||
998 | } | 999 | } |
999 | } | 1000 | } |
1000 | 1001 | ||
@@ -1037,7 +1038,6 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1037 | uint32_t supported_device, | 1038 | uint32_t supported_device, |
1038 | int connector_type, | 1039 | int connector_type, |
1039 | struct radeon_i2c_bus_rec *i2c_bus, | 1040 | struct radeon_i2c_bus_rec *i2c_bus, |
1040 | bool linkb, | ||
1041 | uint32_t igp_lane_info, | 1041 | uint32_t igp_lane_info, |
1042 | uint16_t connector_object_id, | 1042 | uint16_t connector_object_id, |
1043 | struct radeon_hpd *hpd, | 1043 | struct radeon_hpd *hpd, |
@@ -1128,7 +1128,6 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1128 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | 1128 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1129 | if (!radeon_dig_connector) | 1129 | if (!radeon_dig_connector) |
1130 | goto failed; | 1130 | goto failed; |
1131 | radeon_dig_connector->linkb = linkb; | ||
1132 | radeon_dig_connector->igp_lane_info = igp_lane_info; | 1131 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1133 | radeon_connector->con_priv = radeon_dig_connector; | 1132 | radeon_connector->con_priv = radeon_dig_connector; |
1134 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | 1133 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); |
@@ -1158,7 +1157,6 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1158 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | 1157 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1159 | if (!radeon_dig_connector) | 1158 | if (!radeon_dig_connector) |
1160 | goto failed; | 1159 | goto failed; |
1161 | radeon_dig_connector->linkb = linkb; | ||
1162 | radeon_dig_connector->igp_lane_info = igp_lane_info; | 1160 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1163 | radeon_connector->con_priv = radeon_dig_connector; | 1161 | radeon_connector->con_priv = radeon_dig_connector; |
1164 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); | 1162 | drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type); |
@@ -1182,7 +1180,6 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1182 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | 1180 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1183 | if (!radeon_dig_connector) | 1181 | if (!radeon_dig_connector) |
1184 | goto failed; | 1182 | goto failed; |
1185 | radeon_dig_connector->linkb = linkb; | ||
1186 | radeon_dig_connector->igp_lane_info = igp_lane_info; | 1183 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1187 | radeon_connector->con_priv = radeon_dig_connector; | 1184 | radeon_connector->con_priv = radeon_dig_connector; |
1188 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); | 1185 | drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type); |
@@ -1229,7 +1226,6 @@ radeon_add_atom_connector(struct drm_device *dev, | |||
1229 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); | 1226 | radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL); |
1230 | if (!radeon_dig_connector) | 1227 | if (!radeon_dig_connector) |
1231 | goto failed; | 1228 | goto failed; |
1232 | radeon_dig_connector->linkb = linkb; | ||
1233 | radeon_dig_connector->igp_lane_info = igp_lane_info; | 1229 | radeon_dig_connector->igp_lane_info = igp_lane_info; |
1234 | radeon_connector->con_priv = radeon_dig_connector; | 1230 | radeon_connector->con_priv = radeon_dig_connector; |
1235 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); | 1231 | drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type); |
diff --git a/drivers/gpu/drm/radeon/radeon_device.c b/drivers/gpu/drm/radeon/radeon_device.c index 4f7a170d1566..69b3c2291e92 100644 --- a/drivers/gpu/drm/radeon/radeon_device.c +++ b/drivers/gpu/drm/radeon/radeon_device.c | |||
@@ -199,7 +199,7 @@ void radeon_vram_location(struct radeon_device *rdev, struct radeon_mc *mc, u64 | |||
199 | mc->mc_vram_size = mc->aper_size; | 199 | mc->mc_vram_size = mc->aper_size; |
200 | } | 200 | } |
201 | mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; | 201 | mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; |
202 | if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_end <= mc->gtt_end) { | 202 | if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_start <= mc->gtt_end) { |
203 | dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); | 203 | dev_warn(rdev->dev, "limiting VRAM to PCI aperture size\n"); |
204 | mc->real_vram_size = mc->aper_size; | 204 | mc->real_vram_size = mc->aper_size; |
205 | mc->mc_vram_size = mc->aper_size; | 205 | mc->mc_vram_size = mc->aper_size; |
diff --git a/drivers/gpu/drm/radeon/radeon_display.c b/drivers/gpu/drm/radeon/radeon_display.c index 5764f4d3b4f1..6dd434ad2429 100644 --- a/drivers/gpu/drm/radeon/radeon_display.c +++ b/drivers/gpu/drm/radeon/radeon_display.c | |||
@@ -1094,6 +1094,18 @@ void radeon_modeset_fini(struct radeon_device *rdev) | |||
1094 | radeon_i2c_fini(rdev); | 1094 | radeon_i2c_fini(rdev); |
1095 | } | 1095 | } |
1096 | 1096 | ||
1097 | static bool is_hdtv_mode(struct drm_display_mode *mode) | ||
1098 | { | ||
1099 | /* try and guess if this is a tv or a monitor */ | ||
1100 | if ((mode->vdisplay == 480 && mode->hdisplay == 720) || /* 480p */ | ||
1101 | (mode->vdisplay == 576) || /* 576p */ | ||
1102 | (mode->vdisplay == 720) || /* 720p */ | ||
1103 | (mode->vdisplay == 1080)) /* 1080p */ | ||
1104 | return true; | ||
1105 | else | ||
1106 | return false; | ||
1107 | } | ||
1108 | |||
1097 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, | 1109 | bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, |
1098 | struct drm_display_mode *mode, | 1110 | struct drm_display_mode *mode, |
1099 | struct drm_display_mode *adjusted_mode) | 1111 | struct drm_display_mode *adjusted_mode) |
@@ -1141,7 +1153,8 @@ bool radeon_crtc_scaling_mode_fixup(struct drm_crtc *crtc, | |||
1141 | if (ASIC_IS_AVIVO(rdev) && | 1153 | if (ASIC_IS_AVIVO(rdev) && |
1142 | ((radeon_encoder->underscan_type == UNDERSCAN_ON) || | 1154 | ((radeon_encoder->underscan_type == UNDERSCAN_ON) || |
1143 | ((radeon_encoder->underscan_type == UNDERSCAN_AUTO) && | 1155 | ((radeon_encoder->underscan_type == UNDERSCAN_AUTO) && |
1144 | drm_detect_hdmi_monitor(radeon_connector->edid)))) { | 1156 | drm_detect_hdmi_monitor(radeon_connector->edid) && |
1157 | is_hdtv_mode(mode)))) { | ||
1145 | radeon_crtc->h_border = (mode->hdisplay >> 5) + 16; | 1158 | radeon_crtc->h_border = (mode->hdisplay >> 5) + 16; |
1146 | radeon_crtc->v_border = (mode->vdisplay >> 5) + 16; | 1159 | radeon_crtc->v_border = (mode->vdisplay >> 5) + 16; |
1147 | radeon_crtc->rmx_type = RMX_FULL; | 1160 | radeon_crtc->rmx_type = RMX_FULL; |
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c index 263c8098d7dd..2c293e8304d6 100644 --- a/drivers/gpu/drm/radeon/radeon_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_encoders.c | |||
@@ -81,7 +81,7 @@ void radeon_setup_encoder_clones(struct drm_device *dev) | |||
81 | } | 81 | } |
82 | 82 | ||
83 | uint32_t | 83 | uint32_t |
84 | radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t dac) | 84 | radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device, uint8_t dac) |
85 | { | 85 | { |
86 | struct radeon_device *rdev = dev->dev_private; | 86 | struct radeon_device *rdev = dev->dev_private; |
87 | uint32_t ret = 0; | 87 | uint32_t ret = 0; |
@@ -97,59 +97,59 @@ radeon_get_encoder_id(struct drm_device *dev, uint32_t supported_device, uint8_t | |||
97 | if ((rdev->family == CHIP_RS300) || | 97 | if ((rdev->family == CHIP_RS300) || |
98 | (rdev->family == CHIP_RS400) || | 98 | (rdev->family == CHIP_RS400) || |
99 | (rdev->family == CHIP_RS480)) | 99 | (rdev->family == CHIP_RS480)) |
100 | ret = ENCODER_OBJECT_ID_INTERNAL_DAC2; | 100 | ret = ENCODER_INTERNAL_DAC2_ENUM_ID1; |
101 | else if (ASIC_IS_AVIVO(rdev)) | 101 | else if (ASIC_IS_AVIVO(rdev)) |
102 | ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1; | 102 | ret = ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1; |
103 | else | 103 | else |
104 | ret = ENCODER_OBJECT_ID_INTERNAL_DAC1; | 104 | ret = ENCODER_INTERNAL_DAC1_ENUM_ID1; |
105 | break; | 105 | break; |
106 | case 2: /* dac b */ | 106 | case 2: /* dac b */ |
107 | if (ASIC_IS_AVIVO(rdev)) | 107 | if (ASIC_IS_AVIVO(rdev)) |
108 | ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2; | 108 | ret = ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1; |
109 | else { | 109 | else { |
110 | /*if (rdev->family == CHIP_R200) | 110 | /*if (rdev->family == CHIP_R200) |
111 | ret = ENCODER_OBJECT_ID_INTERNAL_DVO1; | 111 | ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; |
112 | else*/ | 112 | else*/ |
113 | ret = ENCODER_OBJECT_ID_INTERNAL_DAC2; | 113 | ret = ENCODER_INTERNAL_DAC2_ENUM_ID1; |
114 | } | 114 | } |
115 | break; | 115 | break; |
116 | case 3: /* external dac */ | 116 | case 3: /* external dac */ |
117 | if (ASIC_IS_AVIVO(rdev)) | 117 | if (ASIC_IS_AVIVO(rdev)) |
118 | ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1; | 118 | ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1; |
119 | else | 119 | else |
120 | ret = ENCODER_OBJECT_ID_INTERNAL_DVO1; | 120 | ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; |
121 | break; | 121 | break; |
122 | } | 122 | } |
123 | break; | 123 | break; |
124 | case ATOM_DEVICE_LCD1_SUPPORT: | 124 | case ATOM_DEVICE_LCD1_SUPPORT: |
125 | if (ASIC_IS_AVIVO(rdev)) | 125 | if (ASIC_IS_AVIVO(rdev)) |
126 | ret = ENCODER_OBJECT_ID_INTERNAL_LVTM1; | 126 | ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1; |
127 | else | 127 | else |
128 | ret = ENCODER_OBJECT_ID_INTERNAL_LVDS; | 128 | ret = ENCODER_INTERNAL_LVDS_ENUM_ID1; |
129 | break; | 129 | break; |
130 | case ATOM_DEVICE_DFP1_SUPPORT: | 130 | case ATOM_DEVICE_DFP1_SUPPORT: |
131 | if ((rdev->family == CHIP_RS300) || | 131 | if ((rdev->family == CHIP_RS300) || |
132 | (rdev->family == CHIP_RS400) || | 132 | (rdev->family == CHIP_RS400) || |
133 | (rdev->family == CHIP_RS480)) | 133 | (rdev->family == CHIP_RS480)) |
134 | ret = ENCODER_OBJECT_ID_INTERNAL_DVO1; | 134 | ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; |
135 | else if (ASIC_IS_AVIVO(rdev)) | 135 | else if (ASIC_IS_AVIVO(rdev)) |
136 | ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1; | 136 | ret = ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1; |
137 | else | 137 | else |
138 | ret = ENCODER_OBJECT_ID_INTERNAL_TMDS1; | 138 | ret = ENCODER_INTERNAL_TMDS1_ENUM_ID1; |
139 | break; | 139 | break; |
140 | case ATOM_DEVICE_LCD2_SUPPORT: | 140 | case ATOM_DEVICE_LCD2_SUPPORT: |
141 | case ATOM_DEVICE_DFP2_SUPPORT: | 141 | case ATOM_DEVICE_DFP2_SUPPORT: |
142 | if ((rdev->family == CHIP_RS600) || | 142 | if ((rdev->family == CHIP_RS600) || |
143 | (rdev->family == CHIP_RS690) || | 143 | (rdev->family == CHIP_RS690) || |
144 | (rdev->family == CHIP_RS740)) | 144 | (rdev->family == CHIP_RS740)) |
145 | ret = ENCODER_OBJECT_ID_INTERNAL_DDI; | 145 | ret = ENCODER_INTERNAL_DDI_ENUM_ID1; |
146 | else if (ASIC_IS_AVIVO(rdev)) | 146 | else if (ASIC_IS_AVIVO(rdev)) |
147 | ret = ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1; | 147 | ret = ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1; |
148 | else | 148 | else |
149 | ret = ENCODER_OBJECT_ID_INTERNAL_DVO1; | 149 | ret = ENCODER_INTERNAL_DVO1_ENUM_ID1; |
150 | break; | 150 | break; |
151 | case ATOM_DEVICE_DFP3_SUPPORT: | 151 | case ATOM_DEVICE_DFP3_SUPPORT: |
152 | ret = ENCODER_OBJECT_ID_INTERNAL_LVTM1; | 152 | ret = ENCODER_INTERNAL_LVTM1_ENUM_ID1; |
153 | break; | 153 | break; |
154 | } | 154 | } |
155 | 155 | ||
@@ -228,32 +228,6 @@ radeon_get_connector_for_encoder(struct drm_encoder *encoder) | |||
228 | return NULL; | 228 | return NULL; |
229 | } | 229 | } |
230 | 230 | ||
231 | static struct radeon_connector_atom_dig * | ||
232 | radeon_get_atom_connector_priv_from_encoder(struct drm_encoder *encoder) | ||
233 | { | ||
234 | struct drm_device *dev = encoder->dev; | ||
235 | struct radeon_device *rdev = dev->dev_private; | ||
236 | struct drm_connector *connector; | ||
237 | struct radeon_connector *radeon_connector; | ||
238 | struct radeon_connector_atom_dig *dig_connector; | ||
239 | |||
240 | if (!rdev->is_atom_bios) | ||
241 | return NULL; | ||
242 | |||
243 | connector = radeon_get_connector_for_encoder(encoder); | ||
244 | if (!connector) | ||
245 | return NULL; | ||
246 | |||
247 | radeon_connector = to_radeon_connector(connector); | ||
248 | |||
249 | if (!radeon_connector->con_priv) | ||
250 | return NULL; | ||
251 | |||
252 | dig_connector = radeon_connector->con_priv; | ||
253 | |||
254 | return dig_connector; | ||
255 | } | ||
256 | |||
257 | void radeon_panel_mode_fixup(struct drm_encoder *encoder, | 231 | void radeon_panel_mode_fixup(struct drm_encoder *encoder, |
258 | struct drm_display_mode *adjusted_mode) | 232 | struct drm_display_mode *adjusted_mode) |
259 | { | 233 | { |
@@ -512,14 +486,12 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
512 | struct radeon_device *rdev = dev->dev_private; | 486 | struct radeon_device *rdev = dev->dev_private; |
513 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 487 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
514 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 488 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
515 | struct radeon_connector_atom_dig *dig_connector = | ||
516 | radeon_get_atom_connector_priv_from_encoder(encoder); | ||
517 | union lvds_encoder_control args; | 489 | union lvds_encoder_control args; |
518 | int index = 0; | 490 | int index = 0; |
519 | int hdmi_detected = 0; | 491 | int hdmi_detected = 0; |
520 | uint8_t frev, crev; | 492 | uint8_t frev, crev; |
521 | 493 | ||
522 | if (!dig || !dig_connector) | 494 | if (!dig) |
523 | return; | 495 | return; |
524 | 496 | ||
525 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) | 497 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_HDMI) |
@@ -562,7 +534,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
562 | if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB) | 534 | if (dig->lvds_misc & ATOM_PANEL_MISC_888RGB) |
563 | args.v1.ucMisc |= (1 << 1); | 535 | args.v1.ucMisc |= (1 << 1); |
564 | } else { | 536 | } else { |
565 | if (dig_connector->linkb) | 537 | if (dig->linkb) |
566 | args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; | 538 | args.v1.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; |
567 | if (radeon_encoder->pixel_clock > 165000) | 539 | if (radeon_encoder->pixel_clock > 165000) |
568 | args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; | 540 | args.v1.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
@@ -601,7 +573,7 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
601 | args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4; | 573 | args.v2.ucTemporal |= PANEL_ENCODER_TEMPORAL_LEVEL_4; |
602 | } | 574 | } |
603 | } else { | 575 | } else { |
604 | if (dig_connector->linkb) | 576 | if (dig->linkb) |
605 | args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; | 577 | args.v2.ucMisc |= PANEL_ENCODER_MISC_TMDS_LINKB; |
606 | if (radeon_encoder->pixel_clock > 165000) | 578 | if (radeon_encoder->pixel_clock > 165000) |
607 | args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL; | 579 | args.v2.ucMisc |= PANEL_ENCODER_MISC_DUAL; |
@@ -623,6 +595,8 @@ atombios_digital_setup(struct drm_encoder *encoder, int action) | |||
623 | int | 595 | int |
624 | atombios_get_encoder_mode(struct drm_encoder *encoder) | 596 | atombios_get_encoder_mode(struct drm_encoder *encoder) |
625 | { | 597 | { |
598 | struct drm_device *dev = encoder->dev; | ||
599 | struct radeon_device *rdev = dev->dev_private; | ||
626 | struct drm_connector *connector; | 600 | struct drm_connector *connector; |
627 | struct radeon_connector *radeon_connector; | 601 | struct radeon_connector *radeon_connector; |
628 | struct radeon_connector_atom_dig *dig_connector; | 602 | struct radeon_connector_atom_dig *dig_connector; |
@@ -636,9 +610,13 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
636 | switch (connector->connector_type) { | 610 | switch (connector->connector_type) { |
637 | case DRM_MODE_CONNECTOR_DVII: | 611 | case DRM_MODE_CONNECTOR_DVII: |
638 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ | 612 | case DRM_MODE_CONNECTOR_HDMIB: /* HDMI-B is basically DL-DVI; analog works fine */ |
639 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) | 613 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { |
640 | return ATOM_ENCODER_MODE_HDMI; | 614 | /* fix me */ |
641 | else if (radeon_connector->use_digital) | 615 | if (ASIC_IS_DCE4(rdev)) |
616 | return ATOM_ENCODER_MODE_DVI; | ||
617 | else | ||
618 | return ATOM_ENCODER_MODE_HDMI; | ||
619 | } else if (radeon_connector->use_digital) | ||
642 | return ATOM_ENCODER_MODE_DVI; | 620 | return ATOM_ENCODER_MODE_DVI; |
643 | else | 621 | else |
644 | return ATOM_ENCODER_MODE_CRT; | 622 | return ATOM_ENCODER_MODE_CRT; |
@@ -646,9 +624,13 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
646 | case DRM_MODE_CONNECTOR_DVID: | 624 | case DRM_MODE_CONNECTOR_DVID: |
647 | case DRM_MODE_CONNECTOR_HDMIA: | 625 | case DRM_MODE_CONNECTOR_HDMIA: |
648 | default: | 626 | default: |
649 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) | 627 | if (drm_detect_hdmi_monitor(radeon_connector->edid)) { |
650 | return ATOM_ENCODER_MODE_HDMI; | 628 | /* fix me */ |
651 | else | 629 | if (ASIC_IS_DCE4(rdev)) |
630 | return ATOM_ENCODER_MODE_DVI; | ||
631 | else | ||
632 | return ATOM_ENCODER_MODE_HDMI; | ||
633 | } else | ||
652 | return ATOM_ENCODER_MODE_DVI; | 634 | return ATOM_ENCODER_MODE_DVI; |
653 | break; | 635 | break; |
654 | case DRM_MODE_CONNECTOR_LVDS: | 636 | case DRM_MODE_CONNECTOR_LVDS: |
@@ -660,9 +642,13 @@ atombios_get_encoder_mode(struct drm_encoder *encoder) | |||
660 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || | 642 | if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || |
661 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) | 643 | (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) |
662 | return ATOM_ENCODER_MODE_DP; | 644 | return ATOM_ENCODER_MODE_DP; |
663 | else if (drm_detect_hdmi_monitor(radeon_connector->edid)) | 645 | else if (drm_detect_hdmi_monitor(radeon_connector->edid)) { |
664 | return ATOM_ENCODER_MODE_HDMI; | 646 | /* fix me */ |
665 | else | 647 | if (ASIC_IS_DCE4(rdev)) |
648 | return ATOM_ENCODER_MODE_DVI; | ||
649 | else | ||
650 | return ATOM_ENCODER_MODE_HDMI; | ||
651 | } else | ||
666 | return ATOM_ENCODER_MODE_DVI; | 652 | return ATOM_ENCODER_MODE_DVI; |
667 | break; | 653 | break; |
668 | case DRM_MODE_CONNECTOR_DVIA: | 654 | case DRM_MODE_CONNECTOR_DVIA: |
@@ -729,13 +715,24 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
729 | struct radeon_device *rdev = dev->dev_private; | 715 | struct radeon_device *rdev = dev->dev_private; |
730 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 716 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
731 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 717 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
732 | struct radeon_connector_atom_dig *dig_connector = | 718 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
733 | radeon_get_atom_connector_priv_from_encoder(encoder); | ||
734 | union dig_encoder_control args; | 719 | union dig_encoder_control args; |
735 | int index = 0; | 720 | int index = 0; |
736 | uint8_t frev, crev; | 721 | uint8_t frev, crev; |
722 | int dp_clock = 0; | ||
723 | int dp_lane_count = 0; | ||
724 | |||
725 | if (connector) { | ||
726 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); | ||
727 | struct radeon_connector_atom_dig *dig_connector = | ||
728 | radeon_connector->con_priv; | ||
737 | 729 | ||
738 | if (!dig || !dig_connector) | 730 | dp_clock = dig_connector->dp_clock; |
731 | dp_lane_count = dig_connector->dp_lane_count; | ||
732 | } | ||
733 | |||
734 | /* no dig encoder assigned */ | ||
735 | if (dig->dig_encoder == -1) | ||
739 | return; | 736 | return; |
740 | 737 | ||
741 | memset(&args, 0, sizeof(args)); | 738 | memset(&args, 0, sizeof(args)); |
@@ -757,9 +754,9 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
757 | args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder); | 754 | args.v1.ucEncoderMode = atombios_get_encoder_mode(encoder); |
758 | 755 | ||
759 | if (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) { | 756 | if (args.v1.ucEncoderMode == ATOM_ENCODER_MODE_DP) { |
760 | if (dig_connector->dp_clock == 270000) | 757 | if (dp_clock == 270000) |
761 | args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; | 758 | args.v1.ucConfig |= ATOM_ENCODER_CONFIG_DPLINKRATE_2_70GHZ; |
762 | args.v1.ucLaneNum = dig_connector->dp_lane_count; | 759 | args.v1.ucLaneNum = dp_lane_count; |
763 | } else if (radeon_encoder->pixel_clock > 165000) | 760 | } else if (radeon_encoder->pixel_clock > 165000) |
764 | args.v1.ucLaneNum = 8; | 761 | args.v1.ucLaneNum = 8; |
765 | else | 762 | else |
@@ -781,7 +778,7 @@ atombios_dig_encoder_setup(struct drm_encoder *encoder, int action) | |||
781 | args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3; | 778 | args.v1.ucConfig = ATOM_ENCODER_CONFIG_V2_TRANSMITTER3; |
782 | break; | 779 | break; |
783 | } | 780 | } |
784 | if (dig_connector->linkb) | 781 | if (dig->linkb) |
785 | args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB; | 782 | args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKB; |
786 | else | 783 | else |
787 | args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA; | 784 | args.v1.ucConfig |= ATOM_ENCODER_CONFIG_LINKA; |
@@ -804,38 +801,47 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
804 | struct radeon_device *rdev = dev->dev_private; | 801 | struct radeon_device *rdev = dev->dev_private; |
805 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); | 802 | struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); |
806 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; | 803 | struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; |
807 | struct radeon_connector_atom_dig *dig_connector = | 804 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
808 | radeon_get_atom_connector_priv_from_encoder(encoder); | ||
809 | struct drm_connector *connector; | ||
810 | struct radeon_connector *radeon_connector; | ||
811 | union dig_transmitter_control args; | 805 | union dig_transmitter_control args; |
812 | int index = 0; | 806 | int index = 0; |
813 | uint8_t frev, crev; | 807 | uint8_t frev, crev; |
814 | bool is_dp = false; | 808 | bool is_dp = false; |
815 | int pll_id = 0; | 809 | int pll_id = 0; |
810 | int dp_clock = 0; | ||
811 | int dp_lane_count = 0; | ||
812 | int connector_object_id = 0; | ||
813 | int igp_lane_info = 0; | ||
816 | 814 | ||
817 | if (!dig || !dig_connector) | 815 | if (connector) { |
818 | return; | 816 | struct radeon_connector *radeon_connector = to_radeon_connector(connector); |
817 | struct radeon_connector_atom_dig *dig_connector = | ||
818 | radeon_connector->con_priv; | ||
819 | 819 | ||
820 | connector = radeon_get_connector_for_encoder(encoder); | 820 | dp_clock = dig_connector->dp_clock; |
821 | radeon_connector = to_radeon_connector(connector); | 821 | dp_lane_count = dig_connector->dp_lane_count; |
822 | connector_object_id = | ||
823 | (radeon_connector->connector_object_id & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT; | ||
824 | igp_lane_info = dig_connector->igp_lane_info; | ||
825 | } | ||
826 | |||
827 | /* no dig encoder assigned */ | ||
828 | if (dig->dig_encoder == -1) | ||
829 | return; | ||
822 | 830 | ||
823 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) | 831 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) |
824 | is_dp = true; | 832 | is_dp = true; |
825 | 833 | ||
826 | memset(&args, 0, sizeof(args)); | 834 | memset(&args, 0, sizeof(args)); |
827 | 835 | ||
828 | if (ASIC_IS_DCE32(rdev) || ASIC_IS_DCE4(rdev)) | 836 | switch (radeon_encoder->encoder_id) { |
837 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | ||
838 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | ||
839 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | ||
829 | index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl); | 840 | index = GetIndexIntoMasterTable(COMMAND, UNIPHYTransmitterControl); |
830 | else { | 841 | break; |
831 | switch (radeon_encoder->encoder_id) { | 842 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: |
832 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 843 | index = GetIndexIntoMasterTable(COMMAND, LVTMATransmitterControl); |
833 | index = GetIndexIntoMasterTable(COMMAND, DIG1TransmitterControl); | 844 | break; |
834 | break; | ||
835 | case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: | ||
836 | index = GetIndexIntoMasterTable(COMMAND, DIG2TransmitterControl); | ||
837 | break; | ||
838 | } | ||
839 | } | 845 | } |
840 | 846 | ||
841 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) | 847 | if (!atom_parse_cmd_header(rdev->mode_info.atom_context, index, &frev, &crev)) |
@@ -843,14 +849,14 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
843 | 849 | ||
844 | args.v1.ucAction = action; | 850 | args.v1.ucAction = action; |
845 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { | 851 | if (action == ATOM_TRANSMITTER_ACTION_INIT) { |
846 | args.v1.usInitInfo = radeon_connector->connector_object_id; | 852 | args.v1.usInitInfo = connector_object_id; |
847 | } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) { | 853 | } else if (action == ATOM_TRANSMITTER_ACTION_SETUP_VSEMPH) { |
848 | args.v1.asMode.ucLaneSel = lane_num; | 854 | args.v1.asMode.ucLaneSel = lane_num; |
849 | args.v1.asMode.ucLaneSet = lane_set; | 855 | args.v1.asMode.ucLaneSet = lane_set; |
850 | } else { | 856 | } else { |
851 | if (is_dp) | 857 | if (is_dp) |
852 | args.v1.usPixelClock = | 858 | args.v1.usPixelClock = |
853 | cpu_to_le16(dig_connector->dp_clock / 10); | 859 | cpu_to_le16(dp_clock / 10); |
854 | else if (radeon_encoder->pixel_clock > 165000) | 860 | else if (radeon_encoder->pixel_clock > 165000) |
855 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); | 861 | args.v1.usPixelClock = cpu_to_le16((radeon_encoder->pixel_clock / 2) / 10); |
856 | else | 862 | else |
@@ -858,13 +864,13 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
858 | } | 864 | } |
859 | if (ASIC_IS_DCE4(rdev)) { | 865 | if (ASIC_IS_DCE4(rdev)) { |
860 | if (is_dp) | 866 | if (is_dp) |
861 | args.v3.ucLaneNum = dig_connector->dp_lane_count; | 867 | args.v3.ucLaneNum = dp_lane_count; |
862 | else if (radeon_encoder->pixel_clock > 165000) | 868 | else if (radeon_encoder->pixel_clock > 165000) |
863 | args.v3.ucLaneNum = 8; | 869 | args.v3.ucLaneNum = 8; |
864 | else | 870 | else |
865 | args.v3.ucLaneNum = 4; | 871 | args.v3.ucLaneNum = 4; |
866 | 872 | ||
867 | if (dig_connector->linkb) { | 873 | if (dig->linkb) { |
868 | args.v3.acConfig.ucLinkSel = 1; | 874 | args.v3.acConfig.ucLinkSel = 1; |
869 | args.v3.acConfig.ucEncoderSel = 1; | 875 | args.v3.acConfig.ucEncoderSel = 1; |
870 | } | 876 | } |
@@ -904,7 +910,7 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
904 | } | 910 | } |
905 | } else if (ASIC_IS_DCE32(rdev)) { | 911 | } else if (ASIC_IS_DCE32(rdev)) { |
906 | args.v2.acConfig.ucEncoderSel = dig->dig_encoder; | 912 | args.v2.acConfig.ucEncoderSel = dig->dig_encoder; |
907 | if (dig_connector->linkb) | 913 | if (dig->linkb) |
908 | args.v2.acConfig.ucLinkSel = 1; | 914 | args.v2.acConfig.ucLinkSel = 1; |
909 | 915 | ||
910 | switch (radeon_encoder->encoder_id) { | 916 | switch (radeon_encoder->encoder_id) { |
@@ -938,23 +944,23 @@ atombios_dig_transmitter_setup(struct drm_encoder *encoder, int action, uint8_t | |||
938 | if ((rdev->flags & RADEON_IS_IGP) && | 944 | if ((rdev->flags & RADEON_IS_IGP) && |
939 | (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) { | 945 | (radeon_encoder->encoder_id == ENCODER_OBJECT_ID_INTERNAL_UNIPHY)) { |
940 | if (is_dp || (radeon_encoder->pixel_clock <= 165000)) { | 946 | if (is_dp || (radeon_encoder->pixel_clock <= 165000)) { |
941 | if (dig_connector->igp_lane_info & 0x1) | 947 | if (igp_lane_info & 0x1) |
942 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; | 948 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_3; |
943 | else if (dig_connector->igp_lane_info & 0x2) | 949 | else if (igp_lane_info & 0x2) |
944 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; | 950 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_4_7; |
945 | else if (dig_connector->igp_lane_info & 0x4) | 951 | else if (igp_lane_info & 0x4) |
946 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; | 952 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_11; |
947 | else if (dig_connector->igp_lane_info & 0x8) | 953 | else if (igp_lane_info & 0x8) |
948 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; | 954 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_12_15; |
949 | } else { | 955 | } else { |
950 | if (dig_connector->igp_lane_info & 0x3) | 956 | if (igp_lane_info & 0x3) |
951 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; | 957 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_0_7; |
952 | else if (dig_connector->igp_lane_info & 0xc) | 958 | else if (igp_lane_info & 0xc) |
953 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; | 959 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LANE_8_15; |
954 | } | 960 | } |
955 | } | 961 | } |
956 | 962 | ||
957 | if (dig_connector->linkb) | 963 | if (dig->linkb) |
958 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; | 964 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKB; |
959 | else | 965 | else |
960 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA; | 966 | args.v1.ucConfig |= ATOM_TRANSMITTER_CONFIG_LINKA; |
@@ -1072,8 +1078,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
1072 | if (is_dig) { | 1078 | if (is_dig) { |
1073 | switch (mode) { | 1079 | switch (mode) { |
1074 | case DRM_MODE_DPMS_ON: | 1080 | case DRM_MODE_DPMS_ON: |
1075 | if (!ASIC_IS_DCE4(rdev)) | 1081 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); |
1076 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_ENABLE_OUTPUT, 0, 0); | ||
1077 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { | 1082 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { |
1078 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); | 1083 | struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); |
1079 | 1084 | ||
@@ -1085,8 +1090,7 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode) | |||
1085 | case DRM_MODE_DPMS_STANDBY: | 1090 | case DRM_MODE_DPMS_STANDBY: |
1086 | case DRM_MODE_DPMS_SUSPEND: | 1091 | case DRM_MODE_DPMS_SUSPEND: |
1087 | case DRM_MODE_DPMS_OFF: | 1092 | case DRM_MODE_DPMS_OFF: |
1088 | if (!ASIC_IS_DCE4(rdev)) | 1093 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0); |
1089 | atombios_dig_transmitter_setup(encoder, ATOM_TRANSMITTER_ACTION_DISABLE_OUTPUT, 0, 0); | ||
1090 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { | 1094 | if (atombios_get_encoder_mode(encoder) == ATOM_ENCODER_MODE_DP) { |
1091 | if (ASIC_IS_DCE4(rdev)) | 1095 | if (ASIC_IS_DCE4(rdev)) |
1092 | atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF); | 1096 | atombios_dig_encoder_setup(encoder, ATOM_ENCODER_CMD_DP_VIDEO_OFF); |
@@ -1290,24 +1294,22 @@ static int radeon_atom_pick_dig_encoder(struct drm_encoder *encoder) | |||
1290 | uint32_t dig_enc_in_use = 0; | 1294 | uint32_t dig_enc_in_use = 0; |
1291 | 1295 | ||
1292 | if (ASIC_IS_DCE4(rdev)) { | 1296 | if (ASIC_IS_DCE4(rdev)) { |
1293 | struct radeon_connector_atom_dig *dig_connector = | 1297 | dig = radeon_encoder->enc_priv; |
1294 | radeon_get_atom_connector_priv_from_encoder(encoder); | ||
1295 | |||
1296 | switch (radeon_encoder->encoder_id) { | 1298 | switch (radeon_encoder->encoder_id) { |
1297 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: | 1299 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY: |
1298 | if (dig_connector->linkb) | 1300 | if (dig->linkb) |
1299 | return 1; | 1301 | return 1; |
1300 | else | 1302 | else |
1301 | return 0; | 1303 | return 0; |
1302 | break; | 1304 | break; |
1303 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: | 1305 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1: |
1304 | if (dig_connector->linkb) | 1306 | if (dig->linkb) |
1305 | return 3; | 1307 | return 3; |
1306 | else | 1308 | else |
1307 | return 2; | 1309 | return 2; |
1308 | break; | 1310 | break; |
1309 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: | 1311 | case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2: |
1310 | if (dig_connector->linkb) | 1312 | if (dig->linkb) |
1311 | return 5; | 1313 | return 5; |
1312 | else | 1314 | else |
1313 | return 4; | 1315 | return 4; |
@@ -1641,6 +1643,7 @@ radeon_atombios_set_dac_info(struct radeon_encoder *radeon_encoder) | |||
1641 | struct radeon_encoder_atom_dig * | 1643 | struct radeon_encoder_atom_dig * |
1642 | radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder) | 1644 | radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder) |
1643 | { | 1645 | { |
1646 | int encoder_enum = (radeon_encoder->encoder_enum & ENUM_ID_MASK) >> ENUM_ID_SHIFT; | ||
1644 | struct radeon_encoder_atom_dig *dig = kzalloc(sizeof(struct radeon_encoder_atom_dig), GFP_KERNEL); | 1647 | struct radeon_encoder_atom_dig *dig = kzalloc(sizeof(struct radeon_encoder_atom_dig), GFP_KERNEL); |
1645 | 1648 | ||
1646 | if (!dig) | 1649 | if (!dig) |
@@ -1650,11 +1653,16 @@ radeon_atombios_set_dig_info(struct radeon_encoder *radeon_encoder) | |||
1650 | dig->coherent_mode = true; | 1653 | dig->coherent_mode = true; |
1651 | dig->dig_encoder = -1; | 1654 | dig->dig_encoder = -1; |
1652 | 1655 | ||
1656 | if (encoder_enum == 2) | ||
1657 | dig->linkb = true; | ||
1658 | else | ||
1659 | dig->linkb = false; | ||
1660 | |||
1653 | return dig; | 1661 | return dig; |
1654 | } | 1662 | } |
1655 | 1663 | ||
1656 | void | 1664 | void |
1657 | radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device) | 1665 | radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_t supported_device) |
1658 | { | 1666 | { |
1659 | struct radeon_device *rdev = dev->dev_private; | 1667 | struct radeon_device *rdev = dev->dev_private; |
1660 | struct drm_encoder *encoder; | 1668 | struct drm_encoder *encoder; |
@@ -1663,7 +1671,7 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su | |||
1663 | /* see if we already added it */ | 1671 | /* see if we already added it */ |
1664 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 1672 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
1665 | radeon_encoder = to_radeon_encoder(encoder); | 1673 | radeon_encoder = to_radeon_encoder(encoder); |
1666 | if (radeon_encoder->encoder_id == encoder_id) { | 1674 | if (radeon_encoder->encoder_enum == encoder_enum) { |
1667 | radeon_encoder->devices |= supported_device; | 1675 | radeon_encoder->devices |= supported_device; |
1668 | return; | 1676 | return; |
1669 | } | 1677 | } |
@@ -1691,7 +1699,8 @@ radeon_add_atom_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t su | |||
1691 | 1699 | ||
1692 | radeon_encoder->enc_priv = NULL; | 1700 | radeon_encoder->enc_priv = NULL; |
1693 | 1701 | ||
1694 | radeon_encoder->encoder_id = encoder_id; | 1702 | radeon_encoder->encoder_enum = encoder_enum; |
1703 | radeon_encoder->encoder_id = (encoder_enum & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT; | ||
1695 | radeon_encoder->devices = supported_device; | 1704 | radeon_encoder->devices = supported_device; |
1696 | radeon_encoder->rmx_type = RMX_OFF; | 1705 | radeon_encoder->rmx_type = RMX_OFF; |
1697 | radeon_encoder->underscan_type = UNDERSCAN_OFF; | 1706 | radeon_encoder->underscan_type = UNDERSCAN_OFF; |
diff --git a/drivers/gpu/drm/radeon/radeon_fb.c b/drivers/gpu/drm/radeon/radeon_fb.c index dbf86962bdd1..c74a8b20d941 100644 --- a/drivers/gpu/drm/radeon/radeon_fb.c +++ b/drivers/gpu/drm/radeon/radeon_fb.c | |||
@@ -118,7 +118,7 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, | |||
118 | aligned_size = ALIGN(size, PAGE_SIZE); | 118 | aligned_size = ALIGN(size, PAGE_SIZE); |
119 | ret = radeon_gem_object_create(rdev, aligned_size, 0, | 119 | ret = radeon_gem_object_create(rdev, aligned_size, 0, |
120 | RADEON_GEM_DOMAIN_VRAM, | 120 | RADEON_GEM_DOMAIN_VRAM, |
121 | false, ttm_bo_type_kernel, | 121 | false, true, |
122 | &gobj); | 122 | &gobj); |
123 | if (ret) { | 123 | if (ret) { |
124 | printk(KERN_ERR "failed to allocate framebuffer (%d)\n", | 124 | printk(KERN_ERR "failed to allocate framebuffer (%d)\n", |
diff --git a/drivers/gpu/drm/radeon/radeon_i2c.c b/drivers/gpu/drm/radeon/radeon_i2c.c index bfd2ce5f5372..0416804d8f30 100644 --- a/drivers/gpu/drm/radeon/radeon_i2c.c +++ b/drivers/gpu/drm/radeon/radeon_i2c.c | |||
@@ -99,6 +99,13 @@ static void radeon_i2c_do_lock(struct radeon_i2c_chan *i2c, int lock_state) | |||
99 | } | 99 | } |
100 | } | 100 | } |
101 | 101 | ||
102 | /* switch the pads to ddc mode */ | ||
103 | if (ASIC_IS_DCE3(rdev) && rec->hw_capable) { | ||
104 | temp = RREG32(rec->mask_clk_reg); | ||
105 | temp &= ~(1 << 16); | ||
106 | WREG32(rec->mask_clk_reg, temp); | ||
107 | } | ||
108 | |||
102 | /* clear the output pin values */ | 109 | /* clear the output pin values */ |
103 | temp = RREG32(rec->a_clk_reg) & ~rec->a_clk_mask; | 110 | temp = RREG32(rec->a_clk_reg) & ~rec->a_clk_mask; |
104 | WREG32(rec->a_clk_reg, temp); | 111 | WREG32(rec->a_clk_reg, temp); |
diff --git a/drivers/gpu/drm/radeon/radeon_irq_kms.c b/drivers/gpu/drm/radeon/radeon_irq_kms.c index 059bfa4098d7..a108c7ed14f5 100644 --- a/drivers/gpu/drm/radeon/radeon_irq_kms.c +++ b/drivers/gpu/drm/radeon/radeon_irq_kms.c | |||
@@ -121,11 +121,12 @@ int radeon_irq_kms_init(struct radeon_device *rdev) | |||
121 | * chips. Disable MSI on them for now. | 121 | * chips. Disable MSI on them for now. |
122 | */ | 122 | */ |
123 | if ((rdev->family >= CHIP_RV380) && | 123 | if ((rdev->family >= CHIP_RV380) && |
124 | (!(rdev->flags & RADEON_IS_IGP))) { | 124 | (!(rdev->flags & RADEON_IS_IGP)) && |
125 | (!(rdev->flags & RADEON_IS_AGP))) { | ||
125 | int ret = pci_enable_msi(rdev->pdev); | 126 | int ret = pci_enable_msi(rdev->pdev); |
126 | if (!ret) { | 127 | if (!ret) { |
127 | rdev->msi_enabled = 1; | 128 | rdev->msi_enabled = 1; |
128 | DRM_INFO("radeon: using MSI.\n"); | 129 | dev_info(rdev->dev, "radeon: using MSI.\n"); |
129 | } | 130 | } |
130 | } | 131 | } |
131 | rdev->irq.installed = true; | 132 | rdev->irq.installed = true; |
diff --git a/drivers/gpu/drm/radeon/radeon_kms.c b/drivers/gpu/drm/radeon/radeon_kms.c index b1c8ace5f080..5eee3c41d124 100644 --- a/drivers/gpu/drm/radeon/radeon_kms.c +++ b/drivers/gpu/drm/radeon/radeon_kms.c | |||
@@ -161,6 +161,7 @@ int radeon_info_ioctl(struct drm_device *dev, void *data, struct drm_file *filp) | |||
161 | DRM_DEBUG_KMS("tiling config is r6xx+ only!\n"); | 161 | DRM_DEBUG_KMS("tiling config is r6xx+ only!\n"); |
162 | return -EINVAL; | 162 | return -EINVAL; |
163 | } | 163 | } |
164 | break; | ||
164 | case RADEON_INFO_WANT_HYPERZ: | 165 | case RADEON_INFO_WANT_HYPERZ: |
165 | /* The "value" here is both an input and output parameter. | 166 | /* The "value" here is both an input and output parameter. |
166 | * If the input value is 1, filp requests hyper-z access. | 167 | * If the input value is 1, filp requests hyper-z access. |
@@ -323,45 +324,45 @@ KMS_INVALID_IOCTL(radeon_surface_free_kms) | |||
323 | 324 | ||
324 | 325 | ||
325 | struct drm_ioctl_desc radeon_ioctls_kms[] = { | 326 | struct drm_ioctl_desc radeon_ioctls_kms[] = { |
326 | DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 327 | DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
327 | DRM_IOCTL_DEF(DRM_RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 328 | DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
328 | DRM_IOCTL_DEF(DRM_RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 329 | DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
329 | DRM_IOCTL_DEF(DRM_RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 330 | DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
330 | DRM_IOCTL_DEF(DRM_RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH), | 331 | DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle_kms, DRM_AUTH), |
331 | DRM_IOCTL_DEF(DRM_RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH), | 332 | DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume_kms, DRM_AUTH), |
332 | DRM_IOCTL_DEF(DRM_RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH), | 333 | DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset_kms, DRM_AUTH), |
333 | DRM_IOCTL_DEF(DRM_RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH), | 334 | DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen_kms, DRM_AUTH), |
334 | DRM_IOCTL_DEF(DRM_RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH), | 335 | DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap_kms, DRM_AUTH), |
335 | DRM_IOCTL_DEF(DRM_RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH), | 336 | DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear_kms, DRM_AUTH), |
336 | DRM_IOCTL_DEF(DRM_RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH), | 337 | DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex_kms, DRM_AUTH), |
337 | DRM_IOCTL_DEF(DRM_RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH), | 338 | DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices_kms, DRM_AUTH), |
338 | DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH), | 339 | DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture_kms, DRM_AUTH), |
339 | DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH), | 340 | DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple_kms, DRM_AUTH), |
340 | DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 341 | DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
341 | DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH), | 342 | DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2_kms, DRM_AUTH), |
342 | DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH), | 343 | DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf_kms, DRM_AUTH), |
343 | DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH), | 344 | DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam_kms, DRM_AUTH), |
344 | DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH), | 345 | DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip_kms, DRM_AUTH), |
345 | DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH), | 346 | DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc_kms, DRM_AUTH), |
346 | DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free_kms, DRM_AUTH), | 347 | DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free_kms, DRM_AUTH), |
347 | DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 348 | DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap_kms, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
348 | DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH), | 349 | DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit_kms, DRM_AUTH), |
349 | DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH), | 350 | DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait_kms, DRM_AUTH), |
350 | DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH), | 351 | DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam_kms, DRM_AUTH), |
351 | DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH), | 352 | DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc_kms, DRM_AUTH), |
352 | DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH), | 353 | DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free_kms, DRM_AUTH), |
353 | /* KMS */ | 354 | /* KMS */ |
354 | DRM_IOCTL_DEF(DRM_RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED), | 355 | DRM_IOCTL_DEF_DRV(RADEON_GEM_INFO, radeon_gem_info_ioctl, DRM_AUTH|DRM_UNLOCKED), |
355 | DRM_IOCTL_DEF(DRM_RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED), | 356 | DRM_IOCTL_DEF_DRV(RADEON_GEM_CREATE, radeon_gem_create_ioctl, DRM_AUTH|DRM_UNLOCKED), |
356 | DRM_IOCTL_DEF(DRM_RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED), | 357 | DRM_IOCTL_DEF_DRV(RADEON_GEM_MMAP, radeon_gem_mmap_ioctl, DRM_AUTH|DRM_UNLOCKED), |
357 | DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED), | 358 | DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_DOMAIN, radeon_gem_set_domain_ioctl, DRM_AUTH|DRM_UNLOCKED), |
358 | DRM_IOCTL_DEF(DRM_RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED), | 359 | DRM_IOCTL_DEF_DRV(RADEON_GEM_PREAD, radeon_gem_pread_ioctl, DRM_AUTH|DRM_UNLOCKED), |
359 | DRM_IOCTL_DEF(DRM_RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED), | 360 | DRM_IOCTL_DEF_DRV(RADEON_GEM_PWRITE, radeon_gem_pwrite_ioctl, DRM_AUTH|DRM_UNLOCKED), |
360 | DRM_IOCTL_DEF(DRM_RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED), | 361 | DRM_IOCTL_DEF_DRV(RADEON_GEM_WAIT_IDLE, radeon_gem_wait_idle_ioctl, DRM_AUTH|DRM_UNLOCKED), |
361 | DRM_IOCTL_DEF(DRM_RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED), | 362 | DRM_IOCTL_DEF_DRV(RADEON_CS, radeon_cs_ioctl, DRM_AUTH|DRM_UNLOCKED), |
362 | DRM_IOCTL_DEF(DRM_RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED), | 363 | DRM_IOCTL_DEF_DRV(RADEON_INFO, radeon_info_ioctl, DRM_AUTH|DRM_UNLOCKED), |
363 | DRM_IOCTL_DEF(DRM_RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED), | 364 | DRM_IOCTL_DEF_DRV(RADEON_GEM_SET_TILING, radeon_gem_set_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED), |
364 | DRM_IOCTL_DEF(DRM_RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED), | 365 | DRM_IOCTL_DEF_DRV(RADEON_GEM_GET_TILING, radeon_gem_get_tiling_ioctl, DRM_AUTH|DRM_UNLOCKED), |
365 | DRM_IOCTL_DEF(DRM_RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED), | 366 | DRM_IOCTL_DEF_DRV(RADEON_GEM_BUSY, radeon_gem_busy_ioctl, DRM_AUTH|DRM_UNLOCKED), |
366 | }; | 367 | }; |
367 | int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms); | 368 | int radeon_max_kms_ioctl = DRM_ARRAY_SIZE(radeon_ioctls_kms); |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c index 989df519a1e4..305049afde15 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_crtc.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_crtc.c | |||
@@ -272,7 +272,7 @@ static uint8_t radeon_compute_pll_gain(uint16_t ref_freq, uint16_t ref_div, | |||
272 | if (!ref_div) | 272 | if (!ref_div) |
273 | return 1; | 273 | return 1; |
274 | 274 | ||
275 | vcoFreq = ((unsigned)ref_freq & fb_div) / ref_div; | 275 | vcoFreq = ((unsigned)ref_freq * fb_div) / ref_div; |
276 | 276 | ||
277 | /* | 277 | /* |
278 | * This is horribly crude: the VCO frequency range is divided into | 278 | * This is horribly crude: the VCO frequency range is divided into |
diff --git a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c index b8149cbc0c70..0b8397000f4c 100644 --- a/drivers/gpu/drm/radeon/radeon_legacy_encoders.c +++ b/drivers/gpu/drm/radeon/radeon_legacy_encoders.c | |||
@@ -1345,7 +1345,7 @@ static struct radeon_encoder_ext_tmds *radeon_legacy_get_ext_tmds_info(struct ra | |||
1345 | } | 1345 | } |
1346 | 1346 | ||
1347 | void | 1347 | void |
1348 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t supported_device) | 1348 | radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_enum, uint32_t supported_device) |
1349 | { | 1349 | { |
1350 | struct radeon_device *rdev = dev->dev_private; | 1350 | struct radeon_device *rdev = dev->dev_private; |
1351 | struct drm_encoder *encoder; | 1351 | struct drm_encoder *encoder; |
@@ -1354,7 +1354,7 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t | |||
1354 | /* see if we already added it */ | 1354 | /* see if we already added it */ |
1355 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { | 1355 | list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) { |
1356 | radeon_encoder = to_radeon_encoder(encoder); | 1356 | radeon_encoder = to_radeon_encoder(encoder); |
1357 | if (radeon_encoder->encoder_id == encoder_id) { | 1357 | if (radeon_encoder->encoder_enum == encoder_enum) { |
1358 | radeon_encoder->devices |= supported_device; | 1358 | radeon_encoder->devices |= supported_device; |
1359 | return; | 1359 | return; |
1360 | } | 1360 | } |
@@ -1374,7 +1374,8 @@ radeon_add_legacy_encoder(struct drm_device *dev, uint32_t encoder_id, uint32_t | |||
1374 | 1374 | ||
1375 | radeon_encoder->enc_priv = NULL; | 1375 | radeon_encoder->enc_priv = NULL; |
1376 | 1376 | ||
1377 | radeon_encoder->encoder_id = encoder_id; | 1377 | radeon_encoder->encoder_enum = encoder_enum; |
1378 | radeon_encoder->encoder_id = (encoder_enum & OBJECT_ID_MASK) >> OBJECT_ID_SHIFT; | ||
1378 | radeon_encoder->devices = supported_device; | 1379 | radeon_encoder->devices = supported_device; |
1379 | radeon_encoder->rmx_type = RMX_OFF; | 1380 | radeon_encoder->rmx_type = RMX_OFF; |
1380 | 1381 | ||
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h b/drivers/gpu/drm/radeon/radeon_mode.h index 5bbc086b9267..8f93e2b4b0c8 100644 --- a/drivers/gpu/drm/radeon/radeon_mode.h +++ b/drivers/gpu/drm/radeon/radeon_mode.h | |||
@@ -342,6 +342,7 @@ struct radeon_atom_ss { | |||
342 | }; | 342 | }; |
343 | 343 | ||
344 | struct radeon_encoder_atom_dig { | 344 | struct radeon_encoder_atom_dig { |
345 | bool linkb; | ||
345 | /* atom dig */ | 346 | /* atom dig */ |
346 | bool coherent_mode; | 347 | bool coherent_mode; |
347 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ | 348 | int dig_encoder; /* -1 disabled, 0 DIGA, 1 DIGB */ |
@@ -360,6 +361,7 @@ struct radeon_encoder_atom_dac { | |||
360 | 361 | ||
361 | struct radeon_encoder { | 362 | struct radeon_encoder { |
362 | struct drm_encoder base; | 363 | struct drm_encoder base; |
364 | uint32_t encoder_enum; | ||
363 | uint32_t encoder_id; | 365 | uint32_t encoder_id; |
364 | uint32_t devices; | 366 | uint32_t devices; |
365 | uint32_t active_device; | 367 | uint32_t active_device; |
@@ -378,7 +380,6 @@ struct radeon_encoder { | |||
378 | 380 | ||
379 | struct radeon_connector_atom_dig { | 381 | struct radeon_connector_atom_dig { |
380 | uint32_t igp_lane_info; | 382 | uint32_t igp_lane_info; |
381 | bool linkb; | ||
382 | /* displayport */ | 383 | /* displayport */ |
383 | struct radeon_i2c_chan *dp_i2c_bus; | 384 | struct radeon_i2c_chan *dp_i2c_bus; |
384 | u8 dpcd[8]; | 385 | u8 dpcd[8]; |
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c index 58038f5cab38..477ba673e1b4 100644 --- a/drivers/gpu/drm/radeon/radeon_pm.c +++ b/drivers/gpu/drm/radeon/radeon_pm.c | |||
@@ -226,6 +226,11 @@ static void radeon_pm_set_clocks(struct radeon_device *rdev) | |||
226 | { | 226 | { |
227 | int i; | 227 | int i; |
228 | 228 | ||
229 | /* no need to take locks, etc. if nothing's going to change */ | ||
230 | if ((rdev->pm.requested_clock_mode_index == rdev->pm.current_clock_mode_index) && | ||
231 | (rdev->pm.requested_power_state_index == rdev->pm.current_power_state_index)) | ||
232 | return; | ||
233 | |||
229 | mutex_lock(&rdev->ddev->struct_mutex); | 234 | mutex_lock(&rdev->ddev->struct_mutex); |
230 | mutex_lock(&rdev->vram_mutex); | 235 | mutex_lock(&rdev->vram_mutex); |
231 | mutex_lock(&rdev->cp.mutex); | 236 | mutex_lock(&rdev->cp.mutex); |
diff --git a/drivers/gpu/drm/radeon/radeon_state.c b/drivers/gpu/drm/radeon/radeon_state.c index b3ba44c0a818..4ae5a3d1074e 100644 --- a/drivers/gpu/drm/radeon/radeon_state.c +++ b/drivers/gpu/drm/radeon/radeon_state.c | |||
@@ -3228,34 +3228,34 @@ void radeon_driver_postclose(struct drm_device *dev, struct drm_file *file_priv) | |||
3228 | } | 3228 | } |
3229 | 3229 | ||
3230 | struct drm_ioctl_desc radeon_ioctls[] = { | 3230 | struct drm_ioctl_desc radeon_ioctls[] = { |
3231 | DRM_IOCTL_DEF(DRM_RADEON_CP_INIT, radeon_cp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 3231 | DRM_IOCTL_DEF_DRV(RADEON_CP_INIT, radeon_cp_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
3232 | DRM_IOCTL_DEF(DRM_RADEON_CP_START, radeon_cp_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 3232 | DRM_IOCTL_DEF_DRV(RADEON_CP_START, radeon_cp_start, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
3233 | DRM_IOCTL_DEF(DRM_RADEON_CP_STOP, radeon_cp_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 3233 | DRM_IOCTL_DEF_DRV(RADEON_CP_STOP, radeon_cp_stop, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
3234 | DRM_IOCTL_DEF(DRM_RADEON_CP_RESET, radeon_cp_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 3234 | DRM_IOCTL_DEF_DRV(RADEON_CP_RESET, radeon_cp_reset, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
3235 | DRM_IOCTL_DEF(DRM_RADEON_CP_IDLE, radeon_cp_idle, DRM_AUTH), | 3235 | DRM_IOCTL_DEF_DRV(RADEON_CP_IDLE, radeon_cp_idle, DRM_AUTH), |
3236 | DRM_IOCTL_DEF(DRM_RADEON_CP_RESUME, radeon_cp_resume, DRM_AUTH), | 3236 | DRM_IOCTL_DEF_DRV(RADEON_CP_RESUME, radeon_cp_resume, DRM_AUTH), |
3237 | DRM_IOCTL_DEF(DRM_RADEON_RESET, radeon_engine_reset, DRM_AUTH), | 3237 | DRM_IOCTL_DEF_DRV(RADEON_RESET, radeon_engine_reset, DRM_AUTH), |
3238 | DRM_IOCTL_DEF(DRM_RADEON_FULLSCREEN, radeon_fullscreen, DRM_AUTH), | 3238 | DRM_IOCTL_DEF_DRV(RADEON_FULLSCREEN, radeon_fullscreen, DRM_AUTH), |
3239 | DRM_IOCTL_DEF(DRM_RADEON_SWAP, radeon_cp_swap, DRM_AUTH), | 3239 | DRM_IOCTL_DEF_DRV(RADEON_SWAP, radeon_cp_swap, DRM_AUTH), |
3240 | DRM_IOCTL_DEF(DRM_RADEON_CLEAR, radeon_cp_clear, DRM_AUTH), | 3240 | DRM_IOCTL_DEF_DRV(RADEON_CLEAR, radeon_cp_clear, DRM_AUTH), |
3241 | DRM_IOCTL_DEF(DRM_RADEON_VERTEX, radeon_cp_vertex, DRM_AUTH), | 3241 | DRM_IOCTL_DEF_DRV(RADEON_VERTEX, radeon_cp_vertex, DRM_AUTH), |
3242 | DRM_IOCTL_DEF(DRM_RADEON_INDICES, radeon_cp_indices, DRM_AUTH), | 3242 | DRM_IOCTL_DEF_DRV(RADEON_INDICES, radeon_cp_indices, DRM_AUTH), |
3243 | DRM_IOCTL_DEF(DRM_RADEON_TEXTURE, radeon_cp_texture, DRM_AUTH), | 3243 | DRM_IOCTL_DEF_DRV(RADEON_TEXTURE, radeon_cp_texture, DRM_AUTH), |
3244 | DRM_IOCTL_DEF(DRM_RADEON_STIPPLE, radeon_cp_stipple, DRM_AUTH), | 3244 | DRM_IOCTL_DEF_DRV(RADEON_STIPPLE, radeon_cp_stipple, DRM_AUTH), |
3245 | DRM_IOCTL_DEF(DRM_RADEON_INDIRECT, radeon_cp_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 3245 | DRM_IOCTL_DEF_DRV(RADEON_INDIRECT, radeon_cp_indirect, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
3246 | DRM_IOCTL_DEF(DRM_RADEON_VERTEX2, radeon_cp_vertex2, DRM_AUTH), | 3246 | DRM_IOCTL_DEF_DRV(RADEON_VERTEX2, radeon_cp_vertex2, DRM_AUTH), |
3247 | DRM_IOCTL_DEF(DRM_RADEON_CMDBUF, radeon_cp_cmdbuf, DRM_AUTH), | 3247 | DRM_IOCTL_DEF_DRV(RADEON_CMDBUF, radeon_cp_cmdbuf, DRM_AUTH), |
3248 | DRM_IOCTL_DEF(DRM_RADEON_GETPARAM, radeon_cp_getparam, DRM_AUTH), | 3248 | DRM_IOCTL_DEF_DRV(RADEON_GETPARAM, radeon_cp_getparam, DRM_AUTH), |
3249 | DRM_IOCTL_DEF(DRM_RADEON_FLIP, radeon_cp_flip, DRM_AUTH), | 3249 | DRM_IOCTL_DEF_DRV(RADEON_FLIP, radeon_cp_flip, DRM_AUTH), |
3250 | DRM_IOCTL_DEF(DRM_RADEON_ALLOC, radeon_mem_alloc, DRM_AUTH), | 3250 | DRM_IOCTL_DEF_DRV(RADEON_ALLOC, radeon_mem_alloc, DRM_AUTH), |
3251 | DRM_IOCTL_DEF(DRM_RADEON_FREE, radeon_mem_free, DRM_AUTH), | 3251 | DRM_IOCTL_DEF_DRV(RADEON_FREE, radeon_mem_free, DRM_AUTH), |
3252 | DRM_IOCTL_DEF(DRM_RADEON_INIT_HEAP, radeon_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 3252 | DRM_IOCTL_DEF_DRV(RADEON_INIT_HEAP, radeon_mem_init_heap, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
3253 | DRM_IOCTL_DEF(DRM_RADEON_IRQ_EMIT, radeon_irq_emit, DRM_AUTH), | 3253 | DRM_IOCTL_DEF_DRV(RADEON_IRQ_EMIT, radeon_irq_emit, DRM_AUTH), |
3254 | DRM_IOCTL_DEF(DRM_RADEON_IRQ_WAIT, radeon_irq_wait, DRM_AUTH), | 3254 | DRM_IOCTL_DEF_DRV(RADEON_IRQ_WAIT, radeon_irq_wait, DRM_AUTH), |
3255 | DRM_IOCTL_DEF(DRM_RADEON_SETPARAM, radeon_cp_setparam, DRM_AUTH), | 3255 | DRM_IOCTL_DEF_DRV(RADEON_SETPARAM, radeon_cp_setparam, DRM_AUTH), |
3256 | DRM_IOCTL_DEF(DRM_RADEON_SURF_ALLOC, radeon_surface_alloc, DRM_AUTH), | 3256 | DRM_IOCTL_DEF_DRV(RADEON_SURF_ALLOC, radeon_surface_alloc, DRM_AUTH), |
3257 | DRM_IOCTL_DEF(DRM_RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH), | 3257 | DRM_IOCTL_DEF_DRV(RADEON_SURF_FREE, radeon_surface_free, DRM_AUTH), |
3258 | DRM_IOCTL_DEF(DRM_RADEON_CS, r600_cs_legacy_ioctl, DRM_AUTH) | 3258 | DRM_IOCTL_DEF_DRV(RADEON_CS, r600_cs_legacy_ioctl, DRM_AUTH) |
3259 | }; | 3259 | }; |
3260 | 3260 | ||
3261 | int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls); | 3261 | int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls); |
diff --git a/drivers/gpu/drm/savage/savage_bci.c b/drivers/gpu/drm/savage/savage_bci.c index 976dc8d25280..bf5f83ea14fe 100644 --- a/drivers/gpu/drm/savage/savage_bci.c +++ b/drivers/gpu/drm/savage/savage_bci.c | |||
@@ -1082,10 +1082,10 @@ void savage_reclaim_buffers(struct drm_device *dev, struct drm_file *file_priv) | |||
1082 | } | 1082 | } |
1083 | 1083 | ||
1084 | struct drm_ioctl_desc savage_ioctls[] = { | 1084 | struct drm_ioctl_desc savage_ioctls[] = { |
1085 | DRM_IOCTL_DEF(DRM_SAVAGE_BCI_INIT, savage_bci_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), | 1085 | DRM_IOCTL_DEF_DRV(SAVAGE_BCI_INIT, savage_bci_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY), |
1086 | DRM_IOCTL_DEF(DRM_SAVAGE_BCI_CMDBUF, savage_bci_cmdbuf, DRM_AUTH), | 1086 | DRM_IOCTL_DEF_DRV(SAVAGE_BCI_CMDBUF, savage_bci_cmdbuf, DRM_AUTH), |
1087 | DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_EMIT, savage_bci_event_emit, DRM_AUTH), | 1087 | DRM_IOCTL_DEF_DRV(SAVAGE_BCI_EVENT_EMIT, savage_bci_event_emit, DRM_AUTH), |
1088 | DRM_IOCTL_DEF(DRM_SAVAGE_BCI_EVENT_WAIT, savage_bci_event_wait, DRM_AUTH), | 1088 | DRM_IOCTL_DEF_DRV(SAVAGE_BCI_EVENT_WAIT, savage_bci_event_wait, DRM_AUTH), |
1089 | }; | 1089 | }; |
1090 | 1090 | ||
1091 | int savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls); | 1091 | int savage_max_ioctl = DRM_ARRAY_SIZE(savage_ioctls); |
diff --git a/drivers/gpu/drm/sis/sis_mm.c b/drivers/gpu/drm/sis/sis_mm.c index 07d0f2979cac..7fe2b63412ce 100644 --- a/drivers/gpu/drm/sis/sis_mm.c +++ b/drivers/gpu/drm/sis/sis_mm.c | |||
@@ -320,12 +320,12 @@ void sis_reclaim_buffers_locked(struct drm_device *dev, | |||
320 | } | 320 | } |
321 | 321 | ||
322 | struct drm_ioctl_desc sis_ioctls[] = { | 322 | struct drm_ioctl_desc sis_ioctls[] = { |
323 | DRM_IOCTL_DEF(DRM_SIS_FB_ALLOC, sis_fb_alloc, DRM_AUTH), | 323 | DRM_IOCTL_DEF_DRV(SIS_FB_ALLOC, sis_fb_alloc, DRM_AUTH), |
324 | DRM_IOCTL_DEF(DRM_SIS_FB_FREE, sis_drm_free, DRM_AUTH), | 324 | DRM_IOCTL_DEF_DRV(SIS_FB_FREE, sis_drm_free, DRM_AUTH), |
325 | DRM_IOCTL_DEF(DRM_SIS_AGP_INIT, sis_ioctl_agp_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY), | 325 | DRM_IOCTL_DEF_DRV(SIS_AGP_INIT, sis_ioctl_agp_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY), |
326 | DRM_IOCTL_DEF(DRM_SIS_AGP_ALLOC, sis_ioctl_agp_alloc, DRM_AUTH), | 326 | DRM_IOCTL_DEF_DRV(SIS_AGP_ALLOC, sis_ioctl_agp_alloc, DRM_AUTH), |
327 | DRM_IOCTL_DEF(DRM_SIS_AGP_FREE, sis_drm_free, DRM_AUTH), | 327 | DRM_IOCTL_DEF_DRV(SIS_AGP_FREE, sis_drm_free, DRM_AUTH), |
328 | DRM_IOCTL_DEF(DRM_SIS_FB_INIT, sis_fb_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY), | 328 | DRM_IOCTL_DEF_DRV(SIS_FB_INIT, sis_fb_init, DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY), |
329 | }; | 329 | }; |
330 | 330 | ||
331 | int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls); | 331 | int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls); |
diff --git a/drivers/gpu/drm/via/via_dma.c b/drivers/gpu/drm/via/via_dma.c index 68dda74a50ae..cc0ffa9abd00 100644 --- a/drivers/gpu/drm/via/via_dma.c +++ b/drivers/gpu/drm/via/via_dma.c | |||
@@ -722,20 +722,20 @@ static int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file * | |||
722 | } | 722 | } |
723 | 723 | ||
724 | struct drm_ioctl_desc via_ioctls[] = { | 724 | struct drm_ioctl_desc via_ioctls[] = { |
725 | DRM_IOCTL_DEF(DRM_VIA_ALLOCMEM, via_mem_alloc, DRM_AUTH), | 725 | DRM_IOCTL_DEF_DRV(VIA_ALLOCMEM, via_mem_alloc, DRM_AUTH), |
726 | DRM_IOCTL_DEF(DRM_VIA_FREEMEM, via_mem_free, DRM_AUTH), | 726 | DRM_IOCTL_DEF_DRV(VIA_FREEMEM, via_mem_free, DRM_AUTH), |
727 | DRM_IOCTL_DEF(DRM_VIA_AGP_INIT, via_agp_init, DRM_AUTH|DRM_MASTER), | 727 | DRM_IOCTL_DEF_DRV(VIA_AGP_INIT, via_agp_init, DRM_AUTH|DRM_MASTER), |
728 | DRM_IOCTL_DEF(DRM_VIA_FB_INIT, via_fb_init, DRM_AUTH|DRM_MASTER), | 728 | DRM_IOCTL_DEF_DRV(VIA_FB_INIT, via_fb_init, DRM_AUTH|DRM_MASTER), |
729 | DRM_IOCTL_DEF(DRM_VIA_MAP_INIT, via_map_init, DRM_AUTH|DRM_MASTER), | 729 | DRM_IOCTL_DEF_DRV(VIA_MAP_INIT, via_map_init, DRM_AUTH|DRM_MASTER), |
730 | DRM_IOCTL_DEF(DRM_VIA_DEC_FUTEX, via_decoder_futex, DRM_AUTH), | 730 | DRM_IOCTL_DEF_DRV(VIA_DEC_FUTEX, via_decoder_futex, DRM_AUTH), |
731 | DRM_IOCTL_DEF(DRM_VIA_DMA_INIT, via_dma_init, DRM_AUTH), | 731 | DRM_IOCTL_DEF_DRV(VIA_DMA_INIT, via_dma_init, DRM_AUTH), |
732 | DRM_IOCTL_DEF(DRM_VIA_CMDBUFFER, via_cmdbuffer, DRM_AUTH), | 732 | DRM_IOCTL_DEF_DRV(VIA_CMDBUFFER, via_cmdbuffer, DRM_AUTH), |
733 | DRM_IOCTL_DEF(DRM_VIA_FLUSH, via_flush_ioctl, DRM_AUTH), | 733 | DRM_IOCTL_DEF_DRV(VIA_FLUSH, via_flush_ioctl, DRM_AUTH), |
734 | DRM_IOCTL_DEF(DRM_VIA_PCICMD, via_pci_cmdbuffer, DRM_AUTH), | 734 | DRM_IOCTL_DEF_DRV(VIA_PCICMD, via_pci_cmdbuffer, DRM_AUTH), |
735 | DRM_IOCTL_DEF(DRM_VIA_CMDBUF_SIZE, via_cmdbuf_size, DRM_AUTH), | 735 | DRM_IOCTL_DEF_DRV(VIA_CMDBUF_SIZE, via_cmdbuf_size, DRM_AUTH), |
736 | DRM_IOCTL_DEF(DRM_VIA_WAIT_IRQ, via_wait_irq, DRM_AUTH), | 736 | DRM_IOCTL_DEF_DRV(VIA_WAIT_IRQ, via_wait_irq, DRM_AUTH), |
737 | DRM_IOCTL_DEF(DRM_VIA_DMA_BLIT, via_dma_blit, DRM_AUTH), | 737 | DRM_IOCTL_DEF_DRV(VIA_DMA_BLIT, via_dma_blit, DRM_AUTH), |
738 | DRM_IOCTL_DEF(DRM_VIA_BLIT_SYNC, via_dma_blit_sync, DRM_AUTH) | 738 | DRM_IOCTL_DEF_DRV(VIA_BLIT_SYNC, via_dma_blit_sync, DRM_AUTH) |
739 | }; | 739 | }; |
740 | 740 | ||
741 | int via_max_ioctl = DRM_ARRAY_SIZE(via_ioctls); | 741 | int via_max_ioctl = DRM_ARRAY_SIZE(via_ioctls); |
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c index 9dd395b90216..72ec2e2b6e97 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c | |||
@@ -99,47 +99,47 @@ | |||
99 | */ | 99 | */ |
100 | 100 | ||
101 | #define VMW_IOCTL_DEF(ioctl, func, flags) \ | 101 | #define VMW_IOCTL_DEF(ioctl, func, flags) \ |
102 | [DRM_IOCTL_NR(ioctl) - DRM_COMMAND_BASE] = {ioctl, flags, func} | 102 | [DRM_IOCTL_NR(DRM_IOCTL_##ioctl) - DRM_COMMAND_BASE] = {DRM_##ioctl, flags, func, DRM_IOCTL_##ioctl} |
103 | 103 | ||
104 | /** | 104 | /** |
105 | * Ioctl definitions. | 105 | * Ioctl definitions. |
106 | */ | 106 | */ |
107 | 107 | ||
108 | static struct drm_ioctl_desc vmw_ioctls[] = { | 108 | static struct drm_ioctl_desc vmw_ioctls[] = { |
109 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_GET_PARAM, vmw_getparam_ioctl, | 109 | VMW_IOCTL_DEF(VMW_GET_PARAM, vmw_getparam_ioctl, |
110 | DRM_AUTH | DRM_UNLOCKED), | 110 | DRM_AUTH | DRM_UNLOCKED), |
111 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl, | 111 | VMW_IOCTL_DEF(VMW_ALLOC_DMABUF, vmw_dmabuf_alloc_ioctl, |
112 | DRM_AUTH | DRM_UNLOCKED), | 112 | DRM_AUTH | DRM_UNLOCKED), |
113 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl, | 113 | VMW_IOCTL_DEF(VMW_UNREF_DMABUF, vmw_dmabuf_unref_ioctl, |
114 | DRM_AUTH | DRM_UNLOCKED), | 114 | DRM_AUTH | DRM_UNLOCKED), |
115 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_CURSOR_BYPASS, | 115 | VMW_IOCTL_DEF(VMW_CURSOR_BYPASS, |
116 | vmw_kms_cursor_bypass_ioctl, | 116 | vmw_kms_cursor_bypass_ioctl, |
117 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED), | 117 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED), |
118 | 118 | ||
119 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_CONTROL_STREAM, vmw_overlay_ioctl, | 119 | VMW_IOCTL_DEF(VMW_CONTROL_STREAM, vmw_overlay_ioctl, |
120 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED), | 120 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED), |
121 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_CLAIM_STREAM, vmw_stream_claim_ioctl, | 121 | VMW_IOCTL_DEF(VMW_CLAIM_STREAM, vmw_stream_claim_ioctl, |
122 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED), | 122 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED), |
123 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_STREAM, vmw_stream_unref_ioctl, | 123 | VMW_IOCTL_DEF(VMW_UNREF_STREAM, vmw_stream_unref_ioctl, |
124 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED), | 124 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED), |
125 | 125 | ||
126 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_CONTEXT, vmw_context_define_ioctl, | 126 | VMW_IOCTL_DEF(VMW_CREATE_CONTEXT, vmw_context_define_ioctl, |
127 | DRM_AUTH | DRM_UNLOCKED), | 127 | DRM_AUTH | DRM_UNLOCKED), |
128 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl, | 128 | VMW_IOCTL_DEF(VMW_UNREF_CONTEXT, vmw_context_destroy_ioctl, |
129 | DRM_AUTH | DRM_UNLOCKED), | 129 | DRM_AUTH | DRM_UNLOCKED), |
130 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_CREATE_SURFACE, vmw_surface_define_ioctl, | 130 | VMW_IOCTL_DEF(VMW_CREATE_SURFACE, vmw_surface_define_ioctl, |
131 | DRM_AUTH | DRM_UNLOCKED), | 131 | DRM_AUTH | DRM_UNLOCKED), |
132 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl, | 132 | VMW_IOCTL_DEF(VMW_UNREF_SURFACE, vmw_surface_destroy_ioctl, |
133 | DRM_AUTH | DRM_UNLOCKED), | 133 | DRM_AUTH | DRM_UNLOCKED), |
134 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_REF_SURFACE, vmw_surface_reference_ioctl, | 134 | VMW_IOCTL_DEF(VMW_REF_SURFACE, vmw_surface_reference_ioctl, |
135 | DRM_AUTH | DRM_UNLOCKED), | 135 | DRM_AUTH | DRM_UNLOCKED), |
136 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_EXECBUF, vmw_execbuf_ioctl, | 136 | VMW_IOCTL_DEF(VMW_EXECBUF, vmw_execbuf_ioctl, |
137 | DRM_AUTH | DRM_UNLOCKED), | 137 | DRM_AUTH | DRM_UNLOCKED), |
138 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl, | 138 | VMW_IOCTL_DEF(VMW_FIFO_DEBUG, vmw_fifo_debug_ioctl, |
139 | DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED), | 139 | DRM_AUTH | DRM_ROOT_ONLY | DRM_MASTER | DRM_UNLOCKED), |
140 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_FENCE_WAIT, vmw_fence_wait_ioctl, | 140 | VMW_IOCTL_DEF(VMW_FENCE_WAIT, vmw_fence_wait_ioctl, |
141 | DRM_AUTH | DRM_UNLOCKED), | 141 | DRM_AUTH | DRM_UNLOCKED), |
142 | VMW_IOCTL_DEF(DRM_IOCTL_VMW_UPDATE_LAYOUT, vmw_kms_update_layout_ioctl, | 142 | VMW_IOCTL_DEF(VMW_UPDATE_LAYOUT, vmw_kms_update_layout_ioctl, |
143 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED) | 143 | DRM_MASTER | DRM_CONTROL_ALLOW | DRM_UNLOCKED) |
144 | }; | 144 | }; |
145 | 145 | ||
diff --git a/drivers/isdn/hardware/avm/Kconfig b/drivers/isdn/hardware/avm/Kconfig index 5dbcbe3a54a6..b99b906ea9b1 100644 --- a/drivers/isdn/hardware/avm/Kconfig +++ b/drivers/isdn/hardware/avm/Kconfig | |||
@@ -36,12 +36,13 @@ config ISDN_DRV_AVMB1_T1ISA | |||
36 | 36 | ||
37 | config ISDN_DRV_AVMB1_B1PCMCIA | 37 | config ISDN_DRV_AVMB1_B1PCMCIA |
38 | tristate "AVM B1/M1/M2 PCMCIA support" | 38 | tristate "AVM B1/M1/M2 PCMCIA support" |
39 | depends on PCMCIA | ||
39 | help | 40 | help |
40 | Enable support for the PCMCIA version of the AVM B1 card. | 41 | Enable support for the PCMCIA version of the AVM B1 card. |
41 | 42 | ||
42 | config ISDN_DRV_AVMB1_AVM_CS | 43 | config ISDN_DRV_AVMB1_AVM_CS |
43 | tristate "AVM B1/M1/M2 PCMCIA cs module" | 44 | tristate "AVM B1/M1/M2 PCMCIA cs module" |
44 | depends on ISDN_DRV_AVMB1_B1PCMCIA && PCMCIA | 45 | depends on ISDN_DRV_AVMB1_B1PCMCIA |
45 | help | 46 | help |
46 | Enable the PCMCIA client driver for the AVM B1/M1/M2 | 47 | Enable the PCMCIA client driver for the AVM B1/M1/M2 |
47 | PCMCIA cards. | 48 | PCMCIA cards. |
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index 5a6895320b48..2cc81a54cbf3 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -928,6 +928,16 @@ config SMC91X | |||
928 | The module will be called smc91x. If you want to compile it as a | 928 | The module will be called smc91x. If you want to compile it as a |
929 | module, say M here and read <file:Documentation/kbuild/modules.txt>. | 929 | module, say M here and read <file:Documentation/kbuild/modules.txt>. |
930 | 930 | ||
931 | config PXA168_ETH | ||
932 | tristate "Marvell pxa168 ethernet support" | ||
933 | depends on CPU_PXA168 | ||
934 | select PHYLIB | ||
935 | help | ||
936 | This driver supports the pxa168 Ethernet ports. | ||
937 | |||
938 | To compile this driver as a module, choose M here. The module | ||
939 | will be called pxa168_eth. | ||
940 | |||
931 | config NET_NETX | 941 | config NET_NETX |
932 | tristate "NetX Ethernet support" | 942 | tristate "NetX Ethernet support" |
933 | select MII | 943 | select MII |
diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 56e8c27f77ce..3e8f150c4b14 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile | |||
@@ -244,6 +244,7 @@ obj-$(CONFIG_MYRI10GE) += myri10ge/ | |||
244 | obj-$(CONFIG_SMC91X) += smc91x.o | 244 | obj-$(CONFIG_SMC91X) += smc91x.o |
245 | obj-$(CONFIG_SMC911X) += smc911x.o | 245 | obj-$(CONFIG_SMC911X) += smc911x.o |
246 | obj-$(CONFIG_SMSC911X) += smsc911x.o | 246 | obj-$(CONFIG_SMSC911X) += smsc911x.o |
247 | obj-$(CONFIG_PXA168_ETH) += pxa168_eth.o | ||
247 | obj-$(CONFIG_BFIN_MAC) += bfin_mac.o | 248 | obj-$(CONFIG_BFIN_MAC) += bfin_mac.o |
248 | obj-$(CONFIG_DM9000) += dm9000.o | 249 | obj-$(CONFIG_DM9000) += dm9000.o |
249 | obj-$(CONFIG_PASEMI_MAC) += pasemi_mac_driver.o | 250 | obj-$(CONFIG_PASEMI_MAC) += pasemi_mac_driver.o |
diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 53af9c93e75c..0c2d96ed561c 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h | |||
@@ -20,8 +20,8 @@ | |||
20 | * (you will need to reboot afterwards) */ | 20 | * (you will need to reboot afterwards) */ |
21 | /* #define BNX2X_STOP_ON_ERROR */ | 21 | /* #define BNX2X_STOP_ON_ERROR */ |
22 | 22 | ||
23 | #define DRV_MODULE_VERSION "1.52.53-3" | 23 | #define DRV_MODULE_VERSION "1.52.53-4" |
24 | #define DRV_MODULE_RELDATE "2010/18/04" | 24 | #define DRV_MODULE_RELDATE "2010/16/08" |
25 | #define BNX2X_BC_VER 0x040200 | 25 | #define BNX2X_BC_VER 0x040200 |
26 | 26 | ||
27 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) | 27 | #if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) |
diff --git a/drivers/net/bnx2x/bnx2x_main.c b/drivers/net/bnx2x/bnx2x_main.c index b4ec2b02a465..f8c3f08e4ce7 100644 --- a/drivers/net/bnx2x/bnx2x_main.c +++ b/drivers/net/bnx2x/bnx2x_main.c | |||
@@ -4328,10 +4328,12 @@ static int bnx2x_init_port(struct bnx2x *bp) | |||
4328 | val |= aeu_gpio_mask; | 4328 | val |= aeu_gpio_mask; |
4329 | REG_WR(bp, offset, val); | 4329 | REG_WR(bp, offset, val); |
4330 | } | 4330 | } |
4331 | bp->port.need_hw_lock = 1; | ||
4331 | break; | 4332 | break; |
4332 | 4333 | ||
4333 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101: | ||
4334 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727: | 4334 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8727: |
4335 | bp->port.need_hw_lock = 1; | ||
4336 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_SFX7101: | ||
4335 | /* add SPIO 5 to group 0 */ | 4337 | /* add SPIO 5 to group 0 */ |
4336 | { | 4338 | { |
4337 | u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : | 4339 | u32 reg_addr = (port ? MISC_REG_AEU_ENABLE1_FUNC_1_OUT_0 : |
@@ -4341,7 +4343,10 @@ static int bnx2x_init_port(struct bnx2x *bp) | |||
4341 | REG_WR(bp, reg_addr, val); | 4343 | REG_WR(bp, reg_addr, val); |
4342 | } | 4344 | } |
4343 | break; | 4345 | break; |
4344 | 4346 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8072: | |
4347 | case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8073: | ||
4348 | bp->port.need_hw_lock = 1; | ||
4349 | break; | ||
4345 | default: | 4350 | default: |
4346 | break; | 4351 | break; |
4347 | } | 4352 | } |
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c index a4a0d2b6eb1c..d3d4a57e2450 100644 --- a/drivers/net/e1000e/82571.c +++ b/drivers/net/e1000e/82571.c | |||
@@ -936,12 +936,14 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw) | |||
936 | ew32(IMC, 0xffffffff); | 936 | ew32(IMC, 0xffffffff); |
937 | icr = er32(ICR); | 937 | icr = er32(ICR); |
938 | 938 | ||
939 | /* Install any alternate MAC address into RAR0 */ | 939 | if (hw->mac.type == e1000_82571) { |
940 | ret_val = e1000_check_alt_mac_addr_generic(hw); | 940 | /* Install any alternate MAC address into RAR0 */ |
941 | if (ret_val) | 941 | ret_val = e1000_check_alt_mac_addr_generic(hw); |
942 | return ret_val; | 942 | if (ret_val) |
943 | return ret_val; | ||
943 | 944 | ||
944 | e1000e_set_laa_state_82571(hw, true); | 945 | e1000e_set_laa_state_82571(hw, true); |
946 | } | ||
945 | 947 | ||
946 | /* Reinitialize the 82571 serdes link state machine */ | 948 | /* Reinitialize the 82571 serdes link state machine */ |
947 | if (hw->phy.media_type == e1000_media_type_internal_serdes) | 949 | if (hw->phy.media_type == e1000_media_type_internal_serdes) |
@@ -1618,14 +1620,16 @@ static s32 e1000_read_mac_addr_82571(struct e1000_hw *hw) | |||
1618 | { | 1620 | { |
1619 | s32 ret_val = 0; | 1621 | s32 ret_val = 0; |
1620 | 1622 | ||
1621 | /* | 1623 | if (hw->mac.type == e1000_82571) { |
1622 | * If there's an alternate MAC address place it in RAR0 | 1624 | /* |
1623 | * so that it will override the Si installed default perm | 1625 | * If there's an alternate MAC address place it in RAR0 |
1624 | * address. | 1626 | * so that it will override the Si installed default perm |
1625 | */ | 1627 | * address. |
1626 | ret_val = e1000_check_alt_mac_addr_generic(hw); | 1628 | */ |
1627 | if (ret_val) | 1629 | ret_val = e1000_check_alt_mac_addr_generic(hw); |
1628 | goto out; | 1630 | if (ret_val) |
1631 | goto out; | ||
1632 | } | ||
1629 | 1633 | ||
1630 | ret_val = e1000_read_mac_addr_generic(hw); | 1634 | ret_val = e1000_read_mac_addr_generic(hw); |
1631 | 1635 | ||
@@ -1833,6 +1837,7 @@ struct e1000_info e1000_82573_info = { | |||
1833 | | FLAG_HAS_SMART_POWER_DOWN | 1837 | | FLAG_HAS_SMART_POWER_DOWN |
1834 | | FLAG_HAS_AMT | 1838 | | FLAG_HAS_AMT |
1835 | | FLAG_HAS_SWSM_ON_LOAD, | 1839 | | FLAG_HAS_SWSM_ON_LOAD, |
1840 | .flags2 = FLAG2_DISABLE_ASPM_L1, | ||
1836 | .pba = 20, | 1841 | .pba = 20, |
1837 | .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN, | 1842 | .max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN, |
1838 | .get_variants = e1000_get_variants_82571, | 1843 | .get_variants = e1000_get_variants_82571, |
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index 307a72f483ee..93b3bedae8d2 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h | |||
@@ -621,6 +621,7 @@ | |||
621 | #define E1000_FLASH_UPDATES 2000 | 621 | #define E1000_FLASH_UPDATES 2000 |
622 | 622 | ||
623 | /* NVM Word Offsets */ | 623 | /* NVM Word Offsets */ |
624 | #define NVM_COMPAT 0x0003 | ||
624 | #define NVM_ID_LED_SETTINGS 0x0004 | 625 | #define NVM_ID_LED_SETTINGS 0x0004 |
625 | #define NVM_INIT_CONTROL2_REG 0x000F | 626 | #define NVM_INIT_CONTROL2_REG 0x000F |
626 | #define NVM_INIT_CONTROL3_PORT_B 0x0014 | 627 | #define NVM_INIT_CONTROL3_PORT_B 0x0014 |
@@ -643,6 +644,9 @@ | |||
643 | /* Mask bits for fields in Word 0x1a of the NVM */ | 644 | /* Mask bits for fields in Word 0x1a of the NVM */ |
644 | #define NVM_WORD1A_ASPM_MASK 0x000C | 645 | #define NVM_WORD1A_ASPM_MASK 0x000C |
645 | 646 | ||
647 | /* Mask bits for fields in Word 0x03 of the EEPROM */ | ||
648 | #define NVM_COMPAT_LOM 0x0800 | ||
649 | |||
646 | /* For checksumming, the sum of all words in the NVM should equal 0xBABA. */ | 650 | /* For checksumming, the sum of all words in the NVM should equal 0xBABA. */ |
647 | #define NVM_SUM 0xBABA | 651 | #define NVM_SUM 0xBABA |
648 | 652 | ||
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c index df4a27922931..0fd4eb5ac5fb 100644 --- a/drivers/net/e1000e/lib.c +++ b/drivers/net/e1000e/lib.c | |||
@@ -183,6 +183,16 @@ s32 e1000_check_alt_mac_addr_generic(struct e1000_hw *hw) | |||
183 | u16 offset, nvm_alt_mac_addr_offset, nvm_data; | 183 | u16 offset, nvm_alt_mac_addr_offset, nvm_data; |
184 | u8 alt_mac_addr[ETH_ALEN]; | 184 | u8 alt_mac_addr[ETH_ALEN]; |
185 | 185 | ||
186 | ret_val = e1000_read_nvm(hw, NVM_COMPAT, 1, &nvm_data); | ||
187 | if (ret_val) | ||
188 | goto out; | ||
189 | |||
190 | /* Check for LOM (vs. NIC) or one of two valid mezzanine cards */ | ||
191 | if (!((nvm_data & NVM_COMPAT_LOM) || | ||
192 | (hw->adapter->pdev->device == E1000_DEV_ID_82571EB_SERDES_DUAL) || | ||
193 | (hw->adapter->pdev->device == E1000_DEV_ID_82571EB_SERDES_QUAD))) | ||
194 | goto out; | ||
195 | |||
186 | ret_val = e1000_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1, | 196 | ret_val = e1000_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1, |
187 | &nvm_alt_mac_addr_offset); | 197 | &nvm_alt_mac_addr_offset); |
188 | if (ret_val) { | 198 | if (ret_val) { |
diff --git a/drivers/net/ehea/ehea.h b/drivers/net/ehea/ehea.h index 99a929964e3c..1846623c6ae6 100644 --- a/drivers/net/ehea/ehea.h +++ b/drivers/net/ehea/ehea.h | |||
@@ -40,7 +40,7 @@ | |||
40 | #include <asm/io.h> | 40 | #include <asm/io.h> |
41 | 41 | ||
42 | #define DRV_NAME "ehea" | 42 | #define DRV_NAME "ehea" |
43 | #define DRV_VERSION "EHEA_0105" | 43 | #define DRV_VERSION "EHEA_0106" |
44 | 44 | ||
45 | /* eHEA capability flags */ | 45 | /* eHEA capability flags */ |
46 | #define DLPAR_PORT_ADD_REM 1 | 46 | #define DLPAR_PORT_ADD_REM 1 |
@@ -400,6 +400,7 @@ struct ehea_port_res { | |||
400 | u32 poll_counter; | 400 | u32 poll_counter; |
401 | struct net_lro_mgr lro_mgr; | 401 | struct net_lro_mgr lro_mgr; |
402 | struct net_lro_desc lro_desc[MAX_LRO_DESCRIPTORS]; | 402 | struct net_lro_desc lro_desc[MAX_LRO_DESCRIPTORS]; |
403 | int sq_restart_flag; | ||
403 | }; | 404 | }; |
404 | 405 | ||
405 | 406 | ||
diff --git a/drivers/net/ehea/ehea_main.c b/drivers/net/ehea/ehea_main.c index 897719b49f96..a333b42111b8 100644 --- a/drivers/net/ehea/ehea_main.c +++ b/drivers/net/ehea/ehea_main.c | |||
@@ -776,6 +776,53 @@ static int ehea_proc_rwqes(struct net_device *dev, | |||
776 | return processed; | 776 | return processed; |
777 | } | 777 | } |
778 | 778 | ||
779 | #define SWQE_RESTART_CHECK 0xdeadbeaff00d0000ull | ||
780 | |||
781 | static void reset_sq_restart_flag(struct ehea_port *port) | ||
782 | { | ||
783 | int i; | ||
784 | |||
785 | for (i = 0; i < port->num_def_qps + port->num_add_tx_qps; i++) { | ||
786 | struct ehea_port_res *pr = &port->port_res[i]; | ||
787 | pr->sq_restart_flag = 0; | ||
788 | } | ||
789 | } | ||
790 | |||
791 | static void check_sqs(struct ehea_port *port) | ||
792 | { | ||
793 | struct ehea_swqe *swqe; | ||
794 | int swqe_index; | ||
795 | int i, k; | ||
796 | |||
797 | for (i = 0; i < port->num_def_qps + port->num_add_tx_qps; i++) { | ||
798 | struct ehea_port_res *pr = &port->port_res[i]; | ||
799 | k = 0; | ||
800 | swqe = ehea_get_swqe(pr->qp, &swqe_index); | ||
801 | memset(swqe, 0, SWQE_HEADER_SIZE); | ||
802 | atomic_dec(&pr->swqe_avail); | ||
803 | |||
804 | swqe->tx_control |= EHEA_SWQE_PURGE; | ||
805 | swqe->wr_id = SWQE_RESTART_CHECK; | ||
806 | swqe->tx_control |= EHEA_SWQE_SIGNALLED_COMPLETION; | ||
807 | swqe->tx_control |= EHEA_SWQE_IMM_DATA_PRESENT; | ||
808 | swqe->immediate_data_length = 80; | ||
809 | |||
810 | ehea_post_swqe(pr->qp, swqe); | ||
811 | |||
812 | while (pr->sq_restart_flag == 0) { | ||
813 | msleep(5); | ||
814 | if (++k == 100) { | ||
815 | ehea_error("HW/SW queues out of sync"); | ||
816 | ehea_schedule_port_reset(pr->port); | ||
817 | return; | ||
818 | } | ||
819 | } | ||
820 | } | ||
821 | |||
822 | return; | ||
823 | } | ||
824 | |||
825 | |||
779 | static struct ehea_cqe *ehea_proc_cqes(struct ehea_port_res *pr, int my_quota) | 826 | static struct ehea_cqe *ehea_proc_cqes(struct ehea_port_res *pr, int my_quota) |
780 | { | 827 | { |
781 | struct sk_buff *skb; | 828 | struct sk_buff *skb; |
@@ -793,6 +840,13 @@ static struct ehea_cqe *ehea_proc_cqes(struct ehea_port_res *pr, int my_quota) | |||
793 | 840 | ||
794 | cqe_counter++; | 841 | cqe_counter++; |
795 | rmb(); | 842 | rmb(); |
843 | |||
844 | if (cqe->wr_id == SWQE_RESTART_CHECK) { | ||
845 | pr->sq_restart_flag = 1; | ||
846 | swqe_av++; | ||
847 | break; | ||
848 | } | ||
849 | |||
796 | if (cqe->status & EHEA_CQE_STAT_ERR_MASK) { | 850 | if (cqe->status & EHEA_CQE_STAT_ERR_MASK) { |
797 | ehea_error("Bad send completion status=0x%04X", | 851 | ehea_error("Bad send completion status=0x%04X", |
798 | cqe->status); | 852 | cqe->status); |
@@ -2675,8 +2729,10 @@ static void ehea_flush_sq(struct ehea_port *port) | |||
2675 | int k = 0; | 2729 | int k = 0; |
2676 | while (atomic_read(&pr->swqe_avail) < swqe_max) { | 2730 | while (atomic_read(&pr->swqe_avail) < swqe_max) { |
2677 | msleep(5); | 2731 | msleep(5); |
2678 | if (++k == 20) | 2732 | if (++k == 20) { |
2733 | ehea_error("WARNING: sq not flushed completely"); | ||
2679 | break; | 2734 | break; |
2735 | } | ||
2680 | } | 2736 | } |
2681 | } | 2737 | } |
2682 | } | 2738 | } |
@@ -2917,6 +2973,7 @@ static void ehea_rereg_mrs(struct work_struct *work) | |||
2917 | port_napi_disable(port); | 2973 | port_napi_disable(port); |
2918 | mutex_unlock(&port->port_lock); | 2974 | mutex_unlock(&port->port_lock); |
2919 | } | 2975 | } |
2976 | reset_sq_restart_flag(port); | ||
2920 | } | 2977 | } |
2921 | 2978 | ||
2922 | /* Unregister old memory region */ | 2979 | /* Unregister old memory region */ |
@@ -2951,6 +3008,7 @@ static void ehea_rereg_mrs(struct work_struct *work) | |||
2951 | mutex_lock(&port->port_lock); | 3008 | mutex_lock(&port->port_lock); |
2952 | port_napi_enable(port); | 3009 | port_napi_enable(port); |
2953 | ret = ehea_restart_qps(dev); | 3010 | ret = ehea_restart_qps(dev); |
3011 | check_sqs(port); | ||
2954 | if (!ret) | 3012 | if (!ret) |
2955 | netif_wake_queue(dev); | 3013 | netif_wake_queue(dev); |
2956 | mutex_unlock(&port->port_lock); | 3014 | mutex_unlock(&port->port_lock); |
diff --git a/drivers/net/ibmveth.c b/drivers/net/ibmveth.c index 2602852cc55a..4734c939ad03 100644 --- a/drivers/net/ibmveth.c +++ b/drivers/net/ibmveth.c | |||
@@ -1113,7 +1113,8 @@ static int ibmveth_change_mtu(struct net_device *dev, int new_mtu) | |||
1113 | struct ibmveth_adapter *adapter = netdev_priv(dev); | 1113 | struct ibmveth_adapter *adapter = netdev_priv(dev); |
1114 | struct vio_dev *viodev = adapter->vdev; | 1114 | struct vio_dev *viodev = adapter->vdev; |
1115 | int new_mtu_oh = new_mtu + IBMVETH_BUFF_OH; | 1115 | int new_mtu_oh = new_mtu + IBMVETH_BUFF_OH; |
1116 | int i; | 1116 | int i, rc; |
1117 | int need_restart = 0; | ||
1117 | 1118 | ||
1118 | if (new_mtu < IBMVETH_MAX_MTU) | 1119 | if (new_mtu < IBMVETH_MAX_MTU) |
1119 | return -EINVAL; | 1120 | return -EINVAL; |
@@ -1127,35 +1128,32 @@ static int ibmveth_change_mtu(struct net_device *dev, int new_mtu) | |||
1127 | 1128 | ||
1128 | /* Deactivate all the buffer pools so that the next loop can activate | 1129 | /* Deactivate all the buffer pools so that the next loop can activate |
1129 | only the buffer pools necessary to hold the new MTU */ | 1130 | only the buffer pools necessary to hold the new MTU */ |
1130 | for (i = 0; i < IbmVethNumBufferPools; i++) | 1131 | if (netif_running(adapter->netdev)) { |
1131 | if (adapter->rx_buff_pool[i].active) { | 1132 | need_restart = 1; |
1132 | ibmveth_free_buffer_pool(adapter, | 1133 | adapter->pool_config = 1; |
1133 | &adapter->rx_buff_pool[i]); | 1134 | ibmveth_close(adapter->netdev); |
1134 | adapter->rx_buff_pool[i].active = 0; | 1135 | adapter->pool_config = 0; |
1135 | } | 1136 | } |
1136 | 1137 | ||
1137 | /* Look for an active buffer pool that can hold the new MTU */ | 1138 | /* Look for an active buffer pool that can hold the new MTU */ |
1138 | for(i = 0; i<IbmVethNumBufferPools; i++) { | 1139 | for(i = 0; i<IbmVethNumBufferPools; i++) { |
1139 | adapter->rx_buff_pool[i].active = 1; | 1140 | adapter->rx_buff_pool[i].active = 1; |
1140 | 1141 | ||
1141 | if (new_mtu_oh < adapter->rx_buff_pool[i].buff_size) { | 1142 | if (new_mtu_oh < adapter->rx_buff_pool[i].buff_size) { |
1142 | if (netif_running(adapter->netdev)) { | ||
1143 | adapter->pool_config = 1; | ||
1144 | ibmveth_close(adapter->netdev); | ||
1145 | adapter->pool_config = 0; | ||
1146 | dev->mtu = new_mtu; | ||
1147 | vio_cmo_set_dev_desired(viodev, | ||
1148 | ibmveth_get_desired_dma | ||
1149 | (viodev)); | ||
1150 | return ibmveth_open(adapter->netdev); | ||
1151 | } | ||
1152 | dev->mtu = new_mtu; | 1143 | dev->mtu = new_mtu; |
1153 | vio_cmo_set_dev_desired(viodev, | 1144 | vio_cmo_set_dev_desired(viodev, |
1154 | ibmveth_get_desired_dma | 1145 | ibmveth_get_desired_dma |
1155 | (viodev)); | 1146 | (viodev)); |
1147 | if (need_restart) { | ||
1148 | return ibmveth_open(adapter->netdev); | ||
1149 | } | ||
1156 | return 0; | 1150 | return 0; |
1157 | } | 1151 | } |
1158 | } | 1152 | } |
1153 | |||
1154 | if (need_restart && (rc = ibmveth_open(adapter->netdev))) | ||
1155 | return rc; | ||
1156 | |||
1159 | return -EINVAL; | 1157 | return -EINVAL; |
1160 | } | 1158 | } |
1161 | 1159 | ||
diff --git a/drivers/net/ll_temac_main.c b/drivers/net/ll_temac_main.c index c7b624711f5e..bdf2149e5296 100644 --- a/drivers/net/ll_temac_main.c +++ b/drivers/net/ll_temac_main.c | |||
@@ -902,8 +902,8 @@ temac_poll_controller(struct net_device *ndev) | |||
902 | disable_irq(lp->tx_irq); | 902 | disable_irq(lp->tx_irq); |
903 | disable_irq(lp->rx_irq); | 903 | disable_irq(lp->rx_irq); |
904 | 904 | ||
905 | ll_temac_rx_irq(lp->tx_irq, lp); | 905 | ll_temac_rx_irq(lp->tx_irq, ndev); |
906 | ll_temac_tx_irq(lp->rx_irq, lp); | 906 | ll_temac_tx_irq(lp->rx_irq, ndev); |
907 | 907 | ||
908 | enable_irq(lp->tx_irq); | 908 | enable_irq(lp->tx_irq); |
909 | enable_irq(lp->rx_irq); | 909 | enable_irq(lp->rx_irq); |
diff --git a/drivers/net/netxen/netxen_nic.h b/drivers/net/netxen/netxen_nic.h index ffa1b9ce1cc5..6dca3574e355 100644 --- a/drivers/net/netxen/netxen_nic.h +++ b/drivers/net/netxen/netxen_nic.h | |||
@@ -53,8 +53,8 @@ | |||
53 | 53 | ||
54 | #define _NETXEN_NIC_LINUX_MAJOR 4 | 54 | #define _NETXEN_NIC_LINUX_MAJOR 4 |
55 | #define _NETXEN_NIC_LINUX_MINOR 0 | 55 | #define _NETXEN_NIC_LINUX_MINOR 0 |
56 | #define _NETXEN_NIC_LINUX_SUBVERSION 73 | 56 | #define _NETXEN_NIC_LINUX_SUBVERSION 74 |
57 | #define NETXEN_NIC_LINUX_VERSIONID "4.0.73" | 57 | #define NETXEN_NIC_LINUX_VERSIONID "4.0.74" |
58 | 58 | ||
59 | #define NETXEN_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c)) | 59 | #define NETXEN_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c)) |
60 | #define _major(v) (((v) >> 24) & 0xff) | 60 | #define _major(v) (((v) >> 24) & 0xff) |
diff --git a/drivers/net/netxen/netxen_nic_init.c b/drivers/net/netxen/netxen_nic_init.c index c865dda2adf1..cabae7bb1fc6 100644 --- a/drivers/net/netxen/netxen_nic_init.c +++ b/drivers/net/netxen/netxen_nic_init.c | |||
@@ -1805,8 +1805,6 @@ netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, | |||
1805 | netxen_ctx_msg msg = 0; | 1805 | netxen_ctx_msg msg = 0; |
1806 | struct list_head *head; | 1806 | struct list_head *head; |
1807 | 1807 | ||
1808 | spin_lock(&rds_ring->lock); | ||
1809 | |||
1810 | producer = rds_ring->producer; | 1808 | producer = rds_ring->producer; |
1811 | 1809 | ||
1812 | head = &rds_ring->free_list; | 1810 | head = &rds_ring->free_list; |
@@ -1853,8 +1851,6 @@ netxen_post_rx_buffers(struct netxen_adapter *adapter, u32 ringid, | |||
1853 | NETXEN_RCV_PRODUCER_OFFSET), msg); | 1851 | NETXEN_RCV_PRODUCER_OFFSET), msg); |
1854 | } | 1852 | } |
1855 | } | 1853 | } |
1856 | |||
1857 | spin_unlock(&rds_ring->lock); | ||
1858 | } | 1854 | } |
1859 | 1855 | ||
1860 | static void | 1856 | static void |
diff --git a/drivers/net/netxen/netxen_nic_main.c b/drivers/net/netxen/netxen_nic_main.c index fd86e18604e6..cb30df106a2c 100644 --- a/drivers/net/netxen/netxen_nic_main.c +++ b/drivers/net/netxen/netxen_nic_main.c | |||
@@ -2032,8 +2032,6 @@ struct net_device_stats *netxen_nic_get_stats(struct net_device *netdev) | |||
2032 | struct netxen_adapter *adapter = netdev_priv(netdev); | 2032 | struct netxen_adapter *adapter = netdev_priv(netdev); |
2033 | struct net_device_stats *stats = &netdev->stats; | 2033 | struct net_device_stats *stats = &netdev->stats; |
2034 | 2034 | ||
2035 | memset(stats, 0, sizeof(*stats)); | ||
2036 | |||
2037 | stats->rx_packets = adapter->stats.rx_pkts + adapter->stats.lro_pkts; | 2035 | stats->rx_packets = adapter->stats.rx_pkts + adapter->stats.lro_pkts; |
2038 | stats->tx_packets = adapter->stats.xmitfinished; | 2036 | stats->tx_packets = adapter->stats.xmitfinished; |
2039 | stats->rx_bytes = adapter->stats.rxbytes; | 2037 | stats->rx_bytes = adapter->stats.rxbytes; |
diff --git a/drivers/net/pxa168_eth.c b/drivers/net/pxa168_eth.c new file mode 100644 index 000000000000..ecc64d750cce --- /dev/null +++ b/drivers/net/pxa168_eth.c | |||
@@ -0,0 +1,1666 @@ | |||
1 | /* | ||
2 | * PXA168 ethernet driver. | ||
3 | * Most of the code is derived from mv643xx ethernet driver. | ||
4 | * | ||
5 | * Copyright (C) 2010 Marvell International Ltd. | ||
6 | * Sachin Sanap <ssanap@marvell.com> | ||
7 | * Philip Rakity <prakity@marvell.com> | ||
8 | * Mark Brown <markb@marvell.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or | ||
11 | * modify it under the terms of the GNU General Public License | ||
12 | * as published by the Free Software Foundation; either version 2 | ||
13 | * of the License, or (at your option) any later version. | ||
14 | * | ||
15 | * This program is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
18 | * GNU General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU General Public License | ||
21 | * along with this program; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
23 | */ | ||
24 | |||
25 | #include <linux/init.h> | ||
26 | #include <linux/dma-mapping.h> | ||
27 | #include <linux/in.h> | ||
28 | #include <linux/ip.h> | ||
29 | #include <linux/tcp.h> | ||
30 | #include <linux/udp.h> | ||
31 | #include <linux/etherdevice.h> | ||
32 | #include <linux/bitops.h> | ||
33 | #include <linux/delay.h> | ||
34 | #include <linux/ethtool.h> | ||
35 | #include <linux/platform_device.h> | ||
36 | #include <linux/module.h> | ||
37 | #include <linux/kernel.h> | ||
38 | #include <linux/workqueue.h> | ||
39 | #include <linux/clk.h> | ||
40 | #include <linux/phy.h> | ||
41 | #include <linux/io.h> | ||
42 | #include <linux/types.h> | ||
43 | #include <asm/pgtable.h> | ||
44 | #include <asm/system.h> | ||
45 | #include <linux/delay.h> | ||
46 | #include <linux/dma-mapping.h> | ||
47 | #include <asm/cacheflush.h> | ||
48 | #include <linux/pxa168_eth.h> | ||
49 | |||
50 | #define DRIVER_NAME "pxa168-eth" | ||
51 | #define DRIVER_VERSION "0.3" | ||
52 | |||
53 | /* | ||
54 | * Registers | ||
55 | */ | ||
56 | |||
57 | #define PHY_ADDRESS 0x0000 | ||
58 | #define SMI 0x0010 | ||
59 | #define PORT_CONFIG 0x0400 | ||
60 | #define PORT_CONFIG_EXT 0x0408 | ||
61 | #define PORT_COMMAND 0x0410 | ||
62 | #define PORT_STATUS 0x0418 | ||
63 | #define HTPR 0x0428 | ||
64 | #define SDMA_CONFIG 0x0440 | ||
65 | #define SDMA_CMD 0x0448 | ||
66 | #define INT_CAUSE 0x0450 | ||
67 | #define INT_W_CLEAR 0x0454 | ||
68 | #define INT_MASK 0x0458 | ||
69 | #define ETH_F_RX_DESC_0 0x0480 | ||
70 | #define ETH_C_RX_DESC_0 0x04A0 | ||
71 | #define ETH_C_TX_DESC_1 0x04E4 | ||
72 | |||
73 | /* smi register */ | ||
74 | #define SMI_BUSY (1 << 28) /* 0 - Write, 1 - Read */ | ||
75 | #define SMI_R_VALID (1 << 27) /* 0 - Write, 1 - Read */ | ||
76 | #define SMI_OP_W (0 << 26) /* Write operation */ | ||
77 | #define SMI_OP_R (1 << 26) /* Read operation */ | ||
78 | |||
79 | #define PHY_WAIT_ITERATIONS 10 | ||
80 | |||
81 | #define PXA168_ETH_PHY_ADDR_DEFAULT 0 | ||
82 | /* RX & TX descriptor command */ | ||
83 | #define BUF_OWNED_BY_DMA (1 << 31) | ||
84 | |||
85 | /* RX descriptor status */ | ||
86 | #define RX_EN_INT (1 << 23) | ||
87 | #define RX_FIRST_DESC (1 << 17) | ||
88 | #define RX_LAST_DESC (1 << 16) | ||
89 | #define RX_ERROR (1 << 15) | ||
90 | |||
91 | /* TX descriptor command */ | ||
92 | #define TX_EN_INT (1 << 23) | ||
93 | #define TX_GEN_CRC (1 << 22) | ||
94 | #define TX_ZERO_PADDING (1 << 18) | ||
95 | #define TX_FIRST_DESC (1 << 17) | ||
96 | #define TX_LAST_DESC (1 << 16) | ||
97 | #define TX_ERROR (1 << 15) | ||
98 | |||
99 | /* SDMA_CMD */ | ||
100 | #define SDMA_CMD_AT (1 << 31) | ||
101 | #define SDMA_CMD_TXDL (1 << 24) | ||
102 | #define SDMA_CMD_TXDH (1 << 23) | ||
103 | #define SDMA_CMD_AR (1 << 15) | ||
104 | #define SDMA_CMD_ERD (1 << 7) | ||
105 | |||
106 | /* Bit definitions of the Port Config Reg */ | ||
107 | #define PCR_HS (1 << 12) | ||
108 | #define PCR_EN (1 << 7) | ||
109 | #define PCR_PM (1 << 0) | ||
110 | |||
111 | /* Bit definitions of the Port Config Extend Reg */ | ||
112 | #define PCXR_2BSM (1 << 28) | ||
113 | #define PCXR_DSCP_EN (1 << 21) | ||
114 | #define PCXR_MFL_1518 (0 << 14) | ||
115 | #define PCXR_MFL_1536 (1 << 14) | ||
116 | #define PCXR_MFL_2048 (2 << 14) | ||
117 | #define PCXR_MFL_64K (3 << 14) | ||
118 | #define PCXR_FLP (1 << 11) | ||
119 | #define PCXR_PRIO_TX_OFF 3 | ||
120 | #define PCXR_TX_HIGH_PRI (7 << PCXR_PRIO_TX_OFF) | ||
121 | |||
122 | /* Bit definitions of the SDMA Config Reg */ | ||
123 | #define SDCR_BSZ_OFF 12 | ||
124 | #define SDCR_BSZ8 (3 << SDCR_BSZ_OFF) | ||
125 | #define SDCR_BSZ4 (2 << SDCR_BSZ_OFF) | ||
126 | #define SDCR_BSZ2 (1 << SDCR_BSZ_OFF) | ||
127 | #define SDCR_BSZ1 (0 << SDCR_BSZ_OFF) | ||
128 | #define SDCR_BLMR (1 << 6) | ||
129 | #define SDCR_BLMT (1 << 7) | ||
130 | #define SDCR_RIFB (1 << 9) | ||
131 | #define SDCR_RC_OFF 2 | ||
132 | #define SDCR_RC_MAX_RETRANS (0xf << SDCR_RC_OFF) | ||
133 | |||
134 | /* | ||
135 | * Bit definitions of the Interrupt Cause Reg | ||
136 | * and Interrupt MASK Reg is the same | ||
137 | */ | ||
138 | #define ICR_RXBUF (1 << 0) | ||
139 | #define ICR_TXBUF_H (1 << 2) | ||
140 | #define ICR_TXBUF_L (1 << 3) | ||
141 | #define ICR_TXEND_H (1 << 6) | ||
142 | #define ICR_TXEND_L (1 << 7) | ||
143 | #define ICR_RXERR (1 << 8) | ||
144 | #define ICR_TXERR_H (1 << 10) | ||
145 | #define ICR_TXERR_L (1 << 11) | ||
146 | #define ICR_TX_UDR (1 << 13) | ||
147 | #define ICR_MII_CH (1 << 28) | ||
148 | |||
149 | #define ALL_INTS (ICR_TXBUF_H | ICR_TXBUF_L | ICR_TX_UDR |\ | ||
150 | ICR_TXERR_H | ICR_TXERR_L |\ | ||
151 | ICR_TXEND_H | ICR_TXEND_L |\ | ||
152 | ICR_RXBUF | ICR_RXERR | ICR_MII_CH) | ||
153 | |||
154 | #define ETH_HW_IP_ALIGN 2 /* hw aligns IP header */ | ||
155 | |||
156 | #define NUM_RX_DESCS 64 | ||
157 | #define NUM_TX_DESCS 64 | ||
158 | |||
159 | #define HASH_ADD 0 | ||
160 | #define HASH_DELETE 1 | ||
161 | #define HASH_ADDR_TABLE_SIZE 0x4000 /* 16K (1/2K address - PCR_HS == 1) */ | ||
162 | #define HOP_NUMBER 12 | ||
163 | |||
164 | /* Bit definitions for Port status */ | ||
165 | #define PORT_SPEED_100 (1 << 0) | ||
166 | #define FULL_DUPLEX (1 << 1) | ||
167 | #define FLOW_CONTROL_ENABLED (1 << 2) | ||
168 | #define LINK_UP (1 << 3) | ||
169 | |||
170 | /* Bit definitions for work to be done */ | ||
171 | #define WORK_LINK (1 << 0) | ||
172 | #define WORK_TX_DONE (1 << 1) | ||
173 | |||
174 | /* | ||
175 | * Misc definitions. | ||
176 | */ | ||
177 | #define SKB_DMA_REALIGN ((PAGE_SIZE - NET_SKB_PAD) % SMP_CACHE_BYTES) | ||
178 | |||
179 | struct rx_desc { | ||
180 | u32 cmd_sts; /* Descriptor command status */ | ||
181 | u16 byte_cnt; /* Descriptor buffer byte count */ | ||
182 | u16 buf_size; /* Buffer size */ | ||
183 | u32 buf_ptr; /* Descriptor buffer pointer */ | ||
184 | u32 next_desc_ptr; /* Next descriptor pointer */ | ||
185 | }; | ||
186 | |||
187 | struct tx_desc { | ||
188 | u32 cmd_sts; /* Command/status field */ | ||
189 | u16 reserved; | ||
190 | u16 byte_cnt; /* buffer byte count */ | ||
191 | u32 buf_ptr; /* pointer to buffer for this descriptor */ | ||
192 | u32 next_desc_ptr; /* Pointer to next descriptor */ | ||
193 | }; | ||
194 | |||
195 | struct pxa168_eth_private { | ||
196 | int port_num; /* User Ethernet port number */ | ||
197 | |||
198 | int rx_resource_err; /* Rx ring resource error flag */ | ||
199 | |||
200 | /* Next available and first returning Rx resource */ | ||
201 | int rx_curr_desc_q, rx_used_desc_q; | ||
202 | |||
203 | /* Next available and first returning Tx resource */ | ||
204 | int tx_curr_desc_q, tx_used_desc_q; | ||
205 | |||
206 | struct rx_desc *p_rx_desc_area; | ||
207 | dma_addr_t rx_desc_dma; | ||
208 | int rx_desc_area_size; | ||
209 | struct sk_buff **rx_skb; | ||
210 | |||
211 | struct tx_desc *p_tx_desc_area; | ||
212 | dma_addr_t tx_desc_dma; | ||
213 | int tx_desc_area_size; | ||
214 | struct sk_buff **tx_skb; | ||
215 | |||
216 | struct work_struct tx_timeout_task; | ||
217 | |||
218 | struct net_device *dev; | ||
219 | struct napi_struct napi; | ||
220 | u8 work_todo; | ||
221 | int skb_size; | ||
222 | |||
223 | struct net_device_stats stats; | ||
224 | /* Size of Tx Ring per queue */ | ||
225 | int tx_ring_size; | ||
226 | /* Number of tx descriptors in use */ | ||
227 | int tx_desc_count; | ||
228 | /* Size of Rx Ring per queue */ | ||
229 | int rx_ring_size; | ||
230 | /* Number of rx descriptors in use */ | ||
231 | int rx_desc_count; | ||
232 | |||
233 | /* | ||
234 | * Used in case RX Ring is empty, which can occur when | ||
235 | * system does not have resources (skb's) | ||
236 | */ | ||
237 | struct timer_list timeout; | ||
238 | struct mii_bus *smi_bus; | ||
239 | struct phy_device *phy; | ||
240 | |||
241 | /* clock */ | ||
242 | struct clk *clk; | ||
243 | struct pxa168_eth_platform_data *pd; | ||
244 | /* | ||
245 | * Ethernet controller base address. | ||
246 | */ | ||
247 | void __iomem *base; | ||
248 | |||
249 | /* Pointer to the hardware address filter table */ | ||
250 | void *htpr; | ||
251 | dma_addr_t htpr_dma; | ||
252 | }; | ||
253 | |||
254 | struct addr_table_entry { | ||
255 | __le32 lo; | ||
256 | __le32 hi; | ||
257 | }; | ||
258 | |||
259 | /* Bit fields of a Hash Table Entry */ | ||
260 | enum hash_table_entry { | ||
261 | HASH_ENTRY_VALID = 1, | ||
262 | SKIP = 2, | ||
263 | HASH_ENTRY_RECEIVE_DISCARD = 4, | ||
264 | HASH_ENTRY_RECEIVE_DISCARD_BIT = 2 | ||
265 | }; | ||
266 | |||
267 | static int pxa168_get_settings(struct net_device *dev, struct ethtool_cmd *cmd); | ||
268 | static int pxa168_set_settings(struct net_device *dev, struct ethtool_cmd *cmd); | ||
269 | static int pxa168_init_hw(struct pxa168_eth_private *pep); | ||
270 | static void eth_port_reset(struct net_device *dev); | ||
271 | static void eth_port_start(struct net_device *dev); | ||
272 | static int pxa168_eth_open(struct net_device *dev); | ||
273 | static int pxa168_eth_stop(struct net_device *dev); | ||
274 | static int ethernet_phy_setup(struct net_device *dev); | ||
275 | |||
276 | static inline u32 rdl(struct pxa168_eth_private *pep, int offset) | ||
277 | { | ||
278 | return readl(pep->base + offset); | ||
279 | } | ||
280 | |||
281 | static inline void wrl(struct pxa168_eth_private *pep, int offset, u32 data) | ||
282 | { | ||
283 | writel(data, pep->base + offset); | ||
284 | } | ||
285 | |||
286 | static void abort_dma(struct pxa168_eth_private *pep) | ||
287 | { | ||
288 | int delay; | ||
289 | int max_retries = 40; | ||
290 | |||
291 | do { | ||
292 | wrl(pep, SDMA_CMD, SDMA_CMD_AR | SDMA_CMD_AT); | ||
293 | udelay(100); | ||
294 | |||
295 | delay = 10; | ||
296 | while ((rdl(pep, SDMA_CMD) & (SDMA_CMD_AR | SDMA_CMD_AT)) | ||
297 | && delay-- > 0) { | ||
298 | udelay(10); | ||
299 | } | ||
300 | } while (max_retries-- > 0 && delay <= 0); | ||
301 | |||
302 | if (max_retries <= 0) | ||
303 | printk(KERN_ERR "%s : DMA Stuck\n", __func__); | ||
304 | } | ||
305 | |||
306 | static int ethernet_phy_get(struct pxa168_eth_private *pep) | ||
307 | { | ||
308 | unsigned int reg_data; | ||
309 | |||
310 | reg_data = rdl(pep, PHY_ADDRESS); | ||
311 | |||
312 | return (reg_data >> (5 * pep->port_num)) & 0x1f; | ||
313 | } | ||
314 | |||
315 | static void ethernet_phy_set_addr(struct pxa168_eth_private *pep, int phy_addr) | ||
316 | { | ||
317 | u32 reg_data; | ||
318 | int addr_shift = 5 * pep->port_num; | ||
319 | |||
320 | reg_data = rdl(pep, PHY_ADDRESS); | ||
321 | reg_data &= ~(0x1f << addr_shift); | ||
322 | reg_data |= (phy_addr & 0x1f) << addr_shift; | ||
323 | wrl(pep, PHY_ADDRESS, reg_data); | ||
324 | } | ||
325 | |||
326 | static void ethernet_phy_reset(struct pxa168_eth_private *pep) | ||
327 | { | ||
328 | int data; | ||
329 | |||
330 | data = phy_read(pep->phy, MII_BMCR); | ||
331 | if (data < 0) | ||
332 | return; | ||
333 | |||
334 | data |= BMCR_RESET; | ||
335 | if (phy_write(pep->phy, MII_BMCR, data) < 0) | ||
336 | return; | ||
337 | |||
338 | do { | ||
339 | data = phy_read(pep->phy, MII_BMCR); | ||
340 | } while (data >= 0 && data & BMCR_RESET); | ||
341 | } | ||
342 | |||
343 | static void rxq_refill(struct net_device *dev) | ||
344 | { | ||
345 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
346 | struct sk_buff *skb; | ||
347 | struct rx_desc *p_used_rx_desc; | ||
348 | int used_rx_desc; | ||
349 | |||
350 | while (pep->rx_desc_count < pep->rx_ring_size) { | ||
351 | int size; | ||
352 | |||
353 | skb = dev_alloc_skb(pep->skb_size); | ||
354 | if (!skb) | ||
355 | break; | ||
356 | if (SKB_DMA_REALIGN) | ||
357 | skb_reserve(skb, SKB_DMA_REALIGN); | ||
358 | pep->rx_desc_count++; | ||
359 | /* Get 'used' Rx descriptor */ | ||
360 | used_rx_desc = pep->rx_used_desc_q; | ||
361 | p_used_rx_desc = &pep->p_rx_desc_area[used_rx_desc]; | ||
362 | size = skb->end - skb->data; | ||
363 | p_used_rx_desc->buf_ptr = dma_map_single(NULL, | ||
364 | skb->data, | ||
365 | size, | ||
366 | DMA_FROM_DEVICE); | ||
367 | p_used_rx_desc->buf_size = size; | ||
368 | pep->rx_skb[used_rx_desc] = skb; | ||
369 | |||
370 | /* Return the descriptor to DMA ownership */ | ||
371 | wmb(); | ||
372 | p_used_rx_desc->cmd_sts = BUF_OWNED_BY_DMA | RX_EN_INT; | ||
373 | wmb(); | ||
374 | |||
375 | /* Move the used descriptor pointer to the next descriptor */ | ||
376 | pep->rx_used_desc_q = (used_rx_desc + 1) % pep->rx_ring_size; | ||
377 | |||
378 | /* Any Rx return cancels the Rx resource error status */ | ||
379 | pep->rx_resource_err = 0; | ||
380 | |||
381 | skb_reserve(skb, ETH_HW_IP_ALIGN); | ||
382 | } | ||
383 | |||
384 | /* | ||
385 | * If RX ring is empty of SKB, set a timer to try allocating | ||
386 | * again at a later time. | ||
387 | */ | ||
388 | if (pep->rx_desc_count == 0) { | ||
389 | pep->timeout.expires = jiffies + (HZ / 10); | ||
390 | add_timer(&pep->timeout); | ||
391 | } | ||
392 | } | ||
393 | |||
394 | static inline void rxq_refill_timer_wrapper(unsigned long data) | ||
395 | { | ||
396 | struct pxa168_eth_private *pep = (void *)data; | ||
397 | napi_schedule(&pep->napi); | ||
398 | } | ||
399 | |||
400 | static inline u8 flip_8_bits(u8 x) | ||
401 | { | ||
402 | return (((x) & 0x01) << 3) | (((x) & 0x02) << 1) | ||
403 | | (((x) & 0x04) >> 1) | (((x) & 0x08) >> 3) | ||
404 | | (((x) & 0x10) << 3) | (((x) & 0x20) << 1) | ||
405 | | (((x) & 0x40) >> 1) | (((x) & 0x80) >> 3); | ||
406 | } | ||
407 | |||
408 | static void nibble_swap_every_byte(unsigned char *mac_addr) | ||
409 | { | ||
410 | int i; | ||
411 | for (i = 0; i < ETH_ALEN; i++) { | ||
412 | mac_addr[i] = ((mac_addr[i] & 0x0f) << 4) | | ||
413 | ((mac_addr[i] & 0xf0) >> 4); | ||
414 | } | ||
415 | } | ||
416 | |||
417 | static void inverse_every_nibble(unsigned char *mac_addr) | ||
418 | { | ||
419 | int i; | ||
420 | for (i = 0; i < ETH_ALEN; i++) | ||
421 | mac_addr[i] = flip_8_bits(mac_addr[i]); | ||
422 | } | ||
423 | |||
424 | /* | ||
425 | * ---------------------------------------------------------------------------- | ||
426 | * This function will calculate the hash function of the address. | ||
427 | * Inputs | ||
428 | * mac_addr_orig - MAC address. | ||
429 | * Outputs | ||
430 | * return the calculated entry. | ||
431 | */ | ||
432 | static u32 hash_function(unsigned char *mac_addr_orig) | ||
433 | { | ||
434 | u32 hash_result; | ||
435 | u32 addr0; | ||
436 | u32 addr1; | ||
437 | u32 addr2; | ||
438 | u32 addr3; | ||
439 | unsigned char mac_addr[ETH_ALEN]; | ||
440 | |||
441 | /* Make a copy of MAC address since we are going to performe bit | ||
442 | * operations on it | ||
443 | */ | ||
444 | memcpy(mac_addr, mac_addr_orig, ETH_ALEN); | ||
445 | |||
446 | nibble_swap_every_byte(mac_addr); | ||
447 | inverse_every_nibble(mac_addr); | ||
448 | |||
449 | addr0 = (mac_addr[5] >> 2) & 0x3f; | ||
450 | addr1 = (mac_addr[5] & 0x03) | (((mac_addr[4] & 0x7f)) << 2); | ||
451 | addr2 = ((mac_addr[4] & 0x80) >> 7) | mac_addr[3] << 1; | ||
452 | addr3 = (mac_addr[2] & 0xff) | ((mac_addr[1] & 1) << 8); | ||
453 | |||
454 | hash_result = (addr0 << 9) | (addr1 ^ addr2 ^ addr3); | ||
455 | hash_result = hash_result & 0x07ff; | ||
456 | return hash_result; | ||
457 | } | ||
458 | |||
459 | /* | ||
460 | * ---------------------------------------------------------------------------- | ||
461 | * This function will add/del an entry to the address table. | ||
462 | * Inputs | ||
463 | * pep - ETHERNET . | ||
464 | * mac_addr - MAC address. | ||
465 | * skip - if 1, skip this address.Used in case of deleting an entry which is a | ||
466 | * part of chain in the hash table.We cant just delete the entry since | ||
467 | * that will break the chain.We need to defragment the tables time to | ||
468 | * time. | ||
469 | * rd - 0 Discard packet upon match. | ||
470 | * - 1 Receive packet upon match. | ||
471 | * Outputs | ||
472 | * address table entry is added/deleted. | ||
473 | * 0 if success. | ||
474 | * -ENOSPC if table full | ||
475 | */ | ||
476 | static int add_del_hash_entry(struct pxa168_eth_private *pep, | ||
477 | unsigned char *mac_addr, | ||
478 | u32 rd, u32 skip, int del) | ||
479 | { | ||
480 | struct addr_table_entry *entry, *start; | ||
481 | u32 new_high; | ||
482 | u32 new_low; | ||
483 | u32 i; | ||
484 | |||
485 | new_low = (((mac_addr[1] >> 4) & 0xf) << 15) | ||
486 | | (((mac_addr[1] >> 0) & 0xf) << 11) | ||
487 | | (((mac_addr[0] >> 4) & 0xf) << 7) | ||
488 | | (((mac_addr[0] >> 0) & 0xf) << 3) | ||
489 | | (((mac_addr[3] >> 4) & 0x1) << 31) | ||
490 | | (((mac_addr[3] >> 0) & 0xf) << 27) | ||
491 | | (((mac_addr[2] >> 4) & 0xf) << 23) | ||
492 | | (((mac_addr[2] >> 0) & 0xf) << 19) | ||
493 | | (skip << SKIP) | (rd << HASH_ENTRY_RECEIVE_DISCARD_BIT) | ||
494 | | HASH_ENTRY_VALID; | ||
495 | |||
496 | new_high = (((mac_addr[5] >> 4) & 0xf) << 15) | ||
497 | | (((mac_addr[5] >> 0) & 0xf) << 11) | ||
498 | | (((mac_addr[4] >> 4) & 0xf) << 7) | ||
499 | | (((mac_addr[4] >> 0) & 0xf) << 3) | ||
500 | | (((mac_addr[3] >> 5) & 0x7) << 0); | ||
501 | |||
502 | /* | ||
503 | * Pick the appropriate table, start scanning for free/reusable | ||
504 | * entries at the index obtained by hashing the specified MAC address | ||
505 | */ | ||
506 | start = (struct addr_table_entry *)(pep->htpr); | ||
507 | entry = start + hash_function(mac_addr); | ||
508 | for (i = 0; i < HOP_NUMBER; i++) { | ||
509 | if (!(le32_to_cpu(entry->lo) & HASH_ENTRY_VALID)) { | ||
510 | break; | ||
511 | } else { | ||
512 | /* if same address put in same position */ | ||
513 | if (((le32_to_cpu(entry->lo) & 0xfffffff8) == | ||
514 | (new_low & 0xfffffff8)) && | ||
515 | (le32_to_cpu(entry->hi) == new_high)) { | ||
516 | break; | ||
517 | } | ||
518 | } | ||
519 | if (entry == start + 0x7ff) | ||
520 | entry = start; | ||
521 | else | ||
522 | entry++; | ||
523 | } | ||
524 | |||
525 | if (((le32_to_cpu(entry->lo) & 0xfffffff8) != (new_low & 0xfffffff8)) && | ||
526 | (le32_to_cpu(entry->hi) != new_high) && del) | ||
527 | return 0; | ||
528 | |||
529 | if (i == HOP_NUMBER) { | ||
530 | if (!del) { | ||
531 | printk(KERN_INFO "%s: table section is full, need to " | ||
532 | "move to 16kB implementation?\n", | ||
533 | __FILE__); | ||
534 | return -ENOSPC; | ||
535 | } else | ||
536 | return 0; | ||
537 | } | ||
538 | |||
539 | /* | ||
540 | * Update the selected entry | ||
541 | */ | ||
542 | if (del) { | ||
543 | entry->hi = 0; | ||
544 | entry->lo = 0; | ||
545 | } else { | ||
546 | entry->hi = cpu_to_le32(new_high); | ||
547 | entry->lo = cpu_to_le32(new_low); | ||
548 | } | ||
549 | |||
550 | return 0; | ||
551 | } | ||
552 | |||
553 | /* | ||
554 | * ---------------------------------------------------------------------------- | ||
555 | * Create an addressTable entry from MAC address info | ||
556 | * found in the specifed net_device struct | ||
557 | * | ||
558 | * Input : pointer to ethernet interface network device structure | ||
559 | * Output : N/A | ||
560 | */ | ||
561 | static void update_hash_table_mac_address(struct pxa168_eth_private *pep, | ||
562 | unsigned char *oaddr, | ||
563 | unsigned char *addr) | ||
564 | { | ||
565 | /* Delete old entry */ | ||
566 | if (oaddr) | ||
567 | add_del_hash_entry(pep, oaddr, 1, 0, HASH_DELETE); | ||
568 | /* Add new entry */ | ||
569 | add_del_hash_entry(pep, addr, 1, 0, HASH_ADD); | ||
570 | } | ||
571 | |||
572 | static int init_hash_table(struct pxa168_eth_private *pep) | ||
573 | { | ||
574 | /* | ||
575 | * Hardware expects CPU to build a hash table based on a predefined | ||
576 | * hash function and populate it based on hardware address. The | ||
577 | * location of the hash table is identified by 32-bit pointer stored | ||
578 | * in HTPR internal register. Two possible sizes exists for the hash | ||
579 | * table 8kB (256kB of DRAM required (4 x 64 kB banks)) and 1/2kB | ||
580 | * (16kB of DRAM required (4 x 4 kB banks)).We currently only support | ||
581 | * 1/2kB. | ||
582 | */ | ||
583 | /* TODO: Add support for 8kB hash table and alternative hash | ||
584 | * function.Driver can dynamically switch to them if the 1/2kB hash | ||
585 | * table is full. | ||
586 | */ | ||
587 | if (pep->htpr == NULL) { | ||
588 | pep->htpr = dma_alloc_coherent(pep->dev->dev.parent, | ||
589 | HASH_ADDR_TABLE_SIZE, | ||
590 | &pep->htpr_dma, GFP_KERNEL); | ||
591 | if (pep->htpr == NULL) | ||
592 | return -ENOMEM; | ||
593 | } | ||
594 | memset(pep->htpr, 0, HASH_ADDR_TABLE_SIZE); | ||
595 | wrl(pep, HTPR, pep->htpr_dma); | ||
596 | return 0; | ||
597 | } | ||
598 | |||
599 | static void pxa168_eth_set_rx_mode(struct net_device *dev) | ||
600 | { | ||
601 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
602 | struct netdev_hw_addr *ha; | ||
603 | u32 val; | ||
604 | |||
605 | val = rdl(pep, PORT_CONFIG); | ||
606 | if (dev->flags & IFF_PROMISC) | ||
607 | val |= PCR_PM; | ||
608 | else | ||
609 | val &= ~PCR_PM; | ||
610 | wrl(pep, PORT_CONFIG, val); | ||
611 | |||
612 | /* | ||
613 | * Remove the old list of MAC address and add dev->addr | ||
614 | * and multicast address. | ||
615 | */ | ||
616 | memset(pep->htpr, 0, HASH_ADDR_TABLE_SIZE); | ||
617 | update_hash_table_mac_address(pep, NULL, dev->dev_addr); | ||
618 | |||
619 | netdev_for_each_mc_addr(ha, dev) | ||
620 | update_hash_table_mac_address(pep, NULL, ha->addr); | ||
621 | } | ||
622 | |||
623 | static int pxa168_eth_set_mac_address(struct net_device *dev, void *addr) | ||
624 | { | ||
625 | struct sockaddr *sa = addr; | ||
626 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
627 | unsigned char oldMac[ETH_ALEN]; | ||
628 | |||
629 | if (!is_valid_ether_addr(sa->sa_data)) | ||
630 | return -EINVAL; | ||
631 | memcpy(oldMac, dev->dev_addr, ETH_ALEN); | ||
632 | memcpy(dev->dev_addr, sa->sa_data, ETH_ALEN); | ||
633 | netif_addr_lock_bh(dev); | ||
634 | update_hash_table_mac_address(pep, oldMac, dev->dev_addr); | ||
635 | netif_addr_unlock_bh(dev); | ||
636 | return 0; | ||
637 | } | ||
638 | |||
639 | static void eth_port_start(struct net_device *dev) | ||
640 | { | ||
641 | unsigned int val = 0; | ||
642 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
643 | int tx_curr_desc, rx_curr_desc; | ||
644 | |||
645 | /* Perform PHY reset, if there is a PHY. */ | ||
646 | if (pep->phy != NULL) { | ||
647 | struct ethtool_cmd cmd; | ||
648 | |||
649 | pxa168_get_settings(pep->dev, &cmd); | ||
650 | ethernet_phy_reset(pep); | ||
651 | pxa168_set_settings(pep->dev, &cmd); | ||
652 | } | ||
653 | |||
654 | /* Assignment of Tx CTRP of given queue */ | ||
655 | tx_curr_desc = pep->tx_curr_desc_q; | ||
656 | wrl(pep, ETH_C_TX_DESC_1, | ||
657 | (u32) ((struct tx_desc *)pep->tx_desc_dma + tx_curr_desc)); | ||
658 | |||
659 | /* Assignment of Rx CRDP of given queue */ | ||
660 | rx_curr_desc = pep->rx_curr_desc_q; | ||
661 | wrl(pep, ETH_C_RX_DESC_0, | ||
662 | (u32) ((struct rx_desc *)pep->rx_desc_dma + rx_curr_desc)); | ||
663 | |||
664 | wrl(pep, ETH_F_RX_DESC_0, | ||
665 | (u32) ((struct rx_desc *)pep->rx_desc_dma + rx_curr_desc)); | ||
666 | |||
667 | /* Clear all interrupts */ | ||
668 | wrl(pep, INT_CAUSE, 0); | ||
669 | |||
670 | /* Enable all interrupts for receive, transmit and error. */ | ||
671 | wrl(pep, INT_MASK, ALL_INTS); | ||
672 | |||
673 | val = rdl(pep, PORT_CONFIG); | ||
674 | val |= PCR_EN; | ||
675 | wrl(pep, PORT_CONFIG, val); | ||
676 | |||
677 | /* Start RX DMA engine */ | ||
678 | val = rdl(pep, SDMA_CMD); | ||
679 | val |= SDMA_CMD_ERD; | ||
680 | wrl(pep, SDMA_CMD, val); | ||
681 | } | ||
682 | |||
683 | static void eth_port_reset(struct net_device *dev) | ||
684 | { | ||
685 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
686 | unsigned int val = 0; | ||
687 | |||
688 | /* Stop all interrupts for receive, transmit and error. */ | ||
689 | wrl(pep, INT_MASK, 0); | ||
690 | |||
691 | /* Clear all interrupts */ | ||
692 | wrl(pep, INT_CAUSE, 0); | ||
693 | |||
694 | /* Stop RX DMA */ | ||
695 | val = rdl(pep, SDMA_CMD); | ||
696 | val &= ~SDMA_CMD_ERD; /* abort dma command */ | ||
697 | |||
698 | /* Abort any transmit and receive operations and put DMA | ||
699 | * in idle state. | ||
700 | */ | ||
701 | abort_dma(pep); | ||
702 | |||
703 | /* Disable port */ | ||
704 | val = rdl(pep, PORT_CONFIG); | ||
705 | val &= ~PCR_EN; | ||
706 | wrl(pep, PORT_CONFIG, val); | ||
707 | } | ||
708 | |||
709 | /* | ||
710 | * txq_reclaim - Free the tx desc data for completed descriptors | ||
711 | * If force is non-zero, frees uncompleted descriptors as well | ||
712 | */ | ||
713 | static int txq_reclaim(struct net_device *dev, int force) | ||
714 | { | ||
715 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
716 | struct tx_desc *desc; | ||
717 | u32 cmd_sts; | ||
718 | struct sk_buff *skb; | ||
719 | int tx_index; | ||
720 | dma_addr_t addr; | ||
721 | int count; | ||
722 | int released = 0; | ||
723 | |||
724 | netif_tx_lock(dev); | ||
725 | |||
726 | pep->work_todo &= ~WORK_TX_DONE; | ||
727 | while (pep->tx_desc_count > 0) { | ||
728 | tx_index = pep->tx_used_desc_q; | ||
729 | desc = &pep->p_tx_desc_area[tx_index]; | ||
730 | cmd_sts = desc->cmd_sts; | ||
731 | if (!force && (cmd_sts & BUF_OWNED_BY_DMA)) { | ||
732 | if (released > 0) { | ||
733 | goto txq_reclaim_end; | ||
734 | } else { | ||
735 | released = -1; | ||
736 | goto txq_reclaim_end; | ||
737 | } | ||
738 | } | ||
739 | pep->tx_used_desc_q = (tx_index + 1) % pep->tx_ring_size; | ||
740 | pep->tx_desc_count--; | ||
741 | addr = desc->buf_ptr; | ||
742 | count = desc->byte_cnt; | ||
743 | skb = pep->tx_skb[tx_index]; | ||
744 | if (skb) | ||
745 | pep->tx_skb[tx_index] = NULL; | ||
746 | |||
747 | if (cmd_sts & TX_ERROR) { | ||
748 | if (net_ratelimit()) | ||
749 | printk(KERN_ERR "%s: Error in TX\n", dev->name); | ||
750 | dev->stats.tx_errors++; | ||
751 | } | ||
752 | dma_unmap_single(NULL, addr, count, DMA_TO_DEVICE); | ||
753 | if (skb) | ||
754 | dev_kfree_skb_irq(skb); | ||
755 | released++; | ||
756 | } | ||
757 | txq_reclaim_end: | ||
758 | netif_tx_unlock(dev); | ||
759 | return released; | ||
760 | } | ||
761 | |||
762 | static void pxa168_eth_tx_timeout(struct net_device *dev) | ||
763 | { | ||
764 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
765 | |||
766 | printk(KERN_INFO "%s: TX timeout desc_count %d\n", | ||
767 | dev->name, pep->tx_desc_count); | ||
768 | |||
769 | schedule_work(&pep->tx_timeout_task); | ||
770 | } | ||
771 | |||
772 | static void pxa168_eth_tx_timeout_task(struct work_struct *work) | ||
773 | { | ||
774 | struct pxa168_eth_private *pep = container_of(work, | ||
775 | struct pxa168_eth_private, | ||
776 | tx_timeout_task); | ||
777 | struct net_device *dev = pep->dev; | ||
778 | pxa168_eth_stop(dev); | ||
779 | pxa168_eth_open(dev); | ||
780 | } | ||
781 | |||
782 | static int rxq_process(struct net_device *dev, int budget) | ||
783 | { | ||
784 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
785 | struct net_device_stats *stats = &dev->stats; | ||
786 | unsigned int received_packets = 0; | ||
787 | struct sk_buff *skb; | ||
788 | |||
789 | while (budget-- > 0) { | ||
790 | int rx_next_curr_desc, rx_curr_desc, rx_used_desc; | ||
791 | struct rx_desc *rx_desc; | ||
792 | unsigned int cmd_sts; | ||
793 | |||
794 | /* Do not process Rx ring in case of Rx ring resource error */ | ||
795 | if (pep->rx_resource_err) | ||
796 | break; | ||
797 | rx_curr_desc = pep->rx_curr_desc_q; | ||
798 | rx_used_desc = pep->rx_used_desc_q; | ||
799 | rx_desc = &pep->p_rx_desc_area[rx_curr_desc]; | ||
800 | cmd_sts = rx_desc->cmd_sts; | ||
801 | rmb(); | ||
802 | if (cmd_sts & (BUF_OWNED_BY_DMA)) | ||
803 | break; | ||
804 | skb = pep->rx_skb[rx_curr_desc]; | ||
805 | pep->rx_skb[rx_curr_desc] = NULL; | ||
806 | |||
807 | rx_next_curr_desc = (rx_curr_desc + 1) % pep->rx_ring_size; | ||
808 | pep->rx_curr_desc_q = rx_next_curr_desc; | ||
809 | |||
810 | /* Rx descriptors exhausted. */ | ||
811 | /* Set the Rx ring resource error flag */ | ||
812 | if (rx_next_curr_desc == rx_used_desc) | ||
813 | pep->rx_resource_err = 1; | ||
814 | pep->rx_desc_count--; | ||
815 | dma_unmap_single(NULL, rx_desc->buf_ptr, | ||
816 | rx_desc->buf_size, | ||
817 | DMA_FROM_DEVICE); | ||
818 | received_packets++; | ||
819 | /* | ||
820 | * Update statistics. | ||
821 | * Note byte count includes 4 byte CRC count | ||
822 | */ | ||
823 | stats->rx_packets++; | ||
824 | stats->rx_bytes += rx_desc->byte_cnt; | ||
825 | /* | ||
826 | * In case received a packet without first / last bits on OR | ||
827 | * the error summary bit is on, the packets needs to be droped. | ||
828 | */ | ||
829 | if (((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) != | ||
830 | (RX_FIRST_DESC | RX_LAST_DESC)) | ||
831 | || (cmd_sts & RX_ERROR)) { | ||
832 | |||
833 | stats->rx_dropped++; | ||
834 | if ((cmd_sts & (RX_FIRST_DESC | RX_LAST_DESC)) != | ||
835 | (RX_FIRST_DESC | RX_LAST_DESC)) { | ||
836 | if (net_ratelimit()) | ||
837 | printk(KERN_ERR | ||
838 | "%s: Rx pkt on multiple desc\n", | ||
839 | dev->name); | ||
840 | } | ||
841 | if (cmd_sts & RX_ERROR) | ||
842 | stats->rx_errors++; | ||
843 | dev_kfree_skb_irq(skb); | ||
844 | } else { | ||
845 | /* | ||
846 | * The -4 is for the CRC in the trailer of the | ||
847 | * received packet | ||
848 | */ | ||
849 | skb_put(skb, rx_desc->byte_cnt - 4); | ||
850 | skb->protocol = eth_type_trans(skb, dev); | ||
851 | netif_receive_skb(skb); | ||
852 | } | ||
853 | dev->last_rx = jiffies; | ||
854 | } | ||
855 | /* Fill RX ring with skb's */ | ||
856 | rxq_refill(dev); | ||
857 | return received_packets; | ||
858 | } | ||
859 | |||
860 | static int pxa168_eth_collect_events(struct pxa168_eth_private *pep, | ||
861 | struct net_device *dev) | ||
862 | { | ||
863 | u32 icr; | ||
864 | int ret = 0; | ||
865 | |||
866 | icr = rdl(pep, INT_CAUSE); | ||
867 | if (icr == 0) | ||
868 | return IRQ_NONE; | ||
869 | |||
870 | wrl(pep, INT_CAUSE, ~icr); | ||
871 | if (icr & (ICR_TXBUF_H | ICR_TXBUF_L)) { | ||
872 | pep->work_todo |= WORK_TX_DONE; | ||
873 | ret = 1; | ||
874 | } | ||
875 | if (icr & ICR_RXBUF) | ||
876 | ret = 1; | ||
877 | if (icr & ICR_MII_CH) { | ||
878 | pep->work_todo |= WORK_LINK; | ||
879 | ret = 1; | ||
880 | } | ||
881 | return ret; | ||
882 | } | ||
883 | |||
884 | static void handle_link_event(struct pxa168_eth_private *pep) | ||
885 | { | ||
886 | struct net_device *dev = pep->dev; | ||
887 | u32 port_status; | ||
888 | int speed; | ||
889 | int duplex; | ||
890 | int fc; | ||
891 | |||
892 | port_status = rdl(pep, PORT_STATUS); | ||
893 | if (!(port_status & LINK_UP)) { | ||
894 | if (netif_carrier_ok(dev)) { | ||
895 | printk(KERN_INFO "%s: link down\n", dev->name); | ||
896 | netif_carrier_off(dev); | ||
897 | txq_reclaim(dev, 1); | ||
898 | } | ||
899 | return; | ||
900 | } | ||
901 | if (port_status & PORT_SPEED_100) | ||
902 | speed = 100; | ||
903 | else | ||
904 | speed = 10; | ||
905 | |||
906 | duplex = (port_status & FULL_DUPLEX) ? 1 : 0; | ||
907 | fc = (port_status & FLOW_CONTROL_ENABLED) ? 1 : 0; | ||
908 | printk(KERN_INFO "%s: link up, %d Mb/s, %s duplex, " | ||
909 | "flow control %sabled\n", dev->name, | ||
910 | speed, duplex ? "full" : "half", fc ? "en" : "dis"); | ||
911 | if (!netif_carrier_ok(dev)) | ||
912 | netif_carrier_on(dev); | ||
913 | } | ||
914 | |||
915 | static irqreturn_t pxa168_eth_int_handler(int irq, void *dev_id) | ||
916 | { | ||
917 | struct net_device *dev = (struct net_device *)dev_id; | ||
918 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
919 | |||
920 | if (unlikely(!pxa168_eth_collect_events(pep, dev))) | ||
921 | return IRQ_NONE; | ||
922 | /* Disable interrupts */ | ||
923 | wrl(pep, INT_MASK, 0); | ||
924 | napi_schedule(&pep->napi); | ||
925 | return IRQ_HANDLED; | ||
926 | } | ||
927 | |||
928 | static void pxa168_eth_recalc_skb_size(struct pxa168_eth_private *pep) | ||
929 | { | ||
930 | int skb_size; | ||
931 | |||
932 | /* | ||
933 | * Reserve 2+14 bytes for an ethernet header (the hardware | ||
934 | * automatically prepends 2 bytes of dummy data to each | ||
935 | * received packet), 16 bytes for up to four VLAN tags, and | ||
936 | * 4 bytes for the trailing FCS -- 36 bytes total. | ||
937 | */ | ||
938 | skb_size = pep->dev->mtu + 36; | ||
939 | |||
940 | /* | ||
941 | * Make sure that the skb size is a multiple of 8 bytes, as | ||
942 | * the lower three bits of the receive descriptor's buffer | ||
943 | * size field are ignored by the hardware. | ||
944 | */ | ||
945 | pep->skb_size = (skb_size + 7) & ~7; | ||
946 | |||
947 | /* | ||
948 | * If NET_SKB_PAD is smaller than a cache line, | ||
949 | * netdev_alloc_skb() will cause skb->data to be misaligned | ||
950 | * to a cache line boundary. If this is the case, include | ||
951 | * some extra space to allow re-aligning the data area. | ||
952 | */ | ||
953 | pep->skb_size += SKB_DMA_REALIGN; | ||
954 | |||
955 | } | ||
956 | |||
957 | static int set_port_config_ext(struct pxa168_eth_private *pep) | ||
958 | { | ||
959 | int skb_size; | ||
960 | |||
961 | pxa168_eth_recalc_skb_size(pep); | ||
962 | if (pep->skb_size <= 1518) | ||
963 | skb_size = PCXR_MFL_1518; | ||
964 | else if (pep->skb_size <= 1536) | ||
965 | skb_size = PCXR_MFL_1536; | ||
966 | else if (pep->skb_size <= 2048) | ||
967 | skb_size = PCXR_MFL_2048; | ||
968 | else | ||
969 | skb_size = PCXR_MFL_64K; | ||
970 | |||
971 | /* Extended Port Configuration */ | ||
972 | wrl(pep, | ||
973 | PORT_CONFIG_EXT, PCXR_2BSM | /* Two byte prefix aligns IP hdr */ | ||
974 | PCXR_DSCP_EN | /* Enable DSCP in IP */ | ||
975 | skb_size | PCXR_FLP | /* do not force link pass */ | ||
976 | PCXR_TX_HIGH_PRI); /* Transmit - high priority queue */ | ||
977 | |||
978 | return 0; | ||
979 | } | ||
980 | |||
981 | static int pxa168_init_hw(struct pxa168_eth_private *pep) | ||
982 | { | ||
983 | int err = 0; | ||
984 | |||
985 | /* Disable interrupts */ | ||
986 | wrl(pep, INT_MASK, 0); | ||
987 | wrl(pep, INT_CAUSE, 0); | ||
988 | /* Write to ICR to clear interrupts. */ | ||
989 | wrl(pep, INT_W_CLEAR, 0); | ||
990 | /* Abort any transmit and receive operations and put DMA | ||
991 | * in idle state. | ||
992 | */ | ||
993 | abort_dma(pep); | ||
994 | /* Initialize address hash table */ | ||
995 | err = init_hash_table(pep); | ||
996 | if (err) | ||
997 | return err; | ||
998 | /* SDMA configuration */ | ||
999 | wrl(pep, SDMA_CONFIG, SDCR_BSZ8 | /* Burst size = 32 bytes */ | ||
1000 | SDCR_RIFB | /* Rx interrupt on frame */ | ||
1001 | SDCR_BLMT | /* Little endian transmit */ | ||
1002 | SDCR_BLMR | /* Little endian receive */ | ||
1003 | SDCR_RC_MAX_RETRANS); /* Max retransmit count */ | ||
1004 | /* Port Configuration */ | ||
1005 | wrl(pep, PORT_CONFIG, PCR_HS); /* Hash size is 1/2kb */ | ||
1006 | set_port_config_ext(pep); | ||
1007 | |||
1008 | return err; | ||
1009 | } | ||
1010 | |||
1011 | static int rxq_init(struct net_device *dev) | ||
1012 | { | ||
1013 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1014 | struct rx_desc *p_rx_desc; | ||
1015 | int size = 0, i = 0; | ||
1016 | int rx_desc_num = pep->rx_ring_size; | ||
1017 | |||
1018 | /* Allocate RX skb rings */ | ||
1019 | pep->rx_skb = kmalloc(sizeof(*pep->rx_skb) * pep->rx_ring_size, | ||
1020 | GFP_KERNEL); | ||
1021 | if (!pep->rx_skb) { | ||
1022 | printk(KERN_ERR "%s: Cannot alloc RX skb ring\n", dev->name); | ||
1023 | return -ENOMEM; | ||
1024 | } | ||
1025 | /* Allocate RX ring */ | ||
1026 | pep->rx_desc_count = 0; | ||
1027 | size = pep->rx_ring_size * sizeof(struct rx_desc); | ||
1028 | pep->rx_desc_area_size = size; | ||
1029 | pep->p_rx_desc_area = dma_alloc_coherent(pep->dev->dev.parent, size, | ||
1030 | &pep->rx_desc_dma, GFP_KERNEL); | ||
1031 | if (!pep->p_rx_desc_area) { | ||
1032 | printk(KERN_ERR "%s: Cannot alloc RX ring (size %d bytes)\n", | ||
1033 | dev->name, size); | ||
1034 | goto out; | ||
1035 | } | ||
1036 | memset((void *)pep->p_rx_desc_area, 0, size); | ||
1037 | /* initialize the next_desc_ptr links in the Rx descriptors ring */ | ||
1038 | p_rx_desc = (struct rx_desc *)pep->p_rx_desc_area; | ||
1039 | for (i = 0; i < rx_desc_num; i++) { | ||
1040 | p_rx_desc[i].next_desc_ptr = pep->rx_desc_dma + | ||
1041 | ((i + 1) % rx_desc_num) * sizeof(struct rx_desc); | ||
1042 | } | ||
1043 | /* Save Rx desc pointer to driver struct. */ | ||
1044 | pep->rx_curr_desc_q = 0; | ||
1045 | pep->rx_used_desc_q = 0; | ||
1046 | pep->rx_desc_area_size = rx_desc_num * sizeof(struct rx_desc); | ||
1047 | return 0; | ||
1048 | out: | ||
1049 | kfree(pep->rx_skb); | ||
1050 | return -ENOMEM; | ||
1051 | } | ||
1052 | |||
1053 | static void rxq_deinit(struct net_device *dev) | ||
1054 | { | ||
1055 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1056 | int curr; | ||
1057 | |||
1058 | /* Free preallocated skb's on RX rings */ | ||
1059 | for (curr = 0; pep->rx_desc_count && curr < pep->rx_ring_size; curr++) { | ||
1060 | if (pep->rx_skb[curr]) { | ||
1061 | dev_kfree_skb(pep->rx_skb[curr]); | ||
1062 | pep->rx_desc_count--; | ||
1063 | } | ||
1064 | } | ||
1065 | if (pep->rx_desc_count) | ||
1066 | printk(KERN_ERR | ||
1067 | "Error in freeing Rx Ring. %d skb's still\n", | ||
1068 | pep->rx_desc_count); | ||
1069 | /* Free RX ring */ | ||
1070 | if (pep->p_rx_desc_area) | ||
1071 | dma_free_coherent(pep->dev->dev.parent, pep->rx_desc_area_size, | ||
1072 | pep->p_rx_desc_area, pep->rx_desc_dma); | ||
1073 | kfree(pep->rx_skb); | ||
1074 | } | ||
1075 | |||
1076 | static int txq_init(struct net_device *dev) | ||
1077 | { | ||
1078 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1079 | struct tx_desc *p_tx_desc; | ||
1080 | int size = 0, i = 0; | ||
1081 | int tx_desc_num = pep->tx_ring_size; | ||
1082 | |||
1083 | pep->tx_skb = kmalloc(sizeof(*pep->tx_skb) * pep->tx_ring_size, | ||
1084 | GFP_KERNEL); | ||
1085 | if (!pep->tx_skb) { | ||
1086 | printk(KERN_ERR "%s: Cannot alloc TX skb ring\n", dev->name); | ||
1087 | return -ENOMEM; | ||
1088 | } | ||
1089 | /* Allocate TX ring */ | ||
1090 | pep->tx_desc_count = 0; | ||
1091 | size = pep->tx_ring_size * sizeof(struct tx_desc); | ||
1092 | pep->tx_desc_area_size = size; | ||
1093 | pep->p_tx_desc_area = dma_alloc_coherent(pep->dev->dev.parent, size, | ||
1094 | &pep->tx_desc_dma, GFP_KERNEL); | ||
1095 | if (!pep->p_tx_desc_area) { | ||
1096 | printk(KERN_ERR "%s: Cannot allocate Tx Ring (size %d bytes)\n", | ||
1097 | dev->name, size); | ||
1098 | goto out; | ||
1099 | } | ||
1100 | memset((void *)pep->p_tx_desc_area, 0, pep->tx_desc_area_size); | ||
1101 | /* Initialize the next_desc_ptr links in the Tx descriptors ring */ | ||
1102 | p_tx_desc = (struct tx_desc *)pep->p_tx_desc_area; | ||
1103 | for (i = 0; i < tx_desc_num; i++) { | ||
1104 | p_tx_desc[i].next_desc_ptr = pep->tx_desc_dma + | ||
1105 | ((i + 1) % tx_desc_num) * sizeof(struct tx_desc); | ||
1106 | } | ||
1107 | pep->tx_curr_desc_q = 0; | ||
1108 | pep->tx_used_desc_q = 0; | ||
1109 | pep->tx_desc_area_size = tx_desc_num * sizeof(struct tx_desc); | ||
1110 | return 0; | ||
1111 | out: | ||
1112 | kfree(pep->tx_skb); | ||
1113 | return -ENOMEM; | ||
1114 | } | ||
1115 | |||
1116 | static void txq_deinit(struct net_device *dev) | ||
1117 | { | ||
1118 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1119 | |||
1120 | /* Free outstanding skb's on TX ring */ | ||
1121 | txq_reclaim(dev, 1); | ||
1122 | BUG_ON(pep->tx_used_desc_q != pep->tx_curr_desc_q); | ||
1123 | /* Free TX ring */ | ||
1124 | if (pep->p_tx_desc_area) | ||
1125 | dma_free_coherent(pep->dev->dev.parent, pep->tx_desc_area_size, | ||
1126 | pep->p_tx_desc_area, pep->tx_desc_dma); | ||
1127 | kfree(pep->tx_skb); | ||
1128 | } | ||
1129 | |||
1130 | static int pxa168_eth_open(struct net_device *dev) | ||
1131 | { | ||
1132 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1133 | int err; | ||
1134 | |||
1135 | err = request_irq(dev->irq, pxa168_eth_int_handler, | ||
1136 | IRQF_DISABLED, dev->name, dev); | ||
1137 | if (err) { | ||
1138 | dev_printk(KERN_ERR, &dev->dev, "can't assign irq\n"); | ||
1139 | return -EAGAIN; | ||
1140 | } | ||
1141 | pep->rx_resource_err = 0; | ||
1142 | err = rxq_init(dev); | ||
1143 | if (err != 0) | ||
1144 | goto out_free_irq; | ||
1145 | err = txq_init(dev); | ||
1146 | if (err != 0) | ||
1147 | goto out_free_rx_skb; | ||
1148 | pep->rx_used_desc_q = 0; | ||
1149 | pep->rx_curr_desc_q = 0; | ||
1150 | |||
1151 | /* Fill RX ring with skb's */ | ||
1152 | rxq_refill(dev); | ||
1153 | pep->rx_used_desc_q = 0; | ||
1154 | pep->rx_curr_desc_q = 0; | ||
1155 | netif_carrier_off(dev); | ||
1156 | eth_port_start(dev); | ||
1157 | napi_enable(&pep->napi); | ||
1158 | return 0; | ||
1159 | out_free_rx_skb: | ||
1160 | rxq_deinit(dev); | ||
1161 | out_free_irq: | ||
1162 | free_irq(dev->irq, dev); | ||
1163 | return err; | ||
1164 | } | ||
1165 | |||
1166 | static int pxa168_eth_stop(struct net_device *dev) | ||
1167 | { | ||
1168 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1169 | eth_port_reset(dev); | ||
1170 | |||
1171 | /* Disable interrupts */ | ||
1172 | wrl(pep, INT_MASK, 0); | ||
1173 | wrl(pep, INT_CAUSE, 0); | ||
1174 | /* Write to ICR to clear interrupts. */ | ||
1175 | wrl(pep, INT_W_CLEAR, 0); | ||
1176 | napi_disable(&pep->napi); | ||
1177 | del_timer_sync(&pep->timeout); | ||
1178 | netif_carrier_off(dev); | ||
1179 | free_irq(dev->irq, dev); | ||
1180 | rxq_deinit(dev); | ||
1181 | txq_deinit(dev); | ||
1182 | |||
1183 | return 0; | ||
1184 | } | ||
1185 | |||
1186 | static int pxa168_eth_change_mtu(struct net_device *dev, int mtu) | ||
1187 | { | ||
1188 | int retval; | ||
1189 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1190 | |||
1191 | if ((mtu > 9500) || (mtu < 68)) | ||
1192 | return -EINVAL; | ||
1193 | |||
1194 | dev->mtu = mtu; | ||
1195 | retval = set_port_config_ext(pep); | ||
1196 | |||
1197 | if (!netif_running(dev)) | ||
1198 | return 0; | ||
1199 | |||
1200 | /* | ||
1201 | * Stop and then re-open the interface. This will allocate RX | ||
1202 | * skbs of the new MTU. | ||
1203 | * There is a possible danger that the open will not succeed, | ||
1204 | * due to memory being full. | ||
1205 | */ | ||
1206 | pxa168_eth_stop(dev); | ||
1207 | if (pxa168_eth_open(dev)) { | ||
1208 | dev_printk(KERN_ERR, &dev->dev, | ||
1209 | "fatal error on re-opening device after " | ||
1210 | "MTU change\n"); | ||
1211 | } | ||
1212 | |||
1213 | return 0; | ||
1214 | } | ||
1215 | |||
1216 | static int eth_alloc_tx_desc_index(struct pxa168_eth_private *pep) | ||
1217 | { | ||
1218 | int tx_desc_curr; | ||
1219 | |||
1220 | tx_desc_curr = pep->tx_curr_desc_q; | ||
1221 | pep->tx_curr_desc_q = (tx_desc_curr + 1) % pep->tx_ring_size; | ||
1222 | BUG_ON(pep->tx_curr_desc_q == pep->tx_used_desc_q); | ||
1223 | pep->tx_desc_count++; | ||
1224 | |||
1225 | return tx_desc_curr; | ||
1226 | } | ||
1227 | |||
1228 | static int pxa168_rx_poll(struct napi_struct *napi, int budget) | ||
1229 | { | ||
1230 | struct pxa168_eth_private *pep = | ||
1231 | container_of(napi, struct pxa168_eth_private, napi); | ||
1232 | struct net_device *dev = pep->dev; | ||
1233 | int work_done = 0; | ||
1234 | |||
1235 | if (unlikely(pep->work_todo & WORK_LINK)) { | ||
1236 | pep->work_todo &= ~(WORK_LINK); | ||
1237 | handle_link_event(pep); | ||
1238 | } | ||
1239 | /* | ||
1240 | * We call txq_reclaim every time since in NAPI interupts are disabled | ||
1241 | * and due to this we miss the TX_DONE interrupt,which is not updated in | ||
1242 | * interrupt status register. | ||
1243 | */ | ||
1244 | txq_reclaim(dev, 0); | ||
1245 | if (netif_queue_stopped(dev) | ||
1246 | && pep->tx_ring_size - pep->tx_desc_count > 1) { | ||
1247 | netif_wake_queue(dev); | ||
1248 | } | ||
1249 | work_done = rxq_process(dev, budget); | ||
1250 | if (work_done < budget) { | ||
1251 | napi_complete(napi); | ||
1252 | wrl(pep, INT_MASK, ALL_INTS); | ||
1253 | } | ||
1254 | |||
1255 | return work_done; | ||
1256 | } | ||
1257 | |||
1258 | static int pxa168_eth_start_xmit(struct sk_buff *skb, struct net_device *dev) | ||
1259 | { | ||
1260 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1261 | struct net_device_stats *stats = &dev->stats; | ||
1262 | struct tx_desc *desc; | ||
1263 | int tx_index; | ||
1264 | int length; | ||
1265 | |||
1266 | tx_index = eth_alloc_tx_desc_index(pep); | ||
1267 | desc = &pep->p_tx_desc_area[tx_index]; | ||
1268 | length = skb->len; | ||
1269 | pep->tx_skb[tx_index] = skb; | ||
1270 | desc->byte_cnt = length; | ||
1271 | desc->buf_ptr = dma_map_single(NULL, skb->data, length, DMA_TO_DEVICE); | ||
1272 | wmb(); | ||
1273 | desc->cmd_sts = BUF_OWNED_BY_DMA | TX_GEN_CRC | TX_FIRST_DESC | | ||
1274 | TX_ZERO_PADDING | TX_LAST_DESC | TX_EN_INT; | ||
1275 | wmb(); | ||
1276 | wrl(pep, SDMA_CMD, SDMA_CMD_TXDH | SDMA_CMD_ERD); | ||
1277 | |||
1278 | stats->tx_bytes += skb->len; | ||
1279 | stats->tx_packets++; | ||
1280 | dev->trans_start = jiffies; | ||
1281 | if (pep->tx_ring_size - pep->tx_desc_count <= 1) { | ||
1282 | /* We handled the current skb, but now we are out of space.*/ | ||
1283 | netif_stop_queue(dev); | ||
1284 | } | ||
1285 | |||
1286 | return NETDEV_TX_OK; | ||
1287 | } | ||
1288 | |||
1289 | static int smi_wait_ready(struct pxa168_eth_private *pep) | ||
1290 | { | ||
1291 | int i = 0; | ||
1292 | |||
1293 | /* wait for the SMI register to become available */ | ||
1294 | for (i = 0; rdl(pep, SMI) & SMI_BUSY; i++) { | ||
1295 | if (i == PHY_WAIT_ITERATIONS) | ||
1296 | return -ETIMEDOUT; | ||
1297 | msleep(10); | ||
1298 | } | ||
1299 | |||
1300 | return 0; | ||
1301 | } | ||
1302 | |||
1303 | static int pxa168_smi_read(struct mii_bus *bus, int phy_addr, int regnum) | ||
1304 | { | ||
1305 | struct pxa168_eth_private *pep = bus->priv; | ||
1306 | int i = 0; | ||
1307 | int val; | ||
1308 | |||
1309 | if (smi_wait_ready(pep)) { | ||
1310 | printk(KERN_WARNING "pxa168_eth: SMI bus busy timeout\n"); | ||
1311 | return -ETIMEDOUT; | ||
1312 | } | ||
1313 | wrl(pep, SMI, (phy_addr << 16) | (regnum << 21) | SMI_OP_R); | ||
1314 | /* now wait for the data to be valid */ | ||
1315 | for (i = 0; !((val = rdl(pep, SMI)) & SMI_R_VALID); i++) { | ||
1316 | if (i == PHY_WAIT_ITERATIONS) { | ||
1317 | printk(KERN_WARNING | ||
1318 | "pxa168_eth: SMI bus read not valid\n"); | ||
1319 | return -ENODEV; | ||
1320 | } | ||
1321 | msleep(10); | ||
1322 | } | ||
1323 | |||
1324 | return val & 0xffff; | ||
1325 | } | ||
1326 | |||
1327 | static int pxa168_smi_write(struct mii_bus *bus, int phy_addr, int regnum, | ||
1328 | u16 value) | ||
1329 | { | ||
1330 | struct pxa168_eth_private *pep = bus->priv; | ||
1331 | |||
1332 | if (smi_wait_ready(pep)) { | ||
1333 | printk(KERN_WARNING "pxa168_eth: SMI bus busy timeout\n"); | ||
1334 | return -ETIMEDOUT; | ||
1335 | } | ||
1336 | |||
1337 | wrl(pep, SMI, (phy_addr << 16) | (regnum << 21) | | ||
1338 | SMI_OP_W | (value & 0xffff)); | ||
1339 | |||
1340 | if (smi_wait_ready(pep)) { | ||
1341 | printk(KERN_ERR "pxa168_eth: SMI bus busy timeout\n"); | ||
1342 | return -ETIMEDOUT; | ||
1343 | } | ||
1344 | |||
1345 | return 0; | ||
1346 | } | ||
1347 | |||
1348 | static int pxa168_eth_do_ioctl(struct net_device *dev, struct ifreq *ifr, | ||
1349 | int cmd) | ||
1350 | { | ||
1351 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1352 | if (pep->phy != NULL) | ||
1353 | return phy_mii_ioctl(pep->phy, if_mii(ifr), cmd); | ||
1354 | |||
1355 | return -EOPNOTSUPP; | ||
1356 | } | ||
1357 | |||
1358 | static struct phy_device *phy_scan(struct pxa168_eth_private *pep, int phy_addr) | ||
1359 | { | ||
1360 | struct mii_bus *bus = pep->smi_bus; | ||
1361 | struct phy_device *phydev; | ||
1362 | int start; | ||
1363 | int num; | ||
1364 | int i; | ||
1365 | |||
1366 | if (phy_addr == PXA168_ETH_PHY_ADDR_DEFAULT) { | ||
1367 | /* Scan entire range */ | ||
1368 | start = ethernet_phy_get(pep); | ||
1369 | num = 32; | ||
1370 | } else { | ||
1371 | /* Use phy addr specific to platform */ | ||
1372 | start = phy_addr & 0x1f; | ||
1373 | num = 1; | ||
1374 | } | ||
1375 | phydev = NULL; | ||
1376 | for (i = 0; i < num; i++) { | ||
1377 | int addr = (start + i) & 0x1f; | ||
1378 | if (bus->phy_map[addr] == NULL) | ||
1379 | mdiobus_scan(bus, addr); | ||
1380 | |||
1381 | if (phydev == NULL) { | ||
1382 | phydev = bus->phy_map[addr]; | ||
1383 | if (phydev != NULL) | ||
1384 | ethernet_phy_set_addr(pep, addr); | ||
1385 | } | ||
1386 | } | ||
1387 | |||
1388 | return phydev; | ||
1389 | } | ||
1390 | |||
1391 | static void phy_init(struct pxa168_eth_private *pep, int speed, int duplex) | ||
1392 | { | ||
1393 | struct phy_device *phy = pep->phy; | ||
1394 | ethernet_phy_reset(pep); | ||
1395 | |||
1396 | phy_attach(pep->dev, dev_name(&phy->dev), 0, PHY_INTERFACE_MODE_MII); | ||
1397 | |||
1398 | if (speed == 0) { | ||
1399 | phy->autoneg = AUTONEG_ENABLE; | ||
1400 | phy->speed = 0; | ||
1401 | phy->duplex = 0; | ||
1402 | phy->supported &= PHY_BASIC_FEATURES; | ||
1403 | phy->advertising = phy->supported | ADVERTISED_Autoneg; | ||
1404 | } else { | ||
1405 | phy->autoneg = AUTONEG_DISABLE; | ||
1406 | phy->advertising = 0; | ||
1407 | phy->speed = speed; | ||
1408 | phy->duplex = duplex; | ||
1409 | } | ||
1410 | phy_start_aneg(phy); | ||
1411 | } | ||
1412 | |||
1413 | static int ethernet_phy_setup(struct net_device *dev) | ||
1414 | { | ||
1415 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1416 | |||
1417 | if (pep->pd != NULL) { | ||
1418 | if (pep->pd->init) | ||
1419 | pep->pd->init(); | ||
1420 | } | ||
1421 | pep->phy = phy_scan(pep, pep->pd->phy_addr & 0x1f); | ||
1422 | if (pep->phy != NULL) | ||
1423 | phy_init(pep, pep->pd->speed, pep->pd->duplex); | ||
1424 | update_hash_table_mac_address(pep, NULL, dev->dev_addr); | ||
1425 | |||
1426 | return 0; | ||
1427 | } | ||
1428 | |||
1429 | static int pxa168_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | ||
1430 | { | ||
1431 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1432 | int err; | ||
1433 | |||
1434 | err = phy_read_status(pep->phy); | ||
1435 | if (err == 0) | ||
1436 | err = phy_ethtool_gset(pep->phy, cmd); | ||
1437 | |||
1438 | return err; | ||
1439 | } | ||
1440 | |||
1441 | static int pxa168_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | ||
1442 | { | ||
1443 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1444 | |||
1445 | return phy_ethtool_sset(pep->phy, cmd); | ||
1446 | } | ||
1447 | |||
1448 | static void pxa168_get_drvinfo(struct net_device *dev, | ||
1449 | struct ethtool_drvinfo *info) | ||
1450 | { | ||
1451 | strncpy(info->driver, DRIVER_NAME, 32); | ||
1452 | strncpy(info->version, DRIVER_VERSION, 32); | ||
1453 | strncpy(info->fw_version, "N/A", 32); | ||
1454 | strncpy(info->bus_info, "N/A", 32); | ||
1455 | } | ||
1456 | |||
1457 | static u32 pxa168_get_link(struct net_device *dev) | ||
1458 | { | ||
1459 | return !!netif_carrier_ok(dev); | ||
1460 | } | ||
1461 | |||
1462 | static const struct ethtool_ops pxa168_ethtool_ops = { | ||
1463 | .get_settings = pxa168_get_settings, | ||
1464 | .set_settings = pxa168_set_settings, | ||
1465 | .get_drvinfo = pxa168_get_drvinfo, | ||
1466 | .get_link = pxa168_get_link, | ||
1467 | }; | ||
1468 | |||
1469 | static const struct net_device_ops pxa168_eth_netdev_ops = { | ||
1470 | .ndo_open = pxa168_eth_open, | ||
1471 | .ndo_stop = pxa168_eth_stop, | ||
1472 | .ndo_start_xmit = pxa168_eth_start_xmit, | ||
1473 | .ndo_set_rx_mode = pxa168_eth_set_rx_mode, | ||
1474 | .ndo_set_mac_address = pxa168_eth_set_mac_address, | ||
1475 | .ndo_validate_addr = eth_validate_addr, | ||
1476 | .ndo_do_ioctl = pxa168_eth_do_ioctl, | ||
1477 | .ndo_change_mtu = pxa168_eth_change_mtu, | ||
1478 | .ndo_tx_timeout = pxa168_eth_tx_timeout, | ||
1479 | }; | ||
1480 | |||
1481 | static int pxa168_eth_probe(struct platform_device *pdev) | ||
1482 | { | ||
1483 | struct pxa168_eth_private *pep = NULL; | ||
1484 | struct net_device *dev = NULL; | ||
1485 | struct resource *res; | ||
1486 | struct clk *clk; | ||
1487 | int err; | ||
1488 | |||
1489 | printk(KERN_NOTICE "PXA168 10/100 Ethernet Driver\n"); | ||
1490 | |||
1491 | clk = clk_get(&pdev->dev, "MFUCLK"); | ||
1492 | if (IS_ERR(clk)) { | ||
1493 | printk(KERN_ERR "%s: Fast Ethernet failed to get clock\n", | ||
1494 | DRIVER_NAME); | ||
1495 | return -ENODEV; | ||
1496 | } | ||
1497 | clk_enable(clk); | ||
1498 | |||
1499 | dev = alloc_etherdev(sizeof(struct pxa168_eth_private)); | ||
1500 | if (!dev) { | ||
1501 | err = -ENOMEM; | ||
1502 | goto out; | ||
1503 | } | ||
1504 | |||
1505 | platform_set_drvdata(pdev, dev); | ||
1506 | pep = netdev_priv(dev); | ||
1507 | pep->dev = dev; | ||
1508 | pep->clk = clk; | ||
1509 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1510 | if (res == NULL) { | ||
1511 | err = -ENODEV; | ||
1512 | goto out; | ||
1513 | } | ||
1514 | pep->base = ioremap(res->start, res->end - res->start + 1); | ||
1515 | if (pep->base == NULL) { | ||
1516 | err = -ENOMEM; | ||
1517 | goto out; | ||
1518 | } | ||
1519 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
1520 | BUG_ON(!res); | ||
1521 | dev->irq = res->start; | ||
1522 | dev->netdev_ops = &pxa168_eth_netdev_ops; | ||
1523 | dev->watchdog_timeo = 2 * HZ; | ||
1524 | dev->base_addr = 0; | ||
1525 | SET_ETHTOOL_OPS(dev, &pxa168_ethtool_ops); | ||
1526 | |||
1527 | INIT_WORK(&pep->tx_timeout_task, pxa168_eth_tx_timeout_task); | ||
1528 | |||
1529 | printk(KERN_INFO "%s:Using random mac address\n", DRIVER_NAME); | ||
1530 | random_ether_addr(dev->dev_addr); | ||
1531 | |||
1532 | pep->pd = pdev->dev.platform_data; | ||
1533 | pep->rx_ring_size = NUM_RX_DESCS; | ||
1534 | if (pep->pd->rx_queue_size) | ||
1535 | pep->rx_ring_size = pep->pd->rx_queue_size; | ||
1536 | |||
1537 | pep->tx_ring_size = NUM_TX_DESCS; | ||
1538 | if (pep->pd->tx_queue_size) | ||
1539 | pep->tx_ring_size = pep->pd->tx_queue_size; | ||
1540 | |||
1541 | pep->port_num = pep->pd->port_number; | ||
1542 | /* Hardware supports only 3 ports */ | ||
1543 | BUG_ON(pep->port_num > 2); | ||
1544 | netif_napi_add(dev, &pep->napi, pxa168_rx_poll, pep->rx_ring_size); | ||
1545 | |||
1546 | memset(&pep->timeout, 0, sizeof(struct timer_list)); | ||
1547 | init_timer(&pep->timeout); | ||
1548 | pep->timeout.function = rxq_refill_timer_wrapper; | ||
1549 | pep->timeout.data = (unsigned long)pep; | ||
1550 | |||
1551 | pep->smi_bus = mdiobus_alloc(); | ||
1552 | if (pep->smi_bus == NULL) { | ||
1553 | err = -ENOMEM; | ||
1554 | goto out; | ||
1555 | } | ||
1556 | pep->smi_bus->priv = pep; | ||
1557 | pep->smi_bus->name = "pxa168_eth smi"; | ||
1558 | pep->smi_bus->read = pxa168_smi_read; | ||
1559 | pep->smi_bus->write = pxa168_smi_write; | ||
1560 | snprintf(pep->smi_bus->id, MII_BUS_ID_SIZE, "%d", pdev->id); | ||
1561 | pep->smi_bus->parent = &pdev->dev; | ||
1562 | pep->smi_bus->phy_mask = 0xffffffff; | ||
1563 | if (mdiobus_register(pep->smi_bus) < 0) { | ||
1564 | err = -ENOMEM; | ||
1565 | goto out; | ||
1566 | } | ||
1567 | pxa168_init_hw(pep); | ||
1568 | err = ethernet_phy_setup(dev); | ||
1569 | if (err) | ||
1570 | goto out; | ||
1571 | SET_NETDEV_DEV(dev, &pdev->dev); | ||
1572 | err = register_netdev(dev); | ||
1573 | if (err) | ||
1574 | goto out; | ||
1575 | return 0; | ||
1576 | out: | ||
1577 | if (pep->clk) { | ||
1578 | clk_disable(pep->clk); | ||
1579 | clk_put(pep->clk); | ||
1580 | pep->clk = NULL; | ||
1581 | } | ||
1582 | if (pep->base) { | ||
1583 | iounmap(pep->base); | ||
1584 | pep->base = NULL; | ||
1585 | } | ||
1586 | if (dev) | ||
1587 | free_netdev(dev); | ||
1588 | return err; | ||
1589 | } | ||
1590 | |||
1591 | static int pxa168_eth_remove(struct platform_device *pdev) | ||
1592 | { | ||
1593 | struct net_device *dev = platform_get_drvdata(pdev); | ||
1594 | struct pxa168_eth_private *pep = netdev_priv(dev); | ||
1595 | |||
1596 | if (pep->htpr) { | ||
1597 | dma_free_coherent(pep->dev->dev.parent, HASH_ADDR_TABLE_SIZE, | ||
1598 | pep->htpr, pep->htpr_dma); | ||
1599 | pep->htpr = NULL; | ||
1600 | } | ||
1601 | if (pep->clk) { | ||
1602 | clk_disable(pep->clk); | ||
1603 | clk_put(pep->clk); | ||
1604 | pep->clk = NULL; | ||
1605 | } | ||
1606 | if (pep->phy != NULL) | ||
1607 | phy_detach(pep->phy); | ||
1608 | |||
1609 | iounmap(pep->base); | ||
1610 | pep->base = NULL; | ||
1611 | unregister_netdev(dev); | ||
1612 | flush_scheduled_work(); | ||
1613 | free_netdev(dev); | ||
1614 | platform_set_drvdata(pdev, NULL); | ||
1615 | return 0; | ||
1616 | } | ||
1617 | |||
1618 | static void pxa168_eth_shutdown(struct platform_device *pdev) | ||
1619 | { | ||
1620 | struct net_device *dev = platform_get_drvdata(pdev); | ||
1621 | eth_port_reset(dev); | ||
1622 | } | ||
1623 | |||
1624 | #ifdef CONFIG_PM | ||
1625 | static int pxa168_eth_resume(struct platform_device *pdev) | ||
1626 | { | ||
1627 | return -ENOSYS; | ||
1628 | } | ||
1629 | |||
1630 | static int pxa168_eth_suspend(struct platform_device *pdev, pm_message_t state) | ||
1631 | { | ||
1632 | return -ENOSYS; | ||
1633 | } | ||
1634 | |||
1635 | #else | ||
1636 | #define pxa168_eth_resume NULL | ||
1637 | #define pxa168_eth_suspend NULL | ||
1638 | #endif | ||
1639 | |||
1640 | static struct platform_driver pxa168_eth_driver = { | ||
1641 | .probe = pxa168_eth_probe, | ||
1642 | .remove = pxa168_eth_remove, | ||
1643 | .shutdown = pxa168_eth_shutdown, | ||
1644 | .resume = pxa168_eth_resume, | ||
1645 | .suspend = pxa168_eth_suspend, | ||
1646 | .driver = { | ||
1647 | .name = DRIVER_NAME, | ||
1648 | }, | ||
1649 | }; | ||
1650 | |||
1651 | static int __init pxa168_init_module(void) | ||
1652 | { | ||
1653 | return platform_driver_register(&pxa168_eth_driver); | ||
1654 | } | ||
1655 | |||
1656 | static void __exit pxa168_cleanup_module(void) | ||
1657 | { | ||
1658 | platform_driver_unregister(&pxa168_eth_driver); | ||
1659 | } | ||
1660 | |||
1661 | module_init(pxa168_init_module); | ||
1662 | module_exit(pxa168_cleanup_module); | ||
1663 | |||
1664 | MODULE_LICENSE("GPL"); | ||
1665 | MODULE_DESCRIPTION("Ethernet driver for Marvell PXA168"); | ||
1666 | MODULE_ALIAS("platform:pxa168_eth"); | ||
diff --git a/drivers/net/qlcnic/qlcnic_main.c b/drivers/net/qlcnic/qlcnic_main.c index bf6d87adda4f..213e3656d953 100644 --- a/drivers/net/qlcnic/qlcnic_main.c +++ b/drivers/net/qlcnic/qlcnic_main.c | |||
@@ -1983,8 +1983,6 @@ static struct net_device_stats *qlcnic_get_stats(struct net_device *netdev) | |||
1983 | struct qlcnic_adapter *adapter = netdev_priv(netdev); | 1983 | struct qlcnic_adapter *adapter = netdev_priv(netdev); |
1984 | struct net_device_stats *stats = &netdev->stats; | 1984 | struct net_device_stats *stats = &netdev->stats; |
1985 | 1985 | ||
1986 | memset(stats, 0, sizeof(*stats)); | ||
1987 | |||
1988 | stats->rx_packets = adapter->stats.rx_pkts + adapter->stats.lro_pkts; | 1986 | stats->rx_packets = adapter->stats.rx_pkts + adapter->stats.lro_pkts; |
1989 | stats->tx_packets = adapter->stats.xmitfinished; | 1987 | stats->tx_packets = adapter->stats.xmitfinished; |
1990 | stats->rx_bytes = adapter->stats.rxbytes + adapter->stats.lrobytes; | 1988 | stats->rx_bytes = adapter->stats.rxbytes + adapter->stats.lrobytes; |
diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index f5a9eb1df593..79fd02bc69fd 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c | |||
@@ -1437,7 +1437,7 @@ static const struct net_device_ops sh_eth_netdev_ops = { | |||
1437 | 1437 | ||
1438 | static int sh_eth_drv_probe(struct platform_device *pdev) | 1438 | static int sh_eth_drv_probe(struct platform_device *pdev) |
1439 | { | 1439 | { |
1440 | int ret, i, devno = 0; | 1440 | int ret, devno = 0; |
1441 | struct resource *res; | 1441 | struct resource *res; |
1442 | struct net_device *ndev = NULL; | 1442 | struct net_device *ndev = NULL; |
1443 | struct sh_eth_private *mdp; | 1443 | struct sh_eth_private *mdp; |
diff --git a/drivers/net/usb/ipheth.c b/drivers/net/usb/ipheth.c index 08e7b6abacdd..8ed30fa35d0a 100644 --- a/drivers/net/usb/ipheth.c +++ b/drivers/net/usb/ipheth.c | |||
@@ -58,6 +58,7 @@ | |||
58 | #define USB_PRODUCT_IPHONE 0x1290 | 58 | #define USB_PRODUCT_IPHONE 0x1290 |
59 | #define USB_PRODUCT_IPHONE_3G 0x1292 | 59 | #define USB_PRODUCT_IPHONE_3G 0x1292 |
60 | #define USB_PRODUCT_IPHONE_3GS 0x1294 | 60 | #define USB_PRODUCT_IPHONE_3GS 0x1294 |
61 | #define USB_PRODUCT_IPHONE_4 0x1297 | ||
61 | 62 | ||
62 | #define IPHETH_USBINTF_CLASS 255 | 63 | #define IPHETH_USBINTF_CLASS 255 |
63 | #define IPHETH_USBINTF_SUBCLASS 253 | 64 | #define IPHETH_USBINTF_SUBCLASS 253 |
@@ -92,6 +93,10 @@ static struct usb_device_id ipheth_table[] = { | |||
92 | USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_3GS, | 93 | USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_3GS, |
93 | IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, | 94 | IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, |
94 | IPHETH_USBINTF_PROTO) }, | 95 | IPHETH_USBINTF_PROTO) }, |
96 | { USB_DEVICE_AND_INTERFACE_INFO( | ||
97 | USB_VENDOR_APPLE, USB_PRODUCT_IPHONE_4, | ||
98 | IPHETH_USBINTF_CLASS, IPHETH_USBINTF_SUBCLASS, | ||
99 | IPHETH_USBINTF_PROTO) }, | ||
95 | { } | 100 | { } |
96 | }; | 101 | }; |
97 | MODULE_DEVICE_TABLE(usb, ipheth_table); | 102 | MODULE_DEVICE_TABLE(usb, ipheth_table); |
diff --git a/drivers/net/wireless/adm8211.c b/drivers/net/wireless/adm8211.c index a105087af963..f9aa1bc0a947 100644 --- a/drivers/net/wireless/adm8211.c +++ b/drivers/net/wireless/adm8211.c | |||
@@ -732,7 +732,7 @@ static int adm8211_rf_set_channel(struct ieee80211_hw *dev, unsigned int chan) | |||
732 | 732 | ||
733 | /* Nothing to do for ADMtek BBP */ | 733 | /* Nothing to do for ADMtek BBP */ |
734 | } else if (priv->bbp_type != ADM8211_TYPE_ADMTEK) | 734 | } else if (priv->bbp_type != ADM8211_TYPE_ADMTEK) |
735 | wiphy_debug(dev->wiphy, "unsupported bbp type %d\n", | 735 | wiphy_debug(dev->wiphy, "unsupported BBP type %d\n", |
736 | priv->bbp_type); | 736 | priv->bbp_type); |
737 | 737 | ||
738 | ADM8211_RESTORE(); | 738 | ADM8211_RESTORE(); |
@@ -1032,7 +1032,7 @@ static int adm8211_hw_init_bbp(struct ieee80211_hw *dev) | |||
1032 | break; | 1032 | break; |
1033 | } | 1033 | } |
1034 | } else | 1034 | } else |
1035 | wiphy_debug(dev->wiphy, "unsupported bbp %d\n", priv->bbp_type); | 1035 | wiphy_debug(dev->wiphy, "unsupported BBP %d\n", priv->bbp_type); |
1036 | 1036 | ||
1037 | ADM8211_CSR_WRITE(SYNRF, 0); | 1037 | ADM8211_CSR_WRITE(SYNRF, 0); |
1038 | 1038 | ||
@@ -1525,7 +1525,7 @@ static int adm8211_start(struct ieee80211_hw *dev) | |||
1525 | retval = request_irq(priv->pdev->irq, adm8211_interrupt, | 1525 | retval = request_irq(priv->pdev->irq, adm8211_interrupt, |
1526 | IRQF_SHARED, "adm8211", dev); | 1526 | IRQF_SHARED, "adm8211", dev); |
1527 | if (retval) { | 1527 | if (retval) { |
1528 | wiphy_err(dev->wiphy, "failed to register irq handler\n"); | 1528 | wiphy_err(dev->wiphy, "failed to register IRQ handler\n"); |
1529 | goto fail; | 1529 | goto fail; |
1530 | } | 1530 | } |
1531 | 1531 | ||
@@ -1902,7 +1902,7 @@ static int __devinit adm8211_probe(struct pci_dev *pdev, | |||
1902 | goto err_free_eeprom; | 1902 | goto err_free_eeprom; |
1903 | } | 1903 | } |
1904 | 1904 | ||
1905 | wiphy_info(dev->wiphy, "hwaddr %pm, rev 0x%02x\n", | 1905 | wiphy_info(dev->wiphy, "hwaddr %pM, Rev 0x%02x\n", |
1906 | dev->wiphy->perm_addr, pdev->revision); | 1906 | dev->wiphy->perm_addr, pdev->revision); |
1907 | 1907 | ||
1908 | return 0; | 1908 | return 0; |
diff --git a/drivers/net/wireless/at76c50x-usb.c b/drivers/net/wireless/at76c50x-usb.c index d5140a87f073..1128fa8c9ed5 100644 --- a/drivers/net/wireless/at76c50x-usb.c +++ b/drivers/net/wireless/at76c50x-usb.c | |||
@@ -655,7 +655,7 @@ static int at76_get_hw_config(struct at76_priv *priv) | |||
655 | exit: | 655 | exit: |
656 | kfree(hwcfg); | 656 | kfree(hwcfg); |
657 | if (ret < 0) | 657 | if (ret < 0) |
658 | wiphy_err(priv->hw->wiphy, "cannot get hw config (error %d)\n", | 658 | wiphy_err(priv->hw->wiphy, "cannot get HW Config (error %d)\n", |
659 | ret); | 659 | ret); |
660 | 660 | ||
661 | return ret; | 661 | return ret; |
@@ -960,7 +960,7 @@ static void at76_dump_mib_mac_addr(struct at76_priv *priv) | |||
960 | sizeof(struct mib_mac_addr)); | 960 | sizeof(struct mib_mac_addr)); |
961 | if (ret < 0) { | 961 | if (ret < 0) { |
962 | wiphy_err(priv->hw->wiphy, | 962 | wiphy_err(priv->hw->wiphy, |
963 | "at76_get_mib (mac_addr) failed: %d\n", ret); | 963 | "at76_get_mib (MAC_ADDR) failed: %d\n", ret); |
964 | goto exit; | 964 | goto exit; |
965 | } | 965 | } |
966 | 966 | ||
@@ -989,7 +989,7 @@ static void at76_dump_mib_mac_wep(struct at76_priv *priv) | |||
989 | sizeof(struct mib_mac_wep)); | 989 | sizeof(struct mib_mac_wep)); |
990 | if (ret < 0) { | 990 | if (ret < 0) { |
991 | wiphy_err(priv->hw->wiphy, | 991 | wiphy_err(priv->hw->wiphy, |
992 | "at76_get_mib (mac_wep) failed: %d\n", ret); | 992 | "at76_get_mib (MAC_WEP) failed: %d\n", ret); |
993 | goto exit; | 993 | goto exit; |
994 | } | 994 | } |
995 | 995 | ||
@@ -1026,7 +1026,7 @@ static void at76_dump_mib_mac_mgmt(struct at76_priv *priv) | |||
1026 | sizeof(struct mib_mac_mgmt)); | 1026 | sizeof(struct mib_mac_mgmt)); |
1027 | if (ret < 0) { | 1027 | if (ret < 0) { |
1028 | wiphy_err(priv->hw->wiphy, | 1028 | wiphy_err(priv->hw->wiphy, |
1029 | "at76_get_mib (mac_mgmt) failed: %d\n", ret); | 1029 | "at76_get_mib (MAC_MGMT) failed: %d\n", ret); |
1030 | goto exit; | 1030 | goto exit; |
1031 | } | 1031 | } |
1032 | 1032 | ||
@@ -1062,7 +1062,7 @@ static void at76_dump_mib_mac(struct at76_priv *priv) | |||
1062 | ret = at76_get_mib(priv->udev, MIB_MAC, m, sizeof(struct mib_mac)); | 1062 | ret = at76_get_mib(priv->udev, MIB_MAC, m, sizeof(struct mib_mac)); |
1063 | if (ret < 0) { | 1063 | if (ret < 0) { |
1064 | wiphy_err(priv->hw->wiphy, | 1064 | wiphy_err(priv->hw->wiphy, |
1065 | "at76_get_mib (mac) failed: %d\n", ret); | 1065 | "at76_get_mib (MAC) failed: %d\n", ret); |
1066 | goto exit; | 1066 | goto exit; |
1067 | } | 1067 | } |
1068 | 1068 | ||
@@ -1099,7 +1099,7 @@ static void at76_dump_mib_phy(struct at76_priv *priv) | |||
1099 | ret = at76_get_mib(priv->udev, MIB_PHY, m, sizeof(struct mib_phy)); | 1099 | ret = at76_get_mib(priv->udev, MIB_PHY, m, sizeof(struct mib_phy)); |
1100 | if (ret < 0) { | 1100 | if (ret < 0) { |
1101 | wiphy_err(priv->hw->wiphy, | 1101 | wiphy_err(priv->hw->wiphy, |
1102 | "at76_get_mib (phy) failed: %d\n", ret); | 1102 | "at76_get_mib (PHY) failed: %d\n", ret); |
1103 | goto exit; | 1103 | goto exit; |
1104 | } | 1104 | } |
1105 | 1105 | ||
@@ -1132,7 +1132,7 @@ static void at76_dump_mib_local(struct at76_priv *priv) | |||
1132 | ret = at76_get_mib(priv->udev, MIB_LOCAL, m, sizeof(struct mib_local)); | 1132 | ret = at76_get_mib(priv->udev, MIB_LOCAL, m, sizeof(struct mib_local)); |
1133 | if (ret < 0) { | 1133 | if (ret < 0) { |
1134 | wiphy_err(priv->hw->wiphy, | 1134 | wiphy_err(priv->hw->wiphy, |
1135 | "at76_get_mib (local) failed: %d\n", ret); | 1135 | "at76_get_mib (LOCAL) failed: %d\n", ret); |
1136 | goto exit; | 1136 | goto exit; |
1137 | } | 1137 | } |
1138 | 1138 | ||
@@ -1158,7 +1158,7 @@ static void at76_dump_mib_mdomain(struct at76_priv *priv) | |||
1158 | sizeof(struct mib_mdomain)); | 1158 | sizeof(struct mib_mdomain)); |
1159 | if (ret < 0) { | 1159 | if (ret < 0) { |
1160 | wiphy_err(priv->hw->wiphy, | 1160 | wiphy_err(priv->hw->wiphy, |
1161 | "at76_get_mib (mdomain) failed: %d\n", ret); | 1161 | "at76_get_mib (MDOMAIN) failed: %d\n", ret); |
1162 | goto exit; | 1162 | goto exit; |
1163 | } | 1163 | } |
1164 | 1164 | ||
@@ -1229,7 +1229,7 @@ static int at76_submit_rx_urb(struct at76_priv *priv) | |||
1229 | struct sk_buff *skb = priv->rx_skb; | 1229 | struct sk_buff *skb = priv->rx_skb; |
1230 | 1230 | ||
1231 | if (!priv->rx_urb) { | 1231 | if (!priv->rx_urb) { |
1232 | wiphy_err(priv->hw->wiphy, "%s: priv->rx_urb is null\n", | 1232 | wiphy_err(priv->hw->wiphy, "%s: priv->rx_urb is NULL\n", |
1233 | __func__); | 1233 | __func__); |
1234 | return -EFAULT; | 1234 | return -EFAULT; |
1235 | } | 1235 | } |
@@ -1792,7 +1792,7 @@ static int at76_mac80211_tx(struct ieee80211_hw *hw, struct sk_buff *skb) | |||
1792 | wiphy_err(priv->hw->wiphy, "error in tx submit urb: %d\n", ret); | 1792 | wiphy_err(priv->hw->wiphy, "error in tx submit urb: %d\n", ret); |
1793 | if (ret == -EINVAL) | 1793 | if (ret == -EINVAL) |
1794 | wiphy_err(priv->hw->wiphy, | 1794 | wiphy_err(priv->hw->wiphy, |
1795 | "-einval: tx urb %p hcpriv %p complete %p\n", | 1795 | "-EINVAL: tx urb %p hcpriv %p complete %p\n", |
1796 | priv->tx_urb, | 1796 | priv->tx_urb, |
1797 | priv->tx_urb->hcpriv, priv->tx_urb->complete); | 1797 | priv->tx_urb->hcpriv, priv->tx_urb->complete); |
1798 | } | 1798 | } |
@@ -2310,7 +2310,7 @@ static int at76_init_new_device(struct at76_priv *priv, | |||
2310 | 2310 | ||
2311 | priv->mac80211_registered = 1; | 2311 | priv->mac80211_registered = 1; |
2312 | 2312 | ||
2313 | wiphy_info(priv->hw->wiphy, "usb %s, mac %pm, firmware %d.%d.%d-%d\n", | 2313 | wiphy_info(priv->hw->wiphy, "USB %s, MAC %pM, firmware %d.%d.%d-%d\n", |
2314 | dev_name(&interface->dev), priv->mac_addr, | 2314 | dev_name(&interface->dev), priv->mac_addr, |
2315 | priv->fw_version.major, priv->fw_version.minor, | 2315 | priv->fw_version.major, priv->fw_version.minor, |
2316 | priv->fw_version.patch, priv->fw_version.build); | 2316 | priv->fw_version.patch, priv->fw_version.build); |
diff --git a/drivers/net/wireless/ath/ar9170/main.c b/drivers/net/wireless/ath/ar9170/main.c index c67b05f3bcbd..debfb0fbc7c5 100644 --- a/drivers/net/wireless/ath/ar9170/main.c +++ b/drivers/net/wireless/ath/ar9170/main.c | |||
@@ -245,7 +245,7 @@ static void __ar9170_dump_txstats(struct ar9170 *ar) | |||
245 | { | 245 | { |
246 | int i; | 246 | int i; |
247 | 247 | ||
248 | wiphy_debug(ar->hw->wiphy, "qos queue stats\n"); | 248 | wiphy_debug(ar->hw->wiphy, "QoS queue stats\n"); |
249 | 249 | ||
250 | for (i = 0; i < __AR9170_NUM_TXQ; i++) | 250 | for (i = 0; i < __AR9170_NUM_TXQ; i++) |
251 | wiphy_debug(ar->hw->wiphy, | 251 | wiphy_debug(ar->hw->wiphy, |
@@ -387,7 +387,7 @@ static struct sk_buff *ar9170_get_queued_skb(struct ar9170 *ar, | |||
387 | if (mac && compare_ether_addr(ieee80211_get_DA(hdr), mac)) { | 387 | if (mac && compare_ether_addr(ieee80211_get_DA(hdr), mac)) { |
388 | #ifdef AR9170_QUEUE_DEBUG | 388 | #ifdef AR9170_QUEUE_DEBUG |
389 | wiphy_debug(ar->hw->wiphy, | 389 | wiphy_debug(ar->hw->wiphy, |
390 | "skip frame => da %pm != %pm\n", | 390 | "skip frame => DA %pM != %pM\n", |
391 | mac, ieee80211_get_DA(hdr)); | 391 | mac, ieee80211_get_DA(hdr)); |
392 | ar9170_print_txheader(ar, skb); | 392 | ar9170_print_txheader(ar, skb); |
393 | #endif /* AR9170_QUEUE_DEBUG */ | 393 | #endif /* AR9170_QUEUE_DEBUG */ |
diff --git a/drivers/net/wireless/ipw2x00/ipw2100.c b/drivers/net/wireless/ipw2x00/ipw2100.c index 1189dbb6e2a6..996e9d7d7586 100644 --- a/drivers/net/wireless/ipw2x00/ipw2100.c +++ b/drivers/net/wireless/ipw2x00/ipw2100.c | |||
@@ -2723,14 +2723,6 @@ static void __ipw2100_rx_process(struct ipw2100_priv *priv) | |||
2723 | 2723 | ||
2724 | packet = &priv->rx_buffers[i]; | 2724 | packet = &priv->rx_buffers[i]; |
2725 | 2725 | ||
2726 | /* Sync the DMA for the STATUS buffer so CPU is sure to get | ||
2727 | * the correct values */ | ||
2728 | pci_dma_sync_single_for_cpu(priv->pci_dev, | ||
2729 | sq->nic + | ||
2730 | sizeof(struct ipw2100_status) * i, | ||
2731 | sizeof(struct ipw2100_status), | ||
2732 | PCI_DMA_FROMDEVICE); | ||
2733 | |||
2734 | /* Sync the DMA for the RX buffer so CPU is sure to get | 2726 | /* Sync the DMA for the RX buffer so CPU is sure to get |
2735 | * the correct values */ | 2727 | * the correct values */ |
2736 | pci_dma_sync_single_for_cpu(priv->pci_dev, packet->dma_addr, | 2728 | pci_dma_sync_single_for_cpu(priv->pci_dev, packet->dma_addr, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c index fec026212326..0b779a41a142 100644 --- a/drivers/net/wireless/iwlwifi/iwl-1000.c +++ b/drivers/net/wireless/iwlwifi/iwl-1000.c | |||
@@ -265,7 +265,7 @@ struct iwl_cfg iwl1000_bgn_cfg = { | |||
265 | .support_ct_kill_exit = true, | 265 | .support_ct_kill_exit = true, |
266 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF, | 266 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF, |
267 | .chain_noise_scale = 1000, | 267 | .chain_noise_scale = 1000, |
268 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 268 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
269 | .max_event_log_size = 128, | 269 | .max_event_log_size = 128, |
270 | .ucode_tracing = true, | 270 | .ucode_tracing = true, |
271 | .sensitivity_calib_by_driver = true, | 271 | .sensitivity_calib_by_driver = true, |
@@ -297,7 +297,7 @@ struct iwl_cfg iwl1000_bg_cfg = { | |||
297 | .support_ct_kill_exit = true, | 297 | .support_ct_kill_exit = true, |
298 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF, | 298 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_EXT_LONG_THRESHOLD_DEF, |
299 | .chain_noise_scale = 1000, | 299 | .chain_noise_scale = 1000, |
300 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 300 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
301 | .max_event_log_size = 128, | 301 | .max_event_log_size = 128, |
302 | .ucode_tracing = true, | 302 | .ucode_tracing = true, |
303 | .sensitivity_calib_by_driver = true, | 303 | .sensitivity_calib_by_driver = true, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-3945.c b/drivers/net/wireless/iwlwifi/iwl-3945.c index 6950a783913b..8ccfcd08218d 100644 --- a/drivers/net/wireless/iwlwifi/iwl-3945.c +++ b/drivers/net/wireless/iwlwifi/iwl-3945.c | |||
@@ -2731,7 +2731,7 @@ static struct iwl_cfg iwl3945_bg_cfg = { | |||
2731 | .led_compensation = 64, | 2731 | .led_compensation = 64, |
2732 | .broken_powersave = true, | 2732 | .broken_powersave = true, |
2733 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 2733 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
2734 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 2734 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
2735 | .max_event_log_size = 512, | 2735 | .max_event_log_size = 512, |
2736 | .tx_power_by_driver = true, | 2736 | .tx_power_by_driver = true, |
2737 | }; | 2737 | }; |
@@ -2752,7 +2752,7 @@ static struct iwl_cfg iwl3945_abg_cfg = { | |||
2752 | .led_compensation = 64, | 2752 | .led_compensation = 64, |
2753 | .broken_powersave = true, | 2753 | .broken_powersave = true, |
2754 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 2754 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
2755 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 2755 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
2756 | .max_event_log_size = 512, | 2756 | .max_event_log_size = 512, |
2757 | .tx_power_by_driver = true, | 2757 | .tx_power_by_driver = true, |
2758 | }; | 2758 | }; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-4965.c b/drivers/net/wireless/iwlwifi/iwl-4965.c index d6da356608fa..d92b72909233 100644 --- a/drivers/net/wireless/iwlwifi/iwl-4965.c +++ b/drivers/net/wireless/iwlwifi/iwl-4965.c | |||
@@ -2322,7 +2322,7 @@ struct iwl_cfg iwl4965_agn_cfg = { | |||
2322 | .led_compensation = 61, | 2322 | .led_compensation = 61, |
2323 | .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS, | 2323 | .chain_noise_num_beacons = IWL4965_CAL_NUM_BEACONS, |
2324 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 2324 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
2325 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 2325 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
2326 | .temperature_kelvin = true, | 2326 | .temperature_kelvin = true, |
2327 | .max_event_log_size = 512, | 2327 | .max_event_log_size = 512, |
2328 | .tx_power_by_driver = true, | 2328 | .tx_power_by_driver = true, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c index aacf3770f075..48bdcd8d2e94 100644 --- a/drivers/net/wireless/iwlwifi/iwl-5000.c +++ b/drivers/net/wireless/iwlwifi/iwl-5000.c | |||
@@ -510,7 +510,7 @@ struct iwl_cfg iwl5300_agn_cfg = { | |||
510 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | 510 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
511 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 511 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
512 | .chain_noise_scale = 1000, | 512 | .chain_noise_scale = 1000, |
513 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 513 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
514 | .max_event_log_size = 512, | 514 | .max_event_log_size = 512, |
515 | .ucode_tracing = true, | 515 | .ucode_tracing = true, |
516 | .sensitivity_calib_by_driver = true, | 516 | .sensitivity_calib_by_driver = true, |
@@ -541,7 +541,7 @@ struct iwl_cfg iwl5100_bgn_cfg = { | |||
541 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | 541 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
542 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 542 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
543 | .chain_noise_scale = 1000, | 543 | .chain_noise_scale = 1000, |
544 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 544 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
545 | .max_event_log_size = 512, | 545 | .max_event_log_size = 512, |
546 | .ucode_tracing = true, | 546 | .ucode_tracing = true, |
547 | .sensitivity_calib_by_driver = true, | 547 | .sensitivity_calib_by_driver = true, |
@@ -570,7 +570,7 @@ struct iwl_cfg iwl5100_abg_cfg = { | |||
570 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | 570 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
571 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 571 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
572 | .chain_noise_scale = 1000, | 572 | .chain_noise_scale = 1000, |
573 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 573 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
574 | .max_event_log_size = 512, | 574 | .max_event_log_size = 512, |
575 | .ucode_tracing = true, | 575 | .ucode_tracing = true, |
576 | .sensitivity_calib_by_driver = true, | 576 | .sensitivity_calib_by_driver = true, |
@@ -601,7 +601,7 @@ struct iwl_cfg iwl5100_agn_cfg = { | |||
601 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | 601 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
602 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 602 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
603 | .chain_noise_scale = 1000, | 603 | .chain_noise_scale = 1000, |
604 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 604 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
605 | .max_event_log_size = 512, | 605 | .max_event_log_size = 512, |
606 | .ucode_tracing = true, | 606 | .ucode_tracing = true, |
607 | .sensitivity_calib_by_driver = true, | 607 | .sensitivity_calib_by_driver = true, |
@@ -632,7 +632,7 @@ struct iwl_cfg iwl5350_agn_cfg = { | |||
632 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | 632 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
633 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 633 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
634 | .chain_noise_scale = 1000, | 634 | .chain_noise_scale = 1000, |
635 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 635 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
636 | .max_event_log_size = 512, | 636 | .max_event_log_size = 512, |
637 | .ucode_tracing = true, | 637 | .ucode_tracing = true, |
638 | .sensitivity_calib_by_driver = true, | 638 | .sensitivity_calib_by_driver = true, |
@@ -663,7 +663,7 @@ struct iwl_cfg iwl5150_agn_cfg = { | |||
663 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | 663 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
664 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 664 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
665 | .chain_noise_scale = 1000, | 665 | .chain_noise_scale = 1000, |
666 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 666 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
667 | .max_event_log_size = 512, | 667 | .max_event_log_size = 512, |
668 | .ucode_tracing = true, | 668 | .ucode_tracing = true, |
669 | .sensitivity_calib_by_driver = true, | 669 | .sensitivity_calib_by_driver = true, |
@@ -693,7 +693,7 @@ struct iwl_cfg iwl5150_abg_cfg = { | |||
693 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, | 693 | .chain_noise_num_beacons = IWL_CAL_NUM_BEACONS, |
694 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, | 694 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_LONG_THRESHOLD_DEF, |
695 | .chain_noise_scale = 1000, | 695 | .chain_noise_scale = 1000, |
696 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 696 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
697 | .max_event_log_size = 512, | 697 | .max_event_log_size = 512, |
698 | .ucode_tracing = true, | 698 | .ucode_tracing = true, |
699 | .sensitivity_calib_by_driver = true, | 699 | .sensitivity_calib_by_driver = true, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c index af4fd50f3405..cee06b968de8 100644 --- a/drivers/net/wireless/iwlwifi/iwl-6000.c +++ b/drivers/net/wireless/iwlwifi/iwl-6000.c | |||
@@ -388,7 +388,7 @@ struct iwl_cfg iwl6000g2a_2agn_cfg = { | |||
388 | .support_ct_kill_exit = true, | 388 | .support_ct_kill_exit = true, |
389 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 389 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
390 | .chain_noise_scale = 1000, | 390 | .chain_noise_scale = 1000, |
391 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 391 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
392 | .max_event_log_size = 512, | 392 | .max_event_log_size = 512, |
393 | .ucode_tracing = true, | 393 | .ucode_tracing = true, |
394 | .sensitivity_calib_by_driver = true, | 394 | .sensitivity_calib_by_driver = true, |
@@ -424,7 +424,7 @@ struct iwl_cfg iwl6000g2a_2abg_cfg = { | |||
424 | .support_ct_kill_exit = true, | 424 | .support_ct_kill_exit = true, |
425 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 425 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
426 | .chain_noise_scale = 1000, | 426 | .chain_noise_scale = 1000, |
427 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 427 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
428 | .max_event_log_size = 512, | 428 | .max_event_log_size = 512, |
429 | .sensitivity_calib_by_driver = true, | 429 | .sensitivity_calib_by_driver = true, |
430 | .chain_noise_calib_by_driver = true, | 430 | .chain_noise_calib_by_driver = true, |
@@ -459,7 +459,7 @@ struct iwl_cfg iwl6000g2a_2bg_cfg = { | |||
459 | .support_ct_kill_exit = true, | 459 | .support_ct_kill_exit = true, |
460 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 460 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
461 | .chain_noise_scale = 1000, | 461 | .chain_noise_scale = 1000, |
462 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 462 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
463 | .max_event_log_size = 512, | 463 | .max_event_log_size = 512, |
464 | .sensitivity_calib_by_driver = true, | 464 | .sensitivity_calib_by_driver = true, |
465 | .chain_noise_calib_by_driver = true, | 465 | .chain_noise_calib_by_driver = true, |
@@ -496,7 +496,7 @@ struct iwl_cfg iwl6000g2b_2agn_cfg = { | |||
496 | .support_ct_kill_exit = true, | 496 | .support_ct_kill_exit = true, |
497 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 497 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
498 | .chain_noise_scale = 1000, | 498 | .chain_noise_scale = 1000, |
499 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 499 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
500 | .max_event_log_size = 512, | 500 | .max_event_log_size = 512, |
501 | .sensitivity_calib_by_driver = true, | 501 | .sensitivity_calib_by_driver = true, |
502 | .chain_noise_calib_by_driver = true, | 502 | .chain_noise_calib_by_driver = true, |
@@ -532,7 +532,7 @@ struct iwl_cfg iwl6000g2b_2abg_cfg = { | |||
532 | .support_ct_kill_exit = true, | 532 | .support_ct_kill_exit = true, |
533 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 533 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
534 | .chain_noise_scale = 1000, | 534 | .chain_noise_scale = 1000, |
535 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 535 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
536 | .max_event_log_size = 512, | 536 | .max_event_log_size = 512, |
537 | .sensitivity_calib_by_driver = true, | 537 | .sensitivity_calib_by_driver = true, |
538 | .chain_noise_calib_by_driver = true, | 538 | .chain_noise_calib_by_driver = true, |
@@ -570,7 +570,7 @@ struct iwl_cfg iwl6000g2b_2bgn_cfg = { | |||
570 | .support_ct_kill_exit = true, | 570 | .support_ct_kill_exit = true, |
571 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 571 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
572 | .chain_noise_scale = 1000, | 572 | .chain_noise_scale = 1000, |
573 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 573 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
574 | .max_event_log_size = 512, | 574 | .max_event_log_size = 512, |
575 | .sensitivity_calib_by_driver = true, | 575 | .sensitivity_calib_by_driver = true, |
576 | .chain_noise_calib_by_driver = true, | 576 | .chain_noise_calib_by_driver = true, |
@@ -606,7 +606,7 @@ struct iwl_cfg iwl6000g2b_2bg_cfg = { | |||
606 | .support_ct_kill_exit = true, | 606 | .support_ct_kill_exit = true, |
607 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 607 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
608 | .chain_noise_scale = 1000, | 608 | .chain_noise_scale = 1000, |
609 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 609 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
610 | .max_event_log_size = 512, | 610 | .max_event_log_size = 512, |
611 | .sensitivity_calib_by_driver = true, | 611 | .sensitivity_calib_by_driver = true, |
612 | .chain_noise_calib_by_driver = true, | 612 | .chain_noise_calib_by_driver = true, |
@@ -644,7 +644,7 @@ struct iwl_cfg iwl6000g2b_bgn_cfg = { | |||
644 | .support_ct_kill_exit = true, | 644 | .support_ct_kill_exit = true, |
645 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 645 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
646 | .chain_noise_scale = 1000, | 646 | .chain_noise_scale = 1000, |
647 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 647 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
648 | .max_event_log_size = 512, | 648 | .max_event_log_size = 512, |
649 | .sensitivity_calib_by_driver = true, | 649 | .sensitivity_calib_by_driver = true, |
650 | .chain_noise_calib_by_driver = true, | 650 | .chain_noise_calib_by_driver = true, |
@@ -680,7 +680,7 @@ struct iwl_cfg iwl6000g2b_bg_cfg = { | |||
680 | .support_ct_kill_exit = true, | 680 | .support_ct_kill_exit = true, |
681 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 681 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
682 | .chain_noise_scale = 1000, | 682 | .chain_noise_scale = 1000, |
683 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 683 | .monitor_recover_period = IWL_LONG_MONITORING_PERIOD, |
684 | .max_event_log_size = 512, | 684 | .max_event_log_size = 512, |
685 | .sensitivity_calib_by_driver = true, | 685 | .sensitivity_calib_by_driver = true, |
686 | .chain_noise_calib_by_driver = true, | 686 | .chain_noise_calib_by_driver = true, |
@@ -721,7 +721,7 @@ struct iwl_cfg iwl6000i_2agn_cfg = { | |||
721 | .support_ct_kill_exit = true, | 721 | .support_ct_kill_exit = true, |
722 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 722 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
723 | .chain_noise_scale = 1000, | 723 | .chain_noise_scale = 1000, |
724 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 724 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
725 | .max_event_log_size = 1024, | 725 | .max_event_log_size = 1024, |
726 | .ucode_tracing = true, | 726 | .ucode_tracing = true, |
727 | .sensitivity_calib_by_driver = true, | 727 | .sensitivity_calib_by_driver = true, |
@@ -756,7 +756,7 @@ struct iwl_cfg iwl6000i_2abg_cfg = { | |||
756 | .support_ct_kill_exit = true, | 756 | .support_ct_kill_exit = true, |
757 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 757 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
758 | .chain_noise_scale = 1000, | 758 | .chain_noise_scale = 1000, |
759 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 759 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
760 | .max_event_log_size = 1024, | 760 | .max_event_log_size = 1024, |
761 | .ucode_tracing = true, | 761 | .ucode_tracing = true, |
762 | .sensitivity_calib_by_driver = true, | 762 | .sensitivity_calib_by_driver = true, |
@@ -791,7 +791,7 @@ struct iwl_cfg iwl6000i_2bg_cfg = { | |||
791 | .support_ct_kill_exit = true, | 791 | .support_ct_kill_exit = true, |
792 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 792 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
793 | .chain_noise_scale = 1000, | 793 | .chain_noise_scale = 1000, |
794 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 794 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
795 | .max_event_log_size = 1024, | 795 | .max_event_log_size = 1024, |
796 | .ucode_tracing = true, | 796 | .ucode_tracing = true, |
797 | .sensitivity_calib_by_driver = true, | 797 | .sensitivity_calib_by_driver = true, |
@@ -828,7 +828,7 @@ struct iwl_cfg iwl6050_2agn_cfg = { | |||
828 | .support_ct_kill_exit = true, | 828 | .support_ct_kill_exit = true, |
829 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 829 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
830 | .chain_noise_scale = 1500, | 830 | .chain_noise_scale = 1500, |
831 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 831 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
832 | .max_event_log_size = 1024, | 832 | .max_event_log_size = 1024, |
833 | .ucode_tracing = true, | 833 | .ucode_tracing = true, |
834 | .sensitivity_calib_by_driver = true, | 834 | .sensitivity_calib_by_driver = true, |
@@ -866,7 +866,7 @@ struct iwl_cfg iwl6050g2_bgn_cfg = { | |||
866 | .support_ct_kill_exit = true, | 866 | .support_ct_kill_exit = true, |
867 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 867 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
868 | .chain_noise_scale = 1500, | 868 | .chain_noise_scale = 1500, |
869 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 869 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
870 | .max_event_log_size = 1024, | 870 | .max_event_log_size = 1024, |
871 | .ucode_tracing = true, | 871 | .ucode_tracing = true, |
872 | .sensitivity_calib_by_driver = true, | 872 | .sensitivity_calib_by_driver = true, |
@@ -902,7 +902,7 @@ struct iwl_cfg iwl6050_2abg_cfg = { | |||
902 | .support_ct_kill_exit = true, | 902 | .support_ct_kill_exit = true, |
903 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 903 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
904 | .chain_noise_scale = 1500, | 904 | .chain_noise_scale = 1500, |
905 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 905 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
906 | .max_event_log_size = 1024, | 906 | .max_event_log_size = 1024, |
907 | .ucode_tracing = true, | 907 | .ucode_tracing = true, |
908 | .sensitivity_calib_by_driver = true, | 908 | .sensitivity_calib_by_driver = true, |
@@ -940,7 +940,7 @@ struct iwl_cfg iwl6000_3agn_cfg = { | |||
940 | .support_ct_kill_exit = true, | 940 | .support_ct_kill_exit = true, |
941 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, | 941 | .plcp_delta_threshold = IWL_MAX_PLCP_ERR_THRESHOLD_DEF, |
942 | .chain_noise_scale = 1000, | 942 | .chain_noise_scale = 1000, |
943 | .monitor_recover_period = IWL_MONITORING_PERIOD, | 943 | .monitor_recover_period = IWL_DEF_MONITORING_PERIOD, |
944 | .max_event_log_size = 1024, | 944 | .max_event_log_size = 1024, |
945 | .ucode_tracing = true, | 945 | .ucode_tracing = true, |
946 | .sensitivity_calib_by_driver = true, | 946 | .sensitivity_calib_by_driver = true, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-agn.c b/drivers/net/wireless/iwlwifi/iwl-agn.c index c1882fd8345d..10d7b9b7f064 100644 --- a/drivers/net/wireless/iwlwifi/iwl-agn.c +++ b/drivers/net/wireless/iwlwifi/iwl-agn.c | |||
@@ -3667,6 +3667,49 @@ out_exit: | |||
3667 | IWL_DEBUG_MAC80211(priv, "leave\n"); | 3667 | IWL_DEBUG_MAC80211(priv, "leave\n"); |
3668 | } | 3668 | } |
3669 | 3669 | ||
3670 | static void iwlagn_configure_filter(struct ieee80211_hw *hw, | ||
3671 | unsigned int changed_flags, | ||
3672 | unsigned int *total_flags, | ||
3673 | u64 multicast) | ||
3674 | { | ||
3675 | struct iwl_priv *priv = hw->priv; | ||
3676 | __le32 filter_or = 0, filter_nand = 0; | ||
3677 | |||
3678 | #define CHK(test, flag) do { \ | ||
3679 | if (*total_flags & (test)) \ | ||
3680 | filter_or |= (flag); \ | ||
3681 | else \ | ||
3682 | filter_nand |= (flag); \ | ||
3683 | } while (0) | ||
3684 | |||
3685 | IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n", | ||
3686 | changed_flags, *total_flags); | ||
3687 | |||
3688 | CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); | ||
3689 | CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); | ||
3690 | CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); | ||
3691 | |||
3692 | #undef CHK | ||
3693 | |||
3694 | mutex_lock(&priv->mutex); | ||
3695 | |||
3696 | priv->staging_rxon.filter_flags &= ~filter_nand; | ||
3697 | priv->staging_rxon.filter_flags |= filter_or; | ||
3698 | |||
3699 | iwlcore_commit_rxon(priv); | ||
3700 | |||
3701 | mutex_unlock(&priv->mutex); | ||
3702 | |||
3703 | /* | ||
3704 | * Receiving all multicast frames is always enabled by the | ||
3705 | * default flags setup in iwl_connection_init_rx_config() | ||
3706 | * since we currently do not support programming multicast | ||
3707 | * filters into the device. | ||
3708 | */ | ||
3709 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | | ||
3710 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | ||
3711 | } | ||
3712 | |||
3670 | static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop) | 3713 | static void iwl_mac_flush(struct ieee80211_hw *hw, bool drop) |
3671 | { | 3714 | { |
3672 | struct iwl_priv *priv = hw->priv; | 3715 | struct iwl_priv *priv = hw->priv; |
@@ -3867,7 +3910,7 @@ static struct ieee80211_ops iwl_hw_ops = { | |||
3867 | .add_interface = iwl_mac_add_interface, | 3910 | .add_interface = iwl_mac_add_interface, |
3868 | .remove_interface = iwl_mac_remove_interface, | 3911 | .remove_interface = iwl_mac_remove_interface, |
3869 | .config = iwl_mac_config, | 3912 | .config = iwl_mac_config, |
3870 | .configure_filter = iwl_configure_filter, | 3913 | .configure_filter = iwlagn_configure_filter, |
3871 | .set_key = iwl_mac_set_key, | 3914 | .set_key = iwl_mac_set_key, |
3872 | .update_tkip_key = iwl_mac_update_tkip_key, | 3915 | .update_tkip_key = iwl_mac_update_tkip_key, |
3873 | .conf_tx = iwl_mac_conf_tx, | 3916 | .conf_tx = iwl_mac_conf_tx, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.c b/drivers/net/wireless/iwlwifi/iwl-core.c index 2c03c6e20a72..07dbc2796448 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.c +++ b/drivers/net/wireless/iwlwifi/iwl-core.c | |||
@@ -1328,51 +1328,6 @@ out: | |||
1328 | EXPORT_SYMBOL(iwl_apm_init); | 1328 | EXPORT_SYMBOL(iwl_apm_init); |
1329 | 1329 | ||
1330 | 1330 | ||
1331 | |||
1332 | void iwl_configure_filter(struct ieee80211_hw *hw, | ||
1333 | unsigned int changed_flags, | ||
1334 | unsigned int *total_flags, | ||
1335 | u64 multicast) | ||
1336 | { | ||
1337 | struct iwl_priv *priv = hw->priv; | ||
1338 | __le32 filter_or = 0, filter_nand = 0; | ||
1339 | |||
1340 | #define CHK(test, flag) do { \ | ||
1341 | if (*total_flags & (test)) \ | ||
1342 | filter_or |= (flag); \ | ||
1343 | else \ | ||
1344 | filter_nand |= (flag); \ | ||
1345 | } while (0) | ||
1346 | |||
1347 | IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n", | ||
1348 | changed_flags, *total_flags); | ||
1349 | |||
1350 | CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); | ||
1351 | CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); | ||
1352 | CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); | ||
1353 | |||
1354 | #undef CHK | ||
1355 | |||
1356 | mutex_lock(&priv->mutex); | ||
1357 | |||
1358 | priv->staging_rxon.filter_flags &= ~filter_nand; | ||
1359 | priv->staging_rxon.filter_flags |= filter_or; | ||
1360 | |||
1361 | iwlcore_commit_rxon(priv); | ||
1362 | |||
1363 | mutex_unlock(&priv->mutex); | ||
1364 | |||
1365 | /* | ||
1366 | * Receiving all multicast frames is always enabled by the | ||
1367 | * default flags setup in iwl_connection_init_rx_config() | ||
1368 | * since we currently do not support programming multicast | ||
1369 | * filters into the device. | ||
1370 | */ | ||
1371 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | | ||
1372 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | ||
1373 | } | ||
1374 | EXPORT_SYMBOL(iwl_configure_filter); | ||
1375 | |||
1376 | int iwl_set_hw_params(struct iwl_priv *priv) | 1331 | int iwl_set_hw_params(struct iwl_priv *priv) |
1377 | { | 1332 | { |
1378 | priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; | 1333 | priv->hw_params.max_rxq_size = RX_QUEUE_SIZE; |
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index 4a71dfb10a15..5e6ee3da6bbf 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -372,9 +372,6 @@ int iwl_set_decrypted_flag(struct iwl_priv *priv, | |||
372 | u32 decrypt_res, | 372 | u32 decrypt_res, |
373 | struct ieee80211_rx_status *stats); | 373 | struct ieee80211_rx_status *stats); |
374 | void iwl_irq_handle_error(struct iwl_priv *priv); | 374 | void iwl_irq_handle_error(struct iwl_priv *priv); |
375 | void iwl_configure_filter(struct ieee80211_hw *hw, | ||
376 | unsigned int changed_flags, | ||
377 | unsigned int *total_flags, u64 multicast); | ||
378 | int iwl_set_hw_params(struct iwl_priv *priv); | 375 | int iwl_set_hw_params(struct iwl_priv *priv); |
379 | void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif); | 376 | void iwl_post_associate(struct iwl_priv *priv, struct ieee80211_vif *vif); |
380 | void iwl_bss_info_changed(struct ieee80211_hw *hw, | 377 | void iwl_bss_info_changed(struct ieee80211_hw *hw, |
diff --git a/drivers/net/wireless/iwlwifi/iwl-dev.h b/drivers/net/wireless/iwlwifi/iwl-dev.h index f35bcad56e36..2e97cd2fa98a 100644 --- a/drivers/net/wireless/iwlwifi/iwl-dev.h +++ b/drivers/net/wireless/iwlwifi/iwl-dev.h | |||
@@ -1049,7 +1049,8 @@ struct iwl_event_log { | |||
1049 | #define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5) | 1049 | #define IWL_DELAY_NEXT_FORCE_FW_RELOAD (HZ*5) |
1050 | 1050 | ||
1051 | /* timer constants use to monitor and recover stuck tx queues in mSecs */ | 1051 | /* timer constants use to monitor and recover stuck tx queues in mSecs */ |
1052 | #define IWL_MONITORING_PERIOD (1000) | 1052 | #define IWL_DEF_MONITORING_PERIOD (1000) |
1053 | #define IWL_LONG_MONITORING_PERIOD (5000) | ||
1053 | #define IWL_ONE_HUNDRED_MSECS (100) | 1054 | #define IWL_ONE_HUNDRED_MSECS (100) |
1054 | #define IWL_SIXTY_SECS (60000) | 1055 | #define IWL_SIXTY_SECS (60000) |
1055 | 1056 | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl3945-base.c b/drivers/net/wireless/iwlwifi/iwl3945-base.c index 70c4b8fba0ee..59a308b02f95 100644 --- a/drivers/net/wireless/iwlwifi/iwl3945-base.c +++ b/drivers/net/wireless/iwlwifi/iwl3945-base.c | |||
@@ -3391,6 +3391,55 @@ static int iwl3945_mac_sta_add(struct ieee80211_hw *hw, | |||
3391 | 3391 | ||
3392 | return 0; | 3392 | return 0; |
3393 | } | 3393 | } |
3394 | |||
3395 | static void iwl3945_configure_filter(struct ieee80211_hw *hw, | ||
3396 | unsigned int changed_flags, | ||
3397 | unsigned int *total_flags, | ||
3398 | u64 multicast) | ||
3399 | { | ||
3400 | struct iwl_priv *priv = hw->priv; | ||
3401 | __le32 filter_or = 0, filter_nand = 0; | ||
3402 | |||
3403 | #define CHK(test, flag) do { \ | ||
3404 | if (*total_flags & (test)) \ | ||
3405 | filter_or |= (flag); \ | ||
3406 | else \ | ||
3407 | filter_nand |= (flag); \ | ||
3408 | } while (0) | ||
3409 | |||
3410 | IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n", | ||
3411 | changed_flags, *total_flags); | ||
3412 | |||
3413 | CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK); | ||
3414 | CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK); | ||
3415 | CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK); | ||
3416 | |||
3417 | #undef CHK | ||
3418 | |||
3419 | mutex_lock(&priv->mutex); | ||
3420 | |||
3421 | priv->staging_rxon.filter_flags &= ~filter_nand; | ||
3422 | priv->staging_rxon.filter_flags |= filter_or; | ||
3423 | |||
3424 | /* | ||
3425 | * Committing directly here breaks for some reason, | ||
3426 | * but we'll eventually commit the filter flags | ||
3427 | * change anyway. | ||
3428 | */ | ||
3429 | |||
3430 | mutex_unlock(&priv->mutex); | ||
3431 | |||
3432 | /* | ||
3433 | * Receiving all multicast frames is always enabled by the | ||
3434 | * default flags setup in iwl_connection_init_rx_config() | ||
3435 | * since we currently do not support programming multicast | ||
3436 | * filters into the device. | ||
3437 | */ | ||
3438 | *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS | | ||
3439 | FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL; | ||
3440 | } | ||
3441 | |||
3442 | |||
3394 | /***************************************************************************** | 3443 | /***************************************************************************** |
3395 | * | 3444 | * |
3396 | * sysfs attributes | 3445 | * sysfs attributes |
@@ -3796,7 +3845,7 @@ static struct ieee80211_ops iwl3945_hw_ops = { | |||
3796 | .add_interface = iwl_mac_add_interface, | 3845 | .add_interface = iwl_mac_add_interface, |
3797 | .remove_interface = iwl_mac_remove_interface, | 3846 | .remove_interface = iwl_mac_remove_interface, |
3798 | .config = iwl_mac_config, | 3847 | .config = iwl_mac_config, |
3799 | .configure_filter = iwl_configure_filter, | 3848 | .configure_filter = iwl3945_configure_filter, |
3800 | .set_key = iwl3945_mac_set_key, | 3849 | .set_key = iwl3945_mac_set_key, |
3801 | .conf_tx = iwl_mac_conf_tx, | 3850 | .conf_tx = iwl_mac_conf_tx, |
3802 | .reset_tsf = iwl_mac_reset_tsf, | 3851 | .reset_tsf = iwl_mac_reset_tsf, |
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c index 01ad7f77383a..86fa8abdd66f 100644 --- a/drivers/net/wireless/mac80211_hwsim.c +++ b/drivers/net/wireless/mac80211_hwsim.c | |||
@@ -486,7 +486,7 @@ static bool mac80211_hwsim_tx_frame(struct ieee80211_hw *hw, | |||
486 | struct ieee80211_rx_status rx_status; | 486 | struct ieee80211_rx_status rx_status; |
487 | 487 | ||
488 | if (data->idle) { | 488 | if (data->idle) { |
489 | wiphy_debug(hw->wiphy, "trying to tx when idle - reject\n"); | 489 | wiphy_debug(hw->wiphy, "Trying to TX when idle - reject\n"); |
490 | return false; | 490 | return false; |
491 | } | 491 | } |
492 | 492 | ||
diff --git a/drivers/net/wireless/mwl8k.c b/drivers/net/wireless/mwl8k.c index d761ed2d8af4..f152a25be59f 100644 --- a/drivers/net/wireless/mwl8k.c +++ b/drivers/net/wireless/mwl8k.c | |||
@@ -910,14 +910,14 @@ static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index) | |||
910 | 910 | ||
911 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); | 911 | rxq->rxd = pci_alloc_consistent(priv->pdev, size, &rxq->rxd_dma); |
912 | if (rxq->rxd == NULL) { | 912 | if (rxq->rxd == NULL) { |
913 | wiphy_err(hw->wiphy, "failed to alloc rx descriptors\n"); | 913 | wiphy_err(hw->wiphy, "failed to alloc RX descriptors\n"); |
914 | return -ENOMEM; | 914 | return -ENOMEM; |
915 | } | 915 | } |
916 | memset(rxq->rxd, 0, size); | 916 | memset(rxq->rxd, 0, size); |
917 | 917 | ||
918 | rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL); | 918 | rxq->buf = kmalloc(MWL8K_RX_DESCS * sizeof(*rxq->buf), GFP_KERNEL); |
919 | if (rxq->buf == NULL) { | 919 | if (rxq->buf == NULL) { |
920 | wiphy_err(hw->wiphy, "failed to alloc rx skbuff list\n"); | 920 | wiphy_err(hw->wiphy, "failed to alloc RX skbuff list\n"); |
921 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); | 921 | pci_free_consistent(priv->pdev, size, rxq->rxd, rxq->rxd_dma); |
922 | return -ENOMEM; | 922 | return -ENOMEM; |
923 | } | 923 | } |
@@ -1145,14 +1145,14 @@ static int mwl8k_txq_init(struct ieee80211_hw *hw, int index) | |||
1145 | 1145 | ||
1146 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); | 1146 | txq->txd = pci_alloc_consistent(priv->pdev, size, &txq->txd_dma); |
1147 | if (txq->txd == NULL) { | 1147 | if (txq->txd == NULL) { |
1148 | wiphy_err(hw->wiphy, "failed to alloc tx descriptors\n"); | 1148 | wiphy_err(hw->wiphy, "failed to alloc TX descriptors\n"); |
1149 | return -ENOMEM; | 1149 | return -ENOMEM; |
1150 | } | 1150 | } |
1151 | memset(txq->txd, 0, size); | 1151 | memset(txq->txd, 0, size); |
1152 | 1152 | ||
1153 | txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL); | 1153 | txq->skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->skb), GFP_KERNEL); |
1154 | if (txq->skb == NULL) { | 1154 | if (txq->skb == NULL) { |
1155 | wiphy_err(hw->wiphy, "failed to alloc tx skbuff list\n"); | 1155 | wiphy_err(hw->wiphy, "failed to alloc TX skbuff list\n"); |
1156 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); | 1156 | pci_free_consistent(priv->pdev, size, txq->txd, txq->txd_dma); |
1157 | return -ENOMEM; | 1157 | return -ENOMEM; |
1158 | } | 1158 | } |
@@ -1573,7 +1573,7 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |||
1573 | PCI_DMA_BIDIRECTIONAL); | 1573 | PCI_DMA_BIDIRECTIONAL); |
1574 | 1574 | ||
1575 | if (!timeout) { | 1575 | if (!timeout) { |
1576 | wiphy_err(hw->wiphy, "command %s timeout after %u ms\n", | 1576 | wiphy_err(hw->wiphy, "Command %s timeout after %u ms\n", |
1577 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), | 1577 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1578 | MWL8K_CMD_TIMEOUT_MS); | 1578 | MWL8K_CMD_TIMEOUT_MS); |
1579 | rc = -ETIMEDOUT; | 1579 | rc = -ETIMEDOUT; |
@@ -1584,11 +1584,11 @@ static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd) | |||
1584 | 1584 | ||
1585 | rc = cmd->result ? -EINVAL : 0; | 1585 | rc = cmd->result ? -EINVAL : 0; |
1586 | if (rc) | 1586 | if (rc) |
1587 | wiphy_err(hw->wiphy, "command %s error 0x%x\n", | 1587 | wiphy_err(hw->wiphy, "Command %s error 0x%x\n", |
1588 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), | 1588 | mwl8k_cmd_name(cmd->code, buf, sizeof(buf)), |
1589 | le16_to_cpu(cmd->result)); | 1589 | le16_to_cpu(cmd->result)); |
1590 | else if (ms > 2000) | 1590 | else if (ms > 2000) |
1591 | wiphy_notice(hw->wiphy, "command %s took %d ms\n", | 1591 | wiphy_notice(hw->wiphy, "Command %s took %d ms\n", |
1592 | mwl8k_cmd_name(cmd->code, | 1592 | mwl8k_cmd_name(cmd->code, |
1593 | buf, sizeof(buf)), | 1593 | buf, sizeof(buf)), |
1594 | ms); | 1594 | ms); |
@@ -3210,7 +3210,7 @@ static int mwl8k_start(struct ieee80211_hw *hw) | |||
3210 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, | 3210 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
3211 | IRQF_SHARED, MWL8K_NAME, hw); | 3211 | IRQF_SHARED, MWL8K_NAME, hw); |
3212 | if (rc) { | 3212 | if (rc) { |
3213 | wiphy_err(hw->wiphy, "failed to register irq handler\n"); | 3213 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
3214 | return -EIO; | 3214 | return -EIO; |
3215 | } | 3215 | } |
3216 | 3216 | ||
@@ -3926,7 +3926,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
3926 | 3926 | ||
3927 | priv->sram = pci_iomap(pdev, 0, 0x10000); | 3927 | priv->sram = pci_iomap(pdev, 0, 0x10000); |
3928 | if (priv->sram == NULL) { | 3928 | if (priv->sram == NULL) { |
3929 | wiphy_err(hw->wiphy, "cannot map device sram\n"); | 3929 | wiphy_err(hw->wiphy, "Cannot map device SRAM\n"); |
3930 | goto err_iounmap; | 3930 | goto err_iounmap; |
3931 | } | 3931 | } |
3932 | 3932 | ||
@@ -3938,7 +3938,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
3938 | if (priv->regs == NULL) { | 3938 | if (priv->regs == NULL) { |
3939 | priv->regs = pci_iomap(pdev, 2, 0x10000); | 3939 | priv->regs = pci_iomap(pdev, 2, 0x10000); |
3940 | if (priv->regs == NULL) { | 3940 | if (priv->regs == NULL) { |
3941 | wiphy_err(hw->wiphy, "cannot map device registers\n"); | 3941 | wiphy_err(hw->wiphy, "Cannot map device registers\n"); |
3942 | goto err_iounmap; | 3942 | goto err_iounmap; |
3943 | } | 3943 | } |
3944 | } | 3944 | } |
@@ -3950,14 +3950,14 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
3950 | /* Ask userland hotplug daemon for the device firmware */ | 3950 | /* Ask userland hotplug daemon for the device firmware */ |
3951 | rc = mwl8k_request_firmware(priv); | 3951 | rc = mwl8k_request_firmware(priv); |
3952 | if (rc) { | 3952 | if (rc) { |
3953 | wiphy_err(hw->wiphy, "firmware files not found\n"); | 3953 | wiphy_err(hw->wiphy, "Firmware files not found\n"); |
3954 | goto err_stop_firmware; | 3954 | goto err_stop_firmware; |
3955 | } | 3955 | } |
3956 | 3956 | ||
3957 | /* Load firmware into hardware */ | 3957 | /* Load firmware into hardware */ |
3958 | rc = mwl8k_load_firmware(hw); | 3958 | rc = mwl8k_load_firmware(hw); |
3959 | if (rc) { | 3959 | if (rc) { |
3960 | wiphy_err(hw->wiphy, "cannot start firmware\n"); | 3960 | wiphy_err(hw->wiphy, "Cannot start firmware\n"); |
3961 | goto err_stop_firmware; | 3961 | goto err_stop_firmware; |
3962 | } | 3962 | } |
3963 | 3963 | ||
@@ -4047,7 +4047,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
4047 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, | 4047 | rc = request_irq(priv->pdev->irq, mwl8k_interrupt, |
4048 | IRQF_SHARED, MWL8K_NAME, hw); | 4048 | IRQF_SHARED, MWL8K_NAME, hw); |
4049 | if (rc) { | 4049 | if (rc) { |
4050 | wiphy_err(hw->wiphy, "failed to register irq handler\n"); | 4050 | wiphy_err(hw->wiphy, "failed to register IRQ handler\n"); |
4051 | goto err_free_queues; | 4051 | goto err_free_queues; |
4052 | } | 4052 | } |
4053 | 4053 | ||
@@ -4067,7 +4067,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
4067 | rc = mwl8k_cmd_get_hw_spec_sta(hw); | 4067 | rc = mwl8k_cmd_get_hw_spec_sta(hw); |
4068 | } | 4068 | } |
4069 | if (rc) { | 4069 | if (rc) { |
4070 | wiphy_err(hw->wiphy, "cannot initialise firmware\n"); | 4070 | wiphy_err(hw->wiphy, "Cannot initialise firmware\n"); |
4071 | goto err_free_irq; | 4071 | goto err_free_irq; |
4072 | } | 4072 | } |
4073 | 4073 | ||
@@ -4081,14 +4081,14 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
4081 | /* Turn radio off */ | 4081 | /* Turn radio off */ |
4082 | rc = mwl8k_cmd_radio_disable(hw); | 4082 | rc = mwl8k_cmd_radio_disable(hw); |
4083 | if (rc) { | 4083 | if (rc) { |
4084 | wiphy_err(hw->wiphy, "cannot disable\n"); | 4084 | wiphy_err(hw->wiphy, "Cannot disable\n"); |
4085 | goto err_free_irq; | 4085 | goto err_free_irq; |
4086 | } | 4086 | } |
4087 | 4087 | ||
4088 | /* Clear MAC address */ | 4088 | /* Clear MAC address */ |
4089 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); | 4089 | rc = mwl8k_cmd_set_mac_addr(hw, NULL, "\x00\x00\x00\x00\x00\x00"); |
4090 | if (rc) { | 4090 | if (rc) { |
4091 | wiphy_err(hw->wiphy, "cannot clear mac address\n"); | 4091 | wiphy_err(hw->wiphy, "Cannot clear MAC address\n"); |
4092 | goto err_free_irq; | 4092 | goto err_free_irq; |
4093 | } | 4093 | } |
4094 | 4094 | ||
@@ -4098,7 +4098,7 @@ static int __devinit mwl8k_probe(struct pci_dev *pdev, | |||
4098 | 4098 | ||
4099 | rc = ieee80211_register_hw(hw); | 4099 | rc = ieee80211_register_hw(hw); |
4100 | if (rc) { | 4100 | if (rc) { |
4101 | wiphy_err(hw->wiphy, "cannot register device\n"); | 4101 | wiphy_err(hw->wiphy, "Cannot register device\n"); |
4102 | goto err_free_queues; | 4102 | goto err_free_queues; |
4103 | } | 4103 | } |
4104 | 4104 | ||
diff --git a/drivers/net/wireless/p54/eeprom.c b/drivers/net/wireless/p54/eeprom.c index d687cb7f2a59..78347041ec40 100644 --- a/drivers/net/wireless/p54/eeprom.c +++ b/drivers/net/wireless/p54/eeprom.c | |||
@@ -167,7 +167,7 @@ static int p54_generate_band(struct ieee80211_hw *dev, | |||
167 | } | 167 | } |
168 | 168 | ||
169 | if (j == 0) { | 169 | if (j == 0) { |
170 | wiphy_err(dev->wiphy, "disabling totally damaged %d GHz band\n", | 170 | wiphy_err(dev->wiphy, "Disabling totally damaged %d GHz band\n", |
171 | (band == IEEE80211_BAND_2GHZ) ? 2 : 5); | 171 | (band == IEEE80211_BAND_2GHZ) ? 2 : 5); |
172 | 172 | ||
173 | ret = -ENODATA; | 173 | ret = -ENODATA; |
@@ -695,12 +695,12 @@ int p54_parse_eeprom(struct ieee80211_hw *dev, void *eeprom, int len) | |||
695 | u8 perm_addr[ETH_ALEN]; | 695 | u8 perm_addr[ETH_ALEN]; |
696 | 696 | ||
697 | wiphy_warn(dev->wiphy, | 697 | wiphy_warn(dev->wiphy, |
698 | "invalid hwaddr! using randomly generated mac addr\n"); | 698 | "Invalid hwaddr! Using randomly generated MAC addr\n"); |
699 | random_ether_addr(perm_addr); | 699 | random_ether_addr(perm_addr); |
700 | SET_IEEE80211_PERM_ADDR(dev, perm_addr); | 700 | SET_IEEE80211_PERM_ADDR(dev, perm_addr); |
701 | } | 701 | } |
702 | 702 | ||
703 | wiphy_info(dev->wiphy, "hwaddr %pm, mac:isl38%02x rf:%s\n", | 703 | wiphy_info(dev->wiphy, "hwaddr %pM, MAC:isl38%02x RF:%s\n", |
704 | dev->wiphy->perm_addr, priv->version, | 704 | dev->wiphy->perm_addr, priv->version, |
705 | p54_rf_chips[priv->rxhw]); | 705 | p54_rf_chips[priv->rxhw]); |
706 | 706 | ||
diff --git a/drivers/net/wireless/p54/fwio.c b/drivers/net/wireless/p54/fwio.c index 47006bca4852..15b20c29a604 100644 --- a/drivers/net/wireless/p54/fwio.c +++ b/drivers/net/wireless/p54/fwio.c | |||
@@ -125,7 +125,7 @@ int p54_parse_firmware(struct ieee80211_hw *dev, const struct firmware *fw) | |||
125 | 125 | ||
126 | if (fw_version) | 126 | if (fw_version) |
127 | wiphy_info(priv->hw->wiphy, | 127 | wiphy_info(priv->hw->wiphy, |
128 | "fw rev %s - softmac protocol %x.%x\n", | 128 | "FW rev %s - Softmac protocol %x.%x\n", |
129 | fw_version, priv->fw_var >> 8, priv->fw_var & 0xff); | 129 | fw_version, priv->fw_var >> 8, priv->fw_var & 0xff); |
130 | 130 | ||
131 | if (priv->fw_var < 0x500) | 131 | if (priv->fw_var < 0x500) |
diff --git a/drivers/net/wireless/p54/led.c b/drivers/net/wireless/p54/led.c index ea91f5cce6b3..3837e1eec5f4 100644 --- a/drivers/net/wireless/p54/led.c +++ b/drivers/net/wireless/p54/led.c | |||
@@ -58,7 +58,7 @@ static void p54_update_leds(struct work_struct *work) | |||
58 | err = p54_set_leds(priv); | 58 | err = p54_set_leds(priv); |
59 | if (err && net_ratelimit()) | 59 | if (err && net_ratelimit()) |
60 | wiphy_err(priv->hw->wiphy, | 60 | wiphy_err(priv->hw->wiphy, |
61 | "failed to update leds (%d).\n", err); | 61 | "failed to update LEDs (%d).\n", err); |
62 | 62 | ||
63 | if (rerun) | 63 | if (rerun) |
64 | ieee80211_queue_delayed_work(priv->hw, &priv->led_work, | 64 | ieee80211_queue_delayed_work(priv->hw, &priv->led_work, |
@@ -103,7 +103,7 @@ static int p54_register_led(struct p54_common *priv, | |||
103 | err = led_classdev_register(wiphy_dev(priv->hw->wiphy), &led->led_dev); | 103 | err = led_classdev_register(wiphy_dev(priv->hw->wiphy), &led->led_dev); |
104 | if (err) | 104 | if (err) |
105 | wiphy_err(priv->hw->wiphy, | 105 | wiphy_err(priv->hw->wiphy, |
106 | "failed to register %s led.\n", name); | 106 | "Failed to register %s LED.\n", name); |
107 | else | 107 | else |
108 | led->registered = 1; | 108 | led->registered = 1; |
109 | 109 | ||
diff --git a/drivers/net/wireless/p54/p54pci.c b/drivers/net/wireless/p54/p54pci.c index 822f8dc26e9c..1eacba4daa5b 100644 --- a/drivers/net/wireless/p54/p54pci.c +++ b/drivers/net/wireless/p54/p54pci.c | |||
@@ -466,7 +466,7 @@ static int p54p_open(struct ieee80211_hw *dev) | |||
466 | P54P_READ(dev_int); | 466 | P54P_READ(dev_int); |
467 | 467 | ||
468 | if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) { | 468 | if (!wait_for_completion_interruptible_timeout(&priv->boot_comp, HZ)) { |
469 | wiphy_err(dev->wiphy, "cannot boot firmware!\n"); | 469 | wiphy_err(dev->wiphy, "Cannot boot firmware!\n"); |
470 | p54p_stop(dev); | 470 | p54p_stop(dev); |
471 | return -ETIMEDOUT; | 471 | return -ETIMEDOUT; |
472 | } | 472 | } |
diff --git a/drivers/net/wireless/p54/txrx.c b/drivers/net/wireless/p54/txrx.c index 427b46f558ed..173aec3d6e7e 100644 --- a/drivers/net/wireless/p54/txrx.c +++ b/drivers/net/wireless/p54/txrx.c | |||
@@ -540,7 +540,7 @@ static void p54_rx_trap(struct p54_common *priv, struct sk_buff *skb) | |||
540 | case P54_TRAP_BEACON_TX: | 540 | case P54_TRAP_BEACON_TX: |
541 | break; | 541 | break; |
542 | case P54_TRAP_RADAR: | 542 | case P54_TRAP_RADAR: |
543 | wiphy_info(priv->hw->wiphy, "radar (freq:%d mhz)\n", freq); | 543 | wiphy_info(priv->hw->wiphy, "radar (freq:%d MHz)\n", freq); |
544 | break; | 544 | break; |
545 | case P54_TRAP_NO_BEACON: | 545 | case P54_TRAP_NO_BEACON: |
546 | if (priv->vif) | 546 | if (priv->vif) |
diff --git a/drivers/net/wireless/rtl818x/rtl8180_dev.c b/drivers/net/wireless/rtl818x/rtl8180_dev.c index b50c39aaec05..30107ce78dfb 100644 --- a/drivers/net/wireless/rtl818x/rtl8180_dev.c +++ b/drivers/net/wireless/rtl818x/rtl8180_dev.c | |||
@@ -445,7 +445,7 @@ static int rtl8180_init_rx_ring(struct ieee80211_hw *dev) | |||
445 | &priv->rx_ring_dma); | 445 | &priv->rx_ring_dma); |
446 | 446 | ||
447 | if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) { | 447 | if (!priv->rx_ring || (unsigned long)priv->rx_ring & 0xFF) { |
448 | wiphy_err(dev->wiphy, "cannot allocate rx ring\n"); | 448 | wiphy_err(dev->wiphy, "Cannot allocate RX ring\n"); |
449 | return -ENOMEM; | 449 | return -ENOMEM; |
450 | } | 450 | } |
451 | 451 | ||
@@ -502,7 +502,7 @@ static int rtl8180_init_tx_ring(struct ieee80211_hw *dev, | |||
502 | 502 | ||
503 | ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma); | 503 | ring = pci_alloc_consistent(priv->pdev, sizeof(*ring) * entries, &dma); |
504 | if (!ring || (unsigned long)ring & 0xFF) { | 504 | if (!ring || (unsigned long)ring & 0xFF) { |
505 | wiphy_err(dev->wiphy, "cannot allocate tx ring (prio = %d)\n", | 505 | wiphy_err(dev->wiphy, "Cannot allocate TX ring (prio = %d)\n", |
506 | prio); | 506 | prio); |
507 | return -ENOMEM; | 507 | return -ENOMEM; |
508 | } | 508 | } |
@@ -568,7 +568,7 @@ static int rtl8180_start(struct ieee80211_hw *dev) | |||
568 | ret = request_irq(priv->pdev->irq, rtl8180_interrupt, | 568 | ret = request_irq(priv->pdev->irq, rtl8180_interrupt, |
569 | IRQF_SHARED, KBUILD_MODNAME, dev); | 569 | IRQF_SHARED, KBUILD_MODNAME, dev); |
570 | if (ret) { | 570 | if (ret) { |
571 | wiphy_err(dev->wiphy, "failed to register irq handler\n"); | 571 | wiphy_err(dev->wiphy, "failed to register IRQ handler\n"); |
572 | goto err_free_rings; | 572 | goto err_free_rings; |
573 | } | 573 | } |
574 | 574 | ||
diff --git a/drivers/net/wireless/rtl818x/rtl8187_dev.c b/drivers/net/wireless/rtl818x/rtl8187_dev.c index 5738a55c1b06..98e0351c1dd6 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_dev.c +++ b/drivers/net/wireless/rtl818x/rtl8187_dev.c | |||
@@ -573,7 +573,7 @@ static int rtl8187_cmd_reset(struct ieee80211_hw *dev) | |||
573 | } while (--i); | 573 | } while (--i); |
574 | 574 | ||
575 | if (!i) { | 575 | if (!i) { |
576 | wiphy_err(dev->wiphy, "reset timeout!\n"); | 576 | wiphy_err(dev->wiphy, "Reset timeout!\n"); |
577 | return -ETIMEDOUT; | 577 | return -ETIMEDOUT; |
578 | } | 578 | } |
579 | 579 | ||
@@ -1526,7 +1526,7 @@ static int __devinit rtl8187_probe(struct usb_interface *intf, | |||
1526 | mutex_init(&priv->conf_mutex); | 1526 | mutex_init(&priv->conf_mutex); |
1527 | skb_queue_head_init(&priv->b_tx_status.queue); | 1527 | skb_queue_head_init(&priv->b_tx_status.queue); |
1528 | 1528 | ||
1529 | wiphy_info(dev->wiphy, "hwaddr %pm, %s v%d + %s, rfkill mask %d\n", | 1529 | wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n", |
1530 | mac_addr, chip_name, priv->asic_rev, priv->rf->name, | 1530 | mac_addr, chip_name, priv->asic_rev, priv->rf->name, |
1531 | priv->rfkill_mask); | 1531 | priv->rfkill_mask); |
1532 | 1532 | ||
diff --git a/drivers/net/wireless/rtl818x/rtl8187_rtl8225.c b/drivers/net/wireless/rtl818x/rtl8187_rtl8225.c index fd96f9112322..97eebdcf7eb9 100644 --- a/drivers/net/wireless/rtl818x/rtl8187_rtl8225.c +++ b/drivers/net/wireless/rtl818x/rtl8187_rtl8225.c | |||
@@ -366,7 +366,7 @@ static void rtl8225_rf_init(struct ieee80211_hw *dev) | |||
366 | rtl8225_write(dev, 0x02, 0x044d); | 366 | rtl8225_write(dev, 0x02, 0x044d); |
367 | msleep(100); | 367 | msleep(100); |
368 | if (!(rtl8225_read(dev, 6) & (1 << 7))) | 368 | if (!(rtl8225_read(dev, 6) & (1 << 7))) |
369 | wiphy_warn(dev->wiphy, "rf calibration failed! %x\n", | 369 | wiphy_warn(dev->wiphy, "RF Calibration Failed! %x\n", |
370 | rtl8225_read(dev, 6)); | 370 | rtl8225_read(dev, 6)); |
371 | } | 371 | } |
372 | 372 | ||
@@ -735,7 +735,7 @@ static void rtl8225z2_rf_init(struct ieee80211_hw *dev) | |||
735 | rtl8225_write(dev, 0x02, 0x044D); | 735 | rtl8225_write(dev, 0x02, 0x044D); |
736 | msleep(100); | 736 | msleep(100); |
737 | if (!(rtl8225_read(dev, 6) & (1 << 7))) | 737 | if (!(rtl8225_read(dev, 6) & (1 << 7))) |
738 | wiphy_warn(dev->wiphy, "rf calibration failed! %x\n", | 738 | wiphy_warn(dev->wiphy, "RF Calibration Failed! %x\n", |
739 | rtl8225_read(dev, 6)); | 739 | rtl8225_read(dev, 6)); |
740 | } | 740 | } |
741 | 741 | ||
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig index 044f430f3b43..cff7cc2c1f02 100644 --- a/drivers/platform/x86/Kconfig +++ b/drivers/platform/x86/Kconfig | |||
@@ -486,10 +486,12 @@ config TOPSTAR_LAPTOP | |||
486 | config ACPI_TOSHIBA | 486 | config ACPI_TOSHIBA |
487 | tristate "Toshiba Laptop Extras" | 487 | tristate "Toshiba Laptop Extras" |
488 | depends on ACPI | 488 | depends on ACPI |
489 | depends on LEDS_CLASS | ||
490 | depends on NEW_LEDS | ||
491 | depends on BACKLIGHT_CLASS_DEVICE | ||
489 | depends on INPUT | 492 | depends on INPUT |
490 | depends on RFKILL || RFKILL = n | 493 | depends on RFKILL || RFKILL = n |
491 | select INPUT_POLLDEV | 494 | select INPUT_POLLDEV |
492 | select BACKLIGHT_CLASS_DEVICE | ||
493 | ---help--- | 495 | ---help--- |
494 | This driver adds support for access to certain system settings | 496 | This driver adds support for access to certain system settings |
495 | on "legacy free" Toshiba laptops. These laptops can be recognized by | 497 | on "legacy free" Toshiba laptops. These laptops can be recognized by |
diff --git a/drivers/platform/x86/hp-wmi.c b/drivers/platform/x86/hp-wmi.c index f15516374987..c1741142a4cb 100644 --- a/drivers/platform/x86/hp-wmi.c +++ b/drivers/platform/x86/hp-wmi.c | |||
@@ -79,12 +79,13 @@ struct bios_args { | |||
79 | u32 command; | 79 | u32 command; |
80 | u32 commandtype; | 80 | u32 commandtype; |
81 | u32 datasize; | 81 | u32 datasize; |
82 | char *data; | 82 | u32 data; |
83 | }; | 83 | }; |
84 | 84 | ||
85 | struct bios_return { | 85 | struct bios_return { |
86 | u32 sigpass; | 86 | u32 sigpass; |
87 | u32 return_code; | 87 | u32 return_code; |
88 | u32 value; | ||
88 | }; | 89 | }; |
89 | 90 | ||
90 | struct key_entry { | 91 | struct key_entry { |
@@ -148,7 +149,7 @@ static struct platform_driver hp_wmi_driver = { | |||
148 | * buffer = kzalloc(128, GFP_KERNEL); | 149 | * buffer = kzalloc(128, GFP_KERNEL); |
149 | * ret = hp_wmi_perform_query(0x7, 0, buffer, 128) | 150 | * ret = hp_wmi_perform_query(0x7, 0, buffer, 128) |
150 | */ | 151 | */ |
151 | static int hp_wmi_perform_query(int query, int write, char *buffer, | 152 | static int hp_wmi_perform_query(int query, int write, u32 *buffer, |
152 | int buffersize) | 153 | int buffersize) |
153 | { | 154 | { |
154 | struct bios_return bios_return; | 155 | struct bios_return bios_return; |
@@ -159,7 +160,7 @@ static int hp_wmi_perform_query(int query, int write, char *buffer, | |||
159 | .command = write ? 0x2 : 0x1, | 160 | .command = write ? 0x2 : 0x1, |
160 | .commandtype = query, | 161 | .commandtype = query, |
161 | .datasize = buffersize, | 162 | .datasize = buffersize, |
162 | .data = buffer, | 163 | .data = *buffer, |
163 | }; | 164 | }; |
164 | struct acpi_buffer input = { sizeof(struct bios_args), &args }; | 165 | struct acpi_buffer input = { sizeof(struct bios_args), &args }; |
165 | struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL }; | 166 | struct acpi_buffer output = { ACPI_ALLOCATE_BUFFER, NULL }; |
@@ -177,29 +178,14 @@ static int hp_wmi_perform_query(int query, int write, char *buffer, | |||
177 | 178 | ||
178 | bios_return = *((struct bios_return *)obj->buffer.pointer); | 179 | bios_return = *((struct bios_return *)obj->buffer.pointer); |
179 | 180 | ||
180 | if (bios_return.return_code) { | 181 | memcpy(buffer, &bios_return.value, sizeof(bios_return.value)); |
181 | printk(KERN_WARNING PREFIX "Query %d returned %d\n", query, | ||
182 | bios_return.return_code); | ||
183 | kfree(obj); | ||
184 | return bios_return.return_code; | ||
185 | } | ||
186 | if (obj->buffer.length - sizeof(bios_return) > buffersize) { | ||
187 | kfree(obj); | ||
188 | return -EINVAL; | ||
189 | } | ||
190 | |||
191 | memset(buffer, 0, buffersize); | ||
192 | memcpy(buffer, | ||
193 | ((char *)obj->buffer.pointer) + sizeof(struct bios_return), | ||
194 | obj->buffer.length - sizeof(bios_return)); | ||
195 | kfree(obj); | ||
196 | return 0; | 182 | return 0; |
197 | } | 183 | } |
198 | 184 | ||
199 | static int hp_wmi_display_state(void) | 185 | static int hp_wmi_display_state(void) |
200 | { | 186 | { |
201 | int state; | 187 | int state = 0; |
202 | int ret = hp_wmi_perform_query(HPWMI_DISPLAY_QUERY, 0, (char *)&state, | 188 | int ret = hp_wmi_perform_query(HPWMI_DISPLAY_QUERY, 0, &state, |
203 | sizeof(state)); | 189 | sizeof(state)); |
204 | if (ret) | 190 | if (ret) |
205 | return -EINVAL; | 191 | return -EINVAL; |
@@ -208,8 +194,8 @@ static int hp_wmi_display_state(void) | |||
208 | 194 | ||
209 | static int hp_wmi_hddtemp_state(void) | 195 | static int hp_wmi_hddtemp_state(void) |
210 | { | 196 | { |
211 | int state; | 197 | int state = 0; |
212 | int ret = hp_wmi_perform_query(HPWMI_HDDTEMP_QUERY, 0, (char *)&state, | 198 | int ret = hp_wmi_perform_query(HPWMI_HDDTEMP_QUERY, 0, &state, |
213 | sizeof(state)); | 199 | sizeof(state)); |
214 | if (ret) | 200 | if (ret) |
215 | return -EINVAL; | 201 | return -EINVAL; |
@@ -218,8 +204,8 @@ static int hp_wmi_hddtemp_state(void) | |||
218 | 204 | ||
219 | static int hp_wmi_als_state(void) | 205 | static int hp_wmi_als_state(void) |
220 | { | 206 | { |
221 | int state; | 207 | int state = 0; |
222 | int ret = hp_wmi_perform_query(HPWMI_ALS_QUERY, 0, (char *)&state, | 208 | int ret = hp_wmi_perform_query(HPWMI_ALS_QUERY, 0, &state, |
223 | sizeof(state)); | 209 | sizeof(state)); |
224 | if (ret) | 210 | if (ret) |
225 | return -EINVAL; | 211 | return -EINVAL; |
@@ -228,8 +214,8 @@ static int hp_wmi_als_state(void) | |||
228 | 214 | ||
229 | static int hp_wmi_dock_state(void) | 215 | static int hp_wmi_dock_state(void) |
230 | { | 216 | { |
231 | int state; | 217 | int state = 0; |
232 | int ret = hp_wmi_perform_query(HPWMI_HARDWARE_QUERY, 0, (char *)&state, | 218 | int ret = hp_wmi_perform_query(HPWMI_HARDWARE_QUERY, 0, &state, |
233 | sizeof(state)); | 219 | sizeof(state)); |
234 | 220 | ||
235 | if (ret) | 221 | if (ret) |
@@ -240,8 +226,8 @@ static int hp_wmi_dock_state(void) | |||
240 | 226 | ||
241 | static int hp_wmi_tablet_state(void) | 227 | static int hp_wmi_tablet_state(void) |
242 | { | 228 | { |
243 | int state; | 229 | int state = 0; |
244 | int ret = hp_wmi_perform_query(HPWMI_HARDWARE_QUERY, 0, (char *)&state, | 230 | int ret = hp_wmi_perform_query(HPWMI_HARDWARE_QUERY, 0, &state, |
245 | sizeof(state)); | 231 | sizeof(state)); |
246 | if (ret) | 232 | if (ret) |
247 | return ret; | 233 | return ret; |
@@ -256,7 +242,7 @@ static int hp_wmi_set_block(void *data, bool blocked) | |||
256 | int ret; | 242 | int ret; |
257 | 243 | ||
258 | ret = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 1, | 244 | ret = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 1, |
259 | (char *)&query, sizeof(query)); | 245 | &query, sizeof(query)); |
260 | if (ret) | 246 | if (ret) |
261 | return -EINVAL; | 247 | return -EINVAL; |
262 | return 0; | 248 | return 0; |
@@ -268,10 +254,10 @@ static const struct rfkill_ops hp_wmi_rfkill_ops = { | |||
268 | 254 | ||
269 | static bool hp_wmi_get_sw_state(enum hp_wmi_radio r) | 255 | static bool hp_wmi_get_sw_state(enum hp_wmi_radio r) |
270 | { | 256 | { |
271 | int wireless; | 257 | int wireless = 0; |
272 | int mask; | 258 | int mask; |
273 | hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, | 259 | hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, |
274 | (char *)&wireless, sizeof(wireless)); | 260 | &wireless, sizeof(wireless)); |
275 | /* TBD: Pass error */ | 261 | /* TBD: Pass error */ |
276 | 262 | ||
277 | mask = 0x200 << (r * 8); | 263 | mask = 0x200 << (r * 8); |
@@ -284,10 +270,10 @@ static bool hp_wmi_get_sw_state(enum hp_wmi_radio r) | |||
284 | 270 | ||
285 | static bool hp_wmi_get_hw_state(enum hp_wmi_radio r) | 271 | static bool hp_wmi_get_hw_state(enum hp_wmi_radio r) |
286 | { | 272 | { |
287 | int wireless; | 273 | int wireless = 0; |
288 | int mask; | 274 | int mask; |
289 | hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, | 275 | hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, |
290 | (char *)&wireless, sizeof(wireless)); | 276 | &wireless, sizeof(wireless)); |
291 | /* TBD: Pass error */ | 277 | /* TBD: Pass error */ |
292 | 278 | ||
293 | mask = 0x800 << (r * 8); | 279 | mask = 0x800 << (r * 8); |
@@ -347,7 +333,7 @@ static ssize_t set_als(struct device *dev, struct device_attribute *attr, | |||
347 | const char *buf, size_t count) | 333 | const char *buf, size_t count) |
348 | { | 334 | { |
349 | u32 tmp = simple_strtoul(buf, NULL, 10); | 335 | u32 tmp = simple_strtoul(buf, NULL, 10); |
350 | int ret = hp_wmi_perform_query(HPWMI_ALS_QUERY, 1, (char *)&tmp, | 336 | int ret = hp_wmi_perform_query(HPWMI_ALS_QUERY, 1, &tmp, |
351 | sizeof(tmp)); | 337 | sizeof(tmp)); |
352 | if (ret) | 338 | if (ret) |
353 | return -EINVAL; | 339 | return -EINVAL; |
@@ -421,7 +407,7 @@ static void hp_wmi_notify(u32 value, void *context) | |||
421 | static struct key_entry *key; | 407 | static struct key_entry *key; |
422 | union acpi_object *obj; | 408 | union acpi_object *obj; |
423 | u32 event_id, event_data; | 409 | u32 event_id, event_data; |
424 | int key_code, ret; | 410 | int key_code = 0, ret; |
425 | u32 *location; | 411 | u32 *location; |
426 | acpi_status status; | 412 | acpi_status status; |
427 | 413 | ||
@@ -475,7 +461,7 @@ static void hp_wmi_notify(u32 value, void *context) | |||
475 | break; | 461 | break; |
476 | case HPWMI_BEZEL_BUTTON: | 462 | case HPWMI_BEZEL_BUTTON: |
477 | ret = hp_wmi_perform_query(HPWMI_HOTKEY_QUERY, 0, | 463 | ret = hp_wmi_perform_query(HPWMI_HOTKEY_QUERY, 0, |
478 | (char *)&key_code, | 464 | &key_code, |
479 | sizeof(key_code)); | 465 | sizeof(key_code)); |
480 | if (ret) | 466 | if (ret) |
481 | break; | 467 | break; |
@@ -578,9 +564,9 @@ static void cleanup_sysfs(struct platform_device *device) | |||
578 | static int __devinit hp_wmi_bios_setup(struct platform_device *device) | 564 | static int __devinit hp_wmi_bios_setup(struct platform_device *device) |
579 | { | 565 | { |
580 | int err; | 566 | int err; |
581 | int wireless; | 567 | int wireless = 0; |
582 | 568 | ||
583 | err = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, (char *)&wireless, | 569 | err = hp_wmi_perform_query(HPWMI_WIRELESS_QUERY, 0, &wireless, |
584 | sizeof(wireless)); | 570 | sizeof(wireless)); |
585 | if (err) | 571 | if (err) |
586 | return err; | 572 | return err; |
diff --git a/drivers/serial/68328serial.c b/drivers/serial/68328serial.c index 7356a56ac458..be0ebce36e54 100644 --- a/drivers/serial/68328serial.c +++ b/drivers/serial/68328serial.c | |||
@@ -869,7 +869,9 @@ static int get_serial_info(struct m68k_serial * info, | |||
869 | tmp.close_delay = info->close_delay; | 869 | tmp.close_delay = info->close_delay; |
870 | tmp.closing_wait = info->closing_wait; | 870 | tmp.closing_wait = info->closing_wait; |
871 | tmp.custom_divisor = info->custom_divisor; | 871 | tmp.custom_divisor = info->custom_divisor; |
872 | copy_to_user(retinfo,&tmp,sizeof(*retinfo)); | 872 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) |
873 | return -EFAULT; | ||
874 | |||
873 | return 0; | 875 | return 0; |
874 | } | 876 | } |
875 | 877 | ||
@@ -882,7 +884,8 @@ static int set_serial_info(struct m68k_serial * info, | |||
882 | 884 | ||
883 | if (!new_info) | 885 | if (!new_info) |
884 | return -EFAULT; | 886 | return -EFAULT; |
885 | copy_from_user(&new_serial,new_info,sizeof(new_serial)); | 887 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) |
888 | return -EFAULT; | ||
886 | old_info = *info; | 889 | old_info = *info; |
887 | 890 | ||
888 | if (!capable(CAP_SYS_ADMIN)) { | 891 | if (!capable(CAP_SYS_ADMIN)) { |
@@ -943,8 +946,7 @@ static int get_lsr_info(struct m68k_serial * info, unsigned int *value) | |||
943 | status = 0; | 946 | status = 0; |
944 | #endif | 947 | #endif |
945 | local_irq_restore(flags); | 948 | local_irq_restore(flags); |
946 | put_user(status,value); | 949 | return put_user(status, value); |
947 | return 0; | ||
948 | } | 950 | } |
949 | 951 | ||
950 | /* | 952 | /* |
@@ -999,27 +1001,18 @@ static int rs_ioctl(struct tty_struct *tty, struct file * file, | |||
999 | send_break(info, arg ? arg*(100) : 250); | 1001 | send_break(info, arg ? arg*(100) : 250); |
1000 | return 0; | 1002 | return 0; |
1001 | case TIOCGSERIAL: | 1003 | case TIOCGSERIAL: |
1002 | if (access_ok(VERIFY_WRITE, (void *) arg, | 1004 | return get_serial_info(info, |
1003 | sizeof(struct serial_struct))) | 1005 | (struct serial_struct *) arg); |
1004 | return get_serial_info(info, | ||
1005 | (struct serial_struct *) arg); | ||
1006 | return -EFAULT; | ||
1007 | case TIOCSSERIAL: | 1006 | case TIOCSSERIAL: |
1008 | return set_serial_info(info, | 1007 | return set_serial_info(info, |
1009 | (struct serial_struct *) arg); | 1008 | (struct serial_struct *) arg); |
1010 | case TIOCSERGETLSR: /* Get line status register */ | 1009 | case TIOCSERGETLSR: /* Get line status register */ |
1011 | if (access_ok(VERIFY_WRITE, (void *) arg, | 1010 | return get_lsr_info(info, (unsigned int *) arg); |
1012 | sizeof(unsigned int))) | ||
1013 | return get_lsr_info(info, (unsigned int *) arg); | ||
1014 | return -EFAULT; | ||
1015 | case TIOCSERGSTRUCT: | 1011 | case TIOCSERGSTRUCT: |
1016 | if (!access_ok(VERIFY_WRITE, (void *) arg, | 1012 | if (copy_to_user((struct m68k_serial *) arg, |
1017 | sizeof(struct m68k_serial))) | 1013 | info, sizeof(struct m68k_serial))) |
1018 | return -EFAULT; | 1014 | return -EFAULT; |
1019 | copy_to_user((struct m68k_serial *) arg, | ||
1020 | info, sizeof(struct m68k_serial)); | ||
1021 | return 0; | 1015 | return 0; |
1022 | |||
1023 | default: | 1016 | default: |
1024 | return -ENOIOCTLCMD; | 1017 | return -ENOIOCTLCMD; |
1025 | } | 1018 | } |
diff --git a/drivers/serial/8250_early.c b/drivers/serial/8250_early.c index b745792ec25a..eaafb98debed 100644 --- a/drivers/serial/8250_early.c +++ b/drivers/serial/8250_early.c | |||
@@ -203,13 +203,13 @@ static int __init parse_options(struct early_serial8250_device *device, | |||
203 | 203 | ||
204 | if (mmio || mmio32) | 204 | if (mmio || mmio32) |
205 | printk(KERN_INFO | 205 | printk(KERN_INFO |
206 | "Early serial console at MMIO%s 0x%llu (options '%s')\n", | 206 | "Early serial console at MMIO%s 0x%llx (options '%s')\n", |
207 | mmio32 ? "32" : "", | 207 | mmio32 ? "32" : "", |
208 | (unsigned long long)port->mapbase, | 208 | (unsigned long long)port->mapbase, |
209 | device->options); | 209 | device->options); |
210 | else | 210 | else |
211 | printk(KERN_INFO | 211 | printk(KERN_INFO |
212 | "Early serial console at I/O port 0x%lu (options '%s')\n", | 212 | "Early serial console at I/O port 0x%lx (options '%s')\n", |
213 | port->iobase, | 213 | port->iobase, |
214 | device->options); | 214 | device->options); |
215 | 215 | ||
diff --git a/drivers/usb/gadget/composite.c b/drivers/usb/gadget/composite.c index e483f80822d2..1160c55de7f2 100644 --- a/drivers/usb/gadget/composite.c +++ b/drivers/usb/gadget/composite.c | |||
@@ -723,12 +723,12 @@ int usb_string_ids_tab(struct usb_composite_dev *cdev, struct usb_string *str) | |||
723 | 723 | ||
724 | /** | 724 | /** |
725 | * usb_string_ids_n() - allocate unused string IDs in batch | 725 | * usb_string_ids_n() - allocate unused string IDs in batch |
726 | * @cdev: the device whose string descriptor IDs are being allocated | 726 | * @c: the device whose string descriptor IDs are being allocated |
727 | * @n: number of string IDs to allocate | 727 | * @n: number of string IDs to allocate |
728 | * Context: single threaded during gadget setup | 728 | * Context: single threaded during gadget setup |
729 | * | 729 | * |
730 | * Returns the first requested ID. This ID and next @n-1 IDs are now | 730 | * Returns the first requested ID. This ID and next @n-1 IDs are now |
731 | * valid IDs. At least providind that @n is non zore because if it | 731 | * valid IDs. At least provided that @n is non-zero because if it |
732 | * is, returns last requested ID which is now very useful information. | 732 | * is, returns last requested ID which is now very useful information. |
733 | * | 733 | * |
734 | * @usb_string_ids_n() is called from bind() callbacks to allocate | 734 | * @usb_string_ids_n() is called from bind() callbacks to allocate |
diff --git a/drivers/usb/gadget/m66592-udc.c b/drivers/usb/gadget/m66592-udc.c index 166bf71fd348..e03058fe23cb 100644 --- a/drivers/usb/gadget/m66592-udc.c +++ b/drivers/usb/gadget/m66592-udc.c | |||
@@ -1609,6 +1609,7 @@ static int __init m66592_probe(struct platform_device *pdev) | |||
1609 | /* initialize ucd */ | 1609 | /* initialize ucd */ |
1610 | m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); | 1610 | m66592 = kzalloc(sizeof(struct m66592), GFP_KERNEL); |
1611 | if (m66592 == NULL) { | 1611 | if (m66592 == NULL) { |
1612 | ret = -ENOMEM; | ||
1612 | pr_err("kzalloc error\n"); | 1613 | pr_err("kzalloc error\n"); |
1613 | goto clean_up; | 1614 | goto clean_up; |
1614 | } | 1615 | } |
diff --git a/drivers/usb/gadget/r8a66597-udc.c b/drivers/usb/gadget/r8a66597-udc.c index 70a817842755..2456ccd9965e 100644 --- a/drivers/usb/gadget/r8a66597-udc.c +++ b/drivers/usb/gadget/r8a66597-udc.c | |||
@@ -1557,6 +1557,7 @@ static int __init r8a66597_probe(struct platform_device *pdev) | |||
1557 | /* initialize ucd */ | 1557 | /* initialize ucd */ |
1558 | r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); | 1558 | r8a66597 = kzalloc(sizeof(struct r8a66597), GFP_KERNEL); |
1559 | if (r8a66597 == NULL) { | 1559 | if (r8a66597 == NULL) { |
1560 | ret = -ENOMEM; | ||
1560 | printk(KERN_ERR "kzalloc error\n"); | 1561 | printk(KERN_ERR "kzalloc error\n"); |
1561 | goto clean_up; | 1562 | goto clean_up; |
1562 | } | 1563 | } |
diff --git a/drivers/usb/gadget/uvc_v4l2.c b/drivers/usb/gadget/uvc_v4l2.c index 2dcffdac86d2..5e807f083bc8 100644 --- a/drivers/usb/gadget/uvc_v4l2.c +++ b/drivers/usb/gadget/uvc_v4l2.c | |||
@@ -94,7 +94,7 @@ uvc_v4l2_set_format(struct uvc_video *video, struct v4l2_format *fmt) | |||
94 | break; | 94 | break; |
95 | } | 95 | } |
96 | 96 | ||
97 | if (format == NULL || format->fcc != fmt->fmt.pix.pixelformat) { | 97 | if (i == ARRAY_SIZE(uvc_formats)) { |
98 | printk(KERN_INFO "Unsupported format 0x%08x.\n", | 98 | printk(KERN_INFO "Unsupported format 0x%08x.\n", |
99 | fmt->fmt.pix.pixelformat); | 99 | fmt->fmt.pix.pixelformat); |
100 | return -EINVAL; | 100 | return -EINVAL; |
diff --git a/drivers/usb/host/isp1760-hcd.c b/drivers/usb/host/isp1760-hcd.c index d1a3dfc9a408..bdba8c5d844a 100644 --- a/drivers/usb/host/isp1760-hcd.c +++ b/drivers/usb/host/isp1760-hcd.c | |||
@@ -829,6 +829,7 @@ static void enqueue_an_ATL_packet(struct usb_hcd *hcd, struct isp1760_qh *qh, | |||
829 | * almost immediately. With ISP1761, this register requires a delay of | 829 | * almost immediately. With ISP1761, this register requires a delay of |
830 | * 195ns between a write and subsequent read (see section 15.1.1.3). | 830 | * 195ns between a write and subsequent read (see section 15.1.1.3). |
831 | */ | 831 | */ |
832 | mmiowb(); | ||
832 | ndelay(195); | 833 | ndelay(195); |
833 | skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG); | 834 | skip_map = isp1760_readl(hcd->regs + HC_ATL_PTD_SKIPMAP_REG); |
834 | 835 | ||
@@ -870,6 +871,7 @@ static void enqueue_an_INT_packet(struct usb_hcd *hcd, struct isp1760_qh *qh, | |||
870 | * almost immediately. With ISP1761, this register requires a delay of | 871 | * almost immediately. With ISP1761, this register requires a delay of |
871 | * 195ns between a write and subsequent read (see section 15.1.1.3). | 872 | * 195ns between a write and subsequent read (see section 15.1.1.3). |
872 | */ | 873 | */ |
874 | mmiowb(); | ||
873 | ndelay(195); | 875 | ndelay(195); |
874 | skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG); | 876 | skip_map = isp1760_readl(hcd->regs + HC_INT_PTD_SKIPMAP_REG); |
875 | 877 | ||
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c index bc3f4f427065..48e60d166ff0 100644 --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c | |||
@@ -131,7 +131,7 @@ static void next_trb(struct xhci_hcd *xhci, | |||
131 | *seg = (*seg)->next; | 131 | *seg = (*seg)->next; |
132 | *trb = ((*seg)->trbs); | 132 | *trb = ((*seg)->trbs); |
133 | } else { | 133 | } else { |
134 | *trb = (*trb)++; | 134 | (*trb)++; |
135 | } | 135 | } |
136 | } | 136 | } |
137 | 137 | ||
@@ -1551,6 +1551,10 @@ static int process_isoc_td(struct xhci_hcd *xhci, struct xhci_td *td, | |||
1551 | /* calc actual length */ | 1551 | /* calc actual length */ |
1552 | if (ep->skip) { | 1552 | if (ep->skip) { |
1553 | td->urb->iso_frame_desc[idx].actual_length = 0; | 1553 | td->urb->iso_frame_desc[idx].actual_length = 0; |
1554 | /* Update ring dequeue pointer */ | ||
1555 | while (ep_ring->dequeue != td->last_trb) | ||
1556 | inc_deq(xhci, ep_ring, false); | ||
1557 | inc_deq(xhci, ep_ring, false); | ||
1554 | return finish_td(xhci, td, event_trb, event, ep, status, true); | 1558 | return finish_td(xhci, td, event_trb, event, ep, status, true); |
1555 | } | 1559 | } |
1556 | 1560 | ||
diff --git a/drivers/usb/misc/adutux.c b/drivers/usb/misc/adutux.c index d240de097c62..801324af9470 100644 --- a/drivers/usb/misc/adutux.c +++ b/drivers/usb/misc/adutux.c | |||
@@ -439,7 +439,7 @@ static ssize_t adu_read(struct file *file, __user char *buffer, size_t count, | |||
439 | /* drain secondary buffer */ | 439 | /* drain secondary buffer */ |
440 | int amount = bytes_to_read < data_in_secondary ? bytes_to_read : data_in_secondary; | 440 | int amount = bytes_to_read < data_in_secondary ? bytes_to_read : data_in_secondary; |
441 | i = copy_to_user(buffer, dev->read_buffer_secondary+dev->secondary_head, amount); | 441 | i = copy_to_user(buffer, dev->read_buffer_secondary+dev->secondary_head, amount); |
442 | if (i < 0) { | 442 | if (i) { |
443 | retval = -EFAULT; | 443 | retval = -EFAULT; |
444 | goto exit; | 444 | goto exit; |
445 | } | 445 | } |
diff --git a/drivers/usb/misc/iowarrior.c b/drivers/usb/misc/iowarrior.c index 2de49c8887c5..bc88c79875a1 100644 --- a/drivers/usb/misc/iowarrior.c +++ b/drivers/usb/misc/iowarrior.c | |||
@@ -542,7 +542,7 @@ static long iowarrior_ioctl(struct file *file, unsigned int cmd, | |||
542 | retval = io_res; | 542 | retval = io_res; |
543 | else { | 543 | else { |
544 | io_res = copy_to_user(user_buffer, buffer, dev->report_size); | 544 | io_res = copy_to_user(user_buffer, buffer, dev->report_size); |
545 | if (io_res < 0) | 545 | if (io_res) |
546 | retval = -EFAULT; | 546 | retval = -EFAULT; |
547 | } | 547 | } |
548 | break; | 548 | break; |
@@ -574,7 +574,7 @@ static long iowarrior_ioctl(struct file *file, unsigned int cmd, | |||
574 | } | 574 | } |
575 | io_res = copy_to_user((struct iowarrior_info __user *)arg, &info, | 575 | io_res = copy_to_user((struct iowarrior_info __user *)arg, &info, |
576 | sizeof(struct iowarrior_info)); | 576 | sizeof(struct iowarrior_info)); |
577 | if (io_res < 0) | 577 | if (io_res) |
578 | retval = -EFAULT; | 578 | retval = -EFAULT; |
579 | break; | 579 | break; |
580 | } | 580 | } |
diff --git a/drivers/usb/otg/twl4030-usb.c b/drivers/usb/otg/twl4030-usb.c index 0e8888588d4e..05aaac1c3861 100644 --- a/drivers/usb/otg/twl4030-usb.c +++ b/drivers/usb/otg/twl4030-usb.c | |||
@@ -550,6 +550,7 @@ static int __devinit twl4030_usb_probe(struct platform_device *pdev) | |||
550 | struct twl4030_usb_data *pdata = pdev->dev.platform_data; | 550 | struct twl4030_usb_data *pdata = pdev->dev.platform_data; |
551 | struct twl4030_usb *twl; | 551 | struct twl4030_usb *twl; |
552 | int status, err; | 552 | int status, err; |
553 | u8 pwr; | ||
553 | 554 | ||
554 | if (!pdata) { | 555 | if (!pdata) { |
555 | dev_dbg(&pdev->dev, "platform_data not available\n"); | 556 | dev_dbg(&pdev->dev, "platform_data not available\n"); |
@@ -568,7 +569,10 @@ static int __devinit twl4030_usb_probe(struct platform_device *pdev) | |||
568 | twl->otg.set_peripheral = twl4030_set_peripheral; | 569 | twl->otg.set_peripheral = twl4030_set_peripheral; |
569 | twl->otg.set_suspend = twl4030_set_suspend; | 570 | twl->otg.set_suspend = twl4030_set_suspend; |
570 | twl->usb_mode = pdata->usb_mode; | 571 | twl->usb_mode = pdata->usb_mode; |
571 | twl->asleep = 1; | 572 | |
573 | pwr = twl4030_usb_read(twl, PHY_PWR_CTRL); | ||
574 | |||
575 | twl->asleep = (pwr & PHY_PWR_PHYPWD); | ||
572 | 576 | ||
573 | /* init spinlock for workqueue */ | 577 | /* init spinlock for workqueue */ |
574 | spin_lock_init(&twl->lock); | 578 | spin_lock_init(&twl->lock); |
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c index 2bef4415c19c..80bf8333bb03 100644 --- a/drivers/usb/serial/cp210x.c +++ b/drivers/usb/serial/cp210x.c | |||
@@ -222,8 +222,8 @@ static struct usb_serial_driver cp210x_device = { | |||
222 | #define BITS_STOP_2 0x0002 | 222 | #define BITS_STOP_2 0x0002 |
223 | 223 | ||
224 | /* CP210X_SET_BREAK */ | 224 | /* CP210X_SET_BREAK */ |
225 | #define BREAK_ON 0x0000 | 225 | #define BREAK_ON 0x0001 |
226 | #define BREAK_OFF 0x0001 | 226 | #define BREAK_OFF 0x0000 |
227 | 227 | ||
228 | /* CP210X_(SET_MHS|GET_MDMSTS) */ | 228 | /* CP210X_(SET_MHS|GET_MDMSTS) */ |
229 | #define CONTROL_DTR 0x0001 | 229 | #define CONTROL_DTR 0x0001 |
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c index eb12d9b096b4..63ddb2f65cee 100644 --- a/drivers/usb/serial/ftdi_sio.c +++ b/drivers/usb/serial/ftdi_sio.c | |||
@@ -180,6 +180,7 @@ static struct usb_device_id id_table_combined [] = { | |||
180 | { USB_DEVICE(INTERBIOMETRICS_VID, INTERBIOMETRICS_IOBOARD_PID) }, | 180 | { USB_DEVICE(INTERBIOMETRICS_VID, INTERBIOMETRICS_IOBOARD_PID) }, |
181 | { USB_DEVICE(INTERBIOMETRICS_VID, INTERBIOMETRICS_MINI_IOBOARD_PID) }, | 181 | { USB_DEVICE(INTERBIOMETRICS_VID, INTERBIOMETRICS_MINI_IOBOARD_PID) }, |
182 | { USB_DEVICE(FTDI_VID, FTDI_SPROG_II) }, | 182 | { USB_DEVICE(FTDI_VID, FTDI_SPROG_II) }, |
183 | { USB_DEVICE(FTDI_VID, FTDI_LENZ_LIUSB_PID) }, | ||
183 | { USB_DEVICE(FTDI_VID, FTDI_XF_632_PID) }, | 184 | { USB_DEVICE(FTDI_VID, FTDI_XF_632_PID) }, |
184 | { USB_DEVICE(FTDI_VID, FTDI_XF_634_PID) }, | 185 | { USB_DEVICE(FTDI_VID, FTDI_XF_634_PID) }, |
185 | { USB_DEVICE(FTDI_VID, FTDI_XF_547_PID) }, | 186 | { USB_DEVICE(FTDI_VID, FTDI_XF_547_PID) }, |
@@ -750,6 +751,8 @@ static struct usb_device_id id_table_combined [] = { | |||
750 | { USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SH4_PID), | 751 | { USB_DEVICE(FTDI_VID, XVERVE_SIGNALYZER_SH4_PID), |
751 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, | 752 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, |
752 | { USB_DEVICE(FTDI_VID, SEGWAY_RMP200_PID) }, | 753 | { USB_DEVICE(FTDI_VID, SEGWAY_RMP200_PID) }, |
754 | { USB_DEVICE(IONICS_VID, IONICS_PLUGCOMPUTER_PID), | ||
755 | .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, | ||
753 | { }, /* Optional parameter entry */ | 756 | { }, /* Optional parameter entry */ |
754 | { } /* Terminating entry */ | 757 | { } /* Terminating entry */ |
755 | }; | 758 | }; |
@@ -1376,7 +1379,7 @@ static void ftdi_set_max_packet_size(struct usb_serial_port *port) | |||
1376 | } | 1379 | } |
1377 | 1380 | ||
1378 | /* set max packet size based on descriptor */ | 1381 | /* set max packet size based on descriptor */ |
1379 | priv->max_packet_size = ep_desc->wMaxPacketSize; | 1382 | priv->max_packet_size = le16_to_cpu(ep_desc->wMaxPacketSize); |
1380 | 1383 | ||
1381 | dev_info(&udev->dev, "Setting MaxPacketSize %d\n", priv->max_packet_size); | 1384 | dev_info(&udev->dev, "Setting MaxPacketSize %d\n", priv->max_packet_size); |
1382 | } | 1385 | } |
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h index 6e612c52e763..2e95857c9633 100644 --- a/drivers/usb/serial/ftdi_sio_ids.h +++ b/drivers/usb/serial/ftdi_sio_ids.h | |||
@@ -110,6 +110,9 @@ | |||
110 | /* Propox devices */ | 110 | /* Propox devices */ |
111 | #define FTDI_PROPOX_JTAGCABLEII_PID 0xD738 | 111 | #define FTDI_PROPOX_JTAGCABLEII_PID 0xD738 |
112 | 112 | ||
113 | /* Lenz LI-USB Computer Interface. */ | ||
114 | #define FTDI_LENZ_LIUSB_PID 0xD780 | ||
115 | |||
113 | /* | 116 | /* |
114 | * Xsens Technologies BV products (http://www.xsens.com). | 117 | * Xsens Technologies BV products (http://www.xsens.com). |
115 | */ | 118 | */ |
@@ -989,6 +992,12 @@ | |||
989 | #define ALTI2_N3_PID 0x6001 /* Neptune 3 */ | 992 | #define ALTI2_N3_PID 0x6001 /* Neptune 3 */ |
990 | 993 | ||
991 | /* | 994 | /* |
995 | * Ionics PlugComputer | ||
996 | */ | ||
997 | #define IONICS_VID 0x1c0c | ||
998 | #define IONICS_PLUGCOMPUTER_PID 0x0102 | ||
999 | |||
1000 | /* | ||
992 | * Dresden Elektronik Sensor Terminal Board | 1001 | * Dresden Elektronik Sensor Terminal Board |
993 | */ | 1002 | */ |
994 | #define DE_VID 0x1cf1 /* Vendor ID */ | 1003 | #define DE_VID 0x1cf1 /* Vendor ID */ |
diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c index ca92f67747cc..0b1a13384c6d 100644 --- a/drivers/usb/serial/generic.c +++ b/drivers/usb/serial/generic.c | |||
@@ -518,6 +518,7 @@ void usb_serial_generic_disconnect(struct usb_serial *serial) | |||
518 | for (i = 0; i < serial->num_ports; ++i) | 518 | for (i = 0; i < serial->num_ports; ++i) |
519 | generic_cleanup(serial->port[i]); | 519 | generic_cleanup(serial->port[i]); |
520 | } | 520 | } |
521 | EXPORT_SYMBOL_GPL(usb_serial_generic_disconnect); | ||
521 | 522 | ||
522 | void usb_serial_generic_release(struct usb_serial *serial) | 523 | void usb_serial_generic_release(struct usb_serial *serial) |
523 | { | 524 | { |
diff --git a/drivers/usb/serial/io_ti.c b/drivers/usb/serial/io_ti.c index dc47f986df57..a7cfc5952937 100644 --- a/drivers/usb/serial/io_ti.c +++ b/drivers/usb/serial/io_ti.c | |||
@@ -1151,7 +1151,7 @@ static int download_fw(struct edgeport_serial *serial) | |||
1151 | 1151 | ||
1152 | /* Check if we have an old version in the I2C and | 1152 | /* Check if we have an old version in the I2C and |
1153 | update if necessary */ | 1153 | update if necessary */ |
1154 | if (download_cur_ver != download_new_ver) { | 1154 | if (download_cur_ver < download_new_ver) { |
1155 | dbg("%s - Update I2C dld from %d.%d to %d.%d", | 1155 | dbg("%s - Update I2C dld from %d.%d to %d.%d", |
1156 | __func__, | 1156 | __func__, |
1157 | firmware_version->Ver_Major, | 1157 | firmware_version->Ver_Major, |
@@ -1284,7 +1284,7 @@ static int download_fw(struct edgeport_serial *serial) | |||
1284 | kfree(header); | 1284 | kfree(header); |
1285 | kfree(rom_desc); | 1285 | kfree(rom_desc); |
1286 | kfree(ti_manuf_desc); | 1286 | kfree(ti_manuf_desc); |
1287 | return status; | 1287 | return -EINVAL; |
1288 | } | 1288 | } |
1289 | 1289 | ||
1290 | /* Update I2C with type 0xf2 record with correct | 1290 | /* Update I2C with type 0xf2 record with correct |
diff --git a/drivers/usb/serial/navman.c b/drivers/usb/serial/navman.c index a6b207c84917..1f00f243c26c 100644 --- a/drivers/usb/serial/navman.c +++ b/drivers/usb/serial/navman.c | |||
@@ -25,6 +25,7 @@ static int debug; | |||
25 | 25 | ||
26 | static const struct usb_device_id id_table[] = { | 26 | static const struct usb_device_id id_table[] = { |
27 | { USB_DEVICE(0x0a99, 0x0001) }, /* Talon Technology device */ | 27 | { USB_DEVICE(0x0a99, 0x0001) }, /* Talon Technology device */ |
28 | { USB_DEVICE(0x0df7, 0x0900) }, /* Mobile Action i-gotU */ | ||
28 | { }, | 29 | { }, |
29 | }; | 30 | }; |
30 | MODULE_DEVICE_TABLE(usb, id_table); | 31 | MODULE_DEVICE_TABLE(usb, id_table); |
diff --git a/drivers/usb/serial/option.c b/drivers/usb/serial/option.c index 9fc6ea2c681f..adcbdb994de3 100644 --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c | |||
@@ -365,6 +365,10 @@ static void option_instat_callback(struct urb *urb); | |||
365 | #define OLIVETTI_VENDOR_ID 0x0b3c | 365 | #define OLIVETTI_VENDOR_ID 0x0b3c |
366 | #define OLIVETTI_PRODUCT_OLICARD100 0xc000 | 366 | #define OLIVETTI_PRODUCT_OLICARD100 0xc000 |
367 | 367 | ||
368 | /* Celot products */ | ||
369 | #define CELOT_VENDOR_ID 0x211f | ||
370 | #define CELOT_PRODUCT_CT680M 0x6801 | ||
371 | |||
368 | /* some devices interfaces need special handling due to a number of reasons */ | 372 | /* some devices interfaces need special handling due to a number of reasons */ |
369 | enum option_blacklist_reason { | 373 | enum option_blacklist_reason { |
370 | OPTION_BLACKLIST_NONE = 0, | 374 | OPTION_BLACKLIST_NONE = 0, |
@@ -887,10 +891,9 @@ static const struct usb_device_id option_ids[] = { | |||
887 | { USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_100F) }, | 891 | { USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_100F) }, |
888 | { USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1011)}, | 892 | { USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1011)}, |
889 | { USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1012)}, | 893 | { USB_DEVICE(PIRELLI_VENDOR_ID, PIRELLI_PRODUCT_1012)}, |
890 | |||
891 | { USB_DEVICE(CINTERION_VENDOR_ID, 0x0047) }, | 894 | { USB_DEVICE(CINTERION_VENDOR_ID, 0x0047) }, |
892 | |||
893 | { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100) }, | 895 | { USB_DEVICE(OLIVETTI_VENDOR_ID, OLIVETTI_PRODUCT_OLICARD100) }, |
896 | { USB_DEVICE(CELOT_VENDOR_ID, CELOT_PRODUCT_CT680M) }, /* CT-650 CDMA 450 1xEVDO modem */ | ||
894 | { } /* Terminating entry */ | 897 | { } /* Terminating entry */ |
895 | }; | 898 | }; |
896 | MODULE_DEVICE_TABLE(usb, option_ids); | 899 | MODULE_DEVICE_TABLE(usb, option_ids); |
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c index 6b6001822279..c98f0fb675ba 100644 --- a/drivers/usb/serial/pl2303.c +++ b/drivers/usb/serial/pl2303.c | |||
@@ -86,6 +86,7 @@ static const struct usb_device_id id_table[] = { | |||
86 | { USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) }, | 86 | { USB_DEVICE(SUPERIAL_VENDOR_ID, SUPERIAL_PRODUCT_ID) }, |
87 | { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) }, | 87 | { USB_DEVICE(HP_VENDOR_ID, HP_LD220_PRODUCT_ID) }, |
88 | { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) }, | 88 | { USB_DEVICE(CRESSI_VENDOR_ID, CRESSI_EDY_PRODUCT_ID) }, |
89 | { USB_DEVICE(ZEAGLE_VENDOR_ID, ZEAGLE_N2ITION3_PRODUCT_ID) }, | ||
89 | { USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) }, | 90 | { USB_DEVICE(SONY_VENDOR_ID, SONY_QN3USB_PRODUCT_ID) }, |
90 | { USB_DEVICE(SANWA_VENDOR_ID, SANWA_PRODUCT_ID) }, | 91 | { USB_DEVICE(SANWA_VENDOR_ID, SANWA_PRODUCT_ID) }, |
91 | { USB_DEVICE(ADLINK_VENDOR_ID, ADLINK_ND6530_PRODUCT_ID) }, | 92 | { USB_DEVICE(ADLINK_VENDOR_ID, ADLINK_ND6530_PRODUCT_ID) }, |
diff --git a/drivers/usb/serial/pl2303.h b/drivers/usb/serial/pl2303.h index a871645389dd..43eb9bdad422 100644 --- a/drivers/usb/serial/pl2303.h +++ b/drivers/usb/serial/pl2303.h | |||
@@ -128,6 +128,10 @@ | |||
128 | #define CRESSI_VENDOR_ID 0x04b8 | 128 | #define CRESSI_VENDOR_ID 0x04b8 |
129 | #define CRESSI_EDY_PRODUCT_ID 0x0521 | 129 | #define CRESSI_EDY_PRODUCT_ID 0x0521 |
130 | 130 | ||
131 | /* Zeagle dive computer interface */ | ||
132 | #define ZEAGLE_VENDOR_ID 0x04b8 | ||
133 | #define ZEAGLE_N2ITION3_PRODUCT_ID 0x0522 | ||
134 | |||
131 | /* Sony, USB data cable for CMD-Jxx mobile phones */ | 135 | /* Sony, USB data cable for CMD-Jxx mobile phones */ |
132 | #define SONY_VENDOR_ID 0x054c | 136 | #define SONY_VENDOR_ID 0x054c |
133 | #define SONY_QN3USB_PRODUCT_ID 0x0437 | 137 | #define SONY_QN3USB_PRODUCT_ID 0x0437 |
diff --git a/drivers/usb/serial/ssu100.c b/drivers/usb/serial/ssu100.c index 6e82d4f54bc8..660c31f14999 100644 --- a/drivers/usb/serial/ssu100.c +++ b/drivers/usb/serial/ssu100.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/serial.h> | 15 | #include <linux/serial.h> |
16 | #include <linux/usb.h> | 16 | #include <linux/usb.h> |
17 | #include <linux/usb/serial.h> | 17 | #include <linux/usb/serial.h> |
18 | #include <linux/serial_reg.h> | ||
18 | #include <linux/uaccess.h> | 19 | #include <linux/uaccess.h> |
19 | 20 | ||
20 | #define QT_OPEN_CLOSE_CHANNEL 0xca | 21 | #define QT_OPEN_CLOSE_CHANNEL 0xca |
@@ -27,36 +28,11 @@ | |||
27 | #define QT_HW_FLOW_CONTROL_MASK 0xc5 | 28 | #define QT_HW_FLOW_CONTROL_MASK 0xc5 |
28 | #define QT_SW_FLOW_CONTROL_MASK 0xc6 | 29 | #define QT_SW_FLOW_CONTROL_MASK 0xc6 |
29 | 30 | ||
30 | #define MODEM_CTL_REGISTER 0x04 | ||
31 | #define MODEM_STATUS_REGISTER 0x06 | ||
32 | |||
33 | |||
34 | #define SERIAL_LSR_OE 0x02 | ||
35 | #define SERIAL_LSR_PE 0x04 | ||
36 | #define SERIAL_LSR_FE 0x08 | ||
37 | #define SERIAL_LSR_BI 0x10 | ||
38 | |||
39 | #define SERIAL_LSR_TEMT 0x40 | ||
40 | |||
41 | #define SERIAL_MCR_DTR 0x01 | ||
42 | #define SERIAL_MCR_RTS 0x02 | ||
43 | #define SERIAL_MCR_LOOP 0x10 | ||
44 | |||
45 | #define SERIAL_MSR_CTS 0x10 | ||
46 | #define SERIAL_MSR_CD 0x80 | ||
47 | #define SERIAL_MSR_RI 0x40 | ||
48 | #define SERIAL_MSR_DSR 0x20 | ||
49 | #define SERIAL_MSR_MASK 0xf0 | 31 | #define SERIAL_MSR_MASK 0xf0 |
50 | 32 | ||
51 | #define SERIAL_CRTSCTS ((SERIAL_MCR_RTS << 8) | SERIAL_MSR_CTS) | 33 | #define SERIAL_CRTSCTS ((UART_MCR_RTS << 8) | UART_MSR_CTS) |
52 | 34 | ||
53 | #define SERIAL_8_DATA 0x03 | 35 | #define SERIAL_EVEN_PARITY (UART_LCR_PARITY | UART_LCR_EPAR) |
54 | #define SERIAL_7_DATA 0x02 | ||
55 | #define SERIAL_6_DATA 0x01 | ||
56 | #define SERIAL_5_DATA 0x00 | ||
57 | |||
58 | #define SERIAL_ODD_PARITY 0X08 | ||
59 | #define SERIAL_EVEN_PARITY 0X18 | ||
60 | 36 | ||
61 | #define MAX_BAUD_RATE 460800 | 37 | #define MAX_BAUD_RATE 460800 |
62 | 38 | ||
@@ -99,10 +75,12 @@ static struct usb_driver ssu100_driver = { | |||
99 | }; | 75 | }; |
100 | 76 | ||
101 | struct ssu100_port_private { | 77 | struct ssu100_port_private { |
78 | spinlock_t status_lock; | ||
102 | u8 shadowLSR; | 79 | u8 shadowLSR; |
103 | u8 shadowMSR; | 80 | u8 shadowMSR; |
104 | wait_queue_head_t delta_msr_wait; /* Used for TIOCMIWAIT */ | 81 | wait_queue_head_t delta_msr_wait; /* Used for TIOCMIWAIT */ |
105 | unsigned short max_packet_size; | 82 | unsigned short max_packet_size; |
83 | struct async_icount icount; | ||
106 | }; | 84 | }; |
107 | 85 | ||
108 | static void ssu100_release(struct usb_serial *serial) | 86 | static void ssu100_release(struct usb_serial *serial) |
@@ -150,9 +128,10 @@ static inline int ssu100_getregister(struct usb_device *dev, | |||
150 | 128 | ||
151 | static inline int ssu100_setregister(struct usb_device *dev, | 129 | static inline int ssu100_setregister(struct usb_device *dev, |
152 | unsigned short uart, | 130 | unsigned short uart, |
131 | unsigned short reg, | ||
153 | u16 data) | 132 | u16 data) |
154 | { | 133 | { |
155 | u16 value = (data << 8) | MODEM_CTL_REGISTER; | 134 | u16 value = (data << 8) | reg; |
156 | 135 | ||
157 | return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), | 136 | return usb_control_msg(dev, usb_sndctrlpipe(dev, 0), |
158 | QT_SET_GET_REGISTER, 0x40, value, uart, | 137 | QT_SET_GET_REGISTER, 0x40, value, uart, |
@@ -178,11 +157,11 @@ static inline int update_mctrl(struct usb_device *dev, unsigned int set, | |||
178 | clear &= ~set; /* 'set' takes precedence over 'clear' */ | 157 | clear &= ~set; /* 'set' takes precedence over 'clear' */ |
179 | urb_value = 0; | 158 | urb_value = 0; |
180 | if (set & TIOCM_DTR) | 159 | if (set & TIOCM_DTR) |
181 | urb_value |= SERIAL_MCR_DTR; | 160 | urb_value |= UART_MCR_DTR; |
182 | if (set & TIOCM_RTS) | 161 | if (set & TIOCM_RTS) |
183 | urb_value |= SERIAL_MCR_RTS; | 162 | urb_value |= UART_MCR_RTS; |
184 | 163 | ||
185 | result = ssu100_setregister(dev, 0, urb_value); | 164 | result = ssu100_setregister(dev, 0, UART_MCR, urb_value); |
186 | if (result < 0) | 165 | if (result < 0) |
187 | dbg("%s Error from MODEM_CTRL urb", __func__); | 166 | dbg("%s Error from MODEM_CTRL urb", __func__); |
188 | 167 | ||
@@ -264,24 +243,24 @@ static void ssu100_set_termios(struct tty_struct *tty, | |||
264 | 243 | ||
265 | if (cflag & PARENB) { | 244 | if (cflag & PARENB) { |
266 | if (cflag & PARODD) | 245 | if (cflag & PARODD) |
267 | urb_value |= SERIAL_ODD_PARITY; | 246 | urb_value |= UART_LCR_PARITY; |
268 | else | 247 | else |
269 | urb_value |= SERIAL_EVEN_PARITY; | 248 | urb_value |= SERIAL_EVEN_PARITY; |
270 | } | 249 | } |
271 | 250 | ||
272 | switch (cflag & CSIZE) { | 251 | switch (cflag & CSIZE) { |
273 | case CS5: | 252 | case CS5: |
274 | urb_value |= SERIAL_5_DATA; | 253 | urb_value |= UART_LCR_WLEN5; |
275 | break; | 254 | break; |
276 | case CS6: | 255 | case CS6: |
277 | urb_value |= SERIAL_6_DATA; | 256 | urb_value |= UART_LCR_WLEN6; |
278 | break; | 257 | break; |
279 | case CS7: | 258 | case CS7: |
280 | urb_value |= SERIAL_7_DATA; | 259 | urb_value |= UART_LCR_WLEN7; |
281 | break; | 260 | break; |
282 | default: | 261 | default: |
283 | case CS8: | 262 | case CS8: |
284 | urb_value |= SERIAL_8_DATA; | 263 | urb_value |= UART_LCR_WLEN8; |
285 | break; | 264 | break; |
286 | } | 265 | } |
287 | 266 | ||
@@ -333,6 +312,7 @@ static int ssu100_open(struct tty_struct *tty, struct usb_serial_port *port) | |||
333 | struct ssu100_port_private *priv = usb_get_serial_port_data(port); | 312 | struct ssu100_port_private *priv = usb_get_serial_port_data(port); |
334 | u8 *data; | 313 | u8 *data; |
335 | int result; | 314 | int result; |
315 | unsigned long flags; | ||
336 | 316 | ||
337 | dbg("%s - port %d", __func__, port->number); | 317 | dbg("%s - port %d", __func__, port->number); |
338 | 318 | ||
@@ -350,11 +330,10 @@ static int ssu100_open(struct tty_struct *tty, struct usb_serial_port *port) | |||
350 | return result; | 330 | return result; |
351 | } | 331 | } |
352 | 332 | ||
353 | priv->shadowLSR = data[0] & (SERIAL_LSR_OE | SERIAL_LSR_PE | | 333 | spin_lock_irqsave(&priv->status_lock, flags); |
354 | SERIAL_LSR_FE | SERIAL_LSR_BI); | 334 | priv->shadowLSR = data[0]; |
355 | 335 | priv->shadowMSR = data[1]; | |
356 | priv->shadowMSR = data[1] & (SERIAL_MSR_CTS | SERIAL_MSR_DSR | | 336 | spin_unlock_irqrestore(&priv->status_lock, flags); |
357 | SERIAL_MSR_RI | SERIAL_MSR_CD); | ||
358 | 337 | ||
359 | kfree(data); | 338 | kfree(data); |
360 | 339 | ||
@@ -398,11 +377,51 @@ static int get_serial_info(struct usb_serial_port *port, | |||
398 | return 0; | 377 | return 0; |
399 | } | 378 | } |
400 | 379 | ||
380 | static int wait_modem_info(struct usb_serial_port *port, unsigned int arg) | ||
381 | { | ||
382 | struct ssu100_port_private *priv = usb_get_serial_port_data(port); | ||
383 | struct async_icount prev, cur; | ||
384 | unsigned long flags; | ||
385 | |||
386 | spin_lock_irqsave(&priv->status_lock, flags); | ||
387 | prev = priv->icount; | ||
388 | spin_unlock_irqrestore(&priv->status_lock, flags); | ||
389 | |||
390 | while (1) { | ||
391 | wait_event_interruptible(priv->delta_msr_wait, | ||
392 | ((priv->icount.rng != prev.rng) || | ||
393 | (priv->icount.dsr != prev.dsr) || | ||
394 | (priv->icount.dcd != prev.dcd) || | ||
395 | (priv->icount.cts != prev.cts))); | ||
396 | |||
397 | if (signal_pending(current)) | ||
398 | return -ERESTARTSYS; | ||
399 | |||
400 | spin_lock_irqsave(&priv->status_lock, flags); | ||
401 | cur = priv->icount; | ||
402 | spin_unlock_irqrestore(&priv->status_lock, flags); | ||
403 | |||
404 | if ((prev.rng == cur.rng) && | ||
405 | (prev.dsr == cur.dsr) && | ||
406 | (prev.dcd == cur.dcd) && | ||
407 | (prev.cts == cur.cts)) | ||
408 | return -EIO; | ||
409 | |||
410 | if ((arg & TIOCM_RNG && (prev.rng != cur.rng)) || | ||
411 | (arg & TIOCM_DSR && (prev.dsr != cur.dsr)) || | ||
412 | (arg & TIOCM_CD && (prev.dcd != cur.dcd)) || | ||
413 | (arg & TIOCM_CTS && (prev.cts != cur.cts))) | ||
414 | return 0; | ||
415 | } | ||
416 | return 0; | ||
417 | } | ||
418 | |||
401 | static int ssu100_ioctl(struct tty_struct *tty, struct file *file, | 419 | static int ssu100_ioctl(struct tty_struct *tty, struct file *file, |
402 | unsigned int cmd, unsigned long arg) | 420 | unsigned int cmd, unsigned long arg) |
403 | { | 421 | { |
404 | struct usb_serial_port *port = tty->driver_data; | 422 | struct usb_serial_port *port = tty->driver_data; |
405 | struct ssu100_port_private *priv = usb_get_serial_port_data(port); | 423 | struct ssu100_port_private *priv = usb_get_serial_port_data(port); |
424 | void __user *user_arg = (void __user *)arg; | ||
406 | 425 | ||
407 | dbg("%s cmd 0x%04x", __func__, cmd); | 426 | dbg("%s cmd 0x%04x", __func__, cmd); |
408 | 427 | ||
@@ -412,28 +431,28 @@ static int ssu100_ioctl(struct tty_struct *tty, struct file *file, | |||
412 | (struct serial_struct __user *) arg); | 431 | (struct serial_struct __user *) arg); |
413 | 432 | ||
414 | case TIOCMIWAIT: | 433 | case TIOCMIWAIT: |
415 | while (priv != NULL) { | 434 | return wait_modem_info(port, arg); |
416 | u8 prevMSR = priv->shadowMSR & SERIAL_MSR_MASK; | 435 | |
417 | interruptible_sleep_on(&priv->delta_msr_wait); | 436 | case TIOCGICOUNT: |
418 | /* see if a signal did it */ | 437 | { |
419 | if (signal_pending(current)) | 438 | struct serial_icounter_struct icount; |
420 | return -ERESTARTSYS; | 439 | struct async_icount cnow = priv->icount; |
421 | else { | 440 | memset(&icount, 0, sizeof(icount)); |
422 | u8 diff = (priv->shadowMSR & SERIAL_MSR_MASK) ^ prevMSR; | 441 | icount.cts = cnow.cts; |
423 | if (!diff) | 442 | icount.dsr = cnow.dsr; |
424 | return -EIO; /* no change => error */ | 443 | icount.rng = cnow.rng; |
425 | 444 | icount.dcd = cnow.dcd; | |
426 | /* Return 0 if caller wanted to know about | 445 | icount.rx = cnow.rx; |
427 | these bits */ | 446 | icount.tx = cnow.tx; |
428 | 447 | icount.frame = cnow.frame; | |
429 | if (((arg & TIOCM_RNG) && (diff & SERIAL_MSR_RI)) || | 448 | icount.overrun = cnow.overrun; |
430 | ((arg & TIOCM_DSR) && (diff & SERIAL_MSR_DSR)) || | 449 | icount.parity = cnow.parity; |
431 | ((arg & TIOCM_CD) && (diff & SERIAL_MSR_CD)) || | 450 | icount.brk = cnow.brk; |
432 | ((arg & TIOCM_CTS) && (diff & SERIAL_MSR_CTS))) | 451 | icount.buf_overrun = cnow.buf_overrun; |
433 | return 0; | 452 | if (copy_to_user(user_arg, &icount, sizeof(icount))) |
434 | } | 453 | return -EFAULT; |
435 | } | ||
436 | return 0; | 454 | return 0; |
455 | } | ||
437 | 456 | ||
438 | default: | 457 | default: |
439 | break; | 458 | break; |
@@ -455,6 +474,7 @@ static void ssu100_set_max_packet_size(struct usb_serial_port *port) | |||
455 | 474 | ||
456 | unsigned num_endpoints; | 475 | unsigned num_endpoints; |
457 | int i; | 476 | int i; |
477 | unsigned long flags; | ||
458 | 478 | ||
459 | num_endpoints = interface->cur_altsetting->desc.bNumEndpoints; | 479 | num_endpoints = interface->cur_altsetting->desc.bNumEndpoints; |
460 | dev_info(&udev->dev, "Number of endpoints %d\n", num_endpoints); | 480 | dev_info(&udev->dev, "Number of endpoints %d\n", num_endpoints); |
@@ -466,7 +486,9 @@ static void ssu100_set_max_packet_size(struct usb_serial_port *port) | |||
466 | } | 486 | } |
467 | 487 | ||
468 | /* set max packet size based on descriptor */ | 488 | /* set max packet size based on descriptor */ |
489 | spin_lock_irqsave(&priv->status_lock, flags); | ||
469 | priv->max_packet_size = ep_desc->wMaxPacketSize; | 490 | priv->max_packet_size = ep_desc->wMaxPacketSize; |
491 | spin_unlock_irqrestore(&priv->status_lock, flags); | ||
470 | 492 | ||
471 | dev_info(&udev->dev, "Setting MaxPacketSize %d\n", priv->max_packet_size); | 493 | dev_info(&udev->dev, "Setting MaxPacketSize %d\n", priv->max_packet_size); |
472 | } | 494 | } |
@@ -485,9 +507,9 @@ static int ssu100_attach(struct usb_serial *serial) | |||
485 | return -ENOMEM; | 507 | return -ENOMEM; |
486 | } | 508 | } |
487 | 509 | ||
510 | spin_lock_init(&priv->status_lock); | ||
488 | init_waitqueue_head(&priv->delta_msr_wait); | 511 | init_waitqueue_head(&priv->delta_msr_wait); |
489 | usb_set_serial_port_data(port, priv); | 512 | usb_set_serial_port_data(port, priv); |
490 | |||
491 | ssu100_set_max_packet_size(port); | 513 | ssu100_set_max_packet_size(port); |
492 | 514 | ||
493 | return ssu100_initdevice(serial->dev); | 515 | return ssu100_initdevice(serial->dev); |
@@ -506,20 +528,20 @@ static int ssu100_tiocmget(struct tty_struct *tty, struct file *file) | |||
506 | if (!d) | 528 | if (!d) |
507 | return -ENOMEM; | 529 | return -ENOMEM; |
508 | 530 | ||
509 | r = ssu100_getregister(dev, 0, MODEM_CTL_REGISTER, d); | 531 | r = ssu100_getregister(dev, 0, UART_MCR, d); |
510 | if (r < 0) | 532 | if (r < 0) |
511 | goto mget_out; | 533 | goto mget_out; |
512 | 534 | ||
513 | r = ssu100_getregister(dev, 0, MODEM_STATUS_REGISTER, d+1); | 535 | r = ssu100_getregister(dev, 0, UART_MSR, d+1); |
514 | if (r < 0) | 536 | if (r < 0) |
515 | goto mget_out; | 537 | goto mget_out; |
516 | 538 | ||
517 | r = (d[0] & SERIAL_MCR_DTR ? TIOCM_DTR : 0) | | 539 | r = (d[0] & UART_MCR_DTR ? TIOCM_DTR : 0) | |
518 | (d[0] & SERIAL_MCR_RTS ? TIOCM_RTS : 0) | | 540 | (d[0] & UART_MCR_RTS ? TIOCM_RTS : 0) | |
519 | (d[1] & SERIAL_MSR_CTS ? TIOCM_CTS : 0) | | 541 | (d[1] & UART_MSR_CTS ? TIOCM_CTS : 0) | |
520 | (d[1] & SERIAL_MSR_CD ? TIOCM_CAR : 0) | | 542 | (d[1] & UART_MSR_DCD ? TIOCM_CAR : 0) | |
521 | (d[1] & SERIAL_MSR_RI ? TIOCM_RI : 0) | | 543 | (d[1] & UART_MSR_RI ? TIOCM_RI : 0) | |
522 | (d[1] & SERIAL_MSR_DSR ? TIOCM_DSR : 0); | 544 | (d[1] & UART_MSR_DSR ? TIOCM_DSR : 0); |
523 | 545 | ||
524 | mget_out: | 546 | mget_out: |
525 | kfree(d); | 547 | kfree(d); |
@@ -546,7 +568,7 @@ static void ssu100_dtr_rts(struct usb_serial_port *port, int on) | |||
546 | if (!port->serial->disconnected) { | 568 | if (!port->serial->disconnected) { |
547 | /* Disable flow control */ | 569 | /* Disable flow control */ |
548 | if (!on && | 570 | if (!on && |
549 | ssu100_setregister(dev, 0, 0) < 0) | 571 | ssu100_setregister(dev, 0, UART_MCR, 0) < 0) |
550 | dev_err(&port->dev, "error from flowcontrol urb\n"); | 572 | dev_err(&port->dev, "error from flowcontrol urb\n"); |
551 | /* drop RTS and DTR */ | 573 | /* drop RTS and DTR */ |
552 | if (on) | 574 | if (on) |
@@ -557,34 +579,88 @@ static void ssu100_dtr_rts(struct usb_serial_port *port, int on) | |||
557 | mutex_unlock(&port->serial->disc_mutex); | 579 | mutex_unlock(&port->serial->disc_mutex); |
558 | } | 580 | } |
559 | 581 | ||
582 | static void ssu100_update_msr(struct usb_serial_port *port, u8 msr) | ||
583 | { | ||
584 | struct ssu100_port_private *priv = usb_get_serial_port_data(port); | ||
585 | unsigned long flags; | ||
586 | |||
587 | spin_lock_irqsave(&priv->status_lock, flags); | ||
588 | priv->shadowMSR = msr; | ||
589 | spin_unlock_irqrestore(&priv->status_lock, flags); | ||
590 | |||
591 | if (msr & UART_MSR_ANY_DELTA) { | ||
592 | /* update input line counters */ | ||
593 | if (msr & UART_MSR_DCTS) | ||
594 | priv->icount.cts++; | ||
595 | if (msr & UART_MSR_DDSR) | ||
596 | priv->icount.dsr++; | ||
597 | if (msr & UART_MSR_DDCD) | ||
598 | priv->icount.dcd++; | ||
599 | if (msr & UART_MSR_TERI) | ||
600 | priv->icount.rng++; | ||
601 | wake_up_interruptible(&priv->delta_msr_wait); | ||
602 | } | ||
603 | } | ||
604 | |||
605 | static void ssu100_update_lsr(struct usb_serial_port *port, u8 lsr, | ||
606 | char *tty_flag) | ||
607 | { | ||
608 | struct ssu100_port_private *priv = usb_get_serial_port_data(port); | ||
609 | unsigned long flags; | ||
610 | |||
611 | spin_lock_irqsave(&priv->status_lock, flags); | ||
612 | priv->shadowLSR = lsr; | ||
613 | spin_unlock_irqrestore(&priv->status_lock, flags); | ||
614 | |||
615 | *tty_flag = TTY_NORMAL; | ||
616 | if (lsr & UART_LSR_BRK_ERROR_BITS) { | ||
617 | /* we always want to update icount, but we only want to | ||
618 | * update tty_flag for one case */ | ||
619 | if (lsr & UART_LSR_BI) { | ||
620 | priv->icount.brk++; | ||
621 | *tty_flag = TTY_BREAK; | ||
622 | usb_serial_handle_break(port); | ||
623 | } | ||
624 | if (lsr & UART_LSR_PE) { | ||
625 | priv->icount.parity++; | ||
626 | if (*tty_flag == TTY_NORMAL) | ||
627 | *tty_flag = TTY_PARITY; | ||
628 | } | ||
629 | if (lsr & UART_LSR_FE) { | ||
630 | priv->icount.frame++; | ||
631 | if (*tty_flag == TTY_NORMAL) | ||
632 | *tty_flag = TTY_FRAME; | ||
633 | } | ||
634 | if (lsr & UART_LSR_OE){ | ||
635 | priv->icount.overrun++; | ||
636 | if (*tty_flag == TTY_NORMAL) | ||
637 | *tty_flag = TTY_OVERRUN; | ||
638 | } | ||
639 | } | ||
640 | |||
641 | } | ||
642 | |||
560 | static int ssu100_process_packet(struct tty_struct *tty, | 643 | static int ssu100_process_packet(struct tty_struct *tty, |
561 | struct usb_serial_port *port, | 644 | struct usb_serial_port *port, |
562 | struct ssu100_port_private *priv, | 645 | struct ssu100_port_private *priv, |
563 | char *packet, int len) | 646 | char *packet, int len) |
564 | { | 647 | { |
565 | int i; | 648 | int i; |
566 | char flag; | 649 | char flag = TTY_NORMAL; |
567 | char *ch; | 650 | char *ch; |
568 | 651 | ||
569 | dbg("%s - port %d", __func__, port->number); | 652 | dbg("%s - port %d", __func__, port->number); |
570 | 653 | ||
571 | if (len < 4) { | 654 | if ((len >= 4) && |
572 | dbg("%s - malformed packet", __func__); | 655 | (packet[0] == 0x1b) && (packet[1] == 0x1b) && |
573 | return 0; | ||
574 | } | ||
575 | |||
576 | if ((packet[0] == 0x1b) && (packet[1] == 0x1b) && | ||
577 | ((packet[2] == 0x00) || (packet[2] == 0x01))) { | 656 | ((packet[2] == 0x00) || (packet[2] == 0x01))) { |
578 | if (packet[2] == 0x00) | 657 | if (packet[2] == 0x00) { |
579 | priv->shadowLSR = packet[3] & (SERIAL_LSR_OE | | 658 | ssu100_update_lsr(port, packet[3], &flag); |
580 | SERIAL_LSR_PE | | 659 | if (flag == TTY_OVERRUN) |
581 | SERIAL_LSR_FE | | 660 | tty_insert_flip_char(tty, 0, TTY_OVERRUN); |
582 | SERIAL_LSR_BI); | ||
583 | |||
584 | if (packet[2] == 0x01) { | ||
585 | priv->shadowMSR = packet[3]; | ||
586 | wake_up_interruptible(&priv->delta_msr_wait); | ||
587 | } | 661 | } |
662 | if (packet[2] == 0x01) | ||
663 | ssu100_update_msr(port, packet[3]); | ||
588 | 664 | ||
589 | len -= 4; | 665 | len -= 4; |
590 | ch = packet + 4; | 666 | ch = packet + 4; |
@@ -631,7 +707,6 @@ static void ssu100_process_read_urb(struct urb *urb) | |||
631 | tty_kref_put(tty); | 707 | tty_kref_put(tty); |
632 | } | 708 | } |
633 | 709 | ||
634 | |||
635 | static struct usb_serial_driver ssu100_device = { | 710 | static struct usb_serial_driver ssu100_device = { |
636 | .driver = { | 711 | .driver = { |
637 | .owner = THIS_MODULE, | 712 | .owner = THIS_MODULE, |
@@ -653,6 +728,7 @@ static struct usb_serial_driver ssu100_device = { | |||
653 | .tiocmset = ssu100_tiocmset, | 728 | .tiocmset = ssu100_tiocmset, |
654 | .ioctl = ssu100_ioctl, | 729 | .ioctl = ssu100_ioctl, |
655 | .set_termios = ssu100_set_termios, | 730 | .set_termios = ssu100_set_termios, |
731 | .disconnect = usb_serial_generic_disconnect, | ||
656 | }; | 732 | }; |
657 | 733 | ||
658 | static int __init ssu100_init(void) | 734 | static int __init ssu100_init(void) |
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c index 2a982e62963b..7a2177c79bde 100644 --- a/drivers/usb/serial/usb-serial.c +++ b/drivers/usb/serial/usb-serial.c | |||
@@ -736,6 +736,7 @@ int usb_serial_probe(struct usb_interface *interface, | |||
736 | 736 | ||
737 | serial = create_serial(dev, interface, type); | 737 | serial = create_serial(dev, interface, type); |
738 | if (!serial) { | 738 | if (!serial) { |
739 | module_put(type->driver.owner); | ||
739 | dev_err(&interface->dev, "%s - out of memory\n", __func__); | 740 | dev_err(&interface->dev, "%s - out of memory\n", __func__); |
740 | return -ENOMEM; | 741 | return -ENOMEM; |
741 | } | 742 | } |
@@ -746,11 +747,11 @@ int usb_serial_probe(struct usb_interface *interface, | |||
746 | 747 | ||
747 | id = get_iface_id(type, interface); | 748 | id = get_iface_id(type, interface); |
748 | retval = type->probe(serial, id); | 749 | retval = type->probe(serial, id); |
749 | module_put(type->driver.owner); | ||
750 | 750 | ||
751 | if (retval) { | 751 | if (retval) { |
752 | dbg("sub driver rejected device"); | 752 | dbg("sub driver rejected device"); |
753 | kfree(serial); | 753 | kfree(serial); |
754 | module_put(type->driver.owner); | ||
754 | return retval; | 755 | return retval; |
755 | } | 756 | } |
756 | } | 757 | } |
@@ -822,6 +823,7 @@ int usb_serial_probe(struct usb_interface *interface, | |||
822 | if (num_bulk_in == 0 || num_bulk_out == 0) { | 823 | if (num_bulk_in == 0 || num_bulk_out == 0) { |
823 | dev_info(&interface->dev, "PL-2303 hack: descriptors matched but endpoints did not\n"); | 824 | dev_info(&interface->dev, "PL-2303 hack: descriptors matched but endpoints did not\n"); |
824 | kfree(serial); | 825 | kfree(serial); |
826 | module_put(type->driver.owner); | ||
825 | return -ENODEV; | 827 | return -ENODEV; |
826 | } | 828 | } |
827 | } | 829 | } |
@@ -835,22 +837,15 @@ int usb_serial_probe(struct usb_interface *interface, | |||
835 | dev_err(&interface->dev, | 837 | dev_err(&interface->dev, |
836 | "Generic device with no bulk out, not allowed.\n"); | 838 | "Generic device with no bulk out, not allowed.\n"); |
837 | kfree(serial); | 839 | kfree(serial); |
840 | module_put(type->driver.owner); | ||
838 | return -EIO; | 841 | return -EIO; |
839 | } | 842 | } |
840 | } | 843 | } |
841 | #endif | 844 | #endif |
842 | if (!num_ports) { | 845 | if (!num_ports) { |
843 | /* if this device type has a calc_num_ports function, call it */ | 846 | /* if this device type has a calc_num_ports function, call it */ |
844 | if (type->calc_num_ports) { | 847 | if (type->calc_num_ports) |
845 | if (!try_module_get(type->driver.owner)) { | ||
846 | dev_err(&interface->dev, | ||
847 | "module get failed, exiting\n"); | ||
848 | kfree(serial); | ||
849 | return -EIO; | ||
850 | } | ||
851 | num_ports = type->calc_num_ports(serial); | 848 | num_ports = type->calc_num_ports(serial); |
852 | module_put(type->driver.owner); | ||
853 | } | ||
854 | if (!num_ports) | 849 | if (!num_ports) |
855 | num_ports = type->num_ports; | 850 | num_ports = type->num_ports; |
856 | } | 851 | } |
@@ -1039,13 +1034,7 @@ int usb_serial_probe(struct usb_interface *interface, | |||
1039 | 1034 | ||
1040 | /* if this device type has an attach function, call it */ | 1035 | /* if this device type has an attach function, call it */ |
1041 | if (type->attach) { | 1036 | if (type->attach) { |
1042 | if (!try_module_get(type->driver.owner)) { | ||
1043 | dev_err(&interface->dev, | ||
1044 | "module get failed, exiting\n"); | ||
1045 | goto probe_error; | ||
1046 | } | ||
1047 | retval = type->attach(serial); | 1037 | retval = type->attach(serial); |
1048 | module_put(type->driver.owner); | ||
1049 | if (retval < 0) | 1038 | if (retval < 0) |
1050 | goto probe_error; | 1039 | goto probe_error; |
1051 | serial->attached = 1; | 1040 | serial->attached = 1; |
@@ -1088,10 +1077,12 @@ int usb_serial_probe(struct usb_interface *interface, | |||
1088 | exit: | 1077 | exit: |
1089 | /* success */ | 1078 | /* success */ |
1090 | usb_set_intfdata(interface, serial); | 1079 | usb_set_intfdata(interface, serial); |
1080 | module_put(type->driver.owner); | ||
1091 | return 0; | 1081 | return 0; |
1092 | 1082 | ||
1093 | probe_error: | 1083 | probe_error: |
1094 | usb_serial_put(serial); | 1084 | usb_serial_put(serial); |
1085 | module_put(type->driver.owner); | ||
1095 | return -EIO; | 1086 | return -EIO; |
1096 | } | 1087 | } |
1097 | EXPORT_SYMBOL_GPL(usb_serial_probe); | 1088 | EXPORT_SYMBOL_GPL(usb_serial_probe); |