diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/crypto/hifn_795x.c | 60 |
1 files changed, 30 insertions, 30 deletions
diff --git a/drivers/crypto/hifn_795x.c b/drivers/crypto/hifn_795x.c index 81f3f950cd7d..d7a51ee26eed 100644 --- a/drivers/crypto/hifn_795x.c +++ b/drivers/crypto/hifn_795x.c | |||
@@ -535,10 +535,10 @@ struct hifn_crypt_command | |||
535 | */ | 535 | */ |
536 | struct hifn_mac_command | 536 | struct hifn_mac_command |
537 | { | 537 | { |
538 | volatile u16 masks; | 538 | volatile __le16 masks; |
539 | volatile u16 header_skip; | 539 | volatile __le16 header_skip; |
540 | volatile u16 source_count; | 540 | volatile __le16 source_count; |
541 | volatile u16 reserved; | 541 | volatile __le16 reserved; |
542 | }; | 542 | }; |
543 | 543 | ||
544 | #define HIFN_MAC_CMD_ALG_MASK 0x0001 | 544 | #define HIFN_MAC_CMD_ALG_MASK 0x0001 |
@@ -564,10 +564,10 @@ struct hifn_mac_command | |||
564 | 564 | ||
565 | struct hifn_comp_command | 565 | struct hifn_comp_command |
566 | { | 566 | { |
567 | volatile u16 masks; | 567 | volatile __le16 masks; |
568 | volatile u16 header_skip; | 568 | volatile __le16 header_skip; |
569 | volatile u16 source_count; | 569 | volatile __le16 source_count; |
570 | volatile u16 reserved; | 570 | volatile __le16 reserved; |
571 | }; | 571 | }; |
572 | 572 | ||
573 | #define HIFN_COMP_CMD_SRCLEN_M 0xc000 | 573 | #define HIFN_COMP_CMD_SRCLEN_M 0xc000 |
@@ -583,10 +583,10 @@ struct hifn_comp_command | |||
583 | 583 | ||
584 | struct hifn_base_result | 584 | struct hifn_base_result |
585 | { | 585 | { |
586 | volatile u16 flags; | 586 | volatile __le16 flags; |
587 | volatile u16 session; | 587 | volatile __le16 session; |
588 | volatile u16 src_cnt; /* 15:0 of source count */ | 588 | volatile __le16 src_cnt; /* 15:0 of source count */ |
589 | volatile u16 dst_cnt; /* 15:0 of dest count */ | 589 | volatile __le16 dst_cnt; /* 15:0 of dest count */ |
590 | }; | 590 | }; |
591 | 591 | ||
592 | #define HIFN_BASE_RES_DSTOVERRUN 0x0200 /* destination overrun */ | 592 | #define HIFN_BASE_RES_DSTOVERRUN 0x0200 /* destination overrun */ |
@@ -597,8 +597,8 @@ struct hifn_base_result | |||
597 | 597 | ||
598 | struct hifn_comp_result | 598 | struct hifn_comp_result |
599 | { | 599 | { |
600 | volatile u16 flags; | 600 | volatile __le16 flags; |
601 | volatile u16 crc; | 601 | volatile __le16 crc; |
602 | }; | 602 | }; |
603 | 603 | ||
604 | #define HIFN_COMP_RES_LCB_M 0xff00 /* longitudinal check byte */ | 604 | #define HIFN_COMP_RES_LCB_M 0xff00 /* longitudinal check byte */ |
@@ -609,8 +609,8 @@ struct hifn_comp_result | |||
609 | 609 | ||
610 | struct hifn_mac_result | 610 | struct hifn_mac_result |
611 | { | 611 | { |
612 | volatile u16 flags; | 612 | volatile __le16 flags; |
613 | volatile u16 reserved; | 613 | volatile __le16 reserved; |
614 | /* followed by 0, 6, 8, or 10 u16's of the MAC, then crypt */ | 614 | /* followed by 0, 6, 8, or 10 u16's of the MAC, then crypt */ |
615 | }; | 615 | }; |
616 | 616 | ||
@@ -619,8 +619,8 @@ struct hifn_mac_result | |||
619 | 619 | ||
620 | struct hifn_crypt_result | 620 | struct hifn_crypt_result |
621 | { | 621 | { |
622 | volatile u16 flags; | 622 | volatile __le16 flags; |
623 | volatile u16 reserved; | 623 | volatile __le16 reserved; |
624 | }; | 624 | }; |
625 | 625 | ||
626 | #define HIFN_CRYPT_RES_SRC_NOTZERO 0x0001 /* source expired */ | 626 | #define HIFN_CRYPT_RES_SRC_NOTZERO 0x0001 /* source expired */ |
@@ -686,12 +686,12 @@ static inline u32 hifn_read_1(struct hifn_device *dev, u32 reg) | |||
686 | 686 | ||
687 | static inline void hifn_write_0(struct hifn_device *dev, u32 reg, u32 val) | 687 | static inline void hifn_write_0(struct hifn_device *dev, u32 reg, u32 val) |
688 | { | 688 | { |
689 | writel(val, dev->bar[0] + reg); | 689 | writel((__force u32)cpu_to_le32(val), dev->bar[0] + reg); |
690 | } | 690 | } |
691 | 691 | ||
692 | static inline void hifn_write_1(struct hifn_device *dev, u32 reg, u32 val) | 692 | static inline void hifn_write_1(struct hifn_device *dev, u32 reg, u32 val) |
693 | { | 693 | { |
694 | writel(val, dev->bar[1] + reg); | 694 | writel((__force u32)cpu_to_le32(val), dev->bar[1] + reg); |
695 | } | 695 | } |
696 | 696 | ||
697 | static void hifn_wait_puc(struct hifn_device *dev) | 697 | static void hifn_wait_puc(struct hifn_device *dev) |
@@ -1037,14 +1037,14 @@ static void hifn_init_registers(struct hifn_device *dev) | |||
1037 | hifn_write_0(dev, HIFN_0_PUIER, HIFN_PUIER_DSTOVER); | 1037 | hifn_write_0(dev, HIFN_0_PUIER, HIFN_PUIER_DSTOVER); |
1038 | 1038 | ||
1039 | /* write all 4 ring address registers */ | 1039 | /* write all 4 ring address registers */ |
1040 | hifn_write_1(dev, HIFN_1_DMA_CRAR, __cpu_to_le32(dptr + | 1040 | hifn_write_1(dev, HIFN_1_DMA_CRAR, dptr + |
1041 | offsetof(struct hifn_dma, cmdr[0]))); | 1041 | offsetof(struct hifn_dma, cmdr[0])); |
1042 | hifn_write_1(dev, HIFN_1_DMA_SRAR, __cpu_to_le32(dptr + | 1042 | hifn_write_1(dev, HIFN_1_DMA_SRAR, dptr + |
1043 | offsetof(struct hifn_dma, srcr[0]))); | 1043 | offsetof(struct hifn_dma, srcr[0])); |
1044 | hifn_write_1(dev, HIFN_1_DMA_DRAR, __cpu_to_le32(dptr + | 1044 | hifn_write_1(dev, HIFN_1_DMA_DRAR, dptr + |
1045 | offsetof(struct hifn_dma, dstr[0]))); | 1045 | offsetof(struct hifn_dma, dstr[0])); |
1046 | hifn_write_1(dev, HIFN_1_DMA_RRAR, __cpu_to_le32(dptr + | 1046 | hifn_write_1(dev, HIFN_1_DMA_RRAR, dptr + |
1047 | offsetof(struct hifn_dma, resr[0]))); | 1047 | offsetof(struct hifn_dma, resr[0])); |
1048 | 1048 | ||
1049 | mdelay(2); | 1049 | mdelay(2); |
1050 | #if 0 | 1050 | #if 0 |
@@ -1178,8 +1178,8 @@ static int hifn_setup_src_desc(struct hifn_device *dev, struct page *page, | |||
1178 | idx = dma->srci; | 1178 | idx = dma->srci; |
1179 | 1179 | ||
1180 | dma->srcr[idx].p = __cpu_to_le32(addr); | 1180 | dma->srcr[idx].p = __cpu_to_le32(addr); |
1181 | dma->srcr[idx].l = __cpu_to_le32(size) | HIFN_D_VALID | | 1181 | dma->srcr[idx].l = __cpu_to_le32(size | HIFN_D_VALID | |
1182 | HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST; | 1182 | HIFN_D_MASKDONEIRQ | HIFN_D_NOINVALID | HIFN_D_LAST); |
1183 | 1183 | ||
1184 | if (++idx == HIFN_D_SRC_RSIZE) { | 1184 | if (++idx == HIFN_D_SRC_RSIZE) { |
1185 | dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID | | 1185 | dma->srcr[idx].l = __cpu_to_le32(HIFN_D_VALID | |