diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/nouveau/nouveau_bios.c | 59 |
1 files changed, 9 insertions, 50 deletions
diff --git a/drivers/gpu/drm/nouveau/nouveau_bios.c b/drivers/gpu/drm/nouveau/nouveau_bios.c index ba143972769f..9710e69898f6 100644 --- a/drivers/gpu/drm/nouveau/nouveau_bios.c +++ b/drivers/gpu/drm/nouveau/nouveau_bios.c | |||
@@ -310,63 +310,22 @@ valid_reg(struct nvbios *bios, uint32_t reg) | |||
310 | struct drm_device *dev = bios->dev; | 310 | struct drm_device *dev = bios->dev; |
311 | 311 | ||
312 | /* C51 has misaligned regs on purpose. Marvellous */ | 312 | /* C51 has misaligned regs on purpose. Marvellous */ |
313 | if (reg & 0x2 || (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51)) { | 313 | if (reg & 0x2 || |
314 | NV_ERROR(dev, "========== misaligned reg 0x%08X ==========\n", | 314 | (reg & 0x1 && dev_priv->VBIOS.pub.chip_version != 0x51)) |
315 | reg); | 315 | NV_ERROR(dev, "======= misaligned reg 0x%08X =======\n", reg); |
316 | return 0; | 316 | |
317 | } | 317 | /* warn on C51 regs that haven't been verified accessible in tracing */ |
318 | /* | ||
319 | * Warn on C51 regs that have not been verified accessible in | ||
320 | * mmiotracing | ||
321 | */ | ||
322 | if (reg & 0x1 && dev_priv->VBIOS.pub.chip_version == 0x51 && | 318 | if (reg & 0x1 && dev_priv->VBIOS.pub.chip_version == 0x51 && |
323 | reg != 0x130d && reg != 0x1311 && reg != 0x60081d) | 319 | reg != 0x130d && reg != 0x1311 && reg != 0x60081d) |
324 | NV_WARN(dev, "=== C51 misaligned reg 0x%08X not verified ===\n", | 320 | NV_WARN(dev, "=== C51 misaligned reg 0x%08X not verified ===\n", |
325 | reg); | 321 | reg); |
326 | 322 | ||
327 | /* Trust the init scripts on G80 */ | 323 | if (reg >= (8*1024*1024)) { |
328 | if (dev_priv->card_type >= NV_50) | 324 | NV_ERROR(dev, "=== reg 0x%08x out of mapped bounds ===\n", reg); |
329 | return 1; | 325 | return 0; |
330 | |||
331 | #define WITHIN(x, y, z) ((x >= y) && (x < y + z)) | ||
332 | if (WITHIN(reg, NV_PMC_OFFSET, NV_PMC_SIZE)) | ||
333 | return 1; | ||
334 | if (WITHIN(reg, NV_PBUS_OFFSET, NV_PBUS_SIZE)) | ||
335 | return 1; | ||
336 | if (WITHIN(reg, NV_PFIFO_OFFSET, NV_PFIFO_SIZE)) | ||
337 | return 1; | ||
338 | if (dev_priv->VBIOS.pub.chip_version >= 0x30 && | ||
339 | (WITHIN(reg, 0x4000, 0x600) || reg == 0x00004600)) | ||
340 | return 1; | ||
341 | if (dev_priv->VBIOS.pub.chip_version >= 0x40 && | ||
342 | WITHIN(reg, 0xc000, 0x48)) | ||
343 | return 1; | ||
344 | if (dev_priv->VBIOS.pub.chip_version >= 0x17 && reg == 0x0000d204) | ||
345 | return 1; | ||
346 | if (dev_priv->VBIOS.pub.chip_version >= 0x40) { | ||
347 | if (reg == 0x00011014 || reg == 0x00020328) | ||
348 | return 1; | ||
349 | if (WITHIN(reg, 0x88000, NV_PBUS_SIZE)) /* new PBUS */ | ||
350 | return 1; | ||
351 | } | 326 | } |
352 | if (WITHIN(reg, NV_PFB_OFFSET, NV_PFB_SIZE)) | ||
353 | return 1; | ||
354 | if (WITHIN(reg, NV_PEXTDEV_OFFSET, NV_PEXTDEV_SIZE)) | ||
355 | return 1; | ||
356 | if (WITHIN(reg, NV_PCRTC0_OFFSET, NV_PCRTC0_SIZE * 2)) | ||
357 | return 1; | ||
358 | if (WITHIN(reg, NV_PRAMDAC0_OFFSET, NV_PRAMDAC0_SIZE * 2)) | ||
359 | return 1; | ||
360 | if (dev_priv->VBIOS.pub.chip_version >= 0x17 && reg == 0x0070fff0) | ||
361 | return 1; | ||
362 | if (dev_priv->VBIOS.pub.chip_version == 0x51 && | ||
363 | WITHIN(reg, NV_PRAMIN_OFFSET, NV_PRAMIN_SIZE)) | ||
364 | return 1; | ||
365 | #undef WITHIN | ||
366 | 327 | ||
367 | NV_ERROR(dev, "========== unknown reg 0x%08X ==========\n", reg); | 328 | return 1; |
368 | |||
369 | return 0; | ||
370 | } | 329 | } |
371 | 330 | ||
372 | static bool | 331 | static bool |