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-rw-r--r--drivers/Kconfig2
-rw-r--r--drivers/Makefile1
-rw-r--r--drivers/bcma/Kconfig33
-rw-r--r--drivers/bcma/Makefile7
-rw-r--r--drivers/bcma/README19
-rw-r--r--drivers/bcma/TODO3
-rw-r--r--drivers/bcma/bcma_private.h28
-rw-r--r--drivers/bcma/core.c51
-rw-r--r--drivers/bcma/driver_chipcommon.c87
-rw-r--r--drivers/bcma/driver_chipcommon_pmu.c134
-rw-r--r--drivers/bcma/driver_pci.c163
-rw-r--r--drivers/bcma/host_pci.c196
-rw-r--r--drivers/bcma/main.c247
-rw-r--r--drivers/bcma/scan.c360
-rw-r--r--drivers/bcma/scan.h56
15 files changed, 1387 insertions, 0 deletions
diff --git a/drivers/Kconfig b/drivers/Kconfig
index 177c7d156933..aca706751469 100644
--- a/drivers/Kconfig
+++ b/drivers/Kconfig
@@ -68,6 +68,8 @@ source "drivers/watchdog/Kconfig"
68 68
69source "drivers/ssb/Kconfig" 69source "drivers/ssb/Kconfig"
70 70
71source "drivers/bcma/Kconfig"
72
71source "drivers/mfd/Kconfig" 73source "drivers/mfd/Kconfig"
72 74
73source "drivers/regulator/Kconfig" 75source "drivers/regulator/Kconfig"
diff --git a/drivers/Makefile b/drivers/Makefile
index 3f135b6fb014..a29527f4ded6 100644
--- a/drivers/Makefile
+++ b/drivers/Makefile
@@ -110,6 +110,7 @@ obj-$(CONFIG_HID) += hid/
110obj-$(CONFIG_PPC_PS3) += ps3/ 110obj-$(CONFIG_PPC_PS3) += ps3/
111obj-$(CONFIG_OF) += of/ 111obj-$(CONFIG_OF) += of/
112obj-$(CONFIG_SSB) += ssb/ 112obj-$(CONFIG_SSB) += ssb/
113obj-$(CONFIG_BCMA) += bcma/
113obj-$(CONFIG_VHOST_NET) += vhost/ 114obj-$(CONFIG_VHOST_NET) += vhost/
114obj-$(CONFIG_VLYNQ) += vlynq/ 115obj-$(CONFIG_VLYNQ) += vlynq/
115obj-$(CONFIG_STAGING) += staging/ 116obj-$(CONFIG_STAGING) += staging/
diff --git a/drivers/bcma/Kconfig b/drivers/bcma/Kconfig
new file mode 100644
index 000000000000..353781b5b78b
--- /dev/null
+++ b/drivers/bcma/Kconfig
@@ -0,0 +1,33 @@
1config BCMA_POSSIBLE
2 bool
3 depends on HAS_IOMEM && HAS_DMA
4 default y
5
6menu "Broadcom specific AMBA"
7 depends on BCMA_POSSIBLE
8
9config BCMA
10 tristate "BCMA support"
11 depends on BCMA_POSSIBLE
12 help
13 Bus driver for Broadcom specific Advanced Microcontroller Bus
14 Architecture.
15
16config BCMA_HOST_PCI_POSSIBLE
17 bool
18 depends on BCMA && PCI = y
19 default y
20
21config BCMA_HOST_PCI
22 bool "Support for BCMA on PCI-host bus"
23 depends on BCMA_HOST_PCI_POSSIBLE
24
25config BCMA_DEBUG
26 bool "BCMA debugging"
27 depends on BCMA
28 help
29 This turns on additional debugging messages.
30
31 If unsure, say N
32
33endmenu
diff --git a/drivers/bcma/Makefile b/drivers/bcma/Makefile
new file mode 100644
index 000000000000..0d56245bcb79
--- /dev/null
+++ b/drivers/bcma/Makefile
@@ -0,0 +1,7 @@
1bcma-y += main.o scan.o core.o
2bcma-y += driver_chipcommon.o driver_chipcommon_pmu.o
3bcma-y += driver_pci.o
4bcma-$(CONFIG_BCMA_HOST_PCI) += host_pci.o
5obj-$(CONFIG_BCMA) += bcma.o
6
7ccflags-$(CONFIG_BCMA_DEBUG) := -DDEBUG
diff --git a/drivers/bcma/README b/drivers/bcma/README
new file mode 100644
index 000000000000..f7e7ce46c603
--- /dev/null
+++ b/drivers/bcma/README
@@ -0,0 +1,19 @@
1Broadcom introduced new bus as replacement for older SSB. It is based on AMBA,
2however from programming point of view there is nothing AMBA specific we use.
3
4Standard AMBA drivers are platform specific, have hardcoded addresses and use
5AMBA standard fields like CID and PID.
6
7In case of Broadcom's cards every device consists of:
81) Broadcom specific AMBA device. It is put on AMBA bus, but can not be treated
9 as standard AMBA device. Reading it's CID or PID can cause machine lockup.
102) AMBA standard devices called ports or wrappers. They have CIDs (AMBA_CID)
11 and PIDs (0x103BB369), but we do not use that info for anything. One of that
12 devices is used for managing Broadcom specific core.
13
14Addresses of AMBA devices are not hardcoded in driver and have to be read from
15EPROM.
16
17In this situation we decided to introduce separated bus. It can contain up to
1816 devices identified by Broadcom specific fields: manufacturer, id, revision
19and class.
diff --git a/drivers/bcma/TODO b/drivers/bcma/TODO
new file mode 100644
index 000000000000..da7aa99fe81c
--- /dev/null
+++ b/drivers/bcma/TODO
@@ -0,0 +1,3 @@
1- Interrupts
2- Defines for PCI core driver
3- Create kernel Documentation (use info from README)
diff --git a/drivers/bcma/bcma_private.h b/drivers/bcma/bcma_private.h
new file mode 100644
index 000000000000..2f72e9c585fd
--- /dev/null
+++ b/drivers/bcma/bcma_private.h
@@ -0,0 +1,28 @@
1#ifndef LINUX_BCMA_PRIVATE_H_
2#define LINUX_BCMA_PRIVATE_H_
3
4#ifndef pr_fmt
5#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
6#endif
7
8#include <linux/bcma/bcma.h>
9#include <linux/delay.h>
10
11#define BCMA_CORE_SIZE 0x1000
12
13struct bcma_bus;
14
15/* main.c */
16extern int bcma_bus_register(struct bcma_bus *bus);
17extern void bcma_bus_unregister(struct bcma_bus *bus);
18
19/* scan.c */
20int bcma_bus_scan(struct bcma_bus *bus);
21
22#ifdef CONFIG_BCMA_HOST_PCI
23/* host_pci.c */
24extern int __init bcma_host_pci_init(void);
25extern void __exit bcma_host_pci_exit(void);
26#endif /* CONFIG_BCMA_HOST_PCI */
27
28#endif
diff --git a/drivers/bcma/core.c b/drivers/bcma/core.c
new file mode 100644
index 000000000000..ced379f7b371
--- /dev/null
+++ b/drivers/bcma/core.c
@@ -0,0 +1,51 @@
1/*
2 * Broadcom specific AMBA
3 * Core ops
4 *
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
7
8#include "bcma_private.h"
9#include <linux/bcma/bcma.h>
10
11bool bcma_core_is_enabled(struct bcma_device *core)
12{
13 if ((bcma_aread32(core, BCMA_IOCTL) & (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC))
14 != BCMA_IOCTL_CLK)
15 return false;
16 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
17 return false;
18 return true;
19}
20EXPORT_SYMBOL_GPL(bcma_core_is_enabled);
21
22static void bcma_core_disable(struct bcma_device *core, u32 flags)
23{
24 if (bcma_aread32(core, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
25 return;
26
27 bcma_awrite32(core, BCMA_IOCTL, flags);
28 bcma_aread32(core, BCMA_IOCTL);
29 udelay(10);
30
31 bcma_awrite32(core, BCMA_RESET_CTL, BCMA_RESET_CTL_RESET);
32 udelay(1);
33}
34
35int bcma_core_enable(struct bcma_device *core, u32 flags)
36{
37 bcma_core_disable(core, flags);
38
39 bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags));
40 bcma_aread32(core, BCMA_IOCTL);
41
42 bcma_awrite32(core, BCMA_RESET_CTL, 0);
43 udelay(1);
44
45 bcma_awrite32(core, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags));
46 bcma_aread32(core, BCMA_IOCTL);
47 udelay(1);
48
49 return 0;
50}
51EXPORT_SYMBOL_GPL(bcma_core_enable);
diff --git a/drivers/bcma/driver_chipcommon.c b/drivers/bcma/driver_chipcommon.c
new file mode 100644
index 000000000000..caf596091d4d
--- /dev/null
+++ b/drivers/bcma/driver_chipcommon.c
@@ -0,0 +1,87 @@
1/*
2 * Broadcom specific AMBA
3 * ChipCommon core driver
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11#include "bcma_private.h"
12#include <linux/bcma/bcma.h>
13
14static inline u32 bcma_cc_write32_masked(struct bcma_drv_cc *cc, u16 offset,
15 u32 mask, u32 value)
16{
17 value &= mask;
18 value |= bcma_cc_read32(cc, offset) & ~mask;
19 bcma_cc_write32(cc, offset, value);
20
21 return value;
22}
23
24void bcma_core_chipcommon_init(struct bcma_drv_cc *cc)
25{
26 if (cc->core->id.rev >= 11)
27 cc->status = bcma_cc_read32(cc, BCMA_CC_CHIPSTAT);
28 cc->capabilities = bcma_cc_read32(cc, BCMA_CC_CAP);
29 if (cc->core->id.rev >= 35)
30 cc->capabilities_ext = bcma_cc_read32(cc, BCMA_CC_CAP_EXT);
31
32 bcma_cc_write32(cc, 0x58, 0);
33 bcma_cc_write32(cc, 0x5C, 0);
34
35 if (cc->capabilities & BCMA_CC_CAP_PMU)
36 bcma_pmu_init(cc);
37 if (cc->capabilities & BCMA_CC_CAP_PCTL)
38 pr_err("Power control not implemented!\n");
39}
40
41/* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
42void bcma_chipco_watchdog_timer_set(struct bcma_drv_cc *cc, u32 ticks)
43{
44 /* instant NMI */
45 bcma_cc_write32(cc, BCMA_CC_WATCHDOG, ticks);
46}
47
48void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value)
49{
50 bcma_cc_write32_masked(cc, BCMA_CC_IRQMASK, mask, value);
51}
52
53u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask)
54{
55 return bcma_cc_read32(cc, BCMA_CC_IRQSTAT) & mask;
56}
57
58u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask)
59{
60 return bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask;
61}
62
63u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value)
64{
65 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value);
66}
67
68u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value)
69{
70 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value);
71}
72
73u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value)
74{
75 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value);
76}
77EXPORT_SYMBOL_GPL(bcma_chipco_gpio_control);
78
79u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value)
80{
81 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value);
82}
83
84u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value)
85{
86 return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
87}
diff --git a/drivers/bcma/driver_chipcommon_pmu.c b/drivers/bcma/driver_chipcommon_pmu.c
new file mode 100644
index 000000000000..f44177a644c7
--- /dev/null
+++ b/drivers/bcma/driver_chipcommon_pmu.c
@@ -0,0 +1,134 @@
1/*
2 * Broadcom specific AMBA
3 * ChipCommon Power Management Unit driver
4 *
5 * Copyright 2009, Michael Buesch <mb@bu3sch.de>
6 * Copyright 2007, Broadcom Corporation
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11#include "bcma_private.h"
12#include <linux/bcma/bcma.h>
13
14static void bcma_chipco_chipctl_maskset(struct bcma_drv_cc *cc,
15 u32 offset, u32 mask, u32 set)
16{
17 u32 value;
18
19 bcma_cc_read32(cc, BCMA_CC_CHIPCTL_ADDR);
20 bcma_cc_write32(cc, BCMA_CC_CHIPCTL_ADDR, offset);
21 bcma_cc_read32(cc, BCMA_CC_CHIPCTL_ADDR);
22 value = bcma_cc_read32(cc, BCMA_CC_CHIPCTL_DATA);
23 value &= mask;
24 value |= set;
25 bcma_cc_write32(cc, BCMA_CC_CHIPCTL_DATA, value);
26 bcma_cc_read32(cc, BCMA_CC_CHIPCTL_DATA);
27}
28
29static void bcma_pmu_pll_init(struct bcma_drv_cc *cc)
30{
31 struct bcma_bus *bus = cc->core->bus;
32
33 switch (bus->chipinfo.id) {
34 case 0x4313:
35 case 0x4331:
36 case 43224:
37 case 43225:
38 break;
39 default:
40 pr_err("PLL init unknown for device 0x%04X\n",
41 bus->chipinfo.id);
42 }
43}
44
45static void bcma_pmu_resources_init(struct bcma_drv_cc *cc)
46{
47 struct bcma_bus *bus = cc->core->bus;
48 u32 min_msk = 0, max_msk = 0;
49
50 switch (bus->chipinfo.id) {
51 case 0x4313:
52 min_msk = 0x200D;
53 max_msk = 0xFFFF;
54 break;
55 case 43224:
56 break;
57 default:
58 pr_err("PMU resource config unknown for device 0x%04X\n",
59 bus->chipinfo.id);
60 }
61
62 /* Set the resource masks. */
63 if (min_msk)
64 bcma_cc_write32(cc, BCMA_CC_PMU_MINRES_MSK, min_msk);
65 if (max_msk)
66 bcma_cc_write32(cc, BCMA_CC_PMU_MAXRES_MSK, max_msk);
67}
68
69void bcma_pmu_swreg_init(struct bcma_drv_cc *cc)
70{
71 struct bcma_bus *bus = cc->core->bus;
72
73 switch (bus->chipinfo.id) {
74 case 0x4313:
75 case 0x4331:
76 case 43224:
77 break;
78 default:
79 pr_err("PMU switch/regulators init unknown for device "
80 "0x%04X\n", bus->chipinfo.id);
81 }
82}
83
84void bcma_pmu_workarounds(struct bcma_drv_cc *cc)
85{
86 struct bcma_bus *bus = cc->core->bus;
87
88 switch (bus->chipinfo.id) {
89 case 0x4313:
90 bcma_chipco_chipctl_maskset(cc, 0, ~0, 0x7);
91 break;
92 case 0x4331:
93 pr_err("Enabling Ext PA lines not implemented\n");
94 break;
95 case 43224:
96 if (bus->chipinfo.rev == 0) {
97 pr_err("Workarounds for 43224 rev 0 not fully "
98 "implemented\n");
99 bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0);
100 } else {
101 bcma_chipco_chipctl_maskset(cc, 0, ~0, 0xF0);
102 }
103 break;
104 default:
105 pr_err("Workarounds unknown for device 0x%04X\n",
106 bus->chipinfo.id);
107 }
108}
109
110void bcma_pmu_init(struct bcma_drv_cc *cc)
111{
112 u32 pmucap;
113
114 pmucap = bcma_cc_read32(cc, BCMA_CC_PMU_CAP);
115 cc->pmu.rev = (pmucap & BCMA_CC_PMU_CAP_REVISION);
116
117 pr_debug("Found rev %u PMU (capabilities 0x%08X)\n", cc->pmu.rev,
118 pmucap);
119
120 if (cc->pmu.rev == 1)
121 bcma_cc_mask32(cc, BCMA_CC_PMU_CTL,
122 ~BCMA_CC_PMU_CTL_NOILPONW);
123 else
124 bcma_cc_set32(cc, BCMA_CC_PMU_CTL,
125 BCMA_CC_PMU_CTL_NOILPONW);
126
127 if (cc->core->id.id == 0x4329 && cc->core->id.rev == 2)
128 pr_err("Fix for 4329b0 bad LPOM state not implemented!\n");
129
130 bcma_pmu_pll_init(cc);
131 bcma_pmu_resources_init(cc);
132 bcma_pmu_swreg_init(cc);
133 bcma_pmu_workarounds(cc);
134}
diff --git a/drivers/bcma/driver_pci.c b/drivers/bcma/driver_pci.c
new file mode 100644
index 000000000000..b98b8359bef5
--- /dev/null
+++ b/drivers/bcma/driver_pci.c
@@ -0,0 +1,163 @@
1/*
2 * Broadcom specific AMBA
3 * PCI Core
4 *
5 * Copyright 2005, Broadcom Corporation
6 * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
7 *
8 * Licensed under the GNU/GPL. See COPYING for details.
9 */
10
11#include "bcma_private.h"
12#include <linux/bcma/bcma.h>
13
14/**************************************************
15 * R/W ops.
16 **************************************************/
17
18static u32 bcma_pcie_read(struct bcma_drv_pci *pc, u32 address)
19{
20 pcicore_write32(pc, 0x130, address);
21 pcicore_read32(pc, 0x130);
22 return pcicore_read32(pc, 0x134);
23}
24
25#if 0
26static void bcma_pcie_write(struct bcma_drv_pci *pc, u32 address, u32 data)
27{
28 pcicore_write32(pc, 0x130, address);
29 pcicore_read32(pc, 0x130);
30 pcicore_write32(pc, 0x134, data);
31}
32#endif
33
34static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy)
35{
36 const u16 mdio_control = 0x128;
37 const u16 mdio_data = 0x12C;
38 u32 v;
39 int i;
40
41 v = (1 << 30); /* Start of Transaction */
42 v |= (1 << 28); /* Write Transaction */
43 v |= (1 << 17); /* Turnaround */
44 v |= (0x1F << 18);
45 v |= (phy << 4);
46 pcicore_write32(pc, mdio_data, v);
47
48 udelay(10);
49 for (i = 0; i < 200; i++) {
50 v = pcicore_read32(pc, mdio_control);
51 if (v & 0x100 /* Trans complete */)
52 break;
53 msleep(1);
54 }
55}
56
57static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address)
58{
59 const u16 mdio_control = 0x128;
60 const u16 mdio_data = 0x12C;
61 int max_retries = 10;
62 u16 ret = 0;
63 u32 v;
64 int i;
65
66 v = 0x80; /* Enable Preamble Sequence */
67 v |= 0x2; /* MDIO Clock Divisor */
68 pcicore_write32(pc, mdio_control, v);
69
70 if (pc->core->id.rev >= 10) {
71 max_retries = 200;
72 bcma_pcie_mdio_set_phy(pc, device);
73 }
74
75 v = (1 << 30); /* Start of Transaction */
76 v |= (1 << 29); /* Read Transaction */
77 v |= (1 << 17); /* Turnaround */
78 if (pc->core->id.rev < 10)
79 v |= (u32)device << 22;
80 v |= (u32)address << 18;
81 pcicore_write32(pc, mdio_data, v);
82 /* Wait for the device to complete the transaction */
83 udelay(10);
84 for (i = 0; i < 200; i++) {
85 v = pcicore_read32(pc, mdio_control);
86 if (v & 0x100 /* Trans complete */) {
87 udelay(10);
88 ret = pcicore_read32(pc, mdio_data);
89 break;
90 }
91 msleep(1);
92 }
93 pcicore_write32(pc, mdio_control, 0);
94 return ret;
95}
96
97static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device,
98 u8 address, u16 data)
99{
100 const u16 mdio_control = 0x128;
101 const u16 mdio_data = 0x12C;
102 int max_retries = 10;
103 u32 v;
104 int i;
105
106 v = 0x80; /* Enable Preamble Sequence */
107 v |= 0x2; /* MDIO Clock Divisor */
108 pcicore_write32(pc, mdio_control, v);
109
110 if (pc->core->id.rev >= 10) {
111 max_retries = 200;
112 bcma_pcie_mdio_set_phy(pc, device);
113 }
114
115 v = (1 << 30); /* Start of Transaction */
116 v |= (1 << 28); /* Write Transaction */
117 v |= (1 << 17); /* Turnaround */
118 if (pc->core->id.rev < 10)
119 v |= (u32)device << 22;
120 v |= (u32)address << 18;
121 v |= data;
122 pcicore_write32(pc, mdio_data, v);
123 /* Wait for the device to complete the transaction */
124 udelay(10);
125 for (i = 0; i < max_retries; i++) {
126 v = pcicore_read32(pc, mdio_control);
127 if (v & 0x100 /* Trans complete */)
128 break;
129 msleep(1);
130 }
131 pcicore_write32(pc, mdio_control, 0);
132}
133
134/**************************************************
135 * Workarounds.
136 **************************************************/
137
138static u8 bcma_pcicore_polarity_workaround(struct bcma_drv_pci *pc)
139{
140 return (bcma_pcie_read(pc, 0x204) & 0x10) ? 0xC0 : 0x80;
141}
142
143static void bcma_pcicore_serdes_workaround(struct bcma_drv_pci *pc)
144{
145 const u8 serdes_pll_device = 0x1D;
146 const u8 serdes_rx_device = 0x1F;
147 u16 tmp;
148
149 bcma_pcie_mdio_write(pc, serdes_rx_device, 1 /* Control */,
150 bcma_pcicore_polarity_workaround(pc));
151 tmp = bcma_pcie_mdio_read(pc, serdes_pll_device, 1 /* Control */);
152 if (tmp & 0x4000)
153 bcma_pcie_mdio_write(pc, serdes_pll_device, 1, tmp & ~0x4000);
154}
155
156/**************************************************
157 * Init.
158 **************************************************/
159
160void bcma_core_pci_init(struct bcma_drv_pci *pc)
161{
162 bcma_pcicore_serdes_workaround(pc);
163}
diff --git a/drivers/bcma/host_pci.c b/drivers/bcma/host_pci.c
new file mode 100644
index 000000000000..99dd36e8500b
--- /dev/null
+++ b/drivers/bcma/host_pci.c
@@ -0,0 +1,196 @@
1/*
2 * Broadcom specific AMBA
3 * PCI Host
4 *
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
7
8#include "bcma_private.h"
9#include <linux/bcma/bcma.h>
10#include <linux/pci.h>
11
12static void bcma_host_pci_switch_core(struct bcma_device *core)
13{
14 pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN,
15 core->addr);
16 pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN2,
17 core->wrap);
18 core->bus->mapped_core = core;
19 pr_debug("Switched to core: 0x%X\n", core->id.id);
20}
21
22static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset)
23{
24 if (core->bus->mapped_core != core)
25 bcma_host_pci_switch_core(core);
26 return ioread8(core->bus->mmio + offset);
27}
28
29static u16 bcma_host_pci_read16(struct bcma_device *core, u16 offset)
30{
31 if (core->bus->mapped_core != core)
32 bcma_host_pci_switch_core(core);
33 return ioread16(core->bus->mmio + offset);
34}
35
36static u32 bcma_host_pci_read32(struct bcma_device *core, u16 offset)
37{
38 if (core->bus->mapped_core != core)
39 bcma_host_pci_switch_core(core);
40 return ioread32(core->bus->mmio + offset);
41}
42
43static void bcma_host_pci_write8(struct bcma_device *core, u16 offset,
44 u8 value)
45{
46 if (core->bus->mapped_core != core)
47 bcma_host_pci_switch_core(core);
48 iowrite8(value, core->bus->mmio + offset);
49}
50
51static void bcma_host_pci_write16(struct bcma_device *core, u16 offset,
52 u16 value)
53{
54 if (core->bus->mapped_core != core)
55 bcma_host_pci_switch_core(core);
56 iowrite16(value, core->bus->mmio + offset);
57}
58
59static void bcma_host_pci_write32(struct bcma_device *core, u16 offset,
60 u32 value)
61{
62 if (core->bus->mapped_core != core)
63 bcma_host_pci_switch_core(core);
64 iowrite32(value, core->bus->mmio + offset);
65}
66
67static u32 bcma_host_pci_aread32(struct bcma_device *core, u16 offset)
68{
69 if (core->bus->mapped_core != core)
70 bcma_host_pci_switch_core(core);
71 return ioread32(core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
72}
73
74static void bcma_host_pci_awrite32(struct bcma_device *core, u16 offset,
75 u32 value)
76{
77 if (core->bus->mapped_core != core)
78 bcma_host_pci_switch_core(core);
79 iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
80}
81
82const struct bcma_host_ops bcma_host_pci_ops = {
83 .read8 = bcma_host_pci_read8,
84 .read16 = bcma_host_pci_read16,
85 .read32 = bcma_host_pci_read32,
86 .write8 = bcma_host_pci_write8,
87 .write16 = bcma_host_pci_write16,
88 .write32 = bcma_host_pci_write32,
89 .aread32 = bcma_host_pci_aread32,
90 .awrite32 = bcma_host_pci_awrite32,
91};
92
93static int bcma_host_pci_probe(struct pci_dev *dev,
94 const struct pci_device_id *id)
95{
96 struct bcma_bus *bus;
97 int err = -ENOMEM;
98 const char *name;
99 u32 val;
100
101 /* Alloc */
102 bus = kzalloc(sizeof(*bus), GFP_KERNEL);
103 if (!bus)
104 goto out;
105
106 /* Basic PCI configuration */
107 err = pci_enable_device(dev);
108 if (err)
109 goto err_kfree_bus;
110
111 name = dev_name(&dev->dev);
112 if (dev->driver && dev->driver->name)
113 name = dev->driver->name;
114 err = pci_request_regions(dev, name);
115 if (err)
116 goto err_pci_disable;
117 pci_set_master(dev);
118
119 /* Disable the RETRY_TIMEOUT register (0x41) to keep
120 * PCI Tx retries from interfering with C3 CPU state */
121 pci_read_config_dword(dev, 0x40, &val);
122 if ((val & 0x0000ff00) != 0)
123 pci_write_config_dword(dev, 0x40, val & 0xffff00ff);
124
125 /* SSB needed additional powering up, do we have any AMBA PCI cards? */
126 if (!pci_is_pcie(dev))
127 pr_err("PCI card detected, report problems.\n");
128
129 /* Map MMIO */
130 err = -ENOMEM;
131 bus->mmio = pci_iomap(dev, 0, ~0UL);
132 if (!bus->mmio)
133 goto err_pci_release_regions;
134
135 /* Host specific */
136 bus->host_pci = dev;
137 bus->hosttype = BCMA_HOSTTYPE_PCI;
138 bus->ops = &bcma_host_pci_ops;
139
140 /* Register */
141 err = bcma_bus_register(bus);
142 if (err)
143 goto err_pci_unmap_mmio;
144
145 pci_set_drvdata(dev, bus);
146
147out:
148 return err;
149
150err_pci_unmap_mmio:
151 pci_iounmap(dev, bus->mmio);
152err_pci_release_regions:
153 pci_release_regions(dev);
154err_pci_disable:
155 pci_disable_device(dev);
156err_kfree_bus:
157 kfree(bus);
158 return err;
159}
160
161static void bcma_host_pci_remove(struct pci_dev *dev)
162{
163 struct bcma_bus *bus = pci_get_drvdata(dev);
164
165 bcma_bus_unregister(bus);
166 pci_iounmap(dev, bus->mmio);
167 pci_release_regions(dev);
168 pci_disable_device(dev);
169 kfree(bus);
170 pci_set_drvdata(dev, NULL);
171}
172
173static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = {
174 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
175 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
176 { PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
177 { 0, },
178};
179MODULE_DEVICE_TABLE(pci, bcma_pci_bridge_tbl);
180
181static struct pci_driver bcma_pci_bridge_driver = {
182 .name = "bcma-pci-bridge",
183 .id_table = bcma_pci_bridge_tbl,
184 .probe = bcma_host_pci_probe,
185 .remove = bcma_host_pci_remove,
186};
187
188int __init bcma_host_pci_init(void)
189{
190 return pci_register_driver(&bcma_pci_bridge_driver);
191}
192
193void __exit bcma_host_pci_exit(void)
194{
195 pci_unregister_driver(&bcma_pci_bridge_driver);
196}
diff --git a/drivers/bcma/main.c b/drivers/bcma/main.c
new file mode 100644
index 000000000000..be52344ed19d
--- /dev/null
+++ b/drivers/bcma/main.c
@@ -0,0 +1,247 @@
1/*
2 * Broadcom specific AMBA
3 * Bus subsystem
4 *
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
7
8#include "bcma_private.h"
9#include <linux/bcma/bcma.h>
10
11MODULE_DESCRIPTION("Broadcom's specific AMBA driver");
12MODULE_LICENSE("GPL");
13
14static int bcma_bus_match(struct device *dev, struct device_driver *drv);
15static int bcma_device_probe(struct device *dev);
16static int bcma_device_remove(struct device *dev);
17
18static ssize_t manuf_show(struct device *dev, struct device_attribute *attr, char *buf)
19{
20 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
21 return sprintf(buf, "0x%03X\n", core->id.manuf);
22}
23static ssize_t id_show(struct device *dev, struct device_attribute *attr, char *buf)
24{
25 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
26 return sprintf(buf, "0x%03X\n", core->id.id);
27}
28static ssize_t rev_show(struct device *dev, struct device_attribute *attr, char *buf)
29{
30 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
31 return sprintf(buf, "0x%02X\n", core->id.rev);
32}
33static ssize_t class_show(struct device *dev, struct device_attribute *attr, char *buf)
34{
35 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
36 return sprintf(buf, "0x%X\n", core->id.class);
37}
38static struct device_attribute bcma_device_attrs[] = {
39 __ATTR_RO(manuf),
40 __ATTR_RO(id),
41 __ATTR_RO(rev),
42 __ATTR_RO(class),
43 __ATTR_NULL,
44};
45
46static struct bus_type bcma_bus_type = {
47 .name = "bcma",
48 .match = bcma_bus_match,
49 .probe = bcma_device_probe,
50 .remove = bcma_device_remove,
51 .dev_attrs = bcma_device_attrs,
52};
53
54static struct bcma_device *bcma_find_core(struct bcma_bus *bus, u16 coreid)
55{
56 struct bcma_device *core;
57
58 list_for_each_entry(core, &bus->cores, list) {
59 if (core->id.id == coreid)
60 return core;
61 }
62 return NULL;
63}
64
65static void bcma_release_core_dev(struct device *dev)
66{
67 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
68 kfree(core);
69}
70
71static int bcma_register_cores(struct bcma_bus *bus)
72{
73 struct bcma_device *core;
74 int err, dev_id = 0;
75
76 list_for_each_entry(core, &bus->cores, list) {
77 /* We support that cores ourself */
78 switch (core->id.id) {
79 case BCMA_CORE_CHIPCOMMON:
80 case BCMA_CORE_PCI:
81 case BCMA_CORE_PCIE:
82 continue;
83 }
84
85 core->dev.release = bcma_release_core_dev;
86 core->dev.bus = &bcma_bus_type;
87 dev_set_name(&core->dev, "bcma%d:%d", 0/*bus->num*/, dev_id);
88
89 switch (bus->hosttype) {
90 case BCMA_HOSTTYPE_PCI:
91 core->dev.parent = &bus->host_pci->dev;
92 break;
93 case BCMA_HOSTTYPE_NONE:
94 case BCMA_HOSTTYPE_SDIO:
95 break;
96 }
97
98 err = device_register(&core->dev);
99 if (err) {
100 pr_err("Could not register dev for core 0x%03X\n",
101 core->id.id);
102 continue;
103 }
104 core->dev_registered = true;
105 dev_id++;
106 }
107
108 return 0;
109}
110
111static void bcma_unregister_cores(struct bcma_bus *bus)
112{
113 struct bcma_device *core;
114
115 list_for_each_entry(core, &bus->cores, list) {
116 if (core->dev_registered)
117 device_unregister(&core->dev);
118 }
119}
120
121int bcma_bus_register(struct bcma_bus *bus)
122{
123 int err;
124 struct bcma_device *core;
125
126 /* Scan for devices (cores) */
127 err = bcma_bus_scan(bus);
128 if (err) {
129 pr_err("Failed to scan: %d\n", err);
130 return -1;
131 }
132
133 /* Init CC core */
134 core = bcma_find_core(bus, BCMA_CORE_CHIPCOMMON);
135 if (core) {
136 bus->drv_cc.core = core;
137 bcma_core_chipcommon_init(&bus->drv_cc);
138 }
139
140 /* Init PCIE core */
141 core = bcma_find_core(bus, BCMA_CORE_PCIE);
142 if (core) {
143 bus->drv_pci.core = core;
144 bcma_core_pci_init(&bus->drv_pci);
145 }
146
147 /* Register found cores */
148 bcma_register_cores(bus);
149
150 pr_info("Bus registered\n");
151
152 return 0;
153}
154EXPORT_SYMBOL_GPL(bcma_bus_register);
155
156void bcma_bus_unregister(struct bcma_bus *bus)
157{
158 bcma_unregister_cores(bus);
159}
160EXPORT_SYMBOL_GPL(bcma_bus_unregister);
161
162int __bcma_driver_register(struct bcma_driver *drv, struct module *owner)
163{
164 drv->drv.name = drv->name;
165 drv->drv.bus = &bcma_bus_type;
166 drv->drv.owner = owner;
167
168 return driver_register(&drv->drv);
169}
170EXPORT_SYMBOL_GPL(__bcma_driver_register);
171
172void bcma_driver_unregister(struct bcma_driver *drv)
173{
174 driver_unregister(&drv->drv);
175}
176EXPORT_SYMBOL_GPL(bcma_driver_unregister);
177
178static int bcma_bus_match(struct device *dev, struct device_driver *drv)
179{
180 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
181 struct bcma_driver *adrv = container_of(drv, struct bcma_driver, drv);
182 const struct bcma_device_id *cid = &core->id;
183 const struct bcma_device_id *did;
184
185 for (did = adrv->id_table; did->manuf || did->id || did->rev; did++) {
186 if ((did->manuf == cid->manuf || did->manuf == BCMA_ANY_MANUF) &&
187 (did->id == cid->id || did->id == BCMA_ANY_ID) &&
188 (did->rev == cid->rev || did->rev == BCMA_ANY_REV) &&
189 (did->class == cid->class || did->class == BCMA_ANY_CLASS))
190 return 1;
191 }
192 return 0;
193}
194
195static int bcma_device_probe(struct device *dev)
196{
197 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
198 struct bcma_driver *adrv = container_of(dev->driver, struct bcma_driver,
199 drv);
200 int err = 0;
201
202 if (adrv->probe)
203 err = adrv->probe(core);
204
205 return err;
206}
207
208static int bcma_device_remove(struct device *dev)
209{
210 struct bcma_device *core = container_of(dev, struct bcma_device, dev);
211 struct bcma_driver *adrv = container_of(dev->driver, struct bcma_driver,
212 drv);
213
214 if (adrv->remove)
215 adrv->remove(core);
216
217 return 0;
218}
219
220static int __init bcma_modinit(void)
221{
222 int err;
223
224 err = bus_register(&bcma_bus_type);
225 if (err)
226 return err;
227
228#ifdef CONFIG_BCMA_HOST_PCI
229 err = bcma_host_pci_init();
230 if (err) {
231 pr_err("PCI host initialization failed\n");
232 err = 0;
233 }
234#endif
235
236 return err;
237}
238fs_initcall(bcma_modinit);
239
240static void __exit bcma_modexit(void)
241{
242#ifdef CONFIG_BCMA_HOST_PCI
243 bcma_host_pci_exit();
244#endif
245 bus_unregister(&bcma_bus_type);
246}
247module_exit(bcma_modexit)
diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c
new file mode 100644
index 000000000000..40d7dcce8933
--- /dev/null
+++ b/drivers/bcma/scan.c
@@ -0,0 +1,360 @@
1/*
2 * Broadcom specific AMBA
3 * Bus scanning
4 *
5 * Licensed under the GNU/GPL. See COPYING for details.
6 */
7
8#include "scan.h"
9#include "bcma_private.h"
10
11#include <linux/bcma/bcma.h>
12#include <linux/bcma/bcma_regs.h>
13#include <linux/pci.h>
14#include <linux/io.h>
15#include <linux/dma-mapping.h>
16#include <linux/slab.h>
17
18struct bcma_device_id_name {
19 u16 id;
20 const char *name;
21};
22struct bcma_device_id_name bcma_device_names[] = {
23 { BCMA_CORE_OOB_ROUTER, "OOB Router" },
24 { BCMA_CORE_INVALID, "Invalid" },
25 { BCMA_CORE_CHIPCOMMON, "ChipCommon" },
26 { BCMA_CORE_ILINE20, "ILine 20" },
27 { BCMA_CORE_SRAM, "SRAM" },
28 { BCMA_CORE_SDRAM, "SDRAM" },
29 { BCMA_CORE_PCI, "PCI" },
30 { BCMA_CORE_MIPS, "MIPS" },
31 { BCMA_CORE_ETHERNET, "Fast Ethernet" },
32 { BCMA_CORE_V90, "V90" },
33 { BCMA_CORE_USB11_HOSTDEV, "USB 1.1 Hostdev" },
34 { BCMA_CORE_ADSL, "ADSL" },
35 { BCMA_CORE_ILINE100, "ILine 100" },
36 { BCMA_CORE_IPSEC, "IPSEC" },
37 { BCMA_CORE_UTOPIA, "UTOPIA" },
38 { BCMA_CORE_PCMCIA, "PCMCIA" },
39 { BCMA_CORE_INTERNAL_MEM, "Internal Memory" },
40 { BCMA_CORE_MEMC_SDRAM, "MEMC SDRAM" },
41 { BCMA_CORE_OFDM, "OFDM" },
42 { BCMA_CORE_EXTIF, "EXTIF" },
43 { BCMA_CORE_80211, "IEEE 802.11" },
44 { BCMA_CORE_PHY_A, "PHY A" },
45 { BCMA_CORE_PHY_B, "PHY B" },
46 { BCMA_CORE_PHY_G, "PHY G" },
47 { BCMA_CORE_MIPS_3302, "MIPS 3302" },
48 { BCMA_CORE_USB11_HOST, "USB 1.1 Host" },
49 { BCMA_CORE_USB11_DEV, "USB 1.1 Device" },
50 { BCMA_CORE_USB20_HOST, "USB 2.0 Host" },
51 { BCMA_CORE_USB20_DEV, "USB 2.0 Device" },
52 { BCMA_CORE_SDIO_HOST, "SDIO Host" },
53 { BCMA_CORE_ROBOSWITCH, "Roboswitch" },
54 { BCMA_CORE_PARA_ATA, "PATA" },
55 { BCMA_CORE_SATA_XORDMA, "SATA XOR-DMA" },
56 { BCMA_CORE_ETHERNET_GBIT, "GBit Ethernet" },
57 { BCMA_CORE_PCIE, "PCIe" },
58 { BCMA_CORE_PHY_N, "PHY N" },
59 { BCMA_CORE_SRAM_CTL, "SRAM Controller" },
60 { BCMA_CORE_MINI_MACPHY, "Mini MACPHY" },
61 { BCMA_CORE_ARM_1176, "ARM 1176" },
62 { BCMA_CORE_ARM_7TDMI, "ARM 7TDMI" },
63 { BCMA_CORE_PHY_LP, "PHY LP" },
64 { BCMA_CORE_PMU, "PMU" },
65 { BCMA_CORE_PHY_SSN, "PHY SSN" },
66 { BCMA_CORE_SDIO_DEV, "SDIO Device" },
67 { BCMA_CORE_ARM_CM3, "ARM CM3" },
68 { BCMA_CORE_PHY_HT, "PHY HT" },
69 { BCMA_CORE_MIPS_74K, "MIPS 74K" },
70 { BCMA_CORE_MAC_GBIT, "GBit MAC" },
71 { BCMA_CORE_DDR12_MEM_CTL, "DDR1/DDR2 Memory Controller" },
72 { BCMA_CORE_PCIE_RC, "PCIe Root Complex" },
73 { BCMA_CORE_OCP_OCP_BRIDGE, "OCP to OCP Bridge" },
74 { BCMA_CORE_SHARED_COMMON, "Common Shared" },
75 { BCMA_CORE_OCP_AHB_BRIDGE, "OCP to AHB Bridge" },
76 { BCMA_CORE_SPI_HOST, "SPI Host" },
77 { BCMA_CORE_I2S, "I2S" },
78 { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
79 { BCMA_CORE_SHIM, "SHIM" },
80 { BCMA_CORE_DEFAULT, "Default" },
81};
82const char *bcma_device_name(struct bcma_device_id *id)
83{
84 int i;
85
86 if (id->manuf == BCMA_MANUF_BCM) {
87 for (i = 0; i < ARRAY_SIZE(bcma_device_names); i++) {
88 if (bcma_device_names[i].id == id->id)
89 return bcma_device_names[i].name;
90 }
91 }
92 return "UNKNOWN";
93}
94
95static u32 bcma_scan_read32(struct bcma_bus *bus, u8 current_coreidx,
96 u16 offset)
97{
98 return readl(bus->mmio + offset);
99}
100
101static void bcma_scan_switch_core(struct bcma_bus *bus, u32 addr)
102{
103 if (bus->hosttype == BCMA_HOSTTYPE_PCI)
104 pci_write_config_dword(bus->host_pci, BCMA_PCI_BAR0_WIN,
105 addr);
106}
107
108static u32 bcma_erom_get_ent(struct bcma_bus *bus, u32 **eromptr)
109{
110 u32 ent = readl(*eromptr);
111 (*eromptr)++;
112 return ent;
113}
114
115static void bcma_erom_push_ent(u32 **eromptr)
116{
117 (*eromptr)--;
118}
119
120static s32 bcma_erom_get_ci(struct bcma_bus *bus, u32 **eromptr)
121{
122 u32 ent = bcma_erom_get_ent(bus, eromptr);
123 if (!(ent & SCAN_ER_VALID))
124 return -ENOENT;
125 if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_CI)
126 return -ENOENT;
127 return ent;
128}
129
130static bool bcma_erom_is_end(struct bcma_bus *bus, u32 **eromptr)
131{
132 u32 ent = bcma_erom_get_ent(bus, eromptr);
133 bcma_erom_push_ent(eromptr);
134 return (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID));
135}
136
137static bool bcma_erom_is_bridge(struct bcma_bus *bus, u32 **eromptr)
138{
139 u32 ent = bcma_erom_get_ent(bus, eromptr);
140 bcma_erom_push_ent(eromptr);
141 return (((ent & SCAN_ER_VALID)) &&
142 ((ent & SCAN_ER_TAGX) == SCAN_ER_TAG_ADDR) &&
143 ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE));
144}
145
146static void bcma_erom_skip_component(struct bcma_bus *bus, u32 **eromptr)
147{
148 u32 ent;
149 while (1) {
150 ent = bcma_erom_get_ent(bus, eromptr);
151 if ((ent & SCAN_ER_VALID) &&
152 ((ent & SCAN_ER_TAG) == SCAN_ER_TAG_CI))
153 break;
154 if (ent == (SCAN_ER_TAG_END | SCAN_ER_VALID))
155 break;
156 }
157 bcma_erom_push_ent(eromptr);
158}
159
160static s32 bcma_erom_get_mst_port(struct bcma_bus *bus, u32 **eromptr)
161{
162 u32 ent = bcma_erom_get_ent(bus, eromptr);
163 if (!(ent & SCAN_ER_VALID))
164 return -ENOENT;
165 if ((ent & SCAN_ER_TAG) != SCAN_ER_TAG_MP)
166 return -ENOENT;
167 return ent;
168}
169
170static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr,
171 u32 type, u8 port)
172{
173 u32 addrl, addrh, sizel, sizeh = 0;
174 u32 size;
175
176 u32 ent = bcma_erom_get_ent(bus, eromptr);
177 if ((!(ent & SCAN_ER_VALID)) ||
178 ((ent & SCAN_ER_TAGX) != SCAN_ER_TAG_ADDR) ||
179 ((ent & SCAN_ADDR_TYPE) != type) ||
180 (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) {
181 bcma_erom_push_ent(eromptr);
182 return -EINVAL;
183 }
184
185 addrl = ent & SCAN_ADDR_ADDR;
186 if (ent & SCAN_ADDR_AG32)
187 addrh = bcma_erom_get_ent(bus, eromptr);
188 else
189 addrh = 0;
190
191 if ((ent & SCAN_ADDR_SZ) == SCAN_ADDR_SZ_SZD) {
192 size = bcma_erom_get_ent(bus, eromptr);
193 sizel = size & SCAN_SIZE_SZ;
194 if (size & SCAN_SIZE_SG32)
195 sizeh = bcma_erom_get_ent(bus, eromptr);
196 } else
197 sizel = SCAN_ADDR_SZ_BASE <<
198 ((ent & SCAN_ADDR_SZ) >> SCAN_ADDR_SZ_SHIFT);
199
200 return addrl;
201}
202
203int bcma_bus_scan(struct bcma_bus *bus)
204{
205 u32 erombase;
206 u32 __iomem *eromptr, *eromend;
207
208 s32 cia, cib;
209 u8 ports[2], wrappers[2];
210
211 s32 tmp;
212 u8 i, j;
213
214 int err;
215
216 INIT_LIST_HEAD(&bus->cores);
217 bus->nr_cores = 0;
218
219 bcma_scan_switch_core(bus, BCMA_ADDR_BASE);
220
221 tmp = bcma_scan_read32(bus, 0, BCMA_CC_ID);
222 bus->chipinfo.id = (tmp & BCMA_CC_ID_ID) >> BCMA_CC_ID_ID_SHIFT;
223 bus->chipinfo.rev = (tmp & BCMA_CC_ID_REV) >> BCMA_CC_ID_REV_SHIFT;
224 bus->chipinfo.pkg = (tmp & BCMA_CC_ID_PKG) >> BCMA_CC_ID_PKG_SHIFT;
225
226 erombase = bcma_scan_read32(bus, 0, BCMA_CC_EROM);
227 eromptr = bus->mmio;
228 eromend = eromptr + BCMA_CORE_SIZE / sizeof(u32);
229
230 bcma_scan_switch_core(bus, erombase);
231
232 while (eromptr < eromend) {
233 struct bcma_device *core = kzalloc(sizeof(*core), GFP_KERNEL);
234 if (!core)
235 return -ENOMEM;
236 INIT_LIST_HEAD(&core->list);
237 core->bus = bus;
238
239 /* get CIs */
240 cia = bcma_erom_get_ci(bus, &eromptr);
241 if (cia < 0) {
242 bcma_erom_push_ent(&eromptr);
243 if (bcma_erom_is_end(bus, &eromptr))
244 break;
245 err= -EILSEQ;
246 goto out;
247 }
248 cib = bcma_erom_get_ci(bus, &eromptr);
249 if (cib < 0) {
250 err= -EILSEQ;
251 goto out;
252 }
253
254 /* parse CIs */
255 core->id.class = (cia & SCAN_CIA_CLASS) >> SCAN_CIA_CLASS_SHIFT;
256 core->id.id = (cia & SCAN_CIA_ID) >> SCAN_CIA_ID_SHIFT;
257 core->id.manuf = (cia & SCAN_CIA_MANUF) >> SCAN_CIA_MANUF_SHIFT;
258 ports[0] = (cib & SCAN_CIB_NMP) >> SCAN_CIB_NMP_SHIFT;
259 ports[1] = (cib & SCAN_CIB_NSP) >> SCAN_CIB_NSP_SHIFT;
260 wrappers[0] = (cib & SCAN_CIB_NMW) >> SCAN_CIB_NMW_SHIFT;
261 wrappers[1] = (cib & SCAN_CIB_NSW) >> SCAN_CIB_NSW_SHIFT;
262 core->id.rev = (cib & SCAN_CIB_REV) >> SCAN_CIB_REV_SHIFT;
263
264 if (((core->id.manuf == BCMA_MANUF_ARM) &&
265 (core->id.id == 0xFFF)) ||
266 (ports[1] == 0)) {
267 bcma_erom_skip_component(bus, &eromptr);
268 continue;
269 }
270
271 /* check if component is a core at all */
272 if (wrappers[0] + wrappers[1] == 0) {
273 /* we could save addrl of the router
274 if (cid == BCMA_CORE_OOB_ROUTER)
275 */
276 bcma_erom_skip_component(bus, &eromptr);
277 continue;
278 }
279
280 if (bcma_erom_is_bridge(bus, &eromptr)) {
281 bcma_erom_skip_component(bus, &eromptr);
282 continue;
283 }
284
285 /* get & parse master ports */
286 for (i = 0; i < ports[0]; i++) {
287 u32 mst_port_d = bcma_erom_get_mst_port(bus, &eromptr);
288 if (mst_port_d < 0) {
289 err= -EILSEQ;
290 goto out;
291 }
292 }
293
294 /* get & parse slave ports */
295 for (i = 0; i < ports[1]; i++) {
296 for (j = 0; ; j++) {
297 tmp = bcma_erom_get_addr_desc(bus, &eromptr,
298 SCAN_ADDR_TYPE_SLAVE, i);
299 if (tmp < 0) {
300 /* no more entries for port _i_ */
301 /* pr_debug("erom: slave port %d "
302 * "has %d descriptors\n", i, j); */
303 break;
304 } else {
305 if (i == 0 && j == 0)
306 core->addr = tmp;
307 }
308 }
309 }
310
311 /* get & parse master wrappers */
312 for (i = 0; i < wrappers[0]; i++) {
313 for (j = 0; ; j++) {
314 tmp = bcma_erom_get_addr_desc(bus, &eromptr,
315 SCAN_ADDR_TYPE_MWRAP, i);
316 if (tmp < 0) {
317 /* no more entries for port _i_ */
318 /* pr_debug("erom: master wrapper %d "
319 * "has %d descriptors\n", i, j); */
320 break;
321 } else {
322 if (i == 0 && j == 0)
323 core->wrap = tmp;
324 }
325 }
326 }
327
328 /* get & parse slave wrappers */
329 for (i = 0; i < wrappers[1]; i++) {
330 u8 hack = (ports[1] == 1) ? 0 : 1;
331 for (j = 0; ; j++) {
332 tmp = bcma_erom_get_addr_desc(bus, &eromptr,
333 SCAN_ADDR_TYPE_SWRAP, i + hack);
334 if (tmp < 0) {
335 /* no more entries for port _i_ */
336 /* pr_debug("erom: master wrapper %d "
337 * has %d descriptors\n", i, j); */
338 break;
339 } else {
340 if (wrappers[0] == 0 && !i && !j)
341 core->wrap = tmp;
342 }
343 }
344 }
345
346 pr_info("Core %d found: %s "
347 "(manuf 0x%03X, id 0x%03X, rev 0x%02X, class 0x%X)\n",
348 bus->nr_cores, bcma_device_name(&core->id),
349 core->id.manuf, core->id.id, core->id.rev,
350 core->id.class);
351
352 core->core_index = bus->nr_cores++;
353 list_add(&core->list, &bus->cores);
354 continue;
355out:
356 return err;
357 }
358
359 return 0;
360}
diff --git a/drivers/bcma/scan.h b/drivers/bcma/scan.h
new file mode 100644
index 000000000000..113e6a66884c
--- /dev/null
+++ b/drivers/bcma/scan.h
@@ -0,0 +1,56 @@
1#ifndef BCMA_SCAN_H_
2#define BCMA_SCAN_H_
3
4#define BCMA_ADDR_BASE 0x18000000
5#define BCMA_WRAP_BASE 0x18100000
6
7#define SCAN_ER_VALID 0x00000001
8#define SCAN_ER_TAGX 0x00000006 /* we have to ignore 0x8 bit when checking tag for SCAN_ER_TAG_ADDR */
9#define SCAN_ER_TAG 0x0000000E
10#define SCAN_ER_TAG_CI 0x00000000
11#define SCAN_ER_TAG_MP 0x00000002
12#define SCAN_ER_TAG_ADDR 0x00000004
13#define SCAN_ER_TAG_END 0x0000000E
14#define SCAN_ER_BAD 0xFFFFFFFF
15
16#define SCAN_CIA_CLASS 0x000000F0
17#define SCAN_CIA_CLASS_SHIFT 4
18#define SCAN_CIA_ID 0x000FFF00
19#define SCAN_CIA_ID_SHIFT 8
20#define SCAN_CIA_MANUF 0xFFF00000
21#define SCAN_CIA_MANUF_SHIFT 20
22
23#define SCAN_CIB_NMP 0x000001F0
24#define SCAN_CIB_NMP_SHIFT 4
25#define SCAN_CIB_NSP 0x00003E00
26#define SCAN_CIB_NSP_SHIFT 9
27#define SCAN_CIB_NMW 0x0007C000
28#define SCAN_CIB_NMW_SHIFT 14
29#define SCAN_CIB_NSW 0x00F80000
30#define SCAN_CIB_NSW_SHIFT 17
31#define SCAN_CIB_REV 0xFF000000
32#define SCAN_CIB_REV_SHIFT 24
33
34#define SCAN_ADDR_AG32 0x00000008
35#define SCAN_ADDR_SZ 0x00000030
36#define SCAN_ADDR_SZ_SHIFT 4
37#define SCAN_ADDR_SZ_4K 0x00000000
38#define SCAN_ADDR_SZ_8K 0x00000010
39#define SCAN_ADDR_SZ_16K 0x00000020
40#define SCAN_ADDR_SZ_SZD 0x00000030
41#define SCAN_ADDR_TYPE 0x000000C0
42#define SCAN_ADDR_TYPE_SLAVE 0x00000000
43#define SCAN_ADDR_TYPE_BRIDGE 0x00000040
44#define SCAN_ADDR_TYPE_SWRAP 0x00000080
45#define SCAN_ADDR_TYPE_MWRAP 0x000000C0
46#define SCAN_ADDR_PORT 0x00000F00
47#define SCAN_ADDR_PORT_SHIFT 8
48#define SCAN_ADDR_ADDR 0xFFFFF000
49
50#define SCAN_ADDR_SZ_BASE 0x00001000 /* 4KB */
51
52#define SCAN_SIZE_SZ_ALIGN 0x00000FFF
53#define SCAN_SIZE_SZ 0xFFFFF000
54#define SCAN_SIZE_SG32 0x00000008
55
56#endif /* BCMA_SCAN_H_ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 04:18:03 -0500