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-rw-r--r--drivers/gpu/drm/radeon/evergreen.c3
-rw-r--r--drivers/gpu/drm/radeon/ni.c3
-rw-r--r--drivers/gpu/drm/radeon/r100.c3
-rw-r--r--drivers/gpu/drm/radeon/r600.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon.h6
-rw-r--r--drivers/gpu/drm/radeon/radeon_ring.c17
-rw-r--r--drivers/gpu/drm/radeon/rv770.c3
7 files changed, 27 insertions, 11 deletions
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index ba19b9a697b0..6ff1180c7321 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3127,7 +3127,8 @@ static int evergreen_startup(struct radeon_device *rdev)
3127 evergreen_irq_set(rdev); 3127 evergreen_irq_set(rdev);
3128 3128
3129 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, 3129 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET,
3130 R600_CP_RB_RPTR, R600_CP_RB_WPTR); 3130 R600_CP_RB_RPTR, R600_CP_RB_WPTR,
3131 0, 0xfffff, RADEON_CP_PACKET2);
3131 if (r) 3132 if (r)
3132 return r; 3133 return r;
3133 r = evergreen_cp_load_microcode(rdev); 3134 r = evergreen_cp_load_microcode(rdev);
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index a9b0e615804f..d0d23c547643 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -1412,7 +1412,8 @@ static int cayman_startup(struct radeon_device *rdev)
1412 evergreen_irq_set(rdev); 1412 evergreen_irq_set(rdev);
1413 1413
1414 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, 1414 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET,
1415 CP_RB0_RPTR, CP_RB0_WPTR); 1415 CP_RB0_RPTR, CP_RB0_WPTR,
1416 0, 0xfffff, RADEON_CP_PACKET2);
1416 if (r) 1417 if (r)
1417 return r; 1418 return r;
1418 r = cayman_cp_load_microcode(rdev); 1419 r = cayman_cp_load_microcode(rdev);
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index bed56c7b690b..3ef2c58b8407 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -1075,7 +1075,8 @@ int r100_cp_init(struct radeon_device *rdev, unsigned ring_size)
1075 ring_size = (1 << (rb_bufsz + 1)) * 4; 1075 ring_size = (1 << (rb_bufsz + 1)) * 4;
1076 r100_cp_load_microcode(rdev); 1076 r100_cp_load_microcode(rdev);
1077 r = radeon_ring_init(rdev, ring, ring_size, RADEON_WB_CP_RPTR_OFFSET, 1077 r = radeon_ring_init(rdev, ring, ring_size, RADEON_WB_CP_RPTR_OFFSET,
1078 RADEON_CP_RB_RPTR, RADEON_CP_RB_WPTR); 1078 RADEON_CP_RB_RPTR, RADEON_CP_RB_WPTR,
1079 0, 0x7fffff, RADEON_CP_PACKET2);
1079 if (r) { 1080 if (r) {
1080 return r; 1081 return r;
1081 } 1082 }
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index f2deadfcd88f..48bd8202b5c9 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -2474,7 +2474,8 @@ int r600_startup(struct radeon_device *rdev)
2474 r600_irq_set(rdev); 2474 r600_irq_set(rdev);
2475 2475
2476 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, 2476 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET,
2477 R600_CP_RB_RPTR, R600_CP_RB_WPTR); 2477 R600_CP_RB_RPTR, R600_CP_RB_WPTR,
2478 0, 0xfffff, RADEON_CP_PACKET2);
2478 2479
2479 if (r) 2480 if (r)
2480 return r; 2481 return r;
diff --git a/drivers/gpu/drm/radeon/radeon.h b/drivers/gpu/drm/radeon/radeon.h
index 5777afb361de..e5d5271d7a9c 100644
--- a/drivers/gpu/drm/radeon/radeon.h
+++ b/drivers/gpu/drm/radeon/radeon.h
@@ -542,6 +542,9 @@ struct radeon_ring {
542 uint32_t ptr_mask; 542 uint32_t ptr_mask;
543 struct mutex mutex; 543 struct mutex mutex;
544 bool ready; 544 bool ready;
545 u32 ptr_reg_shift;
546 u32 ptr_reg_mask;
547 u32 nop;
545}; 548};
546 549
547/* 550/*
@@ -612,7 +615,8 @@ void radeon_ring_unlock_commit(struct radeon_device *rdev, struct radeon_ring *c
612void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *cp); 615void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *cp);
613int radeon_ring_test(struct radeon_device *rdev, struct radeon_ring *cp); 616int radeon_ring_test(struct radeon_device *rdev, struct radeon_ring *cp);
614int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size, 617int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *cp, unsigned ring_size,
615 unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg); 618 unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
619 u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop);
616void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *cp); 620void radeon_ring_fini(struct radeon_device *rdev, struct radeon_ring *cp);
617 621
618 622
diff --git a/drivers/gpu/drm/radeon/radeon_ring.c b/drivers/gpu/drm/radeon/radeon_ring.c
index b39a1d9306e5..133e2636cea0 100644
--- a/drivers/gpu/drm/radeon/radeon_ring.c
+++ b/drivers/gpu/drm/radeon/radeon_ring.c
@@ -305,10 +305,13 @@ int radeon_ring_index(struct radeon_device *rdev, struct radeon_ring *ring)
305 305
306void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring) 306void radeon_ring_free_size(struct radeon_device *rdev, struct radeon_ring *ring)
307{ 307{
308 u32 rptr;
309
308 if (rdev->wb.enabled) 310 if (rdev->wb.enabled)
309 ring->rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]); 311 rptr = le32_to_cpu(rdev->wb.wb[ring->rptr_offs/4]);
310 else 312 else
311 ring->rptr = RREG32(ring->rptr_reg); 313 rptr = RREG32(ring->rptr_reg);
314 ring->rptr = (rptr & ring->ptr_reg_mask) >> ring->ptr_reg_shift;
312 /* This works because ring_size is a power of 2 */ 315 /* This works because ring_size is a power of 2 */
313 ring->ring_free_dw = (ring->rptr + (ring->ring_size / 4)); 316 ring->ring_free_dw = (ring->rptr + (ring->ring_size / 4));
314 ring->ring_free_dw -= ring->wptr; 317 ring->ring_free_dw -= ring->wptr;
@@ -362,10 +365,10 @@ void radeon_ring_commit(struct radeon_device *rdev, struct radeon_ring *ring)
362 count_dw_pad = (ring->align_mask + 1) - 365 count_dw_pad = (ring->align_mask + 1) -
363 (ring->wptr & ring->align_mask); 366 (ring->wptr & ring->align_mask);
364 for (i = 0; i < count_dw_pad; i++) { 367 for (i = 0; i < count_dw_pad; i++) {
365 radeon_ring_write(ring, 2 << 30); 368 radeon_ring_write(ring, ring->nop);
366 } 369 }
367 DRM_MEMORYBARRIER(); 370 DRM_MEMORYBARRIER();
368 WREG32(ring->wptr_reg, ring->wptr); 371 WREG32(ring->wptr_reg, (ring->wptr << ring->ptr_reg_shift) & ring->ptr_reg_mask);
369 (void)RREG32(ring->wptr_reg); 372 (void)RREG32(ring->wptr_reg);
370} 373}
371 374
@@ -382,7 +385,8 @@ void radeon_ring_unlock_undo(struct radeon_device *rdev, struct radeon_ring *rin
382} 385}
383 386
384int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size, 387int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsigned ring_size,
385 unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg) 388 unsigned rptr_offs, unsigned rptr_reg, unsigned wptr_reg,
389 u32 ptr_reg_shift, u32 ptr_reg_mask, u32 nop)
386{ 390{
387 int r; 391 int r;
388 392
@@ -390,6 +394,9 @@ int radeon_ring_init(struct radeon_device *rdev, struct radeon_ring *ring, unsig
390 ring->rptr_offs = rptr_offs; 394 ring->rptr_offs = rptr_offs;
391 ring->rptr_reg = rptr_reg; 395 ring->rptr_reg = rptr_reg;
392 ring->wptr_reg = wptr_reg; 396 ring->wptr_reg = wptr_reg;
397 ring->ptr_reg_shift = ptr_reg_shift;
398 ring->ptr_reg_mask = ptr_reg_mask;
399 ring->nop = nop;
393 /* Allocate ring buffer */ 400 /* Allocate ring buffer */
394 if (ring->ring_obj == NULL) { 401 if (ring->ring_obj == NULL) {
395 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true, 402 r = radeon_bo_create(rdev, ring->ring_size, PAGE_SIZE, true,
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 0a1283d24027..d854fbfa5a52 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -1099,7 +1099,8 @@ static int rv770_startup(struct radeon_device *rdev)
1099 r600_irq_set(rdev); 1099 r600_irq_set(rdev);
1100 1100
1101 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET, 1101 r = radeon_ring_init(rdev, ring, ring->ring_size, RADEON_WB_CP_RPTR_OFFSET,
1102 R600_CP_RB_RPTR, R600_CP_RB_WPTR); 1102 R600_CP_RB_RPTR, R600_CP_RB_WPTR,
1103 0, 0xfffff, RADEON_CP_PACKET2);
1103 if (r) 1104 if (r)
1104 return r; 1105 return r;
1105 r = rv770_cp_load_microcode(rdev); 1106 r = rv770_cp_load_microcode(rdev);