diff options
Diffstat (limited to 'drivers')
-rw-r--r-- | drivers/gpu/drm/i915/i915_dma.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_drv.h | 6 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_suspend.c | 4 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 50 |
4 files changed, 30 insertions, 34 deletions
diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index e1787022d6c8..1315a882275c 100644 --- a/drivers/gpu/drm/i915/i915_dma.c +++ b/drivers/gpu/drm/i915/i915_dma.c | |||
@@ -1073,6 +1073,9 @@ static void i915_setup_compression(struct drm_device *dev, int size) | |||
1073 | unsigned long cfb_base; | 1073 | unsigned long cfb_base; |
1074 | unsigned long ll_base = 0; | 1074 | unsigned long ll_base = 0; |
1075 | 1075 | ||
1076 | /* Just in case the BIOS is doing something questionable. */ | ||
1077 | intel_disable_fbc(dev); | ||
1078 | |||
1076 | compressed_fb = drm_mm_search_free(&dev_priv->mm.stolen, size, 4096, 0); | 1079 | compressed_fb = drm_mm_search_free(&dev_priv->mm.stolen, size, 4096, 0); |
1077 | if (compressed_fb) | 1080 | if (compressed_fb) |
1078 | compressed_fb = drm_mm_get_block(compressed_fb, size, 4096); | 1081 | compressed_fb = drm_mm_get_block(compressed_fb, size, 4096); |
@@ -1099,7 +1102,6 @@ static void i915_setup_compression(struct drm_device *dev, int size) | |||
1099 | 1102 | ||
1100 | dev_priv->cfb_size = size; | 1103 | dev_priv->cfb_size = size; |
1101 | 1104 | ||
1102 | intel_disable_fbc(dev); | ||
1103 | dev_priv->compressed_fb = compressed_fb; | 1105 | dev_priv->compressed_fb = compressed_fb; |
1104 | if (HAS_PCH_SPLIT(dev)) | 1106 | if (HAS_PCH_SPLIT(dev)) |
1105 | I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb->start); | 1107 | I915_WRITE(ILK_DPFC_CB_BASE, compressed_fb->start); |
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index a15f2c04f6a5..56cb1c4fe73e 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h | |||
@@ -1289,12 +1289,8 @@ extern void intel_modeset_init(struct drm_device *dev); | |||
1289 | extern void intel_modeset_gem_init(struct drm_device *dev); | 1289 | extern void intel_modeset_gem_init(struct drm_device *dev); |
1290 | extern void intel_modeset_cleanup(struct drm_device *dev); | 1290 | extern void intel_modeset_cleanup(struct drm_device *dev); |
1291 | extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state); | 1291 | extern int intel_modeset_vga_set_state(struct drm_device *dev, bool state); |
1292 | extern void i8xx_disable_fbc(struct drm_device *dev); | ||
1293 | extern void g4x_disable_fbc(struct drm_device *dev); | ||
1294 | extern void ironlake_disable_fbc(struct drm_device *dev); | ||
1295 | extern void intel_disable_fbc(struct drm_device *dev); | ||
1296 | extern void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval); | ||
1297 | extern bool intel_fbc_enabled(struct drm_device *dev); | 1292 | extern bool intel_fbc_enabled(struct drm_device *dev); |
1293 | extern void intel_disable_fbc(struct drm_device *dev); | ||
1298 | extern bool ironlake_set_drps(struct drm_device *dev, u8 val); | 1294 | extern bool ironlake_set_drps(struct drm_device *dev, u8 val); |
1299 | extern void ironlake_enable_rc6(struct drm_device *dev); | 1295 | extern void ironlake_enable_rc6(struct drm_device *dev); |
1300 | extern void gen6_set_rps(struct drm_device *dev, u8 val); | 1296 | extern void gen6_set_rps(struct drm_device *dev, u8 val); |
diff --git a/drivers/gpu/drm/i915/i915_suspend.c b/drivers/gpu/drm/i915/i915_suspend.c index 8cd1c8b00660..285758603ac8 100644 --- a/drivers/gpu/drm/i915/i915_suspend.c +++ b/drivers/gpu/drm/i915/i915_suspend.c | |||
@@ -760,15 +760,13 @@ static void i915_restore_display(struct drm_device *dev) | |||
760 | /* FIXME: restore TV & SDVO state */ | 760 | /* FIXME: restore TV & SDVO state */ |
761 | 761 | ||
762 | /* only restore FBC info on the platform that supports FBC*/ | 762 | /* only restore FBC info on the platform that supports FBC*/ |
763 | intel_disable_fbc(dev); | ||
763 | if (I915_HAS_FBC(dev)) { | 764 | if (I915_HAS_FBC(dev)) { |
764 | if (HAS_PCH_SPLIT(dev)) { | 765 | if (HAS_PCH_SPLIT(dev)) { |
765 | ironlake_disable_fbc(dev); | ||
766 | I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE); | 766 | I915_WRITE(ILK_DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE); |
767 | } else if (IS_GM45(dev)) { | 767 | } else if (IS_GM45(dev)) { |
768 | g4x_disable_fbc(dev); | ||
769 | I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE); | 768 | I915_WRITE(DPFC_CB_BASE, dev_priv->saveDPFC_CB_BASE); |
770 | } else { | 769 | } else { |
771 | i8xx_disable_fbc(dev); | ||
772 | I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); | 770 | I915_WRITE(FBC_CFB_BASE, dev_priv->saveFBC_CFB_BASE); |
773 | I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); | 771 | I915_WRITE(FBC_LL_BASE, dev_priv->saveFBC_LL_BASE); |
774 | I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); | 772 | I915_WRITE(FBC_CONTROL2, dev_priv->saveFBC_CONTROL2); |
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index af3e5813366c..092361153957 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c | |||
@@ -1384,6 +1384,28 @@ static void intel_disable_pch_ports(struct drm_i915_private *dev_priv, | |||
1384 | disable_pch_hdmi(dev_priv, pipe, HDMID); | 1384 | disable_pch_hdmi(dev_priv, pipe, HDMID); |
1385 | } | 1385 | } |
1386 | 1386 | ||
1387 | static void i8xx_disable_fbc(struct drm_device *dev) | ||
1388 | { | ||
1389 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
1390 | u32 fbc_ctl; | ||
1391 | |||
1392 | /* Disable compression */ | ||
1393 | fbc_ctl = I915_READ(FBC_CONTROL); | ||
1394 | if ((fbc_ctl & FBC_CTL_EN) == 0) | ||
1395 | return; | ||
1396 | |||
1397 | fbc_ctl &= ~FBC_CTL_EN; | ||
1398 | I915_WRITE(FBC_CONTROL, fbc_ctl); | ||
1399 | |||
1400 | /* Wait for compressing bit to clear */ | ||
1401 | if (wait_for((I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING) == 0, 10)) { | ||
1402 | DRM_DEBUG_KMS("FBC idle timed out\n"); | ||
1403 | return; | ||
1404 | } | ||
1405 | |||
1406 | DRM_DEBUG_KMS("disabled FBC\n"); | ||
1407 | } | ||
1408 | |||
1387 | static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | 1409 | static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) |
1388 | { | 1410 | { |
1389 | struct drm_device *dev = crtc->dev; | 1411 | struct drm_device *dev = crtc->dev; |
@@ -1439,28 +1461,6 @@ static void i8xx_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1439 | dev_priv->cfb_pitch, crtc->y, dev_priv->cfb_plane); | 1461 | dev_priv->cfb_pitch, crtc->y, dev_priv->cfb_plane); |
1440 | } | 1462 | } |
1441 | 1463 | ||
1442 | void i8xx_disable_fbc(struct drm_device *dev) | ||
1443 | { | ||
1444 | struct drm_i915_private *dev_priv = dev->dev_private; | ||
1445 | u32 fbc_ctl; | ||
1446 | |||
1447 | /* Disable compression */ | ||
1448 | fbc_ctl = I915_READ(FBC_CONTROL); | ||
1449 | if ((fbc_ctl & FBC_CTL_EN) == 0) | ||
1450 | return; | ||
1451 | |||
1452 | fbc_ctl &= ~FBC_CTL_EN; | ||
1453 | I915_WRITE(FBC_CONTROL, fbc_ctl); | ||
1454 | |||
1455 | /* Wait for compressing bit to clear */ | ||
1456 | if (wait_for((I915_READ(FBC_STATUS) & FBC_STAT_COMPRESSING) == 0, 10)) { | ||
1457 | DRM_DEBUG_KMS("FBC idle timed out\n"); | ||
1458 | return; | ||
1459 | } | ||
1460 | |||
1461 | DRM_DEBUG_KMS("disabled FBC\n"); | ||
1462 | } | ||
1463 | |||
1464 | static bool i8xx_fbc_enabled(struct drm_device *dev) | 1464 | static bool i8xx_fbc_enabled(struct drm_device *dev) |
1465 | { | 1465 | { |
1466 | struct drm_i915_private *dev_priv = dev->dev_private; | 1466 | struct drm_i915_private *dev_priv = dev->dev_private; |
@@ -1516,7 +1516,7 @@ static void g4x_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1516 | DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); | 1516 | DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); |
1517 | } | 1517 | } |
1518 | 1518 | ||
1519 | void g4x_disable_fbc(struct drm_device *dev) | 1519 | static void g4x_disable_fbc(struct drm_device *dev) |
1520 | { | 1520 | { |
1521 | struct drm_i915_private *dev_priv = dev->dev_private; | 1521 | struct drm_i915_private *dev_priv = dev->dev_private; |
1522 | u32 dpfc_ctl; | 1522 | u32 dpfc_ctl; |
@@ -1616,7 +1616,7 @@ static void ironlake_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | |||
1616 | DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); | 1616 | DRM_DEBUG_KMS("enabled fbc on plane %d\n", intel_crtc->plane); |
1617 | } | 1617 | } |
1618 | 1618 | ||
1619 | void ironlake_disable_fbc(struct drm_device *dev) | 1619 | static void ironlake_disable_fbc(struct drm_device *dev) |
1620 | { | 1620 | { |
1621 | struct drm_i915_private *dev_priv = dev->dev_private; | 1621 | struct drm_i915_private *dev_priv = dev->dev_private; |
1622 | u32 dpfc_ctl; | 1622 | u32 dpfc_ctl; |
@@ -1648,7 +1648,7 @@ bool intel_fbc_enabled(struct drm_device *dev) | |||
1648 | return dev_priv->display.fbc_enabled(dev); | 1648 | return dev_priv->display.fbc_enabled(dev); |
1649 | } | 1649 | } |
1650 | 1650 | ||
1651 | void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) | 1651 | static void intel_enable_fbc(struct drm_crtc *crtc, unsigned long interval) |
1652 | { | 1652 | { |
1653 | struct drm_i915_private *dev_priv = crtc->dev->dev_private; | 1653 | struct drm_i915_private *dev_priv = crtc->dev->dev_private; |
1654 | 1654 | ||