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-rw-r--r--drivers/block/nvme-core.c99
-rw-r--r--drivers/block/zram/zram_drv.c2
-rw-r--r--drivers/clocksource/Kconfig16
-rw-r--r--drivers/clocksource/mtk_timer.c9
-rw-r--r--drivers/clocksource/pxa_timer.c2
-rw-r--r--drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c10
-rw-r--r--drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h8
-rw-r--r--drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c2
-rw-r--r--drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c2
-rw-r--r--drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c2
-rw-r--r--drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c3
-rw-r--r--drivers/gpu/drm/drm_crtc.c3
-rw-r--r--drivers/gpu/drm/i915/i915_drv.h15
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c3
-rw-r--r--drivers/gpu/drm/i915/i915_gem_stolen.c6
-rw-r--r--drivers/gpu/drm/i915/i915_gem_tiling.c7
-rw-r--r--drivers/gpu/drm/i915/i915_irq.c22
-rw-r--r--drivers/gpu/drm/i915/intel_display.c33
-rw-r--r--drivers/gpu/drm/i915/intel_lrc.c8
-rw-r--r--drivers/gpu/drm/radeon/atombios_dp.c7
-rw-r--r--drivers/gpu/drm/radeon/atombios_encoders.c21
-rw-r--r--drivers/gpu/drm/radeon/cik.c8
-rw-r--r--drivers/gpu/drm/radeon/cikd.h4
-rw-r--r--drivers/gpu/drm/radeon/evergreen.c7
-rw-r--r--drivers/gpu/drm/radeon/evergreend.h4
-rw-r--r--drivers/gpu/drm/radeon/ni.c10
-rw-r--r--drivers/gpu/drm/radeon/nid.h4
-rw-r--r--drivers/gpu/drm/radeon/r600_dpm.c2
-rw-r--r--drivers/gpu/drm/radeon/radeon_cs.c16
-rw-r--r--drivers/gpu/drm/radeon/radeon_encoders.c3
-rw-r--r--drivers/gpu/drm/radeon/radeon_pm.c6
-rw-r--r--drivers/gpu/drm/radeon/si.c22
-rw-r--r--drivers/gpu/drm/radeon/sid.h4
-rw-r--r--drivers/gpu/drm/tegra/dc.c79
-rw-r--r--drivers/gpu/drm/tegra/hdmi.c8
-rw-r--r--drivers/hid/hid-core.c2
-rw-r--r--drivers/hid/hid-ids.h2
-rw-r--r--drivers/hid/hid-microsoft.c2
-rw-r--r--drivers/hid/hid-saitek.c2
-rw-r--r--drivers/hid/hid-sensor-hub.c8
-rw-r--r--drivers/hid/hid-sony.c6
-rw-r--r--drivers/hid/i2c-hid/i2c-hid.c7
-rw-r--r--drivers/hid/wacom_wac.c11
-rw-r--r--drivers/hwmon/ads7828.c3
-rw-r--r--drivers/rtc/rtc-ds1685.c18
-rw-r--r--drivers/sh/pm_runtime.c2
-rw-r--r--drivers/xen/Makefile2
-rw-r--r--drivers/xen/preempt.c44
-rw-r--r--drivers/xen/privcmd.c2
-rw-r--r--drivers/xen/xen-scsiback.c14
50 files changed, 399 insertions, 183 deletions
diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c
index b64bccbb78c9..ceb32dd52a6c 100644
--- a/drivers/block/nvme-core.c
+++ b/drivers/block/nvme-core.c
@@ -482,6 +482,7 @@ static int nvme_error_status(u16 status)
482 } 482 }
483} 483}
484 484
485#ifdef CONFIG_BLK_DEV_INTEGRITY
485static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi) 486static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
486{ 487{
487 if (be32_to_cpu(pi->ref_tag) == v) 488 if (be32_to_cpu(pi->ref_tag) == v)
@@ -538,6 +539,58 @@ static void nvme_dif_remap(struct request *req,
538 kunmap_atomic(pmap); 539 kunmap_atomic(pmap);
539} 540}
540 541
542static int nvme_noop_verify(struct blk_integrity_iter *iter)
543{
544 return 0;
545}
546
547static int nvme_noop_generate(struct blk_integrity_iter *iter)
548{
549 return 0;
550}
551
552struct blk_integrity nvme_meta_noop = {
553 .name = "NVME_META_NOOP",
554 .generate_fn = nvme_noop_generate,
555 .verify_fn = nvme_noop_verify,
556};
557
558static void nvme_init_integrity(struct nvme_ns *ns)
559{
560 struct blk_integrity integrity;
561
562 switch (ns->pi_type) {
563 case NVME_NS_DPS_PI_TYPE3:
564 integrity = t10_pi_type3_crc;
565 break;
566 case NVME_NS_DPS_PI_TYPE1:
567 case NVME_NS_DPS_PI_TYPE2:
568 integrity = t10_pi_type1_crc;
569 break;
570 default:
571 integrity = nvme_meta_noop;
572 break;
573 }
574 integrity.tuple_size = ns->ms;
575 blk_integrity_register(ns->disk, &integrity);
576 blk_queue_max_integrity_segments(ns->queue, 1);
577}
578#else /* CONFIG_BLK_DEV_INTEGRITY */
579static void nvme_dif_remap(struct request *req,
580 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
581{
582}
583static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
584{
585}
586static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
587{
588}
589static void nvme_init_integrity(struct nvme_ns *ns)
590{
591}
592#endif
593
541static void req_completion(struct nvme_queue *nvmeq, void *ctx, 594static void req_completion(struct nvme_queue *nvmeq, void *ctx,
542 struct nvme_completion *cqe) 595 struct nvme_completion *cqe)
543{ 596{
@@ -1959,43 +2012,6 @@ static void nvme_config_discard(struct nvme_ns *ns)
1959 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue); 2012 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1960} 2013}
1961 2014
1962static int nvme_noop_verify(struct blk_integrity_iter *iter)
1963{
1964 return 0;
1965}
1966
1967static int nvme_noop_generate(struct blk_integrity_iter *iter)
1968{
1969 return 0;
1970}
1971
1972struct blk_integrity nvme_meta_noop = {
1973 .name = "NVME_META_NOOP",
1974 .generate_fn = nvme_noop_generate,
1975 .verify_fn = nvme_noop_verify,
1976};
1977
1978static void nvme_init_integrity(struct nvme_ns *ns)
1979{
1980 struct blk_integrity integrity;
1981
1982 switch (ns->pi_type) {
1983 case NVME_NS_DPS_PI_TYPE3:
1984 integrity = t10_pi_type3_crc;
1985 break;
1986 case NVME_NS_DPS_PI_TYPE1:
1987 case NVME_NS_DPS_PI_TYPE2:
1988 integrity = t10_pi_type1_crc;
1989 break;
1990 default:
1991 integrity = nvme_meta_noop;
1992 break;
1993 }
1994 integrity.tuple_size = ns->ms;
1995 blk_integrity_register(ns->disk, &integrity);
1996 blk_queue_max_integrity_segments(ns->queue, 1);
1997}
1998
1999static int nvme_revalidate_disk(struct gendisk *disk) 2015static int nvme_revalidate_disk(struct gendisk *disk)
2000{ 2016{
2001 struct nvme_ns *ns = disk->private_data; 2017 struct nvme_ns *ns = disk->private_data;
@@ -2036,7 +2052,8 @@ static int nvme_revalidate_disk(struct gendisk *disk)
2036 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ? 2052 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2037 id->dps & NVME_NS_DPS_PI_MASK : 0; 2053 id->dps & NVME_NS_DPS_PI_MASK : 0;
2038 2054
2039 if (disk->integrity && (ns->pi_type != pi_type || ns->ms != old_ms || 2055 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2056 ns->ms != old_ms ||
2040 bs != queue_logical_block_size(disk->queue) || 2057 bs != queue_logical_block_size(disk->queue) ||
2041 (ns->ms && id->flbas & NVME_NS_FLBAS_META_EXT))) 2058 (ns->ms && id->flbas & NVME_NS_FLBAS_META_EXT)))
2042 blk_integrity_unregister(disk); 2059 blk_integrity_unregister(disk);
@@ -2044,11 +2061,11 @@ static int nvme_revalidate_disk(struct gendisk *disk)
2044 ns->pi_type = pi_type; 2061 ns->pi_type = pi_type;
2045 blk_queue_logical_block_size(ns->queue, bs); 2062 blk_queue_logical_block_size(ns->queue, bs);
2046 2063
2047 if (ns->ms && !disk->integrity && (disk->flags & GENHD_FL_UP) && 2064 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2048 !(id->flbas & NVME_NS_FLBAS_META_EXT)) 2065 !(id->flbas & NVME_NS_FLBAS_META_EXT))
2049 nvme_init_integrity(ns); 2066 nvme_init_integrity(ns);
2050 2067
2051 if (id->ncap == 0 || (ns->ms && !disk->integrity)) 2068 if (id->ncap == 0 || (ns->ms && !blk_get_integrity(disk)))
2052 set_capacity(disk, 0); 2069 set_capacity(disk, 0);
2053 else 2070 else
2054 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9)); 2071 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
@@ -2652,7 +2669,7 @@ static void nvme_dev_remove(struct nvme_dev *dev)
2652 2669
2653 list_for_each_entry(ns, &dev->namespaces, list) { 2670 list_for_each_entry(ns, &dev->namespaces, list) {
2654 if (ns->disk->flags & GENHD_FL_UP) { 2671 if (ns->disk->flags & GENHD_FL_UP) {
2655 if (ns->disk->integrity) 2672 if (blk_get_integrity(ns->disk))
2656 blk_integrity_unregister(ns->disk); 2673 blk_integrity_unregister(ns->disk);
2657 del_gendisk(ns->disk); 2674 del_gendisk(ns->disk);
2658 } 2675 }
diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c
index 8e233edd7a09..871bd3550cb0 100644
--- a/drivers/block/zram/zram_drv.c
+++ b/drivers/block/zram/zram_drv.c
@@ -528,7 +528,7 @@ out_cleanup:
528static inline void update_used_max(struct zram *zram, 528static inline void update_used_max(struct zram *zram,
529 const unsigned long pages) 529 const unsigned long pages)
530{ 530{
531 int old_max, cur_max; 531 unsigned long old_max, cur_max;
532 532
533 old_max = atomic_long_read(&zram->stats.max_used_pages); 533 old_max = atomic_long_read(&zram->stats.max_used_pages);
534 534
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 1c2506f68122..68161f7a07d6 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -63,6 +63,11 @@ config VT8500_TIMER
63config CADENCE_TTC_TIMER 63config CADENCE_TTC_TIMER
64 bool 64 bool
65 65
66config ASM9260_TIMER
67 bool
68 select CLKSRC_MMIO
69 select CLKSRC_OF
70
66config CLKSRC_NOMADIK_MTU 71config CLKSRC_NOMADIK_MTU
67 bool 72 bool
68 depends on (ARCH_NOMADIK || ARCH_U8500) 73 depends on (ARCH_NOMADIK || ARCH_U8500)
@@ -245,15 +250,4 @@ config CLKSRC_PXA
245 help 250 help
246 This enables OST0 support available on PXA and SA-11x0 251 This enables OST0 support available on PXA and SA-11x0
247 platforms. 252 platforms.
248
249config ASM9260_TIMER
250 bool "Alphascale ASM9260 timer driver"
251 depends on GENERIC_CLOCKEVENTS
252 select CLKSRC_MMIO
253 select CLKSRC_OF
254 default y if MACH_ASM9260
255 help
256 This enables build of a clocksource and clockevent driver for
257 the 32-bit System Timer hardware available on a Alphascale ASM9260.
258
259endmenu 253endmenu
diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
index 32a3d25795d3..68ab42356d0e 100644
--- a/drivers/clocksource/mtk_timer.c
+++ b/drivers/clocksource/mtk_timer.c
@@ -224,6 +224,8 @@ static void __init mtk_timer_init(struct device_node *node)
224 } 224 }
225 rate = clk_get_rate(clk); 225 rate = clk_get_rate(clk);
226 226
227 mtk_timer_global_reset(evt);
228
227 if (request_irq(evt->dev.irq, mtk_timer_interrupt, 229 if (request_irq(evt->dev.irq, mtk_timer_interrupt,
228 IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt)) { 230 IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt)) {
229 pr_warn("failed to setup irq %d\n", evt->dev.irq); 231 pr_warn("failed to setup irq %d\n", evt->dev.irq);
@@ -232,8 +234,6 @@ static void __init mtk_timer_init(struct device_node *node)
232 234
233 evt->ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); 235 evt->ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
234 236
235 mtk_timer_global_reset(evt);
236
237 /* Configure clock source */ 237 /* Configure clock source */
238 mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN); 238 mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN);
239 clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), 239 clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC),
@@ -241,10 +241,11 @@ static void __init mtk_timer_init(struct device_node *node)
241 241
242 /* Configure clock event */ 242 /* Configure clock event */
243 mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT); 243 mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT);
244 mtk_timer_enable_irq(evt, GPT_CLK_EVT);
245
246 clockevents_config_and_register(&evt->dev, rate, 0x3, 244 clockevents_config_and_register(&evt->dev, rate, 0x3,
247 0xffffffff); 245 0xffffffff);
246
247 mtk_timer_enable_irq(evt, GPT_CLK_EVT);
248
248 return; 249 return;
249 250
250err_clk_disable: 251err_clk_disable:
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index 941f3f344e08..d9438af2bbd6 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -163,7 +163,7 @@ static struct irqaction pxa_ost0_irq = {
163 .dev_id = &ckevt_pxa_osmr0, 163 .dev_id = &ckevt_pxa_osmr0,
164}; 164};
165 165
166static void pxa_timer_common_init(int irq, unsigned long clock_tick_rate) 166static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
167{ 167{
168 timer_writel(0, OIER); 168 timer_writel(0, OIER);
169 timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); 169 timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index b3589d0e39b9..910ff8ab9c9c 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -62,12 +62,18 @@ enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
62 return KFD_MQD_TYPE_CP; 62 return KFD_MQD_TYPE_CP;
63} 63}
64 64
65static inline unsigned int get_first_pipe(struct device_queue_manager *dqm) 65unsigned int get_first_pipe(struct device_queue_manager *dqm)
66{ 66{
67 BUG_ON(!dqm); 67 BUG_ON(!dqm || !dqm->dev);
68 return dqm->dev->shared_resources.first_compute_pipe; 68 return dqm->dev->shared_resources.first_compute_pipe;
69} 69}
70 70
71unsigned int get_pipes_num(struct device_queue_manager *dqm)
72{
73 BUG_ON(!dqm || !dqm->dev);
74 return dqm->dev->shared_resources.compute_pipe_count;
75}
76
71static inline unsigned int get_pipes_num_cpsch(void) 77static inline unsigned int get_pipes_num_cpsch(void)
72{ 78{
73 return PIPE_PER_ME_CP_SCHEDULING; 79 return PIPE_PER_ME_CP_SCHEDULING;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
index d64f86cda34f..488f51d19427 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
@@ -163,6 +163,8 @@ void program_sh_mem_settings(struct device_queue_manager *dqm,
163 struct qcm_process_device *qpd); 163 struct qcm_process_device *qpd);
164int init_pipelines(struct device_queue_manager *dqm, 164int init_pipelines(struct device_queue_manager *dqm,
165 unsigned int pipes_num, unsigned int first_pipe); 165 unsigned int pipes_num, unsigned int first_pipe);
166unsigned int get_first_pipe(struct device_queue_manager *dqm);
167unsigned int get_pipes_num(struct device_queue_manager *dqm);
166 168
167extern inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd) 169extern inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
168{ 170{
@@ -175,10 +177,4 @@ get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd)
175 return (pdd->lds_base >> 60) & 0x0E; 177 return (pdd->lds_base >> 60) & 0x0E;
176} 178}
177 179
178extern inline unsigned int get_pipes_num(struct device_queue_manager *dqm)
179{
180 BUG_ON(!dqm || !dqm->dev);
181 return dqm->dev->shared_resources.compute_pipe_count;
182}
183
184#endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */ 180#endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
index 6b072466e2a6..5469efe0523e 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
@@ -131,5 +131,5 @@ static int register_process_cik(struct device_queue_manager *dqm,
131 131
132static int initialize_cpsch_cik(struct device_queue_manager *dqm) 132static int initialize_cpsch_cik(struct device_queue_manager *dqm)
133{ 133{
134 return init_pipelines(dqm, get_pipes_num(dqm), 0); 134 return init_pipelines(dqm, get_pipes_num(dqm), get_first_pipe(dqm));
135} 135}
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 0409b907de5d..b3e3068c6ec0 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -153,7 +153,7 @@ static int atmel_hlcdc_crtc_mode_set(struct drm_crtc *c,
153 (adj->crtc_hdisplay - 1) | 153 (adj->crtc_hdisplay - 1) |
154 ((adj->crtc_vdisplay - 1) << 16)); 154 ((adj->crtc_vdisplay - 1) << 16));
155 155
156 cfg = ATMEL_HLCDC_CLKPOL; 156 cfg = 0;
157 157
158 prate = clk_get_rate(crtc->dc->hlcdc->sys_clk); 158 prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
159 mode_rate = mode->crtc_clock * 1000; 159 mode_rate = mode->crtc_clock * 1000;
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
index 7320a6c6613f..c1cb17493e0d 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
@@ -311,8 +311,6 @@ static int atmel_hlcdc_dc_load(struct drm_device *dev)
311 311
312 pm_runtime_enable(dev->dev); 312 pm_runtime_enable(dev->dev);
313 313
314 pm_runtime_put_sync(dev->dev);
315
316 ret = atmel_hlcdc_dc_modeset_init(dev); 314 ret = atmel_hlcdc_dc_modeset_init(dev);
317 if (ret < 0) { 315 if (ret < 0) {
318 dev_err(dev->dev, "failed to initialize mode setting\n"); 316 dev_err(dev->dev, "failed to initialize mode setting\n");
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
index 063d2a7b941f..e79bd9ba474b 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
@@ -311,7 +311,8 @@ int atmel_hlcdc_layer_disable(struct atmel_hlcdc_layer *layer)
311 311
312 /* Disable the layer */ 312 /* Disable the layer */
313 regmap_write(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_CHDR, 313 regmap_write(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_CHDR,
314 ATMEL_HLCDC_LAYER_RST); 314 ATMEL_HLCDC_LAYER_RST | ATMEL_HLCDC_LAYER_A2Q |
315 ATMEL_HLCDC_LAYER_UPDATE);
315 316
316 /* Clear all pending interrupts */ 317 /* Clear all pending interrupts */
317 regmap_read(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_ISR, &isr); 318 regmap_read(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_ISR, &isr);
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 6b00173d1be4..6b6b07ff720b 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -2127,7 +2127,6 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
2127 DRM_DEBUG_KMS("[CONNECTOR:%d:?]\n", out_resp->connector_id); 2127 DRM_DEBUG_KMS("[CONNECTOR:%d:?]\n", out_resp->connector_id);
2128 2128
2129 mutex_lock(&dev->mode_config.mutex); 2129 mutex_lock(&dev->mode_config.mutex);
2130 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
2131 2130
2132 connector = drm_connector_find(dev, out_resp->connector_id); 2131 connector = drm_connector_find(dev, out_resp->connector_id);
2133 if (!connector) { 2132 if (!connector) {
@@ -2157,6 +2156,8 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
2157 out_resp->mm_height = connector->display_info.height_mm; 2156 out_resp->mm_height = connector->display_info.height_mm;
2158 out_resp->subpixel = connector->display_info.subpixel_order; 2157 out_resp->subpixel = connector->display_info.subpixel_order;
2159 out_resp->connection = connector->status; 2158 out_resp->connection = connector->status;
2159
2160 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
2160 encoder = drm_connector_get_encoder(connector); 2161 encoder = drm_connector_get_encoder(connector);
2161 if (encoder) 2162 if (encoder)
2162 out_resp->encoder_id = encoder->base.id; 2163 out_resp->encoder_id = encoder->base.id;
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f2a825e39646..8727086cf48c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2114,6 +2114,9 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
2114 * number comparisons on buffer last_read|write_seqno. It also allows an 2114 * number comparisons on buffer last_read|write_seqno. It also allows an
2115 * emission time to be associated with the request for tracking how far ahead 2115 * emission time to be associated with the request for tracking how far ahead
2116 * of the GPU the submission is. 2116 * of the GPU the submission is.
2117 *
2118 * The requests are reference counted, so upon creation they should have an
2119 * initial reference taken using kref_init
2117 */ 2120 */
2118struct drm_i915_gem_request { 2121struct drm_i915_gem_request {
2119 struct kref ref; 2122 struct kref ref;
@@ -2137,7 +2140,16 @@ struct drm_i915_gem_request {
2137 /** Position in the ringbuffer of the end of the whole request */ 2140 /** Position in the ringbuffer of the end of the whole request */
2138 u32 tail; 2141 u32 tail;
2139 2142
2140 /** Context related to this request */ 2143 /**
2144 * Context related to this request
2145 * Contexts are refcounted, so when this request is associated with a
2146 * context, we must increment the context's refcount, to guarantee that
2147 * it persists while any request is linked to it. Requests themselves
2148 * are also refcounted, so the request will only be freed when the last
2149 * reference to it is dismissed, and the code in
2150 * i915_gem_request_free() will then decrement the refcount on the
2151 * context.
2152 */
2141 struct intel_context *ctx; 2153 struct intel_context *ctx;
2142 2154
2143 /** Batch buffer related to this request if any */ 2155 /** Batch buffer related to this request if any */
@@ -2374,6 +2386,7 @@ struct drm_i915_cmd_table {
2374 (INTEL_DEVID(dev) & 0xFF00) == 0x0C00) 2386 (INTEL_DEVID(dev) & 0xFF00) == 0x0C00)
2375#define IS_BDW_ULT(dev) (IS_BROADWELL(dev) && \ 2387#define IS_BDW_ULT(dev) (IS_BROADWELL(dev) && \
2376 ((INTEL_DEVID(dev) & 0xf) == 0x6 || \ 2388 ((INTEL_DEVID(dev) & 0xf) == 0x6 || \
2389 (INTEL_DEVID(dev) & 0xf) == 0xb || \
2377 (INTEL_DEVID(dev) & 0xf) == 0xe)) 2390 (INTEL_DEVID(dev) & 0xf) == 0xe))
2378#define IS_BDW_GT3(dev) (IS_BROADWELL(dev) && \ 2391#define IS_BDW_GT3(dev) (IS_BROADWELL(dev) && \
2379 (INTEL_DEVID(dev) & 0x00F0) == 0x0020) 2392 (INTEL_DEVID(dev) & 0x00F0) == 0x0020)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c26d36cc4b31..e5daad5f75fb 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2659,8 +2659,7 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
2659 if (submit_req->ctx != ring->default_context) 2659 if (submit_req->ctx != ring->default_context)
2660 intel_lr_context_unpin(ring, submit_req->ctx); 2660 intel_lr_context_unpin(ring, submit_req->ctx);
2661 2661
2662 i915_gem_context_unreference(submit_req->ctx); 2662 i915_gem_request_unreference(submit_req);
2663 kfree(submit_req);
2664 } 2663 }
2665 2664
2666 /* 2665 /*
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index a2045848bd1a..9c6f93ec886b 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -485,10 +485,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
485 stolen_offset, gtt_offset, size); 485 stolen_offset, gtt_offset, size);
486 486
487 /* KISS and expect everything to be page-aligned */ 487 /* KISS and expect everything to be page-aligned */
488 BUG_ON(stolen_offset & 4095); 488 if (WARN_ON(size == 0) || WARN_ON(size & 4095) ||
489 BUG_ON(size & 4095); 489 WARN_ON(stolen_offset & 4095))
490
491 if (WARN_ON(size == 0))
492 return NULL; 490 return NULL;
493 491
494 stolen = kzalloc(sizeof(*stolen), GFP_KERNEL); 492 stolen = kzalloc(sizeof(*stolen), GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 7a24bd1a51f6..6377b22269ad 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -335,9 +335,10 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
335 return -EINVAL; 335 return -EINVAL;
336 } 336 }
337 337
338 mutex_lock(&dev->struct_mutex);
338 if (i915_gem_obj_is_pinned(obj) || obj->framebuffer_references) { 339 if (i915_gem_obj_is_pinned(obj) || obj->framebuffer_references) {
339 drm_gem_object_unreference_unlocked(&obj->base); 340 ret = -EBUSY;
340 return -EBUSY; 341 goto err;
341 } 342 }
342 343
343 if (args->tiling_mode == I915_TILING_NONE) { 344 if (args->tiling_mode == I915_TILING_NONE) {
@@ -369,7 +370,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
369 } 370 }
370 } 371 }
371 372
372 mutex_lock(&dev->struct_mutex);
373 if (args->tiling_mode != obj->tiling_mode || 373 if (args->tiling_mode != obj->tiling_mode ||
374 args->stride != obj->stride) { 374 args->stride != obj->stride) {
375 /* We need to rebind the object if its current allocation 375 /* We need to rebind the object if its current allocation
@@ -424,6 +424,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
424 obj->bit_17 = NULL; 424 obj->bit_17 = NULL;
425 } 425 }
426 426
427err:
427 drm_gem_object_unreference(&obj->base); 428 drm_gem_object_unreference(&obj->base);
428 mutex_unlock(&dev->struct_mutex); 429 mutex_unlock(&dev->struct_mutex);
429 430
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4145d95902f5..ede5bbbd8a08 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1892,6 +1892,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
1892 u32 iir, gt_iir, pm_iir; 1892 u32 iir, gt_iir, pm_iir;
1893 irqreturn_t ret = IRQ_NONE; 1893 irqreturn_t ret = IRQ_NONE;
1894 1894
1895 if (!intel_irqs_enabled(dev_priv))
1896 return IRQ_NONE;
1897
1895 while (true) { 1898 while (true) {
1896 /* Find, clear, then process each source of interrupt */ 1899 /* Find, clear, then process each source of interrupt */
1897 1900
@@ -1936,6 +1939,9 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
1936 u32 master_ctl, iir; 1939 u32 master_ctl, iir;
1937 irqreturn_t ret = IRQ_NONE; 1940 irqreturn_t ret = IRQ_NONE;
1938 1941
1942 if (!intel_irqs_enabled(dev_priv))
1943 return IRQ_NONE;
1944
1939 for (;;) { 1945 for (;;) {
1940 master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL; 1946 master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL;
1941 iir = I915_READ(VLV_IIR); 1947 iir = I915_READ(VLV_IIR);
@@ -2208,6 +2214,9 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
2208 u32 de_iir, gt_iir, de_ier, sde_ier = 0; 2214 u32 de_iir, gt_iir, de_ier, sde_ier = 0;
2209 irqreturn_t ret = IRQ_NONE; 2215 irqreturn_t ret = IRQ_NONE;
2210 2216
2217 if (!intel_irqs_enabled(dev_priv))
2218 return IRQ_NONE;
2219
2211 /* We get interrupts on unclaimed registers, so check for this before we 2220 /* We get interrupts on unclaimed registers, so check for this before we
2212 * do any I915_{READ,WRITE}. */ 2221 * do any I915_{READ,WRITE}. */
2213 intel_uncore_check_errors(dev); 2222 intel_uncore_check_errors(dev);
@@ -2279,6 +2288,9 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
2279 enum pipe pipe; 2288 enum pipe pipe;
2280 u32 aux_mask = GEN8_AUX_CHANNEL_A; 2289 u32 aux_mask = GEN8_AUX_CHANNEL_A;
2281 2290
2291 if (!intel_irqs_enabled(dev_priv))
2292 return IRQ_NONE;
2293
2282 if (IS_GEN9(dev)) 2294 if (IS_GEN9(dev))
2283 aux_mask |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C | 2295 aux_mask |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
2284 GEN9_AUX_CHANNEL_D; 2296 GEN9_AUX_CHANNEL_D;
@@ -3771,6 +3783,9 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
3771 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT | 3783 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
3772 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT; 3784 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
3773 3785
3786 if (!intel_irqs_enabled(dev_priv))
3787 return IRQ_NONE;
3788
3774 iir = I915_READ16(IIR); 3789 iir = I915_READ16(IIR);
3775 if (iir == 0) 3790 if (iir == 0)
3776 return IRQ_NONE; 3791 return IRQ_NONE;
@@ -3951,6 +3966,9 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
3951 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT; 3966 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
3952 int pipe, ret = IRQ_NONE; 3967 int pipe, ret = IRQ_NONE;
3953 3968
3969 if (!intel_irqs_enabled(dev_priv))
3970 return IRQ_NONE;
3971
3954 iir = I915_READ(IIR); 3972 iir = I915_READ(IIR);
3955 do { 3973 do {
3956 bool irq_received = (iir & ~flip_mask) != 0; 3974 bool irq_received = (iir & ~flip_mask) != 0;
@@ -4171,6 +4189,9 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
4171 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT | 4189 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
4172 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT; 4190 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
4173 4191
4192 if (!intel_irqs_enabled(dev_priv))
4193 return IRQ_NONE;
4194
4174 iir = I915_READ(IIR); 4195 iir = I915_READ(IIR);
4175 4196
4176 for (;;) { 4197 for (;;) {
@@ -4520,6 +4541,7 @@ void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv)
4520{ 4541{
4521 dev_priv->dev->driver->irq_uninstall(dev_priv->dev); 4542 dev_priv->dev->driver->irq_uninstall(dev_priv->dev);
4522 dev_priv->pm.irqs_enabled = false; 4543 dev_priv->pm.irqs_enabled = false;
4544 synchronize_irq(dev_priv->dev->irq);
4523} 4545}
4524 4546
4525/** 4547/**
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3d220a67f865..3117679299a6 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2371,13 +2371,19 @@ intel_alloc_plane_obj(struct intel_crtc *crtc,
2371 struct drm_device *dev = crtc->base.dev; 2371 struct drm_device *dev = crtc->base.dev;
2372 struct drm_i915_gem_object *obj = NULL; 2372 struct drm_i915_gem_object *obj = NULL;
2373 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 2373 struct drm_mode_fb_cmd2 mode_cmd = { 0 };
2374 u32 base = plane_config->base; 2374 u32 base_aligned = round_down(plane_config->base, PAGE_SIZE);
2375 u32 size_aligned = round_up(plane_config->base + plane_config->size,
2376 PAGE_SIZE);
2377
2378 size_aligned -= base_aligned;
2375 2379
2376 if (plane_config->size == 0) 2380 if (plane_config->size == 0)
2377 return false; 2381 return false;
2378 2382
2379 obj = i915_gem_object_create_stolen_for_preallocated(dev, base, base, 2383 obj = i915_gem_object_create_stolen_for_preallocated(dev,
2380 plane_config->size); 2384 base_aligned,
2385 base_aligned,
2386 size_aligned);
2381 if (!obj) 2387 if (!obj)
2382 return false; 2388 return false;
2383 2389
@@ -2725,10 +2731,19 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
2725 case DRM_FORMAT_XRGB8888: 2731 case DRM_FORMAT_XRGB8888:
2726 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888; 2732 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
2727 break; 2733 break;
2734 case DRM_FORMAT_ARGB8888:
2735 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
2736 plane_ctl |= PLANE_CTL_ALPHA_SW_PREMULTIPLY;
2737 break;
2728 case DRM_FORMAT_XBGR8888: 2738 case DRM_FORMAT_XBGR8888:
2729 plane_ctl |= PLANE_CTL_ORDER_RGBX; 2739 plane_ctl |= PLANE_CTL_ORDER_RGBX;
2730 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888; 2740 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
2731 break; 2741 break;
2742 case DRM_FORMAT_ABGR8888:
2743 plane_ctl |= PLANE_CTL_ORDER_RGBX;
2744 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
2745 plane_ctl |= PLANE_CTL_ALPHA_SW_PREMULTIPLY;
2746 break;
2732 case DRM_FORMAT_XRGB2101010: 2747 case DRM_FORMAT_XRGB2101010:
2733 plane_ctl |= PLANE_CTL_FORMAT_XRGB_2101010; 2748 plane_ctl |= PLANE_CTL_FORMAT_XRGB_2101010;
2734 break; 2749 break;
@@ -6627,7 +6642,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
6627 aligned_height = intel_fb_align_height(dev, fb->height, 6642 aligned_height = intel_fb_align_height(dev, fb->height,
6628 plane_config->tiling); 6643 plane_config->tiling);
6629 6644
6630 plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height); 6645 plane_config->size = fb->pitches[0] * aligned_height;
6631 6646
6632 DRM_DEBUG_KMS("pipe/plane %c/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", 6647 DRM_DEBUG_KMS("pipe/plane %c/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
6633 pipe_name(pipe), plane, fb->width, fb->height, 6648 pipe_name(pipe), plane, fb->width, fb->height,
@@ -7664,7 +7679,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
7664 aligned_height = intel_fb_align_height(dev, fb->height, 7679 aligned_height = intel_fb_align_height(dev, fb->height,
7665 plane_config->tiling); 7680 plane_config->tiling);
7666 7681
7667 plane_config->size = ALIGN(fb->pitches[0] * aligned_height, PAGE_SIZE); 7682 plane_config->size = fb->pitches[0] * aligned_height;
7668 7683
7669 DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", 7684 DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
7670 pipe_name(pipe), fb->width, fb->height, 7685 pipe_name(pipe), fb->width, fb->height,
@@ -7755,7 +7770,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
7755 aligned_height = intel_fb_align_height(dev, fb->height, 7770 aligned_height = intel_fb_align_height(dev, fb->height,
7756 plane_config->tiling); 7771 plane_config->tiling);
7757 7772
7758 plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height); 7773 plane_config->size = fb->pitches[0] * aligned_height;
7759 7774
7760 DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", 7775 DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
7761 pipe_name(pipe), fb->width, fb->height, 7776 pipe_name(pipe), fb->width, fb->height,
@@ -12182,9 +12197,6 @@ intel_check_cursor_plane(struct drm_plane *plane,
12182 return -ENOMEM; 12197 return -ENOMEM;
12183 } 12198 }
12184 12199
12185 if (fb == crtc->cursor->fb)
12186 return 0;
12187
12188 /* we only need to pin inside GTT if cursor is non-phy */ 12200 /* we only need to pin inside GTT if cursor is non-phy */
12189 mutex_lock(&dev->struct_mutex); 12201 mutex_lock(&dev->struct_mutex);
12190 if (!INTEL_INFO(dev)->cursor_needs_physical && obj->tiling_mode) { 12202 if (!INTEL_INFO(dev)->cursor_needs_physical && obj->tiling_mode) {
@@ -13096,6 +13108,9 @@ static struct intel_quirk intel_quirks[] = {
13096 13108
13097 /* HP Chromebook 14 (Celeron 2955U) */ 13109 /* HP Chromebook 14 (Celeron 2955U) */
13098 { 0x0a06, 0x103c, 0x21ed, quirk_backlight_present }, 13110 { 0x0a06, 0x103c, 0x21ed, quirk_backlight_present },
13111
13112 /* Dell Chromebook 11 */
13113 { 0x0a06, 0x1028, 0x0a35, quirk_backlight_present },
13099}; 13114};
13100 13115
13101static void intel_init_quirks(struct drm_device *dev) 13116static void intel_init_quirks(struct drm_device *dev)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0f358c5999ec..e8d3da9f3373 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -503,18 +503,19 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
503 * If there isn't a request associated with this submission, 503 * If there isn't a request associated with this submission,
504 * create one as a temporary holder. 504 * create one as a temporary holder.
505 */ 505 */
506 WARN(1, "execlist context submission without request");
507 request = kzalloc(sizeof(*request), GFP_KERNEL); 506 request = kzalloc(sizeof(*request), GFP_KERNEL);
508 if (request == NULL) 507 if (request == NULL)
509 return -ENOMEM; 508 return -ENOMEM;
510 request->ring = ring; 509 request->ring = ring;
511 request->ctx = to; 510 request->ctx = to;
511 kref_init(&request->ref);
512 request->uniq = dev_priv->request_uniq++;
513 i915_gem_context_reference(request->ctx);
512 } else { 514 } else {
515 i915_gem_request_reference(request);
513 WARN_ON(to != request->ctx); 516 WARN_ON(to != request->ctx);
514 } 517 }
515 request->tail = tail; 518 request->tail = tail;
516 i915_gem_request_reference(request);
517 i915_gem_context_reference(request->ctx);
518 519
519 intel_runtime_pm_get(dev_priv); 520 intel_runtime_pm_get(dev_priv);
520 521
@@ -731,7 +732,6 @@ void intel_execlists_retire_requests(struct intel_engine_cs *ring)
731 if (ctx_obj && (ctx != ring->default_context)) 732 if (ctx_obj && (ctx != ring->default_context))
732 intel_lr_context_unpin(ring, ctx); 733 intel_lr_context_unpin(ring, ctx);
733 intel_runtime_pm_put(dev_priv); 734 intel_runtime_pm_put(dev_priv);
734 i915_gem_context_unreference(ctx);
735 list_del(&req->execlist_link); 735 list_del(&req->execlist_link);
736 i915_gem_request_unreference(req); 736 i915_gem_request_unreference(req);
737 } 737 }
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 5bf825dfaa09..8d74de82456e 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -178,6 +178,13 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
178 switch (msg->request & ~DP_AUX_I2C_MOT) { 178 switch (msg->request & ~DP_AUX_I2C_MOT) {
179 case DP_AUX_NATIVE_WRITE: 179 case DP_AUX_NATIVE_WRITE:
180 case DP_AUX_I2C_WRITE: 180 case DP_AUX_I2C_WRITE:
181 /* The atom implementation only supports writes with a max payload of
182 * 12 bytes since it uses 4 bits for the total count (header + payload)
183 * in the parameter space. The atom interface supports 16 byte
184 * payloads for reads. The hw itself supports up to 16 bytes of payload.
185 */
186 if (WARN_ON_ONCE(msg->size > 12))
187 return -E2BIG;
181 /* tx_size needs to be 4 even for bare address packets since the atom 188 /* tx_size needs to be 4 even for bare address packets since the atom
182 * table needs the info in tx_buf[3]. 189 * table needs the info in tx_buf[3].
183 */ 190 */
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index 7c9df1eac065..7fe7b749e182 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -731,7 +731,9 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
731 dig_connector = radeon_connector->con_priv; 731 dig_connector = radeon_connector->con_priv;
732 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || 732 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
733 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) { 733 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
734 if (radeon_audio != 0 && ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev)) 734 if (radeon_audio != 0 &&
735 drm_detect_monitor_audio(radeon_connector_edid(connector)) &&
736 ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev))
735 return ATOM_ENCODER_MODE_DP_AUDIO; 737 return ATOM_ENCODER_MODE_DP_AUDIO;
736 return ATOM_ENCODER_MODE_DP; 738 return ATOM_ENCODER_MODE_DP;
737 } else if (radeon_audio != 0) { 739 } else if (radeon_audio != 0) {
@@ -747,7 +749,9 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
747 } 749 }
748 break; 750 break;
749 case DRM_MODE_CONNECTOR_eDP: 751 case DRM_MODE_CONNECTOR_eDP:
750 if (radeon_audio != 0 && ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev)) 752 if (radeon_audio != 0 &&
753 drm_detect_monitor_audio(radeon_connector_edid(connector)) &&
754 ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev))
751 return ATOM_ENCODER_MODE_DP_AUDIO; 755 return ATOM_ENCODER_MODE_DP_AUDIO;
752 return ATOM_ENCODER_MODE_DP; 756 return ATOM_ENCODER_MODE_DP;
753 case DRM_MODE_CONNECTOR_DVIA: 757 case DRM_MODE_CONNECTOR_DVIA:
@@ -1720,8 +1724,10 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
1720 } 1724 }
1721 1725
1722 encoder_mode = atombios_get_encoder_mode(encoder); 1726 encoder_mode = atombios_get_encoder_mode(encoder);
1723 if (radeon_audio != 0 && 1727 if (connector && (radeon_audio != 0) &&
1724 (encoder_mode == ATOM_ENCODER_MODE_HDMI || ENCODER_MODE_IS_DP(encoder_mode))) 1728 ((encoder_mode == ATOM_ENCODER_MODE_HDMI) ||
1729 (ENCODER_MODE_IS_DP(encoder_mode) &&
1730 drm_detect_monitor_audio(radeon_connector_edid(connector)))))
1725 radeon_audio_dpms(encoder, mode); 1731 radeon_audio_dpms(encoder, mode);
1726} 1732}
1727 1733
@@ -2136,6 +2142,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
2136 struct drm_device *dev = encoder->dev; 2142 struct drm_device *dev = encoder->dev;
2137 struct radeon_device *rdev = dev->dev_private; 2143 struct radeon_device *rdev = dev->dev_private;
2138 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 2144 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2145 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
2139 int encoder_mode; 2146 int encoder_mode;
2140 2147
2141 radeon_encoder->pixel_clock = adjusted_mode->clock; 2148 radeon_encoder->pixel_clock = adjusted_mode->clock;
@@ -2164,8 +2171,10 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
2164 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 2171 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
2165 /* handled in dpms */ 2172 /* handled in dpms */
2166 encoder_mode = atombios_get_encoder_mode(encoder); 2173 encoder_mode = atombios_get_encoder_mode(encoder);
2167 if (radeon_audio != 0 && 2174 if (connector && (radeon_audio != 0) &&
2168 (encoder_mode == ATOM_ENCODER_MODE_HDMI || ENCODER_MODE_IS_DP(encoder_mode))) 2175 ((encoder_mode == ATOM_ENCODER_MODE_HDMI) ||
2176 (ENCODER_MODE_IS_DP(encoder_mode) &&
2177 drm_detect_monitor_audio(radeon_connector_edid(connector)))))
2169 radeon_audio_mode_set(encoder, adjusted_mode); 2178 radeon_audio_mode_set(encoder, adjusted_mode);
2170 break; 2179 break;
2171 case ENCODER_OBJECT_ID_INTERNAL_DDI: 2180 case ENCODER_OBJECT_ID_INTERNAL_DDI:
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index e6a4ba236c70..0c993da9c8fb 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -3613,6 +3613,8 @@ static void cik_gpu_init(struct radeon_device *rdev)
3613 } 3613 }
3614 3614
3615 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); 3615 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
3616 WREG32(SRBM_INT_CNTL, 0x1);
3617 WREG32(SRBM_INT_ACK, 0x1);
3616 3618
3617 WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); 3619 WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);
3618 3620
@@ -7230,6 +7232,8 @@ static void cik_disable_interrupt_state(struct radeon_device *rdev)
7230 WREG32(CP_ME2_PIPE3_INT_CNTL, 0); 7232 WREG32(CP_ME2_PIPE3_INT_CNTL, 0);
7231 /* grbm */ 7233 /* grbm */
7232 WREG32(GRBM_INT_CNTL, 0); 7234 WREG32(GRBM_INT_CNTL, 0);
7235 /* SRBM */
7236 WREG32(SRBM_INT_CNTL, 0);
7233 /* vline/vblank, etc. */ 7237 /* vline/vblank, etc. */
7234 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 7238 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
7235 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 7239 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
@@ -8046,6 +8050,10 @@ restart_ih:
8046 break; 8050 break;
8047 } 8051 }
8048 break; 8052 break;
8053 case 96:
8054 DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
8055 WREG32(SRBM_INT_ACK, 0x1);
8056 break;
8049 case 124: /* UVD */ 8057 case 124: /* UVD */
8050 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data); 8058 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
8051 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); 8059 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index 03003f8a6de6..c648e1996dab 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -482,6 +482,10 @@
482#define SOFT_RESET_ORB (1 << 23) 482#define SOFT_RESET_ORB (1 << 23)
483#define SOFT_RESET_VCE (1 << 24) 483#define SOFT_RESET_VCE (1 << 24)
484 484
485#define SRBM_READ_ERROR 0xE98
486#define SRBM_INT_CNTL 0xEA0
487#define SRBM_INT_ACK 0xEA8
488
485#define VM_L2_CNTL 0x1400 489#define VM_L2_CNTL 0x1400
486#define ENABLE_L2_CACHE (1 << 0) 490#define ENABLE_L2_CACHE (1 << 0)
487#define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) 491#define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1)
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 78600f534c80..4c0e24b3bb90 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3253,6 +3253,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
3253 } 3253 }
3254 3254
3255 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); 3255 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
3256 WREG32(SRBM_INT_CNTL, 0x1);
3257 WREG32(SRBM_INT_ACK, 0x1);
3256 3258
3257 evergreen_fix_pci_max_read_req_size(rdev); 3259 evergreen_fix_pci_max_read_req_size(rdev);
3258 3260
@@ -4324,6 +4326,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev)
4324 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; 4326 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
4325 WREG32(DMA_CNTL, tmp); 4327 WREG32(DMA_CNTL, tmp);
4326 WREG32(GRBM_INT_CNTL, 0); 4328 WREG32(GRBM_INT_CNTL, 0);
4329 WREG32(SRBM_INT_CNTL, 0);
4327 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 4330 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
4328 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 4331 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
4329 if (rdev->num_crtc >= 4) { 4332 if (rdev->num_crtc >= 4) {
@@ -5066,6 +5069,10 @@ restart_ih:
5066 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 5069 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
5067 break; 5070 break;
5068 } 5071 }
5072 case 96:
5073 DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
5074 WREG32(SRBM_INT_ACK, 0x1);
5075 break;
5069 case 124: /* UVD */ 5076 case 124: /* UVD */
5070 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data); 5077 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
5071 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); 5078 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index ee83d2a88750..a8d1d5240fcb 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -1191,6 +1191,10 @@
1191#define SOFT_RESET_REGBB (1 << 22) 1191#define SOFT_RESET_REGBB (1 << 22)
1192#define SOFT_RESET_ORB (1 << 23) 1192#define SOFT_RESET_ORB (1 << 23)
1193 1193
1194#define SRBM_READ_ERROR 0xE98
1195#define SRBM_INT_CNTL 0xEA0
1196#define SRBM_INT_ACK 0xEA8
1197
1194/* display watermarks */ 1198/* display watermarks */
1195#define DC_LB_MEMORY_SPLIT 0x6b0c 1199#define DC_LB_MEMORY_SPLIT 0x6b0c
1196#define PRIORITY_A_CNT 0x6b18 1200#define PRIORITY_A_CNT 0x6b18
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 24242a7f0ac3..dab00812abaa 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -962,6 +962,8 @@ static void cayman_gpu_init(struct radeon_device *rdev)
962 } 962 }
963 963
964 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); 964 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
965 WREG32(SRBM_INT_CNTL, 0x1);
966 WREG32(SRBM_INT_ACK, 0x1);
965 967
966 evergreen_fix_pci_max_read_req_size(rdev); 968 evergreen_fix_pci_max_read_req_size(rdev);
967 969
@@ -1086,12 +1088,12 @@ static void cayman_gpu_init(struct radeon_device *rdev)
1086 1088
1087 if ((rdev->config.cayman.max_backends_per_se == 1) && 1089 if ((rdev->config.cayman.max_backends_per_se == 1) &&
1088 (rdev->flags & RADEON_IS_IGP)) { 1090 (rdev->flags & RADEON_IS_IGP)) {
1089 if ((disabled_rb_mask & 3) == 1) { 1091 if ((disabled_rb_mask & 3) == 2) {
1090 /* RB0 disabled, RB1 enabled */
1091 tmp = 0x11111111;
1092 } else {
1093 /* RB1 disabled, RB0 enabled */ 1092 /* RB1 disabled, RB0 enabled */
1094 tmp = 0x00000000; 1093 tmp = 0x00000000;
1094 } else {
1095 /* RB0 disabled, RB1 enabled */
1096 tmp = 0x11111111;
1095 } 1097 }
1096 } else { 1098 } else {
1097 tmp = gb_addr_config & NUM_PIPES_MASK; 1099 tmp = gb_addr_config & NUM_PIPES_MASK;
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index ad7125486894..6b44580440d0 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -82,6 +82,10 @@
82#define SOFT_RESET_REGBB (1 << 22) 82#define SOFT_RESET_REGBB (1 << 22)
83#define SOFT_RESET_ORB (1 << 23) 83#define SOFT_RESET_ORB (1 << 23)
84 84
85#define SRBM_READ_ERROR 0xE98
86#define SRBM_INT_CNTL 0xEA0
87#define SRBM_INT_ACK 0xEA8
88
85#define SRBM_STATUS2 0x0EC4 89#define SRBM_STATUS2 0x0EC4
86#define DMA_BUSY (1 << 5) 90#define DMA_BUSY (1 << 5)
87#define DMA1_BUSY (1 << 6) 91#define DMA1_BUSY (1 << 6)
diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c
index 843b65f46ece..fa2154493cf1 100644
--- a/drivers/gpu/drm/radeon/r600_dpm.c
+++ b/drivers/gpu/drm/radeon/r600_dpm.c
@@ -188,7 +188,7 @@ u32 r600_dpm_get_vrefresh(struct radeon_device *rdev)
188 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 188 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
189 radeon_crtc = to_radeon_crtc(crtc); 189 radeon_crtc = to_radeon_crtc(crtc);
190 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { 190 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
191 vrefresh = radeon_crtc->hw_mode.vrefresh; 191 vrefresh = drm_mode_vrefresh(&radeon_crtc->hw_mode);
192 break; 192 break;
193 } 193 }
194 } 194 }
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index c830863bc98a..a579ed379f20 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -715,6 +715,7 @@ int radeon_cs_packet_parse(struct radeon_cs_parser *p,
715 struct radeon_cs_chunk *ib_chunk = p->chunk_ib; 715 struct radeon_cs_chunk *ib_chunk = p->chunk_ib;
716 struct radeon_device *rdev = p->rdev; 716 struct radeon_device *rdev = p->rdev;
717 uint32_t header; 717 uint32_t header;
718 int ret = 0, i;
718 719
719 if (idx >= ib_chunk->length_dw) { 720 if (idx >= ib_chunk->length_dw) {
720 DRM_ERROR("Can not parse packet at %d after CS end %d !\n", 721 DRM_ERROR("Can not parse packet at %d after CS end %d !\n",
@@ -743,14 +744,25 @@ int radeon_cs_packet_parse(struct radeon_cs_parser *p,
743 break; 744 break;
744 default: 745 default:
745 DRM_ERROR("Unknown packet type %d at %d !\n", pkt->type, idx); 746 DRM_ERROR("Unknown packet type %d at %d !\n", pkt->type, idx);
746 return -EINVAL; 747 ret = -EINVAL;
748 goto dump_ib;
747 } 749 }
748 if ((pkt->count + 1 + pkt->idx) >= ib_chunk->length_dw) { 750 if ((pkt->count + 1 + pkt->idx) >= ib_chunk->length_dw) {
749 DRM_ERROR("Packet (%d:%d:%d) end after CS buffer (%d) !\n", 751 DRM_ERROR("Packet (%d:%d:%d) end after CS buffer (%d) !\n",
750 pkt->idx, pkt->type, pkt->count, ib_chunk->length_dw); 752 pkt->idx, pkt->type, pkt->count, ib_chunk->length_dw);
751 return -EINVAL; 753 ret = -EINVAL;
754 goto dump_ib;
752 } 755 }
753 return 0; 756 return 0;
757
758dump_ib:
759 for (i = 0; i < ib_chunk->length_dw; i++) {
760 if (i == idx)
761 printk("\t0x%08x <---\n", radeon_get_ib_value(p, i));
762 else
763 printk("\t0x%08x\n", radeon_get_ib_value(p, i));
764 }
765 return ret;
754} 766}
755 767
756/** 768/**
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 6b670b0bc47b..3a297037cc17 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -179,9 +179,12 @@ static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder,
179 (rdev->pdev->subsystem_vendor == 0x1734) && 179 (rdev->pdev->subsystem_vendor == 0x1734) &&
180 (rdev->pdev->subsystem_device == 0x1107)) 180 (rdev->pdev->subsystem_device == 0x1107))
181 use_bl = false; 181 use_bl = false;
182/* Older PPC macs use on-GPU backlight controller */
183#ifndef CONFIG_PPC_PMAC
182 /* disable native backlight control on older asics */ 184 /* disable native backlight control on older asics */
183 else if (rdev->family < CHIP_R600) 185 else if (rdev->family < CHIP_R600)
184 use_bl = false; 186 use_bl = false;
187#endif
185 else 188 else
186 use_bl = true; 189 use_bl = true;
187 } 190 }
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 9f758d39420d..33cf4108386d 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -852,6 +852,12 @@ static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev,
852 single_display = false; 852 single_display = false;
853 } 853 }
854 854
855 /* 120hz tends to be problematic even if they are under the
856 * vblank limit.
857 */
858 if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120))
859 single_display = false;
860
855 /* certain older asics have a separare 3D performance state, 861 /* certain older asics have a separare 3D performance state,
856 * so try that first if the user selected performance 862 * so try that first if the user selected performance
857 */ 863 */
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 73107fe9e46f..bcf516a8a2f1 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -3162,6 +3162,8 @@ static void si_gpu_init(struct radeon_device *rdev)
3162 } 3162 }
3163 3163
3164 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); 3164 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
3165 WREG32(SRBM_INT_CNTL, 1);
3166 WREG32(SRBM_INT_ACK, 1);
3165 3167
3166 evergreen_fix_pci_max_read_req_size(rdev); 3168 evergreen_fix_pci_max_read_req_size(rdev);
3167 3169
@@ -4699,12 +4701,6 @@ int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
4699 switch (pkt.type) { 4701 switch (pkt.type) {
4700 case RADEON_PACKET_TYPE0: 4702 case RADEON_PACKET_TYPE0:
4701 dev_err(rdev->dev, "Packet0 not allowed!\n"); 4703 dev_err(rdev->dev, "Packet0 not allowed!\n");
4702 for (i = 0; i < ib->length_dw; i++) {
4703 if (i == idx)
4704 printk("\t0x%08x <---\n", ib->ptr[i]);
4705 else
4706 printk("\t0x%08x\n", ib->ptr[i]);
4707 }
4708 ret = -EINVAL; 4704 ret = -EINVAL;
4709 break; 4705 break;
4710 case RADEON_PACKET_TYPE2: 4706 case RADEON_PACKET_TYPE2:
@@ -4736,8 +4732,15 @@ int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
4736 ret = -EINVAL; 4732 ret = -EINVAL;
4737 break; 4733 break;
4738 } 4734 }
4739 if (ret) 4735 if (ret) {
4736 for (i = 0; i < ib->length_dw; i++) {
4737 if (i == idx)
4738 printk("\t0x%08x <---\n", ib->ptr[i]);
4739 else
4740 printk("\t0x%08x\n", ib->ptr[i]);
4741 }
4740 break; 4742 break;
4743 }
4741 } while (idx < ib->length_dw); 4744 } while (idx < ib->length_dw);
4742 4745
4743 return ret; 4746 return ret;
@@ -5910,6 +5913,7 @@ static void si_disable_interrupt_state(struct radeon_device *rdev)
5910 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; 5913 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE;
5911 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp); 5914 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp);
5912 WREG32(GRBM_INT_CNTL, 0); 5915 WREG32(GRBM_INT_CNTL, 0);
5916 WREG32(SRBM_INT_CNTL, 0);
5913 if (rdev->num_crtc >= 2) { 5917 if (rdev->num_crtc >= 2) {
5914 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 5918 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
5915 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 5919 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
@@ -6609,6 +6613,10 @@ restart_ih:
6609 break; 6613 break;
6610 } 6614 }
6611 break; 6615 break;
6616 case 96:
6617 DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
6618 WREG32(SRBM_INT_ACK, 0x1);
6619 break;
6612 case 124: /* UVD */ 6620 case 124: /* UVD */
6613 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data); 6621 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
6614 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); 6622 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index cbd91d226f3c..c27118cab16a 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -358,6 +358,10 @@
358#define CC_SYS_RB_BACKEND_DISABLE 0xe80 358#define CC_SYS_RB_BACKEND_DISABLE 0xe80
359#define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84 359#define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84
360 360
361#define SRBM_READ_ERROR 0xE98
362#define SRBM_INT_CNTL 0xEA0
363#define SRBM_INT_ACK 0xEA8
364
361#define SRBM_STATUS2 0x0EC4 365#define SRBM_STATUS2 0x0EC4
362#define DMA_BUSY (1 << 5) 366#define DMA_BUSY (1 << 5)
363#define DMA1_BUSY (1 << 6) 367#define DMA1_BUSY (1 << 6)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 3aaa84ae2681..1a52522f5da7 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -997,8 +997,10 @@ static void tegra_crtc_reset(struct drm_crtc *crtc)
997 crtc->state = NULL; 997 crtc->state = NULL;
998 998
999 state = kzalloc(sizeof(*state), GFP_KERNEL); 999 state = kzalloc(sizeof(*state), GFP_KERNEL);
1000 if (state) 1000 if (state) {
1001 crtc->state = &state->base; 1001 crtc->state = &state->base;
1002 crtc->state->crtc = crtc;
1003 }
1002} 1004}
1003 1005
1004static struct drm_crtc_state * 1006static struct drm_crtc_state *
@@ -1012,6 +1014,7 @@ tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
1012 return NULL; 1014 return NULL;
1013 1015
1014 copy->base.mode_changed = false; 1016 copy->base.mode_changed = false;
1017 copy->base.active_changed = false;
1015 copy->base.planes_changed = false; 1018 copy->base.planes_changed = false;
1016 copy->base.event = NULL; 1019 copy->base.event = NULL;
1017 1020
@@ -1227,9 +1230,6 @@ static void tegra_crtc_mode_set_nofb(struct drm_crtc *crtc)
1227 /* program display mode */ 1230 /* program display mode */
1228 tegra_dc_set_timings(dc, mode); 1231 tegra_dc_set_timings(dc, mode);
1229 1232
1230 if (dc->soc->supports_border_color)
1231 tegra_dc_writel(dc, 0, DC_DISP_BORDER_COLOR);
1232
1233 /* interlacing isn't supported yet, so disable it */ 1233 /* interlacing isn't supported yet, so disable it */
1234 if (dc->soc->supports_interlacing) { 1234 if (dc->soc->supports_interlacing) {
1235 value = tegra_dc_readl(dc, DC_DISP_INTERLACE_CONTROL); 1235 value = tegra_dc_readl(dc, DC_DISP_INTERLACE_CONTROL);
@@ -1252,42 +1252,7 @@ static void tegra_crtc_mode_set_nofb(struct drm_crtc *crtc)
1252 1252
1253static void tegra_crtc_prepare(struct drm_crtc *crtc) 1253static void tegra_crtc_prepare(struct drm_crtc *crtc)
1254{ 1254{
1255 struct tegra_dc *dc = to_tegra_dc(crtc);
1256 unsigned int syncpt;
1257 unsigned long value;
1258
1259 drm_crtc_vblank_off(crtc); 1255 drm_crtc_vblank_off(crtc);
1260
1261 if (dc->pipe)
1262 syncpt = SYNCPT_VBLANK1;
1263 else
1264 syncpt = SYNCPT_VBLANK0;
1265
1266 /* initialize display controller */
1267 tegra_dc_writel(dc, 0x00000100, DC_CMD_GENERAL_INCR_SYNCPT_CNTRL);
1268 tegra_dc_writel(dc, 0x100 | syncpt, DC_CMD_CONT_SYNCPT_VSYNC);
1269
1270 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT | WIN_A_OF_INT;
1271 tegra_dc_writel(dc, value, DC_CMD_INT_TYPE);
1272
1273 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT |
1274 WIN_A_OF_INT | WIN_B_OF_INT | WIN_C_OF_INT;
1275 tegra_dc_writel(dc, value, DC_CMD_INT_POLARITY);
1276
1277 /* initialize timer */
1278 value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(0x20) |
1279 WINDOW_B_THRESHOLD(0x20) | WINDOW_C_THRESHOLD(0x20);
1280 tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY);
1281
1282 value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(1) |
1283 WINDOW_B_THRESHOLD(1) | WINDOW_C_THRESHOLD(1);
1284 tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER);
1285
1286 value = VBLANK_INT | WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
1287 tegra_dc_writel(dc, value, DC_CMD_INT_ENABLE);
1288
1289 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
1290 tegra_dc_writel(dc, value, DC_CMD_INT_MASK);
1291} 1256}
1292 1257
1293static void tegra_crtc_commit(struct drm_crtc *crtc) 1258static void tegra_crtc_commit(struct drm_crtc *crtc)
@@ -1664,6 +1629,8 @@ static int tegra_dc_init(struct host1x_client *client)
1664 struct tegra_drm *tegra = drm->dev_private; 1629 struct tegra_drm *tegra = drm->dev_private;
1665 struct drm_plane *primary = NULL; 1630 struct drm_plane *primary = NULL;
1666 struct drm_plane *cursor = NULL; 1631 struct drm_plane *cursor = NULL;
1632 unsigned int syncpt;
1633 u32 value;
1667 int err; 1634 int err;
1668 1635
1669 if (tegra->domain) { 1636 if (tegra->domain) {
@@ -1730,6 +1697,40 @@ static int tegra_dc_init(struct host1x_client *client)
1730 goto cleanup; 1697 goto cleanup;
1731 } 1698 }
1732 1699
1700 /* initialize display controller */
1701 if (dc->pipe)
1702 syncpt = SYNCPT_VBLANK1;
1703 else
1704 syncpt = SYNCPT_VBLANK0;
1705
1706 tegra_dc_writel(dc, 0x00000100, DC_CMD_GENERAL_INCR_SYNCPT_CNTRL);
1707 tegra_dc_writel(dc, 0x100 | syncpt, DC_CMD_CONT_SYNCPT_VSYNC);
1708
1709 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT | WIN_A_OF_INT;
1710 tegra_dc_writel(dc, value, DC_CMD_INT_TYPE);
1711
1712 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT |
1713 WIN_A_OF_INT | WIN_B_OF_INT | WIN_C_OF_INT;
1714 tegra_dc_writel(dc, value, DC_CMD_INT_POLARITY);
1715
1716 /* initialize timer */
1717 value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(0x20) |
1718 WINDOW_B_THRESHOLD(0x20) | WINDOW_C_THRESHOLD(0x20);
1719 tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY);
1720
1721 value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(1) |
1722 WINDOW_B_THRESHOLD(1) | WINDOW_C_THRESHOLD(1);
1723 tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER);
1724
1725 value = VBLANK_INT | WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
1726 tegra_dc_writel(dc, value, DC_CMD_INT_ENABLE);
1727
1728 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
1729 tegra_dc_writel(dc, value, DC_CMD_INT_MASK);
1730
1731 if (dc->soc->supports_border_color)
1732 tegra_dc_writel(dc, 0, DC_DISP_BORDER_COLOR);
1733
1733 return 0; 1734 return 0;
1734 1735
1735cleanup: 1736cleanup:
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index 7e06657ae58b..7eaaee74a039 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -851,6 +851,14 @@ static void tegra_hdmi_encoder_mode_set(struct drm_encoder *encoder,
851 h_back_porch = mode->htotal - mode->hsync_end; 851 h_back_porch = mode->htotal - mode->hsync_end;
852 h_front_porch = mode->hsync_start - mode->hdisplay; 852 h_front_porch = mode->hsync_start - mode->hdisplay;
853 853
854 err = clk_set_rate(hdmi->clk, pclk);
855 if (err < 0) {
856 dev_err(hdmi->dev, "failed to set HDMI clock frequency: %d\n",
857 err);
858 }
859
860 DRM_DEBUG_KMS("HDMI clock rate: %lu Hz\n", clk_get_rate(hdmi->clk));
861
854 /* power up sequence */ 862 /* power up sequence */
855 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0); 863 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0);
856 value &= ~SOR_PLL_PDBG; 864 value &= ~SOR_PLL_PDBG;
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index db4fb6e1cc5b..7c669c328c4c 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1872,6 +1872,7 @@ static const struct hid_device_id hid_have_special_driver[] = {
1872 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_SIDEWINDER_GV) }, 1872 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_SIDEWINDER_GV) },
1873 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K) }, 1873 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K) },
1874 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K_JP) }, 1874 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K_JP) },
1875 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE7K) },
1875 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_LK6K) }, 1876 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_LK6K) },
1876 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB) }, 1877 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB) },
1877 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) }, 1878 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) },
@@ -1926,6 +1927,7 @@ static const struct hid_device_id hid_have_special_driver[] = {
1926#endif 1927#endif
1927#if IS_ENABLED(CONFIG_HID_SAITEK) 1928#if IS_ENABLED(CONFIG_HID_SAITEK)
1928 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_PS1000) }, 1929 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_PS1000) },
1930 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7_OLD) },
1929 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7) }, 1931 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7) },
1930 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_MMO7) }, 1932 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_MMO7) },
1931 { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9) }, 1933 { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9) },
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 46edb4d3ed28..204312bfab2c 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -654,6 +654,7 @@
654#define USB_DEVICE_ID_MS_LK6K 0x00f9 654#define USB_DEVICE_ID_MS_LK6K 0x00f9
655#define USB_DEVICE_ID_MS_PRESENTER_8K_BT 0x0701 655#define USB_DEVICE_ID_MS_PRESENTER_8K_BT 0x0701
656#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713 656#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713
657#define USB_DEVICE_ID_MS_NE7K 0x071d
657#define USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K 0x0730 658#define USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K 0x0730
658#define USB_DEVICE_ID_MS_COMFORT_MOUSE_4500 0x076c 659#define USB_DEVICE_ID_MS_COMFORT_MOUSE_4500 0x076c
659#define USB_DEVICE_ID_MS_SURFACE_PRO_2 0x0799 660#define USB_DEVICE_ID_MS_SURFACE_PRO_2 0x0799
@@ -802,6 +803,7 @@
802#define USB_VENDOR_ID_SAITEK 0x06a3 803#define USB_VENDOR_ID_SAITEK 0x06a3
803#define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17 804#define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17
804#define USB_DEVICE_ID_SAITEK_PS1000 0x0621 805#define USB_DEVICE_ID_SAITEK_PS1000 0x0621
806#define USB_DEVICE_ID_SAITEK_RAT7_OLD 0x0ccb
805#define USB_DEVICE_ID_SAITEK_RAT7 0x0cd7 807#define USB_DEVICE_ID_SAITEK_RAT7 0x0cd7
806#define USB_DEVICE_ID_SAITEK_MMO7 0x0cd0 808#define USB_DEVICE_ID_SAITEK_MMO7 0x0cd0
807 809
diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c
index fbaea6eb882e..af935eb198c9 100644
--- a/drivers/hid/hid-microsoft.c
+++ b/drivers/hid/hid-microsoft.c
@@ -264,6 +264,8 @@ static const struct hid_device_id ms_devices[] = {
264 .driver_data = MS_ERGONOMY }, 264 .driver_data = MS_ERGONOMY },
265 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K_JP), 265 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K_JP),
266 .driver_data = MS_ERGONOMY }, 266 .driver_data = MS_ERGONOMY },
267 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE7K),
268 .driver_data = MS_ERGONOMY },
267 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_LK6K), 269 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_LK6K),
268 .driver_data = MS_ERGONOMY | MS_RDESC }, 270 .driver_data = MS_ERGONOMY | MS_RDESC },
269 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB), 271 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB),
diff --git a/drivers/hid/hid-saitek.c b/drivers/hid/hid-saitek.c
index 5632c54eadf0..a014f21275d8 100644
--- a/drivers/hid/hid-saitek.c
+++ b/drivers/hid/hid-saitek.c
@@ -177,6 +177,8 @@ static int saitek_event(struct hid_device *hdev, struct hid_field *field,
177static const struct hid_device_id saitek_devices[] = { 177static const struct hid_device_id saitek_devices[] = {
178 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_PS1000), 178 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_PS1000),
179 .driver_data = SAITEK_FIX_PS1000 }, 179 .driver_data = SAITEK_FIX_PS1000 },
180 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7_OLD),
181 .driver_data = SAITEK_RELEASE_MODE_RAT7 },
180 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7), 182 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7),
181 .driver_data = SAITEK_RELEASE_MODE_RAT7 }, 183 .driver_data = SAITEK_RELEASE_MODE_RAT7 },
182 { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9), 184 { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9),
diff --git a/drivers/hid/hid-sensor-hub.c b/drivers/hid/hid-sensor-hub.c
index 6a58b6c723aa..e54ce1097e2c 100644
--- a/drivers/hid/hid-sensor-hub.c
+++ b/drivers/hid/hid-sensor-hub.c
@@ -135,8 +135,9 @@ static struct hid_sensor_hub_callbacks *sensor_hub_get_callback(
135{ 135{
136 struct hid_sensor_hub_callbacks_list *callback; 136 struct hid_sensor_hub_callbacks_list *callback;
137 struct sensor_hub_data *pdata = hid_get_drvdata(hdev); 137 struct sensor_hub_data *pdata = hid_get_drvdata(hdev);
138 unsigned long flags;
138 139
139 spin_lock(&pdata->dyn_callback_lock); 140 spin_lock_irqsave(&pdata->dyn_callback_lock, flags);
140 list_for_each_entry(callback, &pdata->dyn_callback_list, list) 141 list_for_each_entry(callback, &pdata->dyn_callback_list, list)
141 if (callback->usage_id == usage_id && 142 if (callback->usage_id == usage_id &&
142 (collection_index >= 143 (collection_index >=
@@ -145,10 +146,11 @@ static struct hid_sensor_hub_callbacks *sensor_hub_get_callback(
145 callback->hsdev->end_collection_index)) { 146 callback->hsdev->end_collection_index)) {
146 *priv = callback->priv; 147 *priv = callback->priv;
147 *hsdev = callback->hsdev; 148 *hsdev = callback->hsdev;
148 spin_unlock(&pdata->dyn_callback_lock); 149 spin_unlock_irqrestore(&pdata->dyn_callback_lock,
150 flags);
149 return callback->usage_callback; 151 return callback->usage_callback;
150 } 152 }
151 spin_unlock(&pdata->dyn_callback_lock); 153 spin_unlock_irqrestore(&pdata->dyn_callback_lock, flags);
152 154
153 return NULL; 155 return NULL;
154} 156}
diff --git a/drivers/hid/hid-sony.c b/drivers/hid/hid-sony.c
index 31e9d2561106..1896c019e302 100644
--- a/drivers/hid/hid-sony.c
+++ b/drivers/hid/hid-sony.c
@@ -804,7 +804,7 @@ union sixaxis_output_report_01 {
804#define DS4_REPORT_0x81_SIZE 7 804#define DS4_REPORT_0x81_SIZE 7
805#define SIXAXIS_REPORT_0xF2_SIZE 18 805#define SIXAXIS_REPORT_0xF2_SIZE 18
806 806
807static spinlock_t sony_dev_list_lock; 807static DEFINE_SPINLOCK(sony_dev_list_lock);
808static LIST_HEAD(sony_device_list); 808static LIST_HEAD(sony_device_list);
809static DEFINE_IDA(sony_device_id_allocator); 809static DEFINE_IDA(sony_device_id_allocator);
810 810
@@ -1944,6 +1944,8 @@ static int sony_probe(struct hid_device *hdev, const struct hid_device_id *id)
1944 return -ENOMEM; 1944 return -ENOMEM;
1945 } 1945 }
1946 1946
1947 spin_lock_init(&sc->lock);
1948
1947 sc->quirks = quirks; 1949 sc->quirks = quirks;
1948 hid_set_drvdata(hdev, sc); 1950 hid_set_drvdata(hdev, sc);
1949 sc->hdev = hdev; 1951 sc->hdev = hdev;
@@ -2147,8 +2149,8 @@ static void __exit sony_exit(void)
2147{ 2149{
2148 dbg_hid("Sony:%s\n", __func__); 2150 dbg_hid("Sony:%s\n", __func__);
2149 2151
2150 ida_destroy(&sony_device_id_allocator);
2151 hid_unregister_driver(&sony_driver); 2152 hid_unregister_driver(&sony_driver);
2153 ida_destroy(&sony_device_id_allocator);
2152} 2154}
2153module_init(sony_init); 2155module_init(sony_init);
2154module_exit(sony_exit); 2156module_exit(sony_exit);
diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c
index d43e967e7533..36053f33d6d9 100644
--- a/drivers/hid/i2c-hid/i2c-hid.c
+++ b/drivers/hid/i2c-hid/i2c-hid.c
@@ -370,7 +370,10 @@ static int i2c_hid_hwreset(struct i2c_client *client)
370static void i2c_hid_get_input(struct i2c_hid *ihid) 370static void i2c_hid_get_input(struct i2c_hid *ihid)
371{ 371{
372 int ret, ret_size; 372 int ret, ret_size;
373 int size = ihid->bufsize; 373 int size = le16_to_cpu(ihid->hdesc.wMaxInputLength);
374
375 if (size > ihid->bufsize)
376 size = ihid->bufsize;
374 377
375 ret = i2c_master_recv(ihid->client, ihid->inbuf, size); 378 ret = i2c_master_recv(ihid->client, ihid->inbuf, size);
376 if (ret != size) { 379 if (ret != size) {
@@ -785,7 +788,7 @@ static int i2c_hid_init_irq(struct i2c_client *client)
785 dev_dbg(&client->dev, "Requesting IRQ: %d\n", client->irq); 788 dev_dbg(&client->dev, "Requesting IRQ: %d\n", client->irq);
786 789
787 ret = request_threaded_irq(client->irq, NULL, i2c_hid_irq, 790 ret = request_threaded_irq(client->irq, NULL, i2c_hid_irq,
788 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 791 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
789 client->name, ihid); 792 client->name, ihid);
790 if (ret < 0) { 793 if (ret < 0) {
791 dev_warn(&client->dev, 794 dev_warn(&client->dev,
diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c
index 1a6507999a65..046351cf17f3 100644
--- a/drivers/hid/wacom_wac.c
+++ b/drivers/hid/wacom_wac.c
@@ -778,6 +778,11 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)
778 input_report_abs(input, ABS_X, be16_to_cpup((__be16 *)&data[4])); 778 input_report_abs(input, ABS_X, be16_to_cpup((__be16 *)&data[4]));
779 input_report_abs(input, ABS_Y, be16_to_cpup((__be16 *)&data[6])); 779 input_report_abs(input, ABS_Y, be16_to_cpup((__be16 *)&data[6]));
780 input_report_abs(input, ABS_Z, be16_to_cpup((__be16 *)&data[8])); 780 input_report_abs(input, ABS_Z, be16_to_cpup((__be16 *)&data[8]));
781 if ((data[2] & 0x07) | data[4] | data[5] | data[6] | data[7] | data[8] | data[9]) {
782 input_report_abs(input, ABS_MISC, PAD_DEVICE_ID);
783 } else {
784 input_report_abs(input, ABS_MISC, 0);
785 }
781 } else if (features->type == CINTIQ_HYBRID) { 786 } else if (features->type == CINTIQ_HYBRID) {
782 /* 787 /*
783 * Do not send hardware buttons under Android. They 788 * Do not send hardware buttons under Android. They
@@ -2725,9 +2730,9 @@ static const struct wacom_features wacom_features_0xF6 =
2725 .oVid = USB_VENDOR_ID_WACOM, .oPid = 0xf8, .touch_max = 10, 2730 .oVid = USB_VENDOR_ID_WACOM, .oPid = 0xf8, .touch_max = 10,
2726 .check_for_hid_type = true, .hid_type = HID_TYPE_USBNONE }; 2731 .check_for_hid_type = true, .hid_type = HID_TYPE_USBNONE };
2727static const struct wacom_features wacom_features_0x32A = 2732static const struct wacom_features wacom_features_0x32A =
2728 { "Wacom Cintiq 27QHD", 119740, 67520, 2047, 2733 { "Wacom Cintiq 27QHD", 119740, 67520, 2047, 63,
2729 63, WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES, 2734 WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,
2730 WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES }; 2735 WACOM_CINTIQ_OFFSET, WACOM_CINTIQ_OFFSET };
2731static const struct wacom_features wacom_features_0x32B = 2736static const struct wacom_features wacom_features_0x32B =
2732 { "Wacom Cintiq 27QHD touch", 119740, 67520, 2047, 63, 2737 { "Wacom Cintiq 27QHD touch", 119740, 67520, 2047, 63,
2733 WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES, 2738 WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,
diff --git a/drivers/hwmon/ads7828.c b/drivers/hwmon/ads7828.c
index bce4e9ff21bf..6c99ee7bafa3 100644
--- a/drivers/hwmon/ads7828.c
+++ b/drivers/hwmon/ads7828.c
@@ -147,6 +147,9 @@ static int ads7828_probe(struct i2c_client *client,
147 &ads2830_regmap_config); 147 &ads2830_regmap_config);
148 } 148 }
149 149
150 if (IS_ERR(data->regmap))
151 return PTR_ERR(data->regmap);
152
150 data->cmd_byte = ext_vref ? ADS7828_CMD_PD1 : ADS7828_CMD_PD3; 153 data->cmd_byte = ext_vref ? ADS7828_CMD_PD1 : ADS7828_CMD_PD3;
151 if (!diff_input) 154 if (!diff_input)
152 data->cmd_byte |= ADS7828_CMD_SD_SE; 155 data->cmd_byte |= ADS7828_CMD_SD_SE;
diff --git a/drivers/rtc/rtc-ds1685.c b/drivers/rtc/rtc-ds1685.c
index 8c3bfcb115b7..803869c7d7c2 100644
--- a/drivers/rtc/rtc-ds1685.c
+++ b/drivers/rtc/rtc-ds1685.c
@@ -399,21 +399,21 @@ ds1685_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
399 * of this RTC chip. We check for it anyways in case support is 399 * of this RTC chip. We check for it anyways in case support is
400 * added in the future. 400 * added in the future.
401 */ 401 */
402 if (unlikely((seconds >= 0xc0) && (seconds <= 0xff))) 402 if (unlikely(seconds >= 0xc0))
403 alrm->time.tm_sec = -1; 403 alrm->time.tm_sec = -1;
404 else 404 else
405 alrm->time.tm_sec = ds1685_rtc_bcd2bin(rtc, seconds, 405 alrm->time.tm_sec = ds1685_rtc_bcd2bin(rtc, seconds,
406 RTC_SECS_BCD_MASK, 406 RTC_SECS_BCD_MASK,
407 RTC_SECS_BIN_MASK); 407 RTC_SECS_BIN_MASK);
408 408
409 if (unlikely((minutes >= 0xc0) && (minutes <= 0xff))) 409 if (unlikely(minutes >= 0xc0))
410 alrm->time.tm_min = -1; 410 alrm->time.tm_min = -1;
411 else 411 else
412 alrm->time.tm_min = ds1685_rtc_bcd2bin(rtc, minutes, 412 alrm->time.tm_min = ds1685_rtc_bcd2bin(rtc, minutes,
413 RTC_MINS_BCD_MASK, 413 RTC_MINS_BCD_MASK,
414 RTC_MINS_BIN_MASK); 414 RTC_MINS_BIN_MASK);
415 415
416 if (unlikely((hours >= 0xc0) && (hours <= 0xff))) 416 if (unlikely(hours >= 0xc0))
417 alrm->time.tm_hour = -1; 417 alrm->time.tm_hour = -1;
418 else 418 else
419 alrm->time.tm_hour = ds1685_rtc_bcd2bin(rtc, hours, 419 alrm->time.tm_hour = ds1685_rtc_bcd2bin(rtc, hours,
@@ -472,13 +472,13 @@ ds1685_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
472 * field, and we only support four fields. We put the support 472 * field, and we only support four fields. We put the support
473 * here anyways for the future. 473 * here anyways for the future.
474 */ 474 */
475 if (unlikely((seconds >= 0xc0) && (seconds <= 0xff))) 475 if (unlikely(seconds >= 0xc0))
476 seconds = 0xff; 476 seconds = 0xff;
477 477
478 if (unlikely((minutes >= 0xc0) && (minutes <= 0xff))) 478 if (unlikely(minutes >= 0xc0))
479 minutes = 0xff; 479 minutes = 0xff;
480 480
481 if (unlikely((hours >= 0xc0) && (hours <= 0xff))) 481 if (unlikely(hours >= 0xc0))
482 hours = 0xff; 482 hours = 0xff;
483 483
484 alrm->time.tm_mon = -1; 484 alrm->time.tm_mon = -1;
@@ -528,7 +528,6 @@ ds1685_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
528/* ----------------------------------------------------------------------- */ 528/* ----------------------------------------------------------------------- */
529/* /dev/rtcX Interface functions */ 529/* /dev/rtcX Interface functions */
530 530
531#ifdef CONFIG_RTC_INTF_DEV
532/** 531/**
533 * ds1685_rtc_alarm_irq_enable - replaces ioctl() RTC_AIE on/off. 532 * ds1685_rtc_alarm_irq_enable - replaces ioctl() RTC_AIE on/off.
534 * @dev: pointer to device structure. 533 * @dev: pointer to device structure.
@@ -557,7 +556,6 @@ ds1685_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
557 556
558 return 0; 557 return 0;
559} 558}
560#endif
561/* ----------------------------------------------------------------------- */ 559/* ----------------------------------------------------------------------- */
562 560
563 561
@@ -1612,7 +1610,7 @@ ds1685_rtc_sysfs_time_regs_show(struct device *dev,
1612 ds1685_rtc_sysfs_time_regs_lookup(attr->attr.name, false); 1610 ds1685_rtc_sysfs_time_regs_lookup(attr->attr.name, false);
1613 1611
1614 /* Make sure we actually matched something. */ 1612 /* Make sure we actually matched something. */
1615 if (!bcd_reg_info && !bin_reg_info) 1613 if (!bcd_reg_info || !bin_reg_info)
1616 return -EINVAL; 1614 return -EINVAL;
1617 1615
1618 /* bcd_reg_info->reg == bin_reg_info->reg. */ 1616 /* bcd_reg_info->reg == bin_reg_info->reg. */
@@ -1650,7 +1648,7 @@ ds1685_rtc_sysfs_time_regs_store(struct device *dev,
1650 return -EINVAL; 1648 return -EINVAL;
1651 1649
1652 /* Make sure we actually matched something. */ 1650 /* Make sure we actually matched something. */
1653 if (!bcd_reg_info && !bin_reg_info) 1651 if (!bcd_reg_info || !bin_reg_info)
1654 return -EINVAL; 1652 return -EINVAL;
1655 1653
1656 /* Check for a valid range. */ 1654 /* Check for a valid range. */
diff --git a/drivers/sh/pm_runtime.c b/drivers/sh/pm_runtime.c
index f3ee439d6f0e..cd4c293f0dd0 100644
--- a/drivers/sh/pm_runtime.c
+++ b/drivers/sh/pm_runtime.c
@@ -81,7 +81,9 @@ static int __init sh_pm_runtime_init(void)
81 if (!of_machine_is_compatible("renesas,emev2") && 81 if (!of_machine_is_compatible("renesas,emev2") &&
82 !of_machine_is_compatible("renesas,r7s72100") && 82 !of_machine_is_compatible("renesas,r7s72100") &&
83 !of_machine_is_compatible("renesas,r8a73a4") && 83 !of_machine_is_compatible("renesas,r8a73a4") &&
84#ifndef CONFIG_PM_GENERIC_DOMAINS_OF
84 !of_machine_is_compatible("renesas,r8a7740") && 85 !of_machine_is_compatible("renesas,r8a7740") &&
86#endif
85 !of_machine_is_compatible("renesas,r8a7778") && 87 !of_machine_is_compatible("renesas,r8a7778") &&
86 !of_machine_is_compatible("renesas,r8a7779") && 88 !of_machine_is_compatible("renesas,r8a7779") &&
87 !of_machine_is_compatible("renesas,r8a7790") && 89 !of_machine_is_compatible("renesas,r8a7790") &&
diff --git a/drivers/xen/Makefile b/drivers/xen/Makefile
index 2140398a2a8c..2ccd3592d41f 100644
--- a/drivers/xen/Makefile
+++ b/drivers/xen/Makefile
@@ -2,7 +2,7 @@ ifeq ($(filter y, $(CONFIG_ARM) $(CONFIG_ARM64)),)
2obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o 2obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o
3endif 3endif
4obj-$(CONFIG_X86) += fallback.o 4obj-$(CONFIG_X86) += fallback.o
5obj-y += grant-table.o features.o balloon.o manage.o 5obj-y += grant-table.o features.o balloon.o manage.o preempt.o
6obj-y += events/ 6obj-y += events/
7obj-y += xenbus/ 7obj-y += xenbus/
8 8
diff --git a/drivers/xen/preempt.c b/drivers/xen/preempt.c
new file mode 100644
index 000000000000..a1800c150839
--- /dev/null
+++ b/drivers/xen/preempt.c
@@ -0,0 +1,44 @@
1/*
2 * Preemptible hypercalls
3 *
4 * Copyright (C) 2014 Citrix Systems R&D ltd.
5 *
6 * This source code is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 */
11
12#include <linux/sched.h>
13#include <xen/xen-ops.h>
14
15#ifndef CONFIG_PREEMPT
16
17/*
18 * Some hypercalls issued by the toolstack can take many 10s of
19 * seconds. Allow tasks running hypercalls via the privcmd driver to
20 * be voluntarily preempted even if full kernel preemption is
21 * disabled.
22 *
23 * Such preemptible hypercalls are bracketed by
24 * xen_preemptible_hcall_begin() and xen_preemptible_hcall_end()
25 * calls.
26 */
27
28DEFINE_PER_CPU(bool, xen_in_preemptible_hcall);
29EXPORT_SYMBOL_GPL(xen_in_preemptible_hcall);
30
31asmlinkage __visible void xen_maybe_preempt_hcall(void)
32{
33 if (unlikely(__this_cpu_read(xen_in_preemptible_hcall)
34 && should_resched())) {
35 /*
36 * Clear flag as we may be rescheduled on a different
37 * cpu.
38 */
39 __this_cpu_write(xen_in_preemptible_hcall, false);
40 _cond_resched();
41 __this_cpu_write(xen_in_preemptible_hcall, true);
42 }
43}
44#endif /* CONFIG_PREEMPT */
diff --git a/drivers/xen/privcmd.c b/drivers/xen/privcmd.c
index 569a13b9e856..59ac71c4a043 100644
--- a/drivers/xen/privcmd.c
+++ b/drivers/xen/privcmd.c
@@ -56,10 +56,12 @@ static long privcmd_ioctl_hypercall(void __user *udata)
56 if (copy_from_user(&hypercall, udata, sizeof(hypercall))) 56 if (copy_from_user(&hypercall, udata, sizeof(hypercall)))
57 return -EFAULT; 57 return -EFAULT;
58 58
59 xen_preemptible_hcall_begin();
59 ret = privcmd_call(hypercall.op, 60 ret = privcmd_call(hypercall.op,
60 hypercall.arg[0], hypercall.arg[1], 61 hypercall.arg[0], hypercall.arg[1],
61 hypercall.arg[2], hypercall.arg[3], 62 hypercall.arg[2], hypercall.arg[3],
62 hypercall.arg[4]); 63 hypercall.arg[4]);
64 xen_preemptible_hcall_end();
63 65
64 return ret; 66 return ret;
65} 67}
diff --git a/drivers/xen/xen-scsiback.c b/drivers/xen/xen-scsiback.c
index 61653a03a8f5..9faca6a60bb0 100644
--- a/drivers/xen/xen-scsiback.c
+++ b/drivers/xen/xen-scsiback.c
@@ -709,12 +709,11 @@ static int prepare_pending_reqs(struct vscsibk_info *info,
709static int scsiback_do_cmd_fn(struct vscsibk_info *info) 709static int scsiback_do_cmd_fn(struct vscsibk_info *info)
710{ 710{
711 struct vscsiif_back_ring *ring = &info->ring; 711 struct vscsiif_back_ring *ring = &info->ring;
712 struct vscsiif_request *ring_req; 712 struct vscsiif_request ring_req;
713 struct vscsibk_pend *pending_req; 713 struct vscsibk_pend *pending_req;
714 RING_IDX rc, rp; 714 RING_IDX rc, rp;
715 int err, more_to_do; 715 int err, more_to_do;
716 uint32_t result; 716 uint32_t result;
717 uint8_t act;
718 717
719 rc = ring->req_cons; 718 rc = ring->req_cons;
720 rp = ring->sring->req_prod; 719 rp = ring->sring->req_prod;
@@ -735,11 +734,10 @@ static int scsiback_do_cmd_fn(struct vscsibk_info *info)
735 if (!pending_req) 734 if (!pending_req)
736 return 1; 735 return 1;
737 736
738 ring_req = RING_GET_REQUEST(ring, rc); 737 ring_req = *RING_GET_REQUEST(ring, rc);
739 ring->req_cons = ++rc; 738 ring->req_cons = ++rc;
740 739
741 act = ring_req->act; 740 err = prepare_pending_reqs(info, &ring_req, pending_req);
742 err = prepare_pending_reqs(info, ring_req, pending_req);
743 if (err) { 741 if (err) {
744 switch (err) { 742 switch (err) {
745 case -ENODEV: 743 case -ENODEV:
@@ -755,9 +753,9 @@ static int scsiback_do_cmd_fn(struct vscsibk_info *info)
755 return 1; 753 return 1;
756 } 754 }
757 755
758 switch (act) { 756 switch (ring_req.act) {
759 case VSCSIIF_ACT_SCSI_CDB: 757 case VSCSIIF_ACT_SCSI_CDB:
760 if (scsiback_gnttab_data_map(ring_req, pending_req)) { 758 if (scsiback_gnttab_data_map(&ring_req, pending_req)) {
761 scsiback_fast_flush_area(pending_req); 759 scsiback_fast_flush_area(pending_req);
762 scsiback_do_resp_with_sense(NULL, 760 scsiback_do_resp_with_sense(NULL,
763 DRIVER_ERROR << 24, 0, pending_req); 761 DRIVER_ERROR << 24, 0, pending_req);
@@ -768,7 +766,7 @@ static int scsiback_do_cmd_fn(struct vscsibk_info *info)
768 break; 766 break;
769 case VSCSIIF_ACT_SCSI_ABORT: 767 case VSCSIIF_ACT_SCSI_ABORT:
770 scsiback_device_action(pending_req, TMR_ABORT_TASK, 768 scsiback_device_action(pending_req, TMR_ABORT_TASK,
771 ring_req->ref_rqid); 769 ring_req.ref_rqid);
772 break; 770 break;
773 case VSCSIIF_ACT_SCSI_RESET: 771 case VSCSIIF_ACT_SCSI_RESET:
774 scsiback_device_action(pending_req, TMR_LUN_RESET, 0); 772 scsiback_device_action(pending_req, TMR_LUN_RESET, 0);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-01 06:08:13 -0500