aboutsummaryrefslogtreecommitdiffstats
path: root/drivers
diff options
context:
space:
mode:
Diffstat (limited to 'drivers')
-rw-r--r--drivers/i2c/busses/i2c-i801.c319
1 files changed, 175 insertions, 144 deletions
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index 1fe30da653c3..56883f48c2e4 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -3,6 +3,8 @@
3 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker 3 Philip Edelbrock <phil@netroedge.com>, and Mark D. Studebaker
4 <mdsxyz123@yahoo.com> 4 <mdsxyz123@yahoo.com>
5 Copyright (C) 2007, 2008 Jean Delvare <khali@linux-fr.org> 5 Copyright (C) 2007, 2008 Jean Delvare <khali@linux-fr.org>
6 Copyright (C) 2010 Intel Corporation,
7 David Woodhouse <dwmw2@infradead.org>
6 8
7 This program is free software; you can redistribute it and/or modify 9 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by 10 it under the terms of the GNU General Public License as published by
@@ -55,8 +57,6 @@
55 See the file Documentation/i2c/busses/i2c-i801 for details. 57 See the file Documentation/i2c/busses/i2c-i801 for details.
56*/ 58*/
57 59
58/* Note: we assume there can only be one I801, with one SMBus interface */
59
60#include <linux/module.h> 60#include <linux/module.h>
61#include <linux/pci.h> 61#include <linux/pci.h>
62#include <linux/kernel.h> 62#include <linux/kernel.h>
@@ -70,16 +70,16 @@
70#include <linux/dmi.h> 70#include <linux/dmi.h>
71 71
72/* I801 SMBus address offsets */ 72/* I801 SMBus address offsets */
73#define SMBHSTSTS (0 + i801_smba) 73#define SMBHSTSTS(p) (0 + (p)->smba)
74#define SMBHSTCNT (2 + i801_smba) 74#define SMBHSTCNT(p) (2 + (p)->smba)
75#define SMBHSTCMD (3 + i801_smba) 75#define SMBHSTCMD(p) (3 + (p)->smba)
76#define SMBHSTADD (4 + i801_smba) 76#define SMBHSTADD(p) (4 + (p)->smba)
77#define SMBHSTDAT0 (5 + i801_smba) 77#define SMBHSTDAT0(p) (5 + (p)->smba)
78#define SMBHSTDAT1 (6 + i801_smba) 78#define SMBHSTDAT1(p) (6 + (p)->smba)
79#define SMBBLKDAT (7 + i801_smba) 79#define SMBBLKDAT(p) (7 + (p)->smba)
80#define SMBPEC (8 + i801_smba) /* ICH3 and later */ 80#define SMBPEC(p) (8 + (p)->smba) /* ICH3 and later */
81#define SMBAUXSTS (12 + i801_smba) /* ICH4 and later */ 81#define SMBAUXSTS(p) (12 + (p)->smba) /* ICH4 and later */
82#define SMBAUXCTL (13 + i801_smba) /* ICH4 and later */ 82#define SMBAUXCTL(p) (13 + (p)->smba) /* ICH4 and later */
83 83
84/* PCI Address Constants */ 84/* PCI Address Constants */
85#define SMBBAR 4 85#define SMBBAR 4
@@ -128,16 +128,20 @@
128 SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \ 128 SMBHSTSTS_BUS_ERR | SMBHSTSTS_DEV_ERR | \
129 SMBHSTSTS_INTR) 129 SMBHSTSTS_INTR)
130 130
131static unsigned long i801_smba; 131struct i801_priv {
132static unsigned char i801_original_hstcfg; 132 struct i2c_adapter adapter;
133 unsigned long smba;
134 unsigned char original_hstcfg;
135 struct pci_dev *pci_dev;
136 unsigned int features;
137};
138
133static struct pci_driver i801_driver; 139static struct pci_driver i801_driver;
134static struct pci_dev *I801_dev;
135 140
136#define FEATURE_SMBUS_PEC (1 << 0) 141#define FEATURE_SMBUS_PEC (1 << 0)
137#define FEATURE_BLOCK_BUFFER (1 << 1) 142#define FEATURE_BLOCK_BUFFER (1 << 1)
138#define FEATURE_BLOCK_PROC (1 << 2) 143#define FEATURE_BLOCK_PROC (1 << 2)
139#define FEATURE_I2C_BLOCK_READ (1 << 3) 144#define FEATURE_I2C_BLOCK_READ (1 << 3)
140static unsigned int i801_features;
141 145
142static const char *i801_feature_names[] = { 146static const char *i801_feature_names[] = {
143 "SMBus PEC", 147 "SMBus PEC",
@@ -152,24 +156,24 @@ MODULE_PARM_DESC(disable_features, "Disable selected driver features");
152 156
153/* Make sure the SMBus host is ready to start transmitting. 157/* Make sure the SMBus host is ready to start transmitting.
154 Return 0 if it is, -EBUSY if it is not. */ 158 Return 0 if it is, -EBUSY if it is not. */
155static int i801_check_pre(void) 159static int i801_check_pre(struct i801_priv *priv)
156{ 160{
157 int status; 161 int status;
158 162
159 status = inb_p(SMBHSTSTS); 163 status = inb_p(SMBHSTSTS(priv));
160 if (status & SMBHSTSTS_HOST_BUSY) { 164 if (status & SMBHSTSTS_HOST_BUSY) {
161 dev_err(&I801_dev->dev, "SMBus is busy, can't use it!\n"); 165 dev_err(&priv->pci_dev->dev, "SMBus is busy, can't use it!\n");
162 return -EBUSY; 166 return -EBUSY;
163 } 167 }
164 168
165 status &= STATUS_FLAGS; 169 status &= STATUS_FLAGS;
166 if (status) { 170 if (status) {
167 dev_dbg(&I801_dev->dev, "Clearing status flags (%02x)\n", 171 dev_dbg(&priv->pci_dev->dev, "Clearing status flags (%02x)\n",
168 status); 172 status);
169 outb_p(status, SMBHSTSTS); 173 outb_p(status, SMBHSTSTS(priv));
170 status = inb_p(SMBHSTSTS) & STATUS_FLAGS; 174 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
171 if (status) { 175 if (status) {
172 dev_err(&I801_dev->dev, 176 dev_err(&priv->pci_dev->dev,
173 "Failed clearing status flags (%02x)\n", 177 "Failed clearing status flags (%02x)\n",
174 status); 178 status);
175 return -EBUSY; 179 return -EBUSY;
@@ -180,48 +184,50 @@ static int i801_check_pre(void)
180} 184}
181 185
182/* Convert the status register to an error code, and clear it. */ 186/* Convert the status register to an error code, and clear it. */
183static int i801_check_post(int status, int timeout) 187static int i801_check_post(struct i801_priv *priv, int status, int timeout)
184{ 188{
185 int result = 0; 189 int result = 0;
186 190
187 /* If the SMBus is still busy, we give up */ 191 /* If the SMBus is still busy, we give up */
188 if (timeout) { 192 if (timeout) {
189 dev_err(&I801_dev->dev, "Transaction timeout\n"); 193 dev_err(&priv->pci_dev->dev, "Transaction timeout\n");
190 /* try to stop the current command */ 194 /* try to stop the current command */
191 dev_dbg(&I801_dev->dev, "Terminating the current operation\n"); 195 dev_dbg(&priv->pci_dev->dev, "Terminating the current operation\n");
192 outb_p(inb_p(SMBHSTCNT) | SMBHSTCNT_KILL, SMBHSTCNT); 196 outb_p(inb_p(SMBHSTCNT(priv)) | SMBHSTCNT_KILL,
197 SMBHSTCNT(priv));
193 msleep(1); 198 msleep(1);
194 outb_p(inb_p(SMBHSTCNT) & (~SMBHSTCNT_KILL), SMBHSTCNT); 199 outb_p(inb_p(SMBHSTCNT(priv)) & (~SMBHSTCNT_KILL),
200 SMBHSTCNT(priv));
195 201
196 /* Check if it worked */ 202 /* Check if it worked */
197 status = inb_p(SMBHSTSTS); 203 status = inb_p(SMBHSTSTS(priv));
198 if ((status & SMBHSTSTS_HOST_BUSY) || 204 if ((status & SMBHSTSTS_HOST_BUSY) ||
199 !(status & SMBHSTSTS_FAILED)) 205 !(status & SMBHSTSTS_FAILED))
200 dev_err(&I801_dev->dev, 206 dev_err(&priv->pci_dev->dev,
201 "Failed terminating the transaction\n"); 207 "Failed terminating the transaction\n");
202 outb_p(STATUS_FLAGS, SMBHSTSTS); 208 outb_p(STATUS_FLAGS, SMBHSTSTS(priv));
203 return -ETIMEDOUT; 209 return -ETIMEDOUT;
204 } 210 }
205 211
206 if (status & SMBHSTSTS_FAILED) { 212 if (status & SMBHSTSTS_FAILED) {
207 result = -EIO; 213 result = -EIO;
208 dev_err(&I801_dev->dev, "Transaction failed\n"); 214 dev_err(&priv->pci_dev->dev, "Transaction failed\n");
209 } 215 }
210 if (status & SMBHSTSTS_DEV_ERR) { 216 if (status & SMBHSTSTS_DEV_ERR) {
211 result = -ENXIO; 217 result = -ENXIO;
212 dev_dbg(&I801_dev->dev, "No response\n"); 218 dev_dbg(&priv->pci_dev->dev, "No response\n");
213 } 219 }
214 if (status & SMBHSTSTS_BUS_ERR) { 220 if (status & SMBHSTSTS_BUS_ERR) {
215 result = -EAGAIN; 221 result = -EAGAIN;
216 dev_dbg(&I801_dev->dev, "Lost arbitration\n"); 222 dev_dbg(&priv->pci_dev->dev, "Lost arbitration\n");
217 } 223 }
218 224
219 if (result) { 225 if (result) {
220 /* Clear error flags */ 226 /* Clear error flags */
221 outb_p(status & STATUS_FLAGS, SMBHSTSTS); 227 outb_p(status & STATUS_FLAGS, SMBHSTSTS(priv));
222 status = inb_p(SMBHSTSTS) & STATUS_FLAGS; 228 status = inb_p(SMBHSTSTS(priv)) & STATUS_FLAGS;
223 if (status) { 229 if (status) {
224 dev_warn(&I801_dev->dev, "Failed clearing status " 230 dev_warn(&priv->pci_dev->dev, "Failed clearing status "
225 "flags at end of transaction (%02x)\n", 231 "flags at end of transaction (%02x)\n",
226 status); 232 status);
227 } 233 }
@@ -230,86 +236,88 @@ static int i801_check_post(int status, int timeout)
230 return result; 236 return result;
231} 237}
232 238
233static int i801_transaction(int xact) 239static int i801_transaction(struct i801_priv *priv, int xact)
234{ 240{
235 int status; 241 int status;
236 int result; 242 int result;
237 int timeout = 0; 243 int timeout = 0;
238 244
239 result = i801_check_pre(); 245 result = i801_check_pre(priv);
240 if (result < 0) 246 if (result < 0)
241 return result; 247 return result;
242 248
243 /* the current contents of SMBHSTCNT can be overwritten, since PEC, 249 /* the current contents of SMBHSTCNT can be overwritten, since PEC,
244 * INTREN, SMBSCMD are passed in xact */ 250 * INTREN, SMBSCMD are passed in xact */
245 outb_p(xact | I801_START, SMBHSTCNT); 251 outb_p(xact | I801_START, SMBHSTCNT(priv));
246 252
247 /* We will always wait for a fraction of a second! */ 253 /* We will always wait for a fraction of a second! */
248 do { 254 do {
249 msleep(1); 255 msleep(1);
250 status = inb_p(SMBHSTSTS); 256 status = inb_p(SMBHSTSTS(priv));
251 } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT)); 257 } while ((status & SMBHSTSTS_HOST_BUSY) && (timeout++ < MAX_TIMEOUT));
252 258
253 result = i801_check_post(status, timeout > MAX_TIMEOUT); 259 result = i801_check_post(priv, status, timeout > MAX_TIMEOUT);
254 if (result < 0) 260 if (result < 0)
255 return result; 261 return result;
256 262
257 outb_p(SMBHSTSTS_INTR, SMBHSTSTS); 263 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
258 return 0; 264 return 0;
259} 265}
260 266
261/* wait for INTR bit as advised by Intel */ 267/* wait for INTR bit as advised by Intel */
262static void i801_wait_hwpec(void) 268static void i801_wait_hwpec(struct i801_priv *priv)
263{ 269{
264 int timeout = 0; 270 int timeout = 0;
265 int status; 271 int status;
266 272
267 do { 273 do {
268 msleep(1); 274 msleep(1);
269 status = inb_p(SMBHSTSTS); 275 status = inb_p(SMBHSTSTS(priv));
270 } while ((!(status & SMBHSTSTS_INTR)) 276 } while ((!(status & SMBHSTSTS_INTR))
271 && (timeout++ < MAX_TIMEOUT)); 277 && (timeout++ < MAX_TIMEOUT));
272 278
273 if (timeout > MAX_TIMEOUT) 279 if (timeout > MAX_TIMEOUT)
274 dev_dbg(&I801_dev->dev, "PEC Timeout!\n"); 280 dev_dbg(&priv->pci_dev->dev, "PEC Timeout!\n");
275 281
276 outb_p(status, SMBHSTSTS); 282 outb_p(status, SMBHSTSTS(priv));
277} 283}
278 284
279static int i801_block_transaction_by_block(union i2c_smbus_data *data, 285static int i801_block_transaction_by_block(struct i801_priv *priv,
286 union i2c_smbus_data *data,
280 char read_write, int hwpec) 287 char read_write, int hwpec)
281{ 288{
282 int i, len; 289 int i, len;
283 int status; 290 int status;
284 291
285 inb_p(SMBHSTCNT); /* reset the data buffer index */ 292 inb_p(SMBHSTCNT(priv)); /* reset the data buffer index */
286 293
287 /* Use 32-byte buffer to process this transaction */ 294 /* Use 32-byte buffer to process this transaction */
288 if (read_write == I2C_SMBUS_WRITE) { 295 if (read_write == I2C_SMBUS_WRITE) {
289 len = data->block[0]; 296 len = data->block[0];
290 outb_p(len, SMBHSTDAT0); 297 outb_p(len, SMBHSTDAT0(priv));
291 for (i = 0; i < len; i++) 298 for (i = 0; i < len; i++)
292 outb_p(data->block[i+1], SMBBLKDAT); 299 outb_p(data->block[i+1], SMBBLKDAT(priv));
293 } 300 }
294 301
295 status = i801_transaction(I801_BLOCK_DATA | ENABLE_INT9 | 302 status = i801_transaction(priv, I801_BLOCK_DATA | ENABLE_INT9 |
296 I801_PEC_EN * hwpec); 303 I801_PEC_EN * hwpec);
297 if (status) 304 if (status)
298 return status; 305 return status;
299 306
300 if (read_write == I2C_SMBUS_READ) { 307 if (read_write == I2C_SMBUS_READ) {
301 len = inb_p(SMBHSTDAT0); 308 len = inb_p(SMBHSTDAT0(priv));
302 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) 309 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX)
303 return -EPROTO; 310 return -EPROTO;
304 311
305 data->block[0] = len; 312 data->block[0] = len;
306 for (i = 0; i < len; i++) 313 for (i = 0; i < len; i++)
307 data->block[i + 1] = inb_p(SMBBLKDAT); 314 data->block[i + 1] = inb_p(SMBBLKDAT(priv));
308 } 315 }
309 return 0; 316 return 0;
310} 317}
311 318
312static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data, 319static int i801_block_transaction_byte_by_byte(struct i801_priv *priv,
320 union i2c_smbus_data *data,
313 char read_write, int command, 321 char read_write, int command,
314 int hwpec) 322 int hwpec)
315{ 323{
@@ -319,15 +327,15 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
319 int result; 327 int result;
320 int timeout; 328 int timeout;
321 329
322 result = i801_check_pre(); 330 result = i801_check_pre(priv);
323 if (result < 0) 331 if (result < 0)
324 return result; 332 return result;
325 333
326 len = data->block[0]; 334 len = data->block[0];
327 335
328 if (read_write == I2C_SMBUS_WRITE) { 336 if (read_write == I2C_SMBUS_WRITE) {
329 outb_p(len, SMBHSTDAT0); 337 outb_p(len, SMBHSTDAT0(priv));
330 outb_p(data->block[1], SMBBLKDAT); 338 outb_p(data->block[1], SMBBLKDAT(priv));
331 } 339 }
332 340
333 for (i = 1; i <= len; i++) { 341 for (i = 1; i <= len; i++) {
@@ -343,34 +351,37 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
343 else 351 else
344 smbcmd = I801_BLOCK_DATA; 352 smbcmd = I801_BLOCK_DATA;
345 } 353 }
346 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT); 354 outb_p(smbcmd | ENABLE_INT9, SMBHSTCNT(priv));
347 355
348 if (i == 1) 356 if (i == 1)
349 outb_p(inb(SMBHSTCNT) | I801_START, SMBHSTCNT); 357 outb_p(inb(SMBHSTCNT(priv)) | I801_START,
358 SMBHSTCNT(priv));
350 359
351 /* We will always wait for a fraction of a second! */ 360 /* We will always wait for a fraction of a second! */
352 timeout = 0; 361 timeout = 0;
353 do { 362 do {
354 msleep(1); 363 msleep(1);
355 status = inb_p(SMBHSTSTS); 364 status = inb_p(SMBHSTSTS(priv));
356 } while ((!(status & SMBHSTSTS_BYTE_DONE)) 365 } while ((!(status & SMBHSTSTS_BYTE_DONE))
357 && (timeout++ < MAX_TIMEOUT)); 366 && (timeout++ < MAX_TIMEOUT));
358 367
359 result = i801_check_post(status, timeout > MAX_TIMEOUT); 368 result = i801_check_post(priv, status, timeout > MAX_TIMEOUT);
360 if (result < 0) 369 if (result < 0)
361 return result; 370 return result;
362 371
363 if (i == 1 && read_write == I2C_SMBUS_READ 372 if (i == 1 && read_write == I2C_SMBUS_READ
364 && command != I2C_SMBUS_I2C_BLOCK_DATA) { 373 && command != I2C_SMBUS_I2C_BLOCK_DATA) {
365 len = inb_p(SMBHSTDAT0); 374 len = inb_p(SMBHSTDAT0(priv));
366 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) { 375 if (len < 1 || len > I2C_SMBUS_BLOCK_MAX) {
367 dev_err(&I801_dev->dev, 376 dev_err(&priv->pci_dev->dev,
368 "Illegal SMBus block read size %d\n", 377 "Illegal SMBus block read size %d\n",
369 len); 378 len);
370 /* Recover */ 379 /* Recover */
371 while (inb_p(SMBHSTSTS) & SMBHSTSTS_HOST_BUSY) 380 while (inb_p(SMBHSTSTS(priv)) &
372 outb_p(SMBHSTSTS_BYTE_DONE, SMBHSTSTS); 381 SMBHSTSTS_HOST_BUSY)
373 outb_p(SMBHSTSTS_INTR, SMBHSTSTS); 382 outb_p(SMBHSTSTS_BYTE_DONE,
383 SMBHSTSTS(priv));
384 outb_p(SMBHSTSTS_INTR, SMBHSTSTS(priv));
374 return -EPROTO; 385 return -EPROTO;
375 } 386 }
376 data->block[0] = len; 387 data->block[0] = len;
@@ -378,27 +389,28 @@ static int i801_block_transaction_byte_by_byte(union i2c_smbus_data *data,
378 389
379 /* Retrieve/store value in SMBBLKDAT */ 390 /* Retrieve/store value in SMBBLKDAT */
380 if (read_write == I2C_SMBUS_READ) 391 if (read_write == I2C_SMBUS_READ)
381 data->block[i] = inb_p(SMBBLKDAT); 392 data->block[i] = inb_p(SMBBLKDAT(priv));
382 if (read_write == I2C_SMBUS_WRITE && i+1 <= len) 393 if (read_write == I2C_SMBUS_WRITE && i+1 <= len)
383 outb_p(data->block[i+1], SMBBLKDAT); 394 outb_p(data->block[i+1], SMBBLKDAT(priv));
384 395
385 /* signals SMBBLKDAT ready */ 396 /* signals SMBBLKDAT ready */
386 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS); 397 outb_p(SMBHSTSTS_BYTE_DONE | SMBHSTSTS_INTR, SMBHSTSTS(priv));
387 } 398 }
388 399
389 return 0; 400 return 0;
390} 401}
391 402
392static int i801_set_block_buffer_mode(void) 403static int i801_set_block_buffer_mode(struct i801_priv *priv)
393{ 404{
394 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_E32B, SMBAUXCTL); 405 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_E32B, SMBAUXCTL(priv));
395 if ((inb_p(SMBAUXCTL) & SMBAUXCTL_E32B) == 0) 406 if ((inb_p(SMBAUXCTL(priv)) & SMBAUXCTL_E32B) == 0)
396 return -EIO; 407 return -EIO;
397 return 0; 408 return 0;
398} 409}
399 410
400/* Block transaction function */ 411/* Block transaction function */
401static int i801_block_transaction(union i2c_smbus_data *data, char read_write, 412static int i801_block_transaction(struct i801_priv *priv,
413 union i2c_smbus_data *data, char read_write,
402 int command, int hwpec) 414 int command, int hwpec)
403{ 415{
404 int result = 0; 416 int result = 0;
@@ -407,11 +419,11 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
407 if (command == I2C_SMBUS_I2C_BLOCK_DATA) { 419 if (command == I2C_SMBUS_I2C_BLOCK_DATA) {
408 if (read_write == I2C_SMBUS_WRITE) { 420 if (read_write == I2C_SMBUS_WRITE) {
409 /* set I2C_EN bit in configuration register */ 421 /* set I2C_EN bit in configuration register */
410 pci_read_config_byte(I801_dev, SMBHSTCFG, &hostc); 422 pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &hostc);
411 pci_write_config_byte(I801_dev, SMBHSTCFG, 423 pci_write_config_byte(priv->pci_dev, SMBHSTCFG,
412 hostc | SMBHSTCFG_I2C_EN); 424 hostc | SMBHSTCFG_I2C_EN);
413 } else if (!(i801_features & FEATURE_I2C_BLOCK_READ)) { 425 } else if (!(priv->features & FEATURE_I2C_BLOCK_READ)) {
414 dev_err(&I801_dev->dev, 426 dev_err(&priv->pci_dev->dev,
415 "I2C block read is unsupported!\n"); 427 "I2C block read is unsupported!\n");
416 return -EOPNOTSUPP; 428 return -EOPNOTSUPP;
417 } 429 }
@@ -430,22 +442,23 @@ static int i801_block_transaction(union i2c_smbus_data *data, char read_write,
430 /* Experience has shown that the block buffer can only be used for 442 /* Experience has shown that the block buffer can only be used for
431 SMBus (not I2C) block transactions, even though the datasheet 443 SMBus (not I2C) block transactions, even though the datasheet
432 doesn't mention this limitation. */ 444 doesn't mention this limitation. */
433 if ((i801_features & FEATURE_BLOCK_BUFFER) 445 if ((priv->features & FEATURE_BLOCK_BUFFER)
434 && command != I2C_SMBUS_I2C_BLOCK_DATA 446 && command != I2C_SMBUS_I2C_BLOCK_DATA
435 && i801_set_block_buffer_mode() == 0) 447 && i801_set_block_buffer_mode(priv) == 0)
436 result = i801_block_transaction_by_block(data, read_write, 448 result = i801_block_transaction_by_block(priv, data,
437 hwpec); 449 read_write, hwpec);
438 else 450 else
439 result = i801_block_transaction_byte_by_byte(data, read_write, 451 result = i801_block_transaction_byte_by_byte(priv, data,
452 read_write,
440 command, hwpec); 453 command, hwpec);
441 454
442 if (result == 0 && hwpec) 455 if (result == 0 && hwpec)
443 i801_wait_hwpec(); 456 i801_wait_hwpec(priv);
444 457
445 if (command == I2C_SMBUS_I2C_BLOCK_DATA 458 if (command == I2C_SMBUS_I2C_BLOCK_DATA
446 && read_write == I2C_SMBUS_WRITE) { 459 && read_write == I2C_SMBUS_WRITE) {
447 /* restore saved configuration register value */ 460 /* restore saved configuration register value */
448 pci_write_config_byte(I801_dev, SMBHSTCFG, hostc); 461 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, hostc);
449 } 462 }
450 return result; 463 return result;
451} 464}
@@ -458,81 +471,85 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
458 int hwpec; 471 int hwpec;
459 int block = 0; 472 int block = 0;
460 int ret, xact = 0; 473 int ret, xact = 0;
474 struct i801_priv *priv = i2c_get_adapdata(adap);
461 475
462 hwpec = (i801_features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC) 476 hwpec = (priv->features & FEATURE_SMBUS_PEC) && (flags & I2C_CLIENT_PEC)
463 && size != I2C_SMBUS_QUICK 477 && size != I2C_SMBUS_QUICK
464 && size != I2C_SMBUS_I2C_BLOCK_DATA; 478 && size != I2C_SMBUS_I2C_BLOCK_DATA;
465 479
466 switch (size) { 480 switch (size) {
467 case I2C_SMBUS_QUICK: 481 case I2C_SMBUS_QUICK:
468 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 482 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
469 SMBHSTADD); 483 SMBHSTADD(priv));
470 xact = I801_QUICK; 484 xact = I801_QUICK;
471 break; 485 break;
472 case I2C_SMBUS_BYTE: 486 case I2C_SMBUS_BYTE:
473 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 487 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
474 SMBHSTADD); 488 SMBHSTADD(priv));
475 if (read_write == I2C_SMBUS_WRITE) 489 if (read_write == I2C_SMBUS_WRITE)
476 outb_p(command, SMBHSTCMD); 490 outb_p(command, SMBHSTCMD(priv));
477 xact = I801_BYTE; 491 xact = I801_BYTE;
478 break; 492 break;
479 case I2C_SMBUS_BYTE_DATA: 493 case I2C_SMBUS_BYTE_DATA:
480 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 494 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
481 SMBHSTADD); 495 SMBHSTADD(priv));
482 outb_p(command, SMBHSTCMD); 496 outb_p(command, SMBHSTCMD(priv));
483 if (read_write == I2C_SMBUS_WRITE) 497 if (read_write == I2C_SMBUS_WRITE)
484 outb_p(data->byte, SMBHSTDAT0); 498 outb_p(data->byte, SMBHSTDAT0(priv));
485 xact = I801_BYTE_DATA; 499 xact = I801_BYTE_DATA;
486 break; 500 break;
487 case I2C_SMBUS_WORD_DATA: 501 case I2C_SMBUS_WORD_DATA:
488 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 502 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
489 SMBHSTADD); 503 SMBHSTADD(priv));
490 outb_p(command, SMBHSTCMD); 504 outb_p(command, SMBHSTCMD(priv));
491 if (read_write == I2C_SMBUS_WRITE) { 505 if (read_write == I2C_SMBUS_WRITE) {
492 outb_p(data->word & 0xff, SMBHSTDAT0); 506 outb_p(data->word & 0xff, SMBHSTDAT0(priv));
493 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1); 507 outb_p((data->word & 0xff00) >> 8, SMBHSTDAT1(priv));
494 } 508 }
495 xact = I801_WORD_DATA; 509 xact = I801_WORD_DATA;
496 break; 510 break;
497 case I2C_SMBUS_BLOCK_DATA: 511 case I2C_SMBUS_BLOCK_DATA:
498 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01), 512 outb_p(((addr & 0x7f) << 1) | (read_write & 0x01),
499 SMBHSTADD); 513 SMBHSTADD(priv));
500 outb_p(command, SMBHSTCMD); 514 outb_p(command, SMBHSTCMD(priv));
501 block = 1; 515 block = 1;
502 break; 516 break;
503 case I2C_SMBUS_I2C_BLOCK_DATA: 517 case I2C_SMBUS_I2C_BLOCK_DATA:
504 /* NB: page 240 of ICH5 datasheet shows that the R/#W 518 /* NB: page 240 of ICH5 datasheet shows that the R/#W
505 * bit should be cleared here, even when reading */ 519 * bit should be cleared here, even when reading */
506 outb_p((addr & 0x7f) << 1, SMBHSTADD); 520 outb_p((addr & 0x7f) << 1, SMBHSTADD(priv));
507 if (read_write == I2C_SMBUS_READ) { 521 if (read_write == I2C_SMBUS_READ) {
508 /* NB: page 240 of ICH5 datasheet also shows 522 /* NB: page 240 of ICH5 datasheet also shows
509 * that DATA1 is the cmd field when reading */ 523 * that DATA1 is the cmd field when reading */
510 outb_p(command, SMBHSTDAT1); 524 outb_p(command, SMBHSTDAT1(priv));
511 } else 525 } else
512 outb_p(command, SMBHSTCMD); 526 outb_p(command, SMBHSTCMD(priv));
513 block = 1; 527 block = 1;
514 break; 528 break;
515 default: 529 default:
516 dev_err(&I801_dev->dev, "Unsupported transaction %d\n", size); 530 dev_err(&priv->pci_dev->dev, "Unsupported transaction %d\n",
531 size);
517 return -EOPNOTSUPP; 532 return -EOPNOTSUPP;
518 } 533 }
519 534
520 if (hwpec) /* enable/disable hardware PEC */ 535 if (hwpec) /* enable/disable hardware PEC */
521 outb_p(inb_p(SMBAUXCTL) | SMBAUXCTL_CRC, SMBAUXCTL); 536 outb_p(inb_p(SMBAUXCTL(priv)) | SMBAUXCTL_CRC, SMBAUXCTL(priv));
522 else 537 else
523 outb_p(inb_p(SMBAUXCTL) & (~SMBAUXCTL_CRC), SMBAUXCTL); 538 outb_p(inb_p(SMBAUXCTL(priv)) & (~SMBAUXCTL_CRC),
539 SMBAUXCTL(priv));
524 540
525 if (block) 541 if (block)
526 ret = i801_block_transaction(data, read_write, size, hwpec); 542 ret = i801_block_transaction(priv, data, read_write, size,
543 hwpec);
527 else 544 else
528 ret = i801_transaction(xact | ENABLE_INT9); 545 ret = i801_transaction(priv, xact | ENABLE_INT9);
529 546
530 /* Some BIOSes don't like it when PEC is enabled at reboot or resume 547 /* Some BIOSes don't like it when PEC is enabled at reboot or resume
531 time, so we forcibly disable it after every transaction. Turn off 548 time, so we forcibly disable it after every transaction. Turn off
532 E32B for the same reason. */ 549 E32B for the same reason. */
533 if (hwpec || block) 550 if (hwpec || block)
534 outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), 551 outb_p(inb_p(SMBAUXCTL(priv)) &
535 SMBAUXCTL); 552 ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
536 553
537 if (block) 554 if (block)
538 return ret; 555 return ret;
@@ -544,10 +561,11 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
544 switch (xact & 0x7f) { 561 switch (xact & 0x7f) {
545 case I801_BYTE: /* Result put in SMBHSTDAT0 */ 562 case I801_BYTE: /* Result put in SMBHSTDAT0 */
546 case I801_BYTE_DATA: 563 case I801_BYTE_DATA:
547 data->byte = inb_p(SMBHSTDAT0); 564 data->byte = inb_p(SMBHSTDAT0(priv));
548 break; 565 break;
549 case I801_WORD_DATA: 566 case I801_WORD_DATA:
550 data->word = inb_p(SMBHSTDAT0) + (inb_p(SMBHSTDAT1) << 8); 567 data->word = inb_p(SMBHSTDAT0(priv)) +
568 (inb_p(SMBHSTDAT1(priv)) << 8);
551 break; 569 break;
552 } 570 }
553 return 0; 571 return 0;
@@ -556,11 +574,13 @@ static s32 i801_access(struct i2c_adapter *adap, u16 addr,
556 574
557static u32 i801_func(struct i2c_adapter *adapter) 575static u32 i801_func(struct i2c_adapter *adapter)
558{ 576{
577 struct i801_priv *priv = i2c_get_adapdata(adapter);
578
559 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE | 579 return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
560 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA | 580 I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
561 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK | 581 I2C_FUNC_SMBUS_BLOCK_DATA | I2C_FUNC_SMBUS_WRITE_I2C_BLOCK |
562 ((i801_features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) | 582 ((priv->features & FEATURE_SMBUS_PEC) ? I2C_FUNC_SMBUS_PEC : 0) |
563 ((i801_features & FEATURE_I2C_BLOCK_READ) ? 583 ((priv->features & FEATURE_I2C_BLOCK_READ) ?
564 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0); 584 I2C_FUNC_SMBUS_READ_I2C_BLOCK : 0);
565} 585}
566 586
@@ -569,12 +589,6 @@ static const struct i2c_algorithm smbus_algorithm = {
569 .functionality = i801_func, 589 .functionality = i801_func,
570}; 590};
571 591
572static struct i2c_adapter i801_adapter = {
573 .owner = THIS_MODULE,
574 .class = I2C_CLASS_HWMON | I2C_CLASS_SPD,
575 .algo = &smbus_algorithm,
576};
577
578static const struct pci_device_id i801_ids[] = { 592static const struct pci_device_id i801_ids[] = {
579 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) }, 593 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AA_3) },
580 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) }, 594 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801AB_3) },
@@ -706,16 +720,25 @@ static int __devinit i801_probe(struct pci_dev *dev,
706{ 720{
707 unsigned char temp; 721 unsigned char temp;
708 int err, i; 722 int err, i;
723 struct i801_priv *priv;
724
725 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
726 if (!priv)
727 return -ENOMEM;
728
729 i2c_set_adapdata(&priv->adapter, priv);
730 priv->adapter.owner = THIS_MODULE;
731 priv->adapter.class = I2C_CLASS_HWMON | I2C_CLASS_SPD;
732 priv->adapter.algo = &smbus_algorithm;
709 733
710 I801_dev = dev; 734 priv->pci_dev = dev;
711 i801_features = 0;
712 switch (dev->device) { 735 switch (dev->device) {
713 default: 736 default:
714 i801_features |= FEATURE_I2C_BLOCK_READ; 737 priv->features |= FEATURE_I2C_BLOCK_READ;
715 /* fall through */ 738 /* fall through */
716 case PCI_DEVICE_ID_INTEL_82801DB_3: 739 case PCI_DEVICE_ID_INTEL_82801DB_3:
717 i801_features |= FEATURE_SMBUS_PEC; 740 priv->features |= FEATURE_SMBUS_PEC;
718 i801_features |= FEATURE_BLOCK_BUFFER; 741 priv->features |= FEATURE_BLOCK_BUFFER;
719 /* fall through */ 742 /* fall through */
720 case PCI_DEVICE_ID_INTEL_82801CA_3: 743 case PCI_DEVICE_ID_INTEL_82801CA_3:
721 case PCI_DEVICE_ID_INTEL_82801BA_2: 744 case PCI_DEVICE_ID_INTEL_82801BA_2:
@@ -726,11 +749,11 @@ static int __devinit i801_probe(struct pci_dev *dev,
726 749
727 /* Disable features on user request */ 750 /* Disable features on user request */
728 for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) { 751 for (i = 0; i < ARRAY_SIZE(i801_feature_names); i++) {
729 if (i801_features & disable_features & (1 << i)) 752 if (priv->features & disable_features & (1 << i))
730 dev_notice(&dev->dev, "%s disabled by user\n", 753 dev_notice(&dev->dev, "%s disabled by user\n",
731 i801_feature_names[i]); 754 i801_feature_names[i]);
732 } 755 }
733 i801_features &= ~disable_features; 756 priv->features &= ~disable_features;
734 757
735 err = pci_enable_device(dev); 758 err = pci_enable_device(dev);
736 if (err) { 759 if (err) {
@@ -740,8 +763,8 @@ static int __devinit i801_probe(struct pci_dev *dev,
740 } 763 }
741 764
742 /* Determine the address of the SMBus area */ 765 /* Determine the address of the SMBus area */
743 i801_smba = pci_resource_start(dev, SMBBAR); 766 priv->smba = pci_resource_start(dev, SMBBAR);
744 if (!i801_smba) { 767 if (!priv->smba) {
745 dev_err(&dev->dev, "SMBus base address uninitialized, " 768 dev_err(&dev->dev, "SMBus base address uninitialized, "
746 "upgrade BIOS\n"); 769 "upgrade BIOS\n");
747 err = -ENODEV; 770 err = -ENODEV;
@@ -757,19 +780,19 @@ static int __devinit i801_probe(struct pci_dev *dev,
757 err = pci_request_region(dev, SMBBAR, i801_driver.name); 780 err = pci_request_region(dev, SMBBAR, i801_driver.name);
758 if (err) { 781 if (err) {
759 dev_err(&dev->dev, "Failed to request SMBus region " 782 dev_err(&dev->dev, "Failed to request SMBus region "
760 "0x%lx-0x%Lx\n", i801_smba, 783 "0x%lx-0x%Lx\n", priv->smba,
761 (unsigned long long)pci_resource_end(dev, SMBBAR)); 784 (unsigned long long)pci_resource_end(dev, SMBBAR));
762 goto exit; 785 goto exit;
763 } 786 }
764 787
765 pci_read_config_byte(I801_dev, SMBHSTCFG, &temp); 788 pci_read_config_byte(priv->pci_dev, SMBHSTCFG, &temp);
766 i801_original_hstcfg = temp; 789 priv->original_hstcfg = temp;
767 temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */ 790 temp &= ~SMBHSTCFG_I2C_EN; /* SMBus timing */
768 if (!(temp & SMBHSTCFG_HST_EN)) { 791 if (!(temp & SMBHSTCFG_HST_EN)) {
769 dev_info(&dev->dev, "Enabling SMBus device\n"); 792 dev_info(&dev->dev, "Enabling SMBus device\n");
770 temp |= SMBHSTCFG_HST_EN; 793 temp |= SMBHSTCFG_HST_EN;
771 } 794 }
772 pci_write_config_byte(I801_dev, SMBHSTCFG, temp); 795 pci_write_config_byte(priv->pci_dev, SMBHSTCFG, temp);
773 796
774 if (temp & SMBHSTCFG_SMB_SMI_EN) 797 if (temp & SMBHSTCFG_SMB_SMI_EN)
775 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n"); 798 dev_dbg(&dev->dev, "SMBus using interrupt SMI#\n");
@@ -777,19 +800,19 @@ static int __devinit i801_probe(struct pci_dev *dev,
777 dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n"); 800 dev_dbg(&dev->dev, "SMBus using PCI Interrupt\n");
778 801
779 /* Clear special mode bits */ 802 /* Clear special mode bits */
780 if (i801_features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER)) 803 if (priv->features & (FEATURE_SMBUS_PEC | FEATURE_BLOCK_BUFFER))
781 outb_p(inb_p(SMBAUXCTL) & ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), 804 outb_p(inb_p(SMBAUXCTL(priv)) &
782 SMBAUXCTL); 805 ~(SMBAUXCTL_CRC | SMBAUXCTL_E32B), SMBAUXCTL(priv));
783 806
784 /* set up the sysfs linkage to our parent device */ 807 /* set up the sysfs linkage to our parent device */
785 i801_adapter.dev.parent = &dev->dev; 808 priv->adapter.dev.parent = &dev->dev;
786 809
787 /* Retry up to 3 times on lost arbitration */ 810 /* Retry up to 3 times on lost arbitration */
788 i801_adapter.retries = 3; 811 priv->adapter.retries = 3;
789 812
790 snprintf(i801_adapter.name, sizeof(i801_adapter.name), 813 snprintf(priv->adapter.name, sizeof(priv->adapter.name),
791 "SMBus I801 adapter at %04lx", i801_smba); 814 "SMBus I801 adapter at %04lx", priv->smba);
792 err = i2c_add_adapter(&i801_adapter); 815 err = i2c_add_adapter(&priv->adapter);
793 if (err) { 816 if (err) {
794 dev_err(&dev->dev, "Failed to add SMBus adapter\n"); 817 dev_err(&dev->dev, "Failed to add SMBus adapter\n");
795 goto exit_release; 818 goto exit_release;
@@ -803,27 +826,33 @@ static int __devinit i801_probe(struct pci_dev *dev,
803 memset(&info, 0, sizeof(struct i2c_board_info)); 826 memset(&info, 0, sizeof(struct i2c_board_info));
804 info.addr = apanel_addr; 827 info.addr = apanel_addr;
805 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE); 828 strlcpy(info.type, "fujitsu_apanel", I2C_NAME_SIZE);
806 i2c_new_device(&i801_adapter, &info); 829 i2c_new_device(&priv->adapter, &info);
807 } 830 }
808#endif 831#endif
809#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE 832#if defined CONFIG_SENSORS_FSCHMD || defined CONFIG_SENSORS_FSCHMD_MODULE
810 if (dmi_name_in_vendors("FUJITSU")) 833 if (dmi_name_in_vendors("FUJITSU"))
811 dmi_walk(dmi_check_onboard_devices, &i801_adapter); 834 dmi_walk(dmi_check_onboard_devices, &priv->adapter);
812#endif 835#endif
813 836
837 pci_set_drvdata(dev, priv);
814 return 0; 838 return 0;
815 839
816exit_release: 840exit_release:
817 pci_release_region(dev, SMBBAR); 841 pci_release_region(dev, SMBBAR);
818exit: 842exit:
843 kfree(priv);
819 return err; 844 return err;
820} 845}
821 846
822static void __devexit i801_remove(struct pci_dev *dev) 847static void __devexit i801_remove(struct pci_dev *dev)
823{ 848{
824 i2c_del_adapter(&i801_adapter); 849 struct i801_priv *priv = pci_get_drvdata(dev);
825 pci_write_config_byte(I801_dev, SMBHSTCFG, i801_original_hstcfg); 850
851 i2c_del_adapter(&priv->adapter);
852 pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
826 pci_release_region(dev, SMBBAR); 853 pci_release_region(dev, SMBBAR);
854 pci_set_drvdata(dev, NULL);
855 kfree(priv);
827 /* 856 /*
828 * do not call pci_disable_device(dev) since it can cause hard hangs on 857 * do not call pci_disable_device(dev) since it can cause hard hangs on
829 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010) 858 * some systems during power-off (eg. Fujitsu-Siemens Lifebook E8010)
@@ -833,8 +862,10 @@ static void __devexit i801_remove(struct pci_dev *dev)
833#ifdef CONFIG_PM 862#ifdef CONFIG_PM
834static int i801_suspend(struct pci_dev *dev, pm_message_t mesg) 863static int i801_suspend(struct pci_dev *dev, pm_message_t mesg)
835{ 864{
865 struct i801_priv *priv = pci_get_drvdata(dev);
866
836 pci_save_state(dev); 867 pci_save_state(dev);
837 pci_write_config_byte(dev, SMBHSTCFG, i801_original_hstcfg); 868 pci_write_config_byte(dev, SMBHSTCFG, priv->original_hstcfg);
838 pci_set_power_state(dev, pci_choose_state(dev, mesg)); 869 pci_set_power_state(dev, pci_choose_state(dev, mesg));
839 return 0; 870 return 0;
840} 871}